Commit | Line | Data |
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1f29e30b | 1 | /* BFD back-end for MIPS Extended-Coff files. |
dfc1c006 | 2 | Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc. |
8fa0d3a0 | 3 | Original version by Per Bothner. |
f6409552 | 4 | Full support added by Ian Lance Taylor, ian@cygnus.com. |
1327fb29 | 5 | |
68b70212 | 6 | This file is part of BFD, the Binary File Descriptor library. |
23b0b558 | 7 | |
68b70212 | 8 | This program is free software; you can redistribute it and/or modify |
23b0b558 | 9 | it under the terms of the GNU General Public License as published by |
68b70212 JG |
10 | the Free Software Foundation; either version 2 of the License, or |
11 | (at your option) any later version. | |
23b0b558 | 12 | |
68b70212 | 13 | This program is distributed in the hope that it will be useful, |
23b0b558 JG |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
68b70212 JG |
19 | along with this program; if not, write to the Free Software |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
1327fb29 | 21 | |
23b0b558 | 22 | #include "bfd.h" |
dd4646ca | 23 | #include "sysdep.h" |
4991ebb9 | 24 | #include "bfdlink.h" |
1327fb29 | 25 | #include "libbfd.h" |
dae31cf5 ILT |
26 | #include "coff/internal.h" |
27 | #include "coff/sym.h" | |
28 | #include "coff/symconst.h" | |
29 | #include "coff/ecoff.h" | |
30 | #include "coff/mips.h" | |
31 | #include "libcoff.h" | |
32 | #include "libecoff.h" | |
33 | \f | |
34 | /* Prototypes for static functions. */ | |
c3fe0c41 | 35 | |
dae31cf5 | 36 | static boolean mips_ecoff_bad_format_hook PARAMS ((bfd *abfd, PTR filehdr)); |
dae31cf5 ILT |
37 | static void mips_ecoff_swap_reloc_in PARAMS ((bfd *, PTR, |
38 | struct internal_reloc *)); | |
39 | static void mips_ecoff_swap_reloc_out PARAMS ((bfd *, | |
40 | const struct internal_reloc *, | |
41 | PTR)); | |
5fa2aaa2 ILT |
42 | static void mips_adjust_reloc_in PARAMS ((bfd *, |
43 | const struct internal_reloc *, | |
44 | arelent *)); | |
45 | static void mips_adjust_reloc_out PARAMS ((bfd *, const arelent *, | |
46 | struct internal_reloc *)); | |
23f44e6f ILT |
47 | static bfd_reloc_status_type mips_generic_reloc PARAMS ((bfd *abfd, |
48 | arelent *reloc, | |
49 | asymbol *symbol, | |
50 | PTR data, | |
51 | asection *section, | |
4991ebb9 ILT |
52 | bfd *output_bfd, |
53 | char **error)); | |
23f44e6f ILT |
54 | static bfd_reloc_status_type mips_refhi_reloc PARAMS ((bfd *abfd, |
55 | arelent *reloc, | |
56 | asymbol *symbol, | |
57 | PTR data, | |
58 | asection *section, | |
4991ebb9 ILT |
59 | bfd *output_bfd, |
60 | char **error)); | |
23f44e6f ILT |
61 | static bfd_reloc_status_type mips_reflo_reloc PARAMS ((bfd *abfd, |
62 | arelent *reloc, | |
63 | asymbol *symbol, | |
64 | PTR data, | |
65 | asection *section, | |
4991ebb9 ILT |
66 | bfd *output_bfd, |
67 | char **error)); | |
23f44e6f ILT |
68 | static bfd_reloc_status_type mips_gprel_reloc PARAMS ((bfd *abfd, |
69 | arelent *reloc, | |
70 | asymbol *symbol, | |
71 | PTR data, | |
72 | asection *section, | |
4991ebb9 ILT |
73 | bfd *output_bfd, |
74 | char **error)); | |
dabf906e ILT |
75 | static bfd_reloc_status_type mips_switch_reloc PARAMS ((bfd *abfd, |
76 | arelent *reloc, | |
77 | asymbol *symbol, | |
78 | PTR data, | |
79 | asection *section, | |
80 | bfd *output_bfd, | |
81 | char **error)); | |
4991ebb9 ILT |
82 | static void mips_relocate_refhi PARAMS ((struct internal_reloc *refhi, |
83 | struct internal_reloc *reflo, | |
84 | bfd *input_bfd, | |
85 | asection *input_section, | |
86 | bfd_byte *contents, | |
a3a33af3 | 87 | size_t adjust, |
4991ebb9 ILT |
88 | bfd_vma relocation)); |
89 | static boolean mips_relocate_section PARAMS ((bfd *, struct bfd_link_info *, | |
90 | bfd *, asection *, | |
91 | bfd_byte *, PTR)); | |
a3a33af3 ILT |
92 | static boolean mips_relax_section PARAMS ((bfd *, asection *, |
93 | struct bfd_link_info *, | |
94 | boolean *)); | |
95 | static boolean mips_relax_pcrel16 PARAMS ((struct bfd_link_info *, bfd *, | |
96 | asection *, | |
97 | struct ecoff_link_hash_entry *, | |
98 | bfd_byte *, bfd_vma)); | |
dae31cf5 | 99 | \f |
dae31cf5 ILT |
100 | /* ECOFF has COFF sections, but the debugging information is stored in |
101 | a completely different format. ECOFF targets use some of the | |
102 | swapping routines from coffswap.h, and some of the generic COFF | |
103 | routines in coffgen.c, but, unlike the real COFF targets, do not | |
104 | use coffcode.h itself. | |
8fa0d3a0 | 105 | |
dae31cf5 | 106 | Get the generic COFF swapping routines, except for the reloc, |
23f44e6f | 107 | symbol, and lineno ones. Give them ECOFF names. */ |
dae31cf5 ILT |
108 | #define MIPSECOFF |
109 | #define NO_COFF_RELOCS | |
110 | #define NO_COFF_SYMBOLS | |
111 | #define NO_COFF_LINENOS | |
112 | #define coff_swap_filehdr_in mips_ecoff_swap_filehdr_in | |
113 | #define coff_swap_filehdr_out mips_ecoff_swap_filehdr_out | |
114 | #define coff_swap_aouthdr_in mips_ecoff_swap_aouthdr_in | |
115 | #define coff_swap_aouthdr_out mips_ecoff_swap_aouthdr_out | |
116 | #define coff_swap_scnhdr_in mips_ecoff_swap_scnhdr_in | |
117 | #define coff_swap_scnhdr_out mips_ecoff_swap_scnhdr_out | |
118 | #include "coffswap.h" | |
8fa0d3a0 | 119 | |
dae31cf5 ILT |
120 | /* Get the ECOFF swapping routines. */ |
121 | #define ECOFF_32 | |
122 | #include "ecoffswap.h" | |
123 | \f | |
23f44e6f | 124 | /* How to process the various relocs types. */ |
dae31cf5 | 125 | |
23f44e6f | 126 | static reloc_howto_type mips_howto_table[] = |
dae31cf5 | 127 | { |
23f44e6f ILT |
128 | /* Reloc type 0 is ignored. The reloc reading code ensures that |
129 | this is a reference to the .abs section, which will cause | |
130 | bfd_perform_relocation to do nothing. */ | |
131 | HOWTO (MIPS_R_IGNORE, /* type */ | |
132 | 0, /* rightshift */ | |
133 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
134 | 8, /* bitsize */ | |
135 | false, /* pc_relative */ | |
136 | 0, /* bitpos */ | |
137 | complain_overflow_dont, /* complain_on_overflow */ | |
138 | 0, /* special_function */ | |
139 | "IGNORE", /* name */ | |
140 | false, /* partial_inplace */ | |
141 | 0, /* src_mask */ | |
142 | 0, /* dst_mask */ | |
143 | false), /* pcrel_offset */ | |
144 | ||
145 | /* A 16 bit reference to a symbol, normally from a data section. */ | |
146 | HOWTO (MIPS_R_REFHALF, /* type */ | |
147 | 0, /* rightshift */ | |
148 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
149 | 16, /* bitsize */ | |
150 | false, /* pc_relative */ | |
151 | 0, /* bitpos */ | |
152 | complain_overflow_bitfield, /* complain_on_overflow */ | |
153 | mips_generic_reloc, /* special_function */ | |
154 | "REFHALF", /* name */ | |
155 | true, /* partial_inplace */ | |
156 | 0xffff, /* src_mask */ | |
157 | 0xffff, /* dst_mask */ | |
158 | false), /* pcrel_offset */ | |
159 | ||
160 | /* A 32 bit reference to a symbol, normally from a data section. */ | |
161 | HOWTO (MIPS_R_REFWORD, /* type */ | |
162 | 0, /* rightshift */ | |
163 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
164 | 32, /* bitsize */ | |
165 | false, /* pc_relative */ | |
166 | 0, /* bitpos */ | |
167 | complain_overflow_bitfield, /* complain_on_overflow */ | |
168 | mips_generic_reloc, /* special_function */ | |
169 | "REFWORD", /* name */ | |
170 | true, /* partial_inplace */ | |
171 | 0xffffffff, /* src_mask */ | |
172 | 0xffffffff, /* dst_mask */ | |
173 | false), /* pcrel_offset */ | |
174 | ||
175 | /* A 26 bit absolute jump address. */ | |
176 | HOWTO (MIPS_R_JMPADDR, /* type */ | |
177 | 2, /* rightshift */ | |
178 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
179 | 26, /* bitsize */ | |
180 | false, /* pc_relative */ | |
181 | 0, /* bitpos */ | |
5fa2aaa2 ILT |
182 | complain_overflow_dont, /* complain_on_overflow */ |
183 | /* This needs complex overflow | |
184 | detection, because the upper four | |
185 | bits must match the PC. */ | |
23f44e6f ILT |
186 | mips_generic_reloc, /* special_function */ |
187 | "JMPADDR", /* name */ | |
188 | true, /* partial_inplace */ | |
189 | 0x3ffffff, /* src_mask */ | |
190 | 0x3ffffff, /* dst_mask */ | |
191 | false), /* pcrel_offset */ | |
192 | ||
193 | /* The high 16 bits of a symbol value. Handled by the function | |
194 | mips_refhi_reloc. */ | |
195 | HOWTO (MIPS_R_REFHI, /* type */ | |
196 | 16, /* rightshift */ | |
197 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
198 | 16, /* bitsize */ | |
199 | false, /* pc_relative */ | |
200 | 0, /* bitpos */ | |
201 | complain_overflow_bitfield, /* complain_on_overflow */ | |
202 | mips_refhi_reloc, /* special_function */ | |
203 | "REFHI", /* name */ | |
204 | true, /* partial_inplace */ | |
205 | 0xffff, /* src_mask */ | |
206 | 0xffff, /* dst_mask */ | |
207 | false), /* pcrel_offset */ | |
208 | ||
209 | /* The low 16 bits of a symbol value. */ | |
210 | HOWTO (MIPS_R_REFLO, /* type */ | |
211 | 0, /* rightshift */ | |
212 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
213 | 16, /* bitsize */ | |
214 | false, /* pc_relative */ | |
215 | 0, /* bitpos */ | |
216 | complain_overflow_dont, /* complain_on_overflow */ | |
217 | mips_reflo_reloc, /* special_function */ | |
218 | "REFLO", /* name */ | |
219 | true, /* partial_inplace */ | |
220 | 0xffff, /* src_mask */ | |
221 | 0xffff, /* dst_mask */ | |
222 | false), /* pcrel_offset */ | |
223 | ||
224 | /* A reference to an offset from the gp register. Handled by the | |
225 | function mips_gprel_reloc. */ | |
226 | HOWTO (MIPS_R_GPREL, /* type */ | |
227 | 0, /* rightshift */ | |
228 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
229 | 16, /* bitsize */ | |
230 | false, /* pc_relative */ | |
231 | 0, /* bitpos */ | |
232 | complain_overflow_signed, /* complain_on_overflow */ | |
233 | mips_gprel_reloc, /* special_function */ | |
234 | "GPREL", /* name */ | |
235 | true, /* partial_inplace */ | |
236 | 0xffff, /* src_mask */ | |
237 | 0xffff, /* dst_mask */ | |
238 | false), /* pcrel_offset */ | |
239 | ||
240 | /* A reference to a literal using an offset from the gp register. | |
241 | Handled by the function mips_gprel_reloc. */ | |
242 | HOWTO (MIPS_R_LITERAL, /* type */ | |
243 | 0, /* rightshift */ | |
244 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
245 | 16, /* bitsize */ | |
246 | false, /* pc_relative */ | |
247 | 0, /* bitpos */ | |
248 | complain_overflow_signed, /* complain_on_overflow */ | |
249 | mips_gprel_reloc, /* special_function */ | |
250 | "LITERAL", /* name */ | |
251 | true, /* partial_inplace */ | |
252 | 0xffff, /* src_mask */ | |
253 | 0xffff, /* dst_mask */ | |
a3a33af3 ILT |
254 | false), /* pcrel_offset */ |
255 | ||
256 | /* This reloc is a Cygnus extension used when generating position | |
257 | independent code for embedded systems. It represents a 16 bit PC | |
258 | relative reloc rightshifted twice as used in the MIPS branch | |
259 | instructions. */ | |
260 | HOWTO (MIPS_R_PCREL16, /* type */ | |
261 | 2, /* rightshift */ | |
262 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
263 | 16, /* bitsize */ | |
264 | true, /* pc_relative */ | |
265 | 0, /* bitpos */ | |
266 | complain_overflow_signed, /* complain_on_overflow */ | |
267 | mips_generic_reloc, /* special_function */ | |
268 | "PCREL16", /* name */ | |
269 | true, /* partial_inplace */ | |
270 | 0xffff, /* src_mask */ | |
271 | 0xffff, /* dst_mask */ | |
dabf906e ILT |
272 | true), /* pcrel_offset */ |
273 | ||
274 | /* This reloc is a Cygnus extension used when generating position | |
275 | independent code for embedded systems. It represents an entry in | |
276 | a switch table, which is the difference between two symbols in | |
277 | the .text section. The symndx is actually the offset from the | |
278 | reloc address to the subtrahend. See include/coff/mips.h for | |
279 | more details. */ | |
280 | HOWTO (MIPS_R_SWITCH, /* type */ | |
281 | 0, /* rightshift */ | |
282 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
283 | 32, /* bitsize */ | |
284 | true, /* pc_relative */ | |
285 | 0, /* bitpos */ | |
286 | complain_overflow_dont, /* complain_on_overflow */ | |
287 | mips_switch_reloc, /* special_function */ | |
288 | "SWITCH", /* name */ | |
289 | true, /* partial_inplace */ | |
290 | 0xffffffff, /* src_mask */ | |
291 | 0xffffffff, /* dst_mask */ | |
a3a33af3 | 292 | true) /* pcrel_offset */ |
dae31cf5 | 293 | }; |
23f44e6f ILT |
294 | |
295 | #define MIPS_HOWTO_COUNT \ | |
296 | (sizeof mips_howto_table / sizeof mips_howto_table[0]) | |
a3a33af3 ILT |
297 | |
298 | /* When the linker is doing relaxing, it may change a external PCREL16 | |
299 | reloc. This typically represents an instruction like | |
300 | bal foo | |
301 | We change it to | |
302 | .set noreorder | |
303 | bal $L1 | |
304 | lui $at,%hi(foo - $L1) | |
305 | $L1: | |
306 | addiu $at,%lo(foo - $L1) | |
307 | addu $at,$at,$31 | |
308 | jalr $at | |
309 | PCREL16_EXPANSION_ADJUSTMENT is the number of bytes this changes the | |
310 | instruction by. */ | |
311 | ||
312 | #define PCREL16_EXPANSION_ADJUSTMENT (4 * 4) | |
dae31cf5 ILT |
313 | \f |
314 | /* See whether the magic number matches. */ | |
8fa0d3a0 | 315 | |
dae31cf5 ILT |
316 | static boolean |
317 | mips_ecoff_bad_format_hook (abfd, filehdr) | |
318 | bfd *abfd; | |
319 | PTR filehdr; | |
320 | { | |
321 | struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr; | |
8fa0d3a0 | 322 | |
5fa2aaa2 ILT |
323 | switch (internal_f->f_magic) |
324 | { | |
325 | case MIPS_MAGIC_1: | |
326 | /* I don't know what endianness this implies. */ | |
327 | return true; | |
c3fe0c41 | 328 | |
5fa2aaa2 ILT |
329 | case MIPS_MAGIC_BIG: |
330 | case MIPS_MAGIC_BIG2: | |
331 | case MIPS_MAGIC_BIG3: | |
332 | return abfd->xvec->byteorder_big_p; | |
c3fe0c41 | 333 | |
5fa2aaa2 ILT |
334 | case MIPS_MAGIC_LITTLE: |
335 | case MIPS_MAGIC_LITTLE2: | |
336 | case MIPS_MAGIC_LITTLE3: | |
337 | return abfd->xvec->byteorder_big_p == false; | |
23ba15b7 | 338 | |
5fa2aaa2 ILT |
339 | default: |
340 | return false; | |
c3fe0c41 | 341 | } |
dae31cf5 ILT |
342 | } |
343 | \f | |
344 | /* Reloc handling. MIPS ECOFF relocs are packed into 8 bytes in | |
345 | external form. They use a bit which indicates whether the symbol | |
346 | is external. */ | |
23ba15b7 | 347 | |
dae31cf5 | 348 | /* Swap a reloc in. */ |
23ba15b7 | 349 | |
dae31cf5 ILT |
350 | static void |
351 | mips_ecoff_swap_reloc_in (abfd, ext_ptr, intern) | |
352 | bfd *abfd; | |
353 | PTR ext_ptr; | |
354 | struct internal_reloc *intern; | |
355 | { | |
356 | const RELOC *ext = (RELOC *) ext_ptr; | |
23ba15b7 | 357 | |
dae31cf5 ILT |
358 | intern->r_vaddr = bfd_h_get_32 (abfd, (bfd_byte *) ext->r_vaddr); |
359 | if (abfd->xvec->header_byteorder_big_p != false) | |
360 | { | |
361 | intern->r_symndx = (((int) ext->r_bits[0] | |
362 | << RELOC_BITS0_SYMNDX_SH_LEFT_BIG) | |
363 | | ((int) ext->r_bits[1] | |
364 | << RELOC_BITS1_SYMNDX_SH_LEFT_BIG) | |
365 | | ((int) ext->r_bits[2] | |
366 | << RELOC_BITS2_SYMNDX_SH_LEFT_BIG)); | |
367 | intern->r_type = ((ext->r_bits[3] & RELOC_BITS3_TYPE_BIG) | |
368 | >> RELOC_BITS3_TYPE_SH_BIG); | |
369 | intern->r_extern = (ext->r_bits[3] & RELOC_BITS3_EXTERN_BIG) != 0; | |
23ba15b7 | 370 | } |
dae31cf5 | 371 | else |
23ba15b7 | 372 | { |
dae31cf5 ILT |
373 | intern->r_symndx = (((int) ext->r_bits[0] |
374 | << RELOC_BITS0_SYMNDX_SH_LEFT_LITTLE) | |
375 | | ((int) ext->r_bits[1] | |
376 | << RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE) | |
377 | | ((int) ext->r_bits[2] | |
378 | << RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE)); | |
379 | intern->r_type = ((ext->r_bits[3] & RELOC_BITS3_TYPE_LITTLE) | |
380 | >> RELOC_BITS3_TYPE_SH_LITTLE); | |
381 | intern->r_extern = (ext->r_bits[3] & RELOC_BITS3_EXTERN_LITTLE) != 0; | |
23ba15b7 | 382 | } |
dabf906e ILT |
383 | |
384 | /* If this is a MIPS_R_SWITCH reloc, r_symndx is actually the offset | |
385 | from the reloc address to the base of the difference (see | |
386 | include/coff/mips.h for more details). We copy symndx into the | |
387 | r_offset field so as not to confuse ecoff_slurp_reloc_table in | |
388 | ecoff.c. In adjust_reloc_in we then copy r_offset into the reloc | |
389 | addend. */ | |
390 | if (intern->r_type == MIPS_R_SWITCH) | |
391 | { | |
392 | BFD_ASSERT (! intern->r_extern); | |
393 | intern->r_offset = intern->r_symndx; | |
394 | intern->r_symndx = RELOC_SECTION_TEXT; | |
395 | } | |
c3fe0c41 ILT |
396 | } |
397 | ||
dae31cf5 | 398 | /* Swap a reloc out. */ |
c3fe0c41 | 399 | |
dae31cf5 ILT |
400 | static void |
401 | mips_ecoff_swap_reloc_out (abfd, intern, dst) | |
f6409552 | 402 | bfd *abfd; |
dae31cf5 ILT |
403 | const struct internal_reloc *intern; |
404 | PTR dst; | |
c3fe0c41 | 405 | { |
dae31cf5 | 406 | RELOC *ext = (RELOC *) dst; |
dabf906e | 407 | long r_symndx; |
c3fe0c41 | 408 | |
5fa2aaa2 ILT |
409 | BFD_ASSERT (intern->r_extern |
410 | || (intern->r_symndx >= 0 && intern->r_symndx <= 12)); | |
411 | ||
dabf906e ILT |
412 | /* If this is a MIPS_R_SWITCH reloc, we actually want to write the |
413 | contents of r_offset out as the symbol index. This undoes the | |
414 | change made by mips_ecoff_swap_reloc_in. */ | |
415 | if (intern->r_type != MIPS_R_SWITCH) | |
416 | r_symndx = intern->r_symndx; | |
417 | else | |
418 | { | |
419 | BFD_ASSERT (intern->r_symndx == RELOC_SECTION_TEXT); | |
420 | r_symndx = intern->r_offset; | |
421 | } | |
422 | ||
dae31cf5 ILT |
423 | bfd_h_put_32 (abfd, intern->r_vaddr, (bfd_byte *) ext->r_vaddr); |
424 | if (abfd->xvec->header_byteorder_big_p != false) | |
c3fe0c41 | 425 | { |
dabf906e ILT |
426 | ext->r_bits[0] = r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_BIG; |
427 | ext->r_bits[1] = r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_BIG; | |
428 | ext->r_bits[2] = r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_BIG; | |
dae31cf5 ILT |
429 | ext->r_bits[3] = (((intern->r_type << RELOC_BITS3_TYPE_SH_BIG) |
430 | & RELOC_BITS3_TYPE_BIG) | |
431 | | (intern->r_extern ? RELOC_BITS3_EXTERN_BIG : 0)); | |
c3fe0c41 | 432 | } |
dae31cf5 | 433 | else |
c3fe0c41 | 434 | { |
dabf906e ILT |
435 | ext->r_bits[0] = r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_LITTLE; |
436 | ext->r_bits[1] = r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE; | |
437 | ext->r_bits[2] = r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE; | |
dae31cf5 ILT |
438 | ext->r_bits[3] = (((intern->r_type << RELOC_BITS3_TYPE_SH_LITTLE) |
439 | & RELOC_BITS3_TYPE_LITTLE) | |
440 | | (intern->r_extern ? RELOC_BITS3_EXTERN_LITTLE : 0)); | |
c3fe0c41 | 441 | } |
c3fe0c41 | 442 | } |
23f44e6f ILT |
443 | |
444 | /* Finish canonicalizing a reloc. Part of this is generic to all | |
445 | ECOFF targets, and that part is in ecoff.c. The rest is done in | |
446 | this backend routine. It must fill in the howto field. */ | |
447 | ||
448 | static void | |
5fa2aaa2 | 449 | mips_adjust_reloc_in (abfd, intern, rptr) |
23f44e6f | 450 | bfd *abfd; |
5fa2aaa2 | 451 | const struct internal_reloc *intern; |
23f44e6f ILT |
452 | arelent *rptr; |
453 | { | |
dabf906e | 454 | if (intern->r_type > MIPS_R_SWITCH) |
23f44e6f ILT |
455 | abort (); |
456 | ||
457 | if (! intern->r_extern | |
458 | && (intern->r_type == MIPS_R_GPREL | |
459 | || intern->r_type == MIPS_R_LITERAL)) | |
460 | rptr->addend += ecoff_data (abfd)->gp; | |
461 | ||
462 | /* If the type is MIPS_R_IGNORE, make sure this is a reference to | |
463 | the absolute section so that the reloc is ignored. */ | |
464 | if (intern->r_type == MIPS_R_IGNORE) | |
465 | rptr->sym_ptr_ptr = bfd_abs_section.symbol_ptr_ptr; | |
466 | ||
dabf906e ILT |
467 | /* If this is a MIPS_R_SWITCH reloc, we want the addend field of the |
468 | BFD relocto hold the value which was originally in the symndx | |
469 | field of the internal MIPS ECOFF reloc. This value was copied | |
470 | into intern->r_offset by mips_swap_reloc_in, and here we copy it | |
471 | into the addend field. */ | |
472 | if (intern->r_type == MIPS_R_SWITCH) | |
473 | rptr->addend = intern->r_offset; | |
474 | ||
23f44e6f ILT |
475 | rptr->howto = &mips_howto_table[intern->r_type]; |
476 | } | |
477 | ||
5fa2aaa2 ILT |
478 | /* Make any adjustments needed to a reloc before writing it out. None |
479 | are needed for MIPS. */ | |
480 | ||
481 | static void | |
4991ebb9 | 482 | mips_adjust_reloc_out (abfd, rel, intern) |
5fa2aaa2 ILT |
483 | bfd *abfd; |
484 | const arelent *rel; | |
485 | struct internal_reloc *intern; | |
486 | { | |
dabf906e ILT |
487 | /* For a MIPS_R_SWITCH reloc we must copy rel->addend into |
488 | intern->r_offset. This will then be written out as the symbol | |
489 | index by mips_ecoff_swap_reloc_out. This operation parallels the | |
490 | action of mips_adjust_reloc_in. */ | |
491 | if (intern->r_type == MIPS_R_SWITCH) | |
492 | intern->r_offset = rel->addend; | |
5fa2aaa2 ILT |
493 | } |
494 | ||
23f44e6f ILT |
495 | /* ECOFF relocs are either against external symbols, or against |
496 | sections. If we are producing relocateable output, and the reloc | |
497 | is against an external symbol, and nothing has given us any | |
498 | additional addend, the resulting reloc will also be against the | |
499 | same symbol. In such a case, we don't want to change anything | |
500 | about the way the reloc is handled, since it will all be done at | |
501 | final link time. Rather than put special case code into | |
502 | bfd_perform_relocation, all the reloc types use this howto | |
503 | function. It just short circuits the reloc if producing | |
504 | relocateable output against an external symbol. */ | |
505 | ||
506 | static bfd_reloc_status_type | |
507 | mips_generic_reloc (abfd, | |
508 | reloc_entry, | |
509 | symbol, | |
510 | data, | |
511 | input_section, | |
4991ebb9 ILT |
512 | output_bfd, |
513 | error_message) | |
23f44e6f ILT |
514 | bfd *abfd; |
515 | arelent *reloc_entry; | |
516 | asymbol *symbol; | |
517 | PTR data; | |
518 | asection *input_section; | |
519 | bfd *output_bfd; | |
4991ebb9 | 520 | char **error_message; |
23f44e6f ILT |
521 | { |
522 | if (output_bfd != (bfd *) NULL | |
523 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
524 | && reloc_entry->addend == 0) | |
525 | { | |
526 | reloc_entry->address += input_section->output_offset; | |
527 | return bfd_reloc_ok; | |
528 | } | |
529 | ||
530 | return bfd_reloc_continue; | |
531 | } | |
532 | ||
533 | /* Do a REFHI relocation. This has to be done in combination with a | |
534 | REFLO reloc, because there is a carry from the REFLO to the REFHI. | |
535 | Here we just save the information we need; we do the actual | |
536 | relocation when we see the REFLO. MIPS ECOFF requires that the | |
537 | REFLO immediately follow the REFHI, so this ought to work. */ | |
538 | ||
539 | static bfd_byte *mips_refhi_addr; | |
540 | static bfd_vma mips_refhi_addend; | |
541 | ||
542 | static bfd_reloc_status_type | |
543 | mips_refhi_reloc (abfd, | |
544 | reloc_entry, | |
545 | symbol, | |
546 | data, | |
547 | input_section, | |
4991ebb9 ILT |
548 | output_bfd, |
549 | error_message) | |
23f44e6f ILT |
550 | bfd *abfd; |
551 | arelent *reloc_entry; | |
552 | asymbol *symbol; | |
553 | PTR data; | |
554 | asection *input_section; | |
555 | bfd *output_bfd; | |
4991ebb9 | 556 | char **error_message; |
23f44e6f ILT |
557 | { |
558 | bfd_reloc_status_type ret; | |
559 | bfd_vma relocation; | |
560 | ||
561 | /* If we're relocating, and this an external symbol, we don't want | |
562 | to change anything. */ | |
563 | if (output_bfd != (bfd *) NULL | |
564 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
565 | && reloc_entry->addend == 0) | |
566 | { | |
567 | reloc_entry->address += input_section->output_offset; | |
568 | return bfd_reloc_ok; | |
569 | } | |
570 | ||
571 | ret = bfd_reloc_ok; | |
572 | if (symbol->section == &bfd_und_section | |
573 | && output_bfd == (bfd *) NULL) | |
574 | ret = bfd_reloc_undefined; | |
575 | ||
576 | if (bfd_is_com_section (symbol->section)) | |
577 | relocation = 0; | |
578 | else | |
579 | relocation = symbol->value; | |
580 | ||
581 | relocation += symbol->section->output_section->vma; | |
582 | relocation += symbol->section->output_offset; | |
583 | relocation += reloc_entry->addend; | |
584 | ||
585 | if (reloc_entry->address > input_section->_cooked_size) | |
586 | return bfd_reloc_outofrange; | |
587 | ||
588 | /* Save the information, and let REFLO do the actual relocation. */ | |
589 | mips_refhi_addr = (bfd_byte *) data + reloc_entry->address; | |
590 | mips_refhi_addend = relocation; | |
591 | ||
592 | if (output_bfd != (bfd *) NULL) | |
593 | reloc_entry->address += input_section->output_offset; | |
594 | ||
595 | return ret; | |
596 | } | |
597 | ||
598 | /* Do a REFLO relocation. This is a straightforward 16 bit inplace | |
599 | relocation; this function exists in order to do the REFHI | |
600 | relocation described above. */ | |
601 | ||
602 | static bfd_reloc_status_type | |
603 | mips_reflo_reloc (abfd, | |
604 | reloc_entry, | |
605 | symbol, | |
606 | data, | |
607 | input_section, | |
4991ebb9 ILT |
608 | output_bfd, |
609 | error_message) | |
23f44e6f ILT |
610 | bfd *abfd; |
611 | arelent *reloc_entry; | |
612 | asymbol *symbol; | |
613 | PTR data; | |
614 | asection *input_section; | |
615 | bfd *output_bfd; | |
4991ebb9 | 616 | char **error_message; |
23f44e6f ILT |
617 | { |
618 | if (mips_refhi_addr != (bfd_byte *) NULL) | |
619 | { | |
620 | unsigned long insn; | |
621 | unsigned long val; | |
622 | unsigned long vallo; | |
623 | ||
624 | /* Do the REFHI relocation. Note that we actually don't need to | |
625 | know anything about the REFLO itself, except where to find | |
626 | the low 16 bits of the addend needed by the REFHI. */ | |
627 | insn = bfd_get_32 (abfd, mips_refhi_addr); | |
628 | vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address) | |
629 | & 0xffff); | |
630 | val = ((insn & 0xffff) << 16) + vallo; | |
631 | val += mips_refhi_addend; | |
632 | ||
633 | /* The low order 16 bits are always treated as a signed value. | |
634 | Therefore, a negative value in the low order bits requires an | |
635 | adjustment in the high order bits. We need to make this | |
636 | adjustment in two ways: once for the bits we took from the | |
637 | data, and once for the bits we are putting back in to the | |
638 | data. */ | |
639 | if ((vallo & 0x8000) != 0) | |
640 | val -= 0x10000; | |
641 | if ((val & 0x8000) != 0) | |
642 | val += 0x10000; | |
643 | ||
644 | insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); | |
645 | bfd_put_32 (abfd, insn, mips_refhi_addr); | |
646 | ||
647 | mips_refhi_addr = (bfd_byte *) NULL; | |
648 | } | |
649 | ||
650 | /* Now do the REFLO reloc in the usual way. */ | |
651 | return mips_generic_reloc (abfd, reloc_entry, symbol, data, | |
4991ebb9 | 652 | input_section, output_bfd, error_message); |
23f44e6f ILT |
653 | } |
654 | ||
655 | /* Do a GPREL relocation. This is a 16 bit value which must become | |
656 | the offset from the gp register. */ | |
657 | ||
658 | static bfd_reloc_status_type | |
659 | mips_gprel_reloc (abfd, | |
4991ebb9 ILT |
660 | reloc_entry, |
661 | symbol, | |
662 | data, | |
663 | input_section, | |
664 | output_bfd, | |
665 | error_message) | |
23f44e6f ILT |
666 | bfd *abfd; |
667 | arelent *reloc_entry; | |
668 | asymbol *symbol; | |
669 | PTR data; | |
670 | asection *input_section; | |
671 | bfd *output_bfd; | |
4991ebb9 | 672 | char **error_message; |
23f44e6f ILT |
673 | { |
674 | boolean relocateable; | |
675 | bfd_vma relocation; | |
676 | unsigned long val; | |
677 | unsigned long insn; | |
678 | ||
679 | /* If we're relocating, and this is an external symbol with no | |
680 | addend, we don't want to change anything. We will only have an | |
681 | addend if this is a newly created reloc, not read from an ECOFF | |
682 | file. */ | |
683 | if (output_bfd != (bfd *) NULL | |
684 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
685 | && reloc_entry->addend == 0) | |
686 | { | |
687 | reloc_entry->address += input_section->output_offset; | |
688 | return bfd_reloc_ok; | |
689 | } | |
690 | ||
691 | if (output_bfd != (bfd *) NULL) | |
692 | relocateable = true; | |
693 | else | |
694 | { | |
695 | relocateable = false; | |
696 | output_bfd = symbol->section->output_section->owner; | |
697 | } | |
698 | ||
699 | if (symbol->section == &bfd_und_section | |
700 | && relocateable == false) | |
701 | return bfd_reloc_undefined; | |
702 | ||
703 | /* We have to figure out the gp value, so that we can adjust the | |
704 | symbol value correctly. We look up the symbol _gp in the output | |
705 | BFD. If we can't find it, we're stuck. We cache it in the ECOFF | |
706 | target data. We don't need to adjust the symbol value for an | |
707 | external symbol if we are producing relocateable output. */ | |
708 | if (ecoff_data (output_bfd)->gp == 0 | |
709 | && (relocateable == false | |
710 | || (symbol->flags & BSF_SECTION_SYM) != 0)) | |
711 | { | |
712 | if (relocateable != false) | |
713 | { | |
714 | /* Make up a value. */ | |
715 | ecoff_data (output_bfd)->gp = | |
716 | symbol->section->output_section->vma + 0x4000; | |
717 | } | |
718 | else | |
719 | { | |
720 | unsigned int count; | |
721 | asymbol **sym; | |
722 | unsigned int i; | |
723 | ||
724 | count = bfd_get_symcount (output_bfd); | |
725 | sym = bfd_get_outsymbols (output_bfd); | |
726 | ||
727 | if (sym == (asymbol **) NULL) | |
728 | i = count; | |
729 | else | |
730 | { | |
731 | for (i = 0; i < count; i++, sym++) | |
732 | { | |
733 | register CONST char *name; | |
734 | ||
735 | name = bfd_asymbol_name (*sym); | |
736 | if (*name == '_' && strcmp (name, "_gp") == 0) | |
737 | { | |
738 | ecoff_data (output_bfd)->gp = bfd_asymbol_value (*sym); | |
739 | break; | |
740 | } | |
741 | } | |
742 | } | |
743 | ||
744 | if (i >= count) | |
745 | { | |
746 | /* Only get the error once. */ | |
747 | ecoff_data (output_bfd)->gp = 4; | |
4991ebb9 ILT |
748 | *error_message = |
749 | (char *) "GP relative relocation when _gp not defined"; | |
23f44e6f ILT |
750 | return bfd_reloc_dangerous; |
751 | } | |
752 | } | |
753 | } | |
754 | ||
755 | if (bfd_is_com_section (symbol->section)) | |
756 | relocation = 0; | |
757 | else | |
758 | relocation = symbol->value; | |
759 | ||
760 | relocation += symbol->section->output_section->vma; | |
761 | relocation += symbol->section->output_offset; | |
762 | ||
763 | if (reloc_entry->address > input_section->_cooked_size) | |
764 | return bfd_reloc_outofrange; | |
765 | ||
766 | insn = bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address); | |
767 | ||
768 | /* Set val to the offset into the section or symbol. */ | |
769 | val = ((insn & 0xffff) + reloc_entry->addend) & 0xffff; | |
770 | if (val & 0x8000) | |
771 | val -= 0x10000; | |
772 | ||
773 | /* Adjust val for the final section location and GP value. If we | |
774 | are producing relocateable output, we don't want to do this for | |
775 | an external symbol. */ | |
776 | if (relocateable == false | |
777 | || (symbol->flags & BSF_SECTION_SYM) != 0) | |
778 | val += relocation - ecoff_data (output_bfd)->gp; | |
779 | ||
780 | insn = (insn &~ 0xffff) | (val & 0xffff); | |
781 | bfd_put_32 (abfd, insn, (bfd_byte *) data + reloc_entry->address); | |
782 | ||
783 | if (relocateable != false) | |
784 | reloc_entry->address += input_section->output_offset; | |
785 | ||
786 | /* Make sure it fit in 16 bits. */ | |
787 | if (val >= 0x8000 && val < 0xffff8000) | |
4991ebb9 | 788 | return bfd_reloc_overflow; |
23f44e6f ILT |
789 | |
790 | return bfd_reloc_ok; | |
791 | } | |
792 | ||
dabf906e ILT |
793 | /* This is the special function for the MIPS_R_SWITCH reloc. This |
794 | special reloc is normally correct in the object file, and only | |
795 | requires special handling when relaxing. We don't want | |
796 | bfd_perform_relocation to tamper with it at all. */ | |
797 | ||
798 | /*ARGSUSED*/ | |
799 | static bfd_reloc_status_type | |
800 | mips_switch_reloc (abfd, | |
801 | reloc_entry, | |
802 | symbol, | |
803 | data, | |
804 | input_section, | |
805 | output_bfd, | |
806 | error_message) | |
807 | bfd *abfd; | |
808 | arelent *reloc_entry; | |
809 | asymbol *symbol; | |
810 | PTR data; | |
811 | asection *input_section; | |
812 | bfd *output_bfd; | |
813 | char **error_message; | |
814 | { | |
815 | return bfd_reloc_ok; | |
816 | } | |
817 | ||
23f44e6f ILT |
818 | /* Get the howto structure for a generic reloc type. */ |
819 | ||
820 | static CONST struct reloc_howto_struct * | |
821 | mips_bfd_reloc_type_lookup (abfd, code) | |
822 | bfd *abfd; | |
823 | bfd_reloc_code_real_type code; | |
824 | { | |
825 | int mips_type; | |
826 | ||
827 | switch (code) | |
828 | { | |
829 | case BFD_RELOC_16: | |
830 | mips_type = MIPS_R_REFHALF; | |
831 | break; | |
832 | case BFD_RELOC_32: | |
f1cca647 | 833 | case BFD_RELOC_CTOR: |
23f44e6f ILT |
834 | mips_type = MIPS_R_REFWORD; |
835 | break; | |
836 | case BFD_RELOC_MIPS_JMP: | |
837 | mips_type = MIPS_R_JMPADDR; | |
838 | break; | |
839 | case BFD_RELOC_HI16_S: | |
840 | mips_type = MIPS_R_REFHI; | |
841 | break; | |
842 | case BFD_RELOC_LO16: | |
843 | mips_type = MIPS_R_REFLO; | |
844 | break; | |
845 | case BFD_RELOC_MIPS_GPREL: | |
846 | mips_type = MIPS_R_GPREL; | |
847 | break; | |
4991ebb9 ILT |
848 | case BFD_RELOC_MIPS_LITERAL: |
849 | mips_type = MIPS_R_LITERAL; | |
850 | break; | |
a3a33af3 ILT |
851 | case BFD_RELOC_16_PCREL_S2: |
852 | mips_type = MIPS_R_PCREL16; | |
853 | break; | |
dabf906e ILT |
854 | case BFD_RELOC_GPREL32: |
855 | mips_type = MIPS_R_SWITCH; | |
856 | break; | |
23f44e6f ILT |
857 | default: |
858 | return (CONST struct reloc_howto_struct *) NULL; | |
859 | } | |
860 | ||
861 | return &mips_howto_table[mips_type]; | |
862 | } | |
c3fe0c41 | 863 | \f |
4991ebb9 ILT |
864 | /* A helper routine for mips_relocate_section which handles the REFHI |
865 | relocation. The REFHI relocation must be followed by a REFLO | |
866 | relocation, and the addend used is formed from the addends of both | |
867 | instructions. */ | |
de17306e | 868 | |
4991ebb9 ILT |
869 | static void |
870 | mips_relocate_refhi (refhi, reflo, input_bfd, input_section, contents, | |
a3a33af3 | 871 | adjust, relocation) |
4991ebb9 ILT |
872 | struct internal_reloc *refhi; |
873 | struct internal_reloc *reflo; | |
874 | bfd *input_bfd; | |
875 | asection *input_section; | |
876 | bfd_byte *contents; | |
a3a33af3 | 877 | size_t adjust; |
4991ebb9 | 878 | bfd_vma relocation; |
de17306e | 879 | { |
4991ebb9 ILT |
880 | unsigned long insn; |
881 | unsigned long val; | |
882 | unsigned long vallo; | |
883 | ||
884 | insn = bfd_get_32 (input_bfd, | |
a3a33af3 | 885 | contents + adjust + refhi->r_vaddr - input_section->vma); |
4991ebb9 | 886 | vallo = (bfd_get_32 (input_bfd, |
a3a33af3 | 887 | contents + adjust + reflo->r_vaddr - input_section->vma) |
4991ebb9 ILT |
888 | & 0xffff); |
889 | val = ((insn & 0xffff) << 16) + vallo; | |
890 | val += relocation; | |
891 | ||
892 | /* The low order 16 bits are always treated as a signed value. | |
893 | Therefore, a negative value in the low order bits requires an | |
894 | adjustment in the high order bits. We need to make this | |
895 | adjustment in two ways: once for the bits we took from the data, | |
896 | and once for the bits we are putting back in to the data. */ | |
897 | if ((vallo & 0x8000) != 0) | |
898 | val -= 0x10000; | |
899 | if ((val & 0x8000) != 0) | |
900 | val += 0x10000; | |
de17306e | 901 | |
4991ebb9 ILT |
902 | insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); |
903 | bfd_put_32 (input_bfd, (bfd_vma) insn, | |
a3a33af3 | 904 | contents + adjust + refhi->r_vaddr - input_section->vma); |
4991ebb9 | 905 | } |
de17306e | 906 | |
4991ebb9 | 907 | /* Relocate a section while linking a MIPS ECOFF file. */ |
de17306e | 908 | |
4991ebb9 ILT |
909 | static boolean |
910 | mips_relocate_section (output_bfd, info, input_bfd, input_section, | |
911 | contents, external_relocs) | |
912 | bfd *output_bfd; | |
913 | struct bfd_link_info *info; | |
914 | bfd *input_bfd; | |
915 | asection *input_section; | |
916 | bfd_byte *contents; | |
917 | PTR external_relocs; | |
918 | { | |
919 | asection **symndx_to_section; | |
920 | struct ecoff_link_hash_entry **sym_hashes; | |
921 | bfd_vma gp; | |
922 | boolean gp_undefined; | |
a3a33af3 ILT |
923 | size_t adjust; |
924 | long *offsets; | |
4991ebb9 ILT |
925 | struct external_reloc *ext_rel; |
926 | struct external_reloc *ext_rel_end; | |
a3a33af3 | 927 | unsigned int i; |
4991ebb9 | 928 | boolean got_reflo; |
a3a33af3 | 929 | struct internal_reloc reflo_int_rel; |
4991ebb9 ILT |
930 | |
931 | BFD_ASSERT (input_bfd->xvec->header_byteorder_big_p | |
932 | == output_bfd->xvec->header_byteorder_big_p); | |
933 | ||
934 | /* We keep a table mapping the symndx found in an internal reloc to | |
935 | the appropriate section. This is faster than looking up the | |
936 | section by name each time. */ | |
937 | symndx_to_section = ecoff_data (input_bfd)->symndx_to_section; | |
938 | if (symndx_to_section == (asection **) NULL) | |
939 | { | |
940 | symndx_to_section = ((asection **) | |
941 | bfd_alloc (input_bfd, | |
942 | (NUM_RELOC_SECTIONS | |
943 | * sizeof (asection *)))); | |
9783e04a DM |
944 | if (!symndx_to_section) |
945 | { | |
f1cca647 | 946 | bfd_set_error (bfd_error_no_memory); |
9783e04a DM |
947 | return false; |
948 | } | |
4991ebb9 ILT |
949 | |
950 | symndx_to_section[RELOC_SECTION_NONE] = NULL; | |
951 | symndx_to_section[RELOC_SECTION_TEXT] = | |
952 | bfd_get_section_by_name (input_bfd, ".text"); | |
953 | symndx_to_section[RELOC_SECTION_RDATA] = | |
954 | bfd_get_section_by_name (input_bfd, ".rdata"); | |
955 | symndx_to_section[RELOC_SECTION_DATA] = | |
956 | bfd_get_section_by_name (input_bfd, ".data"); | |
957 | symndx_to_section[RELOC_SECTION_SDATA] = | |
958 | bfd_get_section_by_name (input_bfd, ".sdata"); | |
959 | symndx_to_section[RELOC_SECTION_SBSS] = | |
960 | bfd_get_section_by_name (input_bfd, ".sbss"); | |
961 | symndx_to_section[RELOC_SECTION_BSS] = | |
962 | bfd_get_section_by_name (input_bfd, ".bss"); | |
963 | symndx_to_section[RELOC_SECTION_INIT] = | |
964 | bfd_get_section_by_name (input_bfd, ".init"); | |
965 | symndx_to_section[RELOC_SECTION_LIT8] = | |
966 | bfd_get_section_by_name (input_bfd, ".lit8"); | |
967 | symndx_to_section[RELOC_SECTION_LIT4] = | |
968 | bfd_get_section_by_name (input_bfd, ".lit4"); | |
969 | symndx_to_section[RELOC_SECTION_XDATA] = NULL; | |
970 | symndx_to_section[RELOC_SECTION_PDATA] = NULL; | |
971 | symndx_to_section[RELOC_SECTION_FINI] = | |
972 | bfd_get_section_by_name (input_bfd, ".fini"); | |
973 | symndx_to_section[RELOC_SECTION_LITA] = NULL; | |
974 | symndx_to_section[RELOC_SECTION_ABS] = NULL; | |
975 | ||
976 | ecoff_data (input_bfd)->symndx_to_section = symndx_to_section; | |
977 | } | |
de17306e | 978 | |
4991ebb9 | 979 | sym_hashes = ecoff_data (input_bfd)->sym_hashes; |
de17306e | 980 | |
4991ebb9 ILT |
981 | gp = ecoff_data (output_bfd)->gp; |
982 | if (gp == 0) | |
983 | gp_undefined = true; | |
984 | else | |
985 | gp_undefined = false; | |
de17306e | 986 | |
4991ebb9 | 987 | got_reflo = false; |
de17306e | 988 | |
a3a33af3 ILT |
989 | adjust = 0; |
990 | ||
991 | if (ecoff_section_data (input_bfd, input_section) == NULL) | |
992 | offsets = NULL; | |
993 | else | |
994 | offsets = ecoff_section_data (input_bfd, input_section)->offsets; | |
995 | ||
4991ebb9 ILT |
996 | ext_rel = (struct external_reloc *) external_relocs; |
997 | ext_rel_end = ext_rel + input_section->reloc_count; | |
a3a33af3 | 998 | for (i = 0; ext_rel < ext_rel_end; ext_rel++, i++) |
4991ebb9 ILT |
999 | { |
1000 | struct internal_reloc int_rel; | |
4991ebb9 ILT |
1001 | bfd_vma addend; |
1002 | reloc_howto_type *howto; | |
1003 | struct ecoff_link_hash_entry *h = NULL; | |
1004 | asection *s = NULL; | |
1005 | bfd_vma relocation; | |
1006 | bfd_reloc_status_type r; | |
1007 | ||
1008 | if (! got_reflo) | |
1009 | mips_ecoff_swap_reloc_in (input_bfd, (PTR) ext_rel, &int_rel); | |
1010 | else | |
1011 | { | |
1012 | int_rel = reflo_int_rel; | |
1013 | got_reflo = false; | |
1014 | } | |
de17306e | 1015 | |
4991ebb9 ILT |
1016 | BFD_ASSERT (int_rel.r_type |
1017 | < sizeof mips_howto_table / sizeof mips_howto_table[0]); | |
de17306e | 1018 | |
4991ebb9 ILT |
1019 | /* The REFHI reloc requires special handling. It must be |
1020 | followed by a REFLO reloc, and the addend is formed from both | |
1021 | fields. */ | |
1022 | if (int_rel.r_type == MIPS_R_REFHI) | |
1023 | { | |
1024 | BFD_ASSERT ((ext_rel + 1) < ext_rel_end); | |
1025 | mips_ecoff_swap_reloc_in (input_bfd, (PTR) (ext_rel + 1), | |
1026 | &reflo_int_rel); | |
1027 | BFD_ASSERT (reflo_int_rel.r_type == MIPS_R_REFLO | |
1028 | && int_rel.r_extern == reflo_int_rel.r_extern | |
1029 | && int_rel.r_symndx == reflo_int_rel.r_symndx); | |
1030 | got_reflo = true; | |
1031 | } | |
de17306e | 1032 | |
4991ebb9 | 1033 | howto = &mips_howto_table[int_rel.r_type]; |
de17306e | 1034 | |
dabf906e ILT |
1035 | /* The SWITCH reloc must be handled specially. This reloc is |
1036 | marks the location of a difference between two portions of an | |
1037 | object file. The symbol index does not reference a symbol, | |
1038 | but is actually the offset from the reloc to the subtrahend | |
1039 | of the difference. This reloc is correct in the object file, | |
1040 | and needs no further adjustment, unless we are relaxing. If | |
1041 | we are relaxing, we may have to add in an offset. Since no | |
1042 | symbols are involved in this reloc, we handle it completely | |
1043 | here. */ | |
1044 | if (int_rel.r_type == MIPS_R_SWITCH) | |
1045 | { | |
1046 | if (offsets != NULL | |
1047 | && offsets[i] != 0) | |
1048 | { | |
1049 | r = _bfd_relocate_contents (howto, input_bfd, | |
1050 | (bfd_vma) offsets[i], | |
1051 | (contents | |
1052 | + adjust | |
1053 | + int_rel.r_vaddr | |
1054 | - input_section->vma)); | |
1055 | BFD_ASSERT (r == bfd_reloc_ok); | |
1056 | } | |
1057 | ||
1058 | continue; | |
1059 | } | |
1060 | ||
4991ebb9 ILT |
1061 | if (int_rel.r_extern) |
1062 | { | |
1063 | h = sym_hashes[int_rel.r_symndx]; | |
1064 | /* If h is NULL, that means that there is a reloc against an | |
1065 | external symbol which we thought was just a debugging | |
1066 | symbol. This should not happen. */ | |
1067 | if (h == (struct ecoff_link_hash_entry *) NULL) | |
1068 | abort (); | |
1069 | } | |
1070 | else | |
1071 | { | |
1072 | if (int_rel.r_symndx < 0 || int_rel.r_symndx >= NUM_RELOC_SECTIONS) | |
1073 | s = NULL; | |
1074 | else | |
1075 | s = symndx_to_section[int_rel.r_symndx]; | |
de17306e | 1076 | |
4991ebb9 ILT |
1077 | if (s == (asection *) NULL) |
1078 | abort (); | |
1079 | } | |
de17306e | 1080 | |
4991ebb9 ILT |
1081 | /* The GPREL reloc uses an addend: the difference in the GP |
1082 | values. */ | |
f1cca647 ILT |
1083 | if (int_rel.r_type != MIPS_R_GPREL |
1084 | && int_rel.r_type != MIPS_R_LITERAL) | |
4991ebb9 ILT |
1085 | addend = 0; |
1086 | else | |
de17306e | 1087 | { |
4991ebb9 ILT |
1088 | if (gp_undefined) |
1089 | { | |
1090 | if (! ((*info->callbacks->reloc_dangerous) | |
1091 | (info, "GP relative relocation when GP not defined", | |
1092 | input_bfd, input_section, | |
1093 | int_rel.r_vaddr - input_section->vma))) | |
1094 | return false; | |
1095 | /* Only give the error once per link. */ | |
1096 | ecoff_data (output_bfd)->gp = gp = 4; | |
1097 | gp_undefined = false; | |
1098 | } | |
1099 | if (! int_rel.r_extern) | |
1100 | { | |
1101 | /* This is a relocation against a section. The current | |
1102 | addend in the instruction is the difference between | |
1103 | INPUT_SECTION->vma and the GP value of INPUT_BFD. We | |
1104 | must change this to be the difference between the | |
1105 | final definition (which will end up in RELOCATION) | |
1106 | and the GP value of OUTPUT_BFD (which is in GP). */ | |
1107 | addend = ecoff_data (input_bfd)->gp - gp; | |
1108 | } | |
1109 | else if (! info->relocateable | |
1110 | || h->root.type == bfd_link_hash_defined) | |
1111 | { | |
1112 | /* This is a relocation against an undefined or common | |
1113 | symbol. The current addend in the instruction is | |
1114 | simply the desired offset into the symbol (normally | |
1115 | zero). We are going to change this into a relocation | |
1116 | against a defined symbol, so we want the instruction | |
1117 | to hold the difference between the final definition | |
1118 | of the symbol (which will end up in RELOCATION) and | |
1119 | the GP value of OUTPUT_BFD (which is in GP). */ | |
1120 | addend = - gp; | |
1121 | } | |
1122 | else | |
1123 | { | |
1124 | /* This is a relocation against an undefined or common | |
1125 | symbol. The current addend in the instruction is | |
1126 | simply the desired offset into the symbol (normally | |
1127 | zero). We are generating relocateable output, and we | |
1128 | aren't going to define this symbol, so we just leave | |
1129 | the instruction alone. */ | |
1130 | addend = 0; | |
1131 | } | |
de17306e ILT |
1132 | } |
1133 | ||
a3a33af3 ILT |
1134 | /* If we are relaxing, mips_relax_section may have set |
1135 | offsets[i] to some value. A value of 1 means we must expand | |
1136 | a PC relative branch into a multi-instruction of sequence, | |
1137 | and any other value is an addend. */ | |
1138 | if (offsets != NULL | |
1139 | && offsets[i] != 0) | |
1140 | { | |
1141 | BFD_ASSERT (! info->relocateable); | |
1142 | BFD_ASSERT (int_rel.r_type == MIPS_R_PCREL16); | |
1143 | if (offsets[i] != 1) | |
1144 | { | |
1145 | BFD_ASSERT (! int_rel.r_extern); | |
1146 | addend += offsets[i]; | |
1147 | } | |
1148 | else | |
1149 | { | |
1150 | bfd_byte *here; | |
1151 | ||
1152 | BFD_ASSERT (int_rel.r_extern); | |
1153 | ||
1154 | /* Move the rest of the instructions up. */ | |
1155 | here = (contents | |
1156 | + adjust | |
1157 | + int_rel.r_vaddr | |
1158 | - input_section->vma); | |
1159 | memmove (here + PCREL16_EXPANSION_ADJUSTMENT, here, | |
1160 | (input_section->_raw_size | |
1161 | - (int_rel.r_vaddr - input_section->vma))); | |
1162 | ||
1163 | /* Generate the new instructions. */ | |
1164 | if (! mips_relax_pcrel16 (info, input_bfd, input_section, | |
1165 | h, here, | |
1166 | (input_section->output_section->vma | |
1167 | + input_section->output_offset | |
1168 | + (int_rel.r_vaddr | |
1169 | - input_section->vma) | |
1170 | + adjust))) | |
1171 | return false; | |
1172 | ||
1173 | /* We must adjust everything else up a notch. */ | |
1174 | adjust += PCREL16_EXPANSION_ADJUSTMENT; | |
1175 | ||
1176 | /* mips_relax_pcrel16 handles all the details of this | |
1177 | relocation. */ | |
1178 | continue; | |
1179 | } | |
1180 | } | |
1181 | ||
4991ebb9 ILT |
1182 | if (info->relocateable) |
1183 | { | |
1184 | /* We are generating relocateable output, and must convert | |
1185 | the existing reloc. */ | |
1186 | if (int_rel.r_extern) | |
1187 | { | |
1188 | if (h->root.type == bfd_link_hash_defined) | |
1189 | { | |
4991ebb9 | 1190 | const char *name; |
de17306e | 1191 | |
4991ebb9 ILT |
1192 | /* This symbol is defined in the output. Convert |
1193 | the reloc from being against the symbol to being | |
1194 | against the section. */ | |
de17306e | 1195 | |
4991ebb9 ILT |
1196 | /* Clear the r_extern bit. */ |
1197 | int_rel.r_extern = 0; | |
de17306e | 1198 | |
4991ebb9 | 1199 | /* Compute a new r_symndx value. */ |
a3a33af3 | 1200 | s = h->root.u.def.section; |
4991ebb9 | 1201 | name = bfd_get_section_name (output_bfd, |
a3a33af3 | 1202 | s->output_section); |
de17306e | 1203 | |
4991ebb9 ILT |
1204 | int_rel.r_symndx = -1; |
1205 | switch (name[1]) | |
1206 | { | |
1207 | case 'b': | |
1208 | if (strcmp (name, ".bss") == 0) | |
1209 | int_rel.r_symndx = RELOC_SECTION_BSS; | |
1210 | break; | |
1211 | case 'd': | |
1212 | if (strcmp (name, ".data") == 0) | |
1213 | int_rel.r_symndx = RELOC_SECTION_DATA; | |
1214 | break; | |
1215 | case 'f': | |
1216 | if (strcmp (name, ".fini") == 0) | |
1217 | int_rel.r_symndx = RELOC_SECTION_FINI; | |
1218 | break; | |
1219 | case 'i': | |
1220 | if (strcmp (name, ".init") == 0) | |
1221 | int_rel.r_symndx = RELOC_SECTION_INIT; | |
1222 | break; | |
1223 | case 'l': | |
1224 | if (strcmp (name, ".lit8") == 0) | |
1225 | int_rel.r_symndx = RELOC_SECTION_LIT8; | |
1226 | else if (strcmp (name, ".lit4") == 0) | |
1227 | int_rel.r_symndx = RELOC_SECTION_LIT4; | |
1228 | break; | |
1229 | case 'r': | |
1230 | if (strcmp (name, ".rdata") == 0) | |
1231 | int_rel.r_symndx = RELOC_SECTION_RDATA; | |
1232 | break; | |
1233 | case 's': | |
1234 | if (strcmp (name, ".sdata") == 0) | |
1235 | int_rel.r_symndx = RELOC_SECTION_SDATA; | |
1236 | else if (strcmp (name, ".sbss") == 0) | |
1237 | int_rel.r_symndx = RELOC_SECTION_SBSS; | |
1238 | break; | |
1239 | case 't': | |
1240 | if (strcmp (name, ".text") == 0) | |
1241 | int_rel.r_symndx = RELOC_SECTION_TEXT; | |
1242 | break; | |
1243 | } | |
1244 | ||
1245 | if (int_rel.r_symndx == -1) | |
1246 | abort (); | |
1247 | ||
1248 | /* Add the section VMA and the symbol value. */ | |
1249 | relocation = (h->root.u.def.value | |
a3a33af3 ILT |
1250 | + s->output_section->vma |
1251 | + s->output_offset); | |
1252 | ||
1253 | /* For a PC relative relocation, the object file | |
1254 | currently holds just the addend. We must adjust | |
1255 | by the address to get the right value. */ | |
1256 | if (howto->pc_relative) | |
1257 | relocation -= int_rel.r_vaddr - input_section->vma; | |
1258 | ||
1259 | h = NULL; | |
4991ebb9 ILT |
1260 | } |
1261 | else | |
1262 | { | |
1263 | /* Change the symndx value to the right one for the | |
1264 | output BFD. */ | |
1265 | int_rel.r_symndx = h->indx; | |
1266 | if (int_rel.r_symndx == -1) | |
1267 | { | |
1268 | /* This symbol is not being written out. */ | |
1269 | if (! ((*info->callbacks->unattached_reloc) | |
1270 | (info, h->root.root.string, input_bfd, | |
1271 | input_section, | |
1272 | int_rel.r_vaddr - input_section->vma))) | |
1273 | return false; | |
1274 | int_rel.r_symndx = 0; | |
1275 | } | |
1276 | relocation = 0; | |
1277 | } | |
1278 | } | |
1279 | else | |
1280 | { | |
1281 | /* This is a relocation against a section. Adjust the | |
1282 | value by the amount the section moved. */ | |
1283 | relocation = (s->output_section->vma | |
1284 | + s->output_offset | |
1285 | - s->vma); | |
1286 | } | |
de17306e | 1287 | |
4991ebb9 | 1288 | relocation += addend; |
de17306e | 1289 | |
a3a33af3 ILT |
1290 | /* Adjust a PC relative relocation by removing the reference |
1291 | to the original address in the section and including the | |
1292 | reference to the new address. */ | |
1293 | if (howto->pc_relative) | |
1294 | relocation -= (input_section->output_section->vma | |
1295 | + input_section->output_offset | |
1296 | - input_section->vma); | |
1297 | ||
4991ebb9 ILT |
1298 | /* Adjust the contents. */ |
1299 | if (relocation == 0) | |
1300 | r = bfd_reloc_ok; | |
1301 | else | |
1302 | { | |
1303 | if (int_rel.r_type != MIPS_R_REFHI) | |
1304 | r = _bfd_relocate_contents (howto, input_bfd, relocation, | |
1305 | (contents | |
a3a33af3 | 1306 | + adjust |
4991ebb9 ILT |
1307 | + int_rel.r_vaddr |
1308 | - input_section->vma)); | |
1309 | else | |
1310 | { | |
1311 | mips_relocate_refhi (&int_rel, &reflo_int_rel, | |
1312 | input_bfd, input_section, contents, | |
a3a33af3 | 1313 | adjust, relocation); |
4991ebb9 ILT |
1314 | r = bfd_reloc_ok; |
1315 | } | |
1316 | } | |
de17306e | 1317 | |
4991ebb9 ILT |
1318 | /* Adjust the reloc address. */ |
1319 | int_rel.r_vaddr += (input_section->output_section->vma | |
1320 | + input_section->output_offset | |
1321 | - input_section->vma); | |
de17306e | 1322 | |
4991ebb9 ILT |
1323 | /* Save the changed reloc information. */ |
1324 | mips_ecoff_swap_reloc_out (input_bfd, &int_rel, (PTR) ext_rel); | |
1325 | } | |
1326 | else | |
1327 | { | |
1328 | /* We are producing a final executable. */ | |
1329 | if (int_rel.r_extern) | |
1330 | { | |
1331 | /* This is a reloc against a symbol. */ | |
1332 | if (h->root.type == bfd_link_hash_defined) | |
1333 | { | |
1334 | asection *hsec; | |
de17306e | 1335 | |
4991ebb9 ILT |
1336 | hsec = h->root.u.def.section; |
1337 | relocation = (h->root.u.def.value | |
1338 | + hsec->output_section->vma | |
1339 | + hsec->output_offset); | |
1340 | } | |
1341 | else | |
1342 | { | |
1343 | if (! ((*info->callbacks->undefined_symbol) | |
1344 | (info, h->root.root.string, input_bfd, | |
1345 | input_section, | |
1346 | int_rel.r_vaddr - input_section->vma))) | |
1347 | return false; | |
1348 | relocation = 0; | |
1349 | } | |
1350 | } | |
1351 | else | |
1352 | { | |
1353 | /* This is a reloc against a section. */ | |
1354 | relocation = (s->output_section->vma | |
1355 | + s->output_offset | |
1356 | - s->vma); | |
1357 | ||
a3a33af3 ILT |
1358 | /* A PC relative reloc is already correct in the object |
1359 | file. Make it look like a pcrel_offset relocation by | |
1360 | adding in the start address. */ | |
4991ebb9 | 1361 | if (howto->pc_relative) |
a3a33af3 | 1362 | relocation += int_rel.r_vaddr + adjust; |
4991ebb9 | 1363 | } |
de17306e | 1364 | |
4991ebb9 ILT |
1365 | if (int_rel.r_type != MIPS_R_REFHI) |
1366 | r = _bfd_final_link_relocate (howto, | |
1367 | input_bfd, | |
1368 | input_section, | |
1369 | contents, | |
a3a33af3 ILT |
1370 | (int_rel.r_vaddr |
1371 | - input_section->vma | |
1372 | + adjust), | |
4991ebb9 ILT |
1373 | relocation, |
1374 | addend); | |
1375 | else | |
1376 | { | |
1377 | mips_relocate_refhi (&int_rel, &reflo_int_rel, input_bfd, | |
a3a33af3 ILT |
1378 | input_section, contents, adjust, |
1379 | relocation); | |
4991ebb9 ILT |
1380 | r = bfd_reloc_ok; |
1381 | } | |
1382 | } | |
1383 | ||
1384 | if (r != bfd_reloc_ok) | |
1385 | { | |
1386 | switch (r) | |
1387 | { | |
1388 | default: | |
1389 | case bfd_reloc_outofrange: | |
1390 | abort (); | |
1391 | case bfd_reloc_overflow: | |
1392 | { | |
1393 | const char *name; | |
1394 | ||
1395 | if (int_rel.r_extern) | |
1396 | name = h->root.root.string; | |
1397 | else | |
1398 | name = bfd_section_name (input_bfd, s); | |
1399 | if (! ((*info->callbacks->reloc_overflow) | |
1400 | (info, name, howto->name, (bfd_vma) 0, | |
1401 | input_bfd, input_section, | |
1402 | int_rel.r_vaddr - input_section->vma))) | |
1403 | return false; | |
1404 | } | |
1405 | break; | |
1406 | } | |
1407 | } | |
1408 | } | |
1409 | ||
1410 | return true; | |
de17306e | 1411 | } |
de17306e | 1412 | \f |
a3a33af3 ILT |
1413 | /* Relax a section when linking a MIPS ECOFF file. This is used for |
1414 | embedded PIC code, which always uses PC relative branches which | |
1415 | only have an 18 bit range on MIPS. If a branch is not in range, we | |
1416 | generate a long instruction sequence to compensate. Each time we | |
1417 | find a branch to expand, we have to check all the others again to | |
1418 | make sure they are still in range. This is slow, but it only has | |
1419 | to be done when -relax is passed to the linker. | |
1420 | ||
1421 | This routine figures out which branches need to expand; the actual | |
1422 | expansion is done in mips_relocate_section when the section | |
1423 | contents are relocated. The information is stored in the offsets | |
1424 | field of the ecoff_section_tdata structure. An offset of 1 means | |
1425 | that the branch must be expanded into a multi-instruction PC | |
1426 | relative branch (such an offset will only occur for a PC relative | |
1427 | branch to an external symbol). Any other offset must be a multiple | |
1428 | of four, and is the amount to change the branch by (such an offset | |
1429 | will only occur for a PC relative branch within the same section). | |
1430 | ||
1431 | We do not modify the section relocs or contents themselves so that | |
1432 | if memory usage becomes an issue we can discard them and read them | |
1433 | again. The only information we must save in memory between this | |
1434 | routine and the mips_relocate_section routine is the table of | |
1435 | offsets. */ | |
1436 | ||
1437 | static boolean | |
1438 | mips_relax_section (abfd, sec, info, again) | |
1439 | bfd *abfd; | |
1440 | asection *sec; | |
1441 | struct bfd_link_info *info; | |
1442 | boolean *again; | |
1443 | { | |
1444 | struct ecoff_section_tdata *section_tdata; | |
1445 | bfd_byte *contents = NULL; | |
1446 | long *offsets; | |
1447 | struct external_reloc *ext_rel; | |
1448 | struct external_reloc *ext_rel_end; | |
1449 | unsigned int i; | |
1450 | ||
1451 | /* Assume we are not going to need another pass. */ | |
1452 | *again = false; | |
1453 | ||
1454 | /* If we are not generating an ECOFF file, this is much too | |
1455 | confusing to deal with. */ | |
1456 | if (info->hash->creator->flavour != bfd_get_flavour (abfd)) | |
1457 | return true; | |
1458 | ||
1459 | /* If there are no relocs, there is nothing to do. */ | |
1460 | if (sec->reloc_count == 0) | |
1461 | return true; | |
1462 | ||
1463 | /* We are only interested in PC relative relocs, and why would there | |
1464 | ever be one from anything but the .text section? */ | |
1465 | if (strcmp (bfd_get_section_name (abfd, sec), ".text") != 0) | |
1466 | return true; | |
1467 | ||
1468 | /* Read in the relocs, if we haven't already got them. */ | |
1469 | section_tdata = ecoff_section_data (abfd, sec); | |
1470 | if (section_tdata == (struct ecoff_section_tdata *) NULL) | |
1471 | { | |
1472 | bfd_size_type external_reloc_size; | |
1473 | bfd_size_type external_relocs_size; | |
1474 | ||
1475 | sec->used_by_bfd = | |
1476 | (PTR) bfd_alloc_by_size_t (abfd, sizeof (struct ecoff_section_tdata)); | |
1477 | if (sec->used_by_bfd == NULL) | |
1478 | { | |
1479 | bfd_set_error (bfd_error_no_memory); | |
1480 | goto error_return; | |
1481 | } | |
1482 | ||
1483 | section_tdata = ecoff_section_data (abfd, sec); | |
1484 | section_tdata->contents = NULL; | |
1485 | section_tdata->offsets = NULL; | |
1486 | ||
1487 | external_reloc_size = ecoff_backend (abfd)->external_reloc_size; | |
1488 | external_relocs_size = external_reloc_size * sec->reloc_count; | |
1489 | ||
1490 | section_tdata->external_relocs = | |
1491 | (PTR) bfd_alloc (abfd, external_relocs_size); | |
1492 | if (section_tdata->external_relocs == NULL && external_relocs_size != 0) | |
1493 | { | |
1494 | bfd_set_error (bfd_error_no_memory); | |
1495 | goto error_return; | |
1496 | } | |
1497 | ||
1498 | if (bfd_seek (abfd, sec->rel_filepos, SEEK_SET) != 0 | |
1499 | || (bfd_read (section_tdata->external_relocs, 1, | |
1500 | external_relocs_size, abfd) | |
1501 | != external_relocs_size)) | |
1502 | goto error_return; | |
1503 | ||
1504 | /* We must initialize _cooked_size only the first time we are | |
1505 | called. */ | |
1506 | sec->_cooked_size = sec->_raw_size; | |
1507 | } | |
1508 | ||
1509 | contents = section_tdata->contents; | |
1510 | offsets = section_tdata->offsets; | |
1511 | ||
1512 | /* Look for any external PC relative relocs. Internal PC relative | |
1513 | relocs are already correct in the object file, so they certainly | |
1514 | can not overflow. */ | |
1515 | ext_rel = (struct external_reloc *) section_tdata->external_relocs; | |
1516 | ext_rel_end = ext_rel + sec->reloc_count; | |
1517 | for (i = 0; ext_rel < ext_rel_end; ext_rel++, i++) | |
1518 | { | |
1519 | struct internal_reloc int_rel; | |
1520 | struct ecoff_link_hash_entry *h; | |
1521 | asection *hsec; | |
1522 | bfd_signed_vma relocation; | |
1523 | struct external_reloc *adj_ext_rel; | |
1524 | unsigned int adj_i; | |
1525 | unsigned long ext_count; | |
1526 | struct ecoff_link_hash_entry **adj_h_ptr; | |
1527 | struct ecoff_link_hash_entry **adj_h_ptr_end; | |
1528 | struct ecoff_value_adjust *adjust; | |
1529 | ||
1530 | /* If we have already expanded this reloc, we certainly don't | |
1531 | need to do it again. */ | |
1532 | if (offsets != (long *) NULL && offsets[i] == 1) | |
1533 | continue; | |
1534 | ||
1535 | /* Quickly check that this reloc is external PCREL16. */ | |
1536 | if (abfd->xvec->header_byteorder_big_p) | |
1537 | { | |
1538 | if ((ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_BIG) == 0 | |
1539 | || (((ext_rel->r_bits[3] & RELOC_BITS3_TYPE_BIG) | |
1540 | >> RELOC_BITS3_TYPE_SH_BIG) | |
1541 | != MIPS_R_PCREL16)) | |
1542 | continue; | |
1543 | } | |
1544 | else | |
1545 | { | |
1546 | if ((ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_LITTLE) == 0 | |
1547 | || (((ext_rel->r_bits[3] & RELOC_BITS3_TYPE_LITTLE) | |
1548 | >> RELOC_BITS3_TYPE_SH_LITTLE) | |
1549 | != MIPS_R_PCREL16)) | |
1550 | continue; | |
1551 | } | |
1552 | ||
1553 | mips_ecoff_swap_reloc_in (abfd, (PTR) ext_rel, &int_rel); | |
1554 | ||
1555 | h = ecoff_data (abfd)->sym_hashes[int_rel.r_symndx]; | |
1556 | if (h == (struct ecoff_link_hash_entry *) NULL) | |
1557 | abort (); | |
1558 | ||
1559 | if (h->root.type != bfd_link_hash_defined) | |
1560 | { | |
1561 | /* Just ignore undefined symbols. These will presumably | |
1562 | generate an error later in the link. */ | |
1563 | continue; | |
1564 | } | |
1565 | ||
1566 | /* Get the value of the symbol. */ | |
1567 | hsec = h->root.u.def.section; | |
1568 | relocation = (h->root.u.def.value | |
1569 | + hsec->output_section->vma | |
1570 | + hsec->output_offset); | |
1571 | ||
1572 | /* Subtract out the current address. */ | |
1573 | relocation -= (sec->output_section->vma | |
1574 | + sec->output_offset | |
1575 | + (int_rel.r_vaddr - sec->vma)); | |
1576 | ||
1577 | /* The addend is stored in the object file. In the normal case | |
1578 | of ``bal symbol'', the addend will be -4. It will only be | |
1579 | different in the case of ``bal symbol+constant''. To avoid | |
1580 | always reading in the section contents, we don't check the | |
1581 | addend in the object file (we could easily check the contents | |
1582 | if we happen to have already read them in, but I fear that | |
1583 | this could be confusing). This means we will screw up if | |
1584 | there is a branch to a symbol that is in range, but added to | |
1585 | a constant which puts it out of range; in such a case the | |
1586 | link will fail with a reloc overflow error. Since the | |
1587 | compiler will never generate such code, it should be easy | |
1588 | enough to work around it by changing the assembly code in the | |
1589 | source file. */ | |
1590 | relocation -= 4; | |
1591 | ||
1592 | /* Now RELOCATION is the number we want to put in the object | |
1593 | file. See whether it fits. */ | |
1594 | if (relocation >= -0x20000 && relocation < 0x20000) | |
1595 | continue; | |
1596 | ||
1597 | /* Now that we know this reloc needs work, which will rarely | |
1598 | happen, go ahead and grab the section contents. */ | |
1599 | if (contents == (bfd_byte *) NULL) | |
1600 | { | |
1601 | if (info->keep_memory) | |
1602 | contents = (bfd_byte *) bfd_alloc (abfd, sec->_raw_size); | |
1603 | else | |
1604 | contents = (bfd_byte *) malloc (sec->_raw_size); | |
1605 | if (contents == (bfd_byte *) NULL) | |
1606 | { | |
1607 | bfd_set_error (bfd_error_no_memory); | |
1608 | goto error_return; | |
1609 | } | |
1610 | if (! bfd_get_section_contents (abfd, sec, (PTR) contents, | |
1611 | (file_ptr) 0, sec->_raw_size)) | |
1612 | goto error_return; | |
1613 | if (info->keep_memory) | |
1614 | section_tdata->contents = contents; | |
1615 | } | |
1616 | ||
1617 | /* We only support changing the bal instruction. It would be | |
1618 | possible to handle other PC relative branches, but some of | |
1619 | them (the conditional branches) would require a different | |
1620 | length instruction sequence which would complicate both this | |
1621 | routine and mips_relax_pcrel16. It could be written if | |
1622 | somebody felt it were important. Ignoring this reloc will | |
1623 | presumably cause a reloc overflow error later on. */ | |
1624 | if (bfd_get_32 (abfd, contents + int_rel.r_vaddr - sec->vma) | |
1625 | != 0x0411ffff) /* bgezal $0,. == bal . */ | |
1626 | continue; | |
1627 | ||
1628 | /* Bother. We need to expand this reloc, and we will need to | |
1629 | make another relaxation pass since this change may put other | |
1630 | relocs out of range. We need to examine the local branches | |
1631 | and we need to allocate memory to hold the offsets we must | |
1632 | add to them. We also need to adjust the values of all | |
1633 | symbols in the object file following this location. */ | |
1634 | ||
1635 | sec->_cooked_size += PCREL16_EXPANSION_ADJUSTMENT; | |
1636 | *again = true; | |
1637 | ||
1638 | if (offsets == (long *) NULL) | |
1639 | { | |
1640 | size_t size; | |
1641 | ||
1642 | size = sec->reloc_count * sizeof (long); | |
1643 | offsets = (long *) bfd_alloc_by_size_t (abfd, size); | |
1644 | if (offsets == (long *) NULL) | |
1645 | { | |
1646 | bfd_set_error (bfd_error_no_memory); | |
1647 | goto error_return; | |
1648 | } | |
1649 | memset (offsets, 0, size); | |
1650 | section_tdata->offsets = offsets; | |
1651 | } | |
1652 | ||
1653 | offsets[i] = 1; | |
1654 | ||
dabf906e ILT |
1655 | /* Now look for all PC relative branches or switch table entries |
1656 | that cross this reloc and adjust their offsets. We will turn | |
1657 | the single branch instruction into a four instruction | |
1658 | sequence. In this loop we are only interested in local PC | |
1659 | relative branches. */ | |
a3a33af3 ILT |
1660 | adj_ext_rel = (struct external_reloc *) section_tdata->external_relocs; |
1661 | for (adj_i = 0; adj_ext_rel < ext_rel_end; adj_ext_rel++, adj_i++) | |
1662 | { | |
dabf906e | 1663 | int r_type; |
a3a33af3 | 1664 | struct internal_reloc adj_int_rel; |
a3a33af3 | 1665 | |
dabf906e ILT |
1666 | /* Quickly check that this reloc is internal PCREL16 or |
1667 | SWITCH. */ | |
a3a33af3 ILT |
1668 | if (abfd->xvec->header_byteorder_big_p) |
1669 | { | |
dabf906e ILT |
1670 | if ((adj_ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_BIG) != 0) |
1671 | continue; | |
1672 | r_type = ((adj_ext_rel->r_bits[3] & RELOC_BITS3_TYPE_BIG) | |
1673 | >> RELOC_BITS3_TYPE_SH_BIG); | |
1674 | if (r_type != MIPS_R_PCREL16 | |
1675 | && r_type != MIPS_R_SWITCH) | |
a3a33af3 ILT |
1676 | continue; |
1677 | } | |
1678 | else | |
1679 | { | |
dabf906e ILT |
1680 | if ((adj_ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_LITTLE) != 0) |
1681 | continue; | |
1682 | r_type = ((adj_ext_rel->r_bits[3] & RELOC_BITS3_TYPE_LITTLE) | |
1683 | >> RELOC_BITS3_TYPE_SH_LITTLE); | |
1684 | if (r_type != MIPS_R_PCREL16 | |
1685 | && r_type != MIPS_R_SWITCH) | |
a3a33af3 ILT |
1686 | continue; |
1687 | } | |
1688 | ||
1689 | mips_ecoff_swap_reloc_in (abfd, (PTR) adj_ext_rel, &adj_int_rel); | |
1690 | ||
dabf906e ILT |
1691 | if (r_type == MIPS_R_PCREL16) |
1692 | { | |
1693 | unsigned long insn; | |
1694 | bfd_vma dst; | |
1695 | ||
1696 | /* We are only interested in a PC relative reloc within | |
1697 | this section. FIXME: Cross section PC relative | |
1698 | relocs may not be handled correctly; does anybody | |
1699 | care? */ | |
1700 | if (adj_int_rel.r_symndx != RELOC_SECTION_TEXT) | |
1701 | continue; | |
a3a33af3 | 1702 | |
dabf906e ILT |
1703 | /* Fetch the branch instruction. */ |
1704 | insn = bfd_get_32 (abfd, | |
1705 | contents + adj_int_rel.r_vaddr - sec->vma); | |
1706 | ||
1707 | /* Work out the destination address. */ | |
1708 | dst = (insn & 0xffff) << 2; | |
1709 | if ((dst & 0x20000) != 0) | |
1710 | dst -= 0x40000; | |
1711 | dst += adj_int_rel.r_vaddr + 4; | |
1712 | ||
1713 | /* If this branch crosses the branch we just decided to | |
1714 | expand, adjust the offset appropriately. */ | |
1715 | if (adj_int_rel.r_vaddr <= int_rel.r_vaddr | |
1716 | && dst > int_rel.r_vaddr) | |
1717 | offsets[adj_i] += PCREL16_EXPANSION_ADJUSTMENT; | |
1718 | else if (adj_int_rel.r_vaddr > int_rel.r_vaddr | |
1719 | && dst <= int_rel.r_vaddr) | |
1720 | offsets[adj_i] -= PCREL16_EXPANSION_ADJUSTMENT; | |
1721 | } | |
1722 | else | |
1723 | { | |
1724 | bfd_vma start, stop; | |
1725 | ||
1726 | /* A MIPS_R_SWITCH reloc represents a word of the form | |
1727 | .word $L3-$LS12 | |
1728 | The value in the object file is correct, assuming the | |
1729 | original value of $L3. The symndx value is actually | |
1730 | the difference between the reloc address and $LS12. | |
1731 | This lets us compute the original value of $LS12 as | |
1732 | vaddr - symndx | |
1733 | and the original value of $L3 as | |
1734 | vaddr - symndx + addend | |
1735 | where addend is the value from the object file. At | |
1736 | this point, the symndx value is actually found in the | |
1737 | r_offset field, since it was moved by | |
1738 | mips_ecoff_swap_reloc_in. */ | |
1739 | ||
1740 | start = adj_int_rel.r_vaddr - adj_int_rel.r_offset; | |
1741 | stop = start + bfd_get_32 (abfd, | |
1742 | (contents | |
1743 | + adj_int_rel.r_vaddr | |
1744 | - sec->vma)); | |
1745 | ||
1746 | /* The value we want in the object file is stop - start. | |
1747 | If the expanded branch lies between start and stop, | |
1748 | we must adjust the offset. */ | |
1749 | if (start <= int_rel.r_vaddr && stop > int_rel.r_vaddr) | |
1750 | offsets[adj_i] += PCREL16_EXPANSION_ADJUSTMENT; | |
1751 | else if (start > int_rel.r_vaddr && stop <= int_rel.r_vaddr) | |
1752 | offsets[adj_i] -= PCREL16_EXPANSION_ADJUSTMENT; | |
1753 | } | |
a3a33af3 ILT |
1754 | } |
1755 | ||
1756 | /* Find all symbols in this section defined by this object file | |
1757 | and adjust their values. Note that we decide whether to | |
1758 | adjust the value based on the value stored in the ECOFF EXTR | |
1759 | structure, because the value stored in the hash table may | |
1760 | have been changed by an earlier expanded reloc and thus may | |
1761 | no longer correctly indicate whether the symbol is before or | |
1762 | after the expanded reloc. */ | |
1763 | ext_count = ecoff_data (abfd)->debug_info.symbolic_header.iextMax; | |
1764 | adj_h_ptr = ecoff_data (abfd)->sym_hashes; | |
1765 | adj_h_ptr_end = adj_h_ptr + ext_count; | |
1766 | for (; adj_h_ptr < adj_h_ptr_end; adj_h_ptr++) | |
1767 | { | |
1768 | struct ecoff_link_hash_entry *adj_h; | |
1769 | ||
1770 | adj_h = *adj_h_ptr; | |
1771 | if (adj_h != (struct ecoff_link_hash_entry *) NULL | |
1772 | && adj_h->root.type == bfd_link_hash_defined | |
1773 | && adj_h->root.u.def.section == sec | |
1774 | && adj_h->esym.asym.value > int_rel.r_vaddr) | |
1775 | adj_h->root.u.def.value += PCREL16_EXPANSION_ADJUSTMENT; | |
1776 | } | |
1777 | ||
1778 | /* Add an entry to the symbol value adjust list. This is used | |
1779 | by bfd_ecoff_debug_accumulate to adjust the values of | |
1780 | internal symbols and FDR's. */ | |
1781 | adjust = ((struct ecoff_value_adjust *) | |
1782 | bfd_alloc (abfd, sizeof (struct ecoff_value_adjust))); | |
1783 | if (adjust == (struct ecoff_value_adjust *) NULL) | |
1784 | { | |
1785 | bfd_set_error (bfd_error_no_memory); | |
1786 | goto error_return; | |
1787 | } | |
1788 | ||
1789 | adjust->start = int_rel.r_vaddr; | |
1790 | adjust->end = sec->vma + sec->_raw_size; | |
1791 | adjust->adjust = PCREL16_EXPANSION_ADJUSTMENT; | |
1792 | ||
1793 | adjust->next = ecoff_data (abfd)->debug_info.adjust; | |
1794 | ecoff_data (abfd)->debug_info.adjust = adjust; | |
1795 | } | |
1796 | ||
1797 | if (contents != (bfd_byte *) NULL && ! info->keep_memory) | |
1798 | free (contents); | |
1799 | ||
1800 | return true; | |
1801 | ||
1802 | error_return: | |
1803 | if (contents != (bfd_byte *) NULL && ! info->keep_memory) | |
1804 | free (contents); | |
1805 | return false; | |
1806 | } | |
1807 | ||
1808 | /* This routine is called from mips_relocate_section when a PC | |
1809 | relative reloc must be expanded into the five instruction sequence. | |
1810 | It handles all the details of the expansion, including resolving | |
1811 | the reloc. */ | |
1812 | ||
1813 | static boolean | |
1814 | mips_relax_pcrel16 (info, input_bfd, input_section, h, location, address) | |
1815 | struct bfd_link_info *info; | |
1816 | bfd *input_bfd; | |
1817 | asection *input_section; | |
1818 | struct ecoff_link_hash_entry *h; | |
1819 | bfd_byte *location; | |
1820 | bfd_vma address; | |
1821 | { | |
1822 | bfd_vma relocation; | |
1823 | ||
1824 | /* 0x0411ffff is bgezal $0,. == bal . */ | |
1825 | BFD_ASSERT (bfd_get_32 (input_bfd, location) == 0x0411ffff); | |
1826 | ||
1827 | /* We need to compute the distance between the symbol and the | |
1828 | current address plus eight. */ | |
1829 | relocation = (h->root.u.def.value | |
1830 | + h->root.u.def.section->output_section->vma | |
1831 | + h->root.u.def.section->output_offset); | |
1832 | relocation -= address + 8; | |
1833 | ||
1834 | /* If the lower half is negative, increment the upper 16 half. */ | |
1835 | if ((relocation & 0x8000) != 0) | |
1836 | relocation += 0x10000; | |
1837 | ||
1838 | bfd_put_32 (input_bfd, 0x04110001, location); /* bal .+8 */ | |
1839 | bfd_put_32 (input_bfd, | |
1840 | 0x3c010000 | ((relocation >> 16) & 0xffff), /* lui $at,XX */ | |
1841 | location + 4); | |
1842 | bfd_put_32 (input_bfd, | |
1843 | 0x24210000 | (relocation & 0xffff), /* addiu $at,$at,XX */ | |
1844 | location + 8); | |
1845 | bfd_put_32 (input_bfd, 0x003f0821, location + 12); /* addu $at,$at,$ra */ | |
1846 | bfd_put_32 (input_bfd, 0x0020f809, location + 16); /* jalr $at */ | |
1847 | ||
1848 | return true; | |
1849 | } | |
1850 | \f | |
23f44e6f ILT |
1851 | /* This is the ECOFF backend structure. The backend field of the |
1852 | target vector points to this. */ | |
1853 | ||
1854 | static const struct ecoff_backend_data mips_ecoff_backend_data = | |
1855 | { | |
1856 | /* COFF backend structure. */ | |
1857 | { | |
9783e04a | 1858 | (void (*) PARAMS ((bfd *,PTR,int,int,int,int,PTR))) bfd_void, /* aux_in */ |
23f44e6f ILT |
1859 | (void (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* sym_in */ |
1860 | (void (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* lineno_in */ | |
9783e04a | 1861 | (unsigned (*) PARAMS ((bfd *,PTR,int,int,int,int,PTR)))bfd_void,/*aux_out*/ |
23f44e6f ILT |
1862 | (unsigned (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* sym_out */ |
1863 | (unsigned (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* lineno_out */ | |
1864 | (unsigned (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* reloc_out */ | |
1865 | mips_ecoff_swap_filehdr_out, mips_ecoff_swap_aouthdr_out, | |
1866 | mips_ecoff_swap_scnhdr_out, | |
1867 | FILHSZ, AOUTSZ, SCNHSZ, 0, 0, 0, true, | |
1868 | mips_ecoff_swap_filehdr_in, mips_ecoff_swap_aouthdr_in, | |
1869 | mips_ecoff_swap_scnhdr_in, mips_ecoff_bad_format_hook, | |
5fa2aaa2 | 1870 | ecoff_set_arch_mach_hook, ecoff_mkobject_hook, |
23f44e6f ILT |
1871 | ecoff_styp_to_sec_flags, ecoff_make_section_hook, ecoff_set_alignment_hook, |
1872 | ecoff_slurp_symbol_table, NULL, NULL | |
1873 | }, | |
1874 | /* Supported architecture. */ | |
1875 | bfd_arch_mips, | |
23f44e6f ILT |
1876 | /* Initial portion of armap string. */ |
1877 | "__________", | |
23f44e6f ILT |
1878 | /* The page boundary used to align sections in a demand-paged |
1879 | executable file. E.g., 0x1000. */ | |
1880 | 0x1000, | |
5fa2aaa2 ILT |
1881 | /* True if the .rdata section is part of the text segment, as on the |
1882 | Alpha. False if .rdata is part of the data segment, as on the | |
1883 | MIPS. */ | |
1884 | false, | |
23f44e6f ILT |
1885 | /* Bitsize of constructor entries. */ |
1886 | 32, | |
1887 | /* Reloc to use for constructor entries. */ | |
1888 | &mips_howto_table[MIPS_R_REFWORD], | |
4991ebb9 ILT |
1889 | { |
1890 | /* Symbol table magic number. */ | |
1891 | magicSym, | |
1892 | /* Alignment of debugging information. E.g., 4. */ | |
1893 | 4, | |
1894 | /* Sizes of external symbolic information. */ | |
1895 | sizeof (struct hdr_ext), | |
1896 | sizeof (struct dnr_ext), | |
1897 | sizeof (struct pdr_ext), | |
1898 | sizeof (struct sym_ext), | |
1899 | sizeof (struct opt_ext), | |
1900 | sizeof (struct fdr_ext), | |
1901 | sizeof (struct rfd_ext), | |
1902 | sizeof (struct ext_ext), | |
1903 | /* Functions to swap in external symbolic data. */ | |
1904 | ecoff_swap_hdr_in, | |
1905 | ecoff_swap_dnr_in, | |
1906 | ecoff_swap_pdr_in, | |
1907 | ecoff_swap_sym_in, | |
1908 | ecoff_swap_opt_in, | |
1909 | ecoff_swap_fdr_in, | |
1910 | ecoff_swap_rfd_in, | |
1911 | ecoff_swap_ext_in, | |
1912 | /* Functions to swap out external symbolic data. */ | |
1913 | ecoff_swap_hdr_out, | |
1914 | ecoff_swap_dnr_out, | |
1915 | ecoff_swap_pdr_out, | |
1916 | ecoff_swap_sym_out, | |
1917 | ecoff_swap_opt_out, | |
1918 | ecoff_swap_fdr_out, | |
1919 | ecoff_swap_rfd_out, | |
1920 | ecoff_swap_ext_out | |
1921 | }, | |
23f44e6f ILT |
1922 | /* External reloc size. */ |
1923 | RELSZ, | |
1924 | /* Reloc swapping functions. */ | |
1925 | mips_ecoff_swap_reloc_in, | |
1926 | mips_ecoff_swap_reloc_out, | |
1927 | /* Backend reloc tweaking. */ | |
5fa2aaa2 | 1928 | mips_adjust_reloc_in, |
4991ebb9 ILT |
1929 | mips_adjust_reloc_out, |
1930 | /* Relocate section contents while linking. */ | |
1931 | mips_relocate_section | |
515c4292 ILT |
1932 | }; |
1933 | ||
23f44e6f ILT |
1934 | /* Looking up a reloc type is MIPS specific. */ |
1935 | #define ecoff_bfd_reloc_type_lookup mips_bfd_reloc_type_lookup | |
1936 | ||
5fa2aaa2 ILT |
1937 | /* Getting relocated section contents is generic. */ |
1938 | #define ecoff_bfd_get_relocated_section_contents \ | |
1939 | bfd_generic_get_relocated_section_contents | |
1940 | ||
a3a33af3 ILT |
1941 | /* Relaxing sections is MIPS specific. */ |
1942 | #define ecoff_bfd_relax_section mips_relax_section | |
1943 | ||
1327fb29 | 1944 | bfd_target ecoff_little_vec = |
294eaca4 SC |
1945 | { |
1946 | "ecoff-littlemips", /* name */ | |
515c4292 | 1947 | bfd_target_ecoff_flavour, |
294eaca4 SC |
1948 | false, /* data byte order is little */ |
1949 | false, /* header byte order is little */ | |
1950 | ||
1951 | (HAS_RELOC | EXEC_P | /* object flags */ | |
1952 | HAS_LINENO | HAS_DEBUG | | |
4991ebb9 | 1953 | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), |
294eaca4 SC |
1954 | |
1955 | (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* sect | |
1956 | flags */ | |
1957 | 0, /* leading underscore */ | |
de17306e | 1958 | ' ', /* ar_pad_char */ |
294eaca4 | 1959 | 15, /* ar_max_namelen */ |
de17306e | 1960 | 4, /* minimum alignment power */ |
23f44e6f ILT |
1961 | bfd_getl64, bfd_getl_signed_64, bfd_putl64, |
1962 | bfd_getl32, bfd_getl_signed_32, bfd_putl32, | |
1963 | bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ | |
1964 | bfd_getl64, bfd_getl_signed_64, bfd_putl64, | |
1965 | bfd_getl32, bfd_getl_signed_32, bfd_putl32, | |
1966 | bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ | |
294eaca4 | 1967 | |
515c4292 | 1968 | {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ |
c3fe0c41 | 1969 | ecoff_archive_p, _bfd_dummy_target}, |
23f44e6f | 1970 | {bfd_false, ecoff_mkobject, /* bfd_set_format */ |
dae31cf5 | 1971 | _bfd_generic_mkarchive, bfd_false}, |
c3fe0c41 ILT |
1972 | {bfd_false, ecoff_write_object_contents, /* bfd_write_contents */ |
1973 | _bfd_write_archive_contents, bfd_false}, | |
6812b607 ILT |
1974 | |
1975 | BFD_JUMP_TABLE_GENERIC (ecoff), | |
1976 | BFD_JUMP_TABLE_COPY (ecoff), | |
1977 | BFD_JUMP_TABLE_CORE (_bfd_nocore), | |
1978 | BFD_JUMP_TABLE_ARCHIVE (ecoff), | |
1979 | BFD_JUMP_TABLE_SYMBOLS (ecoff), | |
1980 | BFD_JUMP_TABLE_RELOCS (ecoff), | |
1981 | BFD_JUMP_TABLE_WRITE (ecoff), | |
1982 | BFD_JUMP_TABLE_LINK (ecoff), | |
dfc1c006 | 1983 | BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), |
6812b607 | 1984 | |
23f44e6f | 1985 | (PTR) &mips_ecoff_backend_data |
515c4292 | 1986 | }; |
1327fb29 SC |
1987 | |
1988 | bfd_target ecoff_big_vec = | |
294eaca4 SC |
1989 | { |
1990 | "ecoff-bigmips", /* name */ | |
515c4292 | 1991 | bfd_target_ecoff_flavour, |
294eaca4 SC |
1992 | true, /* data byte order is big */ |
1993 | true, /* header byte order is big */ | |
1994 | ||
1995 | (HAS_RELOC | EXEC_P | /* object flags */ | |
1996 | HAS_LINENO | HAS_DEBUG | | |
4991ebb9 | 1997 | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), |
294eaca4 SC |
1998 | |
1999 | (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* sect flags */ | |
2000 | 0, /* leading underscore */ | |
2001 | ' ', /* ar_pad_char */ | |
de17306e ILT |
2002 | 15, /* ar_max_namelen */ |
2003 | 4, /* minimum alignment power */ | |
23f44e6f ILT |
2004 | bfd_getb64, bfd_getb_signed_64, bfd_putb64, |
2005 | bfd_getb32, bfd_getb_signed_32, bfd_putb32, | |
2006 | bfd_getb16, bfd_getb_signed_16, bfd_putb16, | |
2007 | bfd_getb64, bfd_getb_signed_64, bfd_putb64, | |
2008 | bfd_getb32, bfd_getb_signed_32, bfd_putb32, | |
2009 | bfd_getb16, bfd_getb_signed_16, bfd_putb16, | |
294eaca4 | 2010 | {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ |
6812b607 | 2011 | ecoff_archive_p, _bfd_dummy_target}, |
23f44e6f | 2012 | {bfd_false, ecoff_mkobject, /* bfd_set_format */ |
dae31cf5 | 2013 | _bfd_generic_mkarchive, bfd_false}, |
515c4292 | 2014 | {bfd_false, ecoff_write_object_contents, /* bfd_write_contents */ |
c3fe0c41 | 2015 | _bfd_write_archive_contents, bfd_false}, |
6812b607 ILT |
2016 | |
2017 | BFD_JUMP_TABLE_GENERIC (ecoff), | |
2018 | BFD_JUMP_TABLE_COPY (ecoff), | |
2019 | BFD_JUMP_TABLE_CORE (_bfd_nocore), | |
2020 | BFD_JUMP_TABLE_ARCHIVE (ecoff), | |
2021 | BFD_JUMP_TABLE_SYMBOLS (ecoff), | |
2022 | BFD_JUMP_TABLE_RELOCS (ecoff), | |
2023 | BFD_JUMP_TABLE_WRITE (ecoff), | |
2024 | BFD_JUMP_TABLE_LINK (ecoff), | |
dfc1c006 | 2025 | BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), |
6812b607 | 2026 | |
23f44e6f | 2027 | (PTR) &mips_ecoff_backend_data |
515c4292 | 2028 | }; |