Commit | Line | Data |
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252b5132 | 1 | /* BFD PowerPC CPU definition |
82704155 | 2 | Copyright (C) 1994-2019 Free Software Foundation, Inc. |
252b5132 RH |
3 | Contributed by Ian Lance Taylor, Cygnus Support. |
4 | ||
cd123cb7 NC |
5 | This file is part of BFD, the Binary File Descriptor library. |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
20 | MA 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "sysdep.h" |
3db64b00 | 23 | #include "bfd.h" |
252b5132 RH |
24 | #include "libbfd.h" |
25 | ||
26 | /* The common PowerPC architecture is compatible with the RS/6000. */ | |
27 | ||
252b5132 | 28 | static const bfd_arch_info_type * |
2c3fc389 NC |
29 | powerpc_compatible (const bfd_arch_info_type *a, |
30 | const bfd_arch_info_type *b) | |
252b5132 RH |
31 | { |
32 | BFD_ASSERT (a->arch == bfd_arch_powerpc); | |
33 | switch (b->arch) | |
34 | { | |
35 | default: | |
36 | return NULL; | |
37 | case bfd_arch_powerpc: | |
14b57c7c AM |
38 | if (a->mach == bfd_mach_ppc_vle && b->bits_per_word == 32) |
39 | return a; | |
40 | if (b->mach == bfd_mach_ppc_vle && a->bits_per_word == 32) | |
41 | return b; | |
252b5132 RH |
42 | return bfd_default_compatible (a, b); |
43 | case bfd_arch_rs6000: | |
43dd9340 | 44 | if (b->mach == bfd_mach_rs6k) |
252b5132 RH |
45 | return a; |
46 | return NULL; | |
47 | } | |
48 | /*NOTREACHED*/ | |
49 | } | |
50 | ||
aebcfb76 NC |
51 | #define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \ |
52 | { \ | |
53 | BITS, /* Bits in a word. */ \ | |
54 | BITS, /* Bits in an address. */ \ | |
55 | 8, /* Bits in a byte. */ \ | |
56 | bfd_arch_powerpc, \ | |
57 | NUMBER, \ | |
58 | "powerpc", \ | |
59 | PRINT, \ | |
60 | 3, /* Section alignment power. */ \ | |
61 | DEFAULT, \ | |
62 | powerpc_compatible, \ | |
63 | bfd_default_scan, \ | |
64 | bfd_arch_default_fill, \ | |
65 | NEXT, \ | |
66 | 0 /* Maximum offset of a reloc from the start of an insn. */ \ | |
67 | } | |
68 | ||
899f54f5 | 69 | const bfd_arch_info_type bfd_powerpc_archs[] = |
252b5132 | 70 | { |
feee612b | 71 | #if BFD_DEFAULT_TARGET_SIZE == 64 |
aebcfb76 NC |
72 | /* Default for 64 bit target. */ |
73 | N (64, bfd_mach_ppc64, "powerpc:common64", TRUE, bfd_powerpc_archs + 1), | |
feee612b AM |
74 | /* elf32-ppc:ppc_elf_object_p relies on the default 32 bit arch |
75 | being immediately after the 64 bit default. */ | |
aebcfb76 | 76 | N (32, bfd_mach_ppc, "powerpc:common", FALSE, bfd_powerpc_archs + 2), |
99dc0092 | 77 | #else |
feee612b | 78 | /* Default arch must come first. */ |
aebcfb76 | 79 | N (32, bfd_mach_ppc, "powerpc:common", TRUE, bfd_powerpc_archs + 1), |
feee612b AM |
80 | /* elf64-ppc:ppc64_elf_object_p relies on the default 64 bit arch |
81 | being immediately after the 32 bit default. */ | |
aebcfb76 | 82 | N (64, bfd_mach_ppc64, "powerpc:common64", FALSE, bfd_powerpc_archs + 2), |
99dc0092 | 83 | #endif |
aebcfb76 NC |
84 | N (32, bfd_mach_ppc_603, "powerpc:603", FALSE, bfd_powerpc_archs + 3), |
85 | N (32, bfd_mach_ppc_ec603e, "powerpc:EC603e", FALSE, bfd_powerpc_archs + 4), | |
86 | N (32, bfd_mach_ppc_604, "powerpc:604", FALSE, bfd_powerpc_archs + 5), | |
87 | N (32, bfd_mach_ppc_403, "powerpc:403", FALSE, bfd_powerpc_archs + 6), | |
88 | N (32, bfd_mach_ppc_601, "powerpc:601", FALSE, bfd_powerpc_archs + 7), | |
89 | N (64, bfd_mach_ppc_620, "powerpc:620", FALSE, bfd_powerpc_archs + 8), | |
90 | N (64, bfd_mach_ppc_630, "powerpc:630", FALSE, bfd_powerpc_archs + 9), | |
91 | N (64, bfd_mach_ppc_a35, "powerpc:a35", FALSE, bfd_powerpc_archs + 10), | |
92 | N (64, bfd_mach_ppc_rs64ii, "powerpc:rs64ii", FALSE, bfd_powerpc_archs + 11), | |
93 | N (64, bfd_mach_ppc_rs64iii, "powerpc:rs64iii", FALSE, bfd_powerpc_archs + 12), | |
94 | N (32, bfd_mach_ppc_7400, "powerpc:7400", FALSE, bfd_powerpc_archs + 13), | |
95 | N (32, bfd_mach_ppc_e500, "powerpc:e500", FALSE, bfd_powerpc_archs + 14), | |
96 | N (32, bfd_mach_ppc_e500mc, "powerpc:e500mc", FALSE, bfd_powerpc_archs + 15), | |
97 | N (64, bfd_mach_ppc_e500mc64, "powerpc:e500mc64",FALSE, bfd_powerpc_archs + 16), | |
98 | N (32, bfd_mach_ppc_860, "powerpc:MPC8XX", FALSE, bfd_powerpc_archs + 17), | |
99 | N (32, bfd_mach_ppc_750, "powerpc:750", FALSE, bfd_powerpc_archs + 18), | |
100 | N (32, bfd_mach_ppc_titan, "powerpc:titan", FALSE, bfd_powerpc_archs + 19), | |
101 | ||
252b5132 | 102 | { |
aebcfb76 NC |
103 | 16, /* Bits in a word. */ |
104 | 32, /* Bits in an address. */ | |
105 | 8, /* Bits in a byte. */ | |
b9c361e0 JL |
106 | bfd_arch_powerpc, |
107 | bfd_mach_ppc_vle, | |
108 | "powerpc", | |
109 | "powerpc:vle", | |
110 | 3, | |
aebcfb76 | 111 | FALSE, /* Not the default. */ |
b9c361e0 JL |
112 | powerpc_compatible, |
113 | bfd_default_scan, | |
114 | bfd_arch_default_fill, | |
aebcfb76 NC |
115 | bfd_powerpc_archs + 20, |
116 | 0 /* Maximum offset of a reloc from the start of an insn. */ | |
b9c361e0 | 117 | }, |
aebcfb76 NC |
118 | |
119 | N (64, bfd_mach_ppc_e5500, "powerpc:e5500", FALSE, bfd_powerpc_archs + 21), | |
120 | N (64, bfd_mach_ppc_e6500, "powerpc:e6500", FALSE, NULL) | |
899f54f5 | 121 | }; |