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[deliverable/binutils-gdb.git] / bfd / cpu-sh.c
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ef230218 1/* BFD library support routines for the Renesas / SuperH SH architecture.
4b95cf5c 2 Copyright (C) 1993-2014 Free Software Foundation, Inc.
252b5132
RH
3 Hacked by Steve Chamberlain of Cygnus Support.
4
5177500f 5 This file is part of BFD, the Binary File Descriptor library.
252b5132 6
5177500f
NC
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
5177500f 10 (at your option) any later version.
252b5132 11
5177500f
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
5177500f
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
252b5132 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
252b5132 24#include "libbfd.h"
f6f9408f 25#include "../opcodes/sh-opc.h"
252b5132 26
e38bc3b5
NC
27#define SH_NEXT arch_info_struct + 0
28#define SH2_NEXT arch_info_struct + 1
29#define SH2E_NEXT arch_info_struct + 2
30#define SH_DSP_NEXT arch_info_struct + 3
31#define SH3_NEXT arch_info_struct + 4
32#define SH3_NOMMU_NEXT arch_info_struct + 5
33#define SH3_DSP_NEXT arch_info_struct + 6
34#define SH3E_NEXT arch_info_struct + 7
35#define SH4_NEXT arch_info_struct + 8
36#define SH4A_NEXT arch_info_struct + 9
37#define SH4AL_DSP_NEXT arch_info_struct + 10
38#define SH4_NOFPU_NEXT arch_info_struct + 11
39#define SH4_NOMMU_NOFPU_NEXT arch_info_struct + 12
40#define SH4A_NOFPU_NEXT arch_info_struct + 13
41#define SH2A_NEXT arch_info_struct + 14
42#define SH2A_NOFPU_NEXT arch_info_struct + 15
43#define SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT arch_info_struct + 16
44#define SH2A_NOFPU_OR_SH3_NOMMU_NEXT arch_info_struct + 17
45#define SH2A_OR_SH4_NEXT arch_info_struct + 18
46#define SH2A_OR_SH3E_NEXT arch_info_struct + 19
47#define SH64_NEXT NULL
252b5132 48
71f6b586 49static const bfd_arch_info_type arch_info_struct[] =
252b5132 50{
d4845d57 51 {
e38bc3b5
NC
52 32, /* 32 bits in a word. */
53 32, /* 32 bits in an address. */
54 8, /* 8 bits in a byte. */
d4845d57
JR
55 bfd_arch_sh,
56 bfd_mach_sh2,
e38bc3b5
NC
57 "sh", /* Architecture name. */
58 "sh2", /* Machine name. */
d4845d57 59 1,
e38bc3b5 60 FALSE, /* Not the default. */
d4845d57 61 bfd_default_compatible,
a44d7f9c 62 bfd_default_scan,
b7761f11 63 bfd_arch_default_fill,
d4845d57
JR
64 SH2_NEXT
65 },
5177500f 66 {
e38bc3b5
NC
67 32, /* 32 bits in a word. */
68 32, /* 32 bits in an address. */
69 8, /* 8 bits in a byte. */
5177500f
NC
70 bfd_arch_sh,
71 bfd_mach_sh2e,
e38bc3b5
NC
72 "sh", /* Architecture name. */
73 "sh2e", /* Machine name. */
5177500f 74 1,
e38bc3b5 75 FALSE, /* Not the default. */
5177500f
NC
76 bfd_default_compatible,
77 bfd_default_scan,
b7761f11 78 bfd_arch_default_fill,
5177500f
NC
79 SH2E_NEXT
80 },
d4845d57 81 {
e38bc3b5
NC
82 32, /* 32 bits in a word. */
83 32, /* 32 bits in an address. */
84 8, /* 8 bits in a byte. */
d4845d57
JR
85 bfd_arch_sh,
86 bfd_mach_sh_dsp,
e38bc3b5
NC
87 "sh", /* Architecture name. */
88 "sh-dsp", /* Machine name. */
d4845d57 89 1,
e38bc3b5 90 FALSE, /* Not the default. */
d4845d57 91 bfd_default_compatible,
a44d7f9c 92 bfd_default_scan,
b7761f11 93 bfd_arch_default_fill,
d4845d57
JR
94 SH_DSP_NEXT
95 },
252b5132 96 {
e38bc3b5
NC
97 32, /* 32 bits in a word. */
98 32, /* 32 bits in an address. */
99 8, /* 8 bits in a byte. */
252b5132
RH
100 bfd_arch_sh,
101 bfd_mach_sh3,
e38bc3b5
NC
102 "sh", /* Architecture name. */
103 "sh3", /* Machine name. */
252b5132 104 1,
e38bc3b5 105 FALSE, /* Not the default. */
252b5132 106 bfd_default_compatible,
a44d7f9c 107 bfd_default_scan,
b7761f11 108 bfd_arch_default_fill,
252b5132
RH
109 SH3_NEXT
110 },
f6f9408f 111 {
e38bc3b5
NC
112 32, /* 32 bits in a word. */
113 32, /* 32 bits in an address. */
114 8, /* 8 bits in a byte. */
f6f9408f
JR
115 bfd_arch_sh,
116 bfd_mach_sh3_nommu,
e38bc3b5
NC
117 "sh", /* Architecture name. */
118 "sh3-nommu", /* Machine name. */
f6f9408f 119 1,
e38bc3b5 120 FALSE, /* Not the default. */
f6f9408f
JR
121 bfd_default_compatible,
122 bfd_default_scan,
b7761f11 123 bfd_arch_default_fill,
f6f9408f
JR
124 SH3_NOMMU_NEXT
125 },
d4845d57 126 {
e38bc3b5
NC
127 32, /* 32 bits in a word. */
128 32, /* 32 bits in an address. */
129 8, /* 8 bits in a byte. */
d4845d57
JR
130 bfd_arch_sh,
131 bfd_mach_sh3_dsp,
e38bc3b5
NC
132 "sh", /* Architecture name. */
133 "sh3-dsp", /* Machine name. */
d4845d57 134 1,
e38bc3b5 135 FALSE, /* Not the default. */
d4845d57 136 bfd_default_compatible,
a44d7f9c 137 bfd_default_scan,
b7761f11 138 bfd_arch_default_fill,
d4845d57
JR
139 SH3_DSP_NEXT
140 },
252b5132 141 {
e38bc3b5
NC
142 32, /* 32 bits in a word. */
143 32, /* 32 bits in an address. */
144 8, /* 8 bits in a byte. */
252b5132
RH
145 bfd_arch_sh,
146 bfd_mach_sh3e,
e38bc3b5
NC
147 "sh", /* Architecture name. */
148 "sh3e", /* Machine name. */
252b5132 149 1,
e38bc3b5 150 FALSE, /* Not the default. */
252b5132 151 bfd_default_compatible,
a44d7f9c 152 bfd_default_scan,
b7761f11 153 bfd_arch_default_fill,
252b5132
RH
154 SH3E_NEXT
155 },
d4845d57 156 {
e38bc3b5
NC
157 32, /* 32 bits in a word. */
158 32, /* 32 bits in an address. */
159 8, /* 8 bits in a byte. */
d4845d57
JR
160 bfd_arch_sh,
161 bfd_mach_sh4,
e38bc3b5
NC
162 "sh", /* Architecture name. */
163 "sh4", /* Machine name. */
d4845d57 164 1,
e38bc3b5 165 FALSE, /* Not the default. */
d4845d57 166 bfd_default_compatible,
a44d7f9c 167 bfd_default_scan,
b7761f11 168 bfd_arch_default_fill,
d4845d57
JR
169 SH4_NEXT
170 },
af9ba621 171 {
e38bc3b5
NC
172 32, /* 32 bits in a word. */
173 32, /* 32 bits in an address. */
174 8, /* 8 bits in a byte. */
af9ba621
CV
175 bfd_arch_sh,
176 bfd_mach_sh4a,
e38bc3b5
NC
177 "sh", /* Architecture name. */
178 "sh4a", /* Machine name. */
af9ba621 179 1,
e38bc3b5 180 FALSE, /* Not the default. */
af9ba621
CV
181 bfd_default_compatible,
182 bfd_default_scan,
b7761f11 183 bfd_arch_default_fill,
af9ba621
CV
184 SH4A_NEXT
185 },
186 {
e38bc3b5
NC
187 32, /* 32 bits in a word. */
188 32, /* 32 bits in an address. */
189 8, /* 8 bits in a byte. */
af9ba621
CV
190 bfd_arch_sh,
191 bfd_mach_sh4al_dsp,
e38bc3b5
NC
192 "sh", /* Architecture name. */
193 "sh4al-dsp", /* Machine name. */
af9ba621 194 1,
e38bc3b5 195 FALSE, /* Not the default. */
af9ba621
CV
196 bfd_default_compatible,
197 bfd_default_scan,
b7761f11 198 bfd_arch_default_fill,
af9ba621
CV
199 SH4AL_DSP_NEXT
200 },
201 {
e38bc3b5
NC
202 32, /* 32 bits in a word. */
203 32, /* 32 bits in an address. */
204 8, /* 8 bits in a byte. */
af9ba621
CV
205 bfd_arch_sh,
206 bfd_mach_sh4_nofpu,
e38bc3b5
NC
207 "sh", /* Architecture name. */
208 "sh4-nofpu", /* Machine name. */
af9ba621 209 1,
e38bc3b5 210 FALSE, /* Not the default. */
af9ba621
CV
211 bfd_default_compatible,
212 bfd_default_scan,
b7761f11 213 bfd_arch_default_fill,
af9ba621
CV
214 SH4_NOFPU_NEXT
215 },
ae51a426 216 {
e38bc3b5
NC
217 32, /* 32 bits in a word. */
218 32, /* 32 bits in an address. */
219 8, /* 8 bits in a byte. */
ae51a426
JR
220 bfd_arch_sh,
221 bfd_mach_sh4_nommu_nofpu,
e38bc3b5
NC
222 "sh", /* Architecture name. */
223 "sh4-nommu-nofpu", /* Machine name. */
ae51a426 224 1,
e38bc3b5 225 FALSE, /* Not the default. */
ae51a426
JR
226 bfd_default_compatible,
227 bfd_default_scan,
b7761f11 228 bfd_arch_default_fill,
ae51a426
JR
229 SH4_NOMMU_NOFPU_NEXT
230 },
af9ba621 231 {
e38bc3b5
NC
232 32, /* 32 bits in a word. */
233 32, /* 32 bits in an address. */
234 8, /* 8 bits in a byte. */
af9ba621
CV
235 bfd_arch_sh,
236 bfd_mach_sh4a_nofpu,
e38bc3b5
NC
237 "sh", /* Architecture name. */
238 "sh4a-nofpu", /* Machine name. */
af9ba621 239 1,
e38bc3b5 240 FALSE, /* Not the default. */
af9ba621
CV
241 bfd_default_compatible,
242 bfd_default_scan,
b7761f11 243 bfd_arch_default_fill,
af9ba621
CV
244 SH4A_NOFPU_NEXT
245 },
1d70c7fb
AO
246 {
247 32, /* 32 bits in a word. */
248 32, /* 32 bits in an address. */
249 8, /* 8 bits in a byte. */
250 bfd_arch_sh,
251 bfd_mach_sh2a,
e38bc3b5
NC
252 "sh", /* Architecture name. */
253 "sh2a", /* Machine name. */
1d70c7fb
AO
254 1,
255 FALSE, /* Not the default. */
256 bfd_default_compatible,
257 bfd_default_scan,
b7761f11 258 bfd_arch_default_fill,
1d70c7fb
AO
259 SH2A_NEXT
260 },
261 {
262 32, /* 32 bits in a word. */
263 32, /* 32 bits in an address. */
264 8, /* 8 bits in a byte. */
265 bfd_arch_sh,
266 bfd_mach_sh2a_nofpu,
e38bc3b5
NC
267 "sh", /* Architecture name. */
268 "sh2a-nofpu", /* Machine name. */
1d70c7fb
AO
269 1,
270 FALSE, /* Not the default. */
271 bfd_default_compatible,
272 bfd_default_scan,
b7761f11 273 bfd_arch_default_fill,
1d70c7fb
AO
274 SH2A_NOFPU_NEXT
275 },
fbca6ad9 276 {
e38bc3b5
NC
277 32, /* 32 bits in a word. */
278 32, /* 32 bits in an address. */
279 8, /* 8 bits in a byte. */
280 bfd_arch_sh,
281 bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu,
282 "sh", /* Architecture name. */
283 "sh2a-nofpu-or-sh4-nommu-nofpu", /* Machine name. */
284 1,
285 FALSE, /* Not the default. */
286 bfd_default_compatible,
287 bfd_default_scan,
b7761f11 288 bfd_arch_default_fill,
e38bc3b5
NC
289 SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT
290 },
291 {
292 32, /* 32 bits in a word. */
293 32, /* 32 bits in an address. */
294 8, /* 8 bits in a byte. */
295 bfd_arch_sh,
296 bfd_mach_sh2a_nofpu_or_sh3_nommu,
297 "sh", /* Architecture name. . */
298 "sh2a-nofpu-or-sh3-nommu", /* Machine name. */
299 1,
300 FALSE, /* Not the default. */
301 bfd_default_compatible,
302 bfd_default_scan,
b7761f11 303 bfd_arch_default_fill,
e38bc3b5
NC
304 SH2A_NOFPU_OR_SH3_NOMMU_NEXT
305 },
306 {
307 32, /* 32 bits in a word. */
308 32, /* 32 bits in an address. */
309 8, /* 8 bits in a byte. */
310 bfd_arch_sh,
311 bfd_mach_sh2a_or_sh4,
312 "sh", /* Architecture name. */
313 "sh2a-or-sh4", /* Machine name. */
314 1,
315 FALSE, /* Not the default. */
316 bfd_default_compatible,
317 bfd_default_scan,
b7761f11 318 bfd_arch_default_fill,
e38bc3b5
NC
319 SH2A_OR_SH4_NEXT
320 },
321 {
322 32, /* 32 bits in a word. */
323 32, /* 32 bits in an address. */
324 8, /* 8 bits in a byte. */
325 bfd_arch_sh,
326 bfd_mach_sh2a_or_sh3e,
327 "sh", /* Architecture name. */
328 "sh2a-or-sh3e", /* Machine name. */
329 1,
330 FALSE, /* Not the default. */
331 bfd_default_compatible,
332 bfd_default_scan,
b7761f11 333 bfd_arch_default_fill,
e38bc3b5
NC
334 SH2A_OR_SH3E_NEXT
335 },
336 {
337 64, /* 64 bits in a word. */
338 64, /* 64 bits in an address. */
339 8, /* 8 bits in a byte. */
fbca6ad9
AO
340 bfd_arch_sh,
341 bfd_mach_sh5,
e38bc3b5
NC
342 "sh", /* Architecture name. */
343 "sh5", /* Machine name. */
fbca6ad9 344 1,
e38bc3b5 345 FALSE, /* Not the default. */
fbca6ad9 346 bfd_default_compatible,
a44d7f9c 347 bfd_default_scan,
b7761f11 348 bfd_arch_default_fill,
fbca6ad9
AO
349 SH64_NEXT
350 },
252b5132
RH
351};
352
353const bfd_arch_info_type bfd_sh_arch =
354{
e38bc3b5
NC
355 32, /* 32 bits in a word. */
356 32, /* 32 bits in an address. */
357 8, /* 8 bits in a byte. */
252b5132
RH
358 bfd_arch_sh,
359 bfd_mach_sh,
e38bc3b5
NC
360 "sh", /* Architecture name. */
361 "sh", /* Machine name. */
252b5132 362 1,
e38bc3b5 363 TRUE, /* The default machine. */
252b5132 364 bfd_default_compatible,
a44d7f9c 365 bfd_default_scan,
b7761f11 366 bfd_arch_default_fill,
252b5132
RH
367 SH_NEXT
368};
f6f9408f
JR
369
370
371/* This table defines the mappings from the BFD internal numbering
372 system to the opcodes internal flags system.
373 It is used by the functions defined below.
374 The prototypes for these SH specific functions are found in
375 sh-opc.h . */
376
377static struct { unsigned long bfd_mach, arch, arch_up; } bfd_to_arch_table[] =
378{
e38bc3b5 379 { bfd_mach_sh, arch_sh1, arch_sh_up },
f6f9408f
JR
380 { bfd_mach_sh2, arch_sh2, arch_sh2_up },
381 { bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
382 { bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
1d70c7fb
AO
383 { bfd_mach_sh2a, arch_sh2a, arch_sh2a_up },
384 { bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up },
e38bc3b5
NC
385
386 { bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up },
387 { bfd_mach_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu_up },
388 { bfd_mach_sh2a_or_sh4, arch_sh2a_or_sh4, arch_sh2a_or_sh4_up },
389 { bfd_mach_sh2a_or_sh3e, arch_sh2a_or_sh3e, arch_sh2a_or_sh3e_up },
68ffbac6 390
f6f9408f
JR
391 { bfd_mach_sh3, arch_sh3, arch_sh3_up },
392 { bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
393 { bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
394 { bfd_mach_sh3e, arch_sh3e, arch_sh3e_up },
395 { bfd_mach_sh4, arch_sh4, arch_sh4_up },
396 { bfd_mach_sh4a, arch_sh4a, arch_sh4a_up },
397 { bfd_mach_sh4al_dsp, arch_sh4al_dsp, arch_sh4al_dsp_up },
e38bc3b5 398 { bfd_mach_sh4_nofpu, arch_sh4_nofpu, arch_sh4_nofpu_up },
f6f9408f 399 { bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
e38bc3b5 400 { bfd_mach_sh4a_nofpu, arch_sh4a_nofpu, arch_sh4a_nofpu_up },
f6f9408f
JR
401 { 0, 0, 0 } /* Terminator. */
402};
403
404
405/* Convert a BFD mach number into the right opcodes arch flags
406 using the table above. */
407
408unsigned int
409sh_get_arch_from_bfd_mach (unsigned long mach)
410{
411 int i = 0;
e38bc3b5 412
f6f9408f
JR
413 while (bfd_to_arch_table[i].bfd_mach != 0)
414 if (bfd_to_arch_table[i].bfd_mach == mach)
415 return bfd_to_arch_table[i].arch;
416 else
417 i++;
418
e38bc3b5 419 /* Machine not found. */
f6f9408f
JR
420 BFD_FAIL();
421
422 return SH_ARCH_UNKNOWN_ARCH;
423}
424
425
426/* Convert a BFD mach number into a set of opcodes arch flags
427 describing all the compatible architectures (i.e. arch_up)
428 using the table above. */
429
430unsigned int
431sh_get_arch_up_from_bfd_mach (unsigned long mach)
432{
433 int i = 0;
e38bc3b5 434
f6f9408f
JR
435 while (bfd_to_arch_table[i].bfd_mach != 0)
436 if (bfd_to_arch_table[i].bfd_mach == mach)
437 return bfd_to_arch_table[i].arch_up;
438 else
439 i++;
440
e38bc3b5 441 /* Machine not found. */
f6f9408f
JR
442 BFD_FAIL();
443
444 return SH_ARCH_UNKNOWN_ARCH;
445}
446
447
448/* Convert an arbitary arch_set - not necessarily corresponding
449 directly to anything in the table above - to the most generic
450 architecture which supports all the required features, and
451 return the corresponding BFD mach. */
452
453unsigned long
454sh_get_bfd_mach_from_arch_set (unsigned int arch_set)
455{
456 unsigned long result = 0;
457 unsigned int best = ~arch_set;
458 unsigned int co_mask = ~0;
459 int i = 0;
460
461 /* If arch_set permits variants with no coprocessor then do not allow
462 the other irrelevant co-processor bits to influence the choice:
463 e.g. if dsp is disallowed by arch_set, then the algorithm would
464 prefer fpu variants over nofpu variants because they also disallow
465 dsp - even though the nofpu would be the most correct choice.
466 This assumes that EVERY fpu/dsp variant has a no-coprocessor
467 counter-part, or their non-fpu/dsp instructions do not have the
468 no co-processor bit set. */
469 if (arch_set & arch_sh_no_co)
470 co_mask = ~(arch_sh_sp_fpu | arch_sh_dp_fpu | arch_sh_has_dsp);
471
472 while (bfd_to_arch_table[i].bfd_mach != 0)
473 {
474 unsigned int try = bfd_to_arch_table[i].arch_up & co_mask;
475
476 /* Conceptually: Find the architecture with the least number
477 of extra features or, if they have the same number, then
478 the greatest number of required features. Disregard
479 architectures where the required features alone do
480 not describe a valid architecture. */
481 if (((try & ~arch_set) < (best & ~arch_set)
482 || ((try & ~arch_set) == (best & ~arch_set)
483 && (~try & arch_set) < (~best & arch_set)))
484 && SH_MERGE_ARCH_SET_VALID (try, arch_set))
485 {
486 result = bfd_to_arch_table[i].bfd_mach;
487 best = try;
488 }
489
490 i++;
491 }
492
493 /* This might happen if a new variant is added to sh-opc.h
494 but no corresponding entry is added to the table above. */
495 BFD_ASSERT (result != 0);
496
497 return result;
498}
499
500
501/* Merge the architecture type of two BFD files, such that the
502 resultant architecture supports all the features required
503 by the two input BFDs.
504 If the input BFDs are multually incompatible - i.e. one uses
505 DSP while the other uses FPU - or there is no known architecture
506 that fits the requirements then an error is emitted. */
507
508bfd_boolean
509sh_merge_bfd_arch (bfd *ibfd, bfd *obfd)
510{
511 unsigned int old_arch, new_arch, merged_arch;
512
513 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
514 return FALSE;
515
516 old_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (obfd));
517 new_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (ibfd));
518
519 merged_arch = SH_MERGE_ARCH_SET (old_arch, new_arch);
520
521 if (!SH_VALID_CO_ARCH_SET (merged_arch))
522 {
523 (*_bfd_error_handler)
d003868e
AM
524 ("%B: uses %s instructions while previous modules use %s instructions",
525 ibfd,
f6f9408f
JR
526 SH_ARCH_SET_HAS_DSP (new_arch) ? "dsp" : "floating point",
527 SH_ARCH_SET_HAS_DSP (new_arch) ? "floating point" : "dsp");
528 bfd_set_error (bfd_error_bad_value);
529 return FALSE;
530 }
531 else if (!SH_VALID_ARCH_SET (merged_arch))
532 {
533 (*_bfd_error_handler)
534 ("internal error: merge of architecture '%s' with architecture '%s' produced unknown architecture\n",
535 bfd_printable_name (obfd),
536 bfd_printable_name (ibfd));
537 bfd_set_error (bfd_error_bad_value);
538 return FALSE;
539 }
540
541 bfd_default_set_arch_mach (obfd, bfd_arch_sh,
542 sh_get_bfd_mach_from_arch_set (merged_arch));
68ffbac6 543
f6f9408f
JR
544 return TRUE;
545}
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