2012-11-07 James Murray <jsm@jsm-net.demon.co.uk>
[deliverable/binutils-gdb.git] / bfd / cpu-sh.c
CommitLineData
ef230218 1/* BFD library support routines for the Renesas / SuperH SH architecture.
3db64b00
AM
2 Copyright 1993, 1994, 1997, 1998, 2000, 2001, 2002, 2003, 2004, 2005,
3 2007 Free Software Foundation, Inc.
252b5132
RH
4 Hacked by Steve Chamberlain of Cygnus Support.
5
5177500f 6 This file is part of BFD, the Binary File Descriptor library.
252b5132 7
5177500f
NC
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
cd123cb7 10 the Free Software Foundation; either version 3 of the License, or
5177500f 11 (at your option) any later version.
252b5132 12
5177500f
NC
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
252b5132 17
5177500f
NC
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
cd123cb7
NC
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
252b5132 22
252b5132 23#include "sysdep.h"
3db64b00 24#include "bfd.h"
252b5132 25#include "libbfd.h"
f6f9408f 26#include "../opcodes/sh-opc.h"
252b5132 27
e38bc3b5
NC
28#define SH_NEXT arch_info_struct + 0
29#define SH2_NEXT arch_info_struct + 1
30#define SH2E_NEXT arch_info_struct + 2
31#define SH_DSP_NEXT arch_info_struct + 3
32#define SH3_NEXT arch_info_struct + 4
33#define SH3_NOMMU_NEXT arch_info_struct + 5
34#define SH3_DSP_NEXT arch_info_struct + 6
35#define SH3E_NEXT arch_info_struct + 7
36#define SH4_NEXT arch_info_struct + 8
37#define SH4A_NEXT arch_info_struct + 9
38#define SH4AL_DSP_NEXT arch_info_struct + 10
39#define SH4_NOFPU_NEXT arch_info_struct + 11
40#define SH4_NOMMU_NOFPU_NEXT arch_info_struct + 12
41#define SH4A_NOFPU_NEXT arch_info_struct + 13
42#define SH2A_NEXT arch_info_struct + 14
43#define SH2A_NOFPU_NEXT arch_info_struct + 15
44#define SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT arch_info_struct + 16
45#define SH2A_NOFPU_OR_SH3_NOMMU_NEXT arch_info_struct + 17
46#define SH2A_OR_SH4_NEXT arch_info_struct + 18
47#define SH2A_OR_SH3E_NEXT arch_info_struct + 19
48#define SH64_NEXT NULL
252b5132 49
71f6b586 50static const bfd_arch_info_type arch_info_struct[] =
252b5132 51{
d4845d57 52 {
e38bc3b5
NC
53 32, /* 32 bits in a word. */
54 32, /* 32 bits in an address. */
55 8, /* 8 bits in a byte. */
d4845d57
JR
56 bfd_arch_sh,
57 bfd_mach_sh2,
e38bc3b5
NC
58 "sh", /* Architecture name. */
59 "sh2", /* Machine name. */
d4845d57 60 1,
e38bc3b5 61 FALSE, /* Not the default. */
d4845d57 62 bfd_default_compatible,
a44d7f9c 63 bfd_default_scan,
b7761f11 64 bfd_arch_default_fill,
d4845d57
JR
65 SH2_NEXT
66 },
5177500f 67 {
e38bc3b5
NC
68 32, /* 32 bits in a word. */
69 32, /* 32 bits in an address. */
70 8, /* 8 bits in a byte. */
5177500f
NC
71 bfd_arch_sh,
72 bfd_mach_sh2e,
e38bc3b5
NC
73 "sh", /* Architecture name. */
74 "sh2e", /* Machine name. */
5177500f 75 1,
e38bc3b5 76 FALSE, /* Not the default. */
5177500f
NC
77 bfd_default_compatible,
78 bfd_default_scan,
b7761f11 79 bfd_arch_default_fill,
5177500f
NC
80 SH2E_NEXT
81 },
d4845d57 82 {
e38bc3b5
NC
83 32, /* 32 bits in a word. */
84 32, /* 32 bits in an address. */
85 8, /* 8 bits in a byte. */
d4845d57
JR
86 bfd_arch_sh,
87 bfd_mach_sh_dsp,
e38bc3b5
NC
88 "sh", /* Architecture name. */
89 "sh-dsp", /* Machine name. */
d4845d57 90 1,
e38bc3b5 91 FALSE, /* Not the default. */
d4845d57 92 bfd_default_compatible,
a44d7f9c 93 bfd_default_scan,
b7761f11 94 bfd_arch_default_fill,
d4845d57
JR
95 SH_DSP_NEXT
96 },
252b5132 97 {
e38bc3b5
NC
98 32, /* 32 bits in a word. */
99 32, /* 32 bits in an address. */
100 8, /* 8 bits in a byte. */
252b5132
RH
101 bfd_arch_sh,
102 bfd_mach_sh3,
e38bc3b5
NC
103 "sh", /* Architecture name. */
104 "sh3", /* Machine name. */
252b5132 105 1,
e38bc3b5 106 FALSE, /* Not the default. */
252b5132 107 bfd_default_compatible,
a44d7f9c 108 bfd_default_scan,
b7761f11 109 bfd_arch_default_fill,
252b5132
RH
110 SH3_NEXT
111 },
f6f9408f 112 {
e38bc3b5
NC
113 32, /* 32 bits in a word. */
114 32, /* 32 bits in an address. */
115 8, /* 8 bits in a byte. */
f6f9408f
JR
116 bfd_arch_sh,
117 bfd_mach_sh3_nommu,
e38bc3b5
NC
118 "sh", /* Architecture name. */
119 "sh3-nommu", /* Machine name. */
f6f9408f 120 1,
e38bc3b5 121 FALSE, /* Not the default. */
f6f9408f
JR
122 bfd_default_compatible,
123 bfd_default_scan,
b7761f11 124 bfd_arch_default_fill,
f6f9408f
JR
125 SH3_NOMMU_NEXT
126 },
d4845d57 127 {
e38bc3b5
NC
128 32, /* 32 bits in a word. */
129 32, /* 32 bits in an address. */
130 8, /* 8 bits in a byte. */
d4845d57
JR
131 bfd_arch_sh,
132 bfd_mach_sh3_dsp,
e38bc3b5
NC
133 "sh", /* Architecture name. */
134 "sh3-dsp", /* Machine name. */
d4845d57 135 1,
e38bc3b5 136 FALSE, /* Not the default. */
d4845d57 137 bfd_default_compatible,
a44d7f9c 138 bfd_default_scan,
b7761f11 139 bfd_arch_default_fill,
d4845d57
JR
140 SH3_DSP_NEXT
141 },
252b5132 142 {
e38bc3b5
NC
143 32, /* 32 bits in a word. */
144 32, /* 32 bits in an address. */
145 8, /* 8 bits in a byte. */
252b5132
RH
146 bfd_arch_sh,
147 bfd_mach_sh3e,
e38bc3b5
NC
148 "sh", /* Architecture name. */
149 "sh3e", /* Machine name. */
252b5132 150 1,
e38bc3b5 151 FALSE, /* Not the default. */
252b5132 152 bfd_default_compatible,
a44d7f9c 153 bfd_default_scan,
b7761f11 154 bfd_arch_default_fill,
252b5132
RH
155 SH3E_NEXT
156 },
d4845d57 157 {
e38bc3b5
NC
158 32, /* 32 bits in a word. */
159 32, /* 32 bits in an address. */
160 8, /* 8 bits in a byte. */
d4845d57
JR
161 bfd_arch_sh,
162 bfd_mach_sh4,
e38bc3b5
NC
163 "sh", /* Architecture name. */
164 "sh4", /* Machine name. */
d4845d57 165 1,
e38bc3b5 166 FALSE, /* Not the default. */
d4845d57 167 bfd_default_compatible,
a44d7f9c 168 bfd_default_scan,
b7761f11 169 bfd_arch_default_fill,
d4845d57
JR
170 SH4_NEXT
171 },
af9ba621 172 {
e38bc3b5
NC
173 32, /* 32 bits in a word. */
174 32, /* 32 bits in an address. */
175 8, /* 8 bits in a byte. */
af9ba621
CV
176 bfd_arch_sh,
177 bfd_mach_sh4a,
e38bc3b5
NC
178 "sh", /* Architecture name. */
179 "sh4a", /* Machine name. */
af9ba621 180 1,
e38bc3b5 181 FALSE, /* Not the default. */
af9ba621
CV
182 bfd_default_compatible,
183 bfd_default_scan,
b7761f11 184 bfd_arch_default_fill,
af9ba621
CV
185 SH4A_NEXT
186 },
187 {
e38bc3b5
NC
188 32, /* 32 bits in a word. */
189 32, /* 32 bits in an address. */
190 8, /* 8 bits in a byte. */
af9ba621
CV
191 bfd_arch_sh,
192 bfd_mach_sh4al_dsp,
e38bc3b5
NC
193 "sh", /* Architecture name. */
194 "sh4al-dsp", /* Machine name. */
af9ba621 195 1,
e38bc3b5 196 FALSE, /* Not the default. */
af9ba621
CV
197 bfd_default_compatible,
198 bfd_default_scan,
b7761f11 199 bfd_arch_default_fill,
af9ba621
CV
200 SH4AL_DSP_NEXT
201 },
202 {
e38bc3b5
NC
203 32, /* 32 bits in a word. */
204 32, /* 32 bits in an address. */
205 8, /* 8 bits in a byte. */
af9ba621
CV
206 bfd_arch_sh,
207 bfd_mach_sh4_nofpu,
e38bc3b5
NC
208 "sh", /* Architecture name. */
209 "sh4-nofpu", /* Machine name. */
af9ba621 210 1,
e38bc3b5 211 FALSE, /* Not the default. */
af9ba621
CV
212 bfd_default_compatible,
213 bfd_default_scan,
b7761f11 214 bfd_arch_default_fill,
af9ba621
CV
215 SH4_NOFPU_NEXT
216 },
ae51a426 217 {
e38bc3b5
NC
218 32, /* 32 bits in a word. */
219 32, /* 32 bits in an address. */
220 8, /* 8 bits in a byte. */
ae51a426
JR
221 bfd_arch_sh,
222 bfd_mach_sh4_nommu_nofpu,
e38bc3b5
NC
223 "sh", /* Architecture name. */
224 "sh4-nommu-nofpu", /* Machine name. */
ae51a426 225 1,
e38bc3b5 226 FALSE, /* Not the default. */
ae51a426
JR
227 bfd_default_compatible,
228 bfd_default_scan,
b7761f11 229 bfd_arch_default_fill,
ae51a426
JR
230 SH4_NOMMU_NOFPU_NEXT
231 },
af9ba621 232 {
e38bc3b5
NC
233 32, /* 32 bits in a word. */
234 32, /* 32 bits in an address. */
235 8, /* 8 bits in a byte. */
af9ba621
CV
236 bfd_arch_sh,
237 bfd_mach_sh4a_nofpu,
e38bc3b5
NC
238 "sh", /* Architecture name. */
239 "sh4a-nofpu", /* Machine name. */
af9ba621 240 1,
e38bc3b5 241 FALSE, /* Not the default. */
af9ba621
CV
242 bfd_default_compatible,
243 bfd_default_scan,
b7761f11 244 bfd_arch_default_fill,
af9ba621
CV
245 SH4A_NOFPU_NEXT
246 },
1d70c7fb
AO
247 {
248 32, /* 32 bits in a word. */
249 32, /* 32 bits in an address. */
250 8, /* 8 bits in a byte. */
251 bfd_arch_sh,
252 bfd_mach_sh2a,
e38bc3b5
NC
253 "sh", /* Architecture name. */
254 "sh2a", /* Machine name. */
1d70c7fb
AO
255 1,
256 FALSE, /* Not the default. */
257 bfd_default_compatible,
258 bfd_default_scan,
b7761f11 259 bfd_arch_default_fill,
1d70c7fb
AO
260 SH2A_NEXT
261 },
262 {
263 32, /* 32 bits in a word. */
264 32, /* 32 bits in an address. */
265 8, /* 8 bits in a byte. */
266 bfd_arch_sh,
267 bfd_mach_sh2a_nofpu,
e38bc3b5
NC
268 "sh", /* Architecture name. */
269 "sh2a-nofpu", /* Machine name. */
1d70c7fb
AO
270 1,
271 FALSE, /* Not the default. */
272 bfd_default_compatible,
273 bfd_default_scan,
b7761f11 274 bfd_arch_default_fill,
1d70c7fb
AO
275 SH2A_NOFPU_NEXT
276 },
fbca6ad9 277 {
e38bc3b5
NC
278 32, /* 32 bits in a word. */
279 32, /* 32 bits in an address. */
280 8, /* 8 bits in a byte. */
281 bfd_arch_sh,
282 bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu,
283 "sh", /* Architecture name. */
284 "sh2a-nofpu-or-sh4-nommu-nofpu", /* Machine name. */
285 1,
286 FALSE, /* Not the default. */
287 bfd_default_compatible,
288 bfd_default_scan,
b7761f11 289 bfd_arch_default_fill,
e38bc3b5
NC
290 SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT
291 },
292 {
293 32, /* 32 bits in a word. */
294 32, /* 32 bits in an address. */
295 8, /* 8 bits in a byte. */
296 bfd_arch_sh,
297 bfd_mach_sh2a_nofpu_or_sh3_nommu,
298 "sh", /* Architecture name. . */
299 "sh2a-nofpu-or-sh3-nommu", /* Machine name. */
300 1,
301 FALSE, /* Not the default. */
302 bfd_default_compatible,
303 bfd_default_scan,
b7761f11 304 bfd_arch_default_fill,
e38bc3b5
NC
305 SH2A_NOFPU_OR_SH3_NOMMU_NEXT
306 },
307 {
308 32, /* 32 bits in a word. */
309 32, /* 32 bits in an address. */
310 8, /* 8 bits in a byte. */
311 bfd_arch_sh,
312 bfd_mach_sh2a_or_sh4,
313 "sh", /* Architecture name. */
314 "sh2a-or-sh4", /* Machine name. */
315 1,
316 FALSE, /* Not the default. */
317 bfd_default_compatible,
318 bfd_default_scan,
b7761f11 319 bfd_arch_default_fill,
e38bc3b5
NC
320 SH2A_OR_SH4_NEXT
321 },
322 {
323 32, /* 32 bits in a word. */
324 32, /* 32 bits in an address. */
325 8, /* 8 bits in a byte. */
326 bfd_arch_sh,
327 bfd_mach_sh2a_or_sh3e,
328 "sh", /* Architecture name. */
329 "sh2a-or-sh3e", /* Machine name. */
330 1,
331 FALSE, /* Not the default. */
332 bfd_default_compatible,
333 bfd_default_scan,
b7761f11 334 bfd_arch_default_fill,
e38bc3b5
NC
335 SH2A_OR_SH3E_NEXT
336 },
337 {
338 64, /* 64 bits in a word. */
339 64, /* 64 bits in an address. */
340 8, /* 8 bits in a byte. */
fbca6ad9
AO
341 bfd_arch_sh,
342 bfd_mach_sh5,
e38bc3b5
NC
343 "sh", /* Architecture name. */
344 "sh5", /* Machine name. */
fbca6ad9 345 1,
e38bc3b5 346 FALSE, /* Not the default. */
fbca6ad9 347 bfd_default_compatible,
a44d7f9c 348 bfd_default_scan,
b7761f11 349 bfd_arch_default_fill,
fbca6ad9
AO
350 SH64_NEXT
351 },
252b5132
RH
352};
353
354const bfd_arch_info_type bfd_sh_arch =
355{
e38bc3b5
NC
356 32, /* 32 bits in a word. */
357 32, /* 32 bits in an address. */
358 8, /* 8 bits in a byte. */
252b5132
RH
359 bfd_arch_sh,
360 bfd_mach_sh,
e38bc3b5
NC
361 "sh", /* Architecture name. */
362 "sh", /* Machine name. */
252b5132 363 1,
e38bc3b5 364 TRUE, /* The default machine. */
252b5132 365 bfd_default_compatible,
a44d7f9c 366 bfd_default_scan,
b7761f11 367 bfd_arch_default_fill,
252b5132
RH
368 SH_NEXT
369};
f6f9408f
JR
370
371
372/* This table defines the mappings from the BFD internal numbering
373 system to the opcodes internal flags system.
374 It is used by the functions defined below.
375 The prototypes for these SH specific functions are found in
376 sh-opc.h . */
377
378static struct { unsigned long bfd_mach, arch, arch_up; } bfd_to_arch_table[] =
379{
e38bc3b5 380 { bfd_mach_sh, arch_sh1, arch_sh_up },
f6f9408f
JR
381 { bfd_mach_sh2, arch_sh2, arch_sh2_up },
382 { bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
383 { bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
1d70c7fb
AO
384 { bfd_mach_sh2a, arch_sh2a, arch_sh2a_up },
385 { bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up },
e38bc3b5
NC
386
387 { bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up },
388 { bfd_mach_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu_up },
389 { bfd_mach_sh2a_or_sh4, arch_sh2a_or_sh4, arch_sh2a_or_sh4_up },
390 { bfd_mach_sh2a_or_sh3e, arch_sh2a_or_sh3e, arch_sh2a_or_sh3e_up },
391
f6f9408f
JR
392 { bfd_mach_sh3, arch_sh3, arch_sh3_up },
393 { bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
394 { bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
395 { bfd_mach_sh3e, arch_sh3e, arch_sh3e_up },
396 { bfd_mach_sh4, arch_sh4, arch_sh4_up },
397 { bfd_mach_sh4a, arch_sh4a, arch_sh4a_up },
398 { bfd_mach_sh4al_dsp, arch_sh4al_dsp, arch_sh4al_dsp_up },
e38bc3b5 399 { bfd_mach_sh4_nofpu, arch_sh4_nofpu, arch_sh4_nofpu_up },
f6f9408f 400 { bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
e38bc3b5 401 { bfd_mach_sh4a_nofpu, arch_sh4a_nofpu, arch_sh4a_nofpu_up },
f6f9408f
JR
402 { 0, 0, 0 } /* Terminator. */
403};
404
405
406/* Convert a BFD mach number into the right opcodes arch flags
407 using the table above. */
408
409unsigned int
410sh_get_arch_from_bfd_mach (unsigned long mach)
411{
412 int i = 0;
e38bc3b5 413
f6f9408f
JR
414 while (bfd_to_arch_table[i].bfd_mach != 0)
415 if (bfd_to_arch_table[i].bfd_mach == mach)
416 return bfd_to_arch_table[i].arch;
417 else
418 i++;
419
e38bc3b5 420 /* Machine not found. */
f6f9408f
JR
421 BFD_FAIL();
422
423 return SH_ARCH_UNKNOWN_ARCH;
424}
425
426
427/* Convert a BFD mach number into a set of opcodes arch flags
428 describing all the compatible architectures (i.e. arch_up)
429 using the table above. */
430
431unsigned int
432sh_get_arch_up_from_bfd_mach (unsigned long mach)
433{
434 int i = 0;
e38bc3b5 435
f6f9408f
JR
436 while (bfd_to_arch_table[i].bfd_mach != 0)
437 if (bfd_to_arch_table[i].bfd_mach == mach)
438 return bfd_to_arch_table[i].arch_up;
439 else
440 i++;
441
e38bc3b5 442 /* Machine not found. */
f6f9408f
JR
443 BFD_FAIL();
444
445 return SH_ARCH_UNKNOWN_ARCH;
446}
447
448
449/* Convert an arbitary arch_set - not necessarily corresponding
450 directly to anything in the table above - to the most generic
451 architecture which supports all the required features, and
452 return the corresponding BFD mach. */
453
454unsigned long
455sh_get_bfd_mach_from_arch_set (unsigned int arch_set)
456{
457 unsigned long result = 0;
458 unsigned int best = ~arch_set;
459 unsigned int co_mask = ~0;
460 int i = 0;
461
462 /* If arch_set permits variants with no coprocessor then do not allow
463 the other irrelevant co-processor bits to influence the choice:
464 e.g. if dsp is disallowed by arch_set, then the algorithm would
465 prefer fpu variants over nofpu variants because they also disallow
466 dsp - even though the nofpu would be the most correct choice.
467 This assumes that EVERY fpu/dsp variant has a no-coprocessor
468 counter-part, or their non-fpu/dsp instructions do not have the
469 no co-processor bit set. */
470 if (arch_set & arch_sh_no_co)
471 co_mask = ~(arch_sh_sp_fpu | arch_sh_dp_fpu | arch_sh_has_dsp);
472
473 while (bfd_to_arch_table[i].bfd_mach != 0)
474 {
475 unsigned int try = bfd_to_arch_table[i].arch_up & co_mask;
476
477 /* Conceptually: Find the architecture with the least number
478 of extra features or, if they have the same number, then
479 the greatest number of required features. Disregard
480 architectures where the required features alone do
481 not describe a valid architecture. */
482 if (((try & ~arch_set) < (best & ~arch_set)
483 || ((try & ~arch_set) == (best & ~arch_set)
484 && (~try & arch_set) < (~best & arch_set)))
485 && SH_MERGE_ARCH_SET_VALID (try, arch_set))
486 {
487 result = bfd_to_arch_table[i].bfd_mach;
488 best = try;
489 }
490
491 i++;
492 }
493
494 /* This might happen if a new variant is added to sh-opc.h
495 but no corresponding entry is added to the table above. */
496 BFD_ASSERT (result != 0);
497
498 return result;
499}
500
501
502/* Merge the architecture type of two BFD files, such that the
503 resultant architecture supports all the features required
504 by the two input BFDs.
505 If the input BFDs are multually incompatible - i.e. one uses
506 DSP while the other uses FPU - or there is no known architecture
507 that fits the requirements then an error is emitted. */
508
509bfd_boolean
510sh_merge_bfd_arch (bfd *ibfd, bfd *obfd)
511{
512 unsigned int old_arch, new_arch, merged_arch;
513
514 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
515 return FALSE;
516
517 old_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (obfd));
518 new_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (ibfd));
519
520 merged_arch = SH_MERGE_ARCH_SET (old_arch, new_arch);
521
522 if (!SH_VALID_CO_ARCH_SET (merged_arch))
523 {
524 (*_bfd_error_handler)
d003868e
AM
525 ("%B: uses %s instructions while previous modules use %s instructions",
526 ibfd,
f6f9408f
JR
527 SH_ARCH_SET_HAS_DSP (new_arch) ? "dsp" : "floating point",
528 SH_ARCH_SET_HAS_DSP (new_arch) ? "floating point" : "dsp");
529 bfd_set_error (bfd_error_bad_value);
530 return FALSE;
531 }
532 else if (!SH_VALID_ARCH_SET (merged_arch))
533 {
534 (*_bfd_error_handler)
535 ("internal error: merge of architecture '%s' with architecture '%s' produced unknown architecture\n",
536 bfd_printable_name (obfd),
537 bfd_printable_name (ibfd));
538 bfd_set_error (bfd_error_bad_value);
539 return FALSE;
540 }
541
542 bfd_default_set_arch_mach (obfd, bfd_arch_sh,
543 sh_get_bfd_mach_from_arch_set (merged_arch));
544
545 return TRUE;
546}
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