* elf-hppa.h (elf_hppa_final_write_processing): Turn on TRAPNIL.
[deliverable/binutils-gdb.git] / bfd / elf-hppa.h
CommitLineData
9e103c9c 1/* Common code for PA ELF implementations.
5f771d47 2 Copyright (C) 1999 Free Software Foundation, Inc.
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3
4This file is part of BFD, the Binary File Descriptor library.
5
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
18Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#define ELF_HOWTO_TABLE_SIZE R_PARISC_UNIMPLEMENTED + 1
21
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22/* This file is included by multiple PA ELF BFD backends with different
23 sizes.
24
25 Most of the routines are written to be size independent, but sometimes
26 external constraints require 32 or 64 bit specific code. We remap
27 the definitions/functions as necessary here. */
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28#if ARCH_SIZE == 64
29#define ELF_R_TYPE(X) ELF64_R_TYPE(X)
2eb429af 30#define ELF_R_SYM(X) ELF64_R_SYM(X)
9e103c9c 31#define _bfd_elf_hppa_gen_reloc_type _bfd_elf64_hppa_gen_reloc_type
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32#define elf_hppa_relocate_section elf64_hppa_relocate_section
33#define bfd_elf_bfd_final_link bfd_elf64_bfd_final_link
34#define elf_hppa_final_link elf64_hppa_final_link
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35#endif
36#if ARCH_SIZE == 32
37#define ELF_R_TYPE(X) ELF32_R_TYPE(X)
2eb429af 38#define ELF_R_SYM(X) ELF32_R_SYM(X)
9e103c9c 39#define _bfd_elf_hppa_gen_reloc_type _bfd_elf32_hppa_gen_reloc_type
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40#define elf_hppa_relocate_section elf32_hppa_relocate_section
41#define bfd_elf_bfd_final_link bfd_elf32_bfd_final_link
42#define elf_hppa_final_link elf32_hppa_final_link
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43#endif
44
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45static boolean
46elf_hppa_relocate_section
47 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *,
48 bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
49
50static bfd_reloc_status_type elf_hppa_final_link_relocate
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51 PARAMS ((Elf_Internal_Rela *, bfd *, bfd *, asection *,
52 bfd_byte *, bfd_vma, struct bfd_link_info *,
53 asection *, struct elf_link_hash_entry *,
54 struct elf64_hppa_dyn_hash_entry *));
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55
56static unsigned long elf_hppa_relocate_insn
be7582f3 57 PARAMS ((unsigned long, long, unsigned long));
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58
59static boolean elf_hppa_add_symbol_hook
f273939b 60 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
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61 const char **, flagword *, asection **, bfd_vma *));
62
63static boolean elf_hppa_final_link
64 PARAMS ((bfd *, struct bfd_link_info *));
65
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66static boolean elf_hppa_unmark_useless_dynamic_symbols
67 PARAMS ((struct elf_link_hash_entry *, PTR));
68
69static boolean elf_hppa_remark_useless_dynamic_symbols
70 PARAMS ((struct elf_link_hash_entry *, PTR));
71
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72static void elf_hppa_record_segment_addrs
73 PARAMS ((bfd *, asection *, PTR));
74
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75/* ELF/PA relocation howto entries. */
76
77static reloc_howto_type elf_hppa_howto_table[ELF_HOWTO_TABLE_SIZE] =
78{
be7582f3 79 {R_PARISC_NONE, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_NONE"},
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80
81 /* The values in DIR32 are to placate the check in
82 _bfd_stab_section_find_nearest_line. */
caf3d37c 83 {R_PARISC_DIR32, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR32", false, 0, 0xffffffff, false},
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84 {R_PARISC_DIR21L, 0, 0, 21, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR21L"},
85 {R_PARISC_DIR17R, 0, 0, 17, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR17R"},
86 {R_PARISC_DIR17F, 0, 0, 17, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR17F"},
87 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
88 {R_PARISC_DIR14R, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR14R"},
89 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
90 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
91 {R_PARISC_PCREL32, 0, 0, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL32"},
92
93 {R_PARISC_PCREL21L, 0, 0, 21, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL21L"},
94 {R_PARISC_PCREL17R, 0, 0, 17, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL17R"},
95 {R_PARISC_PCREL17F, 0, 0, 17, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL17F"},
96 {R_PARISC_PCREL17C, 0, 0, 17, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL17C"},
97 {R_PARISC_PCREL14R, 0, 0, 14, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL14R"},
98 {R_PARISC_PCREL14F, 0, 0, 14, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL14F"},
99 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
100 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
101 {R_PARISC_DPREL21L, 0, 0, 21, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DPREL21L"},
102 {R_PARISC_DPREL14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DPREL14WR"},
103
104 {R_PARISC_DPREL14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DPREL14DR"},
105 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
106 {R_PARISC_DPREL14R, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DPREL14R"},
107 {R_PARISC_DPREL14F, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DPREL14F"},
108 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
109 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
110 {R_PARISC_DLTREL21L, 0, 0, 21, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTREL21L"},
111 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
112 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
113 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
114
115 {R_PARISC_DLTREL14R, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTREL14R"},
116 {R_PARISC_DLTREL14F, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTREL14F"},
117 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
118 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
119 {R_PARISC_DLTIND21L, 0, 0, 21, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTIND21L"},
120 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
121 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
122 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
123 {R_PARISC_DLTIND14R, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTIND14R"},
124 {R_PARISC_DLTIND14F, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTIND14F"},
125
126 {R_PARISC_SETBASE, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_SETBASE"},
127 {R_PARISC_SECREL32, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_SECREL32"},
128 {R_PARISC_BASEREL21L, 0, 0, 21, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_BASEREL21L"},
129 {R_PARISC_BASEREL17R, 0, 0, 17, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_BASEREL17R"},
130 {R_PARISC_BASEREL17F, 0, 0, 17, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_BASEREL17F"},
131 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
132 {R_PARISC_BASEREL14R, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_BASEREL14R"},
133 {R_PARISC_BASEREL14F, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_BASEREL14F"},
134 {R_PARISC_SEGBASE, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_SEGBASE"},
135 {R_PARISC_SEGREL32, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_SEGREL32"},
136
137 {R_PARISC_PLTOFF21L, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF21L"},
138 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
139 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
140 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
141 {R_PARISC_PLTOFF14R, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF14R"},
142 {R_PARISC_PLTOFF14F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF14F"},
143 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
144 {R_PARISC_LTOFF_FPTR32, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_FPTR32"},
145 {R_PARISC_LTOFF_FPTR21L, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_FPTR21L"},
146 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
147
148 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
149 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
150 {R_PARISC_LTOFF_FPTR14R, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_FPTR14R"},
151 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
152 {R_PARISC_FPTR64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_FPTR64"},
153 {R_PARISC_PLABEL32, 0, 0, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLABEL32"},
154 {R_PARISC_PLABEL21L, 0, 0, 21, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLABEL21L"},
155 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
156 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
157 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
158
159 {R_PARISC_PLABEL14R, 0, 0, 14, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLABEL14R"},
160 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
161 {R_PARISC_PCREL64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL64"},
162 {R_PARISC_PCREL22C, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL22C"},
163 {R_PARISC_PCREL22F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL22F"},
164 {R_PARISC_PCREL14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL14WR"},
165 {R_PARISC_PCREL14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL14DR"},
166 {R_PARISC_PCREL16F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL16F"},
167 {R_PARISC_PCREL16WF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL16WF"},
168 {R_PARISC_PCREL16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PCREL16DF"},
169
170 {R_PARISC_DIR64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR64"},
b7263961
JL
171 {R_PARISC_NONE, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_NONE"},
172 {R_PARISC_NONE, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_NONE"},
be7582f3
JL
173 {R_PARISC_DIR14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR14WR"},
174 {R_PARISC_DIR14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR14DR"},
175 {R_PARISC_DIR16F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR16F"},
176 {R_PARISC_DIR16WF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR16WF"},
177 {R_PARISC_DIR16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DIR16DF"},
178 {R_PARISC_GPREL64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_GPREL64"},
179 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
180
181 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
182 {R_PARISC_DLTREL14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTREL14WR"},
183 {R_PARISC_DLTREL14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTREL14DR"},
184 {R_PARISC_GPREL16F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_GPREL16F"},
185 {R_PARISC_GPREL16WF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_GPREL16WF"},
186 {R_PARISC_GPREL16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_GPREL16DF"},
187 {R_PARISC_LTOFF64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF64"},
188 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
189 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
190 {R_PARISC_DLTIND14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTIND14WR"},
191
192 {R_PARISC_DLTIND14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_DLTIND14DR"},
193 {R_PARISC_LTOFF16F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF16F"},
b7263961 194 {R_PARISC_LTOFF16WF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF16DF"},
be7582f3 195 {R_PARISC_LTOFF16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF16DF"},
be7582f3
JL
196 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
197 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
198 {R_PARISC_BASEREL14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_BSEREL14WR"},
199 {R_PARISC_BASEREL14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_BASEREL14DR"},
200 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
201 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
202
203 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
204 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
205 {R_PARISC_SEGREL64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_SEGREL64"},
206 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
207 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
208 {R_PARISC_PLTOFF14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF14WR"},
209 {R_PARISC_PLTOFF14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF14DR"},
210 {R_PARISC_PLTOFF16F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF16F"},
211 {R_PARISC_PLTOFF16WF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF16WF"},
212 {R_PARISC_PLTOFF16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_PLTOFF16DF"},
213
214 {R_PARISC_LTOFF_FPTR64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
215 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
216 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
217 {R_PARISC_LTOFF_FPTR14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_FPTR14WR"},
218 {R_PARISC_LTOFF_FPTR14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_FPTR14DR"},
219 {R_PARISC_LTOFF_FPTR16F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_FPTR16F"},
220 {R_PARISC_LTOFF_FPTR16WF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_FPTR16WF"},
221 {R_PARISC_LTOFF_FPTR16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
222 {R_PARISC_COPY, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_COPY"},
223 {R_PARISC_IPLT, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_IPLT"},
224
225 {R_PARISC_EPLT, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_EPLT"},
226 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
227 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
228 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
229 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
230 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
231 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
232 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
233 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
234 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
235
236 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
237 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
238 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
239 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
240 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
241 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
242 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
243 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
244 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
245 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
246
247 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
248 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
249 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
250 {R_PARISC_TPREL32, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_TPREL32"},
251 {R_PARISC_TPREL21L, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_TPREL21L"},
252 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
253 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
254 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
255 {R_PARISC_TPREL14R, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_TPREL14R"},
256 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
257
258 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
259 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
260 {R_PARISC_LTOFF_TP21L, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_TP21L"},
261 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
262 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
263 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
264 {R_PARISC_LTOFF_TP14R, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
265 {R_PARISC_LTOFF_TP14F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_TP14F"},
266 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
267 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
268
269 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
270 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
271 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
272 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
273 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
274 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
275 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
276 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
277 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
278 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
279
280 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
281 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
282 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
283 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
284 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
285 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
286 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
287 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
288 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
289 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
290
291 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
292 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
293 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
294 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
295 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
296 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
297 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
298 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
299 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
300 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
301
302 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
303 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
304 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
305 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
306 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
307 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
308 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
309 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
310 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
311 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
312
313 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
314 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
315 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_UNIMPLEMENTED"},
316 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
317 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
318 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
319 {R_PARISC_TPREL64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_TPREL64"},
320 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
321 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
322 {R_PARISC_TPREL14WR, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_TPREL14WR"},
323
324 {R_PARISC_TPREL14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_TPREL14DR"},
325 {R_PARISC_TPREL16F, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_TPREL16F"},
326 {R_PARISC_TPREL16WF, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_TPREL16WF"},
327 {R_PARISC_TPREL16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_TPREL16DF"},
328 {R_PARISC_LTOFF_TP64, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_TP64"},
329 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
330 {R_PARISC_UNIMPLEMENTED, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_UNIMPLEMENTED"},
331 {R_PARISC_LTOFF_TP14WR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_TP14WR"},
332 {R_PARISC_LTOFF_TP14DR, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_TP14DR"},
333 {R_PARISC_LTOFF_TP16F, 0, 0, 0, false, 0, complain_overflow_dont, NULL, "R_PARISC_LTOFF_TP16F"},
334
335 {R_PARISC_LTOFF_TP16WF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_TP16WF"},
336 {R_PARISC_LTOFF_TP16DF, 0, 0, 0, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_PARISC_LTOFF_TP16DF"},
9e103c9c
JL
337};
338
6e2bf930
JL
339#define OFFSET_14R_FROM_21L 4
340#define OFFSET_14F_FROM_21L 5
341
9e103c9c
JL
342/* Return one (or more) BFD relocations which implement the base
343 relocation with modifications based on format and field. */
344
345elf_hppa_reloc_type **
346_bfd_elf_hppa_gen_reloc_type (abfd, base_type, format, field, ignore, sym)
347 bfd *abfd;
348 elf_hppa_reloc_type base_type;
349 int format;
350 int field;
be7582f3
JL
351 int ignore;
352 asymbol *sym;
9e103c9c
JL
353{
354 elf_hppa_reloc_type *finaltype;
355 elf_hppa_reloc_type **final_types;
356
357 /* Allocate slots for the BFD relocation. */
358 final_types = ((elf_hppa_reloc_type **)
359 bfd_alloc (abfd, sizeof (elf_hppa_reloc_type *) * 2));
360 if (final_types == NULL)
361 return NULL;
362
363 /* Allocate space for the relocation itself. */
364 finaltype = ((elf_hppa_reloc_type *)
365 bfd_alloc (abfd, sizeof (elf_hppa_reloc_type)));
366 if (finaltype == NULL)
367 return NULL;
368
369 /* Some reasonable defaults. */
370 final_types[0] = finaltype;
371 final_types[1] = NULL;
372
373#define final_type finaltype[0]
374
375 final_type = base_type;
376
377 /* Just a tangle of nested switch statements to deal with the braindamage
378 that a different field selector means a completely different relocation
379 for PA ELF. */
380 switch (base_type)
381 {
0d571602
JL
382 /* We have been using generic relocation types. However, that may not
383 really make sense. Anyway, we need to support both R_PARISC_DIR64
384 and R_PARISC_DIR32 here. */
385 case R_PARISC_DIR32:
386 case R_PARISC_DIR64:
9e103c9c
JL
387 case R_HPPA_ABS_CALL:
388 switch (format)
389 {
390 case 14:
391 switch (field)
392 {
393 case e_rsel:
394 case e_rrsel:
395 final_type = R_PARISC_DIR14R;
396 break;
397 case e_rtsel:
f31cedf7 398 final_type = R_PARISC_DLTIND14R;
9e103c9c 399 break;
36860900
JL
400 case e_rtpsel:
401 final_type = R_PARISC_LTOFF_FPTR14DR;
402 break;
9e103c9c 403 case e_tsel:
f31cedf7 404 final_type = R_PARISC_DLTIND14F;
9e103c9c
JL
405 break;
406 case e_rpsel:
407 final_type = R_PARISC_PLABEL14R;
408 break;
409 default:
410 return NULL;
411 }
412 break;
413
414 case 17:
415 switch (field)
416 {
417 case e_fsel:
418 final_type = R_PARISC_DIR17F;
419 break;
420 case e_rsel:
421 case e_rrsel:
422 final_type = R_PARISC_DIR17R;
423 break;
424 default:
425 return NULL;
426 }
427 break;
428
429 case 21:
430 switch (field)
431 {
432 case e_lsel:
433 case e_lrsel:
434 final_type = R_PARISC_DIR21L;
435 break;
436 case e_ltsel:
f31cedf7 437 final_type = R_PARISC_DLTIND21L;
9e103c9c 438 break;
36860900
JL
439 case e_ltpsel:
440 final_type = R_PARISC_LTOFF_FPTR21L;
441 break;
9e103c9c
JL
442 case e_lpsel:
443 final_type = R_PARISC_PLABEL21L;
444 break;
445 default:
446 return NULL;
447 }
448 break;
449
450 case 32:
451 switch (field)
452 {
453 case e_fsel:
454 final_type = R_PARISC_DIR32;
432bdd91
JL
455 /* When in 64bit mode, a 32bit relocation is supposed to
456 be a section relative relocation. Dwarf2 (for example)
457 uses 32bit section relative relocations. */
458 if (bfd_get_arch_info (abfd)->bits_per_address != 32)
459 final_type = R_PARISC_SECREL32;
9e103c9c
JL
460 break;
461 case e_psel:
462 final_type = R_PARISC_PLABEL32;
463 break;
464 default:
465 return NULL;
466 }
467 break;
468
6e2bf930
JL
469 case 64:
470 switch (field)
471 {
472 case e_fsel:
473 final_type = R_PARISC_DIR64;
474 break;
475 case e_psel:
36860900
JL
476 final_type = R_PARISC_FPTR64;
477 break;
6e2bf930
JL
478 default:
479 return NULL;
480 }
481 break;
482
9e103c9c
JL
483 default:
484 return NULL;
485 }
486 break;
487
488
489 case R_HPPA_GOTOFF:
490 switch (format)
491 {
492 case 14:
493 switch (field)
494 {
495 case e_rsel:
496 case e_rrsel:
6e2bf930 497 final_type = base_type + OFFSET_14R_FROM_21L;
9e103c9c
JL
498 break;
499 case e_fsel:
6e2bf930 500 final_type = base_type + OFFSET_14F_FROM_21L;
9e103c9c
JL
501 break;
502 default:
503 return NULL;
504 }
505 break;
506
507 case 21:
508 switch (field)
509 {
510 case e_lrsel:
511 case e_lsel:
6e2bf930 512 final_type = base_type;
9e103c9c
JL
513 break;
514 default:
515 return NULL;
516 }
517 break;
518
519 default:
520 return NULL;
521 }
522 break;
523
524
525 case R_HPPA_PCREL_CALL:
526 switch (format)
527 {
528 case 14:
529 switch (field)
530 {
531 case e_rsel:
532 case e_rrsel:
533 final_type = R_PARISC_PCREL14R;
534 break;
535 case e_fsel:
536 final_type = R_PARISC_PCREL14F;
537 break;
538 default:
539 return NULL;
540 }
541 break;
542
543 case 17:
544 switch (field)
545 {
546 case e_rsel:
547 case e_rrsel:
548 final_type = R_PARISC_PCREL17R;
549 break;
550 case e_fsel:
551 final_type = R_PARISC_PCREL17F;
552 break;
553 default:
554 return NULL;
555 }
556 break;
557
341362b5
JL
558 case 22:
559 switch (field)
560 {
561 case e_fsel:
562 final_type = R_PARISC_PCREL22F;
563 break;
564 default:
565 return NULL;
566 }
567 break;
568
9e103c9c
JL
569 case 21:
570 switch (field)
571 {
572 case e_lsel:
573 case e_lrsel:
574 final_type = R_PARISC_PCREL21L;
575 break;
576 default:
577 return NULL;
578 }
579 break;
580
581 default:
582 return NULL;
583 }
584 break;
585
fc91f658
JL
586 case R_PARISC_SEGREL32:
587 case R_PARISC_SEGBASE:
588 /* The defaults are fine for these cases. */
589 break;
590
9e103c9c
JL
591 default:
592 return NULL;
593 }
594
595 return final_types;
596}
597
598/* Translate from an elf into field into a howto relocation pointer. */
599
600static void
601elf_hppa_info_to_howto (abfd, bfd_reloc, elf_reloc)
be7582f3 602 bfd *abfd;
9e103c9c
JL
603 arelent *bfd_reloc;
604 Elf_Internal_Rela *elf_reloc;
605{
606 BFD_ASSERT (ELF_R_TYPE(elf_reloc->r_info)
607 < (unsigned int) R_PARISC_UNIMPLEMENTED);
608 bfd_reloc->howto = &elf_hppa_howto_table[ELF_R_TYPE (elf_reloc->r_info)];
609}
610
611/* Translate from an elf into field into a howto relocation pointer. */
612
613static void
614elf_hppa_info_to_howto_rel (abfd, bfd_reloc, elf_reloc)
be7582f3 615 bfd *abfd;
9e103c9c
JL
616 arelent *bfd_reloc;
617 Elf_Internal_Rel *elf_reloc;
618{
619 BFD_ASSERT (ELF_R_TYPE(elf_reloc->r_info)
620 < (unsigned int) R_PARISC_UNIMPLEMENTED);
621 bfd_reloc->howto = &elf_hppa_howto_table[ELF_R_TYPE (elf_reloc->r_info)];
622}
623
624/* Return the address of the howto table entry to perform the CODE
625 relocation for an ARCH machine. */
626
627static reloc_howto_type *
628elf_hppa_reloc_type_lookup (abfd, code)
be7582f3 629 bfd *abfd;
9e103c9c
JL
630 bfd_reloc_code_real_type code;
631{
632 if ((int) code < (int) R_PARISC_UNIMPLEMENTED)
633 {
634 BFD_ASSERT ((int) elf_hppa_howto_table[(int) code].type == (int) code);
635 return &elf_hppa_howto_table[(int) code];
636 }
637 return NULL;
638}
95cbae0b
JL
639
640static void
641elf_hppa_final_write_processing (abfd, linker)
642 bfd *abfd;
be7582f3 643 boolean linker;
95cbae0b
JL
644{
645 int mach = bfd_get_mach (abfd);
646
647 elf_elfheader (abfd)->e_flags &= ~(EF_PARISC_ARCH | EF_PARISC_TRAPNIL
648 | EF_PARISC_EXT | EF_PARISC_LSB
649 | EF_PARISC_WIDE | EF_PARISC_NO_KABP
650 | EF_PARISC_LAZYSWAP);
651
652 if (mach == 10)
653 elf_elfheader (abfd)->e_flags |= EFA_PARISC_1_0;
654 else if (mach == 11)
655 elf_elfheader (abfd)->e_flags |= EFA_PARISC_1_1;
656 else if (mach == 20)
3a9acac8
JL
657 elf_elfheader (abfd)->e_flags |= EFA_PARISC_2_0;
658 else if (mach == 25)
b2df1460
JL
659 elf_elfheader (abfd)->e_flags |= (EF_PARISC_WIDE
660 | EFA_PARISC_2_0
661 /* The GNU tools have trapped without
662 option since 1993, so need to take
663 a step backwards with the ELF
664 based toolchains. */
665 | EF_PARISC_TRAPNIL);
95cbae0b 666}
432bdd91
JL
667
668/* Return true if SYM represents a local label symbol. */
669
670static boolean
671elf_hppa_is_local_label_name (abfd, name)
672 bfd *abfd ATTRIBUTE_UNUSED;
673 const char *name;
674{
675 return (name[0] == 'L' && name[1] == '$');
676}
677
052e120f
JL
678/* Set the correct type for an ELF section. We do this by the
679 section name, which is a hack, but ought to work. */
680
681static boolean
682elf_hppa_fake_sections (abfd, hdr, sec)
683 bfd *abfd;
684 Elf64_Internal_Shdr *hdr;
685 asection *sec;
686{
687 register const char *name;
688
689 name = bfd_get_section_name (abfd, sec);
690
691 if (strcmp (name, ".PARISC.unwind") == 0)
692 {
1ca74062 693 int indx;
183df869 694 asection *sec;
052e120f
JL
695 hdr->sh_type = SHT_LOPROC + 1;
696 /* ?!? How are unwinds supposed to work for symbols in arbitrary
697 sections? Or what if we have multiple .text sections in a single
be7582f3 698 .o file? HP really messed up on this one.
052e120f 699
1ca74062
JL
700 Ugh. We can not use elf_section_data (sec)->this_idx at this
701 point because it is not initialized yet.
702
703 So we (gasp) recompute it here. Hopefully nobody ever changes the
704 way sections are numbered in elf.c! */
705 for (sec = abfd->sections, indx = 1; sec; sec = sec->next, indx++)
706 {
707 if (sec->name && strcmp (sec->name, ".text") == 0)
708 {
709 hdr->sh_info = indx;
710 break;
711 }
712 }
be7582f3 713
052e120f
JL
714 /* I have no idea if this is really necessary or what it means. */
715 hdr->sh_entsize = 4;
716 }
717 return true;
718}
719
2eb429af
JL
720/* Hook called by the linker routine which adds symbols from an object
721 file. HP's libraries define symbols with HP specific section
722 indices, which we have to handle. */
723
724static boolean
725elf_hppa_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
726 bfd *abfd;
727 struct bfd_link_info *info ATTRIBUTE_UNUSED;
728 const Elf_Internal_Sym *sym;
729 const char **namep ATTRIBUTE_UNUSED;
730 flagword *flagsp ATTRIBUTE_UNUSED;
731 asection **secp;
732 bfd_vma *valp;
733{
734 int index = sym->st_shndx;
be7582f3 735
2eb429af
JL
736 switch (index)
737 {
738 case SHN_PARISC_ANSI_COMMON:
739 *secp = bfd_make_section_old_way (abfd, ".PARISC.ansi.common");
740 (*secp)->flags |= SEC_IS_COMMON;
741 *valp = sym->st_size;
742 break;
be7582f3 743
2eb429af
JL
744 case SHN_PARISC_HUGE_COMMON:
745 *secp = bfd_make_section_old_way (abfd, ".PARISC.huge.common");
746 (*secp)->flags |= SEC_IS_COMMON;
747 *valp = sym->st_size;
748 break;
749 }
750
751 return true;
752}
753
af7dc644
JL
754static boolean
755elf_hppa_unmark_useless_dynamic_symbols (h, data)
756 struct elf_link_hash_entry *h;
757 PTR data;
758{
759 struct bfd_link_info *info = (struct bfd_link_info *)data;
760
761 /* If we are not creating a shared library, and this symbol is
762 referenced by a shared library but is not defined anywhere, then
763 the generic code will warn that it is undefined.
764
765 This behavior is undesirable on HPs since the standard shared
766 libraries contain reerences to undefined symbols.
767
768 So we twiddle the flags associated with such symbols so that they
769 will not trigger the warning. ?!? FIXME. This is horribly fraglie.
770
771 Ultimately we should have better controls over the generic ELF BFD
772 linker code. */
773 if (! info->relocateable
774 && ! (info->shared
775 && !info->no_undefined)
776 && h->root.type == bfd_link_hash_undefined
777 && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_DYNAMIC) != 0
778 && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_REGULAR) == 0)
779 {
780 h->elf_link_hash_flags &= ~ELF_LINK_HASH_REF_DYNAMIC;
781 h->elf_link_hash_flags |= 0x8000;
782 }
783
784 return true;
785}
786
787
788static boolean
789elf_hppa_remark_useless_dynamic_symbols (h, data)
790 struct elf_link_hash_entry *h;
791 PTR data;
792{
793 struct bfd_link_info *info = (struct bfd_link_info *)data;
794
795 /* If we are not creating a shared library, and this symbol is
796 referenced by a shared library but is not defined anywhere, then
797 the generic code will warn that it is undefined.
798
799 This behavior is undesirable on HPs since the standard shared
800 libraries contain reerences to undefined symbols.
801
802 So we twiddle the flags associated with such symbols so that they
228d307f 803 will not trigger the warning. ?!? FIXME. This is horribly fragile.
af7dc644
JL
804
805 Ultimately we should have better controls over the generic ELF BFD
806 linker code. */
807 if (! info->relocateable
808 && ! (info->shared
809 && !info->no_undefined)
810 && h->root.type == bfd_link_hash_undefined
811 && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_DYNAMIC) == 0
812 && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_REGULAR) == 0
813 && (h->elf_link_hash_flags & 0x8000) != 0)
814 {
815 h->elf_link_hash_flags |= ELF_LINK_HASH_REF_DYNAMIC;
816 h->elf_link_hash_flags &= ~0x8000;
817 }
818
819 return true;
820}
821
2ec0dd12
JL
822/* Record the lowest address for the data and text segments. */
823static void
824elf_hppa_record_segment_addrs (abfd, section, data)
825 bfd *abfd ATTRIBUTE_UNUSED;
826 asection *section;
827 PTR data;
828{
829 struct elf64_hppa_link_hash_table *hppa_info;
830 bfd_vma value;
831
832 hppa_info = (struct elf64_hppa_link_hash_table *)data;
833
834 value = section->vma - section->filepos;
835
836 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY)
837 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
838 && value < hppa_info->text_segment_base)
839 hppa_info->text_segment_base = value;
840 else if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY)
841 == (SEC_ALLOC | SEC_LOAD))
842 && value < hppa_info->data_segment_base)
843 hppa_info->data_segment_base = value;
844}
845
2eb429af
JL
846/* Called after we have seen all the input files/sections, but before
847 final symbol resolution and section placement has been determined.
848
849 We use this hook to (possibly) provide a value for __gp, then we
850 fall back to the generic ELF final link routine. */
851
852static boolean
853elf_hppa_final_link (abfd, info)
854 bfd *abfd;
855 struct bfd_link_info *info;
856{
af7dc644
JL
857 boolean retval;
858
19ef5465 859 if (! info->relocateable)
2eb429af 860 {
2eb429af 861 struct elf_link_hash_entry *gp;
19ef5465 862 bfd_vma gp_val;
1209c612 863 struct elf64_hppa_link_hash_table *hppa_info;
2eb429af 864
1209c612
JL
865 hppa_info = elf64_hppa_hash_table (info);
866
867 /* The linker script defines a value for __gp iff it was referenced
868 by one of the objects being linked. First try to find the symbol
869 in the hash table. If that fails, just compute the value __gp
870 should have had. */
19ef5465
JL
871 gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", false,
872 false, false);
2eb429af 873
1209c612
JL
874 if (gp)
875 {
876
877 /* Adjust the value of __gp as we may want to slide it into the
878 .plt section so that the stubs can access PLT entries without
879 using an addil sequence. */
880 gp->root.u.def.value += elf64_hppa_hash_table (info)->gp_offset;
881
882 gp_val = (gp->root.u.def.section->output_section->vma
883 + gp->root.u.def.section->output_offset
884 + gp->root.u.def.value);
885 }
886 else
887 {
888 asection *sec;
889
890
891 /* First look for a .plt section. If found, then __gp is the
892 address of the .plt + gp_offset.
893
894 If no .plt is found, then look for .dlt, .opd and .data (in
895 that order) and set __gp to the base address of whichever section
896 is found first. */
897
898 sec = hppa_info->plt_sec;
899 if (sec)
900 gp_val = (sec->output_offset
901 + sec->output_section->vma
902 + hppa_info->gp_offset);
903 else
904 {
905 sec = hppa_info->dlt_sec;
906 if (!sec)
907 sec = hppa_info->opd_sec;
908 if (!sec)
909 sec = bfd_get_section_by_name (abfd, ".data");
910 if (!sec)
911 return false;
912
913 gp_val = sec->output_offset + sec->output_section->vma;
914 }
915 }
2eb429af 916
1209c612 917 /* Install whatever value we found/computed for __gp. */
2eb429af
JL
918 _bfd_set_gp_value (abfd, gp_val);
919 }
920
2ec0dd12
JL
921 /* We need to know the base of the text and data segments so that we
922 can perform SEGREL relocations. We will recore the base addresses
923 when we encounter the first SEGREL relocation. */
924 elf64_hppa_hash_table (info)->text_segment_base = (bfd_vma)-1;
925 elf64_hppa_hash_table (info)->data_segment_base = (bfd_vma)-1;
926
af7dc644
JL
927 /* HP's shared libraries have references to symbols that are not
928 defined anywhere. The generic ELF BFD linker code will complaim
929 about such symbols.
930
931 So we detect the losing case and arrange for the flags on the symbol
932 to indicate that it was never referenced. This keeps the generic
933 ELF BFD link code happy and appears to not create any secondary
934 problems. Ultimately we need a way to control the behavior of the
935 generic ELF BFD link code better. */
936 elf_link_hash_traverse (elf_hash_table (info),
937 elf_hppa_unmark_useless_dynamic_symbols,
938 info);
939
2eb429af 940 /* Invoke the regular ELF backend linker to do all the work. */
af7dc644
JL
941 retval = bfd_elf_bfd_final_link (abfd, info);
942
943 elf_link_hash_traverse (elf_hash_table (info),
944 elf_hppa_remark_useless_dynamic_symbols,
945 info);
946
947 return retval;
2eb429af
JL
948}
949
950/* Relocate an HPPA ELF section. */
951
952static boolean
953elf_hppa_relocate_section (output_bfd, info, input_bfd, input_section,
954 contents, relocs, local_syms, local_sections)
955 bfd *output_bfd;
956 struct bfd_link_info *info;
957 bfd *input_bfd;
958 asection *input_section;
959 bfd_byte *contents;
960 Elf_Internal_Rela *relocs;
961 Elf_Internal_Sym *local_syms;
962 asection **local_sections;
963{
964 Elf_Internal_Shdr *symtab_hdr;
965 Elf_Internal_Rela *rel;
966 Elf_Internal_Rela *relend;
be7582f3 967 struct elf64_hppa_link_hash_table *hppa_info = elf64_hppa_hash_table (info);
2eb429af
JL
968
969 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
970
971 rel = relocs;
972 relend = relocs + input_section->reloc_count;
973 for (; rel < relend; rel++)
974 {
975 int r_type;
b2e311df 976 reloc_howto_type *howto = elf_hppa_howto_table + ELF_R_TYPE (rel->r_info);
2eb429af
JL
977 unsigned long r_symndx;
978 struct elf_link_hash_entry *h;
979 Elf_Internal_Sym *sym;
980 asection *sym_sec;
981 bfd_vma relocation;
982 bfd_reloc_status_type r;
983 const char *sym_name;
be7582f3
JL
984 char *dyn_name;
985 char *dynh_buf = NULL;
986 size_t dynh_buflen = 0;
987 struct elf64_hppa_dyn_hash_entry *dyn_h = NULL;
2eb429af
JL
988
989 r_type = ELF_R_TYPE (rel->r_info);
990 if (r_type < 0 || r_type >= (int) R_PARISC_UNIMPLEMENTED)
991 {
992 bfd_set_error (bfd_error_bad_value);
993 return false;
994 }
2eb429af
JL
995
996 r_symndx = ELF_R_SYM (rel->r_info);
997
998 if (info->relocateable)
999 {
1000 /* This is a relocateable link. We don't have to change
1001 anything, unless the reloc is against a section symbol,
1002 in which case we have to adjust according to where the
1003 section symbol winds up in the output section. */
1004 if (r_symndx < symtab_hdr->sh_info)
1005 {
1006 sym = local_syms + r_symndx;
1007 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
1008 {
1009 sym_sec = local_sections[r_symndx];
1010 rel->r_addend += sym_sec->output_offset;
1011 }
1012 }
1013
1014 continue;
1015 }
1016
1017 /* This is a final link. */
1018 h = NULL;
1019 sym = NULL;
1020 sym_sec = NULL;
1021 if (r_symndx < symtab_hdr->sh_info)
1022 {
be7582f3 1023 /* This is a local symbol. */
2eb429af
JL
1024 sym = local_syms + r_symndx;
1025 sym_sec = local_sections[r_symndx];
1026 relocation = ((ELF_ST_TYPE (sym->st_info) == STT_SECTION
1027 ? 0 : sym->st_value)
1028 + sym_sec->output_offset
1029 + sym_sec->output_section->vma);
be7582f3
JL
1030
1031 /* If this symbol has an entry in the PA64 dynamic hash
1032 table, then get it. */
1033 dyn_name = get_dyn_name (input_bfd, h, rel,
1034 &dynh_buf, &dynh_buflen);
1035 dyn_h = elf64_hppa_dyn_hash_lookup (&hppa_info->dyn_hash_table,
1036 dyn_name, false, false);
1037
2eb429af
JL
1038 }
1039 else
1040 {
be7582f3 1041 /* This is not a local symbol. */
2eb429af
JL
1042 long indx;
1043
1044 indx = r_symndx - symtab_hdr->sh_info;
1045 h = elf_sym_hashes (input_bfd)[indx];
1046 while (h->root.type == bfd_link_hash_indirect
1047 || h->root.type == bfd_link_hash_warning)
1048 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1049 if (h->root.type == bfd_link_hash_defined
1050 || h->root.type == bfd_link_hash_defweak)
1051 {
1052 sym_sec = h->root.u.def.section;
be7582f3 1053
be7582f3
JL
1054 /* If this symbol has an entry in the PA64 dynamic hash
1055 table, then get it. */
1056 dyn_name = get_dyn_name (input_bfd, h, rel,
1057 &dynh_buf, &dynh_buflen);
1058 dyn_h = elf64_hppa_dyn_hash_lookup (&hppa_info->dyn_hash_table,
1059 dyn_name, false, false);
1060
1061 /* If we have a relocation against a symbol defined in a
1062 shared library and we have not created an entry in the
1063 PA64 dynamic symbol hash table for it, then we lose. */
1064 if (sym_sec->output_section == NULL && dyn_h == NULL)
1065 {
1066 (*_bfd_error_handler)
1067 (_("%s: warning: unresolvable relocation against symbol `%s' from %s section"),
1068 bfd_get_filename (input_bfd), h->root.root.string,
1069 bfd_get_section_name (input_bfd, input_section));
1070 relocation = 0;
1071 }
1072 else if (sym_sec->output_section)
1073 relocation = (h->root.u.def.value
1074 + sym_sec->output_offset
1075 + sym_sec->output_section->vma);
1076 /* Value will be provided via one of the offsets in the
1077 dyn_h hash table entry. */
1078 else
1079 relocation = 0;
2eb429af 1080 }
dfec422f
JL
1081 /* Allow undefined symbols in shared libraries. */
1082 else if (info->shared && !info->symbolic && !info->no_undefined)
1083 {
1084 /* If this symbol has an entry in the PA64 dynamic hash
1085 table, then get it. */
1086 dyn_name = get_dyn_name (input_bfd, h, rel,
1087 &dynh_buf, &dynh_buflen);
1088 dyn_h = elf64_hppa_dyn_hash_lookup (&hppa_info->dyn_hash_table,
1089 dyn_name, false, false);
1090
1091 if (dyn_h == NULL)
1092 {
1093 (*_bfd_error_handler)
1094 (_("%s: warning: unresolvable relocation against symbol `%s' from %s section"),
1095 bfd_get_filename (input_bfd), h->root.root.string,
1096 bfd_get_section_name (input_bfd, input_section));
1097 relocation = 0;
1098 }
1099 relocation = 0;
1100 }
2eb429af
JL
1101 else if (h->root.type == bfd_link_hash_undefweak)
1102 relocation = 0;
1103 else
1104 {
1105 if (!((*info->callbacks->undefined_symbol)
1106 (info, h->root.root.string, input_bfd,
1107 input_section, rel->r_offset)))
1108 return false;
1109 break;
1110 }
1111 }
1112
1113 if (h != NULL)
1114 sym_name = h->root.root.string;
1115 else
1116 {
1117 sym_name = bfd_elf_string_from_elf_section (input_bfd,
1118 symtab_hdr->sh_link,
1119 sym->st_name);
1120 if (sym_name == NULL)
1121 return false;
1122 if (*sym_name == '\0')
1123 sym_name = bfd_section_name (input_bfd, sym_sec);
1124 }
1125
be7582f3 1126 r = elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
2eb429af 1127 input_section, contents,
be7582f3
JL
1128 relocation, info, sym_sec,
1129 h, dyn_h);
2eb429af
JL
1130
1131 if (r != bfd_reloc_ok)
1132 {
1133 switch (r)
1134 {
1135 default:
1136 abort ();
1137 case bfd_reloc_overflow:
1138 {
1139 if (!((*info->callbacks->reloc_overflow)
1140 (info, sym_name, howto->name, (bfd_vma) 0,
1141 input_bfd, input_section, rel->r_offset)))
1142 return false;
1143 }
1144 break;
1145 }
1146 }
1147 }
1148 return true;
1149}
1150
1151
be7582f3
JL
1152/* Compute the value for a relocation (REL) during a final link stage,
1153 then insert the value into the proper location in CONTENTS.
1154
1155 VALUE is a tentative value for the relocation and may be overridden
1156 and modified here based on the specific relocation to be performed.
1157
1158 For example we do conversions for PC-relative branches in this routine
1159 or redirection of calls to external routines to stubs.
1160
1161 The work of actually applying the relocation is left to a helper
1162 routine in an attempt to reduce the complexity and size of this
1163 function. */
2eb429af
JL
1164
1165static bfd_reloc_status_type
be7582f3
JL
1166elf_hppa_final_link_relocate (rel, input_bfd, output_bfd,
1167 input_section, contents, value,
1168 info, sym_sec, h, dyn_h)
1169 Elf_Internal_Rela *rel;
2eb429af 1170 bfd *input_bfd;
be7582f3 1171 bfd *output_bfd;
2eb429af
JL
1172 asection *input_section;
1173 bfd_byte *contents;
2eb429af 1174 bfd_vma value;
2eb429af
JL
1175 struct bfd_link_info *info;
1176 asection *sym_sec;
be7582f3
JL
1177 struct elf_link_hash_entry *h;
1178 struct elf64_hppa_dyn_hash_entry *dyn_h;
2eb429af
JL
1179{
1180 unsigned long insn;
be7582f3
JL
1181 bfd_vma offset = rel->r_offset;
1182 bfd_vma addend = rel->r_addend;
1183 reloc_howto_type *howto = elf_hppa_howto_table + ELF_R_TYPE (rel->r_info);
2eb429af 1184 unsigned long r_type = howto->type;
2eb429af
JL
1185 unsigned long r_field = e_fsel;
1186 bfd_byte *hit_data = contents + offset;
be7582f3 1187 struct elf64_hppa_link_hash_table *hppa_info = elf64_hppa_hash_table (info);
2eb429af
JL
1188
1189 insn = bfd_get_32 (input_bfd, hit_data);
1190
2eb429af
JL
1191 switch (r_type)
1192 {
1193 case R_PARISC_NONE:
1194 break;
1195
571047ad 1196 /* Random PC relative relocs. */
b233eaab
JL
1197 case R_PARISC_PCREL21L:
1198 case R_PARISC_PCREL14R:
1199 case R_PARISC_PCREL14F:
571047ad
JL
1200 case R_PARISC_PCREL14WR:
1201 case R_PARISC_PCREL14DR:
1202 case R_PARISC_PCREL16F:
1203 case R_PARISC_PCREL16WF:
1204 case R_PARISC_PCREL16DF:
1205 {
1206 if (r_type == R_PARISC_PCREL21L)
1207 r_field = e_lsel;
1208 else if (r_type == R_PARISC_PCREL14F
1209 || r_type == R_PARISC_PCREL16F
1210 || r_type == R_PARISC_PCREL16WF
1211 || r_type == R_PARISC_PCREL16DF)
1212 r_field = e_fsel;
1213 else
1214 r_field = e_rsel;
1215
1216 /* If this is a call to a function defined in another dynamic
1217 library, then redirect the call to the local stub for this
1218 function. */
dfec422f
JL
1219 if (sym_sec == NULL || sym_sec->output_section == NULL)
1220 value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
1221 + hppa_info->stub_sec->output_section->vma);
571047ad
JL
1222
1223 /* Turn VALUE into a proper PC relative address. */
1224 value -= (offset + input_section->output_offset
1225 + input_section->output_section->vma);
1226
1227 /* Adjust for any field selectors. */
1228 value = hppa_field_adjust (value, -8 + addend, r_field);
1229
1230 /* Apply the relocation to the given instruction. */
1231 insn = elf_hppa_relocate_insn (insn, value, r_type);
1232 break;
1233 }
1234
be7582f3
JL
1235 /* Basic function call support. I'm not entirely sure if PCREL14F is
1236 actually needed or even handled correctly.
1237
1238 Note for a call to a function defined in another dynamic library
1239 we want to redirect the call to a stub. */
2eb429af
JL
1240 case R_PARISC_PCREL22F:
1241 case R_PARISC_PCREL17F:
571047ad
JL
1242 case R_PARISC_PCREL22C:
1243 case R_PARISC_PCREL17C:
1244 case R_PARISC_PCREL17R:
2eb429af 1245 {
571047ad
JL
1246 if (r_type == R_PARISC_PCREL17R)
1247 r_field = e_rsel;
1248 else
1249 r_field = e_fsel;
1250
be7582f3
JL
1251 /* If this is a call to a function defined in another dynamic
1252 library, then redirect the call to the local stub for this
1253 function. */
dfec422f 1254 if (sym_sec == NULL || sym_sec->output_section == NULL)
6a0b9871
JL
1255 value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
1256 + hppa_info->stub_sec->output_section->vma);
be7582f3
JL
1257
1258 /* Turn VALUE into a proper PC relative address. */
1259 value -= (offset + input_section->output_offset
1260 + input_section->output_section->vma);
1261
1262 /* Adjust for any field selectors. */
571047ad 1263 value = hppa_field_adjust (value, -8 + addend, e_fsel);
2eb429af 1264
be7582f3
JL
1265 /* All branches are implicitly shifted by 2 places. */
1266 value >>= 2;
2eb429af 1267
be7582f3
JL
1268 /* Apply the relocation to the given instruction. */
1269 insn = elf_hppa_relocate_insn (insn, value, r_type);
2eb429af
JL
1270 break;
1271 }
1272
be7582f3
JL
1273 /* Indirect references to data through the DLT. */
1274 case R_PARISC_DLTIND14R:
571047ad 1275 case R_PARISC_DLTIND14F:
be7582f3
JL
1276 case R_PARISC_DLTIND14DR:
1277 case R_PARISC_DLTIND14WR:
1278 case R_PARISC_DLTIND21L:
e5bb3efc
JL
1279 case R_PARISC_LTOFF_FPTR14R:
1280 case R_PARISC_LTOFF_FPTR14DR:
1281 case R_PARISC_LTOFF_FPTR14WR:
1282 case R_PARISC_LTOFF_FPTR21L:
1283 case R_PARISC_LTOFF_FPTR16F:
1284 case R_PARISC_LTOFF_FPTR16WF:
1285 case R_PARISC_LTOFF_FPTR16DF:
b233eaab
JL
1286 case R_PARISC_LTOFF_TP21L:
1287 case R_PARISC_LTOFF_TP14R:
1288 case R_PARISC_LTOFF_TP14F:
1289 case R_PARISC_LTOFF_TP14WR:
1290 case R_PARISC_LTOFF_TP14DR:
1291 case R_PARISC_LTOFF_TP16F:
1292 case R_PARISC_LTOFF_TP16WF:
1293 case R_PARISC_LTOFF_TP16DF:
b7263961
JL
1294 case R_PARISC_LTOFF16F:
1295 case R_PARISC_LTOFF16WF:
1296 case R_PARISC_LTOFF16DF:
c8933571 1297 {
6a0b9871
JL
1298 /* If this relocation was against a local symbol, then we still
1299 have not set up the DLT entry (it's not convienent to do so
1300 in the "finalize_dlt" routine because it is difficult to get
1301 to the local symbol's value).
1302
1303 So, if this is a local symbol (h == NULL), then we need to
e48c661e
JL
1304 fill in its DLT entry.
1305
1306 Similarly we may still need to set up an entry in .opd for
1307 a local function which had its address taken. */
6a0b9871
JL
1308 if (dyn_h->h == NULL)
1309 {
1310 bfd_put_64 (hppa_info->dlt_sec->owner,
1311 value,
1312 hppa_info->dlt_sec->contents + dyn_h->dlt_offset);
e48c661e
JL
1313
1314 /* Now handle .opd creation if needed. */
1315 if (r_type == R_PARISC_LTOFF_FPTR14R
1316 || r_type == R_PARISC_LTOFF_FPTR14DR
1317 || r_type == R_PARISC_LTOFF_FPTR14WR
1318 || r_type == R_PARISC_LTOFF_FPTR21L
1319 || r_type == R_PARISC_LTOFF_FPTR16F
1320 || r_type == R_PARISC_LTOFF_FPTR16WF
1321 || r_type == R_PARISC_LTOFF_FPTR16DF)
1322 {
1323 /* The first two words of an .opd entry are zero. */
1324 memset (hppa_info->opd_sec->contents + dyn_h->opd_offset,
1325 0, 16);
1326
1327 /* The next word is the address of the function. */
1328 bfd_put_64 (hppa_info->opd_sec->owner, value,
1329 (hppa_info->opd_sec->contents
1330 + dyn_h->opd_offset + 16));
1331
1332 /* The last word is our local __gp value. */
1333 value = _bfd_get_gp_value
1334 (hppa_info->opd_sec->output_section->owner);
1335 bfd_put_64 (hppa_info->opd_sec->owner, value,
1336 (hppa_info->opd_sec->contents
1337 + dyn_h->opd_offset + 24));
1338 }
6a0b9871
JL
1339 }
1340
be7582f3 1341 /* We want the value of the DLT offset for this symbol, not
19ef5465
JL
1342 the symbol's actual address. Note that __gp may not point
1343 to the start of the DLT, so we have to compute the absolute
1344 address, then subtract out the value of __gp. */
1345 value = (dyn_h->dlt_offset
1346 + hppa_info->dlt_sec->output_offset
1347 + hppa_info->dlt_sec->output_section->vma);
1348 value -= _bfd_get_gp_value (output_bfd);
1349
be7582f3
JL
1350
1351 /* All DLTIND relocations are basically the same at this point,
1352 except that we need different field selectors for the 21bit
1353 version vs the 14bit versions. */
e5bb3efc 1354 if (r_type == R_PARISC_DLTIND21L
b233eaab
JL
1355 || r_type == R_PARISC_LTOFF_FPTR21L
1356 || r_type == R_PARISC_LTOFF_TP21L)
be7582f3 1357 value = hppa_field_adjust (value, addend, e_lrsel);
571047ad
JL
1358 else if (r_type == R_PARISC_DLTIND14F
1359 || r_type == R_PARISC_LTOFF_FPTR16F
1360 || r_type == R_PARISC_LTOFF_FPTR16WF
b233eaab 1361 || r_type == R_PARISC_LTOFF_FPTR16DF
b7263961
JL
1362 || r_type == R_PARISC_LTOFF16F
1363 || r_type == R_PARISC_LTOFF16DF
1364 || r_type == R_PARISC_LTOFF16WF
b233eaab
JL
1365 || r_type == R_PARISC_LTOFF_TP16F
1366 || r_type == R_PARISC_LTOFF_TP16WF
1367 || r_type == R_PARISC_LTOFF_TP16DF)
e5bb3efc 1368 value = hppa_field_adjust (value, addend, e_fsel);
be7582f3
JL
1369 else
1370 value = hppa_field_adjust (value, addend, e_rrsel);
1371
1372 insn = elf_hppa_relocate_insn (insn, value, r_type);
c8933571
JL
1373 break;
1374 }
1375
be7582f3 1376 case R_PARISC_DLTREL14R:
571047ad 1377 case R_PARISC_DLTREL14F:
be7582f3
JL
1378 case R_PARISC_DLTREL14DR:
1379 case R_PARISC_DLTREL14WR:
c8933571 1380 case R_PARISC_DLTREL21L:
6849fb4d
JL
1381 case R_PARISC_DPREL21L:
1382 case R_PARISC_DPREL14WR:
1383 case R_PARISC_DPREL14DR:
1384 case R_PARISC_DPREL14R:
1385 case R_PARISC_DPREL14F:
1386 case R_PARISC_GPREL16F:
1387 case R_PARISC_GPREL16WF:
1388 case R_PARISC_GPREL16DF:
c8933571 1389 {
be7582f3
JL
1390 /* Subtract out the global pointer value to make value a DLT
1391 relative address. */
1392 value -= _bfd_get_gp_value (output_bfd);
1393
1394 /* All DLTREL relocations are basically the same at this point,
1395 except that we need different field selectors for the 21bit
1396 version vs the 14bit versions. */
6849fb4d
JL
1397 if (r_type == R_PARISC_DLTREL21L
1398 || r_type == R_PARISC_DPREL21L)
be7582f3 1399 value = hppa_field_adjust (value, addend, e_lrsel);
6849fb4d
JL
1400 else if (r_type == R_PARISC_DLTREL14F
1401 || r_type == R_PARISC_DPREL14F
1402 || r_type == R_PARISC_GPREL16F
1403 || r_type == R_PARISC_GPREL16WF
1404 || r_type == R_PARISC_GPREL16DF)
571047ad 1405 value = hppa_field_adjust (value, addend, e_fsel);
be7582f3
JL
1406 else
1407 value = hppa_field_adjust (value, addend, e_rrsel);
1408
1409 insn = elf_hppa_relocate_insn (insn, value, r_type);
c8933571
JL
1410 break;
1411 }
1412
b7263961
JL
1413 case R_PARISC_DIR21L:
1414 case R_PARISC_DIR17R:
1415 case R_PARISC_DIR17F:
1416 case R_PARISC_DIR14R:
1417 case R_PARISC_DIR14WR:
1418 case R_PARISC_DIR14DR:
1419 case R_PARISC_DIR16F:
1420 case R_PARISC_DIR16WF:
1421 case R_PARISC_DIR16DF:
1422 {
1423 /* All DIR relocations are basically the same at this point,
1424 except that we need different field selectors for the 21bit
1425 version vs the 14bit versions. */
1426 if (r_type == R_PARISC_DIR21L)
1427 value = hppa_field_adjust (value, addend, e_lrsel);
1428 else if (r_type == R_PARISC_DIR17F
1429 || r_type == R_PARISC_DIR16F
1430 || r_type == R_PARISC_DIR16WF
1431 || r_type == R_PARISC_DIR16DF)
1432 value = hppa_field_adjust (value, addend, e_fsel);
1433 else
1434 value = hppa_field_adjust (value, addend, e_rrsel);
1435
1436 insn = elf_hppa_relocate_insn (insn, value, r_type);
1437 break;
1438 }
1439
8267b155
JL
1440 case R_PARISC_PLTOFF21L:
1441 case R_PARISC_PLTOFF14R:
1442 case R_PARISC_PLTOFF14F:
1443 case R_PARISC_PLTOFF14WR:
1444 case R_PARISC_PLTOFF14DR:
1445 case R_PARISC_PLTOFF16F:
1446 case R_PARISC_PLTOFF16WF:
1447 case R_PARISC_PLTOFF16DF:
1448 {
1449 /* We want the value of the PLT offset for this symbol, not
19ef5465
JL
1450 the symbol's actual address. Note that __gp may not point
1451 to the start of the DLT, so we have to compute the absolute
1452 address, then subtract out the value of __gp. */
1453 value = (dyn_h->plt_offset
1454 + hppa_info->plt_sec->output_offset
1455 + hppa_info->plt_sec->output_section->vma);
1456 value -= _bfd_get_gp_value (output_bfd);
8267b155
JL
1457
1458 /* All PLTOFF relocations are basically the same at this point,
1459 except that we need different field selectors for the 21bit
1460 version vs the 14bit versions. */
1461 if (r_type == R_PARISC_PLTOFF21L)
1462 value = hppa_field_adjust (value, addend, e_lrsel);
1463 else if (r_type == R_PARISC_PLTOFF14F
1464 || r_type == R_PARISC_PLTOFF16F
1465 || r_type == R_PARISC_PLTOFF16WF
1466 || r_type == R_PARISC_PLTOFF16DF)
1467 value = hppa_field_adjust (value, addend, e_fsel);
1468 else
1469 value = hppa_field_adjust (value, addend, e_rrsel);
1470
1471 insn = elf_hppa_relocate_insn (insn, value, r_type);
1472 break;
1473 }
1474
e5bb3efc
JL
1475 case R_PARISC_LTOFF_FPTR32:
1476 {
e48c661e
JL
1477 /* We may still need to create the FPTR itself if it was for
1478 a local symbol. */
1479 if (dyn_h->h == NULL)
1480 {
1481 /* The first two words of an .opd entry are zero. */
1482 memset (hppa_info->opd_sec->contents + dyn_h->opd_offset, 0, 16);
1483
1484 /* The next word is the address of the function. */
1485 bfd_put_64 (hppa_info->opd_sec->owner, value,
1486 (hppa_info->opd_sec->contents
1487 + dyn_h->opd_offset + 16));
1488
1489 /* The last word is our local __gp value. */
1490 value = _bfd_get_gp_value
1491 (hppa_info->opd_sec->output_section->owner);
1492 bfd_put_64 (hppa_info->opd_sec->owner, value,
1493 hppa_info->opd_sec->contents + dyn_h->opd_offset + 24);
1494 }
1495
e5bb3efc 1496 /* We want the value of the DLT offset for this symbol, not
19ef5465
JL
1497 the symbol's actual address. Note that __gp may not point
1498 to the start of the DLT, so we have to compute the absolute
1499 address, then subtract out the value of __gp. */
1500 value = (dyn_h->dlt_offset
1501 + hppa_info->dlt_sec->output_offset
1502 + hppa_info->dlt_sec->output_section->vma);
1503 value -= _bfd_get_gp_value (output_bfd);
e5bb3efc
JL
1504 bfd_put_32 (input_bfd, value, hit_data);
1505 return bfd_reloc_ok;
1506 }
1507
e5bb3efc 1508 case R_PARISC_LTOFF_FPTR64:
b233eaab 1509 case R_PARISC_LTOFF_TP64:
e5bb3efc 1510 {
e48c661e
JL
1511 /* We may still need to create the FPTR itself if it was for
1512 a local symbol. */
1513 if (dyn_h->h == NULL && r_type == R_PARISC_LTOFF_FPTR64)
1514 {
1515 /* The first two words of an .opd entry are zero. */
1516 memset (hppa_info->opd_sec->contents + dyn_h->opd_offset, 0, 16);
1517
1518 /* The next word is the address of the function. */
1519 bfd_put_64 (hppa_info->opd_sec->owner, value,
1520 (hppa_info->opd_sec->contents
1521 + dyn_h->opd_offset + 16));
1522
1523 /* The last word is our local __gp value. */
1524 value = _bfd_get_gp_value
1525 (hppa_info->opd_sec->output_section->owner);
1526 bfd_put_64 (hppa_info->opd_sec->owner, value,
1527 hppa_info->opd_sec->contents + dyn_h->opd_offset + 24);
1528 }
1529
e5bb3efc 1530 /* We want the value of the DLT offset for this symbol, not
19ef5465
JL
1531 the symbol's actual address. Note that __gp may not point
1532 to the start of the DLT, so we have to compute the absolute
1533 address, then subtract out the value of __gp. */
1534 value = (dyn_h->dlt_offset
1535 + hppa_info->dlt_sec->output_offset
1536 + hppa_info->dlt_sec->output_section->vma);
1537 value -= _bfd_get_gp_value (output_bfd);
e5bb3efc
JL
1538 bfd_put_64 (input_bfd, value, hit_data);
1539 return bfd_reloc_ok;
1540 }
1541
1542 case R_PARISC_DIR32:
571047ad 1543 bfd_put_32 (input_bfd, value + addend, hit_data);
e5bb3efc
JL
1544 return bfd_reloc_ok;
1545
1546 case R_PARISC_DIR64:
571047ad 1547 bfd_put_64 (input_bfd, value + addend, hit_data);
e5bb3efc
JL
1548 return bfd_reloc_ok;
1549
6849fb4d
JL
1550 case R_PARISC_GPREL64:
1551 /* Subtract out the global pointer value to make value a DLT
1552 relative address. */
1553 value -= _bfd_get_gp_value (output_bfd);
1554 value += addend;
1555
1556 bfd_put_64 (input_bfd, value + addend, hit_data);
1557 return bfd_reloc_ok;
1558
b7263961 1559 case R_PARISC_LTOFF64:
19ef5465
JL
1560 /* We want the value of the DLT offset for this symbol, not
1561 the symbol's actual address. Note that __gp may not point
1562 to the start of the DLT, so we have to compute the absolute
1563 address, then subtract out the value of __gp. */
1564 value = (dyn_h->dlt_offset
1565 + hppa_info->dlt_sec->output_offset
1566 + hppa_info->dlt_sec->output_section->vma);
1567 value -= _bfd_get_gp_value (output_bfd);
b7263961
JL
1568
1569 bfd_put_64 (input_bfd, value + addend, hit_data);
1570 return bfd_reloc_ok;
1571
571047ad
JL
1572 case R_PARISC_PCREL32:
1573 {
1574 /* If this is a call to a function defined in another dynamic
1575 library, then redirect the call to the local stub for this
1576 function. */
dfec422f
JL
1577 if (sym_sec == NULL || sym_sec->output_section == NULL)
1578 value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
1579 + hppa_info->stub_sec->output_section->vma);
571047ad
JL
1580
1581 /* Turn VALUE into a proper PC relative address. */
1582 value -= (offset + input_section->output_offset
1583 + input_section->output_section->vma);
1584
b233eaab 1585 value += addend;
571047ad
JL
1586 value -= 8;
1587 bfd_put_64 (input_bfd, value, hit_data);
1588 return bfd_reloc_ok;
1589 }
1590
1591 case R_PARISC_PCREL64:
1592 {
1593 /* If this is a call to a function defined in another dynamic
1594 library, then redirect the call to the local stub for this
1595 function. */
dfec422f
JL
1596 if (sym_sec == NULL || sym_sec->output_section == NULL)
1597 value = (dyn_h->stub_offset + hppa_info->stub_sec->output_offset
1598 + hppa_info->stub_sec->output_section->vma);
1599
571047ad
JL
1600
1601 /* Turn VALUE into a proper PC relative address. */
1602 value -= (offset + input_section->output_offset
1603 + input_section->output_section->vma);
1604
b233eaab 1605 value += addend;
571047ad
JL
1606 value -= 8;
1607 bfd_put_64 (input_bfd, value, hit_data);
1608 return bfd_reloc_ok;
1609 }
1610
1611
e5bb3efc 1612 case R_PARISC_FPTR64:
e48c661e
JL
1613 {
1614 /* We may still need to create the FPTR itself if it was for
1615 a local symbol. */
1616 if (dyn_h->h == NULL)
1617 {
1618 /* The first two words of an .opd entry are zero. */
1619 memset (hppa_info->opd_sec->contents + dyn_h->opd_offset, 0, 16);
1620
1621 /* The next word is the address of the function. */
1622 bfd_put_64 (hppa_info->opd_sec->owner, value,
1623 (hppa_info->opd_sec->contents
1624 + dyn_h->opd_offset + 16));
1625
1626 /* The last word is our local __gp value. */
1627 value = _bfd_get_gp_value
1628 (hppa_info->opd_sec->output_section->owner);
1629 bfd_put_64 (hppa_info->opd_sec->owner, value,
1630 hppa_info->opd_sec->contents + dyn_h->opd_offset + 24);
1631 }
1632
1633 /* We want the value of the OPD offset for this symbol, not
1634 the symbol's actual address. */
1635 value = (dyn_h->opd_offset
1636 + hppa_info->opd_sec->output_offset
1637 + hppa_info->opd_sec->output_section->vma);
6a0b9871 1638
e48c661e
JL
1639 bfd_put_64 (input_bfd, value + addend, hit_data);
1640 return bfd_reloc_ok;
1641 }
e5bb3efc 1642
228d307f
JL
1643 case R_PARISC_SECREL32:
1644 bfd_put_32 (input_bfd,
1645 (value + addend
1646 - sym_sec->output_section->vma),
1647 hit_data);
1648 return bfd_reloc_ok;
1649
1650 case R_PARISC_SEGREL32:
2ec0dd12
JL
1651 case R_PARISC_SEGREL64:
1652 {
1653 /* If this is the first SEGREL relocation, then initialize
1654 the segment base values. */
1655 if (hppa_info->text_segment_base == (bfd_vma) -1)
1656 bfd_map_over_sections (output_bfd, elf_hppa_record_segment_addrs,
1657 elf64_hppa_hash_table (info));
1658
1659 /* VALUE holds the absolute address. We want to include the
1660 addend, then turn it into a segment relative address.
1661
1662 The segment is derived from SYM_SEC. We assume that there are
1663 only two segments of note in the resulting executable/shlib.
1664 A readonly segment (.text) and a readwrite segment (.data). */
1665 value += addend;
1666
1667 if (sym_sec->flags & SEC_CODE)
1668 value -= hppa_info->text_segment_base;
1669 else
1670 value -= hppa_info->data_segment_base;
1671
1672 if (r_type == R_PARISC_SEGREL32)
1673 bfd_put_32 (input_bfd, value, hit_data);
1674 else
1675 bfd_put_64 (input_bfd, value, hit_data);
1676 return bfd_reloc_ok;
1677 }
1678
228d307f 1679
2eb429af
JL
1680 /* Something we don't know how to handle. */
1681 default:
228d307f 1682 return bfd_reloc_notsupported;
2eb429af
JL
1683 }
1684
1685 /* Update the instruction word. */
1686 bfd_put_32 (input_bfd, insn, hit_data);
1687 return (bfd_reloc_ok);
1688}
1689
be7582f3
JL
1690/* Relocate the given INSN. VALUE should be the actual value we want
1691 to insert into the instruction, ie by this point we should not be
1692 concerned with computing an offset relative to the DLT, PC, etc.
1693 Instead this routine is meant to handle the bit manipulations needed
1694 to insert the relocation into the given instruction. */
2eb429af
JL
1695
1696static unsigned long
be7582f3 1697elf_hppa_relocate_insn (insn, sym_value, r_type)
2eb429af 1698 unsigned long insn;
2eb429af 1699 long sym_value;
c8933571 1700 unsigned long r_type;
2eb429af 1701{
c8933571 1702 switch (r_type)
2eb429af 1703 {
be7582f3
JL
1704 /* This is any 22bit branch. In PA2.0 syntax it corresponds to
1705 the "B" instruction. */
c8933571 1706 case R_PARISC_PCREL22F:
571047ad 1707 case R_PARISC_PCREL22C:
be7582f3
JL
1708 {
1709 unsigned int w3, w2, w1, w;
2eb429af 1710
be7582f3
JL
1711 /* These are 22 bit branches. Mask off bits we do not care
1712 about. */
1713 sym_value &= 0x3fffff;
2eb429af 1714
be7582f3
JL
1715 /* Now extract the W1, W2, W3 and W fields from the value. */
1716 dis_assemble_22 (sym_value, &w3, &w1, &w2, &w);
2eb429af 1717
be7582f3
JL
1718 /* Mask out bits for the value in the instruction. */
1719 insn &= 0xfc00e002;
2eb429af 1720
be7582f3
JL
1721 /* Insert the bits for the W1, W2 and W fields into the
1722 instruction. */
1723 insn |= (w3 << 21) | (w2 << 2) | (w1 << 16) | w;
1724 return insn;
1725 }
2eb429af 1726
be7582f3
JL
1727 /* This is any 17bit branch. In PA2.0 syntax it also corresponds to
1728 the "B" instruction as well as BE. */
1729 case R_PARISC_PCREL17F:
c8933571 1730 case R_PARISC_DIR17F:
b7263961 1731 case R_PARISC_DIR17R:
571047ad
JL
1732 case R_PARISC_PCREL17C:
1733 case R_PARISC_PCREL17R:
2eb429af
JL
1734 {
1735 unsigned int w2, w1, w;
1736
2eb429af
JL
1737 /* These are 17 bit branches. Mask off bits we do not care
1738 about. */
1739 sym_value &= 0x1ffff;
1740
1741 /* Now extract the W1, W2 and W fields from the value. */
1742 dis_assemble_17 (sym_value, &w1, &w2, &w);
1743
1744 /* Mask out bits for the value in the instruction. */
1745 insn &= 0xffe0e002;
1746
1747 /* Insert the bits for the W1, W2 and W fields into the
1748 instruction. */
1749 insn |= (w2 << 2) | (w1 << 16) | w;
1750 return insn;
1751 }
1752
be7582f3 1753 /* ADDIL or LDIL instructions. */
c8933571 1754 case R_PARISC_DLTREL21L:
be7582f3 1755 case R_PARISC_DLTIND21L:
e5bb3efc 1756 case R_PARISC_LTOFF_FPTR21L:
b233eaab
JL
1757 case R_PARISC_PCREL21L:
1758 case R_PARISC_LTOFF_TP21L:
6849fb4d 1759 case R_PARISC_DPREL21L:
8267b155 1760 case R_PARISC_PLTOFF21L:
b7263961 1761 case R_PARISC_DIR21L:
c8933571
JL
1762 {
1763 int w;
1764
c8933571
JL
1765 /* Mask off bits in INSN we do not want. */
1766 insn &= 0xffe00000;
1767
1768 /* Turn the 21bit value into the proper format. */
1769 dis_assemble_21 (sym_value, &w);
1770
1771 /* And insert the proper bits into INSN. */
1772 return insn | w;
1773 }
be7582f3
JL
1774
1775 /* LDO and integer loads/stores with 14bit displacements. */
c8933571 1776 case R_PARISC_DLTREL14R:
084d930b 1777 case R_PARISC_DLTREL14F:
be7582f3
JL
1778 case R_PARISC_DLTIND14R:
1779 case R_PARISC_DLTIND14F:
e5bb3efc
JL
1780 case R_PARISC_LTOFF_FPTR14R:
1781 case R_PARISC_LTOFF_FPTR16F:
b233eaab 1782 case R_PARISC_PCREL14R:
571047ad
JL
1783 case R_PARISC_PCREL14F:
1784 case R_PARISC_PCREL16F:
b233eaab
JL
1785 case R_PARISC_LTOFF_TP14R:
1786 case R_PARISC_LTOFF_TP14F:
1787 case R_PARISC_LTOFF_TP16F:
6849fb4d
JL
1788 case R_PARISC_DPREL14R:
1789 case R_PARISC_DPREL14F:
1790 case R_PARISC_GPREL16F:
8267b155
JL
1791 case R_PARISC_PLTOFF14R:
1792 case R_PARISC_PLTOFF14F:
1793 case R_PARISC_PLTOFF16F:
b7263961
JL
1794 case R_PARISC_DIR14R:
1795 case R_PARISC_DIR16F:
1796 case R_PARISC_LTOFF16F:
c8933571
JL
1797 {
1798 int w;
1799
c8933571
JL
1800 /* Mask off bits in INSN we do not want. */
1801 insn &= 0xffffc000;
1802
1803 /* Turn the 14bit value into the proper format. */
1804 low_sign_unext (sym_value, 14, &w);
1805
1806 /* And insert the proper bits into INSN. */
1807 return insn | w;
1808 }
be7582f3
JL
1809
1810 /* Doubleword loads and stores with a 14bit displacement. */
11c19a4e 1811 case R_PARISC_DLTREL14DR:
be7582f3 1812 case R_PARISC_DLTIND14DR:
e5bb3efc
JL
1813 case R_PARISC_LTOFF_FPTR14DR:
1814 case R_PARISC_LTOFF_FPTR16DF:
571047ad
JL
1815 case R_PARISC_PCREL14DR:
1816 case R_PARISC_PCREL16DF:
b233eaab
JL
1817 case R_PARISC_LTOFF_TP14DR:
1818 case R_PARISC_LTOFF_TP16DF:
6849fb4d
JL
1819 case R_PARISC_DPREL14DR:
1820 case R_PARISC_GPREL16DF:
8267b155
JL
1821 case R_PARISC_PLTOFF14DR:
1822 case R_PARISC_PLTOFF16DF:
b7263961
JL
1823 case R_PARISC_DIR14DR:
1824 case R_PARISC_DIR16DF:
1825 case R_PARISC_LTOFF16DF:
11c19a4e 1826 {
11c19a4e
JL
1827 /* Mask off bits in INSN we do not want. */
1828 insn &= 0xffffc00e;
1829
1830 /* The sign bit at 14 moves into bit zero in the destination. */
1831 insn |= ((sym_value & 0x2000) >> 13);
1832
1833 /* Turn off the bits in sym_value we do not care about. */
1834 sym_value &= 0x1ff8;
1835
1836 /* Now shift it one bit position left so that it lines up with the
1837 destination field in INSN. */
1838 sym_value <<= 1;
1839
1840 return insn | sym_value;
1841 }
1842
be7582f3 1843 /* Floating point single word load/store instructions. */
11c19a4e 1844 case R_PARISC_DLTREL14WR:
be7582f3 1845 case R_PARISC_DLTIND14WR:
e5bb3efc
JL
1846 case R_PARISC_LTOFF_FPTR14WR:
1847 case R_PARISC_LTOFF_FPTR16WF:
571047ad
JL
1848 case R_PARISC_PCREL14WR:
1849 case R_PARISC_PCREL16WF:
b233eaab
JL
1850 case R_PARISC_LTOFF_TP14WR:
1851 case R_PARISC_LTOFF_TP16WF:
6849fb4d
JL
1852 case R_PARISC_DPREL14WR:
1853 case R_PARISC_GPREL16WF:
8267b155
JL
1854 case R_PARISC_PLTOFF14WR:
1855 case R_PARISC_PLTOFF16WF:
b7263961
JL
1856 case R_PARISC_DIR16WF:
1857 case R_PARISC_DIR14WR:
1858 case R_PARISC_LTOFF16WF:
11c19a4e 1859 {
11c19a4e
JL
1860 /* Mask off bits in INSN we do not want. */
1861 insn &= 0xffffc006;
1862
1863 /* The sign bit at 14 moves into bit zero in the destination. */
1864 insn |= ((sym_value & 0x2000) >> 13);
1865
1866 /* Turn off the bits in sym_value we do not care about. */
1867 sym_value &= 0x1ffc;
1868
1869 /* Now shift it one bit position left so that it lines up with the
1870 destination field in INSN. */
1871 sym_value <<= 1;
1872
1873 return insn | sym_value;
1874 }
be7582f3 1875
2eb429af
JL
1876 default:
1877 return insn;
1878 }
1879}
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