PR 44
[deliverable/binutils-gdb.git] / bfd / elf-m10200.c
CommitLineData
252b5132 1/* Matsushita 10200 specific support for 32-bit ELF
b2a8e766 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
7898deda 3 Free Software Foundation, Inc.
252b5132
RH
4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25
26static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
27 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
28static void mn10200_info_to_howto
947216bf 29 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
b34976b6 30static bfd_boolean mn10200_elf_relax_delete_bytes
252b5132 31 PARAMS ((bfd *, asection *, bfd_vma, int));
b34976b6 32static bfd_boolean mn10200_elf_symbol_address_p
6cdc0ccc 33 PARAMS ((bfd *, asection *, Elf_Internal_Sym *, bfd_vma));
917583ad
NC
34static bfd_reloc_status_type mn10200_elf_final_link_relocate
35 PARAMS ((reloc_howto_type *, bfd *, bfd *, asection *,
36 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
37 struct bfd_link_info *, asection *, int));
b34976b6
AM
38static bfd_boolean mn10200_elf_relocate_section
39 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *,
40 bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Sym *,
41 asection **));
42static bfd_boolean mn10200_elf_relax_section
43 PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *));
917583ad
NC
44static bfd_byte * mn10200_elf_get_relocated_section_contents
45 PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *,
b34976b6 46 bfd_byte *, bfd_boolean, asymbol **));
252b5132 47
27def10f 48enum reloc_type {
252b5132
RH
49 R_MN10200_NONE = 0,
50 R_MN10200_32,
51 R_MN10200_16,
52 R_MN10200_8,
53 R_MN10200_24,
54 R_MN10200_PCREL8,
55 R_MN10200_PCREL16,
56 R_MN10200_PCREL24,
57 R_MN10200_MAX
58};
59
27def10f 60static reloc_howto_type elf_mn10200_howto_table[] = {
252b5132
RH
61 /* Dummy relocation. Does nothing. */
62 HOWTO (R_MN10200_NONE,
63 0,
64 2,
65 16,
b34976b6 66 FALSE,
252b5132
RH
67 0,
68 complain_overflow_bitfield,
69 bfd_elf_generic_reloc,
70 "R_MN10200_NONE",
b34976b6 71 FALSE,
252b5132
RH
72 0,
73 0,
b34976b6 74 FALSE),
252b5132
RH
75 /* Standard 32 bit reloc. */
76 HOWTO (R_MN10200_32,
77 0,
78 2,
79 32,
b34976b6 80 FALSE,
252b5132
RH
81 0,
82 complain_overflow_bitfield,
83 bfd_elf_generic_reloc,
84 "R_MN10200_32",
b34976b6 85 FALSE,
252b5132
RH
86 0xffffffff,
87 0xffffffff,
b34976b6 88 FALSE),
252b5132
RH
89 /* Standard 16 bit reloc. */
90 HOWTO (R_MN10200_16,
91 0,
92 1,
93 16,
b34976b6 94 FALSE,
252b5132
RH
95 0,
96 complain_overflow_bitfield,
97 bfd_elf_generic_reloc,
98 "R_MN10200_16",
b34976b6 99 FALSE,
252b5132
RH
100 0xffff,
101 0xffff,
b34976b6 102 FALSE),
252b5132
RH
103 /* Standard 8 bit reloc. */
104 HOWTO (R_MN10200_8,
105 0,
106 0,
107 8,
b34976b6 108 FALSE,
252b5132
RH
109 0,
110 complain_overflow_bitfield,
111 bfd_elf_generic_reloc,
112 "R_MN10200_8",
b34976b6 113 FALSE,
252b5132
RH
114 0xff,
115 0xff,
b34976b6 116 FALSE),
252b5132
RH
117 /* Standard 24 bit reloc. */
118 HOWTO (R_MN10200_24,
119 0,
120 2,
121 24,
b34976b6 122 FALSE,
252b5132
RH
123 0,
124 complain_overflow_bitfield,
125 bfd_elf_generic_reloc,
126 "R_MN10200_24",
b34976b6 127 FALSE,
252b5132
RH
128 0xffffff,
129 0xffffff,
b34976b6 130 FALSE),
252b5132
RH
131 /* Simple 8 pc-relative reloc. */
132 HOWTO (R_MN10200_PCREL8,
133 0,
134 0,
135 8,
b34976b6 136 TRUE,
252b5132
RH
137 0,
138 complain_overflow_bitfield,
139 bfd_elf_generic_reloc,
140 "R_MN10200_PCREL8",
b34976b6 141 FALSE,
252b5132
RH
142 0xff,
143 0xff,
b34976b6 144 TRUE),
252b5132
RH
145 /* Simple 16 pc-relative reloc. */
146 HOWTO (R_MN10200_PCREL16,
147 0,
148 1,
149 16,
b34976b6 150 TRUE,
252b5132
RH
151 0,
152 complain_overflow_bitfield,
153 bfd_elf_generic_reloc,
154 "R_MN10200_PCREL16",
b34976b6 155 FALSE,
252b5132
RH
156 0xffff,
157 0xffff,
b34976b6 158 TRUE),
252b5132
RH
159 /* Simple 32bit pc-relative reloc with a 1 byte adjustment
160 to get the pc-relative offset correct. */
161 HOWTO (R_MN10200_PCREL24,
162 0,
163 2,
164 24,
b34976b6 165 TRUE,
252b5132
RH
166 0,
167 complain_overflow_bitfield,
168 bfd_elf_generic_reloc,
169 "R_MN10200_PCREL24",
b34976b6 170 FALSE,
252b5132
RH
171 0xffffff,
172 0xffffff,
b34976b6 173 TRUE),
252b5132
RH
174};
175
27def10f 176struct mn10200_reloc_map {
252b5132
RH
177 bfd_reloc_code_real_type bfd_reloc_val;
178 unsigned char elf_reloc_val;
179};
180
27def10f
KH
181static const struct mn10200_reloc_map mn10200_reloc_map[] = {
182 { BFD_RELOC_NONE , R_MN10200_NONE , },
183 { BFD_RELOC_32 , R_MN10200_32 , },
184 { BFD_RELOC_16 , R_MN10200_16 , },
185 { BFD_RELOC_8 , R_MN10200_8 , },
186 { BFD_RELOC_24 , R_MN10200_24 , },
187 { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , },
252b5132
RH
188 { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, },
189 { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, },
190};
191
192static reloc_howto_type *
193bfd_elf32_bfd_reloc_type_lookup (abfd, code)
5f771d47 194 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
195 bfd_reloc_code_real_type code;
196{
197 unsigned int i;
198
199 for (i = 0;
200 i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map);
201 i++)
202 {
203 if (mn10200_reloc_map[i].bfd_reloc_val == code)
204 return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val];
205 }
206
207 return NULL;
208}
209
210/* Set the howto pointer for an MN10200 ELF reloc. */
211
212static void
213mn10200_info_to_howto (abfd, cache_ptr, dst)
5f771d47 214 bfd *abfd ATTRIBUTE_UNUSED;
252b5132 215 arelent *cache_ptr;
947216bf 216 Elf_Internal_Rela *dst;
252b5132
RH
217{
218 unsigned int r_type;
219
220 r_type = ELF32_R_TYPE (dst->r_info);
221 BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX);
222 cache_ptr->howto = &elf_mn10200_howto_table[r_type];
223}
224
225/* Perform a relocation as part of a final link. */
917583ad 226
252b5132
RH
227static bfd_reloc_status_type
228mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
229 input_section, contents, offset, value,
230 addend, info, sym_sec, is_local)
231 reloc_howto_type *howto;
232 bfd *input_bfd;
5f771d47 233 bfd *output_bfd ATTRIBUTE_UNUSED;
252b5132
RH
234 asection *input_section;
235 bfd_byte *contents;
236 bfd_vma offset;
237 bfd_vma value;
238 bfd_vma addend;
5f771d47
ILT
239 struct bfd_link_info *info ATTRIBUTE_UNUSED;
240 asection *sym_sec ATTRIBUTE_UNUSED;
241 int is_local ATTRIBUTE_UNUSED;
252b5132
RH
242{
243 unsigned long r_type = howto->type;
244 bfd_byte *hit_data = contents + offset;
245
246 switch (r_type)
247 {
248
249 case R_MN10200_NONE:
250 return bfd_reloc_ok;
251
252 case R_MN10200_32:
253 value += addend;
254 bfd_put_32 (input_bfd, value, hit_data);
255 return bfd_reloc_ok;
256
257 case R_MN10200_16:
258 value += addend;
259
27def10f 260 if ((long) value > 0x7fff || (long) value < -0x8000)
252b5132
RH
261 return bfd_reloc_overflow;
262
263 bfd_put_16 (input_bfd, value, hit_data);
264 return bfd_reloc_ok;
265
266 case R_MN10200_8:
267 value += addend;
268
27def10f 269 if ((long) value > 0x7f || (long) value < -0x80)
252b5132
RH
270 return bfd_reloc_overflow;
271
272 bfd_put_8 (input_bfd, value, hit_data);
273 return bfd_reloc_ok;
274
275 case R_MN10200_24:
276 value += addend;
277
27def10f 278 if ((long) value > 0x7fffff || (long) value < -0x800000)
252b5132
RH
279 return bfd_reloc_overflow;
280
281 value &= 0xffffff;
282 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
283 bfd_put_32 (input_bfd, value, hit_data);
284 return bfd_reloc_ok;
285
286 case R_MN10200_PCREL8:
287 value -= (input_section->output_section->vma
288 + input_section->output_offset);
289 value -= (offset + 1);
290 value += addend;
291
27def10f
KH
292 if ((long) value > 0xff || (long) value < -0x100)
293 return bfd_reloc_overflow;
252b5132
RH
294
295 bfd_put_8 (input_bfd, value, hit_data);
296 return bfd_reloc_ok;
297
298 case R_MN10200_PCREL16:
299 value -= (input_section->output_section->vma
300 + input_section->output_offset);
301 value -= (offset + 2);
302 value += addend;
303
27def10f
KH
304 if ((long) value > 0xffff || (long) value < -0x10000)
305 return bfd_reloc_overflow;
252b5132
RH
306
307 bfd_put_16 (input_bfd, value, hit_data);
308 return bfd_reloc_ok;
309
310 case R_MN10200_PCREL24:
311 value -= (input_section->output_section->vma
312 + input_section->output_offset);
313 value -= (offset + 3);
314 value += addend;
315
27def10f
KH
316 if ((long) value > 0xffffff || (long) value < -0x1000000)
317 return bfd_reloc_overflow;
252b5132
RH
318
319 value &= 0xffffff;
320 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
321 bfd_put_32 (input_bfd, value, hit_data);
322 return bfd_reloc_ok;
323
324 default:
325 return bfd_reloc_notsupported;
326 }
327}
252b5132
RH
328\f
329/* Relocate an MN10200 ELF section. */
b34976b6 330static bfd_boolean
252b5132
RH
331mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section,
332 contents, relocs, local_syms, local_sections)
333 bfd *output_bfd;
334 struct bfd_link_info *info;
335 bfd *input_bfd;
336 asection *input_section;
337 bfd_byte *contents;
338 Elf_Internal_Rela *relocs;
339 Elf_Internal_Sym *local_syms;
340 asection **local_sections;
341{
342 Elf_Internal_Shdr *symtab_hdr;
343 struct elf_link_hash_entry **sym_hashes;
344 Elf_Internal_Rela *rel, *relend;
345
1049f94e 346 if (info->relocatable)
b34976b6 347 return TRUE;
b491616a 348
252b5132
RH
349 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
350 sym_hashes = elf_sym_hashes (input_bfd);
351
352 rel = relocs;
353 relend = relocs + input_section->reloc_count;
354 for (; rel < relend; rel++)
355 {
356 int r_type;
357 reloc_howto_type *howto;
358 unsigned long r_symndx;
359 Elf_Internal_Sym *sym;
360 asection *sec;
361 struct elf_link_hash_entry *h;
362 bfd_vma relocation;
363 bfd_reloc_status_type r;
364
365 r_symndx = ELF32_R_SYM (rel->r_info);
366 r_type = ELF32_R_TYPE (rel->r_info);
367 howto = elf_mn10200_howto_table + r_type;
368
252b5132
RH
369 h = NULL;
370 sym = NULL;
371 sec = NULL;
372 if (r_symndx < symtab_hdr->sh_info)
373 {
374 sym = local_syms + r_symndx;
375 sec = local_sections[r_symndx];
8517fae7 376 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
377 }
378 else
379 {
59c2e50f
L
380 bfd_boolean unresolved_reloc, warned;
381
b2a8e766
AM
382 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
383 r_symndx, symtab_hdr, sym_hashes,
384 h, sec, relocation,
385 unresolved_reloc, warned);
252b5132
RH
386 }
387
388 r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
389 input_section,
390 contents, rel->r_offset,
391 relocation, rel->r_addend,
392 info, sec, h == NULL);
393
394 if (r != bfd_reloc_ok)
395 {
396 const char *name;
27def10f 397 const char *msg = (const char *) 0;
252b5132
RH
398
399 if (h != NULL)
400 name = h->root.root.string;
401 else
402 {
403 name = (bfd_elf_string_from_elf_section
404 (input_bfd, symtab_hdr->sh_link, sym->st_name));
405 if (name == NULL || *name == '\0')
406 name = bfd_section_name (input_bfd, sec);
407 }
408
409 switch (r)
410 {
411 case bfd_reloc_overflow:
412 if (! ((*info->callbacks->reloc_overflow)
413 (info, name, howto->name, (bfd_vma) 0,
414 input_bfd, input_section, rel->r_offset)))
b34976b6 415 return FALSE;
252b5132
RH
416 break;
417
418 case bfd_reloc_undefined:
419 if (! ((*info->callbacks->undefined_symbol)
420 (info, name, input_bfd, input_section,
b34976b6
AM
421 rel->r_offset, TRUE)))
422 return FALSE;
252b5132
RH
423 break;
424
425 case bfd_reloc_outofrange:
426 msg = _("internal error: out of range error");
427 goto common_error;
428
429 case bfd_reloc_notsupported:
430 msg = _("internal error: unsupported relocation error");
431 goto common_error;
432
433 case bfd_reloc_dangerous:
434 msg = _("internal error: dangerous error");
435 goto common_error;
436
437 default:
438 msg = _("internal error: unknown error");
439 /* fall through */
440
441 common_error:
442 if (!((*info->callbacks->warning)
443 (info, msg, name, input_bfd, input_section,
444 rel->r_offset)))
b34976b6 445 return FALSE;
252b5132
RH
446 break;
447 }
448 }
449 }
450
b34976b6 451 return TRUE;
252b5132
RH
452}
453
454/* This function handles relaxing for the mn10200.
455
4cc11e76 456 There are quite a few relaxing opportunities available on the mn10200:
252b5132
RH
457
458 * jsr:24 -> jsr:16 2 bytes
459
460 * jmp:24 -> jmp:16 2 bytes
461 * jmp:16 -> bra:8 1 byte
462
463 * If the previous instruction is a conditional branch
464 around the jump/bra, we may be able to reverse its condition
465 and change its target to the jump's target. The jump/bra
466 can then be deleted. 2 bytes
467
468 * mov abs24 -> mov abs16 2 byte savings
469
470 * Most instructions which accept imm24 can relax to imm16 2 bytes
471 - Most instructions which accept imm16 can relax to imm8 1 byte
472
473 * Most instructions which accept d24 can relax to d16 2 bytes
474 - Most instructions which accept d16 can relax to d8 1 byte
475
476 abs24, imm24, d24 all look the same at the reloc level. It
477 might make the code simpler if we had different relocs for
478 the various relaxable operand types.
a7c10850 479
252b5132
RH
480 We don't handle imm16->imm8 or d16->d8 as they're very rare
481 and somewhat more difficult to support. */
482
b34976b6 483static bfd_boolean
252b5132
RH
484mn10200_elf_relax_section (abfd, sec, link_info, again)
485 bfd *abfd;
486 asection *sec;
487 struct bfd_link_info *link_info;
b34976b6 488 bfd_boolean *again;
252b5132
RH
489{
490 Elf_Internal_Shdr *symtab_hdr;
491 Elf_Internal_Rela *internal_relocs;
252b5132
RH
492 Elf_Internal_Rela *irel, *irelend;
493 bfd_byte *contents = NULL;
6cdc0ccc 494 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
495
496 /* Assume nothing changes. */
b34976b6 497 *again = FALSE;
252b5132 498
1049f94e 499 /* We don't have to do anything for a relocatable link, if
252b5132
RH
500 this section does not have relocs, or if this is not a
501 code section. */
1049f94e 502 if (link_info->relocatable
252b5132
RH
503 || (sec->flags & SEC_RELOC) == 0
504 || sec->reloc_count == 0
505 || (sec->flags & SEC_CODE) == 0)
b34976b6 506 return TRUE;
252b5132 507
252b5132
RH
508 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
509
510 /* Get a copy of the native relocations. */
45d6a902 511 internal_relocs = (_bfd_elf_link_read_relocs
252b5132
RH
512 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
513 link_info->keep_memory));
514 if (internal_relocs == NULL)
515 goto error_return;
252b5132
RH
516
517 /* Walk through them looking for relaxing opportunities. */
518 irelend = internal_relocs + sec->reloc_count;
519 for (irel = internal_relocs; irel < irelend; irel++)
520 {
521 bfd_vma symval;
522
523 /* If this isn't something that can be relaxed, then ignore
524 this reloc. */
525 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE
526 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8
527 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX)
528 continue;
529
530 /* Get the section contents if we haven't done so already. */
531 if (contents == NULL)
532 {
533 /* Get cached copy if it exists. */
534 if (elf_section_data (sec)->this_hdr.contents != NULL)
535 contents = elf_section_data (sec)->this_hdr.contents;
536 else
537 {
538 /* Go get them off disk. */
eea6121a 539 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH
540 goto error_return;
541 }
542 }
543
6cdc0ccc
AM
544 /* Read this BFD's local symbols if we haven't done so already. */
545 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
252b5132 546 {
6cdc0ccc
AM
547 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
548 if (isymbuf == NULL)
549 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
550 symtab_hdr->sh_info, 0,
551 NULL, NULL, NULL);
552 if (isymbuf == NULL)
553 goto error_return;
252b5132
RH
554 }
555
556 /* Get the value of the symbol referred to by the reloc. */
557 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
558 {
9ad5cbcf 559 /* A local symbol. */
6cdc0ccc 560 Elf_Internal_Sym *isym;
252b5132
RH
561 asection *sym_sec;
562
6cdc0ccc
AM
563 isym = isymbuf + ELF32_R_SYM (irel->r_info);
564 if (isym->st_shndx == SHN_UNDEF)
9ad5cbcf 565 sym_sec = bfd_und_section_ptr;
6cdc0ccc 566 else if (isym->st_shndx == SHN_ABS)
9ad5cbcf 567 sym_sec = bfd_abs_section_ptr;
6cdc0ccc 568 else if (isym->st_shndx == SHN_COMMON)
9ad5cbcf
AM
569 sym_sec = bfd_com_section_ptr;
570 else
6cdc0ccc
AM
571 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
572 symval = (isym->st_value
252b5132
RH
573 + sym_sec->output_section->vma
574 + sym_sec->output_offset);
575 }
576 else
577 {
578 unsigned long indx;
579 struct elf_link_hash_entry *h;
580
581 /* An external symbol. */
582 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
583 h = elf_sym_hashes (abfd)[indx];
584 BFD_ASSERT (h != NULL);
585 if (h->root.type != bfd_link_hash_defined
586 && h->root.type != bfd_link_hash_defweak)
587 {
588 /* This appears to be a reference to an undefined
589 symbol. Just ignore it--it will be caught by the
590 regular reloc processing. */
591 continue;
592 }
593
594 symval = (h->root.u.def.value
595 + h->root.u.def.section->output_section->vma
596 + h->root.u.def.section->output_offset);
597 }
598
599 /* For simplicity of coding, we are going to modify the section
600 contents, the section relocs, and the BFD symbol table. We
601 must tell the rest of the code not to free up this
602 information. It would be possible to instead create a table
603 of changes which have to be made, as is done in coff-mips.c;
604 that would be more work, but would require less memory when
605 the linker is run. */
606
252b5132
RH
607 /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative
608 branch/call. */
609 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24)
610 {
611 bfd_vma value = symval;
612
613 /* Deal with pc-relative gunk. */
614 value -= (sec->output_section->vma + sec->output_offset);
615 value -= (irel->r_offset + 3);
616 value += irel->r_addend;
617
618 /* See if the value will fit in 16 bits, note the high value is
619 0x7fff + 2 as the target will be two bytes closer if we are
620 able to relax. */
27def10f 621 if ((long) value < 0x8001 && (long) value > -0x8000)
252b5132
RH
622 {
623 unsigned char code;
624
625 /* Get the opcode. */
626 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
627
628 if (code != 0xe0 && code != 0xe1)
629 continue;
630
631 /* Note that we've changed the relocs, section contents, etc. */
632 elf_section_data (sec)->relocs = internal_relocs;
252b5132 633 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 634 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
635
636 /* Fix the opcode. */
637 if (code == 0xe0)
638 bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2);
639 else if (code == 0xe1)
640 bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2);
641
642 /* Fix the relocation's type. */
643 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
644 R_MN10200_PCREL16);
645
646 /* The opcode got shorter too, so we have to fix the offset. */
647 irel->r_offset -= 1;
648
649 /* Delete two bytes of data. */
650 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
651 irel->r_offset + 1, 2))
652 goto error_return;
653
654 /* That will change things, so, we should relax again.
655 Note that this is not required, and it may be slow. */
b34976b6 656 *again = TRUE;
252b5132
RH
657 }
658 }
659
660 /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative
661 branch. */
662 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16)
663 {
664 bfd_vma value = symval;
665
666 /* Deal with pc-relative gunk. */
667 value -= (sec->output_section->vma + sec->output_offset);
668 value -= (irel->r_offset + 2);
669 value += irel->r_addend;
670
671 /* See if the value will fit in 8 bits, note the high value is
672 0x7f + 1 as the target will be one bytes closer if we are
673 able to relax. */
27def10f 674 if ((long) value < 0x80 && (long) value > -0x80)
252b5132
RH
675 {
676 unsigned char code;
677
678 /* Get the opcode. */
679 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
680
681 if (code != 0xfc)
682 continue;
683
684 /* Note that we've changed the relocs, section contents, etc. */
685 elf_section_data (sec)->relocs = internal_relocs;
252b5132 686 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 687 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
688
689 /* Fix the opcode. */
690 bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1);
691
692 /* Fix the relocation's type. */
693 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
694 R_MN10200_PCREL8);
695
696 /* Delete one byte of data. */
697 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
698 irel->r_offset + 1, 1))
699 goto error_return;
700
701 /* That will change things, so, we should relax again.
702 Note that this is not required, and it may be slow. */
b34976b6 703 *again = TRUE;
252b5132
RH
704 }
705 }
706
707 /* Try to eliminate an unconditional 8 bit pc-relative branch
708 which immediately follows a conditional 8 bit pc-relative
709 branch around the unconditional branch.
710
711 original: new:
712 bCC lab1 bCC' lab2
713 bra lab2
714 lab1: lab1:
715
252b5132
RH
716 This happens when the bCC can't reach lab2 at assembly time,
717 but due to other relaxations it can reach at link time. */
718 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8)
719 {
720 Elf_Internal_Rela *nrel;
721 bfd_vma value = symval;
722 unsigned char code;
723
724 /* Deal with pc-relative gunk. */
725 value -= (sec->output_section->vma + sec->output_offset);
726 value -= (irel->r_offset + 1);
727 value += irel->r_addend;
728
729 /* Do nothing if this reloc is the last byte in the section. */
eea6121a 730 if (irel->r_offset == sec->size)
252b5132
RH
731 continue;
732
733 /* See if the next instruction is an unconditional pc-relative
734 branch, more often than not this test will fail, so we
735 test it first to speed things up. */
736 code = bfd_get_8 (abfd, contents + irel->r_offset + 1);
737 if (code != 0xea)
738 continue;
739
740 /* Also make sure the next relocation applies to the next
741 instruction and that it's a pc-relative 8 bit branch. */
742 nrel = irel + 1;
743 if (nrel == irelend
744 || irel->r_offset + 2 != nrel->r_offset
745 || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8)
746 continue;
747
748 /* Make sure our destination immediately follows the
749 unconditional branch. */
750 if (symval != (sec->output_section->vma + sec->output_offset
751 + irel->r_offset + 3))
752 continue;
753
754 /* Now make sure we are a conditional branch. This may not
a7c10850 755 be necessary, but why take the chance.
252b5132
RH
756
757 Note these checks assume that R_MN10200_PCREL8 relocs
758 only occur on bCC and bCCx insns. If they occured
759 elsewhere, we'd need to know the start of this insn
760 for this check to be accurate. */
761 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
762 if (code != 0xe0 && code != 0xe1 && code != 0xe2
763 && code != 0xe3 && code != 0xe4 && code != 0xe5
764 && code != 0xe6 && code != 0xe7 && code != 0xe8
765 && code != 0xe9 && code != 0xec && code != 0xed
766 && code != 0xee && code != 0xef && code != 0xfc
767 && code != 0xfd && code != 0xfe && code != 0xff)
768 continue;
769
770 /* We also have to be sure there is no symbol/label
771 at the unconditional branch. */
6cdc0ccc
AM
772 if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf,
773 irel->r_offset + 1))
252b5132
RH
774 continue;
775
776 /* Note that we've changed the relocs, section contents, etc. */
777 elf_section_data (sec)->relocs = internal_relocs;
252b5132 778 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 779 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
780
781 /* Reverse the condition of the first branch. */
782 switch (code)
783 {
27def10f
KH
784 case 0xfc:
785 code = 0xfd;
786 break;
787 case 0xfd:
788 code = 0xfc;
789 break;
790 case 0xfe:
791 code = 0xff;
792 break;
793 case 0xff:
794 code = 0xfe;
795 break;
796 case 0xe8:
797 code = 0xe9;
798 break;
799 case 0xe9:
800 code = 0xe8;
801 break;
802 case 0xe0:
803 code = 0xe2;
804 break;
805 case 0xe2:
806 code = 0xe0;
807 break;
808 case 0xe3:
809 code = 0xe1;
810 break;
811 case 0xe1:
812 code = 0xe3;
813 break;
814 case 0xe4:
815 code = 0xe6;
816 break;
817 case 0xe6:
818 code = 0xe4;
819 break;
820 case 0xe7:
821 code = 0xe5;
822 break;
823 case 0xe5:
824 code = 0xe7;
825 break;
826 case 0xec:
827 code = 0xed;
828 break;
829 case 0xed:
830 code = 0xec;
831 break;
832 case 0xee:
833 code = 0xef;
834 break;
835 case 0xef:
836 code = 0xee;
837 break;
252b5132
RH
838 }
839 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
a7c10850 840
252b5132
RH
841 /* Set the reloc type and symbol for the first branch
842 from the second branch. */
843 irel->r_info = nrel->r_info;
844
845 /* Make the reloc for the second branch a null reloc. */
846 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
847 R_MN10200_NONE);
848
849 /* Delete two bytes of data. */
850 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
851 irel->r_offset + 1, 2))
852 goto error_return;
853
854 /* That will change things, so, we should relax again.
855 Note that this is not required, and it may be slow. */
b34976b6 856 *again = TRUE;
252b5132
RH
857 }
858
859 /* Try to turn a 24bit immediate, displacement or absolute address
860 into a 16bit immediate, displacement or absolute address. */
861 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24)
862 {
863 bfd_vma value = symval;
864
a7c10850 865 /* See if the value will fit in 16 bits.
252b5132
RH
866 We allow any 16bit match here. We prune those we can't
867 handle below. */
27def10f 868 if ((long) value < 0x7fff && (long) value > -0x8000)
252b5132
RH
869 {
870 unsigned char code;
871
872 /* All insns which have 24bit operands are 5 bytes long,
873 the first byte will always be 0xf4, but we double check
874 it just in case. */
875
876 /* Get the first opcode. */
877 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
878
879 if (code != 0xf4)
880 continue;
881
882 /* Get the second opcode. */
883 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
884
885 switch (code & 0xfc)
886 {
887 /* mov imm24,dn -> mov imm16,dn */
888 case 0x70:
889 /* Not safe if the high bit is on as relaxing may
890 move the value out of high mem and thus not fit
891 in a signed 16bit value. */
892 if (value & 0x8000)
893 continue;
894
4cc11e76 895 /* Note that we've changed the relocation contents, etc. */
252b5132 896 elf_section_data (sec)->relocs = internal_relocs;
252b5132 897 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 898 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
899
900 /* Fix the opcode. */
901 bfd_put_8 (abfd, 0xf8 + (code & 0x03),
902 contents + irel->r_offset - 2);
903
904 /* Fix the relocation's type. */
905 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
906 R_MN10200_16);
907
908 /* The opcode got shorter too, so we have to fix the
909 offset. */
910 irel->r_offset -= 1;
911
912 /* Delete two bytes of data. */
913 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
914 irel->r_offset + 1, 2))
915 goto error_return;
916
917 /* That will change things, so, we should relax again.
918 Note that this is not required, and it may be slow. */
b34976b6 919 *again = TRUE;
252b5132
RH
920 break;
921
a7c10850 922 /* mov imm24,an -> mov imm16,an
252b5132
RH
923 cmp imm24,an -> cmp imm16,an
924 mov (abs24),dn -> mov (abs16),dn
925 mov dn,(abs24) -> mov dn,(abs16)
926 movb dn,(abs24) -> movb dn,(abs16)
927 movbu (abs24),dn -> movbu (abs16),dn */
928 case 0x74:
929 case 0x7c:
930 case 0xc0:
931 case 0x40:
932 case 0x44:
933 case 0xc8:
4cc11e76 934 /* Note that we've changed the relocation contents, etc. */
252b5132 935 elf_section_data (sec)->relocs = internal_relocs;
252b5132 936 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 937 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
938
939 if ((code & 0xfc) == 0x74)
940 code = 0xdc + (code & 0x03);
941 else if ((code & 0xfc) == 0x7c)
942 code = 0xec + (code & 0x03);
943 else if ((code & 0xfc) == 0xc0)
944 code = 0xc8 + (code & 0x03);
945 else if ((code & 0xfc) == 0x40)
946 code = 0xc0 + (code & 0x03);
947 else if ((code & 0xfc) == 0x44)
948 code = 0xc4 + (code & 0x03);
949 else if ((code & 0xfc) == 0xc8)
950 code = 0xcc + (code & 0x03);
951
952 /* Fix the opcode. */
953 bfd_put_8 (abfd, code, contents + irel->r_offset - 2);
954
955 /* Fix the relocation's type. */
956 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
957 R_MN10200_16);
958
959 /* The opcode got shorter too, so we have to fix the
960 offset. */
961 irel->r_offset -= 1;
962
963 /* Delete two bytes of data. */
964 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
965 irel->r_offset + 1, 2))
966 goto error_return;
967
968 /* That will change things, so, we should relax again.
969 Note that this is not required, and it may be slow. */
b34976b6 970 *again = TRUE;
252b5132
RH
971 break;
972
973 /* cmp imm24,dn -> cmp imm16,dn
974 mov (abs24),an -> mov (abs16),an
975 mov an,(abs24) -> mov an,(abs16)
976 add imm24,dn -> add imm16,dn
977 add imm24,an -> add imm16,an
978 sub imm24,dn -> sub imm16,dn
a7c10850 979 sub imm24,an -> sub imm16,an
252b5132
RH
980 And all d24->d16 in memory ops. */
981 case 0x78:
982 case 0xd0:
983 case 0x50:
984 case 0x60:
985 case 0x64:
986 case 0x68:
987 case 0x6c:
988 case 0x80:
989 case 0xf0:
990 case 0x00:
991 case 0x10:
992 case 0xb0:
993 case 0x30:
994 case 0xa0:
995 case 0x20:
996 case 0x90:
997 /* Not safe if the high bit is on as relaxing may
998 move the value out of high mem and thus not fit
999 in a signed 16bit value. */
1000 if (((code & 0xfc) == 0x78
27def10f
KH
1001 || (code & 0xfc) == 0x60
1002 || (code & 0xfc) == 0x64
1003 || (code & 0xfc) == 0x68
1004 || (code & 0xfc) == 0x6c
1005 || (code & 0xfc) == 0x80
1006 || (code & 0xfc) == 0xf0
1007 || (code & 0xfc) == 0x00
1008 || (code & 0xfc) == 0x10
1009 || (code & 0xfc) == 0xb0
1010 || (code & 0xfc) == 0x30
1011 || (code & 0xfc) == 0xa0
1012 || (code & 0xfc) == 0x20
1013 || (code & 0xfc) == 0x90)
1014 && (value & 0x8000) != 0)
252b5132
RH
1015 continue;
1016
4cc11e76 1017 /* Note that we've changed the relocation contents, etc. */
252b5132 1018 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1019 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1020 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1021
1022 /* Fix the opcode. */
1023 bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2);
1024
1025 if ((code & 0xfc) == 0x78)
1026 code = 0x48 + (code & 0x03);
1027 else if ((code & 0xfc) == 0xd0)
1028 code = 0x30 + (code & 0x03);
1029 else if ((code & 0xfc) == 0x50)
1030 code = 0x20 + (code & 0x03);
1031 else if ((code & 0xfc) == 0x60)
1032 code = 0x18 + (code & 0x03);
1033 else if ((code & 0xfc) == 0x64)
1034 code = 0x08 + (code & 0x03);
1035 else if ((code & 0xfc) == 0x68)
1036 code = 0x1c + (code & 0x03);
1037 else if ((code & 0xfc) == 0x6c)
1038 code = 0x0c + (code & 0x03);
1039 else if ((code & 0xfc) == 0x80)
1040 code = 0xc0 + (code & 0x07);
1041 else if ((code & 0xfc) == 0xf0)
1042 code = 0xb0 + (code & 0x07);
1043 else if ((code & 0xfc) == 0x00)
1044 code = 0x80 + (code & 0x07);
1045 else if ((code & 0xfc) == 0x10)
1046 code = 0xa0 + (code & 0x07);
1047 else if ((code & 0xfc) == 0xb0)
1048 code = 0x70 + (code & 0x07);
1049 else if ((code & 0xfc) == 0x30)
1050 code = 0x60 + (code & 0x07);
1051 else if ((code & 0xfc) == 0xa0)
1052 code = 0xd0 + (code & 0x07);
1053 else if ((code & 0xfc) == 0x20)
1054 code = 0x90 + (code & 0x07);
1055 else if ((code & 0xfc) == 0x90)
1056 code = 0x50 + (code & 0x07);
1057
1058 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
1059
1060 /* Fix the relocation's type. */
1061 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1062 R_MN10200_16);
1063
1064 /* Delete one bytes of data. */
1065 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1066 irel->r_offset + 2, 1))
1067 goto error_return;
1068
1069 /* That will change things, so, we should relax again.
1070 Note that this is not required, and it may be slow. */
b34976b6 1071 *again = TRUE;
252b5132
RH
1072 break;
1073
1074 /* movb (abs24),dn ->movbu (abs16),dn extxb bn */
1075 case 0xc4:
1076 /* Note that we've changed the reldection contents, etc. */
1077 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1078 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1079 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1080
1081 bfd_put_8 (abfd, 0xcc + (code & 0x03),
1082 contents + irel->r_offset - 2);
1083
1084 bfd_put_8 (abfd, 0xb8 + (code & 0x03),
1085 contents + irel->r_offset - 1);
1086
1087 /* Fix the relocation's type. */
1088 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1089 R_MN10200_16);
1090
1091 /* The reloc will be applied one byte in front of its
1092 current location. */
1093 irel->r_offset -= 1;
1094
1095 /* Delete one bytes of data. */
1096 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1097 irel->r_offset + 2, 1))
1098 goto error_return;
1099
1100 /* That will change things, so, we should relax again.
1101 Note that this is not required, and it may be slow. */
b34976b6 1102 *again = TRUE;
252b5132
RH
1103 break;
1104 }
1105 }
1106 }
1107 }
1108
6cdc0ccc
AM
1109 if (isymbuf != NULL
1110 && symtab_hdr->contents != (unsigned char *) isymbuf)
252b5132
RH
1111 {
1112 if (! link_info->keep_memory)
6cdc0ccc 1113 free (isymbuf);
252b5132
RH
1114 else
1115 {
6cdc0ccc
AM
1116 /* Cache the symbols for elf_link_input_bfd. */
1117 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132 1118 }
9ad5cbcf
AM
1119 }
1120
6cdc0ccc
AM
1121 if (contents != NULL
1122 && elf_section_data (sec)->this_hdr.contents != contents)
252b5132
RH
1123 {
1124 if (! link_info->keep_memory)
6cdc0ccc
AM
1125 free (contents);
1126 else
252b5132 1127 {
6cdc0ccc
AM
1128 /* Cache the section contents for elf_link_input_bfd. */
1129 elf_section_data (sec)->this_hdr.contents = contents;
252b5132 1130 }
252b5132
RH
1131 }
1132
6cdc0ccc
AM
1133 if (internal_relocs != NULL
1134 && elf_section_data (sec)->relocs != internal_relocs)
1135 free (internal_relocs);
1136
b34976b6 1137 return TRUE;
252b5132
RH
1138
1139 error_return:
6cdc0ccc
AM
1140 if (isymbuf != NULL
1141 && symtab_hdr->contents != (unsigned char *) isymbuf)
1142 free (isymbuf);
1143 if (contents != NULL
1144 && elf_section_data (sec)->this_hdr.contents != contents)
1145 free (contents);
1146 if (internal_relocs != NULL
1147 && elf_section_data (sec)->relocs != internal_relocs)
1148 free (internal_relocs);
9ad5cbcf 1149
b34976b6 1150 return FALSE;
252b5132
RH
1151}
1152
1153/* Delete some bytes from a section while relaxing. */
1154
b34976b6 1155static bfd_boolean
252b5132
RH
1156mn10200_elf_relax_delete_bytes (abfd, sec, addr, count)
1157 bfd *abfd;
1158 asection *sec;
1159 bfd_vma addr;
1160 int count;
1161{
1162 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1163 unsigned int sec_shndx;
252b5132
RH
1164 bfd_byte *contents;
1165 Elf_Internal_Rela *irel, *irelend;
1166 Elf_Internal_Rela *irelalign;
1167 bfd_vma toaddr;
6cdc0ccc
AM
1168 Elf_Internal_Sym *isym;
1169 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1170 struct elf_link_hash_entry **sym_hashes;
1171 struct elf_link_hash_entry **end_hashes;
1172 unsigned int symcount;
252b5132 1173
9ad5cbcf 1174 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132
RH
1175
1176 contents = elf_section_data (sec)->this_hdr.contents;
1177
1178 /* The deletion must stop at the next ALIGN reloc for an aligment
1179 power larger than the number of bytes we are deleting. */
1180
1181 irelalign = NULL;
eea6121a 1182 toaddr = sec->size;
252b5132
RH
1183
1184 irel = elf_section_data (sec)->relocs;
1185 irelend = irel + sec->reloc_count;
1186
1187 /* Actually delete the bytes. */
dc810e39
AM
1188 memmove (contents + addr, contents + addr + count,
1189 (size_t) (toaddr - addr - count));
eea6121a 1190 sec->size -= count;
252b5132
RH
1191
1192 /* Adjust all the relocs. */
1193 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1194 {
1195 /* Get the new reloc address. */
1196 if ((irel->r_offset > addr
1197 && irel->r_offset < toaddr))
1198 irel->r_offset -= count;
1199 }
1200
1201 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1202 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1203 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1204 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1205 {
6cdc0ccc
AM
1206 if (isym->st_shndx == sec_shndx
1207 && isym->st_value > addr
1208 && isym->st_value < toaddr)
1209 isym->st_value -= count;
252b5132
RH
1210 }
1211
1212 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1213 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1214 - symtab_hdr->sh_info);
1215 sym_hashes = elf_sym_hashes (abfd);
1216 end_hashes = sym_hashes + symcount;
1217 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1218 {
9ad5cbcf
AM
1219 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1220 if ((sym_hash->root.type == bfd_link_hash_defined
1221 || sym_hash->root.type == bfd_link_hash_defweak)
1222 && sym_hash->root.u.def.section == sec
1223 && sym_hash->root.u.def.value > addr
1224 && sym_hash->root.u.def.value < toaddr)
252b5132 1225 {
9ad5cbcf 1226 sym_hash->root.u.def.value -= count;
252b5132
RH
1227 }
1228 }
1229
b34976b6 1230 return TRUE;
252b5132
RH
1231}
1232
b34976b6
AM
1233/* Return TRUE if a symbol exists at the given address, else return
1234 FALSE. */
1235static bfd_boolean
6cdc0ccc 1236mn10200_elf_symbol_address_p (abfd, sec, isym, addr)
252b5132
RH
1237 bfd *abfd;
1238 asection *sec;
6cdc0ccc 1239 Elf_Internal_Sym *isym;
252b5132
RH
1240 bfd_vma addr;
1241{
1242 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1243 unsigned int sec_shndx;
6cdc0ccc 1244 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1245 struct elf_link_hash_entry **sym_hashes;
1246 struct elf_link_hash_entry **end_hashes;
1247 unsigned int symcount;
252b5132 1248
9ad5cbcf 1249 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132 1250
6cdc0ccc 1251 /* Examine all the local symbols. */
9ad5cbcf 1252 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc 1253 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1254 {
6cdc0ccc
AM
1255 if (isym->st_shndx == sec_shndx
1256 && isym->st_value == addr)
b34976b6 1257 return TRUE;
252b5132
RH
1258 }
1259
9ad5cbcf
AM
1260 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1261 - symtab_hdr->sh_info);
1262 sym_hashes = elf_sym_hashes (abfd);
1263 end_hashes = sym_hashes + symcount;
1264 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1265 {
9ad5cbcf
AM
1266 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1267 if ((sym_hash->root.type == bfd_link_hash_defined
1268 || sym_hash->root.type == bfd_link_hash_defweak)
1269 && sym_hash->root.u.def.section == sec
1270 && sym_hash->root.u.def.value == addr)
b34976b6 1271 return TRUE;
252b5132 1272 }
9ad5cbcf 1273
b34976b6 1274 return FALSE;
252b5132
RH
1275}
1276
1277/* This is a version of bfd_generic_get_relocated_section_contents
1278 which uses mn10200_elf_relocate_section. */
1279
1280static bfd_byte *
1281mn10200_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1049f94e 1282 data, relocatable, symbols)
252b5132
RH
1283 bfd *output_bfd;
1284 struct bfd_link_info *link_info;
1285 struct bfd_link_order *link_order;
1286 bfd_byte *data;
1049f94e 1287 bfd_boolean relocatable;
252b5132
RH
1288 asymbol **symbols;
1289{
1290 Elf_Internal_Shdr *symtab_hdr;
1291 asection *input_section = link_order->u.indirect.section;
1292 bfd *input_bfd = input_section->owner;
1293 asection **sections = NULL;
1294 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1295 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
1296
1297 /* We only need to handle the case of relaxing, or of having a
1298 particular set of section contents, specially. */
1049f94e 1299 if (relocatable
252b5132
RH
1300 || elf_section_data (input_section)->this_hdr.contents == NULL)
1301 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1302 link_order, data,
1049f94e 1303 relocatable,
252b5132
RH
1304 symbols);
1305
1306 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1307
1308 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1309 (size_t) input_section->size);
252b5132
RH
1310
1311 if ((input_section->flags & SEC_RELOC) != 0
1312 && input_section->reloc_count > 0)
1313 {
6cdc0ccc
AM
1314 Elf_Internal_Sym *isym;
1315 Elf_Internal_Sym *isymend;
252b5132 1316 asection **secpp;
9ad5cbcf 1317 bfd_size_type amt;
252b5132 1318
45d6a902 1319 internal_relocs = (_bfd_elf_link_read_relocs
252b5132 1320 (input_bfd, input_section, (PTR) NULL,
b34976b6 1321 (Elf_Internal_Rela *) NULL, FALSE));
252b5132
RH
1322 if (internal_relocs == NULL)
1323 goto error_return;
1324
6cdc0ccc
AM
1325 if (symtab_hdr->sh_info != 0)
1326 {
1327 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1328 if (isymbuf == NULL)
1329 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1330 symtab_hdr->sh_info, 0,
1331 NULL, NULL, NULL);
1332 if (isymbuf == NULL)
1333 goto error_return;
1334 }
252b5132 1335
9ad5cbcf
AM
1336 amt = symtab_hdr->sh_info;
1337 amt *= sizeof (asection *);
1338 sections = (asection **) bfd_malloc (amt);
1339 if (sections == NULL && amt != 0)
252b5132
RH
1340 goto error_return;
1341
6cdc0ccc
AM
1342 isymend = isymbuf + symtab_hdr->sh_info;
1343 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
252b5132
RH
1344 {
1345 asection *isec;
1346
6cdc0ccc 1347 if (isym->st_shndx == SHN_UNDEF)
252b5132 1348 isec = bfd_und_section_ptr;
6cdc0ccc 1349 else if (isym->st_shndx == SHN_ABS)
252b5132 1350 isec = bfd_abs_section_ptr;
6cdc0ccc 1351 else if (isym->st_shndx == SHN_COMMON)
252b5132
RH
1352 isec = bfd_com_section_ptr;
1353 else
6cdc0ccc 1354 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
252b5132
RH
1355
1356 *secpp = isec;
1357 }
1358
1359 if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd,
1360 input_section, data, internal_relocs,
6cdc0ccc 1361 isymbuf, sections))
252b5132
RH
1362 goto error_return;
1363
1364 if (sections != NULL)
1365 free (sections);
6cdc0ccc
AM
1366 if (isymbuf != NULL
1367 && symtab_hdr->contents != (unsigned char *) isymbuf)
1368 free (isymbuf);
1369 if (elf_section_data (input_section)->relocs != internal_relocs)
252b5132 1370 free (internal_relocs);
252b5132
RH
1371 }
1372
1373 return data;
1374
1375 error_return:
252b5132
RH
1376 if (sections != NULL)
1377 free (sections);
6cdc0ccc
AM
1378 if (isymbuf != NULL
1379 && symtab_hdr->contents != (unsigned char *) isymbuf)
1380 free (isymbuf);
1381 if (internal_relocs != NULL
1382 && elf_section_data (input_section)->relocs != internal_relocs)
1383 free (internal_relocs);
252b5132
RH
1384 return NULL;
1385}
1386
252b5132
RH
1387#define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec
1388#define TARGET_LITTLE_NAME "elf32-mn10200"
1389#define ELF_ARCH bfd_arch_mn10200
aa4f99bb
AO
1390#define ELF_MACHINE_CODE EM_MN10200
1391#define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200
252b5132
RH
1392#define ELF_MAXPAGESIZE 0x1000
1393
b491616a 1394#define elf_backend_rela_normal 1
252b5132
RH
1395#define elf_info_to_howto mn10200_info_to_howto
1396#define elf_info_to_howto_rel 0
1397#define elf_backend_relocate_section mn10200_elf_relocate_section
1398#define bfd_elf32_bfd_relax_section mn10200_elf_relax_section
1399#define bfd_elf32_bfd_get_relocated_section_contents \
1400 mn10200_elf_get_relocated_section_contents
1401
1402#define elf_symbol_leading_char '_'
1403
1404#include "elf32-target.h"
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