Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Matsushita 10200 specific support for 32-bit ELF |
82704155 | 2 | Copyright (C) 1996-2019 Free Software Foundation, Inc. |
252b5132 | 3 | |
cd123cb7 | 4 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 5 | |
cd123cb7 NC |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
252b5132 | 10 | |
cd123cb7 NC |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
252b5132 | 15 | |
cd123cb7 NC |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
19 | MA 02110-1301, USA. */ | |
252b5132 | 20 | |
252b5132 | 21 | #include "sysdep.h" |
3db64b00 | 22 | #include "bfd.h" |
252b5132 RH |
23 | #include "libbfd.h" |
24 | #include "elf-bfd.h" | |
25 | ||
2c3fc389 NC |
26 | static bfd_boolean |
27 | mn10200_elf_relax_delete_bytes (bfd *, asection *, bfd_vma, int); | |
28 | static bfd_boolean | |
29 | mn10200_elf_symbol_address_p (bfd *, asection *, Elf_Internal_Sym *, bfd_vma); | |
30 | ||
31 | enum reloc_type | |
32 | { | |
252b5132 RH |
33 | R_MN10200_NONE = 0, |
34 | R_MN10200_32, | |
35 | R_MN10200_16, | |
36 | R_MN10200_8, | |
37 | R_MN10200_24, | |
38 | R_MN10200_PCREL8, | |
39 | R_MN10200_PCREL16, | |
40 | R_MN10200_PCREL24, | |
41 | R_MN10200_MAX | |
42 | }; | |
43 | ||
2c3fc389 NC |
44 | static reloc_howto_type elf_mn10200_howto_table[] = |
45 | { | |
252b5132 RH |
46 | /* Dummy relocation. Does nothing. */ |
47 | HOWTO (R_MN10200_NONE, | |
48 | 0, | |
6346d5ca AM |
49 | 3, |
50 | 0, | |
b34976b6 | 51 | FALSE, |
252b5132 | 52 | 0, |
6346d5ca | 53 | complain_overflow_dont, |
252b5132 RH |
54 | bfd_elf_generic_reloc, |
55 | "R_MN10200_NONE", | |
b34976b6 | 56 | FALSE, |
252b5132 RH |
57 | 0, |
58 | 0, | |
b34976b6 | 59 | FALSE), |
252b5132 RH |
60 | /* Standard 32 bit reloc. */ |
61 | HOWTO (R_MN10200_32, | |
62 | 0, | |
63 | 2, | |
64 | 32, | |
b34976b6 | 65 | FALSE, |
252b5132 RH |
66 | 0, |
67 | complain_overflow_bitfield, | |
68 | bfd_elf_generic_reloc, | |
69 | "R_MN10200_32", | |
b34976b6 | 70 | FALSE, |
252b5132 RH |
71 | 0xffffffff, |
72 | 0xffffffff, | |
b34976b6 | 73 | FALSE), |
252b5132 RH |
74 | /* Standard 16 bit reloc. */ |
75 | HOWTO (R_MN10200_16, | |
76 | 0, | |
77 | 1, | |
78 | 16, | |
b34976b6 | 79 | FALSE, |
252b5132 RH |
80 | 0, |
81 | complain_overflow_bitfield, | |
82 | bfd_elf_generic_reloc, | |
83 | "R_MN10200_16", | |
b34976b6 | 84 | FALSE, |
252b5132 RH |
85 | 0xffff, |
86 | 0xffff, | |
b34976b6 | 87 | FALSE), |
252b5132 RH |
88 | /* Standard 8 bit reloc. */ |
89 | HOWTO (R_MN10200_8, | |
90 | 0, | |
91 | 0, | |
92 | 8, | |
b34976b6 | 93 | FALSE, |
252b5132 RH |
94 | 0, |
95 | complain_overflow_bitfield, | |
96 | bfd_elf_generic_reloc, | |
97 | "R_MN10200_8", | |
b34976b6 | 98 | FALSE, |
252b5132 RH |
99 | 0xff, |
100 | 0xff, | |
b34976b6 | 101 | FALSE), |
252b5132 RH |
102 | /* Standard 24 bit reloc. */ |
103 | HOWTO (R_MN10200_24, | |
104 | 0, | |
105 | 2, | |
106 | 24, | |
b34976b6 | 107 | FALSE, |
252b5132 RH |
108 | 0, |
109 | complain_overflow_bitfield, | |
110 | bfd_elf_generic_reloc, | |
111 | "R_MN10200_24", | |
b34976b6 | 112 | FALSE, |
252b5132 RH |
113 | 0xffffff, |
114 | 0xffffff, | |
b34976b6 | 115 | FALSE), |
252b5132 RH |
116 | /* Simple 8 pc-relative reloc. */ |
117 | HOWTO (R_MN10200_PCREL8, | |
118 | 0, | |
119 | 0, | |
120 | 8, | |
b34976b6 | 121 | TRUE, |
252b5132 RH |
122 | 0, |
123 | complain_overflow_bitfield, | |
124 | bfd_elf_generic_reloc, | |
125 | "R_MN10200_PCREL8", | |
b34976b6 | 126 | FALSE, |
252b5132 RH |
127 | 0xff, |
128 | 0xff, | |
b34976b6 | 129 | TRUE), |
252b5132 RH |
130 | /* Simple 16 pc-relative reloc. */ |
131 | HOWTO (R_MN10200_PCREL16, | |
132 | 0, | |
133 | 1, | |
134 | 16, | |
b34976b6 | 135 | TRUE, |
252b5132 RH |
136 | 0, |
137 | complain_overflow_bitfield, | |
138 | bfd_elf_generic_reloc, | |
139 | "R_MN10200_PCREL16", | |
b34976b6 | 140 | FALSE, |
252b5132 RH |
141 | 0xffff, |
142 | 0xffff, | |
b34976b6 | 143 | TRUE), |
252b5132 RH |
144 | /* Simple 32bit pc-relative reloc with a 1 byte adjustment |
145 | to get the pc-relative offset correct. */ | |
146 | HOWTO (R_MN10200_PCREL24, | |
147 | 0, | |
148 | 2, | |
149 | 24, | |
b34976b6 | 150 | TRUE, |
252b5132 RH |
151 | 0, |
152 | complain_overflow_bitfield, | |
153 | bfd_elf_generic_reloc, | |
154 | "R_MN10200_PCREL24", | |
b34976b6 | 155 | FALSE, |
252b5132 RH |
156 | 0xffffff, |
157 | 0xffffff, | |
b34976b6 | 158 | TRUE), |
252b5132 RH |
159 | }; |
160 | ||
2c3fc389 NC |
161 | struct mn10200_reloc_map |
162 | { | |
252b5132 RH |
163 | bfd_reloc_code_real_type bfd_reloc_val; |
164 | unsigned char elf_reloc_val; | |
165 | }; | |
166 | ||
2c3fc389 NC |
167 | static const struct mn10200_reloc_map mn10200_reloc_map[] = |
168 | { | |
27def10f KH |
169 | { BFD_RELOC_NONE , R_MN10200_NONE , }, |
170 | { BFD_RELOC_32 , R_MN10200_32 , }, | |
171 | { BFD_RELOC_16 , R_MN10200_16 , }, | |
172 | { BFD_RELOC_8 , R_MN10200_8 , }, | |
173 | { BFD_RELOC_24 , R_MN10200_24 , }, | |
174 | { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , }, | |
252b5132 RH |
175 | { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, }, |
176 | { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, }, | |
177 | }; | |
178 | ||
179 | static reloc_howto_type * | |
2c3fc389 NC |
180 | bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
181 | bfd_reloc_code_real_type code) | |
252b5132 RH |
182 | { |
183 | unsigned int i; | |
184 | ||
185 | for (i = 0; | |
186 | i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map); | |
187 | i++) | |
188 | { | |
189 | if (mn10200_reloc_map[i].bfd_reloc_val == code) | |
190 | return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val]; | |
191 | } | |
192 | ||
193 | return NULL; | |
194 | } | |
195 | ||
157090f7 AM |
196 | static reloc_howto_type * |
197 | bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
198 | const char *r_name) | |
199 | { | |
200 | unsigned int i; | |
201 | ||
202 | for (i = 0; | |
203 | i < (sizeof (elf_mn10200_howto_table) | |
204 | / sizeof (elf_mn10200_howto_table[0])); | |
205 | i++) | |
206 | if (elf_mn10200_howto_table[i].name != NULL | |
207 | && strcasecmp (elf_mn10200_howto_table[i].name, r_name) == 0) | |
208 | return &elf_mn10200_howto_table[i]; | |
209 | ||
210 | return NULL; | |
211 | } | |
212 | ||
252b5132 RH |
213 | /* Set the howto pointer for an MN10200 ELF reloc. */ |
214 | ||
f3185997 NC |
215 | static bfd_boolean |
216 | mn10200_info_to_howto (bfd *abfd, | |
2c3fc389 NC |
217 | arelent *cache_ptr, |
218 | Elf_Internal_Rela *dst) | |
252b5132 RH |
219 | { |
220 | unsigned int r_type; | |
221 | ||
222 | r_type = ELF32_R_TYPE (dst->r_info); | |
f3185997 NC |
223 | if (r_type >= (unsigned int) R_MN10200_MAX) |
224 | { | |
225 | /* xgettext:c-format */ | |
226 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), | |
227 | abfd, r_type); | |
228 | bfd_set_error (bfd_error_bad_value); | |
229 | return FALSE; | |
230 | } | |
4b24dd1a | 231 | |
252b5132 | 232 | cache_ptr->howto = &elf_mn10200_howto_table[r_type]; |
f3185997 | 233 | return cache_ptr->howto != NULL; |
252b5132 RH |
234 | } |
235 | ||
236 | /* Perform a relocation as part of a final link. */ | |
917583ad | 237 | |
252b5132 | 238 | static bfd_reloc_status_type |
2c3fc389 NC |
239 | mn10200_elf_final_link_relocate (reloc_howto_type *howto, |
240 | bfd *input_bfd, | |
241 | bfd *output_bfd ATTRIBUTE_UNUSED, | |
242 | asection *input_section, | |
243 | bfd_byte *contents, | |
244 | bfd_vma offset, | |
245 | bfd_vma value, | |
246 | bfd_vma addend, | |
247 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
248 | asection *sym_sec ATTRIBUTE_UNUSED, | |
249 | int is_local ATTRIBUTE_UNUSED) | |
252b5132 RH |
250 | { |
251 | unsigned long r_type = howto->type; | |
252 | bfd_byte *hit_data = contents + offset; | |
253 | ||
254 | switch (r_type) | |
255 | { | |
256 | ||
257 | case R_MN10200_NONE: | |
258 | return bfd_reloc_ok; | |
259 | ||
260 | case R_MN10200_32: | |
261 | value += addend; | |
262 | bfd_put_32 (input_bfd, value, hit_data); | |
263 | return bfd_reloc_ok; | |
264 | ||
265 | case R_MN10200_16: | |
266 | value += addend; | |
267 | ||
27def10f | 268 | if ((long) value > 0x7fff || (long) value < -0x8000) |
252b5132 RH |
269 | return bfd_reloc_overflow; |
270 | ||
271 | bfd_put_16 (input_bfd, value, hit_data); | |
272 | return bfd_reloc_ok; | |
273 | ||
274 | case R_MN10200_8: | |
275 | value += addend; | |
276 | ||
27def10f | 277 | if ((long) value > 0x7f || (long) value < -0x80) |
252b5132 RH |
278 | return bfd_reloc_overflow; |
279 | ||
280 | bfd_put_8 (input_bfd, value, hit_data); | |
281 | return bfd_reloc_ok; | |
282 | ||
283 | case R_MN10200_24: | |
284 | value += addend; | |
285 | ||
27def10f | 286 | if ((long) value > 0x7fffff || (long) value < -0x800000) |
252b5132 RH |
287 | return bfd_reloc_overflow; |
288 | ||
289 | value &= 0xffffff; | |
290 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
291 | bfd_put_32 (input_bfd, value, hit_data); | |
292 | return bfd_reloc_ok; | |
293 | ||
294 | case R_MN10200_PCREL8: | |
295 | value -= (input_section->output_section->vma | |
296 | + input_section->output_offset); | |
297 | value -= (offset + 1); | |
298 | value += addend; | |
299 | ||
27def10f KH |
300 | if ((long) value > 0xff || (long) value < -0x100) |
301 | return bfd_reloc_overflow; | |
252b5132 RH |
302 | |
303 | bfd_put_8 (input_bfd, value, hit_data); | |
304 | return bfd_reloc_ok; | |
305 | ||
306 | case R_MN10200_PCREL16: | |
307 | value -= (input_section->output_section->vma | |
308 | + input_section->output_offset); | |
309 | value -= (offset + 2); | |
310 | value += addend; | |
311 | ||
27def10f KH |
312 | if ((long) value > 0xffff || (long) value < -0x10000) |
313 | return bfd_reloc_overflow; | |
252b5132 RH |
314 | |
315 | bfd_put_16 (input_bfd, value, hit_data); | |
316 | return bfd_reloc_ok; | |
317 | ||
318 | case R_MN10200_PCREL24: | |
319 | value -= (input_section->output_section->vma | |
320 | + input_section->output_offset); | |
321 | value -= (offset + 3); | |
322 | value += addend; | |
323 | ||
27def10f KH |
324 | if ((long) value > 0xffffff || (long) value < -0x1000000) |
325 | return bfd_reloc_overflow; | |
252b5132 RH |
326 | |
327 | value &= 0xffffff; | |
328 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
329 | bfd_put_32 (input_bfd, value, hit_data); | |
330 | return bfd_reloc_ok; | |
331 | ||
332 | default: | |
333 | return bfd_reloc_notsupported; | |
334 | } | |
335 | } | |
252b5132 RH |
336 | \f |
337 | /* Relocate an MN10200 ELF section. */ | |
b34976b6 | 338 | static bfd_boolean |
2c3fc389 NC |
339 | mn10200_elf_relocate_section (bfd *output_bfd, |
340 | struct bfd_link_info *info, | |
341 | bfd *input_bfd, | |
342 | asection *input_section, | |
343 | bfd_byte *contents, | |
344 | Elf_Internal_Rela *relocs, | |
345 | Elf_Internal_Sym *local_syms, | |
346 | asection **local_sections) | |
252b5132 RH |
347 | { |
348 | Elf_Internal_Shdr *symtab_hdr; | |
349 | struct elf_link_hash_entry **sym_hashes; | |
350 | Elf_Internal_Rela *rel, *relend; | |
351 | ||
352 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
353 | sym_hashes = elf_sym_hashes (input_bfd); | |
354 | ||
355 | rel = relocs; | |
356 | relend = relocs + input_section->reloc_count; | |
357 | for (; rel < relend; rel++) | |
358 | { | |
359 | int r_type; | |
360 | reloc_howto_type *howto; | |
361 | unsigned long r_symndx; | |
362 | Elf_Internal_Sym *sym; | |
363 | asection *sec; | |
364 | struct elf_link_hash_entry *h; | |
365 | bfd_vma relocation; | |
366 | bfd_reloc_status_type r; | |
367 | ||
368 | r_symndx = ELF32_R_SYM (rel->r_info); | |
369 | r_type = ELF32_R_TYPE (rel->r_info); | |
370 | howto = elf_mn10200_howto_table + r_type; | |
371 | ||
252b5132 RH |
372 | h = NULL; |
373 | sym = NULL; | |
374 | sec = NULL; | |
375 | if (r_symndx < symtab_hdr->sh_info) | |
376 | { | |
377 | sym = local_syms + r_symndx; | |
378 | sec = local_sections[r_symndx]; | |
8517fae7 | 379 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
252b5132 RH |
380 | } |
381 | else | |
382 | { | |
62d887d4 | 383 | bfd_boolean unresolved_reloc, warned, ignored; |
59c2e50f | 384 | |
b2a8e766 AM |
385 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
386 | r_symndx, symtab_hdr, sym_hashes, | |
387 | h, sec, relocation, | |
62d887d4 | 388 | unresolved_reloc, warned, ignored); |
252b5132 RH |
389 | } |
390 | ||
dbaa2011 | 391 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 392 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 393 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 394 | |
0e1862bb | 395 | if (bfd_link_relocatable (info)) |
ab96bf03 AM |
396 | continue; |
397 | ||
252b5132 RH |
398 | r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, |
399 | input_section, | |
400 | contents, rel->r_offset, | |
401 | relocation, rel->r_addend, | |
402 | info, sec, h == NULL); | |
403 | ||
404 | if (r != bfd_reloc_ok) | |
405 | { | |
406 | const char *name; | |
27def10f | 407 | const char *msg = (const char *) 0; |
252b5132 RH |
408 | |
409 | if (h != NULL) | |
410 | name = h->root.root.string; | |
411 | else | |
412 | { | |
413 | name = (bfd_elf_string_from_elf_section | |
414 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
415 | if (name == NULL || *name == '\0') | |
416 | name = bfd_section_name (input_bfd, sec); | |
417 | } | |
418 | ||
419 | switch (r) | |
420 | { | |
421 | case bfd_reloc_overflow: | |
1a72702b AM |
422 | (*info->callbacks->reloc_overflow) |
423 | (info, (h ? &h->root : NULL), name, howto->name, | |
424 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
425 | break; |
426 | ||
427 | case bfd_reloc_undefined: | |
1a72702b AM |
428 | (*info->callbacks->undefined_symbol) (info, name, input_bfd, |
429 | input_section, | |
430 | rel->r_offset, TRUE); | |
252b5132 RH |
431 | break; |
432 | ||
433 | case bfd_reloc_outofrange: | |
434 | msg = _("internal error: out of range error"); | |
435 | goto common_error; | |
436 | ||
437 | case bfd_reloc_notsupported: | |
438 | msg = _("internal error: unsupported relocation error"); | |
439 | goto common_error; | |
440 | ||
441 | case bfd_reloc_dangerous: | |
442 | msg = _("internal error: dangerous error"); | |
443 | goto common_error; | |
444 | ||
445 | default: | |
446 | msg = _("internal error: unknown error"); | |
447 | /* fall through */ | |
448 | ||
449 | common_error: | |
1a72702b AM |
450 | (*info->callbacks->warning) (info, msg, name, input_bfd, |
451 | input_section, rel->r_offset); | |
252b5132 RH |
452 | break; |
453 | } | |
454 | } | |
455 | } | |
456 | ||
b34976b6 | 457 | return TRUE; |
252b5132 RH |
458 | } |
459 | ||
2c3fc389 NC |
460 | /* Delete some bytes from a section while relaxing. */ |
461 | ||
462 | static bfd_boolean | |
463 | mn10200_elf_relax_delete_bytes (bfd *abfd, asection *sec, | |
464 | bfd_vma addr, int count) | |
465 | { | |
466 | Elf_Internal_Shdr *symtab_hdr; | |
467 | unsigned int sec_shndx; | |
468 | bfd_byte *contents; | |
469 | Elf_Internal_Rela *irel, *irelend; | |
470 | bfd_vma toaddr; | |
471 | Elf_Internal_Sym *isym; | |
472 | Elf_Internal_Sym *isymend; | |
473 | struct elf_link_hash_entry **sym_hashes; | |
474 | struct elf_link_hash_entry **end_hashes; | |
475 | unsigned int symcount; | |
476 | ||
477 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
478 | ||
479 | contents = elf_section_data (sec)->this_hdr.contents; | |
480 | ||
481 | toaddr = sec->size; | |
482 | ||
483 | irel = elf_section_data (sec)->relocs; | |
484 | irelend = irel + sec->reloc_count; | |
485 | ||
486 | /* Actually delete the bytes. */ | |
487 | memmove (contents + addr, contents + addr + count, | |
488 | (size_t) (toaddr - addr - count)); | |
489 | sec->size -= count; | |
490 | ||
491 | /* Adjust all the relocs. */ | |
492 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
493 | { | |
494 | /* Get the new reloc address. */ | |
495 | if ((irel->r_offset > addr | |
496 | && irel->r_offset < toaddr)) | |
497 | irel->r_offset -= count; | |
498 | } | |
499 | ||
500 | /* Adjust the local symbols defined in this section. */ | |
501 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
502 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
503 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) | |
504 | { | |
505 | if (isym->st_shndx == sec_shndx | |
506 | && isym->st_value > addr | |
507 | && isym->st_value < toaddr) | |
508 | isym->st_value -= count; | |
509 | } | |
510 | ||
511 | /* Now adjust the global symbols defined in this section. */ | |
512 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
513 | - symtab_hdr->sh_info); | |
514 | sym_hashes = elf_sym_hashes (abfd); | |
515 | end_hashes = sym_hashes + symcount; | |
516 | for (; sym_hashes < end_hashes; sym_hashes++) | |
517 | { | |
518 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
519 | if ((sym_hash->root.type == bfd_link_hash_defined | |
520 | || sym_hash->root.type == bfd_link_hash_defweak) | |
521 | && sym_hash->root.u.def.section == sec | |
522 | && sym_hash->root.u.def.value > addr | |
523 | && sym_hash->root.u.def.value < toaddr) | |
524 | { | |
525 | sym_hash->root.u.def.value -= count; | |
526 | } | |
527 | } | |
528 | ||
529 | return TRUE; | |
530 | } | |
531 | ||
252b5132 RH |
532 | /* This function handles relaxing for the mn10200. |
533 | ||
4cc11e76 | 534 | There are quite a few relaxing opportunities available on the mn10200: |
252b5132 | 535 | |
07d6d2b8 | 536 | * jsr:24 -> jsr:16 2 bytes |
252b5132 RH |
537 | |
538 | * jmp:24 -> jmp:16 2 bytes | |
539 | * jmp:16 -> bra:8 1 byte | |
540 | ||
541 | * If the previous instruction is a conditional branch | |
542 | around the jump/bra, we may be able to reverse its condition | |
543 | and change its target to the jump's target. The jump/bra | |
544 | can then be deleted. 2 bytes | |
545 | ||
546 | * mov abs24 -> mov abs16 2 byte savings | |
547 | ||
548 | * Most instructions which accept imm24 can relax to imm16 2 bytes | |
549 | - Most instructions which accept imm16 can relax to imm8 1 byte | |
550 | ||
551 | * Most instructions which accept d24 can relax to d16 2 bytes | |
552 | - Most instructions which accept d16 can relax to d8 1 byte | |
553 | ||
554 | abs24, imm24, d24 all look the same at the reloc level. It | |
555 | might make the code simpler if we had different relocs for | |
556 | the various relaxable operand types. | |
a7c10850 | 557 | |
252b5132 RH |
558 | We don't handle imm16->imm8 or d16->d8 as they're very rare |
559 | and somewhat more difficult to support. */ | |
560 | ||
b34976b6 | 561 | static bfd_boolean |
2c3fc389 NC |
562 | mn10200_elf_relax_section (bfd *abfd, |
563 | asection *sec, | |
564 | struct bfd_link_info *link_info, | |
565 | bfd_boolean *again) | |
252b5132 RH |
566 | { |
567 | Elf_Internal_Shdr *symtab_hdr; | |
568 | Elf_Internal_Rela *internal_relocs; | |
252b5132 RH |
569 | Elf_Internal_Rela *irel, *irelend; |
570 | bfd_byte *contents = NULL; | |
6cdc0ccc | 571 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
572 | |
573 | /* Assume nothing changes. */ | |
b34976b6 | 574 | *again = FALSE; |
252b5132 | 575 | |
1049f94e | 576 | /* We don't have to do anything for a relocatable link, if |
252b5132 RH |
577 | this section does not have relocs, or if this is not a |
578 | code section. */ | |
0e1862bb | 579 | if (bfd_link_relocatable (link_info) |
252b5132 RH |
580 | || (sec->flags & SEC_RELOC) == 0 |
581 | || sec->reloc_count == 0 | |
582 | || (sec->flags & SEC_CODE) == 0) | |
b34976b6 | 583 | return TRUE; |
252b5132 | 584 | |
252b5132 RH |
585 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
586 | ||
587 | /* Get a copy of the native relocations. */ | |
45d6a902 | 588 | internal_relocs = (_bfd_elf_link_read_relocs |
2c3fc389 | 589 | (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, |
252b5132 RH |
590 | link_info->keep_memory)); |
591 | if (internal_relocs == NULL) | |
592 | goto error_return; | |
252b5132 RH |
593 | |
594 | /* Walk through them looking for relaxing opportunities. */ | |
595 | irelend = internal_relocs + sec->reloc_count; | |
596 | for (irel = internal_relocs; irel < irelend; irel++) | |
597 | { | |
598 | bfd_vma symval; | |
599 | ||
600 | /* If this isn't something that can be relaxed, then ignore | |
601 | this reloc. */ | |
602 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE | |
603 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8 | |
604 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX) | |
605 | continue; | |
606 | ||
607 | /* Get the section contents if we haven't done so already. */ | |
608 | if (contents == NULL) | |
609 | { | |
610 | /* Get cached copy if it exists. */ | |
611 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
612 | contents = elf_section_data (sec)->this_hdr.contents; | |
613 | else | |
614 | { | |
615 | /* Go get them off disk. */ | |
eea6121a | 616 | if (!bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
617 | goto error_return; |
618 | } | |
619 | } | |
620 | ||
6cdc0ccc AM |
621 | /* Read this BFD's local symbols if we haven't done so already. */ |
622 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
252b5132 | 623 | { |
6cdc0ccc AM |
624 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
625 | if (isymbuf == NULL) | |
626 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
627 | symtab_hdr->sh_info, 0, | |
628 | NULL, NULL, NULL); | |
629 | if (isymbuf == NULL) | |
630 | goto error_return; | |
252b5132 RH |
631 | } |
632 | ||
633 | /* Get the value of the symbol referred to by the reloc. */ | |
634 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
635 | { | |
9ad5cbcf | 636 | /* A local symbol. */ |
6cdc0ccc | 637 | Elf_Internal_Sym *isym; |
252b5132 RH |
638 | asection *sym_sec; |
639 | ||
6cdc0ccc AM |
640 | isym = isymbuf + ELF32_R_SYM (irel->r_info); |
641 | if (isym->st_shndx == SHN_UNDEF) | |
9ad5cbcf | 642 | sym_sec = bfd_und_section_ptr; |
6cdc0ccc | 643 | else if (isym->st_shndx == SHN_ABS) |
9ad5cbcf | 644 | sym_sec = bfd_abs_section_ptr; |
6cdc0ccc | 645 | else if (isym->st_shndx == SHN_COMMON) |
9ad5cbcf AM |
646 | sym_sec = bfd_com_section_ptr; |
647 | else | |
6cdc0ccc AM |
648 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
649 | symval = (isym->st_value | |
252b5132 RH |
650 | + sym_sec->output_section->vma |
651 | + sym_sec->output_offset); | |
652 | } | |
653 | else | |
654 | { | |
655 | unsigned long indx; | |
656 | struct elf_link_hash_entry *h; | |
657 | ||
658 | /* An external symbol. */ | |
659 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
660 | h = elf_sym_hashes (abfd)[indx]; | |
661 | BFD_ASSERT (h != NULL); | |
662 | if (h->root.type != bfd_link_hash_defined | |
663 | && h->root.type != bfd_link_hash_defweak) | |
664 | { | |
665 | /* This appears to be a reference to an undefined | |
07d6d2b8 AM |
666 | symbol. Just ignore it--it will be caught by the |
667 | regular reloc processing. */ | |
252b5132 RH |
668 | continue; |
669 | } | |
670 | ||
671 | symval = (h->root.u.def.value | |
672 | + h->root.u.def.section->output_section->vma | |
673 | + h->root.u.def.section->output_offset); | |
674 | } | |
675 | ||
676 | /* For simplicity of coding, we are going to modify the section | |
677 | contents, the section relocs, and the BFD symbol table. We | |
678 | must tell the rest of the code not to free up this | |
679 | information. It would be possible to instead create a table | |
680 | of changes which have to be made, as is done in coff-mips.c; | |
681 | that would be more work, but would require less memory when | |
682 | the linker is run. */ | |
683 | ||
252b5132 RH |
684 | /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative |
685 | branch/call. */ | |
686 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24) | |
687 | { | |
688 | bfd_vma value = symval; | |
689 | ||
690 | /* Deal with pc-relative gunk. */ | |
691 | value -= (sec->output_section->vma + sec->output_offset); | |
692 | value -= (irel->r_offset + 3); | |
693 | value += irel->r_addend; | |
694 | ||
695 | /* See if the value will fit in 16 bits, note the high value is | |
696 | 0x7fff + 2 as the target will be two bytes closer if we are | |
697 | able to relax. */ | |
27def10f | 698 | if ((long) value < 0x8001 && (long) value > -0x8000) |
252b5132 RH |
699 | { |
700 | unsigned char code; | |
701 | ||
702 | /* Get the opcode. */ | |
703 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
704 | ||
705 | if (code != 0xe0 && code != 0xe1) | |
706 | continue; | |
707 | ||
708 | /* Note that we've changed the relocs, section contents, etc. */ | |
709 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 710 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 711 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
712 | |
713 | /* Fix the opcode. */ | |
714 | if (code == 0xe0) | |
715 | bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2); | |
716 | else if (code == 0xe1) | |
717 | bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2); | |
718 | ||
719 | /* Fix the relocation's type. */ | |
720 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
721 | R_MN10200_PCREL16); | |
722 | ||
723 | /* The opcode got shorter too, so we have to fix the offset. */ | |
724 | irel->r_offset -= 1; | |
725 | ||
726 | /* Delete two bytes of data. */ | |
727 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
728 | irel->r_offset + 1, 2)) | |
729 | goto error_return; | |
730 | ||
731 | /* That will change things, so, we should relax again. | |
732 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 733 | *again = TRUE; |
252b5132 RH |
734 | } |
735 | } | |
736 | ||
737 | /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative | |
738 | branch. */ | |
739 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16) | |
740 | { | |
741 | bfd_vma value = symval; | |
742 | ||
743 | /* Deal with pc-relative gunk. */ | |
744 | value -= (sec->output_section->vma + sec->output_offset); | |
745 | value -= (irel->r_offset + 2); | |
746 | value += irel->r_addend; | |
747 | ||
748 | /* See if the value will fit in 8 bits, note the high value is | |
749 | 0x7f + 1 as the target will be one bytes closer if we are | |
750 | able to relax. */ | |
27def10f | 751 | if ((long) value < 0x80 && (long) value > -0x80) |
252b5132 RH |
752 | { |
753 | unsigned char code; | |
754 | ||
755 | /* Get the opcode. */ | |
756 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
757 | ||
758 | if (code != 0xfc) | |
759 | continue; | |
760 | ||
761 | /* Note that we've changed the relocs, section contents, etc. */ | |
762 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 763 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 764 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
765 | |
766 | /* Fix the opcode. */ | |
767 | bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1); | |
768 | ||
769 | /* Fix the relocation's type. */ | |
770 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
771 | R_MN10200_PCREL8); | |
772 | ||
773 | /* Delete one byte of data. */ | |
774 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
775 | irel->r_offset + 1, 1)) | |
776 | goto error_return; | |
777 | ||
778 | /* That will change things, so, we should relax again. | |
779 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 780 | *again = TRUE; |
252b5132 RH |
781 | } |
782 | } | |
783 | ||
784 | /* Try to eliminate an unconditional 8 bit pc-relative branch | |
785 | which immediately follows a conditional 8 bit pc-relative | |
786 | branch around the unconditional branch. | |
787 | ||
788 | original: new: | |
789 | bCC lab1 bCC' lab2 | |
790 | bra lab2 | |
791 | lab1: lab1: | |
792 | ||
252b5132 RH |
793 | This happens when the bCC can't reach lab2 at assembly time, |
794 | but due to other relaxations it can reach at link time. */ | |
795 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8) | |
796 | { | |
797 | Elf_Internal_Rela *nrel; | |
798 | bfd_vma value = symval; | |
799 | unsigned char code; | |
800 | ||
801 | /* Deal with pc-relative gunk. */ | |
802 | value -= (sec->output_section->vma + sec->output_offset); | |
803 | value -= (irel->r_offset + 1); | |
804 | value += irel->r_addend; | |
805 | ||
806 | /* Do nothing if this reloc is the last byte in the section. */ | |
eea6121a | 807 | if (irel->r_offset == sec->size) |
252b5132 RH |
808 | continue; |
809 | ||
810 | /* See if the next instruction is an unconditional pc-relative | |
811 | branch, more often than not this test will fail, so we | |
812 | test it first to speed things up. */ | |
813 | code = bfd_get_8 (abfd, contents + irel->r_offset + 1); | |
814 | if (code != 0xea) | |
815 | continue; | |
816 | ||
817 | /* Also make sure the next relocation applies to the next | |
818 | instruction and that it's a pc-relative 8 bit branch. */ | |
819 | nrel = irel + 1; | |
820 | if (nrel == irelend | |
821 | || irel->r_offset + 2 != nrel->r_offset | |
822 | || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8) | |
823 | continue; | |
824 | ||
825 | /* Make sure our destination immediately follows the | |
826 | unconditional branch. */ | |
827 | if (symval != (sec->output_section->vma + sec->output_offset | |
828 | + irel->r_offset + 3)) | |
829 | continue; | |
830 | ||
831 | /* Now make sure we are a conditional branch. This may not | |
a7c10850 | 832 | be necessary, but why take the chance. |
252b5132 RH |
833 | |
834 | Note these checks assume that R_MN10200_PCREL8 relocs | |
835 | only occur on bCC and bCCx insns. If they occured | |
836 | elsewhere, we'd need to know the start of this insn | |
837 | for this check to be accurate. */ | |
838 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
839 | if (code != 0xe0 && code != 0xe1 && code != 0xe2 | |
840 | && code != 0xe3 && code != 0xe4 && code != 0xe5 | |
841 | && code != 0xe6 && code != 0xe7 && code != 0xe8 | |
842 | && code != 0xe9 && code != 0xec && code != 0xed | |
843 | && code != 0xee && code != 0xef && code != 0xfc | |
844 | && code != 0xfd && code != 0xfe && code != 0xff) | |
845 | continue; | |
846 | ||
847 | /* We also have to be sure there is no symbol/label | |
848 | at the unconditional branch. */ | |
6cdc0ccc AM |
849 | if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf, |
850 | irel->r_offset + 1)) | |
252b5132 RH |
851 | continue; |
852 | ||
853 | /* Note that we've changed the relocs, section contents, etc. */ | |
854 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 855 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 856 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
857 | |
858 | /* Reverse the condition of the first branch. */ | |
859 | switch (code) | |
860 | { | |
27def10f KH |
861 | case 0xfc: |
862 | code = 0xfd; | |
863 | break; | |
864 | case 0xfd: | |
865 | code = 0xfc; | |
866 | break; | |
867 | case 0xfe: | |
868 | code = 0xff; | |
869 | break; | |
870 | case 0xff: | |
871 | code = 0xfe; | |
872 | break; | |
873 | case 0xe8: | |
874 | code = 0xe9; | |
875 | break; | |
876 | case 0xe9: | |
877 | code = 0xe8; | |
878 | break; | |
879 | case 0xe0: | |
880 | code = 0xe2; | |
881 | break; | |
882 | case 0xe2: | |
883 | code = 0xe0; | |
884 | break; | |
885 | case 0xe3: | |
886 | code = 0xe1; | |
887 | break; | |
888 | case 0xe1: | |
889 | code = 0xe3; | |
890 | break; | |
891 | case 0xe4: | |
892 | code = 0xe6; | |
893 | break; | |
894 | case 0xe6: | |
895 | code = 0xe4; | |
896 | break; | |
897 | case 0xe7: | |
898 | code = 0xe5; | |
899 | break; | |
900 | case 0xe5: | |
901 | code = 0xe7; | |
902 | break; | |
903 | case 0xec: | |
904 | code = 0xed; | |
905 | break; | |
906 | case 0xed: | |
907 | code = 0xec; | |
908 | break; | |
909 | case 0xee: | |
910 | code = 0xef; | |
911 | break; | |
912 | case 0xef: | |
913 | code = 0xee; | |
914 | break; | |
252b5132 RH |
915 | } |
916 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
a7c10850 | 917 | |
252b5132 RH |
918 | /* Set the reloc type and symbol for the first branch |
919 | from the second branch. */ | |
920 | irel->r_info = nrel->r_info; | |
921 | ||
922 | /* Make the reloc for the second branch a null reloc. */ | |
923 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
924 | R_MN10200_NONE); | |
925 | ||
926 | /* Delete two bytes of data. */ | |
927 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
928 | irel->r_offset + 1, 2)) | |
929 | goto error_return; | |
930 | ||
931 | /* That will change things, so, we should relax again. | |
932 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 933 | *again = TRUE; |
252b5132 RH |
934 | } |
935 | ||
936 | /* Try to turn a 24bit immediate, displacement or absolute address | |
937 | into a 16bit immediate, displacement or absolute address. */ | |
938 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24) | |
939 | { | |
940 | bfd_vma value = symval; | |
941 | ||
a7c10850 | 942 | /* See if the value will fit in 16 bits. |
252b5132 RH |
943 | We allow any 16bit match here. We prune those we can't |
944 | handle below. */ | |
27def10f | 945 | if ((long) value < 0x7fff && (long) value > -0x8000) |
252b5132 RH |
946 | { |
947 | unsigned char code; | |
948 | ||
949 | /* All insns which have 24bit operands are 5 bytes long, | |
950 | the first byte will always be 0xf4, but we double check | |
951 | it just in case. */ | |
952 | ||
953 | /* Get the first opcode. */ | |
954 | code = bfd_get_8 (abfd, contents + irel->r_offset - 2); | |
955 | ||
956 | if (code != 0xf4) | |
957 | continue; | |
958 | ||
959 | /* Get the second opcode. */ | |
960 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
961 | ||
962 | switch (code & 0xfc) | |
963 | { | |
964 | /* mov imm24,dn -> mov imm16,dn */ | |
965 | case 0x70: | |
966 | /* Not safe if the high bit is on as relaxing may | |
967 | move the value out of high mem and thus not fit | |
968 | in a signed 16bit value. */ | |
969 | if (value & 0x8000) | |
970 | continue; | |
971 | ||
4cc11e76 | 972 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 973 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 974 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 975 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
976 | |
977 | /* Fix the opcode. */ | |
978 | bfd_put_8 (abfd, 0xf8 + (code & 0x03), | |
979 | contents + irel->r_offset - 2); | |
980 | ||
981 | /* Fix the relocation's type. */ | |
982 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
983 | R_MN10200_16); | |
984 | ||
985 | /* The opcode got shorter too, so we have to fix the | |
986 | offset. */ | |
987 | irel->r_offset -= 1; | |
988 | ||
989 | /* Delete two bytes of data. */ | |
990 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
991 | irel->r_offset + 1, 2)) | |
992 | goto error_return; | |
993 | ||
994 | /* That will change things, so, we should relax again. | |
995 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 996 | *again = TRUE; |
252b5132 RH |
997 | break; |
998 | ||
a7c10850 | 999 | /* mov imm24,an -> mov imm16,an |
252b5132 RH |
1000 | cmp imm24,an -> cmp imm16,an |
1001 | mov (abs24),dn -> mov (abs16),dn | |
1002 | mov dn,(abs24) -> mov dn,(abs16) | |
1003 | movb dn,(abs24) -> movb dn,(abs16) | |
1004 | movbu (abs24),dn -> movbu (abs16),dn */ | |
1005 | case 0x74: | |
1006 | case 0x7c: | |
1007 | case 0xc0: | |
1008 | case 0x40: | |
1009 | case 0x44: | |
1010 | case 0xc8: | |
4cc11e76 | 1011 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1012 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1013 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1014 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1015 | |
1016 | if ((code & 0xfc) == 0x74) | |
1017 | code = 0xdc + (code & 0x03); | |
1018 | else if ((code & 0xfc) == 0x7c) | |
1019 | code = 0xec + (code & 0x03); | |
1020 | else if ((code & 0xfc) == 0xc0) | |
1021 | code = 0xc8 + (code & 0x03); | |
1022 | else if ((code & 0xfc) == 0x40) | |
1023 | code = 0xc0 + (code & 0x03); | |
1024 | else if ((code & 0xfc) == 0x44) | |
1025 | code = 0xc4 + (code & 0x03); | |
1026 | else if ((code & 0xfc) == 0xc8) | |
1027 | code = 0xcc + (code & 0x03); | |
1028 | ||
1029 | /* Fix the opcode. */ | |
1030 | bfd_put_8 (abfd, code, contents + irel->r_offset - 2); | |
1031 | ||
1032 | /* Fix the relocation's type. */ | |
1033 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1034 | R_MN10200_16); | |
1035 | ||
1036 | /* The opcode got shorter too, so we have to fix the | |
1037 | offset. */ | |
1038 | irel->r_offset -= 1; | |
1039 | ||
1040 | /* Delete two bytes of data. */ | |
1041 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1042 | irel->r_offset + 1, 2)) | |
1043 | goto error_return; | |
1044 | ||
1045 | /* That will change things, so, we should relax again. | |
1046 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1047 | *again = TRUE; |
252b5132 RH |
1048 | break; |
1049 | ||
1050 | /* cmp imm24,dn -> cmp imm16,dn | |
1051 | mov (abs24),an -> mov (abs16),an | |
1052 | mov an,(abs24) -> mov an,(abs16) | |
1053 | add imm24,dn -> add imm16,dn | |
1054 | add imm24,an -> add imm16,an | |
1055 | sub imm24,dn -> sub imm16,dn | |
a7c10850 | 1056 | sub imm24,an -> sub imm16,an |
252b5132 RH |
1057 | And all d24->d16 in memory ops. */ |
1058 | case 0x78: | |
1059 | case 0xd0: | |
1060 | case 0x50: | |
1061 | case 0x60: | |
1062 | case 0x64: | |
1063 | case 0x68: | |
1064 | case 0x6c: | |
1065 | case 0x80: | |
1066 | case 0xf0: | |
1067 | case 0x00: | |
1068 | case 0x10: | |
1069 | case 0xb0: | |
1070 | case 0x30: | |
1071 | case 0xa0: | |
1072 | case 0x20: | |
1073 | case 0x90: | |
1074 | /* Not safe if the high bit is on as relaxing may | |
1075 | move the value out of high mem and thus not fit | |
1076 | in a signed 16bit value. */ | |
1077 | if (((code & 0xfc) == 0x78 | |
27def10f KH |
1078 | || (code & 0xfc) == 0x60 |
1079 | || (code & 0xfc) == 0x64 | |
1080 | || (code & 0xfc) == 0x68 | |
1081 | || (code & 0xfc) == 0x6c | |
1082 | || (code & 0xfc) == 0x80 | |
1083 | || (code & 0xfc) == 0xf0 | |
1084 | || (code & 0xfc) == 0x00 | |
1085 | || (code & 0xfc) == 0x10 | |
1086 | || (code & 0xfc) == 0xb0 | |
1087 | || (code & 0xfc) == 0x30 | |
1088 | || (code & 0xfc) == 0xa0 | |
1089 | || (code & 0xfc) == 0x20 | |
1090 | || (code & 0xfc) == 0x90) | |
1091 | && (value & 0x8000) != 0) | |
252b5132 RH |
1092 | continue; |
1093 | ||
4cc11e76 | 1094 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1095 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1096 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1097 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1098 | |
1099 | /* Fix the opcode. */ | |
1100 | bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2); | |
1101 | ||
1102 | if ((code & 0xfc) == 0x78) | |
1103 | code = 0x48 + (code & 0x03); | |
1104 | else if ((code & 0xfc) == 0xd0) | |
1105 | code = 0x30 + (code & 0x03); | |
1106 | else if ((code & 0xfc) == 0x50) | |
1107 | code = 0x20 + (code & 0x03); | |
1108 | else if ((code & 0xfc) == 0x60) | |
1109 | code = 0x18 + (code & 0x03); | |
1110 | else if ((code & 0xfc) == 0x64) | |
1111 | code = 0x08 + (code & 0x03); | |
1112 | else if ((code & 0xfc) == 0x68) | |
1113 | code = 0x1c + (code & 0x03); | |
1114 | else if ((code & 0xfc) == 0x6c) | |
1115 | code = 0x0c + (code & 0x03); | |
1116 | else if ((code & 0xfc) == 0x80) | |
1117 | code = 0xc0 + (code & 0x07); | |
1118 | else if ((code & 0xfc) == 0xf0) | |
1119 | code = 0xb0 + (code & 0x07); | |
1120 | else if ((code & 0xfc) == 0x00) | |
1121 | code = 0x80 + (code & 0x07); | |
1122 | else if ((code & 0xfc) == 0x10) | |
1123 | code = 0xa0 + (code & 0x07); | |
1124 | else if ((code & 0xfc) == 0xb0) | |
1125 | code = 0x70 + (code & 0x07); | |
1126 | else if ((code & 0xfc) == 0x30) | |
1127 | code = 0x60 + (code & 0x07); | |
1128 | else if ((code & 0xfc) == 0xa0) | |
1129 | code = 0xd0 + (code & 0x07); | |
1130 | else if ((code & 0xfc) == 0x20) | |
1131 | code = 0x90 + (code & 0x07); | |
1132 | else if ((code & 0xfc) == 0x90) | |
1133 | code = 0x50 + (code & 0x07); | |
1134 | ||
1135 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
1136 | ||
1137 | /* Fix the relocation's type. */ | |
1138 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1139 | R_MN10200_16); | |
1140 | ||
1141 | /* Delete one bytes of data. */ | |
1142 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1143 | irel->r_offset + 2, 1)) | |
1144 | goto error_return; | |
1145 | ||
1146 | /* That will change things, so, we should relax again. | |
1147 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1148 | *again = TRUE; |
252b5132 RH |
1149 | break; |
1150 | ||
1151 | /* movb (abs24),dn ->movbu (abs16),dn extxb bn */ | |
1152 | case 0xc4: | |
1153 | /* Note that we've changed the reldection contents, etc. */ | |
1154 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 1155 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1156 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1157 | |
1158 | bfd_put_8 (abfd, 0xcc + (code & 0x03), | |
1159 | contents + irel->r_offset - 2); | |
1160 | ||
1161 | bfd_put_8 (abfd, 0xb8 + (code & 0x03), | |
1162 | contents + irel->r_offset - 1); | |
1163 | ||
1164 | /* Fix the relocation's type. */ | |
1165 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1166 | R_MN10200_16); | |
1167 | ||
1168 | /* The reloc will be applied one byte in front of its | |
1169 | current location. */ | |
1170 | irel->r_offset -= 1; | |
1171 | ||
1172 | /* Delete one bytes of data. */ | |
1173 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1174 | irel->r_offset + 2, 1)) | |
1175 | goto error_return; | |
1176 | ||
1177 | /* That will change things, so, we should relax again. | |
1178 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1179 | *again = TRUE; |
252b5132 RH |
1180 | break; |
1181 | } | |
1182 | } | |
1183 | } | |
1184 | } | |
1185 | ||
6cdc0ccc AM |
1186 | if (isymbuf != NULL |
1187 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
252b5132 RH |
1188 | { |
1189 | if (! link_info->keep_memory) | |
6cdc0ccc | 1190 | free (isymbuf); |
252b5132 RH |
1191 | else |
1192 | { | |
6cdc0ccc AM |
1193 | /* Cache the symbols for elf_link_input_bfd. */ |
1194 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
252b5132 | 1195 | } |
9ad5cbcf AM |
1196 | } |
1197 | ||
6cdc0ccc AM |
1198 | if (contents != NULL |
1199 | && elf_section_data (sec)->this_hdr.contents != contents) | |
252b5132 RH |
1200 | { |
1201 | if (! link_info->keep_memory) | |
6cdc0ccc AM |
1202 | free (contents); |
1203 | else | |
252b5132 | 1204 | { |
6cdc0ccc AM |
1205 | /* Cache the section contents for elf_link_input_bfd. */ |
1206 | elf_section_data (sec)->this_hdr.contents = contents; | |
252b5132 | 1207 | } |
252b5132 RH |
1208 | } |
1209 | ||
6cdc0ccc AM |
1210 | if (internal_relocs != NULL |
1211 | && elf_section_data (sec)->relocs != internal_relocs) | |
1212 | free (internal_relocs); | |
1213 | ||
b34976b6 | 1214 | return TRUE; |
252b5132 RH |
1215 | |
1216 | error_return: | |
6cdc0ccc AM |
1217 | if (isymbuf != NULL |
1218 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1219 | free (isymbuf); | |
1220 | if (contents != NULL | |
1221 | && elf_section_data (sec)->this_hdr.contents != contents) | |
1222 | free (contents); | |
1223 | if (internal_relocs != NULL | |
1224 | && elf_section_data (sec)->relocs != internal_relocs) | |
1225 | free (internal_relocs); | |
9ad5cbcf | 1226 | |
b34976b6 | 1227 | return FALSE; |
252b5132 RH |
1228 | } |
1229 | ||
b34976b6 AM |
1230 | /* Return TRUE if a symbol exists at the given address, else return |
1231 | FALSE. */ | |
1232 | static bfd_boolean | |
2c3fc389 NC |
1233 | mn10200_elf_symbol_address_p (bfd *abfd, |
1234 | asection *sec, | |
1235 | Elf_Internal_Sym *isym, | |
1236 | bfd_vma addr) | |
252b5132 RH |
1237 | { |
1238 | Elf_Internal_Shdr *symtab_hdr; | |
9ad5cbcf | 1239 | unsigned int sec_shndx; |
6cdc0ccc | 1240 | Elf_Internal_Sym *isymend; |
9ad5cbcf AM |
1241 | struct elf_link_hash_entry **sym_hashes; |
1242 | struct elf_link_hash_entry **end_hashes; | |
1243 | unsigned int symcount; | |
252b5132 | 1244 | |
9ad5cbcf | 1245 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
252b5132 | 1246 | |
6cdc0ccc | 1247 | /* Examine all the local symbols. */ |
9ad5cbcf | 1248 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
6cdc0ccc | 1249 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) |
252b5132 | 1250 | { |
6cdc0ccc AM |
1251 | if (isym->st_shndx == sec_shndx |
1252 | && isym->st_value == addr) | |
b34976b6 | 1253 | return TRUE; |
252b5132 RH |
1254 | } |
1255 | ||
9ad5cbcf AM |
1256 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
1257 | - symtab_hdr->sh_info); | |
1258 | sym_hashes = elf_sym_hashes (abfd); | |
1259 | end_hashes = sym_hashes + symcount; | |
1260 | for (; sym_hashes < end_hashes; sym_hashes++) | |
252b5132 | 1261 | { |
9ad5cbcf AM |
1262 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
1263 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1264 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1265 | && sym_hash->root.u.def.section == sec | |
1266 | && sym_hash->root.u.def.value == addr) | |
b34976b6 | 1267 | return TRUE; |
252b5132 | 1268 | } |
9ad5cbcf | 1269 | |
b34976b6 | 1270 | return FALSE; |
252b5132 RH |
1271 | } |
1272 | ||
1273 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1274 | which uses mn10200_elf_relocate_section. */ | |
1275 | ||
1276 | static bfd_byte * | |
2c3fc389 NC |
1277 | mn10200_elf_get_relocated_section_contents (bfd *output_bfd, |
1278 | struct bfd_link_info *link_info, | |
1279 | struct bfd_link_order *link_order, | |
1280 | bfd_byte *data, | |
1281 | bfd_boolean relocatable, | |
1282 | asymbol **symbols) | |
252b5132 RH |
1283 | { |
1284 | Elf_Internal_Shdr *symtab_hdr; | |
1285 | asection *input_section = link_order->u.indirect.section; | |
1286 | bfd *input_bfd = input_section->owner; | |
1287 | asection **sections = NULL; | |
1288 | Elf_Internal_Rela *internal_relocs = NULL; | |
6cdc0ccc | 1289 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
1290 | |
1291 | /* We only need to handle the case of relaxing, or of having a | |
1292 | particular set of section contents, specially. */ | |
1049f94e | 1293 | if (relocatable |
252b5132 RH |
1294 | || elf_section_data (input_section)->this_hdr.contents == NULL) |
1295 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1296 | link_order, data, | |
1049f94e | 1297 | relocatable, |
252b5132 RH |
1298 | symbols); |
1299 | ||
1300 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1301 | ||
1302 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
eea6121a | 1303 | (size_t) input_section->size); |
252b5132 RH |
1304 | |
1305 | if ((input_section->flags & SEC_RELOC) != 0 | |
1306 | && input_section->reloc_count > 0) | |
1307 | { | |
6cdc0ccc AM |
1308 | Elf_Internal_Sym *isym; |
1309 | Elf_Internal_Sym *isymend; | |
252b5132 | 1310 | asection **secpp; |
9ad5cbcf | 1311 | bfd_size_type amt; |
252b5132 | 1312 | |
45d6a902 | 1313 | internal_relocs = (_bfd_elf_link_read_relocs |
2c3fc389 | 1314 | (input_bfd, input_section, NULL, |
b34976b6 | 1315 | (Elf_Internal_Rela *) NULL, FALSE)); |
252b5132 RH |
1316 | if (internal_relocs == NULL) |
1317 | goto error_return; | |
1318 | ||
6cdc0ccc AM |
1319 | if (symtab_hdr->sh_info != 0) |
1320 | { | |
1321 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1322 | if (isymbuf == NULL) | |
1323 | isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
1324 | symtab_hdr->sh_info, 0, | |
1325 | NULL, NULL, NULL); | |
1326 | if (isymbuf == NULL) | |
1327 | goto error_return; | |
1328 | } | |
252b5132 | 1329 | |
9ad5cbcf AM |
1330 | amt = symtab_hdr->sh_info; |
1331 | amt *= sizeof (asection *); | |
1332 | sections = (asection **) bfd_malloc (amt); | |
1333 | if (sections == NULL && amt != 0) | |
252b5132 RH |
1334 | goto error_return; |
1335 | ||
6cdc0ccc AM |
1336 | isymend = isymbuf + symtab_hdr->sh_info; |
1337 | for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) | |
252b5132 RH |
1338 | { |
1339 | asection *isec; | |
1340 | ||
6cdc0ccc | 1341 | if (isym->st_shndx == SHN_UNDEF) |
252b5132 | 1342 | isec = bfd_und_section_ptr; |
6cdc0ccc | 1343 | else if (isym->st_shndx == SHN_ABS) |
252b5132 | 1344 | isec = bfd_abs_section_ptr; |
6cdc0ccc | 1345 | else if (isym->st_shndx == SHN_COMMON) |
252b5132 RH |
1346 | isec = bfd_com_section_ptr; |
1347 | else | |
6cdc0ccc | 1348 | isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); |
252b5132 RH |
1349 | |
1350 | *secpp = isec; | |
1351 | } | |
1352 | ||
1353 | if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1354 | input_section, data, internal_relocs, | |
6cdc0ccc | 1355 | isymbuf, sections)) |
252b5132 RH |
1356 | goto error_return; |
1357 | ||
1358 | if (sections != NULL) | |
1359 | free (sections); | |
6cdc0ccc AM |
1360 | if (isymbuf != NULL |
1361 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1362 | free (isymbuf); | |
1363 | if (elf_section_data (input_section)->relocs != internal_relocs) | |
252b5132 | 1364 | free (internal_relocs); |
252b5132 RH |
1365 | } |
1366 | ||
1367 | return data; | |
1368 | ||
1369 | error_return: | |
252b5132 RH |
1370 | if (sections != NULL) |
1371 | free (sections); | |
6cdc0ccc AM |
1372 | if (isymbuf != NULL |
1373 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1374 | free (isymbuf); | |
1375 | if (internal_relocs != NULL | |
1376 | && elf_section_data (input_section)->relocs != internal_relocs) | |
1377 | free (internal_relocs); | |
252b5132 RH |
1378 | return NULL; |
1379 | } | |
1380 | ||
6d00b590 | 1381 | #define TARGET_LITTLE_SYM mn10200_elf32_vec |
252b5132 RH |
1382 | #define TARGET_LITTLE_NAME "elf32-mn10200" |
1383 | #define ELF_ARCH bfd_arch_mn10200 | |
aa4f99bb AO |
1384 | #define ELF_MACHINE_CODE EM_MN10200 |
1385 | #define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200 | |
252b5132 RH |
1386 | #define ELF_MAXPAGESIZE 0x1000 |
1387 | ||
b491616a | 1388 | #define elf_backend_rela_normal 1 |
252b5132 | 1389 | #define elf_info_to_howto mn10200_info_to_howto |
f3185997 | 1390 | #define elf_info_to_howto_rel NULL |
252b5132 RH |
1391 | #define elf_backend_relocate_section mn10200_elf_relocate_section |
1392 | #define bfd_elf32_bfd_relax_section mn10200_elf_relax_section | |
1393 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
1394 | mn10200_elf_get_relocated_section_contents | |
1395 | ||
1396 | #define elf_symbol_leading_char '_' | |
1397 | ||
1398 | #include "elf32-target.h" |