* ldcref.c (cref_fill_array): Call bfd_demangle rather than demangle.
[deliverable/binutils-gdb.git] / bfd / elf-m10200.c
CommitLineData
252b5132 1/* Matsushita 10200 specific support for 32-bit ELF
ab96bf03 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2007
7898deda 3 Free Software Foundation, Inc.
252b5132
RH
4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
3e110533 19Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132
RH
20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25
26static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
27 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
28static void mn10200_info_to_howto
947216bf 29 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
b34976b6 30static bfd_boolean mn10200_elf_relax_delete_bytes
252b5132 31 PARAMS ((bfd *, asection *, bfd_vma, int));
b34976b6 32static bfd_boolean mn10200_elf_symbol_address_p
6cdc0ccc 33 PARAMS ((bfd *, asection *, Elf_Internal_Sym *, bfd_vma));
917583ad
NC
34static bfd_reloc_status_type mn10200_elf_final_link_relocate
35 PARAMS ((reloc_howto_type *, bfd *, bfd *, asection *,
36 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
37 struct bfd_link_info *, asection *, int));
b34976b6
AM
38static bfd_boolean mn10200_elf_relocate_section
39 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *,
40 bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Sym *,
41 asection **));
42static bfd_boolean mn10200_elf_relax_section
43 PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *));
917583ad
NC
44static bfd_byte * mn10200_elf_get_relocated_section_contents
45 PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *,
b34976b6 46 bfd_byte *, bfd_boolean, asymbol **));
252b5132 47
27def10f 48enum reloc_type {
252b5132
RH
49 R_MN10200_NONE = 0,
50 R_MN10200_32,
51 R_MN10200_16,
52 R_MN10200_8,
53 R_MN10200_24,
54 R_MN10200_PCREL8,
55 R_MN10200_PCREL16,
56 R_MN10200_PCREL24,
57 R_MN10200_MAX
58};
59
27def10f 60static reloc_howto_type elf_mn10200_howto_table[] = {
252b5132
RH
61 /* Dummy relocation. Does nothing. */
62 HOWTO (R_MN10200_NONE,
63 0,
64 2,
65 16,
b34976b6 66 FALSE,
252b5132
RH
67 0,
68 complain_overflow_bitfield,
69 bfd_elf_generic_reloc,
70 "R_MN10200_NONE",
b34976b6 71 FALSE,
252b5132
RH
72 0,
73 0,
b34976b6 74 FALSE),
252b5132
RH
75 /* Standard 32 bit reloc. */
76 HOWTO (R_MN10200_32,
77 0,
78 2,
79 32,
b34976b6 80 FALSE,
252b5132
RH
81 0,
82 complain_overflow_bitfield,
83 bfd_elf_generic_reloc,
84 "R_MN10200_32",
b34976b6 85 FALSE,
252b5132
RH
86 0xffffffff,
87 0xffffffff,
b34976b6 88 FALSE),
252b5132
RH
89 /* Standard 16 bit reloc. */
90 HOWTO (R_MN10200_16,
91 0,
92 1,
93 16,
b34976b6 94 FALSE,
252b5132
RH
95 0,
96 complain_overflow_bitfield,
97 bfd_elf_generic_reloc,
98 "R_MN10200_16",
b34976b6 99 FALSE,
252b5132
RH
100 0xffff,
101 0xffff,
b34976b6 102 FALSE),
252b5132
RH
103 /* Standard 8 bit reloc. */
104 HOWTO (R_MN10200_8,
105 0,
106 0,
107 8,
b34976b6 108 FALSE,
252b5132
RH
109 0,
110 complain_overflow_bitfield,
111 bfd_elf_generic_reloc,
112 "R_MN10200_8",
b34976b6 113 FALSE,
252b5132
RH
114 0xff,
115 0xff,
b34976b6 116 FALSE),
252b5132
RH
117 /* Standard 24 bit reloc. */
118 HOWTO (R_MN10200_24,
119 0,
120 2,
121 24,
b34976b6 122 FALSE,
252b5132
RH
123 0,
124 complain_overflow_bitfield,
125 bfd_elf_generic_reloc,
126 "R_MN10200_24",
b34976b6 127 FALSE,
252b5132
RH
128 0xffffff,
129 0xffffff,
b34976b6 130 FALSE),
252b5132
RH
131 /* Simple 8 pc-relative reloc. */
132 HOWTO (R_MN10200_PCREL8,
133 0,
134 0,
135 8,
b34976b6 136 TRUE,
252b5132
RH
137 0,
138 complain_overflow_bitfield,
139 bfd_elf_generic_reloc,
140 "R_MN10200_PCREL8",
b34976b6 141 FALSE,
252b5132
RH
142 0xff,
143 0xff,
b34976b6 144 TRUE),
252b5132
RH
145 /* Simple 16 pc-relative reloc. */
146 HOWTO (R_MN10200_PCREL16,
147 0,
148 1,
149 16,
b34976b6 150 TRUE,
252b5132
RH
151 0,
152 complain_overflow_bitfield,
153 bfd_elf_generic_reloc,
154 "R_MN10200_PCREL16",
b34976b6 155 FALSE,
252b5132
RH
156 0xffff,
157 0xffff,
b34976b6 158 TRUE),
252b5132
RH
159 /* Simple 32bit pc-relative reloc with a 1 byte adjustment
160 to get the pc-relative offset correct. */
161 HOWTO (R_MN10200_PCREL24,
162 0,
163 2,
164 24,
b34976b6 165 TRUE,
252b5132
RH
166 0,
167 complain_overflow_bitfield,
168 bfd_elf_generic_reloc,
169 "R_MN10200_PCREL24",
b34976b6 170 FALSE,
252b5132
RH
171 0xffffff,
172 0xffffff,
b34976b6 173 TRUE),
252b5132
RH
174};
175
27def10f 176struct mn10200_reloc_map {
252b5132
RH
177 bfd_reloc_code_real_type bfd_reloc_val;
178 unsigned char elf_reloc_val;
179};
180
27def10f
KH
181static const struct mn10200_reloc_map mn10200_reloc_map[] = {
182 { BFD_RELOC_NONE , R_MN10200_NONE , },
183 { BFD_RELOC_32 , R_MN10200_32 , },
184 { BFD_RELOC_16 , R_MN10200_16 , },
185 { BFD_RELOC_8 , R_MN10200_8 , },
186 { BFD_RELOC_24 , R_MN10200_24 , },
187 { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , },
252b5132
RH
188 { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, },
189 { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, },
190};
191
192static reloc_howto_type *
193bfd_elf32_bfd_reloc_type_lookup (abfd, code)
5f771d47 194 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
195 bfd_reloc_code_real_type code;
196{
197 unsigned int i;
198
199 for (i = 0;
200 i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map);
201 i++)
202 {
203 if (mn10200_reloc_map[i].bfd_reloc_val == code)
204 return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val];
205 }
206
207 return NULL;
208}
209
157090f7
AM
210static reloc_howto_type *
211bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
212 const char *r_name)
213{
214 unsigned int i;
215
216 for (i = 0;
217 i < (sizeof (elf_mn10200_howto_table)
218 / sizeof (elf_mn10200_howto_table[0]));
219 i++)
220 if (elf_mn10200_howto_table[i].name != NULL
221 && strcasecmp (elf_mn10200_howto_table[i].name, r_name) == 0)
222 return &elf_mn10200_howto_table[i];
223
224 return NULL;
225}
226
252b5132
RH
227/* Set the howto pointer for an MN10200 ELF reloc. */
228
229static void
230mn10200_info_to_howto (abfd, cache_ptr, dst)
5f771d47 231 bfd *abfd ATTRIBUTE_UNUSED;
252b5132 232 arelent *cache_ptr;
947216bf 233 Elf_Internal_Rela *dst;
252b5132
RH
234{
235 unsigned int r_type;
236
237 r_type = ELF32_R_TYPE (dst->r_info);
238 BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX);
239 cache_ptr->howto = &elf_mn10200_howto_table[r_type];
240}
241
242/* Perform a relocation as part of a final link. */
917583ad 243
252b5132
RH
244static bfd_reloc_status_type
245mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
246 input_section, contents, offset, value,
247 addend, info, sym_sec, is_local)
248 reloc_howto_type *howto;
249 bfd *input_bfd;
5f771d47 250 bfd *output_bfd ATTRIBUTE_UNUSED;
252b5132
RH
251 asection *input_section;
252 bfd_byte *contents;
253 bfd_vma offset;
254 bfd_vma value;
255 bfd_vma addend;
5f771d47
ILT
256 struct bfd_link_info *info ATTRIBUTE_UNUSED;
257 asection *sym_sec ATTRIBUTE_UNUSED;
258 int is_local ATTRIBUTE_UNUSED;
252b5132
RH
259{
260 unsigned long r_type = howto->type;
261 bfd_byte *hit_data = contents + offset;
262
263 switch (r_type)
264 {
265
266 case R_MN10200_NONE:
267 return bfd_reloc_ok;
268
269 case R_MN10200_32:
270 value += addend;
271 bfd_put_32 (input_bfd, value, hit_data);
272 return bfd_reloc_ok;
273
274 case R_MN10200_16:
275 value += addend;
276
27def10f 277 if ((long) value > 0x7fff || (long) value < -0x8000)
252b5132
RH
278 return bfd_reloc_overflow;
279
280 bfd_put_16 (input_bfd, value, hit_data);
281 return bfd_reloc_ok;
282
283 case R_MN10200_8:
284 value += addend;
285
27def10f 286 if ((long) value > 0x7f || (long) value < -0x80)
252b5132
RH
287 return bfd_reloc_overflow;
288
289 bfd_put_8 (input_bfd, value, hit_data);
290 return bfd_reloc_ok;
291
292 case R_MN10200_24:
293 value += addend;
294
27def10f 295 if ((long) value > 0x7fffff || (long) value < -0x800000)
252b5132
RH
296 return bfd_reloc_overflow;
297
298 value &= 0xffffff;
299 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
300 bfd_put_32 (input_bfd, value, hit_data);
301 return bfd_reloc_ok;
302
303 case R_MN10200_PCREL8:
304 value -= (input_section->output_section->vma
305 + input_section->output_offset);
306 value -= (offset + 1);
307 value += addend;
308
27def10f
KH
309 if ((long) value > 0xff || (long) value < -0x100)
310 return bfd_reloc_overflow;
252b5132
RH
311
312 bfd_put_8 (input_bfd, value, hit_data);
313 return bfd_reloc_ok;
314
315 case R_MN10200_PCREL16:
316 value -= (input_section->output_section->vma
317 + input_section->output_offset);
318 value -= (offset + 2);
319 value += addend;
320
27def10f
KH
321 if ((long) value > 0xffff || (long) value < -0x10000)
322 return bfd_reloc_overflow;
252b5132
RH
323
324 bfd_put_16 (input_bfd, value, hit_data);
325 return bfd_reloc_ok;
326
327 case R_MN10200_PCREL24:
328 value -= (input_section->output_section->vma
329 + input_section->output_offset);
330 value -= (offset + 3);
331 value += addend;
332
27def10f
KH
333 if ((long) value > 0xffffff || (long) value < -0x1000000)
334 return bfd_reloc_overflow;
252b5132
RH
335
336 value &= 0xffffff;
337 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
338 bfd_put_32 (input_bfd, value, hit_data);
339 return bfd_reloc_ok;
340
341 default:
342 return bfd_reloc_notsupported;
343 }
344}
252b5132
RH
345\f
346/* Relocate an MN10200 ELF section. */
b34976b6 347static bfd_boolean
252b5132
RH
348mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section,
349 contents, relocs, local_syms, local_sections)
350 bfd *output_bfd;
351 struct bfd_link_info *info;
352 bfd *input_bfd;
353 asection *input_section;
354 bfd_byte *contents;
355 Elf_Internal_Rela *relocs;
356 Elf_Internal_Sym *local_syms;
357 asection **local_sections;
358{
359 Elf_Internal_Shdr *symtab_hdr;
360 struct elf_link_hash_entry **sym_hashes;
361 Elf_Internal_Rela *rel, *relend;
362
363 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
364 sym_hashes = elf_sym_hashes (input_bfd);
365
366 rel = relocs;
367 relend = relocs + input_section->reloc_count;
368 for (; rel < relend; rel++)
369 {
370 int r_type;
371 reloc_howto_type *howto;
372 unsigned long r_symndx;
373 Elf_Internal_Sym *sym;
374 asection *sec;
375 struct elf_link_hash_entry *h;
376 bfd_vma relocation;
377 bfd_reloc_status_type r;
378
379 r_symndx = ELF32_R_SYM (rel->r_info);
380 r_type = ELF32_R_TYPE (rel->r_info);
381 howto = elf_mn10200_howto_table + r_type;
382
252b5132
RH
383 h = NULL;
384 sym = NULL;
385 sec = NULL;
386 if (r_symndx < symtab_hdr->sh_info)
387 {
388 sym = local_syms + r_symndx;
389 sec = local_sections[r_symndx];
8517fae7 390 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
391 }
392 else
393 {
59c2e50f
L
394 bfd_boolean unresolved_reloc, warned;
395
b2a8e766
AM
396 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
397 r_symndx, symtab_hdr, sym_hashes,
398 h, sec, relocation,
399 unresolved_reloc, warned);
252b5132
RH
400 }
401
ab96bf03
AM
402 if (sec != NULL && elf_discarded_section (sec))
403 {
404 /* For relocs against symbols from removed linkonce sections,
405 or sections discarded by a linker script, we just want the
406 section contents zeroed. Avoid any special processing. */
407 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
408 rel->r_info = 0;
409 rel->r_addend = 0;
410 continue;
411 }
412
413 if (info->relocatable)
414 continue;
415
252b5132
RH
416 r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
417 input_section,
418 contents, rel->r_offset,
419 relocation, rel->r_addend,
420 info, sec, h == NULL);
421
422 if (r != bfd_reloc_ok)
423 {
424 const char *name;
27def10f 425 const char *msg = (const char *) 0;
252b5132
RH
426
427 if (h != NULL)
428 name = h->root.root.string;
429 else
430 {
431 name = (bfd_elf_string_from_elf_section
432 (input_bfd, symtab_hdr->sh_link, sym->st_name));
433 if (name == NULL || *name == '\0')
434 name = bfd_section_name (input_bfd, sec);
435 }
436
437 switch (r)
438 {
439 case bfd_reloc_overflow:
440 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
441 (info, (h ? &h->root : NULL), name, howto->name,
442 (bfd_vma) 0, input_bfd, input_section,
443 rel->r_offset)))
b34976b6 444 return FALSE;
252b5132
RH
445 break;
446
447 case bfd_reloc_undefined:
448 if (! ((*info->callbacks->undefined_symbol)
449 (info, name, input_bfd, input_section,
b34976b6
AM
450 rel->r_offset, TRUE)))
451 return FALSE;
252b5132
RH
452 break;
453
454 case bfd_reloc_outofrange:
455 msg = _("internal error: out of range error");
456 goto common_error;
457
458 case bfd_reloc_notsupported:
459 msg = _("internal error: unsupported relocation error");
460 goto common_error;
461
462 case bfd_reloc_dangerous:
463 msg = _("internal error: dangerous error");
464 goto common_error;
465
466 default:
467 msg = _("internal error: unknown error");
468 /* fall through */
469
470 common_error:
471 if (!((*info->callbacks->warning)
472 (info, msg, name, input_bfd, input_section,
473 rel->r_offset)))
b34976b6 474 return FALSE;
252b5132
RH
475 break;
476 }
477 }
478 }
479
b34976b6 480 return TRUE;
252b5132
RH
481}
482
483/* This function handles relaxing for the mn10200.
484
4cc11e76 485 There are quite a few relaxing opportunities available on the mn10200:
252b5132
RH
486
487 * jsr:24 -> jsr:16 2 bytes
488
489 * jmp:24 -> jmp:16 2 bytes
490 * jmp:16 -> bra:8 1 byte
491
492 * If the previous instruction is a conditional branch
493 around the jump/bra, we may be able to reverse its condition
494 and change its target to the jump's target. The jump/bra
495 can then be deleted. 2 bytes
496
497 * mov abs24 -> mov abs16 2 byte savings
498
499 * Most instructions which accept imm24 can relax to imm16 2 bytes
500 - Most instructions which accept imm16 can relax to imm8 1 byte
501
502 * Most instructions which accept d24 can relax to d16 2 bytes
503 - Most instructions which accept d16 can relax to d8 1 byte
504
505 abs24, imm24, d24 all look the same at the reloc level. It
506 might make the code simpler if we had different relocs for
507 the various relaxable operand types.
a7c10850 508
252b5132
RH
509 We don't handle imm16->imm8 or d16->d8 as they're very rare
510 and somewhat more difficult to support. */
511
b34976b6 512static bfd_boolean
252b5132
RH
513mn10200_elf_relax_section (abfd, sec, link_info, again)
514 bfd *abfd;
515 asection *sec;
516 struct bfd_link_info *link_info;
b34976b6 517 bfd_boolean *again;
252b5132
RH
518{
519 Elf_Internal_Shdr *symtab_hdr;
520 Elf_Internal_Rela *internal_relocs;
252b5132
RH
521 Elf_Internal_Rela *irel, *irelend;
522 bfd_byte *contents = NULL;
6cdc0ccc 523 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
524
525 /* Assume nothing changes. */
b34976b6 526 *again = FALSE;
252b5132 527
1049f94e 528 /* We don't have to do anything for a relocatable link, if
252b5132
RH
529 this section does not have relocs, or if this is not a
530 code section. */
1049f94e 531 if (link_info->relocatable
252b5132
RH
532 || (sec->flags & SEC_RELOC) == 0
533 || sec->reloc_count == 0
534 || (sec->flags & SEC_CODE) == 0)
b34976b6 535 return TRUE;
252b5132 536
252b5132
RH
537 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
538
539 /* Get a copy of the native relocations. */
45d6a902 540 internal_relocs = (_bfd_elf_link_read_relocs
252b5132
RH
541 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
542 link_info->keep_memory));
543 if (internal_relocs == NULL)
544 goto error_return;
252b5132
RH
545
546 /* Walk through them looking for relaxing opportunities. */
547 irelend = internal_relocs + sec->reloc_count;
548 for (irel = internal_relocs; irel < irelend; irel++)
549 {
550 bfd_vma symval;
551
552 /* If this isn't something that can be relaxed, then ignore
553 this reloc. */
554 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE
555 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8
556 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX)
557 continue;
558
559 /* Get the section contents if we haven't done so already. */
560 if (contents == NULL)
561 {
562 /* Get cached copy if it exists. */
563 if (elf_section_data (sec)->this_hdr.contents != NULL)
564 contents = elf_section_data (sec)->this_hdr.contents;
565 else
566 {
567 /* Go get them off disk. */
eea6121a 568 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH
569 goto error_return;
570 }
571 }
572
6cdc0ccc
AM
573 /* Read this BFD's local symbols if we haven't done so already. */
574 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
252b5132 575 {
6cdc0ccc
AM
576 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
577 if (isymbuf == NULL)
578 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
579 symtab_hdr->sh_info, 0,
580 NULL, NULL, NULL);
581 if (isymbuf == NULL)
582 goto error_return;
252b5132
RH
583 }
584
585 /* Get the value of the symbol referred to by the reloc. */
586 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
587 {
9ad5cbcf 588 /* A local symbol. */
6cdc0ccc 589 Elf_Internal_Sym *isym;
252b5132
RH
590 asection *sym_sec;
591
6cdc0ccc
AM
592 isym = isymbuf + ELF32_R_SYM (irel->r_info);
593 if (isym->st_shndx == SHN_UNDEF)
9ad5cbcf 594 sym_sec = bfd_und_section_ptr;
6cdc0ccc 595 else if (isym->st_shndx == SHN_ABS)
9ad5cbcf 596 sym_sec = bfd_abs_section_ptr;
6cdc0ccc 597 else if (isym->st_shndx == SHN_COMMON)
9ad5cbcf
AM
598 sym_sec = bfd_com_section_ptr;
599 else
6cdc0ccc
AM
600 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
601 symval = (isym->st_value
252b5132
RH
602 + sym_sec->output_section->vma
603 + sym_sec->output_offset);
604 }
605 else
606 {
607 unsigned long indx;
608 struct elf_link_hash_entry *h;
609
610 /* An external symbol. */
611 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
612 h = elf_sym_hashes (abfd)[indx];
613 BFD_ASSERT (h != NULL);
614 if (h->root.type != bfd_link_hash_defined
615 && h->root.type != bfd_link_hash_defweak)
616 {
617 /* This appears to be a reference to an undefined
618 symbol. Just ignore it--it will be caught by the
619 regular reloc processing. */
620 continue;
621 }
622
623 symval = (h->root.u.def.value
624 + h->root.u.def.section->output_section->vma
625 + h->root.u.def.section->output_offset);
626 }
627
628 /* For simplicity of coding, we are going to modify the section
629 contents, the section relocs, and the BFD symbol table. We
630 must tell the rest of the code not to free up this
631 information. It would be possible to instead create a table
632 of changes which have to be made, as is done in coff-mips.c;
633 that would be more work, but would require less memory when
634 the linker is run. */
635
252b5132
RH
636 /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative
637 branch/call. */
638 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24)
639 {
640 bfd_vma value = symval;
641
642 /* Deal with pc-relative gunk. */
643 value -= (sec->output_section->vma + sec->output_offset);
644 value -= (irel->r_offset + 3);
645 value += irel->r_addend;
646
647 /* See if the value will fit in 16 bits, note the high value is
648 0x7fff + 2 as the target will be two bytes closer if we are
649 able to relax. */
27def10f 650 if ((long) value < 0x8001 && (long) value > -0x8000)
252b5132
RH
651 {
652 unsigned char code;
653
654 /* Get the opcode. */
655 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
656
657 if (code != 0xe0 && code != 0xe1)
658 continue;
659
660 /* Note that we've changed the relocs, section contents, etc. */
661 elf_section_data (sec)->relocs = internal_relocs;
252b5132 662 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 663 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
664
665 /* Fix the opcode. */
666 if (code == 0xe0)
667 bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2);
668 else if (code == 0xe1)
669 bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2);
670
671 /* Fix the relocation's type. */
672 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
673 R_MN10200_PCREL16);
674
675 /* The opcode got shorter too, so we have to fix the offset. */
676 irel->r_offset -= 1;
677
678 /* Delete two bytes of data. */
679 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
680 irel->r_offset + 1, 2))
681 goto error_return;
682
683 /* That will change things, so, we should relax again.
684 Note that this is not required, and it may be slow. */
b34976b6 685 *again = TRUE;
252b5132
RH
686 }
687 }
688
689 /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative
690 branch. */
691 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16)
692 {
693 bfd_vma value = symval;
694
695 /* Deal with pc-relative gunk. */
696 value -= (sec->output_section->vma + sec->output_offset);
697 value -= (irel->r_offset + 2);
698 value += irel->r_addend;
699
700 /* See if the value will fit in 8 bits, note the high value is
701 0x7f + 1 as the target will be one bytes closer if we are
702 able to relax. */
27def10f 703 if ((long) value < 0x80 && (long) value > -0x80)
252b5132
RH
704 {
705 unsigned char code;
706
707 /* Get the opcode. */
708 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
709
710 if (code != 0xfc)
711 continue;
712
713 /* Note that we've changed the relocs, section contents, etc. */
714 elf_section_data (sec)->relocs = internal_relocs;
252b5132 715 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 716 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
717
718 /* Fix the opcode. */
719 bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1);
720
721 /* Fix the relocation's type. */
722 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
723 R_MN10200_PCREL8);
724
725 /* Delete one byte of data. */
726 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
727 irel->r_offset + 1, 1))
728 goto error_return;
729
730 /* That will change things, so, we should relax again.
731 Note that this is not required, and it may be slow. */
b34976b6 732 *again = TRUE;
252b5132
RH
733 }
734 }
735
736 /* Try to eliminate an unconditional 8 bit pc-relative branch
737 which immediately follows a conditional 8 bit pc-relative
738 branch around the unconditional branch.
739
740 original: new:
741 bCC lab1 bCC' lab2
742 bra lab2
743 lab1: lab1:
744
252b5132
RH
745 This happens when the bCC can't reach lab2 at assembly time,
746 but due to other relaxations it can reach at link time. */
747 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8)
748 {
749 Elf_Internal_Rela *nrel;
750 bfd_vma value = symval;
751 unsigned char code;
752
753 /* Deal with pc-relative gunk. */
754 value -= (sec->output_section->vma + sec->output_offset);
755 value -= (irel->r_offset + 1);
756 value += irel->r_addend;
757
758 /* Do nothing if this reloc is the last byte in the section. */
eea6121a 759 if (irel->r_offset == sec->size)
252b5132
RH
760 continue;
761
762 /* See if the next instruction is an unconditional pc-relative
763 branch, more often than not this test will fail, so we
764 test it first to speed things up. */
765 code = bfd_get_8 (abfd, contents + irel->r_offset + 1);
766 if (code != 0xea)
767 continue;
768
769 /* Also make sure the next relocation applies to the next
770 instruction and that it's a pc-relative 8 bit branch. */
771 nrel = irel + 1;
772 if (nrel == irelend
773 || irel->r_offset + 2 != nrel->r_offset
774 || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8)
775 continue;
776
777 /* Make sure our destination immediately follows the
778 unconditional branch. */
779 if (symval != (sec->output_section->vma + sec->output_offset
780 + irel->r_offset + 3))
781 continue;
782
783 /* Now make sure we are a conditional branch. This may not
a7c10850 784 be necessary, but why take the chance.
252b5132
RH
785
786 Note these checks assume that R_MN10200_PCREL8 relocs
787 only occur on bCC and bCCx insns. If they occured
788 elsewhere, we'd need to know the start of this insn
789 for this check to be accurate. */
790 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
791 if (code != 0xe0 && code != 0xe1 && code != 0xe2
792 && code != 0xe3 && code != 0xe4 && code != 0xe5
793 && code != 0xe6 && code != 0xe7 && code != 0xe8
794 && code != 0xe9 && code != 0xec && code != 0xed
795 && code != 0xee && code != 0xef && code != 0xfc
796 && code != 0xfd && code != 0xfe && code != 0xff)
797 continue;
798
799 /* We also have to be sure there is no symbol/label
800 at the unconditional branch. */
6cdc0ccc
AM
801 if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf,
802 irel->r_offset + 1))
252b5132
RH
803 continue;
804
805 /* Note that we've changed the relocs, section contents, etc. */
806 elf_section_data (sec)->relocs = internal_relocs;
252b5132 807 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 808 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
809
810 /* Reverse the condition of the first branch. */
811 switch (code)
812 {
27def10f
KH
813 case 0xfc:
814 code = 0xfd;
815 break;
816 case 0xfd:
817 code = 0xfc;
818 break;
819 case 0xfe:
820 code = 0xff;
821 break;
822 case 0xff:
823 code = 0xfe;
824 break;
825 case 0xe8:
826 code = 0xe9;
827 break;
828 case 0xe9:
829 code = 0xe8;
830 break;
831 case 0xe0:
832 code = 0xe2;
833 break;
834 case 0xe2:
835 code = 0xe0;
836 break;
837 case 0xe3:
838 code = 0xe1;
839 break;
840 case 0xe1:
841 code = 0xe3;
842 break;
843 case 0xe4:
844 code = 0xe6;
845 break;
846 case 0xe6:
847 code = 0xe4;
848 break;
849 case 0xe7:
850 code = 0xe5;
851 break;
852 case 0xe5:
853 code = 0xe7;
854 break;
855 case 0xec:
856 code = 0xed;
857 break;
858 case 0xed:
859 code = 0xec;
860 break;
861 case 0xee:
862 code = 0xef;
863 break;
864 case 0xef:
865 code = 0xee;
866 break;
252b5132
RH
867 }
868 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
a7c10850 869
252b5132
RH
870 /* Set the reloc type and symbol for the first branch
871 from the second branch. */
872 irel->r_info = nrel->r_info;
873
874 /* Make the reloc for the second branch a null reloc. */
875 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
876 R_MN10200_NONE);
877
878 /* Delete two bytes of data. */
879 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
880 irel->r_offset + 1, 2))
881 goto error_return;
882
883 /* That will change things, so, we should relax again.
884 Note that this is not required, and it may be slow. */
b34976b6 885 *again = TRUE;
252b5132
RH
886 }
887
888 /* Try to turn a 24bit immediate, displacement or absolute address
889 into a 16bit immediate, displacement or absolute address. */
890 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24)
891 {
892 bfd_vma value = symval;
893
a7c10850 894 /* See if the value will fit in 16 bits.
252b5132
RH
895 We allow any 16bit match here. We prune those we can't
896 handle below. */
27def10f 897 if ((long) value < 0x7fff && (long) value > -0x8000)
252b5132
RH
898 {
899 unsigned char code;
900
901 /* All insns which have 24bit operands are 5 bytes long,
902 the first byte will always be 0xf4, but we double check
903 it just in case. */
904
905 /* Get the first opcode. */
906 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
907
908 if (code != 0xf4)
909 continue;
910
911 /* Get the second opcode. */
912 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
913
914 switch (code & 0xfc)
915 {
916 /* mov imm24,dn -> mov imm16,dn */
917 case 0x70:
918 /* Not safe if the high bit is on as relaxing may
919 move the value out of high mem and thus not fit
920 in a signed 16bit value. */
921 if (value & 0x8000)
922 continue;
923
4cc11e76 924 /* Note that we've changed the relocation contents, etc. */
252b5132 925 elf_section_data (sec)->relocs = internal_relocs;
252b5132 926 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 927 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
928
929 /* Fix the opcode. */
930 bfd_put_8 (abfd, 0xf8 + (code & 0x03),
931 contents + irel->r_offset - 2);
932
933 /* Fix the relocation's type. */
934 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
935 R_MN10200_16);
936
937 /* The opcode got shorter too, so we have to fix the
938 offset. */
939 irel->r_offset -= 1;
940
941 /* Delete two bytes of data. */
942 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
943 irel->r_offset + 1, 2))
944 goto error_return;
945
946 /* That will change things, so, we should relax again.
947 Note that this is not required, and it may be slow. */
b34976b6 948 *again = TRUE;
252b5132
RH
949 break;
950
a7c10850 951 /* mov imm24,an -> mov imm16,an
252b5132
RH
952 cmp imm24,an -> cmp imm16,an
953 mov (abs24),dn -> mov (abs16),dn
954 mov dn,(abs24) -> mov dn,(abs16)
955 movb dn,(abs24) -> movb dn,(abs16)
956 movbu (abs24),dn -> movbu (abs16),dn */
957 case 0x74:
958 case 0x7c:
959 case 0xc0:
960 case 0x40:
961 case 0x44:
962 case 0xc8:
4cc11e76 963 /* Note that we've changed the relocation contents, etc. */
252b5132 964 elf_section_data (sec)->relocs = internal_relocs;
252b5132 965 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 966 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
967
968 if ((code & 0xfc) == 0x74)
969 code = 0xdc + (code & 0x03);
970 else if ((code & 0xfc) == 0x7c)
971 code = 0xec + (code & 0x03);
972 else if ((code & 0xfc) == 0xc0)
973 code = 0xc8 + (code & 0x03);
974 else if ((code & 0xfc) == 0x40)
975 code = 0xc0 + (code & 0x03);
976 else if ((code & 0xfc) == 0x44)
977 code = 0xc4 + (code & 0x03);
978 else if ((code & 0xfc) == 0xc8)
979 code = 0xcc + (code & 0x03);
980
981 /* Fix the opcode. */
982 bfd_put_8 (abfd, code, contents + irel->r_offset - 2);
983
984 /* Fix the relocation's type. */
985 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
986 R_MN10200_16);
987
988 /* The opcode got shorter too, so we have to fix the
989 offset. */
990 irel->r_offset -= 1;
991
992 /* Delete two bytes of data. */
993 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
994 irel->r_offset + 1, 2))
995 goto error_return;
996
997 /* That will change things, so, we should relax again.
998 Note that this is not required, and it may be slow. */
b34976b6 999 *again = TRUE;
252b5132
RH
1000 break;
1001
1002 /* cmp imm24,dn -> cmp imm16,dn
1003 mov (abs24),an -> mov (abs16),an
1004 mov an,(abs24) -> mov an,(abs16)
1005 add imm24,dn -> add imm16,dn
1006 add imm24,an -> add imm16,an
1007 sub imm24,dn -> sub imm16,dn
a7c10850 1008 sub imm24,an -> sub imm16,an
252b5132
RH
1009 And all d24->d16 in memory ops. */
1010 case 0x78:
1011 case 0xd0:
1012 case 0x50:
1013 case 0x60:
1014 case 0x64:
1015 case 0x68:
1016 case 0x6c:
1017 case 0x80:
1018 case 0xf0:
1019 case 0x00:
1020 case 0x10:
1021 case 0xb0:
1022 case 0x30:
1023 case 0xa0:
1024 case 0x20:
1025 case 0x90:
1026 /* Not safe if the high bit is on as relaxing may
1027 move the value out of high mem and thus not fit
1028 in a signed 16bit value. */
1029 if (((code & 0xfc) == 0x78
27def10f
KH
1030 || (code & 0xfc) == 0x60
1031 || (code & 0xfc) == 0x64
1032 || (code & 0xfc) == 0x68
1033 || (code & 0xfc) == 0x6c
1034 || (code & 0xfc) == 0x80
1035 || (code & 0xfc) == 0xf0
1036 || (code & 0xfc) == 0x00
1037 || (code & 0xfc) == 0x10
1038 || (code & 0xfc) == 0xb0
1039 || (code & 0xfc) == 0x30
1040 || (code & 0xfc) == 0xa0
1041 || (code & 0xfc) == 0x20
1042 || (code & 0xfc) == 0x90)
1043 && (value & 0x8000) != 0)
252b5132
RH
1044 continue;
1045
4cc11e76 1046 /* Note that we've changed the relocation contents, etc. */
252b5132 1047 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1048 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1049 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1050
1051 /* Fix the opcode. */
1052 bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2);
1053
1054 if ((code & 0xfc) == 0x78)
1055 code = 0x48 + (code & 0x03);
1056 else if ((code & 0xfc) == 0xd0)
1057 code = 0x30 + (code & 0x03);
1058 else if ((code & 0xfc) == 0x50)
1059 code = 0x20 + (code & 0x03);
1060 else if ((code & 0xfc) == 0x60)
1061 code = 0x18 + (code & 0x03);
1062 else if ((code & 0xfc) == 0x64)
1063 code = 0x08 + (code & 0x03);
1064 else if ((code & 0xfc) == 0x68)
1065 code = 0x1c + (code & 0x03);
1066 else if ((code & 0xfc) == 0x6c)
1067 code = 0x0c + (code & 0x03);
1068 else if ((code & 0xfc) == 0x80)
1069 code = 0xc0 + (code & 0x07);
1070 else if ((code & 0xfc) == 0xf0)
1071 code = 0xb0 + (code & 0x07);
1072 else if ((code & 0xfc) == 0x00)
1073 code = 0x80 + (code & 0x07);
1074 else if ((code & 0xfc) == 0x10)
1075 code = 0xa0 + (code & 0x07);
1076 else if ((code & 0xfc) == 0xb0)
1077 code = 0x70 + (code & 0x07);
1078 else if ((code & 0xfc) == 0x30)
1079 code = 0x60 + (code & 0x07);
1080 else if ((code & 0xfc) == 0xa0)
1081 code = 0xd0 + (code & 0x07);
1082 else if ((code & 0xfc) == 0x20)
1083 code = 0x90 + (code & 0x07);
1084 else if ((code & 0xfc) == 0x90)
1085 code = 0x50 + (code & 0x07);
1086
1087 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
1088
1089 /* Fix the relocation's type. */
1090 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1091 R_MN10200_16);
1092
1093 /* Delete one bytes of data. */
1094 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1095 irel->r_offset + 2, 1))
1096 goto error_return;
1097
1098 /* That will change things, so, we should relax again.
1099 Note that this is not required, and it may be slow. */
b34976b6 1100 *again = TRUE;
252b5132
RH
1101 break;
1102
1103 /* movb (abs24),dn ->movbu (abs16),dn extxb bn */
1104 case 0xc4:
1105 /* Note that we've changed the reldection contents, etc. */
1106 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1107 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1108 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1109
1110 bfd_put_8 (abfd, 0xcc + (code & 0x03),
1111 contents + irel->r_offset - 2);
1112
1113 bfd_put_8 (abfd, 0xb8 + (code & 0x03),
1114 contents + irel->r_offset - 1);
1115
1116 /* Fix the relocation's type. */
1117 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1118 R_MN10200_16);
1119
1120 /* The reloc will be applied one byte in front of its
1121 current location. */
1122 irel->r_offset -= 1;
1123
1124 /* Delete one bytes of data. */
1125 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1126 irel->r_offset + 2, 1))
1127 goto error_return;
1128
1129 /* That will change things, so, we should relax again.
1130 Note that this is not required, and it may be slow. */
b34976b6 1131 *again = TRUE;
252b5132
RH
1132 break;
1133 }
1134 }
1135 }
1136 }
1137
6cdc0ccc
AM
1138 if (isymbuf != NULL
1139 && symtab_hdr->contents != (unsigned char *) isymbuf)
252b5132
RH
1140 {
1141 if (! link_info->keep_memory)
6cdc0ccc 1142 free (isymbuf);
252b5132
RH
1143 else
1144 {
6cdc0ccc
AM
1145 /* Cache the symbols for elf_link_input_bfd. */
1146 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132 1147 }
9ad5cbcf
AM
1148 }
1149
6cdc0ccc
AM
1150 if (contents != NULL
1151 && elf_section_data (sec)->this_hdr.contents != contents)
252b5132
RH
1152 {
1153 if (! link_info->keep_memory)
6cdc0ccc
AM
1154 free (contents);
1155 else
252b5132 1156 {
6cdc0ccc
AM
1157 /* Cache the section contents for elf_link_input_bfd. */
1158 elf_section_data (sec)->this_hdr.contents = contents;
252b5132 1159 }
252b5132
RH
1160 }
1161
6cdc0ccc
AM
1162 if (internal_relocs != NULL
1163 && elf_section_data (sec)->relocs != internal_relocs)
1164 free (internal_relocs);
1165
b34976b6 1166 return TRUE;
252b5132
RH
1167
1168 error_return:
6cdc0ccc
AM
1169 if (isymbuf != NULL
1170 && symtab_hdr->contents != (unsigned char *) isymbuf)
1171 free (isymbuf);
1172 if (contents != NULL
1173 && elf_section_data (sec)->this_hdr.contents != contents)
1174 free (contents);
1175 if (internal_relocs != NULL
1176 && elf_section_data (sec)->relocs != internal_relocs)
1177 free (internal_relocs);
9ad5cbcf 1178
b34976b6 1179 return FALSE;
252b5132
RH
1180}
1181
1182/* Delete some bytes from a section while relaxing. */
1183
b34976b6 1184static bfd_boolean
252b5132
RH
1185mn10200_elf_relax_delete_bytes (abfd, sec, addr, count)
1186 bfd *abfd;
1187 asection *sec;
1188 bfd_vma addr;
1189 int count;
1190{
1191 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1192 unsigned int sec_shndx;
252b5132
RH
1193 bfd_byte *contents;
1194 Elf_Internal_Rela *irel, *irelend;
1195 Elf_Internal_Rela *irelalign;
1196 bfd_vma toaddr;
6cdc0ccc
AM
1197 Elf_Internal_Sym *isym;
1198 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1199 struct elf_link_hash_entry **sym_hashes;
1200 struct elf_link_hash_entry **end_hashes;
1201 unsigned int symcount;
252b5132 1202
9ad5cbcf 1203 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132
RH
1204
1205 contents = elf_section_data (sec)->this_hdr.contents;
1206
1207 /* The deletion must stop at the next ALIGN reloc for an aligment
1208 power larger than the number of bytes we are deleting. */
1209
1210 irelalign = NULL;
eea6121a 1211 toaddr = sec->size;
252b5132
RH
1212
1213 irel = elf_section_data (sec)->relocs;
1214 irelend = irel + sec->reloc_count;
1215
1216 /* Actually delete the bytes. */
dc810e39
AM
1217 memmove (contents + addr, contents + addr + count,
1218 (size_t) (toaddr - addr - count));
eea6121a 1219 sec->size -= count;
252b5132
RH
1220
1221 /* Adjust all the relocs. */
1222 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1223 {
1224 /* Get the new reloc address. */
1225 if ((irel->r_offset > addr
1226 && irel->r_offset < toaddr))
1227 irel->r_offset -= count;
1228 }
1229
1230 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1231 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1232 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1233 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1234 {
6cdc0ccc
AM
1235 if (isym->st_shndx == sec_shndx
1236 && isym->st_value > addr
1237 && isym->st_value < toaddr)
1238 isym->st_value -= count;
252b5132
RH
1239 }
1240
1241 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1242 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1243 - symtab_hdr->sh_info);
1244 sym_hashes = elf_sym_hashes (abfd);
1245 end_hashes = sym_hashes + symcount;
1246 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1247 {
9ad5cbcf
AM
1248 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1249 if ((sym_hash->root.type == bfd_link_hash_defined
1250 || sym_hash->root.type == bfd_link_hash_defweak)
1251 && sym_hash->root.u.def.section == sec
1252 && sym_hash->root.u.def.value > addr
1253 && sym_hash->root.u.def.value < toaddr)
252b5132 1254 {
9ad5cbcf 1255 sym_hash->root.u.def.value -= count;
252b5132
RH
1256 }
1257 }
1258
b34976b6 1259 return TRUE;
252b5132
RH
1260}
1261
b34976b6
AM
1262/* Return TRUE if a symbol exists at the given address, else return
1263 FALSE. */
1264static bfd_boolean
6cdc0ccc 1265mn10200_elf_symbol_address_p (abfd, sec, isym, addr)
252b5132
RH
1266 bfd *abfd;
1267 asection *sec;
6cdc0ccc 1268 Elf_Internal_Sym *isym;
252b5132
RH
1269 bfd_vma addr;
1270{
1271 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1272 unsigned int sec_shndx;
6cdc0ccc 1273 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1274 struct elf_link_hash_entry **sym_hashes;
1275 struct elf_link_hash_entry **end_hashes;
1276 unsigned int symcount;
252b5132 1277
9ad5cbcf 1278 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132 1279
6cdc0ccc 1280 /* Examine all the local symbols. */
9ad5cbcf 1281 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc 1282 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1283 {
6cdc0ccc
AM
1284 if (isym->st_shndx == sec_shndx
1285 && isym->st_value == addr)
b34976b6 1286 return TRUE;
252b5132
RH
1287 }
1288
9ad5cbcf
AM
1289 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1290 - symtab_hdr->sh_info);
1291 sym_hashes = elf_sym_hashes (abfd);
1292 end_hashes = sym_hashes + symcount;
1293 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1294 {
9ad5cbcf
AM
1295 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1296 if ((sym_hash->root.type == bfd_link_hash_defined
1297 || sym_hash->root.type == bfd_link_hash_defweak)
1298 && sym_hash->root.u.def.section == sec
1299 && sym_hash->root.u.def.value == addr)
b34976b6 1300 return TRUE;
252b5132 1301 }
9ad5cbcf 1302
b34976b6 1303 return FALSE;
252b5132
RH
1304}
1305
1306/* This is a version of bfd_generic_get_relocated_section_contents
1307 which uses mn10200_elf_relocate_section. */
1308
1309static bfd_byte *
1310mn10200_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1049f94e 1311 data, relocatable, symbols)
252b5132
RH
1312 bfd *output_bfd;
1313 struct bfd_link_info *link_info;
1314 struct bfd_link_order *link_order;
1315 bfd_byte *data;
1049f94e 1316 bfd_boolean relocatable;
252b5132
RH
1317 asymbol **symbols;
1318{
1319 Elf_Internal_Shdr *symtab_hdr;
1320 asection *input_section = link_order->u.indirect.section;
1321 bfd *input_bfd = input_section->owner;
1322 asection **sections = NULL;
1323 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1324 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
1325
1326 /* We only need to handle the case of relaxing, or of having a
1327 particular set of section contents, specially. */
1049f94e 1328 if (relocatable
252b5132
RH
1329 || elf_section_data (input_section)->this_hdr.contents == NULL)
1330 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1331 link_order, data,
1049f94e 1332 relocatable,
252b5132
RH
1333 symbols);
1334
1335 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1336
1337 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1338 (size_t) input_section->size);
252b5132
RH
1339
1340 if ((input_section->flags & SEC_RELOC) != 0
1341 && input_section->reloc_count > 0)
1342 {
6cdc0ccc
AM
1343 Elf_Internal_Sym *isym;
1344 Elf_Internal_Sym *isymend;
252b5132 1345 asection **secpp;
9ad5cbcf 1346 bfd_size_type amt;
252b5132 1347
45d6a902 1348 internal_relocs = (_bfd_elf_link_read_relocs
252b5132 1349 (input_bfd, input_section, (PTR) NULL,
b34976b6 1350 (Elf_Internal_Rela *) NULL, FALSE));
252b5132
RH
1351 if (internal_relocs == NULL)
1352 goto error_return;
1353
6cdc0ccc
AM
1354 if (symtab_hdr->sh_info != 0)
1355 {
1356 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1357 if (isymbuf == NULL)
1358 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1359 symtab_hdr->sh_info, 0,
1360 NULL, NULL, NULL);
1361 if (isymbuf == NULL)
1362 goto error_return;
1363 }
252b5132 1364
9ad5cbcf
AM
1365 amt = symtab_hdr->sh_info;
1366 amt *= sizeof (asection *);
1367 sections = (asection **) bfd_malloc (amt);
1368 if (sections == NULL && amt != 0)
252b5132
RH
1369 goto error_return;
1370
6cdc0ccc
AM
1371 isymend = isymbuf + symtab_hdr->sh_info;
1372 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
252b5132
RH
1373 {
1374 asection *isec;
1375
6cdc0ccc 1376 if (isym->st_shndx == SHN_UNDEF)
252b5132 1377 isec = bfd_und_section_ptr;
6cdc0ccc 1378 else if (isym->st_shndx == SHN_ABS)
252b5132 1379 isec = bfd_abs_section_ptr;
6cdc0ccc 1380 else if (isym->st_shndx == SHN_COMMON)
252b5132
RH
1381 isec = bfd_com_section_ptr;
1382 else
6cdc0ccc 1383 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
252b5132
RH
1384
1385 *secpp = isec;
1386 }
1387
1388 if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd,
1389 input_section, data, internal_relocs,
6cdc0ccc 1390 isymbuf, sections))
252b5132
RH
1391 goto error_return;
1392
1393 if (sections != NULL)
1394 free (sections);
6cdc0ccc
AM
1395 if (isymbuf != NULL
1396 && symtab_hdr->contents != (unsigned char *) isymbuf)
1397 free (isymbuf);
1398 if (elf_section_data (input_section)->relocs != internal_relocs)
252b5132 1399 free (internal_relocs);
252b5132
RH
1400 }
1401
1402 return data;
1403
1404 error_return:
252b5132
RH
1405 if (sections != NULL)
1406 free (sections);
6cdc0ccc
AM
1407 if (isymbuf != NULL
1408 && symtab_hdr->contents != (unsigned char *) isymbuf)
1409 free (isymbuf);
1410 if (internal_relocs != NULL
1411 && elf_section_data (input_section)->relocs != internal_relocs)
1412 free (internal_relocs);
252b5132
RH
1413 return NULL;
1414}
1415
252b5132
RH
1416#define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec
1417#define TARGET_LITTLE_NAME "elf32-mn10200"
1418#define ELF_ARCH bfd_arch_mn10200
aa4f99bb
AO
1419#define ELF_MACHINE_CODE EM_MN10200
1420#define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200
252b5132
RH
1421#define ELF_MAXPAGESIZE 0x1000
1422
b491616a 1423#define elf_backend_rela_normal 1
252b5132
RH
1424#define elf_info_to_howto mn10200_info_to_howto
1425#define elf_info_to_howto_rel 0
1426#define elf_backend_relocate_section mn10200_elf_relocate_section
1427#define bfd_elf32_bfd_relax_section mn10200_elf_relax_section
1428#define bfd_elf32_bfd_get_relocated_section_contents \
1429 mn10200_elf_get_relocated_section_contents
1430
1431#define elf_symbol_leading_char '_'
1432
1433#include "elf32-target.h"
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