fix set but unused variable warnings
[deliverable/binutils-gdb.git] / bfd / elf-m10200.c
CommitLineData
252b5132 1/* Matsushita 10200 specific support for 32-bit ELF
c7e2358a
AM
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2007, 2010
7898deda 4 Free Software Foundation, Inc.
252b5132 5
cd123cb7 6 This file is part of BFD, the Binary File Descriptor library.
252b5132 7
cd123cb7
NC
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
252b5132 12
cd123cb7
NC
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
252b5132 17
cd123cb7
NC
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
252b5132 22
252b5132 23#include "sysdep.h"
3db64b00 24#include "bfd.h"
252b5132
RH
25#include "libbfd.h"
26#include "elf-bfd.h"
27
28static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
29 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
30static void mn10200_info_to_howto
947216bf 31 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
b34976b6 32static bfd_boolean mn10200_elf_relax_delete_bytes
252b5132 33 PARAMS ((bfd *, asection *, bfd_vma, int));
b34976b6 34static bfd_boolean mn10200_elf_symbol_address_p
6cdc0ccc 35 PARAMS ((bfd *, asection *, Elf_Internal_Sym *, bfd_vma));
917583ad
NC
36static bfd_reloc_status_type mn10200_elf_final_link_relocate
37 PARAMS ((reloc_howto_type *, bfd *, bfd *, asection *,
38 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
39 struct bfd_link_info *, asection *, int));
b34976b6
AM
40static bfd_boolean mn10200_elf_relocate_section
41 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *,
42 bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Sym *,
43 asection **));
44static bfd_boolean mn10200_elf_relax_section
45 PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *));
917583ad
NC
46static bfd_byte * mn10200_elf_get_relocated_section_contents
47 PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *,
b34976b6 48 bfd_byte *, bfd_boolean, asymbol **));
252b5132 49
27def10f 50enum reloc_type {
252b5132
RH
51 R_MN10200_NONE = 0,
52 R_MN10200_32,
53 R_MN10200_16,
54 R_MN10200_8,
55 R_MN10200_24,
56 R_MN10200_PCREL8,
57 R_MN10200_PCREL16,
58 R_MN10200_PCREL24,
59 R_MN10200_MAX
60};
61
27def10f 62static reloc_howto_type elf_mn10200_howto_table[] = {
252b5132
RH
63 /* Dummy relocation. Does nothing. */
64 HOWTO (R_MN10200_NONE,
65 0,
66 2,
67 16,
b34976b6 68 FALSE,
252b5132
RH
69 0,
70 complain_overflow_bitfield,
71 bfd_elf_generic_reloc,
72 "R_MN10200_NONE",
b34976b6 73 FALSE,
252b5132
RH
74 0,
75 0,
b34976b6 76 FALSE),
252b5132
RH
77 /* Standard 32 bit reloc. */
78 HOWTO (R_MN10200_32,
79 0,
80 2,
81 32,
b34976b6 82 FALSE,
252b5132
RH
83 0,
84 complain_overflow_bitfield,
85 bfd_elf_generic_reloc,
86 "R_MN10200_32",
b34976b6 87 FALSE,
252b5132
RH
88 0xffffffff,
89 0xffffffff,
b34976b6 90 FALSE),
252b5132
RH
91 /* Standard 16 bit reloc. */
92 HOWTO (R_MN10200_16,
93 0,
94 1,
95 16,
b34976b6 96 FALSE,
252b5132
RH
97 0,
98 complain_overflow_bitfield,
99 bfd_elf_generic_reloc,
100 "R_MN10200_16",
b34976b6 101 FALSE,
252b5132
RH
102 0xffff,
103 0xffff,
b34976b6 104 FALSE),
252b5132
RH
105 /* Standard 8 bit reloc. */
106 HOWTO (R_MN10200_8,
107 0,
108 0,
109 8,
b34976b6 110 FALSE,
252b5132
RH
111 0,
112 complain_overflow_bitfield,
113 bfd_elf_generic_reloc,
114 "R_MN10200_8",
b34976b6 115 FALSE,
252b5132
RH
116 0xff,
117 0xff,
b34976b6 118 FALSE),
252b5132
RH
119 /* Standard 24 bit reloc. */
120 HOWTO (R_MN10200_24,
121 0,
122 2,
123 24,
b34976b6 124 FALSE,
252b5132
RH
125 0,
126 complain_overflow_bitfield,
127 bfd_elf_generic_reloc,
128 "R_MN10200_24",
b34976b6 129 FALSE,
252b5132
RH
130 0xffffff,
131 0xffffff,
b34976b6 132 FALSE),
252b5132
RH
133 /* Simple 8 pc-relative reloc. */
134 HOWTO (R_MN10200_PCREL8,
135 0,
136 0,
137 8,
b34976b6 138 TRUE,
252b5132
RH
139 0,
140 complain_overflow_bitfield,
141 bfd_elf_generic_reloc,
142 "R_MN10200_PCREL8",
b34976b6 143 FALSE,
252b5132
RH
144 0xff,
145 0xff,
b34976b6 146 TRUE),
252b5132
RH
147 /* Simple 16 pc-relative reloc. */
148 HOWTO (R_MN10200_PCREL16,
149 0,
150 1,
151 16,
b34976b6 152 TRUE,
252b5132
RH
153 0,
154 complain_overflow_bitfield,
155 bfd_elf_generic_reloc,
156 "R_MN10200_PCREL16",
b34976b6 157 FALSE,
252b5132
RH
158 0xffff,
159 0xffff,
b34976b6 160 TRUE),
252b5132
RH
161 /* Simple 32bit pc-relative reloc with a 1 byte adjustment
162 to get the pc-relative offset correct. */
163 HOWTO (R_MN10200_PCREL24,
164 0,
165 2,
166 24,
b34976b6 167 TRUE,
252b5132
RH
168 0,
169 complain_overflow_bitfield,
170 bfd_elf_generic_reloc,
171 "R_MN10200_PCREL24",
b34976b6 172 FALSE,
252b5132
RH
173 0xffffff,
174 0xffffff,
b34976b6 175 TRUE),
252b5132
RH
176};
177
27def10f 178struct mn10200_reloc_map {
252b5132
RH
179 bfd_reloc_code_real_type bfd_reloc_val;
180 unsigned char elf_reloc_val;
181};
182
27def10f
KH
183static const struct mn10200_reloc_map mn10200_reloc_map[] = {
184 { BFD_RELOC_NONE , R_MN10200_NONE , },
185 { BFD_RELOC_32 , R_MN10200_32 , },
186 { BFD_RELOC_16 , R_MN10200_16 , },
187 { BFD_RELOC_8 , R_MN10200_8 , },
188 { BFD_RELOC_24 , R_MN10200_24 , },
189 { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , },
252b5132
RH
190 { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, },
191 { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, },
192};
193
194static reloc_howto_type *
195bfd_elf32_bfd_reloc_type_lookup (abfd, code)
5f771d47 196 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
197 bfd_reloc_code_real_type code;
198{
199 unsigned int i;
200
201 for (i = 0;
202 i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map);
203 i++)
204 {
205 if (mn10200_reloc_map[i].bfd_reloc_val == code)
206 return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val];
207 }
208
209 return NULL;
210}
211
157090f7
AM
212static reloc_howto_type *
213bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
214 const char *r_name)
215{
216 unsigned int i;
217
218 for (i = 0;
219 i < (sizeof (elf_mn10200_howto_table)
220 / sizeof (elf_mn10200_howto_table[0]));
221 i++)
222 if (elf_mn10200_howto_table[i].name != NULL
223 && strcasecmp (elf_mn10200_howto_table[i].name, r_name) == 0)
224 return &elf_mn10200_howto_table[i];
225
226 return NULL;
227}
228
252b5132
RH
229/* Set the howto pointer for an MN10200 ELF reloc. */
230
231static void
232mn10200_info_to_howto (abfd, cache_ptr, dst)
5f771d47 233 bfd *abfd ATTRIBUTE_UNUSED;
252b5132 234 arelent *cache_ptr;
947216bf 235 Elf_Internal_Rela *dst;
252b5132
RH
236{
237 unsigned int r_type;
238
239 r_type = ELF32_R_TYPE (dst->r_info);
240 BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX);
241 cache_ptr->howto = &elf_mn10200_howto_table[r_type];
242}
243
244/* Perform a relocation as part of a final link. */
917583ad 245
252b5132
RH
246static bfd_reloc_status_type
247mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
248 input_section, contents, offset, value,
249 addend, info, sym_sec, is_local)
250 reloc_howto_type *howto;
251 bfd *input_bfd;
5f771d47 252 bfd *output_bfd ATTRIBUTE_UNUSED;
252b5132
RH
253 asection *input_section;
254 bfd_byte *contents;
255 bfd_vma offset;
256 bfd_vma value;
257 bfd_vma addend;
5f771d47
ILT
258 struct bfd_link_info *info ATTRIBUTE_UNUSED;
259 asection *sym_sec ATTRIBUTE_UNUSED;
260 int is_local ATTRIBUTE_UNUSED;
252b5132
RH
261{
262 unsigned long r_type = howto->type;
263 bfd_byte *hit_data = contents + offset;
264
265 switch (r_type)
266 {
267
268 case R_MN10200_NONE:
269 return bfd_reloc_ok;
270
271 case R_MN10200_32:
272 value += addend;
273 bfd_put_32 (input_bfd, value, hit_data);
274 return bfd_reloc_ok;
275
276 case R_MN10200_16:
277 value += addend;
278
27def10f 279 if ((long) value > 0x7fff || (long) value < -0x8000)
252b5132
RH
280 return bfd_reloc_overflow;
281
282 bfd_put_16 (input_bfd, value, hit_data);
283 return bfd_reloc_ok;
284
285 case R_MN10200_8:
286 value += addend;
287
27def10f 288 if ((long) value > 0x7f || (long) value < -0x80)
252b5132
RH
289 return bfd_reloc_overflow;
290
291 bfd_put_8 (input_bfd, value, hit_data);
292 return bfd_reloc_ok;
293
294 case R_MN10200_24:
295 value += addend;
296
27def10f 297 if ((long) value > 0x7fffff || (long) value < -0x800000)
252b5132
RH
298 return bfd_reloc_overflow;
299
300 value &= 0xffffff;
301 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
302 bfd_put_32 (input_bfd, value, hit_data);
303 return bfd_reloc_ok;
304
305 case R_MN10200_PCREL8:
306 value -= (input_section->output_section->vma
307 + input_section->output_offset);
308 value -= (offset + 1);
309 value += addend;
310
27def10f
KH
311 if ((long) value > 0xff || (long) value < -0x100)
312 return bfd_reloc_overflow;
252b5132
RH
313
314 bfd_put_8 (input_bfd, value, hit_data);
315 return bfd_reloc_ok;
316
317 case R_MN10200_PCREL16:
318 value -= (input_section->output_section->vma
319 + input_section->output_offset);
320 value -= (offset + 2);
321 value += addend;
322
27def10f
KH
323 if ((long) value > 0xffff || (long) value < -0x10000)
324 return bfd_reloc_overflow;
252b5132
RH
325
326 bfd_put_16 (input_bfd, value, hit_data);
327 return bfd_reloc_ok;
328
329 case R_MN10200_PCREL24:
330 value -= (input_section->output_section->vma
331 + input_section->output_offset);
332 value -= (offset + 3);
333 value += addend;
334
27def10f
KH
335 if ((long) value > 0xffffff || (long) value < -0x1000000)
336 return bfd_reloc_overflow;
252b5132
RH
337
338 value &= 0xffffff;
339 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
340 bfd_put_32 (input_bfd, value, hit_data);
341 return bfd_reloc_ok;
342
343 default:
344 return bfd_reloc_notsupported;
345 }
346}
252b5132
RH
347\f
348/* Relocate an MN10200 ELF section. */
b34976b6 349static bfd_boolean
252b5132
RH
350mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section,
351 contents, relocs, local_syms, local_sections)
352 bfd *output_bfd;
353 struct bfd_link_info *info;
354 bfd *input_bfd;
355 asection *input_section;
356 bfd_byte *contents;
357 Elf_Internal_Rela *relocs;
358 Elf_Internal_Sym *local_syms;
359 asection **local_sections;
360{
361 Elf_Internal_Shdr *symtab_hdr;
362 struct elf_link_hash_entry **sym_hashes;
363 Elf_Internal_Rela *rel, *relend;
364
365 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
366 sym_hashes = elf_sym_hashes (input_bfd);
367
368 rel = relocs;
369 relend = relocs + input_section->reloc_count;
370 for (; rel < relend; rel++)
371 {
372 int r_type;
373 reloc_howto_type *howto;
374 unsigned long r_symndx;
375 Elf_Internal_Sym *sym;
376 asection *sec;
377 struct elf_link_hash_entry *h;
378 bfd_vma relocation;
379 bfd_reloc_status_type r;
380
381 r_symndx = ELF32_R_SYM (rel->r_info);
382 r_type = ELF32_R_TYPE (rel->r_info);
383 howto = elf_mn10200_howto_table + r_type;
384
252b5132
RH
385 h = NULL;
386 sym = NULL;
387 sec = NULL;
388 if (r_symndx < symtab_hdr->sh_info)
389 {
390 sym = local_syms + r_symndx;
391 sec = local_sections[r_symndx];
8517fae7 392 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
393 }
394 else
395 {
59c2e50f
L
396 bfd_boolean unresolved_reloc, warned;
397
b2a8e766
AM
398 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
399 r_symndx, symtab_hdr, sym_hashes,
400 h, sec, relocation,
401 unresolved_reloc, warned);
252b5132
RH
402 }
403
ab96bf03
AM
404 if (sec != NULL && elf_discarded_section (sec))
405 {
406 /* For relocs against symbols from removed linkonce sections,
407 or sections discarded by a linker script, we just want the
408 section contents zeroed. Avoid any special processing. */
409 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
410 rel->r_info = 0;
411 rel->r_addend = 0;
412 continue;
413 }
414
415 if (info->relocatable)
416 continue;
417
252b5132
RH
418 r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
419 input_section,
420 contents, rel->r_offset,
421 relocation, rel->r_addend,
422 info, sec, h == NULL);
423
424 if (r != bfd_reloc_ok)
425 {
426 const char *name;
27def10f 427 const char *msg = (const char *) 0;
252b5132
RH
428
429 if (h != NULL)
430 name = h->root.root.string;
431 else
432 {
433 name = (bfd_elf_string_from_elf_section
434 (input_bfd, symtab_hdr->sh_link, sym->st_name));
435 if (name == NULL || *name == '\0')
436 name = bfd_section_name (input_bfd, sec);
437 }
438
439 switch (r)
440 {
441 case bfd_reloc_overflow:
442 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
443 (info, (h ? &h->root : NULL), name, howto->name,
444 (bfd_vma) 0, input_bfd, input_section,
445 rel->r_offset)))
b34976b6 446 return FALSE;
252b5132
RH
447 break;
448
449 case bfd_reloc_undefined:
450 if (! ((*info->callbacks->undefined_symbol)
451 (info, name, input_bfd, input_section,
b34976b6
AM
452 rel->r_offset, TRUE)))
453 return FALSE;
252b5132
RH
454 break;
455
456 case bfd_reloc_outofrange:
457 msg = _("internal error: out of range error");
458 goto common_error;
459
460 case bfd_reloc_notsupported:
461 msg = _("internal error: unsupported relocation error");
462 goto common_error;
463
464 case bfd_reloc_dangerous:
465 msg = _("internal error: dangerous error");
466 goto common_error;
467
468 default:
469 msg = _("internal error: unknown error");
470 /* fall through */
471
472 common_error:
473 if (!((*info->callbacks->warning)
474 (info, msg, name, input_bfd, input_section,
475 rel->r_offset)))
b34976b6 476 return FALSE;
252b5132
RH
477 break;
478 }
479 }
480 }
481
b34976b6 482 return TRUE;
252b5132
RH
483}
484
485/* This function handles relaxing for the mn10200.
486
4cc11e76 487 There are quite a few relaxing opportunities available on the mn10200:
252b5132
RH
488
489 * jsr:24 -> jsr:16 2 bytes
490
491 * jmp:24 -> jmp:16 2 bytes
492 * jmp:16 -> bra:8 1 byte
493
494 * If the previous instruction is a conditional branch
495 around the jump/bra, we may be able to reverse its condition
496 and change its target to the jump's target. The jump/bra
497 can then be deleted. 2 bytes
498
499 * mov abs24 -> mov abs16 2 byte savings
500
501 * Most instructions which accept imm24 can relax to imm16 2 bytes
502 - Most instructions which accept imm16 can relax to imm8 1 byte
503
504 * Most instructions which accept d24 can relax to d16 2 bytes
505 - Most instructions which accept d16 can relax to d8 1 byte
506
507 abs24, imm24, d24 all look the same at the reloc level. It
508 might make the code simpler if we had different relocs for
509 the various relaxable operand types.
a7c10850 510
252b5132
RH
511 We don't handle imm16->imm8 or d16->d8 as they're very rare
512 and somewhat more difficult to support. */
513
b34976b6 514static bfd_boolean
252b5132
RH
515mn10200_elf_relax_section (abfd, sec, link_info, again)
516 bfd *abfd;
517 asection *sec;
518 struct bfd_link_info *link_info;
b34976b6 519 bfd_boolean *again;
252b5132
RH
520{
521 Elf_Internal_Shdr *symtab_hdr;
522 Elf_Internal_Rela *internal_relocs;
252b5132
RH
523 Elf_Internal_Rela *irel, *irelend;
524 bfd_byte *contents = NULL;
6cdc0ccc 525 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
526
527 /* Assume nothing changes. */
b34976b6 528 *again = FALSE;
252b5132 529
1049f94e 530 /* We don't have to do anything for a relocatable link, if
252b5132
RH
531 this section does not have relocs, or if this is not a
532 code section. */
1049f94e 533 if (link_info->relocatable
252b5132
RH
534 || (sec->flags & SEC_RELOC) == 0
535 || sec->reloc_count == 0
536 || (sec->flags & SEC_CODE) == 0)
b34976b6 537 return TRUE;
252b5132 538
252b5132
RH
539 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
540
541 /* Get a copy of the native relocations. */
45d6a902 542 internal_relocs = (_bfd_elf_link_read_relocs
252b5132
RH
543 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
544 link_info->keep_memory));
545 if (internal_relocs == NULL)
546 goto error_return;
252b5132
RH
547
548 /* Walk through them looking for relaxing opportunities. */
549 irelend = internal_relocs + sec->reloc_count;
550 for (irel = internal_relocs; irel < irelend; irel++)
551 {
552 bfd_vma symval;
553
554 /* If this isn't something that can be relaxed, then ignore
555 this reloc. */
556 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE
557 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8
558 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX)
559 continue;
560
561 /* Get the section contents if we haven't done so already. */
562 if (contents == NULL)
563 {
564 /* Get cached copy if it exists. */
565 if (elf_section_data (sec)->this_hdr.contents != NULL)
566 contents = elf_section_data (sec)->this_hdr.contents;
567 else
568 {
569 /* Go get them off disk. */
eea6121a 570 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH
571 goto error_return;
572 }
573 }
574
6cdc0ccc
AM
575 /* Read this BFD's local symbols if we haven't done so already. */
576 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
252b5132 577 {
6cdc0ccc
AM
578 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
579 if (isymbuf == NULL)
580 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
581 symtab_hdr->sh_info, 0,
582 NULL, NULL, NULL);
583 if (isymbuf == NULL)
584 goto error_return;
252b5132
RH
585 }
586
587 /* Get the value of the symbol referred to by the reloc. */
588 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
589 {
9ad5cbcf 590 /* A local symbol. */
6cdc0ccc 591 Elf_Internal_Sym *isym;
252b5132
RH
592 asection *sym_sec;
593
6cdc0ccc
AM
594 isym = isymbuf + ELF32_R_SYM (irel->r_info);
595 if (isym->st_shndx == SHN_UNDEF)
9ad5cbcf 596 sym_sec = bfd_und_section_ptr;
6cdc0ccc 597 else if (isym->st_shndx == SHN_ABS)
9ad5cbcf 598 sym_sec = bfd_abs_section_ptr;
6cdc0ccc 599 else if (isym->st_shndx == SHN_COMMON)
9ad5cbcf
AM
600 sym_sec = bfd_com_section_ptr;
601 else
6cdc0ccc
AM
602 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
603 symval = (isym->st_value
252b5132
RH
604 + sym_sec->output_section->vma
605 + sym_sec->output_offset);
606 }
607 else
608 {
609 unsigned long indx;
610 struct elf_link_hash_entry *h;
611
612 /* An external symbol. */
613 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
614 h = elf_sym_hashes (abfd)[indx];
615 BFD_ASSERT (h != NULL);
616 if (h->root.type != bfd_link_hash_defined
617 && h->root.type != bfd_link_hash_defweak)
618 {
619 /* This appears to be a reference to an undefined
620 symbol. Just ignore it--it will be caught by the
621 regular reloc processing. */
622 continue;
623 }
624
625 symval = (h->root.u.def.value
626 + h->root.u.def.section->output_section->vma
627 + h->root.u.def.section->output_offset);
628 }
629
630 /* For simplicity of coding, we are going to modify the section
631 contents, the section relocs, and the BFD symbol table. We
632 must tell the rest of the code not to free up this
633 information. It would be possible to instead create a table
634 of changes which have to be made, as is done in coff-mips.c;
635 that would be more work, but would require less memory when
636 the linker is run. */
637
252b5132
RH
638 /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative
639 branch/call. */
640 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24)
641 {
642 bfd_vma value = symval;
643
644 /* Deal with pc-relative gunk. */
645 value -= (sec->output_section->vma + sec->output_offset);
646 value -= (irel->r_offset + 3);
647 value += irel->r_addend;
648
649 /* See if the value will fit in 16 bits, note the high value is
650 0x7fff + 2 as the target will be two bytes closer if we are
651 able to relax. */
27def10f 652 if ((long) value < 0x8001 && (long) value > -0x8000)
252b5132
RH
653 {
654 unsigned char code;
655
656 /* Get the opcode. */
657 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
658
659 if (code != 0xe0 && code != 0xe1)
660 continue;
661
662 /* Note that we've changed the relocs, section contents, etc. */
663 elf_section_data (sec)->relocs = internal_relocs;
252b5132 664 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 665 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
666
667 /* Fix the opcode. */
668 if (code == 0xe0)
669 bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2);
670 else if (code == 0xe1)
671 bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2);
672
673 /* Fix the relocation's type. */
674 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
675 R_MN10200_PCREL16);
676
677 /* The opcode got shorter too, so we have to fix the offset. */
678 irel->r_offset -= 1;
679
680 /* Delete two bytes of data. */
681 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
682 irel->r_offset + 1, 2))
683 goto error_return;
684
685 /* That will change things, so, we should relax again.
686 Note that this is not required, and it may be slow. */
b34976b6 687 *again = TRUE;
252b5132
RH
688 }
689 }
690
691 /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative
692 branch. */
693 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16)
694 {
695 bfd_vma value = symval;
696
697 /* Deal with pc-relative gunk. */
698 value -= (sec->output_section->vma + sec->output_offset);
699 value -= (irel->r_offset + 2);
700 value += irel->r_addend;
701
702 /* See if the value will fit in 8 bits, note the high value is
703 0x7f + 1 as the target will be one bytes closer if we are
704 able to relax. */
27def10f 705 if ((long) value < 0x80 && (long) value > -0x80)
252b5132
RH
706 {
707 unsigned char code;
708
709 /* Get the opcode. */
710 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
711
712 if (code != 0xfc)
713 continue;
714
715 /* Note that we've changed the relocs, section contents, etc. */
716 elf_section_data (sec)->relocs = internal_relocs;
252b5132 717 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 718 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
719
720 /* Fix the opcode. */
721 bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1);
722
723 /* Fix the relocation's type. */
724 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
725 R_MN10200_PCREL8);
726
727 /* Delete one byte of data. */
728 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
729 irel->r_offset + 1, 1))
730 goto error_return;
731
732 /* That will change things, so, we should relax again.
733 Note that this is not required, and it may be slow. */
b34976b6 734 *again = TRUE;
252b5132
RH
735 }
736 }
737
738 /* Try to eliminate an unconditional 8 bit pc-relative branch
739 which immediately follows a conditional 8 bit pc-relative
740 branch around the unconditional branch.
741
742 original: new:
743 bCC lab1 bCC' lab2
744 bra lab2
745 lab1: lab1:
746
252b5132
RH
747 This happens when the bCC can't reach lab2 at assembly time,
748 but due to other relaxations it can reach at link time. */
749 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8)
750 {
751 Elf_Internal_Rela *nrel;
752 bfd_vma value = symval;
753 unsigned char code;
754
755 /* Deal with pc-relative gunk. */
756 value -= (sec->output_section->vma + sec->output_offset);
757 value -= (irel->r_offset + 1);
758 value += irel->r_addend;
759
760 /* Do nothing if this reloc is the last byte in the section. */
eea6121a 761 if (irel->r_offset == sec->size)
252b5132
RH
762 continue;
763
764 /* See if the next instruction is an unconditional pc-relative
765 branch, more often than not this test will fail, so we
766 test it first to speed things up. */
767 code = bfd_get_8 (abfd, contents + irel->r_offset + 1);
768 if (code != 0xea)
769 continue;
770
771 /* Also make sure the next relocation applies to the next
772 instruction and that it's a pc-relative 8 bit branch. */
773 nrel = irel + 1;
774 if (nrel == irelend
775 || irel->r_offset + 2 != nrel->r_offset
776 || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8)
777 continue;
778
779 /* Make sure our destination immediately follows the
780 unconditional branch. */
781 if (symval != (sec->output_section->vma + sec->output_offset
782 + irel->r_offset + 3))
783 continue;
784
785 /* Now make sure we are a conditional branch. This may not
a7c10850 786 be necessary, but why take the chance.
252b5132
RH
787
788 Note these checks assume that R_MN10200_PCREL8 relocs
789 only occur on bCC and bCCx insns. If they occured
790 elsewhere, we'd need to know the start of this insn
791 for this check to be accurate. */
792 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
793 if (code != 0xe0 && code != 0xe1 && code != 0xe2
794 && code != 0xe3 && code != 0xe4 && code != 0xe5
795 && code != 0xe6 && code != 0xe7 && code != 0xe8
796 && code != 0xe9 && code != 0xec && code != 0xed
797 && code != 0xee && code != 0xef && code != 0xfc
798 && code != 0xfd && code != 0xfe && code != 0xff)
799 continue;
800
801 /* We also have to be sure there is no symbol/label
802 at the unconditional branch. */
6cdc0ccc
AM
803 if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf,
804 irel->r_offset + 1))
252b5132
RH
805 continue;
806
807 /* Note that we've changed the relocs, section contents, etc. */
808 elf_section_data (sec)->relocs = internal_relocs;
252b5132 809 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 810 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
811
812 /* Reverse the condition of the first branch. */
813 switch (code)
814 {
27def10f
KH
815 case 0xfc:
816 code = 0xfd;
817 break;
818 case 0xfd:
819 code = 0xfc;
820 break;
821 case 0xfe:
822 code = 0xff;
823 break;
824 case 0xff:
825 code = 0xfe;
826 break;
827 case 0xe8:
828 code = 0xe9;
829 break;
830 case 0xe9:
831 code = 0xe8;
832 break;
833 case 0xe0:
834 code = 0xe2;
835 break;
836 case 0xe2:
837 code = 0xe0;
838 break;
839 case 0xe3:
840 code = 0xe1;
841 break;
842 case 0xe1:
843 code = 0xe3;
844 break;
845 case 0xe4:
846 code = 0xe6;
847 break;
848 case 0xe6:
849 code = 0xe4;
850 break;
851 case 0xe7:
852 code = 0xe5;
853 break;
854 case 0xe5:
855 code = 0xe7;
856 break;
857 case 0xec:
858 code = 0xed;
859 break;
860 case 0xed:
861 code = 0xec;
862 break;
863 case 0xee:
864 code = 0xef;
865 break;
866 case 0xef:
867 code = 0xee;
868 break;
252b5132
RH
869 }
870 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
a7c10850 871
252b5132
RH
872 /* Set the reloc type and symbol for the first branch
873 from the second branch. */
874 irel->r_info = nrel->r_info;
875
876 /* Make the reloc for the second branch a null reloc. */
877 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
878 R_MN10200_NONE);
879
880 /* Delete two bytes of data. */
881 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
882 irel->r_offset + 1, 2))
883 goto error_return;
884
885 /* That will change things, so, we should relax again.
886 Note that this is not required, and it may be slow. */
b34976b6 887 *again = TRUE;
252b5132
RH
888 }
889
890 /* Try to turn a 24bit immediate, displacement or absolute address
891 into a 16bit immediate, displacement or absolute address. */
892 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24)
893 {
894 bfd_vma value = symval;
895
a7c10850 896 /* See if the value will fit in 16 bits.
252b5132
RH
897 We allow any 16bit match here. We prune those we can't
898 handle below. */
27def10f 899 if ((long) value < 0x7fff && (long) value > -0x8000)
252b5132
RH
900 {
901 unsigned char code;
902
903 /* All insns which have 24bit operands are 5 bytes long,
904 the first byte will always be 0xf4, but we double check
905 it just in case. */
906
907 /* Get the first opcode. */
908 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
909
910 if (code != 0xf4)
911 continue;
912
913 /* Get the second opcode. */
914 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
915
916 switch (code & 0xfc)
917 {
918 /* mov imm24,dn -> mov imm16,dn */
919 case 0x70:
920 /* Not safe if the high bit is on as relaxing may
921 move the value out of high mem and thus not fit
922 in a signed 16bit value. */
923 if (value & 0x8000)
924 continue;
925
4cc11e76 926 /* Note that we've changed the relocation contents, etc. */
252b5132 927 elf_section_data (sec)->relocs = internal_relocs;
252b5132 928 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 929 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
930
931 /* Fix the opcode. */
932 bfd_put_8 (abfd, 0xf8 + (code & 0x03),
933 contents + irel->r_offset - 2);
934
935 /* Fix the relocation's type. */
936 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
937 R_MN10200_16);
938
939 /* The opcode got shorter too, so we have to fix the
940 offset. */
941 irel->r_offset -= 1;
942
943 /* Delete two bytes of data. */
944 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
945 irel->r_offset + 1, 2))
946 goto error_return;
947
948 /* That will change things, so, we should relax again.
949 Note that this is not required, and it may be slow. */
b34976b6 950 *again = TRUE;
252b5132
RH
951 break;
952
a7c10850 953 /* mov imm24,an -> mov imm16,an
252b5132
RH
954 cmp imm24,an -> cmp imm16,an
955 mov (abs24),dn -> mov (abs16),dn
956 mov dn,(abs24) -> mov dn,(abs16)
957 movb dn,(abs24) -> movb dn,(abs16)
958 movbu (abs24),dn -> movbu (abs16),dn */
959 case 0x74:
960 case 0x7c:
961 case 0xc0:
962 case 0x40:
963 case 0x44:
964 case 0xc8:
4cc11e76 965 /* Note that we've changed the relocation contents, etc. */
252b5132 966 elf_section_data (sec)->relocs = internal_relocs;
252b5132 967 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 968 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
969
970 if ((code & 0xfc) == 0x74)
971 code = 0xdc + (code & 0x03);
972 else if ((code & 0xfc) == 0x7c)
973 code = 0xec + (code & 0x03);
974 else if ((code & 0xfc) == 0xc0)
975 code = 0xc8 + (code & 0x03);
976 else if ((code & 0xfc) == 0x40)
977 code = 0xc0 + (code & 0x03);
978 else if ((code & 0xfc) == 0x44)
979 code = 0xc4 + (code & 0x03);
980 else if ((code & 0xfc) == 0xc8)
981 code = 0xcc + (code & 0x03);
982
983 /* Fix the opcode. */
984 bfd_put_8 (abfd, code, contents + irel->r_offset - 2);
985
986 /* Fix the relocation's type. */
987 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
988 R_MN10200_16);
989
990 /* The opcode got shorter too, so we have to fix the
991 offset. */
992 irel->r_offset -= 1;
993
994 /* Delete two bytes of data. */
995 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
996 irel->r_offset + 1, 2))
997 goto error_return;
998
999 /* That will change things, so, we should relax again.
1000 Note that this is not required, and it may be slow. */
b34976b6 1001 *again = TRUE;
252b5132
RH
1002 break;
1003
1004 /* cmp imm24,dn -> cmp imm16,dn
1005 mov (abs24),an -> mov (abs16),an
1006 mov an,(abs24) -> mov an,(abs16)
1007 add imm24,dn -> add imm16,dn
1008 add imm24,an -> add imm16,an
1009 sub imm24,dn -> sub imm16,dn
a7c10850 1010 sub imm24,an -> sub imm16,an
252b5132
RH
1011 And all d24->d16 in memory ops. */
1012 case 0x78:
1013 case 0xd0:
1014 case 0x50:
1015 case 0x60:
1016 case 0x64:
1017 case 0x68:
1018 case 0x6c:
1019 case 0x80:
1020 case 0xf0:
1021 case 0x00:
1022 case 0x10:
1023 case 0xb0:
1024 case 0x30:
1025 case 0xa0:
1026 case 0x20:
1027 case 0x90:
1028 /* Not safe if the high bit is on as relaxing may
1029 move the value out of high mem and thus not fit
1030 in a signed 16bit value. */
1031 if (((code & 0xfc) == 0x78
27def10f
KH
1032 || (code & 0xfc) == 0x60
1033 || (code & 0xfc) == 0x64
1034 || (code & 0xfc) == 0x68
1035 || (code & 0xfc) == 0x6c
1036 || (code & 0xfc) == 0x80
1037 || (code & 0xfc) == 0xf0
1038 || (code & 0xfc) == 0x00
1039 || (code & 0xfc) == 0x10
1040 || (code & 0xfc) == 0xb0
1041 || (code & 0xfc) == 0x30
1042 || (code & 0xfc) == 0xa0
1043 || (code & 0xfc) == 0x20
1044 || (code & 0xfc) == 0x90)
1045 && (value & 0x8000) != 0)
252b5132
RH
1046 continue;
1047
4cc11e76 1048 /* Note that we've changed the relocation contents, etc. */
252b5132 1049 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1050 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1051 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1052
1053 /* Fix the opcode. */
1054 bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2);
1055
1056 if ((code & 0xfc) == 0x78)
1057 code = 0x48 + (code & 0x03);
1058 else if ((code & 0xfc) == 0xd0)
1059 code = 0x30 + (code & 0x03);
1060 else if ((code & 0xfc) == 0x50)
1061 code = 0x20 + (code & 0x03);
1062 else if ((code & 0xfc) == 0x60)
1063 code = 0x18 + (code & 0x03);
1064 else if ((code & 0xfc) == 0x64)
1065 code = 0x08 + (code & 0x03);
1066 else if ((code & 0xfc) == 0x68)
1067 code = 0x1c + (code & 0x03);
1068 else if ((code & 0xfc) == 0x6c)
1069 code = 0x0c + (code & 0x03);
1070 else if ((code & 0xfc) == 0x80)
1071 code = 0xc0 + (code & 0x07);
1072 else if ((code & 0xfc) == 0xf0)
1073 code = 0xb0 + (code & 0x07);
1074 else if ((code & 0xfc) == 0x00)
1075 code = 0x80 + (code & 0x07);
1076 else if ((code & 0xfc) == 0x10)
1077 code = 0xa0 + (code & 0x07);
1078 else if ((code & 0xfc) == 0xb0)
1079 code = 0x70 + (code & 0x07);
1080 else if ((code & 0xfc) == 0x30)
1081 code = 0x60 + (code & 0x07);
1082 else if ((code & 0xfc) == 0xa0)
1083 code = 0xd0 + (code & 0x07);
1084 else if ((code & 0xfc) == 0x20)
1085 code = 0x90 + (code & 0x07);
1086 else if ((code & 0xfc) == 0x90)
1087 code = 0x50 + (code & 0x07);
1088
1089 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
1090
1091 /* Fix the relocation's type. */
1092 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1093 R_MN10200_16);
1094
1095 /* Delete one bytes of data. */
1096 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1097 irel->r_offset + 2, 1))
1098 goto error_return;
1099
1100 /* That will change things, so, we should relax again.
1101 Note that this is not required, and it may be slow. */
b34976b6 1102 *again = TRUE;
252b5132
RH
1103 break;
1104
1105 /* movb (abs24),dn ->movbu (abs16),dn extxb bn */
1106 case 0xc4:
1107 /* Note that we've changed the reldection contents, etc. */
1108 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1109 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1110 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1111
1112 bfd_put_8 (abfd, 0xcc + (code & 0x03),
1113 contents + irel->r_offset - 2);
1114
1115 bfd_put_8 (abfd, 0xb8 + (code & 0x03),
1116 contents + irel->r_offset - 1);
1117
1118 /* Fix the relocation's type. */
1119 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1120 R_MN10200_16);
1121
1122 /* The reloc will be applied one byte in front of its
1123 current location. */
1124 irel->r_offset -= 1;
1125
1126 /* Delete one bytes of data. */
1127 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1128 irel->r_offset + 2, 1))
1129 goto error_return;
1130
1131 /* That will change things, so, we should relax again.
1132 Note that this is not required, and it may be slow. */
b34976b6 1133 *again = TRUE;
252b5132
RH
1134 break;
1135 }
1136 }
1137 }
1138 }
1139
6cdc0ccc
AM
1140 if (isymbuf != NULL
1141 && symtab_hdr->contents != (unsigned char *) isymbuf)
252b5132
RH
1142 {
1143 if (! link_info->keep_memory)
6cdc0ccc 1144 free (isymbuf);
252b5132
RH
1145 else
1146 {
6cdc0ccc
AM
1147 /* Cache the symbols for elf_link_input_bfd. */
1148 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132 1149 }
9ad5cbcf
AM
1150 }
1151
6cdc0ccc
AM
1152 if (contents != NULL
1153 && elf_section_data (sec)->this_hdr.contents != contents)
252b5132
RH
1154 {
1155 if (! link_info->keep_memory)
6cdc0ccc
AM
1156 free (contents);
1157 else
252b5132 1158 {
6cdc0ccc
AM
1159 /* Cache the section contents for elf_link_input_bfd. */
1160 elf_section_data (sec)->this_hdr.contents = contents;
252b5132 1161 }
252b5132
RH
1162 }
1163
6cdc0ccc
AM
1164 if (internal_relocs != NULL
1165 && elf_section_data (sec)->relocs != internal_relocs)
1166 free (internal_relocs);
1167
b34976b6 1168 return TRUE;
252b5132
RH
1169
1170 error_return:
6cdc0ccc
AM
1171 if (isymbuf != NULL
1172 && symtab_hdr->contents != (unsigned char *) isymbuf)
1173 free (isymbuf);
1174 if (contents != NULL
1175 && elf_section_data (sec)->this_hdr.contents != contents)
1176 free (contents);
1177 if (internal_relocs != NULL
1178 && elf_section_data (sec)->relocs != internal_relocs)
1179 free (internal_relocs);
9ad5cbcf 1180
b34976b6 1181 return FALSE;
252b5132
RH
1182}
1183
1184/* Delete some bytes from a section while relaxing. */
1185
b34976b6 1186static bfd_boolean
252b5132
RH
1187mn10200_elf_relax_delete_bytes (abfd, sec, addr, count)
1188 bfd *abfd;
1189 asection *sec;
1190 bfd_vma addr;
1191 int count;
1192{
1193 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1194 unsigned int sec_shndx;
252b5132
RH
1195 bfd_byte *contents;
1196 Elf_Internal_Rela *irel, *irelend;
252b5132 1197 bfd_vma toaddr;
6cdc0ccc
AM
1198 Elf_Internal_Sym *isym;
1199 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1200 struct elf_link_hash_entry **sym_hashes;
1201 struct elf_link_hash_entry **end_hashes;
1202 unsigned int symcount;
252b5132 1203
9ad5cbcf 1204 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132
RH
1205
1206 contents = elf_section_data (sec)->this_hdr.contents;
1207
eea6121a 1208 toaddr = sec->size;
252b5132
RH
1209
1210 irel = elf_section_data (sec)->relocs;
1211 irelend = irel + sec->reloc_count;
1212
1213 /* Actually delete the bytes. */
dc810e39
AM
1214 memmove (contents + addr, contents + addr + count,
1215 (size_t) (toaddr - addr - count));
eea6121a 1216 sec->size -= count;
252b5132
RH
1217
1218 /* Adjust all the relocs. */
1219 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1220 {
1221 /* Get the new reloc address. */
1222 if ((irel->r_offset > addr
1223 && irel->r_offset < toaddr))
1224 irel->r_offset -= count;
1225 }
1226
1227 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1228 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1229 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1230 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1231 {
6cdc0ccc
AM
1232 if (isym->st_shndx == sec_shndx
1233 && isym->st_value > addr
1234 && isym->st_value < toaddr)
1235 isym->st_value -= count;
252b5132
RH
1236 }
1237
1238 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1239 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1240 - symtab_hdr->sh_info);
1241 sym_hashes = elf_sym_hashes (abfd);
1242 end_hashes = sym_hashes + symcount;
1243 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1244 {
9ad5cbcf
AM
1245 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1246 if ((sym_hash->root.type == bfd_link_hash_defined
1247 || sym_hash->root.type == bfd_link_hash_defweak)
1248 && sym_hash->root.u.def.section == sec
1249 && sym_hash->root.u.def.value > addr
1250 && sym_hash->root.u.def.value < toaddr)
252b5132 1251 {
9ad5cbcf 1252 sym_hash->root.u.def.value -= count;
252b5132
RH
1253 }
1254 }
1255
b34976b6 1256 return TRUE;
252b5132
RH
1257}
1258
b34976b6
AM
1259/* Return TRUE if a symbol exists at the given address, else return
1260 FALSE. */
1261static bfd_boolean
6cdc0ccc 1262mn10200_elf_symbol_address_p (abfd, sec, isym, addr)
252b5132
RH
1263 bfd *abfd;
1264 asection *sec;
6cdc0ccc 1265 Elf_Internal_Sym *isym;
252b5132
RH
1266 bfd_vma addr;
1267{
1268 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1269 unsigned int sec_shndx;
6cdc0ccc 1270 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1271 struct elf_link_hash_entry **sym_hashes;
1272 struct elf_link_hash_entry **end_hashes;
1273 unsigned int symcount;
252b5132 1274
9ad5cbcf 1275 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132 1276
6cdc0ccc 1277 /* Examine all the local symbols. */
9ad5cbcf 1278 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc 1279 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1280 {
6cdc0ccc
AM
1281 if (isym->st_shndx == sec_shndx
1282 && isym->st_value == addr)
b34976b6 1283 return TRUE;
252b5132
RH
1284 }
1285
9ad5cbcf
AM
1286 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1287 - symtab_hdr->sh_info);
1288 sym_hashes = elf_sym_hashes (abfd);
1289 end_hashes = sym_hashes + symcount;
1290 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1291 {
9ad5cbcf
AM
1292 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1293 if ((sym_hash->root.type == bfd_link_hash_defined
1294 || sym_hash->root.type == bfd_link_hash_defweak)
1295 && sym_hash->root.u.def.section == sec
1296 && sym_hash->root.u.def.value == addr)
b34976b6 1297 return TRUE;
252b5132 1298 }
9ad5cbcf 1299
b34976b6 1300 return FALSE;
252b5132
RH
1301}
1302
1303/* This is a version of bfd_generic_get_relocated_section_contents
1304 which uses mn10200_elf_relocate_section. */
1305
1306static bfd_byte *
1307mn10200_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1049f94e 1308 data, relocatable, symbols)
252b5132
RH
1309 bfd *output_bfd;
1310 struct bfd_link_info *link_info;
1311 struct bfd_link_order *link_order;
1312 bfd_byte *data;
1049f94e 1313 bfd_boolean relocatable;
252b5132
RH
1314 asymbol **symbols;
1315{
1316 Elf_Internal_Shdr *symtab_hdr;
1317 asection *input_section = link_order->u.indirect.section;
1318 bfd *input_bfd = input_section->owner;
1319 asection **sections = NULL;
1320 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1321 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
1322
1323 /* We only need to handle the case of relaxing, or of having a
1324 particular set of section contents, specially. */
1049f94e 1325 if (relocatable
252b5132
RH
1326 || elf_section_data (input_section)->this_hdr.contents == NULL)
1327 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1328 link_order, data,
1049f94e 1329 relocatable,
252b5132
RH
1330 symbols);
1331
1332 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1333
1334 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1335 (size_t) input_section->size);
252b5132
RH
1336
1337 if ((input_section->flags & SEC_RELOC) != 0
1338 && input_section->reloc_count > 0)
1339 {
6cdc0ccc
AM
1340 Elf_Internal_Sym *isym;
1341 Elf_Internal_Sym *isymend;
252b5132 1342 asection **secpp;
9ad5cbcf 1343 bfd_size_type amt;
252b5132 1344
45d6a902 1345 internal_relocs = (_bfd_elf_link_read_relocs
252b5132 1346 (input_bfd, input_section, (PTR) NULL,
b34976b6 1347 (Elf_Internal_Rela *) NULL, FALSE));
252b5132
RH
1348 if (internal_relocs == NULL)
1349 goto error_return;
1350
6cdc0ccc
AM
1351 if (symtab_hdr->sh_info != 0)
1352 {
1353 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1354 if (isymbuf == NULL)
1355 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1356 symtab_hdr->sh_info, 0,
1357 NULL, NULL, NULL);
1358 if (isymbuf == NULL)
1359 goto error_return;
1360 }
252b5132 1361
9ad5cbcf
AM
1362 amt = symtab_hdr->sh_info;
1363 amt *= sizeof (asection *);
1364 sections = (asection **) bfd_malloc (amt);
1365 if (sections == NULL && amt != 0)
252b5132
RH
1366 goto error_return;
1367
6cdc0ccc
AM
1368 isymend = isymbuf + symtab_hdr->sh_info;
1369 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
252b5132
RH
1370 {
1371 asection *isec;
1372
6cdc0ccc 1373 if (isym->st_shndx == SHN_UNDEF)
252b5132 1374 isec = bfd_und_section_ptr;
6cdc0ccc 1375 else if (isym->st_shndx == SHN_ABS)
252b5132 1376 isec = bfd_abs_section_ptr;
6cdc0ccc 1377 else if (isym->st_shndx == SHN_COMMON)
252b5132
RH
1378 isec = bfd_com_section_ptr;
1379 else
6cdc0ccc 1380 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
252b5132
RH
1381
1382 *secpp = isec;
1383 }
1384
1385 if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd,
1386 input_section, data, internal_relocs,
6cdc0ccc 1387 isymbuf, sections))
252b5132
RH
1388 goto error_return;
1389
1390 if (sections != NULL)
1391 free (sections);
6cdc0ccc
AM
1392 if (isymbuf != NULL
1393 && symtab_hdr->contents != (unsigned char *) isymbuf)
1394 free (isymbuf);
1395 if (elf_section_data (input_section)->relocs != internal_relocs)
252b5132 1396 free (internal_relocs);
252b5132
RH
1397 }
1398
1399 return data;
1400
1401 error_return:
252b5132
RH
1402 if (sections != NULL)
1403 free (sections);
6cdc0ccc
AM
1404 if (isymbuf != NULL
1405 && symtab_hdr->contents != (unsigned char *) isymbuf)
1406 free (isymbuf);
1407 if (internal_relocs != NULL
1408 && elf_section_data (input_section)->relocs != internal_relocs)
1409 free (internal_relocs);
252b5132
RH
1410 return NULL;
1411}
1412
252b5132
RH
1413#define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec
1414#define TARGET_LITTLE_NAME "elf32-mn10200"
1415#define ELF_ARCH bfd_arch_mn10200
aa4f99bb
AO
1416#define ELF_MACHINE_CODE EM_MN10200
1417#define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200
252b5132
RH
1418#define ELF_MAXPAGESIZE 0x1000
1419
b491616a 1420#define elf_backend_rela_normal 1
252b5132
RH
1421#define elf_info_to_howto mn10200_info_to_howto
1422#define elf_info_to_howto_rel 0
1423#define elf_backend_relocate_section mn10200_elf_relocate_section
1424#define bfd_elf32_bfd_relax_section mn10200_elf_relax_section
1425#define bfd_elf32_bfd_get_relocated_section_contents \
1426 mn10200_elf_get_relocated_section_contents
1427
1428#define elf_symbol_leading_char '_'
1429
1430#include "elf32-target.h"
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