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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
81694485 3 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
48229727
JB		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2031 is inserted in arm_build_one_stub(). */
2032#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2033#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2034#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2035#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2036#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2037#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2038
2039typedef struct
2040{
2041 bfd_vma data;
2042 enum stub_insn_type type;
ebe24dd4 2043 unsigned int r_type;
461a49ca
DJ		 2044 int reloc_addend;
2045} insn_sequence;
2046
fea2b4d6
CL		 2047/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2048 to reach the stub if necessary. */
461a49ca 2049static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2050 {
461a49ca
DJ		 2051 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2052 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2053 };
2054
fea2b4d6
CL		 2055/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2056 available. */
461a49ca 2057static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2058 {
461a49ca
DJ		 2059 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2060 ARM_INSN(0xe12fff1c), /* bx ip */
2061 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2062 };
2063
d3626fb0 2064/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2065static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2066 {
461a49ca
DJ		 2067 THUMB16_INSN(0xb401), /* push {r0} */
2068 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2069 THUMB16_INSN(0x4684), /* mov ip, r0 */
2070 THUMB16_INSN(0xbc01), /* pop {r0} */
2071 THUMB16_INSN(0x4760), /* bx ip */
2072 THUMB16_INSN(0xbf00), /* nop */
2073 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2074 };
2075
d3626fb0
CL		 2076/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2077 allowed. */
2078static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2079 {
2080 THUMB16_INSN(0x4778), /* bx pc */
2081 THUMB16_INSN(0x46c0), /* nop */
2082 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2083 ARM_INSN(0xe12fff1c), /* bx ip */
2084 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2085 };
2086
fea2b4d6
CL		 2087/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2088 available. */
461a49ca 2089static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2090 {
461a49ca
DJ		 2091 THUMB16_INSN(0x4778), /* bx pc */
2092 THUMB16_INSN(0x46c0), /* nop */
2093 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2094 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2095 };
2096
fea2b4d6
CL		 2097/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2098 one, when the destination is close enough. */
461a49ca 2099static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2100 {
461a49ca
DJ		 2101 THUMB16_INSN(0x4778), /* bx pc */
2102 THUMB16_INSN(0x46c0), /* nop */
2103 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2104 };
2105
cf3eccff 2106/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2107 blx to reach the stub if necessary. */
cf3eccff 2108static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2109 {
461a49ca
DJ		 2110 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2111 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2112 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2113 };
2114
cf3eccff
DJ		 2115/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2116 blx to reach the stub if necessary. We can not add into pc;
2117 it is not guaranteed to mode switch (different in ARMv6 and
2118 ARMv7). */
2119static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2120 {
2121 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2122 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2123 ARM_INSN(0xe12fff1c), /* bx ip */
2124 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2125 };
2126
ebe24dd4
CL		 2127/* V4T ARM -> ARM long branch stub, PIC. */
2128static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2129 {
2130 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2131 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2132 ARM_INSN(0xe12fff1c), /* bx ip */
2133 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2134 };
2135
2136/* V4T Thumb -> ARM long branch stub, PIC. */
2137static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2138 {
2139 THUMB16_INSN(0x4778), /* bx pc */
2140 THUMB16_INSN(0x46c0), /* nop */
2141 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2142 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2143 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2144 };
2145
d3626fb0
CL		 2146/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2147 architectures. */
ebe24dd4
CL		 2148static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2149 {
2150 THUMB16_INSN(0xb401), /* push {r0} */
2151 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2152 THUMB16_INSN(0x46fc), /* mov ip, pc */
2153 THUMB16_INSN(0x4484), /* add ip, r0 */
2154 THUMB16_INSN(0xbc01), /* pop {r0} */
2155 THUMB16_INSN(0x4760), /* bx ip */
2156 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2157 };
2158
d3626fb0
CL		 2159/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2160 allowed. */
2161static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2162 {
2163 THUMB16_INSN(0x4778), /* bx pc */
2164 THUMB16_INSN(0x46c0), /* nop */
2165 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2166 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2167 ARM_INSN(0xe12fff1c), /* bx ip */
2168 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2169 };
2170
48229727
JB		 2171/* Cortex-A8 erratum-workaround stubs. */
2172
2173/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2174 can't use a conditional branch to reach this stub). */
2175
2176static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2177 {
2178 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2179 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2180 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2181 };
2182
2183/* Stub used for b.w and bl.w instructions. */
2184
2185static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2186 {
2187 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2188 };
2189
2190static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2191 {
2192 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2193 };
2194
2195/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2196 instruction (which switches to ARM mode) to point to this stub. Jump to the
2197 real destination using an ARM-mode branch. */
2198
2199static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2200 {
2201 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2202 };
2203
906e58ca
NC		 2204/* Section name for stubs is the associated section name plus this
2205 string. */
2206#define STUB_SUFFIX ".stub"
2207
738a79f6
CL		 2208/* One entry per long/short branch stub defined above. */
2209#define DEF_STUBS \
2210 DEF_STUB(long_branch_any_any) \
2211 DEF_STUB(long_branch_v4t_arm_thumb) \
2212 DEF_STUB(long_branch_thumb_only) \
2213 DEF_STUB(long_branch_v4t_thumb_thumb) \
2214 DEF_STUB(long_branch_v4t_thumb_arm) \
2215 DEF_STUB(short_branch_v4t_thumb_arm) \
2216 DEF_STUB(long_branch_any_arm_pic) \
2217 DEF_STUB(long_branch_any_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2220 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2221 DEF_STUB(long_branch_thumb_only_pic) \
2222 DEF_STUB(a8_veneer_b_cond) \
2223 DEF_STUB(a8_veneer_b) \
2224 DEF_STUB(a8_veneer_bl) \
2225 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2226
2227#define DEF_STUB(x) arm_stub_##x,
2228enum elf32_arm_stub_type {
906e58ca 2229 arm_stub_none,
738a79f6 2230 DEF_STUBS
eb7c4339
NS		 2231 /* Note the first a8_veneer type */
2232 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2233};
2234#undef DEF_STUB
2235
2236typedef struct
2237{
2238 const insn_sequence* template;
2239 int template_size;
2240} stub_def;
2241
2242#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2243static const stub_def stub_definitions[] = {
2244 {NULL, 0},
2245 DEF_STUBS
906e58ca
NC		 2246};
2247
2248struct elf32_arm_stub_hash_entry
2249{
2250 /* Base hash table entry structure. */
2251 struct bfd_hash_entry root;
2252
2253 /* The stub section. */
2254 asection *stub_sec;
2255
2256 /* Offset within stub_sec of the beginning of this stub. */
2257 bfd_vma stub_offset;
2258
2259 /* Given the symbol's value and its section we can determine its final
2260 value when building the stubs (so the stub knows where to jump). */
2261 bfd_vma target_value;
2262 asection *target_section;
2263
48229727
JB		 2264 /* Offset to apply to relocation referencing target_value. */
2265 bfd_vma target_addend;
2266
2267 /* The instruction which caused this stub to be generated (only valid for
2268 Cortex-A8 erratum workaround stubs at present). */
2269 unsigned long orig_insn;
2270
461a49ca 2271 /* The stub type. */
906e58ca 2272 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2273 /* Its encoding size in bytes. */
2274 int stub_size;
2275 /* Its template. */
2276 const insn_sequence *stub_template;
2277 /* The size of the template (number of entries). */
2278 int stub_template_size;
906e58ca
NC		 2279
2280 /* The symbol table entry, if any, that this was derived from. */
2281 struct elf32_arm_link_hash_entry *h;
2282
2283 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2284 unsigned char st_type;
2285
2286 /* Where this stub is being called from, or, in the case of combined
2287 stub sections, the first input section in the group. */
2288 asection *id_sec;
7413f23f
DJ		 2289
2290 /* The name for the local symbol at the start of this stub. The
2291 stub name in the hash table has to be unique; this does not, so
2292 it can be friendlier. */
2293 char *output_name;
906e58ca
NC		 2294};
2295
e489d0ae
PB		 2296/* Used to build a map of a section. This is required for mixed-endian
2297 code/data. */
2298
2299typedef struct elf32_elf_section_map
2300{
2301 bfd_vma vma;
2302 char type;
2303}
2304elf32_arm_section_map;
2305
c7b8f16e
JB		 2306/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2307
2308typedef enum
2309{
2310 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2311 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2312 VFP11_ERRATUM_ARM_VENEER,
2313 VFP11_ERRATUM_THUMB_VENEER
2314}
2315elf32_vfp11_erratum_type;
2316
2317typedef struct elf32_vfp11_erratum_list
2318{
2319 struct elf32_vfp11_erratum_list *next;
2320 bfd_vma vma;
2321 union
2322 {
2323 struct
2324 {
2325 struct elf32_vfp11_erratum_list *veneer;
2326 unsigned int vfp_insn;
2327 } b;
2328 struct
2329 {
2330 struct elf32_vfp11_erratum_list *branch;
2331 unsigned int id;
2332 } v;
2333 } u;
2334 elf32_vfp11_erratum_type type;
2335}
2336elf32_vfp11_erratum_list;
2337
2468f9c9
PB		 2338typedef enum
2339{
2340 DELETE_EXIDX_ENTRY,
2341 INSERT_EXIDX_CANTUNWIND_AT_END
2342}
2343arm_unwind_edit_type;
2344
2345/* A (sorted) list of edits to apply to an unwind table. */
2346typedef struct arm_unwind_table_edit
2347{
2348 arm_unwind_edit_type type;
2349 /* Note: we sometimes want to insert an unwind entry corresponding to a
2350 section different from the one we're currently writing out, so record the
2351 (text) section this edit relates to here. */
2352 asection *linked_section;
2353 unsigned int index;
2354 struct arm_unwind_table_edit *next;
2355}
2356arm_unwind_table_edit;
2357
8e3de13a 2358typedef struct _arm_elf_section_data
e489d0ae 2359{
2468f9c9 2360 /* Information about mapping symbols. */
e489d0ae 2361 struct bfd_elf_section_data elf;
8e3de13a 2362 unsigned int mapcount;
c7b8f16e 2363 unsigned int mapsize;
e489d0ae 2364 elf32_arm_section_map *map;
2468f9c9 2365 /* Information about CPU errata. */
c7b8f16e
JB		 2366 unsigned int erratumcount;
2367 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2368 /* Information about unwind tables. */
2369 union
2370 {
2371 /* Unwind info attached to a text section. */
2372 struct
2373 {
2374 asection *arm_exidx_sec;
2375 } text;
2376
2377 /* Unwind info attached to an .ARM.exidx section. */
2378 struct
2379 {
2380 arm_unwind_table_edit *unwind_edit_list;
2381 arm_unwind_table_edit *unwind_edit_tail;
2382 } exidx;
2383 } u;
8e3de13a
NC		 2384}
2385_arm_elf_section_data;
e489d0ae
PB		 2386
2387#define elf32_arm_section_data(sec) \
8e3de13a 2388 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2389
48229727
JB		 2390/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2391 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2392 so may be created multiple times: we use an array of these entries whilst
2393 relaxing which we can refresh easily, then create stubs for each potentially
2394 erratum-triggering instruction once we've settled on a solution. */
2395
2396struct a8_erratum_fix {
2397 bfd *input_bfd;
2398 asection *section;
2399 bfd_vma offset;
2400 bfd_vma addend;
2401 unsigned long orig_insn;
2402 char *stub_name;
2403 enum elf32_arm_stub_type stub_type;
2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
2412 unsigned int r_type;
2413 unsigned char st_type;
2414 const char *sym_name;
2415 bfd_boolean non_a8_stub;
2416};
2417
ba93b8ac
DJ		 2418/* The size of the thread control block. */
2419#define TCB_SIZE 8
2420
0ffa91dd 2421struct elf_arm_obj_tdata
ba93b8ac
DJ		 2422{
2423 struct elf_obj_tdata root;
2424
2425 /* tls_type for each local got entry. */
2426 char *local_got_tls_type;
ee065d83 2427
bf21ed78
MS		 2428 /* Zero to warn when linking objects with incompatible enum sizes. */
2429 int no_enum_size_warning;
a9dc9481
JM		 2430
2431 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2432 int no_wchar_size_warning;
ba93b8ac
DJ		 2433};
2434
0ffa91dd
NC		 2435#define elf_arm_tdata(bfd) \
2436 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2437
0ffa91dd
NC		 2438#define elf32_arm_local_got_tls_type(bfd) \
2439 (elf_arm_tdata (bfd)->local_got_tls_type)
2440
2441#define is_arm_elf(bfd) \
2442 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2443 && elf_tdata (bfd) != NULL \
2444 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2445
2446static bfd_boolean
2447elf32_arm_mkobject (bfd *abfd)
2448{
0ffa91dd
NC		 2449 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2450 ARM_ELF_TDATA);
ba93b8ac
DJ		 2451}
2452
252b5132
RH		 2453/* The ARM linker needs to keep track of the number of relocs that it
2454 decides to copy in check_relocs for each symbol. This is so that
2455 it can discard PC relative relocs if it doesn't need them when
2456 linking with -Bsymbolic. We store the information in a field
2457 extending the regular ELF linker hash table. */
2458
ba93b8ac
DJ		 2459/* This structure keeps track of the number of relocs we have copied
2460 for a given symbol. */
5e681ec4 2461struct elf32_arm_relocs_copied
917583ad
NC		 2462 {
2463 /* Next section. */
5e681ec4 2464 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2465 /* A section in dynobj. */
2466 asection * section;
2467 /* Number of relocs copied in this section. */
2468 bfd_size_type count;
ba93b8ac
DJ		 2469 /* Number of PC-relative relocs copied in this section. */
2470 bfd_size_type pc_count;
917583ad 2471 };
252b5132 2472
ba93b8ac
DJ		 2473#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2474
ba96a88f 2475/* Arm ELF linker hash entry. */
252b5132 2476struct elf32_arm_link_hash_entry
917583ad
NC		 2477 {
2478 struct elf_link_hash_entry root;
252b5132 2479
917583ad 2480 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2481 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2482
2483 /* We reference count Thumb references to a PLT entry separately,
2484 so that we can emit the Thumb trampoline only if needed. */
2485 bfd_signed_vma plt_thumb_refcount;
2486
bd97cb95
DJ		 2487 /* Some references from Thumb code may be eliminated by BL->BLX
2488 conversion, so record them separately. */
2489 bfd_signed_vma plt_maybe_thumb_refcount;
2490
b7693d02
DJ		 2491 /* Since PLT entries have variable size if the Thumb prologue is
2492 used, we need to record the index into .got.plt instead of
2493 recomputing it from the PLT offset. */
2494 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2495
2496#define GOT_UNKNOWN 0
2497#define GOT_NORMAL 1
2498#define GOT_TLS_GD 2
2499#define GOT_TLS_IE 4
2500 unsigned char tls_type;
a4fd1a8e
PB		 2501
2502 /* The symbol marking the real symbol location for exported thumb
2503 symbols with Arm stubs. */
2504 struct elf_link_hash_entry *export_glue;
906e58ca 2505
da5938a2 2506 /* A pointer to the most recently used stub hash entry against this
8029a119 2507 symbol. */
da5938a2 2508 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2509 };
252b5132 2510
252b5132 2511/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2512#define elf32_arm_link_hash_traverse(table, func, info) \
2513 (elf_link_hash_traverse \
2514 (&(table)->root, \
b7693d02 2515 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2516 (info)))
2517
2518/* Get the ARM elf linker hash table from a link_info structure. */
2519#define elf32_arm_hash_table(info) \
2520 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2521
906e58ca
NC		 2522#define arm_stub_hash_lookup(table, string, create, copy) \
2523 ((struct elf32_arm_stub_hash_entry *) \
2524 bfd_hash_lookup ((table), (string), (create), (copy)))
2525
9b485d32 2526/* ARM ELF linker hash table. */
252b5132 2527struct elf32_arm_link_hash_table
906e58ca
NC		 2528{
2529 /* The main hash table. */
2530 struct elf_link_hash_table root;
252b5132 2531
906e58ca
NC		 2532 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2533 bfd_size_type thumb_glue_size;
252b5132 2534
906e58ca
NC		 2535 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2536 bfd_size_type arm_glue_size;
252b5132 2537
906e58ca
NC		 2538 /* The size in bytes of section containing the ARMv4 BX veneers. */
2539 bfd_size_type bx_glue_size;
845b51d6 2540
906e58ca
NC		 2541 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2542 veneer has been populated. */
2543 bfd_vma bx_glue_offset[15];
845b51d6 2544
906e58ca
NC		 2545 /* The size in bytes of the section containing glue for VFP11 erratum
2546 veneers. */
2547 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2548
48229727
JB		 2549 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2550 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2551 elf32_arm_write_section(). */
2552 struct a8_erratum_fix *a8_erratum_fixes;
2553 unsigned int num_a8_erratum_fixes;
2554
906e58ca
NC		 2555 /* An arbitrary input BFD chosen to hold the glue sections. */
2556 bfd * bfd_of_glue_owner;
ba96a88f 2557
906e58ca
NC		 2558 /* Nonzero to output a BE8 image. */
2559 int byteswap_code;
e489d0ae 2560
906e58ca
NC		 2561 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2562 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2563 int target1_is_rel;
9c504268 2564
906e58ca
NC		 2565 /* The relocation to use for R_ARM_TARGET2 relocations. */
2566 int target2_reloc;
eb043451 2567
906e58ca
NC		 2568 /* 0 = Ignore R_ARM_V4BX.
2569 1 = Convert BX to MOV PC.
2570 2 = Generate v4 interworing stubs. */
2571 int fix_v4bx;
319850b4 2572
48229727
JB		 2573 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2574 int fix_cortex_a8;
2575
906e58ca
NC		 2576 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2577 int use_blx;
33bfe774 2578
906e58ca
NC		 2579 /* What sort of code sequences we should look for which may trigger the
2580 VFP11 denorm erratum. */
2581 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2582
906e58ca
NC		 2583 /* Global counter for the number of fixes we have emitted. */
2584 int num_vfp11_fixes;
c7b8f16e 2585
906e58ca
NC		 2586 /* Nonzero to force PIC branch veneers. */
2587 int pic_veneer;
27e55c4d 2588
906e58ca
NC		 2589 /* The number of bytes in the initial entry in the PLT. */
2590 bfd_size_type plt_header_size;
e5a52504 2591
906e58ca
NC		 2592 /* The number of bytes in the subsequent PLT etries. */
2593 bfd_size_type plt_entry_size;
e5a52504 2594
906e58ca
NC		 2595 /* True if the target system is VxWorks. */
2596 int vxworks_p;
00a97672 2597
906e58ca
NC		 2598 /* True if the target system is Symbian OS. */
2599 int symbian_p;
e5a52504 2600
906e58ca
NC		 2601 /* True if the target uses REL relocations. */
2602 int use_rel;
4e7fd91e 2603
906e58ca
NC		 2604 /* Short-cuts to get to dynamic linker sections. */
2605 asection *sgot;
2606 asection *sgotplt;
2607 asection *srelgot;
2608 asection *splt;
2609 asection *srelplt;
2610 asection *sdynbss;
2611 asection *srelbss;
5e681ec4 2612
906e58ca
NC		 2613 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2614 asection *srelplt2;
00a97672 2615
906e58ca
NC		 2616 /* Data for R_ARM_TLS_LDM32 relocations. */
2617 union
2618 {
2619 bfd_signed_vma refcount;
2620 bfd_vma offset;
2621 } tls_ldm_got;
b7693d02 2622
87d72d41
AM		 2623 /* Small local sym cache. */
2624 struct sym_cache sym_cache;
906e58ca
NC		 2625
2626 /* For convenience in allocate_dynrelocs. */
2627 bfd * obfd;
2628
2629 /* The stub hash table. */
2630 struct bfd_hash_table stub_hash_table;
2631
2632 /* Linker stub bfd. */
2633 bfd *stub_bfd;
2634
2635 /* Linker call-backs. */
2636 asection * (*add_stub_section) (const char *, asection *);
2637 void (*layout_sections_again) (void);
2638
2639 /* Array to keep track of which stub sections have been created, and
2640 information on stub grouping. */
2641 struct map_stub
2642 {
2643 /* This is the section to which stubs in the group will be
2644 attached. */
2645 asection *link_sec;
2646 /* The stub section. */
2647 asection *stub_sec;
2648 } *stub_group;
2649
2650 /* Assorted information used by elf32_arm_size_stubs. */
2651 unsigned int bfd_count;
2652 int top_index;
2653 asection **input_list;
2654};
252b5132 2655
780a67af
NC		 2656/* Create an entry in an ARM ELF linker hash table. */
2657
2658static struct bfd_hash_entry *
57e8b36a
NC		 2659elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2660 struct bfd_hash_table * table,
2661 const char * string)
780a67af
NC		 2662{
2663 struct elf32_arm_link_hash_entry * ret =
2664 (struct elf32_arm_link_hash_entry *) entry;
2665
2666 /* Allocate the structure if it has not already been allocated by a
2667 subclass. */
906e58ca 2668 if (ret == NULL)
57e8b36a
NC		 2669 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2670 if (ret == NULL)
780a67af
NC		 2671 return (struct bfd_hash_entry *) ret;
2672
2673 /* Call the allocation method of the superclass. */
2674 ret = ((struct elf32_arm_link_hash_entry *)
2675 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2676 table, string));
57e8b36a 2677 if (ret != NULL)
b7693d02
DJ		 2678 {
2679 ret->relocs_copied = NULL;
ba93b8ac 2680 ret->tls_type = GOT_UNKNOWN;
b7693d02 2681 ret->plt_thumb_refcount = 0;
bd97cb95 2682 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2683 ret->plt_got_offset = -1;
a4fd1a8e 2684 ret->export_glue = NULL;
906e58ca
NC		 2685
2686 ret->stub_cache = NULL;
b7693d02 2687 }
780a67af
NC		 2688
2689 return (struct bfd_hash_entry *) ret;
2690}
2691
906e58ca
NC		 2692/* Initialize an entry in the stub hash table. */
2693
2694static struct bfd_hash_entry *
2695stub_hash_newfunc (struct bfd_hash_entry *entry,
2696 struct bfd_hash_table *table,
2697 const char *string)
2698{
2699 /* Allocate the structure if it has not already been allocated by a
2700 subclass. */
2701 if (entry == NULL)
2702 {
2703 entry = bfd_hash_allocate (table,
2704 sizeof (struct elf32_arm_stub_hash_entry));
2705 if (entry == NULL)
2706 return entry;
2707 }
2708
2709 /* Call the allocation method of the superclass. */
2710 entry = bfd_hash_newfunc (entry, table, string);
2711 if (entry != NULL)
2712 {
2713 struct elf32_arm_stub_hash_entry *eh;
2714
2715 /* Initialize the local fields. */
2716 eh = (struct elf32_arm_stub_hash_entry *) entry;
2717 eh->stub_sec = NULL;
2718 eh->stub_offset = 0;
2719 eh->target_value = 0;
2720 eh->target_section = NULL;
cedfb179
DK		 2721 eh->target_addend = 0;
2722 eh->orig_insn = 0;
906e58ca 2723 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2724 eh->stub_size = 0;
2725 eh->stub_template = NULL;
2726 eh->stub_template_size = 0;
906e58ca
NC		 2727 eh->h = NULL;
2728 eh->id_sec = NULL;
d8d2f433 2729 eh->output_name = NULL;
906e58ca
NC		 2730 }
2731
2732 return entry;
2733}
2734
00a97672 2735/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2736 shortcuts to them in our hash table. */
2737
2738static bfd_boolean
57e8b36a 2739create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2740{
2741 struct elf32_arm_link_hash_table *htab;
2742
e5a52504
MM		 2743 htab = elf32_arm_hash_table (info);
2744 /* BPABI objects never have a GOT, or associated sections. */
2745 if (htab->symbian_p)
2746 return TRUE;
2747
5e681ec4
PB		 2748 if (! _bfd_elf_create_got_section (dynobj, info))
2749 return FALSE;
2750
5e681ec4
PB		 2751 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2752 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2753 if (!htab->sgot || !htab->sgotplt)
2754 abort ();
2755
64e77c6d
L		 2756 htab->srelgot = bfd_get_section_by_name (dynobj,
2757 RELOC_SECTION (htab, ".got"));
2758 if (htab->srelgot == NULL)
5e681ec4
PB		 2759 return FALSE;
2760 return TRUE;
2761}
2762
00a97672
RS		 2763/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2764 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2765 hash table. */
2766
2767static bfd_boolean
57e8b36a 2768elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2769{
2770 struct elf32_arm_link_hash_table *htab;
2771
2772 htab = elf32_arm_hash_table (info);
2773 if (!htab->sgot && !create_got_section (dynobj, info))
2774 return FALSE;
2775
2776 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2777 return FALSE;
2778
2779 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2780 htab->srelplt = bfd_get_section_by_name (dynobj,
2781 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2782 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2783 if (!info->shared)
00a97672
RS		 2784 htab->srelbss = bfd_get_section_by_name (dynobj,
2785 RELOC_SECTION (htab, ".bss"));
2786
2787 if (htab->vxworks_p)
2788 {
2789 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2790 return FALSE;
2791
2792 if (info->shared)
2793 {
2794 htab->plt_header_size = 0;
2795 htab->plt_entry_size
2796 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2797 }
2798 else
2799 {
2800 htab->plt_header_size
2801 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2802 htab->plt_entry_size
2803 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2804 }
2805 }
5e681ec4 2806
906e58ca 2807 if (!htab->splt
e5a52504
MM		 2808 || !htab->srelplt
2809 || !htab->sdynbss
5e681ec4
PB		 2810 || (!info->shared && !htab->srelbss))
2811 abort ();
2812
2813 return TRUE;
2814}
2815
906e58ca
NC		 2816/* Copy the extra info we tack onto an elf_link_hash_entry. */
2817
2818static void
2819elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2820 struct elf_link_hash_entry *dir,
2821 struct elf_link_hash_entry *ind)
2822{
2823 struct elf32_arm_link_hash_entry *edir, *eind;
2824
2825 edir = (struct elf32_arm_link_hash_entry *) dir;
2826 eind = (struct elf32_arm_link_hash_entry *) ind;
2827
2828 if (eind->relocs_copied != NULL)
2829 {
2830 if (edir->relocs_copied != NULL)
2831 {
2832 struct elf32_arm_relocs_copied **pp;
2833 struct elf32_arm_relocs_copied *p;
2834
2835 /* Add reloc counts against the indirect sym to the direct sym
2836 list. Merge any entries against the same section. */
2837 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2838 {
2839 struct elf32_arm_relocs_copied *q;
2840
2841 for (q = edir->relocs_copied; q != NULL; q = q->next)
2842 if (q->section == p->section)
2843 {
2844 q->pc_count += p->pc_count;
2845 q->count += p->count;
2846 *pp = p->next;
2847 break;
2848 }
2849 if (q == NULL)
2850 pp = &p->next;
2851 }
2852 *pp = edir->relocs_copied;
2853 }
2854
2855 edir->relocs_copied = eind->relocs_copied;
2856 eind->relocs_copied = NULL;
2857 }
2858
2859 if (ind->root.type == bfd_link_hash_indirect)
2860 {
2861 /* Copy over PLT info. */
2862 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2863 eind->plt_thumb_refcount = 0;
2864 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2865 eind->plt_maybe_thumb_refcount = 0;
2866
2867 if (dir->got.refcount <= 0)
2868 {
2869 edir->tls_type = eind->tls_type;
2870 eind->tls_type = GOT_UNKNOWN;
2871 }
2872 }
2873
2874 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2875}
2876
2877/* Create an ARM elf linker hash table. */
2878
2879static struct bfd_link_hash_table *
2880elf32_arm_link_hash_table_create (bfd *abfd)
2881{
2882 struct elf32_arm_link_hash_table *ret;
2883 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2884
2885 ret = bfd_malloc (amt);
2886 if (ret == NULL)
2887 return NULL;
2888
2889 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2890 elf32_arm_link_hash_newfunc,
2891 sizeof (struct elf32_arm_link_hash_entry)))
2892 {
2893 free (ret);
2894 return NULL;
2895 }
2896
2897 ret->sgot = NULL;
2898 ret->sgotplt = NULL;
2899 ret->srelgot = NULL;
2900 ret->splt = NULL;
2901 ret->srelplt = NULL;
2902 ret->sdynbss = NULL;
2903 ret->srelbss = NULL;
2904 ret->srelplt2 = NULL;
2905 ret->thumb_glue_size = 0;
2906 ret->arm_glue_size = 0;
2907 ret->bx_glue_size = 0;
2908 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2909 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2910 ret->vfp11_erratum_glue_size = 0;
2911 ret->num_vfp11_fixes = 0;
48229727 2912 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2913 ret->bfd_of_glue_owner = NULL;
2914 ret->byteswap_code = 0;
2915 ret->target1_is_rel = 0;
2916 ret->target2_reloc = R_ARM_NONE;
2917#ifdef FOUR_WORD_PLT
2918 ret->plt_header_size = 16;
2919 ret->plt_entry_size = 16;
2920#else
2921 ret->plt_header_size = 20;
2922 ret->plt_entry_size = 12;
2923#endif
2924 ret->fix_v4bx = 0;
2925 ret->use_blx = 0;
2926 ret->vxworks_p = 0;
2927 ret->symbian_p = 0;
2928 ret->use_rel = 1;
87d72d41 2929 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2930 ret->obfd = abfd;
2931 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2932 ret->stub_bfd = NULL;
2933 ret->add_stub_section = NULL;
2934 ret->layout_sections_again = NULL;
2935 ret->stub_group = NULL;
2936 ret->bfd_count = 0;
2937 ret->top_index = 0;
2938 ret->input_list = NULL;
906e58ca
NC		 2939
2940 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2941 sizeof (struct elf32_arm_stub_hash_entry)))
2942 {
2943 free (ret);
2944 return NULL;
2945 }
2946
2947 return &ret->root.root;
2948}
2949
2950/* Free the derived linker hash table. */
2951
2952static void
2953elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2954{
2955 struct elf32_arm_link_hash_table *ret
2956 = (struct elf32_arm_link_hash_table *) hash;
2957
2958 bfd_hash_table_free (&ret->stub_hash_table);
2959 _bfd_generic_link_hash_table_free (hash);
2960}
2961
2962/* Determine if we're dealing with a Thumb only architecture. */
2963
2964static bfd_boolean
2965using_thumb_only (struct elf32_arm_link_hash_table *globals)
2966{
2967 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2968 Tag_CPU_arch);
2969 int profile;
2970
2971 if (arch != TAG_CPU_ARCH_V7)
2972 return FALSE;
2973
2974 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2975 Tag_CPU_arch_profile);
2976
2977 return profile == 'M';
2978}
2979
2980/* Determine if we're dealing with a Thumb-2 object. */
2981
2982static bfd_boolean
2983using_thumb2 (struct elf32_arm_link_hash_table *globals)
2984{
2985 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2986 Tag_CPU_arch);
2987 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2988}
2989
cd1dac3d
DG		 2990/* Determine what kind of NOPs are available. */
2991
2992static bfd_boolean
2993arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
2994{
2995 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2996 Tag_CPU_arch);
2997 return arch == TAG_CPU_ARCH_V6T2
2998 || arch == TAG_CPU_ARCH_V6K
2999 || arch == TAG_CPU_ARCH_V7;
3000}
3001
3002static bfd_boolean
3003arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3004{
3005 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3006 Tag_CPU_arch);
3007 return arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7;
3008}
3009
f4ac8484
DJ		 3010static bfd_boolean
3011arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3012{
3013 switch (stub_type)
3014 {
fea2b4d6
CL		 3015 case arm_stub_long_branch_thumb_only:
3016 case arm_stub_long_branch_v4t_thumb_arm:
3017 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3018 case arm_stub_long_branch_v4t_thumb_arm_pic:
3019 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3020 return TRUE;
3021 case arm_stub_none:
3022 BFD_FAIL ();
3023 return FALSE;
3024 break;
3025 default:
3026 return FALSE;
3027 }
3028}
3029
906e58ca
NC		 3030/* Determine the type of stub needed, if any, for a call. */
3031
3032static enum elf32_arm_stub_type
3033arm_type_of_stub (struct bfd_link_info *info,
3034 asection *input_sec,
3035 const Elf_Internal_Rela *rel,
3036 unsigned char st_type,
3037 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3038 bfd_vma destination,
3039 asection *sym_sec,
3040 bfd *input_bfd,
3041 const char *name)
906e58ca
NC		 3042{
3043 bfd_vma location;
3044 bfd_signed_vma branch_offset;
3045 unsigned int r_type;
3046 struct elf32_arm_link_hash_table * globals;
3047 int thumb2;
3048 int thumb_only;
3049 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3050 int use_plt = 0;
906e58ca 3051
da5938a2 3052 /* We don't know the actual type of destination in case it is of
8029a119 3053 type STT_SECTION: give up. */
da5938a2
NC		 3054 if (st_type == STT_SECTION)
3055 return stub_type;
3056
906e58ca
NC		 3057 globals = elf32_arm_hash_table (info);
3058
3059 thumb_only = using_thumb_only (globals);
3060
3061 thumb2 = using_thumb2 (globals);
3062
3063 /* Determine where the call point is. */
3064 location = (input_sec->output_offset
3065 + input_sec->output_section->vma
3066 + rel->r_offset);
3067
3068 branch_offset = (bfd_signed_vma)(destination - location);
3069
3070 r_type = ELF32_R_TYPE (rel->r_info);
3071
5fa9e92f 3072 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3073 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3074 {
3075 use_plt = 1;
3076 /* Note when dealing with PLT entries: the main PLT stub is in
3077 ARM mode, so if the branch is in Thumb mode, another
3078 Thumb->ARM stub will be inserted later just before the ARM
3079 PLT stub. We don't take this extra distance into account
3080 here, because if a long branch stub is needed, we'll add a
3081 Thumb->Arm one and branch directly to the ARM PLT entry
3082 because it avoids spreading offset corrections in several
3083 places. */
3084 }
906e58ca 3085
155d87d7 3086 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3087 {
5fa9e92f
CL		 3088 /* Handle cases where:
3089 - this call goes too far (different Thumb/Thumb2 max
3090 distance)
155d87d7
CL		 3091 - it's a Thumb->Arm call and blx is not available, or it's a
3092 Thumb->Arm branch (not bl). A stub is needed in this case,
3093 but only if this call is not through a PLT entry. Indeed,
3094 PLT stubs handle mode switching already.
5fa9e92f 3095 */
906e58ca
NC		 3096 if ((!thumb2
3097 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3098 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3099 || (thumb2
3100 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3101 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3102 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3103 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3104 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3105 && !use_plt))
906e58ca
NC		 3106 {
3107 if (st_type == STT_ARM_TFUNC)
3108 {
3109 /* Thumb to thumb. */
3110 if (!thumb_only)
3111 {
3112 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3113 /* PIC stubs. */
155d87d7
CL		 3114 ? ((globals->use_blx
3115 && (r_type ==R_ARM_THM_CALL))
3116 /* V5T and above. Stub starts with ARM code, so
3117 we must be able to switch mode before
3118 reaching it, which is only possible for 'bl'
3119 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3120 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3121 /* On V4T, use Thumb code only. */
d3626fb0 3122 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3123
3124 /* non-PIC stubs. */
155d87d7
CL		 3125 : ((globals->use_blx
3126 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3127 /* V5T and above. */
3128 ? arm_stub_long_branch_any_any
3129 /* V4T. */
d3626fb0 3130 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3131 }
3132 else
3133 {
3134 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3135 /* PIC stub. */
3136 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3137 /* non-PIC stub. */
3138 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3139 }
3140 }
3141 else
3142 {
3143 /* Thumb to arm. */
c820be07
NC		 3144 if (sym_sec != NULL
3145 && sym_sec->owner != NULL
3146 && !INTERWORK_FLAG (sym_sec->owner))
3147 {
3148 (*_bfd_error_handler)
3149 (_("%B(%s): warning: interworking not enabled.\n"
3150 " first occurrence: %B: Thumb call to ARM"),
3151 sym_sec->owner, input_bfd, name);
3152 }
3153
906e58ca 3154 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3155 /* PIC stubs. */
155d87d7
CL		 3156 ? ((globals->use_blx
3157 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3158 /* V5T and above. */
cf3eccff 3159 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3160 /* V4T PIC stub. */
3161 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3162
3163 /* non-PIC stubs. */
155d87d7
CL		 3164 : ((globals->use_blx
3165 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3166 /* V5T and above. */
3167 ? arm_stub_long_branch_any_any
3168 /* V4T. */
3169 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3170
3171 /* Handle v4t short branches. */
fea2b4d6 3172 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3173 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3174 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3175 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3176 }
3177 }
3178 }
155d87d7 3179 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3180 {
3181 if (st_type == STT_ARM_TFUNC)
3182 {
3183 /* Arm to thumb. */
c820be07
NC		 3184
3185 if (sym_sec != NULL
3186 && sym_sec->owner != NULL
3187 && !INTERWORK_FLAG (sym_sec->owner))
3188 {
3189 (*_bfd_error_handler)
3190 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3191 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3192 sym_sec->owner, input_bfd, name);
3193 }
3194
3195 /* We have an extra 2-bytes reach because of
3196 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3197 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3198 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3199 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3200 || (r_type == R_ARM_JUMP24)
3201 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3202 {
3203 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3204 /* PIC stubs. */
ebe24dd4
CL		 3205 ? ((globals->use_blx)
3206 /* V5T and above. */
3207 ? arm_stub_long_branch_any_thumb_pic
3208 /* V4T stub. */
3209 : arm_stub_long_branch_v4t_arm_thumb_pic)
3210
c2b4a39d
CL		 3211 /* non-PIC stubs. */
3212 : ((globals->use_blx)
3213 /* V5T and above. */
3214 ? arm_stub_long_branch_any_any
3215 /* V4T. */
3216 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3217 }
3218 }
3219 else
3220 {
3221 /* Arm to arm. */
3222 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3223 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3224 {
3225 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3226 /* PIC stubs. */
cf3eccff 3227 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3228 /* non-PIC stubs. */
fea2b4d6 3229 : arm_stub_long_branch_any_any;
906e58ca
NC		 3230 }
3231 }
3232 }
3233
3234 return stub_type;
3235}
3236
3237/* Build a name for an entry in the stub hash table. */
3238
3239static char *
3240elf32_arm_stub_name (const asection *input_section,
3241 const asection *sym_sec,
3242 const struct elf32_arm_link_hash_entry *hash,
3243 const Elf_Internal_Rela *rel)
3244{
3245 char *stub_name;
3246 bfd_size_type len;
3247
3248 if (hash)
3249 {
3250 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3251 stub_name = bfd_malloc (len);
3252 if (stub_name != NULL)
3253 sprintf (stub_name, "%08x_%s+%x",
3254 input_section->id & 0xffffffff,
3255 hash->root.root.root.string,
3256 (int) rel->r_addend & 0xffffffff);
3257 }
3258 else
3259 {
3260 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3261 stub_name = bfd_malloc (len);
3262 if (stub_name != NULL)
3263 sprintf (stub_name, "%08x_%x:%x+%x",
3264 input_section->id & 0xffffffff,
3265 sym_sec->id & 0xffffffff,
3266 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3267 (int) rel->r_addend & 0xffffffff);
3268 }
3269
3270 return stub_name;
3271}
3272
3273/* Look up an entry in the stub hash. Stub entries are cached because
3274 creating the stub name takes a bit of time. */
3275
3276static struct elf32_arm_stub_hash_entry *
3277elf32_arm_get_stub_entry (const asection *input_section,
3278 const asection *sym_sec,
3279 struct elf_link_hash_entry *hash,
3280 const Elf_Internal_Rela *rel,
3281 struct elf32_arm_link_hash_table *htab)
3282{
3283 struct elf32_arm_stub_hash_entry *stub_entry;
3284 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3285 const asection *id_sec;
3286
3287 if ((input_section->flags & SEC_CODE) == 0)
3288 return NULL;
3289
3290 /* If this input section is part of a group of sections sharing one
3291 stub section, then use the id of the first section in the group.
3292 Stub names need to include a section id, as there may well be
3293 more than one stub used to reach say, printf, and we need to
3294 distinguish between them. */
3295 id_sec = htab->stub_group[input_section->id].link_sec;
3296
3297 if (h != NULL && h->stub_cache != NULL
3298 && h->stub_cache->h == h
3299 && h->stub_cache->id_sec == id_sec)
3300 {
3301 stub_entry = h->stub_cache;
3302 }
3303 else
3304 {
3305 char *stub_name;
3306
3307 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3308 if (stub_name == NULL)
3309 return NULL;
3310
3311 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3312 stub_name, FALSE, FALSE);
3313 if (h != NULL)
3314 h->stub_cache = stub_entry;
3315
3316 free (stub_name);
3317 }
3318
3319 return stub_entry;
3320}
3321
48229727
JB		 3322/* Find or create a stub section. Returns a pointer to the stub section, and
3323 the section to which the stub section will be attached (in *LINK_SEC_P).
3324 LINK_SEC_P may be NULL. */
906e58ca 3325
48229727
JB		 3326static asection *
3327elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3328 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3329{
3330 asection *link_sec;
3331 asection *stub_sec;
906e58ca
NC		 3332
3333 link_sec = htab->stub_group[section->id].link_sec;
3334 stub_sec = htab->stub_group[section->id].stub_sec;
3335 if (stub_sec == NULL)
3336 {
3337 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3338 if (stub_sec == NULL)
3339 {
3340 size_t namelen;
3341 bfd_size_type len;
3342 char *s_name;
3343
3344 namelen = strlen (link_sec->name);
3345 len = namelen + sizeof (STUB_SUFFIX);
3346 s_name = bfd_alloc (htab->stub_bfd, len);
3347 if (s_name == NULL)
3348 return NULL;
3349
3350 memcpy (s_name, link_sec->name, namelen);
3351 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3352 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3353 if (stub_sec == NULL)
3354 return NULL;
3355 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3356 }
3357 htab->stub_group[section->id].stub_sec = stub_sec;
3358 }
48229727
JB		 3359
3360 if (link_sec_p)
3361 *link_sec_p = link_sec;
3362
3363 return stub_sec;
3364}
3365
3366/* Add a new stub entry to the stub hash. Not all fields of the new
3367 stub entry are initialised. */
3368
3369static struct elf32_arm_stub_hash_entry *
3370elf32_arm_add_stub (const char *stub_name,
3371 asection *section,
3372 struct elf32_arm_link_hash_table *htab)
3373{
3374 asection *link_sec;
3375 asection *stub_sec;
3376 struct elf32_arm_stub_hash_entry *stub_entry;
3377
3378 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3379 if (stub_sec == NULL)
3380 return NULL;
906e58ca
NC		 3381
3382 /* Enter this entry into the linker stub hash table. */
3383 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3384 TRUE, FALSE);
3385 if (stub_entry == NULL)
3386 {
3387 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3388 section->owner,
3389 stub_name);
3390 return NULL;
3391 }
3392
3393 stub_entry->stub_sec = stub_sec;
3394 stub_entry->stub_offset = 0;
3395 stub_entry->id_sec = link_sec;
3396
906e58ca
NC		 3397 return stub_entry;
3398}
3399
3400/* Store an Arm insn into an output section not processed by
3401 elf32_arm_write_section. */
3402
3403static void
8029a119
NC		 3404put_arm_insn (struct elf32_arm_link_hash_table * htab,
3405 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3406{
3407 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3408 bfd_putl32 (val, ptr);
3409 else
3410 bfd_putb32 (val, ptr);
3411}
3412
3413/* Store a 16-bit Thumb insn into an output section not processed by
3414 elf32_arm_write_section. */
3415
3416static void
8029a119
NC		 3417put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3418 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3419{
3420 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3421 bfd_putl16 (val, ptr);
3422 else
3423 bfd_putb16 (val, ptr);
3424}
3425
48229727
JB		 3426static bfd_reloc_status_type elf32_arm_final_link_relocate
3427 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3428 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3429 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3430
906e58ca
NC		 3431static bfd_boolean
3432arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3433 void * in_arg)
3434{
48229727 3435#define MAXRELOCS 2
906e58ca
NC		 3436 struct elf32_arm_stub_hash_entry *stub_entry;
3437 struct bfd_link_info *info;
3438 struct elf32_arm_link_hash_table *htab;
3439 asection *stub_sec;
3440 bfd *stub_bfd;
3441 bfd_vma stub_addr;
3442 bfd_byte *loc;
3443 bfd_vma sym_value;
3444 int template_size;
3445 int size;
461a49ca 3446 const insn_sequence *template;
906e58ca
NC		 3447 int i;
3448 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3449 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3450 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3451 int nrelocs = 0;
906e58ca
NC		 3452
3453 /* Massage our args to the form they really have. */
3454 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3455 info = (struct bfd_link_info *) in_arg;
3456
3457 globals = elf32_arm_hash_table (info);
3458
3459 htab = elf32_arm_hash_table (info);
3460 stub_sec = stub_entry->stub_sec;
3461
eb7c4339
NS		 3462 if ((htab->fix_cortex_a8 < 0)
3463 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3464 /* We have to do the a8 fixes last, as they are less aligned than
3465 the other veneers. */
3466 return TRUE;
3467
906e58ca
NC		 3468 /* Make a note of the offset within the stubs for this entry. */
3469 stub_entry->stub_offset = stub_sec->size;
3470 loc = stub_sec->contents + stub_entry->stub_offset;
3471
3472 stub_bfd = stub_sec->owner;
3473
3474 /* This is the address of the start of the stub. */
3475 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3476 + stub_entry->stub_offset;
3477
3478 /* This is the address of the stub destination. */
3479 sym_value = (stub_entry->target_value
3480 + stub_entry->target_section->output_offset
3481 + stub_entry->target_section->output_section->vma);
3482
461a49ca
DJ		 3483 template = stub_entry->stub_template;
3484 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3485
3486 size = 0;
461a49ca 3487 for (i = 0; i < template_size; i++)
906e58ca 3488 {
4e31c731 3489 switch (template[i].type)
461a49ca
DJ		 3490 {
3491 case THUMB16_TYPE:
48229727
JB		 3492 {
3493 bfd_vma data = template[i].data;
3494 if (template[i].reloc_addend != 0)
3495 {
3496 /* We've borrowed the reloc_addend field to mean we should
3497 insert a condition code into this (Thumb-1 branch)
3498 instruction. See THUMB16_BCOND_INSN. */
3499 BFD_ASSERT ((data & 0xff00) == 0xd000);
3500 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3501 }
3502 put_thumb_insn (globals, stub_bfd, data, loc + size);
3503 size += 2;
3504 }
461a49ca 3505 break;
906e58ca 3506
48229727
JB		 3507 case THUMB32_TYPE:
3508 put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
3509 loc + size);
3510 put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
3511 loc + size + 2);
3512 if (template[i].r_type != R_ARM_NONE)
3513 {
3514 stub_reloc_idx[nrelocs] = i;
3515 stub_reloc_offset[nrelocs++] = size;
3516 }
3517 size += 4;
3518 break;
3519
461a49ca
DJ		 3520 case ARM_TYPE:
3521 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3522 /* Handle cases where the target is encoded within the
3523 instruction. */
ebe24dd4 3524 if (template[i].r_type == R_ARM_JUMP24)
461a49ca 3525 {
48229727
JB		 3526 stub_reloc_idx[nrelocs] = i;
3527 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3528 }
3529 size += 4;
3530 break;
3531
3532 case DATA_TYPE:
3533 bfd_put_32 (stub_bfd, template[i].data, loc + size);
48229727
JB		 3534 stub_reloc_idx[nrelocs] = i;
3535 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3536 size += 4;
3537 break;
3538
3539 default:
3540 BFD_FAIL ();
3541 return FALSE;
3542 }
906e58ca 3543 }
461a49ca 3544
906e58ca
NC		 3545 stub_sec->size += size;
3546
461a49ca
DJ		 3547 /* Stub size has already been computed in arm_size_one_stub. Check
3548 consistency. */
3549 BFD_ASSERT (size == stub_entry->stub_size);
3550
906e58ca
NC		 3551 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3552 if (stub_entry->st_type == STT_ARM_TFUNC)
3553 sym_value |= 1;
3554
48229727
JB		 3555 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3556 in each stub. */
3557 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3558
48229727
JB		 3559 for (i = 0; i < nrelocs; i++)
3560 if (template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3561 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3562 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3563 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3564 {
3565 Elf_Internal_Rela rel;
3566 bfd_boolean unresolved_reloc;
3567 char *error_message;
3568 int sym_flags
3569 = (template[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3570 ? STT_ARM_TFUNC : 0;
3571 bfd_vma points_to = sym_value + stub_entry->target_addend;
3572
3573 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3574 rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].r_type);
3575 rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
3576
3577 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3578 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3579 template should refer back to the instruction after the original
3580 branch. */
3581 points_to = sym_value;
3582
33c6a8fc
JB		 3583 /* There may be unintended consequences if this is not true. */
3584 BFD_ASSERT (stub_entry->h == NULL);
3585
48229727
JB		 3586 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3587 properly. We should probably use this function unconditionally,
3588 rather than only for certain relocations listed in the enclosing
3589 conditional, for the sake of consistency. */
3590 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3591 (template[stub_reloc_idx[i]].r_type),
3592 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3593 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3594 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3595 &error_message);
3596 }
3597 else
3598 {
3599 _bfd_final_link_relocate (elf32_arm_howto_from_type
3600 (template[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
3601 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3602 sym_value + stub_entry->target_addend,
3603 template[stub_reloc_idx[i]].reloc_addend);
3604 }
906e58ca
NC		 3605
3606 return TRUE;
48229727 3607#undef MAXRELOCS
906e58ca
NC		 3608}
3609
48229727
JB		 3610/* Calculate the template, template size and instruction size for a stub.
3611 Return value is the instruction size. */
906e58ca 3612
48229727
JB		 3613static unsigned int
3614find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3615 const insn_sequence **stub_template,
3616 int *stub_template_size)
906e58ca 3617{
48229727
JB		 3618 const insn_sequence *template = NULL;
3619 int template_size = 0, i;
3620 unsigned int size;
906e58ca 3621
48229727
JB		 3622 template = stub_definitions[stub_type].template;
3623 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3624
3625 size = 0;
461a49ca
DJ		 3626 for (i = 0; i < template_size; i++)
3627 {
4e31c731 3628 switch (template[i].type)
461a49ca
DJ		 3629 {
3630 case THUMB16_TYPE:
3631 size += 2;
3632 break;
3633
3634 case ARM_TYPE:
48229727 3635 case THUMB32_TYPE:
461a49ca
DJ		 3636 case DATA_TYPE:
3637 size += 4;
3638 break;
3639
3640 default:
3641 BFD_FAIL ();
3642 return FALSE;
3643 }
3644 }
3645
48229727
JB		 3646 if (stub_template)
3647 *stub_template = template;
3648
3649 if (stub_template_size)
3650 *stub_template_size = template_size;
3651
3652 return size;
3653}
3654
3655/* As above, but don't actually build the stub. Just bump offset so
3656 we know stub section sizes. */
3657
3658static bfd_boolean
3659arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3660 void * in_arg)
3661{
3662 struct elf32_arm_stub_hash_entry *stub_entry;
3663 struct elf32_arm_link_hash_table *htab;
3664 const insn_sequence *template;
3665 int template_size, size;
3666
3667 /* Massage our args to the form they really have. */
3668 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3669 htab = (struct elf32_arm_link_hash_table *) in_arg;
3670
3671 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3672 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3673
3674 size = find_stub_size_and_template (stub_entry->stub_type, &template,
3675 &template_size);
3676
461a49ca
DJ		 3677 stub_entry->stub_size = size;
3678 stub_entry->stub_template = template;
3679 stub_entry->stub_template_size = template_size;
3680
906e58ca
NC		 3681 size = (size + 7) & ~7;
3682 stub_entry->stub_sec->size += size;
461a49ca 3683
906e58ca
NC		 3684 return TRUE;
3685}
3686
3687/* External entry points for sizing and building linker stubs. */
3688
3689/* Set up various things so that we can make a list of input sections
3690 for each output section included in the link. Returns -1 on error,
3691 0 when no stubs will be needed, and 1 on success. */
3692
3693int
3694elf32_arm_setup_section_lists (bfd *output_bfd,
3695 struct bfd_link_info *info)
3696{
3697 bfd *input_bfd;
3698 unsigned int bfd_count;
3699 int top_id, top_index;
3700 asection *section;
3701 asection **input_list, **list;
3702 bfd_size_type amt;
3703 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3704
3705 if (! is_elf_hash_table (htab))
3706 return 0;
3707
3708 /* Count the number of input BFDs and find the top input section id. */
3709 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3710 input_bfd != NULL;
3711 input_bfd = input_bfd->link_next)
3712 {
3713 bfd_count += 1;
3714 for (section = input_bfd->sections;
3715 section != NULL;
3716 section = section->next)
3717 {
3718 if (top_id < section->id)
3719 top_id = section->id;
3720 }
3721 }
3722 htab->bfd_count = bfd_count;
3723
3724 amt = sizeof (struct map_stub) * (top_id + 1);
3725 htab->stub_group = bfd_zmalloc (amt);
3726 if (htab->stub_group == NULL)
3727 return -1;
3728
3729 /* We can't use output_bfd->section_count here to find the top output
3730 section index as some sections may have been removed, and
3731 _bfd_strip_section_from_output doesn't renumber the indices. */
3732 for (section = output_bfd->sections, top_index = 0;
3733 section != NULL;
3734 section = section->next)
3735 {
3736 if (top_index < section->index)
3737 top_index = section->index;
3738 }
3739
3740 htab->top_index = top_index;
3741 amt = sizeof (asection *) * (top_index + 1);
3742 input_list = bfd_malloc (amt);
3743 htab->input_list = input_list;
3744 if (input_list == NULL)
3745 return -1;
3746
3747 /* For sections we aren't interested in, mark their entries with a
3748 value we can check later. */
3749 list = input_list + top_index;
3750 do
3751 *list = bfd_abs_section_ptr;
3752 while (list-- != input_list);
3753
3754 for (section = output_bfd->sections;
3755 section != NULL;
3756 section = section->next)
3757 {
3758 if ((section->flags & SEC_CODE) != 0)
3759 input_list[section->index] = NULL;
3760 }
3761
3762 return 1;
3763}
3764
3765/* The linker repeatedly calls this function for each input section,
3766 in the order that input sections are linked into output sections.
3767 Build lists of input sections to determine groupings between which
3768 we may insert linker stubs. */
3769
3770void
3771elf32_arm_next_input_section (struct bfd_link_info *info,
3772 asection *isec)
3773{
3774 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3775
3776 if (isec->output_section->index <= htab->top_index)
3777 {
3778 asection **list = htab->input_list + isec->output_section->index;
3779
3780 if (*list != bfd_abs_section_ptr)
3781 {
3782 /* Steal the link_sec pointer for our list. */
3783#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3784 /* This happens to make the list in reverse order,
07d72278 3785 which we reverse later. */
906e58ca
NC		 3786 PREV_SEC (isec) = *list;
3787 *list = isec;
3788 }
3789 }
3790}
3791
3792/* See whether we can group stub sections together. Grouping stub
3793 sections may result in fewer stubs. More importantly, we need to
07d72278 3794 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3795 .fini output sections respectively, because glibc splits the
3796 _init and _fini functions into multiple parts. Putting a stub in
3797 the middle of a function is not a good idea. */
3798
3799static void
3800group_sections (struct elf32_arm_link_hash_table *htab,
3801 bfd_size_type stub_group_size,
07d72278 3802 bfd_boolean stubs_always_after_branch)
906e58ca 3803{
07d72278 3804 asection **list = htab->input_list;
906e58ca
NC		 3805
3806 do
3807 {
3808 asection *tail = *list;
07d72278 3809 asection *head;
906e58ca
NC		 3810
3811 if (tail == bfd_abs_section_ptr)
3812 continue;
3813
07d72278
DJ		 3814 /* Reverse the list: we must avoid placing stubs at the
3815 beginning of the section because the beginning of the text
3816 section may be required for an interrupt vector in bare metal
3817 code. */
3818#define NEXT_SEC PREV_SEC
e780aef2
CL		 3819 head = NULL;
3820 while (tail != NULL)
3821 {
3822 /* Pop from tail. */
3823 asection *item = tail;
3824 tail = PREV_SEC (item);
3825
3826 /* Push on head. */
3827 NEXT_SEC (item) = head;
3828 head = item;
3829 }
07d72278
DJ		 3830
3831 while (head != NULL)
906e58ca
NC		 3832 {
3833 asection *curr;
07d72278 3834 asection *next;
e780aef2
CL		 3835 bfd_vma stub_group_start = head->output_offset;
3836 bfd_vma end_of_next;
906e58ca 3837
07d72278 3838 curr = head;
e780aef2 3839 while (NEXT_SEC (curr) != NULL)
8cd931b7 3840 {
e780aef2
CL		 3841 next = NEXT_SEC (curr);
3842 end_of_next = next->output_offset + next->size;
3843 if (end_of_next - stub_group_start >= stub_group_size)
3844 /* End of NEXT is too far from start, so stop. */
8cd931b7 3845 break;
e780aef2
CL		 3846 /* Add NEXT to the group. */
3847 curr = next;
8cd931b7 3848 }
906e58ca 3849
07d72278 3850 /* OK, the size from the start to the start of CURR is less
906e58ca 3851 than stub_group_size and thus can be handled by one stub
07d72278 3852 section. (Or the head section is itself larger than
906e58ca
NC		 3853 stub_group_size, in which case we may be toast.)
3854 We should really be keeping track of the total size of
3855 stubs added here, as stubs contribute to the final output
7fb9f789 3856 section size. */
906e58ca
NC		 3857 do
3858 {
07d72278 3859 next = NEXT_SEC (head);
906e58ca 3860 /* Set up this stub group. */
07d72278 3861 htab->stub_group[head->id].link_sec = curr;
906e58ca 3862 }
07d72278 3863 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3864
3865 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3866 bytes after the stub section can be handled by it too. */
3867 if (!stubs_always_after_branch)
906e58ca 3868 {
e780aef2
CL		 3869 stub_group_start = curr->output_offset + curr->size;
3870
8cd931b7 3871 while (next != NULL)
906e58ca 3872 {
e780aef2
CL		 3873 end_of_next = next->output_offset + next->size;
3874 if (end_of_next - stub_group_start >= stub_group_size)
3875 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3876 break;
e780aef2 3877 /* Add NEXT to the stub group. */
07d72278
DJ		 3878 head = next;
3879 next = NEXT_SEC (head);
3880 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3881 }
3882 }
07d72278 3883 head = next;
906e58ca
NC		 3884 }
3885 }
07d72278 3886 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3887
3888 free (htab->input_list);
3889#undef PREV_SEC
07d72278 3890#undef NEXT_SEC
906e58ca
NC		 3891}
3892
48229727
JB		 3893/* Comparison function for sorting/searching relocations relating to Cortex-A8
3894 erratum fix. */
3895
3896static int
3897a8_reloc_compare (const void *a, const void *b)
3898{
3899 const struct a8_erratum_reloc *ra = a, *rb = b;
3900
3901 if (ra->from < rb->from)
3902 return -1;
3903 else if (ra->from > rb->from)
3904 return 1;
3905 else
3906 return 0;
3907}
3908
3909static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3910 const char *, char **);
3911
3912/* Helper function to scan code for sequences which might trigger the Cortex-A8
3913 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3914 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3915 otherwise. */
3916
81694485
NC		 3917static bfd_boolean
3918cortex_a8_erratum_scan (bfd *input_bfd,
3919 struct bfd_link_info *info,
48229727
JB		 3920 struct a8_erratum_fix **a8_fixes_p,
3921 unsigned int *num_a8_fixes_p,
3922 unsigned int *a8_fix_table_size_p,
3923 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3924 unsigned int num_a8_relocs,
3925 unsigned prev_num_a8_fixes,
3926 bfd_boolean *stub_changed_p)
48229727
JB		 3927{
3928 asection *section;
3929 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3930 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3931 unsigned int num_a8_fixes = *num_a8_fixes_p;
3932 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3933
3934 for (section = input_bfd->sections;
3935 section != NULL;
3936 section = section->next)
3937 {
3938 bfd_byte *contents = NULL;
3939 struct _arm_elf_section_data *sec_data;
3940 unsigned int span;
3941 bfd_vma base_vma;
3942
3943 if (elf_section_type (section) != SHT_PROGBITS
3944 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3945 || (section->flags & SEC_EXCLUDE) != 0
3946 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3947 || (section->output_section == bfd_abs_section_ptr))
3948 continue;
3949
3950 base_vma = section->output_section->vma + section->output_offset;
3951
3952 if (elf_section_data (section)->this_hdr.contents != NULL)
3953 contents = elf_section_data (section)->this_hdr.contents;
3954 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 3955 return TRUE;
48229727
JB		 3956
3957 sec_data = elf32_arm_section_data (section);
3958
3959 for (span = 0; span < sec_data->mapcount; span++)
3960 {
3961 unsigned int span_start = sec_data->map[span].vma;
3962 unsigned int span_end = (span == sec_data->mapcount - 1)
3963 ? section->size : sec_data->map[span + 1].vma;
3964 unsigned int i;
3965 char span_type = sec_data->map[span].type;
3966 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3967
3968 if (span_type != 't')
3969 continue;
3970
3971 /* Span is entirely within a single 4KB region: skip scanning. */
3972 if (((base_vma + span_start) & ~0xfff)
3973 == ((base_vma + span_end) & ~0xfff))
3974 continue;
3975
3976 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3977
3978 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3979 * The branch target is in the same 4KB region as the
3980 first half of the branch.
3981 * The instruction before the branch is a 32-bit
81694485 3982 length non-branch instruction. */
48229727
JB		 3983 for (i = span_start; i < span_end;)
3984 {
3985 unsigned int insn = bfd_getl16 (&contents[i]);
3986 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3987 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3988
3989 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3990 insn_32bit = TRUE;
3991
3992 if (insn_32bit)
3993 {
3994 /* Load the rest of the insn (in manual-friendly order). */
3995 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
3996
3997 /* Encoding T4: B<c>.W. */
3998 is_b = (insn & 0xf800d000) == 0xf0009000;
3999 /* Encoding T1: BL<c>.W. */
4000 is_bl = (insn & 0xf800d000) == 0xf000d000;
4001 /* Encoding T2: BLX<c>.W. */
4002 is_blx = (insn & 0xf800d000) == 0xf000c000;
4003 /* Encoding T3: B<c>.W (not permitted in IT block). */
4004 is_bcc = (insn & 0xf800d000) == 0xf0008000
4005 && (insn & 0x07f00000) != 0x03800000;
4006 }
4007
4008 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4009
81694485
NC		 4010 if (((base_vma + i) & 0xfff) == 0xffe
4011 && insn_32bit
4012 && is_32bit_branch
4013 && last_was_32bit
4014 && ! last_was_branch)
48229727 4015 {
81694485 4016 bfd_signed_vma offset;
48229727
JB		 4017 bfd_boolean force_target_arm = FALSE;
4018 bfd_boolean force_target_thumb = FALSE;
4019 bfd_vma target;
4020 enum elf32_arm_stub_type stub_type = arm_stub_none;
4021 struct a8_erratum_reloc key, *found;
4022
4023 key.from = base_vma + i;
4024 found = bsearch (&key, a8_relocs, num_a8_relocs,
4025 sizeof (struct a8_erratum_reloc),
4026 &a8_reloc_compare);
4027
4028 if (found)
4029 {
4030 char *error_message = NULL;
4031 struct elf_link_hash_entry *entry;
4032
4033 /* We don't care about the error returned from this
4034 function, only if there is glue or not. */
4035 entry = find_thumb_glue (info, found->sym_name,
4036 &error_message);
4037
4038 if (entry)
4039 found->non_a8_stub = TRUE;
4040
4041 if (found->r_type == R_ARM_THM_CALL
4042 && found->st_type != STT_ARM_TFUNC)
4043 force_target_arm = TRUE;
4044 else if (found->r_type == R_ARM_THM_CALL
4045 && found->st_type == STT_ARM_TFUNC)
4046 force_target_thumb = TRUE;
4047 }
4048
4049 /* Check if we have an offending branch instruction. */
4050
4051 if (found && found->non_a8_stub)
4052 /* We've already made a stub for this instruction, e.g.
4053 it's a long branch or a Thumb->ARM stub. Assume that
4054 stub will suffice to work around the A8 erratum (see
4055 setting of always_after_branch above). */
4056 ;
4057 else if (is_bcc)
4058 {
4059 offset = (insn & 0x7ff) << 1;
4060 offset |= (insn & 0x3f0000) >> 4;
4061 offset |= (insn & 0x2000) ? 0x40000 : 0;
4062 offset |= (insn & 0x800) ? 0x80000 : 0;
4063 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4064 if (offset & 0x100000)
81694485 4065 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4066 stub_type = arm_stub_a8_veneer_b_cond;
4067 }
4068 else if (is_b || is_bl || is_blx)
4069 {
4070 int s = (insn & 0x4000000) != 0;
4071 int j1 = (insn & 0x2000) != 0;
4072 int j2 = (insn & 0x800) != 0;
4073 int i1 = !(j1 ^ s);
4074 int i2 = !(j2 ^ s);
4075
4076 offset = (insn & 0x7ff) << 1;
4077 offset |= (insn & 0x3ff0000) >> 4;
4078 offset |= i2 << 22;
4079 offset |= i1 << 23;
4080 offset |= s << 24;
4081 if (offset & 0x1000000)
81694485 4082 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4083
4084 if (is_blx)
81694485 4085 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4086
4087 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4088 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4089 }
4090
4091 if (stub_type != arm_stub_none)
4092 {
4093 bfd_vma pc_for_insn = base_vma + i + 4;
4094
4095 /* The original instruction is a BL, but the target is
4096 an ARM instruction. If we were not making a stub,
4097 the BL would have been converted to a BLX. Use the
4098 BLX stub instead in that case. */
4099 if (htab->use_blx && force_target_arm
4100 && stub_type == arm_stub_a8_veneer_bl)
4101 {
4102 stub_type = arm_stub_a8_veneer_blx;
4103 is_blx = TRUE;
4104 is_bl = FALSE;
4105 }
4106 /* Conversely, if the original instruction was
4107 BLX but the target is Thumb mode, use the BL
4108 stub. */
4109 else if (force_target_thumb
4110 && stub_type == arm_stub_a8_veneer_blx)
4111 {
4112 stub_type = arm_stub_a8_veneer_bl;
4113 is_blx = FALSE;
4114 is_bl = TRUE;
4115 }
4116
4117 if (is_blx)
81694485 4118 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4119
4120 /* If we found a relocation, use the proper destination,
4121 not the offset in the (unrelocated) instruction.
4122 Note this is always done if we switched the stub type
4123 above. */
4124 if (found)
81694485
NC		 4125 offset =
4126 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4127
4128 target = pc_for_insn + offset;
4129
4130 /* The BLX stub is ARM-mode code. Adjust the offset to
4131 take the different PC value (+8 instead of +4) into
4132 account. */
4133 if (stub_type == arm_stub_a8_veneer_blx)
4134 offset += 4;
4135
4136 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4137 {
eb7c4339 4138 char *stub_name = NULL;
48229727
JB		 4139
4140 if (num_a8_fixes == a8_fix_table_size)
4141 {
4142 a8_fix_table_size *= 2;
4143 a8_fixes = bfd_realloc (a8_fixes,
4144 sizeof (struct a8_erratum_fix)
4145 * a8_fix_table_size);
4146 }
4147
eb7c4339
NS		 4148 if (num_a8_fixes < prev_num_a8_fixes)
4149 {
4150 /* If we're doing a subsequent scan,
4151 check if we've found the same fix as
4152 before, and try and reuse the stub
4153 name. */
4154 stub_name = a8_fixes[num_a8_fixes].stub_name;
4155 if ((a8_fixes[num_a8_fixes].section != section)
4156 || (a8_fixes[num_a8_fixes].offset != i))
4157 {
4158 free (stub_name);
4159 stub_name = NULL;
4160 *stub_changed_p = TRUE;
4161 }
4162 }
4163
4164 if (!stub_name)
4165 {
4166 stub_name = bfd_malloc (8 + 1 + 8 + 1);
4167 if (stub_name != NULL)
4168 sprintf (stub_name, "%x:%x", section->id, i);
4169 }
48229727
JB		 4170
4171 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4172 a8_fixes[num_a8_fixes].section = section;
4173 a8_fixes[num_a8_fixes].offset = i;
4174 a8_fixes[num_a8_fixes].addend = offset;
4175 a8_fixes[num_a8_fixes].orig_insn = insn;
4176 a8_fixes[num_a8_fixes].stub_name = stub_name;
4177 a8_fixes[num_a8_fixes].stub_type = stub_type;
4178
4179 num_a8_fixes++;
4180 }
4181 }
4182 }
4183
4184 i += insn_32bit ? 4 : 2;
4185 last_was_32bit = insn_32bit;
4186 last_was_branch = is_32bit_branch;
4187 }
4188 }
4189
4190 if (elf_section_data (section)->this_hdr.contents == NULL)
4191 free (contents);
4192 }
4193
4194 *a8_fixes_p = a8_fixes;
4195 *num_a8_fixes_p = num_a8_fixes;
4196 *a8_fix_table_size_p = a8_fix_table_size;
4197
81694485 4198 return FALSE;
48229727
JB		 4199}
4200
906e58ca
NC		 4201/* Determine and set the size of the stub section for a final link.
4202
4203 The basic idea here is to examine all the relocations looking for
4204 PC-relative calls to a target that is unreachable with a "bl"
4205 instruction. */
4206
4207bfd_boolean
4208elf32_arm_size_stubs (bfd *output_bfd,
4209 bfd *stub_bfd,
4210 struct bfd_link_info *info,
4211 bfd_signed_vma group_size,
4212 asection * (*add_stub_section) (const char *, asection *),
4213 void (*layout_sections_again) (void))
4214{
4215 bfd_size_type stub_group_size;
07d72278 4216 bfd_boolean stubs_always_after_branch;
906e58ca 4217 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4218 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4219 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4220 struct a8_erratum_reloc *a8_relocs = NULL;
4221 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4222
4223 if (htab->fix_cortex_a8)
4224 {
4225 a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
4226 * a8_fix_table_size);
4227 a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
4228 * a8_reloc_table_size);
4229 }
906e58ca
NC		 4230
4231 /* Propagate mach to stub bfd, because it may not have been
4232 finalized when we created stub_bfd. */
4233 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4234 bfd_get_mach (output_bfd));
4235
4236 /* Stash our params away. */
4237 htab->stub_bfd = stub_bfd;
4238 htab->add_stub_section = add_stub_section;
4239 htab->layout_sections_again = layout_sections_again;
07d72278 4240 stubs_always_after_branch = group_size < 0;
48229727
JB		 4241
4242 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4243 as the first half of a 32-bit branch straddling two 4K pages. This is a
4244 crude way of enforcing that. */
4245 if (htab->fix_cortex_a8)
4246 stubs_always_after_branch = 1;
4247
906e58ca
NC		 4248 if (group_size < 0)
4249 stub_group_size = -group_size;
4250 else
4251 stub_group_size = group_size;
4252
4253 if (stub_group_size == 1)
4254 {
4255 /* Default values. */
4256 /* Thumb branch range is +-4MB has to be used as the default
4257 maximum size (a given section can contain both ARM and Thumb
4258 code, so the worst case has to be taken into account).
4259
4260 This value is 24K less than that, which allows for 2025
4261 12-byte stubs. If we exceed that, then we will fail to link.
4262 The user will have to relink with an explicit group size
4263 option. */
4264 stub_group_size = 4170000;
4265 }
4266
07d72278 4267 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4268
3ae046cc
NS		 4269 /* If we're applying the cortex A8 fix, we need to determine the
4270 program header size now, because we cannot change it later --
4271 that could alter section placements. Notice the A8 erratum fix
4272 ends up requiring the section addresses to remain unchanged
4273 modulo the page size. That's something we cannot represent
4274 inside BFD, and we don't want to force the section alignment to
4275 be the page size. */
4276 if (htab->fix_cortex_a8)
4277 (*htab->layout_sections_again) ();
4278
906e58ca
NC		 4279 while (1)
4280 {
4281 bfd *input_bfd;
4282 unsigned int bfd_indx;
4283 asection *stub_sec;
eb7c4339
NS		 4284 bfd_boolean stub_changed = FALSE;
4285 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4286
48229727 4287 num_a8_fixes = 0;
906e58ca
NC		 4288 for (input_bfd = info->input_bfds, bfd_indx = 0;
4289 input_bfd != NULL;
4290 input_bfd = input_bfd->link_next, bfd_indx++)
4291 {
4292 Elf_Internal_Shdr *symtab_hdr;
4293 asection *section;
4294 Elf_Internal_Sym *local_syms = NULL;
4295
48229727
JB		 4296 num_a8_relocs = 0;
4297
906e58ca
NC		 4298 /* We'll need the symbol table in a second. */
4299 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4300 if (symtab_hdr->sh_info == 0)
4301 continue;
4302
4303 /* Walk over each section attached to the input bfd. */
4304 for (section = input_bfd->sections;
4305 section != NULL;
4306 section = section->next)
4307 {
4308 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4309
4310 /* If there aren't any relocs, then there's nothing more
4311 to do. */
4312 if ((section->flags & SEC_RELOC) == 0
4313 || section->reloc_count == 0
4314 || (section->flags & SEC_CODE) == 0)
4315 continue;
4316
4317 /* If this section is a link-once section that will be
4318 discarded, then don't create any stubs. */
4319 if (section->output_section == NULL
4320 || section->output_section->owner != output_bfd)
4321 continue;
4322
4323 /* Get the relocs. */
4324 internal_relocs
4325 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4326 NULL, info->keep_memory);
4327 if (internal_relocs == NULL)
4328 goto error_ret_free_local;
4329
4330 /* Now examine each relocation. */
4331 irela = internal_relocs;
4332 irelaend = irela + section->reloc_count;
4333 for (; irela < irelaend; irela++)
4334 {
4335 unsigned int r_type, r_indx;
4336 enum elf32_arm_stub_type stub_type;
4337 struct elf32_arm_stub_hash_entry *stub_entry;
4338 asection *sym_sec;
4339 bfd_vma sym_value;
4340 bfd_vma destination;
4341 struct elf32_arm_link_hash_entry *hash;
7413f23f 4342 const char *sym_name;
906e58ca
NC		 4343 char *stub_name;
4344 const asection *id_sec;
4345 unsigned char st_type;
48229727 4346 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4347
4348 r_type = ELF32_R_TYPE (irela->r_info);
4349 r_indx = ELF32_R_SYM (irela->r_info);
4350
4351 if (r_type >= (unsigned int) R_ARM_max)
4352 {
4353 bfd_set_error (bfd_error_bad_value);
4354 error_ret_free_internal:
4355 if (elf_section_data (section)->relocs == NULL)
4356 free (internal_relocs);
4357 goto error_ret_free_local;
4358 }
4359
155d87d7 4360 /* Only look for stubs on branch instructions. */
906e58ca 4361 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4362 && (r_type != (unsigned int) R_ARM_THM_CALL)
4363 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4364 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4365 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4366 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4367 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4368 continue;
4369
4370 /* Now determine the call target, its name, value,
4371 section. */
4372 sym_sec = NULL;
4373 sym_value = 0;
4374 destination = 0;
4375 hash = NULL;
7413f23f 4376 sym_name = NULL;
906e58ca
NC		 4377 if (r_indx < symtab_hdr->sh_info)
4378 {
4379 /* It's a local symbol. */
4380 Elf_Internal_Sym *sym;
4381 Elf_Internal_Shdr *hdr;
4382
4383 if (local_syms == NULL)
4384 {
4385 local_syms
4386 = (Elf_Internal_Sym *) symtab_hdr->contents;
4387 if (local_syms == NULL)
4388 local_syms
4389 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4390 symtab_hdr->sh_info, 0,
4391 NULL, NULL, NULL);
4392 if (local_syms == NULL)
4393 goto error_ret_free_internal;
4394 }
4395
4396 sym = local_syms + r_indx;
4397 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4398 sym_sec = hdr->bfd_section;
ffcb4889
NS		 4399 if (!sym_sec)
4400 /* This is an undefined symbol. It can never
4401 be resolved. */
4402 continue;
4403
906e58ca
NC		 4404 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4405 sym_value = sym->st_value;
4406 destination = (sym_value + irela->r_addend
4407 + sym_sec->output_offset
4408 + sym_sec->output_section->vma);
4409 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4410 sym_name
4411 = bfd_elf_string_from_elf_section (input_bfd,
4412 symtab_hdr->sh_link,
4413 sym->st_name);
906e58ca
NC		 4414 }
4415 else
4416 {
4417 /* It's an external symbol. */
4418 int e_indx;
4419
4420 e_indx = r_indx - symtab_hdr->sh_info;
4421 hash = ((struct elf32_arm_link_hash_entry *)
4422 elf_sym_hashes (input_bfd)[e_indx]);
4423
4424 while (hash->root.root.type == bfd_link_hash_indirect
4425 || hash->root.root.type == bfd_link_hash_warning)
4426 hash = ((struct elf32_arm_link_hash_entry *)
4427 hash->root.root.u.i.link);
4428
4429 if (hash->root.root.type == bfd_link_hash_defined
4430 || hash->root.root.type == bfd_link_hash_defweak)
4431 {
4432 sym_sec = hash->root.root.u.def.section;
4433 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4434
4435 struct elf32_arm_link_hash_table *globals =
4436 elf32_arm_hash_table (info);
4437
4438 /* For a destination in a shared library,
4439 use the PLT stub as target address to
4440 decide whether a branch stub is
4441 needed. */
4442 if (globals->splt != NULL && hash != NULL
4443 && hash->root.plt.offset != (bfd_vma) -1)
4444 {
4445 sym_sec = globals->splt;
4446 sym_value = hash->root.plt.offset;
4447 if (sym_sec->output_section != NULL)
4448 destination = (sym_value
4449 + sym_sec->output_offset
4450 + sym_sec->output_section->vma);
4451 }
4452 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4453 destination = (sym_value + irela->r_addend
4454 + sym_sec->output_offset
4455 + sym_sec->output_section->vma);
4456 }
69c5861e
CL		 4457 else if ((hash->root.root.type == bfd_link_hash_undefined)
4458 || (hash->root.root.type == bfd_link_hash_undefweak))
4459 {
4460 /* For a shared library, use the PLT stub as
4461 target address to decide whether a long
4462 branch stub is needed.
4463 For absolute code, they cannot be handled. */
4464 struct elf32_arm_link_hash_table *globals =
4465 elf32_arm_hash_table (info);
4466
4467 if (globals->splt != NULL && hash != NULL
4468 && hash->root.plt.offset != (bfd_vma) -1)
4469 {
4470 sym_sec = globals->splt;
4471 sym_value = hash->root.plt.offset;
4472 if (sym_sec->output_section != NULL)
4473 destination = (sym_value
4474 + sym_sec->output_offset
4475 + sym_sec->output_section->vma);
4476 }
4477 else
4478 continue;
4479 }
906e58ca
NC		 4480 else
4481 {
4482 bfd_set_error (bfd_error_bad_value);
4483 goto error_ret_free_internal;
4484 }
4485 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4486 sym_name = hash->root.root.root.string;
906e58ca
NC		 4487 }
4488
48229727 4489 do
7413f23f 4490 {
48229727
JB		 4491 /* Determine what (if any) linker stub is needed. */
4492 stub_type = arm_type_of_stub (info, section, irela,
4493 st_type, hash,
4494 destination, sym_sec,
4495 input_bfd, sym_name);
4496 if (stub_type == arm_stub_none)
4497 break;
4498
4499 /* Support for grouping stub sections. */
4500 id_sec = htab->stub_group[section->id].link_sec;
4501
4502 /* Get the name of this stub. */
4503 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4504 irela);
4505 if (!stub_name)
4506 goto error_ret_free_internal;
4507
4508 /* We've either created a stub for this reloc already,
4509 or we are about to. */
4510 created_stub = TRUE;
4511
4512 stub_entry = arm_stub_hash_lookup
4513 (&htab->stub_hash_table, stub_name,
4514 FALSE, FALSE);
4515 if (stub_entry != NULL)
4516 {
4517 /* The proper stub has already been created. */
4518 free (stub_name);
eb7c4339 4519 stub_entry->target_value = sym_value;
48229727
JB		 4520 break;
4521 }
7413f23f 4522
48229727
JB		 4523 stub_entry = elf32_arm_add_stub (stub_name, section,
4524 htab);
4525 if (stub_entry == NULL)
4526 {
4527 free (stub_name);
4528 goto error_ret_free_internal;
4529 }
7413f23f 4530
48229727
JB		 4531 stub_entry->target_value = sym_value;
4532 stub_entry->target_section = sym_sec;
4533 stub_entry->stub_type = stub_type;
4534 stub_entry->h = hash;
4535 stub_entry->st_type = st_type;
4536
4537 if (sym_name == NULL)
4538 sym_name = "unnamed";
4539 stub_entry->output_name
4540 = bfd_alloc (htab->stub_bfd,
4541 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4542 + strlen (sym_name));
4543 if (stub_entry->output_name == NULL)
4544 {
4545 free (stub_name);
4546 goto error_ret_free_internal;
4547 }
4548
4549 /* For historical reasons, use the existing names for
4550 ARM-to-Thumb and Thumb-to-ARM stubs. */
4551 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4552 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4553 && st_type != STT_ARM_TFUNC)
4554 sprintf (stub_entry->output_name,
4555 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4556 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4557 || (r_type == (unsigned int) R_ARM_JUMP24))
4558 && st_type == STT_ARM_TFUNC)
4559 sprintf (stub_entry->output_name,
4560 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4561 else
4562 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4563 sym_name);
4564
4565 stub_changed = TRUE;
4566 }
4567 while (0);
4568
4569 /* Look for relocations which might trigger Cortex-A8
4570 erratum. */
4571 if (htab->fix_cortex_a8
4572 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4573 || r_type == (unsigned int) R_ARM_THM_JUMP19
4574 || r_type == (unsigned int) R_ARM_THM_CALL
4575 || r_type == (unsigned int) R_ARM_THM_XPC22))
4576 {
4577 bfd_vma from = section->output_section->vma
4578 + section->output_offset
4579 + irela->r_offset;
4580
4581 if ((from & 0xfff) == 0xffe)
4582 {
4583 /* Found a candidate. Note we haven't checked the
4584 destination is within 4K here: if we do so (and
4585 don't create an entry in a8_relocs) we can't tell
4586 that a branch should have been relocated when
4587 scanning later. */
4588 if (num_a8_relocs == a8_reloc_table_size)
4589 {
4590 a8_reloc_table_size *= 2;
4591 a8_relocs = bfd_realloc (a8_relocs,
4592 sizeof (struct a8_erratum_reloc)
4593 * a8_reloc_table_size);
4594 }
4595
4596 a8_relocs[num_a8_relocs].from = from;
4597 a8_relocs[num_a8_relocs].destination = destination;
4598 a8_relocs[num_a8_relocs].r_type = r_type;
4599 a8_relocs[num_a8_relocs].st_type = st_type;
4600 a8_relocs[num_a8_relocs].sym_name = sym_name;
4601 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4602
4603 num_a8_relocs++;
4604 }
4605 }
906e58ca
NC		 4606 }
4607
48229727
JB		 4608 /* We're done with the internal relocs, free them. */
4609 if (elf_section_data (section)->relocs == NULL)
4610 free (internal_relocs);
4611 }
4612
4613 if (htab->fix_cortex_a8)
4614 {
4615 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4616 qsort (a8_relocs, num_a8_relocs,
4617 sizeof (struct a8_erratum_reloc),
48229727
JB		 4618 &a8_reloc_compare);
4619
4620 /* Scan for branches which might trigger Cortex-A8 erratum. */
4621 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4622 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4623 a8_relocs, num_a8_relocs,
4624 prev_num_a8_fixes, &stub_changed)
4625 != 0)
48229727 4626 goto error_ret_free_local;
5e681ec4 4627 }
5e681ec4
PB		 4628 }
4629
eb7c4339 4630 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4631 stub_changed = TRUE;
4632
906e58ca
NC		 4633 if (!stub_changed)
4634 break;
5e681ec4 4635
906e58ca
NC		 4636 /* OK, we've added some stubs. Find out the new size of the
4637 stub sections. */
4638 for (stub_sec = htab->stub_bfd->sections;
4639 stub_sec != NULL;
4640 stub_sec = stub_sec->next)
3e6b1042
DJ		 4641 {
4642 /* Ignore non-stub sections. */
4643 if (!strstr (stub_sec->name, STUB_SUFFIX))
4644 continue;
4645
4646 stub_sec->size = 0;
4647 }
b34b2d70 4648
906e58ca
NC		 4649 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4650
48229727
JB		 4651 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4652 if (htab->fix_cortex_a8)
4653 for (i = 0; i < num_a8_fixes; i++)
4654 {
4655 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4656 a8_fixes[i].section, htab);
4657
4658 if (stub_sec == NULL)
4659 goto error_ret_free_local;
4660
4661 stub_sec->size
4662 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4663 NULL);
4664 }
4665
4666
906e58ca
NC		 4667 /* Ask the linker to do its stuff. */
4668 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4669 }
4670
48229727
JB		 4671 /* Add stubs for Cortex-A8 erratum fixes now. */
4672 if (htab->fix_cortex_a8)
4673 {
4674 for (i = 0; i < num_a8_fixes; i++)
4675 {
4676 struct elf32_arm_stub_hash_entry *stub_entry;
4677 char *stub_name = a8_fixes[i].stub_name;
4678 asection *section = a8_fixes[i].section;
4679 unsigned int section_id = a8_fixes[i].section->id;
4680 asection *link_sec = htab->stub_group[section_id].link_sec;
4681 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4682 const insn_sequence *template;
4683 int template_size, size = 0;
4684
4685 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4686 TRUE, FALSE);
4687 if (stub_entry == NULL)
4688 {
4689 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4690 section->owner,
4691 stub_name);
4692 return FALSE;
4693 }
4694
4695 stub_entry->stub_sec = stub_sec;
4696 stub_entry->stub_offset = 0;
4697 stub_entry->id_sec = link_sec;
4698 stub_entry->stub_type = a8_fixes[i].stub_type;
4699 stub_entry->target_section = a8_fixes[i].section;
4700 stub_entry->target_value = a8_fixes[i].offset;
4701 stub_entry->target_addend = a8_fixes[i].addend;
4702 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4703 stub_entry->st_type = STT_ARM_TFUNC;
4704
4705 size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
4706 &template_size);
4707
4708 stub_entry->stub_size = size;
4709 stub_entry->stub_template = template;
4710 stub_entry->stub_template_size = template_size;
4711 }
4712
4713 /* Stash the Cortex-A8 erratum fix array for use later in
4714 elf32_arm_write_section(). */
4715 htab->a8_erratum_fixes = a8_fixes;
4716 htab->num_a8_erratum_fixes = num_a8_fixes;
4717 }
4718 else
4719 {
4720 htab->a8_erratum_fixes = NULL;
4721 htab->num_a8_erratum_fixes = 0;
4722 }
906e58ca
NC		 4723 return TRUE;
4724
4725 error_ret_free_local:
4726 return FALSE;
5e681ec4
PB		 4727}
4728
906e58ca
NC		 4729/* Build all the stubs associated with the current output file. The
4730 stubs are kept in a hash table attached to the main linker hash
4731 table. We also set up the .plt entries for statically linked PIC
4732 functions here. This function is called via arm_elf_finish in the
4733 linker. */
252b5132 4734
906e58ca
NC		 4735bfd_boolean
4736elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4737{
906e58ca
NC		 4738 asection *stub_sec;
4739 struct bfd_hash_table *table;
4740 struct elf32_arm_link_hash_table *htab;
252b5132 4741
906e58ca 4742 htab = elf32_arm_hash_table (info);
252b5132 4743
906e58ca
NC		 4744 for (stub_sec = htab->stub_bfd->sections;
4745 stub_sec != NULL;
4746 stub_sec = stub_sec->next)
252b5132 4747 {
906e58ca
NC		 4748 bfd_size_type size;
4749
8029a119 4750 /* Ignore non-stub sections. */
906e58ca
NC		 4751 if (!strstr (stub_sec->name, STUB_SUFFIX))
4752 continue;
4753
4754 /* Allocate memory to hold the linker stubs. */
4755 size = stub_sec->size;
4756 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4757 if (stub_sec->contents == NULL && size != 0)
4758 return FALSE;
4759 stub_sec->size = 0;
252b5132
RH		 4760 }
4761
906e58ca
NC		 4762 /* Build the stubs as directed by the stub hash table. */
4763 table = &htab->stub_hash_table;
4764 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4765 if (htab->fix_cortex_a8)
4766 {
4767 /* Place the cortex a8 stubs last. */
4768 htab->fix_cortex_a8 = -1;
4769 bfd_hash_traverse (table, arm_build_one_stub, info);
4770 }
252b5132 4771
906e58ca 4772 return TRUE;
252b5132
RH		 4773}
4774
9b485d32
NC		 4775/* Locate the Thumb encoded calling stub for NAME. */
4776
252b5132 4777static struct elf_link_hash_entry *
57e8b36a
NC		 4778find_thumb_glue (struct bfd_link_info *link_info,
4779 const char *name,
f2a9dd69 4780 char **error_message)
252b5132
RH		 4781{
4782 char *tmp_name;
4783 struct elf_link_hash_entry *hash;
4784 struct elf32_arm_link_hash_table *hash_table;
4785
4786 /* We need a pointer to the armelf specific hash table. */
4787 hash_table = elf32_arm_hash_table (link_info);
4788
57e8b36a
NC		 4789 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4790 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4791
4792 BFD_ASSERT (tmp_name);
4793
4794 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4795
4796 hash = elf_link_hash_lookup
b34976b6 4797 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4798
b1657152
AM		 4799 if (hash == NULL
4800 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4801 tmp_name, name) == -1)
4802 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4803
4804 free (tmp_name);
4805
4806 return hash;
4807}
4808
9b485d32
NC		 4809/* Locate the ARM encoded calling stub for NAME. */
4810
252b5132 4811static struct elf_link_hash_entry *
57e8b36a
NC		 4812find_arm_glue (struct bfd_link_info *link_info,
4813 const char *name,
f2a9dd69 4814 char **error_message)
252b5132
RH		 4815{
4816 char *tmp_name;
4817 struct elf_link_hash_entry *myh;
4818 struct elf32_arm_link_hash_table *hash_table;
4819
4820 /* We need a pointer to the elfarm specific hash table. */
4821 hash_table = elf32_arm_hash_table (link_info);
4822
57e8b36a
NC		 4823 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4824 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4825
4826 BFD_ASSERT (tmp_name);
4827
4828 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4829
4830 myh = elf_link_hash_lookup
b34976b6 4831 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4832
b1657152
AM		 4833 if (myh == NULL
4834 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4835 tmp_name, name) == -1)
4836 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4837
4838 free (tmp_name);
4839
4840 return myh;
4841}
4842
8f6277f5 4843/* ARM->Thumb glue (static images):
252b5132
RH		 4844
4845 .arm
4846 __func_from_arm:
4847 ldr r12, __func_addr
4848 bx r12
4849 __func_addr:
906e58ca 4850 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4851
26079076
PB		 4852 (v5t static images)
4853 .arm
4854 __func_from_arm:
4855 ldr pc, __func_addr
4856 __func_addr:
906e58ca 4857 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4858
8f6277f5
PB		 4859 (relocatable images)
4860 .arm
4861 __func_from_arm:
4862 ldr r12, __func_offset
4863 add r12, r12, pc
4864 bx r12
4865 __func_offset:
8029a119 4866 .word func - . */
8f6277f5
PB		 4867
4868#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4869static const insn32 a2t1_ldr_insn = 0xe59fc000;
4870static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4871static const insn32 a2t3_func_addr_insn = 0x00000001;
4872
26079076
PB		 4873#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4874static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4875static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4876
8f6277f5
PB		 4877#define ARM2THUMB_PIC_GLUE_SIZE 16
4878static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4879static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4880static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4881
9b485d32 4882/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4883
8029a119
NC		 4884 .thumb .thumb
4885 .align 2 .align 2
4886 __func_from_thumb: __func_from_thumb:
4887 bx pc push {r6, lr}
4888 nop ldr r6, __func_addr
4889 .arm mov lr, pc
4890 b func bx r6
fcef9eb7
NC		 4891 .arm
4892 ;; back_to_thumb
4893 ldmia r13! {r6, lr}
4894 bx lr
8029a119
NC		 4895 __func_addr:
4896 .word func */
252b5132
RH		 4897
4898#define THUMB2ARM_GLUE_SIZE 8
4899static const insn16 t2a1_bx_pc_insn = 0x4778;
4900static const insn16 t2a2_noop_insn = 0x46c0;
4901static const insn32 t2a3_b_insn = 0xea000000;
4902
c7b8f16e
JB		 4903#define VFP11_ERRATUM_VENEER_SIZE 8
4904
845b51d6
PB		 4905#define ARM_BX_VENEER_SIZE 12
4906static const insn32 armbx1_tst_insn = 0xe3100001;
4907static const insn32 armbx2_moveq_insn = 0x01a0f000;
4908static const insn32 armbx3_bx_insn = 0xe12fff10;
4909
7e392df6 4910#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4911static void
4912arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4913{
4914 asection * s;
8029a119 4915 bfd_byte * contents;
252b5132 4916
8029a119 4917 if (size == 0)
3e6b1042
DJ		 4918 {
4919 /* Do not include empty glue sections in the output. */
4920 if (abfd != NULL)
4921 {
4922 s = bfd_get_section_by_name (abfd, name);
4923 if (s != NULL)
4924 s->flags |= SEC_EXCLUDE;
4925 }
4926 return;
4927 }
252b5132 4928
8029a119 4929 BFD_ASSERT (abfd != NULL);
252b5132 4930
8029a119
NC		 4931 s = bfd_get_section_by_name (abfd, name);
4932 BFD_ASSERT (s != NULL);
252b5132 4933
8029a119 4934 contents = bfd_alloc (abfd, size);
252b5132 4935
8029a119
NC		 4936 BFD_ASSERT (s->size == size);
4937 s->contents = contents;
4938}
906e58ca 4939
8029a119
NC		 4940bfd_boolean
4941bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4942{
4943 struct elf32_arm_link_hash_table * globals;
906e58ca 4944
8029a119
NC		 4945 globals = elf32_arm_hash_table (info);
4946 BFD_ASSERT (globals != NULL);
906e58ca 4947
8029a119
NC		 4948 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4949 globals->arm_glue_size,
4950 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4951
8029a119
NC		 4952 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4953 globals->thumb_glue_size,
4954 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4955
8029a119
NC		 4956 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4957 globals->vfp11_erratum_glue_size,
4958 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4959
8029a119
NC		 4960 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4961 globals->bx_glue_size,
845b51d6
PB		 4962 ARM_BX_GLUE_SECTION_NAME);
4963
b34976b6 4964 return TRUE;
252b5132
RH		 4965}
4966
a4fd1a8e 4967/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4968 returns the symbol identifying the stub. */
4969
a4fd1a8e 4970static struct elf_link_hash_entry *
57e8b36a
NC		 4971record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4972 struct elf_link_hash_entry * h)
252b5132
RH		 4973{
4974 const char * name = h->root.root.string;
63b0f745 4975 asection * s;
252b5132
RH		 4976 char * tmp_name;
4977 struct elf_link_hash_entry * myh;
14a793b2 4978 struct bfd_link_hash_entry * bh;
252b5132 4979 struct elf32_arm_link_hash_table * globals;
dc810e39 4980 bfd_vma val;
2f475487 4981 bfd_size_type size;
252b5132
RH		 4982
4983 globals = elf32_arm_hash_table (link_info);
4984
4985 BFD_ASSERT (globals != NULL);
4986 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4987
4988 s = bfd_get_section_by_name
4989 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4990
252b5132
RH		 4991 BFD_ASSERT (s != NULL);
4992
57e8b36a 4993 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4994
4995 BFD_ASSERT (tmp_name);
4996
4997 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4998
4999 myh = elf_link_hash_lookup
b34976b6 5000 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5001
5002 if (myh != NULL)
5003 {
9b485d32 5004 /* We've already seen this guy. */
252b5132 5005 free (tmp_name);
a4fd1a8e 5006 return myh;
252b5132
RH		 5007 }
5008
57e8b36a
NC		 5009 /* The only trick here is using hash_table->arm_glue_size as the value.
5010 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5011 putting it. The +1 on the value marks that the stub has not been
5012 output yet - not that it is a Thumb function. */
14a793b2 5013 bh = NULL;
dc810e39
AM		 5014 val = globals->arm_glue_size + 1;
5015 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5016 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5017 NULL, TRUE, FALSE, &bh);
252b5132 5018
b7693d02
DJ		 5019 myh = (struct elf_link_hash_entry *) bh;
5020 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5021 myh->forced_local = 1;
5022
252b5132
RH		 5023 free (tmp_name);
5024
27e55c4d
PB		 5025 if (link_info->shared || globals->root.is_relocatable_executable
5026 || globals->pic_veneer)
2f475487 5027 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5028 else if (globals->use_blx)
5029 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5030 else
2f475487
AM		 5031 size = ARM2THUMB_STATIC_GLUE_SIZE;
5032
5033 s->size += size;
5034 globals->arm_glue_size += size;
252b5132 5035
a4fd1a8e 5036 return myh;
252b5132
RH		 5037}
5038
845b51d6
PB		 5039/* Allocate space for ARMv4 BX veneers. */
5040
5041static void
5042record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5043{
5044 asection * s;
5045 struct elf32_arm_link_hash_table *globals;
5046 char *tmp_name;
5047 struct elf_link_hash_entry *myh;
5048 struct bfd_link_hash_entry *bh;
5049 bfd_vma val;
5050
5051 /* BX PC does not need a veneer. */
5052 if (reg == 15)
5053 return;
5054
5055 globals = elf32_arm_hash_table (link_info);
5056
5057 BFD_ASSERT (globals != NULL);
5058 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5059
5060 /* Check if this veneer has already been allocated. */
5061 if (globals->bx_glue_offset[reg])
5062 return;
5063
5064 s = bfd_get_section_by_name
5065 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5066
5067 BFD_ASSERT (s != NULL);
5068
5069 /* Add symbol for veneer. */
5070 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5071
845b51d6 5072 BFD_ASSERT (tmp_name);
906e58ca 5073
845b51d6 5074 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5075
845b51d6
PB		 5076 myh = elf_link_hash_lookup
5077 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5078
845b51d6 5079 BFD_ASSERT (myh == NULL);
906e58ca 5080
845b51d6
PB		 5081 bh = NULL;
5082 val = globals->bx_glue_size;
5083 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5084 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5085 NULL, TRUE, FALSE, &bh);
5086
5087 myh = (struct elf_link_hash_entry *) bh;
5088 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5089 myh->forced_local = 1;
5090
5091 s->size += ARM_BX_VENEER_SIZE;
5092 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5093 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5094}
5095
5096
c7b8f16e
JB		 5097/* Add an entry to the code/data map for section SEC. */
5098
5099static void
5100elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5101{
5102 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5103 unsigned int newidx;
906e58ca 5104
c7b8f16e
JB		 5105 if (sec_data->map == NULL)
5106 {
5107 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
5108 sec_data->mapcount = 0;
5109 sec_data->mapsize = 1;
5110 }
906e58ca 5111
c7b8f16e 5112 newidx = sec_data->mapcount++;
906e58ca 5113
c7b8f16e
JB		 5114 if (sec_data->mapcount > sec_data->mapsize)
5115 {
5116 sec_data->mapsize *= 2;
515ef31d
NC		 5117 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5118 * sizeof (elf32_arm_section_map));
5119 }
5120
5121 if (sec_data->map)
5122 {
5123 sec_data->map[newidx].vma = vma;
5124 sec_data->map[newidx].type = type;
c7b8f16e 5125 }
c7b8f16e
JB		 5126}
5127
5128
5129/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5130 veneers are handled for now. */
5131
5132static bfd_vma
5133record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5134 elf32_vfp11_erratum_list *branch,
5135 bfd *branch_bfd,
5136 asection *branch_sec,
5137 unsigned int offset)
5138{
5139 asection *s;
5140 struct elf32_arm_link_hash_table *hash_table;
5141 char *tmp_name;
5142 struct elf_link_hash_entry *myh;
5143 struct bfd_link_hash_entry *bh;
5144 bfd_vma val;
5145 struct _arm_elf_section_data *sec_data;
5146 int errcount;
5147 elf32_vfp11_erratum_list *newerr;
906e58ca 5148
c7b8f16e 5149 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5150
c7b8f16e
JB		 5151 BFD_ASSERT (hash_table != NULL);
5152 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5153
c7b8f16e
JB		 5154 s = bfd_get_section_by_name
5155 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5156
c7b8f16e 5157 sec_data = elf32_arm_section_data (s);
906e58ca 5158
c7b8f16e 5159 BFD_ASSERT (s != NULL);
906e58ca 5160
c7b8f16e
JB		 5161 tmp_name = bfd_malloc ((bfd_size_type) strlen
5162 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5163
c7b8f16e 5164 BFD_ASSERT (tmp_name);
906e58ca 5165
c7b8f16e
JB		 5166 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5167 hash_table->num_vfp11_fixes);
906e58ca 5168
c7b8f16e
JB		 5169 myh = elf_link_hash_lookup
5170 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5171
c7b8f16e 5172 BFD_ASSERT (myh == NULL);
906e58ca 5173
c7b8f16e
JB		 5174 bh = NULL;
5175 val = hash_table->vfp11_erratum_glue_size;
5176 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5177 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5178 NULL, TRUE, FALSE, &bh);
5179
5180 myh = (struct elf_link_hash_entry *) bh;
5181 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5182 myh->forced_local = 1;
5183
5184 /* Link veneer back to calling location. */
5185 errcount = ++(sec_data->erratumcount);
5186 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5187
c7b8f16e
JB		 5188 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5189 newerr->vma = -1;
5190 newerr->u.v.branch = branch;
5191 newerr->u.v.id = hash_table->num_vfp11_fixes;
5192 branch->u.b.veneer = newerr;
5193
5194 newerr->next = sec_data->erratumlist;
5195 sec_data->erratumlist = newerr;
5196
5197 /* A symbol for the return from the veneer. */
5198 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5199 hash_table->num_vfp11_fixes);
5200
5201 myh = elf_link_hash_lookup
5202 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5203
c7b8f16e
JB		 5204 if (myh != NULL)
5205 abort ();
5206
5207 bh = NULL;
5208 val = offset + 4;
5209 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5210 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5211
c7b8f16e
JB		 5212 myh = (struct elf_link_hash_entry *) bh;
5213 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5214 myh->forced_local = 1;
5215
5216 free (tmp_name);
906e58ca 5217
c7b8f16e
JB		 5218 /* Generate a mapping symbol for the veneer section, and explicitly add an
5219 entry for that symbol to the code/data map for the section. */
5220 if (hash_table->vfp11_erratum_glue_size == 0)
5221 {
5222 bh = NULL;
5223 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5224 ever requires this erratum fix. */
5225 _bfd_generic_link_add_one_symbol (link_info,
5226 hash_table->bfd_of_glue_owner, "$a",
5227 BSF_LOCAL, s, 0, NULL,
5228 TRUE, FALSE, &bh);
5229
5230 myh = (struct elf_link_hash_entry *) bh;
5231 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5232 myh->forced_local = 1;
906e58ca 5233
c7b8f16e
JB		 5234 /* The elf32_arm_init_maps function only cares about symbols from input
5235 BFDs. We must make a note of this generated mapping symbol
5236 ourselves so that code byteswapping works properly in
5237 elf32_arm_write_section. */
5238 elf32_arm_section_map_add (s, 'a', 0);
5239 }
906e58ca 5240
c7b8f16e
JB		 5241 s->size += VFP11_ERRATUM_VENEER_SIZE;
5242 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5243 hash_table->num_vfp11_fixes++;
906e58ca 5244
c7b8f16e
JB		 5245 /* The offset of the veneer. */
5246 return val;
5247}
5248
8029a119 5249#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5250 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5251 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5252
5253/* Create a fake section for use by the ARM backend of the linker. */
5254
5255static bfd_boolean
5256arm_make_glue_section (bfd * abfd, const char * name)
5257{
5258 asection * sec;
5259
5260 sec = bfd_get_section_by_name (abfd, name);
5261 if (sec != NULL)
5262 /* Already made. */
5263 return TRUE;
5264
5265 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5266
5267 if (sec == NULL
5268 || !bfd_set_section_alignment (abfd, sec, 2))
5269 return FALSE;
5270
5271 /* Set the gc mark to prevent the section from being removed by garbage
5272 collection, despite the fact that no relocs refer to this section. */
5273 sec->gc_mark = 1;
5274
5275 return TRUE;
5276}
5277
8afb0e02
NC		 5278/* Add the glue sections to ABFD. This function is called from the
5279 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5280
b34976b6 5281bfd_boolean
57e8b36a
NC		 5282bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5283 struct bfd_link_info *info)
252b5132 5284{
8afb0e02
NC		 5285 /* If we are only performing a partial
5286 link do not bother adding the glue. */
1049f94e 5287 if (info->relocatable)
b34976b6 5288 return TRUE;
252b5132 5289
8029a119
NC		 5290 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5291 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5292 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5293 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5294}
5295
5296/* Select a BFD to be used to hold the sections used by the glue code.
5297 This function is called from the linker scripts in ld/emultempl/
8029a119 5298 {armelf/pe}.em. */
8afb0e02 5299
b34976b6 5300bfd_boolean
57e8b36a 5301bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5302{
5303 struct elf32_arm_link_hash_table *globals;
5304
5305 /* If we are only performing a partial link
5306 do not bother getting a bfd to hold the glue. */
1049f94e 5307 if (info->relocatable)
b34976b6 5308 return TRUE;
8afb0e02 5309
b7693d02
DJ		 5310 /* Make sure we don't attach the glue sections to a dynamic object. */
5311 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5312
8afb0e02
NC		 5313 globals = elf32_arm_hash_table (info);
5314
5315 BFD_ASSERT (globals != NULL);
5316
5317 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5318 return TRUE;
8afb0e02 5319
252b5132
RH		 5320 /* Save the bfd for later use. */
5321 globals->bfd_of_glue_owner = abfd;
cedb70c5 5322
b34976b6 5323 return TRUE;
252b5132
RH		 5324}
5325
906e58ca
NC		 5326static void
5327check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5328{
104d59d1
JM		 5329 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5330 Tag_CPU_arch) > 2)
39b41c9c
PB		 5331 globals->use_blx = 1;
5332}
5333
b34976b6 5334bfd_boolean
57e8b36a 5335bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5336 struct bfd_link_info *link_info)
252b5132
RH		 5337{
5338 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5339 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5340 Elf_Internal_Rela *irel, *irelend;
5341 bfd_byte *contents = NULL;
252b5132
RH		 5342
5343 asection *sec;
5344 struct elf32_arm_link_hash_table *globals;
5345
5346 /* If we are only performing a partial link do not bother
5347 to construct any glue. */
1049f94e 5348 if (link_info->relocatable)
b34976b6 5349 return TRUE;
252b5132 5350
39ce1a6a
NC		 5351 /* Here we have a bfd that is to be included on the link. We have a
5352 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5353 globals = elf32_arm_hash_table (link_info);
5354
5355 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5356
5357 check_use_blx (globals);
252b5132 5358
d504ffc8 5359 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5360 {
d003868e
AM		 5361 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5362 abfd);
e489d0ae
PB		 5363 return FALSE;
5364 }
f21f3fe0 5365
39ce1a6a
NC		 5366 /* PR 5398: If we have not decided to include any loadable sections in
5367 the output then we will not have a glue owner bfd. This is OK, it
5368 just means that there is nothing else for us to do here. */
5369 if (globals->bfd_of_glue_owner == NULL)
5370 return TRUE;
5371
252b5132
RH		 5372 /* Rummage around all the relocs and map the glue vectors. */
5373 sec = abfd->sections;
5374
5375 if (sec == NULL)
b34976b6 5376 return TRUE;
252b5132
RH		 5377
5378 for (; sec != NULL; sec = sec->next)
5379 {
5380 if (sec->reloc_count == 0)
5381 continue;
5382
2f475487
AM		 5383 if ((sec->flags & SEC_EXCLUDE) != 0)
5384 continue;
5385
0ffa91dd 5386 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5387
9b485d32 5388 /* Load the relocs. */
6cdc0ccc 5389 internal_relocs
906e58ca 5390 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5391
6cdc0ccc
AM		 5392 if (internal_relocs == NULL)
5393 goto error_return;
252b5132 5394
6cdc0ccc
AM		 5395 irelend = internal_relocs + sec->reloc_count;
5396 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5397 {
5398 long r_type;
5399 unsigned long r_index;
252b5132
RH		 5400
5401 struct elf_link_hash_entry *h;
5402
5403 r_type = ELF32_R_TYPE (irel->r_info);
5404 r_index = ELF32_R_SYM (irel->r_info);
5405
9b485d32 5406 /* These are the only relocation types we care about. */
ba96a88f 5407 if ( r_type != R_ARM_PC24
845b51d6 5408 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5409 continue;
5410
5411 /* Get the section contents if we haven't done so already. */
5412 if (contents == NULL)
5413 {
5414 /* Get cached copy if it exists. */
5415 if (elf_section_data (sec)->this_hdr.contents != NULL)
5416 contents = elf_section_data (sec)->this_hdr.contents;
5417 else
5418 {
5419 /* Go get them off disk. */
57e8b36a 5420 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5421 goto error_return;
5422 }
5423 }
5424
845b51d6
PB		 5425 if (r_type == R_ARM_V4BX)
5426 {
5427 int reg;
5428
5429 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5430 record_arm_bx_glue (link_info, reg);
5431 continue;
5432 }
5433
a7c10850 5434 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5435 h = NULL;
5436
9b485d32 5437 /* We don't care about local symbols. */
252b5132
RH		 5438 if (r_index < symtab_hdr->sh_info)
5439 continue;
5440
9b485d32 5441 /* This is an external symbol. */
252b5132
RH		 5442 r_index -= symtab_hdr->sh_info;
5443 h = (struct elf_link_hash_entry *)
5444 elf_sym_hashes (abfd)[r_index];
5445
5446 /* If the relocation is against a static symbol it must be within
5447 the current section and so cannot be a cross ARM/Thumb relocation. */
5448 if (h == NULL)
5449 continue;
5450
d504ffc8
DJ		 5451 /* If the call will go through a PLT entry then we do not need
5452 glue. */
5453 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5454 continue;
5455
252b5132
RH		 5456 switch (r_type)
5457 {
5458 case R_ARM_PC24:
5459 /* This one is a call from arm code. We need to look up
2f0ca46a 5460 the target of the call. If it is a thumb target, we
252b5132 5461 insert glue. */
ebe24dd4 5462 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5463 record_arm_to_thumb_glue (link_info, h);
5464 break;
5465
252b5132 5466 default:
c6596c5e 5467 abort ();
252b5132
RH		 5468 }
5469 }
6cdc0ccc
AM		 5470
5471 if (contents != NULL
5472 && elf_section_data (sec)->this_hdr.contents != contents)
5473 free (contents);
5474 contents = NULL;
5475
5476 if (internal_relocs != NULL
5477 && elf_section_data (sec)->relocs != internal_relocs)
5478 free (internal_relocs);
5479 internal_relocs = NULL;
252b5132
RH		 5480 }
5481
b34976b6 5482 return TRUE;
9a5aca8c 5483
252b5132 5484error_return:
6cdc0ccc
AM		 5485 if (contents != NULL
5486 && elf_section_data (sec)->this_hdr.contents != contents)
5487 free (contents);
5488 if (internal_relocs != NULL
5489 && elf_section_data (sec)->relocs != internal_relocs)
5490 free (internal_relocs);
9a5aca8c 5491
b34976b6 5492 return FALSE;
252b5132 5493}
7e392df6 5494#endif
252b5132 5495
eb043451 5496
c7b8f16e
JB		 5497/* Initialise maps of ARM/Thumb/data for input BFDs. */
5498
5499void
5500bfd_elf32_arm_init_maps (bfd *abfd)
5501{
5502 Elf_Internal_Sym *isymbuf;
5503 Elf_Internal_Shdr *hdr;
5504 unsigned int i, localsyms;
5505
af1f4419
NC		 5506 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5507 if (! is_arm_elf (abfd))
5508 return;
5509
c7b8f16e
JB		 5510 if ((abfd->flags & DYNAMIC) != 0)
5511 return;
5512
0ffa91dd 5513 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5514 localsyms = hdr->sh_info;
5515
5516 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5517 should contain the number of local symbols, which should come before any
5518 global symbols. Mapping symbols are always local. */
5519 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5520 NULL);
5521
5522 /* No internal symbols read? Skip this BFD. */
5523 if (isymbuf == NULL)
5524 return;
5525
5526 for (i = 0; i < localsyms; i++)
5527 {
5528 Elf_Internal_Sym *isym = &isymbuf[i];
5529 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5530 const char *name;
906e58ca 5531
c7b8f16e
JB		 5532 if (sec != NULL
5533 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5534 {
5535 name = bfd_elf_string_from_elf_section (abfd,
5536 hdr->sh_link, isym->st_name);
906e58ca 5537
c7b8f16e
JB		 5538 if (bfd_is_arm_special_symbol_name (name,
5539 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5540 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5541 }
5542 }
5543}
5544
5545
48229727
JB		 5546/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5547 say what they wanted. */
5548
5549void
5550bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5551{
5552 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5553 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5554
5555 if (globals->fix_cortex_a8 == -1)
5556 {
5557 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5558 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5559 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5560 || out_attr[Tag_CPU_arch_profile].i == 0))
5561 globals->fix_cortex_a8 = 1;
5562 else
5563 globals->fix_cortex_a8 = 0;
5564 }
5565}
5566
5567
c7b8f16e
JB		 5568void
5569bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5570{
5571 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5572 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5573
c7b8f16e
JB		 5574 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5575 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5576 {
5577 switch (globals->vfp11_fix)
5578 {
5579 case BFD_ARM_VFP11_FIX_DEFAULT:
5580 case BFD_ARM_VFP11_FIX_NONE:
5581 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5582 break;
906e58ca 5583
c7b8f16e
JB		 5584 default:
5585 /* Give a warning, but do as the user requests anyway. */
5586 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5587 "workaround is not necessary for target architecture"), obfd);
5588 }
5589 }
5590 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5591 /* For earlier architectures, we might need the workaround, but do not
5592 enable it by default. If users is running with broken hardware, they
5593 must enable the erratum fix explicitly. */
5594 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5595}
5596
5597
906e58ca
NC		 5598enum bfd_arm_vfp11_pipe
5599{
c7b8f16e
JB		 5600 VFP11_FMAC,
5601 VFP11_LS,
5602 VFP11_DS,
5603 VFP11_BAD
5604};
5605
5606/* Return a VFP register number. This is encoded as RX:X for single-precision
5607 registers, or X:RX for double-precision registers, where RX is the group of
5608 four bits in the instruction encoding and X is the single extension bit.
5609 RX and X fields are specified using their lowest (starting) bit. The return
5610 value is:
5611
5612 0...31: single-precision registers s0...s31
5613 32...63: double-precision registers d0...d31.
906e58ca 5614
c7b8f16e
JB		 5615 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5616 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5617
c7b8f16e
JB		 5618static unsigned int
5619bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5620 unsigned int x)
5621{
5622 if (is_double)
5623 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5624 else
5625 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5626}
5627
5628/* Set bits in *WMASK according to a register number REG as encoded by
5629 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5630
5631static void
5632bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5633{
5634 if (reg < 32)
5635 *wmask |= 1 << reg;
5636 else if (reg < 48)
5637 *wmask |= 3 << ((reg - 32) * 2);
5638}
5639
5640/* Return TRUE if WMASK overwrites anything in REGS. */
5641
5642static bfd_boolean
5643bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5644{
5645 int i;
906e58ca 5646
c7b8f16e
JB		 5647 for (i = 0; i < numregs; i++)
5648 {
5649 unsigned int reg = regs[i];
5650
5651 if (reg < 32 && (wmask & (1 << reg)) != 0)
5652 return TRUE;
906e58ca 5653
c7b8f16e
JB		 5654 reg -= 32;
5655
5656 if (reg >= 16)
5657 continue;
906e58ca 5658
c7b8f16e
JB		 5659 if ((wmask & (3 << (reg * 2))) != 0)
5660 return TRUE;
5661 }
906e58ca 5662
c7b8f16e
JB		 5663 return FALSE;
5664}
5665
5666/* In this function, we're interested in two things: finding input registers
5667 for VFP data-processing instructions, and finding the set of registers which
5668 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5669 hold the written set, so FLDM etc. are easy to deal with (we're only
5670 interested in 32 SP registers or 16 dp registers, due to the VFP version
5671 implemented by the chip in question). DP registers are marked by setting
5672 both SP registers in the write mask). */
5673
5674static enum bfd_arm_vfp11_pipe
5675bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5676 int *numregs)
5677{
5678 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
5679 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5680
5681 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5682 {
5683 unsigned int pqrs;
5684 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5685 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5686
5687 pqrs = ((insn & 0x00800000) >> 20)
5688 | ((insn & 0x00300000) >> 19)
5689 | ((insn & 0x00000040) >> 6);
5690
5691 switch (pqrs)
5692 {
5693 case 0: /* fmac[sd]. */
5694 case 1: /* fnmac[sd]. */
5695 case 2: /* fmsc[sd]. */
5696 case 3: /* fnmsc[sd]. */
5697 pipe = VFP11_FMAC;
5698 bfd_arm_vfp11_write_mask (destmask, fd);
5699 regs[0] = fd;
5700 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5701 regs[2] = fm;
5702 *numregs = 3;
5703 break;
5704
5705 case 4: /* fmul[sd]. */
5706 case 5: /* fnmul[sd]. */
5707 case 6: /* fadd[sd]. */
5708 case 7: /* fsub[sd]. */
5709 pipe = VFP11_FMAC;
5710 goto vfp_binop;
5711
5712 case 8: /* fdiv[sd]. */
5713 pipe = VFP11_DS;
5714 vfp_binop:
5715 bfd_arm_vfp11_write_mask (destmask, fd);
5716 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5717 regs[1] = fm;
5718 *numregs = 2;
5719 break;
5720
5721 case 15: /* extended opcode. */
5722 {
5723 unsigned int extn = ((insn >> 15) & 0x1e)
5724 | ((insn >> 7) & 1);
5725
5726 switch (extn)
5727 {
5728 case 0: /* fcpy[sd]. */
5729 case 1: /* fabs[sd]. */
5730 case 2: /* fneg[sd]. */
5731 case 8: /* fcmp[sd]. */
5732 case 9: /* fcmpe[sd]. */
5733 case 10: /* fcmpz[sd]. */
5734 case 11: /* fcmpez[sd]. */
5735 case 16: /* fuito[sd]. */
5736 case 17: /* fsito[sd]. */
5737 case 24: /* ftoui[sd]. */
5738 case 25: /* ftouiz[sd]. */
5739 case 26: /* ftosi[sd]. */
5740 case 27: /* ftosiz[sd]. */
5741 /* These instructions will not bounce due to underflow. */
5742 *numregs = 0;
5743 pipe = VFP11_FMAC;
5744 break;
5745
5746 case 3: /* fsqrt[sd]. */
5747 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5748 registers to cause the erratum in previous instructions. */
5749 bfd_arm_vfp11_write_mask (destmask, fd);
5750 pipe = VFP11_DS;
5751 break;
5752
5753 case 15: /* fcvt{ds,sd}. */
5754 {
5755 int rnum = 0;
5756
5757 bfd_arm_vfp11_write_mask (destmask, fd);
5758
5759 /* Only FCVTSD can underflow. */
5760 if ((insn & 0x100) != 0)
5761 regs[rnum++] = fm;
5762
5763 *numregs = rnum;
5764
5765 pipe = VFP11_FMAC;
5766 }
5767 break;
5768
5769 default:
5770 return VFP11_BAD;
5771 }
5772 }
5773 break;
5774
5775 default:
5776 return VFP11_BAD;
5777 }
5778 }
5779 /* Two-register transfer. */
5780 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5781 {
5782 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5783
c7b8f16e
JB		 5784 if ((insn & 0x100000) == 0)
5785 {
5786 if (is_double)
5787 bfd_arm_vfp11_write_mask (destmask, fm);
5788 else
5789 {
5790 bfd_arm_vfp11_write_mask (destmask, fm);
5791 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5792 }
5793 }
5794
5795 pipe = VFP11_LS;
5796 }
5797 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5798 {
5799 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5800 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5801
c7b8f16e
JB		 5802 switch (puw)
5803 {
5804 case 0: /* Two-reg transfer. We should catch these above. */
5805 abort ();
906e58ca 5806
c7b8f16e
JB		 5807 case 2: /* fldm[sdx]. */
5808 case 3:
5809 case 5:
5810 {
5811 unsigned int i, offset = insn & 0xff;
5812
5813 if (is_double)
5814 offset >>= 1;
5815
5816 for (i = fd; i < fd + offset; i++)
5817 bfd_arm_vfp11_write_mask (destmask, i);
5818 }
5819 break;
906e58ca 5820
c7b8f16e
JB		 5821 case 4: /* fld[sd]. */
5822 case 6:
5823 bfd_arm_vfp11_write_mask (destmask, fd);
5824 break;
906e58ca 5825
c7b8f16e
JB		 5826 default:
5827 return VFP11_BAD;
5828 }
5829
5830 pipe = VFP11_LS;
5831 }
5832 /* Single-register transfer. Note L==0. */
5833 else if ((insn & 0x0f100e10) == 0x0e000a10)
5834 {
5835 unsigned int opcode = (insn >> 21) & 7;
5836 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5837
5838 switch (opcode)
5839 {
5840 case 0: /* fmsr/fmdlr. */
5841 case 1: /* fmdhr. */
5842 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5843 destination register. I don't know if this is exactly right,
5844 but it is the conservative choice. */
5845 bfd_arm_vfp11_write_mask (destmask, fn);
5846 break;
5847
5848 case 7: /* fmxr. */
5849 break;
5850 }
5851
5852 pipe = VFP11_LS;
5853 }
5854
5855 return pipe;
5856}
5857
5858
5859static int elf32_arm_compare_mapping (const void * a, const void * b);
5860
5861
5862/* Look for potentially-troublesome code sequences which might trigger the
5863 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5864 (available from ARM) for details of the erratum. A short version is
5865 described in ld.texinfo. */
5866
5867bfd_boolean
5868bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5869{
5870 asection *sec;
5871 bfd_byte *contents = NULL;
5872 int state = 0;
5873 int regs[3], numregs = 0;
5874 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5875 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5876
c7b8f16e
JB		 5877 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5878 The states transition as follows:
906e58ca 5879
c7b8f16e
JB		 5880 0 -> 1 (vector) or 0 -> 2 (scalar)
5881 A VFP FMAC-pipeline instruction has been seen. Fill
5882 regs[0]..regs[numregs-1] with its input operands. Remember this
5883 instruction in 'first_fmac'.
5884
5885 1 -> 2
5886 Any instruction, except for a VFP instruction which overwrites
5887 regs[*].
906e58ca 5888
c7b8f16e
JB		 5889 1 -> 3 [ -> 0 ] or
5890 2 -> 3 [ -> 0 ]
5891 A VFP instruction has been seen which overwrites any of regs[*].
5892 We must make a veneer! Reset state to 0 before examining next
5893 instruction.
906e58ca 5894
c7b8f16e
JB		 5895 2 -> 0
5896 If we fail to match anything in state 2, reset to state 0 and reset
5897 the instruction pointer to the instruction after 'first_fmac'.
5898
5899 If the VFP11 vector mode is in use, there must be at least two unrelated
5900 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5901 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5902
5903 /* If we are only performing a partial link do not bother
5904 to construct any glue. */
5905 if (link_info->relocatable)
5906 return TRUE;
5907
0ffa91dd
NC		 5908 /* Skip if this bfd does not correspond to an ELF image. */
5909 if (! is_arm_elf (abfd))
5910 return TRUE;
906e58ca 5911
c7b8f16e
JB		 5912 /* We should have chosen a fix type by the time we get here. */
5913 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5914
5915 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5916 return TRUE;
2e6030b9 5917
33a7ffc2
JM		 5918 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5919 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5920 return TRUE;
5921
c7b8f16e
JB		 5922 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5923 {
5924 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5925 struct _arm_elf_section_data *sec_data;
5926
5927 /* If we don't have executable progbits, we're not interested in this
5928 section. Also skip if section is to be excluded. */
5929 if (elf_section_type (sec) != SHT_PROGBITS
5930 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5931 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5932 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5933 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5934 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5935 continue;
5936
5937 sec_data = elf32_arm_section_data (sec);
906e58ca 5938
c7b8f16e
JB		 5939 if (sec_data->mapcount == 0)
5940 continue;
906e58ca 5941
c7b8f16e
JB		 5942 if (elf_section_data (sec)->this_hdr.contents != NULL)
5943 contents = elf_section_data (sec)->this_hdr.contents;
5944 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5945 goto error_return;
5946
5947 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5948 elf32_arm_compare_mapping);
5949
5950 for (span = 0; span < sec_data->mapcount; span++)
5951 {
5952 unsigned int span_start = sec_data->map[span].vma;
5953 unsigned int span_end = (span == sec_data->mapcount - 1)
5954 ? sec->size : sec_data->map[span + 1].vma;
5955 char span_type = sec_data->map[span].type;
906e58ca 5956
c7b8f16e
JB		 5957 /* FIXME: Only ARM mode is supported at present. We may need to
5958 support Thumb-2 mode also at some point. */
5959 if (span_type != 'a')
5960 continue;
5961
5962 for (i = span_start; i < span_end;)
5963 {
5964 unsigned int next_i = i + 4;
5965 unsigned int insn = bfd_big_endian (abfd)
5966 ? (contents[i] << 24)
5967 | (contents[i + 1] << 16)
5968 | (contents[i + 2] << 8)
5969 | contents[i + 3]
5970 : (contents[i + 3] << 24)
5971 | (contents[i + 2] << 16)
5972 | (contents[i + 1] << 8)
5973 | contents[i];
5974 unsigned int writemask = 0;
5975 enum bfd_arm_vfp11_pipe pipe;
5976
5977 switch (state)
5978 {
5979 case 0:
5980 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5981 &numregs);
5982 /* I'm assuming the VFP11 erratum can trigger with denorm
5983 operands on either the FMAC or the DS pipeline. This might
5984 lead to slightly overenthusiastic veneer insertion. */
5985 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5986 {
5987 state = use_vector ? 1 : 2;
5988 first_fmac = i;
5989 veneer_of_insn = insn;
5990 }
5991 break;
5992
5993 case 1:
5994 {
5995 int other_regs[3], other_numregs;
5996 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5997 other_regs,
5998 &other_numregs);
5999 if (pipe != VFP11_BAD
6000 && bfd_arm_vfp11_antidependency (writemask, regs,
6001 numregs))
6002 state = 3;
6003 else
6004 state = 2;
6005 }
6006 break;
6007
6008 case 2:
6009 {
6010 int other_regs[3], other_numregs;
6011 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6012 other_regs,
6013 &other_numregs);
6014 if (pipe != VFP11_BAD
6015 && bfd_arm_vfp11_antidependency (writemask, regs,
6016 numregs))
6017 state = 3;
6018 else
6019 {
6020 state = 0;
6021 next_i = first_fmac + 4;
6022 }
6023 }
6024 break;
6025
6026 case 3:
6027 abort (); /* Should be unreachable. */
6028 }
6029
6030 if (state == 3)
6031 {
6032 elf32_vfp11_erratum_list *newerr
6033 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6034 int errcount;
6035
6036 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
6037
6038 newerr->u.b.vfp_insn = veneer_of_insn;
6039
6040 switch (span_type)
6041 {
6042 case 'a':
6043 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6044 break;
906e58ca 6045
c7b8f16e
JB		 6046 default:
6047 abort ();
6048 }
6049
6050 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6051 first_fmac);
6052
6053 newerr->vma = -1;
6054
6055 newerr->next = sec_data->erratumlist;
6056 sec_data->erratumlist = newerr;
6057
6058 state = 0;
6059 }
6060
6061 i = next_i;
6062 }
6063 }
906e58ca 6064
c7b8f16e
JB		 6065 if (contents != NULL
6066 && elf_section_data (sec)->this_hdr.contents != contents)
6067 free (contents);
6068 contents = NULL;
6069 }
6070
6071 return TRUE;
6072
6073error_return:
6074 if (contents != NULL
6075 && elf_section_data (sec)->this_hdr.contents != contents)
6076 free (contents);
906e58ca 6077
c7b8f16e
JB		 6078 return FALSE;
6079}
6080
6081/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6082 after sections have been laid out, using specially-named symbols. */
6083
6084void
6085bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6086 struct bfd_link_info *link_info)
6087{
6088 asection *sec;
6089 struct elf32_arm_link_hash_table *globals;
6090 char *tmp_name;
906e58ca 6091
c7b8f16e
JB		 6092 if (link_info->relocatable)
6093 return;
2e6030b9
MS		 6094
6095 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6096 if (! is_arm_elf (abfd))
2e6030b9
MS		 6097 return;
6098
c7b8f16e 6099 globals = elf32_arm_hash_table (link_info);
906e58ca 6100
c7b8f16e
JB		 6101 tmp_name = bfd_malloc ((bfd_size_type) strlen
6102 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6103
6104 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6105 {
6106 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6107 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6108
c7b8f16e
JB		 6109 for (; errnode != NULL; errnode = errnode->next)
6110 {
6111 struct elf_link_hash_entry *myh;
6112 bfd_vma vma;
6113
6114 switch (errnode->type)
6115 {
6116 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6117 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6118 /* Find veneer symbol. */
6119 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6120 errnode->u.b.veneer->u.v.id);
6121
6122 myh = elf_link_hash_lookup
6123 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6124
6125 if (myh == NULL)
6126 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6127 "`%s'"), abfd, tmp_name);
6128
6129 vma = myh->root.u.def.section->output_section->vma
6130 + myh->root.u.def.section->output_offset
6131 + myh->root.u.def.value;
6132
6133 errnode->u.b.veneer->vma = vma;
6134 break;
6135
6136 case VFP11_ERRATUM_ARM_VENEER:
6137 case VFP11_ERRATUM_THUMB_VENEER:
6138 /* Find return location. */
6139 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6140 errnode->u.v.id);
6141
6142 myh = elf_link_hash_lookup
6143 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6144
6145 if (myh == NULL)
6146 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6147 "`%s'"), abfd, tmp_name);
6148
6149 vma = myh->root.u.def.section->output_section->vma
6150 + myh->root.u.def.section->output_offset
6151 + myh->root.u.def.value;
6152
6153 errnode->u.v.branch->vma = vma;
6154 break;
906e58ca 6155
c7b8f16e
JB		 6156 default:
6157 abort ();
6158 }
6159 }
6160 }
906e58ca 6161
c7b8f16e
JB		 6162 free (tmp_name);
6163}
6164
6165
eb043451
PB		 6166/* Set target relocation values needed during linking. */
6167
6168void
bf21ed78
MS		 6169bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6170 struct bfd_link_info *link_info,
eb043451 6171 int target1_is_rel,
319850b4 6172 char * target2_type,
33bfe774 6173 int fix_v4bx,
c7b8f16e 6174 int use_blx,
bf21ed78 6175 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6176 int no_enum_warn, int no_wchar_warn,
48229727 6177 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6178{
6179 struct elf32_arm_link_hash_table *globals;
6180
6181 globals = elf32_arm_hash_table (link_info);
6182
6183 globals->target1_is_rel = target1_is_rel;
6184 if (strcmp (target2_type, "rel") == 0)
6185 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6186 else if (strcmp (target2_type, "abs") == 0)
6187 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6188 else if (strcmp (target2_type, "got-rel") == 0)
6189 globals->target2_reloc = R_ARM_GOT_PREL;
6190 else
6191 {
6192 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6193 target2_type);
6194 }
319850b4 6195 globals->fix_v4bx = fix_v4bx;
33bfe774 6196 globals->use_blx |= use_blx;
c7b8f16e 6197 globals->vfp11_fix = vfp11_fix;
27e55c4d 6198 globals->pic_veneer = pic_veneer;
48229727 6199 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6200
0ffa91dd
NC		 6201 BFD_ASSERT (is_arm_elf (output_bfd));
6202 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6203 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6204}
eb043451 6205
12a0a0fd 6206/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6207
12a0a0fd
PB		 6208static void
6209insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6210{
6211 bfd_vma upper;
6212 bfd_vma lower;
6213 int reloc_sign;
6214
6215 BFD_ASSERT ((offset & 1) == 0);
6216
6217 upper = bfd_get_16 (abfd, insn);
6218 lower = bfd_get_16 (abfd, insn + 2);
6219 reloc_sign = (offset < 0) ? 1 : 0;
6220 upper = (upper & ~(bfd_vma) 0x7ff)
6221 | ((offset >> 12) & 0x3ff)
6222 | (reloc_sign << 10);
906e58ca 6223 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6224 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6225 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6226 | ((offset >> 1) & 0x7ff);
6227 bfd_put_16 (abfd, upper, insn);
6228 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6229}
6230
9b485d32
NC		 6231/* Thumb code calling an ARM function. */
6232
252b5132 6233static int
57e8b36a
NC		 6234elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6235 const char * name,
6236 bfd * input_bfd,
6237 bfd * output_bfd,
6238 asection * input_section,
6239 bfd_byte * hit_data,
6240 asection * sym_sec,
6241 bfd_vma offset,
6242 bfd_signed_vma addend,
f2a9dd69
DJ		 6243 bfd_vma val,
6244 char **error_message)
252b5132 6245{
bcbdc74c 6246 asection * s = 0;
dc810e39 6247 bfd_vma my_offset;
252b5132 6248 long int ret_offset;
bcbdc74c
NC		 6249 struct elf_link_hash_entry * myh;
6250 struct elf32_arm_link_hash_table * globals;
252b5132 6251
f2a9dd69 6252 myh = find_thumb_glue (info, name, error_message);
252b5132 6253 if (myh == NULL)
b34976b6 6254 return FALSE;
252b5132
RH		 6255
6256 globals = elf32_arm_hash_table (info);
6257
6258 BFD_ASSERT (globals != NULL);
6259 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6260
6261 my_offset = myh->root.u.def.value;
6262
6263 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6264 THUMB2ARM_GLUE_SECTION_NAME);
6265
6266 BFD_ASSERT (s != NULL);
6267 BFD_ASSERT (s->contents != NULL);
6268 BFD_ASSERT (s->output_section != NULL);
6269
6270 if ((my_offset & 0x01) == 0x01)
6271 {
6272 if (sym_sec != NULL
6273 && sym_sec->owner != NULL
6274 && !INTERWORK_FLAG (sym_sec->owner))
6275 {
8f615d07 6276 (*_bfd_error_handler)
d003868e
AM		 6277 (_("%B(%s): warning: interworking not enabled.\n"
6278 " first occurrence: %B: thumb call to arm"),
6279 sym_sec->owner, input_bfd, name);
252b5132 6280
b34976b6 6281 return FALSE;
252b5132
RH		 6282 }
6283
6284 --my_offset;
6285 myh->root.u.def.value = my_offset;
6286
52ab56c2
PB		 6287 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6288 s->contents + my_offset);
252b5132 6289
52ab56c2
PB		 6290 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6291 s->contents + my_offset + 2);
252b5132
RH		 6292
6293 ret_offset =
9b485d32
NC		 6294 /* Address of destination of the stub. */
6295 ((bfd_signed_vma) val)
252b5132 6296 - ((bfd_signed_vma)
57e8b36a
NC		 6297 /* Offset from the start of the current section
6298 to the start of the stubs. */
9b485d32
NC		 6299 (s->output_offset
6300 /* Offset of the start of this stub from the start of the stubs. */
6301 + my_offset
6302 /* Address of the start of the current section. */
6303 + s->output_section->vma)
6304 /* The branch instruction is 4 bytes into the stub. */
6305 + 4
6306 /* ARM branches work from the pc of the instruction + 8. */
6307 + 8);
252b5132 6308
52ab56c2
PB		 6309 put_arm_insn (globals, output_bfd,
6310 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6311 s->contents + my_offset + 4);
252b5132
RH		 6312 }
6313
6314 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6315
427bfd90
NC		 6316 /* Now go back and fix up the original BL insn to point to here. */
6317 ret_offset =
6318 /* Address of where the stub is located. */
6319 (s->output_section->vma + s->output_offset + my_offset)
6320 /* Address of where the BL is located. */
57e8b36a
NC		 6321 - (input_section->output_section->vma + input_section->output_offset
6322 + offset)
427bfd90
NC		 6323 /* Addend in the relocation. */
6324 - addend
6325 /* Biassing for PC-relative addressing. */
6326 - 8;
252b5132 6327
12a0a0fd 6328 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6329
b34976b6 6330 return TRUE;
252b5132
RH		 6331}
6332
a4fd1a8e 6333/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6334
a4fd1a8e
PB		 6335static struct elf_link_hash_entry *
6336elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6337 const char * name,
6338 bfd * input_bfd,
6339 bfd * output_bfd,
6340 asection * sym_sec,
6341 bfd_vma val,
8029a119
NC		 6342 asection * s,
6343 char ** error_message)
252b5132 6344{
dc810e39 6345 bfd_vma my_offset;
252b5132 6346 long int ret_offset;
bcbdc74c
NC		 6347 struct elf_link_hash_entry * myh;
6348 struct elf32_arm_link_hash_table * globals;
252b5132 6349
f2a9dd69 6350 myh = find_arm_glue (info, name, error_message);
252b5132 6351 if (myh == NULL)
a4fd1a8e 6352 return NULL;
252b5132
RH		 6353
6354 globals = elf32_arm_hash_table (info);
6355
6356 BFD_ASSERT (globals != NULL);
6357 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6358
6359 my_offset = myh->root.u.def.value;
252b5132
RH		 6360
6361 if ((my_offset & 0x01) == 0x01)
6362 {
6363 if (sym_sec != NULL
6364 && sym_sec->owner != NULL
6365 && !INTERWORK_FLAG (sym_sec->owner))
6366 {
8f615d07 6367 (*_bfd_error_handler)
d003868e
AM		 6368 (_("%B(%s): warning: interworking not enabled.\n"
6369 " first occurrence: %B: arm call to thumb"),
6370 sym_sec->owner, input_bfd, name);
252b5132 6371 }
9b485d32 6372
252b5132
RH		 6373 --my_offset;
6374 myh->root.u.def.value = my_offset;
6375
27e55c4d
PB		 6376 if (info->shared || globals->root.is_relocatable_executable
6377 || globals->pic_veneer)
8f6277f5
PB		 6378 {
6379 /* For relocatable objects we can't use absolute addresses,
6380 so construct the address from a relative offset. */
6381 /* TODO: If the offset is small it's probably worth
6382 constructing the address with adds. */
52ab56c2
PB		 6383 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6384 s->contents + my_offset);
6385 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6386 s->contents + my_offset + 4);
6387 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6388 s->contents + my_offset + 8);
8f6277f5
PB		 6389 /* Adjust the offset by 4 for the position of the add,
6390 and 8 for the pipeline offset. */
6391 ret_offset = (val - (s->output_offset
6392 + s->output_section->vma
6393 + my_offset + 12))
6394 | 1;
6395 bfd_put_32 (output_bfd, ret_offset,
6396 s->contents + my_offset + 12);
6397 }
26079076
PB		 6398 else if (globals->use_blx)
6399 {
6400 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6401 s->contents + my_offset);
6402
6403 /* It's a thumb address. Add the low order bit. */
6404 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6405 s->contents + my_offset + 4);
6406 }
8f6277f5
PB		 6407 else
6408 {
52ab56c2
PB		 6409 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6410 s->contents + my_offset);
252b5132 6411
52ab56c2
PB		 6412 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6413 s->contents + my_offset + 4);
252b5132 6414
8f6277f5
PB		 6415 /* It's a thumb address. Add the low order bit. */
6416 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6417 s->contents + my_offset + 8);
8029a119
NC		 6418
6419 my_offset += 12;
8f6277f5 6420 }
252b5132
RH		 6421 }
6422
6423 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6424
a4fd1a8e
PB		 6425 return myh;
6426}
6427
6428/* Arm code calling a Thumb function. */
6429
6430static int
6431elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6432 const char * name,
6433 bfd * input_bfd,
6434 bfd * output_bfd,
6435 asection * input_section,
6436 bfd_byte * hit_data,
6437 asection * sym_sec,
6438 bfd_vma offset,
6439 bfd_signed_vma addend,
f2a9dd69
DJ		 6440 bfd_vma val,
6441 char **error_message)
a4fd1a8e
PB		 6442{
6443 unsigned long int tmp;
6444 bfd_vma my_offset;
6445 asection * s;
6446 long int ret_offset;
6447 struct elf_link_hash_entry * myh;
6448 struct elf32_arm_link_hash_table * globals;
6449
6450 globals = elf32_arm_hash_table (info);
6451
6452 BFD_ASSERT (globals != NULL);
6453 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6454
6455 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6456 ARM2THUMB_GLUE_SECTION_NAME);
6457 BFD_ASSERT (s != NULL);
6458 BFD_ASSERT (s->contents != NULL);
6459 BFD_ASSERT (s->output_section != NULL);
6460
6461 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6462 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6463 if (!myh)
6464 return FALSE;
6465
6466 my_offset = myh->root.u.def.value;
252b5132
RH		 6467 tmp = bfd_get_32 (input_bfd, hit_data);
6468 tmp = tmp & 0xFF000000;
6469
9b485d32 6470 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6471 ret_offset = (s->output_offset
6472 + my_offset
6473 + s->output_section->vma
6474 - (input_section->output_offset
6475 + input_section->output_section->vma
6476 + offset + addend)
6477 - 8);
9a5aca8c 6478
252b5132
RH		 6479 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6480
dc810e39 6481 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6482
b34976b6 6483 return TRUE;
252b5132
RH		 6484}
6485
a4fd1a8e
PB		 6486/* Populate Arm stub for an exported Thumb function. */
6487
6488static bfd_boolean
6489elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6490{
6491 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6492 asection * s;
6493 struct elf_link_hash_entry * myh;
6494 struct elf32_arm_link_hash_entry *eh;
6495 struct elf32_arm_link_hash_table * globals;
6496 asection *sec;
6497 bfd_vma val;
f2a9dd69 6498 char *error_message;
a4fd1a8e 6499
906e58ca 6500 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6501 /* Allocate stubs for exported Thumb functions on v4t. */
6502 if (eh->export_glue == NULL)
6503 return TRUE;
6504
6505 globals = elf32_arm_hash_table (info);
6506
6507 BFD_ASSERT (globals != NULL);
6508 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6509
6510 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6511 ARM2THUMB_GLUE_SECTION_NAME);
6512 BFD_ASSERT (s != NULL);
6513 BFD_ASSERT (s->contents != NULL);
6514 BFD_ASSERT (s->output_section != NULL);
6515
6516 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6517
6518 BFD_ASSERT (sec->output_section != NULL);
6519
a4fd1a8e
PB		 6520 val = eh->export_glue->root.u.def.value + sec->output_offset
6521 + sec->output_section->vma;
8029a119 6522
a4fd1a8e
PB		 6523 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6524 h->root.u.def.section->owner,
f2a9dd69
DJ		 6525 globals->obfd, sec, val, s,
6526 &error_message);
a4fd1a8e
PB		 6527 BFD_ASSERT (myh);
6528 return TRUE;
6529}
6530
845b51d6
PB		 6531/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6532
6533static bfd_vma
6534elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6535{
6536 bfd_byte *p;
6537 bfd_vma glue_addr;
6538 asection *s;
6539 struct elf32_arm_link_hash_table *globals;
6540
6541 globals = elf32_arm_hash_table (info);
6542
6543 BFD_ASSERT (globals != NULL);
6544 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6545
6546 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6547 ARM_BX_GLUE_SECTION_NAME);
6548 BFD_ASSERT (s != NULL);
6549 BFD_ASSERT (s->contents != NULL);
6550 BFD_ASSERT (s->output_section != NULL);
6551
6552 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6553
6554 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6555
6556 if ((globals->bx_glue_offset[reg] & 1) == 0)
6557 {
6558 p = s->contents + glue_addr;
6559 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6560 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6561 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6562 globals->bx_glue_offset[reg] |= 1;
6563 }
6564
6565 return glue_addr + s->output_section->vma + s->output_offset;
6566}
6567
a4fd1a8e
PB		 6568/* Generate Arm stubs for exported Thumb symbols. */
6569static void
906e58ca 6570elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6571 struct bfd_link_info *link_info)
6572{
6573 struct elf32_arm_link_hash_table * globals;
6574
8029a119
NC		 6575 if (link_info == NULL)
6576 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6577 return;
6578
6579 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6580 /* If blx is available then exported Thumb symbols are OK and there is
6581 nothing to do. */
a4fd1a8e
PB		 6582 if (globals->use_blx)
6583 return;
6584
6585 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6586 link_info);
6587}
6588
eb043451
PB		 6589/* Some relocations map to different relocations depending on the
6590 target. Return the real relocation. */
8029a119 6591
eb043451
PB		 6592static int
6593arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6594 int r_type)
6595{
6596 switch (r_type)
6597 {
6598 case R_ARM_TARGET1:
6599 if (globals->target1_is_rel)
6600 return R_ARM_REL32;
6601 else
6602 return R_ARM_ABS32;
6603
6604 case R_ARM_TARGET2:
6605 return globals->target2_reloc;
6606
6607 default:
6608 return r_type;
6609 }
6610}
eb043451 6611
ba93b8ac
DJ		 6612/* Return the base VMA address which should be subtracted from real addresses
6613 when resolving @dtpoff relocation.
6614 This is PT_TLS segment p_vaddr. */
6615
6616static bfd_vma
6617dtpoff_base (struct bfd_link_info *info)
6618{
6619 /* If tls_sec is NULL, we should have signalled an error already. */
6620 if (elf_hash_table (info)->tls_sec == NULL)
6621 return 0;
6622 return elf_hash_table (info)->tls_sec->vma;
6623}
6624
6625/* Return the relocation value for @tpoff relocation
6626 if STT_TLS virtual address is ADDRESS. */
6627
6628static bfd_vma
6629tpoff (struct bfd_link_info *info, bfd_vma address)
6630{
6631 struct elf_link_hash_table *htab = elf_hash_table (info);
6632 bfd_vma base;
6633
6634 /* If tls_sec is NULL, we should have signalled an error already. */
6635 if (htab->tls_sec == NULL)
6636 return 0;
6637 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6638 return address - htab->tls_sec->vma + base;
6639}
6640
00a97672
RS		 6641/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6642 VALUE is the relocation value. */
6643
6644static bfd_reloc_status_type
6645elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6646{
6647 if (value > 0xfff)
6648 return bfd_reloc_overflow;
6649
6650 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6651 bfd_put_32 (abfd, value, data);
6652 return bfd_reloc_ok;
6653}
6654
4962c51a
MS		 6655/* For a given value of n, calculate the value of G_n as required to
6656 deal with group relocations. We return it in the form of an
6657 encoded constant-and-rotation, together with the final residual. If n is
6658 specified as less than zero, then final_residual is filled with the
6659 input value and no further action is performed. */
6660
6661static bfd_vma
6662calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6663{
6664 int current_n;
6665 bfd_vma g_n;
6666 bfd_vma encoded_g_n = 0;
6667 bfd_vma residual = value; /* Also known as Y_n. */
6668
6669 for (current_n = 0; current_n <= n; current_n++)
6670 {
6671 int shift;
6672
6673 /* Calculate which part of the value to mask. */
6674 if (residual == 0)
6675 shift = 0;
6676 else
6677 {
6678 int msb;
6679
6680 /* Determine the most significant bit in the residual and
6681 align the resulting value to a 2-bit boundary. */
6682 for (msb = 30; msb >= 0; msb -= 2)
6683 if (residual & (3 << msb))
6684 break;
6685
6686 /* The desired shift is now (msb - 6), or zero, whichever
6687 is the greater. */
6688 shift = msb - 6;
6689 if (shift < 0)
6690 shift = 0;
6691 }
6692
6693 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6694 g_n = residual & (0xff << shift);
6695 encoded_g_n = (g_n >> shift)
6696 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6697
6698 /* Calculate the residual for the next time around. */
6699 residual &= ~g_n;
6700 }
6701
6702 *final_residual = residual;
6703
6704 return encoded_g_n;
6705}
6706
6707/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6708 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6709
4962c51a 6710static int
906e58ca 6711identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6712{
6713 int opcode = insn & 0x1e00000;
6714
6715 if (opcode == 1 << 23) /* ADD */
6716 return 1;
6717
6718 if (opcode == 1 << 22) /* SUB */
6719 return -1;
6720
6721 return 0;
6722}
6723
252b5132 6724/* Perform a relocation as part of a final link. */
9b485d32 6725
252b5132 6726static bfd_reloc_status_type
57e8b36a
NC		 6727elf32_arm_final_link_relocate (reloc_howto_type * howto,
6728 bfd * input_bfd,
6729 bfd * output_bfd,
6730 asection * input_section,
6731 bfd_byte * contents,
6732 Elf_Internal_Rela * rel,
6733 bfd_vma value,
6734 struct bfd_link_info * info,
6735 asection * sym_sec,
6736 const char * sym_name,
6737 int sym_flags,
0945cdfd 6738 struct elf_link_hash_entry * h,
f2a9dd69 6739 bfd_boolean * unresolved_reloc_p,
8029a119 6740 char ** error_message)
252b5132
RH		 6741{
6742 unsigned long r_type = howto->type;
6743 unsigned long r_symndx;
6744 bfd_byte * hit_data = contents + rel->r_offset;
6745 bfd * dynobj = NULL;
6746 Elf_Internal_Shdr * symtab_hdr;
6747 struct elf_link_hash_entry ** sym_hashes;
6748 bfd_vma * local_got_offsets;
6749 asection * sgot = NULL;
6750 asection * splt = NULL;
6751 asection * sreloc = NULL;
252b5132 6752 bfd_vma addend;
ba96a88f
NC		 6753 bfd_signed_vma signed_addend;
6754 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6755
9c504268
PB		 6756 globals = elf32_arm_hash_table (info);
6757
0ffa91dd
NC		 6758 BFD_ASSERT (is_arm_elf (input_bfd));
6759
6760 /* Some relocation types map to different relocations depending on the
9c504268 6761 target. We pick the right one here. */
eb043451
PB		 6762 r_type = arm_real_reloc_type (globals, r_type);
6763 if (r_type != howto->type)
6764 howto = elf32_arm_howto_from_type (r_type);
9c504268 6765
cac15327
NC		 6766 /* If the start address has been set, then set the EF_ARM_HASENTRY
6767 flag. Setting this more than once is redundant, but the cost is
6768 not too high, and it keeps the code simple.
99e4ae17 6769
cac15327
NC		 6770 The test is done here, rather than somewhere else, because the
6771 start address is only set just before the final link commences.
6772
6773 Note - if the user deliberately sets a start address of 0, the
6774 flag will not be set. */
6775 if (bfd_get_start_address (output_bfd) != 0)
6776 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6777
252b5132
RH		 6778 dynobj = elf_hash_table (info)->dynobj;
6779 if (dynobj)
6780 {
6781 sgot = bfd_get_section_by_name (dynobj, ".got");
6782 splt = bfd_get_section_by_name (dynobj, ".plt");
6783 }
0ffa91dd 6784 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6785 sym_hashes = elf_sym_hashes (input_bfd);
6786 local_got_offsets = elf_local_got_offsets (input_bfd);
6787 r_symndx = ELF32_R_SYM (rel->r_info);
6788
4e7fd91e 6789 if (globals->use_rel)
ba96a88f 6790 {
4e7fd91e
PB		 6791 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6792
6793 if (addend & ((howto->src_mask + 1) >> 1))
6794 {
6795 signed_addend = -1;
6796 signed_addend &= ~ howto->src_mask;
6797 signed_addend |= addend;
6798 }
6799 else
6800 signed_addend = addend;
ba96a88f
NC		 6801 }
6802 else
4e7fd91e 6803 addend = signed_addend = rel->r_addend;
f21f3fe0 6804
252b5132
RH		 6805 switch (r_type)
6806 {
6807 case R_ARM_NONE:
28a094c2
DJ		 6808 /* We don't need to find a value for this symbol. It's just a
6809 marker. */
6810 *unresolved_reloc_p = FALSE;
252b5132
RH		 6811 return bfd_reloc_ok;
6812
00a97672
RS		 6813 case R_ARM_ABS12:
6814 if (!globals->vxworks_p)
6815 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6816
252b5132
RH		 6817 case R_ARM_PC24:
6818 case R_ARM_ABS32:
bb224fc3 6819 case R_ARM_ABS32_NOI:
252b5132 6820 case R_ARM_REL32:
bb224fc3 6821 case R_ARM_REL32_NOI:
5b5bb741
PB		 6822 case R_ARM_CALL:
6823 case R_ARM_JUMP24:
dfc5f959 6824 case R_ARM_XPC25:
eb043451 6825 case R_ARM_PREL31:
7359ea65 6826 case R_ARM_PLT32:
7359ea65
DJ		 6827 /* Handle relocations which should use the PLT entry. ABS32/REL32
6828 will use the symbol's value, which may point to a PLT entry, but we
6829 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6830 branches in this object should go to it, except if the PLT is too
6831 far away, in which case a long branch stub should be inserted. */
bb224fc3 6832 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6833 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6834 && r_type != R_ARM_CALL
6835 && r_type != R_ARM_JUMP24
6836 && r_type != R_ARM_PLT32)
7359ea65 6837 && h != NULL
c84cd8ee 6838 && splt != NULL
7359ea65
DJ		 6839 && h->plt.offset != (bfd_vma) -1)
6840 {
c84cd8ee
DJ		 6841 /* If we've created a .plt section, and assigned a PLT entry to
6842 this function, it should not be known to bind locally. If
6843 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6844 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6845
6846 value = (splt->output_section->vma
6847 + splt->output_offset
6848 + h->plt.offset);
0945cdfd 6849 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6850 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6851 contents, rel->r_offset, value,
00a97672 6852 rel->r_addend);
7359ea65
DJ		 6853 }
6854
67687978
PB		 6855 /* When generating a shared object or relocatable executable, these
6856 relocations are copied into the output file to be resolved at
6857 run time. */
6858 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6859 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6860 && !(elf32_arm_hash_table (info)->vxworks_p
6861 && strcmp (input_section->output_section->name,
6862 ".tls_vars") == 0)
bb224fc3 6863 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6864 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6865 && (h == NULL
6866 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6867 || h->root.type != bfd_link_hash_undefweak)
6868 && r_type != R_ARM_PC24
5b5bb741
PB		 6869 && r_type != R_ARM_CALL
6870 && r_type != R_ARM_JUMP24
ee06dc07 6871 && r_type != R_ARM_PREL31
7359ea65 6872 && r_type != R_ARM_PLT32)
252b5132 6873 {
947216bf
AM		 6874 Elf_Internal_Rela outrel;
6875 bfd_byte *loc;
b34976b6 6876 bfd_boolean skip, relocate;
f21f3fe0 6877
0945cdfd
DJ		 6878 *unresolved_reloc_p = FALSE;
6879
252b5132
RH		 6880 if (sreloc == NULL)
6881 {
83bac4b0
NC		 6882 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6883 ! globals->use_rel);
f21f3fe0 6884
83bac4b0 6885 if (sreloc == NULL)
252b5132 6886 return bfd_reloc_notsupported;
252b5132 6887 }
f21f3fe0 6888
b34976b6
AM		 6889 skip = FALSE;
6890 relocate = FALSE;
f21f3fe0 6891
00a97672 6892 outrel.r_addend = addend;
c629eae0
JJ		 6893 outrel.r_offset =
6894 _bfd_elf_section_offset (output_bfd, info, input_section,
6895 rel->r_offset);
6896 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6897 skip = TRUE;
0bb2d96a 6898 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6899 skip = TRUE, relocate = TRUE;
252b5132
RH		 6900 outrel.r_offset += (input_section->output_section->vma
6901 + input_section->output_offset);
f21f3fe0 6902
252b5132 6903 if (skip)
0bb2d96a 6904 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6905 else if (h != NULL
6906 && h->dynindx != -1
7359ea65 6907 && (!info->shared
5e681ec4 6908 || !info->symbolic
f5385ebf 6909 || !h->def_regular))
5e681ec4 6910 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6911 else
6912 {
a16385dc
MM		 6913 int symbol;
6914
5e681ec4 6915 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6916 if (sym_flags == STT_ARM_TFUNC)
6917 value |= 1;
a16385dc 6918 if (globals->symbian_p)
6366ff1e 6919 {
74541ad4
AM		 6920 asection *osec;
6921
6366ff1e
MM		 6922 /* On Symbian OS, the data segment and text segement
6923 can be relocated independently. Therefore, we
6924 must indicate the segment to which this
6925 relocation is relative. The BPABI allows us to
6926 use any symbol in the right segment; we just use
6927 the section symbol as it is convenient. (We
6928 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6929 will not appear in the dynamic symbol table.)
6930
6931 Note that the dynamic linker ignores the section
6932 symbol value, so we don't subtract osec->vma
6933 from the emitted reloc addend. */
10dbd1f3 6934 if (sym_sec)
74541ad4 6935 osec = sym_sec->output_section;
10dbd1f3 6936 else
74541ad4
AM		 6937 osec = input_section->output_section;
6938 symbol = elf_section_data (osec)->dynindx;
6939 if (symbol == 0)
6940 {
6941 struct elf_link_hash_table *htab = elf_hash_table (info);
6942
6943 if ((osec->flags & SEC_READONLY) == 0
6944 && htab->data_index_section != NULL)
6945 osec = htab->data_index_section;
6946 else
6947 osec = htab->text_index_section;
6948 symbol = elf_section_data (osec)->dynindx;
6949 }
6366ff1e
MM		 6950 BFD_ASSERT (symbol != 0);
6951 }
a16385dc
MM		 6952 else
6953 /* On SVR4-ish systems, the dynamic loader cannot
6954 relocate the text and data segments independently,
6955 so the symbol does not matter. */
6956 symbol = 0;
6957 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6958 if (globals->use_rel)
6959 relocate = TRUE;
6960 else
6961 outrel.r_addend += value;
252b5132 6962 }
f21f3fe0 6963
947216bf 6964 loc = sreloc->contents;
00a97672
RS		 6965 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6966 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6967
f21f3fe0 6968 /* If this reloc is against an external symbol, we do not want to
252b5132 6969 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6970 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6971 if (! relocate)
6972 return bfd_reloc_ok;
9a5aca8c 6973
f21f3fe0 6974 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6975 contents, rel->r_offset, value,
6976 (bfd_vma) 0);
6977 }
6978 else switch (r_type)
6979 {
00a97672
RS		 6980 case R_ARM_ABS12:
6981 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6982
dfc5f959 6983 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6984 case R_ARM_CALL:
6985 case R_ARM_JUMP24:
8029a119 6986 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6987 case R_ARM_PLT32:
906e58ca 6988 {
906e58ca
NC		 6989 bfd_signed_vma branch_offset;
6990 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6991
dfc5f959 6992 if (r_type == R_ARM_XPC25)
252b5132 6993 {
dfc5f959
NC		 6994 /* Check for Arm calling Arm function. */
6995 /* FIXME: Should we translate the instruction into a BL
6996 instruction instead ? */
6997 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6998 (*_bfd_error_handler)
6999 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7000 input_bfd,
7001 h ? h->root.root.string : "(local)");
dfc5f959 7002 }
155d87d7 7003 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7004 {
7005 /* Check for Arm calling Thumb function. */
7006 if (sym_flags == STT_ARM_TFUNC)
7007 {
f2a9dd69
DJ		 7008 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7009 output_bfd, input_section,
7010 hit_data, sym_sec, rel->r_offset,
7011 signed_addend, value,
7012 error_message))
7013 return bfd_reloc_ok;
7014 else
7015 return bfd_reloc_dangerous;
dfc5f959 7016 }
252b5132 7017 }
ba96a88f 7018
906e58ca 7019 /* Check if a stub has to be inserted because the
8029a119 7020 destination is too far or we are changing mode. */
155d87d7
CL		 7021 if ( r_type == R_ARM_CALL
7022 || r_type == R_ARM_JUMP24
7023 || r_type == R_ARM_PLT32)
906e58ca 7024 {
ffcb4889
NS		 7025 bfd_vma from;
7026
5fa9e92f
CL		 7027 /* If the call goes through a PLT entry, make sure to
7028 check distance to the right destination address. */
7029 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7030 {
7031 value = (splt->output_section->vma
7032 + splt->output_offset
7033 + h->plt.offset);
7034 *unresolved_reloc_p = FALSE;
7035 }
7036
7037 from = (input_section->output_section->vma
7038 + input_section->output_offset
7039 + rel->r_offset);
7040 branch_offset = (bfd_signed_vma)(value - from);
7041
906e58ca
NC		 7042 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
7043 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 7044 || ((sym_flags == STT_ARM_TFUNC)
7045 && (((r_type == R_ARM_CALL) && !globals->use_blx)
7046 || (r_type == R_ARM_JUMP24)
7047 || (r_type == R_ARM_PLT32) ))
7048 )
906e58ca
NC		 7049 {
7050 /* The target is out of reach, so redirect the
7051 branch to the local stub for this function. */
7052
7053 stub_entry = elf32_arm_get_stub_entry (input_section,
7054 sym_sec, h,
7055 rel, globals);
7056 if (stub_entry != NULL)
7057 value = (stub_entry->stub_offset
7058 + stub_entry->stub_sec->output_offset
7059 + stub_entry->stub_sec->output_section->vma);
7060 }
7061 }
7062
dea514f5
PB		 7063 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7064 where:
7065 S is the address of the symbol in the relocation.
7066 P is address of the instruction being relocated.
7067 A is the addend (extracted from the instruction) in bytes.
7068
7069 S is held in 'value'.
7070 P is the base address of the section containing the
7071 instruction plus the offset of the reloc into that
7072 section, ie:
7073 (input_section->output_section->vma +
7074 input_section->output_offset +
7075 rel->r_offset).
7076 A is the addend, converted into bytes, ie:
7077 (signed_addend * 4)
7078
7079 Note: None of these operations have knowledge of the pipeline
7080 size of the processor, thus it is up to the assembler to
7081 encode this information into the addend. */
7082 value -= (input_section->output_section->vma
7083 + input_section->output_offset);
7084 value -= rel->r_offset;
4e7fd91e
PB		 7085 if (globals->use_rel)
7086 value += (signed_addend << howto->size);
7087 else
7088 /* RELA addends do not have to be adjusted by howto->size. */
7089 value += signed_addend;
23080146 7090
dcb5e6e6
NC		 7091 signed_addend = value;
7092 signed_addend >>= howto->rightshift;
9a5aca8c 7093
5ab79981 7094 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7095 the next instruction unless a PLT entry will be created.
cd1dac3d
DG		 7096 Do the same for local undefined symbols.
7097 The jump to the next instruction is optimized as a NOP depending
7098 on the architecture. */
ffcb4889
NS		 7099 if (h ? (h->root.type == bfd_link_hash_undefweak
7100 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7101 : bfd_is_und_section (sym_sec))
5ab79981 7102 {
cd1dac3d
DG		 7103 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7104
7105 if (arch_has_arm_nop (globals))
7106 value |= 0x0320f000;
7107 else
7108 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7109 }
7110 else
59f2c4e7 7111 {
9b485d32 7112 /* Perform a signed range check. */
dcb5e6e6 7113 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7114 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7115 return bfd_reloc_overflow;
9a5aca8c 7116
5ab79981 7117 addend = (value & 2);
39b41c9c 7118
5ab79981
PB		 7119 value = (signed_addend & howto->dst_mask)
7120 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7121
5ab79981
PB		 7122 if (r_type == R_ARM_CALL)
7123 {
155d87d7
CL		 7124 /* Set the H bit in the BLX instruction. */
7125 if (sym_flags == STT_ARM_TFUNC)
7126 {
7127 if (addend)
7128 value |= (1 << 24);
7129 else
7130 value &= ~(bfd_vma)(1 << 24);
7131 }
7132
5ab79981 7133 /* Select the correct instruction (BL or BLX). */
906e58ca 7134 /* Only if we are not handling a BL to a stub. In this
8029a119 7135 case, mode switching is performed by the stub. */
906e58ca 7136 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7137 value |= (1 << 28);
7138 else
7139 {
7140 value &= ~(bfd_vma)(1 << 28);
7141 value |= (1 << 24);
7142 }
39b41c9c
PB		 7143 }
7144 }
906e58ca 7145 }
252b5132 7146 break;
f21f3fe0 7147
252b5132
RH		 7148 case R_ARM_ABS32:
7149 value += addend;
7150 if (sym_flags == STT_ARM_TFUNC)
7151 value |= 1;
7152 break;
f21f3fe0 7153
bb224fc3
MS		 7154 case R_ARM_ABS32_NOI:
7155 value += addend;
7156 break;
7157
252b5132 7158 case R_ARM_REL32:
a8bc6c78
PB		 7159 value += addend;
7160 if (sym_flags == STT_ARM_TFUNC)
7161 value |= 1;
252b5132 7162 value -= (input_section->output_section->vma
62efb346 7163 + input_section->output_offset + rel->r_offset);
252b5132 7164 break;
eb043451 7165
bb224fc3
MS		 7166 case R_ARM_REL32_NOI:
7167 value += addend;
7168 value -= (input_section->output_section->vma
7169 + input_section->output_offset + rel->r_offset);
7170 break;
7171
eb043451
PB		 7172 case R_ARM_PREL31:
7173 value -= (input_section->output_section->vma
7174 + input_section->output_offset + rel->r_offset);
7175 value += signed_addend;
7176 if (! h || h->root.type != bfd_link_hash_undefweak)
7177 {
8029a119 7178 /* Check for overflow. */
eb043451
PB		 7179 if ((value ^ (value >> 1)) & (1 << 30))
7180 return bfd_reloc_overflow;
7181 }
7182 value &= 0x7fffffff;
7183 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7184 if (sym_flags == STT_ARM_TFUNC)
7185 value |= 1;
7186 break;
252b5132 7187 }
f21f3fe0 7188
252b5132
RH		 7189 bfd_put_32 (input_bfd, value, hit_data);
7190 return bfd_reloc_ok;
7191
7192 case R_ARM_ABS8:
7193 value += addend;
7194 if ((long) value > 0x7f || (long) value < -0x80)
7195 return bfd_reloc_overflow;
7196
7197 bfd_put_8 (input_bfd, value, hit_data);
7198 return bfd_reloc_ok;
7199
7200 case R_ARM_ABS16:
7201 value += addend;
7202
7203 if ((long) value > 0x7fff || (long) value < -0x8000)
7204 return bfd_reloc_overflow;
7205
7206 bfd_put_16 (input_bfd, value, hit_data);
7207 return bfd_reloc_ok;
7208
252b5132 7209 case R_ARM_THM_ABS5:
9b485d32 7210 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7211 if (globals->use_rel)
7212 {
7213 /* Need to refetch addend. */
7214 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7215 /* ??? Need to determine shift amount from operand size. */
7216 addend >>= howto->rightshift;
7217 }
252b5132
RH		 7218 value += addend;
7219
7220 /* ??? Isn't value unsigned? */
7221 if ((long) value > 0x1f || (long) value < -0x10)
7222 return bfd_reloc_overflow;
7223
7224 /* ??? Value needs to be properly shifted into place first. */
7225 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7226 bfd_put_16 (input_bfd, value, hit_data);
7227 return bfd_reloc_ok;
7228
2cab6cc3
MS		 7229 case R_ARM_THM_ALU_PREL_11_0:
7230 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7231 {
7232 bfd_vma insn;
7233 bfd_signed_vma relocation;
7234
7235 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7236 | bfd_get_16 (input_bfd, hit_data + 2);
7237
7238 if (globals->use_rel)
7239 {
7240 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7241 | ((insn & (1 << 26)) >> 15);
7242 if (insn & 0xf00000)
7243 signed_addend = -signed_addend;
7244 }
7245
7246 relocation = value + signed_addend;
7247 relocation -= (input_section->output_section->vma
7248 + input_section->output_offset
7249 + rel->r_offset);
7250
7251 value = abs (relocation);
7252
7253 if (value >= 0x1000)
7254 return bfd_reloc_overflow;
7255
7256 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7257 | ((value & 0x700) << 4)
7258 | ((value & 0x800) << 15);
7259 if (relocation < 0)
7260 insn |= 0xa00000;
7261
7262 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7263 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7264
7265 return bfd_reloc_ok;
7266 }
7267
e1ec24c6
NC		 7268 case R_ARM_THM_PC8:
7269 /* PR 10073: This reloc is not generated by the GNU toolchain,
7270 but it is supported for compatibility with third party libraries
7271 generated by other compilers, specifically the ARM/IAR. */
7272 {
7273 bfd_vma insn;
7274 bfd_signed_vma relocation;
7275
7276 insn = bfd_get_16 (input_bfd, hit_data);
7277
7278 if (globals->use_rel)
7279 addend = (insn & 0x00ff) << 2;
7280
7281 relocation = value + addend;
7282 relocation -= (input_section->output_section->vma
7283 + input_section->output_offset
7284 + rel->r_offset);
7285
7286 value = abs (relocation);
7287
7288 /* We do not check for overflow of this reloc. Although strictly
7289 speaking this is incorrect, it appears to be necessary in order
7290 to work with IAR generated relocs. Since GCC and GAS do not
7291 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7292 a problem for them. */
7293 value &= 0x3fc;
7294
7295 insn = (insn & 0xff00) | (value >> 2);
7296
7297 bfd_put_16 (input_bfd, insn, hit_data);
7298
7299 return bfd_reloc_ok;
7300 }
7301
2cab6cc3
MS		 7302 case R_ARM_THM_PC12:
7303 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7304 {
7305 bfd_vma insn;
7306 bfd_signed_vma relocation;
7307
7308 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7309 | bfd_get_16 (input_bfd, hit_data + 2);
7310
7311 if (globals->use_rel)
7312 {
7313 signed_addend = insn & 0xfff;
7314 if (!(insn & (1 << 23)))
7315 signed_addend = -signed_addend;
7316 }
7317
7318 relocation = value + signed_addend;
7319 relocation -= (input_section->output_section->vma
7320 + input_section->output_offset
7321 + rel->r_offset);
7322
7323 value = abs (relocation);
7324
7325 if (value >= 0x1000)
7326 return bfd_reloc_overflow;
7327
7328 insn = (insn & 0xff7ff000) | value;
7329 if (relocation >= 0)
7330 insn |= (1 << 23);
7331
7332 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7333 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7334
7335 return bfd_reloc_ok;
7336 }
7337
dfc5f959 7338 case R_ARM_THM_XPC22:
c19d1205 7339 case R_ARM_THM_CALL:
bd97cb95 7340 case R_ARM_THM_JUMP24:
dfc5f959 7341 /* Thumb BL (branch long instruction). */
252b5132 7342 {
b34976b6 7343 bfd_vma relocation;
e95de063 7344 bfd_vma reloc_sign;
b34976b6
AM		 7345 bfd_boolean overflow = FALSE;
7346 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7347 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7348 bfd_signed_vma reloc_signed_max;
7349 bfd_signed_vma reloc_signed_min;
b34976b6 7350 bfd_vma check;
252b5132 7351 bfd_signed_vma signed_check;
e95de063 7352 int bitsize;
cd1dac3d 7353 const int thumb2 = using_thumb2 (globals);
252b5132 7354
5ab79981 7355 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7356 the next instruction unless a PLT entry will be created.
7357 The jump to the next instruction is optimized as a NOP.W for
7358 Thumb-2 enabled architectures. */
19540007
JM		 7359 if (h && h->root.type == bfd_link_hash_undefweak
7360 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7361 {
cd1dac3d
DG		 7362 if (arch_has_thumb2_nop (globals))
7363 {
7364 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7365 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7366 }
7367 else
7368 {
7369 bfd_put_16 (input_bfd, 0xe000, hit_data);
7370 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7371 }
5ab79981
PB		 7372 return bfd_reloc_ok;
7373 }
7374
e95de063
MS		 7375 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7376 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7377 if (globals->use_rel)
7378 {
e95de063
MS		 7379 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7380 bfd_vma upper = upper_insn & 0x3ff;
7381 bfd_vma lower = lower_insn & 0x7ff;
7382 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7383 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7384 bfd_vma i1 = j1 ^ s ? 0 : 1;
7385 bfd_vma i2 = j2 ^ s ? 0 : 1;
7386
7387 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7388 /* Sign extend. */
7389 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7390
4e7fd91e
PB		 7391 signed_addend = addend;
7392 }
cb1afa5c 7393
dfc5f959
NC		 7394 if (r_type == R_ARM_THM_XPC22)
7395 {
7396 /* Check for Thumb to Thumb call. */
7397 /* FIXME: Should we translate the instruction into a BL
7398 instruction instead ? */
7399 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7400 (*_bfd_error_handler)
7401 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7402 input_bfd,
7403 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7404 }
7405 else
252b5132 7406 {
dfc5f959
NC		 7407 /* If it is not a call to Thumb, assume call to Arm.
7408 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7409 function call at all, but rather a long jump. Calls through
7410 the PLT do not require stubs. */
7411 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7412 && (h == NULL || splt == NULL
7413 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7414 {
bd97cb95 7415 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7416 {
7417 /* Convert BL to BLX. */
7418 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7419 }
155d87d7
CL		 7420 else if (( r_type != R_ARM_THM_CALL)
7421 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7422 {
7423 if (elf32_thumb_to_arm_stub
7424 (info, sym_name, input_bfd, output_bfd, input_section,
7425 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7426 error_message))
7427 return bfd_reloc_ok;
7428 else
7429 return bfd_reloc_dangerous;
7430 }
da5938a2 7431 }
bd97cb95
DJ		 7432 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7433 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7434 {
7435 /* Make sure this is a BL. */
7436 lower_insn |= 0x1800;
7437 }
252b5132 7438 }
f21f3fe0 7439
b7693d02
DJ		 7440 /* Handle calls via the PLT. */
7441 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7442 {
7443 value = (splt->output_section->vma
7444 + splt->output_offset
7445 + h->plt.offset);
bd97cb95 7446 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7447 {
7448 /* If the Thumb BLX instruction is available, convert the
7449 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7450 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 7451 }
7452 else
7453 /* Target the Thumb stub before the ARM PLT entry. */
7454 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 7455 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7456 }
7457
155d87d7 7458 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7459 {
7460 /* Check if a stub has to be inserted because the destination
8029a119 7461 is too far. */
906e58ca
NC		 7462 bfd_vma from;
7463 bfd_signed_vma branch_offset;
7464 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7465
7466 from = (input_section->output_section->vma
7467 + input_section->output_offset
7468 + rel->r_offset);
7469 branch_offset = (bfd_signed_vma)(value - from);
7470
7471 if ((!thumb2
7472 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7473 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7474 ||
7475 (thumb2
7476 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7477 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7478 || ((sym_flags != STT_ARM_TFUNC)
7479 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7480 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7481 {
7482 /* The target is out of reach or we are changing modes, so
7483 redirect the branch to the local stub for this
7484 function. */
7485 stub_entry = elf32_arm_get_stub_entry (input_section,
7486 sym_sec, h,
7487 rel, globals);
7488 if (stub_entry != NULL)
7489 value = (stub_entry->stub_offset
7490 + stub_entry->stub_sec->output_offset
7491 + stub_entry->stub_sec->output_section->vma);
7492
f4ac8484 7493 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7494 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7495 {
7496 if ((stub_entry
7497 && !arm_stub_is_thumb (stub_entry->stub_type))
7498 || (sym_flags != STT_ARM_TFUNC))
7499 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7500 }
906e58ca
NC		 7501 }
7502 }
7503
ba96a88f 7504 relocation = value + signed_addend;
f21f3fe0 7505
252b5132 7506 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7507 + input_section->output_offset
7508 + rel->r_offset);
9a5aca8c 7509
252b5132
RH		 7510 check = relocation >> howto->rightshift;
7511
7512 /* If this is a signed value, the rightshift just dropped
7513 leading 1 bits (assuming twos complement). */
7514 if ((bfd_signed_vma) relocation >= 0)
7515 signed_check = check;
7516 else
7517 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7518
e95de063
MS		 7519 /* Calculate the permissable maximum and minimum values for
7520 this relocation according to whether we're relocating for
7521 Thumb-2 or not. */
7522 bitsize = howto->bitsize;
7523 if (!thumb2)
7524 bitsize -= 2;
7525 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7526 reloc_signed_min = ~reloc_signed_max;
7527
252b5132 7528 /* Assumes two's complement. */
ba96a88f 7529 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7530 overflow = TRUE;
252b5132 7531
bd97cb95 7532 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7533 /* For a BLX instruction, make sure that the relocation is rounded up
7534 to a word boundary. This follows the semantics of the instruction
7535 which specifies that bit 1 of the target address will come from bit
7536 1 of the base address. */
7537 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7538
e95de063
MS		 7539 /* Put RELOCATION back into the insn. Assumes two's complement.
7540 We use the Thumb-2 encoding, which is safe even if dealing with
7541 a Thumb-1 instruction by virtue of our overflow check above. */
7542 reloc_sign = (signed_check < 0) ? 1 : 0;
7543 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7544 | ((relocation >> 12) & 0x3ff)
7545 | (reloc_sign << 10);
906e58ca 7546 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7547 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7548 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7549 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7550
252b5132
RH		 7551 /* Put the relocated value back in the object file: */
7552 bfd_put_16 (input_bfd, upper_insn, hit_data);
7553 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7554
7555 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7556 }
7557 break;
7558
c19d1205
ZW		 7559 case R_ARM_THM_JUMP19:
7560 /* Thumb32 conditional branch instruction. */
7561 {
7562 bfd_vma relocation;
7563 bfd_boolean overflow = FALSE;
7564 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7565 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7566 bfd_signed_vma reloc_signed_max = 0xffffe;
7567 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7568 bfd_signed_vma signed_check;
7569
7570 /* Need to refetch the addend, reconstruct the top three bits,
7571 and squish the two 11 bit pieces together. */
7572 if (globals->use_rel)
7573 {
7574 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7575 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7576 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7577 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7578 bfd_vma lower = (lower_insn & 0x07ff);
7579
a00a1f35
MS		 7580 upper |= J1 << 6;
7581 upper |= J2 << 7;
7582 upper |= (!S) << 8;
c19d1205
ZW		 7583 upper -= 0x0100; /* Sign extend. */
7584
7585 addend = (upper << 12) | (lower << 1);
7586 signed_addend = addend;
7587 }
7588
bd97cb95
DJ		 7589 /* Handle calls via the PLT. */
7590 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7591 {
7592 value = (splt->output_section->vma
7593 + splt->output_offset
7594 + h->plt.offset);
7595 /* Target the Thumb stub before the ARM PLT entry. */
7596 value -= PLT_THUMB_STUB_SIZE;
7597 *unresolved_reloc_p = FALSE;
7598 }
7599
c19d1205
ZW		 7600 /* ??? Should handle interworking? GCC might someday try to
7601 use this for tail calls. */
7602
7603 relocation = value + signed_addend;
7604 relocation -= (input_section->output_section->vma
7605 + input_section->output_offset
7606 + rel->r_offset);
a00a1f35 7607 signed_check = (bfd_signed_vma) relocation;
c19d1205 7608
c19d1205
ZW		 7609 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7610 overflow = TRUE;
7611
7612 /* Put RELOCATION back into the insn. */
7613 {
7614 bfd_vma S = (relocation & 0x00100000) >> 20;
7615 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7616 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7617 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7618 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7619
a00a1f35 7620 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7621 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7622 }
7623
7624 /* Put the relocated value back in the object file: */
7625 bfd_put_16 (input_bfd, upper_insn, hit_data);
7626 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7627
7628 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7629 }
7630
7631 case R_ARM_THM_JUMP11:
7632 case R_ARM_THM_JUMP8:
7633 case R_ARM_THM_JUMP6:
51c5503b
NC		 7634 /* Thumb B (branch) instruction). */
7635 {
6cf9e9fe 7636 bfd_signed_vma relocation;
51c5503b
NC		 7637 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7638 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7639 bfd_signed_vma signed_check;
7640
c19d1205
ZW		 7641 /* CZB cannot jump backward. */
7642 if (r_type == R_ARM_THM_JUMP6)
7643 reloc_signed_min = 0;
7644
4e7fd91e 7645 if (globals->use_rel)
6cf9e9fe 7646 {
4e7fd91e
PB		 7647 /* Need to refetch addend. */
7648 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7649 if (addend & ((howto->src_mask + 1) >> 1))
7650 {
7651 signed_addend = -1;
7652 signed_addend &= ~ howto->src_mask;
7653 signed_addend |= addend;
7654 }
7655 else
7656 signed_addend = addend;
7657 /* The value in the insn has been right shifted. We need to
7658 undo this, so that we can perform the address calculation
7659 in terms of bytes. */
7660 signed_addend <<= howto->rightshift;
6cf9e9fe 7661 }
6cf9e9fe 7662 relocation = value + signed_addend;
51c5503b
NC		 7663
7664 relocation -= (input_section->output_section->vma
7665 + input_section->output_offset
7666 + rel->r_offset);
7667
6cf9e9fe
NC		 7668 relocation >>= howto->rightshift;
7669 signed_check = relocation;
c19d1205
ZW		 7670
7671 if (r_type == R_ARM_THM_JUMP6)
7672 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7673 else
7674 relocation &= howto->dst_mask;
51c5503b 7675 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7676
51c5503b
NC		 7677 bfd_put_16 (input_bfd, relocation, hit_data);
7678
7679 /* Assumes two's complement. */
7680 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7681 return bfd_reloc_overflow;
7682
7683 return bfd_reloc_ok;
7684 }
cedb70c5 7685
8375c36b
PB		 7686 case R_ARM_ALU_PCREL7_0:
7687 case R_ARM_ALU_PCREL15_8:
7688 case R_ARM_ALU_PCREL23_15:
7689 {
7690 bfd_vma insn;
7691 bfd_vma relocation;
7692
7693 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7694 if (globals->use_rel)
7695 {
7696 /* Extract the addend. */
7697 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7698 signed_addend = addend;
7699 }
8375c36b
PB		 7700 relocation = value + signed_addend;
7701
7702 relocation -= (input_section->output_section->vma
7703 + input_section->output_offset
7704 + rel->r_offset);
7705 insn = (insn & ~0xfff)
7706 | ((howto->bitpos << 7) & 0xf00)
7707 | ((relocation >> howto->bitpos) & 0xff);
7708 bfd_put_32 (input_bfd, value, hit_data);
7709 }
7710 return bfd_reloc_ok;
7711
252b5132
RH		 7712 case R_ARM_GNU_VTINHERIT:
7713 case R_ARM_GNU_VTENTRY:
7714 return bfd_reloc_ok;
7715
c19d1205 7716 case R_ARM_GOTOFF32:
252b5132
RH		 7717 /* Relocation is relative to the start of the
7718 global offset table. */
7719
7720 BFD_ASSERT (sgot != NULL);
7721 if (sgot == NULL)
7722 return bfd_reloc_notsupported;
9a5aca8c 7723
cedb70c5 7724 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7725 address by one, so that attempts to call the function pointer will
7726 correctly interpret it as Thumb code. */
7727 if (sym_flags == STT_ARM_TFUNC)
7728 value += 1;
7729
252b5132
RH		 7730 /* Note that sgot->output_offset is not involved in this
7731 calculation. We always want the start of .got. If we
7732 define _GLOBAL_OFFSET_TABLE in a different way, as is
7733 permitted by the ABI, we might have to change this
9b485d32 7734 calculation. */
252b5132 7735 value -= sgot->output_section->vma;
f21f3fe0 7736 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7737 contents, rel->r_offset, value,
00a97672 7738 rel->r_addend);
252b5132
RH		 7739
7740 case R_ARM_GOTPC:
a7c10850 7741 /* Use global offset table as symbol value. */
252b5132 7742 BFD_ASSERT (sgot != NULL);
f21f3fe0 7743
252b5132
RH		 7744 if (sgot == NULL)
7745 return bfd_reloc_notsupported;
7746
0945cdfd 7747 *unresolved_reloc_p = FALSE;
252b5132 7748 value = sgot->output_section->vma;
f21f3fe0 7749 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7750 contents, rel->r_offset, value,
00a97672 7751 rel->r_addend);
f21f3fe0 7752
252b5132 7753 case R_ARM_GOT32:
eb043451 7754 case R_ARM_GOT_PREL:
252b5132 7755 /* Relocation is to the entry for this symbol in the
9b485d32 7756 global offset table. */
252b5132
RH		 7757 if (sgot == NULL)
7758 return bfd_reloc_notsupported;
f21f3fe0 7759
252b5132
RH		 7760 if (h != NULL)
7761 {
7762 bfd_vma off;
5e681ec4 7763 bfd_boolean dyn;
f21f3fe0 7764
252b5132
RH		 7765 off = h->got.offset;
7766 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7767 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7768
5e681ec4 7769 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7770 || (info->shared
5e681ec4
PB		 7771 && SYMBOL_REFERENCES_LOCAL (info, h))
7772 || (ELF_ST_VISIBILITY (h->other)
7773 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7774 {
7775 /* This is actually a static link, or it is a -Bsymbolic link
7776 and the symbol is defined locally. We must initialize this
7777 entry in the global offset table. Since the offset must
7778 always be a multiple of 4, we use the least significant bit
7779 to record whether we have initialized it already.
f21f3fe0 7780
00a97672 7781 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7782 entry to initialize the value. This is done in the
9b485d32 7783 finish_dynamic_symbol routine. */
252b5132
RH		 7784 if ((off & 1) != 0)
7785 off &= ~1;
7786 else
7787 {
ee29b9fb
RE		 7788 /* If we are addressing a Thumb function, we need to
7789 adjust the address by one, so that attempts to
7790 call the function pointer will correctly
7791 interpret it as Thumb code. */
7792 if (sym_flags == STT_ARM_TFUNC)
7793 value |= 1;
7794
252b5132
RH		 7795 bfd_put_32 (output_bfd, value, sgot->contents + off);
7796 h->got.offset |= 1;
7797 }
7798 }
0945cdfd
DJ		 7799 else
7800 *unresolved_reloc_p = FALSE;
f21f3fe0 7801
252b5132
RH		 7802 value = sgot->output_offset + off;
7803 }
7804 else
7805 {
7806 bfd_vma off;
f21f3fe0 7807
252b5132
RH		 7808 BFD_ASSERT (local_got_offsets != NULL &&
7809 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7810
252b5132 7811 off = local_got_offsets[r_symndx];
f21f3fe0 7812
252b5132
RH		 7813 /* The offset must always be a multiple of 4. We use the
7814 least significant bit to record whether we have already
9b485d32 7815 generated the necessary reloc. */
252b5132
RH		 7816 if ((off & 1) != 0)
7817 off &= ~1;
7818 else
7819 {
b7693d02
DJ		 7820 /* If we are addressing a Thumb function, we need to
7821 adjust the address by one, so that attempts to
7822 call the function pointer will correctly
7823 interpret it as Thumb code. */
7824 if (sym_flags == STT_ARM_TFUNC)
7825 value |= 1;
7826
00a97672
RS		 7827 if (globals->use_rel)
7828 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7829
252b5132
RH		 7830 if (info->shared)
7831 {
7832 asection * srelgot;
947216bf
AM		 7833 Elf_Internal_Rela outrel;
7834 bfd_byte *loc;
f21f3fe0 7835
00a97672
RS		 7836 srelgot = (bfd_get_section_by_name
7837 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7838 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7839
00a97672 7840 outrel.r_addend = addend + value;
252b5132 7841 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7842 + sgot->output_offset
252b5132
RH		 7843 + off);
7844 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7845 loc = srelgot->contents;
00a97672
RS		 7846 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7847 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7848 }
f21f3fe0 7849
252b5132
RH		 7850 local_got_offsets[r_symndx] |= 1;
7851 }
f21f3fe0 7852
252b5132
RH		 7853 value = sgot->output_offset + off;
7854 }
eb043451
PB		 7855 if (r_type != R_ARM_GOT32)
7856 value += sgot->output_section->vma;
9a5aca8c 7857
f21f3fe0 7858 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7859 contents, rel->r_offset, value,
00a97672 7860 rel->r_addend);
f21f3fe0 7861
ba93b8ac
DJ		 7862 case R_ARM_TLS_LDO32:
7863 value = value - dtpoff_base (info);
7864
7865 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7866 contents, rel->r_offset, value,
7867 rel->r_addend);
ba93b8ac
DJ		 7868
7869 case R_ARM_TLS_LDM32:
7870 {
7871 bfd_vma off;
7872
7873 if (globals->sgot == NULL)
7874 abort ();
7875
7876 off = globals->tls_ldm_got.offset;
7877
7878 if ((off & 1) != 0)
7879 off &= ~1;
7880 else
7881 {
7882 /* If we don't know the module number, create a relocation
7883 for it. */
7884 if (info->shared)
7885 {
7886 Elf_Internal_Rela outrel;
7887 bfd_byte *loc;
7888
7889 if (globals->srelgot == NULL)
7890 abort ();
7891
00a97672 7892 outrel.r_addend = 0;
ba93b8ac
DJ		 7893 outrel.r_offset = (globals->sgot->output_section->vma
7894 + globals->sgot->output_offset + off);
7895 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7896
00a97672
RS		 7897 if (globals->use_rel)
7898 bfd_put_32 (output_bfd, outrel.r_addend,
7899 globals->sgot->contents + off);
ba93b8ac
DJ		 7900
7901 loc = globals->srelgot->contents;
00a97672
RS		 7902 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7903 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7904 }
7905 else
7906 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7907
7908 globals->tls_ldm_got.offset |= 1;
7909 }
7910
906e58ca 7911 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7912 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7913
7914 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7915 contents, rel->r_offset, value,
00a97672 7916 rel->r_addend);
ba93b8ac
DJ		 7917 }
7918
7919 case R_ARM_TLS_GD32:
7920 case R_ARM_TLS_IE32:
7921 {
7922 bfd_vma off;
7923 int indx;
7924 char tls_type;
7925
7926 if (globals->sgot == NULL)
7927 abort ();
7928
7929 indx = 0;
7930 if (h != NULL)
7931 {
7932 bfd_boolean dyn;
7933 dyn = globals->root.dynamic_sections_created;
7934 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7935 && (!info->shared
7936 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7937 {
7938 *unresolved_reloc_p = FALSE;
7939 indx = h->dynindx;
7940 }
7941 off = h->got.offset;
7942 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7943 }
7944 else
7945 {
7946 if (local_got_offsets == NULL)
7947 abort ();
7948 off = local_got_offsets[r_symndx];
7949 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7950 }
7951
7952 if (tls_type == GOT_UNKNOWN)
7953 abort ();
7954
7955 if ((off & 1) != 0)
7956 off &= ~1;
7957 else
7958 {
7959 bfd_boolean need_relocs = FALSE;
7960 Elf_Internal_Rela outrel;
7961 bfd_byte *loc = NULL;
7962 int cur_off = off;
7963
7964 /* The GOT entries have not been initialized yet. Do it
7965 now, and emit any relocations. If both an IE GOT and a
7966 GD GOT are necessary, we emit the GD first. */
7967
7968 if ((info->shared || indx != 0)
7969 && (h == NULL
7970 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7971 || h->root.type != bfd_link_hash_undefweak))
7972 {
7973 need_relocs = TRUE;
7974 if (globals->srelgot == NULL)
7975 abort ();
7976 loc = globals->srelgot->contents;
00a97672 7977 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7978 }
7979
7980 if (tls_type & GOT_TLS_GD)
7981 {
7982 if (need_relocs)
7983 {
00a97672 7984 outrel.r_addend = 0;
ba93b8ac 7985 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7986 + globals->sgot->output_offset
7987 + cur_off);
ba93b8ac 7988 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7989
00a97672
RS		 7990 if (globals->use_rel)
7991 bfd_put_32 (output_bfd, outrel.r_addend,
7992 globals->sgot->contents + cur_off);
7993
7994 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7995 globals->srelgot->reloc_count++;
00a97672 7996 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7997
7998 if (indx == 0)
7999 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8000 globals->sgot->contents + cur_off + 4);
8001 else
8002 {
00a97672 8003 outrel.r_addend = 0;
ba93b8ac
DJ		 8004 outrel.r_info = ELF32_R_INFO (indx,
8005 R_ARM_TLS_DTPOFF32);
8006 outrel.r_offset += 4;
00a97672
RS		 8007
8008 if (globals->use_rel)
8009 bfd_put_32 (output_bfd, outrel.r_addend,
8010 globals->sgot->contents + cur_off + 4);
8011
8012
8013 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8014 globals->srelgot->reloc_count++;
00a97672 8015 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8016 }
8017 }
8018 else
8019 {
8020 /* If we are not emitting relocations for a
8021 general dynamic reference, then we must be in a
8022 static link or an executable link with the
8023 symbol binding locally. Mark it as belonging
8024 to module 1, the executable. */
8025 bfd_put_32 (output_bfd, 1,
8026 globals->sgot->contents + cur_off);
8027 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8028 globals->sgot->contents + cur_off + 4);
8029 }
8030
8031 cur_off += 8;
8032 }
8033
8034 if (tls_type & GOT_TLS_IE)
8035 {
8036 if (need_relocs)
8037 {
00a97672
RS		 8038 if (indx == 0)
8039 outrel.r_addend = value - dtpoff_base (info);
8040 else
8041 outrel.r_addend = 0;
ba93b8ac
DJ		 8042 outrel.r_offset = (globals->sgot->output_section->vma
8043 + globals->sgot->output_offset
8044 + cur_off);
8045 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8046
00a97672
RS		 8047 if (globals->use_rel)
8048 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8049 globals->sgot->contents + cur_off);
8050
00a97672 8051 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8052 globals->srelgot->reloc_count++;
00a97672 8053 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8054 }
8055 else
8056 bfd_put_32 (output_bfd, tpoff (info, value),
8057 globals->sgot->contents + cur_off);
8058 cur_off += 4;
8059 }
8060
8061 if (h != NULL)
8062 h->got.offset |= 1;
8063 else
8064 local_got_offsets[r_symndx] |= 1;
8065 }
8066
8067 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8068 off += 8;
906e58ca 8069 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8070 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8071
8072 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8073 contents, rel->r_offset, value,
00a97672 8074 rel->r_addend);
ba93b8ac
DJ		 8075 }
8076
8077 case R_ARM_TLS_LE32:
8078 if (info->shared)
8079 {
8080 (*_bfd_error_handler)
8081 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8082 input_bfd, input_section,
8083 (long) rel->r_offset, howto->name);
906e58ca 8084 return FALSE;
ba93b8ac
DJ		 8085 }
8086 else
8087 value = tpoff (info, value);
906e58ca 8088
ba93b8ac 8089 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8090 contents, rel->r_offset, value,
8091 rel->r_addend);
ba93b8ac 8092
319850b4
JB		 8093 case R_ARM_V4BX:
8094 if (globals->fix_v4bx)
845b51d6
PB		 8095 {
8096 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8097
845b51d6
PB		 8098 /* Ensure that we have a BX instruction. */
8099 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8100
845b51d6
PB		 8101 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8102 {
8103 /* Branch to veneer. */
8104 bfd_vma glue_addr;
8105 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8106 glue_addr -= input_section->output_section->vma
8107 + input_section->output_offset
8108 + rel->r_offset + 8;
8109 insn = (insn & 0xf0000000) | 0x0a000000
8110 | ((glue_addr >> 2) & 0x00ffffff);
8111 }
8112 else
8113 {
8114 /* Preserve Rm (lowest four bits) and the condition code
8115 (highest four bits). Other bits encode MOV PC,Rm. */
8116 insn = (insn & 0xf000000f) | 0x01a0f000;
8117 }
319850b4 8118
845b51d6
PB		 8119 bfd_put_32 (input_bfd, insn, hit_data);
8120 }
319850b4
JB		 8121 return bfd_reloc_ok;
8122
b6895b4f
PB		 8123 case R_ARM_MOVW_ABS_NC:
8124 case R_ARM_MOVT_ABS:
8125 case R_ARM_MOVW_PREL_NC:
8126 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8127 /* Until we properly support segment-base-relative addressing then
8128 we assume the segment base to be zero, as for the group relocations.
8129 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8130 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8131 case R_ARM_MOVW_BREL_NC:
8132 case R_ARM_MOVW_BREL:
8133 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8134 {
8135 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8136
8137 if (globals->use_rel)
8138 {
8139 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8140 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8141 }
92f5d02b 8142
b6895b4f 8143 value += signed_addend;
b6895b4f
PB		 8144
8145 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8146 value -= (input_section->output_section->vma
8147 + input_section->output_offset + rel->r_offset);
8148
92f5d02b
MS		 8149 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8150 return bfd_reloc_overflow;
8151
8152 if (sym_flags == STT_ARM_TFUNC)
8153 value |= 1;
8154
8155 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8156 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8157 value >>= 16;
8158
8159 insn &= 0xfff0f000;
8160 insn |= value & 0xfff;
8161 insn |= (value & 0xf000) << 4;
8162 bfd_put_32 (input_bfd, insn, hit_data);
8163 }
8164 return bfd_reloc_ok;
8165
8166 case R_ARM_THM_MOVW_ABS_NC:
8167 case R_ARM_THM_MOVT_ABS:
8168 case R_ARM_THM_MOVW_PREL_NC:
8169 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8170 /* Until we properly support segment-base-relative addressing then
8171 we assume the segment base to be zero, as for the above relocations.
8172 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8173 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8174 as R_ARM_THM_MOVT_ABS. */
8175 case R_ARM_THM_MOVW_BREL_NC:
8176 case R_ARM_THM_MOVW_BREL:
8177 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8178 {
8179 bfd_vma insn;
906e58ca 8180
b6895b4f
PB		 8181 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8182 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8183
8184 if (globals->use_rel)
8185 {
8186 addend = ((insn >> 4) & 0xf000)
8187 | ((insn >> 15) & 0x0800)
8188 | ((insn >> 4) & 0x0700)
8189 | (insn & 0x00ff);
39623e12 8190 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8191 }
92f5d02b 8192
b6895b4f 8193 value += signed_addend;
b6895b4f
PB		 8194
8195 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8196 value -= (input_section->output_section->vma
8197 + input_section->output_offset + rel->r_offset);
8198
92f5d02b
MS		 8199 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8200 return bfd_reloc_overflow;
8201
8202 if (sym_flags == STT_ARM_TFUNC)
8203 value |= 1;
8204
8205 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8206 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8207 value >>= 16;
8208
8209 insn &= 0xfbf08f00;
8210 insn |= (value & 0xf000) << 4;
8211 insn |= (value & 0x0800) << 15;
8212 insn |= (value & 0x0700) << 4;
8213 insn |= (value & 0x00ff);
8214
8215 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8216 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8217 }
8218 return bfd_reloc_ok;
8219
4962c51a
MS		 8220 case R_ARM_ALU_PC_G0_NC:
8221 case R_ARM_ALU_PC_G1_NC:
8222 case R_ARM_ALU_PC_G0:
8223 case R_ARM_ALU_PC_G1:
8224 case R_ARM_ALU_PC_G2:
8225 case R_ARM_ALU_SB_G0_NC:
8226 case R_ARM_ALU_SB_G1_NC:
8227 case R_ARM_ALU_SB_G0:
8228 case R_ARM_ALU_SB_G1:
8229 case R_ARM_ALU_SB_G2:
8230 {
8231 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8232 bfd_vma pc = input_section->output_section->vma
8233 + input_section->output_offset + rel->r_offset;
8234 /* sb should be the origin of the *segment* containing the symbol.
8235 It is not clear how to obtain this OS-dependent value, so we
8236 make an arbitrary choice of zero. */
8237 bfd_vma sb = 0;
8238 bfd_vma residual;
8239 bfd_vma g_n;
8240 bfd_signed_vma signed_value;
8241 int group = 0;
8242
8243 /* Determine which group of bits to select. */
8244 switch (r_type)
8245 {
8246 case R_ARM_ALU_PC_G0_NC:
8247 case R_ARM_ALU_PC_G0:
8248 case R_ARM_ALU_SB_G0_NC:
8249 case R_ARM_ALU_SB_G0:
8250 group = 0;
8251 break;
8252
8253 case R_ARM_ALU_PC_G1_NC:
8254 case R_ARM_ALU_PC_G1:
8255 case R_ARM_ALU_SB_G1_NC:
8256 case R_ARM_ALU_SB_G1:
8257 group = 1;
8258 break;
8259
8260 case R_ARM_ALU_PC_G2:
8261 case R_ARM_ALU_SB_G2:
8262 group = 2;
8263 break;
8264
8265 default:
906e58ca 8266 abort ();
4962c51a
MS		 8267 }
8268
8269 /* If REL, extract the addend from the insn. If RELA, it will
8270 have already been fetched for us. */
8271 if (globals->use_rel)
8272 {
8273 int negative;
8274 bfd_vma constant = insn & 0xff;
8275 bfd_vma rotation = (insn & 0xf00) >> 8;
8276
8277 if (rotation == 0)
8278 signed_addend = constant;
8279 else
8280 {
8281 /* Compensate for the fact that in the instruction, the
8282 rotation is stored in multiples of 2 bits. */
8283 rotation *= 2;
8284
8285 /* Rotate "constant" right by "rotation" bits. */
8286 signed_addend = (constant >> rotation) |
8287 (constant << (8 * sizeof (bfd_vma) - rotation));
8288 }
8289
8290 /* Determine if the instruction is an ADD or a SUB.
8291 (For REL, this determines the sign of the addend.) */
8292 negative = identify_add_or_sub (insn);
8293 if (negative == 0)
8294 {
8295 (*_bfd_error_handler)
8296 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8297 input_bfd, input_section,
8298 (long) rel->r_offset, howto->name);
906e58ca 8299 return bfd_reloc_overflow;
4962c51a
MS		 8300 }
8301
8302 signed_addend *= negative;
8303 }
8304
8305 /* Compute the value (X) to go in the place. */
8306 if (r_type == R_ARM_ALU_PC_G0_NC
8307 || r_type == R_ARM_ALU_PC_G1_NC
8308 || r_type == R_ARM_ALU_PC_G0
8309 || r_type == R_ARM_ALU_PC_G1
8310 || r_type == R_ARM_ALU_PC_G2)
8311 /* PC relative. */
8312 signed_value = value - pc + signed_addend;
8313 else
8314 /* Section base relative. */
8315 signed_value = value - sb + signed_addend;
8316
8317 /* If the target symbol is a Thumb function, then set the
8318 Thumb bit in the address. */
8319 if (sym_flags == STT_ARM_TFUNC)
8320 signed_value |= 1;
8321
8322 /* Calculate the value of the relevant G_n, in encoded
8323 constant-with-rotation format. */
8324 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8325 &residual);
8326
8327 /* Check for overflow if required. */
8328 if ((r_type == R_ARM_ALU_PC_G0
8329 || r_type == R_ARM_ALU_PC_G1
8330 || r_type == R_ARM_ALU_PC_G2
8331 || r_type == R_ARM_ALU_SB_G0
8332 || r_type == R_ARM_ALU_SB_G1
8333 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8334 {
8335 (*_bfd_error_handler)
8336 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8337 input_bfd, input_section,
8338 (long) rel->r_offset, abs (signed_value), howto->name);
8339 return bfd_reloc_overflow;
8340 }
8341
8342 /* Mask out the value and the ADD/SUB part of the opcode; take care
8343 not to destroy the S bit. */
8344 insn &= 0xff1ff000;
8345
8346 /* Set the opcode according to whether the value to go in the
8347 place is negative. */
8348 if (signed_value < 0)
8349 insn |= 1 << 22;
8350 else
8351 insn |= 1 << 23;
8352
8353 /* Encode the offset. */
8354 insn |= g_n;
8355
8356 bfd_put_32 (input_bfd, insn, hit_data);
8357 }
8358 return bfd_reloc_ok;
8359
8360 case R_ARM_LDR_PC_G0:
8361 case R_ARM_LDR_PC_G1:
8362 case R_ARM_LDR_PC_G2:
8363 case R_ARM_LDR_SB_G0:
8364 case R_ARM_LDR_SB_G1:
8365 case R_ARM_LDR_SB_G2:
8366 {
8367 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8368 bfd_vma pc = input_section->output_section->vma
8369 + input_section->output_offset + rel->r_offset;
8370 bfd_vma sb = 0; /* See note above. */
8371 bfd_vma residual;
8372 bfd_signed_vma signed_value;
8373 int group = 0;
8374
8375 /* Determine which groups of bits to calculate. */
8376 switch (r_type)
8377 {
8378 case R_ARM_LDR_PC_G0:
8379 case R_ARM_LDR_SB_G0:
8380 group = 0;
8381 break;
8382
8383 case R_ARM_LDR_PC_G1:
8384 case R_ARM_LDR_SB_G1:
8385 group = 1;
8386 break;
8387
8388 case R_ARM_LDR_PC_G2:
8389 case R_ARM_LDR_SB_G2:
8390 group = 2;
8391 break;
8392
8393 default:
906e58ca 8394 abort ();
4962c51a
MS		 8395 }
8396
8397 /* If REL, extract the addend from the insn. If RELA, it will
8398 have already been fetched for us. */
8399 if (globals->use_rel)
8400 {
8401 int negative = (insn & (1 << 23)) ? 1 : -1;
8402 signed_addend = negative * (insn & 0xfff);
8403 }
8404
8405 /* Compute the value (X) to go in the place. */
8406 if (r_type == R_ARM_LDR_PC_G0
8407 || r_type == R_ARM_LDR_PC_G1
8408 || r_type == R_ARM_LDR_PC_G2)
8409 /* PC relative. */
8410 signed_value = value - pc + signed_addend;
8411 else
8412 /* Section base relative. */
8413 signed_value = value - sb + signed_addend;
8414
8415 /* Calculate the value of the relevant G_{n-1} to obtain
8416 the residual at that stage. */
8417 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8418
8419 /* Check for overflow. */
8420 if (residual >= 0x1000)
8421 {
8422 (*_bfd_error_handler)
8423 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8424 input_bfd, input_section,
8425 (long) rel->r_offset, abs (signed_value), howto->name);
8426 return bfd_reloc_overflow;
8427 }
8428
8429 /* Mask out the value and U bit. */
8430 insn &= 0xff7ff000;
8431
8432 /* Set the U bit if the value to go in the place is non-negative. */
8433 if (signed_value >= 0)
8434 insn |= 1 << 23;
8435
8436 /* Encode the offset. */
8437 insn |= residual;
8438
8439 bfd_put_32 (input_bfd, insn, hit_data);
8440 }
8441 return bfd_reloc_ok;
8442
8443 case R_ARM_LDRS_PC_G0:
8444 case R_ARM_LDRS_PC_G1:
8445 case R_ARM_LDRS_PC_G2:
8446 case R_ARM_LDRS_SB_G0:
8447 case R_ARM_LDRS_SB_G1:
8448 case R_ARM_LDRS_SB_G2:
8449 {
8450 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8451 bfd_vma pc = input_section->output_section->vma
8452 + input_section->output_offset + rel->r_offset;
8453 bfd_vma sb = 0; /* See note above. */
8454 bfd_vma residual;
8455 bfd_signed_vma signed_value;
8456 int group = 0;
8457
8458 /* Determine which groups of bits to calculate. */
8459 switch (r_type)
8460 {
8461 case R_ARM_LDRS_PC_G0:
8462 case R_ARM_LDRS_SB_G0:
8463 group = 0;
8464 break;
8465
8466 case R_ARM_LDRS_PC_G1:
8467 case R_ARM_LDRS_SB_G1:
8468 group = 1;
8469 break;
8470
8471 case R_ARM_LDRS_PC_G2:
8472 case R_ARM_LDRS_SB_G2:
8473 group = 2;
8474 break;
8475
8476 default:
906e58ca 8477 abort ();
4962c51a
MS		 8478 }
8479
8480 /* If REL, extract the addend from the insn. If RELA, it will
8481 have already been fetched for us. */
8482 if (globals->use_rel)
8483 {
8484 int negative = (insn & (1 << 23)) ? 1 : -1;
8485 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8486 }
8487
8488 /* Compute the value (X) to go in the place. */
8489 if (r_type == R_ARM_LDRS_PC_G0
8490 || r_type == R_ARM_LDRS_PC_G1
8491 || r_type == R_ARM_LDRS_PC_G2)
8492 /* PC relative. */
8493 signed_value = value - pc + signed_addend;
8494 else
8495 /* Section base relative. */
8496 signed_value = value - sb + signed_addend;
8497
8498 /* Calculate the value of the relevant G_{n-1} to obtain
8499 the residual at that stage. */
8500 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8501
8502 /* Check for overflow. */
8503 if (residual >= 0x100)
8504 {
8505 (*_bfd_error_handler)
8506 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8507 input_bfd, input_section,
8508 (long) rel->r_offset, abs (signed_value), howto->name);
8509 return bfd_reloc_overflow;
8510 }
8511
8512 /* Mask out the value and U bit. */
8513 insn &= 0xff7ff0f0;
8514
8515 /* Set the U bit if the value to go in the place is non-negative. */
8516 if (signed_value >= 0)
8517 insn |= 1 << 23;
8518
8519 /* Encode the offset. */
8520 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8521
8522 bfd_put_32 (input_bfd, insn, hit_data);
8523 }
8524 return bfd_reloc_ok;
8525
8526 case R_ARM_LDC_PC_G0:
8527 case R_ARM_LDC_PC_G1:
8528 case R_ARM_LDC_PC_G2:
8529 case R_ARM_LDC_SB_G0:
8530 case R_ARM_LDC_SB_G1:
8531 case R_ARM_LDC_SB_G2:
8532 {
8533 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8534 bfd_vma pc = input_section->output_section->vma
8535 + input_section->output_offset + rel->r_offset;
8536 bfd_vma sb = 0; /* See note above. */
8537 bfd_vma residual;
8538 bfd_signed_vma signed_value;
8539 int group = 0;
8540
8541 /* Determine which groups of bits to calculate. */
8542 switch (r_type)
8543 {
8544 case R_ARM_LDC_PC_G0:
8545 case R_ARM_LDC_SB_G0:
8546 group = 0;
8547 break;
8548
8549 case R_ARM_LDC_PC_G1:
8550 case R_ARM_LDC_SB_G1:
8551 group = 1;
8552 break;
8553
8554 case R_ARM_LDC_PC_G2:
8555 case R_ARM_LDC_SB_G2:
8556 group = 2;
8557 break;
8558
8559 default:
906e58ca 8560 abort ();
4962c51a
MS		 8561 }
8562
8563 /* If REL, extract the addend from the insn. If RELA, it will
8564 have already been fetched for us. */
8565 if (globals->use_rel)
8566 {
8567 int negative = (insn & (1 << 23)) ? 1 : -1;
8568 signed_addend = negative * ((insn & 0xff) << 2);
8569 }
8570
8571 /* Compute the value (X) to go in the place. */
8572 if (r_type == R_ARM_LDC_PC_G0
8573 || r_type == R_ARM_LDC_PC_G1
8574 || r_type == R_ARM_LDC_PC_G2)
8575 /* PC relative. */
8576 signed_value = value - pc + signed_addend;
8577 else
8578 /* Section base relative. */
8579 signed_value = value - sb + signed_addend;
8580
8581 /* Calculate the value of the relevant G_{n-1} to obtain
8582 the residual at that stage. */
8583 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8584
8585 /* Check for overflow. (The absolute value to go in the place must be
8586 divisible by four and, after having been divided by four, must
8587 fit in eight bits.) */
8588 if ((residual & 0x3) != 0 || residual >= 0x400)
8589 {
8590 (*_bfd_error_handler)
8591 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8592 input_bfd, input_section,
8593 (long) rel->r_offset, abs (signed_value), howto->name);
8594 return bfd_reloc_overflow;
8595 }
8596
8597 /* Mask out the value and U bit. */
8598 insn &= 0xff7fff00;
8599
8600 /* Set the U bit if the value to go in the place is non-negative. */
8601 if (signed_value >= 0)
8602 insn |= 1 << 23;
8603
8604 /* Encode the offset. */
8605 insn |= residual >> 2;
8606
8607 bfd_put_32 (input_bfd, insn, hit_data);
8608 }
8609 return bfd_reloc_ok;
8610
252b5132
RH		 8611 default:
8612 return bfd_reloc_notsupported;
8613 }
8614}
8615
98c1d4aa
NC		 8616/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8617static void
57e8b36a
NC		 8618arm_add_to_rel (bfd * abfd,
8619 bfd_byte * address,
8620 reloc_howto_type * howto,
8621 bfd_signed_vma increment)
98c1d4aa 8622{
98c1d4aa
NC		 8623 bfd_signed_vma addend;
8624
bd97cb95
DJ		 8625 if (howto->type == R_ARM_THM_CALL
8626 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8627 {
9a5aca8c
AM		 8628 int upper_insn, lower_insn;
8629 int upper, lower;
98c1d4aa 8630
9a5aca8c
AM		 8631 upper_insn = bfd_get_16 (abfd, address);
8632 lower_insn = bfd_get_16 (abfd, address + 2);
8633 upper = upper_insn & 0x7ff;
8634 lower = lower_insn & 0x7ff;
8635
8636 addend = (upper << 12) | (lower << 1);
ddda4409 8637 addend += increment;
9a5aca8c 8638 addend >>= 1;
98c1d4aa 8639
9a5aca8c
AM		 8640 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8641 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8642
dc810e39
AM		 8643 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8644 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8645 }
8646 else
8647 {
8648 bfd_vma contents;
8649
8650 contents = bfd_get_32 (abfd, address);
8651
8652 /* Get the (signed) value from the instruction. */
8653 addend = contents & howto->src_mask;
8654 if (addend & ((howto->src_mask + 1) >> 1))
8655 {
8656 bfd_signed_vma mask;
8657
8658 mask = -1;
8659 mask &= ~ howto->src_mask;
8660 addend |= mask;
8661 }
8662
8663 /* Add in the increment, (which is a byte value). */
8664 switch (howto->type)
8665 {
8666 default:
8667 addend += increment;
8668 break;
8669
8670 case R_ARM_PC24:
c6596c5e 8671 case R_ARM_PLT32:
5b5bb741
PB		 8672 case R_ARM_CALL:
8673 case R_ARM_JUMP24:
9a5aca8c 8674 addend <<= howto->size;
dc810e39 8675 addend += increment;
9a5aca8c
AM		 8676
8677 /* Should we check for overflow here ? */
8678
8679 /* Drop any undesired bits. */
8680 addend >>= howto->rightshift;
8681 break;
8682 }
8683
8684 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8685
8686 bfd_put_32 (abfd, contents, address);
ddda4409 8687 }
98c1d4aa 8688}
252b5132 8689
ba93b8ac
DJ		 8690#define IS_ARM_TLS_RELOC(R_TYPE) \
8691 ((R_TYPE) == R_ARM_TLS_GD32 \
8692 || (R_TYPE) == R_ARM_TLS_LDO32 \
8693 || (R_TYPE) == R_ARM_TLS_LDM32 \
8694 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8695 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8696 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8697 || (R_TYPE) == R_ARM_TLS_LE32 \
8698 || (R_TYPE) == R_ARM_TLS_IE32)
8699
252b5132 8700/* Relocate an ARM ELF section. */
906e58ca 8701
b34976b6 8702static bfd_boolean
57e8b36a
NC		 8703elf32_arm_relocate_section (bfd * output_bfd,
8704 struct bfd_link_info * info,
8705 bfd * input_bfd,
8706 asection * input_section,
8707 bfd_byte * contents,
8708 Elf_Internal_Rela * relocs,
8709 Elf_Internal_Sym * local_syms,
8710 asection ** local_sections)
252b5132 8711{
b34976b6
AM		 8712 Elf_Internal_Shdr *symtab_hdr;
8713 struct elf_link_hash_entry **sym_hashes;
8714 Elf_Internal_Rela *rel;
8715 Elf_Internal_Rela *relend;
8716 const char *name;
b32d3aa2 8717 struct elf32_arm_link_hash_table * globals;
252b5132 8718
4e7fd91e 8719 globals = elf32_arm_hash_table (info);
b491616a 8720
0ffa91dd 8721 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8722 sym_hashes = elf_sym_hashes (input_bfd);
8723
8724 rel = relocs;
8725 relend = relocs + input_section->reloc_count;
8726 for (; rel < relend; rel++)
8727 {
ba96a88f
NC		 8728 int r_type;
8729 reloc_howto_type * howto;
8730 unsigned long r_symndx;
8731 Elf_Internal_Sym * sym;
8732 asection * sec;
252b5132 8733 struct elf_link_hash_entry * h;
ba96a88f
NC		 8734 bfd_vma relocation;
8735 bfd_reloc_status_type r;
8736 arelent bfd_reloc;
ba93b8ac 8737 char sym_type;
0945cdfd 8738 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8739 char *error_message = NULL;
f21f3fe0 8740
252b5132 8741 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8742 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8743 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8744
ba96a88f
NC		 8745 if ( r_type == R_ARM_GNU_VTENTRY
8746 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8747 continue;
8748
b32d3aa2 8749 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8750 howto = bfd_reloc.howto;
252b5132 8751
252b5132
RH		 8752 h = NULL;
8753 sym = NULL;
8754 sec = NULL;
9b485d32 8755
252b5132
RH		 8756 if (r_symndx < symtab_hdr->sh_info)
8757 {
8758 sym = local_syms + r_symndx;
ba93b8ac 8759 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8760 sec = local_sections[r_symndx];
ffcb4889
NS		 8761
8762 /* An object file might have a reference to a local
8763 undefined symbol. This is a daft object file, but we
8764 should at least do something about it. V4BX & NONE
8765 relocations do not use the symbol and are explicitly
8766 allowed to use the undefined symbol, so allow those. */
8767 if (r_type != R_ARM_V4BX
8768 && r_type != R_ARM_NONE
8769 && bfd_is_und_section (sec)
8770 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8771 {
8772 if (!info->callbacks->undefined_symbol
8773 (info, bfd_elf_string_from_elf_section
8774 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8775 input_bfd, input_section,
8776 rel->r_offset, TRUE))
8777 return FALSE;
8778 }
8779
4e7fd91e 8780 if (globals->use_rel)
f8df10f4 8781 {
4e7fd91e
PB		 8782 relocation = (sec->output_section->vma
8783 + sec->output_offset
8784 + sym->st_value);
ab96bf03
AM		 8785 if (!info->relocatable
8786 && (sec->flags & SEC_MERGE)
8787 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8788 {
4e7fd91e
PB		 8789 asection *msec;
8790 bfd_vma addend, value;
8791
39623e12 8792 switch (r_type)
4e7fd91e 8793 {
39623e12
PB		 8794 case R_ARM_MOVW_ABS_NC:
8795 case R_ARM_MOVT_ABS:
8796 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8797 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8798 addend = (addend ^ 0x8000) - 0x8000;
8799 break;
f8df10f4 8800
39623e12
PB		 8801 case R_ARM_THM_MOVW_ABS_NC:
8802 case R_ARM_THM_MOVT_ABS:
8803 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8804 << 16;
8805 value |= bfd_get_16 (input_bfd,
8806 contents + rel->r_offset + 2);
8807 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8808 | ((value & 0x04000000) >> 15);
8809 addend = (addend ^ 0x8000) - 0x8000;
8810 break;
f8df10f4 8811
39623e12
PB		 8812 default:
8813 if (howto->rightshift
8814 || (howto->src_mask & (howto->src_mask + 1)))
8815 {
8816 (*_bfd_error_handler)
8817 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8818 input_bfd, input_section,
8819 (long) rel->r_offset, howto->name);
8820 return FALSE;
8821 }
8822
8823 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8824
8825 /* Get the (signed) value from the instruction. */
8826 addend = value & howto->src_mask;
8827 if (addend & ((howto->src_mask + 1) >> 1))
8828 {
8829 bfd_signed_vma mask;
8830
8831 mask = -1;
8832 mask &= ~ howto->src_mask;
8833 addend |= mask;
8834 }
8835 break;
4e7fd91e 8836 }
39623e12 8837
4e7fd91e
PB		 8838 msec = sec;
8839 addend =
8840 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8841 - relocation;
8842 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8843
8844 /* Cases here must match those in the preceeding
8845 switch statement. */
8846 switch (r_type)
8847 {
8848 case R_ARM_MOVW_ABS_NC:
8849 case R_ARM_MOVT_ABS:
8850 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8851 | (addend & 0xfff);
8852 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8853 break;
8854
8855 case R_ARM_THM_MOVW_ABS_NC:
8856 case R_ARM_THM_MOVT_ABS:
8857 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8858 | (addend & 0xff) | ((addend & 0x0800) << 15);
8859 bfd_put_16 (input_bfd, value >> 16,
8860 contents + rel->r_offset);
8861 bfd_put_16 (input_bfd, value,
8862 contents + rel->r_offset + 2);
8863 break;
8864
8865 default:
8866 value = (value & ~ howto->dst_mask)
8867 | (addend & howto->dst_mask);
8868 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8869 break;
8870 }
f8df10f4 8871 }
f8df10f4 8872 }
4e7fd91e
PB		 8873 else
8874 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8875 }
8876 else
8877 {
560e09e9 8878 bfd_boolean warned;
560e09e9 8879
b2a8e766
AM		 8880 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8881 r_symndx, symtab_hdr, sym_hashes,
8882 h, sec, relocation,
8883 unresolved_reloc, warned);
ba93b8ac
DJ		 8884
8885 sym_type = h->type;
252b5132
RH		 8886 }
8887
ab96bf03
AM		 8888 if (sec != NULL && elf_discarded_section (sec))
8889 {
8890 /* For relocs against symbols from removed linkonce sections,
8891 or sections discarded by a linker script, we just want the
8892 section contents zeroed. Avoid any special processing. */
8893 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8894 rel->r_info = 0;
8895 rel->r_addend = 0;
8896 continue;
8897 }
8898
8899 if (info->relocatable)
8900 {
8901 /* This is a relocatable link. We don't have to change
8902 anything, unless the reloc is against a section symbol,
8903 in which case we have to adjust according to where the
8904 section symbol winds up in the output section. */
8905 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8906 {
8907 if (globals->use_rel)
8908 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8909 howto, (bfd_signed_vma) sec->output_offset);
8910 else
8911 rel->r_addend += sec->output_offset;
8912 }
8913 continue;
8914 }
8915
252b5132
RH		 8916 if (h != NULL)
8917 name = h->root.root.string;
8918 else
8919 {
8920 name = (bfd_elf_string_from_elf_section
8921 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8922 if (name == NULL || *name == '\0')
8923 name = bfd_section_name (input_bfd, sec);
8924 }
f21f3fe0 8925
ba93b8ac
DJ		 8926 if (r_symndx != 0
8927 && r_type != R_ARM_NONE
8928 && (h == NULL
8929 || h->root.type == bfd_link_hash_defined
8930 || h->root.type == bfd_link_hash_defweak)
8931 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8932 {
8933 (*_bfd_error_handler)
8934 ((sym_type == STT_TLS
8935 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8936 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8937 input_bfd,
8938 input_section,
8939 (long) rel->r_offset,
8940 howto->name,
8941 name);
8942 }
8943
252b5132
RH		 8944 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8945 input_section, contents, rel,
8946 relocation, info, sec, name,
8947 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8948 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8949 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8950
8951 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8952 because such sections are not SEC_ALLOC and thus ld.so will
8953 not process them. */
8954 if (unresolved_reloc
8955 && !((input_section->flags & SEC_DEBUGGING) != 0
8956 && h->def_dynamic))
8957 {
8958 (*_bfd_error_handler)
843fe662
L		 8959 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8960 input_bfd,
8961 input_section,
8962 (long) rel->r_offset,
8963 howto->name,
8964 h->root.root.string);
0945cdfd
DJ		 8965 return FALSE;
8966 }
252b5132
RH		 8967
8968 if (r != bfd_reloc_ok)
8969 {
252b5132
RH		 8970 switch (r)
8971 {
8972 case bfd_reloc_overflow:
cf919dfd
PB		 8973 /* If the overflowing reloc was to an undefined symbol,
8974 we have already printed one error message and there
8975 is no point complaining again. */
8976 if ((! h ||
8977 h->root.type != bfd_link_hash_undefined)
8978 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8979 (info, (h ? &h->root : NULL), name, howto->name,
8980 (bfd_vma) 0, input_bfd, input_section,
8981 rel->r_offset))))
b34976b6 8982 return FALSE;
252b5132
RH		 8983 break;
8984
8985 case bfd_reloc_undefined:
8986 if (!((*info->callbacks->undefined_symbol)
8987 (info, name, input_bfd, input_section,
b34976b6
AM		 8988 rel->r_offset, TRUE)))
8989 return FALSE;
252b5132
RH		 8990 break;
8991
8992 case bfd_reloc_outofrange:
f2a9dd69 8993 error_message = _("out of range");
252b5132
RH		 8994 goto common_error;
8995
8996 case bfd_reloc_notsupported:
f2a9dd69 8997 error_message = _("unsupported relocation");
252b5132
RH		 8998 goto common_error;
8999
9000 case bfd_reloc_dangerous:
f2a9dd69 9001 /* error_message should already be set. */
252b5132
RH		 9002 goto common_error;
9003
9004 default:
f2a9dd69 9005 error_message = _("unknown error");
8029a119 9006 /* Fall through. */
252b5132
RH		 9007
9008 common_error:
f2a9dd69
DJ		 9009 BFD_ASSERT (error_message != NULL);
9010 if (!((*info->callbacks->reloc_dangerous)
9011 (info, error_message, input_bfd, input_section,
252b5132 9012 rel->r_offset)))
b34976b6 9013 return FALSE;
252b5132
RH		 9014 break;
9015 }
9016 }
9017 }
9018
b34976b6 9019 return TRUE;
252b5132
RH		 9020}
9021
2468f9c9
PB		 9022/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
9023 adds the edit to the start of the list. (The list must be built in order of
9024 ascending INDEX: the function's callers are primarily responsible for
9025 maintaining that condition). */
9026
9027static void
9028add_unwind_table_edit (arm_unwind_table_edit **head,
9029 arm_unwind_table_edit **tail,
9030 arm_unwind_edit_type type,
9031 asection *linked_section,
9032 unsigned int index)
9033{
9034 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
9035
9036 new_edit->type = type;
9037 new_edit->linked_section = linked_section;
9038 new_edit->index = index;
9039
9040 if (index > 0)
9041 {
9042 new_edit->next = NULL;
9043
9044 if (*tail)
9045 (*tail)->next = new_edit;
9046
9047 (*tail) = new_edit;
9048
9049 if (!*head)
9050 (*head) = new_edit;
9051 }
9052 else
9053 {
9054 new_edit->next = *head;
9055
9056 if (!*tail)
9057 *tail = new_edit;
9058
9059 *head = new_edit;
9060 }
9061}
9062
9063static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9064
9065/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9066static void
9067adjust_exidx_size(asection *exidx_sec, int adjust)
9068{
9069 asection *out_sec;
9070
9071 if (!exidx_sec->rawsize)
9072 exidx_sec->rawsize = exidx_sec->size;
9073
9074 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9075 out_sec = exidx_sec->output_section;
9076 /* Adjust size of output section. */
9077 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9078}
9079
9080/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9081static void
9082insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9083{
9084 struct _arm_elf_section_data *exidx_arm_data;
9085
9086 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9087 add_unwind_table_edit (
9088 &exidx_arm_data->u.exidx.unwind_edit_list,
9089 &exidx_arm_data->u.exidx.unwind_edit_tail,
9090 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9091
9092 adjust_exidx_size(exidx_sec, 8);
9093}
9094
9095/* Scan .ARM.exidx tables, and create a list describing edits which should be
9096 made to those tables, such that:
9097
9098 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9099 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9100 codes which have been inlined into the index).
9101
9102 The edits are applied when the tables are written
9103 (in elf32_arm_write_section).
9104*/
9105
9106bfd_boolean
9107elf32_arm_fix_exidx_coverage (asection **text_section_order,
9108 unsigned int num_text_sections,
9109 struct bfd_link_info *info)
9110{
9111 bfd *inp;
9112 unsigned int last_second_word = 0, i;
9113 asection *last_exidx_sec = NULL;
9114 asection *last_text_sec = NULL;
9115 int last_unwind_type = -1;
9116
9117 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9118 text sections. */
9119 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9120 {
9121 asection *sec;
9122
9123 for (sec = inp->sections; sec != NULL; sec = sec->next)
9124 {
9125 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9126 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9127
dec9d5df 9128 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9129 continue;
9130
9131 if (elf_sec->linked_to)
9132 {
9133 Elf_Internal_Shdr *linked_hdr
9134 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9135 struct _arm_elf_section_data *linked_sec_arm_data
9136 = get_arm_elf_section_data (linked_hdr->bfd_section);
9137
9138 if (linked_sec_arm_data == NULL)
9139 continue;
9140
9141 /* Link this .ARM.exidx section back from the text section it
9142 describes. */
9143 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9144 }
9145 }
9146 }
9147
9148 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9149 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9150 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
9151 */
9152
9153 for (i = 0; i < num_text_sections; i++)
9154 {
9155 asection *sec = text_section_order[i];
9156 asection *exidx_sec;
9157 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9158 struct _arm_elf_section_data *exidx_arm_data;
9159 bfd_byte *contents = NULL;
9160 int deleted_exidx_bytes = 0;
9161 bfd_vma j;
9162 arm_unwind_table_edit *unwind_edit_head = NULL;
9163 arm_unwind_table_edit *unwind_edit_tail = NULL;
9164 Elf_Internal_Shdr *hdr;
9165 bfd *ibfd;
9166
9167 if (arm_data == NULL)
9168 continue;
9169
9170 exidx_sec = arm_data->u.text.arm_exidx_sec;
9171 if (exidx_sec == NULL)
9172 {
9173 /* Section has no unwind data. */
9174 if (last_unwind_type == 0 || !last_exidx_sec)
9175 continue;
9176
9177 /* Ignore zero sized sections. */
9178 if (sec->size == 0)
9179 continue;
9180
9181 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9182 last_unwind_type = 0;
9183 continue;
9184 }
9185
22a8f80e
PB		 9186 /* Skip /DISCARD/ sections. */
9187 if (bfd_is_abs_section (exidx_sec->output_section))
9188 continue;
9189
2468f9c9
PB		 9190 hdr = &elf_section_data (exidx_sec)->this_hdr;
9191 if (hdr->sh_type != SHT_ARM_EXIDX)
9192 continue;
9193
9194 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9195 if (exidx_arm_data == NULL)
9196 continue;
9197
9198 ibfd = exidx_sec->owner;
9199
9200 if (hdr->contents != NULL)
9201 contents = hdr->contents;
9202 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9203 /* An error? */
9204 continue;
9205
9206 for (j = 0; j < hdr->sh_size; j += 8)
9207 {
9208 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9209 int unwind_type;
9210 int elide = 0;
9211
9212 /* An EXIDX_CANTUNWIND entry. */
9213 if (second_word == 1)
9214 {
9215 if (last_unwind_type == 0)
9216 elide = 1;
9217 unwind_type = 0;
9218 }
9219 /* Inlined unwinding data. Merge if equal to previous. */
9220 else if ((second_word & 0x80000000) != 0)
9221 {
9222 if (last_second_word == second_word && last_unwind_type == 1)
9223 elide = 1;
9224 unwind_type = 1;
9225 last_second_word = second_word;
9226 }
9227 /* Normal table entry. In theory we could merge these too,
9228 but duplicate entries are likely to be much less common. */
9229 else
9230 unwind_type = 2;
9231
9232 if (elide)
9233 {
9234 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9235 DELETE_EXIDX_ENTRY, NULL, j / 8);
9236
9237 deleted_exidx_bytes += 8;
9238 }
9239
9240 last_unwind_type = unwind_type;
9241 }
9242
9243 /* Free contents if we allocated it ourselves. */
9244 if (contents != hdr->contents)
9245 free (contents);
9246
9247 /* Record edits to be applied later (in elf32_arm_write_section). */
9248 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9249 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9250
9251 if (deleted_exidx_bytes > 0)
9252 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9253
9254 last_exidx_sec = exidx_sec;
9255 last_text_sec = sec;
9256 }
9257
9258 /* Add terminating CANTUNWIND entry. */
9259 if (last_exidx_sec && last_unwind_type != 0)
9260 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9261
9262 return TRUE;
9263}
9264
3e6b1042
DJ		 9265static bfd_boolean
9266elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9267 bfd *ibfd, const char *name)
9268{
9269 asection *sec, *osec;
9270
9271 sec = bfd_get_section_by_name (ibfd, name);
9272 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9273 return TRUE;
9274
9275 osec = sec->output_section;
9276 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9277 return TRUE;
9278
9279 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9280 sec->output_offset, sec->size))
9281 return FALSE;
9282
9283 return TRUE;
9284}
9285
9286static bfd_boolean
9287elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9288{
9289 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9290
9291 /* Invoke the regular ELF backend linker to do all the work. */
9292 if (!bfd_elf_final_link (abfd, info))
9293 return FALSE;
9294
9295 /* Write out any glue sections now that we have created all the
9296 stubs. */
9297 if (globals->bfd_of_glue_owner != NULL)
9298 {
9299 if (! elf32_arm_output_glue_section (info, abfd,
9300 globals->bfd_of_glue_owner,
9301 ARM2THUMB_GLUE_SECTION_NAME))
9302 return FALSE;
9303
9304 if (! elf32_arm_output_glue_section (info, abfd,
9305 globals->bfd_of_glue_owner,
9306 THUMB2ARM_GLUE_SECTION_NAME))
9307 return FALSE;
9308
9309 if (! elf32_arm_output_glue_section (info, abfd,
9310 globals->bfd_of_glue_owner,
9311 VFP11_ERRATUM_VENEER_SECTION_NAME))
9312 return FALSE;
9313
9314 if (! elf32_arm_output_glue_section (info, abfd,
9315 globals->bfd_of_glue_owner,
9316 ARM_BX_GLUE_SECTION_NAME))
9317 return FALSE;
9318 }
9319
9320 return TRUE;
9321}
9322
c178919b
NC		 9323/* Set the right machine number. */
9324
9325static bfd_boolean
57e8b36a 9326elf32_arm_object_p (bfd *abfd)
c178919b 9327{
5a6c6817 9328 unsigned int mach;
57e8b36a 9329
5a6c6817 9330 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9331
5a6c6817
NC		 9332 if (mach != bfd_mach_arm_unknown)
9333 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9334
9335 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9336 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9337
e16bb312 9338 else
5a6c6817 9339 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9340
9341 return TRUE;
9342}
9343
fc830a83 9344/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9345
b34976b6 9346static bfd_boolean
57e8b36a 9347elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9348{
9349 if (elf_flags_init (abfd)
9350 && elf_elfheader (abfd)->e_flags != flags)
9351 {
fc830a83
NC		 9352 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9353 {
fd2ec330 9354 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9355 (*_bfd_error_handler)
9356 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9357 abfd);
fc830a83 9358 else
d003868e
AM		 9359 _bfd_error_handler
9360 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9361 abfd);
fc830a83 9362 }
252b5132
RH		 9363 }
9364 else
9365 {
9366 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9367 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9368 }
9369
b34976b6 9370 return TRUE;
252b5132
RH		 9371}
9372
fc830a83 9373/* Copy backend specific data from one object module to another. */
9b485d32 9374
b34976b6 9375static bfd_boolean
57e8b36a 9376elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9377{
9378 flagword in_flags;
9379 flagword out_flags;
9380
0ffa91dd 9381 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9382 return TRUE;
252b5132 9383
fc830a83 9384 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9385 out_flags = elf_elfheader (obfd)->e_flags;
9386
fc830a83
NC		 9387 if (elf_flags_init (obfd)
9388 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9389 && in_flags != out_flags)
252b5132 9390 {
252b5132 9391 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9392 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9393 return FALSE;
252b5132
RH		 9394
9395 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9396 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9397 return FALSE;
252b5132
RH		 9398
9399 /* If the src and dest have different interworking flags
9400 then turn off the interworking bit. */
fd2ec330 9401 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9402 {
fd2ec330 9403 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9404 _bfd_error_handler
9405 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9406 obfd, ibfd);
252b5132 9407
fd2ec330 9408 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9409 }
1006ba19
PB		 9410
9411 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9412 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9413 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9414 }
9415
9416 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9417 elf_flags_init (obfd) = TRUE;
252b5132 9418
94a3258f
PB		 9419 /* Also copy the EI_OSABI field. */
9420 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9421 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9422
104d59d1
JM		 9423 /* Copy object attributes. */
9424 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9425
9426 return TRUE;
9427}
9428
9429/* Values for Tag_ABI_PCS_R9_use. */
9430enum
9431{
9432 AEABI_R9_V6,
9433 AEABI_R9_SB,
9434 AEABI_R9_TLS,
9435 AEABI_R9_unused
9436};
9437
9438/* Values for Tag_ABI_PCS_RW_data. */
9439enum
9440{
9441 AEABI_PCS_RW_data_absolute,
9442 AEABI_PCS_RW_data_PCrel,
9443 AEABI_PCS_RW_data_SBrel,
9444 AEABI_PCS_RW_data_unused
9445};
9446
9447/* Values for Tag_ABI_enum_size. */
9448enum
9449{
9450 AEABI_enum_unused,
9451 AEABI_enum_short,
9452 AEABI_enum_wide,
9453 AEABI_enum_forced_wide
9454};
9455
104d59d1
JM		 9456/* Determine whether an object attribute tag takes an integer, a
9457 string or both. */
906e58ca 9458
104d59d1
JM		 9459static int
9460elf32_arm_obj_attrs_arg_type (int tag)
9461{
9462 if (tag == Tag_compatibility)
3483fe2e 9463 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9464 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9465 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9466 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9467 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9468 else if (tag < 32)
3483fe2e 9469 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9470 else
3483fe2e 9471 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9472}
9473
5aa6ff7c
AS		 9474/* The ABI defines that Tag_conformance should be emitted first, and that
9475 Tag_nodefaults should be second (if either is defined). This sets those
9476 two positions, and bumps up the position of all the remaining tags to
9477 compensate. */
9478static int
9479elf32_arm_obj_attrs_order (int num)
9480{
9481 if (num == 4)
9482 return Tag_conformance;
9483 if (num == 5)
9484 return Tag_nodefaults;
9485 if ((num - 2) < Tag_nodefaults)
9486 return num - 2;
9487 if ((num - 1) < Tag_conformance)
9488 return num - 1;
9489 return num;
9490}
9491
91e22acd
AS		 9492/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9493 Returns -1 if no architecture could be read. */
9494
9495static int
9496get_secondary_compatible_arch (bfd *abfd)
9497{
9498 obj_attribute *attr =
9499 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9500
9501 /* Note: the tag and its argument below are uleb128 values, though
9502 currently-defined values fit in one byte for each. */
9503 if (attr->s
9504 && attr->s[0] == Tag_CPU_arch
9505 && (attr->s[1] & 128) != 128
9506 && attr->s[2] == 0)
9507 return attr->s[1];
9508
9509 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9510 return -1;
9511}
9512
9513/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9514 The tag is removed if ARCH is -1. */
9515
8e79c3df 9516static void
91e22acd 9517set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9518{
91e22acd
AS		 9519 obj_attribute *attr =
9520 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9521
91e22acd
AS		 9522 if (arch == -1)
9523 {
9524 attr->s = NULL;
9525 return;
8e79c3df 9526 }
91e22acd
AS		 9527
9528 /* Note: the tag and its argument below are uleb128 values, though
9529 currently-defined values fit in one byte for each. */
9530 if (!attr->s)
9531 attr->s = bfd_alloc (abfd, 3);
9532 attr->s[0] = Tag_CPU_arch;
9533 attr->s[1] = arch;
9534 attr->s[2] = '\0';
8e79c3df
CM		 9535}
9536
91e22acd
AS		 9537/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9538 into account. */
9539
9540static int
9541tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9542 int newtag, int secondary_compat)
8e79c3df 9543{
91e22acd
AS		 9544#define T(X) TAG_CPU_ARCH_##X
9545 int tagl, tagh, result;
9546 const int v6t2[] =
9547 {
9548 T(V6T2), /* PRE_V4. */
9549 T(V6T2), /* V4. */
9550 T(V6T2), /* V4T. */
9551 T(V6T2), /* V5T. */
9552 T(V6T2), /* V5TE. */
9553 T(V6T2), /* V5TEJ. */
9554 T(V6T2), /* V6. */
9555 T(V7), /* V6KZ. */
9556 T(V6T2) /* V6T2. */
9557 };
9558 const int v6k[] =
9559 {
9560 T(V6K), /* PRE_V4. */
9561 T(V6K), /* V4. */
9562 T(V6K), /* V4T. */
9563 T(V6K), /* V5T. */
9564 T(V6K), /* V5TE. */
9565 T(V6K), /* V5TEJ. */
9566 T(V6K), /* V6. */
9567 T(V6KZ), /* V6KZ. */
9568 T(V7), /* V6T2. */
9569 T(V6K) /* V6K. */
9570 };
9571 const int v7[] =
9572 {
9573 T(V7), /* PRE_V4. */
9574 T(V7), /* V4. */
9575 T(V7), /* V4T. */
9576 T(V7), /* V5T. */
9577 T(V7), /* V5TE. */
9578 T(V7), /* V5TEJ. */
9579 T(V7), /* V6. */
9580 T(V7), /* V6KZ. */
9581 T(V7), /* V6T2. */
9582 T(V7), /* V6K. */
9583 T(V7) /* V7. */
9584 };
9585 const int v6_m[] =
9586 {
9587 -1, /* PRE_V4. */
9588 -1, /* V4. */
9589 T(V6K), /* V4T. */
9590 T(V6K), /* V5T. */
9591 T(V6K), /* V5TE. */
9592 T(V6K), /* V5TEJ. */
9593 T(V6K), /* V6. */
9594 T(V6KZ), /* V6KZ. */
9595 T(V7), /* V6T2. */
9596 T(V6K), /* V6K. */
9597 T(V7), /* V7. */
9598 T(V6_M) /* V6_M. */
9599 };
9600 const int v6s_m[] =
9601 {
9602 -1, /* PRE_V4. */
9603 -1, /* V4. */
9604 T(V6K), /* V4T. */
9605 T(V6K), /* V5T. */
9606 T(V6K), /* V5TE. */
9607 T(V6K), /* V5TEJ. */
9608 T(V6K), /* V6. */
9609 T(V6KZ), /* V6KZ. */
9610 T(V7), /* V6T2. */
9611 T(V6K), /* V6K. */
9612 T(V7), /* V7. */
9613 T(V6S_M), /* V6_M. */
9614 T(V6S_M) /* V6S_M. */
9615 };
9616 const int v4t_plus_v6_m[] =
9617 {
9618 -1, /* PRE_V4. */
9619 -1, /* V4. */
9620 T(V4T), /* V4T. */
9621 T(V5T), /* V5T. */
9622 T(V5TE), /* V5TE. */
9623 T(V5TEJ), /* V5TEJ. */
9624 T(V6), /* V6. */
9625 T(V6KZ), /* V6KZ. */
9626 T(V6T2), /* V6T2. */
9627 T(V6K), /* V6K. */
9628 T(V7), /* V7. */
9629 T(V6_M), /* V6_M. */
9630 T(V6S_M), /* V6S_M. */
9631 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9632 };
9633 const int *comb[] =
9634 {
9635 v6t2,
9636 v6k,
9637 v7,
9638 v6_m,
9639 v6s_m,
9640 /* Pseudo-architecture. */
9641 v4t_plus_v6_m
9642 };
9643
9644 /* Check we've not got a higher architecture than we know about. */
9645
9646 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
9647 {
3895f852 9648 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9649 return -1;
9650 }
9651
9652 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9653
9654 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9655 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9656 oldtag = T(V4T_PLUS_V6_M);
9657
9658 /* And override the new tag if we have a Tag_also_compatible_with on the
9659 input. */
9660
9661 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9662 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9663 newtag = T(V4T_PLUS_V6_M);
9664
9665 tagl = (oldtag < newtag) ? oldtag : newtag;
9666 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9667
9668 /* Architectures before V6KZ add features monotonically. */
9669 if (tagh <= TAG_CPU_ARCH_V6KZ)
9670 return result;
9671
9672 result = comb[tagh - T(V6T2)][tagl];
9673
9674 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9675 as the canonical version. */
9676 if (result == T(V4T_PLUS_V6_M))
9677 {
9678 result = T(V4T);
9679 *secondary_compat_out = T(V6_M);
9680 }
9681 else
9682 *secondary_compat_out = -1;
9683
9684 if (result == -1)
9685 {
3895f852 9686 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9687 ibfd, oldtag, newtag);
9688 return -1;
9689 }
9690
9691 return result;
9692#undef T
8e79c3df
CM		 9693}
9694
ee065d83
PB		 9695/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9696 are conflicting attributes. */
906e58ca 9697
ee065d83
PB		 9698static bfd_boolean
9699elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9700{
104d59d1
JM		 9701 obj_attribute *in_attr;
9702 obj_attribute *out_attr;
9703 obj_attribute_list *in_list;
8e79c3df 9704 obj_attribute_list *out_list;
91e22acd 9705 obj_attribute_list **out_listp;
ee065d83
PB		 9706 /* Some tags have 0 = don't care, 1 = strong requirement,
9707 2 = weak requirement. */
91e22acd 9708 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 9709 /* For use with Tag_VFP_arch. */
9710 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 9711 int i;
91e22acd 9712 bfd_boolean result = TRUE;
ee065d83 9713
3e6b1042
DJ		 9714 /* Skip the linker stubs file. This preserves previous behavior
9715 of accepting unknown attributes in the first input file - but
9716 is that a bug? */
9717 if (ibfd->flags & BFD_LINKER_CREATED)
9718 return TRUE;
9719
104d59d1 9720 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9721 {
9722 /* This is the first object. Copy the attributes. */
104d59d1 9723 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9724
9725 /* Use the Tag_null value to indicate the attributes have been
9726 initialized. */
104d59d1 9727 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9728
ee065d83
PB		 9729 return TRUE;
9730 }
9731
104d59d1
JM		 9732 in_attr = elf_known_obj_attributes_proc (ibfd);
9733 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9734 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9735 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9736 {
8e79c3df 9737 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9738 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9739 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9740 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9741 {
9742 _bfd_error_handler
3895f852 9743 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9744 ibfd, obfd);
91e22acd 9745 result = FALSE;
ee065d83
PB		 9746 }
9747 }
9748
104d59d1 9749 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9750 {
9751 /* Merge this attribute with existing attributes. */
9752 switch (i)
9753 {
9754 case Tag_CPU_raw_name:
9755 case Tag_CPU_name:
91e22acd 9756 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9757 break;
9758
9759 case Tag_ABI_optimization_goals:
9760 case Tag_ABI_FP_optimization_goals:
9761 /* Use the first value seen. */
9762 break;
9763
9764 case Tag_CPU_arch:
91e22acd
AS		 9765 {
9766 int secondary_compat = -1, secondary_compat_out = -1;
9767 unsigned int saved_out_attr = out_attr[i].i;
9768 static const char *name_table[] = {
9769 /* These aren't real CPU names, but we can't guess
9770 that from the architecture version alone. */
9771 "Pre v4",
9772 "ARM v4",
9773 "ARM v4T",
9774 "ARM v5T",
9775 "ARM v5TE",
9776 "ARM v5TEJ",
9777 "ARM v6",
9778 "ARM v6KZ",
9779 "ARM v6T2",
9780 "ARM v6K",
9781 "ARM v7",
9782 "ARM v6-M",
9783 "ARM v6S-M"
9784 };
9785
9786 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9787 secondary_compat = get_secondary_compatible_arch (ibfd);
9788 secondary_compat_out = get_secondary_compatible_arch (obfd);
9789 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9790 &secondary_compat_out,
9791 in_attr[i].i,
9792 secondary_compat);
9793 set_secondary_compatible_arch (obfd, secondary_compat_out);
9794
9795 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9796 if (out_attr[i].i == saved_out_attr)
9797 ; /* Leave the names alone. */
9798 else if (out_attr[i].i == in_attr[i].i)
9799 {
9800 /* The output architecture has been changed to match the
9801 input architecture. Use the input names. */
9802 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9803 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9804 : NULL;
9805 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9806 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9807 : NULL;
9808 }
9809 else
9810 {
9811 out_attr[Tag_CPU_name].s = NULL;
9812 out_attr[Tag_CPU_raw_name].s = NULL;
9813 }
9814
9815 /* If we still don't have a value for Tag_CPU_name,
9816 make one up now. Tag_CPU_raw_name remains blank. */
9817 if (out_attr[Tag_CPU_name].s == NULL
9818 && out_attr[i].i < ARRAY_SIZE (name_table))
9819 out_attr[Tag_CPU_name].s =
9820 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9821 }
9822 break;
9823
ee065d83
PB		 9824 case Tag_ARM_ISA_use:
9825 case Tag_THUMB_ISA_use:
ee065d83 9826 case Tag_WMMX_arch:
91e22acd
AS		 9827 case Tag_Advanced_SIMD_arch:
9828 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9829 case Tag_ABI_FP_rounding:
ee065d83
PB		 9830 case Tag_ABI_FP_exceptions:
9831 case Tag_ABI_FP_user_exceptions:
9832 case Tag_ABI_FP_number_model:
91e22acd
AS		 9833 case Tag_VFP_HP_extension:
9834 case Tag_CPU_unaligned_access:
9835 case Tag_T2EE_use:
9836 case Tag_Virtualization_use:
9837 case Tag_MPextension_use:
ee065d83
PB		 9838 /* Use the largest value specified. */
9839 if (in_attr[i].i > out_attr[i].i)
9840 out_attr[i].i = in_attr[i].i;
9841 break;
9842
91e22acd
AS		 9843 case Tag_ABI_align8_preserved:
9844 case Tag_ABI_PCS_RO_data:
9845 /* Use the smallest value specified. */
9846 if (in_attr[i].i < out_attr[i].i)
9847 out_attr[i].i = in_attr[i].i;
9848 break;
9849
9850 case Tag_ABI_align8_needed:
9851 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9852 && (in_attr[Tag_ABI_align8_preserved].i == 0
9853 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9854 {
91e22acd
AS		 9855 /* This error message should be enabled once all non-conformant
9856 binaries in the toolchain have had the attributes set
9857 properly.
ee065d83 9858 _bfd_error_handler
3895f852 9859 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9860 obfd, ibfd);
9861 result = FALSE; */
ee065d83 9862 }
91e22acd
AS		 9863 /* Fall through. */
9864 case Tag_ABI_FP_denormal:
9865 case Tag_ABI_PCS_GOT_use:
9866 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9867 value if greater than 2 (for future-proofing). */
9868 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9869 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9870 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9871 out_attr[i].i = in_attr[i].i;
9872 break;
91e22acd
AS		 9873
9874
9875 case Tag_CPU_arch_profile:
9876 if (out_attr[i].i != in_attr[i].i)
9877 {
9878 /* 0 will merge with anything.
9879 'A' and 'S' merge to 'A'.
9880 'R' and 'S' merge to 'R'.
9881 'M' and 'A|R|S' is an error. */
9882 if (out_attr[i].i == 0
9883 || (out_attr[i].i == 'S'
9884 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9885 out_attr[i].i = in_attr[i].i;
9886 else if (in_attr[i].i == 0
9887 || (in_attr[i].i == 'S'
9888 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9889 ; /* Do nothing. */
9890 else
9891 {
9892 _bfd_error_handler
3895f852 9893 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9894 ibfd,
9895 in_attr[i].i ? in_attr[i].i : '0',
9896 out_attr[i].i ? out_attr[i].i : '0');
9897 result = FALSE;
9898 }
9899 }
9900 break;
b1cc4aeb 9901 case Tag_VFP_arch:
91e22acd
AS		 9902 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9903 largest value if greater than 4 (for future-proofing). */
9904 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9905 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9906 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9907 out_attr[i].i = in_attr[i].i;
9908 break;
ee065d83
PB		 9909 case Tag_PCS_config:
9910 if (out_attr[i].i == 0)
9911 out_attr[i].i = in_attr[i].i;
9912 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9913 {
9914 /* It's sometimes ok to mix different configs, so this is only
9915 a warning. */
9916 _bfd_error_handler
9917 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9918 }
9919 break;
9920 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9921 if (in_attr[i].i != out_attr[i].i
9922 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9923 && in_attr[i].i != AEABI_R9_unused)
9924 {
9925 _bfd_error_handler
3895f852 9926 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9927 result = FALSE;
ee065d83
PB		 9928 }
9929 if (out_attr[i].i == AEABI_R9_unused)
9930 out_attr[i].i = in_attr[i].i;
9931 break;
9932 case Tag_ABI_PCS_RW_data:
9933 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9934 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9935 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9936 {
9937 _bfd_error_handler
3895f852 9938 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9939 ibfd);
91e22acd 9940 result = FALSE;
ee065d83
PB		 9941 }
9942 /* Use the smallest value specified. */
9943 if (in_attr[i].i < out_attr[i].i)
9944 out_attr[i].i = in_attr[i].i;
9945 break;
ee065d83 9946 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9947 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9948 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9949 {
9950 _bfd_error_handler
a9dc9481
JM		 9951 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9952 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9953 }
a9dc9481 9954 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9955 out_attr[i].i = in_attr[i].i;
9956 break;
ee065d83
PB		 9957 case Tag_ABI_enum_size:
9958 if (in_attr[i].i != AEABI_enum_unused)
9959 {
9960 if (out_attr[i].i == AEABI_enum_unused
9961 || out_attr[i].i == AEABI_enum_forced_wide)
9962 {
9963 /* The existing object is compatible with anything.
9964 Use whatever requirements the new object has. */
9965 out_attr[i].i = in_attr[i].i;
9966 }
9967 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9968 && out_attr[i].i != in_attr[i].i
0ffa91dd 9969 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9970 {
91e22acd 9971 static const char *aeabi_enum_names[] =
bf21ed78 9972 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9973 const char *in_name =
9974 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9975 ? aeabi_enum_names[in_attr[i].i]
9976 : "<unknown>";
9977 const char *out_name =
9978 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9979 ? aeabi_enum_names[out_attr[i].i]
9980 : "<unknown>";
ee065d83 9981 _bfd_error_handler
bf21ed78 9982 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9983 ibfd, in_name, out_name);
ee065d83
PB		 9984 }
9985 }
9986 break;
9987 case Tag_ABI_VFP_args:
9988 /* Aready done. */
9989 break;
9990 case Tag_ABI_WMMX_args:
9991 if (in_attr[i].i != out_attr[i].i)
9992 {
9993 _bfd_error_handler
3895f852 9994 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9995 ibfd, obfd);
91e22acd 9996 result = FALSE;
ee065d83
PB		 9997 }
9998 break;
7b86a9fa
AS		 9999 case Tag_compatibility:
10000 /* Merged in target-independent code. */
10001 break;
91e22acd
AS		 10002 case Tag_ABI_HardFP_use:
10003 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
10004 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
10005 || (in_attr[i].i == 2 && out_attr[i].i == 1))
10006 out_attr[i].i = 3;
10007 else if (in_attr[i].i > out_attr[i].i)
10008 out_attr[i].i = in_attr[i].i;
10009 break;
10010 case Tag_ABI_FP_16bit_format:
10011 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10012 {
10013 if (in_attr[i].i != out_attr[i].i)
10014 {
10015 _bfd_error_handler
3895f852 10016 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10017 ibfd, obfd);
10018 result = FALSE;
10019 }
10020 }
10021 if (in_attr[i].i != 0)
10022 out_attr[i].i = in_attr[i].i;
10023 break;
7b86a9fa 10024
91e22acd 10025 case Tag_nodefaults:
2d0bb761
AS		 10026 /* This tag is set if it exists, but the value is unused (and is
10027 typically zero). We don't actually need to do anything here -
10028 the merge happens automatically when the type flags are merged
10029 below. */
91e22acd
AS		 10030 break;
10031 case Tag_also_compatible_with:
10032 /* Already done in Tag_CPU_arch. */
10033 break;
10034 case Tag_conformance:
10035 /* Keep the attribute if it matches. Throw it away otherwise.
10036 No attribute means no claim to conform. */
10037 if (!in_attr[i].s || !out_attr[i].s
10038 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10039 out_attr[i].s = NULL;
10040 break;
3cfad14c 10041
91e22acd 10042 default:
3cfad14c 10043 {
91e22acd
AS		 10044 bfd *err_bfd = NULL;
10045
10046 /* The "known_obj_attributes" table does contain some undefined
10047 attributes. Ensure that there are unused. */
10048 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10049 err_bfd = obfd;
10050 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10051 err_bfd = ibfd;
10052
10053 if (err_bfd != NULL)
10054 {
10055 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10056 if ((i & 127) < 64)
10057 {
10058 _bfd_error_handler
10059 (_("%B: Unknown mandatory EABI object attribute %d"),
10060 err_bfd, i);
10061 bfd_set_error (bfd_error_bad_value);
10062 result = FALSE;
10063 }
10064 else
10065 {
10066 _bfd_error_handler
10067 (_("Warning: %B: Unknown EABI object attribute %d"),
10068 err_bfd, i);
10069 }
10070 }
10071
10072 /* Only pass on attributes that match in both inputs. */
10073 if (in_attr[i].i != out_attr[i].i
10074 || in_attr[i].s != out_attr[i].s
10075 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10076 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10077 {
10078 out_attr[i].i = 0;
10079 out_attr[i].s = NULL;
10080 }
3cfad14c 10081 }
91e22acd
AS		 10082 }
10083
10084 /* If out_attr was copied from in_attr then it won't have a type yet. */
10085 if (in_attr[i].type && !out_attr[i].type)
10086 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10087 }
10088
104d59d1
JM		 10089 /* Merge Tag_compatibility attributes and any common GNU ones. */
10090 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 10091
104d59d1
JM		 10092 /* Check for any attributes not known on ARM. */
10093 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10094 out_listp = &elf_other_obj_attributes_proc (obfd);
10095 out_list = *out_listp;
8e79c3df 10096
91e22acd 10097 for (; in_list || out_list; )
ee065d83 10098 {
91e22acd
AS		 10099 bfd *err_bfd = NULL;
10100 int err_tag = 0;
8e79c3df
CM		 10101
10102 /* The tags for each list are in numerical order. */
10103 /* If the tags are equal, then merge. */
91e22acd 10104 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10105 {
91e22acd
AS		 10106 /* This attribute only exists in obfd. We can't merge, and we don't
10107 know what the tag means, so delete it. */
10108 err_bfd = obfd;
10109 err_tag = out_list->tag;
10110 *out_listp = out_list->next;
10111 out_list = *out_listp;
8e79c3df 10112 }
91e22acd 10113 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10114 {
91e22acd
AS		 10115 /* This attribute only exists in ibfd. We can't merge, and we don't
10116 know what the tag means, so ignore it. */
10117 err_bfd = ibfd;
10118 err_tag = in_list->tag;
8e79c3df 10119 in_list = in_list->next;
eb111b1f 10120 }
91e22acd
AS		 10121 else /* The tags are equal. */
10122 {
10123 /* As present, all attributes in the list are unknown, and
10124 therefore can't be merged meaningfully. */
10125 err_bfd = obfd;
10126 err_tag = out_list->tag;
10127
10128 /* Only pass on attributes that match in both inputs. */
10129 if (in_list->attr.i != out_list->attr.i
10130 || in_list->attr.s != out_list->attr.s
10131 || (in_list->attr.s && out_list->attr.s
10132 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10133 {
10134 /* No match. Delete the attribute. */
10135 *out_listp = out_list->next;
10136 out_list = *out_listp;
10137 }
10138 else
10139 {
10140 /* Matched. Keep the attribute and move to the next. */
10141 out_list = out_list->next;
10142 in_list = in_list->next;
10143 }
10144 }
10145
10146 if (err_bfd)
10147 {
10148 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10149 if ((err_tag & 127) < 64)
10150 {
10151 _bfd_error_handler
10152 (_("%B: Unknown mandatory EABI object attribute %d"),
10153 err_bfd, err_tag);
10154 bfd_set_error (bfd_error_bad_value);
10155 result = FALSE;
10156 }
10157 else
10158 {
10159 _bfd_error_handler
10160 (_("Warning: %B: Unknown EABI object attribute %d"),
10161 err_bfd, err_tag);
10162 }
10163 }
ee065d83 10164 }
91e22acd 10165 return result;
252b5132
RH		 10166}
10167
3a4a14e9
PB		 10168
10169/* Return TRUE if the two EABI versions are incompatible. */
10170
10171static bfd_boolean
10172elf32_arm_versions_compatible (unsigned iver, unsigned over)
10173{
10174 /* v4 and v5 are the same spec before and after it was released,
10175 so allow mixing them. */
10176 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10177 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10178 return TRUE;
10179
10180 return (iver == over);
10181}
10182
252b5132
RH		 10183/* Merge backend specific data from an object file to the output
10184 object file when linking. */
9b485d32 10185
b34976b6 10186static bfd_boolean
57e8b36a 10187elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 10188{
10189 flagword out_flags;
10190 flagword in_flags;
b34976b6 10191 bfd_boolean flags_compatible = TRUE;
cf919dfd 10192 asection *sec;
252b5132 10193
9b485d32 10194 /* Check if we have the same endianess. */
82e51918 10195 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 10196 return FALSE;
1fe494a5 10197
0ffa91dd 10198 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10199 return TRUE;
252b5132 10200
ee065d83
PB		 10201 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
10202 return FALSE;
10203
252b5132
RH		 10204 /* The input BFD must have had its flags initialised. */
10205 /* The following seems bogus to me -- The flags are initialized in
10206 the assembler but I don't think an elf_flags_init field is
9b485d32 10207 written into the object. */
252b5132
RH		 10208 /* BFD_ASSERT (elf_flags_init (ibfd)); */
10209
10210 in_flags = elf_elfheader (ibfd)->e_flags;
10211 out_flags = elf_elfheader (obfd)->e_flags;
10212
23684067
PB		 10213 /* In theory there is no reason why we couldn't handle this. However
10214 in practice it isn't even close to working and there is no real
10215 reason to want it. */
10216 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 10217 && !(ibfd->flags & DYNAMIC)
23684067
PB		 10218 && (in_flags & EF_ARM_BE8))
10219 {
3895f852 10220 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 10221 ibfd);
10222 return FALSE;
10223 }
10224
252b5132
RH		 10225 if (!elf_flags_init (obfd))
10226 {
fe077fa6
NC		 10227 /* If the input is the default architecture and had the default
10228 flags then do not bother setting the flags for the output
10229 architecture, instead allow future merges to do this. If no
10230 future merges ever set these flags then they will retain their
10231 uninitialised values, which surprise surprise, correspond
252b5132 10232 to the default values. */
fe077fa6
NC		 10233 if (bfd_get_arch_info (ibfd)->the_default
10234 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 10235 return TRUE;
252b5132 10236
b34976b6 10237 elf_flags_init (obfd) = TRUE;
252b5132
RH		 10238 elf_elfheader (obfd)->e_flags = in_flags;
10239
10240 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
10241 && bfd_get_arch_info (obfd)->the_default)
10242 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
10243
b34976b6 10244 return TRUE;
252b5132
RH		 10245 }
10246
5a6c6817
NC		 10247 /* Determine what should happen if the input ARM architecture
10248 does not match the output ARM architecture. */
10249 if (! bfd_arm_merge_machines (ibfd, obfd))
10250 return FALSE;
e16bb312 10251
1006ba19 10252 /* Identical flags must be compatible. */
252b5132 10253 if (in_flags == out_flags)
b34976b6 10254 return TRUE;
252b5132 10255
35a0f415
DJ		 10256 /* Check to see if the input BFD actually contains any sections. If
10257 not, its flags may not have been initialised either, but it
8e3de13a 10258 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 10259 dynamic objects; their section list may be emptied by
d1f161ea 10260 elf_link_add_object_symbols.
35a0f415 10261
d1f161ea
NC		 10262 Also check to see if there are no code sections in the input.
10263 In this case there is no need to check for code specific flags.
10264 XXX - do we need to worry about floating-point format compatability
10265 in data sections ? */
35a0f415 10266 if (!(ibfd->flags & DYNAMIC))
cf919dfd 10267 {
35a0f415 10268 bfd_boolean null_input_bfd = TRUE;
d1f161ea 10269 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 10270
10271 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 10272 {
35a0f415
DJ		 10273 /* Ignore synthetic glue sections. */
10274 if (strcmp (sec->name, ".glue_7")
10275 && strcmp (sec->name, ".glue_7t"))
10276 {
d1f161ea
NC		 10277 if ((bfd_get_section_flags (ibfd, sec)
10278 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10279 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10280 only_data_sections = FALSE;
10281
35a0f415
DJ		 10282 null_input_bfd = FALSE;
10283 break;
10284 }
cf919dfd 10285 }
d1f161ea
NC		 10286
10287 if (null_input_bfd || only_data_sections)
35a0f415 10288 return TRUE;
cf919dfd 10289 }
cf919dfd 10290
252b5132 10291 /* Complain about various flag mismatches. */
3a4a14e9
PB		 10292 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
10293 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 10294 {
d003868e 10295 _bfd_error_handler
3895f852 10296 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 10297 ibfd, obfd,
10298 (in_flags & EF_ARM_EABIMASK) >> 24,
10299 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 10300 return FALSE;
fc830a83 10301 }
252b5132 10302
1006ba19 10303 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 10304 /* VxWorks libraries do not use these flags. */
10305 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
10306 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
10307 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 10308 {
fd2ec330 10309 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 10310 {
d003868e 10311 _bfd_error_handler
3895f852 10312 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 10313 ibfd, obfd,
10314 in_flags & EF_ARM_APCS_26 ? 26 : 32,
10315 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 10316 flags_compatible = FALSE;
1006ba19 10317 }
252b5132 10318
fd2ec330 10319 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 10320 {
5eefb65f 10321 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 10322 _bfd_error_handler
3895f852 10323 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 10324 ibfd, obfd);
5eefb65f 10325 else
d003868e 10326 _bfd_error_handler
3895f852 10327 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 10328 ibfd, obfd);
63b0f745 10329
b34976b6 10330 flags_compatible = FALSE;
1006ba19 10331 }
252b5132 10332
96a846ea 10333 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 10334 {
96a846ea 10335 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 10336 _bfd_error_handler
3895f852 10337 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 10338 ibfd, obfd);
5eefb65f 10339 else
d003868e 10340 _bfd_error_handler
3895f852 10341 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 10342 ibfd, obfd);
fde78edd
NC		 10343
10344 flags_compatible = FALSE;
10345 }
10346
10347 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
10348 {
10349 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 10350 _bfd_error_handler
3895f852 10351 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 10352 ibfd, obfd);
fde78edd 10353 else
d003868e 10354 _bfd_error_handler
3895f852 10355 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 10356 ibfd, obfd);
63b0f745 10357
b34976b6 10358 flags_compatible = FALSE;
1006ba19 10359 }
96a846ea
RE		 10360
10361#ifdef EF_ARM_SOFT_FLOAT
10362 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
10363 {
10364 /* We can allow interworking between code that is VFP format
10365 layout, and uses either soft float or integer regs for
10366 passing floating point arguments and results. We already
10367 know that the APCS_FLOAT flags match; similarly for VFP
10368 flags. */
10369 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
10370 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
10371 {
10372 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 10373 _bfd_error_handler
3895f852 10374 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 10375 ibfd, obfd);
96a846ea 10376 else
d003868e 10377 _bfd_error_handler
3895f852 10378 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 10379 ibfd, obfd);
96a846ea 10380
b34976b6 10381 flags_compatible = FALSE;
96a846ea
RE		 10382 }
10383 }
ee43f35e 10384#endif
252b5132 10385
1006ba19 10386 /* Interworking mismatch is only a warning. */
fd2ec330 10387 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 10388 {
e3c8793a
NC		 10389 if (in_flags & EF_ARM_INTERWORK)
10390 {
d003868e
AM		 10391 _bfd_error_handler
10392 (_("Warning: %B supports interworking, whereas %B does not"),
10393 ibfd, obfd);
e3c8793a
NC		 10394 }
10395 else
10396 {
d003868e
AM		 10397 _bfd_error_handler
10398 (_("Warning: %B does not support interworking, whereas %B does"),
10399 ibfd, obfd);
e3c8793a 10400 }
8f615d07 10401 }
252b5132 10402 }
63b0f745 10403
1006ba19 10404 return flags_compatible;
252b5132
RH		 10405}
10406
9b485d32
NC		 10407/* Display the flags field. */
10408
b34976b6 10409static bfd_boolean
57e8b36a 10410elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10411{
fc830a83
NC		 10412 FILE * file = (FILE *) ptr;
10413 unsigned long flags;
252b5132
RH		 10414
10415 BFD_ASSERT (abfd != NULL && ptr != NULL);
10416
10417 /* Print normal ELF private data. */
10418 _bfd_elf_print_private_bfd_data (abfd, ptr);
10419
fc830a83 10420 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10421 /* Ignore init flag - it may not be set, despite the flags field
10422 containing valid data. */
252b5132
RH		 10423
10424 /* xgettext:c-format */
9b485d32 10425 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10426
fc830a83
NC		 10427 switch (EF_ARM_EABI_VERSION (flags))
10428 {
10429 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10430 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10431 official ARM ELF extended ABI. Hence they are only decoded if
10432 the EABI version is not set. */
fd2ec330 10433 if (flags & EF_ARM_INTERWORK)
9b485d32 10434 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10435
fd2ec330 10436 if (flags & EF_ARM_APCS_26)
6c571f00 10437 fprintf (file, " [APCS-26]");
fc830a83 10438 else
6c571f00 10439 fprintf (file, " [APCS-32]");
9a5aca8c 10440
96a846ea
RE		 10441 if (flags & EF_ARM_VFP_FLOAT)
10442 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10443 else if (flags & EF_ARM_MAVERICK_FLOAT)
10444 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10445 else
10446 fprintf (file, _(" [FPA float format]"));
10447
fd2ec330 10448 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10449 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10450
fd2ec330 10451 if (flags & EF_ARM_PIC)
9b485d32 10452 fprintf (file, _(" [position independent]"));
fc830a83 10453
fd2ec330 10454 if (flags & EF_ARM_NEW_ABI)
9b485d32 10455 fprintf (file, _(" [new ABI]"));
9a5aca8c 10456
fd2ec330 10457 if (flags & EF_ARM_OLD_ABI)
9b485d32 10458 fprintf (file, _(" [old ABI]"));
9a5aca8c 10459
fd2ec330 10460 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10461 fprintf (file, _(" [software FP]"));
9a5aca8c 10462
96a846ea
RE		 10463 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10464 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10465 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10466 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10467 break;
9a5aca8c 10468
fc830a83 10469 case EF_ARM_EABI_VER1:
9b485d32 10470 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10471
fc830a83 10472 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10473 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10474 else
9b485d32 10475 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10476
fc830a83
NC		 10477 flags &= ~ EF_ARM_SYMSARESORTED;
10478 break;
9a5aca8c 10479
fd2ec330
PB		 10480 case EF_ARM_EABI_VER2:
10481 fprintf (file, _(" [Version2 EABI]"));
10482
10483 if (flags & EF_ARM_SYMSARESORTED)
10484 fprintf (file, _(" [sorted symbol table]"));
10485 else
10486 fprintf (file, _(" [unsorted symbol table]"));
10487
10488 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10489 fprintf (file, _(" [dynamic symbols use segment index]"));
10490
10491 if (flags & EF_ARM_MAPSYMSFIRST)
10492 fprintf (file, _(" [mapping symbols precede others]"));
10493
99e4ae17 10494 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10495 | EF_ARM_MAPSYMSFIRST);
10496 break;
10497
d507cf36
PB		 10498 case EF_ARM_EABI_VER3:
10499 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10500 break;
10501
10502 case EF_ARM_EABI_VER4:
10503 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10504 goto eabi;
d507cf36 10505
3a4a14e9
PB		 10506 case EF_ARM_EABI_VER5:
10507 fprintf (file, _(" [Version5 EABI]"));
10508 eabi:
d507cf36
PB		 10509 if (flags & EF_ARM_BE8)
10510 fprintf (file, _(" [BE8]"));
10511
10512 if (flags & EF_ARM_LE8)
10513 fprintf (file, _(" [LE8]"));
10514
10515 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10516 break;
10517
fc830a83 10518 default:
9b485d32 10519 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10520 break;
10521 }
252b5132 10522
fc830a83 10523 flags &= ~ EF_ARM_EABIMASK;
252b5132 10524
fc830a83 10525 if (flags & EF_ARM_RELEXEC)
9b485d32 10526 fprintf (file, _(" [relocatable executable]"));
252b5132 10527
fc830a83 10528 if (flags & EF_ARM_HASENTRY)
9b485d32 10529 fprintf (file, _(" [has entry point]"));
252b5132 10530
fc830a83
NC		 10531 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10532
10533 if (flags)
9b485d32 10534 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10535
252b5132
RH		 10536 fputc ('\n', file);
10537
b34976b6 10538 return TRUE;
252b5132
RH		 10539}
10540
10541static int
57e8b36a 10542elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10543{
2f0ca46a
NC		 10544 switch (ELF_ST_TYPE (elf_sym->st_info))
10545 {
10546 case STT_ARM_TFUNC:
10547 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10548
2f0ca46a
NC		 10549 case STT_ARM_16BIT:
10550 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10551 This allows us to distinguish between data used by Thumb instructions
10552 and non-data (which is probably code) inside Thumb regions of an
10553 executable. */
1a0eb693 10554 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10555 return ELF_ST_TYPE (elf_sym->st_info);
10556 break;
9a5aca8c 10557
ce855c42
NC		 10558 default:
10559 break;
2f0ca46a
NC		 10560 }
10561
10562 return type;
252b5132 10563}
f21f3fe0 10564
252b5132 10565static asection *
07adf181
AM		 10566elf32_arm_gc_mark_hook (asection *sec,
10567 struct bfd_link_info *info,
10568 Elf_Internal_Rela *rel,
10569 struct elf_link_hash_entry *h,
10570 Elf_Internal_Sym *sym)
252b5132
RH		 10571{
10572 if (h != NULL)
07adf181 10573 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10574 {
10575 case R_ARM_GNU_VTINHERIT:
10576 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10577 return NULL;
10578 }
9ad5cbcf 10579
07adf181 10580 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10581}
10582
780a67af
NC		 10583/* Update the got entry reference counts for the section being removed. */
10584
b34976b6 10585static bfd_boolean
ba93b8ac
DJ		 10586elf32_arm_gc_sweep_hook (bfd * abfd,
10587 struct bfd_link_info * info,
10588 asection * sec,
10589 const Elf_Internal_Rela * relocs)
252b5132 10590{
5e681ec4
PB		 10591 Elf_Internal_Shdr *symtab_hdr;
10592 struct elf_link_hash_entry **sym_hashes;
10593 bfd_signed_vma *local_got_refcounts;
10594 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10595 struct elf32_arm_link_hash_table * globals;
10596
7dda2462
TG		 10597 if (info->relocatable)
10598 return TRUE;
10599
eb043451 10600 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10601
10602 elf_section_data (sec)->local_dynrel = NULL;
10603
0ffa91dd 10604 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10605 sym_hashes = elf_sym_hashes (abfd);
10606 local_got_refcounts = elf_local_got_refcounts (abfd);
10607
906e58ca 10608 check_use_blx (globals);
bd97cb95 10609
5e681ec4
PB		 10610 relend = relocs + sec->reloc_count;
10611 for (rel = relocs; rel < relend; rel++)
eb043451 10612 {
3eb128b2
AM		 10613 unsigned long r_symndx;
10614 struct elf_link_hash_entry *h = NULL;
eb043451 10615 int r_type;
5e681ec4 10616
3eb128b2
AM		 10617 r_symndx = ELF32_R_SYM (rel->r_info);
10618 if (r_symndx >= symtab_hdr->sh_info)
10619 {
10620 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10621 while (h->root.type == bfd_link_hash_indirect
10622 || h->root.type == bfd_link_hash_warning)
10623 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10624 }
10625
eb043451 10626 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10627 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10628 switch (r_type)
10629 {
10630 case R_ARM_GOT32:
eb043451 10631 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10632 case R_ARM_TLS_GD32:
10633 case R_ARM_TLS_IE32:
3eb128b2 10634 if (h != NULL)
eb043451 10635 {
eb043451
PB		 10636 if (h->got.refcount > 0)
10637 h->got.refcount -= 1;
10638 }
10639 else if (local_got_refcounts != NULL)
10640 {
10641 if (local_got_refcounts[r_symndx] > 0)
10642 local_got_refcounts[r_symndx] -= 1;
10643 }
10644 break;
10645
ba93b8ac
DJ		 10646 case R_ARM_TLS_LDM32:
10647 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10648 break;
10649
eb043451 10650 case R_ARM_ABS32:
bb224fc3 10651 case R_ARM_ABS32_NOI:
eb043451 10652 case R_ARM_REL32:
bb224fc3 10653 case R_ARM_REL32_NOI:
eb043451
PB		 10654 case R_ARM_PC24:
10655 case R_ARM_PLT32:
5b5bb741
PB		 10656 case R_ARM_CALL:
10657 case R_ARM_JUMP24:
eb043451 10658 case R_ARM_PREL31:
c19d1205 10659 case R_ARM_THM_CALL:
bd97cb95
DJ		 10660 case R_ARM_THM_JUMP24:
10661 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10662 case R_ARM_MOVW_ABS_NC:
10663 case R_ARM_MOVT_ABS:
10664 case R_ARM_MOVW_PREL_NC:
10665 case R_ARM_MOVT_PREL:
10666 case R_ARM_THM_MOVW_ABS_NC:
10667 case R_ARM_THM_MOVT_ABS:
10668 case R_ARM_THM_MOVW_PREL_NC:
10669 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10670 /* Should the interworking branches be here also? */
10671
3eb128b2 10672 if (h != NULL)
eb043451
PB		 10673 {
10674 struct elf32_arm_link_hash_entry *eh;
10675 struct elf32_arm_relocs_copied **pp;
10676 struct elf32_arm_relocs_copied *p;
5e681ec4 10677
b7693d02 10678 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10679
eb043451 10680 if (h->plt.refcount > 0)
b7693d02
DJ		 10681 {
10682 h->plt.refcount -= 1;
bd97cb95
DJ		 10683 if (r_type == R_ARM_THM_CALL)
10684 eh->plt_maybe_thumb_refcount--;
10685
10686 if (r_type == R_ARM_THM_JUMP24
10687 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10688 eh->plt_thumb_refcount--;
10689 }
5e681ec4 10690
eb043451 10691 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10692 || r_type == R_ARM_REL32
10693 || r_type == R_ARM_ABS32_NOI
10694 || r_type == R_ARM_REL32_NOI)
eb043451 10695 {
eb043451
PB		 10696 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10697 pp = &p->next)
10698 if (p->section == sec)
10699 {
10700 p->count -= 1;
bb224fc3
MS		 10701 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10702 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10703 p->pc_count -= 1;
eb043451
PB		 10704 if (p->count == 0)
10705 *pp = p->next;
10706 break;
10707 }
10708 }
10709 }
10710 break;
5e681ec4 10711
eb043451
PB		 10712 default:
10713 break;
10714 }
10715 }
5e681ec4 10716
b34976b6 10717 return TRUE;
252b5132
RH		 10718}
10719
780a67af
NC		 10720/* Look through the relocs for a section during the first phase. */
10721
b34976b6 10722static bfd_boolean
57e8b36a
NC		 10723elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10724 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10725{
b34976b6
AM		 10726 Elf_Internal_Shdr *symtab_hdr;
10727 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10728 const Elf_Internal_Rela *rel;
10729 const Elf_Internal_Rela *rel_end;
10730 bfd *dynobj;
5e681ec4 10731 asection *sreloc;
b34976b6 10732 bfd_vma *local_got_offsets;
5e681ec4 10733 struct elf32_arm_link_hash_table *htab;
39623e12 10734 bfd_boolean needs_plt;
ce98a316 10735 unsigned long nsyms;
9a5aca8c 10736
1049f94e 10737 if (info->relocatable)
b34976b6 10738 return TRUE;
9a5aca8c 10739
0ffa91dd
NC		 10740 BFD_ASSERT (is_arm_elf (abfd));
10741
5e681ec4
PB		 10742 htab = elf32_arm_hash_table (info);
10743 sreloc = NULL;
9a5aca8c 10744
67687978
PB		 10745 /* Create dynamic sections for relocatable executables so that we can
10746 copy relocations. */
10747 if (htab->root.is_relocatable_executable
10748 && ! htab->root.dynamic_sections_created)
10749 {
10750 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10751 return FALSE;
10752 }
10753
252b5132
RH		 10754 dynobj = elf_hash_table (info)->dynobj;
10755 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10756
0ffa91dd 10757 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10758 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10759 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10760
252b5132
RH		 10761 rel_end = relocs + sec->reloc_count;
10762 for (rel = relocs; rel < rel_end; rel++)
10763 {
10764 struct elf_link_hash_entry *h;
b7693d02 10765 struct elf32_arm_link_hash_entry *eh;
252b5132 10766 unsigned long r_symndx;
eb043451 10767 int r_type;
9a5aca8c 10768
252b5132 10769 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10770 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10771 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10772
ce98a316
NC		 10773 if (r_symndx >= nsyms
10774 /* PR 9934: It is possible to have relocations that do not
10775 refer to symbols, thus it is also possible to have an
10776 object file containing relocations but no symbol table. */
10777 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10778 {
10779 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10780 r_symndx);
ba93b8ac
DJ		 10781 return FALSE;
10782 }
10783
ce98a316 10784 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10785 h = NULL;
10786 else
973a3492
L		 10787 {
10788 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10789 while (h->root.type == bfd_link_hash_indirect
10790 || h->root.type == bfd_link_hash_warning)
10791 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10792 }
9a5aca8c 10793
b7693d02
DJ		 10794 eh = (struct elf32_arm_link_hash_entry *) h;
10795
eb043451 10796 switch (r_type)
252b5132 10797 {
5e681ec4 10798 case R_ARM_GOT32:
eb043451 10799 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10800 case R_ARM_TLS_GD32:
10801 case R_ARM_TLS_IE32:
5e681ec4 10802 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10803 {
10804 int tls_type, old_tls_type;
5e681ec4 10805
ba93b8ac
DJ		 10806 switch (r_type)
10807 {
10808 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10809 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10810 default: tls_type = GOT_NORMAL; break;
10811 }
252b5132 10812
ba93b8ac
DJ		 10813 if (h != NULL)
10814 {
10815 h->got.refcount++;
10816 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10817 }
10818 else
10819 {
10820 bfd_signed_vma *local_got_refcounts;
10821
10822 /* This is a global offset table entry for a local symbol. */
10823 local_got_refcounts = elf_local_got_refcounts (abfd);
10824 if (local_got_refcounts == NULL)
10825 {
10826 bfd_size_type size;
906e58ca 10827
ba93b8ac 10828 size = symtab_hdr->sh_info;
906e58ca 10829 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 10830 local_got_refcounts = bfd_zalloc (abfd, size);
10831 if (local_got_refcounts == NULL)
10832 return FALSE;
10833 elf_local_got_refcounts (abfd) = local_got_refcounts;
10834 elf32_arm_local_got_tls_type (abfd)
10835 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10836 }
10837 local_got_refcounts[r_symndx] += 1;
10838 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10839 }
10840
10841 /* We will already have issued an error message if there is a
10842 TLS / non-TLS mismatch, based on the symbol type. We don't
10843 support any linker relaxations. So just combine any TLS
10844 types needed. */
10845 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10846 && tls_type != GOT_NORMAL)
10847 tls_type |= old_tls_type;
10848
10849 if (old_tls_type != tls_type)
10850 {
10851 if (h != NULL)
10852 elf32_arm_hash_entry (h)->tls_type = tls_type;
10853 else
10854 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10855 }
10856 }
8029a119 10857 /* Fall through. */
ba93b8ac
DJ		 10858
10859 case R_ARM_TLS_LDM32:
10860 if (r_type == R_ARM_TLS_LDM32)
10861 htab->tls_ldm_got.refcount++;
8029a119 10862 /* Fall through. */
252b5132 10863
c19d1205 10864 case R_ARM_GOTOFF32:
5e681ec4
PB		 10865 case R_ARM_GOTPC:
10866 if (htab->sgot == NULL)
10867 {
10868 if (htab->root.dynobj == NULL)
10869 htab->root.dynobj = abfd;
10870 if (!create_got_section (htab->root.dynobj, info))
10871 return FALSE;
10872 }
252b5132
RH		 10873 break;
10874
00a97672
RS		 10875 case R_ARM_ABS12:
10876 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10877 ldr __GOTT_INDEX__ offsets. */
10878 if (!htab->vxworks_p)
10879 break;
8029a119 10880 /* Fall through. */
00a97672 10881
252b5132 10882 case R_ARM_PC24:
7359ea65 10883 case R_ARM_PLT32:
5b5bb741
PB		 10884 case R_ARM_CALL:
10885 case R_ARM_JUMP24:
eb043451 10886 case R_ARM_PREL31:
c19d1205 10887 case R_ARM_THM_CALL:
bd97cb95
DJ		 10888 case R_ARM_THM_JUMP24:
10889 case R_ARM_THM_JUMP19:
39623e12
PB		 10890 needs_plt = 1;
10891 goto normal_reloc;
10892
96c23d59
JM		 10893 case R_ARM_MOVW_ABS_NC:
10894 case R_ARM_MOVT_ABS:
10895 case R_ARM_THM_MOVW_ABS_NC:
10896 case R_ARM_THM_MOVT_ABS:
10897 if (info->shared)
10898 {
10899 (*_bfd_error_handler)
10900 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10901 abfd, elf32_arm_howto_table_1[r_type].name,
10902 (h) ? h->root.root.string : "a local symbol");
10903 bfd_set_error (bfd_error_bad_value);
10904 return FALSE;
10905 }
10906
10907 /* Fall through. */
39623e12
PB		 10908 case R_ARM_ABS32:
10909 case R_ARM_ABS32_NOI:
10910 case R_ARM_REL32:
10911 case R_ARM_REL32_NOI:
b6895b4f
PB		 10912 case R_ARM_MOVW_PREL_NC:
10913 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10914 case R_ARM_THM_MOVW_PREL_NC:
10915 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10916 needs_plt = 0;
10917 normal_reloc:
10918
b7693d02 10919 /* Should the interworking branches be listed here? */
7359ea65 10920 if (h != NULL)
5e681ec4
PB		 10921 {
10922 /* If this reloc is in a read-only section, we might
10923 need a copy reloc. We can't check reliably at this
10924 stage whether the section is read-only, as input
10925 sections have not yet been mapped to output sections.
10926 Tentatively set the flag for now, and correct in
10927 adjust_dynamic_symbol. */
7359ea65 10928 if (!info->shared)
f5385ebf 10929 h->non_got_ref = 1;
7359ea65 10930
5e681ec4 10931 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10932 refers to is in a different object. We can't tell for
10933 sure yet, because something later might force the
10934 symbol local. */
39623e12 10935 if (needs_plt)
f5385ebf 10936 h->needs_plt = 1;
4f199be3
DJ		 10937
10938 /* If we create a PLT entry, this relocation will reference
10939 it, even if it's an ABS32 relocation. */
10940 h->plt.refcount += 1;
b7693d02 10941
bd97cb95
DJ		 10942 /* It's too early to use htab->use_blx here, so we have to
10943 record possible blx references separately from
10944 relocs that definitely need a thumb stub. */
10945
c19d1205 10946 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10947 eh->plt_maybe_thumb_refcount += 1;
10948
10949 if (r_type == R_ARM_THM_JUMP24
10950 || r_type == R_ARM_THM_JUMP19)
b7693d02 10951 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10952 }
10953
67687978
PB		 10954 /* If we are creating a shared library or relocatable executable,
10955 and this is a reloc against a global symbol, or a non PC
10956 relative reloc against a local symbol, then we need to copy
10957 the reloc into the shared library. However, if we are linking
10958 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10959 global symbol which is defined in an object we are
10960 including in the link (i.e., DEF_REGULAR is set). At
10961 this point we have not seen all the input files, so it is
10962 possible that DEF_REGULAR is not set now but will be set
10963 later (it is never cleared). We account for that
10964 possibility below by storing information in the
5e681ec4 10965 relocs_copied field of the hash table entry. */
67687978 10966 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10967 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10968 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10969 || (h != NULL && ! h->needs_plt
10970 && (! info->symbolic || ! h->def_regular))))
252b5132 10971 {
5e681ec4
PB		 10972 struct elf32_arm_relocs_copied *p, **head;
10973
252b5132
RH		 10974 /* When creating a shared object, we must copy these
10975 reloc types into the output file. We create a reloc
10976 section in dynobj and make room for this reloc. */
83bac4b0 10977 if (sreloc == NULL)
252b5132 10978 {
83bac4b0
NC		 10979 sreloc = _bfd_elf_make_dynamic_reloc_section
10980 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10981
83bac4b0 10982 if (sreloc == NULL)
b34976b6 10983 return FALSE;
252b5132 10984
83bac4b0 10985 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10986 if (htab->symbian_p)
252b5132 10987 {
83bac4b0 10988 flagword flags;
5e681ec4 10989
83bac4b0 10990 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10991 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10992 bfd_set_section_flags (dynobj, sreloc, flags);
10993 }
252b5132
RH		 10994 }
10995
5e681ec4
PB		 10996 /* If this is a global symbol, we count the number of
10997 relocations we need for this symbol. */
10998 if (h != NULL)
252b5132 10999 {
5e681ec4
PB		 11000 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
11001 }
11002 else
11003 {
11004 /* Track dynamic relocs needed for local syms too.
11005 We really need local syms available to do this
11006 easily. Oh well. */
5e681ec4 11007 asection *s;
6edfbbad 11008 void *vpp;
87d72d41 11009 Elf_Internal_Sym *isym;
6edfbbad 11010
87d72d41
AM		 11011 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11012 abfd, r_symndx);
11013 if (isym == NULL)
5e681ec4 11014 return FALSE;
57e8b36a 11015
87d72d41
AM		 11016 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11017 if (s == NULL)
11018 s = sec;
11019
6edfbbad
DJ		 11020 vpp = &elf_section_data (s)->local_dynrel;
11021 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 11022 }
57e8b36a 11023
5e681ec4
PB		 11024 p = *head;
11025 if (p == NULL || p->section != sec)
11026 {
11027 bfd_size_type amt = sizeof *p;
57e8b36a 11028
5e681ec4 11029 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 11030 if (p == NULL)
5e681ec4
PB		 11031 return FALSE;
11032 p->next = *head;
11033 *head = p;
11034 p->section = sec;
11035 p->count = 0;
ba93b8ac 11036 p->pc_count = 0;
252b5132 11037 }
57e8b36a 11038
bb224fc3 11039 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11040 p->pc_count += 1;
71a976dd 11041 p->count += 1;
252b5132
RH		 11042 }
11043 break;
11044
11045 /* This relocation describes the C++ object vtable hierarchy.
11046 Reconstruct it for later use during GC. */
11047 case R_ARM_GNU_VTINHERIT:
c152c796 11048 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11049 return FALSE;
252b5132 11050 break;
9a5aca8c 11051
252b5132
RH		 11052 /* This relocation describes which C++ vtable entries are actually
11053 used. Record for later use during GC. */
11054 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11055 BFD_ASSERT (h != NULL);
11056 if (h != NULL
11057 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11058 return FALSE;
252b5132
RH		 11059 break;
11060 }
11061 }
f21f3fe0 11062
b34976b6 11063 return TRUE;
252b5132
RH		 11064}
11065
6a5bb875
PB		 11066/* Unwinding tables are not referenced directly. This pass marks them as
11067 required if the corresponding code section is marked. */
11068
11069static bfd_boolean
906e58ca
NC		 11070elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11071 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11072{
11073 bfd *sub;
11074 Elf_Internal_Shdr **elf_shdrp;
11075 bfd_boolean again;
11076
11077 /* Marking EH data may cause additional code sections to be marked,
11078 requiring multiple passes. */
11079 again = TRUE;
11080 while (again)
11081 {
11082 again = FALSE;
11083 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11084 {
11085 asection *o;
11086
0ffa91dd 11087 if (! is_arm_elf (sub))
6a5bb875
PB		 11088 continue;
11089
11090 elf_shdrp = elf_elfsections (sub);
11091 for (o = sub->sections; o != NULL; o = o->next)
11092 {
11093 Elf_Internal_Shdr *hdr;
0ffa91dd 11094
6a5bb875 11095 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11096 if (hdr->sh_type == SHT_ARM_EXIDX
11097 && hdr->sh_link
11098 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11099 && !o->gc_mark
11100 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11101 {
11102 again = TRUE;
11103 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11104 return FALSE;
11105 }
11106 }
11107 }
11108 }
11109
11110 return TRUE;
11111}
11112
3c9458e9
NC		 11113/* Treat mapping symbols as special target symbols. */
11114
11115static bfd_boolean
11116elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11117{
b0796911
PB		 11118 return bfd_is_arm_special_symbol_name (sym->name,
11119 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11120}
11121
0367ecfb
NC		 11122/* This is a copy of elf_find_function() from elf.c except that
11123 ARM mapping symbols are ignored when looking for function names
11124 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11125
0367ecfb
NC		 11126static bfd_boolean
11127arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11128 asection * section,
11129 asymbol ** symbols,
11130 bfd_vma offset,
11131 const char ** filename_ptr,
11132 const char ** functionname_ptr)
11133{
11134 const char * filename = NULL;
11135 asymbol * func = NULL;
11136 bfd_vma low_func = 0;
11137 asymbol ** p;
252b5132
RH		 11138
11139 for (p = symbols; *p != NULL; p++)
11140 {
11141 elf_symbol_type *q;
11142
11143 q = (elf_symbol_type *) *p;
11144
252b5132
RH		 11145 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11146 {
11147 default:
11148 break;
11149 case STT_FILE:
11150 filename = bfd_asymbol_name (&q->symbol);
11151 break;
252b5132
RH		 11152 case STT_FUNC:
11153 case STT_ARM_TFUNC:
9d2da7ca 11154 case STT_NOTYPE:
b0796911 11155 /* Skip mapping symbols. */
0367ecfb 11156 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11157 && bfd_is_arm_special_symbol_name (q->symbol.name,
11158 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11159 continue;
11160 /* Fall through. */
6b40fcba 11161 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11162 && q->symbol.value >= low_func
11163 && q->symbol.value <= offset)
11164 {
11165 func = (asymbol *) q;
11166 low_func = q->symbol.value;
11167 }
11168 break;
11169 }
11170 }
11171
11172 if (func == NULL)
b34976b6 11173 return FALSE;
252b5132 11174
0367ecfb
NC		 11175 if (filename_ptr)
11176 *filename_ptr = filename;
11177 if (functionname_ptr)
11178 *functionname_ptr = bfd_asymbol_name (func);
11179
11180 return TRUE;
906e58ca 11181}
0367ecfb
NC		 11182
11183
11184/* Find the nearest line to a particular section and offset, for error
11185 reporting. This code is a duplicate of the code in elf.c, except
11186 that it uses arm_elf_find_function. */
11187
11188static bfd_boolean
11189elf32_arm_find_nearest_line (bfd * abfd,
11190 asection * section,
11191 asymbol ** symbols,
11192 bfd_vma offset,
11193 const char ** filename_ptr,
11194 const char ** functionname_ptr,
11195 unsigned int * line_ptr)
11196{
11197 bfd_boolean found = FALSE;
11198
11199 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11200
11201 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11202 filename_ptr, functionname_ptr,
11203 line_ptr, 0,
11204 & elf_tdata (abfd)->dwarf2_find_line_info))
11205 {
11206 if (!*functionname_ptr)
11207 arm_elf_find_function (abfd, section, symbols, offset,
11208 *filename_ptr ? NULL : filename_ptr,
11209 functionname_ptr);
f21f3fe0 11210
0367ecfb
NC		 11211 return TRUE;
11212 }
11213
11214 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11215 & found, filename_ptr,
11216 functionname_ptr, line_ptr,
11217 & elf_tdata (abfd)->line_info))
11218 return FALSE;
11219
11220 if (found && (*functionname_ptr || *line_ptr))
11221 return TRUE;
11222
11223 if (symbols == NULL)
11224 return FALSE;
11225
11226 if (! arm_elf_find_function (abfd, section, symbols, offset,
11227 filename_ptr, functionname_ptr))
11228 return FALSE;
11229
11230 *line_ptr = 0;
b34976b6 11231 return TRUE;
252b5132
RH		 11232}
11233
4ab527b0
FF		 11234static bfd_boolean
11235elf32_arm_find_inliner_info (bfd * abfd,
11236 const char ** filename_ptr,
11237 const char ** functionname_ptr,
11238 unsigned int * line_ptr)
11239{
11240 bfd_boolean found;
11241 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11242 functionname_ptr, line_ptr,
11243 & elf_tdata (abfd)->dwarf2_find_line_info);
11244 return found;
11245}
11246
252b5132
RH		 11247/* Adjust a symbol defined by a dynamic object and referenced by a
11248 regular object. The current definition is in some section of the
11249 dynamic object, but we're not including those sections. We have to
11250 change the definition to something the rest of the link can
11251 understand. */
11252
b34976b6 11253static bfd_boolean
57e8b36a
NC		 11254elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11255 struct elf_link_hash_entry * h)
252b5132
RH		 11256{
11257 bfd * dynobj;
11258 asection * s;
b7693d02 11259 struct elf32_arm_link_hash_entry * eh;
67687978 11260 struct elf32_arm_link_hash_table *globals;
252b5132 11261
67687978 11262 globals = elf32_arm_hash_table (info);
252b5132
RH		 11263 dynobj = elf_hash_table (info)->dynobj;
11264
11265 /* Make sure we know what is going on here. */
11266 BFD_ASSERT (dynobj != NULL
f5385ebf 11267 && (h->needs_plt
f6e332e6 11268 || h->u.weakdef != NULL
f5385ebf
AM		 11269 || (h->def_dynamic
11270 && h->ref_regular
11271 && !h->def_regular)));
252b5132 11272
b7693d02
DJ		 11273 eh = (struct elf32_arm_link_hash_entry *) h;
11274
252b5132
RH		 11275 /* If this is a function, put it in the procedure linkage table. We
11276 will fill in the contents of the procedure linkage table later,
11277 when we know the address of the .got section. */
0f88be7a 11278 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11279 || h->needs_plt)
252b5132 11280 {
5e681ec4
PB		 11281 if (h->plt.refcount <= 0
11282 || SYMBOL_CALLS_LOCAL (info, h)
11283 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11284 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11285 {
11286 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11287 file, but the symbol was never referred to by a dynamic
11288 object, or if all references were garbage collected. In
11289 such a case, we don't actually need to build a procedure
11290 linkage table, and we can just do a PC24 reloc instead. */
11291 h->plt.offset = (bfd_vma) -1;
b7693d02 11292 eh->plt_thumb_refcount = 0;
bd97cb95 11293 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11294 h->needs_plt = 0;
252b5132
RH		 11295 }
11296
b34976b6 11297 return TRUE;
252b5132 11298 }
5e681ec4 11299 else
b7693d02
DJ		 11300 {
11301 /* It's possible that we incorrectly decided a .plt reloc was
11302 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11303 in check_relocs. We can't decide accurately between function
11304 and non-function syms in check-relocs; Objects loaded later in
11305 the link may change h->type. So fix it now. */
11306 h->plt.offset = (bfd_vma) -1;
11307 eh->plt_thumb_refcount = 0;
bd97cb95 11308 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11309 }
252b5132
RH		 11310
11311 /* If this is a weak symbol, and there is a real definition, the
11312 processor independent code will have arranged for us to see the
11313 real definition first, and we can just use the same value. */
f6e332e6 11314 if (h->u.weakdef != NULL)
252b5132 11315 {
f6e332e6
AM		 11316 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11317 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11318 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11319 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11320 return TRUE;
252b5132
RH		 11321 }
11322
ba93b8ac
DJ		 11323 /* If there are no non-GOT references, we do not need a copy
11324 relocation. */
11325 if (!h->non_got_ref)
11326 return TRUE;
11327
252b5132
RH		 11328 /* This is a reference to a symbol defined by a dynamic object which
11329 is not a function. */
11330
11331 /* If we are creating a shared library, we must presume that the
11332 only references to the symbol are via the global offset table.
11333 For such cases we need not do anything here; the relocations will
67687978
PB		 11334 be handled correctly by relocate_section. Relocatable executables
11335 can reference data in shared objects directly, so we don't need to
11336 do anything here. */
11337 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11338 return TRUE;
252b5132 11339
909272ee
AM		 11340 if (h->size == 0)
11341 {
11342 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11343 h->root.root.string);
11344 return TRUE;
11345 }
11346
252b5132
RH		 11347 /* We must allocate the symbol in our .dynbss section, which will
11348 become part of the .bss section of the executable. There will be
11349 an entry for this symbol in the .dynsym section. The dynamic
11350 object will contain position independent code, so all references
11351 from the dynamic object to this symbol will go through the global
11352 offset table. The dynamic linker will use the .dynsym entry to
11353 determine the address it must put in the global offset table, so
11354 both the dynamic object and the regular object will refer to the
11355 same memory location for the variable. */
252b5132
RH		 11356 s = bfd_get_section_by_name (dynobj, ".dynbss");
11357 BFD_ASSERT (s != NULL);
11358
11359 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11360 copy the initial value out of the dynamic object and into the
11361 runtime process image. We need to remember the offset into the
00a97672 11362 .rel(a).bss section we are going to use. */
252b5132
RH		 11363 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11364 {
11365 asection *srel;
11366
00a97672 11367 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11368 BFD_ASSERT (srel != NULL);
00a97672 11369 srel->size += RELOC_SIZE (globals);
f5385ebf 11370 h->needs_copy = 1;
252b5132
RH		 11371 }
11372
027297b7 11373 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11374}
11375
5e681ec4
PB		 11376/* Allocate space in .plt, .got and associated reloc sections for
11377 dynamic relocs. */
11378
11379static bfd_boolean
57e8b36a 11380allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11381{
11382 struct bfd_link_info *info;
11383 struct elf32_arm_link_hash_table *htab;
11384 struct elf32_arm_link_hash_entry *eh;
11385 struct elf32_arm_relocs_copied *p;
bd97cb95 11386 bfd_signed_vma thumb_refs;
5e681ec4 11387
b7693d02
DJ		 11388 eh = (struct elf32_arm_link_hash_entry *) h;
11389
5e681ec4
PB		 11390 if (h->root.type == bfd_link_hash_indirect)
11391 return TRUE;
11392
11393 if (h->root.type == bfd_link_hash_warning)
11394 /* When warning symbols are created, they **replace** the "real"
11395 entry in the hash table, thus we never get to see the real
11396 symbol in a hash traversal. So look at it now. */
11397 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11398
11399 info = (struct bfd_link_info *) inf;
11400 htab = elf32_arm_hash_table (info);
11401
11402 if (htab->root.dynamic_sections_created
11403 && h->plt.refcount > 0)
11404 {
11405 /* Make sure this symbol is output as a dynamic symbol.
11406 Undefined weak syms won't yet be marked as dynamic. */
11407 if (h->dynindx == -1
f5385ebf 11408 && !h->forced_local)
5e681ec4 11409 {
c152c796 11410 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11411 return FALSE;
11412 }
11413
11414 if (info->shared
7359ea65 11415 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11416 {
11417 asection *s = htab->splt;
11418
11419 /* If this is the first .plt entry, make room for the special
11420 first entry. */
eea6121a 11421 if (s->size == 0)
e5a52504 11422 s->size += htab->plt_header_size;
5e681ec4 11423
eea6121a 11424 h->plt.offset = s->size;
5e681ec4 11425
b7693d02
DJ		 11426 /* If we will insert a Thumb trampoline before this PLT, leave room
11427 for it. */
bd97cb95
DJ		 11428 thumb_refs = eh->plt_thumb_refcount;
11429 if (!htab->use_blx)
11430 thumb_refs += eh->plt_maybe_thumb_refcount;
11431
11432 if (thumb_refs > 0)
b7693d02
DJ		 11433 {
11434 h->plt.offset += PLT_THUMB_STUB_SIZE;
11435 s->size += PLT_THUMB_STUB_SIZE;
11436 }
11437
5e681ec4
PB		 11438 /* If this symbol is not defined in a regular file, and we are
11439 not generating a shared library, then set the symbol to this
11440 location in the .plt. This is required to make function
11441 pointers compare as equal between the normal executable and
11442 the shared library. */
11443 if (! info->shared
f5385ebf 11444 && !h->def_regular)
5e681ec4
PB		 11445 {
11446 h->root.u.def.section = s;
11447 h->root.u.def.value = h->plt.offset;
11448 }
11449
022f8312
CL		 11450 /* Make sure the function is not marked as Thumb, in case
11451 it is the target of an ABS32 relocation, which will
11452 point to the PLT entry. */
11453 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11454 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11455
5e681ec4 11456 /* Make room for this entry. */
e5a52504 11457 s->size += htab->plt_entry_size;
5e681ec4 11458
e5a52504 11459 if (!htab->symbian_p)
b7693d02
DJ		 11460 {
11461 /* We also need to make an entry in the .got.plt section, which
11462 will be placed in the .got section by the linker script. */
11463 eh->plt_got_offset = htab->sgotplt->size;
11464 htab->sgotplt->size += 4;
11465 }
5e681ec4 11466
00a97672
RS		 11467 /* We also need to make an entry in the .rel(a).plt section. */
11468 htab->srelplt->size += RELOC_SIZE (htab);
11469
11470 /* VxWorks executables have a second set of relocations for
11471 each PLT entry. They go in a separate relocation section,
11472 which is processed by the kernel loader. */
11473 if (htab->vxworks_p && !info->shared)
11474 {
11475 /* There is a relocation for the initial PLT entry:
11476 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11477 if (h->plt.offset == htab->plt_header_size)
11478 htab->srelplt2->size += RELOC_SIZE (htab);
11479
11480 /* There are two extra relocations for each subsequent
11481 PLT entry: an R_ARM_32 relocation for the GOT entry,
11482 and an R_ARM_32 relocation for the PLT entry. */
11483 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11484 }
5e681ec4
PB		 11485 }
11486 else
11487 {
11488 h->plt.offset = (bfd_vma) -1;
f5385ebf 11489 h->needs_plt = 0;
5e681ec4
PB		 11490 }
11491 }
11492 else
11493 {
11494 h->plt.offset = (bfd_vma) -1;
f5385ebf 11495 h->needs_plt = 0;
5e681ec4
PB		 11496 }
11497
11498 if (h->got.refcount > 0)
11499 {
11500 asection *s;
11501 bfd_boolean dyn;
ba93b8ac
DJ		 11502 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11503 int indx;
5e681ec4
PB		 11504
11505 /* Make sure this symbol is output as a dynamic symbol.
11506 Undefined weak syms won't yet be marked as dynamic. */
11507 if (h->dynindx == -1
f5385ebf 11508 && !h->forced_local)
5e681ec4 11509 {
c152c796 11510 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11511 return FALSE;
11512 }
11513
e5a52504
MM		 11514 if (!htab->symbian_p)
11515 {
11516 s = htab->sgot;
11517 h->got.offset = s->size;
ba93b8ac
DJ		 11518
11519 if (tls_type == GOT_UNKNOWN)
11520 abort ();
11521
11522 if (tls_type == GOT_NORMAL)
11523 /* Non-TLS symbols need one GOT slot. */
11524 s->size += 4;
11525 else
11526 {
11527 if (tls_type & GOT_TLS_GD)
11528 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11529 s->size += 8;
11530 if (tls_type & GOT_TLS_IE)
11531 /* R_ARM_TLS_IE32 needs one GOT slot. */
11532 s->size += 4;
11533 }
11534
e5a52504 11535 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11536
11537 indx = 0;
11538 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11539 && (!info->shared
11540 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11541 indx = h->dynindx;
11542
11543 if (tls_type != GOT_NORMAL
11544 && (info->shared || indx != 0)
11545 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11546 || h->root.type != bfd_link_hash_undefweak))
11547 {
11548 if (tls_type & GOT_TLS_IE)
00a97672 11549 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11550
11551 if (tls_type & GOT_TLS_GD)
00a97672 11552 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11553
11554 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11555 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11556 }
11557 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11558 || h->root.type != bfd_link_hash_undefweak)
11559 && (info->shared
11560 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11561 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11562 }
5e681ec4
PB		 11563 }
11564 else
11565 h->got.offset = (bfd_vma) -1;
11566
a4fd1a8e
PB		 11567 /* Allocate stubs for exported Thumb functions on v4t. */
11568 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11569 && h->def_regular
a4fd1a8e
PB		 11570 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11571 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11572 {
11573 struct elf_link_hash_entry * th;
11574 struct bfd_link_hash_entry * bh;
11575 struct elf_link_hash_entry * myh;
11576 char name[1024];
11577 asection *s;
11578 bh = NULL;
11579 /* Create a new symbol to regist the real location of the function. */
11580 s = h->root.u.def.section;
906e58ca 11581 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11582 _bfd_generic_link_add_one_symbol (info, s->owner,
11583 name, BSF_GLOBAL, s,
11584 h->root.u.def.value,
11585 NULL, TRUE, FALSE, &bh);
11586
11587 myh = (struct elf_link_hash_entry *) bh;
11588 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11589 myh->forced_local = 1;
11590 eh->export_glue = myh;
11591 th = record_arm_to_thumb_glue (info, h);
11592 /* Point the symbol at the stub. */
11593 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11594 h->root.u.def.section = th->root.u.def.section;
11595 h->root.u.def.value = th->root.u.def.value & ~1;
11596 }
11597
5e681ec4
PB		 11598 if (eh->relocs_copied == NULL)
11599 return TRUE;
11600
11601 /* In the shared -Bsymbolic case, discard space allocated for
11602 dynamic pc-relative relocs against symbols which turn out to be
11603 defined in regular objects. For the normal shared case, discard
11604 space for pc-relative relocs that have become local due to symbol
11605 visibility changes. */
11606
67687978 11607 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11608 {
7bdca076 11609 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11610 R_ARM_REL32_NOI, which will appear on something like
11611 ".long foo - .". We want calls to protected symbols to resolve
11612 directly to the function rather than going via the plt. If people
11613 want function pointer comparisons to work as expected then they
11614 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11615 if (SYMBOL_CALLS_LOCAL (info, h))
11616 {
11617 struct elf32_arm_relocs_copied **pp;
11618
11619 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11620 {
11621 p->count -= p->pc_count;
11622 p->pc_count = 0;
11623 if (p->count == 0)
11624 *pp = p->next;
11625 else
11626 pp = &p->next;
11627 }
11628 }
11629
3348747a
NS		 11630 if (elf32_arm_hash_table (info)->vxworks_p)
11631 {
11632 struct elf32_arm_relocs_copied **pp;
11633
11634 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11635 {
11636 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11637 *pp = p->next;
11638 else
11639 pp = &p->next;
11640 }
11641 }
11642
ba93b8ac 11643 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11644 visibility. */
22d606e9 11645 if (eh->relocs_copied != NULL
5e681ec4 11646 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11647 {
11648 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11649 eh->relocs_copied = NULL;
11650
11651 /* Make sure undefined weak symbols are output as a dynamic
11652 symbol in PIEs. */
11653 else if (h->dynindx == -1
11654 && !h->forced_local)
11655 {
11656 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11657 return FALSE;
11658 }
11659 }
11660
67687978
PB		 11661 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11662 && h->root.type == bfd_link_hash_new)
11663 {
11664 /* Output absolute symbols so that we can create relocations
11665 against them. For normal symbols we output a relocation
11666 against the section that contains them. */
11667 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11668 return FALSE;
11669 }
11670
5e681ec4
PB		 11671 }
11672 else
11673 {
11674 /* For the non-shared case, discard space for relocs against
11675 symbols which turn out to need copy relocs or are not
11676 dynamic. */
11677
f5385ebf
AM		 11678 if (!h->non_got_ref
11679 && ((h->def_dynamic
11680 && !h->def_regular)
5e681ec4
PB		 11681 || (htab->root.dynamic_sections_created
11682 && (h->root.type == bfd_link_hash_undefweak
11683 || h->root.type == bfd_link_hash_undefined))))
11684 {
11685 /* Make sure this symbol is output as a dynamic symbol.
11686 Undefined weak syms won't yet be marked as dynamic. */
11687 if (h->dynindx == -1
f5385ebf 11688 && !h->forced_local)
5e681ec4 11689 {
c152c796 11690 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11691 return FALSE;
11692 }
11693
11694 /* If that succeeded, we know we'll be keeping all the
11695 relocs. */
11696 if (h->dynindx != -1)
11697 goto keep;
11698 }
11699
11700 eh->relocs_copied = NULL;
11701
11702 keep: ;
11703 }
11704
11705 /* Finally, allocate space. */
11706 for (p = eh->relocs_copied; p != NULL; p = p->next)
11707 {
11708 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11709 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11710 }
11711
11712 return TRUE;
11713}
11714
08d1f311
DJ		 11715/* Find any dynamic relocs that apply to read-only sections. */
11716
11717static bfd_boolean
8029a119 11718elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11719{
8029a119
NC		 11720 struct elf32_arm_link_hash_entry * eh;
11721 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11722
11723 if (h->root.type == bfd_link_hash_warning)
11724 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11725
11726 eh = (struct elf32_arm_link_hash_entry *) h;
11727 for (p = eh->relocs_copied; p != NULL; p = p->next)
11728 {
11729 asection *s = p->section;
11730
11731 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11732 {
11733 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11734
11735 info->flags |= DF_TEXTREL;
11736
11737 /* Not an error, just cut short the traversal. */
11738 return FALSE;
11739 }
11740 }
11741 return TRUE;
11742}
11743
d504ffc8
DJ		 11744void
11745bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11746 int byteswap_code)
11747{
11748 struct elf32_arm_link_hash_table *globals;
11749
11750 globals = elf32_arm_hash_table (info);
11751 globals->byteswap_code = byteswap_code;
11752}
11753
252b5132
RH		 11754/* Set the sizes of the dynamic sections. */
11755
b34976b6 11756static bfd_boolean
57e8b36a
NC		 11757elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11758 struct bfd_link_info * info)
252b5132
RH		 11759{
11760 bfd * dynobj;
11761 asection * s;
b34976b6
AM		 11762 bfd_boolean plt;
11763 bfd_boolean relocs;
5e681ec4
PB		 11764 bfd *ibfd;
11765 struct elf32_arm_link_hash_table *htab;
252b5132 11766
5e681ec4 11767 htab = elf32_arm_hash_table (info);
252b5132
RH		 11768 dynobj = elf_hash_table (info)->dynobj;
11769 BFD_ASSERT (dynobj != NULL);
39b41c9c 11770 check_use_blx (htab);
252b5132
RH		 11771
11772 if (elf_hash_table (info)->dynamic_sections_created)
11773 {
11774 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11775 if (info->executable)
252b5132
RH		 11776 {
11777 s = bfd_get_section_by_name (dynobj, ".interp");
11778 BFD_ASSERT (s != NULL);
eea6121a 11779 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11780 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11781 }
11782 }
5e681ec4
PB		 11783
11784 /* Set up .got offsets for local syms, and space for local dynamic
11785 relocs. */
11786 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11787 {
5e681ec4
PB		 11788 bfd_signed_vma *local_got;
11789 bfd_signed_vma *end_local_got;
11790 char *local_tls_type;
11791 bfd_size_type locsymcount;
11792 Elf_Internal_Shdr *symtab_hdr;
11793 asection *srel;
3348747a 11794 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11795
0ffa91dd 11796 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11797 continue;
11798
11799 for (s = ibfd->sections; s != NULL; s = s->next)
11800 {
11801 struct elf32_arm_relocs_copied *p;
11802
6edfbbad 11803 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11804 {
11805 if (!bfd_is_abs_section (p->section)
11806 && bfd_is_abs_section (p->section->output_section))
11807 {
11808 /* Input section has been discarded, either because
11809 it is a copy of a linkonce section or due to
11810 linker script /DISCARD/, so we'll be discarding
11811 the relocs too. */
11812 }
3348747a
NS		 11813 else if (is_vxworks
11814 && strcmp (p->section->output_section->name,
11815 ".tls_vars") == 0)
11816 {
11817 /* Relocations in vxworks .tls_vars sections are
11818 handled specially by the loader. */
11819 }
5e681ec4
PB		 11820 else if (p->count != 0)
11821 {
11822 srel = elf_section_data (p->section)->sreloc;
00a97672 11823 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11824 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11825 info->flags |= DF_TEXTREL;
11826 }
11827 }
11828 }
11829
11830 local_got = elf_local_got_refcounts (ibfd);
11831 if (!local_got)
11832 continue;
11833
0ffa91dd 11834 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11835 locsymcount = symtab_hdr->sh_info;
11836 end_local_got = local_got + locsymcount;
ba93b8ac 11837 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11838 s = htab->sgot;
11839 srel = htab->srelgot;
11840 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11841 {
11842 if (*local_got > 0)
11843 {
eea6121a 11844 *local_got = s->size;
ba93b8ac
DJ		 11845 if (*local_tls_type & GOT_TLS_GD)
11846 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11847 s->size += 8;
11848 if (*local_tls_type & GOT_TLS_IE)
11849 s->size += 4;
11850 if (*local_tls_type == GOT_NORMAL)
11851 s->size += 4;
11852
11853 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11854 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11855 }
11856 else
11857 *local_got = (bfd_vma) -1;
11858 }
252b5132
RH		 11859 }
11860
ba93b8ac
DJ		 11861 if (htab->tls_ldm_got.refcount > 0)
11862 {
11863 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11864 for R_ARM_TLS_LDM32 relocations. */
11865 htab->tls_ldm_got.offset = htab->sgot->size;
11866 htab->sgot->size += 8;
11867 if (info->shared)
00a97672 11868 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11869 }
11870 else
11871 htab->tls_ldm_got.offset = -1;
11872
5e681ec4
PB		 11873 /* Allocate global sym .plt and .got entries, and space for global
11874 sym dynamic relocs. */
57e8b36a 11875 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11876
d504ffc8
DJ		 11877 /* Here we rummage through the found bfds to collect glue information. */
11878 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11879 {
0ffa91dd 11880 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11881 continue;
11882
c7b8f16e
JB		 11883 /* Initialise mapping tables for code/data. */
11884 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11885
c7b8f16e
JB		 11886 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11887 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11888 /* xgettext:c-format */
11889 _bfd_error_handler (_("Errors encountered processing file %s"),
11890 ibfd->filename);
11891 }
d504ffc8 11892
3e6b1042
DJ		 11893 /* Allocate space for the glue sections now that we've sized them. */
11894 bfd_elf32_arm_allocate_interworking_sections (info);
11895
252b5132
RH		 11896 /* The check_relocs and adjust_dynamic_symbol entry points have
11897 determined the sizes of the various dynamic sections. Allocate
11898 memory for them. */
b34976b6
AM		 11899 plt = FALSE;
11900 relocs = FALSE;
252b5132
RH		 11901 for (s = dynobj->sections; s != NULL; s = s->next)
11902 {
11903 const char * name;
252b5132
RH		 11904
11905 if ((s->flags & SEC_LINKER_CREATED) == 0)
11906 continue;
11907
11908 /* It's OK to base decisions on the section name, because none
11909 of the dynobj section names depend upon the input files. */
11910 name = bfd_get_section_name (dynobj, s);
11911
24a1ba0f 11912 if (strcmp (name, ".plt") == 0)
252b5132 11913 {
c456f082
AM		 11914 /* Remember whether there is a PLT. */
11915 plt = s->size != 0;
252b5132 11916 }
0112cd26 11917 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11918 {
c456f082 11919 if (s->size != 0)
252b5132 11920 {
252b5132 11921 /* Remember whether there are any reloc sections other
00a97672
RS		 11922 than .rel(a).plt and .rela.plt.unloaded. */
11923 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11924 relocs = TRUE;
252b5132
RH		 11925
11926 /* We use the reloc_count field as a counter if we need
11927 to copy relocs into the output file. */
11928 s->reloc_count = 0;
11929 }
11930 }
0112cd26 11931 else if (! CONST_STRNEQ (name, ".got")
c456f082 11932 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11933 {
11934 /* It's not one of our sections, so don't allocate space. */
11935 continue;
11936 }
11937
c456f082 11938 if (s->size == 0)
252b5132 11939 {
c456f082 11940 /* If we don't need this section, strip it from the
00a97672
RS		 11941 output file. This is mostly to handle .rel(a).bss and
11942 .rel(a).plt. We must create both sections in
c456f082
AM		 11943 create_dynamic_sections, because they must be created
11944 before the linker maps input sections to output
11945 sections. The linker does that before
11946 adjust_dynamic_symbol is called, and it is that
11947 function which decides whether anything needs to go
11948 into these sections. */
8423293d 11949 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11950 continue;
11951 }
11952
c456f082
AM		 11953 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11954 continue;
11955
252b5132 11956 /* Allocate memory for the section contents. */
906e58ca 11957 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11958 if (s->contents == NULL)
b34976b6 11959 return FALSE;
252b5132
RH		 11960 }
11961
11962 if (elf_hash_table (info)->dynamic_sections_created)
11963 {
11964 /* Add some entries to the .dynamic section. We fill in the
11965 values later, in elf32_arm_finish_dynamic_sections, but we
11966 must add the entries now so that we get the correct size for
11967 the .dynamic section. The DT_DEBUG entry is filled in by the
11968 dynamic linker and used by the debugger. */
dc810e39 11969#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11970 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11971
8532796c 11972 if (info->executable)
252b5132 11973 {
dc810e39 11974 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11975 return FALSE;
252b5132
RH		 11976 }
11977
11978 if (plt)
11979 {
dc810e39
AM		 11980 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11981 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11982 || !add_dynamic_entry (DT_PLTREL,
11983 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11984 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11985 return FALSE;
252b5132
RH		 11986 }
11987
11988 if (relocs)
11989 {
00a97672
RS		 11990 if (htab->use_rel)
11991 {
11992 if (!add_dynamic_entry (DT_REL, 0)
11993 || !add_dynamic_entry (DT_RELSZ, 0)
11994 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11995 return FALSE;
11996 }
11997 else
11998 {
11999 if (!add_dynamic_entry (DT_RELA, 0)
12000 || !add_dynamic_entry (DT_RELASZ, 0)
12001 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12002 return FALSE;
12003 }
252b5132
RH		 12004 }
12005
08d1f311
DJ		 12006 /* If any dynamic relocs apply to a read-only section,
12007 then we need a DT_TEXTREL entry. */
12008 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12009 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12010 info);
08d1f311 12011
99e4ae17 12012 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12013 {
dc810e39 12014 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12015 return FALSE;
252b5132 12016 }
7a2b07ff
NS		 12017 if (htab->vxworks_p
12018 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12019 return FALSE;
252b5132 12020 }
8532796c 12021#undef add_dynamic_entry
252b5132 12022
b34976b6 12023 return TRUE;
252b5132
RH		 12024}
12025
252b5132
RH		 12026/* Finish up dynamic symbol handling. We set the contents of various
12027 dynamic sections here. */
12028
b34976b6 12029static bfd_boolean
906e58ca
NC		 12030elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12031 struct bfd_link_info * info,
12032 struct elf_link_hash_entry * h,
12033 Elf_Internal_Sym * sym)
252b5132
RH		 12034{
12035 bfd * dynobj;
e5a52504 12036 struct elf32_arm_link_hash_table *htab;
b7693d02 12037 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 12038
12039 dynobj = elf_hash_table (info)->dynobj;
e5a52504 12040 htab = elf32_arm_hash_table (info);
b7693d02 12041 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12042
12043 if (h->plt.offset != (bfd_vma) -1)
12044 {
12045 asection * splt;
252b5132 12046 asection * srel;
e5a52504 12047 bfd_byte *loc;
24a1ba0f 12048 bfd_vma plt_index;
947216bf 12049 Elf_Internal_Rela rel;
252b5132
RH		 12050
12051 /* This symbol has an entry in the procedure linkage table. Set
12052 it up. */
12053
12054 BFD_ASSERT (h->dynindx != -1);
12055
12056 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 12057 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 12058 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12059
e5a52504
MM		 12060 /* Fill in the entry in the procedure linkage table. */
12061 if (htab->symbian_p)
12062 {
906e58ca 12063 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12064 elf32_arm_symbian_plt_entry[0],
12065 splt->contents + h->plt.offset);
906e58ca 12066 bfd_put_32 (output_bfd,
52ab56c2
PB		 12067 elf32_arm_symbian_plt_entry[1],
12068 splt->contents + h->plt.offset + 4);
906e58ca 12069
e5a52504 12070 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12071 rel.r_offset = (splt->output_section->vma
12072 + splt->output_offset
52ab56c2 12073 + h->plt.offset + 4);
e5a52504 12074 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12075
12076 /* Get the index in the procedure linkage table which
12077 corresponds to this symbol. This is the index of this symbol
12078 in all the symbols for which we are making plt entries. The
12079 first entry in the procedure linkage table is reserved. */
906e58ca 12080 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12081 / htab->plt_entry_size);
e5a52504
MM		 12082 }
12083 else
12084 {
00a97672 12085 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12086 bfd_vma got_displacement;
12087 asection * sgot;
52ab56c2 12088 bfd_byte * ptr;
906e58ca 12089
e5a52504
MM		 12090 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12091 BFD_ASSERT (sgot != NULL);
12092
b7693d02
DJ		 12093 /* Get the offset into the .got.plt table of the entry that
12094 corresponds to this function. */
12095 got_offset = eh->plt_got_offset;
12096
12097 /* Get the index in the procedure linkage table which
12098 corresponds to this symbol. This is the index of this symbol
12099 in all the symbols for which we are making plt entries. The
12100 first three entries in .got.plt are reserved; after that
12101 symbols appear in the same order as in .plt. */
12102 plt_index = (got_offset - 12) / 4;
e5a52504 12103
00a97672
RS		 12104 /* Calculate the address of the GOT entry. */
12105 got_address = (sgot->output_section->vma
12106 + sgot->output_offset
12107 + got_offset);
5e681ec4 12108
00a97672
RS		 12109 /* ...and the address of the PLT entry. */
12110 plt_address = (splt->output_section->vma
12111 + splt->output_offset
12112 + h->plt.offset);
5e681ec4 12113
52ab56c2 12114 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12115 if (htab->vxworks_p && info->shared)
12116 {
12117 unsigned int i;
12118 bfd_vma val;
12119
52ab56c2 12120 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12121 {
12122 val = elf32_arm_vxworks_shared_plt_entry[i];
12123 if (i == 2)
12124 val |= got_address - sgot->output_section->vma;
12125 if (i == 5)
12126 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12127 if (i == 2 || i == 5)
12128 bfd_put_32 (output_bfd, val, ptr);
12129 else
12130 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12131 }
12132 }
12133 else if (htab->vxworks_p)
b7693d02 12134 {
00a97672
RS		 12135 unsigned int i;
12136 bfd_vma val;
12137
d3753b85 12138 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12139 {
12140 val = elf32_arm_vxworks_exec_plt_entry[i];
12141 if (i == 2)
12142 val |= got_address;
12143 if (i == 4)
12144 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12145 if (i == 5)
12146 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12147 if (i == 2 || i == 5)
12148 bfd_put_32 (output_bfd, val, ptr);
12149 else
12150 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12151 }
12152
12153 loc = (htab->srelplt2->contents
12154 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12155
12156 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12157 referencing the GOT for this PLT entry. */
12158 rel.r_offset = plt_address + 8;
12159 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12160 rel.r_addend = got_offset;
12161 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12162 loc += RELOC_SIZE (htab);
12163
12164 /* Create the R_ARM_ABS32 relocation referencing the
12165 beginning of the PLT for this GOT entry. */
12166 rel.r_offset = got_address;
12167 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12168 rel.r_addend = 0;
12169 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12170 }
00a97672
RS		 12171 else
12172 {
bd97cb95 12173 bfd_signed_vma thumb_refs;
00a97672
RS		 12174 /* Calculate the displacement between the PLT slot and the
12175 entry in the GOT. The eight-byte offset accounts for the
12176 value produced by adding to pc in the first instruction
12177 of the PLT stub. */
12178 got_displacement = got_address - (plt_address + 8);
b7693d02 12179
00a97672
RS		 12180 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12181
bd97cb95
DJ		 12182 thumb_refs = eh->plt_thumb_refcount;
12183 if (!htab->use_blx)
12184 thumb_refs += eh->plt_maybe_thumb_refcount;
12185
12186 if (thumb_refs > 0)
00a97672 12187 {
52ab56c2
PB		 12188 put_thumb_insn (htab, output_bfd,
12189 elf32_arm_plt_thumb_stub[0], ptr - 4);
12190 put_thumb_insn (htab, output_bfd,
12191 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12192 }
12193
52ab56c2
PB		 12194 put_arm_insn (htab, output_bfd,
12195 elf32_arm_plt_entry[0]
12196 | ((got_displacement & 0x0ff00000) >> 20),
12197 ptr + 0);
12198 put_arm_insn (htab, output_bfd,
12199 elf32_arm_plt_entry[1]
12200 | ((got_displacement & 0x000ff000) >> 12),
12201 ptr+ 4);
12202 put_arm_insn (htab, output_bfd,
12203 elf32_arm_plt_entry[2]
12204 | (got_displacement & 0x00000fff),
12205 ptr + 8);
5e681ec4 12206#ifdef FOUR_WORD_PLT
52ab56c2 12207 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12208#endif
00a97672 12209 }
252b5132 12210
e5a52504
MM		 12211 /* Fill in the entry in the global offset table. */
12212 bfd_put_32 (output_bfd,
12213 (splt->output_section->vma
12214 + splt->output_offset),
12215 sgot->contents + got_offset);
906e58ca 12216
00a97672
RS		 12217 /* Fill in the entry in the .rel(a).plt section. */
12218 rel.r_addend = 0;
12219 rel.r_offset = got_address;
e5a52504
MM		 12220 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12221 }
57e8b36a 12222
00a97672
RS		 12223 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12224 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12225
f5385ebf 12226 if (!h->def_regular)
252b5132
RH		 12227 {
12228 /* Mark the symbol as undefined, rather than as defined in
12229 the .plt section. Leave the value alone. */
12230 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12231 /* If the symbol is weak, we do need to clear the value.
12232 Otherwise, the PLT entry would provide a definition for
12233 the symbol even if the symbol wasn't defined anywhere,
12234 and so the symbol would never be NULL. */
f5385ebf 12235 if (!h->ref_regular_nonweak)
d982ba73 12236 sym->st_value = 0;
252b5132
RH		 12237 }
12238 }
12239
ba93b8ac
DJ		 12240 if (h->got.offset != (bfd_vma) -1
12241 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12242 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12243 {
12244 asection * sgot;
12245 asection * srel;
947216bf
AM		 12246 Elf_Internal_Rela rel;
12247 bfd_byte *loc;
00a97672 12248 bfd_vma offset;
252b5132
RH		 12249
12250 /* This symbol has an entry in the global offset table. Set it
12251 up. */
252b5132 12252 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12253 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12254 BFD_ASSERT (sgot != NULL && srel != NULL);
12255
00a97672
RS		 12256 offset = (h->got.offset & ~(bfd_vma) 1);
12257 rel.r_addend = 0;
252b5132
RH		 12258 rel.r_offset = (sgot->output_section->vma
12259 + sgot->output_offset
00a97672 12260 + offset);
252b5132 12261
5e681ec4
PB		 12262 /* If this is a static link, or it is a -Bsymbolic link and the
12263 symbol is defined locally or was forced to be local because
12264 of a version file, we just want to emit a RELATIVE reloc.
12265 The entry in the global offset table will already have been
12266 initialized in the relocate_section function. */
252b5132 12267 if (info->shared
5e681ec4
PB		 12268 && SYMBOL_REFERENCES_LOCAL (info, h))
12269 {
906e58ca 12270 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12271 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12272 if (!htab->use_rel)
12273 {
12274 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12275 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12276 }
5e681ec4 12277 }
252b5132
RH		 12278 else
12279 {
906e58ca 12280 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12281 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12282 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12283 }
12284
00a97672
RS		 12285 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12286 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12287 }
12288
f5385ebf 12289 if (h->needs_copy)
252b5132
RH		 12290 {
12291 asection * s;
947216bf
AM		 12292 Elf_Internal_Rela rel;
12293 bfd_byte *loc;
252b5132
RH		 12294
12295 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12296 BFD_ASSERT (h->dynindx != -1
12297 && (h->root.type == bfd_link_hash_defined
12298 || h->root.type == bfd_link_hash_defweak));
12299
12300 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12301 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12302 BFD_ASSERT (s != NULL);
12303
00a97672 12304 rel.r_addend = 0;
252b5132
RH		 12305 rel.r_offset = (h->root.u.def.value
12306 + h->root.u.def.section->output_section->vma
12307 + h->root.u.def.section->output_offset);
12308 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12309 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12310 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12311 }
12312
00a97672
RS		 12313 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12314 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12315 to the ".got" section. */
252b5132 12316 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12317 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12318 sym->st_shndx = SHN_ABS;
12319
b34976b6 12320 return TRUE;
252b5132
RH		 12321}
12322
12323/* Finish up the dynamic sections. */
12324
b34976b6 12325static bfd_boolean
57e8b36a 12326elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12327{
12328 bfd * dynobj;
12329 asection * sgot;
12330 asection * sdyn;
12331
12332 dynobj = elf_hash_table (info)->dynobj;
12333
12334 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12335 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12336 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12337
12338 if (elf_hash_table (info)->dynamic_sections_created)
12339 {
12340 asection *splt;
12341 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12342 struct elf32_arm_link_hash_table *htab;
252b5132 12343
229fcec5 12344 htab = elf32_arm_hash_table (info);
252b5132 12345 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12346 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12347
12348 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12349 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12350
252b5132
RH		 12351 for (; dyncon < dynconend; dyncon++)
12352 {
12353 Elf_Internal_Dyn dyn;
12354 const char * name;
12355 asection * s;
12356
12357 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12358
12359 switch (dyn.d_tag)
12360 {
229fcec5
MM		 12361 unsigned int type;
12362
252b5132 12363 default:
7a2b07ff
NS		 12364 if (htab->vxworks_p
12365 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12366 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12367 break;
12368
229fcec5
MM		 12369 case DT_HASH:
12370 name = ".hash";
12371 goto get_vma_if_bpabi;
12372 case DT_STRTAB:
12373 name = ".dynstr";
12374 goto get_vma_if_bpabi;
12375 case DT_SYMTAB:
12376 name = ".dynsym";
12377 goto get_vma_if_bpabi;
c0042f5d
MM		 12378 case DT_VERSYM:
12379 name = ".gnu.version";
12380 goto get_vma_if_bpabi;
12381 case DT_VERDEF:
12382 name = ".gnu.version_d";
12383 goto get_vma_if_bpabi;
12384 case DT_VERNEED:
12385 name = ".gnu.version_r";
12386 goto get_vma_if_bpabi;
12387
252b5132
RH		 12388 case DT_PLTGOT:
12389 name = ".got";
12390 goto get_vma;
12391 case DT_JMPREL:
00a97672 12392 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12393 get_vma:
12394 s = bfd_get_section_by_name (output_bfd, name);
12395 BFD_ASSERT (s != NULL);
229fcec5
MM		 12396 if (!htab->symbian_p)
12397 dyn.d_un.d_ptr = s->vma;
12398 else
12399 /* In the BPABI, tags in the PT_DYNAMIC section point
12400 at the file offset, not the memory address, for the
12401 convenience of the post linker. */
12402 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12403 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12404 break;
12405
229fcec5
MM		 12406 get_vma_if_bpabi:
12407 if (htab->symbian_p)
12408 goto get_vma;
12409 break;
12410
252b5132 12411 case DT_PLTRELSZ:
00a97672
RS		 12412 s = bfd_get_section_by_name (output_bfd,
12413 RELOC_SECTION (htab, ".plt"));
252b5132 12414 BFD_ASSERT (s != NULL);
eea6121a 12415 dyn.d_un.d_val = s->size;
252b5132
RH		 12416 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12417 break;
906e58ca 12418
252b5132 12419 case DT_RELSZ:
00a97672 12420 case DT_RELASZ:
229fcec5
MM		 12421 if (!htab->symbian_p)
12422 {
12423 /* My reading of the SVR4 ABI indicates that the
12424 procedure linkage table relocs (DT_JMPREL) should be
12425 included in the overall relocs (DT_REL). This is
12426 what Solaris does. However, UnixWare can not handle
12427 that case. Therefore, we override the DT_RELSZ entry
12428 here to make it not include the JMPREL relocs. Since
00a97672 12429 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12430 other relocation sections, we don't have to worry
12431 about changing the DT_REL entry. */
00a97672
RS		 12432 s = bfd_get_section_by_name (output_bfd,
12433 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12434 if (s != NULL)
12435 dyn.d_un.d_val -= s->size;
12436 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12437 break;
12438 }
8029a119 12439 /* Fall through. */
229fcec5
MM		 12440
12441 case DT_REL:
12442 case DT_RELA:
229fcec5
MM		 12443 /* In the BPABI, the DT_REL tag must point at the file
12444 offset, not the VMA, of the first relocation
12445 section. So, we use code similar to that in
12446 elflink.c, but do not check for SHF_ALLOC on the
12447 relcoation section, since relocations sections are
12448 never allocated under the BPABI. The comments above
12449 about Unixware notwithstanding, we include all of the
12450 relocations here. */
12451 if (htab->symbian_p)
12452 {
12453 unsigned int i;
12454 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12455 ? SHT_REL : SHT_RELA);
12456 dyn.d_un.d_val = 0;
12457 for (i = 1; i < elf_numsections (output_bfd); i++)
12458 {
906e58ca 12459 Elf_Internal_Shdr *hdr
229fcec5
MM		 12460 = elf_elfsections (output_bfd)[i];
12461 if (hdr->sh_type == type)
12462 {
906e58ca 12463 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12464 || dyn.d_tag == DT_RELASZ)
12465 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12466 else if ((ufile_ptr) hdr->sh_offset
12467 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12468 dyn.d_un.d_val = hdr->sh_offset;
12469 }
12470 }
12471 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12472 }
252b5132 12473 break;
88f7bcd5
NC		 12474
12475 /* Set the bottom bit of DT_INIT/FINI if the
12476 corresponding function is Thumb. */
12477 case DT_INIT:
12478 name = info->init_function;
12479 goto get_sym;
12480 case DT_FINI:
12481 name = info->fini_function;
12482 get_sym:
12483 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12484 then there is nothing to adjust. */
88f7bcd5
NC		 12485 if (dyn.d_un.d_val != 0)
12486 {
12487 struct elf_link_hash_entry * eh;
12488
12489 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12490 FALSE, FALSE, TRUE);
906e58ca 12491 if (eh != NULL
88f7bcd5
NC		 12492 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12493 {
12494 dyn.d_un.d_val |= 1;
b34976b6 12495 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12496 }
12497 }
12498 break;
252b5132
RH		 12499 }
12500 }
12501
24a1ba0f 12502 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12503 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12504 {
00a97672
RS		 12505 const bfd_vma *plt0_entry;
12506 bfd_vma got_address, plt_address, got_displacement;
12507
12508 /* Calculate the addresses of the GOT and PLT. */
12509 got_address = sgot->output_section->vma + sgot->output_offset;
12510 plt_address = splt->output_section->vma + splt->output_offset;
12511
12512 if (htab->vxworks_p)
12513 {
12514 /* The VxWorks GOT is relocated by the dynamic linker.
12515 Therefore, we must emit relocations rather than simply
12516 computing the values now. */
12517 Elf_Internal_Rela rel;
12518
12519 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12520 put_arm_insn (htab, output_bfd, plt0_entry[0],
12521 splt->contents + 0);
12522 put_arm_insn (htab, output_bfd, plt0_entry[1],
12523 splt->contents + 4);
12524 put_arm_insn (htab, output_bfd, plt0_entry[2],
12525 splt->contents + 8);
00a97672
RS		 12526 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12527
8029a119 12528 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12529 rel.r_offset = plt_address + 12;
12530 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12531 rel.r_addend = 0;
12532 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12533 htab->srelplt2->contents);
12534 }
12535 else
12536 {
12537 got_displacement = got_address - (plt_address + 16);
12538
12539 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12540 put_arm_insn (htab, output_bfd, plt0_entry[0],
12541 splt->contents + 0);
12542 put_arm_insn (htab, output_bfd, plt0_entry[1],
12543 splt->contents + 4);
12544 put_arm_insn (htab, output_bfd, plt0_entry[2],
12545 splt->contents + 8);
12546 put_arm_insn (htab, output_bfd, plt0_entry[3],
12547 splt->contents + 12);
5e681ec4 12548
5e681ec4 12549#ifdef FOUR_WORD_PLT
00a97672
RS		 12550 /* The displacement value goes in the otherwise-unused
12551 last word of the second entry. */
12552 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12553#else
00a97672 12554 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12555#endif
00a97672 12556 }
f7a74f8c 12557 }
252b5132
RH		 12558
12559 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12560 really seem like the right value. */
74541ad4
AM		 12561 if (splt->output_section->owner == output_bfd)
12562 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12563
12564 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12565 {
12566 /* Correct the .rel(a).plt.unloaded relocations. They will have
12567 incorrect symbol indexes. */
12568 int num_plts;
eed62c48 12569 unsigned char *p;
00a97672
RS		 12570
12571 num_plts = ((htab->splt->size - htab->plt_header_size)
12572 / htab->plt_entry_size);
12573 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12574
12575 for (; num_plts; num_plts--)
12576 {
12577 Elf_Internal_Rela rel;
12578
12579 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12580 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12581 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12582 p += RELOC_SIZE (htab);
12583
12584 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12585 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12586 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12587 p += RELOC_SIZE (htab);
12588 }
12589 }
252b5132
RH		 12590 }
12591
12592 /* Fill in the first three entries in the global offset table. */
229fcec5 12593 if (sgot)
252b5132 12594 {
229fcec5
MM		 12595 if (sgot->size > 0)
12596 {
12597 if (sdyn == NULL)
12598 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12599 else
12600 bfd_put_32 (output_bfd,
12601 sdyn->output_section->vma + sdyn->output_offset,
12602 sgot->contents);
12603 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12604 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12605 }
252b5132 12606
229fcec5
MM		 12607 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12608 }
252b5132 12609
b34976b6 12610 return TRUE;
252b5132
RH		 12611}
12612
ba96a88f 12613static void
57e8b36a 12614elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12615{
9b485d32 12616 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12617 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12618
12619 i_ehdrp = elf_elfheader (abfd);
12620
94a3258f
PB		 12621 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12622 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12623 else
12624 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12625 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12626
93204d3a
PB		 12627 if (link_info)
12628 {
12629 globals = elf32_arm_hash_table (link_info);
12630 if (globals->byteswap_code)
12631 i_ehdrp->e_flags |= EF_ARM_BE8;
12632 }
ba96a88f
NC		 12633}
12634
99e4ae17 12635static enum elf_reloc_type_class
57e8b36a 12636elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12637{
f51e552e 12638 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12639 {
12640 case R_ARM_RELATIVE:
12641 return reloc_class_relative;
12642 case R_ARM_JUMP_SLOT:
12643 return reloc_class_plt;
12644 case R_ARM_COPY:
12645 return reloc_class_copy;
12646 default:
12647 return reloc_class_normal;
12648 }
12649}
12650
e16bb312
NC		 12651/* Set the right machine number for an Arm ELF file. */
12652
12653static bfd_boolean
57e8b36a 12654elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12655{
12656 if (hdr->sh_type == SHT_NOTE)
12657 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12658
12659 return TRUE;
12660}
12661
e489d0ae 12662static void
57e8b36a 12663elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12664{
5a6c6817 12665 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12666}
12667
40a18ebd
NC		 12668/* Return TRUE if this is an unwinding table entry. */
12669
12670static bfd_boolean
12671is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12672{
0112cd26
NC		 12673 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12674 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12675}
12676
12677
12678/* Set the type and flags for an ARM section. We do this by
12679 the section name, which is a hack, but ought to work. */
12680
12681static bfd_boolean
12682elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12683{
12684 const char * name;
12685
12686 name = bfd_get_section_name (abfd, sec);
12687
12688 if (is_arm_elf_unwind_section_name (abfd, name))
12689 {
12690 hdr->sh_type = SHT_ARM_EXIDX;
12691 hdr->sh_flags |= SHF_LINK_ORDER;
12692 }
12693 return TRUE;
12694}
12695
6dc132d9
L		 12696/* Handle an ARM specific section when reading an object file. This is
12697 called when bfd_section_from_shdr finds a section with an unknown
12698 type. */
40a18ebd
NC		 12699
12700static bfd_boolean
12701elf32_arm_section_from_shdr (bfd *abfd,
12702 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12703 const char *name,
12704 int shindex)
40a18ebd
NC		 12705{
12706 /* There ought to be a place to keep ELF backend specific flags, but
12707 at the moment there isn't one. We just keep track of the
12708 sections by their name, instead. Fortunately, the ABI gives
12709 names for all the ARM specific sections, so we will probably get
12710 away with this. */
12711 switch (hdr->sh_type)
12712 {
12713 case SHT_ARM_EXIDX:
0951f019
RE		 12714 case SHT_ARM_PREEMPTMAP:
12715 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12716 break;
12717
12718 default:
12719 return FALSE;
12720 }
12721
6dc132d9 12722 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12723 return FALSE;
12724
12725 return TRUE;
12726}
e489d0ae 12727
8e3de13a
NC		 12728/* A structure used to record a list of sections, independently
12729 of the next and prev fields in the asection structure. */
12730typedef struct section_list
12731{
12732 asection * sec;
12733 struct section_list * next;
12734 struct section_list * prev;
12735}
12736section_list;
12737
12738/* Unfortunately we need to keep a list of sections for which
12739 an _arm_elf_section_data structure has been allocated. This
12740 is because it is possible for functions like elf32_arm_write_section
12741 to be called on a section which has had an elf_data_structure
12742 allocated for it (and so the used_by_bfd field is valid) but
12743 for which the ARM extended version of this structure - the
12744 _arm_elf_section_data structure - has not been allocated. */
12745static section_list * sections_with_arm_elf_section_data = NULL;
12746
12747static void
957c6e41 12748record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12749{
12750 struct section_list * entry;
12751
957c6e41 12752 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12753 if (entry == NULL)
12754 return;
12755 entry->sec = sec;
12756 entry->next = sections_with_arm_elf_section_data;
12757 entry->prev = NULL;
12758 if (entry->next != NULL)
12759 entry->next->prev = entry;
12760 sections_with_arm_elf_section_data = entry;
12761}
12762
44444f50
NC		 12763static struct section_list *
12764find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12765{
12766 struct section_list * entry;
bd4aae00 12767 static struct section_list * last_entry = NULL;
8e3de13a 12768
bd4aae00
NC		 12769 /* This is a short cut for the typical case where the sections are added
12770 to the sections_with_arm_elf_section_data list in forward order and
12771 then looked up here in backwards order. This makes a real difference
12772 to the ld-srec/sec64k.exp linker test. */
44444f50 12773 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12774 if (last_entry != NULL)
12775 {
12776 if (last_entry->sec == sec)
44444f50
NC		 12777 entry = last_entry;
12778 else if (last_entry->next != NULL
12779 && last_entry->next->sec == sec)
12780 entry = last_entry->next;
bd4aae00 12781 }
44444f50
NC		 12782
12783 for (; entry; entry = entry->next)
8e3de13a 12784 if (entry->sec == sec)
44444f50 12785 break;
bd4aae00 12786
44444f50
NC		 12787 if (entry)
12788 /* Record the entry prior to this one - it is the entry we are most
12789 likely to want to locate next time. Also this way if we have been
12790 called from unrecord_section_with_arm_elf_section_data() we will not
12791 be caching a pointer that is about to be freed. */
12792 last_entry = entry->prev;
12793
12794 return entry;
12795}
12796
12797static _arm_elf_section_data *
12798get_arm_elf_section_data (asection * sec)
12799{
12800 struct section_list * entry;
12801
12802 entry = find_arm_elf_section_entry (sec);
12803
12804 if (entry)
12805 return elf32_arm_section_data (entry->sec);
12806 else
12807 return NULL;
8e3de13a
NC		 12808}
12809
12810static void
12811unrecord_section_with_arm_elf_section_data (asection * sec)
12812{
12813 struct section_list * entry;
12814
44444f50
NC		 12815 entry = find_arm_elf_section_entry (sec);
12816
12817 if (entry)
12818 {
12819 if (entry->prev != NULL)
12820 entry->prev->next = entry->next;
12821 if (entry->next != NULL)
12822 entry->next->prev = entry->prev;
12823 if (entry == sections_with_arm_elf_section_data)
12824 sections_with_arm_elf_section_data = entry->next;
12825 free (entry);
12826 }
8e3de13a
NC		 12827}
12828
e489d0ae 12829
4e617b1e
PB		 12830typedef struct
12831{
12832 void *finfo;
12833 struct bfd_link_info *info;
91a5743d
PB		 12834 asection *sec;
12835 int sec_shndx;
6e0b88f1
AM		 12836 int (*func) (void *, const char *, Elf_Internal_Sym *,
12837 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12838} output_arch_syminfo;
12839
12840enum map_symbol_type
12841{
12842 ARM_MAP_ARM,
12843 ARM_MAP_THUMB,
12844 ARM_MAP_DATA
12845};
12846
12847
7413f23f 12848/* Output a single mapping symbol. */
4e617b1e
PB		 12849
12850static bfd_boolean
7413f23f
DJ		 12851elf32_arm_output_map_sym (output_arch_syminfo *osi,
12852 enum map_symbol_type type,
12853 bfd_vma offset)
4e617b1e
PB		 12854{
12855 static const char *names[3] = {"$a", "$t", "$d"};
12856 struct elf32_arm_link_hash_table *htab;
12857 Elf_Internal_Sym sym;
12858
12859 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12860 sym.st_value = osi->sec->output_section->vma
12861 + osi->sec->output_offset
12862 + offset;
4e617b1e
PB		 12863 sym.st_size = 0;
12864 sym.st_other = 0;
12865 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12866 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12867 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12868}
12869
12870
12871/* Output mapping symbols for PLT entries associated with H. */
12872
12873static bfd_boolean
12874elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12875{
12876 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12877 struct elf32_arm_link_hash_table *htab;
12878 struct elf32_arm_link_hash_entry *eh;
12879 bfd_vma addr;
12880
12881 htab = elf32_arm_hash_table (osi->info);
12882
12883 if (h->root.type == bfd_link_hash_indirect)
12884 return TRUE;
12885
12886 if (h->root.type == bfd_link_hash_warning)
12887 /* When warning symbols are created, they **replace** the "real"
12888 entry in the hash table, thus we never get to see the real
12889 symbol in a hash traversal. So look at it now. */
12890 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12891
12892 if (h->plt.offset == (bfd_vma) -1)
12893 return TRUE;
12894
12895 eh = (struct elf32_arm_link_hash_entry *) h;
12896 addr = h->plt.offset;
12897 if (htab->symbian_p)
12898 {
7413f23f 12899 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12900 return FALSE;
7413f23f 12901 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12902 return FALSE;
12903 }
12904 else if (htab->vxworks_p)
12905 {
7413f23f 12906 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12907 return FALSE;
7413f23f 12908 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12909 return FALSE;
7413f23f 12910 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12911 return FALSE;
7413f23f 12912 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12913 return FALSE;
12914 }
12915 else
12916 {
bd97cb95
DJ		 12917 bfd_signed_vma thumb_refs;
12918
12919 thumb_refs = eh->plt_thumb_refcount;
12920 if (!htab->use_blx)
12921 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12922
bd97cb95 12923 if (thumb_refs > 0)
4e617b1e 12924 {
7413f23f 12925 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12926 return FALSE;
12927 }
12928#ifdef FOUR_WORD_PLT
7413f23f 12929 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12930 return FALSE;
7413f23f 12931 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12932 return FALSE;
12933#else
906e58ca 12934 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12935 so only need to output a mapping symbol for the first PLT entry and
12936 entries with thumb thunks. */
bd97cb95 12937 if (thumb_refs > 0 || addr == 20)
4e617b1e 12938 {
7413f23f 12939 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12940 return FALSE;
12941 }
12942#endif
12943 }
12944
12945 return TRUE;
12946}
12947
7413f23f
DJ		 12948/* Output a single local symbol for a generated stub. */
12949
12950static bfd_boolean
12951elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12952 bfd_vma offset, bfd_vma size)
12953{
12954 struct elf32_arm_link_hash_table *htab;
12955 Elf_Internal_Sym sym;
12956
12957 htab = elf32_arm_hash_table (osi->info);
12958 sym.st_value = osi->sec->output_section->vma
12959 + osi->sec->output_offset
12960 + offset;
12961 sym.st_size = size;
12962 sym.st_other = 0;
12963 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12964 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12965 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12966}
4e617b1e 12967
da5938a2 12968static bfd_boolean
8029a119
NC		 12969arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12970 void * in_arg)
da5938a2
NC		 12971{
12972 struct elf32_arm_stub_hash_entry *stub_entry;
12973 struct bfd_link_info *info;
12974 struct elf32_arm_link_hash_table *htab;
12975 asection *stub_sec;
12976 bfd_vma addr;
7413f23f 12977 char *stub_name;
9a008db3 12978 output_arch_syminfo *osi;
461a49ca
DJ		 12979 const insn_sequence *template;
12980 enum stub_insn_type prev_type;
12981 int size;
12982 int i;
12983 enum map_symbol_type sym_type;
da5938a2
NC		 12984
12985 /* Massage our args to the form they really have. */
12986 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12987 osi = (output_arch_syminfo *) in_arg;
da5938a2 12988
da5938a2
NC		 12989 info = osi->info;
12990
12991 htab = elf32_arm_hash_table (info);
12992 stub_sec = stub_entry->stub_sec;
12993
12994 /* Ensure this stub is attached to the current section being
7413f23f 12995 processed. */
da5938a2
NC		 12996 if (stub_sec != osi->sec)
12997 return TRUE;
12998
7413f23f
DJ		 12999 addr = (bfd_vma) stub_entry->stub_offset;
13000 stub_name = stub_entry->output_name;
da5938a2 13001
461a49ca 13002 template = stub_entry->stub_template;
4e31c731 13003 switch (template[0].type)
7413f23f 13004 {
461a49ca
DJ		 13005 case ARM_TYPE:
13006 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13007 return FALSE;
13008 break;
461a49ca 13009 case THUMB16_TYPE:
48229727 13010 case THUMB32_TYPE:
461a49ca
DJ		 13011 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13012 stub_entry->stub_size))
da5938a2
NC		 13013 return FALSE;
13014 break;
13015 default:
13016 BFD_FAIL ();
48229727 13017 return 0;
7413f23f 13018 }
da5938a2 13019
461a49ca
DJ		 13020 prev_type = DATA_TYPE;
13021 size = 0;
13022 for (i = 0; i < stub_entry->stub_template_size; i++)
13023 {
4e31c731 13024 switch (template[i].type)
461a49ca
DJ		 13025 {
13026 case ARM_TYPE:
13027 sym_type = ARM_MAP_ARM;
13028 break;
13029
13030 case THUMB16_TYPE:
48229727 13031 case THUMB32_TYPE:
461a49ca
DJ		 13032 sym_type = ARM_MAP_THUMB;
13033 break;
13034
13035 case DATA_TYPE:
13036 sym_type = ARM_MAP_DATA;
13037 break;
13038
13039 default:
13040 BFD_FAIL ();
4e31c731 13041 return FALSE;
461a49ca
DJ		 13042 }
13043
13044 if (template[i].type != prev_type)
13045 {
13046 prev_type = template[i].type;
13047 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13048 return FALSE;
13049 }
13050
4e31c731 13051 switch (template[i].type)
461a49ca
DJ		 13052 {
13053 case ARM_TYPE:
48229727 13054 case THUMB32_TYPE:
461a49ca
DJ		 13055 size += 4;
13056 break;
13057
13058 case THUMB16_TYPE:
13059 size += 2;
13060 break;
13061
13062 case DATA_TYPE:
13063 size += 4;
13064 break;
13065
13066 default:
13067 BFD_FAIL ();
4e31c731 13068 return FALSE;
461a49ca
DJ		 13069 }
13070 }
13071
da5938a2
NC		 13072 return TRUE;
13073}
13074
91a5743d 13075/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 13076
13077static bfd_boolean
13078elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13079 struct bfd_link_info *info,
13080 void *finfo,
6e0b88f1
AM		 13081 int (*func) (void *, const char *,
13082 Elf_Internal_Sym *,
13083 asection *,
13084 struct elf_link_hash_entry *))
4e617b1e
PB		 13085{
13086 output_arch_syminfo osi;
13087 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13088 bfd_vma offset;
13089 bfd_size_type size;
4e617b1e
PB		 13090
13091 htab = elf32_arm_hash_table (info);
906e58ca 13092 check_use_blx (htab);
91a5743d 13093
4e617b1e
PB		 13094 osi.finfo = finfo;
13095 osi.info = info;
13096 osi.func = func;
906e58ca 13097
91a5743d
PB		 13098 /* ARM->Thumb glue. */
13099 if (htab->arm_glue_size > 0)
13100 {
13101 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13102 ARM2THUMB_GLUE_SECTION_NAME);
13103
13104 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13105 (output_bfd, osi.sec->output_section);
13106 if (info->shared || htab->root.is_relocatable_executable
13107 || htab->pic_veneer)
13108 size = ARM2THUMB_PIC_GLUE_SIZE;
13109 else if (htab->use_blx)
13110 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13111 else
13112 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13113
91a5743d
PB		 13114 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13115 {
7413f23f
DJ		 13116 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13117 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13118 }
13119 }
13120
13121 /* Thumb->ARM glue. */
13122 if (htab->thumb_glue_size > 0)
13123 {
13124 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13125 THUMB2ARM_GLUE_SECTION_NAME);
13126
13127 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13128 (output_bfd, osi.sec->output_section);
13129 size = THUMB2ARM_GLUE_SIZE;
13130
13131 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13132 {
7413f23f
DJ		 13133 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13134 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13135 }
13136 }
13137
845b51d6
PB		 13138 /* ARMv4 BX veneers. */
13139 if (htab->bx_glue_size > 0)
13140 {
13141 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13142 ARM_BX_GLUE_SECTION_NAME);
13143
13144 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13145 (output_bfd, osi.sec->output_section);
13146
7413f23f 13147 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13148 }
13149
8029a119
NC		 13150 /* Long calls stubs. */
13151 if (htab->stub_bfd && htab->stub_bfd->sections)
13152 {
da5938a2 13153 asection* stub_sec;
8029a119 13154
da5938a2
NC		 13155 for (stub_sec = htab->stub_bfd->sections;
13156 stub_sec != NULL;
8029a119
NC		 13157 stub_sec = stub_sec->next)
13158 {
13159 /* Ignore non-stub sections. */
13160 if (!strstr (stub_sec->name, STUB_SUFFIX))
13161 continue;
da5938a2 13162
8029a119 13163 osi.sec = stub_sec;
da5938a2 13164
8029a119
NC		 13165 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13166 (output_bfd, osi.sec->output_section);
da5938a2 13167
8029a119
NC		 13168 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13169 }
13170 }
da5938a2 13171
91a5743d
PB		 13172 /* Finally, output mapping symbols for the PLT. */
13173 if (!htab->splt || htab->splt->size == 0)
13174 return TRUE;
13175
13176 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13177 htab->splt->output_section);
91a5743d 13178 osi.sec = htab->splt;
4e617b1e
PB		 13179 /* Output mapping symbols for the plt header. SymbianOS does not have a
13180 plt header. */
13181 if (htab->vxworks_p)
13182 {
13183 /* VxWorks shared libraries have no PLT header. */
13184 if (!info->shared)
13185 {
7413f23f 13186 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13187 return FALSE;
7413f23f 13188 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13189 return FALSE;
13190 }
13191 }
13192 else if (!htab->symbian_p)
13193 {
7413f23f 13194 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13195 return FALSE;
13196#ifndef FOUR_WORD_PLT
7413f23f 13197 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13198 return FALSE;
13199#endif
13200 }
13201
13202 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13203 return TRUE;
13204}
13205
e489d0ae
PB		 13206/* Allocate target specific section data. */
13207
13208static bfd_boolean
13209elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13210{
f592407e
AM		 13211 if (!sec->used_by_bfd)
13212 {
13213 _arm_elf_section_data *sdata;
13214 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13215
f592407e
AM		 13216 sdata = bfd_zalloc (abfd, amt);
13217 if (sdata == NULL)
13218 return FALSE;
13219 sec->used_by_bfd = sdata;
13220 }
e489d0ae 13221
957c6e41 13222 record_section_with_arm_elf_section_data (sec);
8e3de13a 13223
e489d0ae
PB		 13224 return _bfd_elf_new_section_hook (abfd, sec);
13225}
13226
13227
13228/* Used to order a list of mapping symbols by address. */
13229
13230static int
13231elf32_arm_compare_mapping (const void * a, const void * b)
13232{
7f6a71ff
JM		 13233 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13234 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13235
13236 if (amap->vma > bmap->vma)
13237 return 1;
13238 else if (amap->vma < bmap->vma)
13239 return -1;
13240 else if (amap->type > bmap->type)
13241 /* Ensure results do not depend on the host qsort for objects with
13242 multiple mapping symbols at the same address by sorting on type
13243 after vma. */
13244 return 1;
13245 else if (amap->type < bmap->type)
13246 return -1;
13247 else
13248 return 0;
e489d0ae
PB		 13249}
13250
2468f9c9
PB		 13251/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13252
13253static unsigned long
13254offset_prel31 (unsigned long addr, bfd_vma offset)
13255{
13256 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13257}
13258
13259/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13260 relocations. */
13261
13262static void
13263copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13264{
13265 unsigned long first_word = bfd_get_32 (output_bfd, from);
13266 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13267
13268 /* High bit of first word is supposed to be zero. */
13269 if ((first_word & 0x80000000ul) == 0)
13270 first_word = offset_prel31 (first_word, offset);
13271
13272 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13273 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13274 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13275 second_word = offset_prel31 (second_word, offset);
13276
13277 bfd_put_32 (output_bfd, first_word, to);
13278 bfd_put_32 (output_bfd, second_word, to + 4);
13279}
e489d0ae 13280
48229727
JB		 13281/* Data for make_branch_to_a8_stub(). */
13282
13283struct a8_branch_to_stub_data {
13284 asection *writing_section;
13285 bfd_byte *contents;
13286};
13287
13288
13289/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13290 places for a particular section. */
13291
13292static bfd_boolean
13293make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13294 void *in_arg)
13295{
13296 struct elf32_arm_stub_hash_entry *stub_entry;
13297 struct a8_branch_to_stub_data *data;
13298 bfd_byte *contents;
13299 unsigned long branch_insn;
13300 bfd_vma veneered_insn_loc, veneer_entry_loc;
13301 bfd_signed_vma branch_offset;
13302 bfd *abfd;
13303 unsigned int index;
13304
13305 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13306 data = (struct a8_branch_to_stub_data *) in_arg;
13307
13308 if (stub_entry->target_section != data->writing_section
13309 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13310 return TRUE;
13311
13312 contents = data->contents;
13313
13314 veneered_insn_loc = stub_entry->target_section->output_section->vma
13315 + stub_entry->target_section->output_offset
13316 + stub_entry->target_value;
13317
13318 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13319 + stub_entry->stub_sec->output_offset
13320 + stub_entry->stub_offset;
13321
13322 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13323 veneered_insn_loc &= ~3u;
13324
13325 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13326
13327 abfd = stub_entry->target_section->owner;
13328 index = stub_entry->target_value;
13329
13330 /* We attempt to avoid this condition by setting stubs_always_after_branch
13331 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13332 This check is just to be on the safe side... */
13333 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13334 {
13335 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13336 "allocated in unsafe location"), abfd);
13337 return FALSE;
13338 }
13339
13340 switch (stub_entry->stub_type)
13341 {
13342 case arm_stub_a8_veneer_b:
13343 case arm_stub_a8_veneer_b_cond:
13344 branch_insn = 0xf0009000;
13345 goto jump24;
13346
13347 case arm_stub_a8_veneer_blx:
13348 branch_insn = 0xf000e800;
13349 goto jump24;
13350
13351 case arm_stub_a8_veneer_bl:
13352 {
13353 unsigned int i1, j1, i2, j2, s;
13354
13355 branch_insn = 0xf000d000;
13356
13357 jump24:
13358 if (branch_offset < -16777216 || branch_offset > 16777214)
13359 {
13360 /* There's not much we can do apart from complain if this
13361 happens. */
13362 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13363 "of range (input file too large)"), abfd);
13364 return FALSE;
13365 }
13366
13367 /* i1 = not(j1 eor s), so:
13368 not i1 = j1 eor s
13369 j1 = (not i1) eor s. */
13370
13371 branch_insn |= (branch_offset >> 1) & 0x7ff;
13372 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13373 i2 = (branch_offset >> 22) & 1;
13374 i1 = (branch_offset >> 23) & 1;
13375 s = (branch_offset >> 24) & 1;
13376 j1 = (!i1) ^ s;
13377 j2 = (!i2) ^ s;
13378 branch_insn |= j2 << 11;
13379 branch_insn |= j1 << 13;
13380 branch_insn |= s << 26;
13381 }
13382 break;
13383
13384 default:
13385 BFD_FAIL ();
13386 return FALSE;
13387 }
13388
13389 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[index]);
13390 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[index + 2]);
13391
13392 return TRUE;
13393}
13394
e489d0ae
PB		 13395/* Do code byteswapping. Return FALSE afterwards so that the section is
13396 written out as normal. */
13397
13398static bfd_boolean
c7b8f16e 13399elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13400 struct bfd_link_info *link_info,
13401 asection *sec,
e489d0ae
PB		 13402 bfd_byte *contents)
13403{
48229727 13404 unsigned int mapcount, errcount;
8e3de13a 13405 _arm_elf_section_data *arm_data;
c7b8f16e 13406 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13407 elf32_arm_section_map *map;
c7b8f16e 13408 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13409 bfd_vma ptr;
13410 bfd_vma end;
c7b8f16e 13411 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13412 bfd_byte tmp;
48229727 13413 unsigned int i;
57e8b36a 13414
8e3de13a
NC		 13415 /* If this section has not been allocated an _arm_elf_section_data
13416 structure then we cannot record anything. */
13417 arm_data = get_arm_elf_section_data (sec);
13418 if (arm_data == NULL)
13419 return FALSE;
13420
13421 mapcount = arm_data->mapcount;
13422 map = arm_data->map;
c7b8f16e
JB		 13423 errcount = arm_data->erratumcount;
13424
13425 if (errcount != 0)
13426 {
13427 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13428
13429 for (errnode = arm_data->erratumlist; errnode != 0;
13430 errnode = errnode->next)
13431 {
13432 bfd_vma index = errnode->vma - offset;
13433
13434 switch (errnode->type)
13435 {
13436 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13437 {
13438 bfd_vma branch_to_veneer;
13439 /* Original condition code of instruction, plus bit mask for
13440 ARM B instruction. */
13441 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13442 | 0x0a000000;
13443
13444 /* The instruction is before the label. */
13445 index -= 4;
13446
13447 /* Above offset included in -4 below. */
13448 branch_to_veneer = errnode->u.b.veneer->vma
13449 - errnode->vma - 4;
13450
13451 if ((signed) branch_to_veneer < -(1 << 25)
13452 || (signed) branch_to_veneer >= (1 << 25))
13453 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13454 "range"), output_bfd);
13455
13456 insn |= (branch_to_veneer >> 2) & 0xffffff;
13457 contents[endianflip ^ index] = insn & 0xff;
13458 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13459 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13460 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13461 }
13462 break;
13463
13464 case VFP11_ERRATUM_ARM_VENEER:
13465 {
13466 bfd_vma branch_from_veneer;
13467 unsigned int insn;
13468
13469 /* Take size of veneer into account. */
13470 branch_from_veneer = errnode->u.v.branch->vma
13471 - errnode->vma - 12;
13472
13473 if ((signed) branch_from_veneer < -(1 << 25)
13474 || (signed) branch_from_veneer >= (1 << 25))
13475 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13476 "range"), output_bfd);
13477
13478 /* Original instruction. */
13479 insn = errnode->u.v.branch->u.b.vfp_insn;
13480 contents[endianflip ^ index] = insn & 0xff;
13481 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13482 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13483 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13484
13485 /* Branch back to insn after original insn. */
13486 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13487 contents[endianflip ^ (index + 4)] = insn & 0xff;
13488 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
13489 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
13490 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
13491 }
13492 break;
13493
13494 default:
13495 abort ();
13496 }
13497 }
13498 }
e489d0ae 13499
2468f9c9
PB		 13500 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13501 {
13502 arm_unwind_table_edit *edit_node
13503 = arm_data->u.exidx.unwind_edit_list;
13504 /* Now, sec->size is the size of the section we will write. The original
13505 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13506 markers) was sec->rawsize. (This isn't the case if we perform no
13507 edits, then rawsize will be zero and we should use size). */
13508 bfd_byte *edited_contents = bfd_malloc (sec->size);
13509 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13510 unsigned int in_index, out_index;
13511 bfd_vma add_to_offsets = 0;
13512
13513 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13514 {
13515 if (edit_node)
13516 {
13517 unsigned int edit_index = edit_node->index;
13518
13519 if (in_index < edit_index && in_index * 8 < input_size)
13520 {
13521 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13522 contents + in_index * 8, add_to_offsets);
13523 out_index++;
13524 in_index++;
13525 }
13526 else if (in_index == edit_index
13527 || (in_index * 8 >= input_size
13528 && edit_index == UINT_MAX))
13529 {
13530 switch (edit_node->type)
13531 {
13532 case DELETE_EXIDX_ENTRY:
13533 in_index++;
13534 add_to_offsets += 8;
13535 break;
13536
13537 case INSERT_EXIDX_CANTUNWIND_AT_END:
13538 {
13539 asection *text_sec = edit_node->linked_section;
13540 bfd_vma text_offset = text_sec->output_section->vma
13541 + text_sec->output_offset
13542 + text_sec->size;
13543 bfd_vma exidx_offset = offset + out_index * 8;
13544 unsigned long prel31_offset;
13545
13546 /* Note: this is meant to be equivalent to an
13547 R_ARM_PREL31 relocation. These synthetic
13548 EXIDX_CANTUNWIND markers are not relocated by the
13549 usual BFD method. */
13550 prel31_offset = (text_offset - exidx_offset)
13551 & 0x7ffffffful;
13552
13553 /* First address we can't unwind. */
13554 bfd_put_32 (output_bfd, prel31_offset,
13555 &edited_contents[out_index * 8]);
13556
13557 /* Code for EXIDX_CANTUNWIND. */
13558 bfd_put_32 (output_bfd, 0x1,
13559 &edited_contents[out_index * 8 + 4]);
13560
13561 out_index++;
13562 add_to_offsets -= 8;
13563 }
13564 break;
13565 }
13566
13567 edit_node = edit_node->next;
13568 }
13569 }
13570 else
13571 {
13572 /* No more edits, copy remaining entries verbatim. */
13573 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13574 contents + in_index * 8, add_to_offsets);
13575 out_index++;
13576 in_index++;
13577 }
13578 }
13579
13580 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13581 bfd_set_section_contents (output_bfd, sec->output_section,
13582 edited_contents,
13583 (file_ptr) sec->output_offset, sec->size);
13584
13585 return TRUE;
13586 }
13587
48229727
JB		 13588 /* Fix code to point to Cortex-A8 erratum stubs. */
13589 if (globals->fix_cortex_a8)
13590 {
13591 struct a8_branch_to_stub_data data;
13592
13593 data.writing_section = sec;
13594 data.contents = contents;
13595
13596 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13597 &data);
13598 }
13599
e489d0ae
PB		 13600 if (mapcount == 0)
13601 return FALSE;
13602
c7b8f16e 13603 if (globals->byteswap_code)
e489d0ae 13604 {
c7b8f16e 13605 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13606
c7b8f16e
JB		 13607 ptr = map[0].vma;
13608 for (i = 0; i < mapcount; i++)
13609 {
13610 if (i == mapcount - 1)
13611 end = sec->size;
13612 else
13613 end = map[i + 1].vma;
e489d0ae 13614
c7b8f16e 13615 switch (map[i].type)
e489d0ae 13616 {
c7b8f16e
JB		 13617 case 'a':
13618 /* Byte swap code words. */
13619 while (ptr + 3 < end)
13620 {
13621 tmp = contents[ptr];
13622 contents[ptr] = contents[ptr + 3];
13623 contents[ptr + 3] = tmp;
13624 tmp = contents[ptr + 1];
13625 contents[ptr + 1] = contents[ptr + 2];
13626 contents[ptr + 2] = tmp;
13627 ptr += 4;
13628 }
13629 break;
e489d0ae 13630
c7b8f16e
JB		 13631 case 't':
13632 /* Byte swap code halfwords. */
13633 while (ptr + 1 < end)
13634 {
13635 tmp = contents[ptr];
13636 contents[ptr] = contents[ptr + 1];
13637 contents[ptr + 1] = tmp;
13638 ptr += 2;
13639 }
13640 break;
13641
13642 case 'd':
13643 /* Leave data alone. */
13644 break;
13645 }
13646 ptr = end;
13647 }
e489d0ae 13648 }
8e3de13a 13649
93204d3a 13650 free (map);
8e3de13a 13651 arm_data->mapcount = 0;
c7b8f16e 13652 arm_data->mapsize = 0;
8e3de13a
NC		 13653 arm_data->map = NULL;
13654 unrecord_section_with_arm_elf_section_data (sec);
13655
e489d0ae
PB		 13656 return FALSE;
13657}
13658
957c6e41
NC		 13659static void
13660unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13661 asection * sec,
13662 void * ignore ATTRIBUTE_UNUSED)
13663{
13664 unrecord_section_with_arm_elf_section_data (sec);
13665}
13666
13667static bfd_boolean
13668elf32_arm_close_and_cleanup (bfd * abfd)
13669{
b25e3d87
L		 13670 if (abfd->sections)
13671 bfd_map_over_sections (abfd,
13672 unrecord_section_via_map_over_sections,
13673 NULL);
957c6e41
NC		 13674
13675 return _bfd_elf_close_and_cleanup (abfd);
13676}
13677
b25e3d87
L		 13678static bfd_boolean
13679elf32_arm_bfd_free_cached_info (bfd * abfd)
13680{
13681 if (abfd->sections)
13682 bfd_map_over_sections (abfd,
13683 unrecord_section_via_map_over_sections,
13684 NULL);
13685
13686 return _bfd_free_cached_info (abfd);
13687}
13688
b7693d02
DJ		 13689/* Display STT_ARM_TFUNC symbols as functions. */
13690
13691static void
13692elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13693 asymbol *asym)
13694{
13695 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13696
13697 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13698 elfsym->symbol.flags |= BSF_FUNCTION;
13699}
13700
0beaef2b
PB		 13701
13702/* Mangle thumb function symbols as we read them in. */
13703
8384fb8f 13704static bfd_boolean
0beaef2b
PB		 13705elf32_arm_swap_symbol_in (bfd * abfd,
13706 const void *psrc,
13707 const void *pshn,
13708 Elf_Internal_Sym *dst)
13709{
8384fb8f
AM		 13710 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13711 return FALSE;
0beaef2b
PB		 13712
13713 /* New EABI objects mark thumb function symbols by setting the low bit of
13714 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13715 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13716 && (dst->st_value & 1))
13717 {
13718 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13719 dst->st_value &= ~(bfd_vma) 1;
13720 }
8384fb8f 13721 return TRUE;
0beaef2b
PB		 13722}
13723
13724
13725/* Mangle thumb function symbols as we write them out. */
13726
13727static void
13728elf32_arm_swap_symbol_out (bfd *abfd,
13729 const Elf_Internal_Sym *src,
13730 void *cdst,
13731 void *shndx)
13732{
13733 Elf_Internal_Sym newsym;
13734
13735 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13736 of the address set, as per the new EABI. We do this unconditionally
13737 because objcopy does not set the elf header flags until after
13738 it writes out the symbol table. */
13739 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13740 {
13741 newsym = *src;
13742 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13743 if (newsym.st_shndx != SHN_UNDEF)
13744 {
13745 /* Do this only for defined symbols. At link type, the static
13746 linker will simulate the work of dynamic linker of resolving
13747 symbols and will carry over the thumbness of found symbols to
13748 the output symbol table. It's not clear how it happens, but
b0fead2b 13749 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13750 runtime, and writing '1' for them will be confusing for users
13751 and possibly for dynamic linker itself.
13752 */
13753 newsym.st_value |= 1;
13754 }
906e58ca 13755
0beaef2b
PB		 13756 src = &newsym;
13757 }
13758 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13759}
13760
b294bdf8
MM		 13761/* Add the PT_ARM_EXIDX program header. */
13762
13763static bfd_boolean
906e58ca 13764elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13765 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13766{
13767 struct elf_segment_map *m;
13768 asection *sec;
13769
13770 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13771 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13772 {
13773 /* If there is already a PT_ARM_EXIDX header, then we do not
13774 want to add another one. This situation arises when running
13775 "strip"; the input binary already has the header. */
13776 m = elf_tdata (abfd)->segment_map;
13777 while (m && m->p_type != PT_ARM_EXIDX)
13778 m = m->next;
13779 if (!m)
13780 {
13781 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13782 if (m == NULL)
13783 return FALSE;
13784 m->p_type = PT_ARM_EXIDX;
13785 m->count = 1;
13786 m->sections[0] = sec;
13787
13788 m->next = elf_tdata (abfd)->segment_map;
13789 elf_tdata (abfd)->segment_map = m;
13790 }
13791 }
13792
13793 return TRUE;
13794}
13795
13796/* We may add a PT_ARM_EXIDX program header. */
13797
13798static int
a6b96beb
AM		 13799elf32_arm_additional_program_headers (bfd *abfd,
13800 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13801{
13802 asection *sec;
13803
13804 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13805 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13806 return 1;
13807 else
13808 return 0;
13809}
13810
fcb93ecf 13811/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13812
fcb93ecf
PB		 13813static bfd_boolean
13814elf32_arm_is_function_type (unsigned int type)
13815{
0f88be7a 13816 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13817}
13818
0beaef2b 13819/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13820const struct elf_size_info elf32_arm_size_info =
13821{
0beaef2b
PB		 13822 sizeof (Elf32_External_Ehdr),
13823 sizeof (Elf32_External_Phdr),
13824 sizeof (Elf32_External_Shdr),
13825 sizeof (Elf32_External_Rel),
13826 sizeof (Elf32_External_Rela),
13827 sizeof (Elf32_External_Sym),
13828 sizeof (Elf32_External_Dyn),
13829 sizeof (Elf_External_Note),
13830 4,
13831 1,
13832 32, 2,
13833 ELFCLASS32, EV_CURRENT,
13834 bfd_elf32_write_out_phdrs,
13835 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13836 bfd_elf32_checksum_contents,
0beaef2b
PB		 13837 bfd_elf32_write_relocs,
13838 elf32_arm_swap_symbol_in,
13839 elf32_arm_swap_symbol_out,
13840 bfd_elf32_slurp_reloc_table,
13841 bfd_elf32_slurp_symbol_table,
13842 bfd_elf32_swap_dyn_in,
13843 bfd_elf32_swap_dyn_out,
13844 bfd_elf32_swap_reloc_in,
13845 bfd_elf32_swap_reloc_out,
13846 bfd_elf32_swap_reloca_in,
13847 bfd_elf32_swap_reloca_out
13848};
13849
252b5132
RH		 13850#define ELF_ARCH bfd_arch_arm
13851#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13852#ifdef __QNXTARGET__
13853#define ELF_MAXPAGESIZE 0x1000
13854#else
f21f3fe0 13855#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13856#endif
b1342370 13857#define ELF_MINPAGESIZE 0x1000
24718e3b 13858#define ELF_COMMONPAGESIZE 0x1000
252b5132 13859
ba93b8ac
DJ		 13860#define bfd_elf32_mkobject elf32_arm_mkobject
13861
99e4ae17
AJ		 13862#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13863#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13864#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13865#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13866#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13867#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13868#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13869#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13870#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13871#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13872#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13873#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13874#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13875#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13876#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13877
13878#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13879#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13880#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13881#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13882#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13883#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13884#define elf_backend_write_section elf32_arm_write_section
252b5132 13885#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13886#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13887#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13888#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13889#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13890#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13891#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13892#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13893#define elf_backend_object_p elf32_arm_object_p
e16bb312 13894#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13895#define elf_backend_fake_sections elf32_arm_fake_sections
13896#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13897#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13898#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13899#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13900#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13901#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13902#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13903#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13904#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13905#define elf_backend_is_function_type elf32_arm_is_function_type
13906
13907#define elf_backend_can_refcount 1
13908#define elf_backend_can_gc_sections 1
13909#define elf_backend_plt_readonly 1
13910#define elf_backend_want_got_plt 1
13911#define elf_backend_want_plt_sym 0
13912#define elf_backend_may_use_rel_p 1
13913#define elf_backend_may_use_rela_p 0
4e7fd91e 13914#define elf_backend_default_use_rela_p 0
252b5132 13915
04f7c78d 13916#define elf_backend_got_header_size 12
04f7c78d 13917
906e58ca
NC		 13918#undef elf_backend_obj_attrs_vendor
13919#define elf_backend_obj_attrs_vendor "aeabi"
13920#undef elf_backend_obj_attrs_section
13921#define elf_backend_obj_attrs_section ".ARM.attributes"
13922#undef elf_backend_obj_attrs_arg_type
13923#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13924#undef elf_backend_obj_attrs_section_type
104d59d1 13925#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13926#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13927
252b5132 13928#include "elf32-target.h"
7f266840 13929
906e58ca 13930/* VxWorks Targets. */
4e7fd91e 13931
906e58ca 13932#undef TARGET_LITTLE_SYM
4e7fd91e 13933#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13934#undef TARGET_LITTLE_NAME
4e7fd91e 13935#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13936#undef TARGET_BIG_SYM
4e7fd91e 13937#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13938#undef TARGET_BIG_NAME
4e7fd91e
PB		 13939#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13940
13941/* Like elf32_arm_link_hash_table_create -- but overrides
13942 appropriately for VxWorks. */
906e58ca 13943
4e7fd91e
PB		 13944static struct bfd_link_hash_table *
13945elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13946{
13947 struct bfd_link_hash_table *ret;
13948
13949 ret = elf32_arm_link_hash_table_create (abfd);
13950 if (ret)
13951 {
13952 struct elf32_arm_link_hash_table *htab
00a97672 13953 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13954 htab->use_rel = 0;
00a97672 13955 htab->vxworks_p = 1;
4e7fd91e
PB		 13956 }
13957 return ret;
906e58ca 13958}
4e7fd91e 13959
00a97672
RS		 13960static void
13961elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13962{
13963 elf32_arm_final_write_processing (abfd, linker);
13964 elf_vxworks_final_write_processing (abfd, linker);
13965}
13966
906e58ca 13967#undef elf32_bed
4e7fd91e
PB		 13968#define elf32_bed elf32_arm_vxworks_bed
13969
906e58ca
NC		 13970#undef bfd_elf32_bfd_link_hash_table_create
13971#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13972#undef elf_backend_add_symbol_hook
13973#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13974#undef elf_backend_final_write_processing
13975#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13976#undef elf_backend_emit_relocs
13977#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13978
906e58ca 13979#undef elf_backend_may_use_rel_p
00a97672 13980#define elf_backend_may_use_rel_p 0
906e58ca 13981#undef elf_backend_may_use_rela_p
00a97672 13982#define elf_backend_may_use_rela_p 1
906e58ca 13983#undef elf_backend_default_use_rela_p
00a97672 13984#define elf_backend_default_use_rela_p 1
906e58ca 13985#undef elf_backend_want_plt_sym
00a97672 13986#define elf_backend_want_plt_sym 1
906e58ca 13987#undef ELF_MAXPAGESIZE
00a97672 13988#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13989
13990#include "elf32-target.h"
13991
13992
906e58ca 13993/* Symbian OS Targets. */
7f266840 13994
906e58ca 13995#undef TARGET_LITTLE_SYM
7f266840 13996#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 13997#undef TARGET_LITTLE_NAME
7f266840 13998#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 13999#undef TARGET_BIG_SYM
7f266840 14000#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14001#undef TARGET_BIG_NAME
7f266840
DJ		 14002#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14003
14004/* Like elf32_arm_link_hash_table_create -- but overrides
14005 appropriately for Symbian OS. */
906e58ca 14006
7f266840
DJ		 14007static struct bfd_link_hash_table *
14008elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14009{
14010 struct bfd_link_hash_table *ret;
14011
14012 ret = elf32_arm_link_hash_table_create (abfd);
14013 if (ret)
14014 {
14015 struct elf32_arm_link_hash_table *htab
14016 = (struct elf32_arm_link_hash_table *)ret;
14017 /* There is no PLT header for Symbian OS. */
14018 htab->plt_header_size = 0;
95720a86
DJ		 14019 /* The PLT entries are each one instruction and one word. */
14020 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14021 htab->symbian_p = 1;
33bfe774
JB		 14022 /* Symbian uses armv5t or above, so use_blx is always true. */
14023 htab->use_blx = 1;
67687978 14024 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14025 }
14026 return ret;
906e58ca 14027}
7f266840 14028
b35d266b 14029static const struct bfd_elf_special_section
551b43fd 14030elf32_arm_symbian_special_sections[] =
7f266840 14031{
5cd3778d
MM		 14032 /* In a BPABI executable, the dynamic linking sections do not go in
14033 the loadable read-only segment. The post-linker may wish to
14034 refer to these sections, but they are not part of the final
14035 program image. */
0112cd26
NC		 14036 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14037 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14038 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14039 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14040 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14041 /* These sections do not need to be writable as the SymbianOS
14042 postlinker will arrange things so that no dynamic relocation is
14043 required. */
0112cd26
NC		 14044 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14045 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14046 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14047 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14048};
14049
c3c76620 14050static void
906e58ca 14051elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14052 struct bfd_link_info *link_info)
c3c76620
MM		 14053{
14054 /* BPABI objects are never loaded directly by an OS kernel; they are
14055 processed by a postlinker first, into an OS-specific format. If
14056 the D_PAGED bit is set on the file, BFD will align segments on
14057 page boundaries, so that an OS can directly map the file. With
14058 BPABI objects, that just results in wasted space. In addition,
14059 because we clear the D_PAGED bit, map_sections_to_segments will
14060 recognize that the program headers should not be mapped into any
14061 loadable segment. */
14062 abfd->flags &= ~D_PAGED;
906e58ca 14063 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14064}
7f266840
DJ		 14065
14066static bfd_boolean
906e58ca 14067elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14068 struct bfd_link_info *info)
7f266840
DJ		 14069{
14070 struct elf_segment_map *m;
14071 asection *dynsec;
14072
7f266840
DJ		 14073 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14074 segment. However, because the .dynamic section is not marked
14075 with SEC_LOAD, the generic ELF code will not create such a
14076 segment. */
14077 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14078 if (dynsec)
14079 {
8ded5a0f
AM		 14080 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14081 if (m->p_type == PT_DYNAMIC)
14082 break;
14083
14084 if (m == NULL)
14085 {
14086 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14087 m->next = elf_tdata (abfd)->segment_map;
14088 elf_tdata (abfd)->segment_map = m;
14089 }
7f266840
DJ		 14090 }
14091
b294bdf8
MM		 14092 /* Also call the generic arm routine. */
14093 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14094}
14095
95720a86
DJ		 14096/* Return address for Ith PLT stub in section PLT, for relocation REL
14097 or (bfd_vma) -1 if it should not be included. */
14098
14099static bfd_vma
14100elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14101 const arelent *rel ATTRIBUTE_UNUSED)
14102{
14103 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14104}
14105
14106
8029a119 14107#undef elf32_bed
7f266840
DJ		 14108#define elf32_bed elf32_arm_symbian_bed
14109
14110/* The dynamic sections are not allocated on SymbianOS; the postlinker
14111 will process them and then discard them. */
906e58ca 14112#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14113#define ELF_DYNAMIC_SEC_FLAGS \
14114 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14115
00a97672 14116#undef elf_backend_add_symbol_hook
00a97672 14117#undef elf_backend_emit_relocs
c3c76620 14118
906e58ca
NC		 14119#undef bfd_elf32_bfd_link_hash_table_create
14120#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14121#undef elf_backend_special_sections
14122#define elf_backend_special_sections elf32_arm_symbian_special_sections
14123#undef elf_backend_begin_write_processing
14124#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14125#undef elf_backend_final_write_processing
14126#define elf_backend_final_write_processing elf32_arm_final_write_processing
14127
14128#undef elf_backend_modify_segment_map
7f266840
DJ		 14129#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14130
14131/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14132#undef elf_backend_got_header_size
7f266840
DJ		 14133#define elf_backend_got_header_size 0
14134
14135/* Similarly, there is no .got.plt section. */
906e58ca 14136#undef elf_backend_want_got_plt
7f266840
DJ		 14137#define elf_backend_want_got_plt 0
14138
906e58ca 14139#undef elf_backend_plt_sym_val
95720a86
DJ		 14140#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14141
906e58ca 14142#undef elf_backend_may_use_rel_p
00a97672 14143#define elf_backend_may_use_rel_p 1
906e58ca 14144#undef elf_backend_may_use_rela_p
00a97672 14145#define elf_backend_may_use_rela_p 0
906e58ca 14146#undef elf_backend_default_use_rela_p
00a97672 14147#define elf_backend_default_use_rela_p 0
906e58ca 14148#undef elf_backend_want_plt_sym
00a97672 14149#define elf_backend_want_plt_sym 0
906e58ca 14150#undef ELF_MAXPAGESIZE
00a97672 14151#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14152
7f266840 14153#include "elf32-target.h"
GDB Binutils - Deliverables
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