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2007-07-09 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
ab96bf03 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
d1f161ea 3 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
7f266840 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
00a97672 24#include "libiberty.h"
7f266840
DJ		 25#include "libbfd.h"
26#include "elf-bfd.h"
00a97672 27#include "elf-vxworks.h"
ee065d83 28#include "elf/arm.h"
7f266840
DJ		 29
30#ifndef NUM_ELEM
31#define NUM_ELEM(a) (sizeof (a) / (sizeof (a)[0]))
32#endif
33
00a97672
RS		 34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ		 60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
24718e3b 66static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 67
7f266840
DJ		 68/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
69 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
70 in that slot. */
71
c19d1205 72static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840
DJ		 73{
74 /* No relocation */
75 HOWTO (R_ARM_NONE, /* type */
76 0, /* rightshift */
77 0, /* size (0 = byte, 1 = short, 2 = long) */
78 0, /* bitsize */
79 FALSE, /* pc_relative */
80 0, /* bitpos */
81 complain_overflow_dont,/* complain_on_overflow */
82 bfd_elf_generic_reloc, /* special_function */
83 "R_ARM_NONE", /* name */
84 FALSE, /* partial_inplace */
85 0, /* src_mask */
86 0, /* dst_mask */
87 FALSE), /* pcrel_offset */
88
89 HOWTO (R_ARM_PC24, /* type */
90 2, /* rightshift */
91 2, /* size (0 = byte, 1 = short, 2 = long) */
92 24, /* bitsize */
93 TRUE, /* pc_relative */
94 0, /* bitpos */
95 complain_overflow_signed,/* complain_on_overflow */
96 bfd_elf_generic_reloc, /* special_function */
97 "R_ARM_PC24", /* name */
98 FALSE, /* partial_inplace */
99 0x00ffffff, /* src_mask */
100 0x00ffffff, /* dst_mask */
101 TRUE), /* pcrel_offset */
102
103 /* 32 bit absolute */
104 HOWTO (R_ARM_ABS32, /* type */
105 0, /* rightshift */
106 2, /* size (0 = byte, 1 = short, 2 = long) */
107 32, /* bitsize */
108 FALSE, /* pc_relative */
109 0, /* bitpos */
110 complain_overflow_bitfield,/* complain_on_overflow */
111 bfd_elf_generic_reloc, /* special_function */
112 "R_ARM_ABS32", /* name */
113 FALSE, /* partial_inplace */
114 0xffffffff, /* src_mask */
115 0xffffffff, /* dst_mask */
116 FALSE), /* pcrel_offset */
117
118 /* standard 32bit pc-relative reloc */
119 HOWTO (R_ARM_REL32, /* type */
120 0, /* rightshift */
121 2, /* size (0 = byte, 1 = short, 2 = long) */
122 32, /* bitsize */
123 TRUE, /* pc_relative */
124 0, /* bitpos */
125 complain_overflow_bitfield,/* complain_on_overflow */
126 bfd_elf_generic_reloc, /* special_function */
127 "R_ARM_REL32", /* name */
128 FALSE, /* partial_inplace */
129 0xffffffff, /* src_mask */
130 0xffffffff, /* dst_mask */
131 TRUE), /* pcrel_offset */
132
c19d1205 133 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 134 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 135 0, /* rightshift */
136 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 137 32, /* bitsize */
138 TRUE, /* pc_relative */
7f266840 139 0, /* bitpos */
4962c51a 140 complain_overflow_dont,/* complain_on_overflow */
7f266840 141 bfd_elf_generic_reloc, /* special_function */
4962c51a 142 "R_ARM_LDR_PC_G0", /* name */
7f266840 143 FALSE, /* partial_inplace */
4962c51a
MS		 144 0xffffffff, /* src_mask */
145 0xffffffff, /* dst_mask */
146 TRUE), /* pcrel_offset */
7f266840
DJ		 147
148 /* 16 bit absolute */
149 HOWTO (R_ARM_ABS16, /* type */
150 0, /* rightshift */
151 1, /* size (0 = byte, 1 = short, 2 = long) */
152 16, /* bitsize */
153 FALSE, /* pc_relative */
154 0, /* bitpos */
155 complain_overflow_bitfield,/* complain_on_overflow */
156 bfd_elf_generic_reloc, /* special_function */
157 "R_ARM_ABS16", /* name */
158 FALSE, /* partial_inplace */
159 0x0000ffff, /* src_mask */
160 0x0000ffff, /* dst_mask */
161 FALSE), /* pcrel_offset */
162
163 /* 12 bit absolute */
164 HOWTO (R_ARM_ABS12, /* type */
165 0, /* rightshift */
166 2, /* size (0 = byte, 1 = short, 2 = long) */
167 12, /* bitsize */
168 FALSE, /* pc_relative */
169 0, /* bitpos */
170 complain_overflow_bitfield,/* complain_on_overflow */
171 bfd_elf_generic_reloc, /* special_function */
172 "R_ARM_ABS12", /* name */
173 FALSE, /* partial_inplace */
00a97672
RS		 174 0x00000fff, /* src_mask */
175 0x00000fff, /* dst_mask */
7f266840
DJ		 176 FALSE), /* pcrel_offset */
177
178 HOWTO (R_ARM_THM_ABS5, /* type */
179 6, /* rightshift */
180 1, /* size (0 = byte, 1 = short, 2 = long) */
181 5, /* bitsize */
182 FALSE, /* pc_relative */
183 0, /* bitpos */
184 complain_overflow_bitfield,/* complain_on_overflow */
185 bfd_elf_generic_reloc, /* special_function */
186 "R_ARM_THM_ABS5", /* name */
187 FALSE, /* partial_inplace */
188 0x000007e0, /* src_mask */
189 0x000007e0, /* dst_mask */
190 FALSE), /* pcrel_offset */
191
192 /* 8 bit absolute */
193 HOWTO (R_ARM_ABS8, /* type */
194 0, /* rightshift */
195 0, /* size (0 = byte, 1 = short, 2 = long) */
196 8, /* bitsize */
197 FALSE, /* pc_relative */
198 0, /* bitpos */
199 complain_overflow_bitfield,/* complain_on_overflow */
200 bfd_elf_generic_reloc, /* special_function */
201 "R_ARM_ABS8", /* name */
202 FALSE, /* partial_inplace */
203 0x000000ff, /* src_mask */
204 0x000000ff, /* dst_mask */
205 FALSE), /* pcrel_offset */
206
207 HOWTO (R_ARM_SBREL32, /* type */
208 0, /* rightshift */
209 2, /* size (0 = byte, 1 = short, 2 = long) */
210 32, /* bitsize */
211 FALSE, /* pc_relative */
212 0, /* bitpos */
213 complain_overflow_dont,/* complain_on_overflow */
214 bfd_elf_generic_reloc, /* special_function */
215 "R_ARM_SBREL32", /* name */
216 FALSE, /* partial_inplace */
217 0xffffffff, /* src_mask */
218 0xffffffff, /* dst_mask */
219 FALSE), /* pcrel_offset */
220
c19d1205 221 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 222 1, /* rightshift */
223 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 224 25, /* bitsize */
7f266840
DJ		 225 TRUE, /* pc_relative */
226 0, /* bitpos */
227 complain_overflow_signed,/* complain_on_overflow */
228 bfd_elf_generic_reloc, /* special_function */
c19d1205 229 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 230 FALSE, /* partial_inplace */
231 0x07ff07ff, /* src_mask */
232 0x07ff07ff, /* dst_mask */
233 TRUE), /* pcrel_offset */
234
235 HOWTO (R_ARM_THM_PC8, /* type */
236 1, /* rightshift */
237 1, /* size (0 = byte, 1 = short, 2 = long) */
238 8, /* bitsize */
239 TRUE, /* pc_relative */
240 0, /* bitpos */
241 complain_overflow_signed,/* complain_on_overflow */
242 bfd_elf_generic_reloc, /* special_function */
243 "R_ARM_THM_PC8", /* name */
244 FALSE, /* partial_inplace */
245 0x000000ff, /* src_mask */
246 0x000000ff, /* dst_mask */
247 TRUE), /* pcrel_offset */
248
c19d1205 249 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 250 1, /* rightshift */
251 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 252 32, /* bitsize */
253 FALSE, /* pc_relative */
7f266840
DJ		 254 0, /* bitpos */
255 complain_overflow_signed,/* complain_on_overflow */
256 bfd_elf_generic_reloc, /* special_function */
c19d1205 257 "R_ARM_BREL_ADJ", /* name */
7f266840 258 FALSE, /* partial_inplace */
c19d1205
ZW		 259 0xffffffff, /* src_mask */
260 0xffffffff, /* dst_mask */
261 FALSE), /* pcrel_offset */
7f266840
DJ		 262
263 HOWTO (R_ARM_SWI24, /* type */
264 0, /* rightshift */
265 0, /* size (0 = byte, 1 = short, 2 = long) */
266 0, /* bitsize */
267 FALSE, /* pc_relative */
268 0, /* bitpos */
269 complain_overflow_signed,/* complain_on_overflow */
270 bfd_elf_generic_reloc, /* special_function */
271 "R_ARM_SWI24", /* name */
272 FALSE, /* partial_inplace */
273 0x00000000, /* src_mask */
274 0x00000000, /* dst_mask */
275 FALSE), /* pcrel_offset */
276
277 HOWTO (R_ARM_THM_SWI8, /* type */
278 0, /* rightshift */
279 0, /* size (0 = byte, 1 = short, 2 = long) */
280 0, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_signed,/* complain_on_overflow */
284 bfd_elf_generic_reloc, /* special_function */
285 "R_ARM_SWI8", /* name */
286 FALSE, /* partial_inplace */
287 0x00000000, /* src_mask */
288 0x00000000, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* BLX instruction for the ARM. */
292 HOWTO (R_ARM_XPC25, /* type */
293 2, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 25, /* bitsize */
296 TRUE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_signed,/* complain_on_overflow */
299 bfd_elf_generic_reloc, /* special_function */
300 "R_ARM_XPC25", /* name */
301 FALSE, /* partial_inplace */
302 0x00ffffff, /* src_mask */
303 0x00ffffff, /* dst_mask */
304 TRUE), /* pcrel_offset */
305
306 /* BLX instruction for the Thumb. */
307 HOWTO (R_ARM_THM_XPC22, /* type */
308 2, /* rightshift */
309 2, /* size (0 = byte, 1 = short, 2 = long) */
310 22, /* bitsize */
311 TRUE, /* pc_relative */
312 0, /* bitpos */
313 complain_overflow_signed,/* complain_on_overflow */
314 bfd_elf_generic_reloc, /* special_function */
315 "R_ARM_THM_XPC22", /* name */
316 FALSE, /* partial_inplace */
317 0x07ff07ff, /* src_mask */
318 0x07ff07ff, /* dst_mask */
319 TRUE), /* pcrel_offset */
320
ba93b8ac 321 /* Dynamic TLS relocations. */
7f266840 322
ba93b8ac
DJ		 323 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
324 0, /* rightshift */
325 2, /* size (0 = byte, 1 = short, 2 = long) */
326 32, /* bitsize */
327 FALSE, /* pc_relative */
328 0, /* bitpos */
329 complain_overflow_bitfield,/* complain_on_overflow */
330 bfd_elf_generic_reloc, /* special_function */
331 "R_ARM_TLS_DTPMOD32", /* name */
332 TRUE, /* partial_inplace */
333 0xffffffff, /* src_mask */
334 0xffffffff, /* dst_mask */
335 FALSE), /* pcrel_offset */
7f266840 336
ba93b8ac
DJ		 337 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
338 0, /* rightshift */
339 2, /* size (0 = byte, 1 = short, 2 = long) */
340 32, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield,/* complain_on_overflow */
344 bfd_elf_generic_reloc, /* special_function */
345 "R_ARM_TLS_DTPOFF32", /* name */
346 TRUE, /* partial_inplace */
347 0xffffffff, /* src_mask */
348 0xffffffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
7f266840 350
ba93b8ac
DJ		 351 HOWTO (R_ARM_TLS_TPOFF32, /* type */
352 0, /* rightshift */
353 2, /* size (0 = byte, 1 = short, 2 = long) */
354 32, /* bitsize */
355 FALSE, /* pc_relative */
356 0, /* bitpos */
357 complain_overflow_bitfield,/* complain_on_overflow */
358 bfd_elf_generic_reloc, /* special_function */
359 "R_ARM_TLS_TPOFF32", /* name */
360 TRUE, /* partial_inplace */
361 0xffffffff, /* src_mask */
362 0xffffffff, /* dst_mask */
363 FALSE), /* pcrel_offset */
7f266840
DJ		 364
365 /* Relocs used in ARM Linux */
366
367 HOWTO (R_ARM_COPY, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 32, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_bitfield,/* complain_on_overflow */
374 bfd_elf_generic_reloc, /* special_function */
375 "R_ARM_COPY", /* name */
376 TRUE, /* partial_inplace */
377 0xffffffff, /* src_mask */
378 0xffffffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 HOWTO (R_ARM_GLOB_DAT, /* type */
382 0, /* rightshift */
383 2, /* size (0 = byte, 1 = short, 2 = long) */
384 32, /* bitsize */
385 FALSE, /* pc_relative */
386 0, /* bitpos */
387 complain_overflow_bitfield,/* complain_on_overflow */
388 bfd_elf_generic_reloc, /* special_function */
389 "R_ARM_GLOB_DAT", /* name */
390 TRUE, /* partial_inplace */
391 0xffffffff, /* src_mask */
392 0xffffffff, /* dst_mask */
393 FALSE), /* pcrel_offset */
394
395 HOWTO (R_ARM_JUMP_SLOT, /* type */
396 0, /* rightshift */
397 2, /* size (0 = byte, 1 = short, 2 = long) */
398 32, /* bitsize */
399 FALSE, /* pc_relative */
400 0, /* bitpos */
401 complain_overflow_bitfield,/* complain_on_overflow */
402 bfd_elf_generic_reloc, /* special_function */
403 "R_ARM_JUMP_SLOT", /* name */
404 TRUE, /* partial_inplace */
405 0xffffffff, /* src_mask */
406 0xffffffff, /* dst_mask */
407 FALSE), /* pcrel_offset */
408
409 HOWTO (R_ARM_RELATIVE, /* type */
410 0, /* rightshift */
411 2, /* size (0 = byte, 1 = short, 2 = long) */
412 32, /* bitsize */
413 FALSE, /* pc_relative */
414 0, /* bitpos */
415 complain_overflow_bitfield,/* complain_on_overflow */
416 bfd_elf_generic_reloc, /* special_function */
417 "R_ARM_RELATIVE", /* name */
418 TRUE, /* partial_inplace */
419 0xffffffff, /* src_mask */
420 0xffffffff, /* dst_mask */
421 FALSE), /* pcrel_offset */
422
c19d1205 423 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 424 0, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 32, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_bitfield,/* complain_on_overflow */
430 bfd_elf_generic_reloc, /* special_function */
c19d1205 431 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 432 TRUE, /* partial_inplace */
433 0xffffffff, /* src_mask */
434 0xffffffff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 HOWTO (R_ARM_GOTPC, /* type */
438 0, /* rightshift */
439 2, /* size (0 = byte, 1 = short, 2 = long) */
440 32, /* bitsize */
441 TRUE, /* pc_relative */
442 0, /* bitpos */
443 complain_overflow_bitfield,/* complain_on_overflow */
444 bfd_elf_generic_reloc, /* special_function */
445 "R_ARM_GOTPC", /* name */
446 TRUE, /* partial_inplace */
447 0xffffffff, /* src_mask */
448 0xffffffff, /* dst_mask */
449 TRUE), /* pcrel_offset */
450
451 HOWTO (R_ARM_GOT32, /* type */
452 0, /* rightshift */
453 2, /* size (0 = byte, 1 = short, 2 = long) */
454 32, /* bitsize */
455 FALSE, /* pc_relative */
456 0, /* bitpos */
457 complain_overflow_bitfield,/* complain_on_overflow */
458 bfd_elf_generic_reloc, /* special_function */
459 "R_ARM_GOT32", /* name */
460 TRUE, /* partial_inplace */
461 0xffffffff, /* src_mask */
462 0xffffffff, /* dst_mask */
463 FALSE), /* pcrel_offset */
464
465 HOWTO (R_ARM_PLT32, /* type */
466 2, /* rightshift */
467 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 468 24, /* bitsize */
7f266840
DJ		 469 TRUE, /* pc_relative */
470 0, /* bitpos */
471 complain_overflow_bitfield,/* complain_on_overflow */
472 bfd_elf_generic_reloc, /* special_function */
473 "R_ARM_PLT32", /* name */
ce490eda 474 FALSE, /* partial_inplace */
7f266840
DJ		 475 0x00ffffff, /* src_mask */
476 0x00ffffff, /* dst_mask */
477 TRUE), /* pcrel_offset */
478
479 HOWTO (R_ARM_CALL, /* type */
480 2, /* rightshift */
481 2, /* size (0 = byte, 1 = short, 2 = long) */
482 24, /* bitsize */
483 TRUE, /* pc_relative */
484 0, /* bitpos */
485 complain_overflow_signed,/* complain_on_overflow */
486 bfd_elf_generic_reloc, /* special_function */
487 "R_ARM_CALL", /* name */
488 FALSE, /* partial_inplace */
489 0x00ffffff, /* src_mask */
490 0x00ffffff, /* dst_mask */
491 TRUE), /* pcrel_offset */
492
493 HOWTO (R_ARM_JUMP24, /* type */
494 2, /* rightshift */
495 2, /* size (0 = byte, 1 = short, 2 = long) */
496 24, /* bitsize */
497 TRUE, /* pc_relative */
498 0, /* bitpos */
499 complain_overflow_signed,/* complain_on_overflow */
500 bfd_elf_generic_reloc, /* special_function */
501 "R_ARM_JUMP24", /* name */
502 FALSE, /* partial_inplace */
503 0x00ffffff, /* src_mask */
504 0x00ffffff, /* dst_mask */
505 TRUE), /* pcrel_offset */
506
c19d1205
ZW		 507 HOWTO (R_ARM_THM_JUMP24, /* type */
508 1, /* rightshift */
509 2, /* size (0 = byte, 1 = short, 2 = long) */
510 24, /* bitsize */
511 TRUE, /* pc_relative */
7f266840 512 0, /* bitpos */
c19d1205 513 complain_overflow_signed,/* complain_on_overflow */
7f266840 514 bfd_elf_generic_reloc, /* special_function */
c19d1205 515 "R_ARM_THM_JUMP24", /* name */
7f266840 516 FALSE, /* partial_inplace */
c19d1205
ZW		 517 0x07ff2fff, /* src_mask */
518 0x07ff2fff, /* dst_mask */
519 TRUE), /* pcrel_offset */
7f266840 520
c19d1205 521 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 522 0, /* rightshift */
c19d1205
ZW		 523 2, /* size (0 = byte, 1 = short, 2 = long) */
524 32, /* bitsize */
7f266840
DJ		 525 FALSE, /* pc_relative */
526 0, /* bitpos */
527 complain_overflow_dont,/* complain_on_overflow */
528 bfd_elf_generic_reloc, /* special_function */
c19d1205 529 "R_ARM_BASE_ABS", /* name */
7f266840 530 FALSE, /* partial_inplace */
c19d1205
ZW		 531 0xffffffff, /* src_mask */
532 0xffffffff, /* dst_mask */
7f266840
DJ		 533 FALSE), /* pcrel_offset */
534
535 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
536 0, /* rightshift */
537 2, /* size (0 = byte, 1 = short, 2 = long) */
538 12, /* bitsize */
539 TRUE, /* pc_relative */
540 0, /* bitpos */
541 complain_overflow_dont,/* complain_on_overflow */
542 bfd_elf_generic_reloc, /* special_function */
543 "R_ARM_ALU_PCREL_7_0", /* name */
544 FALSE, /* partial_inplace */
545 0x00000fff, /* src_mask */
546 0x00000fff, /* dst_mask */
547 TRUE), /* pcrel_offset */
548
549 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
550 0, /* rightshift */
551 2, /* size (0 = byte, 1 = short, 2 = long) */
552 12, /* bitsize */
553 TRUE, /* pc_relative */
554 8, /* bitpos */
555 complain_overflow_dont,/* complain_on_overflow */
556 bfd_elf_generic_reloc, /* special_function */
557 "R_ARM_ALU_PCREL_15_8",/* name */
558 FALSE, /* partial_inplace */
559 0x00000fff, /* src_mask */
560 0x00000fff, /* dst_mask */
561 TRUE), /* pcrel_offset */
562
563 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
564 0, /* rightshift */
565 2, /* size (0 = byte, 1 = short, 2 = long) */
566 12, /* bitsize */
567 TRUE, /* pc_relative */
568 16, /* bitpos */
569 complain_overflow_dont,/* complain_on_overflow */
570 bfd_elf_generic_reloc, /* special_function */
571 "R_ARM_ALU_PCREL_23_15",/* name */
572 FALSE, /* partial_inplace */
573 0x00000fff, /* src_mask */
574 0x00000fff, /* dst_mask */
575 TRUE), /* pcrel_offset */
576
577 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
578 0, /* rightshift */
579 2, /* size (0 = byte, 1 = short, 2 = long) */
580 12, /* bitsize */
581 FALSE, /* pc_relative */
582 0, /* bitpos */
583 complain_overflow_dont,/* complain_on_overflow */
584 bfd_elf_generic_reloc, /* special_function */
585 "R_ARM_LDR_SBREL_11_0",/* name */
586 FALSE, /* partial_inplace */
587 0x00000fff, /* src_mask */
588 0x00000fff, /* dst_mask */
589 FALSE), /* pcrel_offset */
590
591 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
592 0, /* rightshift */
593 2, /* size (0 = byte, 1 = short, 2 = long) */
594 8, /* bitsize */
595 FALSE, /* pc_relative */
596 12, /* bitpos */
597 complain_overflow_dont,/* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
599 "R_ARM_ALU_SBREL_19_12",/* name */
600 FALSE, /* partial_inplace */
601 0x000ff000, /* src_mask */
602 0x000ff000, /* dst_mask */
603 FALSE), /* pcrel_offset */
604
605 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 8, /* bitsize */
609 FALSE, /* pc_relative */
610 20, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 bfd_elf_generic_reloc, /* special_function */
613 "R_ARM_ALU_SBREL_27_20",/* name */
614 FALSE, /* partial_inplace */
615 0x0ff00000, /* src_mask */
616 0x0ff00000, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 HOWTO (R_ARM_TARGET1, /* type */
620 0, /* rightshift */
621 2, /* size (0 = byte, 1 = short, 2 = long) */
622 32, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_dont,/* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_ARM_TARGET1", /* name */
628 FALSE, /* partial_inplace */
629 0xffffffff, /* src_mask */
630 0xffffffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 HOWTO (R_ARM_ROSEGREL32, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_dont,/* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_ARM_ROSEGREL32", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 HOWTO (R_ARM_V4BX, /* type */
648 0, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 32, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_ARM_V4BX", /* name */
656 FALSE, /* partial_inplace */
657 0xffffffff, /* src_mask */
658 0xffffffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 HOWTO (R_ARM_TARGET2, /* type */
662 0, /* rightshift */
663 2, /* size (0 = byte, 1 = short, 2 = long) */
664 32, /* bitsize */
665 FALSE, /* pc_relative */
666 0, /* bitpos */
667 complain_overflow_signed,/* complain_on_overflow */
668 bfd_elf_generic_reloc, /* special_function */
669 "R_ARM_TARGET2", /* name */
670 FALSE, /* partial_inplace */
671 0xffffffff, /* src_mask */
672 0xffffffff, /* dst_mask */
673 TRUE), /* pcrel_offset */
674
675 HOWTO (R_ARM_PREL31, /* type */
676 0, /* rightshift */
677 2, /* size (0 = byte, 1 = short, 2 = long) */
678 31, /* bitsize */
679 TRUE, /* pc_relative */
680 0, /* bitpos */
681 complain_overflow_signed,/* complain_on_overflow */
682 bfd_elf_generic_reloc, /* special_function */
683 "R_ARM_PREL31", /* name */
684 FALSE, /* partial_inplace */
685 0x7fffffff, /* src_mask */
686 0x7fffffff, /* dst_mask */
687 TRUE), /* pcrel_offset */
c19d1205
ZW		 688
689 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
690 0, /* rightshift */
691 2, /* size (0 = byte, 1 = short, 2 = long) */
692 16, /* bitsize */
693 FALSE, /* pc_relative */
694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_ARM_MOVW_ABS_NC", /* name */
698 FALSE, /* partial_inplace */
699 0x0000ffff, /* src_mask */
700 0x0000ffff, /* dst_mask */
701 FALSE), /* pcrel_offset */
702
703 HOWTO (R_ARM_MOVT_ABS, /* type */
704 0, /* rightshift */
705 2, /* size (0 = byte, 1 = short, 2 = long) */
706 16, /* bitsize */
707 FALSE, /* pc_relative */
708 0, /* bitpos */
709 complain_overflow_bitfield,/* complain_on_overflow */
710 bfd_elf_generic_reloc, /* special_function */
711 "R_ARM_MOVT_ABS", /* name */
712 FALSE, /* partial_inplace */
713 0x0000ffff, /* src_mask */
714 0x0000ffff, /* dst_mask */
715 FALSE), /* pcrel_offset */
716
717 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
718 0, /* rightshift */
719 2, /* size (0 = byte, 1 = short, 2 = long) */
720 16, /* bitsize */
721 TRUE, /* pc_relative */
722 0, /* bitpos */
723 complain_overflow_dont,/* complain_on_overflow */
724 bfd_elf_generic_reloc, /* special_function */
725 "R_ARM_MOVW_PREL_NC", /* name */
726 FALSE, /* partial_inplace */
727 0x0000ffff, /* src_mask */
728 0x0000ffff, /* dst_mask */
729 TRUE), /* pcrel_offset */
730
731 HOWTO (R_ARM_MOVT_PREL, /* type */
732 0, /* rightshift */
733 2, /* size (0 = byte, 1 = short, 2 = long) */
734 16, /* bitsize */
735 TRUE, /* pc_relative */
736 0, /* bitpos */
737 complain_overflow_bitfield,/* complain_on_overflow */
738 bfd_elf_generic_reloc, /* special_function */
739 "R_ARM_MOVT_PREL", /* name */
740 FALSE, /* partial_inplace */
741 0x0000ffff, /* src_mask */
742 0x0000ffff, /* dst_mask */
743 TRUE), /* pcrel_offset */
744
745 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
746 0, /* rightshift */
747 2, /* size (0 = byte, 1 = short, 2 = long) */
748 16, /* bitsize */
749 FALSE, /* pc_relative */
750 0, /* bitpos */
751 complain_overflow_dont,/* complain_on_overflow */
752 bfd_elf_generic_reloc, /* special_function */
753 "R_ARM_THM_MOVW_ABS_NC",/* name */
754 FALSE, /* partial_inplace */
755 0x040f70ff, /* src_mask */
756 0x040f70ff, /* dst_mask */
757 FALSE), /* pcrel_offset */
758
759 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
760 0, /* rightshift */
761 2, /* size (0 = byte, 1 = short, 2 = long) */
762 16, /* bitsize */
763 FALSE, /* pc_relative */
764 0, /* bitpos */
765 complain_overflow_bitfield,/* complain_on_overflow */
766 bfd_elf_generic_reloc, /* special_function */
767 "R_ARM_THM_MOVT_ABS", /* name */
768 FALSE, /* partial_inplace */
769 0x040f70ff, /* src_mask */
770 0x040f70ff, /* dst_mask */
771 FALSE), /* pcrel_offset */
772
773 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
774 0, /* rightshift */
775 2, /* size (0 = byte, 1 = short, 2 = long) */
776 16, /* bitsize */
777 TRUE, /* pc_relative */
778 0, /* bitpos */
779 complain_overflow_dont,/* complain_on_overflow */
780 bfd_elf_generic_reloc, /* special_function */
781 "R_ARM_THM_MOVW_PREL_NC",/* name */
782 FALSE, /* partial_inplace */
783 0x040f70ff, /* src_mask */
784 0x040f70ff, /* dst_mask */
785 TRUE), /* pcrel_offset */
786
787 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
788 0, /* rightshift */
789 2, /* size (0 = byte, 1 = short, 2 = long) */
790 16, /* bitsize */
791 TRUE, /* pc_relative */
792 0, /* bitpos */
793 complain_overflow_bitfield,/* complain_on_overflow */
794 bfd_elf_generic_reloc, /* special_function */
795 "R_ARM_THM_MOVT_PREL", /* name */
796 FALSE, /* partial_inplace */
797 0x040f70ff, /* src_mask */
798 0x040f70ff, /* dst_mask */
799 TRUE), /* pcrel_offset */
800
801 HOWTO (R_ARM_THM_JUMP19, /* type */
802 1, /* rightshift */
803 2, /* size (0 = byte, 1 = short, 2 = long) */
804 19, /* bitsize */
805 TRUE, /* pc_relative */
806 0, /* bitpos */
807 complain_overflow_signed,/* complain_on_overflow */
808 bfd_elf_generic_reloc, /* special_function */
809 "R_ARM_THM_JUMP19", /* name */
810 FALSE, /* partial_inplace */
811 0x043f2fff, /* src_mask */
812 0x043f2fff, /* dst_mask */
813 TRUE), /* pcrel_offset */
814
815 HOWTO (R_ARM_THM_JUMP6, /* type */
816 1, /* rightshift */
817 1, /* size (0 = byte, 1 = short, 2 = long) */
818 6, /* bitsize */
819 TRUE, /* pc_relative */
820 0, /* bitpos */
821 complain_overflow_unsigned,/* complain_on_overflow */
822 bfd_elf_generic_reloc, /* special_function */
823 "R_ARM_THM_JUMP6", /* name */
824 FALSE, /* partial_inplace */
825 0x02f8, /* src_mask */
826 0x02f8, /* dst_mask */
827 TRUE), /* pcrel_offset */
828
829 /* These are declared as 13-bit signed relocations because we can
830 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
831 versa. */
832 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
833 0, /* rightshift */
834 2, /* size (0 = byte, 1 = short, 2 = long) */
835 13, /* bitsize */
836 TRUE, /* pc_relative */
837 0, /* bitpos */
2cab6cc3 838 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 839 bfd_elf_generic_reloc, /* special_function */
840 "R_ARM_THM_ALU_PREL_11_0",/* name */
841 FALSE, /* partial_inplace */
2cab6cc3
MS		 842 0xffffffff, /* src_mask */
843 0xffffffff, /* dst_mask */
c19d1205
ZW		 844 TRUE), /* pcrel_offset */
845
846 HOWTO (R_ARM_THM_PC12, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 13, /* bitsize */
850 TRUE, /* pc_relative */
851 0, /* bitpos */
2cab6cc3 852 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 853 bfd_elf_generic_reloc, /* special_function */
854 "R_ARM_THM_PC12", /* name */
855 FALSE, /* partial_inplace */
2cab6cc3
MS		 856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
c19d1205
ZW		 858 TRUE), /* pcrel_offset */
859
860 HOWTO (R_ARM_ABS32_NOI, /* type */
861 0, /* rightshift */
862 2, /* size (0 = byte, 1 = short, 2 = long) */
863 32, /* bitsize */
864 FALSE, /* pc_relative */
865 0, /* bitpos */
866 complain_overflow_dont,/* complain_on_overflow */
867 bfd_elf_generic_reloc, /* special_function */
868 "R_ARM_ABS32_NOI", /* name */
869 FALSE, /* partial_inplace */
870 0xffffffff, /* src_mask */
871 0xffffffff, /* dst_mask */
872 FALSE), /* pcrel_offset */
873
874 HOWTO (R_ARM_REL32_NOI, /* type */
875 0, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 32, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_dont,/* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 "R_ARM_REL32_NOI", /* name */
883 FALSE, /* partial_inplace */
884 0xffffffff, /* src_mask */
885 0xffffffff, /* dst_mask */
886 FALSE), /* pcrel_offset */
7f266840 887
4962c51a
MS		 888 /* Group relocations. */
889
890 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
891 0, /* rightshift */
892 2, /* size (0 = byte, 1 = short, 2 = long) */
893 32, /* bitsize */
894 TRUE, /* pc_relative */
895 0, /* bitpos */
896 complain_overflow_dont,/* complain_on_overflow */
897 bfd_elf_generic_reloc, /* special_function */
898 "R_ARM_ALU_PC_G0_NC", /* name */
899 FALSE, /* partial_inplace */
900 0xffffffff, /* src_mask */
901 0xffffffff, /* dst_mask */
902 TRUE), /* pcrel_offset */
903
904 HOWTO (R_ARM_ALU_PC_G0, /* type */
905 0, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 32, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_dont,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_ARM_ALU_PC_G0", /* name */
913 FALSE, /* partial_inplace */
914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
919 0, /* rightshift */
920 2, /* size (0 = byte, 1 = short, 2 = long) */
921 32, /* bitsize */
922 TRUE, /* pc_relative */
923 0, /* bitpos */
924 complain_overflow_dont,/* complain_on_overflow */
925 bfd_elf_generic_reloc, /* special_function */
926 "R_ARM_ALU_PC_G1_NC", /* name */
927 FALSE, /* partial_inplace */
928 0xffffffff, /* src_mask */
929 0xffffffff, /* dst_mask */
930 TRUE), /* pcrel_offset */
931
932 HOWTO (R_ARM_ALU_PC_G1, /* type */
933 0, /* rightshift */
934 2, /* size (0 = byte, 1 = short, 2 = long) */
935 32, /* bitsize */
936 TRUE, /* pc_relative */
937 0, /* bitpos */
938 complain_overflow_dont,/* complain_on_overflow */
939 bfd_elf_generic_reloc, /* special_function */
940 "R_ARM_ALU_PC_G1", /* name */
941 FALSE, /* partial_inplace */
942 0xffffffff, /* src_mask */
943 0xffffffff, /* dst_mask */
944 TRUE), /* pcrel_offset */
945
946 HOWTO (R_ARM_ALU_PC_G2, /* type */
947 0, /* rightshift */
948 2, /* size (0 = byte, 1 = short, 2 = long) */
949 32, /* bitsize */
950 TRUE, /* pc_relative */
951 0, /* bitpos */
952 complain_overflow_dont,/* complain_on_overflow */
953 bfd_elf_generic_reloc, /* special_function */
954 "R_ARM_ALU_PC_G2", /* name */
955 FALSE, /* partial_inplace */
956 0xffffffff, /* src_mask */
957 0xffffffff, /* dst_mask */
958 TRUE), /* pcrel_offset */
959
960 HOWTO (R_ARM_LDR_PC_G1, /* type */
961 0, /* rightshift */
962 2, /* size (0 = byte, 1 = short, 2 = long) */
963 32, /* bitsize */
964 TRUE, /* pc_relative */
965 0, /* bitpos */
966 complain_overflow_dont,/* complain_on_overflow */
967 bfd_elf_generic_reloc, /* special_function */
968 "R_ARM_LDR_PC_G1", /* name */
969 FALSE, /* partial_inplace */
970 0xffffffff, /* src_mask */
971 0xffffffff, /* dst_mask */
972 TRUE), /* pcrel_offset */
973
974 HOWTO (R_ARM_LDR_PC_G2, /* type */
975 0, /* rightshift */
976 2, /* size (0 = byte, 1 = short, 2 = long) */
977 32, /* bitsize */
978 TRUE, /* pc_relative */
979 0, /* bitpos */
980 complain_overflow_dont,/* complain_on_overflow */
981 bfd_elf_generic_reloc, /* special_function */
982 "R_ARM_LDR_PC_G2", /* name */
983 FALSE, /* partial_inplace */
984 0xffffffff, /* src_mask */
985 0xffffffff, /* dst_mask */
986 TRUE), /* pcrel_offset */
987
988 HOWTO (R_ARM_LDRS_PC_G0, /* type */
989 0, /* rightshift */
990 2, /* size (0 = byte, 1 = short, 2 = long) */
991 32, /* bitsize */
992 TRUE, /* pc_relative */
993 0, /* bitpos */
994 complain_overflow_dont,/* complain_on_overflow */
995 bfd_elf_generic_reloc, /* special_function */
996 "R_ARM_LDRS_PC_G0", /* name */
997 FALSE, /* partial_inplace */
998 0xffffffff, /* src_mask */
999 0xffffffff, /* dst_mask */
1000 TRUE), /* pcrel_offset */
1001
1002 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1003 0, /* rightshift */
1004 2, /* size (0 = byte, 1 = short, 2 = long) */
1005 32, /* bitsize */
1006 TRUE, /* pc_relative */
1007 0, /* bitpos */
1008 complain_overflow_dont,/* complain_on_overflow */
1009 bfd_elf_generic_reloc, /* special_function */
1010 "R_ARM_LDRS_PC_G1", /* name */
1011 FALSE, /* partial_inplace */
1012 0xffffffff, /* src_mask */
1013 0xffffffff, /* dst_mask */
1014 TRUE), /* pcrel_offset */
1015
1016 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1017 0, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 32, /* bitsize */
1020 TRUE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_ARM_LDRS_PC_G2", /* name */
1025 FALSE, /* partial_inplace */
1026 0xffffffff, /* src_mask */
1027 0xffffffff, /* dst_mask */
1028 TRUE), /* pcrel_offset */
1029
1030 HOWTO (R_ARM_LDC_PC_G0, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 32, /* bitsize */
1034 TRUE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_ARM_LDC_PC_G0", /* name */
1039 FALSE, /* partial_inplace */
1040 0xffffffff, /* src_mask */
1041 0xffffffff, /* dst_mask */
1042 TRUE), /* pcrel_offset */
1043
1044 HOWTO (R_ARM_LDC_PC_G1, /* type */
1045 0, /* rightshift */
1046 2, /* size (0 = byte, 1 = short, 2 = long) */
1047 32, /* bitsize */
1048 TRUE, /* pc_relative */
1049 0, /* bitpos */
1050 complain_overflow_dont,/* complain_on_overflow */
1051 bfd_elf_generic_reloc, /* special_function */
1052 "R_ARM_LDC_PC_G1", /* name */
1053 FALSE, /* partial_inplace */
1054 0xffffffff, /* src_mask */
1055 0xffffffff, /* dst_mask */
1056 TRUE), /* pcrel_offset */
1057
1058 HOWTO (R_ARM_LDC_PC_G2, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 32, /* bitsize */
1062 TRUE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont,/* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_ARM_LDC_PC_G2", /* name */
1067 FALSE, /* partial_inplace */
1068 0xffffffff, /* src_mask */
1069 0xffffffff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 TRUE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_ARM_ALU_SB_G0_NC", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 TRUE), /* pcrel_offset */
1085
1086 HOWTO (R_ARM_ALU_SB_G0, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 32, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_ARM_ALU_SB_G0", /* name */
1095 FALSE, /* partial_inplace */
1096 0xffffffff, /* src_mask */
1097 0xffffffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1101 0, /* rightshift */
1102 2, /* size (0 = byte, 1 = short, 2 = long) */
1103 32, /* bitsize */
1104 TRUE, /* pc_relative */
1105 0, /* bitpos */
1106 complain_overflow_dont,/* complain_on_overflow */
1107 bfd_elf_generic_reloc, /* special_function */
1108 "R_ARM_ALU_SB_G1_NC", /* name */
1109 FALSE, /* partial_inplace */
1110 0xffffffff, /* src_mask */
1111 0xffffffff, /* dst_mask */
1112 TRUE), /* pcrel_offset */
1113
1114 HOWTO (R_ARM_ALU_SB_G1, /* type */
1115 0, /* rightshift */
1116 2, /* size (0 = byte, 1 = short, 2 = long) */
1117 32, /* bitsize */
1118 TRUE, /* pc_relative */
1119 0, /* bitpos */
1120 complain_overflow_dont,/* complain_on_overflow */
1121 bfd_elf_generic_reloc, /* special_function */
1122 "R_ARM_ALU_SB_G1", /* name */
1123 FALSE, /* partial_inplace */
1124 0xffffffff, /* src_mask */
1125 0xffffffff, /* dst_mask */
1126 TRUE), /* pcrel_offset */
1127
1128 HOWTO (R_ARM_ALU_SB_G2, /* type */
1129 0, /* rightshift */
1130 2, /* size (0 = byte, 1 = short, 2 = long) */
1131 32, /* bitsize */
1132 TRUE, /* pc_relative */
1133 0, /* bitpos */
1134 complain_overflow_dont,/* complain_on_overflow */
1135 bfd_elf_generic_reloc, /* special_function */
1136 "R_ARM_ALU_SB_G2", /* name */
1137 FALSE, /* partial_inplace */
1138 0xffffffff, /* src_mask */
1139 0xffffffff, /* dst_mask */
1140 TRUE), /* pcrel_offset */
1141
1142 HOWTO (R_ARM_LDR_SB_G0, /* type */
1143 0, /* rightshift */
1144 2, /* size (0 = byte, 1 = short, 2 = long) */
1145 32, /* bitsize */
1146 TRUE, /* pc_relative */
1147 0, /* bitpos */
1148 complain_overflow_dont,/* complain_on_overflow */
1149 bfd_elf_generic_reloc, /* special_function */
1150 "R_ARM_LDR_SB_G0", /* name */
1151 FALSE, /* partial_inplace */
1152 0xffffffff, /* src_mask */
1153 0xffffffff, /* dst_mask */
1154 TRUE), /* pcrel_offset */
1155
1156 HOWTO (R_ARM_LDR_SB_G1, /* type */
1157 0, /* rightshift */
1158 2, /* size (0 = byte, 1 = short, 2 = long) */
1159 32, /* bitsize */
1160 TRUE, /* pc_relative */
1161 0, /* bitpos */
1162 complain_overflow_dont,/* complain_on_overflow */
1163 bfd_elf_generic_reloc, /* special_function */
1164 "R_ARM_LDR_SB_G1", /* name */
1165 FALSE, /* partial_inplace */
1166 0xffffffff, /* src_mask */
1167 0xffffffff, /* dst_mask */
1168 TRUE), /* pcrel_offset */
1169
1170 HOWTO (R_ARM_LDR_SB_G2, /* type */
1171 0, /* rightshift */
1172 2, /* size (0 = byte, 1 = short, 2 = long) */
1173 32, /* bitsize */
1174 TRUE, /* pc_relative */
1175 0, /* bitpos */
1176 complain_overflow_dont,/* complain_on_overflow */
1177 bfd_elf_generic_reloc, /* special_function */
1178 "R_ARM_LDR_SB_G2", /* name */
1179 FALSE, /* partial_inplace */
1180 0xffffffff, /* src_mask */
1181 0xffffffff, /* dst_mask */
1182 TRUE), /* pcrel_offset */
1183
1184 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1185 0, /* rightshift */
1186 2, /* size (0 = byte, 1 = short, 2 = long) */
1187 32, /* bitsize */
1188 TRUE, /* pc_relative */
1189 0, /* bitpos */
1190 complain_overflow_dont,/* complain_on_overflow */
1191 bfd_elf_generic_reloc, /* special_function */
1192 "R_ARM_LDRS_SB_G0", /* name */
1193 FALSE, /* partial_inplace */
1194 0xffffffff, /* src_mask */
1195 0xffffffff, /* dst_mask */
1196 TRUE), /* pcrel_offset */
1197
1198 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1199 0, /* rightshift */
1200 2, /* size (0 = byte, 1 = short, 2 = long) */
1201 32, /* bitsize */
1202 TRUE, /* pc_relative */
1203 0, /* bitpos */
1204 complain_overflow_dont,/* complain_on_overflow */
1205 bfd_elf_generic_reloc, /* special_function */
1206 "R_ARM_LDRS_SB_G1", /* name */
1207 FALSE, /* partial_inplace */
1208 0xffffffff, /* src_mask */
1209 0xffffffff, /* dst_mask */
1210 TRUE), /* pcrel_offset */
1211
1212 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1213 0, /* rightshift */
1214 2, /* size (0 = byte, 1 = short, 2 = long) */
1215 32, /* bitsize */
1216 TRUE, /* pc_relative */
1217 0, /* bitpos */
1218 complain_overflow_dont,/* complain_on_overflow */
1219 bfd_elf_generic_reloc, /* special_function */
1220 "R_ARM_LDRS_SB_G2", /* name */
1221 FALSE, /* partial_inplace */
1222 0xffffffff, /* src_mask */
1223 0xffffffff, /* dst_mask */
1224 TRUE), /* pcrel_offset */
1225
1226 HOWTO (R_ARM_LDC_SB_G0, /* type */
1227 0, /* rightshift */
1228 2, /* size (0 = byte, 1 = short, 2 = long) */
1229 32, /* bitsize */
1230 TRUE, /* pc_relative */
1231 0, /* bitpos */
1232 complain_overflow_dont,/* complain_on_overflow */
1233 bfd_elf_generic_reloc, /* special_function */
1234 "R_ARM_LDC_SB_G0", /* name */
1235 FALSE, /* partial_inplace */
1236 0xffffffff, /* src_mask */
1237 0xffffffff, /* dst_mask */
1238 TRUE), /* pcrel_offset */
1239
1240 HOWTO (R_ARM_LDC_SB_G1, /* type */
1241 0, /* rightshift */
1242 2, /* size (0 = byte, 1 = short, 2 = long) */
1243 32, /* bitsize */
1244 TRUE, /* pc_relative */
1245 0, /* bitpos */
1246 complain_overflow_dont,/* complain_on_overflow */
1247 bfd_elf_generic_reloc, /* special_function */
1248 "R_ARM_LDC_SB_G1", /* name */
1249 FALSE, /* partial_inplace */
1250 0xffffffff, /* src_mask */
1251 0xffffffff, /* dst_mask */
1252 TRUE), /* pcrel_offset */
1253
1254 HOWTO (R_ARM_LDC_SB_G2, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 TRUE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 "R_ARM_LDC_SB_G2", /* name */
1263 FALSE, /* partial_inplace */
1264 0xffffffff, /* src_mask */
1265 0xffffffff, /* dst_mask */
1266 TRUE), /* pcrel_offset */
1267
1268 /* End of group relocations. */
c19d1205 1269
c19d1205
ZW		 1270 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1271 0, /* rightshift */
1272 2, /* size (0 = byte, 1 = short, 2 = long) */
1273 16, /* bitsize */
1274 FALSE, /* pc_relative */
1275 0, /* bitpos */
1276 complain_overflow_dont,/* complain_on_overflow */
1277 bfd_elf_generic_reloc, /* special_function */
1278 "R_ARM_MOVW_BREL_NC", /* name */
1279 FALSE, /* partial_inplace */
1280 0x0000ffff, /* src_mask */
1281 0x0000ffff, /* dst_mask */
1282 FALSE), /* pcrel_offset */
1283
1284 HOWTO (R_ARM_MOVT_BREL, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_bitfield,/* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 "R_ARM_MOVT_BREL", /* name */
1293 FALSE, /* partial_inplace */
1294 0x0000ffff, /* src_mask */
1295 0x0000ffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 HOWTO (R_ARM_MOVW_BREL, /* type */
1299 0, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 16, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_ARM_MOVW_BREL", /* name */
1307 FALSE, /* partial_inplace */
1308 0x0000ffff, /* src_mask */
1309 0x0000ffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 16, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_ARM_THM_MOVW_BREL_NC",/* name */
1321 FALSE, /* partial_inplace */
1322 0x040f70ff, /* src_mask */
1323 0x040f70ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1327 0, /* rightshift */
1328 2, /* size (0 = byte, 1 = short, 2 = long) */
1329 16, /* bitsize */
1330 FALSE, /* pc_relative */
1331 0, /* bitpos */
1332 complain_overflow_bitfield,/* complain_on_overflow */
1333 bfd_elf_generic_reloc, /* special_function */
1334 "R_ARM_THM_MOVT_BREL", /* name */
1335 FALSE, /* partial_inplace */
1336 0x040f70ff, /* src_mask */
1337 0x040f70ff, /* dst_mask */
1338 FALSE), /* pcrel_offset */
1339
1340 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1341 0, /* rightshift */
1342 2, /* size (0 = byte, 1 = short, 2 = long) */
1343 16, /* bitsize */
1344 FALSE, /* pc_relative */
1345 0, /* bitpos */
1346 complain_overflow_dont,/* complain_on_overflow */
1347 bfd_elf_generic_reloc, /* special_function */
1348 "R_ARM_THM_MOVW_BREL", /* name */
1349 FALSE, /* partial_inplace */
1350 0x040f70ff, /* src_mask */
1351 0x040f70ff, /* dst_mask */
1352 FALSE), /* pcrel_offset */
1353
1354 EMPTY_HOWTO (90), /* unallocated */
1355 EMPTY_HOWTO (91),
1356 EMPTY_HOWTO (92),
1357 EMPTY_HOWTO (93),
1358
1359 HOWTO (R_ARM_PLT32_ABS, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_dont,/* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_ARM_PLT32_ABS", /* name */
1368 FALSE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_GOT_ABS, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 32, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_GOT_ABS", /* name */
1382 FALSE, /* partial_inplace */
1383 0xffffffff, /* src_mask */
1384 0xffffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_GOT_PREL, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 32, /* bitsize */
1391 TRUE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont, /* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_GOT_PREL", /* name */
1396 FALSE, /* partial_inplace */
1397 0xffffffff, /* src_mask */
1398 0xffffffff, /* dst_mask */
1399 TRUE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_GOT_BREL12, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 12, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_bitfield,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_GOT_BREL12", /* name */
1410 FALSE, /* partial_inplace */
1411 0x00000fff, /* src_mask */
1412 0x00000fff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_GOTOFF12, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 12, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_bitfield,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_GOTOFF12", /* name */
1424 FALSE, /* partial_inplace */
1425 0x00000fff, /* src_mask */
1426 0x00000fff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1430
1431 /* GNU extension to record C++ vtable member usage */
1432 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1433 0, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1435 0, /* bitsize */
ba93b8ac
DJ		 1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
c19d1205
ZW		 1438 complain_overflow_dont, /* complain_on_overflow */
1439 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1440 "R_ARM_GNU_VTENTRY", /* name */
1441 FALSE, /* partial_inplace */
1442 0, /* src_mask */
1443 0, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* GNU extension to record C++ vtable hierarchy */
1447 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1448 0, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 0, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_dont, /* complain_on_overflow */
1454 NULL, /* special_function */
1455 "R_ARM_GNU_VTINHERIT", /* name */
1456 FALSE, /* partial_inplace */
1457 0, /* src_mask */
1458 0, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_ARM_THM_JUMP11, /* type */
1462 1, /* rightshift */
1463 1, /* size (0 = byte, 1 = short, 2 = long) */
1464 11, /* bitsize */
1465 TRUE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_ARM_THM_JUMP11", /* name */
1470 FALSE, /* partial_inplace */
1471 0x000007ff, /* src_mask */
1472 0x000007ff, /* dst_mask */
1473 TRUE), /* pcrel_offset */
1474
1475 HOWTO (R_ARM_THM_JUMP8, /* type */
1476 1, /* rightshift */
1477 1, /* size (0 = byte, 1 = short, 2 = long) */
1478 8, /* bitsize */
1479 TRUE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_ARM_THM_JUMP8", /* name */
1484 FALSE, /* partial_inplace */
1485 0x000000ff, /* src_mask */
1486 0x000000ff, /* dst_mask */
1487 TRUE), /* pcrel_offset */
ba93b8ac 1488
c19d1205
ZW		 1489 /* TLS relocations */
1490 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1491 0, /* rightshift */
1492 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 32, /* bitsize */
1494 FALSE, /* pc_relative */
1495 0, /* bitpos */
1496 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1497 NULL, /* special_function */
1498 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1499 TRUE, /* partial_inplace */
1500 0xffffffff, /* src_mask */
1501 0xffffffff, /* dst_mask */
c19d1205 1502 FALSE), /* pcrel_offset */
ba93b8ac 1503
ba93b8ac
DJ		 1504 HOWTO (R_ARM_TLS_LDM32, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 32, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_bitfield,/* complain_on_overflow */
1511 bfd_elf_generic_reloc, /* special_function */
1512 "R_ARM_TLS_LDM32", /* name */
1513 TRUE, /* partial_inplace */
1514 0xffffffff, /* src_mask */
1515 0xffffffff, /* dst_mask */
c19d1205 1516 FALSE), /* pcrel_offset */
ba93b8ac 1517
c19d1205 1518 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1519 0, /* rightshift */
1520 2, /* size (0 = byte, 1 = short, 2 = long) */
1521 32, /* bitsize */
1522 FALSE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_bitfield,/* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
c19d1205 1526 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1527 TRUE, /* partial_inplace */
1528 0xffffffff, /* src_mask */
1529 0xffffffff, /* dst_mask */
c19d1205 1530 FALSE), /* pcrel_offset */
ba93b8ac 1531
ba93b8ac
DJ		 1532 HOWTO (R_ARM_TLS_IE32, /* type */
1533 0, /* rightshift */
1534 2, /* size (0 = byte, 1 = short, 2 = long) */
1535 32, /* bitsize */
1536 FALSE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_bitfield,/* complain_on_overflow */
1539 NULL, /* special_function */
1540 "R_ARM_TLS_IE32", /* name */
1541 TRUE, /* partial_inplace */
1542 0xffffffff, /* src_mask */
1543 0xffffffff, /* dst_mask */
c19d1205 1544 FALSE), /* pcrel_offset */
7f266840 1545
c19d1205 1546 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1549 32, /* bitsize */
7f266840
DJ		 1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
c19d1205
ZW		 1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_ARM_TLS_LE32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
7f266840 1559
c19d1205
ZW		 1560 HOWTO (R_ARM_TLS_LDO12, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 12, /* bitsize */
1564 FALSE, /* pc_relative */
7f266840 1565 0, /* bitpos */
c19d1205 1566 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1567 bfd_elf_generic_reloc, /* special_function */
c19d1205 1568 "R_ARM_TLS_LDO12", /* name */
7f266840 1569 FALSE, /* partial_inplace */
c19d1205
ZW		 1570 0x00000fff, /* src_mask */
1571 0x00000fff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
7f266840 1573
c19d1205
ZW		 1574 HOWTO (R_ARM_TLS_LE12, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 12, /* bitsize */
1578 FALSE, /* pc_relative */
7f266840 1579 0, /* bitpos */
c19d1205 1580 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1581 bfd_elf_generic_reloc, /* special_function */
c19d1205 1582 "R_ARM_TLS_LE12", /* name */
7f266840 1583 FALSE, /* partial_inplace */
c19d1205
ZW		 1584 0x00000fff, /* src_mask */
1585 0x00000fff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
7f266840 1587
c19d1205 1588 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1591 12, /* bitsize */
1592 FALSE, /* pc_relative */
7f266840 1593 0, /* bitpos */
c19d1205 1594 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1595 bfd_elf_generic_reloc, /* special_function */
c19d1205 1596 "R_ARM_TLS_IE12GP", /* name */
7f266840 1597 FALSE, /* partial_inplace */
c19d1205
ZW		 1598 0x00000fff, /* src_mask */
1599 0x00000fff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601};
1602
1603/* 112-127 private relocations
1604 128 R_ARM_ME_TOO, obsolete
1605 129-255 unallocated in AAELF.
7f266840 1606
c19d1205
ZW		 1607 249-255 extended, currently unused, relocations: */
1608
4962c51a 1609static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1610{
1611 HOWTO (R_ARM_RREL32, /* type */
1612 0, /* rightshift */
1613 0, /* size (0 = byte, 1 = short, 2 = long) */
1614 0, /* bitsize */
1615 FALSE, /* pc_relative */
1616 0, /* bitpos */
1617 complain_overflow_dont,/* complain_on_overflow */
1618 bfd_elf_generic_reloc, /* special_function */
1619 "R_ARM_RREL32", /* name */
1620 FALSE, /* partial_inplace */
1621 0, /* src_mask */
1622 0, /* dst_mask */
1623 FALSE), /* pcrel_offset */
1624
1625 HOWTO (R_ARM_RABS32, /* type */
1626 0, /* rightshift */
1627 0, /* size (0 = byte, 1 = short, 2 = long) */
1628 0, /* bitsize */
1629 FALSE, /* pc_relative */
1630 0, /* bitpos */
1631 complain_overflow_dont,/* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 "R_ARM_RABS32", /* name */
1634 FALSE, /* partial_inplace */
1635 0, /* src_mask */
1636 0, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 HOWTO (R_ARM_RPC24, /* type */
1640 0, /* rightshift */
1641 0, /* size (0 = byte, 1 = short, 2 = long) */
1642 0, /* bitsize */
1643 FALSE, /* pc_relative */
1644 0, /* bitpos */
1645 complain_overflow_dont,/* complain_on_overflow */
1646 bfd_elf_generic_reloc, /* special_function */
1647 "R_ARM_RPC24", /* name */
1648 FALSE, /* partial_inplace */
1649 0, /* src_mask */
1650 0, /* dst_mask */
1651 FALSE), /* pcrel_offset */
1652
1653 HOWTO (R_ARM_RBASE, /* type */
1654 0, /* rightshift */
1655 0, /* size (0 = byte, 1 = short, 2 = long) */
1656 0, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_ARM_RBASE", /* name */
1662 FALSE, /* partial_inplace */
1663 0, /* src_mask */
1664 0, /* dst_mask */
1665 FALSE) /* pcrel_offset */
1666};
1667
1668static reloc_howto_type *
1669elf32_arm_howto_from_type (unsigned int r_type)
1670{
c19d1205
ZW		 1671 if (r_type < NUM_ELEM (elf32_arm_howto_table_1))
1672 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1673
c19d1205
ZW		 1674 if (r_type >= R_ARM_RREL32
1675 && r_type < R_ARM_RREL32 + NUM_ELEM (elf32_arm_howto_table_2))
4962c51a 1676 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1677
c19d1205 1678 return NULL;
7f266840
DJ		 1679}
1680
1681static void
1682elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1683 Elf_Internal_Rela * elf_reloc)
1684{
1685 unsigned int r_type;
1686
1687 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1688 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1689}
1690
1691struct elf32_arm_reloc_map
1692 {
1693 bfd_reloc_code_real_type bfd_reloc_val;
1694 unsigned char elf_reloc_val;
1695 };
1696
1697/* All entries in this list must also be present in elf32_arm_howto_table. */
1698static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1699 {
1700 {BFD_RELOC_NONE, R_ARM_NONE},
1701 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1702 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1703 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1704 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1705 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1706 {BFD_RELOC_32, R_ARM_ABS32},
1707 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1708 {BFD_RELOC_8, R_ARM_ABS8},
1709 {BFD_RELOC_16, R_ARM_ABS16},
1710 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1711 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1712 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1713 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1718 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1719 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1720 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1721 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1722 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1723 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1724 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1725 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1726 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1727 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1728 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1729 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1730 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1731 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1732 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1733 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1734 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1735 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1736 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1737 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1738 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1739 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1740 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1741 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1742 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1743 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1744 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1745 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1746 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1747 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1749 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1750 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1751 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1753 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1754 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1755 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1756 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1757 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1758 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1759 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1760 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1761 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1762 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1763 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1764 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1765 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1767 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1768 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1769 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1770 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1771 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1772 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1773 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1774 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1775 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1776 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}
7f266840
DJ		 1777 };
1778
1779static reloc_howto_type *
f1c71a59
ZW		 1780elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1781 bfd_reloc_code_real_type code)
7f266840
DJ		 1782{
1783 unsigned int i;
c19d1205
ZW		 1784 for (i = 0; i < NUM_ELEM (elf32_arm_reloc_map); i ++)
1785 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1786 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1787
c19d1205 1788 return NULL;
7f266840
DJ		 1789}
1790
157090f7
AM		 1791static reloc_howto_type *
1792elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1793 const char *r_name)
1794{
1795 unsigned int i;
1796
1797 for (i = 0;
1798 i < (sizeof (elf32_arm_howto_table_1)
1799 / sizeof (elf32_arm_howto_table_1[0]));
1800 i++)
1801 if (elf32_arm_howto_table_1[i].name != NULL
1802 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1803 return &elf32_arm_howto_table_1[i];
1804
1805 for (i = 0;
1806 i < (sizeof (elf32_arm_howto_table_2)
1807 / sizeof (elf32_arm_howto_table_2[0]));
1808 i++)
1809 if (elf32_arm_howto_table_2[i].name != NULL
1810 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1811 return &elf32_arm_howto_table_2[i];
1812
1813 return NULL;
1814}
1815
7f266840
DJ		 1816/* Support for core dump NOTE sections */
1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
1828 case 148: /* Linux/ARM 32-bit*/
1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
1855 case 124: /* Linux/ARM elf_prpsinfo */
1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
1865
1866 {
1867 char *command = elf_tdata (abfd)->core_command;
1868 int n = strlen (command);
1869
1870 if (0 < n && command[n - 1] == ' ')
1871 command[n - 1] = '\0';
1872 }
1873
1874 return TRUE;
1875}
1876
1877#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1878#define TARGET_LITTLE_NAME "elf32-littlearm"
1879#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1880#define TARGET_BIG_NAME "elf32-bigarm"
1881
1882#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1883#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1884
252b5132
RH		 1885typedef unsigned long int insn32;
1886typedef unsigned short int insn16;
1887
3a4a14e9
PB		 1888/* In lieu of proper flags, assume all EABIv4 or later objects are
1889 interworkable. */
57e8b36a 1890#define INTERWORK_FLAG(abfd) \
3a4a14e9 1891 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
85a84e7a 1892 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
252b5132
RH		 1907/* The name of the dynamic interpreter. This is put in the .interp
1908 section. */
1909#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1910
5e681ec4
PB		 1911#ifdef FOUR_WORD_PLT
1912
252b5132
RH		 1913/* The first entry in a procedure linkage table looks like
1914 this. It is set up so that any shared library function that is
59f2c4e7 1915 called before the relocation has been set up calls the dynamic
9b485d32 1916 linker first. */
e5a52504 1917static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1918 {
1919 0xe52de004, /* str lr, [sp, #-4]! */
1920 0xe59fe010, /* ldr lr, [pc, #16] */
1921 0xe08fe00e, /* add lr, pc, lr */
1922 0xe5bef008, /* ldr pc, [lr, #8]! */
1923 };
1924
1925/* Subsequent entries in a procedure linkage table look like
1926 this. */
e5a52504 1927static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1928 {
1929 0xe28fc600, /* add ip, pc, #NN */
1930 0xe28cca00, /* add ip, ip, #NN */
1931 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1932 0x00000000, /* unused */
1933 };
1934
1935#else
1936
5e681ec4
PB		 1937/* The first entry in a procedure linkage table looks like
1938 this. It is set up so that any shared library function that is
1939 called before the relocation has been set up calls the dynamic
1940 linker first. */
e5a52504 1941static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1942 {
5e681ec4
PB		 1943 0xe52de004, /* str lr, [sp, #-4]! */
1944 0xe59fe004, /* ldr lr, [pc, #4] */
1945 0xe08fe00e, /* add lr, pc, lr */
1946 0xe5bef008, /* ldr pc, [lr, #8]! */
1947 0x00000000, /* &GOT[0] - . */
917583ad 1948 };
252b5132
RH		 1949
1950/* Subsequent entries in a procedure linkage table look like
1951 this. */
e5a52504 1952static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1953 {
1954 0xe28fc600, /* add ip, pc, #0xNN00000 */
1955 0xe28cca00, /* add ip, ip, #0xNN000 */
1956 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1957 };
1958
1959#endif
252b5132 1960
00a97672
RS		 1961/* The format of the first entry in the procedure linkage table
1962 for a VxWorks executable. */
1963static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1964 {
1965 0xe52dc008, /* str ip,[sp,#-8]! */
1966 0xe59fc000, /* ldr ip,[pc] */
1967 0xe59cf008, /* ldr pc,[ip,#8] */
1968 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1969 };
1970
1971/* The format of subsequent entries in a VxWorks executable. */
1972static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1973 {
1974 0xe59fc000, /* ldr ip,[pc] */
1975 0xe59cf000, /* ldr pc,[ip] */
1976 0x00000000, /* .long @got */
1977 0xe59fc000, /* ldr ip,[pc] */
1978 0xea000000, /* b _PLT */
1979 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1980 };
1981
1982/* The format of entries in a VxWorks shared library. */
1983static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1984 {
1985 0xe59fc000, /* ldr ip,[pc] */
1986 0xe79cf009, /* ldr pc,[ip,r9] */
1987 0x00000000, /* .long @got */
1988 0xe59fc000, /* ldr ip,[pc] */
1989 0xe599f008, /* ldr pc,[r9,#8] */
1990 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1991 };
1992
b7693d02
DJ		 1993/* An initial stub used if the PLT entry is referenced from Thumb code. */
1994#define PLT_THUMB_STUB_SIZE 4
1995static const bfd_vma elf32_arm_plt_thumb_stub [] =
1996 {
1997 0x4778, /* bx pc */
1998 0x46c0 /* nop */
1999 };
2000
e5a52504
MM		 2001/* The entries in a PLT when using a DLL-based target with multiple
2002 address spaces. */
2003static const bfd_vma elf32_arm_symbian_plt_entry [] =
2004 {
83a358aa 2005 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2006 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2007 };
2008
e489d0ae
PB		 2009/* Used to build a map of a section. This is required for mixed-endian
2010 code/data. */
2011
2012typedef struct elf32_elf_section_map
2013{
2014 bfd_vma vma;
2015 char type;
2016}
2017elf32_arm_section_map;
2018
c7b8f16e
JB		 2019/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2020
2021typedef enum
2022{
2023 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2024 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2025 VFP11_ERRATUM_ARM_VENEER,
2026 VFP11_ERRATUM_THUMB_VENEER
2027}
2028elf32_vfp11_erratum_type;
2029
2030typedef struct elf32_vfp11_erratum_list
2031{
2032 struct elf32_vfp11_erratum_list *next;
2033 bfd_vma vma;
2034 union
2035 {
2036 struct
2037 {
2038 struct elf32_vfp11_erratum_list *veneer;
2039 unsigned int vfp_insn;
2040 } b;
2041 struct
2042 {
2043 struct elf32_vfp11_erratum_list *branch;
2044 unsigned int id;
2045 } v;
2046 } u;
2047 elf32_vfp11_erratum_type type;
2048}
2049elf32_vfp11_erratum_list;
2050
8e3de13a 2051typedef struct _arm_elf_section_data
e489d0ae
PB		 2052{
2053 struct bfd_elf_section_data elf;
8e3de13a 2054 unsigned int mapcount;
c7b8f16e 2055 unsigned int mapsize;
e489d0ae 2056 elf32_arm_section_map *map;
c7b8f16e
JB		 2057 unsigned int erratumcount;
2058 elf32_vfp11_erratum_list *erratumlist;
8e3de13a
NC		 2059}
2060_arm_elf_section_data;
e489d0ae
PB		 2061
2062#define elf32_arm_section_data(sec) \
8e3de13a 2063 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2064
ba93b8ac
DJ		 2065/* The size of the thread control block. */
2066#define TCB_SIZE 8
2067
2068struct elf32_arm_obj_tdata
2069{
2070 struct elf_obj_tdata root;
2071
2072 /* tls_type for each local got entry. */
2073 char *local_got_tls_type;
ee065d83 2074
bf21ed78
MS		 2075 /* Zero to warn when linking objects with incompatible enum sizes. */
2076 int no_enum_size_warning;
ba93b8ac
DJ		 2077};
2078
2079#define elf32_arm_tdata(abfd) \
2080 ((struct elf32_arm_obj_tdata *) (abfd)->tdata.any)
2081
2082#define elf32_arm_local_got_tls_type(abfd) \
2083 (elf32_arm_tdata (abfd)->local_got_tls_type)
2084
2085static bfd_boolean
2086elf32_arm_mkobject (bfd *abfd)
2087{
ba93b8ac 2088 if (abfd->tdata.any == NULL)
62d7a5f6
AM		 2089 {
2090 bfd_size_type amt = sizeof (struct elf32_arm_obj_tdata);
2091 abfd->tdata.any = bfd_zalloc (abfd, amt);
2092 if (abfd->tdata.any == NULL)
2093 return FALSE;
2094 }
2095 return bfd_elf_mkobject (abfd);
ba93b8ac
DJ		 2096}
2097
252b5132
RH		 2098/* The ARM linker needs to keep track of the number of relocs that it
2099 decides to copy in check_relocs for each symbol. This is so that
2100 it can discard PC relative relocs if it doesn't need them when
2101 linking with -Bsymbolic. We store the information in a field
2102 extending the regular ELF linker hash table. */
2103
ba93b8ac
DJ		 2104/* This structure keeps track of the number of relocs we have copied
2105 for a given symbol. */
5e681ec4 2106struct elf32_arm_relocs_copied
917583ad
NC		 2107 {
2108 /* Next section. */
5e681ec4 2109 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2110 /* A section in dynobj. */
2111 asection * section;
2112 /* Number of relocs copied in this section. */
2113 bfd_size_type count;
ba93b8ac
DJ		 2114 /* Number of PC-relative relocs copied in this section. */
2115 bfd_size_type pc_count;
917583ad 2116 };
252b5132 2117
ba93b8ac
DJ		 2118#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2119
ba96a88f 2120/* Arm ELF linker hash entry. */
252b5132 2121struct elf32_arm_link_hash_entry
917583ad
NC		 2122 {
2123 struct elf_link_hash_entry root;
252b5132 2124
917583ad 2125 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2126 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2127
2128 /* We reference count Thumb references to a PLT entry separately,
2129 so that we can emit the Thumb trampoline only if needed. */
2130 bfd_signed_vma plt_thumb_refcount;
2131
2132 /* Since PLT entries have variable size if the Thumb prologue is
2133 used, we need to record the index into .got.plt instead of
2134 recomputing it from the PLT offset. */
2135 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2136
2137#define GOT_UNKNOWN 0
2138#define GOT_NORMAL 1
2139#define GOT_TLS_GD 2
2140#define GOT_TLS_IE 4
2141 unsigned char tls_type;
a4fd1a8e
PB		 2142
2143 /* The symbol marking the real symbol location for exported thumb
2144 symbols with Arm stubs. */
2145 struct elf_link_hash_entry *export_glue;
917583ad 2146 };
252b5132 2147
252b5132 2148/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2149#define elf32_arm_link_hash_traverse(table, func, info) \
2150 (elf_link_hash_traverse \
2151 (&(table)->root, \
b7693d02 2152 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2153 (info)))
2154
2155/* Get the ARM elf linker hash table from a link_info structure. */
2156#define elf32_arm_hash_table(info) \
2157 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2158
9b485d32 2159/* ARM ELF linker hash table. */
252b5132 2160struct elf32_arm_link_hash_table
917583ad
NC		 2161 {
2162 /* The main hash table. */
2163 struct elf_link_hash_table root;
252b5132 2164
4cc11e76 2165 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 2166 bfd_size_type thumb_glue_size;
252b5132 2167
4cc11e76 2168 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 2169 bfd_size_type arm_glue_size;
252b5132 2170
c7b8f16e
JB		 2171 /* The size in bytes of the section containing glue for VFP11 erratum
2172 veneers. */
2173 bfd_size_type vfp11_erratum_glue_size;
2174
4cc11e76 2175 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 2176 bfd * bfd_of_glue_owner;
ba96a88f 2177
e489d0ae
PB		 2178 /* Nonzero to output a BE8 image. */
2179 int byteswap_code;
2180
9c504268 2181 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
87bc043a 2182 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
9c504268
PB		 2183 int target1_is_rel;
2184
eb043451
PB		 2185 /* The relocation to use for R_ARM_TARGET2 relocations. */
2186 int target2_reloc;
2187
319850b4
JB		 2188 /* Nonzero to fix BX instructions for ARMv4 targets. */
2189 int fix_v4bx;
2190
33bfe774
JB		 2191 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2192 int use_blx;
2193
c7b8f16e
JB		 2194 /* What sort of code sequences we should look for which may trigger the
2195 VFP11 denorm erratum. */
2196 bfd_arm_vfp11_fix vfp11_fix;
2197
2198 /* Global counter for the number of fixes we have emitted. */
2199 int num_vfp11_fixes;
2200
27e55c4d
PB		 2201 /* Nonzero to force PIC branch veneers. */
2202 int pic_veneer;
2203
e5a52504
MM		 2204 /* The number of bytes in the initial entry in the PLT. */
2205 bfd_size_type plt_header_size;
2206
2207 /* The number of bytes in the subsequent PLT etries. */
2208 bfd_size_type plt_entry_size;
2209
00a97672
RS		 2210 /* True if the target system is VxWorks. */
2211 int vxworks_p;
2212
e5a52504
MM		 2213 /* True if the target system is Symbian OS. */
2214 int symbian_p;
2215
4e7fd91e
PB		 2216 /* True if the target uses REL relocations. */
2217 int use_rel;
2218
5e681ec4
PB		 2219 /* Short-cuts to get to dynamic linker sections. */
2220 asection *sgot;
2221 asection *sgotplt;
2222 asection *srelgot;
2223 asection *splt;
2224 asection *srelplt;
2225 asection *sdynbss;
2226 asection *srelbss;
2227
00a97672
RS		 2228 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2229 asection *srelplt2;
2230
ba93b8ac
DJ		 2231 /* Data for R_ARM_TLS_LDM32 relocations. */
2232 union {
2233 bfd_signed_vma refcount;
2234 bfd_vma offset;
2235 } tls_ldm_got;
2236
5e681ec4
PB		 2237 /* Small local sym to section mapping cache. */
2238 struct sym_sec_cache sym_sec;
b7693d02
DJ		 2239
2240 /* For convenience in allocate_dynrelocs. */
2241 bfd * obfd;
917583ad 2242 };
252b5132 2243
780a67af
NC		 2244/* Create an entry in an ARM ELF linker hash table. */
2245
2246static struct bfd_hash_entry *
57e8b36a
NC		 2247elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2248 struct bfd_hash_table * table,
2249 const char * string)
780a67af
NC		 2250{
2251 struct elf32_arm_link_hash_entry * ret =
2252 (struct elf32_arm_link_hash_entry *) entry;
2253
2254 /* Allocate the structure if it has not already been allocated by a
2255 subclass. */
2256 if (ret == (struct elf32_arm_link_hash_entry *) NULL)
57e8b36a
NC		 2257 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2258 if (ret == NULL)
780a67af
NC		 2259 return (struct bfd_hash_entry *) ret;
2260
2261 /* Call the allocation method of the superclass. */
2262 ret = ((struct elf32_arm_link_hash_entry *)
2263 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2264 table, string));
57e8b36a 2265 if (ret != NULL)
b7693d02
DJ		 2266 {
2267 ret->relocs_copied = NULL;
ba93b8ac 2268 ret->tls_type = GOT_UNKNOWN;
b7693d02
DJ		 2269 ret->plt_thumb_refcount = 0;
2270 ret->plt_got_offset = -1;
a4fd1a8e 2271 ret->export_glue = NULL;
b7693d02 2272 }
780a67af
NC		 2273
2274 return (struct bfd_hash_entry *) ret;
2275}
2276
00a97672
RS		 2277/* Return true if NAME is the name of the relocation section associated
2278 with S. */
2279
2280static bfd_boolean
2281reloc_section_p (struct elf32_arm_link_hash_table *htab,
2282 const char *name, asection *s)
2283{
2284 if (htab->use_rel)
0112cd26 2285 return CONST_STRNEQ (name, ".rel") && strcmp (s->name, name + 4) == 0;
00a97672 2286 else
0112cd26 2287 return CONST_STRNEQ (name, ".rela") && strcmp (s->name, name + 5) == 0;
00a97672
RS		 2288}
2289
2290/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2291 shortcuts to them in our hash table. */
2292
2293static bfd_boolean
57e8b36a 2294create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2295{
2296 struct elf32_arm_link_hash_table *htab;
2297
e5a52504
MM		 2298 htab = elf32_arm_hash_table (info);
2299 /* BPABI objects never have a GOT, or associated sections. */
2300 if (htab->symbian_p)
2301 return TRUE;
2302
5e681ec4
PB		 2303 if (! _bfd_elf_create_got_section (dynobj, info))
2304 return FALSE;
2305
5e681ec4
PB		 2306 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2307 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2308 if (!htab->sgot || !htab->sgotplt)
2309 abort ();
2310
00a97672
RS		 2311 htab->srelgot = bfd_make_section_with_flags (dynobj,
2312 RELOC_SECTION (htab, ".got"),
3496cb2a
L		 2313 (SEC_ALLOC | SEC_LOAD
2314 | SEC_HAS_CONTENTS
2315 | SEC_IN_MEMORY
2316 | SEC_LINKER_CREATED
2317 | SEC_READONLY));
5e681ec4 2318 if (htab->srelgot == NULL
5e681ec4
PB		 2319 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2320 return FALSE;
2321 return TRUE;
2322}
2323
00a97672
RS		 2324/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2325 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2326 hash table. */
2327
2328static bfd_boolean
57e8b36a 2329elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2330{
2331 struct elf32_arm_link_hash_table *htab;
2332
2333 htab = elf32_arm_hash_table (info);
2334 if (!htab->sgot && !create_got_section (dynobj, info))
2335 return FALSE;
2336
2337 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2338 return FALSE;
2339
2340 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2341 htab->srelplt = bfd_get_section_by_name (dynobj,
2342 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2343 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2344 if (!info->shared)
00a97672
RS		 2345 htab->srelbss = bfd_get_section_by_name (dynobj,
2346 RELOC_SECTION (htab, ".bss"));
2347
2348 if (htab->vxworks_p)
2349 {
2350 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2351 return FALSE;
2352
2353 if (info->shared)
2354 {
2355 htab->plt_header_size = 0;
2356 htab->plt_entry_size
2357 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2358 }
2359 else
2360 {
2361 htab->plt_header_size
2362 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2363 htab->plt_entry_size
2364 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2365 }
2366 }
5e681ec4 2367
e5a52504
MM		 2368 if (!htab->splt
2369 || !htab->srelplt
2370 || !htab->sdynbss
5e681ec4
PB		 2371 || (!info->shared && !htab->srelbss))
2372 abort ();
2373
2374 return TRUE;
2375}
2376
2377/* Copy the extra info we tack onto an elf_link_hash_entry. */
2378
2379static void
fcfa13d2 2380elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
5e681ec4
PB		 2381 struct elf_link_hash_entry *dir,
2382 struct elf_link_hash_entry *ind)
2383{
2384 struct elf32_arm_link_hash_entry *edir, *eind;
2385
2386 edir = (struct elf32_arm_link_hash_entry *) dir;
2387 eind = (struct elf32_arm_link_hash_entry *) ind;
2388
2389 if (eind->relocs_copied != NULL)
2390 {
2391 if (edir->relocs_copied != NULL)
2392 {
2393 struct elf32_arm_relocs_copied **pp;
2394 struct elf32_arm_relocs_copied *p;
2395
fcfa13d2 2396 /* Add reloc counts against the indirect sym to the direct sym
5e681ec4
PB		 2397 list. Merge any entries against the same section. */
2398 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2399 {
2400 struct elf32_arm_relocs_copied *q;
2401
2402 for (q = edir->relocs_copied; q != NULL; q = q->next)
2403 if (q->section == p->section)
2404 {
ba93b8ac 2405 q->pc_count += p->pc_count;
5e681ec4
PB		 2406 q->count += p->count;
2407 *pp = p->next;
2408 break;
2409 }
2410 if (q == NULL)
2411 pp = &p->next;
2412 }
2413 *pp = edir->relocs_copied;
2414 }
2415
2416 edir->relocs_copied = eind->relocs_copied;
2417 eind->relocs_copied = NULL;
2418 }
2419
b34b2d70 2420 if (ind->root.type == bfd_link_hash_indirect)
ba93b8ac 2421 {
b34b2d70
DJ		 2422 /* Copy over PLT info. */
2423 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2424 eind->plt_thumb_refcount = 0;
2425
2426 if (dir->got.refcount <= 0)
2427 {
2428 edir->tls_type = eind->tls_type;
2429 eind->tls_type = GOT_UNKNOWN;
2430 }
ba93b8ac
DJ		 2431 }
2432
fcfa13d2 2433 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
5e681ec4
PB		 2434}
2435
9b485d32 2436/* Create an ARM elf linker hash table. */
252b5132
RH		 2437
2438static struct bfd_link_hash_table *
57e8b36a 2439elf32_arm_link_hash_table_create (bfd *abfd)
252b5132
RH		 2440{
2441 struct elf32_arm_link_hash_table *ret;
dc810e39 2442 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
252b5132 2443
57e8b36a
NC		 2444 ret = bfd_malloc (amt);
2445 if (ret == NULL)
252b5132
RH		 2446 return NULL;
2447
57e8b36a 2448 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
66eb6687
AM		 2449 elf32_arm_link_hash_newfunc,
2450 sizeof (struct elf32_arm_link_hash_entry)))
252b5132 2451 {
e2d34d7d 2452 free (ret);
252b5132
RH		 2453 return NULL;
2454 }
2455
5e681ec4
PB		 2456 ret->sgot = NULL;
2457 ret->sgotplt = NULL;
2458 ret->srelgot = NULL;
2459 ret->splt = NULL;
2460 ret->srelplt = NULL;
2461 ret->sdynbss = NULL;
2462 ret->srelbss = NULL;
00a97672 2463 ret->srelplt2 = NULL;
252b5132
RH		 2464 ret->thumb_glue_size = 0;
2465 ret->arm_glue_size = 0;
c7b8f16e
JB		 2466 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2467 ret->vfp11_erratum_glue_size = 0;
2468 ret->num_vfp11_fixes = 0;
252b5132 2469 ret->bfd_of_glue_owner = NULL;
e489d0ae 2470 ret->byteswap_code = 0;
9c504268 2471 ret->target1_is_rel = 0;
eb043451 2472 ret->target2_reloc = R_ARM_NONE;
e5a52504
MM		 2473#ifdef FOUR_WORD_PLT
2474 ret->plt_header_size = 16;
2475 ret->plt_entry_size = 16;
2476#else
2477 ret->plt_header_size = 20;
2478 ret->plt_entry_size = 12;
2479#endif
33bfe774
JB		 2480 ret->fix_v4bx = 0;
2481 ret->use_blx = 0;
00a97672 2482 ret->vxworks_p = 0;
e5a52504 2483 ret->symbian_p = 0;
4e7fd91e 2484 ret->use_rel = 1;
5e681ec4 2485 ret->sym_sec.abfd = NULL;
b7693d02 2486 ret->obfd = abfd;
ba93b8ac 2487 ret->tls_ldm_got.refcount = 0;
252b5132
RH		 2488
2489 return &ret->root.root;
2490}
2491
9b485d32
NC		 2492/* Locate the Thumb encoded calling stub for NAME. */
2493
252b5132 2494static struct elf_link_hash_entry *
57e8b36a
NC		 2495find_thumb_glue (struct bfd_link_info *link_info,
2496 const char *name,
f2a9dd69 2497 char **error_message)
252b5132
RH		 2498{
2499 char *tmp_name;
2500 struct elf_link_hash_entry *hash;
2501 struct elf32_arm_link_hash_table *hash_table;
2502
2503 /* We need a pointer to the armelf specific hash table. */
2504 hash_table = elf32_arm_hash_table (link_info);
2505
57e8b36a
NC		 2506 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2507 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2508
2509 BFD_ASSERT (tmp_name);
2510
2511 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2512
2513 hash = elf_link_hash_lookup
b34976b6 2514 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2515
2516 if (hash == NULL)
f2a9dd69
DJ		 2517 asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
2518 tmp_name, name);
252b5132
RH		 2519
2520 free (tmp_name);
2521
2522 return hash;
2523}
2524
9b485d32
NC		 2525/* Locate the ARM encoded calling stub for NAME. */
2526
252b5132 2527static struct elf_link_hash_entry *
57e8b36a
NC		 2528find_arm_glue (struct bfd_link_info *link_info,
2529 const char *name,
f2a9dd69 2530 char **error_message)
252b5132
RH		 2531{
2532 char *tmp_name;
2533 struct elf_link_hash_entry *myh;
2534 struct elf32_arm_link_hash_table *hash_table;
2535
2536 /* We need a pointer to the elfarm specific hash table. */
2537 hash_table = elf32_arm_hash_table (link_info);
2538
57e8b36a
NC		 2539 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2540 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2541
2542 BFD_ASSERT (tmp_name);
2543
2544 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2545
2546 myh = elf_link_hash_lookup
b34976b6 2547 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2548
2549 if (myh == NULL)
f2a9dd69
DJ		 2550 asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
2551 tmp_name, name);
252b5132
RH		 2552
2553 free (tmp_name);
2554
2555 return myh;
2556}
2557
8f6277f5 2558/* ARM->Thumb glue (static images):
252b5132
RH		 2559
2560 .arm
2561 __func_from_arm:
2562 ldr r12, __func_addr
2563 bx r12
2564 __func_addr:
8f6277f5 2565 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 2566
26079076
PB		 2567 (v5t static images)
2568 .arm
2569 __func_from_arm:
2570 ldr pc, __func_addr
2571 __func_addr:
2572 .word func @ behave as if you saw a ARM_32 reloc.
2573
8f6277f5
PB		 2574 (relocatable images)
2575 .arm
2576 __func_from_arm:
2577 ldr r12, __func_offset
2578 add r12, r12, pc
2579 bx r12
2580 __func_offset:
2581 .word func - .
2582 */
2583
2584#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 2585static const insn32 a2t1_ldr_insn = 0xe59fc000;
2586static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
2587static const insn32 a2t3_func_addr_insn = 0x00000001;
2588
26079076
PB		 2589#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
2590static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
2591static const insn32 a2t2v5_func_addr_insn = 0x00000001;
2592
8f6277f5
PB		 2593#define ARM2THUMB_PIC_GLUE_SIZE 16
2594static const insn32 a2t1p_ldr_insn = 0xe59fc004;
2595static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
2596static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
2597
9b485d32 2598/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132
RH		 2599
2600 .thumb .thumb
2601 .align 2 .align 2
2602 __func_from_thumb: __func_from_thumb:
2603 bx pc push {r6, lr}
2604 nop ldr r6, __func_addr
2605 .arm mov lr, pc
2606 __func_change_to_arm: bx r6
2607 b func .arm
2608 __func_back_to_thumb:
2609 ldmia r13! {r6, lr}
2610 bx lr
2611 __func_addr:
9b485d32 2612 .word func */
252b5132
RH		 2613
2614#define THUMB2ARM_GLUE_SIZE 8
2615static const insn16 t2a1_bx_pc_insn = 0x4778;
2616static const insn16 t2a2_noop_insn = 0x46c0;
2617static const insn32 t2a3_b_insn = 0xea000000;
2618
c7b8f16e
JB		 2619#define VFP11_ERRATUM_VENEER_SIZE 8
2620
7e392df6 2621#ifndef ELFARM_NABI_C_INCLUDED
b34976b6 2622bfd_boolean
57e8b36a 2623bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
252b5132
RH		 2624{
2625 asection * s;
2626 bfd_byte * foo;
2627 struct elf32_arm_link_hash_table * globals;
2628
2629 globals = elf32_arm_hash_table (info);
2630
2631 BFD_ASSERT (globals != NULL);
2632
2633 if (globals->arm_glue_size != 0)
2634 {
2635 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2636
dc810e39
AM		 2637 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2638 ARM2THUMB_GLUE_SECTION_NAME);
252b5132
RH		 2639
2640 BFD_ASSERT (s != NULL);
2641
57e8b36a 2642 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
252b5132 2643
2f475487 2644 BFD_ASSERT (s->size == globals->arm_glue_size);
252b5132
RH		 2645 s->contents = foo;
2646 }
2647
2648 if (globals->thumb_glue_size != 0)
2649 {
2650 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2651
2652 s = bfd_get_section_by_name
2653 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2654
2655 BFD_ASSERT (s != NULL);
2656
57e8b36a 2657 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
252b5132 2658
2f475487 2659 BFD_ASSERT (s->size == globals->thumb_glue_size);
252b5132
RH		 2660 s->contents = foo;
2661 }
c7b8f16e
JB		 2662
2663 if (globals->vfp11_erratum_glue_size != 0)
2664 {
2665 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2666
2667 s = bfd_get_section_by_name
2668 (globals->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2669
2670 BFD_ASSERT (s != NULL);
2671
2672 foo = bfd_alloc (globals->bfd_of_glue_owner,
2673 globals->vfp11_erratum_glue_size);
2674
2675 BFD_ASSERT (s->size == globals->vfp11_erratum_glue_size);
2676 s->contents = foo;
2677 }
252b5132 2678
b34976b6 2679 return TRUE;
252b5132
RH		 2680}
2681
a4fd1a8e
PB		 2682/* Allocate space and symbols for calling a Thumb function from Arm mode.
2683 returns the symbol identifying teh stub. */
2684static struct elf_link_hash_entry *
57e8b36a
NC		 2685record_arm_to_thumb_glue (struct bfd_link_info * link_info,
2686 struct elf_link_hash_entry * h)
252b5132
RH		 2687{
2688 const char * name = h->root.root.string;
63b0f745 2689 asection * s;
252b5132
RH		 2690 char * tmp_name;
2691 struct elf_link_hash_entry * myh;
14a793b2 2692 struct bfd_link_hash_entry * bh;
252b5132 2693 struct elf32_arm_link_hash_table * globals;
dc810e39 2694 bfd_vma val;
2f475487 2695 bfd_size_type size;
252b5132
RH		 2696
2697 globals = elf32_arm_hash_table (link_info);
2698
2699 BFD_ASSERT (globals != NULL);
2700 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2701
2702 s = bfd_get_section_by_name
2703 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
2704
252b5132
RH		 2705 BFD_ASSERT (s != NULL);
2706
57e8b36a 2707 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2708
2709 BFD_ASSERT (tmp_name);
2710
2711 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2712
2713 myh = elf_link_hash_lookup
b34976b6 2714 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2715
2716 if (myh != NULL)
2717 {
9b485d32 2718 /* We've already seen this guy. */
252b5132 2719 free (tmp_name);
a4fd1a8e 2720 return myh;
252b5132
RH		 2721 }
2722
57e8b36a
NC		 2723 /* The only trick here is using hash_table->arm_glue_size as the value.
2724 Even though the section isn't allocated yet, this is where we will be
2725 putting it. */
14a793b2 2726 bh = NULL;
dc810e39
AM		 2727 val = globals->arm_glue_size + 1;
2728 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2729 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2730 NULL, TRUE, FALSE, &bh);
252b5132 2731
b7693d02
DJ		 2732 myh = (struct elf_link_hash_entry *) bh;
2733 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2734 myh->forced_local = 1;
2735
252b5132
RH		 2736 free (tmp_name);
2737
27e55c4d
PB		 2738 if (link_info->shared || globals->root.is_relocatable_executable
2739 || globals->pic_veneer)
2f475487 2740 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 2741 else if (globals->use_blx)
2742 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 2743 else
2f475487
AM		 2744 size = ARM2THUMB_STATIC_GLUE_SIZE;
2745
2746 s->size += size;
2747 globals->arm_glue_size += size;
252b5132 2748
a4fd1a8e 2749 return myh;
252b5132
RH		 2750}
2751
2752static void
57e8b36a
NC		 2753record_thumb_to_arm_glue (struct bfd_link_info *link_info,
2754 struct elf_link_hash_entry *h)
252b5132
RH		 2755{
2756 const char *name = h->root.root.string;
63b0f745 2757 asection *s;
252b5132
RH		 2758 char *tmp_name;
2759 struct elf_link_hash_entry *myh;
14a793b2 2760 struct bfd_link_hash_entry *bh;
252b5132 2761 struct elf32_arm_link_hash_table *hash_table;
dc810e39 2762 bfd_vma val;
252b5132
RH		 2763
2764 hash_table = elf32_arm_hash_table (link_info);
2765
2766 BFD_ASSERT (hash_table != NULL);
2767 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2768
2769 s = bfd_get_section_by_name
2770 (hash_table->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2771
2772 BFD_ASSERT (s != NULL);
2773
57e8b36a
NC		 2774 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2775 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2776
2777 BFD_ASSERT (tmp_name);
2778
2779 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2780
2781 myh = elf_link_hash_lookup
b34976b6 2782 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2783
2784 if (myh != NULL)
2785 {
9b485d32 2786 /* We've already seen this guy. */
252b5132 2787 free (tmp_name);
9b485d32 2788 return;
252b5132
RH		 2789 }
2790
14a793b2 2791 bh = NULL;
dc810e39
AM		 2792 val = hash_table->thumb_glue_size + 1;
2793 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2794 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2795 NULL, TRUE, FALSE, &bh);
252b5132 2796
9b485d32 2797 /* If we mark it 'Thumb', the disassembler will do a better job. */
14a793b2 2798 myh = (struct elf_link_hash_entry *) bh;
b7693d02
DJ		 2799 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
2800 myh->forced_local = 1;
252b5132
RH		 2801
2802 free (tmp_name);
2803
252b5132
RH		 2804#define CHANGE_TO_ARM "__%s_change_to_arm"
2805#define BACK_FROM_ARM "__%s_back_from_arm"
2806
9b485d32 2807 /* Allocate another symbol to mark where we switch to Arm mode. */
57e8b36a
NC		 2808 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2809 + strlen (CHANGE_TO_ARM) + 1);
252b5132
RH		 2810
2811 BFD_ASSERT (tmp_name);
2812
2813 sprintf (tmp_name, CHANGE_TO_ARM, name);
2814
14a793b2 2815 bh = NULL;
dc810e39
AM		 2816 val = hash_table->thumb_glue_size + 4,
2817 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2818 tmp_name, BSF_LOCAL, s, val,
b34976b6 2819 NULL, TRUE, FALSE, &bh);
252b5132
RH		 2820
2821 free (tmp_name);
2822
2f475487 2823 s->size += THUMB2ARM_GLUE_SIZE;
252b5132
RH		 2824 hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
2825
2826 return;
2827}
2828
c7b8f16e
JB		 2829
2830/* Add an entry to the code/data map for section SEC. */
2831
2832static void
2833elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
2834{
2835 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
2836 unsigned int newidx;
2837
2838 if (sec_data->map == NULL)
2839 {
2840 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
2841 sec_data->mapcount = 0;
2842 sec_data->mapsize = 1;
2843 }
2844
2845 newidx = sec_data->mapcount++;
2846
2847 if (sec_data->mapcount > sec_data->mapsize)
2848 {
2849 sec_data->mapsize *= 2;
2850 sec_data->map = bfd_realloc (sec_data->map, sec_data->mapsize
2851 * sizeof (elf32_arm_section_map));
2852 }
2853
2854 sec_data->map[newidx].vma = vma;
2855 sec_data->map[newidx].type = type;
2856}
2857
2858
2859/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
2860 veneers are handled for now. */
2861
2862static bfd_vma
2863record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
2864 elf32_vfp11_erratum_list *branch,
2865 bfd *branch_bfd,
2866 asection *branch_sec,
2867 unsigned int offset)
2868{
2869 asection *s;
2870 struct elf32_arm_link_hash_table *hash_table;
2871 char *tmp_name;
2872 struct elf_link_hash_entry *myh;
2873 struct bfd_link_hash_entry *bh;
2874 bfd_vma val;
2875 struct _arm_elf_section_data *sec_data;
2876 int errcount;
2877 elf32_vfp11_erratum_list *newerr;
2878
2879 hash_table = elf32_arm_hash_table (link_info);
2880
2881 BFD_ASSERT (hash_table != NULL);
2882 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2883
2884 s = bfd_get_section_by_name
2885 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2886
2887 sec_data = elf32_arm_section_data (s);
2888
2889 BFD_ASSERT (s != NULL);
2890
2891 tmp_name = bfd_malloc ((bfd_size_type) strlen
2892 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
2893
2894 BFD_ASSERT (tmp_name);
2895
2896 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
2897 hash_table->num_vfp11_fixes);
2898
2899 myh = elf_link_hash_lookup
2900 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
2901
2902 BFD_ASSERT (myh == NULL);
2903
2904 bh = NULL;
2905 val = hash_table->vfp11_erratum_glue_size;
2906 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2907 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
2908 NULL, TRUE, FALSE, &bh);
2909
2910 myh = (struct elf_link_hash_entry *) bh;
2911 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2912 myh->forced_local = 1;
2913
2914 /* Link veneer back to calling location. */
2915 errcount = ++(sec_data->erratumcount);
2916 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
2917
2918 newerr->type = VFP11_ERRATUM_ARM_VENEER;
2919 newerr->vma = -1;
2920 newerr->u.v.branch = branch;
2921 newerr->u.v.id = hash_table->num_vfp11_fixes;
2922 branch->u.b.veneer = newerr;
2923
2924 newerr->next = sec_data->erratumlist;
2925 sec_data->erratumlist = newerr;
2926
2927 /* A symbol for the return from the veneer. */
2928 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
2929 hash_table->num_vfp11_fixes);
2930
2931 myh = elf_link_hash_lookup
2932 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
2933
2934 if (myh != NULL)
2935 abort ();
2936
2937 bh = NULL;
2938 val = offset + 4;
2939 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
2940 branch_sec, val, NULL, TRUE, FALSE, &bh);
2941
2942 myh = (struct elf_link_hash_entry *) bh;
2943 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2944 myh->forced_local = 1;
2945
2946 free (tmp_name);
2947
2948 /* Generate a mapping symbol for the veneer section, and explicitly add an
2949 entry for that symbol to the code/data map for the section. */
2950 if (hash_table->vfp11_erratum_glue_size == 0)
2951 {
2952 bh = NULL;
2953 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
2954 ever requires this erratum fix. */
2955 _bfd_generic_link_add_one_symbol (link_info,
2956 hash_table->bfd_of_glue_owner, "$a",
2957 BSF_LOCAL, s, 0, NULL,
2958 TRUE, FALSE, &bh);
2959
2960 myh = (struct elf_link_hash_entry *) bh;
2961 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
2962 myh->forced_local = 1;
2963
2964 /* The elf32_arm_init_maps function only cares about symbols from input
2965 BFDs. We must make a note of this generated mapping symbol
2966 ourselves so that code byteswapping works properly in
2967 elf32_arm_write_section. */
2968 elf32_arm_section_map_add (s, 'a', 0);
2969 }
2970
2971 s->size += VFP11_ERRATUM_VENEER_SIZE;
2972 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
2973 hash_table->num_vfp11_fixes++;
2974
2975 /* The offset of the veneer. */
2976 return val;
2977}
2978
8afb0e02
NC		 2979/* Add the glue sections to ABFD. This function is called from the
2980 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 2981
b34976b6 2982bfd_boolean
57e8b36a
NC		 2983bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
2984 struct bfd_link_info *info)
252b5132 2985{
252b5132
RH		 2986 flagword flags;
2987 asection *sec;
2988
8afb0e02
NC		 2989 /* If we are only performing a partial
2990 link do not bother adding the glue. */
1049f94e 2991 if (info->relocatable)
b34976b6 2992 return TRUE;
252b5132 2993
252b5132
RH		 2994 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
2995
2996 if (sec == NULL)
2997 {
57db232e
NC		 2998 /* Note: we do not include the flag SEC_LINKER_CREATED, as this
2999 will prevent elf_link_input_bfd() from processing the contents
3000 of this section. */
2f475487
AM		 3001 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3002 | SEC_CODE | SEC_READONLY);
252b5132 3003
3496cb2a
L		 3004 sec = bfd_make_section_with_flags (abfd,
3005 ARM2THUMB_GLUE_SECTION_NAME,
3006 flags);
252b5132
RH		 3007
3008 if (sec == NULL
252b5132 3009 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3010 return FALSE;
9a5aca8c 3011
57db232e
NC		 3012 /* Set the gc mark to prevent the section from being removed by garbage
3013 collection, despite the fact that no relocs refer to this section. */
3014 sec->gc_mark = 1;
252b5132
RH		 3015 }
3016
3017 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
3018
3019 if (sec == NULL)
3020 {
2f475487
AM		 3021 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3022 | SEC_CODE | SEC_READONLY);
252b5132 3023
3496cb2a
L		 3024 sec = bfd_make_section_with_flags (abfd,
3025 THUMB2ARM_GLUE_SECTION_NAME,
3026 flags);
252b5132
RH		 3027
3028 if (sec == NULL
252b5132 3029 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3030 return FALSE;
9a5aca8c 3031
57db232e 3032 sec->gc_mark = 1;
252b5132
RH		 3033 }
3034
c7b8f16e
JB		 3035 sec = bfd_get_section_by_name (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME);
3036
3037 if (sec == NULL)
3038 {
3039 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3040 | SEC_CODE | SEC_READONLY);
3041
3042 sec = bfd_make_section_with_flags (abfd,
3043 VFP11_ERRATUM_VENEER_SECTION_NAME,
3044 flags);
3045
3046 if (sec == NULL
3047 || !bfd_set_section_alignment (abfd, sec, 2))
3048 return FALSE;
3049
3050 sec->gc_mark = 1;
3051 }
3052
b34976b6 3053 return TRUE;
8afb0e02
NC		 3054}
3055
3056/* Select a BFD to be used to hold the sections used by the glue code.
3057 This function is called from the linker scripts in ld/emultempl/
3058 {armelf/pe}.em */
3059
b34976b6 3060bfd_boolean
57e8b36a 3061bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 3062{
3063 struct elf32_arm_link_hash_table *globals;
3064
3065 /* If we are only performing a partial link
3066 do not bother getting a bfd to hold the glue. */
1049f94e 3067 if (info->relocatable)
b34976b6 3068 return TRUE;
8afb0e02 3069
b7693d02
DJ		 3070 /* Make sure we don't attach the glue sections to a dynamic object. */
3071 BFD_ASSERT (!(abfd->flags & DYNAMIC));
3072
8afb0e02
NC		 3073 globals = elf32_arm_hash_table (info);
3074
3075 BFD_ASSERT (globals != NULL);
3076
3077 if (globals->bfd_of_glue_owner != NULL)
b34976b6 3078 return TRUE;
8afb0e02 3079
252b5132
RH		 3080 /* Save the bfd for later use. */
3081 globals->bfd_of_glue_owner = abfd;
cedb70c5 3082
b34976b6 3083 return TRUE;
252b5132
RH		 3084}
3085
39b41c9c
PB		 3086static void check_use_blx(struct elf32_arm_link_hash_table *globals)
3087{
104d59d1
JM		 3088 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3089 Tag_CPU_arch) > 2)
39b41c9c
PB		 3090 globals->use_blx = 1;
3091}
3092
b34976b6 3093bfd_boolean
57e8b36a 3094bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 3095 struct bfd_link_info *link_info)
252b5132
RH		 3096{
3097 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 3098 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 3099 Elf_Internal_Rela *irel, *irelend;
3100 bfd_byte *contents = NULL;
252b5132
RH		 3101
3102 asection *sec;
3103 struct elf32_arm_link_hash_table *globals;
3104
3105 /* If we are only performing a partial link do not bother
3106 to construct any glue. */
1049f94e 3107 if (link_info->relocatable)
b34976b6 3108 return TRUE;
252b5132
RH		 3109
3110 /* Here we have a bfd that is to be included on the link. We have a hook
3111 to do reloc rummaging, before section sizes are nailed down. */
252b5132 3112 globals = elf32_arm_hash_table (link_info);
39b41c9c 3113 check_use_blx (globals);
252b5132
RH		 3114
3115 BFD_ASSERT (globals != NULL);
3116 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
3117
d504ffc8 3118 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 3119 {
d003868e
AM		 3120 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
3121 abfd);
e489d0ae
PB		 3122 return FALSE;
3123 }
f21f3fe0 3124
252b5132
RH		 3125 /* Rummage around all the relocs and map the glue vectors. */
3126 sec = abfd->sections;
3127
3128 if (sec == NULL)
b34976b6 3129 return TRUE;
252b5132
RH		 3130
3131 for (; sec != NULL; sec = sec->next)
3132 {
3133 if (sec->reloc_count == 0)
3134 continue;
3135
2f475487
AM		 3136 if ((sec->flags & SEC_EXCLUDE) != 0)
3137 continue;
3138
252b5132 3139 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
252b5132 3140
9b485d32 3141 /* Load the relocs. */
6cdc0ccc 3142 internal_relocs
57e8b36a 3143 = _bfd_elf_link_read_relocs (abfd, sec, (void *) NULL,
45d6a902 3144 (Elf_Internal_Rela *) NULL, FALSE);
252b5132 3145
6cdc0ccc
AM		 3146 if (internal_relocs == NULL)
3147 goto error_return;
252b5132 3148
6cdc0ccc
AM		 3149 irelend = internal_relocs + sec->reloc_count;
3150 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 3151 {
3152 long r_type;
3153 unsigned long r_index;
252b5132
RH		 3154
3155 struct elf_link_hash_entry *h;
3156
3157 r_type = ELF32_R_TYPE (irel->r_info);
3158 r_index = ELF32_R_SYM (irel->r_info);
3159
9b485d32 3160 /* These are the only relocation types we care about. */
ba96a88f 3161 if ( r_type != R_ARM_PC24
b7693d02 3162 && r_type != R_ARM_PLT32
5b5bb741
PB		 3163 && r_type != R_ARM_CALL
3164 && r_type != R_ARM_JUMP24
c19d1205 3165 && r_type != R_ARM_THM_CALL)
252b5132
RH		 3166 continue;
3167
3168 /* Get the section contents if we haven't done so already. */
3169 if (contents == NULL)
3170 {
3171 /* Get cached copy if it exists. */
3172 if (elf_section_data (sec)->this_hdr.contents != NULL)
3173 contents = elf_section_data (sec)->this_hdr.contents;
3174 else
3175 {
3176 /* Go get them off disk. */
57e8b36a 3177 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 3178 goto error_return;
3179 }
3180 }
3181
a7c10850 3182 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 3183 h = NULL;
3184
9b485d32 3185 /* We don't care about local symbols. */
252b5132
RH		 3186 if (r_index < symtab_hdr->sh_info)
3187 continue;
3188
9b485d32 3189 /* This is an external symbol. */
252b5132
RH		 3190 r_index -= symtab_hdr->sh_info;
3191 h = (struct elf_link_hash_entry *)
3192 elf_sym_hashes (abfd)[r_index];
3193
3194 /* If the relocation is against a static symbol it must be within
3195 the current section and so cannot be a cross ARM/Thumb relocation. */
3196 if (h == NULL)
3197 continue;
3198
d504ffc8
DJ		 3199 /* If the call will go through a PLT entry then we do not need
3200 glue. */
3201 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 3202 continue;
3203
252b5132
RH		 3204 switch (r_type)
3205 {
3206 case R_ARM_PC24:
c6596c5e 3207 case R_ARM_PLT32:
5b5bb741
PB		 3208 case R_ARM_CALL:
3209 case R_ARM_JUMP24:
252b5132 3210 /* This one is a call from arm code. We need to look up
2f0ca46a 3211 the target of the call. If it is a thumb target, we
252b5132 3212 insert glue. */
39b41c9c
PB		 3213 if (ELF_ST_TYPE(h->type) == STT_ARM_TFUNC
3214 && !(r_type == R_ARM_CALL && globals->use_blx))
252b5132
RH		 3215 record_arm_to_thumb_glue (link_info, h);
3216 break;
3217
c19d1205 3218 case R_ARM_THM_CALL:
f21f3fe0 3219 /* This one is a call from thumb code. We look
2f0ca46a 3220 up the target of the call. If it is not a thumb
bcbdc74c 3221 target, we insert glue. */
5ab79981
PB		 3222 if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC && !globals->use_blx
3223 && h->root.type != bfd_link_hash_undefweak)
252b5132
RH		 3224 record_thumb_to_arm_glue (link_info, h);
3225 break;
3226
3227 default:
c6596c5e 3228 abort ();
252b5132
RH		 3229 }
3230 }
6cdc0ccc
AM		 3231
3232 if (contents != NULL
3233 && elf_section_data (sec)->this_hdr.contents != contents)
3234 free (contents);
3235 contents = NULL;
3236
3237 if (internal_relocs != NULL
3238 && elf_section_data (sec)->relocs != internal_relocs)
3239 free (internal_relocs);
3240 internal_relocs = NULL;
252b5132
RH		 3241 }
3242
b34976b6 3243 return TRUE;
9a5aca8c 3244
252b5132 3245error_return:
6cdc0ccc
AM		 3246 if (contents != NULL
3247 && elf_section_data (sec)->this_hdr.contents != contents)
3248 free (contents);
3249 if (internal_relocs != NULL
3250 && elf_section_data (sec)->relocs != internal_relocs)
3251 free (internal_relocs);
9a5aca8c 3252
b34976b6 3253 return FALSE;
252b5132 3254}
7e392df6 3255#endif
252b5132 3256
eb043451 3257
c7b8f16e
JB		 3258/* Initialise maps of ARM/Thumb/data for input BFDs. */
3259
3260void
3261bfd_elf32_arm_init_maps (bfd *abfd)
3262{
3263 Elf_Internal_Sym *isymbuf;
3264 Elf_Internal_Shdr *hdr;
3265 unsigned int i, localsyms;
3266
3267 if ((abfd->flags & DYNAMIC) != 0)
3268 return;
3269
3270 hdr = &elf_tdata (abfd)->symtab_hdr;
3271 localsyms = hdr->sh_info;
3272
3273 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
3274 should contain the number of local symbols, which should come before any
3275 global symbols. Mapping symbols are always local. */
3276 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
3277 NULL);
3278
3279 /* No internal symbols read? Skip this BFD. */
3280 if (isymbuf == NULL)
3281 return;
3282
3283 for (i = 0; i < localsyms; i++)
3284 {
3285 Elf_Internal_Sym *isym = &isymbuf[i];
3286 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3287 const char *name;
3288
3289 if (sec != NULL
3290 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
3291 {
3292 name = bfd_elf_string_from_elf_section (abfd,
3293 hdr->sh_link, isym->st_name);
3294
3295 if (bfd_is_arm_special_symbol_name (name,
3296 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
3297 elf32_arm_section_map_add (sec, name[1], isym->st_value);
3298 }
3299 }
3300}
3301
3302
3303void
3304bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
3305{
3306 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 3307 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
c7b8f16e
JB		 3308
3309 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
3310 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
3311 {
3312 switch (globals->vfp11_fix)
3313 {
3314 case BFD_ARM_VFP11_FIX_DEFAULT:
3315 case BFD_ARM_VFP11_FIX_NONE:
3316 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3317 break;
3318
3319 default:
3320 /* Give a warning, but do as the user requests anyway. */
3321 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
3322 "workaround is not necessary for target architecture"), obfd);
3323 }
3324 }
3325 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
3326 /* For earlier architectures, we might need the workaround, but do not
3327 enable it by default. If users is running with broken hardware, they
3328 must enable the erratum fix explicitly. */
3329 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3330}
3331
3332
3333enum bfd_arm_vfp11_pipe {
3334 VFP11_FMAC,
3335 VFP11_LS,
3336 VFP11_DS,
3337 VFP11_BAD
3338};
3339
3340/* Return a VFP register number. This is encoded as RX:X for single-precision
3341 registers, or X:RX for double-precision registers, where RX is the group of
3342 four bits in the instruction encoding and X is the single extension bit.
3343 RX and X fields are specified using their lowest (starting) bit. The return
3344 value is:
3345
3346 0...31: single-precision registers s0...s31
3347 32...63: double-precision registers d0...d31.
3348
3349 Although X should be zero for VFP11 (encoding d0...d15 only), we might
3350 encounter VFP3 instructions, so we allow the full range for DP registers. */
3351
3352static unsigned int
3353bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
3354 unsigned int x)
3355{
3356 if (is_double)
3357 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
3358 else
3359 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
3360}
3361
3362/* Set bits in *WMASK according to a register number REG as encoded by
3363 bfd_arm_vfp11_regno(). Ignore d16-d31. */
3364
3365static void
3366bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
3367{
3368 if (reg < 32)
3369 *wmask |= 1 << reg;
3370 else if (reg < 48)
3371 *wmask |= 3 << ((reg - 32) * 2);
3372}
3373
3374/* Return TRUE if WMASK overwrites anything in REGS. */
3375
3376static bfd_boolean
3377bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
3378{
3379 int i;
3380
3381 for (i = 0; i < numregs; i++)
3382 {
3383 unsigned int reg = regs[i];
3384
3385 if (reg < 32 && (wmask & (1 << reg)) != 0)
3386 return TRUE;
3387
3388 reg -= 32;
3389
3390 if (reg >= 16)
3391 continue;
3392
3393 if ((wmask & (3 << (reg * 2))) != 0)
3394 return TRUE;
3395 }
3396
3397 return FALSE;
3398}
3399
3400/* In this function, we're interested in two things: finding input registers
3401 for VFP data-processing instructions, and finding the set of registers which
3402 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
3403 hold the written set, so FLDM etc. are easy to deal with (we're only
3404 interested in 32 SP registers or 16 dp registers, due to the VFP version
3405 implemented by the chip in question). DP registers are marked by setting
3406 both SP registers in the write mask). */
3407
3408static enum bfd_arm_vfp11_pipe
3409bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
3410 int *numregs)
3411{
3412 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
3413 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
3414
3415 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
3416 {
3417 unsigned int pqrs;
3418 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3419 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3420
3421 pqrs = ((insn & 0x00800000) >> 20)
3422 | ((insn & 0x00300000) >> 19)
3423 | ((insn & 0x00000040) >> 6);
3424
3425 switch (pqrs)
3426 {
3427 case 0: /* fmac[sd]. */
3428 case 1: /* fnmac[sd]. */
3429 case 2: /* fmsc[sd]. */
3430 case 3: /* fnmsc[sd]. */
3431 pipe = VFP11_FMAC;
3432 bfd_arm_vfp11_write_mask (destmask, fd);
3433 regs[0] = fd;
3434 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3435 regs[2] = fm;
3436 *numregs = 3;
3437 break;
3438
3439 case 4: /* fmul[sd]. */
3440 case 5: /* fnmul[sd]. */
3441 case 6: /* fadd[sd]. */
3442 case 7: /* fsub[sd]. */
3443 pipe = VFP11_FMAC;
3444 goto vfp_binop;
3445
3446 case 8: /* fdiv[sd]. */
3447 pipe = VFP11_DS;
3448 vfp_binop:
3449 bfd_arm_vfp11_write_mask (destmask, fd);
3450 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3451 regs[1] = fm;
3452 *numregs = 2;
3453 break;
3454
3455 case 15: /* extended opcode. */
3456 {
3457 unsigned int extn = ((insn >> 15) & 0x1e)
3458 | ((insn >> 7) & 1);
3459
3460 switch (extn)
3461 {
3462 case 0: /* fcpy[sd]. */
3463 case 1: /* fabs[sd]. */
3464 case 2: /* fneg[sd]. */
3465 case 8: /* fcmp[sd]. */
3466 case 9: /* fcmpe[sd]. */
3467 case 10: /* fcmpz[sd]. */
3468 case 11: /* fcmpez[sd]. */
3469 case 16: /* fuito[sd]. */
3470 case 17: /* fsito[sd]. */
3471 case 24: /* ftoui[sd]. */
3472 case 25: /* ftouiz[sd]. */
3473 case 26: /* ftosi[sd]. */
3474 case 27: /* ftosiz[sd]. */
3475 /* These instructions will not bounce due to underflow. */
3476 *numregs = 0;
3477 pipe = VFP11_FMAC;
3478 break;
3479
3480 case 3: /* fsqrt[sd]. */
3481 /* fsqrt cannot underflow, but it can (perhaps) overwrite
3482 registers to cause the erratum in previous instructions. */
3483 bfd_arm_vfp11_write_mask (destmask, fd);
3484 pipe = VFP11_DS;
3485 break;
3486
3487 case 15: /* fcvt{ds,sd}. */
3488 {
3489 int rnum = 0;
3490
3491 bfd_arm_vfp11_write_mask (destmask, fd);
3492
3493 /* Only FCVTSD can underflow. */
3494 if ((insn & 0x100) != 0)
3495 regs[rnum++] = fm;
3496
3497 *numregs = rnum;
3498
3499 pipe = VFP11_FMAC;
3500 }
3501 break;
3502
3503 default:
3504 return VFP11_BAD;
3505 }
3506 }
3507 break;
3508
3509 default:
3510 return VFP11_BAD;
3511 }
3512 }
3513 /* Two-register transfer. */
3514 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
3515 {
3516 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3517
3518 if ((insn & 0x100000) == 0)
3519 {
3520 if (is_double)
3521 bfd_arm_vfp11_write_mask (destmask, fm);
3522 else
3523 {
3524 bfd_arm_vfp11_write_mask (destmask, fm);
3525 bfd_arm_vfp11_write_mask (destmask, fm + 1);
3526 }
3527 }
3528
3529 pipe = VFP11_LS;
3530 }
3531 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
3532 {
3533 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3534 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
3535
3536 switch (puw)
3537 {
3538 case 0: /* Two-reg transfer. We should catch these above. */
3539 abort ();
3540
3541 case 2: /* fldm[sdx]. */
3542 case 3:
3543 case 5:
3544 {
3545 unsigned int i, offset = insn & 0xff;
3546
3547 if (is_double)
3548 offset >>= 1;
3549
3550 for (i = fd; i < fd + offset; i++)
3551 bfd_arm_vfp11_write_mask (destmask, i);
3552 }
3553 break;
3554
3555 case 4: /* fld[sd]. */
3556 case 6:
3557 bfd_arm_vfp11_write_mask (destmask, fd);
3558 break;
3559
3560 default:
3561 return VFP11_BAD;
3562 }
3563
3564 pipe = VFP11_LS;
3565 }
3566 /* Single-register transfer. Note L==0. */
3567 else if ((insn & 0x0f100e10) == 0x0e000a10)
3568 {
3569 unsigned int opcode = (insn >> 21) & 7;
3570 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
3571
3572 switch (opcode)
3573 {
3574 case 0: /* fmsr/fmdlr. */
3575 case 1: /* fmdhr. */
3576 /* Mark fmdhr and fmdlr as writing to the whole of the DP
3577 destination register. I don't know if this is exactly right,
3578 but it is the conservative choice. */
3579 bfd_arm_vfp11_write_mask (destmask, fn);
3580 break;
3581
3582 case 7: /* fmxr. */
3583 break;
3584 }
3585
3586 pipe = VFP11_LS;
3587 }
3588
3589 return pipe;
3590}
3591
3592
3593static int elf32_arm_compare_mapping (const void * a, const void * b);
3594
3595
3596/* Look for potentially-troublesome code sequences which might trigger the
3597 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
3598 (available from ARM) for details of the erratum. A short version is
3599 described in ld.texinfo. */
3600
3601bfd_boolean
3602bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
3603{
3604 asection *sec;
3605 bfd_byte *contents = NULL;
3606 int state = 0;
3607 int regs[3], numregs = 0;
3608 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
3609 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
3610
3611 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
3612 The states transition as follows:
3613
3614 0 -> 1 (vector) or 0 -> 2 (scalar)
3615 A VFP FMAC-pipeline instruction has been seen. Fill
3616 regs[0]..regs[numregs-1] with its input operands. Remember this
3617 instruction in 'first_fmac'.
3618
3619 1 -> 2
3620 Any instruction, except for a VFP instruction which overwrites
3621 regs[*].
3622
3623 1 -> 3 [ -> 0 ] or
3624 2 -> 3 [ -> 0 ]
3625 A VFP instruction has been seen which overwrites any of regs[*].
3626 We must make a veneer! Reset state to 0 before examining next
3627 instruction.
3628
3629 2 -> 0
3630 If we fail to match anything in state 2, reset to state 0 and reset
3631 the instruction pointer to the instruction after 'first_fmac'.
3632
3633 If the VFP11 vector mode is in use, there must be at least two unrelated
3634 instructions between anti-dependent VFP11 instructions to properly avoid
3635 triggering the erratum, hence the use of the extra state 1.
3636 */
3637
3638 /* If we are only performing a partial link do not bother
3639 to construct any glue. */
3640 if (link_info->relocatable)
3641 return TRUE;
3642
3643 /* We should have chosen a fix type by the time we get here. */
3644 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
3645
3646 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
3647 return TRUE;
2e6030b9
MS		 3648
3649 /* Skip if this bfd does not correspond to an ELF image. */
3650 if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
3651 return TRUE;
c7b8f16e
JB		 3652
3653 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3654 {
3655 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
3656 struct _arm_elf_section_data *sec_data;
3657
3658 /* If we don't have executable progbits, we're not interested in this
3659 section. Also skip if section is to be excluded. */
3660 if (elf_section_type (sec) != SHT_PROGBITS
3661 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
3662 || (sec->flags & SEC_EXCLUDE) != 0
3663 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
3664 continue;
3665
3666 sec_data = elf32_arm_section_data (sec);
3667
3668 if (sec_data->mapcount == 0)
3669 continue;
3670
3671 if (elf_section_data (sec)->this_hdr.contents != NULL)
3672 contents = elf_section_data (sec)->this_hdr.contents;
3673 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
3674 goto error_return;
3675
3676 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
3677 elf32_arm_compare_mapping);
3678
3679 for (span = 0; span < sec_data->mapcount; span++)
3680 {
3681 unsigned int span_start = sec_data->map[span].vma;
3682 unsigned int span_end = (span == sec_data->mapcount - 1)
3683 ? sec->size : sec_data->map[span + 1].vma;
3684 char span_type = sec_data->map[span].type;
3685
3686 /* FIXME: Only ARM mode is supported at present. We may need to
3687 support Thumb-2 mode also at some point. */
3688 if (span_type != 'a')
3689 continue;
3690
3691 for (i = span_start; i < span_end;)
3692 {
3693 unsigned int next_i = i + 4;
3694 unsigned int insn = bfd_big_endian (abfd)
3695 ? (contents[i] << 24)
3696 | (contents[i + 1] << 16)
3697 | (contents[i + 2] << 8)
3698 | contents[i + 3]
3699 : (contents[i + 3] << 24)
3700 | (contents[i + 2] << 16)
3701 | (contents[i + 1] << 8)
3702 | contents[i];
3703 unsigned int writemask = 0;
3704 enum bfd_arm_vfp11_pipe pipe;
3705
3706 switch (state)
3707 {
3708 case 0:
3709 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
3710 &numregs);
3711 /* I'm assuming the VFP11 erratum can trigger with denorm
3712 operands on either the FMAC or the DS pipeline. This might
3713 lead to slightly overenthusiastic veneer insertion. */
3714 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
3715 {
3716 state = use_vector ? 1 : 2;
3717 first_fmac = i;
3718 veneer_of_insn = insn;
3719 }
3720 break;
3721
3722 case 1:
3723 {
3724 int other_regs[3], other_numregs;
3725 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3726 other_regs,
3727 &other_numregs);
3728 if (pipe != VFP11_BAD
3729 && bfd_arm_vfp11_antidependency (writemask, regs,
3730 numregs))
3731 state = 3;
3732 else
3733 state = 2;
3734 }
3735 break;
3736
3737 case 2:
3738 {
3739 int other_regs[3], other_numregs;
3740 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3741 other_regs,
3742 &other_numregs);
3743 if (pipe != VFP11_BAD
3744 && bfd_arm_vfp11_antidependency (writemask, regs,
3745 numregs))
3746 state = 3;
3747 else
3748 {
3749 state = 0;
3750 next_i = first_fmac + 4;
3751 }
3752 }
3753 break;
3754
3755 case 3:
3756 abort (); /* Should be unreachable. */
3757 }
3758
3759 if (state == 3)
3760 {
3761 elf32_vfp11_erratum_list *newerr
3762 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3763 int errcount;
3764
3765 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
3766
3767 newerr->u.b.vfp_insn = veneer_of_insn;
3768
3769 switch (span_type)
3770 {
3771 case 'a':
3772 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
3773 break;
3774
3775 default:
3776 abort ();
3777 }
3778
3779 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
3780 first_fmac);
3781
3782 newerr->vma = -1;
3783
3784 newerr->next = sec_data->erratumlist;
3785 sec_data->erratumlist = newerr;
3786
3787 state = 0;
3788 }
3789
3790 i = next_i;
3791 }
3792 }
3793
3794 if (contents != NULL
3795 && elf_section_data (sec)->this_hdr.contents != contents)
3796 free (contents);
3797 contents = NULL;
3798 }
3799
3800 return TRUE;
3801
3802error_return:
3803 if (contents != NULL
3804 && elf_section_data (sec)->this_hdr.contents != contents)
3805 free (contents);
3806
3807 return FALSE;
3808}
3809
3810/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
3811 after sections have been laid out, using specially-named symbols. */
3812
3813void
3814bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
3815 struct bfd_link_info *link_info)
3816{
3817 asection *sec;
3818 struct elf32_arm_link_hash_table *globals;
3819 char *tmp_name;
3820
3821 if (link_info->relocatable)
3822 return;
2e6030b9
MS		 3823
3824 /* Skip if this bfd does not correspond to an ELF image. */
3825 if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
3826 return;
3827
c7b8f16e
JB		 3828 globals = elf32_arm_hash_table (link_info);
3829
3830 tmp_name = bfd_malloc ((bfd_size_type) strlen
3831 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
3832
3833 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3834 {
3835 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
3836 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
3837
3838 for (; errnode != NULL; errnode = errnode->next)
3839 {
3840 struct elf_link_hash_entry *myh;
3841 bfd_vma vma;
3842
3843 switch (errnode->type)
3844 {
3845 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
3846 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
3847 /* Find veneer symbol. */
3848 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3849 errnode->u.b.veneer->u.v.id);
3850
3851 myh = elf_link_hash_lookup
3852 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3853
3854 if (myh == NULL)
3855 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3856 "`%s'"), abfd, tmp_name);
3857
3858 vma = myh->root.u.def.section->output_section->vma
3859 + myh->root.u.def.section->output_offset
3860 + myh->root.u.def.value;
3861
3862 errnode->u.b.veneer->vma = vma;
3863 break;
3864
3865 case VFP11_ERRATUM_ARM_VENEER:
3866 case VFP11_ERRATUM_THUMB_VENEER:
3867 /* Find return location. */
3868 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
3869 errnode->u.v.id);
3870
3871 myh = elf_link_hash_lookup
3872 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3873
3874 if (myh == NULL)
3875 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3876 "`%s'"), abfd, tmp_name);
3877
3878 vma = myh->root.u.def.section->output_section->vma
3879 + myh->root.u.def.section->output_offset
3880 + myh->root.u.def.value;
3881
3882 errnode->u.v.branch->vma = vma;
3883 break;
3884
3885 default:
3886 abort ();
3887 }
3888 }
3889 }
3890
3891 free (tmp_name);
3892}
3893
3894
eb043451
PB		 3895/* Set target relocation values needed during linking. */
3896
3897void
bf21ed78
MS		 3898bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
3899 struct bfd_link_info *link_info,
eb043451 3900 int target1_is_rel,
319850b4 3901 char * target2_type,
33bfe774 3902 int fix_v4bx,
c7b8f16e 3903 int use_blx,
bf21ed78 3904 bfd_arm_vfp11_fix vfp11_fix,
27e55c4d 3905 int no_enum_warn, int pic_veneer)
eb043451
PB		 3906{
3907 struct elf32_arm_link_hash_table *globals;
3908
3909 globals = elf32_arm_hash_table (link_info);
3910
3911 globals->target1_is_rel = target1_is_rel;
3912 if (strcmp (target2_type, "rel") == 0)
3913 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 3914 else if (strcmp (target2_type, "abs") == 0)
3915 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 3916 else if (strcmp (target2_type, "got-rel") == 0)
3917 globals->target2_reloc = R_ARM_GOT_PREL;
3918 else
3919 {
3920 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
3921 target2_type);
3922 }
319850b4 3923 globals->fix_v4bx = fix_v4bx;
33bfe774 3924 globals->use_blx |= use_blx;
c7b8f16e 3925 globals->vfp11_fix = vfp11_fix;
27e55c4d 3926 globals->pic_veneer = pic_veneer;
bf21ed78
MS		 3927
3928 elf32_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
eb043451 3929}
eb043451 3930
252b5132
RH		 3931/* The thumb form of a long branch is a bit finicky, because the offset
3932 encoding is split over two fields, each in it's own instruction. They
f21f3fe0 3933 can occur in any order. So given a thumb form of long branch, and an
252b5132 3934 offset, insert the offset into the thumb branch and return finished
f21f3fe0 3935 instruction.
252b5132 3936
f21f3fe0 3937 It takes two thumb instructions to encode the target address. Each has
4cc11e76 3938 11 bits to invest. The upper 11 bits are stored in one (identified by
f21f3fe0
UD		 3939 H-0.. see below), the lower 11 bits are stored in the other (identified
3940 by H-1).
252b5132 3941
f21f3fe0 3942 Combine together and shifted left by 1 (it's a half word address) and
252b5132
RH		 3943 there you have it.
3944
3945 Op: 1111 = F,
3946 H-0, upper address-0 = 000
3947 Op: 1111 = F,
3948 H-1, lower address-0 = 800
3949
f21f3fe0 3950 They can be ordered either way, but the arm tools I've seen always put
252b5132
RH		 3951 the lower one first. It probably doesn't matter. krk@cygnus.com
3952
3953 XXX: Actually the order does matter. The second instruction (H-1)
3954 moves the computed address into the PC, so it must be the second one
3955 in the sequence. The problem, however is that whilst little endian code
3956 stores the instructions in HI then LOW order, big endian code does the
dfc5f959 3957 reverse. nickc@cygnus.com. */
252b5132 3958
dfc5f959
NC		 3959#define LOW_HI_ORDER 0xF800F000
3960#define HI_LOW_ORDER 0xF000F800
252b5132
RH		 3961
3962static insn32
57e8b36a 3963insert_thumb_branch (insn32 br_insn, int rel_off)
252b5132
RH		 3964{
3965 unsigned int low_bits;
3966 unsigned int high_bits;
3967
252b5132
RH		 3968 BFD_ASSERT ((rel_off & 1) != 1);
3969
dfc5f959
NC		 3970 rel_off >>= 1; /* Half word aligned address. */
3971 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
3972 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
252b5132
RH		 3973
3974 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
3975 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
3976 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
3977 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
3978 else
9b485d32 3979 /* FIXME: abort is probably not the right call. krk@cygnus.com */
57e8b36a 3980 abort (); /* Error - not a valid branch instruction form. */
252b5132 3981
252b5132
RH		 3982 return br_insn;
3983}
3984
52ab56c2
PB		 3985
3986/* Store an Arm insn into an output section not processed by
3987 elf32_arm_write_section. */
3988
3989static void
3990put_arm_insn (struct elf32_arm_link_hash_table *htab,
3991 bfd * output_bfd, bfd_vma val, void * ptr)
3992{
3993 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3994 bfd_putl32 (val, ptr);
3995 else
3996 bfd_putb32 (val, ptr);
3997}
3998
3999
4000/* Store a 16-bit Thumb insn into an output section not processed by
4001 elf32_arm_write_section. */
4002
4003static void
4004put_thumb_insn (struct elf32_arm_link_hash_table *htab,
4005 bfd * output_bfd, bfd_vma val, void * ptr)
4006{
4007 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4008 bfd_putl16 (val, ptr);
4009 else
4010 bfd_putb16 (val, ptr);
4011}
4012
4013
9b485d32
NC		 4014/* Thumb code calling an ARM function. */
4015
252b5132 4016static int
57e8b36a
NC		 4017elf32_thumb_to_arm_stub (struct bfd_link_info * info,
4018 const char * name,
4019 bfd * input_bfd,
4020 bfd * output_bfd,
4021 asection * input_section,
4022 bfd_byte * hit_data,
4023 asection * sym_sec,
4024 bfd_vma offset,
4025 bfd_signed_vma addend,
f2a9dd69
DJ		 4026 bfd_vma val,
4027 char **error_message)
252b5132 4028{
bcbdc74c 4029 asection * s = 0;
dc810e39 4030 bfd_vma my_offset;
252b5132
RH		 4031 unsigned long int tmp;
4032 long int ret_offset;
bcbdc74c
NC		 4033 struct elf_link_hash_entry * myh;
4034 struct elf32_arm_link_hash_table * globals;
252b5132 4035
f2a9dd69 4036 myh = find_thumb_glue (info, name, error_message);
252b5132 4037 if (myh == NULL)
b34976b6 4038 return FALSE;
252b5132
RH		 4039
4040 globals = elf32_arm_hash_table (info);
4041
4042 BFD_ASSERT (globals != NULL);
4043 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4044
4045 my_offset = myh->root.u.def.value;
4046
4047 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4048 THUMB2ARM_GLUE_SECTION_NAME);
4049
4050 BFD_ASSERT (s != NULL);
4051 BFD_ASSERT (s->contents != NULL);
4052 BFD_ASSERT (s->output_section != NULL);
4053
4054 if ((my_offset & 0x01) == 0x01)
4055 {
4056 if (sym_sec != NULL
4057 && sym_sec->owner != NULL
4058 && !INTERWORK_FLAG (sym_sec->owner))
4059 {
8f615d07 4060 (*_bfd_error_handler)
d003868e
AM		 4061 (_("%B(%s): warning: interworking not enabled.\n"
4062 " first occurrence: %B: thumb call to arm"),
4063 sym_sec->owner, input_bfd, name);
252b5132 4064
b34976b6 4065 return FALSE;
252b5132
RH		 4066 }
4067
4068 --my_offset;
4069 myh->root.u.def.value = my_offset;
4070
52ab56c2
PB		 4071 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
4072 s->contents + my_offset);
252b5132 4073
52ab56c2
PB		 4074 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
4075 s->contents + my_offset + 2);
252b5132
RH		 4076
4077 ret_offset =
9b485d32
NC		 4078 /* Address of destination of the stub. */
4079 ((bfd_signed_vma) val)
252b5132 4080 - ((bfd_signed_vma)
57e8b36a
NC		 4081 /* Offset from the start of the current section
4082 to the start of the stubs. */
9b485d32
NC		 4083 (s->output_offset
4084 /* Offset of the start of this stub from the start of the stubs. */
4085 + my_offset
4086 /* Address of the start of the current section. */
4087 + s->output_section->vma)
4088 /* The branch instruction is 4 bytes into the stub. */
4089 + 4
4090 /* ARM branches work from the pc of the instruction + 8. */
4091 + 8);
252b5132 4092
52ab56c2
PB		 4093 put_arm_insn (globals, output_bfd,
4094 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
4095 s->contents + my_offset + 4);
252b5132
RH		 4096 }
4097
4098 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
4099
427bfd90
NC		 4100 /* Now go back and fix up the original BL insn to point to here. */
4101 ret_offset =
4102 /* Address of where the stub is located. */
4103 (s->output_section->vma + s->output_offset + my_offset)
4104 /* Address of where the BL is located. */
57e8b36a
NC		 4105 - (input_section->output_section->vma + input_section->output_offset
4106 + offset)
427bfd90
NC		 4107 /* Addend in the relocation. */
4108 - addend
4109 /* Biassing for PC-relative addressing. */
4110 - 8;
252b5132
RH		 4111
4112 tmp = bfd_get_32 (input_bfd, hit_data
4113 - input_section->vma);
4114
4115 bfd_put_32 (output_bfd,
dc810e39 4116 (bfd_vma) insert_thumb_branch (tmp, ret_offset),
252b5132
RH		 4117 hit_data - input_section->vma);
4118
b34976b6 4119 return TRUE;
252b5132
RH		 4120}
4121
a4fd1a8e 4122/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 4123
a4fd1a8e
PB		 4124static struct elf_link_hash_entry *
4125elf32_arm_create_thumb_stub (struct bfd_link_info * info,
4126 const char * name,
4127 bfd * input_bfd,
4128 bfd * output_bfd,
4129 asection * sym_sec,
4130 bfd_vma val,
f2a9dd69
DJ		 4131 asection *s,
4132 char **error_message)
252b5132 4133{
dc810e39 4134 bfd_vma my_offset;
252b5132 4135 long int ret_offset;
bcbdc74c
NC		 4136 struct elf_link_hash_entry * myh;
4137 struct elf32_arm_link_hash_table * globals;
252b5132 4138
f2a9dd69 4139 myh = find_arm_glue (info, name, error_message);
252b5132 4140 if (myh == NULL)
a4fd1a8e 4141 return NULL;
252b5132
RH		 4142
4143 globals = elf32_arm_hash_table (info);
4144
4145 BFD_ASSERT (globals != NULL);
4146 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4147
4148 my_offset = myh->root.u.def.value;
252b5132
RH		 4149
4150 if ((my_offset & 0x01) == 0x01)
4151 {
4152 if (sym_sec != NULL
4153 && sym_sec->owner != NULL
4154 && !INTERWORK_FLAG (sym_sec->owner))
4155 {
8f615d07 4156 (*_bfd_error_handler)
d003868e
AM		 4157 (_("%B(%s): warning: interworking not enabled.\n"
4158 " first occurrence: %B: arm call to thumb"),
4159 sym_sec->owner, input_bfd, name);
252b5132 4160 }
9b485d32 4161
252b5132
RH		 4162 --my_offset;
4163 myh->root.u.def.value = my_offset;
4164
27e55c4d
PB		 4165 if (info->shared || globals->root.is_relocatable_executable
4166 || globals->pic_veneer)
8f6277f5
PB		 4167 {
4168 /* For relocatable objects we can't use absolute addresses,
4169 so construct the address from a relative offset. */
4170 /* TODO: If the offset is small it's probably worth
4171 constructing the address with adds. */
52ab56c2
PB		 4172 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
4173 s->contents + my_offset);
4174 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
4175 s->contents + my_offset + 4);
4176 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
4177 s->contents + my_offset + 8);
8f6277f5
PB		 4178 /* Adjust the offset by 4 for the position of the add,
4179 and 8 for the pipeline offset. */
4180 ret_offset = (val - (s->output_offset
4181 + s->output_section->vma
4182 + my_offset + 12))
4183 | 1;
4184 bfd_put_32 (output_bfd, ret_offset,
4185 s->contents + my_offset + 12);
4186 }
26079076
PB		 4187 else if (globals->use_blx)
4188 {
4189 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
4190 s->contents + my_offset);
4191
4192 /* It's a thumb address. Add the low order bit. */
4193 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
4194 s->contents + my_offset + 4);
4195 }
8f6277f5
PB		 4196 else
4197 {
52ab56c2
PB		 4198 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
4199 s->contents + my_offset);
252b5132 4200
52ab56c2
PB		 4201 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
4202 s->contents + my_offset + 4);
252b5132 4203
8f6277f5
PB		 4204 /* It's a thumb address. Add the low order bit. */
4205 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
4206 s->contents + my_offset + 8);
4207 }
252b5132
RH		 4208 }
4209
4210 BFD_ASSERT (my_offset <= globals->arm_glue_size);
4211
a4fd1a8e
PB		 4212 return myh;
4213}
4214
4215/* Arm code calling a Thumb function. */
4216
4217static int
4218elf32_arm_to_thumb_stub (struct bfd_link_info * info,
4219 const char * name,
4220 bfd * input_bfd,
4221 bfd * output_bfd,
4222 asection * input_section,
4223 bfd_byte * hit_data,
4224 asection * sym_sec,
4225 bfd_vma offset,
4226 bfd_signed_vma addend,
f2a9dd69
DJ		 4227 bfd_vma val,
4228 char **error_message)
a4fd1a8e
PB		 4229{
4230 unsigned long int tmp;
4231 bfd_vma my_offset;
4232 asection * s;
4233 long int ret_offset;
4234 struct elf_link_hash_entry * myh;
4235 struct elf32_arm_link_hash_table * globals;
4236
4237 globals = elf32_arm_hash_table (info);
4238
4239 BFD_ASSERT (globals != NULL);
4240 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4241
4242 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4243 ARM2THUMB_GLUE_SECTION_NAME);
4244 BFD_ASSERT (s != NULL);
4245 BFD_ASSERT (s->contents != NULL);
4246 BFD_ASSERT (s->output_section != NULL);
4247
4248 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 4249 sym_sec, val, s, error_message);
a4fd1a8e
PB		 4250 if (!myh)
4251 return FALSE;
4252
4253 my_offset = myh->root.u.def.value;
252b5132
RH		 4254 tmp = bfd_get_32 (input_bfd, hit_data);
4255 tmp = tmp & 0xFF000000;
4256
9b485d32 4257 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 4258 ret_offset = (s->output_offset
4259 + my_offset
4260 + s->output_section->vma
4261 - (input_section->output_offset
4262 + input_section->output_section->vma
4263 + offset + addend)
4264 - 8);
9a5aca8c 4265
252b5132
RH		 4266 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
4267
dc810e39 4268 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 4269
b34976b6 4270 return TRUE;
252b5132
RH		 4271}
4272
a4fd1a8e
PB		 4273/* Populate Arm stub for an exported Thumb function. */
4274
4275static bfd_boolean
4276elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
4277{
4278 struct bfd_link_info * info = (struct bfd_link_info *) inf;
4279 asection * s;
4280 struct elf_link_hash_entry * myh;
4281 struct elf32_arm_link_hash_entry *eh;
4282 struct elf32_arm_link_hash_table * globals;
4283 asection *sec;
4284 bfd_vma val;
f2a9dd69 4285 char *error_message;
a4fd1a8e
PB		 4286
4287 eh = elf32_arm_hash_entry(h);
4288 /* Allocate stubs for exported Thumb functions on v4t. */
4289 if (eh->export_glue == NULL)
4290 return TRUE;
4291
4292 globals = elf32_arm_hash_table (info);
4293
4294 BFD_ASSERT (globals != NULL);
4295 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4296
4297 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4298 ARM2THUMB_GLUE_SECTION_NAME);
4299 BFD_ASSERT (s != NULL);
4300 BFD_ASSERT (s->contents != NULL);
4301 BFD_ASSERT (s->output_section != NULL);
4302
4303 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 4304
4305 BFD_ASSERT (sec->output_section != NULL);
4306
a4fd1a8e
PB		 4307 val = eh->export_glue->root.u.def.value + sec->output_offset
4308 + sec->output_section->vma;
4309 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
4310 h->root.u.def.section->owner,
f2a9dd69
DJ		 4311 globals->obfd, sec, val, s,
4312 &error_message);
a4fd1a8e
PB		 4313 BFD_ASSERT (myh);
4314 return TRUE;
4315}
4316
4317/* Generate Arm stubs for exported Thumb symbols. */
4318static void
4319elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
4320 struct bfd_link_info *link_info)
4321{
4322 struct elf32_arm_link_hash_table * globals;
4323
4324 if (!link_info)
4325 return;
4326
4327 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 4328 /* If blx is available then exported Thumb symbols are OK and there is
4329 nothing to do. */
a4fd1a8e
PB		 4330 if (globals->use_blx)
4331 return;
4332
4333 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
4334 link_info);
4335}
4336
eb043451
PB		 4337/* Some relocations map to different relocations depending on the
4338 target. Return the real relocation. */
4339static int
4340arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
4341 int r_type)
4342{
4343 switch (r_type)
4344 {
4345 case R_ARM_TARGET1:
4346 if (globals->target1_is_rel)
4347 return R_ARM_REL32;
4348 else
4349 return R_ARM_ABS32;
4350
4351 case R_ARM_TARGET2:
4352 return globals->target2_reloc;
4353
4354 default:
4355 return r_type;
4356 }
4357}
eb043451 4358
ba93b8ac
DJ		 4359/* Return the base VMA address which should be subtracted from real addresses
4360 when resolving @dtpoff relocation.
4361 This is PT_TLS segment p_vaddr. */
4362
4363static bfd_vma
4364dtpoff_base (struct bfd_link_info *info)
4365{
4366 /* If tls_sec is NULL, we should have signalled an error already. */
4367 if (elf_hash_table (info)->tls_sec == NULL)
4368 return 0;
4369 return elf_hash_table (info)->tls_sec->vma;
4370}
4371
4372/* Return the relocation value for @tpoff relocation
4373 if STT_TLS virtual address is ADDRESS. */
4374
4375static bfd_vma
4376tpoff (struct bfd_link_info *info, bfd_vma address)
4377{
4378 struct elf_link_hash_table *htab = elf_hash_table (info);
4379 bfd_vma base;
4380
4381 /* If tls_sec is NULL, we should have signalled an error already. */
4382 if (htab->tls_sec == NULL)
4383 return 0;
4384 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
4385 return address - htab->tls_sec->vma + base;
4386}
4387
00a97672
RS		 4388/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
4389 VALUE is the relocation value. */
4390
4391static bfd_reloc_status_type
4392elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
4393{
4394 if (value > 0xfff)
4395 return bfd_reloc_overflow;
4396
4397 value |= bfd_get_32 (abfd, data) & 0xfffff000;
4398 bfd_put_32 (abfd, value, data);
4399 return bfd_reloc_ok;
4400}
4401
4962c51a
MS		 4402/* For a given value of n, calculate the value of G_n as required to
4403 deal with group relocations. We return it in the form of an
4404 encoded constant-and-rotation, together with the final residual. If n is
4405 specified as less than zero, then final_residual is filled with the
4406 input value and no further action is performed. */
4407
4408static bfd_vma
4409calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
4410{
4411 int current_n;
4412 bfd_vma g_n;
4413 bfd_vma encoded_g_n = 0;
4414 bfd_vma residual = value; /* Also known as Y_n. */
4415
4416 for (current_n = 0; current_n <= n; current_n++)
4417 {
4418 int shift;
4419
4420 /* Calculate which part of the value to mask. */
4421 if (residual == 0)
4422 shift = 0;
4423 else
4424 {
4425 int msb;
4426
4427 /* Determine the most significant bit in the residual and
4428 align the resulting value to a 2-bit boundary. */
4429 for (msb = 30; msb >= 0; msb -= 2)
4430 if (residual & (3 << msb))
4431 break;
4432
4433 /* The desired shift is now (msb - 6), or zero, whichever
4434 is the greater. */
4435 shift = msb - 6;
4436 if (shift < 0)
4437 shift = 0;
4438 }
4439
4440 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
4441 g_n = residual & (0xff << shift);
4442 encoded_g_n = (g_n >> shift)
4443 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4444
4445 /* Calculate the residual for the next time around. */
4446 residual &= ~g_n;
4447 }
4448
4449 *final_residual = residual;
4450
4451 return encoded_g_n;
4452}
4453
4454/* Given an ARM instruction, determine whether it is an ADD or a SUB.
4455 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
4456static int
4457identify_add_or_sub(bfd_vma insn)
4458{
4459 int opcode = insn & 0x1e00000;
4460
4461 if (opcode == 1 << 23) /* ADD */
4462 return 1;
4463
4464 if (opcode == 1 << 22) /* SUB */
4465 return -1;
4466
4467 return 0;
4468}
4469
e95de063
MS		 4470/* Determine if we're dealing with a Thumb-2 object. */
4471
4472static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
4473{
104d59d1
JM		 4474 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4475 Tag_CPU_arch);
e95de063
MS		 4476 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
4477}
4478
252b5132 4479/* Perform a relocation as part of a final link. */
9b485d32 4480
252b5132 4481static bfd_reloc_status_type
57e8b36a
NC		 4482elf32_arm_final_link_relocate (reloc_howto_type * howto,
4483 bfd * input_bfd,
4484 bfd * output_bfd,
4485 asection * input_section,
4486 bfd_byte * contents,
4487 Elf_Internal_Rela * rel,
4488 bfd_vma value,
4489 struct bfd_link_info * info,
4490 asection * sym_sec,
4491 const char * sym_name,
4492 int sym_flags,
0945cdfd 4493 struct elf_link_hash_entry * h,
f2a9dd69
DJ		 4494 bfd_boolean * unresolved_reloc_p,
4495 char **error_message)
252b5132
RH		 4496{
4497 unsigned long r_type = howto->type;
4498 unsigned long r_symndx;
4499 bfd_byte * hit_data = contents + rel->r_offset;
4500 bfd * dynobj = NULL;
4501 Elf_Internal_Shdr * symtab_hdr;
4502 struct elf_link_hash_entry ** sym_hashes;
4503 bfd_vma * local_got_offsets;
4504 asection * sgot = NULL;
4505 asection * splt = NULL;
4506 asection * sreloc = NULL;
252b5132 4507 bfd_vma addend;
ba96a88f
NC		 4508 bfd_signed_vma signed_addend;
4509 struct elf32_arm_link_hash_table * globals;
f21f3fe0 4510
9c504268
PB		 4511 globals = elf32_arm_hash_table (info);
4512
9c504268
PB		 4513 /* Some relocation type map to different relocations depending on the
4514 target. We pick the right one here. */
eb043451
PB		 4515 r_type = arm_real_reloc_type (globals, r_type);
4516 if (r_type != howto->type)
4517 howto = elf32_arm_howto_from_type (r_type);
9c504268 4518
cac15327
NC		 4519 /* If the start address has been set, then set the EF_ARM_HASENTRY
4520 flag. Setting this more than once is redundant, but the cost is
4521 not too high, and it keeps the code simple.
99e4ae17 4522
cac15327
NC		 4523 The test is done here, rather than somewhere else, because the
4524 start address is only set just before the final link commences.
4525
4526 Note - if the user deliberately sets a start address of 0, the
4527 flag will not be set. */
4528 if (bfd_get_start_address (output_bfd) != 0)
4529 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 4530
252b5132
RH		 4531 dynobj = elf_hash_table (info)->dynobj;
4532 if (dynobj)
4533 {
4534 sgot = bfd_get_section_by_name (dynobj, ".got");
4535 splt = bfd_get_section_by_name (dynobj, ".plt");
4536 }
4537 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
4538 sym_hashes = elf_sym_hashes (input_bfd);
4539 local_got_offsets = elf_local_got_offsets (input_bfd);
4540 r_symndx = ELF32_R_SYM (rel->r_info);
4541
4e7fd91e 4542 if (globals->use_rel)
ba96a88f 4543 {
4e7fd91e
PB		 4544 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
4545
4546 if (addend & ((howto->src_mask + 1) >> 1))
4547 {
4548 signed_addend = -1;
4549 signed_addend &= ~ howto->src_mask;
4550 signed_addend |= addend;
4551 }
4552 else
4553 signed_addend = addend;
ba96a88f
NC		 4554 }
4555 else
4e7fd91e 4556 addend = signed_addend = rel->r_addend;
f21f3fe0 4557
252b5132
RH		 4558 switch (r_type)
4559 {
4560 case R_ARM_NONE:
28a094c2
DJ		 4561 /* We don't need to find a value for this symbol. It's just a
4562 marker. */
4563 *unresolved_reloc_p = FALSE;
252b5132
RH		 4564 return bfd_reloc_ok;
4565
00a97672
RS		 4566 case R_ARM_ABS12:
4567 if (!globals->vxworks_p)
4568 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4569
252b5132
RH		 4570 case R_ARM_PC24:
4571 case R_ARM_ABS32:
bb224fc3 4572 case R_ARM_ABS32_NOI:
252b5132 4573 case R_ARM_REL32:
bb224fc3 4574 case R_ARM_REL32_NOI:
5b5bb741
PB		 4575 case R_ARM_CALL:
4576 case R_ARM_JUMP24:
dfc5f959 4577 case R_ARM_XPC25:
eb043451 4578 case R_ARM_PREL31:
7359ea65 4579 case R_ARM_PLT32:
7359ea65
DJ		 4580 /* Handle relocations which should use the PLT entry. ABS32/REL32
4581 will use the symbol's value, which may point to a PLT entry, but we
4582 don't need to handle that here. If we created a PLT entry, all
4583 branches in this object should go to it. */
bb224fc3
MS		 4584 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
4585 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
7359ea65 4586 && h != NULL
c84cd8ee 4587 && splt != NULL
7359ea65
DJ		 4588 && h->plt.offset != (bfd_vma) -1)
4589 {
c84cd8ee
DJ		 4590 /* If we've created a .plt section, and assigned a PLT entry to
4591 this function, it should not be known to bind locally. If
4592 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 4593 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
4594
4595 value = (splt->output_section->vma
4596 + splt->output_offset
4597 + h->plt.offset);
0945cdfd 4598 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 4599 return _bfd_final_link_relocate (howto, input_bfd, input_section,
4600 contents, rel->r_offset, value,
00a97672 4601 rel->r_addend);
7359ea65
DJ		 4602 }
4603
67687978
PB		 4604 /* When generating a shared object or relocatable executable, these
4605 relocations are copied into the output file to be resolved at
4606 run time. */
4607 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 4608 && (input_section->flags & SEC_ALLOC)
bb224fc3 4609 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 4610 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 4611 && (h == NULL
4612 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
4613 || h->root.type != bfd_link_hash_undefweak)
4614 && r_type != R_ARM_PC24
5b5bb741
PB		 4615 && r_type != R_ARM_CALL
4616 && r_type != R_ARM_JUMP24
ee06dc07 4617 && r_type != R_ARM_PREL31
7359ea65 4618 && r_type != R_ARM_PLT32)
252b5132 4619 {
947216bf
AM		 4620 Elf_Internal_Rela outrel;
4621 bfd_byte *loc;
b34976b6 4622 bfd_boolean skip, relocate;
f21f3fe0 4623
0945cdfd
DJ		 4624 *unresolved_reloc_p = FALSE;
4625
252b5132
RH		 4626 if (sreloc == NULL)
4627 {
4628 const char * name;
f21f3fe0 4629
252b5132
RH		 4630 name = (bfd_elf_string_from_elf_section
4631 (input_bfd,
4632 elf_elfheader (input_bfd)->e_shstrndx,
4633 elf_section_data (input_section)->rel_hdr.sh_name));
4634 if (name == NULL)
4635 return bfd_reloc_notsupported;
f21f3fe0 4636
00a97672 4637 BFD_ASSERT (reloc_section_p (globals, name, input_section));
f21f3fe0 4638
252b5132
RH		 4639 sreloc = bfd_get_section_by_name (dynobj, name);
4640 BFD_ASSERT (sreloc != NULL);
4641 }
f21f3fe0 4642
b34976b6
AM		 4643 skip = FALSE;
4644 relocate = FALSE;
f21f3fe0 4645
00a97672 4646 outrel.r_addend = addend;
c629eae0
JJ		 4647 outrel.r_offset =
4648 _bfd_elf_section_offset (output_bfd, info, input_section,
4649 rel->r_offset);
4650 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 4651 skip = TRUE;
0bb2d96a 4652 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 4653 skip = TRUE, relocate = TRUE;
252b5132
RH		 4654 outrel.r_offset += (input_section->output_section->vma
4655 + input_section->output_offset);
f21f3fe0 4656
252b5132 4657 if (skip)
0bb2d96a 4658 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 4659 else if (h != NULL
4660 && h->dynindx != -1
7359ea65 4661 && (!info->shared
5e681ec4 4662 || !info->symbolic
f5385ebf 4663 || !h->def_regular))
5e681ec4 4664 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 4665 else
4666 {
a16385dc
MM		 4667 int symbol;
4668
5e681ec4 4669 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 4670 if (sym_flags == STT_ARM_TFUNC)
4671 value |= 1;
a16385dc 4672 if (globals->symbian_p)
6366ff1e 4673 {
74541ad4
AM		 4674 asection *osec;
4675
6366ff1e
MM		 4676 /* On Symbian OS, the data segment and text segement
4677 can be relocated independently. Therefore, we
4678 must indicate the segment to which this
4679 relocation is relative. The BPABI allows us to
4680 use any symbol in the right segment; we just use
4681 the section symbol as it is convenient. (We
4682 cannot use the symbol given by "h" directly as it
74541ad4
AM		 4683 will not appear in the dynamic symbol table.)
4684
4685 Note that the dynamic linker ignores the section
4686 symbol value, so we don't subtract osec->vma
4687 from the emitted reloc addend. */
10dbd1f3 4688 if (sym_sec)
74541ad4 4689 osec = sym_sec->output_section;
10dbd1f3 4690 else
74541ad4
AM		 4691 osec = input_section->output_section;
4692 symbol = elf_section_data (osec)->dynindx;
4693 if (symbol == 0)
4694 {
4695 struct elf_link_hash_table *htab = elf_hash_table (info);
4696
4697 if ((osec->flags & SEC_READONLY) == 0
4698 && htab->data_index_section != NULL)
4699 osec = htab->data_index_section;
4700 else
4701 osec = htab->text_index_section;
4702 symbol = elf_section_data (osec)->dynindx;
4703 }
6366ff1e
MM		 4704 BFD_ASSERT (symbol != 0);
4705 }
a16385dc
MM		 4706 else
4707 /* On SVR4-ish systems, the dynamic loader cannot
4708 relocate the text and data segments independently,
4709 so the symbol does not matter. */
4710 symbol = 0;
4711 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 4712 if (globals->use_rel)
4713 relocate = TRUE;
4714 else
4715 outrel.r_addend += value;
252b5132 4716 }
f21f3fe0 4717
947216bf 4718 loc = sreloc->contents;
00a97672
RS		 4719 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
4720 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 4721
f21f3fe0 4722 /* If this reloc is against an external symbol, we do not want to
252b5132 4723 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 4724 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 4725 if (! relocate)
4726 return bfd_reloc_ok;
9a5aca8c 4727
f21f3fe0 4728 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 4729 contents, rel->r_offset, value,
4730 (bfd_vma) 0);
4731 }
4732 else switch (r_type)
4733 {
00a97672
RS		 4734 case R_ARM_ABS12:
4735 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4736
dfc5f959 4737 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 4738 case R_ARM_CALL:
4739 case R_ARM_JUMP24:
dfc5f959 4740 case R_ARM_PC24: /* Arm B/BL instruction */
7359ea65 4741 case R_ARM_PLT32:
dfc5f959 4742 if (r_type == R_ARM_XPC25)
252b5132 4743 {
dfc5f959
NC		 4744 /* Check for Arm calling Arm function. */
4745 /* FIXME: Should we translate the instruction into a BL
4746 instruction instead ? */
4747 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 4748 (*_bfd_error_handler)
4749 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
4750 input_bfd,
4751 h ? h->root.root.string : "(local)");
dfc5f959 4752 }
39b41c9c 4753 else if (r_type != R_ARM_CALL || !globals->use_blx)
dfc5f959
NC		 4754 {
4755 /* Check for Arm calling Thumb function. */
4756 if (sym_flags == STT_ARM_TFUNC)
4757 {
f2a9dd69
DJ		 4758 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
4759 output_bfd, input_section,
4760 hit_data, sym_sec, rel->r_offset,
4761 signed_addend, value,
4762 error_message))
4763 return bfd_reloc_ok;
4764 else
4765 return bfd_reloc_dangerous;
dfc5f959 4766 }
252b5132 4767 }
ba96a88f 4768
dea514f5
PB		 4769 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
4770 where:
4771 S is the address of the symbol in the relocation.
4772 P is address of the instruction being relocated.
4773 A is the addend (extracted from the instruction) in bytes.
4774
4775 S is held in 'value'.
4776 P is the base address of the section containing the
4777 instruction plus the offset of the reloc into that
4778 section, ie:
4779 (input_section->output_section->vma +
4780 input_section->output_offset +
4781 rel->r_offset).
4782 A is the addend, converted into bytes, ie:
4783 (signed_addend * 4)
4784
4785 Note: None of these operations have knowledge of the pipeline
4786 size of the processor, thus it is up to the assembler to
4787 encode this information into the addend. */
4788 value -= (input_section->output_section->vma
4789 + input_section->output_offset);
4790 value -= rel->r_offset;
4e7fd91e
PB		 4791 if (globals->use_rel)
4792 value += (signed_addend << howto->size);
4793 else
4794 /* RELA addends do not have to be adjusted by howto->size. */
4795 value += signed_addend;
23080146 4796
dcb5e6e6
NC		 4797 signed_addend = value;
4798 signed_addend >>= howto->rightshift;
9a5aca8c 4799
5ab79981
PB		 4800 /* A branch to an undefined weak symbol is turned into a jump to
4801 the next instruction. */
4802 if (h && h->root.type == bfd_link_hash_undefweak)
4803 {
4804 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
4805 | 0x0affffff;
4806 }
4807 else
59f2c4e7 4808 {
9b485d32 4809 /* Perform a signed range check. */
dcb5e6e6 4810 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 4811 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
4812 return bfd_reloc_overflow;
9a5aca8c 4813
5ab79981 4814 addend = (value & 2);
39b41c9c 4815
5ab79981
PB		 4816 value = (signed_addend & howto->dst_mask)
4817 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 4818
5ab79981 4819 /* Set the H bit in the BLX instruction. */
39b41c9c 4820 if (sym_flags == STT_ARM_TFUNC)
39b41c9c 4821 {
5ab79981
PB		 4822 if (addend)
4823 value |= (1 << 24);
4824 else
4825 value &= ~(bfd_vma)(1 << 24);
4826 }
4827 if (r_type == R_ARM_CALL)
4828 {
4829 /* Select the correct instruction (BL or BLX). */
4830 if (sym_flags == STT_ARM_TFUNC)
4831 value |= (1 << 28);
4832 else
4833 {
4834 value &= ~(bfd_vma)(1 << 28);
4835 value |= (1 << 24);
4836 }
39b41c9c
PB		 4837 }
4838 }
252b5132 4839 break;
f21f3fe0 4840
252b5132
RH		 4841 case R_ARM_ABS32:
4842 value += addend;
4843 if (sym_flags == STT_ARM_TFUNC)
4844 value |= 1;
4845 break;
f21f3fe0 4846
bb224fc3
MS		 4847 case R_ARM_ABS32_NOI:
4848 value += addend;
4849 break;
4850
252b5132 4851 case R_ARM_REL32:
a8bc6c78
PB		 4852 value += addend;
4853 if (sym_flags == STT_ARM_TFUNC)
4854 value |= 1;
252b5132 4855 value -= (input_section->output_section->vma
62efb346 4856 + input_section->output_offset + rel->r_offset);
252b5132 4857 break;
eb043451 4858
bb224fc3
MS		 4859 case R_ARM_REL32_NOI:
4860 value += addend;
4861 value -= (input_section->output_section->vma
4862 + input_section->output_offset + rel->r_offset);
4863 break;
4864
eb043451
PB		 4865 case R_ARM_PREL31:
4866 value -= (input_section->output_section->vma
4867 + input_section->output_offset + rel->r_offset);
4868 value += signed_addend;
4869 if (! h || h->root.type != bfd_link_hash_undefweak)
4870 {
4871 /* Check for overflow */
4872 if ((value ^ (value >> 1)) & (1 << 30))
4873 return bfd_reloc_overflow;
4874 }
4875 value &= 0x7fffffff;
4876 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
4877 if (sym_flags == STT_ARM_TFUNC)
4878 value |= 1;
4879 break;
252b5132 4880 }
f21f3fe0 4881
252b5132
RH		 4882 bfd_put_32 (input_bfd, value, hit_data);
4883 return bfd_reloc_ok;
4884
4885 case R_ARM_ABS8:
4886 value += addend;
4887 if ((long) value > 0x7f || (long) value < -0x80)
4888 return bfd_reloc_overflow;
4889
4890 bfd_put_8 (input_bfd, value, hit_data);
4891 return bfd_reloc_ok;
4892
4893 case R_ARM_ABS16:
4894 value += addend;
4895
4896 if ((long) value > 0x7fff || (long) value < -0x8000)
4897 return bfd_reloc_overflow;
4898
4899 bfd_put_16 (input_bfd, value, hit_data);
4900 return bfd_reloc_ok;
4901
252b5132 4902 case R_ARM_THM_ABS5:
9b485d32 4903 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 4904 if (globals->use_rel)
4905 {
4906 /* Need to refetch addend. */
4907 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
4908 /* ??? Need to determine shift amount from operand size. */
4909 addend >>= howto->rightshift;
4910 }
252b5132
RH		 4911 value += addend;
4912
4913 /* ??? Isn't value unsigned? */
4914 if ((long) value > 0x1f || (long) value < -0x10)
4915 return bfd_reloc_overflow;
4916
4917 /* ??? Value needs to be properly shifted into place first. */
4918 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
4919 bfd_put_16 (input_bfd, value, hit_data);
4920 return bfd_reloc_ok;
4921
2cab6cc3
MS		 4922 case R_ARM_THM_ALU_PREL_11_0:
4923 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
4924 {
4925 bfd_vma insn;
4926 bfd_signed_vma relocation;
4927
4928 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
4929 | bfd_get_16 (input_bfd, hit_data + 2);
4930
4931 if (globals->use_rel)
4932 {
4933 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
4934 | ((insn & (1 << 26)) >> 15);
4935 if (insn & 0xf00000)
4936 signed_addend = -signed_addend;
4937 }
4938
4939 relocation = value + signed_addend;
4940 relocation -= (input_section->output_section->vma
4941 + input_section->output_offset
4942 + rel->r_offset);
4943
4944 value = abs (relocation);
4945
4946 if (value >= 0x1000)
4947 return bfd_reloc_overflow;
4948
4949 insn = (insn & 0xfb0f8f00) | (value & 0xff)
4950 | ((value & 0x700) << 4)
4951 | ((value & 0x800) << 15);
4952 if (relocation < 0)
4953 insn |= 0xa00000;
4954
4955 bfd_put_16 (input_bfd, insn >> 16, hit_data);
4956 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
4957
4958 return bfd_reloc_ok;
4959 }
4960
4961 case R_ARM_THM_PC12:
4962 /* Corresponds to: ldr.w reg, [pc, #offset]. */
4963 {
4964 bfd_vma insn;
4965 bfd_signed_vma relocation;
4966
4967 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
4968 | bfd_get_16 (input_bfd, hit_data + 2);
4969
4970 if (globals->use_rel)
4971 {
4972 signed_addend = insn & 0xfff;
4973 if (!(insn & (1 << 23)))
4974 signed_addend = -signed_addend;
4975 }
4976
4977 relocation = value + signed_addend;
4978 relocation -= (input_section->output_section->vma
4979 + input_section->output_offset
4980 + rel->r_offset);
4981
4982 value = abs (relocation);
4983
4984 if (value >= 0x1000)
4985 return bfd_reloc_overflow;
4986
4987 insn = (insn & 0xff7ff000) | value;
4988 if (relocation >= 0)
4989 insn |= (1 << 23);
4990
4991 bfd_put_16 (input_bfd, insn >> 16, hit_data);
4992 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
4993
4994 return bfd_reloc_ok;
4995 }
4996
dfc5f959 4997 case R_ARM_THM_XPC22:
c19d1205 4998 case R_ARM_THM_CALL:
dfc5f959 4999 /* Thumb BL (branch long instruction). */
252b5132 5000 {
b34976b6 5001 bfd_vma relocation;
e95de063 5002 bfd_vma reloc_sign;
b34976b6
AM		 5003 bfd_boolean overflow = FALSE;
5004 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5005 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 5006 bfd_signed_vma reloc_signed_max;
5007 bfd_signed_vma reloc_signed_min;
b34976b6 5008 bfd_vma check;
252b5132 5009 bfd_signed_vma signed_check;
e95de063
MS		 5010 int bitsize;
5011 int thumb2 = using_thumb2 (globals);
252b5132 5012
5ab79981
PB		 5013 /* A branch to an undefined weak symbol is turned into a jump to
5014 the next instruction. */
5015 if (h && h->root.type == bfd_link_hash_undefweak)
5016 {
5017 bfd_put_16 (input_bfd, 0xe000, hit_data);
5018 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
5019 return bfd_reloc_ok;
5020 }
5021
e95de063
MS		 5022 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
5023 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 5024 if (globals->use_rel)
5025 {
e95de063
MS		 5026 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
5027 bfd_vma upper = upper_insn & 0x3ff;
5028 bfd_vma lower = lower_insn & 0x7ff;
5029 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
5030 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
5031 bfd_vma i1 = j1 ^ s ? 0 : 1;
5032 bfd_vma i2 = j2 ^ s ? 0 : 1;
5033
5034 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
5035 /* Sign extend. */
5036 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
5037
4e7fd91e
PB		 5038 signed_addend = addend;
5039 }
cb1afa5c 5040
dfc5f959
NC		 5041 if (r_type == R_ARM_THM_XPC22)
5042 {
5043 /* Check for Thumb to Thumb call. */
5044 /* FIXME: Should we translate the instruction into a BL
5045 instruction instead ? */
5046 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 5047 (*_bfd_error_handler)
5048 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
5049 input_bfd,
5050 h ? h->root.root.string : "(local)");
dfc5f959
NC		 5051 }
5052 else
252b5132 5053 {
dfc5f959
NC		 5054 /* If it is not a call to Thumb, assume call to Arm.
5055 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 5056 function call at all, but rather a long jump. Calls through
5057 the PLT do not require stubs. */
5058 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
5059 && (h == NULL || splt == NULL
5060 || h->plt.offset == (bfd_vma) -1))
dfc5f959 5061 {
39b41c9c
PB		 5062 if (globals->use_blx)
5063 {
5064 /* Convert BL to BLX. */
5065 lower_insn = (lower_insn & ~0x1000) | 0x0800;
5066 }
5067 else if (elf32_thumb_to_arm_stub
dfc5f959 5068 (info, sym_name, input_bfd, output_bfd, input_section,
f2a9dd69
DJ		 5069 hit_data, sym_sec, rel->r_offset, signed_addend, value,
5070 error_message))
dfc5f959
NC		 5071 return bfd_reloc_ok;
5072 else
5073 return bfd_reloc_dangerous;
5074 }
39b41c9c
PB		 5075 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx)
5076 {
5077 /* Make sure this is a BL. */
5078 lower_insn |= 0x1800;
5079 }
252b5132 5080 }
f21f3fe0 5081
b7693d02
DJ		 5082 /* Handle calls via the PLT. */
5083 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5084 {
5085 value = (splt->output_section->vma
5086 + splt->output_offset
5087 + h->plt.offset);
33bfe774
JB		 5088 if (globals->use_blx)
5089 {
5090 /* If the Thumb BLX instruction is available, convert the
5091 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 5092 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 5093 }
5094 else
5095 /* Target the Thumb stub before the ARM PLT entry. */
5096 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 5097 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 5098 }
5099
ba96a88f 5100 relocation = value + signed_addend;
f21f3fe0 5101
252b5132 5102 relocation -= (input_section->output_section->vma
ba96a88f
NC		 5103 + input_section->output_offset
5104 + rel->r_offset);
9a5aca8c 5105
252b5132
RH		 5106 check = relocation >> howto->rightshift;
5107
5108 /* If this is a signed value, the rightshift just dropped
5109 leading 1 bits (assuming twos complement). */
5110 if ((bfd_signed_vma) relocation >= 0)
5111 signed_check = check;
5112 else
5113 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5114
e95de063
MS		 5115 /* Calculate the permissable maximum and minimum values for
5116 this relocation according to whether we're relocating for
5117 Thumb-2 or not. */
5118 bitsize = howto->bitsize;
5119 if (!thumb2)
5120 bitsize -= 2;
5121 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
5122 reloc_signed_min = ~reloc_signed_max;
5123
252b5132 5124 /* Assumes two's complement. */
ba96a88f 5125 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 5126 overflow = TRUE;
252b5132 5127
39b41c9c 5128 if ((lower_insn & 0x1800) == 0x0800)
c62e1cc3
NC		 5129 /* For a BLX instruction, make sure that the relocation is rounded up
5130 to a word boundary. This follows the semantics of the instruction
5131 which specifies that bit 1 of the target address will come from bit
5132 1 of the base address. */
5133 relocation = (relocation + 2) & ~ 3;
cb1afa5c 5134
e95de063
MS		 5135 /* Put RELOCATION back into the insn. Assumes two's complement.
5136 We use the Thumb-2 encoding, which is safe even if dealing with
5137 a Thumb-1 instruction by virtue of our overflow check above. */
5138 reloc_sign = (signed_check < 0) ? 1 : 0;
5139 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
5140 | ((relocation >> 12) & 0x3ff)
5141 | (reloc_sign << 10);
5142 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
5143 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
5144 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
5145 | ((relocation >> 1) & 0x7ff);
c62e1cc3 5146
252b5132
RH		 5147 /* Put the relocated value back in the object file: */
5148 bfd_put_16 (input_bfd, upper_insn, hit_data);
5149 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5150
5151 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5152 }
5153 break;
5154
c19d1205
ZW		 5155 case R_ARM_THM_JUMP24:
5156 /* Thumb32 unconditional branch instruction. */
5157 {
5158 bfd_vma relocation;
5159 bfd_boolean overflow = FALSE;
5160 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5161 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
5162 bfd_signed_vma reloc_signed_max = ((1 << (howto->bitsize - 1)) - 1) >> howto->rightshift;
5163 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
5164 bfd_vma check;
5165 bfd_signed_vma signed_check;
5166
5167 /* Need to refetch the addend, reconstruct the top three bits, and glue the
5168 two pieces together. */
5169 if (globals->use_rel)
5170 {
5171 bfd_vma S = (upper_insn & 0x0400) >> 10;
5172 bfd_vma hi = (upper_insn & 0x03ff);
5173 bfd_vma I1 = (lower_insn & 0x2000) >> 13;
5174 bfd_vma I2 = (lower_insn & 0x0800) >> 11;
5175 bfd_vma lo = (lower_insn & 0x07ff);
5176
5177 I1 = !(I1 ^ S);
5178 I2 = !(I2 ^ S);
5179 S = !S;
5180
5181 signed_addend = (S << 24) | (I1 << 23) | (I2 << 22) | (hi << 12) | (lo << 1);
5182 signed_addend -= (1 << 24); /* Sign extend. */
5183 }
5184
5185 /* ??? Should handle interworking? GCC might someday try to
5186 use this for tail calls. */
5187
5188 relocation = value + signed_addend;
5189 relocation -= (input_section->output_section->vma
5190 + input_section->output_offset
5191 + rel->r_offset);
5192
5193 check = relocation >> howto->rightshift;
5194
5195 /* If this is a signed value, the rightshift just dropped
5196 leading 1 bits (assuming twos complement). */
5197 if ((bfd_signed_vma) relocation >= 0)
5198 signed_check = check;
5199 else
5200 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5201
5202 /* Assumes two's complement. */
5203 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5204 overflow = TRUE;
5205
5206 /* Put RELOCATION back into the insn. */
5207 {
5208 bfd_vma S = (relocation & 0x01000000) >> 24;
5209 bfd_vma I1 = (relocation & 0x00800000) >> 23;
5210 bfd_vma I2 = (relocation & 0x00400000) >> 22;
5211 bfd_vma hi = (relocation & 0x003ff000) >> 12;
5212 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5213
5214 I1 = !(I1 ^ S);
5215 I2 = !(I2 ^ S);
5216
5217 upper_insn = (upper_insn & (bfd_vma) 0xf800) | (S << 10) | hi;
5218 lower_insn = (lower_insn & (bfd_vma) 0xd000) | (I1 << 13) | (I2 << 11) | lo;
5219 }
5220
5221 /* Put the relocated value back in the object file: */
5222 bfd_put_16 (input_bfd, upper_insn, hit_data);
5223 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5224
5225 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5226 }
5227
5228 case R_ARM_THM_JUMP19:
5229 /* Thumb32 conditional branch instruction. */
5230 {
5231 bfd_vma relocation;
5232 bfd_boolean overflow = FALSE;
5233 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5234 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 5235 bfd_signed_vma reloc_signed_max = 0xffffe;
5236 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 5237 bfd_signed_vma signed_check;
5238
5239 /* Need to refetch the addend, reconstruct the top three bits,
5240 and squish the two 11 bit pieces together. */
5241 if (globals->use_rel)
5242 {
5243 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 5244 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 5245 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
5246 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
5247 bfd_vma lower = (lower_insn & 0x07ff);
5248
a00a1f35
MS		 5249 upper |= J1 << 6;
5250 upper |= J2 << 7;
5251 upper |= (!S) << 8;
c19d1205
ZW		 5252 upper -= 0x0100; /* Sign extend. */
5253
5254 addend = (upper << 12) | (lower << 1);
5255 signed_addend = addend;
5256 }
5257
5258 /* ??? Should handle interworking? GCC might someday try to
5259 use this for tail calls. */
5260
5261 relocation = value + signed_addend;
5262 relocation -= (input_section->output_section->vma
5263 + input_section->output_offset
5264 + rel->r_offset);
a00a1f35 5265 signed_check = (bfd_signed_vma) relocation;
c19d1205 5266
c19d1205
ZW		 5267 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5268 overflow = TRUE;
5269
5270 /* Put RELOCATION back into the insn. */
5271 {
5272 bfd_vma S = (relocation & 0x00100000) >> 20;
5273 bfd_vma J2 = (relocation & 0x00080000) >> 19;
5274 bfd_vma J1 = (relocation & 0x00040000) >> 18;
5275 bfd_vma hi = (relocation & 0x0003f000) >> 12;
5276 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5277
a00a1f35 5278 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 5279 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
5280 }
5281
5282 /* Put the relocated value back in the object file: */
5283 bfd_put_16 (input_bfd, upper_insn, hit_data);
5284 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5285
5286 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5287 }
5288
5289 case R_ARM_THM_JUMP11:
5290 case R_ARM_THM_JUMP8:
5291 case R_ARM_THM_JUMP6:
51c5503b
NC		 5292 /* Thumb B (branch) instruction). */
5293 {
6cf9e9fe 5294 bfd_signed_vma relocation;
51c5503b
NC		 5295 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
5296 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 5297 bfd_signed_vma signed_check;
5298
c19d1205
ZW		 5299 /* CZB cannot jump backward. */
5300 if (r_type == R_ARM_THM_JUMP6)
5301 reloc_signed_min = 0;
5302
4e7fd91e 5303 if (globals->use_rel)
6cf9e9fe 5304 {
4e7fd91e
PB		 5305 /* Need to refetch addend. */
5306 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5307 if (addend & ((howto->src_mask + 1) >> 1))
5308 {
5309 signed_addend = -1;
5310 signed_addend &= ~ howto->src_mask;
5311 signed_addend |= addend;
5312 }
5313 else
5314 signed_addend = addend;
5315 /* The value in the insn has been right shifted. We need to
5316 undo this, so that we can perform the address calculation
5317 in terms of bytes. */
5318 signed_addend <<= howto->rightshift;
6cf9e9fe 5319 }
6cf9e9fe 5320 relocation = value + signed_addend;
51c5503b
NC		 5321
5322 relocation -= (input_section->output_section->vma
5323 + input_section->output_offset
5324 + rel->r_offset);
5325
6cf9e9fe
NC		 5326 relocation >>= howto->rightshift;
5327 signed_check = relocation;
c19d1205
ZW		 5328
5329 if (r_type == R_ARM_THM_JUMP6)
5330 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
5331 else
5332 relocation &= howto->dst_mask;
51c5503b 5333 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 5334
51c5503b
NC		 5335 bfd_put_16 (input_bfd, relocation, hit_data);
5336
5337 /* Assumes two's complement. */
5338 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5339 return bfd_reloc_overflow;
5340
5341 return bfd_reloc_ok;
5342 }
cedb70c5 5343
8375c36b
PB		 5344 case R_ARM_ALU_PCREL7_0:
5345 case R_ARM_ALU_PCREL15_8:
5346 case R_ARM_ALU_PCREL23_15:
5347 {
5348 bfd_vma insn;
5349 bfd_vma relocation;
5350
5351 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 5352 if (globals->use_rel)
5353 {
5354 /* Extract the addend. */
5355 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
5356 signed_addend = addend;
5357 }
8375c36b
PB		 5358 relocation = value + signed_addend;
5359
5360 relocation -= (input_section->output_section->vma
5361 + input_section->output_offset
5362 + rel->r_offset);
5363 insn = (insn & ~0xfff)
5364 | ((howto->bitpos << 7) & 0xf00)
5365 | ((relocation >> howto->bitpos) & 0xff);
5366 bfd_put_32 (input_bfd, value, hit_data);
5367 }
5368 return bfd_reloc_ok;
5369
252b5132
RH		 5370 case R_ARM_GNU_VTINHERIT:
5371 case R_ARM_GNU_VTENTRY:
5372 return bfd_reloc_ok;
5373
c19d1205 5374 case R_ARM_GOTOFF32:
252b5132
RH		 5375 /* Relocation is relative to the start of the
5376 global offset table. */
5377
5378 BFD_ASSERT (sgot != NULL);
5379 if (sgot == NULL)
5380 return bfd_reloc_notsupported;
9a5aca8c 5381
cedb70c5 5382 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 5383 address by one, so that attempts to call the function pointer will
5384 correctly interpret it as Thumb code. */
5385 if (sym_flags == STT_ARM_TFUNC)
5386 value += 1;
5387
252b5132
RH		 5388 /* Note that sgot->output_offset is not involved in this
5389 calculation. We always want the start of .got. If we
5390 define _GLOBAL_OFFSET_TABLE in a different way, as is
5391 permitted by the ABI, we might have to change this
9b485d32 5392 calculation. */
252b5132 5393 value -= sgot->output_section->vma;
f21f3fe0 5394 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5395 contents, rel->r_offset, value,
00a97672 5396 rel->r_addend);
252b5132
RH		 5397
5398 case R_ARM_GOTPC:
a7c10850 5399 /* Use global offset table as symbol value. */
252b5132 5400 BFD_ASSERT (sgot != NULL);
f21f3fe0 5401
252b5132
RH		 5402 if (sgot == NULL)
5403 return bfd_reloc_notsupported;
5404
0945cdfd 5405 *unresolved_reloc_p = FALSE;
252b5132 5406 value = sgot->output_section->vma;
f21f3fe0 5407 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5408 contents, rel->r_offset, value,
00a97672 5409 rel->r_addend);
f21f3fe0 5410
252b5132 5411 case R_ARM_GOT32:
eb043451 5412 case R_ARM_GOT_PREL:
252b5132 5413 /* Relocation is to the entry for this symbol in the
9b485d32 5414 global offset table. */
252b5132
RH		 5415 if (sgot == NULL)
5416 return bfd_reloc_notsupported;
f21f3fe0 5417
252b5132
RH		 5418 if (h != NULL)
5419 {
5420 bfd_vma off;
5e681ec4 5421 bfd_boolean dyn;
f21f3fe0 5422
252b5132
RH		 5423 off = h->got.offset;
5424 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 5425 dyn = globals->root.dynamic_sections_created;
f21f3fe0 5426
5e681ec4 5427 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 5428 || (info->shared
5e681ec4
PB		 5429 && SYMBOL_REFERENCES_LOCAL (info, h))
5430 || (ELF_ST_VISIBILITY (h->other)
5431 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 5432 {
5433 /* This is actually a static link, or it is a -Bsymbolic link
5434 and the symbol is defined locally. We must initialize this
5435 entry in the global offset table. Since the offset must
5436 always be a multiple of 4, we use the least significant bit
5437 to record whether we have initialized it already.
f21f3fe0 5438
00a97672 5439 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 5440 entry to initialize the value. This is done in the
9b485d32 5441 finish_dynamic_symbol routine. */
252b5132
RH		 5442 if ((off & 1) != 0)
5443 off &= ~1;
5444 else
5445 {
ee29b9fb
RE		 5446 /* If we are addressing a Thumb function, we need to
5447 adjust the address by one, so that attempts to
5448 call the function pointer will correctly
5449 interpret it as Thumb code. */
5450 if (sym_flags == STT_ARM_TFUNC)
5451 value |= 1;
5452
252b5132
RH		 5453 bfd_put_32 (output_bfd, value, sgot->contents + off);
5454 h->got.offset |= 1;
5455 }
5456 }
0945cdfd
DJ		 5457 else
5458 *unresolved_reloc_p = FALSE;
f21f3fe0 5459
252b5132
RH		 5460 value = sgot->output_offset + off;
5461 }
5462 else
5463 {
5464 bfd_vma off;
f21f3fe0 5465
252b5132
RH		 5466 BFD_ASSERT (local_got_offsets != NULL &&
5467 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 5468
252b5132 5469 off = local_got_offsets[r_symndx];
f21f3fe0 5470
252b5132
RH		 5471 /* The offset must always be a multiple of 4. We use the
5472 least significant bit to record whether we have already
9b485d32 5473 generated the necessary reloc. */
252b5132
RH		 5474 if ((off & 1) != 0)
5475 off &= ~1;
5476 else
5477 {
b7693d02
DJ		 5478 /* If we are addressing a Thumb function, we need to
5479 adjust the address by one, so that attempts to
5480 call the function pointer will correctly
5481 interpret it as Thumb code. */
5482 if (sym_flags == STT_ARM_TFUNC)
5483 value |= 1;
5484
00a97672
RS		 5485 if (globals->use_rel)
5486 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 5487
252b5132
RH		 5488 if (info->shared)
5489 {
5490 asection * srelgot;
947216bf
AM		 5491 Elf_Internal_Rela outrel;
5492 bfd_byte *loc;
f21f3fe0 5493
00a97672
RS		 5494 srelgot = (bfd_get_section_by_name
5495 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 5496 BFD_ASSERT (srelgot != NULL);
f21f3fe0 5497
00a97672 5498 outrel.r_addend = addend + value;
252b5132 5499 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 5500 + sgot->output_offset
252b5132
RH		 5501 + off);
5502 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 5503 loc = srelgot->contents;
00a97672
RS		 5504 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
5505 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 5506 }
f21f3fe0 5507
252b5132
RH		 5508 local_got_offsets[r_symndx] |= 1;
5509 }
f21f3fe0 5510
252b5132
RH		 5511 value = sgot->output_offset + off;
5512 }
eb043451
PB		 5513 if (r_type != R_ARM_GOT32)
5514 value += sgot->output_section->vma;
9a5aca8c 5515
f21f3fe0 5516 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5517 contents, rel->r_offset, value,
00a97672 5518 rel->r_addend);
f21f3fe0 5519
ba93b8ac
DJ		 5520 case R_ARM_TLS_LDO32:
5521 value = value - dtpoff_base (info);
5522
5523 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5524 contents, rel->r_offset, value,
5525 rel->r_addend);
ba93b8ac
DJ		 5526
5527 case R_ARM_TLS_LDM32:
5528 {
5529 bfd_vma off;
5530
5531 if (globals->sgot == NULL)
5532 abort ();
5533
5534 off = globals->tls_ldm_got.offset;
5535
5536 if ((off & 1) != 0)
5537 off &= ~1;
5538 else
5539 {
5540 /* If we don't know the module number, create a relocation
5541 for it. */
5542 if (info->shared)
5543 {
5544 Elf_Internal_Rela outrel;
5545 bfd_byte *loc;
5546
5547 if (globals->srelgot == NULL)
5548 abort ();
5549
00a97672 5550 outrel.r_addend = 0;
ba93b8ac
DJ		 5551 outrel.r_offset = (globals->sgot->output_section->vma
5552 + globals->sgot->output_offset + off);
5553 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
5554
00a97672
RS		 5555 if (globals->use_rel)
5556 bfd_put_32 (output_bfd, outrel.r_addend,
5557 globals->sgot->contents + off);
ba93b8ac
DJ		 5558
5559 loc = globals->srelgot->contents;
00a97672
RS		 5560 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
5561 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 5562 }
5563 else
5564 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
5565
5566 globals->tls_ldm_got.offset |= 1;
5567 }
5568
5569 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5570 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5571
5572 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5573 contents, rel->r_offset, value,
00a97672 5574 rel->r_addend);
ba93b8ac
DJ		 5575 }
5576
5577 case R_ARM_TLS_GD32:
5578 case R_ARM_TLS_IE32:
5579 {
5580 bfd_vma off;
5581 int indx;
5582 char tls_type;
5583
5584 if (globals->sgot == NULL)
5585 abort ();
5586
5587 indx = 0;
5588 if (h != NULL)
5589 {
5590 bfd_boolean dyn;
5591 dyn = globals->root.dynamic_sections_created;
5592 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5593 && (!info->shared
5594 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5595 {
5596 *unresolved_reloc_p = FALSE;
5597 indx = h->dynindx;
5598 }
5599 off = h->got.offset;
5600 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
5601 }
5602 else
5603 {
5604 if (local_got_offsets == NULL)
5605 abort ();
5606 off = local_got_offsets[r_symndx];
5607 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
5608 }
5609
5610 if (tls_type == GOT_UNKNOWN)
5611 abort ();
5612
5613 if ((off & 1) != 0)
5614 off &= ~1;
5615 else
5616 {
5617 bfd_boolean need_relocs = FALSE;
5618 Elf_Internal_Rela outrel;
5619 bfd_byte *loc = NULL;
5620 int cur_off = off;
5621
5622 /* The GOT entries have not been initialized yet. Do it
5623 now, and emit any relocations. If both an IE GOT and a
5624 GD GOT are necessary, we emit the GD first. */
5625
5626 if ((info->shared || indx != 0)
5627 && (h == NULL
5628 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5629 || h->root.type != bfd_link_hash_undefweak))
5630 {
5631 need_relocs = TRUE;
5632 if (globals->srelgot == NULL)
5633 abort ();
5634 loc = globals->srelgot->contents;
00a97672 5635 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 5636 }
5637
5638 if (tls_type & GOT_TLS_GD)
5639 {
5640 if (need_relocs)
5641 {
00a97672 5642 outrel.r_addend = 0;
ba93b8ac 5643 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 5644 + globals->sgot->output_offset
5645 + cur_off);
ba93b8ac 5646 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 5647
00a97672
RS		 5648 if (globals->use_rel)
5649 bfd_put_32 (output_bfd, outrel.r_addend,
5650 globals->sgot->contents + cur_off);
5651
5652 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5653 globals->srelgot->reloc_count++;
00a97672 5654 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5655
5656 if (indx == 0)
5657 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5658 globals->sgot->contents + cur_off + 4);
5659 else
5660 {
00a97672 5661 outrel.r_addend = 0;
ba93b8ac
DJ		 5662 outrel.r_info = ELF32_R_INFO (indx,
5663 R_ARM_TLS_DTPOFF32);
5664 outrel.r_offset += 4;
00a97672
RS		 5665
5666 if (globals->use_rel)
5667 bfd_put_32 (output_bfd, outrel.r_addend,
5668 globals->sgot->contents + cur_off + 4);
5669
5670
5671 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5672 globals->srelgot->reloc_count++;
00a97672 5673 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5674 }
5675 }
5676 else
5677 {
5678 /* If we are not emitting relocations for a
5679 general dynamic reference, then we must be in a
5680 static link or an executable link with the
5681 symbol binding locally. Mark it as belonging
5682 to module 1, the executable. */
5683 bfd_put_32 (output_bfd, 1,
5684 globals->sgot->contents + cur_off);
5685 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5686 globals->sgot->contents + cur_off + 4);
5687 }
5688
5689 cur_off += 8;
5690 }
5691
5692 if (tls_type & GOT_TLS_IE)
5693 {
5694 if (need_relocs)
5695 {
00a97672
RS		 5696 if (indx == 0)
5697 outrel.r_addend = value - dtpoff_base (info);
5698 else
5699 outrel.r_addend = 0;
ba93b8ac
DJ		 5700 outrel.r_offset = (globals->sgot->output_section->vma
5701 + globals->sgot->output_offset
5702 + cur_off);
5703 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
5704
00a97672
RS		 5705 if (globals->use_rel)
5706 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 5707 globals->sgot->contents + cur_off);
5708
00a97672 5709 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5710 globals->srelgot->reloc_count++;
00a97672 5711 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5712 }
5713 else
5714 bfd_put_32 (output_bfd, tpoff (info, value),
5715 globals->sgot->contents + cur_off);
5716 cur_off += 4;
5717 }
5718
5719 if (h != NULL)
5720 h->got.offset |= 1;
5721 else
5722 local_got_offsets[r_symndx] |= 1;
5723 }
5724
5725 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
5726 off += 8;
5727 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5728 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5729
5730 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5731 contents, rel->r_offset, value,
00a97672 5732 rel->r_addend);
ba93b8ac
DJ		 5733 }
5734
5735 case R_ARM_TLS_LE32:
5736 if (info->shared)
5737 {
5738 (*_bfd_error_handler)
5739 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
5740 input_bfd, input_section,
5741 (long) rel->r_offset, howto->name);
5742 return FALSE;
5743 }
5744 else
5745 value = tpoff (info, value);
5746
5747 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5748 contents, rel->r_offset, value,
5749 rel->r_addend);
ba93b8ac 5750
319850b4
JB		 5751 case R_ARM_V4BX:
5752 if (globals->fix_v4bx)
5753 {
5754 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5755
5756 /* Ensure that we have a BX instruction. */
5757 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
5758
5759 /* Preserve Rm (lowest four bits) and the condition code
5760 (highest four bits). Other bits encode MOV PC,Rm. */
5761 insn = (insn & 0xf000000f) | 0x01a0f000;
5762
5763 bfd_put_32 (input_bfd, insn, hit_data);
5764 }
5765 return bfd_reloc_ok;
5766
b6895b4f
PB		 5767 case R_ARM_MOVW_ABS_NC:
5768 case R_ARM_MOVT_ABS:
5769 case R_ARM_MOVW_PREL_NC:
5770 case R_ARM_MOVT_PREL:
92f5d02b
MS		 5771 /* Until we properly support segment-base-relative addressing then
5772 we assume the segment base to be zero, as for the group relocations.
5773 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
5774 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
5775 case R_ARM_MOVW_BREL_NC:
5776 case R_ARM_MOVW_BREL:
5777 case R_ARM_MOVT_BREL:
b6895b4f
PB		 5778 {
5779 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5780
5781 if (globals->use_rel)
5782 {
5783 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
5784 signed_addend = (addend ^ 0x10000) - 0x10000;
5785 }
92f5d02b 5786
b6895b4f 5787 value += signed_addend;
b6895b4f
PB		 5788
5789 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
5790 value -= (input_section->output_section->vma
5791 + input_section->output_offset + rel->r_offset);
5792
92f5d02b
MS		 5793 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
5794 return bfd_reloc_overflow;
5795
5796 if (sym_flags == STT_ARM_TFUNC)
5797 value |= 1;
5798
5799 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
5800 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 5801 value >>= 16;
5802
5803 insn &= 0xfff0f000;
5804 insn |= value & 0xfff;
5805 insn |= (value & 0xf000) << 4;
5806 bfd_put_32 (input_bfd, insn, hit_data);
5807 }
5808 return bfd_reloc_ok;
5809
5810 case R_ARM_THM_MOVW_ABS_NC:
5811 case R_ARM_THM_MOVT_ABS:
5812 case R_ARM_THM_MOVW_PREL_NC:
5813 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 5814 /* Until we properly support segment-base-relative addressing then
5815 we assume the segment base to be zero, as for the above relocations.
5816 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
5817 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
5818 as R_ARM_THM_MOVT_ABS. */
5819 case R_ARM_THM_MOVW_BREL_NC:
5820 case R_ARM_THM_MOVW_BREL:
5821 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 5822 {
5823 bfd_vma insn;
5824
5825 insn = bfd_get_16 (input_bfd, hit_data) << 16;
5826 insn |= bfd_get_16 (input_bfd, hit_data + 2);
5827
5828 if (globals->use_rel)
5829 {
5830 addend = ((insn >> 4) & 0xf000)
5831 | ((insn >> 15) & 0x0800)
5832 | ((insn >> 4) & 0x0700)
5833 | (insn & 0x00ff);
5834 signed_addend = (addend ^ 0x10000) - 0x10000;
5835 }
92f5d02b 5836
b6895b4f 5837 value += signed_addend;
b6895b4f
PB		 5838
5839 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
5840 value -= (input_section->output_section->vma
5841 + input_section->output_offset + rel->r_offset);
5842
92f5d02b
MS		 5843 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
5844 return bfd_reloc_overflow;
5845
5846 if (sym_flags == STT_ARM_TFUNC)
5847 value |= 1;
5848
5849 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
5850 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 5851 value >>= 16;
5852
5853 insn &= 0xfbf08f00;
5854 insn |= (value & 0xf000) << 4;
5855 insn |= (value & 0x0800) << 15;
5856 insn |= (value & 0x0700) << 4;
5857 insn |= (value & 0x00ff);
5858
5859 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5860 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5861 }
5862 return bfd_reloc_ok;
5863
4962c51a
MS		 5864 case R_ARM_ALU_PC_G0_NC:
5865 case R_ARM_ALU_PC_G1_NC:
5866 case R_ARM_ALU_PC_G0:
5867 case R_ARM_ALU_PC_G1:
5868 case R_ARM_ALU_PC_G2:
5869 case R_ARM_ALU_SB_G0_NC:
5870 case R_ARM_ALU_SB_G1_NC:
5871 case R_ARM_ALU_SB_G0:
5872 case R_ARM_ALU_SB_G1:
5873 case R_ARM_ALU_SB_G2:
5874 {
5875 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5876 bfd_vma pc = input_section->output_section->vma
5877 + input_section->output_offset + rel->r_offset;
5878 /* sb should be the origin of the *segment* containing the symbol.
5879 It is not clear how to obtain this OS-dependent value, so we
5880 make an arbitrary choice of zero. */
5881 bfd_vma sb = 0;
5882 bfd_vma residual;
5883 bfd_vma g_n;
5884 bfd_signed_vma signed_value;
5885 int group = 0;
5886
5887 /* Determine which group of bits to select. */
5888 switch (r_type)
5889 {
5890 case R_ARM_ALU_PC_G0_NC:
5891 case R_ARM_ALU_PC_G0:
5892 case R_ARM_ALU_SB_G0_NC:
5893 case R_ARM_ALU_SB_G0:
5894 group = 0;
5895 break;
5896
5897 case R_ARM_ALU_PC_G1_NC:
5898 case R_ARM_ALU_PC_G1:
5899 case R_ARM_ALU_SB_G1_NC:
5900 case R_ARM_ALU_SB_G1:
5901 group = 1;
5902 break;
5903
5904 case R_ARM_ALU_PC_G2:
5905 case R_ARM_ALU_SB_G2:
5906 group = 2;
5907 break;
5908
5909 default:
5910 abort();
5911 }
5912
5913 /* If REL, extract the addend from the insn. If RELA, it will
5914 have already been fetched for us. */
5915 if (globals->use_rel)
5916 {
5917 int negative;
5918 bfd_vma constant = insn & 0xff;
5919 bfd_vma rotation = (insn & 0xf00) >> 8;
5920
5921 if (rotation == 0)
5922 signed_addend = constant;
5923 else
5924 {
5925 /* Compensate for the fact that in the instruction, the
5926 rotation is stored in multiples of 2 bits. */
5927 rotation *= 2;
5928
5929 /* Rotate "constant" right by "rotation" bits. */
5930 signed_addend = (constant >> rotation) |
5931 (constant << (8 * sizeof (bfd_vma) - rotation));
5932 }
5933
5934 /* Determine if the instruction is an ADD or a SUB.
5935 (For REL, this determines the sign of the addend.) */
5936 negative = identify_add_or_sub (insn);
5937 if (negative == 0)
5938 {
5939 (*_bfd_error_handler)
5940 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
5941 input_bfd, input_section,
5942 (long) rel->r_offset, howto->name);
5943 return bfd_reloc_overflow;
5944 }
5945
5946 signed_addend *= negative;
5947 }
5948
5949 /* Compute the value (X) to go in the place. */
5950 if (r_type == R_ARM_ALU_PC_G0_NC
5951 || r_type == R_ARM_ALU_PC_G1_NC
5952 || r_type == R_ARM_ALU_PC_G0
5953 || r_type == R_ARM_ALU_PC_G1
5954 || r_type == R_ARM_ALU_PC_G2)
5955 /* PC relative. */
5956 signed_value = value - pc + signed_addend;
5957 else
5958 /* Section base relative. */
5959 signed_value = value - sb + signed_addend;
5960
5961 /* If the target symbol is a Thumb function, then set the
5962 Thumb bit in the address. */
5963 if (sym_flags == STT_ARM_TFUNC)
5964 signed_value |= 1;
5965
5966 /* Calculate the value of the relevant G_n, in encoded
5967 constant-with-rotation format. */
5968 g_n = calculate_group_reloc_mask (abs (signed_value), group,
5969 &residual);
5970
5971 /* Check for overflow if required. */
5972 if ((r_type == R_ARM_ALU_PC_G0
5973 || r_type == R_ARM_ALU_PC_G1
5974 || r_type == R_ARM_ALU_PC_G2
5975 || r_type == R_ARM_ALU_SB_G0
5976 || r_type == R_ARM_ALU_SB_G1
5977 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
5978 {
5979 (*_bfd_error_handler)
5980 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
5981 input_bfd, input_section,
5982 (long) rel->r_offset, abs (signed_value), howto->name);
5983 return bfd_reloc_overflow;
5984 }
5985
5986 /* Mask out the value and the ADD/SUB part of the opcode; take care
5987 not to destroy the S bit. */
5988 insn &= 0xff1ff000;
5989
5990 /* Set the opcode according to whether the value to go in the
5991 place is negative. */
5992 if (signed_value < 0)
5993 insn |= 1 << 22;
5994 else
5995 insn |= 1 << 23;
5996
5997 /* Encode the offset. */
5998 insn |= g_n;
5999
6000 bfd_put_32 (input_bfd, insn, hit_data);
6001 }
6002 return bfd_reloc_ok;
6003
6004 case R_ARM_LDR_PC_G0:
6005 case R_ARM_LDR_PC_G1:
6006 case R_ARM_LDR_PC_G2:
6007 case R_ARM_LDR_SB_G0:
6008 case R_ARM_LDR_SB_G1:
6009 case R_ARM_LDR_SB_G2:
6010 {
6011 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6012 bfd_vma pc = input_section->output_section->vma
6013 + input_section->output_offset + rel->r_offset;
6014 bfd_vma sb = 0; /* See note above. */
6015 bfd_vma residual;
6016 bfd_signed_vma signed_value;
6017 int group = 0;
6018
6019 /* Determine which groups of bits to calculate. */
6020 switch (r_type)
6021 {
6022 case R_ARM_LDR_PC_G0:
6023 case R_ARM_LDR_SB_G0:
6024 group = 0;
6025 break;
6026
6027 case R_ARM_LDR_PC_G1:
6028 case R_ARM_LDR_SB_G1:
6029 group = 1;
6030 break;
6031
6032 case R_ARM_LDR_PC_G2:
6033 case R_ARM_LDR_SB_G2:
6034 group = 2;
6035 break;
6036
6037 default:
6038 abort();
6039 }
6040
6041 /* If REL, extract the addend from the insn. If RELA, it will
6042 have already been fetched for us. */
6043 if (globals->use_rel)
6044 {
6045 int negative = (insn & (1 << 23)) ? 1 : -1;
6046 signed_addend = negative * (insn & 0xfff);
6047 }
6048
6049 /* Compute the value (X) to go in the place. */
6050 if (r_type == R_ARM_LDR_PC_G0
6051 || r_type == R_ARM_LDR_PC_G1
6052 || r_type == R_ARM_LDR_PC_G2)
6053 /* PC relative. */
6054 signed_value = value - pc + signed_addend;
6055 else
6056 /* Section base relative. */
6057 signed_value = value - sb + signed_addend;
6058
6059 /* Calculate the value of the relevant G_{n-1} to obtain
6060 the residual at that stage. */
6061 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6062
6063 /* Check for overflow. */
6064 if (residual >= 0x1000)
6065 {
6066 (*_bfd_error_handler)
6067 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6068 input_bfd, input_section,
6069 (long) rel->r_offset, abs (signed_value), howto->name);
6070 return bfd_reloc_overflow;
6071 }
6072
6073 /* Mask out the value and U bit. */
6074 insn &= 0xff7ff000;
6075
6076 /* Set the U bit if the value to go in the place is non-negative. */
6077 if (signed_value >= 0)
6078 insn |= 1 << 23;
6079
6080 /* Encode the offset. */
6081 insn |= residual;
6082
6083 bfd_put_32 (input_bfd, insn, hit_data);
6084 }
6085 return bfd_reloc_ok;
6086
6087 case R_ARM_LDRS_PC_G0:
6088 case R_ARM_LDRS_PC_G1:
6089 case R_ARM_LDRS_PC_G2:
6090 case R_ARM_LDRS_SB_G0:
6091 case R_ARM_LDRS_SB_G1:
6092 case R_ARM_LDRS_SB_G2:
6093 {
6094 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6095 bfd_vma pc = input_section->output_section->vma
6096 + input_section->output_offset + rel->r_offset;
6097 bfd_vma sb = 0; /* See note above. */
6098 bfd_vma residual;
6099 bfd_signed_vma signed_value;
6100 int group = 0;
6101
6102 /* Determine which groups of bits to calculate. */
6103 switch (r_type)
6104 {
6105 case R_ARM_LDRS_PC_G0:
6106 case R_ARM_LDRS_SB_G0:
6107 group = 0;
6108 break;
6109
6110 case R_ARM_LDRS_PC_G1:
6111 case R_ARM_LDRS_SB_G1:
6112 group = 1;
6113 break;
6114
6115 case R_ARM_LDRS_PC_G2:
6116 case R_ARM_LDRS_SB_G2:
6117 group = 2;
6118 break;
6119
6120 default:
6121 abort();
6122 }
6123
6124 /* If REL, extract the addend from the insn. If RELA, it will
6125 have already been fetched for us. */
6126 if (globals->use_rel)
6127 {
6128 int negative = (insn & (1 << 23)) ? 1 : -1;
6129 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
6130 }
6131
6132 /* Compute the value (X) to go in the place. */
6133 if (r_type == R_ARM_LDRS_PC_G0
6134 || r_type == R_ARM_LDRS_PC_G1
6135 || r_type == R_ARM_LDRS_PC_G2)
6136 /* PC relative. */
6137 signed_value = value - pc + signed_addend;
6138 else
6139 /* Section base relative. */
6140 signed_value = value - sb + signed_addend;
6141
6142 /* Calculate the value of the relevant G_{n-1} to obtain
6143 the residual at that stage. */
6144 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6145
6146 /* Check for overflow. */
6147 if (residual >= 0x100)
6148 {
6149 (*_bfd_error_handler)
6150 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6151 input_bfd, input_section,
6152 (long) rel->r_offset, abs (signed_value), howto->name);
6153 return bfd_reloc_overflow;
6154 }
6155
6156 /* Mask out the value and U bit. */
6157 insn &= 0xff7ff0f0;
6158
6159 /* Set the U bit if the value to go in the place is non-negative. */
6160 if (signed_value >= 0)
6161 insn |= 1 << 23;
6162
6163 /* Encode the offset. */
6164 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
6165
6166 bfd_put_32 (input_bfd, insn, hit_data);
6167 }
6168 return bfd_reloc_ok;
6169
6170 case R_ARM_LDC_PC_G0:
6171 case R_ARM_LDC_PC_G1:
6172 case R_ARM_LDC_PC_G2:
6173 case R_ARM_LDC_SB_G0:
6174 case R_ARM_LDC_SB_G1:
6175 case R_ARM_LDC_SB_G2:
6176 {
6177 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6178 bfd_vma pc = input_section->output_section->vma
6179 + input_section->output_offset + rel->r_offset;
6180 bfd_vma sb = 0; /* See note above. */
6181 bfd_vma residual;
6182 bfd_signed_vma signed_value;
6183 int group = 0;
6184
6185 /* Determine which groups of bits to calculate. */
6186 switch (r_type)
6187 {
6188 case R_ARM_LDC_PC_G0:
6189 case R_ARM_LDC_SB_G0:
6190 group = 0;
6191 break;
6192
6193 case R_ARM_LDC_PC_G1:
6194 case R_ARM_LDC_SB_G1:
6195 group = 1;
6196 break;
6197
6198 case R_ARM_LDC_PC_G2:
6199 case R_ARM_LDC_SB_G2:
6200 group = 2;
6201 break;
6202
6203 default:
6204 abort();
6205 }
6206
6207 /* If REL, extract the addend from the insn. If RELA, it will
6208 have already been fetched for us. */
6209 if (globals->use_rel)
6210 {
6211 int negative = (insn & (1 << 23)) ? 1 : -1;
6212 signed_addend = negative * ((insn & 0xff) << 2);
6213 }
6214
6215 /* Compute the value (X) to go in the place. */
6216 if (r_type == R_ARM_LDC_PC_G0
6217 || r_type == R_ARM_LDC_PC_G1
6218 || r_type == R_ARM_LDC_PC_G2)
6219 /* PC relative. */
6220 signed_value = value - pc + signed_addend;
6221 else
6222 /* Section base relative. */
6223 signed_value = value - sb + signed_addend;
6224
6225 /* Calculate the value of the relevant G_{n-1} to obtain
6226 the residual at that stage. */
6227 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6228
6229 /* Check for overflow. (The absolute value to go in the place must be
6230 divisible by four and, after having been divided by four, must
6231 fit in eight bits.) */
6232 if ((residual & 0x3) != 0 || residual >= 0x400)
6233 {
6234 (*_bfd_error_handler)
6235 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6236 input_bfd, input_section,
6237 (long) rel->r_offset, abs (signed_value), howto->name);
6238 return bfd_reloc_overflow;
6239 }
6240
6241 /* Mask out the value and U bit. */
6242 insn &= 0xff7fff00;
6243
6244 /* Set the U bit if the value to go in the place is non-negative. */
6245 if (signed_value >= 0)
6246 insn |= 1 << 23;
6247
6248 /* Encode the offset. */
6249 insn |= residual >> 2;
6250
6251 bfd_put_32 (input_bfd, insn, hit_data);
6252 }
6253 return bfd_reloc_ok;
6254
252b5132
RH		 6255 default:
6256 return bfd_reloc_notsupported;
6257 }
6258}
6259
98c1d4aa
NC		 6260/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
6261static void
57e8b36a
NC		 6262arm_add_to_rel (bfd * abfd,
6263 bfd_byte * address,
6264 reloc_howto_type * howto,
6265 bfd_signed_vma increment)
98c1d4aa 6266{
98c1d4aa
NC		 6267 bfd_signed_vma addend;
6268
c19d1205 6269 if (howto->type == R_ARM_THM_CALL)
98c1d4aa 6270 {
9a5aca8c
AM		 6271 int upper_insn, lower_insn;
6272 int upper, lower;
98c1d4aa 6273
9a5aca8c
AM		 6274 upper_insn = bfd_get_16 (abfd, address);
6275 lower_insn = bfd_get_16 (abfd, address + 2);
6276 upper = upper_insn & 0x7ff;
6277 lower = lower_insn & 0x7ff;
6278
6279 addend = (upper << 12) | (lower << 1);
ddda4409 6280 addend += increment;
9a5aca8c 6281 addend >>= 1;
98c1d4aa 6282
9a5aca8c
AM		 6283 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
6284 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
6285
dc810e39
AM		 6286 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
6287 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 6288 }
6289 else
6290 {
6291 bfd_vma contents;
6292
6293 contents = bfd_get_32 (abfd, address);
6294
6295 /* Get the (signed) value from the instruction. */
6296 addend = contents & howto->src_mask;
6297 if (addend & ((howto->src_mask + 1) >> 1))
6298 {
6299 bfd_signed_vma mask;
6300
6301 mask = -1;
6302 mask &= ~ howto->src_mask;
6303 addend |= mask;
6304 }
6305
6306 /* Add in the increment, (which is a byte value). */
6307 switch (howto->type)
6308 {
6309 default:
6310 addend += increment;
6311 break;
6312
6313 case R_ARM_PC24:
c6596c5e 6314 case R_ARM_PLT32:
5b5bb741
PB		 6315 case R_ARM_CALL:
6316 case R_ARM_JUMP24:
9a5aca8c 6317 addend <<= howto->size;
dc810e39 6318 addend += increment;
9a5aca8c
AM		 6319
6320 /* Should we check for overflow here ? */
6321
6322 /* Drop any undesired bits. */
6323 addend >>= howto->rightshift;
6324 break;
6325 }
6326
6327 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
6328
6329 bfd_put_32 (abfd, contents, address);
ddda4409 6330 }
98c1d4aa 6331}
252b5132 6332
ba93b8ac
DJ		 6333#define IS_ARM_TLS_RELOC(R_TYPE) \
6334 ((R_TYPE) == R_ARM_TLS_GD32 \
6335 || (R_TYPE) == R_ARM_TLS_LDO32 \
6336 || (R_TYPE) == R_ARM_TLS_LDM32 \
6337 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
6338 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
6339 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
6340 || (R_TYPE) == R_ARM_TLS_LE32 \
6341 || (R_TYPE) == R_ARM_TLS_IE32)
6342
252b5132 6343/* Relocate an ARM ELF section. */
b34976b6 6344static bfd_boolean
57e8b36a
NC		 6345elf32_arm_relocate_section (bfd * output_bfd,
6346 struct bfd_link_info * info,
6347 bfd * input_bfd,
6348 asection * input_section,
6349 bfd_byte * contents,
6350 Elf_Internal_Rela * relocs,
6351 Elf_Internal_Sym * local_syms,
6352 asection ** local_sections)
252b5132 6353{
b34976b6
AM		 6354 Elf_Internal_Shdr *symtab_hdr;
6355 struct elf_link_hash_entry **sym_hashes;
6356 Elf_Internal_Rela *rel;
6357 Elf_Internal_Rela *relend;
6358 const char *name;
b32d3aa2 6359 struct elf32_arm_link_hash_table * globals;
252b5132 6360
4e7fd91e 6361 globals = elf32_arm_hash_table (info);
b491616a 6362
252b5132
RH		 6363 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
6364 sym_hashes = elf_sym_hashes (input_bfd);
6365
6366 rel = relocs;
6367 relend = relocs + input_section->reloc_count;
6368 for (; rel < relend; rel++)
6369 {
ba96a88f
NC		 6370 int r_type;
6371 reloc_howto_type * howto;
6372 unsigned long r_symndx;
6373 Elf_Internal_Sym * sym;
6374 asection * sec;
252b5132 6375 struct elf_link_hash_entry * h;
ba96a88f
NC		 6376 bfd_vma relocation;
6377 bfd_reloc_status_type r;
6378 arelent bfd_reloc;
ba93b8ac 6379 char sym_type;
0945cdfd 6380 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 6381 char *error_message = NULL;
f21f3fe0 6382
252b5132 6383 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 6384 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 6385 r_type = arm_real_reloc_type (globals, r_type);
252b5132 6386
ba96a88f
NC		 6387 if ( r_type == R_ARM_GNU_VTENTRY
6388 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 6389 continue;
6390
b32d3aa2 6391 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 6392 howto = bfd_reloc.howto;
252b5132 6393
252b5132
RH		 6394 h = NULL;
6395 sym = NULL;
6396 sec = NULL;
9b485d32 6397
252b5132
RH		 6398 if (r_symndx < symtab_hdr->sh_info)
6399 {
6400 sym = local_syms + r_symndx;
ba93b8ac 6401 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 6402 sec = local_sections[r_symndx];
4e7fd91e 6403 if (globals->use_rel)
f8df10f4 6404 {
4e7fd91e
PB		 6405 relocation = (sec->output_section->vma
6406 + sec->output_offset
6407 + sym->st_value);
ab96bf03
AM		 6408 if (!info->relocatable
6409 && (sec->flags & SEC_MERGE)
6410 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 6411 {
4e7fd91e
PB		 6412 asection *msec;
6413 bfd_vma addend, value;
6414
6415 if (howto->rightshift)
6416 {
6417 (*_bfd_error_handler)
6418 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
6419 input_bfd, input_section,
6420 (long) rel->r_offset, howto->name);
6421 return FALSE;
6422 }
f8df10f4 6423
4e7fd91e 6424 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
f8df10f4 6425
4e7fd91e
PB		 6426 /* Get the (signed) value from the instruction. */
6427 addend = value & howto->src_mask;
6428 if (addend & ((howto->src_mask + 1) >> 1))
6429 {
6430 bfd_signed_vma mask;
f8df10f4 6431
4e7fd91e
PB		 6432 mask = -1;
6433 mask &= ~ howto->src_mask;
6434 addend |= mask;
6435 }
6436 msec = sec;
6437 addend =
6438 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
6439 - relocation;
6440 addend += msec->output_section->vma + msec->output_offset;
6441 value = (value & ~ howto->dst_mask) | (addend & howto->dst_mask);
6442 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
f8df10f4 6443 }
f8df10f4 6444 }
4e7fd91e
PB		 6445 else
6446 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 6447 }
6448 else
6449 {
560e09e9 6450 bfd_boolean warned;
560e09e9 6451
b2a8e766
AM		 6452 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
6453 r_symndx, symtab_hdr, sym_hashes,
6454 h, sec, relocation,
6455 unresolved_reloc, warned);
ba93b8ac
DJ		 6456
6457 sym_type = h->type;
252b5132
RH		 6458 }
6459
ab96bf03
AM		 6460 if (sec != NULL && elf_discarded_section (sec))
6461 {
6462 /* For relocs against symbols from removed linkonce sections,
6463 or sections discarded by a linker script, we just want the
6464 section contents zeroed. Avoid any special processing. */
6465 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
6466 rel->r_info = 0;
6467 rel->r_addend = 0;
6468 continue;
6469 }
6470
6471 if (info->relocatable)
6472 {
6473 /* This is a relocatable link. We don't have to change
6474 anything, unless the reloc is against a section symbol,
6475 in which case we have to adjust according to where the
6476 section symbol winds up in the output section. */
6477 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
6478 {
6479 if (globals->use_rel)
6480 arm_add_to_rel (input_bfd, contents + rel->r_offset,
6481 howto, (bfd_signed_vma) sec->output_offset);
6482 else
6483 rel->r_addend += sec->output_offset;
6484 }
6485 continue;
6486 }
6487
252b5132
RH		 6488 if (h != NULL)
6489 name = h->root.root.string;
6490 else
6491 {
6492 name = (bfd_elf_string_from_elf_section
6493 (input_bfd, symtab_hdr->sh_link, sym->st_name));
6494 if (name == NULL || *name == '\0')
6495 name = bfd_section_name (input_bfd, sec);
6496 }
f21f3fe0 6497
ba93b8ac
DJ		 6498 if (r_symndx != 0
6499 && r_type != R_ARM_NONE
6500 && (h == NULL
6501 || h->root.type == bfd_link_hash_defined
6502 || h->root.type == bfd_link_hash_defweak)
6503 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
6504 {
6505 (*_bfd_error_handler)
6506 ((sym_type == STT_TLS
6507 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
6508 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
6509 input_bfd,
6510 input_section,
6511 (long) rel->r_offset,
6512 howto->name,
6513 name);
6514 }
6515
252b5132
RH		 6516 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
6517 input_section, contents, rel,
6518 relocation, info, sec, name,
6519 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 6520 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 6521 &unresolved_reloc, &error_message);
0945cdfd
DJ		 6522
6523 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
6524 because such sections are not SEC_ALLOC and thus ld.so will
6525 not process them. */
6526 if (unresolved_reloc
6527 && !((input_section->flags & SEC_DEBUGGING) != 0
6528 && h->def_dynamic))
6529 {
6530 (*_bfd_error_handler)
843fe662
L		 6531 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
6532 input_bfd,
6533 input_section,
6534 (long) rel->r_offset,
6535 howto->name,
6536 h->root.root.string);
0945cdfd
DJ		 6537 return FALSE;
6538 }
252b5132
RH		 6539
6540 if (r != bfd_reloc_ok)
6541 {
252b5132
RH		 6542 switch (r)
6543 {
6544 case bfd_reloc_overflow:
cf919dfd
PB		 6545 /* If the overflowing reloc was to an undefined symbol,
6546 we have already printed one error message and there
6547 is no point complaining again. */
6548 if ((! h ||
6549 h->root.type != bfd_link_hash_undefined)
6550 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 6551 (info, (h ? &h->root : NULL), name, howto->name,
6552 (bfd_vma) 0, input_bfd, input_section,
6553 rel->r_offset))))
b34976b6 6554 return FALSE;
252b5132
RH		 6555 break;
6556
6557 case bfd_reloc_undefined:
6558 if (!((*info->callbacks->undefined_symbol)
6559 (info, name, input_bfd, input_section,
b34976b6
AM		 6560 rel->r_offset, TRUE)))
6561 return FALSE;
252b5132
RH		 6562 break;
6563
6564 case bfd_reloc_outofrange:
f2a9dd69 6565 error_message = _("out of range");
252b5132
RH		 6566 goto common_error;
6567
6568 case bfd_reloc_notsupported:
f2a9dd69 6569 error_message = _("unsupported relocation");
252b5132
RH		 6570 goto common_error;
6571
6572 case bfd_reloc_dangerous:
f2a9dd69 6573 /* error_message should already be set. */
252b5132
RH		 6574 goto common_error;
6575
6576 default:
f2a9dd69 6577 error_message = _("unknown error");
252b5132
RH		 6578 /* fall through */
6579
6580 common_error:
f2a9dd69
DJ		 6581 BFD_ASSERT (error_message != NULL);
6582 if (!((*info->callbacks->reloc_dangerous)
6583 (info, error_message, input_bfd, input_section,
252b5132 6584 rel->r_offset)))
b34976b6 6585 return FALSE;
252b5132
RH		 6586 break;
6587 }
6588 }
6589 }
6590
b34976b6 6591 return TRUE;
252b5132
RH		 6592}
6593
c178919b
NC		 6594/* Set the right machine number. */
6595
6596static bfd_boolean
57e8b36a 6597elf32_arm_object_p (bfd *abfd)
c178919b 6598{
5a6c6817 6599 unsigned int mach;
57e8b36a 6600
5a6c6817 6601 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 6602
5a6c6817
NC		 6603 if (mach != bfd_mach_arm_unknown)
6604 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
6605
6606 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
6607 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 6608
e16bb312 6609 else
5a6c6817 6610 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 6611
6612 return TRUE;
6613}
6614
fc830a83 6615/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 6616
b34976b6 6617static bfd_boolean
57e8b36a 6618elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 6619{
6620 if (elf_flags_init (abfd)
6621 && elf_elfheader (abfd)->e_flags != flags)
6622 {
fc830a83
NC		 6623 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
6624 {
fd2ec330 6625 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 6626 (*_bfd_error_handler)
6627 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
6628 abfd);
fc830a83 6629 else
d003868e
AM		 6630 _bfd_error_handler
6631 (_("Warning: Clearing the interworking flag of %B due to outside request"),
6632 abfd);
fc830a83 6633 }
252b5132
RH		 6634 }
6635 else
6636 {
6637 elf_elfheader (abfd)->e_flags = flags;
b34976b6 6638 elf_flags_init (abfd) = TRUE;
252b5132
RH		 6639 }
6640
b34976b6 6641 return TRUE;
252b5132
RH		 6642}
6643
fc830a83 6644/* Copy backend specific data from one object module to another. */
9b485d32 6645
b34976b6 6646static bfd_boolean
57e8b36a 6647elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 6648{
6649 flagword in_flags;
6650 flagword out_flags;
6651
fc830a83 6652 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
252b5132 6653 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 6654 return TRUE;
252b5132 6655
fc830a83 6656 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 6657 out_flags = elf_elfheader (obfd)->e_flags;
6658
fc830a83
NC		 6659 if (elf_flags_init (obfd)
6660 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
6661 && in_flags != out_flags)
252b5132 6662 {
252b5132 6663 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 6664 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 6665 return FALSE;
252b5132
RH		 6666
6667 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 6668 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 6669 return FALSE;
252b5132
RH		 6670
6671 /* If the src and dest have different interworking flags
6672 then turn off the interworking bit. */
fd2ec330 6673 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 6674 {
fd2ec330 6675 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 6676 _bfd_error_handler
6677 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
6678 obfd, ibfd);
252b5132 6679
fd2ec330 6680 in_flags &= ~EF_ARM_INTERWORK;
252b5132 6681 }
1006ba19
PB		 6682
6683 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 6684 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
6685 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 6686 }
6687
6688 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 6689 elf_flags_init (obfd) = TRUE;
252b5132 6690
94a3258f
PB		 6691 /* Also copy the EI_OSABI field. */
6692 elf_elfheader (obfd)->e_ident[EI_OSABI] =
6693 elf_elfheader (ibfd)->e_ident[EI_OSABI];
6694
104d59d1
JM		 6695 /* Copy object attributes. */
6696 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 6697
6698 return TRUE;
6699}
6700
6701/* Values for Tag_ABI_PCS_R9_use. */
6702enum
6703{
6704 AEABI_R9_V6,
6705 AEABI_R9_SB,
6706 AEABI_R9_TLS,
6707 AEABI_R9_unused
6708};
6709
6710/* Values for Tag_ABI_PCS_RW_data. */
6711enum
6712{
6713 AEABI_PCS_RW_data_absolute,
6714 AEABI_PCS_RW_data_PCrel,
6715 AEABI_PCS_RW_data_SBrel,
6716 AEABI_PCS_RW_data_unused
6717};
6718
6719/* Values for Tag_ABI_enum_size. */
6720enum
6721{
6722 AEABI_enum_unused,
6723 AEABI_enum_short,
6724 AEABI_enum_wide,
6725 AEABI_enum_forced_wide
6726};
6727
104d59d1
JM		 6728/* Determine whether an object attribute tag takes an integer, a
6729 string or both. */
6730static int
6731elf32_arm_obj_attrs_arg_type (int tag)
6732{
6733 if (tag == Tag_compatibility)
6734 return 3;
6735 else if (tag == 4 || tag == 5)
6736 return 2;
6737 else if (tag < 32)
6738 return 1;
6739 else
6740 return (tag & 1) != 0 ? 2 : 1;
6741}
6742
ee065d83
PB		 6743/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
6744 are conflicting attributes. */
6745static bfd_boolean
6746elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
6747{
104d59d1
JM		 6748 obj_attribute *in_attr;
6749 obj_attribute *out_attr;
6750 obj_attribute_list *in_list;
ee065d83
PB		 6751 /* Some tags have 0 = don't care, 1 = strong requirement,
6752 2 = weak requirement. */
6753 static const int order_312[3] = {3, 1, 2};
6754 int i;
6755
104d59d1 6756 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 6757 {
6758 /* This is the first object. Copy the attributes. */
104d59d1 6759 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 6760
6761 /* Use the Tag_null value to indicate the attributes have been
6762 initialized. */
104d59d1 6763 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 6764
ee065d83
PB		 6765 return TRUE;
6766 }
6767
104d59d1
JM		 6768 in_attr = elf_known_obj_attributes_proc (ibfd);
6769 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 6770 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
6771 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
6772 {
6773 /* Ignore mismatches if teh object doesn't use floating point. */
6774 if (out_attr[Tag_ABI_FP_number_model].i == 0)
6775 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
6776 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
6777 {
6778 _bfd_error_handler
6779 (_("ERROR: %B uses VFP register arguments, %B does not"),
6780 ibfd, obfd);
6781 return FALSE;
6782 }
6783 }
6784
104d59d1 6785 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 6786 {
6787 /* Merge this attribute with existing attributes. */
6788 switch (i)
6789 {
6790 case Tag_CPU_raw_name:
6791 case Tag_CPU_name:
004ae526
PB		 6792 /* Use whichever has the greatest architecture requirements. We
6793 won't necessarily have both the above tags, so make sure input
6794 name is non-NULL. */
6795 if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i
6796 && in_attr[i].s)
104d59d1 6797 out_attr[i].s = _bfd_elf_attr_strdup (obfd, in_attr[i].s);
ee065d83
PB		 6798 break;
6799
6800 case Tag_ABI_optimization_goals:
6801 case Tag_ABI_FP_optimization_goals:
6802 /* Use the first value seen. */
6803 break;
6804
6805 case Tag_CPU_arch:
6806 case Tag_ARM_ISA_use:
6807 case Tag_THUMB_ISA_use:
6808 case Tag_VFP_arch:
6809 case Tag_WMMX_arch:
6810 case Tag_NEON_arch:
6811 /* ??? Do NEON and WMMX conflict? */
6812 case Tag_ABI_FP_rounding:
6813 case Tag_ABI_FP_denormal:
6814 case Tag_ABI_FP_exceptions:
6815 case Tag_ABI_FP_user_exceptions:
6816 case Tag_ABI_FP_number_model:
6817 case Tag_ABI_align8_preserved:
6818 case Tag_ABI_HardFP_use:
6819 /* Use the largest value specified. */
6820 if (in_attr[i].i > out_attr[i].i)
6821 out_attr[i].i = in_attr[i].i;
6822 break;
6823
6824 case Tag_CPU_arch_profile:
6825 /* Warn if conflicting architecture profiles used. */
6826 if (out_attr[i].i && in_attr[i].i && in_attr[i].i != out_attr[i].i)
6827 {
6828 _bfd_error_handler
6829 (_("ERROR: %B: Conflicting architecture profiles %c/%c"),
6830 ibfd, in_attr[i].i, out_attr[i].i);
6831 return FALSE;
6832 }
6833 if (in_attr[i].i)
6834 out_attr[i].i = in_attr[i].i;
6835 break;
6836 case Tag_PCS_config:
6837 if (out_attr[i].i == 0)
6838 out_attr[i].i = in_attr[i].i;
6839 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
6840 {
6841 /* It's sometimes ok to mix different configs, so this is only
6842 a warning. */
6843 _bfd_error_handler
6844 (_("Warning: %B: Conflicting platform configuration"), ibfd);
6845 }
6846 break;
6847 case Tag_ABI_PCS_R9_use:
004ae526
PB		 6848 if (in_attr[i].i != out_attr[i].i
6849 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 6850 && in_attr[i].i != AEABI_R9_unused)
6851 {
6852 _bfd_error_handler
6853 (_("ERROR: %B: Conflicting use of R9"), ibfd);
6854 return FALSE;
6855 }
6856 if (out_attr[i].i == AEABI_R9_unused)
6857 out_attr[i].i = in_attr[i].i;
6858 break;
6859 case Tag_ABI_PCS_RW_data:
6860 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
6861 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
6862 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
6863 {
6864 _bfd_error_handler
6865 (_("ERROR: %B: SB relative addressing conflicts with use of R9"),
6866 ibfd);
6867 return FALSE;
6868 }
6869 /* Use the smallest value specified. */
6870 if (in_attr[i].i < out_attr[i].i)
6871 out_attr[i].i = in_attr[i].i;
6872 break;
6873 case Tag_ABI_PCS_RO_data:
6874 /* Use the smallest value specified. */
6875 if (in_attr[i].i < out_attr[i].i)
6876 out_attr[i].i = in_attr[i].i;
6877 break;
6878 case Tag_ABI_PCS_GOT_use:
6879 if (in_attr[i].i > 2 || out_attr[i].i > 2
6880 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
6881 out_attr[i].i = in_attr[i].i;
6882 break;
6883 case Tag_ABI_PCS_wchar_t:
6884 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i)
6885 {
6886 _bfd_error_handler
6887 (_("ERROR: %B: Conflicting definitions of wchar_t"), ibfd);
6888 return FALSE;
6889 }
6890 if (in_attr[i].i)
6891 out_attr[i].i = in_attr[i].i;
6892 break;
6893 case Tag_ABI_align8_needed:
6894 /* ??? Check against Tag_ABI_align8_preserved. */
6895 if (in_attr[i].i > 2 || out_attr[i].i > 2
6896 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
6897 out_attr[i].i = in_attr[i].i;
6898 break;
6899 case Tag_ABI_enum_size:
6900 if (in_attr[i].i != AEABI_enum_unused)
6901 {
6902 if (out_attr[i].i == AEABI_enum_unused
6903 || out_attr[i].i == AEABI_enum_forced_wide)
6904 {
6905 /* The existing object is compatible with anything.
6906 Use whatever requirements the new object has. */
6907 out_attr[i].i = in_attr[i].i;
6908 }
6909 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78
MS		 6910 && out_attr[i].i != in_attr[i].i
6911 && !elf32_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 6912 {
bf21ed78
MS		 6913 const char *aeabi_enum_names[] =
6914 { "", "variable-size", "32-bit", "" };
ee065d83 6915 _bfd_error_handler
bf21ed78
MS		 6916 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
6917 ibfd, aeabi_enum_names[in_attr[i].i],
6918 aeabi_enum_names[out_attr[i].i]);
ee065d83
PB		 6919 }
6920 }
6921 break;
6922 case Tag_ABI_VFP_args:
6923 /* Aready done. */
6924 break;
6925 case Tag_ABI_WMMX_args:
6926 if (in_attr[i].i != out_attr[i].i)
6927 {
6928 _bfd_error_handler
6929 (_("ERROR: %B uses iWMMXt register arguments, %B does not"),
6930 ibfd, obfd);
6931 return FALSE;
6932 }
6933 break;
6934 default: /* All known attributes should be explicitly covered. */
6935 abort ();
6936 }
3cfad14c
JM		 6937
6938 if (in_attr[i].type && !out_attr[i].type)
6939 switch (in_attr[i].type)
6940 {
6941 case 1:
6942 if (out_attr[i].i)
6943 out_attr[i].type = 1;
6944 break;
6945
6946 case 2:
6947 if (out_attr[i].s)
6948 out_attr[i].type = 2;
6949 break;
6950
6951 default:
6952 abort ();
6953 }
ee065d83
PB		 6954 }
6955
104d59d1
JM		 6956 /* Merge Tag_compatibility attributes and any common GNU ones. */
6957 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 6958
104d59d1
JM		 6959 /* Check for any attributes not known on ARM. */
6960 in_list = elf_other_obj_attributes_proc (ibfd);
6961 while (in_list && in_list->tag == Tag_compatibility)
6962 in_list = in_list->next;
ee065d83
PB		 6963
6964 for (; in_list; in_list = in_list->next)
6965 {
6966 if ((in_list->tag & 128) < 64)
eb111b1f
BE		 6967 {
6968 _bfd_error_handler
6969 (_("Warning: %B: Unknown EABI object attribute %d"),
6970 ibfd, in_list->tag);
6971 break;
6972 }
ee065d83 6973 }
b34976b6 6974 return TRUE;
252b5132
RH		 6975}
6976
3a4a14e9
PB		 6977
6978/* Return TRUE if the two EABI versions are incompatible. */
6979
6980static bfd_boolean
6981elf32_arm_versions_compatible (unsigned iver, unsigned over)
6982{
6983 /* v4 and v5 are the same spec before and after it was released,
6984 so allow mixing them. */
6985 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
6986 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
6987 return TRUE;
6988
6989 return (iver == over);
6990}
6991
252b5132
RH		 6992/* Merge backend specific data from an object file to the output
6993 object file when linking. */
9b485d32 6994
b34976b6 6995static bfd_boolean
57e8b36a 6996elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 6997{
6998 flagword out_flags;
6999 flagword in_flags;
b34976b6 7000 bfd_boolean flags_compatible = TRUE;
cf919dfd 7001 asection *sec;
252b5132 7002
9b485d32 7003 /* Check if we have the same endianess. */
82e51918 7004 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 7005 return FALSE;
1fe494a5 7006
252b5132
RH		 7007 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
7008 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 7009 return TRUE;
252b5132 7010
ee065d83
PB		 7011 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
7012 return FALSE;
7013
252b5132
RH		 7014 /* The input BFD must have had its flags initialised. */
7015 /* The following seems bogus to me -- The flags are initialized in
7016 the assembler but I don't think an elf_flags_init field is
9b485d32 7017 written into the object. */
252b5132
RH		 7018 /* BFD_ASSERT (elf_flags_init (ibfd)); */
7019
7020 in_flags = elf_elfheader (ibfd)->e_flags;
7021 out_flags = elf_elfheader (obfd)->e_flags;
7022
7023 if (!elf_flags_init (obfd))
7024 {
fe077fa6
NC		 7025 /* If the input is the default architecture and had the default
7026 flags then do not bother setting the flags for the output
7027 architecture, instead allow future merges to do this. If no
7028 future merges ever set these flags then they will retain their
7029 uninitialised values, which surprise surprise, correspond
252b5132 7030 to the default values. */
fe077fa6
NC		 7031 if (bfd_get_arch_info (ibfd)->the_default
7032 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 7033 return TRUE;
252b5132 7034
b34976b6 7035 elf_flags_init (obfd) = TRUE;
252b5132
RH		 7036 elf_elfheader (obfd)->e_flags = in_flags;
7037
7038 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
7039 && bfd_get_arch_info (obfd)->the_default)
7040 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
7041
b34976b6 7042 return TRUE;
252b5132
RH		 7043 }
7044
5a6c6817
NC		 7045 /* Determine what should happen if the input ARM architecture
7046 does not match the output ARM architecture. */
7047 if (! bfd_arm_merge_machines (ibfd, obfd))
7048 return FALSE;
e16bb312 7049
1006ba19 7050 /* Identical flags must be compatible. */
252b5132 7051 if (in_flags == out_flags)
b34976b6 7052 return TRUE;
252b5132 7053
35a0f415
DJ		 7054 /* Check to see if the input BFD actually contains any sections. If
7055 not, its flags may not have been initialised either, but it
8e3de13a 7056 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 7057 dynamic objects; their section list may be emptied by
d1f161ea 7058 elf_link_add_object_symbols.
35a0f415 7059
d1f161ea
NC		 7060 Also check to see if there are no code sections in the input.
7061 In this case there is no need to check for code specific flags.
7062 XXX - do we need to worry about floating-point format compatability
7063 in data sections ? */
35a0f415 7064 if (!(ibfd->flags & DYNAMIC))
cf919dfd 7065 {
35a0f415 7066 bfd_boolean null_input_bfd = TRUE;
d1f161ea 7067 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 7068
7069 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 7070 {
35a0f415
DJ		 7071 /* Ignore synthetic glue sections. */
7072 if (strcmp (sec->name, ".glue_7")
7073 && strcmp (sec->name, ".glue_7t"))
7074 {
d1f161ea
NC		 7075 if ((bfd_get_section_flags (ibfd, sec)
7076 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7077 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7078 only_data_sections = FALSE;
7079
35a0f415
DJ		 7080 null_input_bfd = FALSE;
7081 break;
7082 }
cf919dfd 7083 }
d1f161ea
NC		 7084
7085 if (null_input_bfd || only_data_sections)
35a0f415 7086 return TRUE;
cf919dfd 7087 }
cf919dfd 7088
252b5132 7089 /* Complain about various flag mismatches. */
3a4a14e9
PB		 7090 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
7091 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 7092 {
d003868e 7093 _bfd_error_handler
3656d5e3 7094 (_("ERROR: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 7095 ibfd, obfd,
7096 (in_flags & EF_ARM_EABIMASK) >> 24,
7097 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 7098 return FALSE;
fc830a83 7099 }
252b5132 7100
1006ba19 7101 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 7102 /* VxWorks libraries do not use these flags. */
7103 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
7104 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
7105 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 7106 {
fd2ec330 7107 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 7108 {
d003868e
AM		 7109 _bfd_error_handler
7110 (_("ERROR: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
7111 ibfd, obfd,
7112 in_flags & EF_ARM_APCS_26 ? 26 : 32,
7113 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 7114 flags_compatible = FALSE;
1006ba19 7115 }
252b5132 7116
fd2ec330 7117 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 7118 {
5eefb65f 7119 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e
AM		 7120 _bfd_error_handler
7121 (_("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"),
7122 ibfd, obfd);
5eefb65f 7123 else
d003868e
AM		 7124 _bfd_error_handler
7125 (_("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"),
7126 ibfd, obfd);
63b0f745 7127
b34976b6 7128 flags_compatible = FALSE;
1006ba19 7129 }
252b5132 7130
96a846ea 7131 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 7132 {
96a846ea 7133 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e
AM		 7134 _bfd_error_handler
7135 (_("ERROR: %B uses VFP instructions, whereas %B does not"),
7136 ibfd, obfd);
5eefb65f 7137 else
d003868e
AM		 7138 _bfd_error_handler
7139 (_("ERROR: %B uses FPA instructions, whereas %B does not"),
7140 ibfd, obfd);
fde78edd
NC		 7141
7142 flags_compatible = FALSE;
7143 }
7144
7145 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
7146 {
7147 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e
AM		 7148 _bfd_error_handler
7149 (_("ERROR: %B uses Maverick instructions, whereas %B does not"),
7150 ibfd, obfd);
fde78edd 7151 else
d003868e
AM		 7152 _bfd_error_handler
7153 (_("ERROR: %B does not use Maverick instructions, whereas %B does"),
7154 ibfd, obfd);
63b0f745 7155
b34976b6 7156 flags_compatible = FALSE;
1006ba19 7157 }
96a846ea
RE		 7158
7159#ifdef EF_ARM_SOFT_FLOAT
7160 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
7161 {
7162 /* We can allow interworking between code that is VFP format
7163 layout, and uses either soft float or integer regs for
7164 passing floating point arguments and results. We already
7165 know that the APCS_FLOAT flags match; similarly for VFP
7166 flags. */
7167 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
7168 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
7169 {
7170 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e
AM		 7171 _bfd_error_handler
7172 (_("ERROR: %B uses software FP, whereas %B uses hardware FP"),
7173 ibfd, obfd);
96a846ea 7174 else
d003868e
AM		 7175 _bfd_error_handler
7176 (_("ERROR: %B uses hardware FP, whereas %B uses software FP"),
7177 ibfd, obfd);
96a846ea 7178
b34976b6 7179 flags_compatible = FALSE;
96a846ea
RE		 7180 }
7181 }
ee43f35e 7182#endif
252b5132 7183
1006ba19 7184 /* Interworking mismatch is only a warning. */
fd2ec330 7185 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 7186 {
e3c8793a
NC		 7187 if (in_flags & EF_ARM_INTERWORK)
7188 {
d003868e
AM		 7189 _bfd_error_handler
7190 (_("Warning: %B supports interworking, whereas %B does not"),
7191 ibfd, obfd);
e3c8793a
NC		 7192 }
7193 else
7194 {
d003868e
AM		 7195 _bfd_error_handler
7196 (_("Warning: %B does not support interworking, whereas %B does"),
7197 ibfd, obfd);
e3c8793a 7198 }
8f615d07 7199 }
252b5132 7200 }
63b0f745 7201
1006ba19 7202 return flags_compatible;
252b5132
RH		 7203}
7204
9b485d32
NC		 7205/* Display the flags field. */
7206
b34976b6 7207static bfd_boolean
57e8b36a 7208elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 7209{
fc830a83
NC		 7210 FILE * file = (FILE *) ptr;
7211 unsigned long flags;
252b5132
RH		 7212
7213 BFD_ASSERT (abfd != NULL && ptr != NULL);
7214
7215 /* Print normal ELF private data. */
7216 _bfd_elf_print_private_bfd_data (abfd, ptr);
7217
fc830a83 7218 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 7219 /* Ignore init flag - it may not be set, despite the flags field
7220 containing valid data. */
252b5132
RH		 7221
7222 /* xgettext:c-format */
9b485d32 7223 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 7224
fc830a83
NC		 7225 switch (EF_ARM_EABI_VERSION (flags))
7226 {
7227 case EF_ARM_EABI_UNKNOWN:
4cc11e76 7228 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 7229 official ARM ELF extended ABI. Hence they are only decoded if
7230 the EABI version is not set. */
fd2ec330 7231 if (flags & EF_ARM_INTERWORK)
9b485d32 7232 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 7233
fd2ec330 7234 if (flags & EF_ARM_APCS_26)
6c571f00 7235 fprintf (file, " [APCS-26]");
fc830a83 7236 else
6c571f00 7237 fprintf (file, " [APCS-32]");
9a5aca8c 7238
96a846ea
RE		 7239 if (flags & EF_ARM_VFP_FLOAT)
7240 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 7241 else if (flags & EF_ARM_MAVERICK_FLOAT)
7242 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 7243 else
7244 fprintf (file, _(" [FPA float format]"));
7245
fd2ec330 7246 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 7247 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 7248
fd2ec330 7249 if (flags & EF_ARM_PIC)
9b485d32 7250 fprintf (file, _(" [position independent]"));
fc830a83 7251
fd2ec330 7252 if (flags & EF_ARM_NEW_ABI)
9b485d32 7253 fprintf (file, _(" [new ABI]"));
9a5aca8c 7254
fd2ec330 7255 if (flags & EF_ARM_OLD_ABI)
9b485d32 7256 fprintf (file, _(" [old ABI]"));
9a5aca8c 7257
fd2ec330 7258 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 7259 fprintf (file, _(" [software FP]"));
9a5aca8c 7260
96a846ea
RE		 7261 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
7262 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 7263 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
7264 | EF_ARM_MAVERICK_FLOAT);
fc830a83 7265 break;
9a5aca8c 7266
fc830a83 7267 case EF_ARM_EABI_VER1:
9b485d32 7268 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 7269
fc830a83 7270 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 7271 fprintf (file, _(" [sorted symbol table]"));
fc830a83 7272 else
9b485d32 7273 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 7274
fc830a83
NC		 7275 flags &= ~ EF_ARM_SYMSARESORTED;
7276 break;
9a5aca8c 7277
fd2ec330
PB		 7278 case EF_ARM_EABI_VER2:
7279 fprintf (file, _(" [Version2 EABI]"));
7280
7281 if (flags & EF_ARM_SYMSARESORTED)
7282 fprintf (file, _(" [sorted symbol table]"));
7283 else
7284 fprintf (file, _(" [unsorted symbol table]"));
7285
7286 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
7287 fprintf (file, _(" [dynamic symbols use segment index]"));
7288
7289 if (flags & EF_ARM_MAPSYMSFIRST)
7290 fprintf (file, _(" [mapping symbols precede others]"));
7291
99e4ae17 7292 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 7293 | EF_ARM_MAPSYMSFIRST);
7294 break;
7295
d507cf36
PB		 7296 case EF_ARM_EABI_VER3:
7297 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 7298 break;
7299
7300 case EF_ARM_EABI_VER4:
7301 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 7302 goto eabi;
d507cf36 7303
3a4a14e9
PB		 7304 case EF_ARM_EABI_VER5:
7305 fprintf (file, _(" [Version5 EABI]"));
7306 eabi:
d507cf36
PB		 7307 if (flags & EF_ARM_BE8)
7308 fprintf (file, _(" [BE8]"));
7309
7310 if (flags & EF_ARM_LE8)
7311 fprintf (file, _(" [LE8]"));
7312
7313 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
7314 break;
7315
fc830a83 7316 default:
9b485d32 7317 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 7318 break;
7319 }
252b5132 7320
fc830a83 7321 flags &= ~ EF_ARM_EABIMASK;
252b5132 7322
fc830a83 7323 if (flags & EF_ARM_RELEXEC)
9b485d32 7324 fprintf (file, _(" [relocatable executable]"));
252b5132 7325
fc830a83 7326 if (flags & EF_ARM_HASENTRY)
9b485d32 7327 fprintf (file, _(" [has entry point]"));
252b5132 7328
fc830a83
NC		 7329 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
7330
7331 if (flags)
9b485d32 7332 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 7333
252b5132
RH		 7334 fputc ('\n', file);
7335
b34976b6 7336 return TRUE;
252b5132
RH		 7337}
7338
7339static int
57e8b36a 7340elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 7341{
2f0ca46a
NC		 7342 switch (ELF_ST_TYPE (elf_sym->st_info))
7343 {
7344 case STT_ARM_TFUNC:
7345 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 7346
2f0ca46a
NC		 7347 case STT_ARM_16BIT:
7348 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
7349 This allows us to distinguish between data used by Thumb instructions
7350 and non-data (which is probably code) inside Thumb regions of an
7351 executable. */
1a0eb693 7352 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 7353 return ELF_ST_TYPE (elf_sym->st_info);
7354 break;
9a5aca8c 7355
ce855c42
NC		 7356 default:
7357 break;
2f0ca46a
NC		 7358 }
7359
7360 return type;
252b5132 7361}
f21f3fe0 7362
252b5132 7363static asection *
07adf181
AM		 7364elf32_arm_gc_mark_hook (asection *sec,
7365 struct bfd_link_info *info,
7366 Elf_Internal_Rela *rel,
7367 struct elf_link_hash_entry *h,
7368 Elf_Internal_Sym *sym)
252b5132
RH		 7369{
7370 if (h != NULL)
07adf181 7371 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 7372 {
7373 case R_ARM_GNU_VTINHERIT:
7374 case R_ARM_GNU_VTENTRY:
07adf181
AM		 7375 return NULL;
7376 }
9ad5cbcf 7377
07adf181 7378 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 7379}
7380
780a67af
NC		 7381/* Update the got entry reference counts for the section being removed. */
7382
b34976b6 7383static bfd_boolean
ba93b8ac
DJ		 7384elf32_arm_gc_sweep_hook (bfd * abfd,
7385 struct bfd_link_info * info,
7386 asection * sec,
7387 const Elf_Internal_Rela * relocs)
252b5132 7388{
5e681ec4
PB		 7389 Elf_Internal_Shdr *symtab_hdr;
7390 struct elf_link_hash_entry **sym_hashes;
7391 bfd_signed_vma *local_got_refcounts;
7392 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 7393 struct elf32_arm_link_hash_table * globals;
7394
7395 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 7396
7397 elf_section_data (sec)->local_dynrel = NULL;
7398
7399 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7400 sym_hashes = elf_sym_hashes (abfd);
7401 local_got_refcounts = elf_local_got_refcounts (abfd);
7402
7403 relend = relocs + sec->reloc_count;
7404 for (rel = relocs; rel < relend; rel++)
eb043451 7405 {
3eb128b2
AM		 7406 unsigned long r_symndx;
7407 struct elf_link_hash_entry *h = NULL;
eb043451 7408 int r_type;
5e681ec4 7409
3eb128b2
AM		 7410 r_symndx = ELF32_R_SYM (rel->r_info);
7411 if (r_symndx >= symtab_hdr->sh_info)
7412 {
7413 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7414 while (h->root.type == bfd_link_hash_indirect
7415 || h->root.type == bfd_link_hash_warning)
7416 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7417 }
7418
eb043451 7419 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7420 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 7421 switch (r_type)
7422 {
7423 case R_ARM_GOT32:
eb043451 7424 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7425 case R_ARM_TLS_GD32:
7426 case R_ARM_TLS_IE32:
3eb128b2 7427 if (h != NULL)
eb043451 7428 {
eb043451
PB		 7429 if (h->got.refcount > 0)
7430 h->got.refcount -= 1;
7431 }
7432 else if (local_got_refcounts != NULL)
7433 {
7434 if (local_got_refcounts[r_symndx] > 0)
7435 local_got_refcounts[r_symndx] -= 1;
7436 }
7437 break;
7438
ba93b8ac
DJ		 7439 case R_ARM_TLS_LDM32:
7440 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
7441 break;
7442
eb043451 7443 case R_ARM_ABS32:
bb224fc3 7444 case R_ARM_ABS32_NOI:
eb043451 7445 case R_ARM_REL32:
bb224fc3 7446 case R_ARM_REL32_NOI:
eb043451
PB		 7447 case R_ARM_PC24:
7448 case R_ARM_PLT32:
5b5bb741
PB		 7449 case R_ARM_CALL:
7450 case R_ARM_JUMP24:
eb043451 7451 case R_ARM_PREL31:
c19d1205 7452 case R_ARM_THM_CALL:
b6895b4f
PB		 7453 case R_ARM_MOVW_ABS_NC:
7454 case R_ARM_MOVT_ABS:
7455 case R_ARM_MOVW_PREL_NC:
7456 case R_ARM_MOVT_PREL:
7457 case R_ARM_THM_MOVW_ABS_NC:
7458 case R_ARM_THM_MOVT_ABS:
7459 case R_ARM_THM_MOVW_PREL_NC:
7460 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 7461 /* Should the interworking branches be here also? */
7462
3eb128b2 7463 if (h != NULL)
eb043451
PB		 7464 {
7465 struct elf32_arm_link_hash_entry *eh;
7466 struct elf32_arm_relocs_copied **pp;
7467 struct elf32_arm_relocs_copied *p;
5e681ec4 7468
b7693d02 7469 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 7470
eb043451 7471 if (h->plt.refcount > 0)
b7693d02
DJ		 7472 {
7473 h->plt.refcount -= 1;
c19d1205 7474 if (ELF32_R_TYPE (rel->r_info) == R_ARM_THM_CALL)
b7693d02
DJ		 7475 eh->plt_thumb_refcount--;
7476 }
5e681ec4 7477
eb043451 7478 if (r_type == R_ARM_ABS32
bb224fc3
MS		 7479 || r_type == R_ARM_REL32
7480 || r_type == R_ARM_ABS32_NOI
7481 || r_type == R_ARM_REL32_NOI)
eb043451 7482 {
eb043451
PB		 7483 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
7484 pp = &p->next)
7485 if (p->section == sec)
7486 {
7487 p->count -= 1;
bb224fc3
MS		 7488 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
7489 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 7490 p->pc_count -= 1;
eb043451
PB		 7491 if (p->count == 0)
7492 *pp = p->next;
7493 break;
7494 }
7495 }
7496 }
7497 break;
5e681ec4 7498
eb043451
PB		 7499 default:
7500 break;
7501 }
7502 }
5e681ec4 7503
b34976b6 7504 return TRUE;
252b5132
RH		 7505}
7506
780a67af
NC		 7507/* Look through the relocs for a section during the first phase. */
7508
b34976b6 7509static bfd_boolean
57e8b36a
NC		 7510elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
7511 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 7512{
b34976b6
AM		 7513 Elf_Internal_Shdr *symtab_hdr;
7514 struct elf_link_hash_entry **sym_hashes;
7515 struct elf_link_hash_entry **sym_hashes_end;
7516 const Elf_Internal_Rela *rel;
7517 const Elf_Internal_Rela *rel_end;
7518 bfd *dynobj;
5e681ec4 7519 asection *sreloc;
b34976b6 7520 bfd_vma *local_got_offsets;
5e681ec4 7521 struct elf32_arm_link_hash_table *htab;
9a5aca8c 7522
1049f94e 7523 if (info->relocatable)
b34976b6 7524 return TRUE;
9a5aca8c 7525
5e681ec4
PB		 7526 htab = elf32_arm_hash_table (info);
7527 sreloc = NULL;
9a5aca8c 7528
67687978
PB		 7529 /* Create dynamic sections for relocatable executables so that we can
7530 copy relocations. */
7531 if (htab->root.is_relocatable_executable
7532 && ! htab->root.dynamic_sections_created)
7533 {
7534 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
7535 return FALSE;
7536 }
7537
252b5132
RH		 7538 dynobj = elf_hash_table (info)->dynobj;
7539 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 7540
252b5132
RH		 7541 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7542 sym_hashes = elf_sym_hashes (abfd);
9b485d32
NC		 7543 sym_hashes_end = sym_hashes
7544 + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
7545
252b5132
RH		 7546 if (!elf_bad_symtab (abfd))
7547 sym_hashes_end -= symtab_hdr->sh_info;
9b485d32 7548
252b5132
RH		 7549 rel_end = relocs + sec->reloc_count;
7550 for (rel = relocs; rel < rel_end; rel++)
7551 {
7552 struct elf_link_hash_entry *h;
b7693d02 7553 struct elf32_arm_link_hash_entry *eh;
252b5132 7554 unsigned long r_symndx;
eb043451 7555 int r_type;
9a5aca8c 7556
252b5132 7557 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 7558 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7559 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac
DJ		 7560
7561 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
7562 {
7563 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
7564 r_symndx);
7565 return FALSE;
7566 }
7567
252b5132
RH		 7568 if (r_symndx < symtab_hdr->sh_info)
7569 h = NULL;
7570 else
973a3492
L		 7571 {
7572 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7573 while (h->root.type == bfd_link_hash_indirect
7574 || h->root.type == bfd_link_hash_warning)
7575 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7576 }
9a5aca8c 7577
b7693d02
DJ		 7578 eh = (struct elf32_arm_link_hash_entry *) h;
7579
eb043451 7580 switch (r_type)
252b5132 7581 {
5e681ec4 7582 case R_ARM_GOT32:
eb043451 7583 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7584 case R_ARM_TLS_GD32:
7585 case R_ARM_TLS_IE32:
5e681ec4 7586 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 7587 {
7588 int tls_type, old_tls_type;
5e681ec4 7589
ba93b8ac
DJ		 7590 switch (r_type)
7591 {
7592 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
7593 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
7594 default: tls_type = GOT_NORMAL; break;
7595 }
252b5132 7596
ba93b8ac
DJ		 7597 if (h != NULL)
7598 {
7599 h->got.refcount++;
7600 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
7601 }
7602 else
7603 {
7604 bfd_signed_vma *local_got_refcounts;
7605
7606 /* This is a global offset table entry for a local symbol. */
7607 local_got_refcounts = elf_local_got_refcounts (abfd);
7608 if (local_got_refcounts == NULL)
7609 {
7610 bfd_size_type size;
7611
7612 size = symtab_hdr->sh_info;
7613 size *= (sizeof (bfd_signed_vma) + sizeof(char));
7614 local_got_refcounts = bfd_zalloc (abfd, size);
7615 if (local_got_refcounts == NULL)
7616 return FALSE;
7617 elf_local_got_refcounts (abfd) = local_got_refcounts;
7618 elf32_arm_local_got_tls_type (abfd)
7619 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
7620 }
7621 local_got_refcounts[r_symndx] += 1;
7622 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
7623 }
7624
7625 /* We will already have issued an error message if there is a
7626 TLS / non-TLS mismatch, based on the symbol type. We don't
7627 support any linker relaxations. So just combine any TLS
7628 types needed. */
7629 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7630 && tls_type != GOT_NORMAL)
7631 tls_type |= old_tls_type;
7632
7633 if (old_tls_type != tls_type)
7634 {
7635 if (h != NULL)
7636 elf32_arm_hash_entry (h)->tls_type = tls_type;
7637 else
7638 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
7639 }
7640 }
7641 /* Fall through */
7642
7643 case R_ARM_TLS_LDM32:
7644 if (r_type == R_ARM_TLS_LDM32)
7645 htab->tls_ldm_got.refcount++;
7646 /* Fall through */
252b5132 7647
c19d1205 7648 case R_ARM_GOTOFF32:
5e681ec4
PB		 7649 case R_ARM_GOTPC:
7650 if (htab->sgot == NULL)
7651 {
7652 if (htab->root.dynobj == NULL)
7653 htab->root.dynobj = abfd;
7654 if (!create_got_section (htab->root.dynobj, info))
7655 return FALSE;
7656 }
252b5132
RH		 7657 break;
7658
00a97672
RS		 7659 case R_ARM_ABS12:
7660 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
7661 ldr __GOTT_INDEX__ offsets. */
7662 if (!htab->vxworks_p)
7663 break;
7664 /* Fall through */
7665
252b5132 7666 case R_ARM_ABS32:
bb224fc3 7667 case R_ARM_ABS32_NOI:
252b5132 7668 case R_ARM_REL32:
bb224fc3 7669 case R_ARM_REL32_NOI:
252b5132 7670 case R_ARM_PC24:
7359ea65 7671 case R_ARM_PLT32:
5b5bb741
PB		 7672 case R_ARM_CALL:
7673 case R_ARM_JUMP24:
eb043451 7674 case R_ARM_PREL31:
c19d1205 7675 case R_ARM_THM_CALL:
b6895b4f
PB		 7676 case R_ARM_MOVW_ABS_NC:
7677 case R_ARM_MOVT_ABS:
7678 case R_ARM_MOVW_PREL_NC:
7679 case R_ARM_MOVT_PREL:
7680 case R_ARM_THM_MOVW_ABS_NC:
7681 case R_ARM_THM_MOVT_ABS:
7682 case R_ARM_THM_MOVW_PREL_NC:
7683 case R_ARM_THM_MOVT_PREL:
b7693d02 7684 /* Should the interworking branches be listed here? */
7359ea65 7685 if (h != NULL)
5e681ec4
PB		 7686 {
7687 /* If this reloc is in a read-only section, we might
7688 need a copy reloc. We can't check reliably at this
7689 stage whether the section is read-only, as input
7690 sections have not yet been mapped to output sections.
7691 Tentatively set the flag for now, and correct in
7692 adjust_dynamic_symbol. */
7359ea65 7693 if (!info->shared)
f5385ebf 7694 h->non_got_ref = 1;
7359ea65 7695
5e681ec4 7696 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 7697 refers to is in a different object. We can't tell for
7698 sure yet, because something later might force the
7699 symbol local. */
bb224fc3
MS		 7700 if (r_type != R_ARM_ABS32
7701 && r_type != R_ARM_REL32
7702 && r_type != R_ARM_ABS32_NOI
d3753b85
RS		 7703 && r_type != R_ARM_REL32_NOI
7704 && r_type != R_ARM_ABS12)
f5385ebf 7705 h->needs_plt = 1;
4f199be3
DJ		 7706
7707 /* If we create a PLT entry, this relocation will reference
7708 it, even if it's an ABS32 relocation. */
7709 h->plt.refcount += 1;
b7693d02 7710
c19d1205 7711 if (r_type == R_ARM_THM_CALL)
b7693d02 7712 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 7713 }
7714
67687978
PB		 7715 /* If we are creating a shared library or relocatable executable,
7716 and this is a reloc against a global symbol, or a non PC
7717 relative reloc against a local symbol, then we need to copy
7718 the reloc into the shared library. However, if we are linking
7719 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 7720 global symbol which is defined in an object we are
7721 including in the link (i.e., DEF_REGULAR is set). At
7722 this point we have not seen all the input files, so it is
7723 possible that DEF_REGULAR is not set now but will be set
7724 later (it is never cleared). We account for that
7725 possibility below by storing information in the
5e681ec4 7726 relocs_copied field of the hash table entry. */
67687978 7727 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 7728 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 7729 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 7730 || (h != NULL && ! h->needs_plt
7731 && (! info->symbolic || ! h->def_regular))))
252b5132 7732 {
5e681ec4
PB		 7733 struct elf32_arm_relocs_copied *p, **head;
7734
252b5132
RH		 7735 /* When creating a shared object, we must copy these
7736 reloc types into the output file. We create a reloc
7737 section in dynobj and make room for this reloc. */
7738 if (sreloc == NULL)
7739 {
7740 const char * name;
7741
7742 name = (bfd_elf_string_from_elf_section
7743 (abfd,
7744 elf_elfheader (abfd)->e_shstrndx,
7745 elf_section_data (sec)->rel_hdr.sh_name));
7746 if (name == NULL)
b34976b6 7747 return FALSE;
252b5132 7748
00a97672 7749 BFD_ASSERT (reloc_section_p (htab, name, sec));
252b5132
RH		 7750
7751 sreloc = bfd_get_section_by_name (dynobj, name);
7752 if (sreloc == NULL)
7753 {
7754 flagword flags;
7755
252b5132
RH		 7756 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7757 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
e5a52504
MM		 7758 if ((sec->flags & SEC_ALLOC) != 0
7759 /* BPABI objects never have dynamic
7760 relocations mapped. */
7761 && !htab->symbian_p)
252b5132 7762 flags |= SEC_ALLOC | SEC_LOAD;
3496cb2a
L		 7763 sreloc = bfd_make_section_with_flags (dynobj,
7764 name,
7765 flags);
252b5132 7766 if (sreloc == NULL
252b5132 7767 || ! bfd_set_section_alignment (dynobj, sreloc, 2))
b34976b6 7768 return FALSE;
252b5132 7769 }
5e681ec4
PB		 7770
7771 elf_section_data (sec)->sreloc = sreloc;
252b5132
RH		 7772 }
7773
5e681ec4
PB		 7774 /* If this is a global symbol, we count the number of
7775 relocations we need for this symbol. */
7776 if (h != NULL)
252b5132 7777 {
5e681ec4
PB		 7778 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
7779 }
7780 else
7781 {
7782 /* Track dynamic relocs needed for local syms too.
7783 We really need local syms available to do this
7784 easily. Oh well. */
57e8b36a 7785
5e681ec4 7786 asection *s;
6edfbbad
DJ		 7787 void *vpp;
7788
5e681ec4
PB		 7789 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
7790 sec, r_symndx);
7791 if (s == NULL)
7792 return FALSE;
57e8b36a 7793
6edfbbad
DJ		 7794 vpp = &elf_section_data (s)->local_dynrel;
7795 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 7796 }
57e8b36a 7797
5e681ec4
PB		 7798 p = *head;
7799 if (p == NULL || p->section != sec)
7800 {
7801 bfd_size_type amt = sizeof *p;
57e8b36a 7802
5e681ec4 7803 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 7804 if (p == NULL)
5e681ec4
PB		 7805 return FALSE;
7806 p->next = *head;
7807 *head = p;
7808 p->section = sec;
7809 p->count = 0;
ba93b8ac 7810 p->pc_count = 0;
252b5132 7811 }
57e8b36a 7812
bb224fc3 7813 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 7814 p->pc_count += 1;
71a976dd 7815 p->count += 1;
252b5132
RH		 7816 }
7817 break;
7818
7819 /* This relocation describes the C++ object vtable hierarchy.
7820 Reconstruct it for later use during GC. */
7821 case R_ARM_GNU_VTINHERIT:
c152c796 7822 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 7823 return FALSE;
252b5132 7824 break;
9a5aca8c 7825
252b5132
RH		 7826 /* This relocation describes which C++ vtable entries are actually
7827 used. Record for later use during GC. */
7828 case R_ARM_GNU_VTENTRY:
c152c796 7829 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 7830 return FALSE;
252b5132
RH		 7831 break;
7832 }
7833 }
f21f3fe0 7834
b34976b6 7835 return TRUE;
252b5132
RH		 7836}
7837
6a5bb875
PB		 7838/* Unwinding tables are not referenced directly. This pass marks them as
7839 required if the corresponding code section is marked. */
7840
7841static bfd_boolean
7842elf32_arm_gc_mark_extra_sections(struct bfd_link_info *info,
7843 elf_gc_mark_hook_fn gc_mark_hook)
7844{
7845 bfd *sub;
7846 Elf_Internal_Shdr **elf_shdrp;
7847 bfd_boolean again;
7848
7849 /* Marking EH data may cause additional code sections to be marked,
7850 requiring multiple passes. */
7851 again = TRUE;
7852 while (again)
7853 {
7854 again = FALSE;
7855 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
7856 {
7857 asection *o;
7858
7859 if (bfd_get_flavour (sub) != bfd_target_elf_flavour)
7860 continue;
7861
7862 elf_shdrp = elf_elfsections (sub);
7863 for (o = sub->sections; o != NULL; o = o->next)
7864 {
7865 Elf_Internal_Shdr *hdr;
7866 hdr = &elf_section_data (o)->this_hdr;
7867 if (hdr->sh_type == SHT_ARM_EXIDX && hdr->sh_link
7868 && !o->gc_mark
7869 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
7870 {
7871 again = TRUE;
7872 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
7873 return FALSE;
7874 }
7875 }
7876 }
7877 }
7878
7879 return TRUE;
7880}
7881
3c9458e9
NC		 7882/* Treat mapping symbols as special target symbols. */
7883
7884static bfd_boolean
7885elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
7886{
b0796911
PB		 7887 return bfd_is_arm_special_symbol_name (sym->name,
7888 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 7889}
7890
0367ecfb
NC		 7891/* This is a copy of elf_find_function() from elf.c except that
7892 ARM mapping symbols are ignored when looking for function names
7893 and STT_ARM_TFUNC is considered to a function type. */
252b5132 7894
0367ecfb
NC		 7895static bfd_boolean
7896arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
7897 asection * section,
7898 asymbol ** symbols,
7899 bfd_vma offset,
7900 const char ** filename_ptr,
7901 const char ** functionname_ptr)
7902{
7903 const char * filename = NULL;
7904 asymbol * func = NULL;
7905 bfd_vma low_func = 0;
7906 asymbol ** p;
252b5132
RH		 7907
7908 for (p = symbols; *p != NULL; p++)
7909 {
7910 elf_symbol_type *q;
7911
7912 q = (elf_symbol_type *) *p;
7913
252b5132
RH		 7914 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
7915 {
7916 default:
7917 break;
7918 case STT_FILE:
7919 filename = bfd_asymbol_name (&q->symbol);
7920 break;
252b5132
RH		 7921 case STT_FUNC:
7922 case STT_ARM_TFUNC:
9d2da7ca 7923 case STT_NOTYPE:
b0796911 7924 /* Skip mapping symbols. */
0367ecfb 7925 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 7926 && bfd_is_arm_special_symbol_name (q->symbol.name,
7927 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 7928 continue;
7929 /* Fall through. */
6b40fcba 7930 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 7931 && q->symbol.value >= low_func
7932 && q->symbol.value <= offset)
7933 {
7934 func = (asymbol *) q;
7935 low_func = q->symbol.value;
7936 }
7937 break;
7938 }
7939 }
7940
7941 if (func == NULL)
b34976b6 7942 return FALSE;
252b5132 7943
0367ecfb
NC		 7944 if (filename_ptr)
7945 *filename_ptr = filename;
7946 if (functionname_ptr)
7947 *functionname_ptr = bfd_asymbol_name (func);
7948
7949 return TRUE;
7950}
7951
7952
7953/* Find the nearest line to a particular section and offset, for error
7954 reporting. This code is a duplicate of the code in elf.c, except
7955 that it uses arm_elf_find_function. */
7956
7957static bfd_boolean
7958elf32_arm_find_nearest_line (bfd * abfd,
7959 asection * section,
7960 asymbol ** symbols,
7961 bfd_vma offset,
7962 const char ** filename_ptr,
7963 const char ** functionname_ptr,
7964 unsigned int * line_ptr)
7965{
7966 bfd_boolean found = FALSE;
7967
7968 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
7969
7970 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
7971 filename_ptr, functionname_ptr,
7972 line_ptr, 0,
7973 & elf_tdata (abfd)->dwarf2_find_line_info))
7974 {
7975 if (!*functionname_ptr)
7976 arm_elf_find_function (abfd, section, symbols, offset,
7977 *filename_ptr ? NULL : filename_ptr,
7978 functionname_ptr);
f21f3fe0 7979
0367ecfb
NC		 7980 return TRUE;
7981 }
7982
7983 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
7984 & found, filename_ptr,
7985 functionname_ptr, line_ptr,
7986 & elf_tdata (abfd)->line_info))
7987 return FALSE;
7988
7989 if (found && (*functionname_ptr || *line_ptr))
7990 return TRUE;
7991
7992 if (symbols == NULL)
7993 return FALSE;
7994
7995 if (! arm_elf_find_function (abfd, section, symbols, offset,
7996 filename_ptr, functionname_ptr))
7997 return FALSE;
7998
7999 *line_ptr = 0;
b34976b6 8000 return TRUE;
252b5132
RH		 8001}
8002
4ab527b0
FF		 8003static bfd_boolean
8004elf32_arm_find_inliner_info (bfd * abfd,
8005 const char ** filename_ptr,
8006 const char ** functionname_ptr,
8007 unsigned int * line_ptr)
8008{
8009 bfd_boolean found;
8010 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
8011 functionname_ptr, line_ptr,
8012 & elf_tdata (abfd)->dwarf2_find_line_info);
8013 return found;
8014}
8015
252b5132
RH		 8016/* Adjust a symbol defined by a dynamic object and referenced by a
8017 regular object. The current definition is in some section of the
8018 dynamic object, but we're not including those sections. We have to
8019 change the definition to something the rest of the link can
8020 understand. */
8021
b34976b6 8022static bfd_boolean
57e8b36a
NC		 8023elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
8024 struct elf_link_hash_entry * h)
252b5132
RH		 8025{
8026 bfd * dynobj;
8027 asection * s;
b7693d02 8028 struct elf32_arm_link_hash_entry * eh;
67687978 8029 struct elf32_arm_link_hash_table *globals;
252b5132 8030
67687978 8031 globals = elf32_arm_hash_table (info);
252b5132
RH		 8032 dynobj = elf_hash_table (info)->dynobj;
8033
8034 /* Make sure we know what is going on here. */
8035 BFD_ASSERT (dynobj != NULL
f5385ebf 8036 && (h->needs_plt
f6e332e6 8037 || h->u.weakdef != NULL
f5385ebf
AM		 8038 || (h->def_dynamic
8039 && h->ref_regular
8040 && !h->def_regular)));
252b5132 8041
b7693d02
DJ		 8042 eh = (struct elf32_arm_link_hash_entry *) h;
8043
252b5132
RH		 8044 /* If this is a function, put it in the procedure linkage table. We
8045 will fill in the contents of the procedure linkage table later,
8046 when we know the address of the .got section. */
b7693d02 8047 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 8048 || h->needs_plt)
252b5132 8049 {
5e681ec4
PB		 8050 if (h->plt.refcount <= 0
8051 || SYMBOL_CALLS_LOCAL (info, h)
8052 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8053 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 8054 {
8055 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 8056 file, but the symbol was never referred to by a dynamic
8057 object, or if all references were garbage collected. In
8058 such a case, we don't actually need to build a procedure
8059 linkage table, and we can just do a PC24 reloc instead. */
8060 h->plt.offset = (bfd_vma) -1;
b7693d02 8061 eh->plt_thumb_refcount = 0;
f5385ebf 8062 h->needs_plt = 0;
252b5132
RH		 8063 }
8064
b34976b6 8065 return TRUE;
252b5132 8066 }
5e681ec4 8067 else
b7693d02
DJ		 8068 {
8069 /* It's possible that we incorrectly decided a .plt reloc was
8070 needed for an R_ARM_PC24 or similar reloc to a non-function sym
8071 in check_relocs. We can't decide accurately between function
8072 and non-function syms in check-relocs; Objects loaded later in
8073 the link may change h->type. So fix it now. */
8074 h->plt.offset = (bfd_vma) -1;
8075 eh->plt_thumb_refcount = 0;
8076 }
252b5132
RH		 8077
8078 /* If this is a weak symbol, and there is a real definition, the
8079 processor independent code will have arranged for us to see the
8080 real definition first, and we can just use the same value. */
f6e332e6 8081 if (h->u.weakdef != NULL)
252b5132 8082 {
f6e332e6
AM		 8083 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
8084 || h->u.weakdef->root.type == bfd_link_hash_defweak);
8085 h->root.u.def.section = h->u.weakdef->root.u.def.section;
8086 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 8087 return TRUE;
252b5132
RH		 8088 }
8089
ba93b8ac
DJ		 8090 /* If there are no non-GOT references, we do not need a copy
8091 relocation. */
8092 if (!h->non_got_ref)
8093 return TRUE;
8094
252b5132
RH		 8095 /* This is a reference to a symbol defined by a dynamic object which
8096 is not a function. */
8097
8098 /* If we are creating a shared library, we must presume that the
8099 only references to the symbol are via the global offset table.
8100 For such cases we need not do anything here; the relocations will
67687978
PB		 8101 be handled correctly by relocate_section. Relocatable executables
8102 can reference data in shared objects directly, so we don't need to
8103 do anything here. */
8104 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 8105 return TRUE;
252b5132 8106
909272ee
AM		 8107 if (h->size == 0)
8108 {
8109 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
8110 h->root.root.string);
8111 return TRUE;
8112 }
8113
252b5132
RH		 8114 /* We must allocate the symbol in our .dynbss section, which will
8115 become part of the .bss section of the executable. There will be
8116 an entry for this symbol in the .dynsym section. The dynamic
8117 object will contain position independent code, so all references
8118 from the dynamic object to this symbol will go through the global
8119 offset table. The dynamic linker will use the .dynsym entry to
8120 determine the address it must put in the global offset table, so
8121 both the dynamic object and the regular object will refer to the
8122 same memory location for the variable. */
252b5132
RH		 8123 s = bfd_get_section_by_name (dynobj, ".dynbss");
8124 BFD_ASSERT (s != NULL);
8125
8126 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
8127 copy the initial value out of the dynamic object and into the
8128 runtime process image. We need to remember the offset into the
00a97672 8129 .rel(a).bss section we are going to use. */
252b5132
RH		 8130 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
8131 {
8132 asection *srel;
8133
00a97672 8134 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 8135 BFD_ASSERT (srel != NULL);
00a97672 8136 srel->size += RELOC_SIZE (globals);
f5385ebf 8137 h->needs_copy = 1;
252b5132
RH		 8138 }
8139
027297b7 8140 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 8141}
8142
5e681ec4
PB		 8143/* Allocate space in .plt, .got and associated reloc sections for
8144 dynamic relocs. */
8145
8146static bfd_boolean
57e8b36a 8147allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 8148{
8149 struct bfd_link_info *info;
8150 struct elf32_arm_link_hash_table *htab;
8151 struct elf32_arm_link_hash_entry *eh;
8152 struct elf32_arm_relocs_copied *p;
8153
b7693d02
DJ		 8154 eh = (struct elf32_arm_link_hash_entry *) h;
8155
5e681ec4
PB		 8156 if (h->root.type == bfd_link_hash_indirect)
8157 return TRUE;
8158
8159 if (h->root.type == bfd_link_hash_warning)
8160 /* When warning symbols are created, they **replace** the "real"
8161 entry in the hash table, thus we never get to see the real
8162 symbol in a hash traversal. So look at it now. */
8163 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8164
8165 info = (struct bfd_link_info *) inf;
8166 htab = elf32_arm_hash_table (info);
8167
8168 if (htab->root.dynamic_sections_created
8169 && h->plt.refcount > 0)
8170 {
8171 /* Make sure this symbol is output as a dynamic symbol.
8172 Undefined weak syms won't yet be marked as dynamic. */
8173 if (h->dynindx == -1
f5385ebf 8174 && !h->forced_local)
5e681ec4 8175 {
c152c796 8176 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8177 return FALSE;
8178 }
8179
8180 if (info->shared
7359ea65 8181 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 8182 {
8183 asection *s = htab->splt;
8184
8185 /* If this is the first .plt entry, make room for the special
8186 first entry. */
eea6121a 8187 if (s->size == 0)
e5a52504 8188 s->size += htab->plt_header_size;
5e681ec4 8189
eea6121a 8190 h->plt.offset = s->size;
5e681ec4 8191
b7693d02
DJ		 8192 /* If we will insert a Thumb trampoline before this PLT, leave room
8193 for it. */
33bfe774 8194 if (!htab->use_blx && eh->plt_thumb_refcount > 0)
b7693d02
DJ		 8195 {
8196 h->plt.offset += PLT_THUMB_STUB_SIZE;
8197 s->size += PLT_THUMB_STUB_SIZE;
8198 }
8199
5e681ec4
PB		 8200 /* If this symbol is not defined in a regular file, and we are
8201 not generating a shared library, then set the symbol to this
8202 location in the .plt. This is required to make function
8203 pointers compare as equal between the normal executable and
8204 the shared library. */
8205 if (! info->shared
f5385ebf 8206 && !h->def_regular)
5e681ec4
PB		 8207 {
8208 h->root.u.def.section = s;
8209 h->root.u.def.value = h->plt.offset;
b7693d02
DJ		 8210
8211 /* Make sure the function is not marked as Thumb, in case
8212 it is the target of an ABS32 relocation, which will
8213 point to the PLT entry. */
8214 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
8215 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB		 8216 }
8217
8218 /* Make room for this entry. */
e5a52504 8219 s->size += htab->plt_entry_size;
5e681ec4 8220
e5a52504 8221 if (!htab->symbian_p)
b7693d02
DJ		 8222 {
8223 /* We also need to make an entry in the .got.plt section, which
8224 will be placed in the .got section by the linker script. */
8225 eh->plt_got_offset = htab->sgotplt->size;
8226 htab->sgotplt->size += 4;
8227 }
5e681ec4 8228
00a97672
RS		 8229 /* We also need to make an entry in the .rel(a).plt section. */
8230 htab->srelplt->size += RELOC_SIZE (htab);
8231
8232 /* VxWorks executables have a second set of relocations for
8233 each PLT entry. They go in a separate relocation section,
8234 which is processed by the kernel loader. */
8235 if (htab->vxworks_p && !info->shared)
8236 {
8237 /* There is a relocation for the initial PLT entry:
8238 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
8239 if (h->plt.offset == htab->plt_header_size)
8240 htab->srelplt2->size += RELOC_SIZE (htab);
8241
8242 /* There are two extra relocations for each subsequent
8243 PLT entry: an R_ARM_32 relocation for the GOT entry,
8244 and an R_ARM_32 relocation for the PLT entry. */
8245 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
8246 }
5e681ec4
PB		 8247 }
8248 else
8249 {
8250 h->plt.offset = (bfd_vma) -1;
f5385ebf 8251 h->needs_plt = 0;
5e681ec4
PB		 8252 }
8253 }
8254 else
8255 {
8256 h->plt.offset = (bfd_vma) -1;
f5385ebf 8257 h->needs_plt = 0;
5e681ec4
PB		 8258 }
8259
8260 if (h->got.refcount > 0)
8261 {
8262 asection *s;
8263 bfd_boolean dyn;
ba93b8ac
DJ		 8264 int tls_type = elf32_arm_hash_entry (h)->tls_type;
8265 int indx;
5e681ec4
PB		 8266
8267 /* Make sure this symbol is output as a dynamic symbol.
8268 Undefined weak syms won't yet be marked as dynamic. */
8269 if (h->dynindx == -1
f5385ebf 8270 && !h->forced_local)
5e681ec4 8271 {
c152c796 8272 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8273 return FALSE;
8274 }
8275
e5a52504
MM		 8276 if (!htab->symbian_p)
8277 {
8278 s = htab->sgot;
8279 h->got.offset = s->size;
ba93b8ac
DJ		 8280
8281 if (tls_type == GOT_UNKNOWN)
8282 abort ();
8283
8284 if (tls_type == GOT_NORMAL)
8285 /* Non-TLS symbols need one GOT slot. */
8286 s->size += 4;
8287 else
8288 {
8289 if (tls_type & GOT_TLS_GD)
8290 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
8291 s->size += 8;
8292 if (tls_type & GOT_TLS_IE)
8293 /* R_ARM_TLS_IE32 needs one GOT slot. */
8294 s->size += 4;
8295 }
8296
e5a52504 8297 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 8298
8299 indx = 0;
8300 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8301 && (!info->shared
8302 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8303 indx = h->dynindx;
8304
8305 if (tls_type != GOT_NORMAL
8306 && (info->shared || indx != 0)
8307 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8308 || h->root.type != bfd_link_hash_undefweak))
8309 {
8310 if (tls_type & GOT_TLS_IE)
00a97672 8311 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8312
8313 if (tls_type & GOT_TLS_GD)
00a97672 8314 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8315
8316 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 8317 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8318 }
8319 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8320 || h->root.type != bfd_link_hash_undefweak)
8321 && (info->shared
8322 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 8323 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 8324 }
5e681ec4
PB		 8325 }
8326 else
8327 h->got.offset = (bfd_vma) -1;
8328
a4fd1a8e
PB		 8329 /* Allocate stubs for exported Thumb functions on v4t. */
8330 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 8331 && h->def_regular
a4fd1a8e
PB		 8332 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
8333 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
8334 {
8335 struct elf_link_hash_entry * th;
8336 struct bfd_link_hash_entry * bh;
8337 struct elf_link_hash_entry * myh;
8338 char name[1024];
8339 asection *s;
8340 bh = NULL;
8341 /* Create a new symbol to regist the real location of the function. */
8342 s = h->root.u.def.section;
8343 sprintf(name, "__real_%s", h->root.root.string);
8344 _bfd_generic_link_add_one_symbol (info, s->owner,
8345 name, BSF_GLOBAL, s,
8346 h->root.u.def.value,
8347 NULL, TRUE, FALSE, &bh);
8348
8349 myh = (struct elf_link_hash_entry *) bh;
8350 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
8351 myh->forced_local = 1;
8352 eh->export_glue = myh;
8353 th = record_arm_to_thumb_glue (info, h);
8354 /* Point the symbol at the stub. */
8355 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
8356 h->root.u.def.section = th->root.u.def.section;
8357 h->root.u.def.value = th->root.u.def.value & ~1;
8358 }
8359
5e681ec4
PB		 8360 if (eh->relocs_copied == NULL)
8361 return TRUE;
8362
8363 /* In the shared -Bsymbolic case, discard space allocated for
8364 dynamic pc-relative relocs against symbols which turn out to be
8365 defined in regular objects. For the normal shared case, discard
8366 space for pc-relative relocs that have become local due to symbol
8367 visibility changes. */
8368
67687978 8369 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 8370 {
7bdca076 8371 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 8372 R_ARM_REL32_NOI, which will appear on something like
8373 ".long foo - .". We want calls to protected symbols to resolve
8374 directly to the function rather than going via the plt. If people
8375 want function pointer comparisons to work as expected then they
8376 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 8377 if (SYMBOL_CALLS_LOCAL (info, h))
8378 {
8379 struct elf32_arm_relocs_copied **pp;
8380
8381 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
8382 {
8383 p->count -= p->pc_count;
8384 p->pc_count = 0;
8385 if (p->count == 0)
8386 *pp = p->next;
8387 else
8388 pp = &p->next;
8389 }
8390 }
8391
8392 /* Also discard relocs on undefined weak syms with non-default
7359ea65 8393 visibility. */
22d606e9 8394 if (eh->relocs_copied != NULL
5e681ec4 8395 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 8396 {
8397 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
8398 eh->relocs_copied = NULL;
8399
8400 /* Make sure undefined weak symbols are output as a dynamic
8401 symbol in PIEs. */
8402 else if (h->dynindx == -1
8403 && !h->forced_local)
8404 {
8405 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8406 return FALSE;
8407 }
8408 }
8409
67687978
PB		 8410 else if (htab->root.is_relocatable_executable && h->dynindx == -1
8411 && h->root.type == bfd_link_hash_new)
8412 {
8413 /* Output absolute symbols so that we can create relocations
8414 against them. For normal symbols we output a relocation
8415 against the section that contains them. */
8416 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8417 return FALSE;
8418 }
8419
5e681ec4
PB		 8420 }
8421 else
8422 {
8423 /* For the non-shared case, discard space for relocs against
8424 symbols which turn out to need copy relocs or are not
8425 dynamic. */
8426
f5385ebf
AM		 8427 if (!h->non_got_ref
8428 && ((h->def_dynamic
8429 && !h->def_regular)
5e681ec4
PB		 8430 || (htab->root.dynamic_sections_created
8431 && (h->root.type == bfd_link_hash_undefweak
8432 || h->root.type == bfd_link_hash_undefined))))
8433 {
8434 /* Make sure this symbol is output as a dynamic symbol.
8435 Undefined weak syms won't yet be marked as dynamic. */
8436 if (h->dynindx == -1
f5385ebf 8437 && !h->forced_local)
5e681ec4 8438 {
c152c796 8439 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8440 return FALSE;
8441 }
8442
8443 /* If that succeeded, we know we'll be keeping all the
8444 relocs. */
8445 if (h->dynindx != -1)
8446 goto keep;
8447 }
8448
8449 eh->relocs_copied = NULL;
8450
8451 keep: ;
8452 }
8453
8454 /* Finally, allocate space. */
8455 for (p = eh->relocs_copied; p != NULL; p = p->next)
8456 {
8457 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 8458 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8459 }
8460
8461 return TRUE;
8462}
8463
08d1f311
DJ		 8464/* Find any dynamic relocs that apply to read-only sections. */
8465
8466static bfd_boolean
8467elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf)
8468{
8469 struct elf32_arm_link_hash_entry *eh;
8470 struct elf32_arm_relocs_copied *p;
8471
8472 if (h->root.type == bfd_link_hash_warning)
8473 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8474
8475 eh = (struct elf32_arm_link_hash_entry *) h;
8476 for (p = eh->relocs_copied; p != NULL; p = p->next)
8477 {
8478 asection *s = p->section;
8479
8480 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8481 {
8482 struct bfd_link_info *info = (struct bfd_link_info *) inf;
8483
8484 info->flags |= DF_TEXTREL;
8485
8486 /* Not an error, just cut short the traversal. */
8487 return FALSE;
8488 }
8489 }
8490 return TRUE;
8491}
8492
d504ffc8
DJ		 8493void
8494bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
8495 int byteswap_code)
8496{
8497 struct elf32_arm_link_hash_table *globals;
8498
8499 globals = elf32_arm_hash_table (info);
8500 globals->byteswap_code = byteswap_code;
8501}
8502
252b5132
RH		 8503/* Set the sizes of the dynamic sections. */
8504
b34976b6 8505static bfd_boolean
57e8b36a
NC		 8506elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
8507 struct bfd_link_info * info)
252b5132
RH		 8508{
8509 bfd * dynobj;
8510 asection * s;
b34976b6
AM		 8511 bfd_boolean plt;
8512 bfd_boolean relocs;
5e681ec4
PB		 8513 bfd *ibfd;
8514 struct elf32_arm_link_hash_table *htab;
252b5132 8515
5e681ec4 8516 htab = elf32_arm_hash_table (info);
252b5132
RH		 8517 dynobj = elf_hash_table (info)->dynobj;
8518 BFD_ASSERT (dynobj != NULL);
39b41c9c 8519 check_use_blx (htab);
252b5132
RH		 8520
8521 if (elf_hash_table (info)->dynamic_sections_created)
8522 {
8523 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 8524 if (info->executable)
252b5132
RH		 8525 {
8526 s = bfd_get_section_by_name (dynobj, ".interp");
8527 BFD_ASSERT (s != NULL);
eea6121a 8528 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 8529 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
8530 }
8531 }
5e681ec4
PB		 8532
8533 /* Set up .got offsets for local syms, and space for local dynamic
8534 relocs. */
8535 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 8536 {
5e681ec4
PB		 8537 bfd_signed_vma *local_got;
8538 bfd_signed_vma *end_local_got;
8539 char *local_tls_type;
8540 bfd_size_type locsymcount;
8541 Elf_Internal_Shdr *symtab_hdr;
8542 asection *srel;
8543
8544 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
8545 continue;
8546
8547 for (s = ibfd->sections; s != NULL; s = s->next)
8548 {
8549 struct elf32_arm_relocs_copied *p;
8550
6edfbbad 8551 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 8552 {
8553 if (!bfd_is_abs_section (p->section)
8554 && bfd_is_abs_section (p->section->output_section))
8555 {
8556 /* Input section has been discarded, either because
8557 it is a copy of a linkonce section or due to
8558 linker script /DISCARD/, so we'll be discarding
8559 the relocs too. */
8560 }
8561 else if (p->count != 0)
8562 {
8563 srel = elf_section_data (p->section)->sreloc;
00a97672 8564 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8565 if ((p->section->output_section->flags & SEC_READONLY) != 0)
8566 info->flags |= DF_TEXTREL;
8567 }
8568 }
8569 }
8570
8571 local_got = elf_local_got_refcounts (ibfd);
8572 if (!local_got)
8573 continue;
8574
8575 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
8576 locsymcount = symtab_hdr->sh_info;
8577 end_local_got = local_got + locsymcount;
ba93b8ac 8578 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 8579 s = htab->sgot;
8580 srel = htab->srelgot;
8581 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
8582 {
8583 if (*local_got > 0)
8584 {
eea6121a 8585 *local_got = s->size;
ba93b8ac
DJ		 8586 if (*local_tls_type & GOT_TLS_GD)
8587 /* TLS_GD relocs need an 8-byte structure in the GOT. */
8588 s->size += 8;
8589 if (*local_tls_type & GOT_TLS_IE)
8590 s->size += 4;
8591 if (*local_tls_type == GOT_NORMAL)
8592 s->size += 4;
8593
8594 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 8595 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 8596 }
8597 else
8598 *local_got = (bfd_vma) -1;
8599 }
252b5132
RH		 8600 }
8601
ba93b8ac
DJ		 8602 if (htab->tls_ldm_got.refcount > 0)
8603 {
8604 /* Allocate two GOT entries and one dynamic relocation (if necessary)
8605 for R_ARM_TLS_LDM32 relocations. */
8606 htab->tls_ldm_got.offset = htab->sgot->size;
8607 htab->sgot->size += 8;
8608 if (info->shared)
00a97672 8609 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8610 }
8611 else
8612 htab->tls_ldm_got.offset = -1;
8613
5e681ec4
PB		 8614 /* Allocate global sym .plt and .got entries, and space for global
8615 sym dynamic relocs. */
57e8b36a 8616 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 8617
d504ffc8
DJ		 8618 /* Here we rummage through the found bfds to collect glue information. */
8619 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e
JB		 8620 {
8621 /* Initialise mapping tables for code/data. */
8622 bfd_elf32_arm_init_maps (ibfd);
8623
8624 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
8625 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
8626 /* xgettext:c-format */
8627 _bfd_error_handler (_("Errors encountered processing file %s"),
8628 ibfd->filename);
8629 }
d504ffc8 8630
252b5132
RH		 8631 /* The check_relocs and adjust_dynamic_symbol entry points have
8632 determined the sizes of the various dynamic sections. Allocate
8633 memory for them. */
b34976b6
AM		 8634 plt = FALSE;
8635 relocs = FALSE;
252b5132
RH		 8636 for (s = dynobj->sections; s != NULL; s = s->next)
8637 {
8638 const char * name;
252b5132
RH		 8639
8640 if ((s->flags & SEC_LINKER_CREATED) == 0)
8641 continue;
8642
8643 /* It's OK to base decisions on the section name, because none
8644 of the dynobj section names depend upon the input files. */
8645 name = bfd_get_section_name (dynobj, s);
8646
24a1ba0f 8647 if (strcmp (name, ".plt") == 0)
252b5132 8648 {
c456f082
AM		 8649 /* Remember whether there is a PLT. */
8650 plt = s->size != 0;
252b5132 8651 }
0112cd26 8652 else if (CONST_STRNEQ (name, ".rel"))
252b5132 8653 {
c456f082 8654 if (s->size != 0)
252b5132 8655 {
252b5132 8656 /* Remember whether there are any reloc sections other
00a97672
RS		 8657 than .rel(a).plt and .rela.plt.unloaded. */
8658 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 8659 relocs = TRUE;
252b5132
RH		 8660
8661 /* We use the reloc_count field as a counter if we need
8662 to copy relocs into the output file. */
8663 s->reloc_count = 0;
8664 }
8665 }
0112cd26 8666 else if (! CONST_STRNEQ (name, ".got")
c456f082 8667 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 8668 {
8669 /* It's not one of our sections, so don't allocate space. */
8670 continue;
8671 }
8672
c456f082 8673 if (s->size == 0)
252b5132 8674 {
c456f082 8675 /* If we don't need this section, strip it from the
00a97672
RS		 8676 output file. This is mostly to handle .rel(a).bss and
8677 .rel(a).plt. We must create both sections in
c456f082
AM		 8678 create_dynamic_sections, because they must be created
8679 before the linker maps input sections to output
8680 sections. The linker does that before
8681 adjust_dynamic_symbol is called, and it is that
8682 function which decides whether anything needs to go
8683 into these sections. */
8423293d 8684 s->flags |= SEC_EXCLUDE;
252b5132
RH		 8685 continue;
8686 }
8687
c456f082
AM		 8688 if ((s->flags & SEC_HAS_CONTENTS) == 0)
8689 continue;
8690
252b5132 8691 /* Allocate memory for the section contents. */
eea6121a 8692 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
c456f082 8693 if (s->contents == NULL)
b34976b6 8694 return FALSE;
252b5132
RH		 8695 }
8696
8697 if (elf_hash_table (info)->dynamic_sections_created)
8698 {
8699 /* Add some entries to the .dynamic section. We fill in the
8700 values later, in elf32_arm_finish_dynamic_sections, but we
8701 must add the entries now so that we get the correct size for
8702 the .dynamic section. The DT_DEBUG entry is filled in by the
8703 dynamic linker and used by the debugger. */
dc810e39 8704#define add_dynamic_entry(TAG, VAL) \
5a580b3a 8705 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 8706
8532796c 8707 if (info->executable)
252b5132 8708 {
dc810e39 8709 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 8710 return FALSE;
252b5132
RH		 8711 }
8712
8713 if (plt)
8714 {
dc810e39
AM		 8715 if ( !add_dynamic_entry (DT_PLTGOT, 0)
8716 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 8717 || !add_dynamic_entry (DT_PLTREL,
8718 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 8719 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 8720 return FALSE;
252b5132
RH		 8721 }
8722
8723 if (relocs)
8724 {
00a97672
RS		 8725 if (htab->use_rel)
8726 {
8727 if (!add_dynamic_entry (DT_REL, 0)
8728 || !add_dynamic_entry (DT_RELSZ, 0)
8729 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
8730 return FALSE;
8731 }
8732 else
8733 {
8734 if (!add_dynamic_entry (DT_RELA, 0)
8735 || !add_dynamic_entry (DT_RELASZ, 0)
8736 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
8737 return FALSE;
8738 }
252b5132
RH		 8739 }
8740
08d1f311
DJ		 8741 /* If any dynamic relocs apply to a read-only section,
8742 then we need a DT_TEXTREL entry. */
8743 if ((info->flags & DF_TEXTREL) == 0)
8744 elf_link_hash_traverse (&htab->root, elf32_arm_readonly_dynrelocs,
8745 (PTR) info);
8746
99e4ae17 8747 if ((info->flags & DF_TEXTREL) != 0)
252b5132 8748 {
dc810e39 8749 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 8750 return FALSE;
252b5132
RH		 8751 }
8752 }
8532796c 8753#undef add_dynamic_entry
252b5132 8754
b34976b6 8755 return TRUE;
252b5132
RH		 8756}
8757
252b5132
RH		 8758/* Finish up dynamic symbol handling. We set the contents of various
8759 dynamic sections here. */
8760
b34976b6 8761static bfd_boolean
57e8b36a
NC		 8762elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info,
8763 struct elf_link_hash_entry * h, Elf_Internal_Sym * sym)
252b5132
RH		 8764{
8765 bfd * dynobj;
e5a52504 8766 struct elf32_arm_link_hash_table *htab;
b7693d02 8767 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 8768
8769 dynobj = elf_hash_table (info)->dynobj;
e5a52504 8770 htab = elf32_arm_hash_table (info);
b7693d02 8771 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 8772
8773 if (h->plt.offset != (bfd_vma) -1)
8774 {
8775 asection * splt;
252b5132 8776 asection * srel;
e5a52504 8777 bfd_byte *loc;
24a1ba0f 8778 bfd_vma plt_index;
947216bf 8779 Elf_Internal_Rela rel;
252b5132
RH		 8780
8781 /* This symbol has an entry in the procedure linkage table. Set
8782 it up. */
8783
8784 BFD_ASSERT (h->dynindx != -1);
8785
8786 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 8787 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 8788 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 8789
e5a52504
MM		 8790 /* Fill in the entry in the procedure linkage table. */
8791 if (htab->symbian_p)
8792 {
52ab56c2
PB		 8793 put_arm_insn (htab, output_bfd,
8794 elf32_arm_symbian_plt_entry[0],
8795 splt->contents + h->plt.offset);
8796 bfd_put_32 (output_bfd,
8797 elf32_arm_symbian_plt_entry[1],
8798 splt->contents + h->plt.offset + 4);
e5a52504
MM		 8799
8800 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 8801 rel.r_offset = (splt->output_section->vma
8802 + splt->output_offset
52ab56c2 8803 + h->plt.offset + 4);
e5a52504 8804 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 8805
8806 /* Get the index in the procedure linkage table which
8807 corresponds to this symbol. This is the index of this symbol
8808 in all the symbols for which we are making plt entries. The
8809 first entry in the procedure linkage table is reserved. */
8810 plt_index = ((h->plt.offset - htab->plt_header_size)
8811 / htab->plt_entry_size);
e5a52504
MM		 8812 }
8813 else
8814 {
00a97672 8815 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 8816 bfd_vma got_displacement;
8817 asection * sgot;
52ab56c2 8818 bfd_byte * ptr;
e5a52504
MM		 8819
8820 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
8821 BFD_ASSERT (sgot != NULL);
8822
b7693d02
DJ		 8823 /* Get the offset into the .got.plt table of the entry that
8824 corresponds to this function. */
8825 got_offset = eh->plt_got_offset;
8826
8827 /* Get the index in the procedure linkage table which
8828 corresponds to this symbol. This is the index of this symbol
8829 in all the symbols for which we are making plt entries. The
8830 first three entries in .got.plt are reserved; after that
8831 symbols appear in the same order as in .plt. */
8832 plt_index = (got_offset - 12) / 4;
e5a52504 8833
00a97672
RS		 8834 /* Calculate the address of the GOT entry. */
8835 got_address = (sgot->output_section->vma
8836 + sgot->output_offset
8837 + got_offset);
5e681ec4 8838
00a97672
RS		 8839 /* ...and the address of the PLT entry. */
8840 plt_address = (splt->output_section->vma
8841 + splt->output_offset
8842 + h->plt.offset);
5e681ec4 8843
52ab56c2 8844 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 8845 if (htab->vxworks_p && info->shared)
8846 {
8847 unsigned int i;
8848 bfd_vma val;
8849
52ab56c2 8850 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 8851 {
8852 val = elf32_arm_vxworks_shared_plt_entry[i];
8853 if (i == 2)
8854 val |= got_address - sgot->output_section->vma;
8855 if (i == 5)
8856 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 8857 if (i == 2 || i == 5)
8858 bfd_put_32 (output_bfd, val, ptr);
8859 else
8860 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 8861 }
8862 }
8863 else if (htab->vxworks_p)
b7693d02 8864 {
00a97672
RS		 8865 unsigned int i;
8866 bfd_vma val;
8867
d3753b85 8868 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 8869 {
8870 val = elf32_arm_vxworks_exec_plt_entry[i];
8871 if (i == 2)
8872 val |= got_address;
8873 if (i == 4)
8874 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
8875 if (i == 5)
8876 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 8877 if (i == 2 || i == 5)
8878 bfd_put_32 (output_bfd, val, ptr);
8879 else
8880 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 8881 }
8882
8883 loc = (htab->srelplt2->contents
8884 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8885
8886 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8887 referencing the GOT for this PLT entry. */
8888 rel.r_offset = plt_address + 8;
8889 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8890 rel.r_addend = got_offset;
8891 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8892 loc += RELOC_SIZE (htab);
8893
8894 /* Create the R_ARM_ABS32 relocation referencing the
8895 beginning of the PLT for this GOT entry. */
8896 rel.r_offset = got_address;
8897 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8898 rel.r_addend = 0;
8899 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 8900 }
00a97672
RS		 8901 else
8902 {
8903 /* Calculate the displacement between the PLT slot and the
8904 entry in the GOT. The eight-byte offset accounts for the
8905 value produced by adding to pc in the first instruction
8906 of the PLT stub. */
8907 got_displacement = got_address - (plt_address + 8);
b7693d02 8908
00a97672
RS		 8909 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8910
8911 if (!htab->use_blx && eh->plt_thumb_refcount > 0)
8912 {
52ab56c2
PB		 8913 put_thumb_insn (htab, output_bfd,
8914 elf32_arm_plt_thumb_stub[0], ptr - 4);
8915 put_thumb_insn (htab, output_bfd,
8916 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 8917 }
8918
52ab56c2
PB		 8919 put_arm_insn (htab, output_bfd,
8920 elf32_arm_plt_entry[0]
8921 | ((got_displacement & 0x0ff00000) >> 20),
8922 ptr + 0);
8923 put_arm_insn (htab, output_bfd,
8924 elf32_arm_plt_entry[1]
8925 | ((got_displacement & 0x000ff000) >> 12),
8926 ptr+ 4);
8927 put_arm_insn (htab, output_bfd,
8928 elf32_arm_plt_entry[2]
8929 | (got_displacement & 0x00000fff),
8930 ptr + 8);
5e681ec4 8931#ifdef FOUR_WORD_PLT
52ab56c2 8932 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 8933#endif
00a97672 8934 }
252b5132 8935
e5a52504
MM		 8936 /* Fill in the entry in the global offset table. */
8937 bfd_put_32 (output_bfd,
8938 (splt->output_section->vma
8939 + splt->output_offset),
8940 sgot->contents + got_offset);
8941
00a97672
RS		 8942 /* Fill in the entry in the .rel(a).plt section. */
8943 rel.r_addend = 0;
8944 rel.r_offset = got_address;
e5a52504
MM		 8945 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
8946 }
57e8b36a 8947
00a97672
RS		 8948 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8949 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 8950
f5385ebf 8951 if (!h->def_regular)
252b5132
RH		 8952 {
8953 /* Mark the symbol as undefined, rather than as defined in
8954 the .plt section. Leave the value alone. */
8955 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 8956 /* If the symbol is weak, we do need to clear the value.
8957 Otherwise, the PLT entry would provide a definition for
8958 the symbol even if the symbol wasn't defined anywhere,
8959 and so the symbol would never be NULL. */
f5385ebf 8960 if (!h->ref_regular_nonweak)
d982ba73 8961 sym->st_value = 0;
252b5132
RH		 8962 }
8963 }
8964
ba93b8ac
DJ		 8965 if (h->got.offset != (bfd_vma) -1
8966 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
8967 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 8968 {
8969 asection * sgot;
8970 asection * srel;
947216bf
AM		 8971 Elf_Internal_Rela rel;
8972 bfd_byte *loc;
00a97672 8973 bfd_vma offset;
252b5132
RH		 8974
8975 /* This symbol has an entry in the global offset table. Set it
8976 up. */
252b5132 8977 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 8978 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 8979 BFD_ASSERT (sgot != NULL && srel != NULL);
8980
00a97672
RS		 8981 offset = (h->got.offset & ~(bfd_vma) 1);
8982 rel.r_addend = 0;
252b5132
RH		 8983 rel.r_offset = (sgot->output_section->vma
8984 + sgot->output_offset
00a97672 8985 + offset);
252b5132 8986
5e681ec4
PB		 8987 /* If this is a static link, or it is a -Bsymbolic link and the
8988 symbol is defined locally or was forced to be local because
8989 of a version file, we just want to emit a RELATIVE reloc.
8990 The entry in the global offset table will already have been
8991 initialized in the relocate_section function. */
252b5132 8992 if (info->shared
5e681ec4
PB		 8993 && SYMBOL_REFERENCES_LOCAL (info, h))
8994 {
8995 BFD_ASSERT((h->got.offset & 1) != 0);
8996 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 8997 if (!htab->use_rel)
8998 {
8999 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
9000 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
9001 }
5e681ec4 9002 }
252b5132
RH		 9003 else
9004 {
5e681ec4 9005 BFD_ASSERT((h->got.offset & 1) == 0);
00a97672 9006 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 9007 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9008 }
9009
00a97672
RS		 9010 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
9011 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9012 }
9013
f5385ebf 9014 if (h->needs_copy)
252b5132
RH		 9015 {
9016 asection * s;
947216bf
AM		 9017 Elf_Internal_Rela rel;
9018 bfd_byte *loc;
252b5132
RH		 9019
9020 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 9021 BFD_ASSERT (h->dynindx != -1
9022 && (h->root.type == bfd_link_hash_defined
9023 || h->root.type == bfd_link_hash_defweak));
9024
9025 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 9026 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 9027 BFD_ASSERT (s != NULL);
9028
00a97672 9029 rel.r_addend = 0;
252b5132
RH		 9030 rel.r_offset = (h->root.u.def.value
9031 + h->root.u.def.section->output_section->vma
9032 + h->root.u.def.section->output_offset);
9033 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 9034 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
9035 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9036 }
9037
00a97672
RS		 9038 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
9039 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
9040 to the ".got" section. */
252b5132 9041 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 9042 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 9043 sym->st_shndx = SHN_ABS;
9044
b34976b6 9045 return TRUE;
252b5132
RH		 9046}
9047
9048/* Finish up the dynamic sections. */
9049
b34976b6 9050static bfd_boolean
57e8b36a 9051elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 9052{
9053 bfd * dynobj;
9054 asection * sgot;
9055 asection * sdyn;
9056
9057 dynobj = elf_hash_table (info)->dynobj;
9058
9059 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 9060 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 9061 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
9062
9063 if (elf_hash_table (info)->dynamic_sections_created)
9064 {
9065 asection *splt;
9066 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 9067 struct elf32_arm_link_hash_table *htab;
252b5132 9068
229fcec5 9069 htab = elf32_arm_hash_table (info);
252b5132 9070 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 9071 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 9072
9073 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 9074 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 9075
252b5132
RH		 9076 for (; dyncon < dynconend; dyncon++)
9077 {
9078 Elf_Internal_Dyn dyn;
9079 const char * name;
9080 asection * s;
9081
9082 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
9083
9084 switch (dyn.d_tag)
9085 {
229fcec5
MM		 9086 unsigned int type;
9087
252b5132
RH		 9088 default:
9089 break;
9090
229fcec5
MM		 9091 case DT_HASH:
9092 name = ".hash";
9093 goto get_vma_if_bpabi;
9094 case DT_STRTAB:
9095 name = ".dynstr";
9096 goto get_vma_if_bpabi;
9097 case DT_SYMTAB:
9098 name = ".dynsym";
9099 goto get_vma_if_bpabi;
c0042f5d
MM		 9100 case DT_VERSYM:
9101 name = ".gnu.version";
9102 goto get_vma_if_bpabi;
9103 case DT_VERDEF:
9104 name = ".gnu.version_d";
9105 goto get_vma_if_bpabi;
9106 case DT_VERNEED:
9107 name = ".gnu.version_r";
9108 goto get_vma_if_bpabi;
9109
252b5132
RH		 9110 case DT_PLTGOT:
9111 name = ".got";
9112 goto get_vma;
9113 case DT_JMPREL:
00a97672 9114 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 9115 get_vma:
9116 s = bfd_get_section_by_name (output_bfd, name);
9117 BFD_ASSERT (s != NULL);
229fcec5
MM		 9118 if (!htab->symbian_p)
9119 dyn.d_un.d_ptr = s->vma;
9120 else
9121 /* In the BPABI, tags in the PT_DYNAMIC section point
9122 at the file offset, not the memory address, for the
9123 convenience of the post linker. */
9124 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 9125 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9126 break;
9127
229fcec5
MM		 9128 get_vma_if_bpabi:
9129 if (htab->symbian_p)
9130 goto get_vma;
9131 break;
9132
252b5132 9133 case DT_PLTRELSZ:
00a97672
RS		 9134 s = bfd_get_section_by_name (output_bfd,
9135 RELOC_SECTION (htab, ".plt"));
252b5132 9136 BFD_ASSERT (s != NULL);
eea6121a 9137 dyn.d_un.d_val = s->size;
252b5132
RH		 9138 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9139 break;
229fcec5 9140
252b5132 9141 case DT_RELSZ:
00a97672 9142 case DT_RELASZ:
229fcec5
MM		 9143 if (!htab->symbian_p)
9144 {
9145 /* My reading of the SVR4 ABI indicates that the
9146 procedure linkage table relocs (DT_JMPREL) should be
9147 included in the overall relocs (DT_REL). This is
9148 what Solaris does. However, UnixWare can not handle
9149 that case. Therefore, we override the DT_RELSZ entry
9150 here to make it not include the JMPREL relocs. Since
00a97672 9151 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 9152 other relocation sections, we don't have to worry
9153 about changing the DT_REL entry. */
00a97672
RS		 9154 s = bfd_get_section_by_name (output_bfd,
9155 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 9156 if (s != NULL)
9157 dyn.d_un.d_val -= s->size;
9158 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9159 break;
9160 }
9161 /* Fall through */
9162
9163 case DT_REL:
9164 case DT_RELA:
229fcec5
MM		 9165 /* In the BPABI, the DT_REL tag must point at the file
9166 offset, not the VMA, of the first relocation
9167 section. So, we use code similar to that in
9168 elflink.c, but do not check for SHF_ALLOC on the
9169 relcoation section, since relocations sections are
9170 never allocated under the BPABI. The comments above
9171 about Unixware notwithstanding, we include all of the
9172 relocations here. */
9173 if (htab->symbian_p)
9174 {
9175 unsigned int i;
9176 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
9177 ? SHT_REL : SHT_RELA);
9178 dyn.d_un.d_val = 0;
9179 for (i = 1; i < elf_numsections (output_bfd); i++)
9180 {
9181 Elf_Internal_Shdr *hdr
9182 = elf_elfsections (output_bfd)[i];
9183 if (hdr->sh_type == type)
9184 {
9185 if (dyn.d_tag == DT_RELSZ
9186 || dyn.d_tag == DT_RELASZ)
9187 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 9188 else if ((ufile_ptr) hdr->sh_offset
9189 <= dyn.d_un.d_val - 1)
229fcec5
MM		 9190 dyn.d_un.d_val = hdr->sh_offset;
9191 }
9192 }
9193 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9194 }
252b5132 9195 break;
88f7bcd5
NC		 9196
9197 /* Set the bottom bit of DT_INIT/FINI if the
9198 corresponding function is Thumb. */
9199 case DT_INIT:
9200 name = info->init_function;
9201 goto get_sym;
9202 case DT_FINI:
9203 name = info->fini_function;
9204 get_sym:
9205 /* If it wasn't set by elf_bfd_final_link
4cc11e76 9206 then there is nothing to adjust. */
88f7bcd5
NC		 9207 if (dyn.d_un.d_val != 0)
9208 {
9209 struct elf_link_hash_entry * eh;
9210
9211 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 9212 FALSE, FALSE, TRUE);
88f7bcd5
NC		 9213 if (eh != (struct elf_link_hash_entry *) NULL
9214 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
9215 {
9216 dyn.d_un.d_val |= 1;
b34976b6 9217 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 9218 }
9219 }
9220 break;
252b5132
RH		 9221 }
9222 }
9223
24a1ba0f 9224 /* Fill in the first entry in the procedure linkage table. */
e5a52504 9225 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 9226 {
00a97672
RS		 9227 const bfd_vma *plt0_entry;
9228 bfd_vma got_address, plt_address, got_displacement;
9229
9230 /* Calculate the addresses of the GOT and PLT. */
9231 got_address = sgot->output_section->vma + sgot->output_offset;
9232 plt_address = splt->output_section->vma + splt->output_offset;
9233
9234 if (htab->vxworks_p)
9235 {
9236 /* The VxWorks GOT is relocated by the dynamic linker.
9237 Therefore, we must emit relocations rather than simply
9238 computing the values now. */
9239 Elf_Internal_Rela rel;
9240
9241 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 9242 put_arm_insn (htab, output_bfd, plt0_entry[0],
9243 splt->contents + 0);
9244 put_arm_insn (htab, output_bfd, plt0_entry[1],
9245 splt->contents + 4);
9246 put_arm_insn (htab, output_bfd, plt0_entry[2],
9247 splt->contents + 8);
00a97672
RS		 9248 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
9249
9250 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
9251 rel.r_offset = plt_address + 12;
9252 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9253 rel.r_addend = 0;
9254 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
9255 htab->srelplt2->contents);
9256 }
9257 else
9258 {
9259 got_displacement = got_address - (plt_address + 16);
9260
9261 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 9262 put_arm_insn (htab, output_bfd, plt0_entry[0],
9263 splt->contents + 0);
9264 put_arm_insn (htab, output_bfd, plt0_entry[1],
9265 splt->contents + 4);
9266 put_arm_insn (htab, output_bfd, plt0_entry[2],
9267 splt->contents + 8);
9268 put_arm_insn (htab, output_bfd, plt0_entry[3],
9269 splt->contents + 12);
5e681ec4 9270
5e681ec4 9271#ifdef FOUR_WORD_PLT
00a97672
RS		 9272 /* The displacement value goes in the otherwise-unused
9273 last word of the second entry. */
9274 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 9275#else
00a97672 9276 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 9277#endif
00a97672 9278 }
f7a74f8c 9279 }
252b5132
RH		 9280
9281 /* UnixWare sets the entsize of .plt to 4, although that doesn't
9282 really seem like the right value. */
74541ad4
AM		 9283 if (splt->output_section->owner == output_bfd)
9284 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 9285
9286 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
9287 {
9288 /* Correct the .rel(a).plt.unloaded relocations. They will have
9289 incorrect symbol indexes. */
9290 int num_plts;
eed62c48 9291 unsigned char *p;
00a97672
RS		 9292
9293 num_plts = ((htab->splt->size - htab->plt_header_size)
9294 / htab->plt_entry_size);
9295 p = htab->srelplt2->contents + RELOC_SIZE (htab);
9296
9297 for (; num_plts; num_plts--)
9298 {
9299 Elf_Internal_Rela rel;
9300
9301 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9302 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9303 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9304 p += RELOC_SIZE (htab);
9305
9306 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9307 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9308 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9309 p += RELOC_SIZE (htab);
9310 }
9311 }
252b5132
RH		 9312 }
9313
9314 /* Fill in the first three entries in the global offset table. */
229fcec5 9315 if (sgot)
252b5132 9316 {
229fcec5
MM		 9317 if (sgot->size > 0)
9318 {
9319 if (sdyn == NULL)
9320 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
9321 else
9322 bfd_put_32 (output_bfd,
9323 sdyn->output_section->vma + sdyn->output_offset,
9324 sgot->contents);
9325 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
9326 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
9327 }
252b5132 9328
229fcec5
MM		 9329 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
9330 }
252b5132 9331
b34976b6 9332 return TRUE;
252b5132
RH		 9333}
9334
ba96a88f 9335static void
57e8b36a 9336elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 9337{
9b485d32 9338 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 9339 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 9340
9341 i_ehdrp = elf_elfheader (abfd);
9342
94a3258f
PB		 9343 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
9344 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
9345 else
9346 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 9347 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 9348
93204d3a
PB		 9349 if (link_info)
9350 {
9351 globals = elf32_arm_hash_table (link_info);
9352 if (globals->byteswap_code)
9353 i_ehdrp->e_flags |= EF_ARM_BE8;
9354 }
ba96a88f
NC		 9355}
9356
99e4ae17 9357static enum elf_reloc_type_class
57e8b36a 9358elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 9359{
f51e552e 9360 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 9361 {
9362 case R_ARM_RELATIVE:
9363 return reloc_class_relative;
9364 case R_ARM_JUMP_SLOT:
9365 return reloc_class_plt;
9366 case R_ARM_COPY:
9367 return reloc_class_copy;
9368 default:
9369 return reloc_class_normal;
9370 }
9371}
9372
e16bb312
NC		 9373/* Set the right machine number for an Arm ELF file. */
9374
9375static bfd_boolean
57e8b36a 9376elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 9377{
9378 if (hdr->sh_type == SHT_NOTE)
9379 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
9380
9381 return TRUE;
9382}
9383
e489d0ae 9384static void
57e8b36a 9385elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 9386{
5a6c6817 9387 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 9388}
9389
40a18ebd
NC		 9390/* Return TRUE if this is an unwinding table entry. */
9391
9392static bfd_boolean
9393is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
9394{
0112cd26
NC		 9395 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
9396 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 9397}
9398
9399
9400/* Set the type and flags for an ARM section. We do this by
9401 the section name, which is a hack, but ought to work. */
9402
9403static bfd_boolean
9404elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
9405{
9406 const char * name;
9407
9408 name = bfd_get_section_name (abfd, sec);
9409
9410 if (is_arm_elf_unwind_section_name (abfd, name))
9411 {
9412 hdr->sh_type = SHT_ARM_EXIDX;
9413 hdr->sh_flags |= SHF_LINK_ORDER;
9414 }
9415 return TRUE;
9416}
9417
6dc132d9
L		 9418/* Handle an ARM specific section when reading an object file. This is
9419 called when bfd_section_from_shdr finds a section with an unknown
9420 type. */
40a18ebd
NC		 9421
9422static bfd_boolean
9423elf32_arm_section_from_shdr (bfd *abfd,
9424 Elf_Internal_Shdr * hdr,
6dc132d9
L		 9425 const char *name,
9426 int shindex)
40a18ebd
NC		 9427{
9428 /* There ought to be a place to keep ELF backend specific flags, but
9429 at the moment there isn't one. We just keep track of the
9430 sections by their name, instead. Fortunately, the ABI gives
9431 names for all the ARM specific sections, so we will probably get
9432 away with this. */
9433 switch (hdr->sh_type)
9434 {
9435 case SHT_ARM_EXIDX:
0951f019
RE		 9436 case SHT_ARM_PREEMPTMAP:
9437 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 9438 break;
9439
9440 default:
9441 return FALSE;
9442 }
9443
6dc132d9 9444 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 9445 return FALSE;
9446
9447 return TRUE;
9448}
e489d0ae 9449
8e3de13a
NC		 9450/* A structure used to record a list of sections, independently
9451 of the next and prev fields in the asection structure. */
9452typedef struct section_list
9453{
9454 asection * sec;
9455 struct section_list * next;
9456 struct section_list * prev;
9457}
9458section_list;
9459
9460/* Unfortunately we need to keep a list of sections for which
9461 an _arm_elf_section_data structure has been allocated. This
9462 is because it is possible for functions like elf32_arm_write_section
9463 to be called on a section which has had an elf_data_structure
9464 allocated for it (and so the used_by_bfd field is valid) but
9465 for which the ARM extended version of this structure - the
9466 _arm_elf_section_data structure - has not been allocated. */
9467static section_list * sections_with_arm_elf_section_data = NULL;
9468
9469static void
957c6e41 9470record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 9471{
9472 struct section_list * entry;
9473
957c6e41 9474 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 9475 if (entry == NULL)
9476 return;
9477 entry->sec = sec;
9478 entry->next = sections_with_arm_elf_section_data;
9479 entry->prev = NULL;
9480 if (entry->next != NULL)
9481 entry->next->prev = entry;
9482 sections_with_arm_elf_section_data = entry;
9483}
9484
44444f50
NC		 9485static struct section_list *
9486find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 9487{
9488 struct section_list * entry;
bd4aae00 9489 static struct section_list * last_entry = NULL;
8e3de13a 9490
bd4aae00
NC		 9491 /* This is a short cut for the typical case where the sections are added
9492 to the sections_with_arm_elf_section_data list in forward order and
9493 then looked up here in backwards order. This makes a real difference
9494 to the ld-srec/sec64k.exp linker test. */
44444f50 9495 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 9496 if (last_entry != NULL)
9497 {
9498 if (last_entry->sec == sec)
44444f50
NC		 9499 entry = last_entry;
9500 else if (last_entry->next != NULL
9501 && last_entry->next->sec == sec)
9502 entry = last_entry->next;
bd4aae00 9503 }
44444f50
NC		 9504
9505 for (; entry; entry = entry->next)
8e3de13a 9506 if (entry->sec == sec)
44444f50 9507 break;
bd4aae00 9508
44444f50
NC		 9509 if (entry)
9510 /* Record the entry prior to this one - it is the entry we are most
9511 likely to want to locate next time. Also this way if we have been
9512 called from unrecord_section_with_arm_elf_section_data() we will not
9513 be caching a pointer that is about to be freed. */
9514 last_entry = entry->prev;
9515
9516 return entry;
9517}
9518
9519static _arm_elf_section_data *
9520get_arm_elf_section_data (asection * sec)
9521{
9522 struct section_list * entry;
9523
9524 entry = find_arm_elf_section_entry (sec);
9525
9526 if (entry)
9527 return elf32_arm_section_data (entry->sec);
9528 else
9529 return NULL;
8e3de13a
NC		 9530}
9531
9532static void
9533unrecord_section_with_arm_elf_section_data (asection * sec)
9534{
9535 struct section_list * entry;
9536
44444f50
NC		 9537 entry = find_arm_elf_section_entry (sec);
9538
9539 if (entry)
9540 {
9541 if (entry->prev != NULL)
9542 entry->prev->next = entry->next;
9543 if (entry->next != NULL)
9544 entry->next->prev = entry->prev;
9545 if (entry == sections_with_arm_elf_section_data)
9546 sections_with_arm_elf_section_data = entry->next;
9547 free (entry);
9548 }
8e3de13a
NC		 9549}
9550
e489d0ae 9551
4e617b1e
PB		 9552typedef struct
9553{
9554 void *finfo;
9555 struct bfd_link_info *info;
91a5743d
PB		 9556 asection *sec;
9557 int sec_shndx;
4e617b1e
PB		 9558 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
9559 asection *, struct elf_link_hash_entry *);
9560} output_arch_syminfo;
9561
9562enum map_symbol_type
9563{
9564 ARM_MAP_ARM,
9565 ARM_MAP_THUMB,
9566 ARM_MAP_DATA
9567};
9568
9569
9570/* Output a single PLT mapping symbol. */
9571
9572static bfd_boolean
9573elf32_arm_ouput_plt_map_sym (output_arch_syminfo *osi,
9574 enum map_symbol_type type,
9575 bfd_vma offset)
9576{
9577 static const char *names[3] = {"$a", "$t", "$d"};
9578 struct elf32_arm_link_hash_table *htab;
9579 Elf_Internal_Sym sym;
9580
9581 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 9582 sym.st_value = osi->sec->output_section->vma
9583 + osi->sec->output_offset
9584 + offset;
4e617b1e
PB		 9585 sym.st_size = 0;
9586 sym.st_other = 0;
9587 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB		 9588 sym.st_shndx = osi->sec_shndx;
9589 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB		 9590 return FALSE;
9591 return TRUE;
9592}
9593
9594
9595/* Output mapping symbols for PLT entries associated with H. */
9596
9597static bfd_boolean
9598elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
9599{
9600 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
9601 struct elf32_arm_link_hash_table *htab;
9602 struct elf32_arm_link_hash_entry *eh;
9603 bfd_vma addr;
9604
9605 htab = elf32_arm_hash_table (osi->info);
9606
9607 if (h->root.type == bfd_link_hash_indirect)
9608 return TRUE;
9609
9610 if (h->root.type == bfd_link_hash_warning)
9611 /* When warning symbols are created, they **replace** the "real"
9612 entry in the hash table, thus we never get to see the real
9613 symbol in a hash traversal. So look at it now. */
9614 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9615
9616 if (h->plt.offset == (bfd_vma) -1)
9617 return TRUE;
9618
9619 eh = (struct elf32_arm_link_hash_entry *) h;
9620 addr = h->plt.offset;
9621 if (htab->symbian_p)
9622 {
9623 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9624 return FALSE;
9625 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 4))
9626 return FALSE;
9627 }
9628 else if (htab->vxworks_p)
9629 {
9630 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9631 return FALSE;
9632 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 8))
9633 return FALSE;
9634 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr + 12))
9635 return FALSE;
9636 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 20))
9637 return FALSE;
9638 }
9639 else
9640 {
9641 bfd_boolean thumb_stub;
9642
9643 thumb_stub = eh->plt_thumb_refcount > 0 && !htab->use_blx;
9644 if (thumb_stub)
9645 {
9646 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_THUMB, addr - 4))
9647 return FALSE;
9648 }
9649#ifdef FOUR_WORD_PLT
9650 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9651 return FALSE;
9652 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 12))
9653 return FALSE;
9654#else
9655 /* A three-word PLT with no Thumb thunk contains only Arm code,
9656 so only need to output a mapping symbol for the first PLT entry and
9657 entries with thumb thunks. */
9658 if (thumb_stub || addr == 20)
9659 {
9660 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9661 return FALSE;
9662 }
9663#endif
9664 }
9665
9666 return TRUE;
9667}
9668
9669
91a5743d 9670/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 9671
9672static bfd_boolean
9673elf32_arm_output_arch_local_syms (bfd *output_bfd,
9674 struct bfd_link_info *info,
9675 void *finfo, bfd_boolean (*func) (void *, const char *,
9676 Elf_Internal_Sym *,
9677 asection *,
9678 struct elf_link_hash_entry *))
9679{
9680 output_arch_syminfo osi;
9681 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 9682 bfd_vma offset;
9683 bfd_size_type size;
4e617b1e
PB		 9684
9685 htab = elf32_arm_hash_table (info);
4e617b1e 9686 check_use_blx(htab);
91a5743d 9687
4e617b1e
PB		 9688 osi.finfo = finfo;
9689 osi.info = info;
9690 osi.func = func;
91a5743d
PB		 9691
9692 /* ARM->Thumb glue. */
9693 if (htab->arm_glue_size > 0)
9694 {
9695 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9696 ARM2THUMB_GLUE_SECTION_NAME);
9697
9698 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9699 (output_bfd, osi.sec->output_section);
9700 if (info->shared || htab->root.is_relocatable_executable
9701 || htab->pic_veneer)
9702 size = ARM2THUMB_PIC_GLUE_SIZE;
9703 else if (htab->use_blx)
9704 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
9705 else
9706 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 9707
91a5743d
PB		 9708 for (offset = 0; offset < htab->arm_glue_size; offset += size)
9709 {
9710 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
9711 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
9712 }
9713 }
9714
9715 /* Thumb->ARM glue. */
9716 if (htab->thumb_glue_size > 0)
9717 {
9718 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9719 THUMB2ARM_GLUE_SECTION_NAME);
9720
9721 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9722 (output_bfd, osi.sec->output_section);
9723 size = THUMB2ARM_GLUE_SIZE;
9724
9725 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
9726 {
9727 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
9728 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
9729 }
9730 }
9731
9732 /* Finally, output mapping symbols for the PLT. */
9733 if (!htab->splt || htab->splt->size == 0)
9734 return TRUE;
9735
9736 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
9737 htab->splt->output_section);
9738 osi.sec = htab->splt;
4e617b1e
PB		 9739 /* Output mapping symbols for the plt header. SymbianOS does not have a
9740 plt header. */
9741 if (htab->vxworks_p)
9742 {
9743 /* VxWorks shared libraries have no PLT header. */
9744 if (!info->shared)
9745 {
9746 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9747 return FALSE;
9748 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 12))
9749 return FALSE;
9750 }
9751 }
9752 else if (!htab->symbian_p)
9753 {
9754 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9755 return FALSE;
9756#ifndef FOUR_WORD_PLT
9757 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 16))
9758 return FALSE;
9759#endif
9760 }
9761
9762 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
9763 return TRUE;
9764}
9765
e489d0ae
PB		 9766/* Allocate target specific section data. */
9767
9768static bfd_boolean
9769elf32_arm_new_section_hook (bfd *abfd, asection *sec)
9770{
f592407e
AM		 9771 if (!sec->used_by_bfd)
9772 {
9773 _arm_elf_section_data *sdata;
9774 bfd_size_type amt = sizeof (*sdata);
e489d0ae 9775
f592407e
AM		 9776 sdata = bfd_zalloc (abfd, amt);
9777 if (sdata == NULL)
9778 return FALSE;
9779 sec->used_by_bfd = sdata;
9780 }
e489d0ae 9781
957c6e41 9782 record_section_with_arm_elf_section_data (sec);
8e3de13a 9783
e489d0ae
PB		 9784 return _bfd_elf_new_section_hook (abfd, sec);
9785}
9786
9787
9788/* Used to order a list of mapping symbols by address. */
9789
9790static int
9791elf32_arm_compare_mapping (const void * a, const void * b)
9792{
9793 return ((const elf32_arm_section_map *) a)->vma
9794 > ((const elf32_arm_section_map *) b)->vma;
9795}
9796
9797
9798/* Do code byteswapping. Return FALSE afterwards so that the section is
9799 written out as normal. */
9800
9801static bfd_boolean
c7b8f16e
JB		 9802elf32_arm_write_section (bfd *output_bfd,
9803 struct bfd_link_info *link_info, asection *sec,
e489d0ae
PB		 9804 bfd_byte *contents)
9805{
c7b8f16e 9806 int mapcount, errcount;
8e3de13a 9807 _arm_elf_section_data *arm_data;
c7b8f16e 9808 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 9809 elf32_arm_section_map *map;
c7b8f16e 9810 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 9811 bfd_vma ptr;
9812 bfd_vma end;
c7b8f16e 9813 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB		 9814 bfd_byte tmp;
9815 int i;
57e8b36a 9816
8e3de13a
NC		 9817 /* If this section has not been allocated an _arm_elf_section_data
9818 structure then we cannot record anything. */
9819 arm_data = get_arm_elf_section_data (sec);
9820 if (arm_data == NULL)
9821 return FALSE;
9822
9823 mapcount = arm_data->mapcount;
9824 map = arm_data->map;
c7b8f16e
JB		 9825 errcount = arm_data->erratumcount;
9826
9827 if (errcount != 0)
9828 {
9829 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
9830
9831 for (errnode = arm_data->erratumlist; errnode != 0;
9832 errnode = errnode->next)
9833 {
9834 bfd_vma index = errnode->vma - offset;
9835
9836 switch (errnode->type)
9837 {
9838 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
9839 {
9840 bfd_vma branch_to_veneer;
9841 /* Original condition code of instruction, plus bit mask for
9842 ARM B instruction. */
9843 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
9844 | 0x0a000000;
9845
9846 /* The instruction is before the label. */
9847 index -= 4;
9848
9849 /* Above offset included in -4 below. */
9850 branch_to_veneer = errnode->u.b.veneer->vma
9851 - errnode->vma - 4;
9852
9853 if ((signed) branch_to_veneer < -(1 << 25)
9854 || (signed) branch_to_veneer >= (1 << 25))
9855 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
9856 "range"), output_bfd);
9857
9858 insn |= (branch_to_veneer >> 2) & 0xffffff;
9859 contents[endianflip ^ index] = insn & 0xff;
9860 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
9861 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
9862 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
9863 }
9864 break;
9865
9866 case VFP11_ERRATUM_ARM_VENEER:
9867 {
9868 bfd_vma branch_from_veneer;
9869 unsigned int insn;
9870
9871 /* Take size of veneer into account. */
9872 branch_from_veneer = errnode->u.v.branch->vma
9873 - errnode->vma - 12;
9874
9875 if ((signed) branch_from_veneer < -(1 << 25)
9876 || (signed) branch_from_veneer >= (1 << 25))
9877 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
9878 "range"), output_bfd);
9879
9880 /* Original instruction. */
9881 insn = errnode->u.v.branch->u.b.vfp_insn;
9882 contents[endianflip ^ index] = insn & 0xff;
9883 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
9884 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
9885 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
9886
9887 /* Branch back to insn after original insn. */
9888 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
9889 contents[endianflip ^ (index + 4)] = insn & 0xff;
9890 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
9891 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
9892 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
9893 }
9894 break;
9895
9896 default:
9897 abort ();
9898 }
9899 }
9900 }
e489d0ae
PB		 9901
9902 if (mapcount == 0)
9903 return FALSE;
9904
c7b8f16e 9905 if (globals->byteswap_code)
e489d0ae 9906 {
c7b8f16e 9907 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 9908
c7b8f16e
JB		 9909 ptr = map[0].vma;
9910 for (i = 0; i < mapcount; i++)
9911 {
9912 if (i == mapcount - 1)
9913 end = sec->size;
9914 else
9915 end = map[i + 1].vma;
e489d0ae 9916
c7b8f16e 9917 switch (map[i].type)
e489d0ae 9918 {
c7b8f16e
JB		 9919 case 'a':
9920 /* Byte swap code words. */
9921 while (ptr + 3 < end)
9922 {
9923 tmp = contents[ptr];
9924 contents[ptr] = contents[ptr + 3];
9925 contents[ptr + 3] = tmp;
9926 tmp = contents[ptr + 1];
9927 contents[ptr + 1] = contents[ptr + 2];
9928 contents[ptr + 2] = tmp;
9929 ptr += 4;
9930 }
9931 break;
e489d0ae 9932
c7b8f16e
JB		 9933 case 't':
9934 /* Byte swap code halfwords. */
9935 while (ptr + 1 < end)
9936 {
9937 tmp = contents[ptr];
9938 contents[ptr] = contents[ptr + 1];
9939 contents[ptr + 1] = tmp;
9940 ptr += 2;
9941 }
9942 break;
9943
9944 case 'd':
9945 /* Leave data alone. */
9946 break;
9947 }
9948 ptr = end;
9949 }
e489d0ae 9950 }
8e3de13a 9951
93204d3a 9952 free (map);
8e3de13a 9953 arm_data->mapcount = 0;
c7b8f16e 9954 arm_data->mapsize = 0;
8e3de13a
NC		 9955 arm_data->map = NULL;
9956 unrecord_section_with_arm_elf_section_data (sec);
9957
e489d0ae
PB		 9958 return FALSE;
9959}
9960
957c6e41
NC		 9961static void
9962unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
9963 asection * sec,
9964 void * ignore ATTRIBUTE_UNUSED)
9965{
9966 unrecord_section_with_arm_elf_section_data (sec);
9967}
9968
9969static bfd_boolean
9970elf32_arm_close_and_cleanup (bfd * abfd)
9971{
b25e3d87
L		 9972 if (abfd->sections)
9973 bfd_map_over_sections (abfd,
9974 unrecord_section_via_map_over_sections,
9975 NULL);
957c6e41
NC		 9976
9977 return _bfd_elf_close_and_cleanup (abfd);
9978}
9979
b25e3d87
L		 9980static bfd_boolean
9981elf32_arm_bfd_free_cached_info (bfd * abfd)
9982{
9983 if (abfd->sections)
9984 bfd_map_over_sections (abfd,
9985 unrecord_section_via_map_over_sections,
9986 NULL);
9987
9988 return _bfd_free_cached_info (abfd);
9989}
9990
b7693d02
DJ		 9991/* Display STT_ARM_TFUNC symbols as functions. */
9992
9993static void
9994elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
9995 asymbol *asym)
9996{
9997 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
9998
9999 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
10000 elfsym->symbol.flags |= BSF_FUNCTION;
10001}
10002
0beaef2b
PB		 10003
10004/* Mangle thumb function symbols as we read them in. */
10005
8384fb8f 10006static bfd_boolean
0beaef2b
PB		 10007elf32_arm_swap_symbol_in (bfd * abfd,
10008 const void *psrc,
10009 const void *pshn,
10010 Elf_Internal_Sym *dst)
10011{
8384fb8f
AM		 10012 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
10013 return FALSE;
0beaef2b
PB		 10014
10015 /* New EABI objects mark thumb function symbols by setting the low bit of
10016 the address. Turn these into STT_ARM_TFUNC. */
10017 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
10018 && (dst->st_value & 1))
10019 {
10020 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
10021 dst->st_value &= ~(bfd_vma) 1;
10022 }
8384fb8f 10023 return TRUE;
0beaef2b
PB		 10024}
10025
10026
10027/* Mangle thumb function symbols as we write them out. */
10028
10029static void
10030elf32_arm_swap_symbol_out (bfd *abfd,
10031 const Elf_Internal_Sym *src,
10032 void *cdst,
10033 void *shndx)
10034{
10035 Elf_Internal_Sym newsym;
10036
10037 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
10038 of the address set, as per the new EABI. We do this unconditionally
10039 because objcopy does not set the elf header flags until after
10040 it writes out the symbol table. */
10041 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
10042 {
10043 newsym = *src;
10044 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 10045 if (newsym.st_shndx != SHN_UNDEF)
10046 {
10047 /* Do this only for defined symbols. At link type, the static
10048 linker will simulate the work of dynamic linker of resolving
10049 symbols and will carry over the thumbness of found symbols to
10050 the output symbol table. It's not clear how it happens, but
b0fead2b 10051 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 10052 runtime, and writing '1' for them will be confusing for users
10053 and possibly for dynamic linker itself.
10054 */
10055 newsym.st_value |= 1;
10056 }
0beaef2b
PB		 10057
10058 src = &newsym;
10059 }
10060 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
10061}
10062
b294bdf8
MM		 10063/* Add the PT_ARM_EXIDX program header. */
10064
10065static bfd_boolean
10066elf32_arm_modify_segment_map (bfd *abfd,
10067 struct bfd_link_info *info ATTRIBUTE_UNUSED)
10068{
10069 struct elf_segment_map *m;
10070 asection *sec;
10071
10072 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10073 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10074 {
10075 /* If there is already a PT_ARM_EXIDX header, then we do not
10076 want to add another one. This situation arises when running
10077 "strip"; the input binary already has the header. */
10078 m = elf_tdata (abfd)->segment_map;
10079 while (m && m->p_type != PT_ARM_EXIDX)
10080 m = m->next;
10081 if (!m)
10082 {
10083 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
10084 if (m == NULL)
10085 return FALSE;
10086 m->p_type = PT_ARM_EXIDX;
10087 m->count = 1;
10088 m->sections[0] = sec;
10089
10090 m->next = elf_tdata (abfd)->segment_map;
10091 elf_tdata (abfd)->segment_map = m;
10092 }
10093 }
10094
10095 return TRUE;
10096}
10097
10098/* We may add a PT_ARM_EXIDX program header. */
10099
10100static int
a6b96beb
AM		 10101elf32_arm_additional_program_headers (bfd *abfd,
10102 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 10103{
10104 asection *sec;
10105
10106 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10107 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10108 return 1;
10109 else
10110 return 0;
10111}
10112
fcb93ecf
PB		 10113/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
10114static bfd_boolean
10115elf32_arm_is_function_type (unsigned int type)
10116{
10117 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
10118}
10119
0beaef2b
PB		 10120/* We use this to override swap_symbol_in and swap_symbol_out. */
10121const struct elf_size_info elf32_arm_size_info = {
10122 sizeof (Elf32_External_Ehdr),
10123 sizeof (Elf32_External_Phdr),
10124 sizeof (Elf32_External_Shdr),
10125 sizeof (Elf32_External_Rel),
10126 sizeof (Elf32_External_Rela),
10127 sizeof (Elf32_External_Sym),
10128 sizeof (Elf32_External_Dyn),
10129 sizeof (Elf_External_Note),
10130 4,
10131 1,
10132 32, 2,
10133 ELFCLASS32, EV_CURRENT,
10134 bfd_elf32_write_out_phdrs,
10135 bfd_elf32_write_shdrs_and_ehdr,
10136 bfd_elf32_write_relocs,
10137 elf32_arm_swap_symbol_in,
10138 elf32_arm_swap_symbol_out,
10139 bfd_elf32_slurp_reloc_table,
10140 bfd_elf32_slurp_symbol_table,
10141 bfd_elf32_swap_dyn_in,
10142 bfd_elf32_swap_dyn_out,
10143 bfd_elf32_swap_reloc_in,
10144 bfd_elf32_swap_reloc_out,
10145 bfd_elf32_swap_reloca_in,
10146 bfd_elf32_swap_reloca_out
10147};
10148
252b5132
RH		 10149#define ELF_ARCH bfd_arch_arm
10150#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 10151#ifdef __QNXTARGET__
10152#define ELF_MAXPAGESIZE 0x1000
10153#else
f21f3fe0 10154#define ELF_MAXPAGESIZE 0x8000
d0facd1b 10155#endif
b1342370 10156#define ELF_MINPAGESIZE 0x1000
24718e3b 10157#define ELF_COMMONPAGESIZE 0x1000
252b5132 10158
ba93b8ac
DJ		 10159#define bfd_elf32_mkobject elf32_arm_mkobject
10160
99e4ae17
AJ		 10161#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
10162#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 10163#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
10164#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
10165#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 10166#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 10167#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 10168#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 10169#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 10170#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 10171#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 10172#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 10173#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
252b5132
RH		 10174
10175#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
10176#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 10177#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 10178#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
10179#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 10180#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 10181#define elf_backend_write_section elf32_arm_write_section
252b5132 10182#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 10183#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 10184#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
10185#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
10186#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 10187#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 10188#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 10189#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 10190#define elf_backend_object_p elf32_arm_object_p
e16bb312 10191#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 10192#define elf_backend_fake_sections elf32_arm_fake_sections
10193#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 10194#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 10195#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 10196#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 10197#define elf_backend_size_info elf32_arm_size_info
b294bdf8
MM		 10198#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
10199#define elf_backend_additional_program_headers \
10200 elf32_arm_additional_program_headers
4e617b1e
PB		 10201#define elf_backend_output_arch_local_syms \
10202 elf32_arm_output_arch_local_syms
a4fd1a8e
PB		 10203#define elf_backend_begin_write_processing \
10204 elf32_arm_begin_write_processing
fcb93ecf 10205#define elf_backend_is_function_type elf32_arm_is_function_type
252b5132 10206
5e681ec4 10207#define elf_backend_can_refcount 1
252b5132
RH		 10208#define elf_backend_can_gc_sections 1
10209#define elf_backend_plt_readonly 1
10210#define elf_backend_want_got_plt 1
10211#define elf_backend_want_plt_sym 0
4e7fd91e
PB		 10212#define elf_backend_may_use_rel_p 1
10213#define elf_backend_may_use_rela_p 0
10214#define elf_backend_default_use_rela_p 0
252b5132 10215
04f7c78d 10216#define elf_backend_got_header_size 12
04f7c78d 10217
104d59d1
JM		 10218#undef elf_backend_obj_attrs_vendor
10219#define elf_backend_obj_attrs_vendor "aeabi"
10220#undef elf_backend_obj_attrs_section
10221#define elf_backend_obj_attrs_section ".ARM.attributes"
10222#undef elf_backend_obj_attrs_arg_type
10223#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
10224#undef elf_backend_obj_attrs_section_type
10225#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
10226
252b5132 10227#include "elf32-target.h"
7f266840 10228
4e7fd91e
PB		 10229/* VxWorks Targets */
10230
10231#undef TARGET_LITTLE_SYM
10232#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
10233#undef TARGET_LITTLE_NAME
10234#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
10235#undef TARGET_BIG_SYM
10236#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
10237#undef TARGET_BIG_NAME
10238#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
10239
10240/* Like elf32_arm_link_hash_table_create -- but overrides
10241 appropriately for VxWorks. */
10242static struct bfd_link_hash_table *
10243elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
10244{
10245 struct bfd_link_hash_table *ret;
10246
10247 ret = elf32_arm_link_hash_table_create (abfd);
10248 if (ret)
10249 {
10250 struct elf32_arm_link_hash_table *htab
00a97672 10251 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 10252 htab->use_rel = 0;
00a97672 10253 htab->vxworks_p = 1;
4e7fd91e
PB		 10254 }
10255 return ret;
10256}
10257
00a97672
RS		 10258static void
10259elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
10260{
10261 elf32_arm_final_write_processing (abfd, linker);
10262 elf_vxworks_final_write_processing (abfd, linker);
10263}
10264
4e7fd91e
PB		 10265#undef elf32_bed
10266#define elf32_bed elf32_arm_vxworks_bed
10267
10268#undef bfd_elf32_bfd_link_hash_table_create
10269#define bfd_elf32_bfd_link_hash_table_create \
10270 elf32_arm_vxworks_link_hash_table_create
00a97672
RS		 10271#undef elf_backend_add_symbol_hook
10272#define elf_backend_add_symbol_hook \
10273 elf_vxworks_add_symbol_hook
10274#undef elf_backend_final_write_processing
10275#define elf_backend_final_write_processing \
10276 elf32_arm_vxworks_final_write_processing
10277#undef elf_backend_emit_relocs
10278#define elf_backend_emit_relocs \
10279 elf_vxworks_emit_relocs
4e7fd91e
PB		 10280
10281#undef elf_backend_may_use_rel_p
00a97672 10282#define elf_backend_may_use_rel_p 0
4e7fd91e 10283#undef elf_backend_may_use_rela_p
00a97672 10284#define elf_backend_may_use_rela_p 1
4e7fd91e 10285#undef elf_backend_default_use_rela_p
00a97672 10286#define elf_backend_default_use_rela_p 1
00a97672
RS		 10287#undef elf_backend_want_plt_sym
10288#define elf_backend_want_plt_sym 1
10289#undef ELF_MAXPAGESIZE
10290#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 10291
10292#include "elf32-target.h"
10293
10294
7f266840
DJ		 10295/* Symbian OS Targets */
10296
10297#undef TARGET_LITTLE_SYM
10298#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
10299#undef TARGET_LITTLE_NAME
10300#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
10301#undef TARGET_BIG_SYM
10302#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
10303#undef TARGET_BIG_NAME
10304#define TARGET_BIG_NAME "elf32-bigarm-symbian"
10305
10306/* Like elf32_arm_link_hash_table_create -- but overrides
10307 appropriately for Symbian OS. */
10308static struct bfd_link_hash_table *
10309elf32_arm_symbian_link_hash_table_create (bfd *abfd)
10310{
10311 struct bfd_link_hash_table *ret;
10312
10313 ret = elf32_arm_link_hash_table_create (abfd);
10314 if (ret)
10315 {
10316 struct elf32_arm_link_hash_table *htab
10317 = (struct elf32_arm_link_hash_table *)ret;
10318 /* There is no PLT header for Symbian OS. */
10319 htab->plt_header_size = 0;
10320 /* The PLT entries are each three instructions. */
10321 htab->plt_entry_size = 4 * NUM_ELEM (elf32_arm_symbian_plt_entry);
10322 htab->symbian_p = 1;
33bfe774
JB		 10323 /* Symbian uses armv5t or above, so use_blx is always true. */
10324 htab->use_blx = 1;
67687978 10325 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 10326 }
10327 return ret;
10328}
10329
b35d266b 10330static const struct bfd_elf_special_section
551b43fd 10331elf32_arm_symbian_special_sections[] =
7f266840 10332{
5cd3778d
MM		 10333 /* In a BPABI executable, the dynamic linking sections do not go in
10334 the loadable read-only segment. The post-linker may wish to
10335 refer to these sections, but they are not part of the final
10336 program image. */
0112cd26
NC		 10337 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
10338 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
10339 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
10340 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
10341 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 10342 /* These sections do not need to be writable as the SymbianOS
10343 postlinker will arrange things so that no dynamic relocation is
10344 required. */
0112cd26
NC		 10345 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
10346 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
10347 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
10348 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 10349};
10350
c3c76620 10351static void
b34af79c 10352elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 10353 struct bfd_link_info *link_info)
c3c76620
MM		 10354{
10355 /* BPABI objects are never loaded directly by an OS kernel; they are
10356 processed by a postlinker first, into an OS-specific format. If
10357 the D_PAGED bit is set on the file, BFD will align segments on
10358 page boundaries, so that an OS can directly map the file. With
10359 BPABI objects, that just results in wasted space. In addition,
10360 because we clear the D_PAGED bit, map_sections_to_segments will
10361 recognize that the program headers should not be mapped into any
10362 loadable segment. */
10363 abfd->flags &= ~D_PAGED;
a4fd1a8e 10364 elf32_arm_begin_write_processing(abfd, link_info);
c3c76620 10365}
7f266840
DJ		 10366
10367static bfd_boolean
b34af79c 10368elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 10369 struct bfd_link_info *info)
7f266840
DJ		 10370{
10371 struct elf_segment_map *m;
10372 asection *dynsec;
10373
7f266840
DJ		 10374 /* BPABI shared libraries and executables should have a PT_DYNAMIC
10375 segment. However, because the .dynamic section is not marked
10376 with SEC_LOAD, the generic ELF code will not create such a
10377 segment. */
10378 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
10379 if (dynsec)
10380 {
8ded5a0f
AM		 10381 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
10382 if (m->p_type == PT_DYNAMIC)
10383 break;
10384
10385 if (m == NULL)
10386 {
10387 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
10388 m->next = elf_tdata (abfd)->segment_map;
10389 elf_tdata (abfd)->segment_map = m;
10390 }
7f266840
DJ		 10391 }
10392
b294bdf8
MM		 10393 /* Also call the generic arm routine. */
10394 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 10395}
10396
10397#undef elf32_bed
10398#define elf32_bed elf32_arm_symbian_bed
10399
10400/* The dynamic sections are not allocated on SymbianOS; the postlinker
10401 will process them and then discard them. */
10402#undef ELF_DYNAMIC_SEC_FLAGS
10403#define ELF_DYNAMIC_SEC_FLAGS \
10404 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
10405
10406#undef bfd_elf32_bfd_link_hash_table_create
10407#define bfd_elf32_bfd_link_hash_table_create \
10408 elf32_arm_symbian_link_hash_table_create
00a97672 10409#undef elf_backend_add_symbol_hook
7f266840 10410
29ef7005
L		 10411#undef elf_backend_special_sections
10412#define elf_backend_special_sections elf32_arm_symbian_special_sections
7f266840 10413
c3c76620
MM		 10414#undef elf_backend_begin_write_processing
10415#define elf_backend_begin_write_processing \
10416 elf32_arm_symbian_begin_write_processing
00a97672
RS		 10417#undef elf_backend_final_write_processing
10418#define elf_backend_final_write_processing \
10419 elf32_arm_final_write_processing
10420#undef elf_backend_emit_relocs
c3c76620 10421
7f266840
DJ		 10422#undef elf_backend_modify_segment_map
10423#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
10424
10425/* There is no .got section for BPABI objects, and hence no header. */
10426#undef elf_backend_got_header_size
10427#define elf_backend_got_header_size 0
10428
10429/* Similarly, there is no .got.plt section. */
10430#undef elf_backend_want_got_plt
10431#define elf_backend_want_got_plt 0
10432
4e7fd91e 10433#undef elf_backend_may_use_rel_p
00a97672 10434#define elf_backend_may_use_rel_p 1
4e7fd91e 10435#undef elf_backend_may_use_rela_p
00a97672 10436#define elf_backend_may_use_rela_p 0
4e7fd91e 10437#undef elf_backend_default_use_rela_p
00a97672 10438#define elf_backend_default_use_rela_p 0
00a97672
RS		 10439#undef elf_backend_want_plt_sym
10440#define elf_backend_want_plt_sym 0
10441#undef ELF_MAXPAGESIZE
10442#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 10443
7f266840 10444#include "elf32-target.h"
GDB Binutils - Deliverables
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