bfd:
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
ab96bf03 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
d1f161ea 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
3e110533 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 20
7f266840 21#include "sysdep.h"
3db64b00 22#include "bfd.h"
00a97672 23#include "libiberty.h"
7f266840
DJ
24#include "libbfd.h"
25#include "elf-bfd.h"
00a97672 26#include "elf-vxworks.h"
ee065d83 27#include "elf/arm.h"
7f266840
DJ
28
29#ifndef NUM_ELEM
30#define NUM_ELEM(a) (sizeof (a) / (sizeof (a)[0]))
31#endif
32
00a97672
RS
33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ
59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
24718e3b 65static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 66
7f266840
DJ
67/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
68 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
69 in that slot. */
70
c19d1205 71static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840
DJ
72{
73 /* No relocation */
74 HOWTO (R_ARM_NONE, /* type */
75 0, /* rightshift */
76 0, /* size (0 = byte, 1 = short, 2 = long) */
77 0, /* bitsize */
78 FALSE, /* pc_relative */
79 0, /* bitpos */
80 complain_overflow_dont,/* complain_on_overflow */
81 bfd_elf_generic_reloc, /* special_function */
82 "R_ARM_NONE", /* name */
83 FALSE, /* partial_inplace */
84 0, /* src_mask */
85 0, /* dst_mask */
86 FALSE), /* pcrel_offset */
87
88 HOWTO (R_ARM_PC24, /* type */
89 2, /* rightshift */
90 2, /* size (0 = byte, 1 = short, 2 = long) */
91 24, /* bitsize */
92 TRUE, /* pc_relative */
93 0, /* bitpos */
94 complain_overflow_signed,/* complain_on_overflow */
95 bfd_elf_generic_reloc, /* special_function */
96 "R_ARM_PC24", /* name */
97 FALSE, /* partial_inplace */
98 0x00ffffff, /* src_mask */
99 0x00ffffff, /* dst_mask */
100 TRUE), /* pcrel_offset */
101
102 /* 32 bit absolute */
103 HOWTO (R_ARM_ABS32, /* type */
104 0, /* rightshift */
105 2, /* size (0 = byte, 1 = short, 2 = long) */
106 32, /* bitsize */
107 FALSE, /* pc_relative */
108 0, /* bitpos */
109 complain_overflow_bitfield,/* complain_on_overflow */
110 bfd_elf_generic_reloc, /* special_function */
111 "R_ARM_ABS32", /* name */
112 FALSE, /* partial_inplace */
113 0xffffffff, /* src_mask */
114 0xffffffff, /* dst_mask */
115 FALSE), /* pcrel_offset */
116
117 /* standard 32bit pc-relative reloc */
118 HOWTO (R_ARM_REL32, /* type */
119 0, /* rightshift */
120 2, /* size (0 = byte, 1 = short, 2 = long) */
121 32, /* bitsize */
122 TRUE, /* pc_relative */
123 0, /* bitpos */
124 complain_overflow_bitfield,/* complain_on_overflow */
125 bfd_elf_generic_reloc, /* special_function */
126 "R_ARM_REL32", /* name */
127 FALSE, /* partial_inplace */
128 0xffffffff, /* src_mask */
129 0xffffffff, /* dst_mask */
130 TRUE), /* pcrel_offset */
131
c19d1205 132 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 133 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ
134 0, /* rightshift */
135 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS
136 32, /* bitsize */
137 TRUE, /* pc_relative */
7f266840 138 0, /* bitpos */
4962c51a 139 complain_overflow_dont,/* complain_on_overflow */
7f266840 140 bfd_elf_generic_reloc, /* special_function */
4962c51a 141 "R_ARM_LDR_PC_G0", /* name */
7f266840 142 FALSE, /* partial_inplace */
4962c51a
MS
143 0xffffffff, /* src_mask */
144 0xffffffff, /* dst_mask */
145 TRUE), /* pcrel_offset */
7f266840
DJ
146
147 /* 16 bit absolute */
148 HOWTO (R_ARM_ABS16, /* type */
149 0, /* rightshift */
150 1, /* size (0 = byte, 1 = short, 2 = long) */
151 16, /* bitsize */
152 FALSE, /* pc_relative */
153 0, /* bitpos */
154 complain_overflow_bitfield,/* complain_on_overflow */
155 bfd_elf_generic_reloc, /* special_function */
156 "R_ARM_ABS16", /* name */
157 FALSE, /* partial_inplace */
158 0x0000ffff, /* src_mask */
159 0x0000ffff, /* dst_mask */
160 FALSE), /* pcrel_offset */
161
162 /* 12 bit absolute */
163 HOWTO (R_ARM_ABS12, /* type */
164 0, /* rightshift */
165 2, /* size (0 = byte, 1 = short, 2 = long) */
166 12, /* bitsize */
167 FALSE, /* pc_relative */
168 0, /* bitpos */
169 complain_overflow_bitfield,/* complain_on_overflow */
170 bfd_elf_generic_reloc, /* special_function */
171 "R_ARM_ABS12", /* name */
172 FALSE, /* partial_inplace */
00a97672
RS
173 0x00000fff, /* src_mask */
174 0x00000fff, /* dst_mask */
7f266840
DJ
175 FALSE), /* pcrel_offset */
176
177 HOWTO (R_ARM_THM_ABS5, /* type */
178 6, /* rightshift */
179 1, /* size (0 = byte, 1 = short, 2 = long) */
180 5, /* bitsize */
181 FALSE, /* pc_relative */
182 0, /* bitpos */
183 complain_overflow_bitfield,/* complain_on_overflow */
184 bfd_elf_generic_reloc, /* special_function */
185 "R_ARM_THM_ABS5", /* name */
186 FALSE, /* partial_inplace */
187 0x000007e0, /* src_mask */
188 0x000007e0, /* dst_mask */
189 FALSE), /* pcrel_offset */
190
191 /* 8 bit absolute */
192 HOWTO (R_ARM_ABS8, /* type */
193 0, /* rightshift */
194 0, /* size (0 = byte, 1 = short, 2 = long) */
195 8, /* bitsize */
196 FALSE, /* pc_relative */
197 0, /* bitpos */
198 complain_overflow_bitfield,/* complain_on_overflow */
199 bfd_elf_generic_reloc, /* special_function */
200 "R_ARM_ABS8", /* name */
201 FALSE, /* partial_inplace */
202 0x000000ff, /* src_mask */
203 0x000000ff, /* dst_mask */
204 FALSE), /* pcrel_offset */
205
206 HOWTO (R_ARM_SBREL32, /* type */
207 0, /* rightshift */
208 2, /* size (0 = byte, 1 = short, 2 = long) */
209 32, /* bitsize */
210 FALSE, /* pc_relative */
211 0, /* bitpos */
212 complain_overflow_dont,/* complain_on_overflow */
213 bfd_elf_generic_reloc, /* special_function */
214 "R_ARM_SBREL32", /* name */
215 FALSE, /* partial_inplace */
216 0xffffffff, /* src_mask */
217 0xffffffff, /* dst_mask */
218 FALSE), /* pcrel_offset */
219
c19d1205 220 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ
221 1, /* rightshift */
222 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 223 25, /* bitsize */
7f266840
DJ
224 TRUE, /* pc_relative */
225 0, /* bitpos */
226 complain_overflow_signed,/* complain_on_overflow */
227 bfd_elf_generic_reloc, /* special_function */
c19d1205 228 "R_ARM_THM_CALL", /* name */
7f266840
DJ
229 FALSE, /* partial_inplace */
230 0x07ff07ff, /* src_mask */
231 0x07ff07ff, /* dst_mask */
232 TRUE), /* pcrel_offset */
233
234 HOWTO (R_ARM_THM_PC8, /* type */
235 1, /* rightshift */
236 1, /* size (0 = byte, 1 = short, 2 = long) */
237 8, /* bitsize */
238 TRUE, /* pc_relative */
239 0, /* bitpos */
240 complain_overflow_signed,/* complain_on_overflow */
241 bfd_elf_generic_reloc, /* special_function */
242 "R_ARM_THM_PC8", /* name */
243 FALSE, /* partial_inplace */
244 0x000000ff, /* src_mask */
245 0x000000ff, /* dst_mask */
246 TRUE), /* pcrel_offset */
247
c19d1205 248 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ
249 1, /* rightshift */
250 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW
251 32, /* bitsize */
252 FALSE, /* pc_relative */
7f266840
DJ
253 0, /* bitpos */
254 complain_overflow_signed,/* complain_on_overflow */
255 bfd_elf_generic_reloc, /* special_function */
c19d1205 256 "R_ARM_BREL_ADJ", /* name */
7f266840 257 FALSE, /* partial_inplace */
c19d1205
ZW
258 0xffffffff, /* src_mask */
259 0xffffffff, /* dst_mask */
260 FALSE), /* pcrel_offset */
7f266840
DJ
261
262 HOWTO (R_ARM_SWI24, /* type */
263 0, /* rightshift */
264 0, /* size (0 = byte, 1 = short, 2 = long) */
265 0, /* bitsize */
266 FALSE, /* pc_relative */
267 0, /* bitpos */
268 complain_overflow_signed,/* complain_on_overflow */
269 bfd_elf_generic_reloc, /* special_function */
270 "R_ARM_SWI24", /* name */
271 FALSE, /* partial_inplace */
272 0x00000000, /* src_mask */
273 0x00000000, /* dst_mask */
274 FALSE), /* pcrel_offset */
275
276 HOWTO (R_ARM_THM_SWI8, /* type */
277 0, /* rightshift */
278 0, /* size (0 = byte, 1 = short, 2 = long) */
279 0, /* bitsize */
280 FALSE, /* pc_relative */
281 0, /* bitpos */
282 complain_overflow_signed,/* complain_on_overflow */
283 bfd_elf_generic_reloc, /* special_function */
284 "R_ARM_SWI8", /* name */
285 FALSE, /* partial_inplace */
286 0x00000000, /* src_mask */
287 0x00000000, /* dst_mask */
288 FALSE), /* pcrel_offset */
289
290 /* BLX instruction for the ARM. */
291 HOWTO (R_ARM_XPC25, /* type */
292 2, /* rightshift */
293 2, /* size (0 = byte, 1 = short, 2 = long) */
294 25, /* bitsize */
295 TRUE, /* pc_relative */
296 0, /* bitpos */
297 complain_overflow_signed,/* complain_on_overflow */
298 bfd_elf_generic_reloc, /* special_function */
299 "R_ARM_XPC25", /* name */
300 FALSE, /* partial_inplace */
301 0x00ffffff, /* src_mask */
302 0x00ffffff, /* dst_mask */
303 TRUE), /* pcrel_offset */
304
305 /* BLX instruction for the Thumb. */
306 HOWTO (R_ARM_THM_XPC22, /* type */
307 2, /* rightshift */
308 2, /* size (0 = byte, 1 = short, 2 = long) */
309 22, /* bitsize */
310 TRUE, /* pc_relative */
311 0, /* bitpos */
312 complain_overflow_signed,/* complain_on_overflow */
313 bfd_elf_generic_reloc, /* special_function */
314 "R_ARM_THM_XPC22", /* name */
315 FALSE, /* partial_inplace */
316 0x07ff07ff, /* src_mask */
317 0x07ff07ff, /* dst_mask */
318 TRUE), /* pcrel_offset */
319
ba93b8ac 320 /* Dynamic TLS relocations. */
7f266840 321
ba93b8ac
DJ
322 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
323 0, /* rightshift */
324 2, /* size (0 = byte, 1 = short, 2 = long) */
325 32, /* bitsize */
326 FALSE, /* pc_relative */
327 0, /* bitpos */
328 complain_overflow_bitfield,/* complain_on_overflow */
329 bfd_elf_generic_reloc, /* special_function */
330 "R_ARM_TLS_DTPMOD32", /* name */
331 TRUE, /* partial_inplace */
332 0xffffffff, /* src_mask */
333 0xffffffff, /* dst_mask */
334 FALSE), /* pcrel_offset */
7f266840 335
ba93b8ac
DJ
336 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
337 0, /* rightshift */
338 2, /* size (0 = byte, 1 = short, 2 = long) */
339 32, /* bitsize */
340 FALSE, /* pc_relative */
341 0, /* bitpos */
342 complain_overflow_bitfield,/* complain_on_overflow */
343 bfd_elf_generic_reloc, /* special_function */
344 "R_ARM_TLS_DTPOFF32", /* name */
345 TRUE, /* partial_inplace */
346 0xffffffff, /* src_mask */
347 0xffffffff, /* dst_mask */
348 FALSE), /* pcrel_offset */
7f266840 349
ba93b8ac
DJ
350 HOWTO (R_ARM_TLS_TPOFF32, /* type */
351 0, /* rightshift */
352 2, /* size (0 = byte, 1 = short, 2 = long) */
353 32, /* bitsize */
354 FALSE, /* pc_relative */
355 0, /* bitpos */
356 complain_overflow_bitfield,/* complain_on_overflow */
357 bfd_elf_generic_reloc, /* special_function */
358 "R_ARM_TLS_TPOFF32", /* name */
359 TRUE, /* partial_inplace */
360 0xffffffff, /* src_mask */
361 0xffffffff, /* dst_mask */
362 FALSE), /* pcrel_offset */
7f266840
DJ
363
364 /* Relocs used in ARM Linux */
365
366 HOWTO (R_ARM_COPY, /* type */
367 0, /* rightshift */
368 2, /* size (0 = byte, 1 = short, 2 = long) */
369 32, /* bitsize */
370 FALSE, /* pc_relative */
371 0, /* bitpos */
372 complain_overflow_bitfield,/* complain_on_overflow */
373 bfd_elf_generic_reloc, /* special_function */
374 "R_ARM_COPY", /* name */
375 TRUE, /* partial_inplace */
376 0xffffffff, /* src_mask */
377 0xffffffff, /* dst_mask */
378 FALSE), /* pcrel_offset */
379
380 HOWTO (R_ARM_GLOB_DAT, /* type */
381 0, /* rightshift */
382 2, /* size (0 = byte, 1 = short, 2 = long) */
383 32, /* bitsize */
384 FALSE, /* pc_relative */
385 0, /* bitpos */
386 complain_overflow_bitfield,/* complain_on_overflow */
387 bfd_elf_generic_reloc, /* special_function */
388 "R_ARM_GLOB_DAT", /* name */
389 TRUE, /* partial_inplace */
390 0xffffffff, /* src_mask */
391 0xffffffff, /* dst_mask */
392 FALSE), /* pcrel_offset */
393
394 HOWTO (R_ARM_JUMP_SLOT, /* type */
395 0, /* rightshift */
396 2, /* size (0 = byte, 1 = short, 2 = long) */
397 32, /* bitsize */
398 FALSE, /* pc_relative */
399 0, /* bitpos */
400 complain_overflow_bitfield,/* complain_on_overflow */
401 bfd_elf_generic_reloc, /* special_function */
402 "R_ARM_JUMP_SLOT", /* name */
403 TRUE, /* partial_inplace */
404 0xffffffff, /* src_mask */
405 0xffffffff, /* dst_mask */
406 FALSE), /* pcrel_offset */
407
408 HOWTO (R_ARM_RELATIVE, /* type */
409 0, /* rightshift */
410 2, /* size (0 = byte, 1 = short, 2 = long) */
411 32, /* bitsize */
412 FALSE, /* pc_relative */
413 0, /* bitpos */
414 complain_overflow_bitfield,/* complain_on_overflow */
415 bfd_elf_generic_reloc, /* special_function */
416 "R_ARM_RELATIVE", /* name */
417 TRUE, /* partial_inplace */
418 0xffffffff, /* src_mask */
419 0xffffffff, /* dst_mask */
420 FALSE), /* pcrel_offset */
421
c19d1205 422 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ
423 0, /* rightshift */
424 2, /* size (0 = byte, 1 = short, 2 = long) */
425 32, /* bitsize */
426 FALSE, /* pc_relative */
427 0, /* bitpos */
428 complain_overflow_bitfield,/* complain_on_overflow */
429 bfd_elf_generic_reloc, /* special_function */
c19d1205 430 "R_ARM_GOTOFF32", /* name */
7f266840
DJ
431 TRUE, /* partial_inplace */
432 0xffffffff, /* src_mask */
433 0xffffffff, /* dst_mask */
434 FALSE), /* pcrel_offset */
435
436 HOWTO (R_ARM_GOTPC, /* type */
437 0, /* rightshift */
438 2, /* size (0 = byte, 1 = short, 2 = long) */
439 32, /* bitsize */
440 TRUE, /* pc_relative */
441 0, /* bitpos */
442 complain_overflow_bitfield,/* complain_on_overflow */
443 bfd_elf_generic_reloc, /* special_function */
444 "R_ARM_GOTPC", /* name */
445 TRUE, /* partial_inplace */
446 0xffffffff, /* src_mask */
447 0xffffffff, /* dst_mask */
448 TRUE), /* pcrel_offset */
449
450 HOWTO (R_ARM_GOT32, /* type */
451 0, /* rightshift */
452 2, /* size (0 = byte, 1 = short, 2 = long) */
453 32, /* bitsize */
454 FALSE, /* pc_relative */
455 0, /* bitpos */
456 complain_overflow_bitfield,/* complain_on_overflow */
457 bfd_elf_generic_reloc, /* special_function */
458 "R_ARM_GOT32", /* name */
459 TRUE, /* partial_inplace */
460 0xffffffff, /* src_mask */
461 0xffffffff, /* dst_mask */
462 FALSE), /* pcrel_offset */
463
464 HOWTO (R_ARM_PLT32, /* type */
465 2, /* rightshift */
466 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 467 24, /* bitsize */
7f266840
DJ
468 TRUE, /* pc_relative */
469 0, /* bitpos */
470 complain_overflow_bitfield,/* complain_on_overflow */
471 bfd_elf_generic_reloc, /* special_function */
472 "R_ARM_PLT32", /* name */
ce490eda 473 FALSE, /* partial_inplace */
7f266840
DJ
474 0x00ffffff, /* src_mask */
475 0x00ffffff, /* dst_mask */
476 TRUE), /* pcrel_offset */
477
478 HOWTO (R_ARM_CALL, /* type */
479 2, /* rightshift */
480 2, /* size (0 = byte, 1 = short, 2 = long) */
481 24, /* bitsize */
482 TRUE, /* pc_relative */
483 0, /* bitpos */
484 complain_overflow_signed,/* complain_on_overflow */
485 bfd_elf_generic_reloc, /* special_function */
486 "R_ARM_CALL", /* name */
487 FALSE, /* partial_inplace */
488 0x00ffffff, /* src_mask */
489 0x00ffffff, /* dst_mask */
490 TRUE), /* pcrel_offset */
491
492 HOWTO (R_ARM_JUMP24, /* type */
493 2, /* rightshift */
494 2, /* size (0 = byte, 1 = short, 2 = long) */
495 24, /* bitsize */
496 TRUE, /* pc_relative */
497 0, /* bitpos */
498 complain_overflow_signed,/* complain_on_overflow */
499 bfd_elf_generic_reloc, /* special_function */
500 "R_ARM_JUMP24", /* name */
501 FALSE, /* partial_inplace */
502 0x00ffffff, /* src_mask */
503 0x00ffffff, /* dst_mask */
504 TRUE), /* pcrel_offset */
505
c19d1205
ZW
506 HOWTO (R_ARM_THM_JUMP24, /* type */
507 1, /* rightshift */
508 2, /* size (0 = byte, 1 = short, 2 = long) */
509 24, /* bitsize */
510 TRUE, /* pc_relative */
7f266840 511 0, /* bitpos */
c19d1205 512 complain_overflow_signed,/* complain_on_overflow */
7f266840 513 bfd_elf_generic_reloc, /* special_function */
c19d1205 514 "R_ARM_THM_JUMP24", /* name */
7f266840 515 FALSE, /* partial_inplace */
c19d1205
ZW
516 0x07ff2fff, /* src_mask */
517 0x07ff2fff, /* dst_mask */
518 TRUE), /* pcrel_offset */
7f266840 519
c19d1205 520 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 521 0, /* rightshift */
c19d1205
ZW
522 2, /* size (0 = byte, 1 = short, 2 = long) */
523 32, /* bitsize */
7f266840
DJ
524 FALSE, /* pc_relative */
525 0, /* bitpos */
526 complain_overflow_dont,/* complain_on_overflow */
527 bfd_elf_generic_reloc, /* special_function */
c19d1205 528 "R_ARM_BASE_ABS", /* name */
7f266840 529 FALSE, /* partial_inplace */
c19d1205
ZW
530 0xffffffff, /* src_mask */
531 0xffffffff, /* dst_mask */
7f266840
DJ
532 FALSE), /* pcrel_offset */
533
534 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
535 0, /* rightshift */
536 2, /* size (0 = byte, 1 = short, 2 = long) */
537 12, /* bitsize */
538 TRUE, /* pc_relative */
539 0, /* bitpos */
540 complain_overflow_dont,/* complain_on_overflow */
541 bfd_elf_generic_reloc, /* special_function */
542 "R_ARM_ALU_PCREL_7_0", /* name */
543 FALSE, /* partial_inplace */
544 0x00000fff, /* src_mask */
545 0x00000fff, /* dst_mask */
546 TRUE), /* pcrel_offset */
547
548 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
549 0, /* rightshift */
550 2, /* size (0 = byte, 1 = short, 2 = long) */
551 12, /* bitsize */
552 TRUE, /* pc_relative */
553 8, /* bitpos */
554 complain_overflow_dont,/* complain_on_overflow */
555 bfd_elf_generic_reloc, /* special_function */
556 "R_ARM_ALU_PCREL_15_8",/* name */
557 FALSE, /* partial_inplace */
558 0x00000fff, /* src_mask */
559 0x00000fff, /* dst_mask */
560 TRUE), /* pcrel_offset */
561
562 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
563 0, /* rightshift */
564 2, /* size (0 = byte, 1 = short, 2 = long) */
565 12, /* bitsize */
566 TRUE, /* pc_relative */
567 16, /* bitpos */
568 complain_overflow_dont,/* complain_on_overflow */
569 bfd_elf_generic_reloc, /* special_function */
570 "R_ARM_ALU_PCREL_23_15",/* name */
571 FALSE, /* partial_inplace */
572 0x00000fff, /* src_mask */
573 0x00000fff, /* dst_mask */
574 TRUE), /* pcrel_offset */
575
576 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
577 0, /* rightshift */
578 2, /* size (0 = byte, 1 = short, 2 = long) */
579 12, /* bitsize */
580 FALSE, /* pc_relative */
581 0, /* bitpos */
582 complain_overflow_dont,/* complain_on_overflow */
583 bfd_elf_generic_reloc, /* special_function */
584 "R_ARM_LDR_SBREL_11_0",/* name */
585 FALSE, /* partial_inplace */
586 0x00000fff, /* src_mask */
587 0x00000fff, /* dst_mask */
588 FALSE), /* pcrel_offset */
589
590 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
591 0, /* rightshift */
592 2, /* size (0 = byte, 1 = short, 2 = long) */
593 8, /* bitsize */
594 FALSE, /* pc_relative */
595 12, /* bitpos */
596 complain_overflow_dont,/* complain_on_overflow */
597 bfd_elf_generic_reloc, /* special_function */
598 "R_ARM_ALU_SBREL_19_12",/* name */
599 FALSE, /* partial_inplace */
600 0x000ff000, /* src_mask */
601 0x000ff000, /* dst_mask */
602 FALSE), /* pcrel_offset */
603
604 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
605 0, /* rightshift */
606 2, /* size (0 = byte, 1 = short, 2 = long) */
607 8, /* bitsize */
608 FALSE, /* pc_relative */
609 20, /* bitpos */
610 complain_overflow_dont,/* complain_on_overflow */
611 bfd_elf_generic_reloc, /* special_function */
612 "R_ARM_ALU_SBREL_27_20",/* name */
613 FALSE, /* partial_inplace */
614 0x0ff00000, /* src_mask */
615 0x0ff00000, /* dst_mask */
616 FALSE), /* pcrel_offset */
617
618 HOWTO (R_ARM_TARGET1, /* type */
619 0, /* rightshift */
620 2, /* size (0 = byte, 1 = short, 2 = long) */
621 32, /* bitsize */
622 FALSE, /* pc_relative */
623 0, /* bitpos */
624 complain_overflow_dont,/* complain_on_overflow */
625 bfd_elf_generic_reloc, /* special_function */
626 "R_ARM_TARGET1", /* name */
627 FALSE, /* partial_inplace */
628 0xffffffff, /* src_mask */
629 0xffffffff, /* dst_mask */
630 FALSE), /* pcrel_offset */
631
632 HOWTO (R_ARM_ROSEGREL32, /* type */
633 0, /* rightshift */
634 2, /* size (0 = byte, 1 = short, 2 = long) */
635 32, /* bitsize */
636 FALSE, /* pc_relative */
637 0, /* bitpos */
638 complain_overflow_dont,/* complain_on_overflow */
639 bfd_elf_generic_reloc, /* special_function */
640 "R_ARM_ROSEGREL32", /* name */
641 FALSE, /* partial_inplace */
642 0xffffffff, /* src_mask */
643 0xffffffff, /* dst_mask */
644 FALSE), /* pcrel_offset */
645
646 HOWTO (R_ARM_V4BX, /* type */
647 0, /* rightshift */
648 2, /* size (0 = byte, 1 = short, 2 = long) */
649 32, /* bitsize */
650 FALSE, /* pc_relative */
651 0, /* bitpos */
652 complain_overflow_dont,/* complain_on_overflow */
653 bfd_elf_generic_reloc, /* special_function */
654 "R_ARM_V4BX", /* name */
655 FALSE, /* partial_inplace */
656 0xffffffff, /* src_mask */
657 0xffffffff, /* dst_mask */
658 FALSE), /* pcrel_offset */
659
660 HOWTO (R_ARM_TARGET2, /* type */
661 0, /* rightshift */
662 2, /* size (0 = byte, 1 = short, 2 = long) */
663 32, /* bitsize */
664 FALSE, /* pc_relative */
665 0, /* bitpos */
666 complain_overflow_signed,/* complain_on_overflow */
667 bfd_elf_generic_reloc, /* special_function */
668 "R_ARM_TARGET2", /* name */
669 FALSE, /* partial_inplace */
670 0xffffffff, /* src_mask */
671 0xffffffff, /* dst_mask */
672 TRUE), /* pcrel_offset */
673
674 HOWTO (R_ARM_PREL31, /* type */
675 0, /* rightshift */
676 2, /* size (0 = byte, 1 = short, 2 = long) */
677 31, /* bitsize */
678 TRUE, /* pc_relative */
679 0, /* bitpos */
680 complain_overflow_signed,/* complain_on_overflow */
681 bfd_elf_generic_reloc, /* special_function */
682 "R_ARM_PREL31", /* name */
683 FALSE, /* partial_inplace */
684 0x7fffffff, /* src_mask */
685 0x7fffffff, /* dst_mask */
686 TRUE), /* pcrel_offset */
c19d1205
ZW
687
688 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
689 0, /* rightshift */
690 2, /* size (0 = byte, 1 = short, 2 = long) */
691 16, /* bitsize */
692 FALSE, /* pc_relative */
693 0, /* bitpos */
694 complain_overflow_dont,/* complain_on_overflow */
695 bfd_elf_generic_reloc, /* special_function */
696 "R_ARM_MOVW_ABS_NC", /* name */
697 FALSE, /* partial_inplace */
698 0x0000ffff, /* src_mask */
699 0x0000ffff, /* dst_mask */
700 FALSE), /* pcrel_offset */
701
702 HOWTO (R_ARM_MOVT_ABS, /* type */
703 0, /* rightshift */
704 2, /* size (0 = byte, 1 = short, 2 = long) */
705 16, /* bitsize */
706 FALSE, /* pc_relative */
707 0, /* bitpos */
708 complain_overflow_bitfield,/* complain_on_overflow */
709 bfd_elf_generic_reloc, /* special_function */
710 "R_ARM_MOVT_ABS", /* name */
711 FALSE, /* partial_inplace */
712 0x0000ffff, /* src_mask */
713 0x0000ffff, /* dst_mask */
714 FALSE), /* pcrel_offset */
715
716 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
717 0, /* rightshift */
718 2, /* size (0 = byte, 1 = short, 2 = long) */
719 16, /* bitsize */
720 TRUE, /* pc_relative */
721 0, /* bitpos */
722 complain_overflow_dont,/* complain_on_overflow */
723 bfd_elf_generic_reloc, /* special_function */
724 "R_ARM_MOVW_PREL_NC", /* name */
725 FALSE, /* partial_inplace */
726 0x0000ffff, /* src_mask */
727 0x0000ffff, /* dst_mask */
728 TRUE), /* pcrel_offset */
729
730 HOWTO (R_ARM_MOVT_PREL, /* type */
731 0, /* rightshift */
732 2, /* size (0 = byte, 1 = short, 2 = long) */
733 16, /* bitsize */
734 TRUE, /* pc_relative */
735 0, /* bitpos */
736 complain_overflow_bitfield,/* complain_on_overflow */
737 bfd_elf_generic_reloc, /* special_function */
738 "R_ARM_MOVT_PREL", /* name */
739 FALSE, /* partial_inplace */
740 0x0000ffff, /* src_mask */
741 0x0000ffff, /* dst_mask */
742 TRUE), /* pcrel_offset */
743
744 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
745 0, /* rightshift */
746 2, /* size (0 = byte, 1 = short, 2 = long) */
747 16, /* bitsize */
748 FALSE, /* pc_relative */
749 0, /* bitpos */
750 complain_overflow_dont,/* complain_on_overflow */
751 bfd_elf_generic_reloc, /* special_function */
752 "R_ARM_THM_MOVW_ABS_NC",/* name */
753 FALSE, /* partial_inplace */
754 0x040f70ff, /* src_mask */
755 0x040f70ff, /* dst_mask */
756 FALSE), /* pcrel_offset */
757
758 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
759 0, /* rightshift */
760 2, /* size (0 = byte, 1 = short, 2 = long) */
761 16, /* bitsize */
762 FALSE, /* pc_relative */
763 0, /* bitpos */
764 complain_overflow_bitfield,/* complain_on_overflow */
765 bfd_elf_generic_reloc, /* special_function */
766 "R_ARM_THM_MOVT_ABS", /* name */
767 FALSE, /* partial_inplace */
768 0x040f70ff, /* src_mask */
769 0x040f70ff, /* dst_mask */
770 FALSE), /* pcrel_offset */
771
772 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
773 0, /* rightshift */
774 2, /* size (0 = byte, 1 = short, 2 = long) */
775 16, /* bitsize */
776 TRUE, /* pc_relative */
777 0, /* bitpos */
778 complain_overflow_dont,/* complain_on_overflow */
779 bfd_elf_generic_reloc, /* special_function */
780 "R_ARM_THM_MOVW_PREL_NC",/* name */
781 FALSE, /* partial_inplace */
782 0x040f70ff, /* src_mask */
783 0x040f70ff, /* dst_mask */
784 TRUE), /* pcrel_offset */
785
786 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
787 0, /* rightshift */
788 2, /* size (0 = byte, 1 = short, 2 = long) */
789 16, /* bitsize */
790 TRUE, /* pc_relative */
791 0, /* bitpos */
792 complain_overflow_bitfield,/* complain_on_overflow */
793 bfd_elf_generic_reloc, /* special_function */
794 "R_ARM_THM_MOVT_PREL", /* name */
795 FALSE, /* partial_inplace */
796 0x040f70ff, /* src_mask */
797 0x040f70ff, /* dst_mask */
798 TRUE), /* pcrel_offset */
799
800 HOWTO (R_ARM_THM_JUMP19, /* type */
801 1, /* rightshift */
802 2, /* size (0 = byte, 1 = short, 2 = long) */
803 19, /* bitsize */
804 TRUE, /* pc_relative */
805 0, /* bitpos */
806 complain_overflow_signed,/* complain_on_overflow */
807 bfd_elf_generic_reloc, /* special_function */
808 "R_ARM_THM_JUMP19", /* name */
809 FALSE, /* partial_inplace */
810 0x043f2fff, /* src_mask */
811 0x043f2fff, /* dst_mask */
812 TRUE), /* pcrel_offset */
813
814 HOWTO (R_ARM_THM_JUMP6, /* type */
815 1, /* rightshift */
816 1, /* size (0 = byte, 1 = short, 2 = long) */
817 6, /* bitsize */
818 TRUE, /* pc_relative */
819 0, /* bitpos */
820 complain_overflow_unsigned,/* complain_on_overflow */
821 bfd_elf_generic_reloc, /* special_function */
822 "R_ARM_THM_JUMP6", /* name */
823 FALSE, /* partial_inplace */
824 0x02f8, /* src_mask */
825 0x02f8, /* dst_mask */
826 TRUE), /* pcrel_offset */
827
828 /* These are declared as 13-bit signed relocations because we can
829 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
830 versa. */
831 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
832 0, /* rightshift */
833 2, /* size (0 = byte, 1 = short, 2 = long) */
834 13, /* bitsize */
835 TRUE, /* pc_relative */
836 0, /* bitpos */
2cab6cc3 837 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW
838 bfd_elf_generic_reloc, /* special_function */
839 "R_ARM_THM_ALU_PREL_11_0",/* name */
840 FALSE, /* partial_inplace */
2cab6cc3
MS
841 0xffffffff, /* src_mask */
842 0xffffffff, /* dst_mask */
c19d1205
ZW
843 TRUE), /* pcrel_offset */
844
845 HOWTO (R_ARM_THM_PC12, /* type */
846 0, /* rightshift */
847 2, /* size (0 = byte, 1 = short, 2 = long) */
848 13, /* bitsize */
849 TRUE, /* pc_relative */
850 0, /* bitpos */
2cab6cc3 851 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW
852 bfd_elf_generic_reloc, /* special_function */
853 "R_ARM_THM_PC12", /* name */
854 FALSE, /* partial_inplace */
2cab6cc3
MS
855 0xffffffff, /* src_mask */
856 0xffffffff, /* dst_mask */
c19d1205
ZW
857 TRUE), /* pcrel_offset */
858
859 HOWTO (R_ARM_ABS32_NOI, /* type */
860 0, /* rightshift */
861 2, /* size (0 = byte, 1 = short, 2 = long) */
862 32, /* bitsize */
863 FALSE, /* pc_relative */
864 0, /* bitpos */
865 complain_overflow_dont,/* complain_on_overflow */
866 bfd_elf_generic_reloc, /* special_function */
867 "R_ARM_ABS32_NOI", /* name */
868 FALSE, /* partial_inplace */
869 0xffffffff, /* src_mask */
870 0xffffffff, /* dst_mask */
871 FALSE), /* pcrel_offset */
872
873 HOWTO (R_ARM_REL32_NOI, /* type */
874 0, /* rightshift */
875 2, /* size (0 = byte, 1 = short, 2 = long) */
876 32, /* bitsize */
877 TRUE, /* pc_relative */
878 0, /* bitpos */
879 complain_overflow_dont,/* complain_on_overflow */
880 bfd_elf_generic_reloc, /* special_function */
881 "R_ARM_REL32_NOI", /* name */
882 FALSE, /* partial_inplace */
883 0xffffffff, /* src_mask */
884 0xffffffff, /* dst_mask */
885 FALSE), /* pcrel_offset */
7f266840 886
4962c51a
MS
887 /* Group relocations. */
888
889 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
890 0, /* rightshift */
891 2, /* size (0 = byte, 1 = short, 2 = long) */
892 32, /* bitsize */
893 TRUE, /* pc_relative */
894 0, /* bitpos */
895 complain_overflow_dont,/* complain_on_overflow */
896 bfd_elf_generic_reloc, /* special_function */
897 "R_ARM_ALU_PC_G0_NC", /* name */
898 FALSE, /* partial_inplace */
899 0xffffffff, /* src_mask */
900 0xffffffff, /* dst_mask */
901 TRUE), /* pcrel_offset */
902
903 HOWTO (R_ARM_ALU_PC_G0, /* type */
904 0, /* rightshift */
905 2, /* size (0 = byte, 1 = short, 2 = long) */
906 32, /* bitsize */
907 TRUE, /* pc_relative */
908 0, /* bitpos */
909 complain_overflow_dont,/* complain_on_overflow */
910 bfd_elf_generic_reloc, /* special_function */
911 "R_ARM_ALU_PC_G0", /* name */
912 FALSE, /* partial_inplace */
913 0xffffffff, /* src_mask */
914 0xffffffff, /* dst_mask */
915 TRUE), /* pcrel_offset */
916
917 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
918 0, /* rightshift */
919 2, /* size (0 = byte, 1 = short, 2 = long) */
920 32, /* bitsize */
921 TRUE, /* pc_relative */
922 0, /* bitpos */
923 complain_overflow_dont,/* complain_on_overflow */
924 bfd_elf_generic_reloc, /* special_function */
925 "R_ARM_ALU_PC_G1_NC", /* name */
926 FALSE, /* partial_inplace */
927 0xffffffff, /* src_mask */
928 0xffffffff, /* dst_mask */
929 TRUE), /* pcrel_offset */
930
931 HOWTO (R_ARM_ALU_PC_G1, /* type */
932 0, /* rightshift */
933 2, /* size (0 = byte, 1 = short, 2 = long) */
934 32, /* bitsize */
935 TRUE, /* pc_relative */
936 0, /* bitpos */
937 complain_overflow_dont,/* complain_on_overflow */
938 bfd_elf_generic_reloc, /* special_function */
939 "R_ARM_ALU_PC_G1", /* name */
940 FALSE, /* partial_inplace */
941 0xffffffff, /* src_mask */
942 0xffffffff, /* dst_mask */
943 TRUE), /* pcrel_offset */
944
945 HOWTO (R_ARM_ALU_PC_G2, /* type */
946 0, /* rightshift */
947 2, /* size (0 = byte, 1 = short, 2 = long) */
948 32, /* bitsize */
949 TRUE, /* pc_relative */
950 0, /* bitpos */
951 complain_overflow_dont,/* complain_on_overflow */
952 bfd_elf_generic_reloc, /* special_function */
953 "R_ARM_ALU_PC_G2", /* name */
954 FALSE, /* partial_inplace */
955 0xffffffff, /* src_mask */
956 0xffffffff, /* dst_mask */
957 TRUE), /* pcrel_offset */
958
959 HOWTO (R_ARM_LDR_PC_G1, /* type */
960 0, /* rightshift */
961 2, /* size (0 = byte, 1 = short, 2 = long) */
962 32, /* bitsize */
963 TRUE, /* pc_relative */
964 0, /* bitpos */
965 complain_overflow_dont,/* complain_on_overflow */
966 bfd_elf_generic_reloc, /* special_function */
967 "R_ARM_LDR_PC_G1", /* name */
968 FALSE, /* partial_inplace */
969 0xffffffff, /* src_mask */
970 0xffffffff, /* dst_mask */
971 TRUE), /* pcrel_offset */
972
973 HOWTO (R_ARM_LDR_PC_G2, /* type */
974 0, /* rightshift */
975 2, /* size (0 = byte, 1 = short, 2 = long) */
976 32, /* bitsize */
977 TRUE, /* pc_relative */
978 0, /* bitpos */
979 complain_overflow_dont,/* complain_on_overflow */
980 bfd_elf_generic_reloc, /* special_function */
981 "R_ARM_LDR_PC_G2", /* name */
982 FALSE, /* partial_inplace */
983 0xffffffff, /* src_mask */
984 0xffffffff, /* dst_mask */
985 TRUE), /* pcrel_offset */
986
987 HOWTO (R_ARM_LDRS_PC_G0, /* type */
988 0, /* rightshift */
989 2, /* size (0 = byte, 1 = short, 2 = long) */
990 32, /* bitsize */
991 TRUE, /* pc_relative */
992 0, /* bitpos */
993 complain_overflow_dont,/* complain_on_overflow */
994 bfd_elf_generic_reloc, /* special_function */
995 "R_ARM_LDRS_PC_G0", /* name */
996 FALSE, /* partial_inplace */
997 0xffffffff, /* src_mask */
998 0xffffffff, /* dst_mask */
999 TRUE), /* pcrel_offset */
1000
1001 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1002 0, /* rightshift */
1003 2, /* size (0 = byte, 1 = short, 2 = long) */
1004 32, /* bitsize */
1005 TRUE, /* pc_relative */
1006 0, /* bitpos */
1007 complain_overflow_dont,/* complain_on_overflow */
1008 bfd_elf_generic_reloc, /* special_function */
1009 "R_ARM_LDRS_PC_G1", /* name */
1010 FALSE, /* partial_inplace */
1011 0xffffffff, /* src_mask */
1012 0xffffffff, /* dst_mask */
1013 TRUE), /* pcrel_offset */
1014
1015 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1016 0, /* rightshift */
1017 2, /* size (0 = byte, 1 = short, 2 = long) */
1018 32, /* bitsize */
1019 TRUE, /* pc_relative */
1020 0, /* bitpos */
1021 complain_overflow_dont,/* complain_on_overflow */
1022 bfd_elf_generic_reloc, /* special_function */
1023 "R_ARM_LDRS_PC_G2", /* name */
1024 FALSE, /* partial_inplace */
1025 0xffffffff, /* src_mask */
1026 0xffffffff, /* dst_mask */
1027 TRUE), /* pcrel_offset */
1028
1029 HOWTO (R_ARM_LDC_PC_G0, /* type */
1030 0, /* rightshift */
1031 2, /* size (0 = byte, 1 = short, 2 = long) */
1032 32, /* bitsize */
1033 TRUE, /* pc_relative */
1034 0, /* bitpos */
1035 complain_overflow_dont,/* complain_on_overflow */
1036 bfd_elf_generic_reloc, /* special_function */
1037 "R_ARM_LDC_PC_G0", /* name */
1038 FALSE, /* partial_inplace */
1039 0xffffffff, /* src_mask */
1040 0xffffffff, /* dst_mask */
1041 TRUE), /* pcrel_offset */
1042
1043 HOWTO (R_ARM_LDC_PC_G1, /* type */
1044 0, /* rightshift */
1045 2, /* size (0 = byte, 1 = short, 2 = long) */
1046 32, /* bitsize */
1047 TRUE, /* pc_relative */
1048 0, /* bitpos */
1049 complain_overflow_dont,/* complain_on_overflow */
1050 bfd_elf_generic_reloc, /* special_function */
1051 "R_ARM_LDC_PC_G1", /* name */
1052 FALSE, /* partial_inplace */
1053 0xffffffff, /* src_mask */
1054 0xffffffff, /* dst_mask */
1055 TRUE), /* pcrel_offset */
1056
1057 HOWTO (R_ARM_LDC_PC_G2, /* type */
1058 0, /* rightshift */
1059 2, /* size (0 = byte, 1 = short, 2 = long) */
1060 32, /* bitsize */
1061 TRUE, /* pc_relative */
1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 bfd_elf_generic_reloc, /* special_function */
1065 "R_ARM_LDC_PC_G2", /* name */
1066 FALSE, /* partial_inplace */
1067 0xffffffff, /* src_mask */
1068 0xffffffff, /* dst_mask */
1069 TRUE), /* pcrel_offset */
1070
1071 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1072 0, /* rightshift */
1073 2, /* size (0 = byte, 1 = short, 2 = long) */
1074 32, /* bitsize */
1075 TRUE, /* pc_relative */
1076 0, /* bitpos */
1077 complain_overflow_dont,/* complain_on_overflow */
1078 bfd_elf_generic_reloc, /* special_function */
1079 "R_ARM_ALU_SB_G0_NC", /* name */
1080 FALSE, /* partial_inplace */
1081 0xffffffff, /* src_mask */
1082 0xffffffff, /* dst_mask */
1083 TRUE), /* pcrel_offset */
1084
1085 HOWTO (R_ARM_ALU_SB_G0, /* type */
1086 0, /* rightshift */
1087 2, /* size (0 = byte, 1 = short, 2 = long) */
1088 32, /* bitsize */
1089 TRUE, /* pc_relative */
1090 0, /* bitpos */
1091 complain_overflow_dont,/* complain_on_overflow */
1092 bfd_elf_generic_reloc, /* special_function */
1093 "R_ARM_ALU_SB_G0", /* name */
1094 FALSE, /* partial_inplace */
1095 0xffffffff, /* src_mask */
1096 0xffffffff, /* dst_mask */
1097 TRUE), /* pcrel_offset */
1098
1099 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1100 0, /* rightshift */
1101 2, /* size (0 = byte, 1 = short, 2 = long) */
1102 32, /* bitsize */
1103 TRUE, /* pc_relative */
1104 0, /* bitpos */
1105 complain_overflow_dont,/* complain_on_overflow */
1106 bfd_elf_generic_reloc, /* special_function */
1107 "R_ARM_ALU_SB_G1_NC", /* name */
1108 FALSE, /* partial_inplace */
1109 0xffffffff, /* src_mask */
1110 0xffffffff, /* dst_mask */
1111 TRUE), /* pcrel_offset */
1112
1113 HOWTO (R_ARM_ALU_SB_G1, /* type */
1114 0, /* rightshift */
1115 2, /* size (0 = byte, 1 = short, 2 = long) */
1116 32, /* bitsize */
1117 TRUE, /* pc_relative */
1118 0, /* bitpos */
1119 complain_overflow_dont,/* complain_on_overflow */
1120 bfd_elf_generic_reloc, /* special_function */
1121 "R_ARM_ALU_SB_G1", /* name */
1122 FALSE, /* partial_inplace */
1123 0xffffffff, /* src_mask */
1124 0xffffffff, /* dst_mask */
1125 TRUE), /* pcrel_offset */
1126
1127 HOWTO (R_ARM_ALU_SB_G2, /* type */
1128 0, /* rightshift */
1129 2, /* size (0 = byte, 1 = short, 2 = long) */
1130 32, /* bitsize */
1131 TRUE, /* pc_relative */
1132 0, /* bitpos */
1133 complain_overflow_dont,/* complain_on_overflow */
1134 bfd_elf_generic_reloc, /* special_function */
1135 "R_ARM_ALU_SB_G2", /* name */
1136 FALSE, /* partial_inplace */
1137 0xffffffff, /* src_mask */
1138 0xffffffff, /* dst_mask */
1139 TRUE), /* pcrel_offset */
1140
1141 HOWTO (R_ARM_LDR_SB_G0, /* type */
1142 0, /* rightshift */
1143 2, /* size (0 = byte, 1 = short, 2 = long) */
1144 32, /* bitsize */
1145 TRUE, /* pc_relative */
1146 0, /* bitpos */
1147 complain_overflow_dont,/* complain_on_overflow */
1148 bfd_elf_generic_reloc, /* special_function */
1149 "R_ARM_LDR_SB_G0", /* name */
1150 FALSE, /* partial_inplace */
1151 0xffffffff, /* src_mask */
1152 0xffffffff, /* dst_mask */
1153 TRUE), /* pcrel_offset */
1154
1155 HOWTO (R_ARM_LDR_SB_G1, /* type */
1156 0, /* rightshift */
1157 2, /* size (0 = byte, 1 = short, 2 = long) */
1158 32, /* bitsize */
1159 TRUE, /* pc_relative */
1160 0, /* bitpos */
1161 complain_overflow_dont,/* complain_on_overflow */
1162 bfd_elf_generic_reloc, /* special_function */
1163 "R_ARM_LDR_SB_G1", /* name */
1164 FALSE, /* partial_inplace */
1165 0xffffffff, /* src_mask */
1166 0xffffffff, /* dst_mask */
1167 TRUE), /* pcrel_offset */
1168
1169 HOWTO (R_ARM_LDR_SB_G2, /* type */
1170 0, /* rightshift */
1171 2, /* size (0 = byte, 1 = short, 2 = long) */
1172 32, /* bitsize */
1173 TRUE, /* pc_relative */
1174 0, /* bitpos */
1175 complain_overflow_dont,/* complain_on_overflow */
1176 bfd_elf_generic_reloc, /* special_function */
1177 "R_ARM_LDR_SB_G2", /* name */
1178 FALSE, /* partial_inplace */
1179 0xffffffff, /* src_mask */
1180 0xffffffff, /* dst_mask */
1181 TRUE), /* pcrel_offset */
1182
1183 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1184 0, /* rightshift */
1185 2, /* size (0 = byte, 1 = short, 2 = long) */
1186 32, /* bitsize */
1187 TRUE, /* pc_relative */
1188 0, /* bitpos */
1189 complain_overflow_dont,/* complain_on_overflow */
1190 bfd_elf_generic_reloc, /* special_function */
1191 "R_ARM_LDRS_SB_G0", /* name */
1192 FALSE, /* partial_inplace */
1193 0xffffffff, /* src_mask */
1194 0xffffffff, /* dst_mask */
1195 TRUE), /* pcrel_offset */
1196
1197 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1198 0, /* rightshift */
1199 2, /* size (0 = byte, 1 = short, 2 = long) */
1200 32, /* bitsize */
1201 TRUE, /* pc_relative */
1202 0, /* bitpos */
1203 complain_overflow_dont,/* complain_on_overflow */
1204 bfd_elf_generic_reloc, /* special_function */
1205 "R_ARM_LDRS_SB_G1", /* name */
1206 FALSE, /* partial_inplace */
1207 0xffffffff, /* src_mask */
1208 0xffffffff, /* dst_mask */
1209 TRUE), /* pcrel_offset */
1210
1211 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1212 0, /* rightshift */
1213 2, /* size (0 = byte, 1 = short, 2 = long) */
1214 32, /* bitsize */
1215 TRUE, /* pc_relative */
1216 0, /* bitpos */
1217 complain_overflow_dont,/* complain_on_overflow */
1218 bfd_elf_generic_reloc, /* special_function */
1219 "R_ARM_LDRS_SB_G2", /* name */
1220 FALSE, /* partial_inplace */
1221 0xffffffff, /* src_mask */
1222 0xffffffff, /* dst_mask */
1223 TRUE), /* pcrel_offset */
1224
1225 HOWTO (R_ARM_LDC_SB_G0, /* type */
1226 0, /* rightshift */
1227 2, /* size (0 = byte, 1 = short, 2 = long) */
1228 32, /* bitsize */
1229 TRUE, /* pc_relative */
1230 0, /* bitpos */
1231 complain_overflow_dont,/* complain_on_overflow */
1232 bfd_elf_generic_reloc, /* special_function */
1233 "R_ARM_LDC_SB_G0", /* name */
1234 FALSE, /* partial_inplace */
1235 0xffffffff, /* src_mask */
1236 0xffffffff, /* dst_mask */
1237 TRUE), /* pcrel_offset */
1238
1239 HOWTO (R_ARM_LDC_SB_G1, /* type */
1240 0, /* rightshift */
1241 2, /* size (0 = byte, 1 = short, 2 = long) */
1242 32, /* bitsize */
1243 TRUE, /* pc_relative */
1244 0, /* bitpos */
1245 complain_overflow_dont,/* complain_on_overflow */
1246 bfd_elf_generic_reloc, /* special_function */
1247 "R_ARM_LDC_SB_G1", /* name */
1248 FALSE, /* partial_inplace */
1249 0xffffffff, /* src_mask */
1250 0xffffffff, /* dst_mask */
1251 TRUE), /* pcrel_offset */
1252
1253 HOWTO (R_ARM_LDC_SB_G2, /* type */
1254 0, /* rightshift */
1255 2, /* size (0 = byte, 1 = short, 2 = long) */
1256 32, /* bitsize */
1257 TRUE, /* pc_relative */
1258 0, /* bitpos */
1259 complain_overflow_dont,/* complain_on_overflow */
1260 bfd_elf_generic_reloc, /* special_function */
1261 "R_ARM_LDC_SB_G2", /* name */
1262 FALSE, /* partial_inplace */
1263 0xffffffff, /* src_mask */
1264 0xffffffff, /* dst_mask */
1265 TRUE), /* pcrel_offset */
1266
1267 /* End of group relocations. */
c19d1205 1268
c19d1205
ZW
1269 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1270 0, /* rightshift */
1271 2, /* size (0 = byte, 1 = short, 2 = long) */
1272 16, /* bitsize */
1273 FALSE, /* pc_relative */
1274 0, /* bitpos */
1275 complain_overflow_dont,/* complain_on_overflow */
1276 bfd_elf_generic_reloc, /* special_function */
1277 "R_ARM_MOVW_BREL_NC", /* name */
1278 FALSE, /* partial_inplace */
1279 0x0000ffff, /* src_mask */
1280 0x0000ffff, /* dst_mask */
1281 FALSE), /* pcrel_offset */
1282
1283 HOWTO (R_ARM_MOVT_BREL, /* type */
1284 0, /* rightshift */
1285 2, /* size (0 = byte, 1 = short, 2 = long) */
1286 16, /* bitsize */
1287 FALSE, /* pc_relative */
1288 0, /* bitpos */
1289 complain_overflow_bitfield,/* complain_on_overflow */
1290 bfd_elf_generic_reloc, /* special_function */
1291 "R_ARM_MOVT_BREL", /* name */
1292 FALSE, /* partial_inplace */
1293 0x0000ffff, /* src_mask */
1294 0x0000ffff, /* dst_mask */
1295 FALSE), /* pcrel_offset */
1296
1297 HOWTO (R_ARM_MOVW_BREL, /* type */
1298 0, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 16, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_dont,/* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_ARM_MOVW_BREL", /* name */
1306 FALSE, /* partial_inplace */
1307 0x0000ffff, /* src_mask */
1308 0x0000ffff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310
1311 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1312 0, /* rightshift */
1313 2, /* size (0 = byte, 1 = short, 2 = long) */
1314 16, /* bitsize */
1315 FALSE, /* pc_relative */
1316 0, /* bitpos */
1317 complain_overflow_dont,/* complain_on_overflow */
1318 bfd_elf_generic_reloc, /* special_function */
1319 "R_ARM_THM_MOVW_BREL_NC",/* name */
1320 FALSE, /* partial_inplace */
1321 0x040f70ff, /* src_mask */
1322 0x040f70ff, /* dst_mask */
1323 FALSE), /* pcrel_offset */
1324
1325 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1326 0, /* rightshift */
1327 2, /* size (0 = byte, 1 = short, 2 = long) */
1328 16, /* bitsize */
1329 FALSE, /* pc_relative */
1330 0, /* bitpos */
1331 complain_overflow_bitfield,/* complain_on_overflow */
1332 bfd_elf_generic_reloc, /* special_function */
1333 "R_ARM_THM_MOVT_BREL", /* name */
1334 FALSE, /* partial_inplace */
1335 0x040f70ff, /* src_mask */
1336 0x040f70ff, /* dst_mask */
1337 FALSE), /* pcrel_offset */
1338
1339 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1340 0, /* rightshift */
1341 2, /* size (0 = byte, 1 = short, 2 = long) */
1342 16, /* bitsize */
1343 FALSE, /* pc_relative */
1344 0, /* bitpos */
1345 complain_overflow_dont,/* complain_on_overflow */
1346 bfd_elf_generic_reloc, /* special_function */
1347 "R_ARM_THM_MOVW_BREL", /* name */
1348 FALSE, /* partial_inplace */
1349 0x040f70ff, /* src_mask */
1350 0x040f70ff, /* dst_mask */
1351 FALSE), /* pcrel_offset */
1352
1353 EMPTY_HOWTO (90), /* unallocated */
1354 EMPTY_HOWTO (91),
1355 EMPTY_HOWTO (92),
1356 EMPTY_HOWTO (93),
1357
1358 HOWTO (R_ARM_PLT32_ABS, /* type */
1359 0, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 32, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_dont,/* complain_on_overflow */
1365 bfd_elf_generic_reloc, /* special_function */
1366 "R_ARM_PLT32_ABS", /* name */
1367 FALSE, /* partial_inplace */
1368 0xffffffff, /* src_mask */
1369 0xffffffff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 HOWTO (R_ARM_GOT_ABS, /* type */
1373 0, /* rightshift */
1374 2, /* size (0 = byte, 1 = short, 2 = long) */
1375 32, /* bitsize */
1376 FALSE, /* pc_relative */
1377 0, /* bitpos */
1378 complain_overflow_dont,/* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_ARM_GOT_ABS", /* name */
1381 FALSE, /* partial_inplace */
1382 0xffffffff, /* src_mask */
1383 0xffffffff, /* dst_mask */
1384 FALSE), /* pcrel_offset */
1385
1386 HOWTO (R_ARM_GOT_PREL, /* type */
1387 0, /* rightshift */
1388 2, /* size (0 = byte, 1 = short, 2 = long) */
1389 32, /* bitsize */
1390 TRUE, /* pc_relative */
1391 0, /* bitpos */
1392 complain_overflow_dont, /* complain_on_overflow */
1393 bfd_elf_generic_reloc, /* special_function */
1394 "R_ARM_GOT_PREL", /* name */
1395 FALSE, /* partial_inplace */
1396 0xffffffff, /* src_mask */
1397 0xffffffff, /* dst_mask */
1398 TRUE), /* pcrel_offset */
1399
1400 HOWTO (R_ARM_GOT_BREL12, /* type */
1401 0, /* rightshift */
1402 2, /* size (0 = byte, 1 = short, 2 = long) */
1403 12, /* bitsize */
1404 FALSE, /* pc_relative */
1405 0, /* bitpos */
1406 complain_overflow_bitfield,/* complain_on_overflow */
1407 bfd_elf_generic_reloc, /* special_function */
1408 "R_ARM_GOT_BREL12", /* name */
1409 FALSE, /* partial_inplace */
1410 0x00000fff, /* src_mask */
1411 0x00000fff, /* dst_mask */
1412 FALSE), /* pcrel_offset */
1413
1414 HOWTO (R_ARM_GOTOFF12, /* type */
1415 0, /* rightshift */
1416 2, /* size (0 = byte, 1 = short, 2 = long) */
1417 12, /* bitsize */
1418 FALSE, /* pc_relative */
1419 0, /* bitpos */
1420 complain_overflow_bitfield,/* complain_on_overflow */
1421 bfd_elf_generic_reloc, /* special_function */
1422 "R_ARM_GOTOFF12", /* name */
1423 FALSE, /* partial_inplace */
1424 0x00000fff, /* src_mask */
1425 0x00000fff, /* dst_mask */
1426 FALSE), /* pcrel_offset */
1427
1428 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1429
1430 /* GNU extension to record C++ vtable member usage */
1431 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ
1432 0, /* rightshift */
1433 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1434 0, /* bitsize */
ba93b8ac
DJ
1435 FALSE, /* pc_relative */
1436 0, /* bitpos */
c19d1205
ZW
1437 complain_overflow_dont, /* complain_on_overflow */
1438 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1439 "R_ARM_GNU_VTENTRY", /* name */
1440 FALSE, /* partial_inplace */
1441 0, /* src_mask */
1442 0, /* dst_mask */
1443 FALSE), /* pcrel_offset */
1444
1445 /* GNU extension to record C++ vtable hierarchy */
1446 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1447 0, /* rightshift */
1448 2, /* size (0 = byte, 1 = short, 2 = long) */
1449 0, /* bitsize */
1450 FALSE, /* pc_relative */
1451 0, /* bitpos */
1452 complain_overflow_dont, /* complain_on_overflow */
1453 NULL, /* special_function */
1454 "R_ARM_GNU_VTINHERIT", /* name */
1455 FALSE, /* partial_inplace */
1456 0, /* src_mask */
1457 0, /* dst_mask */
1458 FALSE), /* pcrel_offset */
1459
1460 HOWTO (R_ARM_THM_JUMP11, /* type */
1461 1, /* rightshift */
1462 1, /* size (0 = byte, 1 = short, 2 = long) */
1463 11, /* bitsize */
1464 TRUE, /* pc_relative */
1465 0, /* bitpos */
1466 complain_overflow_signed, /* complain_on_overflow */
1467 bfd_elf_generic_reloc, /* special_function */
1468 "R_ARM_THM_JUMP11", /* name */
1469 FALSE, /* partial_inplace */
1470 0x000007ff, /* src_mask */
1471 0x000007ff, /* dst_mask */
1472 TRUE), /* pcrel_offset */
1473
1474 HOWTO (R_ARM_THM_JUMP8, /* type */
1475 1, /* rightshift */
1476 1, /* size (0 = byte, 1 = short, 2 = long) */
1477 8, /* bitsize */
1478 TRUE, /* pc_relative */
1479 0, /* bitpos */
1480 complain_overflow_signed, /* complain_on_overflow */
1481 bfd_elf_generic_reloc, /* special_function */
1482 "R_ARM_THM_JUMP8", /* name */
1483 FALSE, /* partial_inplace */
1484 0x000000ff, /* src_mask */
1485 0x000000ff, /* dst_mask */
1486 TRUE), /* pcrel_offset */
ba93b8ac 1487
c19d1205
ZW
1488 /* TLS relocations */
1489 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 32, /* bitsize */
1493 FALSE, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW
1496 NULL, /* special_function */
1497 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ
1498 TRUE, /* partial_inplace */
1499 0xffffffff, /* src_mask */
1500 0xffffffff, /* dst_mask */
c19d1205 1501 FALSE), /* pcrel_offset */
ba93b8ac 1502
ba93b8ac
DJ
1503 HOWTO (R_ARM_TLS_LDM32, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 32, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_bitfield,/* complain_on_overflow */
1510 bfd_elf_generic_reloc, /* special_function */
1511 "R_ARM_TLS_LDM32", /* name */
1512 TRUE, /* partial_inplace */
1513 0xffffffff, /* src_mask */
1514 0xffffffff, /* dst_mask */
c19d1205 1515 FALSE), /* pcrel_offset */
ba93b8ac 1516
c19d1205 1517 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ
1518 0, /* rightshift */
1519 2, /* size (0 = byte, 1 = short, 2 = long) */
1520 32, /* bitsize */
1521 FALSE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_bitfield,/* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
c19d1205 1525 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ
1526 TRUE, /* partial_inplace */
1527 0xffffffff, /* src_mask */
1528 0xffffffff, /* dst_mask */
c19d1205 1529 FALSE), /* pcrel_offset */
ba93b8ac 1530
ba93b8ac
DJ
1531 HOWTO (R_ARM_TLS_IE32, /* type */
1532 0, /* rightshift */
1533 2, /* size (0 = byte, 1 = short, 2 = long) */
1534 32, /* bitsize */
1535 FALSE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_bitfield,/* complain_on_overflow */
1538 NULL, /* special_function */
1539 "R_ARM_TLS_IE32", /* name */
1540 TRUE, /* partial_inplace */
1541 0xffffffff, /* src_mask */
1542 0xffffffff, /* dst_mask */
c19d1205 1543 FALSE), /* pcrel_offset */
7f266840 1544
c19d1205 1545 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ
1546 0, /* rightshift */
1547 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1548 32, /* bitsize */
7f266840
DJ
1549 FALSE, /* pc_relative */
1550 0, /* bitpos */
c19d1205
ZW
1551 complain_overflow_bitfield,/* complain_on_overflow */
1552 bfd_elf_generic_reloc, /* special_function */
1553 "R_ARM_TLS_LE32", /* name */
1554 TRUE, /* partial_inplace */
1555 0xffffffff, /* src_mask */
1556 0xffffffff, /* dst_mask */
1557 FALSE), /* pcrel_offset */
7f266840 1558
c19d1205
ZW
1559 HOWTO (R_ARM_TLS_LDO12, /* type */
1560 0, /* rightshift */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 12, /* bitsize */
1563 FALSE, /* pc_relative */
7f266840 1564 0, /* bitpos */
c19d1205 1565 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1566 bfd_elf_generic_reloc, /* special_function */
c19d1205 1567 "R_ARM_TLS_LDO12", /* name */
7f266840 1568 FALSE, /* partial_inplace */
c19d1205
ZW
1569 0x00000fff, /* src_mask */
1570 0x00000fff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
7f266840 1572
c19d1205
ZW
1573 HOWTO (R_ARM_TLS_LE12, /* type */
1574 0, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 12, /* bitsize */
1577 FALSE, /* pc_relative */
7f266840 1578 0, /* bitpos */
c19d1205 1579 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1580 bfd_elf_generic_reloc, /* special_function */
c19d1205 1581 "R_ARM_TLS_LE12", /* name */
7f266840 1582 FALSE, /* partial_inplace */
c19d1205
ZW
1583 0x00000fff, /* src_mask */
1584 0x00000fff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
7f266840 1586
c19d1205 1587 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ
1588 0, /* rightshift */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW
1590 12, /* bitsize */
1591 FALSE, /* pc_relative */
7f266840 1592 0, /* bitpos */
c19d1205 1593 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1594 bfd_elf_generic_reloc, /* special_function */
c19d1205 1595 "R_ARM_TLS_IE12GP", /* name */
7f266840 1596 FALSE, /* partial_inplace */
c19d1205
ZW
1597 0x00000fff, /* src_mask */
1598 0x00000fff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1600};
1601
1602/* 112-127 private relocations
1603 128 R_ARM_ME_TOO, obsolete
1604 129-255 unallocated in AAELF.
7f266840 1605
c19d1205
ZW
1606 249-255 extended, currently unused, relocations: */
1607
4962c51a 1608static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ
1609{
1610 HOWTO (R_ARM_RREL32, /* type */
1611 0, /* rightshift */
1612 0, /* size (0 = byte, 1 = short, 2 = long) */
1613 0, /* bitsize */
1614 FALSE, /* pc_relative */
1615 0, /* bitpos */
1616 complain_overflow_dont,/* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 "R_ARM_RREL32", /* name */
1619 FALSE, /* partial_inplace */
1620 0, /* src_mask */
1621 0, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623
1624 HOWTO (R_ARM_RABS32, /* type */
1625 0, /* rightshift */
1626 0, /* size (0 = byte, 1 = short, 2 = long) */
1627 0, /* bitsize */
1628 FALSE, /* pc_relative */
1629 0, /* bitpos */
1630 complain_overflow_dont,/* complain_on_overflow */
1631 bfd_elf_generic_reloc, /* special_function */
1632 "R_ARM_RABS32", /* name */
1633 FALSE, /* partial_inplace */
1634 0, /* src_mask */
1635 0, /* dst_mask */
1636 FALSE), /* pcrel_offset */
1637
1638 HOWTO (R_ARM_RPC24, /* type */
1639 0, /* rightshift */
1640 0, /* size (0 = byte, 1 = short, 2 = long) */
1641 0, /* bitsize */
1642 FALSE, /* pc_relative */
1643 0, /* bitpos */
1644 complain_overflow_dont,/* complain_on_overflow */
1645 bfd_elf_generic_reloc, /* special_function */
1646 "R_ARM_RPC24", /* name */
1647 FALSE, /* partial_inplace */
1648 0, /* src_mask */
1649 0, /* dst_mask */
1650 FALSE), /* pcrel_offset */
1651
1652 HOWTO (R_ARM_RBASE, /* type */
1653 0, /* rightshift */
1654 0, /* size (0 = byte, 1 = short, 2 = long) */
1655 0, /* bitsize */
1656 FALSE, /* pc_relative */
1657 0, /* bitpos */
1658 complain_overflow_dont,/* complain_on_overflow */
1659 bfd_elf_generic_reloc, /* special_function */
1660 "R_ARM_RBASE", /* name */
1661 FALSE, /* partial_inplace */
1662 0, /* src_mask */
1663 0, /* dst_mask */
1664 FALSE) /* pcrel_offset */
1665};
1666
1667static reloc_howto_type *
1668elf32_arm_howto_from_type (unsigned int r_type)
1669{
c19d1205
ZW
1670 if (r_type < NUM_ELEM (elf32_arm_howto_table_1))
1671 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1672
c19d1205
ZW
1673 if (r_type >= R_ARM_RREL32
1674 && r_type < R_ARM_RREL32 + NUM_ELEM (elf32_arm_howto_table_2))
4962c51a 1675 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1676
c19d1205 1677 return NULL;
7f266840
DJ
1678}
1679
1680static void
1681elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1682 Elf_Internal_Rela * elf_reloc)
1683{
1684 unsigned int r_type;
1685
1686 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1687 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1688}
1689
1690struct elf32_arm_reloc_map
1691 {
1692 bfd_reloc_code_real_type bfd_reloc_val;
1693 unsigned char elf_reloc_val;
1694 };
1695
1696/* All entries in this list must also be present in elf32_arm_howto_table. */
1697static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1698 {
1699 {BFD_RELOC_NONE, R_ARM_NONE},
1700 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB
1701 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1702 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ
1703 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1704 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1705 {BFD_RELOC_32, R_ARM_ABS32},
1706 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1707 {BFD_RELOC_8, R_ARM_ABS8},
1708 {BFD_RELOC_16, R_ARM_ABS16},
1709 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1710 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW
1711 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1712 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1713 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ
1717 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1718 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1719 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1720 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ
1721 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1722 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1723 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1724 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1725 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1726 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1727 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ
1728 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1729 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1730 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1731 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1732 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1733 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1734 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1735 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1736 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1737 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW
1738 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1739 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB
1740 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1741 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1742 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1743 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1744 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1746 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS
1748 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1749 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1750 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1751 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1752 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1753 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1754 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1755 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1756 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1757 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1758 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1759 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1760 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1761 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1762 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1763 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1764 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1765 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1766 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1767 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1768 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1769 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1770 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1771 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1772 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1773 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1774 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1775 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}
7f266840
DJ
1776 };
1777
1778static reloc_howto_type *
f1c71a59
ZW
1779elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1780 bfd_reloc_code_real_type code)
7f266840
DJ
1781{
1782 unsigned int i;
c19d1205
ZW
1783 for (i = 0; i < NUM_ELEM (elf32_arm_reloc_map); i ++)
1784 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1785 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1786
c19d1205 1787 return NULL;
7f266840
DJ
1788}
1789
157090f7
AM
1790static reloc_howto_type *
1791elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1792 const char *r_name)
1793{
1794 unsigned int i;
1795
1796 for (i = 0;
1797 i < (sizeof (elf32_arm_howto_table_1)
1798 / sizeof (elf32_arm_howto_table_1[0]));
1799 i++)
1800 if (elf32_arm_howto_table_1[i].name != NULL
1801 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1802 return &elf32_arm_howto_table_1[i];
1803
1804 for (i = 0;
1805 i < (sizeof (elf32_arm_howto_table_2)
1806 / sizeof (elf32_arm_howto_table_2[0]));
1807 i++)
1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
7f266840
DJ
1815/* Support for core dump NOTE sections */
1816static bfd_boolean
f1c71a59 1817elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ
1818{
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
1827 case 148: /* Linux/ARM 32-bit*/
1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
1832 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844}
1845
1846static bfd_boolean
f1c71a59 1847elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ
1848{
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
1854 case 124: /* Linux/ARM elf_prpsinfo */
1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
1864
1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH
1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB
1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
85a84e7a 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
9b485d32 1892
252b5132
RH
1893/* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
9b485d32 1896 name can be changed. The only requirement is the %s be present. */
252b5132
RH
1897#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
c7b8f16e
JB
1903#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
252b5132
RH
1906/* The name of the dynamic interpreter. This is put in the .interp
1907 section. */
1908#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1909
5e681ec4
PB
1910#ifdef FOUR_WORD_PLT
1911
252b5132
RH
1912/* The first entry in a procedure linkage table looks like
1913 this. It is set up so that any shared library function that is
59f2c4e7 1914 called before the relocation has been set up calls the dynamic
9b485d32 1915 linker first. */
e5a52504 1916static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB
1917 {
1918 0xe52de004, /* str lr, [sp, #-4]! */
1919 0xe59fe010, /* ldr lr, [pc, #16] */
1920 0xe08fe00e, /* add lr, pc, lr */
1921 0xe5bef008, /* ldr pc, [lr, #8]! */
1922 };
1923
1924/* Subsequent entries in a procedure linkage table look like
1925 this. */
e5a52504 1926static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB
1927 {
1928 0xe28fc600, /* add ip, pc, #NN */
1929 0xe28cca00, /* add ip, ip, #NN */
1930 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1931 0x00000000, /* unused */
1932 };
1933
1934#else
1935
5e681ec4
PB
1936/* The first entry in a procedure linkage table looks like
1937 this. It is set up so that any shared library function that is
1938 called before the relocation has been set up calls the dynamic
1939 linker first. */
e5a52504 1940static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1941 {
5e681ec4
PB
1942 0xe52de004, /* str lr, [sp, #-4]! */
1943 0xe59fe004, /* ldr lr, [pc, #4] */
1944 0xe08fe00e, /* add lr, pc, lr */
1945 0xe5bef008, /* ldr pc, [lr, #8]! */
1946 0x00000000, /* &GOT[0] - . */
917583ad 1947 };
252b5132
RH
1948
1949/* Subsequent entries in a procedure linkage table look like
1950 this. */
e5a52504 1951static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB
1952 {
1953 0xe28fc600, /* add ip, pc, #0xNN00000 */
1954 0xe28cca00, /* add ip, ip, #0xNN000 */
1955 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1956 };
1957
1958#endif
252b5132 1959
00a97672
RS
1960/* The format of the first entry in the procedure linkage table
1961 for a VxWorks executable. */
1962static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1963 {
1964 0xe52dc008, /* str ip,[sp,#-8]! */
1965 0xe59fc000, /* ldr ip,[pc] */
1966 0xe59cf008, /* ldr pc,[ip,#8] */
1967 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1968 };
1969
1970/* The format of subsequent entries in a VxWorks executable. */
1971static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1972 {
1973 0xe59fc000, /* ldr ip,[pc] */
1974 0xe59cf000, /* ldr pc,[ip] */
1975 0x00000000, /* .long @got */
1976 0xe59fc000, /* ldr ip,[pc] */
1977 0xea000000, /* b _PLT */
1978 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1979 };
1980
1981/* The format of entries in a VxWorks shared library. */
1982static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1983 {
1984 0xe59fc000, /* ldr ip,[pc] */
1985 0xe79cf009, /* ldr pc,[ip,r9] */
1986 0x00000000, /* .long @got */
1987 0xe59fc000, /* ldr ip,[pc] */
1988 0xe599f008, /* ldr pc,[r9,#8] */
1989 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1990 };
1991
b7693d02
DJ
1992/* An initial stub used if the PLT entry is referenced from Thumb code. */
1993#define PLT_THUMB_STUB_SIZE 4
1994static const bfd_vma elf32_arm_plt_thumb_stub [] =
1995 {
1996 0x4778, /* bx pc */
1997 0x46c0 /* nop */
1998 };
1999
e5a52504
MM
2000/* The entries in a PLT when using a DLL-based target with multiple
2001 address spaces. */
2002static const bfd_vma elf32_arm_symbian_plt_entry [] =
2003 {
83a358aa 2004 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM
2005 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2006 };
2007
e489d0ae
PB
2008/* Used to build a map of a section. This is required for mixed-endian
2009 code/data. */
2010
2011typedef struct elf32_elf_section_map
2012{
2013 bfd_vma vma;
2014 char type;
2015}
2016elf32_arm_section_map;
2017
c7b8f16e
JB
2018/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2019
2020typedef enum
2021{
2022 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2023 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2024 VFP11_ERRATUM_ARM_VENEER,
2025 VFP11_ERRATUM_THUMB_VENEER
2026}
2027elf32_vfp11_erratum_type;
2028
2029typedef struct elf32_vfp11_erratum_list
2030{
2031 struct elf32_vfp11_erratum_list *next;
2032 bfd_vma vma;
2033 union
2034 {
2035 struct
2036 {
2037 struct elf32_vfp11_erratum_list *veneer;
2038 unsigned int vfp_insn;
2039 } b;
2040 struct
2041 {
2042 struct elf32_vfp11_erratum_list *branch;
2043 unsigned int id;
2044 } v;
2045 } u;
2046 elf32_vfp11_erratum_type type;
2047}
2048elf32_vfp11_erratum_list;
2049
8e3de13a 2050typedef struct _arm_elf_section_data
e489d0ae
PB
2051{
2052 struct bfd_elf_section_data elf;
8e3de13a 2053 unsigned int mapcount;
c7b8f16e 2054 unsigned int mapsize;
e489d0ae 2055 elf32_arm_section_map *map;
c7b8f16e
JB
2056 unsigned int erratumcount;
2057 elf32_vfp11_erratum_list *erratumlist;
8e3de13a
NC
2058}
2059_arm_elf_section_data;
e489d0ae
PB
2060
2061#define elf32_arm_section_data(sec) \
8e3de13a 2062 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2063
ba93b8ac
DJ
2064/* The size of the thread control block. */
2065#define TCB_SIZE 8
2066
2067struct elf32_arm_obj_tdata
2068{
2069 struct elf_obj_tdata root;
2070
2071 /* tls_type for each local got entry. */
2072 char *local_got_tls_type;
ee065d83 2073
bf21ed78
MS
2074 /* Zero to warn when linking objects with incompatible enum sizes. */
2075 int no_enum_size_warning;
ba93b8ac
DJ
2076};
2077
2078#define elf32_arm_tdata(abfd) \
2079 ((struct elf32_arm_obj_tdata *) (abfd)->tdata.any)
2080
2081#define elf32_arm_local_got_tls_type(abfd) \
2082 (elf32_arm_tdata (abfd)->local_got_tls_type)
2083
2084static bfd_boolean
2085elf32_arm_mkobject (bfd *abfd)
2086{
ba93b8ac 2087 if (abfd->tdata.any == NULL)
62d7a5f6
AM
2088 {
2089 bfd_size_type amt = sizeof (struct elf32_arm_obj_tdata);
2090 abfd->tdata.any = bfd_zalloc (abfd, amt);
2091 if (abfd->tdata.any == NULL)
2092 return FALSE;
2093 }
2094 return bfd_elf_mkobject (abfd);
ba93b8ac
DJ
2095}
2096
252b5132
RH
2097/* The ARM linker needs to keep track of the number of relocs that it
2098 decides to copy in check_relocs for each symbol. This is so that
2099 it can discard PC relative relocs if it doesn't need them when
2100 linking with -Bsymbolic. We store the information in a field
2101 extending the regular ELF linker hash table. */
2102
ba93b8ac
DJ
2103/* This structure keeps track of the number of relocs we have copied
2104 for a given symbol. */
5e681ec4 2105struct elf32_arm_relocs_copied
917583ad
NC
2106 {
2107 /* Next section. */
5e681ec4 2108 struct elf32_arm_relocs_copied * next;
917583ad
NC
2109 /* A section in dynobj. */
2110 asection * section;
2111 /* Number of relocs copied in this section. */
2112 bfd_size_type count;
ba93b8ac
DJ
2113 /* Number of PC-relative relocs copied in this section. */
2114 bfd_size_type pc_count;
917583ad 2115 };
252b5132 2116
ba93b8ac
DJ
2117#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2118
ba96a88f 2119/* Arm ELF linker hash entry. */
252b5132 2120struct elf32_arm_link_hash_entry
917583ad
NC
2121 {
2122 struct elf_link_hash_entry root;
252b5132 2123
917583ad 2124 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2125 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ
2126
2127 /* We reference count Thumb references to a PLT entry separately,
2128 so that we can emit the Thumb trampoline only if needed. */
2129 bfd_signed_vma plt_thumb_refcount;
2130
2131 /* Since PLT entries have variable size if the Thumb prologue is
2132 used, we need to record the index into .got.plt instead of
2133 recomputing it from the PLT offset. */
2134 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ
2135
2136#define GOT_UNKNOWN 0
2137#define GOT_NORMAL 1
2138#define GOT_TLS_GD 2
2139#define GOT_TLS_IE 4
2140 unsigned char tls_type;
a4fd1a8e
PB
2141
2142 /* The symbol marking the real symbol location for exported thumb
2143 symbols with Arm stubs. */
2144 struct elf_link_hash_entry *export_glue;
917583ad 2145 };
252b5132 2146
252b5132 2147/* Traverse an arm ELF linker hash table. */
252b5132
RH
2148#define elf32_arm_link_hash_traverse(table, func, info) \
2149 (elf_link_hash_traverse \
2150 (&(table)->root, \
b7693d02 2151 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH
2152 (info)))
2153
2154/* Get the ARM elf linker hash table from a link_info structure. */
2155#define elf32_arm_hash_table(info) \
2156 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2157
9b485d32 2158/* ARM ELF linker hash table. */
252b5132 2159struct elf32_arm_link_hash_table
917583ad
NC
2160 {
2161 /* The main hash table. */
2162 struct elf_link_hash_table root;
252b5132 2163
4cc11e76 2164 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 2165 bfd_size_type thumb_glue_size;
252b5132 2166
4cc11e76 2167 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 2168 bfd_size_type arm_glue_size;
252b5132 2169
c7b8f16e
JB
2170 /* The size in bytes of the section containing glue for VFP11 erratum
2171 veneers. */
2172 bfd_size_type vfp11_erratum_glue_size;
2173
4cc11e76 2174 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 2175 bfd * bfd_of_glue_owner;
ba96a88f 2176
e489d0ae
PB
2177 /* Nonzero to output a BE8 image. */
2178 int byteswap_code;
2179
9c504268 2180 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
87bc043a 2181 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
9c504268
PB
2182 int target1_is_rel;
2183
eb043451
PB
2184 /* The relocation to use for R_ARM_TARGET2 relocations. */
2185 int target2_reloc;
2186
319850b4
JB
2187 /* Nonzero to fix BX instructions for ARMv4 targets. */
2188 int fix_v4bx;
2189
33bfe774
JB
2190 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2191 int use_blx;
2192
c7b8f16e
JB
2193 /* What sort of code sequences we should look for which may trigger the
2194 VFP11 denorm erratum. */
2195 bfd_arm_vfp11_fix vfp11_fix;
2196
2197 /* Global counter for the number of fixes we have emitted. */
2198 int num_vfp11_fixes;
2199
27e55c4d
PB
2200 /* Nonzero to force PIC branch veneers. */
2201 int pic_veneer;
2202
e5a52504
MM
2203 /* The number of bytes in the initial entry in the PLT. */
2204 bfd_size_type plt_header_size;
2205
2206 /* The number of bytes in the subsequent PLT etries. */
2207 bfd_size_type plt_entry_size;
2208
00a97672
RS
2209 /* True if the target system is VxWorks. */
2210 int vxworks_p;
2211
e5a52504
MM
2212 /* True if the target system is Symbian OS. */
2213 int symbian_p;
2214
4e7fd91e
PB
2215 /* True if the target uses REL relocations. */
2216 int use_rel;
2217
5e681ec4
PB
2218 /* Short-cuts to get to dynamic linker sections. */
2219 asection *sgot;
2220 asection *sgotplt;
2221 asection *srelgot;
2222 asection *splt;
2223 asection *srelplt;
2224 asection *sdynbss;
2225 asection *srelbss;
2226
00a97672
RS
2227 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2228 asection *srelplt2;
2229
ba93b8ac
DJ
2230 /* Data for R_ARM_TLS_LDM32 relocations. */
2231 union {
2232 bfd_signed_vma refcount;
2233 bfd_vma offset;
2234 } tls_ldm_got;
2235
5e681ec4
PB
2236 /* Small local sym to section mapping cache. */
2237 struct sym_sec_cache sym_sec;
b7693d02
DJ
2238
2239 /* For convenience in allocate_dynrelocs. */
2240 bfd * obfd;
917583ad 2241 };
252b5132 2242
780a67af
NC
2243/* Create an entry in an ARM ELF linker hash table. */
2244
2245static struct bfd_hash_entry *
57e8b36a
NC
2246elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2247 struct bfd_hash_table * table,
2248 const char * string)
780a67af
NC
2249{
2250 struct elf32_arm_link_hash_entry * ret =
2251 (struct elf32_arm_link_hash_entry *) entry;
2252
2253 /* Allocate the structure if it has not already been allocated by a
2254 subclass. */
2255 if (ret == (struct elf32_arm_link_hash_entry *) NULL)
57e8b36a
NC
2256 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2257 if (ret == NULL)
780a67af
NC
2258 return (struct bfd_hash_entry *) ret;
2259
2260 /* Call the allocation method of the superclass. */
2261 ret = ((struct elf32_arm_link_hash_entry *)
2262 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2263 table, string));
57e8b36a 2264 if (ret != NULL)
b7693d02
DJ
2265 {
2266 ret->relocs_copied = NULL;
ba93b8ac 2267 ret->tls_type = GOT_UNKNOWN;
b7693d02
DJ
2268 ret->plt_thumb_refcount = 0;
2269 ret->plt_got_offset = -1;
a4fd1a8e 2270 ret->export_glue = NULL;
b7693d02 2271 }
780a67af
NC
2272
2273 return (struct bfd_hash_entry *) ret;
2274}
2275
00a97672
RS
2276/* Return true if NAME is the name of the relocation section associated
2277 with S. */
2278
2279static bfd_boolean
2280reloc_section_p (struct elf32_arm_link_hash_table *htab,
2281 const char *name, asection *s)
2282{
2283 if (htab->use_rel)
0112cd26 2284 return CONST_STRNEQ (name, ".rel") && strcmp (s->name, name + 4) == 0;
00a97672 2285 else
0112cd26 2286 return CONST_STRNEQ (name, ".rela") && strcmp (s->name, name + 5) == 0;
00a97672
RS
2287}
2288
2289/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB
2290 shortcuts to them in our hash table. */
2291
2292static bfd_boolean
57e8b36a 2293create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB
2294{
2295 struct elf32_arm_link_hash_table *htab;
2296
e5a52504
MM
2297 htab = elf32_arm_hash_table (info);
2298 /* BPABI objects never have a GOT, or associated sections. */
2299 if (htab->symbian_p)
2300 return TRUE;
2301
5e681ec4
PB
2302 if (! _bfd_elf_create_got_section (dynobj, info))
2303 return FALSE;
2304
5e681ec4
PB
2305 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2306 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2307 if (!htab->sgot || !htab->sgotplt)
2308 abort ();
2309
00a97672
RS
2310 htab->srelgot = bfd_make_section_with_flags (dynobj,
2311 RELOC_SECTION (htab, ".got"),
3496cb2a
L
2312 (SEC_ALLOC | SEC_LOAD
2313 | SEC_HAS_CONTENTS
2314 | SEC_IN_MEMORY
2315 | SEC_LINKER_CREATED
2316 | SEC_READONLY));
5e681ec4 2317 if (htab->srelgot == NULL
5e681ec4
PB
2318 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2319 return FALSE;
2320 return TRUE;
2321}
2322
00a97672
RS
2323/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2324 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB
2325 hash table. */
2326
2327static bfd_boolean
57e8b36a 2328elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB
2329{
2330 struct elf32_arm_link_hash_table *htab;
2331
2332 htab = elf32_arm_hash_table (info);
2333 if (!htab->sgot && !create_got_section (dynobj, info))
2334 return FALSE;
2335
2336 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2337 return FALSE;
2338
2339 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS
2340 htab->srelplt = bfd_get_section_by_name (dynobj,
2341 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB
2342 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2343 if (!info->shared)
00a97672
RS
2344 htab->srelbss = bfd_get_section_by_name (dynobj,
2345 RELOC_SECTION (htab, ".bss"));
2346
2347 if (htab->vxworks_p)
2348 {
2349 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2350 return FALSE;
2351
2352 if (info->shared)
2353 {
2354 htab->plt_header_size = 0;
2355 htab->plt_entry_size
2356 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2357 }
2358 else
2359 {
2360 htab->plt_header_size
2361 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2362 htab->plt_entry_size
2363 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2364 }
2365 }
5e681ec4 2366
e5a52504
MM
2367 if (!htab->splt
2368 || !htab->srelplt
2369 || !htab->sdynbss
5e681ec4
PB
2370 || (!info->shared && !htab->srelbss))
2371 abort ();
2372
2373 return TRUE;
2374}
2375
2376/* Copy the extra info we tack onto an elf_link_hash_entry. */
2377
2378static void
fcfa13d2 2379elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
5e681ec4
PB
2380 struct elf_link_hash_entry *dir,
2381 struct elf_link_hash_entry *ind)
2382{
2383 struct elf32_arm_link_hash_entry *edir, *eind;
2384
2385 edir = (struct elf32_arm_link_hash_entry *) dir;
2386 eind = (struct elf32_arm_link_hash_entry *) ind;
2387
2388 if (eind->relocs_copied != NULL)
2389 {
2390 if (edir->relocs_copied != NULL)
2391 {
2392 struct elf32_arm_relocs_copied **pp;
2393 struct elf32_arm_relocs_copied *p;
2394
fcfa13d2 2395 /* Add reloc counts against the indirect sym to the direct sym
5e681ec4
PB
2396 list. Merge any entries against the same section. */
2397 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2398 {
2399 struct elf32_arm_relocs_copied *q;
2400
2401 for (q = edir->relocs_copied; q != NULL; q = q->next)
2402 if (q->section == p->section)
2403 {
ba93b8ac 2404 q->pc_count += p->pc_count;
5e681ec4
PB
2405 q->count += p->count;
2406 *pp = p->next;
2407 break;
2408 }
2409 if (q == NULL)
2410 pp = &p->next;
2411 }
2412 *pp = edir->relocs_copied;
2413 }
2414
2415 edir->relocs_copied = eind->relocs_copied;
2416 eind->relocs_copied = NULL;
2417 }
2418
b34b2d70 2419 if (ind->root.type == bfd_link_hash_indirect)
ba93b8ac 2420 {
b34b2d70
DJ
2421 /* Copy over PLT info. */
2422 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2423 eind->plt_thumb_refcount = 0;
2424
2425 if (dir->got.refcount <= 0)
2426 {
2427 edir->tls_type = eind->tls_type;
2428 eind->tls_type = GOT_UNKNOWN;
2429 }
ba93b8ac
DJ
2430 }
2431
fcfa13d2 2432 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
5e681ec4
PB
2433}
2434
9b485d32 2435/* Create an ARM elf linker hash table. */
252b5132
RH
2436
2437static struct bfd_link_hash_table *
57e8b36a 2438elf32_arm_link_hash_table_create (bfd *abfd)
252b5132
RH
2439{
2440 struct elf32_arm_link_hash_table *ret;
dc810e39 2441 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
252b5132 2442
57e8b36a
NC
2443 ret = bfd_malloc (amt);
2444 if (ret == NULL)
252b5132
RH
2445 return NULL;
2446
57e8b36a 2447 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
66eb6687
AM
2448 elf32_arm_link_hash_newfunc,
2449 sizeof (struct elf32_arm_link_hash_entry)))
252b5132 2450 {
e2d34d7d 2451 free (ret);
252b5132
RH
2452 return NULL;
2453 }
2454
5e681ec4
PB
2455 ret->sgot = NULL;
2456 ret->sgotplt = NULL;
2457 ret->srelgot = NULL;
2458 ret->splt = NULL;
2459 ret->srelplt = NULL;
2460 ret->sdynbss = NULL;
2461 ret->srelbss = NULL;
00a97672 2462 ret->srelplt2 = NULL;
252b5132
RH
2463 ret->thumb_glue_size = 0;
2464 ret->arm_glue_size = 0;
c7b8f16e
JB
2465 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2466 ret->vfp11_erratum_glue_size = 0;
2467 ret->num_vfp11_fixes = 0;
252b5132 2468 ret->bfd_of_glue_owner = NULL;
e489d0ae 2469 ret->byteswap_code = 0;
9c504268 2470 ret->target1_is_rel = 0;
eb043451 2471 ret->target2_reloc = R_ARM_NONE;
e5a52504
MM
2472#ifdef FOUR_WORD_PLT
2473 ret->plt_header_size = 16;
2474 ret->plt_entry_size = 16;
2475#else
2476 ret->plt_header_size = 20;
2477 ret->plt_entry_size = 12;
2478#endif
33bfe774
JB
2479 ret->fix_v4bx = 0;
2480 ret->use_blx = 0;
00a97672 2481 ret->vxworks_p = 0;
e5a52504 2482 ret->symbian_p = 0;
4e7fd91e 2483 ret->use_rel = 1;
5e681ec4 2484 ret->sym_sec.abfd = NULL;
b7693d02 2485 ret->obfd = abfd;
ba93b8ac 2486 ret->tls_ldm_got.refcount = 0;
252b5132
RH
2487
2488 return &ret->root.root;
2489}
2490
9b485d32
NC
2491/* Locate the Thumb encoded calling stub for NAME. */
2492
252b5132 2493static struct elf_link_hash_entry *
57e8b36a
NC
2494find_thumb_glue (struct bfd_link_info *link_info,
2495 const char *name,
f2a9dd69 2496 char **error_message)
252b5132
RH
2497{
2498 char *tmp_name;
2499 struct elf_link_hash_entry *hash;
2500 struct elf32_arm_link_hash_table *hash_table;
2501
2502 /* We need a pointer to the armelf specific hash table. */
2503 hash_table = elf32_arm_hash_table (link_info);
2504
57e8b36a
NC
2505 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2506 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2507
2508 BFD_ASSERT (tmp_name);
2509
2510 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2511
2512 hash = elf_link_hash_lookup
b34976b6 2513 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
2514
2515 if (hash == NULL)
f2a9dd69
DJ
2516 asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
2517 tmp_name, name);
252b5132
RH
2518
2519 free (tmp_name);
2520
2521 return hash;
2522}
2523
9b485d32
NC
2524/* Locate the ARM encoded calling stub for NAME. */
2525
252b5132 2526static struct elf_link_hash_entry *
57e8b36a
NC
2527find_arm_glue (struct bfd_link_info *link_info,
2528 const char *name,
f2a9dd69 2529 char **error_message)
252b5132
RH
2530{
2531 char *tmp_name;
2532 struct elf_link_hash_entry *myh;
2533 struct elf32_arm_link_hash_table *hash_table;
2534
2535 /* We need a pointer to the elfarm specific hash table. */
2536 hash_table = elf32_arm_hash_table (link_info);
2537
57e8b36a
NC
2538 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2539 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2540
2541 BFD_ASSERT (tmp_name);
2542
2543 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2544
2545 myh = elf_link_hash_lookup
b34976b6 2546 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
2547
2548 if (myh == NULL)
f2a9dd69
DJ
2549 asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
2550 tmp_name, name);
252b5132
RH
2551
2552 free (tmp_name);
2553
2554 return myh;
2555}
2556
8f6277f5 2557/* ARM->Thumb glue (static images):
252b5132
RH
2558
2559 .arm
2560 __func_from_arm:
2561 ldr r12, __func_addr
2562 bx r12
2563 __func_addr:
8f6277f5 2564 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 2565
26079076
PB
2566 (v5t static images)
2567 .arm
2568 __func_from_arm:
2569 ldr pc, __func_addr
2570 __func_addr:
2571 .word func @ behave as if you saw a ARM_32 reloc.
2572
8f6277f5
PB
2573 (relocatable images)
2574 .arm
2575 __func_from_arm:
2576 ldr r12, __func_offset
2577 add r12, r12, pc
2578 bx r12
2579 __func_offset:
2580 .word func - .
2581 */
2582
2583#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH
2584static const insn32 a2t1_ldr_insn = 0xe59fc000;
2585static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
2586static const insn32 a2t3_func_addr_insn = 0x00000001;
2587
26079076
PB
2588#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
2589static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
2590static const insn32 a2t2v5_func_addr_insn = 0x00000001;
2591
8f6277f5
PB
2592#define ARM2THUMB_PIC_GLUE_SIZE 16
2593static const insn32 a2t1p_ldr_insn = 0xe59fc004;
2594static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
2595static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
2596
9b485d32 2597/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132
RH
2598
2599 .thumb .thumb
2600 .align 2 .align 2
2601 __func_from_thumb: __func_from_thumb:
2602 bx pc push {r6, lr}
2603 nop ldr r6, __func_addr
2604 .arm mov lr, pc
2605 __func_change_to_arm: bx r6
2606 b func .arm
2607 __func_back_to_thumb:
2608 ldmia r13! {r6, lr}
2609 bx lr
2610 __func_addr:
9b485d32 2611 .word func */
252b5132
RH
2612
2613#define THUMB2ARM_GLUE_SIZE 8
2614static const insn16 t2a1_bx_pc_insn = 0x4778;
2615static const insn16 t2a2_noop_insn = 0x46c0;
2616static const insn32 t2a3_b_insn = 0xea000000;
2617
c7b8f16e
JB
2618#define VFP11_ERRATUM_VENEER_SIZE 8
2619
7e392df6 2620#ifndef ELFARM_NABI_C_INCLUDED
b34976b6 2621bfd_boolean
57e8b36a 2622bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
252b5132
RH
2623{
2624 asection * s;
2625 bfd_byte * foo;
2626 struct elf32_arm_link_hash_table * globals;
2627
2628 globals = elf32_arm_hash_table (info);
2629
2630 BFD_ASSERT (globals != NULL);
2631
2632 if (globals->arm_glue_size != 0)
2633 {
2634 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2635
dc810e39
AM
2636 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2637 ARM2THUMB_GLUE_SECTION_NAME);
252b5132
RH
2638
2639 BFD_ASSERT (s != NULL);
2640
57e8b36a 2641 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
252b5132 2642
2f475487 2643 BFD_ASSERT (s->size == globals->arm_glue_size);
252b5132
RH
2644 s->contents = foo;
2645 }
2646
2647 if (globals->thumb_glue_size != 0)
2648 {
2649 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2650
2651 s = bfd_get_section_by_name
2652 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2653
2654 BFD_ASSERT (s != NULL);
2655
57e8b36a 2656 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
252b5132 2657
2f475487 2658 BFD_ASSERT (s->size == globals->thumb_glue_size);
252b5132
RH
2659 s->contents = foo;
2660 }
c7b8f16e
JB
2661
2662 if (globals->vfp11_erratum_glue_size != 0)
2663 {
2664 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2665
2666 s = bfd_get_section_by_name
2667 (globals->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2668
2669 BFD_ASSERT (s != NULL);
2670
2671 foo = bfd_alloc (globals->bfd_of_glue_owner,
2672 globals->vfp11_erratum_glue_size);
2673
2674 BFD_ASSERT (s->size == globals->vfp11_erratum_glue_size);
2675 s->contents = foo;
2676 }
252b5132 2677
b34976b6 2678 return TRUE;
252b5132
RH
2679}
2680
a4fd1a8e
PB
2681/* Allocate space and symbols for calling a Thumb function from Arm mode.
2682 returns the symbol identifying teh stub. */
2683static struct elf_link_hash_entry *
57e8b36a
NC
2684record_arm_to_thumb_glue (struct bfd_link_info * link_info,
2685 struct elf_link_hash_entry * h)
252b5132
RH
2686{
2687 const char * name = h->root.root.string;
63b0f745 2688 asection * s;
252b5132
RH
2689 char * tmp_name;
2690 struct elf_link_hash_entry * myh;
14a793b2 2691 struct bfd_link_hash_entry * bh;
252b5132 2692 struct elf32_arm_link_hash_table * globals;
dc810e39 2693 bfd_vma val;
2f475487 2694 bfd_size_type size;
252b5132
RH
2695
2696 globals = elf32_arm_hash_table (link_info);
2697
2698 BFD_ASSERT (globals != NULL);
2699 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2700
2701 s = bfd_get_section_by_name
2702 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
2703
252b5132
RH
2704 BFD_ASSERT (s != NULL);
2705
57e8b36a 2706 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2707
2708 BFD_ASSERT (tmp_name);
2709
2710 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2711
2712 myh = elf_link_hash_lookup
b34976b6 2713 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
2714
2715 if (myh != NULL)
2716 {
9b485d32 2717 /* We've already seen this guy. */
252b5132 2718 free (tmp_name);
a4fd1a8e 2719 return myh;
252b5132
RH
2720 }
2721
57e8b36a
NC
2722 /* The only trick here is using hash_table->arm_glue_size as the value.
2723 Even though the section isn't allocated yet, this is where we will be
2724 putting it. */
14a793b2 2725 bh = NULL;
dc810e39
AM
2726 val = globals->arm_glue_size + 1;
2727 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2728 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2729 NULL, TRUE, FALSE, &bh);
252b5132 2730
b7693d02
DJ
2731 myh = (struct elf_link_hash_entry *) bh;
2732 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2733 myh->forced_local = 1;
2734
252b5132
RH
2735 free (tmp_name);
2736
27e55c4d
PB
2737 if (link_info->shared || globals->root.is_relocatable_executable
2738 || globals->pic_veneer)
2f475487 2739 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB
2740 else if (globals->use_blx)
2741 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 2742 else
2f475487
AM
2743 size = ARM2THUMB_STATIC_GLUE_SIZE;
2744
2745 s->size += size;
2746 globals->arm_glue_size += size;
252b5132 2747
a4fd1a8e 2748 return myh;
252b5132
RH
2749}
2750
2751static void
57e8b36a
NC
2752record_thumb_to_arm_glue (struct bfd_link_info *link_info,
2753 struct elf_link_hash_entry *h)
252b5132
RH
2754{
2755 const char *name = h->root.root.string;
63b0f745 2756 asection *s;
252b5132
RH
2757 char *tmp_name;
2758 struct elf_link_hash_entry *myh;
14a793b2 2759 struct bfd_link_hash_entry *bh;
252b5132 2760 struct elf32_arm_link_hash_table *hash_table;
dc810e39 2761 bfd_vma val;
252b5132
RH
2762
2763 hash_table = elf32_arm_hash_table (link_info);
2764
2765 BFD_ASSERT (hash_table != NULL);
2766 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2767
2768 s = bfd_get_section_by_name
2769 (hash_table->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2770
2771 BFD_ASSERT (s != NULL);
2772
57e8b36a
NC
2773 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2774 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2775
2776 BFD_ASSERT (tmp_name);
2777
2778 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2779
2780 myh = elf_link_hash_lookup
b34976b6 2781 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
2782
2783 if (myh != NULL)
2784 {
9b485d32 2785 /* We've already seen this guy. */
252b5132 2786 free (tmp_name);
9b485d32 2787 return;
252b5132
RH
2788 }
2789
14a793b2 2790 bh = NULL;
dc810e39
AM
2791 val = hash_table->thumb_glue_size + 1;
2792 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2793 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2794 NULL, TRUE, FALSE, &bh);
252b5132 2795
9b485d32 2796 /* If we mark it 'Thumb', the disassembler will do a better job. */
14a793b2 2797 myh = (struct elf_link_hash_entry *) bh;
b7693d02
DJ
2798 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
2799 myh->forced_local = 1;
252b5132
RH
2800
2801 free (tmp_name);
2802
252b5132
RH
2803#define CHANGE_TO_ARM "__%s_change_to_arm"
2804#define BACK_FROM_ARM "__%s_back_from_arm"
2805
9b485d32 2806 /* Allocate another symbol to mark where we switch to Arm mode. */
57e8b36a
NC
2807 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2808 + strlen (CHANGE_TO_ARM) + 1);
252b5132
RH
2809
2810 BFD_ASSERT (tmp_name);
2811
2812 sprintf (tmp_name, CHANGE_TO_ARM, name);
2813
14a793b2 2814 bh = NULL;
dc810e39
AM
2815 val = hash_table->thumb_glue_size + 4,
2816 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2817 tmp_name, BSF_LOCAL, s, val,
b34976b6 2818 NULL, TRUE, FALSE, &bh);
252b5132
RH
2819
2820 free (tmp_name);
2821
2f475487 2822 s->size += THUMB2ARM_GLUE_SIZE;
252b5132
RH
2823 hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
2824
2825 return;
2826}
2827
c7b8f16e
JB
2828
2829/* Add an entry to the code/data map for section SEC. */
2830
2831static void
2832elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
2833{
2834 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
2835 unsigned int newidx;
2836
2837 if (sec_data->map == NULL)
2838 {
2839 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
2840 sec_data->mapcount = 0;
2841 sec_data->mapsize = 1;
2842 }
2843
2844 newidx = sec_data->mapcount++;
2845
2846 if (sec_data->mapcount > sec_data->mapsize)
2847 {
2848 sec_data->mapsize *= 2;
2849 sec_data->map = bfd_realloc (sec_data->map, sec_data->mapsize
2850 * sizeof (elf32_arm_section_map));
2851 }
2852
2853 sec_data->map[newidx].vma = vma;
2854 sec_data->map[newidx].type = type;
2855}
2856
2857
2858/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
2859 veneers are handled for now. */
2860
2861static bfd_vma
2862record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
2863 elf32_vfp11_erratum_list *branch,
2864 bfd *branch_bfd,
2865 asection *branch_sec,
2866 unsigned int offset)
2867{
2868 asection *s;
2869 struct elf32_arm_link_hash_table *hash_table;
2870 char *tmp_name;
2871 struct elf_link_hash_entry *myh;
2872 struct bfd_link_hash_entry *bh;
2873 bfd_vma val;
2874 struct _arm_elf_section_data *sec_data;
2875 int errcount;
2876 elf32_vfp11_erratum_list *newerr;
2877
2878 hash_table = elf32_arm_hash_table (link_info);
2879
2880 BFD_ASSERT (hash_table != NULL);
2881 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2882
2883 s = bfd_get_section_by_name
2884 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2885
2886 sec_data = elf32_arm_section_data (s);
2887
2888 BFD_ASSERT (s != NULL);
2889
2890 tmp_name = bfd_malloc ((bfd_size_type) strlen
2891 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
2892
2893 BFD_ASSERT (tmp_name);
2894
2895 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
2896 hash_table->num_vfp11_fixes);
2897
2898 myh = elf_link_hash_lookup
2899 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
2900
2901 BFD_ASSERT (myh == NULL);
2902
2903 bh = NULL;
2904 val = hash_table->vfp11_erratum_glue_size;
2905 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2906 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
2907 NULL, TRUE, FALSE, &bh);
2908
2909 myh = (struct elf_link_hash_entry *) bh;
2910 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2911 myh->forced_local = 1;
2912
2913 /* Link veneer back to calling location. */
2914 errcount = ++(sec_data->erratumcount);
2915 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
2916
2917 newerr->type = VFP11_ERRATUM_ARM_VENEER;
2918 newerr->vma = -1;
2919 newerr->u.v.branch = branch;
2920 newerr->u.v.id = hash_table->num_vfp11_fixes;
2921 branch->u.b.veneer = newerr;
2922
2923 newerr->next = sec_data->erratumlist;
2924 sec_data->erratumlist = newerr;
2925
2926 /* A symbol for the return from the veneer. */
2927 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
2928 hash_table->num_vfp11_fixes);
2929
2930 myh = elf_link_hash_lookup
2931 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
2932
2933 if (myh != NULL)
2934 abort ();
2935
2936 bh = NULL;
2937 val = offset + 4;
2938 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
2939 branch_sec, val, NULL, TRUE, FALSE, &bh);
2940
2941 myh = (struct elf_link_hash_entry *) bh;
2942 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2943 myh->forced_local = 1;
2944
2945 free (tmp_name);
2946
2947 /* Generate a mapping symbol for the veneer section, and explicitly add an
2948 entry for that symbol to the code/data map for the section. */
2949 if (hash_table->vfp11_erratum_glue_size == 0)
2950 {
2951 bh = NULL;
2952 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
2953 ever requires this erratum fix. */
2954 _bfd_generic_link_add_one_symbol (link_info,
2955 hash_table->bfd_of_glue_owner, "$a",
2956 BSF_LOCAL, s, 0, NULL,
2957 TRUE, FALSE, &bh);
2958
2959 myh = (struct elf_link_hash_entry *) bh;
2960 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
2961 myh->forced_local = 1;
2962
2963 /* The elf32_arm_init_maps function only cares about symbols from input
2964 BFDs. We must make a note of this generated mapping symbol
2965 ourselves so that code byteswapping works properly in
2966 elf32_arm_write_section. */
2967 elf32_arm_section_map_add (s, 'a', 0);
2968 }
2969
2970 s->size += VFP11_ERRATUM_VENEER_SIZE;
2971 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
2972 hash_table->num_vfp11_fixes++;
2973
2974 /* The offset of the veneer. */
2975 return val;
2976}
2977
8afb0e02
NC
2978/* Add the glue sections to ABFD. This function is called from the
2979 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 2980
b34976b6 2981bfd_boolean
57e8b36a
NC
2982bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
2983 struct bfd_link_info *info)
252b5132 2984{
252b5132
RH
2985 flagword flags;
2986 asection *sec;
2987
8afb0e02
NC
2988 /* If we are only performing a partial
2989 link do not bother adding the glue. */
1049f94e 2990 if (info->relocatable)
b34976b6 2991 return TRUE;
252b5132 2992
252b5132
RH
2993 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
2994
2995 if (sec == NULL)
2996 {
57db232e
NC
2997 /* Note: we do not include the flag SEC_LINKER_CREATED, as this
2998 will prevent elf_link_input_bfd() from processing the contents
2999 of this section. */
2f475487
AM
3000 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3001 | SEC_CODE | SEC_READONLY);
252b5132 3002
3496cb2a
L
3003 sec = bfd_make_section_with_flags (abfd,
3004 ARM2THUMB_GLUE_SECTION_NAME,
3005 flags);
252b5132
RH
3006
3007 if (sec == NULL
252b5132 3008 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3009 return FALSE;
9a5aca8c 3010
57db232e
NC
3011 /* Set the gc mark to prevent the section from being removed by garbage
3012 collection, despite the fact that no relocs refer to this section. */
3013 sec->gc_mark = 1;
252b5132
RH
3014 }
3015
3016 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
3017
3018 if (sec == NULL)
3019 {
2f475487
AM
3020 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3021 | SEC_CODE | SEC_READONLY);
252b5132 3022
3496cb2a
L
3023 sec = bfd_make_section_with_flags (abfd,
3024 THUMB2ARM_GLUE_SECTION_NAME,
3025 flags);
252b5132
RH
3026
3027 if (sec == NULL
252b5132 3028 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3029 return FALSE;
9a5aca8c 3030
57db232e 3031 sec->gc_mark = 1;
252b5132
RH
3032 }
3033
c7b8f16e
JB
3034 sec = bfd_get_section_by_name (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME);
3035
3036 if (sec == NULL)
3037 {
3038 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3039 | SEC_CODE | SEC_READONLY);
3040
3041 sec = bfd_make_section_with_flags (abfd,
3042 VFP11_ERRATUM_VENEER_SECTION_NAME,
3043 flags);
3044
3045 if (sec == NULL
3046 || !bfd_set_section_alignment (abfd, sec, 2))
3047 return FALSE;
3048
3049 sec->gc_mark = 1;
3050 }
3051
b34976b6 3052 return TRUE;
8afb0e02
NC
3053}
3054
3055/* Select a BFD to be used to hold the sections used by the glue code.
3056 This function is called from the linker scripts in ld/emultempl/
3057 {armelf/pe}.em */
3058
b34976b6 3059bfd_boolean
57e8b36a 3060bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC
3061{
3062 struct elf32_arm_link_hash_table *globals;
3063
3064 /* If we are only performing a partial link
3065 do not bother getting a bfd to hold the glue. */
1049f94e 3066 if (info->relocatable)
b34976b6 3067 return TRUE;
8afb0e02 3068
b7693d02
DJ
3069 /* Make sure we don't attach the glue sections to a dynamic object. */
3070 BFD_ASSERT (!(abfd->flags & DYNAMIC));
3071
8afb0e02
NC
3072 globals = elf32_arm_hash_table (info);
3073
3074 BFD_ASSERT (globals != NULL);
3075
3076 if (globals->bfd_of_glue_owner != NULL)
b34976b6 3077 return TRUE;
8afb0e02 3078
252b5132
RH
3079 /* Save the bfd for later use. */
3080 globals->bfd_of_glue_owner = abfd;
cedb70c5 3081
b34976b6 3082 return TRUE;
252b5132
RH
3083}
3084
39b41c9c
PB
3085static void check_use_blx(struct elf32_arm_link_hash_table *globals)
3086{
104d59d1
JM
3087 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3088 Tag_CPU_arch) > 2)
39b41c9c
PB
3089 globals->use_blx = 1;
3090}
3091
b34976b6 3092bfd_boolean
57e8b36a 3093bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 3094 struct bfd_link_info *link_info)
252b5132
RH
3095{
3096 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 3097 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH
3098 Elf_Internal_Rela *irel, *irelend;
3099 bfd_byte *contents = NULL;
252b5132
RH
3100
3101 asection *sec;
3102 struct elf32_arm_link_hash_table *globals;
3103
3104 /* If we are only performing a partial link do not bother
3105 to construct any glue. */
1049f94e 3106 if (link_info->relocatable)
b34976b6 3107 return TRUE;
252b5132
RH
3108
3109 /* Here we have a bfd that is to be included on the link. We have a hook
3110 to do reloc rummaging, before section sizes are nailed down. */
252b5132 3111 globals = elf32_arm_hash_table (link_info);
39b41c9c 3112 check_use_blx (globals);
252b5132
RH
3113
3114 BFD_ASSERT (globals != NULL);
3115 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
3116
d504ffc8 3117 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 3118 {
d003868e
AM
3119 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
3120 abfd);
e489d0ae
PB
3121 return FALSE;
3122 }
f21f3fe0 3123
252b5132
RH
3124 /* Rummage around all the relocs and map the glue vectors. */
3125 sec = abfd->sections;
3126
3127 if (sec == NULL)
b34976b6 3128 return TRUE;
252b5132
RH
3129
3130 for (; sec != NULL; sec = sec->next)
3131 {
3132 if (sec->reloc_count == 0)
3133 continue;
3134
2f475487
AM
3135 if ((sec->flags & SEC_EXCLUDE) != 0)
3136 continue;
3137
252b5132 3138 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
252b5132 3139
9b485d32 3140 /* Load the relocs. */
6cdc0ccc 3141 internal_relocs
57e8b36a 3142 = _bfd_elf_link_read_relocs (abfd, sec, (void *) NULL,
45d6a902 3143 (Elf_Internal_Rela *) NULL, FALSE);
252b5132 3144
6cdc0ccc
AM
3145 if (internal_relocs == NULL)
3146 goto error_return;
252b5132 3147
6cdc0ccc
AM
3148 irelend = internal_relocs + sec->reloc_count;
3149 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH
3150 {
3151 long r_type;
3152 unsigned long r_index;
252b5132
RH
3153
3154 struct elf_link_hash_entry *h;
3155
3156 r_type = ELF32_R_TYPE (irel->r_info);
3157 r_index = ELF32_R_SYM (irel->r_info);
3158
9b485d32 3159 /* These are the only relocation types we care about. */
ba96a88f 3160 if ( r_type != R_ARM_PC24
b7693d02 3161 && r_type != R_ARM_PLT32
5b5bb741
PB
3162 && r_type != R_ARM_CALL
3163 && r_type != R_ARM_JUMP24
c19d1205 3164 && r_type != R_ARM_THM_CALL)
252b5132
RH
3165 continue;
3166
3167 /* Get the section contents if we haven't done so already. */
3168 if (contents == NULL)
3169 {
3170 /* Get cached copy if it exists. */
3171 if (elf_section_data (sec)->this_hdr.contents != NULL)
3172 contents = elf_section_data (sec)->this_hdr.contents;
3173 else
3174 {
3175 /* Go get them off disk. */
57e8b36a 3176 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH
3177 goto error_return;
3178 }
3179 }
3180
a7c10850 3181 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH
3182 h = NULL;
3183
9b485d32 3184 /* We don't care about local symbols. */
252b5132
RH
3185 if (r_index < symtab_hdr->sh_info)
3186 continue;
3187
9b485d32 3188 /* This is an external symbol. */
252b5132
RH
3189 r_index -= symtab_hdr->sh_info;
3190 h = (struct elf_link_hash_entry *)
3191 elf_sym_hashes (abfd)[r_index];
3192
3193 /* If the relocation is against a static symbol it must be within
3194 the current section and so cannot be a cross ARM/Thumb relocation. */
3195 if (h == NULL)
3196 continue;
3197
d504ffc8
DJ
3198 /* If the call will go through a PLT entry then we do not need
3199 glue. */
3200 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ
3201 continue;
3202
252b5132
RH
3203 switch (r_type)
3204 {
3205 case R_ARM_PC24:
c6596c5e 3206 case R_ARM_PLT32:
5b5bb741
PB
3207 case R_ARM_CALL:
3208 case R_ARM_JUMP24:
252b5132 3209 /* This one is a call from arm code. We need to look up
2f0ca46a 3210 the target of the call. If it is a thumb target, we
252b5132 3211 insert glue. */
39b41c9c
PB
3212 if (ELF_ST_TYPE(h->type) == STT_ARM_TFUNC
3213 && !(r_type == R_ARM_CALL && globals->use_blx))
252b5132
RH
3214 record_arm_to_thumb_glue (link_info, h);
3215 break;
3216
c19d1205 3217 case R_ARM_THM_CALL:
f21f3fe0 3218 /* This one is a call from thumb code. We look
2f0ca46a 3219 up the target of the call. If it is not a thumb
bcbdc74c 3220 target, we insert glue. */
5ab79981
PB
3221 if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC && !globals->use_blx
3222 && h->root.type != bfd_link_hash_undefweak)
252b5132
RH
3223 record_thumb_to_arm_glue (link_info, h);
3224 break;
3225
3226 default:
c6596c5e 3227 abort ();
252b5132
RH
3228 }
3229 }
6cdc0ccc
AM
3230
3231 if (contents != NULL
3232 && elf_section_data (sec)->this_hdr.contents != contents)
3233 free (contents);
3234 contents = NULL;
3235
3236 if (internal_relocs != NULL
3237 && elf_section_data (sec)->relocs != internal_relocs)
3238 free (internal_relocs);
3239 internal_relocs = NULL;
252b5132
RH
3240 }
3241
b34976b6 3242 return TRUE;
9a5aca8c 3243
252b5132 3244error_return:
6cdc0ccc
AM
3245 if (contents != NULL
3246 && elf_section_data (sec)->this_hdr.contents != contents)
3247 free (contents);
3248 if (internal_relocs != NULL
3249 && elf_section_data (sec)->relocs != internal_relocs)
3250 free (internal_relocs);
9a5aca8c 3251
b34976b6 3252 return FALSE;
252b5132 3253}
7e392df6 3254#endif
252b5132 3255
eb043451 3256
c7b8f16e
JB
3257/* Initialise maps of ARM/Thumb/data for input BFDs. */
3258
3259void
3260bfd_elf32_arm_init_maps (bfd *abfd)
3261{
3262 Elf_Internal_Sym *isymbuf;
3263 Elf_Internal_Shdr *hdr;
3264 unsigned int i, localsyms;
3265
3266 if ((abfd->flags & DYNAMIC) != 0)
3267 return;
3268
3269 hdr = &elf_tdata (abfd)->symtab_hdr;
3270 localsyms = hdr->sh_info;
3271
3272 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
3273 should contain the number of local symbols, which should come before any
3274 global symbols. Mapping symbols are always local. */
3275 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
3276 NULL);
3277
3278 /* No internal symbols read? Skip this BFD. */
3279 if (isymbuf == NULL)
3280 return;
3281
3282 for (i = 0; i < localsyms; i++)
3283 {
3284 Elf_Internal_Sym *isym = &isymbuf[i];
3285 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3286 const char *name;
3287
3288 if (sec != NULL
3289 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
3290 {
3291 name = bfd_elf_string_from_elf_section (abfd,
3292 hdr->sh_link, isym->st_name);
3293
3294 if (bfd_is_arm_special_symbol_name (name,
3295 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
3296 elf32_arm_section_map_add (sec, name[1], isym->st_value);
3297 }
3298 }
3299}
3300
3301
3302void
3303bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
3304{
3305 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 3306 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
c7b8f16e
JB
3307
3308 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
3309 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
3310 {
3311 switch (globals->vfp11_fix)
3312 {
3313 case BFD_ARM_VFP11_FIX_DEFAULT:
3314 case BFD_ARM_VFP11_FIX_NONE:
3315 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3316 break;
3317
3318 default:
3319 /* Give a warning, but do as the user requests anyway. */
3320 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
3321 "workaround is not necessary for target architecture"), obfd);
3322 }
3323 }
3324 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
3325 /* For earlier architectures, we might need the workaround, but do not
3326 enable it by default. If users is running with broken hardware, they
3327 must enable the erratum fix explicitly. */
3328 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3329}
3330
3331
3332enum bfd_arm_vfp11_pipe {
3333 VFP11_FMAC,
3334 VFP11_LS,
3335 VFP11_DS,
3336 VFP11_BAD
3337};
3338
3339/* Return a VFP register number. This is encoded as RX:X for single-precision
3340 registers, or X:RX for double-precision registers, where RX is the group of
3341 four bits in the instruction encoding and X is the single extension bit.
3342 RX and X fields are specified using their lowest (starting) bit. The return
3343 value is:
3344
3345 0...31: single-precision registers s0...s31
3346 32...63: double-precision registers d0...d31.
3347
3348 Although X should be zero for VFP11 (encoding d0...d15 only), we might
3349 encounter VFP3 instructions, so we allow the full range for DP registers. */
3350
3351static unsigned int
3352bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
3353 unsigned int x)
3354{
3355 if (is_double)
3356 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
3357 else
3358 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
3359}
3360
3361/* Set bits in *WMASK according to a register number REG as encoded by
3362 bfd_arm_vfp11_regno(). Ignore d16-d31. */
3363
3364static void
3365bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
3366{
3367 if (reg < 32)
3368 *wmask |= 1 << reg;
3369 else if (reg < 48)
3370 *wmask |= 3 << ((reg - 32) * 2);
3371}
3372
3373/* Return TRUE if WMASK overwrites anything in REGS. */
3374
3375static bfd_boolean
3376bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
3377{
3378 int i;
3379
3380 for (i = 0; i < numregs; i++)
3381 {
3382 unsigned int reg = regs[i];
3383
3384 if (reg < 32 && (wmask & (1 << reg)) != 0)
3385 return TRUE;
3386
3387 reg -= 32;
3388
3389 if (reg >= 16)
3390 continue;
3391
3392 if ((wmask & (3 << (reg * 2))) != 0)
3393 return TRUE;
3394 }
3395
3396 return FALSE;
3397}
3398
3399/* In this function, we're interested in two things: finding input registers
3400 for VFP data-processing instructions, and finding the set of registers which
3401 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
3402 hold the written set, so FLDM etc. are easy to deal with (we're only
3403 interested in 32 SP registers or 16 dp registers, due to the VFP version
3404 implemented by the chip in question). DP registers are marked by setting
3405 both SP registers in the write mask). */
3406
3407static enum bfd_arm_vfp11_pipe
3408bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
3409 int *numregs)
3410{
3411 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
3412 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
3413
3414 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
3415 {
3416 unsigned int pqrs;
3417 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3418 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3419
3420 pqrs = ((insn & 0x00800000) >> 20)
3421 | ((insn & 0x00300000) >> 19)
3422 | ((insn & 0x00000040) >> 6);
3423
3424 switch (pqrs)
3425 {
3426 case 0: /* fmac[sd]. */
3427 case 1: /* fnmac[sd]. */
3428 case 2: /* fmsc[sd]. */
3429 case 3: /* fnmsc[sd]. */
3430 pipe = VFP11_FMAC;
3431 bfd_arm_vfp11_write_mask (destmask, fd);
3432 regs[0] = fd;
3433 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3434 regs[2] = fm;
3435 *numregs = 3;
3436 break;
3437
3438 case 4: /* fmul[sd]. */
3439 case 5: /* fnmul[sd]. */
3440 case 6: /* fadd[sd]. */
3441 case 7: /* fsub[sd]. */
3442 pipe = VFP11_FMAC;
3443 goto vfp_binop;
3444
3445 case 8: /* fdiv[sd]. */
3446 pipe = VFP11_DS;
3447 vfp_binop:
3448 bfd_arm_vfp11_write_mask (destmask, fd);
3449 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3450 regs[1] = fm;
3451 *numregs = 2;
3452 break;
3453
3454 case 15: /* extended opcode. */
3455 {
3456 unsigned int extn = ((insn >> 15) & 0x1e)
3457 | ((insn >> 7) & 1);
3458
3459 switch (extn)
3460 {
3461 case 0: /* fcpy[sd]. */
3462 case 1: /* fabs[sd]. */
3463 case 2: /* fneg[sd]. */
3464 case 8: /* fcmp[sd]. */
3465 case 9: /* fcmpe[sd]. */
3466 case 10: /* fcmpz[sd]. */
3467 case 11: /* fcmpez[sd]. */
3468 case 16: /* fuito[sd]. */
3469 case 17: /* fsito[sd]. */
3470 case 24: /* ftoui[sd]. */
3471 case 25: /* ftouiz[sd]. */
3472 case 26: /* ftosi[sd]. */
3473 case 27: /* ftosiz[sd]. */
3474 /* These instructions will not bounce due to underflow. */
3475 *numregs = 0;
3476 pipe = VFP11_FMAC;
3477 break;
3478
3479 case 3: /* fsqrt[sd]. */
3480 /* fsqrt cannot underflow, but it can (perhaps) overwrite
3481 registers to cause the erratum in previous instructions. */
3482 bfd_arm_vfp11_write_mask (destmask, fd);
3483 pipe = VFP11_DS;
3484 break;
3485
3486 case 15: /* fcvt{ds,sd}. */
3487 {
3488 int rnum = 0;
3489
3490 bfd_arm_vfp11_write_mask (destmask, fd);
3491
3492 /* Only FCVTSD can underflow. */
3493 if ((insn & 0x100) != 0)
3494 regs[rnum++] = fm;
3495
3496 *numregs = rnum;
3497
3498 pipe = VFP11_FMAC;
3499 }
3500 break;
3501
3502 default:
3503 return VFP11_BAD;
3504 }
3505 }
3506 break;
3507
3508 default:
3509 return VFP11_BAD;
3510 }
3511 }
3512 /* Two-register transfer. */
3513 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
3514 {
3515 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3516
3517 if ((insn & 0x100000) == 0)
3518 {
3519 if (is_double)
3520 bfd_arm_vfp11_write_mask (destmask, fm);
3521 else
3522 {
3523 bfd_arm_vfp11_write_mask (destmask, fm);
3524 bfd_arm_vfp11_write_mask (destmask, fm + 1);
3525 }
3526 }
3527
3528 pipe = VFP11_LS;
3529 }
3530 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
3531 {
3532 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3533 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
3534
3535 switch (puw)
3536 {
3537 case 0: /* Two-reg transfer. We should catch these above. */
3538 abort ();
3539
3540 case 2: /* fldm[sdx]. */
3541 case 3:
3542 case 5:
3543 {
3544 unsigned int i, offset = insn & 0xff;
3545
3546 if (is_double)
3547 offset >>= 1;
3548
3549 for (i = fd; i < fd + offset; i++)
3550 bfd_arm_vfp11_write_mask (destmask, i);
3551 }
3552 break;
3553
3554 case 4: /* fld[sd]. */
3555 case 6:
3556 bfd_arm_vfp11_write_mask (destmask, fd);
3557 break;
3558
3559 default:
3560 return VFP11_BAD;
3561 }
3562
3563 pipe = VFP11_LS;
3564 }
3565 /* Single-register transfer. Note L==0. */
3566 else if ((insn & 0x0f100e10) == 0x0e000a10)
3567 {
3568 unsigned int opcode = (insn >> 21) & 7;
3569 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
3570
3571 switch (opcode)
3572 {
3573 case 0: /* fmsr/fmdlr. */
3574 case 1: /* fmdhr. */
3575 /* Mark fmdhr and fmdlr as writing to the whole of the DP
3576 destination register. I don't know if this is exactly right,
3577 but it is the conservative choice. */
3578 bfd_arm_vfp11_write_mask (destmask, fn);
3579 break;
3580
3581 case 7: /* fmxr. */
3582 break;
3583 }
3584
3585 pipe = VFP11_LS;
3586 }
3587
3588 return pipe;
3589}
3590
3591
3592static int elf32_arm_compare_mapping (const void * a, const void * b);
3593
3594
3595/* Look for potentially-troublesome code sequences which might trigger the
3596 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
3597 (available from ARM) for details of the erratum. A short version is
3598 described in ld.texinfo. */
3599
3600bfd_boolean
3601bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
3602{
3603 asection *sec;
3604 bfd_byte *contents = NULL;
3605 int state = 0;
3606 int regs[3], numregs = 0;
3607 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
3608 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
3609
3610 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
3611 The states transition as follows:
3612
3613 0 -> 1 (vector) or 0 -> 2 (scalar)
3614 A VFP FMAC-pipeline instruction has been seen. Fill
3615 regs[0]..regs[numregs-1] with its input operands. Remember this
3616 instruction in 'first_fmac'.
3617
3618 1 -> 2
3619 Any instruction, except for a VFP instruction which overwrites
3620 regs[*].
3621
3622 1 -> 3 [ -> 0 ] or
3623 2 -> 3 [ -> 0 ]
3624 A VFP instruction has been seen which overwrites any of regs[*].
3625 We must make a veneer! Reset state to 0 before examining next
3626 instruction.
3627
3628 2 -> 0
3629 If we fail to match anything in state 2, reset to state 0 and reset
3630 the instruction pointer to the instruction after 'first_fmac'.
3631
3632 If the VFP11 vector mode is in use, there must be at least two unrelated
3633 instructions between anti-dependent VFP11 instructions to properly avoid
3634 triggering the erratum, hence the use of the extra state 1.
3635 */
3636
3637 /* If we are only performing a partial link do not bother
3638 to construct any glue. */
3639 if (link_info->relocatable)
3640 return TRUE;
3641
3642 /* We should have chosen a fix type by the time we get here. */
3643 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
3644
3645 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
3646 return TRUE;
2e6030b9
MS
3647
3648 /* Skip if this bfd does not correspond to an ELF image. */
3649 if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
3650 return TRUE;
c7b8f16e
JB
3651
3652 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3653 {
3654 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
3655 struct _arm_elf_section_data *sec_data;
3656
3657 /* If we don't have executable progbits, we're not interested in this
3658 section. Also skip if section is to be excluded. */
3659 if (elf_section_type (sec) != SHT_PROGBITS
3660 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
3661 || (sec->flags & SEC_EXCLUDE) != 0
3662 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
3663 continue;
3664
3665 sec_data = elf32_arm_section_data (sec);
3666
3667 if (sec_data->mapcount == 0)
3668 continue;
3669
3670 if (elf_section_data (sec)->this_hdr.contents != NULL)
3671 contents = elf_section_data (sec)->this_hdr.contents;
3672 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
3673 goto error_return;
3674
3675 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
3676 elf32_arm_compare_mapping);
3677
3678 for (span = 0; span < sec_data->mapcount; span++)
3679 {
3680 unsigned int span_start = sec_data->map[span].vma;
3681 unsigned int span_end = (span == sec_data->mapcount - 1)
3682 ? sec->size : sec_data->map[span + 1].vma;
3683 char span_type = sec_data->map[span].type;
3684
3685 /* FIXME: Only ARM mode is supported at present. We may need to
3686 support Thumb-2 mode also at some point. */
3687 if (span_type != 'a')
3688 continue;
3689
3690 for (i = span_start; i < span_end;)
3691 {
3692 unsigned int next_i = i + 4;
3693 unsigned int insn = bfd_big_endian (abfd)
3694 ? (contents[i] << 24)
3695 | (contents[i + 1] << 16)
3696 | (contents[i + 2] << 8)
3697 | contents[i + 3]
3698 : (contents[i + 3] << 24)
3699 | (contents[i + 2] << 16)
3700 | (contents[i + 1] << 8)
3701 | contents[i];
3702 unsigned int writemask = 0;
3703 enum bfd_arm_vfp11_pipe pipe;
3704
3705 switch (state)
3706 {
3707 case 0:
3708 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
3709 &numregs);
3710 /* I'm assuming the VFP11 erratum can trigger with denorm
3711 operands on either the FMAC or the DS pipeline. This might
3712 lead to slightly overenthusiastic veneer insertion. */
3713 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
3714 {
3715 state = use_vector ? 1 : 2;
3716 first_fmac = i;
3717 veneer_of_insn = insn;
3718 }
3719 break;
3720
3721 case 1:
3722 {
3723 int other_regs[3], other_numregs;
3724 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3725 other_regs,
3726 &other_numregs);
3727 if (pipe != VFP11_BAD
3728 && bfd_arm_vfp11_antidependency (writemask, regs,
3729 numregs))
3730 state = 3;
3731 else
3732 state = 2;
3733 }
3734 break;
3735
3736 case 2:
3737 {
3738 int other_regs[3], other_numregs;
3739 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3740 other_regs,
3741 &other_numregs);
3742 if (pipe != VFP11_BAD
3743 && bfd_arm_vfp11_antidependency (writemask, regs,
3744 numregs))
3745 state = 3;
3746 else
3747 {
3748 state = 0;
3749 next_i = first_fmac + 4;
3750 }
3751 }
3752 break;
3753
3754 case 3:
3755 abort (); /* Should be unreachable. */
3756 }
3757
3758 if (state == 3)
3759 {
3760 elf32_vfp11_erratum_list *newerr
3761 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3762 int errcount;
3763
3764 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
3765
3766 newerr->u.b.vfp_insn = veneer_of_insn;
3767
3768 switch (span_type)
3769 {
3770 case 'a':
3771 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
3772 break;
3773
3774 default:
3775 abort ();
3776 }
3777
3778 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
3779 first_fmac);
3780
3781 newerr->vma = -1;
3782
3783 newerr->next = sec_data->erratumlist;
3784 sec_data->erratumlist = newerr;
3785
3786 state = 0;
3787 }
3788
3789 i = next_i;
3790 }
3791 }
3792
3793 if (contents != NULL
3794 && elf_section_data (sec)->this_hdr.contents != contents)
3795 free (contents);
3796 contents = NULL;
3797 }
3798
3799 return TRUE;
3800
3801error_return:
3802 if (contents != NULL
3803 && elf_section_data (sec)->this_hdr.contents != contents)
3804 free (contents);
3805
3806 return FALSE;
3807}
3808
3809/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
3810 after sections have been laid out, using specially-named symbols. */
3811
3812void
3813bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
3814 struct bfd_link_info *link_info)
3815{
3816 asection *sec;
3817 struct elf32_arm_link_hash_table *globals;
3818 char *tmp_name;
3819
3820 if (link_info->relocatable)
3821 return;
2e6030b9
MS
3822
3823 /* Skip if this bfd does not correspond to an ELF image. */
3824 if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
3825 return;
3826
c7b8f16e
JB
3827 globals = elf32_arm_hash_table (link_info);
3828
3829 tmp_name = bfd_malloc ((bfd_size_type) strlen
3830 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
3831
3832 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3833 {
3834 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
3835 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
3836
3837 for (; errnode != NULL; errnode = errnode->next)
3838 {
3839 struct elf_link_hash_entry *myh;
3840 bfd_vma vma;
3841
3842 switch (errnode->type)
3843 {
3844 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
3845 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
3846 /* Find veneer symbol. */
3847 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3848 errnode->u.b.veneer->u.v.id);
3849
3850 myh = elf_link_hash_lookup
3851 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3852
3853 if (myh == NULL)
3854 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3855 "`%s'"), abfd, tmp_name);
3856
3857 vma = myh->root.u.def.section->output_section->vma
3858 + myh->root.u.def.section->output_offset
3859 + myh->root.u.def.value;
3860
3861 errnode->u.b.veneer->vma = vma;
3862 break;
3863
3864 case VFP11_ERRATUM_ARM_VENEER:
3865 case VFP11_ERRATUM_THUMB_VENEER:
3866 /* Find return location. */
3867 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
3868 errnode->u.v.id);
3869
3870 myh = elf_link_hash_lookup
3871 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3872
3873 if (myh == NULL)
3874 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3875 "`%s'"), abfd, tmp_name);
3876
3877 vma = myh->root.u.def.section->output_section->vma
3878 + myh->root.u.def.section->output_offset
3879 + myh->root.u.def.value;
3880
3881 errnode->u.v.branch->vma = vma;
3882 break;
3883
3884 default:
3885 abort ();
3886 }
3887 }
3888 }
3889
3890 free (tmp_name);
3891}
3892
3893
eb043451
PB
3894/* Set target relocation values needed during linking. */
3895
3896void
bf21ed78
MS
3897bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
3898 struct bfd_link_info *link_info,
eb043451 3899 int target1_is_rel,
319850b4 3900 char * target2_type,
33bfe774 3901 int fix_v4bx,
c7b8f16e 3902 int use_blx,
bf21ed78 3903 bfd_arm_vfp11_fix vfp11_fix,
27e55c4d 3904 int no_enum_warn, int pic_veneer)
eb043451
PB
3905{
3906 struct elf32_arm_link_hash_table *globals;
3907
3908 globals = elf32_arm_hash_table (link_info);
3909
3910 globals->target1_is_rel = target1_is_rel;
3911 if (strcmp (target2_type, "rel") == 0)
3912 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB
3913 else if (strcmp (target2_type, "abs") == 0)
3914 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB
3915 else if (strcmp (target2_type, "got-rel") == 0)
3916 globals->target2_reloc = R_ARM_GOT_PREL;
3917 else
3918 {
3919 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
3920 target2_type);
3921 }
319850b4 3922 globals->fix_v4bx = fix_v4bx;
33bfe774 3923 globals->use_blx |= use_blx;
c7b8f16e 3924 globals->vfp11_fix = vfp11_fix;
27e55c4d 3925 globals->pic_veneer = pic_veneer;
bf21ed78
MS
3926
3927 elf32_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
eb043451 3928}
eb043451 3929
252b5132
RH
3930/* The thumb form of a long branch is a bit finicky, because the offset
3931 encoding is split over two fields, each in it's own instruction. They
f21f3fe0 3932 can occur in any order. So given a thumb form of long branch, and an
252b5132 3933 offset, insert the offset into the thumb branch and return finished
f21f3fe0 3934 instruction.
252b5132 3935
f21f3fe0 3936 It takes two thumb instructions to encode the target address. Each has
4cc11e76 3937 11 bits to invest. The upper 11 bits are stored in one (identified by
f21f3fe0
UD
3938 H-0.. see below), the lower 11 bits are stored in the other (identified
3939 by H-1).
252b5132 3940
f21f3fe0 3941 Combine together and shifted left by 1 (it's a half word address) and
252b5132
RH
3942 there you have it.
3943
3944 Op: 1111 = F,
3945 H-0, upper address-0 = 000
3946 Op: 1111 = F,
3947 H-1, lower address-0 = 800
3948
f21f3fe0 3949 They can be ordered either way, but the arm tools I've seen always put
252b5132
RH
3950 the lower one first. It probably doesn't matter. krk@cygnus.com
3951
3952 XXX: Actually the order does matter. The second instruction (H-1)
3953 moves the computed address into the PC, so it must be the second one
3954 in the sequence. The problem, however is that whilst little endian code
3955 stores the instructions in HI then LOW order, big endian code does the
dfc5f959 3956 reverse. nickc@cygnus.com. */
252b5132 3957
dfc5f959
NC
3958#define LOW_HI_ORDER 0xF800F000
3959#define HI_LOW_ORDER 0xF000F800
252b5132
RH
3960
3961static insn32
57e8b36a 3962insert_thumb_branch (insn32 br_insn, int rel_off)
252b5132
RH
3963{
3964 unsigned int low_bits;
3965 unsigned int high_bits;
3966
252b5132
RH
3967 BFD_ASSERT ((rel_off & 1) != 1);
3968
dfc5f959
NC
3969 rel_off >>= 1; /* Half word aligned address. */
3970 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
3971 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
252b5132
RH
3972
3973 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
3974 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
3975 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
3976 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
3977 else
9b485d32 3978 /* FIXME: abort is probably not the right call. krk@cygnus.com */
57e8b36a 3979 abort (); /* Error - not a valid branch instruction form. */
252b5132 3980
252b5132
RH
3981 return br_insn;
3982}
3983
52ab56c2
PB
3984
3985/* Store an Arm insn into an output section not processed by
3986 elf32_arm_write_section. */
3987
3988static void
3989put_arm_insn (struct elf32_arm_link_hash_table *htab,
3990 bfd * output_bfd, bfd_vma val, void * ptr)
3991{
3992 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3993 bfd_putl32 (val, ptr);
3994 else
3995 bfd_putb32 (val, ptr);
3996}
3997
3998
3999/* Store a 16-bit Thumb insn into an output section not processed by
4000 elf32_arm_write_section. */
4001
4002static void
4003put_thumb_insn (struct elf32_arm_link_hash_table *htab,
4004 bfd * output_bfd, bfd_vma val, void * ptr)
4005{
4006 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4007 bfd_putl16 (val, ptr);
4008 else
4009 bfd_putb16 (val, ptr);
4010}
4011
4012
9b485d32
NC
4013/* Thumb code calling an ARM function. */
4014
252b5132 4015static int
57e8b36a
NC
4016elf32_thumb_to_arm_stub (struct bfd_link_info * info,
4017 const char * name,
4018 bfd * input_bfd,
4019 bfd * output_bfd,
4020 asection * input_section,
4021 bfd_byte * hit_data,
4022 asection * sym_sec,
4023 bfd_vma offset,
4024 bfd_signed_vma addend,
f2a9dd69
DJ
4025 bfd_vma val,
4026 char **error_message)
252b5132 4027{
bcbdc74c 4028 asection * s = 0;
dc810e39 4029 bfd_vma my_offset;
252b5132
RH
4030 unsigned long int tmp;
4031 long int ret_offset;
bcbdc74c
NC
4032 struct elf_link_hash_entry * myh;
4033 struct elf32_arm_link_hash_table * globals;
252b5132 4034
f2a9dd69 4035 myh = find_thumb_glue (info, name, error_message);
252b5132 4036 if (myh == NULL)
b34976b6 4037 return FALSE;
252b5132
RH
4038
4039 globals = elf32_arm_hash_table (info);
4040
4041 BFD_ASSERT (globals != NULL);
4042 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4043
4044 my_offset = myh->root.u.def.value;
4045
4046 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4047 THUMB2ARM_GLUE_SECTION_NAME);
4048
4049 BFD_ASSERT (s != NULL);
4050 BFD_ASSERT (s->contents != NULL);
4051 BFD_ASSERT (s->output_section != NULL);
4052
4053 if ((my_offset & 0x01) == 0x01)
4054 {
4055 if (sym_sec != NULL
4056 && sym_sec->owner != NULL
4057 && !INTERWORK_FLAG (sym_sec->owner))
4058 {
8f615d07 4059 (*_bfd_error_handler)
d003868e
AM
4060 (_("%B(%s): warning: interworking not enabled.\n"
4061 " first occurrence: %B: thumb call to arm"),
4062 sym_sec->owner, input_bfd, name);
252b5132 4063
b34976b6 4064 return FALSE;
252b5132
RH
4065 }
4066
4067 --my_offset;
4068 myh->root.u.def.value = my_offset;
4069
52ab56c2
PB
4070 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
4071 s->contents + my_offset);
252b5132 4072
52ab56c2
PB
4073 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
4074 s->contents + my_offset + 2);
252b5132
RH
4075
4076 ret_offset =
9b485d32
NC
4077 /* Address of destination of the stub. */
4078 ((bfd_signed_vma) val)
252b5132 4079 - ((bfd_signed_vma)
57e8b36a
NC
4080 /* Offset from the start of the current section
4081 to the start of the stubs. */
9b485d32
NC
4082 (s->output_offset
4083 /* Offset of the start of this stub from the start of the stubs. */
4084 + my_offset
4085 /* Address of the start of the current section. */
4086 + s->output_section->vma)
4087 /* The branch instruction is 4 bytes into the stub. */
4088 + 4
4089 /* ARM branches work from the pc of the instruction + 8. */
4090 + 8);
252b5132 4091
52ab56c2
PB
4092 put_arm_insn (globals, output_bfd,
4093 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
4094 s->contents + my_offset + 4);
252b5132
RH
4095 }
4096
4097 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
4098
427bfd90
NC
4099 /* Now go back and fix up the original BL insn to point to here. */
4100 ret_offset =
4101 /* Address of where the stub is located. */
4102 (s->output_section->vma + s->output_offset + my_offset)
4103 /* Address of where the BL is located. */
57e8b36a
NC
4104 - (input_section->output_section->vma + input_section->output_offset
4105 + offset)
427bfd90
NC
4106 /* Addend in the relocation. */
4107 - addend
4108 /* Biassing for PC-relative addressing. */
4109 - 8;
252b5132
RH
4110
4111 tmp = bfd_get_32 (input_bfd, hit_data
4112 - input_section->vma);
4113
4114 bfd_put_32 (output_bfd,
dc810e39 4115 (bfd_vma) insert_thumb_branch (tmp, ret_offset),
252b5132
RH
4116 hit_data - input_section->vma);
4117
b34976b6 4118 return TRUE;
252b5132
RH
4119}
4120
a4fd1a8e 4121/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 4122
a4fd1a8e
PB
4123static struct elf_link_hash_entry *
4124elf32_arm_create_thumb_stub (struct bfd_link_info * info,
4125 const char * name,
4126 bfd * input_bfd,
4127 bfd * output_bfd,
4128 asection * sym_sec,
4129 bfd_vma val,
f2a9dd69
DJ
4130 asection *s,
4131 char **error_message)
252b5132 4132{
dc810e39 4133 bfd_vma my_offset;
252b5132 4134 long int ret_offset;
bcbdc74c
NC
4135 struct elf_link_hash_entry * myh;
4136 struct elf32_arm_link_hash_table * globals;
252b5132 4137
f2a9dd69 4138 myh = find_arm_glue (info, name, error_message);
252b5132 4139 if (myh == NULL)
a4fd1a8e 4140 return NULL;
252b5132
RH
4141
4142 globals = elf32_arm_hash_table (info);
4143
4144 BFD_ASSERT (globals != NULL);
4145 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4146
4147 my_offset = myh->root.u.def.value;
252b5132
RH
4148
4149 if ((my_offset & 0x01) == 0x01)
4150 {
4151 if (sym_sec != NULL
4152 && sym_sec->owner != NULL
4153 && !INTERWORK_FLAG (sym_sec->owner))
4154 {
8f615d07 4155 (*_bfd_error_handler)
d003868e
AM
4156 (_("%B(%s): warning: interworking not enabled.\n"
4157 " first occurrence: %B: arm call to thumb"),
4158 sym_sec->owner, input_bfd, name);
252b5132 4159 }
9b485d32 4160
252b5132
RH
4161 --my_offset;
4162 myh->root.u.def.value = my_offset;
4163
27e55c4d
PB
4164 if (info->shared || globals->root.is_relocatable_executable
4165 || globals->pic_veneer)
8f6277f5
PB
4166 {
4167 /* For relocatable objects we can't use absolute addresses,
4168 so construct the address from a relative offset. */
4169 /* TODO: If the offset is small it's probably worth
4170 constructing the address with adds. */
52ab56c2
PB
4171 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
4172 s->contents + my_offset);
4173 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
4174 s->contents + my_offset + 4);
4175 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
4176 s->contents + my_offset + 8);
8f6277f5
PB
4177 /* Adjust the offset by 4 for the position of the add,
4178 and 8 for the pipeline offset. */
4179 ret_offset = (val - (s->output_offset
4180 + s->output_section->vma
4181 + my_offset + 12))
4182 | 1;
4183 bfd_put_32 (output_bfd, ret_offset,
4184 s->contents + my_offset + 12);
4185 }
26079076
PB
4186 else if (globals->use_blx)
4187 {
4188 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
4189 s->contents + my_offset);
4190
4191 /* It's a thumb address. Add the low order bit. */
4192 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
4193 s->contents + my_offset + 4);
4194 }
8f6277f5
PB
4195 else
4196 {
52ab56c2
PB
4197 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
4198 s->contents + my_offset);
252b5132 4199
52ab56c2
PB
4200 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
4201 s->contents + my_offset + 4);
252b5132 4202
8f6277f5
PB
4203 /* It's a thumb address. Add the low order bit. */
4204 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
4205 s->contents + my_offset + 8);
4206 }
252b5132
RH
4207 }
4208
4209 BFD_ASSERT (my_offset <= globals->arm_glue_size);
4210
a4fd1a8e
PB
4211 return myh;
4212}
4213
4214/* Arm code calling a Thumb function. */
4215
4216static int
4217elf32_arm_to_thumb_stub (struct bfd_link_info * info,
4218 const char * name,
4219 bfd * input_bfd,
4220 bfd * output_bfd,
4221 asection * input_section,
4222 bfd_byte * hit_data,
4223 asection * sym_sec,
4224 bfd_vma offset,
4225 bfd_signed_vma addend,
f2a9dd69
DJ
4226 bfd_vma val,
4227 char **error_message)
a4fd1a8e
PB
4228{
4229 unsigned long int tmp;
4230 bfd_vma my_offset;
4231 asection * s;
4232 long int ret_offset;
4233 struct elf_link_hash_entry * myh;
4234 struct elf32_arm_link_hash_table * globals;
4235
4236 globals = elf32_arm_hash_table (info);
4237
4238 BFD_ASSERT (globals != NULL);
4239 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4240
4241 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4242 ARM2THUMB_GLUE_SECTION_NAME);
4243 BFD_ASSERT (s != NULL);
4244 BFD_ASSERT (s->contents != NULL);
4245 BFD_ASSERT (s->output_section != NULL);
4246
4247 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 4248 sym_sec, val, s, error_message);
a4fd1a8e
PB
4249 if (!myh)
4250 return FALSE;
4251
4252 my_offset = myh->root.u.def.value;
252b5132
RH
4253 tmp = bfd_get_32 (input_bfd, hit_data);
4254 tmp = tmp & 0xFF000000;
4255
9b485d32 4256 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM
4257 ret_offset = (s->output_offset
4258 + my_offset
4259 + s->output_section->vma
4260 - (input_section->output_offset
4261 + input_section->output_section->vma
4262 + offset + addend)
4263 - 8);
9a5aca8c 4264
252b5132
RH
4265 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
4266
dc810e39 4267 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 4268
b34976b6 4269 return TRUE;
252b5132
RH
4270}
4271
a4fd1a8e
PB
4272/* Populate Arm stub for an exported Thumb function. */
4273
4274static bfd_boolean
4275elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
4276{
4277 struct bfd_link_info * info = (struct bfd_link_info *) inf;
4278 asection * s;
4279 struct elf_link_hash_entry * myh;
4280 struct elf32_arm_link_hash_entry *eh;
4281 struct elf32_arm_link_hash_table * globals;
4282 asection *sec;
4283 bfd_vma val;
f2a9dd69 4284 char *error_message;
a4fd1a8e
PB
4285
4286 eh = elf32_arm_hash_entry(h);
4287 /* Allocate stubs for exported Thumb functions on v4t. */
4288 if (eh->export_glue == NULL)
4289 return TRUE;
4290
4291 globals = elf32_arm_hash_table (info);
4292
4293 BFD_ASSERT (globals != NULL);
4294 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4295
4296 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4297 ARM2THUMB_GLUE_SECTION_NAME);
4298 BFD_ASSERT (s != NULL);
4299 BFD_ASSERT (s->contents != NULL);
4300 BFD_ASSERT (s->output_section != NULL);
4301
4302 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB
4303
4304 BFD_ASSERT (sec->output_section != NULL);
4305
a4fd1a8e
PB
4306 val = eh->export_glue->root.u.def.value + sec->output_offset
4307 + sec->output_section->vma;
4308 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
4309 h->root.u.def.section->owner,
f2a9dd69
DJ
4310 globals->obfd, sec, val, s,
4311 &error_message);
a4fd1a8e
PB
4312 BFD_ASSERT (myh);
4313 return TRUE;
4314}
4315
4316/* Generate Arm stubs for exported Thumb symbols. */
4317static void
4318elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
4319 struct bfd_link_info *link_info)
4320{
4321 struct elf32_arm_link_hash_table * globals;
4322
4323 if (!link_info)
4324 return;
4325
4326 globals = elf32_arm_hash_table (link_info);
84c08195
PB
4327 /* If blx is available then exported Thumb symbols are OK and there is
4328 nothing to do. */
a4fd1a8e
PB
4329 if (globals->use_blx)
4330 return;
4331
4332 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
4333 link_info);
4334}
4335
eb043451
PB
4336/* Some relocations map to different relocations depending on the
4337 target. Return the real relocation. */
4338static int
4339arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
4340 int r_type)
4341{
4342 switch (r_type)
4343 {
4344 case R_ARM_TARGET1:
4345 if (globals->target1_is_rel)
4346 return R_ARM_REL32;
4347 else
4348 return R_ARM_ABS32;
4349
4350 case R_ARM_TARGET2:
4351 return globals->target2_reloc;
4352
4353 default:
4354 return r_type;
4355 }
4356}
eb043451 4357
ba93b8ac
DJ
4358/* Return the base VMA address which should be subtracted from real addresses
4359 when resolving @dtpoff relocation.
4360 This is PT_TLS segment p_vaddr. */
4361
4362static bfd_vma
4363dtpoff_base (struct bfd_link_info *info)
4364{
4365 /* If tls_sec is NULL, we should have signalled an error already. */
4366 if (elf_hash_table (info)->tls_sec == NULL)
4367 return 0;
4368 return elf_hash_table (info)->tls_sec->vma;
4369}
4370
4371/* Return the relocation value for @tpoff relocation
4372 if STT_TLS virtual address is ADDRESS. */
4373
4374static bfd_vma
4375tpoff (struct bfd_link_info *info, bfd_vma address)
4376{
4377 struct elf_link_hash_table *htab = elf_hash_table (info);
4378 bfd_vma base;
4379
4380 /* If tls_sec is NULL, we should have signalled an error already. */
4381 if (htab->tls_sec == NULL)
4382 return 0;
4383 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
4384 return address - htab->tls_sec->vma + base;
4385}
4386
00a97672
RS
4387/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
4388 VALUE is the relocation value. */
4389
4390static bfd_reloc_status_type
4391elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
4392{
4393 if (value > 0xfff)
4394 return bfd_reloc_overflow;
4395
4396 value |= bfd_get_32 (abfd, data) & 0xfffff000;
4397 bfd_put_32 (abfd, value, data);
4398 return bfd_reloc_ok;
4399}
4400
4962c51a
MS
4401/* For a given value of n, calculate the value of G_n as required to
4402 deal with group relocations. We return it in the form of an
4403 encoded constant-and-rotation, together with the final residual. If n is
4404 specified as less than zero, then final_residual is filled with the
4405 input value and no further action is performed. */
4406
4407static bfd_vma
4408calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
4409{
4410 int current_n;
4411 bfd_vma g_n;
4412 bfd_vma encoded_g_n = 0;
4413 bfd_vma residual = value; /* Also known as Y_n. */
4414
4415 for (current_n = 0; current_n <= n; current_n++)
4416 {
4417 int shift;
4418
4419 /* Calculate which part of the value to mask. */
4420 if (residual == 0)
4421 shift = 0;
4422 else
4423 {
4424 int msb;
4425
4426 /* Determine the most significant bit in the residual and
4427 align the resulting value to a 2-bit boundary. */
4428 for (msb = 30; msb >= 0; msb -= 2)
4429 if (residual & (3 << msb))
4430 break;
4431
4432 /* The desired shift is now (msb - 6), or zero, whichever
4433 is the greater. */
4434 shift = msb - 6;
4435 if (shift < 0)
4436 shift = 0;
4437 }
4438
4439 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
4440 g_n = residual & (0xff << shift);
4441 encoded_g_n = (g_n >> shift)
4442 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4443
4444 /* Calculate the residual for the next time around. */
4445 residual &= ~g_n;
4446 }
4447
4448 *final_residual = residual;
4449
4450 return encoded_g_n;
4451}
4452
4453/* Given an ARM instruction, determine whether it is an ADD or a SUB.
4454 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
4455static int
4456identify_add_or_sub(bfd_vma insn)
4457{
4458 int opcode = insn & 0x1e00000;
4459
4460 if (opcode == 1 << 23) /* ADD */
4461 return 1;
4462
4463 if (opcode == 1 << 22) /* SUB */
4464 return -1;
4465
4466 return 0;
4467}
4468
e95de063
MS
4469/* Determine if we're dealing with a Thumb-2 object. */
4470
4471static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
4472{
104d59d1
JM
4473 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4474 Tag_CPU_arch);
e95de063
MS
4475 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
4476}
4477
252b5132 4478/* Perform a relocation as part of a final link. */
9b485d32 4479
252b5132 4480static bfd_reloc_status_type
57e8b36a
NC
4481elf32_arm_final_link_relocate (reloc_howto_type * howto,
4482 bfd * input_bfd,
4483 bfd * output_bfd,
4484 asection * input_section,
4485 bfd_byte * contents,
4486 Elf_Internal_Rela * rel,
4487 bfd_vma value,
4488 struct bfd_link_info * info,
4489 asection * sym_sec,
4490 const char * sym_name,
4491 int sym_flags,
0945cdfd 4492 struct elf_link_hash_entry * h,
f2a9dd69
DJ
4493 bfd_boolean * unresolved_reloc_p,
4494 char **error_message)
252b5132
RH
4495{
4496 unsigned long r_type = howto->type;
4497 unsigned long r_symndx;
4498 bfd_byte * hit_data = contents + rel->r_offset;
4499 bfd * dynobj = NULL;
4500 Elf_Internal_Shdr * symtab_hdr;
4501 struct elf_link_hash_entry ** sym_hashes;
4502 bfd_vma * local_got_offsets;
4503 asection * sgot = NULL;
4504 asection * splt = NULL;
4505 asection * sreloc = NULL;
252b5132 4506 bfd_vma addend;
ba96a88f
NC
4507 bfd_signed_vma signed_addend;
4508 struct elf32_arm_link_hash_table * globals;
f21f3fe0 4509
9c504268
PB
4510 globals = elf32_arm_hash_table (info);
4511
9c504268
PB
4512 /* Some relocation type map to different relocations depending on the
4513 target. We pick the right one here. */
eb043451
PB
4514 r_type = arm_real_reloc_type (globals, r_type);
4515 if (r_type != howto->type)
4516 howto = elf32_arm_howto_from_type (r_type);
9c504268 4517
cac15327
NC
4518 /* If the start address has been set, then set the EF_ARM_HASENTRY
4519 flag. Setting this more than once is redundant, but the cost is
4520 not too high, and it keeps the code simple.
99e4ae17 4521
cac15327
NC
4522 The test is done here, rather than somewhere else, because the
4523 start address is only set just before the final link commences.
4524
4525 Note - if the user deliberately sets a start address of 0, the
4526 flag will not be set. */
4527 if (bfd_get_start_address (output_bfd) != 0)
4528 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 4529
252b5132
RH
4530 dynobj = elf_hash_table (info)->dynobj;
4531 if (dynobj)
4532 {
4533 sgot = bfd_get_section_by_name (dynobj, ".got");
4534 splt = bfd_get_section_by_name (dynobj, ".plt");
4535 }
4536 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
4537 sym_hashes = elf_sym_hashes (input_bfd);
4538 local_got_offsets = elf_local_got_offsets (input_bfd);
4539 r_symndx = ELF32_R_SYM (rel->r_info);
4540
4e7fd91e 4541 if (globals->use_rel)
ba96a88f 4542 {
4e7fd91e
PB
4543 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
4544
4545 if (addend & ((howto->src_mask + 1) >> 1))
4546 {
4547 signed_addend = -1;
4548 signed_addend &= ~ howto->src_mask;
4549 signed_addend |= addend;
4550 }
4551 else
4552 signed_addend = addend;
ba96a88f
NC
4553 }
4554 else
4e7fd91e 4555 addend = signed_addend = rel->r_addend;
f21f3fe0 4556
252b5132
RH
4557 switch (r_type)
4558 {
4559 case R_ARM_NONE:
28a094c2
DJ
4560 /* We don't need to find a value for this symbol. It's just a
4561 marker. */
4562 *unresolved_reloc_p = FALSE;
252b5132
RH
4563 return bfd_reloc_ok;
4564
00a97672
RS
4565 case R_ARM_ABS12:
4566 if (!globals->vxworks_p)
4567 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4568
252b5132
RH
4569 case R_ARM_PC24:
4570 case R_ARM_ABS32:
bb224fc3 4571 case R_ARM_ABS32_NOI:
252b5132 4572 case R_ARM_REL32:
bb224fc3 4573 case R_ARM_REL32_NOI:
5b5bb741
PB
4574 case R_ARM_CALL:
4575 case R_ARM_JUMP24:
dfc5f959 4576 case R_ARM_XPC25:
eb043451 4577 case R_ARM_PREL31:
7359ea65 4578 case R_ARM_PLT32:
7359ea65
DJ
4579 /* Handle relocations which should use the PLT entry. ABS32/REL32
4580 will use the symbol's value, which may point to a PLT entry, but we
4581 don't need to handle that here. If we created a PLT entry, all
4582 branches in this object should go to it. */
bb224fc3
MS
4583 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
4584 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
7359ea65 4585 && h != NULL
c84cd8ee 4586 && splt != NULL
7359ea65
DJ
4587 && h->plt.offset != (bfd_vma) -1)
4588 {
c84cd8ee
DJ
4589 /* If we've created a .plt section, and assigned a PLT entry to
4590 this function, it should not be known to bind locally. If
4591 it were, we would have cleared the PLT entry. */
7359ea65
DJ
4592 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
4593
4594 value = (splt->output_section->vma
4595 + splt->output_offset
4596 + h->plt.offset);
0945cdfd 4597 *unresolved_reloc_p = FALSE;
7359ea65
DJ
4598 return _bfd_final_link_relocate (howto, input_bfd, input_section,
4599 contents, rel->r_offset, value,
00a97672 4600 rel->r_addend);
7359ea65
DJ
4601 }
4602
67687978
PB
4603 /* When generating a shared object or relocatable executable, these
4604 relocations are copied into the output file to be resolved at
4605 run time. */
4606 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 4607 && (input_section->flags & SEC_ALLOC)
bb224fc3 4608 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 4609 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ
4610 && (h == NULL
4611 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
4612 || h->root.type != bfd_link_hash_undefweak)
4613 && r_type != R_ARM_PC24
5b5bb741
PB
4614 && r_type != R_ARM_CALL
4615 && r_type != R_ARM_JUMP24
ee06dc07 4616 && r_type != R_ARM_PREL31
7359ea65 4617 && r_type != R_ARM_PLT32)
252b5132 4618 {
947216bf
AM
4619 Elf_Internal_Rela outrel;
4620 bfd_byte *loc;
b34976b6 4621 bfd_boolean skip, relocate;
f21f3fe0 4622
0945cdfd
DJ
4623 *unresolved_reloc_p = FALSE;
4624
252b5132
RH
4625 if (sreloc == NULL)
4626 {
4627 const char * name;
f21f3fe0 4628
252b5132
RH
4629 name = (bfd_elf_string_from_elf_section
4630 (input_bfd,
4631 elf_elfheader (input_bfd)->e_shstrndx,
4632 elf_section_data (input_section)->rel_hdr.sh_name));
4633 if (name == NULL)
4634 return bfd_reloc_notsupported;
f21f3fe0 4635
00a97672 4636 BFD_ASSERT (reloc_section_p (globals, name, input_section));
f21f3fe0 4637
252b5132
RH
4638 sreloc = bfd_get_section_by_name (dynobj, name);
4639 BFD_ASSERT (sreloc != NULL);
4640 }
f21f3fe0 4641
b34976b6
AM
4642 skip = FALSE;
4643 relocate = FALSE;
f21f3fe0 4644
00a97672 4645 outrel.r_addend = addend;
c629eae0
JJ
4646 outrel.r_offset =
4647 _bfd_elf_section_offset (output_bfd, info, input_section,
4648 rel->r_offset);
4649 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 4650 skip = TRUE;
0bb2d96a 4651 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 4652 skip = TRUE, relocate = TRUE;
252b5132
RH
4653 outrel.r_offset += (input_section->output_section->vma
4654 + input_section->output_offset);
f21f3fe0 4655
252b5132 4656 if (skip)
0bb2d96a 4657 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB
4658 else if (h != NULL
4659 && h->dynindx != -1
7359ea65 4660 && (!info->shared
5e681ec4 4661 || !info->symbolic
f5385ebf 4662 || !h->def_regular))
5e681ec4 4663 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH
4664 else
4665 {
a16385dc
MM
4666 int symbol;
4667
5e681ec4 4668 /* This symbol is local, or marked to become local. */
b7693d02
DJ
4669 if (sym_flags == STT_ARM_TFUNC)
4670 value |= 1;
a16385dc 4671 if (globals->symbian_p)
6366ff1e 4672 {
74541ad4
AM
4673 asection *osec;
4674
6366ff1e
MM
4675 /* On Symbian OS, the data segment and text segement
4676 can be relocated independently. Therefore, we
4677 must indicate the segment to which this
4678 relocation is relative. The BPABI allows us to
4679 use any symbol in the right segment; we just use
4680 the section symbol as it is convenient. (We
4681 cannot use the symbol given by "h" directly as it
74541ad4
AM
4682 will not appear in the dynamic symbol table.)
4683
4684 Note that the dynamic linker ignores the section
4685 symbol value, so we don't subtract osec->vma
4686 from the emitted reloc addend. */
10dbd1f3 4687 if (sym_sec)
74541ad4 4688 osec = sym_sec->output_section;
10dbd1f3 4689 else
74541ad4
AM
4690 osec = input_section->output_section;
4691 symbol = elf_section_data (osec)->dynindx;
4692 if (symbol == 0)
4693 {
4694 struct elf_link_hash_table *htab = elf_hash_table (info);
4695
4696 if ((osec->flags & SEC_READONLY) == 0
4697 && htab->data_index_section != NULL)
4698 osec = htab->data_index_section;
4699 else
4700 osec = htab->text_index_section;
4701 symbol = elf_section_data (osec)->dynindx;
4702 }
6366ff1e
MM
4703 BFD_ASSERT (symbol != 0);
4704 }
a16385dc
MM
4705 else
4706 /* On SVR4-ish systems, the dynamic loader cannot
4707 relocate the text and data segments independently,
4708 so the symbol does not matter. */
4709 symbol = 0;
4710 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS
4711 if (globals->use_rel)
4712 relocate = TRUE;
4713 else
4714 outrel.r_addend += value;
252b5132 4715 }
f21f3fe0 4716
947216bf 4717 loc = sreloc->contents;
00a97672
RS
4718 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
4719 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 4720
f21f3fe0 4721 /* If this reloc is against an external symbol, we do not want to
252b5132 4722 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 4723 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH
4724 if (! relocate)
4725 return bfd_reloc_ok;
9a5aca8c 4726
f21f3fe0 4727 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH
4728 contents, rel->r_offset, value,
4729 (bfd_vma) 0);
4730 }
4731 else switch (r_type)
4732 {
00a97672
RS
4733 case R_ARM_ABS12:
4734 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4735
dfc5f959 4736 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB
4737 case R_ARM_CALL:
4738 case R_ARM_JUMP24:
dfc5f959 4739 case R_ARM_PC24: /* Arm B/BL instruction */
7359ea65 4740 case R_ARM_PLT32:
dfc5f959 4741 if (r_type == R_ARM_XPC25)
252b5132 4742 {
dfc5f959
NC
4743 /* Check for Arm calling Arm function. */
4744 /* FIXME: Should we translate the instruction into a BL
4745 instruction instead ? */
4746 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM
4747 (*_bfd_error_handler)
4748 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
4749 input_bfd,
4750 h ? h->root.root.string : "(local)");
dfc5f959 4751 }
39b41c9c 4752 else if (r_type != R_ARM_CALL || !globals->use_blx)
dfc5f959
NC
4753 {
4754 /* Check for Arm calling Thumb function. */
4755 if (sym_flags == STT_ARM_TFUNC)
4756 {
f2a9dd69
DJ
4757 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
4758 output_bfd, input_section,
4759 hit_data, sym_sec, rel->r_offset,
4760 signed_addend, value,
4761 error_message))
4762 return bfd_reloc_ok;
4763 else
4764 return bfd_reloc_dangerous;
dfc5f959 4765 }
252b5132 4766 }
ba96a88f 4767
dea514f5
PB
4768 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
4769 where:
4770 S is the address of the symbol in the relocation.
4771 P is address of the instruction being relocated.
4772 A is the addend (extracted from the instruction) in bytes.
4773
4774 S is held in 'value'.
4775 P is the base address of the section containing the
4776 instruction plus the offset of the reloc into that
4777 section, ie:
4778 (input_section->output_section->vma +
4779 input_section->output_offset +
4780 rel->r_offset).
4781 A is the addend, converted into bytes, ie:
4782 (signed_addend * 4)
4783
4784 Note: None of these operations have knowledge of the pipeline
4785 size of the processor, thus it is up to the assembler to
4786 encode this information into the addend. */
4787 value -= (input_section->output_section->vma
4788 + input_section->output_offset);
4789 value -= rel->r_offset;
4e7fd91e
PB
4790 if (globals->use_rel)
4791 value += (signed_addend << howto->size);
4792 else
4793 /* RELA addends do not have to be adjusted by howto->size. */
4794 value += signed_addend;
23080146 4795
dcb5e6e6
NC
4796 signed_addend = value;
4797 signed_addend >>= howto->rightshift;
9a5aca8c 4798
5ab79981
PB
4799 /* A branch to an undefined weak symbol is turned into a jump to
4800 the next instruction. */
4801 if (h && h->root.type == bfd_link_hash_undefweak)
4802 {
4803 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
4804 | 0x0affffff;
4805 }
4806 else
59f2c4e7 4807 {
9b485d32 4808 /* Perform a signed range check. */
dcb5e6e6 4809 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC
4810 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
4811 return bfd_reloc_overflow;
9a5aca8c 4812
5ab79981 4813 addend = (value & 2);
39b41c9c 4814
5ab79981
PB
4815 value = (signed_addend & howto->dst_mask)
4816 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 4817
5ab79981 4818 /* Set the H bit in the BLX instruction. */
39b41c9c 4819 if (sym_flags == STT_ARM_TFUNC)
39b41c9c 4820 {
5ab79981
PB
4821 if (addend)
4822 value |= (1 << 24);
4823 else
4824 value &= ~(bfd_vma)(1 << 24);
4825 }
4826 if (r_type == R_ARM_CALL)
4827 {
4828 /* Select the correct instruction (BL or BLX). */
4829 if (sym_flags == STT_ARM_TFUNC)
4830 value |= (1 << 28);
4831 else
4832 {
4833 value &= ~(bfd_vma)(1 << 28);
4834 value |= (1 << 24);
4835 }
39b41c9c
PB
4836 }
4837 }
252b5132 4838 break;
f21f3fe0 4839
252b5132
RH
4840 case R_ARM_ABS32:
4841 value += addend;
4842 if (sym_flags == STT_ARM_TFUNC)
4843 value |= 1;
4844 break;
f21f3fe0 4845
bb224fc3
MS
4846 case R_ARM_ABS32_NOI:
4847 value += addend;
4848 break;
4849
252b5132 4850 case R_ARM_REL32:
a8bc6c78
PB
4851 value += addend;
4852 if (sym_flags == STT_ARM_TFUNC)
4853 value |= 1;
252b5132 4854 value -= (input_section->output_section->vma
62efb346 4855 + input_section->output_offset + rel->r_offset);
252b5132 4856 break;
eb043451 4857
bb224fc3
MS
4858 case R_ARM_REL32_NOI:
4859 value += addend;
4860 value -= (input_section->output_section->vma
4861 + input_section->output_offset + rel->r_offset);
4862 break;
4863
eb043451
PB
4864 case R_ARM_PREL31:
4865 value -= (input_section->output_section->vma
4866 + input_section->output_offset + rel->r_offset);
4867 value += signed_addend;
4868 if (! h || h->root.type != bfd_link_hash_undefweak)
4869 {
4870 /* Check for overflow */
4871 if ((value ^ (value >> 1)) & (1 << 30))
4872 return bfd_reloc_overflow;
4873 }
4874 value &= 0x7fffffff;
4875 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
4876 if (sym_flags == STT_ARM_TFUNC)
4877 value |= 1;
4878 break;
252b5132 4879 }
f21f3fe0 4880
252b5132
RH
4881 bfd_put_32 (input_bfd, value, hit_data);
4882 return bfd_reloc_ok;
4883
4884 case R_ARM_ABS8:
4885 value += addend;
4886 if ((long) value > 0x7f || (long) value < -0x80)
4887 return bfd_reloc_overflow;
4888
4889 bfd_put_8 (input_bfd, value, hit_data);
4890 return bfd_reloc_ok;
4891
4892 case R_ARM_ABS16:
4893 value += addend;
4894
4895 if ((long) value > 0x7fff || (long) value < -0x8000)
4896 return bfd_reloc_overflow;
4897
4898 bfd_put_16 (input_bfd, value, hit_data);
4899 return bfd_reloc_ok;
4900
252b5132 4901 case R_ARM_THM_ABS5:
9b485d32 4902 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB
4903 if (globals->use_rel)
4904 {
4905 /* Need to refetch addend. */
4906 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
4907 /* ??? Need to determine shift amount from operand size. */
4908 addend >>= howto->rightshift;
4909 }
252b5132
RH
4910 value += addend;
4911
4912 /* ??? Isn't value unsigned? */
4913 if ((long) value > 0x1f || (long) value < -0x10)
4914 return bfd_reloc_overflow;
4915
4916 /* ??? Value needs to be properly shifted into place first. */
4917 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
4918 bfd_put_16 (input_bfd, value, hit_data);
4919 return bfd_reloc_ok;
4920
2cab6cc3
MS
4921 case R_ARM_THM_ALU_PREL_11_0:
4922 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
4923 {
4924 bfd_vma insn;
4925 bfd_signed_vma relocation;
4926
4927 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
4928 | bfd_get_16 (input_bfd, hit_data + 2);
4929
4930 if (globals->use_rel)
4931 {
4932 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
4933 | ((insn & (1 << 26)) >> 15);
4934 if (insn & 0xf00000)
4935 signed_addend = -signed_addend;
4936 }
4937
4938 relocation = value + signed_addend;
4939 relocation -= (input_section->output_section->vma
4940 + input_section->output_offset
4941 + rel->r_offset);
4942
4943 value = abs (relocation);
4944
4945 if (value >= 0x1000)
4946 return bfd_reloc_overflow;
4947
4948 insn = (insn & 0xfb0f8f00) | (value & 0xff)
4949 | ((value & 0x700) << 4)
4950 | ((value & 0x800) << 15);
4951 if (relocation < 0)
4952 insn |= 0xa00000;
4953
4954 bfd_put_16 (input_bfd, insn >> 16, hit_data);
4955 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
4956
4957 return bfd_reloc_ok;
4958 }
4959
4960 case R_ARM_THM_PC12:
4961 /* Corresponds to: ldr.w reg, [pc, #offset]. */
4962 {
4963 bfd_vma insn;
4964 bfd_signed_vma relocation;
4965
4966 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
4967 | bfd_get_16 (input_bfd, hit_data + 2);
4968
4969 if (globals->use_rel)
4970 {
4971 signed_addend = insn & 0xfff;
4972 if (!(insn & (1 << 23)))
4973 signed_addend = -signed_addend;
4974 }
4975
4976 relocation = value + signed_addend;
4977 relocation -= (input_section->output_section->vma
4978 + input_section->output_offset
4979 + rel->r_offset);
4980
4981 value = abs (relocation);
4982
4983 if (value >= 0x1000)
4984 return bfd_reloc_overflow;
4985
4986 insn = (insn & 0xff7ff000) | value;
4987 if (relocation >= 0)
4988 insn |= (1 << 23);
4989
4990 bfd_put_16 (input_bfd, insn >> 16, hit_data);
4991 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
4992
4993 return bfd_reloc_ok;
4994 }
4995
dfc5f959 4996 case R_ARM_THM_XPC22:
c19d1205 4997 case R_ARM_THM_CALL:
dfc5f959 4998 /* Thumb BL (branch long instruction). */
252b5132 4999 {
b34976b6 5000 bfd_vma relocation;
e95de063 5001 bfd_vma reloc_sign;
b34976b6
AM
5002 bfd_boolean overflow = FALSE;
5003 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5004 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS
5005 bfd_signed_vma reloc_signed_max;
5006 bfd_signed_vma reloc_signed_min;
b34976b6 5007 bfd_vma check;
252b5132 5008 bfd_signed_vma signed_check;
e95de063
MS
5009 int bitsize;
5010 int thumb2 = using_thumb2 (globals);
252b5132 5011
5ab79981
PB
5012 /* A branch to an undefined weak symbol is turned into a jump to
5013 the next instruction. */
5014 if (h && h->root.type == bfd_link_hash_undefweak)
5015 {
5016 bfd_put_16 (input_bfd, 0xe000, hit_data);
5017 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
5018 return bfd_reloc_ok;
5019 }
5020
e95de063
MS
5021 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
5022 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB
5023 if (globals->use_rel)
5024 {
e95de063
MS
5025 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
5026 bfd_vma upper = upper_insn & 0x3ff;
5027 bfd_vma lower = lower_insn & 0x7ff;
5028 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
5029 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
5030 bfd_vma i1 = j1 ^ s ? 0 : 1;
5031 bfd_vma i2 = j2 ^ s ? 0 : 1;
5032
5033 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
5034 /* Sign extend. */
5035 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
5036
4e7fd91e
PB
5037 signed_addend = addend;
5038 }
cb1afa5c 5039
dfc5f959
NC
5040 if (r_type == R_ARM_THM_XPC22)
5041 {
5042 /* Check for Thumb to Thumb call. */
5043 /* FIXME: Should we translate the instruction into a BL
5044 instruction instead ? */
5045 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM
5046 (*_bfd_error_handler)
5047 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
5048 input_bfd,
5049 h ? h->root.root.string : "(local)");
dfc5f959
NC
5050 }
5051 else
252b5132 5052 {
dfc5f959
NC
5053 /* If it is not a call to Thumb, assume call to Arm.
5054 If it is a call relative to a section name, then it is not a
b7693d02
DJ
5055 function call at all, but rather a long jump. Calls through
5056 the PLT do not require stubs. */
5057 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
5058 && (h == NULL || splt == NULL
5059 || h->plt.offset == (bfd_vma) -1))
dfc5f959 5060 {
39b41c9c
PB
5061 if (globals->use_blx)
5062 {
5063 /* Convert BL to BLX. */
5064 lower_insn = (lower_insn & ~0x1000) | 0x0800;
5065 }
5066 else if (elf32_thumb_to_arm_stub
dfc5f959 5067 (info, sym_name, input_bfd, output_bfd, input_section,
f2a9dd69
DJ
5068 hit_data, sym_sec, rel->r_offset, signed_addend, value,
5069 error_message))
dfc5f959
NC
5070 return bfd_reloc_ok;
5071 else
5072 return bfd_reloc_dangerous;
5073 }
39b41c9c
PB
5074 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx)
5075 {
5076 /* Make sure this is a BL. */
5077 lower_insn |= 0x1800;
5078 }
252b5132 5079 }
f21f3fe0 5080
b7693d02
DJ
5081 /* Handle calls via the PLT. */
5082 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5083 {
5084 value = (splt->output_section->vma
5085 + splt->output_offset
5086 + h->plt.offset);
33bfe774
JB
5087 if (globals->use_blx)
5088 {
5089 /* If the Thumb BLX instruction is available, convert the
5090 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 5091 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB
5092 }
5093 else
5094 /* Target the Thumb stub before the ARM PLT entry. */
5095 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 5096 *unresolved_reloc_p = FALSE;
b7693d02
DJ
5097 }
5098
ba96a88f 5099 relocation = value + signed_addend;
f21f3fe0 5100
252b5132 5101 relocation -= (input_section->output_section->vma
ba96a88f
NC
5102 + input_section->output_offset
5103 + rel->r_offset);
9a5aca8c 5104
252b5132
RH
5105 check = relocation >> howto->rightshift;
5106
5107 /* If this is a signed value, the rightshift just dropped
5108 leading 1 bits (assuming twos complement). */
5109 if ((bfd_signed_vma) relocation >= 0)
5110 signed_check = check;
5111 else
5112 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5113
e95de063
MS
5114 /* Calculate the permissable maximum and minimum values for
5115 this relocation according to whether we're relocating for
5116 Thumb-2 or not. */
5117 bitsize = howto->bitsize;
5118 if (!thumb2)
5119 bitsize -= 2;
5120 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
5121 reloc_signed_min = ~reloc_signed_max;
5122
252b5132 5123 /* Assumes two's complement. */
ba96a88f 5124 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 5125 overflow = TRUE;
252b5132 5126
39b41c9c 5127 if ((lower_insn & 0x1800) == 0x0800)
c62e1cc3
NC
5128 /* For a BLX instruction, make sure that the relocation is rounded up
5129 to a word boundary. This follows the semantics of the instruction
5130 which specifies that bit 1 of the target address will come from bit
5131 1 of the base address. */
5132 relocation = (relocation + 2) & ~ 3;
cb1afa5c 5133
e95de063
MS
5134 /* Put RELOCATION back into the insn. Assumes two's complement.
5135 We use the Thumb-2 encoding, which is safe even if dealing with
5136 a Thumb-1 instruction by virtue of our overflow check above. */
5137 reloc_sign = (signed_check < 0) ? 1 : 0;
5138 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
5139 | ((relocation >> 12) & 0x3ff)
5140 | (reloc_sign << 10);
5141 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
5142 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
5143 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
5144 | ((relocation >> 1) & 0x7ff);
c62e1cc3 5145
252b5132
RH
5146 /* Put the relocated value back in the object file: */
5147 bfd_put_16 (input_bfd, upper_insn, hit_data);
5148 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5149
5150 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5151 }
5152 break;
5153
c19d1205
ZW
5154 case R_ARM_THM_JUMP24:
5155 /* Thumb32 unconditional branch instruction. */
5156 {
5157 bfd_vma relocation;
5158 bfd_boolean overflow = FALSE;
5159 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5160 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
5161 bfd_signed_vma reloc_signed_max = ((1 << (howto->bitsize - 1)) - 1) >> howto->rightshift;
5162 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
5163 bfd_vma check;
5164 bfd_signed_vma signed_check;
5165
5166 /* Need to refetch the addend, reconstruct the top three bits, and glue the
5167 two pieces together. */
5168 if (globals->use_rel)
5169 {
5170 bfd_vma S = (upper_insn & 0x0400) >> 10;
5171 bfd_vma hi = (upper_insn & 0x03ff);
5172 bfd_vma I1 = (lower_insn & 0x2000) >> 13;
5173 bfd_vma I2 = (lower_insn & 0x0800) >> 11;
5174 bfd_vma lo = (lower_insn & 0x07ff);
5175
5176 I1 = !(I1 ^ S);
5177 I2 = !(I2 ^ S);
5178 S = !S;
5179
5180 signed_addend = (S << 24) | (I1 << 23) | (I2 << 22) | (hi << 12) | (lo << 1);
5181 signed_addend -= (1 << 24); /* Sign extend. */
5182 }
5183
5184 /* ??? Should handle interworking? GCC might someday try to
5185 use this for tail calls. */
5186
5187 relocation = value + signed_addend;
5188 relocation -= (input_section->output_section->vma
5189 + input_section->output_offset
5190 + rel->r_offset);
5191
5192 check = relocation >> howto->rightshift;
5193
5194 /* If this is a signed value, the rightshift just dropped
5195 leading 1 bits (assuming twos complement). */
5196 if ((bfd_signed_vma) relocation >= 0)
5197 signed_check = check;
5198 else
5199 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5200
5201 /* Assumes two's complement. */
5202 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5203 overflow = TRUE;
5204
5205 /* Put RELOCATION back into the insn. */
5206 {
5207 bfd_vma S = (relocation & 0x01000000) >> 24;
5208 bfd_vma I1 = (relocation & 0x00800000) >> 23;
5209 bfd_vma I2 = (relocation & 0x00400000) >> 22;
5210 bfd_vma hi = (relocation & 0x003ff000) >> 12;
5211 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5212
5213 I1 = !(I1 ^ S);
5214 I2 = !(I2 ^ S);
5215
5216 upper_insn = (upper_insn & (bfd_vma) 0xf800) | (S << 10) | hi;
5217 lower_insn = (lower_insn & (bfd_vma) 0xd000) | (I1 << 13) | (I2 << 11) | lo;
5218 }
5219
5220 /* Put the relocated value back in the object file: */
5221 bfd_put_16 (input_bfd, upper_insn, hit_data);
5222 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5223
5224 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5225 }
5226
5227 case R_ARM_THM_JUMP19:
5228 /* Thumb32 conditional branch instruction. */
5229 {
5230 bfd_vma relocation;
5231 bfd_boolean overflow = FALSE;
5232 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5233 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS
5234 bfd_signed_vma reloc_signed_max = 0xffffe;
5235 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW
5236 bfd_signed_vma signed_check;
5237
5238 /* Need to refetch the addend, reconstruct the top three bits,
5239 and squish the two 11 bit pieces together. */
5240 if (globals->use_rel)
5241 {
5242 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 5243 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW
5244 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
5245 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
5246 bfd_vma lower = (lower_insn & 0x07ff);
5247
a00a1f35
MS
5248 upper |= J1 << 6;
5249 upper |= J2 << 7;
5250 upper |= (!S) << 8;
c19d1205
ZW
5251 upper -= 0x0100; /* Sign extend. */
5252
5253 addend = (upper << 12) | (lower << 1);
5254 signed_addend = addend;
5255 }
5256
5257 /* ??? Should handle interworking? GCC might someday try to
5258 use this for tail calls. */
5259
5260 relocation = value + signed_addend;
5261 relocation -= (input_section->output_section->vma
5262 + input_section->output_offset
5263 + rel->r_offset);
a00a1f35 5264 signed_check = (bfd_signed_vma) relocation;
c19d1205 5265
c19d1205
ZW
5266 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5267 overflow = TRUE;
5268
5269 /* Put RELOCATION back into the insn. */
5270 {
5271 bfd_vma S = (relocation & 0x00100000) >> 20;
5272 bfd_vma J2 = (relocation & 0x00080000) >> 19;
5273 bfd_vma J1 = (relocation & 0x00040000) >> 18;
5274 bfd_vma hi = (relocation & 0x0003f000) >> 12;
5275 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5276
a00a1f35 5277 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW
5278 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
5279 }
5280
5281 /* Put the relocated value back in the object file: */
5282 bfd_put_16 (input_bfd, upper_insn, hit_data);
5283 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5284
5285 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5286 }
5287
5288 case R_ARM_THM_JUMP11:
5289 case R_ARM_THM_JUMP8:
5290 case R_ARM_THM_JUMP6:
51c5503b
NC
5291 /* Thumb B (branch) instruction). */
5292 {
6cf9e9fe 5293 bfd_signed_vma relocation;
51c5503b
NC
5294 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
5295 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC
5296 bfd_signed_vma signed_check;
5297
c19d1205
ZW
5298 /* CZB cannot jump backward. */
5299 if (r_type == R_ARM_THM_JUMP6)
5300 reloc_signed_min = 0;
5301
4e7fd91e 5302 if (globals->use_rel)
6cf9e9fe 5303 {
4e7fd91e
PB
5304 /* Need to refetch addend. */
5305 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5306 if (addend & ((howto->src_mask + 1) >> 1))
5307 {
5308 signed_addend = -1;
5309 signed_addend &= ~ howto->src_mask;
5310 signed_addend |= addend;
5311 }
5312 else
5313 signed_addend = addend;
5314 /* The value in the insn has been right shifted. We need to
5315 undo this, so that we can perform the address calculation
5316 in terms of bytes. */
5317 signed_addend <<= howto->rightshift;
6cf9e9fe 5318 }
6cf9e9fe 5319 relocation = value + signed_addend;
51c5503b
NC
5320
5321 relocation -= (input_section->output_section->vma
5322 + input_section->output_offset
5323 + rel->r_offset);
5324
6cf9e9fe
NC
5325 relocation >>= howto->rightshift;
5326 signed_check = relocation;
c19d1205
ZW
5327
5328 if (r_type == R_ARM_THM_JUMP6)
5329 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
5330 else
5331 relocation &= howto->dst_mask;
51c5503b 5332 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 5333
51c5503b
NC
5334 bfd_put_16 (input_bfd, relocation, hit_data);
5335
5336 /* Assumes two's complement. */
5337 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5338 return bfd_reloc_overflow;
5339
5340 return bfd_reloc_ok;
5341 }
cedb70c5 5342
8375c36b
PB
5343 case R_ARM_ALU_PCREL7_0:
5344 case R_ARM_ALU_PCREL15_8:
5345 case R_ARM_ALU_PCREL23_15:
5346 {
5347 bfd_vma insn;
5348 bfd_vma relocation;
5349
5350 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB
5351 if (globals->use_rel)
5352 {
5353 /* Extract the addend. */
5354 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
5355 signed_addend = addend;
5356 }
8375c36b
PB
5357 relocation = value + signed_addend;
5358
5359 relocation -= (input_section->output_section->vma
5360 + input_section->output_offset
5361 + rel->r_offset);
5362 insn = (insn & ~0xfff)
5363 | ((howto->bitpos << 7) & 0xf00)
5364 | ((relocation >> howto->bitpos) & 0xff);
5365 bfd_put_32 (input_bfd, value, hit_data);
5366 }
5367 return bfd_reloc_ok;
5368
252b5132
RH
5369 case R_ARM_GNU_VTINHERIT:
5370 case R_ARM_GNU_VTENTRY:
5371 return bfd_reloc_ok;
5372
c19d1205 5373 case R_ARM_GOTOFF32:
252b5132
RH
5374 /* Relocation is relative to the start of the
5375 global offset table. */
5376
5377 BFD_ASSERT (sgot != NULL);
5378 if (sgot == NULL)
5379 return bfd_reloc_notsupported;
9a5aca8c 5380
cedb70c5 5381 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE
5382 address by one, so that attempts to call the function pointer will
5383 correctly interpret it as Thumb code. */
5384 if (sym_flags == STT_ARM_TFUNC)
5385 value += 1;
5386
252b5132
RH
5387 /* Note that sgot->output_offset is not involved in this
5388 calculation. We always want the start of .got. If we
5389 define _GLOBAL_OFFSET_TABLE in a different way, as is
5390 permitted by the ABI, we might have to change this
9b485d32 5391 calculation. */
252b5132 5392 value -= sgot->output_section->vma;
f21f3fe0 5393 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5394 contents, rel->r_offset, value,
00a97672 5395 rel->r_addend);
252b5132
RH
5396
5397 case R_ARM_GOTPC:
a7c10850 5398 /* Use global offset table as symbol value. */
252b5132 5399 BFD_ASSERT (sgot != NULL);
f21f3fe0 5400
252b5132
RH
5401 if (sgot == NULL)
5402 return bfd_reloc_notsupported;
5403
0945cdfd 5404 *unresolved_reloc_p = FALSE;
252b5132 5405 value = sgot->output_section->vma;
f21f3fe0 5406 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5407 contents, rel->r_offset, value,
00a97672 5408 rel->r_addend);
f21f3fe0 5409
252b5132 5410 case R_ARM_GOT32:
eb043451 5411 case R_ARM_GOT_PREL:
252b5132 5412 /* Relocation is to the entry for this symbol in the
9b485d32 5413 global offset table. */
252b5132
RH
5414 if (sgot == NULL)
5415 return bfd_reloc_notsupported;
f21f3fe0 5416
252b5132
RH
5417 if (h != NULL)
5418 {
5419 bfd_vma off;
5e681ec4 5420 bfd_boolean dyn;
f21f3fe0 5421
252b5132
RH
5422 off = h->got.offset;
5423 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 5424 dyn = globals->root.dynamic_sections_created;
f21f3fe0 5425
5e681ec4 5426 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 5427 || (info->shared
5e681ec4
PB
5428 && SYMBOL_REFERENCES_LOCAL (info, h))
5429 || (ELF_ST_VISIBILITY (h->other)
5430 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH
5431 {
5432 /* This is actually a static link, or it is a -Bsymbolic link
5433 and the symbol is defined locally. We must initialize this
5434 entry in the global offset table. Since the offset must
5435 always be a multiple of 4, we use the least significant bit
5436 to record whether we have initialized it already.
f21f3fe0 5437
00a97672 5438 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 5439 entry to initialize the value. This is done in the
9b485d32 5440 finish_dynamic_symbol routine. */
252b5132
RH
5441 if ((off & 1) != 0)
5442 off &= ~1;
5443 else
5444 {
ee29b9fb
RE
5445 /* If we are addressing a Thumb function, we need to
5446 adjust the address by one, so that attempts to
5447 call the function pointer will correctly
5448 interpret it as Thumb code. */
5449 if (sym_flags == STT_ARM_TFUNC)
5450 value |= 1;
5451
252b5132
RH
5452 bfd_put_32 (output_bfd, value, sgot->contents + off);
5453 h->got.offset |= 1;
5454 }
5455 }
0945cdfd
DJ
5456 else
5457 *unresolved_reloc_p = FALSE;
f21f3fe0 5458
252b5132
RH
5459 value = sgot->output_offset + off;
5460 }
5461 else
5462 {
5463 bfd_vma off;
f21f3fe0 5464
252b5132
RH
5465 BFD_ASSERT (local_got_offsets != NULL &&
5466 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 5467
252b5132 5468 off = local_got_offsets[r_symndx];
f21f3fe0 5469
252b5132
RH
5470 /* The offset must always be a multiple of 4. We use the
5471 least significant bit to record whether we have already
9b485d32 5472 generated the necessary reloc. */
252b5132
RH
5473 if ((off & 1) != 0)
5474 off &= ~1;
5475 else
5476 {
b7693d02
DJ
5477 /* If we are addressing a Thumb function, we need to
5478 adjust the address by one, so that attempts to
5479 call the function pointer will correctly
5480 interpret it as Thumb code. */
5481 if (sym_flags == STT_ARM_TFUNC)
5482 value |= 1;
5483
00a97672
RS
5484 if (globals->use_rel)
5485 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 5486
252b5132
RH
5487 if (info->shared)
5488 {
5489 asection * srelgot;
947216bf
AM
5490 Elf_Internal_Rela outrel;
5491 bfd_byte *loc;
f21f3fe0 5492
00a97672
RS
5493 srelgot = (bfd_get_section_by_name
5494 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 5495 BFD_ASSERT (srelgot != NULL);
f21f3fe0 5496
00a97672 5497 outrel.r_addend = addend + value;
252b5132 5498 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 5499 + sgot->output_offset
252b5132
RH
5500 + off);
5501 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 5502 loc = srelgot->contents;
00a97672
RS
5503 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
5504 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 5505 }
f21f3fe0 5506
252b5132
RH
5507 local_got_offsets[r_symndx] |= 1;
5508 }
f21f3fe0 5509
252b5132
RH
5510 value = sgot->output_offset + off;
5511 }
eb043451
PB
5512 if (r_type != R_ARM_GOT32)
5513 value += sgot->output_section->vma;
9a5aca8c 5514
f21f3fe0 5515 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5516 contents, rel->r_offset, value,
00a97672 5517 rel->r_addend);
f21f3fe0 5518
ba93b8ac
DJ
5519 case R_ARM_TLS_LDO32:
5520 value = value - dtpoff_base (info);
5521
5522 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS
5523 contents, rel->r_offset, value,
5524 rel->r_addend);
ba93b8ac
DJ
5525
5526 case R_ARM_TLS_LDM32:
5527 {
5528 bfd_vma off;
5529
5530 if (globals->sgot == NULL)
5531 abort ();
5532
5533 off = globals->tls_ldm_got.offset;
5534
5535 if ((off & 1) != 0)
5536 off &= ~1;
5537 else
5538 {
5539 /* If we don't know the module number, create a relocation
5540 for it. */
5541 if (info->shared)
5542 {
5543 Elf_Internal_Rela outrel;
5544 bfd_byte *loc;
5545
5546 if (globals->srelgot == NULL)
5547 abort ();
5548
00a97672 5549 outrel.r_addend = 0;
ba93b8ac
DJ
5550 outrel.r_offset = (globals->sgot->output_section->vma
5551 + globals->sgot->output_offset + off);
5552 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
5553
00a97672
RS
5554 if (globals->use_rel)
5555 bfd_put_32 (output_bfd, outrel.r_addend,
5556 globals->sgot->contents + off);
ba93b8ac
DJ
5557
5558 loc = globals->srelgot->contents;
00a97672
RS
5559 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
5560 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ
5561 }
5562 else
5563 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
5564
5565 globals->tls_ldm_got.offset |= 1;
5566 }
5567
5568 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5569 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5570
5571 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5572 contents, rel->r_offset, value,
00a97672 5573 rel->r_addend);
ba93b8ac
DJ
5574 }
5575
5576 case R_ARM_TLS_GD32:
5577 case R_ARM_TLS_IE32:
5578 {
5579 bfd_vma off;
5580 int indx;
5581 char tls_type;
5582
5583 if (globals->sgot == NULL)
5584 abort ();
5585
5586 indx = 0;
5587 if (h != NULL)
5588 {
5589 bfd_boolean dyn;
5590 dyn = globals->root.dynamic_sections_created;
5591 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5592 && (!info->shared
5593 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5594 {
5595 *unresolved_reloc_p = FALSE;
5596 indx = h->dynindx;
5597 }
5598 off = h->got.offset;
5599 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
5600 }
5601 else
5602 {
5603 if (local_got_offsets == NULL)
5604 abort ();
5605 off = local_got_offsets[r_symndx];
5606 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
5607 }
5608
5609 if (tls_type == GOT_UNKNOWN)
5610 abort ();
5611
5612 if ((off & 1) != 0)
5613 off &= ~1;
5614 else
5615 {
5616 bfd_boolean need_relocs = FALSE;
5617 Elf_Internal_Rela outrel;
5618 bfd_byte *loc = NULL;
5619 int cur_off = off;
5620
5621 /* The GOT entries have not been initialized yet. Do it
5622 now, and emit any relocations. If both an IE GOT and a
5623 GD GOT are necessary, we emit the GD first. */
5624
5625 if ((info->shared || indx != 0)
5626 && (h == NULL
5627 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5628 || h->root.type != bfd_link_hash_undefweak))
5629 {
5630 need_relocs = TRUE;
5631 if (globals->srelgot == NULL)
5632 abort ();
5633 loc = globals->srelgot->contents;
00a97672 5634 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ
5635 }
5636
5637 if (tls_type & GOT_TLS_GD)
5638 {
5639 if (need_relocs)
5640 {
00a97672 5641 outrel.r_addend = 0;
ba93b8ac 5642 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS
5643 + globals->sgot->output_offset
5644 + cur_off);
ba93b8ac 5645 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 5646
00a97672
RS
5647 if (globals->use_rel)
5648 bfd_put_32 (output_bfd, outrel.r_addend,
5649 globals->sgot->contents + cur_off);
5650
5651 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5652 globals->srelgot->reloc_count++;
00a97672 5653 loc += RELOC_SIZE (globals);
ba93b8ac
DJ
5654
5655 if (indx == 0)
5656 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5657 globals->sgot->contents + cur_off + 4);
5658 else
5659 {
00a97672 5660 outrel.r_addend = 0;
ba93b8ac
DJ
5661 outrel.r_info = ELF32_R_INFO (indx,
5662 R_ARM_TLS_DTPOFF32);
5663 outrel.r_offset += 4;
00a97672
RS
5664
5665 if (globals->use_rel)
5666 bfd_put_32 (output_bfd, outrel.r_addend,
5667 globals->sgot->contents + cur_off + 4);
5668
5669
5670 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5671 globals->srelgot->reloc_count++;
00a97672 5672 loc += RELOC_SIZE (globals);
ba93b8ac
DJ
5673 }
5674 }
5675 else
5676 {
5677 /* If we are not emitting relocations for a
5678 general dynamic reference, then we must be in a
5679 static link or an executable link with the
5680 symbol binding locally. Mark it as belonging
5681 to module 1, the executable. */
5682 bfd_put_32 (output_bfd, 1,
5683 globals->sgot->contents + cur_off);
5684 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5685 globals->sgot->contents + cur_off + 4);
5686 }
5687
5688 cur_off += 8;
5689 }
5690
5691 if (tls_type & GOT_TLS_IE)
5692 {
5693 if (need_relocs)
5694 {
00a97672
RS
5695 if (indx == 0)
5696 outrel.r_addend = value - dtpoff_base (info);
5697 else
5698 outrel.r_addend = 0;
ba93b8ac
DJ
5699 outrel.r_offset = (globals->sgot->output_section->vma
5700 + globals->sgot->output_offset
5701 + cur_off);
5702 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
5703
00a97672
RS
5704 if (globals->use_rel)
5705 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ
5706 globals->sgot->contents + cur_off);
5707
00a97672 5708 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5709 globals->srelgot->reloc_count++;
00a97672 5710 loc += RELOC_SIZE (globals);
ba93b8ac
DJ
5711 }
5712 else
5713 bfd_put_32 (output_bfd, tpoff (info, value),
5714 globals->sgot->contents + cur_off);
5715 cur_off += 4;
5716 }
5717
5718 if (h != NULL)
5719 h->got.offset |= 1;
5720 else
5721 local_got_offsets[r_symndx] |= 1;
5722 }
5723
5724 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
5725 off += 8;
5726 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5727 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5728
5729 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5730 contents, rel->r_offset, value,
00a97672 5731 rel->r_addend);
ba93b8ac
DJ
5732 }
5733
5734 case R_ARM_TLS_LE32:
5735 if (info->shared)
5736 {
5737 (*_bfd_error_handler)
5738 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
5739 input_bfd, input_section,
5740 (long) rel->r_offset, howto->name);
5741 return FALSE;
5742 }
5743 else
5744 value = tpoff (info, value);
5745
5746 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS
5747 contents, rel->r_offset, value,
5748 rel->r_addend);
ba93b8ac 5749
319850b4
JB
5750 case R_ARM_V4BX:
5751 if (globals->fix_v4bx)
5752 {
5753 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5754
5755 /* Ensure that we have a BX instruction. */
5756 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
5757
5758 /* Preserve Rm (lowest four bits) and the condition code
5759 (highest four bits). Other bits encode MOV PC,Rm. */
5760 insn = (insn & 0xf000000f) | 0x01a0f000;
5761
5762 bfd_put_32 (input_bfd, insn, hit_data);
5763 }
5764 return bfd_reloc_ok;
5765
b6895b4f
PB
5766 case R_ARM_MOVW_ABS_NC:
5767 case R_ARM_MOVT_ABS:
5768 case R_ARM_MOVW_PREL_NC:
5769 case R_ARM_MOVT_PREL:
92f5d02b
MS
5770 /* Until we properly support segment-base-relative addressing then
5771 we assume the segment base to be zero, as for the group relocations.
5772 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
5773 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
5774 case R_ARM_MOVW_BREL_NC:
5775 case R_ARM_MOVW_BREL:
5776 case R_ARM_MOVT_BREL:
b6895b4f
PB
5777 {
5778 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5779
5780 if (globals->use_rel)
5781 {
5782 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
5783 signed_addend = (addend ^ 0x10000) - 0x10000;
5784 }
92f5d02b 5785
b6895b4f 5786 value += signed_addend;
b6895b4f
PB
5787
5788 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
5789 value -= (input_section->output_section->vma
5790 + input_section->output_offset + rel->r_offset);
5791
92f5d02b
MS
5792 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
5793 return bfd_reloc_overflow;
5794
5795 if (sym_flags == STT_ARM_TFUNC)
5796 value |= 1;
5797
5798 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
5799 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB
5800 value >>= 16;
5801
5802 insn &= 0xfff0f000;
5803 insn |= value & 0xfff;
5804 insn |= (value & 0xf000) << 4;
5805 bfd_put_32 (input_bfd, insn, hit_data);
5806 }
5807 return bfd_reloc_ok;
5808
5809 case R_ARM_THM_MOVW_ABS_NC:
5810 case R_ARM_THM_MOVT_ABS:
5811 case R_ARM_THM_MOVW_PREL_NC:
5812 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS
5813 /* Until we properly support segment-base-relative addressing then
5814 we assume the segment base to be zero, as for the above relocations.
5815 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
5816 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
5817 as R_ARM_THM_MOVT_ABS. */
5818 case R_ARM_THM_MOVW_BREL_NC:
5819 case R_ARM_THM_MOVW_BREL:
5820 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB
5821 {
5822 bfd_vma insn;
5823
5824 insn = bfd_get_16 (input_bfd, hit_data) << 16;
5825 insn |= bfd_get_16 (input_bfd, hit_data + 2);
5826
5827 if (globals->use_rel)
5828 {
5829 addend = ((insn >> 4) & 0xf000)
5830 | ((insn >> 15) & 0x0800)
5831 | ((insn >> 4) & 0x0700)
5832 | (insn & 0x00ff);
5833 signed_addend = (addend ^ 0x10000) - 0x10000;
5834 }
92f5d02b 5835
b6895b4f 5836 value += signed_addend;
b6895b4f
PB
5837
5838 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
5839 value -= (input_section->output_section->vma
5840 + input_section->output_offset + rel->r_offset);
5841
92f5d02b
MS
5842 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
5843 return bfd_reloc_overflow;
5844
5845 if (sym_flags == STT_ARM_TFUNC)
5846 value |= 1;
5847
5848 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
5849 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB
5850 value >>= 16;
5851
5852 insn &= 0xfbf08f00;
5853 insn |= (value & 0xf000) << 4;
5854 insn |= (value & 0x0800) << 15;
5855 insn |= (value & 0x0700) << 4;
5856 insn |= (value & 0x00ff);
5857
5858 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5859 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5860 }
5861 return bfd_reloc_ok;
5862
4962c51a
MS
5863 case R_ARM_ALU_PC_G0_NC:
5864 case R_ARM_ALU_PC_G1_NC:
5865 case R_ARM_ALU_PC_G0:
5866 case R_ARM_ALU_PC_G1:
5867 case R_ARM_ALU_PC_G2:
5868 case R_ARM_ALU_SB_G0_NC:
5869 case R_ARM_ALU_SB_G1_NC:
5870 case R_ARM_ALU_SB_G0:
5871 case R_ARM_ALU_SB_G1:
5872 case R_ARM_ALU_SB_G2:
5873 {
5874 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5875 bfd_vma pc = input_section->output_section->vma
5876 + input_section->output_offset + rel->r_offset;
5877 /* sb should be the origin of the *segment* containing the symbol.
5878 It is not clear how to obtain this OS-dependent value, so we
5879 make an arbitrary choice of zero. */
5880 bfd_vma sb = 0;
5881 bfd_vma residual;
5882 bfd_vma g_n;
5883 bfd_signed_vma signed_value;
5884 int group = 0;
5885
5886 /* Determine which group of bits to select. */
5887 switch (r_type)
5888 {
5889 case R_ARM_ALU_PC_G0_NC:
5890 case R_ARM_ALU_PC_G0:
5891 case R_ARM_ALU_SB_G0_NC:
5892 case R_ARM_ALU_SB_G0:
5893 group = 0;
5894 break;
5895
5896 case R_ARM_ALU_PC_G1_NC:
5897 case R_ARM_ALU_PC_G1:
5898 case R_ARM_ALU_SB_G1_NC:
5899 case R_ARM_ALU_SB_G1:
5900 group = 1;
5901 break;
5902
5903 case R_ARM_ALU_PC_G2:
5904 case R_ARM_ALU_SB_G2:
5905 group = 2;
5906 break;
5907
5908 default:
5909 abort();
5910 }
5911
5912 /* If REL, extract the addend from the insn. If RELA, it will
5913 have already been fetched for us. */
5914 if (globals->use_rel)
5915 {
5916 int negative;
5917 bfd_vma constant = insn & 0xff;
5918 bfd_vma rotation = (insn & 0xf00) >> 8;
5919
5920 if (rotation == 0)
5921 signed_addend = constant;
5922 else
5923 {
5924 /* Compensate for the fact that in the instruction, the
5925 rotation is stored in multiples of 2 bits. */
5926 rotation *= 2;
5927
5928 /* Rotate "constant" right by "rotation" bits. */
5929 signed_addend = (constant >> rotation) |
5930 (constant << (8 * sizeof (bfd_vma) - rotation));
5931 }
5932
5933 /* Determine if the instruction is an ADD or a SUB.
5934 (For REL, this determines the sign of the addend.) */
5935 negative = identify_add_or_sub (insn);
5936 if (negative == 0)
5937 {
5938 (*_bfd_error_handler)
5939 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
5940 input_bfd, input_section,
5941 (long) rel->r_offset, howto->name);
5942 return bfd_reloc_overflow;
5943 }
5944
5945 signed_addend *= negative;
5946 }
5947
5948 /* Compute the value (X) to go in the place. */
5949 if (r_type == R_ARM_ALU_PC_G0_NC
5950 || r_type == R_ARM_ALU_PC_G1_NC
5951 || r_type == R_ARM_ALU_PC_G0
5952 || r_type == R_ARM_ALU_PC_G1
5953 || r_type == R_ARM_ALU_PC_G2)
5954 /* PC relative. */
5955 signed_value = value - pc + signed_addend;
5956 else
5957 /* Section base relative. */
5958 signed_value = value - sb + signed_addend;
5959
5960 /* If the target symbol is a Thumb function, then set the
5961 Thumb bit in the address. */
5962 if (sym_flags == STT_ARM_TFUNC)
5963 signed_value |= 1;
5964
5965 /* Calculate the value of the relevant G_n, in encoded
5966 constant-with-rotation format. */
5967 g_n = calculate_group_reloc_mask (abs (signed_value), group,
5968 &residual);
5969
5970 /* Check for overflow if required. */
5971 if ((r_type == R_ARM_ALU_PC_G0
5972 || r_type == R_ARM_ALU_PC_G1
5973 || r_type == R_ARM_ALU_PC_G2
5974 || r_type == R_ARM_ALU_SB_G0
5975 || r_type == R_ARM_ALU_SB_G1
5976 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
5977 {
5978 (*_bfd_error_handler)
5979 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
5980 input_bfd, input_section,
5981 (long) rel->r_offset, abs (signed_value), howto->name);
5982 return bfd_reloc_overflow;
5983 }
5984
5985 /* Mask out the value and the ADD/SUB part of the opcode; take care
5986 not to destroy the S bit. */
5987 insn &= 0xff1ff000;
5988
5989 /* Set the opcode according to whether the value to go in the
5990 place is negative. */
5991 if (signed_value < 0)
5992 insn |= 1 << 22;
5993 else
5994 insn |= 1 << 23;
5995
5996 /* Encode the offset. */
5997 insn |= g_n;
5998
5999 bfd_put_32 (input_bfd, insn, hit_data);
6000 }
6001 return bfd_reloc_ok;
6002
6003 case R_ARM_LDR_PC_G0:
6004 case R_ARM_LDR_PC_G1:
6005 case R_ARM_LDR_PC_G2:
6006 case R_ARM_LDR_SB_G0:
6007 case R_ARM_LDR_SB_G1:
6008 case R_ARM_LDR_SB_G2:
6009 {
6010 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6011 bfd_vma pc = input_section->output_section->vma
6012 + input_section->output_offset + rel->r_offset;
6013 bfd_vma sb = 0; /* See note above. */
6014 bfd_vma residual;
6015 bfd_signed_vma signed_value;
6016 int group = 0;
6017
6018 /* Determine which groups of bits to calculate. */
6019 switch (r_type)
6020 {
6021 case R_ARM_LDR_PC_G0:
6022 case R_ARM_LDR_SB_G0:
6023 group = 0;
6024 break;
6025
6026 case R_ARM_LDR_PC_G1:
6027 case R_ARM_LDR_SB_G1:
6028 group = 1;
6029 break;
6030
6031 case R_ARM_LDR_PC_G2:
6032 case R_ARM_LDR_SB_G2:
6033 group = 2;
6034 break;
6035
6036 default:
6037 abort();
6038 }
6039
6040 /* If REL, extract the addend from the insn. If RELA, it will
6041 have already been fetched for us. */
6042 if (globals->use_rel)
6043 {
6044 int negative = (insn & (1 << 23)) ? 1 : -1;
6045 signed_addend = negative * (insn & 0xfff);
6046 }
6047
6048 /* Compute the value (X) to go in the place. */
6049 if (r_type == R_ARM_LDR_PC_G0
6050 || r_type == R_ARM_LDR_PC_G1
6051 || r_type == R_ARM_LDR_PC_G2)
6052 /* PC relative. */
6053 signed_value = value - pc + signed_addend;
6054 else
6055 /* Section base relative. */
6056 signed_value = value - sb + signed_addend;
6057
6058 /* Calculate the value of the relevant G_{n-1} to obtain
6059 the residual at that stage. */
6060 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6061
6062 /* Check for overflow. */
6063 if (residual >= 0x1000)
6064 {
6065 (*_bfd_error_handler)
6066 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6067 input_bfd, input_section,
6068 (long) rel->r_offset, abs (signed_value), howto->name);
6069 return bfd_reloc_overflow;
6070 }
6071
6072 /* Mask out the value and U bit. */
6073 insn &= 0xff7ff000;
6074
6075 /* Set the U bit if the value to go in the place is non-negative. */
6076 if (signed_value >= 0)
6077 insn |= 1 << 23;
6078
6079 /* Encode the offset. */
6080 insn |= residual;
6081
6082 bfd_put_32 (input_bfd, insn, hit_data);
6083 }
6084 return bfd_reloc_ok;
6085
6086 case R_ARM_LDRS_PC_G0:
6087 case R_ARM_LDRS_PC_G1:
6088 case R_ARM_LDRS_PC_G2:
6089 case R_ARM_LDRS_SB_G0:
6090 case R_ARM_LDRS_SB_G1:
6091 case R_ARM_LDRS_SB_G2:
6092 {
6093 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6094 bfd_vma pc = input_section->output_section->vma
6095 + input_section->output_offset + rel->r_offset;
6096 bfd_vma sb = 0; /* See note above. */
6097 bfd_vma residual;
6098 bfd_signed_vma signed_value;
6099 int group = 0;
6100
6101 /* Determine which groups of bits to calculate. */
6102 switch (r_type)
6103 {
6104 case R_ARM_LDRS_PC_G0:
6105 case R_ARM_LDRS_SB_G0:
6106 group = 0;
6107 break;
6108
6109 case R_ARM_LDRS_PC_G1:
6110 case R_ARM_LDRS_SB_G1:
6111 group = 1;
6112 break;
6113
6114 case R_ARM_LDRS_PC_G2:
6115 case R_ARM_LDRS_SB_G2:
6116 group = 2;
6117 break;
6118
6119 default:
6120 abort();
6121 }
6122
6123 /* If REL, extract the addend from the insn. If RELA, it will
6124 have already been fetched for us. */
6125 if (globals->use_rel)
6126 {
6127 int negative = (insn & (1 << 23)) ? 1 : -1;
6128 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
6129 }
6130
6131 /* Compute the value (X) to go in the place. */
6132 if (r_type == R_ARM_LDRS_PC_G0
6133 || r_type == R_ARM_LDRS_PC_G1
6134 || r_type == R_ARM_LDRS_PC_G2)
6135 /* PC relative. */
6136 signed_value = value - pc + signed_addend;
6137 else
6138 /* Section base relative. */
6139 signed_value = value - sb + signed_addend;
6140
6141 /* Calculate the value of the relevant G_{n-1} to obtain
6142 the residual at that stage. */
6143 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6144
6145 /* Check for overflow. */
6146 if (residual >= 0x100)
6147 {
6148 (*_bfd_error_handler)
6149 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6150 input_bfd, input_section,
6151 (long) rel->r_offset, abs (signed_value), howto->name);
6152 return bfd_reloc_overflow;
6153 }
6154
6155 /* Mask out the value and U bit. */
6156 insn &= 0xff7ff0f0;
6157
6158 /* Set the U bit if the value to go in the place is non-negative. */
6159 if (signed_value >= 0)
6160 insn |= 1 << 23;
6161
6162 /* Encode the offset. */
6163 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
6164
6165 bfd_put_32 (input_bfd, insn, hit_data);
6166 }
6167 return bfd_reloc_ok;
6168
6169 case R_ARM_LDC_PC_G0:
6170 case R_ARM_LDC_PC_G1:
6171 case R_ARM_LDC_PC_G2:
6172 case R_ARM_LDC_SB_G0:
6173 case R_ARM_LDC_SB_G1:
6174 case R_ARM_LDC_SB_G2:
6175 {
6176 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6177 bfd_vma pc = input_section->output_section->vma
6178 + input_section->output_offset + rel->r_offset;
6179 bfd_vma sb = 0; /* See note above. */
6180 bfd_vma residual;
6181 bfd_signed_vma signed_value;
6182 int group = 0;
6183
6184 /* Determine which groups of bits to calculate. */
6185 switch (r_type)
6186 {
6187 case R_ARM_LDC_PC_G0:
6188 case R_ARM_LDC_SB_G0:
6189 group = 0;
6190 break;
6191
6192 case R_ARM_LDC_PC_G1:
6193 case R_ARM_LDC_SB_G1:
6194 group = 1;
6195 break;
6196
6197 case R_ARM_LDC_PC_G2:
6198 case R_ARM_LDC_SB_G2:
6199 group = 2;
6200 break;
6201
6202 default:
6203 abort();
6204 }
6205
6206 /* If REL, extract the addend from the insn. If RELA, it will
6207 have already been fetched for us. */
6208 if (globals->use_rel)
6209 {
6210 int negative = (insn & (1 << 23)) ? 1 : -1;
6211 signed_addend = negative * ((insn & 0xff) << 2);
6212 }
6213
6214 /* Compute the value (X) to go in the place. */
6215 if (r_type == R_ARM_LDC_PC_G0
6216 || r_type == R_ARM_LDC_PC_G1
6217 || r_type == R_ARM_LDC_PC_G2)
6218 /* PC relative. */
6219 signed_value = value - pc + signed_addend;
6220 else
6221 /* Section base relative. */
6222 signed_value = value - sb + signed_addend;
6223
6224 /* Calculate the value of the relevant G_{n-1} to obtain
6225 the residual at that stage. */
6226 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6227
6228 /* Check for overflow. (The absolute value to go in the place must be
6229 divisible by four and, after having been divided by four, must
6230 fit in eight bits.) */
6231 if ((residual & 0x3) != 0 || residual >= 0x400)
6232 {
6233 (*_bfd_error_handler)
6234 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6235 input_bfd, input_section,
6236 (long) rel->r_offset, abs (signed_value), howto->name);
6237 return bfd_reloc_overflow;
6238 }
6239
6240 /* Mask out the value and U bit. */
6241 insn &= 0xff7fff00;
6242
6243 /* Set the U bit if the value to go in the place is non-negative. */
6244 if (signed_value >= 0)
6245 insn |= 1 << 23;
6246
6247 /* Encode the offset. */
6248 insn |= residual >> 2;
6249
6250 bfd_put_32 (input_bfd, insn, hit_data);
6251 }
6252 return bfd_reloc_ok;
6253
252b5132
RH
6254 default:
6255 return bfd_reloc_notsupported;
6256 }
6257}
6258
98c1d4aa
NC
6259/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
6260static void
57e8b36a
NC
6261arm_add_to_rel (bfd * abfd,
6262 bfd_byte * address,
6263 reloc_howto_type * howto,
6264 bfd_signed_vma increment)
98c1d4aa 6265{
98c1d4aa
NC
6266 bfd_signed_vma addend;
6267
c19d1205 6268 if (howto->type == R_ARM_THM_CALL)
98c1d4aa 6269 {
9a5aca8c
AM
6270 int upper_insn, lower_insn;
6271 int upper, lower;
98c1d4aa 6272
9a5aca8c
AM
6273 upper_insn = bfd_get_16 (abfd, address);
6274 lower_insn = bfd_get_16 (abfd, address + 2);
6275 upper = upper_insn & 0x7ff;
6276 lower = lower_insn & 0x7ff;
6277
6278 addend = (upper << 12) | (lower << 1);
ddda4409 6279 addend += increment;
9a5aca8c 6280 addend >>= 1;
98c1d4aa 6281
9a5aca8c
AM
6282 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
6283 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
6284
dc810e39
AM
6285 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
6286 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM
6287 }
6288 else
6289 {
6290 bfd_vma contents;
6291
6292 contents = bfd_get_32 (abfd, address);
6293
6294 /* Get the (signed) value from the instruction. */
6295 addend = contents & howto->src_mask;
6296 if (addend & ((howto->src_mask + 1) >> 1))
6297 {
6298 bfd_signed_vma mask;
6299
6300 mask = -1;
6301 mask &= ~ howto->src_mask;
6302 addend |= mask;
6303 }
6304
6305 /* Add in the increment, (which is a byte value). */
6306 switch (howto->type)
6307 {
6308 default:
6309 addend += increment;
6310 break;
6311
6312 case R_ARM_PC24:
c6596c5e 6313 case R_ARM_PLT32:
5b5bb741
PB
6314 case R_ARM_CALL:
6315 case R_ARM_JUMP24:
9a5aca8c 6316 addend <<= howto->size;
dc810e39 6317 addend += increment;
9a5aca8c
AM
6318
6319 /* Should we check for overflow here ? */
6320
6321 /* Drop any undesired bits. */
6322 addend >>= howto->rightshift;
6323 break;
6324 }
6325
6326 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
6327
6328 bfd_put_32 (abfd, contents, address);
ddda4409 6329 }
98c1d4aa 6330}
252b5132 6331
ba93b8ac
DJ
6332#define IS_ARM_TLS_RELOC(R_TYPE) \
6333 ((R_TYPE) == R_ARM_TLS_GD32 \
6334 || (R_TYPE) == R_ARM_TLS_LDO32 \
6335 || (R_TYPE) == R_ARM_TLS_LDM32 \
6336 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
6337 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
6338 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
6339 || (R_TYPE) == R_ARM_TLS_LE32 \
6340 || (R_TYPE) == R_ARM_TLS_IE32)
6341
252b5132 6342/* Relocate an ARM ELF section. */
b34976b6 6343static bfd_boolean
57e8b36a
NC
6344elf32_arm_relocate_section (bfd * output_bfd,
6345 struct bfd_link_info * info,
6346 bfd * input_bfd,
6347 asection * input_section,
6348 bfd_byte * contents,
6349 Elf_Internal_Rela * relocs,
6350 Elf_Internal_Sym * local_syms,
6351 asection ** local_sections)
252b5132 6352{
b34976b6
AM
6353 Elf_Internal_Shdr *symtab_hdr;
6354 struct elf_link_hash_entry **sym_hashes;
6355 Elf_Internal_Rela *rel;
6356 Elf_Internal_Rela *relend;
6357 const char *name;
b32d3aa2 6358 struct elf32_arm_link_hash_table * globals;
252b5132 6359
4e7fd91e 6360 globals = elf32_arm_hash_table (info);
b491616a 6361
252b5132
RH
6362 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
6363 sym_hashes = elf_sym_hashes (input_bfd);
6364
6365 rel = relocs;
6366 relend = relocs + input_section->reloc_count;
6367 for (; rel < relend; rel++)
6368 {
ba96a88f
NC
6369 int r_type;
6370 reloc_howto_type * howto;
6371 unsigned long r_symndx;
6372 Elf_Internal_Sym * sym;
6373 asection * sec;
252b5132 6374 struct elf_link_hash_entry * h;
ba96a88f
NC
6375 bfd_vma relocation;
6376 bfd_reloc_status_type r;
6377 arelent bfd_reloc;
ba93b8ac 6378 char sym_type;
0945cdfd 6379 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 6380 char *error_message = NULL;
f21f3fe0 6381
252b5132 6382 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 6383 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 6384 r_type = arm_real_reloc_type (globals, r_type);
252b5132 6385
ba96a88f
NC
6386 if ( r_type == R_ARM_GNU_VTENTRY
6387 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH
6388 continue;
6389
b32d3aa2 6390 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 6391 howto = bfd_reloc.howto;
252b5132 6392
252b5132
RH
6393 h = NULL;
6394 sym = NULL;
6395 sec = NULL;
9b485d32 6396
252b5132
RH
6397 if (r_symndx < symtab_hdr->sh_info)
6398 {
6399 sym = local_syms + r_symndx;
ba93b8ac 6400 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 6401 sec = local_sections[r_symndx];
4e7fd91e 6402 if (globals->use_rel)
f8df10f4 6403 {
4e7fd91e
PB
6404 relocation = (sec->output_section->vma
6405 + sec->output_offset
6406 + sym->st_value);
ab96bf03
AM
6407 if (!info->relocatable
6408 && (sec->flags & SEC_MERGE)
6409 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 6410 {
4e7fd91e
PB
6411 asection *msec;
6412 bfd_vma addend, value;
6413
6414 if (howto->rightshift)
6415 {
6416 (*_bfd_error_handler)
6417 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
6418 input_bfd, input_section,
6419 (long) rel->r_offset, howto->name);
6420 return FALSE;
6421 }
f8df10f4 6422
4e7fd91e 6423 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
f8df10f4 6424
4e7fd91e
PB
6425 /* Get the (signed) value from the instruction. */
6426 addend = value & howto->src_mask;
6427 if (addend & ((howto->src_mask + 1) >> 1))
6428 {
6429 bfd_signed_vma mask;
f8df10f4 6430
4e7fd91e
PB
6431 mask = -1;
6432 mask &= ~ howto->src_mask;
6433 addend |= mask;
6434 }
6435 msec = sec;
6436 addend =
6437 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
6438 - relocation;
6439 addend += msec->output_section->vma + msec->output_offset;
6440 value = (value & ~ howto->dst_mask) | (addend & howto->dst_mask);
6441 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
f8df10f4 6442 }
f8df10f4 6443 }
4e7fd91e
PB
6444 else
6445 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
6446 }
6447 else
6448 {
560e09e9 6449 bfd_boolean warned;
560e09e9 6450
b2a8e766
AM
6451 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
6452 r_symndx, symtab_hdr, sym_hashes,
6453 h, sec, relocation,
6454 unresolved_reloc, warned);
ba93b8ac
DJ
6455
6456 sym_type = h->type;
252b5132
RH
6457 }
6458
ab96bf03
AM
6459 if (sec != NULL && elf_discarded_section (sec))
6460 {
6461 /* For relocs against symbols from removed linkonce sections,
6462 or sections discarded by a linker script, we just want the
6463 section contents zeroed. Avoid any special processing. */
6464 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
6465 rel->r_info = 0;
6466 rel->r_addend = 0;
6467 continue;
6468 }
6469
6470 if (info->relocatable)
6471 {
6472 /* This is a relocatable link. We don't have to change
6473 anything, unless the reloc is against a section symbol,
6474 in which case we have to adjust according to where the
6475 section symbol winds up in the output section. */
6476 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
6477 {
6478 if (globals->use_rel)
6479 arm_add_to_rel (input_bfd, contents + rel->r_offset,
6480 howto, (bfd_signed_vma) sec->output_offset);
6481 else
6482 rel->r_addend += sec->output_offset;
6483 }
6484 continue;
6485 }
6486
252b5132
RH
6487 if (h != NULL)
6488 name = h->root.root.string;
6489 else
6490 {
6491 name = (bfd_elf_string_from_elf_section
6492 (input_bfd, symtab_hdr->sh_link, sym->st_name));
6493 if (name == NULL || *name == '\0')
6494 name = bfd_section_name (input_bfd, sec);
6495 }
f21f3fe0 6496
ba93b8ac
DJ
6497 if (r_symndx != 0
6498 && r_type != R_ARM_NONE
6499 && (h == NULL
6500 || h->root.type == bfd_link_hash_defined
6501 || h->root.type == bfd_link_hash_defweak)
6502 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
6503 {
6504 (*_bfd_error_handler)
6505 ((sym_type == STT_TLS
6506 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
6507 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
6508 input_bfd,
6509 input_section,
6510 (long) rel->r_offset,
6511 howto->name,
6512 name);
6513 }
6514
252b5132
RH
6515 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
6516 input_section, contents, rel,
6517 relocation, info, sec, name,
6518 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 6519 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 6520 &unresolved_reloc, &error_message);
0945cdfd
DJ
6521
6522 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
6523 because such sections are not SEC_ALLOC and thus ld.so will
6524 not process them. */
6525 if (unresolved_reloc
6526 && !((input_section->flags & SEC_DEBUGGING) != 0
6527 && h->def_dynamic))
6528 {
6529 (*_bfd_error_handler)
843fe662
L
6530 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
6531 input_bfd,
6532 input_section,
6533 (long) rel->r_offset,
6534 howto->name,
6535 h->root.root.string);
0945cdfd
DJ
6536 return FALSE;
6537 }
252b5132
RH
6538
6539 if (r != bfd_reloc_ok)
6540 {
252b5132
RH
6541 switch (r)
6542 {
6543 case bfd_reloc_overflow:
cf919dfd
PB
6544 /* If the overflowing reloc was to an undefined symbol,
6545 we have already printed one error message and there
6546 is no point complaining again. */
6547 if ((! h ||
6548 h->root.type != bfd_link_hash_undefined)
6549 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L
6550 (info, (h ? &h->root : NULL), name, howto->name,
6551 (bfd_vma) 0, input_bfd, input_section,
6552 rel->r_offset))))
b34976b6 6553 return FALSE;
252b5132
RH
6554 break;
6555
6556 case bfd_reloc_undefined:
6557 if (!((*info->callbacks->undefined_symbol)
6558 (info, name, input_bfd, input_section,
b34976b6
AM
6559 rel->r_offset, TRUE)))
6560 return FALSE;
252b5132
RH
6561 break;
6562
6563 case bfd_reloc_outofrange:
f2a9dd69 6564 error_message = _("out of range");
252b5132
RH
6565 goto common_error;
6566
6567 case bfd_reloc_notsupported:
f2a9dd69 6568 error_message = _("unsupported relocation");
252b5132
RH
6569 goto common_error;
6570
6571 case bfd_reloc_dangerous:
f2a9dd69 6572 /* error_message should already be set. */
252b5132
RH
6573 goto common_error;
6574
6575 default:
f2a9dd69 6576 error_message = _("unknown error");
252b5132
RH
6577 /* fall through */
6578
6579 common_error:
f2a9dd69
DJ
6580 BFD_ASSERT (error_message != NULL);
6581 if (!((*info->callbacks->reloc_dangerous)
6582 (info, error_message, input_bfd, input_section,
252b5132 6583 rel->r_offset)))
b34976b6 6584 return FALSE;
252b5132
RH
6585 break;
6586 }
6587 }
6588 }
6589
b34976b6 6590 return TRUE;
252b5132
RH
6591}
6592
c178919b
NC
6593/* Set the right machine number. */
6594
6595static bfd_boolean
57e8b36a 6596elf32_arm_object_p (bfd *abfd)
c178919b 6597{
5a6c6817 6598 unsigned int mach;
57e8b36a 6599
5a6c6817 6600 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 6601
5a6c6817
NC
6602 if (mach != bfd_mach_arm_unknown)
6603 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
6604
6605 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
6606 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 6607
e16bb312 6608 else
5a6c6817 6609 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC
6610
6611 return TRUE;
6612}
6613
fc830a83 6614/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 6615
b34976b6 6616static bfd_boolean
57e8b36a 6617elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH
6618{
6619 if (elf_flags_init (abfd)
6620 && elf_elfheader (abfd)->e_flags != flags)
6621 {
fc830a83
NC
6622 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
6623 {
fd2ec330 6624 if (flags & EF_ARM_INTERWORK)
d003868e
AM
6625 (*_bfd_error_handler)
6626 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
6627 abfd);
fc830a83 6628 else
d003868e
AM
6629 _bfd_error_handler
6630 (_("Warning: Clearing the interworking flag of %B due to outside request"),
6631 abfd);
fc830a83 6632 }
252b5132
RH
6633 }
6634 else
6635 {
6636 elf_elfheader (abfd)->e_flags = flags;
b34976b6 6637 elf_flags_init (abfd) = TRUE;
252b5132
RH
6638 }
6639
b34976b6 6640 return TRUE;
252b5132
RH
6641}
6642
fc830a83 6643/* Copy backend specific data from one object module to another. */
9b485d32 6644
b34976b6 6645static bfd_boolean
57e8b36a 6646elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH
6647{
6648 flagword in_flags;
6649 flagword out_flags;
6650
fc830a83 6651 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
252b5132 6652 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 6653 return TRUE;
252b5132 6654
fc830a83 6655 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH
6656 out_flags = elf_elfheader (obfd)->e_flags;
6657
fc830a83
NC
6658 if (elf_flags_init (obfd)
6659 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
6660 && in_flags != out_flags)
252b5132 6661 {
252b5132 6662 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 6663 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 6664 return FALSE;
252b5132
RH
6665
6666 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 6667 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 6668 return FALSE;
252b5132
RH
6669
6670 /* If the src and dest have different interworking flags
6671 then turn off the interworking bit. */
fd2ec330 6672 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 6673 {
fd2ec330 6674 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM
6675 _bfd_error_handler
6676 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
6677 obfd, ibfd);
252b5132 6678
fd2ec330 6679 in_flags &= ~EF_ARM_INTERWORK;
252b5132 6680 }
1006ba19
PB
6681
6682 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB
6683 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
6684 in_flags &= ~EF_ARM_PIC;
252b5132
RH
6685 }
6686
6687 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 6688 elf_flags_init (obfd) = TRUE;
252b5132 6689
94a3258f
PB
6690 /* Also copy the EI_OSABI field. */
6691 elf_elfheader (obfd)->e_ident[EI_OSABI] =
6692 elf_elfheader (ibfd)->e_ident[EI_OSABI];
6693
104d59d1
JM
6694 /* Copy object attributes. */
6695 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB
6696
6697 return TRUE;
6698}
6699
6700/* Values for Tag_ABI_PCS_R9_use. */
6701enum
6702{
6703 AEABI_R9_V6,
6704 AEABI_R9_SB,
6705 AEABI_R9_TLS,
6706 AEABI_R9_unused
6707};
6708
6709/* Values for Tag_ABI_PCS_RW_data. */
6710enum
6711{
6712 AEABI_PCS_RW_data_absolute,
6713 AEABI_PCS_RW_data_PCrel,
6714 AEABI_PCS_RW_data_SBrel,
6715 AEABI_PCS_RW_data_unused
6716};
6717
6718/* Values for Tag_ABI_enum_size. */
6719enum
6720{
6721 AEABI_enum_unused,
6722 AEABI_enum_short,
6723 AEABI_enum_wide,
6724 AEABI_enum_forced_wide
6725};
6726
104d59d1
JM
6727/* Determine whether an object attribute tag takes an integer, a
6728 string or both. */
6729static int
6730elf32_arm_obj_attrs_arg_type (int tag)
6731{
6732 if (tag == Tag_compatibility)
6733 return 3;
6734 else if (tag == 4 || tag == 5)
6735 return 2;
6736 else if (tag < 32)
6737 return 1;
6738 else
6739 return (tag & 1) != 0 ? 2 : 1;
6740}
6741
ee065d83
PB
6742/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
6743 are conflicting attributes. */
6744static bfd_boolean
6745elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
6746{
104d59d1
JM
6747 obj_attribute *in_attr;
6748 obj_attribute *out_attr;
6749 obj_attribute_list *in_list;
ee065d83
PB
6750 /* Some tags have 0 = don't care, 1 = strong requirement,
6751 2 = weak requirement. */
6752 static const int order_312[3] = {3, 1, 2};
6753 int i;
6754
104d59d1 6755 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB
6756 {
6757 /* This is the first object. Copy the attributes. */
104d59d1 6758 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB
6759
6760 /* Use the Tag_null value to indicate the attributes have been
6761 initialized. */
104d59d1 6762 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 6763
ee065d83
PB
6764 return TRUE;
6765 }
6766
104d59d1
JM
6767 in_attr = elf_known_obj_attributes_proc (ibfd);
6768 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB
6769 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
6770 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
6771 {
6772 /* Ignore mismatches if teh object doesn't use floating point. */
6773 if (out_attr[Tag_ABI_FP_number_model].i == 0)
6774 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
6775 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
6776 {
6777 _bfd_error_handler
6778 (_("ERROR: %B uses VFP register arguments, %B does not"),
6779 ibfd, obfd);
6780 return FALSE;
6781 }
6782 }
6783
104d59d1 6784 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB
6785 {
6786 /* Merge this attribute with existing attributes. */
6787 switch (i)
6788 {
6789 case Tag_CPU_raw_name:
6790 case Tag_CPU_name:
004ae526
PB
6791 /* Use whichever has the greatest architecture requirements. We
6792 won't necessarily have both the above tags, so make sure input
6793 name is non-NULL. */
6794 if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i
6795 && in_attr[i].s)
104d59d1 6796 out_attr[i].s = _bfd_elf_attr_strdup (obfd, in_attr[i].s);
ee065d83
PB
6797 break;
6798
6799 case Tag_ABI_optimization_goals:
6800 case Tag_ABI_FP_optimization_goals:
6801 /* Use the first value seen. */
6802 break;
6803
6804 case Tag_CPU_arch:
6805 case Tag_ARM_ISA_use:
6806 case Tag_THUMB_ISA_use:
6807 case Tag_VFP_arch:
6808 case Tag_WMMX_arch:
6809 case Tag_NEON_arch:
6810 /* ??? Do NEON and WMMX conflict? */
6811 case Tag_ABI_FP_rounding:
6812 case Tag_ABI_FP_denormal:
6813 case Tag_ABI_FP_exceptions:
6814 case Tag_ABI_FP_user_exceptions:
6815 case Tag_ABI_FP_number_model:
6816 case Tag_ABI_align8_preserved:
6817 case Tag_ABI_HardFP_use:
6818 /* Use the largest value specified. */
6819 if (in_attr[i].i > out_attr[i].i)
6820 out_attr[i].i = in_attr[i].i;
6821 break;
6822
6823 case Tag_CPU_arch_profile:
6824 /* Warn if conflicting architecture profiles used. */
6825 if (out_attr[i].i && in_attr[i].i && in_attr[i].i != out_attr[i].i)
6826 {
6827 _bfd_error_handler
6828 (_("ERROR: %B: Conflicting architecture profiles %c/%c"),
6829 ibfd, in_attr[i].i, out_attr[i].i);
6830 return FALSE;
6831 }
6832 if (in_attr[i].i)
6833 out_attr[i].i = in_attr[i].i;
6834 break;
6835 case Tag_PCS_config:
6836 if (out_attr[i].i == 0)
6837 out_attr[i].i = in_attr[i].i;
6838 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
6839 {
6840 /* It's sometimes ok to mix different configs, so this is only
6841 a warning. */
6842 _bfd_error_handler
6843 (_("Warning: %B: Conflicting platform configuration"), ibfd);
6844 }
6845 break;
6846 case Tag_ABI_PCS_R9_use:
004ae526
PB
6847 if (in_attr[i].i != out_attr[i].i
6848 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB
6849 && in_attr[i].i != AEABI_R9_unused)
6850 {
6851 _bfd_error_handler
6852 (_("ERROR: %B: Conflicting use of R9"), ibfd);
6853 return FALSE;
6854 }
6855 if (out_attr[i].i == AEABI_R9_unused)
6856 out_attr[i].i = in_attr[i].i;
6857 break;
6858 case Tag_ABI_PCS_RW_data:
6859 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
6860 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
6861 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
6862 {
6863 _bfd_error_handler
6864 (_("ERROR: %B: SB relative addressing conflicts with use of R9"),
6865 ibfd);
6866 return FALSE;
6867 }
6868 /* Use the smallest value specified. */
6869 if (in_attr[i].i < out_attr[i].i)
6870 out_attr[i].i = in_attr[i].i;
6871 break;
6872 case Tag_ABI_PCS_RO_data:
6873 /* Use the smallest value specified. */
6874 if (in_attr[i].i < out_attr[i].i)
6875 out_attr[i].i = in_attr[i].i;
6876 break;
6877 case Tag_ABI_PCS_GOT_use:
6878 if (in_attr[i].i > 2 || out_attr[i].i > 2
6879 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
6880 out_attr[i].i = in_attr[i].i;
6881 break;
6882 case Tag_ABI_PCS_wchar_t:
6883 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i)
6884 {
6885 _bfd_error_handler
6886 (_("ERROR: %B: Conflicting definitions of wchar_t"), ibfd);
6887 return FALSE;
6888 }
6889 if (in_attr[i].i)
6890 out_attr[i].i = in_attr[i].i;
6891 break;
6892 case Tag_ABI_align8_needed:
6893 /* ??? Check against Tag_ABI_align8_preserved. */
6894 if (in_attr[i].i > 2 || out_attr[i].i > 2
6895 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
6896 out_attr[i].i = in_attr[i].i;
6897 break;
6898 case Tag_ABI_enum_size:
6899 if (in_attr[i].i != AEABI_enum_unused)
6900 {
6901 if (out_attr[i].i == AEABI_enum_unused
6902 || out_attr[i].i == AEABI_enum_forced_wide)
6903 {
6904 /* The existing object is compatible with anything.
6905 Use whatever requirements the new object has. */
6906 out_attr[i].i = in_attr[i].i;
6907 }
6908 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78
MS
6909 && out_attr[i].i != in_attr[i].i
6910 && !elf32_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 6911 {
bf21ed78
MS
6912 const char *aeabi_enum_names[] =
6913 { "", "variable-size", "32-bit", "" };
ee065d83 6914 _bfd_error_handler
bf21ed78
MS
6915 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
6916 ibfd, aeabi_enum_names[in_attr[i].i],
6917 aeabi_enum_names[out_attr[i].i]);
ee065d83
PB
6918 }
6919 }
6920 break;
6921 case Tag_ABI_VFP_args:
6922 /* Aready done. */
6923 break;
6924 case Tag_ABI_WMMX_args:
6925 if (in_attr[i].i != out_attr[i].i)
6926 {
6927 _bfd_error_handler
6928 (_("ERROR: %B uses iWMMXt register arguments, %B does not"),
6929 ibfd, obfd);
6930 return FALSE;
6931 }
6932 break;
6933 default: /* All known attributes should be explicitly covered. */
6934 abort ();
6935 }
6936 }
6937
104d59d1
JM
6938 /* Merge Tag_compatibility attributes and any common GNU ones. */
6939 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 6940
104d59d1
JM
6941 /* Check for any attributes not known on ARM. */
6942 in_list = elf_other_obj_attributes_proc (ibfd);
6943 while (in_list && in_list->tag == Tag_compatibility)
6944 in_list = in_list->next;
ee065d83
PB
6945
6946 for (; in_list; in_list = in_list->next)
6947 {
6948 if ((in_list->tag & 128) < 64)
eb111b1f
BE
6949 {
6950 _bfd_error_handler
6951 (_("Warning: %B: Unknown EABI object attribute %d"),
6952 ibfd, in_list->tag);
6953 break;
6954 }
ee065d83 6955 }
b34976b6 6956 return TRUE;
252b5132
RH
6957}
6958
3a4a14e9
PB
6959
6960/* Return TRUE if the two EABI versions are incompatible. */
6961
6962static bfd_boolean
6963elf32_arm_versions_compatible (unsigned iver, unsigned over)
6964{
6965 /* v4 and v5 are the same spec before and after it was released,
6966 so allow mixing them. */
6967 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
6968 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
6969 return TRUE;
6970
6971 return (iver == over);
6972}
6973
252b5132
RH
6974/* Merge backend specific data from an object file to the output
6975 object file when linking. */
9b485d32 6976
b34976b6 6977static bfd_boolean
57e8b36a 6978elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH
6979{
6980 flagword out_flags;
6981 flagword in_flags;
b34976b6 6982 bfd_boolean flags_compatible = TRUE;
cf919dfd 6983 asection *sec;
252b5132 6984
9b485d32 6985 /* Check if we have the same endianess. */
82e51918 6986 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 6987 return FALSE;
1fe494a5 6988
252b5132
RH
6989 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6990 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 6991 return TRUE;
252b5132 6992
ee065d83
PB
6993 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
6994 return FALSE;
6995
252b5132
RH
6996 /* The input BFD must have had its flags initialised. */
6997 /* The following seems bogus to me -- The flags are initialized in
6998 the assembler but I don't think an elf_flags_init field is
9b485d32 6999 written into the object. */
252b5132
RH
7000 /* BFD_ASSERT (elf_flags_init (ibfd)); */
7001
7002 in_flags = elf_elfheader (ibfd)->e_flags;
7003 out_flags = elf_elfheader (obfd)->e_flags;
7004
7005 if (!elf_flags_init (obfd))
7006 {
fe077fa6
NC
7007 /* If the input is the default architecture and had the default
7008 flags then do not bother setting the flags for the output
7009 architecture, instead allow future merges to do this. If no
7010 future merges ever set these flags then they will retain their
7011 uninitialised values, which surprise surprise, correspond
252b5132 7012 to the default values. */
fe077fa6
NC
7013 if (bfd_get_arch_info (ibfd)->the_default
7014 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 7015 return TRUE;
252b5132 7016
b34976b6 7017 elf_flags_init (obfd) = TRUE;
252b5132
RH
7018 elf_elfheader (obfd)->e_flags = in_flags;
7019
7020 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
7021 && bfd_get_arch_info (obfd)->the_default)
7022 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
7023
b34976b6 7024 return TRUE;
252b5132
RH
7025 }
7026
5a6c6817
NC
7027 /* Determine what should happen if the input ARM architecture
7028 does not match the output ARM architecture. */
7029 if (! bfd_arm_merge_machines (ibfd, obfd))
7030 return FALSE;
e16bb312 7031
1006ba19 7032 /* Identical flags must be compatible. */
252b5132 7033 if (in_flags == out_flags)
b34976b6 7034 return TRUE;
252b5132 7035
35a0f415
DJ
7036 /* Check to see if the input BFD actually contains any sections. If
7037 not, its flags may not have been initialised either, but it
8e3de13a 7038 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 7039 dynamic objects; their section list may be emptied by
d1f161ea 7040 elf_link_add_object_symbols.
35a0f415 7041
d1f161ea
NC
7042 Also check to see if there are no code sections in the input.
7043 In this case there is no need to check for code specific flags.
7044 XXX - do we need to worry about floating-point format compatability
7045 in data sections ? */
35a0f415 7046 if (!(ibfd->flags & DYNAMIC))
cf919dfd 7047 {
35a0f415 7048 bfd_boolean null_input_bfd = TRUE;
d1f161ea 7049 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ
7050
7051 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 7052 {
35a0f415
DJ
7053 /* Ignore synthetic glue sections. */
7054 if (strcmp (sec->name, ".glue_7")
7055 && strcmp (sec->name, ".glue_7t"))
7056 {
d1f161ea
NC
7057 if ((bfd_get_section_flags (ibfd, sec)
7058 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7059 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7060 only_data_sections = FALSE;
7061
35a0f415
DJ
7062 null_input_bfd = FALSE;
7063 break;
7064 }
cf919dfd 7065 }
d1f161ea
NC
7066
7067 if (null_input_bfd || only_data_sections)
35a0f415 7068 return TRUE;
cf919dfd 7069 }
cf919dfd 7070
252b5132 7071 /* Complain about various flag mismatches. */
3a4a14e9
PB
7072 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
7073 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 7074 {
d003868e 7075 _bfd_error_handler
3656d5e3 7076 (_("ERROR: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM
7077 ibfd, obfd,
7078 (in_flags & EF_ARM_EABIMASK) >> 24,
7079 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 7080 return FALSE;
fc830a83 7081 }
252b5132 7082
1006ba19 7083 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS
7084 /* VxWorks libraries do not use these flags. */
7085 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
7086 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
7087 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 7088 {
fd2ec330 7089 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 7090 {
d003868e
AM
7091 _bfd_error_handler
7092 (_("ERROR: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
7093 ibfd, obfd,
7094 in_flags & EF_ARM_APCS_26 ? 26 : 32,
7095 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 7096 flags_compatible = FALSE;
1006ba19 7097 }
252b5132 7098
fd2ec330 7099 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 7100 {
5eefb65f 7101 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e
AM
7102 _bfd_error_handler
7103 (_("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"),
7104 ibfd, obfd);
5eefb65f 7105 else
d003868e
AM
7106 _bfd_error_handler
7107 (_("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"),
7108 ibfd, obfd);
63b0f745 7109
b34976b6 7110 flags_compatible = FALSE;
1006ba19 7111 }
252b5132 7112
96a846ea 7113 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 7114 {
96a846ea 7115 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e
AM
7116 _bfd_error_handler
7117 (_("ERROR: %B uses VFP instructions, whereas %B does not"),
7118 ibfd, obfd);
5eefb65f 7119 else
d003868e
AM
7120 _bfd_error_handler
7121 (_("ERROR: %B uses FPA instructions, whereas %B does not"),
7122 ibfd, obfd);
fde78edd
NC
7123
7124 flags_compatible = FALSE;
7125 }
7126
7127 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
7128 {
7129 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e
AM
7130 _bfd_error_handler
7131 (_("ERROR: %B uses Maverick instructions, whereas %B does not"),
7132 ibfd, obfd);
fde78edd 7133 else
d003868e
AM
7134 _bfd_error_handler
7135 (_("ERROR: %B does not use Maverick instructions, whereas %B does"),
7136 ibfd, obfd);
63b0f745 7137
b34976b6 7138 flags_compatible = FALSE;
1006ba19 7139 }
96a846ea
RE
7140
7141#ifdef EF_ARM_SOFT_FLOAT
7142 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
7143 {
7144 /* We can allow interworking between code that is VFP format
7145 layout, and uses either soft float or integer regs for
7146 passing floating point arguments and results. We already
7147 know that the APCS_FLOAT flags match; similarly for VFP
7148 flags. */
7149 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
7150 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
7151 {
7152 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e
AM
7153 _bfd_error_handler
7154 (_("ERROR: %B uses software FP, whereas %B uses hardware FP"),
7155 ibfd, obfd);
96a846ea 7156 else
d003868e
AM
7157 _bfd_error_handler
7158 (_("ERROR: %B uses hardware FP, whereas %B uses software FP"),
7159 ibfd, obfd);
96a846ea 7160
b34976b6 7161 flags_compatible = FALSE;
96a846ea
RE
7162 }
7163 }
ee43f35e 7164#endif
252b5132 7165
1006ba19 7166 /* Interworking mismatch is only a warning. */
fd2ec330 7167 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 7168 {
e3c8793a
NC
7169 if (in_flags & EF_ARM_INTERWORK)
7170 {
d003868e
AM
7171 _bfd_error_handler
7172 (_("Warning: %B supports interworking, whereas %B does not"),
7173 ibfd, obfd);
e3c8793a
NC
7174 }
7175 else
7176 {
d003868e
AM
7177 _bfd_error_handler
7178 (_("Warning: %B does not support interworking, whereas %B does"),
7179 ibfd, obfd);
e3c8793a 7180 }
8f615d07 7181 }
252b5132 7182 }
63b0f745 7183
1006ba19 7184 return flags_compatible;
252b5132
RH
7185}
7186
9b485d32
NC
7187/* Display the flags field. */
7188
b34976b6 7189static bfd_boolean
57e8b36a 7190elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 7191{
fc830a83
NC
7192 FILE * file = (FILE *) ptr;
7193 unsigned long flags;
252b5132
RH
7194
7195 BFD_ASSERT (abfd != NULL && ptr != NULL);
7196
7197 /* Print normal ELF private data. */
7198 _bfd_elf_print_private_bfd_data (abfd, ptr);
7199
fc830a83 7200 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC
7201 /* Ignore init flag - it may not be set, despite the flags field
7202 containing valid data. */
252b5132
RH
7203
7204 /* xgettext:c-format */
9b485d32 7205 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 7206
fc830a83
NC
7207 switch (EF_ARM_EABI_VERSION (flags))
7208 {
7209 case EF_ARM_EABI_UNKNOWN:
4cc11e76 7210 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC
7211 official ARM ELF extended ABI. Hence they are only decoded if
7212 the EABI version is not set. */
fd2ec330 7213 if (flags & EF_ARM_INTERWORK)
9b485d32 7214 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 7215
fd2ec330 7216 if (flags & EF_ARM_APCS_26)
6c571f00 7217 fprintf (file, " [APCS-26]");
fc830a83 7218 else
6c571f00 7219 fprintf (file, " [APCS-32]");
9a5aca8c 7220
96a846ea
RE
7221 if (flags & EF_ARM_VFP_FLOAT)
7222 fprintf (file, _(" [VFP float format]"));
fde78edd
NC
7223 else if (flags & EF_ARM_MAVERICK_FLOAT)
7224 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE
7225 else
7226 fprintf (file, _(" [FPA float format]"));
7227
fd2ec330 7228 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 7229 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 7230
fd2ec330 7231 if (flags & EF_ARM_PIC)
9b485d32 7232 fprintf (file, _(" [position independent]"));
fc830a83 7233
fd2ec330 7234 if (flags & EF_ARM_NEW_ABI)
9b485d32 7235 fprintf (file, _(" [new ABI]"));
9a5aca8c 7236
fd2ec330 7237 if (flags & EF_ARM_OLD_ABI)
9b485d32 7238 fprintf (file, _(" [old ABI]"));
9a5aca8c 7239
fd2ec330 7240 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 7241 fprintf (file, _(" [software FP]"));
9a5aca8c 7242
96a846ea
RE
7243 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
7244 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC
7245 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
7246 | EF_ARM_MAVERICK_FLOAT);
fc830a83 7247 break;
9a5aca8c 7248
fc830a83 7249 case EF_ARM_EABI_VER1:
9b485d32 7250 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 7251
fc830a83 7252 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 7253 fprintf (file, _(" [sorted symbol table]"));
fc830a83 7254 else
9b485d32 7255 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 7256
fc830a83
NC
7257 flags &= ~ EF_ARM_SYMSARESORTED;
7258 break;
9a5aca8c 7259
fd2ec330
PB
7260 case EF_ARM_EABI_VER2:
7261 fprintf (file, _(" [Version2 EABI]"));
7262
7263 if (flags & EF_ARM_SYMSARESORTED)
7264 fprintf (file, _(" [sorted symbol table]"));
7265 else
7266 fprintf (file, _(" [unsorted symbol table]"));
7267
7268 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
7269 fprintf (file, _(" [dynamic symbols use segment index]"));
7270
7271 if (flags & EF_ARM_MAPSYMSFIRST)
7272 fprintf (file, _(" [mapping symbols precede others]"));
7273
99e4ae17 7274 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB
7275 | EF_ARM_MAPSYMSFIRST);
7276 break;
7277
d507cf36
PB
7278 case EF_ARM_EABI_VER3:
7279 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB
7280 break;
7281
7282 case EF_ARM_EABI_VER4:
7283 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 7284 goto eabi;
d507cf36 7285
3a4a14e9
PB
7286 case EF_ARM_EABI_VER5:
7287 fprintf (file, _(" [Version5 EABI]"));
7288 eabi:
d507cf36
PB
7289 if (flags & EF_ARM_BE8)
7290 fprintf (file, _(" [BE8]"));
7291
7292 if (flags & EF_ARM_LE8)
7293 fprintf (file, _(" [LE8]"));
7294
7295 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
7296 break;
7297
fc830a83 7298 default:
9b485d32 7299 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC
7300 break;
7301 }
252b5132 7302
fc830a83 7303 flags &= ~ EF_ARM_EABIMASK;
252b5132 7304
fc830a83 7305 if (flags & EF_ARM_RELEXEC)
9b485d32 7306 fprintf (file, _(" [relocatable executable]"));
252b5132 7307
fc830a83 7308 if (flags & EF_ARM_HASENTRY)
9b485d32 7309 fprintf (file, _(" [has entry point]"));
252b5132 7310
fc830a83
NC
7311 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
7312
7313 if (flags)
9b485d32 7314 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 7315
252b5132
RH
7316 fputc ('\n', file);
7317
b34976b6 7318 return TRUE;
252b5132
RH
7319}
7320
7321static int
57e8b36a 7322elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 7323{
2f0ca46a
NC
7324 switch (ELF_ST_TYPE (elf_sym->st_info))
7325 {
7326 case STT_ARM_TFUNC:
7327 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 7328
2f0ca46a
NC
7329 case STT_ARM_16BIT:
7330 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
7331 This allows us to distinguish between data used by Thumb instructions
7332 and non-data (which is probably code) inside Thumb regions of an
7333 executable. */
1a0eb693 7334 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC
7335 return ELF_ST_TYPE (elf_sym->st_info);
7336 break;
9a5aca8c 7337
ce855c42
NC
7338 default:
7339 break;
2f0ca46a
NC
7340 }
7341
7342 return type;
252b5132 7343}
f21f3fe0 7344
252b5132 7345static asection *
07adf181
AM
7346elf32_arm_gc_mark_hook (asection *sec,
7347 struct bfd_link_info *info,
7348 Elf_Internal_Rela *rel,
7349 struct elf_link_hash_entry *h,
7350 Elf_Internal_Sym *sym)
252b5132
RH
7351{
7352 if (h != NULL)
07adf181 7353 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH
7354 {
7355 case R_ARM_GNU_VTINHERIT:
7356 case R_ARM_GNU_VTENTRY:
07adf181
AM
7357 return NULL;
7358 }
9ad5cbcf 7359
07adf181 7360 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH
7361}
7362
780a67af
NC
7363/* Update the got entry reference counts for the section being removed. */
7364
b34976b6 7365static bfd_boolean
ba93b8ac
DJ
7366elf32_arm_gc_sweep_hook (bfd * abfd,
7367 struct bfd_link_info * info,
7368 asection * sec,
7369 const Elf_Internal_Rela * relocs)
252b5132 7370{
5e681ec4
PB
7371 Elf_Internal_Shdr *symtab_hdr;
7372 struct elf_link_hash_entry **sym_hashes;
7373 bfd_signed_vma *local_got_refcounts;
7374 const Elf_Internal_Rela *rel, *relend;
eb043451
PB
7375 struct elf32_arm_link_hash_table * globals;
7376
7377 globals = elf32_arm_hash_table (info);
5e681ec4
PB
7378
7379 elf_section_data (sec)->local_dynrel = NULL;
7380
7381 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7382 sym_hashes = elf_sym_hashes (abfd);
7383 local_got_refcounts = elf_local_got_refcounts (abfd);
7384
7385 relend = relocs + sec->reloc_count;
7386 for (rel = relocs; rel < relend; rel++)
eb043451 7387 {
3eb128b2
AM
7388 unsigned long r_symndx;
7389 struct elf_link_hash_entry *h = NULL;
eb043451 7390 int r_type;
5e681ec4 7391
3eb128b2
AM
7392 r_symndx = ELF32_R_SYM (rel->r_info);
7393 if (r_symndx >= symtab_hdr->sh_info)
7394 {
7395 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7396 while (h->root.type == bfd_link_hash_indirect
7397 || h->root.type == bfd_link_hash_warning)
7398 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7399 }
7400
eb043451 7401 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7402 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB
7403 switch (r_type)
7404 {
7405 case R_ARM_GOT32:
eb043451 7406 case R_ARM_GOT_PREL:
ba93b8ac
DJ
7407 case R_ARM_TLS_GD32:
7408 case R_ARM_TLS_IE32:
3eb128b2 7409 if (h != NULL)
eb043451 7410 {
eb043451
PB
7411 if (h->got.refcount > 0)
7412 h->got.refcount -= 1;
7413 }
7414 else if (local_got_refcounts != NULL)
7415 {
7416 if (local_got_refcounts[r_symndx] > 0)
7417 local_got_refcounts[r_symndx] -= 1;
7418 }
7419 break;
7420
ba93b8ac
DJ
7421 case R_ARM_TLS_LDM32:
7422 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
7423 break;
7424
eb043451 7425 case R_ARM_ABS32:
bb224fc3 7426 case R_ARM_ABS32_NOI:
eb043451 7427 case R_ARM_REL32:
bb224fc3 7428 case R_ARM_REL32_NOI:
eb043451
PB
7429 case R_ARM_PC24:
7430 case R_ARM_PLT32:
5b5bb741
PB
7431 case R_ARM_CALL:
7432 case R_ARM_JUMP24:
eb043451 7433 case R_ARM_PREL31:
c19d1205 7434 case R_ARM_THM_CALL:
b6895b4f
PB
7435 case R_ARM_MOVW_ABS_NC:
7436 case R_ARM_MOVT_ABS:
7437 case R_ARM_MOVW_PREL_NC:
7438 case R_ARM_MOVT_PREL:
7439 case R_ARM_THM_MOVW_ABS_NC:
7440 case R_ARM_THM_MOVT_ABS:
7441 case R_ARM_THM_MOVW_PREL_NC:
7442 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ
7443 /* Should the interworking branches be here also? */
7444
3eb128b2 7445 if (h != NULL)
eb043451
PB
7446 {
7447 struct elf32_arm_link_hash_entry *eh;
7448 struct elf32_arm_relocs_copied **pp;
7449 struct elf32_arm_relocs_copied *p;
5e681ec4 7450
b7693d02 7451 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 7452
eb043451 7453 if (h->plt.refcount > 0)
b7693d02
DJ
7454 {
7455 h->plt.refcount -= 1;
c19d1205 7456 if (ELF32_R_TYPE (rel->r_info) == R_ARM_THM_CALL)
b7693d02
DJ
7457 eh->plt_thumb_refcount--;
7458 }
5e681ec4 7459
eb043451 7460 if (r_type == R_ARM_ABS32
bb224fc3
MS
7461 || r_type == R_ARM_REL32
7462 || r_type == R_ARM_ABS32_NOI
7463 || r_type == R_ARM_REL32_NOI)
eb043451 7464 {
eb043451
PB
7465 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
7466 pp = &p->next)
7467 if (p->section == sec)
7468 {
7469 p->count -= 1;
bb224fc3
MS
7470 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
7471 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 7472 p->pc_count -= 1;
eb043451
PB
7473 if (p->count == 0)
7474 *pp = p->next;
7475 break;
7476 }
7477 }
7478 }
7479 break;
5e681ec4 7480
eb043451
PB
7481 default:
7482 break;
7483 }
7484 }
5e681ec4 7485
b34976b6 7486 return TRUE;
252b5132
RH
7487}
7488
780a67af
NC
7489/* Look through the relocs for a section during the first phase. */
7490
b34976b6 7491static bfd_boolean
57e8b36a
NC
7492elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
7493 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 7494{
b34976b6
AM
7495 Elf_Internal_Shdr *symtab_hdr;
7496 struct elf_link_hash_entry **sym_hashes;
7497 struct elf_link_hash_entry **sym_hashes_end;
7498 const Elf_Internal_Rela *rel;
7499 const Elf_Internal_Rela *rel_end;
7500 bfd *dynobj;
5e681ec4 7501 asection *sreloc;
b34976b6 7502 bfd_vma *local_got_offsets;
5e681ec4 7503 struct elf32_arm_link_hash_table *htab;
9a5aca8c 7504
1049f94e 7505 if (info->relocatable)
b34976b6 7506 return TRUE;
9a5aca8c 7507
5e681ec4
PB
7508 htab = elf32_arm_hash_table (info);
7509 sreloc = NULL;
9a5aca8c 7510
67687978
PB
7511 /* Create dynamic sections for relocatable executables so that we can
7512 copy relocations. */
7513 if (htab->root.is_relocatable_executable
7514 && ! htab->root.dynamic_sections_created)
7515 {
7516 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
7517 return FALSE;
7518 }
7519
252b5132
RH
7520 dynobj = elf_hash_table (info)->dynobj;
7521 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 7522
252b5132
RH
7523 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7524 sym_hashes = elf_sym_hashes (abfd);
9b485d32
NC
7525 sym_hashes_end = sym_hashes
7526 + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
7527
252b5132
RH
7528 if (!elf_bad_symtab (abfd))
7529 sym_hashes_end -= symtab_hdr->sh_info;
9b485d32 7530
252b5132
RH
7531 rel_end = relocs + sec->reloc_count;
7532 for (rel = relocs; rel < rel_end; rel++)
7533 {
7534 struct elf_link_hash_entry *h;
b7693d02 7535 struct elf32_arm_link_hash_entry *eh;
252b5132 7536 unsigned long r_symndx;
eb043451 7537 int r_type;
9a5aca8c 7538
252b5132 7539 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 7540 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7541 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac
DJ
7542
7543 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
7544 {
7545 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
7546 r_symndx);
7547 return FALSE;
7548 }
7549
252b5132
RH
7550 if (r_symndx < symtab_hdr->sh_info)
7551 h = NULL;
7552 else
973a3492
L
7553 {
7554 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7555 while (h->root.type == bfd_link_hash_indirect
7556 || h->root.type == bfd_link_hash_warning)
7557 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7558 }
9a5aca8c 7559
b7693d02
DJ
7560 eh = (struct elf32_arm_link_hash_entry *) h;
7561
eb043451 7562 switch (r_type)
252b5132 7563 {
5e681ec4 7564 case R_ARM_GOT32:
eb043451 7565 case R_ARM_GOT_PREL:
ba93b8ac
DJ
7566 case R_ARM_TLS_GD32:
7567 case R_ARM_TLS_IE32:
5e681ec4 7568 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ
7569 {
7570 int tls_type, old_tls_type;
5e681ec4 7571
ba93b8ac
DJ
7572 switch (r_type)
7573 {
7574 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
7575 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
7576 default: tls_type = GOT_NORMAL; break;
7577 }
252b5132 7578
ba93b8ac
DJ
7579 if (h != NULL)
7580 {
7581 h->got.refcount++;
7582 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
7583 }
7584 else
7585 {
7586 bfd_signed_vma *local_got_refcounts;
7587
7588 /* This is a global offset table entry for a local symbol. */
7589 local_got_refcounts = elf_local_got_refcounts (abfd);
7590 if (local_got_refcounts == NULL)
7591 {
7592 bfd_size_type size;
7593
7594 size = symtab_hdr->sh_info;
7595 size *= (sizeof (bfd_signed_vma) + sizeof(char));
7596 local_got_refcounts = bfd_zalloc (abfd, size);
7597 if (local_got_refcounts == NULL)
7598 return FALSE;
7599 elf_local_got_refcounts (abfd) = local_got_refcounts;
7600 elf32_arm_local_got_tls_type (abfd)
7601 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
7602 }
7603 local_got_refcounts[r_symndx] += 1;
7604 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
7605 }
7606
7607 /* We will already have issued an error message if there is a
7608 TLS / non-TLS mismatch, based on the symbol type. We don't
7609 support any linker relaxations. So just combine any TLS
7610 types needed. */
7611 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7612 && tls_type != GOT_NORMAL)
7613 tls_type |= old_tls_type;
7614
7615 if (old_tls_type != tls_type)
7616 {
7617 if (h != NULL)
7618 elf32_arm_hash_entry (h)->tls_type = tls_type;
7619 else
7620 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
7621 }
7622 }
7623 /* Fall through */
7624
7625 case R_ARM_TLS_LDM32:
7626 if (r_type == R_ARM_TLS_LDM32)
7627 htab->tls_ldm_got.refcount++;
7628 /* Fall through */
252b5132 7629
c19d1205 7630 case R_ARM_GOTOFF32:
5e681ec4
PB
7631 case R_ARM_GOTPC:
7632 if (htab->sgot == NULL)
7633 {
7634 if (htab->root.dynobj == NULL)
7635 htab->root.dynobj = abfd;
7636 if (!create_got_section (htab->root.dynobj, info))
7637 return FALSE;
7638 }
252b5132
RH
7639 break;
7640
00a97672
RS
7641 case R_ARM_ABS12:
7642 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
7643 ldr __GOTT_INDEX__ offsets. */
7644 if (!htab->vxworks_p)
7645 break;
7646 /* Fall through */
7647
252b5132 7648 case R_ARM_ABS32:
bb224fc3 7649 case R_ARM_ABS32_NOI:
252b5132 7650 case R_ARM_REL32:
bb224fc3 7651 case R_ARM_REL32_NOI:
252b5132 7652 case R_ARM_PC24:
7359ea65 7653 case R_ARM_PLT32:
5b5bb741
PB
7654 case R_ARM_CALL:
7655 case R_ARM_JUMP24:
eb043451 7656 case R_ARM_PREL31:
c19d1205 7657 case R_ARM_THM_CALL:
b6895b4f
PB
7658 case R_ARM_MOVW_ABS_NC:
7659 case R_ARM_MOVT_ABS:
7660 case R_ARM_MOVW_PREL_NC:
7661 case R_ARM_MOVT_PREL:
7662 case R_ARM_THM_MOVW_ABS_NC:
7663 case R_ARM_THM_MOVT_ABS:
7664 case R_ARM_THM_MOVW_PREL_NC:
7665 case R_ARM_THM_MOVT_PREL:
b7693d02 7666 /* Should the interworking branches be listed here? */
7359ea65 7667 if (h != NULL)
5e681ec4
PB
7668 {
7669 /* If this reloc is in a read-only section, we might
7670 need a copy reloc. We can't check reliably at this
7671 stage whether the section is read-only, as input
7672 sections have not yet been mapped to output sections.
7673 Tentatively set the flag for now, and correct in
7674 adjust_dynamic_symbol. */
7359ea65 7675 if (!info->shared)
f5385ebf 7676 h->non_got_ref = 1;
7359ea65 7677
5e681ec4 7678 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ
7679 refers to is in a different object. We can't tell for
7680 sure yet, because something later might force the
7681 symbol local. */
bb224fc3
MS
7682 if (r_type != R_ARM_ABS32
7683 && r_type != R_ARM_REL32
7684 && r_type != R_ARM_ABS32_NOI
d3753b85
RS
7685 && r_type != R_ARM_REL32_NOI
7686 && r_type != R_ARM_ABS12)
f5385ebf 7687 h->needs_plt = 1;
4f199be3
DJ
7688
7689 /* If we create a PLT entry, this relocation will reference
7690 it, even if it's an ABS32 relocation. */
7691 h->plt.refcount += 1;
b7693d02 7692
c19d1205 7693 if (r_type == R_ARM_THM_CALL)
b7693d02 7694 eh->plt_thumb_refcount += 1;
5e681ec4
PB
7695 }
7696
67687978
PB
7697 /* If we are creating a shared library or relocatable executable,
7698 and this is a reloc against a global symbol, or a non PC
7699 relative reloc against a local symbol, then we need to copy
7700 the reloc into the shared library. However, if we are linking
7701 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH
7702 global symbol which is defined in an object we are
7703 including in the link (i.e., DEF_REGULAR is set). At
7704 this point we have not seen all the input files, so it is
7705 possible that DEF_REGULAR is not set now but will be set
7706 later (it is never cleared). We account for that
7707 possibility below by storing information in the
5e681ec4 7708 relocs_copied field of the hash table entry. */
67687978 7709 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 7710 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 7711 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ
7712 || (h != NULL && ! h->needs_plt
7713 && (! info->symbolic || ! h->def_regular))))
252b5132 7714 {
5e681ec4
PB
7715 struct elf32_arm_relocs_copied *p, **head;
7716
252b5132
RH
7717 /* When creating a shared object, we must copy these
7718 reloc types into the output file. We create a reloc
7719 section in dynobj and make room for this reloc. */
7720 if (sreloc == NULL)
7721 {
7722 const char * name;
7723
7724 name = (bfd_elf_string_from_elf_section
7725 (abfd,
7726 elf_elfheader (abfd)->e_shstrndx,
7727 elf_section_data (sec)->rel_hdr.sh_name));
7728 if (name == NULL)
b34976b6 7729 return FALSE;
252b5132 7730
00a97672 7731 BFD_ASSERT (reloc_section_p (htab, name, sec));
252b5132
RH
7732
7733 sreloc = bfd_get_section_by_name (dynobj, name);
7734 if (sreloc == NULL)
7735 {
7736 flagword flags;
7737
252b5132
RH
7738 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7739 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
e5a52504
MM
7740 if ((sec->flags & SEC_ALLOC) != 0
7741 /* BPABI objects never have dynamic
7742 relocations mapped. */
7743 && !htab->symbian_p)
252b5132 7744 flags |= SEC_ALLOC | SEC_LOAD;
3496cb2a
L
7745 sreloc = bfd_make_section_with_flags (dynobj,
7746 name,
7747 flags);
252b5132 7748 if (sreloc == NULL
252b5132 7749 || ! bfd_set_section_alignment (dynobj, sreloc, 2))
b34976b6 7750 return FALSE;
252b5132 7751 }
5e681ec4
PB
7752
7753 elf_section_data (sec)->sreloc = sreloc;
252b5132
RH
7754 }
7755
5e681ec4
PB
7756 /* If this is a global symbol, we count the number of
7757 relocations we need for this symbol. */
7758 if (h != NULL)
252b5132 7759 {
5e681ec4
PB
7760 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
7761 }
7762 else
7763 {
7764 /* Track dynamic relocs needed for local syms too.
7765 We really need local syms available to do this
7766 easily. Oh well. */
57e8b36a 7767
5e681ec4 7768 asection *s;
6edfbbad
DJ
7769 void *vpp;
7770
5e681ec4
PB
7771 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
7772 sec, r_symndx);
7773 if (s == NULL)
7774 return FALSE;
57e8b36a 7775
6edfbbad
DJ
7776 vpp = &elf_section_data (s)->local_dynrel;
7777 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 7778 }
57e8b36a 7779
5e681ec4
PB
7780 p = *head;
7781 if (p == NULL || p->section != sec)
7782 {
7783 bfd_size_type amt = sizeof *p;
57e8b36a 7784
5e681ec4 7785 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 7786 if (p == NULL)
5e681ec4
PB
7787 return FALSE;
7788 p->next = *head;
7789 *head = p;
7790 p->section = sec;
7791 p->count = 0;
ba93b8ac 7792 p->pc_count = 0;
252b5132 7793 }
57e8b36a 7794
bb224fc3 7795 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 7796 p->pc_count += 1;
71a976dd 7797 p->count += 1;
252b5132
RH
7798 }
7799 break;
7800
7801 /* This relocation describes the C++ object vtable hierarchy.
7802 Reconstruct it for later use during GC. */
7803 case R_ARM_GNU_VTINHERIT:
c152c796 7804 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 7805 return FALSE;
252b5132 7806 break;
9a5aca8c 7807
252b5132
RH
7808 /* This relocation describes which C++ vtable entries are actually
7809 used. Record for later use during GC. */
7810 case R_ARM_GNU_VTENTRY:
c152c796 7811 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 7812 return FALSE;
252b5132
RH
7813 break;
7814 }
7815 }
f21f3fe0 7816
b34976b6 7817 return TRUE;
252b5132
RH
7818}
7819
6a5bb875
PB
7820/* Unwinding tables are not referenced directly. This pass marks them as
7821 required if the corresponding code section is marked. */
7822
7823static bfd_boolean
7824elf32_arm_gc_mark_extra_sections(struct bfd_link_info *info,
7825 elf_gc_mark_hook_fn gc_mark_hook)
7826{
7827 bfd *sub;
7828 Elf_Internal_Shdr **elf_shdrp;
7829 bfd_boolean again;
7830
7831 /* Marking EH data may cause additional code sections to be marked,
7832 requiring multiple passes. */
7833 again = TRUE;
7834 while (again)
7835 {
7836 again = FALSE;
7837 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
7838 {
7839 asection *o;
7840
7841 if (bfd_get_flavour (sub) != bfd_target_elf_flavour)
7842 continue;
7843
7844 elf_shdrp = elf_elfsections (sub);
7845 for (o = sub->sections; o != NULL; o = o->next)
7846 {
7847 Elf_Internal_Shdr *hdr;
7848 hdr = &elf_section_data (o)->this_hdr;
7849 if (hdr->sh_type == SHT_ARM_EXIDX && hdr->sh_link
7850 && !o->gc_mark
7851 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
7852 {
7853 again = TRUE;
7854 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
7855 return FALSE;
7856 }
7857 }
7858 }
7859 }
7860
7861 return TRUE;
7862}
7863
3c9458e9
NC
7864/* Treat mapping symbols as special target symbols. */
7865
7866static bfd_boolean
7867elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
7868{
b0796911
PB
7869 return bfd_is_arm_special_symbol_name (sym->name,
7870 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC
7871}
7872
0367ecfb
NC
7873/* This is a copy of elf_find_function() from elf.c except that
7874 ARM mapping symbols are ignored when looking for function names
7875 and STT_ARM_TFUNC is considered to a function type. */
252b5132 7876
0367ecfb
NC
7877static bfd_boolean
7878arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
7879 asection * section,
7880 asymbol ** symbols,
7881 bfd_vma offset,
7882 const char ** filename_ptr,
7883 const char ** functionname_ptr)
7884{
7885 const char * filename = NULL;
7886 asymbol * func = NULL;
7887 bfd_vma low_func = 0;
7888 asymbol ** p;
252b5132
RH
7889
7890 for (p = symbols; *p != NULL; p++)
7891 {
7892 elf_symbol_type *q;
7893
7894 q = (elf_symbol_type *) *p;
7895
252b5132
RH
7896 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
7897 {
7898 default:
7899 break;
7900 case STT_FILE:
7901 filename = bfd_asymbol_name (&q->symbol);
7902 break;
252b5132
RH
7903 case STT_FUNC:
7904 case STT_ARM_TFUNC:
9d2da7ca 7905 case STT_NOTYPE:
b0796911 7906 /* Skip mapping symbols. */
0367ecfb 7907 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB
7908 && bfd_is_arm_special_symbol_name (q->symbol.name,
7909 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC
7910 continue;
7911 /* Fall through. */
6b40fcba 7912 if (bfd_get_section (&q->symbol) == section
252b5132
RH
7913 && q->symbol.value >= low_func
7914 && q->symbol.value <= offset)
7915 {
7916 func = (asymbol *) q;
7917 low_func = q->symbol.value;
7918 }
7919 break;
7920 }
7921 }
7922
7923 if (func == NULL)
b34976b6 7924 return FALSE;
252b5132 7925
0367ecfb
NC
7926 if (filename_ptr)
7927 *filename_ptr = filename;
7928 if (functionname_ptr)
7929 *functionname_ptr = bfd_asymbol_name (func);
7930
7931 return TRUE;
7932}
7933
7934
7935/* Find the nearest line to a particular section and offset, for error
7936 reporting. This code is a duplicate of the code in elf.c, except
7937 that it uses arm_elf_find_function. */
7938
7939static bfd_boolean
7940elf32_arm_find_nearest_line (bfd * abfd,
7941 asection * section,
7942 asymbol ** symbols,
7943 bfd_vma offset,
7944 const char ** filename_ptr,
7945 const char ** functionname_ptr,
7946 unsigned int * line_ptr)
7947{
7948 bfd_boolean found = FALSE;
7949
7950 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
7951
7952 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
7953 filename_ptr, functionname_ptr,
7954 line_ptr, 0,
7955 & elf_tdata (abfd)->dwarf2_find_line_info))
7956 {
7957 if (!*functionname_ptr)
7958 arm_elf_find_function (abfd, section, symbols, offset,
7959 *filename_ptr ? NULL : filename_ptr,
7960 functionname_ptr);
f21f3fe0 7961
0367ecfb
NC
7962 return TRUE;
7963 }
7964
7965 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
7966 & found, filename_ptr,
7967 functionname_ptr, line_ptr,
7968 & elf_tdata (abfd)->line_info))
7969 return FALSE;
7970
7971 if (found && (*functionname_ptr || *line_ptr))
7972 return TRUE;
7973
7974 if (symbols == NULL)
7975 return FALSE;
7976
7977 if (! arm_elf_find_function (abfd, section, symbols, offset,
7978 filename_ptr, functionname_ptr))
7979 return FALSE;
7980
7981 *line_ptr = 0;
b34976b6 7982 return TRUE;
252b5132
RH
7983}
7984
4ab527b0
FF
7985static bfd_boolean
7986elf32_arm_find_inliner_info (bfd * abfd,
7987 const char ** filename_ptr,
7988 const char ** functionname_ptr,
7989 unsigned int * line_ptr)
7990{
7991 bfd_boolean found;
7992 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
7993 functionname_ptr, line_ptr,
7994 & elf_tdata (abfd)->dwarf2_find_line_info);
7995 return found;
7996}
7997
252b5132
RH
7998/* Adjust a symbol defined by a dynamic object and referenced by a
7999 regular object. The current definition is in some section of the
8000 dynamic object, but we're not including those sections. We have to
8001 change the definition to something the rest of the link can
8002 understand. */
8003
b34976b6 8004static bfd_boolean
57e8b36a
NC
8005elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
8006 struct elf_link_hash_entry * h)
252b5132
RH
8007{
8008 bfd * dynobj;
8009 asection * s;
b7693d02 8010 struct elf32_arm_link_hash_entry * eh;
67687978 8011 struct elf32_arm_link_hash_table *globals;
252b5132 8012
67687978 8013 globals = elf32_arm_hash_table (info);
252b5132
RH
8014 dynobj = elf_hash_table (info)->dynobj;
8015
8016 /* Make sure we know what is going on here. */
8017 BFD_ASSERT (dynobj != NULL
f5385ebf 8018 && (h->needs_plt
f6e332e6 8019 || h->u.weakdef != NULL
f5385ebf
AM
8020 || (h->def_dynamic
8021 && h->ref_regular
8022 && !h->def_regular)));
252b5132 8023
b7693d02
DJ
8024 eh = (struct elf32_arm_link_hash_entry *) h;
8025
252b5132
RH
8026 /* If this is a function, put it in the procedure linkage table. We
8027 will fill in the contents of the procedure linkage table later,
8028 when we know the address of the .got section. */
b7693d02 8029 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 8030 || h->needs_plt)
252b5132 8031 {
5e681ec4
PB
8032 if (h->plt.refcount <= 0
8033 || SYMBOL_CALLS_LOCAL (info, h)
8034 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8035 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH
8036 {
8037 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB
8038 file, but the symbol was never referred to by a dynamic
8039 object, or if all references were garbage collected. In
8040 such a case, we don't actually need to build a procedure
8041 linkage table, and we can just do a PC24 reloc instead. */
8042 h->plt.offset = (bfd_vma) -1;
b7693d02 8043 eh->plt_thumb_refcount = 0;
f5385ebf 8044 h->needs_plt = 0;
252b5132
RH
8045 }
8046
b34976b6 8047 return TRUE;
252b5132 8048 }
5e681ec4 8049 else
b7693d02
DJ
8050 {
8051 /* It's possible that we incorrectly decided a .plt reloc was
8052 needed for an R_ARM_PC24 or similar reloc to a non-function sym
8053 in check_relocs. We can't decide accurately between function
8054 and non-function syms in check-relocs; Objects loaded later in
8055 the link may change h->type. So fix it now. */
8056 h->plt.offset = (bfd_vma) -1;
8057 eh->plt_thumb_refcount = 0;
8058 }
252b5132
RH
8059
8060 /* If this is a weak symbol, and there is a real definition, the
8061 processor independent code will have arranged for us to see the
8062 real definition first, and we can just use the same value. */
f6e332e6 8063 if (h->u.weakdef != NULL)
252b5132 8064 {
f6e332e6
AM
8065 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
8066 || h->u.weakdef->root.type == bfd_link_hash_defweak);
8067 h->root.u.def.section = h->u.weakdef->root.u.def.section;
8068 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 8069 return TRUE;
252b5132
RH
8070 }
8071
ba93b8ac
DJ
8072 /* If there are no non-GOT references, we do not need a copy
8073 relocation. */
8074 if (!h->non_got_ref)
8075 return TRUE;
8076
252b5132
RH
8077 /* This is a reference to a symbol defined by a dynamic object which
8078 is not a function. */
8079
8080 /* If we are creating a shared library, we must presume that the
8081 only references to the symbol are via the global offset table.
8082 For such cases we need not do anything here; the relocations will
67687978
PB
8083 be handled correctly by relocate_section. Relocatable executables
8084 can reference data in shared objects directly, so we don't need to
8085 do anything here. */
8086 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 8087 return TRUE;
252b5132 8088
909272ee
AM
8089 if (h->size == 0)
8090 {
8091 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
8092 h->root.root.string);
8093 return TRUE;
8094 }
8095
252b5132
RH
8096 /* We must allocate the symbol in our .dynbss section, which will
8097 become part of the .bss section of the executable. There will be
8098 an entry for this symbol in the .dynsym section. The dynamic
8099 object will contain position independent code, so all references
8100 from the dynamic object to this symbol will go through the global
8101 offset table. The dynamic linker will use the .dynsym entry to
8102 determine the address it must put in the global offset table, so
8103 both the dynamic object and the regular object will refer to the
8104 same memory location for the variable. */
252b5132
RH
8105 s = bfd_get_section_by_name (dynobj, ".dynbss");
8106 BFD_ASSERT (s != NULL);
8107
8108 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
8109 copy the initial value out of the dynamic object and into the
8110 runtime process image. We need to remember the offset into the
00a97672 8111 .rel(a).bss section we are going to use. */
252b5132
RH
8112 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
8113 {
8114 asection *srel;
8115
00a97672 8116 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 8117 BFD_ASSERT (srel != NULL);
00a97672 8118 srel->size += RELOC_SIZE (globals);
f5385ebf 8119 h->needs_copy = 1;
252b5132
RH
8120 }
8121
027297b7 8122 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH
8123}
8124
5e681ec4
PB
8125/* Allocate space in .plt, .got and associated reloc sections for
8126 dynamic relocs. */
8127
8128static bfd_boolean
57e8b36a 8129allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB
8130{
8131 struct bfd_link_info *info;
8132 struct elf32_arm_link_hash_table *htab;
8133 struct elf32_arm_link_hash_entry *eh;
8134 struct elf32_arm_relocs_copied *p;
8135
b7693d02
DJ
8136 eh = (struct elf32_arm_link_hash_entry *) h;
8137
5e681ec4
PB
8138 if (h->root.type == bfd_link_hash_indirect)
8139 return TRUE;
8140
8141 if (h->root.type == bfd_link_hash_warning)
8142 /* When warning symbols are created, they **replace** the "real"
8143 entry in the hash table, thus we never get to see the real
8144 symbol in a hash traversal. So look at it now. */
8145 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8146
8147 info = (struct bfd_link_info *) inf;
8148 htab = elf32_arm_hash_table (info);
8149
8150 if (htab->root.dynamic_sections_created
8151 && h->plt.refcount > 0)
8152 {
8153 /* Make sure this symbol is output as a dynamic symbol.
8154 Undefined weak syms won't yet be marked as dynamic. */
8155 if (h->dynindx == -1
f5385ebf 8156 && !h->forced_local)
5e681ec4 8157 {
c152c796 8158 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB
8159 return FALSE;
8160 }
8161
8162 if (info->shared
7359ea65 8163 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB
8164 {
8165 asection *s = htab->splt;
8166
8167 /* If this is the first .plt entry, make room for the special
8168 first entry. */
eea6121a 8169 if (s->size == 0)
e5a52504 8170 s->size += htab->plt_header_size;
5e681ec4 8171
eea6121a 8172 h->plt.offset = s->size;
5e681ec4 8173
b7693d02
DJ
8174 /* If we will insert a Thumb trampoline before this PLT, leave room
8175 for it. */
33bfe774 8176 if (!htab->use_blx && eh->plt_thumb_refcount > 0)
b7693d02
DJ
8177 {
8178 h->plt.offset += PLT_THUMB_STUB_SIZE;
8179 s->size += PLT_THUMB_STUB_SIZE;
8180 }
8181
5e681ec4
PB
8182 /* If this symbol is not defined in a regular file, and we are
8183 not generating a shared library, then set the symbol to this
8184 location in the .plt. This is required to make function
8185 pointers compare as equal between the normal executable and
8186 the shared library. */
8187 if (! info->shared
f5385ebf 8188 && !h->def_regular)
5e681ec4
PB
8189 {
8190 h->root.u.def.section = s;
8191 h->root.u.def.value = h->plt.offset;
b7693d02
DJ
8192
8193 /* Make sure the function is not marked as Thumb, in case
8194 it is the target of an ABS32 relocation, which will
8195 point to the PLT entry. */
8196 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
8197 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB
8198 }
8199
8200 /* Make room for this entry. */
e5a52504 8201 s->size += htab->plt_entry_size;
5e681ec4 8202
e5a52504 8203 if (!htab->symbian_p)
b7693d02
DJ
8204 {
8205 /* We also need to make an entry in the .got.plt section, which
8206 will be placed in the .got section by the linker script. */
8207 eh->plt_got_offset = htab->sgotplt->size;
8208 htab->sgotplt->size += 4;
8209 }
5e681ec4 8210
00a97672
RS
8211 /* We also need to make an entry in the .rel(a).plt section. */
8212 htab->srelplt->size += RELOC_SIZE (htab);
8213
8214 /* VxWorks executables have a second set of relocations for
8215 each PLT entry. They go in a separate relocation section,
8216 which is processed by the kernel loader. */
8217 if (htab->vxworks_p && !info->shared)
8218 {
8219 /* There is a relocation for the initial PLT entry:
8220 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
8221 if (h->plt.offset == htab->plt_header_size)
8222 htab->srelplt2->size += RELOC_SIZE (htab);
8223
8224 /* There are two extra relocations for each subsequent
8225 PLT entry: an R_ARM_32 relocation for the GOT entry,
8226 and an R_ARM_32 relocation for the PLT entry. */
8227 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
8228 }
5e681ec4
PB
8229 }
8230 else
8231 {
8232 h->plt.offset = (bfd_vma) -1;
f5385ebf 8233 h->needs_plt = 0;
5e681ec4
PB
8234 }
8235 }
8236 else
8237 {
8238 h->plt.offset = (bfd_vma) -1;
f5385ebf 8239 h->needs_plt = 0;
5e681ec4
PB
8240 }
8241
8242 if (h->got.refcount > 0)
8243 {
8244 asection *s;
8245 bfd_boolean dyn;
ba93b8ac
DJ
8246 int tls_type = elf32_arm_hash_entry (h)->tls_type;
8247 int indx;
5e681ec4
PB
8248
8249 /* Make sure this symbol is output as a dynamic symbol.
8250 Undefined weak syms won't yet be marked as dynamic. */
8251 if (h->dynindx == -1
f5385ebf 8252 && !h->forced_local)
5e681ec4 8253 {
c152c796 8254 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB
8255 return FALSE;
8256 }
8257
e5a52504
MM
8258 if (!htab->symbian_p)
8259 {
8260 s = htab->sgot;
8261 h->got.offset = s->size;
ba93b8ac
DJ
8262
8263 if (tls_type == GOT_UNKNOWN)
8264 abort ();
8265
8266 if (tls_type == GOT_NORMAL)
8267 /* Non-TLS symbols need one GOT slot. */
8268 s->size += 4;
8269 else
8270 {
8271 if (tls_type & GOT_TLS_GD)
8272 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
8273 s->size += 8;
8274 if (tls_type & GOT_TLS_IE)
8275 /* R_ARM_TLS_IE32 needs one GOT slot. */
8276 s->size += 4;
8277 }
8278
e5a52504 8279 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ
8280
8281 indx = 0;
8282 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8283 && (!info->shared
8284 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8285 indx = h->dynindx;
8286
8287 if (tls_type != GOT_NORMAL
8288 && (info->shared || indx != 0)
8289 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8290 || h->root.type != bfd_link_hash_undefweak))
8291 {
8292 if (tls_type & GOT_TLS_IE)
00a97672 8293 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8294
8295 if (tls_type & GOT_TLS_GD)
00a97672 8296 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8297
8298 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 8299 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8300 }
8301 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8302 || h->root.type != bfd_link_hash_undefweak)
8303 && (info->shared
8304 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 8305 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 8306 }
5e681ec4
PB
8307 }
8308 else
8309 h->got.offset = (bfd_vma) -1;
8310
a4fd1a8e
PB
8311 /* Allocate stubs for exported Thumb functions on v4t. */
8312 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 8313 && h->def_regular
a4fd1a8e
PB
8314 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
8315 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
8316 {
8317 struct elf_link_hash_entry * th;
8318 struct bfd_link_hash_entry * bh;
8319 struct elf_link_hash_entry * myh;
8320 char name[1024];
8321 asection *s;
8322 bh = NULL;
8323 /* Create a new symbol to regist the real location of the function. */
8324 s = h->root.u.def.section;
8325 sprintf(name, "__real_%s", h->root.root.string);
8326 _bfd_generic_link_add_one_symbol (info, s->owner,
8327 name, BSF_GLOBAL, s,
8328 h->root.u.def.value,
8329 NULL, TRUE, FALSE, &bh);
8330
8331 myh = (struct elf_link_hash_entry *) bh;
8332 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
8333 myh->forced_local = 1;
8334 eh->export_glue = myh;
8335 th = record_arm_to_thumb_glue (info, h);
8336 /* Point the symbol at the stub. */
8337 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
8338 h->root.u.def.section = th->root.u.def.section;
8339 h->root.u.def.value = th->root.u.def.value & ~1;
8340 }
8341
5e681ec4
PB
8342 if (eh->relocs_copied == NULL)
8343 return TRUE;
8344
8345 /* In the shared -Bsymbolic case, discard space allocated for
8346 dynamic pc-relative relocs against symbols which turn out to be
8347 defined in regular objects. For the normal shared case, discard
8348 space for pc-relative relocs that have become local due to symbol
8349 visibility changes. */
8350
67687978 8351 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 8352 {
7bdca076 8353 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS
8354 R_ARM_REL32_NOI, which will appear on something like
8355 ".long foo - .". We want calls to protected symbols to resolve
8356 directly to the function rather than going via the plt. If people
8357 want function pointer comparisons to work as expected then they
8358 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ
8359 if (SYMBOL_CALLS_LOCAL (info, h))
8360 {
8361 struct elf32_arm_relocs_copied **pp;
8362
8363 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
8364 {
8365 p->count -= p->pc_count;
8366 p->pc_count = 0;
8367 if (p->count == 0)
8368 *pp = p->next;
8369 else
8370 pp = &p->next;
8371 }
8372 }
8373
8374 /* Also discard relocs on undefined weak syms with non-default
7359ea65 8375 visibility. */
22d606e9 8376 if (eh->relocs_copied != NULL
5e681ec4 8377 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM
8378 {
8379 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
8380 eh->relocs_copied = NULL;
8381
8382 /* Make sure undefined weak symbols are output as a dynamic
8383 symbol in PIEs. */
8384 else if (h->dynindx == -1
8385 && !h->forced_local)
8386 {
8387 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8388 return FALSE;
8389 }
8390 }
8391
67687978
PB
8392 else if (htab->root.is_relocatable_executable && h->dynindx == -1
8393 && h->root.type == bfd_link_hash_new)
8394 {
8395 /* Output absolute symbols so that we can create relocations
8396 against them. For normal symbols we output a relocation
8397 against the section that contains them. */
8398 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8399 return FALSE;
8400 }
8401
5e681ec4
PB
8402 }
8403 else
8404 {
8405 /* For the non-shared case, discard space for relocs against
8406 symbols which turn out to need copy relocs or are not
8407 dynamic. */
8408
f5385ebf
AM
8409 if (!h->non_got_ref
8410 && ((h->def_dynamic
8411 && !h->def_regular)
5e681ec4
PB
8412 || (htab->root.dynamic_sections_created
8413 && (h->root.type == bfd_link_hash_undefweak
8414 || h->root.type == bfd_link_hash_undefined))))
8415 {
8416 /* Make sure this symbol is output as a dynamic symbol.
8417 Undefined weak syms won't yet be marked as dynamic. */
8418 if (h->dynindx == -1
f5385ebf 8419 && !h->forced_local)
5e681ec4 8420 {
c152c796 8421 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB
8422 return FALSE;
8423 }
8424
8425 /* If that succeeded, we know we'll be keeping all the
8426 relocs. */
8427 if (h->dynindx != -1)
8428 goto keep;
8429 }
8430
8431 eh->relocs_copied = NULL;
8432
8433 keep: ;
8434 }
8435
8436 /* Finally, allocate space. */
8437 for (p = eh->relocs_copied; p != NULL; p = p->next)
8438 {
8439 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 8440 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB
8441 }
8442
8443 return TRUE;
8444}
8445
08d1f311
DJ
8446/* Find any dynamic relocs that apply to read-only sections. */
8447
8448static bfd_boolean
8449elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf)
8450{
8451 struct elf32_arm_link_hash_entry *eh;
8452 struct elf32_arm_relocs_copied *p;
8453
8454 if (h->root.type == bfd_link_hash_warning)
8455 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8456
8457 eh = (struct elf32_arm_link_hash_entry *) h;
8458 for (p = eh->relocs_copied; p != NULL; p = p->next)
8459 {
8460 asection *s = p->section;
8461
8462 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8463 {
8464 struct bfd_link_info *info = (struct bfd_link_info *) inf;
8465
8466 info->flags |= DF_TEXTREL;
8467
8468 /* Not an error, just cut short the traversal. */
8469 return FALSE;
8470 }
8471 }
8472 return TRUE;
8473}
8474
d504ffc8
DJ
8475void
8476bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
8477 int byteswap_code)
8478{
8479 struct elf32_arm_link_hash_table *globals;
8480
8481 globals = elf32_arm_hash_table (info);
8482 globals->byteswap_code = byteswap_code;
8483}
8484
252b5132
RH
8485/* Set the sizes of the dynamic sections. */
8486
b34976b6 8487static bfd_boolean
57e8b36a
NC
8488elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
8489 struct bfd_link_info * info)
252b5132
RH
8490{
8491 bfd * dynobj;
8492 asection * s;
b34976b6
AM
8493 bfd_boolean plt;
8494 bfd_boolean relocs;
5e681ec4
PB
8495 bfd *ibfd;
8496 struct elf32_arm_link_hash_table *htab;
252b5132 8497
5e681ec4 8498 htab = elf32_arm_hash_table (info);
252b5132
RH
8499 dynobj = elf_hash_table (info)->dynobj;
8500 BFD_ASSERT (dynobj != NULL);
39b41c9c 8501 check_use_blx (htab);
252b5132
RH
8502
8503 if (elf_hash_table (info)->dynamic_sections_created)
8504 {
8505 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 8506 if (info->executable)
252b5132
RH
8507 {
8508 s = bfd_get_section_by_name (dynobj, ".interp");
8509 BFD_ASSERT (s != NULL);
eea6121a 8510 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH
8511 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
8512 }
8513 }
5e681ec4
PB
8514
8515 /* Set up .got offsets for local syms, and space for local dynamic
8516 relocs. */
8517 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 8518 {
5e681ec4
PB
8519 bfd_signed_vma *local_got;
8520 bfd_signed_vma *end_local_got;
8521 char *local_tls_type;
8522 bfd_size_type locsymcount;
8523 Elf_Internal_Shdr *symtab_hdr;
8524 asection *srel;
8525
8526 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
8527 continue;
8528
8529 for (s = ibfd->sections; s != NULL; s = s->next)
8530 {
8531 struct elf32_arm_relocs_copied *p;
8532
6edfbbad 8533 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB
8534 {
8535 if (!bfd_is_abs_section (p->section)
8536 && bfd_is_abs_section (p->section->output_section))
8537 {
8538 /* Input section has been discarded, either because
8539 it is a copy of a linkonce section or due to
8540 linker script /DISCARD/, so we'll be discarding
8541 the relocs too. */
8542 }
8543 else if (p->count != 0)
8544 {
8545 srel = elf_section_data (p->section)->sreloc;
00a97672 8546 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB
8547 if ((p->section->output_section->flags & SEC_READONLY) != 0)
8548 info->flags |= DF_TEXTREL;
8549 }
8550 }
8551 }
8552
8553 local_got = elf_local_got_refcounts (ibfd);
8554 if (!local_got)
8555 continue;
8556
8557 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
8558 locsymcount = symtab_hdr->sh_info;
8559 end_local_got = local_got + locsymcount;
ba93b8ac 8560 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB
8561 s = htab->sgot;
8562 srel = htab->srelgot;
8563 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
8564 {
8565 if (*local_got > 0)
8566 {
eea6121a 8567 *local_got = s->size;
ba93b8ac
DJ
8568 if (*local_tls_type & GOT_TLS_GD)
8569 /* TLS_GD relocs need an 8-byte structure in the GOT. */
8570 s->size += 8;
8571 if (*local_tls_type & GOT_TLS_IE)
8572 s->size += 4;
8573 if (*local_tls_type == GOT_NORMAL)
8574 s->size += 4;
8575
8576 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 8577 srel->size += RELOC_SIZE (htab);
5e681ec4
PB
8578 }
8579 else
8580 *local_got = (bfd_vma) -1;
8581 }
252b5132
RH
8582 }
8583
ba93b8ac
DJ
8584 if (htab->tls_ldm_got.refcount > 0)
8585 {
8586 /* Allocate two GOT entries and one dynamic relocation (if necessary)
8587 for R_ARM_TLS_LDM32 relocations. */
8588 htab->tls_ldm_got.offset = htab->sgot->size;
8589 htab->sgot->size += 8;
8590 if (info->shared)
00a97672 8591 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8592 }
8593 else
8594 htab->tls_ldm_got.offset = -1;
8595
5e681ec4
PB
8596 /* Allocate global sym .plt and .got entries, and space for global
8597 sym dynamic relocs. */
57e8b36a 8598 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 8599
d504ffc8
DJ
8600 /* Here we rummage through the found bfds to collect glue information. */
8601 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e
JB
8602 {
8603 /* Initialise mapping tables for code/data. */
8604 bfd_elf32_arm_init_maps (ibfd);
8605
8606 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
8607 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
8608 /* xgettext:c-format */
8609 _bfd_error_handler (_("Errors encountered processing file %s"),
8610 ibfd->filename);
8611 }
d504ffc8 8612
252b5132
RH
8613 /* The check_relocs and adjust_dynamic_symbol entry points have
8614 determined the sizes of the various dynamic sections. Allocate
8615 memory for them. */
b34976b6
AM
8616 plt = FALSE;
8617 relocs = FALSE;
252b5132
RH
8618 for (s = dynobj->sections; s != NULL; s = s->next)
8619 {
8620 const char * name;
252b5132
RH
8621
8622 if ((s->flags & SEC_LINKER_CREATED) == 0)
8623 continue;
8624
8625 /* It's OK to base decisions on the section name, because none
8626 of the dynobj section names depend upon the input files. */
8627 name = bfd_get_section_name (dynobj, s);
8628
24a1ba0f 8629 if (strcmp (name, ".plt") == 0)
252b5132 8630 {
c456f082
AM
8631 /* Remember whether there is a PLT. */
8632 plt = s->size != 0;
252b5132 8633 }
0112cd26 8634 else if (CONST_STRNEQ (name, ".rel"))
252b5132 8635 {
c456f082 8636 if (s->size != 0)
252b5132 8637 {
252b5132 8638 /* Remember whether there are any reloc sections other
00a97672
RS
8639 than .rel(a).plt and .rela.plt.unloaded. */
8640 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 8641 relocs = TRUE;
252b5132
RH
8642
8643 /* We use the reloc_count field as a counter if we need
8644 to copy relocs into the output file. */
8645 s->reloc_count = 0;
8646 }
8647 }
0112cd26 8648 else if (! CONST_STRNEQ (name, ".got")
c456f082 8649 && strcmp (name, ".dynbss") != 0)
252b5132
RH
8650 {
8651 /* It's not one of our sections, so don't allocate space. */
8652 continue;
8653 }
8654
c456f082 8655 if (s->size == 0)
252b5132 8656 {
c456f082 8657 /* If we don't need this section, strip it from the
00a97672
RS
8658 output file. This is mostly to handle .rel(a).bss and
8659 .rel(a).plt. We must create both sections in
c456f082
AM
8660 create_dynamic_sections, because they must be created
8661 before the linker maps input sections to output
8662 sections. The linker does that before
8663 adjust_dynamic_symbol is called, and it is that
8664 function which decides whether anything needs to go
8665 into these sections. */
8423293d 8666 s->flags |= SEC_EXCLUDE;
252b5132
RH
8667 continue;
8668 }
8669
c456f082
AM
8670 if ((s->flags & SEC_HAS_CONTENTS) == 0)
8671 continue;
8672
252b5132 8673 /* Allocate memory for the section contents. */
eea6121a 8674 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
c456f082 8675 if (s->contents == NULL)
b34976b6 8676 return FALSE;
252b5132
RH
8677 }
8678
8679 if (elf_hash_table (info)->dynamic_sections_created)
8680 {
8681 /* Add some entries to the .dynamic section. We fill in the
8682 values later, in elf32_arm_finish_dynamic_sections, but we
8683 must add the entries now so that we get the correct size for
8684 the .dynamic section. The DT_DEBUG entry is filled in by the
8685 dynamic linker and used by the debugger. */
dc810e39 8686#define add_dynamic_entry(TAG, VAL) \
5a580b3a 8687 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 8688
8532796c 8689 if (info->executable)
252b5132 8690 {
dc810e39 8691 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 8692 return FALSE;
252b5132
RH
8693 }
8694
8695 if (plt)
8696 {
dc810e39
AM
8697 if ( !add_dynamic_entry (DT_PLTGOT, 0)
8698 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS
8699 || !add_dynamic_entry (DT_PLTREL,
8700 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 8701 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 8702 return FALSE;
252b5132
RH
8703 }
8704
8705 if (relocs)
8706 {
00a97672
RS
8707 if (htab->use_rel)
8708 {
8709 if (!add_dynamic_entry (DT_REL, 0)
8710 || !add_dynamic_entry (DT_RELSZ, 0)
8711 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
8712 return FALSE;
8713 }
8714 else
8715 {
8716 if (!add_dynamic_entry (DT_RELA, 0)
8717 || !add_dynamic_entry (DT_RELASZ, 0)
8718 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
8719 return FALSE;
8720 }
252b5132
RH
8721 }
8722
08d1f311
DJ
8723 /* If any dynamic relocs apply to a read-only section,
8724 then we need a DT_TEXTREL entry. */
8725 if ((info->flags & DF_TEXTREL) == 0)
8726 elf_link_hash_traverse (&htab->root, elf32_arm_readonly_dynrelocs,
8727 (PTR) info);
8728
99e4ae17 8729 if ((info->flags & DF_TEXTREL) != 0)
252b5132 8730 {
dc810e39 8731 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 8732 return FALSE;
252b5132
RH
8733 }
8734 }
8532796c 8735#undef add_dynamic_entry
252b5132 8736
b34976b6 8737 return TRUE;
252b5132
RH
8738}
8739
252b5132
RH
8740/* Finish up dynamic symbol handling. We set the contents of various
8741 dynamic sections here. */
8742
b34976b6 8743static bfd_boolean
57e8b36a
NC
8744elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info,
8745 struct elf_link_hash_entry * h, Elf_Internal_Sym * sym)
252b5132
RH
8746{
8747 bfd * dynobj;
e5a52504 8748 struct elf32_arm_link_hash_table *htab;
b7693d02 8749 struct elf32_arm_link_hash_entry *eh;
252b5132
RH
8750
8751 dynobj = elf_hash_table (info)->dynobj;
e5a52504 8752 htab = elf32_arm_hash_table (info);
b7693d02 8753 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH
8754
8755 if (h->plt.offset != (bfd_vma) -1)
8756 {
8757 asection * splt;
252b5132 8758 asection * srel;
e5a52504 8759 bfd_byte *loc;
24a1ba0f 8760 bfd_vma plt_index;
947216bf 8761 Elf_Internal_Rela rel;
252b5132
RH
8762
8763 /* This symbol has an entry in the procedure linkage table. Set
8764 it up. */
8765
8766 BFD_ASSERT (h->dynindx != -1);
8767
8768 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 8769 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 8770 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 8771
e5a52504
MM
8772 /* Fill in the entry in the procedure linkage table. */
8773 if (htab->symbian_p)
8774 {
52ab56c2
PB
8775 put_arm_insn (htab, output_bfd,
8776 elf32_arm_symbian_plt_entry[0],
8777 splt->contents + h->plt.offset);
8778 bfd_put_32 (output_bfd,
8779 elf32_arm_symbian_plt_entry[1],
8780 splt->contents + h->plt.offset + 4);
e5a52504
MM
8781
8782 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM
8783 rel.r_offset = (splt->output_section->vma
8784 + splt->output_offset
52ab56c2 8785 + h->plt.offset + 4);
e5a52504 8786 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ
8787
8788 /* Get the index in the procedure linkage table which
8789 corresponds to this symbol. This is the index of this symbol
8790 in all the symbols for which we are making plt entries. The
8791 first entry in the procedure linkage table is reserved. */
8792 plt_index = ((h->plt.offset - htab->plt_header_size)
8793 / htab->plt_entry_size);
e5a52504
MM
8794 }
8795 else
8796 {
00a97672 8797 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM
8798 bfd_vma got_displacement;
8799 asection * sgot;
52ab56c2 8800 bfd_byte * ptr;
e5a52504
MM
8801
8802 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
8803 BFD_ASSERT (sgot != NULL);
8804
b7693d02
DJ
8805 /* Get the offset into the .got.plt table of the entry that
8806 corresponds to this function. */
8807 got_offset = eh->plt_got_offset;
8808
8809 /* Get the index in the procedure linkage table which
8810 corresponds to this symbol. This is the index of this symbol
8811 in all the symbols for which we are making plt entries. The
8812 first three entries in .got.plt are reserved; after that
8813 symbols appear in the same order as in .plt. */
8814 plt_index = (got_offset - 12) / 4;
e5a52504 8815
00a97672
RS
8816 /* Calculate the address of the GOT entry. */
8817 got_address = (sgot->output_section->vma
8818 + sgot->output_offset
8819 + got_offset);
5e681ec4 8820
00a97672
RS
8821 /* ...and the address of the PLT entry. */
8822 plt_address = (splt->output_section->vma
8823 + splt->output_offset
8824 + h->plt.offset);
5e681ec4 8825
52ab56c2 8826 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS
8827 if (htab->vxworks_p && info->shared)
8828 {
8829 unsigned int i;
8830 bfd_vma val;
8831
52ab56c2 8832 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS
8833 {
8834 val = elf32_arm_vxworks_shared_plt_entry[i];
8835 if (i == 2)
8836 val |= got_address - sgot->output_section->vma;
8837 if (i == 5)
8838 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB
8839 if (i == 2 || i == 5)
8840 bfd_put_32 (output_bfd, val, ptr);
8841 else
8842 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS
8843 }
8844 }
8845 else if (htab->vxworks_p)
b7693d02 8846 {
00a97672
RS
8847 unsigned int i;
8848 bfd_vma val;
8849
d3753b85 8850 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS
8851 {
8852 val = elf32_arm_vxworks_exec_plt_entry[i];
8853 if (i == 2)
8854 val |= got_address;
8855 if (i == 4)
8856 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
8857 if (i == 5)
8858 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB
8859 if (i == 2 || i == 5)
8860 bfd_put_32 (output_bfd, val, ptr);
8861 else
8862 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS
8863 }
8864
8865 loc = (htab->srelplt2->contents
8866 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8867
8868 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8869 referencing the GOT for this PLT entry. */
8870 rel.r_offset = plt_address + 8;
8871 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8872 rel.r_addend = got_offset;
8873 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8874 loc += RELOC_SIZE (htab);
8875
8876 /* Create the R_ARM_ABS32 relocation referencing the
8877 beginning of the PLT for this GOT entry. */
8878 rel.r_offset = got_address;
8879 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8880 rel.r_addend = 0;
8881 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 8882 }
00a97672
RS
8883 else
8884 {
8885 /* Calculate the displacement between the PLT slot and the
8886 entry in the GOT. The eight-byte offset accounts for the
8887 value produced by adding to pc in the first instruction
8888 of the PLT stub. */
8889 got_displacement = got_address - (plt_address + 8);
b7693d02 8890
00a97672
RS
8891 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8892
8893 if (!htab->use_blx && eh->plt_thumb_refcount > 0)
8894 {
52ab56c2
PB
8895 put_thumb_insn (htab, output_bfd,
8896 elf32_arm_plt_thumb_stub[0], ptr - 4);
8897 put_thumb_insn (htab, output_bfd,
8898 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS
8899 }
8900
52ab56c2
PB
8901 put_arm_insn (htab, output_bfd,
8902 elf32_arm_plt_entry[0]
8903 | ((got_displacement & 0x0ff00000) >> 20),
8904 ptr + 0);
8905 put_arm_insn (htab, output_bfd,
8906 elf32_arm_plt_entry[1]
8907 | ((got_displacement & 0x000ff000) >> 12),
8908 ptr+ 4);
8909 put_arm_insn (htab, output_bfd,
8910 elf32_arm_plt_entry[2]
8911 | (got_displacement & 0x00000fff),
8912 ptr + 8);
5e681ec4 8913#ifdef FOUR_WORD_PLT
52ab56c2 8914 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 8915#endif
00a97672 8916 }
252b5132 8917
e5a52504
MM
8918 /* Fill in the entry in the global offset table. */
8919 bfd_put_32 (output_bfd,
8920 (splt->output_section->vma
8921 + splt->output_offset),
8922 sgot->contents + got_offset);
8923
00a97672
RS
8924 /* Fill in the entry in the .rel(a).plt section. */
8925 rel.r_addend = 0;
8926 rel.r_offset = got_address;
e5a52504
MM
8927 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
8928 }
57e8b36a 8929
00a97672
RS
8930 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8931 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 8932
f5385ebf 8933 if (!h->def_regular)
252b5132
RH
8934 {
8935 /* Mark the symbol as undefined, rather than as defined in
8936 the .plt section. Leave the value alone. */
8937 sym->st_shndx = SHN_UNDEF;
d982ba73
PB
8938 /* If the symbol is weak, we do need to clear the value.
8939 Otherwise, the PLT entry would provide a definition for
8940 the symbol even if the symbol wasn't defined anywhere,
8941 and so the symbol would never be NULL. */
f5385ebf 8942 if (!h->ref_regular_nonweak)
d982ba73 8943 sym->st_value = 0;
252b5132
RH
8944 }
8945 }
8946
ba93b8ac
DJ
8947 if (h->got.offset != (bfd_vma) -1
8948 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
8949 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH
8950 {
8951 asection * sgot;
8952 asection * srel;
947216bf
AM
8953 Elf_Internal_Rela rel;
8954 bfd_byte *loc;
00a97672 8955 bfd_vma offset;
252b5132
RH
8956
8957 /* This symbol has an entry in the global offset table. Set it
8958 up. */
252b5132 8959 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 8960 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH
8961 BFD_ASSERT (sgot != NULL && srel != NULL);
8962
00a97672
RS
8963 offset = (h->got.offset & ~(bfd_vma) 1);
8964 rel.r_addend = 0;
252b5132
RH
8965 rel.r_offset = (sgot->output_section->vma
8966 + sgot->output_offset
00a97672 8967 + offset);
252b5132 8968
5e681ec4
PB
8969 /* If this is a static link, or it is a -Bsymbolic link and the
8970 symbol is defined locally or was forced to be local because
8971 of a version file, we just want to emit a RELATIVE reloc.
8972 The entry in the global offset table will already have been
8973 initialized in the relocate_section function. */
252b5132 8974 if (info->shared
5e681ec4
PB
8975 && SYMBOL_REFERENCES_LOCAL (info, h))
8976 {
8977 BFD_ASSERT((h->got.offset & 1) != 0);
8978 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS
8979 if (!htab->use_rel)
8980 {
8981 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
8982 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
8983 }
5e681ec4 8984 }
252b5132
RH
8985 else
8986 {
5e681ec4 8987 BFD_ASSERT((h->got.offset & 1) == 0);
00a97672 8988 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH
8989 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
8990 }
8991
00a97672
RS
8992 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
8993 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH
8994 }
8995
f5385ebf 8996 if (h->needs_copy)
252b5132
RH
8997 {
8998 asection * s;
947216bf
AM
8999 Elf_Internal_Rela rel;
9000 bfd_byte *loc;
252b5132
RH
9001
9002 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH
9003 BFD_ASSERT (h->dynindx != -1
9004 && (h->root.type == bfd_link_hash_defined
9005 || h->root.type == bfd_link_hash_defweak));
9006
9007 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 9008 RELOC_SECTION (htab, ".bss"));
252b5132
RH
9009 BFD_ASSERT (s != NULL);
9010
00a97672 9011 rel.r_addend = 0;
252b5132
RH
9012 rel.r_offset = (h->root.u.def.value
9013 + h->root.u.def.section->output_section->vma
9014 + h->root.u.def.section->output_offset);
9015 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS
9016 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
9017 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH
9018 }
9019
00a97672
RS
9020 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
9021 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
9022 to the ".got" section. */
252b5132 9023 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 9024 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH
9025 sym->st_shndx = SHN_ABS;
9026
b34976b6 9027 return TRUE;
252b5132
RH
9028}
9029
9030/* Finish up the dynamic sections. */
9031
b34976b6 9032static bfd_boolean
57e8b36a 9033elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH
9034{
9035 bfd * dynobj;
9036 asection * sgot;
9037 asection * sdyn;
9038
9039 dynobj = elf_hash_table (info)->dynobj;
9040
9041 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 9042 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH
9043 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
9044
9045 if (elf_hash_table (info)->dynamic_sections_created)
9046 {
9047 asection *splt;
9048 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 9049 struct elf32_arm_link_hash_table *htab;
252b5132 9050
229fcec5 9051 htab = elf32_arm_hash_table (info);
252b5132 9052 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 9053 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH
9054
9055 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 9056 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 9057
252b5132
RH
9058 for (; dyncon < dynconend; dyncon++)
9059 {
9060 Elf_Internal_Dyn dyn;
9061 const char * name;
9062 asection * s;
9063
9064 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
9065
9066 switch (dyn.d_tag)
9067 {
229fcec5
MM
9068 unsigned int type;
9069
252b5132
RH
9070 default:
9071 break;
9072
229fcec5
MM
9073 case DT_HASH:
9074 name = ".hash";
9075 goto get_vma_if_bpabi;
9076 case DT_STRTAB:
9077 name = ".dynstr";
9078 goto get_vma_if_bpabi;
9079 case DT_SYMTAB:
9080 name = ".dynsym";
9081 goto get_vma_if_bpabi;
c0042f5d
MM
9082 case DT_VERSYM:
9083 name = ".gnu.version";
9084 goto get_vma_if_bpabi;
9085 case DT_VERDEF:
9086 name = ".gnu.version_d";
9087 goto get_vma_if_bpabi;
9088 case DT_VERNEED:
9089 name = ".gnu.version_r";
9090 goto get_vma_if_bpabi;
9091
252b5132
RH
9092 case DT_PLTGOT:
9093 name = ".got";
9094 goto get_vma;
9095 case DT_JMPREL:
00a97672 9096 name = RELOC_SECTION (htab, ".plt");
252b5132
RH
9097 get_vma:
9098 s = bfd_get_section_by_name (output_bfd, name);
9099 BFD_ASSERT (s != NULL);
229fcec5
MM
9100 if (!htab->symbian_p)
9101 dyn.d_un.d_ptr = s->vma;
9102 else
9103 /* In the BPABI, tags in the PT_DYNAMIC section point
9104 at the file offset, not the memory address, for the
9105 convenience of the post linker. */
9106 dyn.d_un.d_ptr = s->filepos;
252b5132
RH
9107 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9108 break;
9109
229fcec5
MM
9110 get_vma_if_bpabi:
9111 if (htab->symbian_p)
9112 goto get_vma;
9113 break;
9114
252b5132 9115 case DT_PLTRELSZ:
00a97672
RS
9116 s = bfd_get_section_by_name (output_bfd,
9117 RELOC_SECTION (htab, ".plt"));
252b5132 9118 BFD_ASSERT (s != NULL);
eea6121a 9119 dyn.d_un.d_val = s->size;
252b5132
RH
9120 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9121 break;
229fcec5 9122
252b5132 9123 case DT_RELSZ:
00a97672 9124 case DT_RELASZ:
229fcec5
MM
9125 if (!htab->symbian_p)
9126 {
9127 /* My reading of the SVR4 ABI indicates that the
9128 procedure linkage table relocs (DT_JMPREL) should be
9129 included in the overall relocs (DT_REL). This is
9130 what Solaris does. However, UnixWare can not handle
9131 that case. Therefore, we override the DT_RELSZ entry
9132 here to make it not include the JMPREL relocs. Since
00a97672 9133 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM
9134 other relocation sections, we don't have to worry
9135 about changing the DT_REL entry. */
00a97672
RS
9136 s = bfd_get_section_by_name (output_bfd,
9137 RELOC_SECTION (htab, ".plt"));
229fcec5
MM
9138 if (s != NULL)
9139 dyn.d_un.d_val -= s->size;
9140 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9141 break;
9142 }
9143 /* Fall through */
9144
9145 case DT_REL:
9146 case DT_RELA:
229fcec5
MM
9147 /* In the BPABI, the DT_REL tag must point at the file
9148 offset, not the VMA, of the first relocation
9149 section. So, we use code similar to that in
9150 elflink.c, but do not check for SHF_ALLOC on the
9151 relcoation section, since relocations sections are
9152 never allocated under the BPABI. The comments above
9153 about Unixware notwithstanding, we include all of the
9154 relocations here. */
9155 if (htab->symbian_p)
9156 {
9157 unsigned int i;
9158 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
9159 ? SHT_REL : SHT_RELA);
9160 dyn.d_un.d_val = 0;
9161 for (i = 1; i < elf_numsections (output_bfd); i++)
9162 {
9163 Elf_Internal_Shdr *hdr
9164 = elf_elfsections (output_bfd)[i];
9165 if (hdr->sh_type == type)
9166 {
9167 if (dyn.d_tag == DT_RELSZ
9168 || dyn.d_tag == DT_RELASZ)
9169 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM
9170 else if ((ufile_ptr) hdr->sh_offset
9171 <= dyn.d_un.d_val - 1)
229fcec5
MM
9172 dyn.d_un.d_val = hdr->sh_offset;
9173 }
9174 }
9175 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9176 }
252b5132 9177 break;
88f7bcd5
NC
9178
9179 /* Set the bottom bit of DT_INIT/FINI if the
9180 corresponding function is Thumb. */
9181 case DT_INIT:
9182 name = info->init_function;
9183 goto get_sym;
9184 case DT_FINI:
9185 name = info->fini_function;
9186 get_sym:
9187 /* If it wasn't set by elf_bfd_final_link
4cc11e76 9188 then there is nothing to adjust. */
88f7bcd5
NC
9189 if (dyn.d_un.d_val != 0)
9190 {
9191 struct elf_link_hash_entry * eh;
9192
9193 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 9194 FALSE, FALSE, TRUE);
88f7bcd5
NC
9195 if (eh != (struct elf_link_hash_entry *) NULL
9196 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
9197 {
9198 dyn.d_un.d_val |= 1;
b34976b6 9199 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC
9200 }
9201 }
9202 break;
252b5132
RH
9203 }
9204 }
9205
24a1ba0f 9206 /* Fill in the first entry in the procedure linkage table. */
e5a52504 9207 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 9208 {
00a97672
RS
9209 const bfd_vma *plt0_entry;
9210 bfd_vma got_address, plt_address, got_displacement;
9211
9212 /* Calculate the addresses of the GOT and PLT. */
9213 got_address = sgot->output_section->vma + sgot->output_offset;
9214 plt_address = splt->output_section->vma + splt->output_offset;
9215
9216 if (htab->vxworks_p)
9217 {
9218 /* The VxWorks GOT is relocated by the dynamic linker.
9219 Therefore, we must emit relocations rather than simply
9220 computing the values now. */
9221 Elf_Internal_Rela rel;
9222
9223 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB
9224 put_arm_insn (htab, output_bfd, plt0_entry[0],
9225 splt->contents + 0);
9226 put_arm_insn (htab, output_bfd, plt0_entry[1],
9227 splt->contents + 4);
9228 put_arm_insn (htab, output_bfd, plt0_entry[2],
9229 splt->contents + 8);
00a97672
RS
9230 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
9231
9232 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
9233 rel.r_offset = plt_address + 12;
9234 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9235 rel.r_addend = 0;
9236 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
9237 htab->srelplt2->contents);
9238 }
9239 else
9240 {
9241 got_displacement = got_address - (plt_address + 16);
9242
9243 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB
9244 put_arm_insn (htab, output_bfd, plt0_entry[0],
9245 splt->contents + 0);
9246 put_arm_insn (htab, output_bfd, plt0_entry[1],
9247 splt->contents + 4);
9248 put_arm_insn (htab, output_bfd, plt0_entry[2],
9249 splt->contents + 8);
9250 put_arm_insn (htab, output_bfd, plt0_entry[3],
9251 splt->contents + 12);
5e681ec4 9252
5e681ec4 9253#ifdef FOUR_WORD_PLT
00a97672
RS
9254 /* The displacement value goes in the otherwise-unused
9255 last word of the second entry. */
9256 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 9257#else
00a97672 9258 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 9259#endif
00a97672 9260 }
f7a74f8c 9261 }
252b5132
RH
9262
9263 /* UnixWare sets the entsize of .plt to 4, although that doesn't
9264 really seem like the right value. */
74541ad4
AM
9265 if (splt->output_section->owner == output_bfd)
9266 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS
9267
9268 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
9269 {
9270 /* Correct the .rel(a).plt.unloaded relocations. They will have
9271 incorrect symbol indexes. */
9272 int num_plts;
eed62c48 9273 unsigned char *p;
00a97672
RS
9274
9275 num_plts = ((htab->splt->size - htab->plt_header_size)
9276 / htab->plt_entry_size);
9277 p = htab->srelplt2->contents + RELOC_SIZE (htab);
9278
9279 for (; num_plts; num_plts--)
9280 {
9281 Elf_Internal_Rela rel;
9282
9283 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9284 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9285 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9286 p += RELOC_SIZE (htab);
9287
9288 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9289 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9290 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9291 p += RELOC_SIZE (htab);
9292 }
9293 }
252b5132
RH
9294 }
9295
9296 /* Fill in the first three entries in the global offset table. */
229fcec5 9297 if (sgot)
252b5132 9298 {
229fcec5
MM
9299 if (sgot->size > 0)
9300 {
9301 if (sdyn == NULL)
9302 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
9303 else
9304 bfd_put_32 (output_bfd,
9305 sdyn->output_section->vma + sdyn->output_offset,
9306 sgot->contents);
9307 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
9308 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
9309 }
252b5132 9310
229fcec5
MM
9311 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
9312 }
252b5132 9313
b34976b6 9314 return TRUE;
252b5132
RH
9315}
9316
ba96a88f 9317static void
57e8b36a 9318elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 9319{
9b485d32 9320 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 9321 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC
9322
9323 i_ehdrp = elf_elfheader (abfd);
9324
94a3258f
PB
9325 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
9326 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
9327 else
9328 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 9329 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 9330
93204d3a
PB
9331 if (link_info)
9332 {
9333 globals = elf32_arm_hash_table (link_info);
9334 if (globals->byteswap_code)
9335 i_ehdrp->e_flags |= EF_ARM_BE8;
9336 }
ba96a88f
NC
9337}
9338
99e4ae17 9339static enum elf_reloc_type_class
57e8b36a 9340elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 9341{
f51e552e 9342 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ
9343 {
9344 case R_ARM_RELATIVE:
9345 return reloc_class_relative;
9346 case R_ARM_JUMP_SLOT:
9347 return reloc_class_plt;
9348 case R_ARM_COPY:
9349 return reloc_class_copy;
9350 default:
9351 return reloc_class_normal;
9352 }
9353}
9354
e16bb312
NC
9355/* Set the right machine number for an Arm ELF file. */
9356
9357static bfd_boolean
57e8b36a 9358elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC
9359{
9360 if (hdr->sh_type == SHT_NOTE)
9361 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
9362
9363 return TRUE;
9364}
9365
e489d0ae 9366static void
57e8b36a 9367elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 9368{
5a6c6817 9369 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC
9370}
9371
40a18ebd
NC
9372/* Return TRUE if this is an unwinding table entry. */
9373
9374static bfd_boolean
9375is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
9376{
0112cd26
NC
9377 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
9378 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC
9379}
9380
9381
9382/* Set the type and flags for an ARM section. We do this by
9383 the section name, which is a hack, but ought to work. */
9384
9385static bfd_boolean
9386elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
9387{
9388 const char * name;
9389
9390 name = bfd_get_section_name (abfd, sec);
9391
9392 if (is_arm_elf_unwind_section_name (abfd, name))
9393 {
9394 hdr->sh_type = SHT_ARM_EXIDX;
9395 hdr->sh_flags |= SHF_LINK_ORDER;
9396 }
9397 return TRUE;
9398}
9399
6dc132d9
L
9400/* Handle an ARM specific section when reading an object file. This is
9401 called when bfd_section_from_shdr finds a section with an unknown
9402 type. */
40a18ebd
NC
9403
9404static bfd_boolean
9405elf32_arm_section_from_shdr (bfd *abfd,
9406 Elf_Internal_Shdr * hdr,
6dc132d9
L
9407 const char *name,
9408 int shindex)
40a18ebd
NC
9409{
9410 /* There ought to be a place to keep ELF backend specific flags, but
9411 at the moment there isn't one. We just keep track of the
9412 sections by their name, instead. Fortunately, the ABI gives
9413 names for all the ARM specific sections, so we will probably get
9414 away with this. */
9415 switch (hdr->sh_type)
9416 {
9417 case SHT_ARM_EXIDX:
0951f019
RE
9418 case SHT_ARM_PREEMPTMAP:
9419 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC
9420 break;
9421
9422 default:
9423 return FALSE;
9424 }
9425
6dc132d9 9426 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC
9427 return FALSE;
9428
9429 return TRUE;
9430}
e489d0ae 9431
8e3de13a
NC
9432/* A structure used to record a list of sections, independently
9433 of the next and prev fields in the asection structure. */
9434typedef struct section_list
9435{
9436 asection * sec;
9437 struct section_list * next;
9438 struct section_list * prev;
9439}
9440section_list;
9441
9442/* Unfortunately we need to keep a list of sections for which
9443 an _arm_elf_section_data structure has been allocated. This
9444 is because it is possible for functions like elf32_arm_write_section
9445 to be called on a section which has had an elf_data_structure
9446 allocated for it (and so the used_by_bfd field is valid) but
9447 for which the ARM extended version of this structure - the
9448 _arm_elf_section_data structure - has not been allocated. */
9449static section_list * sections_with_arm_elf_section_data = NULL;
9450
9451static void
957c6e41 9452record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC
9453{
9454 struct section_list * entry;
9455
957c6e41 9456 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC
9457 if (entry == NULL)
9458 return;
9459 entry->sec = sec;
9460 entry->next = sections_with_arm_elf_section_data;
9461 entry->prev = NULL;
9462 if (entry->next != NULL)
9463 entry->next->prev = entry;
9464 sections_with_arm_elf_section_data = entry;
9465}
9466
44444f50
NC
9467static struct section_list *
9468find_arm_elf_section_entry (asection * sec)
8e3de13a
NC
9469{
9470 struct section_list * entry;
bd4aae00 9471 static struct section_list * last_entry = NULL;
8e3de13a 9472
bd4aae00
NC
9473 /* This is a short cut for the typical case where the sections are added
9474 to the sections_with_arm_elf_section_data list in forward order and
9475 then looked up here in backwards order. This makes a real difference
9476 to the ld-srec/sec64k.exp linker test. */
44444f50 9477 entry = sections_with_arm_elf_section_data;
bd4aae00
NC
9478 if (last_entry != NULL)
9479 {
9480 if (last_entry->sec == sec)
44444f50
NC
9481 entry = last_entry;
9482 else if (last_entry->next != NULL
9483 && last_entry->next->sec == sec)
9484 entry = last_entry->next;
bd4aae00 9485 }
44444f50
NC
9486
9487 for (; entry; entry = entry->next)
8e3de13a 9488 if (entry->sec == sec)
44444f50 9489 break;
bd4aae00 9490
44444f50
NC
9491 if (entry)
9492 /* Record the entry prior to this one - it is the entry we are most
9493 likely to want to locate next time. Also this way if we have been
9494 called from unrecord_section_with_arm_elf_section_data() we will not
9495 be caching a pointer that is about to be freed. */
9496 last_entry = entry->prev;
9497
9498 return entry;
9499}
9500
9501static _arm_elf_section_data *
9502get_arm_elf_section_data (asection * sec)
9503{
9504 struct section_list * entry;
9505
9506 entry = find_arm_elf_section_entry (sec);
9507
9508 if (entry)
9509 return elf32_arm_section_data (entry->sec);
9510 else
9511 return NULL;
8e3de13a
NC
9512}
9513
9514static void
9515unrecord_section_with_arm_elf_section_data (asection * sec)
9516{
9517 struct section_list * entry;
9518
44444f50
NC
9519 entry = find_arm_elf_section_entry (sec);
9520
9521 if (entry)
9522 {
9523 if (entry->prev != NULL)
9524 entry->prev->next = entry->next;
9525 if (entry->next != NULL)
9526 entry->next->prev = entry->prev;
9527 if (entry == sections_with_arm_elf_section_data)
9528 sections_with_arm_elf_section_data = entry->next;
9529 free (entry);
9530 }
8e3de13a
NC
9531}
9532
e489d0ae 9533
4e617b1e
PB
9534typedef struct
9535{
9536 void *finfo;
9537 struct bfd_link_info *info;
91a5743d
PB
9538 asection *sec;
9539 int sec_shndx;
4e617b1e
PB
9540 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
9541 asection *, struct elf_link_hash_entry *);
9542} output_arch_syminfo;
9543
9544enum map_symbol_type
9545{
9546 ARM_MAP_ARM,
9547 ARM_MAP_THUMB,
9548 ARM_MAP_DATA
9549};
9550
9551
9552/* Output a single PLT mapping symbol. */
9553
9554static bfd_boolean
9555elf32_arm_ouput_plt_map_sym (output_arch_syminfo *osi,
9556 enum map_symbol_type type,
9557 bfd_vma offset)
9558{
9559 static const char *names[3] = {"$a", "$t", "$d"};
9560 struct elf32_arm_link_hash_table *htab;
9561 Elf_Internal_Sym sym;
9562
9563 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB
9564 sym.st_value = osi->sec->output_section->vma
9565 + osi->sec->output_offset
9566 + offset;
4e617b1e
PB
9567 sym.st_size = 0;
9568 sym.st_other = 0;
9569 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB
9570 sym.st_shndx = osi->sec_shndx;
9571 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB
9572 return FALSE;
9573 return TRUE;
9574}
9575
9576
9577/* Output mapping symbols for PLT entries associated with H. */
9578
9579static bfd_boolean
9580elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
9581{
9582 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
9583 struct elf32_arm_link_hash_table *htab;
9584 struct elf32_arm_link_hash_entry *eh;
9585 bfd_vma addr;
9586
9587 htab = elf32_arm_hash_table (osi->info);
9588
9589 if (h->root.type == bfd_link_hash_indirect)
9590 return TRUE;
9591
9592 if (h->root.type == bfd_link_hash_warning)
9593 /* When warning symbols are created, they **replace** the "real"
9594 entry in the hash table, thus we never get to see the real
9595 symbol in a hash traversal. So look at it now. */
9596 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9597
9598 if (h->plt.offset == (bfd_vma) -1)
9599 return TRUE;
9600
9601 eh = (struct elf32_arm_link_hash_entry *) h;
9602 addr = h->plt.offset;
9603 if (htab->symbian_p)
9604 {
9605 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9606 return FALSE;
9607 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 4))
9608 return FALSE;
9609 }
9610 else if (htab->vxworks_p)
9611 {
9612 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9613 return FALSE;
9614 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 8))
9615 return FALSE;
9616 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr + 12))
9617 return FALSE;
9618 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 20))
9619 return FALSE;
9620 }
9621 else
9622 {
9623 bfd_boolean thumb_stub;
9624
9625 thumb_stub = eh->plt_thumb_refcount > 0 && !htab->use_blx;
9626 if (thumb_stub)
9627 {
9628 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_THUMB, addr - 4))
9629 return FALSE;
9630 }
9631#ifdef FOUR_WORD_PLT
9632 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9633 return FALSE;
9634 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 12))
9635 return FALSE;
9636#else
9637 /* A three-word PLT with no Thumb thunk contains only Arm code,
9638 so only need to output a mapping symbol for the first PLT entry and
9639 entries with thumb thunks. */
9640 if (thumb_stub || addr == 20)
9641 {
9642 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9643 return FALSE;
9644 }
9645#endif
9646 }
9647
9648 return TRUE;
9649}
9650
9651
91a5743d 9652/* Output mapping symbols for linker generated sections. */
4e617b1e
PB
9653
9654static bfd_boolean
9655elf32_arm_output_arch_local_syms (bfd *output_bfd,
9656 struct bfd_link_info *info,
9657 void *finfo, bfd_boolean (*func) (void *, const char *,
9658 Elf_Internal_Sym *,
9659 asection *,
9660 struct elf_link_hash_entry *))
9661{
9662 output_arch_syminfo osi;
9663 struct elf32_arm_link_hash_table *htab;
91a5743d
PB
9664 bfd_vma offset;
9665 bfd_size_type size;
4e617b1e
PB
9666
9667 htab = elf32_arm_hash_table (info);
4e617b1e 9668 check_use_blx(htab);
91a5743d 9669
4e617b1e
PB
9670 osi.finfo = finfo;
9671 osi.info = info;
9672 osi.func = func;
91a5743d
PB
9673
9674 /* ARM->Thumb glue. */
9675 if (htab->arm_glue_size > 0)
9676 {
9677 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9678 ARM2THUMB_GLUE_SECTION_NAME);
9679
9680 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9681 (output_bfd, osi.sec->output_section);
9682 if (info->shared || htab->root.is_relocatable_executable
9683 || htab->pic_veneer)
9684 size = ARM2THUMB_PIC_GLUE_SIZE;
9685 else if (htab->use_blx)
9686 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
9687 else
9688 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 9689
91a5743d
PB
9690 for (offset = 0; offset < htab->arm_glue_size; offset += size)
9691 {
9692 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
9693 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
9694 }
9695 }
9696
9697 /* Thumb->ARM glue. */
9698 if (htab->thumb_glue_size > 0)
9699 {
9700 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9701 THUMB2ARM_GLUE_SECTION_NAME);
9702
9703 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9704 (output_bfd, osi.sec->output_section);
9705 size = THUMB2ARM_GLUE_SIZE;
9706
9707 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
9708 {
9709 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
9710 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
9711 }
9712 }
9713
9714 /* Finally, output mapping symbols for the PLT. */
9715 if (!htab->splt || htab->splt->size == 0)
9716 return TRUE;
9717
9718 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
9719 htab->splt->output_section);
9720 osi.sec = htab->splt;
4e617b1e
PB
9721 /* Output mapping symbols for the plt header. SymbianOS does not have a
9722 plt header. */
9723 if (htab->vxworks_p)
9724 {
9725 /* VxWorks shared libraries have no PLT header. */
9726 if (!info->shared)
9727 {
9728 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9729 return FALSE;
9730 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 12))
9731 return FALSE;
9732 }
9733 }
9734 else if (!htab->symbian_p)
9735 {
9736 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9737 return FALSE;
9738#ifndef FOUR_WORD_PLT
9739 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 16))
9740 return FALSE;
9741#endif
9742 }
9743
9744 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
9745 return TRUE;
9746}
9747
e489d0ae
PB
9748/* Allocate target specific section data. */
9749
9750static bfd_boolean
9751elf32_arm_new_section_hook (bfd *abfd, asection *sec)
9752{
f592407e
AM
9753 if (!sec->used_by_bfd)
9754 {
9755 _arm_elf_section_data *sdata;
9756 bfd_size_type amt = sizeof (*sdata);
e489d0ae 9757
f592407e
AM
9758 sdata = bfd_zalloc (abfd, amt);
9759 if (sdata == NULL)
9760 return FALSE;
9761 sec->used_by_bfd = sdata;
9762 }
e489d0ae 9763
957c6e41 9764 record_section_with_arm_elf_section_data (sec);
8e3de13a 9765
e489d0ae
PB
9766 return _bfd_elf_new_section_hook (abfd, sec);
9767}
9768
9769
9770/* Used to order a list of mapping symbols by address. */
9771
9772static int
9773elf32_arm_compare_mapping (const void * a, const void * b)
9774{
9775 return ((const elf32_arm_section_map *) a)->vma
9776 > ((const elf32_arm_section_map *) b)->vma;
9777}
9778
9779
9780/* Do code byteswapping. Return FALSE afterwards so that the section is
9781 written out as normal. */
9782
9783static bfd_boolean
c7b8f16e
JB
9784elf32_arm_write_section (bfd *output_bfd,
9785 struct bfd_link_info *link_info, asection *sec,
e489d0ae
PB
9786 bfd_byte *contents)
9787{
c7b8f16e 9788 int mapcount, errcount;
8e3de13a 9789 _arm_elf_section_data *arm_data;
c7b8f16e 9790 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 9791 elf32_arm_section_map *map;
c7b8f16e 9792 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB
9793 bfd_vma ptr;
9794 bfd_vma end;
c7b8f16e 9795 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB
9796 bfd_byte tmp;
9797 int i;
57e8b36a 9798
8e3de13a
NC
9799 /* If this section has not been allocated an _arm_elf_section_data
9800 structure then we cannot record anything. */
9801 arm_data = get_arm_elf_section_data (sec);
9802 if (arm_data == NULL)
9803 return FALSE;
9804
9805 mapcount = arm_data->mapcount;
9806 map = arm_data->map;
c7b8f16e
JB
9807 errcount = arm_data->erratumcount;
9808
9809 if (errcount != 0)
9810 {
9811 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
9812
9813 for (errnode = arm_data->erratumlist; errnode != 0;
9814 errnode = errnode->next)
9815 {
9816 bfd_vma index = errnode->vma - offset;
9817
9818 switch (errnode->type)
9819 {
9820 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
9821 {
9822 bfd_vma branch_to_veneer;
9823 /* Original condition code of instruction, plus bit mask for
9824 ARM B instruction. */
9825 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
9826 | 0x0a000000;
9827
9828 /* The instruction is before the label. */
9829 index -= 4;
9830
9831 /* Above offset included in -4 below. */
9832 branch_to_veneer = errnode->u.b.veneer->vma
9833 - errnode->vma - 4;
9834
9835 if ((signed) branch_to_veneer < -(1 << 25)
9836 || (signed) branch_to_veneer >= (1 << 25))
9837 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
9838 "range"), output_bfd);
9839
9840 insn |= (branch_to_veneer >> 2) & 0xffffff;
9841 contents[endianflip ^ index] = insn & 0xff;
9842 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
9843 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
9844 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
9845 }
9846 break;
9847
9848 case VFP11_ERRATUM_ARM_VENEER:
9849 {
9850 bfd_vma branch_from_veneer;
9851 unsigned int insn;
9852
9853 /* Take size of veneer into account. */
9854 branch_from_veneer = errnode->u.v.branch->vma
9855 - errnode->vma - 12;
9856
9857 if ((signed) branch_from_veneer < -(1 << 25)
9858 || (signed) branch_from_veneer >= (1 << 25))
9859 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
9860 "range"), output_bfd);
9861
9862 /* Original instruction. */
9863 insn = errnode->u.v.branch->u.b.vfp_insn;
9864 contents[endianflip ^ index] = insn & 0xff;
9865 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
9866 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
9867 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
9868
9869 /* Branch back to insn after original insn. */
9870 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
9871 contents[endianflip ^ (index + 4)] = insn & 0xff;
9872 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
9873 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
9874 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
9875 }
9876 break;
9877
9878 default:
9879 abort ();
9880 }
9881 }
9882 }
e489d0ae
PB
9883
9884 if (mapcount == 0)
9885 return FALSE;
9886
c7b8f16e 9887 if (globals->byteswap_code)
e489d0ae 9888 {
c7b8f16e 9889 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 9890
c7b8f16e
JB
9891 ptr = map[0].vma;
9892 for (i = 0; i < mapcount; i++)
9893 {
9894 if (i == mapcount - 1)
9895 end = sec->size;
9896 else
9897 end = map[i + 1].vma;
e489d0ae 9898
c7b8f16e 9899 switch (map[i].type)
e489d0ae 9900 {
c7b8f16e
JB
9901 case 'a':
9902 /* Byte swap code words. */
9903 while (ptr + 3 < end)
9904 {
9905 tmp = contents[ptr];
9906 contents[ptr] = contents[ptr + 3];
9907 contents[ptr + 3] = tmp;
9908 tmp = contents[ptr + 1];
9909 contents[ptr + 1] = contents[ptr + 2];
9910 contents[ptr + 2] = tmp;
9911 ptr += 4;
9912 }
9913 break;
e489d0ae 9914
c7b8f16e
JB
9915 case 't':
9916 /* Byte swap code halfwords. */
9917 while (ptr + 1 < end)
9918 {
9919 tmp = contents[ptr];
9920 contents[ptr] = contents[ptr + 1];
9921 contents[ptr + 1] = tmp;
9922 ptr += 2;
9923 }
9924 break;
9925
9926 case 'd':
9927 /* Leave data alone. */
9928 break;
9929 }
9930 ptr = end;
9931 }
e489d0ae 9932 }
8e3de13a 9933
93204d3a 9934 free (map);
8e3de13a 9935 arm_data->mapcount = 0;
c7b8f16e 9936 arm_data->mapsize = 0;
8e3de13a
NC
9937 arm_data->map = NULL;
9938 unrecord_section_with_arm_elf_section_data (sec);
9939
e489d0ae
PB
9940 return FALSE;
9941}
9942
957c6e41
NC
9943static void
9944unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
9945 asection * sec,
9946 void * ignore ATTRIBUTE_UNUSED)
9947{
9948 unrecord_section_with_arm_elf_section_data (sec);
9949}
9950
9951static bfd_boolean
9952elf32_arm_close_and_cleanup (bfd * abfd)
9953{
b25e3d87
L
9954 if (abfd->sections)
9955 bfd_map_over_sections (abfd,
9956 unrecord_section_via_map_over_sections,
9957 NULL);
957c6e41
NC
9958
9959 return _bfd_elf_close_and_cleanup (abfd);
9960}
9961
b25e3d87
L
9962static bfd_boolean
9963elf32_arm_bfd_free_cached_info (bfd * abfd)
9964{
9965 if (abfd->sections)
9966 bfd_map_over_sections (abfd,
9967 unrecord_section_via_map_over_sections,
9968 NULL);
9969
9970 return _bfd_free_cached_info (abfd);
9971}
9972
b7693d02
DJ
9973/* Display STT_ARM_TFUNC symbols as functions. */
9974
9975static void
9976elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
9977 asymbol *asym)
9978{
9979 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
9980
9981 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
9982 elfsym->symbol.flags |= BSF_FUNCTION;
9983}
9984
0beaef2b
PB
9985
9986/* Mangle thumb function symbols as we read them in. */
9987
8384fb8f 9988static bfd_boolean
0beaef2b
PB
9989elf32_arm_swap_symbol_in (bfd * abfd,
9990 const void *psrc,
9991 const void *pshn,
9992 Elf_Internal_Sym *dst)
9993{
8384fb8f
AM
9994 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
9995 return FALSE;
0beaef2b
PB
9996
9997 /* New EABI objects mark thumb function symbols by setting the low bit of
9998 the address. Turn these into STT_ARM_TFUNC. */
9999 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
10000 && (dst->st_value & 1))
10001 {
10002 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
10003 dst->st_value &= ~(bfd_vma) 1;
10004 }
8384fb8f 10005 return TRUE;
0beaef2b
PB
10006}
10007
10008
10009/* Mangle thumb function symbols as we write them out. */
10010
10011static void
10012elf32_arm_swap_symbol_out (bfd *abfd,
10013 const Elf_Internal_Sym *src,
10014 void *cdst,
10015 void *shndx)
10016{
10017 Elf_Internal_Sym newsym;
10018
10019 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
10020 of the address set, as per the new EABI. We do this unconditionally
10021 because objcopy does not set the elf header flags until after
10022 it writes out the symbol table. */
10023 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
10024 {
10025 newsym = *src;
10026 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB
10027 if (newsym.st_shndx != SHN_UNDEF)
10028 {
10029 /* Do this only for defined symbols. At link type, the static
10030 linker will simulate the work of dynamic linker of resolving
10031 symbols and will carry over the thumbness of found symbols to
10032 the output symbol table. It's not clear how it happens, but
b0fead2b 10033 the thumbness of undefined symbols can well be different at
0fa3dcad
PB
10034 runtime, and writing '1' for them will be confusing for users
10035 and possibly for dynamic linker itself.
10036 */
10037 newsym.st_value |= 1;
10038 }
0beaef2b
PB
10039
10040 src = &newsym;
10041 }
10042 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
10043}
10044
b294bdf8
MM
10045/* Add the PT_ARM_EXIDX program header. */
10046
10047static bfd_boolean
10048elf32_arm_modify_segment_map (bfd *abfd,
10049 struct bfd_link_info *info ATTRIBUTE_UNUSED)
10050{
10051 struct elf_segment_map *m;
10052 asection *sec;
10053
10054 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10055 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10056 {
10057 /* If there is already a PT_ARM_EXIDX header, then we do not
10058 want to add another one. This situation arises when running
10059 "strip"; the input binary already has the header. */
10060 m = elf_tdata (abfd)->segment_map;
10061 while (m && m->p_type != PT_ARM_EXIDX)
10062 m = m->next;
10063 if (!m)
10064 {
10065 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
10066 if (m == NULL)
10067 return FALSE;
10068 m->p_type = PT_ARM_EXIDX;
10069 m->count = 1;
10070 m->sections[0] = sec;
10071
10072 m->next = elf_tdata (abfd)->segment_map;
10073 elf_tdata (abfd)->segment_map = m;
10074 }
10075 }
10076
10077 return TRUE;
10078}
10079
10080/* We may add a PT_ARM_EXIDX program header. */
10081
10082static int
a6b96beb
AM
10083elf32_arm_additional_program_headers (bfd *abfd,
10084 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM
10085{
10086 asection *sec;
10087
10088 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10089 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10090 return 1;
10091 else
10092 return 0;
10093}
10094
fcb93ecf
PB
10095/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
10096static bfd_boolean
10097elf32_arm_is_function_type (unsigned int type)
10098{
10099 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
10100}
10101
0beaef2b
PB
10102/* We use this to override swap_symbol_in and swap_symbol_out. */
10103const struct elf_size_info elf32_arm_size_info = {
10104 sizeof (Elf32_External_Ehdr),
10105 sizeof (Elf32_External_Phdr),
10106 sizeof (Elf32_External_Shdr),
10107 sizeof (Elf32_External_Rel),
10108 sizeof (Elf32_External_Rela),
10109 sizeof (Elf32_External_Sym),
10110 sizeof (Elf32_External_Dyn),
10111 sizeof (Elf_External_Note),
10112 4,
10113 1,
10114 32, 2,
10115 ELFCLASS32, EV_CURRENT,
10116 bfd_elf32_write_out_phdrs,
10117 bfd_elf32_write_shdrs_and_ehdr,
10118 bfd_elf32_write_relocs,
10119 elf32_arm_swap_symbol_in,
10120 elf32_arm_swap_symbol_out,
10121 bfd_elf32_slurp_reloc_table,
10122 bfd_elf32_slurp_symbol_table,
10123 bfd_elf32_swap_dyn_in,
10124 bfd_elf32_swap_dyn_out,
10125 bfd_elf32_swap_reloc_in,
10126 bfd_elf32_swap_reloc_out,
10127 bfd_elf32_swap_reloca_in,
10128 bfd_elf32_swap_reloca_out
10129};
10130
252b5132
RH
10131#define ELF_ARCH bfd_arch_arm
10132#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC
10133#ifdef __QNXTARGET__
10134#define ELF_MAXPAGESIZE 0x1000
10135#else
f21f3fe0 10136#define ELF_MAXPAGESIZE 0x8000
d0facd1b 10137#endif
b1342370 10138#define ELF_MINPAGESIZE 0x1000
24718e3b 10139#define ELF_COMMONPAGESIZE 0x1000
252b5132 10140
ba93b8ac
DJ
10141#define bfd_elf32_mkobject elf32_arm_mkobject
10142
99e4ae17
AJ
10143#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
10144#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH
10145#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
10146#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
10147#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 10148#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 10149#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 10150#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 10151#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 10152#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 10153#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 10154#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 10155#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
252b5132
RH
10156
10157#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
10158#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 10159#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH
10160#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
10161#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 10162#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 10163#define elf_backend_write_section elf32_arm_write_section
252b5132 10164#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 10165#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH
10166#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
10167#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
10168#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 10169#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 10170#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 10171#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 10172#define elf_backend_object_p elf32_arm_object_p
e16bb312 10173#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC
10174#define elf_backend_fake_sections elf32_arm_fake_sections
10175#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 10176#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 10177#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 10178#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 10179#define elf_backend_size_info elf32_arm_size_info
b294bdf8
MM
10180#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
10181#define elf_backend_additional_program_headers \
10182 elf32_arm_additional_program_headers
4e617b1e
PB
10183#define elf_backend_output_arch_local_syms \
10184 elf32_arm_output_arch_local_syms
a4fd1a8e
PB
10185#define elf_backend_begin_write_processing \
10186 elf32_arm_begin_write_processing
fcb93ecf 10187#define elf_backend_is_function_type elf32_arm_is_function_type
252b5132 10188
5e681ec4 10189#define elf_backend_can_refcount 1
252b5132
RH
10190#define elf_backend_can_gc_sections 1
10191#define elf_backend_plt_readonly 1
10192#define elf_backend_want_got_plt 1
10193#define elf_backend_want_plt_sym 0
4e7fd91e
PB
10194#define elf_backend_may_use_rel_p 1
10195#define elf_backend_may_use_rela_p 0
10196#define elf_backend_default_use_rela_p 0
252b5132 10197
04f7c78d 10198#define elf_backend_got_header_size 12
04f7c78d 10199
104d59d1
JM
10200#undef elf_backend_obj_attrs_vendor
10201#define elf_backend_obj_attrs_vendor "aeabi"
10202#undef elf_backend_obj_attrs_section
10203#define elf_backend_obj_attrs_section ".ARM.attributes"
10204#undef elf_backend_obj_attrs_arg_type
10205#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
10206#undef elf_backend_obj_attrs_section_type
10207#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
10208
252b5132 10209#include "elf32-target.h"
7f266840 10210
4e7fd91e
PB
10211/* VxWorks Targets */
10212
10213#undef TARGET_LITTLE_SYM
10214#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
10215#undef TARGET_LITTLE_NAME
10216#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
10217#undef TARGET_BIG_SYM
10218#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
10219#undef TARGET_BIG_NAME
10220#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
10221
10222/* Like elf32_arm_link_hash_table_create -- but overrides
10223 appropriately for VxWorks. */
10224static struct bfd_link_hash_table *
10225elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
10226{
10227 struct bfd_link_hash_table *ret;
10228
10229 ret = elf32_arm_link_hash_table_create (abfd);
10230 if (ret)
10231 {
10232 struct elf32_arm_link_hash_table *htab
00a97672 10233 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 10234 htab->use_rel = 0;
00a97672 10235 htab->vxworks_p = 1;
4e7fd91e
PB
10236 }
10237 return ret;
10238}
10239
00a97672
RS
10240static void
10241elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
10242{
10243 elf32_arm_final_write_processing (abfd, linker);
10244 elf_vxworks_final_write_processing (abfd, linker);
10245}
10246
4e7fd91e
PB
10247#undef elf32_bed
10248#define elf32_bed elf32_arm_vxworks_bed
10249
10250#undef bfd_elf32_bfd_link_hash_table_create
10251#define bfd_elf32_bfd_link_hash_table_create \
10252 elf32_arm_vxworks_link_hash_table_create
00a97672
RS
10253#undef elf_backend_add_symbol_hook
10254#define elf_backend_add_symbol_hook \
10255 elf_vxworks_add_symbol_hook
10256#undef elf_backend_final_write_processing
10257#define elf_backend_final_write_processing \
10258 elf32_arm_vxworks_final_write_processing
10259#undef elf_backend_emit_relocs
10260#define elf_backend_emit_relocs \
10261 elf_vxworks_emit_relocs
4e7fd91e
PB
10262
10263#undef elf_backend_may_use_rel_p
00a97672 10264#define elf_backend_may_use_rel_p 0
4e7fd91e 10265#undef elf_backend_may_use_rela_p
00a97672 10266#define elf_backend_may_use_rela_p 1
4e7fd91e 10267#undef elf_backend_default_use_rela_p
00a97672 10268#define elf_backend_default_use_rela_p 1
00a97672
RS
10269#undef elf_backend_want_plt_sym
10270#define elf_backend_want_plt_sym 1
10271#undef ELF_MAXPAGESIZE
10272#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB
10273
10274#include "elf32-target.h"
10275
10276
7f266840
DJ
10277/* Symbian OS Targets */
10278
10279#undef TARGET_LITTLE_SYM
10280#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
10281#undef TARGET_LITTLE_NAME
10282#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
10283#undef TARGET_BIG_SYM
10284#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
10285#undef TARGET_BIG_NAME
10286#define TARGET_BIG_NAME "elf32-bigarm-symbian"
10287
10288/* Like elf32_arm_link_hash_table_create -- but overrides
10289 appropriately for Symbian OS. */
10290static struct bfd_link_hash_table *
10291elf32_arm_symbian_link_hash_table_create (bfd *abfd)
10292{
10293 struct bfd_link_hash_table *ret;
10294
10295 ret = elf32_arm_link_hash_table_create (abfd);
10296 if (ret)
10297 {
10298 struct elf32_arm_link_hash_table *htab
10299 = (struct elf32_arm_link_hash_table *)ret;
10300 /* There is no PLT header for Symbian OS. */
10301 htab->plt_header_size = 0;
10302 /* The PLT entries are each three instructions. */
10303 htab->plt_entry_size = 4 * NUM_ELEM (elf32_arm_symbian_plt_entry);
10304 htab->symbian_p = 1;
33bfe774
JB
10305 /* Symbian uses armv5t or above, so use_blx is always true. */
10306 htab->use_blx = 1;
67687978 10307 htab->root.is_relocatable_executable = 1;
7f266840
DJ
10308 }
10309 return ret;
10310}
10311
b35d266b 10312static const struct bfd_elf_special_section
551b43fd 10313elf32_arm_symbian_special_sections[] =
7f266840 10314{
5cd3778d
MM
10315 /* In a BPABI executable, the dynamic linking sections do not go in
10316 the loadable read-only segment. The post-linker may wish to
10317 refer to these sections, but they are not part of the final
10318 program image. */
0112cd26
NC
10319 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
10320 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
10321 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
10322 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
10323 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM
10324 /* These sections do not need to be writable as the SymbianOS
10325 postlinker will arrange things so that no dynamic relocation is
10326 required. */
0112cd26
NC
10327 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
10328 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
10329 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
10330 { NULL, 0, 0, 0, 0 }
7f266840
DJ
10331};
10332
c3c76620 10333static void
b34af79c 10334elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 10335 struct bfd_link_info *link_info)
c3c76620
MM
10336{
10337 /* BPABI objects are never loaded directly by an OS kernel; they are
10338 processed by a postlinker first, into an OS-specific format. If
10339 the D_PAGED bit is set on the file, BFD will align segments on
10340 page boundaries, so that an OS can directly map the file. With
10341 BPABI objects, that just results in wasted space. In addition,
10342 because we clear the D_PAGED bit, map_sections_to_segments will
10343 recognize that the program headers should not be mapped into any
10344 loadable segment. */
10345 abfd->flags &= ~D_PAGED;
a4fd1a8e 10346 elf32_arm_begin_write_processing(abfd, link_info);
c3c76620 10347}
7f266840
DJ
10348
10349static bfd_boolean
b34af79c 10350elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 10351 struct bfd_link_info *info)
7f266840
DJ
10352{
10353 struct elf_segment_map *m;
10354 asection *dynsec;
10355
7f266840
DJ
10356 /* BPABI shared libraries and executables should have a PT_DYNAMIC
10357 segment. However, because the .dynamic section is not marked
10358 with SEC_LOAD, the generic ELF code will not create such a
10359 segment. */
10360 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
10361 if (dynsec)
10362 {
8ded5a0f
AM
10363 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
10364 if (m->p_type == PT_DYNAMIC)
10365 break;
10366
10367 if (m == NULL)
10368 {
10369 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
10370 m->next = elf_tdata (abfd)->segment_map;
10371 elf_tdata (abfd)->segment_map = m;
10372 }
7f266840
DJ
10373 }
10374
b294bdf8
MM
10375 /* Also call the generic arm routine. */
10376 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ
10377}
10378
10379#undef elf32_bed
10380#define elf32_bed elf32_arm_symbian_bed
10381
10382/* The dynamic sections are not allocated on SymbianOS; the postlinker
10383 will process them and then discard them. */
10384#undef ELF_DYNAMIC_SEC_FLAGS
10385#define ELF_DYNAMIC_SEC_FLAGS \
10386 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
10387
10388#undef bfd_elf32_bfd_link_hash_table_create
10389#define bfd_elf32_bfd_link_hash_table_create \
10390 elf32_arm_symbian_link_hash_table_create
00a97672 10391#undef elf_backend_add_symbol_hook
7f266840 10392
29ef7005
L
10393#undef elf_backend_special_sections
10394#define elf_backend_special_sections elf32_arm_symbian_special_sections
7f266840 10395
c3c76620
MM
10396#undef elf_backend_begin_write_processing
10397#define elf_backend_begin_write_processing \
10398 elf32_arm_symbian_begin_write_processing
00a97672
RS
10399#undef elf_backend_final_write_processing
10400#define elf_backend_final_write_processing \
10401 elf32_arm_final_write_processing
10402#undef elf_backend_emit_relocs
c3c76620 10403
7f266840
DJ
10404#undef elf_backend_modify_segment_map
10405#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
10406
10407/* There is no .got section for BPABI objects, and hence no header. */
10408#undef elf_backend_got_header_size
10409#define elf_backend_got_header_size 0
10410
10411/* Similarly, there is no .got.plt section. */
10412#undef elf_backend_want_got_plt
10413#define elf_backend_want_got_plt 0
10414
4e7fd91e 10415#undef elf_backend_may_use_rel_p
00a97672 10416#define elf_backend_may_use_rel_p 1
4e7fd91e 10417#undef elf_backend_may_use_rela_p
00a97672 10418#define elf_backend_may_use_rela_p 0
4e7fd91e 10419#undef elf_backend_default_use_rela_p
00a97672 10420#define elf_backend_default_use_rela_p 0
00a97672
RS
10421#undef elf_backend_want_plt_sym
10422#define elf_backend_want_plt_sym 0
10423#undef ELF_MAXPAGESIZE
10424#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 10425
7f266840 10426#include "elf32-target.h"
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