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2009-07-10 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
81694485 3 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
48229727
JB		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2031 is inserted in arm_build_one_stub(). */
2032#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2033#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2034#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2035#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2036#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2037#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2038
2039typedef struct
2040{
2041 bfd_vma data;
2042 enum stub_insn_type type;
ebe24dd4 2043 unsigned int r_type;
461a49ca
DJ		 2044 int reloc_addend;
2045} insn_sequence;
2046
fea2b4d6
CL		 2047/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2048 to reach the stub if necessary. */
461a49ca 2049static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2050 {
461a49ca
DJ		 2051 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2052 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2053 };
2054
fea2b4d6
CL		 2055/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2056 available. */
461a49ca 2057static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2058 {
461a49ca
DJ		 2059 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2060 ARM_INSN(0xe12fff1c), /* bx ip */
2061 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2062 };
2063
d3626fb0 2064/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2065static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2066 {
461a49ca
DJ		 2067 THUMB16_INSN(0xb401), /* push {r0} */
2068 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2069 THUMB16_INSN(0x4684), /* mov ip, r0 */
2070 THUMB16_INSN(0xbc01), /* pop {r0} */
2071 THUMB16_INSN(0x4760), /* bx ip */
2072 THUMB16_INSN(0xbf00), /* nop */
2073 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2074 };
2075
d3626fb0
CL		 2076/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2077 allowed. */
2078static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2079 {
2080 THUMB16_INSN(0x4778), /* bx pc */
2081 THUMB16_INSN(0x46c0), /* nop */
2082 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2083 ARM_INSN(0xe12fff1c), /* bx ip */
2084 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2085 };
2086
fea2b4d6
CL		 2087/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2088 available. */
461a49ca 2089static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2090 {
461a49ca
DJ		 2091 THUMB16_INSN(0x4778), /* bx pc */
2092 THUMB16_INSN(0x46c0), /* nop */
2093 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2094 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2095 };
2096
fea2b4d6
CL		 2097/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2098 one, when the destination is close enough. */
461a49ca 2099static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2100 {
461a49ca
DJ		 2101 THUMB16_INSN(0x4778), /* bx pc */
2102 THUMB16_INSN(0x46c0), /* nop */
2103 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2104 };
2105
cf3eccff 2106/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2107 blx to reach the stub if necessary. */
cf3eccff 2108static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2109 {
461a49ca
DJ		 2110 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2111 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2112 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2113 };
2114
cf3eccff
DJ		 2115/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2116 blx to reach the stub if necessary. We can not add into pc;
2117 it is not guaranteed to mode switch (different in ARMv6 and
2118 ARMv7). */
2119static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2120 {
2121 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2122 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2123 ARM_INSN(0xe12fff1c), /* bx ip */
2124 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2125 };
2126
ebe24dd4
CL		 2127/* V4T ARM -> ARM long branch stub, PIC. */
2128static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2129 {
2130 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2131 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2132 ARM_INSN(0xe12fff1c), /* bx ip */
2133 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2134 };
2135
2136/* V4T Thumb -> ARM long branch stub, PIC. */
2137static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2138 {
2139 THUMB16_INSN(0x4778), /* bx pc */
2140 THUMB16_INSN(0x46c0), /* nop */
2141 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2142 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2143 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2144 };
2145
d3626fb0
CL		 2146/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2147 architectures. */
ebe24dd4
CL		 2148static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2149 {
2150 THUMB16_INSN(0xb401), /* push {r0} */
2151 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2152 THUMB16_INSN(0x46fc), /* mov ip, pc */
2153 THUMB16_INSN(0x4484), /* add ip, r0 */
2154 THUMB16_INSN(0xbc01), /* pop {r0} */
2155 THUMB16_INSN(0x4760), /* bx ip */
2156 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2157 };
2158
d3626fb0
CL		 2159/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2160 allowed. */
2161static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2162 {
2163 THUMB16_INSN(0x4778), /* bx pc */
2164 THUMB16_INSN(0x46c0), /* nop */
2165 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2166 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2167 ARM_INSN(0xe12fff1c), /* bx ip */
2168 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2169 };
2170
48229727
JB		 2171/* Cortex-A8 erratum-workaround stubs. */
2172
2173/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2174 can't use a conditional branch to reach this stub). */
2175
2176static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2177 {
2178 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2179 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2180 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2181 };
2182
2183/* Stub used for b.w and bl.w instructions. */
2184
2185static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2186 {
2187 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2188 };
2189
2190static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2191 {
2192 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2193 };
2194
2195/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2196 instruction (which switches to ARM mode) to point to this stub. Jump to the
2197 real destination using an ARM-mode branch. */
2198
2199static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2200 {
2201 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2202 };
2203
906e58ca
NC		 2204/* Section name for stubs is the associated section name plus this
2205 string. */
2206#define STUB_SUFFIX ".stub"
2207
738a79f6
CL		 2208/* One entry per long/short branch stub defined above. */
2209#define DEF_STUBS \
2210 DEF_STUB(long_branch_any_any) \
2211 DEF_STUB(long_branch_v4t_arm_thumb) \
2212 DEF_STUB(long_branch_thumb_only) \
2213 DEF_STUB(long_branch_v4t_thumb_thumb) \
2214 DEF_STUB(long_branch_v4t_thumb_arm) \
2215 DEF_STUB(short_branch_v4t_thumb_arm) \
2216 DEF_STUB(long_branch_any_arm_pic) \
2217 DEF_STUB(long_branch_any_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2220 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2221 DEF_STUB(long_branch_thumb_only_pic) \
2222 DEF_STUB(a8_veneer_b_cond) \
2223 DEF_STUB(a8_veneer_b) \
2224 DEF_STUB(a8_veneer_bl) \
2225 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2226
2227#define DEF_STUB(x) arm_stub_##x,
2228enum elf32_arm_stub_type {
906e58ca 2229 arm_stub_none,
738a79f6
CL		 2230 DEF_STUBS
2231};
2232#undef DEF_STUB
2233
2234typedef struct
2235{
2236 const insn_sequence* template;
2237 int template_size;
2238} stub_def;
2239
2240#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2241static const stub_def stub_definitions[] = {
2242 {NULL, 0},
2243 DEF_STUBS
906e58ca
NC		 2244};
2245
2246struct elf32_arm_stub_hash_entry
2247{
2248 /* Base hash table entry structure. */
2249 struct bfd_hash_entry root;
2250
2251 /* The stub section. */
2252 asection *stub_sec;
2253
2254 /* Offset within stub_sec of the beginning of this stub. */
2255 bfd_vma stub_offset;
2256
2257 /* Given the symbol's value and its section we can determine its final
2258 value when building the stubs (so the stub knows where to jump). */
2259 bfd_vma target_value;
2260 asection *target_section;
2261
48229727
JB		 2262 /* Offset to apply to relocation referencing target_value. */
2263 bfd_vma target_addend;
2264
2265 /* The instruction which caused this stub to be generated (only valid for
2266 Cortex-A8 erratum workaround stubs at present). */
2267 unsigned long orig_insn;
2268
461a49ca 2269 /* The stub type. */
906e58ca 2270 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2271 /* Its encoding size in bytes. */
2272 int stub_size;
2273 /* Its template. */
2274 const insn_sequence *stub_template;
2275 /* The size of the template (number of entries). */
2276 int stub_template_size;
906e58ca
NC		 2277
2278 /* The symbol table entry, if any, that this was derived from. */
2279 struct elf32_arm_link_hash_entry *h;
2280
2281 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2282 unsigned char st_type;
2283
2284 /* Where this stub is being called from, or, in the case of combined
2285 stub sections, the first input section in the group. */
2286 asection *id_sec;
7413f23f
DJ		 2287
2288 /* The name for the local symbol at the start of this stub. The
2289 stub name in the hash table has to be unique; this does not, so
2290 it can be friendlier. */
2291 char *output_name;
906e58ca
NC		 2292};
2293
e489d0ae
PB		 2294/* Used to build a map of a section. This is required for mixed-endian
2295 code/data. */
2296
2297typedef struct elf32_elf_section_map
2298{
2299 bfd_vma vma;
2300 char type;
2301}
2302elf32_arm_section_map;
2303
c7b8f16e
JB		 2304/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2305
2306typedef enum
2307{
2308 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2309 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2310 VFP11_ERRATUM_ARM_VENEER,
2311 VFP11_ERRATUM_THUMB_VENEER
2312}
2313elf32_vfp11_erratum_type;
2314
2315typedef struct elf32_vfp11_erratum_list
2316{
2317 struct elf32_vfp11_erratum_list *next;
2318 bfd_vma vma;
2319 union
2320 {
2321 struct
2322 {
2323 struct elf32_vfp11_erratum_list *veneer;
2324 unsigned int vfp_insn;
2325 } b;
2326 struct
2327 {
2328 struct elf32_vfp11_erratum_list *branch;
2329 unsigned int id;
2330 } v;
2331 } u;
2332 elf32_vfp11_erratum_type type;
2333}
2334elf32_vfp11_erratum_list;
2335
2468f9c9
PB		 2336typedef enum
2337{
2338 DELETE_EXIDX_ENTRY,
2339 INSERT_EXIDX_CANTUNWIND_AT_END
2340}
2341arm_unwind_edit_type;
2342
2343/* A (sorted) list of edits to apply to an unwind table. */
2344typedef struct arm_unwind_table_edit
2345{
2346 arm_unwind_edit_type type;
2347 /* Note: we sometimes want to insert an unwind entry corresponding to a
2348 section different from the one we're currently writing out, so record the
2349 (text) section this edit relates to here. */
2350 asection *linked_section;
2351 unsigned int index;
2352 struct arm_unwind_table_edit *next;
2353}
2354arm_unwind_table_edit;
2355
8e3de13a 2356typedef struct _arm_elf_section_data
e489d0ae 2357{
2468f9c9 2358 /* Information about mapping symbols. */
e489d0ae 2359 struct bfd_elf_section_data elf;
8e3de13a 2360 unsigned int mapcount;
c7b8f16e 2361 unsigned int mapsize;
e489d0ae 2362 elf32_arm_section_map *map;
2468f9c9 2363 /* Information about CPU errata. */
c7b8f16e
JB		 2364 unsigned int erratumcount;
2365 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2366 /* Information about unwind tables. */
2367 union
2368 {
2369 /* Unwind info attached to a text section. */
2370 struct
2371 {
2372 asection *arm_exidx_sec;
2373 } text;
2374
2375 /* Unwind info attached to an .ARM.exidx section. */
2376 struct
2377 {
2378 arm_unwind_table_edit *unwind_edit_list;
2379 arm_unwind_table_edit *unwind_edit_tail;
2380 } exidx;
2381 } u;
8e3de13a
NC		 2382}
2383_arm_elf_section_data;
e489d0ae
PB		 2384
2385#define elf32_arm_section_data(sec) \
8e3de13a 2386 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2387
48229727
JB		 2388/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2389 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2390 so may be created multiple times: we use an array of these entries whilst
2391 relaxing which we can refresh easily, then create stubs for each potentially
2392 erratum-triggering instruction once we've settled on a solution. */
2393
2394struct a8_erratum_fix {
2395 bfd *input_bfd;
2396 asection *section;
2397 bfd_vma offset;
2398 bfd_vma addend;
2399 unsigned long orig_insn;
2400 char *stub_name;
2401 enum elf32_arm_stub_type stub_type;
2402};
2403
2404/* A table of relocs applied to branches which might trigger Cortex-A8
2405 erratum. */
2406
2407struct a8_erratum_reloc {
2408 bfd_vma from;
2409 bfd_vma destination;
2410 unsigned int r_type;
2411 unsigned char st_type;
2412 const char *sym_name;
2413 bfd_boolean non_a8_stub;
2414};
2415
ba93b8ac
DJ		 2416/* The size of the thread control block. */
2417#define TCB_SIZE 8
2418
0ffa91dd 2419struct elf_arm_obj_tdata
ba93b8ac
DJ		 2420{
2421 struct elf_obj_tdata root;
2422
2423 /* tls_type for each local got entry. */
2424 char *local_got_tls_type;
ee065d83 2425
bf21ed78
MS		 2426 /* Zero to warn when linking objects with incompatible enum sizes. */
2427 int no_enum_size_warning;
a9dc9481
JM		 2428
2429 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2430 int no_wchar_size_warning;
ba93b8ac
DJ		 2431};
2432
0ffa91dd
NC		 2433#define elf_arm_tdata(bfd) \
2434 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2435
0ffa91dd
NC		 2436#define elf32_arm_local_got_tls_type(bfd) \
2437 (elf_arm_tdata (bfd)->local_got_tls_type)
2438
2439#define is_arm_elf(bfd) \
2440 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2441 && elf_tdata (bfd) != NULL \
2442 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2443
2444static bfd_boolean
2445elf32_arm_mkobject (bfd *abfd)
2446{
0ffa91dd
NC		 2447 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2448 ARM_ELF_TDATA);
ba93b8ac
DJ		 2449}
2450
252b5132
RH		 2451/* The ARM linker needs to keep track of the number of relocs that it
2452 decides to copy in check_relocs for each symbol. This is so that
2453 it can discard PC relative relocs if it doesn't need them when
2454 linking with -Bsymbolic. We store the information in a field
2455 extending the regular ELF linker hash table. */
2456
ba93b8ac
DJ		 2457/* This structure keeps track of the number of relocs we have copied
2458 for a given symbol. */
5e681ec4 2459struct elf32_arm_relocs_copied
917583ad
NC		 2460 {
2461 /* Next section. */
5e681ec4 2462 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2463 /* A section in dynobj. */
2464 asection * section;
2465 /* Number of relocs copied in this section. */
2466 bfd_size_type count;
ba93b8ac
DJ		 2467 /* Number of PC-relative relocs copied in this section. */
2468 bfd_size_type pc_count;
917583ad 2469 };
252b5132 2470
ba93b8ac
DJ		 2471#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2472
ba96a88f 2473/* Arm ELF linker hash entry. */
252b5132 2474struct elf32_arm_link_hash_entry
917583ad
NC		 2475 {
2476 struct elf_link_hash_entry root;
252b5132 2477
917583ad 2478 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2479 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2480
2481 /* We reference count Thumb references to a PLT entry separately,
2482 so that we can emit the Thumb trampoline only if needed. */
2483 bfd_signed_vma plt_thumb_refcount;
2484
bd97cb95
DJ		 2485 /* Some references from Thumb code may be eliminated by BL->BLX
2486 conversion, so record them separately. */
2487 bfd_signed_vma plt_maybe_thumb_refcount;
2488
b7693d02
DJ		 2489 /* Since PLT entries have variable size if the Thumb prologue is
2490 used, we need to record the index into .got.plt instead of
2491 recomputing it from the PLT offset. */
2492 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2493
2494#define GOT_UNKNOWN 0
2495#define GOT_NORMAL 1
2496#define GOT_TLS_GD 2
2497#define GOT_TLS_IE 4
2498 unsigned char tls_type;
a4fd1a8e
PB		 2499
2500 /* The symbol marking the real symbol location for exported thumb
2501 symbols with Arm stubs. */
2502 struct elf_link_hash_entry *export_glue;
906e58ca 2503
da5938a2 2504 /* A pointer to the most recently used stub hash entry against this
8029a119 2505 symbol. */
da5938a2 2506 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2507 };
252b5132 2508
252b5132 2509/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2510#define elf32_arm_link_hash_traverse(table, func, info) \
2511 (elf_link_hash_traverse \
2512 (&(table)->root, \
b7693d02 2513 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2514 (info)))
2515
2516/* Get the ARM elf linker hash table from a link_info structure. */
2517#define elf32_arm_hash_table(info) \
2518 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2519
906e58ca
NC		 2520#define arm_stub_hash_lookup(table, string, create, copy) \
2521 ((struct elf32_arm_stub_hash_entry *) \
2522 bfd_hash_lookup ((table), (string), (create), (copy)))
2523
9b485d32 2524/* ARM ELF linker hash table. */
252b5132 2525struct elf32_arm_link_hash_table
906e58ca
NC		 2526{
2527 /* The main hash table. */
2528 struct elf_link_hash_table root;
252b5132 2529
906e58ca
NC		 2530 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2531 bfd_size_type thumb_glue_size;
252b5132 2532
906e58ca
NC		 2533 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2534 bfd_size_type arm_glue_size;
252b5132 2535
906e58ca
NC		 2536 /* The size in bytes of section containing the ARMv4 BX veneers. */
2537 bfd_size_type bx_glue_size;
845b51d6 2538
906e58ca
NC		 2539 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2540 veneer has been populated. */
2541 bfd_vma bx_glue_offset[15];
845b51d6 2542
906e58ca
NC		 2543 /* The size in bytes of the section containing glue for VFP11 erratum
2544 veneers. */
2545 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2546
48229727
JB		 2547 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2548 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2549 elf32_arm_write_section(). */
2550 struct a8_erratum_fix *a8_erratum_fixes;
2551 unsigned int num_a8_erratum_fixes;
2552
906e58ca
NC		 2553 /* An arbitrary input BFD chosen to hold the glue sections. */
2554 bfd * bfd_of_glue_owner;
ba96a88f 2555
906e58ca
NC		 2556 /* Nonzero to output a BE8 image. */
2557 int byteswap_code;
e489d0ae 2558
906e58ca
NC		 2559 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2560 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2561 int target1_is_rel;
9c504268 2562
906e58ca
NC		 2563 /* The relocation to use for R_ARM_TARGET2 relocations. */
2564 int target2_reloc;
eb043451 2565
906e58ca
NC		 2566 /* 0 = Ignore R_ARM_V4BX.
2567 1 = Convert BX to MOV PC.
2568 2 = Generate v4 interworing stubs. */
2569 int fix_v4bx;
319850b4 2570
48229727
JB		 2571 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2572 int fix_cortex_a8;
2573
906e58ca
NC		 2574 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2575 int use_blx;
33bfe774 2576
906e58ca
NC		 2577 /* What sort of code sequences we should look for which may trigger the
2578 VFP11 denorm erratum. */
2579 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2580
906e58ca
NC		 2581 /* Global counter for the number of fixes we have emitted. */
2582 int num_vfp11_fixes;
c7b8f16e 2583
906e58ca
NC		 2584 /* Nonzero to force PIC branch veneers. */
2585 int pic_veneer;
27e55c4d 2586
906e58ca
NC		 2587 /* The number of bytes in the initial entry in the PLT. */
2588 bfd_size_type plt_header_size;
e5a52504 2589
906e58ca
NC		 2590 /* The number of bytes in the subsequent PLT etries. */
2591 bfd_size_type plt_entry_size;
e5a52504 2592
906e58ca
NC		 2593 /* True if the target system is VxWorks. */
2594 int vxworks_p;
00a97672 2595
906e58ca
NC		 2596 /* True if the target system is Symbian OS. */
2597 int symbian_p;
e5a52504 2598
906e58ca
NC		 2599 /* True if the target uses REL relocations. */
2600 int use_rel;
4e7fd91e 2601
906e58ca
NC		 2602 /* Short-cuts to get to dynamic linker sections. */
2603 asection *sgot;
2604 asection *sgotplt;
2605 asection *srelgot;
2606 asection *splt;
2607 asection *srelplt;
2608 asection *sdynbss;
2609 asection *srelbss;
5e681ec4 2610
906e58ca
NC		 2611 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2612 asection *srelplt2;
00a97672 2613
906e58ca
NC		 2614 /* Data for R_ARM_TLS_LDM32 relocations. */
2615 union
2616 {
2617 bfd_signed_vma refcount;
2618 bfd_vma offset;
2619 } tls_ldm_got;
b7693d02 2620
87d72d41
AM		 2621 /* Small local sym cache. */
2622 struct sym_cache sym_cache;
906e58ca
NC		 2623
2624 /* For convenience in allocate_dynrelocs. */
2625 bfd * obfd;
2626
2627 /* The stub hash table. */
2628 struct bfd_hash_table stub_hash_table;
2629
2630 /* Linker stub bfd. */
2631 bfd *stub_bfd;
2632
2633 /* Linker call-backs. */
2634 asection * (*add_stub_section) (const char *, asection *);
2635 void (*layout_sections_again) (void);
2636
2637 /* Array to keep track of which stub sections have been created, and
2638 information on stub grouping. */
2639 struct map_stub
2640 {
2641 /* This is the section to which stubs in the group will be
2642 attached. */
2643 asection *link_sec;
2644 /* The stub section. */
2645 asection *stub_sec;
2646 } *stub_group;
2647
2648 /* Assorted information used by elf32_arm_size_stubs. */
2649 unsigned int bfd_count;
2650 int top_index;
2651 asection **input_list;
2652};
252b5132 2653
780a67af
NC		 2654/* Create an entry in an ARM ELF linker hash table. */
2655
2656static struct bfd_hash_entry *
57e8b36a
NC		 2657elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2658 struct bfd_hash_table * table,
2659 const char * string)
780a67af
NC		 2660{
2661 struct elf32_arm_link_hash_entry * ret =
2662 (struct elf32_arm_link_hash_entry *) entry;
2663
2664 /* Allocate the structure if it has not already been allocated by a
2665 subclass. */
906e58ca 2666 if (ret == NULL)
57e8b36a
NC		 2667 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2668 if (ret == NULL)
780a67af
NC		 2669 return (struct bfd_hash_entry *) ret;
2670
2671 /* Call the allocation method of the superclass. */
2672 ret = ((struct elf32_arm_link_hash_entry *)
2673 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2674 table, string));
57e8b36a 2675 if (ret != NULL)
b7693d02
DJ		 2676 {
2677 ret->relocs_copied = NULL;
ba93b8ac 2678 ret->tls_type = GOT_UNKNOWN;
b7693d02 2679 ret->plt_thumb_refcount = 0;
bd97cb95 2680 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2681 ret->plt_got_offset = -1;
a4fd1a8e 2682 ret->export_glue = NULL;
906e58ca
NC		 2683
2684 ret->stub_cache = NULL;
b7693d02 2685 }
780a67af
NC		 2686
2687 return (struct bfd_hash_entry *) ret;
2688}
2689
906e58ca
NC		 2690/* Initialize an entry in the stub hash table. */
2691
2692static struct bfd_hash_entry *
2693stub_hash_newfunc (struct bfd_hash_entry *entry,
2694 struct bfd_hash_table *table,
2695 const char *string)
2696{
2697 /* Allocate the structure if it has not already been allocated by a
2698 subclass. */
2699 if (entry == NULL)
2700 {
2701 entry = bfd_hash_allocate (table,
2702 sizeof (struct elf32_arm_stub_hash_entry));
2703 if (entry == NULL)
2704 return entry;
2705 }
2706
2707 /* Call the allocation method of the superclass. */
2708 entry = bfd_hash_newfunc (entry, table, string);
2709 if (entry != NULL)
2710 {
2711 struct elf32_arm_stub_hash_entry *eh;
2712
2713 /* Initialize the local fields. */
2714 eh = (struct elf32_arm_stub_hash_entry *) entry;
2715 eh->stub_sec = NULL;
2716 eh->stub_offset = 0;
2717 eh->target_value = 0;
2718 eh->target_section = NULL;
2719 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2720 eh->stub_size = 0;
2721 eh->stub_template = NULL;
2722 eh->stub_template_size = 0;
906e58ca
NC		 2723 eh->h = NULL;
2724 eh->id_sec = NULL;
2725 }
2726
2727 return entry;
2728}
2729
00a97672 2730/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2731 shortcuts to them in our hash table. */
2732
2733static bfd_boolean
57e8b36a 2734create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2735{
2736 struct elf32_arm_link_hash_table *htab;
2737
e5a52504
MM		 2738 htab = elf32_arm_hash_table (info);
2739 /* BPABI objects never have a GOT, or associated sections. */
2740 if (htab->symbian_p)
2741 return TRUE;
2742
5e681ec4
PB		 2743 if (! _bfd_elf_create_got_section (dynobj, info))
2744 return FALSE;
2745
5e681ec4
PB		 2746 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2747 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2748 if (!htab->sgot || !htab->sgotplt)
2749 abort ();
2750
64e77c6d
L		 2751 htab->srelgot = bfd_get_section_by_name (dynobj,
2752 RELOC_SECTION (htab, ".got"));
2753 if (htab->srelgot == NULL)
5e681ec4
PB		 2754 return FALSE;
2755 return TRUE;
2756}
2757
00a97672
RS		 2758/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2759 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2760 hash table. */
2761
2762static bfd_boolean
57e8b36a 2763elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2764{
2765 struct elf32_arm_link_hash_table *htab;
2766
2767 htab = elf32_arm_hash_table (info);
2768 if (!htab->sgot && !create_got_section (dynobj, info))
2769 return FALSE;
2770
2771 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2772 return FALSE;
2773
2774 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2775 htab->srelplt = bfd_get_section_by_name (dynobj,
2776 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2777 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2778 if (!info->shared)
00a97672
RS		 2779 htab->srelbss = bfd_get_section_by_name (dynobj,
2780 RELOC_SECTION (htab, ".bss"));
2781
2782 if (htab->vxworks_p)
2783 {
2784 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2785 return FALSE;
2786
2787 if (info->shared)
2788 {
2789 htab->plt_header_size = 0;
2790 htab->plt_entry_size
2791 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2792 }
2793 else
2794 {
2795 htab->plt_header_size
2796 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2797 htab->plt_entry_size
2798 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2799 }
2800 }
5e681ec4 2801
906e58ca 2802 if (!htab->splt
e5a52504
MM		 2803 || !htab->srelplt
2804 || !htab->sdynbss
5e681ec4
PB		 2805 || (!info->shared && !htab->srelbss))
2806 abort ();
2807
2808 return TRUE;
2809}
2810
906e58ca
NC		 2811/* Copy the extra info we tack onto an elf_link_hash_entry. */
2812
2813static void
2814elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2815 struct elf_link_hash_entry *dir,
2816 struct elf_link_hash_entry *ind)
2817{
2818 struct elf32_arm_link_hash_entry *edir, *eind;
2819
2820 edir = (struct elf32_arm_link_hash_entry *) dir;
2821 eind = (struct elf32_arm_link_hash_entry *) ind;
2822
2823 if (eind->relocs_copied != NULL)
2824 {
2825 if (edir->relocs_copied != NULL)
2826 {
2827 struct elf32_arm_relocs_copied **pp;
2828 struct elf32_arm_relocs_copied *p;
2829
2830 /* Add reloc counts against the indirect sym to the direct sym
2831 list. Merge any entries against the same section. */
2832 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2833 {
2834 struct elf32_arm_relocs_copied *q;
2835
2836 for (q = edir->relocs_copied; q != NULL; q = q->next)
2837 if (q->section == p->section)
2838 {
2839 q->pc_count += p->pc_count;
2840 q->count += p->count;
2841 *pp = p->next;
2842 break;
2843 }
2844 if (q == NULL)
2845 pp = &p->next;
2846 }
2847 *pp = edir->relocs_copied;
2848 }
2849
2850 edir->relocs_copied = eind->relocs_copied;
2851 eind->relocs_copied = NULL;
2852 }
2853
2854 if (ind->root.type == bfd_link_hash_indirect)
2855 {
2856 /* Copy over PLT info. */
2857 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2858 eind->plt_thumb_refcount = 0;
2859 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2860 eind->plt_maybe_thumb_refcount = 0;
2861
2862 if (dir->got.refcount <= 0)
2863 {
2864 edir->tls_type = eind->tls_type;
2865 eind->tls_type = GOT_UNKNOWN;
2866 }
2867 }
2868
2869 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2870}
2871
2872/* Create an ARM elf linker hash table. */
2873
2874static struct bfd_link_hash_table *
2875elf32_arm_link_hash_table_create (bfd *abfd)
2876{
2877 struct elf32_arm_link_hash_table *ret;
2878 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2879
2880 ret = bfd_malloc (amt);
2881 if (ret == NULL)
2882 return NULL;
2883
2884 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2885 elf32_arm_link_hash_newfunc,
2886 sizeof (struct elf32_arm_link_hash_entry)))
2887 {
2888 free (ret);
2889 return NULL;
2890 }
2891
2892 ret->sgot = NULL;
2893 ret->sgotplt = NULL;
2894 ret->srelgot = NULL;
2895 ret->splt = NULL;
2896 ret->srelplt = NULL;
2897 ret->sdynbss = NULL;
2898 ret->srelbss = NULL;
2899 ret->srelplt2 = NULL;
2900 ret->thumb_glue_size = 0;
2901 ret->arm_glue_size = 0;
2902 ret->bx_glue_size = 0;
2903 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2904 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2905 ret->vfp11_erratum_glue_size = 0;
2906 ret->num_vfp11_fixes = 0;
48229727 2907 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2908 ret->bfd_of_glue_owner = NULL;
2909 ret->byteswap_code = 0;
2910 ret->target1_is_rel = 0;
2911 ret->target2_reloc = R_ARM_NONE;
2912#ifdef FOUR_WORD_PLT
2913 ret->plt_header_size = 16;
2914 ret->plt_entry_size = 16;
2915#else
2916 ret->plt_header_size = 20;
2917 ret->plt_entry_size = 12;
2918#endif
2919 ret->fix_v4bx = 0;
2920 ret->use_blx = 0;
2921 ret->vxworks_p = 0;
2922 ret->symbian_p = 0;
2923 ret->use_rel = 1;
87d72d41 2924 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2925 ret->obfd = abfd;
2926 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2927 ret->stub_bfd = NULL;
2928 ret->add_stub_section = NULL;
2929 ret->layout_sections_again = NULL;
2930 ret->stub_group = NULL;
2931 ret->bfd_count = 0;
2932 ret->top_index = 0;
2933 ret->input_list = NULL;
906e58ca
NC		 2934
2935 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2936 sizeof (struct elf32_arm_stub_hash_entry)))
2937 {
2938 free (ret);
2939 return NULL;
2940 }
2941
2942 return &ret->root.root;
2943}
2944
2945/* Free the derived linker hash table. */
2946
2947static void
2948elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2949{
2950 struct elf32_arm_link_hash_table *ret
2951 = (struct elf32_arm_link_hash_table *) hash;
2952
2953 bfd_hash_table_free (&ret->stub_hash_table);
2954 _bfd_generic_link_hash_table_free (hash);
2955}
2956
2957/* Determine if we're dealing with a Thumb only architecture. */
2958
2959static bfd_boolean
2960using_thumb_only (struct elf32_arm_link_hash_table *globals)
2961{
2962 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2963 Tag_CPU_arch);
2964 int profile;
2965
2966 if (arch != TAG_CPU_ARCH_V7)
2967 return FALSE;
2968
2969 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2970 Tag_CPU_arch_profile);
2971
2972 return profile == 'M';
2973}
2974
2975/* Determine if we're dealing with a Thumb-2 object. */
2976
2977static bfd_boolean
2978using_thumb2 (struct elf32_arm_link_hash_table *globals)
2979{
2980 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2981 Tag_CPU_arch);
2982 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2983}
2984
f4ac8484
DJ		 2985static bfd_boolean
2986arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2987{
2988 switch (stub_type)
2989 {
fea2b4d6
CL		 2990 case arm_stub_long_branch_thumb_only:
2991 case arm_stub_long_branch_v4t_thumb_arm:
2992 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2993 case arm_stub_long_branch_v4t_thumb_arm_pic:
2994 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 2995 return TRUE;
2996 case arm_stub_none:
2997 BFD_FAIL ();
2998 return FALSE;
2999 break;
3000 default:
3001 return FALSE;
3002 }
3003}
3004
906e58ca
NC		 3005/* Determine the type of stub needed, if any, for a call. */
3006
3007static enum elf32_arm_stub_type
3008arm_type_of_stub (struct bfd_link_info *info,
3009 asection *input_sec,
3010 const Elf_Internal_Rela *rel,
3011 unsigned char st_type,
3012 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3013 bfd_vma destination,
3014 asection *sym_sec,
3015 bfd *input_bfd,
3016 const char *name)
906e58ca
NC		 3017{
3018 bfd_vma location;
3019 bfd_signed_vma branch_offset;
3020 unsigned int r_type;
3021 struct elf32_arm_link_hash_table * globals;
3022 int thumb2;
3023 int thumb_only;
3024 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3025 int use_plt = 0;
906e58ca 3026
da5938a2 3027 /* We don't know the actual type of destination in case it is of
8029a119 3028 type STT_SECTION: give up. */
da5938a2
NC		 3029 if (st_type == STT_SECTION)
3030 return stub_type;
3031
906e58ca
NC		 3032 globals = elf32_arm_hash_table (info);
3033
3034 thumb_only = using_thumb_only (globals);
3035
3036 thumb2 = using_thumb2 (globals);
3037
3038 /* Determine where the call point is. */
3039 location = (input_sec->output_offset
3040 + input_sec->output_section->vma
3041 + rel->r_offset);
3042
3043 branch_offset = (bfd_signed_vma)(destination - location);
3044
3045 r_type = ELF32_R_TYPE (rel->r_info);
3046
5fa9e92f 3047 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3048 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3049 {
3050 use_plt = 1;
3051 /* Note when dealing with PLT entries: the main PLT stub is in
3052 ARM mode, so if the branch is in Thumb mode, another
3053 Thumb->ARM stub will be inserted later just before the ARM
3054 PLT stub. We don't take this extra distance into account
3055 here, because if a long branch stub is needed, we'll add a
3056 Thumb->Arm one and branch directly to the ARM PLT entry
3057 because it avoids spreading offset corrections in several
3058 places. */
3059 }
906e58ca 3060
155d87d7 3061 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3062 {
5fa9e92f
CL		 3063 /* Handle cases where:
3064 - this call goes too far (different Thumb/Thumb2 max
3065 distance)
155d87d7
CL		 3066 - it's a Thumb->Arm call and blx is not available, or it's a
3067 Thumb->Arm branch (not bl). A stub is needed in this case,
3068 but only if this call is not through a PLT entry. Indeed,
3069 PLT stubs handle mode switching already.
5fa9e92f 3070 */
906e58ca
NC		 3071 if ((!thumb2
3072 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3073 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3074 || (thumb2
3075 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3076 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3077 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3078 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3079 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3080 && !use_plt))
906e58ca
NC		 3081 {
3082 if (st_type == STT_ARM_TFUNC)
3083 {
3084 /* Thumb to thumb. */
3085 if (!thumb_only)
3086 {
3087 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3088 /* PIC stubs. */
155d87d7
CL		 3089 ? ((globals->use_blx
3090 && (r_type ==R_ARM_THM_CALL))
3091 /* V5T and above. Stub starts with ARM code, so
3092 we must be able to switch mode before
3093 reaching it, which is only possible for 'bl'
3094 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3095 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3096 /* On V4T, use Thumb code only. */
d3626fb0 3097 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3098
3099 /* non-PIC stubs. */
155d87d7
CL		 3100 : ((globals->use_blx
3101 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3102 /* V5T and above. */
3103 ? arm_stub_long_branch_any_any
3104 /* V4T. */
d3626fb0 3105 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3106 }
3107 else
3108 {
3109 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3110 /* PIC stub. */
3111 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3112 /* non-PIC stub. */
3113 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3114 }
3115 }
3116 else
3117 {
3118 /* Thumb to arm. */
c820be07
NC		 3119 if (sym_sec != NULL
3120 && sym_sec->owner != NULL
3121 && !INTERWORK_FLAG (sym_sec->owner))
3122 {
3123 (*_bfd_error_handler)
3124 (_("%B(%s): warning: interworking not enabled.\n"
3125 " first occurrence: %B: Thumb call to ARM"),
3126 sym_sec->owner, input_bfd, name);
3127 }
3128
906e58ca 3129 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3130 /* PIC stubs. */
155d87d7
CL		 3131 ? ((globals->use_blx
3132 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3133 /* V5T and above. */
cf3eccff 3134 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3135 /* V4T PIC stub. */
3136 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3137
3138 /* non-PIC stubs. */
155d87d7
CL		 3139 : ((globals->use_blx
3140 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3141 /* V5T and above. */
3142 ? arm_stub_long_branch_any_any
3143 /* V4T. */
3144 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3145
3146 /* Handle v4t short branches. */
fea2b4d6 3147 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3148 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3149 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3150 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3151 }
3152 }
3153 }
155d87d7 3154 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3155 {
3156 if (st_type == STT_ARM_TFUNC)
3157 {
3158 /* Arm to thumb. */
c820be07
NC		 3159
3160 if (sym_sec != NULL
3161 && sym_sec->owner != NULL
3162 && !INTERWORK_FLAG (sym_sec->owner))
3163 {
3164 (*_bfd_error_handler)
3165 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3166 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3167 sym_sec->owner, input_bfd, name);
3168 }
3169
3170 /* We have an extra 2-bytes reach because of
3171 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3172 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3173 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3174 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3175 || (r_type == R_ARM_JUMP24)
3176 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3177 {
3178 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3179 /* PIC stubs. */
ebe24dd4
CL		 3180 ? ((globals->use_blx)
3181 /* V5T and above. */
3182 ? arm_stub_long_branch_any_thumb_pic
3183 /* V4T stub. */
3184 : arm_stub_long_branch_v4t_arm_thumb_pic)
3185
c2b4a39d
CL		 3186 /* non-PIC stubs. */
3187 : ((globals->use_blx)
3188 /* V5T and above. */
3189 ? arm_stub_long_branch_any_any
3190 /* V4T. */
3191 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3192 }
3193 }
3194 else
3195 {
3196 /* Arm to arm. */
3197 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3198 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3199 {
3200 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3201 /* PIC stubs. */
cf3eccff 3202 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3203 /* non-PIC stubs. */
fea2b4d6 3204 : arm_stub_long_branch_any_any;
906e58ca
NC		 3205 }
3206 }
3207 }
3208
3209 return stub_type;
3210}
3211
3212/* Build a name for an entry in the stub hash table. */
3213
3214static char *
3215elf32_arm_stub_name (const asection *input_section,
3216 const asection *sym_sec,
3217 const struct elf32_arm_link_hash_entry *hash,
3218 const Elf_Internal_Rela *rel)
3219{
3220 char *stub_name;
3221 bfd_size_type len;
3222
3223 if (hash)
3224 {
3225 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3226 stub_name = bfd_malloc (len);
3227 if (stub_name != NULL)
3228 sprintf (stub_name, "%08x_%s+%x",
3229 input_section->id & 0xffffffff,
3230 hash->root.root.root.string,
3231 (int) rel->r_addend & 0xffffffff);
3232 }
3233 else
3234 {
3235 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3236 stub_name = bfd_malloc (len);
3237 if (stub_name != NULL)
3238 sprintf (stub_name, "%08x_%x:%x+%x",
3239 input_section->id & 0xffffffff,
3240 sym_sec->id & 0xffffffff,
3241 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3242 (int) rel->r_addend & 0xffffffff);
3243 }
3244
3245 return stub_name;
3246}
3247
3248/* Look up an entry in the stub hash. Stub entries are cached because
3249 creating the stub name takes a bit of time. */
3250
3251static struct elf32_arm_stub_hash_entry *
3252elf32_arm_get_stub_entry (const asection *input_section,
3253 const asection *sym_sec,
3254 struct elf_link_hash_entry *hash,
3255 const Elf_Internal_Rela *rel,
3256 struct elf32_arm_link_hash_table *htab)
3257{
3258 struct elf32_arm_stub_hash_entry *stub_entry;
3259 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3260 const asection *id_sec;
3261
3262 if ((input_section->flags & SEC_CODE) == 0)
3263 return NULL;
3264
3265 /* If this input section is part of a group of sections sharing one
3266 stub section, then use the id of the first section in the group.
3267 Stub names need to include a section id, as there may well be
3268 more than one stub used to reach say, printf, and we need to
3269 distinguish between them. */
3270 id_sec = htab->stub_group[input_section->id].link_sec;
3271
3272 if (h != NULL && h->stub_cache != NULL
3273 && h->stub_cache->h == h
3274 && h->stub_cache->id_sec == id_sec)
3275 {
3276 stub_entry = h->stub_cache;
3277 }
3278 else
3279 {
3280 char *stub_name;
3281
3282 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3283 if (stub_name == NULL)
3284 return NULL;
3285
3286 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3287 stub_name, FALSE, FALSE);
3288 if (h != NULL)
3289 h->stub_cache = stub_entry;
3290
3291 free (stub_name);
3292 }
3293
3294 return stub_entry;
3295}
3296
48229727
JB		 3297/* Find or create a stub section. Returns a pointer to the stub section, and
3298 the section to which the stub section will be attached (in *LINK_SEC_P).
3299 LINK_SEC_P may be NULL. */
906e58ca 3300
48229727
JB		 3301static asection *
3302elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3303 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3304{
3305 asection *link_sec;
3306 asection *stub_sec;
906e58ca
NC		 3307
3308 link_sec = htab->stub_group[section->id].link_sec;
3309 stub_sec = htab->stub_group[section->id].stub_sec;
3310 if (stub_sec == NULL)
3311 {
3312 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3313 if (stub_sec == NULL)
3314 {
3315 size_t namelen;
3316 bfd_size_type len;
3317 char *s_name;
3318
3319 namelen = strlen (link_sec->name);
3320 len = namelen + sizeof (STUB_SUFFIX);
3321 s_name = bfd_alloc (htab->stub_bfd, len);
3322 if (s_name == NULL)
3323 return NULL;
3324
3325 memcpy (s_name, link_sec->name, namelen);
3326 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3327 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3328 if (stub_sec == NULL)
3329 return NULL;
3330 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3331 }
3332 htab->stub_group[section->id].stub_sec = stub_sec;
3333 }
48229727
JB		 3334
3335 if (link_sec_p)
3336 *link_sec_p = link_sec;
3337
3338 return stub_sec;
3339}
3340
3341/* Add a new stub entry to the stub hash. Not all fields of the new
3342 stub entry are initialised. */
3343
3344static struct elf32_arm_stub_hash_entry *
3345elf32_arm_add_stub (const char *stub_name,
3346 asection *section,
3347 struct elf32_arm_link_hash_table *htab)
3348{
3349 asection *link_sec;
3350 asection *stub_sec;
3351 struct elf32_arm_stub_hash_entry *stub_entry;
3352
3353 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3354 if (stub_sec == NULL)
3355 return NULL;
906e58ca
NC		 3356
3357 /* Enter this entry into the linker stub hash table. */
3358 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3359 TRUE, FALSE);
3360 if (stub_entry == NULL)
3361 {
3362 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3363 section->owner,
3364 stub_name);
3365 return NULL;
3366 }
3367
3368 stub_entry->stub_sec = stub_sec;
3369 stub_entry->stub_offset = 0;
3370 stub_entry->id_sec = link_sec;
3371
906e58ca
NC		 3372 return stub_entry;
3373}
3374
3375/* Store an Arm insn into an output section not processed by
3376 elf32_arm_write_section. */
3377
3378static void
8029a119
NC		 3379put_arm_insn (struct elf32_arm_link_hash_table * htab,
3380 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3381{
3382 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3383 bfd_putl32 (val, ptr);
3384 else
3385 bfd_putb32 (val, ptr);
3386}
3387
3388/* Store a 16-bit Thumb insn into an output section not processed by
3389 elf32_arm_write_section. */
3390
3391static void
8029a119
NC		 3392put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3393 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3394{
3395 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3396 bfd_putl16 (val, ptr);
3397 else
3398 bfd_putb16 (val, ptr);
3399}
3400
48229727
JB		 3401static bfd_reloc_status_type elf32_arm_final_link_relocate
3402 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3403 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3404 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3405
906e58ca
NC		 3406static bfd_boolean
3407arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3408 void * in_arg)
3409{
48229727 3410#define MAXRELOCS 2
906e58ca
NC		 3411 struct elf32_arm_stub_hash_entry *stub_entry;
3412 struct bfd_link_info *info;
3413 struct elf32_arm_link_hash_table *htab;
3414 asection *stub_sec;
3415 bfd *stub_bfd;
3416 bfd_vma stub_addr;
3417 bfd_byte *loc;
3418 bfd_vma sym_value;
3419 int template_size;
3420 int size;
461a49ca 3421 const insn_sequence *template;
906e58ca
NC		 3422 int i;
3423 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3424 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3425 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3426 int nrelocs = 0;
906e58ca
NC		 3427
3428 /* Massage our args to the form they really have. */
3429 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3430 info = (struct bfd_link_info *) in_arg;
3431
3432 globals = elf32_arm_hash_table (info);
3433
3434 htab = elf32_arm_hash_table (info);
3435 stub_sec = stub_entry->stub_sec;
3436
3437 /* Make a note of the offset within the stubs for this entry. */
3438 stub_entry->stub_offset = stub_sec->size;
3439 loc = stub_sec->contents + stub_entry->stub_offset;
3440
3441 stub_bfd = stub_sec->owner;
3442
3443 /* This is the address of the start of the stub. */
3444 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3445 + stub_entry->stub_offset;
3446
3447 /* This is the address of the stub destination. */
3448 sym_value = (stub_entry->target_value
3449 + stub_entry->target_section->output_offset
3450 + stub_entry->target_section->output_section->vma);
3451
461a49ca
DJ		 3452 template = stub_entry->stub_template;
3453 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3454
3455 size = 0;
461a49ca 3456 for (i = 0; i < template_size; i++)
906e58ca 3457 {
4e31c731 3458 switch (template[i].type)
461a49ca
DJ		 3459 {
3460 case THUMB16_TYPE:
48229727
JB		 3461 {
3462 bfd_vma data = template[i].data;
3463 if (template[i].reloc_addend != 0)
3464 {
3465 /* We've borrowed the reloc_addend field to mean we should
3466 insert a condition code into this (Thumb-1 branch)
3467 instruction. See THUMB16_BCOND_INSN. */
3468 BFD_ASSERT ((data & 0xff00) == 0xd000);
3469 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3470 }
3471 put_thumb_insn (globals, stub_bfd, data, loc + size);
3472 size += 2;
3473 }
461a49ca 3474 break;
906e58ca 3475
48229727
JB		 3476 case THUMB32_TYPE:
3477 put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
3478 loc + size);
3479 put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
3480 loc + size + 2);
3481 if (template[i].r_type != R_ARM_NONE)
3482 {
3483 stub_reloc_idx[nrelocs] = i;
3484 stub_reloc_offset[nrelocs++] = size;
3485 }
3486 size += 4;
3487 break;
3488
461a49ca
DJ		 3489 case ARM_TYPE:
3490 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3491 /* Handle cases where the target is encoded within the
3492 instruction. */
ebe24dd4 3493 if (template[i].r_type == R_ARM_JUMP24)
461a49ca 3494 {
48229727
JB		 3495 stub_reloc_idx[nrelocs] = i;
3496 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3497 }
3498 size += 4;
3499 break;
3500
3501 case DATA_TYPE:
3502 bfd_put_32 (stub_bfd, template[i].data, loc + size);
48229727
JB		 3503 stub_reloc_idx[nrelocs] = i;
3504 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3505 size += 4;
3506 break;
3507
3508 default:
3509 BFD_FAIL ();
3510 return FALSE;
3511 }
906e58ca 3512 }
461a49ca 3513
906e58ca
NC		 3514 stub_sec->size += size;
3515
461a49ca
DJ		 3516 /* Stub size has already been computed in arm_size_one_stub. Check
3517 consistency. */
3518 BFD_ASSERT (size == stub_entry->stub_size);
3519
906e58ca
NC		 3520 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3521 if (stub_entry->st_type == STT_ARM_TFUNC)
3522 sym_value |= 1;
3523
48229727
JB		 3524 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3525 in each stub. */
3526 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3527
48229727
JB		 3528 for (i = 0; i < nrelocs; i++)
3529 if (template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3530 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3531 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3532 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3533 {
3534 Elf_Internal_Rela rel;
3535 bfd_boolean unresolved_reloc;
3536 char *error_message;
3537 int sym_flags
3538 = (template[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3539 ? STT_ARM_TFUNC : 0;
3540 bfd_vma points_to = sym_value + stub_entry->target_addend;
3541
3542 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3543 rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].r_type);
3544 rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
3545
3546 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3547 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3548 template should refer back to the instruction after the original
3549 branch. */
3550 points_to = sym_value;
3551
3552 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3553 properly. We should probably use this function unconditionally,
3554 rather than only for certain relocations listed in the enclosing
3555 conditional, for the sake of consistency. */
3556 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3557 (template[stub_reloc_idx[i]].r_type),
3558 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3559 points_to, info, stub_entry->target_section, "", sym_flags,
3560 (struct elf_link_hash_entry *) stub_entry, &unresolved_reloc,
3561 &error_message);
3562 }
3563 else
3564 {
3565 _bfd_final_link_relocate (elf32_arm_howto_from_type
3566 (template[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
3567 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3568 sym_value + stub_entry->target_addend,
3569 template[stub_reloc_idx[i]].reloc_addend);
3570 }
906e58ca
NC		 3571
3572 return TRUE;
48229727 3573#undef MAXRELOCS
906e58ca
NC		 3574}
3575
48229727
JB		 3576/* Calculate the template, template size and instruction size for a stub.
3577 Return value is the instruction size. */
906e58ca 3578
48229727
JB		 3579static unsigned int
3580find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3581 const insn_sequence **stub_template,
3582 int *stub_template_size)
906e58ca 3583{
48229727
JB		 3584 const insn_sequence *template = NULL;
3585 int template_size = 0, i;
3586 unsigned int size;
906e58ca 3587
48229727
JB		 3588 template = stub_definitions[stub_type].template;
3589 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3590
3591 size = 0;
461a49ca
DJ		 3592 for (i = 0; i < template_size; i++)
3593 {
4e31c731 3594 switch (template[i].type)
461a49ca
DJ		 3595 {
3596 case THUMB16_TYPE:
3597 size += 2;
3598 break;
3599
3600 case ARM_TYPE:
48229727 3601 case THUMB32_TYPE:
461a49ca
DJ		 3602 case DATA_TYPE:
3603 size += 4;
3604 break;
3605
3606 default:
3607 BFD_FAIL ();
3608 return FALSE;
3609 }
3610 }
3611
48229727
JB		 3612 if (stub_template)
3613 *stub_template = template;
3614
3615 if (stub_template_size)
3616 *stub_template_size = template_size;
3617
3618 return size;
3619}
3620
3621/* As above, but don't actually build the stub. Just bump offset so
3622 we know stub section sizes. */
3623
3624static bfd_boolean
3625arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3626 void * in_arg)
3627{
3628 struct elf32_arm_stub_hash_entry *stub_entry;
3629 struct elf32_arm_link_hash_table *htab;
3630 const insn_sequence *template;
3631 int template_size, size;
3632
3633 /* Massage our args to the form they really have. */
3634 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3635 htab = (struct elf32_arm_link_hash_table *) in_arg;
3636
3637 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3638 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3639
3640 size = find_stub_size_and_template (stub_entry->stub_type, &template,
3641 &template_size);
3642
461a49ca
DJ		 3643 stub_entry->stub_size = size;
3644 stub_entry->stub_template = template;
3645 stub_entry->stub_template_size = template_size;
3646
906e58ca
NC		 3647 size = (size + 7) & ~7;
3648 stub_entry->stub_sec->size += size;
461a49ca 3649
906e58ca
NC		 3650 return TRUE;
3651}
3652
3653/* External entry points for sizing and building linker stubs. */
3654
3655/* Set up various things so that we can make a list of input sections
3656 for each output section included in the link. Returns -1 on error,
3657 0 when no stubs will be needed, and 1 on success. */
3658
3659int
3660elf32_arm_setup_section_lists (bfd *output_bfd,
3661 struct bfd_link_info *info)
3662{
3663 bfd *input_bfd;
3664 unsigned int bfd_count;
3665 int top_id, top_index;
3666 asection *section;
3667 asection **input_list, **list;
3668 bfd_size_type amt;
3669 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3670
3671 if (! is_elf_hash_table (htab))
3672 return 0;
3673
3674 /* Count the number of input BFDs and find the top input section id. */
3675 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3676 input_bfd != NULL;
3677 input_bfd = input_bfd->link_next)
3678 {
3679 bfd_count += 1;
3680 for (section = input_bfd->sections;
3681 section != NULL;
3682 section = section->next)
3683 {
3684 if (top_id < section->id)
3685 top_id = section->id;
3686 }
3687 }
3688 htab->bfd_count = bfd_count;
3689
3690 amt = sizeof (struct map_stub) * (top_id + 1);
3691 htab->stub_group = bfd_zmalloc (amt);
3692 if (htab->stub_group == NULL)
3693 return -1;
3694
3695 /* We can't use output_bfd->section_count here to find the top output
3696 section index as some sections may have been removed, and
3697 _bfd_strip_section_from_output doesn't renumber the indices. */
3698 for (section = output_bfd->sections, top_index = 0;
3699 section != NULL;
3700 section = section->next)
3701 {
3702 if (top_index < section->index)
3703 top_index = section->index;
3704 }
3705
3706 htab->top_index = top_index;
3707 amt = sizeof (asection *) * (top_index + 1);
3708 input_list = bfd_malloc (amt);
3709 htab->input_list = input_list;
3710 if (input_list == NULL)
3711 return -1;
3712
3713 /* For sections we aren't interested in, mark their entries with a
3714 value we can check later. */
3715 list = input_list + top_index;
3716 do
3717 *list = bfd_abs_section_ptr;
3718 while (list-- != input_list);
3719
3720 for (section = output_bfd->sections;
3721 section != NULL;
3722 section = section->next)
3723 {
3724 if ((section->flags & SEC_CODE) != 0)
3725 input_list[section->index] = NULL;
3726 }
3727
3728 return 1;
3729}
3730
3731/* The linker repeatedly calls this function for each input section,
3732 in the order that input sections are linked into output sections.
3733 Build lists of input sections to determine groupings between which
3734 we may insert linker stubs. */
3735
3736void
3737elf32_arm_next_input_section (struct bfd_link_info *info,
3738 asection *isec)
3739{
3740 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3741
3742 if (isec->output_section->index <= htab->top_index)
3743 {
3744 asection **list = htab->input_list + isec->output_section->index;
3745
3746 if (*list != bfd_abs_section_ptr)
3747 {
3748 /* Steal the link_sec pointer for our list. */
3749#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3750 /* This happens to make the list in reverse order,
07d72278 3751 which we reverse later. */
906e58ca
NC		 3752 PREV_SEC (isec) = *list;
3753 *list = isec;
3754 }
3755 }
3756}
3757
3758/* See whether we can group stub sections together. Grouping stub
3759 sections may result in fewer stubs. More importantly, we need to
07d72278 3760 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3761 .fini output sections respectively, because glibc splits the
3762 _init and _fini functions into multiple parts. Putting a stub in
3763 the middle of a function is not a good idea. */
3764
3765static void
3766group_sections (struct elf32_arm_link_hash_table *htab,
3767 bfd_size_type stub_group_size,
07d72278 3768 bfd_boolean stubs_always_after_branch)
906e58ca 3769{
07d72278 3770 asection **list = htab->input_list;
906e58ca
NC		 3771
3772 do
3773 {
3774 asection *tail = *list;
07d72278 3775 asection *head;
906e58ca
NC		 3776
3777 if (tail == bfd_abs_section_ptr)
3778 continue;
3779
07d72278
DJ		 3780 /* Reverse the list: we must avoid placing stubs at the
3781 beginning of the section because the beginning of the text
3782 section may be required for an interrupt vector in bare metal
3783 code. */
3784#define NEXT_SEC PREV_SEC
e780aef2
CL		 3785 head = NULL;
3786 while (tail != NULL)
3787 {
3788 /* Pop from tail. */
3789 asection *item = tail;
3790 tail = PREV_SEC (item);
3791
3792 /* Push on head. */
3793 NEXT_SEC (item) = head;
3794 head = item;
3795 }
07d72278
DJ		 3796
3797 while (head != NULL)
906e58ca
NC		 3798 {
3799 asection *curr;
07d72278 3800 asection *next;
e780aef2
CL		 3801 bfd_vma stub_group_start = head->output_offset;
3802 bfd_vma end_of_next;
906e58ca 3803
07d72278 3804 curr = head;
e780aef2 3805 while (NEXT_SEC (curr) != NULL)
8cd931b7 3806 {
e780aef2
CL		 3807 next = NEXT_SEC (curr);
3808 end_of_next = next->output_offset + next->size;
3809 if (end_of_next - stub_group_start >= stub_group_size)
3810 /* End of NEXT is too far from start, so stop. */
8cd931b7 3811 break;
e780aef2
CL		 3812 /* Add NEXT to the group. */
3813 curr = next;
8cd931b7 3814 }
906e58ca 3815
07d72278 3816 /* OK, the size from the start to the start of CURR is less
906e58ca 3817 than stub_group_size and thus can be handled by one stub
07d72278 3818 section. (Or the head section is itself larger than
906e58ca
NC		 3819 stub_group_size, in which case we may be toast.)
3820 We should really be keeping track of the total size of
3821 stubs added here, as stubs contribute to the final output
7fb9f789 3822 section size. */
906e58ca
NC		 3823 do
3824 {
07d72278 3825 next = NEXT_SEC (head);
906e58ca 3826 /* Set up this stub group. */
07d72278 3827 htab->stub_group[head->id].link_sec = curr;
906e58ca 3828 }
07d72278 3829 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3830
3831 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3832 bytes after the stub section can be handled by it too. */
3833 if (!stubs_always_after_branch)
906e58ca 3834 {
e780aef2
CL		 3835 stub_group_start = curr->output_offset + curr->size;
3836
8cd931b7 3837 while (next != NULL)
906e58ca 3838 {
e780aef2
CL		 3839 end_of_next = next->output_offset + next->size;
3840 if (end_of_next - stub_group_start >= stub_group_size)
3841 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3842 break;
e780aef2 3843 /* Add NEXT to the stub group. */
07d72278
DJ		 3844 head = next;
3845 next = NEXT_SEC (head);
3846 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3847 }
3848 }
07d72278 3849 head = next;
906e58ca
NC		 3850 }
3851 }
07d72278 3852 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3853
3854 free (htab->input_list);
3855#undef PREV_SEC
07d72278 3856#undef NEXT_SEC
906e58ca
NC		 3857}
3858
48229727
JB		 3859/* Comparison function for sorting/searching relocations relating to Cortex-A8
3860 erratum fix. */
3861
3862static int
3863a8_reloc_compare (const void *a, const void *b)
3864{
3865 const struct a8_erratum_reloc *ra = a, *rb = b;
3866
3867 if (ra->from < rb->from)
3868 return -1;
3869 else if (ra->from > rb->from)
3870 return 1;
3871 else
3872 return 0;
3873}
3874
3875static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3876 const char *, char **);
3877
3878/* Helper function to scan code for sequences which might trigger the Cortex-A8
3879 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3880 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3881 otherwise. */
3882
81694485
NC		 3883static bfd_boolean
3884cortex_a8_erratum_scan (bfd *input_bfd,
3885 struct bfd_link_info *info,
48229727
JB		 3886 struct a8_erratum_fix **a8_fixes_p,
3887 unsigned int *num_a8_fixes_p,
3888 unsigned int *a8_fix_table_size_p,
3889 struct a8_erratum_reloc *a8_relocs,
3890 unsigned int num_a8_relocs)
3891{
3892 asection *section;
3893 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3894 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3895 unsigned int num_a8_fixes = *num_a8_fixes_p;
3896 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3897
3898 for (section = input_bfd->sections;
3899 section != NULL;
3900 section = section->next)
3901 {
3902 bfd_byte *contents = NULL;
3903 struct _arm_elf_section_data *sec_data;
3904 unsigned int span;
3905 bfd_vma base_vma;
3906
3907 if (elf_section_type (section) != SHT_PROGBITS
3908 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3909 || (section->flags & SEC_EXCLUDE) != 0
3910 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3911 || (section->output_section == bfd_abs_section_ptr))
3912 continue;
3913
3914 base_vma = section->output_section->vma + section->output_offset;
3915
3916 if (elf_section_data (section)->this_hdr.contents != NULL)
3917 contents = elf_section_data (section)->this_hdr.contents;
3918 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 3919 return TRUE;
48229727
JB		 3920
3921 sec_data = elf32_arm_section_data (section);
3922
3923 for (span = 0; span < sec_data->mapcount; span++)
3924 {
3925 unsigned int span_start = sec_data->map[span].vma;
3926 unsigned int span_end = (span == sec_data->mapcount - 1)
3927 ? section->size : sec_data->map[span + 1].vma;
3928 unsigned int i;
3929 char span_type = sec_data->map[span].type;
3930 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3931
3932 if (span_type != 't')
3933 continue;
3934
3935 /* Span is entirely within a single 4KB region: skip scanning. */
3936 if (((base_vma + span_start) & ~0xfff)
3937 == ((base_vma + span_end) & ~0xfff))
3938 continue;
3939
3940 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3941
3942 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3943 * The branch target is in the same 4KB region as the
3944 first half of the branch.
3945 * The instruction before the branch is a 32-bit
81694485 3946 length non-branch instruction. */
48229727
JB		 3947 for (i = span_start; i < span_end;)
3948 {
3949 unsigned int insn = bfd_getl16 (&contents[i]);
3950 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3951 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3952
3953 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3954 insn_32bit = TRUE;
3955
3956 if (insn_32bit)
3957 {
3958 /* Load the rest of the insn (in manual-friendly order). */
3959 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
3960
3961 /* Encoding T4: B<c>.W. */
3962 is_b = (insn & 0xf800d000) == 0xf0009000;
3963 /* Encoding T1: BL<c>.W. */
3964 is_bl = (insn & 0xf800d000) == 0xf000d000;
3965 /* Encoding T2: BLX<c>.W. */
3966 is_blx = (insn & 0xf800d000) == 0xf000c000;
3967 /* Encoding T3: B<c>.W (not permitted in IT block). */
3968 is_bcc = (insn & 0xf800d000) == 0xf0008000
3969 && (insn & 0x07f00000) != 0x03800000;
3970 }
3971
3972 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
3973
81694485
NC		 3974 if (((base_vma + i) & 0xfff) == 0xffe
3975 && insn_32bit
3976 && is_32bit_branch
3977 && last_was_32bit
3978 && ! last_was_branch)
48229727 3979 {
81694485 3980 bfd_signed_vma offset;
48229727
JB		 3981 bfd_boolean force_target_arm = FALSE;
3982 bfd_boolean force_target_thumb = FALSE;
3983 bfd_vma target;
3984 enum elf32_arm_stub_type stub_type = arm_stub_none;
3985 struct a8_erratum_reloc key, *found;
3986
3987 key.from = base_vma + i;
3988 found = bsearch (&key, a8_relocs, num_a8_relocs,
3989 sizeof (struct a8_erratum_reloc),
3990 &a8_reloc_compare);
3991
3992 if (found)
3993 {
3994 char *error_message = NULL;
3995 struct elf_link_hash_entry *entry;
3996
3997 /* We don't care about the error returned from this
3998 function, only if there is glue or not. */
3999 entry = find_thumb_glue (info, found->sym_name,
4000 &error_message);
4001
4002 if (entry)
4003 found->non_a8_stub = TRUE;
4004
4005 if (found->r_type == R_ARM_THM_CALL
4006 && found->st_type != STT_ARM_TFUNC)
4007 force_target_arm = TRUE;
4008 else if (found->r_type == R_ARM_THM_CALL
4009 && found->st_type == STT_ARM_TFUNC)
4010 force_target_thumb = TRUE;
4011 }
4012
4013 /* Check if we have an offending branch instruction. */
4014
4015 if (found && found->non_a8_stub)
4016 /* We've already made a stub for this instruction, e.g.
4017 it's a long branch or a Thumb->ARM stub. Assume that
4018 stub will suffice to work around the A8 erratum (see
4019 setting of always_after_branch above). */
4020 ;
4021 else if (is_bcc)
4022 {
4023 offset = (insn & 0x7ff) << 1;
4024 offset |= (insn & 0x3f0000) >> 4;
4025 offset |= (insn & 0x2000) ? 0x40000 : 0;
4026 offset |= (insn & 0x800) ? 0x80000 : 0;
4027 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4028 if (offset & 0x100000)
81694485 4029 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4030 stub_type = arm_stub_a8_veneer_b_cond;
4031 }
4032 else if (is_b || is_bl || is_blx)
4033 {
4034 int s = (insn & 0x4000000) != 0;
4035 int j1 = (insn & 0x2000) != 0;
4036 int j2 = (insn & 0x800) != 0;
4037 int i1 = !(j1 ^ s);
4038 int i2 = !(j2 ^ s);
4039
4040 offset = (insn & 0x7ff) << 1;
4041 offset |= (insn & 0x3ff0000) >> 4;
4042 offset |= i2 << 22;
4043 offset |= i1 << 23;
4044 offset |= s << 24;
4045 if (offset & 0x1000000)
81694485 4046 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4047
4048 if (is_blx)
81694485 4049 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4050
4051 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4052 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4053 }
4054
4055 if (stub_type != arm_stub_none)
4056 {
4057 bfd_vma pc_for_insn = base_vma + i + 4;
4058
4059 /* The original instruction is a BL, but the target is
4060 an ARM instruction. If we were not making a stub,
4061 the BL would have been converted to a BLX. Use the
4062 BLX stub instead in that case. */
4063 if (htab->use_blx && force_target_arm
4064 && stub_type == arm_stub_a8_veneer_bl)
4065 {
4066 stub_type = arm_stub_a8_veneer_blx;
4067 is_blx = TRUE;
4068 is_bl = FALSE;
4069 }
4070 /* Conversely, if the original instruction was
4071 BLX but the target is Thumb mode, use the BL
4072 stub. */
4073 else if (force_target_thumb
4074 && stub_type == arm_stub_a8_veneer_blx)
4075 {
4076 stub_type = arm_stub_a8_veneer_bl;
4077 is_blx = FALSE;
4078 is_bl = TRUE;
4079 }
4080
4081 if (is_blx)
81694485 4082 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4083
4084 /* If we found a relocation, use the proper destination,
4085 not the offset in the (unrelocated) instruction.
4086 Note this is always done if we switched the stub type
4087 above. */
4088 if (found)
81694485
NC		 4089 offset =
4090 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4091
4092 target = pc_for_insn + offset;
4093
4094 /* The BLX stub is ARM-mode code. Adjust the offset to
4095 take the different PC value (+8 instead of +4) into
4096 account. */
4097 if (stub_type == arm_stub_a8_veneer_blx)
4098 offset += 4;
4099
4100 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4101 {
4102 char *stub_name;
4103
4104 if (num_a8_fixes == a8_fix_table_size)
4105 {
4106 a8_fix_table_size *= 2;
4107 a8_fixes = bfd_realloc (a8_fixes,
4108 sizeof (struct a8_erratum_fix)
4109 * a8_fix_table_size);
4110 }
4111
4112 stub_name = bfd_malloc (8 + 1 + 8 + 1);
4113 if (stub_name != NULL)
4114 sprintf (stub_name, "%x:%x", section->id, i);
4115
4116 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4117 a8_fixes[num_a8_fixes].section = section;
4118 a8_fixes[num_a8_fixes].offset = i;
4119 a8_fixes[num_a8_fixes].addend = offset;
4120 a8_fixes[num_a8_fixes].orig_insn = insn;
4121 a8_fixes[num_a8_fixes].stub_name = stub_name;
4122 a8_fixes[num_a8_fixes].stub_type = stub_type;
4123
4124 num_a8_fixes++;
4125 }
4126 }
4127 }
4128
4129 i += insn_32bit ? 4 : 2;
4130 last_was_32bit = insn_32bit;
4131 last_was_branch = is_32bit_branch;
4132 }
4133 }
4134
4135 if (elf_section_data (section)->this_hdr.contents == NULL)
4136 free (contents);
4137 }
4138
4139 *a8_fixes_p = a8_fixes;
4140 *num_a8_fixes_p = num_a8_fixes;
4141 *a8_fix_table_size_p = a8_fix_table_size;
4142
81694485 4143 return FALSE;
48229727
JB		 4144}
4145
906e58ca
NC		 4146/* Determine and set the size of the stub section for a final link.
4147
4148 The basic idea here is to examine all the relocations looking for
4149 PC-relative calls to a target that is unreachable with a "bl"
4150 instruction. */
4151
4152bfd_boolean
4153elf32_arm_size_stubs (bfd *output_bfd,
4154 bfd *stub_bfd,
4155 struct bfd_link_info *info,
4156 bfd_signed_vma group_size,
4157 asection * (*add_stub_section) (const char *, asection *),
4158 void (*layout_sections_again) (void))
4159{
4160 bfd_size_type stub_group_size;
07d72278 4161 bfd_boolean stubs_always_after_branch;
906e58ca
NC		 4162 bfd_boolean stub_changed = 0;
4163 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727
JB		 4164 struct a8_erratum_fix *a8_fixes = NULL;
4165 unsigned int num_a8_fixes = 0, prev_num_a8_fixes = 0, a8_fix_table_size = 10;
4166 struct a8_erratum_reloc *a8_relocs = NULL;
4167 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4168
4169 if (htab->fix_cortex_a8)
4170 {
4171 a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
4172 * a8_fix_table_size);
4173 a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
4174 * a8_reloc_table_size);
4175 }
906e58ca
NC		 4176
4177 /* Propagate mach to stub bfd, because it may not have been
4178 finalized when we created stub_bfd. */
4179 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4180 bfd_get_mach (output_bfd));
4181
4182 /* Stash our params away. */
4183 htab->stub_bfd = stub_bfd;
4184 htab->add_stub_section = add_stub_section;
4185 htab->layout_sections_again = layout_sections_again;
07d72278 4186 stubs_always_after_branch = group_size < 0;
48229727
JB		 4187
4188 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4189 as the first half of a 32-bit branch straddling two 4K pages. This is a
4190 crude way of enforcing that. */
4191 if (htab->fix_cortex_a8)
4192 stubs_always_after_branch = 1;
4193
906e58ca
NC		 4194 if (group_size < 0)
4195 stub_group_size = -group_size;
4196 else
4197 stub_group_size = group_size;
4198
4199 if (stub_group_size == 1)
4200 {
4201 /* Default values. */
4202 /* Thumb branch range is +-4MB has to be used as the default
4203 maximum size (a given section can contain both ARM and Thumb
4204 code, so the worst case has to be taken into account).
4205
4206 This value is 24K less than that, which allows for 2025
4207 12-byte stubs. If we exceed that, then we will fail to link.
4208 The user will have to relink with an explicit group size
4209 option. */
4210 stub_group_size = 4170000;
4211 }
4212
07d72278 4213 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca
NC		 4214
4215 while (1)
4216 {
4217 bfd *input_bfd;
4218 unsigned int bfd_indx;
4219 asection *stub_sec;
4220
48229727
JB		 4221 num_a8_fixes = 0;
4222
906e58ca
NC		 4223 for (input_bfd = info->input_bfds, bfd_indx = 0;
4224 input_bfd != NULL;
4225 input_bfd = input_bfd->link_next, bfd_indx++)
4226 {
4227 Elf_Internal_Shdr *symtab_hdr;
4228 asection *section;
4229 Elf_Internal_Sym *local_syms = NULL;
4230
48229727
JB		 4231 num_a8_relocs = 0;
4232
906e58ca
NC		 4233 /* We'll need the symbol table in a second. */
4234 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4235 if (symtab_hdr->sh_info == 0)
4236 continue;
4237
4238 /* Walk over each section attached to the input bfd. */
4239 for (section = input_bfd->sections;
4240 section != NULL;
4241 section = section->next)
4242 {
4243 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4244
4245 /* If there aren't any relocs, then there's nothing more
4246 to do. */
4247 if ((section->flags & SEC_RELOC) == 0
4248 || section->reloc_count == 0
4249 || (section->flags & SEC_CODE) == 0)
4250 continue;
4251
4252 /* If this section is a link-once section that will be
4253 discarded, then don't create any stubs. */
4254 if (section->output_section == NULL
4255 || section->output_section->owner != output_bfd)
4256 continue;
4257
4258 /* Get the relocs. */
4259 internal_relocs
4260 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4261 NULL, info->keep_memory);
4262 if (internal_relocs == NULL)
4263 goto error_ret_free_local;
4264
4265 /* Now examine each relocation. */
4266 irela = internal_relocs;
4267 irelaend = irela + section->reloc_count;
4268 for (; irela < irelaend; irela++)
4269 {
4270 unsigned int r_type, r_indx;
4271 enum elf32_arm_stub_type stub_type;
4272 struct elf32_arm_stub_hash_entry *stub_entry;
4273 asection *sym_sec;
4274 bfd_vma sym_value;
4275 bfd_vma destination;
4276 struct elf32_arm_link_hash_entry *hash;
7413f23f 4277 const char *sym_name;
906e58ca
NC		 4278 char *stub_name;
4279 const asection *id_sec;
4280 unsigned char st_type;
48229727 4281 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4282
4283 r_type = ELF32_R_TYPE (irela->r_info);
4284 r_indx = ELF32_R_SYM (irela->r_info);
4285
4286 if (r_type >= (unsigned int) R_ARM_max)
4287 {
4288 bfd_set_error (bfd_error_bad_value);
4289 error_ret_free_internal:
4290 if (elf_section_data (section)->relocs == NULL)
4291 free (internal_relocs);
4292 goto error_ret_free_local;
4293 }
4294
155d87d7 4295 /* Only look for stubs on branch instructions. */
906e58ca 4296 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4297 && (r_type != (unsigned int) R_ARM_THM_CALL)
4298 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4299 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4300 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4301 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4302 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4303 continue;
4304
4305 /* Now determine the call target, its name, value,
4306 section. */
4307 sym_sec = NULL;
4308 sym_value = 0;
4309 destination = 0;
4310 hash = NULL;
7413f23f 4311 sym_name = NULL;
906e58ca
NC		 4312 if (r_indx < symtab_hdr->sh_info)
4313 {
4314 /* It's a local symbol. */
4315 Elf_Internal_Sym *sym;
4316 Elf_Internal_Shdr *hdr;
4317
4318 if (local_syms == NULL)
4319 {
4320 local_syms
4321 = (Elf_Internal_Sym *) symtab_hdr->contents;
4322 if (local_syms == NULL)
4323 local_syms
4324 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4325 symtab_hdr->sh_info, 0,
4326 NULL, NULL, NULL);
4327 if (local_syms == NULL)
4328 goto error_ret_free_internal;
4329 }
4330
4331 sym = local_syms + r_indx;
4332 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4333 sym_sec = hdr->bfd_section;
4334 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4335 sym_value = sym->st_value;
4336 destination = (sym_value + irela->r_addend
4337 + sym_sec->output_offset
4338 + sym_sec->output_section->vma);
4339 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4340 sym_name
4341 = bfd_elf_string_from_elf_section (input_bfd,
4342 symtab_hdr->sh_link,
4343 sym->st_name);
906e58ca
NC		 4344 }
4345 else
4346 {
4347 /* It's an external symbol. */
4348 int e_indx;
4349
4350 e_indx = r_indx - symtab_hdr->sh_info;
4351 hash = ((struct elf32_arm_link_hash_entry *)
4352 elf_sym_hashes (input_bfd)[e_indx]);
4353
4354 while (hash->root.root.type == bfd_link_hash_indirect
4355 || hash->root.root.type == bfd_link_hash_warning)
4356 hash = ((struct elf32_arm_link_hash_entry *)
4357 hash->root.root.u.i.link);
4358
4359 if (hash->root.root.type == bfd_link_hash_defined
4360 || hash->root.root.type == bfd_link_hash_defweak)
4361 {
4362 sym_sec = hash->root.root.u.def.section;
4363 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4364
4365 struct elf32_arm_link_hash_table *globals =
4366 elf32_arm_hash_table (info);
4367
4368 /* For a destination in a shared library,
4369 use the PLT stub as target address to
4370 decide whether a branch stub is
4371 needed. */
4372 if (globals->splt != NULL && hash != NULL
4373 && hash->root.plt.offset != (bfd_vma) -1)
4374 {
4375 sym_sec = globals->splt;
4376 sym_value = hash->root.plt.offset;
4377 if (sym_sec->output_section != NULL)
4378 destination = (sym_value
4379 + sym_sec->output_offset
4380 + sym_sec->output_section->vma);
4381 }
4382 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4383 destination = (sym_value + irela->r_addend
4384 + sym_sec->output_offset
4385 + sym_sec->output_section->vma);
4386 }
69c5861e
CL		 4387 else if ((hash->root.root.type == bfd_link_hash_undefined)
4388 || (hash->root.root.type == bfd_link_hash_undefweak))
4389 {
4390 /* For a shared library, use the PLT stub as
4391 target address to decide whether a long
4392 branch stub is needed.
4393 For absolute code, they cannot be handled. */
4394 struct elf32_arm_link_hash_table *globals =
4395 elf32_arm_hash_table (info);
4396
4397 if (globals->splt != NULL && hash != NULL
4398 && hash->root.plt.offset != (bfd_vma) -1)
4399 {
4400 sym_sec = globals->splt;
4401 sym_value = hash->root.plt.offset;
4402 if (sym_sec->output_section != NULL)
4403 destination = (sym_value
4404 + sym_sec->output_offset
4405 + sym_sec->output_section->vma);
4406 }
4407 else
4408 continue;
4409 }
906e58ca
NC		 4410 else
4411 {
4412 bfd_set_error (bfd_error_bad_value);
4413 goto error_ret_free_internal;
4414 }
4415 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4416 sym_name = hash->root.root.root.string;
906e58ca
NC		 4417 }
4418
48229727 4419 do
7413f23f 4420 {
48229727
JB		 4421 /* Determine what (if any) linker stub is needed. */
4422 stub_type = arm_type_of_stub (info, section, irela,
4423 st_type, hash,
4424 destination, sym_sec,
4425 input_bfd, sym_name);
4426 if (stub_type == arm_stub_none)
4427 break;
4428
4429 /* Support for grouping stub sections. */
4430 id_sec = htab->stub_group[section->id].link_sec;
4431
4432 /* Get the name of this stub. */
4433 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4434 irela);
4435 if (!stub_name)
4436 goto error_ret_free_internal;
4437
4438 /* We've either created a stub for this reloc already,
4439 or we are about to. */
4440 created_stub = TRUE;
4441
4442 stub_entry = arm_stub_hash_lookup
4443 (&htab->stub_hash_table, stub_name,
4444 FALSE, FALSE);
4445 if (stub_entry != NULL)
4446 {
4447 /* The proper stub has already been created. */
4448 free (stub_name);
4449 break;
4450 }
7413f23f 4451
48229727
JB		 4452 stub_entry = elf32_arm_add_stub (stub_name, section,
4453 htab);
4454 if (stub_entry == NULL)
4455 {
4456 free (stub_name);
4457 goto error_ret_free_internal;
4458 }
7413f23f 4459
48229727
JB		 4460 stub_entry->target_value = sym_value;
4461 stub_entry->target_section = sym_sec;
4462 stub_entry->stub_type = stub_type;
4463 stub_entry->h = hash;
4464 stub_entry->st_type = st_type;
4465
4466 if (sym_name == NULL)
4467 sym_name = "unnamed";
4468 stub_entry->output_name
4469 = bfd_alloc (htab->stub_bfd,
4470 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4471 + strlen (sym_name));
4472 if (stub_entry->output_name == NULL)
4473 {
4474 free (stub_name);
4475 goto error_ret_free_internal;
4476 }
4477
4478 /* For historical reasons, use the existing names for
4479 ARM-to-Thumb and Thumb-to-ARM stubs. */
4480 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4481 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4482 && st_type != STT_ARM_TFUNC)
4483 sprintf (stub_entry->output_name,
4484 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4485 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4486 || (r_type == (unsigned int) R_ARM_JUMP24))
4487 && st_type == STT_ARM_TFUNC)
4488 sprintf (stub_entry->output_name,
4489 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4490 else
4491 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4492 sym_name);
4493
4494 stub_changed = TRUE;
4495 }
4496 while (0);
4497
4498 /* Look for relocations which might trigger Cortex-A8
4499 erratum. */
4500 if (htab->fix_cortex_a8
4501 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4502 || r_type == (unsigned int) R_ARM_THM_JUMP19
4503 || r_type == (unsigned int) R_ARM_THM_CALL
4504 || r_type == (unsigned int) R_ARM_THM_XPC22))
4505 {
4506 bfd_vma from = section->output_section->vma
4507 + section->output_offset
4508 + irela->r_offset;
4509
4510 if ((from & 0xfff) == 0xffe)
4511 {
4512 /* Found a candidate. Note we haven't checked the
4513 destination is within 4K here: if we do so (and
4514 don't create an entry in a8_relocs) we can't tell
4515 that a branch should have been relocated when
4516 scanning later. */
4517 if (num_a8_relocs == a8_reloc_table_size)
4518 {
4519 a8_reloc_table_size *= 2;
4520 a8_relocs = bfd_realloc (a8_relocs,
4521 sizeof (struct a8_erratum_reloc)
4522 * a8_reloc_table_size);
4523 }
4524
4525 a8_relocs[num_a8_relocs].from = from;
4526 a8_relocs[num_a8_relocs].destination = destination;
4527 a8_relocs[num_a8_relocs].r_type = r_type;
4528 a8_relocs[num_a8_relocs].st_type = st_type;
4529 a8_relocs[num_a8_relocs].sym_name = sym_name;
4530 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4531
4532 num_a8_relocs++;
4533 }
4534 }
906e58ca
NC		 4535 }
4536
48229727
JB		 4537 /* We're done with the internal relocs, free them. */
4538 if (elf_section_data (section)->relocs == NULL)
4539 free (internal_relocs);
4540 }
4541
4542 if (htab->fix_cortex_a8)
4543 {
4544 /* Sort relocs which might apply to Cortex-A8 erratum. */
4545 qsort (a8_relocs, num_a8_relocs, sizeof (struct a8_erratum_reloc),
4546 &a8_reloc_compare);
4547
4548 /* Scan for branches which might trigger Cortex-A8 erratum. */
4549 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4550 &num_a8_fixes, &a8_fix_table_size,
4551 a8_relocs, num_a8_relocs) != 0)
4552 goto error_ret_free_local;
5e681ec4 4553 }
5e681ec4
PB		 4554 }
4555
48229727
JB		 4556 if (htab->fix_cortex_a8 && num_a8_fixes != prev_num_a8_fixes)
4557 stub_changed = TRUE;
4558
906e58ca
NC		 4559 if (!stub_changed)
4560 break;
5e681ec4 4561
906e58ca
NC		 4562 /* OK, we've added some stubs. Find out the new size of the
4563 stub sections. */
4564 for (stub_sec = htab->stub_bfd->sections;
4565 stub_sec != NULL;
4566 stub_sec = stub_sec->next)
3e6b1042
DJ		 4567 {
4568 /* Ignore non-stub sections. */
4569 if (!strstr (stub_sec->name, STUB_SUFFIX))
4570 continue;
4571
4572 stub_sec->size = 0;
4573 }
b34b2d70 4574
906e58ca
NC		 4575 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4576
48229727
JB		 4577 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4578 if (htab->fix_cortex_a8)
4579 for (i = 0; i < num_a8_fixes; i++)
4580 {
4581 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4582 a8_fixes[i].section, htab);
4583
4584 if (stub_sec == NULL)
4585 goto error_ret_free_local;
4586
4587 stub_sec->size
4588 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4589 NULL);
4590 }
4591
4592
906e58ca
NC		 4593 /* Ask the linker to do its stuff. */
4594 (*htab->layout_sections_again) ();
4595 stub_changed = FALSE;
48229727 4596 prev_num_a8_fixes = num_a8_fixes;
ba93b8ac
DJ		 4597 }
4598
48229727
JB		 4599 /* Add stubs for Cortex-A8 erratum fixes now. */
4600 if (htab->fix_cortex_a8)
4601 {
4602 for (i = 0; i < num_a8_fixes; i++)
4603 {
4604 struct elf32_arm_stub_hash_entry *stub_entry;
4605 char *stub_name = a8_fixes[i].stub_name;
4606 asection *section = a8_fixes[i].section;
4607 unsigned int section_id = a8_fixes[i].section->id;
4608 asection *link_sec = htab->stub_group[section_id].link_sec;
4609 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4610 const insn_sequence *template;
4611 int template_size, size = 0;
4612
4613 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4614 TRUE, FALSE);
4615 if (stub_entry == NULL)
4616 {
4617 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4618 section->owner,
4619 stub_name);
4620 return FALSE;
4621 }
4622
4623 stub_entry->stub_sec = stub_sec;
4624 stub_entry->stub_offset = 0;
4625 stub_entry->id_sec = link_sec;
4626 stub_entry->stub_type = a8_fixes[i].stub_type;
4627 stub_entry->target_section = a8_fixes[i].section;
4628 stub_entry->target_value = a8_fixes[i].offset;
4629 stub_entry->target_addend = a8_fixes[i].addend;
4630 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4631 stub_entry->st_type = STT_ARM_TFUNC;
4632
4633 size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
4634 &template_size);
4635
4636 stub_entry->stub_size = size;
4637 stub_entry->stub_template = template;
4638 stub_entry->stub_template_size = template_size;
4639 }
4640
4641 /* Stash the Cortex-A8 erratum fix array for use later in
4642 elf32_arm_write_section(). */
4643 htab->a8_erratum_fixes = a8_fixes;
4644 htab->num_a8_erratum_fixes = num_a8_fixes;
4645 }
4646 else
4647 {
4648 htab->a8_erratum_fixes = NULL;
4649 htab->num_a8_erratum_fixes = 0;
4650 }
906e58ca
NC		 4651 return TRUE;
4652
4653 error_ret_free_local:
4654 return FALSE;
5e681ec4
PB		 4655}
4656
906e58ca
NC		 4657/* Build all the stubs associated with the current output file. The
4658 stubs are kept in a hash table attached to the main linker hash
4659 table. We also set up the .plt entries for statically linked PIC
4660 functions here. This function is called via arm_elf_finish in the
4661 linker. */
252b5132 4662
906e58ca
NC		 4663bfd_boolean
4664elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4665{
906e58ca
NC		 4666 asection *stub_sec;
4667 struct bfd_hash_table *table;
4668 struct elf32_arm_link_hash_table *htab;
252b5132 4669
906e58ca 4670 htab = elf32_arm_hash_table (info);
252b5132 4671
906e58ca
NC		 4672 for (stub_sec = htab->stub_bfd->sections;
4673 stub_sec != NULL;
4674 stub_sec = stub_sec->next)
252b5132 4675 {
906e58ca
NC		 4676 bfd_size_type size;
4677
8029a119 4678 /* Ignore non-stub sections. */
906e58ca
NC		 4679 if (!strstr (stub_sec->name, STUB_SUFFIX))
4680 continue;
4681
4682 /* Allocate memory to hold the linker stubs. */
4683 size = stub_sec->size;
4684 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4685 if (stub_sec->contents == NULL && size != 0)
4686 return FALSE;
4687 stub_sec->size = 0;
252b5132
RH		 4688 }
4689
906e58ca
NC		 4690 /* Build the stubs as directed by the stub hash table. */
4691 table = &htab->stub_hash_table;
4692 bfd_hash_traverse (table, arm_build_one_stub, info);
252b5132 4693
906e58ca 4694 return TRUE;
252b5132
RH		 4695}
4696
9b485d32
NC		 4697/* Locate the Thumb encoded calling stub for NAME. */
4698
252b5132 4699static struct elf_link_hash_entry *
57e8b36a
NC		 4700find_thumb_glue (struct bfd_link_info *link_info,
4701 const char *name,
f2a9dd69 4702 char **error_message)
252b5132
RH		 4703{
4704 char *tmp_name;
4705 struct elf_link_hash_entry *hash;
4706 struct elf32_arm_link_hash_table *hash_table;
4707
4708 /* We need a pointer to the armelf specific hash table. */
4709 hash_table = elf32_arm_hash_table (link_info);
4710
57e8b36a
NC		 4711 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4712 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4713
4714 BFD_ASSERT (tmp_name);
4715
4716 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4717
4718 hash = elf_link_hash_lookup
b34976b6 4719 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4720
b1657152
AM		 4721 if (hash == NULL
4722 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4723 tmp_name, name) == -1)
4724 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4725
4726 free (tmp_name);
4727
4728 return hash;
4729}
4730
9b485d32
NC		 4731/* Locate the ARM encoded calling stub for NAME. */
4732
252b5132 4733static struct elf_link_hash_entry *
57e8b36a
NC		 4734find_arm_glue (struct bfd_link_info *link_info,
4735 const char *name,
f2a9dd69 4736 char **error_message)
252b5132
RH		 4737{
4738 char *tmp_name;
4739 struct elf_link_hash_entry *myh;
4740 struct elf32_arm_link_hash_table *hash_table;
4741
4742 /* We need a pointer to the elfarm specific hash table. */
4743 hash_table = elf32_arm_hash_table (link_info);
4744
57e8b36a
NC		 4745 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4746 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4747
4748 BFD_ASSERT (tmp_name);
4749
4750 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4751
4752 myh = elf_link_hash_lookup
b34976b6 4753 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4754
b1657152
AM		 4755 if (myh == NULL
4756 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4757 tmp_name, name) == -1)
4758 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4759
4760 free (tmp_name);
4761
4762 return myh;
4763}
4764
8f6277f5 4765/* ARM->Thumb glue (static images):
252b5132
RH		 4766
4767 .arm
4768 __func_from_arm:
4769 ldr r12, __func_addr
4770 bx r12
4771 __func_addr:
906e58ca 4772 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4773
26079076
PB		 4774 (v5t static images)
4775 .arm
4776 __func_from_arm:
4777 ldr pc, __func_addr
4778 __func_addr:
906e58ca 4779 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4780
8f6277f5
PB		 4781 (relocatable images)
4782 .arm
4783 __func_from_arm:
4784 ldr r12, __func_offset
4785 add r12, r12, pc
4786 bx r12
4787 __func_offset:
8029a119 4788 .word func - . */
8f6277f5
PB		 4789
4790#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4791static const insn32 a2t1_ldr_insn = 0xe59fc000;
4792static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4793static const insn32 a2t3_func_addr_insn = 0x00000001;
4794
26079076
PB		 4795#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4796static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4797static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4798
8f6277f5
PB		 4799#define ARM2THUMB_PIC_GLUE_SIZE 16
4800static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4801static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4802static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4803
9b485d32 4804/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4805
8029a119
NC		 4806 .thumb .thumb
4807 .align 2 .align 2
4808 __func_from_thumb: __func_from_thumb:
4809 bx pc push {r6, lr}
4810 nop ldr r6, __func_addr
4811 .arm mov lr, pc
4812 b func bx r6
fcef9eb7
NC		 4813 .arm
4814 ;; back_to_thumb
4815 ldmia r13! {r6, lr}
4816 bx lr
8029a119
NC		 4817 __func_addr:
4818 .word func */
252b5132
RH		 4819
4820#define THUMB2ARM_GLUE_SIZE 8
4821static const insn16 t2a1_bx_pc_insn = 0x4778;
4822static const insn16 t2a2_noop_insn = 0x46c0;
4823static const insn32 t2a3_b_insn = 0xea000000;
4824
c7b8f16e
JB		 4825#define VFP11_ERRATUM_VENEER_SIZE 8
4826
845b51d6
PB		 4827#define ARM_BX_VENEER_SIZE 12
4828static const insn32 armbx1_tst_insn = 0xe3100001;
4829static const insn32 armbx2_moveq_insn = 0x01a0f000;
4830static const insn32 armbx3_bx_insn = 0xe12fff10;
4831
7e392df6 4832#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4833static void
4834arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4835{
4836 asection * s;
8029a119 4837 bfd_byte * contents;
252b5132 4838
8029a119 4839 if (size == 0)
3e6b1042
DJ		 4840 {
4841 /* Do not include empty glue sections in the output. */
4842 if (abfd != NULL)
4843 {
4844 s = bfd_get_section_by_name (abfd, name);
4845 if (s != NULL)
4846 s->flags |= SEC_EXCLUDE;
4847 }
4848 return;
4849 }
252b5132 4850
8029a119 4851 BFD_ASSERT (abfd != NULL);
252b5132 4852
8029a119
NC		 4853 s = bfd_get_section_by_name (abfd, name);
4854 BFD_ASSERT (s != NULL);
252b5132 4855
8029a119 4856 contents = bfd_alloc (abfd, size);
252b5132 4857
8029a119
NC		 4858 BFD_ASSERT (s->size == size);
4859 s->contents = contents;
4860}
906e58ca 4861
8029a119
NC		 4862bfd_boolean
4863bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4864{
4865 struct elf32_arm_link_hash_table * globals;
906e58ca 4866
8029a119
NC		 4867 globals = elf32_arm_hash_table (info);
4868 BFD_ASSERT (globals != NULL);
906e58ca 4869
8029a119
NC		 4870 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4871 globals->arm_glue_size,
4872 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4873
8029a119
NC		 4874 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4875 globals->thumb_glue_size,
4876 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4877
8029a119
NC		 4878 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4879 globals->vfp11_erratum_glue_size,
4880 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4881
8029a119
NC		 4882 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4883 globals->bx_glue_size,
845b51d6
PB		 4884 ARM_BX_GLUE_SECTION_NAME);
4885
b34976b6 4886 return TRUE;
252b5132
RH		 4887}
4888
a4fd1a8e 4889/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4890 returns the symbol identifying the stub. */
4891
a4fd1a8e 4892static struct elf_link_hash_entry *
57e8b36a
NC		 4893record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4894 struct elf_link_hash_entry * h)
252b5132
RH		 4895{
4896 const char * name = h->root.root.string;
63b0f745 4897 asection * s;
252b5132
RH		 4898 char * tmp_name;
4899 struct elf_link_hash_entry * myh;
14a793b2 4900 struct bfd_link_hash_entry * bh;
252b5132 4901 struct elf32_arm_link_hash_table * globals;
dc810e39 4902 bfd_vma val;
2f475487 4903 bfd_size_type size;
252b5132
RH		 4904
4905 globals = elf32_arm_hash_table (link_info);
4906
4907 BFD_ASSERT (globals != NULL);
4908 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4909
4910 s = bfd_get_section_by_name
4911 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4912
252b5132
RH		 4913 BFD_ASSERT (s != NULL);
4914
57e8b36a 4915 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4916
4917 BFD_ASSERT (tmp_name);
4918
4919 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4920
4921 myh = elf_link_hash_lookup
b34976b6 4922 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 4923
4924 if (myh != NULL)
4925 {
9b485d32 4926 /* We've already seen this guy. */
252b5132 4927 free (tmp_name);
a4fd1a8e 4928 return myh;
252b5132
RH		 4929 }
4930
57e8b36a
NC		 4931 /* The only trick here is using hash_table->arm_glue_size as the value.
4932 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 4933 putting it. The +1 on the value marks that the stub has not been
4934 output yet - not that it is a Thumb function. */
14a793b2 4935 bh = NULL;
dc810e39
AM		 4936 val = globals->arm_glue_size + 1;
4937 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4938 tmp_name, BSF_GLOBAL, s, val,
b34976b6 4939 NULL, TRUE, FALSE, &bh);
252b5132 4940
b7693d02
DJ		 4941 myh = (struct elf_link_hash_entry *) bh;
4942 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4943 myh->forced_local = 1;
4944
252b5132
RH		 4945 free (tmp_name);
4946
27e55c4d
PB		 4947 if (link_info->shared || globals->root.is_relocatable_executable
4948 || globals->pic_veneer)
2f475487 4949 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 4950 else if (globals->use_blx)
4951 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 4952 else
2f475487
AM		 4953 size = ARM2THUMB_STATIC_GLUE_SIZE;
4954
4955 s->size += size;
4956 globals->arm_glue_size += size;
252b5132 4957
a4fd1a8e 4958 return myh;
252b5132
RH		 4959}
4960
845b51d6
PB		 4961/* Allocate space for ARMv4 BX veneers. */
4962
4963static void
4964record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
4965{
4966 asection * s;
4967 struct elf32_arm_link_hash_table *globals;
4968 char *tmp_name;
4969 struct elf_link_hash_entry *myh;
4970 struct bfd_link_hash_entry *bh;
4971 bfd_vma val;
4972
4973 /* BX PC does not need a veneer. */
4974 if (reg == 15)
4975 return;
4976
4977 globals = elf32_arm_hash_table (link_info);
4978
4979 BFD_ASSERT (globals != NULL);
4980 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4981
4982 /* Check if this veneer has already been allocated. */
4983 if (globals->bx_glue_offset[reg])
4984 return;
4985
4986 s = bfd_get_section_by_name
4987 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
4988
4989 BFD_ASSERT (s != NULL);
4990
4991 /* Add symbol for veneer. */
4992 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 4993
845b51d6 4994 BFD_ASSERT (tmp_name);
906e58ca 4995
845b51d6 4996 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 4997
845b51d6
PB		 4998 myh = elf_link_hash_lookup
4999 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5000
845b51d6 5001 BFD_ASSERT (myh == NULL);
906e58ca 5002
845b51d6
PB		 5003 bh = NULL;
5004 val = globals->bx_glue_size;
5005 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5006 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5007 NULL, TRUE, FALSE, &bh);
5008
5009 myh = (struct elf_link_hash_entry *) bh;
5010 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5011 myh->forced_local = 1;
5012
5013 s->size += ARM_BX_VENEER_SIZE;
5014 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5015 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5016}
5017
5018
c7b8f16e
JB		 5019/* Add an entry to the code/data map for section SEC. */
5020
5021static void
5022elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5023{
5024 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5025 unsigned int newidx;
906e58ca 5026
c7b8f16e
JB		 5027 if (sec_data->map == NULL)
5028 {
5029 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
5030 sec_data->mapcount = 0;
5031 sec_data->mapsize = 1;
5032 }
906e58ca 5033
c7b8f16e 5034 newidx = sec_data->mapcount++;
906e58ca 5035
c7b8f16e
JB		 5036 if (sec_data->mapcount > sec_data->mapsize)
5037 {
5038 sec_data->mapsize *= 2;
515ef31d
NC		 5039 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5040 * sizeof (elf32_arm_section_map));
5041 }
5042
5043 if (sec_data->map)
5044 {
5045 sec_data->map[newidx].vma = vma;
5046 sec_data->map[newidx].type = type;
c7b8f16e 5047 }
c7b8f16e
JB		 5048}
5049
5050
5051/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5052 veneers are handled for now. */
5053
5054static bfd_vma
5055record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5056 elf32_vfp11_erratum_list *branch,
5057 bfd *branch_bfd,
5058 asection *branch_sec,
5059 unsigned int offset)
5060{
5061 asection *s;
5062 struct elf32_arm_link_hash_table *hash_table;
5063 char *tmp_name;
5064 struct elf_link_hash_entry *myh;
5065 struct bfd_link_hash_entry *bh;
5066 bfd_vma val;
5067 struct _arm_elf_section_data *sec_data;
5068 int errcount;
5069 elf32_vfp11_erratum_list *newerr;
906e58ca 5070
c7b8f16e 5071 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5072
c7b8f16e
JB		 5073 BFD_ASSERT (hash_table != NULL);
5074 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5075
c7b8f16e
JB		 5076 s = bfd_get_section_by_name
5077 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5078
c7b8f16e 5079 sec_data = elf32_arm_section_data (s);
906e58ca 5080
c7b8f16e 5081 BFD_ASSERT (s != NULL);
906e58ca 5082
c7b8f16e
JB		 5083 tmp_name = bfd_malloc ((bfd_size_type) strlen
5084 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5085
c7b8f16e 5086 BFD_ASSERT (tmp_name);
906e58ca 5087
c7b8f16e
JB		 5088 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5089 hash_table->num_vfp11_fixes);
906e58ca 5090
c7b8f16e
JB		 5091 myh = elf_link_hash_lookup
5092 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5093
c7b8f16e 5094 BFD_ASSERT (myh == NULL);
906e58ca 5095
c7b8f16e
JB		 5096 bh = NULL;
5097 val = hash_table->vfp11_erratum_glue_size;
5098 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5099 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5100 NULL, TRUE, FALSE, &bh);
5101
5102 myh = (struct elf_link_hash_entry *) bh;
5103 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5104 myh->forced_local = 1;
5105
5106 /* Link veneer back to calling location. */
5107 errcount = ++(sec_data->erratumcount);
5108 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5109
c7b8f16e
JB		 5110 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5111 newerr->vma = -1;
5112 newerr->u.v.branch = branch;
5113 newerr->u.v.id = hash_table->num_vfp11_fixes;
5114 branch->u.b.veneer = newerr;
5115
5116 newerr->next = sec_data->erratumlist;
5117 sec_data->erratumlist = newerr;
5118
5119 /* A symbol for the return from the veneer. */
5120 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5121 hash_table->num_vfp11_fixes);
5122
5123 myh = elf_link_hash_lookup
5124 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5125
c7b8f16e
JB		 5126 if (myh != NULL)
5127 abort ();
5128
5129 bh = NULL;
5130 val = offset + 4;
5131 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5132 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5133
c7b8f16e
JB		 5134 myh = (struct elf_link_hash_entry *) bh;
5135 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5136 myh->forced_local = 1;
5137
5138 free (tmp_name);
906e58ca 5139
c7b8f16e
JB		 5140 /* Generate a mapping symbol for the veneer section, and explicitly add an
5141 entry for that symbol to the code/data map for the section. */
5142 if (hash_table->vfp11_erratum_glue_size == 0)
5143 {
5144 bh = NULL;
5145 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5146 ever requires this erratum fix. */
5147 _bfd_generic_link_add_one_symbol (link_info,
5148 hash_table->bfd_of_glue_owner, "$a",
5149 BSF_LOCAL, s, 0, NULL,
5150 TRUE, FALSE, &bh);
5151
5152 myh = (struct elf_link_hash_entry *) bh;
5153 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5154 myh->forced_local = 1;
906e58ca 5155
c7b8f16e
JB		 5156 /* The elf32_arm_init_maps function only cares about symbols from input
5157 BFDs. We must make a note of this generated mapping symbol
5158 ourselves so that code byteswapping works properly in
5159 elf32_arm_write_section. */
5160 elf32_arm_section_map_add (s, 'a', 0);
5161 }
906e58ca 5162
c7b8f16e
JB		 5163 s->size += VFP11_ERRATUM_VENEER_SIZE;
5164 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5165 hash_table->num_vfp11_fixes++;
906e58ca 5166
c7b8f16e
JB		 5167 /* The offset of the veneer. */
5168 return val;
5169}
5170
8029a119 5171#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5172 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5173 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5174
5175/* Create a fake section for use by the ARM backend of the linker. */
5176
5177static bfd_boolean
5178arm_make_glue_section (bfd * abfd, const char * name)
5179{
5180 asection * sec;
5181
5182 sec = bfd_get_section_by_name (abfd, name);
5183 if (sec != NULL)
5184 /* Already made. */
5185 return TRUE;
5186
5187 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5188
5189 if (sec == NULL
5190 || !bfd_set_section_alignment (abfd, sec, 2))
5191 return FALSE;
5192
5193 /* Set the gc mark to prevent the section from being removed by garbage
5194 collection, despite the fact that no relocs refer to this section. */
5195 sec->gc_mark = 1;
5196
5197 return TRUE;
5198}
5199
8afb0e02
NC		 5200/* Add the glue sections to ABFD. This function is called from the
5201 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5202
b34976b6 5203bfd_boolean
57e8b36a
NC		 5204bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5205 struct bfd_link_info *info)
252b5132 5206{
8afb0e02
NC		 5207 /* If we are only performing a partial
5208 link do not bother adding the glue. */
1049f94e 5209 if (info->relocatable)
b34976b6 5210 return TRUE;
252b5132 5211
8029a119
NC		 5212 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5213 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5214 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5215 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5216}
5217
5218/* Select a BFD to be used to hold the sections used by the glue code.
5219 This function is called from the linker scripts in ld/emultempl/
8029a119 5220 {armelf/pe}.em. */
8afb0e02 5221
b34976b6 5222bfd_boolean
57e8b36a 5223bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5224{
5225 struct elf32_arm_link_hash_table *globals;
5226
5227 /* If we are only performing a partial link
5228 do not bother getting a bfd to hold the glue. */
1049f94e 5229 if (info->relocatable)
b34976b6 5230 return TRUE;
8afb0e02 5231
b7693d02
DJ		 5232 /* Make sure we don't attach the glue sections to a dynamic object. */
5233 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5234
8afb0e02
NC		 5235 globals = elf32_arm_hash_table (info);
5236
5237 BFD_ASSERT (globals != NULL);
5238
5239 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5240 return TRUE;
8afb0e02 5241
252b5132
RH		 5242 /* Save the bfd for later use. */
5243 globals->bfd_of_glue_owner = abfd;
cedb70c5 5244
b34976b6 5245 return TRUE;
252b5132
RH		 5246}
5247
906e58ca
NC		 5248static void
5249check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5250{
104d59d1
JM		 5251 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5252 Tag_CPU_arch) > 2)
39b41c9c
PB		 5253 globals->use_blx = 1;
5254}
5255
b34976b6 5256bfd_boolean
57e8b36a 5257bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5258 struct bfd_link_info *link_info)
252b5132
RH		 5259{
5260 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5261 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5262 Elf_Internal_Rela *irel, *irelend;
5263 bfd_byte *contents = NULL;
252b5132
RH		 5264
5265 asection *sec;
5266 struct elf32_arm_link_hash_table *globals;
5267
5268 /* If we are only performing a partial link do not bother
5269 to construct any glue. */
1049f94e 5270 if (link_info->relocatable)
b34976b6 5271 return TRUE;
252b5132 5272
39ce1a6a
NC		 5273 /* Here we have a bfd that is to be included on the link. We have a
5274 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5275 globals = elf32_arm_hash_table (link_info);
5276
5277 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5278
5279 check_use_blx (globals);
252b5132 5280
d504ffc8 5281 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5282 {
d003868e
AM		 5283 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5284 abfd);
e489d0ae
PB		 5285 return FALSE;
5286 }
f21f3fe0 5287
39ce1a6a
NC		 5288 /* PR 5398: If we have not decided to include any loadable sections in
5289 the output then we will not have a glue owner bfd. This is OK, it
5290 just means that there is nothing else for us to do here. */
5291 if (globals->bfd_of_glue_owner == NULL)
5292 return TRUE;
5293
252b5132
RH		 5294 /* Rummage around all the relocs and map the glue vectors. */
5295 sec = abfd->sections;
5296
5297 if (sec == NULL)
b34976b6 5298 return TRUE;
252b5132
RH		 5299
5300 for (; sec != NULL; sec = sec->next)
5301 {
5302 if (sec->reloc_count == 0)
5303 continue;
5304
2f475487
AM		 5305 if ((sec->flags & SEC_EXCLUDE) != 0)
5306 continue;
5307
0ffa91dd 5308 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5309
9b485d32 5310 /* Load the relocs. */
6cdc0ccc 5311 internal_relocs
906e58ca 5312 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5313
6cdc0ccc
AM		 5314 if (internal_relocs == NULL)
5315 goto error_return;
252b5132 5316
6cdc0ccc
AM		 5317 irelend = internal_relocs + sec->reloc_count;
5318 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5319 {
5320 long r_type;
5321 unsigned long r_index;
252b5132
RH		 5322
5323 struct elf_link_hash_entry *h;
5324
5325 r_type = ELF32_R_TYPE (irel->r_info);
5326 r_index = ELF32_R_SYM (irel->r_info);
5327
9b485d32 5328 /* These are the only relocation types we care about. */
ba96a88f 5329 if ( r_type != R_ARM_PC24
845b51d6 5330 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5331 continue;
5332
5333 /* Get the section contents if we haven't done so already. */
5334 if (contents == NULL)
5335 {
5336 /* Get cached copy if it exists. */
5337 if (elf_section_data (sec)->this_hdr.contents != NULL)
5338 contents = elf_section_data (sec)->this_hdr.contents;
5339 else
5340 {
5341 /* Go get them off disk. */
57e8b36a 5342 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5343 goto error_return;
5344 }
5345 }
5346
845b51d6
PB		 5347 if (r_type == R_ARM_V4BX)
5348 {
5349 int reg;
5350
5351 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5352 record_arm_bx_glue (link_info, reg);
5353 continue;
5354 }
5355
a7c10850 5356 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5357 h = NULL;
5358
9b485d32 5359 /* We don't care about local symbols. */
252b5132
RH		 5360 if (r_index < symtab_hdr->sh_info)
5361 continue;
5362
9b485d32 5363 /* This is an external symbol. */
252b5132
RH		 5364 r_index -= symtab_hdr->sh_info;
5365 h = (struct elf_link_hash_entry *)
5366 elf_sym_hashes (abfd)[r_index];
5367
5368 /* If the relocation is against a static symbol it must be within
5369 the current section and so cannot be a cross ARM/Thumb relocation. */
5370 if (h == NULL)
5371 continue;
5372
d504ffc8
DJ		 5373 /* If the call will go through a PLT entry then we do not need
5374 glue. */
5375 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5376 continue;
5377
252b5132
RH		 5378 switch (r_type)
5379 {
5380 case R_ARM_PC24:
5381 /* This one is a call from arm code. We need to look up
2f0ca46a 5382 the target of the call. If it is a thumb target, we
252b5132 5383 insert glue. */
ebe24dd4 5384 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5385 record_arm_to_thumb_glue (link_info, h);
5386 break;
5387
252b5132 5388 default:
c6596c5e 5389 abort ();
252b5132
RH		 5390 }
5391 }
6cdc0ccc
AM		 5392
5393 if (contents != NULL
5394 && elf_section_data (sec)->this_hdr.contents != contents)
5395 free (contents);
5396 contents = NULL;
5397
5398 if (internal_relocs != NULL
5399 && elf_section_data (sec)->relocs != internal_relocs)
5400 free (internal_relocs);
5401 internal_relocs = NULL;
252b5132
RH		 5402 }
5403
b34976b6 5404 return TRUE;
9a5aca8c 5405
252b5132 5406error_return:
6cdc0ccc
AM		 5407 if (contents != NULL
5408 && elf_section_data (sec)->this_hdr.contents != contents)
5409 free (contents);
5410 if (internal_relocs != NULL
5411 && elf_section_data (sec)->relocs != internal_relocs)
5412 free (internal_relocs);
9a5aca8c 5413
b34976b6 5414 return FALSE;
252b5132 5415}
7e392df6 5416#endif
252b5132 5417
eb043451 5418
c7b8f16e
JB		 5419/* Initialise maps of ARM/Thumb/data for input BFDs. */
5420
5421void
5422bfd_elf32_arm_init_maps (bfd *abfd)
5423{
5424 Elf_Internal_Sym *isymbuf;
5425 Elf_Internal_Shdr *hdr;
5426 unsigned int i, localsyms;
5427
af1f4419
NC		 5428 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5429 if (! is_arm_elf (abfd))
5430 return;
5431
c7b8f16e
JB		 5432 if ((abfd->flags & DYNAMIC) != 0)
5433 return;
5434
0ffa91dd 5435 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5436 localsyms = hdr->sh_info;
5437
5438 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5439 should contain the number of local symbols, which should come before any
5440 global symbols. Mapping symbols are always local. */
5441 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5442 NULL);
5443
5444 /* No internal symbols read? Skip this BFD. */
5445 if (isymbuf == NULL)
5446 return;
5447
5448 for (i = 0; i < localsyms; i++)
5449 {
5450 Elf_Internal_Sym *isym = &isymbuf[i];
5451 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5452 const char *name;
906e58ca 5453
c7b8f16e
JB		 5454 if (sec != NULL
5455 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5456 {
5457 name = bfd_elf_string_from_elf_section (abfd,
5458 hdr->sh_link, isym->st_name);
906e58ca 5459
c7b8f16e
JB		 5460 if (bfd_is_arm_special_symbol_name (name,
5461 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5462 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5463 }
5464 }
5465}
5466
5467
48229727
JB		 5468/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5469 say what they wanted. */
5470
5471void
5472bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5473{
5474 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5475 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5476
5477 if (globals->fix_cortex_a8 == -1)
5478 {
5479 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5480 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5481 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5482 || out_attr[Tag_CPU_arch_profile].i == 0))
5483 globals->fix_cortex_a8 = 1;
5484 else
5485 globals->fix_cortex_a8 = 0;
5486 }
5487}
5488
5489
c7b8f16e
JB		 5490void
5491bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5492{
5493 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5494 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5495
c7b8f16e
JB		 5496 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5497 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5498 {
5499 switch (globals->vfp11_fix)
5500 {
5501 case BFD_ARM_VFP11_FIX_DEFAULT:
5502 case BFD_ARM_VFP11_FIX_NONE:
5503 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5504 break;
906e58ca 5505
c7b8f16e
JB		 5506 default:
5507 /* Give a warning, but do as the user requests anyway. */
5508 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5509 "workaround is not necessary for target architecture"), obfd);
5510 }
5511 }
5512 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5513 /* For earlier architectures, we might need the workaround, but do not
5514 enable it by default. If users is running with broken hardware, they
5515 must enable the erratum fix explicitly. */
5516 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5517}
5518
5519
906e58ca
NC		 5520enum bfd_arm_vfp11_pipe
5521{
c7b8f16e
JB		 5522 VFP11_FMAC,
5523 VFP11_LS,
5524 VFP11_DS,
5525 VFP11_BAD
5526};
5527
5528/* Return a VFP register number. This is encoded as RX:X for single-precision
5529 registers, or X:RX for double-precision registers, where RX is the group of
5530 four bits in the instruction encoding and X is the single extension bit.
5531 RX and X fields are specified using their lowest (starting) bit. The return
5532 value is:
5533
5534 0...31: single-precision registers s0...s31
5535 32...63: double-precision registers d0...d31.
906e58ca 5536
c7b8f16e
JB		 5537 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5538 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5539
c7b8f16e
JB		 5540static unsigned int
5541bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5542 unsigned int x)
5543{
5544 if (is_double)
5545 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5546 else
5547 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5548}
5549
5550/* Set bits in *WMASK according to a register number REG as encoded by
5551 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5552
5553static void
5554bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5555{
5556 if (reg < 32)
5557 *wmask |= 1 << reg;
5558 else if (reg < 48)
5559 *wmask |= 3 << ((reg - 32) * 2);
5560}
5561
5562/* Return TRUE if WMASK overwrites anything in REGS. */
5563
5564static bfd_boolean
5565bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5566{
5567 int i;
906e58ca 5568
c7b8f16e
JB		 5569 for (i = 0; i < numregs; i++)
5570 {
5571 unsigned int reg = regs[i];
5572
5573 if (reg < 32 && (wmask & (1 << reg)) != 0)
5574 return TRUE;
906e58ca 5575
c7b8f16e
JB		 5576 reg -= 32;
5577
5578 if (reg >= 16)
5579 continue;
906e58ca 5580
c7b8f16e
JB		 5581 if ((wmask & (3 << (reg * 2))) != 0)
5582 return TRUE;
5583 }
906e58ca 5584
c7b8f16e
JB		 5585 return FALSE;
5586}
5587
5588/* In this function, we're interested in two things: finding input registers
5589 for VFP data-processing instructions, and finding the set of registers which
5590 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5591 hold the written set, so FLDM etc. are easy to deal with (we're only
5592 interested in 32 SP registers or 16 dp registers, due to the VFP version
5593 implemented by the chip in question). DP registers are marked by setting
5594 both SP registers in the write mask). */
5595
5596static enum bfd_arm_vfp11_pipe
5597bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5598 int *numregs)
5599{
5600 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
5601 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5602
5603 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5604 {
5605 unsigned int pqrs;
5606 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5607 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5608
5609 pqrs = ((insn & 0x00800000) >> 20)
5610 | ((insn & 0x00300000) >> 19)
5611 | ((insn & 0x00000040) >> 6);
5612
5613 switch (pqrs)
5614 {
5615 case 0: /* fmac[sd]. */
5616 case 1: /* fnmac[sd]. */
5617 case 2: /* fmsc[sd]. */
5618 case 3: /* fnmsc[sd]. */
5619 pipe = VFP11_FMAC;
5620 bfd_arm_vfp11_write_mask (destmask, fd);
5621 regs[0] = fd;
5622 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5623 regs[2] = fm;
5624 *numregs = 3;
5625 break;
5626
5627 case 4: /* fmul[sd]. */
5628 case 5: /* fnmul[sd]. */
5629 case 6: /* fadd[sd]. */
5630 case 7: /* fsub[sd]. */
5631 pipe = VFP11_FMAC;
5632 goto vfp_binop;
5633
5634 case 8: /* fdiv[sd]. */
5635 pipe = VFP11_DS;
5636 vfp_binop:
5637 bfd_arm_vfp11_write_mask (destmask, fd);
5638 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5639 regs[1] = fm;
5640 *numregs = 2;
5641 break;
5642
5643 case 15: /* extended opcode. */
5644 {
5645 unsigned int extn = ((insn >> 15) & 0x1e)
5646 | ((insn >> 7) & 1);
5647
5648 switch (extn)
5649 {
5650 case 0: /* fcpy[sd]. */
5651 case 1: /* fabs[sd]. */
5652 case 2: /* fneg[sd]. */
5653 case 8: /* fcmp[sd]. */
5654 case 9: /* fcmpe[sd]. */
5655 case 10: /* fcmpz[sd]. */
5656 case 11: /* fcmpez[sd]. */
5657 case 16: /* fuito[sd]. */
5658 case 17: /* fsito[sd]. */
5659 case 24: /* ftoui[sd]. */
5660 case 25: /* ftouiz[sd]. */
5661 case 26: /* ftosi[sd]. */
5662 case 27: /* ftosiz[sd]. */
5663 /* These instructions will not bounce due to underflow. */
5664 *numregs = 0;
5665 pipe = VFP11_FMAC;
5666 break;
5667
5668 case 3: /* fsqrt[sd]. */
5669 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5670 registers to cause the erratum in previous instructions. */
5671 bfd_arm_vfp11_write_mask (destmask, fd);
5672 pipe = VFP11_DS;
5673 break;
5674
5675 case 15: /* fcvt{ds,sd}. */
5676 {
5677 int rnum = 0;
5678
5679 bfd_arm_vfp11_write_mask (destmask, fd);
5680
5681 /* Only FCVTSD can underflow. */
5682 if ((insn & 0x100) != 0)
5683 regs[rnum++] = fm;
5684
5685 *numregs = rnum;
5686
5687 pipe = VFP11_FMAC;
5688 }
5689 break;
5690
5691 default:
5692 return VFP11_BAD;
5693 }
5694 }
5695 break;
5696
5697 default:
5698 return VFP11_BAD;
5699 }
5700 }
5701 /* Two-register transfer. */
5702 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5703 {
5704 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5705
c7b8f16e
JB		 5706 if ((insn & 0x100000) == 0)
5707 {
5708 if (is_double)
5709 bfd_arm_vfp11_write_mask (destmask, fm);
5710 else
5711 {
5712 bfd_arm_vfp11_write_mask (destmask, fm);
5713 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5714 }
5715 }
5716
5717 pipe = VFP11_LS;
5718 }
5719 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5720 {
5721 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5722 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5723
c7b8f16e
JB		 5724 switch (puw)
5725 {
5726 case 0: /* Two-reg transfer. We should catch these above. */
5727 abort ();
906e58ca 5728
c7b8f16e
JB		 5729 case 2: /* fldm[sdx]. */
5730 case 3:
5731 case 5:
5732 {
5733 unsigned int i, offset = insn & 0xff;
5734
5735 if (is_double)
5736 offset >>= 1;
5737
5738 for (i = fd; i < fd + offset; i++)
5739 bfd_arm_vfp11_write_mask (destmask, i);
5740 }
5741 break;
906e58ca 5742
c7b8f16e
JB		 5743 case 4: /* fld[sd]. */
5744 case 6:
5745 bfd_arm_vfp11_write_mask (destmask, fd);
5746 break;
906e58ca 5747
c7b8f16e
JB		 5748 default:
5749 return VFP11_BAD;
5750 }
5751
5752 pipe = VFP11_LS;
5753 }
5754 /* Single-register transfer. Note L==0. */
5755 else if ((insn & 0x0f100e10) == 0x0e000a10)
5756 {
5757 unsigned int opcode = (insn >> 21) & 7;
5758 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5759
5760 switch (opcode)
5761 {
5762 case 0: /* fmsr/fmdlr. */
5763 case 1: /* fmdhr. */
5764 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5765 destination register. I don't know if this is exactly right,
5766 but it is the conservative choice. */
5767 bfd_arm_vfp11_write_mask (destmask, fn);
5768 break;
5769
5770 case 7: /* fmxr. */
5771 break;
5772 }
5773
5774 pipe = VFP11_LS;
5775 }
5776
5777 return pipe;
5778}
5779
5780
5781static int elf32_arm_compare_mapping (const void * a, const void * b);
5782
5783
5784/* Look for potentially-troublesome code sequences which might trigger the
5785 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5786 (available from ARM) for details of the erratum. A short version is
5787 described in ld.texinfo. */
5788
5789bfd_boolean
5790bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5791{
5792 asection *sec;
5793 bfd_byte *contents = NULL;
5794 int state = 0;
5795 int regs[3], numregs = 0;
5796 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5797 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5798
c7b8f16e
JB		 5799 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5800 The states transition as follows:
906e58ca 5801
c7b8f16e
JB		 5802 0 -> 1 (vector) or 0 -> 2 (scalar)
5803 A VFP FMAC-pipeline instruction has been seen. Fill
5804 regs[0]..regs[numregs-1] with its input operands. Remember this
5805 instruction in 'first_fmac'.
5806
5807 1 -> 2
5808 Any instruction, except for a VFP instruction which overwrites
5809 regs[*].
906e58ca 5810
c7b8f16e
JB		 5811 1 -> 3 [ -> 0 ] or
5812 2 -> 3 [ -> 0 ]
5813 A VFP instruction has been seen which overwrites any of regs[*].
5814 We must make a veneer! Reset state to 0 before examining next
5815 instruction.
906e58ca 5816
c7b8f16e
JB		 5817 2 -> 0
5818 If we fail to match anything in state 2, reset to state 0 and reset
5819 the instruction pointer to the instruction after 'first_fmac'.
5820
5821 If the VFP11 vector mode is in use, there must be at least two unrelated
5822 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5823 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5824
5825 /* If we are only performing a partial link do not bother
5826 to construct any glue. */
5827 if (link_info->relocatable)
5828 return TRUE;
5829
0ffa91dd
NC		 5830 /* Skip if this bfd does not correspond to an ELF image. */
5831 if (! is_arm_elf (abfd))
5832 return TRUE;
906e58ca 5833
c7b8f16e
JB		 5834 /* We should have chosen a fix type by the time we get here. */
5835 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5836
5837 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5838 return TRUE;
2e6030b9 5839
33a7ffc2
JM		 5840 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5841 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5842 return TRUE;
5843
c7b8f16e
JB		 5844 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5845 {
5846 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5847 struct _arm_elf_section_data *sec_data;
5848
5849 /* If we don't have executable progbits, we're not interested in this
5850 section. Also skip if section is to be excluded. */
5851 if (elf_section_type (sec) != SHT_PROGBITS
5852 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5853 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5854 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5855 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5856 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5857 continue;
5858
5859 sec_data = elf32_arm_section_data (sec);
906e58ca 5860
c7b8f16e
JB		 5861 if (sec_data->mapcount == 0)
5862 continue;
906e58ca 5863
c7b8f16e
JB		 5864 if (elf_section_data (sec)->this_hdr.contents != NULL)
5865 contents = elf_section_data (sec)->this_hdr.contents;
5866 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5867 goto error_return;
5868
5869 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5870 elf32_arm_compare_mapping);
5871
5872 for (span = 0; span < sec_data->mapcount; span++)
5873 {
5874 unsigned int span_start = sec_data->map[span].vma;
5875 unsigned int span_end = (span == sec_data->mapcount - 1)
5876 ? sec->size : sec_data->map[span + 1].vma;
5877 char span_type = sec_data->map[span].type;
906e58ca 5878
c7b8f16e
JB		 5879 /* FIXME: Only ARM mode is supported at present. We may need to
5880 support Thumb-2 mode also at some point. */
5881 if (span_type != 'a')
5882 continue;
5883
5884 for (i = span_start; i < span_end;)
5885 {
5886 unsigned int next_i = i + 4;
5887 unsigned int insn = bfd_big_endian (abfd)
5888 ? (contents[i] << 24)
5889 | (contents[i + 1] << 16)
5890 | (contents[i + 2] << 8)
5891 | contents[i + 3]
5892 : (contents[i + 3] << 24)
5893 | (contents[i + 2] << 16)
5894 | (contents[i + 1] << 8)
5895 | contents[i];
5896 unsigned int writemask = 0;
5897 enum bfd_arm_vfp11_pipe pipe;
5898
5899 switch (state)
5900 {
5901 case 0:
5902 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5903 &numregs);
5904 /* I'm assuming the VFP11 erratum can trigger with denorm
5905 operands on either the FMAC or the DS pipeline. This might
5906 lead to slightly overenthusiastic veneer insertion. */
5907 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5908 {
5909 state = use_vector ? 1 : 2;
5910 first_fmac = i;
5911 veneer_of_insn = insn;
5912 }
5913 break;
5914
5915 case 1:
5916 {
5917 int other_regs[3], other_numregs;
5918 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5919 other_regs,
5920 &other_numregs);
5921 if (pipe != VFP11_BAD
5922 && bfd_arm_vfp11_antidependency (writemask, regs,
5923 numregs))
5924 state = 3;
5925 else
5926 state = 2;
5927 }
5928 break;
5929
5930 case 2:
5931 {
5932 int other_regs[3], other_numregs;
5933 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5934 other_regs,
5935 &other_numregs);
5936 if (pipe != VFP11_BAD
5937 && bfd_arm_vfp11_antidependency (writemask, regs,
5938 numregs))
5939 state = 3;
5940 else
5941 {
5942 state = 0;
5943 next_i = first_fmac + 4;
5944 }
5945 }
5946 break;
5947
5948 case 3:
5949 abort (); /* Should be unreachable. */
5950 }
5951
5952 if (state == 3)
5953 {
5954 elf32_vfp11_erratum_list *newerr
5955 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5956 int errcount;
5957
5958 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
5959
5960 newerr->u.b.vfp_insn = veneer_of_insn;
5961
5962 switch (span_type)
5963 {
5964 case 'a':
5965 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
5966 break;
906e58ca 5967
c7b8f16e
JB		 5968 default:
5969 abort ();
5970 }
5971
5972 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
5973 first_fmac);
5974
5975 newerr->vma = -1;
5976
5977 newerr->next = sec_data->erratumlist;
5978 sec_data->erratumlist = newerr;
5979
5980 state = 0;
5981 }
5982
5983 i = next_i;
5984 }
5985 }
906e58ca 5986
c7b8f16e
JB		 5987 if (contents != NULL
5988 && elf_section_data (sec)->this_hdr.contents != contents)
5989 free (contents);
5990 contents = NULL;
5991 }
5992
5993 return TRUE;
5994
5995error_return:
5996 if (contents != NULL
5997 && elf_section_data (sec)->this_hdr.contents != contents)
5998 free (contents);
906e58ca 5999
c7b8f16e
JB		 6000 return FALSE;
6001}
6002
6003/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6004 after sections have been laid out, using specially-named symbols. */
6005
6006void
6007bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6008 struct bfd_link_info *link_info)
6009{
6010 asection *sec;
6011 struct elf32_arm_link_hash_table *globals;
6012 char *tmp_name;
906e58ca 6013
c7b8f16e
JB		 6014 if (link_info->relocatable)
6015 return;
2e6030b9
MS		 6016
6017 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6018 if (! is_arm_elf (abfd))
2e6030b9
MS		 6019 return;
6020
c7b8f16e 6021 globals = elf32_arm_hash_table (link_info);
906e58ca 6022
c7b8f16e
JB		 6023 tmp_name = bfd_malloc ((bfd_size_type) strlen
6024 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6025
6026 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6027 {
6028 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6029 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6030
c7b8f16e
JB		 6031 for (; errnode != NULL; errnode = errnode->next)
6032 {
6033 struct elf_link_hash_entry *myh;
6034 bfd_vma vma;
6035
6036 switch (errnode->type)
6037 {
6038 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6039 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6040 /* Find veneer symbol. */
6041 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6042 errnode->u.b.veneer->u.v.id);
6043
6044 myh = elf_link_hash_lookup
6045 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6046
6047 if (myh == NULL)
6048 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6049 "`%s'"), abfd, tmp_name);
6050
6051 vma = myh->root.u.def.section->output_section->vma
6052 + myh->root.u.def.section->output_offset
6053 + myh->root.u.def.value;
6054
6055 errnode->u.b.veneer->vma = vma;
6056 break;
6057
6058 case VFP11_ERRATUM_ARM_VENEER:
6059 case VFP11_ERRATUM_THUMB_VENEER:
6060 /* Find return location. */
6061 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6062 errnode->u.v.id);
6063
6064 myh = elf_link_hash_lookup
6065 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6066
6067 if (myh == NULL)
6068 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6069 "`%s'"), abfd, tmp_name);
6070
6071 vma = myh->root.u.def.section->output_section->vma
6072 + myh->root.u.def.section->output_offset
6073 + myh->root.u.def.value;
6074
6075 errnode->u.v.branch->vma = vma;
6076 break;
906e58ca 6077
c7b8f16e
JB		 6078 default:
6079 abort ();
6080 }
6081 }
6082 }
906e58ca 6083
c7b8f16e
JB		 6084 free (tmp_name);
6085}
6086
6087
eb043451
PB		 6088/* Set target relocation values needed during linking. */
6089
6090void
bf21ed78
MS		 6091bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6092 struct bfd_link_info *link_info,
eb043451 6093 int target1_is_rel,
319850b4 6094 char * target2_type,
33bfe774 6095 int fix_v4bx,
c7b8f16e 6096 int use_blx,
bf21ed78 6097 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6098 int no_enum_warn, int no_wchar_warn,
48229727 6099 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6100{
6101 struct elf32_arm_link_hash_table *globals;
6102
6103 globals = elf32_arm_hash_table (link_info);
6104
6105 globals->target1_is_rel = target1_is_rel;
6106 if (strcmp (target2_type, "rel") == 0)
6107 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6108 else if (strcmp (target2_type, "abs") == 0)
6109 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6110 else if (strcmp (target2_type, "got-rel") == 0)
6111 globals->target2_reloc = R_ARM_GOT_PREL;
6112 else
6113 {
6114 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6115 target2_type);
6116 }
319850b4 6117 globals->fix_v4bx = fix_v4bx;
33bfe774 6118 globals->use_blx |= use_blx;
c7b8f16e 6119 globals->vfp11_fix = vfp11_fix;
27e55c4d 6120 globals->pic_veneer = pic_veneer;
48229727 6121 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6122
0ffa91dd
NC		 6123 BFD_ASSERT (is_arm_elf (output_bfd));
6124 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6125 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6126}
eb043451 6127
12a0a0fd 6128/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6129
12a0a0fd
PB		 6130static void
6131insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6132{
6133 bfd_vma upper;
6134 bfd_vma lower;
6135 int reloc_sign;
6136
6137 BFD_ASSERT ((offset & 1) == 0);
6138
6139 upper = bfd_get_16 (abfd, insn);
6140 lower = bfd_get_16 (abfd, insn + 2);
6141 reloc_sign = (offset < 0) ? 1 : 0;
6142 upper = (upper & ~(bfd_vma) 0x7ff)
6143 | ((offset >> 12) & 0x3ff)
6144 | (reloc_sign << 10);
906e58ca 6145 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6146 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6147 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6148 | ((offset >> 1) & 0x7ff);
6149 bfd_put_16 (abfd, upper, insn);
6150 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6151}
6152
9b485d32
NC		 6153/* Thumb code calling an ARM function. */
6154
252b5132 6155static int
57e8b36a
NC		 6156elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6157 const char * name,
6158 bfd * input_bfd,
6159 bfd * output_bfd,
6160 asection * input_section,
6161 bfd_byte * hit_data,
6162 asection * sym_sec,
6163 bfd_vma offset,
6164 bfd_signed_vma addend,
f2a9dd69
DJ		 6165 bfd_vma val,
6166 char **error_message)
252b5132 6167{
bcbdc74c 6168 asection * s = 0;
dc810e39 6169 bfd_vma my_offset;
252b5132 6170 long int ret_offset;
bcbdc74c
NC		 6171 struct elf_link_hash_entry * myh;
6172 struct elf32_arm_link_hash_table * globals;
252b5132 6173
f2a9dd69 6174 myh = find_thumb_glue (info, name, error_message);
252b5132 6175 if (myh == NULL)
b34976b6 6176 return FALSE;
252b5132
RH		 6177
6178 globals = elf32_arm_hash_table (info);
6179
6180 BFD_ASSERT (globals != NULL);
6181 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6182
6183 my_offset = myh->root.u.def.value;
6184
6185 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6186 THUMB2ARM_GLUE_SECTION_NAME);
6187
6188 BFD_ASSERT (s != NULL);
6189 BFD_ASSERT (s->contents != NULL);
6190 BFD_ASSERT (s->output_section != NULL);
6191
6192 if ((my_offset & 0x01) == 0x01)
6193 {
6194 if (sym_sec != NULL
6195 && sym_sec->owner != NULL
6196 && !INTERWORK_FLAG (sym_sec->owner))
6197 {
8f615d07 6198 (*_bfd_error_handler)
d003868e
AM		 6199 (_("%B(%s): warning: interworking not enabled.\n"
6200 " first occurrence: %B: thumb call to arm"),
6201 sym_sec->owner, input_bfd, name);
252b5132 6202
b34976b6 6203 return FALSE;
252b5132
RH		 6204 }
6205
6206 --my_offset;
6207 myh->root.u.def.value = my_offset;
6208
52ab56c2
PB		 6209 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6210 s->contents + my_offset);
252b5132 6211
52ab56c2
PB		 6212 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6213 s->contents + my_offset + 2);
252b5132
RH		 6214
6215 ret_offset =
9b485d32
NC		 6216 /* Address of destination of the stub. */
6217 ((bfd_signed_vma) val)
252b5132 6218 - ((bfd_signed_vma)
57e8b36a
NC		 6219 /* Offset from the start of the current section
6220 to the start of the stubs. */
9b485d32
NC		 6221 (s->output_offset
6222 /* Offset of the start of this stub from the start of the stubs. */
6223 + my_offset
6224 /* Address of the start of the current section. */
6225 + s->output_section->vma)
6226 /* The branch instruction is 4 bytes into the stub. */
6227 + 4
6228 /* ARM branches work from the pc of the instruction + 8. */
6229 + 8);
252b5132 6230
52ab56c2
PB		 6231 put_arm_insn (globals, output_bfd,
6232 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6233 s->contents + my_offset + 4);
252b5132
RH		 6234 }
6235
6236 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6237
427bfd90
NC		 6238 /* Now go back and fix up the original BL insn to point to here. */
6239 ret_offset =
6240 /* Address of where the stub is located. */
6241 (s->output_section->vma + s->output_offset + my_offset)
6242 /* Address of where the BL is located. */
57e8b36a
NC		 6243 - (input_section->output_section->vma + input_section->output_offset
6244 + offset)
427bfd90
NC		 6245 /* Addend in the relocation. */
6246 - addend
6247 /* Biassing for PC-relative addressing. */
6248 - 8;
252b5132 6249
12a0a0fd 6250 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6251
b34976b6 6252 return TRUE;
252b5132
RH		 6253}
6254
a4fd1a8e 6255/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6256
a4fd1a8e
PB		 6257static struct elf_link_hash_entry *
6258elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6259 const char * name,
6260 bfd * input_bfd,
6261 bfd * output_bfd,
6262 asection * sym_sec,
6263 bfd_vma val,
8029a119
NC		 6264 asection * s,
6265 char ** error_message)
252b5132 6266{
dc810e39 6267 bfd_vma my_offset;
252b5132 6268 long int ret_offset;
bcbdc74c
NC		 6269 struct elf_link_hash_entry * myh;
6270 struct elf32_arm_link_hash_table * globals;
252b5132 6271
f2a9dd69 6272 myh = find_arm_glue (info, name, error_message);
252b5132 6273 if (myh == NULL)
a4fd1a8e 6274 return NULL;
252b5132
RH		 6275
6276 globals = elf32_arm_hash_table (info);
6277
6278 BFD_ASSERT (globals != NULL);
6279 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6280
6281 my_offset = myh->root.u.def.value;
252b5132
RH		 6282
6283 if ((my_offset & 0x01) == 0x01)
6284 {
6285 if (sym_sec != NULL
6286 && sym_sec->owner != NULL
6287 && !INTERWORK_FLAG (sym_sec->owner))
6288 {
8f615d07 6289 (*_bfd_error_handler)
d003868e
AM		 6290 (_("%B(%s): warning: interworking not enabled.\n"
6291 " first occurrence: %B: arm call to thumb"),
6292 sym_sec->owner, input_bfd, name);
252b5132 6293 }
9b485d32 6294
252b5132
RH		 6295 --my_offset;
6296 myh->root.u.def.value = my_offset;
6297
27e55c4d
PB		 6298 if (info->shared || globals->root.is_relocatable_executable
6299 || globals->pic_veneer)
8f6277f5
PB		 6300 {
6301 /* For relocatable objects we can't use absolute addresses,
6302 so construct the address from a relative offset. */
6303 /* TODO: If the offset is small it's probably worth
6304 constructing the address with adds. */
52ab56c2
PB		 6305 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6306 s->contents + my_offset);
6307 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6308 s->contents + my_offset + 4);
6309 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6310 s->contents + my_offset + 8);
8f6277f5
PB		 6311 /* Adjust the offset by 4 for the position of the add,
6312 and 8 for the pipeline offset. */
6313 ret_offset = (val - (s->output_offset
6314 + s->output_section->vma
6315 + my_offset + 12))
6316 | 1;
6317 bfd_put_32 (output_bfd, ret_offset,
6318 s->contents + my_offset + 12);
6319 }
26079076
PB		 6320 else if (globals->use_blx)
6321 {
6322 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6323 s->contents + my_offset);
6324
6325 /* It's a thumb address. Add the low order bit. */
6326 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6327 s->contents + my_offset + 4);
6328 }
8f6277f5
PB		 6329 else
6330 {
52ab56c2
PB		 6331 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6332 s->contents + my_offset);
252b5132 6333
52ab56c2
PB		 6334 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6335 s->contents + my_offset + 4);
252b5132 6336
8f6277f5
PB		 6337 /* It's a thumb address. Add the low order bit. */
6338 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6339 s->contents + my_offset + 8);
8029a119
NC		 6340
6341 my_offset += 12;
8f6277f5 6342 }
252b5132
RH		 6343 }
6344
6345 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6346
a4fd1a8e
PB		 6347 return myh;
6348}
6349
6350/* Arm code calling a Thumb function. */
6351
6352static int
6353elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6354 const char * name,
6355 bfd * input_bfd,
6356 bfd * output_bfd,
6357 asection * input_section,
6358 bfd_byte * hit_data,
6359 asection * sym_sec,
6360 bfd_vma offset,
6361 bfd_signed_vma addend,
f2a9dd69
DJ		 6362 bfd_vma val,
6363 char **error_message)
a4fd1a8e
PB		 6364{
6365 unsigned long int tmp;
6366 bfd_vma my_offset;
6367 asection * s;
6368 long int ret_offset;
6369 struct elf_link_hash_entry * myh;
6370 struct elf32_arm_link_hash_table * globals;
6371
6372 globals = elf32_arm_hash_table (info);
6373
6374 BFD_ASSERT (globals != NULL);
6375 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6376
6377 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6378 ARM2THUMB_GLUE_SECTION_NAME);
6379 BFD_ASSERT (s != NULL);
6380 BFD_ASSERT (s->contents != NULL);
6381 BFD_ASSERT (s->output_section != NULL);
6382
6383 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6384 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6385 if (!myh)
6386 return FALSE;
6387
6388 my_offset = myh->root.u.def.value;
252b5132
RH		 6389 tmp = bfd_get_32 (input_bfd, hit_data);
6390 tmp = tmp & 0xFF000000;
6391
9b485d32 6392 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6393 ret_offset = (s->output_offset
6394 + my_offset
6395 + s->output_section->vma
6396 - (input_section->output_offset
6397 + input_section->output_section->vma
6398 + offset + addend)
6399 - 8);
9a5aca8c 6400
252b5132
RH		 6401 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6402
dc810e39 6403 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6404
b34976b6 6405 return TRUE;
252b5132
RH		 6406}
6407
a4fd1a8e
PB		 6408/* Populate Arm stub for an exported Thumb function. */
6409
6410static bfd_boolean
6411elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6412{
6413 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6414 asection * s;
6415 struct elf_link_hash_entry * myh;
6416 struct elf32_arm_link_hash_entry *eh;
6417 struct elf32_arm_link_hash_table * globals;
6418 asection *sec;
6419 bfd_vma val;
f2a9dd69 6420 char *error_message;
a4fd1a8e 6421
906e58ca 6422 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6423 /* Allocate stubs for exported Thumb functions on v4t. */
6424 if (eh->export_glue == NULL)
6425 return TRUE;
6426
6427 globals = elf32_arm_hash_table (info);
6428
6429 BFD_ASSERT (globals != NULL);
6430 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6431
6432 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6433 ARM2THUMB_GLUE_SECTION_NAME);
6434 BFD_ASSERT (s != NULL);
6435 BFD_ASSERT (s->contents != NULL);
6436 BFD_ASSERT (s->output_section != NULL);
6437
6438 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6439
6440 BFD_ASSERT (sec->output_section != NULL);
6441
a4fd1a8e
PB		 6442 val = eh->export_glue->root.u.def.value + sec->output_offset
6443 + sec->output_section->vma;
8029a119 6444
a4fd1a8e
PB		 6445 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6446 h->root.u.def.section->owner,
f2a9dd69
DJ		 6447 globals->obfd, sec, val, s,
6448 &error_message);
a4fd1a8e
PB		 6449 BFD_ASSERT (myh);
6450 return TRUE;
6451}
6452
845b51d6
PB		 6453/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6454
6455static bfd_vma
6456elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6457{
6458 bfd_byte *p;
6459 bfd_vma glue_addr;
6460 asection *s;
6461 struct elf32_arm_link_hash_table *globals;
6462
6463 globals = elf32_arm_hash_table (info);
6464
6465 BFD_ASSERT (globals != NULL);
6466 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6467
6468 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6469 ARM_BX_GLUE_SECTION_NAME);
6470 BFD_ASSERT (s != NULL);
6471 BFD_ASSERT (s->contents != NULL);
6472 BFD_ASSERT (s->output_section != NULL);
6473
6474 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6475
6476 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6477
6478 if ((globals->bx_glue_offset[reg] & 1) == 0)
6479 {
6480 p = s->contents + glue_addr;
6481 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6482 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6483 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6484 globals->bx_glue_offset[reg] |= 1;
6485 }
6486
6487 return glue_addr + s->output_section->vma + s->output_offset;
6488}
6489
a4fd1a8e
PB		 6490/* Generate Arm stubs for exported Thumb symbols. */
6491static void
906e58ca 6492elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6493 struct bfd_link_info *link_info)
6494{
6495 struct elf32_arm_link_hash_table * globals;
6496
8029a119
NC		 6497 if (link_info == NULL)
6498 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6499 return;
6500
6501 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6502 /* If blx is available then exported Thumb symbols are OK and there is
6503 nothing to do. */
a4fd1a8e
PB		 6504 if (globals->use_blx)
6505 return;
6506
6507 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6508 link_info);
6509}
6510
eb043451
PB		 6511/* Some relocations map to different relocations depending on the
6512 target. Return the real relocation. */
8029a119 6513
eb043451
PB		 6514static int
6515arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6516 int r_type)
6517{
6518 switch (r_type)
6519 {
6520 case R_ARM_TARGET1:
6521 if (globals->target1_is_rel)
6522 return R_ARM_REL32;
6523 else
6524 return R_ARM_ABS32;
6525
6526 case R_ARM_TARGET2:
6527 return globals->target2_reloc;
6528
6529 default:
6530 return r_type;
6531 }
6532}
eb043451 6533
ba93b8ac
DJ		 6534/* Return the base VMA address which should be subtracted from real addresses
6535 when resolving @dtpoff relocation.
6536 This is PT_TLS segment p_vaddr. */
6537
6538static bfd_vma
6539dtpoff_base (struct bfd_link_info *info)
6540{
6541 /* If tls_sec is NULL, we should have signalled an error already. */
6542 if (elf_hash_table (info)->tls_sec == NULL)
6543 return 0;
6544 return elf_hash_table (info)->tls_sec->vma;
6545}
6546
6547/* Return the relocation value for @tpoff relocation
6548 if STT_TLS virtual address is ADDRESS. */
6549
6550static bfd_vma
6551tpoff (struct bfd_link_info *info, bfd_vma address)
6552{
6553 struct elf_link_hash_table *htab = elf_hash_table (info);
6554 bfd_vma base;
6555
6556 /* If tls_sec is NULL, we should have signalled an error already. */
6557 if (htab->tls_sec == NULL)
6558 return 0;
6559 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6560 return address - htab->tls_sec->vma + base;
6561}
6562
00a97672
RS		 6563/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6564 VALUE is the relocation value. */
6565
6566static bfd_reloc_status_type
6567elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6568{
6569 if (value > 0xfff)
6570 return bfd_reloc_overflow;
6571
6572 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6573 bfd_put_32 (abfd, value, data);
6574 return bfd_reloc_ok;
6575}
6576
4962c51a
MS		 6577/* For a given value of n, calculate the value of G_n as required to
6578 deal with group relocations. We return it in the form of an
6579 encoded constant-and-rotation, together with the final residual. If n is
6580 specified as less than zero, then final_residual is filled with the
6581 input value and no further action is performed. */
6582
6583static bfd_vma
6584calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6585{
6586 int current_n;
6587 bfd_vma g_n;
6588 bfd_vma encoded_g_n = 0;
6589 bfd_vma residual = value; /* Also known as Y_n. */
6590
6591 for (current_n = 0; current_n <= n; current_n++)
6592 {
6593 int shift;
6594
6595 /* Calculate which part of the value to mask. */
6596 if (residual == 0)
6597 shift = 0;
6598 else
6599 {
6600 int msb;
6601
6602 /* Determine the most significant bit in the residual and
6603 align the resulting value to a 2-bit boundary. */
6604 for (msb = 30; msb >= 0; msb -= 2)
6605 if (residual & (3 << msb))
6606 break;
6607
6608 /* The desired shift is now (msb - 6), or zero, whichever
6609 is the greater. */
6610 shift = msb - 6;
6611 if (shift < 0)
6612 shift = 0;
6613 }
6614
6615 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6616 g_n = residual & (0xff << shift);
6617 encoded_g_n = (g_n >> shift)
6618 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6619
6620 /* Calculate the residual for the next time around. */
6621 residual &= ~g_n;
6622 }
6623
6624 *final_residual = residual;
6625
6626 return encoded_g_n;
6627}
6628
6629/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6630 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6631
4962c51a 6632static int
906e58ca 6633identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6634{
6635 int opcode = insn & 0x1e00000;
6636
6637 if (opcode == 1 << 23) /* ADD */
6638 return 1;
6639
6640 if (opcode == 1 << 22) /* SUB */
6641 return -1;
6642
6643 return 0;
6644}
6645
252b5132 6646/* Perform a relocation as part of a final link. */
9b485d32 6647
252b5132 6648static bfd_reloc_status_type
57e8b36a
NC		 6649elf32_arm_final_link_relocate (reloc_howto_type * howto,
6650 bfd * input_bfd,
6651 bfd * output_bfd,
6652 asection * input_section,
6653 bfd_byte * contents,
6654 Elf_Internal_Rela * rel,
6655 bfd_vma value,
6656 struct bfd_link_info * info,
6657 asection * sym_sec,
6658 const char * sym_name,
6659 int sym_flags,
0945cdfd 6660 struct elf_link_hash_entry * h,
f2a9dd69 6661 bfd_boolean * unresolved_reloc_p,
8029a119 6662 char ** error_message)
252b5132
RH		 6663{
6664 unsigned long r_type = howto->type;
6665 unsigned long r_symndx;
6666 bfd_byte * hit_data = contents + rel->r_offset;
6667 bfd * dynobj = NULL;
6668 Elf_Internal_Shdr * symtab_hdr;
6669 struct elf_link_hash_entry ** sym_hashes;
6670 bfd_vma * local_got_offsets;
6671 asection * sgot = NULL;
6672 asection * splt = NULL;
6673 asection * sreloc = NULL;
252b5132 6674 bfd_vma addend;
ba96a88f
NC		 6675 bfd_signed_vma signed_addend;
6676 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6677
9c504268
PB		 6678 globals = elf32_arm_hash_table (info);
6679
0ffa91dd
NC		 6680 BFD_ASSERT (is_arm_elf (input_bfd));
6681
6682 /* Some relocation types map to different relocations depending on the
9c504268 6683 target. We pick the right one here. */
eb043451
PB		 6684 r_type = arm_real_reloc_type (globals, r_type);
6685 if (r_type != howto->type)
6686 howto = elf32_arm_howto_from_type (r_type);
9c504268 6687
cac15327
NC		 6688 /* If the start address has been set, then set the EF_ARM_HASENTRY
6689 flag. Setting this more than once is redundant, but the cost is
6690 not too high, and it keeps the code simple.
99e4ae17 6691
cac15327
NC		 6692 The test is done here, rather than somewhere else, because the
6693 start address is only set just before the final link commences.
6694
6695 Note - if the user deliberately sets a start address of 0, the
6696 flag will not be set. */
6697 if (bfd_get_start_address (output_bfd) != 0)
6698 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6699
252b5132
RH		 6700 dynobj = elf_hash_table (info)->dynobj;
6701 if (dynobj)
6702 {
6703 sgot = bfd_get_section_by_name (dynobj, ".got");
6704 splt = bfd_get_section_by_name (dynobj, ".plt");
6705 }
0ffa91dd 6706 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6707 sym_hashes = elf_sym_hashes (input_bfd);
6708 local_got_offsets = elf_local_got_offsets (input_bfd);
6709 r_symndx = ELF32_R_SYM (rel->r_info);
6710
4e7fd91e 6711 if (globals->use_rel)
ba96a88f 6712 {
4e7fd91e
PB		 6713 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6714
6715 if (addend & ((howto->src_mask + 1) >> 1))
6716 {
6717 signed_addend = -1;
6718 signed_addend &= ~ howto->src_mask;
6719 signed_addend |= addend;
6720 }
6721 else
6722 signed_addend = addend;
ba96a88f
NC		 6723 }
6724 else
4e7fd91e 6725 addend = signed_addend = rel->r_addend;
f21f3fe0 6726
252b5132
RH		 6727 switch (r_type)
6728 {
6729 case R_ARM_NONE:
28a094c2
DJ		 6730 /* We don't need to find a value for this symbol. It's just a
6731 marker. */
6732 *unresolved_reloc_p = FALSE;
252b5132
RH		 6733 return bfd_reloc_ok;
6734
00a97672
RS		 6735 case R_ARM_ABS12:
6736 if (!globals->vxworks_p)
6737 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6738
252b5132
RH		 6739 case R_ARM_PC24:
6740 case R_ARM_ABS32:
bb224fc3 6741 case R_ARM_ABS32_NOI:
252b5132 6742 case R_ARM_REL32:
bb224fc3 6743 case R_ARM_REL32_NOI:
5b5bb741
PB		 6744 case R_ARM_CALL:
6745 case R_ARM_JUMP24:
dfc5f959 6746 case R_ARM_XPC25:
eb043451 6747 case R_ARM_PREL31:
7359ea65 6748 case R_ARM_PLT32:
7359ea65
DJ		 6749 /* Handle relocations which should use the PLT entry. ABS32/REL32
6750 will use the symbol's value, which may point to a PLT entry, but we
6751 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6752 branches in this object should go to it, except if the PLT is too
6753 far away, in which case a long branch stub should be inserted. */
bb224fc3 6754 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6755 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6756 && r_type != R_ARM_CALL
6757 && r_type != R_ARM_JUMP24
6758 && r_type != R_ARM_PLT32)
7359ea65 6759 && h != NULL
c84cd8ee 6760 && splt != NULL
7359ea65
DJ		 6761 && h->plt.offset != (bfd_vma) -1)
6762 {
c84cd8ee
DJ		 6763 /* If we've created a .plt section, and assigned a PLT entry to
6764 this function, it should not be known to bind locally. If
6765 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6766 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6767
6768 value = (splt->output_section->vma
6769 + splt->output_offset
6770 + h->plt.offset);
0945cdfd 6771 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6772 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6773 contents, rel->r_offset, value,
00a97672 6774 rel->r_addend);
7359ea65
DJ		 6775 }
6776
67687978
PB		 6777 /* When generating a shared object or relocatable executable, these
6778 relocations are copied into the output file to be resolved at
6779 run time. */
6780 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6781 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6782 && !(elf32_arm_hash_table (info)->vxworks_p
6783 && strcmp (input_section->output_section->name,
6784 ".tls_vars") == 0)
bb224fc3 6785 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6786 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6787 && (h == NULL
6788 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6789 || h->root.type != bfd_link_hash_undefweak)
6790 && r_type != R_ARM_PC24
5b5bb741
PB		 6791 && r_type != R_ARM_CALL
6792 && r_type != R_ARM_JUMP24
ee06dc07 6793 && r_type != R_ARM_PREL31
7359ea65 6794 && r_type != R_ARM_PLT32)
252b5132 6795 {
947216bf
AM		 6796 Elf_Internal_Rela outrel;
6797 bfd_byte *loc;
b34976b6 6798 bfd_boolean skip, relocate;
f21f3fe0 6799
0945cdfd
DJ		 6800 *unresolved_reloc_p = FALSE;
6801
252b5132
RH		 6802 if (sreloc == NULL)
6803 {
83bac4b0
NC		 6804 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6805 ! globals->use_rel);
f21f3fe0 6806
83bac4b0 6807 if (sreloc == NULL)
252b5132 6808 return bfd_reloc_notsupported;
252b5132 6809 }
f21f3fe0 6810
b34976b6
AM		 6811 skip = FALSE;
6812 relocate = FALSE;
f21f3fe0 6813
00a97672 6814 outrel.r_addend = addend;
c629eae0
JJ		 6815 outrel.r_offset =
6816 _bfd_elf_section_offset (output_bfd, info, input_section,
6817 rel->r_offset);
6818 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6819 skip = TRUE;
0bb2d96a 6820 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6821 skip = TRUE, relocate = TRUE;
252b5132
RH		 6822 outrel.r_offset += (input_section->output_section->vma
6823 + input_section->output_offset);
f21f3fe0 6824
252b5132 6825 if (skip)
0bb2d96a 6826 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6827 else if (h != NULL
6828 && h->dynindx != -1
7359ea65 6829 && (!info->shared
5e681ec4 6830 || !info->symbolic
f5385ebf 6831 || !h->def_regular))
5e681ec4 6832 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6833 else
6834 {
a16385dc
MM		 6835 int symbol;
6836
5e681ec4 6837 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6838 if (sym_flags == STT_ARM_TFUNC)
6839 value |= 1;
a16385dc 6840 if (globals->symbian_p)
6366ff1e 6841 {
74541ad4
AM		 6842 asection *osec;
6843
6366ff1e
MM		 6844 /* On Symbian OS, the data segment and text segement
6845 can be relocated independently. Therefore, we
6846 must indicate the segment to which this
6847 relocation is relative. The BPABI allows us to
6848 use any symbol in the right segment; we just use
6849 the section symbol as it is convenient. (We
6850 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6851 will not appear in the dynamic symbol table.)
6852
6853 Note that the dynamic linker ignores the section
6854 symbol value, so we don't subtract osec->vma
6855 from the emitted reloc addend. */
10dbd1f3 6856 if (sym_sec)
74541ad4 6857 osec = sym_sec->output_section;
10dbd1f3 6858 else
74541ad4
AM		 6859 osec = input_section->output_section;
6860 symbol = elf_section_data (osec)->dynindx;
6861 if (symbol == 0)
6862 {
6863 struct elf_link_hash_table *htab = elf_hash_table (info);
6864
6865 if ((osec->flags & SEC_READONLY) == 0
6866 && htab->data_index_section != NULL)
6867 osec = htab->data_index_section;
6868 else
6869 osec = htab->text_index_section;
6870 symbol = elf_section_data (osec)->dynindx;
6871 }
6366ff1e
MM		 6872 BFD_ASSERT (symbol != 0);
6873 }
a16385dc
MM		 6874 else
6875 /* On SVR4-ish systems, the dynamic loader cannot
6876 relocate the text and data segments independently,
6877 so the symbol does not matter. */
6878 symbol = 0;
6879 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6880 if (globals->use_rel)
6881 relocate = TRUE;
6882 else
6883 outrel.r_addend += value;
252b5132 6884 }
f21f3fe0 6885
947216bf 6886 loc = sreloc->contents;
00a97672
RS		 6887 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6888 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6889
f21f3fe0 6890 /* If this reloc is against an external symbol, we do not want to
252b5132 6891 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6892 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6893 if (! relocate)
6894 return bfd_reloc_ok;
9a5aca8c 6895
f21f3fe0 6896 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6897 contents, rel->r_offset, value,
6898 (bfd_vma) 0);
6899 }
6900 else switch (r_type)
6901 {
00a97672
RS		 6902 case R_ARM_ABS12:
6903 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6904
dfc5f959 6905 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6906 case R_ARM_CALL:
6907 case R_ARM_JUMP24:
8029a119 6908 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6909 case R_ARM_PLT32:
906e58ca
NC		 6910 {
6911 bfd_vma from;
6912 bfd_signed_vma branch_offset;
6913 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6914
dfc5f959 6915 if (r_type == R_ARM_XPC25)
252b5132 6916 {
dfc5f959
NC		 6917 /* Check for Arm calling Arm function. */
6918 /* FIXME: Should we translate the instruction into a BL
6919 instruction instead ? */
6920 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6921 (*_bfd_error_handler)
6922 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
6923 input_bfd,
6924 h ? h->root.root.string : "(local)");
dfc5f959 6925 }
155d87d7 6926 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 6927 {
6928 /* Check for Arm calling Thumb function. */
6929 if (sym_flags == STT_ARM_TFUNC)
6930 {
f2a9dd69
DJ		 6931 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
6932 output_bfd, input_section,
6933 hit_data, sym_sec, rel->r_offset,
6934 signed_addend, value,
6935 error_message))
6936 return bfd_reloc_ok;
6937 else
6938 return bfd_reloc_dangerous;
dfc5f959 6939 }
252b5132 6940 }
ba96a88f 6941
906e58ca 6942 /* Check if a stub has to be inserted because the
8029a119 6943 destination is too far or we are changing mode. */
155d87d7
CL		 6944 if ( r_type == R_ARM_CALL
6945 || r_type == R_ARM_JUMP24
6946 || r_type == R_ARM_PLT32)
906e58ca 6947 {
5fa9e92f
CL		 6948 /* If the call goes through a PLT entry, make sure to
6949 check distance to the right destination address. */
6950 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6951 {
6952 value = (splt->output_section->vma
6953 + splt->output_offset
6954 + h->plt.offset);
6955 *unresolved_reloc_p = FALSE;
6956 }
6957
6958 from = (input_section->output_section->vma
6959 + input_section->output_offset
6960 + rel->r_offset);
6961 branch_offset = (bfd_signed_vma)(value - from);
6962
906e58ca
NC		 6963 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
6964 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 6965 || ((sym_flags == STT_ARM_TFUNC)
6966 && (((r_type == R_ARM_CALL) && !globals->use_blx)
6967 || (r_type == R_ARM_JUMP24)
6968 || (r_type == R_ARM_PLT32) ))
6969 )
906e58ca
NC		 6970 {
6971 /* The target is out of reach, so redirect the
6972 branch to the local stub for this function. */
6973
6974 stub_entry = elf32_arm_get_stub_entry (input_section,
6975 sym_sec, h,
6976 rel, globals);
6977 if (stub_entry != NULL)
6978 value = (stub_entry->stub_offset
6979 + stub_entry->stub_sec->output_offset
6980 + stub_entry->stub_sec->output_section->vma);
6981 }
6982 }
6983
dea514f5
PB		 6984 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6985 where:
6986 S is the address of the symbol in the relocation.
6987 P is address of the instruction being relocated.
6988 A is the addend (extracted from the instruction) in bytes.
6989
6990 S is held in 'value'.
6991 P is the base address of the section containing the
6992 instruction plus the offset of the reloc into that
6993 section, ie:
6994 (input_section->output_section->vma +
6995 input_section->output_offset +
6996 rel->r_offset).
6997 A is the addend, converted into bytes, ie:
6998 (signed_addend * 4)
6999
7000 Note: None of these operations have knowledge of the pipeline
7001 size of the processor, thus it is up to the assembler to
7002 encode this information into the addend. */
7003 value -= (input_section->output_section->vma
7004 + input_section->output_offset);
7005 value -= rel->r_offset;
4e7fd91e
PB		 7006 if (globals->use_rel)
7007 value += (signed_addend << howto->size);
7008 else
7009 /* RELA addends do not have to be adjusted by howto->size. */
7010 value += signed_addend;
23080146 7011
dcb5e6e6
NC		 7012 signed_addend = value;
7013 signed_addend >>= howto->rightshift;
9a5aca8c 7014
5ab79981 7015 /* A branch to an undefined weak symbol is turned into a jump to
82b5c97a
CL		 7016 the next instruction unless a PLT entry will be created. */
7017 if (h && h->root.type == bfd_link_hash_undefweak
7018 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7019 {
7020 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
7021 | 0x0affffff;
7022 }
7023 else
59f2c4e7 7024 {
9b485d32 7025 /* Perform a signed range check. */
dcb5e6e6 7026 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7027 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7028 return bfd_reloc_overflow;
9a5aca8c 7029
5ab79981 7030 addend = (value & 2);
39b41c9c 7031
5ab79981
PB		 7032 value = (signed_addend & howto->dst_mask)
7033 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7034
5ab79981
PB		 7035 if (r_type == R_ARM_CALL)
7036 {
155d87d7
CL		 7037 /* Set the H bit in the BLX instruction. */
7038 if (sym_flags == STT_ARM_TFUNC)
7039 {
7040 if (addend)
7041 value |= (1 << 24);
7042 else
7043 value &= ~(bfd_vma)(1 << 24);
7044 }
7045
5ab79981 7046 /* Select the correct instruction (BL or BLX). */
906e58ca 7047 /* Only if we are not handling a BL to a stub. In this
8029a119 7048 case, mode switching is performed by the stub. */
906e58ca 7049 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7050 value |= (1 << 28);
7051 else
7052 {
7053 value &= ~(bfd_vma)(1 << 28);
7054 value |= (1 << 24);
7055 }
39b41c9c
PB		 7056 }
7057 }
906e58ca 7058 }
252b5132 7059 break;
f21f3fe0 7060
252b5132
RH		 7061 case R_ARM_ABS32:
7062 value += addend;
7063 if (sym_flags == STT_ARM_TFUNC)
7064 value |= 1;
7065 break;
f21f3fe0 7066
bb224fc3
MS		 7067 case R_ARM_ABS32_NOI:
7068 value += addend;
7069 break;
7070
252b5132 7071 case R_ARM_REL32:
a8bc6c78
PB		 7072 value += addend;
7073 if (sym_flags == STT_ARM_TFUNC)
7074 value |= 1;
252b5132 7075 value -= (input_section->output_section->vma
62efb346 7076 + input_section->output_offset + rel->r_offset);
252b5132 7077 break;
eb043451 7078
bb224fc3
MS		 7079 case R_ARM_REL32_NOI:
7080 value += addend;
7081 value -= (input_section->output_section->vma
7082 + input_section->output_offset + rel->r_offset);
7083 break;
7084
eb043451
PB		 7085 case R_ARM_PREL31:
7086 value -= (input_section->output_section->vma
7087 + input_section->output_offset + rel->r_offset);
7088 value += signed_addend;
7089 if (! h || h->root.type != bfd_link_hash_undefweak)
7090 {
8029a119 7091 /* Check for overflow. */
eb043451
PB		 7092 if ((value ^ (value >> 1)) & (1 << 30))
7093 return bfd_reloc_overflow;
7094 }
7095 value &= 0x7fffffff;
7096 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7097 if (sym_flags == STT_ARM_TFUNC)
7098 value |= 1;
7099 break;
252b5132 7100 }
f21f3fe0 7101
252b5132
RH		 7102 bfd_put_32 (input_bfd, value, hit_data);
7103 return bfd_reloc_ok;
7104
7105 case R_ARM_ABS8:
7106 value += addend;
7107 if ((long) value > 0x7f || (long) value < -0x80)
7108 return bfd_reloc_overflow;
7109
7110 bfd_put_8 (input_bfd, value, hit_data);
7111 return bfd_reloc_ok;
7112
7113 case R_ARM_ABS16:
7114 value += addend;
7115
7116 if ((long) value > 0x7fff || (long) value < -0x8000)
7117 return bfd_reloc_overflow;
7118
7119 bfd_put_16 (input_bfd, value, hit_data);
7120 return bfd_reloc_ok;
7121
252b5132 7122 case R_ARM_THM_ABS5:
9b485d32 7123 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7124 if (globals->use_rel)
7125 {
7126 /* Need to refetch addend. */
7127 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7128 /* ??? Need to determine shift amount from operand size. */
7129 addend >>= howto->rightshift;
7130 }
252b5132
RH		 7131 value += addend;
7132
7133 /* ??? Isn't value unsigned? */
7134 if ((long) value > 0x1f || (long) value < -0x10)
7135 return bfd_reloc_overflow;
7136
7137 /* ??? Value needs to be properly shifted into place first. */
7138 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7139 bfd_put_16 (input_bfd, value, hit_data);
7140 return bfd_reloc_ok;
7141
2cab6cc3
MS		 7142 case R_ARM_THM_ALU_PREL_11_0:
7143 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7144 {
7145 bfd_vma insn;
7146 bfd_signed_vma relocation;
7147
7148 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7149 | bfd_get_16 (input_bfd, hit_data + 2);
7150
7151 if (globals->use_rel)
7152 {
7153 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7154 | ((insn & (1 << 26)) >> 15);
7155 if (insn & 0xf00000)
7156 signed_addend = -signed_addend;
7157 }
7158
7159 relocation = value + signed_addend;
7160 relocation -= (input_section->output_section->vma
7161 + input_section->output_offset
7162 + rel->r_offset);
7163
7164 value = abs (relocation);
7165
7166 if (value >= 0x1000)
7167 return bfd_reloc_overflow;
7168
7169 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7170 | ((value & 0x700) << 4)
7171 | ((value & 0x800) << 15);
7172 if (relocation < 0)
7173 insn |= 0xa00000;
7174
7175 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7176 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7177
7178 return bfd_reloc_ok;
7179 }
7180
e1ec24c6
NC		 7181 case R_ARM_THM_PC8:
7182 /* PR 10073: This reloc is not generated by the GNU toolchain,
7183 but it is supported for compatibility with third party libraries
7184 generated by other compilers, specifically the ARM/IAR. */
7185 {
7186 bfd_vma insn;
7187 bfd_signed_vma relocation;
7188
7189 insn = bfd_get_16 (input_bfd, hit_data);
7190
7191 if (globals->use_rel)
7192 addend = (insn & 0x00ff) << 2;
7193
7194 relocation = value + addend;
7195 relocation -= (input_section->output_section->vma
7196 + input_section->output_offset
7197 + rel->r_offset);
7198
7199 value = abs (relocation);
7200
7201 /* We do not check for overflow of this reloc. Although strictly
7202 speaking this is incorrect, it appears to be necessary in order
7203 to work with IAR generated relocs. Since GCC and GAS do not
7204 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7205 a problem for them. */
7206 value &= 0x3fc;
7207
7208 insn = (insn & 0xff00) | (value >> 2);
7209
7210 bfd_put_16 (input_bfd, insn, hit_data);
7211
7212 return bfd_reloc_ok;
7213 }
7214
2cab6cc3
MS		 7215 case R_ARM_THM_PC12:
7216 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7217 {
7218 bfd_vma insn;
7219 bfd_signed_vma relocation;
7220
7221 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7222 | bfd_get_16 (input_bfd, hit_data + 2);
7223
7224 if (globals->use_rel)
7225 {
7226 signed_addend = insn & 0xfff;
7227 if (!(insn & (1 << 23)))
7228 signed_addend = -signed_addend;
7229 }
7230
7231 relocation = value + signed_addend;
7232 relocation -= (input_section->output_section->vma
7233 + input_section->output_offset
7234 + rel->r_offset);
7235
7236 value = abs (relocation);
7237
7238 if (value >= 0x1000)
7239 return bfd_reloc_overflow;
7240
7241 insn = (insn & 0xff7ff000) | value;
7242 if (relocation >= 0)
7243 insn |= (1 << 23);
7244
7245 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7246 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7247
7248 return bfd_reloc_ok;
7249 }
7250
dfc5f959 7251 case R_ARM_THM_XPC22:
c19d1205 7252 case R_ARM_THM_CALL:
bd97cb95 7253 case R_ARM_THM_JUMP24:
dfc5f959 7254 /* Thumb BL (branch long instruction). */
252b5132 7255 {
b34976b6 7256 bfd_vma relocation;
e95de063 7257 bfd_vma reloc_sign;
b34976b6
AM		 7258 bfd_boolean overflow = FALSE;
7259 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7260 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7261 bfd_signed_vma reloc_signed_max;
7262 bfd_signed_vma reloc_signed_min;
b34976b6 7263 bfd_vma check;
252b5132 7264 bfd_signed_vma signed_check;
e95de063
MS		 7265 int bitsize;
7266 int thumb2 = using_thumb2 (globals);
252b5132 7267
5ab79981 7268 /* A branch to an undefined weak symbol is turned into a jump to
19540007
JM		 7269 the next instruction unless a PLT entry will be created. */
7270 if (h && h->root.type == bfd_link_hash_undefweak
7271 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7272 {
7273 bfd_put_16 (input_bfd, 0xe000, hit_data);
7274 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7275 return bfd_reloc_ok;
7276 }
7277
e95de063
MS		 7278 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7279 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7280 if (globals->use_rel)
7281 {
e95de063
MS		 7282 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7283 bfd_vma upper = upper_insn & 0x3ff;
7284 bfd_vma lower = lower_insn & 0x7ff;
7285 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7286 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7287 bfd_vma i1 = j1 ^ s ? 0 : 1;
7288 bfd_vma i2 = j2 ^ s ? 0 : 1;
7289
7290 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7291 /* Sign extend. */
7292 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7293
4e7fd91e
PB		 7294 signed_addend = addend;
7295 }
cb1afa5c 7296
dfc5f959
NC		 7297 if (r_type == R_ARM_THM_XPC22)
7298 {
7299 /* Check for Thumb to Thumb call. */
7300 /* FIXME: Should we translate the instruction into a BL
7301 instruction instead ? */
7302 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7303 (*_bfd_error_handler)
7304 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7305 input_bfd,
7306 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7307 }
7308 else
252b5132 7309 {
dfc5f959
NC		 7310 /* If it is not a call to Thumb, assume call to Arm.
7311 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7312 function call at all, but rather a long jump. Calls through
7313 the PLT do not require stubs. */
7314 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7315 && (h == NULL || splt == NULL
7316 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7317 {
bd97cb95 7318 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7319 {
7320 /* Convert BL to BLX. */
7321 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7322 }
155d87d7
CL		 7323 else if (( r_type != R_ARM_THM_CALL)
7324 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7325 {
7326 if (elf32_thumb_to_arm_stub
7327 (info, sym_name, input_bfd, output_bfd, input_section,
7328 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7329 error_message))
7330 return bfd_reloc_ok;
7331 else
7332 return bfd_reloc_dangerous;
7333 }
da5938a2 7334 }
bd97cb95
DJ		 7335 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7336 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7337 {
7338 /* Make sure this is a BL. */
7339 lower_insn |= 0x1800;
7340 }
252b5132 7341 }
f21f3fe0 7342
b7693d02
DJ		 7343 /* Handle calls via the PLT. */
7344 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7345 {
7346 value = (splt->output_section->vma
7347 + splt->output_offset
7348 + h->plt.offset);
bd97cb95 7349 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7350 {
7351 /* If the Thumb BLX instruction is available, convert the
7352 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7353 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 7354 }
7355 else
7356 /* Target the Thumb stub before the ARM PLT entry. */
7357 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 7358 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7359 }
7360
155d87d7 7361 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7362 {
7363 /* Check if a stub has to be inserted because the destination
8029a119 7364 is too far. */
906e58ca
NC		 7365 bfd_vma from;
7366 bfd_signed_vma branch_offset;
7367 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7368
7369 from = (input_section->output_section->vma
7370 + input_section->output_offset
7371 + rel->r_offset);
7372 branch_offset = (bfd_signed_vma)(value - from);
7373
7374 if ((!thumb2
7375 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7376 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7377 ||
7378 (thumb2
7379 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7380 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7381 || ((sym_flags != STT_ARM_TFUNC)
7382 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7383 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7384 {
7385 /* The target is out of reach or we are changing modes, so
7386 redirect the branch to the local stub for this
7387 function. */
7388 stub_entry = elf32_arm_get_stub_entry (input_section,
7389 sym_sec, h,
7390 rel, globals);
7391 if (stub_entry != NULL)
7392 value = (stub_entry->stub_offset
7393 + stub_entry->stub_sec->output_offset
7394 + stub_entry->stub_sec->output_section->vma);
7395
f4ac8484 7396 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7397 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7398 {
7399 if ((stub_entry
7400 && !arm_stub_is_thumb (stub_entry->stub_type))
7401 || (sym_flags != STT_ARM_TFUNC))
7402 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7403 }
906e58ca
NC		 7404 }
7405 }
7406
ba96a88f 7407 relocation = value + signed_addend;
f21f3fe0 7408
252b5132 7409 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7410 + input_section->output_offset
7411 + rel->r_offset);
9a5aca8c 7412
252b5132
RH		 7413 check = relocation >> howto->rightshift;
7414
7415 /* If this is a signed value, the rightshift just dropped
7416 leading 1 bits (assuming twos complement). */
7417 if ((bfd_signed_vma) relocation >= 0)
7418 signed_check = check;
7419 else
7420 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7421
e95de063
MS		 7422 /* Calculate the permissable maximum and minimum values for
7423 this relocation according to whether we're relocating for
7424 Thumb-2 or not. */
7425 bitsize = howto->bitsize;
7426 if (!thumb2)
7427 bitsize -= 2;
7428 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7429 reloc_signed_min = ~reloc_signed_max;
7430
252b5132 7431 /* Assumes two's complement. */
ba96a88f 7432 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7433 overflow = TRUE;
252b5132 7434
bd97cb95 7435 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7436 /* For a BLX instruction, make sure that the relocation is rounded up
7437 to a word boundary. This follows the semantics of the instruction
7438 which specifies that bit 1 of the target address will come from bit
7439 1 of the base address. */
7440 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7441
e95de063
MS		 7442 /* Put RELOCATION back into the insn. Assumes two's complement.
7443 We use the Thumb-2 encoding, which is safe even if dealing with
7444 a Thumb-1 instruction by virtue of our overflow check above. */
7445 reloc_sign = (signed_check < 0) ? 1 : 0;
7446 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7447 | ((relocation >> 12) & 0x3ff)
7448 | (reloc_sign << 10);
906e58ca 7449 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7450 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7451 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7452 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7453
252b5132
RH		 7454 /* Put the relocated value back in the object file: */
7455 bfd_put_16 (input_bfd, upper_insn, hit_data);
7456 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7457
7458 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7459 }
7460 break;
7461
c19d1205
ZW		 7462 case R_ARM_THM_JUMP19:
7463 /* Thumb32 conditional branch instruction. */
7464 {
7465 bfd_vma relocation;
7466 bfd_boolean overflow = FALSE;
7467 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7468 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7469 bfd_signed_vma reloc_signed_max = 0xffffe;
7470 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7471 bfd_signed_vma signed_check;
7472
7473 /* Need to refetch the addend, reconstruct the top three bits,
7474 and squish the two 11 bit pieces together. */
7475 if (globals->use_rel)
7476 {
7477 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7478 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7479 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7480 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7481 bfd_vma lower = (lower_insn & 0x07ff);
7482
a00a1f35
MS		 7483 upper |= J1 << 6;
7484 upper |= J2 << 7;
7485 upper |= (!S) << 8;
c19d1205
ZW		 7486 upper -= 0x0100; /* Sign extend. */
7487
7488 addend = (upper << 12) | (lower << 1);
7489 signed_addend = addend;
7490 }
7491
bd97cb95
DJ		 7492 /* Handle calls via the PLT. */
7493 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7494 {
7495 value = (splt->output_section->vma
7496 + splt->output_offset
7497 + h->plt.offset);
7498 /* Target the Thumb stub before the ARM PLT entry. */
7499 value -= PLT_THUMB_STUB_SIZE;
7500 *unresolved_reloc_p = FALSE;
7501 }
7502
c19d1205
ZW		 7503 /* ??? Should handle interworking? GCC might someday try to
7504 use this for tail calls. */
7505
7506 relocation = value + signed_addend;
7507 relocation -= (input_section->output_section->vma
7508 + input_section->output_offset
7509 + rel->r_offset);
a00a1f35 7510 signed_check = (bfd_signed_vma) relocation;
c19d1205 7511
c19d1205
ZW		 7512 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7513 overflow = TRUE;
7514
7515 /* Put RELOCATION back into the insn. */
7516 {
7517 bfd_vma S = (relocation & 0x00100000) >> 20;
7518 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7519 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7520 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7521 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7522
a00a1f35 7523 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7524 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7525 }
7526
7527 /* Put the relocated value back in the object file: */
7528 bfd_put_16 (input_bfd, upper_insn, hit_data);
7529 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7530
7531 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7532 }
7533
7534 case R_ARM_THM_JUMP11:
7535 case R_ARM_THM_JUMP8:
7536 case R_ARM_THM_JUMP6:
51c5503b
NC		 7537 /* Thumb B (branch) instruction). */
7538 {
6cf9e9fe 7539 bfd_signed_vma relocation;
51c5503b
NC		 7540 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7541 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7542 bfd_signed_vma signed_check;
7543
c19d1205
ZW		 7544 /* CZB cannot jump backward. */
7545 if (r_type == R_ARM_THM_JUMP6)
7546 reloc_signed_min = 0;
7547
4e7fd91e 7548 if (globals->use_rel)
6cf9e9fe 7549 {
4e7fd91e
PB		 7550 /* Need to refetch addend. */
7551 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7552 if (addend & ((howto->src_mask + 1) >> 1))
7553 {
7554 signed_addend = -1;
7555 signed_addend &= ~ howto->src_mask;
7556 signed_addend |= addend;
7557 }
7558 else
7559 signed_addend = addend;
7560 /* The value in the insn has been right shifted. We need to
7561 undo this, so that we can perform the address calculation
7562 in terms of bytes. */
7563 signed_addend <<= howto->rightshift;
6cf9e9fe 7564 }
6cf9e9fe 7565 relocation = value + signed_addend;
51c5503b
NC		 7566
7567 relocation -= (input_section->output_section->vma
7568 + input_section->output_offset
7569 + rel->r_offset);
7570
6cf9e9fe
NC		 7571 relocation >>= howto->rightshift;
7572 signed_check = relocation;
c19d1205
ZW		 7573
7574 if (r_type == R_ARM_THM_JUMP6)
7575 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7576 else
7577 relocation &= howto->dst_mask;
51c5503b 7578 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7579
51c5503b
NC		 7580 bfd_put_16 (input_bfd, relocation, hit_data);
7581
7582 /* Assumes two's complement. */
7583 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7584 return bfd_reloc_overflow;
7585
7586 return bfd_reloc_ok;
7587 }
cedb70c5 7588
8375c36b
PB		 7589 case R_ARM_ALU_PCREL7_0:
7590 case R_ARM_ALU_PCREL15_8:
7591 case R_ARM_ALU_PCREL23_15:
7592 {
7593 bfd_vma insn;
7594 bfd_vma relocation;
7595
7596 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7597 if (globals->use_rel)
7598 {
7599 /* Extract the addend. */
7600 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7601 signed_addend = addend;
7602 }
8375c36b
PB		 7603 relocation = value + signed_addend;
7604
7605 relocation -= (input_section->output_section->vma
7606 + input_section->output_offset
7607 + rel->r_offset);
7608 insn = (insn & ~0xfff)
7609 | ((howto->bitpos << 7) & 0xf00)
7610 | ((relocation >> howto->bitpos) & 0xff);
7611 bfd_put_32 (input_bfd, value, hit_data);
7612 }
7613 return bfd_reloc_ok;
7614
252b5132
RH		 7615 case R_ARM_GNU_VTINHERIT:
7616 case R_ARM_GNU_VTENTRY:
7617 return bfd_reloc_ok;
7618
c19d1205 7619 case R_ARM_GOTOFF32:
252b5132
RH		 7620 /* Relocation is relative to the start of the
7621 global offset table. */
7622
7623 BFD_ASSERT (sgot != NULL);
7624 if (sgot == NULL)
7625 return bfd_reloc_notsupported;
9a5aca8c 7626
cedb70c5 7627 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7628 address by one, so that attempts to call the function pointer will
7629 correctly interpret it as Thumb code. */
7630 if (sym_flags == STT_ARM_TFUNC)
7631 value += 1;
7632
252b5132
RH		 7633 /* Note that sgot->output_offset is not involved in this
7634 calculation. We always want the start of .got. If we
7635 define _GLOBAL_OFFSET_TABLE in a different way, as is
7636 permitted by the ABI, we might have to change this
9b485d32 7637 calculation. */
252b5132 7638 value -= sgot->output_section->vma;
f21f3fe0 7639 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7640 contents, rel->r_offset, value,
00a97672 7641 rel->r_addend);
252b5132
RH		 7642
7643 case R_ARM_GOTPC:
a7c10850 7644 /* Use global offset table as symbol value. */
252b5132 7645 BFD_ASSERT (sgot != NULL);
f21f3fe0 7646
252b5132
RH		 7647 if (sgot == NULL)
7648 return bfd_reloc_notsupported;
7649
0945cdfd 7650 *unresolved_reloc_p = FALSE;
252b5132 7651 value = sgot->output_section->vma;
f21f3fe0 7652 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7653 contents, rel->r_offset, value,
00a97672 7654 rel->r_addend);
f21f3fe0 7655
252b5132 7656 case R_ARM_GOT32:
eb043451 7657 case R_ARM_GOT_PREL:
252b5132 7658 /* Relocation is to the entry for this symbol in the
9b485d32 7659 global offset table. */
252b5132
RH		 7660 if (sgot == NULL)
7661 return bfd_reloc_notsupported;
f21f3fe0 7662
252b5132
RH		 7663 if (h != NULL)
7664 {
7665 bfd_vma off;
5e681ec4 7666 bfd_boolean dyn;
f21f3fe0 7667
252b5132
RH		 7668 off = h->got.offset;
7669 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7670 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7671
5e681ec4 7672 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7673 || (info->shared
5e681ec4
PB		 7674 && SYMBOL_REFERENCES_LOCAL (info, h))
7675 || (ELF_ST_VISIBILITY (h->other)
7676 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7677 {
7678 /* This is actually a static link, or it is a -Bsymbolic link
7679 and the symbol is defined locally. We must initialize this
7680 entry in the global offset table. Since the offset must
7681 always be a multiple of 4, we use the least significant bit
7682 to record whether we have initialized it already.
f21f3fe0 7683
00a97672 7684 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7685 entry to initialize the value. This is done in the
9b485d32 7686 finish_dynamic_symbol routine. */
252b5132
RH		 7687 if ((off & 1) != 0)
7688 off &= ~1;
7689 else
7690 {
ee29b9fb
RE		 7691 /* If we are addressing a Thumb function, we need to
7692 adjust the address by one, so that attempts to
7693 call the function pointer will correctly
7694 interpret it as Thumb code. */
7695 if (sym_flags == STT_ARM_TFUNC)
7696 value |= 1;
7697
252b5132
RH		 7698 bfd_put_32 (output_bfd, value, sgot->contents + off);
7699 h->got.offset |= 1;
7700 }
7701 }
0945cdfd
DJ		 7702 else
7703 *unresolved_reloc_p = FALSE;
f21f3fe0 7704
252b5132
RH		 7705 value = sgot->output_offset + off;
7706 }
7707 else
7708 {
7709 bfd_vma off;
f21f3fe0 7710
252b5132
RH		 7711 BFD_ASSERT (local_got_offsets != NULL &&
7712 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7713
252b5132 7714 off = local_got_offsets[r_symndx];
f21f3fe0 7715
252b5132
RH		 7716 /* The offset must always be a multiple of 4. We use the
7717 least significant bit to record whether we have already
9b485d32 7718 generated the necessary reloc. */
252b5132
RH		 7719 if ((off & 1) != 0)
7720 off &= ~1;
7721 else
7722 {
b7693d02
DJ		 7723 /* If we are addressing a Thumb function, we need to
7724 adjust the address by one, so that attempts to
7725 call the function pointer will correctly
7726 interpret it as Thumb code. */
7727 if (sym_flags == STT_ARM_TFUNC)
7728 value |= 1;
7729
00a97672
RS		 7730 if (globals->use_rel)
7731 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7732
252b5132
RH		 7733 if (info->shared)
7734 {
7735 asection * srelgot;
947216bf
AM		 7736 Elf_Internal_Rela outrel;
7737 bfd_byte *loc;
f21f3fe0 7738
00a97672
RS		 7739 srelgot = (bfd_get_section_by_name
7740 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7741 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7742
00a97672 7743 outrel.r_addend = addend + value;
252b5132 7744 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7745 + sgot->output_offset
252b5132
RH		 7746 + off);
7747 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7748 loc = srelgot->contents;
00a97672
RS		 7749 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7750 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7751 }
f21f3fe0 7752
252b5132
RH		 7753 local_got_offsets[r_symndx] |= 1;
7754 }
f21f3fe0 7755
252b5132
RH		 7756 value = sgot->output_offset + off;
7757 }
eb043451
PB		 7758 if (r_type != R_ARM_GOT32)
7759 value += sgot->output_section->vma;
9a5aca8c 7760
f21f3fe0 7761 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7762 contents, rel->r_offset, value,
00a97672 7763 rel->r_addend);
f21f3fe0 7764
ba93b8ac
DJ		 7765 case R_ARM_TLS_LDO32:
7766 value = value - dtpoff_base (info);
7767
7768 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7769 contents, rel->r_offset, value,
7770 rel->r_addend);
ba93b8ac
DJ		 7771
7772 case R_ARM_TLS_LDM32:
7773 {
7774 bfd_vma off;
7775
7776 if (globals->sgot == NULL)
7777 abort ();
7778
7779 off = globals->tls_ldm_got.offset;
7780
7781 if ((off & 1) != 0)
7782 off &= ~1;
7783 else
7784 {
7785 /* If we don't know the module number, create a relocation
7786 for it. */
7787 if (info->shared)
7788 {
7789 Elf_Internal_Rela outrel;
7790 bfd_byte *loc;
7791
7792 if (globals->srelgot == NULL)
7793 abort ();
7794
00a97672 7795 outrel.r_addend = 0;
ba93b8ac
DJ		 7796 outrel.r_offset = (globals->sgot->output_section->vma
7797 + globals->sgot->output_offset + off);
7798 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7799
00a97672
RS		 7800 if (globals->use_rel)
7801 bfd_put_32 (output_bfd, outrel.r_addend,
7802 globals->sgot->contents + off);
ba93b8ac
DJ		 7803
7804 loc = globals->srelgot->contents;
00a97672
RS		 7805 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7806 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7807 }
7808 else
7809 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7810
7811 globals->tls_ldm_got.offset |= 1;
7812 }
7813
906e58ca 7814 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7815 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7816
7817 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7818 contents, rel->r_offset, value,
00a97672 7819 rel->r_addend);
ba93b8ac
DJ		 7820 }
7821
7822 case R_ARM_TLS_GD32:
7823 case R_ARM_TLS_IE32:
7824 {
7825 bfd_vma off;
7826 int indx;
7827 char tls_type;
7828
7829 if (globals->sgot == NULL)
7830 abort ();
7831
7832 indx = 0;
7833 if (h != NULL)
7834 {
7835 bfd_boolean dyn;
7836 dyn = globals->root.dynamic_sections_created;
7837 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7838 && (!info->shared
7839 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7840 {
7841 *unresolved_reloc_p = FALSE;
7842 indx = h->dynindx;
7843 }
7844 off = h->got.offset;
7845 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7846 }
7847 else
7848 {
7849 if (local_got_offsets == NULL)
7850 abort ();
7851 off = local_got_offsets[r_symndx];
7852 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7853 }
7854
7855 if (tls_type == GOT_UNKNOWN)
7856 abort ();
7857
7858 if ((off & 1) != 0)
7859 off &= ~1;
7860 else
7861 {
7862 bfd_boolean need_relocs = FALSE;
7863 Elf_Internal_Rela outrel;
7864 bfd_byte *loc = NULL;
7865 int cur_off = off;
7866
7867 /* The GOT entries have not been initialized yet. Do it
7868 now, and emit any relocations. If both an IE GOT and a
7869 GD GOT are necessary, we emit the GD first. */
7870
7871 if ((info->shared || indx != 0)
7872 && (h == NULL
7873 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7874 || h->root.type != bfd_link_hash_undefweak))
7875 {
7876 need_relocs = TRUE;
7877 if (globals->srelgot == NULL)
7878 abort ();
7879 loc = globals->srelgot->contents;
00a97672 7880 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7881 }
7882
7883 if (tls_type & GOT_TLS_GD)
7884 {
7885 if (need_relocs)
7886 {
00a97672 7887 outrel.r_addend = 0;
ba93b8ac 7888 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7889 + globals->sgot->output_offset
7890 + cur_off);
ba93b8ac 7891 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7892
00a97672
RS		 7893 if (globals->use_rel)
7894 bfd_put_32 (output_bfd, outrel.r_addend,
7895 globals->sgot->contents + cur_off);
7896
7897 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7898 globals->srelgot->reloc_count++;
00a97672 7899 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7900
7901 if (indx == 0)
7902 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7903 globals->sgot->contents + cur_off + 4);
7904 else
7905 {
00a97672 7906 outrel.r_addend = 0;
ba93b8ac
DJ		 7907 outrel.r_info = ELF32_R_INFO (indx,
7908 R_ARM_TLS_DTPOFF32);
7909 outrel.r_offset += 4;
00a97672
RS		 7910
7911 if (globals->use_rel)
7912 bfd_put_32 (output_bfd, outrel.r_addend,
7913 globals->sgot->contents + cur_off + 4);
7914
7915
7916 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7917 globals->srelgot->reloc_count++;
00a97672 7918 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7919 }
7920 }
7921 else
7922 {
7923 /* If we are not emitting relocations for a
7924 general dynamic reference, then we must be in a
7925 static link or an executable link with the
7926 symbol binding locally. Mark it as belonging
7927 to module 1, the executable. */
7928 bfd_put_32 (output_bfd, 1,
7929 globals->sgot->contents + cur_off);
7930 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7931 globals->sgot->contents + cur_off + 4);
7932 }
7933
7934 cur_off += 8;
7935 }
7936
7937 if (tls_type & GOT_TLS_IE)
7938 {
7939 if (need_relocs)
7940 {
00a97672
RS		 7941 if (indx == 0)
7942 outrel.r_addend = value - dtpoff_base (info);
7943 else
7944 outrel.r_addend = 0;
ba93b8ac
DJ		 7945 outrel.r_offset = (globals->sgot->output_section->vma
7946 + globals->sgot->output_offset
7947 + cur_off);
7948 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
7949
00a97672
RS		 7950 if (globals->use_rel)
7951 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 7952 globals->sgot->contents + cur_off);
7953
00a97672 7954 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7955 globals->srelgot->reloc_count++;
00a97672 7956 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7957 }
7958 else
7959 bfd_put_32 (output_bfd, tpoff (info, value),
7960 globals->sgot->contents + cur_off);
7961 cur_off += 4;
7962 }
7963
7964 if (h != NULL)
7965 h->got.offset |= 1;
7966 else
7967 local_got_offsets[r_symndx] |= 1;
7968 }
7969
7970 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
7971 off += 8;
906e58ca 7972 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7973 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7974
7975 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7976 contents, rel->r_offset, value,
00a97672 7977 rel->r_addend);
ba93b8ac
DJ		 7978 }
7979
7980 case R_ARM_TLS_LE32:
7981 if (info->shared)
7982 {
7983 (*_bfd_error_handler)
7984 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
7985 input_bfd, input_section,
7986 (long) rel->r_offset, howto->name);
906e58ca 7987 return FALSE;
ba93b8ac
DJ		 7988 }
7989 else
7990 value = tpoff (info, value);
906e58ca 7991
ba93b8ac 7992 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7993 contents, rel->r_offset, value,
7994 rel->r_addend);
ba93b8ac 7995
319850b4
JB		 7996 case R_ARM_V4BX:
7997 if (globals->fix_v4bx)
845b51d6
PB		 7998 {
7999 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8000
845b51d6
PB		 8001 /* Ensure that we have a BX instruction. */
8002 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8003
845b51d6
PB		 8004 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8005 {
8006 /* Branch to veneer. */
8007 bfd_vma glue_addr;
8008 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8009 glue_addr -= input_section->output_section->vma
8010 + input_section->output_offset
8011 + rel->r_offset + 8;
8012 insn = (insn & 0xf0000000) | 0x0a000000
8013 | ((glue_addr >> 2) & 0x00ffffff);
8014 }
8015 else
8016 {
8017 /* Preserve Rm (lowest four bits) and the condition code
8018 (highest four bits). Other bits encode MOV PC,Rm. */
8019 insn = (insn & 0xf000000f) | 0x01a0f000;
8020 }
319850b4 8021
845b51d6
PB		 8022 bfd_put_32 (input_bfd, insn, hit_data);
8023 }
319850b4
JB		 8024 return bfd_reloc_ok;
8025
b6895b4f
PB		 8026 case R_ARM_MOVW_ABS_NC:
8027 case R_ARM_MOVT_ABS:
8028 case R_ARM_MOVW_PREL_NC:
8029 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8030 /* Until we properly support segment-base-relative addressing then
8031 we assume the segment base to be zero, as for the group relocations.
8032 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8033 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8034 case R_ARM_MOVW_BREL_NC:
8035 case R_ARM_MOVW_BREL:
8036 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8037 {
8038 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8039
8040 if (globals->use_rel)
8041 {
8042 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8043 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8044 }
92f5d02b 8045
b6895b4f 8046 value += signed_addend;
b6895b4f
PB		 8047
8048 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8049 value -= (input_section->output_section->vma
8050 + input_section->output_offset + rel->r_offset);
8051
92f5d02b
MS		 8052 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8053 return bfd_reloc_overflow;
8054
8055 if (sym_flags == STT_ARM_TFUNC)
8056 value |= 1;
8057
8058 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8059 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8060 value >>= 16;
8061
8062 insn &= 0xfff0f000;
8063 insn |= value & 0xfff;
8064 insn |= (value & 0xf000) << 4;
8065 bfd_put_32 (input_bfd, insn, hit_data);
8066 }
8067 return bfd_reloc_ok;
8068
8069 case R_ARM_THM_MOVW_ABS_NC:
8070 case R_ARM_THM_MOVT_ABS:
8071 case R_ARM_THM_MOVW_PREL_NC:
8072 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8073 /* Until we properly support segment-base-relative addressing then
8074 we assume the segment base to be zero, as for the above relocations.
8075 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8076 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8077 as R_ARM_THM_MOVT_ABS. */
8078 case R_ARM_THM_MOVW_BREL_NC:
8079 case R_ARM_THM_MOVW_BREL:
8080 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8081 {
8082 bfd_vma insn;
906e58ca 8083
b6895b4f
PB		 8084 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8085 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8086
8087 if (globals->use_rel)
8088 {
8089 addend = ((insn >> 4) & 0xf000)
8090 | ((insn >> 15) & 0x0800)
8091 | ((insn >> 4) & 0x0700)
8092 | (insn & 0x00ff);
39623e12 8093 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8094 }
92f5d02b 8095
b6895b4f 8096 value += signed_addend;
b6895b4f
PB		 8097
8098 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8099 value -= (input_section->output_section->vma
8100 + input_section->output_offset + rel->r_offset);
8101
92f5d02b
MS		 8102 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8103 return bfd_reloc_overflow;
8104
8105 if (sym_flags == STT_ARM_TFUNC)
8106 value |= 1;
8107
8108 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8109 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8110 value >>= 16;
8111
8112 insn &= 0xfbf08f00;
8113 insn |= (value & 0xf000) << 4;
8114 insn |= (value & 0x0800) << 15;
8115 insn |= (value & 0x0700) << 4;
8116 insn |= (value & 0x00ff);
8117
8118 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8119 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8120 }
8121 return bfd_reloc_ok;
8122
4962c51a
MS		 8123 case R_ARM_ALU_PC_G0_NC:
8124 case R_ARM_ALU_PC_G1_NC:
8125 case R_ARM_ALU_PC_G0:
8126 case R_ARM_ALU_PC_G1:
8127 case R_ARM_ALU_PC_G2:
8128 case R_ARM_ALU_SB_G0_NC:
8129 case R_ARM_ALU_SB_G1_NC:
8130 case R_ARM_ALU_SB_G0:
8131 case R_ARM_ALU_SB_G1:
8132 case R_ARM_ALU_SB_G2:
8133 {
8134 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8135 bfd_vma pc = input_section->output_section->vma
8136 + input_section->output_offset + rel->r_offset;
8137 /* sb should be the origin of the *segment* containing the symbol.
8138 It is not clear how to obtain this OS-dependent value, so we
8139 make an arbitrary choice of zero. */
8140 bfd_vma sb = 0;
8141 bfd_vma residual;
8142 bfd_vma g_n;
8143 bfd_signed_vma signed_value;
8144 int group = 0;
8145
8146 /* Determine which group of bits to select. */
8147 switch (r_type)
8148 {
8149 case R_ARM_ALU_PC_G0_NC:
8150 case R_ARM_ALU_PC_G0:
8151 case R_ARM_ALU_SB_G0_NC:
8152 case R_ARM_ALU_SB_G0:
8153 group = 0;
8154 break;
8155
8156 case R_ARM_ALU_PC_G1_NC:
8157 case R_ARM_ALU_PC_G1:
8158 case R_ARM_ALU_SB_G1_NC:
8159 case R_ARM_ALU_SB_G1:
8160 group = 1;
8161 break;
8162
8163 case R_ARM_ALU_PC_G2:
8164 case R_ARM_ALU_SB_G2:
8165 group = 2;
8166 break;
8167
8168 default:
906e58ca 8169 abort ();
4962c51a
MS		 8170 }
8171
8172 /* If REL, extract the addend from the insn. If RELA, it will
8173 have already been fetched for us. */
8174 if (globals->use_rel)
8175 {
8176 int negative;
8177 bfd_vma constant = insn & 0xff;
8178 bfd_vma rotation = (insn & 0xf00) >> 8;
8179
8180 if (rotation == 0)
8181 signed_addend = constant;
8182 else
8183 {
8184 /* Compensate for the fact that in the instruction, the
8185 rotation is stored in multiples of 2 bits. */
8186 rotation *= 2;
8187
8188 /* Rotate "constant" right by "rotation" bits. */
8189 signed_addend = (constant >> rotation) |
8190 (constant << (8 * sizeof (bfd_vma) - rotation));
8191 }
8192
8193 /* Determine if the instruction is an ADD or a SUB.
8194 (For REL, this determines the sign of the addend.) */
8195 negative = identify_add_or_sub (insn);
8196 if (negative == 0)
8197 {
8198 (*_bfd_error_handler)
8199 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8200 input_bfd, input_section,
8201 (long) rel->r_offset, howto->name);
906e58ca 8202 return bfd_reloc_overflow;
4962c51a
MS		 8203 }
8204
8205 signed_addend *= negative;
8206 }
8207
8208 /* Compute the value (X) to go in the place. */
8209 if (r_type == R_ARM_ALU_PC_G0_NC
8210 || r_type == R_ARM_ALU_PC_G1_NC
8211 || r_type == R_ARM_ALU_PC_G0
8212 || r_type == R_ARM_ALU_PC_G1
8213 || r_type == R_ARM_ALU_PC_G2)
8214 /* PC relative. */
8215 signed_value = value - pc + signed_addend;
8216 else
8217 /* Section base relative. */
8218 signed_value = value - sb + signed_addend;
8219
8220 /* If the target symbol is a Thumb function, then set the
8221 Thumb bit in the address. */
8222 if (sym_flags == STT_ARM_TFUNC)
8223 signed_value |= 1;
8224
8225 /* Calculate the value of the relevant G_n, in encoded
8226 constant-with-rotation format. */
8227 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8228 &residual);
8229
8230 /* Check for overflow if required. */
8231 if ((r_type == R_ARM_ALU_PC_G0
8232 || r_type == R_ARM_ALU_PC_G1
8233 || r_type == R_ARM_ALU_PC_G2
8234 || r_type == R_ARM_ALU_SB_G0
8235 || r_type == R_ARM_ALU_SB_G1
8236 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8237 {
8238 (*_bfd_error_handler)
8239 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8240 input_bfd, input_section,
8241 (long) rel->r_offset, abs (signed_value), howto->name);
8242 return bfd_reloc_overflow;
8243 }
8244
8245 /* Mask out the value and the ADD/SUB part of the opcode; take care
8246 not to destroy the S bit. */
8247 insn &= 0xff1ff000;
8248
8249 /* Set the opcode according to whether the value to go in the
8250 place is negative. */
8251 if (signed_value < 0)
8252 insn |= 1 << 22;
8253 else
8254 insn |= 1 << 23;
8255
8256 /* Encode the offset. */
8257 insn |= g_n;
8258
8259 bfd_put_32 (input_bfd, insn, hit_data);
8260 }
8261 return bfd_reloc_ok;
8262
8263 case R_ARM_LDR_PC_G0:
8264 case R_ARM_LDR_PC_G1:
8265 case R_ARM_LDR_PC_G2:
8266 case R_ARM_LDR_SB_G0:
8267 case R_ARM_LDR_SB_G1:
8268 case R_ARM_LDR_SB_G2:
8269 {
8270 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8271 bfd_vma pc = input_section->output_section->vma
8272 + input_section->output_offset + rel->r_offset;
8273 bfd_vma sb = 0; /* See note above. */
8274 bfd_vma residual;
8275 bfd_signed_vma signed_value;
8276 int group = 0;
8277
8278 /* Determine which groups of bits to calculate. */
8279 switch (r_type)
8280 {
8281 case R_ARM_LDR_PC_G0:
8282 case R_ARM_LDR_SB_G0:
8283 group = 0;
8284 break;
8285
8286 case R_ARM_LDR_PC_G1:
8287 case R_ARM_LDR_SB_G1:
8288 group = 1;
8289 break;
8290
8291 case R_ARM_LDR_PC_G2:
8292 case R_ARM_LDR_SB_G2:
8293 group = 2;
8294 break;
8295
8296 default:
906e58ca 8297 abort ();
4962c51a
MS		 8298 }
8299
8300 /* If REL, extract the addend from the insn. If RELA, it will
8301 have already been fetched for us. */
8302 if (globals->use_rel)
8303 {
8304 int negative = (insn & (1 << 23)) ? 1 : -1;
8305 signed_addend = negative * (insn & 0xfff);
8306 }
8307
8308 /* Compute the value (X) to go in the place. */
8309 if (r_type == R_ARM_LDR_PC_G0
8310 || r_type == R_ARM_LDR_PC_G1
8311 || r_type == R_ARM_LDR_PC_G2)
8312 /* PC relative. */
8313 signed_value = value - pc + signed_addend;
8314 else
8315 /* Section base relative. */
8316 signed_value = value - sb + signed_addend;
8317
8318 /* Calculate the value of the relevant G_{n-1} to obtain
8319 the residual at that stage. */
8320 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8321
8322 /* Check for overflow. */
8323 if (residual >= 0x1000)
8324 {
8325 (*_bfd_error_handler)
8326 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8327 input_bfd, input_section,
8328 (long) rel->r_offset, abs (signed_value), howto->name);
8329 return bfd_reloc_overflow;
8330 }
8331
8332 /* Mask out the value and U bit. */
8333 insn &= 0xff7ff000;
8334
8335 /* Set the U bit if the value to go in the place is non-negative. */
8336 if (signed_value >= 0)
8337 insn |= 1 << 23;
8338
8339 /* Encode the offset. */
8340 insn |= residual;
8341
8342 bfd_put_32 (input_bfd, insn, hit_data);
8343 }
8344 return bfd_reloc_ok;
8345
8346 case R_ARM_LDRS_PC_G0:
8347 case R_ARM_LDRS_PC_G1:
8348 case R_ARM_LDRS_PC_G2:
8349 case R_ARM_LDRS_SB_G0:
8350 case R_ARM_LDRS_SB_G1:
8351 case R_ARM_LDRS_SB_G2:
8352 {
8353 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8354 bfd_vma pc = input_section->output_section->vma
8355 + input_section->output_offset + rel->r_offset;
8356 bfd_vma sb = 0; /* See note above. */
8357 bfd_vma residual;
8358 bfd_signed_vma signed_value;
8359 int group = 0;
8360
8361 /* Determine which groups of bits to calculate. */
8362 switch (r_type)
8363 {
8364 case R_ARM_LDRS_PC_G0:
8365 case R_ARM_LDRS_SB_G0:
8366 group = 0;
8367 break;
8368
8369 case R_ARM_LDRS_PC_G1:
8370 case R_ARM_LDRS_SB_G1:
8371 group = 1;
8372 break;
8373
8374 case R_ARM_LDRS_PC_G2:
8375 case R_ARM_LDRS_SB_G2:
8376 group = 2;
8377 break;
8378
8379 default:
906e58ca 8380 abort ();
4962c51a
MS		 8381 }
8382
8383 /* If REL, extract the addend from the insn. If RELA, it will
8384 have already been fetched for us. */
8385 if (globals->use_rel)
8386 {
8387 int negative = (insn & (1 << 23)) ? 1 : -1;
8388 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8389 }
8390
8391 /* Compute the value (X) to go in the place. */
8392 if (r_type == R_ARM_LDRS_PC_G0
8393 || r_type == R_ARM_LDRS_PC_G1
8394 || r_type == R_ARM_LDRS_PC_G2)
8395 /* PC relative. */
8396 signed_value = value - pc + signed_addend;
8397 else
8398 /* Section base relative. */
8399 signed_value = value - sb + signed_addend;
8400
8401 /* Calculate the value of the relevant G_{n-1} to obtain
8402 the residual at that stage. */
8403 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8404
8405 /* Check for overflow. */
8406 if (residual >= 0x100)
8407 {
8408 (*_bfd_error_handler)
8409 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8410 input_bfd, input_section,
8411 (long) rel->r_offset, abs (signed_value), howto->name);
8412 return bfd_reloc_overflow;
8413 }
8414
8415 /* Mask out the value and U bit. */
8416 insn &= 0xff7ff0f0;
8417
8418 /* Set the U bit if the value to go in the place is non-negative. */
8419 if (signed_value >= 0)
8420 insn |= 1 << 23;
8421
8422 /* Encode the offset. */
8423 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8424
8425 bfd_put_32 (input_bfd, insn, hit_data);
8426 }
8427 return bfd_reloc_ok;
8428
8429 case R_ARM_LDC_PC_G0:
8430 case R_ARM_LDC_PC_G1:
8431 case R_ARM_LDC_PC_G2:
8432 case R_ARM_LDC_SB_G0:
8433 case R_ARM_LDC_SB_G1:
8434 case R_ARM_LDC_SB_G2:
8435 {
8436 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8437 bfd_vma pc = input_section->output_section->vma
8438 + input_section->output_offset + rel->r_offset;
8439 bfd_vma sb = 0; /* See note above. */
8440 bfd_vma residual;
8441 bfd_signed_vma signed_value;
8442 int group = 0;
8443
8444 /* Determine which groups of bits to calculate. */
8445 switch (r_type)
8446 {
8447 case R_ARM_LDC_PC_G0:
8448 case R_ARM_LDC_SB_G0:
8449 group = 0;
8450 break;
8451
8452 case R_ARM_LDC_PC_G1:
8453 case R_ARM_LDC_SB_G1:
8454 group = 1;
8455 break;
8456
8457 case R_ARM_LDC_PC_G2:
8458 case R_ARM_LDC_SB_G2:
8459 group = 2;
8460 break;
8461
8462 default:
906e58ca 8463 abort ();
4962c51a
MS		 8464 }
8465
8466 /* If REL, extract the addend from the insn. If RELA, it will
8467 have already been fetched for us. */
8468 if (globals->use_rel)
8469 {
8470 int negative = (insn & (1 << 23)) ? 1 : -1;
8471 signed_addend = negative * ((insn & 0xff) << 2);
8472 }
8473
8474 /* Compute the value (X) to go in the place. */
8475 if (r_type == R_ARM_LDC_PC_G0
8476 || r_type == R_ARM_LDC_PC_G1
8477 || r_type == R_ARM_LDC_PC_G2)
8478 /* PC relative. */
8479 signed_value = value - pc + signed_addend;
8480 else
8481 /* Section base relative. */
8482 signed_value = value - sb + signed_addend;
8483
8484 /* Calculate the value of the relevant G_{n-1} to obtain
8485 the residual at that stage. */
8486 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8487
8488 /* Check for overflow. (The absolute value to go in the place must be
8489 divisible by four and, after having been divided by four, must
8490 fit in eight bits.) */
8491 if ((residual & 0x3) != 0 || residual >= 0x400)
8492 {
8493 (*_bfd_error_handler)
8494 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8495 input_bfd, input_section,
8496 (long) rel->r_offset, abs (signed_value), howto->name);
8497 return bfd_reloc_overflow;
8498 }
8499
8500 /* Mask out the value and U bit. */
8501 insn &= 0xff7fff00;
8502
8503 /* Set the U bit if the value to go in the place is non-negative. */
8504 if (signed_value >= 0)
8505 insn |= 1 << 23;
8506
8507 /* Encode the offset. */
8508 insn |= residual >> 2;
8509
8510 bfd_put_32 (input_bfd, insn, hit_data);
8511 }
8512 return bfd_reloc_ok;
8513
252b5132
RH		 8514 default:
8515 return bfd_reloc_notsupported;
8516 }
8517}
8518
98c1d4aa
NC		 8519/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8520static void
57e8b36a
NC		 8521arm_add_to_rel (bfd * abfd,
8522 bfd_byte * address,
8523 reloc_howto_type * howto,
8524 bfd_signed_vma increment)
98c1d4aa 8525{
98c1d4aa
NC		 8526 bfd_signed_vma addend;
8527
bd97cb95
DJ		 8528 if (howto->type == R_ARM_THM_CALL
8529 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8530 {
9a5aca8c
AM		 8531 int upper_insn, lower_insn;
8532 int upper, lower;
98c1d4aa 8533
9a5aca8c
AM		 8534 upper_insn = bfd_get_16 (abfd, address);
8535 lower_insn = bfd_get_16 (abfd, address + 2);
8536 upper = upper_insn & 0x7ff;
8537 lower = lower_insn & 0x7ff;
8538
8539 addend = (upper << 12) | (lower << 1);
ddda4409 8540 addend += increment;
9a5aca8c 8541 addend >>= 1;
98c1d4aa 8542
9a5aca8c
AM		 8543 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8544 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8545
dc810e39
AM		 8546 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8547 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8548 }
8549 else
8550 {
8551 bfd_vma contents;
8552
8553 contents = bfd_get_32 (abfd, address);
8554
8555 /* Get the (signed) value from the instruction. */
8556 addend = contents & howto->src_mask;
8557 if (addend & ((howto->src_mask + 1) >> 1))
8558 {
8559 bfd_signed_vma mask;
8560
8561 mask = -1;
8562 mask &= ~ howto->src_mask;
8563 addend |= mask;
8564 }
8565
8566 /* Add in the increment, (which is a byte value). */
8567 switch (howto->type)
8568 {
8569 default:
8570 addend += increment;
8571 break;
8572
8573 case R_ARM_PC24:
c6596c5e 8574 case R_ARM_PLT32:
5b5bb741
PB		 8575 case R_ARM_CALL:
8576 case R_ARM_JUMP24:
9a5aca8c 8577 addend <<= howto->size;
dc810e39 8578 addend += increment;
9a5aca8c
AM		 8579
8580 /* Should we check for overflow here ? */
8581
8582 /* Drop any undesired bits. */
8583 addend >>= howto->rightshift;
8584 break;
8585 }
8586
8587 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8588
8589 bfd_put_32 (abfd, contents, address);
ddda4409 8590 }
98c1d4aa 8591}
252b5132 8592
ba93b8ac
DJ		 8593#define IS_ARM_TLS_RELOC(R_TYPE) \
8594 ((R_TYPE) == R_ARM_TLS_GD32 \
8595 || (R_TYPE) == R_ARM_TLS_LDO32 \
8596 || (R_TYPE) == R_ARM_TLS_LDM32 \
8597 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8598 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8599 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8600 || (R_TYPE) == R_ARM_TLS_LE32 \
8601 || (R_TYPE) == R_ARM_TLS_IE32)
8602
252b5132 8603/* Relocate an ARM ELF section. */
906e58ca 8604
b34976b6 8605static bfd_boolean
57e8b36a
NC		 8606elf32_arm_relocate_section (bfd * output_bfd,
8607 struct bfd_link_info * info,
8608 bfd * input_bfd,
8609 asection * input_section,
8610 bfd_byte * contents,
8611 Elf_Internal_Rela * relocs,
8612 Elf_Internal_Sym * local_syms,
8613 asection ** local_sections)
252b5132 8614{
b34976b6
AM		 8615 Elf_Internal_Shdr *symtab_hdr;
8616 struct elf_link_hash_entry **sym_hashes;
8617 Elf_Internal_Rela *rel;
8618 Elf_Internal_Rela *relend;
8619 const char *name;
b32d3aa2 8620 struct elf32_arm_link_hash_table * globals;
252b5132 8621
4e7fd91e 8622 globals = elf32_arm_hash_table (info);
b491616a 8623
0ffa91dd 8624 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8625 sym_hashes = elf_sym_hashes (input_bfd);
8626
8627 rel = relocs;
8628 relend = relocs + input_section->reloc_count;
8629 for (; rel < relend; rel++)
8630 {
ba96a88f
NC		 8631 int r_type;
8632 reloc_howto_type * howto;
8633 unsigned long r_symndx;
8634 Elf_Internal_Sym * sym;
8635 asection * sec;
252b5132 8636 struct elf_link_hash_entry * h;
ba96a88f
NC		 8637 bfd_vma relocation;
8638 bfd_reloc_status_type r;
8639 arelent bfd_reloc;
ba93b8ac 8640 char sym_type;
0945cdfd 8641 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8642 char *error_message = NULL;
f21f3fe0 8643
252b5132 8644 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8645 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8646 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8647
ba96a88f
NC		 8648 if ( r_type == R_ARM_GNU_VTENTRY
8649 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8650 continue;
8651
b32d3aa2 8652 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8653 howto = bfd_reloc.howto;
252b5132 8654
252b5132
RH		 8655 h = NULL;
8656 sym = NULL;
8657 sec = NULL;
9b485d32 8658
252b5132
RH		 8659 if (r_symndx < symtab_hdr->sh_info)
8660 {
8661 sym = local_syms + r_symndx;
ba93b8ac 8662 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8663 sec = local_sections[r_symndx];
4e7fd91e 8664 if (globals->use_rel)
f8df10f4 8665 {
4e7fd91e
PB		 8666 relocation = (sec->output_section->vma
8667 + sec->output_offset
8668 + sym->st_value);
ab96bf03
AM		 8669 if (!info->relocatable
8670 && (sec->flags & SEC_MERGE)
8671 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8672 {
4e7fd91e
PB		 8673 asection *msec;
8674 bfd_vma addend, value;
8675
39623e12 8676 switch (r_type)
4e7fd91e 8677 {
39623e12
PB		 8678 case R_ARM_MOVW_ABS_NC:
8679 case R_ARM_MOVT_ABS:
8680 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8681 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8682 addend = (addend ^ 0x8000) - 0x8000;
8683 break;
f8df10f4 8684
39623e12
PB		 8685 case R_ARM_THM_MOVW_ABS_NC:
8686 case R_ARM_THM_MOVT_ABS:
8687 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8688 << 16;
8689 value |= bfd_get_16 (input_bfd,
8690 contents + rel->r_offset + 2);
8691 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8692 | ((value & 0x04000000) >> 15);
8693 addend = (addend ^ 0x8000) - 0x8000;
8694 break;
f8df10f4 8695
39623e12
PB		 8696 default:
8697 if (howto->rightshift
8698 || (howto->src_mask & (howto->src_mask + 1)))
8699 {
8700 (*_bfd_error_handler)
8701 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8702 input_bfd, input_section,
8703 (long) rel->r_offset, howto->name);
8704 return FALSE;
8705 }
8706
8707 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8708
8709 /* Get the (signed) value from the instruction. */
8710 addend = value & howto->src_mask;
8711 if (addend & ((howto->src_mask + 1) >> 1))
8712 {
8713 bfd_signed_vma mask;
8714
8715 mask = -1;
8716 mask &= ~ howto->src_mask;
8717 addend |= mask;
8718 }
8719 break;
4e7fd91e 8720 }
39623e12 8721
4e7fd91e
PB		 8722 msec = sec;
8723 addend =
8724 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8725 - relocation;
8726 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8727
8728 /* Cases here must match those in the preceeding
8729 switch statement. */
8730 switch (r_type)
8731 {
8732 case R_ARM_MOVW_ABS_NC:
8733 case R_ARM_MOVT_ABS:
8734 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8735 | (addend & 0xfff);
8736 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8737 break;
8738
8739 case R_ARM_THM_MOVW_ABS_NC:
8740 case R_ARM_THM_MOVT_ABS:
8741 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8742 | (addend & 0xff) | ((addend & 0x0800) << 15);
8743 bfd_put_16 (input_bfd, value >> 16,
8744 contents + rel->r_offset);
8745 bfd_put_16 (input_bfd, value,
8746 contents + rel->r_offset + 2);
8747 break;
8748
8749 default:
8750 value = (value & ~ howto->dst_mask)
8751 | (addend & howto->dst_mask);
8752 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8753 break;
8754 }
f8df10f4 8755 }
f8df10f4 8756 }
4e7fd91e
PB		 8757 else
8758 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8759 }
8760 else
8761 {
560e09e9 8762 bfd_boolean warned;
560e09e9 8763
b2a8e766
AM		 8764 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8765 r_symndx, symtab_hdr, sym_hashes,
8766 h, sec, relocation,
8767 unresolved_reloc, warned);
ba93b8ac
DJ		 8768
8769 sym_type = h->type;
252b5132
RH		 8770 }
8771
ab96bf03
AM		 8772 if (sec != NULL && elf_discarded_section (sec))
8773 {
8774 /* For relocs against symbols from removed linkonce sections,
8775 or sections discarded by a linker script, we just want the
8776 section contents zeroed. Avoid any special processing. */
8777 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8778 rel->r_info = 0;
8779 rel->r_addend = 0;
8780 continue;
8781 }
8782
8783 if (info->relocatable)
8784 {
8785 /* This is a relocatable link. We don't have to change
8786 anything, unless the reloc is against a section symbol,
8787 in which case we have to adjust according to where the
8788 section symbol winds up in the output section. */
8789 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8790 {
8791 if (globals->use_rel)
8792 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8793 howto, (bfd_signed_vma) sec->output_offset);
8794 else
8795 rel->r_addend += sec->output_offset;
8796 }
8797 continue;
8798 }
8799
252b5132
RH		 8800 if (h != NULL)
8801 name = h->root.root.string;
8802 else
8803 {
8804 name = (bfd_elf_string_from_elf_section
8805 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8806 if (name == NULL || *name == '\0')
8807 name = bfd_section_name (input_bfd, sec);
8808 }
f21f3fe0 8809
ba93b8ac
DJ		 8810 if (r_symndx != 0
8811 && r_type != R_ARM_NONE
8812 && (h == NULL
8813 || h->root.type == bfd_link_hash_defined
8814 || h->root.type == bfd_link_hash_defweak)
8815 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8816 {
8817 (*_bfd_error_handler)
8818 ((sym_type == STT_TLS
8819 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8820 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8821 input_bfd,
8822 input_section,
8823 (long) rel->r_offset,
8824 howto->name,
8825 name);
8826 }
8827
252b5132
RH		 8828 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8829 input_section, contents, rel,
8830 relocation, info, sec, name,
8831 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8832 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8833 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8834
8835 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8836 because such sections are not SEC_ALLOC and thus ld.so will
8837 not process them. */
8838 if (unresolved_reloc
8839 && !((input_section->flags & SEC_DEBUGGING) != 0
8840 && h->def_dynamic))
8841 {
8842 (*_bfd_error_handler)
843fe662
L		 8843 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8844 input_bfd,
8845 input_section,
8846 (long) rel->r_offset,
8847 howto->name,
8848 h->root.root.string);
0945cdfd
DJ		 8849 return FALSE;
8850 }
252b5132
RH		 8851
8852 if (r != bfd_reloc_ok)
8853 {
252b5132
RH		 8854 switch (r)
8855 {
8856 case bfd_reloc_overflow:
cf919dfd
PB		 8857 /* If the overflowing reloc was to an undefined symbol,
8858 we have already printed one error message and there
8859 is no point complaining again. */
8860 if ((! h ||
8861 h->root.type != bfd_link_hash_undefined)
8862 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8863 (info, (h ? &h->root : NULL), name, howto->name,
8864 (bfd_vma) 0, input_bfd, input_section,
8865 rel->r_offset))))
b34976b6 8866 return FALSE;
252b5132
RH		 8867 break;
8868
8869 case bfd_reloc_undefined:
8870 if (!((*info->callbacks->undefined_symbol)
8871 (info, name, input_bfd, input_section,
b34976b6
AM		 8872 rel->r_offset, TRUE)))
8873 return FALSE;
252b5132
RH		 8874 break;
8875
8876 case bfd_reloc_outofrange:
f2a9dd69 8877 error_message = _("out of range");
252b5132
RH		 8878 goto common_error;
8879
8880 case bfd_reloc_notsupported:
f2a9dd69 8881 error_message = _("unsupported relocation");
252b5132
RH		 8882 goto common_error;
8883
8884 case bfd_reloc_dangerous:
f2a9dd69 8885 /* error_message should already be set. */
252b5132
RH		 8886 goto common_error;
8887
8888 default:
f2a9dd69 8889 error_message = _("unknown error");
8029a119 8890 /* Fall through. */
252b5132
RH		 8891
8892 common_error:
f2a9dd69
DJ		 8893 BFD_ASSERT (error_message != NULL);
8894 if (!((*info->callbacks->reloc_dangerous)
8895 (info, error_message, input_bfd, input_section,
252b5132 8896 rel->r_offset)))
b34976b6 8897 return FALSE;
252b5132
RH		 8898 break;
8899 }
8900 }
8901 }
8902
b34976b6 8903 return TRUE;
252b5132
RH		 8904}
8905
2468f9c9
PB		 8906/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
8907 adds the edit to the start of the list. (The list must be built in order of
8908 ascending INDEX: the function's callers are primarily responsible for
8909 maintaining that condition). */
8910
8911static void
8912add_unwind_table_edit (arm_unwind_table_edit **head,
8913 arm_unwind_table_edit **tail,
8914 arm_unwind_edit_type type,
8915 asection *linked_section,
8916 unsigned int index)
8917{
8918 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
8919
8920 new_edit->type = type;
8921 new_edit->linked_section = linked_section;
8922 new_edit->index = index;
8923
8924 if (index > 0)
8925 {
8926 new_edit->next = NULL;
8927
8928 if (*tail)
8929 (*tail)->next = new_edit;
8930
8931 (*tail) = new_edit;
8932
8933 if (!*head)
8934 (*head) = new_edit;
8935 }
8936 else
8937 {
8938 new_edit->next = *head;
8939
8940 if (!*tail)
8941 *tail = new_edit;
8942
8943 *head = new_edit;
8944 }
8945}
8946
8947static _arm_elf_section_data *get_arm_elf_section_data (asection *);
8948
8949/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
8950static void
8951adjust_exidx_size(asection *exidx_sec, int adjust)
8952{
8953 asection *out_sec;
8954
8955 if (!exidx_sec->rawsize)
8956 exidx_sec->rawsize = exidx_sec->size;
8957
8958 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
8959 out_sec = exidx_sec->output_section;
8960 /* Adjust size of output section. */
8961 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
8962}
8963
8964/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
8965static void
8966insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
8967{
8968 struct _arm_elf_section_data *exidx_arm_data;
8969
8970 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
8971 add_unwind_table_edit (
8972 &exidx_arm_data->u.exidx.unwind_edit_list,
8973 &exidx_arm_data->u.exidx.unwind_edit_tail,
8974 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
8975
8976 adjust_exidx_size(exidx_sec, 8);
8977}
8978
8979/* Scan .ARM.exidx tables, and create a list describing edits which should be
8980 made to those tables, such that:
8981
8982 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
8983 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
8984 codes which have been inlined into the index).
8985
8986 The edits are applied when the tables are written
8987 (in elf32_arm_write_section).
8988*/
8989
8990bfd_boolean
8991elf32_arm_fix_exidx_coverage (asection **text_section_order,
8992 unsigned int num_text_sections,
8993 struct bfd_link_info *info)
8994{
8995 bfd *inp;
8996 unsigned int last_second_word = 0, i;
8997 asection *last_exidx_sec = NULL;
8998 asection *last_text_sec = NULL;
8999 int last_unwind_type = -1;
9000
9001 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9002 text sections. */
9003 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9004 {
9005 asection *sec;
9006
9007 for (sec = inp->sections; sec != NULL; sec = sec->next)
9008 {
9009 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9010 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9011
dec9d5df 9012 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9013 continue;
9014
9015 if (elf_sec->linked_to)
9016 {
9017 Elf_Internal_Shdr *linked_hdr
9018 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9019 struct _arm_elf_section_data *linked_sec_arm_data
9020 = get_arm_elf_section_data (linked_hdr->bfd_section);
9021
9022 if (linked_sec_arm_data == NULL)
9023 continue;
9024
9025 /* Link this .ARM.exidx section back from the text section it
9026 describes. */
9027 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9028 }
9029 }
9030 }
9031
9032 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9033 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9034 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
9035 */
9036
9037 for (i = 0; i < num_text_sections; i++)
9038 {
9039 asection *sec = text_section_order[i];
9040 asection *exidx_sec;
9041 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9042 struct _arm_elf_section_data *exidx_arm_data;
9043 bfd_byte *contents = NULL;
9044 int deleted_exidx_bytes = 0;
9045 bfd_vma j;
9046 arm_unwind_table_edit *unwind_edit_head = NULL;
9047 arm_unwind_table_edit *unwind_edit_tail = NULL;
9048 Elf_Internal_Shdr *hdr;
9049 bfd *ibfd;
9050
9051 if (arm_data == NULL)
9052 continue;
9053
9054 exidx_sec = arm_data->u.text.arm_exidx_sec;
9055 if (exidx_sec == NULL)
9056 {
9057 /* Section has no unwind data. */
9058 if (last_unwind_type == 0 || !last_exidx_sec)
9059 continue;
9060
9061 /* Ignore zero sized sections. */
9062 if (sec->size == 0)
9063 continue;
9064
9065 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9066 last_unwind_type = 0;
9067 continue;
9068 }
9069
22a8f80e
PB		 9070 /* Skip /DISCARD/ sections. */
9071 if (bfd_is_abs_section (exidx_sec->output_section))
9072 continue;
9073
2468f9c9
PB		 9074 hdr = &elf_section_data (exidx_sec)->this_hdr;
9075 if (hdr->sh_type != SHT_ARM_EXIDX)
9076 continue;
9077
9078 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9079 if (exidx_arm_data == NULL)
9080 continue;
9081
9082 ibfd = exidx_sec->owner;
9083
9084 if (hdr->contents != NULL)
9085 contents = hdr->contents;
9086 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9087 /* An error? */
9088 continue;
9089
9090 for (j = 0; j < hdr->sh_size; j += 8)
9091 {
9092 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9093 int unwind_type;
9094 int elide = 0;
9095
9096 /* An EXIDX_CANTUNWIND entry. */
9097 if (second_word == 1)
9098 {
9099 if (last_unwind_type == 0)
9100 elide = 1;
9101 unwind_type = 0;
9102 }
9103 /* Inlined unwinding data. Merge if equal to previous. */
9104 else if ((second_word & 0x80000000) != 0)
9105 {
9106 if (last_second_word == second_word && last_unwind_type == 1)
9107 elide = 1;
9108 unwind_type = 1;
9109 last_second_word = second_word;
9110 }
9111 /* Normal table entry. In theory we could merge these too,
9112 but duplicate entries are likely to be much less common. */
9113 else
9114 unwind_type = 2;
9115
9116 if (elide)
9117 {
9118 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9119 DELETE_EXIDX_ENTRY, NULL, j / 8);
9120
9121 deleted_exidx_bytes += 8;
9122 }
9123
9124 last_unwind_type = unwind_type;
9125 }
9126
9127 /* Free contents if we allocated it ourselves. */
9128 if (contents != hdr->contents)
9129 free (contents);
9130
9131 /* Record edits to be applied later (in elf32_arm_write_section). */
9132 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9133 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9134
9135 if (deleted_exidx_bytes > 0)
9136 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9137
9138 last_exidx_sec = exidx_sec;
9139 last_text_sec = sec;
9140 }
9141
9142 /* Add terminating CANTUNWIND entry. */
9143 if (last_exidx_sec && last_unwind_type != 0)
9144 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9145
9146 return TRUE;
9147}
9148
3e6b1042
DJ		 9149static bfd_boolean
9150elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9151 bfd *ibfd, const char *name)
9152{
9153 asection *sec, *osec;
9154
9155 sec = bfd_get_section_by_name (ibfd, name);
9156 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9157 return TRUE;
9158
9159 osec = sec->output_section;
9160 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9161 return TRUE;
9162
9163 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9164 sec->output_offset, sec->size))
9165 return FALSE;
9166
9167 return TRUE;
9168}
9169
9170static bfd_boolean
9171elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9172{
9173 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9174
9175 /* Invoke the regular ELF backend linker to do all the work. */
9176 if (!bfd_elf_final_link (abfd, info))
9177 return FALSE;
9178
9179 /* Write out any glue sections now that we have created all the
9180 stubs. */
9181 if (globals->bfd_of_glue_owner != NULL)
9182 {
9183 if (! elf32_arm_output_glue_section (info, abfd,
9184 globals->bfd_of_glue_owner,
9185 ARM2THUMB_GLUE_SECTION_NAME))
9186 return FALSE;
9187
9188 if (! elf32_arm_output_glue_section (info, abfd,
9189 globals->bfd_of_glue_owner,
9190 THUMB2ARM_GLUE_SECTION_NAME))
9191 return FALSE;
9192
9193 if (! elf32_arm_output_glue_section (info, abfd,
9194 globals->bfd_of_glue_owner,
9195 VFP11_ERRATUM_VENEER_SECTION_NAME))
9196 return FALSE;
9197
9198 if (! elf32_arm_output_glue_section (info, abfd,
9199 globals->bfd_of_glue_owner,
9200 ARM_BX_GLUE_SECTION_NAME))
9201 return FALSE;
9202 }
9203
9204 return TRUE;
9205}
9206
c178919b
NC		 9207/* Set the right machine number. */
9208
9209static bfd_boolean
57e8b36a 9210elf32_arm_object_p (bfd *abfd)
c178919b 9211{
5a6c6817 9212 unsigned int mach;
57e8b36a 9213
5a6c6817 9214 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9215
5a6c6817
NC		 9216 if (mach != bfd_mach_arm_unknown)
9217 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9218
9219 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9220 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9221
e16bb312 9222 else
5a6c6817 9223 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9224
9225 return TRUE;
9226}
9227
fc830a83 9228/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9229
b34976b6 9230static bfd_boolean
57e8b36a 9231elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9232{
9233 if (elf_flags_init (abfd)
9234 && elf_elfheader (abfd)->e_flags != flags)
9235 {
fc830a83
NC		 9236 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9237 {
fd2ec330 9238 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9239 (*_bfd_error_handler)
9240 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9241 abfd);
fc830a83 9242 else
d003868e
AM		 9243 _bfd_error_handler
9244 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9245 abfd);
fc830a83 9246 }
252b5132
RH		 9247 }
9248 else
9249 {
9250 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9251 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9252 }
9253
b34976b6 9254 return TRUE;
252b5132
RH		 9255}
9256
fc830a83 9257/* Copy backend specific data from one object module to another. */
9b485d32 9258
b34976b6 9259static bfd_boolean
57e8b36a 9260elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9261{
9262 flagword in_flags;
9263 flagword out_flags;
9264
0ffa91dd 9265 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9266 return TRUE;
252b5132 9267
fc830a83 9268 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9269 out_flags = elf_elfheader (obfd)->e_flags;
9270
fc830a83
NC		 9271 if (elf_flags_init (obfd)
9272 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9273 && in_flags != out_flags)
252b5132 9274 {
252b5132 9275 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9276 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9277 return FALSE;
252b5132
RH		 9278
9279 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9280 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9281 return FALSE;
252b5132
RH		 9282
9283 /* If the src and dest have different interworking flags
9284 then turn off the interworking bit. */
fd2ec330 9285 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9286 {
fd2ec330 9287 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9288 _bfd_error_handler
9289 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9290 obfd, ibfd);
252b5132 9291
fd2ec330 9292 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9293 }
1006ba19
PB		 9294
9295 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9296 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9297 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9298 }
9299
9300 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9301 elf_flags_init (obfd) = TRUE;
252b5132 9302
94a3258f
PB		 9303 /* Also copy the EI_OSABI field. */
9304 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9305 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9306
104d59d1
JM		 9307 /* Copy object attributes. */
9308 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9309
9310 return TRUE;
9311}
9312
9313/* Values for Tag_ABI_PCS_R9_use. */
9314enum
9315{
9316 AEABI_R9_V6,
9317 AEABI_R9_SB,
9318 AEABI_R9_TLS,
9319 AEABI_R9_unused
9320};
9321
9322/* Values for Tag_ABI_PCS_RW_data. */
9323enum
9324{
9325 AEABI_PCS_RW_data_absolute,
9326 AEABI_PCS_RW_data_PCrel,
9327 AEABI_PCS_RW_data_SBrel,
9328 AEABI_PCS_RW_data_unused
9329};
9330
9331/* Values for Tag_ABI_enum_size. */
9332enum
9333{
9334 AEABI_enum_unused,
9335 AEABI_enum_short,
9336 AEABI_enum_wide,
9337 AEABI_enum_forced_wide
9338};
9339
104d59d1
JM		 9340/* Determine whether an object attribute tag takes an integer, a
9341 string or both. */
906e58ca 9342
104d59d1
JM		 9343static int
9344elf32_arm_obj_attrs_arg_type (int tag)
9345{
9346 if (tag == Tag_compatibility)
3483fe2e 9347 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9348 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9349 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9350 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9351 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9352 else if (tag < 32)
3483fe2e 9353 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9354 else
3483fe2e 9355 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9356}
9357
5aa6ff7c
AS		 9358/* The ABI defines that Tag_conformance should be emitted first, and that
9359 Tag_nodefaults should be second (if either is defined). This sets those
9360 two positions, and bumps up the position of all the remaining tags to
9361 compensate. */
9362static int
9363elf32_arm_obj_attrs_order (int num)
9364{
9365 if (num == 4)
9366 return Tag_conformance;
9367 if (num == 5)
9368 return Tag_nodefaults;
9369 if ((num - 2) < Tag_nodefaults)
9370 return num - 2;
9371 if ((num - 1) < Tag_conformance)
9372 return num - 1;
9373 return num;
9374}
9375
91e22acd
AS		 9376/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9377 Returns -1 if no architecture could be read. */
9378
9379static int
9380get_secondary_compatible_arch (bfd *abfd)
9381{
9382 obj_attribute *attr =
9383 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9384
9385 /* Note: the tag and its argument below are uleb128 values, though
9386 currently-defined values fit in one byte for each. */
9387 if (attr->s
9388 && attr->s[0] == Tag_CPU_arch
9389 && (attr->s[1] & 128) != 128
9390 && attr->s[2] == 0)
9391 return attr->s[1];
9392
9393 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9394 return -1;
9395}
9396
9397/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9398 The tag is removed if ARCH is -1. */
9399
8e79c3df 9400static void
91e22acd 9401set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9402{
91e22acd
AS		 9403 obj_attribute *attr =
9404 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9405
91e22acd
AS		 9406 if (arch == -1)
9407 {
9408 attr->s = NULL;
9409 return;
8e79c3df 9410 }
91e22acd
AS		 9411
9412 /* Note: the tag and its argument below are uleb128 values, though
9413 currently-defined values fit in one byte for each. */
9414 if (!attr->s)
9415 attr->s = bfd_alloc (abfd, 3);
9416 attr->s[0] = Tag_CPU_arch;
9417 attr->s[1] = arch;
9418 attr->s[2] = '\0';
8e79c3df
CM		 9419}
9420
91e22acd
AS		 9421/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9422 into account. */
9423
9424static int
9425tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9426 int newtag, int secondary_compat)
8e79c3df 9427{
91e22acd
AS		 9428#define T(X) TAG_CPU_ARCH_##X
9429 int tagl, tagh, result;
9430 const int v6t2[] =
9431 {
9432 T(V6T2), /* PRE_V4. */
9433 T(V6T2), /* V4. */
9434 T(V6T2), /* V4T. */
9435 T(V6T2), /* V5T. */
9436 T(V6T2), /* V5TE. */
9437 T(V6T2), /* V5TEJ. */
9438 T(V6T2), /* V6. */
9439 T(V7), /* V6KZ. */
9440 T(V6T2) /* V6T2. */
9441 };
9442 const int v6k[] =
9443 {
9444 T(V6K), /* PRE_V4. */
9445 T(V6K), /* V4. */
9446 T(V6K), /* V4T. */
9447 T(V6K), /* V5T. */
9448 T(V6K), /* V5TE. */
9449 T(V6K), /* V5TEJ. */
9450 T(V6K), /* V6. */
9451 T(V6KZ), /* V6KZ. */
9452 T(V7), /* V6T2. */
9453 T(V6K) /* V6K. */
9454 };
9455 const int v7[] =
9456 {
9457 T(V7), /* PRE_V4. */
9458 T(V7), /* V4. */
9459 T(V7), /* V4T. */
9460 T(V7), /* V5T. */
9461 T(V7), /* V5TE. */
9462 T(V7), /* V5TEJ. */
9463 T(V7), /* V6. */
9464 T(V7), /* V6KZ. */
9465 T(V7), /* V6T2. */
9466 T(V7), /* V6K. */
9467 T(V7) /* V7. */
9468 };
9469 const int v6_m[] =
9470 {
9471 -1, /* PRE_V4. */
9472 -1, /* V4. */
9473 T(V6K), /* V4T. */
9474 T(V6K), /* V5T. */
9475 T(V6K), /* V5TE. */
9476 T(V6K), /* V5TEJ. */
9477 T(V6K), /* V6. */
9478 T(V6KZ), /* V6KZ. */
9479 T(V7), /* V6T2. */
9480 T(V6K), /* V6K. */
9481 T(V7), /* V7. */
9482 T(V6_M) /* V6_M. */
9483 };
9484 const int v6s_m[] =
9485 {
9486 -1, /* PRE_V4. */
9487 -1, /* V4. */
9488 T(V6K), /* V4T. */
9489 T(V6K), /* V5T. */
9490 T(V6K), /* V5TE. */
9491 T(V6K), /* V5TEJ. */
9492 T(V6K), /* V6. */
9493 T(V6KZ), /* V6KZ. */
9494 T(V7), /* V6T2. */
9495 T(V6K), /* V6K. */
9496 T(V7), /* V7. */
9497 T(V6S_M), /* V6_M. */
9498 T(V6S_M) /* V6S_M. */
9499 };
9500 const int v4t_plus_v6_m[] =
9501 {
9502 -1, /* PRE_V4. */
9503 -1, /* V4. */
9504 T(V4T), /* V4T. */
9505 T(V5T), /* V5T. */
9506 T(V5TE), /* V5TE. */
9507 T(V5TEJ), /* V5TEJ. */
9508 T(V6), /* V6. */
9509 T(V6KZ), /* V6KZ. */
9510 T(V6T2), /* V6T2. */
9511 T(V6K), /* V6K. */
9512 T(V7), /* V7. */
9513 T(V6_M), /* V6_M. */
9514 T(V6S_M), /* V6S_M. */
9515 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9516 };
9517 const int *comb[] =
9518 {
9519 v6t2,
9520 v6k,
9521 v7,
9522 v6_m,
9523 v6s_m,
9524 /* Pseudo-architecture. */
9525 v4t_plus_v6_m
9526 };
9527
9528 /* Check we've not got a higher architecture than we know about. */
9529
9530 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
9531 {
3895f852 9532 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9533 return -1;
9534 }
9535
9536 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9537
9538 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9539 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9540 oldtag = T(V4T_PLUS_V6_M);
9541
9542 /* And override the new tag if we have a Tag_also_compatible_with on the
9543 input. */
9544
9545 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9546 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9547 newtag = T(V4T_PLUS_V6_M);
9548
9549 tagl = (oldtag < newtag) ? oldtag : newtag;
9550 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9551
9552 /* Architectures before V6KZ add features monotonically. */
9553 if (tagh <= TAG_CPU_ARCH_V6KZ)
9554 return result;
9555
9556 result = comb[tagh - T(V6T2)][tagl];
9557
9558 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9559 as the canonical version. */
9560 if (result == T(V4T_PLUS_V6_M))
9561 {
9562 result = T(V4T);
9563 *secondary_compat_out = T(V6_M);
9564 }
9565 else
9566 *secondary_compat_out = -1;
9567
9568 if (result == -1)
9569 {
3895f852 9570 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9571 ibfd, oldtag, newtag);
9572 return -1;
9573 }
9574
9575 return result;
9576#undef T
8e79c3df
CM		 9577}
9578
ee065d83
PB		 9579/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9580 are conflicting attributes. */
906e58ca 9581
ee065d83
PB		 9582static bfd_boolean
9583elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9584{
104d59d1
JM		 9585 obj_attribute *in_attr;
9586 obj_attribute *out_attr;
9587 obj_attribute_list *in_list;
8e79c3df 9588 obj_attribute_list *out_list;
91e22acd 9589 obj_attribute_list **out_listp;
ee065d83
PB		 9590 /* Some tags have 0 = don't care, 1 = strong requirement,
9591 2 = weak requirement. */
91e22acd 9592 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 9593 /* For use with Tag_VFP_arch. */
9594 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 9595 int i;
91e22acd 9596 bfd_boolean result = TRUE;
ee065d83 9597
3e6b1042
DJ		 9598 /* Skip the linker stubs file. This preserves previous behavior
9599 of accepting unknown attributes in the first input file - but
9600 is that a bug? */
9601 if (ibfd->flags & BFD_LINKER_CREATED)
9602 return TRUE;
9603
104d59d1 9604 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9605 {
9606 /* This is the first object. Copy the attributes. */
104d59d1 9607 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9608
9609 /* Use the Tag_null value to indicate the attributes have been
9610 initialized. */
104d59d1 9611 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9612
ee065d83
PB		 9613 return TRUE;
9614 }
9615
104d59d1
JM		 9616 in_attr = elf_known_obj_attributes_proc (ibfd);
9617 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9618 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9619 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9620 {
8e79c3df 9621 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9622 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9623 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9624 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9625 {
9626 _bfd_error_handler
3895f852 9627 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9628 ibfd, obfd);
91e22acd 9629 result = FALSE;
ee065d83
PB		 9630 }
9631 }
9632
104d59d1 9633 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9634 {
9635 /* Merge this attribute with existing attributes. */
9636 switch (i)
9637 {
9638 case Tag_CPU_raw_name:
9639 case Tag_CPU_name:
91e22acd 9640 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9641 break;
9642
9643 case Tag_ABI_optimization_goals:
9644 case Tag_ABI_FP_optimization_goals:
9645 /* Use the first value seen. */
9646 break;
9647
9648 case Tag_CPU_arch:
91e22acd
AS		 9649 {
9650 int secondary_compat = -1, secondary_compat_out = -1;
9651 unsigned int saved_out_attr = out_attr[i].i;
9652 static const char *name_table[] = {
9653 /* These aren't real CPU names, but we can't guess
9654 that from the architecture version alone. */
9655 "Pre v4",
9656 "ARM v4",
9657 "ARM v4T",
9658 "ARM v5T",
9659 "ARM v5TE",
9660 "ARM v5TEJ",
9661 "ARM v6",
9662 "ARM v6KZ",
9663 "ARM v6T2",
9664 "ARM v6K",
9665 "ARM v7",
9666 "ARM v6-M",
9667 "ARM v6S-M"
9668 };
9669
9670 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9671 secondary_compat = get_secondary_compatible_arch (ibfd);
9672 secondary_compat_out = get_secondary_compatible_arch (obfd);
9673 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9674 &secondary_compat_out,
9675 in_attr[i].i,
9676 secondary_compat);
9677 set_secondary_compatible_arch (obfd, secondary_compat_out);
9678
9679 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9680 if (out_attr[i].i == saved_out_attr)
9681 ; /* Leave the names alone. */
9682 else if (out_attr[i].i == in_attr[i].i)
9683 {
9684 /* The output architecture has been changed to match the
9685 input architecture. Use the input names. */
9686 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9687 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9688 : NULL;
9689 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9690 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9691 : NULL;
9692 }
9693 else
9694 {
9695 out_attr[Tag_CPU_name].s = NULL;
9696 out_attr[Tag_CPU_raw_name].s = NULL;
9697 }
9698
9699 /* If we still don't have a value for Tag_CPU_name,
9700 make one up now. Tag_CPU_raw_name remains blank. */
9701 if (out_attr[Tag_CPU_name].s == NULL
9702 && out_attr[i].i < ARRAY_SIZE (name_table))
9703 out_attr[Tag_CPU_name].s =
9704 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9705 }
9706 break;
9707
ee065d83
PB		 9708 case Tag_ARM_ISA_use:
9709 case Tag_THUMB_ISA_use:
ee065d83 9710 case Tag_WMMX_arch:
91e22acd
AS		 9711 case Tag_Advanced_SIMD_arch:
9712 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9713 case Tag_ABI_FP_rounding:
ee065d83
PB		 9714 case Tag_ABI_FP_exceptions:
9715 case Tag_ABI_FP_user_exceptions:
9716 case Tag_ABI_FP_number_model:
91e22acd
AS		 9717 case Tag_VFP_HP_extension:
9718 case Tag_CPU_unaligned_access:
9719 case Tag_T2EE_use:
9720 case Tag_Virtualization_use:
9721 case Tag_MPextension_use:
ee065d83
PB		 9722 /* Use the largest value specified. */
9723 if (in_attr[i].i > out_attr[i].i)
9724 out_attr[i].i = in_attr[i].i;
9725 break;
9726
91e22acd
AS		 9727 case Tag_ABI_align8_preserved:
9728 case Tag_ABI_PCS_RO_data:
9729 /* Use the smallest value specified. */
9730 if (in_attr[i].i < out_attr[i].i)
9731 out_attr[i].i = in_attr[i].i;
9732 break;
9733
9734 case Tag_ABI_align8_needed:
9735 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9736 && (in_attr[Tag_ABI_align8_preserved].i == 0
9737 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9738 {
91e22acd
AS		 9739 /* This error message should be enabled once all non-conformant
9740 binaries in the toolchain have had the attributes set
9741 properly.
ee065d83 9742 _bfd_error_handler
3895f852 9743 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9744 obfd, ibfd);
9745 result = FALSE; */
ee065d83 9746 }
91e22acd
AS		 9747 /* Fall through. */
9748 case Tag_ABI_FP_denormal:
9749 case Tag_ABI_PCS_GOT_use:
9750 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9751 value if greater than 2 (for future-proofing). */
9752 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9753 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9754 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9755 out_attr[i].i = in_attr[i].i;
9756 break;
91e22acd
AS		 9757
9758
9759 case Tag_CPU_arch_profile:
9760 if (out_attr[i].i != in_attr[i].i)
9761 {
9762 /* 0 will merge with anything.
9763 'A' and 'S' merge to 'A'.
9764 'R' and 'S' merge to 'R'.
9765 'M' and 'A|R|S' is an error. */
9766 if (out_attr[i].i == 0
9767 || (out_attr[i].i == 'S'
9768 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9769 out_attr[i].i = in_attr[i].i;
9770 else if (in_attr[i].i == 0
9771 || (in_attr[i].i == 'S'
9772 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9773 ; /* Do nothing. */
9774 else
9775 {
9776 _bfd_error_handler
3895f852 9777 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9778 ibfd,
9779 in_attr[i].i ? in_attr[i].i : '0',
9780 out_attr[i].i ? out_attr[i].i : '0');
9781 result = FALSE;
9782 }
9783 }
9784 break;
b1cc4aeb 9785 case Tag_VFP_arch:
91e22acd
AS		 9786 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9787 largest value if greater than 4 (for future-proofing). */
9788 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9789 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9790 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9791 out_attr[i].i = in_attr[i].i;
9792 break;
ee065d83
PB		 9793 case Tag_PCS_config:
9794 if (out_attr[i].i == 0)
9795 out_attr[i].i = in_attr[i].i;
9796 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9797 {
9798 /* It's sometimes ok to mix different configs, so this is only
9799 a warning. */
9800 _bfd_error_handler
9801 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9802 }
9803 break;
9804 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9805 if (in_attr[i].i != out_attr[i].i
9806 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9807 && in_attr[i].i != AEABI_R9_unused)
9808 {
9809 _bfd_error_handler
3895f852 9810 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9811 result = FALSE;
ee065d83
PB		 9812 }
9813 if (out_attr[i].i == AEABI_R9_unused)
9814 out_attr[i].i = in_attr[i].i;
9815 break;
9816 case Tag_ABI_PCS_RW_data:
9817 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9818 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9819 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9820 {
9821 _bfd_error_handler
3895f852 9822 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9823 ibfd);
91e22acd 9824 result = FALSE;
ee065d83
PB		 9825 }
9826 /* Use the smallest value specified. */
9827 if (in_attr[i].i < out_attr[i].i)
9828 out_attr[i].i = in_attr[i].i;
9829 break;
ee065d83 9830 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9831 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9832 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9833 {
9834 _bfd_error_handler
a9dc9481
JM		 9835 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9836 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9837 }
a9dc9481 9838 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9839 out_attr[i].i = in_attr[i].i;
9840 break;
ee065d83
PB		 9841 case Tag_ABI_enum_size:
9842 if (in_attr[i].i != AEABI_enum_unused)
9843 {
9844 if (out_attr[i].i == AEABI_enum_unused
9845 || out_attr[i].i == AEABI_enum_forced_wide)
9846 {
9847 /* The existing object is compatible with anything.
9848 Use whatever requirements the new object has. */
9849 out_attr[i].i = in_attr[i].i;
9850 }
9851 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9852 && out_attr[i].i != in_attr[i].i
0ffa91dd 9853 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9854 {
91e22acd 9855 static const char *aeabi_enum_names[] =
bf21ed78 9856 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9857 const char *in_name =
9858 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9859 ? aeabi_enum_names[in_attr[i].i]
9860 : "<unknown>";
9861 const char *out_name =
9862 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9863 ? aeabi_enum_names[out_attr[i].i]
9864 : "<unknown>";
ee065d83 9865 _bfd_error_handler
bf21ed78 9866 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9867 ibfd, in_name, out_name);
ee065d83
PB		 9868 }
9869 }
9870 break;
9871 case Tag_ABI_VFP_args:
9872 /* Aready done. */
9873 break;
9874 case Tag_ABI_WMMX_args:
9875 if (in_attr[i].i != out_attr[i].i)
9876 {
9877 _bfd_error_handler
3895f852 9878 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9879 ibfd, obfd);
91e22acd 9880 result = FALSE;
ee065d83
PB		 9881 }
9882 break;
7b86a9fa
AS		 9883 case Tag_compatibility:
9884 /* Merged in target-independent code. */
9885 break;
91e22acd
AS		 9886 case Tag_ABI_HardFP_use:
9887 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
9888 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
9889 || (in_attr[i].i == 2 && out_attr[i].i == 1))
9890 out_attr[i].i = 3;
9891 else if (in_attr[i].i > out_attr[i].i)
9892 out_attr[i].i = in_attr[i].i;
9893 break;
9894 case Tag_ABI_FP_16bit_format:
9895 if (in_attr[i].i != 0 && out_attr[i].i != 0)
9896 {
9897 if (in_attr[i].i != out_attr[i].i)
9898 {
9899 _bfd_error_handler
3895f852 9900 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 9901 ibfd, obfd);
9902 result = FALSE;
9903 }
9904 }
9905 if (in_attr[i].i != 0)
9906 out_attr[i].i = in_attr[i].i;
9907 break;
7b86a9fa 9908
91e22acd 9909 case Tag_nodefaults:
2d0bb761
AS		 9910 /* This tag is set if it exists, but the value is unused (and is
9911 typically zero). We don't actually need to do anything here -
9912 the merge happens automatically when the type flags are merged
9913 below. */
91e22acd
AS		 9914 break;
9915 case Tag_also_compatible_with:
9916 /* Already done in Tag_CPU_arch. */
9917 break;
9918 case Tag_conformance:
9919 /* Keep the attribute if it matches. Throw it away otherwise.
9920 No attribute means no claim to conform. */
9921 if (!in_attr[i].s || !out_attr[i].s
9922 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
9923 out_attr[i].s = NULL;
9924 break;
3cfad14c 9925
91e22acd 9926 default:
3cfad14c 9927 {
91e22acd
AS		 9928 bfd *err_bfd = NULL;
9929
9930 /* The "known_obj_attributes" table does contain some undefined
9931 attributes. Ensure that there are unused. */
9932 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
9933 err_bfd = obfd;
9934 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
9935 err_bfd = ibfd;
9936
9937 if (err_bfd != NULL)
9938 {
9939 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9940 if ((i & 127) < 64)
9941 {
9942 _bfd_error_handler
9943 (_("%B: Unknown mandatory EABI object attribute %d"),
9944 err_bfd, i);
9945 bfd_set_error (bfd_error_bad_value);
9946 result = FALSE;
9947 }
9948 else
9949 {
9950 _bfd_error_handler
9951 (_("Warning: %B: Unknown EABI object attribute %d"),
9952 err_bfd, i);
9953 }
9954 }
9955
9956 /* Only pass on attributes that match in both inputs. */
9957 if (in_attr[i].i != out_attr[i].i
9958 || in_attr[i].s != out_attr[i].s
9959 || (in_attr[i].s != NULL && out_attr[i].s != NULL
9960 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
9961 {
9962 out_attr[i].i = 0;
9963 out_attr[i].s = NULL;
9964 }
3cfad14c 9965 }
91e22acd
AS		 9966 }
9967
9968 /* If out_attr was copied from in_attr then it won't have a type yet. */
9969 if (in_attr[i].type && !out_attr[i].type)
9970 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 9971 }
9972
104d59d1
JM		 9973 /* Merge Tag_compatibility attributes and any common GNU ones. */
9974 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 9975
104d59d1
JM		 9976 /* Check for any attributes not known on ARM. */
9977 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 9978 out_listp = &elf_other_obj_attributes_proc (obfd);
9979 out_list = *out_listp;
8e79c3df 9980
91e22acd 9981 for (; in_list || out_list; )
ee065d83 9982 {
91e22acd
AS		 9983 bfd *err_bfd = NULL;
9984 int err_tag = 0;
8e79c3df
CM		 9985
9986 /* The tags for each list are in numerical order. */
9987 /* If the tags are equal, then merge. */
91e22acd 9988 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 9989 {
91e22acd
AS		 9990 /* This attribute only exists in obfd. We can't merge, and we don't
9991 know what the tag means, so delete it. */
9992 err_bfd = obfd;
9993 err_tag = out_list->tag;
9994 *out_listp = out_list->next;
9995 out_list = *out_listp;
8e79c3df 9996 }
91e22acd 9997 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 9998 {
91e22acd
AS		 9999 /* This attribute only exists in ibfd. We can't merge, and we don't
10000 know what the tag means, so ignore it. */
10001 err_bfd = ibfd;
10002 err_tag = in_list->tag;
8e79c3df 10003 in_list = in_list->next;
eb111b1f 10004 }
91e22acd
AS		 10005 else /* The tags are equal. */
10006 {
10007 /* As present, all attributes in the list are unknown, and
10008 therefore can't be merged meaningfully. */
10009 err_bfd = obfd;
10010 err_tag = out_list->tag;
10011
10012 /* Only pass on attributes that match in both inputs. */
10013 if (in_list->attr.i != out_list->attr.i
10014 || in_list->attr.s != out_list->attr.s
10015 || (in_list->attr.s && out_list->attr.s
10016 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10017 {
10018 /* No match. Delete the attribute. */
10019 *out_listp = out_list->next;
10020 out_list = *out_listp;
10021 }
10022 else
10023 {
10024 /* Matched. Keep the attribute and move to the next. */
10025 out_list = out_list->next;
10026 in_list = in_list->next;
10027 }
10028 }
10029
10030 if (err_bfd)
10031 {
10032 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10033 if ((err_tag & 127) < 64)
10034 {
10035 _bfd_error_handler
10036 (_("%B: Unknown mandatory EABI object attribute %d"),
10037 err_bfd, err_tag);
10038 bfd_set_error (bfd_error_bad_value);
10039 result = FALSE;
10040 }
10041 else
10042 {
10043 _bfd_error_handler
10044 (_("Warning: %B: Unknown EABI object attribute %d"),
10045 err_bfd, err_tag);
10046 }
10047 }
ee065d83 10048 }
91e22acd 10049 return result;
252b5132
RH		 10050}
10051
3a4a14e9
PB		 10052
10053/* Return TRUE if the two EABI versions are incompatible. */
10054
10055static bfd_boolean
10056elf32_arm_versions_compatible (unsigned iver, unsigned over)
10057{
10058 /* v4 and v5 are the same spec before and after it was released,
10059 so allow mixing them. */
10060 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10061 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10062 return TRUE;
10063
10064 return (iver == over);
10065}
10066
252b5132
RH		 10067/* Merge backend specific data from an object file to the output
10068 object file when linking. */
9b485d32 10069
b34976b6 10070static bfd_boolean
57e8b36a 10071elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 10072{
10073 flagword out_flags;
10074 flagword in_flags;
b34976b6 10075 bfd_boolean flags_compatible = TRUE;
cf919dfd 10076 asection *sec;
252b5132 10077
9b485d32 10078 /* Check if we have the same endianess. */
82e51918 10079 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 10080 return FALSE;
1fe494a5 10081
0ffa91dd 10082 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10083 return TRUE;
252b5132 10084
ee065d83
PB		 10085 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
10086 return FALSE;
10087
252b5132
RH		 10088 /* The input BFD must have had its flags initialised. */
10089 /* The following seems bogus to me -- The flags are initialized in
10090 the assembler but I don't think an elf_flags_init field is
9b485d32 10091 written into the object. */
252b5132
RH		 10092 /* BFD_ASSERT (elf_flags_init (ibfd)); */
10093
10094 in_flags = elf_elfheader (ibfd)->e_flags;
10095 out_flags = elf_elfheader (obfd)->e_flags;
10096
23684067
PB		 10097 /* In theory there is no reason why we couldn't handle this. However
10098 in practice it isn't even close to working and there is no real
10099 reason to want it. */
10100 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 10101 && !(ibfd->flags & DYNAMIC)
23684067
PB		 10102 && (in_flags & EF_ARM_BE8))
10103 {
3895f852 10104 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 10105 ibfd);
10106 return FALSE;
10107 }
10108
252b5132
RH		 10109 if (!elf_flags_init (obfd))
10110 {
fe077fa6
NC		 10111 /* If the input is the default architecture and had the default
10112 flags then do not bother setting the flags for the output
10113 architecture, instead allow future merges to do this. If no
10114 future merges ever set these flags then they will retain their
10115 uninitialised values, which surprise surprise, correspond
252b5132 10116 to the default values. */
fe077fa6
NC		 10117 if (bfd_get_arch_info (ibfd)->the_default
10118 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 10119 return TRUE;
252b5132 10120
b34976b6 10121 elf_flags_init (obfd) = TRUE;
252b5132
RH		 10122 elf_elfheader (obfd)->e_flags = in_flags;
10123
10124 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
10125 && bfd_get_arch_info (obfd)->the_default)
10126 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
10127
b34976b6 10128 return TRUE;
252b5132
RH		 10129 }
10130
5a6c6817
NC		 10131 /* Determine what should happen if the input ARM architecture
10132 does not match the output ARM architecture. */
10133 if (! bfd_arm_merge_machines (ibfd, obfd))
10134 return FALSE;
e16bb312 10135
1006ba19 10136 /* Identical flags must be compatible. */
252b5132 10137 if (in_flags == out_flags)
b34976b6 10138 return TRUE;
252b5132 10139
35a0f415
DJ		 10140 /* Check to see if the input BFD actually contains any sections. If
10141 not, its flags may not have been initialised either, but it
8e3de13a 10142 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 10143 dynamic objects; their section list may be emptied by
d1f161ea 10144 elf_link_add_object_symbols.
35a0f415 10145
d1f161ea
NC		 10146 Also check to see if there are no code sections in the input.
10147 In this case there is no need to check for code specific flags.
10148 XXX - do we need to worry about floating-point format compatability
10149 in data sections ? */
35a0f415 10150 if (!(ibfd->flags & DYNAMIC))
cf919dfd 10151 {
35a0f415 10152 bfd_boolean null_input_bfd = TRUE;
d1f161ea 10153 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 10154
10155 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 10156 {
35a0f415
DJ		 10157 /* Ignore synthetic glue sections. */
10158 if (strcmp (sec->name, ".glue_7")
10159 && strcmp (sec->name, ".glue_7t"))
10160 {
d1f161ea
NC		 10161 if ((bfd_get_section_flags (ibfd, sec)
10162 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10163 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10164 only_data_sections = FALSE;
10165
35a0f415
DJ		 10166 null_input_bfd = FALSE;
10167 break;
10168 }
cf919dfd 10169 }
d1f161ea
NC		 10170
10171 if (null_input_bfd || only_data_sections)
35a0f415 10172 return TRUE;
cf919dfd 10173 }
cf919dfd 10174
252b5132 10175 /* Complain about various flag mismatches. */
3a4a14e9
PB		 10176 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
10177 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 10178 {
d003868e 10179 _bfd_error_handler
3895f852 10180 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 10181 ibfd, obfd,
10182 (in_flags & EF_ARM_EABIMASK) >> 24,
10183 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 10184 return FALSE;
fc830a83 10185 }
252b5132 10186
1006ba19 10187 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 10188 /* VxWorks libraries do not use these flags. */
10189 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
10190 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
10191 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 10192 {
fd2ec330 10193 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 10194 {
d003868e 10195 _bfd_error_handler
3895f852 10196 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 10197 ibfd, obfd,
10198 in_flags & EF_ARM_APCS_26 ? 26 : 32,
10199 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 10200 flags_compatible = FALSE;
1006ba19 10201 }
252b5132 10202
fd2ec330 10203 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 10204 {
5eefb65f 10205 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 10206 _bfd_error_handler
3895f852 10207 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 10208 ibfd, obfd);
5eefb65f 10209 else
d003868e 10210 _bfd_error_handler
3895f852 10211 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 10212 ibfd, obfd);
63b0f745 10213
b34976b6 10214 flags_compatible = FALSE;
1006ba19 10215 }
252b5132 10216
96a846ea 10217 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 10218 {
96a846ea 10219 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 10220 _bfd_error_handler
3895f852 10221 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 10222 ibfd, obfd);
5eefb65f 10223 else
d003868e 10224 _bfd_error_handler
3895f852 10225 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 10226 ibfd, obfd);
fde78edd
NC		 10227
10228 flags_compatible = FALSE;
10229 }
10230
10231 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
10232 {
10233 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 10234 _bfd_error_handler
3895f852 10235 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 10236 ibfd, obfd);
fde78edd 10237 else
d003868e 10238 _bfd_error_handler
3895f852 10239 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 10240 ibfd, obfd);
63b0f745 10241
b34976b6 10242 flags_compatible = FALSE;
1006ba19 10243 }
96a846ea
RE		 10244
10245#ifdef EF_ARM_SOFT_FLOAT
10246 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
10247 {
10248 /* We can allow interworking between code that is VFP format
10249 layout, and uses either soft float or integer regs for
10250 passing floating point arguments and results. We already
10251 know that the APCS_FLOAT flags match; similarly for VFP
10252 flags. */
10253 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
10254 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
10255 {
10256 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 10257 _bfd_error_handler
3895f852 10258 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 10259 ibfd, obfd);
96a846ea 10260 else
d003868e 10261 _bfd_error_handler
3895f852 10262 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 10263 ibfd, obfd);
96a846ea 10264
b34976b6 10265 flags_compatible = FALSE;
96a846ea
RE		 10266 }
10267 }
ee43f35e 10268#endif
252b5132 10269
1006ba19 10270 /* Interworking mismatch is only a warning. */
fd2ec330 10271 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 10272 {
e3c8793a
NC		 10273 if (in_flags & EF_ARM_INTERWORK)
10274 {
d003868e
AM		 10275 _bfd_error_handler
10276 (_("Warning: %B supports interworking, whereas %B does not"),
10277 ibfd, obfd);
e3c8793a
NC		 10278 }
10279 else
10280 {
d003868e
AM		 10281 _bfd_error_handler
10282 (_("Warning: %B does not support interworking, whereas %B does"),
10283 ibfd, obfd);
e3c8793a 10284 }
8f615d07 10285 }
252b5132 10286 }
63b0f745 10287
1006ba19 10288 return flags_compatible;
252b5132
RH		 10289}
10290
9b485d32
NC		 10291/* Display the flags field. */
10292
b34976b6 10293static bfd_boolean
57e8b36a 10294elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10295{
fc830a83
NC		 10296 FILE * file = (FILE *) ptr;
10297 unsigned long flags;
252b5132
RH		 10298
10299 BFD_ASSERT (abfd != NULL && ptr != NULL);
10300
10301 /* Print normal ELF private data. */
10302 _bfd_elf_print_private_bfd_data (abfd, ptr);
10303
fc830a83 10304 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10305 /* Ignore init flag - it may not be set, despite the flags field
10306 containing valid data. */
252b5132
RH		 10307
10308 /* xgettext:c-format */
9b485d32 10309 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10310
fc830a83
NC		 10311 switch (EF_ARM_EABI_VERSION (flags))
10312 {
10313 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10314 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10315 official ARM ELF extended ABI. Hence they are only decoded if
10316 the EABI version is not set. */
fd2ec330 10317 if (flags & EF_ARM_INTERWORK)
9b485d32 10318 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10319
fd2ec330 10320 if (flags & EF_ARM_APCS_26)
6c571f00 10321 fprintf (file, " [APCS-26]");
fc830a83 10322 else
6c571f00 10323 fprintf (file, " [APCS-32]");
9a5aca8c 10324
96a846ea
RE		 10325 if (flags & EF_ARM_VFP_FLOAT)
10326 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10327 else if (flags & EF_ARM_MAVERICK_FLOAT)
10328 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10329 else
10330 fprintf (file, _(" [FPA float format]"));
10331
fd2ec330 10332 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10333 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10334
fd2ec330 10335 if (flags & EF_ARM_PIC)
9b485d32 10336 fprintf (file, _(" [position independent]"));
fc830a83 10337
fd2ec330 10338 if (flags & EF_ARM_NEW_ABI)
9b485d32 10339 fprintf (file, _(" [new ABI]"));
9a5aca8c 10340
fd2ec330 10341 if (flags & EF_ARM_OLD_ABI)
9b485d32 10342 fprintf (file, _(" [old ABI]"));
9a5aca8c 10343
fd2ec330 10344 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10345 fprintf (file, _(" [software FP]"));
9a5aca8c 10346
96a846ea
RE		 10347 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10348 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10349 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10350 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10351 break;
9a5aca8c 10352
fc830a83 10353 case EF_ARM_EABI_VER1:
9b485d32 10354 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10355
fc830a83 10356 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10357 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10358 else
9b485d32 10359 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10360
fc830a83
NC		 10361 flags &= ~ EF_ARM_SYMSARESORTED;
10362 break;
9a5aca8c 10363
fd2ec330
PB		 10364 case EF_ARM_EABI_VER2:
10365 fprintf (file, _(" [Version2 EABI]"));
10366
10367 if (flags & EF_ARM_SYMSARESORTED)
10368 fprintf (file, _(" [sorted symbol table]"));
10369 else
10370 fprintf (file, _(" [unsorted symbol table]"));
10371
10372 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10373 fprintf (file, _(" [dynamic symbols use segment index]"));
10374
10375 if (flags & EF_ARM_MAPSYMSFIRST)
10376 fprintf (file, _(" [mapping symbols precede others]"));
10377
99e4ae17 10378 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10379 | EF_ARM_MAPSYMSFIRST);
10380 break;
10381
d507cf36
PB		 10382 case EF_ARM_EABI_VER3:
10383 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10384 break;
10385
10386 case EF_ARM_EABI_VER4:
10387 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10388 goto eabi;
d507cf36 10389
3a4a14e9
PB		 10390 case EF_ARM_EABI_VER5:
10391 fprintf (file, _(" [Version5 EABI]"));
10392 eabi:
d507cf36
PB		 10393 if (flags & EF_ARM_BE8)
10394 fprintf (file, _(" [BE8]"));
10395
10396 if (flags & EF_ARM_LE8)
10397 fprintf (file, _(" [LE8]"));
10398
10399 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10400 break;
10401
fc830a83 10402 default:
9b485d32 10403 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10404 break;
10405 }
252b5132 10406
fc830a83 10407 flags &= ~ EF_ARM_EABIMASK;
252b5132 10408
fc830a83 10409 if (flags & EF_ARM_RELEXEC)
9b485d32 10410 fprintf (file, _(" [relocatable executable]"));
252b5132 10411
fc830a83 10412 if (flags & EF_ARM_HASENTRY)
9b485d32 10413 fprintf (file, _(" [has entry point]"));
252b5132 10414
fc830a83
NC		 10415 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10416
10417 if (flags)
9b485d32 10418 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10419
252b5132
RH		 10420 fputc ('\n', file);
10421
b34976b6 10422 return TRUE;
252b5132
RH		 10423}
10424
10425static int
57e8b36a 10426elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10427{
2f0ca46a
NC		 10428 switch (ELF_ST_TYPE (elf_sym->st_info))
10429 {
10430 case STT_ARM_TFUNC:
10431 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10432
2f0ca46a
NC		 10433 case STT_ARM_16BIT:
10434 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10435 This allows us to distinguish between data used by Thumb instructions
10436 and non-data (which is probably code) inside Thumb regions of an
10437 executable. */
1a0eb693 10438 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10439 return ELF_ST_TYPE (elf_sym->st_info);
10440 break;
9a5aca8c 10441
ce855c42
NC		 10442 default:
10443 break;
2f0ca46a
NC		 10444 }
10445
10446 return type;
252b5132 10447}
f21f3fe0 10448
252b5132 10449static asection *
07adf181
AM		 10450elf32_arm_gc_mark_hook (asection *sec,
10451 struct bfd_link_info *info,
10452 Elf_Internal_Rela *rel,
10453 struct elf_link_hash_entry *h,
10454 Elf_Internal_Sym *sym)
252b5132
RH		 10455{
10456 if (h != NULL)
07adf181 10457 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10458 {
10459 case R_ARM_GNU_VTINHERIT:
10460 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10461 return NULL;
10462 }
9ad5cbcf 10463
07adf181 10464 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10465}
10466
780a67af
NC		 10467/* Update the got entry reference counts for the section being removed. */
10468
b34976b6 10469static bfd_boolean
ba93b8ac
DJ		 10470elf32_arm_gc_sweep_hook (bfd * abfd,
10471 struct bfd_link_info * info,
10472 asection * sec,
10473 const Elf_Internal_Rela * relocs)
252b5132 10474{
5e681ec4
PB		 10475 Elf_Internal_Shdr *symtab_hdr;
10476 struct elf_link_hash_entry **sym_hashes;
10477 bfd_signed_vma *local_got_refcounts;
10478 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10479 struct elf32_arm_link_hash_table * globals;
10480
7dda2462
TG		 10481 if (info->relocatable)
10482 return TRUE;
10483
eb043451 10484 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10485
10486 elf_section_data (sec)->local_dynrel = NULL;
10487
0ffa91dd 10488 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10489 sym_hashes = elf_sym_hashes (abfd);
10490 local_got_refcounts = elf_local_got_refcounts (abfd);
10491
906e58ca 10492 check_use_blx (globals);
bd97cb95 10493
5e681ec4
PB		 10494 relend = relocs + sec->reloc_count;
10495 for (rel = relocs; rel < relend; rel++)
eb043451 10496 {
3eb128b2
AM		 10497 unsigned long r_symndx;
10498 struct elf_link_hash_entry *h = NULL;
eb043451 10499 int r_type;
5e681ec4 10500
3eb128b2
AM		 10501 r_symndx = ELF32_R_SYM (rel->r_info);
10502 if (r_symndx >= symtab_hdr->sh_info)
10503 {
10504 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10505 while (h->root.type == bfd_link_hash_indirect
10506 || h->root.type == bfd_link_hash_warning)
10507 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10508 }
10509
eb043451 10510 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10511 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10512 switch (r_type)
10513 {
10514 case R_ARM_GOT32:
eb043451 10515 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10516 case R_ARM_TLS_GD32:
10517 case R_ARM_TLS_IE32:
3eb128b2 10518 if (h != NULL)
eb043451 10519 {
eb043451
PB		 10520 if (h->got.refcount > 0)
10521 h->got.refcount -= 1;
10522 }
10523 else if (local_got_refcounts != NULL)
10524 {
10525 if (local_got_refcounts[r_symndx] > 0)
10526 local_got_refcounts[r_symndx] -= 1;
10527 }
10528 break;
10529
ba93b8ac
DJ		 10530 case R_ARM_TLS_LDM32:
10531 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10532 break;
10533
eb043451 10534 case R_ARM_ABS32:
bb224fc3 10535 case R_ARM_ABS32_NOI:
eb043451 10536 case R_ARM_REL32:
bb224fc3 10537 case R_ARM_REL32_NOI:
eb043451
PB		 10538 case R_ARM_PC24:
10539 case R_ARM_PLT32:
5b5bb741
PB		 10540 case R_ARM_CALL:
10541 case R_ARM_JUMP24:
eb043451 10542 case R_ARM_PREL31:
c19d1205 10543 case R_ARM_THM_CALL:
bd97cb95
DJ		 10544 case R_ARM_THM_JUMP24:
10545 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10546 case R_ARM_MOVW_ABS_NC:
10547 case R_ARM_MOVT_ABS:
10548 case R_ARM_MOVW_PREL_NC:
10549 case R_ARM_MOVT_PREL:
10550 case R_ARM_THM_MOVW_ABS_NC:
10551 case R_ARM_THM_MOVT_ABS:
10552 case R_ARM_THM_MOVW_PREL_NC:
10553 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10554 /* Should the interworking branches be here also? */
10555
3eb128b2 10556 if (h != NULL)
eb043451
PB		 10557 {
10558 struct elf32_arm_link_hash_entry *eh;
10559 struct elf32_arm_relocs_copied **pp;
10560 struct elf32_arm_relocs_copied *p;
5e681ec4 10561
b7693d02 10562 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10563
eb043451 10564 if (h->plt.refcount > 0)
b7693d02
DJ		 10565 {
10566 h->plt.refcount -= 1;
bd97cb95
DJ		 10567 if (r_type == R_ARM_THM_CALL)
10568 eh->plt_maybe_thumb_refcount--;
10569
10570 if (r_type == R_ARM_THM_JUMP24
10571 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10572 eh->plt_thumb_refcount--;
10573 }
5e681ec4 10574
eb043451 10575 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10576 || r_type == R_ARM_REL32
10577 || r_type == R_ARM_ABS32_NOI
10578 || r_type == R_ARM_REL32_NOI)
eb043451 10579 {
eb043451
PB		 10580 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10581 pp = &p->next)
10582 if (p->section == sec)
10583 {
10584 p->count -= 1;
bb224fc3
MS		 10585 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10586 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10587 p->pc_count -= 1;
eb043451
PB		 10588 if (p->count == 0)
10589 *pp = p->next;
10590 break;
10591 }
10592 }
10593 }
10594 break;
5e681ec4 10595
eb043451
PB		 10596 default:
10597 break;
10598 }
10599 }
5e681ec4 10600
b34976b6 10601 return TRUE;
252b5132
RH		 10602}
10603
780a67af
NC		 10604/* Look through the relocs for a section during the first phase. */
10605
b34976b6 10606static bfd_boolean
57e8b36a
NC		 10607elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10608 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10609{
b34976b6
AM		 10610 Elf_Internal_Shdr *symtab_hdr;
10611 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10612 const Elf_Internal_Rela *rel;
10613 const Elf_Internal_Rela *rel_end;
10614 bfd *dynobj;
5e681ec4 10615 asection *sreloc;
b34976b6 10616 bfd_vma *local_got_offsets;
5e681ec4 10617 struct elf32_arm_link_hash_table *htab;
39623e12 10618 bfd_boolean needs_plt;
ce98a316 10619 unsigned long nsyms;
9a5aca8c 10620
1049f94e 10621 if (info->relocatable)
b34976b6 10622 return TRUE;
9a5aca8c 10623
0ffa91dd
NC		 10624 BFD_ASSERT (is_arm_elf (abfd));
10625
5e681ec4
PB		 10626 htab = elf32_arm_hash_table (info);
10627 sreloc = NULL;
9a5aca8c 10628
67687978
PB		 10629 /* Create dynamic sections for relocatable executables so that we can
10630 copy relocations. */
10631 if (htab->root.is_relocatable_executable
10632 && ! htab->root.dynamic_sections_created)
10633 {
10634 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10635 return FALSE;
10636 }
10637
252b5132
RH		 10638 dynobj = elf_hash_table (info)->dynobj;
10639 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10640
0ffa91dd 10641 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10642 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10643 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10644
252b5132
RH		 10645 rel_end = relocs + sec->reloc_count;
10646 for (rel = relocs; rel < rel_end; rel++)
10647 {
10648 struct elf_link_hash_entry *h;
b7693d02 10649 struct elf32_arm_link_hash_entry *eh;
252b5132 10650 unsigned long r_symndx;
eb043451 10651 int r_type;
9a5aca8c 10652
252b5132 10653 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10654 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10655 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10656
ce98a316
NC		 10657 if (r_symndx >= nsyms
10658 /* PR 9934: It is possible to have relocations that do not
10659 refer to symbols, thus it is also possible to have an
10660 object file containing relocations but no symbol table. */
10661 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10662 {
10663 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10664 r_symndx);
ba93b8ac
DJ		 10665 return FALSE;
10666 }
10667
ce98a316 10668 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10669 h = NULL;
10670 else
973a3492
L		 10671 {
10672 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10673 while (h->root.type == bfd_link_hash_indirect
10674 || h->root.type == bfd_link_hash_warning)
10675 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10676 }
9a5aca8c 10677
b7693d02
DJ		 10678 eh = (struct elf32_arm_link_hash_entry *) h;
10679
eb043451 10680 switch (r_type)
252b5132 10681 {
5e681ec4 10682 case R_ARM_GOT32:
eb043451 10683 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10684 case R_ARM_TLS_GD32:
10685 case R_ARM_TLS_IE32:
5e681ec4 10686 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10687 {
10688 int tls_type, old_tls_type;
5e681ec4 10689
ba93b8ac
DJ		 10690 switch (r_type)
10691 {
10692 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10693 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10694 default: tls_type = GOT_NORMAL; break;
10695 }
252b5132 10696
ba93b8ac
DJ		 10697 if (h != NULL)
10698 {
10699 h->got.refcount++;
10700 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10701 }
10702 else
10703 {
10704 bfd_signed_vma *local_got_refcounts;
10705
10706 /* This is a global offset table entry for a local symbol. */
10707 local_got_refcounts = elf_local_got_refcounts (abfd);
10708 if (local_got_refcounts == NULL)
10709 {
10710 bfd_size_type size;
906e58ca 10711
ba93b8ac 10712 size = symtab_hdr->sh_info;
906e58ca 10713 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 10714 local_got_refcounts = bfd_zalloc (abfd, size);
10715 if (local_got_refcounts == NULL)
10716 return FALSE;
10717 elf_local_got_refcounts (abfd) = local_got_refcounts;
10718 elf32_arm_local_got_tls_type (abfd)
10719 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10720 }
10721 local_got_refcounts[r_symndx] += 1;
10722 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10723 }
10724
10725 /* We will already have issued an error message if there is a
10726 TLS / non-TLS mismatch, based on the symbol type. We don't
10727 support any linker relaxations. So just combine any TLS
10728 types needed. */
10729 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10730 && tls_type != GOT_NORMAL)
10731 tls_type |= old_tls_type;
10732
10733 if (old_tls_type != tls_type)
10734 {
10735 if (h != NULL)
10736 elf32_arm_hash_entry (h)->tls_type = tls_type;
10737 else
10738 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10739 }
10740 }
8029a119 10741 /* Fall through. */
ba93b8ac
DJ		 10742
10743 case R_ARM_TLS_LDM32:
10744 if (r_type == R_ARM_TLS_LDM32)
10745 htab->tls_ldm_got.refcount++;
8029a119 10746 /* Fall through. */
252b5132 10747
c19d1205 10748 case R_ARM_GOTOFF32:
5e681ec4
PB		 10749 case R_ARM_GOTPC:
10750 if (htab->sgot == NULL)
10751 {
10752 if (htab->root.dynobj == NULL)
10753 htab->root.dynobj = abfd;
10754 if (!create_got_section (htab->root.dynobj, info))
10755 return FALSE;
10756 }
252b5132
RH		 10757 break;
10758
00a97672
RS		 10759 case R_ARM_ABS12:
10760 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10761 ldr __GOTT_INDEX__ offsets. */
10762 if (!htab->vxworks_p)
10763 break;
8029a119 10764 /* Fall through. */
00a97672 10765
252b5132 10766 case R_ARM_PC24:
7359ea65 10767 case R_ARM_PLT32:
5b5bb741
PB		 10768 case R_ARM_CALL:
10769 case R_ARM_JUMP24:
eb043451 10770 case R_ARM_PREL31:
c19d1205 10771 case R_ARM_THM_CALL:
bd97cb95
DJ		 10772 case R_ARM_THM_JUMP24:
10773 case R_ARM_THM_JUMP19:
39623e12
PB		 10774 needs_plt = 1;
10775 goto normal_reloc;
10776
96c23d59
JM		 10777 case R_ARM_MOVW_ABS_NC:
10778 case R_ARM_MOVT_ABS:
10779 case R_ARM_THM_MOVW_ABS_NC:
10780 case R_ARM_THM_MOVT_ABS:
10781 if (info->shared)
10782 {
10783 (*_bfd_error_handler)
10784 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10785 abfd, elf32_arm_howto_table_1[r_type].name,
10786 (h) ? h->root.root.string : "a local symbol");
10787 bfd_set_error (bfd_error_bad_value);
10788 return FALSE;
10789 }
10790
10791 /* Fall through. */
39623e12
PB		 10792 case R_ARM_ABS32:
10793 case R_ARM_ABS32_NOI:
10794 case R_ARM_REL32:
10795 case R_ARM_REL32_NOI:
b6895b4f
PB		 10796 case R_ARM_MOVW_PREL_NC:
10797 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10798 case R_ARM_THM_MOVW_PREL_NC:
10799 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10800 needs_plt = 0;
10801 normal_reloc:
10802
b7693d02 10803 /* Should the interworking branches be listed here? */
7359ea65 10804 if (h != NULL)
5e681ec4
PB		 10805 {
10806 /* If this reloc is in a read-only section, we might
10807 need a copy reloc. We can't check reliably at this
10808 stage whether the section is read-only, as input
10809 sections have not yet been mapped to output sections.
10810 Tentatively set the flag for now, and correct in
10811 adjust_dynamic_symbol. */
7359ea65 10812 if (!info->shared)
f5385ebf 10813 h->non_got_ref = 1;
7359ea65 10814
5e681ec4 10815 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10816 refers to is in a different object. We can't tell for
10817 sure yet, because something later might force the
10818 symbol local. */
39623e12 10819 if (needs_plt)
f5385ebf 10820 h->needs_plt = 1;
4f199be3
DJ		 10821
10822 /* If we create a PLT entry, this relocation will reference
10823 it, even if it's an ABS32 relocation. */
10824 h->plt.refcount += 1;
b7693d02 10825
bd97cb95
DJ		 10826 /* It's too early to use htab->use_blx here, so we have to
10827 record possible blx references separately from
10828 relocs that definitely need a thumb stub. */
10829
c19d1205 10830 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10831 eh->plt_maybe_thumb_refcount += 1;
10832
10833 if (r_type == R_ARM_THM_JUMP24
10834 || r_type == R_ARM_THM_JUMP19)
b7693d02 10835 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10836 }
10837
67687978
PB		 10838 /* If we are creating a shared library or relocatable executable,
10839 and this is a reloc against a global symbol, or a non PC
10840 relative reloc against a local symbol, then we need to copy
10841 the reloc into the shared library. However, if we are linking
10842 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10843 global symbol which is defined in an object we are
10844 including in the link (i.e., DEF_REGULAR is set). At
10845 this point we have not seen all the input files, so it is
10846 possible that DEF_REGULAR is not set now but will be set
10847 later (it is never cleared). We account for that
10848 possibility below by storing information in the
5e681ec4 10849 relocs_copied field of the hash table entry. */
67687978 10850 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10851 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10852 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10853 || (h != NULL && ! h->needs_plt
10854 && (! info->symbolic || ! h->def_regular))))
252b5132 10855 {
5e681ec4
PB		 10856 struct elf32_arm_relocs_copied *p, **head;
10857
252b5132
RH		 10858 /* When creating a shared object, we must copy these
10859 reloc types into the output file. We create a reloc
10860 section in dynobj and make room for this reloc. */
83bac4b0 10861 if (sreloc == NULL)
252b5132 10862 {
83bac4b0
NC		 10863 sreloc = _bfd_elf_make_dynamic_reloc_section
10864 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10865
83bac4b0 10866 if (sreloc == NULL)
b34976b6 10867 return FALSE;
252b5132 10868
83bac4b0 10869 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10870 if (htab->symbian_p)
252b5132 10871 {
83bac4b0 10872 flagword flags;
5e681ec4 10873
83bac4b0 10874 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10875 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10876 bfd_set_section_flags (dynobj, sreloc, flags);
10877 }
252b5132
RH		 10878 }
10879
5e681ec4
PB		 10880 /* If this is a global symbol, we count the number of
10881 relocations we need for this symbol. */
10882 if (h != NULL)
252b5132 10883 {
5e681ec4
PB		 10884 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
10885 }
10886 else
10887 {
10888 /* Track dynamic relocs needed for local syms too.
10889 We really need local syms available to do this
10890 easily. Oh well. */
5e681ec4 10891 asection *s;
6edfbbad 10892 void *vpp;
87d72d41 10893 Elf_Internal_Sym *isym;
6edfbbad 10894
87d72d41
AM		 10895 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
10896 abfd, r_symndx);
10897 if (isym == NULL)
5e681ec4 10898 return FALSE;
57e8b36a 10899
87d72d41
AM		 10900 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
10901 if (s == NULL)
10902 s = sec;
10903
6edfbbad
DJ		 10904 vpp = &elf_section_data (s)->local_dynrel;
10905 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 10906 }
57e8b36a 10907
5e681ec4
PB		 10908 p = *head;
10909 if (p == NULL || p->section != sec)
10910 {
10911 bfd_size_type amt = sizeof *p;
57e8b36a 10912
5e681ec4 10913 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 10914 if (p == NULL)
5e681ec4
PB		 10915 return FALSE;
10916 p->next = *head;
10917 *head = p;
10918 p->section = sec;
10919 p->count = 0;
ba93b8ac 10920 p->pc_count = 0;
252b5132 10921 }
57e8b36a 10922
bb224fc3 10923 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 10924 p->pc_count += 1;
71a976dd 10925 p->count += 1;
252b5132
RH		 10926 }
10927 break;
10928
10929 /* This relocation describes the C++ object vtable hierarchy.
10930 Reconstruct it for later use during GC. */
10931 case R_ARM_GNU_VTINHERIT:
c152c796 10932 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 10933 return FALSE;
252b5132 10934 break;
9a5aca8c 10935
252b5132
RH		 10936 /* This relocation describes which C++ vtable entries are actually
10937 used. Record for later use during GC. */
10938 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 10939 BFD_ASSERT (h != NULL);
10940 if (h != NULL
10941 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 10942 return FALSE;
252b5132
RH		 10943 break;
10944 }
10945 }
f21f3fe0 10946
b34976b6 10947 return TRUE;
252b5132
RH		 10948}
10949
6a5bb875
PB		 10950/* Unwinding tables are not referenced directly. This pass marks them as
10951 required if the corresponding code section is marked. */
10952
10953static bfd_boolean
906e58ca
NC		 10954elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
10955 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 10956{
10957 bfd *sub;
10958 Elf_Internal_Shdr **elf_shdrp;
10959 bfd_boolean again;
10960
10961 /* Marking EH data may cause additional code sections to be marked,
10962 requiring multiple passes. */
10963 again = TRUE;
10964 while (again)
10965 {
10966 again = FALSE;
10967 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
10968 {
10969 asection *o;
10970
0ffa91dd 10971 if (! is_arm_elf (sub))
6a5bb875
PB		 10972 continue;
10973
10974 elf_shdrp = elf_elfsections (sub);
10975 for (o = sub->sections; o != NULL; o = o->next)
10976 {
10977 Elf_Internal_Shdr *hdr;
0ffa91dd 10978
6a5bb875 10979 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 10980 if (hdr->sh_type == SHT_ARM_EXIDX
10981 && hdr->sh_link
10982 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 10983 && !o->gc_mark
10984 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
10985 {
10986 again = TRUE;
10987 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
10988 return FALSE;
10989 }
10990 }
10991 }
10992 }
10993
10994 return TRUE;
10995}
10996
3c9458e9
NC		 10997/* Treat mapping symbols as special target symbols. */
10998
10999static bfd_boolean
11000elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11001{
b0796911
PB		 11002 return bfd_is_arm_special_symbol_name (sym->name,
11003 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11004}
11005
0367ecfb
NC		 11006/* This is a copy of elf_find_function() from elf.c except that
11007 ARM mapping symbols are ignored when looking for function names
11008 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11009
0367ecfb
NC		 11010static bfd_boolean
11011arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11012 asection * section,
11013 asymbol ** symbols,
11014 bfd_vma offset,
11015 const char ** filename_ptr,
11016 const char ** functionname_ptr)
11017{
11018 const char * filename = NULL;
11019 asymbol * func = NULL;
11020 bfd_vma low_func = 0;
11021 asymbol ** p;
252b5132
RH		 11022
11023 for (p = symbols; *p != NULL; p++)
11024 {
11025 elf_symbol_type *q;
11026
11027 q = (elf_symbol_type *) *p;
11028
252b5132
RH		 11029 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11030 {
11031 default:
11032 break;
11033 case STT_FILE:
11034 filename = bfd_asymbol_name (&q->symbol);
11035 break;
252b5132
RH		 11036 case STT_FUNC:
11037 case STT_ARM_TFUNC:
9d2da7ca 11038 case STT_NOTYPE:
b0796911 11039 /* Skip mapping symbols. */
0367ecfb 11040 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11041 && bfd_is_arm_special_symbol_name (q->symbol.name,
11042 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11043 continue;
11044 /* Fall through. */
6b40fcba 11045 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11046 && q->symbol.value >= low_func
11047 && q->symbol.value <= offset)
11048 {
11049 func = (asymbol *) q;
11050 low_func = q->symbol.value;
11051 }
11052 break;
11053 }
11054 }
11055
11056 if (func == NULL)
b34976b6 11057 return FALSE;
252b5132 11058
0367ecfb
NC		 11059 if (filename_ptr)
11060 *filename_ptr = filename;
11061 if (functionname_ptr)
11062 *functionname_ptr = bfd_asymbol_name (func);
11063
11064 return TRUE;
906e58ca 11065}
0367ecfb
NC		 11066
11067
11068/* Find the nearest line to a particular section and offset, for error
11069 reporting. This code is a duplicate of the code in elf.c, except
11070 that it uses arm_elf_find_function. */
11071
11072static bfd_boolean
11073elf32_arm_find_nearest_line (bfd * abfd,
11074 asection * section,
11075 asymbol ** symbols,
11076 bfd_vma offset,
11077 const char ** filename_ptr,
11078 const char ** functionname_ptr,
11079 unsigned int * line_ptr)
11080{
11081 bfd_boolean found = FALSE;
11082
11083 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11084
11085 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11086 filename_ptr, functionname_ptr,
11087 line_ptr, 0,
11088 & elf_tdata (abfd)->dwarf2_find_line_info))
11089 {
11090 if (!*functionname_ptr)
11091 arm_elf_find_function (abfd, section, symbols, offset,
11092 *filename_ptr ? NULL : filename_ptr,
11093 functionname_ptr);
f21f3fe0 11094
0367ecfb
NC		 11095 return TRUE;
11096 }
11097
11098 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11099 & found, filename_ptr,
11100 functionname_ptr, line_ptr,
11101 & elf_tdata (abfd)->line_info))
11102 return FALSE;
11103
11104 if (found && (*functionname_ptr || *line_ptr))
11105 return TRUE;
11106
11107 if (symbols == NULL)
11108 return FALSE;
11109
11110 if (! arm_elf_find_function (abfd, section, symbols, offset,
11111 filename_ptr, functionname_ptr))
11112 return FALSE;
11113
11114 *line_ptr = 0;
b34976b6 11115 return TRUE;
252b5132
RH		 11116}
11117
4ab527b0
FF		 11118static bfd_boolean
11119elf32_arm_find_inliner_info (bfd * abfd,
11120 const char ** filename_ptr,
11121 const char ** functionname_ptr,
11122 unsigned int * line_ptr)
11123{
11124 bfd_boolean found;
11125 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11126 functionname_ptr, line_ptr,
11127 & elf_tdata (abfd)->dwarf2_find_line_info);
11128 return found;
11129}
11130
252b5132
RH		 11131/* Adjust a symbol defined by a dynamic object and referenced by a
11132 regular object. The current definition is in some section of the
11133 dynamic object, but we're not including those sections. We have to
11134 change the definition to something the rest of the link can
11135 understand. */
11136
b34976b6 11137static bfd_boolean
57e8b36a
NC		 11138elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11139 struct elf_link_hash_entry * h)
252b5132
RH		 11140{
11141 bfd * dynobj;
11142 asection * s;
b7693d02 11143 struct elf32_arm_link_hash_entry * eh;
67687978 11144 struct elf32_arm_link_hash_table *globals;
252b5132 11145
67687978 11146 globals = elf32_arm_hash_table (info);
252b5132
RH		 11147 dynobj = elf_hash_table (info)->dynobj;
11148
11149 /* Make sure we know what is going on here. */
11150 BFD_ASSERT (dynobj != NULL
f5385ebf 11151 && (h->needs_plt
f6e332e6 11152 || h->u.weakdef != NULL
f5385ebf
AM		 11153 || (h->def_dynamic
11154 && h->ref_regular
11155 && !h->def_regular)));
252b5132 11156
b7693d02
DJ		 11157 eh = (struct elf32_arm_link_hash_entry *) h;
11158
252b5132
RH		 11159 /* If this is a function, put it in the procedure linkage table. We
11160 will fill in the contents of the procedure linkage table later,
11161 when we know the address of the .got section. */
0f88be7a 11162 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11163 || h->needs_plt)
252b5132 11164 {
5e681ec4
PB		 11165 if (h->plt.refcount <= 0
11166 || SYMBOL_CALLS_LOCAL (info, h)
11167 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11168 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11169 {
11170 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11171 file, but the symbol was never referred to by a dynamic
11172 object, or if all references were garbage collected. In
11173 such a case, we don't actually need to build a procedure
11174 linkage table, and we can just do a PC24 reloc instead. */
11175 h->plt.offset = (bfd_vma) -1;
b7693d02 11176 eh->plt_thumb_refcount = 0;
bd97cb95 11177 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11178 h->needs_plt = 0;
252b5132
RH		 11179 }
11180
b34976b6 11181 return TRUE;
252b5132 11182 }
5e681ec4 11183 else
b7693d02
DJ		 11184 {
11185 /* It's possible that we incorrectly decided a .plt reloc was
11186 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11187 in check_relocs. We can't decide accurately between function
11188 and non-function syms in check-relocs; Objects loaded later in
11189 the link may change h->type. So fix it now. */
11190 h->plt.offset = (bfd_vma) -1;
11191 eh->plt_thumb_refcount = 0;
bd97cb95 11192 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11193 }
252b5132
RH		 11194
11195 /* If this is a weak symbol, and there is a real definition, the
11196 processor independent code will have arranged for us to see the
11197 real definition first, and we can just use the same value. */
f6e332e6 11198 if (h->u.weakdef != NULL)
252b5132 11199 {
f6e332e6
AM		 11200 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11201 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11202 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11203 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11204 return TRUE;
252b5132
RH		 11205 }
11206
ba93b8ac
DJ		 11207 /* If there are no non-GOT references, we do not need a copy
11208 relocation. */
11209 if (!h->non_got_ref)
11210 return TRUE;
11211
252b5132
RH		 11212 /* This is a reference to a symbol defined by a dynamic object which
11213 is not a function. */
11214
11215 /* If we are creating a shared library, we must presume that the
11216 only references to the symbol are via the global offset table.
11217 For such cases we need not do anything here; the relocations will
67687978
PB		 11218 be handled correctly by relocate_section. Relocatable executables
11219 can reference data in shared objects directly, so we don't need to
11220 do anything here. */
11221 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11222 return TRUE;
252b5132 11223
909272ee
AM		 11224 if (h->size == 0)
11225 {
11226 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11227 h->root.root.string);
11228 return TRUE;
11229 }
11230
252b5132
RH		 11231 /* We must allocate the symbol in our .dynbss section, which will
11232 become part of the .bss section of the executable. There will be
11233 an entry for this symbol in the .dynsym section. The dynamic
11234 object will contain position independent code, so all references
11235 from the dynamic object to this symbol will go through the global
11236 offset table. The dynamic linker will use the .dynsym entry to
11237 determine the address it must put in the global offset table, so
11238 both the dynamic object and the regular object will refer to the
11239 same memory location for the variable. */
252b5132
RH		 11240 s = bfd_get_section_by_name (dynobj, ".dynbss");
11241 BFD_ASSERT (s != NULL);
11242
11243 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11244 copy the initial value out of the dynamic object and into the
11245 runtime process image. We need to remember the offset into the
00a97672 11246 .rel(a).bss section we are going to use. */
252b5132
RH		 11247 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11248 {
11249 asection *srel;
11250
00a97672 11251 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11252 BFD_ASSERT (srel != NULL);
00a97672 11253 srel->size += RELOC_SIZE (globals);
f5385ebf 11254 h->needs_copy = 1;
252b5132
RH		 11255 }
11256
027297b7 11257 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11258}
11259
5e681ec4
PB		 11260/* Allocate space in .plt, .got and associated reloc sections for
11261 dynamic relocs. */
11262
11263static bfd_boolean
57e8b36a 11264allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11265{
11266 struct bfd_link_info *info;
11267 struct elf32_arm_link_hash_table *htab;
11268 struct elf32_arm_link_hash_entry *eh;
11269 struct elf32_arm_relocs_copied *p;
bd97cb95 11270 bfd_signed_vma thumb_refs;
5e681ec4 11271
b7693d02
DJ		 11272 eh = (struct elf32_arm_link_hash_entry *) h;
11273
5e681ec4
PB		 11274 if (h->root.type == bfd_link_hash_indirect)
11275 return TRUE;
11276
11277 if (h->root.type == bfd_link_hash_warning)
11278 /* When warning symbols are created, they **replace** the "real"
11279 entry in the hash table, thus we never get to see the real
11280 symbol in a hash traversal. So look at it now. */
11281 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11282
11283 info = (struct bfd_link_info *) inf;
11284 htab = elf32_arm_hash_table (info);
11285
11286 if (htab->root.dynamic_sections_created
11287 && h->plt.refcount > 0)
11288 {
11289 /* Make sure this symbol is output as a dynamic symbol.
11290 Undefined weak syms won't yet be marked as dynamic. */
11291 if (h->dynindx == -1
f5385ebf 11292 && !h->forced_local)
5e681ec4 11293 {
c152c796 11294 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11295 return FALSE;
11296 }
11297
11298 if (info->shared
7359ea65 11299 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11300 {
11301 asection *s = htab->splt;
11302
11303 /* If this is the first .plt entry, make room for the special
11304 first entry. */
eea6121a 11305 if (s->size == 0)
e5a52504 11306 s->size += htab->plt_header_size;
5e681ec4 11307
eea6121a 11308 h->plt.offset = s->size;
5e681ec4 11309
b7693d02
DJ		 11310 /* If we will insert a Thumb trampoline before this PLT, leave room
11311 for it. */
bd97cb95
DJ		 11312 thumb_refs = eh->plt_thumb_refcount;
11313 if (!htab->use_blx)
11314 thumb_refs += eh->plt_maybe_thumb_refcount;
11315
11316 if (thumb_refs > 0)
b7693d02
DJ		 11317 {
11318 h->plt.offset += PLT_THUMB_STUB_SIZE;
11319 s->size += PLT_THUMB_STUB_SIZE;
11320 }
11321
5e681ec4
PB		 11322 /* If this symbol is not defined in a regular file, and we are
11323 not generating a shared library, then set the symbol to this
11324 location in the .plt. This is required to make function
11325 pointers compare as equal between the normal executable and
11326 the shared library. */
11327 if (! info->shared
f5385ebf 11328 && !h->def_regular)
5e681ec4
PB		 11329 {
11330 h->root.u.def.section = s;
11331 h->root.u.def.value = h->plt.offset;
11332 }
11333
022f8312
CL		 11334 /* Make sure the function is not marked as Thumb, in case
11335 it is the target of an ABS32 relocation, which will
11336 point to the PLT entry. */
11337 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11338 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11339
5e681ec4 11340 /* Make room for this entry. */
e5a52504 11341 s->size += htab->plt_entry_size;
5e681ec4 11342
e5a52504 11343 if (!htab->symbian_p)
b7693d02
DJ		 11344 {
11345 /* We also need to make an entry in the .got.plt section, which
11346 will be placed in the .got section by the linker script. */
11347 eh->plt_got_offset = htab->sgotplt->size;
11348 htab->sgotplt->size += 4;
11349 }
5e681ec4 11350
00a97672
RS		 11351 /* We also need to make an entry in the .rel(a).plt section. */
11352 htab->srelplt->size += RELOC_SIZE (htab);
11353
11354 /* VxWorks executables have a second set of relocations for
11355 each PLT entry. They go in a separate relocation section,
11356 which is processed by the kernel loader. */
11357 if (htab->vxworks_p && !info->shared)
11358 {
11359 /* There is a relocation for the initial PLT entry:
11360 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11361 if (h->plt.offset == htab->plt_header_size)
11362 htab->srelplt2->size += RELOC_SIZE (htab);
11363
11364 /* There are two extra relocations for each subsequent
11365 PLT entry: an R_ARM_32 relocation for the GOT entry,
11366 and an R_ARM_32 relocation for the PLT entry. */
11367 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11368 }
5e681ec4
PB		 11369 }
11370 else
11371 {
11372 h->plt.offset = (bfd_vma) -1;
f5385ebf 11373 h->needs_plt = 0;
5e681ec4
PB		 11374 }
11375 }
11376 else
11377 {
11378 h->plt.offset = (bfd_vma) -1;
f5385ebf 11379 h->needs_plt = 0;
5e681ec4
PB		 11380 }
11381
11382 if (h->got.refcount > 0)
11383 {
11384 asection *s;
11385 bfd_boolean dyn;
ba93b8ac
DJ		 11386 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11387 int indx;
5e681ec4
PB		 11388
11389 /* Make sure this symbol is output as a dynamic symbol.
11390 Undefined weak syms won't yet be marked as dynamic. */
11391 if (h->dynindx == -1
f5385ebf 11392 && !h->forced_local)
5e681ec4 11393 {
c152c796 11394 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11395 return FALSE;
11396 }
11397
e5a52504
MM		 11398 if (!htab->symbian_p)
11399 {
11400 s = htab->sgot;
11401 h->got.offset = s->size;
ba93b8ac
DJ		 11402
11403 if (tls_type == GOT_UNKNOWN)
11404 abort ();
11405
11406 if (tls_type == GOT_NORMAL)
11407 /* Non-TLS symbols need one GOT slot. */
11408 s->size += 4;
11409 else
11410 {
11411 if (tls_type & GOT_TLS_GD)
11412 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11413 s->size += 8;
11414 if (tls_type & GOT_TLS_IE)
11415 /* R_ARM_TLS_IE32 needs one GOT slot. */
11416 s->size += 4;
11417 }
11418
e5a52504 11419 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11420
11421 indx = 0;
11422 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11423 && (!info->shared
11424 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11425 indx = h->dynindx;
11426
11427 if (tls_type != GOT_NORMAL
11428 && (info->shared || indx != 0)
11429 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11430 || h->root.type != bfd_link_hash_undefweak))
11431 {
11432 if (tls_type & GOT_TLS_IE)
00a97672 11433 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11434
11435 if (tls_type & GOT_TLS_GD)
00a97672 11436 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11437
11438 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11439 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11440 }
11441 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11442 || h->root.type != bfd_link_hash_undefweak)
11443 && (info->shared
11444 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11445 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11446 }
5e681ec4
PB		 11447 }
11448 else
11449 h->got.offset = (bfd_vma) -1;
11450
a4fd1a8e
PB		 11451 /* Allocate stubs for exported Thumb functions on v4t. */
11452 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11453 && h->def_regular
a4fd1a8e
PB		 11454 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11455 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11456 {
11457 struct elf_link_hash_entry * th;
11458 struct bfd_link_hash_entry * bh;
11459 struct elf_link_hash_entry * myh;
11460 char name[1024];
11461 asection *s;
11462 bh = NULL;
11463 /* Create a new symbol to regist the real location of the function. */
11464 s = h->root.u.def.section;
906e58ca 11465 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11466 _bfd_generic_link_add_one_symbol (info, s->owner,
11467 name, BSF_GLOBAL, s,
11468 h->root.u.def.value,
11469 NULL, TRUE, FALSE, &bh);
11470
11471 myh = (struct elf_link_hash_entry *) bh;
11472 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11473 myh->forced_local = 1;
11474 eh->export_glue = myh;
11475 th = record_arm_to_thumb_glue (info, h);
11476 /* Point the symbol at the stub. */
11477 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11478 h->root.u.def.section = th->root.u.def.section;
11479 h->root.u.def.value = th->root.u.def.value & ~1;
11480 }
11481
5e681ec4
PB		 11482 if (eh->relocs_copied == NULL)
11483 return TRUE;
11484
11485 /* In the shared -Bsymbolic case, discard space allocated for
11486 dynamic pc-relative relocs against symbols which turn out to be
11487 defined in regular objects. For the normal shared case, discard
11488 space for pc-relative relocs that have become local due to symbol
11489 visibility changes. */
11490
67687978 11491 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11492 {
7bdca076 11493 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11494 R_ARM_REL32_NOI, which will appear on something like
11495 ".long foo - .". We want calls to protected symbols to resolve
11496 directly to the function rather than going via the plt. If people
11497 want function pointer comparisons to work as expected then they
11498 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11499 if (SYMBOL_CALLS_LOCAL (info, h))
11500 {
11501 struct elf32_arm_relocs_copied **pp;
11502
11503 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11504 {
11505 p->count -= p->pc_count;
11506 p->pc_count = 0;
11507 if (p->count == 0)
11508 *pp = p->next;
11509 else
11510 pp = &p->next;
11511 }
11512 }
11513
3348747a
NS		 11514 if (elf32_arm_hash_table (info)->vxworks_p)
11515 {
11516 struct elf32_arm_relocs_copied **pp;
11517
11518 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11519 {
11520 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11521 *pp = p->next;
11522 else
11523 pp = &p->next;
11524 }
11525 }
11526
ba93b8ac 11527 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11528 visibility. */
22d606e9 11529 if (eh->relocs_copied != NULL
5e681ec4 11530 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11531 {
11532 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11533 eh->relocs_copied = NULL;
11534
11535 /* Make sure undefined weak symbols are output as a dynamic
11536 symbol in PIEs. */
11537 else if (h->dynindx == -1
11538 && !h->forced_local)
11539 {
11540 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11541 return FALSE;
11542 }
11543 }
11544
67687978
PB		 11545 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11546 && h->root.type == bfd_link_hash_new)
11547 {
11548 /* Output absolute symbols so that we can create relocations
11549 against them. For normal symbols we output a relocation
11550 against the section that contains them. */
11551 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11552 return FALSE;
11553 }
11554
5e681ec4
PB		 11555 }
11556 else
11557 {
11558 /* For the non-shared case, discard space for relocs against
11559 symbols which turn out to need copy relocs or are not
11560 dynamic. */
11561
f5385ebf
AM		 11562 if (!h->non_got_ref
11563 && ((h->def_dynamic
11564 && !h->def_regular)
5e681ec4
PB		 11565 || (htab->root.dynamic_sections_created
11566 && (h->root.type == bfd_link_hash_undefweak
11567 || h->root.type == bfd_link_hash_undefined))))
11568 {
11569 /* Make sure this symbol is output as a dynamic symbol.
11570 Undefined weak syms won't yet be marked as dynamic. */
11571 if (h->dynindx == -1
f5385ebf 11572 && !h->forced_local)
5e681ec4 11573 {
c152c796 11574 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11575 return FALSE;
11576 }
11577
11578 /* If that succeeded, we know we'll be keeping all the
11579 relocs. */
11580 if (h->dynindx != -1)
11581 goto keep;
11582 }
11583
11584 eh->relocs_copied = NULL;
11585
11586 keep: ;
11587 }
11588
11589 /* Finally, allocate space. */
11590 for (p = eh->relocs_copied; p != NULL; p = p->next)
11591 {
11592 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11593 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11594 }
11595
11596 return TRUE;
11597}
11598
08d1f311
DJ		 11599/* Find any dynamic relocs that apply to read-only sections. */
11600
11601static bfd_boolean
8029a119 11602elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11603{
8029a119
NC		 11604 struct elf32_arm_link_hash_entry * eh;
11605 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11606
11607 if (h->root.type == bfd_link_hash_warning)
11608 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11609
11610 eh = (struct elf32_arm_link_hash_entry *) h;
11611 for (p = eh->relocs_copied; p != NULL; p = p->next)
11612 {
11613 asection *s = p->section;
11614
11615 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11616 {
11617 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11618
11619 info->flags |= DF_TEXTREL;
11620
11621 /* Not an error, just cut short the traversal. */
11622 return FALSE;
11623 }
11624 }
11625 return TRUE;
11626}
11627
d504ffc8
DJ		 11628void
11629bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11630 int byteswap_code)
11631{
11632 struct elf32_arm_link_hash_table *globals;
11633
11634 globals = elf32_arm_hash_table (info);
11635 globals->byteswap_code = byteswap_code;
11636}
11637
252b5132
RH		 11638/* Set the sizes of the dynamic sections. */
11639
b34976b6 11640static bfd_boolean
57e8b36a
NC		 11641elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11642 struct bfd_link_info * info)
252b5132
RH		 11643{
11644 bfd * dynobj;
11645 asection * s;
b34976b6
AM		 11646 bfd_boolean plt;
11647 bfd_boolean relocs;
5e681ec4
PB		 11648 bfd *ibfd;
11649 struct elf32_arm_link_hash_table *htab;
252b5132 11650
5e681ec4 11651 htab = elf32_arm_hash_table (info);
252b5132
RH		 11652 dynobj = elf_hash_table (info)->dynobj;
11653 BFD_ASSERT (dynobj != NULL);
39b41c9c 11654 check_use_blx (htab);
252b5132
RH		 11655
11656 if (elf_hash_table (info)->dynamic_sections_created)
11657 {
11658 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11659 if (info->executable)
252b5132
RH		 11660 {
11661 s = bfd_get_section_by_name (dynobj, ".interp");
11662 BFD_ASSERT (s != NULL);
eea6121a 11663 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11664 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11665 }
11666 }
5e681ec4
PB		 11667
11668 /* Set up .got offsets for local syms, and space for local dynamic
11669 relocs. */
11670 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11671 {
5e681ec4
PB		 11672 bfd_signed_vma *local_got;
11673 bfd_signed_vma *end_local_got;
11674 char *local_tls_type;
11675 bfd_size_type locsymcount;
11676 Elf_Internal_Shdr *symtab_hdr;
11677 asection *srel;
3348747a 11678 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11679
0ffa91dd 11680 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11681 continue;
11682
11683 for (s = ibfd->sections; s != NULL; s = s->next)
11684 {
11685 struct elf32_arm_relocs_copied *p;
11686
6edfbbad 11687 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11688 {
11689 if (!bfd_is_abs_section (p->section)
11690 && bfd_is_abs_section (p->section->output_section))
11691 {
11692 /* Input section has been discarded, either because
11693 it is a copy of a linkonce section or due to
11694 linker script /DISCARD/, so we'll be discarding
11695 the relocs too. */
11696 }
3348747a
NS		 11697 else if (is_vxworks
11698 && strcmp (p->section->output_section->name,
11699 ".tls_vars") == 0)
11700 {
11701 /* Relocations in vxworks .tls_vars sections are
11702 handled specially by the loader. */
11703 }
5e681ec4
PB		 11704 else if (p->count != 0)
11705 {
11706 srel = elf_section_data (p->section)->sreloc;
00a97672 11707 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11708 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11709 info->flags |= DF_TEXTREL;
11710 }
11711 }
11712 }
11713
11714 local_got = elf_local_got_refcounts (ibfd);
11715 if (!local_got)
11716 continue;
11717
0ffa91dd 11718 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11719 locsymcount = symtab_hdr->sh_info;
11720 end_local_got = local_got + locsymcount;
ba93b8ac 11721 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11722 s = htab->sgot;
11723 srel = htab->srelgot;
11724 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11725 {
11726 if (*local_got > 0)
11727 {
eea6121a 11728 *local_got = s->size;
ba93b8ac
DJ		 11729 if (*local_tls_type & GOT_TLS_GD)
11730 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11731 s->size += 8;
11732 if (*local_tls_type & GOT_TLS_IE)
11733 s->size += 4;
11734 if (*local_tls_type == GOT_NORMAL)
11735 s->size += 4;
11736
11737 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11738 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11739 }
11740 else
11741 *local_got = (bfd_vma) -1;
11742 }
252b5132
RH		 11743 }
11744
ba93b8ac
DJ		 11745 if (htab->tls_ldm_got.refcount > 0)
11746 {
11747 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11748 for R_ARM_TLS_LDM32 relocations. */
11749 htab->tls_ldm_got.offset = htab->sgot->size;
11750 htab->sgot->size += 8;
11751 if (info->shared)
00a97672 11752 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11753 }
11754 else
11755 htab->tls_ldm_got.offset = -1;
11756
5e681ec4
PB		 11757 /* Allocate global sym .plt and .got entries, and space for global
11758 sym dynamic relocs. */
57e8b36a 11759 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11760
d504ffc8
DJ		 11761 /* Here we rummage through the found bfds to collect glue information. */
11762 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11763 {
0ffa91dd 11764 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11765 continue;
11766
c7b8f16e
JB		 11767 /* Initialise mapping tables for code/data. */
11768 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11769
c7b8f16e
JB		 11770 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11771 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11772 /* xgettext:c-format */
11773 _bfd_error_handler (_("Errors encountered processing file %s"),
11774 ibfd->filename);
11775 }
d504ffc8 11776
3e6b1042
DJ		 11777 /* Allocate space for the glue sections now that we've sized them. */
11778 bfd_elf32_arm_allocate_interworking_sections (info);
11779
252b5132
RH		 11780 /* The check_relocs and adjust_dynamic_symbol entry points have
11781 determined the sizes of the various dynamic sections. Allocate
11782 memory for them. */
b34976b6
AM		 11783 plt = FALSE;
11784 relocs = FALSE;
252b5132
RH		 11785 for (s = dynobj->sections; s != NULL; s = s->next)
11786 {
11787 const char * name;
252b5132
RH		 11788
11789 if ((s->flags & SEC_LINKER_CREATED) == 0)
11790 continue;
11791
11792 /* It's OK to base decisions on the section name, because none
11793 of the dynobj section names depend upon the input files. */
11794 name = bfd_get_section_name (dynobj, s);
11795
24a1ba0f 11796 if (strcmp (name, ".plt") == 0)
252b5132 11797 {
c456f082
AM		 11798 /* Remember whether there is a PLT. */
11799 plt = s->size != 0;
252b5132 11800 }
0112cd26 11801 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11802 {
c456f082 11803 if (s->size != 0)
252b5132 11804 {
252b5132 11805 /* Remember whether there are any reloc sections other
00a97672
RS		 11806 than .rel(a).plt and .rela.plt.unloaded. */
11807 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11808 relocs = TRUE;
252b5132
RH		 11809
11810 /* We use the reloc_count field as a counter if we need
11811 to copy relocs into the output file. */
11812 s->reloc_count = 0;
11813 }
11814 }
0112cd26 11815 else if (! CONST_STRNEQ (name, ".got")
c456f082 11816 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11817 {
11818 /* It's not one of our sections, so don't allocate space. */
11819 continue;
11820 }
11821
c456f082 11822 if (s->size == 0)
252b5132 11823 {
c456f082 11824 /* If we don't need this section, strip it from the
00a97672
RS		 11825 output file. This is mostly to handle .rel(a).bss and
11826 .rel(a).plt. We must create both sections in
c456f082
AM		 11827 create_dynamic_sections, because they must be created
11828 before the linker maps input sections to output
11829 sections. The linker does that before
11830 adjust_dynamic_symbol is called, and it is that
11831 function which decides whether anything needs to go
11832 into these sections. */
8423293d 11833 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11834 continue;
11835 }
11836
c456f082
AM		 11837 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11838 continue;
11839
252b5132 11840 /* Allocate memory for the section contents. */
906e58ca 11841 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11842 if (s->contents == NULL)
b34976b6 11843 return FALSE;
252b5132
RH		 11844 }
11845
11846 if (elf_hash_table (info)->dynamic_sections_created)
11847 {
11848 /* Add some entries to the .dynamic section. We fill in the
11849 values later, in elf32_arm_finish_dynamic_sections, but we
11850 must add the entries now so that we get the correct size for
11851 the .dynamic section. The DT_DEBUG entry is filled in by the
11852 dynamic linker and used by the debugger. */
dc810e39 11853#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11854 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11855
8532796c 11856 if (info->executable)
252b5132 11857 {
dc810e39 11858 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11859 return FALSE;
252b5132
RH		 11860 }
11861
11862 if (plt)
11863 {
dc810e39
AM		 11864 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11865 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11866 || !add_dynamic_entry (DT_PLTREL,
11867 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11868 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11869 return FALSE;
252b5132
RH		 11870 }
11871
11872 if (relocs)
11873 {
00a97672
RS		 11874 if (htab->use_rel)
11875 {
11876 if (!add_dynamic_entry (DT_REL, 0)
11877 || !add_dynamic_entry (DT_RELSZ, 0)
11878 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11879 return FALSE;
11880 }
11881 else
11882 {
11883 if (!add_dynamic_entry (DT_RELA, 0)
11884 || !add_dynamic_entry (DT_RELASZ, 0)
11885 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
11886 return FALSE;
11887 }
252b5132
RH		 11888 }
11889
08d1f311
DJ		 11890 /* If any dynamic relocs apply to a read-only section,
11891 then we need a DT_TEXTREL entry. */
11892 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 11893 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
11894 info);
08d1f311 11895
99e4ae17 11896 if ((info->flags & DF_TEXTREL) != 0)
252b5132 11897 {
dc810e39 11898 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 11899 return FALSE;
252b5132 11900 }
7a2b07ff
NS		 11901 if (htab->vxworks_p
11902 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
11903 return FALSE;
252b5132 11904 }
8532796c 11905#undef add_dynamic_entry
252b5132 11906
b34976b6 11907 return TRUE;
252b5132
RH		 11908}
11909
252b5132
RH		 11910/* Finish up dynamic symbol handling. We set the contents of various
11911 dynamic sections here. */
11912
b34976b6 11913static bfd_boolean
906e58ca
NC		 11914elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
11915 struct bfd_link_info * info,
11916 struct elf_link_hash_entry * h,
11917 Elf_Internal_Sym * sym)
252b5132
RH		 11918{
11919 bfd * dynobj;
e5a52504 11920 struct elf32_arm_link_hash_table *htab;
b7693d02 11921 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 11922
11923 dynobj = elf_hash_table (info)->dynobj;
e5a52504 11924 htab = elf32_arm_hash_table (info);
b7693d02 11925 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 11926
11927 if (h->plt.offset != (bfd_vma) -1)
11928 {
11929 asection * splt;
252b5132 11930 asection * srel;
e5a52504 11931 bfd_byte *loc;
24a1ba0f 11932 bfd_vma plt_index;
947216bf 11933 Elf_Internal_Rela rel;
252b5132
RH		 11934
11935 /* This symbol has an entry in the procedure linkage table. Set
11936 it up. */
11937
11938 BFD_ASSERT (h->dynindx != -1);
11939
11940 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 11941 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 11942 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 11943
e5a52504
MM		 11944 /* Fill in the entry in the procedure linkage table. */
11945 if (htab->symbian_p)
11946 {
906e58ca 11947 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 11948 elf32_arm_symbian_plt_entry[0],
11949 splt->contents + h->plt.offset);
906e58ca 11950 bfd_put_32 (output_bfd,
52ab56c2
PB		 11951 elf32_arm_symbian_plt_entry[1],
11952 splt->contents + h->plt.offset + 4);
906e58ca 11953
e5a52504 11954 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 11955 rel.r_offset = (splt->output_section->vma
11956 + splt->output_offset
52ab56c2 11957 + h->plt.offset + 4);
e5a52504 11958 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 11959
11960 /* Get the index in the procedure linkage table which
11961 corresponds to this symbol. This is the index of this symbol
11962 in all the symbols for which we are making plt entries. The
11963 first entry in the procedure linkage table is reserved. */
906e58ca 11964 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 11965 / htab->plt_entry_size);
e5a52504
MM		 11966 }
11967 else
11968 {
00a97672 11969 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 11970 bfd_vma got_displacement;
11971 asection * sgot;
52ab56c2 11972 bfd_byte * ptr;
906e58ca 11973
e5a52504
MM		 11974 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
11975 BFD_ASSERT (sgot != NULL);
11976
b7693d02
DJ		 11977 /* Get the offset into the .got.plt table of the entry that
11978 corresponds to this function. */
11979 got_offset = eh->plt_got_offset;
11980
11981 /* Get the index in the procedure linkage table which
11982 corresponds to this symbol. This is the index of this symbol
11983 in all the symbols for which we are making plt entries. The
11984 first three entries in .got.plt are reserved; after that
11985 symbols appear in the same order as in .plt. */
11986 plt_index = (got_offset - 12) / 4;
e5a52504 11987
00a97672
RS		 11988 /* Calculate the address of the GOT entry. */
11989 got_address = (sgot->output_section->vma
11990 + sgot->output_offset
11991 + got_offset);
5e681ec4 11992
00a97672
RS		 11993 /* ...and the address of the PLT entry. */
11994 plt_address = (splt->output_section->vma
11995 + splt->output_offset
11996 + h->plt.offset);
5e681ec4 11997
52ab56c2 11998 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 11999 if (htab->vxworks_p && info->shared)
12000 {
12001 unsigned int i;
12002 bfd_vma val;
12003
52ab56c2 12004 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12005 {
12006 val = elf32_arm_vxworks_shared_plt_entry[i];
12007 if (i == 2)
12008 val |= got_address - sgot->output_section->vma;
12009 if (i == 5)
12010 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12011 if (i == 2 || i == 5)
12012 bfd_put_32 (output_bfd, val, ptr);
12013 else
12014 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12015 }
12016 }
12017 else if (htab->vxworks_p)
b7693d02 12018 {
00a97672
RS		 12019 unsigned int i;
12020 bfd_vma val;
12021
d3753b85 12022 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12023 {
12024 val = elf32_arm_vxworks_exec_plt_entry[i];
12025 if (i == 2)
12026 val |= got_address;
12027 if (i == 4)
12028 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12029 if (i == 5)
12030 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12031 if (i == 2 || i == 5)
12032 bfd_put_32 (output_bfd, val, ptr);
12033 else
12034 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12035 }
12036
12037 loc = (htab->srelplt2->contents
12038 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12039
12040 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12041 referencing the GOT for this PLT entry. */
12042 rel.r_offset = plt_address + 8;
12043 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12044 rel.r_addend = got_offset;
12045 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12046 loc += RELOC_SIZE (htab);
12047
12048 /* Create the R_ARM_ABS32 relocation referencing the
12049 beginning of the PLT for this GOT entry. */
12050 rel.r_offset = got_address;
12051 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12052 rel.r_addend = 0;
12053 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12054 }
00a97672
RS		 12055 else
12056 {
bd97cb95 12057 bfd_signed_vma thumb_refs;
00a97672
RS		 12058 /* Calculate the displacement between the PLT slot and the
12059 entry in the GOT. The eight-byte offset accounts for the
12060 value produced by adding to pc in the first instruction
12061 of the PLT stub. */
12062 got_displacement = got_address - (plt_address + 8);
b7693d02 12063
00a97672
RS		 12064 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12065
bd97cb95
DJ		 12066 thumb_refs = eh->plt_thumb_refcount;
12067 if (!htab->use_blx)
12068 thumb_refs += eh->plt_maybe_thumb_refcount;
12069
12070 if (thumb_refs > 0)
00a97672 12071 {
52ab56c2
PB		 12072 put_thumb_insn (htab, output_bfd,
12073 elf32_arm_plt_thumb_stub[0], ptr - 4);
12074 put_thumb_insn (htab, output_bfd,
12075 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12076 }
12077
52ab56c2
PB		 12078 put_arm_insn (htab, output_bfd,
12079 elf32_arm_plt_entry[0]
12080 | ((got_displacement & 0x0ff00000) >> 20),
12081 ptr + 0);
12082 put_arm_insn (htab, output_bfd,
12083 elf32_arm_plt_entry[1]
12084 | ((got_displacement & 0x000ff000) >> 12),
12085 ptr+ 4);
12086 put_arm_insn (htab, output_bfd,
12087 elf32_arm_plt_entry[2]
12088 | (got_displacement & 0x00000fff),
12089 ptr + 8);
5e681ec4 12090#ifdef FOUR_WORD_PLT
52ab56c2 12091 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12092#endif
00a97672 12093 }
252b5132 12094
e5a52504
MM		 12095 /* Fill in the entry in the global offset table. */
12096 bfd_put_32 (output_bfd,
12097 (splt->output_section->vma
12098 + splt->output_offset),
12099 sgot->contents + got_offset);
906e58ca 12100
00a97672
RS		 12101 /* Fill in the entry in the .rel(a).plt section. */
12102 rel.r_addend = 0;
12103 rel.r_offset = got_address;
e5a52504
MM		 12104 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12105 }
57e8b36a 12106
00a97672
RS		 12107 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12108 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12109
f5385ebf 12110 if (!h->def_regular)
252b5132
RH		 12111 {
12112 /* Mark the symbol as undefined, rather than as defined in
12113 the .plt section. Leave the value alone. */
12114 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12115 /* If the symbol is weak, we do need to clear the value.
12116 Otherwise, the PLT entry would provide a definition for
12117 the symbol even if the symbol wasn't defined anywhere,
12118 and so the symbol would never be NULL. */
f5385ebf 12119 if (!h->ref_regular_nonweak)
d982ba73 12120 sym->st_value = 0;
252b5132
RH		 12121 }
12122 }
12123
ba93b8ac
DJ		 12124 if (h->got.offset != (bfd_vma) -1
12125 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12126 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12127 {
12128 asection * sgot;
12129 asection * srel;
947216bf
AM		 12130 Elf_Internal_Rela rel;
12131 bfd_byte *loc;
00a97672 12132 bfd_vma offset;
252b5132
RH		 12133
12134 /* This symbol has an entry in the global offset table. Set it
12135 up. */
252b5132 12136 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12137 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12138 BFD_ASSERT (sgot != NULL && srel != NULL);
12139
00a97672
RS		 12140 offset = (h->got.offset & ~(bfd_vma) 1);
12141 rel.r_addend = 0;
252b5132
RH		 12142 rel.r_offset = (sgot->output_section->vma
12143 + sgot->output_offset
00a97672 12144 + offset);
252b5132 12145
5e681ec4
PB		 12146 /* If this is a static link, or it is a -Bsymbolic link and the
12147 symbol is defined locally or was forced to be local because
12148 of a version file, we just want to emit a RELATIVE reloc.
12149 The entry in the global offset table will already have been
12150 initialized in the relocate_section function. */
252b5132 12151 if (info->shared
5e681ec4
PB		 12152 && SYMBOL_REFERENCES_LOCAL (info, h))
12153 {
906e58ca 12154 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12155 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12156 if (!htab->use_rel)
12157 {
12158 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12159 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12160 }
5e681ec4 12161 }
252b5132
RH		 12162 else
12163 {
906e58ca 12164 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12165 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12166 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12167 }
12168
00a97672
RS		 12169 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12170 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12171 }
12172
f5385ebf 12173 if (h->needs_copy)
252b5132
RH		 12174 {
12175 asection * s;
947216bf
AM		 12176 Elf_Internal_Rela rel;
12177 bfd_byte *loc;
252b5132
RH		 12178
12179 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12180 BFD_ASSERT (h->dynindx != -1
12181 && (h->root.type == bfd_link_hash_defined
12182 || h->root.type == bfd_link_hash_defweak));
12183
12184 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12185 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12186 BFD_ASSERT (s != NULL);
12187
00a97672 12188 rel.r_addend = 0;
252b5132
RH		 12189 rel.r_offset = (h->root.u.def.value
12190 + h->root.u.def.section->output_section->vma
12191 + h->root.u.def.section->output_offset);
12192 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12193 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12194 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12195 }
12196
00a97672
RS		 12197 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12198 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12199 to the ".got" section. */
252b5132 12200 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12201 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12202 sym->st_shndx = SHN_ABS;
12203
b34976b6 12204 return TRUE;
252b5132
RH		 12205}
12206
12207/* Finish up the dynamic sections. */
12208
b34976b6 12209static bfd_boolean
57e8b36a 12210elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12211{
12212 bfd * dynobj;
12213 asection * sgot;
12214 asection * sdyn;
12215
12216 dynobj = elf_hash_table (info)->dynobj;
12217
12218 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12219 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12220 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12221
12222 if (elf_hash_table (info)->dynamic_sections_created)
12223 {
12224 asection *splt;
12225 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12226 struct elf32_arm_link_hash_table *htab;
252b5132 12227
229fcec5 12228 htab = elf32_arm_hash_table (info);
252b5132 12229 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12230 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12231
12232 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12233 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12234
252b5132
RH		 12235 for (; dyncon < dynconend; dyncon++)
12236 {
12237 Elf_Internal_Dyn dyn;
12238 const char * name;
12239 asection * s;
12240
12241 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12242
12243 switch (dyn.d_tag)
12244 {
229fcec5
MM		 12245 unsigned int type;
12246
252b5132 12247 default:
7a2b07ff
NS		 12248 if (htab->vxworks_p
12249 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12250 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12251 break;
12252
229fcec5
MM		 12253 case DT_HASH:
12254 name = ".hash";
12255 goto get_vma_if_bpabi;
12256 case DT_STRTAB:
12257 name = ".dynstr";
12258 goto get_vma_if_bpabi;
12259 case DT_SYMTAB:
12260 name = ".dynsym";
12261 goto get_vma_if_bpabi;
c0042f5d
MM		 12262 case DT_VERSYM:
12263 name = ".gnu.version";
12264 goto get_vma_if_bpabi;
12265 case DT_VERDEF:
12266 name = ".gnu.version_d";
12267 goto get_vma_if_bpabi;
12268 case DT_VERNEED:
12269 name = ".gnu.version_r";
12270 goto get_vma_if_bpabi;
12271
252b5132
RH		 12272 case DT_PLTGOT:
12273 name = ".got";
12274 goto get_vma;
12275 case DT_JMPREL:
00a97672 12276 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12277 get_vma:
12278 s = bfd_get_section_by_name (output_bfd, name);
12279 BFD_ASSERT (s != NULL);
229fcec5
MM		 12280 if (!htab->symbian_p)
12281 dyn.d_un.d_ptr = s->vma;
12282 else
12283 /* In the BPABI, tags in the PT_DYNAMIC section point
12284 at the file offset, not the memory address, for the
12285 convenience of the post linker. */
12286 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12287 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12288 break;
12289
229fcec5
MM		 12290 get_vma_if_bpabi:
12291 if (htab->symbian_p)
12292 goto get_vma;
12293 break;
12294
252b5132 12295 case DT_PLTRELSZ:
00a97672
RS		 12296 s = bfd_get_section_by_name (output_bfd,
12297 RELOC_SECTION (htab, ".plt"));
252b5132 12298 BFD_ASSERT (s != NULL);
eea6121a 12299 dyn.d_un.d_val = s->size;
252b5132
RH		 12300 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12301 break;
906e58ca 12302
252b5132 12303 case DT_RELSZ:
00a97672 12304 case DT_RELASZ:
229fcec5
MM		 12305 if (!htab->symbian_p)
12306 {
12307 /* My reading of the SVR4 ABI indicates that the
12308 procedure linkage table relocs (DT_JMPREL) should be
12309 included in the overall relocs (DT_REL). This is
12310 what Solaris does. However, UnixWare can not handle
12311 that case. Therefore, we override the DT_RELSZ entry
12312 here to make it not include the JMPREL relocs. Since
00a97672 12313 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12314 other relocation sections, we don't have to worry
12315 about changing the DT_REL entry. */
00a97672
RS		 12316 s = bfd_get_section_by_name (output_bfd,
12317 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12318 if (s != NULL)
12319 dyn.d_un.d_val -= s->size;
12320 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12321 break;
12322 }
8029a119 12323 /* Fall through. */
229fcec5
MM		 12324
12325 case DT_REL:
12326 case DT_RELA:
229fcec5
MM		 12327 /* In the BPABI, the DT_REL tag must point at the file
12328 offset, not the VMA, of the first relocation
12329 section. So, we use code similar to that in
12330 elflink.c, but do not check for SHF_ALLOC on the
12331 relcoation section, since relocations sections are
12332 never allocated under the BPABI. The comments above
12333 about Unixware notwithstanding, we include all of the
12334 relocations here. */
12335 if (htab->symbian_p)
12336 {
12337 unsigned int i;
12338 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12339 ? SHT_REL : SHT_RELA);
12340 dyn.d_un.d_val = 0;
12341 for (i = 1; i < elf_numsections (output_bfd); i++)
12342 {
906e58ca 12343 Elf_Internal_Shdr *hdr
229fcec5
MM		 12344 = elf_elfsections (output_bfd)[i];
12345 if (hdr->sh_type == type)
12346 {
906e58ca 12347 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12348 || dyn.d_tag == DT_RELASZ)
12349 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12350 else if ((ufile_ptr) hdr->sh_offset
12351 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12352 dyn.d_un.d_val = hdr->sh_offset;
12353 }
12354 }
12355 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12356 }
252b5132 12357 break;
88f7bcd5
NC		 12358
12359 /* Set the bottom bit of DT_INIT/FINI if the
12360 corresponding function is Thumb. */
12361 case DT_INIT:
12362 name = info->init_function;
12363 goto get_sym;
12364 case DT_FINI:
12365 name = info->fini_function;
12366 get_sym:
12367 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12368 then there is nothing to adjust. */
88f7bcd5
NC		 12369 if (dyn.d_un.d_val != 0)
12370 {
12371 struct elf_link_hash_entry * eh;
12372
12373 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12374 FALSE, FALSE, TRUE);
906e58ca 12375 if (eh != NULL
88f7bcd5
NC		 12376 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12377 {
12378 dyn.d_un.d_val |= 1;
b34976b6 12379 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12380 }
12381 }
12382 break;
252b5132
RH		 12383 }
12384 }
12385
24a1ba0f 12386 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12387 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12388 {
00a97672
RS		 12389 const bfd_vma *plt0_entry;
12390 bfd_vma got_address, plt_address, got_displacement;
12391
12392 /* Calculate the addresses of the GOT and PLT. */
12393 got_address = sgot->output_section->vma + sgot->output_offset;
12394 plt_address = splt->output_section->vma + splt->output_offset;
12395
12396 if (htab->vxworks_p)
12397 {
12398 /* The VxWorks GOT is relocated by the dynamic linker.
12399 Therefore, we must emit relocations rather than simply
12400 computing the values now. */
12401 Elf_Internal_Rela rel;
12402
12403 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12404 put_arm_insn (htab, output_bfd, plt0_entry[0],
12405 splt->contents + 0);
12406 put_arm_insn (htab, output_bfd, plt0_entry[1],
12407 splt->contents + 4);
12408 put_arm_insn (htab, output_bfd, plt0_entry[2],
12409 splt->contents + 8);
00a97672
RS		 12410 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12411
8029a119 12412 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12413 rel.r_offset = plt_address + 12;
12414 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12415 rel.r_addend = 0;
12416 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12417 htab->srelplt2->contents);
12418 }
12419 else
12420 {
12421 got_displacement = got_address - (plt_address + 16);
12422
12423 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12424 put_arm_insn (htab, output_bfd, plt0_entry[0],
12425 splt->contents + 0);
12426 put_arm_insn (htab, output_bfd, plt0_entry[1],
12427 splt->contents + 4);
12428 put_arm_insn (htab, output_bfd, plt0_entry[2],
12429 splt->contents + 8);
12430 put_arm_insn (htab, output_bfd, plt0_entry[3],
12431 splt->contents + 12);
5e681ec4 12432
5e681ec4 12433#ifdef FOUR_WORD_PLT
00a97672
RS		 12434 /* The displacement value goes in the otherwise-unused
12435 last word of the second entry. */
12436 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12437#else
00a97672 12438 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12439#endif
00a97672 12440 }
f7a74f8c 12441 }
252b5132
RH		 12442
12443 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12444 really seem like the right value. */
74541ad4
AM		 12445 if (splt->output_section->owner == output_bfd)
12446 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12447
12448 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12449 {
12450 /* Correct the .rel(a).plt.unloaded relocations. They will have
12451 incorrect symbol indexes. */
12452 int num_plts;
eed62c48 12453 unsigned char *p;
00a97672
RS		 12454
12455 num_plts = ((htab->splt->size - htab->plt_header_size)
12456 / htab->plt_entry_size);
12457 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12458
12459 for (; num_plts; num_plts--)
12460 {
12461 Elf_Internal_Rela rel;
12462
12463 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12464 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12465 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12466 p += RELOC_SIZE (htab);
12467
12468 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12469 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12470 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12471 p += RELOC_SIZE (htab);
12472 }
12473 }
252b5132
RH		 12474 }
12475
12476 /* Fill in the first three entries in the global offset table. */
229fcec5 12477 if (sgot)
252b5132 12478 {
229fcec5
MM		 12479 if (sgot->size > 0)
12480 {
12481 if (sdyn == NULL)
12482 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12483 else
12484 bfd_put_32 (output_bfd,
12485 sdyn->output_section->vma + sdyn->output_offset,
12486 sgot->contents);
12487 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12488 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12489 }
252b5132 12490
229fcec5
MM		 12491 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12492 }
252b5132 12493
b34976b6 12494 return TRUE;
252b5132
RH		 12495}
12496
ba96a88f 12497static void
57e8b36a 12498elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12499{
9b485d32 12500 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12501 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12502
12503 i_ehdrp = elf_elfheader (abfd);
12504
94a3258f
PB		 12505 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12506 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12507 else
12508 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12509 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12510
93204d3a
PB		 12511 if (link_info)
12512 {
12513 globals = elf32_arm_hash_table (link_info);
12514 if (globals->byteswap_code)
12515 i_ehdrp->e_flags |= EF_ARM_BE8;
12516 }
ba96a88f
NC		 12517}
12518
99e4ae17 12519static enum elf_reloc_type_class
57e8b36a 12520elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12521{
f51e552e 12522 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12523 {
12524 case R_ARM_RELATIVE:
12525 return reloc_class_relative;
12526 case R_ARM_JUMP_SLOT:
12527 return reloc_class_plt;
12528 case R_ARM_COPY:
12529 return reloc_class_copy;
12530 default:
12531 return reloc_class_normal;
12532 }
12533}
12534
e16bb312
NC		 12535/* Set the right machine number for an Arm ELF file. */
12536
12537static bfd_boolean
57e8b36a 12538elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12539{
12540 if (hdr->sh_type == SHT_NOTE)
12541 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12542
12543 return TRUE;
12544}
12545
e489d0ae 12546static void
57e8b36a 12547elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12548{
5a6c6817 12549 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12550}
12551
40a18ebd
NC		 12552/* Return TRUE if this is an unwinding table entry. */
12553
12554static bfd_boolean
12555is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12556{
0112cd26
NC		 12557 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12558 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12559}
12560
12561
12562/* Set the type and flags for an ARM section. We do this by
12563 the section name, which is a hack, but ought to work. */
12564
12565static bfd_boolean
12566elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12567{
12568 const char * name;
12569
12570 name = bfd_get_section_name (abfd, sec);
12571
12572 if (is_arm_elf_unwind_section_name (abfd, name))
12573 {
12574 hdr->sh_type = SHT_ARM_EXIDX;
12575 hdr->sh_flags |= SHF_LINK_ORDER;
12576 }
12577 return TRUE;
12578}
12579
6dc132d9
L		 12580/* Handle an ARM specific section when reading an object file. This is
12581 called when bfd_section_from_shdr finds a section with an unknown
12582 type. */
40a18ebd
NC		 12583
12584static bfd_boolean
12585elf32_arm_section_from_shdr (bfd *abfd,
12586 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12587 const char *name,
12588 int shindex)
40a18ebd
NC		 12589{
12590 /* There ought to be a place to keep ELF backend specific flags, but
12591 at the moment there isn't one. We just keep track of the
12592 sections by their name, instead. Fortunately, the ABI gives
12593 names for all the ARM specific sections, so we will probably get
12594 away with this. */
12595 switch (hdr->sh_type)
12596 {
12597 case SHT_ARM_EXIDX:
0951f019
RE		 12598 case SHT_ARM_PREEMPTMAP:
12599 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12600 break;
12601
12602 default:
12603 return FALSE;
12604 }
12605
6dc132d9 12606 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12607 return FALSE;
12608
12609 return TRUE;
12610}
e489d0ae 12611
8e3de13a
NC		 12612/* A structure used to record a list of sections, independently
12613 of the next and prev fields in the asection structure. */
12614typedef struct section_list
12615{
12616 asection * sec;
12617 struct section_list * next;
12618 struct section_list * prev;
12619}
12620section_list;
12621
12622/* Unfortunately we need to keep a list of sections for which
12623 an _arm_elf_section_data structure has been allocated. This
12624 is because it is possible for functions like elf32_arm_write_section
12625 to be called on a section which has had an elf_data_structure
12626 allocated for it (and so the used_by_bfd field is valid) but
12627 for which the ARM extended version of this structure - the
12628 _arm_elf_section_data structure - has not been allocated. */
12629static section_list * sections_with_arm_elf_section_data = NULL;
12630
12631static void
957c6e41 12632record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12633{
12634 struct section_list * entry;
12635
957c6e41 12636 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12637 if (entry == NULL)
12638 return;
12639 entry->sec = sec;
12640 entry->next = sections_with_arm_elf_section_data;
12641 entry->prev = NULL;
12642 if (entry->next != NULL)
12643 entry->next->prev = entry;
12644 sections_with_arm_elf_section_data = entry;
12645}
12646
44444f50
NC		 12647static struct section_list *
12648find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12649{
12650 struct section_list * entry;
bd4aae00 12651 static struct section_list * last_entry = NULL;
8e3de13a 12652
bd4aae00
NC		 12653 /* This is a short cut for the typical case where the sections are added
12654 to the sections_with_arm_elf_section_data list in forward order and
12655 then looked up here in backwards order. This makes a real difference
12656 to the ld-srec/sec64k.exp linker test. */
44444f50 12657 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12658 if (last_entry != NULL)
12659 {
12660 if (last_entry->sec == sec)
44444f50
NC		 12661 entry = last_entry;
12662 else if (last_entry->next != NULL
12663 && last_entry->next->sec == sec)
12664 entry = last_entry->next;
bd4aae00 12665 }
44444f50
NC		 12666
12667 for (; entry; entry = entry->next)
8e3de13a 12668 if (entry->sec == sec)
44444f50 12669 break;
bd4aae00 12670
44444f50
NC		 12671 if (entry)
12672 /* Record the entry prior to this one - it is the entry we are most
12673 likely to want to locate next time. Also this way if we have been
12674 called from unrecord_section_with_arm_elf_section_data() we will not
12675 be caching a pointer that is about to be freed. */
12676 last_entry = entry->prev;
12677
12678 return entry;
12679}
12680
12681static _arm_elf_section_data *
12682get_arm_elf_section_data (asection * sec)
12683{
12684 struct section_list * entry;
12685
12686 entry = find_arm_elf_section_entry (sec);
12687
12688 if (entry)
12689 return elf32_arm_section_data (entry->sec);
12690 else
12691 return NULL;
8e3de13a
NC		 12692}
12693
12694static void
12695unrecord_section_with_arm_elf_section_data (asection * sec)
12696{
12697 struct section_list * entry;
12698
44444f50
NC		 12699 entry = find_arm_elf_section_entry (sec);
12700
12701 if (entry)
12702 {
12703 if (entry->prev != NULL)
12704 entry->prev->next = entry->next;
12705 if (entry->next != NULL)
12706 entry->next->prev = entry->prev;
12707 if (entry == sections_with_arm_elf_section_data)
12708 sections_with_arm_elf_section_data = entry->next;
12709 free (entry);
12710 }
8e3de13a
NC		 12711}
12712
e489d0ae 12713
4e617b1e
PB		 12714typedef struct
12715{
12716 void *finfo;
12717 struct bfd_link_info *info;
91a5743d
PB		 12718 asection *sec;
12719 int sec_shndx;
6e0b88f1
AM		 12720 int (*func) (void *, const char *, Elf_Internal_Sym *,
12721 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12722} output_arch_syminfo;
12723
12724enum map_symbol_type
12725{
12726 ARM_MAP_ARM,
12727 ARM_MAP_THUMB,
12728 ARM_MAP_DATA
12729};
12730
12731
7413f23f 12732/* Output a single mapping symbol. */
4e617b1e
PB		 12733
12734static bfd_boolean
7413f23f
DJ		 12735elf32_arm_output_map_sym (output_arch_syminfo *osi,
12736 enum map_symbol_type type,
12737 bfd_vma offset)
4e617b1e
PB		 12738{
12739 static const char *names[3] = {"$a", "$t", "$d"};
12740 struct elf32_arm_link_hash_table *htab;
12741 Elf_Internal_Sym sym;
12742
12743 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12744 sym.st_value = osi->sec->output_section->vma
12745 + osi->sec->output_offset
12746 + offset;
4e617b1e
PB		 12747 sym.st_size = 0;
12748 sym.st_other = 0;
12749 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12750 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12751 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12752}
12753
12754
12755/* Output mapping symbols for PLT entries associated with H. */
12756
12757static bfd_boolean
12758elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12759{
12760 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12761 struct elf32_arm_link_hash_table *htab;
12762 struct elf32_arm_link_hash_entry *eh;
12763 bfd_vma addr;
12764
12765 htab = elf32_arm_hash_table (osi->info);
12766
12767 if (h->root.type == bfd_link_hash_indirect)
12768 return TRUE;
12769
12770 if (h->root.type == bfd_link_hash_warning)
12771 /* When warning symbols are created, they **replace** the "real"
12772 entry in the hash table, thus we never get to see the real
12773 symbol in a hash traversal. So look at it now. */
12774 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12775
12776 if (h->plt.offset == (bfd_vma) -1)
12777 return TRUE;
12778
12779 eh = (struct elf32_arm_link_hash_entry *) h;
12780 addr = h->plt.offset;
12781 if (htab->symbian_p)
12782 {
7413f23f 12783 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12784 return FALSE;
7413f23f 12785 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12786 return FALSE;
12787 }
12788 else if (htab->vxworks_p)
12789 {
7413f23f 12790 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12791 return FALSE;
7413f23f 12792 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12793 return FALSE;
7413f23f 12794 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12795 return FALSE;
7413f23f 12796 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12797 return FALSE;
12798 }
12799 else
12800 {
bd97cb95
DJ		 12801 bfd_signed_vma thumb_refs;
12802
12803 thumb_refs = eh->plt_thumb_refcount;
12804 if (!htab->use_blx)
12805 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12806
bd97cb95 12807 if (thumb_refs > 0)
4e617b1e 12808 {
7413f23f 12809 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12810 return FALSE;
12811 }
12812#ifdef FOUR_WORD_PLT
7413f23f 12813 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12814 return FALSE;
7413f23f 12815 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12816 return FALSE;
12817#else
906e58ca 12818 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12819 so only need to output a mapping symbol for the first PLT entry and
12820 entries with thumb thunks. */
bd97cb95 12821 if (thumb_refs > 0 || addr == 20)
4e617b1e 12822 {
7413f23f 12823 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12824 return FALSE;
12825 }
12826#endif
12827 }
12828
12829 return TRUE;
12830}
12831
7413f23f
DJ		 12832/* Output a single local symbol for a generated stub. */
12833
12834static bfd_boolean
12835elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12836 bfd_vma offset, bfd_vma size)
12837{
12838 struct elf32_arm_link_hash_table *htab;
12839 Elf_Internal_Sym sym;
12840
12841 htab = elf32_arm_hash_table (osi->info);
12842 sym.st_value = osi->sec->output_section->vma
12843 + osi->sec->output_offset
12844 + offset;
12845 sym.st_size = size;
12846 sym.st_other = 0;
12847 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12848 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12849 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12850}
4e617b1e 12851
da5938a2 12852static bfd_boolean
8029a119
NC		 12853arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12854 void * in_arg)
da5938a2
NC		 12855{
12856 struct elf32_arm_stub_hash_entry *stub_entry;
12857 struct bfd_link_info *info;
12858 struct elf32_arm_link_hash_table *htab;
12859 asection *stub_sec;
12860 bfd_vma addr;
7413f23f 12861 char *stub_name;
9a008db3 12862 output_arch_syminfo *osi;
461a49ca
DJ		 12863 const insn_sequence *template;
12864 enum stub_insn_type prev_type;
12865 int size;
12866 int i;
12867 enum map_symbol_type sym_type;
da5938a2
NC		 12868
12869 /* Massage our args to the form they really have. */
12870 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12871 osi = (output_arch_syminfo *) in_arg;
da5938a2 12872
da5938a2
NC		 12873 info = osi->info;
12874
12875 htab = elf32_arm_hash_table (info);
12876 stub_sec = stub_entry->stub_sec;
12877
12878 /* Ensure this stub is attached to the current section being
7413f23f 12879 processed. */
da5938a2
NC		 12880 if (stub_sec != osi->sec)
12881 return TRUE;
12882
7413f23f
DJ		 12883 addr = (bfd_vma) stub_entry->stub_offset;
12884 stub_name = stub_entry->output_name;
da5938a2 12885
461a49ca 12886 template = stub_entry->stub_template;
4e31c731 12887 switch (template[0].type)
7413f23f 12888 {
461a49ca
DJ		 12889 case ARM_TYPE:
12890 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12891 return FALSE;
12892 break;
461a49ca 12893 case THUMB16_TYPE:
48229727 12894 case THUMB32_TYPE:
461a49ca
DJ		 12895 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12896 stub_entry->stub_size))
da5938a2
NC		 12897 return FALSE;
12898 break;
12899 default:
12900 BFD_FAIL ();
48229727 12901 return 0;
7413f23f 12902 }
da5938a2 12903
461a49ca
DJ		 12904 prev_type = DATA_TYPE;
12905 size = 0;
12906 for (i = 0; i < stub_entry->stub_template_size; i++)
12907 {
4e31c731 12908 switch (template[i].type)
461a49ca
DJ		 12909 {
12910 case ARM_TYPE:
12911 sym_type = ARM_MAP_ARM;
12912 break;
12913
12914 case THUMB16_TYPE:
48229727 12915 case THUMB32_TYPE:
461a49ca
DJ		 12916 sym_type = ARM_MAP_THUMB;
12917 break;
12918
12919 case DATA_TYPE:
12920 sym_type = ARM_MAP_DATA;
12921 break;
12922
12923 default:
12924 BFD_FAIL ();
4e31c731 12925 return FALSE;
461a49ca
DJ		 12926 }
12927
12928 if (template[i].type != prev_type)
12929 {
12930 prev_type = template[i].type;
12931 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12932 return FALSE;
12933 }
12934
4e31c731 12935 switch (template[i].type)
461a49ca
DJ		 12936 {
12937 case ARM_TYPE:
48229727 12938 case THUMB32_TYPE:
461a49ca
DJ		 12939 size += 4;
12940 break;
12941
12942 case THUMB16_TYPE:
12943 size += 2;
12944 break;
12945
12946 case DATA_TYPE:
12947 size += 4;
12948 break;
12949
12950 default:
12951 BFD_FAIL ();
4e31c731 12952 return FALSE;
461a49ca
DJ		 12953 }
12954 }
12955
da5938a2
NC		 12956 return TRUE;
12957}
12958
91a5743d 12959/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 12960
12961static bfd_boolean
12962elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 12963 struct bfd_link_info *info,
12964 void *finfo,
6e0b88f1
AM		 12965 int (*func) (void *, const char *,
12966 Elf_Internal_Sym *,
12967 asection *,
12968 struct elf_link_hash_entry *))
4e617b1e
PB		 12969{
12970 output_arch_syminfo osi;
12971 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 12972 bfd_vma offset;
12973 bfd_size_type size;
4e617b1e
PB		 12974
12975 htab = elf32_arm_hash_table (info);
906e58ca 12976 check_use_blx (htab);
91a5743d 12977
4e617b1e
PB		 12978 osi.finfo = finfo;
12979 osi.info = info;
12980 osi.func = func;
906e58ca 12981
91a5743d
PB		 12982 /* ARM->Thumb glue. */
12983 if (htab->arm_glue_size > 0)
12984 {
12985 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12986 ARM2THUMB_GLUE_SECTION_NAME);
12987
12988 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12989 (output_bfd, osi.sec->output_section);
12990 if (info->shared || htab->root.is_relocatable_executable
12991 || htab->pic_veneer)
12992 size = ARM2THUMB_PIC_GLUE_SIZE;
12993 else if (htab->use_blx)
12994 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
12995 else
12996 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 12997
91a5743d
PB		 12998 for (offset = 0; offset < htab->arm_glue_size; offset += size)
12999 {
7413f23f
DJ		 13000 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13001 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13002 }
13003 }
13004
13005 /* Thumb->ARM glue. */
13006 if (htab->thumb_glue_size > 0)
13007 {
13008 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13009 THUMB2ARM_GLUE_SECTION_NAME);
13010
13011 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13012 (output_bfd, osi.sec->output_section);
13013 size = THUMB2ARM_GLUE_SIZE;
13014
13015 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13016 {
7413f23f
DJ		 13017 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13018 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13019 }
13020 }
13021
845b51d6
PB		 13022 /* ARMv4 BX veneers. */
13023 if (htab->bx_glue_size > 0)
13024 {
13025 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13026 ARM_BX_GLUE_SECTION_NAME);
13027
13028 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13029 (output_bfd, osi.sec->output_section);
13030
7413f23f 13031 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13032 }
13033
8029a119
NC		 13034 /* Long calls stubs. */
13035 if (htab->stub_bfd && htab->stub_bfd->sections)
13036 {
da5938a2 13037 asection* stub_sec;
8029a119 13038
da5938a2
NC		 13039 for (stub_sec = htab->stub_bfd->sections;
13040 stub_sec != NULL;
8029a119
NC		 13041 stub_sec = stub_sec->next)
13042 {
13043 /* Ignore non-stub sections. */
13044 if (!strstr (stub_sec->name, STUB_SUFFIX))
13045 continue;
da5938a2 13046
8029a119 13047 osi.sec = stub_sec;
da5938a2 13048
8029a119
NC		 13049 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13050 (output_bfd, osi.sec->output_section);
da5938a2 13051
8029a119
NC		 13052 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13053 }
13054 }
da5938a2 13055
91a5743d
PB		 13056 /* Finally, output mapping symbols for the PLT. */
13057 if (!htab->splt || htab->splt->size == 0)
13058 return TRUE;
13059
13060 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13061 htab->splt->output_section);
91a5743d 13062 osi.sec = htab->splt;
4e617b1e
PB		 13063 /* Output mapping symbols for the plt header. SymbianOS does not have a
13064 plt header. */
13065 if (htab->vxworks_p)
13066 {
13067 /* VxWorks shared libraries have no PLT header. */
13068 if (!info->shared)
13069 {
7413f23f 13070 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13071 return FALSE;
7413f23f 13072 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13073 return FALSE;
13074 }
13075 }
13076 else if (!htab->symbian_p)
13077 {
7413f23f 13078 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13079 return FALSE;
13080#ifndef FOUR_WORD_PLT
7413f23f 13081 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13082 return FALSE;
13083#endif
13084 }
13085
13086 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13087 return TRUE;
13088}
13089
e489d0ae
PB		 13090/* Allocate target specific section data. */
13091
13092static bfd_boolean
13093elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13094{
f592407e
AM		 13095 if (!sec->used_by_bfd)
13096 {
13097 _arm_elf_section_data *sdata;
13098 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13099
f592407e
AM		 13100 sdata = bfd_zalloc (abfd, amt);
13101 if (sdata == NULL)
13102 return FALSE;
13103 sec->used_by_bfd = sdata;
13104 }
e489d0ae 13105
957c6e41 13106 record_section_with_arm_elf_section_data (sec);
8e3de13a 13107
e489d0ae
PB		 13108 return _bfd_elf_new_section_hook (abfd, sec);
13109}
13110
13111
13112/* Used to order a list of mapping symbols by address. */
13113
13114static int
13115elf32_arm_compare_mapping (const void * a, const void * b)
13116{
7f6a71ff
JM		 13117 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13118 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13119
13120 if (amap->vma > bmap->vma)
13121 return 1;
13122 else if (amap->vma < bmap->vma)
13123 return -1;
13124 else if (amap->type > bmap->type)
13125 /* Ensure results do not depend on the host qsort for objects with
13126 multiple mapping symbols at the same address by sorting on type
13127 after vma. */
13128 return 1;
13129 else if (amap->type < bmap->type)
13130 return -1;
13131 else
13132 return 0;
e489d0ae
PB		 13133}
13134
2468f9c9
PB		 13135/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13136
13137static unsigned long
13138offset_prel31 (unsigned long addr, bfd_vma offset)
13139{
13140 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13141}
13142
13143/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13144 relocations. */
13145
13146static void
13147copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13148{
13149 unsigned long first_word = bfd_get_32 (output_bfd, from);
13150 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13151
13152 /* High bit of first word is supposed to be zero. */
13153 if ((first_word & 0x80000000ul) == 0)
13154 first_word = offset_prel31 (first_word, offset);
13155
13156 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13157 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13158 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13159 second_word = offset_prel31 (second_word, offset);
13160
13161 bfd_put_32 (output_bfd, first_word, to);
13162 bfd_put_32 (output_bfd, second_word, to + 4);
13163}
e489d0ae 13164
48229727
JB		 13165/* Data for make_branch_to_a8_stub(). */
13166
13167struct a8_branch_to_stub_data {
13168 asection *writing_section;
13169 bfd_byte *contents;
13170};
13171
13172
13173/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13174 places for a particular section. */
13175
13176static bfd_boolean
13177make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13178 void *in_arg)
13179{
13180 struct elf32_arm_stub_hash_entry *stub_entry;
13181 struct a8_branch_to_stub_data *data;
13182 bfd_byte *contents;
13183 unsigned long branch_insn;
13184 bfd_vma veneered_insn_loc, veneer_entry_loc;
13185 bfd_signed_vma branch_offset;
13186 bfd *abfd;
13187 unsigned int index;
13188
13189 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13190 data = (struct a8_branch_to_stub_data *) in_arg;
13191
13192 if (stub_entry->target_section != data->writing_section
13193 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13194 return TRUE;
13195
13196 contents = data->contents;
13197
13198 veneered_insn_loc = stub_entry->target_section->output_section->vma
13199 + stub_entry->target_section->output_offset
13200 + stub_entry->target_value;
13201
13202 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13203 + stub_entry->stub_sec->output_offset
13204 + stub_entry->stub_offset;
13205
13206 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13207 veneered_insn_loc &= ~3u;
13208
13209 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13210
13211 abfd = stub_entry->target_section->owner;
13212 index = stub_entry->target_value;
13213
13214 /* We attempt to avoid this condition by setting stubs_always_after_branch
13215 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13216 This check is just to be on the safe side... */
13217 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13218 {
13219 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13220 "allocated in unsafe location"), abfd);
13221 return FALSE;
13222 }
13223
13224 switch (stub_entry->stub_type)
13225 {
13226 case arm_stub_a8_veneer_b:
13227 case arm_stub_a8_veneer_b_cond:
13228 branch_insn = 0xf0009000;
13229 goto jump24;
13230
13231 case arm_stub_a8_veneer_blx:
13232 branch_insn = 0xf000e800;
13233 goto jump24;
13234
13235 case arm_stub_a8_veneer_bl:
13236 {
13237 unsigned int i1, j1, i2, j2, s;
13238
13239 branch_insn = 0xf000d000;
13240
13241 jump24:
13242 if (branch_offset < -16777216 || branch_offset > 16777214)
13243 {
13244 /* There's not much we can do apart from complain if this
13245 happens. */
13246 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13247 "of range (input file too large)"), abfd);
13248 return FALSE;
13249 }
13250
13251 /* i1 = not(j1 eor s), so:
13252 not i1 = j1 eor s
13253 j1 = (not i1) eor s. */
13254
13255 branch_insn |= (branch_offset >> 1) & 0x7ff;
13256 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13257 i2 = (branch_offset >> 22) & 1;
13258 i1 = (branch_offset >> 23) & 1;
13259 s = (branch_offset >> 24) & 1;
13260 j1 = (!i1) ^ s;
13261 j2 = (!i2) ^ s;
13262 branch_insn |= j2 << 11;
13263 branch_insn |= j1 << 13;
13264 branch_insn |= s << 26;
13265 }
13266 break;
13267
13268 default:
13269 BFD_FAIL ();
13270 return FALSE;
13271 }
13272
13273 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[index]);
13274 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[index + 2]);
13275
13276 return TRUE;
13277}
13278
e489d0ae
PB		 13279/* Do code byteswapping. Return FALSE afterwards so that the section is
13280 written out as normal. */
13281
13282static bfd_boolean
c7b8f16e 13283elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13284 struct bfd_link_info *link_info,
13285 asection *sec,
e489d0ae
PB		 13286 bfd_byte *contents)
13287{
48229727 13288 unsigned int mapcount, errcount;
8e3de13a 13289 _arm_elf_section_data *arm_data;
c7b8f16e 13290 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13291 elf32_arm_section_map *map;
c7b8f16e 13292 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13293 bfd_vma ptr;
13294 bfd_vma end;
c7b8f16e 13295 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13296 bfd_byte tmp;
48229727 13297 unsigned int i;
57e8b36a 13298
8e3de13a
NC		 13299 /* If this section has not been allocated an _arm_elf_section_data
13300 structure then we cannot record anything. */
13301 arm_data = get_arm_elf_section_data (sec);
13302 if (arm_data == NULL)
13303 return FALSE;
13304
13305 mapcount = arm_data->mapcount;
13306 map = arm_data->map;
c7b8f16e
JB		 13307 errcount = arm_data->erratumcount;
13308
13309 if (errcount != 0)
13310 {
13311 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13312
13313 for (errnode = arm_data->erratumlist; errnode != 0;
13314 errnode = errnode->next)
13315 {
13316 bfd_vma index = errnode->vma - offset;
13317
13318 switch (errnode->type)
13319 {
13320 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13321 {
13322 bfd_vma branch_to_veneer;
13323 /* Original condition code of instruction, plus bit mask for
13324 ARM B instruction. */
13325 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13326 | 0x0a000000;
13327
13328 /* The instruction is before the label. */
13329 index -= 4;
13330
13331 /* Above offset included in -4 below. */
13332 branch_to_veneer = errnode->u.b.veneer->vma
13333 - errnode->vma - 4;
13334
13335 if ((signed) branch_to_veneer < -(1 << 25)
13336 || (signed) branch_to_veneer >= (1 << 25))
13337 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13338 "range"), output_bfd);
13339
13340 insn |= (branch_to_veneer >> 2) & 0xffffff;
13341 contents[endianflip ^ index] = insn & 0xff;
13342 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13343 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13344 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13345 }
13346 break;
13347
13348 case VFP11_ERRATUM_ARM_VENEER:
13349 {
13350 bfd_vma branch_from_veneer;
13351 unsigned int insn;
13352
13353 /* Take size of veneer into account. */
13354 branch_from_veneer = errnode->u.v.branch->vma
13355 - errnode->vma - 12;
13356
13357 if ((signed) branch_from_veneer < -(1 << 25)
13358 || (signed) branch_from_veneer >= (1 << 25))
13359 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13360 "range"), output_bfd);
13361
13362 /* Original instruction. */
13363 insn = errnode->u.v.branch->u.b.vfp_insn;
13364 contents[endianflip ^ index] = insn & 0xff;
13365 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13366 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13367 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13368
13369 /* Branch back to insn after original insn. */
13370 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13371 contents[endianflip ^ (index + 4)] = insn & 0xff;
13372 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
13373 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
13374 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
13375 }
13376 break;
13377
13378 default:
13379 abort ();
13380 }
13381 }
13382 }
e489d0ae 13383
2468f9c9
PB		 13384 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13385 {
13386 arm_unwind_table_edit *edit_node
13387 = arm_data->u.exidx.unwind_edit_list;
13388 /* Now, sec->size is the size of the section we will write. The original
13389 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13390 markers) was sec->rawsize. (This isn't the case if we perform no
13391 edits, then rawsize will be zero and we should use size). */
13392 bfd_byte *edited_contents = bfd_malloc (sec->size);
13393 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13394 unsigned int in_index, out_index;
13395 bfd_vma add_to_offsets = 0;
13396
13397 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13398 {
13399 if (edit_node)
13400 {
13401 unsigned int edit_index = edit_node->index;
13402
13403 if (in_index < edit_index && in_index * 8 < input_size)
13404 {
13405 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13406 contents + in_index * 8, add_to_offsets);
13407 out_index++;
13408 in_index++;
13409 }
13410 else if (in_index == edit_index
13411 || (in_index * 8 >= input_size
13412 && edit_index == UINT_MAX))
13413 {
13414 switch (edit_node->type)
13415 {
13416 case DELETE_EXIDX_ENTRY:
13417 in_index++;
13418 add_to_offsets += 8;
13419 break;
13420
13421 case INSERT_EXIDX_CANTUNWIND_AT_END:
13422 {
13423 asection *text_sec = edit_node->linked_section;
13424 bfd_vma text_offset = text_sec->output_section->vma
13425 + text_sec->output_offset
13426 + text_sec->size;
13427 bfd_vma exidx_offset = offset + out_index * 8;
13428 unsigned long prel31_offset;
13429
13430 /* Note: this is meant to be equivalent to an
13431 R_ARM_PREL31 relocation. These synthetic
13432 EXIDX_CANTUNWIND markers are not relocated by the
13433 usual BFD method. */
13434 prel31_offset = (text_offset - exidx_offset)
13435 & 0x7ffffffful;
13436
13437 /* First address we can't unwind. */
13438 bfd_put_32 (output_bfd, prel31_offset,
13439 &edited_contents[out_index * 8]);
13440
13441 /* Code for EXIDX_CANTUNWIND. */
13442 bfd_put_32 (output_bfd, 0x1,
13443 &edited_contents[out_index * 8 + 4]);
13444
13445 out_index++;
13446 add_to_offsets -= 8;
13447 }
13448 break;
13449 }
13450
13451 edit_node = edit_node->next;
13452 }
13453 }
13454 else
13455 {
13456 /* No more edits, copy remaining entries verbatim. */
13457 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13458 contents + in_index * 8, add_to_offsets);
13459 out_index++;
13460 in_index++;
13461 }
13462 }
13463
13464 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13465 bfd_set_section_contents (output_bfd, sec->output_section,
13466 edited_contents,
13467 (file_ptr) sec->output_offset, sec->size);
13468
13469 return TRUE;
13470 }
13471
48229727
JB		 13472 /* Fix code to point to Cortex-A8 erratum stubs. */
13473 if (globals->fix_cortex_a8)
13474 {
13475 struct a8_branch_to_stub_data data;
13476
13477 data.writing_section = sec;
13478 data.contents = contents;
13479
13480 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13481 &data);
13482 }
13483
e489d0ae
PB		 13484 if (mapcount == 0)
13485 return FALSE;
13486
c7b8f16e 13487 if (globals->byteswap_code)
e489d0ae 13488 {
c7b8f16e 13489 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13490
c7b8f16e
JB		 13491 ptr = map[0].vma;
13492 for (i = 0; i < mapcount; i++)
13493 {
13494 if (i == mapcount - 1)
13495 end = sec->size;
13496 else
13497 end = map[i + 1].vma;
e489d0ae 13498
c7b8f16e 13499 switch (map[i].type)
e489d0ae 13500 {
c7b8f16e
JB		 13501 case 'a':
13502 /* Byte swap code words. */
13503 while (ptr + 3 < end)
13504 {
13505 tmp = contents[ptr];
13506 contents[ptr] = contents[ptr + 3];
13507 contents[ptr + 3] = tmp;
13508 tmp = contents[ptr + 1];
13509 contents[ptr + 1] = contents[ptr + 2];
13510 contents[ptr + 2] = tmp;
13511 ptr += 4;
13512 }
13513 break;
e489d0ae 13514
c7b8f16e
JB		 13515 case 't':
13516 /* Byte swap code halfwords. */
13517 while (ptr + 1 < end)
13518 {
13519 tmp = contents[ptr];
13520 contents[ptr] = contents[ptr + 1];
13521 contents[ptr + 1] = tmp;
13522 ptr += 2;
13523 }
13524 break;
13525
13526 case 'd':
13527 /* Leave data alone. */
13528 break;
13529 }
13530 ptr = end;
13531 }
e489d0ae 13532 }
8e3de13a 13533
93204d3a 13534 free (map);
8e3de13a 13535 arm_data->mapcount = 0;
c7b8f16e 13536 arm_data->mapsize = 0;
8e3de13a
NC		 13537 arm_data->map = NULL;
13538 unrecord_section_with_arm_elf_section_data (sec);
13539
e489d0ae
PB		 13540 return FALSE;
13541}
13542
957c6e41
NC		 13543static void
13544unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13545 asection * sec,
13546 void * ignore ATTRIBUTE_UNUSED)
13547{
13548 unrecord_section_with_arm_elf_section_data (sec);
13549}
13550
13551static bfd_boolean
13552elf32_arm_close_and_cleanup (bfd * abfd)
13553{
b25e3d87
L		 13554 if (abfd->sections)
13555 bfd_map_over_sections (abfd,
13556 unrecord_section_via_map_over_sections,
13557 NULL);
957c6e41
NC		 13558
13559 return _bfd_elf_close_and_cleanup (abfd);
13560}
13561
b25e3d87
L		 13562static bfd_boolean
13563elf32_arm_bfd_free_cached_info (bfd * abfd)
13564{
13565 if (abfd->sections)
13566 bfd_map_over_sections (abfd,
13567 unrecord_section_via_map_over_sections,
13568 NULL);
13569
13570 return _bfd_free_cached_info (abfd);
13571}
13572
b7693d02
DJ		 13573/* Display STT_ARM_TFUNC symbols as functions. */
13574
13575static void
13576elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13577 asymbol *asym)
13578{
13579 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13580
13581 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13582 elfsym->symbol.flags |= BSF_FUNCTION;
13583}
13584
0beaef2b
PB		 13585
13586/* Mangle thumb function symbols as we read them in. */
13587
8384fb8f 13588static bfd_boolean
0beaef2b
PB		 13589elf32_arm_swap_symbol_in (bfd * abfd,
13590 const void *psrc,
13591 const void *pshn,
13592 Elf_Internal_Sym *dst)
13593{
8384fb8f
AM		 13594 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13595 return FALSE;
0beaef2b
PB		 13596
13597 /* New EABI objects mark thumb function symbols by setting the low bit of
13598 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13599 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13600 && (dst->st_value & 1))
13601 {
13602 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13603 dst->st_value &= ~(bfd_vma) 1;
13604 }
8384fb8f 13605 return TRUE;
0beaef2b
PB		 13606}
13607
13608
13609/* Mangle thumb function symbols as we write them out. */
13610
13611static void
13612elf32_arm_swap_symbol_out (bfd *abfd,
13613 const Elf_Internal_Sym *src,
13614 void *cdst,
13615 void *shndx)
13616{
13617 Elf_Internal_Sym newsym;
13618
13619 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13620 of the address set, as per the new EABI. We do this unconditionally
13621 because objcopy does not set the elf header flags until after
13622 it writes out the symbol table. */
13623 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13624 {
13625 newsym = *src;
13626 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13627 if (newsym.st_shndx != SHN_UNDEF)
13628 {
13629 /* Do this only for defined symbols. At link type, the static
13630 linker will simulate the work of dynamic linker of resolving
13631 symbols and will carry over the thumbness of found symbols to
13632 the output symbol table. It's not clear how it happens, but
b0fead2b 13633 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13634 runtime, and writing '1' for them will be confusing for users
13635 and possibly for dynamic linker itself.
13636 */
13637 newsym.st_value |= 1;
13638 }
906e58ca 13639
0beaef2b
PB		 13640 src = &newsym;
13641 }
13642 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13643}
13644
b294bdf8
MM		 13645/* Add the PT_ARM_EXIDX program header. */
13646
13647static bfd_boolean
906e58ca 13648elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13649 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13650{
13651 struct elf_segment_map *m;
13652 asection *sec;
13653
13654 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13655 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13656 {
13657 /* If there is already a PT_ARM_EXIDX header, then we do not
13658 want to add another one. This situation arises when running
13659 "strip"; the input binary already has the header. */
13660 m = elf_tdata (abfd)->segment_map;
13661 while (m && m->p_type != PT_ARM_EXIDX)
13662 m = m->next;
13663 if (!m)
13664 {
13665 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13666 if (m == NULL)
13667 return FALSE;
13668 m->p_type = PT_ARM_EXIDX;
13669 m->count = 1;
13670 m->sections[0] = sec;
13671
13672 m->next = elf_tdata (abfd)->segment_map;
13673 elf_tdata (abfd)->segment_map = m;
13674 }
13675 }
13676
13677 return TRUE;
13678}
13679
13680/* We may add a PT_ARM_EXIDX program header. */
13681
13682static int
a6b96beb
AM		 13683elf32_arm_additional_program_headers (bfd *abfd,
13684 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13685{
13686 asection *sec;
13687
13688 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13689 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13690 return 1;
13691 else
13692 return 0;
13693}
13694
fcb93ecf 13695/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13696
fcb93ecf
PB		 13697static bfd_boolean
13698elf32_arm_is_function_type (unsigned int type)
13699{
0f88be7a 13700 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13701}
13702
0beaef2b 13703/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13704const struct elf_size_info elf32_arm_size_info =
13705{
0beaef2b
PB		 13706 sizeof (Elf32_External_Ehdr),
13707 sizeof (Elf32_External_Phdr),
13708 sizeof (Elf32_External_Shdr),
13709 sizeof (Elf32_External_Rel),
13710 sizeof (Elf32_External_Rela),
13711 sizeof (Elf32_External_Sym),
13712 sizeof (Elf32_External_Dyn),
13713 sizeof (Elf_External_Note),
13714 4,
13715 1,
13716 32, 2,
13717 ELFCLASS32, EV_CURRENT,
13718 bfd_elf32_write_out_phdrs,
13719 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13720 bfd_elf32_checksum_contents,
0beaef2b
PB		 13721 bfd_elf32_write_relocs,
13722 elf32_arm_swap_symbol_in,
13723 elf32_arm_swap_symbol_out,
13724 bfd_elf32_slurp_reloc_table,
13725 bfd_elf32_slurp_symbol_table,
13726 bfd_elf32_swap_dyn_in,
13727 bfd_elf32_swap_dyn_out,
13728 bfd_elf32_swap_reloc_in,
13729 bfd_elf32_swap_reloc_out,
13730 bfd_elf32_swap_reloca_in,
13731 bfd_elf32_swap_reloca_out
13732};
13733
252b5132
RH		 13734#define ELF_ARCH bfd_arch_arm
13735#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13736#ifdef __QNXTARGET__
13737#define ELF_MAXPAGESIZE 0x1000
13738#else
f21f3fe0 13739#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13740#endif
b1342370 13741#define ELF_MINPAGESIZE 0x1000
24718e3b 13742#define ELF_COMMONPAGESIZE 0x1000
252b5132 13743
ba93b8ac
DJ		 13744#define bfd_elf32_mkobject elf32_arm_mkobject
13745
99e4ae17
AJ		 13746#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13747#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13748#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13749#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13750#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13751#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13752#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13753#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13754#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13755#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13756#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13757#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13758#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13759#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13760#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13761
13762#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13763#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13764#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13765#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13766#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13767#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13768#define elf_backend_write_section elf32_arm_write_section
252b5132 13769#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13770#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13771#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13772#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13773#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13774#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13775#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13776#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13777#define elf_backend_object_p elf32_arm_object_p
e16bb312 13778#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13779#define elf_backend_fake_sections elf32_arm_fake_sections
13780#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13781#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13782#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13783#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13784#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13785#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13786#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13787#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13788#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13789#define elf_backend_is_function_type elf32_arm_is_function_type
13790
13791#define elf_backend_can_refcount 1
13792#define elf_backend_can_gc_sections 1
13793#define elf_backend_plt_readonly 1
13794#define elf_backend_want_got_plt 1
13795#define elf_backend_want_plt_sym 0
13796#define elf_backend_may_use_rel_p 1
13797#define elf_backend_may_use_rela_p 0
4e7fd91e 13798#define elf_backend_default_use_rela_p 0
252b5132 13799
04f7c78d 13800#define elf_backend_got_header_size 12
04f7c78d 13801
906e58ca
NC		 13802#undef elf_backend_obj_attrs_vendor
13803#define elf_backend_obj_attrs_vendor "aeabi"
13804#undef elf_backend_obj_attrs_section
13805#define elf_backend_obj_attrs_section ".ARM.attributes"
13806#undef elf_backend_obj_attrs_arg_type
13807#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13808#undef elf_backend_obj_attrs_section_type
104d59d1 13809#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13810#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13811
252b5132 13812#include "elf32-target.h"
7f266840 13813
906e58ca 13814/* VxWorks Targets. */
4e7fd91e 13815
906e58ca 13816#undef TARGET_LITTLE_SYM
4e7fd91e 13817#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13818#undef TARGET_LITTLE_NAME
4e7fd91e 13819#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13820#undef TARGET_BIG_SYM
4e7fd91e 13821#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13822#undef TARGET_BIG_NAME
4e7fd91e
PB		 13823#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13824
13825/* Like elf32_arm_link_hash_table_create -- but overrides
13826 appropriately for VxWorks. */
906e58ca 13827
4e7fd91e
PB		 13828static struct bfd_link_hash_table *
13829elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13830{
13831 struct bfd_link_hash_table *ret;
13832
13833 ret = elf32_arm_link_hash_table_create (abfd);
13834 if (ret)
13835 {
13836 struct elf32_arm_link_hash_table *htab
00a97672 13837 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13838 htab->use_rel = 0;
00a97672 13839 htab->vxworks_p = 1;
4e7fd91e
PB		 13840 }
13841 return ret;
906e58ca 13842}
4e7fd91e 13843
00a97672
RS		 13844static void
13845elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13846{
13847 elf32_arm_final_write_processing (abfd, linker);
13848 elf_vxworks_final_write_processing (abfd, linker);
13849}
13850
906e58ca 13851#undef elf32_bed
4e7fd91e
PB		 13852#define elf32_bed elf32_arm_vxworks_bed
13853
906e58ca
NC		 13854#undef bfd_elf32_bfd_link_hash_table_create
13855#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13856#undef elf_backend_add_symbol_hook
13857#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13858#undef elf_backend_final_write_processing
13859#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13860#undef elf_backend_emit_relocs
13861#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13862
906e58ca 13863#undef elf_backend_may_use_rel_p
00a97672 13864#define elf_backend_may_use_rel_p 0
906e58ca 13865#undef elf_backend_may_use_rela_p
00a97672 13866#define elf_backend_may_use_rela_p 1
906e58ca 13867#undef elf_backend_default_use_rela_p
00a97672 13868#define elf_backend_default_use_rela_p 1
906e58ca 13869#undef elf_backend_want_plt_sym
00a97672 13870#define elf_backend_want_plt_sym 1
906e58ca 13871#undef ELF_MAXPAGESIZE
00a97672 13872#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13873
13874#include "elf32-target.h"
13875
13876
906e58ca 13877/* Symbian OS Targets. */
7f266840 13878
906e58ca 13879#undef TARGET_LITTLE_SYM
7f266840 13880#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 13881#undef TARGET_LITTLE_NAME
7f266840 13882#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 13883#undef TARGET_BIG_SYM
7f266840 13884#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 13885#undef TARGET_BIG_NAME
7f266840
DJ		 13886#define TARGET_BIG_NAME "elf32-bigarm-symbian"
13887
13888/* Like elf32_arm_link_hash_table_create -- but overrides
13889 appropriately for Symbian OS. */
906e58ca 13890
7f266840
DJ		 13891static struct bfd_link_hash_table *
13892elf32_arm_symbian_link_hash_table_create (bfd *abfd)
13893{
13894 struct bfd_link_hash_table *ret;
13895
13896 ret = elf32_arm_link_hash_table_create (abfd);
13897 if (ret)
13898 {
13899 struct elf32_arm_link_hash_table *htab
13900 = (struct elf32_arm_link_hash_table *)ret;
13901 /* There is no PLT header for Symbian OS. */
13902 htab->plt_header_size = 0;
95720a86
DJ		 13903 /* The PLT entries are each one instruction and one word. */
13904 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 13905 htab->symbian_p = 1;
33bfe774
JB		 13906 /* Symbian uses armv5t or above, so use_blx is always true. */
13907 htab->use_blx = 1;
67687978 13908 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 13909 }
13910 return ret;
906e58ca 13911}
7f266840 13912
b35d266b 13913static const struct bfd_elf_special_section
551b43fd 13914elf32_arm_symbian_special_sections[] =
7f266840 13915{
5cd3778d
MM		 13916 /* In a BPABI executable, the dynamic linking sections do not go in
13917 the loadable read-only segment. The post-linker may wish to
13918 refer to these sections, but they are not part of the final
13919 program image. */
0112cd26
NC		 13920 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
13921 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
13922 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
13923 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
13924 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 13925 /* These sections do not need to be writable as the SymbianOS
13926 postlinker will arrange things so that no dynamic relocation is
13927 required. */
0112cd26
NC		 13928 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
13929 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
13930 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
13931 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 13932};
13933
c3c76620 13934static void
906e58ca 13935elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 13936 struct bfd_link_info *link_info)
c3c76620
MM		 13937{
13938 /* BPABI objects are never loaded directly by an OS kernel; they are
13939 processed by a postlinker first, into an OS-specific format. If
13940 the D_PAGED bit is set on the file, BFD will align segments on
13941 page boundaries, so that an OS can directly map the file. With
13942 BPABI objects, that just results in wasted space. In addition,
13943 because we clear the D_PAGED bit, map_sections_to_segments will
13944 recognize that the program headers should not be mapped into any
13945 loadable segment. */
13946 abfd->flags &= ~D_PAGED;
906e58ca 13947 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 13948}
7f266840
DJ		 13949
13950static bfd_boolean
906e58ca 13951elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 13952 struct bfd_link_info *info)
7f266840
DJ		 13953{
13954 struct elf_segment_map *m;
13955 asection *dynsec;
13956
7f266840
DJ		 13957 /* BPABI shared libraries and executables should have a PT_DYNAMIC
13958 segment. However, because the .dynamic section is not marked
13959 with SEC_LOAD, the generic ELF code will not create such a
13960 segment. */
13961 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
13962 if (dynsec)
13963 {
8ded5a0f
AM		 13964 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
13965 if (m->p_type == PT_DYNAMIC)
13966 break;
13967
13968 if (m == NULL)
13969 {
13970 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
13971 m->next = elf_tdata (abfd)->segment_map;
13972 elf_tdata (abfd)->segment_map = m;
13973 }
7f266840
DJ		 13974 }
13975
b294bdf8
MM		 13976 /* Also call the generic arm routine. */
13977 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 13978}
13979
95720a86
DJ		 13980/* Return address for Ith PLT stub in section PLT, for relocation REL
13981 or (bfd_vma) -1 if it should not be included. */
13982
13983static bfd_vma
13984elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
13985 const arelent *rel ATTRIBUTE_UNUSED)
13986{
13987 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
13988}
13989
13990
8029a119 13991#undef elf32_bed
7f266840
DJ		 13992#define elf32_bed elf32_arm_symbian_bed
13993
13994/* The dynamic sections are not allocated on SymbianOS; the postlinker
13995 will process them and then discard them. */
906e58ca 13996#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 13997#define ELF_DYNAMIC_SEC_FLAGS \
13998 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
13999
00a97672 14000#undef elf_backend_add_symbol_hook
00a97672 14001#undef elf_backend_emit_relocs
c3c76620 14002
906e58ca
NC		 14003#undef bfd_elf32_bfd_link_hash_table_create
14004#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14005#undef elf_backend_special_sections
14006#define elf_backend_special_sections elf32_arm_symbian_special_sections
14007#undef elf_backend_begin_write_processing
14008#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14009#undef elf_backend_final_write_processing
14010#define elf_backend_final_write_processing elf32_arm_final_write_processing
14011
14012#undef elf_backend_modify_segment_map
7f266840
DJ		 14013#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14014
14015/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14016#undef elf_backend_got_header_size
7f266840
DJ		 14017#define elf_backend_got_header_size 0
14018
14019/* Similarly, there is no .got.plt section. */
906e58ca 14020#undef elf_backend_want_got_plt
7f266840
DJ		 14021#define elf_backend_want_got_plt 0
14022
906e58ca 14023#undef elf_backend_plt_sym_val
95720a86
DJ		 14024#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14025
906e58ca 14026#undef elf_backend_may_use_rel_p
00a97672 14027#define elf_backend_may_use_rel_p 1
906e58ca 14028#undef elf_backend_may_use_rela_p
00a97672 14029#define elf_backend_may_use_rela_p 0
906e58ca 14030#undef elf_backend_default_use_rela_p
00a97672 14031#define elf_backend_default_use_rela_p 0
906e58ca 14032#undef elf_backend_want_plt_sym
00a97672 14033#define elf_backend_want_plt_sym 0
906e58ca 14034#undef ELF_MAXPAGESIZE
00a97672 14035#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14036
7f266840 14037#include "elf32-target.h"
GDB Binutils - Deliverables
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