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* section.c (bfd_get_linker_section): New function.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
1d7e9d18 3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
6034aab8 26#include "bfd_stdint.h"
00a97672 27#include "libiberty.h"
7f266840
DJ		 28#include "libbfd.h"
29#include "elf-bfd.h"
b38cadfb 30#include "elf-nacl.h"
00a97672 31#include "elf-vxworks.h"
ee065d83 32#include "elf/arm.h"
7f266840 33
00a97672
RS		 34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ		 60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 227 24, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840 233 FALSE, /* partial_inplace */
7f6ab9f8
AM		 234 0x07ff2fff, /* src_mask */
235 0x07ff2fff, /* dst_mask */
7f266840
DJ		 236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840 265
0855e32b 266 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 267 0, /* rightshift */
0855e32b
NS		 268 2, /* size (0 = byte, 1 = short, 2 = long) */
269 32, /* bitsize */
7f266840
DJ		 270 FALSE, /* pc_relative */
271 0, /* bitpos */
0855e32b 272 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 273 bfd_elf_generic_reloc, /* special_function */
0855e32b 274 "R_ARM_TLS_DESC", /* name */
7f266840 275 FALSE, /* partial_inplace */
0855e32b
NS		 276 0xffffffff, /* src_mask */
277 0xffffffff, /* dst_mask */
7f266840
DJ		 278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 298 24, /* bitsize */
7f266840
DJ		 299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 313 24, /* bitsize */
7f266840
DJ		 314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
7f6ab9f8
AM		 320 0x07ff2fff, /* src_mask */
321 0x07ff2fff, /* dst_mask */
7f266840
DJ		 322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
0855e32b
NS		 1357 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1358 0, /* rightshift */
1359 2, /* size (0 = byte, 1 = short, 2 = long) */
1360 32, /* bitsize */
1361 FALSE, /* pc_relative */
1362 0, /* bitpos */
1363 complain_overflow_bitfield,/* complain_on_overflow */
1364 NULL, /* special_function */
1365 "R_ARM_TLS_GOTDESC", /* name */
1366 TRUE, /* partial_inplace */
1367 0xffffffff, /* src_mask */
1368 0xffffffff, /* dst_mask */
1369 FALSE), /* pcrel_offset */
1370
1371 HOWTO (R_ARM_TLS_CALL, /* type */
1372 0, /* rightshift */
1373 2, /* size (0 = byte, 1 = short, 2 = long) */
1374 24, /* bitsize */
1375 FALSE, /* pc_relative */
1376 0, /* bitpos */
1377 complain_overflow_dont,/* complain_on_overflow */
1378 bfd_elf_generic_reloc, /* special_function */
1379 "R_ARM_TLS_CALL", /* name */
1380 FALSE, /* partial_inplace */
1381 0x00ffffff, /* src_mask */
1382 0x00ffffff, /* dst_mask */
1383 FALSE), /* pcrel_offset */
1384
1385 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1386 0, /* rightshift */
1387 2, /* size (0 = byte, 1 = short, 2 = long) */
1388 0, /* bitsize */
1389 FALSE, /* pc_relative */
1390 0, /* bitpos */
1391 complain_overflow_bitfield,/* complain_on_overflow */
1392 bfd_elf_generic_reloc, /* special_function */
1393 "R_ARM_TLS_DESCSEQ", /* name */
1394 FALSE, /* partial_inplace */
1395 0x00000000, /* src_mask */
1396 0x00000000, /* dst_mask */
1397 FALSE), /* pcrel_offset */
1398
1399 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1400 0, /* rightshift */
1401 2, /* size (0 = byte, 1 = short, 2 = long) */
1402 24, /* bitsize */
1403 FALSE, /* pc_relative */
1404 0, /* bitpos */
1405 complain_overflow_dont,/* complain_on_overflow */
1406 bfd_elf_generic_reloc, /* special_function */
1407 "R_ARM_THM_TLS_CALL", /* name */
1408 FALSE, /* partial_inplace */
1409 0x07ff07ff, /* src_mask */
1410 0x07ff07ff, /* dst_mask */
1411 FALSE), /* pcrel_offset */
c19d1205
ZW		 1412
1413 HOWTO (R_ARM_PLT32_ABS, /* type */
1414 0, /* rightshift */
1415 2, /* size (0 = byte, 1 = short, 2 = long) */
1416 32, /* bitsize */
1417 FALSE, /* pc_relative */
1418 0, /* bitpos */
1419 complain_overflow_dont,/* complain_on_overflow */
1420 bfd_elf_generic_reloc, /* special_function */
1421 "R_ARM_PLT32_ABS", /* name */
1422 FALSE, /* partial_inplace */
1423 0xffffffff, /* src_mask */
1424 0xffffffff, /* dst_mask */
1425 FALSE), /* pcrel_offset */
1426
1427 HOWTO (R_ARM_GOT_ABS, /* type */
1428 0, /* rightshift */
1429 2, /* size (0 = byte, 1 = short, 2 = long) */
1430 32, /* bitsize */
1431 FALSE, /* pc_relative */
1432 0, /* bitpos */
1433 complain_overflow_dont,/* complain_on_overflow */
1434 bfd_elf_generic_reloc, /* special_function */
1435 "R_ARM_GOT_ABS", /* name */
1436 FALSE, /* partial_inplace */
1437 0xffffffff, /* src_mask */
1438 0xffffffff, /* dst_mask */
1439 FALSE), /* pcrel_offset */
1440
1441 HOWTO (R_ARM_GOT_PREL, /* type */
1442 0, /* rightshift */
1443 2, /* size (0 = byte, 1 = short, 2 = long) */
1444 32, /* bitsize */
1445 TRUE, /* pc_relative */
1446 0, /* bitpos */
1447 complain_overflow_dont, /* complain_on_overflow */
1448 bfd_elf_generic_reloc, /* special_function */
1449 "R_ARM_GOT_PREL", /* name */
1450 FALSE, /* partial_inplace */
1451 0xffffffff, /* src_mask */
1452 0xffffffff, /* dst_mask */
1453 TRUE), /* pcrel_offset */
1454
1455 HOWTO (R_ARM_GOT_BREL12, /* type */
1456 0, /* rightshift */
1457 2, /* size (0 = byte, 1 = short, 2 = long) */
1458 12, /* bitsize */
1459 FALSE, /* pc_relative */
1460 0, /* bitpos */
1461 complain_overflow_bitfield,/* complain_on_overflow */
1462 bfd_elf_generic_reloc, /* special_function */
1463 "R_ARM_GOT_BREL12", /* name */
1464 FALSE, /* partial_inplace */
1465 0x00000fff, /* src_mask */
1466 0x00000fff, /* dst_mask */
1467 FALSE), /* pcrel_offset */
1468
1469 HOWTO (R_ARM_GOTOFF12, /* type */
1470 0, /* rightshift */
1471 2, /* size (0 = byte, 1 = short, 2 = long) */
1472 12, /* bitsize */
1473 FALSE, /* pc_relative */
1474 0, /* bitpos */
1475 complain_overflow_bitfield,/* complain_on_overflow */
1476 bfd_elf_generic_reloc, /* special_function */
1477 "R_ARM_GOTOFF12", /* name */
1478 FALSE, /* partial_inplace */
1479 0x00000fff, /* src_mask */
1480 0x00000fff, /* dst_mask */
1481 FALSE), /* pcrel_offset */
1482
1483 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1484
1485 /* GNU extension to record C++ vtable member usage */
1486 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1487 0, /* rightshift */
1488 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1489 0, /* bitsize */
ba93b8ac
DJ		 1490 FALSE, /* pc_relative */
1491 0, /* bitpos */
c19d1205
ZW		 1492 complain_overflow_dont, /* complain_on_overflow */
1493 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1494 "R_ARM_GNU_VTENTRY", /* name */
1495 FALSE, /* partial_inplace */
1496 0, /* src_mask */
1497 0, /* dst_mask */
1498 FALSE), /* pcrel_offset */
1499
1500 /* GNU extension to record C++ vtable hierarchy */
1501 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1502 0, /* rightshift */
1503 2, /* size (0 = byte, 1 = short, 2 = long) */
1504 0, /* bitsize */
1505 FALSE, /* pc_relative */
1506 0, /* bitpos */
1507 complain_overflow_dont, /* complain_on_overflow */
1508 NULL, /* special_function */
1509 "R_ARM_GNU_VTINHERIT", /* name */
1510 FALSE, /* partial_inplace */
1511 0, /* src_mask */
1512 0, /* dst_mask */
1513 FALSE), /* pcrel_offset */
1514
1515 HOWTO (R_ARM_THM_JUMP11, /* type */
1516 1, /* rightshift */
1517 1, /* size (0 = byte, 1 = short, 2 = long) */
1518 11, /* bitsize */
1519 TRUE, /* pc_relative */
1520 0, /* bitpos */
1521 complain_overflow_signed, /* complain_on_overflow */
1522 bfd_elf_generic_reloc, /* special_function */
1523 "R_ARM_THM_JUMP11", /* name */
1524 FALSE, /* partial_inplace */
1525 0x000007ff, /* src_mask */
1526 0x000007ff, /* dst_mask */
1527 TRUE), /* pcrel_offset */
1528
1529 HOWTO (R_ARM_THM_JUMP8, /* type */
1530 1, /* rightshift */
1531 1, /* size (0 = byte, 1 = short, 2 = long) */
1532 8, /* bitsize */
1533 TRUE, /* pc_relative */
1534 0, /* bitpos */
1535 complain_overflow_signed, /* complain_on_overflow */
1536 bfd_elf_generic_reloc, /* special_function */
1537 "R_ARM_THM_JUMP8", /* name */
1538 FALSE, /* partial_inplace */
1539 0x000000ff, /* src_mask */
1540 0x000000ff, /* dst_mask */
1541 TRUE), /* pcrel_offset */
ba93b8ac 1542
c19d1205
ZW		 1543 /* TLS relocations */
1544 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1545 0, /* rightshift */
1546 2, /* size (0 = byte, 1 = short, 2 = long) */
1547 32, /* bitsize */
1548 FALSE, /* pc_relative */
1549 0, /* bitpos */
1550 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1551 NULL, /* special_function */
1552 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1553 TRUE, /* partial_inplace */
1554 0xffffffff, /* src_mask */
1555 0xffffffff, /* dst_mask */
c19d1205 1556 FALSE), /* pcrel_offset */
ba93b8ac 1557
ba93b8ac
DJ		 1558 HOWTO (R_ARM_TLS_LDM32, /* type */
1559 0, /* rightshift */
1560 2, /* size (0 = byte, 1 = short, 2 = long) */
1561 32, /* bitsize */
1562 FALSE, /* pc_relative */
1563 0, /* bitpos */
1564 complain_overflow_bitfield,/* complain_on_overflow */
1565 bfd_elf_generic_reloc, /* special_function */
1566 "R_ARM_TLS_LDM32", /* name */
1567 TRUE, /* partial_inplace */
1568 0xffffffff, /* src_mask */
1569 0xffffffff, /* dst_mask */
c19d1205 1570 FALSE), /* pcrel_offset */
ba93b8ac 1571
c19d1205 1572 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1573 0, /* rightshift */
1574 2, /* size (0 = byte, 1 = short, 2 = long) */
1575 32, /* bitsize */
1576 FALSE, /* pc_relative */
1577 0, /* bitpos */
1578 complain_overflow_bitfield,/* complain_on_overflow */
1579 bfd_elf_generic_reloc, /* special_function */
c19d1205 1580 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1581 TRUE, /* partial_inplace */
1582 0xffffffff, /* src_mask */
1583 0xffffffff, /* dst_mask */
c19d1205 1584 FALSE), /* pcrel_offset */
ba93b8ac 1585
ba93b8ac
DJ		 1586 HOWTO (R_ARM_TLS_IE32, /* type */
1587 0, /* rightshift */
1588 2, /* size (0 = byte, 1 = short, 2 = long) */
1589 32, /* bitsize */
1590 FALSE, /* pc_relative */
1591 0, /* bitpos */
1592 complain_overflow_bitfield,/* complain_on_overflow */
1593 NULL, /* special_function */
1594 "R_ARM_TLS_IE32", /* name */
1595 TRUE, /* partial_inplace */
1596 0xffffffff, /* src_mask */
1597 0xffffffff, /* dst_mask */
c19d1205 1598 FALSE), /* pcrel_offset */
7f266840 1599
c19d1205 1600 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1601 0, /* rightshift */
1602 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1603 32, /* bitsize */
7f266840
DJ		 1604 FALSE, /* pc_relative */
1605 0, /* bitpos */
c19d1205
ZW		 1606 complain_overflow_bitfield,/* complain_on_overflow */
1607 bfd_elf_generic_reloc, /* special_function */
1608 "R_ARM_TLS_LE32", /* name */
1609 TRUE, /* partial_inplace */
1610 0xffffffff, /* src_mask */
1611 0xffffffff, /* dst_mask */
1612 FALSE), /* pcrel_offset */
7f266840 1613
c19d1205
ZW		 1614 HOWTO (R_ARM_TLS_LDO12, /* type */
1615 0, /* rightshift */
1616 2, /* size (0 = byte, 1 = short, 2 = long) */
1617 12, /* bitsize */
1618 FALSE, /* pc_relative */
7f266840 1619 0, /* bitpos */
c19d1205 1620 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1621 bfd_elf_generic_reloc, /* special_function */
c19d1205 1622 "R_ARM_TLS_LDO12", /* name */
7f266840 1623 FALSE, /* partial_inplace */
c19d1205
ZW		 1624 0x00000fff, /* src_mask */
1625 0x00000fff, /* dst_mask */
1626 FALSE), /* pcrel_offset */
7f266840 1627
c19d1205
ZW		 1628 HOWTO (R_ARM_TLS_LE12, /* type */
1629 0, /* rightshift */
1630 2, /* size (0 = byte, 1 = short, 2 = long) */
1631 12, /* bitsize */
1632 FALSE, /* pc_relative */
7f266840 1633 0, /* bitpos */
c19d1205 1634 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1635 bfd_elf_generic_reloc, /* special_function */
c19d1205 1636 "R_ARM_TLS_LE12", /* name */
7f266840 1637 FALSE, /* partial_inplace */
c19d1205
ZW		 1638 0x00000fff, /* src_mask */
1639 0x00000fff, /* dst_mask */
1640 FALSE), /* pcrel_offset */
7f266840 1641
c19d1205 1642 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1643 0, /* rightshift */
1644 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1645 12, /* bitsize */
1646 FALSE, /* pc_relative */
7f266840 1647 0, /* bitpos */
c19d1205 1648 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1649 bfd_elf_generic_reloc, /* special_function */
c19d1205 1650 "R_ARM_TLS_IE12GP", /* name */
7f266840 1651 FALSE, /* partial_inplace */
c19d1205
ZW		 1652 0x00000fff, /* src_mask */
1653 0x00000fff, /* dst_mask */
1654 FALSE), /* pcrel_offset */
0855e32b 1655
34e77a92 1656 /* 112-127 private relocations. */
0855e32b
NS		 1657 EMPTY_HOWTO (112),
1658 EMPTY_HOWTO (113),
1659 EMPTY_HOWTO (114),
1660 EMPTY_HOWTO (115),
1661 EMPTY_HOWTO (116),
1662 EMPTY_HOWTO (117),
1663 EMPTY_HOWTO (118),
1664 EMPTY_HOWTO (119),
1665 EMPTY_HOWTO (120),
1666 EMPTY_HOWTO (121),
1667 EMPTY_HOWTO (122),
1668 EMPTY_HOWTO (123),
1669 EMPTY_HOWTO (124),
1670 EMPTY_HOWTO (125),
1671 EMPTY_HOWTO (126),
1672 EMPTY_HOWTO (127),
34e77a92
RS		 1673
1674 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1675 EMPTY_HOWTO (128),
1676
1677 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 0, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_bitfield,/* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_ARM_THM_TLS_DESCSEQ",/* name */
1686 FALSE, /* partial_inplace */
1687 0x00000000, /* src_mask */
1688 0x00000000, /* dst_mask */
1689 FALSE), /* pcrel_offset */
c19d1205
ZW		 1690};
1691
34e77a92
RS		 1692/* 160 onwards: */
1693static reloc_howto_type elf32_arm_howto_table_2[1] =
1694{
1695 HOWTO (R_ARM_IRELATIVE, /* type */
1696 0, /* rightshift */
1697 2, /* size (0 = byte, 1 = short, 2 = long) */
1698 32, /* bitsize */
1699 FALSE, /* pc_relative */
1700 0, /* bitpos */
1701 complain_overflow_bitfield,/* complain_on_overflow */
1702 bfd_elf_generic_reloc, /* special_function */
1703 "R_ARM_IRELATIVE", /* name */
1704 TRUE, /* partial_inplace */
1705 0xffffffff, /* src_mask */
1706 0xffffffff, /* dst_mask */
1707 FALSE) /* pcrel_offset */
1708};
c19d1205 1709
34e77a92
RS		 1710/* 249-255 extended, currently unused, relocations: */
1711static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1712{
1713 HOWTO (R_ARM_RREL32, /* type */
1714 0, /* rightshift */
1715 0, /* size (0 = byte, 1 = short, 2 = long) */
1716 0, /* bitsize */
1717 FALSE, /* pc_relative */
1718 0, /* bitpos */
1719 complain_overflow_dont,/* complain_on_overflow */
1720 bfd_elf_generic_reloc, /* special_function */
1721 "R_ARM_RREL32", /* name */
1722 FALSE, /* partial_inplace */
1723 0, /* src_mask */
1724 0, /* dst_mask */
1725 FALSE), /* pcrel_offset */
1726
1727 HOWTO (R_ARM_RABS32, /* type */
1728 0, /* rightshift */
1729 0, /* size (0 = byte, 1 = short, 2 = long) */
1730 0, /* bitsize */
1731 FALSE, /* pc_relative */
1732 0, /* bitpos */
1733 complain_overflow_dont,/* complain_on_overflow */
1734 bfd_elf_generic_reloc, /* special_function */
1735 "R_ARM_RABS32", /* name */
1736 FALSE, /* partial_inplace */
1737 0, /* src_mask */
1738 0, /* dst_mask */
1739 FALSE), /* pcrel_offset */
1740
1741 HOWTO (R_ARM_RPC24, /* type */
1742 0, /* rightshift */
1743 0, /* size (0 = byte, 1 = short, 2 = long) */
1744 0, /* bitsize */
1745 FALSE, /* pc_relative */
1746 0, /* bitpos */
1747 complain_overflow_dont,/* complain_on_overflow */
1748 bfd_elf_generic_reloc, /* special_function */
1749 "R_ARM_RPC24", /* name */
1750 FALSE, /* partial_inplace */
1751 0, /* src_mask */
1752 0, /* dst_mask */
1753 FALSE), /* pcrel_offset */
1754
1755 HOWTO (R_ARM_RBASE, /* type */
1756 0, /* rightshift */
1757 0, /* size (0 = byte, 1 = short, 2 = long) */
1758 0, /* bitsize */
1759 FALSE, /* pc_relative */
1760 0, /* bitpos */
1761 complain_overflow_dont,/* complain_on_overflow */
1762 bfd_elf_generic_reloc, /* special_function */
1763 "R_ARM_RBASE", /* name */
1764 FALSE, /* partial_inplace */
1765 0, /* src_mask */
1766 0, /* dst_mask */
1767 FALSE) /* pcrel_offset */
1768};
1769
1770static reloc_howto_type *
1771elf32_arm_howto_from_type (unsigned int r_type)
1772{
906e58ca 1773 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1774 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1775
34e77a92
RS		 1776 if (r_type == R_ARM_IRELATIVE)
1777 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1778
c19d1205 1779 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1780 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1781 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1782
c19d1205 1783 return NULL;
7f266840
DJ		 1784}
1785
1786static void
1787elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1788 Elf_Internal_Rela * elf_reloc)
1789{
1790 unsigned int r_type;
1791
1792 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1793 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1794}
1795
1796struct elf32_arm_reloc_map
1797 {
1798 bfd_reloc_code_real_type bfd_reloc_val;
1799 unsigned char elf_reloc_val;
1800 };
1801
1802/* All entries in this list must also be present in elf32_arm_howto_table. */
1803static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1804 {
1805 {BFD_RELOC_NONE, R_ARM_NONE},
1806 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1807 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1808 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1809 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1810 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1811 {BFD_RELOC_32, R_ARM_ABS32},
1812 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1813 {BFD_RELOC_8, R_ARM_ABS8},
1814 {BFD_RELOC_16, R_ARM_ABS16},
1815 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1816 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1817 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1823 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1824 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1825 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1826 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1827 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1828 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1829 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1830 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1831 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1832 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1833 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1834 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1835 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1836 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1837 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1838 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1839 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1840 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1841 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1842 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1843 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1844 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1845 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1846 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1847 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1848 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1849 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1850 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1851 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1852 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1853 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1854 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1855 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1856 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1857 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1858 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1860 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1862 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1864 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1866 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1867 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1868 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1869 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1870 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1871 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1872 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1873 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1874 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1875 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1876 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1878 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1880 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1881 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1882 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1883 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1884 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1885 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1886 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1887 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1888 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1889 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1890 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1891 };
1892
1893static reloc_howto_type *
f1c71a59
ZW		 1894elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1895 bfd_reloc_code_real_type code)
7f266840
DJ		 1896{
1897 unsigned int i;
8029a119 1898
906e58ca 1899 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1900 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1901 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1902
c19d1205 1903 return NULL;
7f266840
DJ		 1904}
1905
157090f7
AM		 1906static reloc_howto_type *
1907elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1908 const char *r_name)
1909{
1910 unsigned int i;
1911
906e58ca 1912 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1913 if (elf32_arm_howto_table_1[i].name != NULL
1914 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1915 return &elf32_arm_howto_table_1[i];
1916
906e58ca 1917 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1918 if (elf32_arm_howto_table_2[i].name != NULL
1919 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1920 return &elf32_arm_howto_table_2[i];
1921
34e77a92
RS		 1922 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1923 if (elf32_arm_howto_table_3[i].name != NULL
1924 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1925 return &elf32_arm_howto_table_3[i];
1926
157090f7
AM		 1927 return NULL;
1928}
1929
906e58ca
NC		 1930/* Support for core dump NOTE sections. */
1931
7f266840 1932static bfd_boolean
f1c71a59 1933elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1934{
1935 int offset;
1936 size_t size;
1937
1938 switch (note->descsz)
1939 {
1940 default:
1941 return FALSE;
1942
8029a119 1943 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1944 /* pr_cursig */
1945 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1946
1947 /* pr_pid */
261b8d08 1948 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1949
1950 /* pr_reg */
1951 offset = 72;
1952 size = 72;
1953
1954 break;
1955 }
1956
1957 /* Make a ".reg/999" section. */
1958 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1959 size, note->descpos + offset);
1960}
1961
1962static bfd_boolean
f1c71a59 1963elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1964{
1965 switch (note->descsz)
1966 {
1967 default:
1968 return FALSE;
1969
8029a119 1970 case 124: /* Linux/ARM elf_prpsinfo. */
4395ee08
UW		 1971 elf_tdata (abfd)->core_pid
1972 = bfd_get_32 (abfd, note->descdata + 12);
7f266840
DJ		 1973 elf_tdata (abfd)->core_program
1974 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1975 elf_tdata (abfd)->core_command
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1977 }
1978
1979 /* Note that for some reason, a spurious space is tacked
1980 onto the end of the args in some (at least one anyway)
1981 implementations, so strip it off if it exists. */
7f266840
DJ		 1982 {
1983 char *command = elf_tdata (abfd)->core_command;
1984 int n = strlen (command);
1985
1986 if (0 < n && command[n - 1] == ' ')
1987 command[n - 1] = '\0';
1988 }
1989
1990 return TRUE;
1991}
1992
1f20dca5
UW		 1993static char *
1994elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1995 int note_type, ...)
1996{
1997 switch (note_type)
1998 {
1999 default:
2000 return NULL;
2001
2002 case NT_PRPSINFO:
2003 {
2004 char data[124];
2005 va_list ap;
2006
2007 va_start (ap, note_type);
2008 memset (data, 0, sizeof (data));
2009 strncpy (data + 28, va_arg (ap, const char *), 16);
2010 strncpy (data + 44, va_arg (ap, const char *), 80);
2011 va_end (ap);
2012
2013 return elfcore_write_note (abfd, buf, bufsiz,
2014 "CORE", note_type, data, sizeof (data));
2015 }
2016
2017 case NT_PRSTATUS:
2018 {
2019 char data[148];
2020 va_list ap;
2021 long pid;
2022 int cursig;
2023 const void *greg;
2024
2025 va_start (ap, note_type);
2026 memset (data, 0, sizeof (data));
2027 pid = va_arg (ap, long);
2028 bfd_put_32 (abfd, pid, data + 24);
2029 cursig = va_arg (ap, int);
2030 bfd_put_16 (abfd, cursig, data + 12);
2031 greg = va_arg (ap, const void *);
2032 memcpy (data + 72, greg, 72);
2033 va_end (ap);
2034
2035 return elfcore_write_note (abfd, buf, bufsiz,
2036 "CORE", note_type, data, sizeof (data));
2037 }
2038 }
2039}
2040
7f266840
DJ		 2041#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2042#define TARGET_LITTLE_NAME "elf32-littlearm"
2043#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2044#define TARGET_BIG_NAME "elf32-bigarm"
2045
2046#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2047#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2048#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2049
252b5132
RH		 2050typedef unsigned long int insn32;
2051typedef unsigned short int insn16;
2052
3a4a14e9
PB		 2053/* In lieu of proper flags, assume all EABIv4 or later objects are
2054 interworkable. */
57e8b36a 2055#define INTERWORK_FLAG(abfd) \
3a4a14e9 2056 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2057 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2058 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2059
252b5132
RH		 2060/* The linker script knows the section names for placement.
2061 The entry_names are used to do simple name mangling on the stubs.
2062 Given a function name, and its type, the stub can be found. The
9b485d32 2063 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2064#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2065#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2066
2067#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2068#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2069
c7b8f16e
JB		 2070#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2071#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2072
845b51d6
PB		 2073#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2074#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2075
7413f23f
DJ		 2076#define STUB_ENTRY_NAME "__%s_veneer"
2077
252b5132
RH		 2078/* The name of the dynamic interpreter. This is put in the .interp
2079 section. */
2080#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2081
0855e32b 2082static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2083{
2084 0xe08e0000, /* add r0, lr, r0 */
2085 0xe5901004, /* ldr r1, [r0,#4] */
2086 0xe12fff11, /* bx r1 */
2087};
0855e32b
NS		 2088
2089static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2090{
2091 0xe52d2004, /* push {r2} */
2092 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2093 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2094 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2095 0xe081100f, /* 2: add r1, pc */
2096 0xe12fff12, /* bx r2 */
2097 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
0855e32b 2098 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2099 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2100};
0855e32b 2101
5e681ec4
PB		 2102#ifdef FOUR_WORD_PLT
2103
252b5132
RH		 2104/* The first entry in a procedure linkage table looks like
2105 this. It is set up so that any shared library function that is
59f2c4e7 2106 called before the relocation has been set up calls the dynamic
9b485d32 2107 linker first. */
e5a52504 2108static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2109{
2110 0xe52de004, /* str lr, [sp, #-4]! */
2111 0xe59fe010, /* ldr lr, [pc, #16] */
2112 0xe08fe00e, /* add lr, pc, lr */
2113 0xe5bef008, /* ldr pc, [lr, #8]! */
2114};
5e681ec4
PB		 2115
2116/* Subsequent entries in a procedure linkage table look like
2117 this. */
e5a52504 2118static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2119{
2120 0xe28fc600, /* add ip, pc, #NN */
2121 0xe28cca00, /* add ip, ip, #NN */
2122 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2123 0x00000000, /* unused */
2124};
5e681ec4
PB		 2125
2126#else
2127
5e681ec4
PB		 2128/* The first entry in a procedure linkage table looks like
2129 this. It is set up so that any shared library function that is
2130 called before the relocation has been set up calls the dynamic
2131 linker first. */
e5a52504 2132static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2133{
2134 0xe52de004, /* str lr, [sp, #-4]! */
2135 0xe59fe004, /* ldr lr, [pc, #4] */
2136 0xe08fe00e, /* add lr, pc, lr */
2137 0xe5bef008, /* ldr pc, [lr, #8]! */
2138 0x00000000, /* &GOT[0] - . */
2139};
252b5132
RH		 2140
2141/* Subsequent entries in a procedure linkage table look like
2142 this. */
e5a52504 2143static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2144{
2145 0xe28fc600, /* add ip, pc, #0xNN00000 */
2146 0xe28cca00, /* add ip, ip, #0xNN000 */
2147 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2148};
5e681ec4
PB		 2149
2150#endif
252b5132 2151
00a97672
RS		 2152/* The format of the first entry in the procedure linkage table
2153 for a VxWorks executable. */
2154static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2155{
2156 0xe52dc008, /* str ip,[sp,#-8]! */
2157 0xe59fc000, /* ldr ip,[pc] */
2158 0xe59cf008, /* ldr pc,[ip,#8] */
2159 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2160};
00a97672
RS		 2161
2162/* The format of subsequent entries in a VxWorks executable. */
2163static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2164{
2165 0xe59fc000, /* ldr ip,[pc] */
2166 0xe59cf000, /* ldr pc,[ip] */
2167 0x00000000, /* .long @got */
2168 0xe59fc000, /* ldr ip,[pc] */
2169 0xea000000, /* b _PLT */
2170 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2171};
00a97672
RS		 2172
2173/* The format of entries in a VxWorks shared library. */
2174static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2175{
2176 0xe59fc000, /* ldr ip,[pc] */
2177 0xe79cf009, /* ldr pc,[ip,r9] */
2178 0x00000000, /* .long @got */
2179 0xe59fc000, /* ldr ip,[pc] */
2180 0xe599f008, /* ldr pc,[r9,#8] */
2181 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2182};
00a97672 2183
b7693d02
DJ		 2184/* An initial stub used if the PLT entry is referenced from Thumb code. */
2185#define PLT_THUMB_STUB_SIZE 4
2186static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2187{
2188 0x4778, /* bx pc */
2189 0x46c0 /* nop */
2190};
b7693d02 2191
e5a52504
MM		 2192/* The entries in a PLT when using a DLL-based target with multiple
2193 address spaces. */
906e58ca 2194static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2195{
2196 0xe51ff004, /* ldr pc, [pc, #-4] */
2197 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2198};
2199
2200/* The first entry in a procedure linkage table looks like
2201 this. It is set up so that any shared library function that is
2202 called before the relocation has been set up calls the dynamic
2203 linker first. */
2204static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2205{
2206 /* First bundle: */
2207 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2208 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2209 0xe08cc00f, /* add ip, ip, pc */
2210 0xe52dc008, /* str ip, [sp, #-8]! */
2211 /* Second bundle: */
2212 0xe7dfcf1f, /* bfc ip, #30, #2 */
2213 0xe59cc000, /* ldr ip, [ip] */
2214 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2215 0xe12fff1c, /* bx ip */
2216 /* Third bundle: */
2217 0xe320f000, /* nop */
2218 0xe320f000, /* nop */
2219 0xe320f000, /* nop */
2220 /* .Lplt_tail: */
2221 0xe50dc004, /* str ip, [sp, #-4] */
2222 /* Fourth bundle: */
2223 0xe7dfcf1f, /* bfc ip, #30, #2 */
2224 0xe59cc000, /* ldr ip, [ip] */
2225 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2226 0xe12fff1c, /* bx ip */
2227};
2228#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2229
2230/* Subsequent entries in a procedure linkage table look like this. */
2231static const bfd_vma elf32_arm_nacl_plt_entry [] =
2232{
2233 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2234 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2235 0xe08cc00f, /* add ip, ip, pc */
2236 0xea000000, /* b .Lplt_tail */
2237};
e5a52504 2238
906e58ca
NC		 2239#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2240#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2241#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2242#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2243#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2244#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2245
461a49ca 2246enum stub_insn_type
b38cadfb
NC		 2247{
2248 THUMB16_TYPE = 1,
2249 THUMB32_TYPE,
2250 ARM_TYPE,
2251 DATA_TYPE
2252};
461a49ca 2253
48229727
JB		 2254#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2255/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2256 is inserted in arm_build_one_stub(). */
2257#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2258#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2259#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2260#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2261#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2262#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2263
2264typedef struct
2265{
b38cadfb
NC		 2266 bfd_vma data;
2267 enum stub_insn_type type;
2268 unsigned int r_type;
2269 int reloc_addend;
461a49ca
DJ		 2270} insn_sequence;
2271
fea2b4d6
CL		 2272/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2273 to reach the stub if necessary. */
461a49ca 2274static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2275{
2276 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2277 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2278};
906e58ca 2279
fea2b4d6
CL		 2280/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2281 available. */
461a49ca 2282static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2283{
2284 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2285 ARM_INSN (0xe12fff1c), /* bx ip */
2286 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2287};
906e58ca 2288
d3626fb0 2289/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2290static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2291{
2292 THUMB16_INSN (0xb401), /* push {r0} */
2293 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2294 THUMB16_INSN (0x4684), /* mov ip, r0 */
2295 THUMB16_INSN (0xbc01), /* pop {r0} */
2296 THUMB16_INSN (0x4760), /* bx ip */
2297 THUMB16_INSN (0xbf00), /* nop */
2298 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2299};
906e58ca 2300
d3626fb0
CL		 2301/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2302 allowed. */
2303static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2304{
2305 THUMB16_INSN (0x4778), /* bx pc */
2306 THUMB16_INSN (0x46c0), /* nop */
2307 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2308 ARM_INSN (0xe12fff1c), /* bx ip */
2309 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2310};
d3626fb0 2311
fea2b4d6
CL		 2312/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2313 available. */
461a49ca 2314static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2315{
2316 THUMB16_INSN (0x4778), /* bx pc */
2317 THUMB16_INSN (0x46c0), /* nop */
2318 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2319 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2320};
906e58ca 2321
fea2b4d6
CL		 2322/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2323 one, when the destination is close enough. */
461a49ca 2324static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2325{
2326 THUMB16_INSN (0x4778), /* bx pc */
2327 THUMB16_INSN (0x46c0), /* nop */
2328 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2329};
c820be07 2330
cf3eccff 2331/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2332 blx to reach the stub if necessary. */
cf3eccff 2333static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2334{
2335 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2336 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2337 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2338};
906e58ca 2339
cf3eccff
DJ		 2340/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2341 blx to reach the stub if necessary. We can not add into pc;
2342 it is not guaranteed to mode switch (different in ARMv6 and
2343 ARMv7). */
2344static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2345{
2346 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2347 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2348 ARM_INSN (0xe12fff1c), /* bx ip */
2349 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2350};
cf3eccff 2351
ebe24dd4
CL		 2352/* V4T ARM -> ARM long branch stub, PIC. */
2353static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2354{
2355 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2356 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2357 ARM_INSN (0xe12fff1c), /* bx ip */
2358 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2359};
ebe24dd4
CL		 2360
2361/* V4T Thumb -> ARM long branch stub, PIC. */
2362static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2363{
2364 THUMB16_INSN (0x4778), /* bx pc */
2365 THUMB16_INSN (0x46c0), /* nop */
2366 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2367 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2368 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2369};
ebe24dd4 2370
d3626fb0
CL		 2371/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2372 architectures. */
ebe24dd4 2373static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2374{
2375 THUMB16_INSN (0xb401), /* push {r0} */
2376 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2377 THUMB16_INSN (0x46fc), /* mov ip, pc */
2378 THUMB16_INSN (0x4484), /* add ip, r0 */
2379 THUMB16_INSN (0xbc01), /* pop {r0} */
2380 THUMB16_INSN (0x4760), /* bx ip */
2381 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2382};
ebe24dd4 2383
d3626fb0
CL		 2384/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2385 allowed. */
2386static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2387{
2388 THUMB16_INSN (0x4778), /* bx pc */
2389 THUMB16_INSN (0x46c0), /* nop */
2390 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2391 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2392 ARM_INSN (0xe12fff1c), /* bx ip */
2393 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2394};
d3626fb0 2395
0855e32b
NS		 2396/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2397 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2398static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2399{
b38cadfb
NC		 2400 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2401 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2402 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2403};
2404
2405/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2406 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2407static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2408{
b38cadfb
NC		 2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2412 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2413 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2414};
2415
48229727
JB		 2416/* Cortex-A8 erratum-workaround stubs. */
2417
2418/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2419 can't use a conditional branch to reach this stub). */
2420
2421static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2422{
2423 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2424 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2425 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2426};
48229727
JB		 2427
2428/* Stub used for b.w and bl.w instructions. */
2429
2430static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2431{
2432 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2433};
48229727
JB		 2434
2435static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2436{
2437 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2438};
48229727
JB		 2439
2440/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2441 instruction (which switches to ARM mode) to point to this stub. Jump to the
2442 real destination using an ARM-mode branch. */
2443
2444static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2445{
2446 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2447};
48229727 2448
9553db3c
NC		 2449/* For each section group there can be a specially created linker section
2450 to hold the stubs for that group. The name of the stub section is based
2451 upon the name of another section within that group with the suffix below
2452 applied.
2453
2454 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2455 create what appeared to be a linker stub section when it actually
2456 contained user code/data. For example, consider this fragment:
b38cadfb 2457
9553db3c
NC		 2458 const char * stubborn_problems[] = { "np" };
2459
2460 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2461 section called:
2462
2463 .data.rel.local.stubborn_problems
2464
2465 This then causes problems in arm32_arm_build_stubs() as it triggers:
2466
2467 // Ignore non-stub sections.
2468 if (!strstr (stub_sec->name, STUB_SUFFIX))
2469 continue;
2470
2471 And so the section would be ignored instead of being processed. Hence
2472 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2473 C identifier. */
2474#define STUB_SUFFIX ".__stub"
906e58ca 2475
738a79f6
CL		 2476/* One entry per long/short branch stub defined above. */
2477#define DEF_STUBS \
2478 DEF_STUB(long_branch_any_any) \
2479 DEF_STUB(long_branch_v4t_arm_thumb) \
2480 DEF_STUB(long_branch_thumb_only) \
2481 DEF_STUB(long_branch_v4t_thumb_thumb) \
2482 DEF_STUB(long_branch_v4t_thumb_arm) \
2483 DEF_STUB(short_branch_v4t_thumb_arm) \
2484 DEF_STUB(long_branch_any_arm_pic) \
2485 DEF_STUB(long_branch_any_thumb_pic) \
2486 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2487 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2488 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2489 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2490 DEF_STUB(long_branch_any_tls_pic) \
2491 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2492 DEF_STUB(a8_veneer_b_cond) \
2493 DEF_STUB(a8_veneer_b) \
2494 DEF_STUB(a8_veneer_bl) \
2495 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2496
2497#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2498enum elf32_arm_stub_type
2499{
906e58ca 2500 arm_stub_none,
738a79f6 2501 DEF_STUBS
eb7c4339
NS		 2502 /* Note the first a8_veneer type */
2503 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2504};
2505#undef DEF_STUB
2506
2507typedef struct
2508{
d3ce72d0 2509 const insn_sequence* template_sequence;
738a79f6
CL		 2510 int template_size;
2511} stub_def;
2512
2513#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2514static const stub_def stub_definitions[] =
2515{
738a79f6
CL		 2516 {NULL, 0},
2517 DEF_STUBS
906e58ca
NC		 2518};
2519
2520struct elf32_arm_stub_hash_entry
2521{
2522 /* Base hash table entry structure. */
2523 struct bfd_hash_entry root;
2524
2525 /* The stub section. */
2526 asection *stub_sec;
2527
2528 /* Offset within stub_sec of the beginning of this stub. */
2529 bfd_vma stub_offset;
2530
2531 /* Given the symbol's value and its section we can determine its final
2532 value when building the stubs (so the stub knows where to jump). */
2533 bfd_vma target_value;
2534 asection *target_section;
2535
48229727
JB		 2536 /* Offset to apply to relocation referencing target_value. */
2537 bfd_vma target_addend;
2538
2539 /* The instruction which caused this stub to be generated (only valid for
2540 Cortex-A8 erratum workaround stubs at present). */
2541 unsigned long orig_insn;
2542
461a49ca 2543 /* The stub type. */
906e58ca 2544 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2545 /* Its encoding size in bytes. */
2546 int stub_size;
2547 /* Its template. */
2548 const insn_sequence *stub_template;
2549 /* The size of the template (number of entries). */
2550 int stub_template_size;
906e58ca
NC		 2551
2552 /* The symbol table entry, if any, that this was derived from. */
2553 struct elf32_arm_link_hash_entry *h;
2554
35fc36a8
RS		 2555 /* Type of branch. */
2556 enum arm_st_branch_type branch_type;
906e58ca
NC		 2557
2558 /* Where this stub is being called from, or, in the case of combined
2559 stub sections, the first input section in the group. */
2560 asection *id_sec;
7413f23f
DJ		 2561
2562 /* The name for the local symbol at the start of this stub. The
2563 stub name in the hash table has to be unique; this does not, so
2564 it can be friendlier. */
2565 char *output_name;
906e58ca
NC		 2566};
2567
e489d0ae
PB		 2568/* Used to build a map of a section. This is required for mixed-endian
2569 code/data. */
2570
2571typedef struct elf32_elf_section_map
2572{
2573 bfd_vma vma;
2574 char type;
2575}
2576elf32_arm_section_map;
2577
c7b8f16e
JB		 2578/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2579
2580typedef enum
2581{
2582 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2583 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2584 VFP11_ERRATUM_ARM_VENEER,
2585 VFP11_ERRATUM_THUMB_VENEER
2586}
2587elf32_vfp11_erratum_type;
2588
2589typedef struct elf32_vfp11_erratum_list
2590{
2591 struct elf32_vfp11_erratum_list *next;
2592 bfd_vma vma;
2593 union
2594 {
2595 struct
2596 {
2597 struct elf32_vfp11_erratum_list *veneer;
2598 unsigned int vfp_insn;
2599 } b;
2600 struct
2601 {
2602 struct elf32_vfp11_erratum_list *branch;
2603 unsigned int id;
2604 } v;
2605 } u;
2606 elf32_vfp11_erratum_type type;
2607}
2608elf32_vfp11_erratum_list;
2609
2468f9c9
PB		 2610typedef enum
2611{
2612 DELETE_EXIDX_ENTRY,
2613 INSERT_EXIDX_CANTUNWIND_AT_END
2614}
2615arm_unwind_edit_type;
2616
2617/* A (sorted) list of edits to apply to an unwind table. */
2618typedef struct arm_unwind_table_edit
2619{
2620 arm_unwind_edit_type type;
2621 /* Note: we sometimes want to insert an unwind entry corresponding to a
2622 section different from the one we're currently writing out, so record the
2623 (text) section this edit relates to here. */
2624 asection *linked_section;
2625 unsigned int index;
2626 struct arm_unwind_table_edit *next;
2627}
2628arm_unwind_table_edit;
2629
8e3de13a 2630typedef struct _arm_elf_section_data
e489d0ae 2631{
2468f9c9 2632 /* Information about mapping symbols. */
e489d0ae 2633 struct bfd_elf_section_data elf;
8e3de13a 2634 unsigned int mapcount;
c7b8f16e 2635 unsigned int mapsize;
e489d0ae 2636 elf32_arm_section_map *map;
2468f9c9 2637 /* Information about CPU errata. */
c7b8f16e
JB		 2638 unsigned int erratumcount;
2639 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2640 /* Information about unwind tables. */
2641 union
2642 {
2643 /* Unwind info attached to a text section. */
2644 struct
2645 {
2646 asection *arm_exidx_sec;
2647 } text;
2648
2649 /* Unwind info attached to an .ARM.exidx section. */
2650 struct
2651 {
2652 arm_unwind_table_edit *unwind_edit_list;
2653 arm_unwind_table_edit *unwind_edit_tail;
2654 } exidx;
2655 } u;
8e3de13a
NC		 2656}
2657_arm_elf_section_data;
e489d0ae
PB		 2658
2659#define elf32_arm_section_data(sec) \
8e3de13a 2660 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2661
48229727
JB		 2662/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2663 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2664 so may be created multiple times: we use an array of these entries whilst
2665 relaxing which we can refresh easily, then create stubs for each potentially
2666 erratum-triggering instruction once we've settled on a solution. */
2667
b38cadfb
NC		 2668struct a8_erratum_fix
2669{
48229727
JB		 2670 bfd *input_bfd;
2671 asection *section;
2672 bfd_vma offset;
2673 bfd_vma addend;
2674 unsigned long orig_insn;
2675 char *stub_name;
2676 enum elf32_arm_stub_type stub_type;
35fc36a8 2677 enum arm_st_branch_type branch_type;
48229727
JB		 2678};
2679
2680/* A table of relocs applied to branches which might trigger Cortex-A8
2681 erratum. */
2682
b38cadfb
NC		 2683struct a8_erratum_reloc
2684{
48229727
JB		 2685 bfd_vma from;
2686 bfd_vma destination;
92750f34
DJ		 2687 struct elf32_arm_link_hash_entry *hash;
2688 const char *sym_name;
48229727 2689 unsigned int r_type;
35fc36a8 2690 enum arm_st_branch_type branch_type;
48229727
JB		 2691 bfd_boolean non_a8_stub;
2692};
2693
ba93b8ac
DJ		 2694/* The size of the thread control block. */
2695#define TCB_SIZE 8
2696
34e77a92
RS		 2697/* ARM-specific information about a PLT entry, over and above the usual
2698 gotplt_union. */
b38cadfb
NC		 2699struct arm_plt_info
2700{
34e77a92
RS		 2701 /* We reference count Thumb references to a PLT entry separately,
2702 so that we can emit the Thumb trampoline only if needed. */
2703 bfd_signed_vma thumb_refcount;
2704
2705 /* Some references from Thumb code may be eliminated by BL->BLX
2706 conversion, so record them separately. */
2707 bfd_signed_vma maybe_thumb_refcount;
2708
2709 /* How many of the recorded PLT accesses were from non-call relocations.
2710 This information is useful when deciding whether anything takes the
2711 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2712 non-call references to the function should resolve directly to the
2713 real runtime target. */
2714 unsigned int noncall_refcount;
2715
2716 /* Since PLT entries have variable size if the Thumb prologue is
2717 used, we need to record the index into .got.plt instead of
2718 recomputing it from the PLT offset. */
2719 bfd_signed_vma got_offset;
2720};
2721
2722/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2723struct arm_local_iplt_info
2724{
34e77a92
RS		 2725 /* The information that is usually found in the generic ELF part of
2726 the hash table entry. */
2727 union gotplt_union root;
2728
2729 /* The information that is usually found in the ARM-specific part of
2730 the hash table entry. */
2731 struct arm_plt_info arm;
2732
2733 /* A list of all potential dynamic relocations against this symbol. */
2734 struct elf_dyn_relocs *dyn_relocs;
2735};
2736
0ffa91dd 2737struct elf_arm_obj_tdata
ba93b8ac
DJ		 2738{
2739 struct elf_obj_tdata root;
2740
2741 /* tls_type for each local got entry. */
2742 char *local_got_tls_type;
ee065d83 2743
0855e32b
NS		 2744 /* GOTPLT entries for TLS descriptors. */
2745 bfd_vma *local_tlsdesc_gotent;
2746
34e77a92
RS		 2747 /* Information for local symbols that need entries in .iplt. */
2748 struct arm_local_iplt_info **local_iplt;
2749
bf21ed78
MS		 2750 /* Zero to warn when linking objects with incompatible enum sizes. */
2751 int no_enum_size_warning;
a9dc9481
JM		 2752
2753 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2754 int no_wchar_size_warning;
ba93b8ac
DJ		 2755};
2756
0ffa91dd
NC		 2757#define elf_arm_tdata(bfd) \
2758 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2759
0ffa91dd
NC		 2760#define elf32_arm_local_got_tls_type(bfd) \
2761 (elf_arm_tdata (bfd)->local_got_tls_type)
2762
0855e32b
NS		 2763#define elf32_arm_local_tlsdesc_gotent(bfd) \
2764 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2765
34e77a92
RS		 2766#define elf32_arm_local_iplt(bfd) \
2767 (elf_arm_tdata (bfd)->local_iplt)
2768
0ffa91dd
NC		 2769#define is_arm_elf(bfd) \
2770 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2771 && elf_tdata (bfd) != NULL \
4dfe6ac6 2772 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2773
2774static bfd_boolean
2775elf32_arm_mkobject (bfd *abfd)
2776{
0ffa91dd 2777 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2778 ARM_ELF_DATA);
ba93b8ac
DJ		 2779}
2780
ba93b8ac
DJ		 2781#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2782
ba96a88f 2783/* Arm ELF linker hash entry. */
252b5132 2784struct elf32_arm_link_hash_entry
b38cadfb
NC		 2785{
2786 struct elf_link_hash_entry root;
252b5132 2787
b38cadfb
NC		 2788 /* Track dynamic relocs copied for this symbol. */
2789 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2790
b38cadfb
NC		 2791 /* ARM-specific PLT information. */
2792 struct arm_plt_info plt;
ba93b8ac
DJ		 2793
2794#define GOT_UNKNOWN 0
2795#define GOT_NORMAL 1
2796#define GOT_TLS_GD 2
2797#define GOT_TLS_IE 4
0855e32b
NS		 2798#define GOT_TLS_GDESC 8
2799#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2800 unsigned int tls_type : 8;
34e77a92 2801
b38cadfb
NC		 2802 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2803 unsigned int is_iplt : 1;
34e77a92 2804
b38cadfb 2805 unsigned int unused : 23;
a4fd1a8e 2806
b38cadfb
NC		 2807 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2808 starting at the end of the jump table. */
2809 bfd_vma tlsdesc_got;
0855e32b 2810
b38cadfb
NC		 2811 /* The symbol marking the real symbol location for exported thumb
2812 symbols with Arm stubs. */
2813 struct elf_link_hash_entry *export_glue;
906e58ca 2814
b38cadfb 2815 /* A pointer to the most recently used stub hash entry against this
8029a119 2816 symbol. */
b38cadfb
NC		 2817 struct elf32_arm_stub_hash_entry *stub_cache;
2818};
252b5132 2819
252b5132 2820/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2821#define elf32_arm_link_hash_traverse(table, func, info) \
2822 (elf_link_hash_traverse \
2823 (&(table)->root, \
b7693d02 2824 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2825 (info)))
2826
2827/* Get the ARM elf linker hash table from a link_info structure. */
2828#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2829 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2830 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2831
906e58ca
NC		 2832#define arm_stub_hash_lookup(table, string, create, copy) \
2833 ((struct elf32_arm_stub_hash_entry *) \
2834 bfd_hash_lookup ((table), (string), (create), (copy)))
2835
21d799b5
NC		 2836/* Array to keep track of which stub sections have been created, and
2837 information on stub grouping. */
2838struct map_stub
2839{
2840 /* This is the section to which stubs in the group will be
2841 attached. */
2842 asection *link_sec;
2843 /* The stub section. */
2844 asection *stub_sec;
2845};
2846
0855e32b
NS		 2847#define elf32_arm_compute_jump_table_size(htab) \
2848 ((htab)->next_tls_desc_index * 4)
2849
9b485d32 2850/* ARM ELF linker hash table. */
252b5132 2851struct elf32_arm_link_hash_table
906e58ca
NC		 2852{
2853 /* The main hash table. */
2854 struct elf_link_hash_table root;
252b5132 2855
906e58ca
NC		 2856 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2857 bfd_size_type thumb_glue_size;
252b5132 2858
906e58ca
NC		 2859 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2860 bfd_size_type arm_glue_size;
252b5132 2861
906e58ca
NC		 2862 /* The size in bytes of section containing the ARMv4 BX veneers. */
2863 bfd_size_type bx_glue_size;
845b51d6 2864
906e58ca
NC		 2865 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2866 veneer has been populated. */
2867 bfd_vma bx_glue_offset[15];
845b51d6 2868
906e58ca
NC		 2869 /* The size in bytes of the section containing glue for VFP11 erratum
2870 veneers. */
2871 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2872
48229727
JB		 2873 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2874 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2875 elf32_arm_write_section(). */
2876 struct a8_erratum_fix *a8_erratum_fixes;
2877 unsigned int num_a8_erratum_fixes;
2878
906e58ca
NC		 2879 /* An arbitrary input BFD chosen to hold the glue sections. */
2880 bfd * bfd_of_glue_owner;
ba96a88f 2881
906e58ca
NC		 2882 /* Nonzero to output a BE8 image. */
2883 int byteswap_code;
e489d0ae 2884
906e58ca
NC		 2885 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2886 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2887 int target1_is_rel;
9c504268 2888
906e58ca
NC		 2889 /* The relocation to use for R_ARM_TARGET2 relocations. */
2890 int target2_reloc;
eb043451 2891
906e58ca
NC		 2892 /* 0 = Ignore R_ARM_V4BX.
2893 1 = Convert BX to MOV PC.
2894 2 = Generate v4 interworing stubs. */
2895 int fix_v4bx;
319850b4 2896
48229727
JB		 2897 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2898 int fix_cortex_a8;
2899
2de70689
MGD		 2900 /* Whether we should fix the ARM1176 BLX immediate issue. */
2901 int fix_arm1176;
2902
906e58ca
NC		 2903 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2904 int use_blx;
33bfe774 2905
906e58ca
NC		 2906 /* What sort of code sequences we should look for which may trigger the
2907 VFP11 denorm erratum. */
2908 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2909
906e58ca
NC		 2910 /* Global counter for the number of fixes we have emitted. */
2911 int num_vfp11_fixes;
c7b8f16e 2912
906e58ca
NC		 2913 /* Nonzero to force PIC branch veneers. */
2914 int pic_veneer;
27e55c4d 2915
906e58ca
NC		 2916 /* The number of bytes in the initial entry in the PLT. */
2917 bfd_size_type plt_header_size;
e5a52504 2918
906e58ca
NC		 2919 /* The number of bytes in the subsequent PLT etries. */
2920 bfd_size_type plt_entry_size;
e5a52504 2921
906e58ca
NC		 2922 /* True if the target system is VxWorks. */
2923 int vxworks_p;
00a97672 2924
906e58ca
NC		 2925 /* True if the target system is Symbian OS. */
2926 int symbian_p;
e5a52504 2927
b38cadfb
NC		 2928 /* True if the target system is Native Client. */
2929 int nacl_p;
2930
906e58ca
NC		 2931 /* True if the target uses REL relocations. */
2932 int use_rel;
4e7fd91e 2933
0855e32b
NS		 2934 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2935 bfd_vma next_tls_desc_index;
2936
2937 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2938 bfd_vma num_tls_desc;
2939
906e58ca 2940 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2941 asection *sdynbss;
2942 asection *srelbss;
5e681ec4 2943
906e58ca
NC		 2944 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2945 asection *srelplt2;
00a97672 2946
0855e32b
NS		 2947 /* The offset into splt of the PLT entry for the TLS descriptor
2948 resolver. Special values are 0, if not necessary (or not found
2949 to be necessary yet), and -1 if needed but not determined
2950 yet. */
2951 bfd_vma dt_tlsdesc_plt;
2952
2953 /* The offset into sgot of the GOT entry used by the PLT entry
2954 above. */
b38cadfb 2955 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 2956
2957 /* Offset in .plt section of tls_arm_trampoline. */
2958 bfd_vma tls_trampoline;
2959
906e58ca
NC		 2960 /* Data for R_ARM_TLS_LDM32 relocations. */
2961 union
2962 {
2963 bfd_signed_vma refcount;
2964 bfd_vma offset;
2965 } tls_ldm_got;
b7693d02 2966
87d72d41
AM		 2967 /* Small local sym cache. */
2968 struct sym_cache sym_cache;
906e58ca
NC		 2969
2970 /* For convenience in allocate_dynrelocs. */
2971 bfd * obfd;
2972
0855e32b
NS		 2973 /* The amount of space used by the reserved portion of the sgotplt
2974 section, plus whatever space is used by the jump slots. */
2975 bfd_vma sgotplt_jump_table_size;
2976
906e58ca
NC		 2977 /* The stub hash table. */
2978 struct bfd_hash_table stub_hash_table;
2979
2980 /* Linker stub bfd. */
2981 bfd *stub_bfd;
2982
2983 /* Linker call-backs. */
2984 asection * (*add_stub_section) (const char *, asection *);
2985 void (*layout_sections_again) (void);
2986
2987 /* Array to keep track of which stub sections have been created, and
2988 information on stub grouping. */
21d799b5 2989 struct map_stub *stub_group;
906e58ca 2990
fe33d2fa
CL		 2991 /* Number of elements in stub_group. */
2992 int top_id;
2993
906e58ca
NC		 2994 /* Assorted information used by elf32_arm_size_stubs. */
2995 unsigned int bfd_count;
2996 int top_index;
2997 asection **input_list;
2998};
252b5132 2999
780a67af
NC		 3000/* Create an entry in an ARM ELF linker hash table. */
3001
3002static struct bfd_hash_entry *
57e8b36a
NC		 3003elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3004 struct bfd_hash_table * table,
3005 const char * string)
780a67af
NC		 3006{
3007 struct elf32_arm_link_hash_entry * ret =
3008 (struct elf32_arm_link_hash_entry *) entry;
3009
3010 /* Allocate the structure if it has not already been allocated by a
3011 subclass. */
906e58ca 3012 if (ret == NULL)
21d799b5
NC		 3013 ret = (struct elf32_arm_link_hash_entry *)
3014 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3015 if (ret == NULL)
780a67af
NC		 3016 return (struct bfd_hash_entry *) ret;
3017
3018 /* Call the allocation method of the superclass. */
3019 ret = ((struct elf32_arm_link_hash_entry *)
3020 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3021 table, string));
57e8b36a 3022 if (ret != NULL)
b7693d02 3023 {
0bdcacaf 3024 ret->dyn_relocs = NULL;
ba93b8ac 3025 ret->tls_type = GOT_UNKNOWN;
0855e32b 3026 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3027 ret->plt.thumb_refcount = 0;
3028 ret->plt.maybe_thumb_refcount = 0;
3029 ret->plt.noncall_refcount = 0;
3030 ret->plt.got_offset = -1;
3031 ret->is_iplt = FALSE;
a4fd1a8e 3032 ret->export_glue = NULL;
906e58ca
NC		 3033
3034 ret->stub_cache = NULL;
b7693d02 3035 }
780a67af
NC		 3036
3037 return (struct bfd_hash_entry *) ret;
3038}
3039
34e77a92
RS		 3040/* Ensure that we have allocated bookkeeping structures for ABFD's local
3041 symbols. */
3042
3043static bfd_boolean
3044elf32_arm_allocate_local_sym_info (bfd *abfd)
3045{
3046 if (elf_local_got_refcounts (abfd) == NULL)
3047 {
3048 bfd_size_type num_syms;
3049 bfd_size_type size;
3050 char *data;
3051
3052 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3053 size = num_syms * (sizeof (bfd_signed_vma)
3054 + sizeof (struct arm_local_iplt_info *)
3055 + sizeof (bfd_vma)
3056 + sizeof (char));
3057 data = bfd_zalloc (abfd, size);
3058 if (data == NULL)
3059 return FALSE;
3060
3061 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3062 data += num_syms * sizeof (bfd_signed_vma);
3063
3064 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3065 data += num_syms * sizeof (struct arm_local_iplt_info *);
3066
3067 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3068 data += num_syms * sizeof (bfd_vma);
3069
3070 elf32_arm_local_got_tls_type (abfd) = data;
3071 }
3072 return TRUE;
3073}
3074
3075/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3076 to input bfd ABFD. Create the information if it doesn't already exist.
3077 Return null if an allocation fails. */
3078
3079static struct arm_local_iplt_info *
3080elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3081{
3082 struct arm_local_iplt_info **ptr;
3083
3084 if (!elf32_arm_allocate_local_sym_info (abfd))
3085 return NULL;
3086
3087 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3088 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3089 if (*ptr == NULL)
3090 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3091 return *ptr;
3092}
3093
3094/* Try to obtain PLT information for the symbol with index R_SYMNDX
3095 in ABFD's symbol table. If the symbol is global, H points to its
3096 hash table entry, otherwise H is null.
3097
3098 Return true if the symbol does have PLT information. When returning
3099 true, point *ROOT_PLT at the target-independent reference count/offset
3100 union and *ARM_PLT at the ARM-specific information. */
3101
3102static bfd_boolean
3103elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3104 unsigned long r_symndx, union gotplt_union **root_plt,
3105 struct arm_plt_info **arm_plt)
3106{
3107 struct arm_local_iplt_info *local_iplt;
3108
3109 if (h != NULL)
3110 {
3111 *root_plt = &h->root.plt;
3112 *arm_plt = &h->plt;
3113 return TRUE;
3114 }
3115
3116 if (elf32_arm_local_iplt (abfd) == NULL)
3117 return FALSE;
3118
3119 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3120 if (local_iplt == NULL)
3121 return FALSE;
3122
3123 *root_plt = &local_iplt->root;
3124 *arm_plt = &local_iplt->arm;
3125 return TRUE;
3126}
3127
3128/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3129 before it. */
3130
3131static bfd_boolean
3132elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3133 struct arm_plt_info *arm_plt)
3134{
3135 struct elf32_arm_link_hash_table *htab;
3136
3137 htab = elf32_arm_hash_table (info);
3138 return (arm_plt->thumb_refcount != 0
3139 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3140}
3141
3142/* Return a pointer to the head of the dynamic reloc list that should
3143 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3144 ABFD's symbol table. Return null if an error occurs. */
3145
3146static struct elf_dyn_relocs **
3147elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3148 Elf_Internal_Sym *isym)
3149{
3150 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3151 {
3152 struct arm_local_iplt_info *local_iplt;
3153
3154 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3155 if (local_iplt == NULL)
3156 return NULL;
3157 return &local_iplt->dyn_relocs;
3158 }
3159 else
3160 {
3161 /* Track dynamic relocs needed for local syms too.
3162 We really need local syms available to do this
3163 easily. Oh well. */
3164 asection *s;
3165 void *vpp;
3166
3167 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3168 if (s == NULL)
3169 abort ();
3170
3171 vpp = &elf_section_data (s)->local_dynrel;
3172 return (struct elf_dyn_relocs **) vpp;
3173 }
3174}
3175
906e58ca
NC		 3176/* Initialize an entry in the stub hash table. */
3177
3178static struct bfd_hash_entry *
3179stub_hash_newfunc (struct bfd_hash_entry *entry,
3180 struct bfd_hash_table *table,
3181 const char *string)
3182{
3183 /* Allocate the structure if it has not already been allocated by a
3184 subclass. */
3185 if (entry == NULL)
3186 {
21d799b5
NC		 3187 entry = (struct bfd_hash_entry *)
3188 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3189 if (entry == NULL)
3190 return entry;
3191 }
3192
3193 /* Call the allocation method of the superclass. */
3194 entry = bfd_hash_newfunc (entry, table, string);
3195 if (entry != NULL)
3196 {
3197 struct elf32_arm_stub_hash_entry *eh;
3198
3199 /* Initialize the local fields. */
3200 eh = (struct elf32_arm_stub_hash_entry *) entry;
3201 eh->stub_sec = NULL;
3202 eh->stub_offset = 0;
3203 eh->target_value = 0;
3204 eh->target_section = NULL;
cedfb179
DK		 3205 eh->target_addend = 0;
3206 eh->orig_insn = 0;
906e58ca 3207 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3208 eh->stub_size = 0;
3209 eh->stub_template = NULL;
3210 eh->stub_template_size = 0;
906e58ca
NC		 3211 eh->h = NULL;
3212 eh->id_sec = NULL;
d8d2f433 3213 eh->output_name = NULL;
906e58ca
NC		 3214 }
3215
3216 return entry;
3217}
3218
00a97672 3219/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3220 shortcuts to them in our hash table. */
3221
3222static bfd_boolean
57e8b36a 3223create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3224{
3225 struct elf32_arm_link_hash_table *htab;
3226
e5a52504 3227 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3228 if (htab == NULL)
3229 return FALSE;
3230
e5a52504
MM		 3231 /* BPABI objects never have a GOT, or associated sections. */
3232 if (htab->symbian_p)
3233 return TRUE;
3234
5e681ec4
PB		 3235 if (! _bfd_elf_create_got_section (dynobj, info))
3236 return FALSE;
3237
5e681ec4
PB		 3238 return TRUE;
3239}
3240
34e77a92
RS		 3241/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3242
3243static bfd_boolean
3244create_ifunc_sections (struct bfd_link_info *info)
3245{
3246 struct elf32_arm_link_hash_table *htab;
3247 const struct elf_backend_data *bed;
3248 bfd *dynobj;
3249 asection *s;
3250 flagword flags;
b38cadfb 3251
34e77a92
RS		 3252 htab = elf32_arm_hash_table (info);
3253 dynobj = htab->root.dynobj;
3254 bed = get_elf_backend_data (dynobj);
3255 flags = bed->dynamic_sec_flags;
3256
3257 if (htab->root.iplt == NULL)
3258 {
3d4d4302
AM		 3259 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3260 flags | SEC_READONLY | SEC_CODE);
34e77a92 3261 if (s == NULL
a0f49396 3262 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3263 return FALSE;
3264 htab->root.iplt = s;
3265 }
3266
3267 if (htab->root.irelplt == NULL)
3268 {
3d4d4302
AM		 3269 s = bfd_make_section_anyway_with_flags (dynobj,
3270 RELOC_SECTION (htab, ".iplt"),
3271 flags | SEC_READONLY);
34e77a92 3272 if (s == NULL
a0f49396 3273 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3274 return FALSE;
3275 htab->root.irelplt = s;
3276 }
3277
3278 if (htab->root.igotplt == NULL)
3279 {
3d4d4302 3280 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3281 if (s == NULL
3282 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3283 return FALSE;
3284 htab->root.igotplt = s;
3285 }
3286 return TRUE;
3287}
3288
00a97672
RS		 3289/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3290 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3291 hash table. */
3292
3293static bfd_boolean
57e8b36a 3294elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3295{
3296 struct elf32_arm_link_hash_table *htab;
3297
3298 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3299 if (htab == NULL)
3300 return FALSE;
3301
362d30a1 3302 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3303 return FALSE;
3304
3305 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3306 return FALSE;
3307
3d4d4302 3308 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3309 if (!info->shared)
3d4d4302
AM		 3310 htab->srelbss = bfd_get_linker_section (dynobj,
3311 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3312
3313 if (htab->vxworks_p)
3314 {
3315 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3316 return FALSE;
3317
3318 if (info->shared)
3319 {
3320 htab->plt_header_size = 0;
3321 htab->plt_entry_size
3322 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3323 }
3324 else
3325 {
3326 htab->plt_header_size
3327 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3328 htab->plt_entry_size
3329 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3330 }
3331 }
5e681ec4 3332
362d30a1
RS		 3333 if (!htab->root.splt
3334 || !htab->root.srelplt
e5a52504 3335 || !htab->sdynbss
5e681ec4
PB		 3336 || (!info->shared && !htab->srelbss))
3337 abort ();
3338
3339 return TRUE;
3340}
3341
906e58ca
NC		 3342/* Copy the extra info we tack onto an elf_link_hash_entry. */
3343
3344static void
3345elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3346 struct elf_link_hash_entry *dir,
3347 struct elf_link_hash_entry *ind)
3348{
3349 struct elf32_arm_link_hash_entry *edir, *eind;
3350
3351 edir = (struct elf32_arm_link_hash_entry *) dir;
3352 eind = (struct elf32_arm_link_hash_entry *) ind;
3353
0bdcacaf 3354 if (eind->dyn_relocs != NULL)
906e58ca 3355 {
0bdcacaf 3356 if (edir->dyn_relocs != NULL)
906e58ca 3357 {
0bdcacaf
RS		 3358 struct elf_dyn_relocs **pp;
3359 struct elf_dyn_relocs *p;
906e58ca
NC		 3360
3361 /* Add reloc counts against the indirect sym to the direct sym
3362 list. Merge any entries against the same section. */
0bdcacaf 3363 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3364 {
0bdcacaf 3365 struct elf_dyn_relocs *q;
906e58ca 3366
0bdcacaf
RS		 3367 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3368 if (q->sec == p->sec)
906e58ca
NC		 3369 {
3370 q->pc_count += p->pc_count;
3371 q->count += p->count;
3372 *pp = p->next;
3373 break;
3374 }
3375 if (q == NULL)
3376 pp = &p->next;
3377 }
0bdcacaf 3378 *pp = edir->dyn_relocs;
906e58ca
NC		 3379 }
3380
0bdcacaf
RS		 3381 edir->dyn_relocs = eind->dyn_relocs;
3382 eind->dyn_relocs = NULL;
906e58ca
NC		 3383 }
3384
3385 if (ind->root.type == bfd_link_hash_indirect)
3386 {
3387 /* Copy over PLT info. */
34e77a92
RS		 3388 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3389 eind->plt.thumb_refcount = 0;
3390 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3391 eind->plt.maybe_thumb_refcount = 0;
3392 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3393 eind->plt.noncall_refcount = 0;
3394
3395 /* We should only allocate a function to .iplt once the final
3396 symbol information is known. */
3397 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3398
3399 if (dir->got.refcount <= 0)
3400 {
3401 edir->tls_type = eind->tls_type;
3402 eind->tls_type = GOT_UNKNOWN;
3403 }
3404 }
3405
3406 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3407}
3408
3409/* Create an ARM elf linker hash table. */
3410
3411static struct bfd_link_hash_table *
3412elf32_arm_link_hash_table_create (bfd *abfd)
3413{
3414 struct elf32_arm_link_hash_table *ret;
3415 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3416
21d799b5 3417 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3418 if (ret == NULL)
3419 return NULL;
3420
3421 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3422 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3423 sizeof (struct elf32_arm_link_hash_entry),
3424 ARM_ELF_DATA))
906e58ca
NC		 3425 {
3426 free (ret);
3427 return NULL;
3428 }
3429
906e58ca
NC		 3430 ret->sdynbss = NULL;
3431 ret->srelbss = NULL;
3432 ret->srelplt2 = NULL;
0855e32b
NS		 3433 ret->dt_tlsdesc_plt = 0;
3434 ret->dt_tlsdesc_got = 0;
3435 ret->tls_trampoline = 0;
3436 ret->next_tls_desc_index = 0;
3437 ret->num_tls_desc = 0;
906e58ca
NC		 3438 ret->thumb_glue_size = 0;
3439 ret->arm_glue_size = 0;
3440 ret->bx_glue_size = 0;
3441 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3442 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3443 ret->vfp11_erratum_glue_size = 0;
3444 ret->num_vfp11_fixes = 0;
48229727 3445 ret->fix_cortex_a8 = 0;
2de70689 3446 ret->fix_arm1176 = 0;
906e58ca
NC		 3447 ret->bfd_of_glue_owner = NULL;
3448 ret->byteswap_code = 0;
3449 ret->target1_is_rel = 0;
3450 ret->target2_reloc = R_ARM_NONE;
3451#ifdef FOUR_WORD_PLT
3452 ret->plt_header_size = 16;
3453 ret->plt_entry_size = 16;
3454#else
3455 ret->plt_header_size = 20;
3456 ret->plt_entry_size = 12;
3457#endif
3458 ret->fix_v4bx = 0;
3459 ret->use_blx = 0;
3460 ret->vxworks_p = 0;
3461 ret->symbian_p = 0;
b38cadfb 3462 ret->nacl_p = 0;
906e58ca 3463 ret->use_rel = 1;
87d72d41 3464 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3465 ret->obfd = abfd;
3466 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3467 ret->stub_bfd = NULL;
3468 ret->add_stub_section = NULL;
3469 ret->layout_sections_again = NULL;
3470 ret->stub_group = NULL;
fe33d2fa 3471 ret->top_id = 0;
6cee0a6f
L		 3472 ret->bfd_count = 0;
3473 ret->top_index = 0;
3474 ret->input_list = NULL;
906e58ca
NC		 3475
3476 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3477 sizeof (struct elf32_arm_stub_hash_entry)))
3478 {
3479 free (ret);
3480 return NULL;
3481 }
3482
3483 return &ret->root.root;
3484}
3485
3486/* Free the derived linker hash table. */
3487
3488static void
3489elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3490{
3491 struct elf32_arm_link_hash_table *ret
3492 = (struct elf32_arm_link_hash_table *) hash;
3493
3494 bfd_hash_table_free (&ret->stub_hash_table);
3495 _bfd_generic_link_hash_table_free (hash);
3496}
3497
3498/* Determine if we're dealing with a Thumb only architecture. */
3499
3500static bfd_boolean
3501using_thumb_only (struct elf32_arm_link_hash_table *globals)
3502{
3503 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3504 Tag_CPU_arch);
3505 int profile;
3506
41ed1ee7
DJ		 3507 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3508 return TRUE;
3509
9e3c6df6 3510 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3511 return FALSE;
3512
3513 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3514 Tag_CPU_arch_profile);
3515
3516 return profile == 'M';
3517}
3518
3519/* Determine if we're dealing with a Thumb-2 object. */
3520
3521static bfd_boolean
3522using_thumb2 (struct elf32_arm_link_hash_table *globals)
3523{
3524 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3525 Tag_CPU_arch);
3526 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3527}
3528
cd1dac3d
DG		 3529/* Determine what kind of NOPs are available. */
3530
3531static bfd_boolean
3532arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3533{
3534 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3535 Tag_CPU_arch);
3536 return arch == TAG_CPU_ARCH_V6T2
3537 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3538 || arch == TAG_CPU_ARCH_V7
3539 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3540}
3541
3542static bfd_boolean
3543arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3544{
3545 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3546 Tag_CPU_arch);
9e3c6df6
PB		 3547 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3548 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3549}
3550
f4ac8484
DJ		 3551static bfd_boolean
3552arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3553{
3554 switch (stub_type)
3555 {
fea2b4d6
CL		 3556 case arm_stub_long_branch_thumb_only:
3557 case arm_stub_long_branch_v4t_thumb_arm:
3558 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3559 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3560 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3561 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3562 return TRUE;
3563 case arm_stub_none:
3564 BFD_FAIL ();
3565 return FALSE;
3566 break;
3567 default:
3568 return FALSE;
3569 }
3570}
3571
906e58ca
NC		 3572/* Determine the type of stub needed, if any, for a call. */
3573
3574static enum elf32_arm_stub_type
3575arm_type_of_stub (struct bfd_link_info *info,
3576 asection *input_sec,
3577 const Elf_Internal_Rela *rel,
34e77a92 3578 unsigned char st_type,
35fc36a8 3579 enum arm_st_branch_type *actual_branch_type,
906e58ca 3580 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3581 bfd_vma destination,
3582 asection *sym_sec,
3583 bfd *input_bfd,
3584 const char *name)
906e58ca
NC		 3585{
3586 bfd_vma location;
3587 bfd_signed_vma branch_offset;
3588 unsigned int r_type;
3589 struct elf32_arm_link_hash_table * globals;
3590 int thumb2;
3591 int thumb_only;
3592 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3593 int use_plt = 0;
35fc36a8 3594 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3595 union gotplt_union *root_plt;
3596 struct arm_plt_info *arm_plt;
906e58ca 3597
35fc36a8 3598 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3599 return stub_type;
3600
906e58ca 3601 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3602 if (globals == NULL)
3603 return stub_type;
906e58ca
NC		 3604
3605 thumb_only = using_thumb_only (globals);
3606
3607 thumb2 = using_thumb2 (globals);
3608
3609 /* Determine where the call point is. */
3610 location = (input_sec->output_offset
3611 + input_sec->output_section->vma
3612 + rel->r_offset);
3613
906e58ca
NC		 3614 r_type = ELF32_R_TYPE (rel->r_info);
3615
34e77a92
RS		 3616 /* For TLS call relocs, it is the caller's responsibility to provide
3617 the address of the appropriate trampoline. */
3618 if (r_type != R_ARM_TLS_CALL
3619 && r_type != R_ARM_THM_TLS_CALL
3620 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3621 &root_plt, &arm_plt)
3622 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3623 {
34e77a92 3624 asection *splt;
fe33d2fa 3625
34e77a92
RS		 3626 if (hash == NULL || hash->is_iplt)
3627 splt = globals->root.iplt;
3628 else
3629 splt = globals->root.splt;
3630 if (splt != NULL)
b38cadfb 3631 {
34e77a92
RS		 3632 use_plt = 1;
3633
3634 /* Note when dealing with PLT entries: the main PLT stub is in
3635 ARM mode, so if the branch is in Thumb mode, another
3636 Thumb->ARM stub will be inserted later just before the ARM
3637 PLT stub. We don't take this extra distance into account
3638 here, because if a long branch stub is needed, we'll add a
3639 Thumb->Arm one and branch directly to the ARM PLT entry
3640 because it avoids spreading offset corrections in several
3641 places. */
3642
3643 destination = (splt->output_section->vma
3644 + splt->output_offset
3645 + root_plt->offset);
3646 st_type = STT_FUNC;
3647 branch_type = ST_BRANCH_TO_ARM;
3648 }
5fa9e92f 3649 }
34e77a92
RS		 3650 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3651 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3652
fe33d2fa
CL		 3653 branch_offset = (bfd_signed_vma)(destination - location);
3654
0855e32b
NS		 3655 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3656 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3657 {
5fa9e92f
CL		 3658 /* Handle cases where:
3659 - this call goes too far (different Thumb/Thumb2 max
3660 distance)
155d87d7
CL		 3661 - it's a Thumb->Arm call and blx is not available, or it's a
3662 Thumb->Arm branch (not bl). A stub is needed in this case,
3663 but only if this call is not through a PLT entry. Indeed,
3664 PLT stubs handle mode switching already.
5fa9e92f 3665 */
906e58ca
NC		 3666 if ((!thumb2
3667 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3668 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3669 || (thumb2
3670 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3671 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3672 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3673 && (((r_type == R_ARM_THM_CALL
3674 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3675 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3676 && !use_plt))
906e58ca 3677 {
35fc36a8 3678 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3679 {
3680 /* Thumb to thumb. */
3681 if (!thumb_only)
3682 {
3683 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3684 /* PIC stubs. */
155d87d7 3685 ? ((globals->use_blx
9553db3c 3686 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3687 /* V5T and above. Stub starts with ARM code, so
3688 we must be able to switch mode before
3689 reaching it, which is only possible for 'bl'
3690 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3691 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3692 /* On V4T, use Thumb code only. */
d3626fb0 3693 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3694
3695 /* non-PIC stubs. */
155d87d7 3696 : ((globals->use_blx
9553db3c 3697 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3698 /* V5T and above. */
3699 ? arm_stub_long_branch_any_any
3700 /* V4T. */
d3626fb0 3701 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3702 }
3703 else
3704 {
3705 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3706 /* PIC stub. */
3707 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3708 /* non-PIC stub. */
3709 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3710 }
3711 }
3712 else
3713 {
3714 /* Thumb to arm. */
c820be07
NC		 3715 if (sym_sec != NULL
3716 && sym_sec->owner != NULL
3717 && !INTERWORK_FLAG (sym_sec->owner))
3718 {
3719 (*_bfd_error_handler)
3720 (_("%B(%s): warning: interworking not enabled.\n"
3721 " first occurrence: %B: Thumb call to ARM"),
3722 sym_sec->owner, input_bfd, name);
3723 }
3724
0855e32b
NS		 3725 stub_type =
3726 (info->shared | globals->pic_veneer)
c2b4a39d 3727 /* PIC stubs. */
0855e32b
NS		 3728 ? (r_type == R_ARM_THM_TLS_CALL
3729 /* TLS PIC stubs */
3730 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3731 : arm_stub_long_branch_v4t_thumb_tls_pic)
3732 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3733 /* V5T PIC and above. */
3734 ? arm_stub_long_branch_any_arm_pic
3735 /* V4T PIC stub. */
3736 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3737
3738 /* non-PIC stubs. */
0855e32b 3739 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3740 /* V5T and above. */
3741 ? arm_stub_long_branch_any_any
3742 /* V4T. */
3743 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3744
3745 /* Handle v4t short branches. */
fea2b4d6 3746 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3747 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3748 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3749 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3750 }
3751 }
3752 }
fe33d2fa
CL		 3753 else if (r_type == R_ARM_CALL
3754 || r_type == R_ARM_JUMP24
0855e32b
NS		 3755 || r_type == R_ARM_PLT32
3756 || r_type == R_ARM_TLS_CALL)
906e58ca 3757 {
35fc36a8 3758 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3759 {
3760 /* Arm to thumb. */
c820be07
NC		 3761
3762 if (sym_sec != NULL
3763 && sym_sec->owner != NULL
3764 && !INTERWORK_FLAG (sym_sec->owner))
3765 {
3766 (*_bfd_error_handler)
3767 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3768 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3769 sym_sec->owner, input_bfd, name);
3770 }
3771
3772 /* We have an extra 2-bytes reach because of
3773 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3774 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3775 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3776 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3777 || (r_type == R_ARM_JUMP24)
3778 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3779 {
3780 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3781 /* PIC stubs. */
ebe24dd4
CL		 3782 ? ((globals->use_blx)
3783 /* V5T and above. */
3784 ? arm_stub_long_branch_any_thumb_pic
3785 /* V4T stub. */
3786 : arm_stub_long_branch_v4t_arm_thumb_pic)
3787
c2b4a39d
CL		 3788 /* non-PIC stubs. */
3789 : ((globals->use_blx)
3790 /* V5T and above. */
3791 ? arm_stub_long_branch_any_any
3792 /* V4T. */
3793 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3794 }
3795 }
3796 else
3797 {
3798 /* Arm to arm. */
3799 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3800 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3801 {
0855e32b
NS		 3802 stub_type =
3803 (info->shared | globals->pic_veneer)
c2b4a39d 3804 /* PIC stubs. */
0855e32b
NS		 3805 ? (r_type == R_ARM_TLS_CALL
3806 /* TLS PIC Stub */
3807 ? arm_stub_long_branch_any_tls_pic
3808 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3809 /* non-PIC stubs. */
fea2b4d6 3810 : arm_stub_long_branch_any_any;
906e58ca
NC		 3811 }
3812 }
3813 }
3814
fe33d2fa
CL		 3815 /* If a stub is needed, record the actual destination type. */
3816 if (stub_type != arm_stub_none)
35fc36a8 3817 *actual_branch_type = branch_type;
fe33d2fa 3818
906e58ca
NC		 3819 return stub_type;
3820}
3821
3822/* Build a name for an entry in the stub hash table. */
3823
3824static char *
3825elf32_arm_stub_name (const asection *input_section,
3826 const asection *sym_sec,
3827 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3828 const Elf_Internal_Rela *rel,
3829 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3830{
3831 char *stub_name;
3832 bfd_size_type len;
3833
3834 if (hash)
3835 {
fe33d2fa 3836 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3837 stub_name = (char *) bfd_malloc (len);
906e58ca 3838 if (stub_name != NULL)
fe33d2fa 3839 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3840 input_section->id & 0xffffffff,
3841 hash->root.root.root.string,
fe33d2fa
CL		 3842 (int) rel->r_addend & 0xffffffff,
3843 (int) stub_type);
906e58ca
NC		 3844 }
3845 else
3846 {
fe33d2fa 3847 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3848 stub_name = (char *) bfd_malloc (len);
906e58ca 3849 if (stub_name != NULL)
fe33d2fa 3850 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3851 input_section->id & 0xffffffff,
3852 sym_sec->id & 0xffffffff,
0855e32b
NS		 3853 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3854 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3855 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3856 (int) rel->r_addend & 0xffffffff,
3857 (int) stub_type);
906e58ca
NC		 3858 }
3859
3860 return stub_name;
3861}
3862
3863/* Look up an entry in the stub hash. Stub entries are cached because
3864 creating the stub name takes a bit of time. */
3865
3866static struct elf32_arm_stub_hash_entry *
3867elf32_arm_get_stub_entry (const asection *input_section,
3868 const asection *sym_sec,
3869 struct elf_link_hash_entry *hash,
3870 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3871 struct elf32_arm_link_hash_table *htab,
3872 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3873{
3874 struct elf32_arm_stub_hash_entry *stub_entry;
3875 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3876 const asection *id_sec;
3877
3878 if ((input_section->flags & SEC_CODE) == 0)
3879 return NULL;
3880
3881 /* If this input section is part of a group of sections sharing one
3882 stub section, then use the id of the first section in the group.
3883 Stub names need to include a section id, as there may well be
3884 more than one stub used to reach say, printf, and we need to
3885 distinguish between them. */
3886 id_sec = htab->stub_group[input_section->id].link_sec;
3887
3888 if (h != NULL && h->stub_cache != NULL
3889 && h->stub_cache->h == h
fe33d2fa
CL		 3890 && h->stub_cache->id_sec == id_sec
3891 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3892 {
3893 stub_entry = h->stub_cache;
3894 }
3895 else
3896 {
3897 char *stub_name;
3898
fe33d2fa 3899 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3900 if (stub_name == NULL)
3901 return NULL;
3902
3903 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3904 stub_name, FALSE, FALSE);
3905 if (h != NULL)
3906 h->stub_cache = stub_entry;
3907
3908 free (stub_name);
3909 }
3910
3911 return stub_entry;
3912}
3913
48229727 3914/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3915 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3916 LINK_SEC_P may be NULL. */
906e58ca 3917
48229727
JB		 3918static asection *
3919elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3920 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3921{
3922 asection *link_sec;
3923 asection *stub_sec;
906e58ca
NC		 3924
3925 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3926 BFD_ASSERT (link_sec != NULL);
906e58ca 3927 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3928
906e58ca
NC		 3929 if (stub_sec == NULL)
3930 {
3931 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3932 if (stub_sec == NULL)
3933 {
3934 size_t namelen;
3935 bfd_size_type len;
3936 char *s_name;
3937
3938 namelen = strlen (link_sec->name);
3939 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3940 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3941 if (s_name == NULL)
3942 return NULL;
3943
3944 memcpy (s_name, link_sec->name, namelen);
3945 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3946 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3947 if (stub_sec == NULL)
3948 return NULL;
3949 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3950 }
3951 htab->stub_group[section->id].stub_sec = stub_sec;
3952 }
b38cadfb 3953
48229727
JB		 3954 if (link_sec_p)
3955 *link_sec_p = link_sec;
b38cadfb 3956
48229727
JB		 3957 return stub_sec;
3958}
3959
3960/* Add a new stub entry to the stub hash. Not all fields of the new
3961 stub entry are initialised. */
3962
3963static struct elf32_arm_stub_hash_entry *
3964elf32_arm_add_stub (const char *stub_name,
3965 asection *section,
3966 struct elf32_arm_link_hash_table *htab)
3967{
3968 asection *link_sec;
3969 asection *stub_sec;
3970 struct elf32_arm_stub_hash_entry *stub_entry;
3971
3972 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3973 if (stub_sec == NULL)
3974 return NULL;
906e58ca
NC		 3975
3976 /* Enter this entry into the linker stub hash table. */
3977 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3978 TRUE, FALSE);
3979 if (stub_entry == NULL)
3980 {
3981 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3982 section->owner,
3983 stub_name);
3984 return NULL;
3985 }
3986
3987 stub_entry->stub_sec = stub_sec;
3988 stub_entry->stub_offset = 0;
3989 stub_entry->id_sec = link_sec;
3990
906e58ca
NC		 3991 return stub_entry;
3992}
3993
3994/* Store an Arm insn into an output section not processed by
3995 elf32_arm_write_section. */
3996
3997static void
8029a119
NC		 3998put_arm_insn (struct elf32_arm_link_hash_table * htab,
3999 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4000{
4001 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4002 bfd_putl32 (val, ptr);
4003 else
4004 bfd_putb32 (val, ptr);
4005}
4006
4007/* Store a 16-bit Thumb insn into an output section not processed by
4008 elf32_arm_write_section. */
4009
4010static void
8029a119
NC		 4011put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4012 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4013{
4014 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4015 bfd_putl16 (val, ptr);
4016 else
4017 bfd_putb16 (val, ptr);
4018}
4019
0855e32b
NS		 4020/* If it's possible to change R_TYPE to a more efficient access
4021 model, return the new reloc type. */
4022
4023static unsigned
b38cadfb 4024elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4025 struct elf_link_hash_entry *h)
4026{
4027 int is_local = (h == NULL);
4028
4029 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4030 return r_type;
4031
b38cadfb 4032 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4033 switch (r_type)
4034 {
4035 case R_ARM_TLS_GOTDESC:
4036 case R_ARM_TLS_CALL:
4037 case R_ARM_THM_TLS_CALL:
4038 case R_ARM_TLS_DESCSEQ:
4039 case R_ARM_THM_TLS_DESCSEQ:
4040 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4041 }
4042
4043 return r_type;
4044}
4045
48229727
JB		 4046static bfd_reloc_status_type elf32_arm_final_link_relocate
4047 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4048 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4049 const char *, unsigned char, enum arm_st_branch_type,
4050 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4051
4563a860
JB		 4052static unsigned int
4053arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4054{
4055 switch (stub_type)
4056 {
4057 case arm_stub_a8_veneer_b_cond:
4058 case arm_stub_a8_veneer_b:
4059 case arm_stub_a8_veneer_bl:
4060 return 2;
4061
4062 case arm_stub_long_branch_any_any:
4063 case arm_stub_long_branch_v4t_arm_thumb:
4064 case arm_stub_long_branch_thumb_only:
4065 case arm_stub_long_branch_v4t_thumb_thumb:
4066 case arm_stub_long_branch_v4t_thumb_arm:
4067 case arm_stub_short_branch_v4t_thumb_arm:
4068 case arm_stub_long_branch_any_arm_pic:
4069 case arm_stub_long_branch_any_thumb_pic:
4070 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4071 case arm_stub_long_branch_v4t_arm_thumb_pic:
4072 case arm_stub_long_branch_v4t_thumb_arm_pic:
4073 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4074 case arm_stub_long_branch_any_tls_pic:
4075 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4076 case arm_stub_a8_veneer_blx:
4077 return 4;
b38cadfb 4078
4563a860
JB		 4079 default:
4080 abort (); /* Should be unreachable. */
4081 }
4082}
4083
906e58ca
NC		 4084static bfd_boolean
4085arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4086 void * in_arg)
4087{
48229727 4088#define MAXRELOCS 2
906e58ca 4089 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4090 struct elf32_arm_link_hash_table *globals;
906e58ca 4091 struct bfd_link_info *info;
906e58ca
NC		 4092 asection *stub_sec;
4093 bfd *stub_bfd;
906e58ca
NC		 4094 bfd_byte *loc;
4095 bfd_vma sym_value;
4096 int template_size;
4097 int size;
d3ce72d0 4098 const insn_sequence *template_sequence;
906e58ca 4099 int i;
48229727
JB		 4100 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4101 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4102 int nrelocs = 0;
906e58ca
NC		 4103
4104 /* Massage our args to the form they really have. */
4105 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4106 info = (struct bfd_link_info *) in_arg;
4107
4108 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4109 if (globals == NULL)
4110 return FALSE;
906e58ca 4111
906e58ca
NC		 4112 stub_sec = stub_entry->stub_sec;
4113
4dfe6ac6 4114 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4115 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4116 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4117 return TRUE;
fe33d2fa 4118
906e58ca
NC		 4119 /* Make a note of the offset within the stubs for this entry. */
4120 stub_entry->stub_offset = stub_sec->size;
4121 loc = stub_sec->contents + stub_entry->stub_offset;
4122
4123 stub_bfd = stub_sec->owner;
4124
906e58ca
NC		 4125 /* This is the address of the stub destination. */
4126 sym_value = (stub_entry->target_value
4127 + stub_entry->target_section->output_offset
4128 + stub_entry->target_section->output_section->vma);
4129
d3ce72d0 4130 template_sequence = stub_entry->stub_template;
461a49ca 4131 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4132
4133 size = 0;
461a49ca 4134 for (i = 0; i < template_size; i++)
906e58ca 4135 {
d3ce72d0 4136 switch (template_sequence[i].type)
461a49ca
DJ		 4137 {
4138 case THUMB16_TYPE:
48229727 4139 {
d3ce72d0
NC		 4140 bfd_vma data = (bfd_vma) template_sequence[i].data;
4141 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 4142 {
4143 /* We've borrowed the reloc_addend field to mean we should
4144 insert a condition code into this (Thumb-1 branch)
4145 instruction. See THUMB16_BCOND_INSN. */
4146 BFD_ASSERT ((data & 0xff00) == 0xd000);
4147 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4148 }
fe33d2fa 4149 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4150 size += 2;
4151 }
461a49ca 4152 break;
906e58ca 4153
48229727 4154 case THUMB32_TYPE:
fe33d2fa
CL		 4155 bfd_put_16 (stub_bfd,
4156 (template_sequence[i].data >> 16) & 0xffff,
4157 loc + size);
4158 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4159 loc + size + 2);
d3ce72d0 4160 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 4161 {
4162 stub_reloc_idx[nrelocs] = i;
4163 stub_reloc_offset[nrelocs++] = size;
4164 }
4165 size += 4;
4166 break;
4167
461a49ca 4168 case ARM_TYPE:
fe33d2fa
CL		 4169 bfd_put_32 (stub_bfd, template_sequence[i].data,
4170 loc + size);
461a49ca
DJ		 4171 /* Handle cases where the target is encoded within the
4172 instruction. */
d3ce72d0 4173 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4174 {
48229727
JB		 4175 stub_reloc_idx[nrelocs] = i;
4176 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4177 }
4178 size += 4;
4179 break;
4180
4181 case DATA_TYPE:
d3ce72d0 4182 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4183 stub_reloc_idx[nrelocs] = i;
4184 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4185 size += 4;
4186 break;
4187
4188 default:
4189 BFD_FAIL ();
4190 return FALSE;
4191 }
906e58ca 4192 }
461a49ca 4193
906e58ca
NC		 4194 stub_sec->size += size;
4195
461a49ca
DJ		 4196 /* Stub size has already been computed in arm_size_one_stub. Check
4197 consistency. */
4198 BFD_ASSERT (size == stub_entry->stub_size);
4199
906e58ca 4200 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4201 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4202 sym_value |= 1;
4203
48229727
JB		 4204 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4205 in each stub. */
4206 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4207
48229727 4208 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4209 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4210 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4211 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4212 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4213 {
4214 Elf_Internal_Rela rel;
4215 bfd_boolean unresolved_reloc;
4216 char *error_message;
35fc36a8
RS		 4217 enum arm_st_branch_type branch_type
4218 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4219 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4220 bfd_vma points_to = sym_value + stub_entry->target_addend;
4221
4222 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 4223 rel.r_info = ELF32_R_INFO (0,
4224 template_sequence[stub_reloc_idx[i]].r_type);
4225 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4226
4227 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4228 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4229 template should refer back to the instruction after the original
4230 branch. */
4231 points_to = sym_value;
4232
33c6a8fc
JB		 4233 /* There may be unintended consequences if this is not true. */
4234 BFD_ASSERT (stub_entry->h == NULL);
4235
48229727
JB		 4236 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4237 properly. We should probably use this function unconditionally,
4238 rather than only for certain relocations listed in the enclosing
4239 conditional, for the sake of consistency. */
4240 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4241 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4242 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4243 points_to, info, stub_entry->target_section, "", STT_FUNC,
4244 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4245 &unresolved_reloc, &error_message);
48229727
JB		 4246 }
4247 else
4248 {
fe33d2fa
CL		 4249 Elf_Internal_Rela rel;
4250 bfd_boolean unresolved_reloc;
4251 char *error_message;
4252 bfd_vma points_to = sym_value + stub_entry->target_addend
4253 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4254
4255 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4256 rel.r_info = ELF32_R_INFO (0,
4257 template_sequence[stub_reloc_idx[i]].r_type);
4258 rel.r_addend = 0;
4259
4260 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4261 (template_sequence[stub_reloc_idx[i]].r_type),
4262 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4263 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4264 stub_entry->branch_type,
fe33d2fa
CL		 4265 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4266 &error_message);
48229727 4267 }
906e58ca
NC		 4268
4269 return TRUE;
48229727 4270#undef MAXRELOCS
906e58ca
NC		 4271}
4272
48229727
JB		 4273/* Calculate the template, template size and instruction size for a stub.
4274 Return value is the instruction size. */
906e58ca 4275
48229727
JB		 4276static unsigned int
4277find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4278 const insn_sequence **stub_template,
4279 int *stub_template_size)
906e58ca 4280{
d3ce72d0 4281 const insn_sequence *template_sequence = NULL;
48229727
JB		 4282 int template_size = 0, i;
4283 unsigned int size;
906e58ca 4284
d3ce72d0 4285 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4286 if (stub_template)
4287 *stub_template = template_sequence;
4288
48229727 4289 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4290 if (stub_template_size)
4291 *stub_template_size = template_size;
906e58ca
NC		 4292
4293 size = 0;
461a49ca
DJ		 4294 for (i = 0; i < template_size; i++)
4295 {
d3ce72d0 4296 switch (template_sequence[i].type)
461a49ca
DJ		 4297 {
4298 case THUMB16_TYPE:
4299 size += 2;
4300 break;
4301
4302 case ARM_TYPE:
48229727 4303 case THUMB32_TYPE:
461a49ca
DJ		 4304 case DATA_TYPE:
4305 size += 4;
4306 break;
4307
4308 default:
4309 BFD_FAIL ();
2a229407 4310 return 0;
461a49ca
DJ		 4311 }
4312 }
4313
48229727
JB		 4314 return size;
4315}
4316
4317/* As above, but don't actually build the stub. Just bump offset so
4318 we know stub section sizes. */
4319
4320static bfd_boolean
4321arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4322 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4323{
4324 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4325 const insn_sequence *template_sequence;
48229727
JB		 4326 int template_size, size;
4327
4328 /* Massage our args to the form they really have. */
4329 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4330
4331 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4332 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4333
d3ce72d0 4334 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4335 &template_size);
4336
461a49ca 4337 stub_entry->stub_size = size;
d3ce72d0 4338 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4339 stub_entry->stub_template_size = template_size;
4340
906e58ca
NC		 4341 size = (size + 7) & ~7;
4342 stub_entry->stub_sec->size += size;
461a49ca 4343
906e58ca
NC		 4344 return TRUE;
4345}
4346
4347/* External entry points for sizing and building linker stubs. */
4348
4349/* Set up various things so that we can make a list of input sections
4350 for each output section included in the link. Returns -1 on error,
4351 0 when no stubs will be needed, and 1 on success. */
4352
4353int
4354elf32_arm_setup_section_lists (bfd *output_bfd,
4355 struct bfd_link_info *info)
4356{
4357 bfd *input_bfd;
4358 unsigned int bfd_count;
4359 int top_id, top_index;
4360 asection *section;
4361 asection **input_list, **list;
4362 bfd_size_type amt;
4363 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4364
4dfe6ac6
NC		 4365 if (htab == NULL)
4366 return 0;
906e58ca
NC		 4367 if (! is_elf_hash_table (htab))
4368 return 0;
4369
4370 /* Count the number of input BFDs and find the top input section id. */
4371 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4372 input_bfd != NULL;
4373 input_bfd = input_bfd->link_next)
4374 {
4375 bfd_count += 1;
4376 for (section = input_bfd->sections;
4377 section != NULL;
4378 section = section->next)
4379 {
4380 if (top_id < section->id)
4381 top_id = section->id;
4382 }
4383 }
4384 htab->bfd_count = bfd_count;
4385
4386 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4387 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4388 if (htab->stub_group == NULL)
4389 return -1;
fe33d2fa 4390 htab->top_id = top_id;
906e58ca
NC		 4391
4392 /* We can't use output_bfd->section_count here to find the top output
4393 section index as some sections may have been removed, and
4394 _bfd_strip_section_from_output doesn't renumber the indices. */
4395 for (section = output_bfd->sections, top_index = 0;
4396 section != NULL;
4397 section = section->next)
4398 {
4399 if (top_index < section->index)
4400 top_index = section->index;
4401 }
4402
4403 htab->top_index = top_index;
4404 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4405 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4406 htab->input_list = input_list;
4407 if (input_list == NULL)
4408 return -1;
4409
4410 /* For sections we aren't interested in, mark their entries with a
4411 value we can check later. */
4412 list = input_list + top_index;
4413 do
4414 *list = bfd_abs_section_ptr;
4415 while (list-- != input_list);
4416
4417 for (section = output_bfd->sections;
4418 section != NULL;
4419 section = section->next)
4420 {
4421 if ((section->flags & SEC_CODE) != 0)
4422 input_list[section->index] = NULL;
4423 }
4424
4425 return 1;
4426}
4427
4428/* The linker repeatedly calls this function for each input section,
4429 in the order that input sections are linked into output sections.
4430 Build lists of input sections to determine groupings between which
4431 we may insert linker stubs. */
4432
4433void
4434elf32_arm_next_input_section (struct bfd_link_info *info,
4435 asection *isec)
4436{
4437 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4438
4dfe6ac6
NC		 4439 if (htab == NULL)
4440 return;
4441
906e58ca
NC		 4442 if (isec->output_section->index <= htab->top_index)
4443 {
4444 asection **list = htab->input_list + isec->output_section->index;
4445
a7470592 4446 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4447 {
4448 /* Steal the link_sec pointer for our list. */
4449#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4450 /* This happens to make the list in reverse order,
07d72278 4451 which we reverse later. */
906e58ca
NC		 4452 PREV_SEC (isec) = *list;
4453 *list = isec;
4454 }
4455 }
4456}
4457
4458/* See whether we can group stub sections together. Grouping stub
4459 sections may result in fewer stubs. More importantly, we need to
07d72278 4460 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4461 .fini output sections respectively, because glibc splits the
4462 _init and _fini functions into multiple parts. Putting a stub in
4463 the middle of a function is not a good idea. */
4464
4465static void
4466group_sections (struct elf32_arm_link_hash_table *htab,
4467 bfd_size_type stub_group_size,
07d72278 4468 bfd_boolean stubs_always_after_branch)
906e58ca 4469{
07d72278 4470 asection **list = htab->input_list;
906e58ca
NC		 4471
4472 do
4473 {
4474 asection *tail = *list;
07d72278 4475 asection *head;
906e58ca
NC		 4476
4477 if (tail == bfd_abs_section_ptr)
4478 continue;
4479
07d72278
DJ		 4480 /* Reverse the list: we must avoid placing stubs at the
4481 beginning of the section because the beginning of the text
4482 section may be required for an interrupt vector in bare metal
4483 code. */
4484#define NEXT_SEC PREV_SEC
e780aef2
CL		 4485 head = NULL;
4486 while (tail != NULL)
4487 {
4488 /* Pop from tail. */
4489 asection *item = tail;
4490 tail = PREV_SEC (item);
4491
4492 /* Push on head. */
4493 NEXT_SEC (item) = head;
4494 head = item;
4495 }
07d72278
DJ		 4496
4497 while (head != NULL)
906e58ca
NC		 4498 {
4499 asection *curr;
07d72278 4500 asection *next;
e780aef2
CL		 4501 bfd_vma stub_group_start = head->output_offset;
4502 bfd_vma end_of_next;
906e58ca 4503
07d72278 4504 curr = head;
e780aef2 4505 while (NEXT_SEC (curr) != NULL)
8cd931b7 4506 {
e780aef2
CL		 4507 next = NEXT_SEC (curr);
4508 end_of_next = next->output_offset + next->size;
4509 if (end_of_next - stub_group_start >= stub_group_size)
4510 /* End of NEXT is too far from start, so stop. */
8cd931b7 4511 break;
e780aef2
CL		 4512 /* Add NEXT to the group. */
4513 curr = next;
8cd931b7 4514 }
906e58ca 4515
07d72278 4516 /* OK, the size from the start to the start of CURR is less
906e58ca 4517 than stub_group_size and thus can be handled by one stub
07d72278 4518 section. (Or the head section is itself larger than
906e58ca
NC		 4519 stub_group_size, in which case we may be toast.)
4520 We should really be keeping track of the total size of
4521 stubs added here, as stubs contribute to the final output
7fb9f789 4522 section size. */
906e58ca
NC		 4523 do
4524 {
07d72278 4525 next = NEXT_SEC (head);
906e58ca 4526 /* Set up this stub group. */
07d72278 4527 htab->stub_group[head->id].link_sec = curr;
906e58ca 4528 }
07d72278 4529 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4530
4531 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4532 bytes after the stub section can be handled by it too. */
4533 if (!stubs_always_after_branch)
906e58ca 4534 {
e780aef2
CL		 4535 stub_group_start = curr->output_offset + curr->size;
4536
8cd931b7 4537 while (next != NULL)
906e58ca 4538 {
e780aef2
CL		 4539 end_of_next = next->output_offset + next->size;
4540 if (end_of_next - stub_group_start >= stub_group_size)
4541 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4542 break;
e780aef2 4543 /* Add NEXT to the stub group. */
07d72278
DJ		 4544 head = next;
4545 next = NEXT_SEC (head);
4546 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4547 }
4548 }
07d72278 4549 head = next;
906e58ca
NC		 4550 }
4551 }
07d72278 4552 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4553
4554 free (htab->input_list);
4555#undef PREV_SEC
07d72278 4556#undef NEXT_SEC
906e58ca
NC		 4557}
4558
48229727
JB		 4559/* Comparison function for sorting/searching relocations relating to Cortex-A8
4560 erratum fix. */
4561
4562static int
4563a8_reloc_compare (const void *a, const void *b)
4564{
21d799b5
NC		 4565 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4566 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4567
4568 if (ra->from < rb->from)
4569 return -1;
4570 else if (ra->from > rb->from)
4571 return 1;
4572 else
4573 return 0;
4574}
4575
4576static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4577 const char *, char **);
4578
4579/* Helper function to scan code for sequences which might trigger the Cortex-A8
4580 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4581 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4582 otherwise. */
4583
81694485
NC		 4584static bfd_boolean
4585cortex_a8_erratum_scan (bfd *input_bfd,
4586 struct bfd_link_info *info,
48229727
JB		 4587 struct a8_erratum_fix **a8_fixes_p,
4588 unsigned int *num_a8_fixes_p,
4589 unsigned int *a8_fix_table_size_p,
4590 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4591 unsigned int num_a8_relocs,
4592 unsigned prev_num_a8_fixes,
4593 bfd_boolean *stub_changed_p)
48229727
JB		 4594{
4595 asection *section;
4596 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4597 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4598 unsigned int num_a8_fixes = *num_a8_fixes_p;
4599 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4600
4dfe6ac6
NC		 4601 if (htab == NULL)
4602 return FALSE;
4603
48229727
JB		 4604 for (section = input_bfd->sections;
4605 section != NULL;
4606 section = section->next)
4607 {
4608 bfd_byte *contents = NULL;
4609 struct _arm_elf_section_data *sec_data;
4610 unsigned int span;
4611 bfd_vma base_vma;
4612
4613 if (elf_section_type (section) != SHT_PROGBITS
4614 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4615 || (section->flags & SEC_EXCLUDE) != 0
dbaa2011 4616 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
48229727
JB		 4617 || (section->output_section == bfd_abs_section_ptr))
4618 continue;
4619
4620 base_vma = section->output_section->vma + section->output_offset;
4621
4622 if (elf_section_data (section)->this_hdr.contents != NULL)
4623 contents = elf_section_data (section)->this_hdr.contents;
4624 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4625 return TRUE;
48229727
JB		 4626
4627 sec_data = elf32_arm_section_data (section);
4628
4629 for (span = 0; span < sec_data->mapcount; span++)
4630 {
4631 unsigned int span_start = sec_data->map[span].vma;
4632 unsigned int span_end = (span == sec_data->mapcount - 1)
4633 ? section->size : sec_data->map[span + 1].vma;
4634 unsigned int i;
4635 char span_type = sec_data->map[span].type;
4636 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4637
4638 if (span_type != 't')
4639 continue;
4640
4641 /* Span is entirely within a single 4KB region: skip scanning. */
4642 if (((base_vma + span_start) & ~0xfff)
4643 == ((base_vma + span_end) & ~0xfff))
4644 continue;
4645
4646 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4647
4648 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4649 * The branch target is in the same 4KB region as the
4650 first half of the branch.
4651 * The instruction before the branch is a 32-bit
81694485 4652 length non-branch instruction. */
48229727
JB		 4653 for (i = span_start; i < span_end;)
4654 {
4655 unsigned int insn = bfd_getl16 (&contents[i]);
4656 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4657 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4658
4659 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4660 insn_32bit = TRUE;
4661
4662 if (insn_32bit)
4663 {
4664 /* Load the rest of the insn (in manual-friendly order). */
4665 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4666
4667 /* Encoding T4: B<c>.W. */
4668 is_b = (insn & 0xf800d000) == 0xf0009000;
4669 /* Encoding T1: BL<c>.W. */
4670 is_bl = (insn & 0xf800d000) == 0xf000d000;
4671 /* Encoding T2: BLX<c>.W. */
4672 is_blx = (insn & 0xf800d000) == 0xf000c000;
4673 /* Encoding T3: B<c>.W (not permitted in IT block). */
4674 is_bcc = (insn & 0xf800d000) == 0xf0008000
4675 && (insn & 0x07f00000) != 0x03800000;
4676 }
4677
4678 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4679
81694485
NC		 4680 if (((base_vma + i) & 0xfff) == 0xffe
4681 && insn_32bit
4682 && is_32bit_branch
4683 && last_was_32bit
4684 && ! last_was_branch)
48229727 4685 {
8f73510c 4686 bfd_signed_vma offset = 0;
48229727
JB		 4687 bfd_boolean force_target_arm = FALSE;
4688 bfd_boolean force_target_thumb = FALSE;
4689 bfd_vma target;
4690 enum elf32_arm_stub_type stub_type = arm_stub_none;
4691 struct a8_erratum_reloc key, *found;
7d24e6a6 4692 bfd_boolean use_plt = FALSE;
48229727
JB		 4693
4694 key.from = base_vma + i;
21d799b5
NC		 4695 found = (struct a8_erratum_reloc *)
4696 bsearch (&key, a8_relocs, num_a8_relocs,
4697 sizeof (struct a8_erratum_reloc),
4698 &a8_reloc_compare);
48229727
JB		 4699
4700 if (found)
4701 {
4702 char *error_message = NULL;
4703 struct elf_link_hash_entry *entry;
4704
4705 /* We don't care about the error returned from this
4706 function, only if there is glue or not. */
4707 entry = find_thumb_glue (info, found->sym_name,
4708 &error_message);
4709
4710 if (entry)
4711 found->non_a8_stub = TRUE;
4712
92750f34 4713 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4714 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4715 && found->hash->root.plt.offset != (bfd_vma) -1)
4716 use_plt = TRUE;
4717
4718 if (found->r_type == R_ARM_THM_CALL)
4719 {
35fc36a8
RS		 4720 if (found->branch_type == ST_BRANCH_TO_ARM
4721 || use_plt)
92750f34
DJ		 4722 force_target_arm = TRUE;
4723 else
4724 force_target_thumb = TRUE;
4725 }
48229727
JB		 4726 }
4727
4728 /* Check if we have an offending branch instruction. */
4729
4730 if (found && found->non_a8_stub)
4731 /* We've already made a stub for this instruction, e.g.
4732 it's a long branch or a Thumb->ARM stub. Assume that
4733 stub will suffice to work around the A8 erratum (see
4734 setting of always_after_branch above). */
4735 ;
4736 else if (is_bcc)
4737 {
4738 offset = (insn & 0x7ff) << 1;
4739 offset |= (insn & 0x3f0000) >> 4;
4740 offset |= (insn & 0x2000) ? 0x40000 : 0;
4741 offset |= (insn & 0x800) ? 0x80000 : 0;
4742 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4743 if (offset & 0x100000)
81694485 4744 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4745 stub_type = arm_stub_a8_veneer_b_cond;
4746 }
4747 else if (is_b || is_bl || is_blx)
4748 {
4749 int s = (insn & 0x4000000) != 0;
4750 int j1 = (insn & 0x2000) != 0;
4751 int j2 = (insn & 0x800) != 0;
4752 int i1 = !(j1 ^ s);
4753 int i2 = !(j2 ^ s);
4754
4755 offset = (insn & 0x7ff) << 1;
4756 offset |= (insn & 0x3ff0000) >> 4;
4757 offset |= i2 << 22;
4758 offset |= i1 << 23;
4759 offset |= s << 24;
4760 if (offset & 0x1000000)
81694485 4761 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4762
4763 if (is_blx)
81694485 4764 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4765
4766 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4767 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4768 }
4769
4770 if (stub_type != arm_stub_none)
4771 {
4772 bfd_vma pc_for_insn = base_vma + i + 4;
4773
4774 /* The original instruction is a BL, but the target is
4775 an ARM instruction. If we were not making a stub,
4776 the BL would have been converted to a BLX. Use the
4777 BLX stub instead in that case. */
4778 if (htab->use_blx && force_target_arm
4779 && stub_type == arm_stub_a8_veneer_bl)
4780 {
4781 stub_type = arm_stub_a8_veneer_blx;
4782 is_blx = TRUE;
4783 is_bl = FALSE;
4784 }
4785 /* Conversely, if the original instruction was
4786 BLX but the target is Thumb mode, use the BL
4787 stub. */
4788 else if (force_target_thumb
4789 && stub_type == arm_stub_a8_veneer_blx)
4790 {
4791 stub_type = arm_stub_a8_veneer_bl;
4792 is_blx = FALSE;
4793 is_bl = TRUE;
4794 }
4795
4796 if (is_blx)
81694485 4797 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4798
4799 /* If we found a relocation, use the proper destination,
4800 not the offset in the (unrelocated) instruction.
4801 Note this is always done if we switched the stub type
4802 above. */
4803 if (found)
81694485
NC		 4804 offset =
4805 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4806
7d24e6a6
RS		 4807 /* If the stub will use a Thumb-mode branch to a
4808 PLT target, redirect it to the preceding Thumb
4809 entry point. */
4810 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4811 offset -= PLT_THUMB_STUB_SIZE;
4812
48229727
JB		 4813 target = pc_for_insn + offset;
4814
4815 /* The BLX stub is ARM-mode code. Adjust the offset to
4816 take the different PC value (+8 instead of +4) into
4817 account. */
4818 if (stub_type == arm_stub_a8_veneer_blx)
4819 offset += 4;
4820
4821 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4822 {
eb7c4339 4823 char *stub_name = NULL;
48229727
JB		 4824
4825 if (num_a8_fixes == a8_fix_table_size)
4826 {
4827 a8_fix_table_size *= 2;
21d799b5
NC		 4828 a8_fixes = (struct a8_erratum_fix *)
4829 bfd_realloc (a8_fixes,
4830 sizeof (struct a8_erratum_fix)
4831 * a8_fix_table_size);
48229727
JB		 4832 }
4833
eb7c4339
NS		 4834 if (num_a8_fixes < prev_num_a8_fixes)
4835 {
4836 /* If we're doing a subsequent scan,
4837 check if we've found the same fix as
4838 before, and try and reuse the stub
4839 name. */
4840 stub_name = a8_fixes[num_a8_fixes].stub_name;
4841 if ((a8_fixes[num_a8_fixes].section != section)
4842 || (a8_fixes[num_a8_fixes].offset != i))
4843 {
4844 free (stub_name);
4845 stub_name = NULL;
4846 *stub_changed_p = TRUE;
4847 }
4848 }
4849
4850 if (!stub_name)
4851 {
21d799b5 4852 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4853 if (stub_name != NULL)
4854 sprintf (stub_name, "%x:%x", section->id, i);
4855 }
48229727
JB		 4856
4857 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4858 a8_fixes[num_a8_fixes].section = section;
4859 a8_fixes[num_a8_fixes].offset = i;
4860 a8_fixes[num_a8_fixes].addend = offset;
4861 a8_fixes[num_a8_fixes].orig_insn = insn;
4862 a8_fixes[num_a8_fixes].stub_name = stub_name;
4863 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4864 a8_fixes[num_a8_fixes].branch_type =
4865 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4866
4867 num_a8_fixes++;
4868 }
4869 }
4870 }
4871
4872 i += insn_32bit ? 4 : 2;
4873 last_was_32bit = insn_32bit;
4874 last_was_branch = is_32bit_branch;
4875 }
4876 }
4877
4878 if (elf_section_data (section)->this_hdr.contents == NULL)
4879 free (contents);
4880 }
fe33d2fa 4881
48229727
JB		 4882 *a8_fixes_p = a8_fixes;
4883 *num_a8_fixes_p = num_a8_fixes;
4884 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4885
81694485 4886 return FALSE;
48229727
JB		 4887}
4888
906e58ca
NC		 4889/* Determine and set the size of the stub section for a final link.
4890
4891 The basic idea here is to examine all the relocations looking for
4892 PC-relative calls to a target that is unreachable with a "bl"
4893 instruction. */
4894
4895bfd_boolean
4896elf32_arm_size_stubs (bfd *output_bfd,
4897 bfd *stub_bfd,
4898 struct bfd_link_info *info,
4899 bfd_signed_vma group_size,
4900 asection * (*add_stub_section) (const char *, asection *),
4901 void (*layout_sections_again) (void))
4902{
4903 bfd_size_type stub_group_size;
07d72278 4904 bfd_boolean stubs_always_after_branch;
906e58ca 4905 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4906 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4907 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4908 struct a8_erratum_reloc *a8_relocs = NULL;
4909 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4910
4dfe6ac6
NC		 4911 if (htab == NULL)
4912 return FALSE;
4913
48229727
JB		 4914 if (htab->fix_cortex_a8)
4915 {
21d799b5
NC		 4916 a8_fixes = (struct a8_erratum_fix *)
4917 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4918 a8_relocs = (struct a8_erratum_reloc *)
4919 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4920 }
906e58ca
NC		 4921
4922 /* Propagate mach to stub bfd, because it may not have been
4923 finalized when we created stub_bfd. */
4924 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4925 bfd_get_mach (output_bfd));
4926
4927 /* Stash our params away. */
4928 htab->stub_bfd = stub_bfd;
4929 htab->add_stub_section = add_stub_section;
4930 htab->layout_sections_again = layout_sections_again;
07d72278 4931 stubs_always_after_branch = group_size < 0;
48229727
JB		 4932
4933 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4934 as the first half of a 32-bit branch straddling two 4K pages. This is a
4935 crude way of enforcing that. */
4936 if (htab->fix_cortex_a8)
4937 stubs_always_after_branch = 1;
4938
906e58ca
NC		 4939 if (group_size < 0)
4940 stub_group_size = -group_size;
4941 else
4942 stub_group_size = group_size;
4943
4944 if (stub_group_size == 1)
4945 {
4946 /* Default values. */
4947 /* Thumb branch range is +-4MB has to be used as the default
4948 maximum size (a given section can contain both ARM and Thumb
4949 code, so the worst case has to be taken into account).
4950
4951 This value is 24K less than that, which allows for 2025
4952 12-byte stubs. If we exceed that, then we will fail to link.
4953 The user will have to relink with an explicit group size
4954 option. */
4955 stub_group_size = 4170000;
4956 }
4957
07d72278 4958 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4959
3ae046cc
NS		 4960 /* If we're applying the cortex A8 fix, we need to determine the
4961 program header size now, because we cannot change it later --
4962 that could alter section placements. Notice the A8 erratum fix
4963 ends up requiring the section addresses to remain unchanged
4964 modulo the page size. That's something we cannot represent
4965 inside BFD, and we don't want to force the section alignment to
4966 be the page size. */
4967 if (htab->fix_cortex_a8)
4968 (*htab->layout_sections_again) ();
4969
906e58ca
NC		 4970 while (1)
4971 {
4972 bfd *input_bfd;
4973 unsigned int bfd_indx;
4974 asection *stub_sec;
eb7c4339
NS		 4975 bfd_boolean stub_changed = FALSE;
4976 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4977
48229727 4978 num_a8_fixes = 0;
906e58ca
NC		 4979 for (input_bfd = info->input_bfds, bfd_indx = 0;
4980 input_bfd != NULL;
4981 input_bfd = input_bfd->link_next, bfd_indx++)
4982 {
4983 Elf_Internal_Shdr *symtab_hdr;
4984 asection *section;
4985 Elf_Internal_Sym *local_syms = NULL;
4986
48229727
JB		 4987 num_a8_relocs = 0;
4988
906e58ca
NC		 4989 /* We'll need the symbol table in a second. */
4990 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4991 if (symtab_hdr->sh_info == 0)
4992 continue;
4993
4994 /* Walk over each section attached to the input bfd. */
4995 for (section = input_bfd->sections;
4996 section != NULL;
4997 section = section->next)
4998 {
4999 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5000
5001 /* If there aren't any relocs, then there's nothing more
5002 to do. */
5003 if ((section->flags & SEC_RELOC) == 0
5004 || section->reloc_count == 0
5005 || (section->flags & SEC_CODE) == 0)
5006 continue;
5007
5008 /* If this section is a link-once section that will be
5009 discarded, then don't create any stubs. */
5010 if (section->output_section == NULL
5011 || section->output_section->owner != output_bfd)
5012 continue;
5013
5014 /* Get the relocs. */
5015 internal_relocs
5016 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5017 NULL, info->keep_memory);
5018 if (internal_relocs == NULL)
5019 goto error_ret_free_local;
5020
5021 /* Now examine each relocation. */
5022 irela = internal_relocs;
5023 irelaend = irela + section->reloc_count;
5024 for (; irela < irelaend; irela++)
5025 {
5026 unsigned int r_type, r_indx;
5027 enum elf32_arm_stub_type stub_type;
5028 struct elf32_arm_stub_hash_entry *stub_entry;
5029 asection *sym_sec;
5030 bfd_vma sym_value;
5031 bfd_vma destination;
5032 struct elf32_arm_link_hash_entry *hash;
7413f23f 5033 const char *sym_name;
906e58ca
NC		 5034 char *stub_name;
5035 const asection *id_sec;
34e77a92 5036 unsigned char st_type;
35fc36a8 5037 enum arm_st_branch_type branch_type;
48229727 5038 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5039
5040 r_type = ELF32_R_TYPE (irela->r_info);
5041 r_indx = ELF32_R_SYM (irela->r_info);
5042
5043 if (r_type >= (unsigned int) R_ARM_max)
5044 {
5045 bfd_set_error (bfd_error_bad_value);
5046 error_ret_free_internal:
5047 if (elf_section_data (section)->relocs == NULL)
5048 free (internal_relocs);
5049 goto error_ret_free_local;
5050 }
b38cadfb 5051
0855e32b
NS		 5052 hash = NULL;
5053 if (r_indx >= symtab_hdr->sh_info)
5054 hash = elf32_arm_hash_entry
5055 (elf_sym_hashes (input_bfd)
5056 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5057
0855e32b
NS		 5058 /* Only look for stubs on branch instructions, or
5059 non-relaxed TLSCALL */
906e58ca 5060 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5061 && (r_type != (unsigned int) R_ARM_THM_CALL)
5062 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5063 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5064 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5065 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5066 && (r_type != (unsigned int) R_ARM_PLT32)
5067 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5068 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5069 && r_type == elf32_arm_tls_transition
5070 (info, r_type, &hash->root)
5071 && ((hash ? hash->tls_type
5072 : (elf32_arm_local_got_tls_type
5073 (input_bfd)[r_indx]))
5074 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5075 continue;
5076
5077 /* Now determine the call target, its name, value,
5078 section. */
5079 sym_sec = NULL;
5080 sym_value = 0;
5081 destination = 0;
7413f23f 5082 sym_name = NULL;
b38cadfb 5083
0855e32b
NS		 5084 if (r_type == (unsigned int) R_ARM_TLS_CALL
5085 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5086 {
5087 /* A non-relaxed TLS call. The target is the
5088 plt-resident trampoline and nothing to do
5089 with the symbol. */
5090 BFD_ASSERT (htab->tls_trampoline > 0);
5091 sym_sec = htab->root.splt;
5092 sym_value = htab->tls_trampoline;
5093 hash = 0;
34e77a92 5094 st_type = STT_FUNC;
35fc36a8 5095 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5096 }
5097 else if (!hash)
906e58ca
NC		 5098 {
5099 /* It's a local symbol. */
5100 Elf_Internal_Sym *sym;
906e58ca
NC		 5101
5102 if (local_syms == NULL)
5103 {
5104 local_syms
5105 = (Elf_Internal_Sym *) symtab_hdr->contents;
5106 if (local_syms == NULL)
5107 local_syms
5108 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5109 symtab_hdr->sh_info, 0,
5110 NULL, NULL, NULL);
5111 if (local_syms == NULL)
5112 goto error_ret_free_internal;
5113 }
5114
5115 sym = local_syms + r_indx;
f6d250ce
TS		 5116 if (sym->st_shndx == SHN_UNDEF)
5117 sym_sec = bfd_und_section_ptr;
5118 else if (sym->st_shndx == SHN_ABS)
5119 sym_sec = bfd_abs_section_ptr;
5120 else if (sym->st_shndx == SHN_COMMON)
5121 sym_sec = bfd_com_section_ptr;
5122 else
5123 sym_sec =
5124 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5125
ffcb4889
NS		 5126 if (!sym_sec)
5127 /* This is an undefined symbol. It can never
5128 be resolved. */
5129 continue;
fe33d2fa 5130
906e58ca
NC		 5131 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5132 sym_value = sym->st_value;
5133 destination = (sym_value + irela->r_addend
5134 + sym_sec->output_offset
5135 + sym_sec->output_section->vma);
34e77a92 5136 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5137 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5138 sym_name
5139 = bfd_elf_string_from_elf_section (input_bfd,
5140 symtab_hdr->sh_link,
5141 sym->st_name);
906e58ca
NC		 5142 }
5143 else
5144 {
5145 /* It's an external symbol. */
906e58ca
NC		 5146 while (hash->root.root.type == bfd_link_hash_indirect
5147 || hash->root.root.type == bfd_link_hash_warning)
5148 hash = ((struct elf32_arm_link_hash_entry *)
5149 hash->root.root.u.i.link);
5150
5151 if (hash->root.root.type == bfd_link_hash_defined
5152 || hash->root.root.type == bfd_link_hash_defweak)
5153 {
5154 sym_sec = hash->root.root.u.def.section;
5155 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5156
5157 struct elf32_arm_link_hash_table *globals =
5158 elf32_arm_hash_table (info);
5159
5160 /* For a destination in a shared library,
5161 use the PLT stub as target address to
5162 decide whether a branch stub is
5163 needed. */
4dfe6ac6 5164 if (globals != NULL
362d30a1 5165 && globals->root.splt != NULL
4dfe6ac6 5166 && hash != NULL
022f8312
CL		 5167 && hash->root.plt.offset != (bfd_vma) -1)
5168 {
362d30a1 5169 sym_sec = globals->root.splt;
022f8312
CL		 5170 sym_value = hash->root.plt.offset;
5171 if (sym_sec->output_section != NULL)
5172 destination = (sym_value
5173 + sym_sec->output_offset
5174 + sym_sec->output_section->vma);
5175 }
5176 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5177 destination = (sym_value + irela->r_addend
5178 + sym_sec->output_offset
5179 + sym_sec->output_section->vma);
5180 }
69c5861e
CL		 5181 else if ((hash->root.root.type == bfd_link_hash_undefined)
5182 || (hash->root.root.type == bfd_link_hash_undefweak))
5183 {
5184 /* For a shared library, use the PLT stub as
5185 target address to decide whether a long
5186 branch stub is needed.
5187 For absolute code, they cannot be handled. */
5188 struct elf32_arm_link_hash_table *globals =
5189 elf32_arm_hash_table (info);
5190
4dfe6ac6 5191 if (globals != NULL
362d30a1 5192 && globals->root.splt != NULL
4dfe6ac6 5193 && hash != NULL
69c5861e
CL		 5194 && hash->root.plt.offset != (bfd_vma) -1)
5195 {
362d30a1 5196 sym_sec = globals->root.splt;
69c5861e
CL		 5197 sym_value = hash->root.plt.offset;
5198 if (sym_sec->output_section != NULL)
5199 destination = (sym_value
5200 + sym_sec->output_offset
5201 + sym_sec->output_section->vma);
5202 }
5203 else
5204 continue;
5205 }
906e58ca
NC		 5206 else
5207 {
5208 bfd_set_error (bfd_error_bad_value);
5209 goto error_ret_free_internal;
5210 }
34e77a92 5211 st_type = hash->root.type;
35fc36a8 5212 branch_type = hash->root.target_internal;
7413f23f 5213 sym_name = hash->root.root.root.string;
906e58ca
NC		 5214 }
5215
48229727 5216 do
7413f23f 5217 {
48229727
JB		 5218 /* Determine what (if any) linker stub is needed. */
5219 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5220 st_type, &branch_type,
5221 hash, destination, sym_sec,
48229727
JB		 5222 input_bfd, sym_name);
5223 if (stub_type == arm_stub_none)
5224 break;
5225
5226 /* Support for grouping stub sections. */
5227 id_sec = htab->stub_group[section->id].link_sec;
5228
5229 /* Get the name of this stub. */
5230 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5231 irela, stub_type);
48229727
JB		 5232 if (!stub_name)
5233 goto error_ret_free_internal;
5234
5235 /* We've either created a stub for this reloc already,
5236 or we are about to. */
5237 created_stub = TRUE;
5238
5239 stub_entry = arm_stub_hash_lookup
5240 (&htab->stub_hash_table, stub_name,
5241 FALSE, FALSE);
5242 if (stub_entry != NULL)
5243 {
5244 /* The proper stub has already been created. */
5245 free (stub_name);
eb7c4339 5246 stub_entry->target_value = sym_value;
48229727
JB		 5247 break;
5248 }
7413f23f 5249
48229727
JB		 5250 stub_entry = elf32_arm_add_stub (stub_name, section,
5251 htab);
5252 if (stub_entry == NULL)
5253 {
5254 free (stub_name);
5255 goto error_ret_free_internal;
5256 }
7413f23f 5257
48229727
JB		 5258 stub_entry->target_value = sym_value;
5259 stub_entry->target_section = sym_sec;
5260 stub_entry->stub_type = stub_type;
5261 stub_entry->h = hash;
35fc36a8 5262 stub_entry->branch_type = branch_type;
48229727
JB		 5263
5264 if (sym_name == NULL)
5265 sym_name = "unnamed";
21d799b5
NC		 5266 stub_entry->output_name = (char *)
5267 bfd_alloc (htab->stub_bfd,
48229727
JB		 5268 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5269 + strlen (sym_name));
5270 if (stub_entry->output_name == NULL)
5271 {
5272 free (stub_name);
5273 goto error_ret_free_internal;
5274 }
5275
5276 /* For historical reasons, use the existing names for
5277 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 5278 if ((r_type == (unsigned int) R_ARM_THM_CALL
5279 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5280 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 5281 sprintf (stub_entry->output_name,
5282 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 5283 else if ((r_type == (unsigned int) R_ARM_CALL
5284 || r_type == (unsigned int) R_ARM_JUMP24)
5285 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 5286 sprintf (stub_entry->output_name,
5287 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5288 else
5289 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5290 sym_name);
5291
5292 stub_changed = TRUE;
5293 }
5294 while (0);
5295
5296 /* Look for relocations which might trigger Cortex-A8
5297 erratum. */
5298 if (htab->fix_cortex_a8
5299 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5300 || r_type == (unsigned int) R_ARM_THM_JUMP19
5301 || r_type == (unsigned int) R_ARM_THM_CALL
5302 || r_type == (unsigned int) R_ARM_THM_XPC22))
5303 {
5304 bfd_vma from = section->output_section->vma
5305 + section->output_offset
5306 + irela->r_offset;
5307
5308 if ((from & 0xfff) == 0xffe)
5309 {
5310 /* Found a candidate. Note we haven't checked the
5311 destination is within 4K here: if we do so (and
5312 don't create an entry in a8_relocs) we can't tell
5313 that a branch should have been relocated when
5314 scanning later. */
5315 if (num_a8_relocs == a8_reloc_table_size)
5316 {
5317 a8_reloc_table_size *= 2;
21d799b5
NC		 5318 a8_relocs = (struct a8_erratum_reloc *)
5319 bfd_realloc (a8_relocs,
5320 sizeof (struct a8_erratum_reloc)
5321 * a8_reloc_table_size);
48229727
JB		 5322 }
5323
5324 a8_relocs[num_a8_relocs].from = from;
5325 a8_relocs[num_a8_relocs].destination = destination;
5326 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 5327 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 5328 a8_relocs[num_a8_relocs].sym_name = sym_name;
5329 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 5330 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 5331
5332 num_a8_relocs++;
5333 }
5334 }
906e58ca
NC		 5335 }
5336
48229727
JB		 5337 /* We're done with the internal relocs, free them. */
5338 if (elf_section_data (section)->relocs == NULL)
5339 free (internal_relocs);
5340 }
5341
5342 if (htab->fix_cortex_a8)
5343 {
5344 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 5345 qsort (a8_relocs, num_a8_relocs,
5346 sizeof (struct a8_erratum_reloc),
48229727
JB		 5347 &a8_reloc_compare);
5348
5349 /* Scan for branches which might trigger Cortex-A8 erratum. */
5350 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5351 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5352 a8_relocs, num_a8_relocs,
5353 prev_num_a8_fixes, &stub_changed)
5354 != 0)
48229727 5355 goto error_ret_free_local;
5e681ec4 5356 }
5e681ec4
PB		 5357 }
5358
eb7c4339 5359 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 5360 stub_changed = TRUE;
5361
906e58ca
NC		 5362 if (!stub_changed)
5363 break;
5e681ec4 5364
906e58ca
NC		 5365 /* OK, we've added some stubs. Find out the new size of the
5366 stub sections. */
5367 for (stub_sec = htab->stub_bfd->sections;
5368 stub_sec != NULL;
5369 stub_sec = stub_sec->next)
3e6b1042
DJ		 5370 {
5371 /* Ignore non-stub sections. */
5372 if (!strstr (stub_sec->name, STUB_SUFFIX))
5373 continue;
5374
5375 stub_sec->size = 0;
5376 }
b34b2d70 5377
906e58ca
NC		 5378 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5379
48229727
JB		 5380 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5381 if (htab->fix_cortex_a8)
5382 for (i = 0; i < num_a8_fixes; i++)
5383 {
5384 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5385 a8_fixes[i].section, htab);
5386
5387 if (stub_sec == NULL)
5388 goto error_ret_free_local;
5389
5390 stub_sec->size
5391 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5392 NULL);
5393 }
5394
5395
906e58ca
NC		 5396 /* Ask the linker to do its stuff. */
5397 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5398 }
5399
48229727
JB		 5400 /* Add stubs for Cortex-A8 erratum fixes now. */
5401 if (htab->fix_cortex_a8)
5402 {
5403 for (i = 0; i < num_a8_fixes; i++)
5404 {
5405 struct elf32_arm_stub_hash_entry *stub_entry;
5406 char *stub_name = a8_fixes[i].stub_name;
5407 asection *section = a8_fixes[i].section;
5408 unsigned int section_id = a8_fixes[i].section->id;
5409 asection *link_sec = htab->stub_group[section_id].link_sec;
5410 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 5411 const insn_sequence *template_sequence;
48229727
JB		 5412 int template_size, size = 0;
5413
5414 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5415 TRUE, FALSE);
5416 if (stub_entry == NULL)
5417 {
5418 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5419 section->owner,
5420 stub_name);
5421 return FALSE;
5422 }
5423
5424 stub_entry->stub_sec = stub_sec;
5425 stub_entry->stub_offset = 0;
5426 stub_entry->id_sec = link_sec;
5427 stub_entry->stub_type = a8_fixes[i].stub_type;
5428 stub_entry->target_section = a8_fixes[i].section;
5429 stub_entry->target_value = a8_fixes[i].offset;
5430 stub_entry->target_addend = a8_fixes[i].addend;
5431 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5432 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5433
d3ce72d0
NC		 5434 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5435 &template_sequence,
48229727
JB		 5436 &template_size);
5437
5438 stub_entry->stub_size = size;
d3ce72d0 5439 stub_entry->stub_template = template_sequence;
48229727
JB		 5440 stub_entry->stub_template_size = template_size;
5441 }
5442
5443 /* Stash the Cortex-A8 erratum fix array for use later in
5444 elf32_arm_write_section(). */
5445 htab->a8_erratum_fixes = a8_fixes;
5446 htab->num_a8_erratum_fixes = num_a8_fixes;
5447 }
5448 else
5449 {
5450 htab->a8_erratum_fixes = NULL;
5451 htab->num_a8_erratum_fixes = 0;
5452 }
906e58ca
NC		 5453 return TRUE;
5454
5455 error_ret_free_local:
5456 return FALSE;
5e681ec4
PB		 5457}
5458
906e58ca
NC		 5459/* Build all the stubs associated with the current output file. The
5460 stubs are kept in a hash table attached to the main linker hash
5461 table. We also set up the .plt entries for statically linked PIC
5462 functions here. This function is called via arm_elf_finish in the
5463 linker. */
252b5132 5464
906e58ca
NC		 5465bfd_boolean
5466elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5467{
906e58ca
NC		 5468 asection *stub_sec;
5469 struct bfd_hash_table *table;
5470 struct elf32_arm_link_hash_table *htab;
252b5132 5471
906e58ca 5472 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5473 if (htab == NULL)
5474 return FALSE;
252b5132 5475
906e58ca
NC		 5476 for (stub_sec = htab->stub_bfd->sections;
5477 stub_sec != NULL;
5478 stub_sec = stub_sec->next)
252b5132 5479 {
906e58ca
NC		 5480 bfd_size_type size;
5481
8029a119 5482 /* Ignore non-stub sections. */
906e58ca
NC		 5483 if (!strstr (stub_sec->name, STUB_SUFFIX))
5484 continue;
5485
5486 /* Allocate memory to hold the linker stubs. */
5487 size = stub_sec->size;
21d799b5 5488 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5489 if (stub_sec->contents == NULL && size != 0)
5490 return FALSE;
5491 stub_sec->size = 0;
252b5132
RH		 5492 }
5493
906e58ca
NC		 5494 /* Build the stubs as directed by the stub hash table. */
5495 table = &htab->stub_hash_table;
5496 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5497 if (htab->fix_cortex_a8)
5498 {
5499 /* Place the cortex a8 stubs last. */
5500 htab->fix_cortex_a8 = -1;
5501 bfd_hash_traverse (table, arm_build_one_stub, info);
5502 }
252b5132 5503
906e58ca 5504 return TRUE;
252b5132
RH		 5505}
5506
9b485d32
NC		 5507/* Locate the Thumb encoded calling stub for NAME. */
5508
252b5132 5509static struct elf_link_hash_entry *
57e8b36a
NC		 5510find_thumb_glue (struct bfd_link_info *link_info,
5511 const char *name,
f2a9dd69 5512 char **error_message)
252b5132
RH		 5513{
5514 char *tmp_name;
5515 struct elf_link_hash_entry *hash;
5516 struct elf32_arm_link_hash_table *hash_table;
5517
5518 /* We need a pointer to the armelf specific hash table. */
5519 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5520 if (hash_table == NULL)
5521 return NULL;
252b5132 5522
21d799b5
NC		 5523 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5524 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5525
5526 BFD_ASSERT (tmp_name);
5527
5528 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5529
5530 hash = elf_link_hash_lookup
b34976b6 5531 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5532
b1657152
AM		 5533 if (hash == NULL
5534 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5535 tmp_name, name) == -1)
5536 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5537
5538 free (tmp_name);
5539
5540 return hash;
5541}
5542
9b485d32
NC		 5543/* Locate the ARM encoded calling stub for NAME. */
5544
252b5132 5545static struct elf_link_hash_entry *
57e8b36a
NC		 5546find_arm_glue (struct bfd_link_info *link_info,
5547 const char *name,
f2a9dd69 5548 char **error_message)
252b5132
RH		 5549{
5550 char *tmp_name;
5551 struct elf_link_hash_entry *myh;
5552 struct elf32_arm_link_hash_table *hash_table;
5553
5554 /* We need a pointer to the elfarm specific hash table. */
5555 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5556 if (hash_table == NULL)
5557 return NULL;
252b5132 5558
21d799b5
NC		 5559 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5560 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5561
5562 BFD_ASSERT (tmp_name);
5563
5564 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5565
5566 myh = elf_link_hash_lookup
b34976b6 5567 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5568
b1657152
AM		 5569 if (myh == NULL
5570 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5571 tmp_name, name) == -1)
5572 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5573
5574 free (tmp_name);
5575
5576 return myh;
5577}
5578
8f6277f5 5579/* ARM->Thumb glue (static images):
252b5132
RH		 5580
5581 .arm
5582 __func_from_arm:
5583 ldr r12, __func_addr
5584 bx r12
5585 __func_addr:
906e58ca 5586 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5587
26079076
PB		 5588 (v5t static images)
5589 .arm
5590 __func_from_arm:
5591 ldr pc, __func_addr
5592 __func_addr:
906e58ca 5593 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5594
8f6277f5
PB		 5595 (relocatable images)
5596 .arm
5597 __func_from_arm:
5598 ldr r12, __func_offset
5599 add r12, r12, pc
5600 bx r12
5601 __func_offset:
8029a119 5602 .word func - . */
8f6277f5
PB		 5603
5604#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5605static const insn32 a2t1_ldr_insn = 0xe59fc000;
5606static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5607static const insn32 a2t3_func_addr_insn = 0x00000001;
5608
26079076
PB		 5609#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5610static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5611static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5612
8f6277f5
PB		 5613#define ARM2THUMB_PIC_GLUE_SIZE 16
5614static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5615static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5616static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5617
9b485d32 5618/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5619
8029a119
NC		 5620 .thumb .thumb
5621 .align 2 .align 2
5622 __func_from_thumb: __func_from_thumb:
5623 bx pc push {r6, lr}
5624 nop ldr r6, __func_addr
5625 .arm mov lr, pc
5626 b func bx r6
fcef9eb7 5627 .arm
b38cadfb 5628 ;; back_to_thumb
fcef9eb7 5629 ldmia r13! {r6, lr}
b38cadfb 5630 bx lr
8029a119
NC		 5631 __func_addr:
5632 .word func */
252b5132
RH		 5633
5634#define THUMB2ARM_GLUE_SIZE 8
5635static const insn16 t2a1_bx_pc_insn = 0x4778;
5636static const insn16 t2a2_noop_insn = 0x46c0;
5637static const insn32 t2a3_b_insn = 0xea000000;
5638
c7b8f16e
JB		 5639#define VFP11_ERRATUM_VENEER_SIZE 8
5640
845b51d6
PB		 5641#define ARM_BX_VENEER_SIZE 12
5642static const insn32 armbx1_tst_insn = 0xe3100001;
5643static const insn32 armbx2_moveq_insn = 0x01a0f000;
5644static const insn32 armbx3_bx_insn = 0xe12fff10;
5645
7e392df6 5646#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5647static void
5648arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5649{
5650 asection * s;
8029a119 5651 bfd_byte * contents;
252b5132 5652
8029a119 5653 if (size == 0)
3e6b1042
DJ		 5654 {
5655 /* Do not include empty glue sections in the output. */
5656 if (abfd != NULL)
5657 {
3d4d4302 5658 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5659 if (s != NULL)
5660 s->flags |= SEC_EXCLUDE;
5661 }
5662 return;
5663 }
252b5132 5664
8029a119 5665 BFD_ASSERT (abfd != NULL);
252b5132 5666
3d4d4302 5667 s = bfd_get_linker_section (abfd, name);
8029a119 5668 BFD_ASSERT (s != NULL);
252b5132 5669
21d799b5 5670 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5671
8029a119
NC		 5672 BFD_ASSERT (s->size == size);
5673 s->contents = contents;
5674}
906e58ca 5675
8029a119
NC		 5676bfd_boolean
5677bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5678{
5679 struct elf32_arm_link_hash_table * globals;
906e58ca 5680
8029a119
NC		 5681 globals = elf32_arm_hash_table (info);
5682 BFD_ASSERT (globals != NULL);
906e58ca 5683
8029a119
NC		 5684 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5685 globals->arm_glue_size,
5686 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5687
8029a119
NC		 5688 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5689 globals->thumb_glue_size,
5690 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5691
8029a119
NC		 5692 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5693 globals->vfp11_erratum_glue_size,
5694 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5695
8029a119
NC		 5696 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5697 globals->bx_glue_size,
845b51d6
PB		 5698 ARM_BX_GLUE_SECTION_NAME);
5699
b34976b6 5700 return TRUE;
252b5132
RH		 5701}
5702
a4fd1a8e 5703/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5704 returns the symbol identifying the stub. */
5705
a4fd1a8e 5706static struct elf_link_hash_entry *
57e8b36a
NC		 5707record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5708 struct elf_link_hash_entry * h)
252b5132
RH		 5709{
5710 const char * name = h->root.root.string;
63b0f745 5711 asection * s;
252b5132
RH		 5712 char * tmp_name;
5713 struct elf_link_hash_entry * myh;
14a793b2 5714 struct bfd_link_hash_entry * bh;
252b5132 5715 struct elf32_arm_link_hash_table * globals;
dc810e39 5716 bfd_vma val;
2f475487 5717 bfd_size_type size;
252b5132
RH		 5718
5719 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5720 BFD_ASSERT (globals != NULL);
5721 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5722
3d4d4302 5723 s = bfd_get_linker_section
252b5132
RH		 5724 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5725
252b5132
RH		 5726 BFD_ASSERT (s != NULL);
5727
21d799b5
NC		 5728 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5729 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5730
5731 BFD_ASSERT (tmp_name);
5732
5733 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5734
5735 myh = elf_link_hash_lookup
b34976b6 5736 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5737
5738 if (myh != NULL)
5739 {
9b485d32 5740 /* We've already seen this guy. */
252b5132 5741 free (tmp_name);
a4fd1a8e 5742 return myh;
252b5132
RH		 5743 }
5744
57e8b36a
NC		 5745 /* The only trick here is using hash_table->arm_glue_size as the value.
5746 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5747 putting it. The +1 on the value marks that the stub has not been
5748 output yet - not that it is a Thumb function. */
14a793b2 5749 bh = NULL;
dc810e39
AM		 5750 val = globals->arm_glue_size + 1;
5751 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5752 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5753 NULL, TRUE, FALSE, &bh);
252b5132 5754
b7693d02
DJ		 5755 myh = (struct elf_link_hash_entry *) bh;
5756 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5757 myh->forced_local = 1;
5758
252b5132
RH		 5759 free (tmp_name);
5760
27e55c4d
PB		 5761 if (link_info->shared || globals->root.is_relocatable_executable
5762 || globals->pic_veneer)
2f475487 5763 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5764 else if (globals->use_blx)
5765 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5766 else
2f475487
AM		 5767 size = ARM2THUMB_STATIC_GLUE_SIZE;
5768
5769 s->size += size;
5770 globals->arm_glue_size += size;
252b5132 5771
a4fd1a8e 5772 return myh;
252b5132
RH		 5773}
5774
845b51d6
PB		 5775/* Allocate space for ARMv4 BX veneers. */
5776
5777static void
5778record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5779{
5780 asection * s;
5781 struct elf32_arm_link_hash_table *globals;
5782 char *tmp_name;
5783 struct elf_link_hash_entry *myh;
5784 struct bfd_link_hash_entry *bh;
5785 bfd_vma val;
5786
5787 /* BX PC does not need a veneer. */
5788 if (reg == 15)
5789 return;
5790
5791 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5792 BFD_ASSERT (globals != NULL);
5793 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5794
5795 /* Check if this veneer has already been allocated. */
5796 if (globals->bx_glue_offset[reg])
5797 return;
5798
3d4d4302 5799 s = bfd_get_linker_section
845b51d6
PB		 5800 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5801
5802 BFD_ASSERT (s != NULL);
5803
5804 /* Add symbol for veneer. */
21d799b5
NC		 5805 tmp_name = (char *)
5806 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5807
845b51d6 5808 BFD_ASSERT (tmp_name);
906e58ca 5809
845b51d6 5810 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5811
845b51d6
PB		 5812 myh = elf_link_hash_lookup
5813 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5814
845b51d6 5815 BFD_ASSERT (myh == NULL);
906e58ca 5816
845b51d6
PB		 5817 bh = NULL;
5818 val = globals->bx_glue_size;
5819 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5820 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5821 NULL, TRUE, FALSE, &bh);
5822
5823 myh = (struct elf_link_hash_entry *) bh;
5824 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5825 myh->forced_local = 1;
5826
5827 s->size += ARM_BX_VENEER_SIZE;
5828 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5829 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5830}
5831
5832
c7b8f16e
JB		 5833/* Add an entry to the code/data map for section SEC. */
5834
5835static void
5836elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5837{
5838 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5839 unsigned int newidx;
906e58ca 5840
c7b8f16e
JB		 5841 if (sec_data->map == NULL)
5842 {
21d799b5
NC		 5843 sec_data->map = (elf32_arm_section_map *)
5844 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5845 sec_data->mapcount = 0;
5846 sec_data->mapsize = 1;
5847 }
906e58ca 5848
c7b8f16e 5849 newidx = sec_data->mapcount++;
906e58ca 5850
c7b8f16e
JB		 5851 if (sec_data->mapcount > sec_data->mapsize)
5852 {
5853 sec_data->mapsize *= 2;
21d799b5
NC		 5854 sec_data->map = (elf32_arm_section_map *)
5855 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5856 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5857 }
5858
5859 if (sec_data->map)
5860 {
5861 sec_data->map[newidx].vma = vma;
5862 sec_data->map[newidx].type = type;
c7b8f16e 5863 }
c7b8f16e
JB		 5864}
5865
5866
5867/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5868 veneers are handled for now. */
5869
5870static bfd_vma
5871record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5872 elf32_vfp11_erratum_list *branch,
5873 bfd *branch_bfd,
5874 asection *branch_sec,
5875 unsigned int offset)
5876{
5877 asection *s;
5878 struct elf32_arm_link_hash_table *hash_table;
5879 char *tmp_name;
5880 struct elf_link_hash_entry *myh;
5881 struct bfd_link_hash_entry *bh;
5882 bfd_vma val;
5883 struct _arm_elf_section_data *sec_data;
c7b8f16e 5884 elf32_vfp11_erratum_list *newerr;
906e58ca 5885
c7b8f16e 5886 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5887 BFD_ASSERT (hash_table != NULL);
5888 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5889
3d4d4302 5890 s = bfd_get_linker_section
c7b8f16e 5891 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5892
c7b8f16e 5893 sec_data = elf32_arm_section_data (s);
906e58ca 5894
c7b8f16e 5895 BFD_ASSERT (s != NULL);
906e58ca 5896
21d799b5
NC		 5897 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5898 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5899
c7b8f16e 5900 BFD_ASSERT (tmp_name);
906e58ca 5901
c7b8f16e
JB		 5902 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5903 hash_table->num_vfp11_fixes);
906e58ca 5904
c7b8f16e
JB		 5905 myh = elf_link_hash_lookup
5906 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5907
c7b8f16e 5908 BFD_ASSERT (myh == NULL);
906e58ca 5909
c7b8f16e
JB		 5910 bh = NULL;
5911 val = hash_table->vfp11_erratum_glue_size;
5912 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5913 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5914 NULL, TRUE, FALSE, &bh);
5915
5916 myh = (struct elf_link_hash_entry *) bh;
5917 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5918 myh->forced_local = 1;
5919
5920 /* Link veneer back to calling location. */
c7e2358a 5921 sec_data->erratumcount += 1;
21d799b5
NC		 5922 newerr = (elf32_vfp11_erratum_list *)
5923 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5924
c7b8f16e
JB		 5925 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5926 newerr->vma = -1;
5927 newerr->u.v.branch = branch;
5928 newerr->u.v.id = hash_table->num_vfp11_fixes;
5929 branch->u.b.veneer = newerr;
5930
5931 newerr->next = sec_data->erratumlist;
5932 sec_data->erratumlist = newerr;
5933
5934 /* A symbol for the return from the veneer. */
5935 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5936 hash_table->num_vfp11_fixes);
5937
5938 myh = elf_link_hash_lookup
5939 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5940
c7b8f16e
JB		 5941 if (myh != NULL)
5942 abort ();
5943
5944 bh = NULL;
5945 val = offset + 4;
5946 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5947 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5948
c7b8f16e
JB		 5949 myh = (struct elf_link_hash_entry *) bh;
5950 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5951 myh->forced_local = 1;
5952
5953 free (tmp_name);
906e58ca 5954
c7b8f16e
JB		 5955 /* Generate a mapping symbol for the veneer section, and explicitly add an
5956 entry for that symbol to the code/data map for the section. */
5957 if (hash_table->vfp11_erratum_glue_size == 0)
5958 {
5959 bh = NULL;
5960 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5961 ever requires this erratum fix. */
5962 _bfd_generic_link_add_one_symbol (link_info,
5963 hash_table->bfd_of_glue_owner, "$a",
5964 BSF_LOCAL, s, 0, NULL,
5965 TRUE, FALSE, &bh);
5966
5967 myh = (struct elf_link_hash_entry *) bh;
5968 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5969 myh->forced_local = 1;
906e58ca 5970
c7b8f16e
JB		 5971 /* The elf32_arm_init_maps function only cares about symbols from input
5972 BFDs. We must make a note of this generated mapping symbol
5973 ourselves so that code byteswapping works properly in
5974 elf32_arm_write_section. */
5975 elf32_arm_section_map_add (s, 'a', 0);
5976 }
906e58ca 5977
c7b8f16e
JB		 5978 s->size += VFP11_ERRATUM_VENEER_SIZE;
5979 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5980 hash_table->num_vfp11_fixes++;
906e58ca 5981
c7b8f16e
JB		 5982 /* The offset of the veneer. */
5983 return val;
5984}
5985
8029a119 5986#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5987 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5988 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5989
5990/* Create a fake section for use by the ARM backend of the linker. */
5991
5992static bfd_boolean
5993arm_make_glue_section (bfd * abfd, const char * name)
5994{
5995 asection * sec;
5996
3d4d4302 5997 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 5998 if (sec != NULL)
5999 /* Already made. */
6000 return TRUE;
6001
3d4d4302 6002 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6003
6004 if (sec == NULL
6005 || !bfd_set_section_alignment (abfd, sec, 2))
6006 return FALSE;
6007
6008 /* Set the gc mark to prevent the section from being removed by garbage
6009 collection, despite the fact that no relocs refer to this section. */
6010 sec->gc_mark = 1;
6011
6012 return TRUE;
6013}
6014
8afb0e02
NC		 6015/* Add the glue sections to ABFD. This function is called from the
6016 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6017
b34976b6 6018bfd_boolean
57e8b36a
NC		 6019bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6020 struct bfd_link_info *info)
252b5132 6021{
8afb0e02
NC		 6022 /* If we are only performing a partial
6023 link do not bother adding the glue. */
1049f94e 6024 if (info->relocatable)
b34976b6 6025 return TRUE;
252b5132 6026
8029a119
NC		 6027 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6028 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6029 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6030 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6031}
6032
6033/* Select a BFD to be used to hold the sections used by the glue code.
6034 This function is called from the linker scripts in ld/emultempl/
8029a119 6035 {armelf/pe}.em. */
8afb0e02 6036
b34976b6 6037bfd_boolean
57e8b36a 6038bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6039{
6040 struct elf32_arm_link_hash_table *globals;
6041
6042 /* If we are only performing a partial link
6043 do not bother getting a bfd to hold the glue. */
1049f94e 6044 if (info->relocatable)
b34976b6 6045 return TRUE;
8afb0e02 6046
b7693d02
DJ		 6047 /* Make sure we don't attach the glue sections to a dynamic object. */
6048 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6049
8afb0e02 6050 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6051 BFD_ASSERT (globals != NULL);
6052
6053 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6054 return TRUE;
8afb0e02 6055
252b5132
RH		 6056 /* Save the bfd for later use. */
6057 globals->bfd_of_glue_owner = abfd;
cedb70c5 6058
b34976b6 6059 return TRUE;
252b5132
RH		 6060}
6061
906e58ca
NC		 6062static void
6063check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6064{
2de70689
MGD		 6065 int cpu_arch;
6066
b38cadfb 6067 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6068 Tag_CPU_arch);
6069
6070 if (globals->fix_arm1176)
6071 {
6072 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6073 globals->use_blx = 1;
6074 }
6075 else
6076 {
6077 if (cpu_arch > TAG_CPU_ARCH_V4T)
6078 globals->use_blx = 1;
6079 }
39b41c9c
PB		 6080}
6081
b34976b6 6082bfd_boolean
57e8b36a 6083bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6084 struct bfd_link_info *link_info)
252b5132
RH		 6085{
6086 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6087 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6088 Elf_Internal_Rela *irel, *irelend;
6089 bfd_byte *contents = NULL;
252b5132
RH		 6090
6091 asection *sec;
6092 struct elf32_arm_link_hash_table *globals;
6093
6094 /* If we are only performing a partial link do not bother
6095 to construct any glue. */
1049f94e 6096 if (link_info->relocatable)
b34976b6 6097 return TRUE;
252b5132 6098
39ce1a6a
NC		 6099 /* Here we have a bfd that is to be included on the link. We have a
6100 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6101 globals = elf32_arm_hash_table (link_info);
252b5132 6102 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6103
6104 check_use_blx (globals);
252b5132 6105
d504ffc8 6106 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6107 {
d003868e
AM		 6108 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6109 abfd);
e489d0ae
PB		 6110 return FALSE;
6111 }
f21f3fe0 6112
39ce1a6a
NC		 6113 /* PR 5398: If we have not decided to include any loadable sections in
6114 the output then we will not have a glue owner bfd. This is OK, it
6115 just means that there is nothing else for us to do here. */
6116 if (globals->bfd_of_glue_owner == NULL)
6117 return TRUE;
6118
252b5132
RH		 6119 /* Rummage around all the relocs and map the glue vectors. */
6120 sec = abfd->sections;
6121
6122 if (sec == NULL)
b34976b6 6123 return TRUE;
252b5132
RH		 6124
6125 for (; sec != NULL; sec = sec->next)
6126 {
6127 if (sec->reloc_count == 0)
6128 continue;
6129
2f475487
AM		 6130 if ((sec->flags & SEC_EXCLUDE) != 0)
6131 continue;
6132
0ffa91dd 6133 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6134
9b485d32 6135 /* Load the relocs. */
6cdc0ccc 6136 internal_relocs
906e58ca 6137 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6138
6cdc0ccc
AM		 6139 if (internal_relocs == NULL)
6140 goto error_return;
252b5132 6141
6cdc0ccc
AM		 6142 irelend = internal_relocs + sec->reloc_count;
6143 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6144 {
6145 long r_type;
6146 unsigned long r_index;
252b5132
RH		 6147
6148 struct elf_link_hash_entry *h;
6149
6150 r_type = ELF32_R_TYPE (irel->r_info);
6151 r_index = ELF32_R_SYM (irel->r_info);
6152
9b485d32 6153 /* These are the only relocation types we care about. */
ba96a88f 6154 if ( r_type != R_ARM_PC24
845b51d6 6155 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6156 continue;
6157
6158 /* Get the section contents if we haven't done so already. */
6159 if (contents == NULL)
6160 {
6161 /* Get cached copy if it exists. */
6162 if (elf_section_data (sec)->this_hdr.contents != NULL)
6163 contents = elf_section_data (sec)->this_hdr.contents;
6164 else
6165 {
6166 /* Go get them off disk. */
57e8b36a 6167 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6168 goto error_return;
6169 }
6170 }
6171
845b51d6
PB		 6172 if (r_type == R_ARM_V4BX)
6173 {
6174 int reg;
6175
6176 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6177 record_arm_bx_glue (link_info, reg);
6178 continue;
6179 }
6180
a7c10850 6181 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6182 h = NULL;
6183
9b485d32 6184 /* We don't care about local symbols. */
252b5132
RH		 6185 if (r_index < symtab_hdr->sh_info)
6186 continue;
6187
9b485d32 6188 /* This is an external symbol. */
252b5132
RH		 6189 r_index -= symtab_hdr->sh_info;
6190 h = (struct elf_link_hash_entry *)
6191 elf_sym_hashes (abfd)[r_index];
6192
6193 /* If the relocation is against a static symbol it must be within
6194 the current section and so cannot be a cross ARM/Thumb relocation. */
6195 if (h == NULL)
6196 continue;
6197
d504ffc8
DJ		 6198 /* If the call will go through a PLT entry then we do not need
6199 glue. */
362d30a1 6200 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6201 continue;
6202
252b5132
RH		 6203 switch (r_type)
6204 {
6205 case R_ARM_PC24:
6206 /* This one is a call from arm code. We need to look up
2f0ca46a 6207 the target of the call. If it is a thumb target, we
252b5132 6208 insert glue. */
35fc36a8 6209 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6210 record_arm_to_thumb_glue (link_info, h);
6211 break;
6212
252b5132 6213 default:
c6596c5e 6214 abort ();
252b5132
RH		 6215 }
6216 }
6cdc0ccc
AM		 6217
6218 if (contents != NULL
6219 && elf_section_data (sec)->this_hdr.contents != contents)
6220 free (contents);
6221 contents = NULL;
6222
6223 if (internal_relocs != NULL
6224 && elf_section_data (sec)->relocs != internal_relocs)
6225 free (internal_relocs);
6226 internal_relocs = NULL;
252b5132
RH		 6227 }
6228
b34976b6 6229 return TRUE;
9a5aca8c 6230
252b5132 6231error_return:
6cdc0ccc
AM		 6232 if (contents != NULL
6233 && elf_section_data (sec)->this_hdr.contents != contents)
6234 free (contents);
6235 if (internal_relocs != NULL
6236 && elf_section_data (sec)->relocs != internal_relocs)
6237 free (internal_relocs);
9a5aca8c 6238
b34976b6 6239 return FALSE;
252b5132 6240}
7e392df6 6241#endif
252b5132 6242
eb043451 6243
c7b8f16e
JB		 6244/* Initialise maps of ARM/Thumb/data for input BFDs. */
6245
6246void
6247bfd_elf32_arm_init_maps (bfd *abfd)
6248{
6249 Elf_Internal_Sym *isymbuf;
6250 Elf_Internal_Shdr *hdr;
6251 unsigned int i, localsyms;
6252
af1f4419
NC		 6253 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6254 if (! is_arm_elf (abfd))
6255 return;
6256
c7b8f16e
JB		 6257 if ((abfd->flags & DYNAMIC) != 0)
6258 return;
6259
0ffa91dd 6260 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6261 localsyms = hdr->sh_info;
6262
6263 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6264 should contain the number of local symbols, which should come before any
6265 global symbols. Mapping symbols are always local. */
6266 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6267 NULL);
6268
6269 /* No internal symbols read? Skip this BFD. */
6270 if (isymbuf == NULL)
6271 return;
6272
6273 for (i = 0; i < localsyms; i++)
6274 {
6275 Elf_Internal_Sym *isym = &isymbuf[i];
6276 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6277 const char *name;
906e58ca 6278
c7b8f16e
JB		 6279 if (sec != NULL
6280 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6281 {
6282 name = bfd_elf_string_from_elf_section (abfd,
6283 hdr->sh_link, isym->st_name);
906e58ca 6284
c7b8f16e
JB		 6285 if (bfd_is_arm_special_symbol_name (name,
6286 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6287 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6288 }
6289 }
6290}
6291
6292
48229727
JB		 6293/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6294 say what they wanted. */
6295
6296void
6297bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6298{
6299 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6300 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6301
4dfe6ac6
NC		 6302 if (globals == NULL)
6303 return;
6304
48229727
JB		 6305 if (globals->fix_cortex_a8 == -1)
6306 {
6307 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6308 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6309 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6310 || out_attr[Tag_CPU_arch_profile].i == 0))
6311 globals->fix_cortex_a8 = 1;
6312 else
6313 globals->fix_cortex_a8 = 0;
6314 }
6315}
6316
6317
c7b8f16e
JB		 6318void
6319bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6320{
6321 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6322 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6323
4dfe6ac6
NC		 6324 if (globals == NULL)
6325 return;
c7b8f16e
JB		 6326 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6327 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6328 {
6329 switch (globals->vfp11_fix)
6330 {
6331 case BFD_ARM_VFP11_FIX_DEFAULT:
6332 case BFD_ARM_VFP11_FIX_NONE:
6333 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6334 break;
906e58ca 6335
c7b8f16e
JB		 6336 default:
6337 /* Give a warning, but do as the user requests anyway. */
6338 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6339 "workaround is not necessary for target architecture"), obfd);
6340 }
6341 }
6342 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6343 /* For earlier architectures, we might need the workaround, but do not
6344 enable it by default. If users is running with broken hardware, they
6345 must enable the erratum fix explicitly. */
6346 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6347}
6348
6349
906e58ca
NC		 6350enum bfd_arm_vfp11_pipe
6351{
c7b8f16e
JB		 6352 VFP11_FMAC,
6353 VFP11_LS,
6354 VFP11_DS,
6355 VFP11_BAD
6356};
6357
6358/* Return a VFP register number. This is encoded as RX:X for single-precision
6359 registers, or X:RX for double-precision registers, where RX is the group of
6360 four bits in the instruction encoding and X is the single extension bit.
6361 RX and X fields are specified using their lowest (starting) bit. The return
6362 value is:
6363
6364 0...31: single-precision registers s0...s31
6365 32...63: double-precision registers d0...d31.
906e58ca 6366
c7b8f16e
JB		 6367 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6368 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6369
c7b8f16e
JB		 6370static unsigned int
6371bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6372 unsigned int x)
6373{
6374 if (is_double)
6375 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6376 else
6377 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6378}
6379
6380/* Set bits in *WMASK according to a register number REG as encoded by
6381 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6382
6383static void
6384bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6385{
6386 if (reg < 32)
6387 *wmask |= 1 << reg;
6388 else if (reg < 48)
6389 *wmask |= 3 << ((reg - 32) * 2);
6390}
6391
6392/* Return TRUE if WMASK overwrites anything in REGS. */
6393
6394static bfd_boolean
6395bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6396{
6397 int i;
906e58ca 6398
c7b8f16e
JB		 6399 for (i = 0; i < numregs; i++)
6400 {
6401 unsigned int reg = regs[i];
6402
6403 if (reg < 32 && (wmask & (1 << reg)) != 0)
6404 return TRUE;
906e58ca 6405
c7b8f16e
JB		 6406 reg -= 32;
6407
6408 if (reg >= 16)
6409 continue;
906e58ca 6410
c7b8f16e
JB		 6411 if ((wmask & (3 << (reg * 2))) != 0)
6412 return TRUE;
6413 }
906e58ca 6414
c7b8f16e
JB		 6415 return FALSE;
6416}
6417
6418/* In this function, we're interested in two things: finding input registers
6419 for VFP data-processing instructions, and finding the set of registers which
6420 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6421 hold the written set, so FLDM etc. are easy to deal with (we're only
6422 interested in 32 SP registers or 16 dp registers, due to the VFP version
6423 implemented by the chip in question). DP registers are marked by setting
6424 both SP registers in the write mask). */
6425
6426static enum bfd_arm_vfp11_pipe
6427bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6428 int *numregs)
6429{
91d6fa6a 6430 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6431 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6432
6433 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6434 {
6435 unsigned int pqrs;
6436 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6437 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6438
6439 pqrs = ((insn & 0x00800000) >> 20)
6440 | ((insn & 0x00300000) >> 19)
6441 | ((insn & 0x00000040) >> 6);
6442
6443 switch (pqrs)
6444 {
6445 case 0: /* fmac[sd]. */
6446 case 1: /* fnmac[sd]. */
6447 case 2: /* fmsc[sd]. */
6448 case 3: /* fnmsc[sd]. */
91d6fa6a 6449 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6450 bfd_arm_vfp11_write_mask (destmask, fd);
6451 regs[0] = fd;
6452 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6453 regs[2] = fm;
6454 *numregs = 3;
6455 break;
6456
6457 case 4: /* fmul[sd]. */
6458 case 5: /* fnmul[sd]. */
6459 case 6: /* fadd[sd]. */
6460 case 7: /* fsub[sd]. */
91d6fa6a 6461 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6462 goto vfp_binop;
6463
6464 case 8: /* fdiv[sd]. */
91d6fa6a 6465 vpipe = VFP11_DS;
c7b8f16e
JB		 6466 vfp_binop:
6467 bfd_arm_vfp11_write_mask (destmask, fd);
6468 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6469 regs[1] = fm;
6470 *numregs = 2;
6471 break;
6472
6473 case 15: /* extended opcode. */
6474 {
6475 unsigned int extn = ((insn >> 15) & 0x1e)
6476 | ((insn >> 7) & 1);
6477
6478 switch (extn)
6479 {
6480 case 0: /* fcpy[sd]. */
6481 case 1: /* fabs[sd]. */
6482 case 2: /* fneg[sd]. */
6483 case 8: /* fcmp[sd]. */
6484 case 9: /* fcmpe[sd]. */
6485 case 10: /* fcmpz[sd]. */
6486 case 11: /* fcmpez[sd]. */
6487 case 16: /* fuito[sd]. */
6488 case 17: /* fsito[sd]. */
6489 case 24: /* ftoui[sd]. */
6490 case 25: /* ftouiz[sd]. */
6491 case 26: /* ftosi[sd]. */
6492 case 27: /* ftosiz[sd]. */
6493 /* These instructions will not bounce due to underflow. */
6494 *numregs = 0;
91d6fa6a 6495 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6496 break;
6497
6498 case 3: /* fsqrt[sd]. */
6499 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6500 registers to cause the erratum in previous instructions. */
6501 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6502 vpipe = VFP11_DS;
c7b8f16e
JB		 6503 break;
6504
6505 case 15: /* fcvt{ds,sd}. */
6506 {
6507 int rnum = 0;
6508
6509 bfd_arm_vfp11_write_mask (destmask, fd);
6510
6511 /* Only FCVTSD can underflow. */
6512 if ((insn & 0x100) != 0)
6513 regs[rnum++] = fm;
6514
6515 *numregs = rnum;
6516
91d6fa6a 6517 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6518 }
6519 break;
6520
6521 default:
6522 return VFP11_BAD;
6523 }
6524 }
6525 break;
6526
6527 default:
6528 return VFP11_BAD;
6529 }
6530 }
6531 /* Two-register transfer. */
6532 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6533 {
6534 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6535
c7b8f16e
JB		 6536 if ((insn & 0x100000) == 0)
6537 {
6538 if (is_double)
6539 bfd_arm_vfp11_write_mask (destmask, fm);
6540 else
6541 {
6542 bfd_arm_vfp11_write_mask (destmask, fm);
6543 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6544 }
6545 }
6546
91d6fa6a 6547 vpipe = VFP11_LS;
c7b8f16e
JB		 6548 }
6549 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6550 {
6551 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6552 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6553
c7b8f16e
JB		 6554 switch (puw)
6555 {
6556 case 0: /* Two-reg transfer. We should catch these above. */
6557 abort ();
906e58ca 6558
c7b8f16e
JB		 6559 case 2: /* fldm[sdx]. */
6560 case 3:
6561 case 5:
6562 {
6563 unsigned int i, offset = insn & 0xff;
6564
6565 if (is_double)
6566 offset >>= 1;
6567
6568 for (i = fd; i < fd + offset; i++)
6569 bfd_arm_vfp11_write_mask (destmask, i);
6570 }
6571 break;
906e58ca 6572
c7b8f16e
JB		 6573 case 4: /* fld[sd]. */
6574 case 6:
6575 bfd_arm_vfp11_write_mask (destmask, fd);
6576 break;
906e58ca 6577
c7b8f16e
JB		 6578 default:
6579 return VFP11_BAD;
6580 }
6581
91d6fa6a 6582 vpipe = VFP11_LS;
c7b8f16e
JB		 6583 }
6584 /* Single-register transfer. Note L==0. */
6585 else if ((insn & 0x0f100e10) == 0x0e000a10)
6586 {
6587 unsigned int opcode = (insn >> 21) & 7;
6588 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6589
6590 switch (opcode)
6591 {
6592 case 0: /* fmsr/fmdlr. */
6593 case 1: /* fmdhr. */
6594 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6595 destination register. I don't know if this is exactly right,
6596 but it is the conservative choice. */
6597 bfd_arm_vfp11_write_mask (destmask, fn);
6598 break;
6599
6600 case 7: /* fmxr. */
6601 break;
6602 }
6603
91d6fa6a 6604 vpipe = VFP11_LS;
c7b8f16e
JB		 6605 }
6606
91d6fa6a 6607 return vpipe;
c7b8f16e
JB		 6608}
6609
6610
6611static int elf32_arm_compare_mapping (const void * a, const void * b);
6612
6613
6614/* Look for potentially-troublesome code sequences which might trigger the
6615 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6616 (available from ARM) for details of the erratum. A short version is
6617 described in ld.texinfo. */
6618
6619bfd_boolean
6620bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6621{
6622 asection *sec;
6623 bfd_byte *contents = NULL;
6624 int state = 0;
6625 int regs[3], numregs = 0;
6626 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6627 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6628
4dfe6ac6
NC		 6629 if (globals == NULL)
6630 return FALSE;
6631
c7b8f16e
JB		 6632 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6633 The states transition as follows:
906e58ca 6634
c7b8f16e
JB		 6635 0 -> 1 (vector) or 0 -> 2 (scalar)
6636 A VFP FMAC-pipeline instruction has been seen. Fill
6637 regs[0]..regs[numregs-1] with its input operands. Remember this
6638 instruction in 'first_fmac'.
6639
6640 1 -> 2
6641 Any instruction, except for a VFP instruction which overwrites
6642 regs[*].
906e58ca 6643
c7b8f16e
JB		 6644 1 -> 3 [ -> 0 ] or
6645 2 -> 3 [ -> 0 ]
6646 A VFP instruction has been seen which overwrites any of regs[*].
6647 We must make a veneer! Reset state to 0 before examining next
6648 instruction.
906e58ca 6649
c7b8f16e
JB		 6650 2 -> 0
6651 If we fail to match anything in state 2, reset to state 0 and reset
6652 the instruction pointer to the instruction after 'first_fmac'.
6653
6654 If the VFP11 vector mode is in use, there must be at least two unrelated
6655 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6656 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6657
6658 /* If we are only performing a partial link do not bother
6659 to construct any glue. */
6660 if (link_info->relocatable)
6661 return TRUE;
6662
0ffa91dd
NC		 6663 /* Skip if this bfd does not correspond to an ELF image. */
6664 if (! is_arm_elf (abfd))
6665 return TRUE;
906e58ca 6666
c7b8f16e
JB		 6667 /* We should have chosen a fix type by the time we get here. */
6668 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6669
6670 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6671 return TRUE;
2e6030b9 6672
33a7ffc2
JM		 6673 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6674 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6675 return TRUE;
6676
c7b8f16e
JB		 6677 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6678 {
6679 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6680 struct _arm_elf_section_data *sec_data;
6681
6682 /* If we don't have executable progbits, we're not interested in this
6683 section. Also skip if section is to be excluded. */
6684 if (elf_section_type (sec) != SHT_PROGBITS
6685 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6686 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6687 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6688 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6689 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6690 continue;
6691
6692 sec_data = elf32_arm_section_data (sec);
906e58ca 6693
c7b8f16e
JB		 6694 if (sec_data->mapcount == 0)
6695 continue;
906e58ca 6696
c7b8f16e
JB		 6697 if (elf_section_data (sec)->this_hdr.contents != NULL)
6698 contents = elf_section_data (sec)->this_hdr.contents;
6699 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6700 goto error_return;
6701
6702 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6703 elf32_arm_compare_mapping);
6704
6705 for (span = 0; span < sec_data->mapcount; span++)
6706 {
6707 unsigned int span_start = sec_data->map[span].vma;
6708 unsigned int span_end = (span == sec_data->mapcount - 1)
6709 ? sec->size : sec_data->map[span + 1].vma;
6710 char span_type = sec_data->map[span].type;
906e58ca 6711
c7b8f16e
JB		 6712 /* FIXME: Only ARM mode is supported at present. We may need to
6713 support Thumb-2 mode also at some point. */
6714 if (span_type != 'a')
6715 continue;
6716
6717 for (i = span_start; i < span_end;)
6718 {
6719 unsigned int next_i = i + 4;
6720 unsigned int insn = bfd_big_endian (abfd)
6721 ? (contents[i] << 24)
6722 | (contents[i + 1] << 16)
6723 | (contents[i + 2] << 8)
6724 | contents[i + 3]
6725 : (contents[i + 3] << 24)
6726 | (contents[i + 2] << 16)
6727 | (contents[i + 1] << 8)
6728 | contents[i];
6729 unsigned int writemask = 0;
91d6fa6a 6730 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6731
6732 switch (state)
6733 {
6734 case 0:
91d6fa6a 6735 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6736 &numregs);
6737 /* I'm assuming the VFP11 erratum can trigger with denorm
6738 operands on either the FMAC or the DS pipeline. This might
6739 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6740 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6741 {
6742 state = use_vector ? 1 : 2;
6743 first_fmac = i;
6744 veneer_of_insn = insn;
6745 }
6746 break;
6747
6748 case 1:
6749 {
6750 int other_regs[3], other_numregs;
91d6fa6a 6751 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6752 other_regs,
6753 &other_numregs);
91d6fa6a 6754 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6755 && bfd_arm_vfp11_antidependency (writemask, regs,
6756 numregs))
6757 state = 3;
6758 else
6759 state = 2;
6760 }
6761 break;
6762
6763 case 2:
6764 {
6765 int other_regs[3], other_numregs;
91d6fa6a 6766 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6767 other_regs,
6768 &other_numregs);
91d6fa6a 6769 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6770 && bfd_arm_vfp11_antidependency (writemask, regs,
6771 numregs))
6772 state = 3;
6773 else
6774 {
6775 state = 0;
6776 next_i = first_fmac + 4;
6777 }
6778 }
6779 break;
6780
6781 case 3:
6782 abort (); /* Should be unreachable. */
6783 }
6784
6785 if (state == 3)
6786 {
21d799b5
NC		 6787 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6788 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6789
c7e2358a 6790 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6791
6792 newerr->u.b.vfp_insn = veneer_of_insn;
6793
6794 switch (span_type)
6795 {
6796 case 'a':
6797 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6798 break;
906e58ca 6799
c7b8f16e
JB		 6800 default:
6801 abort ();
6802 }
6803
6804 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6805 first_fmac);
6806
6807 newerr->vma = -1;
6808
6809 newerr->next = sec_data->erratumlist;
6810 sec_data->erratumlist = newerr;
6811
6812 state = 0;
6813 }
6814
6815 i = next_i;
6816 }
6817 }
906e58ca 6818
c7b8f16e
JB		 6819 if (contents != NULL
6820 && elf_section_data (sec)->this_hdr.contents != contents)
6821 free (contents);
6822 contents = NULL;
6823 }
6824
6825 return TRUE;
6826
6827error_return:
6828 if (contents != NULL
6829 && elf_section_data (sec)->this_hdr.contents != contents)
6830 free (contents);
906e58ca 6831
c7b8f16e
JB		 6832 return FALSE;
6833}
6834
6835/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6836 after sections have been laid out, using specially-named symbols. */
6837
6838void
6839bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6840 struct bfd_link_info *link_info)
6841{
6842 asection *sec;
6843 struct elf32_arm_link_hash_table *globals;
6844 char *tmp_name;
906e58ca 6845
c7b8f16e
JB		 6846 if (link_info->relocatable)
6847 return;
2e6030b9
MS		 6848
6849 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6850 if (! is_arm_elf (abfd))
2e6030b9
MS		 6851 return;
6852
c7b8f16e 6853 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6854 if (globals == NULL)
6855 return;
906e58ca 6856
21d799b5
NC		 6857 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6858 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6859
6860 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6861 {
6862 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6863 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6864
c7b8f16e
JB		 6865 for (; errnode != NULL; errnode = errnode->next)
6866 {
6867 struct elf_link_hash_entry *myh;
6868 bfd_vma vma;
6869
6870 switch (errnode->type)
6871 {
6872 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6873 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6874 /* Find veneer symbol. */
6875 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6876 errnode->u.b.veneer->u.v.id);
6877
6878 myh = elf_link_hash_lookup
6879 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6880
6881 if (myh == NULL)
6882 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6883 "`%s'"), abfd, tmp_name);
6884
6885 vma = myh->root.u.def.section->output_section->vma
6886 + myh->root.u.def.section->output_offset
6887 + myh->root.u.def.value;
6888
6889 errnode->u.b.veneer->vma = vma;
6890 break;
6891
6892 case VFP11_ERRATUM_ARM_VENEER:
6893 case VFP11_ERRATUM_THUMB_VENEER:
6894 /* Find return location. */
6895 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6896 errnode->u.v.id);
6897
6898 myh = elf_link_hash_lookup
6899 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6900
6901 if (myh == NULL)
6902 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6903 "`%s'"), abfd, tmp_name);
6904
6905 vma = myh->root.u.def.section->output_section->vma
6906 + myh->root.u.def.section->output_offset
6907 + myh->root.u.def.value;
6908
6909 errnode->u.v.branch->vma = vma;
6910 break;
906e58ca 6911
c7b8f16e
JB		 6912 default:
6913 abort ();
6914 }
6915 }
6916 }
906e58ca 6917
c7b8f16e
JB		 6918 free (tmp_name);
6919}
6920
6921
eb043451
PB		 6922/* Set target relocation values needed during linking. */
6923
6924void
bf21ed78
MS		 6925bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6926 struct bfd_link_info *link_info,
eb043451 6927 int target1_is_rel,
319850b4 6928 char * target2_type,
33bfe774 6929 int fix_v4bx,
c7b8f16e 6930 int use_blx,
bf21ed78 6931 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6932 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6933 int pic_veneer, int fix_cortex_a8,
6934 int fix_arm1176)
eb043451
PB		 6935{
6936 struct elf32_arm_link_hash_table *globals;
6937
6938 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6939 if (globals == NULL)
6940 return;
eb043451
PB		 6941
6942 globals->target1_is_rel = target1_is_rel;
6943 if (strcmp (target2_type, "rel") == 0)
6944 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6945 else if (strcmp (target2_type, "abs") == 0)
6946 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6947 else if (strcmp (target2_type, "got-rel") == 0)
6948 globals->target2_reloc = R_ARM_GOT_PREL;
6949 else
6950 {
6951 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6952 target2_type);
6953 }
319850b4 6954 globals->fix_v4bx = fix_v4bx;
33bfe774 6955 globals->use_blx |= use_blx;
c7b8f16e 6956 globals->vfp11_fix = vfp11_fix;
27e55c4d 6957 globals->pic_veneer = pic_veneer;
48229727 6958 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6959 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6960
0ffa91dd
NC		 6961 BFD_ASSERT (is_arm_elf (output_bfd));
6962 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6963 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6964}
eb043451 6965
12a0a0fd 6966/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6967
12a0a0fd
PB		 6968static void
6969insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6970{
6971 bfd_vma upper;
6972 bfd_vma lower;
6973 int reloc_sign;
6974
6975 BFD_ASSERT ((offset & 1) == 0);
6976
6977 upper = bfd_get_16 (abfd, insn);
6978 lower = bfd_get_16 (abfd, insn + 2);
6979 reloc_sign = (offset < 0) ? 1 : 0;
6980 upper = (upper & ~(bfd_vma) 0x7ff)
6981 | ((offset >> 12) & 0x3ff)
6982 | (reloc_sign << 10);
906e58ca 6983 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6984 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6985 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6986 | ((offset >> 1) & 0x7ff);
6987 bfd_put_16 (abfd, upper, insn);
6988 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6989}
6990
9b485d32
NC		 6991/* Thumb code calling an ARM function. */
6992
252b5132 6993static int
57e8b36a
NC		 6994elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6995 const char * name,
6996 bfd * input_bfd,
6997 bfd * output_bfd,
6998 asection * input_section,
6999 bfd_byte * hit_data,
7000 asection * sym_sec,
7001 bfd_vma offset,
7002 bfd_signed_vma addend,
f2a9dd69
DJ		 7003 bfd_vma val,
7004 char **error_message)
252b5132 7005{
bcbdc74c 7006 asection * s = 0;
dc810e39 7007 bfd_vma my_offset;
252b5132 7008 long int ret_offset;
bcbdc74c
NC		 7009 struct elf_link_hash_entry * myh;
7010 struct elf32_arm_link_hash_table * globals;
252b5132 7011
f2a9dd69 7012 myh = find_thumb_glue (info, name, error_message);
252b5132 7013 if (myh == NULL)
b34976b6 7014 return FALSE;
252b5132
RH		 7015
7016 globals = elf32_arm_hash_table (info);
252b5132
RH		 7017 BFD_ASSERT (globals != NULL);
7018 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7019
7020 my_offset = myh->root.u.def.value;
7021
3d4d4302
AM		 7022 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7023 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7024
7025 BFD_ASSERT (s != NULL);
7026 BFD_ASSERT (s->contents != NULL);
7027 BFD_ASSERT (s->output_section != NULL);
7028
7029 if ((my_offset & 0x01) == 0x01)
7030 {
7031 if (sym_sec != NULL
7032 && sym_sec->owner != NULL
7033 && !INTERWORK_FLAG (sym_sec->owner))
7034 {
8f615d07 7035 (*_bfd_error_handler)
d003868e 7036 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7037 " first occurrence: %B: Thumb call to ARM"),
d003868e 7038 sym_sec->owner, input_bfd, name);
252b5132 7039
b34976b6 7040 return FALSE;
252b5132
RH		 7041 }
7042
7043 --my_offset;
7044 myh->root.u.def.value = my_offset;
7045
52ab56c2
PB		 7046 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7047 s->contents + my_offset);
252b5132 7048
52ab56c2
PB		 7049 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7050 s->contents + my_offset + 2);
252b5132
RH		 7051
7052 ret_offset =
9b485d32
NC		 7053 /* Address of destination of the stub. */
7054 ((bfd_signed_vma) val)
252b5132 7055 - ((bfd_signed_vma)
57e8b36a
NC		 7056 /* Offset from the start of the current section
7057 to the start of the stubs. */
9b485d32
NC		 7058 (s->output_offset
7059 /* Offset of the start of this stub from the start of the stubs. */
7060 + my_offset
7061 /* Address of the start of the current section. */
7062 + s->output_section->vma)
7063 /* The branch instruction is 4 bytes into the stub. */
7064 + 4
7065 /* ARM branches work from the pc of the instruction + 8. */
7066 + 8);
252b5132 7067
52ab56c2
PB		 7068 put_arm_insn (globals, output_bfd,
7069 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7070 s->contents + my_offset + 4);
252b5132
RH		 7071 }
7072
7073 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7074
427bfd90
NC		 7075 /* Now go back and fix up the original BL insn to point to here. */
7076 ret_offset =
7077 /* Address of where the stub is located. */
7078 (s->output_section->vma + s->output_offset + my_offset)
7079 /* Address of where the BL is located. */
57e8b36a
NC		 7080 - (input_section->output_section->vma + input_section->output_offset
7081 + offset)
427bfd90
NC		 7082 /* Addend in the relocation. */
7083 - addend
7084 /* Biassing for PC-relative addressing. */
7085 - 8;
252b5132 7086
12a0a0fd 7087 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7088
b34976b6 7089 return TRUE;
252b5132
RH		 7090}
7091
a4fd1a8e 7092/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7093
a4fd1a8e
PB		 7094static struct elf_link_hash_entry *
7095elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7096 const char * name,
7097 bfd * input_bfd,
7098 bfd * output_bfd,
7099 asection * sym_sec,
7100 bfd_vma val,
8029a119
NC		 7101 asection * s,
7102 char ** error_message)
252b5132 7103{
dc810e39 7104 bfd_vma my_offset;
252b5132 7105 long int ret_offset;
bcbdc74c
NC		 7106 struct elf_link_hash_entry * myh;
7107 struct elf32_arm_link_hash_table * globals;
252b5132 7108
f2a9dd69 7109 myh = find_arm_glue (info, name, error_message);
252b5132 7110 if (myh == NULL)
a4fd1a8e 7111 return NULL;
252b5132
RH		 7112
7113 globals = elf32_arm_hash_table (info);
252b5132
RH		 7114 BFD_ASSERT (globals != NULL);
7115 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7116
7117 my_offset = myh->root.u.def.value;
252b5132
RH		 7118
7119 if ((my_offset & 0x01) == 0x01)
7120 {
7121 if (sym_sec != NULL
7122 && sym_sec->owner != NULL
7123 && !INTERWORK_FLAG (sym_sec->owner))
7124 {
8f615d07 7125 (*_bfd_error_handler)
d003868e
AM		 7126 (_("%B(%s): warning: interworking not enabled.\n"
7127 " first occurrence: %B: arm call to thumb"),
7128 sym_sec->owner, input_bfd, name);
252b5132 7129 }
9b485d32 7130
252b5132
RH		 7131 --my_offset;
7132 myh->root.u.def.value = my_offset;
7133
27e55c4d
PB		 7134 if (info->shared || globals->root.is_relocatable_executable
7135 || globals->pic_veneer)
8f6277f5
PB		 7136 {
7137 /* For relocatable objects we can't use absolute addresses,
7138 so construct the address from a relative offset. */
7139 /* TODO: If the offset is small it's probably worth
7140 constructing the address with adds. */
52ab56c2
PB		 7141 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7142 s->contents + my_offset);
7143 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7144 s->contents + my_offset + 4);
7145 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7146 s->contents + my_offset + 8);
8f6277f5
PB		 7147 /* Adjust the offset by 4 for the position of the add,
7148 and 8 for the pipeline offset. */
7149 ret_offset = (val - (s->output_offset
7150 + s->output_section->vma
7151 + my_offset + 12))
7152 | 1;
7153 bfd_put_32 (output_bfd, ret_offset,
7154 s->contents + my_offset + 12);
7155 }
26079076
PB		 7156 else if (globals->use_blx)
7157 {
7158 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7159 s->contents + my_offset);
7160
7161 /* It's a thumb address. Add the low order bit. */
7162 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7163 s->contents + my_offset + 4);
7164 }
8f6277f5
PB		 7165 else
7166 {
52ab56c2
PB		 7167 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7168 s->contents + my_offset);
252b5132 7169
52ab56c2
PB		 7170 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7171 s->contents + my_offset + 4);
252b5132 7172
8f6277f5
PB		 7173 /* It's a thumb address. Add the low order bit. */
7174 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7175 s->contents + my_offset + 8);
8029a119
NC		 7176
7177 my_offset += 12;
8f6277f5 7178 }
252b5132
RH		 7179 }
7180
7181 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7182
a4fd1a8e
PB		 7183 return myh;
7184}
7185
7186/* Arm code calling a Thumb function. */
7187
7188static int
7189elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7190 const char * name,
7191 bfd * input_bfd,
7192 bfd * output_bfd,
7193 asection * input_section,
7194 bfd_byte * hit_data,
7195 asection * sym_sec,
7196 bfd_vma offset,
7197 bfd_signed_vma addend,
f2a9dd69
DJ		 7198 bfd_vma val,
7199 char **error_message)
a4fd1a8e
PB		 7200{
7201 unsigned long int tmp;
7202 bfd_vma my_offset;
7203 asection * s;
7204 long int ret_offset;
7205 struct elf_link_hash_entry * myh;
7206 struct elf32_arm_link_hash_table * globals;
7207
7208 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7209 BFD_ASSERT (globals != NULL);
7210 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7211
3d4d4302
AM		 7212 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7213 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7214 BFD_ASSERT (s != NULL);
7215 BFD_ASSERT (s->contents != NULL);
7216 BFD_ASSERT (s->output_section != NULL);
7217
7218 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7219 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7220 if (!myh)
7221 return FALSE;
7222
7223 my_offset = myh->root.u.def.value;
252b5132
RH		 7224 tmp = bfd_get_32 (input_bfd, hit_data);
7225 tmp = tmp & 0xFF000000;
7226
9b485d32 7227 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7228 ret_offset = (s->output_offset
7229 + my_offset
7230 + s->output_section->vma
7231 - (input_section->output_offset
7232 + input_section->output_section->vma
7233 + offset + addend)
7234 - 8);
9a5aca8c 7235
252b5132
RH		 7236 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7237
dc810e39 7238 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7239
b34976b6 7240 return TRUE;
252b5132
RH		 7241}
7242
a4fd1a8e
PB		 7243/* Populate Arm stub for an exported Thumb function. */
7244
7245static bfd_boolean
7246elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7247{
7248 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7249 asection * s;
7250 struct elf_link_hash_entry * myh;
7251 struct elf32_arm_link_hash_entry *eh;
7252 struct elf32_arm_link_hash_table * globals;
7253 asection *sec;
7254 bfd_vma val;
f2a9dd69 7255 char *error_message;
a4fd1a8e 7256
906e58ca 7257 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7258 /* Allocate stubs for exported Thumb functions on v4t. */
7259 if (eh->export_glue == NULL)
7260 return TRUE;
7261
7262 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7263 BFD_ASSERT (globals != NULL);
7264 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7265
3d4d4302
AM		 7266 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7267 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7268 BFD_ASSERT (s != NULL);
7269 BFD_ASSERT (s->contents != NULL);
7270 BFD_ASSERT (s->output_section != NULL);
7271
7272 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7273
7274 BFD_ASSERT (sec->output_section != NULL);
7275
a4fd1a8e
PB		 7276 val = eh->export_glue->root.u.def.value + sec->output_offset
7277 + sec->output_section->vma;
8029a119 7278
a4fd1a8e
PB		 7279 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7280 h->root.u.def.section->owner,
f2a9dd69
DJ		 7281 globals->obfd, sec, val, s,
7282 &error_message);
a4fd1a8e
PB		 7283 BFD_ASSERT (myh);
7284 return TRUE;
7285}
7286
845b51d6
PB		 7287/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7288
7289static bfd_vma
7290elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7291{
7292 bfd_byte *p;
7293 bfd_vma glue_addr;
7294 asection *s;
7295 struct elf32_arm_link_hash_table *globals;
7296
7297 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7298 BFD_ASSERT (globals != NULL);
7299 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7300
3d4d4302
AM		 7301 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7302 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7303 BFD_ASSERT (s != NULL);
7304 BFD_ASSERT (s->contents != NULL);
7305 BFD_ASSERT (s->output_section != NULL);
7306
7307 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7308
7309 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7310
7311 if ((globals->bx_glue_offset[reg] & 1) == 0)
7312 {
7313 p = s->contents + glue_addr;
7314 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7315 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7316 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7317 globals->bx_glue_offset[reg] |= 1;
7318 }
7319
7320 return glue_addr + s->output_section->vma + s->output_offset;
7321}
7322
a4fd1a8e
PB		 7323/* Generate Arm stubs for exported Thumb symbols. */
7324static void
906e58ca 7325elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7326 struct bfd_link_info *link_info)
7327{
7328 struct elf32_arm_link_hash_table * globals;
7329
8029a119
NC		 7330 if (link_info == NULL)
7331 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7332 return;
7333
7334 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7335 if (globals == NULL)
7336 return;
7337
84c08195
PB		 7338 /* If blx is available then exported Thumb symbols are OK and there is
7339 nothing to do. */
a4fd1a8e
PB		 7340 if (globals->use_blx)
7341 return;
7342
7343 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7344 link_info);
7345}
7346
47beaa6a
RS		 7347/* Reserve space for COUNT dynamic relocations in relocation selection
7348 SRELOC. */
7349
7350static void
7351elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7352 bfd_size_type count)
7353{
7354 struct elf32_arm_link_hash_table *htab;
7355
7356 htab = elf32_arm_hash_table (info);
7357 BFD_ASSERT (htab->root.dynamic_sections_created);
7358 if (sreloc == NULL)
7359 abort ();
7360 sreloc->size += RELOC_SIZE (htab) * count;
7361}
7362
34e77a92
RS		 7363/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7364 dynamic, the relocations should go in SRELOC, otherwise they should
7365 go in the special .rel.iplt section. */
7366
7367static void
7368elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7369 bfd_size_type count)
7370{
7371 struct elf32_arm_link_hash_table *htab;
7372
7373 htab = elf32_arm_hash_table (info);
7374 if (!htab->root.dynamic_sections_created)
7375 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7376 else
7377 {
7378 BFD_ASSERT (sreloc != NULL);
7379 sreloc->size += RELOC_SIZE (htab) * count;
7380 }
7381}
7382
47beaa6a
RS		 7383/* Add relocation REL to the end of relocation section SRELOC. */
7384
7385static void
7386elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7387 asection *sreloc, Elf_Internal_Rela *rel)
7388{
7389 bfd_byte *loc;
7390 struct elf32_arm_link_hash_table *htab;
7391
7392 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7393 if (!htab->root.dynamic_sections_created
7394 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7395 sreloc = htab->root.irelplt;
47beaa6a
RS		 7396 if (sreloc == NULL)
7397 abort ();
7398 loc = sreloc->contents;
7399 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7400 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7401 abort ();
7402 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7403}
7404
34e77a92
RS		 7405/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7406 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7407 to .plt. */
7408
7409static void
7410elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7411 bfd_boolean is_iplt_entry,
7412 union gotplt_union *root_plt,
7413 struct arm_plt_info *arm_plt)
7414{
7415 struct elf32_arm_link_hash_table *htab;
7416 asection *splt;
7417 asection *sgotplt;
7418
7419 htab = elf32_arm_hash_table (info);
7420
7421 if (is_iplt_entry)
7422 {
7423 splt = htab->root.iplt;
7424 sgotplt = htab->root.igotplt;
7425
7426 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7427 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7428 }
7429 else
7430 {
7431 splt = htab->root.splt;
7432 sgotplt = htab->root.sgotplt;
7433
7434 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7435 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7436
7437 /* If this is the first .plt entry, make room for the special
7438 first entry. */
7439 if (splt->size == 0)
7440 splt->size += htab->plt_header_size;
7441 }
7442
7443 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7444 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7445 splt->size += PLT_THUMB_STUB_SIZE;
7446 root_plt->offset = splt->size;
7447 splt->size += htab->plt_entry_size;
7448
7449 if (!htab->symbian_p)
7450 {
7451 /* We also need to make an entry in the .got.plt section, which
7452 will be placed in the .got section by the linker script. */
7453 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7454 sgotplt->size += 4;
7455 }
7456}
7457
b38cadfb
NC		 7458static bfd_vma
7459arm_movw_immediate (bfd_vma value)
7460{
7461 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7462}
7463
7464static bfd_vma
7465arm_movt_immediate (bfd_vma value)
7466{
7467 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7468}
7469
34e77a92
RS		 7470/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7471 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7472 Otherwise, DYNINDX is the index of the symbol in the dynamic
7473 symbol table and SYM_VALUE is undefined.
7474
7475 ROOT_PLT points to the offset of the PLT entry from the start of its
7476 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7477 bookkeeping information. */
7478
7479static void
7480elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7481 union gotplt_union *root_plt,
7482 struct arm_plt_info *arm_plt,
7483 int dynindx, bfd_vma sym_value)
7484{
7485 struct elf32_arm_link_hash_table *htab;
7486 asection *sgot;
7487 asection *splt;
7488 asection *srel;
7489 bfd_byte *loc;
7490 bfd_vma plt_index;
7491 Elf_Internal_Rela rel;
7492 bfd_vma plt_header_size;
7493 bfd_vma got_header_size;
7494
7495 htab = elf32_arm_hash_table (info);
7496
7497 /* Pick the appropriate sections and sizes. */
7498 if (dynindx == -1)
7499 {
7500 splt = htab->root.iplt;
7501 sgot = htab->root.igotplt;
7502 srel = htab->root.irelplt;
7503
7504 /* There are no reserved entries in .igot.plt, and no special
7505 first entry in .iplt. */
7506 got_header_size = 0;
7507 plt_header_size = 0;
7508 }
7509 else
7510 {
7511 splt = htab->root.splt;
7512 sgot = htab->root.sgotplt;
7513 srel = htab->root.srelplt;
7514
7515 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7516 plt_header_size = htab->plt_header_size;
7517 }
7518 BFD_ASSERT (splt != NULL && srel != NULL);
7519
7520 /* Fill in the entry in the procedure linkage table. */
7521 if (htab->symbian_p)
7522 {
7523 BFD_ASSERT (dynindx >= 0);
7524 put_arm_insn (htab, output_bfd,
7525 elf32_arm_symbian_plt_entry[0],
7526 splt->contents + root_plt->offset);
7527 bfd_put_32 (output_bfd,
7528 elf32_arm_symbian_plt_entry[1],
7529 splt->contents + root_plt->offset + 4);
7530
7531 /* Fill in the entry in the .rel.plt section. */
7532 rel.r_offset = (splt->output_section->vma
7533 + splt->output_offset
7534 + root_plt->offset + 4);
7535 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7536
7537 /* Get the index in the procedure linkage table which
7538 corresponds to this symbol. This is the index of this symbol
7539 in all the symbols for which we are making plt entries. The
7540 first entry in the procedure linkage table is reserved. */
7541 plt_index = ((root_plt->offset - plt_header_size)
7542 / htab->plt_entry_size);
7543 }
7544 else
7545 {
7546 bfd_vma got_offset, got_address, plt_address;
7547 bfd_vma got_displacement, initial_got_entry;
7548 bfd_byte * ptr;
7549
7550 BFD_ASSERT (sgot != NULL);
7551
7552 /* Get the offset into the .(i)got.plt table of the entry that
7553 corresponds to this function. */
7554 got_offset = (arm_plt->got_offset & -2);
7555
7556 /* Get the index in the procedure linkage table which
7557 corresponds to this symbol. This is the index of this symbol
7558 in all the symbols for which we are making plt entries.
7559 After the reserved .got.plt entries, all symbols appear in
7560 the same order as in .plt. */
7561 plt_index = (got_offset - got_header_size) / 4;
7562
7563 /* Calculate the address of the GOT entry. */
7564 got_address = (sgot->output_section->vma
7565 + sgot->output_offset
7566 + got_offset);
7567
7568 /* ...and the address of the PLT entry. */
7569 plt_address = (splt->output_section->vma
7570 + splt->output_offset
7571 + root_plt->offset);
7572
7573 ptr = splt->contents + root_plt->offset;
7574 if (htab->vxworks_p && info->shared)
7575 {
7576 unsigned int i;
7577 bfd_vma val;
7578
7579 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7580 {
7581 val = elf32_arm_vxworks_shared_plt_entry[i];
7582 if (i == 2)
7583 val |= got_address - sgot->output_section->vma;
7584 if (i == 5)
7585 val |= plt_index * RELOC_SIZE (htab);
7586 if (i == 2 || i == 5)
7587 bfd_put_32 (output_bfd, val, ptr);
7588 else
7589 put_arm_insn (htab, output_bfd, val, ptr);
7590 }
7591 }
7592 else if (htab->vxworks_p)
7593 {
7594 unsigned int i;
7595 bfd_vma val;
7596
7597 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7598 {
7599 val = elf32_arm_vxworks_exec_plt_entry[i];
7600 if (i == 2)
7601 val |= got_address;
7602 if (i == 4)
7603 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7604 if (i == 5)
7605 val |= plt_index * RELOC_SIZE (htab);
7606 if (i == 2 || i == 5)
7607 bfd_put_32 (output_bfd, val, ptr);
7608 else
7609 put_arm_insn (htab, output_bfd, val, ptr);
7610 }
7611
7612 loc = (htab->srelplt2->contents
7613 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7614
7615 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7616 referencing the GOT for this PLT entry. */
7617 rel.r_offset = plt_address + 8;
7618 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7619 rel.r_addend = got_offset;
7620 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7621 loc += RELOC_SIZE (htab);
7622
7623 /* Create the R_ARM_ABS32 relocation referencing the
7624 beginning of the PLT for this GOT entry. */
7625 rel.r_offset = got_address;
7626 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7627 rel.r_addend = 0;
7628 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7629 }
b38cadfb
NC		 7630 else if (htab->nacl_p)
7631 {
7632 /* Calculate the displacement between the PLT slot and the
7633 common tail that's part of the special initial PLT slot. */
6034aab8 7634 int32_t tail_displacement
b38cadfb
NC		 7635 = ((splt->output_section->vma + splt->output_offset
7636 + ARM_NACL_PLT_TAIL_OFFSET)
7637 - (plt_address + htab->plt_entry_size + 4));
7638 BFD_ASSERT ((tail_displacement & 3) == 0);
7639 tail_displacement >>= 2;
7640
7641 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7642 || (-tail_displacement & 0xff000000) == 0);
7643
7644 /* Calculate the displacement between the PLT slot and the entry
7645 in the GOT. The offset accounts for the value produced by
7646 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8
RM		 7647 got_displacement = (got_address
7648 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7649
7650 /* NaCl does not support interworking at all. */
7651 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7652
7653 put_arm_insn (htab, output_bfd,
7654 elf32_arm_nacl_plt_entry[0]
7655 | arm_movw_immediate (got_displacement),
7656 ptr + 0);
7657 put_arm_insn (htab, output_bfd,
7658 elf32_arm_nacl_plt_entry[1]
7659 | arm_movt_immediate (got_displacement),
7660 ptr + 4);
7661 put_arm_insn (htab, output_bfd,
7662 elf32_arm_nacl_plt_entry[2],
7663 ptr + 8);
7664 put_arm_insn (htab, output_bfd,
7665 elf32_arm_nacl_plt_entry[3]
7666 | (tail_displacement & 0x00ffffff),
7667 ptr + 12);
7668 }
34e77a92
RS		 7669 else
7670 {
7671 /* Calculate the displacement between the PLT slot and the
7672 entry in the GOT. The eight-byte offset accounts for the
7673 value produced by adding to pc in the first instruction
7674 of the PLT stub. */
7675 got_displacement = got_address - (plt_address + 8);
7676
7677 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7678
7679 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7680 {
7681 put_thumb_insn (htab, output_bfd,
7682 elf32_arm_plt_thumb_stub[0], ptr - 4);
7683 put_thumb_insn (htab, output_bfd,
7684 elf32_arm_plt_thumb_stub[1], ptr - 2);
7685 }
7686
7687 put_arm_insn (htab, output_bfd,
7688 elf32_arm_plt_entry[0]
7689 | ((got_displacement & 0x0ff00000) >> 20),
7690 ptr + 0);
7691 put_arm_insn (htab, output_bfd,
7692 elf32_arm_plt_entry[1]
7693 | ((got_displacement & 0x000ff000) >> 12),
7694 ptr+ 4);
7695 put_arm_insn (htab, output_bfd,
7696 elf32_arm_plt_entry[2]
7697 | (got_displacement & 0x00000fff),
7698 ptr + 8);
7699#ifdef FOUR_WORD_PLT
7700 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7701#endif
7702 }
7703
7704 /* Fill in the entry in the .rel(a).(i)plt section. */
7705 rel.r_offset = got_address;
7706 rel.r_addend = 0;
7707 if (dynindx == -1)
7708 {
7709 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7710 The dynamic linker or static executable then calls SYM_VALUE
7711 to determine the correct run-time value of the .igot.plt entry. */
7712 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7713 initial_got_entry = sym_value;
7714 }
7715 else
7716 {
7717 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7718 initial_got_entry = (splt->output_section->vma
7719 + splt->output_offset);
7720 }
7721
7722 /* Fill in the entry in the global offset table. */
7723 bfd_put_32 (output_bfd, initial_got_entry,
7724 sgot->contents + got_offset);
7725 }
7726
7727 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7728 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7729}
7730
eb043451
PB		 7731/* Some relocations map to different relocations depending on the
7732 target. Return the real relocation. */
8029a119 7733
eb043451
PB		 7734static int
7735arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7736 int r_type)
7737{
7738 switch (r_type)
7739 {
7740 case R_ARM_TARGET1:
7741 if (globals->target1_is_rel)
7742 return R_ARM_REL32;
7743 else
7744 return R_ARM_ABS32;
7745
7746 case R_ARM_TARGET2:
7747 return globals->target2_reloc;
7748
7749 default:
7750 return r_type;
7751 }
7752}
eb043451 7753
ba93b8ac
DJ		 7754/* Return the base VMA address which should be subtracted from real addresses
7755 when resolving @dtpoff relocation.
7756 This is PT_TLS segment p_vaddr. */
7757
7758static bfd_vma
7759dtpoff_base (struct bfd_link_info *info)
7760{
7761 /* If tls_sec is NULL, we should have signalled an error already. */
7762 if (elf_hash_table (info)->tls_sec == NULL)
7763 return 0;
7764 return elf_hash_table (info)->tls_sec->vma;
7765}
7766
7767/* Return the relocation value for @tpoff relocation
7768 if STT_TLS virtual address is ADDRESS. */
7769
7770static bfd_vma
7771tpoff (struct bfd_link_info *info, bfd_vma address)
7772{
7773 struct elf_link_hash_table *htab = elf_hash_table (info);
7774 bfd_vma base;
7775
7776 /* If tls_sec is NULL, we should have signalled an error already. */
7777 if (htab->tls_sec == NULL)
7778 return 0;
7779 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7780 return address - htab->tls_sec->vma + base;
7781}
7782
00a97672
RS		 7783/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7784 VALUE is the relocation value. */
7785
7786static bfd_reloc_status_type
7787elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7788{
7789 if (value > 0xfff)
7790 return bfd_reloc_overflow;
7791
7792 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7793 bfd_put_32 (abfd, value, data);
7794 return bfd_reloc_ok;
7795}
7796
0855e32b
NS		 7797/* Handle TLS relaxations. Relaxing is possible for symbols that use
7798 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7799 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7800
7801 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7802 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7803 case of error.
7804
7805 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7806 the pre-relaxed code. It would be nice if the relocs were updated
7807 to match the optimization. */
0855e32b 7808
b38cadfb 7809static bfd_reloc_status_type
0855e32b 7810elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7811 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7812 Elf_Internal_Rela *rel, unsigned long is_local)
7813{
7814 unsigned long insn;
b38cadfb 7815
0855e32b
NS		 7816 switch (ELF32_R_TYPE (rel->r_info))
7817 {
7818 default:
7819 return bfd_reloc_notsupported;
b38cadfb 7820
0855e32b
NS		 7821 case R_ARM_TLS_GOTDESC:
7822 if (is_local)
7823 insn = 0;
7824 else
7825 {
7826 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7827 if (insn & 1)
7828 insn -= 5; /* THUMB */
7829 else
7830 insn -= 8; /* ARM */
7831 }
7832 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7833 return bfd_reloc_continue;
7834
7835 case R_ARM_THM_TLS_DESCSEQ:
7836 /* Thumb insn. */
7837 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7838 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7839 {
7840 if (is_local)
7841 /* nop */
7842 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7843 }
7844 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7845 {
7846 if (is_local)
7847 /* nop */
7848 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7849 else
7850 /* ldr rx,[ry] */
7851 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7852 }
7853 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7854 {
7855 if (is_local)
7856 /* nop */
7857 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7858 else
7859 /* mov r0, rx */
7860 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7861 contents + rel->r_offset);
7862 }
7863 else
7864 {
7865 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7866 /* It's a 32 bit instruction, fetch the rest of it for
7867 error generation. */
7868 insn = (insn << 16)
7869 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7870 (*_bfd_error_handler)
7871 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7872 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7873 return bfd_reloc_notsupported;
7874 }
7875 break;
b38cadfb 7876
0855e32b
NS		 7877 case R_ARM_TLS_DESCSEQ:
7878 /* arm insn. */
7879 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7880 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7881 {
7882 if (is_local)
7883 /* mov rx, ry */
7884 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7885 contents + rel->r_offset);
7886 }
7887 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7888 {
7889 if (is_local)
7890 /* nop */
7891 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7892 else
7893 /* ldr rx,[ry] */
7894 bfd_put_32 (input_bfd, insn & 0xfffff000,
7895 contents + rel->r_offset);
7896 }
7897 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7898 {
7899 if (is_local)
7900 /* nop */
7901 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7902 else
7903 /* mov r0, rx */
7904 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7905 contents + rel->r_offset);
7906 }
7907 else
7908 {
7909 (*_bfd_error_handler)
7910 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7911 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7912 return bfd_reloc_notsupported;
7913 }
7914 break;
7915
7916 case R_ARM_TLS_CALL:
7917 /* GD->IE relaxation, turn the instruction into 'nop' or
7918 'ldr r0, [pc,r0]' */
7919 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7920 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7921 break;
b38cadfb 7922
0855e32b
NS		 7923 case R_ARM_THM_TLS_CALL:
7924 /* GD->IE relaxation */
7925 if (!is_local)
7926 /* add r0,pc; ldr r0, [r0] */
7927 insn = 0x44786800;
7928 else if (arch_has_thumb2_nop (globals))
7929 /* nop.w */
7930 insn = 0xf3af8000;
7931 else
7932 /* nop; nop */
7933 insn = 0xbf00bf00;
b38cadfb 7934
0855e32b
NS		 7935 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7936 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7937 break;
7938 }
7939 return bfd_reloc_ok;
7940}
7941
4962c51a
MS		 7942/* For a given value of n, calculate the value of G_n as required to
7943 deal with group relocations. We return it in the form of an
7944 encoded constant-and-rotation, together with the final residual. If n is
7945 specified as less than zero, then final_residual is filled with the
7946 input value and no further action is performed. */
7947
7948static bfd_vma
7949calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7950{
7951 int current_n;
7952 bfd_vma g_n;
7953 bfd_vma encoded_g_n = 0;
7954 bfd_vma residual = value; /* Also known as Y_n. */
7955
7956 for (current_n = 0; current_n <= n; current_n++)
7957 {
7958 int shift;
7959
7960 /* Calculate which part of the value to mask. */
7961 if (residual == 0)
7962 shift = 0;
7963 else
7964 {
7965 int msb;
7966
7967 /* Determine the most significant bit in the residual and
7968 align the resulting value to a 2-bit boundary. */
7969 for (msb = 30; msb >= 0; msb -= 2)
7970 if (residual & (3 << msb))
7971 break;
7972
7973 /* The desired shift is now (msb - 6), or zero, whichever
7974 is the greater. */
7975 shift = msb - 6;
7976 if (shift < 0)
7977 shift = 0;
7978 }
7979
7980 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7981 g_n = residual & (0xff << shift);
7982 encoded_g_n = (g_n >> shift)
7983 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7984
7985 /* Calculate the residual for the next time around. */
7986 residual &= ~g_n;
7987 }
7988
7989 *final_residual = residual;
7990
7991 return encoded_g_n;
7992}
7993
7994/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7995 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7996
4962c51a 7997static int
906e58ca 7998identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7999{
8000 int opcode = insn & 0x1e00000;
8001
8002 if (opcode == 1 << 23) /* ADD */
8003 return 1;
8004
8005 if (opcode == 1 << 22) /* SUB */
8006 return -1;
8007
8008 return 0;
8009}
8010
252b5132 8011/* Perform a relocation as part of a final link. */
9b485d32 8012
252b5132 8013static bfd_reloc_status_type
57e8b36a
NC		 8014elf32_arm_final_link_relocate (reloc_howto_type * howto,
8015 bfd * input_bfd,
8016 bfd * output_bfd,
8017 asection * input_section,
8018 bfd_byte * contents,
8019 Elf_Internal_Rela * rel,
8020 bfd_vma value,
8021 struct bfd_link_info * info,
8022 asection * sym_sec,
8023 const char * sym_name,
34e77a92
RS		 8024 unsigned char st_type,
8025 enum arm_st_branch_type branch_type,
0945cdfd 8026 struct elf_link_hash_entry * h,
f2a9dd69 8027 bfd_boolean * unresolved_reloc_p,
8029a119 8028 char ** error_message)
252b5132
RH		 8029{
8030 unsigned long r_type = howto->type;
8031 unsigned long r_symndx;
8032 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8033 bfd_vma * local_got_offsets;
0855e32b 8034 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8035 asection * sgot;
8036 asection * splt;
252b5132 8037 asection * sreloc = NULL;
362d30a1 8038 asection * srelgot;
252b5132 8039 bfd_vma addend;
ba96a88f 8040 bfd_signed_vma signed_addend;
34e77a92
RS		 8041 unsigned char dynreloc_st_type;
8042 bfd_vma dynreloc_value;
ba96a88f 8043 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8044 struct elf32_arm_link_hash_entry *eh;
8045 union gotplt_union *root_plt;
8046 struct arm_plt_info *arm_plt;
8047 bfd_vma plt_offset;
8048 bfd_vma gotplt_offset;
8049 bfd_boolean has_iplt_entry;
f21f3fe0 8050
9c504268 8051 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8052 if (globals == NULL)
8053 return bfd_reloc_notsupported;
9c504268 8054
0ffa91dd
NC		 8055 BFD_ASSERT (is_arm_elf (input_bfd));
8056
8057 /* Some relocation types map to different relocations depending on the
9c504268 8058 target. We pick the right one here. */
eb043451 8059 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8060
8061 /* It is possible to have linker relaxations on some TLS access
8062 models. Update our information here. */
8063 r_type = elf32_arm_tls_transition (info, r_type, h);
8064
eb043451
PB		 8065 if (r_type != howto->type)
8066 howto = elf32_arm_howto_from_type (r_type);
9c504268 8067
cac15327
NC		 8068 /* If the start address has been set, then set the EF_ARM_HASENTRY
8069 flag. Setting this more than once is redundant, but the cost is
8070 not too high, and it keeps the code simple.
99e4ae17 8071
cac15327
NC		 8072 The test is done here, rather than somewhere else, because the
8073 start address is only set just before the final link commences.
8074
8075 Note - if the user deliberately sets a start address of 0, the
8076 flag will not be set. */
8077 if (bfd_get_start_address (output_bfd) != 0)
8078 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8079
34e77a92 8080 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8081 sgot = globals->root.sgot;
252b5132 8082 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8083 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8084
34e77a92
RS		 8085 if (globals->root.dynamic_sections_created)
8086 srelgot = globals->root.srelgot;
8087 else
8088 srelgot = NULL;
8089
252b5132
RH		 8090 r_symndx = ELF32_R_SYM (rel->r_info);
8091
4e7fd91e 8092 if (globals->use_rel)
ba96a88f 8093 {
4e7fd91e
PB		 8094 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8095
8096 if (addend & ((howto->src_mask + 1) >> 1))
8097 {
8098 signed_addend = -1;
8099 signed_addend &= ~ howto->src_mask;
8100 signed_addend |= addend;
8101 }
8102 else
8103 signed_addend = addend;
ba96a88f
NC		 8104 }
8105 else
4e7fd91e 8106 addend = signed_addend = rel->r_addend;
f21f3fe0 8107
34e77a92
RS		 8108 /* Record the symbol information that should be used in dynamic
8109 relocations. */
8110 dynreloc_st_type = st_type;
8111 dynreloc_value = value;
8112 if (branch_type == ST_BRANCH_TO_THUMB)
8113 dynreloc_value |= 1;
8114
8115 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8116 VALUE appropriately for relocations that we resolve at link time. */
8117 has_iplt_entry = FALSE;
8118 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8119 && root_plt->offset != (bfd_vma) -1)
8120 {
8121 plt_offset = root_plt->offset;
8122 gotplt_offset = arm_plt->got_offset;
8123
8124 if (h == NULL || eh->is_iplt)
8125 {
8126 has_iplt_entry = TRUE;
8127 splt = globals->root.iplt;
8128
8129 /* Populate .iplt entries here, because not all of them will
8130 be seen by finish_dynamic_symbol. The lower bit is set if
8131 we have already populated the entry. */
8132 if (plt_offset & 1)
8133 plt_offset--;
8134 else
8135 {
8136 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8137 -1, dynreloc_value);
8138 root_plt->offset |= 1;
8139 }
8140
8141 /* Static relocations always resolve to the .iplt entry. */
8142 st_type = STT_FUNC;
8143 value = (splt->output_section->vma
8144 + splt->output_offset
8145 + plt_offset);
8146 branch_type = ST_BRANCH_TO_ARM;
8147
8148 /* If there are non-call relocations that resolve to the .iplt
8149 entry, then all dynamic ones must too. */
8150 if (arm_plt->noncall_refcount != 0)
8151 {
8152 dynreloc_st_type = st_type;
8153 dynreloc_value = value;
8154 }
8155 }
8156 else
8157 /* We populate the .plt entry in finish_dynamic_symbol. */
8158 splt = globals->root.splt;
8159 }
8160 else
8161 {
8162 splt = NULL;
8163 plt_offset = (bfd_vma) -1;
8164 gotplt_offset = (bfd_vma) -1;
8165 }
8166
252b5132
RH		 8167 switch (r_type)
8168 {
8169 case R_ARM_NONE:
28a094c2
DJ		 8170 /* We don't need to find a value for this symbol. It's just a
8171 marker. */
8172 *unresolved_reloc_p = FALSE;
252b5132
RH		 8173 return bfd_reloc_ok;
8174
00a97672
RS		 8175 case R_ARM_ABS12:
8176 if (!globals->vxworks_p)
8177 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8178
252b5132
RH		 8179 case R_ARM_PC24:
8180 case R_ARM_ABS32:
bb224fc3 8181 case R_ARM_ABS32_NOI:
252b5132 8182 case R_ARM_REL32:
bb224fc3 8183 case R_ARM_REL32_NOI:
5b5bb741
PB		 8184 case R_ARM_CALL:
8185 case R_ARM_JUMP24:
dfc5f959 8186 case R_ARM_XPC25:
eb043451 8187 case R_ARM_PREL31:
7359ea65 8188 case R_ARM_PLT32:
7359ea65
DJ		 8189 /* Handle relocations which should use the PLT entry. ABS32/REL32
8190 will use the symbol's value, which may point to a PLT entry, but we
8191 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8192 branches in this object should go to it, except if the PLT is too
8193 far away, in which case a long branch stub should be inserted. */
bb224fc3 8194 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 8195 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8196 && r_type != R_ARM_CALL
8197 && r_type != R_ARM_JUMP24
8198 && r_type != R_ARM_PLT32)
34e77a92 8199 && plt_offset != (bfd_vma) -1)
7359ea65 8200 {
34e77a92
RS		 8201 /* If we've created a .plt section, and assigned a PLT entry
8202 to this function, it must either be a STT_GNU_IFUNC reference
8203 or not be known to bind locally. In other cases, we should
8204 have cleared the PLT entry by now. */
8205 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8206
8207 value = (splt->output_section->vma
8208 + splt->output_offset
34e77a92 8209 + plt_offset);
0945cdfd 8210 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8211 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8212 contents, rel->r_offset, value,
00a97672 8213 rel->r_addend);
7359ea65
DJ		 8214 }
8215
67687978
PB		 8216 /* When generating a shared object or relocatable executable, these
8217 relocations are copied into the output file to be resolved at
8218 run time. */
8219 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8220 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8221 && !(globals->vxworks_p
3348747a
NS		 8222 && strcmp (input_section->output_section->name,
8223 ".tls_vars") == 0)
bb224fc3 8224 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8225 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 8226 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8227 && (h == NULL
8228 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8229 || h->root.type != bfd_link_hash_undefweak)
8230 && r_type != R_ARM_PC24
5b5bb741
PB		 8231 && r_type != R_ARM_CALL
8232 && r_type != R_ARM_JUMP24
ee06dc07 8233 && r_type != R_ARM_PREL31
7359ea65 8234 && r_type != R_ARM_PLT32)
252b5132 8235 {
947216bf 8236 Elf_Internal_Rela outrel;
b34976b6 8237 bfd_boolean skip, relocate;
f21f3fe0 8238
0945cdfd
DJ		 8239 *unresolved_reloc_p = FALSE;
8240
34e77a92 8241 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8242 {
83bac4b0
NC		 8243 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8244 ! globals->use_rel);
f21f3fe0 8245
83bac4b0 8246 if (sreloc == NULL)
252b5132 8247 return bfd_reloc_notsupported;
252b5132 8248 }
f21f3fe0 8249
b34976b6
AM		 8250 skip = FALSE;
8251 relocate = FALSE;
f21f3fe0 8252
00a97672 8253 outrel.r_addend = addend;
c629eae0
JJ		 8254 outrel.r_offset =
8255 _bfd_elf_section_offset (output_bfd, info, input_section,
8256 rel->r_offset);
8257 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8258 skip = TRUE;
0bb2d96a 8259 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8260 skip = TRUE, relocate = TRUE;
252b5132
RH		 8261 outrel.r_offset += (input_section->output_section->vma
8262 + input_section->output_offset);
f21f3fe0 8263
252b5132 8264 if (skip)
0bb2d96a 8265 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8266 else if (h != NULL
8267 && h->dynindx != -1
7359ea65 8268 && (!info->shared
5e681ec4 8269 || !info->symbolic
f5385ebf 8270 || !h->def_regular))
5e681ec4 8271 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8272 else
8273 {
a16385dc
MM		 8274 int symbol;
8275
5e681ec4 8276 /* This symbol is local, or marked to become local. */
34e77a92 8277 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8278 if (globals->symbian_p)
6366ff1e 8279 {
74541ad4
AM		 8280 asection *osec;
8281
6366ff1e
MM		 8282 /* On Symbian OS, the data segment and text segement
8283 can be relocated independently. Therefore, we
8284 must indicate the segment to which this
8285 relocation is relative. The BPABI allows us to
8286 use any symbol in the right segment; we just use
8287 the section symbol as it is convenient. (We
8288 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8289 will not appear in the dynamic symbol table.)
8290
8291 Note that the dynamic linker ignores the section
8292 symbol value, so we don't subtract osec->vma
8293 from the emitted reloc addend. */
10dbd1f3 8294 if (sym_sec)
74541ad4 8295 osec = sym_sec->output_section;
10dbd1f3 8296 else
74541ad4
AM		 8297 osec = input_section->output_section;
8298 symbol = elf_section_data (osec)->dynindx;
8299 if (symbol == 0)
8300 {
8301 struct elf_link_hash_table *htab = elf_hash_table (info);
8302
8303 if ((osec->flags & SEC_READONLY) == 0
8304 && htab->data_index_section != NULL)
8305 osec = htab->data_index_section;
8306 else
8307 osec = htab->text_index_section;
8308 symbol = elf_section_data (osec)->dynindx;
8309 }
6366ff1e
MM		 8310 BFD_ASSERT (symbol != 0);
8311 }
a16385dc
MM		 8312 else
8313 /* On SVR4-ish systems, the dynamic loader cannot
8314 relocate the text and data segments independently,
8315 so the symbol does not matter. */
8316 symbol = 0;
34e77a92
RS		 8317 if (dynreloc_st_type == STT_GNU_IFUNC)
8318 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8319 to the .iplt entry. Instead, every non-call reference
8320 must use an R_ARM_IRELATIVE relocation to obtain the
8321 correct run-time address. */
8322 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8323 else
8324 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8325 if (globals->use_rel)
8326 relocate = TRUE;
8327 else
34e77a92 8328 outrel.r_addend += dynreloc_value;
252b5132 8329 }
f21f3fe0 8330
47beaa6a 8331 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8332
f21f3fe0 8333 /* If this reloc is against an external symbol, we do not want to
252b5132 8334 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8335 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8336 if (! relocate)
8337 return bfd_reloc_ok;
9a5aca8c 8338
f21f3fe0 8339 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8340 contents, rel->r_offset,
8341 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8342 }
8343 else switch (r_type)
8344 {
00a97672
RS		 8345 case R_ARM_ABS12:
8346 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8347
dfc5f959 8348 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8349 case R_ARM_CALL:
8350 case R_ARM_JUMP24:
8029a119 8351 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8352 case R_ARM_PLT32:
906e58ca 8353 {
906e58ca
NC		 8354 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8355
dfc5f959 8356 if (r_type == R_ARM_XPC25)
252b5132 8357 {
dfc5f959
NC		 8358 /* Check for Arm calling Arm function. */
8359 /* FIXME: Should we translate the instruction into a BL
8360 instruction instead ? */
35fc36a8 8361 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8362 (*_bfd_error_handler)
8363 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8364 input_bfd,
8365 h ? h->root.root.string : "(local)");
dfc5f959 8366 }
155d87d7 8367 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8368 {
8369 /* Check for Arm calling Thumb function. */
35fc36a8 8370 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8371 {
f2a9dd69
DJ		 8372 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8373 output_bfd, input_section,
8374 hit_data, sym_sec, rel->r_offset,
8375 signed_addend, value,
8376 error_message))
8377 return bfd_reloc_ok;
8378 else
8379 return bfd_reloc_dangerous;
dfc5f959 8380 }
252b5132 8381 }
ba96a88f 8382
906e58ca 8383 /* Check if a stub has to be inserted because the
8029a119 8384 destination is too far or we are changing mode. */
155d87d7
CL		 8385 if ( r_type == R_ARM_CALL
8386 || r_type == R_ARM_JUMP24
8387 || r_type == R_ARM_PLT32)
906e58ca 8388 {
fe33d2fa
CL		 8389 enum elf32_arm_stub_type stub_type = arm_stub_none;
8390 struct elf32_arm_link_hash_entry *hash;
8391
8392 hash = (struct elf32_arm_link_hash_entry *) h;
8393 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8394 st_type, &branch_type,
8395 hash, value, sym_sec,
fe33d2fa 8396 input_bfd, sym_name);
5fa9e92f 8397
fe33d2fa 8398 if (stub_type != arm_stub_none)
906e58ca
NC		 8399 {
8400 /* The target is out of reach, so redirect the
8401 branch to the local stub for this function. */
906e58ca
NC		 8402 stub_entry = elf32_arm_get_stub_entry (input_section,
8403 sym_sec, h,
fe33d2fa
CL		 8404 rel, globals,
8405 stub_type);
9cd3e4e5
NC		 8406 {
8407 if (stub_entry != NULL)
8408 value = (stub_entry->stub_offset
8409 + stub_entry->stub_sec->output_offset
8410 + stub_entry->stub_sec->output_section->vma);
8411
8412 if (plt_offset != (bfd_vma) -1)
8413 *unresolved_reloc_p = FALSE;
8414 }
906e58ca 8415 }
fe33d2fa
CL		 8416 else
8417 {
8418 /* If the call goes through a PLT entry, make sure to
8419 check distance to the right destination address. */
34e77a92 8420 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8421 {
8422 value = (splt->output_section->vma
8423 + splt->output_offset
34e77a92 8424 + plt_offset);
fe33d2fa
CL		 8425 *unresolved_reloc_p = FALSE;
8426 /* The PLT entry is in ARM mode, regardless of the
8427 target function. */
35fc36a8 8428 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8429 }
8430 }
906e58ca
NC		 8431 }
8432
dea514f5
PB		 8433 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8434 where:
8435 S is the address of the symbol in the relocation.
8436 P is address of the instruction being relocated.
8437 A is the addend (extracted from the instruction) in bytes.
8438
8439 S is held in 'value'.
8440 P is the base address of the section containing the
8441 instruction plus the offset of the reloc into that
8442 section, ie:
8443 (input_section->output_section->vma +
8444 input_section->output_offset +
8445 rel->r_offset).
8446 A is the addend, converted into bytes, ie:
8447 (signed_addend * 4)
8448
8449 Note: None of these operations have knowledge of the pipeline
8450 size of the processor, thus it is up to the assembler to
8451 encode this information into the addend. */
8452 value -= (input_section->output_section->vma
8453 + input_section->output_offset);
8454 value -= rel->r_offset;
4e7fd91e
PB		 8455 if (globals->use_rel)
8456 value += (signed_addend << howto->size);
8457 else
8458 /* RELA addends do not have to be adjusted by howto->size. */
8459 value += signed_addend;
23080146 8460
dcb5e6e6
NC		 8461 signed_addend = value;
8462 signed_addend >>= howto->rightshift;
9a5aca8c 8463
5ab79981 8464 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8465 the next instruction unless a PLT entry will be created.
77b4f08f 8466 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8467 The jump to the next instruction is optimized as a NOP depending
8468 on the architecture. */
ffcb4889 8469 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8470 && plt_offset == (bfd_vma) -1)
77b4f08f 8471 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8472 {
cd1dac3d
DG		 8473 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8474
8475 if (arch_has_arm_nop (globals))
8476 value |= 0x0320f000;
8477 else
8478 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8479 }
8480 else
59f2c4e7 8481 {
9b485d32 8482 /* Perform a signed range check. */
dcb5e6e6 8483 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8484 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8485 return bfd_reloc_overflow;
9a5aca8c 8486
5ab79981 8487 addend = (value & 2);
39b41c9c 8488
5ab79981
PB		 8489 value = (signed_addend & howto->dst_mask)
8490 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8491
5ab79981
PB		 8492 if (r_type == R_ARM_CALL)
8493 {
155d87d7 8494 /* Set the H bit in the BLX instruction. */
35fc36a8 8495 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8496 {
8497 if (addend)
8498 value |= (1 << 24);
8499 else
8500 value &= ~(bfd_vma)(1 << 24);
8501 }
8502
5ab79981 8503 /* Select the correct instruction (BL or BLX). */
906e58ca 8504 /* Only if we are not handling a BL to a stub. In this
8029a119 8505 case, mode switching is performed by the stub. */
35fc36a8 8506 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8507 value |= (1 << 28);
63e1a0fc 8508 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8509 {
8510 value &= ~(bfd_vma)(1 << 28);
8511 value |= (1 << 24);
8512 }
39b41c9c
PB		 8513 }
8514 }
906e58ca 8515 }
252b5132 8516 break;
f21f3fe0 8517
252b5132
RH		 8518 case R_ARM_ABS32:
8519 value += addend;
35fc36a8 8520 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8521 value |= 1;
8522 break;
f21f3fe0 8523
bb224fc3
MS		 8524 case R_ARM_ABS32_NOI:
8525 value += addend;
8526 break;
8527
252b5132 8528 case R_ARM_REL32:
a8bc6c78 8529 value += addend;
35fc36a8 8530 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8531 value |= 1;
252b5132 8532 value -= (input_section->output_section->vma
62efb346 8533 + input_section->output_offset + rel->r_offset);
252b5132 8534 break;
eb043451 8535
bb224fc3
MS		 8536 case R_ARM_REL32_NOI:
8537 value += addend;
8538 value -= (input_section->output_section->vma
8539 + input_section->output_offset + rel->r_offset);
8540 break;
8541
eb043451
PB		 8542 case R_ARM_PREL31:
8543 value -= (input_section->output_section->vma
8544 + input_section->output_offset + rel->r_offset);
8545 value += signed_addend;
8546 if (! h || h->root.type != bfd_link_hash_undefweak)
8547 {
8029a119 8548 /* Check for overflow. */
eb043451
PB		 8549 if ((value ^ (value >> 1)) & (1 << 30))
8550 return bfd_reloc_overflow;
8551 }
8552 value &= 0x7fffffff;
8553 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8554 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8555 value |= 1;
8556 break;
252b5132 8557 }
f21f3fe0 8558
252b5132
RH		 8559 bfd_put_32 (input_bfd, value, hit_data);
8560 return bfd_reloc_ok;
8561
8562 case R_ARM_ABS8:
8563 value += addend;
4e67d4ca
DG		 8564
8565 /* There is no way to tell whether the user intended to use a signed or
8566 unsigned addend. When checking for overflow we accept either,
8567 as specified by the AAELF. */
8568 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8569 return bfd_reloc_overflow;
8570
8571 bfd_put_8 (input_bfd, value, hit_data);
8572 return bfd_reloc_ok;
8573
8574 case R_ARM_ABS16:
8575 value += addend;
8576
4e67d4ca
DG		 8577 /* See comment for R_ARM_ABS8. */
8578 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8579 return bfd_reloc_overflow;
8580
8581 bfd_put_16 (input_bfd, value, hit_data);
8582 return bfd_reloc_ok;
8583
252b5132 8584 case R_ARM_THM_ABS5:
9b485d32 8585 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8586 if (globals->use_rel)
8587 {
8588 /* Need to refetch addend. */
8589 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8590 /* ??? Need to determine shift amount from operand size. */
8591 addend >>= howto->rightshift;
8592 }
252b5132
RH		 8593 value += addend;
8594
8595 /* ??? Isn't value unsigned? */
8596 if ((long) value > 0x1f || (long) value < -0x10)
8597 return bfd_reloc_overflow;
8598
8599 /* ??? Value needs to be properly shifted into place first. */
8600 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8601 bfd_put_16 (input_bfd, value, hit_data);
8602 return bfd_reloc_ok;
8603
2cab6cc3
MS		 8604 case R_ARM_THM_ALU_PREL_11_0:
8605 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8606 {
8607 bfd_vma insn;
8608 bfd_signed_vma relocation;
8609
8610 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8611 | bfd_get_16 (input_bfd, hit_data + 2);
8612
8613 if (globals->use_rel)
8614 {
8615 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8616 | ((insn & (1 << 26)) >> 15);
8617 if (insn & 0xf00000)
8618 signed_addend = -signed_addend;
8619 }
8620
8621 relocation = value + signed_addend;
8622 relocation -= (input_section->output_section->vma
8623 + input_section->output_offset
8624 + rel->r_offset);
8625
8626 value = abs (relocation);
8627
8628 if (value >= 0x1000)
8629 return bfd_reloc_overflow;
8630
8631 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8632 | ((value & 0x700) << 4)
8633 | ((value & 0x800) << 15);
8634 if (relocation < 0)
8635 insn |= 0xa00000;
8636
8637 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8638 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8639
8640 return bfd_reloc_ok;
8641 }
8642
e1ec24c6
NC		 8643 case R_ARM_THM_PC8:
8644 /* PR 10073: This reloc is not generated by the GNU toolchain,
8645 but it is supported for compatibility with third party libraries
8646 generated by other compilers, specifically the ARM/IAR. */
8647 {
8648 bfd_vma insn;
8649 bfd_signed_vma relocation;
8650
8651 insn = bfd_get_16 (input_bfd, hit_data);
8652
8653 if (globals->use_rel)
8654 addend = (insn & 0x00ff) << 2;
8655
8656 relocation = value + addend;
8657 relocation -= (input_section->output_section->vma
8658 + input_section->output_offset
8659 + rel->r_offset);
8660
8661 value = abs (relocation);
8662
8663 /* We do not check for overflow of this reloc. Although strictly
8664 speaking this is incorrect, it appears to be necessary in order
8665 to work with IAR generated relocs. Since GCC and GAS do not
8666 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8667 a problem for them. */
8668 value &= 0x3fc;
8669
8670 insn = (insn & 0xff00) | (value >> 2);
8671
8672 bfd_put_16 (input_bfd, insn, hit_data);
8673
8674 return bfd_reloc_ok;
8675 }
8676
2cab6cc3
MS		 8677 case R_ARM_THM_PC12:
8678 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8679 {
8680 bfd_vma insn;
8681 bfd_signed_vma relocation;
8682
8683 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8684 | bfd_get_16 (input_bfd, hit_data + 2);
8685
8686 if (globals->use_rel)
8687 {
8688 signed_addend = insn & 0xfff;
8689 if (!(insn & (1 << 23)))
8690 signed_addend = -signed_addend;
8691 }
8692
8693 relocation = value + signed_addend;
8694 relocation -= (input_section->output_section->vma
8695 + input_section->output_offset
8696 + rel->r_offset);
8697
8698 value = abs (relocation);
8699
8700 if (value >= 0x1000)
8701 return bfd_reloc_overflow;
8702
8703 insn = (insn & 0xff7ff000) | value;
8704 if (relocation >= 0)
8705 insn |= (1 << 23);
8706
8707 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8708 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8709
8710 return bfd_reloc_ok;
8711 }
8712
dfc5f959 8713 case R_ARM_THM_XPC22:
c19d1205 8714 case R_ARM_THM_CALL:
bd97cb95 8715 case R_ARM_THM_JUMP24:
dfc5f959 8716 /* Thumb BL (branch long instruction). */
252b5132 8717 {
b34976b6 8718 bfd_vma relocation;
e95de063 8719 bfd_vma reloc_sign;
b34976b6
AM		 8720 bfd_boolean overflow = FALSE;
8721 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8722 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8723 bfd_signed_vma reloc_signed_max;
8724 bfd_signed_vma reloc_signed_min;
b34976b6 8725 bfd_vma check;
252b5132 8726 bfd_signed_vma signed_check;
e95de063 8727 int bitsize;
cd1dac3d 8728 const int thumb2 = using_thumb2 (globals);
252b5132 8729
5ab79981 8730 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8731 the next instruction unless a PLT entry will be created.
8732 The jump to the next instruction is optimized as a NOP.W for
8733 Thumb-2 enabled architectures. */
19540007 8734 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8735 && plt_offset == (bfd_vma) -1)
5ab79981 8736 {
cd1dac3d
DG		 8737 if (arch_has_thumb2_nop (globals))
8738 {
8739 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8740 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8741 }
8742 else
8743 {
8744 bfd_put_16 (input_bfd, 0xe000, hit_data);
8745 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8746 }
5ab79981
PB		 8747 return bfd_reloc_ok;
8748 }
8749
e95de063
MS		 8750 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8751 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8752 if (globals->use_rel)
8753 {
e95de063
MS		 8754 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8755 bfd_vma upper = upper_insn & 0x3ff;
8756 bfd_vma lower = lower_insn & 0x7ff;
8757 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8758 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8759 bfd_vma i1 = j1 ^ s ? 0 : 1;
8760 bfd_vma i2 = j2 ^ s ? 0 : 1;
8761
8762 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8763 /* Sign extend. */
8764 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8765
4e7fd91e
PB		 8766 signed_addend = addend;
8767 }
cb1afa5c 8768
dfc5f959
NC		 8769 if (r_type == R_ARM_THM_XPC22)
8770 {
8771 /* Check for Thumb to Thumb call. */
8772 /* FIXME: Should we translate the instruction into a BL
8773 instruction instead ? */
35fc36a8 8774 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8775 (*_bfd_error_handler)
8776 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8777 input_bfd,
8778 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8779 }
8780 else
252b5132 8781 {
dfc5f959
NC		 8782 /* If it is not a call to Thumb, assume call to Arm.
8783 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8784 function call at all, but rather a long jump. Calls through
8785 the PLT do not require stubs. */
34e77a92 8786 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8787 {
bd97cb95 8788 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8789 {
8790 /* Convert BL to BLX. */
8791 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8792 }
155d87d7
CL		 8793 else if (( r_type != R_ARM_THM_CALL)
8794 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8795 {
8796 if (elf32_thumb_to_arm_stub
8797 (info, sym_name, input_bfd, output_bfd, input_section,
8798 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8799 error_message))
8800 return bfd_reloc_ok;
8801 else
8802 return bfd_reloc_dangerous;
8803 }
da5938a2 8804 }
35fc36a8
RS		 8805 else if (branch_type == ST_BRANCH_TO_THUMB
8806 && globals->use_blx
bd97cb95 8807 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8808 {
8809 /* Make sure this is a BL. */
8810 lower_insn |= 0x1800;
8811 }
252b5132 8812 }
f21f3fe0 8813
fe33d2fa 8814 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8815 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8816 {
8817 /* Check if a stub has to be inserted because the destination
8029a119 8818 is too far. */
fe33d2fa
CL		 8819 struct elf32_arm_stub_hash_entry *stub_entry;
8820 struct elf32_arm_link_hash_entry *hash;
8821
8822 hash = (struct elf32_arm_link_hash_entry *) h;
8823
8824 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8825 st_type, &branch_type,
8826 hash, value, sym_sec,
fe33d2fa
CL		 8827 input_bfd, sym_name);
8828
8829 if (stub_type != arm_stub_none)
906e58ca
NC		 8830 {
8831 /* The target is out of reach or we are changing modes, so
8832 redirect the branch to the local stub for this
8833 function. */
8834 stub_entry = elf32_arm_get_stub_entry (input_section,
8835 sym_sec, h,
fe33d2fa
CL		 8836 rel, globals,
8837 stub_type);
906e58ca 8838 if (stub_entry != NULL)
9cd3e4e5
NC		 8839 {
8840 value = (stub_entry->stub_offset
8841 + stub_entry->stub_sec->output_offset
8842 + stub_entry->stub_sec->output_section->vma);
8843
8844 if (plt_offset != (bfd_vma) -1)
8845 *unresolved_reloc_p = FALSE;
8846 }
906e58ca 8847
f4ac8484 8848 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8849 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8850 {
8851 if ((stub_entry
8852 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8853 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8854 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8855 }
906e58ca
NC		 8856 }
8857 }
8858
fe33d2fa 8859 /* Handle calls via the PLT. */
34e77a92 8860 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8861 {
8862 value = (splt->output_section->vma
8863 + splt->output_offset
34e77a92 8864 + plt_offset);
fe33d2fa
CL		 8865
8866 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8867 {
8868 /* If the Thumb BLX instruction is available, convert
8869 the BL to a BLX instruction to call the ARM-mode
8870 PLT entry. */
8871 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8872 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8873 }
8874 else
8875 {
8876 /* Target the Thumb stub before the ARM PLT entry. */
8877 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8878 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8879 }
8880 *unresolved_reloc_p = FALSE;
8881 }
8882
ba96a88f 8883 relocation = value + signed_addend;
f21f3fe0 8884
252b5132 8885 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8886 + input_section->output_offset
8887 + rel->r_offset);
9a5aca8c 8888
252b5132
RH		 8889 check = relocation >> howto->rightshift;
8890
8891 /* If this is a signed value, the rightshift just dropped
8892 leading 1 bits (assuming twos complement). */
8893 if ((bfd_signed_vma) relocation >= 0)
8894 signed_check = check;
8895 else
8896 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8897
e95de063
MS		 8898 /* Calculate the permissable maximum and minimum values for
8899 this relocation according to whether we're relocating for
8900 Thumb-2 or not. */
8901 bitsize = howto->bitsize;
8902 if (!thumb2)
8903 bitsize -= 2;
f6ebfac0 8904 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8905 reloc_signed_min = ~reloc_signed_max;
8906
252b5132 8907 /* Assumes two's complement. */
ba96a88f 8908 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8909 overflow = TRUE;
252b5132 8910
bd97cb95 8911 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8912 /* For a BLX instruction, make sure that the relocation is rounded up
8913 to a word boundary. This follows the semantics of the instruction
8914 which specifies that bit 1 of the target address will come from bit
8915 1 of the base address. */
8916 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8917
e95de063
MS		 8918 /* Put RELOCATION back into the insn. Assumes two's complement.
8919 We use the Thumb-2 encoding, which is safe even if dealing with
8920 a Thumb-1 instruction by virtue of our overflow check above. */
8921 reloc_sign = (signed_check < 0) ? 1 : 0;
8922 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8923 | ((relocation >> 12) & 0x3ff)
8924 | (reloc_sign << 10);
906e58ca 8925 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8926 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8927 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8928 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8929
252b5132
RH		 8930 /* Put the relocated value back in the object file: */
8931 bfd_put_16 (input_bfd, upper_insn, hit_data);
8932 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8933
8934 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8935 }
8936 break;
8937
c19d1205
ZW		 8938 case R_ARM_THM_JUMP19:
8939 /* Thumb32 conditional branch instruction. */
8940 {
8941 bfd_vma relocation;
8942 bfd_boolean overflow = FALSE;
8943 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8944 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8945 bfd_signed_vma reloc_signed_max = 0xffffe;
8946 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8947 bfd_signed_vma signed_check;
8948
8949 /* Need to refetch the addend, reconstruct the top three bits,
8950 and squish the two 11 bit pieces together. */
8951 if (globals->use_rel)
8952 {
8953 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8954 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8955 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8956 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8957 bfd_vma lower = (lower_insn & 0x07ff);
8958
a00a1f35
MS		 8959 upper |= J1 << 6;
8960 upper |= J2 << 7;
8961 upper |= (!S) << 8;
c19d1205
ZW		 8962 upper -= 0x0100; /* Sign extend. */
8963
8964 addend = (upper << 12) | (lower << 1);
8965 signed_addend = addend;
8966 }
8967
bd97cb95 8968 /* Handle calls via the PLT. */
34e77a92 8969 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 8970 {
8971 value = (splt->output_section->vma
8972 + splt->output_offset
34e77a92 8973 + plt_offset);
bd97cb95
DJ		 8974 /* Target the Thumb stub before the ARM PLT entry. */
8975 value -= PLT_THUMB_STUB_SIZE;
8976 *unresolved_reloc_p = FALSE;
8977 }
8978
c19d1205
ZW		 8979 /* ??? Should handle interworking? GCC might someday try to
8980 use this for tail calls. */
8981
8982 relocation = value + signed_addend;
8983 relocation -= (input_section->output_section->vma
8984 + input_section->output_offset
8985 + rel->r_offset);
a00a1f35 8986 signed_check = (bfd_signed_vma) relocation;
c19d1205 8987
c19d1205
ZW		 8988 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8989 overflow = TRUE;
8990
8991 /* Put RELOCATION back into the insn. */
8992 {
8993 bfd_vma S = (relocation & 0x00100000) >> 20;
8994 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8995 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8996 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8997 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8998
a00a1f35 8999 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9000 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9001 }
9002
9003 /* Put the relocated value back in the object file: */
9004 bfd_put_16 (input_bfd, upper_insn, hit_data);
9005 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9006
9007 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9008 }
9009
9010 case R_ARM_THM_JUMP11:
9011 case R_ARM_THM_JUMP8:
9012 case R_ARM_THM_JUMP6:
51c5503b
NC		 9013 /* Thumb B (branch) instruction). */
9014 {
6cf9e9fe 9015 bfd_signed_vma relocation;
51c5503b
NC		 9016 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9017 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9018 bfd_signed_vma signed_check;
9019
c19d1205
ZW		 9020 /* CZB cannot jump backward. */
9021 if (r_type == R_ARM_THM_JUMP6)
9022 reloc_signed_min = 0;
9023
4e7fd91e 9024 if (globals->use_rel)
6cf9e9fe 9025 {
4e7fd91e
PB		 9026 /* Need to refetch addend. */
9027 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9028 if (addend & ((howto->src_mask + 1) >> 1))
9029 {
9030 signed_addend = -1;
9031 signed_addend &= ~ howto->src_mask;
9032 signed_addend |= addend;
9033 }
9034 else
9035 signed_addend = addend;
9036 /* The value in the insn has been right shifted. We need to
9037 undo this, so that we can perform the address calculation
9038 in terms of bytes. */
9039 signed_addend <<= howto->rightshift;
6cf9e9fe 9040 }
6cf9e9fe 9041 relocation = value + signed_addend;
51c5503b
NC		 9042
9043 relocation -= (input_section->output_section->vma
9044 + input_section->output_offset
9045 + rel->r_offset);
9046
6cf9e9fe
NC		 9047 relocation >>= howto->rightshift;
9048 signed_check = relocation;
c19d1205
ZW		 9049
9050 if (r_type == R_ARM_THM_JUMP6)
9051 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9052 else
9053 relocation &= howto->dst_mask;
51c5503b 9054 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9055
51c5503b
NC		 9056 bfd_put_16 (input_bfd, relocation, hit_data);
9057
9058 /* Assumes two's complement. */
9059 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9060 return bfd_reloc_overflow;
9061
9062 return bfd_reloc_ok;
9063 }
cedb70c5 9064
8375c36b
PB		 9065 case R_ARM_ALU_PCREL7_0:
9066 case R_ARM_ALU_PCREL15_8:
9067 case R_ARM_ALU_PCREL23_15:
9068 {
9069 bfd_vma insn;
9070 bfd_vma relocation;
9071
9072 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9073 if (globals->use_rel)
9074 {
9075 /* Extract the addend. */
9076 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9077 signed_addend = addend;
9078 }
8375c36b
PB		 9079 relocation = value + signed_addend;
9080
9081 relocation -= (input_section->output_section->vma
9082 + input_section->output_offset
9083 + rel->r_offset);
9084 insn = (insn & ~0xfff)
9085 | ((howto->bitpos << 7) & 0xf00)
9086 | ((relocation >> howto->bitpos) & 0xff);
9087 bfd_put_32 (input_bfd, value, hit_data);
9088 }
9089 return bfd_reloc_ok;
9090
252b5132
RH		 9091 case R_ARM_GNU_VTINHERIT:
9092 case R_ARM_GNU_VTENTRY:
9093 return bfd_reloc_ok;
9094
c19d1205 9095 case R_ARM_GOTOFF32:
252b5132
RH		 9096 /* Relocation is relative to the start of the
9097 global offset table. */
9098
9099 BFD_ASSERT (sgot != NULL);
9100 if (sgot == NULL)
9101 return bfd_reloc_notsupported;
9a5aca8c 9102
cedb70c5 9103 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9104 address by one, so that attempts to call the function pointer will
9105 correctly interpret it as Thumb code. */
35fc36a8 9106 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9107 value += 1;
9108
252b5132
RH		 9109 /* Note that sgot->output_offset is not involved in this
9110 calculation. We always want the start of .got. If we
9111 define _GLOBAL_OFFSET_TABLE in a different way, as is
9112 permitted by the ABI, we might have to change this
9b485d32 9113 calculation. */
252b5132 9114 value -= sgot->output_section->vma;
f21f3fe0 9115 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9116 contents, rel->r_offset, value,
00a97672 9117 rel->r_addend);
252b5132
RH		 9118
9119 case R_ARM_GOTPC:
a7c10850 9120 /* Use global offset table as symbol value. */
252b5132 9121 BFD_ASSERT (sgot != NULL);
f21f3fe0 9122
252b5132
RH		 9123 if (sgot == NULL)
9124 return bfd_reloc_notsupported;
9125
0945cdfd 9126 *unresolved_reloc_p = FALSE;
252b5132 9127 value = sgot->output_section->vma;
f21f3fe0 9128 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9129 contents, rel->r_offset, value,
00a97672 9130 rel->r_addend);
f21f3fe0 9131
252b5132 9132 case R_ARM_GOT32:
eb043451 9133 case R_ARM_GOT_PREL:
252b5132 9134 /* Relocation is to the entry for this symbol in the
9b485d32 9135 global offset table. */
252b5132
RH		 9136 if (sgot == NULL)
9137 return bfd_reloc_notsupported;
f21f3fe0 9138
34e77a92
RS		 9139 if (dynreloc_st_type == STT_GNU_IFUNC
9140 && plt_offset != (bfd_vma) -1
9141 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9142 {
9143 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9144 symbol, and the relocation resolves directly to the runtime
9145 target rather than to the .iplt entry. This means that any
9146 .got entry would be the same value as the .igot.plt entry,
9147 so there's no point creating both. */
9148 sgot = globals->root.igotplt;
9149 value = sgot->output_offset + gotplt_offset;
9150 }
9151 else if (h != NULL)
252b5132
RH		 9152 {
9153 bfd_vma off;
f21f3fe0 9154
252b5132
RH		 9155 off = h->got.offset;
9156 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9157 if ((off & 1) != 0)
252b5132 9158 {
b436d854
RS		 9159 /* We have already processsed one GOT relocation against
9160 this symbol. */
9161 off &= ~1;
9162 if (globals->root.dynamic_sections_created
9163 && !SYMBOL_REFERENCES_LOCAL (info, h))
9164 *unresolved_reloc_p = FALSE;
9165 }
9166 else
9167 {
9168 Elf_Internal_Rela outrel;
9169
9170 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9171 {
9172 /* If the symbol doesn't resolve locally in a static
9173 object, we have an undefined reference. If the
9174 symbol doesn't resolve locally in a dynamic object,
9175 it should be resolved by the dynamic linker. */
9176 if (globals->root.dynamic_sections_created)
9177 {
9178 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9179 *unresolved_reloc_p = FALSE;
9180 }
9181 else
9182 outrel.r_info = 0;
9183 outrel.r_addend = 0;
9184 }
252b5132
RH		 9185 else
9186 {
34e77a92
RS		 9187 if (dynreloc_st_type == STT_GNU_IFUNC)
9188 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9189 else if (info->shared)
9190 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9191 else
9192 outrel.r_info = 0;
9193 outrel.r_addend = dynreloc_value;
b436d854 9194 }
ee29b9fb 9195
b436d854
RS		 9196 /* The GOT entry is initialized to zero by default.
9197 See if we should install a different value. */
9198 if (outrel.r_addend != 0
9199 && (outrel.r_info == 0 || globals->use_rel))
9200 {
9201 bfd_put_32 (output_bfd, outrel.r_addend,
9202 sgot->contents + off);
9203 outrel.r_addend = 0;
252b5132 9204 }
f21f3fe0 9205
b436d854
RS		 9206 if (outrel.r_info != 0)
9207 {
9208 outrel.r_offset = (sgot->output_section->vma
9209 + sgot->output_offset
9210 + off);
9211 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9212 }
9213 h->got.offset |= 1;
9214 }
252b5132
RH		 9215 value = sgot->output_offset + off;
9216 }
9217 else
9218 {
9219 bfd_vma off;
f21f3fe0 9220
252b5132
RH		 9221 BFD_ASSERT (local_got_offsets != NULL &&
9222 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9223
252b5132 9224 off = local_got_offsets[r_symndx];
f21f3fe0 9225
252b5132
RH		 9226 /* The offset must always be a multiple of 4. We use the
9227 least significant bit to record whether we have already
9b485d32 9228 generated the necessary reloc. */
252b5132
RH		 9229 if ((off & 1) != 0)
9230 off &= ~1;
9231 else
9232 {
00a97672 9233 if (globals->use_rel)
34e77a92 9234 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9235
34e77a92 9236 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9237 {
947216bf 9238 Elf_Internal_Rela outrel;
f21f3fe0 9239
34e77a92 9240 outrel.r_addend = addend + dynreloc_value;
252b5132 9241 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9242 + sgot->output_offset
252b5132 9243 + off);
34e77a92
RS		 9244 if (dynreloc_st_type == STT_GNU_IFUNC)
9245 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9246 else
9247 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9248 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9249 }
f21f3fe0 9250
252b5132
RH		 9251 local_got_offsets[r_symndx] |= 1;
9252 }
f21f3fe0 9253
252b5132
RH		 9254 value = sgot->output_offset + off;
9255 }
eb043451
PB		 9256 if (r_type != R_ARM_GOT32)
9257 value += sgot->output_section->vma;
9a5aca8c 9258
f21f3fe0 9259 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9260 contents, rel->r_offset, value,
00a97672 9261 rel->r_addend);
f21f3fe0 9262
ba93b8ac
DJ		 9263 case R_ARM_TLS_LDO32:
9264 value = value - dtpoff_base (info);
9265
9266 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9267 contents, rel->r_offset, value,
9268 rel->r_addend);
ba93b8ac
DJ		 9269
9270 case R_ARM_TLS_LDM32:
9271 {
9272 bfd_vma off;
9273
362d30a1 9274 if (sgot == NULL)
ba93b8ac
DJ		 9275 abort ();
9276
9277 off = globals->tls_ldm_got.offset;
9278
9279 if ((off & 1) != 0)
9280 off &= ~1;
9281 else
9282 {
9283 /* If we don't know the module number, create a relocation
9284 for it. */
9285 if (info->shared)
9286 {
9287 Elf_Internal_Rela outrel;
ba93b8ac 9288
362d30a1 9289 if (srelgot == NULL)
ba93b8ac
DJ		 9290 abort ();
9291
00a97672 9292 outrel.r_addend = 0;
362d30a1
RS		 9293 outrel.r_offset = (sgot->output_section->vma
9294 + sgot->output_offset + off);
ba93b8ac
DJ		 9295 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9296
00a97672
RS		 9297 if (globals->use_rel)
9298 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9299 sgot->contents + off);
ba93b8ac 9300
47beaa6a 9301 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9302 }
9303 else
362d30a1 9304 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9305
9306 globals->tls_ldm_got.offset |= 1;
9307 }
9308
362d30a1 9309 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9310 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9311
9312 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9313 contents, rel->r_offset, value,
00a97672 9314 rel->r_addend);
ba93b8ac
DJ		 9315 }
9316
0855e32b
NS		 9317 case R_ARM_TLS_CALL:
9318 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9319 case R_ARM_TLS_GD32:
9320 case R_ARM_TLS_IE32:
0855e32b
NS		 9321 case R_ARM_TLS_GOTDESC:
9322 case R_ARM_TLS_DESCSEQ:
9323 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9324 {
0855e32b
NS		 9325 bfd_vma off, offplt;
9326 int indx = 0;
ba93b8ac
DJ		 9327 char tls_type;
9328
0855e32b 9329 BFD_ASSERT (sgot != NULL);
ba93b8ac 9330
ba93b8ac
DJ		 9331 if (h != NULL)
9332 {
9333 bfd_boolean dyn;
9334 dyn = globals->root.dynamic_sections_created;
9335 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9336 && (!info->shared
9337 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9338 {
9339 *unresolved_reloc_p = FALSE;
9340 indx = h->dynindx;
9341 }
9342 off = h->got.offset;
0855e32b 9343 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9344 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9345 }
9346 else
9347 {
0855e32b 9348 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9349 off = local_got_offsets[r_symndx];
0855e32b 9350 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9351 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9352 }
9353
0855e32b 9354 /* Linker relaxations happens from one of the
b38cadfb 9355 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9356 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9357 tls_type = GOT_TLS_IE;
0855e32b
NS		 9358
9359 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9360
9361 if ((off & 1) != 0)
9362 off &= ~1;
9363 else
9364 {
9365 bfd_boolean need_relocs = FALSE;
9366 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9367 int cur_off = off;
9368
9369 /* The GOT entries have not been initialized yet. Do it
9370 now, and emit any relocations. If both an IE GOT and a
9371 GD GOT are necessary, we emit the GD first. */
9372
9373 if ((info->shared || indx != 0)
9374 && (h == NULL
9375 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9376 || h->root.type != bfd_link_hash_undefweak))
9377 {
9378 need_relocs = TRUE;
0855e32b 9379 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9380 }
9381
0855e32b
NS		 9382 if (tls_type & GOT_TLS_GDESC)
9383 {
47beaa6a
RS		 9384 bfd_byte *loc;
9385
0855e32b
NS		 9386 /* We should have relaxed, unless this is an undefined
9387 weak symbol. */
9388 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9389 || info->shared);
9390 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9391 <= globals->root.sgotplt->size);
9392
9393 outrel.r_addend = 0;
9394 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9395 + globals->root.sgotplt->output_offset
9396 + offplt
9397 + globals->sgotplt_jump_table_size);
b38cadfb 9398
0855e32b
NS		 9399 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9400 sreloc = globals->root.srelplt;
9401 loc = sreloc->contents;
9402 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9403 BFD_ASSERT (loc + RELOC_SIZE (globals)
9404 <= sreloc->contents + sreloc->size);
9405
9406 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9407
9408 /* For globals, the first word in the relocation gets
9409 the relocation index and the top bit set, or zero,
9410 if we're binding now. For locals, it gets the
9411 symbol's offset in the tls section. */
9412 bfd_put_32 (output_bfd,
9413 !h ? value - elf_hash_table (info)->tls_sec->vma
9414 : info->flags & DF_BIND_NOW ? 0
9415 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9416 globals->root.sgotplt->contents + offplt
9417 + globals->sgotplt_jump_table_size);
9418
0855e32b
NS		 9419 /* Second word in the relocation is always zero. */
9420 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9421 globals->root.sgotplt->contents + offplt
9422 + globals->sgotplt_jump_table_size + 4);
0855e32b 9423 }
ba93b8ac
DJ		 9424 if (tls_type & GOT_TLS_GD)
9425 {
9426 if (need_relocs)
9427 {
00a97672 9428 outrel.r_addend = 0;
362d30a1
RS		 9429 outrel.r_offset = (sgot->output_section->vma
9430 + sgot->output_offset
00a97672 9431 + cur_off);
ba93b8ac 9432 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9433
00a97672
RS		 9434 if (globals->use_rel)
9435 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9436 sgot->contents + cur_off);
00a97672 9437
47beaa6a 9438 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9439
9440 if (indx == 0)
9441 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9442 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9443 else
9444 {
00a97672 9445 outrel.r_addend = 0;
ba93b8ac
DJ		 9446 outrel.r_info = ELF32_R_INFO (indx,
9447 R_ARM_TLS_DTPOFF32);
9448 outrel.r_offset += 4;
00a97672
RS		 9449
9450 if (globals->use_rel)
9451 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9452 sgot->contents + cur_off + 4);
00a97672 9453
47beaa6a
RS		 9454 elf32_arm_add_dynreloc (output_bfd, info,
9455 srelgot, &outrel);
ba93b8ac
DJ		 9456 }
9457 }
9458 else
9459 {
9460 /* If we are not emitting relocations for a
9461 general dynamic reference, then we must be in a
9462 static link or an executable link with the
9463 symbol binding locally. Mark it as belonging
9464 to module 1, the executable. */
9465 bfd_put_32 (output_bfd, 1,
362d30a1 9466 sgot->contents + cur_off);
ba93b8ac 9467 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9468 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9469 }
9470
9471 cur_off += 8;
9472 }
9473
9474 if (tls_type & GOT_TLS_IE)
9475 {
9476 if (need_relocs)
9477 {
00a97672
RS		 9478 if (indx == 0)
9479 outrel.r_addend = value - dtpoff_base (info);
9480 else
9481 outrel.r_addend = 0;
362d30a1
RS		 9482 outrel.r_offset = (sgot->output_section->vma
9483 + sgot->output_offset
ba93b8ac
DJ		 9484 + cur_off);
9485 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9486
00a97672
RS		 9487 if (globals->use_rel)
9488 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9489 sgot->contents + cur_off);
ba93b8ac 9490
47beaa6a 9491 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9492 }
9493 else
9494 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9495 sgot->contents + cur_off);
ba93b8ac
DJ		 9496 cur_off += 4;
9497 }
9498
9499 if (h != NULL)
9500 h->got.offset |= 1;
9501 else
9502 local_got_offsets[r_symndx] |= 1;
9503 }
9504
9505 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9506 off += 8;
0855e32b
NS		 9507 else if (tls_type & GOT_TLS_GDESC)
9508 off = offplt;
9509
9510 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9511 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9512 {
9513 bfd_signed_vma offset;
12352d3f
PB		 9514 /* TLS stubs are arm mode. The original symbol is a
9515 data object, so branch_type is bogus. */
9516 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9517 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9518 = arm_type_of_stub (info, input_section, rel,
9519 st_type, &branch_type,
0855e32b
NS		 9520 (struct elf32_arm_link_hash_entry *)h,
9521 globals->tls_trampoline, globals->root.splt,
9522 input_bfd, sym_name);
9523
9524 if (stub_type != arm_stub_none)
9525 {
9526 struct elf32_arm_stub_hash_entry *stub_entry
9527 = elf32_arm_get_stub_entry
9528 (input_section, globals->root.splt, 0, rel,
9529 globals, stub_type);
9530 offset = (stub_entry->stub_offset
9531 + stub_entry->stub_sec->output_offset
9532 + stub_entry->stub_sec->output_section->vma);
9533 }
9534 else
9535 offset = (globals->root.splt->output_section->vma
9536 + globals->root.splt->output_offset
9537 + globals->tls_trampoline);
9538
9539 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9540 {
9541 unsigned long inst;
b38cadfb
NC		 9542
9543 offset -= (input_section->output_section->vma
9544 + input_section->output_offset
9545 + rel->r_offset + 8);
0855e32b
NS		 9546
9547 inst = offset >> 2;
9548 inst &= 0x00ffffff;
9549 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9550 }
9551 else
9552 {
9553 /* Thumb blx encodes the offset in a complicated
9554 fashion. */
9555 unsigned upper_insn, lower_insn;
9556 unsigned neg;
9557
b38cadfb
NC		 9558 offset -= (input_section->output_section->vma
9559 + input_section->output_offset
0855e32b 9560 + rel->r_offset + 4);
b38cadfb 9561
12352d3f
PB		 9562 if (stub_type != arm_stub_none
9563 && arm_stub_is_thumb (stub_type))
9564 {
9565 lower_insn = 0xd000;
9566 }
9567 else
9568 {
9569 lower_insn = 0xc000;
9570 /* Round up the offset to a word boundary */
9571 offset = (offset + 2) & ~2;
9572 }
9573
0855e32b
NS		 9574 neg = offset < 0;
9575 upper_insn = (0xf000
9576 | ((offset >> 12) & 0x3ff)
9577 | (neg << 10));
12352d3f 9578 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9579 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9580 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9581 bfd_put_16 (input_bfd, upper_insn, hit_data);
9582 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9583 return bfd_reloc_ok;
9584 }
9585 }
9586 /* These relocations needs special care, as besides the fact
9587 they point somewhere in .gotplt, the addend must be
9588 adjusted accordingly depending on the type of instruction
9589 we refer to */
9590 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9591 {
9592 unsigned long data, insn;
9593 unsigned thumb;
b38cadfb 9594
0855e32b
NS		 9595 data = bfd_get_32 (input_bfd, hit_data);
9596 thumb = data & 1;
9597 data &= ~1u;
b38cadfb 9598
0855e32b
NS		 9599 if (thumb)
9600 {
9601 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9602 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9603 insn = (insn << 16)
9604 | bfd_get_16 (input_bfd,
9605 contents + rel->r_offset - data + 2);
9606 if ((insn & 0xf800c000) == 0xf000c000)
9607 /* bl/blx */
9608 value = -6;
9609 else if ((insn & 0xffffff00) == 0x4400)
9610 /* add */
9611 value = -5;
9612 else
9613 {
9614 (*_bfd_error_handler)
9615 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9616 input_bfd, input_section,
9617 (unsigned long)rel->r_offset, insn);
9618 return bfd_reloc_notsupported;
9619 }
9620 }
9621 else
9622 {
9623 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9624
9625 switch (insn >> 24)
9626 {
9627 case 0xeb: /* bl */
9628 case 0xfa: /* blx */
9629 value = -4;
9630 break;
9631
9632 case 0xe0: /* add */
9633 value = -8;
9634 break;
b38cadfb 9635
0855e32b
NS		 9636 default:
9637 (*_bfd_error_handler)
9638 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9639 input_bfd, input_section,
9640 (unsigned long)rel->r_offset, insn);
9641 return bfd_reloc_notsupported;
9642 }
9643 }
b38cadfb 9644
0855e32b
NS		 9645 value += ((globals->root.sgotplt->output_section->vma
9646 + globals->root.sgotplt->output_offset + off)
9647 - (input_section->output_section->vma
9648 + input_section->output_offset
9649 + rel->r_offset)
9650 + globals->sgotplt_jump_table_size);
9651 }
9652 else
9653 value = ((globals->root.sgot->output_section->vma
9654 + globals->root.sgot->output_offset + off)
9655 - (input_section->output_section->vma
9656 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9657
9658 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9659 contents, rel->r_offset, value,
00a97672 9660 rel->r_addend);
ba93b8ac
DJ		 9661 }
9662
9663 case R_ARM_TLS_LE32:
9ec0c936 9664 if (info->shared && !info->pie)
ba93b8ac
DJ		 9665 {
9666 (*_bfd_error_handler)
9667 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9668 input_bfd, input_section,
9669 (long) rel->r_offset, howto->name);
46691134 9670 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9671 }
9672 else
9673 value = tpoff (info, value);
906e58ca 9674
ba93b8ac 9675 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9676 contents, rel->r_offset, value,
9677 rel->r_addend);
ba93b8ac 9678
319850b4
JB		 9679 case R_ARM_V4BX:
9680 if (globals->fix_v4bx)
845b51d6
PB		 9681 {
9682 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9683
845b51d6
PB		 9684 /* Ensure that we have a BX instruction. */
9685 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9686
845b51d6
PB		 9687 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9688 {
9689 /* Branch to veneer. */
9690 bfd_vma glue_addr;
9691 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9692 glue_addr -= input_section->output_section->vma
9693 + input_section->output_offset
9694 + rel->r_offset + 8;
9695 insn = (insn & 0xf0000000) | 0x0a000000
9696 | ((glue_addr >> 2) & 0x00ffffff);
9697 }
9698 else
9699 {
9700 /* Preserve Rm (lowest four bits) and the condition code
9701 (highest four bits). Other bits encode MOV PC,Rm. */
9702 insn = (insn & 0xf000000f) | 0x01a0f000;
9703 }
319850b4 9704
845b51d6
PB		 9705 bfd_put_32 (input_bfd, insn, hit_data);
9706 }
319850b4
JB		 9707 return bfd_reloc_ok;
9708
b6895b4f
PB		 9709 case R_ARM_MOVW_ABS_NC:
9710 case R_ARM_MOVT_ABS:
9711 case R_ARM_MOVW_PREL_NC:
9712 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9713 /* Until we properly support segment-base-relative addressing then
9714 we assume the segment base to be zero, as for the group relocations.
9715 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9716 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9717 case R_ARM_MOVW_BREL_NC:
9718 case R_ARM_MOVW_BREL:
9719 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9720 {
9721 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9722
9723 if (globals->use_rel)
9724 {
9725 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9726 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9727 }
92f5d02b 9728
b6895b4f 9729 value += signed_addend;
b6895b4f
PB		 9730
9731 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9732 value -= (input_section->output_section->vma
9733 + input_section->output_offset + rel->r_offset);
9734
92f5d02b
MS		 9735 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9736 return bfd_reloc_overflow;
9737
35fc36a8 9738 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9739 value |= 1;
9740
9741 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9742 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9743 value >>= 16;
9744
9745 insn &= 0xfff0f000;
9746 insn |= value & 0xfff;
9747 insn |= (value & 0xf000) << 4;
9748 bfd_put_32 (input_bfd, insn, hit_data);
9749 }
9750 return bfd_reloc_ok;
9751
9752 case R_ARM_THM_MOVW_ABS_NC:
9753 case R_ARM_THM_MOVT_ABS:
9754 case R_ARM_THM_MOVW_PREL_NC:
9755 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9756 /* Until we properly support segment-base-relative addressing then
9757 we assume the segment base to be zero, as for the above relocations.
9758 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9759 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9760 as R_ARM_THM_MOVT_ABS. */
9761 case R_ARM_THM_MOVW_BREL_NC:
9762 case R_ARM_THM_MOVW_BREL:
9763 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9764 {
9765 bfd_vma insn;
906e58ca 9766
b6895b4f
PB		 9767 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9768 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9769
9770 if (globals->use_rel)
9771 {
9772 addend = ((insn >> 4) & 0xf000)
9773 | ((insn >> 15) & 0x0800)
9774 | ((insn >> 4) & 0x0700)
9775 | (insn & 0x00ff);
39623e12 9776 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9777 }
92f5d02b 9778
b6895b4f 9779 value += signed_addend;
b6895b4f
PB		 9780
9781 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9782 value -= (input_section->output_section->vma
9783 + input_section->output_offset + rel->r_offset);
9784
92f5d02b
MS		 9785 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9786 return bfd_reloc_overflow;
9787
35fc36a8 9788 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9789 value |= 1;
9790
9791 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9792 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9793 value >>= 16;
9794
9795 insn &= 0xfbf08f00;
9796 insn |= (value & 0xf000) << 4;
9797 insn |= (value & 0x0800) << 15;
9798 insn |= (value & 0x0700) << 4;
9799 insn |= (value & 0x00ff);
9800
9801 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9802 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9803 }
9804 return bfd_reloc_ok;
9805
4962c51a
MS		 9806 case R_ARM_ALU_PC_G0_NC:
9807 case R_ARM_ALU_PC_G1_NC:
9808 case R_ARM_ALU_PC_G0:
9809 case R_ARM_ALU_PC_G1:
9810 case R_ARM_ALU_PC_G2:
9811 case R_ARM_ALU_SB_G0_NC:
9812 case R_ARM_ALU_SB_G1_NC:
9813 case R_ARM_ALU_SB_G0:
9814 case R_ARM_ALU_SB_G1:
9815 case R_ARM_ALU_SB_G2:
9816 {
9817 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9818 bfd_vma pc = input_section->output_section->vma
9819 + input_section->output_offset + rel->r_offset;
9820 /* sb should be the origin of the *segment* containing the symbol.
9821 It is not clear how to obtain this OS-dependent value, so we
9822 make an arbitrary choice of zero. */
9823 bfd_vma sb = 0;
9824 bfd_vma residual;
9825 bfd_vma g_n;
9826 bfd_signed_vma signed_value;
9827 int group = 0;
9828
9829 /* Determine which group of bits to select. */
9830 switch (r_type)
9831 {
9832 case R_ARM_ALU_PC_G0_NC:
9833 case R_ARM_ALU_PC_G0:
9834 case R_ARM_ALU_SB_G0_NC:
9835 case R_ARM_ALU_SB_G0:
9836 group = 0;
9837 break;
9838
9839 case R_ARM_ALU_PC_G1_NC:
9840 case R_ARM_ALU_PC_G1:
9841 case R_ARM_ALU_SB_G1_NC:
9842 case R_ARM_ALU_SB_G1:
9843 group = 1;
9844 break;
9845
9846 case R_ARM_ALU_PC_G2:
9847 case R_ARM_ALU_SB_G2:
9848 group = 2;
9849 break;
9850
9851 default:
906e58ca 9852 abort ();
4962c51a
MS		 9853 }
9854
9855 /* If REL, extract the addend from the insn. If RELA, it will
9856 have already been fetched for us. */
9857 if (globals->use_rel)
9858 {
9859 int negative;
9860 bfd_vma constant = insn & 0xff;
9861 bfd_vma rotation = (insn & 0xf00) >> 8;
9862
9863 if (rotation == 0)
9864 signed_addend = constant;
9865 else
9866 {
9867 /* Compensate for the fact that in the instruction, the
9868 rotation is stored in multiples of 2 bits. */
9869 rotation *= 2;
9870
9871 /* Rotate "constant" right by "rotation" bits. */
9872 signed_addend = (constant >> rotation) |
9873 (constant << (8 * sizeof (bfd_vma) - rotation));
9874 }
9875
9876 /* Determine if the instruction is an ADD or a SUB.
9877 (For REL, this determines the sign of the addend.) */
9878 negative = identify_add_or_sub (insn);
9879 if (negative == 0)
9880 {
9881 (*_bfd_error_handler)
9882 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9883 input_bfd, input_section,
9884 (long) rel->r_offset, howto->name);
906e58ca 9885 return bfd_reloc_overflow;
4962c51a
MS		 9886 }
9887
9888 signed_addend *= negative;
9889 }
9890
9891 /* Compute the value (X) to go in the place. */
9892 if (r_type == R_ARM_ALU_PC_G0_NC
9893 || r_type == R_ARM_ALU_PC_G1_NC
9894 || r_type == R_ARM_ALU_PC_G0
9895 || r_type == R_ARM_ALU_PC_G1
9896 || r_type == R_ARM_ALU_PC_G2)
9897 /* PC relative. */
9898 signed_value = value - pc + signed_addend;
9899 else
9900 /* Section base relative. */
9901 signed_value = value - sb + signed_addend;
9902
9903 /* If the target symbol is a Thumb function, then set the
9904 Thumb bit in the address. */
35fc36a8 9905 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9906 signed_value |= 1;
9907
9908 /* Calculate the value of the relevant G_n, in encoded
9909 constant-with-rotation format. */
9910 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9911 &residual);
9912
9913 /* Check for overflow if required. */
9914 if ((r_type == R_ARM_ALU_PC_G0
9915 || r_type == R_ARM_ALU_PC_G1
9916 || r_type == R_ARM_ALU_PC_G2
9917 || r_type == R_ARM_ALU_SB_G0
9918 || r_type == R_ARM_ALU_SB_G1
9919 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9920 {
9921 (*_bfd_error_handler)
9922 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9923 input_bfd, input_section,
9924 (long) rel->r_offset, abs (signed_value), howto->name);
9925 return bfd_reloc_overflow;
9926 }
9927
9928 /* Mask out the value and the ADD/SUB part of the opcode; take care
9929 not to destroy the S bit. */
9930 insn &= 0xff1ff000;
9931
9932 /* Set the opcode according to whether the value to go in the
9933 place is negative. */
9934 if (signed_value < 0)
9935 insn |= 1 << 22;
9936 else
9937 insn |= 1 << 23;
9938
9939 /* Encode the offset. */
9940 insn |= g_n;
9941
9942 bfd_put_32 (input_bfd, insn, hit_data);
9943 }
9944 return bfd_reloc_ok;
9945
9946 case R_ARM_LDR_PC_G0:
9947 case R_ARM_LDR_PC_G1:
9948 case R_ARM_LDR_PC_G2:
9949 case R_ARM_LDR_SB_G0:
9950 case R_ARM_LDR_SB_G1:
9951 case R_ARM_LDR_SB_G2:
9952 {
9953 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9954 bfd_vma pc = input_section->output_section->vma
9955 + input_section->output_offset + rel->r_offset;
9956 bfd_vma sb = 0; /* See note above. */
9957 bfd_vma residual;
9958 bfd_signed_vma signed_value;
9959 int group = 0;
9960
9961 /* Determine which groups of bits to calculate. */
9962 switch (r_type)
9963 {
9964 case R_ARM_LDR_PC_G0:
9965 case R_ARM_LDR_SB_G0:
9966 group = 0;
9967 break;
9968
9969 case R_ARM_LDR_PC_G1:
9970 case R_ARM_LDR_SB_G1:
9971 group = 1;
9972 break;
9973
9974 case R_ARM_LDR_PC_G2:
9975 case R_ARM_LDR_SB_G2:
9976 group = 2;
9977 break;
9978
9979 default:
906e58ca 9980 abort ();
4962c51a
MS		 9981 }
9982
9983 /* If REL, extract the addend from the insn. If RELA, it will
9984 have already been fetched for us. */
9985 if (globals->use_rel)
9986 {
9987 int negative = (insn & (1 << 23)) ? 1 : -1;
9988 signed_addend = negative * (insn & 0xfff);
9989 }
9990
9991 /* Compute the value (X) to go in the place. */
9992 if (r_type == R_ARM_LDR_PC_G0
9993 || r_type == R_ARM_LDR_PC_G1
9994 || r_type == R_ARM_LDR_PC_G2)
9995 /* PC relative. */
9996 signed_value = value - pc + signed_addend;
9997 else
9998 /* Section base relative. */
9999 signed_value = value - sb + signed_addend;
10000
10001 /* Calculate the value of the relevant G_{n-1} to obtain
10002 the residual at that stage. */
10003 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10004
10005 /* Check for overflow. */
10006 if (residual >= 0x1000)
10007 {
10008 (*_bfd_error_handler)
10009 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10010 input_bfd, input_section,
10011 (long) rel->r_offset, abs (signed_value), howto->name);
10012 return bfd_reloc_overflow;
10013 }
10014
10015 /* Mask out the value and U bit. */
10016 insn &= 0xff7ff000;
10017
10018 /* Set the U bit if the value to go in the place is non-negative. */
10019 if (signed_value >= 0)
10020 insn |= 1 << 23;
10021
10022 /* Encode the offset. */
10023 insn |= residual;
10024
10025 bfd_put_32 (input_bfd, insn, hit_data);
10026 }
10027 return bfd_reloc_ok;
10028
10029 case R_ARM_LDRS_PC_G0:
10030 case R_ARM_LDRS_PC_G1:
10031 case R_ARM_LDRS_PC_G2:
10032 case R_ARM_LDRS_SB_G0:
10033 case R_ARM_LDRS_SB_G1:
10034 case R_ARM_LDRS_SB_G2:
10035 {
10036 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10037 bfd_vma pc = input_section->output_section->vma
10038 + input_section->output_offset + rel->r_offset;
10039 bfd_vma sb = 0; /* See note above. */
10040 bfd_vma residual;
10041 bfd_signed_vma signed_value;
10042 int group = 0;
10043
10044 /* Determine which groups of bits to calculate. */
10045 switch (r_type)
10046 {
10047 case R_ARM_LDRS_PC_G0:
10048 case R_ARM_LDRS_SB_G0:
10049 group = 0;
10050 break;
10051
10052 case R_ARM_LDRS_PC_G1:
10053 case R_ARM_LDRS_SB_G1:
10054 group = 1;
10055 break;
10056
10057 case R_ARM_LDRS_PC_G2:
10058 case R_ARM_LDRS_SB_G2:
10059 group = 2;
10060 break;
10061
10062 default:
906e58ca 10063 abort ();
4962c51a
MS		 10064 }
10065
10066 /* If REL, extract the addend from the insn. If RELA, it will
10067 have already been fetched for us. */
10068 if (globals->use_rel)
10069 {
10070 int negative = (insn & (1 << 23)) ? 1 : -1;
10071 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10072 }
10073
10074 /* Compute the value (X) to go in the place. */
10075 if (r_type == R_ARM_LDRS_PC_G0
10076 || r_type == R_ARM_LDRS_PC_G1
10077 || r_type == R_ARM_LDRS_PC_G2)
10078 /* PC relative. */
10079 signed_value = value - pc + signed_addend;
10080 else
10081 /* Section base relative. */
10082 signed_value = value - sb + signed_addend;
10083
10084 /* Calculate the value of the relevant G_{n-1} to obtain
10085 the residual at that stage. */
10086 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10087
10088 /* Check for overflow. */
10089 if (residual >= 0x100)
10090 {
10091 (*_bfd_error_handler)
10092 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10093 input_bfd, input_section,
10094 (long) rel->r_offset, abs (signed_value), howto->name);
10095 return bfd_reloc_overflow;
10096 }
10097
10098 /* Mask out the value and U bit. */
10099 insn &= 0xff7ff0f0;
10100
10101 /* Set the U bit if the value to go in the place is non-negative. */
10102 if (signed_value >= 0)
10103 insn |= 1 << 23;
10104
10105 /* Encode the offset. */
10106 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10107
10108 bfd_put_32 (input_bfd, insn, hit_data);
10109 }
10110 return bfd_reloc_ok;
10111
10112 case R_ARM_LDC_PC_G0:
10113 case R_ARM_LDC_PC_G1:
10114 case R_ARM_LDC_PC_G2:
10115 case R_ARM_LDC_SB_G0:
10116 case R_ARM_LDC_SB_G1:
10117 case R_ARM_LDC_SB_G2:
10118 {
10119 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10120 bfd_vma pc = input_section->output_section->vma
10121 + input_section->output_offset + rel->r_offset;
10122 bfd_vma sb = 0; /* See note above. */
10123 bfd_vma residual;
10124 bfd_signed_vma signed_value;
10125 int group = 0;
10126
10127 /* Determine which groups of bits to calculate. */
10128 switch (r_type)
10129 {
10130 case R_ARM_LDC_PC_G0:
10131 case R_ARM_LDC_SB_G0:
10132 group = 0;
10133 break;
10134
10135 case R_ARM_LDC_PC_G1:
10136 case R_ARM_LDC_SB_G1:
10137 group = 1;
10138 break;
10139
10140 case R_ARM_LDC_PC_G2:
10141 case R_ARM_LDC_SB_G2:
10142 group = 2;
10143 break;
10144
10145 default:
906e58ca 10146 abort ();
4962c51a
MS		 10147 }
10148
10149 /* If REL, extract the addend from the insn. If RELA, it will
10150 have already been fetched for us. */
10151 if (globals->use_rel)
10152 {
10153 int negative = (insn & (1 << 23)) ? 1 : -1;
10154 signed_addend = negative * ((insn & 0xff) << 2);
10155 }
10156
10157 /* Compute the value (X) to go in the place. */
10158 if (r_type == R_ARM_LDC_PC_G0
10159 || r_type == R_ARM_LDC_PC_G1
10160 || r_type == R_ARM_LDC_PC_G2)
10161 /* PC relative. */
10162 signed_value = value - pc + signed_addend;
10163 else
10164 /* Section base relative. */
10165 signed_value = value - sb + signed_addend;
10166
10167 /* Calculate the value of the relevant G_{n-1} to obtain
10168 the residual at that stage. */
10169 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10170
10171 /* Check for overflow. (The absolute value to go in the place must be
10172 divisible by four and, after having been divided by four, must
10173 fit in eight bits.) */
10174 if ((residual & 0x3) != 0 || residual >= 0x400)
10175 {
10176 (*_bfd_error_handler)
10177 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10178 input_bfd, input_section,
10179 (long) rel->r_offset, abs (signed_value), howto->name);
10180 return bfd_reloc_overflow;
10181 }
10182
10183 /* Mask out the value and U bit. */
10184 insn &= 0xff7fff00;
10185
10186 /* Set the U bit if the value to go in the place is non-negative. */
10187 if (signed_value >= 0)
10188 insn |= 1 << 23;
10189
10190 /* Encode the offset. */
10191 insn |= residual >> 2;
10192
10193 bfd_put_32 (input_bfd, insn, hit_data);
10194 }
10195 return bfd_reloc_ok;
10196
252b5132
RH		 10197 default:
10198 return bfd_reloc_notsupported;
10199 }
10200}
10201
98c1d4aa
NC		 10202/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10203static void
57e8b36a
NC		 10204arm_add_to_rel (bfd * abfd,
10205 bfd_byte * address,
10206 reloc_howto_type * howto,
10207 bfd_signed_vma increment)
98c1d4aa 10208{
98c1d4aa
NC		 10209 bfd_signed_vma addend;
10210
bd97cb95
DJ		 10211 if (howto->type == R_ARM_THM_CALL
10212 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10213 {
9a5aca8c
AM		 10214 int upper_insn, lower_insn;
10215 int upper, lower;
98c1d4aa 10216
9a5aca8c
AM		 10217 upper_insn = bfd_get_16 (abfd, address);
10218 lower_insn = bfd_get_16 (abfd, address + 2);
10219 upper = upper_insn & 0x7ff;
10220 lower = lower_insn & 0x7ff;
10221
10222 addend = (upper << 12) | (lower << 1);
ddda4409 10223 addend += increment;
9a5aca8c 10224 addend >>= 1;
98c1d4aa 10225
9a5aca8c
AM		 10226 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10227 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10228
dc810e39
AM		 10229 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10230 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10231 }
10232 else
10233 {
10234 bfd_vma contents;
10235
10236 contents = bfd_get_32 (abfd, address);
10237
10238 /* Get the (signed) value from the instruction. */
10239 addend = contents & howto->src_mask;
10240 if (addend & ((howto->src_mask + 1) >> 1))
10241 {
10242 bfd_signed_vma mask;
10243
10244 mask = -1;
10245 mask &= ~ howto->src_mask;
10246 addend |= mask;
10247 }
10248
10249 /* Add in the increment, (which is a byte value). */
10250 switch (howto->type)
10251 {
10252 default:
10253 addend += increment;
10254 break;
10255
10256 case R_ARM_PC24:
c6596c5e 10257 case R_ARM_PLT32:
5b5bb741
PB		 10258 case R_ARM_CALL:
10259 case R_ARM_JUMP24:
9a5aca8c 10260 addend <<= howto->size;
dc810e39 10261 addend += increment;
9a5aca8c
AM		 10262
10263 /* Should we check for overflow here ? */
10264
10265 /* Drop any undesired bits. */
10266 addend >>= howto->rightshift;
10267 break;
10268 }
10269
10270 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10271
10272 bfd_put_32 (abfd, contents, address);
ddda4409 10273 }
98c1d4aa 10274}
252b5132 10275
ba93b8ac
DJ		 10276#define IS_ARM_TLS_RELOC(R_TYPE) \
10277 ((R_TYPE) == R_ARM_TLS_GD32 \
10278 || (R_TYPE) == R_ARM_TLS_LDO32 \
10279 || (R_TYPE) == R_ARM_TLS_LDM32 \
10280 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10281 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10282 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10283 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10284 || (R_TYPE) == R_ARM_TLS_IE32 \
10285 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10286
10287/* Specific set of relocations for the gnu tls dialect. */
10288#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10289 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10290 || (R_TYPE) == R_ARM_TLS_CALL \
10291 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10292 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10293 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10294
252b5132 10295/* Relocate an ARM ELF section. */
906e58ca 10296
b34976b6 10297static bfd_boolean
57e8b36a
NC		 10298elf32_arm_relocate_section (bfd * output_bfd,
10299 struct bfd_link_info * info,
10300 bfd * input_bfd,
10301 asection * input_section,
10302 bfd_byte * contents,
10303 Elf_Internal_Rela * relocs,
10304 Elf_Internal_Sym * local_syms,
10305 asection ** local_sections)
252b5132 10306{
b34976b6
AM		 10307 Elf_Internal_Shdr *symtab_hdr;
10308 struct elf_link_hash_entry **sym_hashes;
10309 Elf_Internal_Rela *rel;
10310 Elf_Internal_Rela *relend;
10311 const char *name;
b32d3aa2 10312 struct elf32_arm_link_hash_table * globals;
252b5132 10313
4e7fd91e 10314 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10315 if (globals == NULL)
10316 return FALSE;
b491616a 10317
0ffa91dd 10318 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10319 sym_hashes = elf_sym_hashes (input_bfd);
10320
10321 rel = relocs;
10322 relend = relocs + input_section->reloc_count;
10323 for (; rel < relend; rel++)
10324 {
ba96a88f
NC		 10325 int r_type;
10326 reloc_howto_type * howto;
10327 unsigned long r_symndx;
10328 Elf_Internal_Sym * sym;
10329 asection * sec;
252b5132 10330 struct elf_link_hash_entry * h;
ba96a88f
NC		 10331 bfd_vma relocation;
10332 bfd_reloc_status_type r;
10333 arelent bfd_reloc;
ba93b8ac 10334 char sym_type;
0945cdfd 10335 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10336 char *error_message = NULL;
f21f3fe0 10337
252b5132 10338 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10339 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10340 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10341
ba96a88f
NC		 10342 if ( r_type == R_ARM_GNU_VTENTRY
10343 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 10344 continue;
10345
b32d3aa2 10346 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10347 howto = bfd_reloc.howto;
252b5132 10348
252b5132
RH		 10349 h = NULL;
10350 sym = NULL;
10351 sec = NULL;
9b485d32 10352
252b5132
RH		 10353 if (r_symndx < symtab_hdr->sh_info)
10354 {
10355 sym = local_syms + r_symndx;
ba93b8ac 10356 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10357 sec = local_sections[r_symndx];
ffcb4889
NS		 10358
10359 /* An object file might have a reference to a local
10360 undefined symbol. This is a daft object file, but we
10361 should at least do something about it. V4BX & NONE
10362 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10363 allowed to use the undefined symbol, so allow those.
10364 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10365 if (r_type != R_ARM_V4BX
10366 && r_type != R_ARM_NONE
77b4f08f 10367 && r_symndx != STN_UNDEF
ffcb4889
NS		 10368 && bfd_is_und_section (sec)
10369 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10370 {
10371 if (!info->callbacks->undefined_symbol
10372 (info, bfd_elf_string_from_elf_section
10373 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10374 input_bfd, input_section,
10375 rel->r_offset, TRUE))
10376 return FALSE;
10377 }
b38cadfb 10378
4e7fd91e 10379 if (globals->use_rel)
f8df10f4 10380 {
4e7fd91e
PB		 10381 relocation = (sec->output_section->vma
10382 + sec->output_offset
10383 + sym->st_value);
ab96bf03
AM		 10384 if (!info->relocatable
10385 && (sec->flags & SEC_MERGE)
10386 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10387 {
4e7fd91e
PB		 10388 asection *msec;
10389 bfd_vma addend, value;
10390
39623e12 10391 switch (r_type)
4e7fd91e 10392 {
39623e12
PB		 10393 case R_ARM_MOVW_ABS_NC:
10394 case R_ARM_MOVT_ABS:
10395 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10396 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10397 addend = (addend ^ 0x8000) - 0x8000;
10398 break;
f8df10f4 10399
39623e12
PB		 10400 case R_ARM_THM_MOVW_ABS_NC:
10401 case R_ARM_THM_MOVT_ABS:
10402 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10403 << 16;
10404 value |= bfd_get_16 (input_bfd,
10405 contents + rel->r_offset + 2);
10406 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10407 | ((value & 0x04000000) >> 15);
10408 addend = (addend ^ 0x8000) - 0x8000;
10409 break;
f8df10f4 10410
39623e12
PB		 10411 default:
10412 if (howto->rightshift
10413 || (howto->src_mask & (howto->src_mask + 1)))
10414 {
10415 (*_bfd_error_handler)
10416 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10417 input_bfd, input_section,
10418 (long) rel->r_offset, howto->name);
10419 return FALSE;
10420 }
10421
10422 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10423
10424 /* Get the (signed) value from the instruction. */
10425 addend = value & howto->src_mask;
10426 if (addend & ((howto->src_mask + 1) >> 1))
10427 {
10428 bfd_signed_vma mask;
10429
10430 mask = -1;
10431 mask &= ~ howto->src_mask;
10432 addend |= mask;
10433 }
10434 break;
4e7fd91e 10435 }
39623e12 10436
4e7fd91e
PB		 10437 msec = sec;
10438 addend =
10439 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10440 - relocation;
10441 addend += msec->output_section->vma + msec->output_offset;
39623e12 10442
cc643b88 10443 /* Cases here must match those in the preceding
39623e12
PB		 10444 switch statement. */
10445 switch (r_type)
10446 {
10447 case R_ARM_MOVW_ABS_NC:
10448 case R_ARM_MOVT_ABS:
10449 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10450 | (addend & 0xfff);
10451 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10452 break;
10453
10454 case R_ARM_THM_MOVW_ABS_NC:
10455 case R_ARM_THM_MOVT_ABS:
10456 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10457 | (addend & 0xff) | ((addend & 0x0800) << 15);
10458 bfd_put_16 (input_bfd, value >> 16,
10459 contents + rel->r_offset);
10460 bfd_put_16 (input_bfd, value,
10461 contents + rel->r_offset + 2);
10462 break;
10463
10464 default:
10465 value = (value & ~ howto->dst_mask)
10466 | (addend & howto->dst_mask);
10467 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10468 break;
10469 }
f8df10f4 10470 }
f8df10f4 10471 }
4e7fd91e
PB		 10472 else
10473 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10474 }
10475 else
10476 {
560e09e9 10477 bfd_boolean warned;
560e09e9 10478
b2a8e766
AM		 10479 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10480 r_symndx, symtab_hdr, sym_hashes,
10481 h, sec, relocation,
10482 unresolved_reloc, warned);
ba93b8ac
DJ		 10483
10484 sym_type = h->type;
252b5132
RH		 10485 }
10486
dbaa2011 10487 if (sec != NULL && discarded_section (sec))
e4067dbb 10488 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10489 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10490
10491 if (info->relocatable)
10492 {
10493 /* This is a relocatable link. We don't have to change
10494 anything, unless the reloc is against a section symbol,
10495 in which case we have to adjust according to where the
10496 section symbol winds up in the output section. */
10497 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10498 {
10499 if (globals->use_rel)
10500 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10501 howto, (bfd_signed_vma) sec->output_offset);
10502 else
10503 rel->r_addend += sec->output_offset;
10504 }
10505 continue;
10506 }
10507
252b5132
RH		 10508 if (h != NULL)
10509 name = h->root.root.string;
10510 else
10511 {
10512 name = (bfd_elf_string_from_elf_section
10513 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10514 if (name == NULL || *name == '\0')
10515 name = bfd_section_name (input_bfd, sec);
10516 }
f21f3fe0 10517
cf35638d 10518 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10519 && r_type != R_ARM_NONE
10520 && (h == NULL
10521 || h->root.type == bfd_link_hash_defined
10522 || h->root.type == bfd_link_hash_defweak)
10523 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10524 {
10525 (*_bfd_error_handler)
10526 ((sym_type == STT_TLS
10527 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10528 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10529 input_bfd,
10530 input_section,
10531 (long) rel->r_offset,
10532 howto->name,
10533 name);
10534 }
10535
0855e32b
NS		 10536 /* We call elf32_arm_final_link_relocate unless we're completely
10537 done, i.e., the relaxation produced the final output we want,
10538 and we won't let anybody mess with it. Also, we have to do
10539 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10540 both in relaxed and non-relaxed cases */
10541 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10542 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10543 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10544 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10545 & GOT_TLS_GDESC)))
10546 {
10547 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10548 contents, rel, h == NULL);
10549 /* This may have been marked unresolved because it came from
10550 a shared library. But we've just dealt with that. */
10551 unresolved_reloc = 0;
10552 }
10553 else
10554 r = bfd_reloc_continue;
b38cadfb 10555
0855e32b
NS		 10556 if (r == bfd_reloc_continue)
10557 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10558 input_section, contents, rel,
34e77a92 10559 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10560 (h ? h->target_internal
10561 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10562 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10563
10564 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10565 because such sections are not SEC_ALLOC and thus ld.so will
10566 not process them. */
10567 if (unresolved_reloc
10568 && !((input_section->flags & SEC_DEBUGGING) != 0
1d5316ab
AM		 10569 && h->def_dynamic)
10570 && _bfd_elf_section_offset (output_bfd, info, input_section,
10571 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10572 {
10573 (*_bfd_error_handler)
843fe662
L		 10574 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10575 input_bfd,
10576 input_section,
10577 (long) rel->r_offset,
10578 howto->name,
10579 h->root.root.string);
0945cdfd
DJ		 10580 return FALSE;
10581 }
252b5132
RH		 10582
10583 if (r != bfd_reloc_ok)
10584 {
252b5132
RH		 10585 switch (r)
10586 {
10587 case bfd_reloc_overflow:
cf919dfd
PB		 10588 /* If the overflowing reloc was to an undefined symbol,
10589 we have already printed one error message and there
10590 is no point complaining again. */
10591 if ((! h ||
10592 h->root.type != bfd_link_hash_undefined)
10593 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10594 (info, (h ? &h->root : NULL), name, howto->name,
10595 (bfd_vma) 0, input_bfd, input_section,
10596 rel->r_offset))))
b34976b6 10597 return FALSE;
252b5132
RH		 10598 break;
10599
10600 case bfd_reloc_undefined:
10601 if (!((*info->callbacks->undefined_symbol)
10602 (info, name, input_bfd, input_section,
b34976b6
AM		 10603 rel->r_offset, TRUE)))
10604 return FALSE;
252b5132
RH		 10605 break;
10606
10607 case bfd_reloc_outofrange:
f2a9dd69 10608 error_message = _("out of range");
252b5132
RH		 10609 goto common_error;
10610
10611 case bfd_reloc_notsupported:
f2a9dd69 10612 error_message = _("unsupported relocation");
252b5132
RH		 10613 goto common_error;
10614
10615 case bfd_reloc_dangerous:
f2a9dd69 10616 /* error_message should already be set. */
252b5132
RH		 10617 goto common_error;
10618
10619 default:
f2a9dd69 10620 error_message = _("unknown error");
8029a119 10621 /* Fall through. */
252b5132
RH		 10622
10623 common_error:
f2a9dd69
DJ		 10624 BFD_ASSERT (error_message != NULL);
10625 if (!((*info->callbacks->reloc_dangerous)
10626 (info, error_message, input_bfd, input_section,
252b5132 10627 rel->r_offset)))
b34976b6 10628 return FALSE;
252b5132
RH		 10629 break;
10630 }
10631 }
10632 }
10633
b34976b6 10634 return TRUE;
252b5132
RH		 10635}
10636
91d6fa6a 10637/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10638 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10639 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10640 maintaining that condition). */
10641
10642static void
10643add_unwind_table_edit (arm_unwind_table_edit **head,
10644 arm_unwind_table_edit **tail,
10645 arm_unwind_edit_type type,
10646 asection *linked_section,
91d6fa6a 10647 unsigned int tindex)
2468f9c9 10648{
21d799b5
NC		 10649 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10650 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10651
2468f9c9
PB		 10652 new_edit->type = type;
10653 new_edit->linked_section = linked_section;
91d6fa6a 10654 new_edit->index = tindex;
b38cadfb 10655
91d6fa6a 10656 if (tindex > 0)
2468f9c9
PB		 10657 {
10658 new_edit->next = NULL;
10659
10660 if (*tail)
10661 (*tail)->next = new_edit;
10662
10663 (*tail) = new_edit;
10664
10665 if (!*head)
10666 (*head) = new_edit;
10667 }
10668 else
10669 {
10670 new_edit->next = *head;
10671
10672 if (!*tail)
10673 *tail = new_edit;
10674
10675 *head = new_edit;
10676 }
10677}
10678
10679static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10680
10681/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10682static void
10683adjust_exidx_size(asection *exidx_sec, int adjust)
10684{
10685 asection *out_sec;
10686
10687 if (!exidx_sec->rawsize)
10688 exidx_sec->rawsize = exidx_sec->size;
10689
10690 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10691 out_sec = exidx_sec->output_section;
10692 /* Adjust size of output section. */
10693 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10694}
10695
10696/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10697static void
10698insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10699{
10700 struct _arm_elf_section_data *exidx_arm_data;
10701
10702 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10703 add_unwind_table_edit (
10704 &exidx_arm_data->u.exidx.unwind_edit_list,
10705 &exidx_arm_data->u.exidx.unwind_edit_tail,
10706 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10707
10708 adjust_exidx_size(exidx_sec, 8);
10709}
10710
10711/* Scan .ARM.exidx tables, and create a list describing edits which should be
10712 made to those tables, such that:
b38cadfb 10713
2468f9c9
PB		 10714 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10715 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10716 codes which have been inlined into the index).
10717
85fdf906
AH		 10718 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10719
2468f9c9 10720 The edits are applied when the tables are written
b38cadfb 10721 (in elf32_arm_write_section). */
2468f9c9
PB		 10722
10723bfd_boolean
10724elf32_arm_fix_exidx_coverage (asection **text_section_order,
10725 unsigned int num_text_sections,
85fdf906
AH		 10726 struct bfd_link_info *info,
10727 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10728{
10729 bfd *inp;
10730 unsigned int last_second_word = 0, i;
10731 asection *last_exidx_sec = NULL;
10732 asection *last_text_sec = NULL;
10733 int last_unwind_type = -1;
10734
10735 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10736 text sections. */
10737 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10738 {
10739 asection *sec;
b38cadfb 10740
2468f9c9
PB		 10741 for (sec = inp->sections; sec != NULL; sec = sec->next)
10742 {
10743 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10744 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10745
dec9d5df 10746 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10747 continue;
b38cadfb 10748
2468f9c9
PB		 10749 if (elf_sec->linked_to)
10750 {
10751 Elf_Internal_Shdr *linked_hdr
10752 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10753 struct _arm_elf_section_data *linked_sec_arm_data
10754 = get_arm_elf_section_data (linked_hdr->bfd_section);
10755
10756 if (linked_sec_arm_data == NULL)
10757 continue;
10758
10759 /* Link this .ARM.exidx section back from the text section it
10760 describes. */
10761 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10762 }
10763 }
10764 }
10765
10766 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10767 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10768 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10769
10770 for (i = 0; i < num_text_sections; i++)
10771 {
10772 asection *sec = text_section_order[i];
10773 asection *exidx_sec;
10774 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10775 struct _arm_elf_section_data *exidx_arm_data;
10776 bfd_byte *contents = NULL;
10777 int deleted_exidx_bytes = 0;
10778 bfd_vma j;
10779 arm_unwind_table_edit *unwind_edit_head = NULL;
10780 arm_unwind_table_edit *unwind_edit_tail = NULL;
10781 Elf_Internal_Shdr *hdr;
10782 bfd *ibfd;
10783
10784 if (arm_data == NULL)
10785 continue;
10786
10787 exidx_sec = arm_data->u.text.arm_exidx_sec;
10788 if (exidx_sec == NULL)
10789 {
10790 /* Section has no unwind data. */
10791 if (last_unwind_type == 0 || !last_exidx_sec)
10792 continue;
10793
10794 /* Ignore zero sized sections. */
10795 if (sec->size == 0)
10796 continue;
10797
10798 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10799 last_unwind_type = 0;
10800 continue;
10801 }
10802
22a8f80e
PB		 10803 /* Skip /DISCARD/ sections. */
10804 if (bfd_is_abs_section (exidx_sec->output_section))
10805 continue;
10806
2468f9c9
PB		 10807 hdr = &elf_section_data (exidx_sec)->this_hdr;
10808 if (hdr->sh_type != SHT_ARM_EXIDX)
10809 continue;
b38cadfb 10810
2468f9c9
PB		 10811 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10812 if (exidx_arm_data == NULL)
10813 continue;
b38cadfb 10814
2468f9c9 10815 ibfd = exidx_sec->owner;
b38cadfb 10816
2468f9c9
PB		 10817 if (hdr->contents != NULL)
10818 contents = hdr->contents;
10819 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10820 /* An error? */
10821 continue;
10822
10823 for (j = 0; j < hdr->sh_size; j += 8)
10824 {
10825 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10826 int unwind_type;
10827 int elide = 0;
10828
10829 /* An EXIDX_CANTUNWIND entry. */
10830 if (second_word == 1)
10831 {
10832 if (last_unwind_type == 0)
10833 elide = 1;
10834 unwind_type = 0;
10835 }
10836 /* Inlined unwinding data. Merge if equal to previous. */
10837 else if ((second_word & 0x80000000) != 0)
10838 {
85fdf906
AH		 10839 if (merge_exidx_entries
10840 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10841 elide = 1;
10842 unwind_type = 1;
10843 last_second_word = second_word;
10844 }
10845 /* Normal table entry. In theory we could merge these too,
10846 but duplicate entries are likely to be much less common. */
10847 else
10848 unwind_type = 2;
10849
10850 if (elide)
10851 {
10852 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10853 DELETE_EXIDX_ENTRY, NULL, j / 8);
10854
10855 deleted_exidx_bytes += 8;
10856 }
10857
10858 last_unwind_type = unwind_type;
10859 }
10860
10861 /* Free contents if we allocated it ourselves. */
10862 if (contents != hdr->contents)
10863 free (contents);
10864
10865 /* Record edits to be applied later (in elf32_arm_write_section). */
10866 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10867 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 10868
2468f9c9
PB		 10869 if (deleted_exidx_bytes > 0)
10870 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10871
10872 last_exidx_sec = exidx_sec;
10873 last_text_sec = sec;
10874 }
10875
10876 /* Add terminating CANTUNWIND entry. */
10877 if (last_exidx_sec && last_unwind_type != 0)
10878 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10879
10880 return TRUE;
10881}
10882
3e6b1042
DJ		 10883static bfd_boolean
10884elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10885 bfd *ibfd, const char *name)
10886{
10887 asection *sec, *osec;
10888
3d4d4302 10889 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 10890 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10891 return TRUE;
10892
10893 osec = sec->output_section;
10894 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10895 return TRUE;
10896
10897 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10898 sec->output_offset, sec->size))
10899 return FALSE;
10900
10901 return TRUE;
10902}
10903
10904static bfd_boolean
10905elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10906{
10907 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10908 asection *sec, *osec;
3e6b1042 10909
4dfe6ac6
NC		 10910 if (globals == NULL)
10911 return FALSE;
10912
3e6b1042
DJ		 10913 /* Invoke the regular ELF backend linker to do all the work. */
10914 if (!bfd_elf_final_link (abfd, info))
10915 return FALSE;
10916
fe33d2fa
CL		 10917 /* Process stub sections (eg BE8 encoding, ...). */
10918 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10919 int i;
cdb21a0a
NS		 10920 for (i=0; i<htab->top_id; i++)
10921 {
10922 sec = htab->stub_group[i].stub_sec;
10923 /* Only process it once, in its link_sec slot. */
10924 if (sec && i == htab->stub_group[i].link_sec->id)
10925 {
10926 osec = sec->output_section;
10927 elf32_arm_write_section (abfd, info, sec, sec->contents);
10928 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10929 sec->output_offset, sec->size))
10930 return FALSE;
10931 }
fe33d2fa 10932 }
fe33d2fa 10933
3e6b1042
DJ		 10934 /* Write out any glue sections now that we have created all the
10935 stubs. */
10936 if (globals->bfd_of_glue_owner != NULL)
10937 {
10938 if (! elf32_arm_output_glue_section (info, abfd,
10939 globals->bfd_of_glue_owner,
10940 ARM2THUMB_GLUE_SECTION_NAME))
10941 return FALSE;
10942
10943 if (! elf32_arm_output_glue_section (info, abfd,
10944 globals->bfd_of_glue_owner,
10945 THUMB2ARM_GLUE_SECTION_NAME))
10946 return FALSE;
10947
10948 if (! elf32_arm_output_glue_section (info, abfd,
10949 globals->bfd_of_glue_owner,
10950 VFP11_ERRATUM_VENEER_SECTION_NAME))
10951 return FALSE;
10952
10953 if (! elf32_arm_output_glue_section (info, abfd,
10954 globals->bfd_of_glue_owner,
10955 ARM_BX_GLUE_SECTION_NAME))
10956 return FALSE;
10957 }
10958
10959 return TRUE;
10960}
10961
5968a7b8
NC		 10962/* Return a best guess for the machine number based on the attributes. */
10963
10964static unsigned int
10965bfd_arm_get_mach_from_attributes (bfd * abfd)
10966{
10967 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10968
10969 switch (arch)
10970 {
10971 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10972 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10973 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10974
10975 case TAG_CPU_ARCH_V5TE:
10976 {
10977 char * name;
10978
10979 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
10980 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
10981
10982 if (name)
10983 {
10984 if (strcmp (name, "IWMMXT2") == 0)
10985 return bfd_mach_arm_iWMMXt2;
10986
10987 if (strcmp (name, "IWMMXT") == 0)
6034aab8 10988 return bfd_mach_arm_iWMMXt;
5968a7b8
NC		 10989 }
10990
10991 return bfd_mach_arm_5TE;
10992 }
10993
10994 default:
10995 return bfd_mach_arm_unknown;
10996 }
10997}
10998
c178919b
NC		 10999/* Set the right machine number. */
11000
11001static bfd_boolean
57e8b36a 11002elf32_arm_object_p (bfd *abfd)
c178919b 11003{
5a6c6817 11004 unsigned int mach;
57e8b36a 11005
5a6c6817 11006 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11007
5968a7b8
NC		 11008 if (mach == bfd_mach_arm_unknown)
11009 {
11010 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11011 mach = bfd_mach_arm_ep9312;
11012 else
11013 mach = bfd_arm_get_mach_from_attributes (abfd);
11014 }
c178919b 11015
5968a7b8 11016 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11017 return TRUE;
11018}
11019
fc830a83 11020/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11021
b34976b6 11022static bfd_boolean
57e8b36a 11023elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11024{
11025 if (elf_flags_init (abfd)
11026 && elf_elfheader (abfd)->e_flags != flags)
11027 {
fc830a83
NC		 11028 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11029 {
fd2ec330 11030 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11031 (*_bfd_error_handler)
11032 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11033 abfd);
fc830a83 11034 else
d003868e
AM		 11035 _bfd_error_handler
11036 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11037 abfd);
fc830a83 11038 }
252b5132
RH		 11039 }
11040 else
11041 {
11042 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11043 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11044 }
11045
b34976b6 11046 return TRUE;
252b5132
RH		 11047}
11048
fc830a83 11049/* Copy backend specific data from one object module to another. */
9b485d32 11050
b34976b6 11051static bfd_boolean
57e8b36a 11052elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11053{
11054 flagword in_flags;
11055 flagword out_flags;
11056
0ffa91dd 11057 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11058 return TRUE;
252b5132 11059
fc830a83 11060 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11061 out_flags = elf_elfheader (obfd)->e_flags;
11062
fc830a83
NC		 11063 if (elf_flags_init (obfd)
11064 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11065 && in_flags != out_flags)
252b5132 11066 {
252b5132 11067 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11068 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11069 return FALSE;
252b5132
RH		 11070
11071 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11072 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11073 return FALSE;
252b5132
RH		 11074
11075 /* If the src and dest have different interworking flags
11076 then turn off the interworking bit. */
fd2ec330 11077 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11078 {
fd2ec330 11079 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11080 _bfd_error_handler
11081 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11082 obfd, ibfd);
252b5132 11083
fd2ec330 11084 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11085 }
1006ba19
PB		 11086
11087 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11088 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11089 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11090 }
11091
11092 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11093 elf_flags_init (obfd) = TRUE;
252b5132 11094
94a3258f
PB		 11095 /* Also copy the EI_OSABI field. */
11096 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11097 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11098
104d59d1
JM		 11099 /* Copy object attributes. */
11100 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 11101
11102 return TRUE;
11103}
11104
11105/* Values for Tag_ABI_PCS_R9_use. */
11106enum
11107{
11108 AEABI_R9_V6,
11109 AEABI_R9_SB,
11110 AEABI_R9_TLS,
11111 AEABI_R9_unused
11112};
11113
11114/* Values for Tag_ABI_PCS_RW_data. */
11115enum
11116{
11117 AEABI_PCS_RW_data_absolute,
11118 AEABI_PCS_RW_data_PCrel,
11119 AEABI_PCS_RW_data_SBrel,
11120 AEABI_PCS_RW_data_unused
11121};
11122
11123/* Values for Tag_ABI_enum_size. */
11124enum
11125{
11126 AEABI_enum_unused,
11127 AEABI_enum_short,
11128 AEABI_enum_wide,
11129 AEABI_enum_forced_wide
11130};
11131
104d59d1
JM		 11132/* Determine whether an object attribute tag takes an integer, a
11133 string or both. */
906e58ca 11134
104d59d1
JM		 11135static int
11136elf32_arm_obj_attrs_arg_type (int tag)
11137{
11138 if (tag == Tag_compatibility)
3483fe2e 11139 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11140 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11141 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11142 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11143 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11144 else if (tag < 32)
3483fe2e 11145 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11146 else
3483fe2e 11147 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11148}
11149
5aa6ff7c
AS		 11150/* The ABI defines that Tag_conformance should be emitted first, and that
11151 Tag_nodefaults should be second (if either is defined). This sets those
11152 two positions, and bumps up the position of all the remaining tags to
11153 compensate. */
11154static int
11155elf32_arm_obj_attrs_order (int num)
11156{
3de4a297 11157 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11158 return Tag_conformance;
3de4a297 11159 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11160 return Tag_nodefaults;
11161 if ((num - 2) < Tag_nodefaults)
11162 return num - 2;
11163 if ((num - 1) < Tag_conformance)
11164 return num - 1;
11165 return num;
11166}
11167
e8b36cd1
JM		 11168/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11169static bfd_boolean
11170elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11171{
11172 if ((tag & 127) < 64)
11173 {
11174 _bfd_error_handler
11175 (_("%B: Unknown mandatory EABI object attribute %d"),
11176 abfd, tag);
11177 bfd_set_error (bfd_error_bad_value);
11178 return FALSE;
11179 }
11180 else
11181 {
11182 _bfd_error_handler
11183 (_("Warning: %B: Unknown EABI object attribute %d"),
11184 abfd, tag);
11185 return TRUE;
11186 }
11187}
11188
91e22acd
AS		 11189/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11190 Returns -1 if no architecture could be read. */
11191
11192static int
11193get_secondary_compatible_arch (bfd *abfd)
11194{
11195 obj_attribute *attr =
11196 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11197
11198 /* Note: the tag and its argument below are uleb128 values, though
11199 currently-defined values fit in one byte for each. */
11200 if (attr->s
11201 && attr->s[0] == Tag_CPU_arch
11202 && (attr->s[1] & 128) != 128
11203 && attr->s[2] == 0)
11204 return attr->s[1];
11205
11206 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11207 return -1;
11208}
11209
11210/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11211 The tag is removed if ARCH is -1. */
11212
8e79c3df 11213static void
91e22acd 11214set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11215{
91e22acd
AS		 11216 obj_attribute *attr =
11217 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11218
91e22acd
AS		 11219 if (arch == -1)
11220 {
11221 attr->s = NULL;
11222 return;
8e79c3df 11223 }
91e22acd
AS		 11224
11225 /* Note: the tag and its argument below are uleb128 values, though
11226 currently-defined values fit in one byte for each. */
11227 if (!attr->s)
21d799b5 11228 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11229 attr->s[0] = Tag_CPU_arch;
11230 attr->s[1] = arch;
11231 attr->s[2] = '\0';
8e79c3df
CM		 11232}
11233
91e22acd
AS		 11234/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11235 into account. */
11236
11237static int
11238tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11239 int newtag, int secondary_compat)
8e79c3df 11240{
91e22acd
AS		 11241#define T(X) TAG_CPU_ARCH_##X
11242 int tagl, tagh, result;
11243 const int v6t2[] =
11244 {
11245 T(V6T2), /* PRE_V4. */
11246 T(V6T2), /* V4. */
11247 T(V6T2), /* V4T. */
11248 T(V6T2), /* V5T. */
11249 T(V6T2), /* V5TE. */
11250 T(V6T2), /* V5TEJ. */
11251 T(V6T2), /* V6. */
11252 T(V7), /* V6KZ. */
11253 T(V6T2) /* V6T2. */
11254 };
11255 const int v6k[] =
11256 {
11257 T(V6K), /* PRE_V4. */
11258 T(V6K), /* V4. */
11259 T(V6K), /* V4T. */
11260 T(V6K), /* V5T. */
11261 T(V6K), /* V5TE. */
11262 T(V6K), /* V5TEJ. */
11263 T(V6K), /* V6. */
11264 T(V6KZ), /* V6KZ. */
11265 T(V7), /* V6T2. */
11266 T(V6K) /* V6K. */
11267 };
11268 const int v7[] =
11269 {
11270 T(V7), /* PRE_V4. */
11271 T(V7), /* V4. */
11272 T(V7), /* V4T. */
11273 T(V7), /* V5T. */
11274 T(V7), /* V5TE. */
11275 T(V7), /* V5TEJ. */
11276 T(V7), /* V6. */
11277 T(V7), /* V6KZ. */
11278 T(V7), /* V6T2. */
11279 T(V7), /* V6K. */
11280 T(V7) /* V7. */
11281 };
11282 const int v6_m[] =
11283 {
11284 -1, /* PRE_V4. */
11285 -1, /* V4. */
11286 T(V6K), /* V4T. */
11287 T(V6K), /* V5T. */
11288 T(V6K), /* V5TE. */
11289 T(V6K), /* V5TEJ. */
11290 T(V6K), /* V6. */
11291 T(V6KZ), /* V6KZ. */
11292 T(V7), /* V6T2. */
11293 T(V6K), /* V6K. */
11294 T(V7), /* V7. */
11295 T(V6_M) /* V6_M. */
11296 };
11297 const int v6s_m[] =
11298 {
11299 -1, /* PRE_V4. */
11300 -1, /* V4. */
11301 T(V6K), /* V4T. */
11302 T(V6K), /* V5T. */
11303 T(V6K), /* V5TE. */
11304 T(V6K), /* V5TEJ. */
11305 T(V6K), /* V6. */
11306 T(V6KZ), /* V6KZ. */
11307 T(V7), /* V6T2. */
11308 T(V6K), /* V6K. */
11309 T(V7), /* V7. */
11310 T(V6S_M), /* V6_M. */
11311 T(V6S_M) /* V6S_M. */
11312 };
9e3c6df6
PB		 11313 const int v7e_m[] =
11314 {
11315 -1, /* PRE_V4. */
11316 -1, /* V4. */
11317 T(V7E_M), /* V4T. */
11318 T(V7E_M), /* V5T. */
11319 T(V7E_M), /* V5TE. */
11320 T(V7E_M), /* V5TEJ. */
11321 T(V7E_M), /* V6. */
11322 T(V7E_M), /* V6KZ. */
11323 T(V7E_M), /* V6T2. */
11324 T(V7E_M), /* V6K. */
11325 T(V7E_M), /* V7. */
11326 T(V7E_M), /* V6_M. */
11327 T(V7E_M), /* V6S_M. */
11328 T(V7E_M) /* V7E_M. */
11329 };
91e22acd
AS		 11330 const int v4t_plus_v6_m[] =
11331 {
11332 -1, /* PRE_V4. */
11333 -1, /* V4. */
11334 T(V4T), /* V4T. */
11335 T(V5T), /* V5T. */
11336 T(V5TE), /* V5TE. */
11337 T(V5TEJ), /* V5TEJ. */
11338 T(V6), /* V6. */
11339 T(V6KZ), /* V6KZ. */
11340 T(V6T2), /* V6T2. */
11341 T(V6K), /* V6K. */
11342 T(V7), /* V7. */
11343 T(V6_M), /* V6_M. */
11344 T(V6S_M), /* V6S_M. */
9e3c6df6 11345 T(V7E_M), /* V7E_M. */
91e22acd
AS		 11346 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11347 };
11348 const int *comb[] =
11349 {
11350 v6t2,
11351 v6k,
11352 v7,
11353 v6_m,
11354 v6s_m,
9e3c6df6 11355 v7e_m,
91e22acd
AS		 11356 /* Pseudo-architecture. */
11357 v4t_plus_v6_m
11358 };
11359
11360 /* Check we've not got a higher architecture than we know about. */
11361
9e3c6df6 11362 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11363 {
3895f852 11364 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11365 return -1;
11366 }
11367
11368 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11369
11370 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11371 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11372 oldtag = T(V4T_PLUS_V6_M);
11373
11374 /* And override the new tag if we have a Tag_also_compatible_with on the
11375 input. */
11376
11377 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11378 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11379 newtag = T(V4T_PLUS_V6_M);
11380
11381 tagl = (oldtag < newtag) ? oldtag : newtag;
11382 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11383
11384 /* Architectures before V6KZ add features monotonically. */
11385 if (tagh <= TAG_CPU_ARCH_V6KZ)
11386 return result;
11387
11388 result = comb[tagh - T(V6T2)][tagl];
11389
11390 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11391 as the canonical version. */
11392 if (result == T(V4T_PLUS_V6_M))
11393 {
11394 result = T(V4T);
11395 *secondary_compat_out = T(V6_M);
11396 }
11397 else
11398 *secondary_compat_out = -1;
11399
11400 if (result == -1)
11401 {
3895f852 11402 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11403 ibfd, oldtag, newtag);
11404 return -1;
11405 }
11406
11407 return result;
11408#undef T
8e79c3df
CM		 11409}
11410
ac56ee8f
MGD		 11411/* Query attributes object to see if integer divide instructions may be
11412 present in an object. */
11413static bfd_boolean
11414elf32_arm_attributes_accept_div (const obj_attribute *attr)
11415{
11416 int arch = attr[Tag_CPU_arch].i;
11417 int profile = attr[Tag_CPU_arch_profile].i;
11418
11419 switch (attr[Tag_DIV_use].i)
11420 {
11421 case 0:
11422 /* Integer divide allowed if instruction contained in archetecture. */
11423 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11424 return TRUE;
11425 else if (arch >= TAG_CPU_ARCH_V7E_M)
11426 return TRUE;
11427 else
11428 return FALSE;
11429
11430 case 1:
11431 /* Integer divide explicitly prohibited. */
11432 return FALSE;
11433
11434 default:
11435 /* Unrecognised case - treat as allowing divide everywhere. */
11436 case 2:
11437 /* Integer divide allowed in ARM state. */
11438 return TRUE;
11439 }
11440}
11441
11442/* Query attributes object to see if integer divide instructions are
11443 forbidden to be in the object. This is not the inverse of
11444 elf32_arm_attributes_accept_div. */
11445static bfd_boolean
11446elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11447{
11448 return attr[Tag_DIV_use].i == 1;
11449}
11450
ee065d83
PB		 11451/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11452 are conflicting attributes. */
906e58ca 11453
ee065d83
PB		 11454static bfd_boolean
11455elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11456{
104d59d1
JM		 11457 obj_attribute *in_attr;
11458 obj_attribute *out_attr;
ee065d83
PB		 11459 /* Some tags have 0 = don't care, 1 = strong requirement,
11460 2 = weak requirement. */
91e22acd 11461 static const int order_021[3] = {0, 2, 1};
ee065d83 11462 int i;
91e22acd 11463 bfd_boolean result = TRUE;
ee065d83 11464
3e6b1042
DJ		 11465 /* Skip the linker stubs file. This preserves previous behavior
11466 of accepting unknown attributes in the first input file - but
11467 is that a bug? */
11468 if (ibfd->flags & BFD_LINKER_CREATED)
11469 return TRUE;
11470
104d59d1 11471 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11472 {
11473 /* This is the first object. Copy the attributes. */
104d59d1 11474 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11475
cd21e546
MGD		 11476 out_attr = elf_known_obj_attributes_proc (obfd);
11477
004ae526
PB		 11478 /* Use the Tag_null value to indicate the attributes have been
11479 initialized. */
cd21e546 11480 out_attr[0].i = 1;
004ae526 11481
cd21e546
MGD		 11482 /* We do not output objects with Tag_MPextension_use_legacy - we move
11483 the attribute's value to Tag_MPextension_use. */
11484 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11485 {
11486 if (out_attr[Tag_MPextension_use].i != 0
11487 && out_attr[Tag_MPextension_use_legacy].i
11488 != out_attr[Tag_MPextension_use].i)
11489 {
11490 _bfd_error_handler
11491 (_("Error: %B has both the current and legacy "
11492 "Tag_MPextension_use attributes"), ibfd);
11493 result = FALSE;
11494 }
11495
11496 out_attr[Tag_MPextension_use] =
11497 out_attr[Tag_MPextension_use_legacy];
11498 out_attr[Tag_MPextension_use_legacy].type = 0;
11499 out_attr[Tag_MPextension_use_legacy].i = 0;
11500 }
11501
11502 return result;
ee065d83
PB		 11503 }
11504
104d59d1
JM		 11505 in_attr = elf_known_obj_attributes_proc (ibfd);
11506 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11507 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11508 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11509 {
8e79c3df 11510 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11511 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11512 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11513 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11514 {
11515 _bfd_error_handler
3895f852 11516 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11517 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11518 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11519 result = FALSE;
ee065d83
PB		 11520 }
11521 }
11522
3de4a297 11523 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11524 {
11525 /* Merge this attribute with existing attributes. */
11526 switch (i)
11527 {
11528 case Tag_CPU_raw_name:
11529 case Tag_CPU_name:
91e22acd 11530 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11531 break;
11532
11533 case Tag_ABI_optimization_goals:
11534 case Tag_ABI_FP_optimization_goals:
11535 /* Use the first value seen. */
11536 break;
11537
11538 case Tag_CPU_arch:
91e22acd
AS		 11539 {
11540 int secondary_compat = -1, secondary_compat_out = -1;
11541 unsigned int saved_out_attr = out_attr[i].i;
11542 static const char *name_table[] = {
11543 /* These aren't real CPU names, but we can't guess
11544 that from the architecture version alone. */
11545 "Pre v4",
11546 "ARM v4",
11547 "ARM v4T",
11548 "ARM v5T",
11549 "ARM v5TE",
11550 "ARM v5TEJ",
11551 "ARM v6",
11552 "ARM v6KZ",
11553 "ARM v6T2",
11554 "ARM v6K",
11555 "ARM v7",
11556 "ARM v6-M",
11557 "ARM v6S-M"
11558 };
11559
11560 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11561 secondary_compat = get_secondary_compatible_arch (ibfd);
11562 secondary_compat_out = get_secondary_compatible_arch (obfd);
11563 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11564 &secondary_compat_out,
11565 in_attr[i].i,
11566 secondary_compat);
11567 set_secondary_compatible_arch (obfd, secondary_compat_out);
11568
11569 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11570 if (out_attr[i].i == saved_out_attr)
11571 ; /* Leave the names alone. */
11572 else if (out_attr[i].i == in_attr[i].i)
11573 {
11574 /* The output architecture has been changed to match the
11575 input architecture. Use the input names. */
11576 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11577 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11578 : NULL;
11579 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11580 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11581 : NULL;
11582 }
11583 else
11584 {
11585 out_attr[Tag_CPU_name].s = NULL;
11586 out_attr[Tag_CPU_raw_name].s = NULL;
11587 }
11588
11589 /* If we still don't have a value for Tag_CPU_name,
11590 make one up now. Tag_CPU_raw_name remains blank. */
11591 if (out_attr[Tag_CPU_name].s == NULL
11592 && out_attr[i].i < ARRAY_SIZE (name_table))
11593 out_attr[Tag_CPU_name].s =
11594 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11595 }
11596 break;
11597
ee065d83
PB		 11598 case Tag_ARM_ISA_use:
11599 case Tag_THUMB_ISA_use:
ee065d83 11600 case Tag_WMMX_arch:
91e22acd
AS		 11601 case Tag_Advanced_SIMD_arch:
11602 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11603 case Tag_ABI_FP_rounding:
ee065d83
PB		 11604 case Tag_ABI_FP_exceptions:
11605 case Tag_ABI_FP_user_exceptions:
11606 case Tag_ABI_FP_number_model:
75375b3e 11607 case Tag_FP_HP_extension:
91e22acd
AS		 11608 case Tag_CPU_unaligned_access:
11609 case Tag_T2EE_use:
91e22acd 11610 case Tag_MPextension_use:
ee065d83
PB		 11611 /* Use the largest value specified. */
11612 if (in_attr[i].i > out_attr[i].i)
11613 out_attr[i].i = in_attr[i].i;
11614 break;
11615
75375b3e 11616 case Tag_ABI_align_preserved:
91e22acd
AS		 11617 case Tag_ABI_PCS_RO_data:
11618 /* Use the smallest value specified. */
11619 if (in_attr[i].i < out_attr[i].i)
11620 out_attr[i].i = in_attr[i].i;
11621 break;
11622
75375b3e 11623 case Tag_ABI_align_needed:
91e22acd 11624 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11625 && (in_attr[Tag_ABI_align_preserved].i == 0
11626 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11627 {
91e22acd
AS		 11628 /* This error message should be enabled once all non-conformant
11629 binaries in the toolchain have had the attributes set
11630 properly.
ee065d83 11631 _bfd_error_handler
3895f852 11632 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11633 obfd, ibfd);
11634 result = FALSE; */
ee065d83 11635 }
91e22acd
AS		 11636 /* Fall through. */
11637 case Tag_ABI_FP_denormal:
11638 case Tag_ABI_PCS_GOT_use:
11639 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11640 value if greater than 2 (for future-proofing). */
11641 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11642 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11643 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11644 out_attr[i].i = in_attr[i].i;
11645 break;
91e22acd 11646
75375b3e
MGD		 11647 case Tag_Virtualization_use:
11648 /* The virtualization tag effectively stores two bits of
11649 information: the intended use of TrustZone (in bit 0), and the
11650 intended use of Virtualization (in bit 1). */
11651 if (out_attr[i].i == 0)
11652 out_attr[i].i = in_attr[i].i;
11653 else if (in_attr[i].i != 0
11654 && in_attr[i].i != out_attr[i].i)
11655 {
11656 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11657 out_attr[i].i = 3;
11658 else
11659 {
11660 _bfd_error_handler
11661 (_("error: %B: unable to merge virtualization attributes "
11662 "with %B"),
11663 obfd, ibfd);
11664 result = FALSE;
11665 }
11666 }
11667 break;
91e22acd
AS		 11668
11669 case Tag_CPU_arch_profile:
11670 if (out_attr[i].i != in_attr[i].i)
11671 {
11672 /* 0 will merge with anything.
11673 'A' and 'S' merge to 'A'.
11674 'R' and 'S' merge to 'R'.
11675 'M' and 'A|R|S' is an error. */
11676 if (out_attr[i].i == 0
11677 || (out_attr[i].i == 'S'
11678 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11679 out_attr[i].i = in_attr[i].i;
11680 else if (in_attr[i].i == 0
11681 || (in_attr[i].i == 'S'
11682 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11683 ; /* Do nothing. */
11684 else
11685 {
11686 _bfd_error_handler
3895f852 11687 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11688 ibfd,
11689 in_attr[i].i ? in_attr[i].i : '0',
11690 out_attr[i].i ? out_attr[i].i : '0');
11691 result = FALSE;
11692 }
11693 }
11694 break;
75375b3e 11695 case Tag_FP_arch:
62f3b8c8 11696 {
4547cb56
NC		 11697 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11698 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11699 when it's 0. It might mean absence of FP hardware if
11700 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11701
62f3b8c8
PB		 11702 static const struct
11703 {
11704 int ver;
11705 int regs;
11706 } vfp_versions[7] =
11707 {
11708 {0, 0},
11709 {1, 16},
11710 {2, 16},
11711 {3, 32},
11712 {3, 16},
11713 {4, 32},
11714 {4, 16}
11715 };
11716 int ver;
11717 int regs;
11718 int newval;
11719
4547cb56
NC		 11720 /* If the output has no requirement about FP hardware,
11721 follow the requirement of the input. */
11722 if (out_attr[i].i == 0)
11723 {
11724 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11725 out_attr[i].i = in_attr[i].i;
11726 out_attr[Tag_ABI_HardFP_use].i
11727 = in_attr[Tag_ABI_HardFP_use].i;
11728 break;
11729 }
11730 /* If the input has no requirement about FP hardware, do
11731 nothing. */
11732 else if (in_attr[i].i == 0)
11733 {
11734 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11735 break;
11736 }
11737
11738 /* Both the input and the output have nonzero Tag_FP_arch.
11739 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11740
11741 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11742 do nothing. */
11743 if (in_attr[Tag_ABI_HardFP_use].i == 0
11744 && out_attr[Tag_ABI_HardFP_use].i == 0)
11745 ;
11746 /* If the input and the output have different Tag_ABI_HardFP_use,
11747 the combination of them is 3 (SP & DP). */
11748 else if (in_attr[Tag_ABI_HardFP_use].i
11749 != out_attr[Tag_ABI_HardFP_use].i)
11750 out_attr[Tag_ABI_HardFP_use].i = 3;
11751
11752 /* Now we can handle Tag_FP_arch. */
11753
62f3b8c8
PB		 11754 /* Values greater than 6 aren't defined, so just pick the
11755 biggest */
11756 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11757 {
11758 out_attr[i] = in_attr[i];
11759 break;
11760 }
11761 /* The output uses the superset of input features
11762 (ISA version) and registers. */
11763 ver = vfp_versions[in_attr[i].i].ver;
11764 if (ver < vfp_versions[out_attr[i].i].ver)
11765 ver = vfp_versions[out_attr[i].i].ver;
11766 regs = vfp_versions[in_attr[i].i].regs;
11767 if (regs < vfp_versions[out_attr[i].i].regs)
11768 regs = vfp_versions[out_attr[i].i].regs;
11769 /* This assumes all possible supersets are also a valid
11770 options. */
11771 for (newval = 6; newval > 0; newval--)
11772 {
11773 if (regs == vfp_versions[newval].regs
11774 && ver == vfp_versions[newval].ver)
11775 break;
11776 }
11777 out_attr[i].i = newval;
11778 }
b1cc4aeb 11779 break;
ee065d83
PB		 11780 case Tag_PCS_config:
11781 if (out_attr[i].i == 0)
11782 out_attr[i].i = in_attr[i].i;
b6009aca 11783 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11784 {
11785 /* It's sometimes ok to mix different configs, so this is only
11786 a warning. */
11787 _bfd_error_handler
11788 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11789 }
11790 break;
11791 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11792 if (in_attr[i].i != out_attr[i].i
11793 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11794 && in_attr[i].i != AEABI_R9_unused)
11795 {
11796 _bfd_error_handler
3895f852 11797 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11798 result = FALSE;
ee065d83
PB		 11799 }
11800 if (out_attr[i].i == AEABI_R9_unused)
11801 out_attr[i].i = in_attr[i].i;
11802 break;
11803 case Tag_ABI_PCS_RW_data:
11804 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11805 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11806 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11807 {
11808 _bfd_error_handler
3895f852 11809 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11810 ibfd);
91e22acd 11811 result = FALSE;
ee065d83
PB		 11812 }
11813 /* Use the smallest value specified. */
11814 if (in_attr[i].i < out_attr[i].i)
11815 out_attr[i].i = in_attr[i].i;
11816 break;
ee065d83 11817 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11818 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11819 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11820 {
11821 _bfd_error_handler
a9dc9481
JM		 11822 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11823 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11824 }
a9dc9481 11825 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11826 out_attr[i].i = in_attr[i].i;
11827 break;
ee065d83
PB		 11828 case Tag_ABI_enum_size:
11829 if (in_attr[i].i != AEABI_enum_unused)
11830 {
11831 if (out_attr[i].i == AEABI_enum_unused
11832 || out_attr[i].i == AEABI_enum_forced_wide)
11833 {
11834 /* The existing object is compatible with anything.
11835 Use whatever requirements the new object has. */
11836 out_attr[i].i = in_attr[i].i;
11837 }
11838 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11839 && out_attr[i].i != in_attr[i].i
0ffa91dd 11840 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11841 {
91e22acd 11842 static const char *aeabi_enum_names[] =
bf21ed78 11843 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11844 const char *in_name =
11845 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11846 ? aeabi_enum_names[in_attr[i].i]
11847 : "<unknown>";
11848 const char *out_name =
11849 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11850 ? aeabi_enum_names[out_attr[i].i]
11851 : "<unknown>";
ee065d83 11852 _bfd_error_handler
bf21ed78 11853 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11854 ibfd, in_name, out_name);
ee065d83
PB		 11855 }
11856 }
11857 break;
11858 case Tag_ABI_VFP_args:
11859 /* Aready done. */
11860 break;
11861 case Tag_ABI_WMMX_args:
11862 if (in_attr[i].i != out_attr[i].i)
11863 {
11864 _bfd_error_handler
3895f852 11865 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11866 ibfd, obfd);
91e22acd 11867 result = FALSE;
ee065d83
PB		 11868 }
11869 break;
7b86a9fa
AS		 11870 case Tag_compatibility:
11871 /* Merged in target-independent code. */
11872 break;
91e22acd 11873 case Tag_ABI_HardFP_use:
4547cb56 11874 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11875 break;
11876 case Tag_ABI_FP_16bit_format:
11877 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11878 {
11879 if (in_attr[i].i != out_attr[i].i)
11880 {
11881 _bfd_error_handler
3895f852 11882 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11883 ibfd, obfd);
11884 result = FALSE;
11885 }
11886 }
11887 if (in_attr[i].i != 0)
11888 out_attr[i].i = in_attr[i].i;
11889 break;
7b86a9fa 11890
cd21e546 11891 case Tag_DIV_use:
ac56ee8f
MGD		 11892 /* A value of zero on input means that the divide instruction may
11893 be used if available in the base architecture as specified via
11894 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11895 the user did not want divide instructions. A value of 2
11896 explicitly means that divide instructions were allowed in ARM
11897 and Thumb state. */
11898 if (in_attr[i].i == out_attr[i].i)
11899 /* Do nothing. */ ;
11900 else if (elf32_arm_attributes_forbid_div (in_attr)
11901 && !elf32_arm_attributes_accept_div (out_attr))
11902 out_attr[i].i = 1;
11903 else if (elf32_arm_attributes_forbid_div (out_attr)
11904 && elf32_arm_attributes_accept_div (in_attr))
11905 out_attr[i].i = in_attr[i].i;
11906 else if (in_attr[i].i == 2)
11907 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 11908 break;
11909
11910 case Tag_MPextension_use_legacy:
11911 /* We don't output objects with Tag_MPextension_use_legacy - we
11912 move the value to Tag_MPextension_use. */
11913 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11914 {
11915 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11916 {
11917 _bfd_error_handler
11918 (_("%B has has both the current and legacy "
b38cadfb 11919 "Tag_MPextension_use attributes"),
cd21e546
MGD		 11920 ibfd);
11921 result = FALSE;
11922 }
11923 }
11924
11925 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11926 out_attr[Tag_MPextension_use] = in_attr[i];
11927
11928 break;
11929
91e22acd 11930 case Tag_nodefaults:
2d0bb761
AS		 11931 /* This tag is set if it exists, but the value is unused (and is
11932 typically zero). We don't actually need to do anything here -
11933 the merge happens automatically when the type flags are merged
11934 below. */
91e22acd
AS		 11935 break;
11936 case Tag_also_compatible_with:
11937 /* Already done in Tag_CPU_arch. */
11938 break;
11939 case Tag_conformance:
11940 /* Keep the attribute if it matches. Throw it away otherwise.
11941 No attribute means no claim to conform. */
11942 if (!in_attr[i].s || !out_attr[i].s
11943 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11944 out_attr[i].s = NULL;
11945 break;
3cfad14c 11946
91e22acd 11947 default:
e8b36cd1
JM		 11948 result
11949 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11950 }
11951
11952 /* If out_attr was copied from in_attr then it won't have a type yet. */
11953 if (in_attr[i].type && !out_attr[i].type)
11954 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11955 }
11956
104d59d1 11957 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11958 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11959 return FALSE;
ee065d83 11960
104d59d1 11961 /* Check for any attributes not known on ARM. */
e8b36cd1 11962 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11963
91e22acd 11964 return result;
252b5132
RH		 11965}
11966
3a4a14e9
PB		 11967
11968/* Return TRUE if the two EABI versions are incompatible. */
11969
11970static bfd_boolean
11971elf32_arm_versions_compatible (unsigned iver, unsigned over)
11972{
11973 /* v4 and v5 are the same spec before and after it was released,
11974 so allow mixing them. */
11975 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11976 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11977 return TRUE;
11978
11979 return (iver == over);
11980}
11981
252b5132
RH		 11982/* Merge backend specific data from an object file to the output
11983 object file when linking. */
9b485d32 11984
b34976b6 11985static bfd_boolean
21d799b5 11986elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 11987
9b485d32
NC		 11988/* Display the flags field. */
11989
b34976b6 11990static bfd_boolean
57e8b36a 11991elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 11992{
fc830a83
NC		 11993 FILE * file = (FILE *) ptr;
11994 unsigned long flags;
252b5132
RH		 11995
11996 BFD_ASSERT (abfd != NULL && ptr != NULL);
11997
11998 /* Print normal ELF private data. */
11999 _bfd_elf_print_private_bfd_data (abfd, ptr);
12000
fc830a83 12001 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12002 /* Ignore init flag - it may not be set, despite the flags field
12003 containing valid data. */
252b5132
RH		 12004
12005 /* xgettext:c-format */
9b485d32 12006 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12007
fc830a83
NC		 12008 switch (EF_ARM_EABI_VERSION (flags))
12009 {
12010 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12011 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12012 official ARM ELF extended ABI. Hence they are only decoded if
12013 the EABI version is not set. */
fd2ec330 12014 if (flags & EF_ARM_INTERWORK)
9b485d32 12015 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12016
fd2ec330 12017 if (flags & EF_ARM_APCS_26)
6c571f00 12018 fprintf (file, " [APCS-26]");
fc830a83 12019 else
6c571f00 12020 fprintf (file, " [APCS-32]");
9a5aca8c 12021
96a846ea
RE		 12022 if (flags & EF_ARM_VFP_FLOAT)
12023 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12024 else if (flags & EF_ARM_MAVERICK_FLOAT)
12025 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12026 else
12027 fprintf (file, _(" [FPA float format]"));
12028
fd2ec330 12029 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12030 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12031
fd2ec330 12032 if (flags & EF_ARM_PIC)
9b485d32 12033 fprintf (file, _(" [position independent]"));
fc830a83 12034
fd2ec330 12035 if (flags & EF_ARM_NEW_ABI)
9b485d32 12036 fprintf (file, _(" [new ABI]"));
9a5aca8c 12037
fd2ec330 12038 if (flags & EF_ARM_OLD_ABI)
9b485d32 12039 fprintf (file, _(" [old ABI]"));
9a5aca8c 12040
fd2ec330 12041 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12042 fprintf (file, _(" [software FP]"));
9a5aca8c 12043
96a846ea
RE		 12044 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12045 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12046 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12047 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12048 break;
9a5aca8c 12049
fc830a83 12050 case EF_ARM_EABI_VER1:
9b485d32 12051 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12052
fc830a83 12053 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12054 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12055 else
9b485d32 12056 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12057
fc830a83
NC		 12058 flags &= ~ EF_ARM_SYMSARESORTED;
12059 break;
9a5aca8c 12060
fd2ec330
PB		 12061 case EF_ARM_EABI_VER2:
12062 fprintf (file, _(" [Version2 EABI]"));
12063
12064 if (flags & EF_ARM_SYMSARESORTED)
12065 fprintf (file, _(" [sorted symbol table]"));
12066 else
12067 fprintf (file, _(" [unsorted symbol table]"));
12068
12069 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12070 fprintf (file, _(" [dynamic symbols use segment index]"));
12071
12072 if (flags & EF_ARM_MAPSYMSFIRST)
12073 fprintf (file, _(" [mapping symbols precede others]"));
12074
99e4ae17 12075 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12076 | EF_ARM_MAPSYMSFIRST);
12077 break;
12078
d507cf36
PB		 12079 case EF_ARM_EABI_VER3:
12080 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12081 break;
12082
12083 case EF_ARM_EABI_VER4:
12084 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12085 goto eabi;
d507cf36 12086
3a4a14e9
PB		 12087 case EF_ARM_EABI_VER5:
12088 fprintf (file, _(" [Version5 EABI]"));
12089 eabi:
d507cf36
PB		 12090 if (flags & EF_ARM_BE8)
12091 fprintf (file, _(" [BE8]"));
12092
12093 if (flags & EF_ARM_LE8)
12094 fprintf (file, _(" [LE8]"));
12095
12096 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12097 break;
12098
fc830a83 12099 default:
9b485d32 12100 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12101 break;
12102 }
252b5132 12103
fc830a83 12104 flags &= ~ EF_ARM_EABIMASK;
252b5132 12105
fc830a83 12106 if (flags & EF_ARM_RELEXEC)
9b485d32 12107 fprintf (file, _(" [relocatable executable]"));
252b5132 12108
fc830a83 12109 if (flags & EF_ARM_HASENTRY)
9b485d32 12110 fprintf (file, _(" [has entry point]"));
252b5132 12111
fc830a83
NC		 12112 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12113
12114 if (flags)
9b485d32 12115 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12116
252b5132
RH		 12117 fputc ('\n', file);
12118
b34976b6 12119 return TRUE;
252b5132
RH		 12120}
12121
12122static int
57e8b36a 12123elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12124{
2f0ca46a
NC		 12125 switch (ELF_ST_TYPE (elf_sym->st_info))
12126 {
12127 case STT_ARM_TFUNC:
12128 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12129
2f0ca46a
NC		 12130 case STT_ARM_16BIT:
12131 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12132 This allows us to distinguish between data used by Thumb instructions
12133 and non-data (which is probably code) inside Thumb regions of an
12134 executable. */
1a0eb693 12135 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12136 return ELF_ST_TYPE (elf_sym->st_info);
12137 break;
9a5aca8c 12138
ce855c42
NC		 12139 default:
12140 break;
2f0ca46a
NC		 12141 }
12142
12143 return type;
252b5132 12144}
f21f3fe0 12145
252b5132 12146static asection *
07adf181
AM		 12147elf32_arm_gc_mark_hook (asection *sec,
12148 struct bfd_link_info *info,
12149 Elf_Internal_Rela *rel,
12150 struct elf_link_hash_entry *h,
12151 Elf_Internal_Sym *sym)
252b5132
RH		 12152{
12153 if (h != NULL)
07adf181 12154 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12155 {
12156 case R_ARM_GNU_VTINHERIT:
12157 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12158 return NULL;
12159 }
9ad5cbcf 12160
07adf181 12161 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12162}
12163
780a67af
NC		 12164/* Update the got entry reference counts for the section being removed. */
12165
b34976b6 12166static bfd_boolean
ba93b8ac
DJ		 12167elf32_arm_gc_sweep_hook (bfd * abfd,
12168 struct bfd_link_info * info,
12169 asection * sec,
12170 const Elf_Internal_Rela * relocs)
252b5132 12171{
5e681ec4
PB		 12172 Elf_Internal_Shdr *symtab_hdr;
12173 struct elf_link_hash_entry **sym_hashes;
12174 bfd_signed_vma *local_got_refcounts;
12175 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12176 struct elf32_arm_link_hash_table * globals;
12177
7dda2462
TG		 12178 if (info->relocatable)
12179 return TRUE;
12180
eb043451 12181 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12182 if (globals == NULL)
12183 return FALSE;
5e681ec4
PB		 12184
12185 elf_section_data (sec)->local_dynrel = NULL;
12186
0ffa91dd 12187 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12188 sym_hashes = elf_sym_hashes (abfd);
12189 local_got_refcounts = elf_local_got_refcounts (abfd);
12190
906e58ca 12191 check_use_blx (globals);
bd97cb95 12192
5e681ec4
PB		 12193 relend = relocs + sec->reloc_count;
12194 for (rel = relocs; rel < relend; rel++)
eb043451 12195 {
3eb128b2
AM		 12196 unsigned long r_symndx;
12197 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12198 struct elf32_arm_link_hash_entry *eh;
eb043451 12199 int r_type;
34e77a92 12200 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12201 bfd_boolean may_become_dynamic_p;
12202 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12203 union gotplt_union *root_plt;
12204 struct arm_plt_info *arm_plt;
5e681ec4 12205
3eb128b2
AM		 12206 r_symndx = ELF32_R_SYM (rel->r_info);
12207 if (r_symndx >= symtab_hdr->sh_info)
12208 {
12209 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12210 while (h->root.type == bfd_link_hash_indirect
12211 || h->root.type == bfd_link_hash_warning)
12212 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12213 }
f6e32f6d
RS		 12214 eh = (struct elf32_arm_link_hash_entry *) h;
12215
34e77a92 12216 call_reloc_p = FALSE;
f6e32f6d
RS		 12217 may_become_dynamic_p = FALSE;
12218 may_need_local_target_p = FALSE;
3eb128b2 12219
eb043451 12220 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12221 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12222 switch (r_type)
12223 {
12224 case R_ARM_GOT32:
eb043451 12225 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12226 case R_ARM_TLS_GD32:
12227 case R_ARM_TLS_IE32:
3eb128b2 12228 if (h != NULL)
eb043451 12229 {
eb043451
PB		 12230 if (h->got.refcount > 0)
12231 h->got.refcount -= 1;
12232 }
12233 else if (local_got_refcounts != NULL)
12234 {
12235 if (local_got_refcounts[r_symndx] > 0)
12236 local_got_refcounts[r_symndx] -= 1;
12237 }
12238 break;
12239
ba93b8ac 12240 case R_ARM_TLS_LDM32:
4dfe6ac6 12241 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12242 break;
12243
eb043451
PB		 12244 case R_ARM_PC24:
12245 case R_ARM_PLT32:
5b5bb741
PB		 12246 case R_ARM_CALL:
12247 case R_ARM_JUMP24:
eb043451 12248 case R_ARM_PREL31:
c19d1205 12249 case R_ARM_THM_CALL:
bd97cb95
DJ		 12250 case R_ARM_THM_JUMP24:
12251 case R_ARM_THM_JUMP19:
34e77a92 12252 call_reloc_p = TRUE;
f6e32f6d
RS		 12253 may_need_local_target_p = TRUE;
12254 break;
12255
12256 case R_ARM_ABS12:
12257 if (!globals->vxworks_p)
12258 {
12259 may_need_local_target_p = TRUE;
12260 break;
12261 }
12262 /* Fall through. */
12263 case R_ARM_ABS32:
12264 case R_ARM_ABS32_NOI:
12265 case R_ARM_REL32:
12266 case R_ARM_REL32_NOI:
b6895b4f
PB		 12267 case R_ARM_MOVW_ABS_NC:
12268 case R_ARM_MOVT_ABS:
12269 case R_ARM_MOVW_PREL_NC:
12270 case R_ARM_MOVT_PREL:
12271 case R_ARM_THM_MOVW_ABS_NC:
12272 case R_ARM_THM_MOVT_ABS:
12273 case R_ARM_THM_MOVW_PREL_NC:
12274 case R_ARM_THM_MOVT_PREL:
b7693d02 12275 /* Should the interworking branches be here also? */
f6e32f6d 12276 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12277 && (sec->flags & SEC_ALLOC) != 0)
12278 {
12279 if (h == NULL
12280 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12281 {
12282 call_reloc_p = TRUE;
12283 may_need_local_target_p = TRUE;
12284 }
12285 else
12286 may_become_dynamic_p = TRUE;
12287 }
f6e32f6d
RS		 12288 else
12289 may_need_local_target_p = TRUE;
12290 break;
b7693d02 12291
f6e32f6d
RS		 12292 default:
12293 break;
12294 }
5e681ec4 12295
34e77a92
RS		 12296 if (may_need_local_target_p
12297 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12298 {
27586251
HPN		 12299 /* If PLT refcount book-keeping is wrong and too low, we'll
12300 see a zero value (going to -1) for the root PLT reference
12301 count. */
12302 if (root_plt->refcount >= 0)
12303 {
12304 BFD_ASSERT (root_plt->refcount != 0);
12305 root_plt->refcount -= 1;
12306 }
12307 else
12308 /* A value of -1 means the symbol has become local, forced
12309 or seeing a hidden definition. Any other negative value
12310 is an error. */
12311 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12312
12313 if (!call_reloc_p)
12314 arm_plt->noncall_refcount--;
5e681ec4 12315
f6e32f6d 12316 if (r_type == R_ARM_THM_CALL)
34e77a92 12317 arm_plt->maybe_thumb_refcount--;
bd97cb95 12318
f6e32f6d
RS		 12319 if (r_type == R_ARM_THM_JUMP24
12320 || r_type == R_ARM_THM_JUMP19)
34e77a92 12321 arm_plt->thumb_refcount--;
f6e32f6d 12322 }
5e681ec4 12323
34e77a92 12324 if (may_become_dynamic_p)
f6e32f6d
RS		 12325 {
12326 struct elf_dyn_relocs **pp;
12327 struct elf_dyn_relocs *p;
5e681ec4 12328
34e77a92 12329 if (h != NULL)
9c489990 12330 pp = &(eh->dyn_relocs);
34e77a92
RS		 12331 else
12332 {
12333 Elf_Internal_Sym *isym;
12334
12335 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12336 abfd, r_symndx);
12337 if (isym == NULL)
12338 return FALSE;
12339 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12340 if (pp == NULL)
12341 return FALSE;
12342 }
9c489990 12343 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12344 if (p->sec == sec)
12345 {
12346 /* Everything must go for SEC. */
12347 *pp = p->next;
12348 break;
12349 }
eb043451
PB		 12350 }
12351 }
5e681ec4 12352
b34976b6 12353 return TRUE;
252b5132
RH		 12354}
12355
780a67af
NC		 12356/* Look through the relocs for a section during the first phase. */
12357
b34976b6 12358static bfd_boolean
57e8b36a
NC		 12359elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12360 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12361{
b34976b6
AM		 12362 Elf_Internal_Shdr *symtab_hdr;
12363 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12364 const Elf_Internal_Rela *rel;
12365 const Elf_Internal_Rela *rel_end;
12366 bfd *dynobj;
5e681ec4 12367 asection *sreloc;
5e681ec4 12368 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12369 bfd_boolean call_reloc_p;
12370 bfd_boolean may_become_dynamic_p;
12371 bfd_boolean may_need_local_target_p;
ce98a316 12372 unsigned long nsyms;
9a5aca8c 12373
1049f94e 12374 if (info->relocatable)
b34976b6 12375 return TRUE;
9a5aca8c 12376
0ffa91dd
NC		 12377 BFD_ASSERT (is_arm_elf (abfd));
12378
5e681ec4 12379 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12380 if (htab == NULL)
12381 return FALSE;
12382
5e681ec4 12383 sreloc = NULL;
9a5aca8c 12384
67687978
PB		 12385 /* Create dynamic sections for relocatable executables so that we can
12386 copy relocations. */
12387 if (htab->root.is_relocatable_executable
12388 && ! htab->root.dynamic_sections_created)
12389 {
12390 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12391 return FALSE;
12392 }
12393
cbc704f3
RS		 12394 if (htab->root.dynobj == NULL)
12395 htab->root.dynobj = abfd;
34e77a92
RS		 12396 if (!create_ifunc_sections (info))
12397 return FALSE;
cbc704f3
RS		 12398
12399 dynobj = htab->root.dynobj;
12400
0ffa91dd 12401 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12402 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12403 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12404
252b5132
RH		 12405 rel_end = relocs + sec->reloc_count;
12406 for (rel = relocs; rel < rel_end; rel++)
12407 {
34e77a92 12408 Elf_Internal_Sym *isym;
252b5132 12409 struct elf_link_hash_entry *h;
b7693d02 12410 struct elf32_arm_link_hash_entry *eh;
252b5132 12411 unsigned long r_symndx;
eb043451 12412 int r_type;
9a5aca8c 12413
252b5132 12414 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12415 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12416 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12417
ce98a316
NC		 12418 if (r_symndx >= nsyms
12419 /* PR 9934: It is possible to have relocations that do not
12420 refer to symbols, thus it is also possible to have an
12421 object file containing relocations but no symbol table. */
cf35638d 12422 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12423 {
12424 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12425 r_symndx);
ba93b8ac
DJ		 12426 return FALSE;
12427 }
12428
34e77a92
RS		 12429 h = NULL;
12430 isym = NULL;
12431 if (nsyms > 0)
973a3492 12432 {
34e77a92
RS		 12433 if (r_symndx < symtab_hdr->sh_info)
12434 {
12435 /* A local symbol. */
12436 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12437 abfd, r_symndx);
12438 if (isym == NULL)
12439 return FALSE;
12440 }
12441 else
12442 {
12443 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12444 while (h->root.type == bfd_link_hash_indirect
12445 || h->root.type == bfd_link_hash_warning)
12446 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12447 }
973a3492 12448 }
9a5aca8c 12449
b7693d02
DJ		 12450 eh = (struct elf32_arm_link_hash_entry *) h;
12451
f6e32f6d
RS		 12452 call_reloc_p = FALSE;
12453 may_become_dynamic_p = FALSE;
12454 may_need_local_target_p = FALSE;
12455
0855e32b
NS		 12456 /* Could be done earlier, if h were already available. */
12457 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12458 switch (r_type)
252b5132 12459 {
5e681ec4 12460 case R_ARM_GOT32:
eb043451 12461 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12462 case R_ARM_TLS_GD32:
12463 case R_ARM_TLS_IE32:
0855e32b
NS		 12464 case R_ARM_TLS_GOTDESC:
12465 case R_ARM_TLS_DESCSEQ:
12466 case R_ARM_THM_TLS_DESCSEQ:
12467 case R_ARM_TLS_CALL:
12468 case R_ARM_THM_TLS_CALL:
5e681ec4 12469 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12470 {
12471 int tls_type, old_tls_type;
5e681ec4 12472
ba93b8ac
DJ		 12473 switch (r_type)
12474 {
12475 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12476
ba93b8ac 12477 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12478
0855e32b
NS		 12479 case R_ARM_TLS_GOTDESC:
12480 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12481 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12482 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12483
ba93b8ac
DJ		 12484 default: tls_type = GOT_NORMAL; break;
12485 }
252b5132 12486
ba93b8ac
DJ		 12487 if (h != NULL)
12488 {
12489 h->got.refcount++;
12490 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12491 }
12492 else
12493 {
ba93b8ac 12494 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12495 if (!elf32_arm_allocate_local_sym_info (abfd))
12496 return FALSE;
12497 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12498 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12499 }
12500
0855e32b
NS		 12501 /* If a variable is accessed with both tls methods, two
12502 slots may be created. */
12503 if (GOT_TLS_GD_ANY_P (old_tls_type)
12504 && GOT_TLS_GD_ANY_P (tls_type))
12505 tls_type |= old_tls_type;
12506
12507 /* We will already have issued an error message if there
12508 is a TLS/non-TLS mismatch, based on the symbol
12509 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12510 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12511 && tls_type != GOT_NORMAL)
12512 tls_type |= old_tls_type;
12513
0855e32b
NS		 12514 /* If the symbol is accessed in both IE and GDESC
12515 method, we're able to relax. Turn off the GDESC flag,
12516 without messing up with any other kind of tls types
12517 that may be involved */
12518 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12519 tls_type &= ~GOT_TLS_GDESC;
12520
ba93b8ac
DJ		 12521 if (old_tls_type != tls_type)
12522 {
12523 if (h != NULL)
12524 elf32_arm_hash_entry (h)->tls_type = tls_type;
12525 else
12526 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12527 }
12528 }
8029a119 12529 /* Fall through. */
ba93b8ac
DJ		 12530
12531 case R_ARM_TLS_LDM32:
12532 if (r_type == R_ARM_TLS_LDM32)
12533 htab->tls_ldm_got.refcount++;
8029a119 12534 /* Fall through. */
252b5132 12535
c19d1205 12536 case R_ARM_GOTOFF32:
5e681ec4 12537 case R_ARM_GOTPC:
cbc704f3
RS		 12538 if (htab->root.sgot == NULL
12539 && !create_got_section (htab->root.dynobj, info))
12540 return FALSE;
252b5132
RH		 12541 break;
12542
252b5132 12543 case R_ARM_PC24:
7359ea65 12544 case R_ARM_PLT32:
5b5bb741
PB		 12545 case R_ARM_CALL:
12546 case R_ARM_JUMP24:
eb043451 12547 case R_ARM_PREL31:
c19d1205 12548 case R_ARM_THM_CALL:
bd97cb95
DJ		 12549 case R_ARM_THM_JUMP24:
12550 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12551 call_reloc_p = TRUE;
12552 may_need_local_target_p = TRUE;
12553 break;
12554
12555 case R_ARM_ABS12:
12556 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12557 ldr __GOTT_INDEX__ offsets. */
12558 if (!htab->vxworks_p)
12559 {
12560 may_need_local_target_p = TRUE;
12561 break;
12562 }
12563 /* Fall through. */
39623e12 12564
96c23d59
JM		 12565 case R_ARM_MOVW_ABS_NC:
12566 case R_ARM_MOVT_ABS:
12567 case R_ARM_THM_MOVW_ABS_NC:
12568 case R_ARM_THM_MOVT_ABS:
12569 if (info->shared)
12570 {
12571 (*_bfd_error_handler)
12572 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12573 abfd, elf32_arm_howto_table_1[r_type].name,
12574 (h) ? h->root.root.string : "a local symbol");
12575 bfd_set_error (bfd_error_bad_value);
12576 return FALSE;
12577 }
12578
12579 /* Fall through. */
39623e12
PB		 12580 case R_ARM_ABS32:
12581 case R_ARM_ABS32_NOI:
12582 case R_ARM_REL32:
12583 case R_ARM_REL32_NOI:
b6895b4f
PB		 12584 case R_ARM_MOVW_PREL_NC:
12585 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12586 case R_ARM_THM_MOVW_PREL_NC:
12587 case R_ARM_THM_MOVT_PREL:
39623e12 12588
b7693d02 12589 /* Should the interworking branches be listed here? */
67687978 12590 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12591 && (sec->flags & SEC_ALLOC) != 0)
12592 {
12593 if (h == NULL
12594 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12595 {
12596 /* In shared libraries and relocatable executables,
12597 we treat local relative references as calls;
12598 see the related SYMBOL_CALLS_LOCAL code in
12599 allocate_dynrelocs. */
12600 call_reloc_p = TRUE;
12601 may_need_local_target_p = TRUE;
12602 }
12603 else
12604 /* We are creating a shared library or relocatable
12605 executable, and this is a reloc against a global symbol,
12606 or a non-PC-relative reloc against a local symbol.
12607 We may need to copy the reloc into the output. */
12608 may_become_dynamic_p = TRUE;
12609 }
f6e32f6d
RS		 12610 else
12611 may_need_local_target_p = TRUE;
252b5132
RH		 12612 break;
12613
12614 /* This relocation describes the C++ object vtable hierarchy.
12615 Reconstruct it for later use during GC. */
12616 case R_ARM_GNU_VTINHERIT:
c152c796 12617 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 12618 return FALSE;
252b5132 12619 break;
9a5aca8c 12620
252b5132
RH		 12621 /* This relocation describes which C++ vtable entries are actually
12622 used. Record for later use during GC. */
12623 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 12624 BFD_ASSERT (h != NULL);
12625 if (h != NULL
12626 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 12627 return FALSE;
252b5132
RH		 12628 break;
12629 }
f6e32f6d
RS		 12630
12631 if (h != NULL)
12632 {
12633 if (call_reloc_p)
12634 /* We may need a .plt entry if the function this reloc
12635 refers to is in a different object, regardless of the
12636 symbol's type. We can't tell for sure yet, because
12637 something later might force the symbol local. */
12638 h->needs_plt = 1;
12639 else if (may_need_local_target_p)
12640 /* If this reloc is in a read-only section, we might
12641 need a copy reloc. We can't check reliably at this
12642 stage whether the section is read-only, as input
12643 sections have not yet been mapped to output sections.
12644 Tentatively set the flag for now, and correct in
12645 adjust_dynamic_symbol. */
12646 h->non_got_ref = 1;
12647 }
12648
34e77a92
RS		 12649 if (may_need_local_target_p
12650 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12651 {
34e77a92
RS		 12652 union gotplt_union *root_plt;
12653 struct arm_plt_info *arm_plt;
12654 struct arm_local_iplt_info *local_iplt;
12655
12656 if (h != NULL)
12657 {
12658 root_plt = &h->plt;
12659 arm_plt = &eh->plt;
12660 }
12661 else
12662 {
12663 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12664 if (local_iplt == NULL)
12665 return FALSE;
12666 root_plt = &local_iplt->root;
12667 arm_plt = &local_iplt->arm;
12668 }
12669
f6e32f6d
RS		 12670 /* If the symbol is a function that doesn't bind locally,
12671 this relocation will need a PLT entry. */
34e77a92
RS		 12672 root_plt->refcount += 1;
12673
12674 if (!call_reloc_p)
12675 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12676
12677 /* It's too early to use htab->use_blx here, so we have to
12678 record possible blx references separately from
12679 relocs that definitely need a thumb stub. */
12680
12681 if (r_type == R_ARM_THM_CALL)
34e77a92 12682 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12683
12684 if (r_type == R_ARM_THM_JUMP24
12685 || r_type == R_ARM_THM_JUMP19)
34e77a92 12686 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12687 }
12688
12689 if (may_become_dynamic_p)
12690 {
12691 struct elf_dyn_relocs *p, **head;
12692
12693 /* Create a reloc section in dynobj. */
12694 if (sreloc == NULL)
12695 {
12696 sreloc = _bfd_elf_make_dynamic_reloc_section
12697 (sec, dynobj, 2, abfd, ! htab->use_rel);
12698
12699 if (sreloc == NULL)
12700 return FALSE;
12701
12702 /* BPABI objects never have dynamic relocations mapped. */
12703 if (htab->symbian_p)
12704 {
12705 flagword flags;
12706
12707 flags = bfd_get_section_flags (dynobj, sreloc);
12708 flags &= ~(SEC_LOAD | SEC_ALLOC);
12709 bfd_set_section_flags (dynobj, sreloc, flags);
12710 }
12711 }
12712
12713 /* If this is a global symbol, count the number of
12714 relocations we need for this symbol. */
12715 if (h != NULL)
12716 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12717 else
12718 {
34e77a92
RS		 12719 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12720 if (head == NULL)
f6e32f6d 12721 return FALSE;
f6e32f6d
RS		 12722 }
12723
12724 p = *head;
12725 if (p == NULL || p->sec != sec)
12726 {
12727 bfd_size_type amt = sizeof *p;
12728
12729 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12730 if (p == NULL)
12731 return FALSE;
12732 p->next = *head;
12733 *head = p;
12734 p->sec = sec;
12735 p->count = 0;
12736 p->pc_count = 0;
12737 }
12738
12739 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12740 p->pc_count += 1;
12741 p->count += 1;
12742 }
252b5132 12743 }
f21f3fe0 12744
b34976b6 12745 return TRUE;
252b5132
RH		 12746}
12747
6a5bb875
PB		 12748/* Unwinding tables are not referenced directly. This pass marks them as
12749 required if the corresponding code section is marked. */
12750
12751static bfd_boolean
906e58ca
NC		 12752elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12753 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12754{
12755 bfd *sub;
12756 Elf_Internal_Shdr **elf_shdrp;
12757 bfd_boolean again;
12758
7f6ab9f8
AM		 12759 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12760
6a5bb875
PB		 12761 /* Marking EH data may cause additional code sections to be marked,
12762 requiring multiple passes. */
12763 again = TRUE;
12764 while (again)
12765 {
12766 again = FALSE;
12767 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12768 {
12769 asection *o;
12770
0ffa91dd 12771 if (! is_arm_elf (sub))
6a5bb875
PB		 12772 continue;
12773
12774 elf_shdrp = elf_elfsections (sub);
12775 for (o = sub->sections; o != NULL; o = o->next)
12776 {
12777 Elf_Internal_Shdr *hdr;
0ffa91dd 12778
6a5bb875 12779 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12780 if (hdr->sh_type == SHT_ARM_EXIDX
12781 && hdr->sh_link
12782 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12783 && !o->gc_mark
12784 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12785 {
12786 again = TRUE;
12787 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12788 return FALSE;
12789 }
12790 }
12791 }
12792 }
12793
12794 return TRUE;
12795}
12796
3c9458e9
NC		 12797/* Treat mapping symbols as special target symbols. */
12798
12799static bfd_boolean
12800elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12801{
b0796911
PB		 12802 return bfd_is_arm_special_symbol_name (sym->name,
12803 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12804}
12805
0367ecfb
NC		 12806/* This is a copy of elf_find_function() from elf.c except that
12807 ARM mapping symbols are ignored when looking for function names
12808 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12809
0367ecfb
NC		 12810static bfd_boolean
12811arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12812 asection * section,
12813 asymbol ** symbols,
12814 bfd_vma offset,
12815 const char ** filename_ptr,
12816 const char ** functionname_ptr)
12817{
12818 const char * filename = NULL;
12819 asymbol * func = NULL;
12820 bfd_vma low_func = 0;
12821 asymbol ** p;
252b5132
RH		 12822
12823 for (p = symbols; *p != NULL; p++)
12824 {
12825 elf_symbol_type *q;
12826
12827 q = (elf_symbol_type *) *p;
12828
252b5132
RH		 12829 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12830 {
12831 default:
12832 break;
12833 case STT_FILE:
12834 filename = bfd_asymbol_name (&q->symbol);
12835 break;
252b5132
RH		 12836 case STT_FUNC:
12837 case STT_ARM_TFUNC:
9d2da7ca 12838 case STT_NOTYPE:
b0796911 12839 /* Skip mapping symbols. */
0367ecfb 12840 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12841 && bfd_is_arm_special_symbol_name (q->symbol.name,
12842 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12843 continue;
12844 /* Fall through. */
6b40fcba 12845 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12846 && q->symbol.value >= low_func
12847 && q->symbol.value <= offset)
12848 {
12849 func = (asymbol *) q;
12850 low_func = q->symbol.value;
12851 }
12852 break;
12853 }
12854 }
12855
12856 if (func == NULL)
b34976b6 12857 return FALSE;
252b5132 12858
0367ecfb
NC		 12859 if (filename_ptr)
12860 *filename_ptr = filename;
12861 if (functionname_ptr)
12862 *functionname_ptr = bfd_asymbol_name (func);
12863
12864 return TRUE;
906e58ca 12865}
0367ecfb
NC		 12866
12867
12868/* Find the nearest line to a particular section and offset, for error
12869 reporting. This code is a duplicate of the code in elf.c, except
12870 that it uses arm_elf_find_function. */
12871
12872static bfd_boolean
12873elf32_arm_find_nearest_line (bfd * abfd,
12874 asection * section,
12875 asymbol ** symbols,
12876 bfd_vma offset,
12877 const char ** filename_ptr,
12878 const char ** functionname_ptr,
12879 unsigned int * line_ptr)
12880{
12881 bfd_boolean found = FALSE;
12882
12883 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12884
fc28f9aa
TG		 12885 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12886 section, symbols, offset,
0367ecfb
NC		 12887 filename_ptr, functionname_ptr,
12888 line_ptr, 0,
12889 & elf_tdata (abfd)->dwarf2_find_line_info))
12890 {
12891 if (!*functionname_ptr)
12892 arm_elf_find_function (abfd, section, symbols, offset,
12893 *filename_ptr ? NULL : filename_ptr,
12894 functionname_ptr);
f21f3fe0 12895
0367ecfb
NC		 12896 return TRUE;
12897 }
12898
12899 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12900 & found, filename_ptr,
12901 functionname_ptr, line_ptr,
12902 & elf_tdata (abfd)->line_info))
12903 return FALSE;
12904
12905 if (found && (*functionname_ptr || *line_ptr))
12906 return TRUE;
12907
12908 if (symbols == NULL)
12909 return FALSE;
12910
12911 if (! arm_elf_find_function (abfd, section, symbols, offset,
12912 filename_ptr, functionname_ptr))
12913 return FALSE;
12914
12915 *line_ptr = 0;
b34976b6 12916 return TRUE;
252b5132
RH		 12917}
12918
4ab527b0
FF		 12919static bfd_boolean
12920elf32_arm_find_inliner_info (bfd * abfd,
12921 const char ** filename_ptr,
12922 const char ** functionname_ptr,
12923 unsigned int * line_ptr)
12924{
12925 bfd_boolean found;
12926 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12927 functionname_ptr, line_ptr,
12928 & elf_tdata (abfd)->dwarf2_find_line_info);
12929 return found;
12930}
12931
252b5132
RH		 12932/* Adjust a symbol defined by a dynamic object and referenced by a
12933 regular object. The current definition is in some section of the
12934 dynamic object, but we're not including those sections. We have to
12935 change the definition to something the rest of the link can
12936 understand. */
12937
b34976b6 12938static bfd_boolean
57e8b36a
NC		 12939elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12940 struct elf_link_hash_entry * h)
252b5132
RH		 12941{
12942 bfd * dynobj;
12943 asection * s;
b7693d02 12944 struct elf32_arm_link_hash_entry * eh;
67687978 12945 struct elf32_arm_link_hash_table *globals;
252b5132 12946
67687978 12947 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12948 if (globals == NULL)
12949 return FALSE;
12950
252b5132
RH		 12951 dynobj = elf_hash_table (info)->dynobj;
12952
12953 /* Make sure we know what is going on here. */
12954 BFD_ASSERT (dynobj != NULL
f5385ebf 12955 && (h->needs_plt
34e77a92 12956 || h->type == STT_GNU_IFUNC
f6e332e6 12957 || h->u.weakdef != NULL
f5385ebf
AM		 12958 || (h->def_dynamic
12959 && h->ref_regular
12960 && !h->def_regular)));
252b5132 12961
b7693d02
DJ		 12962 eh = (struct elf32_arm_link_hash_entry *) h;
12963
252b5132
RH		 12964 /* If this is a function, put it in the procedure linkage table. We
12965 will fill in the contents of the procedure linkage table later,
12966 when we know the address of the .got section. */
34e77a92 12967 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 12968 {
34e77a92
RS		 12969 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12970 symbol binds locally. */
5e681ec4 12971 if (h->plt.refcount <= 0
34e77a92
RS		 12972 || (h->type != STT_GNU_IFUNC
12973 && (SYMBOL_CALLS_LOCAL (info, h)
12974 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12975 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 12976 {
12977 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 12978 file, but the symbol was never referred to by a dynamic
12979 object, or if all references were garbage collected. In
12980 such a case, we don't actually need to build a procedure
12981 linkage table, and we can just do a PC24 reloc instead. */
12982 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12983 eh->plt.thumb_refcount = 0;
12984 eh->plt.maybe_thumb_refcount = 0;
12985 eh->plt.noncall_refcount = 0;
f5385ebf 12986 h->needs_plt = 0;
252b5132
RH		 12987 }
12988
b34976b6 12989 return TRUE;
252b5132 12990 }
5e681ec4 12991 else
b7693d02
DJ		 12992 {
12993 /* It's possible that we incorrectly decided a .plt reloc was
12994 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12995 in check_relocs. We can't decide accurately between function
12996 and non-function syms in check-relocs; Objects loaded later in
12997 the link may change h->type. So fix it now. */
12998 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12999 eh->plt.thumb_refcount = 0;
13000 eh->plt.maybe_thumb_refcount = 0;
13001 eh->plt.noncall_refcount = 0;
b7693d02 13002 }
252b5132
RH		 13003
13004 /* If this is a weak symbol, and there is a real definition, the
13005 processor independent code will have arranged for us to see the
13006 real definition first, and we can just use the same value. */
f6e332e6 13007 if (h->u.weakdef != NULL)
252b5132 13008 {
f6e332e6
AM		 13009 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13010 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13011 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13012 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13013 return TRUE;
252b5132
RH		 13014 }
13015
ba93b8ac
DJ		 13016 /* If there are no non-GOT references, we do not need a copy
13017 relocation. */
13018 if (!h->non_got_ref)
13019 return TRUE;
13020
252b5132
RH		 13021 /* This is a reference to a symbol defined by a dynamic object which
13022 is not a function. */
13023
13024 /* If we are creating a shared library, we must presume that the
13025 only references to the symbol are via the global offset table.
13026 For such cases we need not do anything here; the relocations will
67687978
PB		 13027 be handled correctly by relocate_section. Relocatable executables
13028 can reference data in shared objects directly, so we don't need to
13029 do anything here. */
13030 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13031 return TRUE;
252b5132
RH		 13032
13033 /* We must allocate the symbol in our .dynbss section, which will
13034 become part of the .bss section of the executable. There will be
13035 an entry for this symbol in the .dynsym section. The dynamic
13036 object will contain position independent code, so all references
13037 from the dynamic object to this symbol will go through the global
13038 offset table. The dynamic linker will use the .dynsym entry to
13039 determine the address it must put in the global offset table, so
13040 both the dynamic object and the regular object will refer to the
13041 same memory location for the variable. */
3d4d4302 13042 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13043 BFD_ASSERT (s != NULL);
13044
13045 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13046 copy the initial value out of the dynamic object and into the
13047 runtime process image. We need to remember the offset into the
00a97672 13048 .rel(a).bss section we are going to use. */
1d7e9d18 13049 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13050 {
13051 asection *srel;
13052
3d4d4302 13053 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13054 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13055 h->needs_copy = 1;
252b5132
RH		 13056 }
13057
027297b7 13058 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13059}
13060
5e681ec4
PB		 13061/* Allocate space in .plt, .got and associated reloc sections for
13062 dynamic relocs. */
13063
13064static bfd_boolean
47beaa6a 13065allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13066{
13067 struct bfd_link_info *info;
13068 struct elf32_arm_link_hash_table *htab;
13069 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13070 struct elf_dyn_relocs *p;
5e681ec4
PB		 13071
13072 if (h->root.type == bfd_link_hash_indirect)
13073 return TRUE;
13074
e6a6bb22
AM		 13075 eh = (struct elf32_arm_link_hash_entry *) h;
13076
5e681ec4
PB		 13077 info = (struct bfd_link_info *) inf;
13078 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13079 if (htab == NULL)
13080 return FALSE;
5e681ec4 13081
34e77a92 13082 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13083 && h->plt.refcount > 0)
13084 {
13085 /* Make sure this symbol is output as a dynamic symbol.
13086 Undefined weak syms won't yet be marked as dynamic. */
13087 if (h->dynindx == -1
f5385ebf 13088 && !h->forced_local)
5e681ec4 13089 {
c152c796 13090 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13091 return FALSE;
13092 }
13093
34e77a92
RS		 13094 /* If the call in the PLT entry binds locally, the associated
13095 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13096 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13097 than the .plt section. */
13098 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13099 {
13100 eh->is_iplt = 1;
13101 if (eh->plt.noncall_refcount == 0
13102 && SYMBOL_REFERENCES_LOCAL (info, h))
13103 /* All non-call references can be resolved directly.
13104 This means that they can (and in some cases, must)
13105 resolve directly to the run-time target, rather than
13106 to the PLT. That in turns means that any .got entry
13107 would be equal to the .igot.plt entry, so there's
13108 no point having both. */
13109 h->got.refcount = 0;
13110 }
13111
5e681ec4 13112 if (info->shared
34e77a92 13113 || eh->is_iplt
7359ea65 13114 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13115 {
34e77a92 13116 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13117
5e681ec4
PB		 13118 /* If this symbol is not defined in a regular file, and we are
13119 not generating a shared library, then set the symbol to this
13120 location in the .plt. This is required to make function
13121 pointers compare as equal between the normal executable and
13122 the shared library. */
13123 if (! info->shared
f5385ebf 13124 && !h->def_regular)
5e681ec4 13125 {
34e77a92 13126 h->root.u.def.section = htab->root.splt;
5e681ec4 13127 h->root.u.def.value = h->plt.offset;
5e681ec4 13128
67d74e43
DJ		 13129 /* Make sure the function is not marked as Thumb, in case
13130 it is the target of an ABS32 relocation, which will
13131 point to the PLT entry. */
35fc36a8 13132 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13133 }
022f8312 13134
0855e32b 13135 htab->next_tls_desc_index++;
00a97672
RS		 13136
13137 /* VxWorks executables have a second set of relocations for
13138 each PLT entry. They go in a separate relocation section,
13139 which is processed by the kernel loader. */
13140 if (htab->vxworks_p && !info->shared)
13141 {
13142 /* There is a relocation for the initial PLT entry:
13143 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13144 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13145 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13146
13147 /* There are two extra relocations for each subsequent
13148 PLT entry: an R_ARM_32 relocation for the GOT entry,
13149 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13150 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13151 }
5e681ec4
PB		 13152 }
13153 else
13154 {
13155 h->plt.offset = (bfd_vma) -1;
f5385ebf 13156 h->needs_plt = 0;
5e681ec4
PB		 13157 }
13158 }
13159 else
13160 {
13161 h->plt.offset = (bfd_vma) -1;
f5385ebf 13162 h->needs_plt = 0;
5e681ec4
PB		 13163 }
13164
0855e32b
NS		 13165 eh = (struct elf32_arm_link_hash_entry *) h;
13166 eh->tlsdesc_got = (bfd_vma) -1;
13167
5e681ec4
PB		 13168 if (h->got.refcount > 0)
13169 {
13170 asection *s;
13171 bfd_boolean dyn;
ba93b8ac
DJ		 13172 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13173 int indx;
5e681ec4
PB		 13174
13175 /* Make sure this symbol is output as a dynamic symbol.
13176 Undefined weak syms won't yet be marked as dynamic. */
13177 if (h->dynindx == -1
f5385ebf 13178 && !h->forced_local)
5e681ec4 13179 {
c152c796 13180 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13181 return FALSE;
13182 }
13183
e5a52504
MM		 13184 if (!htab->symbian_p)
13185 {
362d30a1 13186 s = htab->root.sgot;
e5a52504 13187 h->got.offset = s->size;
ba93b8ac
DJ		 13188
13189 if (tls_type == GOT_UNKNOWN)
13190 abort ();
13191
13192 if (tls_type == GOT_NORMAL)
13193 /* Non-TLS symbols need one GOT slot. */
13194 s->size += 4;
13195 else
13196 {
0855e32b
NS		 13197 if (tls_type & GOT_TLS_GDESC)
13198 {
13199 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13200 eh->tlsdesc_got
13201 = (htab->root.sgotplt->size
13202 - elf32_arm_compute_jump_table_size (htab));
13203 htab->root.sgotplt->size += 8;
13204 h->got.offset = (bfd_vma) -2;
34e77a92 13205 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13206 reloc in the middle of .got.plt. */
13207 htab->num_tls_desc++;
13208 }
13209
ba93b8ac 13210 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13211 {
13212 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13213 the symbol is both GD and GDESC, got.offset may
13214 have been overwritten. */
13215 h->got.offset = s->size;
13216 s->size += 8;
13217 }
13218
ba93b8ac
DJ		 13219 if (tls_type & GOT_TLS_IE)
13220 /* R_ARM_TLS_IE32 needs one GOT slot. */
13221 s->size += 4;
13222 }
13223
e5a52504 13224 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13225
13226 indx = 0;
13227 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13228 && (!info->shared
13229 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13230 indx = h->dynindx;
13231
13232 if (tls_type != GOT_NORMAL
13233 && (info->shared || indx != 0)
13234 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13235 || h->root.type != bfd_link_hash_undefweak))
13236 {
13237 if (tls_type & GOT_TLS_IE)
47beaa6a 13238 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13239
13240 if (tls_type & GOT_TLS_GD)
47beaa6a 13241 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13242
b38cadfb 13243 if (tls_type & GOT_TLS_GDESC)
0855e32b 13244 {
47beaa6a 13245 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13246 /* GDESC needs a trampoline to jump to. */
13247 htab->tls_trampoline = -1;
13248 }
13249
13250 /* Only GD needs it. GDESC just emits one relocation per
13251 2 entries. */
b38cadfb 13252 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13253 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13254 }
b436d854
RS		 13255 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13256 {
13257 if (htab->root.dynamic_sections_created)
13258 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13259 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13260 }
34e77a92
RS		 13261 else if (h->type == STT_GNU_IFUNC
13262 && eh->plt.noncall_refcount == 0)
13263 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13264 they all resolve dynamically instead. Reserve room for the
13265 GOT entry's R_ARM_IRELATIVE relocation. */
13266 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
b436d854
RS		 13267 else if (info->shared)
13268 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13269 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13270 }
5e681ec4
PB		 13271 }
13272 else
13273 h->got.offset = (bfd_vma) -1;
13274
a4fd1a8e
PB		 13275 /* Allocate stubs for exported Thumb functions on v4t. */
13276 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13277 && h->def_regular
35fc36a8 13278 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13279 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13280 {
13281 struct elf_link_hash_entry * th;
13282 struct bfd_link_hash_entry * bh;
13283 struct elf_link_hash_entry * myh;
13284 char name[1024];
13285 asection *s;
13286 bh = NULL;
13287 /* Create a new symbol to regist the real location of the function. */
13288 s = h->root.u.def.section;
906e58ca 13289 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13290 _bfd_generic_link_add_one_symbol (info, s->owner,
13291 name, BSF_GLOBAL, s,
13292 h->root.u.def.value,
13293 NULL, TRUE, FALSE, &bh);
13294
13295 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13296 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13297 myh->forced_local = 1;
35fc36a8 13298 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13299 eh->export_glue = myh;
13300 th = record_arm_to_thumb_glue (info, h);
13301 /* Point the symbol at the stub. */
13302 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13303 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13304 h->root.u.def.section = th->root.u.def.section;
13305 h->root.u.def.value = th->root.u.def.value & ~1;
13306 }
13307
0bdcacaf 13308 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13309 return TRUE;
13310
13311 /* In the shared -Bsymbolic case, discard space allocated for
13312 dynamic pc-relative relocs against symbols which turn out to be
13313 defined in regular objects. For the normal shared case, discard
13314 space for pc-relative relocs that have become local due to symbol
13315 visibility changes. */
13316
67687978 13317 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13318 {
7bdca076 13319 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 13320 R_ARM_REL32_NOI, which will appear on something like
13321 ".long foo - .". We want calls to protected symbols to resolve
13322 directly to the function rather than going via the plt. If people
13323 want function pointer comparisons to work as expected then they
13324 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13325 if (SYMBOL_CALLS_LOCAL (info, h))
13326 {
0bdcacaf 13327 struct elf_dyn_relocs **pp;
ba93b8ac 13328
0bdcacaf 13329 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13330 {
13331 p->count -= p->pc_count;
13332 p->pc_count = 0;
13333 if (p->count == 0)
13334 *pp = p->next;
13335 else
13336 pp = &p->next;
13337 }
13338 }
13339
4dfe6ac6 13340 if (htab->vxworks_p)
3348747a 13341 {
0bdcacaf 13342 struct elf_dyn_relocs **pp;
3348747a 13343
0bdcacaf 13344 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13345 {
0bdcacaf 13346 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13347 *pp = p->next;
13348 else
13349 pp = &p->next;
13350 }
13351 }
13352
ba93b8ac 13353 /* Also discard relocs on undefined weak syms with non-default
7359ea65 13354 visibility. */
0bdcacaf 13355 if (eh->dyn_relocs != NULL
5e681ec4 13356 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13357 {
13358 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13359 eh->dyn_relocs = NULL;
22d606e9
AM		 13360
13361 /* Make sure undefined weak symbols are output as a dynamic
13362 symbol in PIEs. */
13363 else if (h->dynindx == -1
13364 && !h->forced_local)
13365 {
13366 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13367 return FALSE;
13368 }
13369 }
13370
67687978
PB		 13371 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13372 && h->root.type == bfd_link_hash_new)
13373 {
13374 /* Output absolute symbols so that we can create relocations
13375 against them. For normal symbols we output a relocation
13376 against the section that contains them. */
13377 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13378 return FALSE;
13379 }
13380
5e681ec4
PB		 13381 }
13382 else
13383 {
13384 /* For the non-shared case, discard space for relocs against
13385 symbols which turn out to need copy relocs or are not
13386 dynamic. */
13387
f5385ebf
AM		 13388 if (!h->non_got_ref
13389 && ((h->def_dynamic
13390 && !h->def_regular)
5e681ec4
PB		 13391 || (htab->root.dynamic_sections_created
13392 && (h->root.type == bfd_link_hash_undefweak
13393 || h->root.type == bfd_link_hash_undefined))))
13394 {
13395 /* Make sure this symbol is output as a dynamic symbol.
13396 Undefined weak syms won't yet be marked as dynamic. */
13397 if (h->dynindx == -1
f5385ebf 13398 && !h->forced_local)
5e681ec4 13399 {
c152c796 13400 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13401 return FALSE;
13402 }
13403
13404 /* If that succeeded, we know we'll be keeping all the
13405 relocs. */
13406 if (h->dynindx != -1)
13407 goto keep;
13408 }
13409
0bdcacaf 13410 eh->dyn_relocs = NULL;
5e681ec4
PB		 13411
13412 keep: ;
13413 }
13414
13415 /* Finally, allocate space. */
0bdcacaf 13416 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13417 {
0bdcacaf 13418 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13419 if (h->type == STT_GNU_IFUNC
13420 && eh->plt.noncall_refcount == 0
13421 && SYMBOL_REFERENCES_LOCAL (info, h))
13422 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13423 else
13424 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13425 }
13426
13427 return TRUE;
13428}
13429
08d1f311
DJ		 13430/* Find any dynamic relocs that apply to read-only sections. */
13431
13432static bfd_boolean
8029a119 13433elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13434{
8029a119 13435 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13436 struct elf_dyn_relocs * p;
08d1f311 13437
08d1f311 13438 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13439 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13440 {
0bdcacaf 13441 asection *s = p->sec;
08d1f311
DJ		 13442
13443 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13444 {
13445 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13446
13447 info->flags |= DF_TEXTREL;
13448
13449 /* Not an error, just cut short the traversal. */
13450 return FALSE;
13451 }
13452 }
13453 return TRUE;
13454}
13455
d504ffc8
DJ		 13456void
13457bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13458 int byteswap_code)
13459{
13460 struct elf32_arm_link_hash_table *globals;
13461
13462 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13463 if (globals == NULL)
13464 return;
13465
d504ffc8
DJ		 13466 globals->byteswap_code = byteswap_code;
13467}
13468
252b5132
RH		 13469/* Set the sizes of the dynamic sections. */
13470
b34976b6 13471static bfd_boolean
57e8b36a
NC		 13472elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13473 struct bfd_link_info * info)
252b5132
RH		 13474{
13475 bfd * dynobj;
13476 asection * s;
b34976b6
AM		 13477 bfd_boolean plt;
13478 bfd_boolean relocs;
5e681ec4
PB		 13479 bfd *ibfd;
13480 struct elf32_arm_link_hash_table *htab;
252b5132 13481
5e681ec4 13482 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13483 if (htab == NULL)
13484 return FALSE;
13485
252b5132
RH		 13486 dynobj = elf_hash_table (info)->dynobj;
13487 BFD_ASSERT (dynobj != NULL);
39b41c9c 13488 check_use_blx (htab);
252b5132
RH		 13489
13490 if (elf_hash_table (info)->dynamic_sections_created)
13491 {
13492 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13493 if (info->executable)
252b5132 13494 {
3d4d4302 13495 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13496 BFD_ASSERT (s != NULL);
eea6121a 13497 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13498 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13499 }
13500 }
5e681ec4
PB		 13501
13502 /* Set up .got offsets for local syms, and space for local dynamic
13503 relocs. */
13504 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13505 {
5e681ec4
PB		 13506 bfd_signed_vma *local_got;
13507 bfd_signed_vma *end_local_got;
34e77a92 13508 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13509 char *local_tls_type;
0855e32b 13510 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13511 bfd_size_type locsymcount;
13512 Elf_Internal_Shdr *symtab_hdr;
13513 asection *srel;
4dfe6ac6 13514 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13515 unsigned int symndx;
5e681ec4 13516
0ffa91dd 13517 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13518 continue;
13519
13520 for (s = ibfd->sections; s != NULL; s = s->next)
13521 {
0bdcacaf 13522 struct elf_dyn_relocs *p;
5e681ec4 13523
0bdcacaf 13524 for (p = (struct elf_dyn_relocs *)
21d799b5 13525 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13526 {
0bdcacaf
RS		 13527 if (!bfd_is_abs_section (p->sec)
13528 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13529 {
13530 /* Input section has been discarded, either because
13531 it is a copy of a linkonce section or due to
13532 linker script /DISCARD/, so we'll be discarding
13533 the relocs too. */
13534 }
3348747a 13535 else if (is_vxworks
0bdcacaf 13536 && strcmp (p->sec->output_section->name,
3348747a
NS		 13537 ".tls_vars") == 0)
13538 {
13539 /* Relocations in vxworks .tls_vars sections are
13540 handled specially by the loader. */
13541 }
5e681ec4
PB		 13542 else if (p->count != 0)
13543 {
0bdcacaf 13544 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13545 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13546 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13547 info->flags |= DF_TEXTREL;
13548 }
13549 }
13550 }
13551
13552 local_got = elf_local_got_refcounts (ibfd);
13553 if (!local_got)
13554 continue;
13555
0ffa91dd 13556 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13557 locsymcount = symtab_hdr->sh_info;
13558 end_local_got = local_got + locsymcount;
34e77a92 13559 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13560 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13561 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13562 symndx = 0;
362d30a1
RS		 13563 s = htab->root.sgot;
13564 srel = htab->root.srelgot;
0855e32b 13565 for (; local_got < end_local_got;
34e77a92
RS		 13566 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13567 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13568 {
0855e32b 13569 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13570 local_iplt = *local_iplt_ptr;
13571 if (local_iplt != NULL)
13572 {
13573 struct elf_dyn_relocs *p;
13574
13575 if (local_iplt->root.refcount > 0)
13576 {
13577 elf32_arm_allocate_plt_entry (info, TRUE,
13578 &local_iplt->root,
13579 &local_iplt->arm);
13580 if (local_iplt->arm.noncall_refcount == 0)
13581 /* All references to the PLT are calls, so all
13582 non-call references can resolve directly to the
13583 run-time target. This means that the .got entry
13584 would be the same as the .igot.plt entry, so there's
13585 no point creating both. */
13586 *local_got = 0;
13587 }
13588 else
13589 {
13590 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13591 local_iplt->root.offset = (bfd_vma) -1;
13592 }
13593
13594 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13595 {
13596 asection *psrel;
13597
13598 psrel = elf_section_data (p->sec)->sreloc;
13599 if (local_iplt->arm.noncall_refcount == 0)
13600 elf32_arm_allocate_irelocs (info, psrel, p->count);
13601 else
13602 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13603 }
13604 }
5e681ec4
PB		 13605 if (*local_got > 0)
13606 {
34e77a92
RS		 13607 Elf_Internal_Sym *isym;
13608
eea6121a 13609 *local_got = s->size;
ba93b8ac
DJ		 13610 if (*local_tls_type & GOT_TLS_GD)
13611 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13612 s->size += 8;
0855e32b
NS		 13613 if (*local_tls_type & GOT_TLS_GDESC)
13614 {
13615 *local_tlsdesc_gotent = htab->root.sgotplt->size
13616 - elf32_arm_compute_jump_table_size (htab);
13617 htab->root.sgotplt->size += 8;
13618 *local_got = (bfd_vma) -2;
34e77a92 13619 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13620 reloc in the middle of .got.plt. */
13621 htab->num_tls_desc++;
13622 }
ba93b8ac
DJ		 13623 if (*local_tls_type & GOT_TLS_IE)
13624 s->size += 4;
ba93b8ac 13625
0855e32b
NS		 13626 if (*local_tls_type & GOT_NORMAL)
13627 {
13628 /* If the symbol is both GD and GDESC, *local_got
13629 may have been overwritten. */
13630 *local_got = s->size;
13631 s->size += 4;
13632 }
13633
34e77a92
RS		 13634 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13635 if (isym == NULL)
13636 return FALSE;
13637
13638 /* If all references to an STT_GNU_IFUNC PLT are calls,
13639 then all non-call references, including this GOT entry,
13640 resolve directly to the run-time target. */
13641 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13642 && (local_iplt == NULL
13643 || local_iplt->arm.noncall_refcount == 0))
13644 elf32_arm_allocate_irelocs (info, srel, 1);
13645 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13646 || *local_tls_type & GOT_TLS_GD)
47beaa6a 13647 elf32_arm_allocate_dynrelocs (info, srel, 1);
0855e32b
NS		 13648
13649 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13650 {
47beaa6a 13651 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13652 htab->tls_trampoline = -1;
13653 }
5e681ec4
PB		 13654 }
13655 else
13656 *local_got = (bfd_vma) -1;
13657 }
252b5132
RH		 13658 }
13659
ba93b8ac
DJ		 13660 if (htab->tls_ldm_got.refcount > 0)
13661 {
13662 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13663 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13664 htab->tls_ldm_got.offset = htab->root.sgot->size;
13665 htab->root.sgot->size += 8;
ba93b8ac 13666 if (info->shared)
47beaa6a 13667 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13668 }
13669 else
13670 htab->tls_ldm_got.offset = -1;
13671
5e681ec4
PB		 13672 /* Allocate global sym .plt and .got entries, and space for global
13673 sym dynamic relocs. */
47beaa6a 13674 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13675
d504ffc8
DJ		 13676 /* Here we rummage through the found bfds to collect glue information. */
13677 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13678 {
0ffa91dd 13679 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13680 continue;
13681
c7b8f16e
JB		 13682 /* Initialise mapping tables for code/data. */
13683 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13684
c7b8f16e
JB		 13685 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13686 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13687 /* xgettext:c-format */
13688 _bfd_error_handler (_("Errors encountered processing file %s"),
13689 ibfd->filename);
13690 }
d504ffc8 13691
3e6b1042
DJ		 13692 /* Allocate space for the glue sections now that we've sized them. */
13693 bfd_elf32_arm_allocate_interworking_sections (info);
13694
0855e32b
NS		 13695 /* For every jump slot reserved in the sgotplt, reloc_count is
13696 incremented. However, when we reserve space for TLS descriptors,
13697 it's not incremented, so in order to compute the space reserved
13698 for them, it suffices to multiply the reloc count by the jump
13699 slot size. */
13700 if (htab->root.srelplt)
13701 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13702
13703 if (htab->tls_trampoline)
13704 {
13705 if (htab->root.splt->size == 0)
13706 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13707
0855e32b
NS		 13708 htab->tls_trampoline = htab->root.splt->size;
13709 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13710
0855e32b
NS		 13711 /* If we're not using lazy TLS relocations, don't generate the
13712 PLT and GOT entries they require. */
13713 if (!(info->flags & DF_BIND_NOW))
13714 {
13715 htab->dt_tlsdesc_got = htab->root.sgot->size;
13716 htab->root.sgot->size += 4;
13717
13718 htab->dt_tlsdesc_plt = htab->root.splt->size;
13719 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13720 }
13721 }
13722
252b5132
RH		 13723 /* The check_relocs and adjust_dynamic_symbol entry points have
13724 determined the sizes of the various dynamic sections. Allocate
13725 memory for them. */
b34976b6
AM		 13726 plt = FALSE;
13727 relocs = FALSE;
252b5132
RH		 13728 for (s = dynobj->sections; s != NULL; s = s->next)
13729 {
13730 const char * name;
252b5132
RH		 13731
13732 if ((s->flags & SEC_LINKER_CREATED) == 0)
13733 continue;
13734
13735 /* It's OK to base decisions on the section name, because none
13736 of the dynobj section names depend upon the input files. */
13737 name = bfd_get_section_name (dynobj, s);
13738
34e77a92 13739 if (s == htab->root.splt)
252b5132 13740 {
c456f082
AM		 13741 /* Remember whether there is a PLT. */
13742 plt = s->size != 0;
252b5132 13743 }
0112cd26 13744 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13745 {
c456f082 13746 if (s->size != 0)
252b5132 13747 {
252b5132 13748 /* Remember whether there are any reloc sections other
00a97672 13749 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13750 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13751 relocs = TRUE;
252b5132
RH		 13752
13753 /* We use the reloc_count field as a counter if we need
13754 to copy relocs into the output file. */
13755 s->reloc_count = 0;
13756 }
13757 }
34e77a92
RS		 13758 else if (s != htab->root.sgot
13759 && s != htab->root.sgotplt
13760 && s != htab->root.iplt
13761 && s != htab->root.igotplt
13762 && s != htab->sdynbss)
252b5132
RH		 13763 {
13764 /* It's not one of our sections, so don't allocate space. */
13765 continue;
13766 }
13767
c456f082 13768 if (s->size == 0)
252b5132 13769 {
c456f082 13770 /* If we don't need this section, strip it from the
00a97672
RS		 13771 output file. This is mostly to handle .rel(a).bss and
13772 .rel(a).plt. We must create both sections in
c456f082
AM		 13773 create_dynamic_sections, because they must be created
13774 before the linker maps input sections to output
13775 sections. The linker does that before
13776 adjust_dynamic_symbol is called, and it is that
13777 function which decides whether anything needs to go
13778 into these sections. */
8423293d 13779 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13780 continue;
13781 }
13782
c456f082
AM		 13783 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13784 continue;
13785
252b5132 13786 /* Allocate memory for the section contents. */
21d799b5 13787 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13788 if (s->contents == NULL)
b34976b6 13789 return FALSE;
252b5132
RH		 13790 }
13791
13792 if (elf_hash_table (info)->dynamic_sections_created)
13793 {
13794 /* Add some entries to the .dynamic section. We fill in the
13795 values later, in elf32_arm_finish_dynamic_sections, but we
13796 must add the entries now so that we get the correct size for
13797 the .dynamic section. The DT_DEBUG entry is filled in by the
13798 dynamic linker and used by the debugger. */
dc810e39 13799#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13800 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13801
8532796c 13802 if (info->executable)
252b5132 13803 {
dc810e39 13804 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13805 return FALSE;
252b5132
RH		 13806 }
13807
13808 if (plt)
13809 {
dc810e39
AM		 13810 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13811 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13812 || !add_dynamic_entry (DT_PLTREL,
13813 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13814 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13815 return FALSE;
0855e32b
NS		 13816
13817 if (htab->dt_tlsdesc_plt &&
b38cadfb 13818 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 13819 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 13820 return FALSE;
252b5132
RH		 13821 }
13822
13823 if (relocs)
13824 {
00a97672
RS		 13825 if (htab->use_rel)
13826 {
13827 if (!add_dynamic_entry (DT_REL, 0)
13828 || !add_dynamic_entry (DT_RELSZ, 0)
13829 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13830 return FALSE;
13831 }
13832 else
13833 {
13834 if (!add_dynamic_entry (DT_RELA, 0)
13835 || !add_dynamic_entry (DT_RELASZ, 0)
13836 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13837 return FALSE;
13838 }
252b5132
RH		 13839 }
13840
08d1f311
DJ		 13841 /* If any dynamic relocs apply to a read-only section,
13842 then we need a DT_TEXTREL entry. */
13843 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13844 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13845 info);
08d1f311 13846
99e4ae17 13847 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13848 {
dc810e39 13849 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13850 return FALSE;
252b5132 13851 }
7a2b07ff
NS		 13852 if (htab->vxworks_p
13853 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13854 return FALSE;
252b5132 13855 }
8532796c 13856#undef add_dynamic_entry
252b5132 13857
b34976b6 13858 return TRUE;
252b5132
RH		 13859}
13860
0855e32b
NS		 13861/* Size sections even though they're not dynamic. We use it to setup
13862 _TLS_MODULE_BASE_, if needed. */
13863
13864static bfd_boolean
13865elf32_arm_always_size_sections (bfd *output_bfd,
13866 struct bfd_link_info *info)
13867{
13868 asection *tls_sec;
13869
13870 if (info->relocatable)
13871 return TRUE;
13872
13873 tls_sec = elf_hash_table (info)->tls_sec;
13874
13875 if (tls_sec)
13876 {
13877 struct elf_link_hash_entry *tlsbase;
13878
13879 tlsbase = elf_link_hash_lookup
13880 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13881
13882 if (tlsbase)
13883 {
13884 struct bfd_link_hash_entry *bh = NULL;
13885 const struct elf_backend_data *bed
13886 = get_elf_backend_data (output_bfd);
13887
13888 if (!(_bfd_generic_link_add_one_symbol
13889 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13890 tls_sec, 0, NULL, FALSE,
13891 bed->collect, &bh)))
13892 return FALSE;
b38cadfb 13893
0855e32b
NS		 13894 tlsbase->type = STT_TLS;
13895 tlsbase = (struct elf_link_hash_entry *)bh;
13896 tlsbase->def_regular = 1;
13897 tlsbase->other = STV_HIDDEN;
13898 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13899 }
13900 }
13901 return TRUE;
13902}
13903
252b5132
RH		 13904/* Finish up dynamic symbol handling. We set the contents of various
13905 dynamic sections here. */
13906
b34976b6 13907static bfd_boolean
906e58ca
NC		 13908elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13909 struct bfd_link_info * info,
13910 struct elf_link_hash_entry * h,
13911 Elf_Internal_Sym * sym)
252b5132 13912{
e5a52504 13913 struct elf32_arm_link_hash_table *htab;
b7693d02 13914 struct elf32_arm_link_hash_entry *eh;
252b5132 13915
e5a52504 13916 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13917 if (htab == NULL)
13918 return FALSE;
13919
b7693d02 13920 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 13921
13922 if (h->plt.offset != (bfd_vma) -1)
13923 {
34e77a92 13924 if (!eh->is_iplt)
e5a52504 13925 {
34e77a92
RS		 13926 BFD_ASSERT (h->dynindx != -1);
13927 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13928 h->dynindx, 0);
e5a52504 13929 }
57e8b36a 13930
f5385ebf 13931 if (!h->def_regular)
252b5132
RH		 13932 {
13933 /* Mark the symbol as undefined, rather than as defined in
13934 the .plt section. Leave the value alone. */
13935 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13936 /* If the symbol is weak, we do need to clear the value.
13937 Otherwise, the PLT entry would provide a definition for
13938 the symbol even if the symbol wasn't defined anywhere,
13939 and so the symbol would never be NULL. */
f5385ebf 13940 if (!h->ref_regular_nonweak)
d982ba73 13941 sym->st_value = 0;
252b5132 13942 }
34e77a92
RS		 13943 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13944 {
13945 /* At least one non-call relocation references this .iplt entry,
13946 so the .iplt entry is the function's canonical address. */
13947 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13948 sym->st_target_internal = ST_BRANCH_TO_ARM;
13949 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13950 (output_bfd, htab->root.iplt->output_section));
13951 sym->st_value = (h->plt.offset
13952 + htab->root.iplt->output_section->vma
13953 + htab->root.iplt->output_offset);
13954 }
252b5132
RH		 13955 }
13956
f5385ebf 13957 if (h->needs_copy)
252b5132
RH		 13958 {
13959 asection * s;
947216bf 13960 Elf_Internal_Rela rel;
252b5132
RH		 13961
13962 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13963 BFD_ASSERT (h->dynindx != -1
13964 && (h->root.type == bfd_link_hash_defined
13965 || h->root.type == bfd_link_hash_defweak));
13966
362d30a1 13967 s = htab->srelbss;
252b5132
RH		 13968 BFD_ASSERT (s != NULL);
13969
00a97672 13970 rel.r_addend = 0;
252b5132
RH		 13971 rel.r_offset = (h->root.u.def.value
13972 + h->root.u.def.section->output_section->vma
13973 + h->root.u.def.section->output_offset);
13974 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 13975 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 13976 }
13977
00a97672
RS		 13978 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13979 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13980 to the ".got" section. */
252b5132 13981 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 13982 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 13983 sym->st_shndx = SHN_ABS;
13984
b34976b6 13985 return TRUE;
252b5132
RH		 13986}
13987
0855e32b
NS		 13988static void
13989arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13990 void *contents,
13991 const unsigned long *template, unsigned count)
13992{
13993 unsigned ix;
b38cadfb 13994
0855e32b
NS		 13995 for (ix = 0; ix != count; ix++)
13996 {
13997 unsigned long insn = template[ix];
13998
13999 /* Emit mov pc,rx if bx is not permitted. */
14000 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14001 insn = (insn & 0xf000000f) | 0x01a0f000;
14002 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14003 }
14004}
14005
252b5132
RH		 14006/* Finish up the dynamic sections. */
14007
b34976b6 14008static bfd_boolean
57e8b36a 14009elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14010{
14011 bfd * dynobj;
14012 asection * sgot;
14013 asection * sdyn;
4dfe6ac6
NC		 14014 struct elf32_arm_link_hash_table *htab;
14015
14016 htab = elf32_arm_hash_table (info);
14017 if (htab == NULL)
14018 return FALSE;
252b5132
RH		 14019
14020 dynobj = elf_hash_table (info)->dynobj;
14021
362d30a1 14022 sgot = htab->root.sgotplt;
894891db
NC		 14023 /* A broken linker script might have discarded the dynamic sections.
14024 Catch this here so that we do not seg-fault later on. */
14025 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14026 return FALSE;
3d4d4302 14027 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14028
14029 if (elf_hash_table (info)->dynamic_sections_created)
14030 {
14031 asection *splt;
14032 Elf32_External_Dyn *dyncon, *dynconend;
14033
362d30a1 14034 splt = htab->root.splt;
24a1ba0f 14035 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14036 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14037
14038 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14039 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14040
252b5132
RH		 14041 for (; dyncon < dynconend; dyncon++)
14042 {
14043 Elf_Internal_Dyn dyn;
14044 const char * name;
14045 asection * s;
14046
14047 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14048
14049 switch (dyn.d_tag)
14050 {
229fcec5
MM		 14051 unsigned int type;
14052
252b5132 14053 default:
7a2b07ff
NS		 14054 if (htab->vxworks_p
14055 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14056 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14057 break;
14058
229fcec5
MM		 14059 case DT_HASH:
14060 name = ".hash";
14061 goto get_vma_if_bpabi;
14062 case DT_STRTAB:
14063 name = ".dynstr";
14064 goto get_vma_if_bpabi;
14065 case DT_SYMTAB:
14066 name = ".dynsym";
14067 goto get_vma_if_bpabi;
c0042f5d
MM		 14068 case DT_VERSYM:
14069 name = ".gnu.version";
14070 goto get_vma_if_bpabi;
14071 case DT_VERDEF:
14072 name = ".gnu.version_d";
14073 goto get_vma_if_bpabi;
14074 case DT_VERNEED:
14075 name = ".gnu.version_r";
14076 goto get_vma_if_bpabi;
14077
252b5132
RH		 14078 case DT_PLTGOT:
14079 name = ".got";
14080 goto get_vma;
14081 case DT_JMPREL:
00a97672 14082 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14083 get_vma:
14084 s = bfd_get_section_by_name (output_bfd, name);
14085 BFD_ASSERT (s != NULL);
229fcec5
MM		 14086 if (!htab->symbian_p)
14087 dyn.d_un.d_ptr = s->vma;
14088 else
14089 /* In the BPABI, tags in the PT_DYNAMIC section point
14090 at the file offset, not the memory address, for the
14091 convenience of the post linker. */
14092 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14093 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14094 break;
14095
229fcec5
MM		 14096 get_vma_if_bpabi:
14097 if (htab->symbian_p)
14098 goto get_vma;
14099 break;
14100
252b5132 14101 case DT_PLTRELSZ:
362d30a1 14102 s = htab->root.srelplt;
252b5132 14103 BFD_ASSERT (s != NULL);
eea6121a 14104 dyn.d_un.d_val = s->size;
252b5132
RH		 14105 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14106 break;
906e58ca 14107
252b5132 14108 case DT_RELSZ:
00a97672 14109 case DT_RELASZ:
229fcec5
MM		 14110 if (!htab->symbian_p)
14111 {
14112 /* My reading of the SVR4 ABI indicates that the
14113 procedure linkage table relocs (DT_JMPREL) should be
14114 included in the overall relocs (DT_REL). This is
14115 what Solaris does. However, UnixWare can not handle
14116 that case. Therefore, we override the DT_RELSZ entry
14117 here to make it not include the JMPREL relocs. Since
00a97672 14118 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14119 other relocation sections, we don't have to worry
14120 about changing the DT_REL entry. */
362d30a1 14121 s = htab->root.srelplt;
229fcec5
MM		 14122 if (s != NULL)
14123 dyn.d_un.d_val -= s->size;
14124 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14125 break;
14126 }
8029a119 14127 /* Fall through. */
229fcec5
MM		 14128
14129 case DT_REL:
14130 case DT_RELA:
229fcec5
MM		 14131 /* In the BPABI, the DT_REL tag must point at the file
14132 offset, not the VMA, of the first relocation
14133 section. So, we use code similar to that in
14134 elflink.c, but do not check for SHF_ALLOC on the
14135 relcoation section, since relocations sections are
14136 never allocated under the BPABI. The comments above
14137 about Unixware notwithstanding, we include all of the
14138 relocations here. */
14139 if (htab->symbian_p)
14140 {
14141 unsigned int i;
14142 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14143 ? SHT_REL : SHT_RELA);
14144 dyn.d_un.d_val = 0;
14145 for (i = 1; i < elf_numsections (output_bfd); i++)
14146 {
906e58ca 14147 Elf_Internal_Shdr *hdr
229fcec5
MM		 14148 = elf_elfsections (output_bfd)[i];
14149 if (hdr->sh_type == type)
14150 {
906e58ca 14151 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14152 || dyn.d_tag == DT_RELASZ)
14153 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14154 else if ((ufile_ptr) hdr->sh_offset
14155 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14156 dyn.d_un.d_val = hdr->sh_offset;
14157 }
14158 }
14159 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14160 }
252b5132 14161 break;
88f7bcd5 14162
0855e32b
NS		 14163 case DT_TLSDESC_PLT:
14164 s = htab->root.splt;
14165 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14166 + htab->dt_tlsdesc_plt);
14167 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14168 break;
14169
14170 case DT_TLSDESC_GOT:
14171 s = htab->root.sgot;
14172 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14173 + htab->dt_tlsdesc_got);
14174 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14175 break;
14176
88f7bcd5
NC		 14177 /* Set the bottom bit of DT_INIT/FINI if the
14178 corresponding function is Thumb. */
14179 case DT_INIT:
14180 name = info->init_function;
14181 goto get_sym;
14182 case DT_FINI:
14183 name = info->fini_function;
14184 get_sym:
14185 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14186 then there is nothing to adjust. */
88f7bcd5
NC		 14187 if (dyn.d_un.d_val != 0)
14188 {
14189 struct elf_link_hash_entry * eh;
14190
14191 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14192 FALSE, FALSE, TRUE);
35fc36a8 14193 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14194 {
14195 dyn.d_un.d_val |= 1;
b34976b6 14196 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14197 }
14198 }
14199 break;
252b5132
RH		 14200 }
14201 }
14202
24a1ba0f 14203 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14204 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14205 {
00a97672
RS		 14206 const bfd_vma *plt0_entry;
14207 bfd_vma got_address, plt_address, got_displacement;
14208
14209 /* Calculate the addresses of the GOT and PLT. */
14210 got_address = sgot->output_section->vma + sgot->output_offset;
14211 plt_address = splt->output_section->vma + splt->output_offset;
14212
14213 if (htab->vxworks_p)
14214 {
14215 /* The VxWorks GOT is relocated by the dynamic linker.
14216 Therefore, we must emit relocations rather than simply
14217 computing the values now. */
14218 Elf_Internal_Rela rel;
14219
14220 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14221 put_arm_insn (htab, output_bfd, plt0_entry[0],
14222 splt->contents + 0);
14223 put_arm_insn (htab, output_bfd, plt0_entry[1],
14224 splt->contents + 4);
14225 put_arm_insn (htab, output_bfd, plt0_entry[2],
14226 splt->contents + 8);
00a97672
RS		 14227 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14228
8029a119 14229 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14230 rel.r_offset = plt_address + 12;
14231 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14232 rel.r_addend = 0;
14233 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14234 htab->srelplt2->contents);
14235 }
b38cadfb
NC		 14236 else if (htab->nacl_p)
14237 {
14238 unsigned int i;
14239
14240 got_displacement = got_address + 8 - (plt_address + 16);
14241
14242 put_arm_insn (htab, output_bfd,
14243 elf32_arm_nacl_plt0_entry[0]
14244 | arm_movw_immediate (got_displacement),
14245 splt->contents + 0);
14246 put_arm_insn (htab, output_bfd,
14247 elf32_arm_nacl_plt0_entry[1]
14248 | arm_movt_immediate (got_displacement),
14249 splt->contents + 4);
14250 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14251 put_arm_insn (htab, output_bfd,
14252 elf32_arm_nacl_plt0_entry[i],
14253 splt->contents + (i * 4));
14254 }
00a97672
RS		 14255 else
14256 {
14257 got_displacement = got_address - (plt_address + 16);
14258
14259 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14260 put_arm_insn (htab, output_bfd, plt0_entry[0],
14261 splt->contents + 0);
14262 put_arm_insn (htab, output_bfd, plt0_entry[1],
14263 splt->contents + 4);
14264 put_arm_insn (htab, output_bfd, plt0_entry[2],
14265 splt->contents + 8);
14266 put_arm_insn (htab, output_bfd, plt0_entry[3],
14267 splt->contents + 12);
5e681ec4 14268
5e681ec4 14269#ifdef FOUR_WORD_PLT
00a97672
RS		 14270 /* The displacement value goes in the otherwise-unused
14271 last word of the second entry. */
14272 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14273#else
00a97672 14274 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14275#endif
00a97672 14276 }
f7a74f8c 14277 }
252b5132
RH		 14278
14279 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14280 really seem like the right value. */
74541ad4
AM		 14281 if (splt->output_section->owner == output_bfd)
14282 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14283
0855e32b
NS		 14284 if (htab->dt_tlsdesc_plt)
14285 {
14286 bfd_vma got_address
14287 = sgot->output_section->vma + sgot->output_offset;
14288 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14289 + htab->root.sgot->output_offset);
14290 bfd_vma plt_address
14291 = splt->output_section->vma + splt->output_offset;
14292
b38cadfb 14293 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14294 splt->contents + htab->dt_tlsdesc_plt,
14295 dl_tlsdesc_lazy_trampoline, 6);
14296
14297 bfd_put_32 (output_bfd,
14298 gotplt_address + htab->dt_tlsdesc_got
14299 - (plt_address + htab->dt_tlsdesc_plt)
14300 - dl_tlsdesc_lazy_trampoline[6],
14301 splt->contents + htab->dt_tlsdesc_plt + 24);
14302 bfd_put_32 (output_bfd,
14303 got_address - (plt_address + htab->dt_tlsdesc_plt)
14304 - dl_tlsdesc_lazy_trampoline[7],
14305 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14306 }
14307
14308 if (htab->tls_trampoline)
14309 {
b38cadfb 14310 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14311 splt->contents + htab->tls_trampoline,
14312 tls_trampoline, 3);
14313#ifdef FOUR_WORD_PLT
14314 bfd_put_32 (output_bfd, 0x00000000,
14315 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14316#endif
0855e32b
NS		 14317 }
14318
362d30a1 14319 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14320 {
14321 /* Correct the .rel(a).plt.unloaded relocations. They will have
14322 incorrect symbol indexes. */
14323 int num_plts;
eed62c48 14324 unsigned char *p;
00a97672 14325
362d30a1 14326 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14327 / htab->plt_entry_size);
14328 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14329
14330 for (; num_plts; num_plts--)
14331 {
14332 Elf_Internal_Rela rel;
14333
14334 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14335 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14336 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14337 p += RELOC_SIZE (htab);
14338
14339 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14340 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14341 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14342 p += RELOC_SIZE (htab);
14343 }
14344 }
252b5132
RH		 14345 }
14346
14347 /* Fill in the first three entries in the global offset table. */
229fcec5 14348 if (sgot)
252b5132 14349 {
229fcec5
MM		 14350 if (sgot->size > 0)
14351 {
14352 if (sdyn == NULL)
14353 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14354 else
14355 bfd_put_32 (output_bfd,
14356 sdyn->output_section->vma + sdyn->output_offset,
14357 sgot->contents);
14358 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14359 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14360 }
252b5132 14361
229fcec5
MM		 14362 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14363 }
252b5132 14364
b34976b6 14365 return TRUE;
252b5132
RH		 14366}
14367
ba96a88f 14368static void
57e8b36a 14369elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14370{
9b485d32 14371 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14372 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14373
14374 i_ehdrp = elf_elfheader (abfd);
14375
94a3258f
PB		 14376 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14377 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14378 else
14379 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14380 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14381
93204d3a
PB		 14382 if (link_info)
14383 {
14384 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14385 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14386 i_ehdrp->e_flags |= EF_ARM_BE8;
14387 }
ba96a88f
NC		 14388}
14389
99e4ae17 14390static enum elf_reloc_type_class
57e8b36a 14391elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 14392{
f51e552e 14393 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14394 {
14395 case R_ARM_RELATIVE:
14396 return reloc_class_relative;
14397 case R_ARM_JUMP_SLOT:
14398 return reloc_class_plt;
14399 case R_ARM_COPY:
14400 return reloc_class_copy;
14401 default:
14402 return reloc_class_normal;
14403 }
14404}
14405
e489d0ae 14406static void
57e8b36a 14407elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14408{
5a6c6817 14409 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14410}
14411
40a18ebd
NC		 14412/* Return TRUE if this is an unwinding table entry. */
14413
14414static bfd_boolean
14415is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14416{
0112cd26
NC		 14417 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14418 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14419}
14420
14421
14422/* Set the type and flags for an ARM section. We do this by
14423 the section name, which is a hack, but ought to work. */
14424
14425static bfd_boolean
14426elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14427{
14428 const char * name;
14429
14430 name = bfd_get_section_name (abfd, sec);
14431
14432 if (is_arm_elf_unwind_section_name (abfd, name))
14433 {
14434 hdr->sh_type = SHT_ARM_EXIDX;
14435 hdr->sh_flags |= SHF_LINK_ORDER;
14436 }
14437 return TRUE;
14438}
14439
6dc132d9
L		 14440/* Handle an ARM specific section when reading an object file. This is
14441 called when bfd_section_from_shdr finds a section with an unknown
14442 type. */
40a18ebd
NC		 14443
14444static bfd_boolean
14445elf32_arm_section_from_shdr (bfd *abfd,
14446 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14447 const char *name,
14448 int shindex)
40a18ebd
NC		 14449{
14450 /* There ought to be a place to keep ELF backend specific flags, but
14451 at the moment there isn't one. We just keep track of the
14452 sections by their name, instead. Fortunately, the ABI gives
14453 names for all the ARM specific sections, so we will probably get
14454 away with this. */
14455 switch (hdr->sh_type)
14456 {
14457 case SHT_ARM_EXIDX:
0951f019
RE		 14458 case SHT_ARM_PREEMPTMAP:
14459 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14460 break;
14461
14462 default:
14463 return FALSE;
14464 }
14465
6dc132d9 14466 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14467 return FALSE;
14468
14469 return TRUE;
14470}
e489d0ae 14471
44444f50
NC		 14472static _arm_elf_section_data *
14473get_arm_elf_section_data (asection * sec)
14474{
47b2e99c
JZ		 14475 if (sec && sec->owner && is_arm_elf (sec->owner))
14476 return elf32_arm_section_data (sec);
44444f50
NC		 14477 else
14478 return NULL;
8e3de13a
NC		 14479}
14480
4e617b1e
PB		 14481typedef struct
14482{
57402f1e 14483 void *flaginfo;
4e617b1e 14484 struct bfd_link_info *info;
91a5743d
PB		 14485 asection *sec;
14486 int sec_shndx;
6e0b88f1
AM		 14487 int (*func) (void *, const char *, Elf_Internal_Sym *,
14488 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14489} output_arch_syminfo;
14490
14491enum map_symbol_type
14492{
14493 ARM_MAP_ARM,
14494 ARM_MAP_THUMB,
14495 ARM_MAP_DATA
14496};
14497
14498
7413f23f 14499/* Output a single mapping symbol. */
4e617b1e
PB		 14500
14501static bfd_boolean
7413f23f
DJ		 14502elf32_arm_output_map_sym (output_arch_syminfo *osi,
14503 enum map_symbol_type type,
14504 bfd_vma offset)
4e617b1e
PB		 14505{
14506 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14507 Elf_Internal_Sym sym;
14508
91a5743d
PB		 14509 sym.st_value = osi->sec->output_section->vma
14510 + osi->sec->output_offset
14511 + offset;
4e617b1e
PB		 14512 sym.st_size = 0;
14513 sym.st_other = 0;
14514 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14515 sym.st_shndx = osi->sec_shndx;
35fc36a8 14516 sym.st_target_internal = 0;
fe33d2fa 14517 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14518 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14519}
14520
34e77a92
RS		 14521/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14522 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14523
14524static bfd_boolean
34e77a92
RS		 14525elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14526 bfd_boolean is_iplt_entry_p,
14527 union gotplt_union *root_plt,
14528 struct arm_plt_info *arm_plt)
4e617b1e 14529{
4e617b1e 14530 struct elf32_arm_link_hash_table *htab;
34e77a92 14531 bfd_vma addr, plt_header_size;
4e617b1e 14532
34e77a92 14533 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14534 return TRUE;
14535
4dfe6ac6
NC		 14536 htab = elf32_arm_hash_table (osi->info);
14537 if (htab == NULL)
14538 return FALSE;
14539
34e77a92
RS		 14540 if (is_iplt_entry_p)
14541 {
14542 osi->sec = htab->root.iplt;
14543 plt_header_size = 0;
14544 }
14545 else
14546 {
14547 osi->sec = htab->root.splt;
14548 plt_header_size = htab->plt_header_size;
14549 }
14550 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14551 (osi->info->output_bfd, osi->sec->output_section));
14552
14553 addr = root_plt->offset & -2;
4e617b1e
PB		 14554 if (htab->symbian_p)
14555 {
7413f23f 14556 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14557 return FALSE;
7413f23f 14558 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14559 return FALSE;
14560 }
14561 else if (htab->vxworks_p)
14562 {
7413f23f 14563 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14564 return FALSE;
7413f23f 14565 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14566 return FALSE;
7413f23f 14567 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14568 return FALSE;
7413f23f 14569 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14570 return FALSE;
14571 }
b38cadfb
NC		 14572 else if (htab->nacl_p)
14573 {
14574 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14575 return FALSE;
14576 }
4e617b1e
PB		 14577 else
14578 {
34e77a92 14579 bfd_boolean thumb_stub_p;
bd97cb95 14580
34e77a92
RS		 14581 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14582 if (thumb_stub_p)
4e617b1e 14583 {
7413f23f 14584 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14585 return FALSE;
14586 }
14587#ifdef FOUR_WORD_PLT
7413f23f 14588 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14589 return FALSE;
7413f23f 14590 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14591 return FALSE;
14592#else
906e58ca 14593 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14594 so only need to output a mapping symbol for the first PLT entry and
14595 entries with thumb thunks. */
34e77a92 14596 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14597 {
7413f23f 14598 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14599 return FALSE;
14600 }
14601#endif
14602 }
14603
14604 return TRUE;
14605}
14606
34e77a92
RS		 14607/* Output mapping symbols for PLT entries associated with H. */
14608
14609static bfd_boolean
14610elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14611{
14612 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14613 struct elf32_arm_link_hash_entry *eh;
14614
14615 if (h->root.type == bfd_link_hash_indirect)
14616 return TRUE;
14617
14618 if (h->root.type == bfd_link_hash_warning)
14619 /* When warning symbols are created, they **replace** the "real"
14620 entry in the hash table, thus we never get to see the real
14621 symbol in a hash traversal. So look at it now. */
14622 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14623
14624 eh = (struct elf32_arm_link_hash_entry *) h;
14625 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14626 &h->plt, &eh->plt);
14627}
14628
7413f23f
DJ		 14629/* Output a single local symbol for a generated stub. */
14630
14631static bfd_boolean
14632elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14633 bfd_vma offset, bfd_vma size)
14634{
7413f23f
DJ		 14635 Elf_Internal_Sym sym;
14636
7413f23f
DJ		 14637 sym.st_value = osi->sec->output_section->vma
14638 + osi->sec->output_offset
14639 + offset;
14640 sym.st_size = size;
14641 sym.st_other = 0;
14642 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14643 sym.st_shndx = osi->sec_shndx;
35fc36a8 14644 sym.st_target_internal = 0;
57402f1e 14645 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14646}
4e617b1e 14647
da5938a2 14648static bfd_boolean
8029a119
NC		 14649arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14650 void * in_arg)
da5938a2
NC		 14651{
14652 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14653 asection *stub_sec;
14654 bfd_vma addr;
7413f23f 14655 char *stub_name;
9a008db3 14656 output_arch_syminfo *osi;
d3ce72d0 14657 const insn_sequence *template_sequence;
461a49ca
DJ		 14658 enum stub_insn_type prev_type;
14659 int size;
14660 int i;
14661 enum map_symbol_type sym_type;
da5938a2
NC		 14662
14663 /* Massage our args to the form they really have. */
14664 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14665 osi = (output_arch_syminfo *) in_arg;
da5938a2 14666
da5938a2
NC		 14667 stub_sec = stub_entry->stub_sec;
14668
14669 /* Ensure this stub is attached to the current section being
7413f23f 14670 processed. */
da5938a2
NC		 14671 if (stub_sec != osi->sec)
14672 return TRUE;
14673
7413f23f
DJ		 14674 addr = (bfd_vma) stub_entry->stub_offset;
14675 stub_name = stub_entry->output_name;
da5938a2 14676
d3ce72d0
NC		 14677 template_sequence = stub_entry->stub_template;
14678 switch (template_sequence[0].type)
7413f23f 14679 {
461a49ca
DJ		 14680 case ARM_TYPE:
14681 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14682 return FALSE;
14683 break;
461a49ca 14684 case THUMB16_TYPE:
48229727 14685 case THUMB32_TYPE:
461a49ca
DJ		 14686 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14687 stub_entry->stub_size))
da5938a2
NC		 14688 return FALSE;
14689 break;
14690 default:
14691 BFD_FAIL ();
48229727 14692 return 0;
7413f23f 14693 }
da5938a2 14694
461a49ca
DJ		 14695 prev_type = DATA_TYPE;
14696 size = 0;
14697 for (i = 0; i < stub_entry->stub_template_size; i++)
14698 {
d3ce72d0 14699 switch (template_sequence[i].type)
461a49ca
DJ		 14700 {
14701 case ARM_TYPE:
14702 sym_type = ARM_MAP_ARM;
14703 break;
14704
14705 case THUMB16_TYPE:
48229727 14706 case THUMB32_TYPE:
461a49ca
DJ		 14707 sym_type = ARM_MAP_THUMB;
14708 break;
14709
14710 case DATA_TYPE:
14711 sym_type = ARM_MAP_DATA;
14712 break;
14713
14714 default:
14715 BFD_FAIL ();
4e31c731 14716 return FALSE;
461a49ca
DJ		 14717 }
14718
d3ce72d0 14719 if (template_sequence[i].type != prev_type)
461a49ca 14720 {
d3ce72d0 14721 prev_type = template_sequence[i].type;
461a49ca
DJ		 14722 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14723 return FALSE;
14724 }
14725
d3ce72d0 14726 switch (template_sequence[i].type)
461a49ca
DJ		 14727 {
14728 case ARM_TYPE:
48229727 14729 case THUMB32_TYPE:
461a49ca
DJ		 14730 size += 4;
14731 break;
14732
14733 case THUMB16_TYPE:
14734 size += 2;
14735 break;
14736
14737 case DATA_TYPE:
14738 size += 4;
14739 break;
14740
14741 default:
14742 BFD_FAIL ();
4e31c731 14743 return FALSE;
461a49ca
DJ		 14744 }
14745 }
14746
da5938a2
NC		 14747 return TRUE;
14748}
14749
33811162
DG		 14750/* Output mapping symbols for linker generated sections,
14751 and for those data-only sections that do not have a
14752 $d. */
4e617b1e
PB		 14753
14754static bfd_boolean
14755elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 14756 struct bfd_link_info *info,
57402f1e 14757 void *flaginfo,
6e0b88f1
AM		 14758 int (*func) (void *, const char *,
14759 Elf_Internal_Sym *,
14760 asection *,
14761 struct elf_link_hash_entry *))
4e617b1e
PB		 14762{
14763 output_arch_syminfo osi;
14764 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14765 bfd_vma offset;
14766 bfd_size_type size;
33811162 14767 bfd *input_bfd;
4e617b1e
PB		 14768
14769 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14770 if (htab == NULL)
14771 return FALSE;
14772
906e58ca 14773 check_use_blx (htab);
91a5743d 14774
57402f1e 14775 osi.flaginfo = flaginfo;
4e617b1e
PB		 14776 osi.info = info;
14777 osi.func = func;
906e58ca 14778
33811162
DG		 14779 /* Add a $d mapping symbol to data-only sections that
14780 don't have any mapping symbol. This may result in (harmless) redundant
14781 mapping symbols. */
14782 for (input_bfd = info->input_bfds;
14783 input_bfd != NULL;
14784 input_bfd = input_bfd->link_next)
14785 {
14786 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14787 for (osi.sec = input_bfd->sections;
14788 osi.sec != NULL;
14789 osi.sec = osi.sec->next)
14790 {
14791 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14792 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14793 != 0)
33811162
DG		 14794 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14795 == SEC_HAS_CONTENTS
14796 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14797 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14798 && osi.sec->size > 0
14799 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14800 {
14801 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14802 (output_bfd, osi.sec->output_section);
14803 if (osi.sec_shndx != (int)SHN_BAD)
14804 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14805 }
14806 }
14807 }
14808
91a5743d
PB		 14809 /* ARM->Thumb glue. */
14810 if (htab->arm_glue_size > 0)
14811 {
3d4d4302
AM		 14812 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14813 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 14814
14815 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14816 (output_bfd, osi.sec->output_section);
14817 if (info->shared || htab->root.is_relocatable_executable
14818 || htab->pic_veneer)
14819 size = ARM2THUMB_PIC_GLUE_SIZE;
14820 else if (htab->use_blx)
14821 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14822 else
14823 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14824
91a5743d
PB		 14825 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14826 {
7413f23f
DJ		 14827 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14828 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14829 }
14830 }
14831
14832 /* Thumb->ARM glue. */
14833 if (htab->thumb_glue_size > 0)
14834 {
3d4d4302
AM		 14835 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14836 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 14837
14838 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14839 (output_bfd, osi.sec->output_section);
14840 size = THUMB2ARM_GLUE_SIZE;
14841
14842 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14843 {
7413f23f
DJ		 14844 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14845 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14846 }
14847 }
14848
845b51d6
PB		 14849 /* ARMv4 BX veneers. */
14850 if (htab->bx_glue_size > 0)
14851 {
3d4d4302
AM		 14852 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14853 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 14854
14855 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14856 (output_bfd, osi.sec->output_section);
14857
7413f23f 14858 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14859 }
14860
8029a119
NC		 14861 /* Long calls stubs. */
14862 if (htab->stub_bfd && htab->stub_bfd->sections)
14863 {
da5938a2 14864 asection* stub_sec;
8029a119 14865
da5938a2
NC		 14866 for (stub_sec = htab->stub_bfd->sections;
14867 stub_sec != NULL;
8029a119
NC		 14868 stub_sec = stub_sec->next)
14869 {
14870 /* Ignore non-stub sections. */
14871 if (!strstr (stub_sec->name, STUB_SUFFIX))
14872 continue;
da5938a2 14873
8029a119 14874 osi.sec = stub_sec;
da5938a2 14875
8029a119
NC		 14876 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14877 (output_bfd, osi.sec->output_section);
da5938a2 14878
8029a119
NC		 14879 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14880 }
14881 }
da5938a2 14882
91a5743d 14883 /* Finally, output mapping symbols for the PLT. */
34e77a92 14884 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 14885 {
34e77a92
RS		 14886 osi.sec = htab->root.splt;
14887 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14888 (output_bfd, osi.sec->output_section));
14889
14890 /* Output mapping symbols for the plt header. SymbianOS does not have a
14891 plt header. */
14892 if (htab->vxworks_p)
14893 {
14894 /* VxWorks shared libraries have no PLT header. */
14895 if (!info->shared)
14896 {
14897 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14898 return FALSE;
14899 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14900 return FALSE;
14901 }
14902 }
b38cadfb
NC		 14903 else if (htab->nacl_p)
14904 {
14905 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14906 return FALSE;
14907 }
34e77a92 14908 else if (!htab->symbian_p)
4e617b1e 14909 {
7413f23f 14910 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 14911 return FALSE;
34e77a92
RS		 14912#ifndef FOUR_WORD_PLT
14913 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 14914 return FALSE;
34e77a92 14915#endif
4e617b1e
PB		 14916 }
14917 }
34e77a92
RS		 14918 if ((htab->root.splt && htab->root.splt->size > 0)
14919 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 14920 {
34e77a92
RS		 14921 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14922 for (input_bfd = info->input_bfds;
14923 input_bfd != NULL;
14924 input_bfd = input_bfd->link_next)
14925 {
14926 struct arm_local_iplt_info **local_iplt;
14927 unsigned int i, num_syms;
4e617b1e 14928
34e77a92
RS		 14929 local_iplt = elf32_arm_local_iplt (input_bfd);
14930 if (local_iplt != NULL)
14931 {
14932 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14933 for (i = 0; i < num_syms; i++)
14934 if (local_iplt[i] != NULL
14935 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14936 &local_iplt[i]->root,
14937 &local_iplt[i]->arm))
14938 return FALSE;
14939 }
14940 }
14941 }
0855e32b
NS		 14942 if (htab->dt_tlsdesc_plt != 0)
14943 {
14944 /* Mapping symbols for the lazy tls trampoline. */
14945 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14946 return FALSE;
b38cadfb 14947
0855e32b
NS		 14948 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14949 htab->dt_tlsdesc_plt + 24))
14950 return FALSE;
14951 }
14952 if (htab->tls_trampoline != 0)
14953 {
14954 /* Mapping symbols for the tls trampoline. */
14955 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14956 return FALSE;
14957#ifdef FOUR_WORD_PLT
14958 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14959 htab->tls_trampoline + 12))
14960 return FALSE;
b38cadfb 14961#endif
0855e32b 14962 }
b38cadfb 14963
4e617b1e
PB		 14964 return TRUE;
14965}
14966
e489d0ae
PB		 14967/* Allocate target specific section data. */
14968
14969static bfd_boolean
14970elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14971{
f592407e
AM		 14972 if (!sec->used_by_bfd)
14973 {
14974 _arm_elf_section_data *sdata;
14975 bfd_size_type amt = sizeof (*sdata);
e489d0ae 14976
21d799b5 14977 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 14978 if (sdata == NULL)
14979 return FALSE;
14980 sec->used_by_bfd = sdata;
14981 }
e489d0ae
PB		 14982
14983 return _bfd_elf_new_section_hook (abfd, sec);
14984}
14985
14986
14987/* Used to order a list of mapping symbols by address. */
14988
14989static int
14990elf32_arm_compare_mapping (const void * a, const void * b)
14991{
7f6a71ff
JM		 14992 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14993 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14994
14995 if (amap->vma > bmap->vma)
14996 return 1;
14997 else if (amap->vma < bmap->vma)
14998 return -1;
14999 else if (amap->type > bmap->type)
15000 /* Ensure results do not depend on the host qsort for objects with
15001 multiple mapping symbols at the same address by sorting on type
15002 after vma. */
15003 return 1;
15004 else if (amap->type < bmap->type)
15005 return -1;
15006 else
15007 return 0;
e489d0ae
PB		 15008}
15009
2468f9c9
PB		 15010/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15011
15012static unsigned long
15013offset_prel31 (unsigned long addr, bfd_vma offset)
15014{
15015 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15016}
15017
15018/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15019 relocations. */
15020
15021static void
15022copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15023{
15024 unsigned long first_word = bfd_get_32 (output_bfd, from);
15025 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15026
2468f9c9
PB		 15027 /* High bit of first word is supposed to be zero. */
15028 if ((first_word & 0x80000000ul) == 0)
15029 first_word = offset_prel31 (first_word, offset);
b38cadfb 15030
2468f9c9
PB		 15031 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15032 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15033 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15034 second_word = offset_prel31 (second_word, offset);
b38cadfb 15035
2468f9c9
PB		 15036 bfd_put_32 (output_bfd, first_word, to);
15037 bfd_put_32 (output_bfd, second_word, to + 4);
15038}
e489d0ae 15039
48229727
JB		 15040/* Data for make_branch_to_a8_stub(). */
15041
b38cadfb
NC		 15042struct a8_branch_to_stub_data
15043{
48229727
JB		 15044 asection *writing_section;
15045 bfd_byte *contents;
15046};
15047
15048
15049/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15050 places for a particular section. */
15051
15052static bfd_boolean
15053make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15054 void *in_arg)
15055{
15056 struct elf32_arm_stub_hash_entry *stub_entry;
15057 struct a8_branch_to_stub_data *data;
15058 bfd_byte *contents;
15059 unsigned long branch_insn;
15060 bfd_vma veneered_insn_loc, veneer_entry_loc;
15061 bfd_signed_vma branch_offset;
15062 bfd *abfd;
91d6fa6a 15063 unsigned int target;
48229727
JB		 15064
15065 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15066 data = (struct a8_branch_to_stub_data *) in_arg;
15067
15068 if (stub_entry->target_section != data->writing_section
4563a860 15069 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15070 return TRUE;
15071
15072 contents = data->contents;
15073
15074 veneered_insn_loc = stub_entry->target_section->output_section->vma
15075 + stub_entry->target_section->output_offset
15076 + stub_entry->target_value;
15077
15078 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15079 + stub_entry->stub_sec->output_offset
15080 + stub_entry->stub_offset;
15081
15082 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15083 veneered_insn_loc &= ~3u;
15084
15085 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15086
15087 abfd = stub_entry->target_section->owner;
91d6fa6a 15088 target = stub_entry->target_value;
48229727
JB		 15089
15090 /* We attempt to avoid this condition by setting stubs_always_after_branch
15091 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15092 This check is just to be on the safe side... */
15093 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15094 {
15095 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15096 "allocated in unsafe location"), abfd);
15097 return FALSE;
15098 }
15099
15100 switch (stub_entry->stub_type)
15101 {
15102 case arm_stub_a8_veneer_b:
15103 case arm_stub_a8_veneer_b_cond:
15104 branch_insn = 0xf0009000;
15105 goto jump24;
15106
15107 case arm_stub_a8_veneer_blx:
15108 branch_insn = 0xf000e800;
15109 goto jump24;
15110
15111 case arm_stub_a8_veneer_bl:
15112 {
15113 unsigned int i1, j1, i2, j2, s;
15114
15115 branch_insn = 0xf000d000;
15116
15117 jump24:
15118 if (branch_offset < -16777216 || branch_offset > 16777214)
15119 {
15120 /* There's not much we can do apart from complain if this
15121 happens. */
15122 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15123 "of range (input file too large)"), abfd);
15124 return FALSE;
15125 }
15126
15127 /* i1 = not(j1 eor s), so:
15128 not i1 = j1 eor s
15129 j1 = (not i1) eor s. */
15130
15131 branch_insn |= (branch_offset >> 1) & 0x7ff;
15132 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15133 i2 = (branch_offset >> 22) & 1;
15134 i1 = (branch_offset >> 23) & 1;
15135 s = (branch_offset >> 24) & 1;
15136 j1 = (!i1) ^ s;
15137 j2 = (!i2) ^ s;
15138 branch_insn |= j2 << 11;
15139 branch_insn |= j1 << 13;
15140 branch_insn |= s << 26;
15141 }
15142 break;
15143
15144 default:
15145 BFD_FAIL ();
15146 return FALSE;
15147 }
15148
91d6fa6a
NC		 15149 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15150 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15151
15152 return TRUE;
15153}
15154
e489d0ae
PB		 15155/* Do code byteswapping. Return FALSE afterwards so that the section is
15156 written out as normal. */
15157
15158static bfd_boolean
c7b8f16e 15159elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15160 struct bfd_link_info *link_info,
15161 asection *sec,
e489d0ae
PB		 15162 bfd_byte *contents)
15163{
48229727 15164 unsigned int mapcount, errcount;
8e3de13a 15165 _arm_elf_section_data *arm_data;
c7b8f16e 15166 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15167 elf32_arm_section_map *map;
c7b8f16e 15168 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15169 bfd_vma ptr;
15170 bfd_vma end;
c7b8f16e 15171 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15172 bfd_byte tmp;
48229727 15173 unsigned int i;
57e8b36a 15174
4dfe6ac6
NC		 15175 if (globals == NULL)
15176 return FALSE;
15177
8e3de13a
NC		 15178 /* If this section has not been allocated an _arm_elf_section_data
15179 structure then we cannot record anything. */
15180 arm_data = get_arm_elf_section_data (sec);
15181 if (arm_data == NULL)
15182 return FALSE;
15183
15184 mapcount = arm_data->mapcount;
15185 map = arm_data->map;
c7b8f16e
JB		 15186 errcount = arm_data->erratumcount;
15187
15188 if (errcount != 0)
15189 {
15190 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15191
15192 for (errnode = arm_data->erratumlist; errnode != 0;
15193 errnode = errnode->next)
15194 {
91d6fa6a 15195 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 15196
15197 switch (errnode->type)
15198 {
15199 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15200 {
15201 bfd_vma branch_to_veneer;
15202 /* Original condition code of instruction, plus bit mask for
15203 ARM B instruction. */
15204 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15205 | 0x0a000000;
15206
15207 /* The instruction is before the label. */
91d6fa6a 15208 target -= 4;
c7b8f16e
JB		 15209
15210 /* Above offset included in -4 below. */
15211 branch_to_veneer = errnode->u.b.veneer->vma
15212 - errnode->vma - 4;
15213
15214 if ((signed) branch_to_veneer < -(1 << 25)
15215 || (signed) branch_to_veneer >= (1 << 25))
15216 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15217 "range"), output_bfd);
15218
15219 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 15220 contents[endianflip ^ target] = insn & 0xff;
15221 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15222 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15223 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15224 }
15225 break;
15226
15227 case VFP11_ERRATUM_ARM_VENEER:
15228 {
15229 bfd_vma branch_from_veneer;
15230 unsigned int insn;
15231
15232 /* Take size of veneer into account. */
15233 branch_from_veneer = errnode->u.v.branch->vma
15234 - errnode->vma - 12;
15235
15236 if ((signed) branch_from_veneer < -(1 << 25)
15237 || (signed) branch_from_veneer >= (1 << 25))
15238 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15239 "range"), output_bfd);
15240
15241 /* Original instruction. */
15242 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 15243 contents[endianflip ^ target] = insn & 0xff;
15244 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15245 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15246 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15247
15248 /* Branch back to insn after original insn. */
15249 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 15250 contents[endianflip ^ (target + 4)] = insn & 0xff;
15251 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15252 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15253 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15254 }
15255 break;
15256
15257 default:
15258 abort ();
15259 }
15260 }
15261 }
e489d0ae 15262
2468f9c9
PB		 15263 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15264 {
15265 arm_unwind_table_edit *edit_node
15266 = arm_data->u.exidx.unwind_edit_list;
15267 /* Now, sec->size is the size of the section we will write. The original
15268 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15269 markers) was sec->rawsize. (This isn't the case if we perform no
15270 edits, then rawsize will be zero and we should use size). */
21d799b5 15271 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15272 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15273 unsigned int in_index, out_index;
15274 bfd_vma add_to_offsets = 0;
15275
15276 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15277 {
15278 if (edit_node)
15279 {
15280 unsigned int edit_index = edit_node->index;
b38cadfb 15281
2468f9c9
PB		 15282 if (in_index < edit_index && in_index * 8 < input_size)
15283 {
15284 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15285 contents + in_index * 8, add_to_offsets);
15286 out_index++;
15287 in_index++;
15288 }
15289 else if (in_index == edit_index
15290 || (in_index * 8 >= input_size
15291 && edit_index == UINT_MAX))
15292 {
15293 switch (edit_node->type)
15294 {
15295 case DELETE_EXIDX_ENTRY:
15296 in_index++;
15297 add_to_offsets += 8;
15298 break;
b38cadfb 15299
2468f9c9
PB		 15300 case INSERT_EXIDX_CANTUNWIND_AT_END:
15301 {
15302 asection *text_sec = edit_node->linked_section;
15303 bfd_vma text_offset = text_sec->output_section->vma
15304 + text_sec->output_offset
15305 + text_sec->size;
15306 bfd_vma exidx_offset = offset + out_index * 8;
15307 unsigned long prel31_offset;
15308
15309 /* Note: this is meant to be equivalent to an
15310 R_ARM_PREL31 relocation. These synthetic
15311 EXIDX_CANTUNWIND markers are not relocated by the
15312 usual BFD method. */
15313 prel31_offset = (text_offset - exidx_offset)
15314 & 0x7ffffffful;
15315
15316 /* First address we can't unwind. */
15317 bfd_put_32 (output_bfd, prel31_offset,
15318 &edited_contents[out_index * 8]);
15319
15320 /* Code for EXIDX_CANTUNWIND. */
15321 bfd_put_32 (output_bfd, 0x1,
15322 &edited_contents[out_index * 8 + 4]);
15323
15324 out_index++;
15325 add_to_offsets -= 8;
15326 }
15327 break;
15328 }
b38cadfb 15329
2468f9c9
PB		 15330 edit_node = edit_node->next;
15331 }
15332 }
15333 else
15334 {
15335 /* No more edits, copy remaining entries verbatim. */
15336 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15337 contents + in_index * 8, add_to_offsets);
15338 out_index++;
15339 in_index++;
15340 }
15341 }
15342
15343 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15344 bfd_set_section_contents (output_bfd, sec->output_section,
15345 edited_contents,
15346 (file_ptr) sec->output_offset, sec->size);
15347
15348 return TRUE;
15349 }
15350
48229727
JB		 15351 /* Fix code to point to Cortex-A8 erratum stubs. */
15352 if (globals->fix_cortex_a8)
15353 {
15354 struct a8_branch_to_stub_data data;
15355
15356 data.writing_section = sec;
15357 data.contents = contents;
15358
15359 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15360 &data);
15361 }
15362
e489d0ae
PB		 15363 if (mapcount == 0)
15364 return FALSE;
15365
c7b8f16e 15366 if (globals->byteswap_code)
e489d0ae 15367 {
c7b8f16e 15368 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15369
c7b8f16e
JB		 15370 ptr = map[0].vma;
15371 for (i = 0; i < mapcount; i++)
15372 {
15373 if (i == mapcount - 1)
15374 end = sec->size;
15375 else
15376 end = map[i + 1].vma;
e489d0ae 15377
c7b8f16e 15378 switch (map[i].type)
e489d0ae 15379 {
c7b8f16e
JB		 15380 case 'a':
15381 /* Byte swap code words. */
15382 while (ptr + 3 < end)
15383 {
15384 tmp = contents[ptr];
15385 contents[ptr] = contents[ptr + 3];
15386 contents[ptr + 3] = tmp;
15387 tmp = contents[ptr + 1];
15388 contents[ptr + 1] = contents[ptr + 2];
15389 contents[ptr + 2] = tmp;
15390 ptr += 4;
15391 }
15392 break;
e489d0ae 15393
c7b8f16e
JB		 15394 case 't':
15395 /* Byte swap code halfwords. */
15396 while (ptr + 1 < end)
15397 {
15398 tmp = contents[ptr];
15399 contents[ptr] = contents[ptr + 1];
15400 contents[ptr + 1] = tmp;
15401 ptr += 2;
15402 }
15403 break;
15404
15405 case 'd':
15406 /* Leave data alone. */
15407 break;
15408 }
15409 ptr = end;
15410 }
e489d0ae 15411 }
8e3de13a 15412
93204d3a 15413 free (map);
47b2e99c 15414 arm_data->mapcount = -1;
c7b8f16e 15415 arm_data->mapsize = 0;
8e3de13a 15416 arm_data->map = NULL;
8e3de13a 15417
e489d0ae
PB		 15418 return FALSE;
15419}
15420
0beaef2b
PB		 15421/* Mangle thumb function symbols as we read them in. */
15422
8384fb8f 15423static bfd_boolean
0beaef2b
PB		 15424elf32_arm_swap_symbol_in (bfd * abfd,
15425 const void *psrc,
15426 const void *pshn,
15427 Elf_Internal_Sym *dst)
15428{
8384fb8f
AM		 15429 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15430 return FALSE;
0beaef2b
PB		 15431
15432 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15433 the address. */
63e1a0fc
PB		 15434 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15435 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15436 {
63e1a0fc
PB		 15437 if (dst->st_value & 1)
15438 {
15439 dst->st_value &= ~(bfd_vma) 1;
15440 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15441 }
15442 else
15443 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15444 }
15445 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15446 {
15447 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15448 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15449 }
35fc36a8
RS		 15450 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15451 dst->st_target_internal = ST_BRANCH_LONG;
15452 else
63e1a0fc 15453 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15454
8384fb8f 15455 return TRUE;
0beaef2b
PB		 15456}
15457
15458
15459/* Mangle thumb function symbols as we write them out. */
15460
15461static void
15462elf32_arm_swap_symbol_out (bfd *abfd,
15463 const Elf_Internal_Sym *src,
15464 void *cdst,
15465 void *shndx)
15466{
15467 Elf_Internal_Sym newsym;
15468
15469 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15470 of the address set, as per the new EABI. We do this unconditionally
15471 because objcopy does not set the elf header flags until after
15472 it writes out the symbol table. */
35fc36a8 15473 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15474 {
15475 newsym = *src;
34e77a92
RS		 15476 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15477 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 15478 if (newsym.st_shndx != SHN_UNDEF)
15479 {
15480 /* Do this only for defined symbols. At link type, the static
15481 linker will simulate the work of dynamic linker of resolving
15482 symbols and will carry over the thumbness of found symbols to
15483 the output symbol table. It's not clear how it happens, but
b0fead2b 15484 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 15485 runtime, and writing '1' for them will be confusing for users
15486 and possibly for dynamic linker itself.
15487 */
15488 newsym.st_value |= 1;
15489 }
906e58ca 15490
0beaef2b
PB		 15491 src = &newsym;
15492 }
15493 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15494}
15495
b294bdf8
MM		 15496/* Add the PT_ARM_EXIDX program header. */
15497
15498static bfd_boolean
906e58ca 15499elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15500 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15501{
15502 struct elf_segment_map *m;
15503 asection *sec;
15504
15505 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15506 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15507 {
15508 /* If there is already a PT_ARM_EXIDX header, then we do not
15509 want to add another one. This situation arises when running
15510 "strip"; the input binary already has the header. */
15511 m = elf_tdata (abfd)->segment_map;
15512 while (m && m->p_type != PT_ARM_EXIDX)
15513 m = m->next;
15514 if (!m)
15515 {
21d799b5
NC		 15516 m = (struct elf_segment_map *)
15517 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15518 if (m == NULL)
15519 return FALSE;
15520 m->p_type = PT_ARM_EXIDX;
15521 m->count = 1;
15522 m->sections[0] = sec;
15523
15524 m->next = elf_tdata (abfd)->segment_map;
15525 elf_tdata (abfd)->segment_map = m;
15526 }
15527 }
15528
15529 return TRUE;
15530}
15531
15532/* We may add a PT_ARM_EXIDX program header. */
15533
15534static int
a6b96beb
AM		 15535elf32_arm_additional_program_headers (bfd *abfd,
15536 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15537{
15538 asection *sec;
15539
15540 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15541 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15542 return 1;
15543 else
15544 return 0;
15545}
15546
34e77a92
RS		 15547/* Hook called by the linker routine which adds symbols from an object
15548 file. */
15549
15550static bfd_boolean
15551elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15552 Elf_Internal_Sym *sym, const char **namep,
15553 flagword *flagsp, asection **secp, bfd_vma *valp)
15554{
15555 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15556 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15557 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15558 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15559
15560 if (elf32_arm_hash_table (info)->vxworks_p
15561 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15562 flagsp, secp, valp))
15563 return FALSE;
15564
15565 return TRUE;
15566}
15567
0beaef2b 15568/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15569const struct elf_size_info elf32_arm_size_info =
15570{
0beaef2b
PB		 15571 sizeof (Elf32_External_Ehdr),
15572 sizeof (Elf32_External_Phdr),
15573 sizeof (Elf32_External_Shdr),
15574 sizeof (Elf32_External_Rel),
15575 sizeof (Elf32_External_Rela),
15576 sizeof (Elf32_External_Sym),
15577 sizeof (Elf32_External_Dyn),
15578 sizeof (Elf_External_Note),
15579 4,
15580 1,
15581 32, 2,
15582 ELFCLASS32, EV_CURRENT,
15583 bfd_elf32_write_out_phdrs,
15584 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15585 bfd_elf32_checksum_contents,
0beaef2b
PB		 15586 bfd_elf32_write_relocs,
15587 elf32_arm_swap_symbol_in,
15588 elf32_arm_swap_symbol_out,
15589 bfd_elf32_slurp_reloc_table,
15590 bfd_elf32_slurp_symbol_table,
15591 bfd_elf32_swap_dyn_in,
15592 bfd_elf32_swap_dyn_out,
15593 bfd_elf32_swap_reloc_in,
15594 bfd_elf32_swap_reloc_out,
15595 bfd_elf32_swap_reloca_in,
15596 bfd_elf32_swap_reloca_out
15597};
15598
252b5132 15599#define ELF_ARCH bfd_arch_arm
ae95ffa6 15600#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15601#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15602#ifdef __QNXTARGET__
15603#define ELF_MAXPAGESIZE 0x1000
15604#else
f21f3fe0 15605#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15606#endif
b1342370 15607#define ELF_MINPAGESIZE 0x1000
24718e3b 15608#define ELF_COMMONPAGESIZE 0x1000
252b5132 15609
ba93b8ac
DJ		 15610#define bfd_elf32_mkobject elf32_arm_mkobject
15611
99e4ae17
AJ		 15612#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15613#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15614#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15615#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15616#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15617#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15618#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 15619#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15620#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15621#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15622#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15623#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15624#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15625
15626#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15627#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15628#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15629#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15630#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15631#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15632#define elf_backend_write_section elf32_arm_write_section
252b5132 15633#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15634#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15635#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15636#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15637#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15638#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15639#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15640#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15641#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15642#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15643#define elf_backend_fake_sections elf32_arm_fake_sections
15644#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15645#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15646#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15647#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15648#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15649#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15650#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15651#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15652#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15653
15654#define elf_backend_can_refcount 1
15655#define elf_backend_can_gc_sections 1
15656#define elf_backend_plt_readonly 1
15657#define elf_backend_want_got_plt 1
15658#define elf_backend_want_plt_sym 0
15659#define elf_backend_may_use_rel_p 1
15660#define elf_backend_may_use_rela_p 0
4e7fd91e 15661#define elf_backend_default_use_rela_p 0
252b5132 15662
04f7c78d 15663#define elf_backend_got_header_size 12
04f7c78d 15664
906e58ca
NC		 15665#undef elf_backend_obj_attrs_vendor
15666#define elf_backend_obj_attrs_vendor "aeabi"
15667#undef elf_backend_obj_attrs_section
15668#define elf_backend_obj_attrs_section ".ARM.attributes"
15669#undef elf_backend_obj_attrs_arg_type
15670#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15671#undef elf_backend_obj_attrs_section_type
104d59d1 15672#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 15673#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15674#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15675
252b5132 15676#include "elf32-target.h"
7f266840 15677
b38cadfb
NC		 15678/* Native Client targets. */
15679
15680#undef TARGET_LITTLE_SYM
15681#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15682#undef TARGET_LITTLE_NAME
15683#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15684#undef TARGET_BIG_SYM
15685#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15686#undef TARGET_BIG_NAME
15687#define TARGET_BIG_NAME "elf32-bigarm-nacl"
15688
15689/* Like elf32_arm_link_hash_table_create -- but overrides
15690 appropriately for NaCl. */
15691
15692static struct bfd_link_hash_table *
15693elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15694{
15695 struct bfd_link_hash_table *ret;
15696
15697 ret = elf32_arm_link_hash_table_create (abfd);
15698 if (ret)
15699 {
15700 struct elf32_arm_link_hash_table *htab
15701 = (struct elf32_arm_link_hash_table *) ret;
15702
15703 htab->nacl_p = 1;
15704
15705 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15706 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15707 }
15708 return ret;
15709}
15710
15711/* Since NaCl doesn't use the ARM-specific unwind format, we don't
15712 really need to use elf32_arm_modify_segment_map. But we do it
15713 anyway just to reduce gratuitous differences with the stock ARM backend. */
15714
15715static bfd_boolean
15716elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15717{
15718 return (elf32_arm_modify_segment_map (abfd, info)
15719 && nacl_modify_segment_map (abfd, info));
15720}
15721
15722#undef elf32_bed
15723#define elf32_bed elf32_arm_nacl_bed
15724#undef bfd_elf32_bfd_link_hash_table_create
15725#define bfd_elf32_bfd_link_hash_table_create \
15726 elf32_arm_nacl_link_hash_table_create
15727#undef elf_backend_plt_alignment
15728#define elf_backend_plt_alignment 4
15729#undef elf_backend_modify_segment_map
15730#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15731#undef elf_backend_modify_program_headers
15732#define elf_backend_modify_program_headers nacl_modify_program_headers
15733
15734#undef ELF_MAXPAGESIZE
15735#define ELF_MAXPAGESIZE 0x10000
15736
15737#include "elf32-target.h"
15738
15739/* Reset to defaults. */
15740#undef elf_backend_plt_alignment
15741#undef elf_backend_modify_segment_map
15742#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15743#undef elf_backend_modify_program_headers
15744
906e58ca 15745/* VxWorks Targets. */
4e7fd91e 15746
906e58ca 15747#undef TARGET_LITTLE_SYM
4e7fd91e 15748#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15749#undef TARGET_LITTLE_NAME
4e7fd91e 15750#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15751#undef TARGET_BIG_SYM
4e7fd91e 15752#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15753#undef TARGET_BIG_NAME
4e7fd91e
PB		 15754#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15755
15756/* Like elf32_arm_link_hash_table_create -- but overrides
15757 appropriately for VxWorks. */
906e58ca 15758
4e7fd91e
PB		 15759static struct bfd_link_hash_table *
15760elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15761{
15762 struct bfd_link_hash_table *ret;
15763
15764 ret = elf32_arm_link_hash_table_create (abfd);
15765 if (ret)
15766 {
15767 struct elf32_arm_link_hash_table *htab
00a97672 15768 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15769 htab->use_rel = 0;
00a97672 15770 htab->vxworks_p = 1;
4e7fd91e
PB		 15771 }
15772 return ret;
906e58ca 15773}
4e7fd91e 15774
00a97672
RS		 15775static void
15776elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15777{
15778 elf32_arm_final_write_processing (abfd, linker);
15779 elf_vxworks_final_write_processing (abfd, linker);
15780}
15781
906e58ca 15782#undef elf32_bed
4e7fd91e
PB		 15783#define elf32_bed elf32_arm_vxworks_bed
15784
906e58ca
NC		 15785#undef bfd_elf32_bfd_link_hash_table_create
15786#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15787#undef elf_backend_final_write_processing
15788#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15789#undef elf_backend_emit_relocs
15790#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15791
906e58ca 15792#undef elf_backend_may_use_rel_p
00a97672 15793#define elf_backend_may_use_rel_p 0
906e58ca 15794#undef elf_backend_may_use_rela_p
00a97672 15795#define elf_backend_may_use_rela_p 1
906e58ca 15796#undef elf_backend_default_use_rela_p
00a97672 15797#define elf_backend_default_use_rela_p 1
906e58ca 15798#undef elf_backend_want_plt_sym
00a97672 15799#define elf_backend_want_plt_sym 1
906e58ca 15800#undef ELF_MAXPAGESIZE
00a97672 15801#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15802
15803#include "elf32-target.h"
15804
15805
21d799b5
NC		 15806/* Merge backend specific data from an object file to the output
15807 object file when linking. */
15808
15809static bfd_boolean
15810elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15811{
15812 flagword out_flags;
15813 flagword in_flags;
15814 bfd_boolean flags_compatible = TRUE;
15815 asection *sec;
15816
cc643b88 15817 /* Check if we have the same endianness. */
21d799b5
NC		 15818 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15819 return FALSE;
15820
15821 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15822 return TRUE;
15823
15824 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15825 return FALSE;
15826
15827 /* The input BFD must have had its flags initialised. */
15828 /* The following seems bogus to me -- The flags are initialized in
15829 the assembler but I don't think an elf_flags_init field is
15830 written into the object. */
15831 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15832
15833 in_flags = elf_elfheader (ibfd)->e_flags;
15834 out_flags = elf_elfheader (obfd)->e_flags;
15835
15836 /* In theory there is no reason why we couldn't handle this. However
15837 in practice it isn't even close to working and there is no real
15838 reason to want it. */
15839 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15840 && !(ibfd->flags & DYNAMIC)
15841 && (in_flags & EF_ARM_BE8))
15842 {
15843 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15844 ibfd);
15845 return FALSE;
15846 }
15847
15848 if (!elf_flags_init (obfd))
15849 {
15850 /* If the input is the default architecture and had the default
15851 flags then do not bother setting the flags for the output
15852 architecture, instead allow future merges to do this. If no
15853 future merges ever set these flags then they will retain their
15854 uninitialised values, which surprise surprise, correspond
15855 to the default values. */
15856 if (bfd_get_arch_info (ibfd)->the_default
15857 && elf_elfheader (ibfd)->e_flags == 0)
15858 return TRUE;
15859
15860 elf_flags_init (obfd) = TRUE;
15861 elf_elfheader (obfd)->e_flags = in_flags;
15862
15863 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15864 && bfd_get_arch_info (obfd)->the_default)
15865 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15866
15867 return TRUE;
15868 }
15869
15870 /* Determine what should happen if the input ARM architecture
15871 does not match the output ARM architecture. */
15872 if (! bfd_arm_merge_machines (ibfd, obfd))
15873 return FALSE;
15874
15875 /* Identical flags must be compatible. */
15876 if (in_flags == out_flags)
15877 return TRUE;
15878
15879 /* Check to see if the input BFD actually contains any sections. If
15880 not, its flags may not have been initialised either, but it
15881 cannot actually cause any incompatiblity. Do not short-circuit
15882 dynamic objects; their section list may be emptied by
15883 elf_link_add_object_symbols.
15884
15885 Also check to see if there are no code sections in the input.
15886 In this case there is no need to check for code specific flags.
15887 XXX - do we need to worry about floating-point format compatability
15888 in data sections ? */
15889 if (!(ibfd->flags & DYNAMIC))
15890 {
15891 bfd_boolean null_input_bfd = TRUE;
15892 bfd_boolean only_data_sections = TRUE;
15893
15894 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15895 {
15896 /* Ignore synthetic glue sections. */
15897 if (strcmp (sec->name, ".glue_7")
15898 && strcmp (sec->name, ".glue_7t"))
15899 {
15900 if ((bfd_get_section_flags (ibfd, sec)
15901 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15902 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15903 only_data_sections = FALSE;
15904
15905 null_input_bfd = FALSE;
15906 break;
15907 }
15908 }
15909
15910 if (null_input_bfd || only_data_sections)
15911 return TRUE;
15912 }
15913
15914 /* Complain about various flag mismatches. */
15915 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15916 EF_ARM_EABI_VERSION (out_flags)))
15917 {
15918 _bfd_error_handler
15919 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15920 ibfd, obfd,
15921 (in_flags & EF_ARM_EABIMASK) >> 24,
15922 (out_flags & EF_ARM_EABIMASK) >> 24);
15923 return FALSE;
15924 }
15925
15926 /* Not sure what needs to be checked for EABI versions >= 1. */
15927 /* VxWorks libraries do not use these flags. */
15928 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15929 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15930 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15931 {
15932 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15933 {
15934 _bfd_error_handler
15935 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15936 ibfd, obfd,
15937 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15938 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15939 flags_compatible = FALSE;
15940 }
15941
15942 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15943 {
15944 if (in_flags & EF_ARM_APCS_FLOAT)
15945 _bfd_error_handler
15946 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15947 ibfd, obfd);
15948 else
15949 _bfd_error_handler
15950 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15951 ibfd, obfd);
15952
15953 flags_compatible = FALSE;
15954 }
15955
15956 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15957 {
15958 if (in_flags & EF_ARM_VFP_FLOAT)
15959 _bfd_error_handler
15960 (_("error: %B uses VFP instructions, whereas %B does not"),
15961 ibfd, obfd);
15962 else
15963 _bfd_error_handler
15964 (_("error: %B uses FPA instructions, whereas %B does not"),
15965 ibfd, obfd);
15966
15967 flags_compatible = FALSE;
15968 }
15969
15970 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15971 {
15972 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15973 _bfd_error_handler
15974 (_("error: %B uses Maverick instructions, whereas %B does not"),
15975 ibfd, obfd);
15976 else
15977 _bfd_error_handler
15978 (_("error: %B does not use Maverick instructions, whereas %B does"),
15979 ibfd, obfd);
15980
15981 flags_compatible = FALSE;
15982 }
15983
15984#ifdef EF_ARM_SOFT_FLOAT
15985 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15986 {
15987 /* We can allow interworking between code that is VFP format
15988 layout, and uses either soft float or integer regs for
15989 passing floating point arguments and results. We already
15990 know that the APCS_FLOAT flags match; similarly for VFP
15991 flags. */
15992 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15993 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15994 {
15995 if (in_flags & EF_ARM_SOFT_FLOAT)
15996 _bfd_error_handler
15997 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15998 ibfd, obfd);
15999 else
16000 _bfd_error_handler
16001 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16002 ibfd, obfd);
16003
16004 flags_compatible = FALSE;
16005 }
16006 }
16007#endif
16008
16009 /* Interworking mismatch is only a warning. */
16010 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16011 {
16012 if (in_flags & EF_ARM_INTERWORK)
16013 {
16014 _bfd_error_handler
16015 (_("Warning: %B supports interworking, whereas %B does not"),
16016 ibfd, obfd);
16017 }
16018 else
16019 {
16020 _bfd_error_handler
16021 (_("Warning: %B does not support interworking, whereas %B does"),
16022 ibfd, obfd);
16023 }
16024 }
16025 }
16026
16027 return flags_compatible;
16028}
16029
16030
906e58ca 16031/* Symbian OS Targets. */
7f266840 16032
906e58ca 16033#undef TARGET_LITTLE_SYM
7f266840 16034#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 16035#undef TARGET_LITTLE_NAME
7f266840 16036#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16037#undef TARGET_BIG_SYM
7f266840 16038#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 16039#undef TARGET_BIG_NAME
7f266840
DJ		 16040#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16041
16042/* Like elf32_arm_link_hash_table_create -- but overrides
16043 appropriately for Symbian OS. */
906e58ca 16044
7f266840
DJ		 16045static struct bfd_link_hash_table *
16046elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16047{
16048 struct bfd_link_hash_table *ret;
16049
16050 ret = elf32_arm_link_hash_table_create (abfd);
16051 if (ret)
16052 {
16053 struct elf32_arm_link_hash_table *htab
16054 = (struct elf32_arm_link_hash_table *)ret;
16055 /* There is no PLT header for Symbian OS. */
16056 htab->plt_header_size = 0;
95720a86
DJ		 16057 /* The PLT entries are each one instruction and one word. */
16058 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16059 htab->symbian_p = 1;
33bfe774
JB		 16060 /* Symbian uses armv5t or above, so use_blx is always true. */
16061 htab->use_blx = 1;
67687978 16062 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16063 }
16064 return ret;
906e58ca 16065}
7f266840 16066
b35d266b 16067static const struct bfd_elf_special_section
551b43fd 16068elf32_arm_symbian_special_sections[] =
7f266840 16069{
5cd3778d
MM		 16070 /* In a BPABI executable, the dynamic linking sections do not go in
16071 the loadable read-only segment. The post-linker may wish to
16072 refer to these sections, but they are not part of the final
16073 program image. */
0112cd26
NC		 16074 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16075 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16076 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16077 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16078 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16079 /* These sections do not need to be writable as the SymbianOS
16080 postlinker will arrange things so that no dynamic relocation is
16081 required. */
0112cd26
NC		 16082 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16083 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16084 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16085 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16086};
16087
c3c76620 16088static void
906e58ca 16089elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16090 struct bfd_link_info *link_info)
c3c76620
MM		 16091{
16092 /* BPABI objects are never loaded directly by an OS kernel; they are
16093 processed by a postlinker first, into an OS-specific format. If
16094 the D_PAGED bit is set on the file, BFD will align segments on
16095 page boundaries, so that an OS can directly map the file. With
16096 BPABI objects, that just results in wasted space. In addition,
16097 because we clear the D_PAGED bit, map_sections_to_segments will
16098 recognize that the program headers should not be mapped into any
16099 loadable segment. */
16100 abfd->flags &= ~D_PAGED;
906e58ca 16101 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16102}
7f266840
DJ		 16103
16104static bfd_boolean
906e58ca 16105elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16106 struct bfd_link_info *info)
7f266840
DJ		 16107{
16108 struct elf_segment_map *m;
16109 asection *dynsec;
16110
7f266840
DJ		 16111 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16112 segment. However, because the .dynamic section is not marked
16113 with SEC_LOAD, the generic ELF code will not create such a
16114 segment. */
16115 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16116 if (dynsec)
16117 {
8ded5a0f
AM		 16118 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
16119 if (m->p_type == PT_DYNAMIC)
16120 break;
16121
16122 if (m == NULL)
16123 {
16124 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16125 m->next = elf_tdata (abfd)->segment_map;
16126 elf_tdata (abfd)->segment_map = m;
16127 }
7f266840
DJ		 16128 }
16129
b294bdf8
MM		 16130 /* Also call the generic arm routine. */
16131 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16132}
16133
95720a86
DJ		 16134/* Return address for Ith PLT stub in section PLT, for relocation REL
16135 or (bfd_vma) -1 if it should not be included. */
16136
16137static bfd_vma
16138elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16139 const arelent *rel ATTRIBUTE_UNUSED)
16140{
16141 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16142}
16143
16144
8029a119 16145#undef elf32_bed
7f266840
DJ		 16146#define elf32_bed elf32_arm_symbian_bed
16147
16148/* The dynamic sections are not allocated on SymbianOS; the postlinker
16149 will process them and then discard them. */
906e58ca 16150#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16151#define ELF_DYNAMIC_SEC_FLAGS \
16152 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16153
00a97672 16154#undef elf_backend_emit_relocs
c3c76620 16155
906e58ca
NC		 16156#undef bfd_elf32_bfd_link_hash_table_create
16157#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16158#undef elf_backend_special_sections
16159#define elf_backend_special_sections elf32_arm_symbian_special_sections
16160#undef elf_backend_begin_write_processing
16161#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16162#undef elf_backend_final_write_processing
16163#define elf_backend_final_write_processing elf32_arm_final_write_processing
16164
16165#undef elf_backend_modify_segment_map
7f266840
DJ		 16166#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16167
16168/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16169#undef elf_backend_got_header_size
7f266840
DJ		 16170#define elf_backend_got_header_size 0
16171
16172/* Similarly, there is no .got.plt section. */
906e58ca 16173#undef elf_backend_want_got_plt
7f266840
DJ		 16174#define elf_backend_want_got_plt 0
16175
906e58ca 16176#undef elf_backend_plt_sym_val
95720a86
DJ		 16177#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16178
906e58ca 16179#undef elf_backend_may_use_rel_p
00a97672 16180#define elf_backend_may_use_rel_p 1
906e58ca 16181#undef elf_backend_may_use_rela_p
00a97672 16182#define elf_backend_may_use_rela_p 0
906e58ca 16183#undef elf_backend_default_use_rela_p
00a97672 16184#define elf_backend_default_use_rela_p 0
906e58ca 16185#undef elf_backend_want_plt_sym
00a97672 16186#define elf_backend_want_plt_sym 0
906e58ca 16187#undef ELF_MAXPAGESIZE
00a97672 16188#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16189
7f266840 16190#include "elf32-target.h"
GDB Binutils - Deliverables
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