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2009-06-16 Tristan Gingold <gingold@adacore.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c
AM		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
48229727
JB		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2031 is inserted in arm_build_one_stub(). */
2032#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2033#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2034#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2035#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2036#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2037#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2038
2039typedef struct
2040{
2041 bfd_vma data;
2042 enum stub_insn_type type;
ebe24dd4 2043 unsigned int r_type;
461a49ca
DJ		 2044 int reloc_addend;
2045} insn_sequence;
2046
fea2b4d6
CL		 2047/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2048 to reach the stub if necessary. */
461a49ca 2049static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2050 {
461a49ca
DJ		 2051 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2052 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2053 };
2054
fea2b4d6
CL		 2055/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2056 available. */
461a49ca 2057static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2058 {
461a49ca
DJ		 2059 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2060 ARM_INSN(0xe12fff1c), /* bx ip */
2061 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2062 };
2063
d3626fb0 2064/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2065static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2066 {
461a49ca
DJ		 2067 THUMB16_INSN(0xb401), /* push {r0} */
2068 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2069 THUMB16_INSN(0x4684), /* mov ip, r0 */
2070 THUMB16_INSN(0xbc01), /* pop {r0} */
2071 THUMB16_INSN(0x4760), /* bx ip */
2072 THUMB16_INSN(0xbf00), /* nop */
2073 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2074 };
2075
d3626fb0
CL		 2076/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2077 allowed. */
2078static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2079 {
2080 THUMB16_INSN(0x4778), /* bx pc */
2081 THUMB16_INSN(0x46c0), /* nop */
2082 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2083 ARM_INSN(0xe12fff1c), /* bx ip */
2084 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2085 };
2086
fea2b4d6
CL		 2087/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2088 available. */
461a49ca 2089static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2090 {
461a49ca
DJ		 2091 THUMB16_INSN(0x4778), /* bx pc */
2092 THUMB16_INSN(0x46c0), /* nop */
2093 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2094 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2095 };
2096
fea2b4d6
CL		 2097/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2098 one, when the destination is close enough. */
461a49ca 2099static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2100 {
461a49ca
DJ		 2101 THUMB16_INSN(0x4778), /* bx pc */
2102 THUMB16_INSN(0x46c0), /* nop */
2103 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2104 };
2105
cf3eccff 2106/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2107 blx to reach the stub if necessary. */
cf3eccff 2108static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2109 {
461a49ca
DJ		 2110 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2111 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2112 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2113 };
2114
cf3eccff
DJ		 2115/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2116 blx to reach the stub if necessary. We can not add into pc;
2117 it is not guaranteed to mode switch (different in ARMv6 and
2118 ARMv7). */
2119static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2120 {
2121 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2122 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2123 ARM_INSN(0xe12fff1c), /* bx ip */
2124 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2125 };
2126
ebe24dd4
CL		 2127/* V4T ARM -> ARM long branch stub, PIC. */
2128static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2129 {
2130 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2131 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2132 ARM_INSN(0xe12fff1c), /* bx ip */
2133 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2134 };
2135
2136/* V4T Thumb -> ARM long branch stub, PIC. */
2137static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2138 {
2139 THUMB16_INSN(0x4778), /* bx pc */
2140 THUMB16_INSN(0x46c0), /* nop */
2141 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2142 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2143 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2144 };
2145
d3626fb0
CL		 2146/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2147 architectures. */
ebe24dd4
CL		 2148static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2149 {
2150 THUMB16_INSN(0xb401), /* push {r0} */
2151 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2152 THUMB16_INSN(0x46fc), /* mov ip, pc */
2153 THUMB16_INSN(0x4484), /* add ip, r0 */
2154 THUMB16_INSN(0xbc01), /* pop {r0} */
2155 THUMB16_INSN(0x4760), /* bx ip */
2156 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2157 };
2158
d3626fb0
CL		 2159/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2160 allowed. */
2161static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2162 {
2163 THUMB16_INSN(0x4778), /* bx pc */
2164 THUMB16_INSN(0x46c0), /* nop */
2165 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2166 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2167 ARM_INSN(0xe12fff1c), /* bx ip */
2168 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2169 };
2170
48229727
JB		 2171/* Cortex-A8 erratum-workaround stubs. */
2172
2173/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2174 can't use a conditional branch to reach this stub). */
2175
2176static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2177 {
2178 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2179 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2180 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2181 };
2182
2183/* Stub used for b.w and bl.w instructions. */
2184
2185static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2186 {
2187 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2188 };
2189
2190static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2191 {
2192 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2193 };
2194
2195/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2196 instruction (which switches to ARM mode) to point to this stub. Jump to the
2197 real destination using an ARM-mode branch. */
2198
2199static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2200 {
2201 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2202 };
2203
906e58ca
NC		 2204/* Section name for stubs is the associated section name plus this
2205 string. */
2206#define STUB_SUFFIX ".stub"
2207
738a79f6
CL		 2208/* One entry per long/short branch stub defined above. */
2209#define DEF_STUBS \
2210 DEF_STUB(long_branch_any_any) \
2211 DEF_STUB(long_branch_v4t_arm_thumb) \
2212 DEF_STUB(long_branch_thumb_only) \
2213 DEF_STUB(long_branch_v4t_thumb_thumb) \
2214 DEF_STUB(long_branch_v4t_thumb_arm) \
2215 DEF_STUB(short_branch_v4t_thumb_arm) \
2216 DEF_STUB(long_branch_any_arm_pic) \
2217 DEF_STUB(long_branch_any_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2220 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2221 DEF_STUB(long_branch_thumb_only_pic) \
2222 DEF_STUB(a8_veneer_b_cond) \
2223 DEF_STUB(a8_veneer_b) \
2224 DEF_STUB(a8_veneer_bl) \
2225 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2226
2227#define DEF_STUB(x) arm_stub_##x,
2228enum elf32_arm_stub_type {
906e58ca 2229 arm_stub_none,
738a79f6
CL		 2230 DEF_STUBS
2231};
2232#undef DEF_STUB
2233
2234typedef struct
2235{
2236 const insn_sequence* template;
2237 int template_size;
2238} stub_def;
2239
2240#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2241static const stub_def stub_definitions[] = {
2242 {NULL, 0},
2243 DEF_STUBS
906e58ca
NC		 2244};
2245
2246struct elf32_arm_stub_hash_entry
2247{
2248 /* Base hash table entry structure. */
2249 struct bfd_hash_entry root;
2250
2251 /* The stub section. */
2252 asection *stub_sec;
2253
2254 /* Offset within stub_sec of the beginning of this stub. */
2255 bfd_vma stub_offset;
2256
2257 /* Given the symbol's value and its section we can determine its final
2258 value when building the stubs (so the stub knows where to jump). */
2259 bfd_vma target_value;
2260 asection *target_section;
2261
48229727
JB		 2262 /* Offset to apply to relocation referencing target_value. */
2263 bfd_vma target_addend;
2264
2265 /* The instruction which caused this stub to be generated (only valid for
2266 Cortex-A8 erratum workaround stubs at present). */
2267 unsigned long orig_insn;
2268
461a49ca 2269 /* The stub type. */
906e58ca 2270 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2271 /* Its encoding size in bytes. */
2272 int stub_size;
2273 /* Its template. */
2274 const insn_sequence *stub_template;
2275 /* The size of the template (number of entries). */
2276 int stub_template_size;
906e58ca
NC		 2277
2278 /* The symbol table entry, if any, that this was derived from. */
2279 struct elf32_arm_link_hash_entry *h;
2280
2281 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2282 unsigned char st_type;
2283
2284 /* Where this stub is being called from, or, in the case of combined
2285 stub sections, the first input section in the group. */
2286 asection *id_sec;
7413f23f
DJ		 2287
2288 /* The name for the local symbol at the start of this stub. The
2289 stub name in the hash table has to be unique; this does not, so
2290 it can be friendlier. */
2291 char *output_name;
906e58ca
NC		 2292};
2293
e489d0ae
PB		 2294/* Used to build a map of a section. This is required for mixed-endian
2295 code/data. */
2296
2297typedef struct elf32_elf_section_map
2298{
2299 bfd_vma vma;
2300 char type;
2301}
2302elf32_arm_section_map;
2303
c7b8f16e
JB		 2304/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2305
2306typedef enum
2307{
2308 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2309 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2310 VFP11_ERRATUM_ARM_VENEER,
2311 VFP11_ERRATUM_THUMB_VENEER
2312}
2313elf32_vfp11_erratum_type;
2314
2315typedef struct elf32_vfp11_erratum_list
2316{
2317 struct elf32_vfp11_erratum_list *next;
2318 bfd_vma vma;
2319 union
2320 {
2321 struct
2322 {
2323 struct elf32_vfp11_erratum_list *veneer;
2324 unsigned int vfp_insn;
2325 } b;
2326 struct
2327 {
2328 struct elf32_vfp11_erratum_list *branch;
2329 unsigned int id;
2330 } v;
2331 } u;
2332 elf32_vfp11_erratum_type type;
2333}
2334elf32_vfp11_erratum_list;
2335
2468f9c9
PB		 2336typedef enum
2337{
2338 DELETE_EXIDX_ENTRY,
2339 INSERT_EXIDX_CANTUNWIND_AT_END
2340}
2341arm_unwind_edit_type;
2342
2343/* A (sorted) list of edits to apply to an unwind table. */
2344typedef struct arm_unwind_table_edit
2345{
2346 arm_unwind_edit_type type;
2347 /* Note: we sometimes want to insert an unwind entry corresponding to a
2348 section different from the one we're currently writing out, so record the
2349 (text) section this edit relates to here. */
2350 asection *linked_section;
2351 unsigned int index;
2352 struct arm_unwind_table_edit *next;
2353}
2354arm_unwind_table_edit;
2355
8e3de13a 2356typedef struct _arm_elf_section_data
e489d0ae 2357{
2468f9c9 2358 /* Information about mapping symbols. */
e489d0ae 2359 struct bfd_elf_section_data elf;
8e3de13a 2360 unsigned int mapcount;
c7b8f16e 2361 unsigned int mapsize;
e489d0ae 2362 elf32_arm_section_map *map;
2468f9c9 2363 /* Information about CPU errata. */
c7b8f16e
JB		 2364 unsigned int erratumcount;
2365 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2366 /* Information about unwind tables. */
2367 union
2368 {
2369 /* Unwind info attached to a text section. */
2370 struct
2371 {
2372 asection *arm_exidx_sec;
2373 } text;
2374
2375 /* Unwind info attached to an .ARM.exidx section. */
2376 struct
2377 {
2378 arm_unwind_table_edit *unwind_edit_list;
2379 arm_unwind_table_edit *unwind_edit_tail;
2380 } exidx;
2381 } u;
8e3de13a
NC		 2382}
2383_arm_elf_section_data;
e489d0ae
PB		 2384
2385#define elf32_arm_section_data(sec) \
8e3de13a 2386 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2387
48229727
JB		 2388/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2389 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2390 so may be created multiple times: we use an array of these entries whilst
2391 relaxing which we can refresh easily, then create stubs for each potentially
2392 erratum-triggering instruction once we've settled on a solution. */
2393
2394struct a8_erratum_fix {
2395 bfd *input_bfd;
2396 asection *section;
2397 bfd_vma offset;
2398 bfd_vma addend;
2399 unsigned long orig_insn;
2400 char *stub_name;
2401 enum elf32_arm_stub_type stub_type;
2402};
2403
2404/* A table of relocs applied to branches which might trigger Cortex-A8
2405 erratum. */
2406
2407struct a8_erratum_reloc {
2408 bfd_vma from;
2409 bfd_vma destination;
2410 unsigned int r_type;
2411 unsigned char st_type;
2412 const char *sym_name;
2413 bfd_boolean non_a8_stub;
2414};
2415
ba93b8ac
DJ		 2416/* The size of the thread control block. */
2417#define TCB_SIZE 8
2418
0ffa91dd 2419struct elf_arm_obj_tdata
ba93b8ac
DJ		 2420{
2421 struct elf_obj_tdata root;
2422
2423 /* tls_type for each local got entry. */
2424 char *local_got_tls_type;
ee065d83 2425
bf21ed78
MS		 2426 /* Zero to warn when linking objects with incompatible enum sizes. */
2427 int no_enum_size_warning;
a9dc9481
JM		 2428
2429 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2430 int no_wchar_size_warning;
ba93b8ac
DJ		 2431};
2432
0ffa91dd
NC		 2433#define elf_arm_tdata(bfd) \
2434 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2435
0ffa91dd
NC		 2436#define elf32_arm_local_got_tls_type(bfd) \
2437 (elf_arm_tdata (bfd)->local_got_tls_type)
2438
2439#define is_arm_elf(bfd) \
2440 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2441 && elf_tdata (bfd) != NULL \
2442 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2443
2444static bfd_boolean
2445elf32_arm_mkobject (bfd *abfd)
2446{
0ffa91dd
NC		 2447 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2448 ARM_ELF_TDATA);
ba93b8ac
DJ		 2449}
2450
252b5132
RH		 2451/* The ARM linker needs to keep track of the number of relocs that it
2452 decides to copy in check_relocs for each symbol. This is so that
2453 it can discard PC relative relocs if it doesn't need them when
2454 linking with -Bsymbolic. We store the information in a field
2455 extending the regular ELF linker hash table. */
2456
ba93b8ac
DJ		 2457/* This structure keeps track of the number of relocs we have copied
2458 for a given symbol. */
5e681ec4 2459struct elf32_arm_relocs_copied
917583ad
NC		 2460 {
2461 /* Next section. */
5e681ec4 2462 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2463 /* A section in dynobj. */
2464 asection * section;
2465 /* Number of relocs copied in this section. */
2466 bfd_size_type count;
ba93b8ac
DJ		 2467 /* Number of PC-relative relocs copied in this section. */
2468 bfd_size_type pc_count;
917583ad 2469 };
252b5132 2470
ba93b8ac
DJ		 2471#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2472
ba96a88f 2473/* Arm ELF linker hash entry. */
252b5132 2474struct elf32_arm_link_hash_entry
917583ad
NC		 2475 {
2476 struct elf_link_hash_entry root;
252b5132 2477
917583ad 2478 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2479 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2480
2481 /* We reference count Thumb references to a PLT entry separately,
2482 so that we can emit the Thumb trampoline only if needed. */
2483 bfd_signed_vma plt_thumb_refcount;
2484
bd97cb95
DJ		 2485 /* Some references from Thumb code may be eliminated by BL->BLX
2486 conversion, so record them separately. */
2487 bfd_signed_vma plt_maybe_thumb_refcount;
2488
b7693d02
DJ		 2489 /* Since PLT entries have variable size if the Thumb prologue is
2490 used, we need to record the index into .got.plt instead of
2491 recomputing it from the PLT offset. */
2492 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2493
2494#define GOT_UNKNOWN 0
2495#define GOT_NORMAL 1
2496#define GOT_TLS_GD 2
2497#define GOT_TLS_IE 4
2498 unsigned char tls_type;
a4fd1a8e
PB		 2499
2500 /* The symbol marking the real symbol location for exported thumb
2501 symbols with Arm stubs. */
2502 struct elf_link_hash_entry *export_glue;
906e58ca 2503
da5938a2 2504 /* A pointer to the most recently used stub hash entry against this
8029a119 2505 symbol. */
da5938a2 2506 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2507 };
252b5132 2508
252b5132 2509/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2510#define elf32_arm_link_hash_traverse(table, func, info) \
2511 (elf_link_hash_traverse \
2512 (&(table)->root, \
b7693d02 2513 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2514 (info)))
2515
2516/* Get the ARM elf linker hash table from a link_info structure. */
2517#define elf32_arm_hash_table(info) \
2518 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2519
906e58ca
NC		 2520#define arm_stub_hash_lookup(table, string, create, copy) \
2521 ((struct elf32_arm_stub_hash_entry *) \
2522 bfd_hash_lookup ((table), (string), (create), (copy)))
2523
9b485d32 2524/* ARM ELF linker hash table. */
252b5132 2525struct elf32_arm_link_hash_table
906e58ca
NC		 2526{
2527 /* The main hash table. */
2528 struct elf_link_hash_table root;
252b5132 2529
906e58ca
NC		 2530 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2531 bfd_size_type thumb_glue_size;
252b5132 2532
906e58ca
NC		 2533 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2534 bfd_size_type arm_glue_size;
252b5132 2535
906e58ca
NC		 2536 /* The size in bytes of section containing the ARMv4 BX veneers. */
2537 bfd_size_type bx_glue_size;
845b51d6 2538
906e58ca
NC		 2539 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2540 veneer has been populated. */
2541 bfd_vma bx_glue_offset[15];
845b51d6 2542
906e58ca
NC		 2543 /* The size in bytes of the section containing glue for VFP11 erratum
2544 veneers. */
2545 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2546
48229727
JB		 2547 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2548 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2549 elf32_arm_write_section(). */
2550 struct a8_erratum_fix *a8_erratum_fixes;
2551 unsigned int num_a8_erratum_fixes;
2552
906e58ca
NC		 2553 /* An arbitrary input BFD chosen to hold the glue sections. */
2554 bfd * bfd_of_glue_owner;
ba96a88f 2555
906e58ca
NC		 2556 /* Nonzero to output a BE8 image. */
2557 int byteswap_code;
e489d0ae 2558
906e58ca
NC		 2559 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2560 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2561 int target1_is_rel;
9c504268 2562
906e58ca
NC		 2563 /* The relocation to use for R_ARM_TARGET2 relocations. */
2564 int target2_reloc;
eb043451 2565
906e58ca
NC		 2566 /* 0 = Ignore R_ARM_V4BX.
2567 1 = Convert BX to MOV PC.
2568 2 = Generate v4 interworing stubs. */
2569 int fix_v4bx;
319850b4 2570
48229727
JB		 2571 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2572 int fix_cortex_a8;
2573
906e58ca
NC		 2574 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2575 int use_blx;
33bfe774 2576
906e58ca
NC		 2577 /* What sort of code sequences we should look for which may trigger the
2578 VFP11 denorm erratum. */
2579 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2580
906e58ca
NC		 2581 /* Global counter for the number of fixes we have emitted. */
2582 int num_vfp11_fixes;
c7b8f16e 2583
906e58ca
NC		 2584 /* Nonzero to force PIC branch veneers. */
2585 int pic_veneer;
27e55c4d 2586
906e58ca
NC		 2587 /* The number of bytes in the initial entry in the PLT. */
2588 bfd_size_type plt_header_size;
e5a52504 2589
906e58ca
NC		 2590 /* The number of bytes in the subsequent PLT etries. */
2591 bfd_size_type plt_entry_size;
e5a52504 2592
906e58ca
NC		 2593 /* True if the target system is VxWorks. */
2594 int vxworks_p;
00a97672 2595
906e58ca
NC		 2596 /* True if the target system is Symbian OS. */
2597 int symbian_p;
e5a52504 2598
906e58ca
NC		 2599 /* True if the target uses REL relocations. */
2600 int use_rel;
4e7fd91e 2601
906e58ca
NC		 2602 /* Short-cuts to get to dynamic linker sections. */
2603 asection *sgot;
2604 asection *sgotplt;
2605 asection *srelgot;
2606 asection *splt;
2607 asection *srelplt;
2608 asection *sdynbss;
2609 asection *srelbss;
5e681ec4 2610
906e58ca
NC		 2611 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2612 asection *srelplt2;
00a97672 2613
906e58ca
NC		 2614 /* Data for R_ARM_TLS_LDM32 relocations. */
2615 union
2616 {
2617 bfd_signed_vma refcount;
2618 bfd_vma offset;
2619 } tls_ldm_got;
b7693d02 2620
906e58ca
NC		 2621 /* Small local sym to section mapping cache. */
2622 struct sym_sec_cache sym_sec;
2623
2624 /* For convenience in allocate_dynrelocs. */
2625 bfd * obfd;
2626
2627 /* The stub hash table. */
2628 struct bfd_hash_table stub_hash_table;
2629
2630 /* Linker stub bfd. */
2631 bfd *stub_bfd;
2632
2633 /* Linker call-backs. */
2634 asection * (*add_stub_section) (const char *, asection *);
2635 void (*layout_sections_again) (void);
2636
2637 /* Array to keep track of which stub sections have been created, and
2638 information on stub grouping. */
2639 struct map_stub
2640 {
2641 /* This is the section to which stubs in the group will be
2642 attached. */
2643 asection *link_sec;
2644 /* The stub section. */
2645 asection *stub_sec;
2646 } *stub_group;
2647
2648 /* Assorted information used by elf32_arm_size_stubs. */
2649 unsigned int bfd_count;
2650 int top_index;
2651 asection **input_list;
2652};
252b5132 2653
780a67af
NC		 2654/* Create an entry in an ARM ELF linker hash table. */
2655
2656static struct bfd_hash_entry *
57e8b36a
NC		 2657elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2658 struct bfd_hash_table * table,
2659 const char * string)
780a67af
NC		 2660{
2661 struct elf32_arm_link_hash_entry * ret =
2662 (struct elf32_arm_link_hash_entry *) entry;
2663
2664 /* Allocate the structure if it has not already been allocated by a
2665 subclass. */
906e58ca 2666 if (ret == NULL)
57e8b36a
NC		 2667 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2668 if (ret == NULL)
780a67af
NC		 2669 return (struct bfd_hash_entry *) ret;
2670
2671 /* Call the allocation method of the superclass. */
2672 ret = ((struct elf32_arm_link_hash_entry *)
2673 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2674 table, string));
57e8b36a 2675 if (ret != NULL)
b7693d02
DJ		 2676 {
2677 ret->relocs_copied = NULL;
ba93b8ac 2678 ret->tls_type = GOT_UNKNOWN;
b7693d02 2679 ret->plt_thumb_refcount = 0;
bd97cb95 2680 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2681 ret->plt_got_offset = -1;
a4fd1a8e 2682 ret->export_glue = NULL;
906e58ca
NC		 2683
2684 ret->stub_cache = NULL;
b7693d02 2685 }
780a67af
NC		 2686
2687 return (struct bfd_hash_entry *) ret;
2688}
2689
906e58ca
NC		 2690/* Initialize an entry in the stub hash table. */
2691
2692static struct bfd_hash_entry *
2693stub_hash_newfunc (struct bfd_hash_entry *entry,
2694 struct bfd_hash_table *table,
2695 const char *string)
2696{
2697 /* Allocate the structure if it has not already been allocated by a
2698 subclass. */
2699 if (entry == NULL)
2700 {
2701 entry = bfd_hash_allocate (table,
2702 sizeof (struct elf32_arm_stub_hash_entry));
2703 if (entry == NULL)
2704 return entry;
2705 }
2706
2707 /* Call the allocation method of the superclass. */
2708 entry = bfd_hash_newfunc (entry, table, string);
2709 if (entry != NULL)
2710 {
2711 struct elf32_arm_stub_hash_entry *eh;
2712
2713 /* Initialize the local fields. */
2714 eh = (struct elf32_arm_stub_hash_entry *) entry;
2715 eh->stub_sec = NULL;
2716 eh->stub_offset = 0;
2717 eh->target_value = 0;
2718 eh->target_section = NULL;
2719 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2720 eh->stub_size = 0;
2721 eh->stub_template = NULL;
2722 eh->stub_template_size = 0;
906e58ca
NC		 2723 eh->h = NULL;
2724 eh->id_sec = NULL;
2725 }
2726
2727 return entry;
2728}
2729
00a97672 2730/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2731 shortcuts to them in our hash table. */
2732
2733static bfd_boolean
57e8b36a 2734create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2735{
2736 struct elf32_arm_link_hash_table *htab;
2737
e5a52504
MM		 2738 htab = elf32_arm_hash_table (info);
2739 /* BPABI objects never have a GOT, or associated sections. */
2740 if (htab->symbian_p)
2741 return TRUE;
2742
5e681ec4
PB		 2743 if (! _bfd_elf_create_got_section (dynobj, info))
2744 return FALSE;
2745
5e681ec4
PB		 2746 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2747 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2748 if (!htab->sgot || !htab->sgotplt)
2749 abort ();
2750
00a97672
RS		 2751 htab->srelgot = bfd_make_section_with_flags (dynobj,
2752 RELOC_SECTION (htab, ".got"),
3496cb2a
L		 2753 (SEC_ALLOC | SEC_LOAD
2754 | SEC_HAS_CONTENTS
2755 | SEC_IN_MEMORY
2756 | SEC_LINKER_CREATED
2757 | SEC_READONLY));
5e681ec4 2758 if (htab->srelgot == NULL
5e681ec4
PB		 2759 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2760 return FALSE;
2761 return TRUE;
2762}
2763
00a97672
RS		 2764/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2765 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2766 hash table. */
2767
2768static bfd_boolean
57e8b36a 2769elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2770{
2771 struct elf32_arm_link_hash_table *htab;
2772
2773 htab = elf32_arm_hash_table (info);
2774 if (!htab->sgot && !create_got_section (dynobj, info))
2775 return FALSE;
2776
2777 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2778 return FALSE;
2779
2780 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2781 htab->srelplt = bfd_get_section_by_name (dynobj,
2782 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2783 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2784 if (!info->shared)
00a97672
RS		 2785 htab->srelbss = bfd_get_section_by_name (dynobj,
2786 RELOC_SECTION (htab, ".bss"));
2787
2788 if (htab->vxworks_p)
2789 {
2790 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2791 return FALSE;
2792
2793 if (info->shared)
2794 {
2795 htab->plt_header_size = 0;
2796 htab->plt_entry_size
2797 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2798 }
2799 else
2800 {
2801 htab->plt_header_size
2802 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2803 htab->plt_entry_size
2804 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2805 }
2806 }
5e681ec4 2807
906e58ca 2808 if (!htab->splt
e5a52504
MM		 2809 || !htab->srelplt
2810 || !htab->sdynbss
5e681ec4
PB		 2811 || (!info->shared && !htab->srelbss))
2812 abort ();
2813
2814 return TRUE;
2815}
2816
906e58ca
NC		 2817/* Copy the extra info we tack onto an elf_link_hash_entry. */
2818
2819static void
2820elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2821 struct elf_link_hash_entry *dir,
2822 struct elf_link_hash_entry *ind)
2823{
2824 struct elf32_arm_link_hash_entry *edir, *eind;
2825
2826 edir = (struct elf32_arm_link_hash_entry *) dir;
2827 eind = (struct elf32_arm_link_hash_entry *) ind;
2828
2829 if (eind->relocs_copied != NULL)
2830 {
2831 if (edir->relocs_copied != NULL)
2832 {
2833 struct elf32_arm_relocs_copied **pp;
2834 struct elf32_arm_relocs_copied *p;
2835
2836 /* Add reloc counts against the indirect sym to the direct sym
2837 list. Merge any entries against the same section. */
2838 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2839 {
2840 struct elf32_arm_relocs_copied *q;
2841
2842 for (q = edir->relocs_copied; q != NULL; q = q->next)
2843 if (q->section == p->section)
2844 {
2845 q->pc_count += p->pc_count;
2846 q->count += p->count;
2847 *pp = p->next;
2848 break;
2849 }
2850 if (q == NULL)
2851 pp = &p->next;
2852 }
2853 *pp = edir->relocs_copied;
2854 }
2855
2856 edir->relocs_copied = eind->relocs_copied;
2857 eind->relocs_copied = NULL;
2858 }
2859
2860 if (ind->root.type == bfd_link_hash_indirect)
2861 {
2862 /* Copy over PLT info. */
2863 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2864 eind->plt_thumb_refcount = 0;
2865 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2866 eind->plt_maybe_thumb_refcount = 0;
2867
2868 if (dir->got.refcount <= 0)
2869 {
2870 edir->tls_type = eind->tls_type;
2871 eind->tls_type = GOT_UNKNOWN;
2872 }
2873 }
2874
2875 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2876}
2877
2878/* Create an ARM elf linker hash table. */
2879
2880static struct bfd_link_hash_table *
2881elf32_arm_link_hash_table_create (bfd *abfd)
2882{
2883 struct elf32_arm_link_hash_table *ret;
2884 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2885
2886 ret = bfd_malloc (amt);
2887 if (ret == NULL)
2888 return NULL;
2889
2890 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2891 elf32_arm_link_hash_newfunc,
2892 sizeof (struct elf32_arm_link_hash_entry)))
2893 {
2894 free (ret);
2895 return NULL;
2896 }
2897
2898 ret->sgot = NULL;
2899 ret->sgotplt = NULL;
2900 ret->srelgot = NULL;
2901 ret->splt = NULL;
2902 ret->srelplt = NULL;
2903 ret->sdynbss = NULL;
2904 ret->srelbss = NULL;
2905 ret->srelplt2 = NULL;
2906 ret->thumb_glue_size = 0;
2907 ret->arm_glue_size = 0;
2908 ret->bx_glue_size = 0;
2909 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2910 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2911 ret->vfp11_erratum_glue_size = 0;
2912 ret->num_vfp11_fixes = 0;
48229727 2913 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2914 ret->bfd_of_glue_owner = NULL;
2915 ret->byteswap_code = 0;
2916 ret->target1_is_rel = 0;
2917 ret->target2_reloc = R_ARM_NONE;
2918#ifdef FOUR_WORD_PLT
2919 ret->plt_header_size = 16;
2920 ret->plt_entry_size = 16;
2921#else
2922 ret->plt_header_size = 20;
2923 ret->plt_entry_size = 12;
2924#endif
2925 ret->fix_v4bx = 0;
2926 ret->use_blx = 0;
2927 ret->vxworks_p = 0;
2928 ret->symbian_p = 0;
2929 ret->use_rel = 1;
2930 ret->sym_sec.abfd = NULL;
2931 ret->obfd = abfd;
2932 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2933 ret->stub_bfd = NULL;
2934 ret->add_stub_section = NULL;
2935 ret->layout_sections_again = NULL;
2936 ret->stub_group = NULL;
2937 ret->bfd_count = 0;
2938 ret->top_index = 0;
2939 ret->input_list = NULL;
906e58ca
NC		 2940
2941 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2942 sizeof (struct elf32_arm_stub_hash_entry)))
2943 {
2944 free (ret);
2945 return NULL;
2946 }
2947
2948 return &ret->root.root;
2949}
2950
2951/* Free the derived linker hash table. */
2952
2953static void
2954elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2955{
2956 struct elf32_arm_link_hash_table *ret
2957 = (struct elf32_arm_link_hash_table *) hash;
2958
2959 bfd_hash_table_free (&ret->stub_hash_table);
2960 _bfd_generic_link_hash_table_free (hash);
2961}
2962
2963/* Determine if we're dealing with a Thumb only architecture. */
2964
2965static bfd_boolean
2966using_thumb_only (struct elf32_arm_link_hash_table *globals)
2967{
2968 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2969 Tag_CPU_arch);
2970 int profile;
2971
2972 if (arch != TAG_CPU_ARCH_V7)
2973 return FALSE;
2974
2975 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2976 Tag_CPU_arch_profile);
2977
2978 return profile == 'M';
2979}
2980
2981/* Determine if we're dealing with a Thumb-2 object. */
2982
2983static bfd_boolean
2984using_thumb2 (struct elf32_arm_link_hash_table *globals)
2985{
2986 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2987 Tag_CPU_arch);
2988 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2989}
2990
f4ac8484
DJ		 2991static bfd_boolean
2992arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2993{
2994 switch (stub_type)
2995 {
fea2b4d6
CL		 2996 case arm_stub_long_branch_thumb_only:
2997 case arm_stub_long_branch_v4t_thumb_arm:
2998 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2999 case arm_stub_long_branch_v4t_thumb_arm_pic:
3000 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3001 return TRUE;
3002 case arm_stub_none:
3003 BFD_FAIL ();
3004 return FALSE;
3005 break;
3006 default:
3007 return FALSE;
3008 }
3009}
3010
906e58ca
NC		 3011/* Determine the type of stub needed, if any, for a call. */
3012
3013static enum elf32_arm_stub_type
3014arm_type_of_stub (struct bfd_link_info *info,
3015 asection *input_sec,
3016 const Elf_Internal_Rela *rel,
3017 unsigned char st_type,
3018 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3019 bfd_vma destination,
3020 asection *sym_sec,
3021 bfd *input_bfd,
3022 const char *name)
906e58ca
NC		 3023{
3024 bfd_vma location;
3025 bfd_signed_vma branch_offset;
3026 unsigned int r_type;
3027 struct elf32_arm_link_hash_table * globals;
3028 int thumb2;
3029 int thumb_only;
3030 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3031 int use_plt = 0;
906e58ca 3032
da5938a2 3033 /* We don't know the actual type of destination in case it is of
8029a119 3034 type STT_SECTION: give up. */
da5938a2
NC		 3035 if (st_type == STT_SECTION)
3036 return stub_type;
3037
906e58ca
NC		 3038 globals = elf32_arm_hash_table (info);
3039
3040 thumb_only = using_thumb_only (globals);
3041
3042 thumb2 = using_thumb2 (globals);
3043
3044 /* Determine where the call point is. */
3045 location = (input_sec->output_offset
3046 + input_sec->output_section->vma
3047 + rel->r_offset);
3048
3049 branch_offset = (bfd_signed_vma)(destination - location);
3050
3051 r_type = ELF32_R_TYPE (rel->r_info);
3052
5fa9e92f 3053 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3054 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3055 {
3056 use_plt = 1;
3057 /* Note when dealing with PLT entries: the main PLT stub is in
3058 ARM mode, so if the branch is in Thumb mode, another
3059 Thumb->ARM stub will be inserted later just before the ARM
3060 PLT stub. We don't take this extra distance into account
3061 here, because if a long branch stub is needed, we'll add a
3062 Thumb->Arm one and branch directly to the ARM PLT entry
3063 because it avoids spreading offset corrections in several
3064 places. */
3065 }
906e58ca 3066
155d87d7 3067 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3068 {
5fa9e92f
CL		 3069 /* Handle cases where:
3070 - this call goes too far (different Thumb/Thumb2 max
3071 distance)
155d87d7
CL		 3072 - it's a Thumb->Arm call and blx is not available, or it's a
3073 Thumb->Arm branch (not bl). A stub is needed in this case,
3074 but only if this call is not through a PLT entry. Indeed,
3075 PLT stubs handle mode switching already.
5fa9e92f 3076 */
906e58ca
NC		 3077 if ((!thumb2
3078 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3079 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3080 || (thumb2
3081 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3082 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3083 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3084 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3085 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3086 && !use_plt))
906e58ca
NC		 3087 {
3088 if (st_type == STT_ARM_TFUNC)
3089 {
3090 /* Thumb to thumb. */
3091 if (!thumb_only)
3092 {
3093 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3094 /* PIC stubs. */
155d87d7
CL		 3095 ? ((globals->use_blx
3096 && (r_type ==R_ARM_THM_CALL))
3097 /* V5T and above. Stub starts with ARM code, so
3098 we must be able to switch mode before
3099 reaching it, which is only possible for 'bl'
3100 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3101 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3102 /* On V4T, use Thumb code only. */
d3626fb0 3103 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3104
3105 /* non-PIC stubs. */
155d87d7
CL		 3106 : ((globals->use_blx
3107 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3108 /* V5T and above. */
3109 ? arm_stub_long_branch_any_any
3110 /* V4T. */
d3626fb0 3111 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3112 }
3113 else
3114 {
3115 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3116 /* PIC stub. */
3117 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3118 /* non-PIC stub. */
3119 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3120 }
3121 }
3122 else
3123 {
3124 /* Thumb to arm. */
c820be07
NC		 3125 if (sym_sec != NULL
3126 && sym_sec->owner != NULL
3127 && !INTERWORK_FLAG (sym_sec->owner))
3128 {
3129 (*_bfd_error_handler)
3130 (_("%B(%s): warning: interworking not enabled.\n"
3131 " first occurrence: %B: Thumb call to ARM"),
3132 sym_sec->owner, input_bfd, name);
3133 }
3134
906e58ca 3135 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3136 /* PIC stubs. */
155d87d7
CL		 3137 ? ((globals->use_blx
3138 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3139 /* V5T and above. */
cf3eccff 3140 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3141 /* V4T PIC stub. */
3142 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3143
3144 /* non-PIC stubs. */
155d87d7
CL		 3145 : ((globals->use_blx
3146 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3147 /* V5T and above. */
3148 ? arm_stub_long_branch_any_any
3149 /* V4T. */
3150 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3151
3152 /* Handle v4t short branches. */
fea2b4d6 3153 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3154 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3155 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3156 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3157 }
3158 }
3159 }
155d87d7 3160 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3161 {
3162 if (st_type == STT_ARM_TFUNC)
3163 {
3164 /* Arm to thumb. */
c820be07
NC		 3165
3166 if (sym_sec != NULL
3167 && sym_sec->owner != NULL
3168 && !INTERWORK_FLAG (sym_sec->owner))
3169 {
3170 (*_bfd_error_handler)
3171 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3172 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3173 sym_sec->owner, input_bfd, name);
3174 }
3175
3176 /* We have an extra 2-bytes reach because of
3177 the mode change (bit 24 (H) of BLX encoding). */
dec9d5df
PB		 3178 if ((branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3179 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3180 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3181 || (r_type == R_ARM_JUMP24)
3182 || (r_type == R_ARM_PLT32))
3183 && !use_plt)
906e58ca
NC		 3184 {
3185 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3186 /* PIC stubs. */
ebe24dd4
CL		 3187 ? ((globals->use_blx)
3188 /* V5T and above. */
3189 ? arm_stub_long_branch_any_thumb_pic
3190 /* V4T stub. */
3191 : arm_stub_long_branch_v4t_arm_thumb_pic)
3192
c2b4a39d
CL		 3193 /* non-PIC stubs. */
3194 : ((globals->use_blx)
3195 /* V5T and above. */
3196 ? arm_stub_long_branch_any_any
3197 /* V4T. */
3198 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3199 }
3200 }
3201 else
3202 {
3203 /* Arm to arm. */
3204 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3205 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3206 {
3207 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3208 /* PIC stubs. */
cf3eccff 3209 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3210 /* non-PIC stubs. */
fea2b4d6 3211 : arm_stub_long_branch_any_any;
906e58ca
NC		 3212 }
3213 }
3214 }
3215
3216 return stub_type;
3217}
3218
3219/* Build a name for an entry in the stub hash table. */
3220
3221static char *
3222elf32_arm_stub_name (const asection *input_section,
3223 const asection *sym_sec,
3224 const struct elf32_arm_link_hash_entry *hash,
3225 const Elf_Internal_Rela *rel)
3226{
3227 char *stub_name;
3228 bfd_size_type len;
3229
3230 if (hash)
3231 {
3232 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3233 stub_name = bfd_malloc (len);
3234 if (stub_name != NULL)
3235 sprintf (stub_name, "%08x_%s+%x",
3236 input_section->id & 0xffffffff,
3237 hash->root.root.root.string,
3238 (int) rel->r_addend & 0xffffffff);
3239 }
3240 else
3241 {
3242 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3243 stub_name = bfd_malloc (len);
3244 if (stub_name != NULL)
3245 sprintf (stub_name, "%08x_%x:%x+%x",
3246 input_section->id & 0xffffffff,
3247 sym_sec->id & 0xffffffff,
3248 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3249 (int) rel->r_addend & 0xffffffff);
3250 }
3251
3252 return stub_name;
3253}
3254
3255/* Look up an entry in the stub hash. Stub entries are cached because
3256 creating the stub name takes a bit of time. */
3257
3258static struct elf32_arm_stub_hash_entry *
3259elf32_arm_get_stub_entry (const asection *input_section,
3260 const asection *sym_sec,
3261 struct elf_link_hash_entry *hash,
3262 const Elf_Internal_Rela *rel,
3263 struct elf32_arm_link_hash_table *htab)
3264{
3265 struct elf32_arm_stub_hash_entry *stub_entry;
3266 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3267 const asection *id_sec;
3268
3269 if ((input_section->flags & SEC_CODE) == 0)
3270 return NULL;
3271
3272 /* If this input section is part of a group of sections sharing one
3273 stub section, then use the id of the first section in the group.
3274 Stub names need to include a section id, as there may well be
3275 more than one stub used to reach say, printf, and we need to
3276 distinguish between them. */
3277 id_sec = htab->stub_group[input_section->id].link_sec;
3278
3279 if (h != NULL && h->stub_cache != NULL
3280 && h->stub_cache->h == h
3281 && h->stub_cache->id_sec == id_sec)
3282 {
3283 stub_entry = h->stub_cache;
3284 }
3285 else
3286 {
3287 char *stub_name;
3288
3289 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3290 if (stub_name == NULL)
3291 return NULL;
3292
3293 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3294 stub_name, FALSE, FALSE);
3295 if (h != NULL)
3296 h->stub_cache = stub_entry;
3297
3298 free (stub_name);
3299 }
3300
3301 return stub_entry;
3302}
3303
48229727
JB		 3304/* Find or create a stub section. Returns a pointer to the stub section, and
3305 the section to which the stub section will be attached (in *LINK_SEC_P).
3306 LINK_SEC_P may be NULL. */
906e58ca 3307
48229727
JB		 3308static asection *
3309elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3310 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3311{
3312 asection *link_sec;
3313 asection *stub_sec;
906e58ca
NC		 3314
3315 link_sec = htab->stub_group[section->id].link_sec;
3316 stub_sec = htab->stub_group[section->id].stub_sec;
3317 if (stub_sec == NULL)
3318 {
3319 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3320 if (stub_sec == NULL)
3321 {
3322 size_t namelen;
3323 bfd_size_type len;
3324 char *s_name;
3325
3326 namelen = strlen (link_sec->name);
3327 len = namelen + sizeof (STUB_SUFFIX);
3328 s_name = bfd_alloc (htab->stub_bfd, len);
3329 if (s_name == NULL)
3330 return NULL;
3331
3332 memcpy (s_name, link_sec->name, namelen);
3333 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3334 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3335 if (stub_sec == NULL)
3336 return NULL;
3337 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3338 }
3339 htab->stub_group[section->id].stub_sec = stub_sec;
3340 }
48229727
JB		 3341
3342 if (link_sec_p)
3343 *link_sec_p = link_sec;
3344
3345 return stub_sec;
3346}
3347
3348/* Add a new stub entry to the stub hash. Not all fields of the new
3349 stub entry are initialised. */
3350
3351static struct elf32_arm_stub_hash_entry *
3352elf32_arm_add_stub (const char *stub_name,
3353 asection *section,
3354 struct elf32_arm_link_hash_table *htab)
3355{
3356 asection *link_sec;
3357 asection *stub_sec;
3358 struct elf32_arm_stub_hash_entry *stub_entry;
3359
3360 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3361 if (stub_sec == NULL)
3362 return NULL;
906e58ca
NC		 3363
3364 /* Enter this entry into the linker stub hash table. */
3365 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3366 TRUE, FALSE);
3367 if (stub_entry == NULL)
3368 {
3369 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3370 section->owner,
3371 stub_name);
3372 return NULL;
3373 }
3374
3375 stub_entry->stub_sec = stub_sec;
3376 stub_entry->stub_offset = 0;
3377 stub_entry->id_sec = link_sec;
3378
906e58ca
NC		 3379 return stub_entry;
3380}
3381
3382/* Store an Arm insn into an output section not processed by
3383 elf32_arm_write_section. */
3384
3385static void
8029a119
NC		 3386put_arm_insn (struct elf32_arm_link_hash_table * htab,
3387 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3388{
3389 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3390 bfd_putl32 (val, ptr);
3391 else
3392 bfd_putb32 (val, ptr);
3393}
3394
3395/* Store a 16-bit Thumb insn into an output section not processed by
3396 elf32_arm_write_section. */
3397
3398static void
8029a119
NC		 3399put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3400 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3401{
3402 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3403 bfd_putl16 (val, ptr);
3404 else
3405 bfd_putb16 (val, ptr);
3406}
3407
48229727
JB		 3408static bfd_reloc_status_type elf32_arm_final_link_relocate
3409 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3410 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3411 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3412
906e58ca
NC		 3413static bfd_boolean
3414arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3415 void * in_arg)
3416{
48229727 3417#define MAXRELOCS 2
906e58ca
NC		 3418 struct elf32_arm_stub_hash_entry *stub_entry;
3419 struct bfd_link_info *info;
3420 struct elf32_arm_link_hash_table *htab;
3421 asection *stub_sec;
3422 bfd *stub_bfd;
3423 bfd_vma stub_addr;
3424 bfd_byte *loc;
3425 bfd_vma sym_value;
3426 int template_size;
3427 int size;
461a49ca 3428 const insn_sequence *template;
906e58ca
NC		 3429 int i;
3430 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3431 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3432 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3433 int nrelocs = 0;
906e58ca
NC		 3434
3435 /* Massage our args to the form they really have. */
3436 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3437 info = (struct bfd_link_info *) in_arg;
3438
3439 globals = elf32_arm_hash_table (info);
3440
3441 htab = elf32_arm_hash_table (info);
3442 stub_sec = stub_entry->stub_sec;
3443
3444 /* Make a note of the offset within the stubs for this entry. */
3445 stub_entry->stub_offset = stub_sec->size;
3446 loc = stub_sec->contents + stub_entry->stub_offset;
3447
3448 stub_bfd = stub_sec->owner;
3449
3450 /* This is the address of the start of the stub. */
3451 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3452 + stub_entry->stub_offset;
3453
3454 /* This is the address of the stub destination. */
3455 sym_value = (stub_entry->target_value
3456 + stub_entry->target_section->output_offset
3457 + stub_entry->target_section->output_section->vma);
3458
461a49ca
DJ		 3459 template = stub_entry->stub_template;
3460 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3461
3462 size = 0;
461a49ca 3463 for (i = 0; i < template_size; i++)
906e58ca 3464 {
4e31c731 3465 switch (template[i].type)
461a49ca
DJ		 3466 {
3467 case THUMB16_TYPE:
48229727
JB		 3468 {
3469 bfd_vma data = template[i].data;
3470 if (template[i].reloc_addend != 0)
3471 {
3472 /* We've borrowed the reloc_addend field to mean we should
3473 insert a condition code into this (Thumb-1 branch)
3474 instruction. See THUMB16_BCOND_INSN. */
3475 BFD_ASSERT ((data & 0xff00) == 0xd000);
3476 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3477 }
3478 put_thumb_insn (globals, stub_bfd, data, loc + size);
3479 size += 2;
3480 }
461a49ca 3481 break;
906e58ca 3482
48229727
JB		 3483 case THUMB32_TYPE:
3484 put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
3485 loc + size);
3486 put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
3487 loc + size + 2);
3488 if (template[i].r_type != R_ARM_NONE)
3489 {
3490 stub_reloc_idx[nrelocs] = i;
3491 stub_reloc_offset[nrelocs++] = size;
3492 }
3493 size += 4;
3494 break;
3495
461a49ca
DJ		 3496 case ARM_TYPE:
3497 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3498 /* Handle cases where the target is encoded within the
3499 instruction. */
ebe24dd4 3500 if (template[i].r_type == R_ARM_JUMP24)
461a49ca 3501 {
48229727
JB		 3502 stub_reloc_idx[nrelocs] = i;
3503 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3504 }
3505 size += 4;
3506 break;
3507
3508 case DATA_TYPE:
3509 bfd_put_32 (stub_bfd, template[i].data, loc + size);
48229727
JB		 3510 stub_reloc_idx[nrelocs] = i;
3511 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3512 size += 4;
3513 break;
3514
3515 default:
3516 BFD_FAIL ();
3517 return FALSE;
3518 }
906e58ca 3519 }
461a49ca 3520
906e58ca
NC		 3521 stub_sec->size += size;
3522
461a49ca
DJ		 3523 /* Stub size has already been computed in arm_size_one_stub. Check
3524 consistency. */
3525 BFD_ASSERT (size == stub_entry->stub_size);
3526
906e58ca
NC		 3527 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3528 if (stub_entry->st_type == STT_ARM_TFUNC)
3529 sym_value |= 1;
3530
48229727
JB		 3531 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3532 in each stub. */
3533 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3534
48229727
JB		 3535 for (i = 0; i < nrelocs; i++)
3536 if (template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3537 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3538 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3539 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3540 {
3541 Elf_Internal_Rela rel;
3542 bfd_boolean unresolved_reloc;
3543 char *error_message;
3544 int sym_flags
3545 = (template[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3546 ? STT_ARM_TFUNC : 0;
3547 bfd_vma points_to = sym_value + stub_entry->target_addend;
3548
3549 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3550 rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].r_type);
3551 rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
3552
3553 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3554 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3555 template should refer back to the instruction after the original
3556 branch. */
3557 points_to = sym_value;
3558
3559 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3560 properly. We should probably use this function unconditionally,
3561 rather than only for certain relocations listed in the enclosing
3562 conditional, for the sake of consistency. */
3563 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3564 (template[stub_reloc_idx[i]].r_type),
3565 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3566 points_to, info, stub_entry->target_section, "", sym_flags,
3567 (struct elf_link_hash_entry *) stub_entry, &unresolved_reloc,
3568 &error_message);
3569 }
3570 else
3571 {
3572 _bfd_final_link_relocate (elf32_arm_howto_from_type
3573 (template[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
3574 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3575 sym_value + stub_entry->target_addend,
3576 template[stub_reloc_idx[i]].reloc_addend);
3577 }
906e58ca
NC		 3578
3579 return TRUE;
48229727 3580#undef MAXRELOCS
906e58ca
NC		 3581}
3582
48229727
JB		 3583/* Calculate the template, template size and instruction size for a stub.
3584 Return value is the instruction size. */
906e58ca 3585
48229727
JB		 3586static unsigned int
3587find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3588 const insn_sequence **stub_template,
3589 int *stub_template_size)
906e58ca 3590{
48229727
JB		 3591 const insn_sequence *template = NULL;
3592 int template_size = 0, i;
3593 unsigned int size;
906e58ca 3594
48229727
JB		 3595 template = stub_definitions[stub_type].template;
3596 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3597
3598 size = 0;
461a49ca
DJ		 3599 for (i = 0; i < template_size; i++)
3600 {
4e31c731 3601 switch (template[i].type)
461a49ca
DJ		 3602 {
3603 case THUMB16_TYPE:
3604 size += 2;
3605 break;
3606
3607 case ARM_TYPE:
48229727 3608 case THUMB32_TYPE:
461a49ca
DJ		 3609 case DATA_TYPE:
3610 size += 4;
3611 break;
3612
3613 default:
3614 BFD_FAIL ();
3615 return FALSE;
3616 }
3617 }
3618
48229727
JB		 3619 if (stub_template)
3620 *stub_template = template;
3621
3622 if (stub_template_size)
3623 *stub_template_size = template_size;
3624
3625 return size;
3626}
3627
3628/* As above, but don't actually build the stub. Just bump offset so
3629 we know stub section sizes. */
3630
3631static bfd_boolean
3632arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3633 void * in_arg)
3634{
3635 struct elf32_arm_stub_hash_entry *stub_entry;
3636 struct elf32_arm_link_hash_table *htab;
3637 const insn_sequence *template;
3638 int template_size, size;
3639
3640 /* Massage our args to the form they really have. */
3641 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3642 htab = (struct elf32_arm_link_hash_table *) in_arg;
3643
3644 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3645 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3646
3647 size = find_stub_size_and_template (stub_entry->stub_type, &template,
3648 &template_size);
3649
461a49ca
DJ		 3650 stub_entry->stub_size = size;
3651 stub_entry->stub_template = template;
3652 stub_entry->stub_template_size = template_size;
3653
906e58ca
NC		 3654 size = (size + 7) & ~7;
3655 stub_entry->stub_sec->size += size;
461a49ca 3656
906e58ca
NC		 3657 return TRUE;
3658}
3659
3660/* External entry points for sizing and building linker stubs. */
3661
3662/* Set up various things so that we can make a list of input sections
3663 for each output section included in the link. Returns -1 on error,
3664 0 when no stubs will be needed, and 1 on success. */
3665
3666int
3667elf32_arm_setup_section_lists (bfd *output_bfd,
3668 struct bfd_link_info *info)
3669{
3670 bfd *input_bfd;
3671 unsigned int bfd_count;
3672 int top_id, top_index;
3673 asection *section;
3674 asection **input_list, **list;
3675 bfd_size_type amt;
3676 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3677
3678 if (! is_elf_hash_table (htab))
3679 return 0;
3680
3681 /* Count the number of input BFDs and find the top input section id. */
3682 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3683 input_bfd != NULL;
3684 input_bfd = input_bfd->link_next)
3685 {
3686 bfd_count += 1;
3687 for (section = input_bfd->sections;
3688 section != NULL;
3689 section = section->next)
3690 {
3691 if (top_id < section->id)
3692 top_id = section->id;
3693 }
3694 }
3695 htab->bfd_count = bfd_count;
3696
3697 amt = sizeof (struct map_stub) * (top_id + 1);
3698 htab->stub_group = bfd_zmalloc (amt);
3699 if (htab->stub_group == NULL)
3700 return -1;
3701
3702 /* We can't use output_bfd->section_count here to find the top output
3703 section index as some sections may have been removed, and
3704 _bfd_strip_section_from_output doesn't renumber the indices. */
3705 for (section = output_bfd->sections, top_index = 0;
3706 section != NULL;
3707 section = section->next)
3708 {
3709 if (top_index < section->index)
3710 top_index = section->index;
3711 }
3712
3713 htab->top_index = top_index;
3714 amt = sizeof (asection *) * (top_index + 1);
3715 input_list = bfd_malloc (amt);
3716 htab->input_list = input_list;
3717 if (input_list == NULL)
3718 return -1;
3719
3720 /* For sections we aren't interested in, mark their entries with a
3721 value we can check later. */
3722 list = input_list + top_index;
3723 do
3724 *list = bfd_abs_section_ptr;
3725 while (list-- != input_list);
3726
3727 for (section = output_bfd->sections;
3728 section != NULL;
3729 section = section->next)
3730 {
3731 if ((section->flags & SEC_CODE) != 0)
3732 input_list[section->index] = NULL;
3733 }
3734
3735 return 1;
3736}
3737
3738/* The linker repeatedly calls this function for each input section,
3739 in the order that input sections are linked into output sections.
3740 Build lists of input sections to determine groupings between which
3741 we may insert linker stubs. */
3742
3743void
3744elf32_arm_next_input_section (struct bfd_link_info *info,
3745 asection *isec)
3746{
3747 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3748
3749 if (isec->output_section->index <= htab->top_index)
3750 {
3751 asection **list = htab->input_list + isec->output_section->index;
3752
3753 if (*list != bfd_abs_section_ptr)
3754 {
3755 /* Steal the link_sec pointer for our list. */
3756#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3757 /* This happens to make the list in reverse order,
07d72278 3758 which we reverse later. */
906e58ca
NC		 3759 PREV_SEC (isec) = *list;
3760 *list = isec;
3761 }
3762 }
3763}
3764
3765/* See whether we can group stub sections together. Grouping stub
3766 sections may result in fewer stubs. More importantly, we need to
07d72278 3767 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3768 .fini output sections respectively, because glibc splits the
3769 _init and _fini functions into multiple parts. Putting a stub in
3770 the middle of a function is not a good idea. */
3771
3772static void
3773group_sections (struct elf32_arm_link_hash_table *htab,
3774 bfd_size_type stub_group_size,
07d72278 3775 bfd_boolean stubs_always_after_branch)
906e58ca 3776{
07d72278 3777 asection **list = htab->input_list;
906e58ca
NC		 3778
3779 do
3780 {
3781 asection *tail = *list;
07d72278 3782 asection *head;
906e58ca
NC		 3783
3784 if (tail == bfd_abs_section_ptr)
3785 continue;
3786
07d72278
DJ		 3787 /* Reverse the list: we must avoid placing stubs at the
3788 beginning of the section because the beginning of the text
3789 section may be required for an interrupt vector in bare metal
3790 code. */
3791#define NEXT_SEC PREV_SEC
e780aef2
CL		 3792 head = NULL;
3793 while (tail != NULL)
3794 {
3795 /* Pop from tail. */
3796 asection *item = tail;
3797 tail = PREV_SEC (item);
3798
3799 /* Push on head. */
3800 NEXT_SEC (item) = head;
3801 head = item;
3802 }
07d72278
DJ		 3803
3804 while (head != NULL)
906e58ca
NC		 3805 {
3806 asection *curr;
07d72278 3807 asection *next;
e780aef2
CL		 3808 bfd_vma stub_group_start = head->output_offset;
3809 bfd_vma end_of_next;
906e58ca 3810
07d72278 3811 curr = head;
e780aef2 3812 while (NEXT_SEC (curr) != NULL)
8cd931b7 3813 {
e780aef2
CL		 3814 next = NEXT_SEC (curr);
3815 end_of_next = next->output_offset + next->size;
3816 if (end_of_next - stub_group_start >= stub_group_size)
3817 /* End of NEXT is too far from start, so stop. */
8cd931b7 3818 break;
e780aef2
CL		 3819 /* Add NEXT to the group. */
3820 curr = next;
8cd931b7 3821 }
906e58ca 3822
07d72278 3823 /* OK, the size from the start to the start of CURR is less
906e58ca 3824 than stub_group_size and thus can be handled by one stub
07d72278 3825 section. (Or the head section is itself larger than
906e58ca
NC		 3826 stub_group_size, in which case we may be toast.)
3827 We should really be keeping track of the total size of
3828 stubs added here, as stubs contribute to the final output
7fb9f789 3829 section size. */
906e58ca
NC		 3830 do
3831 {
07d72278 3832 next = NEXT_SEC (head);
906e58ca 3833 /* Set up this stub group. */
07d72278 3834 htab->stub_group[head->id].link_sec = curr;
906e58ca 3835 }
07d72278 3836 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3837
3838 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3839 bytes after the stub section can be handled by it too. */
3840 if (!stubs_always_after_branch)
906e58ca 3841 {
e780aef2
CL		 3842 stub_group_start = curr->output_offset + curr->size;
3843
8cd931b7 3844 while (next != NULL)
906e58ca 3845 {
e780aef2
CL		 3846 end_of_next = next->output_offset + next->size;
3847 if (end_of_next - stub_group_start >= stub_group_size)
3848 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3849 break;
e780aef2 3850 /* Add NEXT to the stub group. */
07d72278
DJ		 3851 head = next;
3852 next = NEXT_SEC (head);
3853 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3854 }
3855 }
07d72278 3856 head = next;
906e58ca
NC		 3857 }
3858 }
07d72278 3859 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3860
3861 free (htab->input_list);
3862#undef PREV_SEC
07d72278 3863#undef NEXT_SEC
906e58ca
NC		 3864}
3865
48229727
JB		 3866/* Comparison function for sorting/searching relocations relating to Cortex-A8
3867 erratum fix. */
3868
3869static int
3870a8_reloc_compare (const void *a, const void *b)
3871{
3872 const struct a8_erratum_reloc *ra = a, *rb = b;
3873
3874 if (ra->from < rb->from)
3875 return -1;
3876 else if (ra->from > rb->from)
3877 return 1;
3878 else
3879 return 0;
3880}
3881
3882static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3883 const char *, char **);
3884
3885/* Helper function to scan code for sequences which might trigger the Cortex-A8
3886 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
3887 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Return 1 if an error occurs, 0
3888 otherwise. */
3889
3890static int
3891cortex_a8_erratum_scan (bfd *input_bfd, struct bfd_link_info *info,
3892 struct a8_erratum_fix **a8_fixes_p,
3893 unsigned int *num_a8_fixes_p,
3894 unsigned int *a8_fix_table_size_p,
3895 struct a8_erratum_reloc *a8_relocs,
3896 unsigned int num_a8_relocs)
3897{
3898 asection *section;
3899 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3900 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3901 unsigned int num_a8_fixes = *num_a8_fixes_p;
3902 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3903
3904 for (section = input_bfd->sections;
3905 section != NULL;
3906 section = section->next)
3907 {
3908 bfd_byte *contents = NULL;
3909 struct _arm_elf_section_data *sec_data;
3910 unsigned int span;
3911 bfd_vma base_vma;
3912
3913 if (elf_section_type (section) != SHT_PROGBITS
3914 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3915 || (section->flags & SEC_EXCLUDE) != 0
3916 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3917 || (section->output_section == bfd_abs_section_ptr))
3918 continue;
3919
3920 base_vma = section->output_section->vma + section->output_offset;
3921
3922 if (elf_section_data (section)->this_hdr.contents != NULL)
3923 contents = elf_section_data (section)->this_hdr.contents;
3924 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
3925 return 1;
3926
3927 sec_data = elf32_arm_section_data (section);
3928
3929 for (span = 0; span < sec_data->mapcount; span++)
3930 {
3931 unsigned int span_start = sec_data->map[span].vma;
3932 unsigned int span_end = (span == sec_data->mapcount - 1)
3933 ? section->size : sec_data->map[span + 1].vma;
3934 unsigned int i;
3935 char span_type = sec_data->map[span].type;
3936 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3937
3938 if (span_type != 't')
3939 continue;
3940
3941 /* Span is entirely within a single 4KB region: skip scanning. */
3942 if (((base_vma + span_start) & ~0xfff)
3943 == ((base_vma + span_end) & ~0xfff))
3944 continue;
3945
3946 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3947
3948 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3949 * The branch target is in the same 4KB region as the
3950 first half of the branch.
3951 * The instruction before the branch is a 32-bit
3952 length non-branch instruction.
3953 */
3954
3955 for (i = span_start; i < span_end;)
3956 {
3957 unsigned int insn = bfd_getl16 (&contents[i]);
3958 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3959 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3960
3961 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3962 insn_32bit = TRUE;
3963
3964 if (insn_32bit)
3965 {
3966 /* Load the rest of the insn (in manual-friendly order). */
3967 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
3968
3969 /* Encoding T4: B<c>.W. */
3970 is_b = (insn & 0xf800d000) == 0xf0009000;
3971 /* Encoding T1: BL<c>.W. */
3972 is_bl = (insn & 0xf800d000) == 0xf000d000;
3973 /* Encoding T2: BLX<c>.W. */
3974 is_blx = (insn & 0xf800d000) == 0xf000c000;
3975 /* Encoding T3: B<c>.W (not permitted in IT block). */
3976 is_bcc = (insn & 0xf800d000) == 0xf0008000
3977 && (insn & 0x07f00000) != 0x03800000;
3978 }
3979
3980 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
3981
3982 if (((base_vma + i) & 0xfff) == 0xffe && insn_32bit
3983 && is_32bit_branch && last_was_32bit && !last_was_branch)
3984 {
3985 bfd_vma offset;
3986 bfd_boolean force_target_arm = FALSE;
3987 bfd_boolean force_target_thumb = FALSE;
3988 bfd_vma target;
3989 enum elf32_arm_stub_type stub_type = arm_stub_none;
3990 struct a8_erratum_reloc key, *found;
3991
3992 key.from = base_vma + i;
3993 found = bsearch (&key, a8_relocs, num_a8_relocs,
3994 sizeof (struct a8_erratum_reloc),
3995 &a8_reloc_compare);
3996
3997 if (found)
3998 {
3999 char *error_message = NULL;
4000 struct elf_link_hash_entry *entry;
4001
4002 /* We don't care about the error returned from this
4003 function, only if there is glue or not. */
4004 entry = find_thumb_glue (info, found->sym_name,
4005 &error_message);
4006
4007 if (entry)
4008 found->non_a8_stub = TRUE;
4009
4010 if (found->r_type == R_ARM_THM_CALL
4011 && found->st_type != STT_ARM_TFUNC)
4012 force_target_arm = TRUE;
4013 else if (found->r_type == R_ARM_THM_CALL
4014 && found->st_type == STT_ARM_TFUNC)
4015 force_target_thumb = TRUE;
4016 }
4017
4018 /* Check if we have an offending branch instruction. */
4019
4020 if (found && found->non_a8_stub)
4021 /* We've already made a stub for this instruction, e.g.
4022 it's a long branch or a Thumb->ARM stub. Assume that
4023 stub will suffice to work around the A8 erratum (see
4024 setting of always_after_branch above). */
4025 ;
4026 else if (is_bcc)
4027 {
4028 offset = (insn & 0x7ff) << 1;
4029 offset |= (insn & 0x3f0000) >> 4;
4030 offset |= (insn & 0x2000) ? 0x40000 : 0;
4031 offset |= (insn & 0x800) ? 0x80000 : 0;
4032 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4033 if (offset & 0x100000)
4034 offset |= ~0xfffff;
4035 stub_type = arm_stub_a8_veneer_b_cond;
4036 }
4037 else if (is_b || is_bl || is_blx)
4038 {
4039 int s = (insn & 0x4000000) != 0;
4040 int j1 = (insn & 0x2000) != 0;
4041 int j2 = (insn & 0x800) != 0;
4042 int i1 = !(j1 ^ s);
4043 int i2 = !(j2 ^ s);
4044
4045 offset = (insn & 0x7ff) << 1;
4046 offset |= (insn & 0x3ff0000) >> 4;
4047 offset |= i2 << 22;
4048 offset |= i1 << 23;
4049 offset |= s << 24;
4050 if (offset & 0x1000000)
4051 offset |= ~0xffffff;
4052
4053 if (is_blx)
4054 offset &= ~3u;
4055
4056 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4057 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4058 }
4059
4060 if (stub_type != arm_stub_none)
4061 {
4062 bfd_vma pc_for_insn = base_vma + i + 4;
4063
4064 /* The original instruction is a BL, but the target is
4065 an ARM instruction. If we were not making a stub,
4066 the BL would have been converted to a BLX. Use the
4067 BLX stub instead in that case. */
4068 if (htab->use_blx && force_target_arm
4069 && stub_type == arm_stub_a8_veneer_bl)
4070 {
4071 stub_type = arm_stub_a8_veneer_blx;
4072 is_blx = TRUE;
4073 is_bl = FALSE;
4074 }
4075 /* Conversely, if the original instruction was
4076 BLX but the target is Thumb mode, use the BL
4077 stub. */
4078 else if (force_target_thumb
4079 && stub_type == arm_stub_a8_veneer_blx)
4080 {
4081 stub_type = arm_stub_a8_veneer_bl;
4082 is_blx = FALSE;
4083 is_bl = TRUE;
4084 }
4085
4086 if (is_blx)
4087 pc_for_insn &= ~3u;
4088
4089 /* If we found a relocation, use the proper destination,
4090 not the offset in the (unrelocated) instruction.
4091 Note this is always done if we switched the stub type
4092 above. */
4093 if (found)
4094 offset = found->destination - pc_for_insn;
4095
4096 target = pc_for_insn + offset;
4097
4098 /* The BLX stub is ARM-mode code. Adjust the offset to
4099 take the different PC value (+8 instead of +4) into
4100 account. */
4101 if (stub_type == arm_stub_a8_veneer_blx)
4102 offset += 4;
4103
4104 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4105 {
4106 char *stub_name;
4107
4108 if (num_a8_fixes == a8_fix_table_size)
4109 {
4110 a8_fix_table_size *= 2;
4111 a8_fixes = bfd_realloc (a8_fixes,
4112 sizeof (struct a8_erratum_fix)
4113 * a8_fix_table_size);
4114 }
4115
4116 stub_name = bfd_malloc (8 + 1 + 8 + 1);
4117 if (stub_name != NULL)
4118 sprintf (stub_name, "%x:%x", section->id, i);
4119
4120 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4121 a8_fixes[num_a8_fixes].section = section;
4122 a8_fixes[num_a8_fixes].offset = i;
4123 a8_fixes[num_a8_fixes].addend = offset;
4124 a8_fixes[num_a8_fixes].orig_insn = insn;
4125 a8_fixes[num_a8_fixes].stub_name = stub_name;
4126 a8_fixes[num_a8_fixes].stub_type = stub_type;
4127
4128 num_a8_fixes++;
4129 }
4130 }
4131 }
4132
4133 i += insn_32bit ? 4 : 2;
4134 last_was_32bit = insn_32bit;
4135 last_was_branch = is_32bit_branch;
4136 }
4137 }
4138
4139 if (elf_section_data (section)->this_hdr.contents == NULL)
4140 free (contents);
4141 }
4142
4143 *a8_fixes_p = a8_fixes;
4144 *num_a8_fixes_p = num_a8_fixes;
4145 *a8_fix_table_size_p = a8_fix_table_size;
4146
4147 return 0;
4148}
4149
906e58ca
NC		 4150/* Determine and set the size of the stub section for a final link.
4151
4152 The basic idea here is to examine all the relocations looking for
4153 PC-relative calls to a target that is unreachable with a "bl"
4154 instruction. */
4155
4156bfd_boolean
4157elf32_arm_size_stubs (bfd *output_bfd,
4158 bfd *stub_bfd,
4159 struct bfd_link_info *info,
4160 bfd_signed_vma group_size,
4161 asection * (*add_stub_section) (const char *, asection *),
4162 void (*layout_sections_again) (void))
4163{
4164 bfd_size_type stub_group_size;
07d72278 4165 bfd_boolean stubs_always_after_branch;
906e58ca
NC		 4166 bfd_boolean stub_changed = 0;
4167 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727
JB		 4168 struct a8_erratum_fix *a8_fixes = NULL;
4169 unsigned int num_a8_fixes = 0, prev_num_a8_fixes = 0, a8_fix_table_size = 10;
4170 struct a8_erratum_reloc *a8_relocs = NULL;
4171 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4172
4173 if (htab->fix_cortex_a8)
4174 {
4175 a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
4176 * a8_fix_table_size);
4177 a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
4178 * a8_reloc_table_size);
4179 }
906e58ca
NC		 4180
4181 /* Propagate mach to stub bfd, because it may not have been
4182 finalized when we created stub_bfd. */
4183 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4184 bfd_get_mach (output_bfd));
4185
4186 /* Stash our params away. */
4187 htab->stub_bfd = stub_bfd;
4188 htab->add_stub_section = add_stub_section;
4189 htab->layout_sections_again = layout_sections_again;
07d72278 4190 stubs_always_after_branch = group_size < 0;
48229727
JB		 4191
4192 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4193 as the first half of a 32-bit branch straddling two 4K pages. This is a
4194 crude way of enforcing that. */
4195 if (htab->fix_cortex_a8)
4196 stubs_always_after_branch = 1;
4197
906e58ca
NC		 4198 if (group_size < 0)
4199 stub_group_size = -group_size;
4200 else
4201 stub_group_size = group_size;
4202
4203 if (stub_group_size == 1)
4204 {
4205 /* Default values. */
4206 /* Thumb branch range is +-4MB has to be used as the default
4207 maximum size (a given section can contain both ARM and Thumb
4208 code, so the worst case has to be taken into account).
4209
4210 This value is 24K less than that, which allows for 2025
4211 12-byte stubs. If we exceed that, then we will fail to link.
4212 The user will have to relink with an explicit group size
4213 option. */
4214 stub_group_size = 4170000;
4215 }
4216
07d72278 4217 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca
NC		 4218
4219 while (1)
4220 {
4221 bfd *input_bfd;
4222 unsigned int bfd_indx;
4223 asection *stub_sec;
4224
48229727
JB		 4225 num_a8_fixes = 0;
4226
906e58ca
NC		 4227 for (input_bfd = info->input_bfds, bfd_indx = 0;
4228 input_bfd != NULL;
4229 input_bfd = input_bfd->link_next, bfd_indx++)
4230 {
4231 Elf_Internal_Shdr *symtab_hdr;
4232 asection *section;
4233 Elf_Internal_Sym *local_syms = NULL;
4234
48229727
JB		 4235 num_a8_relocs = 0;
4236
906e58ca
NC		 4237 /* We'll need the symbol table in a second. */
4238 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4239 if (symtab_hdr->sh_info == 0)
4240 continue;
4241
4242 /* Walk over each section attached to the input bfd. */
4243 for (section = input_bfd->sections;
4244 section != NULL;
4245 section = section->next)
4246 {
4247 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4248
4249 /* If there aren't any relocs, then there's nothing more
4250 to do. */
4251 if ((section->flags & SEC_RELOC) == 0
4252 || section->reloc_count == 0
4253 || (section->flags & SEC_CODE) == 0)
4254 continue;
4255
4256 /* If this section is a link-once section that will be
4257 discarded, then don't create any stubs. */
4258 if (section->output_section == NULL
4259 || section->output_section->owner != output_bfd)
4260 continue;
4261
4262 /* Get the relocs. */
4263 internal_relocs
4264 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4265 NULL, info->keep_memory);
4266 if (internal_relocs == NULL)
4267 goto error_ret_free_local;
4268
4269 /* Now examine each relocation. */
4270 irela = internal_relocs;
4271 irelaend = irela + section->reloc_count;
4272 for (; irela < irelaend; irela++)
4273 {
4274 unsigned int r_type, r_indx;
4275 enum elf32_arm_stub_type stub_type;
4276 struct elf32_arm_stub_hash_entry *stub_entry;
4277 asection *sym_sec;
4278 bfd_vma sym_value;
4279 bfd_vma destination;
4280 struct elf32_arm_link_hash_entry *hash;
7413f23f 4281 const char *sym_name;
906e58ca
NC		 4282 char *stub_name;
4283 const asection *id_sec;
4284 unsigned char st_type;
48229727 4285 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4286
4287 r_type = ELF32_R_TYPE (irela->r_info);
4288 r_indx = ELF32_R_SYM (irela->r_info);
4289
4290 if (r_type >= (unsigned int) R_ARM_max)
4291 {
4292 bfd_set_error (bfd_error_bad_value);
4293 error_ret_free_internal:
4294 if (elf_section_data (section)->relocs == NULL)
4295 free (internal_relocs);
4296 goto error_ret_free_local;
4297 }
4298
155d87d7 4299 /* Only look for stubs on branch instructions. */
906e58ca 4300 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4301 && (r_type != (unsigned int) R_ARM_THM_CALL)
4302 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4303 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4304 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4305 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4306 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4307 continue;
4308
4309 /* Now determine the call target, its name, value,
4310 section. */
4311 sym_sec = NULL;
4312 sym_value = 0;
4313 destination = 0;
4314 hash = NULL;
7413f23f 4315 sym_name = NULL;
906e58ca
NC		 4316 if (r_indx < symtab_hdr->sh_info)
4317 {
4318 /* It's a local symbol. */
4319 Elf_Internal_Sym *sym;
4320 Elf_Internal_Shdr *hdr;
4321
4322 if (local_syms == NULL)
4323 {
4324 local_syms
4325 = (Elf_Internal_Sym *) symtab_hdr->contents;
4326 if (local_syms == NULL)
4327 local_syms
4328 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4329 symtab_hdr->sh_info, 0,
4330 NULL, NULL, NULL);
4331 if (local_syms == NULL)
4332 goto error_ret_free_internal;
4333 }
4334
4335 sym = local_syms + r_indx;
4336 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4337 sym_sec = hdr->bfd_section;
4338 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4339 sym_value = sym->st_value;
4340 destination = (sym_value + irela->r_addend
4341 + sym_sec->output_offset
4342 + sym_sec->output_section->vma);
4343 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4344 sym_name
4345 = bfd_elf_string_from_elf_section (input_bfd,
4346 symtab_hdr->sh_link,
4347 sym->st_name);
906e58ca
NC		 4348 }
4349 else
4350 {
4351 /* It's an external symbol. */
4352 int e_indx;
4353
4354 e_indx = r_indx - symtab_hdr->sh_info;
4355 hash = ((struct elf32_arm_link_hash_entry *)
4356 elf_sym_hashes (input_bfd)[e_indx]);
4357
4358 while (hash->root.root.type == bfd_link_hash_indirect
4359 || hash->root.root.type == bfd_link_hash_warning)
4360 hash = ((struct elf32_arm_link_hash_entry *)
4361 hash->root.root.u.i.link);
4362
4363 if (hash->root.root.type == bfd_link_hash_defined
4364 || hash->root.root.type == bfd_link_hash_defweak)
4365 {
4366 sym_sec = hash->root.root.u.def.section;
4367 sym_value = hash->root.root.u.def.value;
4368 if (sym_sec->output_section != NULL)
4369 destination = (sym_value + irela->r_addend
4370 + sym_sec->output_offset
4371 + sym_sec->output_section->vma);
4372 }
69c5861e
CL		 4373 else if ((hash->root.root.type == bfd_link_hash_undefined)
4374 || (hash->root.root.type == bfd_link_hash_undefweak))
4375 {
4376 /* For a shared library, use the PLT stub as
4377 target address to decide whether a long
4378 branch stub is needed.
4379 For absolute code, they cannot be handled. */
4380 struct elf32_arm_link_hash_table *globals =
4381 elf32_arm_hash_table (info);
4382
4383 if (globals->splt != NULL && hash != NULL
4384 && hash->root.plt.offset != (bfd_vma) -1)
4385 {
4386 sym_sec = globals->splt;
4387 sym_value = hash->root.plt.offset;
4388 if (sym_sec->output_section != NULL)
4389 destination = (sym_value
4390 + sym_sec->output_offset
4391 + sym_sec->output_section->vma);
4392 }
4393 else
4394 continue;
4395 }
906e58ca
NC		 4396 else
4397 {
4398 bfd_set_error (bfd_error_bad_value);
4399 goto error_ret_free_internal;
4400 }
4401 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4402 sym_name = hash->root.root.root.string;
906e58ca
NC		 4403 }
4404
48229727 4405 do
7413f23f 4406 {
48229727
JB		 4407 /* Determine what (if any) linker stub is needed. */
4408 stub_type = arm_type_of_stub (info, section, irela,
4409 st_type, hash,
4410 destination, sym_sec,
4411 input_bfd, sym_name);
4412 if (stub_type == arm_stub_none)
4413 break;
4414
4415 /* Support for grouping stub sections. */
4416 id_sec = htab->stub_group[section->id].link_sec;
4417
4418 /* Get the name of this stub. */
4419 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4420 irela);
4421 if (!stub_name)
4422 goto error_ret_free_internal;
4423
4424 /* We've either created a stub for this reloc already,
4425 or we are about to. */
4426 created_stub = TRUE;
4427
4428 stub_entry = arm_stub_hash_lookup
4429 (&htab->stub_hash_table, stub_name,
4430 FALSE, FALSE);
4431 if (stub_entry != NULL)
4432 {
4433 /* The proper stub has already been created. */
4434 free (stub_name);
4435 break;
4436 }
7413f23f 4437
48229727
JB		 4438 stub_entry = elf32_arm_add_stub (stub_name, section,
4439 htab);
4440 if (stub_entry == NULL)
4441 {
4442 free (stub_name);
4443 goto error_ret_free_internal;
4444 }
7413f23f 4445
48229727
JB		 4446 stub_entry->target_value = sym_value;
4447 stub_entry->target_section = sym_sec;
4448 stub_entry->stub_type = stub_type;
4449 stub_entry->h = hash;
4450 stub_entry->st_type = st_type;
4451
4452 if (sym_name == NULL)
4453 sym_name = "unnamed";
4454 stub_entry->output_name
4455 = bfd_alloc (htab->stub_bfd,
4456 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4457 + strlen (sym_name));
4458 if (stub_entry->output_name == NULL)
4459 {
4460 free (stub_name);
4461 goto error_ret_free_internal;
4462 }
4463
4464 /* For historical reasons, use the existing names for
4465 ARM-to-Thumb and Thumb-to-ARM stubs. */
4466 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4467 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4468 && st_type != STT_ARM_TFUNC)
4469 sprintf (stub_entry->output_name,
4470 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4471 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4472 || (r_type == (unsigned int) R_ARM_JUMP24))
4473 && st_type == STT_ARM_TFUNC)
4474 sprintf (stub_entry->output_name,
4475 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4476 else
4477 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4478 sym_name);
4479
4480 stub_changed = TRUE;
4481 }
4482 while (0);
4483
4484 /* Look for relocations which might trigger Cortex-A8
4485 erratum. */
4486 if (htab->fix_cortex_a8
4487 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4488 || r_type == (unsigned int) R_ARM_THM_JUMP19
4489 || r_type == (unsigned int) R_ARM_THM_CALL
4490 || r_type == (unsigned int) R_ARM_THM_XPC22))
4491 {
4492 bfd_vma from = section->output_section->vma
4493 + section->output_offset
4494 + irela->r_offset;
4495
4496 if ((from & 0xfff) == 0xffe)
4497 {
4498 /* Found a candidate. Note we haven't checked the
4499 destination is within 4K here: if we do so (and
4500 don't create an entry in a8_relocs) we can't tell
4501 that a branch should have been relocated when
4502 scanning later. */
4503 if (num_a8_relocs == a8_reloc_table_size)
4504 {
4505 a8_reloc_table_size *= 2;
4506 a8_relocs = bfd_realloc (a8_relocs,
4507 sizeof (struct a8_erratum_reloc)
4508 * a8_reloc_table_size);
4509 }
4510
4511 a8_relocs[num_a8_relocs].from = from;
4512 a8_relocs[num_a8_relocs].destination = destination;
4513 a8_relocs[num_a8_relocs].r_type = r_type;
4514 a8_relocs[num_a8_relocs].st_type = st_type;
4515 a8_relocs[num_a8_relocs].sym_name = sym_name;
4516 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4517
4518 num_a8_relocs++;
4519 }
4520 }
906e58ca
NC		 4521 }
4522
48229727
JB		 4523 /* We're done with the internal relocs, free them. */
4524 if (elf_section_data (section)->relocs == NULL)
4525 free (internal_relocs);
4526 }
4527
4528 if (htab->fix_cortex_a8)
4529 {
4530 /* Sort relocs which might apply to Cortex-A8 erratum. */
4531 qsort (a8_relocs, num_a8_relocs, sizeof (struct a8_erratum_reloc),
4532 &a8_reloc_compare);
4533
4534 /* Scan for branches which might trigger Cortex-A8 erratum. */
4535 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4536 &num_a8_fixes, &a8_fix_table_size,
4537 a8_relocs, num_a8_relocs) != 0)
4538 goto error_ret_free_local;
5e681ec4 4539 }
5e681ec4
PB		 4540 }
4541
48229727
JB		 4542 if (htab->fix_cortex_a8 && num_a8_fixes != prev_num_a8_fixes)
4543 stub_changed = TRUE;
4544
906e58ca
NC		 4545 if (!stub_changed)
4546 break;
5e681ec4 4547
906e58ca
NC		 4548 /* OK, we've added some stubs. Find out the new size of the
4549 stub sections. */
4550 for (stub_sec = htab->stub_bfd->sections;
4551 stub_sec != NULL;
4552 stub_sec = stub_sec->next)
3e6b1042
DJ		 4553 {
4554 /* Ignore non-stub sections. */
4555 if (!strstr (stub_sec->name, STUB_SUFFIX))
4556 continue;
4557
4558 stub_sec->size = 0;
4559 }
b34b2d70 4560
906e58ca
NC		 4561 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4562
48229727
JB		 4563 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4564 if (htab->fix_cortex_a8)
4565 for (i = 0; i < num_a8_fixes; i++)
4566 {
4567 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4568 a8_fixes[i].section, htab);
4569
4570 if (stub_sec == NULL)
4571 goto error_ret_free_local;
4572
4573 stub_sec->size
4574 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4575 NULL);
4576 }
4577
4578
906e58ca
NC		 4579 /* Ask the linker to do its stuff. */
4580 (*htab->layout_sections_again) ();
4581 stub_changed = FALSE;
48229727 4582 prev_num_a8_fixes = num_a8_fixes;
ba93b8ac
DJ		 4583 }
4584
48229727
JB		 4585 /* Add stubs for Cortex-A8 erratum fixes now. */
4586 if (htab->fix_cortex_a8)
4587 {
4588 for (i = 0; i < num_a8_fixes; i++)
4589 {
4590 struct elf32_arm_stub_hash_entry *stub_entry;
4591 char *stub_name = a8_fixes[i].stub_name;
4592 asection *section = a8_fixes[i].section;
4593 unsigned int section_id = a8_fixes[i].section->id;
4594 asection *link_sec = htab->stub_group[section_id].link_sec;
4595 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4596 const insn_sequence *template;
4597 int template_size, size = 0;
4598
4599 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4600 TRUE, FALSE);
4601 if (stub_entry == NULL)
4602 {
4603 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4604 section->owner,
4605 stub_name);
4606 return FALSE;
4607 }
4608
4609 stub_entry->stub_sec = stub_sec;
4610 stub_entry->stub_offset = 0;
4611 stub_entry->id_sec = link_sec;
4612 stub_entry->stub_type = a8_fixes[i].stub_type;
4613 stub_entry->target_section = a8_fixes[i].section;
4614 stub_entry->target_value = a8_fixes[i].offset;
4615 stub_entry->target_addend = a8_fixes[i].addend;
4616 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4617 stub_entry->st_type = STT_ARM_TFUNC;
4618
4619 size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
4620 &template_size);
4621
4622 stub_entry->stub_size = size;
4623 stub_entry->stub_template = template;
4624 stub_entry->stub_template_size = template_size;
4625 }
4626
4627 /* Stash the Cortex-A8 erratum fix array for use later in
4628 elf32_arm_write_section(). */
4629 htab->a8_erratum_fixes = a8_fixes;
4630 htab->num_a8_erratum_fixes = num_a8_fixes;
4631 }
4632 else
4633 {
4634 htab->a8_erratum_fixes = NULL;
4635 htab->num_a8_erratum_fixes = 0;
4636 }
906e58ca
NC		 4637 return TRUE;
4638
4639 error_ret_free_local:
4640 return FALSE;
5e681ec4
PB		 4641}
4642
906e58ca
NC		 4643/* Build all the stubs associated with the current output file. The
4644 stubs are kept in a hash table attached to the main linker hash
4645 table. We also set up the .plt entries for statically linked PIC
4646 functions here. This function is called via arm_elf_finish in the
4647 linker. */
252b5132 4648
906e58ca
NC		 4649bfd_boolean
4650elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4651{
906e58ca
NC		 4652 asection *stub_sec;
4653 struct bfd_hash_table *table;
4654 struct elf32_arm_link_hash_table *htab;
252b5132 4655
906e58ca 4656 htab = elf32_arm_hash_table (info);
252b5132 4657
906e58ca
NC		 4658 for (stub_sec = htab->stub_bfd->sections;
4659 stub_sec != NULL;
4660 stub_sec = stub_sec->next)
252b5132 4661 {
906e58ca
NC		 4662 bfd_size_type size;
4663
8029a119 4664 /* Ignore non-stub sections. */
906e58ca
NC		 4665 if (!strstr (stub_sec->name, STUB_SUFFIX))
4666 continue;
4667
4668 /* Allocate memory to hold the linker stubs. */
4669 size = stub_sec->size;
4670 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4671 if (stub_sec->contents == NULL && size != 0)
4672 return FALSE;
4673 stub_sec->size = 0;
252b5132
RH		 4674 }
4675
906e58ca
NC		 4676 /* Build the stubs as directed by the stub hash table. */
4677 table = &htab->stub_hash_table;
4678 bfd_hash_traverse (table, arm_build_one_stub, info);
252b5132 4679
906e58ca 4680 return TRUE;
252b5132
RH		 4681}
4682
9b485d32
NC		 4683/* Locate the Thumb encoded calling stub for NAME. */
4684
252b5132 4685static struct elf_link_hash_entry *
57e8b36a
NC		 4686find_thumb_glue (struct bfd_link_info *link_info,
4687 const char *name,
f2a9dd69 4688 char **error_message)
252b5132
RH		 4689{
4690 char *tmp_name;
4691 struct elf_link_hash_entry *hash;
4692 struct elf32_arm_link_hash_table *hash_table;
4693
4694 /* We need a pointer to the armelf specific hash table. */
4695 hash_table = elf32_arm_hash_table (link_info);
4696
57e8b36a
NC		 4697 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4698 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4699
4700 BFD_ASSERT (tmp_name);
4701
4702 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4703
4704 hash = elf_link_hash_lookup
b34976b6 4705 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4706
b1657152
AM		 4707 if (hash == NULL
4708 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4709 tmp_name, name) == -1)
4710 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4711
4712 free (tmp_name);
4713
4714 return hash;
4715}
4716
9b485d32
NC		 4717/* Locate the ARM encoded calling stub for NAME. */
4718
252b5132 4719static struct elf_link_hash_entry *
57e8b36a
NC		 4720find_arm_glue (struct bfd_link_info *link_info,
4721 const char *name,
f2a9dd69 4722 char **error_message)
252b5132
RH		 4723{
4724 char *tmp_name;
4725 struct elf_link_hash_entry *myh;
4726 struct elf32_arm_link_hash_table *hash_table;
4727
4728 /* We need a pointer to the elfarm specific hash table. */
4729 hash_table = elf32_arm_hash_table (link_info);
4730
57e8b36a
NC		 4731 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4732 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4733
4734 BFD_ASSERT (tmp_name);
4735
4736 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4737
4738 myh = elf_link_hash_lookup
b34976b6 4739 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4740
b1657152
AM		 4741 if (myh == NULL
4742 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4743 tmp_name, name) == -1)
4744 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4745
4746 free (tmp_name);
4747
4748 return myh;
4749}
4750
8f6277f5 4751/* ARM->Thumb glue (static images):
252b5132
RH		 4752
4753 .arm
4754 __func_from_arm:
4755 ldr r12, __func_addr
4756 bx r12
4757 __func_addr:
906e58ca 4758 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4759
26079076
PB		 4760 (v5t static images)
4761 .arm
4762 __func_from_arm:
4763 ldr pc, __func_addr
4764 __func_addr:
906e58ca 4765 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4766
8f6277f5
PB		 4767 (relocatable images)
4768 .arm
4769 __func_from_arm:
4770 ldr r12, __func_offset
4771 add r12, r12, pc
4772 bx r12
4773 __func_offset:
8029a119 4774 .word func - . */
8f6277f5
PB		 4775
4776#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4777static const insn32 a2t1_ldr_insn = 0xe59fc000;
4778static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4779static const insn32 a2t3_func_addr_insn = 0x00000001;
4780
26079076
PB		 4781#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4782static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4783static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4784
8f6277f5
PB		 4785#define ARM2THUMB_PIC_GLUE_SIZE 16
4786static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4787static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4788static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4789
9b485d32 4790/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4791
8029a119
NC		 4792 .thumb .thumb
4793 .align 2 .align 2
4794 __func_from_thumb: __func_from_thumb:
4795 bx pc push {r6, lr}
4796 nop ldr r6, __func_addr
4797 .arm mov lr, pc
4798 b func bx r6
fcef9eb7
NC		 4799 .arm
4800 ;; back_to_thumb
4801 ldmia r13! {r6, lr}
4802 bx lr
8029a119
NC		 4803 __func_addr:
4804 .word func */
252b5132
RH		 4805
4806#define THUMB2ARM_GLUE_SIZE 8
4807static const insn16 t2a1_bx_pc_insn = 0x4778;
4808static const insn16 t2a2_noop_insn = 0x46c0;
4809static const insn32 t2a3_b_insn = 0xea000000;
4810
c7b8f16e
JB		 4811#define VFP11_ERRATUM_VENEER_SIZE 8
4812
845b51d6
PB		 4813#define ARM_BX_VENEER_SIZE 12
4814static const insn32 armbx1_tst_insn = 0xe3100001;
4815static const insn32 armbx2_moveq_insn = 0x01a0f000;
4816static const insn32 armbx3_bx_insn = 0xe12fff10;
4817
7e392df6 4818#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4819static void
4820arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4821{
4822 asection * s;
8029a119 4823 bfd_byte * contents;
252b5132 4824
8029a119 4825 if (size == 0)
3e6b1042
DJ		 4826 {
4827 /* Do not include empty glue sections in the output. */
4828 if (abfd != NULL)
4829 {
4830 s = bfd_get_section_by_name (abfd, name);
4831 if (s != NULL)
4832 s->flags |= SEC_EXCLUDE;
4833 }
4834 return;
4835 }
252b5132 4836
8029a119 4837 BFD_ASSERT (abfd != NULL);
252b5132 4838
8029a119
NC		 4839 s = bfd_get_section_by_name (abfd, name);
4840 BFD_ASSERT (s != NULL);
252b5132 4841
8029a119 4842 contents = bfd_alloc (abfd, size);
252b5132 4843
8029a119
NC		 4844 BFD_ASSERT (s->size == size);
4845 s->contents = contents;
4846}
906e58ca 4847
8029a119
NC		 4848bfd_boolean
4849bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4850{
4851 struct elf32_arm_link_hash_table * globals;
906e58ca 4852
8029a119
NC		 4853 globals = elf32_arm_hash_table (info);
4854 BFD_ASSERT (globals != NULL);
906e58ca 4855
8029a119
NC		 4856 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4857 globals->arm_glue_size,
4858 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4859
8029a119
NC		 4860 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4861 globals->thumb_glue_size,
4862 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4863
8029a119
NC		 4864 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4865 globals->vfp11_erratum_glue_size,
4866 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4867
8029a119
NC		 4868 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4869 globals->bx_glue_size,
845b51d6
PB		 4870 ARM_BX_GLUE_SECTION_NAME);
4871
b34976b6 4872 return TRUE;
252b5132
RH		 4873}
4874
a4fd1a8e 4875/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4876 returns the symbol identifying the stub. */
4877
a4fd1a8e 4878static struct elf_link_hash_entry *
57e8b36a
NC		 4879record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4880 struct elf_link_hash_entry * h)
252b5132
RH		 4881{
4882 const char * name = h->root.root.string;
63b0f745 4883 asection * s;
252b5132
RH		 4884 char * tmp_name;
4885 struct elf_link_hash_entry * myh;
14a793b2 4886 struct bfd_link_hash_entry * bh;
252b5132 4887 struct elf32_arm_link_hash_table * globals;
dc810e39 4888 bfd_vma val;
2f475487 4889 bfd_size_type size;
252b5132
RH		 4890
4891 globals = elf32_arm_hash_table (link_info);
4892
4893 BFD_ASSERT (globals != NULL);
4894 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4895
4896 s = bfd_get_section_by_name
4897 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4898
252b5132
RH		 4899 BFD_ASSERT (s != NULL);
4900
57e8b36a 4901 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4902
4903 BFD_ASSERT (tmp_name);
4904
4905 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4906
4907 myh = elf_link_hash_lookup
b34976b6 4908 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 4909
4910 if (myh != NULL)
4911 {
9b485d32 4912 /* We've already seen this guy. */
252b5132 4913 free (tmp_name);
a4fd1a8e 4914 return myh;
252b5132
RH		 4915 }
4916
57e8b36a
NC		 4917 /* The only trick here is using hash_table->arm_glue_size as the value.
4918 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 4919 putting it. The +1 on the value marks that the stub has not been
4920 output yet - not that it is a Thumb function. */
14a793b2 4921 bh = NULL;
dc810e39
AM		 4922 val = globals->arm_glue_size + 1;
4923 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4924 tmp_name, BSF_GLOBAL, s, val,
b34976b6 4925 NULL, TRUE, FALSE, &bh);
252b5132 4926
b7693d02
DJ		 4927 myh = (struct elf_link_hash_entry *) bh;
4928 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4929 myh->forced_local = 1;
4930
252b5132
RH		 4931 free (tmp_name);
4932
27e55c4d
PB		 4933 if (link_info->shared || globals->root.is_relocatable_executable
4934 || globals->pic_veneer)
2f475487 4935 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 4936 else if (globals->use_blx)
4937 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 4938 else
2f475487
AM		 4939 size = ARM2THUMB_STATIC_GLUE_SIZE;
4940
4941 s->size += size;
4942 globals->arm_glue_size += size;
252b5132 4943
a4fd1a8e 4944 return myh;
252b5132
RH		 4945}
4946
845b51d6
PB		 4947/* Allocate space for ARMv4 BX veneers. */
4948
4949static void
4950record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
4951{
4952 asection * s;
4953 struct elf32_arm_link_hash_table *globals;
4954 char *tmp_name;
4955 struct elf_link_hash_entry *myh;
4956 struct bfd_link_hash_entry *bh;
4957 bfd_vma val;
4958
4959 /* BX PC does not need a veneer. */
4960 if (reg == 15)
4961 return;
4962
4963 globals = elf32_arm_hash_table (link_info);
4964
4965 BFD_ASSERT (globals != NULL);
4966 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4967
4968 /* Check if this veneer has already been allocated. */
4969 if (globals->bx_glue_offset[reg])
4970 return;
4971
4972 s = bfd_get_section_by_name
4973 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
4974
4975 BFD_ASSERT (s != NULL);
4976
4977 /* Add symbol for veneer. */
4978 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 4979
845b51d6 4980 BFD_ASSERT (tmp_name);
906e58ca 4981
845b51d6 4982 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 4983
845b51d6
PB		 4984 myh = elf_link_hash_lookup
4985 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 4986
845b51d6 4987 BFD_ASSERT (myh == NULL);
906e58ca 4988
845b51d6
PB		 4989 bh = NULL;
4990 val = globals->bx_glue_size;
4991 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4992 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
4993 NULL, TRUE, FALSE, &bh);
4994
4995 myh = (struct elf_link_hash_entry *) bh;
4996 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4997 myh->forced_local = 1;
4998
4999 s->size += ARM_BX_VENEER_SIZE;
5000 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5001 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5002}
5003
5004
c7b8f16e
JB		 5005/* Add an entry to the code/data map for section SEC. */
5006
5007static void
5008elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5009{
5010 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5011 unsigned int newidx;
906e58ca 5012
c7b8f16e
JB		 5013 if (sec_data->map == NULL)
5014 {
5015 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
5016 sec_data->mapcount = 0;
5017 sec_data->mapsize = 1;
5018 }
906e58ca 5019
c7b8f16e 5020 newidx = sec_data->mapcount++;
906e58ca 5021
c7b8f16e
JB		 5022 if (sec_data->mapcount > sec_data->mapsize)
5023 {
5024 sec_data->mapsize *= 2;
515ef31d
NC		 5025 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5026 * sizeof (elf32_arm_section_map));
5027 }
5028
5029 if (sec_data->map)
5030 {
5031 sec_data->map[newidx].vma = vma;
5032 sec_data->map[newidx].type = type;
c7b8f16e 5033 }
c7b8f16e
JB		 5034}
5035
5036
5037/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5038 veneers are handled for now. */
5039
5040static bfd_vma
5041record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5042 elf32_vfp11_erratum_list *branch,
5043 bfd *branch_bfd,
5044 asection *branch_sec,
5045 unsigned int offset)
5046{
5047 asection *s;
5048 struct elf32_arm_link_hash_table *hash_table;
5049 char *tmp_name;
5050 struct elf_link_hash_entry *myh;
5051 struct bfd_link_hash_entry *bh;
5052 bfd_vma val;
5053 struct _arm_elf_section_data *sec_data;
5054 int errcount;
5055 elf32_vfp11_erratum_list *newerr;
906e58ca 5056
c7b8f16e 5057 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5058
c7b8f16e
JB		 5059 BFD_ASSERT (hash_table != NULL);
5060 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5061
c7b8f16e
JB		 5062 s = bfd_get_section_by_name
5063 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5064
c7b8f16e 5065 sec_data = elf32_arm_section_data (s);
906e58ca 5066
c7b8f16e 5067 BFD_ASSERT (s != NULL);
906e58ca 5068
c7b8f16e
JB		 5069 tmp_name = bfd_malloc ((bfd_size_type) strlen
5070 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5071
c7b8f16e 5072 BFD_ASSERT (tmp_name);
906e58ca 5073
c7b8f16e
JB		 5074 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5075 hash_table->num_vfp11_fixes);
906e58ca 5076
c7b8f16e
JB		 5077 myh = elf_link_hash_lookup
5078 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5079
c7b8f16e 5080 BFD_ASSERT (myh == NULL);
906e58ca 5081
c7b8f16e
JB		 5082 bh = NULL;
5083 val = hash_table->vfp11_erratum_glue_size;
5084 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5085 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5086 NULL, TRUE, FALSE, &bh);
5087
5088 myh = (struct elf_link_hash_entry *) bh;
5089 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5090 myh->forced_local = 1;
5091
5092 /* Link veneer back to calling location. */
5093 errcount = ++(sec_data->erratumcount);
5094 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5095
c7b8f16e
JB		 5096 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5097 newerr->vma = -1;
5098 newerr->u.v.branch = branch;
5099 newerr->u.v.id = hash_table->num_vfp11_fixes;
5100 branch->u.b.veneer = newerr;
5101
5102 newerr->next = sec_data->erratumlist;
5103 sec_data->erratumlist = newerr;
5104
5105 /* A symbol for the return from the veneer. */
5106 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5107 hash_table->num_vfp11_fixes);
5108
5109 myh = elf_link_hash_lookup
5110 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5111
c7b8f16e
JB		 5112 if (myh != NULL)
5113 abort ();
5114
5115 bh = NULL;
5116 val = offset + 4;
5117 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5118 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5119
c7b8f16e
JB		 5120 myh = (struct elf_link_hash_entry *) bh;
5121 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5122 myh->forced_local = 1;
5123
5124 free (tmp_name);
906e58ca 5125
c7b8f16e
JB		 5126 /* Generate a mapping symbol for the veneer section, and explicitly add an
5127 entry for that symbol to the code/data map for the section. */
5128 if (hash_table->vfp11_erratum_glue_size == 0)
5129 {
5130 bh = NULL;
5131 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5132 ever requires this erratum fix. */
5133 _bfd_generic_link_add_one_symbol (link_info,
5134 hash_table->bfd_of_glue_owner, "$a",
5135 BSF_LOCAL, s, 0, NULL,
5136 TRUE, FALSE, &bh);
5137
5138 myh = (struct elf_link_hash_entry *) bh;
5139 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5140 myh->forced_local = 1;
906e58ca 5141
c7b8f16e
JB		 5142 /* The elf32_arm_init_maps function only cares about symbols from input
5143 BFDs. We must make a note of this generated mapping symbol
5144 ourselves so that code byteswapping works properly in
5145 elf32_arm_write_section. */
5146 elf32_arm_section_map_add (s, 'a', 0);
5147 }
906e58ca 5148
c7b8f16e
JB		 5149 s->size += VFP11_ERRATUM_VENEER_SIZE;
5150 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5151 hash_table->num_vfp11_fixes++;
906e58ca 5152
c7b8f16e
JB		 5153 /* The offset of the veneer. */
5154 return val;
5155}
5156
8029a119 5157#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5158 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5159 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5160
5161/* Create a fake section for use by the ARM backend of the linker. */
5162
5163static bfd_boolean
5164arm_make_glue_section (bfd * abfd, const char * name)
5165{
5166 asection * sec;
5167
5168 sec = bfd_get_section_by_name (abfd, name);
5169 if (sec != NULL)
5170 /* Already made. */
5171 return TRUE;
5172
5173 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5174
5175 if (sec == NULL
5176 || !bfd_set_section_alignment (abfd, sec, 2))
5177 return FALSE;
5178
5179 /* Set the gc mark to prevent the section from being removed by garbage
5180 collection, despite the fact that no relocs refer to this section. */
5181 sec->gc_mark = 1;
5182
5183 return TRUE;
5184}
5185
8afb0e02
NC		 5186/* Add the glue sections to ABFD. This function is called from the
5187 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5188
b34976b6 5189bfd_boolean
57e8b36a
NC		 5190bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5191 struct bfd_link_info *info)
252b5132 5192{
8afb0e02
NC		 5193 /* If we are only performing a partial
5194 link do not bother adding the glue. */
1049f94e 5195 if (info->relocatable)
b34976b6 5196 return TRUE;
252b5132 5197
8029a119
NC		 5198 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5199 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5200 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5201 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5202}
5203
5204/* Select a BFD to be used to hold the sections used by the glue code.
5205 This function is called from the linker scripts in ld/emultempl/
8029a119 5206 {armelf/pe}.em. */
8afb0e02 5207
b34976b6 5208bfd_boolean
57e8b36a 5209bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5210{
5211 struct elf32_arm_link_hash_table *globals;
5212
5213 /* If we are only performing a partial link
5214 do not bother getting a bfd to hold the glue. */
1049f94e 5215 if (info->relocatable)
b34976b6 5216 return TRUE;
8afb0e02 5217
b7693d02
DJ		 5218 /* Make sure we don't attach the glue sections to a dynamic object. */
5219 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5220
8afb0e02
NC		 5221 globals = elf32_arm_hash_table (info);
5222
5223 BFD_ASSERT (globals != NULL);
5224
5225 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5226 return TRUE;
8afb0e02 5227
252b5132
RH		 5228 /* Save the bfd for later use. */
5229 globals->bfd_of_glue_owner = abfd;
cedb70c5 5230
b34976b6 5231 return TRUE;
252b5132
RH		 5232}
5233
906e58ca
NC		 5234static void
5235check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5236{
104d59d1
JM		 5237 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5238 Tag_CPU_arch) > 2)
39b41c9c
PB		 5239 globals->use_blx = 1;
5240}
5241
b34976b6 5242bfd_boolean
57e8b36a 5243bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5244 struct bfd_link_info *link_info)
252b5132
RH		 5245{
5246 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5247 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5248 Elf_Internal_Rela *irel, *irelend;
5249 bfd_byte *contents = NULL;
252b5132
RH		 5250
5251 asection *sec;
5252 struct elf32_arm_link_hash_table *globals;
5253
5254 /* If we are only performing a partial link do not bother
5255 to construct any glue. */
1049f94e 5256 if (link_info->relocatable)
b34976b6 5257 return TRUE;
252b5132 5258
39ce1a6a
NC		 5259 /* Here we have a bfd that is to be included on the link. We have a
5260 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5261 globals = elf32_arm_hash_table (link_info);
5262
5263 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5264
5265 check_use_blx (globals);
252b5132 5266
d504ffc8 5267 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5268 {
d003868e
AM		 5269 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5270 abfd);
e489d0ae
PB		 5271 return FALSE;
5272 }
f21f3fe0 5273
39ce1a6a
NC		 5274 /* PR 5398: If we have not decided to include any loadable sections in
5275 the output then we will not have a glue owner bfd. This is OK, it
5276 just means that there is nothing else for us to do here. */
5277 if (globals->bfd_of_glue_owner == NULL)
5278 return TRUE;
5279
252b5132
RH		 5280 /* Rummage around all the relocs and map the glue vectors. */
5281 sec = abfd->sections;
5282
5283 if (sec == NULL)
b34976b6 5284 return TRUE;
252b5132
RH		 5285
5286 for (; sec != NULL; sec = sec->next)
5287 {
5288 if (sec->reloc_count == 0)
5289 continue;
5290
2f475487
AM		 5291 if ((sec->flags & SEC_EXCLUDE) != 0)
5292 continue;
5293
0ffa91dd 5294 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5295
9b485d32 5296 /* Load the relocs. */
6cdc0ccc 5297 internal_relocs
906e58ca 5298 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5299
6cdc0ccc
AM		 5300 if (internal_relocs == NULL)
5301 goto error_return;
252b5132 5302
6cdc0ccc
AM		 5303 irelend = internal_relocs + sec->reloc_count;
5304 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5305 {
5306 long r_type;
5307 unsigned long r_index;
252b5132
RH		 5308
5309 struct elf_link_hash_entry *h;
5310
5311 r_type = ELF32_R_TYPE (irel->r_info);
5312 r_index = ELF32_R_SYM (irel->r_info);
5313
9b485d32 5314 /* These are the only relocation types we care about. */
ba96a88f 5315 if ( r_type != R_ARM_PC24
845b51d6 5316 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5317 continue;
5318
5319 /* Get the section contents if we haven't done so already. */
5320 if (contents == NULL)
5321 {
5322 /* Get cached copy if it exists. */
5323 if (elf_section_data (sec)->this_hdr.contents != NULL)
5324 contents = elf_section_data (sec)->this_hdr.contents;
5325 else
5326 {
5327 /* Go get them off disk. */
57e8b36a 5328 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5329 goto error_return;
5330 }
5331 }
5332
845b51d6
PB		 5333 if (r_type == R_ARM_V4BX)
5334 {
5335 int reg;
5336
5337 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5338 record_arm_bx_glue (link_info, reg);
5339 continue;
5340 }
5341
a7c10850 5342 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5343 h = NULL;
5344
9b485d32 5345 /* We don't care about local symbols. */
252b5132
RH		 5346 if (r_index < symtab_hdr->sh_info)
5347 continue;
5348
9b485d32 5349 /* This is an external symbol. */
252b5132
RH		 5350 r_index -= symtab_hdr->sh_info;
5351 h = (struct elf_link_hash_entry *)
5352 elf_sym_hashes (abfd)[r_index];
5353
5354 /* If the relocation is against a static symbol it must be within
5355 the current section and so cannot be a cross ARM/Thumb relocation. */
5356 if (h == NULL)
5357 continue;
5358
d504ffc8
DJ		 5359 /* If the call will go through a PLT entry then we do not need
5360 glue. */
5361 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5362 continue;
5363
252b5132
RH		 5364 switch (r_type)
5365 {
5366 case R_ARM_PC24:
5367 /* This one is a call from arm code. We need to look up
2f0ca46a 5368 the target of the call. If it is a thumb target, we
252b5132 5369 insert glue. */
ebe24dd4 5370 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5371 record_arm_to_thumb_glue (link_info, h);
5372 break;
5373
252b5132 5374 default:
c6596c5e 5375 abort ();
252b5132
RH		 5376 }
5377 }
6cdc0ccc
AM		 5378
5379 if (contents != NULL
5380 && elf_section_data (sec)->this_hdr.contents != contents)
5381 free (contents);
5382 contents = NULL;
5383
5384 if (internal_relocs != NULL
5385 && elf_section_data (sec)->relocs != internal_relocs)
5386 free (internal_relocs);
5387 internal_relocs = NULL;
252b5132
RH		 5388 }
5389
b34976b6 5390 return TRUE;
9a5aca8c 5391
252b5132 5392error_return:
6cdc0ccc
AM		 5393 if (contents != NULL
5394 && elf_section_data (sec)->this_hdr.contents != contents)
5395 free (contents);
5396 if (internal_relocs != NULL
5397 && elf_section_data (sec)->relocs != internal_relocs)
5398 free (internal_relocs);
9a5aca8c 5399
b34976b6 5400 return FALSE;
252b5132 5401}
7e392df6 5402#endif
252b5132 5403
eb043451 5404
c7b8f16e
JB		 5405/* Initialise maps of ARM/Thumb/data for input BFDs. */
5406
5407void
5408bfd_elf32_arm_init_maps (bfd *abfd)
5409{
5410 Elf_Internal_Sym *isymbuf;
5411 Elf_Internal_Shdr *hdr;
5412 unsigned int i, localsyms;
5413
af1f4419
NC		 5414 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5415 if (! is_arm_elf (abfd))
5416 return;
5417
c7b8f16e
JB		 5418 if ((abfd->flags & DYNAMIC) != 0)
5419 return;
5420
0ffa91dd 5421 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5422 localsyms = hdr->sh_info;
5423
5424 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5425 should contain the number of local symbols, which should come before any
5426 global symbols. Mapping symbols are always local. */
5427 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5428 NULL);
5429
5430 /* No internal symbols read? Skip this BFD. */
5431 if (isymbuf == NULL)
5432 return;
5433
5434 for (i = 0; i < localsyms; i++)
5435 {
5436 Elf_Internal_Sym *isym = &isymbuf[i];
5437 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5438 const char *name;
906e58ca 5439
c7b8f16e
JB		 5440 if (sec != NULL
5441 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5442 {
5443 name = bfd_elf_string_from_elf_section (abfd,
5444 hdr->sh_link, isym->st_name);
906e58ca 5445
c7b8f16e
JB		 5446 if (bfd_is_arm_special_symbol_name (name,
5447 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5448 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5449 }
5450 }
5451}
5452
5453
48229727
JB		 5454/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5455 say what they wanted. */
5456
5457void
5458bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5459{
5460 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5461 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5462
5463 if (globals->fix_cortex_a8 == -1)
5464 {
5465 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5466 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5467 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5468 || out_attr[Tag_CPU_arch_profile].i == 0))
5469 globals->fix_cortex_a8 = 1;
5470 else
5471 globals->fix_cortex_a8 = 0;
5472 }
5473}
5474
5475
c7b8f16e
JB		 5476void
5477bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5478{
5479 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5480 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5481
c7b8f16e
JB		 5482 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5483 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5484 {
5485 switch (globals->vfp11_fix)
5486 {
5487 case BFD_ARM_VFP11_FIX_DEFAULT:
5488 case BFD_ARM_VFP11_FIX_NONE:
5489 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5490 break;
906e58ca 5491
c7b8f16e
JB		 5492 default:
5493 /* Give a warning, but do as the user requests anyway. */
5494 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5495 "workaround is not necessary for target architecture"), obfd);
5496 }
5497 }
5498 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5499 /* For earlier architectures, we might need the workaround, but do not
5500 enable it by default. If users is running with broken hardware, they
5501 must enable the erratum fix explicitly. */
5502 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5503}
5504
5505
906e58ca
NC		 5506enum bfd_arm_vfp11_pipe
5507{
c7b8f16e
JB		 5508 VFP11_FMAC,
5509 VFP11_LS,
5510 VFP11_DS,
5511 VFP11_BAD
5512};
5513
5514/* Return a VFP register number. This is encoded as RX:X for single-precision
5515 registers, or X:RX for double-precision registers, where RX is the group of
5516 four bits in the instruction encoding and X is the single extension bit.
5517 RX and X fields are specified using their lowest (starting) bit. The return
5518 value is:
5519
5520 0...31: single-precision registers s0...s31
5521 32...63: double-precision registers d0...d31.
906e58ca 5522
c7b8f16e
JB		 5523 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5524 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5525
c7b8f16e
JB		 5526static unsigned int
5527bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5528 unsigned int x)
5529{
5530 if (is_double)
5531 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5532 else
5533 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5534}
5535
5536/* Set bits in *WMASK according to a register number REG as encoded by
5537 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5538
5539static void
5540bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5541{
5542 if (reg < 32)
5543 *wmask |= 1 << reg;
5544 else if (reg < 48)
5545 *wmask |= 3 << ((reg - 32) * 2);
5546}
5547
5548/* Return TRUE if WMASK overwrites anything in REGS. */
5549
5550static bfd_boolean
5551bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5552{
5553 int i;
906e58ca 5554
c7b8f16e
JB		 5555 for (i = 0; i < numregs; i++)
5556 {
5557 unsigned int reg = regs[i];
5558
5559 if (reg < 32 && (wmask & (1 << reg)) != 0)
5560 return TRUE;
906e58ca 5561
c7b8f16e
JB		 5562 reg -= 32;
5563
5564 if (reg >= 16)
5565 continue;
906e58ca 5566
c7b8f16e
JB		 5567 if ((wmask & (3 << (reg * 2))) != 0)
5568 return TRUE;
5569 }
906e58ca 5570
c7b8f16e
JB		 5571 return FALSE;
5572}
5573
5574/* In this function, we're interested in two things: finding input registers
5575 for VFP data-processing instructions, and finding the set of registers which
5576 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5577 hold the written set, so FLDM etc. are easy to deal with (we're only
5578 interested in 32 SP registers or 16 dp registers, due to the VFP version
5579 implemented by the chip in question). DP registers are marked by setting
5580 both SP registers in the write mask). */
5581
5582static enum bfd_arm_vfp11_pipe
5583bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5584 int *numregs)
5585{
5586 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
5587 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5588
5589 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5590 {
5591 unsigned int pqrs;
5592 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5593 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5594
5595 pqrs = ((insn & 0x00800000) >> 20)
5596 | ((insn & 0x00300000) >> 19)
5597 | ((insn & 0x00000040) >> 6);
5598
5599 switch (pqrs)
5600 {
5601 case 0: /* fmac[sd]. */
5602 case 1: /* fnmac[sd]. */
5603 case 2: /* fmsc[sd]. */
5604 case 3: /* fnmsc[sd]. */
5605 pipe = VFP11_FMAC;
5606 bfd_arm_vfp11_write_mask (destmask, fd);
5607 regs[0] = fd;
5608 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5609 regs[2] = fm;
5610 *numregs = 3;
5611 break;
5612
5613 case 4: /* fmul[sd]. */
5614 case 5: /* fnmul[sd]. */
5615 case 6: /* fadd[sd]. */
5616 case 7: /* fsub[sd]. */
5617 pipe = VFP11_FMAC;
5618 goto vfp_binop;
5619
5620 case 8: /* fdiv[sd]. */
5621 pipe = VFP11_DS;
5622 vfp_binop:
5623 bfd_arm_vfp11_write_mask (destmask, fd);
5624 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5625 regs[1] = fm;
5626 *numregs = 2;
5627 break;
5628
5629 case 15: /* extended opcode. */
5630 {
5631 unsigned int extn = ((insn >> 15) & 0x1e)
5632 | ((insn >> 7) & 1);
5633
5634 switch (extn)
5635 {
5636 case 0: /* fcpy[sd]. */
5637 case 1: /* fabs[sd]. */
5638 case 2: /* fneg[sd]. */
5639 case 8: /* fcmp[sd]. */
5640 case 9: /* fcmpe[sd]. */
5641 case 10: /* fcmpz[sd]. */
5642 case 11: /* fcmpez[sd]. */
5643 case 16: /* fuito[sd]. */
5644 case 17: /* fsito[sd]. */
5645 case 24: /* ftoui[sd]. */
5646 case 25: /* ftouiz[sd]. */
5647 case 26: /* ftosi[sd]. */
5648 case 27: /* ftosiz[sd]. */
5649 /* These instructions will not bounce due to underflow. */
5650 *numregs = 0;
5651 pipe = VFP11_FMAC;
5652 break;
5653
5654 case 3: /* fsqrt[sd]. */
5655 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5656 registers to cause the erratum in previous instructions. */
5657 bfd_arm_vfp11_write_mask (destmask, fd);
5658 pipe = VFP11_DS;
5659 break;
5660
5661 case 15: /* fcvt{ds,sd}. */
5662 {
5663 int rnum = 0;
5664
5665 bfd_arm_vfp11_write_mask (destmask, fd);
5666
5667 /* Only FCVTSD can underflow. */
5668 if ((insn & 0x100) != 0)
5669 regs[rnum++] = fm;
5670
5671 *numregs = rnum;
5672
5673 pipe = VFP11_FMAC;
5674 }
5675 break;
5676
5677 default:
5678 return VFP11_BAD;
5679 }
5680 }
5681 break;
5682
5683 default:
5684 return VFP11_BAD;
5685 }
5686 }
5687 /* Two-register transfer. */
5688 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5689 {
5690 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5691
c7b8f16e
JB		 5692 if ((insn & 0x100000) == 0)
5693 {
5694 if (is_double)
5695 bfd_arm_vfp11_write_mask (destmask, fm);
5696 else
5697 {
5698 bfd_arm_vfp11_write_mask (destmask, fm);
5699 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5700 }
5701 }
5702
5703 pipe = VFP11_LS;
5704 }
5705 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5706 {
5707 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5708 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5709
c7b8f16e
JB		 5710 switch (puw)
5711 {
5712 case 0: /* Two-reg transfer. We should catch these above. */
5713 abort ();
906e58ca 5714
c7b8f16e
JB		 5715 case 2: /* fldm[sdx]. */
5716 case 3:
5717 case 5:
5718 {
5719 unsigned int i, offset = insn & 0xff;
5720
5721 if (is_double)
5722 offset >>= 1;
5723
5724 for (i = fd; i < fd + offset; i++)
5725 bfd_arm_vfp11_write_mask (destmask, i);
5726 }
5727 break;
906e58ca 5728
c7b8f16e
JB		 5729 case 4: /* fld[sd]. */
5730 case 6:
5731 bfd_arm_vfp11_write_mask (destmask, fd);
5732 break;
906e58ca 5733
c7b8f16e
JB		 5734 default:
5735 return VFP11_BAD;
5736 }
5737
5738 pipe = VFP11_LS;
5739 }
5740 /* Single-register transfer. Note L==0. */
5741 else if ((insn & 0x0f100e10) == 0x0e000a10)
5742 {
5743 unsigned int opcode = (insn >> 21) & 7;
5744 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5745
5746 switch (opcode)
5747 {
5748 case 0: /* fmsr/fmdlr. */
5749 case 1: /* fmdhr. */
5750 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5751 destination register. I don't know if this is exactly right,
5752 but it is the conservative choice. */
5753 bfd_arm_vfp11_write_mask (destmask, fn);
5754 break;
5755
5756 case 7: /* fmxr. */
5757 break;
5758 }
5759
5760 pipe = VFP11_LS;
5761 }
5762
5763 return pipe;
5764}
5765
5766
5767static int elf32_arm_compare_mapping (const void * a, const void * b);
5768
5769
5770/* Look for potentially-troublesome code sequences which might trigger the
5771 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5772 (available from ARM) for details of the erratum. A short version is
5773 described in ld.texinfo. */
5774
5775bfd_boolean
5776bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5777{
5778 asection *sec;
5779 bfd_byte *contents = NULL;
5780 int state = 0;
5781 int regs[3], numregs = 0;
5782 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5783 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5784
c7b8f16e
JB		 5785 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5786 The states transition as follows:
906e58ca 5787
c7b8f16e
JB		 5788 0 -> 1 (vector) or 0 -> 2 (scalar)
5789 A VFP FMAC-pipeline instruction has been seen. Fill
5790 regs[0]..regs[numregs-1] with its input operands. Remember this
5791 instruction in 'first_fmac'.
5792
5793 1 -> 2
5794 Any instruction, except for a VFP instruction which overwrites
5795 regs[*].
906e58ca 5796
c7b8f16e
JB		 5797 1 -> 3 [ -> 0 ] or
5798 2 -> 3 [ -> 0 ]
5799 A VFP instruction has been seen which overwrites any of regs[*].
5800 We must make a veneer! Reset state to 0 before examining next
5801 instruction.
906e58ca 5802
c7b8f16e
JB		 5803 2 -> 0
5804 If we fail to match anything in state 2, reset to state 0 and reset
5805 the instruction pointer to the instruction after 'first_fmac'.
5806
5807 If the VFP11 vector mode is in use, there must be at least two unrelated
5808 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5809 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5810
5811 /* If we are only performing a partial link do not bother
5812 to construct any glue. */
5813 if (link_info->relocatable)
5814 return TRUE;
5815
0ffa91dd
NC		 5816 /* Skip if this bfd does not correspond to an ELF image. */
5817 if (! is_arm_elf (abfd))
5818 return TRUE;
906e58ca 5819
c7b8f16e
JB		 5820 /* We should have chosen a fix type by the time we get here. */
5821 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5822
5823 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5824 return TRUE;
2e6030b9 5825
33a7ffc2
JM		 5826 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5827 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5828 return TRUE;
5829
c7b8f16e
JB		 5830 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5831 {
5832 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5833 struct _arm_elf_section_data *sec_data;
5834
5835 /* If we don't have executable progbits, we're not interested in this
5836 section. Also skip if section is to be excluded. */
5837 if (elf_section_type (sec) != SHT_PROGBITS
5838 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5839 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5840 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5841 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5842 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5843 continue;
5844
5845 sec_data = elf32_arm_section_data (sec);
906e58ca 5846
c7b8f16e
JB		 5847 if (sec_data->mapcount == 0)
5848 continue;
906e58ca 5849
c7b8f16e
JB		 5850 if (elf_section_data (sec)->this_hdr.contents != NULL)
5851 contents = elf_section_data (sec)->this_hdr.contents;
5852 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5853 goto error_return;
5854
5855 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5856 elf32_arm_compare_mapping);
5857
5858 for (span = 0; span < sec_data->mapcount; span++)
5859 {
5860 unsigned int span_start = sec_data->map[span].vma;
5861 unsigned int span_end = (span == sec_data->mapcount - 1)
5862 ? sec->size : sec_data->map[span + 1].vma;
5863 char span_type = sec_data->map[span].type;
906e58ca 5864
c7b8f16e
JB		 5865 /* FIXME: Only ARM mode is supported at present. We may need to
5866 support Thumb-2 mode also at some point. */
5867 if (span_type != 'a')
5868 continue;
5869
5870 for (i = span_start; i < span_end;)
5871 {
5872 unsigned int next_i = i + 4;
5873 unsigned int insn = bfd_big_endian (abfd)
5874 ? (contents[i] << 24)
5875 | (contents[i + 1] << 16)
5876 | (contents[i + 2] << 8)
5877 | contents[i + 3]
5878 : (contents[i + 3] << 24)
5879 | (contents[i + 2] << 16)
5880 | (contents[i + 1] << 8)
5881 | contents[i];
5882 unsigned int writemask = 0;
5883 enum bfd_arm_vfp11_pipe pipe;
5884
5885 switch (state)
5886 {
5887 case 0:
5888 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5889 &numregs);
5890 /* I'm assuming the VFP11 erratum can trigger with denorm
5891 operands on either the FMAC or the DS pipeline. This might
5892 lead to slightly overenthusiastic veneer insertion. */
5893 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5894 {
5895 state = use_vector ? 1 : 2;
5896 first_fmac = i;
5897 veneer_of_insn = insn;
5898 }
5899 break;
5900
5901 case 1:
5902 {
5903 int other_regs[3], other_numregs;
5904 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5905 other_regs,
5906 &other_numregs);
5907 if (pipe != VFP11_BAD
5908 && bfd_arm_vfp11_antidependency (writemask, regs,
5909 numregs))
5910 state = 3;
5911 else
5912 state = 2;
5913 }
5914 break;
5915
5916 case 2:
5917 {
5918 int other_regs[3], other_numregs;
5919 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5920 other_regs,
5921 &other_numregs);
5922 if (pipe != VFP11_BAD
5923 && bfd_arm_vfp11_antidependency (writemask, regs,
5924 numregs))
5925 state = 3;
5926 else
5927 {
5928 state = 0;
5929 next_i = first_fmac + 4;
5930 }
5931 }
5932 break;
5933
5934 case 3:
5935 abort (); /* Should be unreachable. */
5936 }
5937
5938 if (state == 3)
5939 {
5940 elf32_vfp11_erratum_list *newerr
5941 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5942 int errcount;
5943
5944 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
5945
5946 newerr->u.b.vfp_insn = veneer_of_insn;
5947
5948 switch (span_type)
5949 {
5950 case 'a':
5951 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
5952 break;
906e58ca 5953
c7b8f16e
JB		 5954 default:
5955 abort ();
5956 }
5957
5958 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
5959 first_fmac);
5960
5961 newerr->vma = -1;
5962
5963 newerr->next = sec_data->erratumlist;
5964 sec_data->erratumlist = newerr;
5965
5966 state = 0;
5967 }
5968
5969 i = next_i;
5970 }
5971 }
906e58ca 5972
c7b8f16e
JB		 5973 if (contents != NULL
5974 && elf_section_data (sec)->this_hdr.contents != contents)
5975 free (contents);
5976 contents = NULL;
5977 }
5978
5979 return TRUE;
5980
5981error_return:
5982 if (contents != NULL
5983 && elf_section_data (sec)->this_hdr.contents != contents)
5984 free (contents);
906e58ca 5985
c7b8f16e
JB		 5986 return FALSE;
5987}
5988
5989/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
5990 after sections have been laid out, using specially-named symbols. */
5991
5992void
5993bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
5994 struct bfd_link_info *link_info)
5995{
5996 asection *sec;
5997 struct elf32_arm_link_hash_table *globals;
5998 char *tmp_name;
906e58ca 5999
c7b8f16e
JB		 6000 if (link_info->relocatable)
6001 return;
2e6030b9
MS		 6002
6003 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6004 if (! is_arm_elf (abfd))
2e6030b9
MS		 6005 return;
6006
c7b8f16e 6007 globals = elf32_arm_hash_table (link_info);
906e58ca 6008
c7b8f16e
JB		 6009 tmp_name = bfd_malloc ((bfd_size_type) strlen
6010 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6011
6012 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6013 {
6014 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6015 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6016
c7b8f16e
JB		 6017 for (; errnode != NULL; errnode = errnode->next)
6018 {
6019 struct elf_link_hash_entry *myh;
6020 bfd_vma vma;
6021
6022 switch (errnode->type)
6023 {
6024 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6025 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6026 /* Find veneer symbol. */
6027 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6028 errnode->u.b.veneer->u.v.id);
6029
6030 myh = elf_link_hash_lookup
6031 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6032
6033 if (myh == NULL)
6034 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6035 "`%s'"), abfd, tmp_name);
6036
6037 vma = myh->root.u.def.section->output_section->vma
6038 + myh->root.u.def.section->output_offset
6039 + myh->root.u.def.value;
6040
6041 errnode->u.b.veneer->vma = vma;
6042 break;
6043
6044 case VFP11_ERRATUM_ARM_VENEER:
6045 case VFP11_ERRATUM_THUMB_VENEER:
6046 /* Find return location. */
6047 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6048 errnode->u.v.id);
6049
6050 myh = elf_link_hash_lookup
6051 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6052
6053 if (myh == NULL)
6054 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6055 "`%s'"), abfd, tmp_name);
6056
6057 vma = myh->root.u.def.section->output_section->vma
6058 + myh->root.u.def.section->output_offset
6059 + myh->root.u.def.value;
6060
6061 errnode->u.v.branch->vma = vma;
6062 break;
906e58ca 6063
c7b8f16e
JB		 6064 default:
6065 abort ();
6066 }
6067 }
6068 }
906e58ca 6069
c7b8f16e
JB		 6070 free (tmp_name);
6071}
6072
6073
eb043451
PB		 6074/* Set target relocation values needed during linking. */
6075
6076void
bf21ed78
MS		 6077bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6078 struct bfd_link_info *link_info,
eb043451 6079 int target1_is_rel,
319850b4 6080 char * target2_type,
33bfe774 6081 int fix_v4bx,
c7b8f16e 6082 int use_blx,
bf21ed78 6083 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6084 int no_enum_warn, int no_wchar_warn,
48229727 6085 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6086{
6087 struct elf32_arm_link_hash_table *globals;
6088
6089 globals = elf32_arm_hash_table (link_info);
6090
6091 globals->target1_is_rel = target1_is_rel;
6092 if (strcmp (target2_type, "rel") == 0)
6093 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6094 else if (strcmp (target2_type, "abs") == 0)
6095 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6096 else if (strcmp (target2_type, "got-rel") == 0)
6097 globals->target2_reloc = R_ARM_GOT_PREL;
6098 else
6099 {
6100 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6101 target2_type);
6102 }
319850b4 6103 globals->fix_v4bx = fix_v4bx;
33bfe774 6104 globals->use_blx |= use_blx;
c7b8f16e 6105 globals->vfp11_fix = vfp11_fix;
27e55c4d 6106 globals->pic_veneer = pic_veneer;
48229727 6107 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6108
0ffa91dd
NC		 6109 BFD_ASSERT (is_arm_elf (output_bfd));
6110 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6111 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6112}
eb043451 6113
12a0a0fd 6114/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6115
12a0a0fd
PB		 6116static void
6117insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6118{
6119 bfd_vma upper;
6120 bfd_vma lower;
6121 int reloc_sign;
6122
6123 BFD_ASSERT ((offset & 1) == 0);
6124
6125 upper = bfd_get_16 (abfd, insn);
6126 lower = bfd_get_16 (abfd, insn + 2);
6127 reloc_sign = (offset < 0) ? 1 : 0;
6128 upper = (upper & ~(bfd_vma) 0x7ff)
6129 | ((offset >> 12) & 0x3ff)
6130 | (reloc_sign << 10);
906e58ca 6131 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6132 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6133 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6134 | ((offset >> 1) & 0x7ff);
6135 bfd_put_16 (abfd, upper, insn);
6136 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6137}
6138
9b485d32
NC		 6139/* Thumb code calling an ARM function. */
6140
252b5132 6141static int
57e8b36a
NC		 6142elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6143 const char * name,
6144 bfd * input_bfd,
6145 bfd * output_bfd,
6146 asection * input_section,
6147 bfd_byte * hit_data,
6148 asection * sym_sec,
6149 bfd_vma offset,
6150 bfd_signed_vma addend,
f2a9dd69
DJ		 6151 bfd_vma val,
6152 char **error_message)
252b5132 6153{
bcbdc74c 6154 asection * s = 0;
dc810e39 6155 bfd_vma my_offset;
252b5132 6156 long int ret_offset;
bcbdc74c
NC		 6157 struct elf_link_hash_entry * myh;
6158 struct elf32_arm_link_hash_table * globals;
252b5132 6159
f2a9dd69 6160 myh = find_thumb_glue (info, name, error_message);
252b5132 6161 if (myh == NULL)
b34976b6 6162 return FALSE;
252b5132
RH		 6163
6164 globals = elf32_arm_hash_table (info);
6165
6166 BFD_ASSERT (globals != NULL);
6167 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6168
6169 my_offset = myh->root.u.def.value;
6170
6171 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6172 THUMB2ARM_GLUE_SECTION_NAME);
6173
6174 BFD_ASSERT (s != NULL);
6175 BFD_ASSERT (s->contents != NULL);
6176 BFD_ASSERT (s->output_section != NULL);
6177
6178 if ((my_offset & 0x01) == 0x01)
6179 {
6180 if (sym_sec != NULL
6181 && sym_sec->owner != NULL
6182 && !INTERWORK_FLAG (sym_sec->owner))
6183 {
8f615d07 6184 (*_bfd_error_handler)
d003868e
AM		 6185 (_("%B(%s): warning: interworking not enabled.\n"
6186 " first occurrence: %B: thumb call to arm"),
6187 sym_sec->owner, input_bfd, name);
252b5132 6188
b34976b6 6189 return FALSE;
252b5132
RH		 6190 }
6191
6192 --my_offset;
6193 myh->root.u.def.value = my_offset;
6194
52ab56c2
PB		 6195 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6196 s->contents + my_offset);
252b5132 6197
52ab56c2
PB		 6198 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6199 s->contents + my_offset + 2);
252b5132
RH		 6200
6201 ret_offset =
9b485d32
NC		 6202 /* Address of destination of the stub. */
6203 ((bfd_signed_vma) val)
252b5132 6204 - ((bfd_signed_vma)
57e8b36a
NC		 6205 /* Offset from the start of the current section
6206 to the start of the stubs. */
9b485d32
NC		 6207 (s->output_offset
6208 /* Offset of the start of this stub from the start of the stubs. */
6209 + my_offset
6210 /* Address of the start of the current section. */
6211 + s->output_section->vma)
6212 /* The branch instruction is 4 bytes into the stub. */
6213 + 4
6214 /* ARM branches work from the pc of the instruction + 8. */
6215 + 8);
252b5132 6216
52ab56c2
PB		 6217 put_arm_insn (globals, output_bfd,
6218 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6219 s->contents + my_offset + 4);
252b5132
RH		 6220 }
6221
6222 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6223
427bfd90
NC		 6224 /* Now go back and fix up the original BL insn to point to here. */
6225 ret_offset =
6226 /* Address of where the stub is located. */
6227 (s->output_section->vma + s->output_offset + my_offset)
6228 /* Address of where the BL is located. */
57e8b36a
NC		 6229 - (input_section->output_section->vma + input_section->output_offset
6230 + offset)
427bfd90
NC		 6231 /* Addend in the relocation. */
6232 - addend
6233 /* Biassing for PC-relative addressing. */
6234 - 8;
252b5132 6235
12a0a0fd 6236 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6237
b34976b6 6238 return TRUE;
252b5132
RH		 6239}
6240
a4fd1a8e 6241/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6242
a4fd1a8e
PB		 6243static struct elf_link_hash_entry *
6244elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6245 const char * name,
6246 bfd * input_bfd,
6247 bfd * output_bfd,
6248 asection * sym_sec,
6249 bfd_vma val,
8029a119
NC		 6250 asection * s,
6251 char ** error_message)
252b5132 6252{
dc810e39 6253 bfd_vma my_offset;
252b5132 6254 long int ret_offset;
bcbdc74c
NC		 6255 struct elf_link_hash_entry * myh;
6256 struct elf32_arm_link_hash_table * globals;
252b5132 6257
f2a9dd69 6258 myh = find_arm_glue (info, name, error_message);
252b5132 6259 if (myh == NULL)
a4fd1a8e 6260 return NULL;
252b5132
RH		 6261
6262 globals = elf32_arm_hash_table (info);
6263
6264 BFD_ASSERT (globals != NULL);
6265 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6266
6267 my_offset = myh->root.u.def.value;
252b5132
RH		 6268
6269 if ((my_offset & 0x01) == 0x01)
6270 {
6271 if (sym_sec != NULL
6272 && sym_sec->owner != NULL
6273 && !INTERWORK_FLAG (sym_sec->owner))
6274 {
8f615d07 6275 (*_bfd_error_handler)
d003868e
AM		 6276 (_("%B(%s): warning: interworking not enabled.\n"
6277 " first occurrence: %B: arm call to thumb"),
6278 sym_sec->owner, input_bfd, name);
252b5132 6279 }
9b485d32 6280
252b5132
RH		 6281 --my_offset;
6282 myh->root.u.def.value = my_offset;
6283
27e55c4d
PB		 6284 if (info->shared || globals->root.is_relocatable_executable
6285 || globals->pic_veneer)
8f6277f5
PB		 6286 {
6287 /* For relocatable objects we can't use absolute addresses,
6288 so construct the address from a relative offset. */
6289 /* TODO: If the offset is small it's probably worth
6290 constructing the address with adds. */
52ab56c2
PB		 6291 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6292 s->contents + my_offset);
6293 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6294 s->contents + my_offset + 4);
6295 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6296 s->contents + my_offset + 8);
8f6277f5
PB		 6297 /* Adjust the offset by 4 for the position of the add,
6298 and 8 for the pipeline offset. */
6299 ret_offset = (val - (s->output_offset
6300 + s->output_section->vma
6301 + my_offset + 12))
6302 | 1;
6303 bfd_put_32 (output_bfd, ret_offset,
6304 s->contents + my_offset + 12);
6305 }
26079076
PB		 6306 else if (globals->use_blx)
6307 {
6308 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6309 s->contents + my_offset);
6310
6311 /* It's a thumb address. Add the low order bit. */
6312 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6313 s->contents + my_offset + 4);
6314 }
8f6277f5
PB		 6315 else
6316 {
52ab56c2
PB		 6317 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6318 s->contents + my_offset);
252b5132 6319
52ab56c2
PB		 6320 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6321 s->contents + my_offset + 4);
252b5132 6322
8f6277f5
PB		 6323 /* It's a thumb address. Add the low order bit. */
6324 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6325 s->contents + my_offset + 8);
8029a119
NC		 6326
6327 my_offset += 12;
8f6277f5 6328 }
252b5132
RH		 6329 }
6330
6331 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6332
a4fd1a8e
PB		 6333 return myh;
6334}
6335
6336/* Arm code calling a Thumb function. */
6337
6338static int
6339elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6340 const char * name,
6341 bfd * input_bfd,
6342 bfd * output_bfd,
6343 asection * input_section,
6344 bfd_byte * hit_data,
6345 asection * sym_sec,
6346 bfd_vma offset,
6347 bfd_signed_vma addend,
f2a9dd69
DJ		 6348 bfd_vma val,
6349 char **error_message)
a4fd1a8e
PB		 6350{
6351 unsigned long int tmp;
6352 bfd_vma my_offset;
6353 asection * s;
6354 long int ret_offset;
6355 struct elf_link_hash_entry * myh;
6356 struct elf32_arm_link_hash_table * globals;
6357
6358 globals = elf32_arm_hash_table (info);
6359
6360 BFD_ASSERT (globals != NULL);
6361 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6362
6363 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6364 ARM2THUMB_GLUE_SECTION_NAME);
6365 BFD_ASSERT (s != NULL);
6366 BFD_ASSERT (s->contents != NULL);
6367 BFD_ASSERT (s->output_section != NULL);
6368
6369 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6370 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6371 if (!myh)
6372 return FALSE;
6373
6374 my_offset = myh->root.u.def.value;
252b5132
RH		 6375 tmp = bfd_get_32 (input_bfd, hit_data);
6376 tmp = tmp & 0xFF000000;
6377
9b485d32 6378 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6379 ret_offset = (s->output_offset
6380 + my_offset
6381 + s->output_section->vma
6382 - (input_section->output_offset
6383 + input_section->output_section->vma
6384 + offset + addend)
6385 - 8);
9a5aca8c 6386
252b5132
RH		 6387 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6388
dc810e39 6389 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6390
b34976b6 6391 return TRUE;
252b5132
RH		 6392}
6393
a4fd1a8e
PB		 6394/* Populate Arm stub for an exported Thumb function. */
6395
6396static bfd_boolean
6397elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6398{
6399 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6400 asection * s;
6401 struct elf_link_hash_entry * myh;
6402 struct elf32_arm_link_hash_entry *eh;
6403 struct elf32_arm_link_hash_table * globals;
6404 asection *sec;
6405 bfd_vma val;
f2a9dd69 6406 char *error_message;
a4fd1a8e 6407
906e58ca 6408 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6409 /* Allocate stubs for exported Thumb functions on v4t. */
6410 if (eh->export_glue == NULL)
6411 return TRUE;
6412
6413 globals = elf32_arm_hash_table (info);
6414
6415 BFD_ASSERT (globals != NULL);
6416 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6417
6418 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6419 ARM2THUMB_GLUE_SECTION_NAME);
6420 BFD_ASSERT (s != NULL);
6421 BFD_ASSERT (s->contents != NULL);
6422 BFD_ASSERT (s->output_section != NULL);
6423
6424 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6425
6426 BFD_ASSERT (sec->output_section != NULL);
6427
a4fd1a8e
PB		 6428 val = eh->export_glue->root.u.def.value + sec->output_offset
6429 + sec->output_section->vma;
8029a119 6430
a4fd1a8e
PB		 6431 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6432 h->root.u.def.section->owner,
f2a9dd69
DJ		 6433 globals->obfd, sec, val, s,
6434 &error_message);
a4fd1a8e
PB		 6435 BFD_ASSERT (myh);
6436 return TRUE;
6437}
6438
845b51d6
PB		 6439/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6440
6441static bfd_vma
6442elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6443{
6444 bfd_byte *p;
6445 bfd_vma glue_addr;
6446 asection *s;
6447 struct elf32_arm_link_hash_table *globals;
6448
6449 globals = elf32_arm_hash_table (info);
6450
6451 BFD_ASSERT (globals != NULL);
6452 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6453
6454 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6455 ARM_BX_GLUE_SECTION_NAME);
6456 BFD_ASSERT (s != NULL);
6457 BFD_ASSERT (s->contents != NULL);
6458 BFD_ASSERT (s->output_section != NULL);
6459
6460 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6461
6462 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6463
6464 if ((globals->bx_glue_offset[reg] & 1) == 0)
6465 {
6466 p = s->contents + glue_addr;
6467 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6468 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6469 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6470 globals->bx_glue_offset[reg] |= 1;
6471 }
6472
6473 return glue_addr + s->output_section->vma + s->output_offset;
6474}
6475
a4fd1a8e
PB		 6476/* Generate Arm stubs for exported Thumb symbols. */
6477static void
906e58ca 6478elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6479 struct bfd_link_info *link_info)
6480{
6481 struct elf32_arm_link_hash_table * globals;
6482
8029a119
NC		 6483 if (link_info == NULL)
6484 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6485 return;
6486
6487 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6488 /* If blx is available then exported Thumb symbols are OK and there is
6489 nothing to do. */
a4fd1a8e
PB		 6490 if (globals->use_blx)
6491 return;
6492
6493 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6494 link_info);
6495}
6496
eb043451
PB		 6497/* Some relocations map to different relocations depending on the
6498 target. Return the real relocation. */
8029a119 6499
eb043451
PB		 6500static int
6501arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6502 int r_type)
6503{
6504 switch (r_type)
6505 {
6506 case R_ARM_TARGET1:
6507 if (globals->target1_is_rel)
6508 return R_ARM_REL32;
6509 else
6510 return R_ARM_ABS32;
6511
6512 case R_ARM_TARGET2:
6513 return globals->target2_reloc;
6514
6515 default:
6516 return r_type;
6517 }
6518}
eb043451 6519
ba93b8ac
DJ		 6520/* Return the base VMA address which should be subtracted from real addresses
6521 when resolving @dtpoff relocation.
6522 This is PT_TLS segment p_vaddr. */
6523
6524static bfd_vma
6525dtpoff_base (struct bfd_link_info *info)
6526{
6527 /* If tls_sec is NULL, we should have signalled an error already. */
6528 if (elf_hash_table (info)->tls_sec == NULL)
6529 return 0;
6530 return elf_hash_table (info)->tls_sec->vma;
6531}
6532
6533/* Return the relocation value for @tpoff relocation
6534 if STT_TLS virtual address is ADDRESS. */
6535
6536static bfd_vma
6537tpoff (struct bfd_link_info *info, bfd_vma address)
6538{
6539 struct elf_link_hash_table *htab = elf_hash_table (info);
6540 bfd_vma base;
6541
6542 /* If tls_sec is NULL, we should have signalled an error already. */
6543 if (htab->tls_sec == NULL)
6544 return 0;
6545 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6546 return address - htab->tls_sec->vma + base;
6547}
6548
00a97672
RS		 6549/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6550 VALUE is the relocation value. */
6551
6552static bfd_reloc_status_type
6553elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6554{
6555 if (value > 0xfff)
6556 return bfd_reloc_overflow;
6557
6558 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6559 bfd_put_32 (abfd, value, data);
6560 return bfd_reloc_ok;
6561}
6562
4962c51a
MS		 6563/* For a given value of n, calculate the value of G_n as required to
6564 deal with group relocations. We return it in the form of an
6565 encoded constant-and-rotation, together with the final residual. If n is
6566 specified as less than zero, then final_residual is filled with the
6567 input value and no further action is performed. */
6568
6569static bfd_vma
6570calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6571{
6572 int current_n;
6573 bfd_vma g_n;
6574 bfd_vma encoded_g_n = 0;
6575 bfd_vma residual = value; /* Also known as Y_n. */
6576
6577 for (current_n = 0; current_n <= n; current_n++)
6578 {
6579 int shift;
6580
6581 /* Calculate which part of the value to mask. */
6582 if (residual == 0)
6583 shift = 0;
6584 else
6585 {
6586 int msb;
6587
6588 /* Determine the most significant bit in the residual and
6589 align the resulting value to a 2-bit boundary. */
6590 for (msb = 30; msb >= 0; msb -= 2)
6591 if (residual & (3 << msb))
6592 break;
6593
6594 /* The desired shift is now (msb - 6), or zero, whichever
6595 is the greater. */
6596 shift = msb - 6;
6597 if (shift < 0)
6598 shift = 0;
6599 }
6600
6601 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6602 g_n = residual & (0xff << shift);
6603 encoded_g_n = (g_n >> shift)
6604 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6605
6606 /* Calculate the residual for the next time around. */
6607 residual &= ~g_n;
6608 }
6609
6610 *final_residual = residual;
6611
6612 return encoded_g_n;
6613}
6614
6615/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6616 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6617
4962c51a 6618static int
906e58ca 6619identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6620{
6621 int opcode = insn & 0x1e00000;
6622
6623 if (opcode == 1 << 23) /* ADD */
6624 return 1;
6625
6626 if (opcode == 1 << 22) /* SUB */
6627 return -1;
6628
6629 return 0;
6630}
6631
252b5132 6632/* Perform a relocation as part of a final link. */
9b485d32 6633
252b5132 6634static bfd_reloc_status_type
57e8b36a
NC		 6635elf32_arm_final_link_relocate (reloc_howto_type * howto,
6636 bfd * input_bfd,
6637 bfd * output_bfd,
6638 asection * input_section,
6639 bfd_byte * contents,
6640 Elf_Internal_Rela * rel,
6641 bfd_vma value,
6642 struct bfd_link_info * info,
6643 asection * sym_sec,
6644 const char * sym_name,
6645 int sym_flags,
0945cdfd 6646 struct elf_link_hash_entry * h,
f2a9dd69 6647 bfd_boolean * unresolved_reloc_p,
8029a119 6648 char ** error_message)
252b5132
RH		 6649{
6650 unsigned long r_type = howto->type;
6651 unsigned long r_symndx;
6652 bfd_byte * hit_data = contents + rel->r_offset;
6653 bfd * dynobj = NULL;
6654 Elf_Internal_Shdr * symtab_hdr;
6655 struct elf_link_hash_entry ** sym_hashes;
6656 bfd_vma * local_got_offsets;
6657 asection * sgot = NULL;
6658 asection * splt = NULL;
6659 asection * sreloc = NULL;
252b5132 6660 bfd_vma addend;
ba96a88f
NC		 6661 bfd_signed_vma signed_addend;
6662 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6663
9c504268
PB		 6664 globals = elf32_arm_hash_table (info);
6665
0ffa91dd
NC		 6666 BFD_ASSERT (is_arm_elf (input_bfd));
6667
6668 /* Some relocation types map to different relocations depending on the
9c504268 6669 target. We pick the right one here. */
eb043451
PB		 6670 r_type = arm_real_reloc_type (globals, r_type);
6671 if (r_type != howto->type)
6672 howto = elf32_arm_howto_from_type (r_type);
9c504268 6673
cac15327
NC		 6674 /* If the start address has been set, then set the EF_ARM_HASENTRY
6675 flag. Setting this more than once is redundant, but the cost is
6676 not too high, and it keeps the code simple.
99e4ae17 6677
cac15327
NC		 6678 The test is done here, rather than somewhere else, because the
6679 start address is only set just before the final link commences.
6680
6681 Note - if the user deliberately sets a start address of 0, the
6682 flag will not be set. */
6683 if (bfd_get_start_address (output_bfd) != 0)
6684 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6685
252b5132
RH		 6686 dynobj = elf_hash_table (info)->dynobj;
6687 if (dynobj)
6688 {
6689 sgot = bfd_get_section_by_name (dynobj, ".got");
6690 splt = bfd_get_section_by_name (dynobj, ".plt");
6691 }
0ffa91dd 6692 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6693 sym_hashes = elf_sym_hashes (input_bfd);
6694 local_got_offsets = elf_local_got_offsets (input_bfd);
6695 r_symndx = ELF32_R_SYM (rel->r_info);
6696
4e7fd91e 6697 if (globals->use_rel)
ba96a88f 6698 {
4e7fd91e
PB		 6699 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6700
6701 if (addend & ((howto->src_mask + 1) >> 1))
6702 {
6703 signed_addend = -1;
6704 signed_addend &= ~ howto->src_mask;
6705 signed_addend |= addend;
6706 }
6707 else
6708 signed_addend = addend;
ba96a88f
NC		 6709 }
6710 else
4e7fd91e 6711 addend = signed_addend = rel->r_addend;
f21f3fe0 6712
252b5132
RH		 6713 switch (r_type)
6714 {
6715 case R_ARM_NONE:
28a094c2
DJ		 6716 /* We don't need to find a value for this symbol. It's just a
6717 marker. */
6718 *unresolved_reloc_p = FALSE;
252b5132
RH		 6719 return bfd_reloc_ok;
6720
00a97672
RS		 6721 case R_ARM_ABS12:
6722 if (!globals->vxworks_p)
6723 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6724
252b5132
RH		 6725 case R_ARM_PC24:
6726 case R_ARM_ABS32:
bb224fc3 6727 case R_ARM_ABS32_NOI:
252b5132 6728 case R_ARM_REL32:
bb224fc3 6729 case R_ARM_REL32_NOI:
5b5bb741
PB		 6730 case R_ARM_CALL:
6731 case R_ARM_JUMP24:
dfc5f959 6732 case R_ARM_XPC25:
eb043451 6733 case R_ARM_PREL31:
7359ea65 6734 case R_ARM_PLT32:
7359ea65
DJ		 6735 /* Handle relocations which should use the PLT entry. ABS32/REL32
6736 will use the symbol's value, which may point to a PLT entry, but we
6737 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6738 branches in this object should go to it, except if the PLT is too
6739 far away, in which case a long branch stub should be inserted. */
bb224fc3 6740 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6741 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6742 && r_type != R_ARM_CALL
6743 && r_type != R_ARM_JUMP24
6744 && r_type != R_ARM_PLT32)
7359ea65 6745 && h != NULL
c84cd8ee 6746 && splt != NULL
7359ea65
DJ		 6747 && h->plt.offset != (bfd_vma) -1)
6748 {
c84cd8ee
DJ		 6749 /* If we've created a .plt section, and assigned a PLT entry to
6750 this function, it should not be known to bind locally. If
6751 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6752 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6753
6754 value = (splt->output_section->vma
6755 + splt->output_offset
6756 + h->plt.offset);
0945cdfd 6757 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6758 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6759 contents, rel->r_offset, value,
00a97672 6760 rel->r_addend);
7359ea65
DJ		 6761 }
6762
67687978
PB		 6763 /* When generating a shared object or relocatable executable, these
6764 relocations are copied into the output file to be resolved at
6765 run time. */
6766 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6767 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6768 && !(elf32_arm_hash_table (info)->vxworks_p
6769 && strcmp (input_section->output_section->name,
6770 ".tls_vars") == 0)
bb224fc3 6771 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6772 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6773 && (h == NULL
6774 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6775 || h->root.type != bfd_link_hash_undefweak)
6776 && r_type != R_ARM_PC24
5b5bb741
PB		 6777 && r_type != R_ARM_CALL
6778 && r_type != R_ARM_JUMP24
ee06dc07 6779 && r_type != R_ARM_PREL31
7359ea65 6780 && r_type != R_ARM_PLT32)
252b5132 6781 {
947216bf
AM		 6782 Elf_Internal_Rela outrel;
6783 bfd_byte *loc;
b34976b6 6784 bfd_boolean skip, relocate;
f21f3fe0 6785
0945cdfd
DJ		 6786 *unresolved_reloc_p = FALSE;
6787
252b5132
RH		 6788 if (sreloc == NULL)
6789 {
83bac4b0
NC		 6790 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6791 ! globals->use_rel);
f21f3fe0 6792
83bac4b0 6793 if (sreloc == NULL)
252b5132 6794 return bfd_reloc_notsupported;
252b5132 6795 }
f21f3fe0 6796
b34976b6
AM		 6797 skip = FALSE;
6798 relocate = FALSE;
f21f3fe0 6799
00a97672 6800 outrel.r_addend = addend;
c629eae0
JJ		 6801 outrel.r_offset =
6802 _bfd_elf_section_offset (output_bfd, info, input_section,
6803 rel->r_offset);
6804 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6805 skip = TRUE;
0bb2d96a 6806 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6807 skip = TRUE, relocate = TRUE;
252b5132
RH		 6808 outrel.r_offset += (input_section->output_section->vma
6809 + input_section->output_offset);
f21f3fe0 6810
252b5132 6811 if (skip)
0bb2d96a 6812 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6813 else if (h != NULL
6814 && h->dynindx != -1
7359ea65 6815 && (!info->shared
5e681ec4 6816 || !info->symbolic
f5385ebf 6817 || !h->def_regular))
5e681ec4 6818 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6819 else
6820 {
a16385dc
MM		 6821 int symbol;
6822
5e681ec4 6823 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6824 if (sym_flags == STT_ARM_TFUNC)
6825 value |= 1;
a16385dc 6826 if (globals->symbian_p)
6366ff1e 6827 {
74541ad4
AM		 6828 asection *osec;
6829
6366ff1e
MM		 6830 /* On Symbian OS, the data segment and text segement
6831 can be relocated independently. Therefore, we
6832 must indicate the segment to which this
6833 relocation is relative. The BPABI allows us to
6834 use any symbol in the right segment; we just use
6835 the section symbol as it is convenient. (We
6836 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6837 will not appear in the dynamic symbol table.)
6838
6839 Note that the dynamic linker ignores the section
6840 symbol value, so we don't subtract osec->vma
6841 from the emitted reloc addend. */
10dbd1f3 6842 if (sym_sec)
74541ad4 6843 osec = sym_sec->output_section;
10dbd1f3 6844 else
74541ad4
AM		 6845 osec = input_section->output_section;
6846 symbol = elf_section_data (osec)->dynindx;
6847 if (symbol == 0)
6848 {
6849 struct elf_link_hash_table *htab = elf_hash_table (info);
6850
6851 if ((osec->flags & SEC_READONLY) == 0
6852 && htab->data_index_section != NULL)
6853 osec = htab->data_index_section;
6854 else
6855 osec = htab->text_index_section;
6856 symbol = elf_section_data (osec)->dynindx;
6857 }
6366ff1e
MM		 6858 BFD_ASSERT (symbol != 0);
6859 }
a16385dc
MM		 6860 else
6861 /* On SVR4-ish systems, the dynamic loader cannot
6862 relocate the text and data segments independently,
6863 so the symbol does not matter. */
6864 symbol = 0;
6865 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6866 if (globals->use_rel)
6867 relocate = TRUE;
6868 else
6869 outrel.r_addend += value;
252b5132 6870 }
f21f3fe0 6871
947216bf 6872 loc = sreloc->contents;
00a97672
RS		 6873 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6874 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6875
f21f3fe0 6876 /* If this reloc is against an external symbol, we do not want to
252b5132 6877 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6878 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6879 if (! relocate)
6880 return bfd_reloc_ok;
9a5aca8c 6881
f21f3fe0 6882 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6883 contents, rel->r_offset, value,
6884 (bfd_vma) 0);
6885 }
6886 else switch (r_type)
6887 {
00a97672
RS		 6888 case R_ARM_ABS12:
6889 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6890
dfc5f959 6891 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6892 case R_ARM_CALL:
6893 case R_ARM_JUMP24:
8029a119 6894 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6895 case R_ARM_PLT32:
906e58ca
NC		 6896 {
6897 bfd_vma from;
6898 bfd_signed_vma branch_offset;
6899 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6900
dfc5f959 6901 if (r_type == R_ARM_XPC25)
252b5132 6902 {
dfc5f959
NC		 6903 /* Check for Arm calling Arm function. */
6904 /* FIXME: Should we translate the instruction into a BL
6905 instruction instead ? */
6906 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6907 (*_bfd_error_handler)
6908 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
6909 input_bfd,
6910 h ? h->root.root.string : "(local)");
dfc5f959 6911 }
155d87d7 6912 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 6913 {
6914 /* Check for Arm calling Thumb function. */
6915 if (sym_flags == STT_ARM_TFUNC)
6916 {
f2a9dd69
DJ		 6917 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
6918 output_bfd, input_section,
6919 hit_data, sym_sec, rel->r_offset,
6920 signed_addend, value,
6921 error_message))
6922 return bfd_reloc_ok;
6923 else
6924 return bfd_reloc_dangerous;
dfc5f959 6925 }
252b5132 6926 }
ba96a88f 6927
906e58ca 6928 /* Check if a stub has to be inserted because the
8029a119 6929 destination is too far or we are changing mode. */
155d87d7
CL		 6930 if ( r_type == R_ARM_CALL
6931 || r_type == R_ARM_JUMP24
6932 || r_type == R_ARM_PLT32)
906e58ca 6933 {
5fa9e92f
CL		 6934 /* If the call goes through a PLT entry, make sure to
6935 check distance to the right destination address. */
6936 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6937 {
6938 value = (splt->output_section->vma
6939 + splt->output_offset
6940 + h->plt.offset);
6941 *unresolved_reloc_p = FALSE;
6942 }
6943
6944 from = (input_section->output_section->vma
6945 + input_section->output_offset
6946 + rel->r_offset);
6947 branch_offset = (bfd_signed_vma)(value - from);
6948
906e58ca
NC		 6949 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
6950 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 6951 || ((sym_flags == STT_ARM_TFUNC)
6952 && (((r_type == R_ARM_CALL) && !globals->use_blx)
6953 || (r_type == R_ARM_JUMP24)
6954 || (r_type == R_ARM_PLT32) ))
6955 )
906e58ca
NC		 6956 {
6957 /* The target is out of reach, so redirect the
6958 branch to the local stub for this function. */
6959
6960 stub_entry = elf32_arm_get_stub_entry (input_section,
6961 sym_sec, h,
6962 rel, globals);
6963 if (stub_entry != NULL)
6964 value = (stub_entry->stub_offset
6965 + stub_entry->stub_sec->output_offset
6966 + stub_entry->stub_sec->output_section->vma);
6967 }
6968 }
6969
dea514f5
PB		 6970 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6971 where:
6972 S is the address of the symbol in the relocation.
6973 P is address of the instruction being relocated.
6974 A is the addend (extracted from the instruction) in bytes.
6975
6976 S is held in 'value'.
6977 P is the base address of the section containing the
6978 instruction plus the offset of the reloc into that
6979 section, ie:
6980 (input_section->output_section->vma +
6981 input_section->output_offset +
6982 rel->r_offset).
6983 A is the addend, converted into bytes, ie:
6984 (signed_addend * 4)
6985
6986 Note: None of these operations have knowledge of the pipeline
6987 size of the processor, thus it is up to the assembler to
6988 encode this information into the addend. */
6989 value -= (input_section->output_section->vma
6990 + input_section->output_offset);
6991 value -= rel->r_offset;
4e7fd91e
PB		 6992 if (globals->use_rel)
6993 value += (signed_addend << howto->size);
6994 else
6995 /* RELA addends do not have to be adjusted by howto->size. */
6996 value += signed_addend;
23080146 6997
dcb5e6e6
NC		 6998 signed_addend = value;
6999 signed_addend >>= howto->rightshift;
9a5aca8c 7000
5ab79981 7001 /* A branch to an undefined weak symbol is turned into a jump to
82b5c97a
CL		 7002 the next instruction unless a PLT entry will be created. */
7003 if (h && h->root.type == bfd_link_hash_undefweak
7004 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7005 {
7006 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
7007 | 0x0affffff;
7008 }
7009 else
59f2c4e7 7010 {
9b485d32 7011 /* Perform a signed range check. */
dcb5e6e6 7012 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7013 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7014 return bfd_reloc_overflow;
9a5aca8c 7015
5ab79981 7016 addend = (value & 2);
39b41c9c 7017
5ab79981
PB		 7018 value = (signed_addend & howto->dst_mask)
7019 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7020
5ab79981
PB		 7021 if (r_type == R_ARM_CALL)
7022 {
155d87d7
CL		 7023 /* Set the H bit in the BLX instruction. */
7024 if (sym_flags == STT_ARM_TFUNC)
7025 {
7026 if (addend)
7027 value |= (1 << 24);
7028 else
7029 value &= ~(bfd_vma)(1 << 24);
7030 }
7031
5ab79981 7032 /* Select the correct instruction (BL or BLX). */
906e58ca 7033 /* Only if we are not handling a BL to a stub. In this
8029a119 7034 case, mode switching is performed by the stub. */
906e58ca 7035 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7036 value |= (1 << 28);
7037 else
7038 {
7039 value &= ~(bfd_vma)(1 << 28);
7040 value |= (1 << 24);
7041 }
39b41c9c
PB		 7042 }
7043 }
906e58ca 7044 }
252b5132 7045 break;
f21f3fe0 7046
252b5132
RH		 7047 case R_ARM_ABS32:
7048 value += addend;
7049 if (sym_flags == STT_ARM_TFUNC)
7050 value |= 1;
7051 break;
f21f3fe0 7052
bb224fc3
MS		 7053 case R_ARM_ABS32_NOI:
7054 value += addend;
7055 break;
7056
252b5132 7057 case R_ARM_REL32:
a8bc6c78
PB		 7058 value += addend;
7059 if (sym_flags == STT_ARM_TFUNC)
7060 value |= 1;
252b5132 7061 value -= (input_section->output_section->vma
62efb346 7062 + input_section->output_offset + rel->r_offset);
252b5132 7063 break;
eb043451 7064
bb224fc3
MS		 7065 case R_ARM_REL32_NOI:
7066 value += addend;
7067 value -= (input_section->output_section->vma
7068 + input_section->output_offset + rel->r_offset);
7069 break;
7070
eb043451
PB		 7071 case R_ARM_PREL31:
7072 value -= (input_section->output_section->vma
7073 + input_section->output_offset + rel->r_offset);
7074 value += signed_addend;
7075 if (! h || h->root.type != bfd_link_hash_undefweak)
7076 {
8029a119 7077 /* Check for overflow. */
eb043451
PB		 7078 if ((value ^ (value >> 1)) & (1 << 30))
7079 return bfd_reloc_overflow;
7080 }
7081 value &= 0x7fffffff;
7082 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7083 if (sym_flags == STT_ARM_TFUNC)
7084 value |= 1;
7085 break;
252b5132 7086 }
f21f3fe0 7087
252b5132
RH		 7088 bfd_put_32 (input_bfd, value, hit_data);
7089 return bfd_reloc_ok;
7090
7091 case R_ARM_ABS8:
7092 value += addend;
7093 if ((long) value > 0x7f || (long) value < -0x80)
7094 return bfd_reloc_overflow;
7095
7096 bfd_put_8 (input_bfd, value, hit_data);
7097 return bfd_reloc_ok;
7098
7099 case R_ARM_ABS16:
7100 value += addend;
7101
7102 if ((long) value > 0x7fff || (long) value < -0x8000)
7103 return bfd_reloc_overflow;
7104
7105 bfd_put_16 (input_bfd, value, hit_data);
7106 return bfd_reloc_ok;
7107
252b5132 7108 case R_ARM_THM_ABS5:
9b485d32 7109 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7110 if (globals->use_rel)
7111 {
7112 /* Need to refetch addend. */
7113 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7114 /* ??? Need to determine shift amount from operand size. */
7115 addend >>= howto->rightshift;
7116 }
252b5132
RH		 7117 value += addend;
7118
7119 /* ??? Isn't value unsigned? */
7120 if ((long) value > 0x1f || (long) value < -0x10)
7121 return bfd_reloc_overflow;
7122
7123 /* ??? Value needs to be properly shifted into place first. */
7124 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7125 bfd_put_16 (input_bfd, value, hit_data);
7126 return bfd_reloc_ok;
7127
2cab6cc3
MS		 7128 case R_ARM_THM_ALU_PREL_11_0:
7129 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7130 {
7131 bfd_vma insn;
7132 bfd_signed_vma relocation;
7133
7134 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7135 | bfd_get_16 (input_bfd, hit_data + 2);
7136
7137 if (globals->use_rel)
7138 {
7139 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7140 | ((insn & (1 << 26)) >> 15);
7141 if (insn & 0xf00000)
7142 signed_addend = -signed_addend;
7143 }
7144
7145 relocation = value + signed_addend;
7146 relocation -= (input_section->output_section->vma
7147 + input_section->output_offset
7148 + rel->r_offset);
7149
7150 value = abs (relocation);
7151
7152 if (value >= 0x1000)
7153 return bfd_reloc_overflow;
7154
7155 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7156 | ((value & 0x700) << 4)
7157 | ((value & 0x800) << 15);
7158 if (relocation < 0)
7159 insn |= 0xa00000;
7160
7161 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7162 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7163
7164 return bfd_reloc_ok;
7165 }
7166
7167 case R_ARM_THM_PC12:
7168 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7169 {
7170 bfd_vma insn;
7171 bfd_signed_vma relocation;
7172
7173 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7174 | bfd_get_16 (input_bfd, hit_data + 2);
7175
7176 if (globals->use_rel)
7177 {
7178 signed_addend = insn & 0xfff;
7179 if (!(insn & (1 << 23)))
7180 signed_addend = -signed_addend;
7181 }
7182
7183 relocation = value + signed_addend;
7184 relocation -= (input_section->output_section->vma
7185 + input_section->output_offset
7186 + rel->r_offset);
7187
7188 value = abs (relocation);
7189
7190 if (value >= 0x1000)
7191 return bfd_reloc_overflow;
7192
7193 insn = (insn & 0xff7ff000) | value;
7194 if (relocation >= 0)
7195 insn |= (1 << 23);
7196
7197 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7198 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7199
7200 return bfd_reloc_ok;
7201 }
7202
dfc5f959 7203 case R_ARM_THM_XPC22:
c19d1205 7204 case R_ARM_THM_CALL:
bd97cb95 7205 case R_ARM_THM_JUMP24:
dfc5f959 7206 /* Thumb BL (branch long instruction). */
252b5132 7207 {
b34976b6 7208 bfd_vma relocation;
e95de063 7209 bfd_vma reloc_sign;
b34976b6
AM		 7210 bfd_boolean overflow = FALSE;
7211 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7212 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7213 bfd_signed_vma reloc_signed_max;
7214 bfd_signed_vma reloc_signed_min;
b34976b6 7215 bfd_vma check;
252b5132 7216 bfd_signed_vma signed_check;
e95de063
MS		 7217 int bitsize;
7218 int thumb2 = using_thumb2 (globals);
252b5132 7219
5ab79981 7220 /* A branch to an undefined weak symbol is turned into a jump to
19540007
JM		 7221 the next instruction unless a PLT entry will be created. */
7222 if (h && h->root.type == bfd_link_hash_undefweak
7223 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7224 {
7225 bfd_put_16 (input_bfd, 0xe000, hit_data);
7226 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7227 return bfd_reloc_ok;
7228 }
7229
e95de063
MS		 7230 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7231 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7232 if (globals->use_rel)
7233 {
e95de063
MS		 7234 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7235 bfd_vma upper = upper_insn & 0x3ff;
7236 bfd_vma lower = lower_insn & 0x7ff;
7237 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7238 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7239 bfd_vma i1 = j1 ^ s ? 0 : 1;
7240 bfd_vma i2 = j2 ^ s ? 0 : 1;
7241
7242 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7243 /* Sign extend. */
7244 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7245
4e7fd91e
PB		 7246 signed_addend = addend;
7247 }
cb1afa5c 7248
dfc5f959
NC		 7249 if (r_type == R_ARM_THM_XPC22)
7250 {
7251 /* Check for Thumb to Thumb call. */
7252 /* FIXME: Should we translate the instruction into a BL
7253 instruction instead ? */
7254 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7255 (*_bfd_error_handler)
7256 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7257 input_bfd,
7258 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7259 }
7260 else
252b5132 7261 {
dfc5f959
NC		 7262 /* If it is not a call to Thumb, assume call to Arm.
7263 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7264 function call at all, but rather a long jump. Calls through
7265 the PLT do not require stubs. */
7266 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7267 && (h == NULL || splt == NULL
7268 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7269 {
bd97cb95 7270 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7271 {
7272 /* Convert BL to BLX. */
7273 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7274 }
155d87d7
CL		 7275 else if (( r_type != R_ARM_THM_CALL)
7276 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7277 {
7278 if (elf32_thumb_to_arm_stub
7279 (info, sym_name, input_bfd, output_bfd, input_section,
7280 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7281 error_message))
7282 return bfd_reloc_ok;
7283 else
7284 return bfd_reloc_dangerous;
7285 }
da5938a2 7286 }
bd97cb95
DJ		 7287 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7288 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7289 {
7290 /* Make sure this is a BL. */
7291 lower_insn |= 0x1800;
7292 }
252b5132 7293 }
f21f3fe0 7294
b7693d02
DJ		 7295 /* Handle calls via the PLT. */
7296 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7297 {
7298 value = (splt->output_section->vma
7299 + splt->output_offset
7300 + h->plt.offset);
bd97cb95 7301 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7302 {
7303 /* If the Thumb BLX instruction is available, convert the
7304 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7305 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 7306 }
7307 else
7308 /* Target the Thumb stub before the ARM PLT entry. */
7309 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 7310 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7311 }
7312
155d87d7 7313 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7314 {
7315 /* Check if a stub has to be inserted because the destination
8029a119 7316 is too far. */
906e58ca
NC		 7317 bfd_vma from;
7318 bfd_signed_vma branch_offset;
7319 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7320
7321 from = (input_section->output_section->vma
7322 + input_section->output_offset
7323 + rel->r_offset);
7324 branch_offset = (bfd_signed_vma)(value - from);
7325
7326 if ((!thumb2
7327 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7328 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7329 ||
7330 (thumb2
7331 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7332 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7333 || ((sym_flags != STT_ARM_TFUNC)
7334 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7335 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7336 {
7337 /* The target is out of reach or we are changing modes, so
7338 redirect the branch to the local stub for this
7339 function. */
7340 stub_entry = elf32_arm_get_stub_entry (input_section,
7341 sym_sec, h,
7342 rel, globals);
7343 if (stub_entry != NULL)
7344 value = (stub_entry->stub_offset
7345 + stub_entry->stub_sec->output_offset
7346 + stub_entry->stub_sec->output_section->vma);
7347
f4ac8484 7348 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7349 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7350 {
7351 if ((stub_entry
7352 && !arm_stub_is_thumb (stub_entry->stub_type))
7353 || (sym_flags != STT_ARM_TFUNC))
7354 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7355 }
906e58ca
NC		 7356 }
7357 }
7358
ba96a88f 7359 relocation = value + signed_addend;
f21f3fe0 7360
252b5132 7361 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7362 + input_section->output_offset
7363 + rel->r_offset);
9a5aca8c 7364
252b5132
RH		 7365 check = relocation >> howto->rightshift;
7366
7367 /* If this is a signed value, the rightshift just dropped
7368 leading 1 bits (assuming twos complement). */
7369 if ((bfd_signed_vma) relocation >= 0)
7370 signed_check = check;
7371 else
7372 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7373
e95de063
MS		 7374 /* Calculate the permissable maximum and minimum values for
7375 this relocation according to whether we're relocating for
7376 Thumb-2 or not. */
7377 bitsize = howto->bitsize;
7378 if (!thumb2)
7379 bitsize -= 2;
7380 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7381 reloc_signed_min = ~reloc_signed_max;
7382
252b5132 7383 /* Assumes two's complement. */
ba96a88f 7384 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7385 overflow = TRUE;
252b5132 7386
bd97cb95 7387 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7388 /* For a BLX instruction, make sure that the relocation is rounded up
7389 to a word boundary. This follows the semantics of the instruction
7390 which specifies that bit 1 of the target address will come from bit
7391 1 of the base address. */
7392 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7393
e95de063
MS		 7394 /* Put RELOCATION back into the insn. Assumes two's complement.
7395 We use the Thumb-2 encoding, which is safe even if dealing with
7396 a Thumb-1 instruction by virtue of our overflow check above. */
7397 reloc_sign = (signed_check < 0) ? 1 : 0;
7398 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7399 | ((relocation >> 12) & 0x3ff)
7400 | (reloc_sign << 10);
906e58ca 7401 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7402 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7403 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7404 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7405
252b5132
RH		 7406 /* Put the relocated value back in the object file: */
7407 bfd_put_16 (input_bfd, upper_insn, hit_data);
7408 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7409
7410 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7411 }
7412 break;
7413
c19d1205
ZW		 7414 case R_ARM_THM_JUMP19:
7415 /* Thumb32 conditional branch instruction. */
7416 {
7417 bfd_vma relocation;
7418 bfd_boolean overflow = FALSE;
7419 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7420 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7421 bfd_signed_vma reloc_signed_max = 0xffffe;
7422 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7423 bfd_signed_vma signed_check;
7424
7425 /* Need to refetch the addend, reconstruct the top three bits,
7426 and squish the two 11 bit pieces together. */
7427 if (globals->use_rel)
7428 {
7429 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7430 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7431 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7432 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7433 bfd_vma lower = (lower_insn & 0x07ff);
7434
a00a1f35
MS		 7435 upper |= J1 << 6;
7436 upper |= J2 << 7;
7437 upper |= (!S) << 8;
c19d1205
ZW		 7438 upper -= 0x0100; /* Sign extend. */
7439
7440 addend = (upper << 12) | (lower << 1);
7441 signed_addend = addend;
7442 }
7443
bd97cb95
DJ		 7444 /* Handle calls via the PLT. */
7445 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7446 {
7447 value = (splt->output_section->vma
7448 + splt->output_offset
7449 + h->plt.offset);
7450 /* Target the Thumb stub before the ARM PLT entry. */
7451 value -= PLT_THUMB_STUB_SIZE;
7452 *unresolved_reloc_p = FALSE;
7453 }
7454
c19d1205
ZW		 7455 /* ??? Should handle interworking? GCC might someday try to
7456 use this for tail calls. */
7457
7458 relocation = value + signed_addend;
7459 relocation -= (input_section->output_section->vma
7460 + input_section->output_offset
7461 + rel->r_offset);
a00a1f35 7462 signed_check = (bfd_signed_vma) relocation;
c19d1205 7463
c19d1205
ZW		 7464 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7465 overflow = TRUE;
7466
7467 /* Put RELOCATION back into the insn. */
7468 {
7469 bfd_vma S = (relocation & 0x00100000) >> 20;
7470 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7471 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7472 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7473 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7474
a00a1f35 7475 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7476 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7477 }
7478
7479 /* Put the relocated value back in the object file: */
7480 bfd_put_16 (input_bfd, upper_insn, hit_data);
7481 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7482
7483 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7484 }
7485
7486 case R_ARM_THM_JUMP11:
7487 case R_ARM_THM_JUMP8:
7488 case R_ARM_THM_JUMP6:
51c5503b
NC		 7489 /* Thumb B (branch) instruction). */
7490 {
6cf9e9fe 7491 bfd_signed_vma relocation;
51c5503b
NC		 7492 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7493 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7494 bfd_signed_vma signed_check;
7495
c19d1205
ZW		 7496 /* CZB cannot jump backward. */
7497 if (r_type == R_ARM_THM_JUMP6)
7498 reloc_signed_min = 0;
7499
4e7fd91e 7500 if (globals->use_rel)
6cf9e9fe 7501 {
4e7fd91e
PB		 7502 /* Need to refetch addend. */
7503 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7504 if (addend & ((howto->src_mask + 1) >> 1))
7505 {
7506 signed_addend = -1;
7507 signed_addend &= ~ howto->src_mask;
7508 signed_addend |= addend;
7509 }
7510 else
7511 signed_addend = addend;
7512 /* The value in the insn has been right shifted. We need to
7513 undo this, so that we can perform the address calculation
7514 in terms of bytes. */
7515 signed_addend <<= howto->rightshift;
6cf9e9fe 7516 }
6cf9e9fe 7517 relocation = value + signed_addend;
51c5503b
NC		 7518
7519 relocation -= (input_section->output_section->vma
7520 + input_section->output_offset
7521 + rel->r_offset);
7522
6cf9e9fe
NC		 7523 relocation >>= howto->rightshift;
7524 signed_check = relocation;
c19d1205
ZW		 7525
7526 if (r_type == R_ARM_THM_JUMP6)
7527 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7528 else
7529 relocation &= howto->dst_mask;
51c5503b 7530 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7531
51c5503b
NC		 7532 bfd_put_16 (input_bfd, relocation, hit_data);
7533
7534 /* Assumes two's complement. */
7535 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7536 return bfd_reloc_overflow;
7537
7538 return bfd_reloc_ok;
7539 }
cedb70c5 7540
8375c36b
PB		 7541 case R_ARM_ALU_PCREL7_0:
7542 case R_ARM_ALU_PCREL15_8:
7543 case R_ARM_ALU_PCREL23_15:
7544 {
7545 bfd_vma insn;
7546 bfd_vma relocation;
7547
7548 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7549 if (globals->use_rel)
7550 {
7551 /* Extract the addend. */
7552 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7553 signed_addend = addend;
7554 }
8375c36b
PB		 7555 relocation = value + signed_addend;
7556
7557 relocation -= (input_section->output_section->vma
7558 + input_section->output_offset
7559 + rel->r_offset);
7560 insn = (insn & ~0xfff)
7561 | ((howto->bitpos << 7) & 0xf00)
7562 | ((relocation >> howto->bitpos) & 0xff);
7563 bfd_put_32 (input_bfd, value, hit_data);
7564 }
7565 return bfd_reloc_ok;
7566
252b5132
RH		 7567 case R_ARM_GNU_VTINHERIT:
7568 case R_ARM_GNU_VTENTRY:
7569 return bfd_reloc_ok;
7570
c19d1205 7571 case R_ARM_GOTOFF32:
252b5132
RH		 7572 /* Relocation is relative to the start of the
7573 global offset table. */
7574
7575 BFD_ASSERT (sgot != NULL);
7576 if (sgot == NULL)
7577 return bfd_reloc_notsupported;
9a5aca8c 7578
cedb70c5 7579 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7580 address by one, so that attempts to call the function pointer will
7581 correctly interpret it as Thumb code. */
7582 if (sym_flags == STT_ARM_TFUNC)
7583 value += 1;
7584
252b5132
RH		 7585 /* Note that sgot->output_offset is not involved in this
7586 calculation. We always want the start of .got. If we
7587 define _GLOBAL_OFFSET_TABLE in a different way, as is
7588 permitted by the ABI, we might have to change this
9b485d32 7589 calculation. */
252b5132 7590 value -= sgot->output_section->vma;
f21f3fe0 7591 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7592 contents, rel->r_offset, value,
00a97672 7593 rel->r_addend);
252b5132
RH		 7594
7595 case R_ARM_GOTPC:
a7c10850 7596 /* Use global offset table as symbol value. */
252b5132 7597 BFD_ASSERT (sgot != NULL);
f21f3fe0 7598
252b5132
RH		 7599 if (sgot == NULL)
7600 return bfd_reloc_notsupported;
7601
0945cdfd 7602 *unresolved_reloc_p = FALSE;
252b5132 7603 value = sgot->output_section->vma;
f21f3fe0 7604 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7605 contents, rel->r_offset, value,
00a97672 7606 rel->r_addend);
f21f3fe0 7607
252b5132 7608 case R_ARM_GOT32:
eb043451 7609 case R_ARM_GOT_PREL:
252b5132 7610 /* Relocation is to the entry for this symbol in the
9b485d32 7611 global offset table. */
252b5132
RH		 7612 if (sgot == NULL)
7613 return bfd_reloc_notsupported;
f21f3fe0 7614
252b5132
RH		 7615 if (h != NULL)
7616 {
7617 bfd_vma off;
5e681ec4 7618 bfd_boolean dyn;
f21f3fe0 7619
252b5132
RH		 7620 off = h->got.offset;
7621 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7622 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7623
5e681ec4 7624 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7625 || (info->shared
5e681ec4
PB		 7626 && SYMBOL_REFERENCES_LOCAL (info, h))
7627 || (ELF_ST_VISIBILITY (h->other)
7628 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7629 {
7630 /* This is actually a static link, or it is a -Bsymbolic link
7631 and the symbol is defined locally. We must initialize this
7632 entry in the global offset table. Since the offset must
7633 always be a multiple of 4, we use the least significant bit
7634 to record whether we have initialized it already.
f21f3fe0 7635
00a97672 7636 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7637 entry to initialize the value. This is done in the
9b485d32 7638 finish_dynamic_symbol routine. */
252b5132
RH		 7639 if ((off & 1) != 0)
7640 off &= ~1;
7641 else
7642 {
ee29b9fb
RE		 7643 /* If we are addressing a Thumb function, we need to
7644 adjust the address by one, so that attempts to
7645 call the function pointer will correctly
7646 interpret it as Thumb code. */
7647 if (sym_flags == STT_ARM_TFUNC)
7648 value |= 1;
7649
252b5132
RH		 7650 bfd_put_32 (output_bfd, value, sgot->contents + off);
7651 h->got.offset |= 1;
7652 }
7653 }
0945cdfd
DJ		 7654 else
7655 *unresolved_reloc_p = FALSE;
f21f3fe0 7656
252b5132
RH		 7657 value = sgot->output_offset + off;
7658 }
7659 else
7660 {
7661 bfd_vma off;
f21f3fe0 7662
252b5132
RH		 7663 BFD_ASSERT (local_got_offsets != NULL &&
7664 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7665
252b5132 7666 off = local_got_offsets[r_symndx];
f21f3fe0 7667
252b5132
RH		 7668 /* The offset must always be a multiple of 4. We use the
7669 least significant bit to record whether we have already
9b485d32 7670 generated the necessary reloc. */
252b5132
RH		 7671 if ((off & 1) != 0)
7672 off &= ~1;
7673 else
7674 {
b7693d02
DJ		 7675 /* If we are addressing a Thumb function, we need to
7676 adjust the address by one, so that attempts to
7677 call the function pointer will correctly
7678 interpret it as Thumb code. */
7679 if (sym_flags == STT_ARM_TFUNC)
7680 value |= 1;
7681
00a97672
RS		 7682 if (globals->use_rel)
7683 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7684
252b5132
RH		 7685 if (info->shared)
7686 {
7687 asection * srelgot;
947216bf
AM		 7688 Elf_Internal_Rela outrel;
7689 bfd_byte *loc;
f21f3fe0 7690
00a97672
RS		 7691 srelgot = (bfd_get_section_by_name
7692 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7693 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7694
00a97672 7695 outrel.r_addend = addend + value;
252b5132 7696 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7697 + sgot->output_offset
252b5132
RH		 7698 + off);
7699 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7700 loc = srelgot->contents;
00a97672
RS		 7701 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7702 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7703 }
f21f3fe0 7704
252b5132
RH		 7705 local_got_offsets[r_symndx] |= 1;
7706 }
f21f3fe0 7707
252b5132
RH		 7708 value = sgot->output_offset + off;
7709 }
eb043451
PB		 7710 if (r_type != R_ARM_GOT32)
7711 value += sgot->output_section->vma;
9a5aca8c 7712
f21f3fe0 7713 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7714 contents, rel->r_offset, value,
00a97672 7715 rel->r_addend);
f21f3fe0 7716
ba93b8ac
DJ		 7717 case R_ARM_TLS_LDO32:
7718 value = value - dtpoff_base (info);
7719
7720 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7721 contents, rel->r_offset, value,
7722 rel->r_addend);
ba93b8ac
DJ		 7723
7724 case R_ARM_TLS_LDM32:
7725 {
7726 bfd_vma off;
7727
7728 if (globals->sgot == NULL)
7729 abort ();
7730
7731 off = globals->tls_ldm_got.offset;
7732
7733 if ((off & 1) != 0)
7734 off &= ~1;
7735 else
7736 {
7737 /* If we don't know the module number, create a relocation
7738 for it. */
7739 if (info->shared)
7740 {
7741 Elf_Internal_Rela outrel;
7742 bfd_byte *loc;
7743
7744 if (globals->srelgot == NULL)
7745 abort ();
7746
00a97672 7747 outrel.r_addend = 0;
ba93b8ac
DJ		 7748 outrel.r_offset = (globals->sgot->output_section->vma
7749 + globals->sgot->output_offset + off);
7750 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7751
00a97672
RS		 7752 if (globals->use_rel)
7753 bfd_put_32 (output_bfd, outrel.r_addend,
7754 globals->sgot->contents + off);
ba93b8ac
DJ		 7755
7756 loc = globals->srelgot->contents;
00a97672
RS		 7757 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7758 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7759 }
7760 else
7761 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7762
7763 globals->tls_ldm_got.offset |= 1;
7764 }
7765
906e58ca 7766 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7767 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7768
7769 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7770 contents, rel->r_offset, value,
00a97672 7771 rel->r_addend);
ba93b8ac
DJ		 7772 }
7773
7774 case R_ARM_TLS_GD32:
7775 case R_ARM_TLS_IE32:
7776 {
7777 bfd_vma off;
7778 int indx;
7779 char tls_type;
7780
7781 if (globals->sgot == NULL)
7782 abort ();
7783
7784 indx = 0;
7785 if (h != NULL)
7786 {
7787 bfd_boolean dyn;
7788 dyn = globals->root.dynamic_sections_created;
7789 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7790 && (!info->shared
7791 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7792 {
7793 *unresolved_reloc_p = FALSE;
7794 indx = h->dynindx;
7795 }
7796 off = h->got.offset;
7797 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7798 }
7799 else
7800 {
7801 if (local_got_offsets == NULL)
7802 abort ();
7803 off = local_got_offsets[r_symndx];
7804 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7805 }
7806
7807 if (tls_type == GOT_UNKNOWN)
7808 abort ();
7809
7810 if ((off & 1) != 0)
7811 off &= ~1;
7812 else
7813 {
7814 bfd_boolean need_relocs = FALSE;
7815 Elf_Internal_Rela outrel;
7816 bfd_byte *loc = NULL;
7817 int cur_off = off;
7818
7819 /* The GOT entries have not been initialized yet. Do it
7820 now, and emit any relocations. If both an IE GOT and a
7821 GD GOT are necessary, we emit the GD first. */
7822
7823 if ((info->shared || indx != 0)
7824 && (h == NULL
7825 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7826 || h->root.type != bfd_link_hash_undefweak))
7827 {
7828 need_relocs = TRUE;
7829 if (globals->srelgot == NULL)
7830 abort ();
7831 loc = globals->srelgot->contents;
00a97672 7832 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7833 }
7834
7835 if (tls_type & GOT_TLS_GD)
7836 {
7837 if (need_relocs)
7838 {
00a97672 7839 outrel.r_addend = 0;
ba93b8ac 7840 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7841 + globals->sgot->output_offset
7842 + cur_off);
ba93b8ac 7843 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7844
00a97672
RS		 7845 if (globals->use_rel)
7846 bfd_put_32 (output_bfd, outrel.r_addend,
7847 globals->sgot->contents + cur_off);
7848
7849 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7850 globals->srelgot->reloc_count++;
00a97672 7851 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7852
7853 if (indx == 0)
7854 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7855 globals->sgot->contents + cur_off + 4);
7856 else
7857 {
00a97672 7858 outrel.r_addend = 0;
ba93b8ac
DJ		 7859 outrel.r_info = ELF32_R_INFO (indx,
7860 R_ARM_TLS_DTPOFF32);
7861 outrel.r_offset += 4;
00a97672
RS		 7862
7863 if (globals->use_rel)
7864 bfd_put_32 (output_bfd, outrel.r_addend,
7865 globals->sgot->contents + cur_off + 4);
7866
7867
7868 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7869 globals->srelgot->reloc_count++;
00a97672 7870 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7871 }
7872 }
7873 else
7874 {
7875 /* If we are not emitting relocations for a
7876 general dynamic reference, then we must be in a
7877 static link or an executable link with the
7878 symbol binding locally. Mark it as belonging
7879 to module 1, the executable. */
7880 bfd_put_32 (output_bfd, 1,
7881 globals->sgot->contents + cur_off);
7882 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7883 globals->sgot->contents + cur_off + 4);
7884 }
7885
7886 cur_off += 8;
7887 }
7888
7889 if (tls_type & GOT_TLS_IE)
7890 {
7891 if (need_relocs)
7892 {
00a97672
RS		 7893 if (indx == 0)
7894 outrel.r_addend = value - dtpoff_base (info);
7895 else
7896 outrel.r_addend = 0;
ba93b8ac
DJ		 7897 outrel.r_offset = (globals->sgot->output_section->vma
7898 + globals->sgot->output_offset
7899 + cur_off);
7900 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
7901
00a97672
RS		 7902 if (globals->use_rel)
7903 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 7904 globals->sgot->contents + cur_off);
7905
00a97672 7906 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7907 globals->srelgot->reloc_count++;
00a97672 7908 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7909 }
7910 else
7911 bfd_put_32 (output_bfd, tpoff (info, value),
7912 globals->sgot->contents + cur_off);
7913 cur_off += 4;
7914 }
7915
7916 if (h != NULL)
7917 h->got.offset |= 1;
7918 else
7919 local_got_offsets[r_symndx] |= 1;
7920 }
7921
7922 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
7923 off += 8;
906e58ca 7924 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7925 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7926
7927 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7928 contents, rel->r_offset, value,
00a97672 7929 rel->r_addend);
ba93b8ac
DJ		 7930 }
7931
7932 case R_ARM_TLS_LE32:
7933 if (info->shared)
7934 {
7935 (*_bfd_error_handler)
7936 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
7937 input_bfd, input_section,
7938 (long) rel->r_offset, howto->name);
906e58ca 7939 return FALSE;
ba93b8ac
DJ		 7940 }
7941 else
7942 value = tpoff (info, value);
906e58ca 7943
ba93b8ac 7944 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7945 contents, rel->r_offset, value,
7946 rel->r_addend);
ba93b8ac 7947
319850b4
JB		 7948 case R_ARM_V4BX:
7949 if (globals->fix_v4bx)
845b51d6
PB		 7950 {
7951 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 7952
845b51d6
PB		 7953 /* Ensure that we have a BX instruction. */
7954 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 7955
845b51d6
PB		 7956 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
7957 {
7958 /* Branch to veneer. */
7959 bfd_vma glue_addr;
7960 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
7961 glue_addr -= input_section->output_section->vma
7962 + input_section->output_offset
7963 + rel->r_offset + 8;
7964 insn = (insn & 0xf0000000) | 0x0a000000
7965 | ((glue_addr >> 2) & 0x00ffffff);
7966 }
7967 else
7968 {
7969 /* Preserve Rm (lowest four bits) and the condition code
7970 (highest four bits). Other bits encode MOV PC,Rm. */
7971 insn = (insn & 0xf000000f) | 0x01a0f000;
7972 }
319850b4 7973
845b51d6
PB		 7974 bfd_put_32 (input_bfd, insn, hit_data);
7975 }
319850b4
JB		 7976 return bfd_reloc_ok;
7977
b6895b4f
PB		 7978 case R_ARM_MOVW_ABS_NC:
7979 case R_ARM_MOVT_ABS:
7980 case R_ARM_MOVW_PREL_NC:
7981 case R_ARM_MOVT_PREL:
92f5d02b
MS		 7982 /* Until we properly support segment-base-relative addressing then
7983 we assume the segment base to be zero, as for the group relocations.
7984 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
7985 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
7986 case R_ARM_MOVW_BREL_NC:
7987 case R_ARM_MOVW_BREL:
7988 case R_ARM_MOVT_BREL:
b6895b4f
PB		 7989 {
7990 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7991
7992 if (globals->use_rel)
7993 {
7994 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 7995 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 7996 }
92f5d02b 7997
b6895b4f 7998 value += signed_addend;
b6895b4f
PB		 7999
8000 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8001 value -= (input_section->output_section->vma
8002 + input_section->output_offset + rel->r_offset);
8003
92f5d02b
MS		 8004 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8005 return bfd_reloc_overflow;
8006
8007 if (sym_flags == STT_ARM_TFUNC)
8008 value |= 1;
8009
8010 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8011 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8012 value >>= 16;
8013
8014 insn &= 0xfff0f000;
8015 insn |= value & 0xfff;
8016 insn |= (value & 0xf000) << 4;
8017 bfd_put_32 (input_bfd, insn, hit_data);
8018 }
8019 return bfd_reloc_ok;
8020
8021 case R_ARM_THM_MOVW_ABS_NC:
8022 case R_ARM_THM_MOVT_ABS:
8023 case R_ARM_THM_MOVW_PREL_NC:
8024 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8025 /* Until we properly support segment-base-relative addressing then
8026 we assume the segment base to be zero, as for the above relocations.
8027 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8028 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8029 as R_ARM_THM_MOVT_ABS. */
8030 case R_ARM_THM_MOVW_BREL_NC:
8031 case R_ARM_THM_MOVW_BREL:
8032 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8033 {
8034 bfd_vma insn;
906e58ca 8035
b6895b4f
PB		 8036 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8037 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8038
8039 if (globals->use_rel)
8040 {
8041 addend = ((insn >> 4) & 0xf000)
8042 | ((insn >> 15) & 0x0800)
8043 | ((insn >> 4) & 0x0700)
8044 | (insn & 0x00ff);
39623e12 8045 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8046 }
92f5d02b 8047
b6895b4f 8048 value += signed_addend;
b6895b4f
PB		 8049
8050 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8051 value -= (input_section->output_section->vma
8052 + input_section->output_offset + rel->r_offset);
8053
92f5d02b
MS		 8054 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8055 return bfd_reloc_overflow;
8056
8057 if (sym_flags == STT_ARM_TFUNC)
8058 value |= 1;
8059
8060 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8061 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8062 value >>= 16;
8063
8064 insn &= 0xfbf08f00;
8065 insn |= (value & 0xf000) << 4;
8066 insn |= (value & 0x0800) << 15;
8067 insn |= (value & 0x0700) << 4;
8068 insn |= (value & 0x00ff);
8069
8070 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8071 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8072 }
8073 return bfd_reloc_ok;
8074
4962c51a
MS		 8075 case R_ARM_ALU_PC_G0_NC:
8076 case R_ARM_ALU_PC_G1_NC:
8077 case R_ARM_ALU_PC_G0:
8078 case R_ARM_ALU_PC_G1:
8079 case R_ARM_ALU_PC_G2:
8080 case R_ARM_ALU_SB_G0_NC:
8081 case R_ARM_ALU_SB_G1_NC:
8082 case R_ARM_ALU_SB_G0:
8083 case R_ARM_ALU_SB_G1:
8084 case R_ARM_ALU_SB_G2:
8085 {
8086 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8087 bfd_vma pc = input_section->output_section->vma
8088 + input_section->output_offset + rel->r_offset;
8089 /* sb should be the origin of the *segment* containing the symbol.
8090 It is not clear how to obtain this OS-dependent value, so we
8091 make an arbitrary choice of zero. */
8092 bfd_vma sb = 0;
8093 bfd_vma residual;
8094 bfd_vma g_n;
8095 bfd_signed_vma signed_value;
8096 int group = 0;
8097
8098 /* Determine which group of bits to select. */
8099 switch (r_type)
8100 {
8101 case R_ARM_ALU_PC_G0_NC:
8102 case R_ARM_ALU_PC_G0:
8103 case R_ARM_ALU_SB_G0_NC:
8104 case R_ARM_ALU_SB_G0:
8105 group = 0;
8106 break;
8107
8108 case R_ARM_ALU_PC_G1_NC:
8109 case R_ARM_ALU_PC_G1:
8110 case R_ARM_ALU_SB_G1_NC:
8111 case R_ARM_ALU_SB_G1:
8112 group = 1;
8113 break;
8114
8115 case R_ARM_ALU_PC_G2:
8116 case R_ARM_ALU_SB_G2:
8117 group = 2;
8118 break;
8119
8120 default:
906e58ca 8121 abort ();
4962c51a
MS		 8122 }
8123
8124 /* If REL, extract the addend from the insn. If RELA, it will
8125 have already been fetched for us. */
8126 if (globals->use_rel)
8127 {
8128 int negative;
8129 bfd_vma constant = insn & 0xff;
8130 bfd_vma rotation = (insn & 0xf00) >> 8;
8131
8132 if (rotation == 0)
8133 signed_addend = constant;
8134 else
8135 {
8136 /* Compensate for the fact that in the instruction, the
8137 rotation is stored in multiples of 2 bits. */
8138 rotation *= 2;
8139
8140 /* Rotate "constant" right by "rotation" bits. */
8141 signed_addend = (constant >> rotation) |
8142 (constant << (8 * sizeof (bfd_vma) - rotation));
8143 }
8144
8145 /* Determine if the instruction is an ADD or a SUB.
8146 (For REL, this determines the sign of the addend.) */
8147 negative = identify_add_or_sub (insn);
8148 if (negative == 0)
8149 {
8150 (*_bfd_error_handler)
8151 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8152 input_bfd, input_section,
8153 (long) rel->r_offset, howto->name);
906e58ca 8154 return bfd_reloc_overflow;
4962c51a
MS		 8155 }
8156
8157 signed_addend *= negative;
8158 }
8159
8160 /* Compute the value (X) to go in the place. */
8161 if (r_type == R_ARM_ALU_PC_G0_NC
8162 || r_type == R_ARM_ALU_PC_G1_NC
8163 || r_type == R_ARM_ALU_PC_G0
8164 || r_type == R_ARM_ALU_PC_G1
8165 || r_type == R_ARM_ALU_PC_G2)
8166 /* PC relative. */
8167 signed_value = value - pc + signed_addend;
8168 else
8169 /* Section base relative. */
8170 signed_value = value - sb + signed_addend;
8171
8172 /* If the target symbol is a Thumb function, then set the
8173 Thumb bit in the address. */
8174 if (sym_flags == STT_ARM_TFUNC)
8175 signed_value |= 1;
8176
8177 /* Calculate the value of the relevant G_n, in encoded
8178 constant-with-rotation format. */
8179 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8180 &residual);
8181
8182 /* Check for overflow if required. */
8183 if ((r_type == R_ARM_ALU_PC_G0
8184 || r_type == R_ARM_ALU_PC_G1
8185 || r_type == R_ARM_ALU_PC_G2
8186 || r_type == R_ARM_ALU_SB_G0
8187 || r_type == R_ARM_ALU_SB_G1
8188 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8189 {
8190 (*_bfd_error_handler)
8191 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8192 input_bfd, input_section,
8193 (long) rel->r_offset, abs (signed_value), howto->name);
8194 return bfd_reloc_overflow;
8195 }
8196
8197 /* Mask out the value and the ADD/SUB part of the opcode; take care
8198 not to destroy the S bit. */
8199 insn &= 0xff1ff000;
8200
8201 /* Set the opcode according to whether the value to go in the
8202 place is negative. */
8203 if (signed_value < 0)
8204 insn |= 1 << 22;
8205 else
8206 insn |= 1 << 23;
8207
8208 /* Encode the offset. */
8209 insn |= g_n;
8210
8211 bfd_put_32 (input_bfd, insn, hit_data);
8212 }
8213 return bfd_reloc_ok;
8214
8215 case R_ARM_LDR_PC_G0:
8216 case R_ARM_LDR_PC_G1:
8217 case R_ARM_LDR_PC_G2:
8218 case R_ARM_LDR_SB_G0:
8219 case R_ARM_LDR_SB_G1:
8220 case R_ARM_LDR_SB_G2:
8221 {
8222 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8223 bfd_vma pc = input_section->output_section->vma
8224 + input_section->output_offset + rel->r_offset;
8225 bfd_vma sb = 0; /* See note above. */
8226 bfd_vma residual;
8227 bfd_signed_vma signed_value;
8228 int group = 0;
8229
8230 /* Determine which groups of bits to calculate. */
8231 switch (r_type)
8232 {
8233 case R_ARM_LDR_PC_G0:
8234 case R_ARM_LDR_SB_G0:
8235 group = 0;
8236 break;
8237
8238 case R_ARM_LDR_PC_G1:
8239 case R_ARM_LDR_SB_G1:
8240 group = 1;
8241 break;
8242
8243 case R_ARM_LDR_PC_G2:
8244 case R_ARM_LDR_SB_G2:
8245 group = 2;
8246 break;
8247
8248 default:
906e58ca 8249 abort ();
4962c51a
MS		 8250 }
8251
8252 /* If REL, extract the addend from the insn. If RELA, it will
8253 have already been fetched for us. */
8254 if (globals->use_rel)
8255 {
8256 int negative = (insn & (1 << 23)) ? 1 : -1;
8257 signed_addend = negative * (insn & 0xfff);
8258 }
8259
8260 /* Compute the value (X) to go in the place. */
8261 if (r_type == R_ARM_LDR_PC_G0
8262 || r_type == R_ARM_LDR_PC_G1
8263 || r_type == R_ARM_LDR_PC_G2)
8264 /* PC relative. */
8265 signed_value = value - pc + signed_addend;
8266 else
8267 /* Section base relative. */
8268 signed_value = value - sb + signed_addend;
8269
8270 /* Calculate the value of the relevant G_{n-1} to obtain
8271 the residual at that stage. */
8272 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8273
8274 /* Check for overflow. */
8275 if (residual >= 0x1000)
8276 {
8277 (*_bfd_error_handler)
8278 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8279 input_bfd, input_section,
8280 (long) rel->r_offset, abs (signed_value), howto->name);
8281 return bfd_reloc_overflow;
8282 }
8283
8284 /* Mask out the value and U bit. */
8285 insn &= 0xff7ff000;
8286
8287 /* Set the U bit if the value to go in the place is non-negative. */
8288 if (signed_value >= 0)
8289 insn |= 1 << 23;
8290
8291 /* Encode the offset. */
8292 insn |= residual;
8293
8294 bfd_put_32 (input_bfd, insn, hit_data);
8295 }
8296 return bfd_reloc_ok;
8297
8298 case R_ARM_LDRS_PC_G0:
8299 case R_ARM_LDRS_PC_G1:
8300 case R_ARM_LDRS_PC_G2:
8301 case R_ARM_LDRS_SB_G0:
8302 case R_ARM_LDRS_SB_G1:
8303 case R_ARM_LDRS_SB_G2:
8304 {
8305 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8306 bfd_vma pc = input_section->output_section->vma
8307 + input_section->output_offset + rel->r_offset;
8308 bfd_vma sb = 0; /* See note above. */
8309 bfd_vma residual;
8310 bfd_signed_vma signed_value;
8311 int group = 0;
8312
8313 /* Determine which groups of bits to calculate. */
8314 switch (r_type)
8315 {
8316 case R_ARM_LDRS_PC_G0:
8317 case R_ARM_LDRS_SB_G0:
8318 group = 0;
8319 break;
8320
8321 case R_ARM_LDRS_PC_G1:
8322 case R_ARM_LDRS_SB_G1:
8323 group = 1;
8324 break;
8325
8326 case R_ARM_LDRS_PC_G2:
8327 case R_ARM_LDRS_SB_G2:
8328 group = 2;
8329 break;
8330
8331 default:
906e58ca 8332 abort ();
4962c51a
MS		 8333 }
8334
8335 /* If REL, extract the addend from the insn. If RELA, it will
8336 have already been fetched for us. */
8337 if (globals->use_rel)
8338 {
8339 int negative = (insn & (1 << 23)) ? 1 : -1;
8340 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8341 }
8342
8343 /* Compute the value (X) to go in the place. */
8344 if (r_type == R_ARM_LDRS_PC_G0
8345 || r_type == R_ARM_LDRS_PC_G1
8346 || r_type == R_ARM_LDRS_PC_G2)
8347 /* PC relative. */
8348 signed_value = value - pc + signed_addend;
8349 else
8350 /* Section base relative. */
8351 signed_value = value - sb + signed_addend;
8352
8353 /* Calculate the value of the relevant G_{n-1} to obtain
8354 the residual at that stage. */
8355 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8356
8357 /* Check for overflow. */
8358 if (residual >= 0x100)
8359 {
8360 (*_bfd_error_handler)
8361 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8362 input_bfd, input_section,
8363 (long) rel->r_offset, abs (signed_value), howto->name);
8364 return bfd_reloc_overflow;
8365 }
8366
8367 /* Mask out the value and U bit. */
8368 insn &= 0xff7ff0f0;
8369
8370 /* Set the U bit if the value to go in the place is non-negative. */
8371 if (signed_value >= 0)
8372 insn |= 1 << 23;
8373
8374 /* Encode the offset. */
8375 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8376
8377 bfd_put_32 (input_bfd, insn, hit_data);
8378 }
8379 return bfd_reloc_ok;
8380
8381 case R_ARM_LDC_PC_G0:
8382 case R_ARM_LDC_PC_G1:
8383 case R_ARM_LDC_PC_G2:
8384 case R_ARM_LDC_SB_G0:
8385 case R_ARM_LDC_SB_G1:
8386 case R_ARM_LDC_SB_G2:
8387 {
8388 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8389 bfd_vma pc = input_section->output_section->vma
8390 + input_section->output_offset + rel->r_offset;
8391 bfd_vma sb = 0; /* See note above. */
8392 bfd_vma residual;
8393 bfd_signed_vma signed_value;
8394 int group = 0;
8395
8396 /* Determine which groups of bits to calculate. */
8397 switch (r_type)
8398 {
8399 case R_ARM_LDC_PC_G0:
8400 case R_ARM_LDC_SB_G0:
8401 group = 0;
8402 break;
8403
8404 case R_ARM_LDC_PC_G1:
8405 case R_ARM_LDC_SB_G1:
8406 group = 1;
8407 break;
8408
8409 case R_ARM_LDC_PC_G2:
8410 case R_ARM_LDC_SB_G2:
8411 group = 2;
8412 break;
8413
8414 default:
906e58ca 8415 abort ();
4962c51a
MS		 8416 }
8417
8418 /* If REL, extract the addend from the insn. If RELA, it will
8419 have already been fetched for us. */
8420 if (globals->use_rel)
8421 {
8422 int negative = (insn & (1 << 23)) ? 1 : -1;
8423 signed_addend = negative * ((insn & 0xff) << 2);
8424 }
8425
8426 /* Compute the value (X) to go in the place. */
8427 if (r_type == R_ARM_LDC_PC_G0
8428 || r_type == R_ARM_LDC_PC_G1
8429 || r_type == R_ARM_LDC_PC_G2)
8430 /* PC relative. */
8431 signed_value = value - pc + signed_addend;
8432 else
8433 /* Section base relative. */
8434 signed_value = value - sb + signed_addend;
8435
8436 /* Calculate the value of the relevant G_{n-1} to obtain
8437 the residual at that stage. */
8438 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8439
8440 /* Check for overflow. (The absolute value to go in the place must be
8441 divisible by four and, after having been divided by four, must
8442 fit in eight bits.) */
8443 if ((residual & 0x3) != 0 || residual >= 0x400)
8444 {
8445 (*_bfd_error_handler)
8446 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8447 input_bfd, input_section,
8448 (long) rel->r_offset, abs (signed_value), howto->name);
8449 return bfd_reloc_overflow;
8450 }
8451
8452 /* Mask out the value and U bit. */
8453 insn &= 0xff7fff00;
8454
8455 /* Set the U bit if the value to go in the place is non-negative. */
8456 if (signed_value >= 0)
8457 insn |= 1 << 23;
8458
8459 /* Encode the offset. */
8460 insn |= residual >> 2;
8461
8462 bfd_put_32 (input_bfd, insn, hit_data);
8463 }
8464 return bfd_reloc_ok;
8465
252b5132
RH		 8466 default:
8467 return bfd_reloc_notsupported;
8468 }
8469}
8470
98c1d4aa
NC		 8471/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8472static void
57e8b36a
NC		 8473arm_add_to_rel (bfd * abfd,
8474 bfd_byte * address,
8475 reloc_howto_type * howto,
8476 bfd_signed_vma increment)
98c1d4aa 8477{
98c1d4aa
NC		 8478 bfd_signed_vma addend;
8479
bd97cb95
DJ		 8480 if (howto->type == R_ARM_THM_CALL
8481 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8482 {
9a5aca8c
AM		 8483 int upper_insn, lower_insn;
8484 int upper, lower;
98c1d4aa 8485
9a5aca8c
AM		 8486 upper_insn = bfd_get_16 (abfd, address);
8487 lower_insn = bfd_get_16 (abfd, address + 2);
8488 upper = upper_insn & 0x7ff;
8489 lower = lower_insn & 0x7ff;
8490
8491 addend = (upper << 12) | (lower << 1);
ddda4409 8492 addend += increment;
9a5aca8c 8493 addend >>= 1;
98c1d4aa 8494
9a5aca8c
AM		 8495 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8496 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8497
dc810e39
AM		 8498 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8499 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8500 }
8501 else
8502 {
8503 bfd_vma contents;
8504
8505 contents = bfd_get_32 (abfd, address);
8506
8507 /* Get the (signed) value from the instruction. */
8508 addend = contents & howto->src_mask;
8509 if (addend & ((howto->src_mask + 1) >> 1))
8510 {
8511 bfd_signed_vma mask;
8512
8513 mask = -1;
8514 mask &= ~ howto->src_mask;
8515 addend |= mask;
8516 }
8517
8518 /* Add in the increment, (which is a byte value). */
8519 switch (howto->type)
8520 {
8521 default:
8522 addend += increment;
8523 break;
8524
8525 case R_ARM_PC24:
c6596c5e 8526 case R_ARM_PLT32:
5b5bb741
PB		 8527 case R_ARM_CALL:
8528 case R_ARM_JUMP24:
9a5aca8c 8529 addend <<= howto->size;
dc810e39 8530 addend += increment;
9a5aca8c
AM		 8531
8532 /* Should we check for overflow here ? */
8533
8534 /* Drop any undesired bits. */
8535 addend >>= howto->rightshift;
8536 break;
8537 }
8538
8539 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8540
8541 bfd_put_32 (abfd, contents, address);
ddda4409 8542 }
98c1d4aa 8543}
252b5132 8544
ba93b8ac
DJ		 8545#define IS_ARM_TLS_RELOC(R_TYPE) \
8546 ((R_TYPE) == R_ARM_TLS_GD32 \
8547 || (R_TYPE) == R_ARM_TLS_LDO32 \
8548 || (R_TYPE) == R_ARM_TLS_LDM32 \
8549 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8550 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8551 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8552 || (R_TYPE) == R_ARM_TLS_LE32 \
8553 || (R_TYPE) == R_ARM_TLS_IE32)
8554
252b5132 8555/* Relocate an ARM ELF section. */
906e58ca 8556
b34976b6 8557static bfd_boolean
57e8b36a
NC		 8558elf32_arm_relocate_section (bfd * output_bfd,
8559 struct bfd_link_info * info,
8560 bfd * input_bfd,
8561 asection * input_section,
8562 bfd_byte * contents,
8563 Elf_Internal_Rela * relocs,
8564 Elf_Internal_Sym * local_syms,
8565 asection ** local_sections)
252b5132 8566{
b34976b6
AM		 8567 Elf_Internal_Shdr *symtab_hdr;
8568 struct elf_link_hash_entry **sym_hashes;
8569 Elf_Internal_Rela *rel;
8570 Elf_Internal_Rela *relend;
8571 const char *name;
b32d3aa2 8572 struct elf32_arm_link_hash_table * globals;
252b5132 8573
4e7fd91e 8574 globals = elf32_arm_hash_table (info);
b491616a 8575
0ffa91dd 8576 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8577 sym_hashes = elf_sym_hashes (input_bfd);
8578
8579 rel = relocs;
8580 relend = relocs + input_section->reloc_count;
8581 for (; rel < relend; rel++)
8582 {
ba96a88f
NC		 8583 int r_type;
8584 reloc_howto_type * howto;
8585 unsigned long r_symndx;
8586 Elf_Internal_Sym * sym;
8587 asection * sec;
252b5132 8588 struct elf_link_hash_entry * h;
ba96a88f
NC		 8589 bfd_vma relocation;
8590 bfd_reloc_status_type r;
8591 arelent bfd_reloc;
ba93b8ac 8592 char sym_type;
0945cdfd 8593 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8594 char *error_message = NULL;
f21f3fe0 8595
252b5132 8596 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8597 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8598 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8599
ba96a88f
NC		 8600 if ( r_type == R_ARM_GNU_VTENTRY
8601 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8602 continue;
8603
b32d3aa2 8604 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8605 howto = bfd_reloc.howto;
252b5132 8606
252b5132
RH		 8607 h = NULL;
8608 sym = NULL;
8609 sec = NULL;
9b485d32 8610
252b5132
RH		 8611 if (r_symndx < symtab_hdr->sh_info)
8612 {
8613 sym = local_syms + r_symndx;
ba93b8ac 8614 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8615 sec = local_sections[r_symndx];
4e7fd91e 8616 if (globals->use_rel)
f8df10f4 8617 {
4e7fd91e
PB		 8618 relocation = (sec->output_section->vma
8619 + sec->output_offset
8620 + sym->st_value);
ab96bf03
AM		 8621 if (!info->relocatable
8622 && (sec->flags & SEC_MERGE)
8623 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8624 {
4e7fd91e
PB		 8625 asection *msec;
8626 bfd_vma addend, value;
8627
39623e12 8628 switch (r_type)
4e7fd91e 8629 {
39623e12
PB		 8630 case R_ARM_MOVW_ABS_NC:
8631 case R_ARM_MOVT_ABS:
8632 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8633 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8634 addend = (addend ^ 0x8000) - 0x8000;
8635 break;
f8df10f4 8636
39623e12
PB		 8637 case R_ARM_THM_MOVW_ABS_NC:
8638 case R_ARM_THM_MOVT_ABS:
8639 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8640 << 16;
8641 value |= bfd_get_16 (input_bfd,
8642 contents + rel->r_offset + 2);
8643 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8644 | ((value & 0x04000000) >> 15);
8645 addend = (addend ^ 0x8000) - 0x8000;
8646 break;
f8df10f4 8647
39623e12
PB		 8648 default:
8649 if (howto->rightshift
8650 || (howto->src_mask & (howto->src_mask + 1)))
8651 {
8652 (*_bfd_error_handler)
8653 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8654 input_bfd, input_section,
8655 (long) rel->r_offset, howto->name);
8656 return FALSE;
8657 }
8658
8659 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8660
8661 /* Get the (signed) value from the instruction. */
8662 addend = value & howto->src_mask;
8663 if (addend & ((howto->src_mask + 1) >> 1))
8664 {
8665 bfd_signed_vma mask;
8666
8667 mask = -1;
8668 mask &= ~ howto->src_mask;
8669 addend |= mask;
8670 }
8671 break;
4e7fd91e 8672 }
39623e12 8673
4e7fd91e
PB		 8674 msec = sec;
8675 addend =
8676 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8677 - relocation;
8678 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8679
8680 /* Cases here must match those in the preceeding
8681 switch statement. */
8682 switch (r_type)
8683 {
8684 case R_ARM_MOVW_ABS_NC:
8685 case R_ARM_MOVT_ABS:
8686 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8687 | (addend & 0xfff);
8688 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8689 break;
8690
8691 case R_ARM_THM_MOVW_ABS_NC:
8692 case R_ARM_THM_MOVT_ABS:
8693 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8694 | (addend & 0xff) | ((addend & 0x0800) << 15);
8695 bfd_put_16 (input_bfd, value >> 16,
8696 contents + rel->r_offset);
8697 bfd_put_16 (input_bfd, value,
8698 contents + rel->r_offset + 2);
8699 break;
8700
8701 default:
8702 value = (value & ~ howto->dst_mask)
8703 | (addend & howto->dst_mask);
8704 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8705 break;
8706 }
f8df10f4 8707 }
f8df10f4 8708 }
4e7fd91e
PB		 8709 else
8710 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8711 }
8712 else
8713 {
560e09e9 8714 bfd_boolean warned;
560e09e9 8715
b2a8e766
AM		 8716 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8717 r_symndx, symtab_hdr, sym_hashes,
8718 h, sec, relocation,
8719 unresolved_reloc, warned);
ba93b8ac
DJ		 8720
8721 sym_type = h->type;
252b5132
RH		 8722 }
8723
ab96bf03
AM		 8724 if (sec != NULL && elf_discarded_section (sec))
8725 {
8726 /* For relocs against symbols from removed linkonce sections,
8727 or sections discarded by a linker script, we just want the
8728 section contents zeroed. Avoid any special processing. */
8729 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8730 rel->r_info = 0;
8731 rel->r_addend = 0;
8732 continue;
8733 }
8734
8735 if (info->relocatable)
8736 {
8737 /* This is a relocatable link. We don't have to change
8738 anything, unless the reloc is against a section symbol,
8739 in which case we have to adjust according to where the
8740 section symbol winds up in the output section. */
8741 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8742 {
8743 if (globals->use_rel)
8744 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8745 howto, (bfd_signed_vma) sec->output_offset);
8746 else
8747 rel->r_addend += sec->output_offset;
8748 }
8749 continue;
8750 }
8751
252b5132
RH		 8752 if (h != NULL)
8753 name = h->root.root.string;
8754 else
8755 {
8756 name = (bfd_elf_string_from_elf_section
8757 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8758 if (name == NULL || *name == '\0')
8759 name = bfd_section_name (input_bfd, sec);
8760 }
f21f3fe0 8761
ba93b8ac
DJ		 8762 if (r_symndx != 0
8763 && r_type != R_ARM_NONE
8764 && (h == NULL
8765 || h->root.type == bfd_link_hash_defined
8766 || h->root.type == bfd_link_hash_defweak)
8767 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8768 {
8769 (*_bfd_error_handler)
8770 ((sym_type == STT_TLS
8771 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8772 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8773 input_bfd,
8774 input_section,
8775 (long) rel->r_offset,
8776 howto->name,
8777 name);
8778 }
8779
252b5132
RH		 8780 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8781 input_section, contents, rel,
8782 relocation, info, sec, name,
8783 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8784 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8785 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8786
8787 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8788 because such sections are not SEC_ALLOC and thus ld.so will
8789 not process them. */
8790 if (unresolved_reloc
8791 && !((input_section->flags & SEC_DEBUGGING) != 0
8792 && h->def_dynamic))
8793 {
8794 (*_bfd_error_handler)
843fe662
L		 8795 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8796 input_bfd,
8797 input_section,
8798 (long) rel->r_offset,
8799 howto->name,
8800 h->root.root.string);
0945cdfd
DJ		 8801 return FALSE;
8802 }
252b5132
RH		 8803
8804 if (r != bfd_reloc_ok)
8805 {
252b5132
RH		 8806 switch (r)
8807 {
8808 case bfd_reloc_overflow:
cf919dfd
PB		 8809 /* If the overflowing reloc was to an undefined symbol,
8810 we have already printed one error message and there
8811 is no point complaining again. */
8812 if ((! h ||
8813 h->root.type != bfd_link_hash_undefined)
8814 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8815 (info, (h ? &h->root : NULL), name, howto->name,
8816 (bfd_vma) 0, input_bfd, input_section,
8817 rel->r_offset))))
b34976b6 8818 return FALSE;
252b5132
RH		 8819 break;
8820
8821 case bfd_reloc_undefined:
8822 if (!((*info->callbacks->undefined_symbol)
8823 (info, name, input_bfd, input_section,
b34976b6
AM		 8824 rel->r_offset, TRUE)))
8825 return FALSE;
252b5132
RH		 8826 break;
8827
8828 case bfd_reloc_outofrange:
f2a9dd69 8829 error_message = _("out of range");
252b5132
RH		 8830 goto common_error;
8831
8832 case bfd_reloc_notsupported:
f2a9dd69 8833 error_message = _("unsupported relocation");
252b5132
RH		 8834 goto common_error;
8835
8836 case bfd_reloc_dangerous:
f2a9dd69 8837 /* error_message should already be set. */
252b5132
RH		 8838 goto common_error;
8839
8840 default:
f2a9dd69 8841 error_message = _("unknown error");
8029a119 8842 /* Fall through. */
252b5132
RH		 8843
8844 common_error:
f2a9dd69
DJ		 8845 BFD_ASSERT (error_message != NULL);
8846 if (!((*info->callbacks->reloc_dangerous)
8847 (info, error_message, input_bfd, input_section,
252b5132 8848 rel->r_offset)))
b34976b6 8849 return FALSE;
252b5132
RH		 8850 break;
8851 }
8852 }
8853 }
8854
b34976b6 8855 return TRUE;
252b5132
RH		 8856}
8857
2468f9c9
PB		 8858/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
8859 adds the edit to the start of the list. (The list must be built in order of
8860 ascending INDEX: the function's callers are primarily responsible for
8861 maintaining that condition). */
8862
8863static void
8864add_unwind_table_edit (arm_unwind_table_edit **head,
8865 arm_unwind_table_edit **tail,
8866 arm_unwind_edit_type type,
8867 asection *linked_section,
8868 unsigned int index)
8869{
8870 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
8871
8872 new_edit->type = type;
8873 new_edit->linked_section = linked_section;
8874 new_edit->index = index;
8875
8876 if (index > 0)
8877 {
8878 new_edit->next = NULL;
8879
8880 if (*tail)
8881 (*tail)->next = new_edit;
8882
8883 (*tail) = new_edit;
8884
8885 if (!*head)
8886 (*head) = new_edit;
8887 }
8888 else
8889 {
8890 new_edit->next = *head;
8891
8892 if (!*tail)
8893 *tail = new_edit;
8894
8895 *head = new_edit;
8896 }
8897}
8898
8899static _arm_elf_section_data *get_arm_elf_section_data (asection *);
8900
8901/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
8902static void
8903adjust_exidx_size(asection *exidx_sec, int adjust)
8904{
8905 asection *out_sec;
8906
8907 if (!exidx_sec->rawsize)
8908 exidx_sec->rawsize = exidx_sec->size;
8909
8910 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
8911 out_sec = exidx_sec->output_section;
8912 /* Adjust size of output section. */
8913 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
8914}
8915
8916/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
8917static void
8918insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
8919{
8920 struct _arm_elf_section_data *exidx_arm_data;
8921
8922 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
8923 add_unwind_table_edit (
8924 &exidx_arm_data->u.exidx.unwind_edit_list,
8925 &exidx_arm_data->u.exidx.unwind_edit_tail,
8926 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
8927
8928 adjust_exidx_size(exidx_sec, 8);
8929}
8930
8931/* Scan .ARM.exidx tables, and create a list describing edits which should be
8932 made to those tables, such that:
8933
8934 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
8935 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
8936 codes which have been inlined into the index).
8937
8938 The edits are applied when the tables are written
8939 (in elf32_arm_write_section).
8940*/
8941
8942bfd_boolean
8943elf32_arm_fix_exidx_coverage (asection **text_section_order,
8944 unsigned int num_text_sections,
8945 struct bfd_link_info *info)
8946{
8947 bfd *inp;
8948 unsigned int last_second_word = 0, i;
8949 asection *last_exidx_sec = NULL;
8950 asection *last_text_sec = NULL;
8951 int last_unwind_type = -1;
8952
8953 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
8954 text sections. */
8955 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
8956 {
8957 asection *sec;
8958
8959 for (sec = inp->sections; sec != NULL; sec = sec->next)
8960 {
8961 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
8962 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
8963
dec9d5df 8964 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 8965 continue;
8966
8967 if (elf_sec->linked_to)
8968 {
8969 Elf_Internal_Shdr *linked_hdr
8970 = &elf_section_data (elf_sec->linked_to)->this_hdr;
8971 struct _arm_elf_section_data *linked_sec_arm_data
8972 = get_arm_elf_section_data (linked_hdr->bfd_section);
8973
8974 if (linked_sec_arm_data == NULL)
8975 continue;
8976
8977 /* Link this .ARM.exidx section back from the text section it
8978 describes. */
8979 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
8980 }
8981 }
8982 }
8983
8984 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
8985 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
8986 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
8987 */
8988
8989 for (i = 0; i < num_text_sections; i++)
8990 {
8991 asection *sec = text_section_order[i];
8992 asection *exidx_sec;
8993 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
8994 struct _arm_elf_section_data *exidx_arm_data;
8995 bfd_byte *contents = NULL;
8996 int deleted_exidx_bytes = 0;
8997 bfd_vma j;
8998 arm_unwind_table_edit *unwind_edit_head = NULL;
8999 arm_unwind_table_edit *unwind_edit_tail = NULL;
9000 Elf_Internal_Shdr *hdr;
9001 bfd *ibfd;
9002
9003 if (arm_data == NULL)
9004 continue;
9005
9006 exidx_sec = arm_data->u.text.arm_exidx_sec;
9007 if (exidx_sec == NULL)
9008 {
9009 /* Section has no unwind data. */
9010 if (last_unwind_type == 0 || !last_exidx_sec)
9011 continue;
9012
9013 /* Ignore zero sized sections. */
9014 if (sec->size == 0)
9015 continue;
9016
9017 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9018 last_unwind_type = 0;
9019 continue;
9020 }
9021
22a8f80e
PB		 9022 /* Skip /DISCARD/ sections. */
9023 if (bfd_is_abs_section (exidx_sec->output_section))
9024 continue;
9025
2468f9c9
PB		 9026 hdr = &elf_section_data (exidx_sec)->this_hdr;
9027 if (hdr->sh_type != SHT_ARM_EXIDX)
9028 continue;
9029
9030 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9031 if (exidx_arm_data == NULL)
9032 continue;
9033
9034 ibfd = exidx_sec->owner;
9035
9036 if (hdr->contents != NULL)
9037 contents = hdr->contents;
9038 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9039 /* An error? */
9040 continue;
9041
9042 for (j = 0; j < hdr->sh_size; j += 8)
9043 {
9044 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9045 int unwind_type;
9046 int elide = 0;
9047
9048 /* An EXIDX_CANTUNWIND entry. */
9049 if (second_word == 1)
9050 {
9051 if (last_unwind_type == 0)
9052 elide = 1;
9053 unwind_type = 0;
9054 }
9055 /* Inlined unwinding data. Merge if equal to previous. */
9056 else if ((second_word & 0x80000000) != 0)
9057 {
9058 if (last_second_word == second_word && last_unwind_type == 1)
9059 elide = 1;
9060 unwind_type = 1;
9061 last_second_word = second_word;
9062 }
9063 /* Normal table entry. In theory we could merge these too,
9064 but duplicate entries are likely to be much less common. */
9065 else
9066 unwind_type = 2;
9067
9068 if (elide)
9069 {
9070 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9071 DELETE_EXIDX_ENTRY, NULL, j / 8);
9072
9073 deleted_exidx_bytes += 8;
9074 }
9075
9076 last_unwind_type = unwind_type;
9077 }
9078
9079 /* Free contents if we allocated it ourselves. */
9080 if (contents != hdr->contents)
9081 free (contents);
9082
9083 /* Record edits to be applied later (in elf32_arm_write_section). */
9084 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9085 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9086
9087 if (deleted_exidx_bytes > 0)
9088 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9089
9090 last_exidx_sec = exidx_sec;
9091 last_text_sec = sec;
9092 }
9093
9094 /* Add terminating CANTUNWIND entry. */
9095 if (last_exidx_sec && last_unwind_type != 0)
9096 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9097
9098 return TRUE;
9099}
9100
3e6b1042
DJ		 9101static bfd_boolean
9102elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9103 bfd *ibfd, const char *name)
9104{
9105 asection *sec, *osec;
9106
9107 sec = bfd_get_section_by_name (ibfd, name);
9108 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9109 return TRUE;
9110
9111 osec = sec->output_section;
9112 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9113 return TRUE;
9114
9115 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9116 sec->output_offset, sec->size))
9117 return FALSE;
9118
9119 return TRUE;
9120}
9121
9122static bfd_boolean
9123elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9124{
9125 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9126
9127 /* Invoke the regular ELF backend linker to do all the work. */
9128 if (!bfd_elf_final_link (abfd, info))
9129 return FALSE;
9130
9131 /* Write out any glue sections now that we have created all the
9132 stubs. */
9133 if (globals->bfd_of_glue_owner != NULL)
9134 {
9135 if (! elf32_arm_output_glue_section (info, abfd,
9136 globals->bfd_of_glue_owner,
9137 ARM2THUMB_GLUE_SECTION_NAME))
9138 return FALSE;
9139
9140 if (! elf32_arm_output_glue_section (info, abfd,
9141 globals->bfd_of_glue_owner,
9142 THUMB2ARM_GLUE_SECTION_NAME))
9143 return FALSE;
9144
9145 if (! elf32_arm_output_glue_section (info, abfd,
9146 globals->bfd_of_glue_owner,
9147 VFP11_ERRATUM_VENEER_SECTION_NAME))
9148 return FALSE;
9149
9150 if (! elf32_arm_output_glue_section (info, abfd,
9151 globals->bfd_of_glue_owner,
9152 ARM_BX_GLUE_SECTION_NAME))
9153 return FALSE;
9154 }
9155
9156 return TRUE;
9157}
9158
c178919b
NC		 9159/* Set the right machine number. */
9160
9161static bfd_boolean
57e8b36a 9162elf32_arm_object_p (bfd *abfd)
c178919b 9163{
5a6c6817 9164 unsigned int mach;
57e8b36a 9165
5a6c6817 9166 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9167
5a6c6817
NC		 9168 if (mach != bfd_mach_arm_unknown)
9169 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9170
9171 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9172 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9173
e16bb312 9174 else
5a6c6817 9175 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9176
9177 return TRUE;
9178}
9179
fc830a83 9180/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9181
b34976b6 9182static bfd_boolean
57e8b36a 9183elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9184{
9185 if (elf_flags_init (abfd)
9186 && elf_elfheader (abfd)->e_flags != flags)
9187 {
fc830a83
NC		 9188 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9189 {
fd2ec330 9190 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9191 (*_bfd_error_handler)
9192 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9193 abfd);
fc830a83 9194 else
d003868e
AM		 9195 _bfd_error_handler
9196 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9197 abfd);
fc830a83 9198 }
252b5132
RH		 9199 }
9200 else
9201 {
9202 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9203 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9204 }
9205
b34976b6 9206 return TRUE;
252b5132
RH		 9207}
9208
fc830a83 9209/* Copy backend specific data from one object module to another. */
9b485d32 9210
b34976b6 9211static bfd_boolean
57e8b36a 9212elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9213{
9214 flagword in_flags;
9215 flagword out_flags;
9216
0ffa91dd 9217 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9218 return TRUE;
252b5132 9219
fc830a83 9220 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9221 out_flags = elf_elfheader (obfd)->e_flags;
9222
fc830a83
NC		 9223 if (elf_flags_init (obfd)
9224 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9225 && in_flags != out_flags)
252b5132 9226 {
252b5132 9227 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9228 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9229 return FALSE;
252b5132
RH		 9230
9231 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9232 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9233 return FALSE;
252b5132
RH		 9234
9235 /* If the src and dest have different interworking flags
9236 then turn off the interworking bit. */
fd2ec330 9237 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9238 {
fd2ec330 9239 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9240 _bfd_error_handler
9241 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9242 obfd, ibfd);
252b5132 9243
fd2ec330 9244 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9245 }
1006ba19
PB		 9246
9247 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9248 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9249 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9250 }
9251
9252 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9253 elf_flags_init (obfd) = TRUE;
252b5132 9254
94a3258f
PB		 9255 /* Also copy the EI_OSABI field. */
9256 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9257 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9258
104d59d1
JM		 9259 /* Copy object attributes. */
9260 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9261
9262 return TRUE;
9263}
9264
9265/* Values for Tag_ABI_PCS_R9_use. */
9266enum
9267{
9268 AEABI_R9_V6,
9269 AEABI_R9_SB,
9270 AEABI_R9_TLS,
9271 AEABI_R9_unused
9272};
9273
9274/* Values for Tag_ABI_PCS_RW_data. */
9275enum
9276{
9277 AEABI_PCS_RW_data_absolute,
9278 AEABI_PCS_RW_data_PCrel,
9279 AEABI_PCS_RW_data_SBrel,
9280 AEABI_PCS_RW_data_unused
9281};
9282
9283/* Values for Tag_ABI_enum_size. */
9284enum
9285{
9286 AEABI_enum_unused,
9287 AEABI_enum_short,
9288 AEABI_enum_wide,
9289 AEABI_enum_forced_wide
9290};
9291
104d59d1
JM		 9292/* Determine whether an object attribute tag takes an integer, a
9293 string or both. */
906e58ca 9294
104d59d1
JM		 9295static int
9296elf32_arm_obj_attrs_arg_type (int tag)
9297{
9298 if (tag == Tag_compatibility)
3483fe2e 9299 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9300 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9301 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9302 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9303 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9304 else if (tag < 32)
3483fe2e 9305 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9306 else
3483fe2e 9307 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9308}
9309
5aa6ff7c
AS		 9310/* The ABI defines that Tag_conformance should be emitted first, and that
9311 Tag_nodefaults should be second (if either is defined). This sets those
9312 two positions, and bumps up the position of all the remaining tags to
9313 compensate. */
9314static int
9315elf32_arm_obj_attrs_order (int num)
9316{
9317 if (num == 4)
9318 return Tag_conformance;
9319 if (num == 5)
9320 return Tag_nodefaults;
9321 if ((num - 2) < Tag_nodefaults)
9322 return num - 2;
9323 if ((num - 1) < Tag_conformance)
9324 return num - 1;
9325 return num;
9326}
9327
91e22acd
AS		 9328/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9329 Returns -1 if no architecture could be read. */
9330
9331static int
9332get_secondary_compatible_arch (bfd *abfd)
9333{
9334 obj_attribute *attr =
9335 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9336
9337 /* Note: the tag and its argument below are uleb128 values, though
9338 currently-defined values fit in one byte for each. */
9339 if (attr->s
9340 && attr->s[0] == Tag_CPU_arch
9341 && (attr->s[1] & 128) != 128
9342 && attr->s[2] == 0)
9343 return attr->s[1];
9344
9345 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9346 return -1;
9347}
9348
9349/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9350 The tag is removed if ARCH is -1. */
9351
8e79c3df 9352static void
91e22acd 9353set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9354{
91e22acd
AS		 9355 obj_attribute *attr =
9356 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9357
91e22acd
AS		 9358 if (arch == -1)
9359 {
9360 attr->s = NULL;
9361 return;
8e79c3df 9362 }
91e22acd
AS		 9363
9364 /* Note: the tag and its argument below are uleb128 values, though
9365 currently-defined values fit in one byte for each. */
9366 if (!attr->s)
9367 attr->s = bfd_alloc (abfd, 3);
9368 attr->s[0] = Tag_CPU_arch;
9369 attr->s[1] = arch;
9370 attr->s[2] = '\0';
8e79c3df
CM		 9371}
9372
91e22acd
AS		 9373/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9374 into account. */
9375
9376static int
9377tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9378 int newtag, int secondary_compat)
8e79c3df 9379{
91e22acd
AS		 9380#define T(X) TAG_CPU_ARCH_##X
9381 int tagl, tagh, result;
9382 const int v6t2[] =
9383 {
9384 T(V6T2), /* PRE_V4. */
9385 T(V6T2), /* V4. */
9386 T(V6T2), /* V4T. */
9387 T(V6T2), /* V5T. */
9388 T(V6T2), /* V5TE. */
9389 T(V6T2), /* V5TEJ. */
9390 T(V6T2), /* V6. */
9391 T(V7), /* V6KZ. */
9392 T(V6T2) /* V6T2. */
9393 };
9394 const int v6k[] =
9395 {
9396 T(V6K), /* PRE_V4. */
9397 T(V6K), /* V4. */
9398 T(V6K), /* V4T. */
9399 T(V6K), /* V5T. */
9400 T(V6K), /* V5TE. */
9401 T(V6K), /* V5TEJ. */
9402 T(V6K), /* V6. */
9403 T(V6KZ), /* V6KZ. */
9404 T(V7), /* V6T2. */
9405 T(V6K) /* V6K. */
9406 };
9407 const int v7[] =
9408 {
9409 T(V7), /* PRE_V4. */
9410 T(V7), /* V4. */
9411 T(V7), /* V4T. */
9412 T(V7), /* V5T. */
9413 T(V7), /* V5TE. */
9414 T(V7), /* V5TEJ. */
9415 T(V7), /* V6. */
9416 T(V7), /* V6KZ. */
9417 T(V7), /* V6T2. */
9418 T(V7), /* V6K. */
9419 T(V7) /* V7. */
9420 };
9421 const int v6_m[] =
9422 {
9423 -1, /* PRE_V4. */
9424 -1, /* V4. */
9425 T(V6K), /* V4T. */
9426 T(V6K), /* V5T. */
9427 T(V6K), /* V5TE. */
9428 T(V6K), /* V5TEJ. */
9429 T(V6K), /* V6. */
9430 T(V6KZ), /* V6KZ. */
9431 T(V7), /* V6T2. */
9432 T(V6K), /* V6K. */
9433 T(V7), /* V7. */
9434 T(V6_M) /* V6_M. */
9435 };
9436 const int v6s_m[] =
9437 {
9438 -1, /* PRE_V4. */
9439 -1, /* V4. */
9440 T(V6K), /* V4T. */
9441 T(V6K), /* V5T. */
9442 T(V6K), /* V5TE. */
9443 T(V6K), /* V5TEJ. */
9444 T(V6K), /* V6. */
9445 T(V6KZ), /* V6KZ. */
9446 T(V7), /* V6T2. */
9447 T(V6K), /* V6K. */
9448 T(V7), /* V7. */
9449 T(V6S_M), /* V6_M. */
9450 T(V6S_M) /* V6S_M. */
9451 };
9452 const int v4t_plus_v6_m[] =
9453 {
9454 -1, /* PRE_V4. */
9455 -1, /* V4. */
9456 T(V4T), /* V4T. */
9457 T(V5T), /* V5T. */
9458 T(V5TE), /* V5TE. */
9459 T(V5TEJ), /* V5TEJ. */
9460 T(V6), /* V6. */
9461 T(V6KZ), /* V6KZ. */
9462 T(V6T2), /* V6T2. */
9463 T(V6K), /* V6K. */
9464 T(V7), /* V7. */
9465 T(V6_M), /* V6_M. */
9466 T(V6S_M), /* V6S_M. */
9467 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9468 };
9469 const int *comb[] =
9470 {
9471 v6t2,
9472 v6k,
9473 v7,
9474 v6_m,
9475 v6s_m,
9476 /* Pseudo-architecture. */
9477 v4t_plus_v6_m
9478 };
9479
9480 /* Check we've not got a higher architecture than we know about. */
9481
9482 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
9483 {
3895f852 9484 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9485 return -1;
9486 }
9487
9488 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9489
9490 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9491 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9492 oldtag = T(V4T_PLUS_V6_M);
9493
9494 /* And override the new tag if we have a Tag_also_compatible_with on the
9495 input. */
9496
9497 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9498 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9499 newtag = T(V4T_PLUS_V6_M);
9500
9501 tagl = (oldtag < newtag) ? oldtag : newtag;
9502 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9503
9504 /* Architectures before V6KZ add features monotonically. */
9505 if (tagh <= TAG_CPU_ARCH_V6KZ)
9506 return result;
9507
9508 result = comb[tagh - T(V6T2)][tagl];
9509
9510 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9511 as the canonical version. */
9512 if (result == T(V4T_PLUS_V6_M))
9513 {
9514 result = T(V4T);
9515 *secondary_compat_out = T(V6_M);
9516 }
9517 else
9518 *secondary_compat_out = -1;
9519
9520 if (result == -1)
9521 {
3895f852 9522 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9523 ibfd, oldtag, newtag);
9524 return -1;
9525 }
9526
9527 return result;
9528#undef T
8e79c3df
CM		 9529}
9530
ee065d83
PB		 9531/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9532 are conflicting attributes. */
906e58ca 9533
ee065d83
PB		 9534static bfd_boolean
9535elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9536{
104d59d1
JM		 9537 obj_attribute *in_attr;
9538 obj_attribute *out_attr;
9539 obj_attribute_list *in_list;
8e79c3df 9540 obj_attribute_list *out_list;
91e22acd 9541 obj_attribute_list **out_listp;
ee065d83
PB		 9542 /* Some tags have 0 = don't care, 1 = strong requirement,
9543 2 = weak requirement. */
91e22acd 9544 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 9545 /* For use with Tag_VFP_arch. */
9546 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 9547 int i;
91e22acd 9548 bfd_boolean result = TRUE;
ee065d83 9549
3e6b1042
DJ		 9550 /* Skip the linker stubs file. This preserves previous behavior
9551 of accepting unknown attributes in the first input file - but
9552 is that a bug? */
9553 if (ibfd->flags & BFD_LINKER_CREATED)
9554 return TRUE;
9555
104d59d1 9556 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9557 {
9558 /* This is the first object. Copy the attributes. */
104d59d1 9559 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9560
9561 /* Use the Tag_null value to indicate the attributes have been
9562 initialized. */
104d59d1 9563 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9564
ee065d83
PB		 9565 return TRUE;
9566 }
9567
104d59d1
JM		 9568 in_attr = elf_known_obj_attributes_proc (ibfd);
9569 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9570 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9571 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9572 {
8e79c3df 9573 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9574 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9575 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9576 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9577 {
9578 _bfd_error_handler
3895f852 9579 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9580 ibfd, obfd);
91e22acd 9581 result = FALSE;
ee065d83
PB		 9582 }
9583 }
9584
104d59d1 9585 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9586 {
9587 /* Merge this attribute with existing attributes. */
9588 switch (i)
9589 {
9590 case Tag_CPU_raw_name:
9591 case Tag_CPU_name:
91e22acd 9592 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9593 break;
9594
9595 case Tag_ABI_optimization_goals:
9596 case Tag_ABI_FP_optimization_goals:
9597 /* Use the first value seen. */
9598 break;
9599
9600 case Tag_CPU_arch:
91e22acd
AS		 9601 {
9602 int secondary_compat = -1, secondary_compat_out = -1;
9603 unsigned int saved_out_attr = out_attr[i].i;
9604 static const char *name_table[] = {
9605 /* These aren't real CPU names, but we can't guess
9606 that from the architecture version alone. */
9607 "Pre v4",
9608 "ARM v4",
9609 "ARM v4T",
9610 "ARM v5T",
9611 "ARM v5TE",
9612 "ARM v5TEJ",
9613 "ARM v6",
9614 "ARM v6KZ",
9615 "ARM v6T2",
9616 "ARM v6K",
9617 "ARM v7",
9618 "ARM v6-M",
9619 "ARM v6S-M"
9620 };
9621
9622 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9623 secondary_compat = get_secondary_compatible_arch (ibfd);
9624 secondary_compat_out = get_secondary_compatible_arch (obfd);
9625 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9626 &secondary_compat_out,
9627 in_attr[i].i,
9628 secondary_compat);
9629 set_secondary_compatible_arch (obfd, secondary_compat_out);
9630
9631 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9632 if (out_attr[i].i == saved_out_attr)
9633 ; /* Leave the names alone. */
9634 else if (out_attr[i].i == in_attr[i].i)
9635 {
9636 /* The output architecture has been changed to match the
9637 input architecture. Use the input names. */
9638 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9639 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9640 : NULL;
9641 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9642 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9643 : NULL;
9644 }
9645 else
9646 {
9647 out_attr[Tag_CPU_name].s = NULL;
9648 out_attr[Tag_CPU_raw_name].s = NULL;
9649 }
9650
9651 /* If we still don't have a value for Tag_CPU_name,
9652 make one up now. Tag_CPU_raw_name remains blank. */
9653 if (out_attr[Tag_CPU_name].s == NULL
9654 && out_attr[i].i < ARRAY_SIZE (name_table))
9655 out_attr[Tag_CPU_name].s =
9656 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9657 }
9658 break;
9659
ee065d83
PB		 9660 case Tag_ARM_ISA_use:
9661 case Tag_THUMB_ISA_use:
ee065d83 9662 case Tag_WMMX_arch:
91e22acd
AS		 9663 case Tag_Advanced_SIMD_arch:
9664 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9665 case Tag_ABI_FP_rounding:
ee065d83
PB		 9666 case Tag_ABI_FP_exceptions:
9667 case Tag_ABI_FP_user_exceptions:
9668 case Tag_ABI_FP_number_model:
91e22acd
AS		 9669 case Tag_VFP_HP_extension:
9670 case Tag_CPU_unaligned_access:
9671 case Tag_T2EE_use:
9672 case Tag_Virtualization_use:
9673 case Tag_MPextension_use:
ee065d83
PB		 9674 /* Use the largest value specified. */
9675 if (in_attr[i].i > out_attr[i].i)
9676 out_attr[i].i = in_attr[i].i;
9677 break;
9678
91e22acd
AS		 9679 case Tag_ABI_align8_preserved:
9680 case Tag_ABI_PCS_RO_data:
9681 /* Use the smallest value specified. */
9682 if (in_attr[i].i < out_attr[i].i)
9683 out_attr[i].i = in_attr[i].i;
9684 break;
9685
9686 case Tag_ABI_align8_needed:
9687 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9688 && (in_attr[Tag_ABI_align8_preserved].i == 0
9689 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9690 {
91e22acd
AS		 9691 /* This error message should be enabled once all non-conformant
9692 binaries in the toolchain have had the attributes set
9693 properly.
ee065d83 9694 _bfd_error_handler
3895f852 9695 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9696 obfd, ibfd);
9697 result = FALSE; */
ee065d83 9698 }
91e22acd
AS		 9699 /* Fall through. */
9700 case Tag_ABI_FP_denormal:
9701 case Tag_ABI_PCS_GOT_use:
9702 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9703 value if greater than 2 (for future-proofing). */
9704 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9705 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9706 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9707 out_attr[i].i = in_attr[i].i;
9708 break;
91e22acd
AS		 9709
9710
9711 case Tag_CPU_arch_profile:
9712 if (out_attr[i].i != in_attr[i].i)
9713 {
9714 /* 0 will merge with anything.
9715 'A' and 'S' merge to 'A'.
9716 'R' and 'S' merge to 'R'.
9717 'M' and 'A|R|S' is an error. */
9718 if (out_attr[i].i == 0
9719 || (out_attr[i].i == 'S'
9720 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9721 out_attr[i].i = in_attr[i].i;
9722 else if (in_attr[i].i == 0
9723 || (in_attr[i].i == 'S'
9724 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9725 ; /* Do nothing. */
9726 else
9727 {
9728 _bfd_error_handler
3895f852 9729 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9730 ibfd,
9731 in_attr[i].i ? in_attr[i].i : '0',
9732 out_attr[i].i ? out_attr[i].i : '0');
9733 result = FALSE;
9734 }
9735 }
9736 break;
b1cc4aeb 9737 case Tag_VFP_arch:
91e22acd
AS		 9738 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9739 largest value if greater than 4 (for future-proofing). */
9740 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9741 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9742 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9743 out_attr[i].i = in_attr[i].i;
9744 break;
ee065d83
PB		 9745 case Tag_PCS_config:
9746 if (out_attr[i].i == 0)
9747 out_attr[i].i = in_attr[i].i;
9748 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9749 {
9750 /* It's sometimes ok to mix different configs, so this is only
9751 a warning. */
9752 _bfd_error_handler
9753 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9754 }
9755 break;
9756 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9757 if (in_attr[i].i != out_attr[i].i
9758 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9759 && in_attr[i].i != AEABI_R9_unused)
9760 {
9761 _bfd_error_handler
3895f852 9762 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9763 result = FALSE;
ee065d83
PB		 9764 }
9765 if (out_attr[i].i == AEABI_R9_unused)
9766 out_attr[i].i = in_attr[i].i;
9767 break;
9768 case Tag_ABI_PCS_RW_data:
9769 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9770 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9771 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9772 {
9773 _bfd_error_handler
3895f852 9774 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9775 ibfd);
91e22acd 9776 result = FALSE;
ee065d83
PB		 9777 }
9778 /* Use the smallest value specified. */
9779 if (in_attr[i].i < out_attr[i].i)
9780 out_attr[i].i = in_attr[i].i;
9781 break;
ee065d83 9782 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9783 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9784 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9785 {
9786 _bfd_error_handler
a9dc9481
JM		 9787 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9788 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9789 }
a9dc9481 9790 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9791 out_attr[i].i = in_attr[i].i;
9792 break;
ee065d83
PB		 9793 case Tag_ABI_enum_size:
9794 if (in_attr[i].i != AEABI_enum_unused)
9795 {
9796 if (out_attr[i].i == AEABI_enum_unused
9797 || out_attr[i].i == AEABI_enum_forced_wide)
9798 {
9799 /* The existing object is compatible with anything.
9800 Use whatever requirements the new object has. */
9801 out_attr[i].i = in_attr[i].i;
9802 }
9803 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9804 && out_attr[i].i != in_attr[i].i
0ffa91dd 9805 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9806 {
91e22acd 9807 static const char *aeabi_enum_names[] =
bf21ed78 9808 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9809 const char *in_name =
9810 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9811 ? aeabi_enum_names[in_attr[i].i]
9812 : "<unknown>";
9813 const char *out_name =
9814 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9815 ? aeabi_enum_names[out_attr[i].i]
9816 : "<unknown>";
ee065d83 9817 _bfd_error_handler
bf21ed78 9818 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9819 ibfd, in_name, out_name);
ee065d83
PB		 9820 }
9821 }
9822 break;
9823 case Tag_ABI_VFP_args:
9824 /* Aready done. */
9825 break;
9826 case Tag_ABI_WMMX_args:
9827 if (in_attr[i].i != out_attr[i].i)
9828 {
9829 _bfd_error_handler
3895f852 9830 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9831 ibfd, obfd);
91e22acd 9832 result = FALSE;
ee065d83
PB		 9833 }
9834 break;
7b86a9fa
AS		 9835 case Tag_compatibility:
9836 /* Merged in target-independent code. */
9837 break;
91e22acd
AS		 9838 case Tag_ABI_HardFP_use:
9839 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
9840 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
9841 || (in_attr[i].i == 2 && out_attr[i].i == 1))
9842 out_attr[i].i = 3;
9843 else if (in_attr[i].i > out_attr[i].i)
9844 out_attr[i].i = in_attr[i].i;
9845 break;
9846 case Tag_ABI_FP_16bit_format:
9847 if (in_attr[i].i != 0 && out_attr[i].i != 0)
9848 {
9849 if (in_attr[i].i != out_attr[i].i)
9850 {
9851 _bfd_error_handler
3895f852 9852 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 9853 ibfd, obfd);
9854 result = FALSE;
9855 }
9856 }
9857 if (in_attr[i].i != 0)
9858 out_attr[i].i = in_attr[i].i;
9859 break;
7b86a9fa 9860
91e22acd 9861 case Tag_nodefaults:
2d0bb761
AS		 9862 /* This tag is set if it exists, but the value is unused (and is
9863 typically zero). We don't actually need to do anything here -
9864 the merge happens automatically when the type flags are merged
9865 below. */
91e22acd
AS		 9866 break;
9867 case Tag_also_compatible_with:
9868 /* Already done in Tag_CPU_arch. */
9869 break;
9870 case Tag_conformance:
9871 /* Keep the attribute if it matches. Throw it away otherwise.
9872 No attribute means no claim to conform. */
9873 if (!in_attr[i].s || !out_attr[i].s
9874 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
9875 out_attr[i].s = NULL;
9876 break;
3cfad14c 9877
91e22acd 9878 default:
3cfad14c 9879 {
91e22acd
AS		 9880 bfd *err_bfd = NULL;
9881
9882 /* The "known_obj_attributes" table does contain some undefined
9883 attributes. Ensure that there are unused. */
9884 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
9885 err_bfd = obfd;
9886 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
9887 err_bfd = ibfd;
9888
9889 if (err_bfd != NULL)
9890 {
9891 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9892 if ((i & 127) < 64)
9893 {
9894 _bfd_error_handler
9895 (_("%B: Unknown mandatory EABI object attribute %d"),
9896 err_bfd, i);
9897 bfd_set_error (bfd_error_bad_value);
9898 result = FALSE;
9899 }
9900 else
9901 {
9902 _bfd_error_handler
9903 (_("Warning: %B: Unknown EABI object attribute %d"),
9904 err_bfd, i);
9905 }
9906 }
9907
9908 /* Only pass on attributes that match in both inputs. */
9909 if (in_attr[i].i != out_attr[i].i
9910 || in_attr[i].s != out_attr[i].s
9911 || (in_attr[i].s != NULL && out_attr[i].s != NULL
9912 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
9913 {
9914 out_attr[i].i = 0;
9915 out_attr[i].s = NULL;
9916 }
3cfad14c 9917 }
91e22acd
AS		 9918 }
9919
9920 /* If out_attr was copied from in_attr then it won't have a type yet. */
9921 if (in_attr[i].type && !out_attr[i].type)
9922 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 9923 }
9924
104d59d1
JM		 9925 /* Merge Tag_compatibility attributes and any common GNU ones. */
9926 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 9927
104d59d1
JM		 9928 /* Check for any attributes not known on ARM. */
9929 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 9930 out_listp = &elf_other_obj_attributes_proc (obfd);
9931 out_list = *out_listp;
8e79c3df 9932
91e22acd 9933 for (; in_list || out_list; )
ee065d83 9934 {
91e22acd
AS		 9935 bfd *err_bfd = NULL;
9936 int err_tag = 0;
8e79c3df
CM		 9937
9938 /* The tags for each list are in numerical order. */
9939 /* If the tags are equal, then merge. */
91e22acd 9940 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 9941 {
91e22acd
AS		 9942 /* This attribute only exists in obfd. We can't merge, and we don't
9943 know what the tag means, so delete it. */
9944 err_bfd = obfd;
9945 err_tag = out_list->tag;
9946 *out_listp = out_list->next;
9947 out_list = *out_listp;
8e79c3df 9948 }
91e22acd 9949 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 9950 {
91e22acd
AS		 9951 /* This attribute only exists in ibfd. We can't merge, and we don't
9952 know what the tag means, so ignore it. */
9953 err_bfd = ibfd;
9954 err_tag = in_list->tag;
8e79c3df 9955 in_list = in_list->next;
eb111b1f 9956 }
91e22acd
AS		 9957 else /* The tags are equal. */
9958 {
9959 /* As present, all attributes in the list are unknown, and
9960 therefore can't be merged meaningfully. */
9961 err_bfd = obfd;
9962 err_tag = out_list->tag;
9963
9964 /* Only pass on attributes that match in both inputs. */
9965 if (in_list->attr.i != out_list->attr.i
9966 || in_list->attr.s != out_list->attr.s
9967 || (in_list->attr.s && out_list->attr.s
9968 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
9969 {
9970 /* No match. Delete the attribute. */
9971 *out_listp = out_list->next;
9972 out_list = *out_listp;
9973 }
9974 else
9975 {
9976 /* Matched. Keep the attribute and move to the next. */
9977 out_list = out_list->next;
9978 in_list = in_list->next;
9979 }
9980 }
9981
9982 if (err_bfd)
9983 {
9984 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9985 if ((err_tag & 127) < 64)
9986 {
9987 _bfd_error_handler
9988 (_("%B: Unknown mandatory EABI object attribute %d"),
9989 err_bfd, err_tag);
9990 bfd_set_error (bfd_error_bad_value);
9991 result = FALSE;
9992 }
9993 else
9994 {
9995 _bfd_error_handler
9996 (_("Warning: %B: Unknown EABI object attribute %d"),
9997 err_bfd, err_tag);
9998 }
9999 }
ee065d83 10000 }
91e22acd 10001 return result;
252b5132
RH		 10002}
10003
3a4a14e9
PB		 10004
10005/* Return TRUE if the two EABI versions are incompatible. */
10006
10007static bfd_boolean
10008elf32_arm_versions_compatible (unsigned iver, unsigned over)
10009{
10010 /* v4 and v5 are the same spec before and after it was released,
10011 so allow mixing them. */
10012 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10013 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10014 return TRUE;
10015
10016 return (iver == over);
10017}
10018
252b5132
RH		 10019/* Merge backend specific data from an object file to the output
10020 object file when linking. */
9b485d32 10021
b34976b6 10022static bfd_boolean
57e8b36a 10023elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 10024{
10025 flagword out_flags;
10026 flagword in_flags;
b34976b6 10027 bfd_boolean flags_compatible = TRUE;
cf919dfd 10028 asection *sec;
252b5132 10029
9b485d32 10030 /* Check if we have the same endianess. */
82e51918 10031 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 10032 return FALSE;
1fe494a5 10033
0ffa91dd 10034 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10035 return TRUE;
252b5132 10036
ee065d83
PB		 10037 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
10038 return FALSE;
10039
252b5132
RH		 10040 /* The input BFD must have had its flags initialised. */
10041 /* The following seems bogus to me -- The flags are initialized in
10042 the assembler but I don't think an elf_flags_init field is
9b485d32 10043 written into the object. */
252b5132
RH		 10044 /* BFD_ASSERT (elf_flags_init (ibfd)); */
10045
10046 in_flags = elf_elfheader (ibfd)->e_flags;
10047 out_flags = elf_elfheader (obfd)->e_flags;
10048
23684067
PB		 10049 /* In theory there is no reason why we couldn't handle this. However
10050 in practice it isn't even close to working and there is no real
10051 reason to want it. */
10052 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 10053 && !(ibfd->flags & DYNAMIC)
23684067
PB		 10054 && (in_flags & EF_ARM_BE8))
10055 {
3895f852 10056 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 10057 ibfd);
10058 return FALSE;
10059 }
10060
252b5132
RH		 10061 if (!elf_flags_init (obfd))
10062 {
fe077fa6
NC		 10063 /* If the input is the default architecture and had the default
10064 flags then do not bother setting the flags for the output
10065 architecture, instead allow future merges to do this. If no
10066 future merges ever set these flags then they will retain their
10067 uninitialised values, which surprise surprise, correspond
252b5132 10068 to the default values. */
fe077fa6
NC		 10069 if (bfd_get_arch_info (ibfd)->the_default
10070 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 10071 return TRUE;
252b5132 10072
b34976b6 10073 elf_flags_init (obfd) = TRUE;
252b5132
RH		 10074 elf_elfheader (obfd)->e_flags = in_flags;
10075
10076 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
10077 && bfd_get_arch_info (obfd)->the_default)
10078 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
10079
b34976b6 10080 return TRUE;
252b5132
RH		 10081 }
10082
5a6c6817
NC		 10083 /* Determine what should happen if the input ARM architecture
10084 does not match the output ARM architecture. */
10085 if (! bfd_arm_merge_machines (ibfd, obfd))
10086 return FALSE;
e16bb312 10087
1006ba19 10088 /* Identical flags must be compatible. */
252b5132 10089 if (in_flags == out_flags)
b34976b6 10090 return TRUE;
252b5132 10091
35a0f415
DJ		 10092 /* Check to see if the input BFD actually contains any sections. If
10093 not, its flags may not have been initialised either, but it
8e3de13a 10094 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 10095 dynamic objects; their section list may be emptied by
d1f161ea 10096 elf_link_add_object_symbols.
35a0f415 10097
d1f161ea
NC		 10098 Also check to see if there are no code sections in the input.
10099 In this case there is no need to check for code specific flags.
10100 XXX - do we need to worry about floating-point format compatability
10101 in data sections ? */
35a0f415 10102 if (!(ibfd->flags & DYNAMIC))
cf919dfd 10103 {
35a0f415 10104 bfd_boolean null_input_bfd = TRUE;
d1f161ea 10105 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 10106
10107 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 10108 {
35a0f415
DJ		 10109 /* Ignore synthetic glue sections. */
10110 if (strcmp (sec->name, ".glue_7")
10111 && strcmp (sec->name, ".glue_7t"))
10112 {
d1f161ea
NC		 10113 if ((bfd_get_section_flags (ibfd, sec)
10114 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10115 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10116 only_data_sections = FALSE;
10117
35a0f415
DJ		 10118 null_input_bfd = FALSE;
10119 break;
10120 }
cf919dfd 10121 }
d1f161ea
NC		 10122
10123 if (null_input_bfd || only_data_sections)
35a0f415 10124 return TRUE;
cf919dfd 10125 }
cf919dfd 10126
252b5132 10127 /* Complain about various flag mismatches. */
3a4a14e9
PB		 10128 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
10129 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 10130 {
d003868e 10131 _bfd_error_handler
3895f852 10132 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 10133 ibfd, obfd,
10134 (in_flags & EF_ARM_EABIMASK) >> 24,
10135 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 10136 return FALSE;
fc830a83 10137 }
252b5132 10138
1006ba19 10139 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 10140 /* VxWorks libraries do not use these flags. */
10141 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
10142 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
10143 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 10144 {
fd2ec330 10145 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 10146 {
d003868e 10147 _bfd_error_handler
3895f852 10148 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 10149 ibfd, obfd,
10150 in_flags & EF_ARM_APCS_26 ? 26 : 32,
10151 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 10152 flags_compatible = FALSE;
1006ba19 10153 }
252b5132 10154
fd2ec330 10155 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 10156 {
5eefb65f 10157 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 10158 _bfd_error_handler
3895f852 10159 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 10160 ibfd, obfd);
5eefb65f 10161 else
d003868e 10162 _bfd_error_handler
3895f852 10163 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 10164 ibfd, obfd);
63b0f745 10165
b34976b6 10166 flags_compatible = FALSE;
1006ba19 10167 }
252b5132 10168
96a846ea 10169 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 10170 {
96a846ea 10171 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 10172 _bfd_error_handler
3895f852 10173 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 10174 ibfd, obfd);
5eefb65f 10175 else
d003868e 10176 _bfd_error_handler
3895f852 10177 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 10178 ibfd, obfd);
fde78edd
NC		 10179
10180 flags_compatible = FALSE;
10181 }
10182
10183 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
10184 {
10185 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 10186 _bfd_error_handler
3895f852 10187 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 10188 ibfd, obfd);
fde78edd 10189 else
d003868e 10190 _bfd_error_handler
3895f852 10191 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 10192 ibfd, obfd);
63b0f745 10193
b34976b6 10194 flags_compatible = FALSE;
1006ba19 10195 }
96a846ea
RE		 10196
10197#ifdef EF_ARM_SOFT_FLOAT
10198 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
10199 {
10200 /* We can allow interworking between code that is VFP format
10201 layout, and uses either soft float or integer regs for
10202 passing floating point arguments and results. We already
10203 know that the APCS_FLOAT flags match; similarly for VFP
10204 flags. */
10205 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
10206 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
10207 {
10208 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 10209 _bfd_error_handler
3895f852 10210 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 10211 ibfd, obfd);
96a846ea 10212 else
d003868e 10213 _bfd_error_handler
3895f852 10214 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 10215 ibfd, obfd);
96a846ea 10216
b34976b6 10217 flags_compatible = FALSE;
96a846ea
RE		 10218 }
10219 }
ee43f35e 10220#endif
252b5132 10221
1006ba19 10222 /* Interworking mismatch is only a warning. */
fd2ec330 10223 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 10224 {
e3c8793a
NC		 10225 if (in_flags & EF_ARM_INTERWORK)
10226 {
d003868e
AM		 10227 _bfd_error_handler
10228 (_("Warning: %B supports interworking, whereas %B does not"),
10229 ibfd, obfd);
e3c8793a
NC		 10230 }
10231 else
10232 {
d003868e
AM		 10233 _bfd_error_handler
10234 (_("Warning: %B does not support interworking, whereas %B does"),
10235 ibfd, obfd);
e3c8793a 10236 }
8f615d07 10237 }
252b5132 10238 }
63b0f745 10239
1006ba19 10240 return flags_compatible;
252b5132
RH		 10241}
10242
9b485d32
NC		 10243/* Display the flags field. */
10244
b34976b6 10245static bfd_boolean
57e8b36a 10246elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10247{
fc830a83
NC		 10248 FILE * file = (FILE *) ptr;
10249 unsigned long flags;
252b5132
RH		 10250
10251 BFD_ASSERT (abfd != NULL && ptr != NULL);
10252
10253 /* Print normal ELF private data. */
10254 _bfd_elf_print_private_bfd_data (abfd, ptr);
10255
fc830a83 10256 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10257 /* Ignore init flag - it may not be set, despite the flags field
10258 containing valid data. */
252b5132
RH		 10259
10260 /* xgettext:c-format */
9b485d32 10261 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10262
fc830a83
NC		 10263 switch (EF_ARM_EABI_VERSION (flags))
10264 {
10265 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10266 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10267 official ARM ELF extended ABI. Hence they are only decoded if
10268 the EABI version is not set. */
fd2ec330 10269 if (flags & EF_ARM_INTERWORK)
9b485d32 10270 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10271
fd2ec330 10272 if (flags & EF_ARM_APCS_26)
6c571f00 10273 fprintf (file, " [APCS-26]");
fc830a83 10274 else
6c571f00 10275 fprintf (file, " [APCS-32]");
9a5aca8c 10276
96a846ea
RE		 10277 if (flags & EF_ARM_VFP_FLOAT)
10278 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10279 else if (flags & EF_ARM_MAVERICK_FLOAT)
10280 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10281 else
10282 fprintf (file, _(" [FPA float format]"));
10283
fd2ec330 10284 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10285 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10286
fd2ec330 10287 if (flags & EF_ARM_PIC)
9b485d32 10288 fprintf (file, _(" [position independent]"));
fc830a83 10289
fd2ec330 10290 if (flags & EF_ARM_NEW_ABI)
9b485d32 10291 fprintf (file, _(" [new ABI]"));
9a5aca8c 10292
fd2ec330 10293 if (flags & EF_ARM_OLD_ABI)
9b485d32 10294 fprintf (file, _(" [old ABI]"));
9a5aca8c 10295
fd2ec330 10296 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10297 fprintf (file, _(" [software FP]"));
9a5aca8c 10298
96a846ea
RE		 10299 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10300 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10301 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10302 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10303 break;
9a5aca8c 10304
fc830a83 10305 case EF_ARM_EABI_VER1:
9b485d32 10306 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10307
fc830a83 10308 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10309 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10310 else
9b485d32 10311 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10312
fc830a83
NC		 10313 flags &= ~ EF_ARM_SYMSARESORTED;
10314 break;
9a5aca8c 10315
fd2ec330
PB		 10316 case EF_ARM_EABI_VER2:
10317 fprintf (file, _(" [Version2 EABI]"));
10318
10319 if (flags & EF_ARM_SYMSARESORTED)
10320 fprintf (file, _(" [sorted symbol table]"));
10321 else
10322 fprintf (file, _(" [unsorted symbol table]"));
10323
10324 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10325 fprintf (file, _(" [dynamic symbols use segment index]"));
10326
10327 if (flags & EF_ARM_MAPSYMSFIRST)
10328 fprintf (file, _(" [mapping symbols precede others]"));
10329
99e4ae17 10330 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10331 | EF_ARM_MAPSYMSFIRST);
10332 break;
10333
d507cf36
PB		 10334 case EF_ARM_EABI_VER3:
10335 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10336 break;
10337
10338 case EF_ARM_EABI_VER4:
10339 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10340 goto eabi;
d507cf36 10341
3a4a14e9
PB		 10342 case EF_ARM_EABI_VER5:
10343 fprintf (file, _(" [Version5 EABI]"));
10344 eabi:
d507cf36
PB		 10345 if (flags & EF_ARM_BE8)
10346 fprintf (file, _(" [BE8]"));
10347
10348 if (flags & EF_ARM_LE8)
10349 fprintf (file, _(" [LE8]"));
10350
10351 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10352 break;
10353
fc830a83 10354 default:
9b485d32 10355 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10356 break;
10357 }
252b5132 10358
fc830a83 10359 flags &= ~ EF_ARM_EABIMASK;
252b5132 10360
fc830a83 10361 if (flags & EF_ARM_RELEXEC)
9b485d32 10362 fprintf (file, _(" [relocatable executable]"));
252b5132 10363
fc830a83 10364 if (flags & EF_ARM_HASENTRY)
9b485d32 10365 fprintf (file, _(" [has entry point]"));
252b5132 10366
fc830a83
NC		 10367 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10368
10369 if (flags)
9b485d32 10370 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10371
252b5132
RH		 10372 fputc ('\n', file);
10373
b34976b6 10374 return TRUE;
252b5132
RH		 10375}
10376
10377static int
57e8b36a 10378elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10379{
2f0ca46a
NC		 10380 switch (ELF_ST_TYPE (elf_sym->st_info))
10381 {
10382 case STT_ARM_TFUNC:
10383 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10384
2f0ca46a
NC		 10385 case STT_ARM_16BIT:
10386 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10387 This allows us to distinguish between data used by Thumb instructions
10388 and non-data (which is probably code) inside Thumb regions of an
10389 executable. */
1a0eb693 10390 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10391 return ELF_ST_TYPE (elf_sym->st_info);
10392 break;
9a5aca8c 10393
ce855c42
NC		 10394 default:
10395 break;
2f0ca46a
NC		 10396 }
10397
10398 return type;
252b5132 10399}
f21f3fe0 10400
252b5132 10401static asection *
07adf181
AM		 10402elf32_arm_gc_mark_hook (asection *sec,
10403 struct bfd_link_info *info,
10404 Elf_Internal_Rela *rel,
10405 struct elf_link_hash_entry *h,
10406 Elf_Internal_Sym *sym)
252b5132
RH		 10407{
10408 if (h != NULL)
07adf181 10409 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10410 {
10411 case R_ARM_GNU_VTINHERIT:
10412 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10413 return NULL;
10414 }
9ad5cbcf 10415
07adf181 10416 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10417}
10418
780a67af
NC		 10419/* Update the got entry reference counts for the section being removed. */
10420
b34976b6 10421static bfd_boolean
ba93b8ac
DJ		 10422elf32_arm_gc_sweep_hook (bfd * abfd,
10423 struct bfd_link_info * info,
10424 asection * sec,
10425 const Elf_Internal_Rela * relocs)
252b5132 10426{
5e681ec4
PB		 10427 Elf_Internal_Shdr *symtab_hdr;
10428 struct elf_link_hash_entry **sym_hashes;
10429 bfd_signed_vma *local_got_refcounts;
10430 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10431 struct elf32_arm_link_hash_table * globals;
10432
7dda2462
TG		 10433 if (info->relocatable)
10434 return TRUE;
10435
eb043451 10436 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10437
10438 elf_section_data (sec)->local_dynrel = NULL;
10439
0ffa91dd 10440 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10441 sym_hashes = elf_sym_hashes (abfd);
10442 local_got_refcounts = elf_local_got_refcounts (abfd);
10443
906e58ca 10444 check_use_blx (globals);
bd97cb95 10445
5e681ec4
PB		 10446 relend = relocs + sec->reloc_count;
10447 for (rel = relocs; rel < relend; rel++)
eb043451 10448 {
3eb128b2
AM		 10449 unsigned long r_symndx;
10450 struct elf_link_hash_entry *h = NULL;
eb043451 10451 int r_type;
5e681ec4 10452
3eb128b2
AM		 10453 r_symndx = ELF32_R_SYM (rel->r_info);
10454 if (r_symndx >= symtab_hdr->sh_info)
10455 {
10456 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10457 while (h->root.type == bfd_link_hash_indirect
10458 || h->root.type == bfd_link_hash_warning)
10459 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10460 }
10461
eb043451 10462 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10463 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10464 switch (r_type)
10465 {
10466 case R_ARM_GOT32:
eb043451 10467 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10468 case R_ARM_TLS_GD32:
10469 case R_ARM_TLS_IE32:
3eb128b2 10470 if (h != NULL)
eb043451 10471 {
eb043451
PB		 10472 if (h->got.refcount > 0)
10473 h->got.refcount -= 1;
10474 }
10475 else if (local_got_refcounts != NULL)
10476 {
10477 if (local_got_refcounts[r_symndx] > 0)
10478 local_got_refcounts[r_symndx] -= 1;
10479 }
10480 break;
10481
ba93b8ac
DJ		 10482 case R_ARM_TLS_LDM32:
10483 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10484 break;
10485
eb043451 10486 case R_ARM_ABS32:
bb224fc3 10487 case R_ARM_ABS32_NOI:
eb043451 10488 case R_ARM_REL32:
bb224fc3 10489 case R_ARM_REL32_NOI:
eb043451
PB		 10490 case R_ARM_PC24:
10491 case R_ARM_PLT32:
5b5bb741
PB		 10492 case R_ARM_CALL:
10493 case R_ARM_JUMP24:
eb043451 10494 case R_ARM_PREL31:
c19d1205 10495 case R_ARM_THM_CALL:
bd97cb95
DJ		 10496 case R_ARM_THM_JUMP24:
10497 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10498 case R_ARM_MOVW_ABS_NC:
10499 case R_ARM_MOVT_ABS:
10500 case R_ARM_MOVW_PREL_NC:
10501 case R_ARM_MOVT_PREL:
10502 case R_ARM_THM_MOVW_ABS_NC:
10503 case R_ARM_THM_MOVT_ABS:
10504 case R_ARM_THM_MOVW_PREL_NC:
10505 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10506 /* Should the interworking branches be here also? */
10507
3eb128b2 10508 if (h != NULL)
eb043451
PB		 10509 {
10510 struct elf32_arm_link_hash_entry *eh;
10511 struct elf32_arm_relocs_copied **pp;
10512 struct elf32_arm_relocs_copied *p;
5e681ec4 10513
b7693d02 10514 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10515
eb043451 10516 if (h->plt.refcount > 0)
b7693d02
DJ		 10517 {
10518 h->plt.refcount -= 1;
bd97cb95
DJ		 10519 if (r_type == R_ARM_THM_CALL)
10520 eh->plt_maybe_thumb_refcount--;
10521
10522 if (r_type == R_ARM_THM_JUMP24
10523 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10524 eh->plt_thumb_refcount--;
10525 }
5e681ec4 10526
eb043451 10527 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10528 || r_type == R_ARM_REL32
10529 || r_type == R_ARM_ABS32_NOI
10530 || r_type == R_ARM_REL32_NOI)
eb043451 10531 {
eb043451
PB		 10532 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10533 pp = &p->next)
10534 if (p->section == sec)
10535 {
10536 p->count -= 1;
bb224fc3
MS		 10537 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10538 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10539 p->pc_count -= 1;
eb043451
PB		 10540 if (p->count == 0)
10541 *pp = p->next;
10542 break;
10543 }
10544 }
10545 }
10546 break;
5e681ec4 10547
eb043451
PB		 10548 default:
10549 break;
10550 }
10551 }
5e681ec4 10552
b34976b6 10553 return TRUE;
252b5132
RH		 10554}
10555
780a67af
NC		 10556/* Look through the relocs for a section during the first phase. */
10557
b34976b6 10558static bfd_boolean
57e8b36a
NC		 10559elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10560 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10561{
b34976b6
AM		 10562 Elf_Internal_Shdr *symtab_hdr;
10563 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10564 const Elf_Internal_Rela *rel;
10565 const Elf_Internal_Rela *rel_end;
10566 bfd *dynobj;
5e681ec4 10567 asection *sreloc;
b34976b6 10568 bfd_vma *local_got_offsets;
5e681ec4 10569 struct elf32_arm_link_hash_table *htab;
39623e12 10570 bfd_boolean needs_plt;
ce98a316 10571 unsigned long nsyms;
9a5aca8c 10572
1049f94e 10573 if (info->relocatable)
b34976b6 10574 return TRUE;
9a5aca8c 10575
0ffa91dd
NC		 10576 BFD_ASSERT (is_arm_elf (abfd));
10577
5e681ec4
PB		 10578 htab = elf32_arm_hash_table (info);
10579 sreloc = NULL;
9a5aca8c 10580
67687978
PB		 10581 /* Create dynamic sections for relocatable executables so that we can
10582 copy relocations. */
10583 if (htab->root.is_relocatable_executable
10584 && ! htab->root.dynamic_sections_created)
10585 {
10586 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10587 return FALSE;
10588 }
10589
252b5132
RH		 10590 dynobj = elf_hash_table (info)->dynobj;
10591 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10592
0ffa91dd 10593 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10594 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10595 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10596
252b5132
RH		 10597 rel_end = relocs + sec->reloc_count;
10598 for (rel = relocs; rel < rel_end; rel++)
10599 {
10600 struct elf_link_hash_entry *h;
b7693d02 10601 struct elf32_arm_link_hash_entry *eh;
252b5132 10602 unsigned long r_symndx;
eb043451 10603 int r_type;
9a5aca8c 10604
252b5132 10605 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10606 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10607 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10608
ce98a316
NC		 10609 if (r_symndx >= nsyms
10610 /* PR 9934: It is possible to have relocations that do not
10611 refer to symbols, thus it is also possible to have an
10612 object file containing relocations but no symbol table. */
10613 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10614 {
10615 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10616 r_symndx);
ba93b8ac
DJ		 10617 return FALSE;
10618 }
10619
ce98a316 10620 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10621 h = NULL;
10622 else
973a3492
L		 10623 {
10624 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10625 while (h->root.type == bfd_link_hash_indirect
10626 || h->root.type == bfd_link_hash_warning)
10627 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10628 }
9a5aca8c 10629
b7693d02
DJ		 10630 eh = (struct elf32_arm_link_hash_entry *) h;
10631
eb043451 10632 switch (r_type)
252b5132 10633 {
5e681ec4 10634 case R_ARM_GOT32:
eb043451 10635 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10636 case R_ARM_TLS_GD32:
10637 case R_ARM_TLS_IE32:
5e681ec4 10638 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10639 {
10640 int tls_type, old_tls_type;
5e681ec4 10641
ba93b8ac
DJ		 10642 switch (r_type)
10643 {
10644 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10645 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10646 default: tls_type = GOT_NORMAL; break;
10647 }
252b5132 10648
ba93b8ac
DJ		 10649 if (h != NULL)
10650 {
10651 h->got.refcount++;
10652 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10653 }
10654 else
10655 {
10656 bfd_signed_vma *local_got_refcounts;
10657
10658 /* This is a global offset table entry for a local symbol. */
10659 local_got_refcounts = elf_local_got_refcounts (abfd);
10660 if (local_got_refcounts == NULL)
10661 {
10662 bfd_size_type size;
906e58ca 10663
ba93b8ac 10664 size = symtab_hdr->sh_info;
906e58ca 10665 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 10666 local_got_refcounts = bfd_zalloc (abfd, size);
10667 if (local_got_refcounts == NULL)
10668 return FALSE;
10669 elf_local_got_refcounts (abfd) = local_got_refcounts;
10670 elf32_arm_local_got_tls_type (abfd)
10671 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10672 }
10673 local_got_refcounts[r_symndx] += 1;
10674 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10675 }
10676
10677 /* We will already have issued an error message if there is a
10678 TLS / non-TLS mismatch, based on the symbol type. We don't
10679 support any linker relaxations. So just combine any TLS
10680 types needed. */
10681 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10682 && tls_type != GOT_NORMAL)
10683 tls_type |= old_tls_type;
10684
10685 if (old_tls_type != tls_type)
10686 {
10687 if (h != NULL)
10688 elf32_arm_hash_entry (h)->tls_type = tls_type;
10689 else
10690 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10691 }
10692 }
8029a119 10693 /* Fall through. */
ba93b8ac
DJ		 10694
10695 case R_ARM_TLS_LDM32:
10696 if (r_type == R_ARM_TLS_LDM32)
10697 htab->tls_ldm_got.refcount++;
8029a119 10698 /* Fall through. */
252b5132 10699
c19d1205 10700 case R_ARM_GOTOFF32:
5e681ec4
PB		 10701 case R_ARM_GOTPC:
10702 if (htab->sgot == NULL)
10703 {
10704 if (htab->root.dynobj == NULL)
10705 htab->root.dynobj = abfd;
10706 if (!create_got_section (htab->root.dynobj, info))
10707 return FALSE;
10708 }
252b5132
RH		 10709 break;
10710
00a97672
RS		 10711 case R_ARM_ABS12:
10712 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10713 ldr __GOTT_INDEX__ offsets. */
10714 if (!htab->vxworks_p)
10715 break;
8029a119 10716 /* Fall through. */
00a97672 10717
252b5132 10718 case R_ARM_PC24:
7359ea65 10719 case R_ARM_PLT32:
5b5bb741
PB		 10720 case R_ARM_CALL:
10721 case R_ARM_JUMP24:
eb043451 10722 case R_ARM_PREL31:
c19d1205 10723 case R_ARM_THM_CALL:
bd97cb95
DJ		 10724 case R_ARM_THM_JUMP24:
10725 case R_ARM_THM_JUMP19:
39623e12
PB		 10726 needs_plt = 1;
10727 goto normal_reloc;
10728
96c23d59
JM		 10729 case R_ARM_MOVW_ABS_NC:
10730 case R_ARM_MOVT_ABS:
10731 case R_ARM_THM_MOVW_ABS_NC:
10732 case R_ARM_THM_MOVT_ABS:
10733 if (info->shared)
10734 {
10735 (*_bfd_error_handler)
10736 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10737 abfd, elf32_arm_howto_table_1[r_type].name,
10738 (h) ? h->root.root.string : "a local symbol");
10739 bfd_set_error (bfd_error_bad_value);
10740 return FALSE;
10741 }
10742
10743 /* Fall through. */
39623e12
PB		 10744 case R_ARM_ABS32:
10745 case R_ARM_ABS32_NOI:
10746 case R_ARM_REL32:
10747 case R_ARM_REL32_NOI:
b6895b4f
PB		 10748 case R_ARM_MOVW_PREL_NC:
10749 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10750 case R_ARM_THM_MOVW_PREL_NC:
10751 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10752 needs_plt = 0;
10753 normal_reloc:
10754
b7693d02 10755 /* Should the interworking branches be listed here? */
7359ea65 10756 if (h != NULL)
5e681ec4
PB		 10757 {
10758 /* If this reloc is in a read-only section, we might
10759 need a copy reloc. We can't check reliably at this
10760 stage whether the section is read-only, as input
10761 sections have not yet been mapped to output sections.
10762 Tentatively set the flag for now, and correct in
10763 adjust_dynamic_symbol. */
7359ea65 10764 if (!info->shared)
f5385ebf 10765 h->non_got_ref = 1;
7359ea65 10766
5e681ec4 10767 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10768 refers to is in a different object. We can't tell for
10769 sure yet, because something later might force the
10770 symbol local. */
39623e12 10771 if (needs_plt)
f5385ebf 10772 h->needs_plt = 1;
4f199be3
DJ		 10773
10774 /* If we create a PLT entry, this relocation will reference
10775 it, even if it's an ABS32 relocation. */
10776 h->plt.refcount += 1;
b7693d02 10777
bd97cb95
DJ		 10778 /* It's too early to use htab->use_blx here, so we have to
10779 record possible blx references separately from
10780 relocs that definitely need a thumb stub. */
10781
c19d1205 10782 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10783 eh->plt_maybe_thumb_refcount += 1;
10784
10785 if (r_type == R_ARM_THM_JUMP24
10786 || r_type == R_ARM_THM_JUMP19)
b7693d02 10787 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10788 }
10789
67687978
PB		 10790 /* If we are creating a shared library or relocatable executable,
10791 and this is a reloc against a global symbol, or a non PC
10792 relative reloc against a local symbol, then we need to copy
10793 the reloc into the shared library. However, if we are linking
10794 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10795 global symbol which is defined in an object we are
10796 including in the link (i.e., DEF_REGULAR is set). At
10797 this point we have not seen all the input files, so it is
10798 possible that DEF_REGULAR is not set now but will be set
10799 later (it is never cleared). We account for that
10800 possibility below by storing information in the
5e681ec4 10801 relocs_copied field of the hash table entry. */
67687978 10802 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10803 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10804 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10805 || (h != NULL && ! h->needs_plt
10806 && (! info->symbolic || ! h->def_regular))))
252b5132 10807 {
5e681ec4
PB		 10808 struct elf32_arm_relocs_copied *p, **head;
10809
252b5132
RH		 10810 /* When creating a shared object, we must copy these
10811 reloc types into the output file. We create a reloc
10812 section in dynobj and make room for this reloc. */
83bac4b0 10813 if (sreloc == NULL)
252b5132 10814 {
83bac4b0
NC		 10815 sreloc = _bfd_elf_make_dynamic_reloc_section
10816 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10817
83bac4b0 10818 if (sreloc == NULL)
b34976b6 10819 return FALSE;
252b5132 10820
83bac4b0 10821 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10822 if (htab->symbian_p)
252b5132 10823 {
83bac4b0 10824 flagword flags;
5e681ec4 10825
83bac4b0 10826 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10827 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10828 bfd_set_section_flags (dynobj, sreloc, flags);
10829 }
252b5132
RH		 10830 }
10831
5e681ec4
PB		 10832 /* If this is a global symbol, we count the number of
10833 relocations we need for this symbol. */
10834 if (h != NULL)
252b5132 10835 {
5e681ec4
PB		 10836 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
10837 }
10838 else
10839 {
10840 /* Track dynamic relocs needed for local syms too.
10841 We really need local syms available to do this
10842 easily. Oh well. */
57e8b36a 10843
5e681ec4 10844 asection *s;
6edfbbad
DJ		 10845 void *vpp;
10846
5e681ec4
PB		 10847 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
10848 sec, r_symndx);
10849 if (s == NULL)
10850 return FALSE;
57e8b36a 10851
6edfbbad
DJ		 10852 vpp = &elf_section_data (s)->local_dynrel;
10853 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 10854 }
57e8b36a 10855
5e681ec4
PB		 10856 p = *head;
10857 if (p == NULL || p->section != sec)
10858 {
10859 bfd_size_type amt = sizeof *p;
57e8b36a 10860
5e681ec4 10861 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 10862 if (p == NULL)
5e681ec4
PB		 10863 return FALSE;
10864 p->next = *head;
10865 *head = p;
10866 p->section = sec;
10867 p->count = 0;
ba93b8ac 10868 p->pc_count = 0;
252b5132 10869 }
57e8b36a 10870
bb224fc3 10871 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 10872 p->pc_count += 1;
71a976dd 10873 p->count += 1;
252b5132
RH		 10874 }
10875 break;
10876
10877 /* This relocation describes the C++ object vtable hierarchy.
10878 Reconstruct it for later use during GC. */
10879 case R_ARM_GNU_VTINHERIT:
c152c796 10880 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 10881 return FALSE;
252b5132 10882 break;
9a5aca8c 10883
252b5132
RH		 10884 /* This relocation describes which C++ vtable entries are actually
10885 used. Record for later use during GC. */
10886 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 10887 BFD_ASSERT (h != NULL);
10888 if (h != NULL
10889 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 10890 return FALSE;
252b5132
RH		 10891 break;
10892 }
10893 }
f21f3fe0 10894
b34976b6 10895 return TRUE;
252b5132
RH		 10896}
10897
6a5bb875
PB		 10898/* Unwinding tables are not referenced directly. This pass marks them as
10899 required if the corresponding code section is marked. */
10900
10901static bfd_boolean
906e58ca
NC		 10902elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
10903 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 10904{
10905 bfd *sub;
10906 Elf_Internal_Shdr **elf_shdrp;
10907 bfd_boolean again;
10908
10909 /* Marking EH data may cause additional code sections to be marked,
10910 requiring multiple passes. */
10911 again = TRUE;
10912 while (again)
10913 {
10914 again = FALSE;
10915 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
10916 {
10917 asection *o;
10918
0ffa91dd 10919 if (! is_arm_elf (sub))
6a5bb875
PB		 10920 continue;
10921
10922 elf_shdrp = elf_elfsections (sub);
10923 for (o = sub->sections; o != NULL; o = o->next)
10924 {
10925 Elf_Internal_Shdr *hdr;
0ffa91dd 10926
6a5bb875 10927 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 10928 if (hdr->sh_type == SHT_ARM_EXIDX
10929 && hdr->sh_link
10930 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 10931 && !o->gc_mark
10932 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
10933 {
10934 again = TRUE;
10935 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
10936 return FALSE;
10937 }
10938 }
10939 }
10940 }
10941
10942 return TRUE;
10943}
10944
3c9458e9
NC		 10945/* Treat mapping symbols as special target symbols. */
10946
10947static bfd_boolean
10948elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
10949{
b0796911
PB		 10950 return bfd_is_arm_special_symbol_name (sym->name,
10951 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 10952}
10953
0367ecfb
NC		 10954/* This is a copy of elf_find_function() from elf.c except that
10955 ARM mapping symbols are ignored when looking for function names
10956 and STT_ARM_TFUNC is considered to a function type. */
252b5132 10957
0367ecfb
NC		 10958static bfd_boolean
10959arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
10960 asection * section,
10961 asymbol ** symbols,
10962 bfd_vma offset,
10963 const char ** filename_ptr,
10964 const char ** functionname_ptr)
10965{
10966 const char * filename = NULL;
10967 asymbol * func = NULL;
10968 bfd_vma low_func = 0;
10969 asymbol ** p;
252b5132
RH		 10970
10971 for (p = symbols; *p != NULL; p++)
10972 {
10973 elf_symbol_type *q;
10974
10975 q = (elf_symbol_type *) *p;
10976
252b5132
RH		 10977 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
10978 {
10979 default:
10980 break;
10981 case STT_FILE:
10982 filename = bfd_asymbol_name (&q->symbol);
10983 break;
252b5132
RH		 10984 case STT_FUNC:
10985 case STT_ARM_TFUNC:
9d2da7ca 10986 case STT_NOTYPE:
b0796911 10987 /* Skip mapping symbols. */
0367ecfb 10988 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 10989 && bfd_is_arm_special_symbol_name (q->symbol.name,
10990 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 10991 continue;
10992 /* Fall through. */
6b40fcba 10993 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 10994 && q->symbol.value >= low_func
10995 && q->symbol.value <= offset)
10996 {
10997 func = (asymbol *) q;
10998 low_func = q->symbol.value;
10999 }
11000 break;
11001 }
11002 }
11003
11004 if (func == NULL)
b34976b6 11005 return FALSE;
252b5132 11006
0367ecfb
NC		 11007 if (filename_ptr)
11008 *filename_ptr = filename;
11009 if (functionname_ptr)
11010 *functionname_ptr = bfd_asymbol_name (func);
11011
11012 return TRUE;
906e58ca 11013}
0367ecfb
NC		 11014
11015
11016/* Find the nearest line to a particular section and offset, for error
11017 reporting. This code is a duplicate of the code in elf.c, except
11018 that it uses arm_elf_find_function. */
11019
11020static bfd_boolean
11021elf32_arm_find_nearest_line (bfd * abfd,
11022 asection * section,
11023 asymbol ** symbols,
11024 bfd_vma offset,
11025 const char ** filename_ptr,
11026 const char ** functionname_ptr,
11027 unsigned int * line_ptr)
11028{
11029 bfd_boolean found = FALSE;
11030
11031 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11032
11033 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11034 filename_ptr, functionname_ptr,
11035 line_ptr, 0,
11036 & elf_tdata (abfd)->dwarf2_find_line_info))
11037 {
11038 if (!*functionname_ptr)
11039 arm_elf_find_function (abfd, section, symbols, offset,
11040 *filename_ptr ? NULL : filename_ptr,
11041 functionname_ptr);
f21f3fe0 11042
0367ecfb
NC		 11043 return TRUE;
11044 }
11045
11046 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11047 & found, filename_ptr,
11048 functionname_ptr, line_ptr,
11049 & elf_tdata (abfd)->line_info))
11050 return FALSE;
11051
11052 if (found && (*functionname_ptr || *line_ptr))
11053 return TRUE;
11054
11055 if (symbols == NULL)
11056 return FALSE;
11057
11058 if (! arm_elf_find_function (abfd, section, symbols, offset,
11059 filename_ptr, functionname_ptr))
11060 return FALSE;
11061
11062 *line_ptr = 0;
b34976b6 11063 return TRUE;
252b5132
RH		 11064}
11065
4ab527b0
FF		 11066static bfd_boolean
11067elf32_arm_find_inliner_info (bfd * abfd,
11068 const char ** filename_ptr,
11069 const char ** functionname_ptr,
11070 unsigned int * line_ptr)
11071{
11072 bfd_boolean found;
11073 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11074 functionname_ptr, line_ptr,
11075 & elf_tdata (abfd)->dwarf2_find_line_info);
11076 return found;
11077}
11078
252b5132
RH		 11079/* Adjust a symbol defined by a dynamic object and referenced by a
11080 regular object. The current definition is in some section of the
11081 dynamic object, but we're not including those sections. We have to
11082 change the definition to something the rest of the link can
11083 understand. */
11084
b34976b6 11085static bfd_boolean
57e8b36a
NC		 11086elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11087 struct elf_link_hash_entry * h)
252b5132
RH		 11088{
11089 bfd * dynobj;
11090 asection * s;
b7693d02 11091 struct elf32_arm_link_hash_entry * eh;
67687978 11092 struct elf32_arm_link_hash_table *globals;
252b5132 11093
67687978 11094 globals = elf32_arm_hash_table (info);
252b5132
RH		 11095 dynobj = elf_hash_table (info)->dynobj;
11096
11097 /* Make sure we know what is going on here. */
11098 BFD_ASSERT (dynobj != NULL
f5385ebf 11099 && (h->needs_plt
f6e332e6 11100 || h->u.weakdef != NULL
f5385ebf
AM		 11101 || (h->def_dynamic
11102 && h->ref_regular
11103 && !h->def_regular)));
252b5132 11104
b7693d02
DJ		 11105 eh = (struct elf32_arm_link_hash_entry *) h;
11106
252b5132
RH		 11107 /* If this is a function, put it in the procedure linkage table. We
11108 will fill in the contents of the procedure linkage table later,
11109 when we know the address of the .got section. */
0f88be7a 11110 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11111 || h->needs_plt)
252b5132 11112 {
5e681ec4
PB		 11113 if (h->plt.refcount <= 0
11114 || SYMBOL_CALLS_LOCAL (info, h)
11115 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11116 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11117 {
11118 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11119 file, but the symbol was never referred to by a dynamic
11120 object, or if all references were garbage collected. In
11121 such a case, we don't actually need to build a procedure
11122 linkage table, and we can just do a PC24 reloc instead. */
11123 h->plt.offset = (bfd_vma) -1;
b7693d02 11124 eh->plt_thumb_refcount = 0;
bd97cb95 11125 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11126 h->needs_plt = 0;
252b5132
RH		 11127 }
11128
b34976b6 11129 return TRUE;
252b5132 11130 }
5e681ec4 11131 else
b7693d02
DJ		 11132 {
11133 /* It's possible that we incorrectly decided a .plt reloc was
11134 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11135 in check_relocs. We can't decide accurately between function
11136 and non-function syms in check-relocs; Objects loaded later in
11137 the link may change h->type. So fix it now. */
11138 h->plt.offset = (bfd_vma) -1;
11139 eh->plt_thumb_refcount = 0;
bd97cb95 11140 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11141 }
252b5132
RH		 11142
11143 /* If this is a weak symbol, and there is a real definition, the
11144 processor independent code will have arranged for us to see the
11145 real definition first, and we can just use the same value. */
f6e332e6 11146 if (h->u.weakdef != NULL)
252b5132 11147 {
f6e332e6
AM		 11148 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11149 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11150 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11151 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11152 return TRUE;
252b5132
RH		 11153 }
11154
ba93b8ac
DJ		 11155 /* If there are no non-GOT references, we do not need a copy
11156 relocation. */
11157 if (!h->non_got_ref)
11158 return TRUE;
11159
252b5132
RH		 11160 /* This is a reference to a symbol defined by a dynamic object which
11161 is not a function. */
11162
11163 /* If we are creating a shared library, we must presume that the
11164 only references to the symbol are via the global offset table.
11165 For such cases we need not do anything here; the relocations will
67687978
PB		 11166 be handled correctly by relocate_section. Relocatable executables
11167 can reference data in shared objects directly, so we don't need to
11168 do anything here. */
11169 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11170 return TRUE;
252b5132 11171
909272ee
AM		 11172 if (h->size == 0)
11173 {
11174 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11175 h->root.root.string);
11176 return TRUE;
11177 }
11178
252b5132
RH		 11179 /* We must allocate the symbol in our .dynbss section, which will
11180 become part of the .bss section of the executable. There will be
11181 an entry for this symbol in the .dynsym section. The dynamic
11182 object will contain position independent code, so all references
11183 from the dynamic object to this symbol will go through the global
11184 offset table. The dynamic linker will use the .dynsym entry to
11185 determine the address it must put in the global offset table, so
11186 both the dynamic object and the regular object will refer to the
11187 same memory location for the variable. */
252b5132
RH		 11188 s = bfd_get_section_by_name (dynobj, ".dynbss");
11189 BFD_ASSERT (s != NULL);
11190
11191 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11192 copy the initial value out of the dynamic object and into the
11193 runtime process image. We need to remember the offset into the
00a97672 11194 .rel(a).bss section we are going to use. */
252b5132
RH		 11195 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11196 {
11197 asection *srel;
11198
00a97672 11199 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11200 BFD_ASSERT (srel != NULL);
00a97672 11201 srel->size += RELOC_SIZE (globals);
f5385ebf 11202 h->needs_copy = 1;
252b5132
RH		 11203 }
11204
027297b7 11205 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11206}
11207
5e681ec4
PB		 11208/* Allocate space in .plt, .got and associated reloc sections for
11209 dynamic relocs. */
11210
11211static bfd_boolean
57e8b36a 11212allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11213{
11214 struct bfd_link_info *info;
11215 struct elf32_arm_link_hash_table *htab;
11216 struct elf32_arm_link_hash_entry *eh;
11217 struct elf32_arm_relocs_copied *p;
bd97cb95 11218 bfd_signed_vma thumb_refs;
5e681ec4 11219
b7693d02
DJ		 11220 eh = (struct elf32_arm_link_hash_entry *) h;
11221
5e681ec4
PB		 11222 if (h->root.type == bfd_link_hash_indirect)
11223 return TRUE;
11224
11225 if (h->root.type == bfd_link_hash_warning)
11226 /* When warning symbols are created, they **replace** the "real"
11227 entry in the hash table, thus we never get to see the real
11228 symbol in a hash traversal. So look at it now. */
11229 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11230
11231 info = (struct bfd_link_info *) inf;
11232 htab = elf32_arm_hash_table (info);
11233
11234 if (htab->root.dynamic_sections_created
11235 && h->plt.refcount > 0)
11236 {
11237 /* Make sure this symbol is output as a dynamic symbol.
11238 Undefined weak syms won't yet be marked as dynamic. */
11239 if (h->dynindx == -1
f5385ebf 11240 && !h->forced_local)
5e681ec4 11241 {
c152c796 11242 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11243 return FALSE;
11244 }
11245
11246 if (info->shared
7359ea65 11247 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11248 {
11249 asection *s = htab->splt;
11250
11251 /* If this is the first .plt entry, make room for the special
11252 first entry. */
eea6121a 11253 if (s->size == 0)
e5a52504 11254 s->size += htab->plt_header_size;
5e681ec4 11255
eea6121a 11256 h->plt.offset = s->size;
5e681ec4 11257
b7693d02
DJ		 11258 /* If we will insert a Thumb trampoline before this PLT, leave room
11259 for it. */
bd97cb95
DJ		 11260 thumb_refs = eh->plt_thumb_refcount;
11261 if (!htab->use_blx)
11262 thumb_refs += eh->plt_maybe_thumb_refcount;
11263
11264 if (thumb_refs > 0)
b7693d02
DJ		 11265 {
11266 h->plt.offset += PLT_THUMB_STUB_SIZE;
11267 s->size += PLT_THUMB_STUB_SIZE;
11268 }
11269
5e681ec4
PB		 11270 /* If this symbol is not defined in a regular file, and we are
11271 not generating a shared library, then set the symbol to this
11272 location in the .plt. This is required to make function
11273 pointers compare as equal between the normal executable and
11274 the shared library. */
11275 if (! info->shared
f5385ebf 11276 && !h->def_regular)
5e681ec4
PB		 11277 {
11278 h->root.u.def.section = s;
11279 h->root.u.def.value = h->plt.offset;
b7693d02
DJ		 11280
11281 /* Make sure the function is not marked as Thumb, in case
11282 it is the target of an ABS32 relocation, which will
11283 point to the PLT entry. */
11284 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11285 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB		 11286 }
11287
11288 /* Make room for this entry. */
e5a52504 11289 s->size += htab->plt_entry_size;
5e681ec4 11290
e5a52504 11291 if (!htab->symbian_p)
b7693d02
DJ		 11292 {
11293 /* We also need to make an entry in the .got.plt section, which
11294 will be placed in the .got section by the linker script. */
11295 eh->plt_got_offset = htab->sgotplt->size;
11296 htab->sgotplt->size += 4;
11297 }
5e681ec4 11298
00a97672
RS		 11299 /* We also need to make an entry in the .rel(a).plt section. */
11300 htab->srelplt->size += RELOC_SIZE (htab);
11301
11302 /* VxWorks executables have a second set of relocations for
11303 each PLT entry. They go in a separate relocation section,
11304 which is processed by the kernel loader. */
11305 if (htab->vxworks_p && !info->shared)
11306 {
11307 /* There is a relocation for the initial PLT entry:
11308 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11309 if (h->plt.offset == htab->plt_header_size)
11310 htab->srelplt2->size += RELOC_SIZE (htab);
11311
11312 /* There are two extra relocations for each subsequent
11313 PLT entry: an R_ARM_32 relocation for the GOT entry,
11314 and an R_ARM_32 relocation for the PLT entry. */
11315 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11316 }
5e681ec4
PB		 11317 }
11318 else
11319 {
11320 h->plt.offset = (bfd_vma) -1;
f5385ebf 11321 h->needs_plt = 0;
5e681ec4
PB		 11322 }
11323 }
11324 else
11325 {
11326 h->plt.offset = (bfd_vma) -1;
f5385ebf 11327 h->needs_plt = 0;
5e681ec4
PB		 11328 }
11329
11330 if (h->got.refcount > 0)
11331 {
11332 asection *s;
11333 bfd_boolean dyn;
ba93b8ac
DJ		 11334 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11335 int indx;
5e681ec4
PB		 11336
11337 /* Make sure this symbol is output as a dynamic symbol.
11338 Undefined weak syms won't yet be marked as dynamic. */
11339 if (h->dynindx == -1
f5385ebf 11340 && !h->forced_local)
5e681ec4 11341 {
c152c796 11342 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11343 return FALSE;
11344 }
11345
e5a52504
MM		 11346 if (!htab->symbian_p)
11347 {
11348 s = htab->sgot;
11349 h->got.offset = s->size;
ba93b8ac
DJ		 11350
11351 if (tls_type == GOT_UNKNOWN)
11352 abort ();
11353
11354 if (tls_type == GOT_NORMAL)
11355 /* Non-TLS symbols need one GOT slot. */
11356 s->size += 4;
11357 else
11358 {
11359 if (tls_type & GOT_TLS_GD)
11360 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11361 s->size += 8;
11362 if (tls_type & GOT_TLS_IE)
11363 /* R_ARM_TLS_IE32 needs one GOT slot. */
11364 s->size += 4;
11365 }
11366
e5a52504 11367 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11368
11369 indx = 0;
11370 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11371 && (!info->shared
11372 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11373 indx = h->dynindx;
11374
11375 if (tls_type != GOT_NORMAL
11376 && (info->shared || indx != 0)
11377 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11378 || h->root.type != bfd_link_hash_undefweak))
11379 {
11380 if (tls_type & GOT_TLS_IE)
00a97672 11381 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11382
11383 if (tls_type & GOT_TLS_GD)
00a97672 11384 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11385
11386 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11387 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11388 }
11389 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11390 || h->root.type != bfd_link_hash_undefweak)
11391 && (info->shared
11392 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11393 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11394 }
5e681ec4
PB		 11395 }
11396 else
11397 h->got.offset = (bfd_vma) -1;
11398
a4fd1a8e
PB		 11399 /* Allocate stubs for exported Thumb functions on v4t. */
11400 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11401 && h->def_regular
a4fd1a8e
PB		 11402 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11403 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11404 {
11405 struct elf_link_hash_entry * th;
11406 struct bfd_link_hash_entry * bh;
11407 struct elf_link_hash_entry * myh;
11408 char name[1024];
11409 asection *s;
11410 bh = NULL;
11411 /* Create a new symbol to regist the real location of the function. */
11412 s = h->root.u.def.section;
906e58ca 11413 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11414 _bfd_generic_link_add_one_symbol (info, s->owner,
11415 name, BSF_GLOBAL, s,
11416 h->root.u.def.value,
11417 NULL, TRUE, FALSE, &bh);
11418
11419 myh = (struct elf_link_hash_entry *) bh;
11420 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11421 myh->forced_local = 1;
11422 eh->export_glue = myh;
11423 th = record_arm_to_thumb_glue (info, h);
11424 /* Point the symbol at the stub. */
11425 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11426 h->root.u.def.section = th->root.u.def.section;
11427 h->root.u.def.value = th->root.u.def.value & ~1;
11428 }
11429
5e681ec4
PB		 11430 if (eh->relocs_copied == NULL)
11431 return TRUE;
11432
11433 /* In the shared -Bsymbolic case, discard space allocated for
11434 dynamic pc-relative relocs against symbols which turn out to be
11435 defined in regular objects. For the normal shared case, discard
11436 space for pc-relative relocs that have become local due to symbol
11437 visibility changes. */
11438
67687978 11439 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11440 {
7bdca076 11441 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11442 R_ARM_REL32_NOI, which will appear on something like
11443 ".long foo - .". We want calls to protected symbols to resolve
11444 directly to the function rather than going via the plt. If people
11445 want function pointer comparisons to work as expected then they
11446 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11447 if (SYMBOL_CALLS_LOCAL (info, h))
11448 {
11449 struct elf32_arm_relocs_copied **pp;
11450
11451 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11452 {
11453 p->count -= p->pc_count;
11454 p->pc_count = 0;
11455 if (p->count == 0)
11456 *pp = p->next;
11457 else
11458 pp = &p->next;
11459 }
11460 }
11461
3348747a
NS		 11462 if (elf32_arm_hash_table (info)->vxworks_p)
11463 {
11464 struct elf32_arm_relocs_copied **pp;
11465
11466 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11467 {
11468 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11469 *pp = p->next;
11470 else
11471 pp = &p->next;
11472 }
11473 }
11474
ba93b8ac 11475 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11476 visibility. */
22d606e9 11477 if (eh->relocs_copied != NULL
5e681ec4 11478 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11479 {
11480 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11481 eh->relocs_copied = NULL;
11482
11483 /* Make sure undefined weak symbols are output as a dynamic
11484 symbol in PIEs. */
11485 else if (h->dynindx == -1
11486 && !h->forced_local)
11487 {
11488 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11489 return FALSE;
11490 }
11491 }
11492
67687978
PB		 11493 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11494 && h->root.type == bfd_link_hash_new)
11495 {
11496 /* Output absolute symbols so that we can create relocations
11497 against them. For normal symbols we output a relocation
11498 against the section that contains them. */
11499 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11500 return FALSE;
11501 }
11502
5e681ec4
PB		 11503 }
11504 else
11505 {
11506 /* For the non-shared case, discard space for relocs against
11507 symbols which turn out to need copy relocs or are not
11508 dynamic. */
11509
f5385ebf
AM		 11510 if (!h->non_got_ref
11511 && ((h->def_dynamic
11512 && !h->def_regular)
5e681ec4
PB		 11513 || (htab->root.dynamic_sections_created
11514 && (h->root.type == bfd_link_hash_undefweak
11515 || h->root.type == bfd_link_hash_undefined))))
11516 {
11517 /* Make sure this symbol is output as a dynamic symbol.
11518 Undefined weak syms won't yet be marked as dynamic. */
11519 if (h->dynindx == -1
f5385ebf 11520 && !h->forced_local)
5e681ec4 11521 {
c152c796 11522 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11523 return FALSE;
11524 }
11525
11526 /* If that succeeded, we know we'll be keeping all the
11527 relocs. */
11528 if (h->dynindx != -1)
11529 goto keep;
11530 }
11531
11532 eh->relocs_copied = NULL;
11533
11534 keep: ;
11535 }
11536
11537 /* Finally, allocate space. */
11538 for (p = eh->relocs_copied; p != NULL; p = p->next)
11539 {
11540 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11541 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11542 }
11543
11544 return TRUE;
11545}
11546
08d1f311
DJ		 11547/* Find any dynamic relocs that apply to read-only sections. */
11548
11549static bfd_boolean
8029a119 11550elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11551{
8029a119
NC		 11552 struct elf32_arm_link_hash_entry * eh;
11553 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11554
11555 if (h->root.type == bfd_link_hash_warning)
11556 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11557
11558 eh = (struct elf32_arm_link_hash_entry *) h;
11559 for (p = eh->relocs_copied; p != NULL; p = p->next)
11560 {
11561 asection *s = p->section;
11562
11563 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11564 {
11565 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11566
11567 info->flags |= DF_TEXTREL;
11568
11569 /* Not an error, just cut short the traversal. */
11570 return FALSE;
11571 }
11572 }
11573 return TRUE;
11574}
11575
d504ffc8
DJ		 11576void
11577bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11578 int byteswap_code)
11579{
11580 struct elf32_arm_link_hash_table *globals;
11581
11582 globals = elf32_arm_hash_table (info);
11583 globals->byteswap_code = byteswap_code;
11584}
11585
252b5132
RH		 11586/* Set the sizes of the dynamic sections. */
11587
b34976b6 11588static bfd_boolean
57e8b36a
NC		 11589elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11590 struct bfd_link_info * info)
252b5132
RH		 11591{
11592 bfd * dynobj;
11593 asection * s;
b34976b6
AM		 11594 bfd_boolean plt;
11595 bfd_boolean relocs;
5e681ec4
PB		 11596 bfd *ibfd;
11597 struct elf32_arm_link_hash_table *htab;
252b5132 11598
5e681ec4 11599 htab = elf32_arm_hash_table (info);
252b5132
RH		 11600 dynobj = elf_hash_table (info)->dynobj;
11601 BFD_ASSERT (dynobj != NULL);
39b41c9c 11602 check_use_blx (htab);
252b5132
RH		 11603
11604 if (elf_hash_table (info)->dynamic_sections_created)
11605 {
11606 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11607 if (info->executable)
252b5132
RH		 11608 {
11609 s = bfd_get_section_by_name (dynobj, ".interp");
11610 BFD_ASSERT (s != NULL);
eea6121a 11611 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11612 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11613 }
11614 }
5e681ec4
PB		 11615
11616 /* Set up .got offsets for local syms, and space for local dynamic
11617 relocs. */
11618 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11619 {
5e681ec4
PB		 11620 bfd_signed_vma *local_got;
11621 bfd_signed_vma *end_local_got;
11622 char *local_tls_type;
11623 bfd_size_type locsymcount;
11624 Elf_Internal_Shdr *symtab_hdr;
11625 asection *srel;
3348747a 11626 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11627
0ffa91dd 11628 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11629 continue;
11630
11631 for (s = ibfd->sections; s != NULL; s = s->next)
11632 {
11633 struct elf32_arm_relocs_copied *p;
11634
6edfbbad 11635 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11636 {
11637 if (!bfd_is_abs_section (p->section)
11638 && bfd_is_abs_section (p->section->output_section))
11639 {
11640 /* Input section has been discarded, either because
11641 it is a copy of a linkonce section or due to
11642 linker script /DISCARD/, so we'll be discarding
11643 the relocs too. */
11644 }
3348747a
NS		 11645 else if (is_vxworks
11646 && strcmp (p->section->output_section->name,
11647 ".tls_vars") == 0)
11648 {
11649 /* Relocations in vxworks .tls_vars sections are
11650 handled specially by the loader. */
11651 }
5e681ec4
PB		 11652 else if (p->count != 0)
11653 {
11654 srel = elf_section_data (p->section)->sreloc;
00a97672 11655 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11656 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11657 info->flags |= DF_TEXTREL;
11658 }
11659 }
11660 }
11661
11662 local_got = elf_local_got_refcounts (ibfd);
11663 if (!local_got)
11664 continue;
11665
0ffa91dd 11666 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11667 locsymcount = symtab_hdr->sh_info;
11668 end_local_got = local_got + locsymcount;
ba93b8ac 11669 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11670 s = htab->sgot;
11671 srel = htab->srelgot;
11672 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11673 {
11674 if (*local_got > 0)
11675 {
eea6121a 11676 *local_got = s->size;
ba93b8ac
DJ		 11677 if (*local_tls_type & GOT_TLS_GD)
11678 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11679 s->size += 8;
11680 if (*local_tls_type & GOT_TLS_IE)
11681 s->size += 4;
11682 if (*local_tls_type == GOT_NORMAL)
11683 s->size += 4;
11684
11685 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11686 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11687 }
11688 else
11689 *local_got = (bfd_vma) -1;
11690 }
252b5132
RH		 11691 }
11692
ba93b8ac
DJ		 11693 if (htab->tls_ldm_got.refcount > 0)
11694 {
11695 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11696 for R_ARM_TLS_LDM32 relocations. */
11697 htab->tls_ldm_got.offset = htab->sgot->size;
11698 htab->sgot->size += 8;
11699 if (info->shared)
00a97672 11700 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11701 }
11702 else
11703 htab->tls_ldm_got.offset = -1;
11704
5e681ec4
PB		 11705 /* Allocate global sym .plt and .got entries, and space for global
11706 sym dynamic relocs. */
57e8b36a 11707 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11708
d504ffc8
DJ		 11709 /* Here we rummage through the found bfds to collect glue information. */
11710 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11711 {
0ffa91dd 11712 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11713 continue;
11714
c7b8f16e
JB		 11715 /* Initialise mapping tables for code/data. */
11716 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11717
c7b8f16e
JB		 11718 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11719 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11720 /* xgettext:c-format */
11721 _bfd_error_handler (_("Errors encountered processing file %s"),
11722 ibfd->filename);
11723 }
d504ffc8 11724
3e6b1042
DJ		 11725 /* Allocate space for the glue sections now that we've sized them. */
11726 bfd_elf32_arm_allocate_interworking_sections (info);
11727
252b5132
RH		 11728 /* The check_relocs and adjust_dynamic_symbol entry points have
11729 determined the sizes of the various dynamic sections. Allocate
11730 memory for them. */
b34976b6
AM		 11731 plt = FALSE;
11732 relocs = FALSE;
252b5132
RH		 11733 for (s = dynobj->sections; s != NULL; s = s->next)
11734 {
11735 const char * name;
252b5132
RH		 11736
11737 if ((s->flags & SEC_LINKER_CREATED) == 0)
11738 continue;
11739
11740 /* It's OK to base decisions on the section name, because none
11741 of the dynobj section names depend upon the input files. */
11742 name = bfd_get_section_name (dynobj, s);
11743
24a1ba0f 11744 if (strcmp (name, ".plt") == 0)
252b5132 11745 {
c456f082
AM		 11746 /* Remember whether there is a PLT. */
11747 plt = s->size != 0;
252b5132 11748 }
0112cd26 11749 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11750 {
c456f082 11751 if (s->size != 0)
252b5132 11752 {
252b5132 11753 /* Remember whether there are any reloc sections other
00a97672
RS		 11754 than .rel(a).plt and .rela.plt.unloaded. */
11755 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11756 relocs = TRUE;
252b5132
RH		 11757
11758 /* We use the reloc_count field as a counter if we need
11759 to copy relocs into the output file. */
11760 s->reloc_count = 0;
11761 }
11762 }
0112cd26 11763 else if (! CONST_STRNEQ (name, ".got")
c456f082 11764 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11765 {
11766 /* It's not one of our sections, so don't allocate space. */
11767 continue;
11768 }
11769
c456f082 11770 if (s->size == 0)
252b5132 11771 {
c456f082 11772 /* If we don't need this section, strip it from the
00a97672
RS		 11773 output file. This is mostly to handle .rel(a).bss and
11774 .rel(a).plt. We must create both sections in
c456f082
AM		 11775 create_dynamic_sections, because they must be created
11776 before the linker maps input sections to output
11777 sections. The linker does that before
11778 adjust_dynamic_symbol is called, and it is that
11779 function which decides whether anything needs to go
11780 into these sections. */
8423293d 11781 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11782 continue;
11783 }
11784
c456f082
AM		 11785 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11786 continue;
11787
252b5132 11788 /* Allocate memory for the section contents. */
906e58ca 11789 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11790 if (s->contents == NULL)
b34976b6 11791 return FALSE;
252b5132
RH		 11792 }
11793
11794 if (elf_hash_table (info)->dynamic_sections_created)
11795 {
11796 /* Add some entries to the .dynamic section. We fill in the
11797 values later, in elf32_arm_finish_dynamic_sections, but we
11798 must add the entries now so that we get the correct size for
11799 the .dynamic section. The DT_DEBUG entry is filled in by the
11800 dynamic linker and used by the debugger. */
dc810e39 11801#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11802 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11803
8532796c 11804 if (info->executable)
252b5132 11805 {
dc810e39 11806 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11807 return FALSE;
252b5132
RH		 11808 }
11809
11810 if (plt)
11811 {
dc810e39
AM		 11812 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11813 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11814 || !add_dynamic_entry (DT_PLTREL,
11815 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11816 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11817 return FALSE;
252b5132
RH		 11818 }
11819
11820 if (relocs)
11821 {
00a97672
RS		 11822 if (htab->use_rel)
11823 {
11824 if (!add_dynamic_entry (DT_REL, 0)
11825 || !add_dynamic_entry (DT_RELSZ, 0)
11826 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11827 return FALSE;
11828 }
11829 else
11830 {
11831 if (!add_dynamic_entry (DT_RELA, 0)
11832 || !add_dynamic_entry (DT_RELASZ, 0)
11833 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
11834 return FALSE;
11835 }
252b5132
RH		 11836 }
11837
08d1f311
DJ		 11838 /* If any dynamic relocs apply to a read-only section,
11839 then we need a DT_TEXTREL entry. */
11840 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 11841 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
11842 info);
08d1f311 11843
99e4ae17 11844 if ((info->flags & DF_TEXTREL) != 0)
252b5132 11845 {
dc810e39 11846 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 11847 return FALSE;
252b5132 11848 }
7a2b07ff
NS		 11849 if (htab->vxworks_p
11850 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
11851 return FALSE;
252b5132 11852 }
8532796c 11853#undef add_dynamic_entry
252b5132 11854
b34976b6 11855 return TRUE;
252b5132
RH		 11856}
11857
252b5132
RH		 11858/* Finish up dynamic symbol handling. We set the contents of various
11859 dynamic sections here. */
11860
b34976b6 11861static bfd_boolean
906e58ca
NC		 11862elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
11863 struct bfd_link_info * info,
11864 struct elf_link_hash_entry * h,
11865 Elf_Internal_Sym * sym)
252b5132
RH		 11866{
11867 bfd * dynobj;
e5a52504 11868 struct elf32_arm_link_hash_table *htab;
b7693d02 11869 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 11870
11871 dynobj = elf_hash_table (info)->dynobj;
e5a52504 11872 htab = elf32_arm_hash_table (info);
b7693d02 11873 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 11874
11875 if (h->plt.offset != (bfd_vma) -1)
11876 {
11877 asection * splt;
252b5132 11878 asection * srel;
e5a52504 11879 bfd_byte *loc;
24a1ba0f 11880 bfd_vma plt_index;
947216bf 11881 Elf_Internal_Rela rel;
252b5132
RH		 11882
11883 /* This symbol has an entry in the procedure linkage table. Set
11884 it up. */
11885
11886 BFD_ASSERT (h->dynindx != -1);
11887
11888 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 11889 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 11890 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 11891
e5a52504
MM		 11892 /* Fill in the entry in the procedure linkage table. */
11893 if (htab->symbian_p)
11894 {
906e58ca 11895 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 11896 elf32_arm_symbian_plt_entry[0],
11897 splt->contents + h->plt.offset);
906e58ca 11898 bfd_put_32 (output_bfd,
52ab56c2
PB		 11899 elf32_arm_symbian_plt_entry[1],
11900 splt->contents + h->plt.offset + 4);
906e58ca 11901
e5a52504 11902 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 11903 rel.r_offset = (splt->output_section->vma
11904 + splt->output_offset
52ab56c2 11905 + h->plt.offset + 4);
e5a52504 11906 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 11907
11908 /* Get the index in the procedure linkage table which
11909 corresponds to this symbol. This is the index of this symbol
11910 in all the symbols for which we are making plt entries. The
11911 first entry in the procedure linkage table is reserved. */
906e58ca 11912 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 11913 / htab->plt_entry_size);
e5a52504
MM		 11914 }
11915 else
11916 {
00a97672 11917 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 11918 bfd_vma got_displacement;
11919 asection * sgot;
52ab56c2 11920 bfd_byte * ptr;
906e58ca 11921
e5a52504
MM		 11922 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
11923 BFD_ASSERT (sgot != NULL);
11924
b7693d02
DJ		 11925 /* Get the offset into the .got.plt table of the entry that
11926 corresponds to this function. */
11927 got_offset = eh->plt_got_offset;
11928
11929 /* Get the index in the procedure linkage table which
11930 corresponds to this symbol. This is the index of this symbol
11931 in all the symbols for which we are making plt entries. The
11932 first three entries in .got.plt are reserved; after that
11933 symbols appear in the same order as in .plt. */
11934 plt_index = (got_offset - 12) / 4;
e5a52504 11935
00a97672
RS		 11936 /* Calculate the address of the GOT entry. */
11937 got_address = (sgot->output_section->vma
11938 + sgot->output_offset
11939 + got_offset);
5e681ec4 11940
00a97672
RS		 11941 /* ...and the address of the PLT entry. */
11942 plt_address = (splt->output_section->vma
11943 + splt->output_offset
11944 + h->plt.offset);
5e681ec4 11945
52ab56c2 11946 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 11947 if (htab->vxworks_p && info->shared)
11948 {
11949 unsigned int i;
11950 bfd_vma val;
11951
52ab56c2 11952 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11953 {
11954 val = elf32_arm_vxworks_shared_plt_entry[i];
11955 if (i == 2)
11956 val |= got_address - sgot->output_section->vma;
11957 if (i == 5)
11958 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11959 if (i == 2 || i == 5)
11960 bfd_put_32 (output_bfd, val, ptr);
11961 else
11962 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 11963 }
11964 }
11965 else if (htab->vxworks_p)
b7693d02 11966 {
00a97672
RS		 11967 unsigned int i;
11968 bfd_vma val;
11969
d3753b85 11970 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11971 {
11972 val = elf32_arm_vxworks_exec_plt_entry[i];
11973 if (i == 2)
11974 val |= got_address;
11975 if (i == 4)
11976 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
11977 if (i == 5)
11978 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11979 if (i == 2 || i == 5)
11980 bfd_put_32 (output_bfd, val, ptr);
11981 else
11982 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 11983 }
11984
11985 loc = (htab->srelplt2->contents
11986 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
11987
11988 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
11989 referencing the GOT for this PLT entry. */
11990 rel.r_offset = plt_address + 8;
11991 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
11992 rel.r_addend = got_offset;
11993 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
11994 loc += RELOC_SIZE (htab);
11995
11996 /* Create the R_ARM_ABS32 relocation referencing the
11997 beginning of the PLT for this GOT entry. */
11998 rel.r_offset = got_address;
11999 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12000 rel.r_addend = 0;
12001 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12002 }
00a97672
RS		 12003 else
12004 {
bd97cb95 12005 bfd_signed_vma thumb_refs;
00a97672
RS		 12006 /* Calculate the displacement between the PLT slot and the
12007 entry in the GOT. The eight-byte offset accounts for the
12008 value produced by adding to pc in the first instruction
12009 of the PLT stub. */
12010 got_displacement = got_address - (plt_address + 8);
b7693d02 12011
00a97672
RS		 12012 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12013
bd97cb95
DJ		 12014 thumb_refs = eh->plt_thumb_refcount;
12015 if (!htab->use_blx)
12016 thumb_refs += eh->plt_maybe_thumb_refcount;
12017
12018 if (thumb_refs > 0)
00a97672 12019 {
52ab56c2
PB		 12020 put_thumb_insn (htab, output_bfd,
12021 elf32_arm_plt_thumb_stub[0], ptr - 4);
12022 put_thumb_insn (htab, output_bfd,
12023 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12024 }
12025
52ab56c2
PB		 12026 put_arm_insn (htab, output_bfd,
12027 elf32_arm_plt_entry[0]
12028 | ((got_displacement & 0x0ff00000) >> 20),
12029 ptr + 0);
12030 put_arm_insn (htab, output_bfd,
12031 elf32_arm_plt_entry[1]
12032 | ((got_displacement & 0x000ff000) >> 12),
12033 ptr+ 4);
12034 put_arm_insn (htab, output_bfd,
12035 elf32_arm_plt_entry[2]
12036 | (got_displacement & 0x00000fff),
12037 ptr + 8);
5e681ec4 12038#ifdef FOUR_WORD_PLT
52ab56c2 12039 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12040#endif
00a97672 12041 }
252b5132 12042
e5a52504
MM		 12043 /* Fill in the entry in the global offset table. */
12044 bfd_put_32 (output_bfd,
12045 (splt->output_section->vma
12046 + splt->output_offset),
12047 sgot->contents + got_offset);
906e58ca 12048
00a97672
RS		 12049 /* Fill in the entry in the .rel(a).plt section. */
12050 rel.r_addend = 0;
12051 rel.r_offset = got_address;
e5a52504
MM		 12052 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12053 }
57e8b36a 12054
00a97672
RS		 12055 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12056 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12057
f5385ebf 12058 if (!h->def_regular)
252b5132
RH		 12059 {
12060 /* Mark the symbol as undefined, rather than as defined in
12061 the .plt section. Leave the value alone. */
12062 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12063 /* If the symbol is weak, we do need to clear the value.
12064 Otherwise, the PLT entry would provide a definition for
12065 the symbol even if the symbol wasn't defined anywhere,
12066 and so the symbol would never be NULL. */
f5385ebf 12067 if (!h->ref_regular_nonweak)
d982ba73 12068 sym->st_value = 0;
252b5132
RH		 12069 }
12070 }
12071
ba93b8ac
DJ		 12072 if (h->got.offset != (bfd_vma) -1
12073 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12074 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12075 {
12076 asection * sgot;
12077 asection * srel;
947216bf
AM		 12078 Elf_Internal_Rela rel;
12079 bfd_byte *loc;
00a97672 12080 bfd_vma offset;
252b5132
RH		 12081
12082 /* This symbol has an entry in the global offset table. Set it
12083 up. */
252b5132 12084 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12085 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12086 BFD_ASSERT (sgot != NULL && srel != NULL);
12087
00a97672
RS		 12088 offset = (h->got.offset & ~(bfd_vma) 1);
12089 rel.r_addend = 0;
252b5132
RH		 12090 rel.r_offset = (sgot->output_section->vma
12091 + sgot->output_offset
00a97672 12092 + offset);
252b5132 12093
5e681ec4
PB		 12094 /* If this is a static link, or it is a -Bsymbolic link and the
12095 symbol is defined locally or was forced to be local because
12096 of a version file, we just want to emit a RELATIVE reloc.
12097 The entry in the global offset table will already have been
12098 initialized in the relocate_section function. */
252b5132 12099 if (info->shared
5e681ec4
PB		 12100 && SYMBOL_REFERENCES_LOCAL (info, h))
12101 {
906e58ca 12102 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12103 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12104 if (!htab->use_rel)
12105 {
12106 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12107 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12108 }
5e681ec4 12109 }
252b5132
RH		 12110 else
12111 {
906e58ca 12112 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12113 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12114 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12115 }
12116
00a97672
RS		 12117 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12118 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12119 }
12120
f5385ebf 12121 if (h->needs_copy)
252b5132
RH		 12122 {
12123 asection * s;
947216bf
AM		 12124 Elf_Internal_Rela rel;
12125 bfd_byte *loc;
252b5132
RH		 12126
12127 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12128 BFD_ASSERT (h->dynindx != -1
12129 && (h->root.type == bfd_link_hash_defined
12130 || h->root.type == bfd_link_hash_defweak));
12131
12132 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12133 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12134 BFD_ASSERT (s != NULL);
12135
00a97672 12136 rel.r_addend = 0;
252b5132
RH		 12137 rel.r_offset = (h->root.u.def.value
12138 + h->root.u.def.section->output_section->vma
12139 + h->root.u.def.section->output_offset);
12140 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12141 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12142 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12143 }
12144
00a97672
RS		 12145 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12146 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12147 to the ".got" section. */
252b5132 12148 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12149 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12150 sym->st_shndx = SHN_ABS;
12151
b34976b6 12152 return TRUE;
252b5132
RH		 12153}
12154
12155/* Finish up the dynamic sections. */
12156
b34976b6 12157static bfd_boolean
57e8b36a 12158elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12159{
12160 bfd * dynobj;
12161 asection * sgot;
12162 asection * sdyn;
12163
12164 dynobj = elf_hash_table (info)->dynobj;
12165
12166 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12167 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12168 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12169
12170 if (elf_hash_table (info)->dynamic_sections_created)
12171 {
12172 asection *splt;
12173 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12174 struct elf32_arm_link_hash_table *htab;
252b5132 12175
229fcec5 12176 htab = elf32_arm_hash_table (info);
252b5132 12177 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12178 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12179
12180 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12181 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12182
252b5132
RH		 12183 for (; dyncon < dynconend; dyncon++)
12184 {
12185 Elf_Internal_Dyn dyn;
12186 const char * name;
12187 asection * s;
12188
12189 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12190
12191 switch (dyn.d_tag)
12192 {
229fcec5
MM		 12193 unsigned int type;
12194
252b5132 12195 default:
7a2b07ff
NS		 12196 if (htab->vxworks_p
12197 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12198 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12199 break;
12200
229fcec5
MM		 12201 case DT_HASH:
12202 name = ".hash";
12203 goto get_vma_if_bpabi;
12204 case DT_STRTAB:
12205 name = ".dynstr";
12206 goto get_vma_if_bpabi;
12207 case DT_SYMTAB:
12208 name = ".dynsym";
12209 goto get_vma_if_bpabi;
c0042f5d
MM		 12210 case DT_VERSYM:
12211 name = ".gnu.version";
12212 goto get_vma_if_bpabi;
12213 case DT_VERDEF:
12214 name = ".gnu.version_d";
12215 goto get_vma_if_bpabi;
12216 case DT_VERNEED:
12217 name = ".gnu.version_r";
12218 goto get_vma_if_bpabi;
12219
252b5132
RH		 12220 case DT_PLTGOT:
12221 name = ".got";
12222 goto get_vma;
12223 case DT_JMPREL:
00a97672 12224 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12225 get_vma:
12226 s = bfd_get_section_by_name (output_bfd, name);
12227 BFD_ASSERT (s != NULL);
229fcec5
MM		 12228 if (!htab->symbian_p)
12229 dyn.d_un.d_ptr = s->vma;
12230 else
12231 /* In the BPABI, tags in the PT_DYNAMIC section point
12232 at the file offset, not the memory address, for the
12233 convenience of the post linker. */
12234 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12235 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12236 break;
12237
229fcec5
MM		 12238 get_vma_if_bpabi:
12239 if (htab->symbian_p)
12240 goto get_vma;
12241 break;
12242
252b5132 12243 case DT_PLTRELSZ:
00a97672
RS		 12244 s = bfd_get_section_by_name (output_bfd,
12245 RELOC_SECTION (htab, ".plt"));
252b5132 12246 BFD_ASSERT (s != NULL);
eea6121a 12247 dyn.d_un.d_val = s->size;
252b5132
RH		 12248 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12249 break;
906e58ca 12250
252b5132 12251 case DT_RELSZ:
00a97672 12252 case DT_RELASZ:
229fcec5
MM		 12253 if (!htab->symbian_p)
12254 {
12255 /* My reading of the SVR4 ABI indicates that the
12256 procedure linkage table relocs (DT_JMPREL) should be
12257 included in the overall relocs (DT_REL). This is
12258 what Solaris does. However, UnixWare can not handle
12259 that case. Therefore, we override the DT_RELSZ entry
12260 here to make it not include the JMPREL relocs. Since
00a97672 12261 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12262 other relocation sections, we don't have to worry
12263 about changing the DT_REL entry. */
00a97672
RS		 12264 s = bfd_get_section_by_name (output_bfd,
12265 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12266 if (s != NULL)
12267 dyn.d_un.d_val -= s->size;
12268 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12269 break;
12270 }
8029a119 12271 /* Fall through. */
229fcec5
MM		 12272
12273 case DT_REL:
12274 case DT_RELA:
229fcec5
MM		 12275 /* In the BPABI, the DT_REL tag must point at the file
12276 offset, not the VMA, of the first relocation
12277 section. So, we use code similar to that in
12278 elflink.c, but do not check for SHF_ALLOC on the
12279 relcoation section, since relocations sections are
12280 never allocated under the BPABI. The comments above
12281 about Unixware notwithstanding, we include all of the
12282 relocations here. */
12283 if (htab->symbian_p)
12284 {
12285 unsigned int i;
12286 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12287 ? SHT_REL : SHT_RELA);
12288 dyn.d_un.d_val = 0;
12289 for (i = 1; i < elf_numsections (output_bfd); i++)
12290 {
906e58ca 12291 Elf_Internal_Shdr *hdr
229fcec5
MM		 12292 = elf_elfsections (output_bfd)[i];
12293 if (hdr->sh_type == type)
12294 {
906e58ca 12295 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12296 || dyn.d_tag == DT_RELASZ)
12297 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12298 else if ((ufile_ptr) hdr->sh_offset
12299 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12300 dyn.d_un.d_val = hdr->sh_offset;
12301 }
12302 }
12303 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12304 }
252b5132 12305 break;
88f7bcd5
NC		 12306
12307 /* Set the bottom bit of DT_INIT/FINI if the
12308 corresponding function is Thumb. */
12309 case DT_INIT:
12310 name = info->init_function;
12311 goto get_sym;
12312 case DT_FINI:
12313 name = info->fini_function;
12314 get_sym:
12315 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12316 then there is nothing to adjust. */
88f7bcd5
NC		 12317 if (dyn.d_un.d_val != 0)
12318 {
12319 struct elf_link_hash_entry * eh;
12320
12321 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12322 FALSE, FALSE, TRUE);
906e58ca 12323 if (eh != NULL
88f7bcd5
NC		 12324 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12325 {
12326 dyn.d_un.d_val |= 1;
b34976b6 12327 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12328 }
12329 }
12330 break;
252b5132
RH		 12331 }
12332 }
12333
24a1ba0f 12334 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12335 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12336 {
00a97672
RS		 12337 const bfd_vma *plt0_entry;
12338 bfd_vma got_address, plt_address, got_displacement;
12339
12340 /* Calculate the addresses of the GOT and PLT. */
12341 got_address = sgot->output_section->vma + sgot->output_offset;
12342 plt_address = splt->output_section->vma + splt->output_offset;
12343
12344 if (htab->vxworks_p)
12345 {
12346 /* The VxWorks GOT is relocated by the dynamic linker.
12347 Therefore, we must emit relocations rather than simply
12348 computing the values now. */
12349 Elf_Internal_Rela rel;
12350
12351 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12352 put_arm_insn (htab, output_bfd, plt0_entry[0],
12353 splt->contents + 0);
12354 put_arm_insn (htab, output_bfd, plt0_entry[1],
12355 splt->contents + 4);
12356 put_arm_insn (htab, output_bfd, plt0_entry[2],
12357 splt->contents + 8);
00a97672
RS		 12358 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12359
8029a119 12360 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12361 rel.r_offset = plt_address + 12;
12362 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12363 rel.r_addend = 0;
12364 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12365 htab->srelplt2->contents);
12366 }
12367 else
12368 {
12369 got_displacement = got_address - (plt_address + 16);
12370
12371 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12372 put_arm_insn (htab, output_bfd, plt0_entry[0],
12373 splt->contents + 0);
12374 put_arm_insn (htab, output_bfd, plt0_entry[1],
12375 splt->contents + 4);
12376 put_arm_insn (htab, output_bfd, plt0_entry[2],
12377 splt->contents + 8);
12378 put_arm_insn (htab, output_bfd, plt0_entry[3],
12379 splt->contents + 12);
5e681ec4 12380
5e681ec4 12381#ifdef FOUR_WORD_PLT
00a97672
RS		 12382 /* The displacement value goes in the otherwise-unused
12383 last word of the second entry. */
12384 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12385#else
00a97672 12386 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12387#endif
00a97672 12388 }
f7a74f8c 12389 }
252b5132
RH		 12390
12391 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12392 really seem like the right value. */
74541ad4
AM		 12393 if (splt->output_section->owner == output_bfd)
12394 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12395
12396 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12397 {
12398 /* Correct the .rel(a).plt.unloaded relocations. They will have
12399 incorrect symbol indexes. */
12400 int num_plts;
eed62c48 12401 unsigned char *p;
00a97672
RS		 12402
12403 num_plts = ((htab->splt->size - htab->plt_header_size)
12404 / htab->plt_entry_size);
12405 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12406
12407 for (; num_plts; num_plts--)
12408 {
12409 Elf_Internal_Rela rel;
12410
12411 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12412 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12413 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12414 p += RELOC_SIZE (htab);
12415
12416 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12417 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12418 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12419 p += RELOC_SIZE (htab);
12420 }
12421 }
252b5132
RH		 12422 }
12423
12424 /* Fill in the first three entries in the global offset table. */
229fcec5 12425 if (sgot)
252b5132 12426 {
229fcec5
MM		 12427 if (sgot->size > 0)
12428 {
12429 if (sdyn == NULL)
12430 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12431 else
12432 bfd_put_32 (output_bfd,
12433 sdyn->output_section->vma + sdyn->output_offset,
12434 sgot->contents);
12435 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12436 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12437 }
252b5132 12438
229fcec5
MM		 12439 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12440 }
252b5132 12441
b34976b6 12442 return TRUE;
252b5132
RH		 12443}
12444
ba96a88f 12445static void
57e8b36a 12446elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12447{
9b485d32 12448 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12449 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12450
12451 i_ehdrp = elf_elfheader (abfd);
12452
94a3258f
PB		 12453 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12454 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12455 else
12456 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12457 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12458
93204d3a
PB		 12459 if (link_info)
12460 {
12461 globals = elf32_arm_hash_table (link_info);
12462 if (globals->byteswap_code)
12463 i_ehdrp->e_flags |= EF_ARM_BE8;
12464 }
ba96a88f
NC		 12465}
12466
99e4ae17 12467static enum elf_reloc_type_class
57e8b36a 12468elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12469{
f51e552e 12470 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12471 {
12472 case R_ARM_RELATIVE:
12473 return reloc_class_relative;
12474 case R_ARM_JUMP_SLOT:
12475 return reloc_class_plt;
12476 case R_ARM_COPY:
12477 return reloc_class_copy;
12478 default:
12479 return reloc_class_normal;
12480 }
12481}
12482
e16bb312
NC		 12483/* Set the right machine number for an Arm ELF file. */
12484
12485static bfd_boolean
57e8b36a 12486elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12487{
12488 if (hdr->sh_type == SHT_NOTE)
12489 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12490
12491 return TRUE;
12492}
12493
e489d0ae 12494static void
57e8b36a 12495elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12496{
5a6c6817 12497 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12498}
12499
40a18ebd
NC		 12500/* Return TRUE if this is an unwinding table entry. */
12501
12502static bfd_boolean
12503is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12504{
0112cd26
NC		 12505 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12506 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12507}
12508
12509
12510/* Set the type and flags for an ARM section. We do this by
12511 the section name, which is a hack, but ought to work. */
12512
12513static bfd_boolean
12514elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12515{
12516 const char * name;
12517
12518 name = bfd_get_section_name (abfd, sec);
12519
12520 if (is_arm_elf_unwind_section_name (abfd, name))
12521 {
12522 hdr->sh_type = SHT_ARM_EXIDX;
12523 hdr->sh_flags |= SHF_LINK_ORDER;
12524 }
12525 return TRUE;
12526}
12527
6dc132d9
L		 12528/* Handle an ARM specific section when reading an object file. This is
12529 called when bfd_section_from_shdr finds a section with an unknown
12530 type. */
40a18ebd
NC		 12531
12532static bfd_boolean
12533elf32_arm_section_from_shdr (bfd *abfd,
12534 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12535 const char *name,
12536 int shindex)
40a18ebd
NC		 12537{
12538 /* There ought to be a place to keep ELF backend specific flags, but
12539 at the moment there isn't one. We just keep track of the
12540 sections by their name, instead. Fortunately, the ABI gives
12541 names for all the ARM specific sections, so we will probably get
12542 away with this. */
12543 switch (hdr->sh_type)
12544 {
12545 case SHT_ARM_EXIDX:
0951f019
RE		 12546 case SHT_ARM_PREEMPTMAP:
12547 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12548 break;
12549
12550 default:
12551 return FALSE;
12552 }
12553
6dc132d9 12554 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12555 return FALSE;
12556
12557 return TRUE;
12558}
e489d0ae 12559
8e3de13a
NC		 12560/* A structure used to record a list of sections, independently
12561 of the next and prev fields in the asection structure. */
12562typedef struct section_list
12563{
12564 asection * sec;
12565 struct section_list * next;
12566 struct section_list * prev;
12567}
12568section_list;
12569
12570/* Unfortunately we need to keep a list of sections for which
12571 an _arm_elf_section_data structure has been allocated. This
12572 is because it is possible for functions like elf32_arm_write_section
12573 to be called on a section which has had an elf_data_structure
12574 allocated for it (and so the used_by_bfd field is valid) but
12575 for which the ARM extended version of this structure - the
12576 _arm_elf_section_data structure - has not been allocated. */
12577static section_list * sections_with_arm_elf_section_data = NULL;
12578
12579static void
957c6e41 12580record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12581{
12582 struct section_list * entry;
12583
957c6e41 12584 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12585 if (entry == NULL)
12586 return;
12587 entry->sec = sec;
12588 entry->next = sections_with_arm_elf_section_data;
12589 entry->prev = NULL;
12590 if (entry->next != NULL)
12591 entry->next->prev = entry;
12592 sections_with_arm_elf_section_data = entry;
12593}
12594
44444f50
NC		 12595static struct section_list *
12596find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12597{
12598 struct section_list * entry;
bd4aae00 12599 static struct section_list * last_entry = NULL;
8e3de13a 12600
bd4aae00
NC		 12601 /* This is a short cut for the typical case where the sections are added
12602 to the sections_with_arm_elf_section_data list in forward order and
12603 then looked up here in backwards order. This makes a real difference
12604 to the ld-srec/sec64k.exp linker test. */
44444f50 12605 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12606 if (last_entry != NULL)
12607 {
12608 if (last_entry->sec == sec)
44444f50
NC		 12609 entry = last_entry;
12610 else if (last_entry->next != NULL
12611 && last_entry->next->sec == sec)
12612 entry = last_entry->next;
bd4aae00 12613 }
44444f50
NC		 12614
12615 for (; entry; entry = entry->next)
8e3de13a 12616 if (entry->sec == sec)
44444f50 12617 break;
bd4aae00 12618
44444f50
NC		 12619 if (entry)
12620 /* Record the entry prior to this one - it is the entry we are most
12621 likely to want to locate next time. Also this way if we have been
12622 called from unrecord_section_with_arm_elf_section_data() we will not
12623 be caching a pointer that is about to be freed. */
12624 last_entry = entry->prev;
12625
12626 return entry;
12627}
12628
12629static _arm_elf_section_data *
12630get_arm_elf_section_data (asection * sec)
12631{
12632 struct section_list * entry;
12633
12634 entry = find_arm_elf_section_entry (sec);
12635
12636 if (entry)
12637 return elf32_arm_section_data (entry->sec);
12638 else
12639 return NULL;
8e3de13a
NC		 12640}
12641
12642static void
12643unrecord_section_with_arm_elf_section_data (asection * sec)
12644{
12645 struct section_list * entry;
12646
44444f50
NC		 12647 entry = find_arm_elf_section_entry (sec);
12648
12649 if (entry)
12650 {
12651 if (entry->prev != NULL)
12652 entry->prev->next = entry->next;
12653 if (entry->next != NULL)
12654 entry->next->prev = entry->prev;
12655 if (entry == sections_with_arm_elf_section_data)
12656 sections_with_arm_elf_section_data = entry->next;
12657 free (entry);
12658 }
8e3de13a
NC		 12659}
12660
e489d0ae 12661
4e617b1e
PB		 12662typedef struct
12663{
12664 void *finfo;
12665 struct bfd_link_info *info;
91a5743d
PB		 12666 asection *sec;
12667 int sec_shndx;
6e0b88f1
AM		 12668 int (*func) (void *, const char *, Elf_Internal_Sym *,
12669 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12670} output_arch_syminfo;
12671
12672enum map_symbol_type
12673{
12674 ARM_MAP_ARM,
12675 ARM_MAP_THUMB,
12676 ARM_MAP_DATA
12677};
12678
12679
7413f23f 12680/* Output a single mapping symbol. */
4e617b1e
PB		 12681
12682static bfd_boolean
7413f23f
DJ		 12683elf32_arm_output_map_sym (output_arch_syminfo *osi,
12684 enum map_symbol_type type,
12685 bfd_vma offset)
4e617b1e
PB		 12686{
12687 static const char *names[3] = {"$a", "$t", "$d"};
12688 struct elf32_arm_link_hash_table *htab;
12689 Elf_Internal_Sym sym;
12690
12691 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12692 sym.st_value = osi->sec->output_section->vma
12693 + osi->sec->output_offset
12694 + offset;
4e617b1e
PB		 12695 sym.st_size = 0;
12696 sym.st_other = 0;
12697 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12698 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12699 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12700}
12701
12702
12703/* Output mapping symbols for PLT entries associated with H. */
12704
12705static bfd_boolean
12706elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12707{
12708 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12709 struct elf32_arm_link_hash_table *htab;
12710 struct elf32_arm_link_hash_entry *eh;
12711 bfd_vma addr;
12712
12713 htab = elf32_arm_hash_table (osi->info);
12714
12715 if (h->root.type == bfd_link_hash_indirect)
12716 return TRUE;
12717
12718 if (h->root.type == bfd_link_hash_warning)
12719 /* When warning symbols are created, they **replace** the "real"
12720 entry in the hash table, thus we never get to see the real
12721 symbol in a hash traversal. So look at it now. */
12722 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12723
12724 if (h->plt.offset == (bfd_vma) -1)
12725 return TRUE;
12726
12727 eh = (struct elf32_arm_link_hash_entry *) h;
12728 addr = h->plt.offset;
12729 if (htab->symbian_p)
12730 {
7413f23f 12731 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12732 return FALSE;
7413f23f 12733 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12734 return FALSE;
12735 }
12736 else if (htab->vxworks_p)
12737 {
7413f23f 12738 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12739 return FALSE;
7413f23f 12740 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12741 return FALSE;
7413f23f 12742 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12743 return FALSE;
7413f23f 12744 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12745 return FALSE;
12746 }
12747 else
12748 {
bd97cb95
DJ		 12749 bfd_signed_vma thumb_refs;
12750
12751 thumb_refs = eh->plt_thumb_refcount;
12752 if (!htab->use_blx)
12753 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12754
bd97cb95 12755 if (thumb_refs > 0)
4e617b1e 12756 {
7413f23f 12757 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12758 return FALSE;
12759 }
12760#ifdef FOUR_WORD_PLT
7413f23f 12761 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12762 return FALSE;
7413f23f 12763 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12764 return FALSE;
12765#else
906e58ca 12766 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12767 so only need to output a mapping symbol for the first PLT entry and
12768 entries with thumb thunks. */
bd97cb95 12769 if (thumb_refs > 0 || addr == 20)
4e617b1e 12770 {
7413f23f 12771 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12772 return FALSE;
12773 }
12774#endif
12775 }
12776
12777 return TRUE;
12778}
12779
7413f23f
DJ		 12780/* Output a single local symbol for a generated stub. */
12781
12782static bfd_boolean
12783elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12784 bfd_vma offset, bfd_vma size)
12785{
12786 struct elf32_arm_link_hash_table *htab;
12787 Elf_Internal_Sym sym;
12788
12789 htab = elf32_arm_hash_table (osi->info);
12790 sym.st_value = osi->sec->output_section->vma
12791 + osi->sec->output_offset
12792 + offset;
12793 sym.st_size = size;
12794 sym.st_other = 0;
12795 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12796 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12797 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12798}
4e617b1e 12799
da5938a2 12800static bfd_boolean
8029a119
NC		 12801arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12802 void * in_arg)
da5938a2
NC		 12803{
12804 struct elf32_arm_stub_hash_entry *stub_entry;
12805 struct bfd_link_info *info;
12806 struct elf32_arm_link_hash_table *htab;
12807 asection *stub_sec;
12808 bfd_vma addr;
7413f23f 12809 char *stub_name;
9a008db3 12810 output_arch_syminfo *osi;
461a49ca
DJ		 12811 const insn_sequence *template;
12812 enum stub_insn_type prev_type;
12813 int size;
12814 int i;
12815 enum map_symbol_type sym_type;
da5938a2
NC		 12816
12817 /* Massage our args to the form they really have. */
12818 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12819 osi = (output_arch_syminfo *) in_arg;
da5938a2 12820
da5938a2
NC		 12821 info = osi->info;
12822
12823 htab = elf32_arm_hash_table (info);
12824 stub_sec = stub_entry->stub_sec;
12825
12826 /* Ensure this stub is attached to the current section being
7413f23f 12827 processed. */
da5938a2
NC		 12828 if (stub_sec != osi->sec)
12829 return TRUE;
12830
7413f23f
DJ		 12831 addr = (bfd_vma) stub_entry->stub_offset;
12832 stub_name = stub_entry->output_name;
da5938a2 12833
461a49ca 12834 template = stub_entry->stub_template;
4e31c731 12835 switch (template[0].type)
7413f23f 12836 {
461a49ca
DJ		 12837 case ARM_TYPE:
12838 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12839 return FALSE;
12840 break;
461a49ca 12841 case THUMB16_TYPE:
48229727 12842 case THUMB32_TYPE:
461a49ca
DJ		 12843 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12844 stub_entry->stub_size))
da5938a2
NC		 12845 return FALSE;
12846 break;
12847 default:
12848 BFD_FAIL ();
48229727 12849 return 0;
7413f23f 12850 }
da5938a2 12851
461a49ca
DJ		 12852 prev_type = DATA_TYPE;
12853 size = 0;
12854 for (i = 0; i < stub_entry->stub_template_size; i++)
12855 {
4e31c731 12856 switch (template[i].type)
461a49ca
DJ		 12857 {
12858 case ARM_TYPE:
12859 sym_type = ARM_MAP_ARM;
12860 break;
12861
12862 case THUMB16_TYPE:
48229727 12863 case THUMB32_TYPE:
461a49ca
DJ		 12864 sym_type = ARM_MAP_THUMB;
12865 break;
12866
12867 case DATA_TYPE:
12868 sym_type = ARM_MAP_DATA;
12869 break;
12870
12871 default:
12872 BFD_FAIL ();
4e31c731 12873 return FALSE;
461a49ca
DJ		 12874 }
12875
12876 if (template[i].type != prev_type)
12877 {
12878 prev_type = template[i].type;
12879 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12880 return FALSE;
12881 }
12882
4e31c731 12883 switch (template[i].type)
461a49ca
DJ		 12884 {
12885 case ARM_TYPE:
48229727 12886 case THUMB32_TYPE:
461a49ca
DJ		 12887 size += 4;
12888 break;
12889
12890 case THUMB16_TYPE:
12891 size += 2;
12892 break;
12893
12894 case DATA_TYPE:
12895 size += 4;
12896 break;
12897
12898 default:
12899 BFD_FAIL ();
4e31c731 12900 return FALSE;
461a49ca
DJ		 12901 }
12902 }
12903
da5938a2
NC		 12904 return TRUE;
12905}
12906
91a5743d 12907/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 12908
12909static bfd_boolean
12910elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 12911 struct bfd_link_info *info,
12912 void *finfo,
6e0b88f1
AM		 12913 int (*func) (void *, const char *,
12914 Elf_Internal_Sym *,
12915 asection *,
12916 struct elf_link_hash_entry *))
4e617b1e
PB		 12917{
12918 output_arch_syminfo osi;
12919 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 12920 bfd_vma offset;
12921 bfd_size_type size;
4e617b1e
PB		 12922
12923 htab = elf32_arm_hash_table (info);
906e58ca 12924 check_use_blx (htab);
91a5743d 12925
4e617b1e
PB		 12926 osi.finfo = finfo;
12927 osi.info = info;
12928 osi.func = func;
906e58ca 12929
91a5743d
PB		 12930 /* ARM->Thumb glue. */
12931 if (htab->arm_glue_size > 0)
12932 {
12933 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12934 ARM2THUMB_GLUE_SECTION_NAME);
12935
12936 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12937 (output_bfd, osi.sec->output_section);
12938 if (info->shared || htab->root.is_relocatable_executable
12939 || htab->pic_veneer)
12940 size = ARM2THUMB_PIC_GLUE_SIZE;
12941 else if (htab->use_blx)
12942 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
12943 else
12944 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 12945
91a5743d
PB		 12946 for (offset = 0; offset < htab->arm_glue_size; offset += size)
12947 {
7413f23f
DJ		 12948 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
12949 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 12950 }
12951 }
12952
12953 /* Thumb->ARM glue. */
12954 if (htab->thumb_glue_size > 0)
12955 {
12956 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12957 THUMB2ARM_GLUE_SECTION_NAME);
12958
12959 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12960 (output_bfd, osi.sec->output_section);
12961 size = THUMB2ARM_GLUE_SIZE;
12962
12963 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
12964 {
7413f23f
DJ		 12965 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
12966 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 12967 }
12968 }
12969
845b51d6
PB		 12970 /* ARMv4 BX veneers. */
12971 if (htab->bx_glue_size > 0)
12972 {
12973 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12974 ARM_BX_GLUE_SECTION_NAME);
12975
12976 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12977 (output_bfd, osi.sec->output_section);
12978
7413f23f 12979 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 12980 }
12981
8029a119
NC		 12982 /* Long calls stubs. */
12983 if (htab->stub_bfd && htab->stub_bfd->sections)
12984 {
da5938a2 12985 asection* stub_sec;
8029a119 12986
da5938a2
NC		 12987 for (stub_sec = htab->stub_bfd->sections;
12988 stub_sec != NULL;
8029a119
NC		 12989 stub_sec = stub_sec->next)
12990 {
12991 /* Ignore non-stub sections. */
12992 if (!strstr (stub_sec->name, STUB_SUFFIX))
12993 continue;
da5938a2 12994
8029a119 12995 osi.sec = stub_sec;
da5938a2 12996
8029a119
NC		 12997 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12998 (output_bfd, osi.sec->output_section);
da5938a2 12999
8029a119
NC		 13000 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13001 }
13002 }
da5938a2 13003
91a5743d
PB		 13004 /* Finally, output mapping symbols for the PLT. */
13005 if (!htab->splt || htab->splt->size == 0)
13006 return TRUE;
13007
13008 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13009 htab->splt->output_section);
91a5743d 13010 osi.sec = htab->splt;
4e617b1e
PB		 13011 /* Output mapping symbols for the plt header. SymbianOS does not have a
13012 plt header. */
13013 if (htab->vxworks_p)
13014 {
13015 /* VxWorks shared libraries have no PLT header. */
13016 if (!info->shared)
13017 {
7413f23f 13018 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13019 return FALSE;
7413f23f 13020 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13021 return FALSE;
13022 }
13023 }
13024 else if (!htab->symbian_p)
13025 {
7413f23f 13026 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13027 return FALSE;
13028#ifndef FOUR_WORD_PLT
7413f23f 13029 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13030 return FALSE;
13031#endif
13032 }
13033
13034 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13035 return TRUE;
13036}
13037
e489d0ae
PB		 13038/* Allocate target specific section data. */
13039
13040static bfd_boolean
13041elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13042{
f592407e
AM		 13043 if (!sec->used_by_bfd)
13044 {
13045 _arm_elf_section_data *sdata;
13046 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13047
f592407e
AM		 13048 sdata = bfd_zalloc (abfd, amt);
13049 if (sdata == NULL)
13050 return FALSE;
13051 sec->used_by_bfd = sdata;
13052 }
e489d0ae 13053
957c6e41 13054 record_section_with_arm_elf_section_data (sec);
8e3de13a 13055
e489d0ae
PB		 13056 return _bfd_elf_new_section_hook (abfd, sec);
13057}
13058
13059
13060/* Used to order a list of mapping symbols by address. */
13061
13062static int
13063elf32_arm_compare_mapping (const void * a, const void * b)
13064{
7f6a71ff
JM		 13065 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13066 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13067
13068 if (amap->vma > bmap->vma)
13069 return 1;
13070 else if (amap->vma < bmap->vma)
13071 return -1;
13072 else if (amap->type > bmap->type)
13073 /* Ensure results do not depend on the host qsort for objects with
13074 multiple mapping symbols at the same address by sorting on type
13075 after vma. */
13076 return 1;
13077 else if (amap->type < bmap->type)
13078 return -1;
13079 else
13080 return 0;
e489d0ae
PB		 13081}
13082
2468f9c9
PB		 13083/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13084
13085static unsigned long
13086offset_prel31 (unsigned long addr, bfd_vma offset)
13087{
13088 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13089}
13090
13091/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13092 relocations. */
13093
13094static void
13095copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13096{
13097 unsigned long first_word = bfd_get_32 (output_bfd, from);
13098 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13099
13100 /* High bit of first word is supposed to be zero. */
13101 if ((first_word & 0x80000000ul) == 0)
13102 first_word = offset_prel31 (first_word, offset);
13103
13104 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13105 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13106 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13107 second_word = offset_prel31 (second_word, offset);
13108
13109 bfd_put_32 (output_bfd, first_word, to);
13110 bfd_put_32 (output_bfd, second_word, to + 4);
13111}
e489d0ae 13112
48229727
JB		 13113/* Data for make_branch_to_a8_stub(). */
13114
13115struct a8_branch_to_stub_data {
13116 asection *writing_section;
13117 bfd_byte *contents;
13118};
13119
13120
13121/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13122 places for a particular section. */
13123
13124static bfd_boolean
13125make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13126 void *in_arg)
13127{
13128 struct elf32_arm_stub_hash_entry *stub_entry;
13129 struct a8_branch_to_stub_data *data;
13130 bfd_byte *contents;
13131 unsigned long branch_insn;
13132 bfd_vma veneered_insn_loc, veneer_entry_loc;
13133 bfd_signed_vma branch_offset;
13134 bfd *abfd;
13135 unsigned int index;
13136
13137 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13138 data = (struct a8_branch_to_stub_data *) in_arg;
13139
13140 if (stub_entry->target_section != data->writing_section
13141 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13142 return TRUE;
13143
13144 contents = data->contents;
13145
13146 veneered_insn_loc = stub_entry->target_section->output_section->vma
13147 + stub_entry->target_section->output_offset
13148 + stub_entry->target_value;
13149
13150 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13151 + stub_entry->stub_sec->output_offset
13152 + stub_entry->stub_offset;
13153
13154 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13155 veneered_insn_loc &= ~3u;
13156
13157 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13158
13159 abfd = stub_entry->target_section->owner;
13160 index = stub_entry->target_value;
13161
13162 /* We attempt to avoid this condition by setting stubs_always_after_branch
13163 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13164 This check is just to be on the safe side... */
13165 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13166 {
13167 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13168 "allocated in unsafe location"), abfd);
13169 return FALSE;
13170 }
13171
13172 switch (stub_entry->stub_type)
13173 {
13174 case arm_stub_a8_veneer_b:
13175 case arm_stub_a8_veneer_b_cond:
13176 branch_insn = 0xf0009000;
13177 goto jump24;
13178
13179 case arm_stub_a8_veneer_blx:
13180 branch_insn = 0xf000e800;
13181 goto jump24;
13182
13183 case arm_stub_a8_veneer_bl:
13184 {
13185 unsigned int i1, j1, i2, j2, s;
13186
13187 branch_insn = 0xf000d000;
13188
13189 jump24:
13190 if (branch_offset < -16777216 || branch_offset > 16777214)
13191 {
13192 /* There's not much we can do apart from complain if this
13193 happens. */
13194 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13195 "of range (input file too large)"), abfd);
13196 return FALSE;
13197 }
13198
13199 /* i1 = not(j1 eor s), so:
13200 not i1 = j1 eor s
13201 j1 = (not i1) eor s. */
13202
13203 branch_insn |= (branch_offset >> 1) & 0x7ff;
13204 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13205 i2 = (branch_offset >> 22) & 1;
13206 i1 = (branch_offset >> 23) & 1;
13207 s = (branch_offset >> 24) & 1;
13208 j1 = (!i1) ^ s;
13209 j2 = (!i2) ^ s;
13210 branch_insn |= j2 << 11;
13211 branch_insn |= j1 << 13;
13212 branch_insn |= s << 26;
13213 }
13214 break;
13215
13216 default:
13217 BFD_FAIL ();
13218 return FALSE;
13219 }
13220
13221 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[index]);
13222 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[index + 2]);
13223
13224 return TRUE;
13225}
13226
e489d0ae
PB		 13227/* Do code byteswapping. Return FALSE afterwards so that the section is
13228 written out as normal. */
13229
13230static bfd_boolean
c7b8f16e 13231elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13232 struct bfd_link_info *link_info,
13233 asection *sec,
e489d0ae
PB		 13234 bfd_byte *contents)
13235{
48229727 13236 unsigned int mapcount, errcount;
8e3de13a 13237 _arm_elf_section_data *arm_data;
c7b8f16e 13238 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13239 elf32_arm_section_map *map;
c7b8f16e 13240 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13241 bfd_vma ptr;
13242 bfd_vma end;
c7b8f16e 13243 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13244 bfd_byte tmp;
48229727 13245 unsigned int i;
57e8b36a 13246
8e3de13a
NC		 13247 /* If this section has not been allocated an _arm_elf_section_data
13248 structure then we cannot record anything. */
13249 arm_data = get_arm_elf_section_data (sec);
13250 if (arm_data == NULL)
13251 return FALSE;
13252
13253 mapcount = arm_data->mapcount;
13254 map = arm_data->map;
c7b8f16e
JB		 13255 errcount = arm_data->erratumcount;
13256
13257 if (errcount != 0)
13258 {
13259 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13260
13261 for (errnode = arm_data->erratumlist; errnode != 0;
13262 errnode = errnode->next)
13263 {
13264 bfd_vma index = errnode->vma - offset;
13265
13266 switch (errnode->type)
13267 {
13268 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13269 {
13270 bfd_vma branch_to_veneer;
13271 /* Original condition code of instruction, plus bit mask for
13272 ARM B instruction. */
13273 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13274 | 0x0a000000;
13275
13276 /* The instruction is before the label. */
13277 index -= 4;
13278
13279 /* Above offset included in -4 below. */
13280 branch_to_veneer = errnode->u.b.veneer->vma
13281 - errnode->vma - 4;
13282
13283 if ((signed) branch_to_veneer < -(1 << 25)
13284 || (signed) branch_to_veneer >= (1 << 25))
13285 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13286 "range"), output_bfd);
13287
13288 insn |= (branch_to_veneer >> 2) & 0xffffff;
13289 contents[endianflip ^ index] = insn & 0xff;
13290 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13291 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13292 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13293 }
13294 break;
13295
13296 case VFP11_ERRATUM_ARM_VENEER:
13297 {
13298 bfd_vma branch_from_veneer;
13299 unsigned int insn;
13300
13301 /* Take size of veneer into account. */
13302 branch_from_veneer = errnode->u.v.branch->vma
13303 - errnode->vma - 12;
13304
13305 if ((signed) branch_from_veneer < -(1 << 25)
13306 || (signed) branch_from_veneer >= (1 << 25))
13307 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13308 "range"), output_bfd);
13309
13310 /* Original instruction. */
13311 insn = errnode->u.v.branch->u.b.vfp_insn;
13312 contents[endianflip ^ index] = insn & 0xff;
13313 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13314 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13315 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13316
13317 /* Branch back to insn after original insn. */
13318 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13319 contents[endianflip ^ (index + 4)] = insn & 0xff;
13320 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
13321 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
13322 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
13323 }
13324 break;
13325
13326 default:
13327 abort ();
13328 }
13329 }
13330 }
e489d0ae 13331
2468f9c9
PB		 13332 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13333 {
13334 arm_unwind_table_edit *edit_node
13335 = arm_data->u.exidx.unwind_edit_list;
13336 /* Now, sec->size is the size of the section we will write. The original
13337 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13338 markers) was sec->rawsize. (This isn't the case if we perform no
13339 edits, then rawsize will be zero and we should use size). */
13340 bfd_byte *edited_contents = bfd_malloc (sec->size);
13341 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13342 unsigned int in_index, out_index;
13343 bfd_vma add_to_offsets = 0;
13344
13345 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13346 {
13347 if (edit_node)
13348 {
13349 unsigned int edit_index = edit_node->index;
13350
13351 if (in_index < edit_index && in_index * 8 < input_size)
13352 {
13353 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13354 contents + in_index * 8, add_to_offsets);
13355 out_index++;
13356 in_index++;
13357 }
13358 else if (in_index == edit_index
13359 || (in_index * 8 >= input_size
13360 && edit_index == UINT_MAX))
13361 {
13362 switch (edit_node->type)
13363 {
13364 case DELETE_EXIDX_ENTRY:
13365 in_index++;
13366 add_to_offsets += 8;
13367 break;
13368
13369 case INSERT_EXIDX_CANTUNWIND_AT_END:
13370 {
13371 asection *text_sec = edit_node->linked_section;
13372 bfd_vma text_offset = text_sec->output_section->vma
13373 + text_sec->output_offset
13374 + text_sec->size;
13375 bfd_vma exidx_offset = offset + out_index * 8;
13376 unsigned long prel31_offset;
13377
13378 /* Note: this is meant to be equivalent to an
13379 R_ARM_PREL31 relocation. These synthetic
13380 EXIDX_CANTUNWIND markers are not relocated by the
13381 usual BFD method. */
13382 prel31_offset = (text_offset - exidx_offset)
13383 & 0x7ffffffful;
13384
13385 /* First address we can't unwind. */
13386 bfd_put_32 (output_bfd, prel31_offset,
13387 &edited_contents[out_index * 8]);
13388
13389 /* Code for EXIDX_CANTUNWIND. */
13390 bfd_put_32 (output_bfd, 0x1,
13391 &edited_contents[out_index * 8 + 4]);
13392
13393 out_index++;
13394 add_to_offsets -= 8;
13395 }
13396 break;
13397 }
13398
13399 edit_node = edit_node->next;
13400 }
13401 }
13402 else
13403 {
13404 /* No more edits, copy remaining entries verbatim. */
13405 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13406 contents + in_index * 8, add_to_offsets);
13407 out_index++;
13408 in_index++;
13409 }
13410 }
13411
13412 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13413 bfd_set_section_contents (output_bfd, sec->output_section,
13414 edited_contents,
13415 (file_ptr) sec->output_offset, sec->size);
13416
13417 return TRUE;
13418 }
13419
48229727
JB		 13420 /* Fix code to point to Cortex-A8 erratum stubs. */
13421 if (globals->fix_cortex_a8)
13422 {
13423 struct a8_branch_to_stub_data data;
13424
13425 data.writing_section = sec;
13426 data.contents = contents;
13427
13428 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13429 &data);
13430 }
13431
e489d0ae
PB		 13432 if (mapcount == 0)
13433 return FALSE;
13434
c7b8f16e 13435 if (globals->byteswap_code)
e489d0ae 13436 {
c7b8f16e 13437 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13438
c7b8f16e
JB		 13439 ptr = map[0].vma;
13440 for (i = 0; i < mapcount; i++)
13441 {
13442 if (i == mapcount - 1)
13443 end = sec->size;
13444 else
13445 end = map[i + 1].vma;
e489d0ae 13446
c7b8f16e 13447 switch (map[i].type)
e489d0ae 13448 {
c7b8f16e
JB		 13449 case 'a':
13450 /* Byte swap code words. */
13451 while (ptr + 3 < end)
13452 {
13453 tmp = contents[ptr];
13454 contents[ptr] = contents[ptr + 3];
13455 contents[ptr + 3] = tmp;
13456 tmp = contents[ptr + 1];
13457 contents[ptr + 1] = contents[ptr + 2];
13458 contents[ptr + 2] = tmp;
13459 ptr += 4;
13460 }
13461 break;
e489d0ae 13462
c7b8f16e
JB		 13463 case 't':
13464 /* Byte swap code halfwords. */
13465 while (ptr + 1 < end)
13466 {
13467 tmp = contents[ptr];
13468 contents[ptr] = contents[ptr + 1];
13469 contents[ptr + 1] = tmp;
13470 ptr += 2;
13471 }
13472 break;
13473
13474 case 'd':
13475 /* Leave data alone. */
13476 break;
13477 }
13478 ptr = end;
13479 }
e489d0ae 13480 }
8e3de13a 13481
93204d3a 13482 free (map);
8e3de13a 13483 arm_data->mapcount = 0;
c7b8f16e 13484 arm_data->mapsize = 0;
8e3de13a
NC		 13485 arm_data->map = NULL;
13486 unrecord_section_with_arm_elf_section_data (sec);
13487
e489d0ae
PB		 13488 return FALSE;
13489}
13490
957c6e41
NC		 13491static void
13492unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13493 asection * sec,
13494 void * ignore ATTRIBUTE_UNUSED)
13495{
13496 unrecord_section_with_arm_elf_section_data (sec);
13497}
13498
13499static bfd_boolean
13500elf32_arm_close_and_cleanup (bfd * abfd)
13501{
b25e3d87
L		 13502 if (abfd->sections)
13503 bfd_map_over_sections (abfd,
13504 unrecord_section_via_map_over_sections,
13505 NULL);
957c6e41
NC		 13506
13507 return _bfd_elf_close_and_cleanup (abfd);
13508}
13509
b25e3d87
L		 13510static bfd_boolean
13511elf32_arm_bfd_free_cached_info (bfd * abfd)
13512{
13513 if (abfd->sections)
13514 bfd_map_over_sections (abfd,
13515 unrecord_section_via_map_over_sections,
13516 NULL);
13517
13518 return _bfd_free_cached_info (abfd);
13519}
13520
b7693d02
DJ		 13521/* Display STT_ARM_TFUNC symbols as functions. */
13522
13523static void
13524elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13525 asymbol *asym)
13526{
13527 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13528
13529 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13530 elfsym->symbol.flags |= BSF_FUNCTION;
13531}
13532
0beaef2b
PB		 13533
13534/* Mangle thumb function symbols as we read them in. */
13535
8384fb8f 13536static bfd_boolean
0beaef2b
PB		 13537elf32_arm_swap_symbol_in (bfd * abfd,
13538 const void *psrc,
13539 const void *pshn,
13540 Elf_Internal_Sym *dst)
13541{
8384fb8f
AM		 13542 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13543 return FALSE;
0beaef2b
PB		 13544
13545 /* New EABI objects mark thumb function symbols by setting the low bit of
13546 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13547 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13548 && (dst->st_value & 1))
13549 {
13550 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13551 dst->st_value &= ~(bfd_vma) 1;
13552 }
8384fb8f 13553 return TRUE;
0beaef2b
PB		 13554}
13555
13556
13557/* Mangle thumb function symbols as we write them out. */
13558
13559static void
13560elf32_arm_swap_symbol_out (bfd *abfd,
13561 const Elf_Internal_Sym *src,
13562 void *cdst,
13563 void *shndx)
13564{
13565 Elf_Internal_Sym newsym;
13566
13567 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13568 of the address set, as per the new EABI. We do this unconditionally
13569 because objcopy does not set the elf header flags until after
13570 it writes out the symbol table. */
13571 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13572 {
13573 newsym = *src;
13574 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13575 if (newsym.st_shndx != SHN_UNDEF)
13576 {
13577 /* Do this only for defined symbols. At link type, the static
13578 linker will simulate the work of dynamic linker of resolving
13579 symbols and will carry over the thumbness of found symbols to
13580 the output symbol table. It's not clear how it happens, but
b0fead2b 13581 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13582 runtime, and writing '1' for them will be confusing for users
13583 and possibly for dynamic linker itself.
13584 */
13585 newsym.st_value |= 1;
13586 }
906e58ca 13587
0beaef2b
PB		 13588 src = &newsym;
13589 }
13590 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13591}
13592
b294bdf8
MM		 13593/* Add the PT_ARM_EXIDX program header. */
13594
13595static bfd_boolean
906e58ca 13596elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13597 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13598{
13599 struct elf_segment_map *m;
13600 asection *sec;
13601
13602 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13603 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13604 {
13605 /* If there is already a PT_ARM_EXIDX header, then we do not
13606 want to add another one. This situation arises when running
13607 "strip"; the input binary already has the header. */
13608 m = elf_tdata (abfd)->segment_map;
13609 while (m && m->p_type != PT_ARM_EXIDX)
13610 m = m->next;
13611 if (!m)
13612 {
13613 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13614 if (m == NULL)
13615 return FALSE;
13616 m->p_type = PT_ARM_EXIDX;
13617 m->count = 1;
13618 m->sections[0] = sec;
13619
13620 m->next = elf_tdata (abfd)->segment_map;
13621 elf_tdata (abfd)->segment_map = m;
13622 }
13623 }
13624
13625 return TRUE;
13626}
13627
13628/* We may add a PT_ARM_EXIDX program header. */
13629
13630static int
a6b96beb
AM		 13631elf32_arm_additional_program_headers (bfd *abfd,
13632 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13633{
13634 asection *sec;
13635
13636 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13637 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13638 return 1;
13639 else
13640 return 0;
13641}
13642
fcb93ecf 13643/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13644
fcb93ecf
PB		 13645static bfd_boolean
13646elf32_arm_is_function_type (unsigned int type)
13647{
0f88be7a 13648 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13649}
13650
0beaef2b 13651/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13652const struct elf_size_info elf32_arm_size_info =
13653{
0beaef2b
PB		 13654 sizeof (Elf32_External_Ehdr),
13655 sizeof (Elf32_External_Phdr),
13656 sizeof (Elf32_External_Shdr),
13657 sizeof (Elf32_External_Rel),
13658 sizeof (Elf32_External_Rela),
13659 sizeof (Elf32_External_Sym),
13660 sizeof (Elf32_External_Dyn),
13661 sizeof (Elf_External_Note),
13662 4,
13663 1,
13664 32, 2,
13665 ELFCLASS32, EV_CURRENT,
13666 bfd_elf32_write_out_phdrs,
13667 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13668 bfd_elf32_checksum_contents,
0beaef2b
PB		 13669 bfd_elf32_write_relocs,
13670 elf32_arm_swap_symbol_in,
13671 elf32_arm_swap_symbol_out,
13672 bfd_elf32_slurp_reloc_table,
13673 bfd_elf32_slurp_symbol_table,
13674 bfd_elf32_swap_dyn_in,
13675 bfd_elf32_swap_dyn_out,
13676 bfd_elf32_swap_reloc_in,
13677 bfd_elf32_swap_reloc_out,
13678 bfd_elf32_swap_reloca_in,
13679 bfd_elf32_swap_reloca_out
13680};
13681
252b5132
RH		 13682#define ELF_ARCH bfd_arch_arm
13683#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13684#ifdef __QNXTARGET__
13685#define ELF_MAXPAGESIZE 0x1000
13686#else
f21f3fe0 13687#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13688#endif
b1342370 13689#define ELF_MINPAGESIZE 0x1000
24718e3b 13690#define ELF_COMMONPAGESIZE 0x1000
252b5132 13691
ba93b8ac
DJ		 13692#define bfd_elf32_mkobject elf32_arm_mkobject
13693
99e4ae17
AJ		 13694#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13695#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13696#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13697#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13698#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13699#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13700#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13701#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13702#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13703#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13704#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13705#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13706#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13707#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13708#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13709
13710#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13711#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13712#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13713#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13714#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13715#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13716#define elf_backend_write_section elf32_arm_write_section
252b5132 13717#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13718#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13719#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13720#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13721#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13722#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13723#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13724#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13725#define elf_backend_object_p elf32_arm_object_p
e16bb312 13726#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13727#define elf_backend_fake_sections elf32_arm_fake_sections
13728#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13729#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13730#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13731#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13732#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13733#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13734#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13735#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13736#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13737#define elf_backend_is_function_type elf32_arm_is_function_type
13738
13739#define elf_backend_can_refcount 1
13740#define elf_backend_can_gc_sections 1
13741#define elf_backend_plt_readonly 1
13742#define elf_backend_want_got_plt 1
13743#define elf_backend_want_plt_sym 0
13744#define elf_backend_may_use_rel_p 1
13745#define elf_backend_may_use_rela_p 0
4e7fd91e 13746#define elf_backend_default_use_rela_p 0
252b5132 13747
04f7c78d 13748#define elf_backend_got_header_size 12
04f7c78d 13749
906e58ca
NC		 13750#undef elf_backend_obj_attrs_vendor
13751#define elf_backend_obj_attrs_vendor "aeabi"
13752#undef elf_backend_obj_attrs_section
13753#define elf_backend_obj_attrs_section ".ARM.attributes"
13754#undef elf_backend_obj_attrs_arg_type
13755#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13756#undef elf_backend_obj_attrs_section_type
104d59d1 13757#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13758#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13759
252b5132 13760#include "elf32-target.h"
7f266840 13761
906e58ca 13762/* VxWorks Targets. */
4e7fd91e 13763
906e58ca 13764#undef TARGET_LITTLE_SYM
4e7fd91e 13765#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13766#undef TARGET_LITTLE_NAME
4e7fd91e 13767#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13768#undef TARGET_BIG_SYM
4e7fd91e 13769#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13770#undef TARGET_BIG_NAME
4e7fd91e
PB		 13771#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13772
13773/* Like elf32_arm_link_hash_table_create -- but overrides
13774 appropriately for VxWorks. */
906e58ca 13775
4e7fd91e
PB		 13776static struct bfd_link_hash_table *
13777elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13778{
13779 struct bfd_link_hash_table *ret;
13780
13781 ret = elf32_arm_link_hash_table_create (abfd);
13782 if (ret)
13783 {
13784 struct elf32_arm_link_hash_table *htab
00a97672 13785 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13786 htab->use_rel = 0;
00a97672 13787 htab->vxworks_p = 1;
4e7fd91e
PB		 13788 }
13789 return ret;
906e58ca 13790}
4e7fd91e 13791
00a97672
RS		 13792static void
13793elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13794{
13795 elf32_arm_final_write_processing (abfd, linker);
13796 elf_vxworks_final_write_processing (abfd, linker);
13797}
13798
906e58ca 13799#undef elf32_bed
4e7fd91e
PB		 13800#define elf32_bed elf32_arm_vxworks_bed
13801
906e58ca
NC		 13802#undef bfd_elf32_bfd_link_hash_table_create
13803#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13804#undef elf_backend_add_symbol_hook
13805#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13806#undef elf_backend_final_write_processing
13807#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13808#undef elf_backend_emit_relocs
13809#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13810
906e58ca 13811#undef elf_backend_may_use_rel_p
00a97672 13812#define elf_backend_may_use_rel_p 0
906e58ca 13813#undef elf_backend_may_use_rela_p
00a97672 13814#define elf_backend_may_use_rela_p 1
906e58ca 13815#undef elf_backend_default_use_rela_p
00a97672 13816#define elf_backend_default_use_rela_p 1
906e58ca 13817#undef elf_backend_want_plt_sym
00a97672 13818#define elf_backend_want_plt_sym 1
906e58ca 13819#undef ELF_MAXPAGESIZE
00a97672 13820#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13821
13822#include "elf32-target.h"
13823
13824
906e58ca 13825/* Symbian OS Targets. */
7f266840 13826
906e58ca 13827#undef TARGET_LITTLE_SYM
7f266840 13828#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 13829#undef TARGET_LITTLE_NAME
7f266840 13830#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 13831#undef TARGET_BIG_SYM
7f266840 13832#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 13833#undef TARGET_BIG_NAME
7f266840
DJ		 13834#define TARGET_BIG_NAME "elf32-bigarm-symbian"
13835
13836/* Like elf32_arm_link_hash_table_create -- but overrides
13837 appropriately for Symbian OS. */
906e58ca 13838
7f266840
DJ		 13839static struct bfd_link_hash_table *
13840elf32_arm_symbian_link_hash_table_create (bfd *abfd)
13841{
13842 struct bfd_link_hash_table *ret;
13843
13844 ret = elf32_arm_link_hash_table_create (abfd);
13845 if (ret)
13846 {
13847 struct elf32_arm_link_hash_table *htab
13848 = (struct elf32_arm_link_hash_table *)ret;
13849 /* There is no PLT header for Symbian OS. */
13850 htab->plt_header_size = 0;
95720a86
DJ		 13851 /* The PLT entries are each one instruction and one word. */
13852 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 13853 htab->symbian_p = 1;
33bfe774
JB		 13854 /* Symbian uses armv5t or above, so use_blx is always true. */
13855 htab->use_blx = 1;
67687978 13856 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 13857 }
13858 return ret;
906e58ca 13859}
7f266840 13860
b35d266b 13861static const struct bfd_elf_special_section
551b43fd 13862elf32_arm_symbian_special_sections[] =
7f266840 13863{
5cd3778d
MM		 13864 /* In a BPABI executable, the dynamic linking sections do not go in
13865 the loadable read-only segment. The post-linker may wish to
13866 refer to these sections, but they are not part of the final
13867 program image. */
0112cd26
NC		 13868 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
13869 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
13870 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
13871 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
13872 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 13873 /* These sections do not need to be writable as the SymbianOS
13874 postlinker will arrange things so that no dynamic relocation is
13875 required. */
0112cd26
NC		 13876 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
13877 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
13878 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
13879 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 13880};
13881
c3c76620 13882static void
906e58ca 13883elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 13884 struct bfd_link_info *link_info)
c3c76620
MM		 13885{
13886 /* BPABI objects are never loaded directly by an OS kernel; they are
13887 processed by a postlinker first, into an OS-specific format. If
13888 the D_PAGED bit is set on the file, BFD will align segments on
13889 page boundaries, so that an OS can directly map the file. With
13890 BPABI objects, that just results in wasted space. In addition,
13891 because we clear the D_PAGED bit, map_sections_to_segments will
13892 recognize that the program headers should not be mapped into any
13893 loadable segment. */
13894 abfd->flags &= ~D_PAGED;
906e58ca 13895 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 13896}
7f266840
DJ		 13897
13898static bfd_boolean
906e58ca 13899elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 13900 struct bfd_link_info *info)
7f266840
DJ		 13901{
13902 struct elf_segment_map *m;
13903 asection *dynsec;
13904
7f266840
DJ		 13905 /* BPABI shared libraries and executables should have a PT_DYNAMIC
13906 segment. However, because the .dynamic section is not marked
13907 with SEC_LOAD, the generic ELF code will not create such a
13908 segment. */
13909 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
13910 if (dynsec)
13911 {
8ded5a0f
AM		 13912 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
13913 if (m->p_type == PT_DYNAMIC)
13914 break;
13915
13916 if (m == NULL)
13917 {
13918 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
13919 m->next = elf_tdata (abfd)->segment_map;
13920 elf_tdata (abfd)->segment_map = m;
13921 }
7f266840
DJ		 13922 }
13923
b294bdf8
MM		 13924 /* Also call the generic arm routine. */
13925 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 13926}
13927
95720a86
DJ		 13928/* Return address for Ith PLT stub in section PLT, for relocation REL
13929 or (bfd_vma) -1 if it should not be included. */
13930
13931static bfd_vma
13932elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
13933 const arelent *rel ATTRIBUTE_UNUSED)
13934{
13935 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
13936}
13937
13938
8029a119 13939#undef elf32_bed
7f266840
DJ		 13940#define elf32_bed elf32_arm_symbian_bed
13941
13942/* The dynamic sections are not allocated on SymbianOS; the postlinker
13943 will process them and then discard them. */
906e58ca 13944#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 13945#define ELF_DYNAMIC_SEC_FLAGS \
13946 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
13947
00a97672 13948#undef elf_backend_add_symbol_hook
00a97672 13949#undef elf_backend_emit_relocs
c3c76620 13950
906e58ca
NC		 13951#undef bfd_elf32_bfd_link_hash_table_create
13952#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
13953#undef elf_backend_special_sections
13954#define elf_backend_special_sections elf32_arm_symbian_special_sections
13955#undef elf_backend_begin_write_processing
13956#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
13957#undef elf_backend_final_write_processing
13958#define elf_backend_final_write_processing elf32_arm_final_write_processing
13959
13960#undef elf_backend_modify_segment_map
7f266840
DJ		 13961#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
13962
13963/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 13964#undef elf_backend_got_header_size
7f266840
DJ		 13965#define elf_backend_got_header_size 0
13966
13967/* Similarly, there is no .got.plt section. */
906e58ca 13968#undef elf_backend_want_got_plt
7f266840
DJ		 13969#define elf_backend_want_got_plt 0
13970
906e58ca 13971#undef elf_backend_plt_sym_val
95720a86
DJ		 13972#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
13973
906e58ca 13974#undef elf_backend_may_use_rel_p
00a97672 13975#define elf_backend_may_use_rel_p 1
906e58ca 13976#undef elf_backend_may_use_rela_p
00a97672 13977#define elf_backend_may_use_rela_p 0
906e58ca 13978#undef elf_backend_default_use_rela_p
00a97672 13979#define elf_backend_default_use_rela_p 0
906e58ca 13980#undef elf_backend_want_plt_sym
00a97672 13981#define elf_backend_want_plt_sym 0
906e58ca 13982#undef ELF_MAXPAGESIZE
00a97672 13983#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 13984
7f266840 13985#include "elf32-target.h"
GDB Binutils - Deliverables
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