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Rename "set debug coff_pe_read" command to "set debug coff-pe-read".
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
1d7e9d18 3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
6034aab8 26#include "bfd_stdint.h"
00a97672 27#include "libiberty.h"
7f266840
DJ		 28#include "libbfd.h"
29#include "elf-bfd.h"
b38cadfb 30#include "elf-nacl.h"
00a97672 31#include "elf-vxworks.h"
ee065d83 32#include "elf/arm.h"
7f266840 33
00a97672
RS		 34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ		 60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
79f08007
YZ		 66/* The Adjusted Place, as defined by AAELF. */
67#define Pa(X) ((X) & 0xfffffffc)
68
3e6b1042
DJ		 69static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
7f266840
DJ		 74/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
c19d1205 78static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 79{
8029a119 80 /* No relocation. */
7f266840
DJ		 81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 0, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 FALSE, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 FALSE), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 TRUE, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 FALSE, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 TRUE, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE), /* pcrel_offset */
138
c19d1205 139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 140 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 143 32, /* bitsize */
144 TRUE, /* pc_relative */
7f266840 145 0, /* bitpos */
4962c51a 146 complain_overflow_dont,/* complain_on_overflow */
7f266840 147 bfd_elf_generic_reloc, /* special_function */
4962c51a 148 "R_ARM_LDR_PC_G0", /* name */
7f266840 149 FALSE, /* partial_inplace */
4962c51a
MS		 150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE), /* pcrel_offset */
7f266840
DJ		 153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 FALSE, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 FALSE, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE, /* partial_inplace */
00a97672
RS		 180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
7f266840
DJ		 182 FALSE), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 FALSE, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 FALSE, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 FALSE, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE), /* pcrel_offset */
226
c19d1205 227 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 230 24, /* bitsize */
7f266840
DJ		 231 TRUE, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
c19d1205 235 "R_ARM_THM_CALL", /* name */
7f266840 236 FALSE, /* partial_inplace */
7f6ab9f8
AM		 237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
7f266840
DJ		 239 TRUE), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 TRUE, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE), /* pcrel_offset */
254
c19d1205 255 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 258 32, /* bitsize */
259 FALSE, /* pc_relative */
7f266840
DJ		 260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
c19d1205 263 "R_ARM_BREL_ADJ", /* name */
7f266840 264 FALSE, /* partial_inplace */
c19d1205
ZW		 265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE), /* pcrel_offset */
7f266840 268
0855e32b 269 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 270 0, /* rightshift */
0855e32b
NS		 271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
7f266840
DJ		 273 FALSE, /* pc_relative */
274 0, /* bitpos */
0855e32b 275 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 276 bfd_elf_generic_reloc, /* special_function */
0855e32b 277 "R_ARM_TLS_DESC", /* name */
7f266840 278 FALSE, /* partial_inplace */
0855e32b
NS		 279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
7f266840
DJ		 281 FALSE), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 FALSE, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 301 24, /* bitsize */
7f266840
DJ		 302 TRUE, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 316 24, /* bitsize */
7f266840
DJ		 317 TRUE, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE, /* partial_inplace */
7f6ab9f8
AM		 323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
7f266840
DJ		 325 TRUE), /* pcrel_offset */
326
ba93b8ac 327 /* Dynamic TLS relocations. */
7f266840 328
ba93b8ac
DJ		 329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 FALSE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE), /* pcrel_offset */
7f266840 342
ba93b8ac
DJ		 343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 FALSE, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE), /* pcrel_offset */
7f266840 356
ba93b8ac
DJ		 357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 FALSE, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE), /* pcrel_offset */
7f266840
DJ		 370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 FALSE, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 FALSE, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 FALSE, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 FALSE, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE), /* pcrel_offset */
428
c19d1205 429 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 FALSE, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
c19d1205 437 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 438 TRUE, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 TRUE, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 FALSE, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 474 24, /* bitsize */
7f266840
DJ		 475 TRUE, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
ce490eda 480 FALSE, /* partial_inplace */
7f266840
DJ		 481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 TRUE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 TRUE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE), /* pcrel_offset */
512
c19d1205
ZW		 513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 TRUE, /* pc_relative */
7f266840 518 0, /* bitpos */
c19d1205 519 complain_overflow_signed,/* complain_on_overflow */
7f266840 520 bfd_elf_generic_reloc, /* special_function */
c19d1205 521 "R_ARM_THM_JUMP24", /* name */
7f266840 522 FALSE, /* partial_inplace */
c19d1205
ZW		 523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE), /* pcrel_offset */
7f266840 526
c19d1205 527 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 528 0, /* rightshift */
c19d1205
ZW		 529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
7f266840
DJ		 531 FALSE, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
c19d1205 535 "R_ARM_BASE_ABS", /* name */
7f266840 536 FALSE, /* partial_inplace */
c19d1205
ZW		 537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
7f266840
DJ		 539 FALSE), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 TRUE, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 TRUE, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 TRUE, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 FALSE, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 FALSE, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 FALSE, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 FALSE, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 FALSE, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 FALSE, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 TRUE, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE), /* pcrel_offset */
c19d1205
ZW		 694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 FALSE, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE, /* partial_inplace */
39623e12
PB		 705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
c19d1205
ZW		 707 FALSE), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 FALSE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE, /* partial_inplace */
39623e12
PB		 719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
c19d1205
ZW		 721 FALSE), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 TRUE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE, /* partial_inplace */
39623e12
PB		 733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
c19d1205
ZW		 735 TRUE), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 TRUE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE, /* partial_inplace */
39623e12
PB		 747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
c19d1205
ZW		 749 TRUE), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 TRUE, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 TRUE, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 TRUE, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 TRUE, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 TRUE, /* pc_relative */
843 0, /* bitpos */
2cab6cc3 844 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE, /* partial_inplace */
2cab6cc3
MS		 848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
c19d1205
ZW		 850 TRUE), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 TRUE, /* pc_relative */
857 0, /* bitpos */
2cab6cc3 858 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE, /* partial_inplace */
2cab6cc3
MS		 862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
c19d1205
ZW		 864 TRUE), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 FALSE, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 TRUE, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE), /* pcrel_offset */
7f266840 893
4962c51a
MS		 894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 TRUE, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 TRUE, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 TRUE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 TRUE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 TRUE, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 TRUE, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 TRUE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 TRUE, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 TRUE, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 TRUE, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 TRUE, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 TRUE, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 TRUE, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 TRUE, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 TRUE, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 TRUE, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 TRUE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 TRUE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 TRUE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 TRUE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 TRUE, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 TRUE, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 TRUE, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 TRUE, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 TRUE, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 TRUE, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE), /* pcrel_offset */
1273
1274 /* End of group relocations. */
c19d1205 1275
c19d1205
ZW		 1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 FALSE, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 FALSE, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 FALSE, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 FALSE, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 FALSE, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
0855e32b
NS		 1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_bitfield,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
c19d1205
ZW		 1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 TRUE, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 FALSE, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 FALSE, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1492 0, /* bitsize */
ba93b8ac
DJ		 1493 FALSE, /* pc_relative */
1494 0, /* bitpos */
c19d1205
ZW		 1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 FALSE), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 FALSE), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 TRUE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 TRUE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE), /* pcrel_offset */
ba93b8ac 1545
c19d1205
ZW		 1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
c19d1205 1559 FALSE), /* pcrel_offset */
ba93b8ac 1560
ba93b8ac
DJ		 1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 FALSE, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
c19d1205 1573 FALSE), /* pcrel_offset */
ba93b8ac 1574
c19d1205 1575 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 FALSE, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1584 TRUE, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
c19d1205 1587 FALSE), /* pcrel_offset */
ba93b8ac 1588
ba93b8ac
DJ		 1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 FALSE, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
c19d1205 1601 FALSE), /* pcrel_offset */
7f266840 1602
c19d1205 1603 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1606 32, /* bitsize */
7f266840
DJ		 1607 FALSE, /* pc_relative */
1608 0, /* bitpos */
c19d1205
ZW		 1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 bfd_elf_generic_reloc, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE), /* pcrel_offset */
7f266840 1616
c19d1205
ZW		 1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 FALSE, /* pc_relative */
7f266840 1622 0, /* bitpos */
c19d1205 1623 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1624 bfd_elf_generic_reloc, /* special_function */
c19d1205 1625 "R_ARM_TLS_LDO12", /* name */
7f266840 1626 FALSE, /* partial_inplace */
c19d1205
ZW		 1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE), /* pcrel_offset */
7f266840 1630
c19d1205
ZW		 1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 FALSE, /* pc_relative */
7f266840 1636 0, /* bitpos */
c19d1205 1637 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1638 bfd_elf_generic_reloc, /* special_function */
c19d1205 1639 "R_ARM_TLS_LE12", /* name */
7f266840 1640 FALSE, /* partial_inplace */
c19d1205
ZW		 1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE), /* pcrel_offset */
7f266840 1644
c19d1205 1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1648 12, /* bitsize */
1649 FALSE, /* pc_relative */
7f266840 1650 0, /* bitpos */
c19d1205 1651 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1652 bfd_elf_generic_reloc, /* special_function */
c19d1205 1653 "R_ARM_TLS_IE12GP", /* name */
7f266840 1654 FALSE, /* partial_inplace */
c19d1205
ZW		 1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE), /* pcrel_offset */
0855e32b 1658
34e77a92 1659 /* 112-127 private relocations. */
0855e32b
NS		 1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
34e77a92
RS		 1676
1677 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 FALSE, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_bitfield,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE), /* pcrel_offset */
c19d1205
ZW		 1693};
1694
34e77a92
RS		 1695/* 160 onwards: */
1696static reloc_howto_type elf32_arm_howto_table_2[1] =
1697{
1698 HOWTO (R_ARM_IRELATIVE, /* type */
1699 0, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 32, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_bitfield,/* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_ARM_IRELATIVE", /* name */
1707 TRUE, /* partial_inplace */
1708 0xffffffff, /* src_mask */
1709 0xffffffff, /* dst_mask */
1710 FALSE) /* pcrel_offset */
1711};
c19d1205 1712
34e77a92
RS		 1713/* 249-255 extended, currently unused, relocations: */
1714static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1715{
1716 HOWTO (R_ARM_RREL32, /* type */
1717 0, /* rightshift */
1718 0, /* size (0 = byte, 1 = short, 2 = long) */
1719 0, /* bitsize */
1720 FALSE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_dont,/* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_ARM_RREL32", /* name */
1725 FALSE, /* partial_inplace */
1726 0, /* src_mask */
1727 0, /* dst_mask */
1728 FALSE), /* pcrel_offset */
1729
1730 HOWTO (R_ARM_RABS32, /* type */
1731 0, /* rightshift */
1732 0, /* size (0 = byte, 1 = short, 2 = long) */
1733 0, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_dont,/* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 "R_ARM_RABS32", /* name */
1739 FALSE, /* partial_inplace */
1740 0, /* src_mask */
1741 0, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 HOWTO (R_ARM_RPC24, /* type */
1745 0, /* rightshift */
1746 0, /* size (0 = byte, 1 = short, 2 = long) */
1747 0, /* bitsize */
1748 FALSE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_dont,/* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_ARM_RPC24", /* name */
1753 FALSE, /* partial_inplace */
1754 0, /* src_mask */
1755 0, /* dst_mask */
1756 FALSE), /* pcrel_offset */
1757
1758 HOWTO (R_ARM_RBASE, /* type */
1759 0, /* rightshift */
1760 0, /* size (0 = byte, 1 = short, 2 = long) */
1761 0, /* bitsize */
1762 FALSE, /* pc_relative */
1763 0, /* bitpos */
1764 complain_overflow_dont,/* complain_on_overflow */
1765 bfd_elf_generic_reloc, /* special_function */
1766 "R_ARM_RBASE", /* name */
1767 FALSE, /* partial_inplace */
1768 0, /* src_mask */
1769 0, /* dst_mask */
1770 FALSE) /* pcrel_offset */
1771};
1772
1773static reloc_howto_type *
1774elf32_arm_howto_from_type (unsigned int r_type)
1775{
906e58ca 1776 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1777 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1778
34e77a92
RS		 1779 if (r_type == R_ARM_IRELATIVE)
1780 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1781
c19d1205 1782 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1783 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1784 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1785
c19d1205 1786 return NULL;
7f266840
DJ		 1787}
1788
1789static void
1790elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1791 Elf_Internal_Rela * elf_reloc)
1792{
1793 unsigned int r_type;
1794
1795 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1796 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1797}
1798
1799struct elf32_arm_reloc_map
1800 {
1801 bfd_reloc_code_real_type bfd_reloc_val;
1802 unsigned char elf_reloc_val;
1803 };
1804
1805/* All entries in this list must also be present in elf32_arm_howto_table. */
1806static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1807 {
1808 {BFD_RELOC_NONE, R_ARM_NONE},
1809 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1810 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1811 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1812 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1813 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1814 {BFD_RELOC_32, R_ARM_ABS32},
1815 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1816 {BFD_RELOC_8, R_ARM_ABS8},
1817 {BFD_RELOC_16, R_ARM_ABS16},
1818 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1819 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1820 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1825 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1826 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1827 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1828 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1829 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1830 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1831 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1832 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1833 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1834 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1835 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1836 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1837 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1838 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1839 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1840 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1841 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1842 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1843 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1845 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1846 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1847 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1848 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1849 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1850 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1851 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1852 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1853 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1854 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1855 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1856 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1857 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1858 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1859 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1860 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1861 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1862 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1863 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1864 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1865 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1866 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1867 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1868 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1869 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1870 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1871 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1872 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1873 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1874 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1875 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1876 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1877 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1878 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1879 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1880 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1881 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1882 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1883 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1884 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1885 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1886 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1887 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1888 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1889 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1890 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1891 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1892 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1893 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1894 };
1895
1896static reloc_howto_type *
f1c71a59
ZW		 1897elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1898 bfd_reloc_code_real_type code)
7f266840
DJ		 1899{
1900 unsigned int i;
8029a119 1901
906e58ca 1902 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1903 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1904 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1905
c19d1205 1906 return NULL;
7f266840
DJ		 1907}
1908
157090f7
AM		 1909static reloc_howto_type *
1910elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1911 const char *r_name)
1912{
1913 unsigned int i;
1914
906e58ca 1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1916 if (elf32_arm_howto_table_1[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_1[i];
1919
906e58ca 1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1921 if (elf32_arm_howto_table_2[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_2[i];
1924
34e77a92
RS		 1925 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1926 if (elf32_arm_howto_table_3[i].name != NULL
1927 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1928 return &elf32_arm_howto_table_3[i];
1929
157090f7
AM		 1930 return NULL;
1931}
1932
906e58ca
NC		 1933/* Support for core dump NOTE sections. */
1934
7f266840 1935static bfd_boolean
f1c71a59 1936elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1937{
1938 int offset;
1939 size_t size;
1940
1941 switch (note->descsz)
1942 {
1943 default:
1944 return FALSE;
1945
8029a119 1946 case 148: /* Linux/ARM 32-bit. */
7f266840 1947 /* pr_cursig */
228e534f 1948 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
7f266840
DJ		 1949
1950 /* pr_pid */
228e534f 1951 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1952
1953 /* pr_reg */
1954 offset = 72;
1955 size = 72;
1956
1957 break;
1958 }
1959
1960 /* Make a ".reg/999" section. */
1961 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1962 size, note->descpos + offset);
1963}
1964
1965static bfd_boolean
f1c71a59 1966elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1967{
1968 switch (note->descsz)
1969 {
1970 default:
1971 return FALSE;
1972
8029a119 1973 case 124: /* Linux/ARM elf_prpsinfo. */
228e534f 1974 elf_tdata (abfd)->core->pid
4395ee08 1975 = bfd_get_32 (abfd, note->descdata + 12);
228e534f 1976 elf_tdata (abfd)->core->program
7f266840 1977 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
228e534f 1978 elf_tdata (abfd)->core->command
7f266840
DJ		 1979 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1980 }
1981
1982 /* Note that for some reason, a spurious space is tacked
1983 onto the end of the args in some (at least one anyway)
1984 implementations, so strip it off if it exists. */
7f266840 1985 {
228e534f 1986 char *command = elf_tdata (abfd)->core->command;
7f266840
DJ		 1987 int n = strlen (command);
1988
1989 if (0 < n && command[n - 1] == ' ')
1990 command[n - 1] = '\0';
1991 }
1992
1993 return TRUE;
1994}
1995
1f20dca5
UW		 1996static char *
1997elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1998 int note_type, ...)
1999{
2000 switch (note_type)
2001 {
2002 default:
2003 return NULL;
2004
2005 case NT_PRPSINFO:
2006 {
2007 char data[124];
2008 va_list ap;
2009
2010 va_start (ap, note_type);
2011 memset (data, 0, sizeof (data));
2012 strncpy (data + 28, va_arg (ap, const char *), 16);
2013 strncpy (data + 44, va_arg (ap, const char *), 80);
2014 va_end (ap);
2015
2016 return elfcore_write_note (abfd, buf, bufsiz,
2017 "CORE", note_type, data, sizeof (data));
2018 }
2019
2020 case NT_PRSTATUS:
2021 {
2022 char data[148];
2023 va_list ap;
2024 long pid;
2025 int cursig;
2026 const void *greg;
2027
2028 va_start (ap, note_type);
2029 memset (data, 0, sizeof (data));
2030 pid = va_arg (ap, long);
2031 bfd_put_32 (abfd, pid, data + 24);
2032 cursig = va_arg (ap, int);
2033 bfd_put_16 (abfd, cursig, data + 12);
2034 greg = va_arg (ap, const void *);
2035 memcpy (data + 72, greg, 72);
2036 va_end (ap);
2037
2038 return elfcore_write_note (abfd, buf, bufsiz,
2039 "CORE", note_type, data, sizeof (data));
2040 }
2041 }
2042}
2043
7f266840
DJ		 2044#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2045#define TARGET_LITTLE_NAME "elf32-littlearm"
2046#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2047#define TARGET_BIG_NAME "elf32-bigarm"
2048
2049#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2050#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2051#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2052
252b5132
RH		 2053typedef unsigned long int insn32;
2054typedef unsigned short int insn16;
2055
3a4a14e9
PB		 2056/* In lieu of proper flags, assume all EABIv4 or later objects are
2057 interworkable. */
57e8b36a 2058#define INTERWORK_FLAG(abfd) \
3a4a14e9 2059 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2060 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2061 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2062
252b5132
RH		 2063/* The linker script knows the section names for placement.
2064 The entry_names are used to do simple name mangling on the stubs.
2065 Given a function name, and its type, the stub can be found. The
9b485d32 2066 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2067#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2068#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2069
2070#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2071#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2072
c7b8f16e
JB		 2073#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2074#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2075
845b51d6
PB		 2076#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2077#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2078
7413f23f
DJ		 2079#define STUB_ENTRY_NAME "__%s_veneer"
2080
252b5132
RH		 2081/* The name of the dynamic interpreter. This is put in the .interp
2082 section. */
2083#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2084
0855e32b 2085static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2086{
2087 0xe08e0000, /* add r0, lr, r0 */
2088 0xe5901004, /* ldr r1, [r0,#4] */
2089 0xe12fff11, /* bx r1 */
2090};
0855e32b
NS		 2091
2092static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2093{
2094 0xe52d2004, /* push {r2} */
2095 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2096 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2097 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2098 0xe081100f, /* 2: add r1, pc */
2099 0xe12fff12, /* bx r2 */
2100 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
0855e32b 2101 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2102 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2103};
0855e32b 2104
5e681ec4
PB		 2105#ifdef FOUR_WORD_PLT
2106
252b5132
RH		 2107/* The first entry in a procedure linkage table looks like
2108 this. It is set up so that any shared library function that is
59f2c4e7 2109 called before the relocation has been set up calls the dynamic
9b485d32 2110 linker first. */
e5a52504 2111static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2112{
2113 0xe52de004, /* str lr, [sp, #-4]! */
2114 0xe59fe010, /* ldr lr, [pc, #16] */
2115 0xe08fe00e, /* add lr, pc, lr */
2116 0xe5bef008, /* ldr pc, [lr, #8]! */
2117};
5e681ec4
PB		 2118
2119/* Subsequent entries in a procedure linkage table look like
2120 this. */
e5a52504 2121static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2122{
2123 0xe28fc600, /* add ip, pc, #NN */
2124 0xe28cca00, /* add ip, ip, #NN */
2125 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2126 0x00000000, /* unused */
2127};
5e681ec4
PB		 2128
2129#else
2130
5e681ec4
PB		 2131/* The first entry in a procedure linkage table looks like
2132 this. It is set up so that any shared library function that is
2133 called before the relocation has been set up calls the dynamic
2134 linker first. */
e5a52504 2135static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2136{
2137 0xe52de004, /* str lr, [sp, #-4]! */
2138 0xe59fe004, /* ldr lr, [pc, #4] */
2139 0xe08fe00e, /* add lr, pc, lr */
2140 0xe5bef008, /* ldr pc, [lr, #8]! */
2141 0x00000000, /* &GOT[0] - . */
2142};
252b5132
RH		 2143
2144/* Subsequent entries in a procedure linkage table look like
2145 this. */
e5a52504 2146static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2147{
2148 0xe28fc600, /* add ip, pc, #0xNN00000 */
2149 0xe28cca00, /* add ip, ip, #0xNN000 */
2150 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2151};
5e681ec4
PB		 2152
2153#endif
252b5132 2154
00a97672
RS		 2155/* The format of the first entry in the procedure linkage table
2156 for a VxWorks executable. */
2157static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2158{
2159 0xe52dc008, /* str ip,[sp,#-8]! */
2160 0xe59fc000, /* ldr ip,[pc] */
2161 0xe59cf008, /* ldr pc,[ip,#8] */
2162 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2163};
00a97672
RS		 2164
2165/* The format of subsequent entries in a VxWorks executable. */
2166static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2167{
2168 0xe59fc000, /* ldr ip,[pc] */
2169 0xe59cf000, /* ldr pc,[ip] */
2170 0x00000000, /* .long @got */
2171 0xe59fc000, /* ldr ip,[pc] */
2172 0xea000000, /* b _PLT */
2173 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2174};
00a97672
RS		 2175
2176/* The format of entries in a VxWorks shared library. */
2177static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2178{
2179 0xe59fc000, /* ldr ip,[pc] */
2180 0xe79cf009, /* ldr pc,[ip,r9] */
2181 0x00000000, /* .long @got */
2182 0xe59fc000, /* ldr ip,[pc] */
2183 0xe599f008, /* ldr pc,[r9,#8] */
2184 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2185};
00a97672 2186
b7693d02
DJ		 2187/* An initial stub used if the PLT entry is referenced from Thumb code. */
2188#define PLT_THUMB_STUB_SIZE 4
2189static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2190{
2191 0x4778, /* bx pc */
2192 0x46c0 /* nop */
2193};
b7693d02 2194
e5a52504
MM		 2195/* The entries in a PLT when using a DLL-based target with multiple
2196 address spaces. */
906e58ca 2197static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2198{
2199 0xe51ff004, /* ldr pc, [pc, #-4] */
2200 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2201};
2202
2203/* The first entry in a procedure linkage table looks like
2204 this. It is set up so that any shared library function that is
2205 called before the relocation has been set up calls the dynamic
2206 linker first. */
2207static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2208{
2209 /* First bundle: */
2210 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2211 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2212 0xe08cc00f, /* add ip, ip, pc */
2213 0xe52dc008, /* str ip, [sp, #-8]! */
2214 /* Second bundle: */
edccdf7c
RM		 2215 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2216 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2217 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2218 0xe12fff1c, /* bx ip */
b38cadfb 2219 /* Third bundle: */
edccdf7c
RM		 2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
2222 0xe320f000, /* nop */
b38cadfb
NC		 2223 /* .Lplt_tail: */
2224 0xe50dc004, /* str ip, [sp, #-4] */
2225 /* Fourth bundle: */
edccdf7c
RM		 2226 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2227 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2228 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2229 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2230};
2231#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2232
2233/* Subsequent entries in a procedure linkage table look like this. */
2234static const bfd_vma elf32_arm_nacl_plt_entry [] =
2235{
2236 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2237 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2238 0xe08cc00f, /* add ip, ip, pc */
2239 0xea000000, /* b .Lplt_tail */
2240};
e5a52504 2241
906e58ca
NC		 2242#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2243#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2244#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2245#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2246#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2247#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2248
461a49ca 2249enum stub_insn_type
b38cadfb
NC		 2250{
2251 THUMB16_TYPE = 1,
2252 THUMB32_TYPE,
2253 ARM_TYPE,
2254 DATA_TYPE
2255};
461a49ca 2256
48229727
JB		 2257#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2258/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2259 is inserted in arm_build_one_stub(). */
2260#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2261#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2262#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2263#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2264#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2265#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2266
2267typedef struct
2268{
b38cadfb
NC		 2269 bfd_vma data;
2270 enum stub_insn_type type;
2271 unsigned int r_type;
2272 int reloc_addend;
461a49ca
DJ		 2273} insn_sequence;
2274
fea2b4d6
CL		 2275/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2276 to reach the stub if necessary. */
461a49ca 2277static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2278{
2279 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2280 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2281};
906e58ca 2282
fea2b4d6
CL		 2283/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2284 available. */
461a49ca 2285static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2286{
2287 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2288 ARM_INSN (0xe12fff1c), /* bx ip */
2289 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2290};
906e58ca 2291
d3626fb0 2292/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2293static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2294{
2295 THUMB16_INSN (0xb401), /* push {r0} */
2296 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2297 THUMB16_INSN (0x4684), /* mov ip, r0 */
2298 THUMB16_INSN (0xbc01), /* pop {r0} */
2299 THUMB16_INSN (0x4760), /* bx ip */
2300 THUMB16_INSN (0xbf00), /* nop */
2301 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2302};
906e58ca 2303
d3626fb0
CL		 2304/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2305 allowed. */
2306static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2307{
2308 THUMB16_INSN (0x4778), /* bx pc */
2309 THUMB16_INSN (0x46c0), /* nop */
2310 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2311 ARM_INSN (0xe12fff1c), /* bx ip */
2312 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2313};
d3626fb0 2314
fea2b4d6
CL		 2315/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2316 available. */
461a49ca 2317static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2318{
2319 THUMB16_INSN (0x4778), /* bx pc */
2320 THUMB16_INSN (0x46c0), /* nop */
2321 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2322 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2323};
906e58ca 2324
fea2b4d6
CL		 2325/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2326 one, when the destination is close enough. */
461a49ca 2327static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2328{
2329 THUMB16_INSN (0x4778), /* bx pc */
2330 THUMB16_INSN (0x46c0), /* nop */
2331 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2332};
c820be07 2333
cf3eccff 2334/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2335 blx to reach the stub if necessary. */
cf3eccff 2336static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2337{
2338 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2339 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2340 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2341};
906e58ca 2342
cf3eccff
DJ		 2343/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2344 blx to reach the stub if necessary. We can not add into pc;
2345 it is not guaranteed to mode switch (different in ARMv6 and
2346 ARMv7). */
2347static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2348{
2349 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2350 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2351 ARM_INSN (0xe12fff1c), /* bx ip */
2352 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2353};
cf3eccff 2354
ebe24dd4
CL		 2355/* V4T ARM -> ARM long branch stub, PIC. */
2356static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2357{
2358 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2359 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2360 ARM_INSN (0xe12fff1c), /* bx ip */
2361 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2362};
ebe24dd4
CL		 2363
2364/* V4T Thumb -> ARM long branch stub, PIC. */
2365static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2366{
2367 THUMB16_INSN (0x4778), /* bx pc */
2368 THUMB16_INSN (0x46c0), /* nop */
2369 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2370 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2371 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2372};
ebe24dd4 2373
d3626fb0
CL		 2374/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2375 architectures. */
ebe24dd4 2376static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2377{
2378 THUMB16_INSN (0xb401), /* push {r0} */
2379 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2380 THUMB16_INSN (0x46fc), /* mov ip, pc */
2381 THUMB16_INSN (0x4484), /* add ip, r0 */
2382 THUMB16_INSN (0xbc01), /* pop {r0} */
2383 THUMB16_INSN (0x4760), /* bx ip */
2384 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2385};
ebe24dd4 2386
d3626fb0
CL		 2387/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2388 allowed. */
2389static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2390{
2391 THUMB16_INSN (0x4778), /* bx pc */
2392 THUMB16_INSN (0x46c0), /* nop */
2393 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2394 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2395 ARM_INSN (0xe12fff1c), /* bx ip */
2396 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2397};
d3626fb0 2398
0855e32b
NS		 2399/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2400 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2401static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2402{
b38cadfb
NC		 2403 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2404 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2405 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2406};
2407
2408/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2409 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2410static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2411{
b38cadfb
NC		 2412 THUMB16_INSN (0x4778), /* bx pc */
2413 THUMB16_INSN (0x46c0), /* nop */
2414 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2415 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2416 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2417};
2418
48229727
JB		 2419/* Cortex-A8 erratum-workaround stubs. */
2420
2421/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2422 can't use a conditional branch to reach this stub). */
2423
2424static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2425{
2426 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2427 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2428 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2429};
48229727
JB		 2430
2431/* Stub used for b.w and bl.w instructions. */
2432
2433static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2434{
2435 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2436};
48229727
JB		 2437
2438static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2439{
2440 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2441};
48229727
JB		 2442
2443/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2444 instruction (which switches to ARM mode) to point to this stub. Jump to the
2445 real destination using an ARM-mode branch. */
2446
2447static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2448{
2449 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2450};
48229727 2451
9553db3c
NC		 2452/* For each section group there can be a specially created linker section
2453 to hold the stubs for that group. The name of the stub section is based
2454 upon the name of another section within that group with the suffix below
2455 applied.
2456
2457 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2458 create what appeared to be a linker stub section when it actually
2459 contained user code/data. For example, consider this fragment:
b38cadfb 2460
9553db3c
NC		 2461 const char * stubborn_problems[] = { "np" };
2462
2463 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2464 section called:
2465
2466 .data.rel.local.stubborn_problems
2467
2468 This then causes problems in arm32_arm_build_stubs() as it triggers:
2469
2470 // Ignore non-stub sections.
2471 if (!strstr (stub_sec->name, STUB_SUFFIX))
2472 continue;
2473
2474 And so the section would be ignored instead of being processed. Hence
2475 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2476 C identifier. */
2477#define STUB_SUFFIX ".__stub"
906e58ca 2478
738a79f6
CL		 2479/* One entry per long/short branch stub defined above. */
2480#define DEF_STUBS \
2481 DEF_STUB(long_branch_any_any) \
2482 DEF_STUB(long_branch_v4t_arm_thumb) \
2483 DEF_STUB(long_branch_thumb_only) \
2484 DEF_STUB(long_branch_v4t_thumb_thumb) \
2485 DEF_STUB(long_branch_v4t_thumb_arm) \
2486 DEF_STUB(short_branch_v4t_thumb_arm) \
2487 DEF_STUB(long_branch_any_arm_pic) \
2488 DEF_STUB(long_branch_any_thumb_pic) \
2489 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2490 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2491 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2492 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2493 DEF_STUB(long_branch_any_tls_pic) \
2494 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2495 DEF_STUB(a8_veneer_b_cond) \
2496 DEF_STUB(a8_veneer_b) \
2497 DEF_STUB(a8_veneer_bl) \
2498 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2499
2500#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2501enum elf32_arm_stub_type
2502{
906e58ca 2503 arm_stub_none,
738a79f6 2504 DEF_STUBS
eb7c4339
NS		 2505 /* Note the first a8_veneer type */
2506 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2507};
2508#undef DEF_STUB
2509
2510typedef struct
2511{
d3ce72d0 2512 const insn_sequence* template_sequence;
738a79f6
CL		 2513 int template_size;
2514} stub_def;
2515
2516#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2517static const stub_def stub_definitions[] =
2518{
738a79f6
CL		 2519 {NULL, 0},
2520 DEF_STUBS
906e58ca
NC		 2521};
2522
2523struct elf32_arm_stub_hash_entry
2524{
2525 /* Base hash table entry structure. */
2526 struct bfd_hash_entry root;
2527
2528 /* The stub section. */
2529 asection *stub_sec;
2530
2531 /* Offset within stub_sec of the beginning of this stub. */
2532 bfd_vma stub_offset;
2533
2534 /* Given the symbol's value and its section we can determine its final
2535 value when building the stubs (so the stub knows where to jump). */
2536 bfd_vma target_value;
2537 asection *target_section;
2538
48229727
JB		 2539 /* Offset to apply to relocation referencing target_value. */
2540 bfd_vma target_addend;
2541
2542 /* The instruction which caused this stub to be generated (only valid for
2543 Cortex-A8 erratum workaround stubs at present). */
2544 unsigned long orig_insn;
2545
461a49ca 2546 /* The stub type. */
906e58ca 2547 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2548 /* Its encoding size in bytes. */
2549 int stub_size;
2550 /* Its template. */
2551 const insn_sequence *stub_template;
2552 /* The size of the template (number of entries). */
2553 int stub_template_size;
906e58ca
NC		 2554
2555 /* The symbol table entry, if any, that this was derived from. */
2556 struct elf32_arm_link_hash_entry *h;
2557
35fc36a8
RS		 2558 /* Type of branch. */
2559 enum arm_st_branch_type branch_type;
906e58ca
NC		 2560
2561 /* Where this stub is being called from, or, in the case of combined
2562 stub sections, the first input section in the group. */
2563 asection *id_sec;
7413f23f
DJ		 2564
2565 /* The name for the local symbol at the start of this stub. The
2566 stub name in the hash table has to be unique; this does not, so
2567 it can be friendlier. */
2568 char *output_name;
906e58ca
NC		 2569};
2570
e489d0ae
PB		 2571/* Used to build a map of a section. This is required for mixed-endian
2572 code/data. */
2573
2574typedef struct elf32_elf_section_map
2575{
2576 bfd_vma vma;
2577 char type;
2578}
2579elf32_arm_section_map;
2580
c7b8f16e
JB		 2581/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2582
2583typedef enum
2584{
2585 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2586 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2587 VFP11_ERRATUM_ARM_VENEER,
2588 VFP11_ERRATUM_THUMB_VENEER
2589}
2590elf32_vfp11_erratum_type;
2591
2592typedef struct elf32_vfp11_erratum_list
2593{
2594 struct elf32_vfp11_erratum_list *next;
2595 bfd_vma vma;
2596 union
2597 {
2598 struct
2599 {
2600 struct elf32_vfp11_erratum_list *veneer;
2601 unsigned int vfp_insn;
2602 } b;
2603 struct
2604 {
2605 struct elf32_vfp11_erratum_list *branch;
2606 unsigned int id;
2607 } v;
2608 } u;
2609 elf32_vfp11_erratum_type type;
2610}
2611elf32_vfp11_erratum_list;
2612
2468f9c9
PB		 2613typedef enum
2614{
2615 DELETE_EXIDX_ENTRY,
2616 INSERT_EXIDX_CANTUNWIND_AT_END
2617}
2618arm_unwind_edit_type;
2619
2620/* A (sorted) list of edits to apply to an unwind table. */
2621typedef struct arm_unwind_table_edit
2622{
2623 arm_unwind_edit_type type;
2624 /* Note: we sometimes want to insert an unwind entry corresponding to a
2625 section different from the one we're currently writing out, so record the
2626 (text) section this edit relates to here. */
2627 asection *linked_section;
2628 unsigned int index;
2629 struct arm_unwind_table_edit *next;
2630}
2631arm_unwind_table_edit;
2632
8e3de13a 2633typedef struct _arm_elf_section_data
e489d0ae 2634{
2468f9c9 2635 /* Information about mapping symbols. */
e489d0ae 2636 struct bfd_elf_section_data elf;
8e3de13a 2637 unsigned int mapcount;
c7b8f16e 2638 unsigned int mapsize;
e489d0ae 2639 elf32_arm_section_map *map;
2468f9c9 2640 /* Information about CPU errata. */
c7b8f16e
JB		 2641 unsigned int erratumcount;
2642 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2643 /* Information about unwind tables. */
2644 union
2645 {
2646 /* Unwind info attached to a text section. */
2647 struct
2648 {
2649 asection *arm_exidx_sec;
2650 } text;
2651
2652 /* Unwind info attached to an .ARM.exidx section. */
2653 struct
2654 {
2655 arm_unwind_table_edit *unwind_edit_list;
2656 arm_unwind_table_edit *unwind_edit_tail;
2657 } exidx;
2658 } u;
8e3de13a
NC		 2659}
2660_arm_elf_section_data;
e489d0ae
PB		 2661
2662#define elf32_arm_section_data(sec) \
8e3de13a 2663 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2664
48229727
JB		 2665/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2666 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2667 so may be created multiple times: we use an array of these entries whilst
2668 relaxing which we can refresh easily, then create stubs for each potentially
2669 erratum-triggering instruction once we've settled on a solution. */
2670
b38cadfb
NC		 2671struct a8_erratum_fix
2672{
48229727
JB		 2673 bfd *input_bfd;
2674 asection *section;
2675 bfd_vma offset;
2676 bfd_vma addend;
2677 unsigned long orig_insn;
2678 char *stub_name;
2679 enum elf32_arm_stub_type stub_type;
35fc36a8 2680 enum arm_st_branch_type branch_type;
48229727
JB		 2681};
2682
2683/* A table of relocs applied to branches which might trigger Cortex-A8
2684 erratum. */
2685
b38cadfb
NC		 2686struct a8_erratum_reloc
2687{
48229727
JB		 2688 bfd_vma from;
2689 bfd_vma destination;
92750f34
DJ		 2690 struct elf32_arm_link_hash_entry *hash;
2691 const char *sym_name;
48229727 2692 unsigned int r_type;
35fc36a8 2693 enum arm_st_branch_type branch_type;
48229727
JB		 2694 bfd_boolean non_a8_stub;
2695};
2696
ba93b8ac
DJ		 2697/* The size of the thread control block. */
2698#define TCB_SIZE 8
2699
34e77a92
RS		 2700/* ARM-specific information about a PLT entry, over and above the usual
2701 gotplt_union. */
b38cadfb
NC		 2702struct arm_plt_info
2703{
34e77a92
RS		 2704 /* We reference count Thumb references to a PLT entry separately,
2705 so that we can emit the Thumb trampoline only if needed. */
2706 bfd_signed_vma thumb_refcount;
2707
2708 /* Some references from Thumb code may be eliminated by BL->BLX
2709 conversion, so record them separately. */
2710 bfd_signed_vma maybe_thumb_refcount;
2711
2712 /* How many of the recorded PLT accesses were from non-call relocations.
2713 This information is useful when deciding whether anything takes the
2714 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2715 non-call references to the function should resolve directly to the
2716 real runtime target. */
2717 unsigned int noncall_refcount;
2718
2719 /* Since PLT entries have variable size if the Thumb prologue is
2720 used, we need to record the index into .got.plt instead of
2721 recomputing it from the PLT offset. */
2722 bfd_signed_vma got_offset;
2723};
2724
2725/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2726struct arm_local_iplt_info
2727{
34e77a92
RS		 2728 /* The information that is usually found in the generic ELF part of
2729 the hash table entry. */
2730 union gotplt_union root;
2731
2732 /* The information that is usually found in the ARM-specific part of
2733 the hash table entry. */
2734 struct arm_plt_info arm;
2735
2736 /* A list of all potential dynamic relocations against this symbol. */
2737 struct elf_dyn_relocs *dyn_relocs;
2738};
2739
0ffa91dd 2740struct elf_arm_obj_tdata
ba93b8ac
DJ		 2741{
2742 struct elf_obj_tdata root;
2743
2744 /* tls_type for each local got entry. */
2745 char *local_got_tls_type;
ee065d83 2746
0855e32b
NS		 2747 /* GOTPLT entries for TLS descriptors. */
2748 bfd_vma *local_tlsdesc_gotent;
2749
34e77a92
RS		 2750 /* Information for local symbols that need entries in .iplt. */
2751 struct arm_local_iplt_info **local_iplt;
2752
bf21ed78
MS		 2753 /* Zero to warn when linking objects with incompatible enum sizes. */
2754 int no_enum_size_warning;
a9dc9481
JM		 2755
2756 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2757 int no_wchar_size_warning;
ba93b8ac
DJ		 2758};
2759
0ffa91dd
NC		 2760#define elf_arm_tdata(bfd) \
2761 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2762
0ffa91dd
NC		 2763#define elf32_arm_local_got_tls_type(bfd) \
2764 (elf_arm_tdata (bfd)->local_got_tls_type)
2765
0855e32b
NS		 2766#define elf32_arm_local_tlsdesc_gotent(bfd) \
2767 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2768
34e77a92
RS		 2769#define elf32_arm_local_iplt(bfd) \
2770 (elf_arm_tdata (bfd)->local_iplt)
2771
0ffa91dd
NC		 2772#define is_arm_elf(bfd) \
2773 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2774 && elf_tdata (bfd) != NULL \
4dfe6ac6 2775 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2776
2777static bfd_boolean
2778elf32_arm_mkobject (bfd *abfd)
2779{
0ffa91dd 2780 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2781 ARM_ELF_DATA);
ba93b8ac
DJ		 2782}
2783
ba93b8ac
DJ		 2784#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2785
ba96a88f 2786/* Arm ELF linker hash entry. */
252b5132 2787struct elf32_arm_link_hash_entry
b38cadfb
NC		 2788{
2789 struct elf_link_hash_entry root;
252b5132 2790
b38cadfb
NC		 2791 /* Track dynamic relocs copied for this symbol. */
2792 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2793
b38cadfb
NC		 2794 /* ARM-specific PLT information. */
2795 struct arm_plt_info plt;
ba93b8ac
DJ		 2796
2797#define GOT_UNKNOWN 0
2798#define GOT_NORMAL 1
2799#define GOT_TLS_GD 2
2800#define GOT_TLS_IE 4
0855e32b
NS		 2801#define GOT_TLS_GDESC 8
2802#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2803 unsigned int tls_type : 8;
34e77a92 2804
b38cadfb
NC		 2805 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2806 unsigned int is_iplt : 1;
34e77a92 2807
b38cadfb 2808 unsigned int unused : 23;
a4fd1a8e 2809
b38cadfb
NC		 2810 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2811 starting at the end of the jump table. */
2812 bfd_vma tlsdesc_got;
0855e32b 2813
b38cadfb
NC		 2814 /* The symbol marking the real symbol location for exported thumb
2815 symbols with Arm stubs. */
2816 struct elf_link_hash_entry *export_glue;
906e58ca 2817
b38cadfb 2818 /* A pointer to the most recently used stub hash entry against this
8029a119 2819 symbol. */
b38cadfb
NC		 2820 struct elf32_arm_stub_hash_entry *stub_cache;
2821};
252b5132 2822
252b5132 2823/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2824#define elf32_arm_link_hash_traverse(table, func, info) \
2825 (elf_link_hash_traverse \
2826 (&(table)->root, \
b7693d02 2827 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2828 (info)))
2829
2830/* Get the ARM elf linker hash table from a link_info structure. */
2831#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2832 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2833 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2834
906e58ca
NC		 2835#define arm_stub_hash_lookup(table, string, create, copy) \
2836 ((struct elf32_arm_stub_hash_entry *) \
2837 bfd_hash_lookup ((table), (string), (create), (copy)))
2838
21d799b5
NC		 2839/* Array to keep track of which stub sections have been created, and
2840 information on stub grouping. */
2841struct map_stub
2842{
2843 /* This is the section to which stubs in the group will be
2844 attached. */
2845 asection *link_sec;
2846 /* The stub section. */
2847 asection *stub_sec;
2848};
2849
0855e32b
NS		 2850#define elf32_arm_compute_jump_table_size(htab) \
2851 ((htab)->next_tls_desc_index * 4)
2852
9b485d32 2853/* ARM ELF linker hash table. */
252b5132 2854struct elf32_arm_link_hash_table
906e58ca
NC		 2855{
2856 /* The main hash table. */
2857 struct elf_link_hash_table root;
252b5132 2858
906e58ca
NC		 2859 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2860 bfd_size_type thumb_glue_size;
252b5132 2861
906e58ca
NC		 2862 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2863 bfd_size_type arm_glue_size;
252b5132 2864
906e58ca
NC		 2865 /* The size in bytes of section containing the ARMv4 BX veneers. */
2866 bfd_size_type bx_glue_size;
845b51d6 2867
906e58ca
NC		 2868 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2869 veneer has been populated. */
2870 bfd_vma bx_glue_offset[15];
845b51d6 2871
906e58ca
NC		 2872 /* The size in bytes of the section containing glue for VFP11 erratum
2873 veneers. */
2874 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2875
48229727
JB		 2876 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2877 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2878 elf32_arm_write_section(). */
2879 struct a8_erratum_fix *a8_erratum_fixes;
2880 unsigned int num_a8_erratum_fixes;
2881
906e58ca
NC		 2882 /* An arbitrary input BFD chosen to hold the glue sections. */
2883 bfd * bfd_of_glue_owner;
ba96a88f 2884
906e58ca
NC		 2885 /* Nonzero to output a BE8 image. */
2886 int byteswap_code;
e489d0ae 2887
906e58ca
NC		 2888 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2889 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2890 int target1_is_rel;
9c504268 2891
906e58ca
NC		 2892 /* The relocation to use for R_ARM_TARGET2 relocations. */
2893 int target2_reloc;
eb043451 2894
906e58ca
NC		 2895 /* 0 = Ignore R_ARM_V4BX.
2896 1 = Convert BX to MOV PC.
2897 2 = Generate v4 interworing stubs. */
2898 int fix_v4bx;
319850b4 2899
48229727
JB		 2900 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2901 int fix_cortex_a8;
2902
2de70689
MGD		 2903 /* Whether we should fix the ARM1176 BLX immediate issue. */
2904 int fix_arm1176;
2905
906e58ca
NC		 2906 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2907 int use_blx;
33bfe774 2908
906e58ca
NC		 2909 /* What sort of code sequences we should look for which may trigger the
2910 VFP11 denorm erratum. */
2911 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2912
906e58ca
NC		 2913 /* Global counter for the number of fixes we have emitted. */
2914 int num_vfp11_fixes;
c7b8f16e 2915
906e58ca
NC		 2916 /* Nonzero to force PIC branch veneers. */
2917 int pic_veneer;
27e55c4d 2918
906e58ca
NC		 2919 /* The number of bytes in the initial entry in the PLT. */
2920 bfd_size_type plt_header_size;
e5a52504 2921
906e58ca
NC		 2922 /* The number of bytes in the subsequent PLT etries. */
2923 bfd_size_type plt_entry_size;
e5a52504 2924
906e58ca
NC		 2925 /* True if the target system is VxWorks. */
2926 int vxworks_p;
00a97672 2927
906e58ca
NC		 2928 /* True if the target system is Symbian OS. */
2929 int symbian_p;
e5a52504 2930
b38cadfb
NC		 2931 /* True if the target system is Native Client. */
2932 int nacl_p;
2933
906e58ca
NC		 2934 /* True if the target uses REL relocations. */
2935 int use_rel;
4e7fd91e 2936
0855e32b
NS		 2937 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2938 bfd_vma next_tls_desc_index;
2939
2940 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2941 bfd_vma num_tls_desc;
2942
906e58ca 2943 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2944 asection *sdynbss;
2945 asection *srelbss;
5e681ec4 2946
906e58ca
NC		 2947 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2948 asection *srelplt2;
00a97672 2949
0855e32b
NS		 2950 /* The offset into splt of the PLT entry for the TLS descriptor
2951 resolver. Special values are 0, if not necessary (or not found
2952 to be necessary yet), and -1 if needed but not determined
2953 yet. */
2954 bfd_vma dt_tlsdesc_plt;
2955
2956 /* The offset into sgot of the GOT entry used by the PLT entry
2957 above. */
b38cadfb 2958 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 2959
2960 /* Offset in .plt section of tls_arm_trampoline. */
2961 bfd_vma tls_trampoline;
2962
906e58ca
NC		 2963 /* Data for R_ARM_TLS_LDM32 relocations. */
2964 union
2965 {
2966 bfd_signed_vma refcount;
2967 bfd_vma offset;
2968 } tls_ldm_got;
b7693d02 2969
87d72d41
AM		 2970 /* Small local sym cache. */
2971 struct sym_cache sym_cache;
906e58ca
NC		 2972
2973 /* For convenience in allocate_dynrelocs. */
2974 bfd * obfd;
2975
0855e32b
NS		 2976 /* The amount of space used by the reserved portion of the sgotplt
2977 section, plus whatever space is used by the jump slots. */
2978 bfd_vma sgotplt_jump_table_size;
2979
906e58ca
NC		 2980 /* The stub hash table. */
2981 struct bfd_hash_table stub_hash_table;
2982
2983 /* Linker stub bfd. */
2984 bfd *stub_bfd;
2985
2986 /* Linker call-backs. */
2987 asection * (*add_stub_section) (const char *, asection *);
2988 void (*layout_sections_again) (void);
2989
2990 /* Array to keep track of which stub sections have been created, and
2991 information on stub grouping. */
21d799b5 2992 struct map_stub *stub_group;
906e58ca 2993
fe33d2fa
CL		 2994 /* Number of elements in stub_group. */
2995 int top_id;
2996
906e58ca
NC		 2997 /* Assorted information used by elf32_arm_size_stubs. */
2998 unsigned int bfd_count;
2999 int top_index;
3000 asection **input_list;
3001};
252b5132 3002
780a67af
NC		 3003/* Create an entry in an ARM ELF linker hash table. */
3004
3005static struct bfd_hash_entry *
57e8b36a
NC		 3006elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3007 struct bfd_hash_table * table,
3008 const char * string)
780a67af
NC		 3009{
3010 struct elf32_arm_link_hash_entry * ret =
3011 (struct elf32_arm_link_hash_entry *) entry;
3012
3013 /* Allocate the structure if it has not already been allocated by a
3014 subclass. */
906e58ca 3015 if (ret == NULL)
21d799b5
NC		 3016 ret = (struct elf32_arm_link_hash_entry *)
3017 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3018 if (ret == NULL)
780a67af
NC		 3019 return (struct bfd_hash_entry *) ret;
3020
3021 /* Call the allocation method of the superclass. */
3022 ret = ((struct elf32_arm_link_hash_entry *)
3023 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3024 table, string));
57e8b36a 3025 if (ret != NULL)
b7693d02 3026 {
0bdcacaf 3027 ret->dyn_relocs = NULL;
ba93b8ac 3028 ret->tls_type = GOT_UNKNOWN;
0855e32b 3029 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3030 ret->plt.thumb_refcount = 0;
3031 ret->plt.maybe_thumb_refcount = 0;
3032 ret->plt.noncall_refcount = 0;
3033 ret->plt.got_offset = -1;
3034 ret->is_iplt = FALSE;
a4fd1a8e 3035 ret->export_glue = NULL;
906e58ca
NC		 3036
3037 ret->stub_cache = NULL;
b7693d02 3038 }
780a67af
NC		 3039
3040 return (struct bfd_hash_entry *) ret;
3041}
3042
34e77a92
RS		 3043/* Ensure that we have allocated bookkeeping structures for ABFD's local
3044 symbols. */
3045
3046static bfd_boolean
3047elf32_arm_allocate_local_sym_info (bfd *abfd)
3048{
3049 if (elf_local_got_refcounts (abfd) == NULL)
3050 {
3051 bfd_size_type num_syms;
3052 bfd_size_type size;
3053 char *data;
3054
3055 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3056 size = num_syms * (sizeof (bfd_signed_vma)
3057 + sizeof (struct arm_local_iplt_info *)
3058 + sizeof (bfd_vma)
3059 + sizeof (char));
3060 data = bfd_zalloc (abfd, size);
3061 if (data == NULL)
3062 return FALSE;
3063
3064 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3065 data += num_syms * sizeof (bfd_signed_vma);
3066
3067 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3068 data += num_syms * sizeof (struct arm_local_iplt_info *);
3069
3070 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3071 data += num_syms * sizeof (bfd_vma);
3072
3073 elf32_arm_local_got_tls_type (abfd) = data;
3074 }
3075 return TRUE;
3076}
3077
3078/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3079 to input bfd ABFD. Create the information if it doesn't already exist.
3080 Return null if an allocation fails. */
3081
3082static struct arm_local_iplt_info *
3083elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3084{
3085 struct arm_local_iplt_info **ptr;
3086
3087 if (!elf32_arm_allocate_local_sym_info (abfd))
3088 return NULL;
3089
3090 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3091 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3092 if (*ptr == NULL)
3093 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3094 return *ptr;
3095}
3096
3097/* Try to obtain PLT information for the symbol with index R_SYMNDX
3098 in ABFD's symbol table. If the symbol is global, H points to its
3099 hash table entry, otherwise H is null.
3100
3101 Return true if the symbol does have PLT information. When returning
3102 true, point *ROOT_PLT at the target-independent reference count/offset
3103 union and *ARM_PLT at the ARM-specific information. */
3104
3105static bfd_boolean
3106elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3107 unsigned long r_symndx, union gotplt_union **root_plt,
3108 struct arm_plt_info **arm_plt)
3109{
3110 struct arm_local_iplt_info *local_iplt;
3111
3112 if (h != NULL)
3113 {
3114 *root_plt = &h->root.plt;
3115 *arm_plt = &h->plt;
3116 return TRUE;
3117 }
3118
3119 if (elf32_arm_local_iplt (abfd) == NULL)
3120 return FALSE;
3121
3122 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3123 if (local_iplt == NULL)
3124 return FALSE;
3125
3126 *root_plt = &local_iplt->root;
3127 *arm_plt = &local_iplt->arm;
3128 return TRUE;
3129}
3130
3131/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3132 before it. */
3133
3134static bfd_boolean
3135elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3136 struct arm_plt_info *arm_plt)
3137{
3138 struct elf32_arm_link_hash_table *htab;
3139
3140 htab = elf32_arm_hash_table (info);
3141 return (arm_plt->thumb_refcount != 0
3142 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3143}
3144
3145/* Return a pointer to the head of the dynamic reloc list that should
3146 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3147 ABFD's symbol table. Return null if an error occurs. */
3148
3149static struct elf_dyn_relocs **
3150elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3151 Elf_Internal_Sym *isym)
3152{
3153 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3154 {
3155 struct arm_local_iplt_info *local_iplt;
3156
3157 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3158 if (local_iplt == NULL)
3159 return NULL;
3160 return &local_iplt->dyn_relocs;
3161 }
3162 else
3163 {
3164 /* Track dynamic relocs needed for local syms too.
3165 We really need local syms available to do this
3166 easily. Oh well. */
3167 asection *s;
3168 void *vpp;
3169
3170 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3171 if (s == NULL)
3172 abort ();
3173
3174 vpp = &elf_section_data (s)->local_dynrel;
3175 return (struct elf_dyn_relocs **) vpp;
3176 }
3177}
3178
906e58ca
NC		 3179/* Initialize an entry in the stub hash table. */
3180
3181static struct bfd_hash_entry *
3182stub_hash_newfunc (struct bfd_hash_entry *entry,
3183 struct bfd_hash_table *table,
3184 const char *string)
3185{
3186 /* Allocate the structure if it has not already been allocated by a
3187 subclass. */
3188 if (entry == NULL)
3189 {
21d799b5
NC		 3190 entry = (struct bfd_hash_entry *)
3191 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3192 if (entry == NULL)
3193 return entry;
3194 }
3195
3196 /* Call the allocation method of the superclass. */
3197 entry = bfd_hash_newfunc (entry, table, string);
3198 if (entry != NULL)
3199 {
3200 struct elf32_arm_stub_hash_entry *eh;
3201
3202 /* Initialize the local fields. */
3203 eh = (struct elf32_arm_stub_hash_entry *) entry;
3204 eh->stub_sec = NULL;
3205 eh->stub_offset = 0;
3206 eh->target_value = 0;
3207 eh->target_section = NULL;
cedfb179
DK		 3208 eh->target_addend = 0;
3209 eh->orig_insn = 0;
906e58ca 3210 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3211 eh->stub_size = 0;
3212 eh->stub_template = NULL;
3213 eh->stub_template_size = 0;
906e58ca
NC		 3214 eh->h = NULL;
3215 eh->id_sec = NULL;
d8d2f433 3216 eh->output_name = NULL;
906e58ca
NC		 3217 }
3218
3219 return entry;
3220}
3221
00a97672 3222/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3223 shortcuts to them in our hash table. */
3224
3225static bfd_boolean
57e8b36a 3226create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3227{
3228 struct elf32_arm_link_hash_table *htab;
3229
e5a52504 3230 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3231 if (htab == NULL)
3232 return FALSE;
3233
e5a52504
MM		 3234 /* BPABI objects never have a GOT, or associated sections. */
3235 if (htab->symbian_p)
3236 return TRUE;
3237
5e681ec4
PB		 3238 if (! _bfd_elf_create_got_section (dynobj, info))
3239 return FALSE;
3240
5e681ec4
PB		 3241 return TRUE;
3242}
3243
34e77a92
RS		 3244/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3245
3246static bfd_boolean
3247create_ifunc_sections (struct bfd_link_info *info)
3248{
3249 struct elf32_arm_link_hash_table *htab;
3250 const struct elf_backend_data *bed;
3251 bfd *dynobj;
3252 asection *s;
3253 flagword flags;
b38cadfb 3254
34e77a92
RS		 3255 htab = elf32_arm_hash_table (info);
3256 dynobj = htab->root.dynobj;
3257 bed = get_elf_backend_data (dynobj);
3258 flags = bed->dynamic_sec_flags;
3259
3260 if (htab->root.iplt == NULL)
3261 {
3d4d4302
AM		 3262 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3263 flags | SEC_READONLY | SEC_CODE);
34e77a92 3264 if (s == NULL
a0f49396 3265 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3266 return FALSE;
3267 htab->root.iplt = s;
3268 }
3269
3270 if (htab->root.irelplt == NULL)
3271 {
3d4d4302
AM		 3272 s = bfd_make_section_anyway_with_flags (dynobj,
3273 RELOC_SECTION (htab, ".iplt"),
3274 flags | SEC_READONLY);
34e77a92 3275 if (s == NULL
a0f49396 3276 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3277 return FALSE;
3278 htab->root.irelplt = s;
3279 }
3280
3281 if (htab->root.igotplt == NULL)
3282 {
3d4d4302 3283 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3284 if (s == NULL
3285 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3286 return FALSE;
3287 htab->root.igotplt = s;
3288 }
3289 return TRUE;
3290}
3291
00a97672
RS		 3292/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3293 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3294 hash table. */
3295
3296static bfd_boolean
57e8b36a 3297elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3298{
3299 struct elf32_arm_link_hash_table *htab;
3300
3301 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3302 if (htab == NULL)
3303 return FALSE;
3304
362d30a1 3305 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3306 return FALSE;
3307
3308 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3309 return FALSE;
3310
3d4d4302 3311 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3312 if (!info->shared)
3d4d4302
AM		 3313 htab->srelbss = bfd_get_linker_section (dynobj,
3314 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3315
3316 if (htab->vxworks_p)
3317 {
3318 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3319 return FALSE;
3320
3321 if (info->shared)
3322 {
3323 htab->plt_header_size = 0;
3324 htab->plt_entry_size
3325 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3326 }
3327 else
3328 {
3329 htab->plt_header_size
3330 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3331 htab->plt_entry_size
3332 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3333 }
3334 }
5e681ec4 3335
362d30a1
RS		 3336 if (!htab->root.splt
3337 || !htab->root.srelplt
e5a52504 3338 || !htab->sdynbss
5e681ec4
PB		 3339 || (!info->shared && !htab->srelbss))
3340 abort ();
3341
3342 return TRUE;
3343}
3344
906e58ca
NC		 3345/* Copy the extra info we tack onto an elf_link_hash_entry. */
3346
3347static void
3348elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3349 struct elf_link_hash_entry *dir,
3350 struct elf_link_hash_entry *ind)
3351{
3352 struct elf32_arm_link_hash_entry *edir, *eind;
3353
3354 edir = (struct elf32_arm_link_hash_entry *) dir;
3355 eind = (struct elf32_arm_link_hash_entry *) ind;
3356
0bdcacaf 3357 if (eind->dyn_relocs != NULL)
906e58ca 3358 {
0bdcacaf 3359 if (edir->dyn_relocs != NULL)
906e58ca 3360 {
0bdcacaf
RS		 3361 struct elf_dyn_relocs **pp;
3362 struct elf_dyn_relocs *p;
906e58ca
NC		 3363
3364 /* Add reloc counts against the indirect sym to the direct sym
3365 list. Merge any entries against the same section. */
0bdcacaf 3366 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3367 {
0bdcacaf 3368 struct elf_dyn_relocs *q;
906e58ca 3369
0bdcacaf
RS		 3370 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3371 if (q->sec == p->sec)
906e58ca
NC		 3372 {
3373 q->pc_count += p->pc_count;
3374 q->count += p->count;
3375 *pp = p->next;
3376 break;
3377 }
3378 if (q == NULL)
3379 pp = &p->next;
3380 }
0bdcacaf 3381 *pp = edir->dyn_relocs;
906e58ca
NC		 3382 }
3383
0bdcacaf
RS		 3384 edir->dyn_relocs = eind->dyn_relocs;
3385 eind->dyn_relocs = NULL;
906e58ca
NC		 3386 }
3387
3388 if (ind->root.type == bfd_link_hash_indirect)
3389 {
3390 /* Copy over PLT info. */
34e77a92
RS		 3391 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3392 eind->plt.thumb_refcount = 0;
3393 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3394 eind->plt.maybe_thumb_refcount = 0;
3395 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3396 eind->plt.noncall_refcount = 0;
3397
3398 /* We should only allocate a function to .iplt once the final
3399 symbol information is known. */
3400 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3401
3402 if (dir->got.refcount <= 0)
3403 {
3404 edir->tls_type = eind->tls_type;
3405 eind->tls_type = GOT_UNKNOWN;
3406 }
3407 }
3408
3409 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3410}
3411
3412/* Create an ARM elf linker hash table. */
3413
3414static struct bfd_link_hash_table *
3415elf32_arm_link_hash_table_create (bfd *abfd)
3416{
3417 struct elf32_arm_link_hash_table *ret;
3418 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3419
7bf52ea2 3420 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
906e58ca
NC		 3421 if (ret == NULL)
3422 return NULL;
3423
3424 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3425 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3426 sizeof (struct elf32_arm_link_hash_entry),
3427 ARM_ELF_DATA))
906e58ca
NC		 3428 {
3429 free (ret);
3430 return NULL;
3431 }
3432
906e58ca 3433 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
906e58ca
NC		 3434#ifdef FOUR_WORD_PLT
3435 ret->plt_header_size = 16;
3436 ret->plt_entry_size = 16;
3437#else
3438 ret->plt_header_size = 20;
3439 ret->plt_entry_size = 12;
3440#endif
906e58ca 3441 ret->use_rel = 1;
906e58ca 3442 ret->obfd = abfd;
906e58ca
NC		 3443
3444 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3445 sizeof (struct elf32_arm_stub_hash_entry)))
3446 {
3447 free (ret);
3448 return NULL;
3449 }
3450
3451 return &ret->root.root;
3452}
3453
3454/* Free the derived linker hash table. */
3455
3456static void
3457elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3458{
3459 struct elf32_arm_link_hash_table *ret
3460 = (struct elf32_arm_link_hash_table *) hash;
3461
3462 bfd_hash_table_free (&ret->stub_hash_table);
9f7c3e5e 3463 _bfd_elf_link_hash_table_free (hash);
906e58ca
NC		 3464}
3465
3466/* Determine if we're dealing with a Thumb only architecture. */
3467
3468static bfd_boolean
3469using_thumb_only (struct elf32_arm_link_hash_table *globals)
3470{
3471 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3472 Tag_CPU_arch);
3473 int profile;
3474
41ed1ee7
DJ		 3475 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3476 return TRUE;
3477
9e3c6df6 3478 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3479 return FALSE;
3480
3481 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3482 Tag_CPU_arch_profile);
3483
3484 return profile == 'M';
3485}
3486
3487/* Determine if we're dealing with a Thumb-2 object. */
3488
3489static bfd_boolean
3490using_thumb2 (struct elf32_arm_link_hash_table *globals)
3491{
3492 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3493 Tag_CPU_arch);
3494 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3495}
3496
cd1dac3d
DG		 3497/* Determine what kind of NOPs are available. */
3498
3499static bfd_boolean
3500arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3501{
3502 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3503 Tag_CPU_arch);
3504 return arch == TAG_CPU_ARCH_V6T2
3505 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3506 || arch == TAG_CPU_ARCH_V7
3507 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3508}
3509
3510static bfd_boolean
3511arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3512{
3513 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3514 Tag_CPU_arch);
9e3c6df6
PB		 3515 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3516 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3517}
3518
f4ac8484
DJ		 3519static bfd_boolean
3520arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3521{
3522 switch (stub_type)
3523 {
fea2b4d6
CL		 3524 case arm_stub_long_branch_thumb_only:
3525 case arm_stub_long_branch_v4t_thumb_arm:
3526 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3527 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3528 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3529 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3530 return TRUE;
3531 case arm_stub_none:
3532 BFD_FAIL ();
3533 return FALSE;
3534 break;
3535 default:
3536 return FALSE;
3537 }
3538}
3539
906e58ca
NC		 3540/* Determine the type of stub needed, if any, for a call. */
3541
3542static enum elf32_arm_stub_type
3543arm_type_of_stub (struct bfd_link_info *info,
3544 asection *input_sec,
3545 const Elf_Internal_Rela *rel,
34e77a92 3546 unsigned char st_type,
35fc36a8 3547 enum arm_st_branch_type *actual_branch_type,
906e58ca 3548 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3549 bfd_vma destination,
3550 asection *sym_sec,
3551 bfd *input_bfd,
3552 const char *name)
906e58ca
NC		 3553{
3554 bfd_vma location;
3555 bfd_signed_vma branch_offset;
3556 unsigned int r_type;
3557 struct elf32_arm_link_hash_table * globals;
3558 int thumb2;
3559 int thumb_only;
3560 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3561 int use_plt = 0;
35fc36a8 3562 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3563 union gotplt_union *root_plt;
3564 struct arm_plt_info *arm_plt;
906e58ca 3565
35fc36a8 3566 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3567 return stub_type;
3568
906e58ca 3569 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3570 if (globals == NULL)
3571 return stub_type;
906e58ca
NC		 3572
3573 thumb_only = using_thumb_only (globals);
3574
3575 thumb2 = using_thumb2 (globals);
3576
3577 /* Determine where the call point is. */
3578 location = (input_sec->output_offset
3579 + input_sec->output_section->vma
3580 + rel->r_offset);
3581
906e58ca
NC		 3582 r_type = ELF32_R_TYPE (rel->r_info);
3583
34e77a92
RS		 3584 /* For TLS call relocs, it is the caller's responsibility to provide
3585 the address of the appropriate trampoline. */
3586 if (r_type != R_ARM_TLS_CALL
3587 && r_type != R_ARM_THM_TLS_CALL
3588 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3589 &root_plt, &arm_plt)
3590 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3591 {
34e77a92 3592 asection *splt;
fe33d2fa 3593
34e77a92
RS		 3594 if (hash == NULL || hash->is_iplt)
3595 splt = globals->root.iplt;
3596 else
3597 splt = globals->root.splt;
3598 if (splt != NULL)
b38cadfb 3599 {
34e77a92
RS		 3600 use_plt = 1;
3601
3602 /* Note when dealing with PLT entries: the main PLT stub is in
3603 ARM mode, so if the branch is in Thumb mode, another
3604 Thumb->ARM stub will be inserted later just before the ARM
3605 PLT stub. We don't take this extra distance into account
3606 here, because if a long branch stub is needed, we'll add a
3607 Thumb->Arm one and branch directly to the ARM PLT entry
3608 because it avoids spreading offset corrections in several
3609 places. */
3610
3611 destination = (splt->output_section->vma
3612 + splt->output_offset
3613 + root_plt->offset);
3614 st_type = STT_FUNC;
3615 branch_type = ST_BRANCH_TO_ARM;
3616 }
5fa9e92f 3617 }
34e77a92
RS		 3618 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3619 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3620
fe33d2fa
CL		 3621 branch_offset = (bfd_signed_vma)(destination - location);
3622
0855e32b
NS		 3623 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3624 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3625 {
5fa9e92f
CL		 3626 /* Handle cases where:
3627 - this call goes too far (different Thumb/Thumb2 max
3628 distance)
155d87d7
CL		 3629 - it's a Thumb->Arm call and blx is not available, or it's a
3630 Thumb->Arm branch (not bl). A stub is needed in this case,
3631 but only if this call is not through a PLT entry. Indeed,
3632 PLT stubs handle mode switching already.
5fa9e92f 3633 */
906e58ca
NC		 3634 if ((!thumb2
3635 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3636 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3637 || (thumb2
3638 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3639 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3640 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3641 && (((r_type == R_ARM_THM_CALL
3642 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3643 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3644 && !use_plt))
906e58ca 3645 {
35fc36a8 3646 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3647 {
3648 /* Thumb to thumb. */
3649 if (!thumb_only)
3650 {
3651 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3652 /* PIC stubs. */
155d87d7 3653 ? ((globals->use_blx
9553db3c 3654 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3655 /* V5T and above. Stub starts with ARM code, so
3656 we must be able to switch mode before
3657 reaching it, which is only possible for 'bl'
3658 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3659 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3660 /* On V4T, use Thumb code only. */
d3626fb0 3661 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3662
3663 /* non-PIC stubs. */
155d87d7 3664 : ((globals->use_blx
9553db3c 3665 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3666 /* V5T and above. */
3667 ? arm_stub_long_branch_any_any
3668 /* V4T. */
d3626fb0 3669 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3670 }
3671 else
3672 {
3673 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3674 /* PIC stub. */
3675 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3676 /* non-PIC stub. */
3677 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3678 }
3679 }
3680 else
3681 {
3682 /* Thumb to arm. */
c820be07
NC		 3683 if (sym_sec != NULL
3684 && sym_sec->owner != NULL
3685 && !INTERWORK_FLAG (sym_sec->owner))
3686 {
3687 (*_bfd_error_handler)
3688 (_("%B(%s): warning: interworking not enabled.\n"
3689 " first occurrence: %B: Thumb call to ARM"),
3690 sym_sec->owner, input_bfd, name);
3691 }
3692
0855e32b
NS		 3693 stub_type =
3694 (info->shared | globals->pic_veneer)
c2b4a39d 3695 /* PIC stubs. */
0855e32b
NS		 3696 ? (r_type == R_ARM_THM_TLS_CALL
3697 /* TLS PIC stubs */
3698 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3699 : arm_stub_long_branch_v4t_thumb_tls_pic)
3700 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3701 /* V5T PIC and above. */
3702 ? arm_stub_long_branch_any_arm_pic
3703 /* V4T PIC stub. */
3704 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3705
3706 /* non-PIC stubs. */
0855e32b 3707 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3708 /* V5T and above. */
3709 ? arm_stub_long_branch_any_any
3710 /* V4T. */
3711 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3712
3713 /* Handle v4t short branches. */
fea2b4d6 3714 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3715 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3716 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3717 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3718 }
3719 }
3720 }
fe33d2fa
CL		 3721 else if (r_type == R_ARM_CALL
3722 || r_type == R_ARM_JUMP24
0855e32b
NS		 3723 || r_type == R_ARM_PLT32
3724 || r_type == R_ARM_TLS_CALL)
906e58ca 3725 {
35fc36a8 3726 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3727 {
3728 /* Arm to thumb. */
c820be07
NC		 3729
3730 if (sym_sec != NULL
3731 && sym_sec->owner != NULL
3732 && !INTERWORK_FLAG (sym_sec->owner))
3733 {
3734 (*_bfd_error_handler)
3735 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3736 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3737 sym_sec->owner, input_bfd, name);
3738 }
3739
3740 /* We have an extra 2-bytes reach because of
3741 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3742 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3743 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3744 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3745 || (r_type == R_ARM_JUMP24)
3746 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3747 {
3748 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3749 /* PIC stubs. */
ebe24dd4
CL		 3750 ? ((globals->use_blx)
3751 /* V5T and above. */
3752 ? arm_stub_long_branch_any_thumb_pic
3753 /* V4T stub. */
3754 : arm_stub_long_branch_v4t_arm_thumb_pic)
3755
c2b4a39d
CL		 3756 /* non-PIC stubs. */
3757 : ((globals->use_blx)
3758 /* V5T and above. */
3759 ? arm_stub_long_branch_any_any
3760 /* V4T. */
3761 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3762 }
3763 }
3764 else
3765 {
3766 /* Arm to arm. */
3767 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3768 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3769 {
0855e32b
NS		 3770 stub_type =
3771 (info->shared | globals->pic_veneer)
c2b4a39d 3772 /* PIC stubs. */
0855e32b
NS		 3773 ? (r_type == R_ARM_TLS_CALL
3774 /* TLS PIC Stub */
3775 ? arm_stub_long_branch_any_tls_pic
3776 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3777 /* non-PIC stubs. */
fea2b4d6 3778 : arm_stub_long_branch_any_any;
906e58ca
NC		 3779 }
3780 }
3781 }
3782
fe33d2fa
CL		 3783 /* If a stub is needed, record the actual destination type. */
3784 if (stub_type != arm_stub_none)
35fc36a8 3785 *actual_branch_type = branch_type;
fe33d2fa 3786
906e58ca
NC		 3787 return stub_type;
3788}
3789
3790/* Build a name for an entry in the stub hash table. */
3791
3792static char *
3793elf32_arm_stub_name (const asection *input_section,
3794 const asection *sym_sec,
3795 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3796 const Elf_Internal_Rela *rel,
3797 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3798{
3799 char *stub_name;
3800 bfd_size_type len;
3801
3802 if (hash)
3803 {
fe33d2fa 3804 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3805 stub_name = (char *) bfd_malloc (len);
906e58ca 3806 if (stub_name != NULL)
fe33d2fa 3807 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3808 input_section->id & 0xffffffff,
3809 hash->root.root.root.string,
fe33d2fa
CL		 3810 (int) rel->r_addend & 0xffffffff,
3811 (int) stub_type);
906e58ca
NC		 3812 }
3813 else
3814 {
fe33d2fa 3815 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3816 stub_name = (char *) bfd_malloc (len);
906e58ca 3817 if (stub_name != NULL)
fe33d2fa 3818 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3819 input_section->id & 0xffffffff,
3820 sym_sec->id & 0xffffffff,
0855e32b
NS		 3821 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3822 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3823 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3824 (int) rel->r_addend & 0xffffffff,
3825 (int) stub_type);
906e58ca
NC		 3826 }
3827
3828 return stub_name;
3829}
3830
3831/* Look up an entry in the stub hash. Stub entries are cached because
3832 creating the stub name takes a bit of time. */
3833
3834static struct elf32_arm_stub_hash_entry *
3835elf32_arm_get_stub_entry (const asection *input_section,
3836 const asection *sym_sec,
3837 struct elf_link_hash_entry *hash,
3838 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3839 struct elf32_arm_link_hash_table *htab,
3840 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3841{
3842 struct elf32_arm_stub_hash_entry *stub_entry;
3843 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3844 const asection *id_sec;
3845
3846 if ((input_section->flags & SEC_CODE) == 0)
3847 return NULL;
3848
3849 /* If this input section is part of a group of sections sharing one
3850 stub section, then use the id of the first section in the group.
3851 Stub names need to include a section id, as there may well be
3852 more than one stub used to reach say, printf, and we need to
3853 distinguish between them. */
3854 id_sec = htab->stub_group[input_section->id].link_sec;
3855
3856 if (h != NULL && h->stub_cache != NULL
3857 && h->stub_cache->h == h
fe33d2fa
CL		 3858 && h->stub_cache->id_sec == id_sec
3859 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3860 {
3861 stub_entry = h->stub_cache;
3862 }
3863 else
3864 {
3865 char *stub_name;
3866
fe33d2fa 3867 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3868 if (stub_name == NULL)
3869 return NULL;
3870
3871 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3872 stub_name, FALSE, FALSE);
3873 if (h != NULL)
3874 h->stub_cache = stub_entry;
3875
3876 free (stub_name);
3877 }
3878
3879 return stub_entry;
3880}
3881
48229727 3882/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3883 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3884 LINK_SEC_P may be NULL. */
906e58ca 3885
48229727
JB		 3886static asection *
3887elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3888 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3889{
3890 asection *link_sec;
3891 asection *stub_sec;
906e58ca
NC		 3892
3893 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3894 BFD_ASSERT (link_sec != NULL);
906e58ca 3895 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3896
906e58ca
NC		 3897 if (stub_sec == NULL)
3898 {
3899 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3900 if (stub_sec == NULL)
3901 {
3902 size_t namelen;
3903 bfd_size_type len;
3904 char *s_name;
3905
3906 namelen = strlen (link_sec->name);
3907 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3908 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3909 if (s_name == NULL)
3910 return NULL;
3911
3912 memcpy (s_name, link_sec->name, namelen);
3913 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3914 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3915 if (stub_sec == NULL)
3916 return NULL;
3917 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3918 }
3919 htab->stub_group[section->id].stub_sec = stub_sec;
3920 }
b38cadfb 3921
48229727
JB		 3922 if (link_sec_p)
3923 *link_sec_p = link_sec;
b38cadfb 3924
48229727
JB		 3925 return stub_sec;
3926}
3927
3928/* Add a new stub entry to the stub hash. Not all fields of the new
3929 stub entry are initialised. */
3930
3931static struct elf32_arm_stub_hash_entry *
3932elf32_arm_add_stub (const char *stub_name,
3933 asection *section,
3934 struct elf32_arm_link_hash_table *htab)
3935{
3936 asection *link_sec;
3937 asection *stub_sec;
3938 struct elf32_arm_stub_hash_entry *stub_entry;
3939
3940 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3941 if (stub_sec == NULL)
3942 return NULL;
906e58ca
NC		 3943
3944 /* Enter this entry into the linker stub hash table. */
3945 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3946 TRUE, FALSE);
3947 if (stub_entry == NULL)
3948 {
3949 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3950 section->owner,
3951 stub_name);
3952 return NULL;
3953 }
3954
3955 stub_entry->stub_sec = stub_sec;
3956 stub_entry->stub_offset = 0;
3957 stub_entry->id_sec = link_sec;
3958
906e58ca
NC		 3959 return stub_entry;
3960}
3961
3962/* Store an Arm insn into an output section not processed by
3963 elf32_arm_write_section. */
3964
3965static void
8029a119
NC		 3966put_arm_insn (struct elf32_arm_link_hash_table * htab,
3967 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3968{
3969 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3970 bfd_putl32 (val, ptr);
3971 else
3972 bfd_putb32 (val, ptr);
3973}
3974
3975/* Store a 16-bit Thumb insn into an output section not processed by
3976 elf32_arm_write_section. */
3977
3978static void
8029a119
NC		 3979put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3980 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3981{
3982 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3983 bfd_putl16 (val, ptr);
3984 else
3985 bfd_putb16 (val, ptr);
3986}
3987
0855e32b
NS		 3988/* If it's possible to change R_TYPE to a more efficient access
3989 model, return the new reloc type. */
3990
3991static unsigned
b38cadfb 3992elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 3993 struct elf_link_hash_entry *h)
3994{
3995 int is_local = (h == NULL);
3996
3997 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3998 return r_type;
3999
b38cadfb 4000 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4001 switch (r_type)
4002 {
4003 case R_ARM_TLS_GOTDESC:
4004 case R_ARM_TLS_CALL:
4005 case R_ARM_THM_TLS_CALL:
4006 case R_ARM_TLS_DESCSEQ:
4007 case R_ARM_THM_TLS_DESCSEQ:
4008 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4009 }
4010
4011 return r_type;
4012}
4013
48229727
JB		 4014static bfd_reloc_status_type elf32_arm_final_link_relocate
4015 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4016 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4017 const char *, unsigned char, enum arm_st_branch_type,
4018 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4019
4563a860
JB		 4020static unsigned int
4021arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4022{
4023 switch (stub_type)
4024 {
4025 case arm_stub_a8_veneer_b_cond:
4026 case arm_stub_a8_veneer_b:
4027 case arm_stub_a8_veneer_bl:
4028 return 2;
4029
4030 case arm_stub_long_branch_any_any:
4031 case arm_stub_long_branch_v4t_arm_thumb:
4032 case arm_stub_long_branch_thumb_only:
4033 case arm_stub_long_branch_v4t_thumb_thumb:
4034 case arm_stub_long_branch_v4t_thumb_arm:
4035 case arm_stub_short_branch_v4t_thumb_arm:
4036 case arm_stub_long_branch_any_arm_pic:
4037 case arm_stub_long_branch_any_thumb_pic:
4038 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4039 case arm_stub_long_branch_v4t_arm_thumb_pic:
4040 case arm_stub_long_branch_v4t_thumb_arm_pic:
4041 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4042 case arm_stub_long_branch_any_tls_pic:
4043 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4044 case arm_stub_a8_veneer_blx:
4045 return 4;
b38cadfb 4046
4563a860
JB		 4047 default:
4048 abort (); /* Should be unreachable. */
4049 }
4050}
4051
906e58ca
NC		 4052static bfd_boolean
4053arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4054 void * in_arg)
4055{
48229727 4056#define MAXRELOCS 2
906e58ca 4057 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4058 struct elf32_arm_link_hash_table *globals;
906e58ca 4059 struct bfd_link_info *info;
906e58ca
NC		 4060 asection *stub_sec;
4061 bfd *stub_bfd;
906e58ca
NC		 4062 bfd_byte *loc;
4063 bfd_vma sym_value;
4064 int template_size;
4065 int size;
d3ce72d0 4066 const insn_sequence *template_sequence;
906e58ca 4067 int i;
48229727
JB		 4068 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4069 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4070 int nrelocs = 0;
906e58ca
NC		 4071
4072 /* Massage our args to the form they really have. */
4073 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4074 info = (struct bfd_link_info *) in_arg;
4075
4076 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4077 if (globals == NULL)
4078 return FALSE;
906e58ca 4079
906e58ca
NC		 4080 stub_sec = stub_entry->stub_sec;
4081
4dfe6ac6 4082 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4083 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4084 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4085 return TRUE;
fe33d2fa 4086
906e58ca
NC		 4087 /* Make a note of the offset within the stubs for this entry. */
4088 stub_entry->stub_offset = stub_sec->size;
4089 loc = stub_sec->contents + stub_entry->stub_offset;
4090
4091 stub_bfd = stub_sec->owner;
4092
906e58ca
NC		 4093 /* This is the address of the stub destination. */
4094 sym_value = (stub_entry->target_value
4095 + stub_entry->target_section->output_offset
4096 + stub_entry->target_section->output_section->vma);
4097
d3ce72d0 4098 template_sequence = stub_entry->stub_template;
461a49ca 4099 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4100
4101 size = 0;
461a49ca 4102 for (i = 0; i < template_size; i++)
906e58ca 4103 {
d3ce72d0 4104 switch (template_sequence[i].type)
461a49ca
DJ		 4105 {
4106 case THUMB16_TYPE:
48229727 4107 {
d3ce72d0
NC		 4108 bfd_vma data = (bfd_vma) template_sequence[i].data;
4109 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 4110 {
4111 /* We've borrowed the reloc_addend field to mean we should
4112 insert a condition code into this (Thumb-1 branch)
4113 instruction. See THUMB16_BCOND_INSN. */
4114 BFD_ASSERT ((data & 0xff00) == 0xd000);
4115 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4116 }
fe33d2fa 4117 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4118 size += 2;
4119 }
461a49ca 4120 break;
906e58ca 4121
48229727 4122 case THUMB32_TYPE:
fe33d2fa
CL		 4123 bfd_put_16 (stub_bfd,
4124 (template_sequence[i].data >> 16) & 0xffff,
4125 loc + size);
4126 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4127 loc + size + 2);
d3ce72d0 4128 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 4129 {
4130 stub_reloc_idx[nrelocs] = i;
4131 stub_reloc_offset[nrelocs++] = size;
4132 }
4133 size += 4;
4134 break;
4135
461a49ca 4136 case ARM_TYPE:
fe33d2fa
CL		 4137 bfd_put_32 (stub_bfd, template_sequence[i].data,
4138 loc + size);
461a49ca
DJ		 4139 /* Handle cases where the target is encoded within the
4140 instruction. */
d3ce72d0 4141 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4142 {
48229727
JB		 4143 stub_reloc_idx[nrelocs] = i;
4144 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4145 }
4146 size += 4;
4147 break;
4148
4149 case DATA_TYPE:
d3ce72d0 4150 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4151 stub_reloc_idx[nrelocs] = i;
4152 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4153 size += 4;
4154 break;
4155
4156 default:
4157 BFD_FAIL ();
4158 return FALSE;
4159 }
906e58ca 4160 }
461a49ca 4161
906e58ca
NC		 4162 stub_sec->size += size;
4163
461a49ca
DJ		 4164 /* Stub size has already been computed in arm_size_one_stub. Check
4165 consistency. */
4166 BFD_ASSERT (size == stub_entry->stub_size);
4167
906e58ca 4168 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4169 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4170 sym_value |= 1;
4171
48229727
JB		 4172 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4173 in each stub. */
4174 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4175
48229727 4176 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4177 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4178 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4179 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4180 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4181 {
4182 Elf_Internal_Rela rel;
4183 bfd_boolean unresolved_reloc;
4184 char *error_message;
35fc36a8
RS		 4185 enum arm_st_branch_type branch_type
4186 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4187 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4188 bfd_vma points_to = sym_value + stub_entry->target_addend;
4189
4190 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 4191 rel.r_info = ELF32_R_INFO (0,
4192 template_sequence[stub_reloc_idx[i]].r_type);
4193 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4194
4195 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4196 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4197 template should refer back to the instruction after the original
4198 branch. */
4199 points_to = sym_value;
4200
33c6a8fc
JB		 4201 /* There may be unintended consequences if this is not true. */
4202 BFD_ASSERT (stub_entry->h == NULL);
4203
48229727
JB		 4204 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4205 properly. We should probably use this function unconditionally,
4206 rather than only for certain relocations listed in the enclosing
4207 conditional, for the sake of consistency. */
4208 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4209 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4210 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4211 points_to, info, stub_entry->target_section, "", STT_FUNC,
4212 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4213 &unresolved_reloc, &error_message);
48229727
JB		 4214 }
4215 else
4216 {
fe33d2fa
CL		 4217 Elf_Internal_Rela rel;
4218 bfd_boolean unresolved_reloc;
4219 char *error_message;
4220 bfd_vma points_to = sym_value + stub_entry->target_addend
4221 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4222
4223 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4224 rel.r_info = ELF32_R_INFO (0,
4225 template_sequence[stub_reloc_idx[i]].r_type);
4226 rel.r_addend = 0;
4227
4228 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4229 (template_sequence[stub_reloc_idx[i]].r_type),
4230 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4231 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4232 stub_entry->branch_type,
fe33d2fa
CL		 4233 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4234 &error_message);
48229727 4235 }
906e58ca
NC		 4236
4237 return TRUE;
48229727 4238#undef MAXRELOCS
906e58ca
NC		 4239}
4240
48229727
JB		 4241/* Calculate the template, template size and instruction size for a stub.
4242 Return value is the instruction size. */
906e58ca 4243
48229727
JB		 4244static unsigned int
4245find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4246 const insn_sequence **stub_template,
4247 int *stub_template_size)
906e58ca 4248{
d3ce72d0 4249 const insn_sequence *template_sequence = NULL;
48229727
JB		 4250 int template_size = 0, i;
4251 unsigned int size;
906e58ca 4252
d3ce72d0 4253 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4254 if (stub_template)
4255 *stub_template = template_sequence;
4256
48229727 4257 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4258 if (stub_template_size)
4259 *stub_template_size = template_size;
906e58ca
NC		 4260
4261 size = 0;
461a49ca
DJ		 4262 for (i = 0; i < template_size; i++)
4263 {
d3ce72d0 4264 switch (template_sequence[i].type)
461a49ca
DJ		 4265 {
4266 case THUMB16_TYPE:
4267 size += 2;
4268 break;
4269
4270 case ARM_TYPE:
48229727 4271 case THUMB32_TYPE:
461a49ca
DJ		 4272 case DATA_TYPE:
4273 size += 4;
4274 break;
4275
4276 default:
4277 BFD_FAIL ();
2a229407 4278 return 0;
461a49ca
DJ		 4279 }
4280 }
4281
48229727
JB		 4282 return size;
4283}
4284
4285/* As above, but don't actually build the stub. Just bump offset so
4286 we know stub section sizes. */
4287
4288static bfd_boolean
4289arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4290 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4291{
4292 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4293 const insn_sequence *template_sequence;
48229727
JB		 4294 int template_size, size;
4295
4296 /* Massage our args to the form they really have. */
4297 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4298
4299 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4300 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4301
d3ce72d0 4302 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4303 &template_size);
4304
461a49ca 4305 stub_entry->stub_size = size;
d3ce72d0 4306 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4307 stub_entry->stub_template_size = template_size;
4308
906e58ca
NC		 4309 size = (size + 7) & ~7;
4310 stub_entry->stub_sec->size += size;
461a49ca 4311
906e58ca
NC		 4312 return TRUE;
4313}
4314
4315/* External entry points for sizing and building linker stubs. */
4316
4317/* Set up various things so that we can make a list of input sections
4318 for each output section included in the link. Returns -1 on error,
4319 0 when no stubs will be needed, and 1 on success. */
4320
4321int
4322elf32_arm_setup_section_lists (bfd *output_bfd,
4323 struct bfd_link_info *info)
4324{
4325 bfd *input_bfd;
4326 unsigned int bfd_count;
4327 int top_id, top_index;
4328 asection *section;
4329 asection **input_list, **list;
4330 bfd_size_type amt;
4331 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4332
4dfe6ac6
NC		 4333 if (htab == NULL)
4334 return 0;
906e58ca
NC		 4335 if (! is_elf_hash_table (htab))
4336 return 0;
4337
4338 /* Count the number of input BFDs and find the top input section id. */
4339 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4340 input_bfd != NULL;
4341 input_bfd = input_bfd->link_next)
4342 {
4343 bfd_count += 1;
4344 for (section = input_bfd->sections;
4345 section != NULL;
4346 section = section->next)
4347 {
4348 if (top_id < section->id)
4349 top_id = section->id;
4350 }
4351 }
4352 htab->bfd_count = bfd_count;
4353
4354 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4355 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4356 if (htab->stub_group == NULL)
4357 return -1;
fe33d2fa 4358 htab->top_id = top_id;
906e58ca
NC		 4359
4360 /* We can't use output_bfd->section_count here to find the top output
4361 section index as some sections may have been removed, and
4362 _bfd_strip_section_from_output doesn't renumber the indices. */
4363 for (section = output_bfd->sections, top_index = 0;
4364 section != NULL;
4365 section = section->next)
4366 {
4367 if (top_index < section->index)
4368 top_index = section->index;
4369 }
4370
4371 htab->top_index = top_index;
4372 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4373 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4374 htab->input_list = input_list;
4375 if (input_list == NULL)
4376 return -1;
4377
4378 /* For sections we aren't interested in, mark their entries with a
4379 value we can check later. */
4380 list = input_list + top_index;
4381 do
4382 *list = bfd_abs_section_ptr;
4383 while (list-- != input_list);
4384
4385 for (section = output_bfd->sections;
4386 section != NULL;
4387 section = section->next)
4388 {
4389 if ((section->flags & SEC_CODE) != 0)
4390 input_list[section->index] = NULL;
4391 }
4392
4393 return 1;
4394}
4395
4396/* The linker repeatedly calls this function for each input section,
4397 in the order that input sections are linked into output sections.
4398 Build lists of input sections to determine groupings between which
4399 we may insert linker stubs. */
4400
4401void
4402elf32_arm_next_input_section (struct bfd_link_info *info,
4403 asection *isec)
4404{
4405 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4406
4dfe6ac6
NC		 4407 if (htab == NULL)
4408 return;
4409
906e58ca
NC		 4410 if (isec->output_section->index <= htab->top_index)
4411 {
4412 asection **list = htab->input_list + isec->output_section->index;
4413
a7470592 4414 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4415 {
4416 /* Steal the link_sec pointer for our list. */
4417#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4418 /* This happens to make the list in reverse order,
07d72278 4419 which we reverse later. */
906e58ca
NC		 4420 PREV_SEC (isec) = *list;
4421 *list = isec;
4422 }
4423 }
4424}
4425
4426/* See whether we can group stub sections together. Grouping stub
4427 sections may result in fewer stubs. More importantly, we need to
07d72278 4428 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4429 .fini output sections respectively, because glibc splits the
4430 _init and _fini functions into multiple parts. Putting a stub in
4431 the middle of a function is not a good idea. */
4432
4433static void
4434group_sections (struct elf32_arm_link_hash_table *htab,
4435 bfd_size_type stub_group_size,
07d72278 4436 bfd_boolean stubs_always_after_branch)
906e58ca 4437{
07d72278 4438 asection **list = htab->input_list;
906e58ca
NC		 4439
4440 do
4441 {
4442 asection *tail = *list;
07d72278 4443 asection *head;
906e58ca
NC		 4444
4445 if (tail == bfd_abs_section_ptr)
4446 continue;
4447
07d72278
DJ		 4448 /* Reverse the list: we must avoid placing stubs at the
4449 beginning of the section because the beginning of the text
4450 section may be required for an interrupt vector in bare metal
4451 code. */
4452#define NEXT_SEC PREV_SEC
e780aef2
CL		 4453 head = NULL;
4454 while (tail != NULL)
4455 {
4456 /* Pop from tail. */
4457 asection *item = tail;
4458 tail = PREV_SEC (item);
4459
4460 /* Push on head. */
4461 NEXT_SEC (item) = head;
4462 head = item;
4463 }
07d72278
DJ		 4464
4465 while (head != NULL)
906e58ca
NC		 4466 {
4467 asection *curr;
07d72278 4468 asection *next;
e780aef2
CL		 4469 bfd_vma stub_group_start = head->output_offset;
4470 bfd_vma end_of_next;
906e58ca 4471
07d72278 4472 curr = head;
e780aef2 4473 while (NEXT_SEC (curr) != NULL)
8cd931b7 4474 {
e780aef2
CL		 4475 next = NEXT_SEC (curr);
4476 end_of_next = next->output_offset + next->size;
4477 if (end_of_next - stub_group_start >= stub_group_size)
4478 /* End of NEXT is too far from start, so stop. */
8cd931b7 4479 break;
e780aef2
CL		 4480 /* Add NEXT to the group. */
4481 curr = next;
8cd931b7 4482 }
906e58ca 4483
07d72278 4484 /* OK, the size from the start to the start of CURR is less
906e58ca 4485 than stub_group_size and thus can be handled by one stub
07d72278 4486 section. (Or the head section is itself larger than
906e58ca
NC		 4487 stub_group_size, in which case we may be toast.)
4488 We should really be keeping track of the total size of
4489 stubs added here, as stubs contribute to the final output
7fb9f789 4490 section size. */
906e58ca
NC		 4491 do
4492 {
07d72278 4493 next = NEXT_SEC (head);
906e58ca 4494 /* Set up this stub group. */
07d72278 4495 htab->stub_group[head->id].link_sec = curr;
906e58ca 4496 }
07d72278 4497 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4498
4499 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4500 bytes after the stub section can be handled by it too. */
4501 if (!stubs_always_after_branch)
906e58ca 4502 {
e780aef2
CL		 4503 stub_group_start = curr->output_offset + curr->size;
4504
8cd931b7 4505 while (next != NULL)
906e58ca 4506 {
e780aef2
CL		 4507 end_of_next = next->output_offset + next->size;
4508 if (end_of_next - stub_group_start >= stub_group_size)
4509 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4510 break;
e780aef2 4511 /* Add NEXT to the stub group. */
07d72278
DJ		 4512 head = next;
4513 next = NEXT_SEC (head);
4514 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4515 }
4516 }
07d72278 4517 head = next;
906e58ca
NC		 4518 }
4519 }
07d72278 4520 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4521
4522 free (htab->input_list);
4523#undef PREV_SEC
07d72278 4524#undef NEXT_SEC
906e58ca
NC		 4525}
4526
48229727
JB		 4527/* Comparison function for sorting/searching relocations relating to Cortex-A8
4528 erratum fix. */
4529
4530static int
4531a8_reloc_compare (const void *a, const void *b)
4532{
21d799b5
NC		 4533 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4534 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4535
4536 if (ra->from < rb->from)
4537 return -1;
4538 else if (ra->from > rb->from)
4539 return 1;
4540 else
4541 return 0;
4542}
4543
4544static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4545 const char *, char **);
4546
4547/* Helper function to scan code for sequences which might trigger the Cortex-A8
4548 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4549 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4550 otherwise. */
4551
81694485
NC		 4552static bfd_boolean
4553cortex_a8_erratum_scan (bfd *input_bfd,
4554 struct bfd_link_info *info,
48229727
JB		 4555 struct a8_erratum_fix **a8_fixes_p,
4556 unsigned int *num_a8_fixes_p,
4557 unsigned int *a8_fix_table_size_p,
4558 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4559 unsigned int num_a8_relocs,
4560 unsigned prev_num_a8_fixes,
4561 bfd_boolean *stub_changed_p)
48229727
JB		 4562{
4563 asection *section;
4564 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4565 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4566 unsigned int num_a8_fixes = *num_a8_fixes_p;
4567 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4568
4dfe6ac6
NC		 4569 if (htab == NULL)
4570 return FALSE;
4571
48229727
JB		 4572 for (section = input_bfd->sections;
4573 section != NULL;
4574 section = section->next)
4575 {
4576 bfd_byte *contents = NULL;
4577 struct _arm_elf_section_data *sec_data;
4578 unsigned int span;
4579 bfd_vma base_vma;
4580
4581 if (elf_section_type (section) != SHT_PROGBITS
4582 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4583 || (section->flags & SEC_EXCLUDE) != 0
dbaa2011 4584 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
48229727
JB		 4585 || (section->output_section == bfd_abs_section_ptr))
4586 continue;
4587
4588 base_vma = section->output_section->vma + section->output_offset;
4589
4590 if (elf_section_data (section)->this_hdr.contents != NULL)
4591 contents = elf_section_data (section)->this_hdr.contents;
4592 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4593 return TRUE;
48229727
JB		 4594
4595 sec_data = elf32_arm_section_data (section);
4596
4597 for (span = 0; span < sec_data->mapcount; span++)
4598 {
4599 unsigned int span_start = sec_data->map[span].vma;
4600 unsigned int span_end = (span == sec_data->mapcount - 1)
4601 ? section->size : sec_data->map[span + 1].vma;
4602 unsigned int i;
4603 char span_type = sec_data->map[span].type;
4604 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4605
4606 if (span_type != 't')
4607 continue;
4608
4609 /* Span is entirely within a single 4KB region: skip scanning. */
4610 if (((base_vma + span_start) & ~0xfff)
4611 == ((base_vma + span_end) & ~0xfff))
4612 continue;
4613
4614 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4615
4616 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4617 * The branch target is in the same 4KB region as the
4618 first half of the branch.
4619 * The instruction before the branch is a 32-bit
81694485 4620 length non-branch instruction. */
48229727
JB		 4621 for (i = span_start; i < span_end;)
4622 {
4623 unsigned int insn = bfd_getl16 (&contents[i]);
4624 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4625 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4626
4627 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4628 insn_32bit = TRUE;
4629
4630 if (insn_32bit)
4631 {
4632 /* Load the rest of the insn (in manual-friendly order). */
4633 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4634
4635 /* Encoding T4: B<c>.W. */
4636 is_b = (insn & 0xf800d000) == 0xf0009000;
4637 /* Encoding T1: BL<c>.W. */
4638 is_bl = (insn & 0xf800d000) == 0xf000d000;
4639 /* Encoding T2: BLX<c>.W. */
4640 is_blx = (insn & 0xf800d000) == 0xf000c000;
4641 /* Encoding T3: B<c>.W (not permitted in IT block). */
4642 is_bcc = (insn & 0xf800d000) == 0xf0008000
4643 && (insn & 0x07f00000) != 0x03800000;
4644 }
4645
4646 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4647
81694485
NC		 4648 if (((base_vma + i) & 0xfff) == 0xffe
4649 && insn_32bit
4650 && is_32bit_branch
4651 && last_was_32bit
4652 && ! last_was_branch)
48229727 4653 {
8f73510c 4654 bfd_signed_vma offset = 0;
48229727
JB		 4655 bfd_boolean force_target_arm = FALSE;
4656 bfd_boolean force_target_thumb = FALSE;
4657 bfd_vma target;
4658 enum elf32_arm_stub_type stub_type = arm_stub_none;
4659 struct a8_erratum_reloc key, *found;
7d24e6a6 4660 bfd_boolean use_plt = FALSE;
48229727
JB		 4661
4662 key.from = base_vma + i;
21d799b5
NC		 4663 found = (struct a8_erratum_reloc *)
4664 bsearch (&key, a8_relocs, num_a8_relocs,
4665 sizeof (struct a8_erratum_reloc),
4666 &a8_reloc_compare);
48229727
JB		 4667
4668 if (found)
4669 {
4670 char *error_message = NULL;
4671 struct elf_link_hash_entry *entry;
4672
4673 /* We don't care about the error returned from this
4674 function, only if there is glue or not. */
4675 entry = find_thumb_glue (info, found->sym_name,
4676 &error_message);
4677
4678 if (entry)
4679 found->non_a8_stub = TRUE;
4680
92750f34 4681 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4682 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4683 && found->hash->root.plt.offset != (bfd_vma) -1)
4684 use_plt = TRUE;
4685
4686 if (found->r_type == R_ARM_THM_CALL)
4687 {
35fc36a8
RS		 4688 if (found->branch_type == ST_BRANCH_TO_ARM
4689 || use_plt)
92750f34
DJ		 4690 force_target_arm = TRUE;
4691 else
4692 force_target_thumb = TRUE;
4693 }
48229727
JB		 4694 }
4695
4696 /* Check if we have an offending branch instruction. */
4697
4698 if (found && found->non_a8_stub)
4699 /* We've already made a stub for this instruction, e.g.
4700 it's a long branch or a Thumb->ARM stub. Assume that
4701 stub will suffice to work around the A8 erratum (see
4702 setting of always_after_branch above). */
4703 ;
4704 else if (is_bcc)
4705 {
4706 offset = (insn & 0x7ff) << 1;
4707 offset |= (insn & 0x3f0000) >> 4;
4708 offset |= (insn & 0x2000) ? 0x40000 : 0;
4709 offset |= (insn & 0x800) ? 0x80000 : 0;
4710 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4711 if (offset & 0x100000)
81694485 4712 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4713 stub_type = arm_stub_a8_veneer_b_cond;
4714 }
4715 else if (is_b || is_bl || is_blx)
4716 {
4717 int s = (insn & 0x4000000) != 0;
4718 int j1 = (insn & 0x2000) != 0;
4719 int j2 = (insn & 0x800) != 0;
4720 int i1 = !(j1 ^ s);
4721 int i2 = !(j2 ^ s);
4722
4723 offset = (insn & 0x7ff) << 1;
4724 offset |= (insn & 0x3ff0000) >> 4;
4725 offset |= i2 << 22;
4726 offset |= i1 << 23;
4727 offset |= s << 24;
4728 if (offset & 0x1000000)
81694485 4729 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4730
4731 if (is_blx)
81694485 4732 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4733
4734 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4735 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4736 }
4737
4738 if (stub_type != arm_stub_none)
4739 {
4740 bfd_vma pc_for_insn = base_vma + i + 4;
4741
4742 /* The original instruction is a BL, but the target is
4743 an ARM instruction. If we were not making a stub,
4744 the BL would have been converted to a BLX. Use the
4745 BLX stub instead in that case. */
4746 if (htab->use_blx && force_target_arm
4747 && stub_type == arm_stub_a8_veneer_bl)
4748 {
4749 stub_type = arm_stub_a8_veneer_blx;
4750 is_blx = TRUE;
4751 is_bl = FALSE;
4752 }
4753 /* Conversely, if the original instruction was
4754 BLX but the target is Thumb mode, use the BL
4755 stub. */
4756 else if (force_target_thumb
4757 && stub_type == arm_stub_a8_veneer_blx)
4758 {
4759 stub_type = arm_stub_a8_veneer_bl;
4760 is_blx = FALSE;
4761 is_bl = TRUE;
4762 }
4763
4764 if (is_blx)
81694485 4765 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4766
4767 /* If we found a relocation, use the proper destination,
4768 not the offset in the (unrelocated) instruction.
4769 Note this is always done if we switched the stub type
4770 above. */
4771 if (found)
81694485
NC		 4772 offset =
4773 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4774
7d24e6a6
RS		 4775 /* If the stub will use a Thumb-mode branch to a
4776 PLT target, redirect it to the preceding Thumb
4777 entry point. */
4778 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4779 offset -= PLT_THUMB_STUB_SIZE;
4780
48229727
JB		 4781 target = pc_for_insn + offset;
4782
4783 /* The BLX stub is ARM-mode code. Adjust the offset to
4784 take the different PC value (+8 instead of +4) into
4785 account. */
4786 if (stub_type == arm_stub_a8_veneer_blx)
4787 offset += 4;
4788
4789 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4790 {
eb7c4339 4791 char *stub_name = NULL;
48229727
JB		 4792
4793 if (num_a8_fixes == a8_fix_table_size)
4794 {
4795 a8_fix_table_size *= 2;
21d799b5
NC		 4796 a8_fixes = (struct a8_erratum_fix *)
4797 bfd_realloc (a8_fixes,
4798 sizeof (struct a8_erratum_fix)
4799 * a8_fix_table_size);
48229727
JB		 4800 }
4801
eb7c4339
NS		 4802 if (num_a8_fixes < prev_num_a8_fixes)
4803 {
4804 /* If we're doing a subsequent scan,
4805 check if we've found the same fix as
4806 before, and try and reuse the stub
4807 name. */
4808 stub_name = a8_fixes[num_a8_fixes].stub_name;
4809 if ((a8_fixes[num_a8_fixes].section != section)
4810 || (a8_fixes[num_a8_fixes].offset != i))
4811 {
4812 free (stub_name);
4813 stub_name = NULL;
4814 *stub_changed_p = TRUE;
4815 }
4816 }
4817
4818 if (!stub_name)
4819 {
21d799b5 4820 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4821 if (stub_name != NULL)
4822 sprintf (stub_name, "%x:%x", section->id, i);
4823 }
48229727
JB		 4824
4825 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4826 a8_fixes[num_a8_fixes].section = section;
4827 a8_fixes[num_a8_fixes].offset = i;
4828 a8_fixes[num_a8_fixes].addend = offset;
4829 a8_fixes[num_a8_fixes].orig_insn = insn;
4830 a8_fixes[num_a8_fixes].stub_name = stub_name;
4831 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4832 a8_fixes[num_a8_fixes].branch_type =
4833 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4834
4835 num_a8_fixes++;
4836 }
4837 }
4838 }
4839
4840 i += insn_32bit ? 4 : 2;
4841 last_was_32bit = insn_32bit;
4842 last_was_branch = is_32bit_branch;
4843 }
4844 }
4845
4846 if (elf_section_data (section)->this_hdr.contents == NULL)
4847 free (contents);
4848 }
fe33d2fa 4849
48229727
JB		 4850 *a8_fixes_p = a8_fixes;
4851 *num_a8_fixes_p = num_a8_fixes;
4852 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4853
81694485 4854 return FALSE;
48229727
JB		 4855}
4856
906e58ca
NC		 4857/* Determine and set the size of the stub section for a final link.
4858
4859 The basic idea here is to examine all the relocations looking for
4860 PC-relative calls to a target that is unreachable with a "bl"
4861 instruction. */
4862
4863bfd_boolean
4864elf32_arm_size_stubs (bfd *output_bfd,
4865 bfd *stub_bfd,
4866 struct bfd_link_info *info,
4867 bfd_signed_vma group_size,
4868 asection * (*add_stub_section) (const char *, asection *),
4869 void (*layout_sections_again) (void))
4870{
4871 bfd_size_type stub_group_size;
07d72278 4872 bfd_boolean stubs_always_after_branch;
906e58ca 4873 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4874 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4875 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4876 struct a8_erratum_reloc *a8_relocs = NULL;
4877 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4878
4dfe6ac6
NC		 4879 if (htab == NULL)
4880 return FALSE;
4881
48229727
JB		 4882 if (htab->fix_cortex_a8)
4883 {
21d799b5
NC		 4884 a8_fixes = (struct a8_erratum_fix *)
4885 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4886 a8_relocs = (struct a8_erratum_reloc *)
4887 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4888 }
906e58ca
NC		 4889
4890 /* Propagate mach to stub bfd, because it may not have been
4891 finalized when we created stub_bfd. */
4892 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4893 bfd_get_mach (output_bfd));
4894
4895 /* Stash our params away. */
4896 htab->stub_bfd = stub_bfd;
4897 htab->add_stub_section = add_stub_section;
4898 htab->layout_sections_again = layout_sections_again;
07d72278 4899 stubs_always_after_branch = group_size < 0;
48229727
JB		 4900
4901 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4902 as the first half of a 32-bit branch straddling two 4K pages. This is a
4903 crude way of enforcing that. */
4904 if (htab->fix_cortex_a8)
4905 stubs_always_after_branch = 1;
4906
906e58ca
NC		 4907 if (group_size < 0)
4908 stub_group_size = -group_size;
4909 else
4910 stub_group_size = group_size;
4911
4912 if (stub_group_size == 1)
4913 {
4914 /* Default values. */
4915 /* Thumb branch range is +-4MB has to be used as the default
4916 maximum size (a given section can contain both ARM and Thumb
4917 code, so the worst case has to be taken into account).
4918
4919 This value is 24K less than that, which allows for 2025
4920 12-byte stubs. If we exceed that, then we will fail to link.
4921 The user will have to relink with an explicit group size
4922 option. */
4923 stub_group_size = 4170000;
4924 }
4925
07d72278 4926 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4927
3ae046cc
NS		 4928 /* If we're applying the cortex A8 fix, we need to determine the
4929 program header size now, because we cannot change it later --
4930 that could alter section placements. Notice the A8 erratum fix
4931 ends up requiring the section addresses to remain unchanged
4932 modulo the page size. That's something we cannot represent
4933 inside BFD, and we don't want to force the section alignment to
4934 be the page size. */
4935 if (htab->fix_cortex_a8)
4936 (*htab->layout_sections_again) ();
4937
906e58ca
NC		 4938 while (1)
4939 {
4940 bfd *input_bfd;
4941 unsigned int bfd_indx;
4942 asection *stub_sec;
eb7c4339
NS		 4943 bfd_boolean stub_changed = FALSE;
4944 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4945
48229727 4946 num_a8_fixes = 0;
906e58ca
NC		 4947 for (input_bfd = info->input_bfds, bfd_indx = 0;
4948 input_bfd != NULL;
4949 input_bfd = input_bfd->link_next, bfd_indx++)
4950 {
4951 Elf_Internal_Shdr *symtab_hdr;
4952 asection *section;
4953 Elf_Internal_Sym *local_syms = NULL;
4954
adbcc655
RM		 4955 if (!is_arm_elf (input_bfd))
4956 continue;
4957
48229727
JB		 4958 num_a8_relocs = 0;
4959
906e58ca
NC		 4960 /* We'll need the symbol table in a second. */
4961 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4962 if (symtab_hdr->sh_info == 0)
4963 continue;
4964
4965 /* Walk over each section attached to the input bfd. */
4966 for (section = input_bfd->sections;
4967 section != NULL;
4968 section = section->next)
4969 {
4970 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4971
4972 /* If there aren't any relocs, then there's nothing more
4973 to do. */
4974 if ((section->flags & SEC_RELOC) == 0
4975 || section->reloc_count == 0
4976 || (section->flags & SEC_CODE) == 0)
4977 continue;
4978
4979 /* If this section is a link-once section that will be
4980 discarded, then don't create any stubs. */
4981 if (section->output_section == NULL
4982 || section->output_section->owner != output_bfd)
4983 continue;
4984
4985 /* Get the relocs. */
4986 internal_relocs
4987 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4988 NULL, info->keep_memory);
4989 if (internal_relocs == NULL)
4990 goto error_ret_free_local;
4991
4992 /* Now examine each relocation. */
4993 irela = internal_relocs;
4994 irelaend = irela + section->reloc_count;
4995 for (; irela < irelaend; irela++)
4996 {
4997 unsigned int r_type, r_indx;
4998 enum elf32_arm_stub_type stub_type;
4999 struct elf32_arm_stub_hash_entry *stub_entry;
5000 asection *sym_sec;
5001 bfd_vma sym_value;
5002 bfd_vma destination;
5003 struct elf32_arm_link_hash_entry *hash;
7413f23f 5004 const char *sym_name;
906e58ca
NC		 5005 char *stub_name;
5006 const asection *id_sec;
34e77a92 5007 unsigned char st_type;
35fc36a8 5008 enum arm_st_branch_type branch_type;
48229727 5009 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5010
5011 r_type = ELF32_R_TYPE (irela->r_info);
5012 r_indx = ELF32_R_SYM (irela->r_info);
5013
5014 if (r_type >= (unsigned int) R_ARM_max)
5015 {
5016 bfd_set_error (bfd_error_bad_value);
5017 error_ret_free_internal:
5018 if (elf_section_data (section)->relocs == NULL)
5019 free (internal_relocs);
5020 goto error_ret_free_local;
5021 }
b38cadfb 5022
0855e32b
NS		 5023 hash = NULL;
5024 if (r_indx >= symtab_hdr->sh_info)
5025 hash = elf32_arm_hash_entry
5026 (elf_sym_hashes (input_bfd)
5027 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5028
0855e32b
NS		 5029 /* Only look for stubs on branch instructions, or
5030 non-relaxed TLSCALL */
906e58ca 5031 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5032 && (r_type != (unsigned int) R_ARM_THM_CALL)
5033 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5034 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5035 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5036 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5037 && (r_type != (unsigned int) R_ARM_PLT32)
5038 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5039 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5040 && r_type == elf32_arm_tls_transition
5041 (info, r_type, &hash->root)
5042 && ((hash ? hash->tls_type
5043 : (elf32_arm_local_got_tls_type
5044 (input_bfd)[r_indx]))
5045 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5046 continue;
5047
5048 /* Now determine the call target, its name, value,
5049 section. */
5050 sym_sec = NULL;
5051 sym_value = 0;
5052 destination = 0;
7413f23f 5053 sym_name = NULL;
b38cadfb 5054
0855e32b
NS		 5055 if (r_type == (unsigned int) R_ARM_TLS_CALL
5056 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5057 {
5058 /* A non-relaxed TLS call. The target is the
5059 plt-resident trampoline and nothing to do
5060 with the symbol. */
5061 BFD_ASSERT (htab->tls_trampoline > 0);
5062 sym_sec = htab->root.splt;
5063 sym_value = htab->tls_trampoline;
5064 hash = 0;
34e77a92 5065 st_type = STT_FUNC;
35fc36a8 5066 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5067 }
5068 else if (!hash)
906e58ca
NC		 5069 {
5070 /* It's a local symbol. */
5071 Elf_Internal_Sym *sym;
906e58ca
NC		 5072
5073 if (local_syms == NULL)
5074 {
5075 local_syms
5076 = (Elf_Internal_Sym *) symtab_hdr->contents;
5077 if (local_syms == NULL)
5078 local_syms
5079 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5080 symtab_hdr->sh_info, 0,
5081 NULL, NULL, NULL);
5082 if (local_syms == NULL)
5083 goto error_ret_free_internal;
5084 }
5085
5086 sym = local_syms + r_indx;
f6d250ce
TS		 5087 if (sym->st_shndx == SHN_UNDEF)
5088 sym_sec = bfd_und_section_ptr;
5089 else if (sym->st_shndx == SHN_ABS)
5090 sym_sec = bfd_abs_section_ptr;
5091 else if (sym->st_shndx == SHN_COMMON)
5092 sym_sec = bfd_com_section_ptr;
5093 else
5094 sym_sec =
5095 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5096
ffcb4889
NS		 5097 if (!sym_sec)
5098 /* This is an undefined symbol. It can never
5099 be resolved. */
5100 continue;
fe33d2fa 5101
906e58ca
NC		 5102 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5103 sym_value = sym->st_value;
5104 destination = (sym_value + irela->r_addend
5105 + sym_sec->output_offset
5106 + sym_sec->output_section->vma);
34e77a92 5107 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5108 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5109 sym_name
5110 = bfd_elf_string_from_elf_section (input_bfd,
5111 symtab_hdr->sh_link,
5112 sym->st_name);
906e58ca
NC		 5113 }
5114 else
5115 {
5116 /* It's an external symbol. */
906e58ca
NC		 5117 while (hash->root.root.type == bfd_link_hash_indirect
5118 || hash->root.root.type == bfd_link_hash_warning)
5119 hash = ((struct elf32_arm_link_hash_entry *)
5120 hash->root.root.u.i.link);
5121
5122 if (hash->root.root.type == bfd_link_hash_defined
5123 || hash->root.root.type == bfd_link_hash_defweak)
5124 {
5125 sym_sec = hash->root.root.u.def.section;
5126 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5127
5128 struct elf32_arm_link_hash_table *globals =
5129 elf32_arm_hash_table (info);
5130
5131 /* For a destination in a shared library,
5132 use the PLT stub as target address to
5133 decide whether a branch stub is
5134 needed. */
4dfe6ac6 5135 if (globals != NULL
362d30a1 5136 && globals->root.splt != NULL
4dfe6ac6 5137 && hash != NULL
022f8312
CL		 5138 && hash->root.plt.offset != (bfd_vma) -1)
5139 {
362d30a1 5140 sym_sec = globals->root.splt;
022f8312
CL		 5141 sym_value = hash->root.plt.offset;
5142 if (sym_sec->output_section != NULL)
5143 destination = (sym_value
5144 + sym_sec->output_offset
5145 + sym_sec->output_section->vma);
5146 }
5147 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5148 destination = (sym_value + irela->r_addend
5149 + sym_sec->output_offset
5150 + sym_sec->output_section->vma);
5151 }
69c5861e
CL		 5152 else if ((hash->root.root.type == bfd_link_hash_undefined)
5153 || (hash->root.root.type == bfd_link_hash_undefweak))
5154 {
5155 /* For a shared library, use the PLT stub as
5156 target address to decide whether a long
5157 branch stub is needed.
5158 For absolute code, they cannot be handled. */
5159 struct elf32_arm_link_hash_table *globals =
5160 elf32_arm_hash_table (info);
5161
4dfe6ac6 5162 if (globals != NULL
362d30a1 5163 && globals->root.splt != NULL
4dfe6ac6 5164 && hash != NULL
69c5861e
CL		 5165 && hash->root.plt.offset != (bfd_vma) -1)
5166 {
362d30a1 5167 sym_sec = globals->root.splt;
69c5861e
CL		 5168 sym_value = hash->root.plt.offset;
5169 if (sym_sec->output_section != NULL)
5170 destination = (sym_value
5171 + sym_sec->output_offset
5172 + sym_sec->output_section->vma);
5173 }
5174 else
5175 continue;
5176 }
906e58ca
NC		 5177 else
5178 {
5179 bfd_set_error (bfd_error_bad_value);
5180 goto error_ret_free_internal;
5181 }
34e77a92 5182 st_type = hash->root.type;
35fc36a8 5183 branch_type = hash->root.target_internal;
7413f23f 5184 sym_name = hash->root.root.root.string;
906e58ca
NC		 5185 }
5186
48229727 5187 do
7413f23f 5188 {
48229727
JB		 5189 /* Determine what (if any) linker stub is needed. */
5190 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5191 st_type, &branch_type,
5192 hash, destination, sym_sec,
48229727
JB		 5193 input_bfd, sym_name);
5194 if (stub_type == arm_stub_none)
5195 break;
5196
5197 /* Support for grouping stub sections. */
5198 id_sec = htab->stub_group[section->id].link_sec;
5199
5200 /* Get the name of this stub. */
5201 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5202 irela, stub_type);
48229727
JB		 5203 if (!stub_name)
5204 goto error_ret_free_internal;
5205
5206 /* We've either created a stub for this reloc already,
5207 or we are about to. */
5208 created_stub = TRUE;
5209
5210 stub_entry = arm_stub_hash_lookup
5211 (&htab->stub_hash_table, stub_name,
5212 FALSE, FALSE);
5213 if (stub_entry != NULL)
5214 {
5215 /* The proper stub has already been created. */
5216 free (stub_name);
eb7c4339 5217 stub_entry->target_value = sym_value;
48229727
JB		 5218 break;
5219 }
7413f23f 5220
48229727
JB		 5221 stub_entry = elf32_arm_add_stub (stub_name, section,
5222 htab);
5223 if (stub_entry == NULL)
5224 {
5225 free (stub_name);
5226 goto error_ret_free_internal;
5227 }
7413f23f 5228
48229727
JB		 5229 stub_entry->target_value = sym_value;
5230 stub_entry->target_section = sym_sec;
5231 stub_entry->stub_type = stub_type;
5232 stub_entry->h = hash;
35fc36a8 5233 stub_entry->branch_type = branch_type;
48229727
JB		 5234
5235 if (sym_name == NULL)
5236 sym_name = "unnamed";
21d799b5
NC		 5237 stub_entry->output_name = (char *)
5238 bfd_alloc (htab->stub_bfd,
48229727
JB		 5239 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5240 + strlen (sym_name));
5241 if (stub_entry->output_name == NULL)
5242 {
5243 free (stub_name);
5244 goto error_ret_free_internal;
5245 }
5246
5247 /* For historical reasons, use the existing names for
5248 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 5249 if ((r_type == (unsigned int) R_ARM_THM_CALL
5250 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5251 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 5252 sprintf (stub_entry->output_name,
5253 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 5254 else if ((r_type == (unsigned int) R_ARM_CALL
5255 || r_type == (unsigned int) R_ARM_JUMP24)
5256 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 5257 sprintf (stub_entry->output_name,
5258 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5259 else
5260 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5261 sym_name);
5262
5263 stub_changed = TRUE;
5264 }
5265 while (0);
5266
5267 /* Look for relocations which might trigger Cortex-A8
5268 erratum. */
5269 if (htab->fix_cortex_a8
5270 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5271 || r_type == (unsigned int) R_ARM_THM_JUMP19
5272 || r_type == (unsigned int) R_ARM_THM_CALL
5273 || r_type == (unsigned int) R_ARM_THM_XPC22))
5274 {
5275 bfd_vma from = section->output_section->vma
5276 + section->output_offset
5277 + irela->r_offset;
5278
5279 if ((from & 0xfff) == 0xffe)
5280 {
5281 /* Found a candidate. Note we haven't checked the
5282 destination is within 4K here: if we do so (and
5283 don't create an entry in a8_relocs) we can't tell
5284 that a branch should have been relocated when
5285 scanning later. */
5286 if (num_a8_relocs == a8_reloc_table_size)
5287 {
5288 a8_reloc_table_size *= 2;
21d799b5
NC		 5289 a8_relocs = (struct a8_erratum_reloc *)
5290 bfd_realloc (a8_relocs,
5291 sizeof (struct a8_erratum_reloc)
5292 * a8_reloc_table_size);
48229727
JB		 5293 }
5294
5295 a8_relocs[num_a8_relocs].from = from;
5296 a8_relocs[num_a8_relocs].destination = destination;
5297 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 5298 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 5299 a8_relocs[num_a8_relocs].sym_name = sym_name;
5300 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 5301 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 5302
5303 num_a8_relocs++;
5304 }
5305 }
906e58ca
NC		 5306 }
5307
48229727
JB		 5308 /* We're done with the internal relocs, free them. */
5309 if (elf_section_data (section)->relocs == NULL)
5310 free (internal_relocs);
5311 }
5312
5313 if (htab->fix_cortex_a8)
5314 {
5315 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 5316 qsort (a8_relocs, num_a8_relocs,
5317 sizeof (struct a8_erratum_reloc),
48229727
JB		 5318 &a8_reloc_compare);
5319
5320 /* Scan for branches which might trigger Cortex-A8 erratum. */
5321 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5322 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5323 a8_relocs, num_a8_relocs,
5324 prev_num_a8_fixes, &stub_changed)
5325 != 0)
48229727 5326 goto error_ret_free_local;
5e681ec4 5327 }
5e681ec4
PB		 5328 }
5329
eb7c4339 5330 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 5331 stub_changed = TRUE;
5332
906e58ca
NC		 5333 if (!stub_changed)
5334 break;
5e681ec4 5335
906e58ca
NC		 5336 /* OK, we've added some stubs. Find out the new size of the
5337 stub sections. */
5338 for (stub_sec = htab->stub_bfd->sections;
5339 stub_sec != NULL;
5340 stub_sec = stub_sec->next)
3e6b1042
DJ		 5341 {
5342 /* Ignore non-stub sections. */
5343 if (!strstr (stub_sec->name, STUB_SUFFIX))
5344 continue;
5345
5346 stub_sec->size = 0;
5347 }
b34b2d70 5348
906e58ca
NC		 5349 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5350
48229727
JB		 5351 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5352 if (htab->fix_cortex_a8)
5353 for (i = 0; i < num_a8_fixes; i++)
5354 {
5355 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5356 a8_fixes[i].section, htab);
5357
5358 if (stub_sec == NULL)
5359 goto error_ret_free_local;
5360
5361 stub_sec->size
5362 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5363 NULL);
5364 }
5365
5366
906e58ca
NC		 5367 /* Ask the linker to do its stuff. */
5368 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5369 }
5370
48229727
JB		 5371 /* Add stubs for Cortex-A8 erratum fixes now. */
5372 if (htab->fix_cortex_a8)
5373 {
5374 for (i = 0; i < num_a8_fixes; i++)
5375 {
5376 struct elf32_arm_stub_hash_entry *stub_entry;
5377 char *stub_name = a8_fixes[i].stub_name;
5378 asection *section = a8_fixes[i].section;
5379 unsigned int section_id = a8_fixes[i].section->id;
5380 asection *link_sec = htab->stub_group[section_id].link_sec;
5381 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 5382 const insn_sequence *template_sequence;
48229727
JB		 5383 int template_size, size = 0;
5384
5385 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5386 TRUE, FALSE);
5387 if (stub_entry == NULL)
5388 {
5389 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5390 section->owner,
5391 stub_name);
5392 return FALSE;
5393 }
5394
5395 stub_entry->stub_sec = stub_sec;
5396 stub_entry->stub_offset = 0;
5397 stub_entry->id_sec = link_sec;
5398 stub_entry->stub_type = a8_fixes[i].stub_type;
5399 stub_entry->target_section = a8_fixes[i].section;
5400 stub_entry->target_value = a8_fixes[i].offset;
5401 stub_entry->target_addend = a8_fixes[i].addend;
5402 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5403 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5404
d3ce72d0
NC		 5405 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5406 &template_sequence,
48229727
JB		 5407 &template_size);
5408
5409 stub_entry->stub_size = size;
d3ce72d0 5410 stub_entry->stub_template = template_sequence;
48229727
JB		 5411 stub_entry->stub_template_size = template_size;
5412 }
5413
5414 /* Stash the Cortex-A8 erratum fix array for use later in
5415 elf32_arm_write_section(). */
5416 htab->a8_erratum_fixes = a8_fixes;
5417 htab->num_a8_erratum_fixes = num_a8_fixes;
5418 }
5419 else
5420 {
5421 htab->a8_erratum_fixes = NULL;
5422 htab->num_a8_erratum_fixes = 0;
5423 }
906e58ca
NC		 5424 return TRUE;
5425
5426 error_ret_free_local:
5427 return FALSE;
5e681ec4
PB		 5428}
5429
906e58ca
NC		 5430/* Build all the stubs associated with the current output file. The
5431 stubs are kept in a hash table attached to the main linker hash
5432 table. We also set up the .plt entries for statically linked PIC
5433 functions here. This function is called via arm_elf_finish in the
5434 linker. */
252b5132 5435
906e58ca
NC		 5436bfd_boolean
5437elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5438{
906e58ca
NC		 5439 asection *stub_sec;
5440 struct bfd_hash_table *table;
5441 struct elf32_arm_link_hash_table *htab;
252b5132 5442
906e58ca 5443 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5444 if (htab == NULL)
5445 return FALSE;
252b5132 5446
906e58ca
NC		 5447 for (stub_sec = htab->stub_bfd->sections;
5448 stub_sec != NULL;
5449 stub_sec = stub_sec->next)
252b5132 5450 {
906e58ca
NC		 5451 bfd_size_type size;
5452
8029a119 5453 /* Ignore non-stub sections. */
906e58ca
NC		 5454 if (!strstr (stub_sec->name, STUB_SUFFIX))
5455 continue;
5456
5457 /* Allocate memory to hold the linker stubs. */
5458 size = stub_sec->size;
21d799b5 5459 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5460 if (stub_sec->contents == NULL && size != 0)
5461 return FALSE;
5462 stub_sec->size = 0;
252b5132
RH		 5463 }
5464
906e58ca
NC		 5465 /* Build the stubs as directed by the stub hash table. */
5466 table = &htab->stub_hash_table;
5467 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5468 if (htab->fix_cortex_a8)
5469 {
5470 /* Place the cortex a8 stubs last. */
5471 htab->fix_cortex_a8 = -1;
5472 bfd_hash_traverse (table, arm_build_one_stub, info);
5473 }
252b5132 5474
906e58ca 5475 return TRUE;
252b5132
RH		 5476}
5477
9b485d32
NC		 5478/* Locate the Thumb encoded calling stub for NAME. */
5479
252b5132 5480static struct elf_link_hash_entry *
57e8b36a
NC		 5481find_thumb_glue (struct bfd_link_info *link_info,
5482 const char *name,
f2a9dd69 5483 char **error_message)
252b5132
RH		 5484{
5485 char *tmp_name;
5486 struct elf_link_hash_entry *hash;
5487 struct elf32_arm_link_hash_table *hash_table;
5488
5489 /* We need a pointer to the armelf specific hash table. */
5490 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5491 if (hash_table == NULL)
5492 return NULL;
252b5132 5493
21d799b5
NC		 5494 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5495 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5496
5497 BFD_ASSERT (tmp_name);
5498
5499 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5500
5501 hash = elf_link_hash_lookup
b34976b6 5502 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5503
b1657152
AM		 5504 if (hash == NULL
5505 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5506 tmp_name, name) == -1)
5507 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5508
5509 free (tmp_name);
5510
5511 return hash;
5512}
5513
9b485d32
NC		 5514/* Locate the ARM encoded calling stub for NAME. */
5515
252b5132 5516static struct elf_link_hash_entry *
57e8b36a
NC		 5517find_arm_glue (struct bfd_link_info *link_info,
5518 const char *name,
f2a9dd69 5519 char **error_message)
252b5132
RH		 5520{
5521 char *tmp_name;
5522 struct elf_link_hash_entry *myh;
5523 struct elf32_arm_link_hash_table *hash_table;
5524
5525 /* We need a pointer to the elfarm specific hash table. */
5526 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5527 if (hash_table == NULL)
5528 return NULL;
252b5132 5529
21d799b5
NC		 5530 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5531 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5532
5533 BFD_ASSERT (tmp_name);
5534
5535 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5536
5537 myh = elf_link_hash_lookup
b34976b6 5538 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5539
b1657152
AM		 5540 if (myh == NULL
5541 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5542 tmp_name, name) == -1)
5543 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5544
5545 free (tmp_name);
5546
5547 return myh;
5548}
5549
8f6277f5 5550/* ARM->Thumb glue (static images):
252b5132
RH		 5551
5552 .arm
5553 __func_from_arm:
5554 ldr r12, __func_addr
5555 bx r12
5556 __func_addr:
906e58ca 5557 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5558
26079076
PB		 5559 (v5t static images)
5560 .arm
5561 __func_from_arm:
5562 ldr pc, __func_addr
5563 __func_addr:
906e58ca 5564 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5565
8f6277f5
PB		 5566 (relocatable images)
5567 .arm
5568 __func_from_arm:
5569 ldr r12, __func_offset
5570 add r12, r12, pc
5571 bx r12
5572 __func_offset:
8029a119 5573 .word func - . */
8f6277f5
PB		 5574
5575#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5576static const insn32 a2t1_ldr_insn = 0xe59fc000;
5577static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5578static const insn32 a2t3_func_addr_insn = 0x00000001;
5579
26079076
PB		 5580#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5581static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5582static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5583
8f6277f5
PB		 5584#define ARM2THUMB_PIC_GLUE_SIZE 16
5585static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5586static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5587static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5588
9b485d32 5589/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5590
8029a119
NC		 5591 .thumb .thumb
5592 .align 2 .align 2
5593 __func_from_thumb: __func_from_thumb:
5594 bx pc push {r6, lr}
5595 nop ldr r6, __func_addr
5596 .arm mov lr, pc
5597 b func bx r6
fcef9eb7 5598 .arm
b38cadfb 5599 ;; back_to_thumb
fcef9eb7 5600 ldmia r13! {r6, lr}
b38cadfb 5601 bx lr
8029a119
NC		 5602 __func_addr:
5603 .word func */
252b5132
RH		 5604
5605#define THUMB2ARM_GLUE_SIZE 8
5606static const insn16 t2a1_bx_pc_insn = 0x4778;
5607static const insn16 t2a2_noop_insn = 0x46c0;
5608static const insn32 t2a3_b_insn = 0xea000000;
5609
c7b8f16e
JB		 5610#define VFP11_ERRATUM_VENEER_SIZE 8
5611
845b51d6
PB		 5612#define ARM_BX_VENEER_SIZE 12
5613static const insn32 armbx1_tst_insn = 0xe3100001;
5614static const insn32 armbx2_moveq_insn = 0x01a0f000;
5615static const insn32 armbx3_bx_insn = 0xe12fff10;
5616
7e392df6 5617#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5618static void
5619arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5620{
5621 asection * s;
8029a119 5622 bfd_byte * contents;
252b5132 5623
8029a119 5624 if (size == 0)
3e6b1042
DJ		 5625 {
5626 /* Do not include empty glue sections in the output. */
5627 if (abfd != NULL)
5628 {
3d4d4302 5629 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5630 if (s != NULL)
5631 s->flags |= SEC_EXCLUDE;
5632 }
5633 return;
5634 }
252b5132 5635
8029a119 5636 BFD_ASSERT (abfd != NULL);
252b5132 5637
3d4d4302 5638 s = bfd_get_linker_section (abfd, name);
8029a119 5639 BFD_ASSERT (s != NULL);
252b5132 5640
21d799b5 5641 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5642
8029a119
NC		 5643 BFD_ASSERT (s->size == size);
5644 s->contents = contents;
5645}
906e58ca 5646
8029a119
NC		 5647bfd_boolean
5648bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5649{
5650 struct elf32_arm_link_hash_table * globals;
906e58ca 5651
8029a119
NC		 5652 globals = elf32_arm_hash_table (info);
5653 BFD_ASSERT (globals != NULL);
906e58ca 5654
8029a119
NC		 5655 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5656 globals->arm_glue_size,
5657 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5658
8029a119
NC		 5659 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5660 globals->thumb_glue_size,
5661 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5662
8029a119
NC		 5663 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5664 globals->vfp11_erratum_glue_size,
5665 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5666
8029a119
NC		 5667 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5668 globals->bx_glue_size,
845b51d6
PB		 5669 ARM_BX_GLUE_SECTION_NAME);
5670
b34976b6 5671 return TRUE;
252b5132
RH		 5672}
5673
a4fd1a8e 5674/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5675 returns the symbol identifying the stub. */
5676
a4fd1a8e 5677static struct elf_link_hash_entry *
57e8b36a
NC		 5678record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5679 struct elf_link_hash_entry * h)
252b5132
RH		 5680{
5681 const char * name = h->root.root.string;
63b0f745 5682 asection * s;
252b5132
RH		 5683 char * tmp_name;
5684 struct elf_link_hash_entry * myh;
14a793b2 5685 struct bfd_link_hash_entry * bh;
252b5132 5686 struct elf32_arm_link_hash_table * globals;
dc810e39 5687 bfd_vma val;
2f475487 5688 bfd_size_type size;
252b5132
RH		 5689
5690 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5691 BFD_ASSERT (globals != NULL);
5692 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5693
3d4d4302 5694 s = bfd_get_linker_section
252b5132
RH		 5695 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5696
252b5132
RH		 5697 BFD_ASSERT (s != NULL);
5698
21d799b5
NC		 5699 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5700 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5701
5702 BFD_ASSERT (tmp_name);
5703
5704 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5705
5706 myh = elf_link_hash_lookup
b34976b6 5707 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5708
5709 if (myh != NULL)
5710 {
9b485d32 5711 /* We've already seen this guy. */
252b5132 5712 free (tmp_name);
a4fd1a8e 5713 return myh;
252b5132
RH		 5714 }
5715
57e8b36a
NC		 5716 /* The only trick here is using hash_table->arm_glue_size as the value.
5717 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5718 putting it. The +1 on the value marks that the stub has not been
5719 output yet - not that it is a Thumb function. */
14a793b2 5720 bh = NULL;
dc810e39
AM		 5721 val = globals->arm_glue_size + 1;
5722 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5723 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5724 NULL, TRUE, FALSE, &bh);
252b5132 5725
b7693d02
DJ		 5726 myh = (struct elf_link_hash_entry *) bh;
5727 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5728 myh->forced_local = 1;
5729
252b5132
RH		 5730 free (tmp_name);
5731
27e55c4d
PB		 5732 if (link_info->shared || globals->root.is_relocatable_executable
5733 || globals->pic_veneer)
2f475487 5734 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5735 else if (globals->use_blx)
5736 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5737 else
2f475487
AM		 5738 size = ARM2THUMB_STATIC_GLUE_SIZE;
5739
5740 s->size += size;
5741 globals->arm_glue_size += size;
252b5132 5742
a4fd1a8e 5743 return myh;
252b5132
RH		 5744}
5745
845b51d6
PB		 5746/* Allocate space for ARMv4 BX veneers. */
5747
5748static void
5749record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5750{
5751 asection * s;
5752 struct elf32_arm_link_hash_table *globals;
5753 char *tmp_name;
5754 struct elf_link_hash_entry *myh;
5755 struct bfd_link_hash_entry *bh;
5756 bfd_vma val;
5757
5758 /* BX PC does not need a veneer. */
5759 if (reg == 15)
5760 return;
5761
5762 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5763 BFD_ASSERT (globals != NULL);
5764 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5765
5766 /* Check if this veneer has already been allocated. */
5767 if (globals->bx_glue_offset[reg])
5768 return;
5769
3d4d4302 5770 s = bfd_get_linker_section
845b51d6
PB		 5771 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5772
5773 BFD_ASSERT (s != NULL);
5774
5775 /* Add symbol for veneer. */
21d799b5
NC		 5776 tmp_name = (char *)
5777 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5778
845b51d6 5779 BFD_ASSERT (tmp_name);
906e58ca 5780
845b51d6 5781 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5782
845b51d6
PB		 5783 myh = elf_link_hash_lookup
5784 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5785
845b51d6 5786 BFD_ASSERT (myh == NULL);
906e58ca 5787
845b51d6
PB		 5788 bh = NULL;
5789 val = globals->bx_glue_size;
5790 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5791 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5792 NULL, TRUE, FALSE, &bh);
5793
5794 myh = (struct elf_link_hash_entry *) bh;
5795 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5796 myh->forced_local = 1;
5797
5798 s->size += ARM_BX_VENEER_SIZE;
5799 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5800 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5801}
5802
5803
c7b8f16e
JB		 5804/* Add an entry to the code/data map for section SEC. */
5805
5806static void
5807elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5808{
5809 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5810 unsigned int newidx;
906e58ca 5811
c7b8f16e
JB		 5812 if (sec_data->map == NULL)
5813 {
21d799b5
NC		 5814 sec_data->map = (elf32_arm_section_map *)
5815 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5816 sec_data->mapcount = 0;
5817 sec_data->mapsize = 1;
5818 }
906e58ca 5819
c7b8f16e 5820 newidx = sec_data->mapcount++;
906e58ca 5821
c7b8f16e
JB		 5822 if (sec_data->mapcount > sec_data->mapsize)
5823 {
5824 sec_data->mapsize *= 2;
21d799b5
NC		 5825 sec_data->map = (elf32_arm_section_map *)
5826 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5827 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5828 }
5829
5830 if (sec_data->map)
5831 {
5832 sec_data->map[newidx].vma = vma;
5833 sec_data->map[newidx].type = type;
c7b8f16e 5834 }
c7b8f16e
JB		 5835}
5836
5837
5838/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5839 veneers are handled for now. */
5840
5841static bfd_vma
5842record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5843 elf32_vfp11_erratum_list *branch,
5844 bfd *branch_bfd,
5845 asection *branch_sec,
5846 unsigned int offset)
5847{
5848 asection *s;
5849 struct elf32_arm_link_hash_table *hash_table;
5850 char *tmp_name;
5851 struct elf_link_hash_entry *myh;
5852 struct bfd_link_hash_entry *bh;
5853 bfd_vma val;
5854 struct _arm_elf_section_data *sec_data;
c7b8f16e 5855 elf32_vfp11_erratum_list *newerr;
906e58ca 5856
c7b8f16e 5857 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5858 BFD_ASSERT (hash_table != NULL);
5859 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5860
3d4d4302 5861 s = bfd_get_linker_section
c7b8f16e 5862 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5863
c7b8f16e 5864 sec_data = elf32_arm_section_data (s);
906e58ca 5865
c7b8f16e 5866 BFD_ASSERT (s != NULL);
906e58ca 5867
21d799b5
NC		 5868 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5869 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5870
c7b8f16e 5871 BFD_ASSERT (tmp_name);
906e58ca 5872
c7b8f16e
JB		 5873 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5874 hash_table->num_vfp11_fixes);
906e58ca 5875
c7b8f16e
JB		 5876 myh = elf_link_hash_lookup
5877 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5878
c7b8f16e 5879 BFD_ASSERT (myh == NULL);
906e58ca 5880
c7b8f16e
JB		 5881 bh = NULL;
5882 val = hash_table->vfp11_erratum_glue_size;
5883 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5884 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5885 NULL, TRUE, FALSE, &bh);
5886
5887 myh = (struct elf_link_hash_entry *) bh;
5888 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5889 myh->forced_local = 1;
5890
5891 /* Link veneer back to calling location. */
c7e2358a 5892 sec_data->erratumcount += 1;
21d799b5
NC		 5893 newerr = (elf32_vfp11_erratum_list *)
5894 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5895
c7b8f16e
JB		 5896 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5897 newerr->vma = -1;
5898 newerr->u.v.branch = branch;
5899 newerr->u.v.id = hash_table->num_vfp11_fixes;
5900 branch->u.b.veneer = newerr;
5901
5902 newerr->next = sec_data->erratumlist;
5903 sec_data->erratumlist = newerr;
5904
5905 /* A symbol for the return from the veneer. */
5906 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5907 hash_table->num_vfp11_fixes);
5908
5909 myh = elf_link_hash_lookup
5910 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5911
c7b8f16e
JB		 5912 if (myh != NULL)
5913 abort ();
5914
5915 bh = NULL;
5916 val = offset + 4;
5917 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5918 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5919
c7b8f16e
JB		 5920 myh = (struct elf_link_hash_entry *) bh;
5921 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5922 myh->forced_local = 1;
5923
5924 free (tmp_name);
906e58ca 5925
c7b8f16e
JB		 5926 /* Generate a mapping symbol for the veneer section, and explicitly add an
5927 entry for that symbol to the code/data map for the section. */
5928 if (hash_table->vfp11_erratum_glue_size == 0)
5929 {
5930 bh = NULL;
5931 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5932 ever requires this erratum fix. */
5933 _bfd_generic_link_add_one_symbol (link_info,
5934 hash_table->bfd_of_glue_owner, "$a",
5935 BSF_LOCAL, s, 0, NULL,
5936 TRUE, FALSE, &bh);
5937
5938 myh = (struct elf_link_hash_entry *) bh;
5939 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5940 myh->forced_local = 1;
906e58ca 5941
c7b8f16e
JB		 5942 /* The elf32_arm_init_maps function only cares about symbols from input
5943 BFDs. We must make a note of this generated mapping symbol
5944 ourselves so that code byteswapping works properly in
5945 elf32_arm_write_section. */
5946 elf32_arm_section_map_add (s, 'a', 0);
5947 }
906e58ca 5948
c7b8f16e
JB		 5949 s->size += VFP11_ERRATUM_VENEER_SIZE;
5950 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5951 hash_table->num_vfp11_fixes++;
906e58ca 5952
c7b8f16e
JB		 5953 /* The offset of the veneer. */
5954 return val;
5955}
5956
8029a119 5957#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5958 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5959 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5960
5961/* Create a fake section for use by the ARM backend of the linker. */
5962
5963static bfd_boolean
5964arm_make_glue_section (bfd * abfd, const char * name)
5965{
5966 asection * sec;
5967
3d4d4302 5968 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 5969 if (sec != NULL)
5970 /* Already made. */
5971 return TRUE;
5972
3d4d4302 5973 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 5974
5975 if (sec == NULL
5976 || !bfd_set_section_alignment (abfd, sec, 2))
5977 return FALSE;
5978
5979 /* Set the gc mark to prevent the section from being removed by garbage
5980 collection, despite the fact that no relocs refer to this section. */
5981 sec->gc_mark = 1;
5982
5983 return TRUE;
5984}
5985
8afb0e02
NC		 5986/* Add the glue sections to ABFD. This function is called from the
5987 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5988
b34976b6 5989bfd_boolean
57e8b36a
NC		 5990bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5991 struct bfd_link_info *info)
252b5132 5992{
8afb0e02
NC		 5993 /* If we are only performing a partial
5994 link do not bother adding the glue. */
1049f94e 5995 if (info->relocatable)
b34976b6 5996 return TRUE;
252b5132 5997
8029a119
NC		 5998 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5999 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6000 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6001 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6002}
6003
6004/* Select a BFD to be used to hold the sections used by the glue code.
6005 This function is called from the linker scripts in ld/emultempl/
8029a119 6006 {armelf/pe}.em. */
8afb0e02 6007
b34976b6 6008bfd_boolean
57e8b36a 6009bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6010{
6011 struct elf32_arm_link_hash_table *globals;
6012
6013 /* If we are only performing a partial link
6014 do not bother getting a bfd to hold the glue. */
1049f94e 6015 if (info->relocatable)
b34976b6 6016 return TRUE;
8afb0e02 6017
b7693d02
DJ		 6018 /* Make sure we don't attach the glue sections to a dynamic object. */
6019 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6020
8afb0e02 6021 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6022 BFD_ASSERT (globals != NULL);
6023
6024 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6025 return TRUE;
8afb0e02 6026
252b5132
RH		 6027 /* Save the bfd for later use. */
6028 globals->bfd_of_glue_owner = abfd;
cedb70c5 6029
b34976b6 6030 return TRUE;
252b5132
RH		 6031}
6032
906e58ca
NC		 6033static void
6034check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6035{
2de70689
MGD		 6036 int cpu_arch;
6037
b38cadfb 6038 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6039 Tag_CPU_arch);
6040
6041 if (globals->fix_arm1176)
6042 {
6043 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6044 globals->use_blx = 1;
6045 }
6046 else
6047 {
6048 if (cpu_arch > TAG_CPU_ARCH_V4T)
6049 globals->use_blx = 1;
6050 }
39b41c9c
PB		 6051}
6052
b34976b6 6053bfd_boolean
57e8b36a 6054bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6055 struct bfd_link_info *link_info)
252b5132
RH		 6056{
6057 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6058 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6059 Elf_Internal_Rela *irel, *irelend;
6060 bfd_byte *contents = NULL;
252b5132
RH		 6061
6062 asection *sec;
6063 struct elf32_arm_link_hash_table *globals;
6064
6065 /* If we are only performing a partial link do not bother
6066 to construct any glue. */
1049f94e 6067 if (link_info->relocatable)
b34976b6 6068 return TRUE;
252b5132 6069
39ce1a6a
NC		 6070 /* Here we have a bfd that is to be included on the link. We have a
6071 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6072 globals = elf32_arm_hash_table (link_info);
252b5132 6073 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6074
6075 check_use_blx (globals);
252b5132 6076
d504ffc8 6077 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6078 {
d003868e
AM		 6079 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6080 abfd);
e489d0ae
PB		 6081 return FALSE;
6082 }
f21f3fe0 6083
39ce1a6a
NC		 6084 /* PR 5398: If we have not decided to include any loadable sections in
6085 the output then we will not have a glue owner bfd. This is OK, it
6086 just means that there is nothing else for us to do here. */
6087 if (globals->bfd_of_glue_owner == NULL)
6088 return TRUE;
6089
252b5132
RH		 6090 /* Rummage around all the relocs and map the glue vectors. */
6091 sec = abfd->sections;
6092
6093 if (sec == NULL)
b34976b6 6094 return TRUE;
252b5132
RH		 6095
6096 for (; sec != NULL; sec = sec->next)
6097 {
6098 if (sec->reloc_count == 0)
6099 continue;
6100
2f475487
AM		 6101 if ((sec->flags & SEC_EXCLUDE) != 0)
6102 continue;
6103
0ffa91dd 6104 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6105
9b485d32 6106 /* Load the relocs. */
6cdc0ccc 6107 internal_relocs
906e58ca 6108 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6109
6cdc0ccc
AM		 6110 if (internal_relocs == NULL)
6111 goto error_return;
252b5132 6112
6cdc0ccc
AM		 6113 irelend = internal_relocs + sec->reloc_count;
6114 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6115 {
6116 long r_type;
6117 unsigned long r_index;
252b5132
RH		 6118
6119 struct elf_link_hash_entry *h;
6120
6121 r_type = ELF32_R_TYPE (irel->r_info);
6122 r_index = ELF32_R_SYM (irel->r_info);
6123
9b485d32 6124 /* These are the only relocation types we care about. */
ba96a88f 6125 if ( r_type != R_ARM_PC24
845b51d6 6126 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6127 continue;
6128
6129 /* Get the section contents if we haven't done so already. */
6130 if (contents == NULL)
6131 {
6132 /* Get cached copy if it exists. */
6133 if (elf_section_data (sec)->this_hdr.contents != NULL)
6134 contents = elf_section_data (sec)->this_hdr.contents;
6135 else
6136 {
6137 /* Go get them off disk. */
57e8b36a 6138 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6139 goto error_return;
6140 }
6141 }
6142
845b51d6
PB		 6143 if (r_type == R_ARM_V4BX)
6144 {
6145 int reg;
6146
6147 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6148 record_arm_bx_glue (link_info, reg);
6149 continue;
6150 }
6151
a7c10850 6152 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6153 h = NULL;
6154
9b485d32 6155 /* We don't care about local symbols. */
252b5132
RH		 6156 if (r_index < symtab_hdr->sh_info)
6157 continue;
6158
9b485d32 6159 /* This is an external symbol. */
252b5132
RH		 6160 r_index -= symtab_hdr->sh_info;
6161 h = (struct elf_link_hash_entry *)
6162 elf_sym_hashes (abfd)[r_index];
6163
6164 /* If the relocation is against a static symbol it must be within
6165 the current section and so cannot be a cross ARM/Thumb relocation. */
6166 if (h == NULL)
6167 continue;
6168
d504ffc8
DJ		 6169 /* If the call will go through a PLT entry then we do not need
6170 glue. */
362d30a1 6171 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6172 continue;
6173
252b5132
RH		 6174 switch (r_type)
6175 {
6176 case R_ARM_PC24:
6177 /* This one is a call from arm code. We need to look up
2f0ca46a 6178 the target of the call. If it is a thumb target, we
252b5132 6179 insert glue. */
35fc36a8 6180 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6181 record_arm_to_thumb_glue (link_info, h);
6182 break;
6183
252b5132 6184 default:
c6596c5e 6185 abort ();
252b5132
RH		 6186 }
6187 }
6cdc0ccc
AM		 6188
6189 if (contents != NULL
6190 && elf_section_data (sec)->this_hdr.contents != contents)
6191 free (contents);
6192 contents = NULL;
6193
6194 if (internal_relocs != NULL
6195 && elf_section_data (sec)->relocs != internal_relocs)
6196 free (internal_relocs);
6197 internal_relocs = NULL;
252b5132
RH		 6198 }
6199
b34976b6 6200 return TRUE;
9a5aca8c 6201
252b5132 6202error_return:
6cdc0ccc
AM		 6203 if (contents != NULL
6204 && elf_section_data (sec)->this_hdr.contents != contents)
6205 free (contents);
6206 if (internal_relocs != NULL
6207 && elf_section_data (sec)->relocs != internal_relocs)
6208 free (internal_relocs);
9a5aca8c 6209
b34976b6 6210 return FALSE;
252b5132 6211}
7e392df6 6212#endif
252b5132 6213
eb043451 6214
c7b8f16e
JB		 6215/* Initialise maps of ARM/Thumb/data for input BFDs. */
6216
6217void
6218bfd_elf32_arm_init_maps (bfd *abfd)
6219{
6220 Elf_Internal_Sym *isymbuf;
6221 Elf_Internal_Shdr *hdr;
6222 unsigned int i, localsyms;
6223
af1f4419
NC		 6224 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6225 if (! is_arm_elf (abfd))
6226 return;
6227
c7b8f16e
JB		 6228 if ((abfd->flags & DYNAMIC) != 0)
6229 return;
6230
0ffa91dd 6231 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6232 localsyms = hdr->sh_info;
6233
6234 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6235 should contain the number of local symbols, which should come before any
6236 global symbols. Mapping symbols are always local. */
6237 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6238 NULL);
6239
6240 /* No internal symbols read? Skip this BFD. */
6241 if (isymbuf == NULL)
6242 return;
6243
6244 for (i = 0; i < localsyms; i++)
6245 {
6246 Elf_Internal_Sym *isym = &isymbuf[i];
6247 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6248 const char *name;
906e58ca 6249
c7b8f16e
JB		 6250 if (sec != NULL
6251 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6252 {
6253 name = bfd_elf_string_from_elf_section (abfd,
6254 hdr->sh_link, isym->st_name);
906e58ca 6255
c7b8f16e
JB		 6256 if (bfd_is_arm_special_symbol_name (name,
6257 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6258 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6259 }
6260 }
6261}
6262
6263
48229727
JB		 6264/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6265 say what they wanted. */
6266
6267void
6268bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6269{
6270 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6271 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6272
4dfe6ac6
NC		 6273 if (globals == NULL)
6274 return;
6275
48229727
JB		 6276 if (globals->fix_cortex_a8 == -1)
6277 {
6278 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6279 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6280 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6281 || out_attr[Tag_CPU_arch_profile].i == 0))
6282 globals->fix_cortex_a8 = 1;
6283 else
6284 globals->fix_cortex_a8 = 0;
6285 }
6286}
6287
6288
c7b8f16e
JB		 6289void
6290bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6291{
6292 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6293 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6294
4dfe6ac6
NC		 6295 if (globals == NULL)
6296 return;
c7b8f16e
JB		 6297 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6298 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6299 {
6300 switch (globals->vfp11_fix)
6301 {
6302 case BFD_ARM_VFP11_FIX_DEFAULT:
6303 case BFD_ARM_VFP11_FIX_NONE:
6304 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6305 break;
906e58ca 6306
c7b8f16e
JB		 6307 default:
6308 /* Give a warning, but do as the user requests anyway. */
6309 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6310 "workaround is not necessary for target architecture"), obfd);
6311 }
6312 }
6313 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6314 /* For earlier architectures, we might need the workaround, but do not
6315 enable it by default. If users is running with broken hardware, they
6316 must enable the erratum fix explicitly. */
6317 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6318}
6319
6320
906e58ca
NC		 6321enum bfd_arm_vfp11_pipe
6322{
c7b8f16e
JB		 6323 VFP11_FMAC,
6324 VFP11_LS,
6325 VFP11_DS,
6326 VFP11_BAD
6327};
6328
6329/* Return a VFP register number. This is encoded as RX:X for single-precision
6330 registers, or X:RX for double-precision registers, where RX is the group of
6331 four bits in the instruction encoding and X is the single extension bit.
6332 RX and X fields are specified using their lowest (starting) bit. The return
6333 value is:
6334
6335 0...31: single-precision registers s0...s31
6336 32...63: double-precision registers d0...d31.
906e58ca 6337
c7b8f16e
JB		 6338 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6339 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6340
c7b8f16e
JB		 6341static unsigned int
6342bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6343 unsigned int x)
6344{
6345 if (is_double)
6346 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6347 else
6348 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6349}
6350
6351/* Set bits in *WMASK according to a register number REG as encoded by
6352 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6353
6354static void
6355bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6356{
6357 if (reg < 32)
6358 *wmask |= 1 << reg;
6359 else if (reg < 48)
6360 *wmask |= 3 << ((reg - 32) * 2);
6361}
6362
6363/* Return TRUE if WMASK overwrites anything in REGS. */
6364
6365static bfd_boolean
6366bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6367{
6368 int i;
906e58ca 6369
c7b8f16e
JB		 6370 for (i = 0; i < numregs; i++)
6371 {
6372 unsigned int reg = regs[i];
6373
6374 if (reg < 32 && (wmask & (1 << reg)) != 0)
6375 return TRUE;
906e58ca 6376
c7b8f16e
JB		 6377 reg -= 32;
6378
6379 if (reg >= 16)
6380 continue;
906e58ca 6381
c7b8f16e
JB		 6382 if ((wmask & (3 << (reg * 2))) != 0)
6383 return TRUE;
6384 }
906e58ca 6385
c7b8f16e
JB		 6386 return FALSE;
6387}
6388
6389/* In this function, we're interested in two things: finding input registers
6390 for VFP data-processing instructions, and finding the set of registers which
6391 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6392 hold the written set, so FLDM etc. are easy to deal with (we're only
6393 interested in 32 SP registers or 16 dp registers, due to the VFP version
6394 implemented by the chip in question). DP registers are marked by setting
6395 both SP registers in the write mask). */
6396
6397static enum bfd_arm_vfp11_pipe
6398bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6399 int *numregs)
6400{
91d6fa6a 6401 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6402 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6403
6404 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6405 {
6406 unsigned int pqrs;
6407 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6408 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6409
6410 pqrs = ((insn & 0x00800000) >> 20)
6411 | ((insn & 0x00300000) >> 19)
6412 | ((insn & 0x00000040) >> 6);
6413
6414 switch (pqrs)
6415 {
6416 case 0: /* fmac[sd]. */
6417 case 1: /* fnmac[sd]. */
6418 case 2: /* fmsc[sd]. */
6419 case 3: /* fnmsc[sd]. */
91d6fa6a 6420 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6421 bfd_arm_vfp11_write_mask (destmask, fd);
6422 regs[0] = fd;
6423 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6424 regs[2] = fm;
6425 *numregs = 3;
6426 break;
6427
6428 case 4: /* fmul[sd]. */
6429 case 5: /* fnmul[sd]. */
6430 case 6: /* fadd[sd]. */
6431 case 7: /* fsub[sd]. */
91d6fa6a 6432 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6433 goto vfp_binop;
6434
6435 case 8: /* fdiv[sd]. */
91d6fa6a 6436 vpipe = VFP11_DS;
c7b8f16e
JB		 6437 vfp_binop:
6438 bfd_arm_vfp11_write_mask (destmask, fd);
6439 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6440 regs[1] = fm;
6441 *numregs = 2;
6442 break;
6443
6444 case 15: /* extended opcode. */
6445 {
6446 unsigned int extn = ((insn >> 15) & 0x1e)
6447 | ((insn >> 7) & 1);
6448
6449 switch (extn)
6450 {
6451 case 0: /* fcpy[sd]. */
6452 case 1: /* fabs[sd]. */
6453 case 2: /* fneg[sd]. */
6454 case 8: /* fcmp[sd]. */
6455 case 9: /* fcmpe[sd]. */
6456 case 10: /* fcmpz[sd]. */
6457 case 11: /* fcmpez[sd]. */
6458 case 16: /* fuito[sd]. */
6459 case 17: /* fsito[sd]. */
6460 case 24: /* ftoui[sd]. */
6461 case 25: /* ftouiz[sd]. */
6462 case 26: /* ftosi[sd]. */
6463 case 27: /* ftosiz[sd]. */
6464 /* These instructions will not bounce due to underflow. */
6465 *numregs = 0;
91d6fa6a 6466 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6467 break;
6468
6469 case 3: /* fsqrt[sd]. */
6470 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6471 registers to cause the erratum in previous instructions. */
6472 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6473 vpipe = VFP11_DS;
c7b8f16e
JB		 6474 break;
6475
6476 case 15: /* fcvt{ds,sd}. */
6477 {
6478 int rnum = 0;
6479
6480 bfd_arm_vfp11_write_mask (destmask, fd);
6481
6482 /* Only FCVTSD can underflow. */
6483 if ((insn & 0x100) != 0)
6484 regs[rnum++] = fm;
6485
6486 *numregs = rnum;
6487
91d6fa6a 6488 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6489 }
6490 break;
6491
6492 default:
6493 return VFP11_BAD;
6494 }
6495 }
6496 break;
6497
6498 default:
6499 return VFP11_BAD;
6500 }
6501 }
6502 /* Two-register transfer. */
6503 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6504 {
6505 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6506
c7b8f16e
JB		 6507 if ((insn & 0x100000) == 0)
6508 {
6509 if (is_double)
6510 bfd_arm_vfp11_write_mask (destmask, fm);
6511 else
6512 {
6513 bfd_arm_vfp11_write_mask (destmask, fm);
6514 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6515 }
6516 }
6517
91d6fa6a 6518 vpipe = VFP11_LS;
c7b8f16e
JB		 6519 }
6520 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6521 {
6522 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6523 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6524
c7b8f16e
JB		 6525 switch (puw)
6526 {
6527 case 0: /* Two-reg transfer. We should catch these above. */
6528 abort ();
906e58ca 6529
c7b8f16e
JB		 6530 case 2: /* fldm[sdx]. */
6531 case 3:
6532 case 5:
6533 {
6534 unsigned int i, offset = insn & 0xff;
6535
6536 if (is_double)
6537 offset >>= 1;
6538
6539 for (i = fd; i < fd + offset; i++)
6540 bfd_arm_vfp11_write_mask (destmask, i);
6541 }
6542 break;
906e58ca 6543
c7b8f16e
JB		 6544 case 4: /* fld[sd]. */
6545 case 6:
6546 bfd_arm_vfp11_write_mask (destmask, fd);
6547 break;
906e58ca 6548
c7b8f16e
JB		 6549 default:
6550 return VFP11_BAD;
6551 }
6552
91d6fa6a 6553 vpipe = VFP11_LS;
c7b8f16e
JB		 6554 }
6555 /* Single-register transfer. Note L==0. */
6556 else if ((insn & 0x0f100e10) == 0x0e000a10)
6557 {
6558 unsigned int opcode = (insn >> 21) & 7;
6559 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6560
6561 switch (opcode)
6562 {
6563 case 0: /* fmsr/fmdlr. */
6564 case 1: /* fmdhr. */
6565 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6566 destination register. I don't know if this is exactly right,
6567 but it is the conservative choice. */
6568 bfd_arm_vfp11_write_mask (destmask, fn);
6569 break;
6570
6571 case 7: /* fmxr. */
6572 break;
6573 }
6574
91d6fa6a 6575 vpipe = VFP11_LS;
c7b8f16e
JB		 6576 }
6577
91d6fa6a 6578 return vpipe;
c7b8f16e
JB		 6579}
6580
6581
6582static int elf32_arm_compare_mapping (const void * a, const void * b);
6583
6584
6585/* Look for potentially-troublesome code sequences which might trigger the
6586 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6587 (available from ARM) for details of the erratum. A short version is
6588 described in ld.texinfo. */
6589
6590bfd_boolean
6591bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6592{
6593 asection *sec;
6594 bfd_byte *contents = NULL;
6595 int state = 0;
6596 int regs[3], numregs = 0;
6597 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6598 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6599
4dfe6ac6
NC		 6600 if (globals == NULL)
6601 return FALSE;
6602
c7b8f16e
JB		 6603 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6604 The states transition as follows:
906e58ca 6605
c7b8f16e
JB		 6606 0 -> 1 (vector) or 0 -> 2 (scalar)
6607 A VFP FMAC-pipeline instruction has been seen. Fill
6608 regs[0]..regs[numregs-1] with its input operands. Remember this
6609 instruction in 'first_fmac'.
6610
6611 1 -> 2
6612 Any instruction, except for a VFP instruction which overwrites
6613 regs[*].
906e58ca 6614
c7b8f16e
JB		 6615 1 -> 3 [ -> 0 ] or
6616 2 -> 3 [ -> 0 ]
6617 A VFP instruction has been seen which overwrites any of regs[*].
6618 We must make a veneer! Reset state to 0 before examining next
6619 instruction.
906e58ca 6620
c7b8f16e
JB		 6621 2 -> 0
6622 If we fail to match anything in state 2, reset to state 0 and reset
6623 the instruction pointer to the instruction after 'first_fmac'.
6624
6625 If the VFP11 vector mode is in use, there must be at least two unrelated
6626 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6627 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6628
6629 /* If we are only performing a partial link do not bother
6630 to construct any glue. */
6631 if (link_info->relocatable)
6632 return TRUE;
6633
0ffa91dd
NC		 6634 /* Skip if this bfd does not correspond to an ELF image. */
6635 if (! is_arm_elf (abfd))
6636 return TRUE;
906e58ca 6637
c7b8f16e
JB		 6638 /* We should have chosen a fix type by the time we get here. */
6639 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6640
6641 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6642 return TRUE;
2e6030b9 6643
33a7ffc2
JM		 6644 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6645 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6646 return TRUE;
6647
c7b8f16e
JB		 6648 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6649 {
6650 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6651 struct _arm_elf_section_data *sec_data;
6652
6653 /* If we don't have executable progbits, we're not interested in this
6654 section. Also skip if section is to be excluded. */
6655 if (elf_section_type (sec) != SHT_PROGBITS
6656 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6657 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6658 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6659 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6660 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6661 continue;
6662
6663 sec_data = elf32_arm_section_data (sec);
906e58ca 6664
c7b8f16e
JB		 6665 if (sec_data->mapcount == 0)
6666 continue;
906e58ca 6667
c7b8f16e
JB		 6668 if (elf_section_data (sec)->this_hdr.contents != NULL)
6669 contents = elf_section_data (sec)->this_hdr.contents;
6670 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6671 goto error_return;
6672
6673 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6674 elf32_arm_compare_mapping);
6675
6676 for (span = 0; span < sec_data->mapcount; span++)
6677 {
6678 unsigned int span_start = sec_data->map[span].vma;
6679 unsigned int span_end = (span == sec_data->mapcount - 1)
6680 ? sec->size : sec_data->map[span + 1].vma;
6681 char span_type = sec_data->map[span].type;
906e58ca 6682
c7b8f16e
JB		 6683 /* FIXME: Only ARM mode is supported at present. We may need to
6684 support Thumb-2 mode also at some point. */
6685 if (span_type != 'a')
6686 continue;
6687
6688 for (i = span_start; i < span_end;)
6689 {
6690 unsigned int next_i = i + 4;
6691 unsigned int insn = bfd_big_endian (abfd)
6692 ? (contents[i] << 24)
6693 | (contents[i + 1] << 16)
6694 | (contents[i + 2] << 8)
6695 | contents[i + 3]
6696 : (contents[i + 3] << 24)
6697 | (contents[i + 2] << 16)
6698 | (contents[i + 1] << 8)
6699 | contents[i];
6700 unsigned int writemask = 0;
91d6fa6a 6701 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6702
6703 switch (state)
6704 {
6705 case 0:
91d6fa6a 6706 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6707 &numregs);
6708 /* I'm assuming the VFP11 erratum can trigger with denorm
6709 operands on either the FMAC or the DS pipeline. This might
6710 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6711 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6712 {
6713 state = use_vector ? 1 : 2;
6714 first_fmac = i;
6715 veneer_of_insn = insn;
6716 }
6717 break;
6718
6719 case 1:
6720 {
6721 int other_regs[3], other_numregs;
91d6fa6a 6722 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6723 other_regs,
6724 &other_numregs);
91d6fa6a 6725 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6726 && bfd_arm_vfp11_antidependency (writemask, regs,
6727 numregs))
6728 state = 3;
6729 else
6730 state = 2;
6731 }
6732 break;
6733
6734 case 2:
6735 {
6736 int other_regs[3], other_numregs;
91d6fa6a 6737 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6738 other_regs,
6739 &other_numregs);
91d6fa6a 6740 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6741 && bfd_arm_vfp11_antidependency (writemask, regs,
6742 numregs))
6743 state = 3;
6744 else
6745 {
6746 state = 0;
6747 next_i = first_fmac + 4;
6748 }
6749 }
6750 break;
6751
6752 case 3:
6753 abort (); /* Should be unreachable. */
6754 }
6755
6756 if (state == 3)
6757 {
21d799b5
NC		 6758 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6759 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6760
c7e2358a 6761 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6762
6763 newerr->u.b.vfp_insn = veneer_of_insn;
6764
6765 switch (span_type)
6766 {
6767 case 'a':
6768 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6769 break;
906e58ca 6770
c7b8f16e
JB		 6771 default:
6772 abort ();
6773 }
6774
6775 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6776 first_fmac);
6777
6778 newerr->vma = -1;
6779
6780 newerr->next = sec_data->erratumlist;
6781 sec_data->erratumlist = newerr;
6782
6783 state = 0;
6784 }
6785
6786 i = next_i;
6787 }
6788 }
906e58ca 6789
c7b8f16e
JB		 6790 if (contents != NULL
6791 && elf_section_data (sec)->this_hdr.contents != contents)
6792 free (contents);
6793 contents = NULL;
6794 }
6795
6796 return TRUE;
6797
6798error_return:
6799 if (contents != NULL
6800 && elf_section_data (sec)->this_hdr.contents != contents)
6801 free (contents);
906e58ca 6802
c7b8f16e
JB		 6803 return FALSE;
6804}
6805
6806/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6807 after sections have been laid out, using specially-named symbols. */
6808
6809void
6810bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6811 struct bfd_link_info *link_info)
6812{
6813 asection *sec;
6814 struct elf32_arm_link_hash_table *globals;
6815 char *tmp_name;
906e58ca 6816
c7b8f16e
JB		 6817 if (link_info->relocatable)
6818 return;
2e6030b9
MS		 6819
6820 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6821 if (! is_arm_elf (abfd))
2e6030b9
MS		 6822 return;
6823
c7b8f16e 6824 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6825 if (globals == NULL)
6826 return;
906e58ca 6827
21d799b5
NC		 6828 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6829 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6830
6831 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6832 {
6833 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6834 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6835
c7b8f16e
JB		 6836 for (; errnode != NULL; errnode = errnode->next)
6837 {
6838 struct elf_link_hash_entry *myh;
6839 bfd_vma vma;
6840
6841 switch (errnode->type)
6842 {
6843 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6844 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6845 /* Find veneer symbol. */
6846 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6847 errnode->u.b.veneer->u.v.id);
6848
6849 myh = elf_link_hash_lookup
6850 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6851
6852 if (myh == NULL)
6853 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6854 "`%s'"), abfd, tmp_name);
6855
6856 vma = myh->root.u.def.section->output_section->vma
6857 + myh->root.u.def.section->output_offset
6858 + myh->root.u.def.value;
6859
6860 errnode->u.b.veneer->vma = vma;
6861 break;
6862
6863 case VFP11_ERRATUM_ARM_VENEER:
6864 case VFP11_ERRATUM_THUMB_VENEER:
6865 /* Find return location. */
6866 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6867 errnode->u.v.id);
6868
6869 myh = elf_link_hash_lookup
6870 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6871
6872 if (myh == NULL)
6873 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6874 "`%s'"), abfd, tmp_name);
6875
6876 vma = myh->root.u.def.section->output_section->vma
6877 + myh->root.u.def.section->output_offset
6878 + myh->root.u.def.value;
6879
6880 errnode->u.v.branch->vma = vma;
6881 break;
906e58ca 6882
c7b8f16e
JB		 6883 default:
6884 abort ();
6885 }
6886 }
6887 }
906e58ca 6888
c7b8f16e
JB		 6889 free (tmp_name);
6890}
6891
6892
eb043451
PB		 6893/* Set target relocation values needed during linking. */
6894
6895void
bf21ed78
MS		 6896bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6897 struct bfd_link_info *link_info,
eb043451 6898 int target1_is_rel,
319850b4 6899 char * target2_type,
33bfe774 6900 int fix_v4bx,
c7b8f16e 6901 int use_blx,
bf21ed78 6902 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6903 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6904 int pic_veneer, int fix_cortex_a8,
6905 int fix_arm1176)
eb043451
PB		 6906{
6907 struct elf32_arm_link_hash_table *globals;
6908
6909 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6910 if (globals == NULL)
6911 return;
eb043451
PB		 6912
6913 globals->target1_is_rel = target1_is_rel;
6914 if (strcmp (target2_type, "rel") == 0)
6915 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6916 else if (strcmp (target2_type, "abs") == 0)
6917 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6918 else if (strcmp (target2_type, "got-rel") == 0)
6919 globals->target2_reloc = R_ARM_GOT_PREL;
6920 else
6921 {
6922 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6923 target2_type);
6924 }
319850b4 6925 globals->fix_v4bx = fix_v4bx;
33bfe774 6926 globals->use_blx |= use_blx;
c7b8f16e 6927 globals->vfp11_fix = vfp11_fix;
27e55c4d 6928 globals->pic_veneer = pic_veneer;
48229727 6929 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6930 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6931
0ffa91dd
NC		 6932 BFD_ASSERT (is_arm_elf (output_bfd));
6933 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6934 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6935}
eb043451 6936
12a0a0fd 6937/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6938
12a0a0fd
PB		 6939static void
6940insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6941{
6942 bfd_vma upper;
6943 bfd_vma lower;
6944 int reloc_sign;
6945
6946 BFD_ASSERT ((offset & 1) == 0);
6947
6948 upper = bfd_get_16 (abfd, insn);
6949 lower = bfd_get_16 (abfd, insn + 2);
6950 reloc_sign = (offset < 0) ? 1 : 0;
6951 upper = (upper & ~(bfd_vma) 0x7ff)
6952 | ((offset >> 12) & 0x3ff)
6953 | (reloc_sign << 10);
906e58ca 6954 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6955 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6956 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6957 | ((offset >> 1) & 0x7ff);
6958 bfd_put_16 (abfd, upper, insn);
6959 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6960}
6961
9b485d32
NC		 6962/* Thumb code calling an ARM function. */
6963
252b5132 6964static int
57e8b36a
NC		 6965elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6966 const char * name,
6967 bfd * input_bfd,
6968 bfd * output_bfd,
6969 asection * input_section,
6970 bfd_byte * hit_data,
6971 asection * sym_sec,
6972 bfd_vma offset,
6973 bfd_signed_vma addend,
f2a9dd69
DJ		 6974 bfd_vma val,
6975 char **error_message)
252b5132 6976{
bcbdc74c 6977 asection * s = 0;
dc810e39 6978 bfd_vma my_offset;
252b5132 6979 long int ret_offset;
bcbdc74c
NC		 6980 struct elf_link_hash_entry * myh;
6981 struct elf32_arm_link_hash_table * globals;
252b5132 6982
f2a9dd69 6983 myh = find_thumb_glue (info, name, error_message);
252b5132 6984 if (myh == NULL)
b34976b6 6985 return FALSE;
252b5132
RH		 6986
6987 globals = elf32_arm_hash_table (info);
252b5132
RH		 6988 BFD_ASSERT (globals != NULL);
6989 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6990
6991 my_offset = myh->root.u.def.value;
6992
3d4d4302
AM		 6993 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
6994 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 6995
6996 BFD_ASSERT (s != NULL);
6997 BFD_ASSERT (s->contents != NULL);
6998 BFD_ASSERT (s->output_section != NULL);
6999
7000 if ((my_offset & 0x01) == 0x01)
7001 {
7002 if (sym_sec != NULL
7003 && sym_sec->owner != NULL
7004 && !INTERWORK_FLAG (sym_sec->owner))
7005 {
8f615d07 7006 (*_bfd_error_handler)
d003868e 7007 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7008 " first occurrence: %B: Thumb call to ARM"),
d003868e 7009 sym_sec->owner, input_bfd, name);
252b5132 7010
b34976b6 7011 return FALSE;
252b5132
RH		 7012 }
7013
7014 --my_offset;
7015 myh->root.u.def.value = my_offset;
7016
52ab56c2
PB		 7017 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7018 s->contents + my_offset);
252b5132 7019
52ab56c2
PB		 7020 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7021 s->contents + my_offset + 2);
252b5132
RH		 7022
7023 ret_offset =
9b485d32
NC		 7024 /* Address of destination of the stub. */
7025 ((bfd_signed_vma) val)
252b5132 7026 - ((bfd_signed_vma)
57e8b36a
NC		 7027 /* Offset from the start of the current section
7028 to the start of the stubs. */
9b485d32
NC		 7029 (s->output_offset
7030 /* Offset of the start of this stub from the start of the stubs. */
7031 + my_offset
7032 /* Address of the start of the current section. */
7033 + s->output_section->vma)
7034 /* The branch instruction is 4 bytes into the stub. */
7035 + 4
7036 /* ARM branches work from the pc of the instruction + 8. */
7037 + 8);
252b5132 7038
52ab56c2
PB		 7039 put_arm_insn (globals, output_bfd,
7040 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7041 s->contents + my_offset + 4);
252b5132
RH		 7042 }
7043
7044 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7045
427bfd90
NC		 7046 /* Now go back and fix up the original BL insn to point to here. */
7047 ret_offset =
7048 /* Address of where the stub is located. */
7049 (s->output_section->vma + s->output_offset + my_offset)
7050 /* Address of where the BL is located. */
57e8b36a
NC		 7051 - (input_section->output_section->vma + input_section->output_offset
7052 + offset)
427bfd90
NC		 7053 /* Addend in the relocation. */
7054 - addend
7055 /* Biassing for PC-relative addressing. */
7056 - 8;
252b5132 7057
12a0a0fd 7058 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7059
b34976b6 7060 return TRUE;
252b5132
RH		 7061}
7062
a4fd1a8e 7063/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7064
a4fd1a8e
PB		 7065static struct elf_link_hash_entry *
7066elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7067 const char * name,
7068 bfd * input_bfd,
7069 bfd * output_bfd,
7070 asection * sym_sec,
7071 bfd_vma val,
8029a119
NC		 7072 asection * s,
7073 char ** error_message)
252b5132 7074{
dc810e39 7075 bfd_vma my_offset;
252b5132 7076 long int ret_offset;
bcbdc74c
NC		 7077 struct elf_link_hash_entry * myh;
7078 struct elf32_arm_link_hash_table * globals;
252b5132 7079
f2a9dd69 7080 myh = find_arm_glue (info, name, error_message);
252b5132 7081 if (myh == NULL)
a4fd1a8e 7082 return NULL;
252b5132
RH		 7083
7084 globals = elf32_arm_hash_table (info);
252b5132
RH		 7085 BFD_ASSERT (globals != NULL);
7086 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7087
7088 my_offset = myh->root.u.def.value;
252b5132
RH		 7089
7090 if ((my_offset & 0x01) == 0x01)
7091 {
7092 if (sym_sec != NULL
7093 && sym_sec->owner != NULL
7094 && !INTERWORK_FLAG (sym_sec->owner))
7095 {
8f615d07 7096 (*_bfd_error_handler)
d003868e
AM		 7097 (_("%B(%s): warning: interworking not enabled.\n"
7098 " first occurrence: %B: arm call to thumb"),
7099 sym_sec->owner, input_bfd, name);
252b5132 7100 }
9b485d32 7101
252b5132
RH		 7102 --my_offset;
7103 myh->root.u.def.value = my_offset;
7104
27e55c4d
PB		 7105 if (info->shared || globals->root.is_relocatable_executable
7106 || globals->pic_veneer)
8f6277f5
PB		 7107 {
7108 /* For relocatable objects we can't use absolute addresses,
7109 so construct the address from a relative offset. */
7110 /* TODO: If the offset is small it's probably worth
7111 constructing the address with adds. */
52ab56c2
PB		 7112 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7113 s->contents + my_offset);
7114 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7115 s->contents + my_offset + 4);
7116 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7117 s->contents + my_offset + 8);
8f6277f5
PB		 7118 /* Adjust the offset by 4 for the position of the add,
7119 and 8 for the pipeline offset. */
7120 ret_offset = (val - (s->output_offset
7121 + s->output_section->vma
7122 + my_offset + 12))
7123 | 1;
7124 bfd_put_32 (output_bfd, ret_offset,
7125 s->contents + my_offset + 12);
7126 }
26079076
PB		 7127 else if (globals->use_blx)
7128 {
7129 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7130 s->contents + my_offset);
7131
7132 /* It's a thumb address. Add the low order bit. */
7133 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7134 s->contents + my_offset + 4);
7135 }
8f6277f5
PB		 7136 else
7137 {
52ab56c2
PB		 7138 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7139 s->contents + my_offset);
252b5132 7140
52ab56c2
PB		 7141 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7142 s->contents + my_offset + 4);
252b5132 7143
8f6277f5
PB		 7144 /* It's a thumb address. Add the low order bit. */
7145 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7146 s->contents + my_offset + 8);
8029a119
NC		 7147
7148 my_offset += 12;
8f6277f5 7149 }
252b5132
RH		 7150 }
7151
7152 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7153
a4fd1a8e
PB		 7154 return myh;
7155}
7156
7157/* Arm code calling a Thumb function. */
7158
7159static int
7160elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7161 const char * name,
7162 bfd * input_bfd,
7163 bfd * output_bfd,
7164 asection * input_section,
7165 bfd_byte * hit_data,
7166 asection * sym_sec,
7167 bfd_vma offset,
7168 bfd_signed_vma addend,
f2a9dd69
DJ		 7169 bfd_vma val,
7170 char **error_message)
a4fd1a8e
PB		 7171{
7172 unsigned long int tmp;
7173 bfd_vma my_offset;
7174 asection * s;
7175 long int ret_offset;
7176 struct elf_link_hash_entry * myh;
7177 struct elf32_arm_link_hash_table * globals;
7178
7179 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7180 BFD_ASSERT (globals != NULL);
7181 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7182
3d4d4302
AM		 7183 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7184 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7185 BFD_ASSERT (s != NULL);
7186 BFD_ASSERT (s->contents != NULL);
7187 BFD_ASSERT (s->output_section != NULL);
7188
7189 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7190 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7191 if (!myh)
7192 return FALSE;
7193
7194 my_offset = myh->root.u.def.value;
252b5132
RH		 7195 tmp = bfd_get_32 (input_bfd, hit_data);
7196 tmp = tmp & 0xFF000000;
7197
9b485d32 7198 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7199 ret_offset = (s->output_offset
7200 + my_offset
7201 + s->output_section->vma
7202 - (input_section->output_offset
7203 + input_section->output_section->vma
7204 + offset + addend)
7205 - 8);
9a5aca8c 7206
252b5132
RH		 7207 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7208
dc810e39 7209 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7210
b34976b6 7211 return TRUE;
252b5132
RH		 7212}
7213
a4fd1a8e
PB		 7214/* Populate Arm stub for an exported Thumb function. */
7215
7216static bfd_boolean
7217elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7218{
7219 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7220 asection * s;
7221 struct elf_link_hash_entry * myh;
7222 struct elf32_arm_link_hash_entry *eh;
7223 struct elf32_arm_link_hash_table * globals;
7224 asection *sec;
7225 bfd_vma val;
f2a9dd69 7226 char *error_message;
a4fd1a8e 7227
906e58ca 7228 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7229 /* Allocate stubs for exported Thumb functions on v4t. */
7230 if (eh->export_glue == NULL)
7231 return TRUE;
7232
7233 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7234 BFD_ASSERT (globals != NULL);
7235 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7236
3d4d4302
AM		 7237 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7238 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7239 BFD_ASSERT (s != NULL);
7240 BFD_ASSERT (s->contents != NULL);
7241 BFD_ASSERT (s->output_section != NULL);
7242
7243 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7244
7245 BFD_ASSERT (sec->output_section != NULL);
7246
a4fd1a8e
PB		 7247 val = eh->export_glue->root.u.def.value + sec->output_offset
7248 + sec->output_section->vma;
8029a119 7249
a4fd1a8e
PB		 7250 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7251 h->root.u.def.section->owner,
f2a9dd69
DJ		 7252 globals->obfd, sec, val, s,
7253 &error_message);
a4fd1a8e
PB		 7254 BFD_ASSERT (myh);
7255 return TRUE;
7256}
7257
845b51d6
PB		 7258/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7259
7260static bfd_vma
7261elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7262{
7263 bfd_byte *p;
7264 bfd_vma glue_addr;
7265 asection *s;
7266 struct elf32_arm_link_hash_table *globals;
7267
7268 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7269 BFD_ASSERT (globals != NULL);
7270 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7271
3d4d4302
AM		 7272 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7273 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7274 BFD_ASSERT (s != NULL);
7275 BFD_ASSERT (s->contents != NULL);
7276 BFD_ASSERT (s->output_section != NULL);
7277
7278 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7279
7280 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7281
7282 if ((globals->bx_glue_offset[reg] & 1) == 0)
7283 {
7284 p = s->contents + glue_addr;
7285 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7286 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7287 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7288 globals->bx_glue_offset[reg] |= 1;
7289 }
7290
7291 return glue_addr + s->output_section->vma + s->output_offset;
7292}
7293
a4fd1a8e
PB		 7294/* Generate Arm stubs for exported Thumb symbols. */
7295static void
906e58ca 7296elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7297 struct bfd_link_info *link_info)
7298{
7299 struct elf32_arm_link_hash_table * globals;
7300
8029a119
NC		 7301 if (link_info == NULL)
7302 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7303 return;
7304
7305 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7306 if (globals == NULL)
7307 return;
7308
84c08195
PB		 7309 /* If blx is available then exported Thumb symbols are OK and there is
7310 nothing to do. */
a4fd1a8e
PB		 7311 if (globals->use_blx)
7312 return;
7313
7314 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7315 link_info);
7316}
7317
47beaa6a
RS		 7318/* Reserve space for COUNT dynamic relocations in relocation selection
7319 SRELOC. */
7320
7321static void
7322elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7323 bfd_size_type count)
7324{
7325 struct elf32_arm_link_hash_table *htab;
7326
7327 htab = elf32_arm_hash_table (info);
7328 BFD_ASSERT (htab->root.dynamic_sections_created);
7329 if (sreloc == NULL)
7330 abort ();
7331 sreloc->size += RELOC_SIZE (htab) * count;
7332}
7333
34e77a92
RS		 7334/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7335 dynamic, the relocations should go in SRELOC, otherwise they should
7336 go in the special .rel.iplt section. */
7337
7338static void
7339elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7340 bfd_size_type count)
7341{
7342 struct elf32_arm_link_hash_table *htab;
7343
7344 htab = elf32_arm_hash_table (info);
7345 if (!htab->root.dynamic_sections_created)
7346 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7347 else
7348 {
7349 BFD_ASSERT (sreloc != NULL);
7350 sreloc->size += RELOC_SIZE (htab) * count;
7351 }
7352}
7353
47beaa6a
RS		 7354/* Add relocation REL to the end of relocation section SRELOC. */
7355
7356static void
7357elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7358 asection *sreloc, Elf_Internal_Rela *rel)
7359{
7360 bfd_byte *loc;
7361 struct elf32_arm_link_hash_table *htab;
7362
7363 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7364 if (!htab->root.dynamic_sections_created
7365 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7366 sreloc = htab->root.irelplt;
47beaa6a
RS		 7367 if (sreloc == NULL)
7368 abort ();
7369 loc = sreloc->contents;
7370 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7371 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7372 abort ();
7373 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7374}
7375
34e77a92
RS		 7376/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7377 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7378 to .plt. */
7379
7380static void
7381elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7382 bfd_boolean is_iplt_entry,
7383 union gotplt_union *root_plt,
7384 struct arm_plt_info *arm_plt)
7385{
7386 struct elf32_arm_link_hash_table *htab;
7387 asection *splt;
7388 asection *sgotplt;
7389
7390 htab = elf32_arm_hash_table (info);
7391
7392 if (is_iplt_entry)
7393 {
7394 splt = htab->root.iplt;
7395 sgotplt = htab->root.igotplt;
7396
7397 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7398 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7399 }
7400 else
7401 {
7402 splt = htab->root.splt;
7403 sgotplt = htab->root.sgotplt;
7404
7405 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7406 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7407
7408 /* If this is the first .plt entry, make room for the special
7409 first entry. */
7410 if (splt->size == 0)
7411 splt->size += htab->plt_header_size;
7412 }
7413
7414 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7415 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7416 splt->size += PLT_THUMB_STUB_SIZE;
7417 root_plt->offset = splt->size;
7418 splt->size += htab->plt_entry_size;
7419
7420 if (!htab->symbian_p)
7421 {
7422 /* We also need to make an entry in the .got.plt section, which
7423 will be placed in the .got section by the linker script. */
7424 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7425 sgotplt->size += 4;
7426 }
7427}
7428
b38cadfb
NC		 7429static bfd_vma
7430arm_movw_immediate (bfd_vma value)
7431{
7432 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7433}
7434
7435static bfd_vma
7436arm_movt_immediate (bfd_vma value)
7437{
7438 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7439}
7440
34e77a92
RS		 7441/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7442 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7443 Otherwise, DYNINDX is the index of the symbol in the dynamic
7444 symbol table and SYM_VALUE is undefined.
7445
7446 ROOT_PLT points to the offset of the PLT entry from the start of its
7447 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7448 bookkeeping information. */
7449
7450static void
7451elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7452 union gotplt_union *root_plt,
7453 struct arm_plt_info *arm_plt,
7454 int dynindx, bfd_vma sym_value)
7455{
7456 struct elf32_arm_link_hash_table *htab;
7457 asection *sgot;
7458 asection *splt;
7459 asection *srel;
7460 bfd_byte *loc;
7461 bfd_vma plt_index;
7462 Elf_Internal_Rela rel;
7463 bfd_vma plt_header_size;
7464 bfd_vma got_header_size;
7465
7466 htab = elf32_arm_hash_table (info);
7467
7468 /* Pick the appropriate sections and sizes. */
7469 if (dynindx == -1)
7470 {
7471 splt = htab->root.iplt;
7472 sgot = htab->root.igotplt;
7473 srel = htab->root.irelplt;
7474
7475 /* There are no reserved entries in .igot.plt, and no special
7476 first entry in .iplt. */
7477 got_header_size = 0;
7478 plt_header_size = 0;
7479 }
7480 else
7481 {
7482 splt = htab->root.splt;
7483 sgot = htab->root.sgotplt;
7484 srel = htab->root.srelplt;
7485
7486 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7487 plt_header_size = htab->plt_header_size;
7488 }
7489 BFD_ASSERT (splt != NULL && srel != NULL);
7490
7491 /* Fill in the entry in the procedure linkage table. */
7492 if (htab->symbian_p)
7493 {
7494 BFD_ASSERT (dynindx >= 0);
7495 put_arm_insn (htab, output_bfd,
7496 elf32_arm_symbian_plt_entry[0],
7497 splt->contents + root_plt->offset);
7498 bfd_put_32 (output_bfd,
7499 elf32_arm_symbian_plt_entry[1],
7500 splt->contents + root_plt->offset + 4);
7501
7502 /* Fill in the entry in the .rel.plt section. */
7503 rel.r_offset = (splt->output_section->vma
7504 + splt->output_offset
7505 + root_plt->offset + 4);
7506 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7507
7508 /* Get the index in the procedure linkage table which
7509 corresponds to this symbol. This is the index of this symbol
7510 in all the symbols for which we are making plt entries. The
7511 first entry in the procedure linkage table is reserved. */
7512 plt_index = ((root_plt->offset - plt_header_size)
7513 / htab->plt_entry_size);
7514 }
7515 else
7516 {
7517 bfd_vma got_offset, got_address, plt_address;
7518 bfd_vma got_displacement, initial_got_entry;
7519 bfd_byte * ptr;
7520
7521 BFD_ASSERT (sgot != NULL);
7522
7523 /* Get the offset into the .(i)got.plt table of the entry that
7524 corresponds to this function. */
7525 got_offset = (arm_plt->got_offset & -2);
7526
7527 /* Get the index in the procedure linkage table which
7528 corresponds to this symbol. This is the index of this symbol
7529 in all the symbols for which we are making plt entries.
7530 After the reserved .got.plt entries, all symbols appear in
7531 the same order as in .plt. */
7532 plt_index = (got_offset - got_header_size) / 4;
7533
7534 /* Calculate the address of the GOT entry. */
7535 got_address = (sgot->output_section->vma
7536 + sgot->output_offset
7537 + got_offset);
7538
7539 /* ...and the address of the PLT entry. */
7540 plt_address = (splt->output_section->vma
7541 + splt->output_offset
7542 + root_plt->offset);
7543
7544 ptr = splt->contents + root_plt->offset;
7545 if (htab->vxworks_p && info->shared)
7546 {
7547 unsigned int i;
7548 bfd_vma val;
7549
7550 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7551 {
7552 val = elf32_arm_vxworks_shared_plt_entry[i];
7553 if (i == 2)
7554 val |= got_address - sgot->output_section->vma;
7555 if (i == 5)
7556 val |= plt_index * RELOC_SIZE (htab);
7557 if (i == 2 || i == 5)
7558 bfd_put_32 (output_bfd, val, ptr);
7559 else
7560 put_arm_insn (htab, output_bfd, val, ptr);
7561 }
7562 }
7563 else if (htab->vxworks_p)
7564 {
7565 unsigned int i;
7566 bfd_vma val;
7567
7568 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7569 {
7570 val = elf32_arm_vxworks_exec_plt_entry[i];
7571 if (i == 2)
7572 val |= got_address;
7573 if (i == 4)
7574 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7575 if (i == 5)
7576 val |= plt_index * RELOC_SIZE (htab);
7577 if (i == 2 || i == 5)
7578 bfd_put_32 (output_bfd, val, ptr);
7579 else
7580 put_arm_insn (htab, output_bfd, val, ptr);
7581 }
7582
7583 loc = (htab->srelplt2->contents
7584 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7585
7586 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7587 referencing the GOT for this PLT entry. */
7588 rel.r_offset = plt_address + 8;
7589 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7590 rel.r_addend = got_offset;
7591 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7592 loc += RELOC_SIZE (htab);
7593
7594 /* Create the R_ARM_ABS32 relocation referencing the
7595 beginning of the PLT for this GOT entry. */
7596 rel.r_offset = got_address;
7597 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7598 rel.r_addend = 0;
7599 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7600 }
b38cadfb
NC		 7601 else if (htab->nacl_p)
7602 {
7603 /* Calculate the displacement between the PLT slot and the
7604 common tail that's part of the special initial PLT slot. */
6034aab8 7605 int32_t tail_displacement
b38cadfb
NC		 7606 = ((splt->output_section->vma + splt->output_offset
7607 + ARM_NACL_PLT_TAIL_OFFSET)
7608 - (plt_address + htab->plt_entry_size + 4));
7609 BFD_ASSERT ((tail_displacement & 3) == 0);
7610 tail_displacement >>= 2;
7611
7612 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7613 || (-tail_displacement & 0xff000000) == 0);
7614
7615 /* Calculate the displacement between the PLT slot and the entry
7616 in the GOT. The offset accounts for the value produced by
7617 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8
RM		 7618 got_displacement = (got_address
7619 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7620
7621 /* NaCl does not support interworking at all. */
7622 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7623
7624 put_arm_insn (htab, output_bfd,
7625 elf32_arm_nacl_plt_entry[0]
7626 | arm_movw_immediate (got_displacement),
7627 ptr + 0);
7628 put_arm_insn (htab, output_bfd,
7629 elf32_arm_nacl_plt_entry[1]
7630 | arm_movt_immediate (got_displacement),
7631 ptr + 4);
7632 put_arm_insn (htab, output_bfd,
7633 elf32_arm_nacl_plt_entry[2],
7634 ptr + 8);
7635 put_arm_insn (htab, output_bfd,
7636 elf32_arm_nacl_plt_entry[3]
7637 | (tail_displacement & 0x00ffffff),
7638 ptr + 12);
7639 }
34e77a92
RS		 7640 else
7641 {
7642 /* Calculate the displacement between the PLT slot and the
7643 entry in the GOT. The eight-byte offset accounts for the
7644 value produced by adding to pc in the first instruction
7645 of the PLT stub. */
7646 got_displacement = got_address - (plt_address + 8);
7647
7648 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7649
7650 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7651 {
7652 put_thumb_insn (htab, output_bfd,
7653 elf32_arm_plt_thumb_stub[0], ptr - 4);
7654 put_thumb_insn (htab, output_bfd,
7655 elf32_arm_plt_thumb_stub[1], ptr - 2);
7656 }
7657
7658 put_arm_insn (htab, output_bfd,
7659 elf32_arm_plt_entry[0]
7660 | ((got_displacement & 0x0ff00000) >> 20),
7661 ptr + 0);
7662 put_arm_insn (htab, output_bfd,
7663 elf32_arm_plt_entry[1]
7664 | ((got_displacement & 0x000ff000) >> 12),
7665 ptr+ 4);
7666 put_arm_insn (htab, output_bfd,
7667 elf32_arm_plt_entry[2]
7668 | (got_displacement & 0x00000fff),
7669 ptr + 8);
7670#ifdef FOUR_WORD_PLT
7671 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7672#endif
7673 }
7674
7675 /* Fill in the entry in the .rel(a).(i)plt section. */
7676 rel.r_offset = got_address;
7677 rel.r_addend = 0;
7678 if (dynindx == -1)
7679 {
7680 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7681 The dynamic linker or static executable then calls SYM_VALUE
7682 to determine the correct run-time value of the .igot.plt entry. */
7683 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7684 initial_got_entry = sym_value;
7685 }
7686 else
7687 {
7688 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7689 initial_got_entry = (splt->output_section->vma
7690 + splt->output_offset);
7691 }
7692
7693 /* Fill in the entry in the global offset table. */
7694 bfd_put_32 (output_bfd, initial_got_entry,
7695 sgot->contents + got_offset);
7696 }
7697
7698 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7699 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7700}
7701
eb043451
PB		 7702/* Some relocations map to different relocations depending on the
7703 target. Return the real relocation. */
8029a119 7704
eb043451
PB		 7705static int
7706arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7707 int r_type)
7708{
7709 switch (r_type)
7710 {
7711 case R_ARM_TARGET1:
7712 if (globals->target1_is_rel)
7713 return R_ARM_REL32;
7714 else
7715 return R_ARM_ABS32;
7716
7717 case R_ARM_TARGET2:
7718 return globals->target2_reloc;
7719
7720 default:
7721 return r_type;
7722 }
7723}
eb043451 7724
ba93b8ac
DJ		 7725/* Return the base VMA address which should be subtracted from real addresses
7726 when resolving @dtpoff relocation.
7727 This is PT_TLS segment p_vaddr. */
7728
7729static bfd_vma
7730dtpoff_base (struct bfd_link_info *info)
7731{
7732 /* If tls_sec is NULL, we should have signalled an error already. */
7733 if (elf_hash_table (info)->tls_sec == NULL)
7734 return 0;
7735 return elf_hash_table (info)->tls_sec->vma;
7736}
7737
7738/* Return the relocation value for @tpoff relocation
7739 if STT_TLS virtual address is ADDRESS. */
7740
7741static bfd_vma
7742tpoff (struct bfd_link_info *info, bfd_vma address)
7743{
7744 struct elf_link_hash_table *htab = elf_hash_table (info);
7745 bfd_vma base;
7746
7747 /* If tls_sec is NULL, we should have signalled an error already. */
7748 if (htab->tls_sec == NULL)
7749 return 0;
7750 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7751 return address - htab->tls_sec->vma + base;
7752}
7753
00a97672
RS		 7754/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7755 VALUE is the relocation value. */
7756
7757static bfd_reloc_status_type
7758elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7759{
7760 if (value > 0xfff)
7761 return bfd_reloc_overflow;
7762
7763 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7764 bfd_put_32 (abfd, value, data);
7765 return bfd_reloc_ok;
7766}
7767
0855e32b
NS		 7768/* Handle TLS relaxations. Relaxing is possible for symbols that use
7769 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7770 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7771
7772 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7773 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7774 case of error.
7775
7776 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7777 the pre-relaxed code. It would be nice if the relocs were updated
7778 to match the optimization. */
0855e32b 7779
b38cadfb 7780static bfd_reloc_status_type
0855e32b 7781elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7782 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7783 Elf_Internal_Rela *rel, unsigned long is_local)
7784{
7785 unsigned long insn;
b38cadfb 7786
0855e32b
NS		 7787 switch (ELF32_R_TYPE (rel->r_info))
7788 {
7789 default:
7790 return bfd_reloc_notsupported;
b38cadfb 7791
0855e32b
NS		 7792 case R_ARM_TLS_GOTDESC:
7793 if (is_local)
7794 insn = 0;
7795 else
7796 {
7797 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7798 if (insn & 1)
7799 insn -= 5; /* THUMB */
7800 else
7801 insn -= 8; /* ARM */
7802 }
7803 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7804 return bfd_reloc_continue;
7805
7806 case R_ARM_THM_TLS_DESCSEQ:
7807 /* Thumb insn. */
7808 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7809 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7810 {
7811 if (is_local)
7812 /* nop */
7813 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7814 }
7815 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7816 {
7817 if (is_local)
7818 /* nop */
7819 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7820 else
7821 /* ldr rx,[ry] */
7822 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7823 }
7824 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7825 {
7826 if (is_local)
7827 /* nop */
7828 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7829 else
7830 /* mov r0, rx */
7831 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7832 contents + rel->r_offset);
7833 }
7834 else
7835 {
7836 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7837 /* It's a 32 bit instruction, fetch the rest of it for
7838 error generation. */
7839 insn = (insn << 16)
7840 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7841 (*_bfd_error_handler)
7842 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7843 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7844 return bfd_reloc_notsupported;
7845 }
7846 break;
b38cadfb 7847
0855e32b
NS		 7848 case R_ARM_TLS_DESCSEQ:
7849 /* arm insn. */
7850 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7851 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7852 {
7853 if (is_local)
7854 /* mov rx, ry */
7855 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7856 contents + rel->r_offset);
7857 }
7858 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7859 {
7860 if (is_local)
7861 /* nop */
7862 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7863 else
7864 /* ldr rx,[ry] */
7865 bfd_put_32 (input_bfd, insn & 0xfffff000,
7866 contents + rel->r_offset);
7867 }
7868 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7869 {
7870 if (is_local)
7871 /* nop */
7872 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7873 else
7874 /* mov r0, rx */
7875 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7876 contents + rel->r_offset);
7877 }
7878 else
7879 {
7880 (*_bfd_error_handler)
7881 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7882 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7883 return bfd_reloc_notsupported;
7884 }
7885 break;
7886
7887 case R_ARM_TLS_CALL:
7888 /* GD->IE relaxation, turn the instruction into 'nop' or
7889 'ldr r0, [pc,r0]' */
7890 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7891 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7892 break;
b38cadfb 7893
0855e32b
NS		 7894 case R_ARM_THM_TLS_CALL:
7895 /* GD->IE relaxation */
7896 if (!is_local)
7897 /* add r0,pc; ldr r0, [r0] */
7898 insn = 0x44786800;
7899 else if (arch_has_thumb2_nop (globals))
7900 /* nop.w */
7901 insn = 0xf3af8000;
7902 else
7903 /* nop; nop */
7904 insn = 0xbf00bf00;
b38cadfb 7905
0855e32b
NS		 7906 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7907 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7908 break;
7909 }
7910 return bfd_reloc_ok;
7911}
7912
4962c51a
MS		 7913/* For a given value of n, calculate the value of G_n as required to
7914 deal with group relocations. We return it in the form of an
7915 encoded constant-and-rotation, together with the final residual. If n is
7916 specified as less than zero, then final_residual is filled with the
7917 input value and no further action is performed. */
7918
7919static bfd_vma
7920calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7921{
7922 int current_n;
7923 bfd_vma g_n;
7924 bfd_vma encoded_g_n = 0;
7925 bfd_vma residual = value; /* Also known as Y_n. */
7926
7927 for (current_n = 0; current_n <= n; current_n++)
7928 {
7929 int shift;
7930
7931 /* Calculate which part of the value to mask. */
7932 if (residual == 0)
7933 shift = 0;
7934 else
7935 {
7936 int msb;
7937
7938 /* Determine the most significant bit in the residual and
7939 align the resulting value to a 2-bit boundary. */
7940 for (msb = 30; msb >= 0; msb -= 2)
7941 if (residual & (3 << msb))
7942 break;
7943
7944 /* The desired shift is now (msb - 6), or zero, whichever
7945 is the greater. */
7946 shift = msb - 6;
7947 if (shift < 0)
7948 shift = 0;
7949 }
7950
7951 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7952 g_n = residual & (0xff << shift);
7953 encoded_g_n = (g_n >> shift)
7954 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7955
7956 /* Calculate the residual for the next time around. */
7957 residual &= ~g_n;
7958 }
7959
7960 *final_residual = residual;
7961
7962 return encoded_g_n;
7963}
7964
7965/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7966 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7967
4962c51a 7968static int
906e58ca 7969identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7970{
7971 int opcode = insn & 0x1e00000;
7972
7973 if (opcode == 1 << 23) /* ADD */
7974 return 1;
7975
7976 if (opcode == 1 << 22) /* SUB */
7977 return -1;
7978
7979 return 0;
7980}
7981
252b5132 7982/* Perform a relocation as part of a final link. */
9b485d32 7983
252b5132 7984static bfd_reloc_status_type
57e8b36a
NC		 7985elf32_arm_final_link_relocate (reloc_howto_type * howto,
7986 bfd * input_bfd,
7987 bfd * output_bfd,
7988 asection * input_section,
7989 bfd_byte * contents,
7990 Elf_Internal_Rela * rel,
7991 bfd_vma value,
7992 struct bfd_link_info * info,
7993 asection * sym_sec,
7994 const char * sym_name,
34e77a92
RS		 7995 unsigned char st_type,
7996 enum arm_st_branch_type branch_type,
0945cdfd 7997 struct elf_link_hash_entry * h,
f2a9dd69 7998 bfd_boolean * unresolved_reloc_p,
8029a119 7999 char ** error_message)
252b5132
RH		 8000{
8001 unsigned long r_type = howto->type;
8002 unsigned long r_symndx;
8003 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8004 bfd_vma * local_got_offsets;
0855e32b 8005 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8006 asection * sgot;
8007 asection * splt;
252b5132 8008 asection * sreloc = NULL;
362d30a1 8009 asection * srelgot;
252b5132 8010 bfd_vma addend;
ba96a88f 8011 bfd_signed_vma signed_addend;
34e77a92
RS		 8012 unsigned char dynreloc_st_type;
8013 bfd_vma dynreloc_value;
ba96a88f 8014 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8015 struct elf32_arm_link_hash_entry *eh;
8016 union gotplt_union *root_plt;
8017 struct arm_plt_info *arm_plt;
8018 bfd_vma plt_offset;
8019 bfd_vma gotplt_offset;
8020 bfd_boolean has_iplt_entry;
f21f3fe0 8021
9c504268 8022 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8023 if (globals == NULL)
8024 return bfd_reloc_notsupported;
9c504268 8025
0ffa91dd
NC		 8026 BFD_ASSERT (is_arm_elf (input_bfd));
8027
8028 /* Some relocation types map to different relocations depending on the
9c504268 8029 target. We pick the right one here. */
eb043451 8030 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8031
8032 /* It is possible to have linker relaxations on some TLS access
8033 models. Update our information here. */
8034 r_type = elf32_arm_tls_transition (info, r_type, h);
8035
eb043451
PB		 8036 if (r_type != howto->type)
8037 howto = elf32_arm_howto_from_type (r_type);
9c504268 8038
cac15327
NC		 8039 /* If the start address has been set, then set the EF_ARM_HASENTRY
8040 flag. Setting this more than once is redundant, but the cost is
8041 not too high, and it keeps the code simple.
99e4ae17 8042
cac15327
NC		 8043 The test is done here, rather than somewhere else, because the
8044 start address is only set just before the final link commences.
8045
8046 Note - if the user deliberately sets a start address of 0, the
8047 flag will not be set. */
8048 if (bfd_get_start_address (output_bfd) != 0)
8049 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8050
34e77a92 8051 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8052 sgot = globals->root.sgot;
252b5132 8053 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8054 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8055
34e77a92
RS		 8056 if (globals->root.dynamic_sections_created)
8057 srelgot = globals->root.srelgot;
8058 else
8059 srelgot = NULL;
8060
252b5132
RH		 8061 r_symndx = ELF32_R_SYM (rel->r_info);
8062
4e7fd91e 8063 if (globals->use_rel)
ba96a88f 8064 {
4e7fd91e
PB		 8065 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8066
8067 if (addend & ((howto->src_mask + 1) >> 1))
8068 {
8069 signed_addend = -1;
8070 signed_addend &= ~ howto->src_mask;
8071 signed_addend |= addend;
8072 }
8073 else
8074 signed_addend = addend;
ba96a88f
NC		 8075 }
8076 else
4e7fd91e 8077 addend = signed_addend = rel->r_addend;
f21f3fe0 8078
34e77a92
RS		 8079 /* Record the symbol information that should be used in dynamic
8080 relocations. */
8081 dynreloc_st_type = st_type;
8082 dynreloc_value = value;
8083 if (branch_type == ST_BRANCH_TO_THUMB)
8084 dynreloc_value |= 1;
8085
8086 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8087 VALUE appropriately for relocations that we resolve at link time. */
8088 has_iplt_entry = FALSE;
8089 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8090 && root_plt->offset != (bfd_vma) -1)
8091 {
8092 plt_offset = root_plt->offset;
8093 gotplt_offset = arm_plt->got_offset;
8094
8095 if (h == NULL || eh->is_iplt)
8096 {
8097 has_iplt_entry = TRUE;
8098 splt = globals->root.iplt;
8099
8100 /* Populate .iplt entries here, because not all of them will
8101 be seen by finish_dynamic_symbol. The lower bit is set if
8102 we have already populated the entry. */
8103 if (plt_offset & 1)
8104 plt_offset--;
8105 else
8106 {
8107 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8108 -1, dynreloc_value);
8109 root_plt->offset |= 1;
8110 }
8111
8112 /* Static relocations always resolve to the .iplt entry. */
8113 st_type = STT_FUNC;
8114 value = (splt->output_section->vma
8115 + splt->output_offset
8116 + plt_offset);
8117 branch_type = ST_BRANCH_TO_ARM;
8118
8119 /* If there are non-call relocations that resolve to the .iplt
8120 entry, then all dynamic ones must too. */
8121 if (arm_plt->noncall_refcount != 0)
8122 {
8123 dynreloc_st_type = st_type;
8124 dynreloc_value = value;
8125 }
8126 }
8127 else
8128 /* We populate the .plt entry in finish_dynamic_symbol. */
8129 splt = globals->root.splt;
8130 }
8131 else
8132 {
8133 splt = NULL;
8134 plt_offset = (bfd_vma) -1;
8135 gotplt_offset = (bfd_vma) -1;
8136 }
8137
252b5132
RH		 8138 switch (r_type)
8139 {
8140 case R_ARM_NONE:
28a094c2
DJ		 8141 /* We don't need to find a value for this symbol. It's just a
8142 marker. */
8143 *unresolved_reloc_p = FALSE;
252b5132
RH		 8144 return bfd_reloc_ok;
8145
00a97672
RS		 8146 case R_ARM_ABS12:
8147 if (!globals->vxworks_p)
8148 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8149
252b5132
RH		 8150 case R_ARM_PC24:
8151 case R_ARM_ABS32:
bb224fc3 8152 case R_ARM_ABS32_NOI:
252b5132 8153 case R_ARM_REL32:
bb224fc3 8154 case R_ARM_REL32_NOI:
5b5bb741
PB		 8155 case R_ARM_CALL:
8156 case R_ARM_JUMP24:
dfc5f959 8157 case R_ARM_XPC25:
eb043451 8158 case R_ARM_PREL31:
7359ea65 8159 case R_ARM_PLT32:
7359ea65
DJ		 8160 /* Handle relocations which should use the PLT entry. ABS32/REL32
8161 will use the symbol's value, which may point to a PLT entry, but we
8162 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8163 branches in this object should go to it, except if the PLT is too
8164 far away, in which case a long branch stub should be inserted. */
bb224fc3 8165 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 8166 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8167 && r_type != R_ARM_CALL
8168 && r_type != R_ARM_JUMP24
8169 && r_type != R_ARM_PLT32)
34e77a92 8170 && plt_offset != (bfd_vma) -1)
7359ea65 8171 {
34e77a92
RS		 8172 /* If we've created a .plt section, and assigned a PLT entry
8173 to this function, it must either be a STT_GNU_IFUNC reference
8174 or not be known to bind locally. In other cases, we should
8175 have cleared the PLT entry by now. */
8176 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8177
8178 value = (splt->output_section->vma
8179 + splt->output_offset
34e77a92 8180 + plt_offset);
0945cdfd 8181 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8182 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8183 contents, rel->r_offset, value,
00a97672 8184 rel->r_addend);
7359ea65
DJ		 8185 }
8186
67687978
PB		 8187 /* When generating a shared object or relocatable executable, these
8188 relocations are copied into the output file to be resolved at
8189 run time. */
8190 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8191 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8192 && !(globals->vxworks_p
3348747a
NS		 8193 && strcmp (input_section->output_section->name,
8194 ".tls_vars") == 0)
bb224fc3 8195 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8196 || !SYMBOL_CALLS_LOCAL (info, h))
ca6b5f82
AM		 8197 && !(input_bfd == globals->stub_bfd
8198 && strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8199 && (h == NULL
8200 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8201 || h->root.type != bfd_link_hash_undefweak)
8202 && r_type != R_ARM_PC24
5b5bb741
PB		 8203 && r_type != R_ARM_CALL
8204 && r_type != R_ARM_JUMP24
ee06dc07 8205 && r_type != R_ARM_PREL31
7359ea65 8206 && r_type != R_ARM_PLT32)
252b5132 8207 {
947216bf 8208 Elf_Internal_Rela outrel;
b34976b6 8209 bfd_boolean skip, relocate;
f21f3fe0 8210
0945cdfd
DJ		 8211 *unresolved_reloc_p = FALSE;
8212
34e77a92 8213 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8214 {
83bac4b0
NC		 8215 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8216 ! globals->use_rel);
f21f3fe0 8217
83bac4b0 8218 if (sreloc == NULL)
252b5132 8219 return bfd_reloc_notsupported;
252b5132 8220 }
f21f3fe0 8221
b34976b6
AM		 8222 skip = FALSE;
8223 relocate = FALSE;
f21f3fe0 8224
00a97672 8225 outrel.r_addend = addend;
c629eae0
JJ		 8226 outrel.r_offset =
8227 _bfd_elf_section_offset (output_bfd, info, input_section,
8228 rel->r_offset);
8229 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8230 skip = TRUE;
0bb2d96a 8231 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8232 skip = TRUE, relocate = TRUE;
252b5132
RH		 8233 outrel.r_offset += (input_section->output_section->vma
8234 + input_section->output_offset);
f21f3fe0 8235
252b5132 8236 if (skip)
0bb2d96a 8237 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8238 else if (h != NULL
8239 && h->dynindx != -1
7359ea65 8240 && (!info->shared
5e681ec4 8241 || !info->symbolic
f5385ebf 8242 || !h->def_regular))
5e681ec4 8243 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8244 else
8245 {
a16385dc
MM		 8246 int symbol;
8247
5e681ec4 8248 /* This symbol is local, or marked to become local. */
34e77a92 8249 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8250 if (globals->symbian_p)
6366ff1e 8251 {
74541ad4
AM		 8252 asection *osec;
8253
6366ff1e
MM		 8254 /* On Symbian OS, the data segment and text segement
8255 can be relocated independently. Therefore, we
8256 must indicate the segment to which this
8257 relocation is relative. The BPABI allows us to
8258 use any symbol in the right segment; we just use
8259 the section symbol as it is convenient. (We
8260 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8261 will not appear in the dynamic symbol table.)
8262
8263 Note that the dynamic linker ignores the section
8264 symbol value, so we don't subtract osec->vma
8265 from the emitted reloc addend. */
10dbd1f3 8266 if (sym_sec)
74541ad4 8267 osec = sym_sec->output_section;
10dbd1f3 8268 else
74541ad4
AM		 8269 osec = input_section->output_section;
8270 symbol = elf_section_data (osec)->dynindx;
8271 if (symbol == 0)
8272 {
8273 struct elf_link_hash_table *htab = elf_hash_table (info);
8274
8275 if ((osec->flags & SEC_READONLY) == 0
8276 && htab->data_index_section != NULL)
8277 osec = htab->data_index_section;
8278 else
8279 osec = htab->text_index_section;
8280 symbol = elf_section_data (osec)->dynindx;
8281 }
6366ff1e
MM		 8282 BFD_ASSERT (symbol != 0);
8283 }
a16385dc
MM		 8284 else
8285 /* On SVR4-ish systems, the dynamic loader cannot
8286 relocate the text and data segments independently,
8287 so the symbol does not matter. */
8288 symbol = 0;
34e77a92
RS		 8289 if (dynreloc_st_type == STT_GNU_IFUNC)
8290 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8291 to the .iplt entry. Instead, every non-call reference
8292 must use an R_ARM_IRELATIVE relocation to obtain the
8293 correct run-time address. */
8294 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8295 else
8296 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8297 if (globals->use_rel)
8298 relocate = TRUE;
8299 else
34e77a92 8300 outrel.r_addend += dynreloc_value;
252b5132 8301 }
f21f3fe0 8302
47beaa6a 8303 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8304
f21f3fe0 8305 /* If this reloc is against an external symbol, we do not want to
252b5132 8306 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8307 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8308 if (! relocate)
8309 return bfd_reloc_ok;
9a5aca8c 8310
f21f3fe0 8311 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8312 contents, rel->r_offset,
8313 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8314 }
8315 else switch (r_type)
8316 {
00a97672
RS		 8317 case R_ARM_ABS12:
8318 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8319
dfc5f959 8320 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8321 case R_ARM_CALL:
8322 case R_ARM_JUMP24:
8029a119 8323 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8324 case R_ARM_PLT32:
906e58ca 8325 {
906e58ca
NC		 8326 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8327
dfc5f959 8328 if (r_type == R_ARM_XPC25)
252b5132 8329 {
dfc5f959
NC		 8330 /* Check for Arm calling Arm function. */
8331 /* FIXME: Should we translate the instruction into a BL
8332 instruction instead ? */
35fc36a8 8333 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8334 (*_bfd_error_handler)
8335 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8336 input_bfd,
8337 h ? h->root.root.string : "(local)");
dfc5f959 8338 }
155d87d7 8339 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8340 {
8341 /* Check for Arm calling Thumb function. */
35fc36a8 8342 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8343 {
f2a9dd69
DJ		 8344 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8345 output_bfd, input_section,
8346 hit_data, sym_sec, rel->r_offset,
8347 signed_addend, value,
8348 error_message))
8349 return bfd_reloc_ok;
8350 else
8351 return bfd_reloc_dangerous;
dfc5f959 8352 }
252b5132 8353 }
ba96a88f 8354
906e58ca 8355 /* Check if a stub has to be inserted because the
8029a119 8356 destination is too far or we are changing mode. */
155d87d7
CL		 8357 if ( r_type == R_ARM_CALL
8358 || r_type == R_ARM_JUMP24
8359 || r_type == R_ARM_PLT32)
906e58ca 8360 {
fe33d2fa
CL		 8361 enum elf32_arm_stub_type stub_type = arm_stub_none;
8362 struct elf32_arm_link_hash_entry *hash;
8363
8364 hash = (struct elf32_arm_link_hash_entry *) h;
8365 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8366 st_type, &branch_type,
8367 hash, value, sym_sec,
fe33d2fa 8368 input_bfd, sym_name);
5fa9e92f 8369
fe33d2fa 8370 if (stub_type != arm_stub_none)
906e58ca
NC		 8371 {
8372 /* The target is out of reach, so redirect the
8373 branch to the local stub for this function. */
906e58ca
NC		 8374 stub_entry = elf32_arm_get_stub_entry (input_section,
8375 sym_sec, h,
fe33d2fa
CL		 8376 rel, globals,
8377 stub_type);
9cd3e4e5
NC		 8378 {
8379 if (stub_entry != NULL)
8380 value = (stub_entry->stub_offset
8381 + stub_entry->stub_sec->output_offset
8382 + stub_entry->stub_sec->output_section->vma);
8383
8384 if (plt_offset != (bfd_vma) -1)
8385 *unresolved_reloc_p = FALSE;
8386 }
906e58ca 8387 }
fe33d2fa
CL		 8388 else
8389 {
8390 /* If the call goes through a PLT entry, make sure to
8391 check distance to the right destination address. */
34e77a92 8392 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8393 {
8394 value = (splt->output_section->vma
8395 + splt->output_offset
34e77a92 8396 + plt_offset);
fe33d2fa
CL		 8397 *unresolved_reloc_p = FALSE;
8398 /* The PLT entry is in ARM mode, regardless of the
8399 target function. */
35fc36a8 8400 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8401 }
8402 }
906e58ca
NC		 8403 }
8404
dea514f5
PB		 8405 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8406 where:
8407 S is the address of the symbol in the relocation.
8408 P is address of the instruction being relocated.
8409 A is the addend (extracted from the instruction) in bytes.
8410
8411 S is held in 'value'.
8412 P is the base address of the section containing the
8413 instruction plus the offset of the reloc into that
8414 section, ie:
8415 (input_section->output_section->vma +
8416 input_section->output_offset +
8417 rel->r_offset).
8418 A is the addend, converted into bytes, ie:
8419 (signed_addend * 4)
8420
8421 Note: None of these operations have knowledge of the pipeline
8422 size of the processor, thus it is up to the assembler to
8423 encode this information into the addend. */
8424 value -= (input_section->output_section->vma
8425 + input_section->output_offset);
8426 value -= rel->r_offset;
4e7fd91e
PB		 8427 if (globals->use_rel)
8428 value += (signed_addend << howto->size);
8429 else
8430 /* RELA addends do not have to be adjusted by howto->size. */
8431 value += signed_addend;
23080146 8432
dcb5e6e6
NC		 8433 signed_addend = value;
8434 signed_addend >>= howto->rightshift;
9a5aca8c 8435
5ab79981 8436 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8437 the next instruction unless a PLT entry will be created.
77b4f08f 8438 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8439 The jump to the next instruction is optimized as a NOP depending
8440 on the architecture. */
ffcb4889 8441 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8442 && plt_offset == (bfd_vma) -1)
77b4f08f 8443 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8444 {
cd1dac3d
DG		 8445 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8446
8447 if (arch_has_arm_nop (globals))
8448 value |= 0x0320f000;
8449 else
8450 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8451 }
8452 else
59f2c4e7 8453 {
9b485d32 8454 /* Perform a signed range check. */
dcb5e6e6 8455 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8456 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8457 return bfd_reloc_overflow;
9a5aca8c 8458
5ab79981 8459 addend = (value & 2);
39b41c9c 8460
5ab79981
PB		 8461 value = (signed_addend & howto->dst_mask)
8462 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8463
5ab79981
PB		 8464 if (r_type == R_ARM_CALL)
8465 {
155d87d7 8466 /* Set the H bit in the BLX instruction. */
35fc36a8 8467 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8468 {
8469 if (addend)
8470 value |= (1 << 24);
8471 else
8472 value &= ~(bfd_vma)(1 << 24);
8473 }
8474
5ab79981 8475 /* Select the correct instruction (BL or BLX). */
906e58ca 8476 /* Only if we are not handling a BL to a stub. In this
8029a119 8477 case, mode switching is performed by the stub. */
35fc36a8 8478 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8479 value |= (1 << 28);
63e1a0fc 8480 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8481 {
8482 value &= ~(bfd_vma)(1 << 28);
8483 value |= (1 << 24);
8484 }
39b41c9c
PB		 8485 }
8486 }
906e58ca 8487 }
252b5132 8488 break;
f21f3fe0 8489
252b5132
RH		 8490 case R_ARM_ABS32:
8491 value += addend;
35fc36a8 8492 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8493 value |= 1;
8494 break;
f21f3fe0 8495
bb224fc3
MS		 8496 case R_ARM_ABS32_NOI:
8497 value += addend;
8498 break;
8499
252b5132 8500 case R_ARM_REL32:
a8bc6c78 8501 value += addend;
35fc36a8 8502 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8503 value |= 1;
252b5132 8504 value -= (input_section->output_section->vma
62efb346 8505 + input_section->output_offset + rel->r_offset);
252b5132 8506 break;
eb043451 8507
bb224fc3
MS		 8508 case R_ARM_REL32_NOI:
8509 value += addend;
8510 value -= (input_section->output_section->vma
8511 + input_section->output_offset + rel->r_offset);
8512 break;
8513
eb043451
PB		 8514 case R_ARM_PREL31:
8515 value -= (input_section->output_section->vma
8516 + input_section->output_offset + rel->r_offset);
8517 value += signed_addend;
8518 if (! h || h->root.type != bfd_link_hash_undefweak)
8519 {
8029a119 8520 /* Check for overflow. */
eb043451
PB		 8521 if ((value ^ (value >> 1)) & (1 << 30))
8522 return bfd_reloc_overflow;
8523 }
8524 value &= 0x7fffffff;
8525 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8526 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8527 value |= 1;
8528 break;
252b5132 8529 }
f21f3fe0 8530
252b5132
RH		 8531 bfd_put_32 (input_bfd, value, hit_data);
8532 return bfd_reloc_ok;
8533
8534 case R_ARM_ABS8:
8535 value += addend;
4e67d4ca
DG		 8536
8537 /* There is no way to tell whether the user intended to use a signed or
8538 unsigned addend. When checking for overflow we accept either,
8539 as specified by the AAELF. */
8540 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8541 return bfd_reloc_overflow;
8542
8543 bfd_put_8 (input_bfd, value, hit_data);
8544 return bfd_reloc_ok;
8545
8546 case R_ARM_ABS16:
8547 value += addend;
8548
4e67d4ca
DG		 8549 /* See comment for R_ARM_ABS8. */
8550 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8551 return bfd_reloc_overflow;
8552
8553 bfd_put_16 (input_bfd, value, hit_data);
8554 return bfd_reloc_ok;
8555
252b5132 8556 case R_ARM_THM_ABS5:
9b485d32 8557 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8558 if (globals->use_rel)
8559 {
8560 /* Need to refetch addend. */
8561 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8562 /* ??? Need to determine shift amount from operand size. */
8563 addend >>= howto->rightshift;
8564 }
252b5132
RH		 8565 value += addend;
8566
8567 /* ??? Isn't value unsigned? */
8568 if ((long) value > 0x1f || (long) value < -0x10)
8569 return bfd_reloc_overflow;
8570
8571 /* ??? Value needs to be properly shifted into place first. */
8572 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8573 bfd_put_16 (input_bfd, value, hit_data);
8574 return bfd_reloc_ok;
8575
2cab6cc3
MS		 8576 case R_ARM_THM_ALU_PREL_11_0:
8577 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8578 {
8579 bfd_vma insn;
8580 bfd_signed_vma relocation;
8581
8582 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8583 | bfd_get_16 (input_bfd, hit_data + 2);
8584
8585 if (globals->use_rel)
8586 {
8587 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8588 | ((insn & (1 << 26)) >> 15);
8589 if (insn & 0xf00000)
8590 signed_addend = -signed_addend;
8591 }
8592
8593 relocation = value + signed_addend;
79f08007
YZ		 8594 relocation -= Pa (input_section->output_section->vma
8595 + input_section->output_offset
8596 + rel->r_offset);
2cab6cc3
MS		 8597
8598 value = abs (relocation);
8599
8600 if (value >= 0x1000)
8601 return bfd_reloc_overflow;
8602
8603 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8604 | ((value & 0x700) << 4)
8605 | ((value & 0x800) << 15);
8606 if (relocation < 0)
8607 insn |= 0xa00000;
8608
8609 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8610 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8611
8612 return bfd_reloc_ok;
8613 }
8614
e1ec24c6
NC		 8615 case R_ARM_THM_PC8:
8616 /* PR 10073: This reloc is not generated by the GNU toolchain,
8617 but it is supported for compatibility with third party libraries
8618 generated by other compilers, specifically the ARM/IAR. */
8619 {
8620 bfd_vma insn;
8621 bfd_signed_vma relocation;
8622
8623 insn = bfd_get_16 (input_bfd, hit_data);
8624
8625 if (globals->use_rel)
79f08007 8626 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8627
8628 relocation = value + addend;
79f08007
YZ		 8629 relocation -= Pa (input_section->output_section->vma
8630 + input_section->output_offset
8631 + rel->r_offset);
e1ec24c6
NC		 8632
8633 value = abs (relocation);
8634
8635 /* We do not check for overflow of this reloc. Although strictly
8636 speaking this is incorrect, it appears to be necessary in order
8637 to work with IAR generated relocs. Since GCC and GAS do not
8638 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8639 a problem for them. */
8640 value &= 0x3fc;
8641
8642 insn = (insn & 0xff00) | (value >> 2);
8643
8644 bfd_put_16 (input_bfd, insn, hit_data);
8645
8646 return bfd_reloc_ok;
8647 }
8648
2cab6cc3
MS		 8649 case R_ARM_THM_PC12:
8650 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8651 {
8652 bfd_vma insn;
8653 bfd_signed_vma relocation;
8654
8655 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8656 | bfd_get_16 (input_bfd, hit_data + 2);
8657
8658 if (globals->use_rel)
8659 {
8660 signed_addend = insn & 0xfff;
8661 if (!(insn & (1 << 23)))
8662 signed_addend = -signed_addend;
8663 }
8664
8665 relocation = value + signed_addend;
79f08007
YZ		 8666 relocation -= Pa (input_section->output_section->vma
8667 + input_section->output_offset
8668 + rel->r_offset);
2cab6cc3
MS		 8669
8670 value = abs (relocation);
8671
8672 if (value >= 0x1000)
8673 return bfd_reloc_overflow;
8674
8675 insn = (insn & 0xff7ff000) | value;
8676 if (relocation >= 0)
8677 insn |= (1 << 23);
8678
8679 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8680 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8681
8682 return bfd_reloc_ok;
8683 }
8684
dfc5f959 8685 case R_ARM_THM_XPC22:
c19d1205 8686 case R_ARM_THM_CALL:
bd97cb95 8687 case R_ARM_THM_JUMP24:
dfc5f959 8688 /* Thumb BL (branch long instruction). */
252b5132 8689 {
b34976b6 8690 bfd_vma relocation;
e95de063 8691 bfd_vma reloc_sign;
b34976b6
AM		 8692 bfd_boolean overflow = FALSE;
8693 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8694 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8695 bfd_signed_vma reloc_signed_max;
8696 bfd_signed_vma reloc_signed_min;
b34976b6 8697 bfd_vma check;
252b5132 8698 bfd_signed_vma signed_check;
e95de063 8699 int bitsize;
cd1dac3d 8700 const int thumb2 = using_thumb2 (globals);
252b5132 8701
5ab79981 8702 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8703 the next instruction unless a PLT entry will be created.
8704 The jump to the next instruction is optimized as a NOP.W for
8705 Thumb-2 enabled architectures. */
19540007 8706 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8707 && plt_offset == (bfd_vma) -1)
5ab79981 8708 {
cd1dac3d
DG		 8709 if (arch_has_thumb2_nop (globals))
8710 {
8711 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8712 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8713 }
8714 else
8715 {
8716 bfd_put_16 (input_bfd, 0xe000, hit_data);
8717 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8718 }
5ab79981
PB		 8719 return bfd_reloc_ok;
8720 }
8721
e95de063
MS		 8722 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8723 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8724 if (globals->use_rel)
8725 {
e95de063
MS		 8726 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8727 bfd_vma upper = upper_insn & 0x3ff;
8728 bfd_vma lower = lower_insn & 0x7ff;
8729 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8730 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8731 bfd_vma i1 = j1 ^ s ? 0 : 1;
8732 bfd_vma i2 = j2 ^ s ? 0 : 1;
8733
8734 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8735 /* Sign extend. */
8736 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8737
4e7fd91e
PB		 8738 signed_addend = addend;
8739 }
cb1afa5c 8740
dfc5f959
NC		 8741 if (r_type == R_ARM_THM_XPC22)
8742 {
8743 /* Check for Thumb to Thumb call. */
8744 /* FIXME: Should we translate the instruction into a BL
8745 instruction instead ? */
35fc36a8 8746 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8747 (*_bfd_error_handler)
8748 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8749 input_bfd,
8750 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8751 }
8752 else
252b5132 8753 {
dfc5f959
NC		 8754 /* If it is not a call to Thumb, assume call to Arm.
8755 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8756 function call at all, but rather a long jump. Calls through
8757 the PLT do not require stubs. */
34e77a92 8758 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8759 {
bd97cb95 8760 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8761 {
8762 /* Convert BL to BLX. */
8763 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8764 }
155d87d7
CL		 8765 else if (( r_type != R_ARM_THM_CALL)
8766 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8767 {
8768 if (elf32_thumb_to_arm_stub
8769 (info, sym_name, input_bfd, output_bfd, input_section,
8770 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8771 error_message))
8772 return bfd_reloc_ok;
8773 else
8774 return bfd_reloc_dangerous;
8775 }
da5938a2 8776 }
35fc36a8
RS		 8777 else if (branch_type == ST_BRANCH_TO_THUMB
8778 && globals->use_blx
bd97cb95 8779 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8780 {
8781 /* Make sure this is a BL. */
8782 lower_insn |= 0x1800;
8783 }
252b5132 8784 }
f21f3fe0 8785
fe33d2fa 8786 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8787 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8788 {
8789 /* Check if a stub has to be inserted because the destination
8029a119 8790 is too far. */
fe33d2fa
CL		 8791 struct elf32_arm_stub_hash_entry *stub_entry;
8792 struct elf32_arm_link_hash_entry *hash;
8793
8794 hash = (struct elf32_arm_link_hash_entry *) h;
8795
8796 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8797 st_type, &branch_type,
8798 hash, value, sym_sec,
fe33d2fa
CL		 8799 input_bfd, sym_name);
8800
8801 if (stub_type != arm_stub_none)
906e58ca
NC		 8802 {
8803 /* The target is out of reach or we are changing modes, so
8804 redirect the branch to the local stub for this
8805 function. */
8806 stub_entry = elf32_arm_get_stub_entry (input_section,
8807 sym_sec, h,
fe33d2fa
CL		 8808 rel, globals,
8809 stub_type);
906e58ca 8810 if (stub_entry != NULL)
9cd3e4e5
NC		 8811 {
8812 value = (stub_entry->stub_offset
8813 + stub_entry->stub_sec->output_offset
8814 + stub_entry->stub_sec->output_section->vma);
8815
8816 if (plt_offset != (bfd_vma) -1)
8817 *unresolved_reloc_p = FALSE;
8818 }
906e58ca 8819
f4ac8484 8820 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8821 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8822 {
8823 if ((stub_entry
8824 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8825 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8826 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8827 }
906e58ca
NC		 8828 }
8829 }
8830
fe33d2fa 8831 /* Handle calls via the PLT. */
34e77a92 8832 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8833 {
8834 value = (splt->output_section->vma
8835 + splt->output_offset
34e77a92 8836 + plt_offset);
fe33d2fa
CL		 8837
8838 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8839 {
8840 /* If the Thumb BLX instruction is available, convert
8841 the BL to a BLX instruction to call the ARM-mode
8842 PLT entry. */
8843 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8844 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8845 }
8846 else
8847 {
8848 /* Target the Thumb stub before the ARM PLT entry. */
8849 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8850 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8851 }
8852 *unresolved_reloc_p = FALSE;
8853 }
8854
ba96a88f 8855 relocation = value + signed_addend;
f21f3fe0 8856
252b5132 8857 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8858 + input_section->output_offset
8859 + rel->r_offset);
9a5aca8c 8860
252b5132
RH		 8861 check = relocation >> howto->rightshift;
8862
8863 /* If this is a signed value, the rightshift just dropped
8864 leading 1 bits (assuming twos complement). */
8865 if ((bfd_signed_vma) relocation >= 0)
8866 signed_check = check;
8867 else
8868 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8869
e95de063
MS		 8870 /* Calculate the permissable maximum and minimum values for
8871 this relocation according to whether we're relocating for
8872 Thumb-2 or not. */
8873 bitsize = howto->bitsize;
8874 if (!thumb2)
8875 bitsize -= 2;
f6ebfac0 8876 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8877 reloc_signed_min = ~reloc_signed_max;
8878
252b5132 8879 /* Assumes two's complement. */
ba96a88f 8880 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8881 overflow = TRUE;
252b5132 8882
bd97cb95 8883 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8884 /* For a BLX instruction, make sure that the relocation is rounded up
8885 to a word boundary. This follows the semantics of the instruction
8886 which specifies that bit 1 of the target address will come from bit
8887 1 of the base address. */
8888 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8889
e95de063
MS		 8890 /* Put RELOCATION back into the insn. Assumes two's complement.
8891 We use the Thumb-2 encoding, which is safe even if dealing with
8892 a Thumb-1 instruction by virtue of our overflow check above. */
8893 reloc_sign = (signed_check < 0) ? 1 : 0;
8894 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8895 | ((relocation >> 12) & 0x3ff)
8896 | (reloc_sign << 10);
906e58ca 8897 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8898 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8899 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8900 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8901
252b5132
RH		 8902 /* Put the relocated value back in the object file: */
8903 bfd_put_16 (input_bfd, upper_insn, hit_data);
8904 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8905
8906 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8907 }
8908 break;
8909
c19d1205
ZW		 8910 case R_ARM_THM_JUMP19:
8911 /* Thumb32 conditional branch instruction. */
8912 {
8913 bfd_vma relocation;
8914 bfd_boolean overflow = FALSE;
8915 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8916 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8917 bfd_signed_vma reloc_signed_max = 0xffffe;
8918 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8919 bfd_signed_vma signed_check;
8920
8921 /* Need to refetch the addend, reconstruct the top three bits,
8922 and squish the two 11 bit pieces together. */
8923 if (globals->use_rel)
8924 {
8925 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8926 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8927 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8928 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8929 bfd_vma lower = (lower_insn & 0x07ff);
8930
a00a1f35
MS		 8931 upper |= J1 << 6;
8932 upper |= J2 << 7;
8933 upper |= (!S) << 8;
c19d1205
ZW		 8934 upper -= 0x0100; /* Sign extend. */
8935
8936 addend = (upper << 12) | (lower << 1);
8937 signed_addend = addend;
8938 }
8939
bd97cb95 8940 /* Handle calls via the PLT. */
34e77a92 8941 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 8942 {
8943 value = (splt->output_section->vma
8944 + splt->output_offset
34e77a92 8945 + plt_offset);
bd97cb95
DJ		 8946 /* Target the Thumb stub before the ARM PLT entry. */
8947 value -= PLT_THUMB_STUB_SIZE;
8948 *unresolved_reloc_p = FALSE;
8949 }
8950
c19d1205
ZW		 8951 /* ??? Should handle interworking? GCC might someday try to
8952 use this for tail calls. */
8953
8954 relocation = value + signed_addend;
8955 relocation -= (input_section->output_section->vma
8956 + input_section->output_offset
8957 + rel->r_offset);
a00a1f35 8958 signed_check = (bfd_signed_vma) relocation;
c19d1205 8959
c19d1205
ZW		 8960 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8961 overflow = TRUE;
8962
8963 /* Put RELOCATION back into the insn. */
8964 {
8965 bfd_vma S = (relocation & 0x00100000) >> 20;
8966 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8967 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8968 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8969 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8970
a00a1f35 8971 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 8972 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8973 }
8974
8975 /* Put the relocated value back in the object file: */
8976 bfd_put_16 (input_bfd, upper_insn, hit_data);
8977 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8978
8979 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8980 }
8981
8982 case R_ARM_THM_JUMP11:
8983 case R_ARM_THM_JUMP8:
8984 case R_ARM_THM_JUMP6:
51c5503b
NC		 8985 /* Thumb B (branch) instruction). */
8986 {
6cf9e9fe 8987 bfd_signed_vma relocation;
51c5503b
NC		 8988 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8989 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 8990 bfd_signed_vma signed_check;
8991
c19d1205
ZW		 8992 /* CZB cannot jump backward. */
8993 if (r_type == R_ARM_THM_JUMP6)
8994 reloc_signed_min = 0;
8995
4e7fd91e 8996 if (globals->use_rel)
6cf9e9fe 8997 {
4e7fd91e
PB		 8998 /* Need to refetch addend. */
8999 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9000 if (addend & ((howto->src_mask + 1) >> 1))
9001 {
9002 signed_addend = -1;
9003 signed_addend &= ~ howto->src_mask;
9004 signed_addend |= addend;
9005 }
9006 else
9007 signed_addend = addend;
9008 /* The value in the insn has been right shifted. We need to
9009 undo this, so that we can perform the address calculation
9010 in terms of bytes. */
9011 signed_addend <<= howto->rightshift;
6cf9e9fe 9012 }
6cf9e9fe 9013 relocation = value + signed_addend;
51c5503b
NC		 9014
9015 relocation -= (input_section->output_section->vma
9016 + input_section->output_offset
9017 + rel->r_offset);
9018
6cf9e9fe
NC		 9019 relocation >>= howto->rightshift;
9020 signed_check = relocation;
c19d1205
ZW		 9021
9022 if (r_type == R_ARM_THM_JUMP6)
9023 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9024 else
9025 relocation &= howto->dst_mask;
51c5503b 9026 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9027
51c5503b
NC		 9028 bfd_put_16 (input_bfd, relocation, hit_data);
9029
9030 /* Assumes two's complement. */
9031 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9032 return bfd_reloc_overflow;
9033
9034 return bfd_reloc_ok;
9035 }
cedb70c5 9036
8375c36b
PB		 9037 case R_ARM_ALU_PCREL7_0:
9038 case R_ARM_ALU_PCREL15_8:
9039 case R_ARM_ALU_PCREL23_15:
9040 {
9041 bfd_vma insn;
9042 bfd_vma relocation;
9043
9044 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9045 if (globals->use_rel)
9046 {
9047 /* Extract the addend. */
9048 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9049 signed_addend = addend;
9050 }
8375c36b
PB		 9051 relocation = value + signed_addend;
9052
9053 relocation -= (input_section->output_section->vma
9054 + input_section->output_offset
9055 + rel->r_offset);
9056 insn = (insn & ~0xfff)
9057 | ((howto->bitpos << 7) & 0xf00)
9058 | ((relocation >> howto->bitpos) & 0xff);
9059 bfd_put_32 (input_bfd, value, hit_data);
9060 }
9061 return bfd_reloc_ok;
9062
252b5132
RH		 9063 case R_ARM_GNU_VTINHERIT:
9064 case R_ARM_GNU_VTENTRY:
9065 return bfd_reloc_ok;
9066
c19d1205 9067 case R_ARM_GOTOFF32:
252b5132
RH		 9068 /* Relocation is relative to the start of the
9069 global offset table. */
9070
9071 BFD_ASSERT (sgot != NULL);
9072 if (sgot == NULL)
9073 return bfd_reloc_notsupported;
9a5aca8c 9074
cedb70c5 9075 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9076 address by one, so that attempts to call the function pointer will
9077 correctly interpret it as Thumb code. */
35fc36a8 9078 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9079 value += 1;
9080
252b5132
RH		 9081 /* Note that sgot->output_offset is not involved in this
9082 calculation. We always want the start of .got. If we
9083 define _GLOBAL_OFFSET_TABLE in a different way, as is
9084 permitted by the ABI, we might have to change this
9b485d32 9085 calculation. */
252b5132 9086 value -= sgot->output_section->vma;
f21f3fe0 9087 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9088 contents, rel->r_offset, value,
00a97672 9089 rel->r_addend);
252b5132
RH		 9090
9091 case R_ARM_GOTPC:
a7c10850 9092 /* Use global offset table as symbol value. */
252b5132 9093 BFD_ASSERT (sgot != NULL);
f21f3fe0 9094
252b5132
RH		 9095 if (sgot == NULL)
9096 return bfd_reloc_notsupported;
9097
0945cdfd 9098 *unresolved_reloc_p = FALSE;
252b5132 9099 value = sgot->output_section->vma;
f21f3fe0 9100 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9101 contents, rel->r_offset, value,
00a97672 9102 rel->r_addend);
f21f3fe0 9103
252b5132 9104 case R_ARM_GOT32:
eb043451 9105 case R_ARM_GOT_PREL:
252b5132 9106 /* Relocation is to the entry for this symbol in the
9b485d32 9107 global offset table. */
252b5132
RH		 9108 if (sgot == NULL)
9109 return bfd_reloc_notsupported;
f21f3fe0 9110
34e77a92
RS		 9111 if (dynreloc_st_type == STT_GNU_IFUNC
9112 && plt_offset != (bfd_vma) -1
9113 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9114 {
9115 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9116 symbol, and the relocation resolves directly to the runtime
9117 target rather than to the .iplt entry. This means that any
9118 .got entry would be the same value as the .igot.plt entry,
9119 so there's no point creating both. */
9120 sgot = globals->root.igotplt;
9121 value = sgot->output_offset + gotplt_offset;
9122 }
9123 else if (h != NULL)
252b5132
RH		 9124 {
9125 bfd_vma off;
f21f3fe0 9126
252b5132
RH		 9127 off = h->got.offset;
9128 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9129 if ((off & 1) != 0)
252b5132 9130 {
b436d854
RS		 9131 /* We have already processsed one GOT relocation against
9132 this symbol. */
9133 off &= ~1;
9134 if (globals->root.dynamic_sections_created
9135 && !SYMBOL_REFERENCES_LOCAL (info, h))
9136 *unresolved_reloc_p = FALSE;
9137 }
9138 else
9139 {
9140 Elf_Internal_Rela outrel;
9141
9142 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9143 {
9144 /* If the symbol doesn't resolve locally in a static
9145 object, we have an undefined reference. If the
9146 symbol doesn't resolve locally in a dynamic object,
9147 it should be resolved by the dynamic linker. */
9148 if (globals->root.dynamic_sections_created)
9149 {
9150 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9151 *unresolved_reloc_p = FALSE;
9152 }
9153 else
9154 outrel.r_info = 0;
9155 outrel.r_addend = 0;
9156 }
252b5132
RH		 9157 else
9158 {
34e77a92
RS		 9159 if (dynreloc_st_type == STT_GNU_IFUNC)
9160 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9161 else if (info->shared)
9162 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9163 else
9164 outrel.r_info = 0;
9165 outrel.r_addend = dynreloc_value;
b436d854 9166 }
ee29b9fb 9167
b436d854
RS		 9168 /* The GOT entry is initialized to zero by default.
9169 See if we should install a different value. */
9170 if (outrel.r_addend != 0
9171 && (outrel.r_info == 0 || globals->use_rel))
9172 {
9173 bfd_put_32 (output_bfd, outrel.r_addend,
9174 sgot->contents + off);
9175 outrel.r_addend = 0;
252b5132 9176 }
f21f3fe0 9177
b436d854
RS		 9178 if (outrel.r_info != 0)
9179 {
9180 outrel.r_offset = (sgot->output_section->vma
9181 + sgot->output_offset
9182 + off);
9183 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9184 }
9185 h->got.offset |= 1;
9186 }
252b5132
RH		 9187 value = sgot->output_offset + off;
9188 }
9189 else
9190 {
9191 bfd_vma off;
f21f3fe0 9192
252b5132
RH		 9193 BFD_ASSERT (local_got_offsets != NULL &&
9194 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9195
252b5132 9196 off = local_got_offsets[r_symndx];
f21f3fe0 9197
252b5132
RH		 9198 /* The offset must always be a multiple of 4. We use the
9199 least significant bit to record whether we have already
9b485d32 9200 generated the necessary reloc. */
252b5132
RH		 9201 if ((off & 1) != 0)
9202 off &= ~1;
9203 else
9204 {
00a97672 9205 if (globals->use_rel)
34e77a92 9206 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9207
34e77a92 9208 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9209 {
947216bf 9210 Elf_Internal_Rela outrel;
f21f3fe0 9211
34e77a92 9212 outrel.r_addend = addend + dynreloc_value;
252b5132 9213 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9214 + sgot->output_offset
252b5132 9215 + off);
34e77a92
RS		 9216 if (dynreloc_st_type == STT_GNU_IFUNC)
9217 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9218 else
9219 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9220 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9221 }
f21f3fe0 9222
252b5132
RH		 9223 local_got_offsets[r_symndx] |= 1;
9224 }
f21f3fe0 9225
252b5132
RH		 9226 value = sgot->output_offset + off;
9227 }
eb043451
PB		 9228 if (r_type != R_ARM_GOT32)
9229 value += sgot->output_section->vma;
9a5aca8c 9230
f21f3fe0 9231 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9232 contents, rel->r_offset, value,
00a97672 9233 rel->r_addend);
f21f3fe0 9234
ba93b8ac
DJ		 9235 case R_ARM_TLS_LDO32:
9236 value = value - dtpoff_base (info);
9237
9238 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9239 contents, rel->r_offset, value,
9240 rel->r_addend);
ba93b8ac
DJ		 9241
9242 case R_ARM_TLS_LDM32:
9243 {
9244 bfd_vma off;
9245
362d30a1 9246 if (sgot == NULL)
ba93b8ac
DJ		 9247 abort ();
9248
9249 off = globals->tls_ldm_got.offset;
9250
9251 if ((off & 1) != 0)
9252 off &= ~1;
9253 else
9254 {
9255 /* If we don't know the module number, create a relocation
9256 for it. */
9257 if (info->shared)
9258 {
9259 Elf_Internal_Rela outrel;
ba93b8ac 9260
362d30a1 9261 if (srelgot == NULL)
ba93b8ac
DJ		 9262 abort ();
9263
00a97672 9264 outrel.r_addend = 0;
362d30a1
RS		 9265 outrel.r_offset = (sgot->output_section->vma
9266 + sgot->output_offset + off);
ba93b8ac
DJ		 9267 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9268
00a97672
RS		 9269 if (globals->use_rel)
9270 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9271 sgot->contents + off);
ba93b8ac 9272
47beaa6a 9273 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9274 }
9275 else
362d30a1 9276 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9277
9278 globals->tls_ldm_got.offset |= 1;
9279 }
9280
362d30a1 9281 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9282 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9283
9284 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9285 contents, rel->r_offset, value,
00a97672 9286 rel->r_addend);
ba93b8ac
DJ		 9287 }
9288
0855e32b
NS		 9289 case R_ARM_TLS_CALL:
9290 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9291 case R_ARM_TLS_GD32:
9292 case R_ARM_TLS_IE32:
0855e32b
NS		 9293 case R_ARM_TLS_GOTDESC:
9294 case R_ARM_TLS_DESCSEQ:
9295 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9296 {
0855e32b
NS		 9297 bfd_vma off, offplt;
9298 int indx = 0;
ba93b8ac
DJ		 9299 char tls_type;
9300
0855e32b 9301 BFD_ASSERT (sgot != NULL);
ba93b8ac 9302
ba93b8ac
DJ		 9303 if (h != NULL)
9304 {
9305 bfd_boolean dyn;
9306 dyn = globals->root.dynamic_sections_created;
9307 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9308 && (!info->shared
9309 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9310 {
9311 *unresolved_reloc_p = FALSE;
9312 indx = h->dynindx;
9313 }
9314 off = h->got.offset;
0855e32b 9315 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9316 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9317 }
9318 else
9319 {
0855e32b 9320 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9321 off = local_got_offsets[r_symndx];
0855e32b 9322 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9323 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9324 }
9325
0855e32b 9326 /* Linker relaxations happens from one of the
b38cadfb 9327 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9328 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9329 tls_type = GOT_TLS_IE;
0855e32b
NS		 9330
9331 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9332
9333 if ((off & 1) != 0)
9334 off &= ~1;
9335 else
9336 {
9337 bfd_boolean need_relocs = FALSE;
9338 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9339 int cur_off = off;
9340
9341 /* The GOT entries have not been initialized yet. Do it
9342 now, and emit any relocations. If both an IE GOT and a
9343 GD GOT are necessary, we emit the GD first. */
9344
9345 if ((info->shared || indx != 0)
9346 && (h == NULL
9347 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9348 || h->root.type != bfd_link_hash_undefweak))
9349 {
9350 need_relocs = TRUE;
0855e32b 9351 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9352 }
9353
0855e32b
NS		 9354 if (tls_type & GOT_TLS_GDESC)
9355 {
47beaa6a
RS		 9356 bfd_byte *loc;
9357
0855e32b
NS		 9358 /* We should have relaxed, unless this is an undefined
9359 weak symbol. */
9360 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9361 || info->shared);
9362 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9363 <= globals->root.sgotplt->size);
9364
9365 outrel.r_addend = 0;
9366 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9367 + globals->root.sgotplt->output_offset
9368 + offplt
9369 + globals->sgotplt_jump_table_size);
b38cadfb 9370
0855e32b
NS		 9371 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9372 sreloc = globals->root.srelplt;
9373 loc = sreloc->contents;
9374 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9375 BFD_ASSERT (loc + RELOC_SIZE (globals)
9376 <= sreloc->contents + sreloc->size);
9377
9378 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9379
9380 /* For globals, the first word in the relocation gets
9381 the relocation index and the top bit set, or zero,
9382 if we're binding now. For locals, it gets the
9383 symbol's offset in the tls section. */
9384 bfd_put_32 (output_bfd,
9385 !h ? value - elf_hash_table (info)->tls_sec->vma
9386 : info->flags & DF_BIND_NOW ? 0
9387 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9388 globals->root.sgotplt->contents + offplt
9389 + globals->sgotplt_jump_table_size);
9390
0855e32b
NS		 9391 /* Second word in the relocation is always zero. */
9392 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9393 globals->root.sgotplt->contents + offplt
9394 + globals->sgotplt_jump_table_size + 4);
0855e32b 9395 }
ba93b8ac
DJ		 9396 if (tls_type & GOT_TLS_GD)
9397 {
9398 if (need_relocs)
9399 {
00a97672 9400 outrel.r_addend = 0;
362d30a1
RS		 9401 outrel.r_offset = (sgot->output_section->vma
9402 + sgot->output_offset
00a97672 9403 + cur_off);
ba93b8ac 9404 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9405
00a97672
RS		 9406 if (globals->use_rel)
9407 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9408 sgot->contents + cur_off);
00a97672 9409
47beaa6a 9410 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9411
9412 if (indx == 0)
9413 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9414 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9415 else
9416 {
00a97672 9417 outrel.r_addend = 0;
ba93b8ac
DJ		 9418 outrel.r_info = ELF32_R_INFO (indx,
9419 R_ARM_TLS_DTPOFF32);
9420 outrel.r_offset += 4;
00a97672
RS		 9421
9422 if (globals->use_rel)
9423 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9424 sgot->contents + cur_off + 4);
00a97672 9425
47beaa6a
RS		 9426 elf32_arm_add_dynreloc (output_bfd, info,
9427 srelgot, &outrel);
ba93b8ac
DJ		 9428 }
9429 }
9430 else
9431 {
9432 /* If we are not emitting relocations for a
9433 general dynamic reference, then we must be in a
9434 static link or an executable link with the
9435 symbol binding locally. Mark it as belonging
9436 to module 1, the executable. */
9437 bfd_put_32 (output_bfd, 1,
362d30a1 9438 sgot->contents + cur_off);
ba93b8ac 9439 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9440 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9441 }
9442
9443 cur_off += 8;
9444 }
9445
9446 if (tls_type & GOT_TLS_IE)
9447 {
9448 if (need_relocs)
9449 {
00a97672
RS		 9450 if (indx == 0)
9451 outrel.r_addend = value - dtpoff_base (info);
9452 else
9453 outrel.r_addend = 0;
362d30a1
RS		 9454 outrel.r_offset = (sgot->output_section->vma
9455 + sgot->output_offset
ba93b8ac
DJ		 9456 + cur_off);
9457 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9458
00a97672
RS		 9459 if (globals->use_rel)
9460 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9461 sgot->contents + cur_off);
ba93b8ac 9462
47beaa6a 9463 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9464 }
9465 else
9466 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9467 sgot->contents + cur_off);
ba93b8ac
DJ		 9468 cur_off += 4;
9469 }
9470
9471 if (h != NULL)
9472 h->got.offset |= 1;
9473 else
9474 local_got_offsets[r_symndx] |= 1;
9475 }
9476
9477 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9478 off += 8;
0855e32b
NS		 9479 else if (tls_type & GOT_TLS_GDESC)
9480 off = offplt;
9481
9482 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9483 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9484 {
9485 bfd_signed_vma offset;
12352d3f
PB		 9486 /* TLS stubs are arm mode. The original symbol is a
9487 data object, so branch_type is bogus. */
9488 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9489 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9490 = arm_type_of_stub (info, input_section, rel,
9491 st_type, &branch_type,
0855e32b
NS		 9492 (struct elf32_arm_link_hash_entry *)h,
9493 globals->tls_trampoline, globals->root.splt,
9494 input_bfd, sym_name);
9495
9496 if (stub_type != arm_stub_none)
9497 {
9498 struct elf32_arm_stub_hash_entry *stub_entry
9499 = elf32_arm_get_stub_entry
9500 (input_section, globals->root.splt, 0, rel,
9501 globals, stub_type);
9502 offset = (stub_entry->stub_offset
9503 + stub_entry->stub_sec->output_offset
9504 + stub_entry->stub_sec->output_section->vma);
9505 }
9506 else
9507 offset = (globals->root.splt->output_section->vma
9508 + globals->root.splt->output_offset
9509 + globals->tls_trampoline);
9510
9511 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9512 {
9513 unsigned long inst;
b38cadfb
NC		 9514
9515 offset -= (input_section->output_section->vma
9516 + input_section->output_offset
9517 + rel->r_offset + 8);
0855e32b
NS		 9518
9519 inst = offset >> 2;
9520 inst &= 0x00ffffff;
9521 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9522 }
9523 else
9524 {
9525 /* Thumb blx encodes the offset in a complicated
9526 fashion. */
9527 unsigned upper_insn, lower_insn;
9528 unsigned neg;
9529
b38cadfb
NC		 9530 offset -= (input_section->output_section->vma
9531 + input_section->output_offset
0855e32b 9532 + rel->r_offset + 4);
b38cadfb 9533
12352d3f
PB		 9534 if (stub_type != arm_stub_none
9535 && arm_stub_is_thumb (stub_type))
9536 {
9537 lower_insn = 0xd000;
9538 }
9539 else
9540 {
9541 lower_insn = 0xc000;
9542 /* Round up the offset to a word boundary */
9543 offset = (offset + 2) & ~2;
9544 }
9545
0855e32b
NS		 9546 neg = offset < 0;
9547 upper_insn = (0xf000
9548 | ((offset >> 12) & 0x3ff)
9549 | (neg << 10));
12352d3f 9550 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9551 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9552 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9553 bfd_put_16 (input_bfd, upper_insn, hit_data);
9554 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9555 return bfd_reloc_ok;
9556 }
9557 }
9558 /* These relocations needs special care, as besides the fact
9559 they point somewhere in .gotplt, the addend must be
9560 adjusted accordingly depending on the type of instruction
9561 we refer to */
9562 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9563 {
9564 unsigned long data, insn;
9565 unsigned thumb;
b38cadfb 9566
0855e32b
NS		 9567 data = bfd_get_32 (input_bfd, hit_data);
9568 thumb = data & 1;
9569 data &= ~1u;
b38cadfb 9570
0855e32b
NS		 9571 if (thumb)
9572 {
9573 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9574 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9575 insn = (insn << 16)
9576 | bfd_get_16 (input_bfd,
9577 contents + rel->r_offset - data + 2);
9578 if ((insn & 0xf800c000) == 0xf000c000)
9579 /* bl/blx */
9580 value = -6;
9581 else if ((insn & 0xffffff00) == 0x4400)
9582 /* add */
9583 value = -5;
9584 else
9585 {
9586 (*_bfd_error_handler)
9587 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9588 input_bfd, input_section,
9589 (unsigned long)rel->r_offset, insn);
9590 return bfd_reloc_notsupported;
9591 }
9592 }
9593 else
9594 {
9595 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9596
9597 switch (insn >> 24)
9598 {
9599 case 0xeb: /* bl */
9600 case 0xfa: /* blx */
9601 value = -4;
9602 break;
9603
9604 case 0xe0: /* add */
9605 value = -8;
9606 break;
b38cadfb 9607
0855e32b
NS		 9608 default:
9609 (*_bfd_error_handler)
9610 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9611 input_bfd, input_section,
9612 (unsigned long)rel->r_offset, insn);
9613 return bfd_reloc_notsupported;
9614 }
9615 }
b38cadfb 9616
0855e32b
NS		 9617 value += ((globals->root.sgotplt->output_section->vma
9618 + globals->root.sgotplt->output_offset + off)
9619 - (input_section->output_section->vma
9620 + input_section->output_offset
9621 + rel->r_offset)
9622 + globals->sgotplt_jump_table_size);
9623 }
9624 else
9625 value = ((globals->root.sgot->output_section->vma
9626 + globals->root.sgot->output_offset + off)
9627 - (input_section->output_section->vma
9628 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9629
9630 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9631 contents, rel->r_offset, value,
00a97672 9632 rel->r_addend);
ba93b8ac
DJ		 9633 }
9634
9635 case R_ARM_TLS_LE32:
9ec0c936 9636 if (info->shared && !info->pie)
ba93b8ac
DJ		 9637 {
9638 (*_bfd_error_handler)
9639 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9640 input_bfd, input_section,
9641 (long) rel->r_offset, howto->name);
46691134 9642 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9643 }
9644 else
9645 value = tpoff (info, value);
906e58ca 9646
ba93b8ac 9647 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9648 contents, rel->r_offset, value,
9649 rel->r_addend);
ba93b8ac 9650
319850b4
JB		 9651 case R_ARM_V4BX:
9652 if (globals->fix_v4bx)
845b51d6
PB		 9653 {
9654 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9655
845b51d6
PB		 9656 /* Ensure that we have a BX instruction. */
9657 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9658
845b51d6
PB		 9659 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9660 {
9661 /* Branch to veneer. */
9662 bfd_vma glue_addr;
9663 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9664 glue_addr -= input_section->output_section->vma
9665 + input_section->output_offset
9666 + rel->r_offset + 8;
9667 insn = (insn & 0xf0000000) | 0x0a000000
9668 | ((glue_addr >> 2) & 0x00ffffff);
9669 }
9670 else
9671 {
9672 /* Preserve Rm (lowest four bits) and the condition code
9673 (highest four bits). Other bits encode MOV PC,Rm. */
9674 insn = (insn & 0xf000000f) | 0x01a0f000;
9675 }
319850b4 9676
845b51d6
PB		 9677 bfd_put_32 (input_bfd, insn, hit_data);
9678 }
319850b4
JB		 9679 return bfd_reloc_ok;
9680
b6895b4f
PB		 9681 case R_ARM_MOVW_ABS_NC:
9682 case R_ARM_MOVT_ABS:
9683 case R_ARM_MOVW_PREL_NC:
9684 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9685 /* Until we properly support segment-base-relative addressing then
9686 we assume the segment base to be zero, as for the group relocations.
9687 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9688 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9689 case R_ARM_MOVW_BREL_NC:
9690 case R_ARM_MOVW_BREL:
9691 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9692 {
9693 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9694
9695 if (globals->use_rel)
9696 {
9697 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9698 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9699 }
92f5d02b 9700
b6895b4f 9701 value += signed_addend;
b6895b4f
PB		 9702
9703 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9704 value -= (input_section->output_section->vma
9705 + input_section->output_offset + rel->r_offset);
9706
92f5d02b
MS		 9707 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9708 return bfd_reloc_overflow;
9709
35fc36a8 9710 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9711 value |= 1;
9712
9713 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9714 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9715 value >>= 16;
9716
9717 insn &= 0xfff0f000;
9718 insn |= value & 0xfff;
9719 insn |= (value & 0xf000) << 4;
9720 bfd_put_32 (input_bfd, insn, hit_data);
9721 }
9722 return bfd_reloc_ok;
9723
9724 case R_ARM_THM_MOVW_ABS_NC:
9725 case R_ARM_THM_MOVT_ABS:
9726 case R_ARM_THM_MOVW_PREL_NC:
9727 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9728 /* Until we properly support segment-base-relative addressing then
9729 we assume the segment base to be zero, as for the above relocations.
9730 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9731 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9732 as R_ARM_THM_MOVT_ABS. */
9733 case R_ARM_THM_MOVW_BREL_NC:
9734 case R_ARM_THM_MOVW_BREL:
9735 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9736 {
9737 bfd_vma insn;
906e58ca 9738
b6895b4f
PB		 9739 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9740 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9741
9742 if (globals->use_rel)
9743 {
9744 addend = ((insn >> 4) & 0xf000)
9745 | ((insn >> 15) & 0x0800)
9746 | ((insn >> 4) & 0x0700)
9747 | (insn & 0x00ff);
39623e12 9748 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9749 }
92f5d02b 9750
b6895b4f 9751 value += signed_addend;
b6895b4f
PB		 9752
9753 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9754 value -= (input_section->output_section->vma
9755 + input_section->output_offset + rel->r_offset);
9756
92f5d02b
MS		 9757 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9758 return bfd_reloc_overflow;
9759
35fc36a8 9760 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9761 value |= 1;
9762
9763 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9764 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9765 value >>= 16;
9766
9767 insn &= 0xfbf08f00;
9768 insn |= (value & 0xf000) << 4;
9769 insn |= (value & 0x0800) << 15;
9770 insn |= (value & 0x0700) << 4;
9771 insn |= (value & 0x00ff);
9772
9773 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9774 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9775 }
9776 return bfd_reloc_ok;
9777
4962c51a
MS		 9778 case R_ARM_ALU_PC_G0_NC:
9779 case R_ARM_ALU_PC_G1_NC:
9780 case R_ARM_ALU_PC_G0:
9781 case R_ARM_ALU_PC_G1:
9782 case R_ARM_ALU_PC_G2:
9783 case R_ARM_ALU_SB_G0_NC:
9784 case R_ARM_ALU_SB_G1_NC:
9785 case R_ARM_ALU_SB_G0:
9786 case R_ARM_ALU_SB_G1:
9787 case R_ARM_ALU_SB_G2:
9788 {
9789 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9790 bfd_vma pc = input_section->output_section->vma
9791 + input_section->output_offset + rel->r_offset;
9792 /* sb should be the origin of the *segment* containing the symbol.
9793 It is not clear how to obtain this OS-dependent value, so we
9794 make an arbitrary choice of zero. */
9795 bfd_vma sb = 0;
9796 bfd_vma residual;
9797 bfd_vma g_n;
9798 bfd_signed_vma signed_value;
9799 int group = 0;
9800
9801 /* Determine which group of bits to select. */
9802 switch (r_type)
9803 {
9804 case R_ARM_ALU_PC_G0_NC:
9805 case R_ARM_ALU_PC_G0:
9806 case R_ARM_ALU_SB_G0_NC:
9807 case R_ARM_ALU_SB_G0:
9808 group = 0;
9809 break;
9810
9811 case R_ARM_ALU_PC_G1_NC:
9812 case R_ARM_ALU_PC_G1:
9813 case R_ARM_ALU_SB_G1_NC:
9814 case R_ARM_ALU_SB_G1:
9815 group = 1;
9816 break;
9817
9818 case R_ARM_ALU_PC_G2:
9819 case R_ARM_ALU_SB_G2:
9820 group = 2;
9821 break;
9822
9823 default:
906e58ca 9824 abort ();
4962c51a
MS		 9825 }
9826
9827 /* If REL, extract the addend from the insn. If RELA, it will
9828 have already been fetched for us. */
9829 if (globals->use_rel)
9830 {
9831 int negative;
9832 bfd_vma constant = insn & 0xff;
9833 bfd_vma rotation = (insn & 0xf00) >> 8;
9834
9835 if (rotation == 0)
9836 signed_addend = constant;
9837 else
9838 {
9839 /* Compensate for the fact that in the instruction, the
9840 rotation is stored in multiples of 2 bits. */
9841 rotation *= 2;
9842
9843 /* Rotate "constant" right by "rotation" bits. */
9844 signed_addend = (constant >> rotation) |
9845 (constant << (8 * sizeof (bfd_vma) - rotation));
9846 }
9847
9848 /* Determine if the instruction is an ADD or a SUB.
9849 (For REL, this determines the sign of the addend.) */
9850 negative = identify_add_or_sub (insn);
9851 if (negative == 0)
9852 {
9853 (*_bfd_error_handler)
9854 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9855 input_bfd, input_section,
9856 (long) rel->r_offset, howto->name);
906e58ca 9857 return bfd_reloc_overflow;
4962c51a
MS		 9858 }
9859
9860 signed_addend *= negative;
9861 }
9862
9863 /* Compute the value (X) to go in the place. */
9864 if (r_type == R_ARM_ALU_PC_G0_NC
9865 || r_type == R_ARM_ALU_PC_G1_NC
9866 || r_type == R_ARM_ALU_PC_G0
9867 || r_type == R_ARM_ALU_PC_G1
9868 || r_type == R_ARM_ALU_PC_G2)
9869 /* PC relative. */
9870 signed_value = value - pc + signed_addend;
9871 else
9872 /* Section base relative. */
9873 signed_value = value - sb + signed_addend;
9874
9875 /* If the target symbol is a Thumb function, then set the
9876 Thumb bit in the address. */
35fc36a8 9877 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9878 signed_value |= 1;
9879
9880 /* Calculate the value of the relevant G_n, in encoded
9881 constant-with-rotation format. */
9882 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9883 &residual);
9884
9885 /* Check for overflow if required. */
9886 if ((r_type == R_ARM_ALU_PC_G0
9887 || r_type == R_ARM_ALU_PC_G1
9888 || r_type == R_ARM_ALU_PC_G2
9889 || r_type == R_ARM_ALU_SB_G0
9890 || r_type == R_ARM_ALU_SB_G1
9891 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9892 {
9893 (*_bfd_error_handler)
9894 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9895 input_bfd, input_section,
9896 (long) rel->r_offset, abs (signed_value), howto->name);
9897 return bfd_reloc_overflow;
9898 }
9899
9900 /* Mask out the value and the ADD/SUB part of the opcode; take care
9901 not to destroy the S bit. */
9902 insn &= 0xff1ff000;
9903
9904 /* Set the opcode according to whether the value to go in the
9905 place is negative. */
9906 if (signed_value < 0)
9907 insn |= 1 << 22;
9908 else
9909 insn |= 1 << 23;
9910
9911 /* Encode the offset. */
9912 insn |= g_n;
9913
9914 bfd_put_32 (input_bfd, insn, hit_data);
9915 }
9916 return bfd_reloc_ok;
9917
9918 case R_ARM_LDR_PC_G0:
9919 case R_ARM_LDR_PC_G1:
9920 case R_ARM_LDR_PC_G2:
9921 case R_ARM_LDR_SB_G0:
9922 case R_ARM_LDR_SB_G1:
9923 case R_ARM_LDR_SB_G2:
9924 {
9925 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9926 bfd_vma pc = input_section->output_section->vma
9927 + input_section->output_offset + rel->r_offset;
9928 bfd_vma sb = 0; /* See note above. */
9929 bfd_vma residual;
9930 bfd_signed_vma signed_value;
9931 int group = 0;
9932
9933 /* Determine which groups of bits to calculate. */
9934 switch (r_type)
9935 {
9936 case R_ARM_LDR_PC_G0:
9937 case R_ARM_LDR_SB_G0:
9938 group = 0;
9939 break;
9940
9941 case R_ARM_LDR_PC_G1:
9942 case R_ARM_LDR_SB_G1:
9943 group = 1;
9944 break;
9945
9946 case R_ARM_LDR_PC_G2:
9947 case R_ARM_LDR_SB_G2:
9948 group = 2;
9949 break;
9950
9951 default:
906e58ca 9952 abort ();
4962c51a
MS		 9953 }
9954
9955 /* If REL, extract the addend from the insn. If RELA, it will
9956 have already been fetched for us. */
9957 if (globals->use_rel)
9958 {
9959 int negative = (insn & (1 << 23)) ? 1 : -1;
9960 signed_addend = negative * (insn & 0xfff);
9961 }
9962
9963 /* Compute the value (X) to go in the place. */
9964 if (r_type == R_ARM_LDR_PC_G0
9965 || r_type == R_ARM_LDR_PC_G1
9966 || r_type == R_ARM_LDR_PC_G2)
9967 /* PC relative. */
9968 signed_value = value - pc + signed_addend;
9969 else
9970 /* Section base relative. */
9971 signed_value = value - sb + signed_addend;
9972
9973 /* Calculate the value of the relevant G_{n-1} to obtain
9974 the residual at that stage. */
9975 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9976
9977 /* Check for overflow. */
9978 if (residual >= 0x1000)
9979 {
9980 (*_bfd_error_handler)
9981 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9982 input_bfd, input_section,
9983 (long) rel->r_offset, abs (signed_value), howto->name);
9984 return bfd_reloc_overflow;
9985 }
9986
9987 /* Mask out the value and U bit. */
9988 insn &= 0xff7ff000;
9989
9990 /* Set the U bit if the value to go in the place is non-negative. */
9991 if (signed_value >= 0)
9992 insn |= 1 << 23;
9993
9994 /* Encode the offset. */
9995 insn |= residual;
9996
9997 bfd_put_32 (input_bfd, insn, hit_data);
9998 }
9999 return bfd_reloc_ok;
10000
10001 case R_ARM_LDRS_PC_G0:
10002 case R_ARM_LDRS_PC_G1:
10003 case R_ARM_LDRS_PC_G2:
10004 case R_ARM_LDRS_SB_G0:
10005 case R_ARM_LDRS_SB_G1:
10006 case R_ARM_LDRS_SB_G2:
10007 {
10008 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10009 bfd_vma pc = input_section->output_section->vma
10010 + input_section->output_offset + rel->r_offset;
10011 bfd_vma sb = 0; /* See note above. */
10012 bfd_vma residual;
10013 bfd_signed_vma signed_value;
10014 int group = 0;
10015
10016 /* Determine which groups of bits to calculate. */
10017 switch (r_type)
10018 {
10019 case R_ARM_LDRS_PC_G0:
10020 case R_ARM_LDRS_SB_G0:
10021 group = 0;
10022 break;
10023
10024 case R_ARM_LDRS_PC_G1:
10025 case R_ARM_LDRS_SB_G1:
10026 group = 1;
10027 break;
10028
10029 case R_ARM_LDRS_PC_G2:
10030 case R_ARM_LDRS_SB_G2:
10031 group = 2;
10032 break;
10033
10034 default:
906e58ca 10035 abort ();
4962c51a
MS		 10036 }
10037
10038 /* If REL, extract the addend from the insn. If RELA, it will
10039 have already been fetched for us. */
10040 if (globals->use_rel)
10041 {
10042 int negative = (insn & (1 << 23)) ? 1 : -1;
10043 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10044 }
10045
10046 /* Compute the value (X) to go in the place. */
10047 if (r_type == R_ARM_LDRS_PC_G0
10048 || r_type == R_ARM_LDRS_PC_G1
10049 || r_type == R_ARM_LDRS_PC_G2)
10050 /* PC relative. */
10051 signed_value = value - pc + signed_addend;
10052 else
10053 /* Section base relative. */
10054 signed_value = value - sb + signed_addend;
10055
10056 /* Calculate the value of the relevant G_{n-1} to obtain
10057 the residual at that stage. */
10058 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10059
10060 /* Check for overflow. */
10061 if (residual >= 0x100)
10062 {
10063 (*_bfd_error_handler)
10064 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10065 input_bfd, input_section,
10066 (long) rel->r_offset, abs (signed_value), howto->name);
10067 return bfd_reloc_overflow;
10068 }
10069
10070 /* Mask out the value and U bit. */
10071 insn &= 0xff7ff0f0;
10072
10073 /* Set the U bit if the value to go in the place is non-negative. */
10074 if (signed_value >= 0)
10075 insn |= 1 << 23;
10076
10077 /* Encode the offset. */
10078 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10079
10080 bfd_put_32 (input_bfd, insn, hit_data);
10081 }
10082 return bfd_reloc_ok;
10083
10084 case R_ARM_LDC_PC_G0:
10085 case R_ARM_LDC_PC_G1:
10086 case R_ARM_LDC_PC_G2:
10087 case R_ARM_LDC_SB_G0:
10088 case R_ARM_LDC_SB_G1:
10089 case R_ARM_LDC_SB_G2:
10090 {
10091 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10092 bfd_vma pc = input_section->output_section->vma
10093 + input_section->output_offset + rel->r_offset;
10094 bfd_vma sb = 0; /* See note above. */
10095 bfd_vma residual;
10096 bfd_signed_vma signed_value;
10097 int group = 0;
10098
10099 /* Determine which groups of bits to calculate. */
10100 switch (r_type)
10101 {
10102 case R_ARM_LDC_PC_G0:
10103 case R_ARM_LDC_SB_G0:
10104 group = 0;
10105 break;
10106
10107 case R_ARM_LDC_PC_G1:
10108 case R_ARM_LDC_SB_G1:
10109 group = 1;
10110 break;
10111
10112 case R_ARM_LDC_PC_G2:
10113 case R_ARM_LDC_SB_G2:
10114 group = 2;
10115 break;
10116
10117 default:
906e58ca 10118 abort ();
4962c51a
MS		 10119 }
10120
10121 /* If REL, extract the addend from the insn. If RELA, it will
10122 have already been fetched for us. */
10123 if (globals->use_rel)
10124 {
10125 int negative = (insn & (1 << 23)) ? 1 : -1;
10126 signed_addend = negative * ((insn & 0xff) << 2);
10127 }
10128
10129 /* Compute the value (X) to go in the place. */
10130 if (r_type == R_ARM_LDC_PC_G0
10131 || r_type == R_ARM_LDC_PC_G1
10132 || r_type == R_ARM_LDC_PC_G2)
10133 /* PC relative. */
10134 signed_value = value - pc + signed_addend;
10135 else
10136 /* Section base relative. */
10137 signed_value = value - sb + signed_addend;
10138
10139 /* Calculate the value of the relevant G_{n-1} to obtain
10140 the residual at that stage. */
10141 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10142
10143 /* Check for overflow. (The absolute value to go in the place must be
10144 divisible by four and, after having been divided by four, must
10145 fit in eight bits.) */
10146 if ((residual & 0x3) != 0 || residual >= 0x400)
10147 {
10148 (*_bfd_error_handler)
10149 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10150 input_bfd, input_section,
10151 (long) rel->r_offset, abs (signed_value), howto->name);
10152 return bfd_reloc_overflow;
10153 }
10154
10155 /* Mask out the value and U bit. */
10156 insn &= 0xff7fff00;
10157
10158 /* Set the U bit if the value to go in the place is non-negative. */
10159 if (signed_value >= 0)
10160 insn |= 1 << 23;
10161
10162 /* Encode the offset. */
10163 insn |= residual >> 2;
10164
10165 bfd_put_32 (input_bfd, insn, hit_data);
10166 }
10167 return bfd_reloc_ok;
10168
252b5132
RH		 10169 default:
10170 return bfd_reloc_notsupported;
10171 }
10172}
10173
98c1d4aa
NC		 10174/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10175static void
57e8b36a
NC		 10176arm_add_to_rel (bfd * abfd,
10177 bfd_byte * address,
10178 reloc_howto_type * howto,
10179 bfd_signed_vma increment)
98c1d4aa 10180{
98c1d4aa
NC		 10181 bfd_signed_vma addend;
10182
bd97cb95
DJ		 10183 if (howto->type == R_ARM_THM_CALL
10184 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10185 {
9a5aca8c
AM		 10186 int upper_insn, lower_insn;
10187 int upper, lower;
98c1d4aa 10188
9a5aca8c
AM		 10189 upper_insn = bfd_get_16 (abfd, address);
10190 lower_insn = bfd_get_16 (abfd, address + 2);
10191 upper = upper_insn & 0x7ff;
10192 lower = lower_insn & 0x7ff;
10193
10194 addend = (upper << 12) | (lower << 1);
ddda4409 10195 addend += increment;
9a5aca8c 10196 addend >>= 1;
98c1d4aa 10197
9a5aca8c
AM		 10198 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10199 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10200
dc810e39
AM		 10201 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10202 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10203 }
10204 else
10205 {
10206 bfd_vma contents;
10207
10208 contents = bfd_get_32 (abfd, address);
10209
10210 /* Get the (signed) value from the instruction. */
10211 addend = contents & howto->src_mask;
10212 if (addend & ((howto->src_mask + 1) >> 1))
10213 {
10214 bfd_signed_vma mask;
10215
10216 mask = -1;
10217 mask &= ~ howto->src_mask;
10218 addend |= mask;
10219 }
10220
10221 /* Add in the increment, (which is a byte value). */
10222 switch (howto->type)
10223 {
10224 default:
10225 addend += increment;
10226 break;
10227
10228 case R_ARM_PC24:
c6596c5e 10229 case R_ARM_PLT32:
5b5bb741
PB		 10230 case R_ARM_CALL:
10231 case R_ARM_JUMP24:
9a5aca8c 10232 addend <<= howto->size;
dc810e39 10233 addend += increment;
9a5aca8c
AM		 10234
10235 /* Should we check for overflow here ? */
10236
10237 /* Drop any undesired bits. */
10238 addend >>= howto->rightshift;
10239 break;
10240 }
10241
10242 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10243
10244 bfd_put_32 (abfd, contents, address);
ddda4409 10245 }
98c1d4aa 10246}
252b5132 10247
ba93b8ac
DJ		 10248#define IS_ARM_TLS_RELOC(R_TYPE) \
10249 ((R_TYPE) == R_ARM_TLS_GD32 \
10250 || (R_TYPE) == R_ARM_TLS_LDO32 \
10251 || (R_TYPE) == R_ARM_TLS_LDM32 \
10252 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10253 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10254 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10255 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10256 || (R_TYPE) == R_ARM_TLS_IE32 \
10257 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10258
10259/* Specific set of relocations for the gnu tls dialect. */
10260#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10261 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10262 || (R_TYPE) == R_ARM_TLS_CALL \
10263 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10264 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10265 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10266
252b5132 10267/* Relocate an ARM ELF section. */
906e58ca 10268
b34976b6 10269static bfd_boolean
57e8b36a
NC		 10270elf32_arm_relocate_section (bfd * output_bfd,
10271 struct bfd_link_info * info,
10272 bfd * input_bfd,
10273 asection * input_section,
10274 bfd_byte * contents,
10275 Elf_Internal_Rela * relocs,
10276 Elf_Internal_Sym * local_syms,
10277 asection ** local_sections)
252b5132 10278{
b34976b6
AM		 10279 Elf_Internal_Shdr *symtab_hdr;
10280 struct elf_link_hash_entry **sym_hashes;
10281 Elf_Internal_Rela *rel;
10282 Elf_Internal_Rela *relend;
10283 const char *name;
b32d3aa2 10284 struct elf32_arm_link_hash_table * globals;
252b5132 10285
4e7fd91e 10286 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10287 if (globals == NULL)
10288 return FALSE;
b491616a 10289
0ffa91dd 10290 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10291 sym_hashes = elf_sym_hashes (input_bfd);
10292
10293 rel = relocs;
10294 relend = relocs + input_section->reloc_count;
10295 for (; rel < relend; rel++)
10296 {
ba96a88f
NC		 10297 int r_type;
10298 reloc_howto_type * howto;
10299 unsigned long r_symndx;
10300 Elf_Internal_Sym * sym;
10301 asection * sec;
252b5132 10302 struct elf_link_hash_entry * h;
ba96a88f
NC		 10303 bfd_vma relocation;
10304 bfd_reloc_status_type r;
10305 arelent bfd_reloc;
ba93b8ac 10306 char sym_type;
0945cdfd 10307 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10308 char *error_message = NULL;
f21f3fe0 10309
252b5132 10310 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10311 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10312 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10313
ba96a88f
NC		 10314 if ( r_type == R_ARM_GNU_VTENTRY
10315 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 10316 continue;
10317
b32d3aa2 10318 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10319 howto = bfd_reloc.howto;
252b5132 10320
252b5132
RH		 10321 h = NULL;
10322 sym = NULL;
10323 sec = NULL;
9b485d32 10324
252b5132
RH		 10325 if (r_symndx < symtab_hdr->sh_info)
10326 {
10327 sym = local_syms + r_symndx;
ba93b8ac 10328 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10329 sec = local_sections[r_symndx];
ffcb4889
NS		 10330
10331 /* An object file might have a reference to a local
10332 undefined symbol. This is a daft object file, but we
10333 should at least do something about it. V4BX & NONE
10334 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10335 allowed to use the undefined symbol, so allow those.
10336 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10337 if (r_type != R_ARM_V4BX
10338 && r_type != R_ARM_NONE
77b4f08f 10339 && r_symndx != STN_UNDEF
ffcb4889
NS		 10340 && bfd_is_und_section (sec)
10341 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10342 {
10343 if (!info->callbacks->undefined_symbol
10344 (info, bfd_elf_string_from_elf_section
10345 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10346 input_bfd, input_section,
10347 rel->r_offset, TRUE))
10348 return FALSE;
10349 }
b38cadfb 10350
4e7fd91e 10351 if (globals->use_rel)
f8df10f4 10352 {
4e7fd91e
PB		 10353 relocation = (sec->output_section->vma
10354 + sec->output_offset
10355 + sym->st_value);
ab96bf03
AM		 10356 if (!info->relocatable
10357 && (sec->flags & SEC_MERGE)
10358 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10359 {
4e7fd91e
PB		 10360 asection *msec;
10361 bfd_vma addend, value;
10362
39623e12 10363 switch (r_type)
4e7fd91e 10364 {
39623e12
PB		 10365 case R_ARM_MOVW_ABS_NC:
10366 case R_ARM_MOVT_ABS:
10367 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10368 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10369 addend = (addend ^ 0x8000) - 0x8000;
10370 break;
f8df10f4 10371
39623e12
PB		 10372 case R_ARM_THM_MOVW_ABS_NC:
10373 case R_ARM_THM_MOVT_ABS:
10374 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10375 << 16;
10376 value |= bfd_get_16 (input_bfd,
10377 contents + rel->r_offset + 2);
10378 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10379 | ((value & 0x04000000) >> 15);
10380 addend = (addend ^ 0x8000) - 0x8000;
10381 break;
f8df10f4 10382
39623e12
PB		 10383 default:
10384 if (howto->rightshift
10385 || (howto->src_mask & (howto->src_mask + 1)))
10386 {
10387 (*_bfd_error_handler)
10388 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10389 input_bfd, input_section,
10390 (long) rel->r_offset, howto->name);
10391 return FALSE;
10392 }
10393
10394 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10395
10396 /* Get the (signed) value from the instruction. */
10397 addend = value & howto->src_mask;
10398 if (addend & ((howto->src_mask + 1) >> 1))
10399 {
10400 bfd_signed_vma mask;
10401
10402 mask = -1;
10403 mask &= ~ howto->src_mask;
10404 addend |= mask;
10405 }
10406 break;
4e7fd91e 10407 }
39623e12 10408
4e7fd91e
PB		 10409 msec = sec;
10410 addend =
10411 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10412 - relocation;
10413 addend += msec->output_section->vma + msec->output_offset;
39623e12 10414
cc643b88 10415 /* Cases here must match those in the preceding
39623e12
PB		 10416 switch statement. */
10417 switch (r_type)
10418 {
10419 case R_ARM_MOVW_ABS_NC:
10420 case R_ARM_MOVT_ABS:
10421 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10422 | (addend & 0xfff);
10423 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10424 break;
10425
10426 case R_ARM_THM_MOVW_ABS_NC:
10427 case R_ARM_THM_MOVT_ABS:
10428 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10429 | (addend & 0xff) | ((addend & 0x0800) << 15);
10430 bfd_put_16 (input_bfd, value >> 16,
10431 contents + rel->r_offset);
10432 bfd_put_16 (input_bfd, value,
10433 contents + rel->r_offset + 2);
10434 break;
10435
10436 default:
10437 value = (value & ~ howto->dst_mask)
10438 | (addend & howto->dst_mask);
10439 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10440 break;
10441 }
f8df10f4 10442 }
f8df10f4 10443 }
4e7fd91e
PB		 10444 else
10445 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10446 }
10447 else
10448 {
560e09e9 10449 bfd_boolean warned;
560e09e9 10450
b2a8e766
AM		 10451 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10452 r_symndx, symtab_hdr, sym_hashes,
10453 h, sec, relocation,
10454 unresolved_reloc, warned);
ba93b8ac
DJ		 10455
10456 sym_type = h->type;
252b5132
RH		 10457 }
10458
dbaa2011 10459 if (sec != NULL && discarded_section (sec))
e4067dbb 10460 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10461 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10462
10463 if (info->relocatable)
10464 {
10465 /* This is a relocatable link. We don't have to change
10466 anything, unless the reloc is against a section symbol,
10467 in which case we have to adjust according to where the
10468 section symbol winds up in the output section. */
10469 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10470 {
10471 if (globals->use_rel)
10472 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10473 howto, (bfd_signed_vma) sec->output_offset);
10474 else
10475 rel->r_addend += sec->output_offset;
10476 }
10477 continue;
10478 }
10479
252b5132
RH		 10480 if (h != NULL)
10481 name = h->root.root.string;
10482 else
10483 {
10484 name = (bfd_elf_string_from_elf_section
10485 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10486 if (name == NULL || *name == '\0')
10487 name = bfd_section_name (input_bfd, sec);
10488 }
f21f3fe0 10489
cf35638d 10490 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10491 && r_type != R_ARM_NONE
10492 && (h == NULL
10493 || h->root.type == bfd_link_hash_defined
10494 || h->root.type == bfd_link_hash_defweak)
10495 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10496 {
10497 (*_bfd_error_handler)
10498 ((sym_type == STT_TLS
10499 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10500 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10501 input_bfd,
10502 input_section,
10503 (long) rel->r_offset,
10504 howto->name,
10505 name);
10506 }
10507
0855e32b
NS		 10508 /* We call elf32_arm_final_link_relocate unless we're completely
10509 done, i.e., the relaxation produced the final output we want,
10510 and we won't let anybody mess with it. Also, we have to do
10511 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10512 both in relaxed and non-relaxed cases */
10513 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10514 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10515 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10516 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10517 & GOT_TLS_GDESC)))
10518 {
10519 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10520 contents, rel, h == NULL);
10521 /* This may have been marked unresolved because it came from
10522 a shared library. But we've just dealt with that. */
10523 unresolved_reloc = 0;
10524 }
10525 else
10526 r = bfd_reloc_continue;
b38cadfb 10527
0855e32b
NS		 10528 if (r == bfd_reloc_continue)
10529 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10530 input_section, contents, rel,
34e77a92 10531 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10532 (h ? h->target_internal
10533 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10534 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10535
10536 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10537 because such sections are not SEC_ALLOC and thus ld.so will
10538 not process them. */
10539 if (unresolved_reloc
10540 && !((input_section->flags & SEC_DEBUGGING) != 0
1d5316ab
AM		 10541 && h->def_dynamic)
10542 && _bfd_elf_section_offset (output_bfd, info, input_section,
10543 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10544 {
10545 (*_bfd_error_handler)
843fe662
L		 10546 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10547 input_bfd,
10548 input_section,
10549 (long) rel->r_offset,
10550 howto->name,
10551 h->root.root.string);
0945cdfd
DJ		 10552 return FALSE;
10553 }
252b5132
RH		 10554
10555 if (r != bfd_reloc_ok)
10556 {
252b5132
RH		 10557 switch (r)
10558 {
10559 case bfd_reloc_overflow:
cf919dfd
PB		 10560 /* If the overflowing reloc was to an undefined symbol,
10561 we have already printed one error message and there
10562 is no point complaining again. */
10563 if ((! h ||
10564 h->root.type != bfd_link_hash_undefined)
10565 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10566 (info, (h ? &h->root : NULL), name, howto->name,
10567 (bfd_vma) 0, input_bfd, input_section,
10568 rel->r_offset))))
b34976b6 10569 return FALSE;
252b5132
RH		 10570 break;
10571
10572 case bfd_reloc_undefined:
10573 if (!((*info->callbacks->undefined_symbol)
10574 (info, name, input_bfd, input_section,
b34976b6
AM		 10575 rel->r_offset, TRUE)))
10576 return FALSE;
252b5132
RH		 10577 break;
10578
10579 case bfd_reloc_outofrange:
f2a9dd69 10580 error_message = _("out of range");
252b5132
RH		 10581 goto common_error;
10582
10583 case bfd_reloc_notsupported:
f2a9dd69 10584 error_message = _("unsupported relocation");
252b5132
RH		 10585 goto common_error;
10586
10587 case bfd_reloc_dangerous:
f2a9dd69 10588 /* error_message should already be set. */
252b5132
RH		 10589 goto common_error;
10590
10591 default:
f2a9dd69 10592 error_message = _("unknown error");
8029a119 10593 /* Fall through. */
252b5132
RH		 10594
10595 common_error:
f2a9dd69
DJ		 10596 BFD_ASSERT (error_message != NULL);
10597 if (!((*info->callbacks->reloc_dangerous)
10598 (info, error_message, input_bfd, input_section,
252b5132 10599 rel->r_offset)))
b34976b6 10600 return FALSE;
252b5132
RH		 10601 break;
10602 }
10603 }
10604 }
10605
b34976b6 10606 return TRUE;
252b5132
RH		 10607}
10608
91d6fa6a 10609/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10610 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10611 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10612 maintaining that condition). */
10613
10614static void
10615add_unwind_table_edit (arm_unwind_table_edit **head,
10616 arm_unwind_table_edit **tail,
10617 arm_unwind_edit_type type,
10618 asection *linked_section,
91d6fa6a 10619 unsigned int tindex)
2468f9c9 10620{
21d799b5
NC		 10621 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10622 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10623
2468f9c9
PB		 10624 new_edit->type = type;
10625 new_edit->linked_section = linked_section;
91d6fa6a 10626 new_edit->index = tindex;
b38cadfb 10627
91d6fa6a 10628 if (tindex > 0)
2468f9c9
PB		 10629 {
10630 new_edit->next = NULL;
10631
10632 if (*tail)
10633 (*tail)->next = new_edit;
10634
10635 (*tail) = new_edit;
10636
10637 if (!*head)
10638 (*head) = new_edit;
10639 }
10640 else
10641 {
10642 new_edit->next = *head;
10643
10644 if (!*tail)
10645 *tail = new_edit;
10646
10647 *head = new_edit;
10648 }
10649}
10650
10651static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10652
10653/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10654static void
10655adjust_exidx_size(asection *exidx_sec, int adjust)
10656{
10657 asection *out_sec;
10658
10659 if (!exidx_sec->rawsize)
10660 exidx_sec->rawsize = exidx_sec->size;
10661
10662 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10663 out_sec = exidx_sec->output_section;
10664 /* Adjust size of output section. */
10665 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10666}
10667
10668/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10669static void
10670insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10671{
10672 struct _arm_elf_section_data *exidx_arm_data;
10673
10674 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10675 add_unwind_table_edit (
10676 &exidx_arm_data->u.exidx.unwind_edit_list,
10677 &exidx_arm_data->u.exidx.unwind_edit_tail,
10678 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10679
10680 adjust_exidx_size(exidx_sec, 8);
10681}
10682
10683/* Scan .ARM.exidx tables, and create a list describing edits which should be
10684 made to those tables, such that:
b38cadfb 10685
2468f9c9
PB		 10686 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10687 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10688 codes which have been inlined into the index).
10689
85fdf906
AH		 10690 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10691
2468f9c9 10692 The edits are applied when the tables are written
b38cadfb 10693 (in elf32_arm_write_section). */
2468f9c9
PB		 10694
10695bfd_boolean
10696elf32_arm_fix_exidx_coverage (asection **text_section_order,
10697 unsigned int num_text_sections,
85fdf906
AH		 10698 struct bfd_link_info *info,
10699 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10700{
10701 bfd *inp;
10702 unsigned int last_second_word = 0, i;
10703 asection *last_exidx_sec = NULL;
10704 asection *last_text_sec = NULL;
10705 int last_unwind_type = -1;
10706
10707 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10708 text sections. */
10709 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10710 {
10711 asection *sec;
b38cadfb 10712
2468f9c9
PB		 10713 for (sec = inp->sections; sec != NULL; sec = sec->next)
10714 {
10715 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10716 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10717
dec9d5df 10718 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10719 continue;
b38cadfb 10720
2468f9c9
PB		 10721 if (elf_sec->linked_to)
10722 {
10723 Elf_Internal_Shdr *linked_hdr
10724 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10725 struct _arm_elf_section_data *linked_sec_arm_data
10726 = get_arm_elf_section_data (linked_hdr->bfd_section);
10727
10728 if (linked_sec_arm_data == NULL)
10729 continue;
10730
10731 /* Link this .ARM.exidx section back from the text section it
10732 describes. */
10733 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10734 }
10735 }
10736 }
10737
10738 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10739 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10740 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10741
10742 for (i = 0; i < num_text_sections; i++)
10743 {
10744 asection *sec = text_section_order[i];
10745 asection *exidx_sec;
10746 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10747 struct _arm_elf_section_data *exidx_arm_data;
10748 bfd_byte *contents = NULL;
10749 int deleted_exidx_bytes = 0;
10750 bfd_vma j;
10751 arm_unwind_table_edit *unwind_edit_head = NULL;
10752 arm_unwind_table_edit *unwind_edit_tail = NULL;
10753 Elf_Internal_Shdr *hdr;
10754 bfd *ibfd;
10755
10756 if (arm_data == NULL)
10757 continue;
10758
10759 exidx_sec = arm_data->u.text.arm_exidx_sec;
10760 if (exidx_sec == NULL)
10761 {
10762 /* Section has no unwind data. */
10763 if (last_unwind_type == 0 || !last_exidx_sec)
10764 continue;
10765
10766 /* Ignore zero sized sections. */
10767 if (sec->size == 0)
10768 continue;
10769
10770 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10771 last_unwind_type = 0;
10772 continue;
10773 }
10774
22a8f80e
PB		 10775 /* Skip /DISCARD/ sections. */
10776 if (bfd_is_abs_section (exidx_sec->output_section))
10777 continue;
10778
2468f9c9
PB		 10779 hdr = &elf_section_data (exidx_sec)->this_hdr;
10780 if (hdr->sh_type != SHT_ARM_EXIDX)
10781 continue;
b38cadfb 10782
2468f9c9
PB		 10783 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10784 if (exidx_arm_data == NULL)
10785 continue;
b38cadfb 10786
2468f9c9 10787 ibfd = exidx_sec->owner;
b38cadfb 10788
2468f9c9
PB		 10789 if (hdr->contents != NULL)
10790 contents = hdr->contents;
10791 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10792 /* An error? */
10793 continue;
10794
10795 for (j = 0; j < hdr->sh_size; j += 8)
10796 {
10797 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10798 int unwind_type;
10799 int elide = 0;
10800
10801 /* An EXIDX_CANTUNWIND entry. */
10802 if (second_word == 1)
10803 {
10804 if (last_unwind_type == 0)
10805 elide = 1;
10806 unwind_type = 0;
10807 }
10808 /* Inlined unwinding data. Merge if equal to previous. */
10809 else if ((second_word & 0x80000000) != 0)
10810 {
85fdf906
AH		 10811 if (merge_exidx_entries
10812 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10813 elide = 1;
10814 unwind_type = 1;
10815 last_second_word = second_word;
10816 }
10817 /* Normal table entry. In theory we could merge these too,
10818 but duplicate entries are likely to be much less common. */
10819 else
10820 unwind_type = 2;
10821
10822 if (elide)
10823 {
10824 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10825 DELETE_EXIDX_ENTRY, NULL, j / 8);
10826
10827 deleted_exidx_bytes += 8;
10828 }
10829
10830 last_unwind_type = unwind_type;
10831 }
10832
10833 /* Free contents if we allocated it ourselves. */
10834 if (contents != hdr->contents)
10835 free (contents);
10836
10837 /* Record edits to be applied later (in elf32_arm_write_section). */
10838 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10839 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 10840
2468f9c9
PB		 10841 if (deleted_exidx_bytes > 0)
10842 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10843
10844 last_exidx_sec = exidx_sec;
10845 last_text_sec = sec;
10846 }
10847
10848 /* Add terminating CANTUNWIND entry. */
10849 if (last_exidx_sec && last_unwind_type != 0)
10850 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10851
10852 return TRUE;
10853}
10854
3e6b1042
DJ		 10855static bfd_boolean
10856elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10857 bfd *ibfd, const char *name)
10858{
10859 asection *sec, *osec;
10860
3d4d4302 10861 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 10862 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10863 return TRUE;
10864
10865 osec = sec->output_section;
10866 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10867 return TRUE;
10868
10869 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10870 sec->output_offset, sec->size))
10871 return FALSE;
10872
10873 return TRUE;
10874}
10875
10876static bfd_boolean
10877elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10878{
10879 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10880 asection *sec, *osec;
3e6b1042 10881
4dfe6ac6
NC		 10882 if (globals == NULL)
10883 return FALSE;
10884
3e6b1042
DJ		 10885 /* Invoke the regular ELF backend linker to do all the work. */
10886 if (!bfd_elf_final_link (abfd, info))
10887 return FALSE;
10888
fe33d2fa
CL		 10889 /* Process stub sections (eg BE8 encoding, ...). */
10890 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10891 int i;
cdb21a0a
NS		 10892 for (i=0; i<htab->top_id; i++)
10893 {
10894 sec = htab->stub_group[i].stub_sec;
10895 /* Only process it once, in its link_sec slot. */
10896 if (sec && i == htab->stub_group[i].link_sec->id)
10897 {
10898 osec = sec->output_section;
10899 elf32_arm_write_section (abfd, info, sec, sec->contents);
10900 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10901 sec->output_offset, sec->size))
10902 return FALSE;
10903 }
fe33d2fa 10904 }
fe33d2fa 10905
3e6b1042
DJ		 10906 /* Write out any glue sections now that we have created all the
10907 stubs. */
10908 if (globals->bfd_of_glue_owner != NULL)
10909 {
10910 if (! elf32_arm_output_glue_section (info, abfd,
10911 globals->bfd_of_glue_owner,
10912 ARM2THUMB_GLUE_SECTION_NAME))
10913 return FALSE;
10914
10915 if (! elf32_arm_output_glue_section (info, abfd,
10916 globals->bfd_of_glue_owner,
10917 THUMB2ARM_GLUE_SECTION_NAME))
10918 return FALSE;
10919
10920 if (! elf32_arm_output_glue_section (info, abfd,
10921 globals->bfd_of_glue_owner,
10922 VFP11_ERRATUM_VENEER_SECTION_NAME))
10923 return FALSE;
10924
10925 if (! elf32_arm_output_glue_section (info, abfd,
10926 globals->bfd_of_glue_owner,
10927 ARM_BX_GLUE_SECTION_NAME))
10928 return FALSE;
10929 }
10930
10931 return TRUE;
10932}
10933
5968a7b8
NC		 10934/* Return a best guess for the machine number based on the attributes. */
10935
10936static unsigned int
10937bfd_arm_get_mach_from_attributes (bfd * abfd)
10938{
10939 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10940
10941 switch (arch)
10942 {
10943 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10944 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10945 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10946
10947 case TAG_CPU_ARCH_V5TE:
10948 {
10949 char * name;
10950
10951 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
10952 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
10953
10954 if (name)
10955 {
10956 if (strcmp (name, "IWMMXT2") == 0)
10957 return bfd_mach_arm_iWMMXt2;
10958
10959 if (strcmp (name, "IWMMXT") == 0)
6034aab8 10960 return bfd_mach_arm_iWMMXt;
088ca6c1
NC		 10961
10962 if (strcmp (name, "XSCALE") == 0)
10963 {
10964 int wmmx;
10965
10966 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
10967 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
10968 switch (wmmx)
10969 {
10970 case 1: return bfd_mach_arm_iWMMXt;
10971 case 2: return bfd_mach_arm_iWMMXt2;
10972 default: return bfd_mach_arm_XScale;
10973 }
10974 }
5968a7b8
NC		 10975 }
10976
10977 return bfd_mach_arm_5TE;
10978 }
10979
10980 default:
10981 return bfd_mach_arm_unknown;
10982 }
10983}
10984
c178919b
NC		 10985/* Set the right machine number. */
10986
10987static bfd_boolean
57e8b36a 10988elf32_arm_object_p (bfd *abfd)
c178919b 10989{
5a6c6817 10990 unsigned int mach;
57e8b36a 10991
5a6c6817 10992 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 10993
5968a7b8
NC		 10994 if (mach == bfd_mach_arm_unknown)
10995 {
10996 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10997 mach = bfd_mach_arm_ep9312;
10998 else
10999 mach = bfd_arm_get_mach_from_attributes (abfd);
11000 }
c178919b 11001
5968a7b8 11002 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11003 return TRUE;
11004}
11005
fc830a83 11006/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11007
b34976b6 11008static bfd_boolean
57e8b36a 11009elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11010{
11011 if (elf_flags_init (abfd)
11012 && elf_elfheader (abfd)->e_flags != flags)
11013 {
fc830a83
NC		 11014 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11015 {
fd2ec330 11016 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11017 (*_bfd_error_handler)
11018 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11019 abfd);
fc830a83 11020 else
d003868e
AM		 11021 _bfd_error_handler
11022 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11023 abfd);
fc830a83 11024 }
252b5132
RH		 11025 }
11026 else
11027 {
11028 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11029 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11030 }
11031
b34976b6 11032 return TRUE;
252b5132
RH		 11033}
11034
fc830a83 11035/* Copy backend specific data from one object module to another. */
9b485d32 11036
b34976b6 11037static bfd_boolean
57e8b36a 11038elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11039{
11040 flagword in_flags;
11041 flagword out_flags;
11042
0ffa91dd 11043 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11044 return TRUE;
252b5132 11045
fc830a83 11046 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11047 out_flags = elf_elfheader (obfd)->e_flags;
11048
fc830a83
NC		 11049 if (elf_flags_init (obfd)
11050 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11051 && in_flags != out_flags)
252b5132 11052 {
252b5132 11053 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11054 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11055 return FALSE;
252b5132
RH		 11056
11057 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11058 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11059 return FALSE;
252b5132
RH		 11060
11061 /* If the src and dest have different interworking flags
11062 then turn off the interworking bit. */
fd2ec330 11063 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11064 {
fd2ec330 11065 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11066 _bfd_error_handler
11067 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11068 obfd, ibfd);
252b5132 11069
fd2ec330 11070 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11071 }
1006ba19
PB		 11072
11073 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11074 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11075 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11076 }
11077
11078 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11079 elf_flags_init (obfd) = TRUE;
252b5132 11080
94a3258f
PB		 11081 /* Also copy the EI_OSABI field. */
11082 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11083 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11084
104d59d1
JM		 11085 /* Copy object attributes. */
11086 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 11087
11088 return TRUE;
11089}
11090
11091/* Values for Tag_ABI_PCS_R9_use. */
11092enum
11093{
11094 AEABI_R9_V6,
11095 AEABI_R9_SB,
11096 AEABI_R9_TLS,
11097 AEABI_R9_unused
11098};
11099
11100/* Values for Tag_ABI_PCS_RW_data. */
11101enum
11102{
11103 AEABI_PCS_RW_data_absolute,
11104 AEABI_PCS_RW_data_PCrel,
11105 AEABI_PCS_RW_data_SBrel,
11106 AEABI_PCS_RW_data_unused
11107};
11108
11109/* Values for Tag_ABI_enum_size. */
11110enum
11111{
11112 AEABI_enum_unused,
11113 AEABI_enum_short,
11114 AEABI_enum_wide,
11115 AEABI_enum_forced_wide
11116};
11117
104d59d1
JM		 11118/* Determine whether an object attribute tag takes an integer, a
11119 string or both. */
906e58ca 11120
104d59d1
JM		 11121static int
11122elf32_arm_obj_attrs_arg_type (int tag)
11123{
11124 if (tag == Tag_compatibility)
3483fe2e 11125 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11126 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11127 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11128 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11129 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11130 else if (tag < 32)
3483fe2e 11131 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11132 else
3483fe2e 11133 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11134}
11135
5aa6ff7c
AS		 11136/* The ABI defines that Tag_conformance should be emitted first, and that
11137 Tag_nodefaults should be second (if either is defined). This sets those
11138 two positions, and bumps up the position of all the remaining tags to
11139 compensate. */
11140static int
11141elf32_arm_obj_attrs_order (int num)
11142{
3de4a297 11143 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11144 return Tag_conformance;
3de4a297 11145 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11146 return Tag_nodefaults;
11147 if ((num - 2) < Tag_nodefaults)
11148 return num - 2;
11149 if ((num - 1) < Tag_conformance)
11150 return num - 1;
11151 return num;
11152}
11153
e8b36cd1
JM		 11154/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11155static bfd_boolean
11156elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11157{
11158 if ((tag & 127) < 64)
11159 {
11160 _bfd_error_handler
11161 (_("%B: Unknown mandatory EABI object attribute %d"),
11162 abfd, tag);
11163 bfd_set_error (bfd_error_bad_value);
11164 return FALSE;
11165 }
11166 else
11167 {
11168 _bfd_error_handler
11169 (_("Warning: %B: Unknown EABI object attribute %d"),
11170 abfd, tag);
11171 return TRUE;
11172 }
11173}
11174
91e22acd
AS		 11175/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11176 Returns -1 if no architecture could be read. */
11177
11178static int
11179get_secondary_compatible_arch (bfd *abfd)
11180{
11181 obj_attribute *attr =
11182 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11183
11184 /* Note: the tag and its argument below are uleb128 values, though
11185 currently-defined values fit in one byte for each. */
11186 if (attr->s
11187 && attr->s[0] == Tag_CPU_arch
11188 && (attr->s[1] & 128) != 128
11189 && attr->s[2] == 0)
11190 return attr->s[1];
11191
11192 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11193 return -1;
11194}
11195
11196/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11197 The tag is removed if ARCH is -1. */
11198
8e79c3df 11199static void
91e22acd 11200set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11201{
91e22acd
AS		 11202 obj_attribute *attr =
11203 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11204
91e22acd
AS		 11205 if (arch == -1)
11206 {
11207 attr->s = NULL;
11208 return;
8e79c3df 11209 }
91e22acd
AS		 11210
11211 /* Note: the tag and its argument below are uleb128 values, though
11212 currently-defined values fit in one byte for each. */
11213 if (!attr->s)
21d799b5 11214 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11215 attr->s[0] = Tag_CPU_arch;
11216 attr->s[1] = arch;
11217 attr->s[2] = '\0';
8e79c3df
CM		 11218}
11219
91e22acd
AS		 11220/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11221 into account. */
11222
11223static int
11224tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11225 int newtag, int secondary_compat)
8e79c3df 11226{
91e22acd
AS		 11227#define T(X) TAG_CPU_ARCH_##X
11228 int tagl, tagh, result;
11229 const int v6t2[] =
11230 {
11231 T(V6T2), /* PRE_V4. */
11232 T(V6T2), /* V4. */
11233 T(V6T2), /* V4T. */
11234 T(V6T2), /* V5T. */
11235 T(V6T2), /* V5TE. */
11236 T(V6T2), /* V5TEJ. */
11237 T(V6T2), /* V6. */
11238 T(V7), /* V6KZ. */
11239 T(V6T2) /* V6T2. */
11240 };
11241 const int v6k[] =
11242 {
11243 T(V6K), /* PRE_V4. */
11244 T(V6K), /* V4. */
11245 T(V6K), /* V4T. */
11246 T(V6K), /* V5T. */
11247 T(V6K), /* V5TE. */
11248 T(V6K), /* V5TEJ. */
11249 T(V6K), /* V6. */
11250 T(V6KZ), /* V6KZ. */
11251 T(V7), /* V6T2. */
11252 T(V6K) /* V6K. */
11253 };
11254 const int v7[] =
11255 {
11256 T(V7), /* PRE_V4. */
11257 T(V7), /* V4. */
11258 T(V7), /* V4T. */
11259 T(V7), /* V5T. */
11260 T(V7), /* V5TE. */
11261 T(V7), /* V5TEJ. */
11262 T(V7), /* V6. */
11263 T(V7), /* V6KZ. */
11264 T(V7), /* V6T2. */
11265 T(V7), /* V6K. */
11266 T(V7) /* V7. */
11267 };
11268 const int v6_m[] =
11269 {
11270 -1, /* PRE_V4. */
11271 -1, /* V4. */
11272 T(V6K), /* V4T. */
11273 T(V6K), /* V5T. */
11274 T(V6K), /* V5TE. */
11275 T(V6K), /* V5TEJ. */
11276 T(V6K), /* V6. */
11277 T(V6KZ), /* V6KZ. */
11278 T(V7), /* V6T2. */
11279 T(V6K), /* V6K. */
11280 T(V7), /* V7. */
11281 T(V6_M) /* V6_M. */
11282 };
11283 const int v6s_m[] =
11284 {
11285 -1, /* PRE_V4. */
11286 -1, /* V4. */
11287 T(V6K), /* V4T. */
11288 T(V6K), /* V5T. */
11289 T(V6K), /* V5TE. */
11290 T(V6K), /* V5TEJ. */
11291 T(V6K), /* V6. */
11292 T(V6KZ), /* V6KZ. */
11293 T(V7), /* V6T2. */
11294 T(V6K), /* V6K. */
11295 T(V7), /* V7. */
11296 T(V6S_M), /* V6_M. */
11297 T(V6S_M) /* V6S_M. */
11298 };
9e3c6df6
PB		 11299 const int v7e_m[] =
11300 {
11301 -1, /* PRE_V4. */
11302 -1, /* V4. */
11303 T(V7E_M), /* V4T. */
11304 T(V7E_M), /* V5T. */
11305 T(V7E_M), /* V5TE. */
11306 T(V7E_M), /* V5TEJ. */
11307 T(V7E_M), /* V6. */
11308 T(V7E_M), /* V6KZ. */
11309 T(V7E_M), /* V6T2. */
11310 T(V7E_M), /* V6K. */
11311 T(V7E_M), /* V7. */
11312 T(V7E_M), /* V6_M. */
11313 T(V7E_M), /* V6S_M. */
11314 T(V7E_M) /* V7E_M. */
11315 };
bca38921
MGD		 11316 const int v8[] =
11317 {
11318 T(V8), /* PRE_V4. */
11319 T(V8), /* V4. */
11320 T(V8), /* V4T. */
11321 T(V8), /* V5T. */
11322 T(V8), /* V5TE. */
11323 T(V8), /* V5TEJ. */
11324 T(V8), /* V6. */
11325 T(V8), /* V6KZ. */
11326 T(V8), /* V6T2. */
11327 T(V8), /* V6K. */
11328 T(V8), /* V7. */
11329 T(V8), /* V6_M. */
11330 T(V8), /* V6S_M. */
11331 T(V8), /* V7E_M. */
11332 T(V8) /* V8. */
11333 };
91e22acd
AS		 11334 const int v4t_plus_v6_m[] =
11335 {
11336 -1, /* PRE_V4. */
11337 -1, /* V4. */
11338 T(V4T), /* V4T. */
11339 T(V5T), /* V5T. */
11340 T(V5TE), /* V5TE. */
11341 T(V5TEJ), /* V5TEJ. */
11342 T(V6), /* V6. */
11343 T(V6KZ), /* V6KZ. */
11344 T(V6T2), /* V6T2. */
11345 T(V6K), /* V6K. */
11346 T(V7), /* V7. */
11347 T(V6_M), /* V6_M. */
11348 T(V6S_M), /* V6S_M. */
9e3c6df6 11349 T(V7E_M), /* V7E_M. */
bca38921 11350 T(V8), /* V8. */
91e22acd
AS		 11351 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11352 };
11353 const int *comb[] =
11354 {
11355 v6t2,
11356 v6k,
11357 v7,
11358 v6_m,
11359 v6s_m,
9e3c6df6 11360 v7e_m,
bca38921 11361 v8,
91e22acd
AS		 11362 /* Pseudo-architecture. */
11363 v4t_plus_v6_m
11364 };
11365
11366 /* Check we've not got a higher architecture than we know about. */
11367
9e3c6df6 11368 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11369 {
3895f852 11370 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11371 return -1;
11372 }
11373
11374 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11375
11376 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11377 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11378 oldtag = T(V4T_PLUS_V6_M);
11379
11380 /* And override the new tag if we have a Tag_also_compatible_with on the
11381 input. */
11382
11383 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11384 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11385 newtag = T(V4T_PLUS_V6_M);
11386
11387 tagl = (oldtag < newtag) ? oldtag : newtag;
11388 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11389
11390 /* Architectures before V6KZ add features monotonically. */
11391 if (tagh <= TAG_CPU_ARCH_V6KZ)
11392 return result;
11393
11394 result = comb[tagh - T(V6T2)][tagl];
11395
11396 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11397 as the canonical version. */
11398 if (result == T(V4T_PLUS_V6_M))
11399 {
11400 result = T(V4T);
11401 *secondary_compat_out = T(V6_M);
11402 }
11403 else
11404 *secondary_compat_out = -1;
11405
11406 if (result == -1)
11407 {
3895f852 11408 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11409 ibfd, oldtag, newtag);
11410 return -1;
11411 }
11412
11413 return result;
11414#undef T
8e79c3df
CM		 11415}
11416
ac56ee8f
MGD		 11417/* Query attributes object to see if integer divide instructions may be
11418 present in an object. */
11419static bfd_boolean
11420elf32_arm_attributes_accept_div (const obj_attribute *attr)
11421{
11422 int arch = attr[Tag_CPU_arch].i;
11423 int profile = attr[Tag_CPU_arch_profile].i;
11424
11425 switch (attr[Tag_DIV_use].i)
11426 {
11427 case 0:
11428 /* Integer divide allowed if instruction contained in archetecture. */
11429 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11430 return TRUE;
11431 else if (arch >= TAG_CPU_ARCH_V7E_M)
11432 return TRUE;
11433 else
11434 return FALSE;
11435
11436 case 1:
11437 /* Integer divide explicitly prohibited. */
11438 return FALSE;
11439
11440 default:
11441 /* Unrecognised case - treat as allowing divide everywhere. */
11442 case 2:
11443 /* Integer divide allowed in ARM state. */
11444 return TRUE;
11445 }
11446}
11447
11448/* Query attributes object to see if integer divide instructions are
11449 forbidden to be in the object. This is not the inverse of
11450 elf32_arm_attributes_accept_div. */
11451static bfd_boolean
11452elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11453{
11454 return attr[Tag_DIV_use].i == 1;
11455}
11456
ee065d83
PB		 11457/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11458 are conflicting attributes. */
906e58ca 11459
ee065d83
PB		 11460static bfd_boolean
11461elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11462{
104d59d1
JM		 11463 obj_attribute *in_attr;
11464 obj_attribute *out_attr;
ee065d83
PB		 11465 /* Some tags have 0 = don't care, 1 = strong requirement,
11466 2 = weak requirement. */
91e22acd 11467 static const int order_021[3] = {0, 2, 1};
ee065d83 11468 int i;
91e22acd 11469 bfd_boolean result = TRUE;
ee065d83 11470
3e6b1042
DJ		 11471 /* Skip the linker stubs file. This preserves previous behavior
11472 of accepting unknown attributes in the first input file - but
11473 is that a bug? */
11474 if (ibfd->flags & BFD_LINKER_CREATED)
11475 return TRUE;
11476
104d59d1 11477 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11478 {
11479 /* This is the first object. Copy the attributes. */
104d59d1 11480 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11481
cd21e546
MGD		 11482 out_attr = elf_known_obj_attributes_proc (obfd);
11483
004ae526
PB		 11484 /* Use the Tag_null value to indicate the attributes have been
11485 initialized. */
cd21e546 11486 out_attr[0].i = 1;
004ae526 11487
cd21e546
MGD		 11488 /* We do not output objects with Tag_MPextension_use_legacy - we move
11489 the attribute's value to Tag_MPextension_use. */
11490 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11491 {
11492 if (out_attr[Tag_MPextension_use].i != 0
11493 && out_attr[Tag_MPextension_use_legacy].i
11494 != out_attr[Tag_MPextension_use].i)
11495 {
11496 _bfd_error_handler
11497 (_("Error: %B has both the current and legacy "
11498 "Tag_MPextension_use attributes"), ibfd);
11499 result = FALSE;
11500 }
11501
11502 out_attr[Tag_MPextension_use] =
11503 out_attr[Tag_MPextension_use_legacy];
11504 out_attr[Tag_MPextension_use_legacy].type = 0;
11505 out_attr[Tag_MPextension_use_legacy].i = 0;
11506 }
11507
11508 return result;
ee065d83
PB		 11509 }
11510
104d59d1
JM		 11511 in_attr = elf_known_obj_attributes_proc (ibfd);
11512 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11513 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11514 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11515 {
8e79c3df 11516 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11517 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11518 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11519 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11520 {
11521 _bfd_error_handler
3895f852 11522 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11523 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11524 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11525 result = FALSE;
ee065d83
PB		 11526 }
11527 }
11528
3de4a297 11529 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11530 {
11531 /* Merge this attribute with existing attributes. */
11532 switch (i)
11533 {
11534 case Tag_CPU_raw_name:
11535 case Tag_CPU_name:
91e22acd 11536 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11537 break;
11538
11539 case Tag_ABI_optimization_goals:
11540 case Tag_ABI_FP_optimization_goals:
11541 /* Use the first value seen. */
11542 break;
11543
11544 case Tag_CPU_arch:
91e22acd
AS		 11545 {
11546 int secondary_compat = -1, secondary_compat_out = -1;
11547 unsigned int saved_out_attr = out_attr[i].i;
11548 static const char *name_table[] = {
11549 /* These aren't real CPU names, but we can't guess
11550 that from the architecture version alone. */
11551 "Pre v4",
11552 "ARM v4",
11553 "ARM v4T",
11554 "ARM v5T",
11555 "ARM v5TE",
11556 "ARM v5TEJ",
11557 "ARM v6",
11558 "ARM v6KZ",
11559 "ARM v6T2",
11560 "ARM v6K",
11561 "ARM v7",
11562 "ARM v6-M",
bca38921
MGD		 11563 "ARM v6S-M",
11564 "ARM v8"
91e22acd
AS		 11565 };
11566
11567 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11568 secondary_compat = get_secondary_compatible_arch (ibfd);
11569 secondary_compat_out = get_secondary_compatible_arch (obfd);
11570 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11571 &secondary_compat_out,
11572 in_attr[i].i,
11573 secondary_compat);
11574 set_secondary_compatible_arch (obfd, secondary_compat_out);
11575
11576 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11577 if (out_attr[i].i == saved_out_attr)
11578 ; /* Leave the names alone. */
11579 else if (out_attr[i].i == in_attr[i].i)
11580 {
11581 /* The output architecture has been changed to match the
11582 input architecture. Use the input names. */
11583 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11584 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11585 : NULL;
11586 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11587 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11588 : NULL;
11589 }
11590 else
11591 {
11592 out_attr[Tag_CPU_name].s = NULL;
11593 out_attr[Tag_CPU_raw_name].s = NULL;
11594 }
11595
11596 /* If we still don't have a value for Tag_CPU_name,
11597 make one up now. Tag_CPU_raw_name remains blank. */
11598 if (out_attr[Tag_CPU_name].s == NULL
11599 && out_attr[i].i < ARRAY_SIZE (name_table))
11600 out_attr[Tag_CPU_name].s =
11601 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11602 }
11603 break;
11604
ee065d83
PB		 11605 case Tag_ARM_ISA_use:
11606 case Tag_THUMB_ISA_use:
ee065d83 11607 case Tag_WMMX_arch:
91e22acd
AS		 11608 case Tag_Advanced_SIMD_arch:
11609 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11610 case Tag_ABI_FP_rounding:
ee065d83
PB		 11611 case Tag_ABI_FP_exceptions:
11612 case Tag_ABI_FP_user_exceptions:
11613 case Tag_ABI_FP_number_model:
75375b3e 11614 case Tag_FP_HP_extension:
91e22acd
AS		 11615 case Tag_CPU_unaligned_access:
11616 case Tag_T2EE_use:
91e22acd 11617 case Tag_MPextension_use:
ee065d83
PB		 11618 /* Use the largest value specified. */
11619 if (in_attr[i].i > out_attr[i].i)
11620 out_attr[i].i = in_attr[i].i;
11621 break;
11622
75375b3e 11623 case Tag_ABI_align_preserved:
91e22acd
AS		 11624 case Tag_ABI_PCS_RO_data:
11625 /* Use the smallest value specified. */
11626 if (in_attr[i].i < out_attr[i].i)
11627 out_attr[i].i = in_attr[i].i;
11628 break;
11629
75375b3e 11630 case Tag_ABI_align_needed:
91e22acd 11631 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11632 && (in_attr[Tag_ABI_align_preserved].i == 0
11633 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11634 {
91e22acd
AS		 11635 /* This error message should be enabled once all non-conformant
11636 binaries in the toolchain have had the attributes set
11637 properly.
ee065d83 11638 _bfd_error_handler
3895f852 11639 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11640 obfd, ibfd);
11641 result = FALSE; */
ee065d83 11642 }
91e22acd
AS		 11643 /* Fall through. */
11644 case Tag_ABI_FP_denormal:
11645 case Tag_ABI_PCS_GOT_use:
11646 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11647 value if greater than 2 (for future-proofing). */
11648 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11649 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11650 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11651 out_attr[i].i = in_attr[i].i;
11652 break;
91e22acd 11653
75375b3e
MGD		 11654 case Tag_Virtualization_use:
11655 /* The virtualization tag effectively stores two bits of
11656 information: the intended use of TrustZone (in bit 0), and the
11657 intended use of Virtualization (in bit 1). */
11658 if (out_attr[i].i == 0)
11659 out_attr[i].i = in_attr[i].i;
11660 else if (in_attr[i].i != 0
11661 && in_attr[i].i != out_attr[i].i)
11662 {
11663 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11664 out_attr[i].i = 3;
11665 else
11666 {
11667 _bfd_error_handler
11668 (_("error: %B: unable to merge virtualization attributes "
11669 "with %B"),
11670 obfd, ibfd);
11671 result = FALSE;
11672 }
11673 }
11674 break;
91e22acd
AS		 11675
11676 case Tag_CPU_arch_profile:
11677 if (out_attr[i].i != in_attr[i].i)
11678 {
11679 /* 0 will merge with anything.
11680 'A' and 'S' merge to 'A'.
11681 'R' and 'S' merge to 'R'.
11682 'M' and 'A|R|S' is an error. */
11683 if (out_attr[i].i == 0
11684 || (out_attr[i].i == 'S'
11685 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11686 out_attr[i].i = in_attr[i].i;
11687 else if (in_attr[i].i == 0
11688 || (in_attr[i].i == 'S'
11689 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11690 ; /* Do nothing. */
11691 else
11692 {
11693 _bfd_error_handler
3895f852 11694 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11695 ibfd,
11696 in_attr[i].i ? in_attr[i].i : '0',
11697 out_attr[i].i ? out_attr[i].i : '0');
11698 result = FALSE;
11699 }
11700 }
11701 break;
75375b3e 11702 case Tag_FP_arch:
62f3b8c8 11703 {
4547cb56
NC		 11704 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11705 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11706 when it's 0. It might mean absence of FP hardware if
11707 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11708
bca38921 11709#define VFP_VERSION_COUNT 8
62f3b8c8
PB		 11710 static const struct
11711 {
11712 int ver;
11713 int regs;
bca38921 11714 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11715 {
11716 {0, 0},
11717 {1, 16},
11718 {2, 16},
11719 {3, 32},
11720 {3, 16},
11721 {4, 32},
bca38921
MGD		 11722 {4, 16},
11723 {8, 32}
62f3b8c8
PB		 11724 };
11725 int ver;
11726 int regs;
11727 int newval;
11728
4547cb56
NC		 11729 /* If the output has no requirement about FP hardware,
11730 follow the requirement of the input. */
11731 if (out_attr[i].i == 0)
11732 {
11733 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11734 out_attr[i].i = in_attr[i].i;
11735 out_attr[Tag_ABI_HardFP_use].i
11736 = in_attr[Tag_ABI_HardFP_use].i;
11737 break;
11738 }
11739 /* If the input has no requirement about FP hardware, do
11740 nothing. */
11741 else if (in_attr[i].i == 0)
11742 {
11743 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11744 break;
11745 }
11746
11747 /* Both the input and the output have nonzero Tag_FP_arch.
11748 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11749
11750 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11751 do nothing. */
11752 if (in_attr[Tag_ABI_HardFP_use].i == 0
11753 && out_attr[Tag_ABI_HardFP_use].i == 0)
11754 ;
11755 /* If the input and the output have different Tag_ABI_HardFP_use,
11756 the combination of them is 3 (SP & DP). */
11757 else if (in_attr[Tag_ABI_HardFP_use].i
11758 != out_attr[Tag_ABI_HardFP_use].i)
11759 out_attr[Tag_ABI_HardFP_use].i = 3;
11760
11761 /* Now we can handle Tag_FP_arch. */
11762
bca38921
MGD		 11763 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11764 pick the biggest. */
11765 if (in_attr[i].i >= VFP_VERSION_COUNT
11766 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 11767 {
11768 out_attr[i] = in_attr[i];
11769 break;
11770 }
11771 /* The output uses the superset of input features
11772 (ISA version) and registers. */
11773 ver = vfp_versions[in_attr[i].i].ver;
11774 if (ver < vfp_versions[out_attr[i].i].ver)
11775 ver = vfp_versions[out_attr[i].i].ver;
11776 regs = vfp_versions[in_attr[i].i].regs;
11777 if (regs < vfp_versions[out_attr[i].i].regs)
11778 regs = vfp_versions[out_attr[i].i].regs;
11779 /* This assumes all possible supersets are also a valid
11780 options. */
bca38921 11781 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 11782 {
11783 if (regs == vfp_versions[newval].regs
11784 && ver == vfp_versions[newval].ver)
11785 break;
11786 }
11787 out_attr[i].i = newval;
11788 }
b1cc4aeb 11789 break;
ee065d83
PB		 11790 case Tag_PCS_config:
11791 if (out_attr[i].i == 0)
11792 out_attr[i].i = in_attr[i].i;
b6009aca 11793 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11794 {
11795 /* It's sometimes ok to mix different configs, so this is only
11796 a warning. */
11797 _bfd_error_handler
11798 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11799 }
11800 break;
11801 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11802 if (in_attr[i].i != out_attr[i].i
11803 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11804 && in_attr[i].i != AEABI_R9_unused)
11805 {
11806 _bfd_error_handler
3895f852 11807 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11808 result = FALSE;
ee065d83
PB		 11809 }
11810 if (out_attr[i].i == AEABI_R9_unused)
11811 out_attr[i].i = in_attr[i].i;
11812 break;
11813 case Tag_ABI_PCS_RW_data:
11814 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11815 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11816 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11817 {
11818 _bfd_error_handler
3895f852 11819 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11820 ibfd);
91e22acd 11821 result = FALSE;
ee065d83
PB		 11822 }
11823 /* Use the smallest value specified. */
11824 if (in_attr[i].i < out_attr[i].i)
11825 out_attr[i].i = in_attr[i].i;
11826 break;
ee065d83 11827 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11828 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11829 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11830 {
11831 _bfd_error_handler
a9dc9481
JM		 11832 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11833 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11834 }
a9dc9481 11835 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11836 out_attr[i].i = in_attr[i].i;
11837 break;
ee065d83
PB		 11838 case Tag_ABI_enum_size:
11839 if (in_attr[i].i != AEABI_enum_unused)
11840 {
11841 if (out_attr[i].i == AEABI_enum_unused
11842 || out_attr[i].i == AEABI_enum_forced_wide)
11843 {
11844 /* The existing object is compatible with anything.
11845 Use whatever requirements the new object has. */
11846 out_attr[i].i = in_attr[i].i;
11847 }
11848 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11849 && out_attr[i].i != in_attr[i].i
0ffa91dd 11850 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11851 {
91e22acd 11852 static const char *aeabi_enum_names[] =
bf21ed78 11853 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11854 const char *in_name =
11855 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11856 ? aeabi_enum_names[in_attr[i].i]
11857 : "<unknown>";
11858 const char *out_name =
11859 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11860 ? aeabi_enum_names[out_attr[i].i]
11861 : "<unknown>";
ee065d83 11862 _bfd_error_handler
bf21ed78 11863 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11864 ibfd, in_name, out_name);
ee065d83
PB		 11865 }
11866 }
11867 break;
11868 case Tag_ABI_VFP_args:
11869 /* Aready done. */
11870 break;
11871 case Tag_ABI_WMMX_args:
11872 if (in_attr[i].i != out_attr[i].i)
11873 {
11874 _bfd_error_handler
3895f852 11875 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11876 ibfd, obfd);
91e22acd 11877 result = FALSE;
ee065d83
PB		 11878 }
11879 break;
7b86a9fa
AS		 11880 case Tag_compatibility:
11881 /* Merged in target-independent code. */
11882 break;
91e22acd 11883 case Tag_ABI_HardFP_use:
4547cb56 11884 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11885 break;
11886 case Tag_ABI_FP_16bit_format:
11887 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11888 {
11889 if (in_attr[i].i != out_attr[i].i)
11890 {
11891 _bfd_error_handler
3895f852 11892 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11893 ibfd, obfd);
11894 result = FALSE;
11895 }
11896 }
11897 if (in_attr[i].i != 0)
11898 out_attr[i].i = in_attr[i].i;
11899 break;
7b86a9fa 11900
cd21e546 11901 case Tag_DIV_use:
ac56ee8f
MGD		 11902 /* A value of zero on input means that the divide instruction may
11903 be used if available in the base architecture as specified via
11904 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11905 the user did not want divide instructions. A value of 2
11906 explicitly means that divide instructions were allowed in ARM
11907 and Thumb state. */
11908 if (in_attr[i].i == out_attr[i].i)
11909 /* Do nothing. */ ;
11910 else if (elf32_arm_attributes_forbid_div (in_attr)
11911 && !elf32_arm_attributes_accept_div (out_attr))
11912 out_attr[i].i = 1;
11913 else if (elf32_arm_attributes_forbid_div (out_attr)
11914 && elf32_arm_attributes_accept_div (in_attr))
11915 out_attr[i].i = in_attr[i].i;
11916 else if (in_attr[i].i == 2)
11917 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 11918 break;
11919
11920 case Tag_MPextension_use_legacy:
11921 /* We don't output objects with Tag_MPextension_use_legacy - we
11922 move the value to Tag_MPextension_use. */
11923 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11924 {
11925 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11926 {
11927 _bfd_error_handler
11928 (_("%B has has both the current and legacy "
b38cadfb 11929 "Tag_MPextension_use attributes"),
cd21e546
MGD		 11930 ibfd);
11931 result = FALSE;
11932 }
11933 }
11934
11935 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11936 out_attr[Tag_MPextension_use] = in_attr[i];
11937
11938 break;
11939
91e22acd 11940 case Tag_nodefaults:
2d0bb761
AS		 11941 /* This tag is set if it exists, but the value is unused (and is
11942 typically zero). We don't actually need to do anything here -
11943 the merge happens automatically when the type flags are merged
11944 below. */
91e22acd
AS		 11945 break;
11946 case Tag_also_compatible_with:
11947 /* Already done in Tag_CPU_arch. */
11948 break;
11949 case Tag_conformance:
11950 /* Keep the attribute if it matches. Throw it away otherwise.
11951 No attribute means no claim to conform. */
11952 if (!in_attr[i].s || !out_attr[i].s
11953 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11954 out_attr[i].s = NULL;
11955 break;
3cfad14c 11956
91e22acd 11957 default:
e8b36cd1
JM		 11958 result
11959 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11960 }
11961
11962 /* If out_attr was copied from in_attr then it won't have a type yet. */
11963 if (in_attr[i].type && !out_attr[i].type)
11964 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11965 }
11966
104d59d1 11967 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11968 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11969 return FALSE;
ee065d83 11970
104d59d1 11971 /* Check for any attributes not known on ARM. */
e8b36cd1 11972 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11973
91e22acd 11974 return result;
252b5132
RH		 11975}
11976
3a4a14e9
PB		 11977
11978/* Return TRUE if the two EABI versions are incompatible. */
11979
11980static bfd_boolean
11981elf32_arm_versions_compatible (unsigned iver, unsigned over)
11982{
11983 /* v4 and v5 are the same spec before and after it was released,
11984 so allow mixing them. */
11985 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11986 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11987 return TRUE;
11988
11989 return (iver == over);
11990}
11991
252b5132
RH		 11992/* Merge backend specific data from an object file to the output
11993 object file when linking. */
9b485d32 11994
b34976b6 11995static bfd_boolean
21d799b5 11996elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 11997
9b485d32
NC		 11998/* Display the flags field. */
11999
b34976b6 12000static bfd_boolean
57e8b36a 12001elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12002{
fc830a83
NC		 12003 FILE * file = (FILE *) ptr;
12004 unsigned long flags;
252b5132
RH		 12005
12006 BFD_ASSERT (abfd != NULL && ptr != NULL);
12007
12008 /* Print normal ELF private data. */
12009 _bfd_elf_print_private_bfd_data (abfd, ptr);
12010
fc830a83 12011 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12012 /* Ignore init flag - it may not be set, despite the flags field
12013 containing valid data. */
252b5132
RH		 12014
12015 /* xgettext:c-format */
9b485d32 12016 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12017
fc830a83
NC		 12018 switch (EF_ARM_EABI_VERSION (flags))
12019 {
12020 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12021 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12022 official ARM ELF extended ABI. Hence they are only decoded if
12023 the EABI version is not set. */
fd2ec330 12024 if (flags & EF_ARM_INTERWORK)
9b485d32 12025 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12026
fd2ec330 12027 if (flags & EF_ARM_APCS_26)
6c571f00 12028 fprintf (file, " [APCS-26]");
fc830a83 12029 else
6c571f00 12030 fprintf (file, " [APCS-32]");
9a5aca8c 12031
96a846ea
RE		 12032 if (flags & EF_ARM_VFP_FLOAT)
12033 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12034 else if (flags & EF_ARM_MAVERICK_FLOAT)
12035 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12036 else
12037 fprintf (file, _(" [FPA float format]"));
12038
fd2ec330 12039 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12040 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12041
fd2ec330 12042 if (flags & EF_ARM_PIC)
9b485d32 12043 fprintf (file, _(" [position independent]"));
fc830a83 12044
fd2ec330 12045 if (flags & EF_ARM_NEW_ABI)
9b485d32 12046 fprintf (file, _(" [new ABI]"));
9a5aca8c 12047
fd2ec330 12048 if (flags & EF_ARM_OLD_ABI)
9b485d32 12049 fprintf (file, _(" [old ABI]"));
9a5aca8c 12050
fd2ec330 12051 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12052 fprintf (file, _(" [software FP]"));
9a5aca8c 12053
96a846ea
RE		 12054 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12055 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12056 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12057 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12058 break;
9a5aca8c 12059
fc830a83 12060 case EF_ARM_EABI_VER1:
9b485d32 12061 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12062
fc830a83 12063 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12064 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12065 else
9b485d32 12066 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12067
fc830a83
NC		 12068 flags &= ~ EF_ARM_SYMSARESORTED;
12069 break;
9a5aca8c 12070
fd2ec330
PB		 12071 case EF_ARM_EABI_VER2:
12072 fprintf (file, _(" [Version2 EABI]"));
12073
12074 if (flags & EF_ARM_SYMSARESORTED)
12075 fprintf (file, _(" [sorted symbol table]"));
12076 else
12077 fprintf (file, _(" [unsorted symbol table]"));
12078
12079 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12080 fprintf (file, _(" [dynamic symbols use segment index]"));
12081
12082 if (flags & EF_ARM_MAPSYMSFIRST)
12083 fprintf (file, _(" [mapping symbols precede others]"));
12084
99e4ae17 12085 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12086 | EF_ARM_MAPSYMSFIRST);
12087 break;
12088
d507cf36
PB		 12089 case EF_ARM_EABI_VER3:
12090 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12091 break;
12092
12093 case EF_ARM_EABI_VER4:
12094 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12095 goto eabi;
d507cf36 12096
3a4a14e9
PB		 12097 case EF_ARM_EABI_VER5:
12098 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12099
12100 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12101 fprintf (file, _(" [soft-float ABI]"));
12102
12103 if (flags & EF_ARM_ABI_FLOAT_HARD)
12104 fprintf (file, _(" [hard-float ABI]"));
12105
12106 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12107
3a4a14e9 12108 eabi:
d507cf36
PB		 12109 if (flags & EF_ARM_BE8)
12110 fprintf (file, _(" [BE8]"));
12111
12112 if (flags & EF_ARM_LE8)
12113 fprintf (file, _(" [LE8]"));
12114
12115 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12116 break;
12117
fc830a83 12118 default:
9b485d32 12119 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12120 break;
12121 }
252b5132 12122
fc830a83 12123 flags &= ~ EF_ARM_EABIMASK;
252b5132 12124
fc830a83 12125 if (flags & EF_ARM_RELEXEC)
9b485d32 12126 fprintf (file, _(" [relocatable executable]"));
252b5132 12127
fc830a83 12128 if (flags & EF_ARM_HASENTRY)
9b485d32 12129 fprintf (file, _(" [has entry point]"));
252b5132 12130
fc830a83
NC		 12131 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12132
12133 if (flags)
9b485d32 12134 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12135
252b5132
RH		 12136 fputc ('\n', file);
12137
b34976b6 12138 return TRUE;
252b5132
RH		 12139}
12140
12141static int
57e8b36a 12142elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12143{
2f0ca46a
NC		 12144 switch (ELF_ST_TYPE (elf_sym->st_info))
12145 {
12146 case STT_ARM_TFUNC:
12147 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12148
2f0ca46a
NC		 12149 case STT_ARM_16BIT:
12150 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12151 This allows us to distinguish between data used by Thumb instructions
12152 and non-data (which is probably code) inside Thumb regions of an
12153 executable. */
1a0eb693 12154 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12155 return ELF_ST_TYPE (elf_sym->st_info);
12156 break;
9a5aca8c 12157
ce855c42
NC		 12158 default:
12159 break;
2f0ca46a
NC		 12160 }
12161
12162 return type;
252b5132 12163}
f21f3fe0 12164
252b5132 12165static asection *
07adf181
AM		 12166elf32_arm_gc_mark_hook (asection *sec,
12167 struct bfd_link_info *info,
12168 Elf_Internal_Rela *rel,
12169 struct elf_link_hash_entry *h,
12170 Elf_Internal_Sym *sym)
252b5132
RH		 12171{
12172 if (h != NULL)
07adf181 12173 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12174 {
12175 case R_ARM_GNU_VTINHERIT:
12176 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12177 return NULL;
12178 }
9ad5cbcf 12179
07adf181 12180 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12181}
12182
780a67af
NC		 12183/* Update the got entry reference counts for the section being removed. */
12184
b34976b6 12185static bfd_boolean
ba93b8ac
DJ		 12186elf32_arm_gc_sweep_hook (bfd * abfd,
12187 struct bfd_link_info * info,
12188 asection * sec,
12189 const Elf_Internal_Rela * relocs)
252b5132 12190{
5e681ec4
PB		 12191 Elf_Internal_Shdr *symtab_hdr;
12192 struct elf_link_hash_entry **sym_hashes;
12193 bfd_signed_vma *local_got_refcounts;
12194 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12195 struct elf32_arm_link_hash_table * globals;
12196
7dda2462
TG		 12197 if (info->relocatable)
12198 return TRUE;
12199
eb043451 12200 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12201 if (globals == NULL)
12202 return FALSE;
5e681ec4
PB		 12203
12204 elf_section_data (sec)->local_dynrel = NULL;
12205
0ffa91dd 12206 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12207 sym_hashes = elf_sym_hashes (abfd);
12208 local_got_refcounts = elf_local_got_refcounts (abfd);
12209
906e58ca 12210 check_use_blx (globals);
bd97cb95 12211
5e681ec4
PB		 12212 relend = relocs + sec->reloc_count;
12213 for (rel = relocs; rel < relend; rel++)
eb043451 12214 {
3eb128b2
AM		 12215 unsigned long r_symndx;
12216 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12217 struct elf32_arm_link_hash_entry *eh;
eb043451 12218 int r_type;
34e77a92 12219 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12220 bfd_boolean may_become_dynamic_p;
12221 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12222 union gotplt_union *root_plt;
12223 struct arm_plt_info *arm_plt;
5e681ec4 12224
3eb128b2
AM		 12225 r_symndx = ELF32_R_SYM (rel->r_info);
12226 if (r_symndx >= symtab_hdr->sh_info)
12227 {
12228 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12229 while (h->root.type == bfd_link_hash_indirect
12230 || h->root.type == bfd_link_hash_warning)
12231 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12232 }
f6e32f6d
RS		 12233 eh = (struct elf32_arm_link_hash_entry *) h;
12234
34e77a92 12235 call_reloc_p = FALSE;
f6e32f6d
RS		 12236 may_become_dynamic_p = FALSE;
12237 may_need_local_target_p = FALSE;
3eb128b2 12238
eb043451 12239 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12240 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12241 switch (r_type)
12242 {
12243 case R_ARM_GOT32:
eb043451 12244 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12245 case R_ARM_TLS_GD32:
12246 case R_ARM_TLS_IE32:
3eb128b2 12247 if (h != NULL)
eb043451 12248 {
eb043451
PB		 12249 if (h->got.refcount > 0)
12250 h->got.refcount -= 1;
12251 }
12252 else if (local_got_refcounts != NULL)
12253 {
12254 if (local_got_refcounts[r_symndx] > 0)
12255 local_got_refcounts[r_symndx] -= 1;
12256 }
12257 break;
12258
ba93b8ac 12259 case R_ARM_TLS_LDM32:
4dfe6ac6 12260 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12261 break;
12262
eb043451
PB		 12263 case R_ARM_PC24:
12264 case R_ARM_PLT32:
5b5bb741
PB		 12265 case R_ARM_CALL:
12266 case R_ARM_JUMP24:
eb043451 12267 case R_ARM_PREL31:
c19d1205 12268 case R_ARM_THM_CALL:
bd97cb95
DJ		 12269 case R_ARM_THM_JUMP24:
12270 case R_ARM_THM_JUMP19:
34e77a92 12271 call_reloc_p = TRUE;
f6e32f6d
RS		 12272 may_need_local_target_p = TRUE;
12273 break;
12274
12275 case R_ARM_ABS12:
12276 if (!globals->vxworks_p)
12277 {
12278 may_need_local_target_p = TRUE;
12279 break;
12280 }
12281 /* Fall through. */
12282 case R_ARM_ABS32:
12283 case R_ARM_ABS32_NOI:
12284 case R_ARM_REL32:
12285 case R_ARM_REL32_NOI:
b6895b4f
PB		 12286 case R_ARM_MOVW_ABS_NC:
12287 case R_ARM_MOVT_ABS:
12288 case R_ARM_MOVW_PREL_NC:
12289 case R_ARM_MOVT_PREL:
12290 case R_ARM_THM_MOVW_ABS_NC:
12291 case R_ARM_THM_MOVT_ABS:
12292 case R_ARM_THM_MOVW_PREL_NC:
12293 case R_ARM_THM_MOVT_PREL:
b7693d02 12294 /* Should the interworking branches be here also? */
f6e32f6d 12295 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12296 && (sec->flags & SEC_ALLOC) != 0)
12297 {
12298 if (h == NULL
12299 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12300 {
12301 call_reloc_p = TRUE;
12302 may_need_local_target_p = TRUE;
12303 }
12304 else
12305 may_become_dynamic_p = TRUE;
12306 }
f6e32f6d
RS		 12307 else
12308 may_need_local_target_p = TRUE;
12309 break;
b7693d02 12310
f6e32f6d
RS		 12311 default:
12312 break;
12313 }
5e681ec4 12314
34e77a92
RS		 12315 if (may_need_local_target_p
12316 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12317 {
27586251
HPN		 12318 /* If PLT refcount book-keeping is wrong and too low, we'll
12319 see a zero value (going to -1) for the root PLT reference
12320 count. */
12321 if (root_plt->refcount >= 0)
12322 {
12323 BFD_ASSERT (root_plt->refcount != 0);
12324 root_plt->refcount -= 1;
12325 }
12326 else
12327 /* A value of -1 means the symbol has become local, forced
12328 or seeing a hidden definition. Any other negative value
12329 is an error. */
12330 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12331
12332 if (!call_reloc_p)
12333 arm_plt->noncall_refcount--;
5e681ec4 12334
f6e32f6d 12335 if (r_type == R_ARM_THM_CALL)
34e77a92 12336 arm_plt->maybe_thumb_refcount--;
bd97cb95 12337
f6e32f6d
RS		 12338 if (r_type == R_ARM_THM_JUMP24
12339 || r_type == R_ARM_THM_JUMP19)
34e77a92 12340 arm_plt->thumb_refcount--;
f6e32f6d 12341 }
5e681ec4 12342
34e77a92 12343 if (may_become_dynamic_p)
f6e32f6d
RS		 12344 {
12345 struct elf_dyn_relocs **pp;
12346 struct elf_dyn_relocs *p;
5e681ec4 12347
34e77a92 12348 if (h != NULL)
9c489990 12349 pp = &(eh->dyn_relocs);
34e77a92
RS		 12350 else
12351 {
12352 Elf_Internal_Sym *isym;
12353
12354 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12355 abfd, r_symndx);
12356 if (isym == NULL)
12357 return FALSE;
12358 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12359 if (pp == NULL)
12360 return FALSE;
12361 }
9c489990 12362 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12363 if (p->sec == sec)
12364 {
12365 /* Everything must go for SEC. */
12366 *pp = p->next;
12367 break;
12368 }
eb043451
PB		 12369 }
12370 }
5e681ec4 12371
b34976b6 12372 return TRUE;
252b5132
RH		 12373}
12374
780a67af
NC		 12375/* Look through the relocs for a section during the first phase. */
12376
b34976b6 12377static bfd_boolean
57e8b36a
NC		 12378elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12379 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12380{
b34976b6
AM		 12381 Elf_Internal_Shdr *symtab_hdr;
12382 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12383 const Elf_Internal_Rela *rel;
12384 const Elf_Internal_Rela *rel_end;
12385 bfd *dynobj;
5e681ec4 12386 asection *sreloc;
5e681ec4 12387 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12388 bfd_boolean call_reloc_p;
12389 bfd_boolean may_become_dynamic_p;
12390 bfd_boolean may_need_local_target_p;
ce98a316 12391 unsigned long nsyms;
9a5aca8c 12392
1049f94e 12393 if (info->relocatable)
b34976b6 12394 return TRUE;
9a5aca8c 12395
0ffa91dd
NC		 12396 BFD_ASSERT (is_arm_elf (abfd));
12397
5e681ec4 12398 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12399 if (htab == NULL)
12400 return FALSE;
12401
5e681ec4 12402 sreloc = NULL;
9a5aca8c 12403
67687978
PB		 12404 /* Create dynamic sections for relocatable executables so that we can
12405 copy relocations. */
12406 if (htab->root.is_relocatable_executable
12407 && ! htab->root.dynamic_sections_created)
12408 {
12409 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12410 return FALSE;
12411 }
12412
cbc704f3
RS		 12413 if (htab->root.dynobj == NULL)
12414 htab->root.dynobj = abfd;
34e77a92
RS		 12415 if (!create_ifunc_sections (info))
12416 return FALSE;
cbc704f3
RS		 12417
12418 dynobj = htab->root.dynobj;
12419
0ffa91dd 12420 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12421 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12422 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12423
252b5132
RH		 12424 rel_end = relocs + sec->reloc_count;
12425 for (rel = relocs; rel < rel_end; rel++)
12426 {
34e77a92 12427 Elf_Internal_Sym *isym;
252b5132 12428 struct elf_link_hash_entry *h;
b7693d02 12429 struct elf32_arm_link_hash_entry *eh;
252b5132 12430 unsigned long r_symndx;
eb043451 12431 int r_type;
9a5aca8c 12432
252b5132 12433 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12434 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12435 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12436
ce98a316
NC		 12437 if (r_symndx >= nsyms
12438 /* PR 9934: It is possible to have relocations that do not
12439 refer to symbols, thus it is also possible to have an
12440 object file containing relocations but no symbol table. */
cf35638d 12441 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12442 {
12443 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12444 r_symndx);
ba93b8ac
DJ		 12445 return FALSE;
12446 }
12447
34e77a92
RS		 12448 h = NULL;
12449 isym = NULL;
12450 if (nsyms > 0)
973a3492 12451 {
34e77a92
RS		 12452 if (r_symndx < symtab_hdr->sh_info)
12453 {
12454 /* A local symbol. */
12455 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12456 abfd, r_symndx);
12457 if (isym == NULL)
12458 return FALSE;
12459 }
12460 else
12461 {
12462 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12463 while (h->root.type == bfd_link_hash_indirect
12464 || h->root.type == bfd_link_hash_warning)
12465 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12466 }
973a3492 12467 }
9a5aca8c 12468
b7693d02
DJ		 12469 eh = (struct elf32_arm_link_hash_entry *) h;
12470
f6e32f6d
RS		 12471 call_reloc_p = FALSE;
12472 may_become_dynamic_p = FALSE;
12473 may_need_local_target_p = FALSE;
12474
0855e32b
NS		 12475 /* Could be done earlier, if h were already available. */
12476 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12477 switch (r_type)
252b5132 12478 {
5e681ec4 12479 case R_ARM_GOT32:
eb043451 12480 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12481 case R_ARM_TLS_GD32:
12482 case R_ARM_TLS_IE32:
0855e32b
NS		 12483 case R_ARM_TLS_GOTDESC:
12484 case R_ARM_TLS_DESCSEQ:
12485 case R_ARM_THM_TLS_DESCSEQ:
12486 case R_ARM_TLS_CALL:
12487 case R_ARM_THM_TLS_CALL:
5e681ec4 12488 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12489 {
12490 int tls_type, old_tls_type;
5e681ec4 12491
ba93b8ac
DJ		 12492 switch (r_type)
12493 {
12494 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12495
ba93b8ac 12496 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12497
0855e32b
NS		 12498 case R_ARM_TLS_GOTDESC:
12499 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12500 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12501 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12502
ba93b8ac
DJ		 12503 default: tls_type = GOT_NORMAL; break;
12504 }
252b5132 12505
ba93b8ac
DJ		 12506 if (h != NULL)
12507 {
12508 h->got.refcount++;
12509 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12510 }
12511 else
12512 {
ba93b8ac 12513 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12514 if (!elf32_arm_allocate_local_sym_info (abfd))
12515 return FALSE;
12516 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12517 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12518 }
12519
0855e32b
NS		 12520 /* If a variable is accessed with both tls methods, two
12521 slots may be created. */
12522 if (GOT_TLS_GD_ANY_P (old_tls_type)
12523 && GOT_TLS_GD_ANY_P (tls_type))
12524 tls_type |= old_tls_type;
12525
12526 /* We will already have issued an error message if there
12527 is a TLS/non-TLS mismatch, based on the symbol
12528 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12529 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12530 && tls_type != GOT_NORMAL)
12531 tls_type |= old_tls_type;
12532
0855e32b
NS		 12533 /* If the symbol is accessed in both IE and GDESC
12534 method, we're able to relax. Turn off the GDESC flag,
12535 without messing up with any other kind of tls types
12536 that may be involved */
12537 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12538 tls_type &= ~GOT_TLS_GDESC;
12539
ba93b8ac
DJ		 12540 if (old_tls_type != tls_type)
12541 {
12542 if (h != NULL)
12543 elf32_arm_hash_entry (h)->tls_type = tls_type;
12544 else
12545 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12546 }
12547 }
8029a119 12548 /* Fall through. */
ba93b8ac
DJ		 12549
12550 case R_ARM_TLS_LDM32:
12551 if (r_type == R_ARM_TLS_LDM32)
12552 htab->tls_ldm_got.refcount++;
8029a119 12553 /* Fall through. */
252b5132 12554
c19d1205 12555 case R_ARM_GOTOFF32:
5e681ec4 12556 case R_ARM_GOTPC:
cbc704f3
RS		 12557 if (htab->root.sgot == NULL
12558 && !create_got_section (htab->root.dynobj, info))
12559 return FALSE;
252b5132
RH		 12560 break;
12561
252b5132 12562 case R_ARM_PC24:
7359ea65 12563 case R_ARM_PLT32:
5b5bb741
PB		 12564 case R_ARM_CALL:
12565 case R_ARM_JUMP24:
eb043451 12566 case R_ARM_PREL31:
c19d1205 12567 case R_ARM_THM_CALL:
bd97cb95
DJ		 12568 case R_ARM_THM_JUMP24:
12569 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12570 call_reloc_p = TRUE;
12571 may_need_local_target_p = TRUE;
12572 break;
12573
12574 case R_ARM_ABS12:
12575 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12576 ldr __GOTT_INDEX__ offsets. */
12577 if (!htab->vxworks_p)
12578 {
12579 may_need_local_target_p = TRUE;
12580 break;
12581 }
12582 /* Fall through. */
39623e12 12583
96c23d59
JM		 12584 case R_ARM_MOVW_ABS_NC:
12585 case R_ARM_MOVT_ABS:
12586 case R_ARM_THM_MOVW_ABS_NC:
12587 case R_ARM_THM_MOVT_ABS:
12588 if (info->shared)
12589 {
12590 (*_bfd_error_handler)
12591 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12592 abfd, elf32_arm_howto_table_1[r_type].name,
12593 (h) ? h->root.root.string : "a local symbol");
12594 bfd_set_error (bfd_error_bad_value);
12595 return FALSE;
12596 }
12597
12598 /* Fall through. */
39623e12
PB		 12599 case R_ARM_ABS32:
12600 case R_ARM_ABS32_NOI:
12601 case R_ARM_REL32:
12602 case R_ARM_REL32_NOI:
b6895b4f
PB		 12603 case R_ARM_MOVW_PREL_NC:
12604 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12605 case R_ARM_THM_MOVW_PREL_NC:
12606 case R_ARM_THM_MOVT_PREL:
39623e12 12607
b7693d02 12608 /* Should the interworking branches be listed here? */
67687978 12609 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12610 && (sec->flags & SEC_ALLOC) != 0)
12611 {
12612 if (h == NULL
12613 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12614 {
12615 /* In shared libraries and relocatable executables,
12616 we treat local relative references as calls;
12617 see the related SYMBOL_CALLS_LOCAL code in
12618 allocate_dynrelocs. */
12619 call_reloc_p = TRUE;
12620 may_need_local_target_p = TRUE;
12621 }
12622 else
12623 /* We are creating a shared library or relocatable
12624 executable, and this is a reloc against a global symbol,
12625 or a non-PC-relative reloc against a local symbol.
12626 We may need to copy the reloc into the output. */
12627 may_become_dynamic_p = TRUE;
12628 }
f6e32f6d
RS		 12629 else
12630 may_need_local_target_p = TRUE;
252b5132
RH		 12631 break;
12632
12633 /* This relocation describes the C++ object vtable hierarchy.
12634 Reconstruct it for later use during GC. */
12635 case R_ARM_GNU_VTINHERIT:
c152c796 12636 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 12637 return FALSE;
252b5132 12638 break;
9a5aca8c 12639
252b5132
RH		 12640 /* This relocation describes which C++ vtable entries are actually
12641 used. Record for later use during GC. */
12642 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 12643 BFD_ASSERT (h != NULL);
12644 if (h != NULL
12645 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 12646 return FALSE;
252b5132
RH		 12647 break;
12648 }
f6e32f6d
RS		 12649
12650 if (h != NULL)
12651 {
12652 if (call_reloc_p)
12653 /* We may need a .plt entry if the function this reloc
12654 refers to is in a different object, regardless of the
12655 symbol's type. We can't tell for sure yet, because
12656 something later might force the symbol local. */
12657 h->needs_plt = 1;
12658 else if (may_need_local_target_p)
12659 /* If this reloc is in a read-only section, we might
12660 need a copy reloc. We can't check reliably at this
12661 stage whether the section is read-only, as input
12662 sections have not yet been mapped to output sections.
12663 Tentatively set the flag for now, and correct in
12664 adjust_dynamic_symbol. */
12665 h->non_got_ref = 1;
12666 }
12667
34e77a92
RS		 12668 if (may_need_local_target_p
12669 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12670 {
34e77a92
RS		 12671 union gotplt_union *root_plt;
12672 struct arm_plt_info *arm_plt;
12673 struct arm_local_iplt_info *local_iplt;
12674
12675 if (h != NULL)
12676 {
12677 root_plt = &h->plt;
12678 arm_plt = &eh->plt;
12679 }
12680 else
12681 {
12682 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12683 if (local_iplt == NULL)
12684 return FALSE;
12685 root_plt = &local_iplt->root;
12686 arm_plt = &local_iplt->arm;
12687 }
12688
f6e32f6d
RS		 12689 /* If the symbol is a function that doesn't bind locally,
12690 this relocation will need a PLT entry. */
a8c887dd
NC		 12691 if (root_plt->refcount != -1)
12692 root_plt->refcount += 1;
34e77a92
RS		 12693
12694 if (!call_reloc_p)
12695 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12696
12697 /* It's too early to use htab->use_blx here, so we have to
12698 record possible blx references separately from
12699 relocs that definitely need a thumb stub. */
12700
12701 if (r_type == R_ARM_THM_CALL)
34e77a92 12702 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12703
12704 if (r_type == R_ARM_THM_JUMP24
12705 || r_type == R_ARM_THM_JUMP19)
34e77a92 12706 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12707 }
12708
12709 if (may_become_dynamic_p)
12710 {
12711 struct elf_dyn_relocs *p, **head;
12712
12713 /* Create a reloc section in dynobj. */
12714 if (sreloc == NULL)
12715 {
12716 sreloc = _bfd_elf_make_dynamic_reloc_section
12717 (sec, dynobj, 2, abfd, ! htab->use_rel);
12718
12719 if (sreloc == NULL)
12720 return FALSE;
12721
12722 /* BPABI objects never have dynamic relocations mapped. */
12723 if (htab->symbian_p)
12724 {
12725 flagword flags;
12726
12727 flags = bfd_get_section_flags (dynobj, sreloc);
12728 flags &= ~(SEC_LOAD | SEC_ALLOC);
12729 bfd_set_section_flags (dynobj, sreloc, flags);
12730 }
12731 }
12732
12733 /* If this is a global symbol, count the number of
12734 relocations we need for this symbol. */
12735 if (h != NULL)
12736 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12737 else
12738 {
34e77a92
RS		 12739 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12740 if (head == NULL)
f6e32f6d 12741 return FALSE;
f6e32f6d
RS		 12742 }
12743
12744 p = *head;
12745 if (p == NULL || p->sec != sec)
12746 {
12747 bfd_size_type amt = sizeof *p;
12748
12749 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12750 if (p == NULL)
12751 return FALSE;
12752 p->next = *head;
12753 *head = p;
12754 p->sec = sec;
12755 p->count = 0;
12756 p->pc_count = 0;
12757 }
12758
12759 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12760 p->pc_count += 1;
12761 p->count += 1;
12762 }
252b5132 12763 }
f21f3fe0 12764
b34976b6 12765 return TRUE;
252b5132
RH		 12766}
12767
6a5bb875
PB		 12768/* Unwinding tables are not referenced directly. This pass marks them as
12769 required if the corresponding code section is marked. */
12770
12771static bfd_boolean
906e58ca
NC		 12772elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12773 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12774{
12775 bfd *sub;
12776 Elf_Internal_Shdr **elf_shdrp;
12777 bfd_boolean again;
12778
7f6ab9f8
AM		 12779 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12780
6a5bb875
PB		 12781 /* Marking EH data may cause additional code sections to be marked,
12782 requiring multiple passes. */
12783 again = TRUE;
12784 while (again)
12785 {
12786 again = FALSE;
12787 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12788 {
12789 asection *o;
12790
0ffa91dd 12791 if (! is_arm_elf (sub))
6a5bb875
PB		 12792 continue;
12793
12794 elf_shdrp = elf_elfsections (sub);
12795 for (o = sub->sections; o != NULL; o = o->next)
12796 {
12797 Elf_Internal_Shdr *hdr;
0ffa91dd 12798
6a5bb875 12799 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12800 if (hdr->sh_type == SHT_ARM_EXIDX
12801 && hdr->sh_link
12802 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12803 && !o->gc_mark
12804 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12805 {
12806 again = TRUE;
12807 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12808 return FALSE;
12809 }
12810 }
12811 }
12812 }
12813
12814 return TRUE;
12815}
12816
3c9458e9
NC		 12817/* Treat mapping symbols as special target symbols. */
12818
12819static bfd_boolean
12820elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12821{
b0796911
PB		 12822 return bfd_is_arm_special_symbol_name (sym->name,
12823 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12824}
12825
0367ecfb
NC		 12826/* This is a copy of elf_find_function() from elf.c except that
12827 ARM mapping symbols are ignored when looking for function names
12828 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12829
0367ecfb
NC		 12830static bfd_boolean
12831arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12832 asection * section,
12833 asymbol ** symbols,
12834 bfd_vma offset,
12835 const char ** filename_ptr,
12836 const char ** functionname_ptr)
12837{
12838 const char * filename = NULL;
12839 asymbol * func = NULL;
12840 bfd_vma low_func = 0;
12841 asymbol ** p;
252b5132
RH		 12842
12843 for (p = symbols; *p != NULL; p++)
12844 {
12845 elf_symbol_type *q;
12846
12847 q = (elf_symbol_type *) *p;
12848
252b5132
RH		 12849 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12850 {
12851 default:
12852 break;
12853 case STT_FILE:
12854 filename = bfd_asymbol_name (&q->symbol);
12855 break;
252b5132
RH		 12856 case STT_FUNC:
12857 case STT_ARM_TFUNC:
9d2da7ca 12858 case STT_NOTYPE:
b0796911 12859 /* Skip mapping symbols. */
0367ecfb 12860 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12861 && bfd_is_arm_special_symbol_name (q->symbol.name,
12862 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12863 continue;
12864 /* Fall through. */
6b40fcba 12865 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12866 && q->symbol.value >= low_func
12867 && q->symbol.value <= offset)
12868 {
12869 func = (asymbol *) q;
12870 low_func = q->symbol.value;
12871 }
12872 break;
12873 }
12874 }
12875
12876 if (func == NULL)
b34976b6 12877 return FALSE;
252b5132 12878
0367ecfb
NC		 12879 if (filename_ptr)
12880 *filename_ptr = filename;
12881 if (functionname_ptr)
12882 *functionname_ptr = bfd_asymbol_name (func);
12883
12884 return TRUE;
906e58ca 12885}
0367ecfb
NC		 12886
12887
12888/* Find the nearest line to a particular section and offset, for error
12889 reporting. This code is a duplicate of the code in elf.c, except
12890 that it uses arm_elf_find_function. */
12891
12892static bfd_boolean
12893elf32_arm_find_nearest_line (bfd * abfd,
12894 asection * section,
12895 asymbol ** symbols,
12896 bfd_vma offset,
12897 const char ** filename_ptr,
12898 const char ** functionname_ptr,
12899 unsigned int * line_ptr)
12900{
12901 bfd_boolean found = FALSE;
12902
12903 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12904
fc28f9aa
TG		 12905 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12906 section, symbols, offset,
0367ecfb 12907 filename_ptr, functionname_ptr,
9b8d1a36 12908 line_ptr, NULL, 0,
0367ecfb
NC		 12909 & elf_tdata (abfd)->dwarf2_find_line_info))
12910 {
12911 if (!*functionname_ptr)
12912 arm_elf_find_function (abfd, section, symbols, offset,
12913 *filename_ptr ? NULL : filename_ptr,
12914 functionname_ptr);
f21f3fe0 12915
0367ecfb
NC		 12916 return TRUE;
12917 }
12918
12919 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12920 & found, filename_ptr,
12921 functionname_ptr, line_ptr,
12922 & elf_tdata (abfd)->line_info))
12923 return FALSE;
12924
12925 if (found && (*functionname_ptr || *line_ptr))
12926 return TRUE;
12927
12928 if (symbols == NULL)
12929 return FALSE;
12930
12931 if (! arm_elf_find_function (abfd, section, symbols, offset,
12932 filename_ptr, functionname_ptr))
12933 return FALSE;
12934
12935 *line_ptr = 0;
b34976b6 12936 return TRUE;
252b5132
RH		 12937}
12938
4ab527b0
FF		 12939static bfd_boolean
12940elf32_arm_find_inliner_info (bfd * abfd,
12941 const char ** filename_ptr,
12942 const char ** functionname_ptr,
12943 unsigned int * line_ptr)
12944{
12945 bfd_boolean found;
12946 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12947 functionname_ptr, line_ptr,
12948 & elf_tdata (abfd)->dwarf2_find_line_info);
12949 return found;
12950}
12951
252b5132
RH		 12952/* Adjust a symbol defined by a dynamic object and referenced by a
12953 regular object. The current definition is in some section of the
12954 dynamic object, but we're not including those sections. We have to
12955 change the definition to something the rest of the link can
12956 understand. */
12957
b34976b6 12958static bfd_boolean
57e8b36a
NC		 12959elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12960 struct elf_link_hash_entry * h)
252b5132
RH		 12961{
12962 bfd * dynobj;
12963 asection * s;
b7693d02 12964 struct elf32_arm_link_hash_entry * eh;
67687978 12965 struct elf32_arm_link_hash_table *globals;
252b5132 12966
67687978 12967 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12968 if (globals == NULL)
12969 return FALSE;
12970
252b5132
RH		 12971 dynobj = elf_hash_table (info)->dynobj;
12972
12973 /* Make sure we know what is going on here. */
12974 BFD_ASSERT (dynobj != NULL
f5385ebf 12975 && (h->needs_plt
34e77a92 12976 || h->type == STT_GNU_IFUNC
f6e332e6 12977 || h->u.weakdef != NULL
f5385ebf
AM		 12978 || (h->def_dynamic
12979 && h->ref_regular
12980 && !h->def_regular)));
252b5132 12981
b7693d02
DJ		 12982 eh = (struct elf32_arm_link_hash_entry *) h;
12983
252b5132
RH		 12984 /* If this is a function, put it in the procedure linkage table. We
12985 will fill in the contents of the procedure linkage table later,
12986 when we know the address of the .got section. */
34e77a92 12987 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 12988 {
34e77a92
RS		 12989 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12990 symbol binds locally. */
5e681ec4 12991 if (h->plt.refcount <= 0
34e77a92
RS		 12992 || (h->type != STT_GNU_IFUNC
12993 && (SYMBOL_CALLS_LOCAL (info, h)
12994 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12995 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 12996 {
12997 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 12998 file, but the symbol was never referred to by a dynamic
12999 object, or if all references were garbage collected. In
13000 such a case, we don't actually need to build a procedure
13001 linkage table, and we can just do a PC24 reloc instead. */
13002 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13003 eh->plt.thumb_refcount = 0;
13004 eh->plt.maybe_thumb_refcount = 0;
13005 eh->plt.noncall_refcount = 0;
f5385ebf 13006 h->needs_plt = 0;
252b5132
RH		 13007 }
13008
b34976b6 13009 return TRUE;
252b5132 13010 }
5e681ec4 13011 else
b7693d02
DJ		 13012 {
13013 /* It's possible that we incorrectly decided a .plt reloc was
13014 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13015 in check_relocs. We can't decide accurately between function
13016 and non-function syms in check-relocs; Objects loaded later in
13017 the link may change h->type. So fix it now. */
13018 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13019 eh->plt.thumb_refcount = 0;
13020 eh->plt.maybe_thumb_refcount = 0;
13021 eh->plt.noncall_refcount = 0;
b7693d02 13022 }
252b5132
RH		 13023
13024 /* If this is a weak symbol, and there is a real definition, the
13025 processor independent code will have arranged for us to see the
13026 real definition first, and we can just use the same value. */
f6e332e6 13027 if (h->u.weakdef != NULL)
252b5132 13028 {
f6e332e6
AM		 13029 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13030 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13031 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13032 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13033 return TRUE;
252b5132
RH		 13034 }
13035
ba93b8ac
DJ		 13036 /* If there are no non-GOT references, we do not need a copy
13037 relocation. */
13038 if (!h->non_got_ref)
13039 return TRUE;
13040
252b5132
RH		 13041 /* This is a reference to a symbol defined by a dynamic object which
13042 is not a function. */
13043
13044 /* If we are creating a shared library, we must presume that the
13045 only references to the symbol are via the global offset table.
13046 For such cases we need not do anything here; the relocations will
67687978
PB		 13047 be handled correctly by relocate_section. Relocatable executables
13048 can reference data in shared objects directly, so we don't need to
13049 do anything here. */
13050 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13051 return TRUE;
252b5132
RH		 13052
13053 /* We must allocate the symbol in our .dynbss section, which will
13054 become part of the .bss section of the executable. There will be
13055 an entry for this symbol in the .dynsym section. The dynamic
13056 object will contain position independent code, so all references
13057 from the dynamic object to this symbol will go through the global
13058 offset table. The dynamic linker will use the .dynsym entry to
13059 determine the address it must put in the global offset table, so
13060 both the dynamic object and the regular object will refer to the
13061 same memory location for the variable. */
3d4d4302 13062 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13063 BFD_ASSERT (s != NULL);
13064
13065 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13066 copy the initial value out of the dynamic object and into the
13067 runtime process image. We need to remember the offset into the
00a97672 13068 .rel(a).bss section we are going to use. */
1d7e9d18 13069 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13070 {
13071 asection *srel;
13072
3d4d4302 13073 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13074 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13075 h->needs_copy = 1;
252b5132
RH		 13076 }
13077
027297b7 13078 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13079}
13080
5e681ec4
PB		 13081/* Allocate space in .plt, .got and associated reloc sections for
13082 dynamic relocs. */
13083
13084static bfd_boolean
47beaa6a 13085allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13086{
13087 struct bfd_link_info *info;
13088 struct elf32_arm_link_hash_table *htab;
13089 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13090 struct elf_dyn_relocs *p;
5e681ec4
PB		 13091
13092 if (h->root.type == bfd_link_hash_indirect)
13093 return TRUE;
13094
e6a6bb22
AM		 13095 eh = (struct elf32_arm_link_hash_entry *) h;
13096
5e681ec4
PB		 13097 info = (struct bfd_link_info *) inf;
13098 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13099 if (htab == NULL)
13100 return FALSE;
5e681ec4 13101
34e77a92 13102 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13103 && h->plt.refcount > 0)
13104 {
13105 /* Make sure this symbol is output as a dynamic symbol.
13106 Undefined weak syms won't yet be marked as dynamic. */
13107 if (h->dynindx == -1
f5385ebf 13108 && !h->forced_local)
5e681ec4 13109 {
c152c796 13110 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13111 return FALSE;
13112 }
13113
34e77a92
RS		 13114 /* If the call in the PLT entry binds locally, the associated
13115 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13116 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13117 than the .plt section. */
13118 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13119 {
13120 eh->is_iplt = 1;
13121 if (eh->plt.noncall_refcount == 0
13122 && SYMBOL_REFERENCES_LOCAL (info, h))
13123 /* All non-call references can be resolved directly.
13124 This means that they can (and in some cases, must)
13125 resolve directly to the run-time target, rather than
13126 to the PLT. That in turns means that any .got entry
13127 would be equal to the .igot.plt entry, so there's
13128 no point having both. */
13129 h->got.refcount = 0;
13130 }
13131
5e681ec4 13132 if (info->shared
34e77a92 13133 || eh->is_iplt
7359ea65 13134 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13135 {
34e77a92 13136 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13137
5e681ec4
PB		 13138 /* If this symbol is not defined in a regular file, and we are
13139 not generating a shared library, then set the symbol to this
13140 location in the .plt. This is required to make function
13141 pointers compare as equal between the normal executable and
13142 the shared library. */
13143 if (! info->shared
f5385ebf 13144 && !h->def_regular)
5e681ec4 13145 {
34e77a92 13146 h->root.u.def.section = htab->root.splt;
5e681ec4 13147 h->root.u.def.value = h->plt.offset;
5e681ec4 13148
67d74e43
DJ		 13149 /* Make sure the function is not marked as Thumb, in case
13150 it is the target of an ABS32 relocation, which will
13151 point to the PLT entry. */
35fc36a8 13152 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13153 }
022f8312 13154
0855e32b 13155 htab->next_tls_desc_index++;
00a97672
RS		 13156
13157 /* VxWorks executables have a second set of relocations for
13158 each PLT entry. They go in a separate relocation section,
13159 which is processed by the kernel loader. */
13160 if (htab->vxworks_p && !info->shared)
13161 {
13162 /* There is a relocation for the initial PLT entry:
13163 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13164 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13165 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13166
13167 /* There are two extra relocations for each subsequent
13168 PLT entry: an R_ARM_32 relocation for the GOT entry,
13169 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13170 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13171 }
5e681ec4
PB		 13172 }
13173 else
13174 {
13175 h->plt.offset = (bfd_vma) -1;
f5385ebf 13176 h->needs_plt = 0;
5e681ec4
PB		 13177 }
13178 }
13179 else
13180 {
13181 h->plt.offset = (bfd_vma) -1;
f5385ebf 13182 h->needs_plt = 0;
5e681ec4
PB		 13183 }
13184
0855e32b
NS		 13185 eh = (struct elf32_arm_link_hash_entry *) h;
13186 eh->tlsdesc_got = (bfd_vma) -1;
13187
5e681ec4
PB		 13188 if (h->got.refcount > 0)
13189 {
13190 asection *s;
13191 bfd_boolean dyn;
ba93b8ac
DJ		 13192 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13193 int indx;
5e681ec4
PB		 13194
13195 /* Make sure this symbol is output as a dynamic symbol.
13196 Undefined weak syms won't yet be marked as dynamic. */
13197 if (h->dynindx == -1
f5385ebf 13198 && !h->forced_local)
5e681ec4 13199 {
c152c796 13200 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13201 return FALSE;
13202 }
13203
e5a52504
MM		 13204 if (!htab->symbian_p)
13205 {
362d30a1 13206 s = htab->root.sgot;
e5a52504 13207 h->got.offset = s->size;
ba93b8ac
DJ		 13208
13209 if (tls_type == GOT_UNKNOWN)
13210 abort ();
13211
13212 if (tls_type == GOT_NORMAL)
13213 /* Non-TLS symbols need one GOT slot. */
13214 s->size += 4;
13215 else
13216 {
0855e32b
NS		 13217 if (tls_type & GOT_TLS_GDESC)
13218 {
13219 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13220 eh->tlsdesc_got
13221 = (htab->root.sgotplt->size
13222 - elf32_arm_compute_jump_table_size (htab));
13223 htab->root.sgotplt->size += 8;
13224 h->got.offset = (bfd_vma) -2;
34e77a92 13225 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13226 reloc in the middle of .got.plt. */
13227 htab->num_tls_desc++;
13228 }
13229
ba93b8ac 13230 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13231 {
13232 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13233 the symbol is both GD and GDESC, got.offset may
13234 have been overwritten. */
13235 h->got.offset = s->size;
13236 s->size += 8;
13237 }
13238
ba93b8ac
DJ		 13239 if (tls_type & GOT_TLS_IE)
13240 /* R_ARM_TLS_IE32 needs one GOT slot. */
13241 s->size += 4;
13242 }
13243
e5a52504 13244 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13245
13246 indx = 0;
13247 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13248 && (!info->shared
13249 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13250 indx = h->dynindx;
13251
13252 if (tls_type != GOT_NORMAL
13253 && (info->shared || indx != 0)
13254 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13255 || h->root.type != bfd_link_hash_undefweak))
13256 {
13257 if (tls_type & GOT_TLS_IE)
47beaa6a 13258 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13259
13260 if (tls_type & GOT_TLS_GD)
47beaa6a 13261 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13262
b38cadfb 13263 if (tls_type & GOT_TLS_GDESC)
0855e32b 13264 {
47beaa6a 13265 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13266 /* GDESC needs a trampoline to jump to. */
13267 htab->tls_trampoline = -1;
13268 }
13269
13270 /* Only GD needs it. GDESC just emits one relocation per
13271 2 entries. */
b38cadfb 13272 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13273 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13274 }
b436d854
RS		 13275 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13276 {
13277 if (htab->root.dynamic_sections_created)
13278 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13279 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13280 }
34e77a92
RS		 13281 else if (h->type == STT_GNU_IFUNC
13282 && eh->plt.noncall_refcount == 0)
13283 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13284 they all resolve dynamically instead. Reserve room for the
13285 GOT entry's R_ARM_IRELATIVE relocation. */
13286 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
b436d854
RS		 13287 else if (info->shared)
13288 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13289 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13290 }
5e681ec4
PB		 13291 }
13292 else
13293 h->got.offset = (bfd_vma) -1;
13294
a4fd1a8e
PB		 13295 /* Allocate stubs for exported Thumb functions on v4t. */
13296 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13297 && h->def_regular
35fc36a8 13298 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13299 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13300 {
13301 struct elf_link_hash_entry * th;
13302 struct bfd_link_hash_entry * bh;
13303 struct elf_link_hash_entry * myh;
13304 char name[1024];
13305 asection *s;
13306 bh = NULL;
13307 /* Create a new symbol to regist the real location of the function. */
13308 s = h->root.u.def.section;
906e58ca 13309 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13310 _bfd_generic_link_add_one_symbol (info, s->owner,
13311 name, BSF_GLOBAL, s,
13312 h->root.u.def.value,
13313 NULL, TRUE, FALSE, &bh);
13314
13315 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13316 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13317 myh->forced_local = 1;
35fc36a8 13318 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13319 eh->export_glue = myh;
13320 th = record_arm_to_thumb_glue (info, h);
13321 /* Point the symbol at the stub. */
13322 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13323 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13324 h->root.u.def.section = th->root.u.def.section;
13325 h->root.u.def.value = th->root.u.def.value & ~1;
13326 }
13327
0bdcacaf 13328 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13329 return TRUE;
13330
13331 /* In the shared -Bsymbolic case, discard space allocated for
13332 dynamic pc-relative relocs against symbols which turn out to be
13333 defined in regular objects. For the normal shared case, discard
13334 space for pc-relative relocs that have become local due to symbol
13335 visibility changes. */
13336
67687978 13337 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13338 {
7bdca076 13339 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 13340 R_ARM_REL32_NOI, which will appear on something like
13341 ".long foo - .". We want calls to protected symbols to resolve
13342 directly to the function rather than going via the plt. If people
13343 want function pointer comparisons to work as expected then they
13344 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13345 if (SYMBOL_CALLS_LOCAL (info, h))
13346 {
0bdcacaf 13347 struct elf_dyn_relocs **pp;
ba93b8ac 13348
0bdcacaf 13349 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13350 {
13351 p->count -= p->pc_count;
13352 p->pc_count = 0;
13353 if (p->count == 0)
13354 *pp = p->next;
13355 else
13356 pp = &p->next;
13357 }
13358 }
13359
4dfe6ac6 13360 if (htab->vxworks_p)
3348747a 13361 {
0bdcacaf 13362 struct elf_dyn_relocs **pp;
3348747a 13363
0bdcacaf 13364 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13365 {
0bdcacaf 13366 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13367 *pp = p->next;
13368 else
13369 pp = &p->next;
13370 }
13371 }
13372
ba93b8ac 13373 /* Also discard relocs on undefined weak syms with non-default
7359ea65 13374 visibility. */
0bdcacaf 13375 if (eh->dyn_relocs != NULL
5e681ec4 13376 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13377 {
13378 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13379 eh->dyn_relocs = NULL;
22d606e9
AM		 13380
13381 /* Make sure undefined weak symbols are output as a dynamic
13382 symbol in PIEs. */
13383 else if (h->dynindx == -1
13384 && !h->forced_local)
13385 {
13386 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13387 return FALSE;
13388 }
13389 }
13390
67687978
PB		 13391 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13392 && h->root.type == bfd_link_hash_new)
13393 {
13394 /* Output absolute symbols so that we can create relocations
13395 against them. For normal symbols we output a relocation
13396 against the section that contains them. */
13397 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13398 return FALSE;
13399 }
13400
5e681ec4
PB		 13401 }
13402 else
13403 {
13404 /* For the non-shared case, discard space for relocs against
13405 symbols which turn out to need copy relocs or are not
13406 dynamic. */
13407
f5385ebf
AM		 13408 if (!h->non_got_ref
13409 && ((h->def_dynamic
13410 && !h->def_regular)
5e681ec4
PB		 13411 || (htab->root.dynamic_sections_created
13412 && (h->root.type == bfd_link_hash_undefweak
13413 || h->root.type == bfd_link_hash_undefined))))
13414 {
13415 /* Make sure this symbol is output as a dynamic symbol.
13416 Undefined weak syms won't yet be marked as dynamic. */
13417 if (h->dynindx == -1
f5385ebf 13418 && !h->forced_local)
5e681ec4 13419 {
c152c796 13420 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13421 return FALSE;
13422 }
13423
13424 /* If that succeeded, we know we'll be keeping all the
13425 relocs. */
13426 if (h->dynindx != -1)
13427 goto keep;
13428 }
13429
0bdcacaf 13430 eh->dyn_relocs = NULL;
5e681ec4
PB		 13431
13432 keep: ;
13433 }
13434
13435 /* Finally, allocate space. */
0bdcacaf 13436 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13437 {
0bdcacaf 13438 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13439 if (h->type == STT_GNU_IFUNC
13440 && eh->plt.noncall_refcount == 0
13441 && SYMBOL_REFERENCES_LOCAL (info, h))
13442 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13443 else
13444 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13445 }
13446
13447 return TRUE;
13448}
13449
08d1f311
DJ		 13450/* Find any dynamic relocs that apply to read-only sections. */
13451
13452static bfd_boolean
8029a119 13453elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13454{
8029a119 13455 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13456 struct elf_dyn_relocs * p;
08d1f311 13457
08d1f311 13458 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13459 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13460 {
0bdcacaf 13461 asection *s = p->sec;
08d1f311
DJ		 13462
13463 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13464 {
13465 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13466
13467 info->flags |= DF_TEXTREL;
13468
13469 /* Not an error, just cut short the traversal. */
13470 return FALSE;
13471 }
13472 }
13473 return TRUE;
13474}
13475
d504ffc8
DJ		 13476void
13477bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13478 int byteswap_code)
13479{
13480 struct elf32_arm_link_hash_table *globals;
13481
13482 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13483 if (globals == NULL)
13484 return;
13485
d504ffc8
DJ		 13486 globals->byteswap_code = byteswap_code;
13487}
13488
252b5132
RH		 13489/* Set the sizes of the dynamic sections. */
13490
b34976b6 13491static bfd_boolean
57e8b36a
NC		 13492elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13493 struct bfd_link_info * info)
252b5132
RH		 13494{
13495 bfd * dynobj;
13496 asection * s;
b34976b6
AM		 13497 bfd_boolean plt;
13498 bfd_boolean relocs;
5e681ec4
PB		 13499 bfd *ibfd;
13500 struct elf32_arm_link_hash_table *htab;
252b5132 13501
5e681ec4 13502 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13503 if (htab == NULL)
13504 return FALSE;
13505
252b5132
RH		 13506 dynobj = elf_hash_table (info)->dynobj;
13507 BFD_ASSERT (dynobj != NULL);
39b41c9c 13508 check_use_blx (htab);
252b5132
RH		 13509
13510 if (elf_hash_table (info)->dynamic_sections_created)
13511 {
13512 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13513 if (info->executable)
252b5132 13514 {
3d4d4302 13515 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13516 BFD_ASSERT (s != NULL);
eea6121a 13517 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13518 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13519 }
13520 }
5e681ec4
PB		 13521
13522 /* Set up .got offsets for local syms, and space for local dynamic
13523 relocs. */
13524 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13525 {
5e681ec4
PB		 13526 bfd_signed_vma *local_got;
13527 bfd_signed_vma *end_local_got;
34e77a92 13528 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13529 char *local_tls_type;
0855e32b 13530 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13531 bfd_size_type locsymcount;
13532 Elf_Internal_Shdr *symtab_hdr;
13533 asection *srel;
4dfe6ac6 13534 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13535 unsigned int symndx;
5e681ec4 13536
0ffa91dd 13537 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13538 continue;
13539
13540 for (s = ibfd->sections; s != NULL; s = s->next)
13541 {
0bdcacaf 13542 struct elf_dyn_relocs *p;
5e681ec4 13543
0bdcacaf 13544 for (p = (struct elf_dyn_relocs *)
21d799b5 13545 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13546 {
0bdcacaf
RS		 13547 if (!bfd_is_abs_section (p->sec)
13548 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13549 {
13550 /* Input section has been discarded, either because
13551 it is a copy of a linkonce section or due to
13552 linker script /DISCARD/, so we'll be discarding
13553 the relocs too. */
13554 }
3348747a 13555 else if (is_vxworks
0bdcacaf 13556 && strcmp (p->sec->output_section->name,
3348747a
NS		 13557 ".tls_vars") == 0)
13558 {
13559 /* Relocations in vxworks .tls_vars sections are
13560 handled specially by the loader. */
13561 }
5e681ec4
PB		 13562 else if (p->count != 0)
13563 {
0bdcacaf 13564 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13565 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13566 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13567 info->flags |= DF_TEXTREL;
13568 }
13569 }
13570 }
13571
13572 local_got = elf_local_got_refcounts (ibfd);
13573 if (!local_got)
13574 continue;
13575
0ffa91dd 13576 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13577 locsymcount = symtab_hdr->sh_info;
13578 end_local_got = local_got + locsymcount;
34e77a92 13579 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13580 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13581 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13582 symndx = 0;
362d30a1
RS		 13583 s = htab->root.sgot;
13584 srel = htab->root.srelgot;
0855e32b 13585 for (; local_got < end_local_got;
34e77a92
RS		 13586 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13587 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13588 {
0855e32b 13589 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13590 local_iplt = *local_iplt_ptr;
13591 if (local_iplt != NULL)
13592 {
13593 struct elf_dyn_relocs *p;
13594
13595 if (local_iplt->root.refcount > 0)
13596 {
13597 elf32_arm_allocate_plt_entry (info, TRUE,
13598 &local_iplt->root,
13599 &local_iplt->arm);
13600 if (local_iplt->arm.noncall_refcount == 0)
13601 /* All references to the PLT are calls, so all
13602 non-call references can resolve directly to the
13603 run-time target. This means that the .got entry
13604 would be the same as the .igot.plt entry, so there's
13605 no point creating both. */
13606 *local_got = 0;
13607 }
13608 else
13609 {
13610 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13611 local_iplt->root.offset = (bfd_vma) -1;
13612 }
13613
13614 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13615 {
13616 asection *psrel;
13617
13618 psrel = elf_section_data (p->sec)->sreloc;
13619 if (local_iplt->arm.noncall_refcount == 0)
13620 elf32_arm_allocate_irelocs (info, psrel, p->count);
13621 else
13622 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13623 }
13624 }
5e681ec4
PB		 13625 if (*local_got > 0)
13626 {
34e77a92
RS		 13627 Elf_Internal_Sym *isym;
13628
eea6121a 13629 *local_got = s->size;
ba93b8ac
DJ		 13630 if (*local_tls_type & GOT_TLS_GD)
13631 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13632 s->size += 8;
0855e32b
NS		 13633 if (*local_tls_type & GOT_TLS_GDESC)
13634 {
13635 *local_tlsdesc_gotent = htab->root.sgotplt->size
13636 - elf32_arm_compute_jump_table_size (htab);
13637 htab->root.sgotplt->size += 8;
13638 *local_got = (bfd_vma) -2;
34e77a92 13639 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13640 reloc in the middle of .got.plt. */
13641 htab->num_tls_desc++;
13642 }
ba93b8ac
DJ		 13643 if (*local_tls_type & GOT_TLS_IE)
13644 s->size += 4;
ba93b8ac 13645
0855e32b
NS		 13646 if (*local_tls_type & GOT_NORMAL)
13647 {
13648 /* If the symbol is both GD and GDESC, *local_got
13649 may have been overwritten. */
13650 *local_got = s->size;
13651 s->size += 4;
13652 }
13653
34e77a92
RS		 13654 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13655 if (isym == NULL)
13656 return FALSE;
13657
13658 /* If all references to an STT_GNU_IFUNC PLT are calls,
13659 then all non-call references, including this GOT entry,
13660 resolve directly to the run-time target. */
13661 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13662 && (local_iplt == NULL
13663 || local_iplt->arm.noncall_refcount == 0))
13664 elf32_arm_allocate_irelocs (info, srel, 1);
3064e1ff 13665 else if (info->shared || output_bfd->flags & DYNAMIC)
0855e32b 13666 {
3064e1ff
JB		 13667 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13668 || *local_tls_type & GOT_TLS_GD)
13669 elf32_arm_allocate_dynrelocs (info, srel, 1);
13670
13671 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13672 {
13673 elf32_arm_allocate_dynrelocs (info,
13674 htab->root.srelplt, 1);
13675 htab->tls_trampoline = -1;
13676 }
0855e32b 13677 }
5e681ec4
PB		 13678 }
13679 else
13680 *local_got = (bfd_vma) -1;
13681 }
252b5132
RH		 13682 }
13683
ba93b8ac
DJ		 13684 if (htab->tls_ldm_got.refcount > 0)
13685 {
13686 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13687 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13688 htab->tls_ldm_got.offset = htab->root.sgot->size;
13689 htab->root.sgot->size += 8;
ba93b8ac 13690 if (info->shared)
47beaa6a 13691 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13692 }
13693 else
13694 htab->tls_ldm_got.offset = -1;
13695
5e681ec4
PB		 13696 /* Allocate global sym .plt and .got entries, and space for global
13697 sym dynamic relocs. */
47beaa6a 13698 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13699
d504ffc8
DJ		 13700 /* Here we rummage through the found bfds to collect glue information. */
13701 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13702 {
0ffa91dd 13703 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13704 continue;
13705
c7b8f16e
JB		 13706 /* Initialise mapping tables for code/data. */
13707 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13708
c7b8f16e
JB		 13709 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13710 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13711 /* xgettext:c-format */
13712 _bfd_error_handler (_("Errors encountered processing file %s"),
13713 ibfd->filename);
13714 }
d504ffc8 13715
3e6b1042
DJ		 13716 /* Allocate space for the glue sections now that we've sized them. */
13717 bfd_elf32_arm_allocate_interworking_sections (info);
13718
0855e32b
NS		 13719 /* For every jump slot reserved in the sgotplt, reloc_count is
13720 incremented. However, when we reserve space for TLS descriptors,
13721 it's not incremented, so in order to compute the space reserved
13722 for them, it suffices to multiply the reloc count by the jump
13723 slot size. */
13724 if (htab->root.srelplt)
13725 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13726
13727 if (htab->tls_trampoline)
13728 {
13729 if (htab->root.splt->size == 0)
13730 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13731
0855e32b
NS		 13732 htab->tls_trampoline = htab->root.splt->size;
13733 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13734
0855e32b
NS		 13735 /* If we're not using lazy TLS relocations, don't generate the
13736 PLT and GOT entries they require. */
13737 if (!(info->flags & DF_BIND_NOW))
13738 {
13739 htab->dt_tlsdesc_got = htab->root.sgot->size;
13740 htab->root.sgot->size += 4;
13741
13742 htab->dt_tlsdesc_plt = htab->root.splt->size;
13743 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13744 }
13745 }
13746
252b5132
RH		 13747 /* The check_relocs and adjust_dynamic_symbol entry points have
13748 determined the sizes of the various dynamic sections. Allocate
13749 memory for them. */
b34976b6
AM		 13750 plt = FALSE;
13751 relocs = FALSE;
252b5132
RH		 13752 for (s = dynobj->sections; s != NULL; s = s->next)
13753 {
13754 const char * name;
252b5132
RH		 13755
13756 if ((s->flags & SEC_LINKER_CREATED) == 0)
13757 continue;
13758
13759 /* It's OK to base decisions on the section name, because none
13760 of the dynobj section names depend upon the input files. */
13761 name = bfd_get_section_name (dynobj, s);
13762
34e77a92 13763 if (s == htab->root.splt)
252b5132 13764 {
c456f082
AM		 13765 /* Remember whether there is a PLT. */
13766 plt = s->size != 0;
252b5132 13767 }
0112cd26 13768 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13769 {
c456f082 13770 if (s->size != 0)
252b5132 13771 {
252b5132 13772 /* Remember whether there are any reloc sections other
00a97672 13773 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13774 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13775 relocs = TRUE;
252b5132
RH		 13776
13777 /* We use the reloc_count field as a counter if we need
13778 to copy relocs into the output file. */
13779 s->reloc_count = 0;
13780 }
13781 }
34e77a92
RS		 13782 else if (s != htab->root.sgot
13783 && s != htab->root.sgotplt
13784 && s != htab->root.iplt
13785 && s != htab->root.igotplt
13786 && s != htab->sdynbss)
252b5132
RH		 13787 {
13788 /* It's not one of our sections, so don't allocate space. */
13789 continue;
13790 }
13791
c456f082 13792 if (s->size == 0)
252b5132 13793 {
c456f082 13794 /* If we don't need this section, strip it from the
00a97672
RS		 13795 output file. This is mostly to handle .rel(a).bss and
13796 .rel(a).plt. We must create both sections in
c456f082
AM		 13797 create_dynamic_sections, because they must be created
13798 before the linker maps input sections to output
13799 sections. The linker does that before
13800 adjust_dynamic_symbol is called, and it is that
13801 function which decides whether anything needs to go
13802 into these sections. */
8423293d 13803 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13804 continue;
13805 }
13806
c456f082
AM		 13807 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13808 continue;
13809
252b5132 13810 /* Allocate memory for the section contents. */
21d799b5 13811 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13812 if (s->contents == NULL)
b34976b6 13813 return FALSE;
252b5132
RH		 13814 }
13815
13816 if (elf_hash_table (info)->dynamic_sections_created)
13817 {
13818 /* Add some entries to the .dynamic section. We fill in the
13819 values later, in elf32_arm_finish_dynamic_sections, but we
13820 must add the entries now so that we get the correct size for
13821 the .dynamic section. The DT_DEBUG entry is filled in by the
13822 dynamic linker and used by the debugger. */
dc810e39 13823#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13824 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13825
8532796c 13826 if (info->executable)
252b5132 13827 {
dc810e39 13828 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13829 return FALSE;
252b5132
RH		 13830 }
13831
13832 if (plt)
13833 {
dc810e39
AM		 13834 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13835 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13836 || !add_dynamic_entry (DT_PLTREL,
13837 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13838 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13839 return FALSE;
0855e32b
NS		 13840
13841 if (htab->dt_tlsdesc_plt &&
b38cadfb 13842 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 13843 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 13844 return FALSE;
252b5132
RH		 13845 }
13846
13847 if (relocs)
13848 {
00a97672
RS		 13849 if (htab->use_rel)
13850 {
13851 if (!add_dynamic_entry (DT_REL, 0)
13852 || !add_dynamic_entry (DT_RELSZ, 0)
13853 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13854 return FALSE;
13855 }
13856 else
13857 {
13858 if (!add_dynamic_entry (DT_RELA, 0)
13859 || !add_dynamic_entry (DT_RELASZ, 0)
13860 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13861 return FALSE;
13862 }
252b5132
RH		 13863 }
13864
08d1f311
DJ		 13865 /* If any dynamic relocs apply to a read-only section,
13866 then we need a DT_TEXTREL entry. */
13867 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13868 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13869 info);
08d1f311 13870
99e4ae17 13871 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13872 {
dc810e39 13873 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13874 return FALSE;
252b5132 13875 }
7a2b07ff
NS		 13876 if (htab->vxworks_p
13877 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13878 return FALSE;
252b5132 13879 }
8532796c 13880#undef add_dynamic_entry
252b5132 13881
b34976b6 13882 return TRUE;
252b5132
RH		 13883}
13884
0855e32b
NS		 13885/* Size sections even though they're not dynamic. We use it to setup
13886 _TLS_MODULE_BASE_, if needed. */
13887
13888static bfd_boolean
13889elf32_arm_always_size_sections (bfd *output_bfd,
13890 struct bfd_link_info *info)
13891{
13892 asection *tls_sec;
13893
13894 if (info->relocatable)
13895 return TRUE;
13896
13897 tls_sec = elf_hash_table (info)->tls_sec;
13898
13899 if (tls_sec)
13900 {
13901 struct elf_link_hash_entry *tlsbase;
13902
13903 tlsbase = elf_link_hash_lookup
13904 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13905
13906 if (tlsbase)
13907 {
13908 struct bfd_link_hash_entry *bh = NULL;
13909 const struct elf_backend_data *bed
13910 = get_elf_backend_data (output_bfd);
13911
13912 if (!(_bfd_generic_link_add_one_symbol
13913 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13914 tls_sec, 0, NULL, FALSE,
13915 bed->collect, &bh)))
13916 return FALSE;
b38cadfb 13917
0855e32b
NS		 13918 tlsbase->type = STT_TLS;
13919 tlsbase = (struct elf_link_hash_entry *)bh;
13920 tlsbase->def_regular = 1;
13921 tlsbase->other = STV_HIDDEN;
13922 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13923 }
13924 }
13925 return TRUE;
13926}
13927
252b5132
RH		 13928/* Finish up dynamic symbol handling. We set the contents of various
13929 dynamic sections here. */
13930
b34976b6 13931static bfd_boolean
906e58ca
NC		 13932elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13933 struct bfd_link_info * info,
13934 struct elf_link_hash_entry * h,
13935 Elf_Internal_Sym * sym)
252b5132 13936{
e5a52504 13937 struct elf32_arm_link_hash_table *htab;
b7693d02 13938 struct elf32_arm_link_hash_entry *eh;
252b5132 13939
e5a52504 13940 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13941 if (htab == NULL)
13942 return FALSE;
13943
b7693d02 13944 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 13945
13946 if (h->plt.offset != (bfd_vma) -1)
13947 {
34e77a92 13948 if (!eh->is_iplt)
e5a52504 13949 {
34e77a92
RS		 13950 BFD_ASSERT (h->dynindx != -1);
13951 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13952 h->dynindx, 0);
e5a52504 13953 }
57e8b36a 13954
f5385ebf 13955 if (!h->def_regular)
252b5132
RH		 13956 {
13957 /* Mark the symbol as undefined, rather than as defined in
13958 the .plt section. Leave the value alone. */
13959 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13960 /* If the symbol is weak, we do need to clear the value.
13961 Otherwise, the PLT entry would provide a definition for
13962 the symbol even if the symbol wasn't defined anywhere,
13963 and so the symbol would never be NULL. */
f5385ebf 13964 if (!h->ref_regular_nonweak)
d982ba73 13965 sym->st_value = 0;
252b5132 13966 }
34e77a92
RS		 13967 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13968 {
13969 /* At least one non-call relocation references this .iplt entry,
13970 so the .iplt entry is the function's canonical address. */
13971 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13972 sym->st_target_internal = ST_BRANCH_TO_ARM;
13973 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13974 (output_bfd, htab->root.iplt->output_section));
13975 sym->st_value = (h->plt.offset
13976 + htab->root.iplt->output_section->vma
13977 + htab->root.iplt->output_offset);
13978 }
252b5132
RH		 13979 }
13980
f5385ebf 13981 if (h->needs_copy)
252b5132
RH		 13982 {
13983 asection * s;
947216bf 13984 Elf_Internal_Rela rel;
252b5132
RH		 13985
13986 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13987 BFD_ASSERT (h->dynindx != -1
13988 && (h->root.type == bfd_link_hash_defined
13989 || h->root.type == bfd_link_hash_defweak));
13990
362d30a1 13991 s = htab->srelbss;
252b5132
RH		 13992 BFD_ASSERT (s != NULL);
13993
00a97672 13994 rel.r_addend = 0;
252b5132
RH		 13995 rel.r_offset = (h->root.u.def.value
13996 + h->root.u.def.section->output_section->vma
13997 + h->root.u.def.section->output_offset);
13998 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 13999 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14000 }
14001
00a97672
RS		 14002 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14003 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14004 to the ".got" section. */
9637f6ef 14005 if (h == htab->root.hdynamic
00a97672 14006 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14007 sym->st_shndx = SHN_ABS;
14008
b34976b6 14009 return TRUE;
252b5132
RH		 14010}
14011
0855e32b
NS		 14012static void
14013arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14014 void *contents,
14015 const unsigned long *template, unsigned count)
14016{
14017 unsigned ix;
b38cadfb 14018
0855e32b
NS		 14019 for (ix = 0; ix != count; ix++)
14020 {
14021 unsigned long insn = template[ix];
14022
14023 /* Emit mov pc,rx if bx is not permitted. */
14024 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14025 insn = (insn & 0xf000000f) | 0x01a0f000;
14026 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14027 }
14028}
14029
252b5132
RH		 14030/* Finish up the dynamic sections. */
14031
b34976b6 14032static bfd_boolean
57e8b36a 14033elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14034{
14035 bfd * dynobj;
14036 asection * sgot;
14037 asection * sdyn;
4dfe6ac6
NC		 14038 struct elf32_arm_link_hash_table *htab;
14039
14040 htab = elf32_arm_hash_table (info);
14041 if (htab == NULL)
14042 return FALSE;
252b5132
RH		 14043
14044 dynobj = elf_hash_table (info)->dynobj;
14045
362d30a1 14046 sgot = htab->root.sgotplt;
894891db
NC		 14047 /* A broken linker script might have discarded the dynamic sections.
14048 Catch this here so that we do not seg-fault later on. */
14049 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14050 return FALSE;
3d4d4302 14051 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14052
14053 if (elf_hash_table (info)->dynamic_sections_created)
14054 {
14055 asection *splt;
14056 Elf32_External_Dyn *dyncon, *dynconend;
14057
362d30a1 14058 splt = htab->root.splt;
24a1ba0f 14059 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14060 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14061
14062 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14063 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14064
252b5132
RH		 14065 for (; dyncon < dynconend; dyncon++)
14066 {
14067 Elf_Internal_Dyn dyn;
14068 const char * name;
14069 asection * s;
14070
14071 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14072
14073 switch (dyn.d_tag)
14074 {
229fcec5
MM		 14075 unsigned int type;
14076
252b5132 14077 default:
7a2b07ff
NS		 14078 if (htab->vxworks_p
14079 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14080 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14081 break;
14082
229fcec5
MM		 14083 case DT_HASH:
14084 name = ".hash";
14085 goto get_vma_if_bpabi;
14086 case DT_STRTAB:
14087 name = ".dynstr";
14088 goto get_vma_if_bpabi;
14089 case DT_SYMTAB:
14090 name = ".dynsym";
14091 goto get_vma_if_bpabi;
c0042f5d
MM		 14092 case DT_VERSYM:
14093 name = ".gnu.version";
14094 goto get_vma_if_bpabi;
14095 case DT_VERDEF:
14096 name = ".gnu.version_d";
14097 goto get_vma_if_bpabi;
14098 case DT_VERNEED:
14099 name = ".gnu.version_r";
14100 goto get_vma_if_bpabi;
14101
252b5132
RH		 14102 case DT_PLTGOT:
14103 name = ".got";
14104 goto get_vma;
14105 case DT_JMPREL:
00a97672 14106 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14107 get_vma:
14108 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14109 if (s == NULL)
14110 {
14111 /* PR ld/14397: Issue an error message if a required section is missing. */
14112 (*_bfd_error_handler)
14113 (_("error: required section '%s' not found in the linker script"), name);
14114 bfd_set_error (bfd_error_invalid_operation);
14115 return FALSE;
14116 }
229fcec5
MM		 14117 if (!htab->symbian_p)
14118 dyn.d_un.d_ptr = s->vma;
14119 else
14120 /* In the BPABI, tags in the PT_DYNAMIC section point
14121 at the file offset, not the memory address, for the
14122 convenience of the post linker. */
14123 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14124 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14125 break;
14126
229fcec5
MM		 14127 get_vma_if_bpabi:
14128 if (htab->symbian_p)
14129 goto get_vma;
14130 break;
14131
252b5132 14132 case DT_PLTRELSZ:
362d30a1 14133 s = htab->root.srelplt;
252b5132 14134 BFD_ASSERT (s != NULL);
eea6121a 14135 dyn.d_un.d_val = s->size;
252b5132
RH		 14136 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14137 break;
906e58ca 14138
252b5132 14139 case DT_RELSZ:
00a97672 14140 case DT_RELASZ:
229fcec5
MM		 14141 if (!htab->symbian_p)
14142 {
14143 /* My reading of the SVR4 ABI indicates that the
14144 procedure linkage table relocs (DT_JMPREL) should be
14145 included in the overall relocs (DT_REL). This is
14146 what Solaris does. However, UnixWare can not handle
14147 that case. Therefore, we override the DT_RELSZ entry
14148 here to make it not include the JMPREL relocs. Since
00a97672 14149 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14150 other relocation sections, we don't have to worry
14151 about changing the DT_REL entry. */
362d30a1 14152 s = htab->root.srelplt;
229fcec5
MM		 14153 if (s != NULL)
14154 dyn.d_un.d_val -= s->size;
14155 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14156 break;
14157 }
8029a119 14158 /* Fall through. */
229fcec5
MM		 14159
14160 case DT_REL:
14161 case DT_RELA:
229fcec5
MM		 14162 /* In the BPABI, the DT_REL tag must point at the file
14163 offset, not the VMA, of the first relocation
14164 section. So, we use code similar to that in
14165 elflink.c, but do not check for SHF_ALLOC on the
14166 relcoation section, since relocations sections are
14167 never allocated under the BPABI. The comments above
14168 about Unixware notwithstanding, we include all of the
14169 relocations here. */
14170 if (htab->symbian_p)
14171 {
14172 unsigned int i;
14173 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14174 ? SHT_REL : SHT_RELA);
14175 dyn.d_un.d_val = 0;
14176 for (i = 1; i < elf_numsections (output_bfd); i++)
14177 {
906e58ca 14178 Elf_Internal_Shdr *hdr
229fcec5
MM		 14179 = elf_elfsections (output_bfd)[i];
14180 if (hdr->sh_type == type)
14181 {
906e58ca 14182 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14183 || dyn.d_tag == DT_RELASZ)
14184 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14185 else if ((ufile_ptr) hdr->sh_offset
14186 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14187 dyn.d_un.d_val = hdr->sh_offset;
14188 }
14189 }
14190 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14191 }
252b5132 14192 break;
88f7bcd5 14193
0855e32b
NS		 14194 case DT_TLSDESC_PLT:
14195 s = htab->root.splt;
14196 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14197 + htab->dt_tlsdesc_plt);
14198 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14199 break;
14200
14201 case DT_TLSDESC_GOT:
14202 s = htab->root.sgot;
14203 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14204 + htab->dt_tlsdesc_got);
14205 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14206 break;
14207
88f7bcd5
NC		 14208 /* Set the bottom bit of DT_INIT/FINI if the
14209 corresponding function is Thumb. */
14210 case DT_INIT:
14211 name = info->init_function;
14212 goto get_sym;
14213 case DT_FINI:
14214 name = info->fini_function;
14215 get_sym:
14216 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14217 then there is nothing to adjust. */
88f7bcd5
NC		 14218 if (dyn.d_un.d_val != 0)
14219 {
14220 struct elf_link_hash_entry * eh;
14221
14222 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14223 FALSE, FALSE, TRUE);
35fc36a8 14224 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14225 {
14226 dyn.d_un.d_val |= 1;
b34976b6 14227 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14228 }
14229 }
14230 break;
252b5132
RH		 14231 }
14232 }
14233
24a1ba0f 14234 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14235 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14236 {
00a97672
RS		 14237 const bfd_vma *plt0_entry;
14238 bfd_vma got_address, plt_address, got_displacement;
14239
14240 /* Calculate the addresses of the GOT and PLT. */
14241 got_address = sgot->output_section->vma + sgot->output_offset;
14242 plt_address = splt->output_section->vma + splt->output_offset;
14243
14244 if (htab->vxworks_p)
14245 {
14246 /* The VxWorks GOT is relocated by the dynamic linker.
14247 Therefore, we must emit relocations rather than simply
14248 computing the values now. */
14249 Elf_Internal_Rela rel;
14250
14251 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14252 put_arm_insn (htab, output_bfd, plt0_entry[0],
14253 splt->contents + 0);
14254 put_arm_insn (htab, output_bfd, plt0_entry[1],
14255 splt->contents + 4);
14256 put_arm_insn (htab, output_bfd, plt0_entry[2],
14257 splt->contents + 8);
00a97672
RS		 14258 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14259
8029a119 14260 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14261 rel.r_offset = plt_address + 12;
14262 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14263 rel.r_addend = 0;
14264 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14265 htab->srelplt2->contents);
14266 }
b38cadfb
NC		 14267 else if (htab->nacl_p)
14268 {
14269 unsigned int i;
14270
14271 got_displacement = got_address + 8 - (plt_address + 16);
14272
14273 put_arm_insn (htab, output_bfd,
14274 elf32_arm_nacl_plt0_entry[0]
14275 | arm_movw_immediate (got_displacement),
14276 splt->contents + 0);
14277 put_arm_insn (htab, output_bfd,
14278 elf32_arm_nacl_plt0_entry[1]
14279 | arm_movt_immediate (got_displacement),
14280 splt->contents + 4);
14281 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14282 put_arm_insn (htab, output_bfd,
14283 elf32_arm_nacl_plt0_entry[i],
14284 splt->contents + (i * 4));
14285 }
00a97672
RS		 14286 else
14287 {
14288 got_displacement = got_address - (plt_address + 16);
14289
14290 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14291 put_arm_insn (htab, output_bfd, plt0_entry[0],
14292 splt->contents + 0);
14293 put_arm_insn (htab, output_bfd, plt0_entry[1],
14294 splt->contents + 4);
14295 put_arm_insn (htab, output_bfd, plt0_entry[2],
14296 splt->contents + 8);
14297 put_arm_insn (htab, output_bfd, plt0_entry[3],
14298 splt->contents + 12);
5e681ec4 14299
5e681ec4 14300#ifdef FOUR_WORD_PLT
00a97672
RS		 14301 /* The displacement value goes in the otherwise-unused
14302 last word of the second entry. */
14303 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14304#else
00a97672 14305 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14306#endif
00a97672 14307 }
f7a74f8c 14308 }
252b5132
RH		 14309
14310 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14311 really seem like the right value. */
74541ad4
AM		 14312 if (splt->output_section->owner == output_bfd)
14313 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14314
0855e32b
NS		 14315 if (htab->dt_tlsdesc_plt)
14316 {
14317 bfd_vma got_address
14318 = sgot->output_section->vma + sgot->output_offset;
14319 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14320 + htab->root.sgot->output_offset);
14321 bfd_vma plt_address
14322 = splt->output_section->vma + splt->output_offset;
14323
b38cadfb 14324 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14325 splt->contents + htab->dt_tlsdesc_plt,
14326 dl_tlsdesc_lazy_trampoline, 6);
14327
14328 bfd_put_32 (output_bfd,
14329 gotplt_address + htab->dt_tlsdesc_got
14330 - (plt_address + htab->dt_tlsdesc_plt)
14331 - dl_tlsdesc_lazy_trampoline[6],
14332 splt->contents + htab->dt_tlsdesc_plt + 24);
14333 bfd_put_32 (output_bfd,
14334 got_address - (plt_address + htab->dt_tlsdesc_plt)
14335 - dl_tlsdesc_lazy_trampoline[7],
14336 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14337 }
14338
14339 if (htab->tls_trampoline)
14340 {
b38cadfb 14341 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14342 splt->contents + htab->tls_trampoline,
14343 tls_trampoline, 3);
14344#ifdef FOUR_WORD_PLT
14345 bfd_put_32 (output_bfd, 0x00000000,
14346 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14347#endif
0855e32b
NS		 14348 }
14349
362d30a1 14350 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14351 {
14352 /* Correct the .rel(a).plt.unloaded relocations. They will have
14353 incorrect symbol indexes. */
14354 int num_plts;
eed62c48 14355 unsigned char *p;
00a97672 14356
362d30a1 14357 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14358 / htab->plt_entry_size);
14359 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14360
14361 for (; num_plts; num_plts--)
14362 {
14363 Elf_Internal_Rela rel;
14364
14365 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14366 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14367 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14368 p += RELOC_SIZE (htab);
14369
14370 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14371 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14372 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14373 p += RELOC_SIZE (htab);
14374 }
14375 }
252b5132
RH		 14376 }
14377
14378 /* Fill in the first three entries in the global offset table. */
229fcec5 14379 if (sgot)
252b5132 14380 {
229fcec5
MM		 14381 if (sgot->size > 0)
14382 {
14383 if (sdyn == NULL)
14384 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14385 else
14386 bfd_put_32 (output_bfd,
14387 sdyn->output_section->vma + sdyn->output_offset,
14388 sgot->contents);
14389 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14390 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14391 }
252b5132 14392
229fcec5
MM		 14393 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14394 }
252b5132 14395
b34976b6 14396 return TRUE;
252b5132
RH		 14397}
14398
ba96a88f 14399static void
57e8b36a 14400elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14401{
9b485d32 14402 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14403 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14404
14405 i_ehdrp = elf_elfheader (abfd);
14406
94a3258f
PB		 14407 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14408 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14409 else
14410 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14411 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14412
93204d3a
PB		 14413 if (link_info)
14414 {
14415 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14416 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14417 i_ehdrp->e_flags |= EF_ARM_BE8;
14418 }
3bfcb652
NC		 14419
14420 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14421 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14422 {
14423 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14424 if (abi)
14425 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14426 else
14427 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14428 }
ba96a88f
NC		 14429}
14430
99e4ae17 14431static enum elf_reloc_type_class
57e8b36a 14432elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 14433{
f51e552e 14434 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14435 {
14436 case R_ARM_RELATIVE:
14437 return reloc_class_relative;
14438 case R_ARM_JUMP_SLOT:
14439 return reloc_class_plt;
14440 case R_ARM_COPY:
14441 return reloc_class_copy;
14442 default:
14443 return reloc_class_normal;
14444 }
14445}
14446
e489d0ae 14447static void
57e8b36a 14448elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14449{
5a6c6817 14450 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14451}
14452
40a18ebd
NC		 14453/* Return TRUE if this is an unwinding table entry. */
14454
14455static bfd_boolean
14456is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14457{
0112cd26
NC		 14458 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14459 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14460}
14461
14462
14463/* Set the type and flags for an ARM section. We do this by
14464 the section name, which is a hack, but ought to work. */
14465
14466static bfd_boolean
14467elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14468{
14469 const char * name;
14470
14471 name = bfd_get_section_name (abfd, sec);
14472
14473 if (is_arm_elf_unwind_section_name (abfd, name))
14474 {
14475 hdr->sh_type = SHT_ARM_EXIDX;
14476 hdr->sh_flags |= SHF_LINK_ORDER;
14477 }
14478 return TRUE;
14479}
14480
6dc132d9
L		 14481/* Handle an ARM specific section when reading an object file. This is
14482 called when bfd_section_from_shdr finds a section with an unknown
14483 type. */
40a18ebd
NC		 14484
14485static bfd_boolean
14486elf32_arm_section_from_shdr (bfd *abfd,
14487 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14488 const char *name,
14489 int shindex)
40a18ebd
NC		 14490{
14491 /* There ought to be a place to keep ELF backend specific flags, but
14492 at the moment there isn't one. We just keep track of the
14493 sections by their name, instead. Fortunately, the ABI gives
14494 names for all the ARM specific sections, so we will probably get
14495 away with this. */
14496 switch (hdr->sh_type)
14497 {
14498 case SHT_ARM_EXIDX:
0951f019
RE		 14499 case SHT_ARM_PREEMPTMAP:
14500 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14501 break;
14502
14503 default:
14504 return FALSE;
14505 }
14506
6dc132d9 14507 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14508 return FALSE;
14509
14510 return TRUE;
14511}
e489d0ae 14512
44444f50
NC		 14513static _arm_elf_section_data *
14514get_arm_elf_section_data (asection * sec)
14515{
47b2e99c
JZ		 14516 if (sec && sec->owner && is_arm_elf (sec->owner))
14517 return elf32_arm_section_data (sec);
44444f50
NC		 14518 else
14519 return NULL;
8e3de13a
NC		 14520}
14521
4e617b1e
PB		 14522typedef struct
14523{
57402f1e 14524 void *flaginfo;
4e617b1e 14525 struct bfd_link_info *info;
91a5743d
PB		 14526 asection *sec;
14527 int sec_shndx;
6e0b88f1
AM		 14528 int (*func) (void *, const char *, Elf_Internal_Sym *,
14529 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14530} output_arch_syminfo;
14531
14532enum map_symbol_type
14533{
14534 ARM_MAP_ARM,
14535 ARM_MAP_THUMB,
14536 ARM_MAP_DATA
14537};
14538
14539
7413f23f 14540/* Output a single mapping symbol. */
4e617b1e
PB		 14541
14542static bfd_boolean
7413f23f
DJ		 14543elf32_arm_output_map_sym (output_arch_syminfo *osi,
14544 enum map_symbol_type type,
14545 bfd_vma offset)
4e617b1e
PB		 14546{
14547 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14548 Elf_Internal_Sym sym;
14549
91a5743d
PB		 14550 sym.st_value = osi->sec->output_section->vma
14551 + osi->sec->output_offset
14552 + offset;
4e617b1e
PB		 14553 sym.st_size = 0;
14554 sym.st_other = 0;
14555 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14556 sym.st_shndx = osi->sec_shndx;
35fc36a8 14557 sym.st_target_internal = 0;
fe33d2fa 14558 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14559 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14560}
14561
34e77a92
RS		 14562/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14563 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14564
14565static bfd_boolean
34e77a92
RS		 14566elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14567 bfd_boolean is_iplt_entry_p,
14568 union gotplt_union *root_plt,
14569 struct arm_plt_info *arm_plt)
4e617b1e 14570{
4e617b1e 14571 struct elf32_arm_link_hash_table *htab;
34e77a92 14572 bfd_vma addr, plt_header_size;
4e617b1e 14573
34e77a92 14574 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14575 return TRUE;
14576
4dfe6ac6
NC		 14577 htab = elf32_arm_hash_table (osi->info);
14578 if (htab == NULL)
14579 return FALSE;
14580
34e77a92
RS		 14581 if (is_iplt_entry_p)
14582 {
14583 osi->sec = htab->root.iplt;
14584 plt_header_size = 0;
14585 }
14586 else
14587 {
14588 osi->sec = htab->root.splt;
14589 plt_header_size = htab->plt_header_size;
14590 }
14591 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14592 (osi->info->output_bfd, osi->sec->output_section));
14593
14594 addr = root_plt->offset & -2;
4e617b1e
PB		 14595 if (htab->symbian_p)
14596 {
7413f23f 14597 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14598 return FALSE;
7413f23f 14599 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14600 return FALSE;
14601 }
14602 else if (htab->vxworks_p)
14603 {
7413f23f 14604 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14605 return FALSE;
7413f23f 14606 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14607 return FALSE;
7413f23f 14608 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14609 return FALSE;
7413f23f 14610 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14611 return FALSE;
14612 }
b38cadfb
NC		 14613 else if (htab->nacl_p)
14614 {
14615 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14616 return FALSE;
14617 }
4e617b1e
PB		 14618 else
14619 {
34e77a92 14620 bfd_boolean thumb_stub_p;
bd97cb95 14621
34e77a92
RS		 14622 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14623 if (thumb_stub_p)
4e617b1e 14624 {
7413f23f 14625 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14626 return FALSE;
14627 }
14628#ifdef FOUR_WORD_PLT
7413f23f 14629 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14630 return FALSE;
7413f23f 14631 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14632 return FALSE;
14633#else
906e58ca 14634 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14635 so only need to output a mapping symbol for the first PLT entry and
14636 entries with thumb thunks. */
34e77a92 14637 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14638 {
7413f23f 14639 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14640 return FALSE;
14641 }
14642#endif
14643 }
14644
14645 return TRUE;
14646}
14647
34e77a92
RS		 14648/* Output mapping symbols for PLT entries associated with H. */
14649
14650static bfd_boolean
14651elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14652{
14653 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14654 struct elf32_arm_link_hash_entry *eh;
14655
14656 if (h->root.type == bfd_link_hash_indirect)
14657 return TRUE;
14658
14659 if (h->root.type == bfd_link_hash_warning)
14660 /* When warning symbols are created, they **replace** the "real"
14661 entry in the hash table, thus we never get to see the real
14662 symbol in a hash traversal. So look at it now. */
14663 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14664
14665 eh = (struct elf32_arm_link_hash_entry *) h;
14666 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14667 &h->plt, &eh->plt);
14668}
14669
7413f23f
DJ		 14670/* Output a single local symbol for a generated stub. */
14671
14672static bfd_boolean
14673elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14674 bfd_vma offset, bfd_vma size)
14675{
7413f23f
DJ		 14676 Elf_Internal_Sym sym;
14677
7413f23f
DJ		 14678 sym.st_value = osi->sec->output_section->vma
14679 + osi->sec->output_offset
14680 + offset;
14681 sym.st_size = size;
14682 sym.st_other = 0;
14683 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14684 sym.st_shndx = osi->sec_shndx;
35fc36a8 14685 sym.st_target_internal = 0;
57402f1e 14686 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14687}
4e617b1e 14688
da5938a2 14689static bfd_boolean
8029a119
NC		 14690arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14691 void * in_arg)
da5938a2
NC		 14692{
14693 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14694 asection *stub_sec;
14695 bfd_vma addr;
7413f23f 14696 char *stub_name;
9a008db3 14697 output_arch_syminfo *osi;
d3ce72d0 14698 const insn_sequence *template_sequence;
461a49ca
DJ		 14699 enum stub_insn_type prev_type;
14700 int size;
14701 int i;
14702 enum map_symbol_type sym_type;
da5938a2
NC		 14703
14704 /* Massage our args to the form they really have. */
14705 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14706 osi = (output_arch_syminfo *) in_arg;
da5938a2 14707
da5938a2
NC		 14708 stub_sec = stub_entry->stub_sec;
14709
14710 /* Ensure this stub is attached to the current section being
7413f23f 14711 processed. */
da5938a2
NC		 14712 if (stub_sec != osi->sec)
14713 return TRUE;
14714
7413f23f
DJ		 14715 addr = (bfd_vma) stub_entry->stub_offset;
14716 stub_name = stub_entry->output_name;
da5938a2 14717
d3ce72d0
NC		 14718 template_sequence = stub_entry->stub_template;
14719 switch (template_sequence[0].type)
7413f23f 14720 {
461a49ca
DJ		 14721 case ARM_TYPE:
14722 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14723 return FALSE;
14724 break;
461a49ca 14725 case THUMB16_TYPE:
48229727 14726 case THUMB32_TYPE:
461a49ca
DJ		 14727 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14728 stub_entry->stub_size))
da5938a2
NC		 14729 return FALSE;
14730 break;
14731 default:
14732 BFD_FAIL ();
48229727 14733 return 0;
7413f23f 14734 }
da5938a2 14735
461a49ca
DJ		 14736 prev_type = DATA_TYPE;
14737 size = 0;
14738 for (i = 0; i < stub_entry->stub_template_size; i++)
14739 {
d3ce72d0 14740 switch (template_sequence[i].type)
461a49ca
DJ		 14741 {
14742 case ARM_TYPE:
14743 sym_type = ARM_MAP_ARM;
14744 break;
14745
14746 case THUMB16_TYPE:
48229727 14747 case THUMB32_TYPE:
461a49ca
DJ		 14748 sym_type = ARM_MAP_THUMB;
14749 break;
14750
14751 case DATA_TYPE:
14752 sym_type = ARM_MAP_DATA;
14753 break;
14754
14755 default:
14756 BFD_FAIL ();
4e31c731 14757 return FALSE;
461a49ca
DJ		 14758 }
14759
d3ce72d0 14760 if (template_sequence[i].type != prev_type)
461a49ca 14761 {
d3ce72d0 14762 prev_type = template_sequence[i].type;
461a49ca
DJ		 14763 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14764 return FALSE;
14765 }
14766
d3ce72d0 14767 switch (template_sequence[i].type)
461a49ca
DJ		 14768 {
14769 case ARM_TYPE:
48229727 14770 case THUMB32_TYPE:
461a49ca
DJ		 14771 size += 4;
14772 break;
14773
14774 case THUMB16_TYPE:
14775 size += 2;
14776 break;
14777
14778 case DATA_TYPE:
14779 size += 4;
14780 break;
14781
14782 default:
14783 BFD_FAIL ();
4e31c731 14784 return FALSE;
461a49ca
DJ		 14785 }
14786 }
14787
da5938a2
NC		 14788 return TRUE;
14789}
14790
33811162
DG		 14791/* Output mapping symbols for linker generated sections,
14792 and for those data-only sections that do not have a
14793 $d. */
4e617b1e
PB		 14794
14795static bfd_boolean
14796elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 14797 struct bfd_link_info *info,
57402f1e 14798 void *flaginfo,
6e0b88f1
AM		 14799 int (*func) (void *, const char *,
14800 Elf_Internal_Sym *,
14801 asection *,
14802 struct elf_link_hash_entry *))
4e617b1e
PB		 14803{
14804 output_arch_syminfo osi;
14805 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14806 bfd_vma offset;
14807 bfd_size_type size;
33811162 14808 bfd *input_bfd;
4e617b1e
PB		 14809
14810 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14811 if (htab == NULL)
14812 return FALSE;
14813
906e58ca 14814 check_use_blx (htab);
91a5743d 14815
57402f1e 14816 osi.flaginfo = flaginfo;
4e617b1e
PB		 14817 osi.info = info;
14818 osi.func = func;
906e58ca 14819
33811162
DG		 14820 /* Add a $d mapping symbol to data-only sections that
14821 don't have any mapping symbol. This may result in (harmless) redundant
14822 mapping symbols. */
14823 for (input_bfd = info->input_bfds;
14824 input_bfd != NULL;
14825 input_bfd = input_bfd->link_next)
14826 {
14827 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14828 for (osi.sec = input_bfd->sections;
14829 osi.sec != NULL;
14830 osi.sec = osi.sec->next)
14831 {
14832 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14833 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14834 != 0)
33811162
DG		 14835 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14836 == SEC_HAS_CONTENTS
14837 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14838 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14839 && osi.sec->size > 0
14840 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14841 {
14842 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14843 (output_bfd, osi.sec->output_section);
14844 if (osi.sec_shndx != (int)SHN_BAD)
14845 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14846 }
14847 }
14848 }
14849
91a5743d
PB		 14850 /* ARM->Thumb glue. */
14851 if (htab->arm_glue_size > 0)
14852 {
3d4d4302
AM		 14853 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14854 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 14855
14856 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14857 (output_bfd, osi.sec->output_section);
14858 if (info->shared || htab->root.is_relocatable_executable
14859 || htab->pic_veneer)
14860 size = ARM2THUMB_PIC_GLUE_SIZE;
14861 else if (htab->use_blx)
14862 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14863 else
14864 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14865
91a5743d
PB		 14866 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14867 {
7413f23f
DJ		 14868 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14869 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14870 }
14871 }
14872
14873 /* Thumb->ARM glue. */
14874 if (htab->thumb_glue_size > 0)
14875 {
3d4d4302
AM		 14876 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14877 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 14878
14879 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14880 (output_bfd, osi.sec->output_section);
14881 size = THUMB2ARM_GLUE_SIZE;
14882
14883 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14884 {
7413f23f
DJ		 14885 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14886 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14887 }
14888 }
14889
845b51d6
PB		 14890 /* ARMv4 BX veneers. */
14891 if (htab->bx_glue_size > 0)
14892 {
3d4d4302
AM		 14893 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14894 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 14895
14896 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14897 (output_bfd, osi.sec->output_section);
14898
7413f23f 14899 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14900 }
14901
8029a119
NC		 14902 /* Long calls stubs. */
14903 if (htab->stub_bfd && htab->stub_bfd->sections)
14904 {
da5938a2 14905 asection* stub_sec;
8029a119 14906
da5938a2
NC		 14907 for (stub_sec = htab->stub_bfd->sections;
14908 stub_sec != NULL;
8029a119
NC		 14909 stub_sec = stub_sec->next)
14910 {
14911 /* Ignore non-stub sections. */
14912 if (!strstr (stub_sec->name, STUB_SUFFIX))
14913 continue;
da5938a2 14914
8029a119 14915 osi.sec = stub_sec;
da5938a2 14916
8029a119
NC		 14917 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14918 (output_bfd, osi.sec->output_section);
da5938a2 14919
8029a119
NC		 14920 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14921 }
14922 }
da5938a2 14923
91a5743d 14924 /* Finally, output mapping symbols for the PLT. */
34e77a92 14925 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 14926 {
34e77a92
RS		 14927 osi.sec = htab->root.splt;
14928 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14929 (output_bfd, osi.sec->output_section));
14930
14931 /* Output mapping symbols for the plt header. SymbianOS does not have a
14932 plt header. */
14933 if (htab->vxworks_p)
14934 {
14935 /* VxWorks shared libraries have no PLT header. */
14936 if (!info->shared)
14937 {
14938 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14939 return FALSE;
14940 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14941 return FALSE;
14942 }
14943 }
b38cadfb
NC		 14944 else if (htab->nacl_p)
14945 {
14946 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14947 return FALSE;
14948 }
34e77a92 14949 else if (!htab->symbian_p)
4e617b1e 14950 {
7413f23f 14951 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 14952 return FALSE;
34e77a92
RS		 14953#ifndef FOUR_WORD_PLT
14954 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 14955 return FALSE;
34e77a92 14956#endif
4e617b1e
PB		 14957 }
14958 }
34e77a92
RS		 14959 if ((htab->root.splt && htab->root.splt->size > 0)
14960 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 14961 {
34e77a92
RS		 14962 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14963 for (input_bfd = info->input_bfds;
14964 input_bfd != NULL;
14965 input_bfd = input_bfd->link_next)
14966 {
14967 struct arm_local_iplt_info **local_iplt;
14968 unsigned int i, num_syms;
4e617b1e 14969
34e77a92
RS		 14970 local_iplt = elf32_arm_local_iplt (input_bfd);
14971 if (local_iplt != NULL)
14972 {
14973 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14974 for (i = 0; i < num_syms; i++)
14975 if (local_iplt[i] != NULL
14976 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14977 &local_iplt[i]->root,
14978 &local_iplt[i]->arm))
14979 return FALSE;
14980 }
14981 }
14982 }
0855e32b
NS		 14983 if (htab->dt_tlsdesc_plt != 0)
14984 {
14985 /* Mapping symbols for the lazy tls trampoline. */
14986 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14987 return FALSE;
b38cadfb 14988
0855e32b
NS		 14989 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14990 htab->dt_tlsdesc_plt + 24))
14991 return FALSE;
14992 }
14993 if (htab->tls_trampoline != 0)
14994 {
14995 /* Mapping symbols for the tls trampoline. */
14996 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14997 return FALSE;
14998#ifdef FOUR_WORD_PLT
14999 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15000 htab->tls_trampoline + 12))
15001 return FALSE;
b38cadfb 15002#endif
0855e32b 15003 }
b38cadfb 15004
4e617b1e
PB		 15005 return TRUE;
15006}
15007
e489d0ae
PB		 15008/* Allocate target specific section data. */
15009
15010static bfd_boolean
15011elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15012{
f592407e
AM		 15013 if (!sec->used_by_bfd)
15014 {
15015 _arm_elf_section_data *sdata;
15016 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15017
21d799b5 15018 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15019 if (sdata == NULL)
15020 return FALSE;
15021 sec->used_by_bfd = sdata;
15022 }
e489d0ae
PB		 15023
15024 return _bfd_elf_new_section_hook (abfd, sec);
15025}
15026
15027
15028/* Used to order a list of mapping symbols by address. */
15029
15030static int
15031elf32_arm_compare_mapping (const void * a, const void * b)
15032{
7f6a71ff
JM		 15033 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15034 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15035
15036 if (amap->vma > bmap->vma)
15037 return 1;
15038 else if (amap->vma < bmap->vma)
15039 return -1;
15040 else if (amap->type > bmap->type)
15041 /* Ensure results do not depend on the host qsort for objects with
15042 multiple mapping symbols at the same address by sorting on type
15043 after vma. */
15044 return 1;
15045 else if (amap->type < bmap->type)
15046 return -1;
15047 else
15048 return 0;
e489d0ae
PB		 15049}
15050
2468f9c9
PB		 15051/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15052
15053static unsigned long
15054offset_prel31 (unsigned long addr, bfd_vma offset)
15055{
15056 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15057}
15058
15059/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15060 relocations. */
15061
15062static void
15063copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15064{
15065 unsigned long first_word = bfd_get_32 (output_bfd, from);
15066 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15067
2468f9c9
PB		 15068 /* High bit of first word is supposed to be zero. */
15069 if ((first_word & 0x80000000ul) == 0)
15070 first_word = offset_prel31 (first_word, offset);
b38cadfb 15071
2468f9c9
PB		 15072 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15073 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15074 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15075 second_word = offset_prel31 (second_word, offset);
b38cadfb 15076
2468f9c9
PB		 15077 bfd_put_32 (output_bfd, first_word, to);
15078 bfd_put_32 (output_bfd, second_word, to + 4);
15079}
e489d0ae 15080
48229727
JB		 15081/* Data for make_branch_to_a8_stub(). */
15082
b38cadfb
NC		 15083struct a8_branch_to_stub_data
15084{
48229727
JB		 15085 asection *writing_section;
15086 bfd_byte *contents;
15087};
15088
15089
15090/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15091 places for a particular section. */
15092
15093static bfd_boolean
15094make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15095 void *in_arg)
15096{
15097 struct elf32_arm_stub_hash_entry *stub_entry;
15098 struct a8_branch_to_stub_data *data;
15099 bfd_byte *contents;
15100 unsigned long branch_insn;
15101 bfd_vma veneered_insn_loc, veneer_entry_loc;
15102 bfd_signed_vma branch_offset;
15103 bfd *abfd;
91d6fa6a 15104 unsigned int target;
48229727
JB		 15105
15106 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15107 data = (struct a8_branch_to_stub_data *) in_arg;
15108
15109 if (stub_entry->target_section != data->writing_section
4563a860 15110 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15111 return TRUE;
15112
15113 contents = data->contents;
15114
15115 veneered_insn_loc = stub_entry->target_section->output_section->vma
15116 + stub_entry->target_section->output_offset
15117 + stub_entry->target_value;
15118
15119 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15120 + stub_entry->stub_sec->output_offset
15121 + stub_entry->stub_offset;
15122
15123 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15124 veneered_insn_loc &= ~3u;
15125
15126 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15127
15128 abfd = stub_entry->target_section->owner;
91d6fa6a 15129 target = stub_entry->target_value;
48229727
JB		 15130
15131 /* We attempt to avoid this condition by setting stubs_always_after_branch
15132 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15133 This check is just to be on the safe side... */
15134 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15135 {
15136 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15137 "allocated in unsafe location"), abfd);
15138 return FALSE;
15139 }
15140
15141 switch (stub_entry->stub_type)
15142 {
15143 case arm_stub_a8_veneer_b:
15144 case arm_stub_a8_veneer_b_cond:
15145 branch_insn = 0xf0009000;
15146 goto jump24;
15147
15148 case arm_stub_a8_veneer_blx:
15149 branch_insn = 0xf000e800;
15150 goto jump24;
15151
15152 case arm_stub_a8_veneer_bl:
15153 {
15154 unsigned int i1, j1, i2, j2, s;
15155
15156 branch_insn = 0xf000d000;
15157
15158 jump24:
15159 if (branch_offset < -16777216 || branch_offset > 16777214)
15160 {
15161 /* There's not much we can do apart from complain if this
15162 happens. */
15163 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15164 "of range (input file too large)"), abfd);
15165 return FALSE;
15166 }
15167
15168 /* i1 = not(j1 eor s), so:
15169 not i1 = j1 eor s
15170 j1 = (not i1) eor s. */
15171
15172 branch_insn |= (branch_offset >> 1) & 0x7ff;
15173 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15174 i2 = (branch_offset >> 22) & 1;
15175 i1 = (branch_offset >> 23) & 1;
15176 s = (branch_offset >> 24) & 1;
15177 j1 = (!i1) ^ s;
15178 j2 = (!i2) ^ s;
15179 branch_insn |= j2 << 11;
15180 branch_insn |= j1 << 13;
15181 branch_insn |= s << 26;
15182 }
15183 break;
15184
15185 default:
15186 BFD_FAIL ();
15187 return FALSE;
15188 }
15189
91d6fa6a
NC		 15190 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15191 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15192
15193 return TRUE;
15194}
15195
e489d0ae
PB		 15196/* Do code byteswapping. Return FALSE afterwards so that the section is
15197 written out as normal. */
15198
15199static bfd_boolean
c7b8f16e 15200elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15201 struct bfd_link_info *link_info,
15202 asection *sec,
e489d0ae
PB		 15203 bfd_byte *contents)
15204{
48229727 15205 unsigned int mapcount, errcount;
8e3de13a 15206 _arm_elf_section_data *arm_data;
c7b8f16e 15207 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15208 elf32_arm_section_map *map;
c7b8f16e 15209 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15210 bfd_vma ptr;
15211 bfd_vma end;
c7b8f16e 15212 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15213 bfd_byte tmp;
48229727 15214 unsigned int i;
57e8b36a 15215
4dfe6ac6
NC		 15216 if (globals == NULL)
15217 return FALSE;
15218
8e3de13a
NC		 15219 /* If this section has not been allocated an _arm_elf_section_data
15220 structure then we cannot record anything. */
15221 arm_data = get_arm_elf_section_data (sec);
15222 if (arm_data == NULL)
15223 return FALSE;
15224
15225 mapcount = arm_data->mapcount;
15226 map = arm_data->map;
c7b8f16e
JB		 15227 errcount = arm_data->erratumcount;
15228
15229 if (errcount != 0)
15230 {
15231 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15232
15233 for (errnode = arm_data->erratumlist; errnode != 0;
15234 errnode = errnode->next)
15235 {
91d6fa6a 15236 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 15237
15238 switch (errnode->type)
15239 {
15240 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15241 {
15242 bfd_vma branch_to_veneer;
15243 /* Original condition code of instruction, plus bit mask for
15244 ARM B instruction. */
15245 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15246 | 0x0a000000;
15247
15248 /* The instruction is before the label. */
91d6fa6a 15249 target -= 4;
c7b8f16e
JB		 15250
15251 /* Above offset included in -4 below. */
15252 branch_to_veneer = errnode->u.b.veneer->vma
15253 - errnode->vma - 4;
15254
15255 if ((signed) branch_to_veneer < -(1 << 25)
15256 || (signed) branch_to_veneer >= (1 << 25))
15257 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15258 "range"), output_bfd);
15259
15260 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 15261 contents[endianflip ^ target] = insn & 0xff;
15262 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15263 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15264 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15265 }
15266 break;
15267
15268 case VFP11_ERRATUM_ARM_VENEER:
15269 {
15270 bfd_vma branch_from_veneer;
15271 unsigned int insn;
15272
15273 /* Take size of veneer into account. */
15274 branch_from_veneer = errnode->u.v.branch->vma
15275 - errnode->vma - 12;
15276
15277 if ((signed) branch_from_veneer < -(1 << 25)
15278 || (signed) branch_from_veneer >= (1 << 25))
15279 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15280 "range"), output_bfd);
15281
15282 /* Original instruction. */
15283 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 15284 contents[endianflip ^ target] = insn & 0xff;
15285 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15286 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15287 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15288
15289 /* Branch back to insn after original insn. */
15290 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 15291 contents[endianflip ^ (target + 4)] = insn & 0xff;
15292 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15293 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15294 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15295 }
15296 break;
15297
15298 default:
15299 abort ();
15300 }
15301 }
15302 }
e489d0ae 15303
2468f9c9
PB		 15304 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15305 {
15306 arm_unwind_table_edit *edit_node
15307 = arm_data->u.exidx.unwind_edit_list;
15308 /* Now, sec->size is the size of the section we will write. The original
15309 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15310 markers) was sec->rawsize. (This isn't the case if we perform no
15311 edits, then rawsize will be zero and we should use size). */
21d799b5 15312 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15313 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15314 unsigned int in_index, out_index;
15315 bfd_vma add_to_offsets = 0;
15316
15317 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15318 {
15319 if (edit_node)
15320 {
15321 unsigned int edit_index = edit_node->index;
b38cadfb 15322
2468f9c9
PB		 15323 if (in_index < edit_index && in_index * 8 < input_size)
15324 {
15325 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15326 contents + in_index * 8, add_to_offsets);
15327 out_index++;
15328 in_index++;
15329 }
15330 else if (in_index == edit_index
15331 || (in_index * 8 >= input_size
15332 && edit_index == UINT_MAX))
15333 {
15334 switch (edit_node->type)
15335 {
15336 case DELETE_EXIDX_ENTRY:
15337 in_index++;
15338 add_to_offsets += 8;
15339 break;
b38cadfb 15340
2468f9c9
PB		 15341 case INSERT_EXIDX_CANTUNWIND_AT_END:
15342 {
15343 asection *text_sec = edit_node->linked_section;
15344 bfd_vma text_offset = text_sec->output_section->vma
15345 + text_sec->output_offset
15346 + text_sec->size;
15347 bfd_vma exidx_offset = offset + out_index * 8;
15348 unsigned long prel31_offset;
15349
15350 /* Note: this is meant to be equivalent to an
15351 R_ARM_PREL31 relocation. These synthetic
15352 EXIDX_CANTUNWIND markers are not relocated by the
15353 usual BFD method. */
15354 prel31_offset = (text_offset - exidx_offset)
15355 & 0x7ffffffful;
15356
15357 /* First address we can't unwind. */
15358 bfd_put_32 (output_bfd, prel31_offset,
15359 &edited_contents[out_index * 8]);
15360
15361 /* Code for EXIDX_CANTUNWIND. */
15362 bfd_put_32 (output_bfd, 0x1,
15363 &edited_contents[out_index * 8 + 4]);
15364
15365 out_index++;
15366 add_to_offsets -= 8;
15367 }
15368 break;
15369 }
b38cadfb 15370
2468f9c9
PB		 15371 edit_node = edit_node->next;
15372 }
15373 }
15374 else
15375 {
15376 /* No more edits, copy remaining entries verbatim. */
15377 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15378 contents + in_index * 8, add_to_offsets);
15379 out_index++;
15380 in_index++;
15381 }
15382 }
15383
15384 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15385 bfd_set_section_contents (output_bfd, sec->output_section,
15386 edited_contents,
15387 (file_ptr) sec->output_offset, sec->size);
15388
15389 return TRUE;
15390 }
15391
48229727
JB		 15392 /* Fix code to point to Cortex-A8 erratum stubs. */
15393 if (globals->fix_cortex_a8)
15394 {
15395 struct a8_branch_to_stub_data data;
15396
15397 data.writing_section = sec;
15398 data.contents = contents;
15399
15400 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15401 &data);
15402 }
15403
e489d0ae
PB		 15404 if (mapcount == 0)
15405 return FALSE;
15406
c7b8f16e 15407 if (globals->byteswap_code)
e489d0ae 15408 {
c7b8f16e 15409 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15410
c7b8f16e
JB		 15411 ptr = map[0].vma;
15412 for (i = 0; i < mapcount; i++)
15413 {
15414 if (i == mapcount - 1)
15415 end = sec->size;
15416 else
15417 end = map[i + 1].vma;
e489d0ae 15418
c7b8f16e 15419 switch (map[i].type)
e489d0ae 15420 {
c7b8f16e
JB		 15421 case 'a':
15422 /* Byte swap code words. */
15423 while (ptr + 3 < end)
15424 {
15425 tmp = contents[ptr];
15426 contents[ptr] = contents[ptr + 3];
15427 contents[ptr + 3] = tmp;
15428 tmp = contents[ptr + 1];
15429 contents[ptr + 1] = contents[ptr + 2];
15430 contents[ptr + 2] = tmp;
15431 ptr += 4;
15432 }
15433 break;
e489d0ae 15434
c7b8f16e
JB		 15435 case 't':
15436 /* Byte swap code halfwords. */
15437 while (ptr + 1 < end)
15438 {
15439 tmp = contents[ptr];
15440 contents[ptr] = contents[ptr + 1];
15441 contents[ptr + 1] = tmp;
15442 ptr += 2;
15443 }
15444 break;
15445
15446 case 'd':
15447 /* Leave data alone. */
15448 break;
15449 }
15450 ptr = end;
15451 }
e489d0ae 15452 }
8e3de13a 15453
93204d3a 15454 free (map);
47b2e99c 15455 arm_data->mapcount = -1;
c7b8f16e 15456 arm_data->mapsize = 0;
8e3de13a 15457 arm_data->map = NULL;
8e3de13a 15458
e489d0ae
PB		 15459 return FALSE;
15460}
15461
0beaef2b
PB		 15462/* Mangle thumb function symbols as we read them in. */
15463
8384fb8f 15464static bfd_boolean
0beaef2b
PB		 15465elf32_arm_swap_symbol_in (bfd * abfd,
15466 const void *psrc,
15467 const void *pshn,
15468 Elf_Internal_Sym *dst)
15469{
8384fb8f
AM		 15470 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15471 return FALSE;
0beaef2b
PB		 15472
15473 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15474 the address. */
63e1a0fc
PB		 15475 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15476 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15477 {
63e1a0fc
PB		 15478 if (dst->st_value & 1)
15479 {
15480 dst->st_value &= ~(bfd_vma) 1;
15481 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15482 }
15483 else
15484 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15485 }
15486 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15487 {
15488 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15489 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15490 }
35fc36a8
RS		 15491 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15492 dst->st_target_internal = ST_BRANCH_LONG;
15493 else
63e1a0fc 15494 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15495
8384fb8f 15496 return TRUE;
0beaef2b
PB		 15497}
15498
15499
15500/* Mangle thumb function symbols as we write them out. */
15501
15502static void
15503elf32_arm_swap_symbol_out (bfd *abfd,
15504 const Elf_Internal_Sym *src,
15505 void *cdst,
15506 void *shndx)
15507{
15508 Elf_Internal_Sym newsym;
15509
15510 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15511 of the address set, as per the new EABI. We do this unconditionally
15512 because objcopy does not set the elf header flags until after
15513 it writes out the symbol table. */
35fc36a8 15514 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15515 {
15516 newsym = *src;
34e77a92
RS		 15517 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15518 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 15519 if (newsym.st_shndx != SHN_UNDEF)
15520 {
15521 /* Do this only for defined symbols. At link type, the static
15522 linker will simulate the work of dynamic linker of resolving
15523 symbols and will carry over the thumbness of found symbols to
15524 the output symbol table. It's not clear how it happens, but
b0fead2b 15525 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 15526 runtime, and writing '1' for them will be confusing for users
15527 and possibly for dynamic linker itself.
15528 */
15529 newsym.st_value |= 1;
15530 }
906e58ca 15531
0beaef2b
PB		 15532 src = &newsym;
15533 }
15534 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15535}
15536
b294bdf8
MM		 15537/* Add the PT_ARM_EXIDX program header. */
15538
15539static bfd_boolean
906e58ca 15540elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15541 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15542{
15543 struct elf_segment_map *m;
15544 asection *sec;
15545
15546 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15547 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15548 {
15549 /* If there is already a PT_ARM_EXIDX header, then we do not
15550 want to add another one. This situation arises when running
15551 "strip"; the input binary already has the header. */
12bd6957 15552 m = elf_seg_map (abfd);
b294bdf8
MM		 15553 while (m && m->p_type != PT_ARM_EXIDX)
15554 m = m->next;
15555 if (!m)
15556 {
21d799b5
NC		 15557 m = (struct elf_segment_map *)
15558 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15559 if (m == NULL)
15560 return FALSE;
15561 m->p_type = PT_ARM_EXIDX;
15562 m->count = 1;
15563 m->sections[0] = sec;
15564
12bd6957
AM		 15565 m->next = elf_seg_map (abfd);
15566 elf_seg_map (abfd) = m;
b294bdf8
MM		 15567 }
15568 }
15569
15570 return TRUE;
15571}
15572
15573/* We may add a PT_ARM_EXIDX program header. */
15574
15575static int
a6b96beb
AM		 15576elf32_arm_additional_program_headers (bfd *abfd,
15577 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15578{
15579 asection *sec;
15580
15581 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15582 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15583 return 1;
15584 else
15585 return 0;
15586}
15587
34e77a92
RS		 15588/* Hook called by the linker routine which adds symbols from an object
15589 file. */
15590
15591static bfd_boolean
15592elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15593 Elf_Internal_Sym *sym, const char **namep,
15594 flagword *flagsp, asection **secp, bfd_vma *valp)
15595{
15596 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15597 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15598 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15599 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15600
15601 if (elf32_arm_hash_table (info)->vxworks_p
15602 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15603 flagsp, secp, valp))
15604 return FALSE;
15605
15606 return TRUE;
15607}
15608
0beaef2b 15609/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15610const struct elf_size_info elf32_arm_size_info =
15611{
0beaef2b
PB		 15612 sizeof (Elf32_External_Ehdr),
15613 sizeof (Elf32_External_Phdr),
15614 sizeof (Elf32_External_Shdr),
15615 sizeof (Elf32_External_Rel),
15616 sizeof (Elf32_External_Rela),
15617 sizeof (Elf32_External_Sym),
15618 sizeof (Elf32_External_Dyn),
15619 sizeof (Elf_External_Note),
15620 4,
15621 1,
15622 32, 2,
15623 ELFCLASS32, EV_CURRENT,
15624 bfd_elf32_write_out_phdrs,
15625 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15626 bfd_elf32_checksum_contents,
0beaef2b
PB		 15627 bfd_elf32_write_relocs,
15628 elf32_arm_swap_symbol_in,
15629 elf32_arm_swap_symbol_out,
15630 bfd_elf32_slurp_reloc_table,
15631 bfd_elf32_slurp_symbol_table,
15632 bfd_elf32_swap_dyn_in,
15633 bfd_elf32_swap_dyn_out,
15634 bfd_elf32_swap_reloc_in,
15635 bfd_elf32_swap_reloc_out,
15636 bfd_elf32_swap_reloca_in,
15637 bfd_elf32_swap_reloca_out
15638};
15639
252b5132 15640#define ELF_ARCH bfd_arch_arm
ae95ffa6 15641#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15642#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15643#ifdef __QNXTARGET__
15644#define ELF_MAXPAGESIZE 0x1000
15645#else
f21f3fe0 15646#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15647#endif
b1342370 15648#define ELF_MINPAGESIZE 0x1000
24718e3b 15649#define ELF_COMMONPAGESIZE 0x1000
252b5132 15650
ba93b8ac
DJ		 15651#define bfd_elf32_mkobject elf32_arm_mkobject
15652
99e4ae17
AJ		 15653#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15654#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15655#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15656#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15657#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15658#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15659#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 15660#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15661#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15662#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15663#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15664#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15665#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15666
15667#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15668#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15669#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15670#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15671#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15672#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15673#define elf_backend_write_section elf32_arm_write_section
252b5132 15674#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15675#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15676#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15677#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15678#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15679#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15680#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15681#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15682#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15683#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15684#define elf_backend_fake_sections elf32_arm_fake_sections
15685#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15686#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15687#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15688#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15689#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15690#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15691#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15692#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15693#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15694
15695#define elf_backend_can_refcount 1
15696#define elf_backend_can_gc_sections 1
15697#define elf_backend_plt_readonly 1
15698#define elf_backend_want_got_plt 1
15699#define elf_backend_want_plt_sym 0
15700#define elf_backend_may_use_rel_p 1
15701#define elf_backend_may_use_rela_p 0
4e7fd91e 15702#define elf_backend_default_use_rela_p 0
252b5132 15703
04f7c78d 15704#define elf_backend_got_header_size 12
04f7c78d 15705
906e58ca
NC		 15706#undef elf_backend_obj_attrs_vendor
15707#define elf_backend_obj_attrs_vendor "aeabi"
15708#undef elf_backend_obj_attrs_section
15709#define elf_backend_obj_attrs_section ".ARM.attributes"
15710#undef elf_backend_obj_attrs_arg_type
15711#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15712#undef elf_backend_obj_attrs_section_type
104d59d1 15713#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 15714#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15715#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15716
252b5132 15717#include "elf32-target.h"
7f266840 15718
b38cadfb
NC		 15719/* Native Client targets. */
15720
15721#undef TARGET_LITTLE_SYM
15722#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15723#undef TARGET_LITTLE_NAME
15724#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15725#undef TARGET_BIG_SYM
15726#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15727#undef TARGET_BIG_NAME
15728#define TARGET_BIG_NAME "elf32-bigarm-nacl"
15729
15730/* Like elf32_arm_link_hash_table_create -- but overrides
15731 appropriately for NaCl. */
15732
15733static struct bfd_link_hash_table *
15734elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15735{
15736 struct bfd_link_hash_table *ret;
15737
15738 ret = elf32_arm_link_hash_table_create (abfd);
15739 if (ret)
15740 {
15741 struct elf32_arm_link_hash_table *htab
15742 = (struct elf32_arm_link_hash_table *) ret;
15743
15744 htab->nacl_p = 1;
15745
15746 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15747 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15748 }
15749 return ret;
15750}
15751
15752/* Since NaCl doesn't use the ARM-specific unwind format, we don't
15753 really need to use elf32_arm_modify_segment_map. But we do it
15754 anyway just to reduce gratuitous differences with the stock ARM backend. */
15755
15756static bfd_boolean
15757elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15758{
15759 return (elf32_arm_modify_segment_map (abfd, info)
15760 && nacl_modify_segment_map (abfd, info));
15761}
15762
15763#undef elf32_bed
15764#define elf32_bed elf32_arm_nacl_bed
15765#undef bfd_elf32_bfd_link_hash_table_create
15766#define bfd_elf32_bfd_link_hash_table_create \
15767 elf32_arm_nacl_link_hash_table_create
15768#undef elf_backend_plt_alignment
15769#define elf_backend_plt_alignment 4
15770#undef elf_backend_modify_segment_map
15771#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15772#undef elf_backend_modify_program_headers
15773#define elf_backend_modify_program_headers nacl_modify_program_headers
15774
15775#undef ELF_MAXPAGESIZE
15776#define ELF_MAXPAGESIZE 0x10000
15777
15778#include "elf32-target.h"
15779
15780/* Reset to defaults. */
15781#undef elf_backend_plt_alignment
15782#undef elf_backend_modify_segment_map
15783#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15784#undef elf_backend_modify_program_headers
15785
906e58ca 15786/* VxWorks Targets. */
4e7fd91e 15787
906e58ca 15788#undef TARGET_LITTLE_SYM
4e7fd91e 15789#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15790#undef TARGET_LITTLE_NAME
4e7fd91e 15791#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15792#undef TARGET_BIG_SYM
4e7fd91e 15793#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15794#undef TARGET_BIG_NAME
4e7fd91e
PB		 15795#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15796
15797/* Like elf32_arm_link_hash_table_create -- but overrides
15798 appropriately for VxWorks. */
906e58ca 15799
4e7fd91e
PB		 15800static struct bfd_link_hash_table *
15801elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15802{
15803 struct bfd_link_hash_table *ret;
15804
15805 ret = elf32_arm_link_hash_table_create (abfd);
15806 if (ret)
15807 {
15808 struct elf32_arm_link_hash_table *htab
00a97672 15809 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15810 htab->use_rel = 0;
00a97672 15811 htab->vxworks_p = 1;
4e7fd91e
PB		 15812 }
15813 return ret;
906e58ca 15814}
4e7fd91e 15815
00a97672
RS		 15816static void
15817elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15818{
15819 elf32_arm_final_write_processing (abfd, linker);
15820 elf_vxworks_final_write_processing (abfd, linker);
15821}
15822
906e58ca 15823#undef elf32_bed
4e7fd91e
PB		 15824#define elf32_bed elf32_arm_vxworks_bed
15825
906e58ca
NC		 15826#undef bfd_elf32_bfd_link_hash_table_create
15827#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15828#undef elf_backend_final_write_processing
15829#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15830#undef elf_backend_emit_relocs
15831#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15832
906e58ca 15833#undef elf_backend_may_use_rel_p
00a97672 15834#define elf_backend_may_use_rel_p 0
906e58ca 15835#undef elf_backend_may_use_rela_p
00a97672 15836#define elf_backend_may_use_rela_p 1
906e58ca 15837#undef elf_backend_default_use_rela_p
00a97672 15838#define elf_backend_default_use_rela_p 1
906e58ca 15839#undef elf_backend_want_plt_sym
00a97672 15840#define elf_backend_want_plt_sym 1
906e58ca 15841#undef ELF_MAXPAGESIZE
00a97672 15842#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15843
15844#include "elf32-target.h"
15845
15846
21d799b5
NC		 15847/* Merge backend specific data from an object file to the output
15848 object file when linking. */
15849
15850static bfd_boolean
15851elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15852{
15853 flagword out_flags;
15854 flagword in_flags;
15855 bfd_boolean flags_compatible = TRUE;
15856 asection *sec;
15857
cc643b88 15858 /* Check if we have the same endianness. */
21d799b5
NC		 15859 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15860 return FALSE;
15861
15862 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15863 return TRUE;
15864
15865 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15866 return FALSE;
15867
15868 /* The input BFD must have had its flags initialised. */
15869 /* The following seems bogus to me -- The flags are initialized in
15870 the assembler but I don't think an elf_flags_init field is
15871 written into the object. */
15872 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15873
15874 in_flags = elf_elfheader (ibfd)->e_flags;
15875 out_flags = elf_elfheader (obfd)->e_flags;
15876
15877 /* In theory there is no reason why we couldn't handle this. However
15878 in practice it isn't even close to working and there is no real
15879 reason to want it. */
15880 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15881 && !(ibfd->flags & DYNAMIC)
15882 && (in_flags & EF_ARM_BE8))
15883 {
15884 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15885 ibfd);
15886 return FALSE;
15887 }
15888
15889 if (!elf_flags_init (obfd))
15890 {
15891 /* If the input is the default architecture and had the default
15892 flags then do not bother setting the flags for the output
15893 architecture, instead allow future merges to do this. If no
15894 future merges ever set these flags then they will retain their
15895 uninitialised values, which surprise surprise, correspond
15896 to the default values. */
15897 if (bfd_get_arch_info (ibfd)->the_default
15898 && elf_elfheader (ibfd)->e_flags == 0)
15899 return TRUE;
15900
15901 elf_flags_init (obfd) = TRUE;
15902 elf_elfheader (obfd)->e_flags = in_flags;
15903
15904 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15905 && bfd_get_arch_info (obfd)->the_default)
15906 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15907
15908 return TRUE;
15909 }
15910
15911 /* Determine what should happen if the input ARM architecture
15912 does not match the output ARM architecture. */
15913 if (! bfd_arm_merge_machines (ibfd, obfd))
15914 return FALSE;
15915
15916 /* Identical flags must be compatible. */
15917 if (in_flags == out_flags)
15918 return TRUE;
15919
15920 /* Check to see if the input BFD actually contains any sections. If
15921 not, its flags may not have been initialised either, but it
15922 cannot actually cause any incompatiblity. Do not short-circuit
15923 dynamic objects; their section list may be emptied by
15924 elf_link_add_object_symbols.
15925
15926 Also check to see if there are no code sections in the input.
15927 In this case there is no need to check for code specific flags.
15928 XXX - do we need to worry about floating-point format compatability
15929 in data sections ? */
15930 if (!(ibfd->flags & DYNAMIC))
15931 {
15932 bfd_boolean null_input_bfd = TRUE;
15933 bfd_boolean only_data_sections = TRUE;
15934
15935 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15936 {
15937 /* Ignore synthetic glue sections. */
15938 if (strcmp (sec->name, ".glue_7")
15939 && strcmp (sec->name, ".glue_7t"))
15940 {
15941 if ((bfd_get_section_flags (ibfd, sec)
15942 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15943 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15944 only_data_sections = FALSE;
15945
15946 null_input_bfd = FALSE;
15947 break;
15948 }
15949 }
15950
15951 if (null_input_bfd || only_data_sections)
15952 return TRUE;
15953 }
15954
15955 /* Complain about various flag mismatches. */
15956 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15957 EF_ARM_EABI_VERSION (out_flags)))
15958 {
15959 _bfd_error_handler
15960 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15961 ibfd, obfd,
15962 (in_flags & EF_ARM_EABIMASK) >> 24,
15963 (out_flags & EF_ARM_EABIMASK) >> 24);
15964 return FALSE;
15965 }
15966
15967 /* Not sure what needs to be checked for EABI versions >= 1. */
15968 /* VxWorks libraries do not use these flags. */
15969 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15970 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15971 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15972 {
15973 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15974 {
15975 _bfd_error_handler
15976 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15977 ibfd, obfd,
15978 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15979 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15980 flags_compatible = FALSE;
15981 }
15982
15983 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15984 {
15985 if (in_flags & EF_ARM_APCS_FLOAT)
15986 _bfd_error_handler
15987 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15988 ibfd, obfd);
15989 else
15990 _bfd_error_handler
15991 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15992 ibfd, obfd);
15993
15994 flags_compatible = FALSE;
15995 }
15996
15997 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15998 {
15999 if (in_flags & EF_ARM_VFP_FLOAT)
16000 _bfd_error_handler
16001 (_("error: %B uses VFP instructions, whereas %B does not"),
16002 ibfd, obfd);
16003 else
16004 _bfd_error_handler
16005 (_("error: %B uses FPA instructions, whereas %B does not"),
16006 ibfd, obfd);
16007
16008 flags_compatible = FALSE;
16009 }
16010
16011 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16012 {
16013 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16014 _bfd_error_handler
16015 (_("error: %B uses Maverick instructions, whereas %B does not"),
16016 ibfd, obfd);
16017 else
16018 _bfd_error_handler
16019 (_("error: %B does not use Maverick instructions, whereas %B does"),
16020 ibfd, obfd);
16021
16022 flags_compatible = FALSE;
16023 }
16024
16025#ifdef EF_ARM_SOFT_FLOAT
16026 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16027 {
16028 /* We can allow interworking between code that is VFP format
16029 layout, and uses either soft float or integer regs for
16030 passing floating point arguments and results. We already
16031 know that the APCS_FLOAT flags match; similarly for VFP
16032 flags. */
16033 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16034 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16035 {
16036 if (in_flags & EF_ARM_SOFT_FLOAT)
16037 _bfd_error_handler
16038 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16039 ibfd, obfd);
16040 else
16041 _bfd_error_handler
16042 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16043 ibfd, obfd);
16044
16045 flags_compatible = FALSE;
16046 }
16047 }
16048#endif
16049
16050 /* Interworking mismatch is only a warning. */
16051 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16052 {
16053 if (in_flags & EF_ARM_INTERWORK)
16054 {
16055 _bfd_error_handler
16056 (_("Warning: %B supports interworking, whereas %B does not"),
16057 ibfd, obfd);
16058 }
16059 else
16060 {
16061 _bfd_error_handler
16062 (_("Warning: %B does not support interworking, whereas %B does"),
16063 ibfd, obfd);
16064 }
16065 }
16066 }
16067
16068 return flags_compatible;
16069}
16070
16071
906e58ca 16072/* Symbian OS Targets. */
7f266840 16073
906e58ca 16074#undef TARGET_LITTLE_SYM
7f266840 16075#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 16076#undef TARGET_LITTLE_NAME
7f266840 16077#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16078#undef TARGET_BIG_SYM
7f266840 16079#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 16080#undef TARGET_BIG_NAME
7f266840
DJ		 16081#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16082
16083/* Like elf32_arm_link_hash_table_create -- but overrides
16084 appropriately for Symbian OS. */
906e58ca 16085
7f266840
DJ		 16086static struct bfd_link_hash_table *
16087elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16088{
16089 struct bfd_link_hash_table *ret;
16090
16091 ret = elf32_arm_link_hash_table_create (abfd);
16092 if (ret)
16093 {
16094 struct elf32_arm_link_hash_table *htab
16095 = (struct elf32_arm_link_hash_table *)ret;
16096 /* There is no PLT header for Symbian OS. */
16097 htab->plt_header_size = 0;
95720a86
DJ		 16098 /* The PLT entries are each one instruction and one word. */
16099 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16100 htab->symbian_p = 1;
33bfe774
JB		 16101 /* Symbian uses armv5t or above, so use_blx is always true. */
16102 htab->use_blx = 1;
67687978 16103 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16104 }
16105 return ret;
906e58ca 16106}
7f266840 16107
b35d266b 16108static const struct bfd_elf_special_section
551b43fd 16109elf32_arm_symbian_special_sections[] =
7f266840 16110{
5cd3778d
MM		 16111 /* In a BPABI executable, the dynamic linking sections do not go in
16112 the loadable read-only segment. The post-linker may wish to
16113 refer to these sections, but they are not part of the final
16114 program image. */
0112cd26
NC		 16115 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16116 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16117 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16118 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16119 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16120 /* These sections do not need to be writable as the SymbianOS
16121 postlinker will arrange things so that no dynamic relocation is
16122 required. */
0112cd26
NC		 16123 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16124 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16125 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16126 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16127};
16128
c3c76620 16129static void
906e58ca 16130elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16131 struct bfd_link_info *link_info)
c3c76620
MM		 16132{
16133 /* BPABI objects are never loaded directly by an OS kernel; they are
16134 processed by a postlinker first, into an OS-specific format. If
16135 the D_PAGED bit is set on the file, BFD will align segments on
16136 page boundaries, so that an OS can directly map the file. With
16137 BPABI objects, that just results in wasted space. In addition,
16138 because we clear the D_PAGED bit, map_sections_to_segments will
16139 recognize that the program headers should not be mapped into any
16140 loadable segment. */
16141 abfd->flags &= ~D_PAGED;
906e58ca 16142 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16143}
7f266840
DJ		 16144
16145static bfd_boolean
906e58ca 16146elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16147 struct bfd_link_info *info)
7f266840
DJ		 16148{
16149 struct elf_segment_map *m;
16150 asection *dynsec;
16151
7f266840
DJ		 16152 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16153 segment. However, because the .dynamic section is not marked
16154 with SEC_LOAD, the generic ELF code will not create such a
16155 segment. */
16156 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16157 if (dynsec)
16158 {
12bd6957 16159 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
8ded5a0f
AM		 16160 if (m->p_type == PT_DYNAMIC)
16161 break;
16162
16163 if (m == NULL)
16164 {
16165 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12bd6957
AM		 16166 m->next = elf_seg_map (abfd);
16167 elf_seg_map (abfd) = m;
8ded5a0f 16168 }
7f266840
DJ		 16169 }
16170
b294bdf8
MM		 16171 /* Also call the generic arm routine. */
16172 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16173}
16174
95720a86
DJ		 16175/* Return address for Ith PLT stub in section PLT, for relocation REL
16176 or (bfd_vma) -1 if it should not be included. */
16177
16178static bfd_vma
16179elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16180 const arelent *rel ATTRIBUTE_UNUSED)
16181{
16182 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16183}
16184
16185
8029a119 16186#undef elf32_bed
7f266840
DJ		 16187#define elf32_bed elf32_arm_symbian_bed
16188
16189/* The dynamic sections are not allocated on SymbianOS; the postlinker
16190 will process them and then discard them. */
906e58ca 16191#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16192#define ELF_DYNAMIC_SEC_FLAGS \
16193 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16194
00a97672 16195#undef elf_backend_emit_relocs
c3c76620 16196
906e58ca
NC		 16197#undef bfd_elf32_bfd_link_hash_table_create
16198#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16199#undef elf_backend_special_sections
16200#define elf_backend_special_sections elf32_arm_symbian_special_sections
16201#undef elf_backend_begin_write_processing
16202#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16203#undef elf_backend_final_write_processing
16204#define elf_backend_final_write_processing elf32_arm_final_write_processing
16205
16206#undef elf_backend_modify_segment_map
7f266840
DJ		 16207#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16208
16209/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16210#undef elf_backend_got_header_size
7f266840
DJ		 16211#define elf_backend_got_header_size 0
16212
16213/* Similarly, there is no .got.plt section. */
906e58ca 16214#undef elf_backend_want_got_plt
7f266840
DJ		 16215#define elf_backend_want_got_plt 0
16216
906e58ca 16217#undef elf_backend_plt_sym_val
95720a86
DJ		 16218#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16219
906e58ca 16220#undef elf_backend_may_use_rel_p
00a97672 16221#define elf_backend_may_use_rel_p 1
906e58ca 16222#undef elf_backend_may_use_rela_p
00a97672 16223#define elf_backend_may_use_rela_p 0
906e58ca 16224#undef elf_backend_default_use_rela_p
00a97672 16225#define elf_backend_default_use_rela_p 0
906e58ca 16226#undef elf_backend_want_plt_sym
00a97672 16227#define elf_backend_want_plt_sym 0
906e58ca 16228#undef ELF_MAXPAGESIZE
00a97672 16229#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16230
7f266840 16231#include "elf32-target.h"
GDB Binutils - Deliverables
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