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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
f6ebfac0 3 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1780 };
1781
1782static reloc_howto_type *
f1c71a59
ZW		 1783elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1784 bfd_reloc_code_real_type code)
7f266840
DJ		 1785{
1786 unsigned int i;
8029a119 1787
906e58ca 1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1791
c19d1205 1792 return NULL;
7f266840
DJ		 1793}
1794
157090f7
AM		 1795static reloc_howto_type *
1796elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1797 const char *r_name)
1798{
1799 unsigned int i;
1800
906e58ca 1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
906e58ca 1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1807 if (elf32_arm_howto_table_2[i].name != NULL
1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1809 return &elf32_arm_howto_table_2[i];
1810
1811 return NULL;
1812}
1813
906e58ca
NC		 1814/* Support for core dump NOTE sections. */
1815
7f266840 1816static bfd_boolean
f1c71a59 1817elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1818{
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
8029a119 1827 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
1832 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844}
1845
1846static bfd_boolean
f1c71a59 1847elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1848{
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
8029a119 1854 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
7f266840
DJ		 1864 {
1865 char *command = elf_tdata (abfd)->core_command;
1866 int n = strlen (command);
1867
1868 if (0 < n && command[n - 1] == ' ')
1869 command[n - 1] = '\0';
1870 }
1871
1872 return TRUE;
1873}
1874
1875#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1876#define TARGET_LITTLE_NAME "elf32-littlearm"
1877#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1878#define TARGET_BIG_NAME "elf32-bigarm"
1879
1880#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1881#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1882
252b5132
RH		 1883typedef unsigned long int insn32;
1884typedef unsigned short int insn16;
1885
3a4a14e9
PB		 1886/* In lieu of proper flags, assume all EABIv4 or later objects are
1887 interworkable. */
57e8b36a 1888#define INTERWORK_FLAG(abfd) \
3a4a14e9 1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1891 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1892
252b5132
RH		 1893/* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
9b485d32 1896 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1897#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
c7b8f16e
JB		 1903#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
845b51d6
PB		 1906#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1907#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1908
7413f23f
DJ		 1909#define STUB_ENTRY_NAME "__%s_veneer"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
906e58ca 2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
906e58ca
NC		 2013#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2014#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2015#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2016#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2017#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2018#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2019
461a49ca
DJ		 2020enum stub_insn_type
2021 {
2022 THUMB16_TYPE = 1,
2023 THUMB32_TYPE,
2024 ARM_TYPE,
2025 DATA_TYPE
2026 };
2027
48229727
JB		 2028#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2029/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2030 is inserted in arm_build_one_stub(). */
2031#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2032#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2033#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2034#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2035#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2036#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2037
2038typedef struct
2039{
2040 bfd_vma data;
2041 enum stub_insn_type type;
ebe24dd4 2042 unsigned int r_type;
461a49ca
DJ		 2043 int reloc_addend;
2044} insn_sequence;
2045
fea2b4d6
CL		 2046/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2047 to reach the stub if necessary. */
461a49ca 2048static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2049 {
461a49ca
DJ		 2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2052 };
2053
fea2b4d6
CL		 2054/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2055 available. */
461a49ca 2056static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2057 {
461a49ca
DJ		 2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2059 ARM_INSN(0xe12fff1c), /* bx ip */
2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2061 };
2062
d3626fb0 2063/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2064static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2065 {
461a49ca
DJ		 2066 THUMB16_INSN(0xb401), /* push {r0} */
2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2068 THUMB16_INSN(0x4684), /* mov ip, r0 */
2069 THUMB16_INSN(0xbc01), /* pop {r0} */
2070 THUMB16_INSN(0x4760), /* bx ip */
2071 THUMB16_INSN(0xbf00), /* nop */
2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2073 };
2074
d3626fb0
CL		 2075/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2076 allowed. */
2077static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2078 {
2079 THUMB16_INSN(0x4778), /* bx pc */
2080 THUMB16_INSN(0x46c0), /* nop */
2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2082 ARM_INSN(0xe12fff1c), /* bx ip */
2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2084 };
2085
fea2b4d6
CL		 2086/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2087 available. */
461a49ca 2088static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2089 {
461a49ca
DJ		 2090 THUMB16_INSN(0x4778), /* bx pc */
2091 THUMB16_INSN(0x46c0), /* nop */
2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2094 };
2095
fea2b4d6
CL		 2096/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2097 one, when the destination is close enough. */
461a49ca 2098static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2099 {
461a49ca
DJ		 2100 THUMB16_INSN(0x4778), /* bx pc */
2101 THUMB16_INSN(0x46c0), /* nop */
2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2103 };
2104
cf3eccff 2105/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2106 blx to reach the stub if necessary. */
cf3eccff 2107static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2108 {
461a49ca
DJ		 2109 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2112 };
2113
cf3eccff
DJ		 2114/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2115 blx to reach the stub if necessary. We can not add into pc;
2116 it is not guaranteed to mode switch (different in ARMv6 and
2117 ARMv7). */
2118static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2119 {
2120 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2122 ARM_INSN(0xe12fff1c), /* bx ip */
2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2124 };
2125
ebe24dd4
CL		 2126/* V4T ARM -> ARM long branch stub, PIC. */
2127static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2128 {
2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2131 ARM_INSN(0xe12fff1c), /* bx ip */
2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2133 };
2134
2135/* V4T Thumb -> ARM long branch stub, PIC. */
2136static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2137 {
2138 THUMB16_INSN(0x4778), /* bx pc */
2139 THUMB16_INSN(0x46c0), /* nop */
2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2143 };
2144
d3626fb0
CL		 2145/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2146 architectures. */
ebe24dd4
CL		 2147static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2148 {
2149 THUMB16_INSN(0xb401), /* push {r0} */
2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2151 THUMB16_INSN(0x46fc), /* mov ip, pc */
2152 THUMB16_INSN(0x4484), /* add ip, r0 */
2153 THUMB16_INSN(0xbc01), /* pop {r0} */
2154 THUMB16_INSN(0x4760), /* bx ip */
2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2156 };
2157
d3626fb0
CL		 2158/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2159 allowed. */
2160static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2161 {
2162 THUMB16_INSN(0x4778), /* bx pc */
2163 THUMB16_INSN(0x46c0), /* nop */
2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2166 ARM_INSN(0xe12fff1c), /* bx ip */
2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2168 };
2169
48229727
JB		 2170/* Cortex-A8 erratum-workaround stubs. */
2171
2172/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2173 can't use a conditional branch to reach this stub). */
2174
2175static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2176 {
2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2180 };
2181
2182/* Stub used for b.w and bl.w instructions. */
2183
2184static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2185 {
2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2187 };
2188
2189static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2190 {
2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2192 };
2193
2194/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2195 instruction (which switches to ARM mode) to point to this stub. Jump to the
2196 real destination using an ARM-mode branch. */
2197
2198static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2199 {
2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2201 };
2202
906e58ca
NC		 2203/* Section name for stubs is the associated section name plus this
2204 string. */
2205#define STUB_SUFFIX ".stub"
2206
738a79f6
CL		 2207/* One entry per long/short branch stub defined above. */
2208#define DEF_STUBS \
2209 DEF_STUB(long_branch_any_any) \
2210 DEF_STUB(long_branch_v4t_arm_thumb) \
2211 DEF_STUB(long_branch_thumb_only) \
2212 DEF_STUB(long_branch_v4t_thumb_thumb) \
2213 DEF_STUB(long_branch_v4t_thumb_arm) \
2214 DEF_STUB(short_branch_v4t_thumb_arm) \
2215 DEF_STUB(long_branch_any_arm_pic) \
2216 DEF_STUB(long_branch_any_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2220 DEF_STUB(long_branch_thumb_only_pic) \
2221 DEF_STUB(a8_veneer_b_cond) \
2222 DEF_STUB(a8_veneer_b) \
2223 DEF_STUB(a8_veneer_bl) \
2224 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2225
2226#define DEF_STUB(x) arm_stub_##x,
2227enum elf32_arm_stub_type {
906e58ca 2228 arm_stub_none,
738a79f6 2229 DEF_STUBS
eb7c4339
NS		 2230 /* Note the first a8_veneer type */
2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2232};
2233#undef DEF_STUB
2234
2235typedef struct
2236{
d3ce72d0 2237 const insn_sequence* template_sequence;
738a79f6
CL		 2238 int template_size;
2239} stub_def;
2240
2241#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2242static const stub_def stub_definitions[] = {
2243 {NULL, 0},
2244 DEF_STUBS
906e58ca
NC		 2245};
2246
2247struct elf32_arm_stub_hash_entry
2248{
2249 /* Base hash table entry structure. */
2250 struct bfd_hash_entry root;
2251
2252 /* The stub section. */
2253 asection *stub_sec;
2254
2255 /* Offset within stub_sec of the beginning of this stub. */
2256 bfd_vma stub_offset;
2257
2258 /* Given the symbol's value and its section we can determine its final
2259 value when building the stubs (so the stub knows where to jump). */
2260 bfd_vma target_value;
2261 asection *target_section;
2262
48229727
JB		 2263 /* Offset to apply to relocation referencing target_value. */
2264 bfd_vma target_addend;
2265
2266 /* The instruction which caused this stub to be generated (only valid for
2267 Cortex-A8 erratum workaround stubs at present). */
2268 unsigned long orig_insn;
2269
461a49ca 2270 /* The stub type. */
906e58ca 2271 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2272 /* Its encoding size in bytes. */
2273 int stub_size;
2274 /* Its template. */
2275 const insn_sequence *stub_template;
2276 /* The size of the template (number of entries). */
2277 int stub_template_size;
906e58ca
NC		 2278
2279 /* The symbol table entry, if any, that this was derived from. */
2280 struct elf32_arm_link_hash_entry *h;
2281
2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2283 unsigned char st_type;
2284
2285 /* Where this stub is being called from, or, in the case of combined
2286 stub sections, the first input section in the group. */
2287 asection *id_sec;
7413f23f
DJ		 2288
2289 /* The name for the local symbol at the start of this stub. The
2290 stub name in the hash table has to be unique; this does not, so
2291 it can be friendlier. */
2292 char *output_name;
906e58ca
NC		 2293};
2294
e489d0ae
PB		 2295/* Used to build a map of a section. This is required for mixed-endian
2296 code/data. */
2297
2298typedef struct elf32_elf_section_map
2299{
2300 bfd_vma vma;
2301 char type;
2302}
2303elf32_arm_section_map;
2304
c7b8f16e
JB		 2305/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2306
2307typedef enum
2308{
2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2311 VFP11_ERRATUM_ARM_VENEER,
2312 VFP11_ERRATUM_THUMB_VENEER
2313}
2314elf32_vfp11_erratum_type;
2315
2316typedef struct elf32_vfp11_erratum_list
2317{
2318 struct elf32_vfp11_erratum_list *next;
2319 bfd_vma vma;
2320 union
2321 {
2322 struct
2323 {
2324 struct elf32_vfp11_erratum_list *veneer;
2325 unsigned int vfp_insn;
2326 } b;
2327 struct
2328 {
2329 struct elf32_vfp11_erratum_list *branch;
2330 unsigned int id;
2331 } v;
2332 } u;
2333 elf32_vfp11_erratum_type type;
2334}
2335elf32_vfp11_erratum_list;
2336
2468f9c9
PB		 2337typedef enum
2338{
2339 DELETE_EXIDX_ENTRY,
2340 INSERT_EXIDX_CANTUNWIND_AT_END
2341}
2342arm_unwind_edit_type;
2343
2344/* A (sorted) list of edits to apply to an unwind table. */
2345typedef struct arm_unwind_table_edit
2346{
2347 arm_unwind_edit_type type;
2348 /* Note: we sometimes want to insert an unwind entry corresponding to a
2349 section different from the one we're currently writing out, so record the
2350 (text) section this edit relates to here. */
2351 asection *linked_section;
2352 unsigned int index;
2353 struct arm_unwind_table_edit *next;
2354}
2355arm_unwind_table_edit;
2356
8e3de13a 2357typedef struct _arm_elf_section_data
e489d0ae 2358{
2468f9c9 2359 /* Information about mapping symbols. */
e489d0ae 2360 struct bfd_elf_section_data elf;
8e3de13a 2361 unsigned int mapcount;
c7b8f16e 2362 unsigned int mapsize;
e489d0ae 2363 elf32_arm_section_map *map;
2468f9c9 2364 /* Information about CPU errata. */
c7b8f16e
JB		 2365 unsigned int erratumcount;
2366 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2367 /* Information about unwind tables. */
2368 union
2369 {
2370 /* Unwind info attached to a text section. */
2371 struct
2372 {
2373 asection *arm_exidx_sec;
2374 } text;
2375
2376 /* Unwind info attached to an .ARM.exidx section. */
2377 struct
2378 {
2379 arm_unwind_table_edit *unwind_edit_list;
2380 arm_unwind_table_edit *unwind_edit_tail;
2381 } exidx;
2382 } u;
8e3de13a
NC		 2383}
2384_arm_elf_section_data;
e489d0ae
PB		 2385
2386#define elf32_arm_section_data(sec) \
8e3de13a 2387 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2388
48229727
JB		 2389/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2391 so may be created multiple times: we use an array of these entries whilst
2392 relaxing which we can refresh easily, then create stubs for each potentially
2393 erratum-triggering instruction once we've settled on a solution. */
2394
2395struct a8_erratum_fix {
2396 bfd *input_bfd;
2397 asection *section;
2398 bfd_vma offset;
2399 bfd_vma addend;
2400 unsigned long orig_insn;
2401 char *stub_name;
2402 enum elf32_arm_stub_type stub_type;
fe33d2fa 2403 int st_type;
48229727
JB		 2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
2412 unsigned int r_type;
2413 unsigned char st_type;
2414 const char *sym_name;
2415 bfd_boolean non_a8_stub;
2416};
2417
ba93b8ac
DJ		 2418/* The size of the thread control block. */
2419#define TCB_SIZE 8
2420
0ffa91dd 2421struct elf_arm_obj_tdata
ba93b8ac
DJ		 2422{
2423 struct elf_obj_tdata root;
2424
2425 /* tls_type for each local got entry. */
2426 char *local_got_tls_type;
ee065d83 2427
bf21ed78
MS		 2428 /* Zero to warn when linking objects with incompatible enum sizes. */
2429 int no_enum_size_warning;
a9dc9481
JM		 2430
2431 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2432 int no_wchar_size_warning;
ba93b8ac
DJ		 2433};
2434
0ffa91dd
NC		 2435#define elf_arm_tdata(bfd) \
2436 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2437
0ffa91dd
NC		 2438#define elf32_arm_local_got_tls_type(bfd) \
2439 (elf_arm_tdata (bfd)->local_got_tls_type)
2440
2441#define is_arm_elf(bfd) \
2442 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2443 && elf_tdata (bfd) != NULL \
4dfe6ac6 2444 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2445
2446static bfd_boolean
2447elf32_arm_mkobject (bfd *abfd)
2448{
0ffa91dd 2449 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2450 ARM_ELF_DATA);
ba93b8ac
DJ		 2451}
2452
252b5132
RH		 2453/* The ARM linker needs to keep track of the number of relocs that it
2454 decides to copy in check_relocs for each symbol. This is so that
2455 it can discard PC relative relocs if it doesn't need them when
2456 linking with -Bsymbolic. We store the information in a field
2457 extending the regular ELF linker hash table. */
2458
ba93b8ac
DJ		 2459/* This structure keeps track of the number of relocs we have copied
2460 for a given symbol. */
5e681ec4 2461struct elf32_arm_relocs_copied
917583ad
NC		 2462 {
2463 /* Next section. */
5e681ec4 2464 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2465 /* A section in dynobj. */
2466 asection * section;
2467 /* Number of relocs copied in this section. */
2468 bfd_size_type count;
ba93b8ac
DJ		 2469 /* Number of PC-relative relocs copied in this section. */
2470 bfd_size_type pc_count;
917583ad 2471 };
252b5132 2472
ba93b8ac
DJ		 2473#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2474
ba96a88f 2475/* Arm ELF linker hash entry. */
252b5132 2476struct elf32_arm_link_hash_entry
917583ad
NC		 2477 {
2478 struct elf_link_hash_entry root;
252b5132 2479
917583ad 2480 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2481 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2482
2483 /* We reference count Thumb references to a PLT entry separately,
2484 so that we can emit the Thumb trampoline only if needed. */
2485 bfd_signed_vma plt_thumb_refcount;
2486
bd97cb95
DJ		 2487 /* Some references from Thumb code may be eliminated by BL->BLX
2488 conversion, so record them separately. */
2489 bfd_signed_vma plt_maybe_thumb_refcount;
2490
b7693d02
DJ		 2491 /* Since PLT entries have variable size if the Thumb prologue is
2492 used, we need to record the index into .got.plt instead of
2493 recomputing it from the PLT offset. */
2494 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2495
2496#define GOT_UNKNOWN 0
2497#define GOT_NORMAL 1
2498#define GOT_TLS_GD 2
2499#define GOT_TLS_IE 4
2500 unsigned char tls_type;
a4fd1a8e
PB		 2501
2502 /* The symbol marking the real symbol location for exported thumb
2503 symbols with Arm stubs. */
2504 struct elf_link_hash_entry *export_glue;
906e58ca 2505
da5938a2 2506 /* A pointer to the most recently used stub hash entry against this
8029a119 2507 symbol. */
da5938a2 2508 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2509 };
252b5132 2510
252b5132 2511/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2512#define elf32_arm_link_hash_traverse(table, func, info) \
2513 (elf_link_hash_traverse \
2514 (&(table)->root, \
b7693d02 2515 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2516 (info)))
2517
2518/* Get the ARM elf linker hash table from a link_info structure. */
2519#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2520 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2521 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2522
906e58ca
NC		 2523#define arm_stub_hash_lookup(table, string, create, copy) \
2524 ((struct elf32_arm_stub_hash_entry *) \
2525 bfd_hash_lookup ((table), (string), (create), (copy)))
2526
21d799b5
NC		 2527/* Array to keep track of which stub sections have been created, and
2528 information on stub grouping. */
2529struct map_stub
2530{
2531 /* This is the section to which stubs in the group will be
2532 attached. */
2533 asection *link_sec;
2534 /* The stub section. */
2535 asection *stub_sec;
2536};
2537
9b485d32 2538/* ARM ELF linker hash table. */
252b5132 2539struct elf32_arm_link_hash_table
906e58ca
NC		 2540{
2541 /* The main hash table. */
2542 struct elf_link_hash_table root;
252b5132 2543
906e58ca
NC		 2544 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2545 bfd_size_type thumb_glue_size;
252b5132 2546
906e58ca
NC		 2547 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2548 bfd_size_type arm_glue_size;
252b5132 2549
906e58ca
NC		 2550 /* The size in bytes of section containing the ARMv4 BX veneers. */
2551 bfd_size_type bx_glue_size;
845b51d6 2552
906e58ca
NC		 2553 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2554 veneer has been populated. */
2555 bfd_vma bx_glue_offset[15];
845b51d6 2556
906e58ca
NC		 2557 /* The size in bytes of the section containing glue for VFP11 erratum
2558 veneers. */
2559 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2560
48229727
JB		 2561 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2562 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2563 elf32_arm_write_section(). */
2564 struct a8_erratum_fix *a8_erratum_fixes;
2565 unsigned int num_a8_erratum_fixes;
2566
906e58ca
NC		 2567 /* An arbitrary input BFD chosen to hold the glue sections. */
2568 bfd * bfd_of_glue_owner;
ba96a88f 2569
906e58ca
NC		 2570 /* Nonzero to output a BE8 image. */
2571 int byteswap_code;
e489d0ae 2572
906e58ca
NC		 2573 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2574 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2575 int target1_is_rel;
9c504268 2576
906e58ca
NC		 2577 /* The relocation to use for R_ARM_TARGET2 relocations. */
2578 int target2_reloc;
eb043451 2579
906e58ca
NC		 2580 /* 0 = Ignore R_ARM_V4BX.
2581 1 = Convert BX to MOV PC.
2582 2 = Generate v4 interworing stubs. */
2583 int fix_v4bx;
319850b4 2584
48229727
JB		 2585 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2586 int fix_cortex_a8;
2587
906e58ca
NC		 2588 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2589 int use_blx;
33bfe774 2590
906e58ca
NC		 2591 /* What sort of code sequences we should look for which may trigger the
2592 VFP11 denorm erratum. */
2593 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2594
906e58ca
NC		 2595 /* Global counter for the number of fixes we have emitted. */
2596 int num_vfp11_fixes;
c7b8f16e 2597
906e58ca
NC		 2598 /* Nonzero to force PIC branch veneers. */
2599 int pic_veneer;
27e55c4d 2600
906e58ca
NC		 2601 /* The number of bytes in the initial entry in the PLT. */
2602 bfd_size_type plt_header_size;
e5a52504 2603
906e58ca
NC		 2604 /* The number of bytes in the subsequent PLT etries. */
2605 bfd_size_type plt_entry_size;
e5a52504 2606
906e58ca
NC		 2607 /* True if the target system is VxWorks. */
2608 int vxworks_p;
00a97672 2609
906e58ca
NC		 2610 /* True if the target system is Symbian OS. */
2611 int symbian_p;
e5a52504 2612
906e58ca
NC		 2613 /* True if the target uses REL relocations. */
2614 int use_rel;
4e7fd91e 2615
906e58ca
NC		 2616 /* Short-cuts to get to dynamic linker sections. */
2617 asection *sgot;
2618 asection *sgotplt;
2619 asection *srelgot;
2620 asection *splt;
2621 asection *srelplt;
2622 asection *sdynbss;
2623 asection *srelbss;
5e681ec4 2624
906e58ca
NC		 2625 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2626 asection *srelplt2;
00a97672 2627
906e58ca
NC		 2628 /* Data for R_ARM_TLS_LDM32 relocations. */
2629 union
2630 {
2631 bfd_signed_vma refcount;
2632 bfd_vma offset;
2633 } tls_ldm_got;
b7693d02 2634
87d72d41
AM		 2635 /* Small local sym cache. */
2636 struct sym_cache sym_cache;
906e58ca
NC		 2637
2638 /* For convenience in allocate_dynrelocs. */
2639 bfd * obfd;
2640
2641 /* The stub hash table. */
2642 struct bfd_hash_table stub_hash_table;
2643
2644 /* Linker stub bfd. */
2645 bfd *stub_bfd;
2646
2647 /* Linker call-backs. */
2648 asection * (*add_stub_section) (const char *, asection *);
2649 void (*layout_sections_again) (void);
2650
2651 /* Array to keep track of which stub sections have been created, and
2652 information on stub grouping. */
21d799b5 2653 struct map_stub *stub_group;
906e58ca 2654
fe33d2fa
CL		 2655 /* Number of elements in stub_group. */
2656 int top_id;
2657
906e58ca
NC		 2658 /* Assorted information used by elf32_arm_size_stubs. */
2659 unsigned int bfd_count;
2660 int top_index;
2661 asection **input_list;
2662};
252b5132 2663
780a67af
NC		 2664/* Create an entry in an ARM ELF linker hash table. */
2665
2666static struct bfd_hash_entry *
57e8b36a
NC		 2667elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2668 struct bfd_hash_table * table,
2669 const char * string)
780a67af
NC		 2670{
2671 struct elf32_arm_link_hash_entry * ret =
2672 (struct elf32_arm_link_hash_entry *) entry;
2673
2674 /* Allocate the structure if it has not already been allocated by a
2675 subclass. */
906e58ca 2676 if (ret == NULL)
21d799b5
NC		 2677 ret = (struct elf32_arm_link_hash_entry *)
2678 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2679 if (ret == NULL)
780a67af
NC		 2680 return (struct bfd_hash_entry *) ret;
2681
2682 /* Call the allocation method of the superclass. */
2683 ret = ((struct elf32_arm_link_hash_entry *)
2684 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2685 table, string));
57e8b36a 2686 if (ret != NULL)
b7693d02
DJ		 2687 {
2688 ret->relocs_copied = NULL;
ba93b8ac 2689 ret->tls_type = GOT_UNKNOWN;
b7693d02 2690 ret->plt_thumb_refcount = 0;
bd97cb95 2691 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2692 ret->plt_got_offset = -1;
a4fd1a8e 2693 ret->export_glue = NULL;
906e58ca
NC		 2694
2695 ret->stub_cache = NULL;
b7693d02 2696 }
780a67af
NC		 2697
2698 return (struct bfd_hash_entry *) ret;
2699}
2700
906e58ca
NC		 2701/* Initialize an entry in the stub hash table. */
2702
2703static struct bfd_hash_entry *
2704stub_hash_newfunc (struct bfd_hash_entry *entry,
2705 struct bfd_hash_table *table,
2706 const char *string)
2707{
2708 /* Allocate the structure if it has not already been allocated by a
2709 subclass. */
2710 if (entry == NULL)
2711 {
21d799b5
NC		 2712 entry = (struct bfd_hash_entry *)
2713 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2714 if (entry == NULL)
2715 return entry;
2716 }
2717
2718 /* Call the allocation method of the superclass. */
2719 entry = bfd_hash_newfunc (entry, table, string);
2720 if (entry != NULL)
2721 {
2722 struct elf32_arm_stub_hash_entry *eh;
2723
2724 /* Initialize the local fields. */
2725 eh = (struct elf32_arm_stub_hash_entry *) entry;
2726 eh->stub_sec = NULL;
2727 eh->stub_offset = 0;
2728 eh->target_value = 0;
2729 eh->target_section = NULL;
cedfb179
DK		 2730 eh->target_addend = 0;
2731 eh->orig_insn = 0;
906e58ca 2732 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2733 eh->stub_size = 0;
2734 eh->stub_template = NULL;
2735 eh->stub_template_size = 0;
906e58ca
NC		 2736 eh->h = NULL;
2737 eh->id_sec = NULL;
d8d2f433 2738 eh->output_name = NULL;
906e58ca
NC		 2739 }
2740
2741 return entry;
2742}
2743
00a97672 2744/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2745 shortcuts to them in our hash table. */
2746
2747static bfd_boolean
57e8b36a 2748create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2749{
2750 struct elf32_arm_link_hash_table *htab;
2751
e5a52504 2752 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2753 if (htab == NULL)
2754 return FALSE;
2755
e5a52504
MM		 2756 /* BPABI objects never have a GOT, or associated sections. */
2757 if (htab->symbian_p)
2758 return TRUE;
2759
5e681ec4
PB		 2760 if (! _bfd_elf_create_got_section (dynobj, info))
2761 return FALSE;
2762
5e681ec4
PB		 2763 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2764 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2765 if (!htab->sgot || !htab->sgotplt)
2766 abort ();
2767
64e77c6d
L		 2768 htab->srelgot = bfd_get_section_by_name (dynobj,
2769 RELOC_SECTION (htab, ".got"));
2770 if (htab->srelgot == NULL)
5e681ec4
PB		 2771 return FALSE;
2772 return TRUE;
2773}
2774
00a97672
RS		 2775/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2776 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2777 hash table. */
2778
2779static bfd_boolean
57e8b36a 2780elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2781{
2782 struct elf32_arm_link_hash_table *htab;
2783
2784 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2785 if (htab == NULL)
2786 return FALSE;
2787
5e681ec4
PB		 2788 if (!htab->sgot && !create_got_section (dynobj, info))
2789 return FALSE;
2790
2791 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2792 return FALSE;
2793
2794 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2795 htab->srelplt = bfd_get_section_by_name (dynobj,
2796 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2797 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2798 if (!info->shared)
00a97672
RS		 2799 htab->srelbss = bfd_get_section_by_name (dynobj,
2800 RELOC_SECTION (htab, ".bss"));
2801
2802 if (htab->vxworks_p)
2803 {
2804 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2805 return FALSE;
2806
2807 if (info->shared)
2808 {
2809 htab->plt_header_size = 0;
2810 htab->plt_entry_size
2811 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2812 }
2813 else
2814 {
2815 htab->plt_header_size
2816 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2817 htab->plt_entry_size
2818 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2819 }
2820 }
5e681ec4 2821
906e58ca 2822 if (!htab->splt
e5a52504
MM		 2823 || !htab->srelplt
2824 || !htab->sdynbss
5e681ec4
PB		 2825 || (!info->shared && !htab->srelbss))
2826 abort ();
2827
2828 return TRUE;
2829}
2830
906e58ca
NC		 2831/* Copy the extra info we tack onto an elf_link_hash_entry. */
2832
2833static void
2834elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2835 struct elf_link_hash_entry *dir,
2836 struct elf_link_hash_entry *ind)
2837{
2838 struct elf32_arm_link_hash_entry *edir, *eind;
2839
2840 edir = (struct elf32_arm_link_hash_entry *) dir;
2841 eind = (struct elf32_arm_link_hash_entry *) ind;
2842
2843 if (eind->relocs_copied != NULL)
2844 {
2845 if (edir->relocs_copied != NULL)
2846 {
2847 struct elf32_arm_relocs_copied **pp;
2848 struct elf32_arm_relocs_copied *p;
2849
2850 /* Add reloc counts against the indirect sym to the direct sym
2851 list. Merge any entries against the same section. */
2852 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2853 {
2854 struct elf32_arm_relocs_copied *q;
2855
2856 for (q = edir->relocs_copied; q != NULL; q = q->next)
2857 if (q->section == p->section)
2858 {
2859 q->pc_count += p->pc_count;
2860 q->count += p->count;
2861 *pp = p->next;
2862 break;
2863 }
2864 if (q == NULL)
2865 pp = &p->next;
2866 }
2867 *pp = edir->relocs_copied;
2868 }
2869
2870 edir->relocs_copied = eind->relocs_copied;
2871 eind->relocs_copied = NULL;
2872 }
2873
2874 if (ind->root.type == bfd_link_hash_indirect)
2875 {
2876 /* Copy over PLT info. */
2877 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2878 eind->plt_thumb_refcount = 0;
2879 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2880 eind->plt_maybe_thumb_refcount = 0;
2881
2882 if (dir->got.refcount <= 0)
2883 {
2884 edir->tls_type = eind->tls_type;
2885 eind->tls_type = GOT_UNKNOWN;
2886 }
2887 }
2888
2889 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2890}
2891
2892/* Create an ARM elf linker hash table. */
2893
2894static struct bfd_link_hash_table *
2895elf32_arm_link_hash_table_create (bfd *abfd)
2896{
2897 struct elf32_arm_link_hash_table *ret;
2898 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2899
21d799b5 2900 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 2901 if (ret == NULL)
2902 return NULL;
2903
2904 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2905 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 2906 sizeof (struct elf32_arm_link_hash_entry),
2907 ARM_ELF_DATA))
906e58ca
NC		 2908 {
2909 free (ret);
2910 return NULL;
2911 }
2912
2913 ret->sgot = NULL;
2914 ret->sgotplt = NULL;
2915 ret->srelgot = NULL;
2916 ret->splt = NULL;
2917 ret->srelplt = NULL;
2918 ret->sdynbss = NULL;
2919 ret->srelbss = NULL;
2920 ret->srelplt2 = NULL;
2921 ret->thumb_glue_size = 0;
2922 ret->arm_glue_size = 0;
2923 ret->bx_glue_size = 0;
2924 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2925 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2926 ret->vfp11_erratum_glue_size = 0;
2927 ret->num_vfp11_fixes = 0;
48229727 2928 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2929 ret->bfd_of_glue_owner = NULL;
2930 ret->byteswap_code = 0;
2931 ret->target1_is_rel = 0;
2932 ret->target2_reloc = R_ARM_NONE;
2933#ifdef FOUR_WORD_PLT
2934 ret->plt_header_size = 16;
2935 ret->plt_entry_size = 16;
2936#else
2937 ret->plt_header_size = 20;
2938 ret->plt_entry_size = 12;
2939#endif
2940 ret->fix_v4bx = 0;
2941 ret->use_blx = 0;
2942 ret->vxworks_p = 0;
2943 ret->symbian_p = 0;
2944 ret->use_rel = 1;
87d72d41 2945 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2946 ret->obfd = abfd;
2947 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2948 ret->stub_bfd = NULL;
2949 ret->add_stub_section = NULL;
2950 ret->layout_sections_again = NULL;
2951 ret->stub_group = NULL;
fe33d2fa 2952 ret->top_id = 0;
6cee0a6f
L		 2953 ret->bfd_count = 0;
2954 ret->top_index = 0;
2955 ret->input_list = NULL;
906e58ca
NC		 2956
2957 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2958 sizeof (struct elf32_arm_stub_hash_entry)))
2959 {
2960 free (ret);
2961 return NULL;
2962 }
2963
2964 return &ret->root.root;
2965}
2966
2967/* Free the derived linker hash table. */
2968
2969static void
2970elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2971{
2972 struct elf32_arm_link_hash_table *ret
2973 = (struct elf32_arm_link_hash_table *) hash;
2974
2975 bfd_hash_table_free (&ret->stub_hash_table);
2976 _bfd_generic_link_hash_table_free (hash);
2977}
2978
2979/* Determine if we're dealing with a Thumb only architecture. */
2980
2981static bfd_boolean
2982using_thumb_only (struct elf32_arm_link_hash_table *globals)
2983{
2984 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2985 Tag_CPU_arch);
2986 int profile;
2987
9e3c6df6 2988 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 2989 return FALSE;
2990
2991 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2992 Tag_CPU_arch_profile);
2993
2994 return profile == 'M';
2995}
2996
2997/* Determine if we're dealing with a Thumb-2 object. */
2998
2999static bfd_boolean
3000using_thumb2 (struct elf32_arm_link_hash_table *globals)
3001{
3002 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3003 Tag_CPU_arch);
3004 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3005}
3006
cd1dac3d
DG		 3007/* Determine what kind of NOPs are available. */
3008
3009static bfd_boolean
3010arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3011{
3012 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3013 Tag_CPU_arch);
3014 return arch == TAG_CPU_ARCH_V6T2
3015 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3016 || arch == TAG_CPU_ARCH_V7
3017 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3018}
3019
3020static bfd_boolean
3021arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3022{
3023 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3024 Tag_CPU_arch);
9e3c6df6
PB		 3025 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3026 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3027}
3028
f4ac8484
DJ		 3029static bfd_boolean
3030arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3031{
3032 switch (stub_type)
3033 {
fea2b4d6
CL		 3034 case arm_stub_long_branch_thumb_only:
3035 case arm_stub_long_branch_v4t_thumb_arm:
3036 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3037 case arm_stub_long_branch_v4t_thumb_arm_pic:
3038 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3039 return TRUE;
3040 case arm_stub_none:
3041 BFD_FAIL ();
3042 return FALSE;
3043 break;
3044 default:
3045 return FALSE;
3046 }
3047}
3048
906e58ca
NC		 3049/* Determine the type of stub needed, if any, for a call. */
3050
3051static enum elf32_arm_stub_type
3052arm_type_of_stub (struct bfd_link_info *info,
3053 asection *input_sec,
3054 const Elf_Internal_Rela *rel,
fe33d2fa 3055 int *actual_st_type,
906e58ca 3056 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3057 bfd_vma destination,
3058 asection *sym_sec,
3059 bfd *input_bfd,
3060 const char *name)
906e58ca
NC		 3061{
3062 bfd_vma location;
3063 bfd_signed_vma branch_offset;
3064 unsigned int r_type;
3065 struct elf32_arm_link_hash_table * globals;
3066 int thumb2;
3067 int thumb_only;
3068 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3069 int use_plt = 0;
fe33d2fa 3070 int st_type = *actual_st_type;
906e58ca 3071
da5938a2 3072 /* We don't know the actual type of destination in case it is of
8029a119 3073 type STT_SECTION: give up. */
da5938a2
NC		 3074 if (st_type == STT_SECTION)
3075 return stub_type;
3076
906e58ca 3077 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3078 if (globals == NULL)
3079 return stub_type;
906e58ca
NC		 3080
3081 thumb_only = using_thumb_only (globals);
3082
3083 thumb2 = using_thumb2 (globals);
3084
3085 /* Determine where the call point is. */
3086 location = (input_sec->output_offset
3087 + input_sec->output_section->vma
3088 + rel->r_offset);
3089
906e58ca
NC		 3090 r_type = ELF32_R_TYPE (rel->r_info);
3091
5fa9e92f 3092 /* Keep a simpler condition, for the sake of clarity. */
fe33d2fa
CL		 3093 if (globals->splt != NULL
3094 && hash != NULL
3095 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3096 {
3097 use_plt = 1;
fe33d2fa 3098
5fa9e92f
CL		 3099 /* Note when dealing with PLT entries: the main PLT stub is in
3100 ARM mode, so if the branch is in Thumb mode, another
3101 Thumb->ARM stub will be inserted later just before the ARM
3102 PLT stub. We don't take this extra distance into account
3103 here, because if a long branch stub is needed, we'll add a
3104 Thumb->Arm one and branch directly to the ARM PLT entry
3105 because it avoids spreading offset corrections in several
3106 places. */
fe33d2fa
CL		 3107
3108 destination = (globals->splt->output_section->vma
3109 + globals->splt->output_offset
3110 + hash->root.plt.offset);
3111 st_type = STT_FUNC;
5fa9e92f 3112 }
906e58ca 3113
fe33d2fa
CL		 3114 branch_offset = (bfd_signed_vma)(destination - location);
3115
155d87d7 3116 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3117 {
5fa9e92f
CL		 3118 /* Handle cases where:
3119 - this call goes too far (different Thumb/Thumb2 max
3120 distance)
155d87d7
CL		 3121 - it's a Thumb->Arm call and blx is not available, or it's a
3122 Thumb->Arm branch (not bl). A stub is needed in this case,
3123 but only if this call is not through a PLT entry. Indeed,
3124 PLT stubs handle mode switching already.
5fa9e92f 3125 */
906e58ca
NC		 3126 if ((!thumb2
3127 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3128 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3129 || (thumb2
3130 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3131 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3132 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3133 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3134 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3135 && !use_plt))
906e58ca
NC		 3136 {
3137 if (st_type == STT_ARM_TFUNC)
3138 {
3139 /* Thumb to thumb. */
3140 if (!thumb_only)
3141 {
3142 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3143 /* PIC stubs. */
155d87d7
CL		 3144 ? ((globals->use_blx
3145 && (r_type ==R_ARM_THM_CALL))
3146 /* V5T and above. Stub starts with ARM code, so
3147 we must be able to switch mode before
3148 reaching it, which is only possible for 'bl'
3149 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3150 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3151 /* On V4T, use Thumb code only. */
d3626fb0 3152 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3153
3154 /* non-PIC stubs. */
155d87d7
CL		 3155 : ((globals->use_blx
3156 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3157 /* V5T and above. */
3158 ? arm_stub_long_branch_any_any
3159 /* V4T. */
d3626fb0 3160 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3161 }
3162 else
3163 {
3164 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3165 /* PIC stub. */
3166 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3167 /* non-PIC stub. */
3168 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3169 }
3170 }
3171 else
3172 {
3173 /* Thumb to arm. */
c820be07
NC		 3174 if (sym_sec != NULL
3175 && sym_sec->owner != NULL
3176 && !INTERWORK_FLAG (sym_sec->owner))
3177 {
3178 (*_bfd_error_handler)
3179 (_("%B(%s): warning: interworking not enabled.\n"
3180 " first occurrence: %B: Thumb call to ARM"),
3181 sym_sec->owner, input_bfd, name);
3182 }
3183
906e58ca 3184 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3185 /* PIC stubs. */
155d87d7
CL		 3186 ? ((globals->use_blx
3187 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3188 /* V5T and above. */
cf3eccff 3189 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3190 /* V4T PIC stub. */
3191 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3192
3193 /* non-PIC stubs. */
155d87d7
CL		 3194 : ((globals->use_blx
3195 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3196 /* V5T and above. */
3197 ? arm_stub_long_branch_any_any
3198 /* V4T. */
3199 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3200
3201 /* Handle v4t short branches. */
fea2b4d6 3202 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3203 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3204 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3205 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3206 }
3207 }
3208 }
fe33d2fa
CL		 3209 else if (r_type == R_ARM_CALL
3210 || r_type == R_ARM_JUMP24
3211 || r_type == R_ARM_PLT32)
906e58ca
NC		 3212 {
3213 if (st_type == STT_ARM_TFUNC)
3214 {
3215 /* Arm to thumb. */
c820be07
NC		 3216
3217 if (sym_sec != NULL
3218 && sym_sec->owner != NULL
3219 && !INTERWORK_FLAG (sym_sec->owner))
3220 {
3221 (*_bfd_error_handler)
3222 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3223 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3224 sym_sec->owner, input_bfd, name);
3225 }
3226
3227 /* We have an extra 2-bytes reach because of
3228 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3229 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3230 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3231 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3232 || (r_type == R_ARM_JUMP24)
3233 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3234 {
3235 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3236 /* PIC stubs. */
ebe24dd4
CL		 3237 ? ((globals->use_blx)
3238 /* V5T and above. */
3239 ? arm_stub_long_branch_any_thumb_pic
3240 /* V4T stub. */
3241 : arm_stub_long_branch_v4t_arm_thumb_pic)
3242
c2b4a39d
CL		 3243 /* non-PIC stubs. */
3244 : ((globals->use_blx)
3245 /* V5T and above. */
3246 ? arm_stub_long_branch_any_any
3247 /* V4T. */
3248 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3249 }
3250 }
3251 else
3252 {
3253 /* Arm to arm. */
3254 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3255 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3256 {
3257 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3258 /* PIC stubs. */
cf3eccff 3259 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3260 /* non-PIC stubs. */
fea2b4d6 3261 : arm_stub_long_branch_any_any;
906e58ca
NC		 3262 }
3263 }
3264 }
3265
fe33d2fa
CL		 3266 /* If a stub is needed, record the actual destination type. */
3267 if (stub_type != arm_stub_none)
3268 {
3269 *actual_st_type = st_type;
3270 }
3271
906e58ca
NC		 3272 return stub_type;
3273}
3274
3275/* Build a name for an entry in the stub hash table. */
3276
3277static char *
3278elf32_arm_stub_name (const asection *input_section,
3279 const asection *sym_sec,
3280 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3281 const Elf_Internal_Rela *rel,
3282 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3283{
3284 char *stub_name;
3285 bfd_size_type len;
3286
3287 if (hash)
3288 {
fe33d2fa 3289 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3290 stub_name = (char *) bfd_malloc (len);
906e58ca 3291 if (stub_name != NULL)
fe33d2fa 3292 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3293 input_section->id & 0xffffffff,
3294 hash->root.root.root.string,
fe33d2fa
CL		 3295 (int) rel->r_addend & 0xffffffff,
3296 (int) stub_type);
906e58ca
NC		 3297 }
3298 else
3299 {
fe33d2fa 3300 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3301 stub_name = (char *) bfd_malloc (len);
906e58ca 3302 if (stub_name != NULL)
fe33d2fa 3303 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3304 input_section->id & 0xffffffff,
3305 sym_sec->id & 0xffffffff,
3306 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3307 (int) rel->r_addend & 0xffffffff,
3308 (int) stub_type);
906e58ca
NC		 3309 }
3310
3311 return stub_name;
3312}
3313
3314/* Look up an entry in the stub hash. Stub entries are cached because
3315 creating the stub name takes a bit of time. */
3316
3317static struct elf32_arm_stub_hash_entry *
3318elf32_arm_get_stub_entry (const asection *input_section,
3319 const asection *sym_sec,
3320 struct elf_link_hash_entry *hash,
3321 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3322 struct elf32_arm_link_hash_table *htab,
3323 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3324{
3325 struct elf32_arm_stub_hash_entry *stub_entry;
3326 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3327 const asection *id_sec;
3328
3329 if ((input_section->flags & SEC_CODE) == 0)
3330 return NULL;
3331
3332 /* If this input section is part of a group of sections sharing one
3333 stub section, then use the id of the first section in the group.
3334 Stub names need to include a section id, as there may well be
3335 more than one stub used to reach say, printf, and we need to
3336 distinguish between them. */
3337 id_sec = htab->stub_group[input_section->id].link_sec;
3338
3339 if (h != NULL && h->stub_cache != NULL
3340 && h->stub_cache->h == h
fe33d2fa
CL		 3341 && h->stub_cache->id_sec == id_sec
3342 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3343 {
3344 stub_entry = h->stub_cache;
3345 }
3346 else
3347 {
3348 char *stub_name;
3349
fe33d2fa 3350 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3351 if (stub_name == NULL)
3352 return NULL;
3353
3354 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3355 stub_name, FALSE, FALSE);
3356 if (h != NULL)
3357 h->stub_cache = stub_entry;
3358
3359 free (stub_name);
3360 }
3361
3362 return stub_entry;
3363}
3364
48229727
JB		 3365/* Find or create a stub section. Returns a pointer to the stub section, and
3366 the section to which the stub section will be attached (in *LINK_SEC_P).
3367 LINK_SEC_P may be NULL. */
906e58ca 3368
48229727
JB		 3369static asection *
3370elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3371 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3372{
3373 asection *link_sec;
3374 asection *stub_sec;
906e58ca
NC		 3375
3376 link_sec = htab->stub_group[section->id].link_sec;
3377 stub_sec = htab->stub_group[section->id].stub_sec;
3378 if (stub_sec == NULL)
3379 {
3380 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3381 if (stub_sec == NULL)
3382 {
3383 size_t namelen;
3384 bfd_size_type len;
3385 char *s_name;
3386
3387 namelen = strlen (link_sec->name);
3388 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3389 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3390 if (s_name == NULL)
3391 return NULL;
3392
3393 memcpy (s_name, link_sec->name, namelen);
3394 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3395 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3396 if (stub_sec == NULL)
3397 return NULL;
3398 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3399 }
3400 htab->stub_group[section->id].stub_sec = stub_sec;
3401 }
48229727
JB		 3402
3403 if (link_sec_p)
3404 *link_sec_p = link_sec;
3405
3406 return stub_sec;
3407}
3408
3409/* Add a new stub entry to the stub hash. Not all fields of the new
3410 stub entry are initialised. */
3411
3412static struct elf32_arm_stub_hash_entry *
3413elf32_arm_add_stub (const char *stub_name,
3414 asection *section,
3415 struct elf32_arm_link_hash_table *htab)
3416{
3417 asection *link_sec;
3418 asection *stub_sec;
3419 struct elf32_arm_stub_hash_entry *stub_entry;
3420
3421 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3422 if (stub_sec == NULL)
3423 return NULL;
906e58ca
NC		 3424
3425 /* Enter this entry into the linker stub hash table. */
3426 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3427 TRUE, FALSE);
3428 if (stub_entry == NULL)
3429 {
3430 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3431 section->owner,
3432 stub_name);
3433 return NULL;
3434 }
3435
3436 stub_entry->stub_sec = stub_sec;
3437 stub_entry->stub_offset = 0;
3438 stub_entry->id_sec = link_sec;
3439
906e58ca
NC		 3440 return stub_entry;
3441}
3442
3443/* Store an Arm insn into an output section not processed by
3444 elf32_arm_write_section. */
3445
3446static void
8029a119
NC		 3447put_arm_insn (struct elf32_arm_link_hash_table * htab,
3448 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3449{
3450 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3451 bfd_putl32 (val, ptr);
3452 else
3453 bfd_putb32 (val, ptr);
3454}
3455
3456/* Store a 16-bit Thumb insn into an output section not processed by
3457 elf32_arm_write_section. */
3458
3459static void
8029a119
NC		 3460put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3461 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3462{
3463 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3464 bfd_putl16 (val, ptr);
3465 else
3466 bfd_putb16 (val, ptr);
3467}
3468
48229727
JB		 3469static bfd_reloc_status_type elf32_arm_final_link_relocate
3470 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3471 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3472 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3473
906e58ca
NC		 3474static bfd_boolean
3475arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3476 void * in_arg)
3477{
48229727 3478#define MAXRELOCS 2
906e58ca 3479 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3480 struct elf32_arm_link_hash_table *globals;
906e58ca 3481 struct bfd_link_info *info;
906e58ca
NC		 3482 asection *stub_sec;
3483 bfd *stub_bfd;
3484 bfd_vma stub_addr;
3485 bfd_byte *loc;
3486 bfd_vma sym_value;
3487 int template_size;
3488 int size;
d3ce72d0 3489 const insn_sequence *template_sequence;
906e58ca 3490 int i;
48229727
JB		 3491 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3492 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3493 int nrelocs = 0;
906e58ca
NC		 3494
3495 /* Massage our args to the form they really have. */
3496 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3497 info = (struct bfd_link_info *) in_arg;
3498
3499 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3500 if (globals == NULL)
3501 return FALSE;
906e58ca 3502
906e58ca
NC		 3503 stub_sec = stub_entry->stub_sec;
3504
4dfe6ac6 3505 if ((globals->fix_cortex_a8 < 0)
eb7c4339
NS		 3506 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3507 /* We have to do the a8 fixes last, as they are less aligned than
3508 the other veneers. */
3509 return TRUE;
fe33d2fa 3510
906e58ca
NC		 3511 /* Make a note of the offset within the stubs for this entry. */
3512 stub_entry->stub_offset = stub_sec->size;
3513 loc = stub_sec->contents + stub_entry->stub_offset;
3514
3515 stub_bfd = stub_sec->owner;
3516
3517 /* This is the address of the start of the stub. */
3518 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3519 + stub_entry->stub_offset;
3520
3521 /* This is the address of the stub destination. */
3522 sym_value = (stub_entry->target_value
3523 + stub_entry->target_section->output_offset
3524 + stub_entry->target_section->output_section->vma);
3525
d3ce72d0 3526 template_sequence = stub_entry->stub_template;
461a49ca 3527 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3528
3529 size = 0;
461a49ca 3530 for (i = 0; i < template_size; i++)
906e58ca 3531 {
d3ce72d0 3532 switch (template_sequence[i].type)
461a49ca
DJ		 3533 {
3534 case THUMB16_TYPE:
48229727 3535 {
d3ce72d0
NC		 3536 bfd_vma data = (bfd_vma) template_sequence[i].data;
3537 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3538 {
3539 /* We've borrowed the reloc_addend field to mean we should
3540 insert a condition code into this (Thumb-1 branch)
3541 instruction. See THUMB16_BCOND_INSN. */
3542 BFD_ASSERT ((data & 0xff00) == 0xd000);
3543 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3544 }
fe33d2fa 3545 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3546 size += 2;
3547 }
461a49ca 3548 break;
906e58ca 3549
48229727 3550 case THUMB32_TYPE:
fe33d2fa
CL		 3551 bfd_put_16 (stub_bfd,
3552 (template_sequence[i].data >> 16) & 0xffff,
3553 loc + size);
3554 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3555 loc + size + 2);
d3ce72d0 3556 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3557 {
3558 stub_reloc_idx[nrelocs] = i;
3559 stub_reloc_offset[nrelocs++] = size;
3560 }
3561 size += 4;
3562 break;
3563
461a49ca 3564 case ARM_TYPE:
fe33d2fa
CL		 3565 bfd_put_32 (stub_bfd, template_sequence[i].data,
3566 loc + size);
461a49ca
DJ		 3567 /* Handle cases where the target is encoded within the
3568 instruction. */
d3ce72d0 3569 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3570 {
48229727
JB		 3571 stub_reloc_idx[nrelocs] = i;
3572 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3573 }
3574 size += 4;
3575 break;
3576
3577 case DATA_TYPE:
d3ce72d0 3578 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3579 stub_reloc_idx[nrelocs] = i;
3580 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3581 size += 4;
3582 break;
3583
3584 default:
3585 BFD_FAIL ();
3586 return FALSE;
3587 }
906e58ca 3588 }
461a49ca 3589
906e58ca
NC		 3590 stub_sec->size += size;
3591
461a49ca
DJ		 3592 /* Stub size has already been computed in arm_size_one_stub. Check
3593 consistency. */
3594 BFD_ASSERT (size == stub_entry->stub_size);
3595
906e58ca
NC		 3596 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3597 if (stub_entry->st_type == STT_ARM_TFUNC)
3598 sym_value |= 1;
3599
48229727
JB		 3600 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3601 in each stub. */
3602 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3603
48229727 3604 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3605 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3606 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3607 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3608 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3609 {
3610 Elf_Internal_Rela rel;
3611 bfd_boolean unresolved_reloc;
3612 char *error_message;
3613 int sym_flags
d3ce72d0 3614 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3615 ? STT_ARM_TFUNC : 0;
3616 bfd_vma points_to = sym_value + stub_entry->target_addend;
3617
3618 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3619 rel.r_info = ELF32_R_INFO (0,
3620 template_sequence[stub_reloc_idx[i]].r_type);
3621 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3622
3623 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3624 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3625 template should refer back to the instruction after the original
3626 branch. */
3627 points_to = sym_value;
3628
33c6a8fc
JB		 3629 /* There may be unintended consequences if this is not true. */
3630 BFD_ASSERT (stub_entry->h == NULL);
3631
48229727
JB		 3632 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3633 properly. We should probably use this function unconditionally,
3634 rather than only for certain relocations listed in the enclosing
3635 conditional, for the sake of consistency. */
3636 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3637 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3638 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3639 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3640 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3641 &error_message);
3642 }
3643 else
3644 {
fe33d2fa
CL		 3645 Elf_Internal_Rela rel;
3646 bfd_boolean unresolved_reloc;
3647 char *error_message;
3648 bfd_vma points_to = sym_value + stub_entry->target_addend
3649 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3650
3651 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3652 rel.r_info = ELF32_R_INFO (0,
3653 template_sequence[stub_reloc_idx[i]].r_type);
3654 rel.r_addend = 0;
3655
3656 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3657 (template_sequence[stub_reloc_idx[i]].r_type),
3658 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3659 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3660 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3661 &error_message);
48229727 3662 }
906e58ca
NC		 3663
3664 return TRUE;
48229727 3665#undef MAXRELOCS
906e58ca
NC		 3666}
3667
48229727
JB		 3668/* Calculate the template, template size and instruction size for a stub.
3669 Return value is the instruction size. */
906e58ca 3670
48229727
JB		 3671static unsigned int
3672find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3673 const insn_sequence **stub_template,
3674 int *stub_template_size)
906e58ca 3675{
d3ce72d0 3676 const insn_sequence *template_sequence = NULL;
48229727
JB		 3677 int template_size = 0, i;
3678 unsigned int size;
906e58ca 3679
d3ce72d0 3680 template_sequence = stub_definitions[stub_type].template_sequence;
48229727 3681 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3682
3683 size = 0;
461a49ca
DJ		 3684 for (i = 0; i < template_size; i++)
3685 {
d3ce72d0 3686 switch (template_sequence[i].type)
461a49ca
DJ		 3687 {
3688 case THUMB16_TYPE:
3689 size += 2;
3690 break;
3691
3692 case ARM_TYPE:
48229727 3693 case THUMB32_TYPE:
461a49ca
DJ		 3694 case DATA_TYPE:
3695 size += 4;
3696 break;
3697
3698 default:
3699 BFD_FAIL ();
3700 return FALSE;
3701 }
3702 }
3703
48229727 3704 if (stub_template)
d3ce72d0 3705 *stub_template = template_sequence;
48229727
JB		 3706
3707 if (stub_template_size)
3708 *stub_template_size = template_size;
3709
3710 return size;
3711}
3712
3713/* As above, but don't actually build the stub. Just bump offset so
3714 we know stub section sizes. */
3715
3716static bfd_boolean
3717arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3718 void * in_arg)
3719{
3720 struct elf32_arm_stub_hash_entry *stub_entry;
3721 struct elf32_arm_link_hash_table *htab;
d3ce72d0 3722 const insn_sequence *template_sequence;
48229727
JB		 3723 int template_size, size;
3724
3725 /* Massage our args to the form they really have. */
3726 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3727 htab = (struct elf32_arm_link_hash_table *) in_arg;
3728
3729 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3730 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3731
d3ce72d0 3732 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3733 &template_size);
3734
461a49ca 3735 stub_entry->stub_size = size;
d3ce72d0 3736 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3737 stub_entry->stub_template_size = template_size;
3738
906e58ca
NC		 3739 size = (size + 7) & ~7;
3740 stub_entry->stub_sec->size += size;
461a49ca 3741
906e58ca
NC		 3742 return TRUE;
3743}
3744
3745/* External entry points for sizing and building linker stubs. */
3746
3747/* Set up various things so that we can make a list of input sections
3748 for each output section included in the link. Returns -1 on error,
3749 0 when no stubs will be needed, and 1 on success. */
3750
3751int
3752elf32_arm_setup_section_lists (bfd *output_bfd,
3753 struct bfd_link_info *info)
3754{
3755 bfd *input_bfd;
3756 unsigned int bfd_count;
3757 int top_id, top_index;
3758 asection *section;
3759 asection **input_list, **list;
3760 bfd_size_type amt;
3761 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3762
4dfe6ac6
NC		 3763 if (htab == NULL)
3764 return 0;
906e58ca
NC		 3765 if (! is_elf_hash_table (htab))
3766 return 0;
3767
3768 /* Count the number of input BFDs and find the top input section id. */
3769 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3770 input_bfd != NULL;
3771 input_bfd = input_bfd->link_next)
3772 {
3773 bfd_count += 1;
3774 for (section = input_bfd->sections;
3775 section != NULL;
3776 section = section->next)
3777 {
3778 if (top_id < section->id)
3779 top_id = section->id;
3780 }
3781 }
3782 htab->bfd_count = bfd_count;
3783
3784 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3785 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3786 if (htab->stub_group == NULL)
3787 return -1;
fe33d2fa 3788 htab->top_id = top_id;
906e58ca
NC		 3789
3790 /* We can't use output_bfd->section_count here to find the top output
3791 section index as some sections may have been removed, and
3792 _bfd_strip_section_from_output doesn't renumber the indices. */
3793 for (section = output_bfd->sections, top_index = 0;
3794 section != NULL;
3795 section = section->next)
3796 {
3797 if (top_index < section->index)
3798 top_index = section->index;
3799 }
3800
3801 htab->top_index = top_index;
3802 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3803 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 3804 htab->input_list = input_list;
3805 if (input_list == NULL)
3806 return -1;
3807
3808 /* For sections we aren't interested in, mark their entries with a
3809 value we can check later. */
3810 list = input_list + top_index;
3811 do
3812 *list = bfd_abs_section_ptr;
3813 while (list-- != input_list);
3814
3815 for (section = output_bfd->sections;
3816 section != NULL;
3817 section = section->next)
3818 {
3819 if ((section->flags & SEC_CODE) != 0)
3820 input_list[section->index] = NULL;
3821 }
3822
3823 return 1;
3824}
3825
3826/* The linker repeatedly calls this function for each input section,
3827 in the order that input sections are linked into output sections.
3828 Build lists of input sections to determine groupings between which
3829 we may insert linker stubs. */
3830
3831void
3832elf32_arm_next_input_section (struct bfd_link_info *info,
3833 asection *isec)
3834{
3835 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3836
4dfe6ac6
NC		 3837 if (htab == NULL)
3838 return;
3839
906e58ca
NC		 3840 if (isec->output_section->index <= htab->top_index)
3841 {
3842 asection **list = htab->input_list + isec->output_section->index;
3843
a7470592 3844 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 3845 {
3846 /* Steal the link_sec pointer for our list. */
3847#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3848 /* This happens to make the list in reverse order,
07d72278 3849 which we reverse later. */
906e58ca
NC		 3850 PREV_SEC (isec) = *list;
3851 *list = isec;
3852 }
3853 }
3854}
3855
3856/* See whether we can group stub sections together. Grouping stub
3857 sections may result in fewer stubs. More importantly, we need to
07d72278 3858 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3859 .fini output sections respectively, because glibc splits the
3860 _init and _fini functions into multiple parts. Putting a stub in
3861 the middle of a function is not a good idea. */
3862
3863static void
3864group_sections (struct elf32_arm_link_hash_table *htab,
3865 bfd_size_type stub_group_size,
07d72278 3866 bfd_boolean stubs_always_after_branch)
906e58ca 3867{
07d72278 3868 asection **list = htab->input_list;
906e58ca
NC		 3869
3870 do
3871 {
3872 asection *tail = *list;
07d72278 3873 asection *head;
906e58ca
NC		 3874
3875 if (tail == bfd_abs_section_ptr)
3876 continue;
3877
07d72278
DJ		 3878 /* Reverse the list: we must avoid placing stubs at the
3879 beginning of the section because the beginning of the text
3880 section may be required for an interrupt vector in bare metal
3881 code. */
3882#define NEXT_SEC PREV_SEC
e780aef2
CL		 3883 head = NULL;
3884 while (tail != NULL)
3885 {
3886 /* Pop from tail. */
3887 asection *item = tail;
3888 tail = PREV_SEC (item);
3889
3890 /* Push on head. */
3891 NEXT_SEC (item) = head;
3892 head = item;
3893 }
07d72278
DJ		 3894
3895 while (head != NULL)
906e58ca
NC		 3896 {
3897 asection *curr;
07d72278 3898 asection *next;
e780aef2
CL		 3899 bfd_vma stub_group_start = head->output_offset;
3900 bfd_vma end_of_next;
906e58ca 3901
07d72278 3902 curr = head;
e780aef2 3903 while (NEXT_SEC (curr) != NULL)
8cd931b7 3904 {
e780aef2
CL		 3905 next = NEXT_SEC (curr);
3906 end_of_next = next->output_offset + next->size;
3907 if (end_of_next - stub_group_start >= stub_group_size)
3908 /* End of NEXT is too far from start, so stop. */
8cd931b7 3909 break;
e780aef2
CL		 3910 /* Add NEXT to the group. */
3911 curr = next;
8cd931b7 3912 }
906e58ca 3913
07d72278 3914 /* OK, the size from the start to the start of CURR is less
906e58ca 3915 than stub_group_size and thus can be handled by one stub
07d72278 3916 section. (Or the head section is itself larger than
906e58ca
NC		 3917 stub_group_size, in which case we may be toast.)
3918 We should really be keeping track of the total size of
3919 stubs added here, as stubs contribute to the final output
7fb9f789 3920 section size. */
906e58ca
NC		 3921 do
3922 {
07d72278 3923 next = NEXT_SEC (head);
906e58ca 3924 /* Set up this stub group. */
07d72278 3925 htab->stub_group[head->id].link_sec = curr;
906e58ca 3926 }
07d72278 3927 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3928
3929 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3930 bytes after the stub section can be handled by it too. */
3931 if (!stubs_always_after_branch)
906e58ca 3932 {
e780aef2
CL		 3933 stub_group_start = curr->output_offset + curr->size;
3934
8cd931b7 3935 while (next != NULL)
906e58ca 3936 {
e780aef2
CL		 3937 end_of_next = next->output_offset + next->size;
3938 if (end_of_next - stub_group_start >= stub_group_size)
3939 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3940 break;
e780aef2 3941 /* Add NEXT to the stub group. */
07d72278
DJ		 3942 head = next;
3943 next = NEXT_SEC (head);
3944 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3945 }
3946 }
07d72278 3947 head = next;
906e58ca
NC		 3948 }
3949 }
07d72278 3950 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3951
3952 free (htab->input_list);
3953#undef PREV_SEC
07d72278 3954#undef NEXT_SEC
906e58ca
NC		 3955}
3956
48229727
JB		 3957/* Comparison function for sorting/searching relocations relating to Cortex-A8
3958 erratum fix. */
3959
3960static int
3961a8_reloc_compare (const void *a, const void *b)
3962{
21d799b5
NC		 3963 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3964 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 3965
3966 if (ra->from < rb->from)
3967 return -1;
3968 else if (ra->from > rb->from)
3969 return 1;
3970 else
3971 return 0;
3972}
3973
3974static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3975 const char *, char **);
3976
3977/* Helper function to scan code for sequences which might trigger the Cortex-A8
3978 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3979 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3980 otherwise. */
3981
81694485
NC		 3982static bfd_boolean
3983cortex_a8_erratum_scan (bfd *input_bfd,
3984 struct bfd_link_info *info,
48229727
JB		 3985 struct a8_erratum_fix **a8_fixes_p,
3986 unsigned int *num_a8_fixes_p,
3987 unsigned int *a8_fix_table_size_p,
3988 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3989 unsigned int num_a8_relocs,
3990 unsigned prev_num_a8_fixes,
3991 bfd_boolean *stub_changed_p)
48229727
JB		 3992{
3993 asection *section;
3994 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3995 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3996 unsigned int num_a8_fixes = *num_a8_fixes_p;
3997 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3998
4dfe6ac6
NC		 3999 if (htab == NULL)
4000 return FALSE;
4001
48229727
JB		 4002 for (section = input_bfd->sections;
4003 section != NULL;
4004 section = section->next)
4005 {
4006 bfd_byte *contents = NULL;
4007 struct _arm_elf_section_data *sec_data;
4008 unsigned int span;
4009 bfd_vma base_vma;
4010
4011 if (elf_section_type (section) != SHT_PROGBITS
4012 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4013 || (section->flags & SEC_EXCLUDE) != 0
4014 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4015 || (section->output_section == bfd_abs_section_ptr))
4016 continue;
4017
4018 base_vma = section->output_section->vma + section->output_offset;
4019
4020 if (elf_section_data (section)->this_hdr.contents != NULL)
4021 contents = elf_section_data (section)->this_hdr.contents;
4022 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4023 return TRUE;
48229727
JB		 4024
4025 sec_data = elf32_arm_section_data (section);
4026
4027 for (span = 0; span < sec_data->mapcount; span++)
4028 {
4029 unsigned int span_start = sec_data->map[span].vma;
4030 unsigned int span_end = (span == sec_data->mapcount - 1)
4031 ? section->size : sec_data->map[span + 1].vma;
4032 unsigned int i;
4033 char span_type = sec_data->map[span].type;
4034 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4035
4036 if (span_type != 't')
4037 continue;
4038
4039 /* Span is entirely within a single 4KB region: skip scanning. */
4040 if (((base_vma + span_start) & ~0xfff)
4041 == ((base_vma + span_end) & ~0xfff))
4042 continue;
4043
4044 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4045
4046 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4047 * The branch target is in the same 4KB region as the
4048 first half of the branch.
4049 * The instruction before the branch is a 32-bit
81694485 4050 length non-branch instruction. */
48229727
JB		 4051 for (i = span_start; i < span_end;)
4052 {
4053 unsigned int insn = bfd_getl16 (&contents[i]);
4054 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4055 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4056
4057 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4058 insn_32bit = TRUE;
4059
4060 if (insn_32bit)
4061 {
4062 /* Load the rest of the insn (in manual-friendly order). */
4063 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4064
4065 /* Encoding T4: B<c>.W. */
4066 is_b = (insn & 0xf800d000) == 0xf0009000;
4067 /* Encoding T1: BL<c>.W. */
4068 is_bl = (insn & 0xf800d000) == 0xf000d000;
4069 /* Encoding T2: BLX<c>.W. */
4070 is_blx = (insn & 0xf800d000) == 0xf000c000;
4071 /* Encoding T3: B<c>.W (not permitted in IT block). */
4072 is_bcc = (insn & 0xf800d000) == 0xf0008000
4073 && (insn & 0x07f00000) != 0x03800000;
4074 }
4075
4076 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4077
81694485
NC		 4078 if (((base_vma + i) & 0xfff) == 0xffe
4079 && insn_32bit
4080 && is_32bit_branch
4081 && last_was_32bit
4082 && ! last_was_branch)
48229727 4083 {
8f73510c 4084 bfd_signed_vma offset = 0;
48229727
JB		 4085 bfd_boolean force_target_arm = FALSE;
4086 bfd_boolean force_target_thumb = FALSE;
4087 bfd_vma target;
4088 enum elf32_arm_stub_type stub_type = arm_stub_none;
4089 struct a8_erratum_reloc key, *found;
4090
4091 key.from = base_vma + i;
21d799b5
NC		 4092 found = (struct a8_erratum_reloc *)
4093 bsearch (&key, a8_relocs, num_a8_relocs,
4094 sizeof (struct a8_erratum_reloc),
4095 &a8_reloc_compare);
48229727
JB		 4096
4097 if (found)
4098 {
4099 char *error_message = NULL;
4100 struct elf_link_hash_entry *entry;
4101
4102 /* We don't care about the error returned from this
4103 function, only if there is glue or not. */
4104 entry = find_thumb_glue (info, found->sym_name,
4105 &error_message);
4106
4107 if (entry)
4108 found->non_a8_stub = TRUE;
4109
4110 if (found->r_type == R_ARM_THM_CALL
4111 && found->st_type != STT_ARM_TFUNC)
4112 force_target_arm = TRUE;
4113 else if (found->r_type == R_ARM_THM_CALL
4114 && found->st_type == STT_ARM_TFUNC)
4115 force_target_thumb = TRUE;
4116 }
4117
4118 /* Check if we have an offending branch instruction. */
4119
4120 if (found && found->non_a8_stub)
4121 /* We've already made a stub for this instruction, e.g.
4122 it's a long branch or a Thumb->ARM stub. Assume that
4123 stub will suffice to work around the A8 erratum (see
4124 setting of always_after_branch above). */
4125 ;
4126 else if (is_bcc)
4127 {
4128 offset = (insn & 0x7ff) << 1;
4129 offset |= (insn & 0x3f0000) >> 4;
4130 offset |= (insn & 0x2000) ? 0x40000 : 0;
4131 offset |= (insn & 0x800) ? 0x80000 : 0;
4132 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4133 if (offset & 0x100000)
81694485 4134 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4135 stub_type = arm_stub_a8_veneer_b_cond;
4136 }
4137 else if (is_b || is_bl || is_blx)
4138 {
4139 int s = (insn & 0x4000000) != 0;
4140 int j1 = (insn & 0x2000) != 0;
4141 int j2 = (insn & 0x800) != 0;
4142 int i1 = !(j1 ^ s);
4143 int i2 = !(j2 ^ s);
4144
4145 offset = (insn & 0x7ff) << 1;
4146 offset |= (insn & 0x3ff0000) >> 4;
4147 offset |= i2 << 22;
4148 offset |= i1 << 23;
4149 offset |= s << 24;
4150 if (offset & 0x1000000)
81694485 4151 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4152
4153 if (is_blx)
81694485 4154 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4155
4156 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4157 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4158 }
4159
4160 if (stub_type != arm_stub_none)
4161 {
4162 bfd_vma pc_for_insn = base_vma + i + 4;
4163
4164 /* The original instruction is a BL, but the target is
4165 an ARM instruction. If we were not making a stub,
4166 the BL would have been converted to a BLX. Use the
4167 BLX stub instead in that case. */
4168 if (htab->use_blx && force_target_arm
4169 && stub_type == arm_stub_a8_veneer_bl)
4170 {
4171 stub_type = arm_stub_a8_veneer_blx;
4172 is_blx = TRUE;
4173 is_bl = FALSE;
4174 }
4175 /* Conversely, if the original instruction was
4176 BLX but the target is Thumb mode, use the BL
4177 stub. */
4178 else if (force_target_thumb
4179 && stub_type == arm_stub_a8_veneer_blx)
4180 {
4181 stub_type = arm_stub_a8_veneer_bl;
4182 is_blx = FALSE;
4183 is_bl = TRUE;
4184 }
4185
4186 if (is_blx)
81694485 4187 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4188
4189 /* If we found a relocation, use the proper destination,
4190 not the offset in the (unrelocated) instruction.
4191 Note this is always done if we switched the stub type
4192 above. */
4193 if (found)
81694485
NC		 4194 offset =
4195 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4196
4197 target = pc_for_insn + offset;
4198
4199 /* The BLX stub is ARM-mode code. Adjust the offset to
4200 take the different PC value (+8 instead of +4) into
4201 account. */
4202 if (stub_type == arm_stub_a8_veneer_blx)
4203 offset += 4;
4204
4205 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4206 {
eb7c4339 4207 char *stub_name = NULL;
48229727
JB		 4208
4209 if (num_a8_fixes == a8_fix_table_size)
4210 {
4211 a8_fix_table_size *= 2;
21d799b5
NC		 4212 a8_fixes = (struct a8_erratum_fix *)
4213 bfd_realloc (a8_fixes,
4214 sizeof (struct a8_erratum_fix)
4215 * a8_fix_table_size);
48229727
JB		 4216 }
4217
eb7c4339
NS		 4218 if (num_a8_fixes < prev_num_a8_fixes)
4219 {
4220 /* If we're doing a subsequent scan,
4221 check if we've found the same fix as
4222 before, and try and reuse the stub
4223 name. */
4224 stub_name = a8_fixes[num_a8_fixes].stub_name;
4225 if ((a8_fixes[num_a8_fixes].section != section)
4226 || (a8_fixes[num_a8_fixes].offset != i))
4227 {
4228 free (stub_name);
4229 stub_name = NULL;
4230 *stub_changed_p = TRUE;
4231 }
4232 }
4233
4234 if (!stub_name)
4235 {
21d799b5 4236 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4237 if (stub_name != NULL)
4238 sprintf (stub_name, "%x:%x", section->id, i);
4239 }
48229727
JB		 4240
4241 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4242 a8_fixes[num_a8_fixes].section = section;
4243 a8_fixes[num_a8_fixes].offset = i;
4244 a8_fixes[num_a8_fixes].addend = offset;
4245 a8_fixes[num_a8_fixes].orig_insn = insn;
4246 a8_fixes[num_a8_fixes].stub_name = stub_name;
4247 a8_fixes[num_a8_fixes].stub_type = stub_type;
fe33d2fa
CL		 4248 a8_fixes[num_a8_fixes].st_type =
4249 is_blx ? STT_FUNC : STT_ARM_TFUNC;
48229727
JB		 4250
4251 num_a8_fixes++;
4252 }
4253 }
4254 }
4255
4256 i += insn_32bit ? 4 : 2;
4257 last_was_32bit = insn_32bit;
4258 last_was_branch = is_32bit_branch;
4259 }
4260 }
4261
4262 if (elf_section_data (section)->this_hdr.contents == NULL)
4263 free (contents);
4264 }
fe33d2fa 4265
48229727
JB		 4266 *a8_fixes_p = a8_fixes;
4267 *num_a8_fixes_p = num_a8_fixes;
4268 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4269
81694485 4270 return FALSE;
48229727
JB		 4271}
4272
906e58ca
NC		 4273/* Determine and set the size of the stub section for a final link.
4274
4275 The basic idea here is to examine all the relocations looking for
4276 PC-relative calls to a target that is unreachable with a "bl"
4277 instruction. */
4278
4279bfd_boolean
4280elf32_arm_size_stubs (bfd *output_bfd,
4281 bfd *stub_bfd,
4282 struct bfd_link_info *info,
4283 bfd_signed_vma group_size,
4284 asection * (*add_stub_section) (const char *, asection *),
4285 void (*layout_sections_again) (void))
4286{
4287 bfd_size_type stub_group_size;
07d72278 4288 bfd_boolean stubs_always_after_branch;
906e58ca 4289 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4290 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4291 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4292 struct a8_erratum_reloc *a8_relocs = NULL;
4293 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4294
4dfe6ac6
NC		 4295 if (htab == NULL)
4296 return FALSE;
4297
48229727
JB		 4298 if (htab->fix_cortex_a8)
4299 {
21d799b5
NC		 4300 a8_fixes = (struct a8_erratum_fix *)
4301 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4302 a8_relocs = (struct a8_erratum_reloc *)
4303 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4304 }
906e58ca
NC		 4305
4306 /* Propagate mach to stub bfd, because it may not have been
4307 finalized when we created stub_bfd. */
4308 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4309 bfd_get_mach (output_bfd));
4310
4311 /* Stash our params away. */
4312 htab->stub_bfd = stub_bfd;
4313 htab->add_stub_section = add_stub_section;
4314 htab->layout_sections_again = layout_sections_again;
07d72278 4315 stubs_always_after_branch = group_size < 0;
48229727
JB		 4316
4317 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4318 as the first half of a 32-bit branch straddling two 4K pages. This is a
4319 crude way of enforcing that. */
4320 if (htab->fix_cortex_a8)
4321 stubs_always_after_branch = 1;
4322
906e58ca
NC		 4323 if (group_size < 0)
4324 stub_group_size = -group_size;
4325 else
4326 stub_group_size = group_size;
4327
4328 if (stub_group_size == 1)
4329 {
4330 /* Default values. */
4331 /* Thumb branch range is +-4MB has to be used as the default
4332 maximum size (a given section can contain both ARM and Thumb
4333 code, so the worst case has to be taken into account).
4334
4335 This value is 24K less than that, which allows for 2025
4336 12-byte stubs. If we exceed that, then we will fail to link.
4337 The user will have to relink with an explicit group size
4338 option. */
4339 stub_group_size = 4170000;
4340 }
4341
07d72278 4342 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4343
3ae046cc
NS		 4344 /* If we're applying the cortex A8 fix, we need to determine the
4345 program header size now, because we cannot change it later --
4346 that could alter section placements. Notice the A8 erratum fix
4347 ends up requiring the section addresses to remain unchanged
4348 modulo the page size. That's something we cannot represent
4349 inside BFD, and we don't want to force the section alignment to
4350 be the page size. */
4351 if (htab->fix_cortex_a8)
4352 (*htab->layout_sections_again) ();
4353
906e58ca
NC		 4354 while (1)
4355 {
4356 bfd *input_bfd;
4357 unsigned int bfd_indx;
4358 asection *stub_sec;
eb7c4339
NS		 4359 bfd_boolean stub_changed = FALSE;
4360 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4361
48229727 4362 num_a8_fixes = 0;
906e58ca
NC		 4363 for (input_bfd = info->input_bfds, bfd_indx = 0;
4364 input_bfd != NULL;
4365 input_bfd = input_bfd->link_next, bfd_indx++)
4366 {
4367 Elf_Internal_Shdr *symtab_hdr;
4368 asection *section;
4369 Elf_Internal_Sym *local_syms = NULL;
4370
48229727
JB		 4371 num_a8_relocs = 0;
4372
906e58ca
NC		 4373 /* We'll need the symbol table in a second. */
4374 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4375 if (symtab_hdr->sh_info == 0)
4376 continue;
4377
4378 /* Walk over each section attached to the input bfd. */
4379 for (section = input_bfd->sections;
4380 section != NULL;
4381 section = section->next)
4382 {
4383 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4384
4385 /* If there aren't any relocs, then there's nothing more
4386 to do. */
4387 if ((section->flags & SEC_RELOC) == 0
4388 || section->reloc_count == 0
4389 || (section->flags & SEC_CODE) == 0)
4390 continue;
4391
4392 /* If this section is a link-once section that will be
4393 discarded, then don't create any stubs. */
4394 if (section->output_section == NULL
4395 || section->output_section->owner != output_bfd)
4396 continue;
4397
4398 /* Get the relocs. */
4399 internal_relocs
4400 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4401 NULL, info->keep_memory);
4402 if (internal_relocs == NULL)
4403 goto error_ret_free_local;
4404
4405 /* Now examine each relocation. */
4406 irela = internal_relocs;
4407 irelaend = irela + section->reloc_count;
4408 for (; irela < irelaend; irela++)
4409 {
4410 unsigned int r_type, r_indx;
4411 enum elf32_arm_stub_type stub_type;
4412 struct elf32_arm_stub_hash_entry *stub_entry;
4413 asection *sym_sec;
4414 bfd_vma sym_value;
4415 bfd_vma destination;
4416 struct elf32_arm_link_hash_entry *hash;
7413f23f 4417 const char *sym_name;
906e58ca
NC		 4418 char *stub_name;
4419 const asection *id_sec;
fe33d2fa 4420 int st_type;
48229727 4421 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4422
4423 r_type = ELF32_R_TYPE (irela->r_info);
4424 r_indx = ELF32_R_SYM (irela->r_info);
4425
4426 if (r_type >= (unsigned int) R_ARM_max)
4427 {
4428 bfd_set_error (bfd_error_bad_value);
4429 error_ret_free_internal:
4430 if (elf_section_data (section)->relocs == NULL)
4431 free (internal_relocs);
4432 goto error_ret_free_local;
4433 }
4434
155d87d7 4435 /* Only look for stubs on branch instructions. */
906e58ca 4436 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4437 && (r_type != (unsigned int) R_ARM_THM_CALL)
4438 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4439 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4440 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4441 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4442 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4443 continue;
4444
4445 /* Now determine the call target, its name, value,
4446 section. */
4447 sym_sec = NULL;
4448 sym_value = 0;
4449 destination = 0;
4450 hash = NULL;
7413f23f 4451 sym_name = NULL;
906e58ca
NC		 4452 if (r_indx < symtab_hdr->sh_info)
4453 {
4454 /* It's a local symbol. */
4455 Elf_Internal_Sym *sym;
4456 Elf_Internal_Shdr *hdr;
4457
4458 if (local_syms == NULL)
4459 {
4460 local_syms
4461 = (Elf_Internal_Sym *) symtab_hdr->contents;
4462 if (local_syms == NULL)
4463 local_syms
4464 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4465 symtab_hdr->sh_info, 0,
4466 NULL, NULL, NULL);
4467 if (local_syms == NULL)
4468 goto error_ret_free_internal;
4469 }
4470
4471 sym = local_syms + r_indx;
4472 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4473 sym_sec = hdr->bfd_section;
ffcb4889
NS		 4474 if (!sym_sec)
4475 /* This is an undefined symbol. It can never
4476 be resolved. */
4477 continue;
fe33d2fa 4478
906e58ca
NC		 4479 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4480 sym_value = sym->st_value;
4481 destination = (sym_value + irela->r_addend
4482 + sym_sec->output_offset
4483 + sym_sec->output_section->vma);
4484 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4485 sym_name
4486 = bfd_elf_string_from_elf_section (input_bfd,
4487 symtab_hdr->sh_link,
4488 sym->st_name);
906e58ca
NC		 4489 }
4490 else
4491 {
4492 /* It's an external symbol. */
4493 int e_indx;
4494
4495 e_indx = r_indx - symtab_hdr->sh_info;
4496 hash = ((struct elf32_arm_link_hash_entry *)
4497 elf_sym_hashes (input_bfd)[e_indx]);
4498
4499 while (hash->root.root.type == bfd_link_hash_indirect
4500 || hash->root.root.type == bfd_link_hash_warning)
4501 hash = ((struct elf32_arm_link_hash_entry *)
4502 hash->root.root.u.i.link);
4503
4504 if (hash->root.root.type == bfd_link_hash_defined
4505 || hash->root.root.type == bfd_link_hash_defweak)
4506 {
4507 sym_sec = hash->root.root.u.def.section;
4508 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4509
4510 struct elf32_arm_link_hash_table *globals =
4511 elf32_arm_hash_table (info);
4512
4513 /* For a destination in a shared library,
4514 use the PLT stub as target address to
4515 decide whether a branch stub is
4516 needed. */
4dfe6ac6
NC		 4517 if (globals != NULL
4518 && globals->splt != NULL
4519 && hash != NULL
022f8312
CL		 4520 && hash->root.plt.offset != (bfd_vma) -1)
4521 {
4522 sym_sec = globals->splt;
4523 sym_value = hash->root.plt.offset;
4524 if (sym_sec->output_section != NULL)
4525 destination = (sym_value
4526 + sym_sec->output_offset
4527 + sym_sec->output_section->vma);
4528 }
4529 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4530 destination = (sym_value + irela->r_addend
4531 + sym_sec->output_offset
4532 + sym_sec->output_section->vma);
4533 }
69c5861e
CL		 4534 else if ((hash->root.root.type == bfd_link_hash_undefined)
4535 || (hash->root.root.type == bfd_link_hash_undefweak))
4536 {
4537 /* For a shared library, use the PLT stub as
4538 target address to decide whether a long
4539 branch stub is needed.
4540 For absolute code, they cannot be handled. */
4541 struct elf32_arm_link_hash_table *globals =
4542 elf32_arm_hash_table (info);
4543
4dfe6ac6
NC		 4544 if (globals != NULL
4545 && globals->splt != NULL
4546 && hash != NULL
69c5861e
CL		 4547 && hash->root.plt.offset != (bfd_vma) -1)
4548 {
4549 sym_sec = globals->splt;
4550 sym_value = hash->root.plt.offset;
4551 if (sym_sec->output_section != NULL)
4552 destination = (sym_value
4553 + sym_sec->output_offset
4554 + sym_sec->output_section->vma);
4555 }
4556 else
4557 continue;
4558 }
906e58ca
NC		 4559 else
4560 {
4561 bfd_set_error (bfd_error_bad_value);
4562 goto error_ret_free_internal;
4563 }
4564 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4565 sym_name = hash->root.root.root.string;
906e58ca
NC		 4566 }
4567
48229727 4568 do
7413f23f 4569 {
48229727
JB		 4570 /* Determine what (if any) linker stub is needed. */
4571 stub_type = arm_type_of_stub (info, section, irela,
fe33d2fa 4572 &st_type, hash,
48229727
JB		 4573 destination, sym_sec,
4574 input_bfd, sym_name);
4575 if (stub_type == arm_stub_none)
4576 break;
4577
4578 /* Support for grouping stub sections. */
4579 id_sec = htab->stub_group[section->id].link_sec;
4580
4581 /* Get the name of this stub. */
4582 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4583 irela, stub_type);
48229727
JB		 4584 if (!stub_name)
4585 goto error_ret_free_internal;
4586
4587 /* We've either created a stub for this reloc already,
4588 or we are about to. */
4589 created_stub = TRUE;
4590
4591 stub_entry = arm_stub_hash_lookup
4592 (&htab->stub_hash_table, stub_name,
4593 FALSE, FALSE);
4594 if (stub_entry != NULL)
4595 {
4596 /* The proper stub has already been created. */
4597 free (stub_name);
eb7c4339 4598 stub_entry->target_value = sym_value;
48229727
JB		 4599 break;
4600 }
7413f23f 4601
48229727
JB		 4602 stub_entry = elf32_arm_add_stub (stub_name, section,
4603 htab);
4604 if (stub_entry == NULL)
4605 {
4606 free (stub_name);
4607 goto error_ret_free_internal;
4608 }
7413f23f 4609
48229727
JB		 4610 stub_entry->target_value = sym_value;
4611 stub_entry->target_section = sym_sec;
4612 stub_entry->stub_type = stub_type;
4613 stub_entry->h = hash;
4614 stub_entry->st_type = st_type;
4615
4616 if (sym_name == NULL)
4617 sym_name = "unnamed";
21d799b5
NC		 4618 stub_entry->output_name = (char *)
4619 bfd_alloc (htab->stub_bfd,
48229727
JB		 4620 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4621 + strlen (sym_name));
4622 if (stub_entry->output_name == NULL)
4623 {
4624 free (stub_name);
4625 goto error_ret_free_internal;
4626 }
4627
4628 /* For historical reasons, use the existing names for
4629 ARM-to-Thumb and Thumb-to-ARM stubs. */
4630 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4631 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4632 && st_type != STT_ARM_TFUNC)
4633 sprintf (stub_entry->output_name,
4634 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4635 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4636 || (r_type == (unsigned int) R_ARM_JUMP24))
4637 && st_type == STT_ARM_TFUNC)
4638 sprintf (stub_entry->output_name,
4639 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4640 else
4641 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4642 sym_name);
4643
4644 stub_changed = TRUE;
4645 }
4646 while (0);
4647
4648 /* Look for relocations which might trigger Cortex-A8
4649 erratum. */
4650 if (htab->fix_cortex_a8
4651 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4652 || r_type == (unsigned int) R_ARM_THM_JUMP19
4653 || r_type == (unsigned int) R_ARM_THM_CALL
4654 || r_type == (unsigned int) R_ARM_THM_XPC22))
4655 {
4656 bfd_vma from = section->output_section->vma
4657 + section->output_offset
4658 + irela->r_offset;
4659
4660 if ((from & 0xfff) == 0xffe)
4661 {
4662 /* Found a candidate. Note we haven't checked the
4663 destination is within 4K here: if we do so (and
4664 don't create an entry in a8_relocs) we can't tell
4665 that a branch should have been relocated when
4666 scanning later. */
4667 if (num_a8_relocs == a8_reloc_table_size)
4668 {
4669 a8_reloc_table_size *= 2;
21d799b5
NC		 4670 a8_relocs = (struct a8_erratum_reloc *)
4671 bfd_realloc (a8_relocs,
4672 sizeof (struct a8_erratum_reloc)
4673 * a8_reloc_table_size);
48229727
JB		 4674 }
4675
4676 a8_relocs[num_a8_relocs].from = from;
4677 a8_relocs[num_a8_relocs].destination = destination;
4678 a8_relocs[num_a8_relocs].r_type = r_type;
4679 a8_relocs[num_a8_relocs].st_type = st_type;
4680 a8_relocs[num_a8_relocs].sym_name = sym_name;
4681 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4682
4683 num_a8_relocs++;
4684 }
4685 }
906e58ca
NC		 4686 }
4687
48229727
JB		 4688 /* We're done with the internal relocs, free them. */
4689 if (elf_section_data (section)->relocs == NULL)
4690 free (internal_relocs);
4691 }
4692
4693 if (htab->fix_cortex_a8)
4694 {
4695 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4696 qsort (a8_relocs, num_a8_relocs,
4697 sizeof (struct a8_erratum_reloc),
48229727
JB		 4698 &a8_reloc_compare);
4699
4700 /* Scan for branches which might trigger Cortex-A8 erratum. */
4701 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4702 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4703 a8_relocs, num_a8_relocs,
4704 prev_num_a8_fixes, &stub_changed)
4705 != 0)
48229727 4706 goto error_ret_free_local;
5e681ec4 4707 }
5e681ec4
PB		 4708 }
4709
eb7c4339 4710 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4711 stub_changed = TRUE;
4712
906e58ca
NC		 4713 if (!stub_changed)
4714 break;
5e681ec4 4715
906e58ca
NC		 4716 /* OK, we've added some stubs. Find out the new size of the
4717 stub sections. */
4718 for (stub_sec = htab->stub_bfd->sections;
4719 stub_sec != NULL;
4720 stub_sec = stub_sec->next)
3e6b1042
DJ		 4721 {
4722 /* Ignore non-stub sections. */
4723 if (!strstr (stub_sec->name, STUB_SUFFIX))
4724 continue;
4725
4726 stub_sec->size = 0;
4727 }
b34b2d70 4728
906e58ca
NC		 4729 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4730
48229727
JB		 4731 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4732 if (htab->fix_cortex_a8)
4733 for (i = 0; i < num_a8_fixes; i++)
4734 {
4735 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4736 a8_fixes[i].section, htab);
4737
4738 if (stub_sec == NULL)
4739 goto error_ret_free_local;
4740
4741 stub_sec->size
4742 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4743 NULL);
4744 }
4745
4746
906e58ca
NC		 4747 /* Ask the linker to do its stuff. */
4748 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4749 }
4750
48229727
JB		 4751 /* Add stubs for Cortex-A8 erratum fixes now. */
4752 if (htab->fix_cortex_a8)
4753 {
4754 for (i = 0; i < num_a8_fixes; i++)
4755 {
4756 struct elf32_arm_stub_hash_entry *stub_entry;
4757 char *stub_name = a8_fixes[i].stub_name;
4758 asection *section = a8_fixes[i].section;
4759 unsigned int section_id = a8_fixes[i].section->id;
4760 asection *link_sec = htab->stub_group[section_id].link_sec;
4761 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4762 const insn_sequence *template_sequence;
48229727
JB		 4763 int template_size, size = 0;
4764
4765 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4766 TRUE, FALSE);
4767 if (stub_entry == NULL)
4768 {
4769 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4770 section->owner,
4771 stub_name);
4772 return FALSE;
4773 }
4774
4775 stub_entry->stub_sec = stub_sec;
4776 stub_entry->stub_offset = 0;
4777 stub_entry->id_sec = link_sec;
4778 stub_entry->stub_type = a8_fixes[i].stub_type;
4779 stub_entry->target_section = a8_fixes[i].section;
4780 stub_entry->target_value = a8_fixes[i].offset;
4781 stub_entry->target_addend = a8_fixes[i].addend;
4782 stub_entry->orig_insn = a8_fixes[i].orig_insn;
fe33d2fa 4783 stub_entry->st_type = a8_fixes[i].st_type;
48229727 4784
d3ce72d0
NC		 4785 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4786 &template_sequence,
48229727
JB		 4787 &template_size);
4788
4789 stub_entry->stub_size = size;
d3ce72d0 4790 stub_entry->stub_template = template_sequence;
48229727
JB		 4791 stub_entry->stub_template_size = template_size;
4792 }
4793
4794 /* Stash the Cortex-A8 erratum fix array for use later in
4795 elf32_arm_write_section(). */
4796 htab->a8_erratum_fixes = a8_fixes;
4797 htab->num_a8_erratum_fixes = num_a8_fixes;
4798 }
4799 else
4800 {
4801 htab->a8_erratum_fixes = NULL;
4802 htab->num_a8_erratum_fixes = 0;
4803 }
906e58ca
NC		 4804 return TRUE;
4805
4806 error_ret_free_local:
4807 return FALSE;
5e681ec4
PB		 4808}
4809
906e58ca
NC		 4810/* Build all the stubs associated with the current output file. The
4811 stubs are kept in a hash table attached to the main linker hash
4812 table. We also set up the .plt entries for statically linked PIC
4813 functions here. This function is called via arm_elf_finish in the
4814 linker. */
252b5132 4815
906e58ca
NC		 4816bfd_boolean
4817elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4818{
906e58ca
NC		 4819 asection *stub_sec;
4820 struct bfd_hash_table *table;
4821 struct elf32_arm_link_hash_table *htab;
252b5132 4822
906e58ca 4823 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4824 if (htab == NULL)
4825 return FALSE;
252b5132 4826
906e58ca
NC		 4827 for (stub_sec = htab->stub_bfd->sections;
4828 stub_sec != NULL;
4829 stub_sec = stub_sec->next)
252b5132 4830 {
906e58ca
NC		 4831 bfd_size_type size;
4832
8029a119 4833 /* Ignore non-stub sections. */
906e58ca
NC		 4834 if (!strstr (stub_sec->name, STUB_SUFFIX))
4835 continue;
4836
4837 /* Allocate memory to hold the linker stubs. */
4838 size = stub_sec->size;
21d799b5 4839 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 4840 if (stub_sec->contents == NULL && size != 0)
4841 return FALSE;
4842 stub_sec->size = 0;
252b5132
RH		 4843 }
4844
906e58ca
NC		 4845 /* Build the stubs as directed by the stub hash table. */
4846 table = &htab->stub_hash_table;
4847 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4848 if (htab->fix_cortex_a8)
4849 {
4850 /* Place the cortex a8 stubs last. */
4851 htab->fix_cortex_a8 = -1;
4852 bfd_hash_traverse (table, arm_build_one_stub, info);
4853 }
252b5132 4854
906e58ca 4855 return TRUE;
252b5132
RH		 4856}
4857
9b485d32
NC		 4858/* Locate the Thumb encoded calling stub for NAME. */
4859
252b5132 4860static struct elf_link_hash_entry *
57e8b36a
NC		 4861find_thumb_glue (struct bfd_link_info *link_info,
4862 const char *name,
f2a9dd69 4863 char **error_message)
252b5132
RH		 4864{
4865 char *tmp_name;
4866 struct elf_link_hash_entry *hash;
4867 struct elf32_arm_link_hash_table *hash_table;
4868
4869 /* We need a pointer to the armelf specific hash table. */
4870 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4871 if (hash_table == NULL)
4872 return NULL;
252b5132 4873
21d799b5
NC		 4874 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4875 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4876
4877 BFD_ASSERT (tmp_name);
4878
4879 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4880
4881 hash = elf_link_hash_lookup
b34976b6 4882 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4883
b1657152
AM		 4884 if (hash == NULL
4885 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4886 tmp_name, name) == -1)
4887 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4888
4889 free (tmp_name);
4890
4891 return hash;
4892}
4893
9b485d32
NC		 4894/* Locate the ARM encoded calling stub for NAME. */
4895
252b5132 4896static struct elf_link_hash_entry *
57e8b36a
NC		 4897find_arm_glue (struct bfd_link_info *link_info,
4898 const char *name,
f2a9dd69 4899 char **error_message)
252b5132
RH		 4900{
4901 char *tmp_name;
4902 struct elf_link_hash_entry *myh;
4903 struct elf32_arm_link_hash_table *hash_table;
4904
4905 /* We need a pointer to the elfarm specific hash table. */
4906 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4907 if (hash_table == NULL)
4908 return NULL;
252b5132 4909
21d799b5
NC		 4910 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4911 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4912
4913 BFD_ASSERT (tmp_name);
4914
4915 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4916
4917 myh = elf_link_hash_lookup
b34976b6 4918 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4919
b1657152
AM		 4920 if (myh == NULL
4921 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4922 tmp_name, name) == -1)
4923 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4924
4925 free (tmp_name);
4926
4927 return myh;
4928}
4929
8f6277f5 4930/* ARM->Thumb glue (static images):
252b5132
RH		 4931
4932 .arm
4933 __func_from_arm:
4934 ldr r12, __func_addr
4935 bx r12
4936 __func_addr:
906e58ca 4937 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4938
26079076
PB		 4939 (v5t static images)
4940 .arm
4941 __func_from_arm:
4942 ldr pc, __func_addr
4943 __func_addr:
906e58ca 4944 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4945
8f6277f5
PB		 4946 (relocatable images)
4947 .arm
4948 __func_from_arm:
4949 ldr r12, __func_offset
4950 add r12, r12, pc
4951 bx r12
4952 __func_offset:
8029a119 4953 .word func - . */
8f6277f5
PB		 4954
4955#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4956static const insn32 a2t1_ldr_insn = 0xe59fc000;
4957static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4958static const insn32 a2t3_func_addr_insn = 0x00000001;
4959
26079076
PB		 4960#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4961static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4962static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4963
8f6277f5
PB		 4964#define ARM2THUMB_PIC_GLUE_SIZE 16
4965static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4966static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4967static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4968
9b485d32 4969/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4970
8029a119
NC		 4971 .thumb .thumb
4972 .align 2 .align 2
4973 __func_from_thumb: __func_from_thumb:
4974 bx pc push {r6, lr}
4975 nop ldr r6, __func_addr
4976 .arm mov lr, pc
4977 b func bx r6
fcef9eb7
NC		 4978 .arm
4979 ;; back_to_thumb
4980 ldmia r13! {r6, lr}
4981 bx lr
8029a119
NC		 4982 __func_addr:
4983 .word func */
252b5132
RH		 4984
4985#define THUMB2ARM_GLUE_SIZE 8
4986static const insn16 t2a1_bx_pc_insn = 0x4778;
4987static const insn16 t2a2_noop_insn = 0x46c0;
4988static const insn32 t2a3_b_insn = 0xea000000;
4989
c7b8f16e
JB		 4990#define VFP11_ERRATUM_VENEER_SIZE 8
4991
845b51d6
PB		 4992#define ARM_BX_VENEER_SIZE 12
4993static const insn32 armbx1_tst_insn = 0xe3100001;
4994static const insn32 armbx2_moveq_insn = 0x01a0f000;
4995static const insn32 armbx3_bx_insn = 0xe12fff10;
4996
7e392df6 4997#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4998static void
4999arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5000{
5001 asection * s;
8029a119 5002 bfd_byte * contents;
252b5132 5003
8029a119 5004 if (size == 0)
3e6b1042
DJ		 5005 {
5006 /* Do not include empty glue sections in the output. */
5007 if (abfd != NULL)
5008 {
5009 s = bfd_get_section_by_name (abfd, name);
5010 if (s != NULL)
5011 s->flags |= SEC_EXCLUDE;
5012 }
5013 return;
5014 }
252b5132 5015
8029a119 5016 BFD_ASSERT (abfd != NULL);
252b5132 5017
8029a119
NC		 5018 s = bfd_get_section_by_name (abfd, name);
5019 BFD_ASSERT (s != NULL);
252b5132 5020
21d799b5 5021 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5022
8029a119
NC		 5023 BFD_ASSERT (s->size == size);
5024 s->contents = contents;
5025}
906e58ca 5026
8029a119
NC		 5027bfd_boolean
5028bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5029{
5030 struct elf32_arm_link_hash_table * globals;
906e58ca 5031
8029a119
NC		 5032 globals = elf32_arm_hash_table (info);
5033 BFD_ASSERT (globals != NULL);
906e58ca 5034
8029a119
NC		 5035 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5036 globals->arm_glue_size,
5037 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5038
8029a119
NC		 5039 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5040 globals->thumb_glue_size,
5041 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5042
8029a119
NC		 5043 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5044 globals->vfp11_erratum_glue_size,
5045 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5046
8029a119
NC		 5047 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5048 globals->bx_glue_size,
845b51d6
PB		 5049 ARM_BX_GLUE_SECTION_NAME);
5050
b34976b6 5051 return TRUE;
252b5132
RH		 5052}
5053
a4fd1a8e 5054/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5055 returns the symbol identifying the stub. */
5056
a4fd1a8e 5057static struct elf_link_hash_entry *
57e8b36a
NC		 5058record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5059 struct elf_link_hash_entry * h)
252b5132
RH		 5060{
5061 const char * name = h->root.root.string;
63b0f745 5062 asection * s;
252b5132
RH		 5063 char * tmp_name;
5064 struct elf_link_hash_entry * myh;
14a793b2 5065 struct bfd_link_hash_entry * bh;
252b5132 5066 struct elf32_arm_link_hash_table * globals;
dc810e39 5067 bfd_vma val;
2f475487 5068 bfd_size_type size;
252b5132
RH		 5069
5070 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5071 BFD_ASSERT (globals != NULL);
5072 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5073
5074 s = bfd_get_section_by_name
5075 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5076
252b5132
RH		 5077 BFD_ASSERT (s != NULL);
5078
21d799b5
NC		 5079 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5080 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5081
5082 BFD_ASSERT (tmp_name);
5083
5084 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5085
5086 myh = elf_link_hash_lookup
b34976b6 5087 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5088
5089 if (myh != NULL)
5090 {
9b485d32 5091 /* We've already seen this guy. */
252b5132 5092 free (tmp_name);
a4fd1a8e 5093 return myh;
252b5132
RH		 5094 }
5095
57e8b36a
NC		 5096 /* The only trick here is using hash_table->arm_glue_size as the value.
5097 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5098 putting it. The +1 on the value marks that the stub has not been
5099 output yet - not that it is a Thumb function. */
14a793b2 5100 bh = NULL;
dc810e39
AM		 5101 val = globals->arm_glue_size + 1;
5102 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5103 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5104 NULL, TRUE, FALSE, &bh);
252b5132 5105
b7693d02
DJ		 5106 myh = (struct elf_link_hash_entry *) bh;
5107 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5108 myh->forced_local = 1;
5109
252b5132
RH		 5110 free (tmp_name);
5111
27e55c4d
PB		 5112 if (link_info->shared || globals->root.is_relocatable_executable
5113 || globals->pic_veneer)
2f475487 5114 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5115 else if (globals->use_blx)
5116 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5117 else
2f475487
AM		 5118 size = ARM2THUMB_STATIC_GLUE_SIZE;
5119
5120 s->size += size;
5121 globals->arm_glue_size += size;
252b5132 5122
a4fd1a8e 5123 return myh;
252b5132
RH		 5124}
5125
845b51d6
PB		 5126/* Allocate space for ARMv4 BX veneers. */
5127
5128static void
5129record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5130{
5131 asection * s;
5132 struct elf32_arm_link_hash_table *globals;
5133 char *tmp_name;
5134 struct elf_link_hash_entry *myh;
5135 struct bfd_link_hash_entry *bh;
5136 bfd_vma val;
5137
5138 /* BX PC does not need a veneer. */
5139 if (reg == 15)
5140 return;
5141
5142 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5143 BFD_ASSERT (globals != NULL);
5144 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5145
5146 /* Check if this veneer has already been allocated. */
5147 if (globals->bx_glue_offset[reg])
5148 return;
5149
5150 s = bfd_get_section_by_name
5151 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5152
5153 BFD_ASSERT (s != NULL);
5154
5155 /* Add symbol for veneer. */
21d799b5
NC		 5156 tmp_name = (char *)
5157 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5158
845b51d6 5159 BFD_ASSERT (tmp_name);
906e58ca 5160
845b51d6 5161 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5162
845b51d6
PB		 5163 myh = elf_link_hash_lookup
5164 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5165
845b51d6 5166 BFD_ASSERT (myh == NULL);
906e58ca 5167
845b51d6
PB		 5168 bh = NULL;
5169 val = globals->bx_glue_size;
5170 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5171 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5172 NULL, TRUE, FALSE, &bh);
5173
5174 myh = (struct elf_link_hash_entry *) bh;
5175 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5176 myh->forced_local = 1;
5177
5178 s->size += ARM_BX_VENEER_SIZE;
5179 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5180 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5181}
5182
5183
c7b8f16e
JB		 5184/* Add an entry to the code/data map for section SEC. */
5185
5186static void
5187elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5188{
5189 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5190 unsigned int newidx;
906e58ca 5191
c7b8f16e
JB		 5192 if (sec_data->map == NULL)
5193 {
21d799b5
NC		 5194 sec_data->map = (elf32_arm_section_map *)
5195 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5196 sec_data->mapcount = 0;
5197 sec_data->mapsize = 1;
5198 }
906e58ca 5199
c7b8f16e 5200 newidx = sec_data->mapcount++;
906e58ca 5201
c7b8f16e
JB		 5202 if (sec_data->mapcount > sec_data->mapsize)
5203 {
5204 sec_data->mapsize *= 2;
21d799b5
NC		 5205 sec_data->map = (elf32_arm_section_map *)
5206 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5207 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5208 }
5209
5210 if (sec_data->map)
5211 {
5212 sec_data->map[newidx].vma = vma;
5213 sec_data->map[newidx].type = type;
c7b8f16e 5214 }
c7b8f16e
JB		 5215}
5216
5217
5218/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5219 veneers are handled for now. */
5220
5221static bfd_vma
5222record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5223 elf32_vfp11_erratum_list *branch,
5224 bfd *branch_bfd,
5225 asection *branch_sec,
5226 unsigned int offset)
5227{
5228 asection *s;
5229 struct elf32_arm_link_hash_table *hash_table;
5230 char *tmp_name;
5231 struct elf_link_hash_entry *myh;
5232 struct bfd_link_hash_entry *bh;
5233 bfd_vma val;
5234 struct _arm_elf_section_data *sec_data;
5235 int errcount;
5236 elf32_vfp11_erratum_list *newerr;
906e58ca 5237
c7b8f16e 5238 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5239 BFD_ASSERT (hash_table != NULL);
5240 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5241
c7b8f16e
JB		 5242 s = bfd_get_section_by_name
5243 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5244
c7b8f16e 5245 sec_data = elf32_arm_section_data (s);
906e58ca 5246
c7b8f16e 5247 BFD_ASSERT (s != NULL);
906e58ca 5248
21d799b5
NC		 5249 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5250 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5251
c7b8f16e 5252 BFD_ASSERT (tmp_name);
906e58ca 5253
c7b8f16e
JB		 5254 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5255 hash_table->num_vfp11_fixes);
906e58ca 5256
c7b8f16e
JB		 5257 myh = elf_link_hash_lookup
5258 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5259
c7b8f16e 5260 BFD_ASSERT (myh == NULL);
906e58ca 5261
c7b8f16e
JB		 5262 bh = NULL;
5263 val = hash_table->vfp11_erratum_glue_size;
5264 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5265 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5266 NULL, TRUE, FALSE, &bh);
5267
5268 myh = (struct elf_link_hash_entry *) bh;
5269 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5270 myh->forced_local = 1;
5271
5272 /* Link veneer back to calling location. */
5273 errcount = ++(sec_data->erratumcount);
21d799b5
NC		 5274 newerr = (elf32_vfp11_erratum_list *)
5275 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5276
c7b8f16e
JB		 5277 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5278 newerr->vma = -1;
5279 newerr->u.v.branch = branch;
5280 newerr->u.v.id = hash_table->num_vfp11_fixes;
5281 branch->u.b.veneer = newerr;
5282
5283 newerr->next = sec_data->erratumlist;
5284 sec_data->erratumlist = newerr;
5285
5286 /* A symbol for the return from the veneer. */
5287 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5288 hash_table->num_vfp11_fixes);
5289
5290 myh = elf_link_hash_lookup
5291 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5292
c7b8f16e
JB		 5293 if (myh != NULL)
5294 abort ();
5295
5296 bh = NULL;
5297 val = offset + 4;
5298 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5299 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5300
c7b8f16e
JB		 5301 myh = (struct elf_link_hash_entry *) bh;
5302 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5303 myh->forced_local = 1;
5304
5305 free (tmp_name);
906e58ca 5306
c7b8f16e
JB		 5307 /* Generate a mapping symbol for the veneer section, and explicitly add an
5308 entry for that symbol to the code/data map for the section. */
5309 if (hash_table->vfp11_erratum_glue_size == 0)
5310 {
5311 bh = NULL;
5312 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5313 ever requires this erratum fix. */
5314 _bfd_generic_link_add_one_symbol (link_info,
5315 hash_table->bfd_of_glue_owner, "$a",
5316 BSF_LOCAL, s, 0, NULL,
5317 TRUE, FALSE, &bh);
5318
5319 myh = (struct elf_link_hash_entry *) bh;
5320 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5321 myh->forced_local = 1;
906e58ca 5322
c7b8f16e
JB		 5323 /* The elf32_arm_init_maps function only cares about symbols from input
5324 BFDs. We must make a note of this generated mapping symbol
5325 ourselves so that code byteswapping works properly in
5326 elf32_arm_write_section. */
5327 elf32_arm_section_map_add (s, 'a', 0);
5328 }
906e58ca 5329
c7b8f16e
JB		 5330 s->size += VFP11_ERRATUM_VENEER_SIZE;
5331 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5332 hash_table->num_vfp11_fixes++;
906e58ca 5333
c7b8f16e
JB		 5334 /* The offset of the veneer. */
5335 return val;
5336}
5337
8029a119 5338#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5339 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5340 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5341
5342/* Create a fake section for use by the ARM backend of the linker. */
5343
5344static bfd_boolean
5345arm_make_glue_section (bfd * abfd, const char * name)
5346{
5347 asection * sec;
5348
5349 sec = bfd_get_section_by_name (abfd, name);
5350 if (sec != NULL)
5351 /* Already made. */
5352 return TRUE;
5353
5354 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5355
5356 if (sec == NULL
5357 || !bfd_set_section_alignment (abfd, sec, 2))
5358 return FALSE;
5359
5360 /* Set the gc mark to prevent the section from being removed by garbage
5361 collection, despite the fact that no relocs refer to this section. */
5362 sec->gc_mark = 1;
5363
5364 return TRUE;
5365}
5366
8afb0e02
NC		 5367/* Add the glue sections to ABFD. This function is called from the
5368 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5369
b34976b6 5370bfd_boolean
57e8b36a
NC		 5371bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5372 struct bfd_link_info *info)
252b5132 5373{
8afb0e02
NC		 5374 /* If we are only performing a partial
5375 link do not bother adding the glue. */
1049f94e 5376 if (info->relocatable)
b34976b6 5377 return TRUE;
252b5132 5378
8029a119
NC		 5379 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5380 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5381 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5382 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5383}
5384
5385/* Select a BFD to be used to hold the sections used by the glue code.
5386 This function is called from the linker scripts in ld/emultempl/
8029a119 5387 {armelf/pe}.em. */
8afb0e02 5388
b34976b6 5389bfd_boolean
57e8b36a 5390bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5391{
5392 struct elf32_arm_link_hash_table *globals;
5393
5394 /* If we are only performing a partial link
5395 do not bother getting a bfd to hold the glue. */
1049f94e 5396 if (info->relocatable)
b34976b6 5397 return TRUE;
8afb0e02 5398
b7693d02
DJ		 5399 /* Make sure we don't attach the glue sections to a dynamic object. */
5400 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5401
8afb0e02 5402 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5403 BFD_ASSERT (globals != NULL);
5404
5405 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5406 return TRUE;
8afb0e02 5407
252b5132
RH		 5408 /* Save the bfd for later use. */
5409 globals->bfd_of_glue_owner = abfd;
cedb70c5 5410
b34976b6 5411 return TRUE;
252b5132
RH		 5412}
5413
906e58ca
NC		 5414static void
5415check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5416{
104d59d1
JM		 5417 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5418 Tag_CPU_arch) > 2)
39b41c9c
PB		 5419 globals->use_blx = 1;
5420}
5421
b34976b6 5422bfd_boolean
57e8b36a 5423bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5424 struct bfd_link_info *link_info)
252b5132
RH		 5425{
5426 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5427 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5428 Elf_Internal_Rela *irel, *irelend;
5429 bfd_byte *contents = NULL;
252b5132
RH		 5430
5431 asection *sec;
5432 struct elf32_arm_link_hash_table *globals;
5433
5434 /* If we are only performing a partial link do not bother
5435 to construct any glue. */
1049f94e 5436 if (link_info->relocatable)
b34976b6 5437 return TRUE;
252b5132 5438
39ce1a6a
NC		 5439 /* Here we have a bfd that is to be included on the link. We have a
5440 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5441 globals = elf32_arm_hash_table (link_info);
252b5132 5442 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5443
5444 check_use_blx (globals);
252b5132 5445
d504ffc8 5446 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5447 {
d003868e
AM		 5448 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5449 abfd);
e489d0ae
PB		 5450 return FALSE;
5451 }
f21f3fe0 5452
39ce1a6a
NC		 5453 /* PR 5398: If we have not decided to include any loadable sections in
5454 the output then we will not have a glue owner bfd. This is OK, it
5455 just means that there is nothing else for us to do here. */
5456 if (globals->bfd_of_glue_owner == NULL)
5457 return TRUE;
5458
252b5132
RH		 5459 /* Rummage around all the relocs and map the glue vectors. */
5460 sec = abfd->sections;
5461
5462 if (sec == NULL)
b34976b6 5463 return TRUE;
252b5132
RH		 5464
5465 for (; sec != NULL; sec = sec->next)
5466 {
5467 if (sec->reloc_count == 0)
5468 continue;
5469
2f475487
AM		 5470 if ((sec->flags & SEC_EXCLUDE) != 0)
5471 continue;
5472
0ffa91dd 5473 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5474
9b485d32 5475 /* Load the relocs. */
6cdc0ccc 5476 internal_relocs
906e58ca 5477 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5478
6cdc0ccc
AM		 5479 if (internal_relocs == NULL)
5480 goto error_return;
252b5132 5481
6cdc0ccc
AM		 5482 irelend = internal_relocs + sec->reloc_count;
5483 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5484 {
5485 long r_type;
5486 unsigned long r_index;
252b5132
RH		 5487
5488 struct elf_link_hash_entry *h;
5489
5490 r_type = ELF32_R_TYPE (irel->r_info);
5491 r_index = ELF32_R_SYM (irel->r_info);
5492
9b485d32 5493 /* These are the only relocation types we care about. */
ba96a88f 5494 if ( r_type != R_ARM_PC24
845b51d6 5495 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5496 continue;
5497
5498 /* Get the section contents if we haven't done so already. */
5499 if (contents == NULL)
5500 {
5501 /* Get cached copy if it exists. */
5502 if (elf_section_data (sec)->this_hdr.contents != NULL)
5503 contents = elf_section_data (sec)->this_hdr.contents;
5504 else
5505 {
5506 /* Go get them off disk. */
57e8b36a 5507 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5508 goto error_return;
5509 }
5510 }
5511
845b51d6
PB		 5512 if (r_type == R_ARM_V4BX)
5513 {
5514 int reg;
5515
5516 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5517 record_arm_bx_glue (link_info, reg);
5518 continue;
5519 }
5520
a7c10850 5521 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5522 h = NULL;
5523
9b485d32 5524 /* We don't care about local symbols. */
252b5132
RH		 5525 if (r_index < symtab_hdr->sh_info)
5526 continue;
5527
9b485d32 5528 /* This is an external symbol. */
252b5132
RH		 5529 r_index -= symtab_hdr->sh_info;
5530 h = (struct elf_link_hash_entry *)
5531 elf_sym_hashes (abfd)[r_index];
5532
5533 /* If the relocation is against a static symbol it must be within
5534 the current section and so cannot be a cross ARM/Thumb relocation. */
5535 if (h == NULL)
5536 continue;
5537
d504ffc8
DJ		 5538 /* If the call will go through a PLT entry then we do not need
5539 glue. */
5540 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5541 continue;
5542
252b5132
RH		 5543 switch (r_type)
5544 {
5545 case R_ARM_PC24:
5546 /* This one is a call from arm code. We need to look up
2f0ca46a 5547 the target of the call. If it is a thumb target, we
252b5132 5548 insert glue. */
ebe24dd4 5549 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5550 record_arm_to_thumb_glue (link_info, h);
5551 break;
5552
252b5132 5553 default:
c6596c5e 5554 abort ();
252b5132
RH		 5555 }
5556 }
6cdc0ccc
AM		 5557
5558 if (contents != NULL
5559 && elf_section_data (sec)->this_hdr.contents != contents)
5560 free (contents);
5561 contents = NULL;
5562
5563 if (internal_relocs != NULL
5564 && elf_section_data (sec)->relocs != internal_relocs)
5565 free (internal_relocs);
5566 internal_relocs = NULL;
252b5132
RH		 5567 }
5568
b34976b6 5569 return TRUE;
9a5aca8c 5570
252b5132 5571error_return:
6cdc0ccc
AM		 5572 if (contents != NULL
5573 && elf_section_data (sec)->this_hdr.contents != contents)
5574 free (contents);
5575 if (internal_relocs != NULL
5576 && elf_section_data (sec)->relocs != internal_relocs)
5577 free (internal_relocs);
9a5aca8c 5578
b34976b6 5579 return FALSE;
252b5132 5580}
7e392df6 5581#endif
252b5132 5582
eb043451 5583
c7b8f16e
JB		 5584/* Initialise maps of ARM/Thumb/data for input BFDs. */
5585
5586void
5587bfd_elf32_arm_init_maps (bfd *abfd)
5588{
5589 Elf_Internal_Sym *isymbuf;
5590 Elf_Internal_Shdr *hdr;
5591 unsigned int i, localsyms;
5592
af1f4419
NC		 5593 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5594 if (! is_arm_elf (abfd))
5595 return;
5596
c7b8f16e
JB		 5597 if ((abfd->flags & DYNAMIC) != 0)
5598 return;
5599
0ffa91dd 5600 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5601 localsyms = hdr->sh_info;
5602
5603 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5604 should contain the number of local symbols, which should come before any
5605 global symbols. Mapping symbols are always local. */
5606 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5607 NULL);
5608
5609 /* No internal symbols read? Skip this BFD. */
5610 if (isymbuf == NULL)
5611 return;
5612
5613 for (i = 0; i < localsyms; i++)
5614 {
5615 Elf_Internal_Sym *isym = &isymbuf[i];
5616 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5617 const char *name;
906e58ca 5618
c7b8f16e
JB		 5619 if (sec != NULL
5620 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5621 {
5622 name = bfd_elf_string_from_elf_section (abfd,
5623 hdr->sh_link, isym->st_name);
906e58ca 5624
c7b8f16e
JB		 5625 if (bfd_is_arm_special_symbol_name (name,
5626 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5627 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5628 }
5629 }
5630}
5631
5632
48229727
JB		 5633/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5634 say what they wanted. */
5635
5636void
5637bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5638{
5639 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5640 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5641
4dfe6ac6
NC		 5642 if (globals == NULL)
5643 return;
5644
48229727
JB		 5645 if (globals->fix_cortex_a8 == -1)
5646 {
5647 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5648 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5649 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5650 || out_attr[Tag_CPU_arch_profile].i == 0))
5651 globals->fix_cortex_a8 = 1;
5652 else
5653 globals->fix_cortex_a8 = 0;
5654 }
5655}
5656
5657
c7b8f16e
JB		 5658void
5659bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5660{
5661 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5662 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5663
4dfe6ac6
NC		 5664 if (globals == NULL)
5665 return;
c7b8f16e
JB		 5666 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5667 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5668 {
5669 switch (globals->vfp11_fix)
5670 {
5671 case BFD_ARM_VFP11_FIX_DEFAULT:
5672 case BFD_ARM_VFP11_FIX_NONE:
5673 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5674 break;
906e58ca 5675
c7b8f16e
JB		 5676 default:
5677 /* Give a warning, but do as the user requests anyway. */
5678 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5679 "workaround is not necessary for target architecture"), obfd);
5680 }
5681 }
5682 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5683 /* For earlier architectures, we might need the workaround, but do not
5684 enable it by default. If users is running with broken hardware, they
5685 must enable the erratum fix explicitly. */
5686 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5687}
5688
5689
906e58ca
NC		 5690enum bfd_arm_vfp11_pipe
5691{
c7b8f16e
JB		 5692 VFP11_FMAC,
5693 VFP11_LS,
5694 VFP11_DS,
5695 VFP11_BAD
5696};
5697
5698/* Return a VFP register number. This is encoded as RX:X for single-precision
5699 registers, or X:RX for double-precision registers, where RX is the group of
5700 four bits in the instruction encoding and X is the single extension bit.
5701 RX and X fields are specified using their lowest (starting) bit. The return
5702 value is:
5703
5704 0...31: single-precision registers s0...s31
5705 32...63: double-precision registers d0...d31.
906e58ca 5706
c7b8f16e
JB		 5707 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5708 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5709
c7b8f16e
JB		 5710static unsigned int
5711bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5712 unsigned int x)
5713{
5714 if (is_double)
5715 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5716 else
5717 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5718}
5719
5720/* Set bits in *WMASK according to a register number REG as encoded by
5721 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5722
5723static void
5724bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5725{
5726 if (reg < 32)
5727 *wmask |= 1 << reg;
5728 else if (reg < 48)
5729 *wmask |= 3 << ((reg - 32) * 2);
5730}
5731
5732/* Return TRUE if WMASK overwrites anything in REGS. */
5733
5734static bfd_boolean
5735bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5736{
5737 int i;
906e58ca 5738
c7b8f16e
JB		 5739 for (i = 0; i < numregs; i++)
5740 {
5741 unsigned int reg = regs[i];
5742
5743 if (reg < 32 && (wmask & (1 << reg)) != 0)
5744 return TRUE;
906e58ca 5745
c7b8f16e
JB		 5746 reg -= 32;
5747
5748 if (reg >= 16)
5749 continue;
906e58ca 5750
c7b8f16e
JB		 5751 if ((wmask & (3 << (reg * 2))) != 0)
5752 return TRUE;
5753 }
906e58ca 5754
c7b8f16e
JB		 5755 return FALSE;
5756}
5757
5758/* In this function, we're interested in two things: finding input registers
5759 for VFP data-processing instructions, and finding the set of registers which
5760 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5761 hold the written set, so FLDM etc. are easy to deal with (we're only
5762 interested in 32 SP registers or 16 dp registers, due to the VFP version
5763 implemented by the chip in question). DP registers are marked by setting
5764 both SP registers in the write mask). */
5765
5766static enum bfd_arm_vfp11_pipe
5767bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5768 int *numregs)
5769{
91d6fa6a 5770 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 5771 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5772
5773 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5774 {
5775 unsigned int pqrs;
5776 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5777 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5778
5779 pqrs = ((insn & 0x00800000) >> 20)
5780 | ((insn & 0x00300000) >> 19)
5781 | ((insn & 0x00000040) >> 6);
5782
5783 switch (pqrs)
5784 {
5785 case 0: /* fmac[sd]. */
5786 case 1: /* fnmac[sd]. */
5787 case 2: /* fmsc[sd]. */
5788 case 3: /* fnmsc[sd]. */
91d6fa6a 5789 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5790 bfd_arm_vfp11_write_mask (destmask, fd);
5791 regs[0] = fd;
5792 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5793 regs[2] = fm;
5794 *numregs = 3;
5795 break;
5796
5797 case 4: /* fmul[sd]. */
5798 case 5: /* fnmul[sd]. */
5799 case 6: /* fadd[sd]. */
5800 case 7: /* fsub[sd]. */
91d6fa6a 5801 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5802 goto vfp_binop;
5803
5804 case 8: /* fdiv[sd]. */
91d6fa6a 5805 vpipe = VFP11_DS;
c7b8f16e
JB		 5806 vfp_binop:
5807 bfd_arm_vfp11_write_mask (destmask, fd);
5808 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5809 regs[1] = fm;
5810 *numregs = 2;
5811 break;
5812
5813 case 15: /* extended opcode. */
5814 {
5815 unsigned int extn = ((insn >> 15) & 0x1e)
5816 | ((insn >> 7) & 1);
5817
5818 switch (extn)
5819 {
5820 case 0: /* fcpy[sd]. */
5821 case 1: /* fabs[sd]. */
5822 case 2: /* fneg[sd]. */
5823 case 8: /* fcmp[sd]. */
5824 case 9: /* fcmpe[sd]. */
5825 case 10: /* fcmpz[sd]. */
5826 case 11: /* fcmpez[sd]. */
5827 case 16: /* fuito[sd]. */
5828 case 17: /* fsito[sd]. */
5829 case 24: /* ftoui[sd]. */
5830 case 25: /* ftouiz[sd]. */
5831 case 26: /* ftosi[sd]. */
5832 case 27: /* ftosiz[sd]. */
5833 /* These instructions will not bounce due to underflow. */
5834 *numregs = 0;
91d6fa6a 5835 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5836 break;
5837
5838 case 3: /* fsqrt[sd]. */
5839 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5840 registers to cause the erratum in previous instructions. */
5841 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 5842 vpipe = VFP11_DS;
c7b8f16e
JB		 5843 break;
5844
5845 case 15: /* fcvt{ds,sd}. */
5846 {
5847 int rnum = 0;
5848
5849 bfd_arm_vfp11_write_mask (destmask, fd);
5850
5851 /* Only FCVTSD can underflow. */
5852 if ((insn & 0x100) != 0)
5853 regs[rnum++] = fm;
5854
5855 *numregs = rnum;
5856
91d6fa6a 5857 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5858 }
5859 break;
5860
5861 default:
5862 return VFP11_BAD;
5863 }
5864 }
5865 break;
5866
5867 default:
5868 return VFP11_BAD;
5869 }
5870 }
5871 /* Two-register transfer. */
5872 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5873 {
5874 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5875
c7b8f16e
JB		 5876 if ((insn & 0x100000) == 0)
5877 {
5878 if (is_double)
5879 bfd_arm_vfp11_write_mask (destmask, fm);
5880 else
5881 {
5882 bfd_arm_vfp11_write_mask (destmask, fm);
5883 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5884 }
5885 }
5886
91d6fa6a 5887 vpipe = VFP11_LS;
c7b8f16e
JB		 5888 }
5889 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5890 {
5891 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5892 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5893
c7b8f16e
JB		 5894 switch (puw)
5895 {
5896 case 0: /* Two-reg transfer. We should catch these above. */
5897 abort ();
906e58ca 5898
c7b8f16e
JB		 5899 case 2: /* fldm[sdx]. */
5900 case 3:
5901 case 5:
5902 {
5903 unsigned int i, offset = insn & 0xff;
5904
5905 if (is_double)
5906 offset >>= 1;
5907
5908 for (i = fd; i < fd + offset; i++)
5909 bfd_arm_vfp11_write_mask (destmask, i);
5910 }
5911 break;
906e58ca 5912
c7b8f16e
JB		 5913 case 4: /* fld[sd]. */
5914 case 6:
5915 bfd_arm_vfp11_write_mask (destmask, fd);
5916 break;
906e58ca 5917
c7b8f16e
JB		 5918 default:
5919 return VFP11_BAD;
5920 }
5921
91d6fa6a 5922 vpipe = VFP11_LS;
c7b8f16e
JB		 5923 }
5924 /* Single-register transfer. Note L==0. */
5925 else if ((insn & 0x0f100e10) == 0x0e000a10)
5926 {
5927 unsigned int opcode = (insn >> 21) & 7;
5928 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5929
5930 switch (opcode)
5931 {
5932 case 0: /* fmsr/fmdlr. */
5933 case 1: /* fmdhr. */
5934 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5935 destination register. I don't know if this is exactly right,
5936 but it is the conservative choice. */
5937 bfd_arm_vfp11_write_mask (destmask, fn);
5938 break;
5939
5940 case 7: /* fmxr. */
5941 break;
5942 }
5943
91d6fa6a 5944 vpipe = VFP11_LS;
c7b8f16e
JB		 5945 }
5946
91d6fa6a 5947 return vpipe;
c7b8f16e
JB		 5948}
5949
5950
5951static int elf32_arm_compare_mapping (const void * a, const void * b);
5952
5953
5954/* Look for potentially-troublesome code sequences which might trigger the
5955 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5956 (available from ARM) for details of the erratum. A short version is
5957 described in ld.texinfo. */
5958
5959bfd_boolean
5960bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5961{
5962 asection *sec;
5963 bfd_byte *contents = NULL;
5964 int state = 0;
5965 int regs[3], numregs = 0;
5966 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5967 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5968
4dfe6ac6
NC		 5969 if (globals == NULL)
5970 return FALSE;
5971
c7b8f16e
JB		 5972 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5973 The states transition as follows:
906e58ca 5974
c7b8f16e
JB		 5975 0 -> 1 (vector) or 0 -> 2 (scalar)
5976 A VFP FMAC-pipeline instruction has been seen. Fill
5977 regs[0]..regs[numregs-1] with its input operands. Remember this
5978 instruction in 'first_fmac'.
5979
5980 1 -> 2
5981 Any instruction, except for a VFP instruction which overwrites
5982 regs[*].
906e58ca 5983
c7b8f16e
JB		 5984 1 -> 3 [ -> 0 ] or
5985 2 -> 3 [ -> 0 ]
5986 A VFP instruction has been seen which overwrites any of regs[*].
5987 We must make a veneer! Reset state to 0 before examining next
5988 instruction.
906e58ca 5989
c7b8f16e
JB		 5990 2 -> 0
5991 If we fail to match anything in state 2, reset to state 0 and reset
5992 the instruction pointer to the instruction after 'first_fmac'.
5993
5994 If the VFP11 vector mode is in use, there must be at least two unrelated
5995 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5996 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5997
5998 /* If we are only performing a partial link do not bother
5999 to construct any glue. */
6000 if (link_info->relocatable)
6001 return TRUE;
6002
0ffa91dd
NC		 6003 /* Skip if this bfd does not correspond to an ELF image. */
6004 if (! is_arm_elf (abfd))
6005 return TRUE;
906e58ca 6006
c7b8f16e
JB		 6007 /* We should have chosen a fix type by the time we get here. */
6008 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6009
6010 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6011 return TRUE;
2e6030b9 6012
33a7ffc2
JM		 6013 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6014 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6015 return TRUE;
6016
c7b8f16e
JB		 6017 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6018 {
6019 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6020 struct _arm_elf_section_data *sec_data;
6021
6022 /* If we don't have executable progbits, we're not interested in this
6023 section. Also skip if section is to be excluded. */
6024 if (elf_section_type (sec) != SHT_PROGBITS
6025 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6026 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6027 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6028 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6029 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6030 continue;
6031
6032 sec_data = elf32_arm_section_data (sec);
906e58ca 6033
c7b8f16e
JB		 6034 if (sec_data->mapcount == 0)
6035 continue;
906e58ca 6036
c7b8f16e
JB		 6037 if (elf_section_data (sec)->this_hdr.contents != NULL)
6038 contents = elf_section_data (sec)->this_hdr.contents;
6039 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6040 goto error_return;
6041
6042 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6043 elf32_arm_compare_mapping);
6044
6045 for (span = 0; span < sec_data->mapcount; span++)
6046 {
6047 unsigned int span_start = sec_data->map[span].vma;
6048 unsigned int span_end = (span == sec_data->mapcount - 1)
6049 ? sec->size : sec_data->map[span + 1].vma;
6050 char span_type = sec_data->map[span].type;
906e58ca 6051
c7b8f16e
JB		 6052 /* FIXME: Only ARM mode is supported at present. We may need to
6053 support Thumb-2 mode also at some point. */
6054 if (span_type != 'a')
6055 continue;
6056
6057 for (i = span_start; i < span_end;)
6058 {
6059 unsigned int next_i = i + 4;
6060 unsigned int insn = bfd_big_endian (abfd)
6061 ? (contents[i] << 24)
6062 | (contents[i + 1] << 16)
6063 | (contents[i + 2] << 8)
6064 | contents[i + 3]
6065 : (contents[i + 3] << 24)
6066 | (contents[i + 2] << 16)
6067 | (contents[i + 1] << 8)
6068 | contents[i];
6069 unsigned int writemask = 0;
91d6fa6a 6070 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6071
6072 switch (state)
6073 {
6074 case 0:
91d6fa6a 6075 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6076 &numregs);
6077 /* I'm assuming the VFP11 erratum can trigger with denorm
6078 operands on either the FMAC or the DS pipeline. This might
6079 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6080 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6081 {
6082 state = use_vector ? 1 : 2;
6083 first_fmac = i;
6084 veneer_of_insn = insn;
6085 }
6086 break;
6087
6088 case 1:
6089 {
6090 int other_regs[3], other_numregs;
91d6fa6a 6091 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6092 other_regs,
6093 &other_numregs);
91d6fa6a 6094 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6095 && bfd_arm_vfp11_antidependency (writemask, regs,
6096 numregs))
6097 state = 3;
6098 else
6099 state = 2;
6100 }
6101 break;
6102
6103 case 2:
6104 {
6105 int other_regs[3], other_numregs;
91d6fa6a 6106 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6107 other_regs,
6108 &other_numregs);
91d6fa6a 6109 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6110 && bfd_arm_vfp11_antidependency (writemask, regs,
6111 numregs))
6112 state = 3;
6113 else
6114 {
6115 state = 0;
6116 next_i = first_fmac + 4;
6117 }
6118 }
6119 break;
6120
6121 case 3:
6122 abort (); /* Should be unreachable. */
6123 }
6124
6125 if (state == 3)
6126 {
21d799b5
NC		 6127 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6128 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e
JB		 6129 int errcount;
6130
6131 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
6132
6133 newerr->u.b.vfp_insn = veneer_of_insn;
6134
6135 switch (span_type)
6136 {
6137 case 'a':
6138 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6139 break;
906e58ca 6140
c7b8f16e
JB		 6141 default:
6142 abort ();
6143 }
6144
6145 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6146 first_fmac);
6147
6148 newerr->vma = -1;
6149
6150 newerr->next = sec_data->erratumlist;
6151 sec_data->erratumlist = newerr;
6152
6153 state = 0;
6154 }
6155
6156 i = next_i;
6157 }
6158 }
906e58ca 6159
c7b8f16e
JB		 6160 if (contents != NULL
6161 && elf_section_data (sec)->this_hdr.contents != contents)
6162 free (contents);
6163 contents = NULL;
6164 }
6165
6166 return TRUE;
6167
6168error_return:
6169 if (contents != NULL
6170 && elf_section_data (sec)->this_hdr.contents != contents)
6171 free (contents);
906e58ca 6172
c7b8f16e
JB		 6173 return FALSE;
6174}
6175
6176/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6177 after sections have been laid out, using specially-named symbols. */
6178
6179void
6180bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6181 struct bfd_link_info *link_info)
6182{
6183 asection *sec;
6184 struct elf32_arm_link_hash_table *globals;
6185 char *tmp_name;
906e58ca 6186
c7b8f16e
JB		 6187 if (link_info->relocatable)
6188 return;
2e6030b9
MS		 6189
6190 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6191 if (! is_arm_elf (abfd))
2e6030b9
MS		 6192 return;
6193
c7b8f16e 6194 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6195 if (globals == NULL)
6196 return;
906e58ca 6197
21d799b5
NC		 6198 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6199 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6200
6201 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6202 {
6203 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6204 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6205
c7b8f16e
JB		 6206 for (; errnode != NULL; errnode = errnode->next)
6207 {
6208 struct elf_link_hash_entry *myh;
6209 bfd_vma vma;
6210
6211 switch (errnode->type)
6212 {
6213 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6214 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6215 /* Find veneer symbol. */
6216 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6217 errnode->u.b.veneer->u.v.id);
6218
6219 myh = elf_link_hash_lookup
6220 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6221
6222 if (myh == NULL)
6223 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6224 "`%s'"), abfd, tmp_name);
6225
6226 vma = myh->root.u.def.section->output_section->vma
6227 + myh->root.u.def.section->output_offset
6228 + myh->root.u.def.value;
6229
6230 errnode->u.b.veneer->vma = vma;
6231 break;
6232
6233 case VFP11_ERRATUM_ARM_VENEER:
6234 case VFP11_ERRATUM_THUMB_VENEER:
6235 /* Find return location. */
6236 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6237 errnode->u.v.id);
6238
6239 myh = elf_link_hash_lookup
6240 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6241
6242 if (myh == NULL)
6243 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6244 "`%s'"), abfd, tmp_name);
6245
6246 vma = myh->root.u.def.section->output_section->vma
6247 + myh->root.u.def.section->output_offset
6248 + myh->root.u.def.value;
6249
6250 errnode->u.v.branch->vma = vma;
6251 break;
906e58ca 6252
c7b8f16e
JB		 6253 default:
6254 abort ();
6255 }
6256 }
6257 }
906e58ca 6258
c7b8f16e
JB		 6259 free (tmp_name);
6260}
6261
6262
eb043451
PB		 6263/* Set target relocation values needed during linking. */
6264
6265void
bf21ed78
MS		 6266bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6267 struct bfd_link_info *link_info,
eb043451 6268 int target1_is_rel,
319850b4 6269 char * target2_type,
33bfe774 6270 int fix_v4bx,
c7b8f16e 6271 int use_blx,
bf21ed78 6272 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6273 int no_enum_warn, int no_wchar_warn,
48229727 6274 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6275{
6276 struct elf32_arm_link_hash_table *globals;
6277
6278 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6279 if (globals == NULL)
6280 return;
eb043451
PB		 6281
6282 globals->target1_is_rel = target1_is_rel;
6283 if (strcmp (target2_type, "rel") == 0)
6284 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6285 else if (strcmp (target2_type, "abs") == 0)
6286 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6287 else if (strcmp (target2_type, "got-rel") == 0)
6288 globals->target2_reloc = R_ARM_GOT_PREL;
6289 else
6290 {
6291 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6292 target2_type);
6293 }
319850b4 6294 globals->fix_v4bx = fix_v4bx;
33bfe774 6295 globals->use_blx |= use_blx;
c7b8f16e 6296 globals->vfp11_fix = vfp11_fix;
27e55c4d 6297 globals->pic_veneer = pic_veneer;
48229727 6298 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6299
0ffa91dd
NC		 6300 BFD_ASSERT (is_arm_elf (output_bfd));
6301 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6302 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6303}
eb043451 6304
12a0a0fd 6305/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6306
12a0a0fd
PB		 6307static void
6308insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6309{
6310 bfd_vma upper;
6311 bfd_vma lower;
6312 int reloc_sign;
6313
6314 BFD_ASSERT ((offset & 1) == 0);
6315
6316 upper = bfd_get_16 (abfd, insn);
6317 lower = bfd_get_16 (abfd, insn + 2);
6318 reloc_sign = (offset < 0) ? 1 : 0;
6319 upper = (upper & ~(bfd_vma) 0x7ff)
6320 | ((offset >> 12) & 0x3ff)
6321 | (reloc_sign << 10);
906e58ca 6322 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6323 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6324 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6325 | ((offset >> 1) & 0x7ff);
6326 bfd_put_16 (abfd, upper, insn);
6327 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6328}
6329
9b485d32
NC		 6330/* Thumb code calling an ARM function. */
6331
252b5132 6332static int
57e8b36a
NC		 6333elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6334 const char * name,
6335 bfd * input_bfd,
6336 bfd * output_bfd,
6337 asection * input_section,
6338 bfd_byte * hit_data,
6339 asection * sym_sec,
6340 bfd_vma offset,
6341 bfd_signed_vma addend,
f2a9dd69
DJ		 6342 bfd_vma val,
6343 char **error_message)
252b5132 6344{
bcbdc74c 6345 asection * s = 0;
dc810e39 6346 bfd_vma my_offset;
252b5132 6347 long int ret_offset;
bcbdc74c
NC		 6348 struct elf_link_hash_entry * myh;
6349 struct elf32_arm_link_hash_table * globals;
252b5132 6350
f2a9dd69 6351 myh = find_thumb_glue (info, name, error_message);
252b5132 6352 if (myh == NULL)
b34976b6 6353 return FALSE;
252b5132
RH		 6354
6355 globals = elf32_arm_hash_table (info);
252b5132
RH		 6356 BFD_ASSERT (globals != NULL);
6357 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6358
6359 my_offset = myh->root.u.def.value;
6360
6361 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6362 THUMB2ARM_GLUE_SECTION_NAME);
6363
6364 BFD_ASSERT (s != NULL);
6365 BFD_ASSERT (s->contents != NULL);
6366 BFD_ASSERT (s->output_section != NULL);
6367
6368 if ((my_offset & 0x01) == 0x01)
6369 {
6370 if (sym_sec != NULL
6371 && sym_sec->owner != NULL
6372 && !INTERWORK_FLAG (sym_sec->owner))
6373 {
8f615d07 6374 (*_bfd_error_handler)
d003868e
AM		 6375 (_("%B(%s): warning: interworking not enabled.\n"
6376 " first occurrence: %B: thumb call to arm"),
6377 sym_sec->owner, input_bfd, name);
252b5132 6378
b34976b6 6379 return FALSE;
252b5132
RH		 6380 }
6381
6382 --my_offset;
6383 myh->root.u.def.value = my_offset;
6384
52ab56c2
PB		 6385 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6386 s->contents + my_offset);
252b5132 6387
52ab56c2
PB		 6388 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6389 s->contents + my_offset + 2);
252b5132
RH		 6390
6391 ret_offset =
9b485d32
NC		 6392 /* Address of destination of the stub. */
6393 ((bfd_signed_vma) val)
252b5132 6394 - ((bfd_signed_vma)
57e8b36a
NC		 6395 /* Offset from the start of the current section
6396 to the start of the stubs. */
9b485d32
NC		 6397 (s->output_offset
6398 /* Offset of the start of this stub from the start of the stubs. */
6399 + my_offset
6400 /* Address of the start of the current section. */
6401 + s->output_section->vma)
6402 /* The branch instruction is 4 bytes into the stub. */
6403 + 4
6404 /* ARM branches work from the pc of the instruction + 8. */
6405 + 8);
252b5132 6406
52ab56c2
PB		 6407 put_arm_insn (globals, output_bfd,
6408 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6409 s->contents + my_offset + 4);
252b5132
RH		 6410 }
6411
6412 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6413
427bfd90
NC		 6414 /* Now go back and fix up the original BL insn to point to here. */
6415 ret_offset =
6416 /* Address of where the stub is located. */
6417 (s->output_section->vma + s->output_offset + my_offset)
6418 /* Address of where the BL is located. */
57e8b36a
NC		 6419 - (input_section->output_section->vma + input_section->output_offset
6420 + offset)
427bfd90
NC		 6421 /* Addend in the relocation. */
6422 - addend
6423 /* Biassing for PC-relative addressing. */
6424 - 8;
252b5132 6425
12a0a0fd 6426 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6427
b34976b6 6428 return TRUE;
252b5132
RH		 6429}
6430
a4fd1a8e 6431/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6432
a4fd1a8e
PB		 6433static struct elf_link_hash_entry *
6434elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6435 const char * name,
6436 bfd * input_bfd,
6437 bfd * output_bfd,
6438 asection * sym_sec,
6439 bfd_vma val,
8029a119
NC		 6440 asection * s,
6441 char ** error_message)
252b5132 6442{
dc810e39 6443 bfd_vma my_offset;
252b5132 6444 long int ret_offset;
bcbdc74c
NC		 6445 struct elf_link_hash_entry * myh;
6446 struct elf32_arm_link_hash_table * globals;
252b5132 6447
f2a9dd69 6448 myh = find_arm_glue (info, name, error_message);
252b5132 6449 if (myh == NULL)
a4fd1a8e 6450 return NULL;
252b5132
RH		 6451
6452 globals = elf32_arm_hash_table (info);
252b5132
RH		 6453 BFD_ASSERT (globals != NULL);
6454 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6455
6456 my_offset = myh->root.u.def.value;
252b5132
RH		 6457
6458 if ((my_offset & 0x01) == 0x01)
6459 {
6460 if (sym_sec != NULL
6461 && sym_sec->owner != NULL
6462 && !INTERWORK_FLAG (sym_sec->owner))
6463 {
8f615d07 6464 (*_bfd_error_handler)
d003868e
AM		 6465 (_("%B(%s): warning: interworking not enabled.\n"
6466 " first occurrence: %B: arm call to thumb"),
6467 sym_sec->owner, input_bfd, name);
252b5132 6468 }
9b485d32 6469
252b5132
RH		 6470 --my_offset;
6471 myh->root.u.def.value = my_offset;
6472
27e55c4d
PB		 6473 if (info->shared || globals->root.is_relocatable_executable
6474 || globals->pic_veneer)
8f6277f5
PB		 6475 {
6476 /* For relocatable objects we can't use absolute addresses,
6477 so construct the address from a relative offset. */
6478 /* TODO: If the offset is small it's probably worth
6479 constructing the address with adds. */
52ab56c2
PB		 6480 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6481 s->contents + my_offset);
6482 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6483 s->contents + my_offset + 4);
6484 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6485 s->contents + my_offset + 8);
8f6277f5
PB		 6486 /* Adjust the offset by 4 for the position of the add,
6487 and 8 for the pipeline offset. */
6488 ret_offset = (val - (s->output_offset
6489 + s->output_section->vma
6490 + my_offset + 12))
6491 | 1;
6492 bfd_put_32 (output_bfd, ret_offset,
6493 s->contents + my_offset + 12);
6494 }
26079076
PB		 6495 else if (globals->use_blx)
6496 {
6497 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6498 s->contents + my_offset);
6499
6500 /* It's a thumb address. Add the low order bit. */
6501 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6502 s->contents + my_offset + 4);
6503 }
8f6277f5
PB		 6504 else
6505 {
52ab56c2
PB		 6506 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6507 s->contents + my_offset);
252b5132 6508
52ab56c2
PB		 6509 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6510 s->contents + my_offset + 4);
252b5132 6511
8f6277f5
PB		 6512 /* It's a thumb address. Add the low order bit. */
6513 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6514 s->contents + my_offset + 8);
8029a119
NC		 6515
6516 my_offset += 12;
8f6277f5 6517 }
252b5132
RH		 6518 }
6519
6520 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6521
a4fd1a8e
PB		 6522 return myh;
6523}
6524
6525/* Arm code calling a Thumb function. */
6526
6527static int
6528elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6529 const char * name,
6530 bfd * input_bfd,
6531 bfd * output_bfd,
6532 asection * input_section,
6533 bfd_byte * hit_data,
6534 asection * sym_sec,
6535 bfd_vma offset,
6536 bfd_signed_vma addend,
f2a9dd69
DJ		 6537 bfd_vma val,
6538 char **error_message)
a4fd1a8e
PB		 6539{
6540 unsigned long int tmp;
6541 bfd_vma my_offset;
6542 asection * s;
6543 long int ret_offset;
6544 struct elf_link_hash_entry * myh;
6545 struct elf32_arm_link_hash_table * globals;
6546
6547 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6548 BFD_ASSERT (globals != NULL);
6549 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6550
6551 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6552 ARM2THUMB_GLUE_SECTION_NAME);
6553 BFD_ASSERT (s != NULL);
6554 BFD_ASSERT (s->contents != NULL);
6555 BFD_ASSERT (s->output_section != NULL);
6556
6557 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6558 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6559 if (!myh)
6560 return FALSE;
6561
6562 my_offset = myh->root.u.def.value;
252b5132
RH		 6563 tmp = bfd_get_32 (input_bfd, hit_data);
6564 tmp = tmp & 0xFF000000;
6565
9b485d32 6566 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6567 ret_offset = (s->output_offset
6568 + my_offset
6569 + s->output_section->vma
6570 - (input_section->output_offset
6571 + input_section->output_section->vma
6572 + offset + addend)
6573 - 8);
9a5aca8c 6574
252b5132
RH		 6575 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6576
dc810e39 6577 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6578
b34976b6 6579 return TRUE;
252b5132
RH		 6580}
6581
a4fd1a8e
PB		 6582/* Populate Arm stub for an exported Thumb function. */
6583
6584static bfd_boolean
6585elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6586{
6587 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6588 asection * s;
6589 struct elf_link_hash_entry * myh;
6590 struct elf32_arm_link_hash_entry *eh;
6591 struct elf32_arm_link_hash_table * globals;
6592 asection *sec;
6593 bfd_vma val;
f2a9dd69 6594 char *error_message;
a4fd1a8e 6595
906e58ca 6596 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6597 /* Allocate stubs for exported Thumb functions on v4t. */
6598 if (eh->export_glue == NULL)
6599 return TRUE;
6600
6601 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6602 BFD_ASSERT (globals != NULL);
6603 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6604
6605 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6606 ARM2THUMB_GLUE_SECTION_NAME);
6607 BFD_ASSERT (s != NULL);
6608 BFD_ASSERT (s->contents != NULL);
6609 BFD_ASSERT (s->output_section != NULL);
6610
6611 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6612
6613 BFD_ASSERT (sec->output_section != NULL);
6614
a4fd1a8e
PB		 6615 val = eh->export_glue->root.u.def.value + sec->output_offset
6616 + sec->output_section->vma;
8029a119 6617
a4fd1a8e
PB		 6618 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6619 h->root.u.def.section->owner,
f2a9dd69
DJ		 6620 globals->obfd, sec, val, s,
6621 &error_message);
a4fd1a8e
PB		 6622 BFD_ASSERT (myh);
6623 return TRUE;
6624}
6625
845b51d6
PB		 6626/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6627
6628static bfd_vma
6629elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6630{
6631 bfd_byte *p;
6632 bfd_vma glue_addr;
6633 asection *s;
6634 struct elf32_arm_link_hash_table *globals;
6635
6636 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6637 BFD_ASSERT (globals != NULL);
6638 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6639
6640 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6641 ARM_BX_GLUE_SECTION_NAME);
6642 BFD_ASSERT (s != NULL);
6643 BFD_ASSERT (s->contents != NULL);
6644 BFD_ASSERT (s->output_section != NULL);
6645
6646 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6647
6648 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6649
6650 if ((globals->bx_glue_offset[reg] & 1) == 0)
6651 {
6652 p = s->contents + glue_addr;
6653 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6654 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6655 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6656 globals->bx_glue_offset[reg] |= 1;
6657 }
6658
6659 return glue_addr + s->output_section->vma + s->output_offset;
6660}
6661
a4fd1a8e
PB		 6662/* Generate Arm stubs for exported Thumb symbols. */
6663static void
906e58ca 6664elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6665 struct bfd_link_info *link_info)
6666{
6667 struct elf32_arm_link_hash_table * globals;
6668
8029a119
NC		 6669 if (link_info == NULL)
6670 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6671 return;
6672
6673 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6674 if (globals == NULL)
6675 return;
6676
84c08195
PB		 6677 /* If blx is available then exported Thumb symbols are OK and there is
6678 nothing to do. */
a4fd1a8e
PB		 6679 if (globals->use_blx)
6680 return;
6681
6682 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6683 link_info);
6684}
6685
eb043451
PB		 6686/* Some relocations map to different relocations depending on the
6687 target. Return the real relocation. */
8029a119 6688
eb043451
PB		 6689static int
6690arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6691 int r_type)
6692{
6693 switch (r_type)
6694 {
6695 case R_ARM_TARGET1:
6696 if (globals->target1_is_rel)
6697 return R_ARM_REL32;
6698 else
6699 return R_ARM_ABS32;
6700
6701 case R_ARM_TARGET2:
6702 return globals->target2_reloc;
6703
6704 default:
6705 return r_type;
6706 }
6707}
eb043451 6708
ba93b8ac
DJ		 6709/* Return the base VMA address which should be subtracted from real addresses
6710 when resolving @dtpoff relocation.
6711 This is PT_TLS segment p_vaddr. */
6712
6713static bfd_vma
6714dtpoff_base (struct bfd_link_info *info)
6715{
6716 /* If tls_sec is NULL, we should have signalled an error already. */
6717 if (elf_hash_table (info)->tls_sec == NULL)
6718 return 0;
6719 return elf_hash_table (info)->tls_sec->vma;
6720}
6721
6722/* Return the relocation value for @tpoff relocation
6723 if STT_TLS virtual address is ADDRESS. */
6724
6725static bfd_vma
6726tpoff (struct bfd_link_info *info, bfd_vma address)
6727{
6728 struct elf_link_hash_table *htab = elf_hash_table (info);
6729 bfd_vma base;
6730
6731 /* If tls_sec is NULL, we should have signalled an error already. */
6732 if (htab->tls_sec == NULL)
6733 return 0;
6734 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6735 return address - htab->tls_sec->vma + base;
6736}
6737
00a97672
RS		 6738/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6739 VALUE is the relocation value. */
6740
6741static bfd_reloc_status_type
6742elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6743{
6744 if (value > 0xfff)
6745 return bfd_reloc_overflow;
6746
6747 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6748 bfd_put_32 (abfd, value, data);
6749 return bfd_reloc_ok;
6750}
6751
4962c51a
MS		 6752/* For a given value of n, calculate the value of G_n as required to
6753 deal with group relocations. We return it in the form of an
6754 encoded constant-and-rotation, together with the final residual. If n is
6755 specified as less than zero, then final_residual is filled with the
6756 input value and no further action is performed. */
6757
6758static bfd_vma
6759calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6760{
6761 int current_n;
6762 bfd_vma g_n;
6763 bfd_vma encoded_g_n = 0;
6764 bfd_vma residual = value; /* Also known as Y_n. */
6765
6766 for (current_n = 0; current_n <= n; current_n++)
6767 {
6768 int shift;
6769
6770 /* Calculate which part of the value to mask. */
6771 if (residual == 0)
6772 shift = 0;
6773 else
6774 {
6775 int msb;
6776
6777 /* Determine the most significant bit in the residual and
6778 align the resulting value to a 2-bit boundary. */
6779 for (msb = 30; msb >= 0; msb -= 2)
6780 if (residual & (3 << msb))
6781 break;
6782
6783 /* The desired shift is now (msb - 6), or zero, whichever
6784 is the greater. */
6785 shift = msb - 6;
6786 if (shift < 0)
6787 shift = 0;
6788 }
6789
6790 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6791 g_n = residual & (0xff << shift);
6792 encoded_g_n = (g_n >> shift)
6793 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6794
6795 /* Calculate the residual for the next time around. */
6796 residual &= ~g_n;
6797 }
6798
6799 *final_residual = residual;
6800
6801 return encoded_g_n;
6802}
6803
6804/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6805 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6806
4962c51a 6807static int
906e58ca 6808identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6809{
6810 int opcode = insn & 0x1e00000;
6811
6812 if (opcode == 1 << 23) /* ADD */
6813 return 1;
6814
6815 if (opcode == 1 << 22) /* SUB */
6816 return -1;
6817
6818 return 0;
6819}
6820
252b5132 6821/* Perform a relocation as part of a final link. */
9b485d32 6822
252b5132 6823static bfd_reloc_status_type
57e8b36a
NC		 6824elf32_arm_final_link_relocate (reloc_howto_type * howto,
6825 bfd * input_bfd,
6826 bfd * output_bfd,
6827 asection * input_section,
6828 bfd_byte * contents,
6829 Elf_Internal_Rela * rel,
6830 bfd_vma value,
6831 struct bfd_link_info * info,
6832 asection * sym_sec,
6833 const char * sym_name,
6834 int sym_flags,
0945cdfd 6835 struct elf_link_hash_entry * h,
f2a9dd69 6836 bfd_boolean * unresolved_reloc_p,
8029a119 6837 char ** error_message)
252b5132
RH		 6838{
6839 unsigned long r_type = howto->type;
6840 unsigned long r_symndx;
6841 bfd_byte * hit_data = contents + rel->r_offset;
6842 bfd * dynobj = NULL;
6843 Elf_Internal_Shdr * symtab_hdr;
6844 struct elf_link_hash_entry ** sym_hashes;
6845 bfd_vma * local_got_offsets;
6846 asection * sgot = NULL;
6847 asection * splt = NULL;
6848 asection * sreloc = NULL;
252b5132 6849 bfd_vma addend;
ba96a88f
NC		 6850 bfd_signed_vma signed_addend;
6851 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6852
9c504268 6853 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 6854 if (globals == NULL)
6855 return bfd_reloc_notsupported;
9c504268 6856
0ffa91dd
NC		 6857 BFD_ASSERT (is_arm_elf (input_bfd));
6858
6859 /* Some relocation types map to different relocations depending on the
9c504268 6860 target. We pick the right one here. */
eb043451
PB		 6861 r_type = arm_real_reloc_type (globals, r_type);
6862 if (r_type != howto->type)
6863 howto = elf32_arm_howto_from_type (r_type);
9c504268 6864
cac15327
NC		 6865 /* If the start address has been set, then set the EF_ARM_HASENTRY
6866 flag. Setting this more than once is redundant, but the cost is
6867 not too high, and it keeps the code simple.
99e4ae17 6868
cac15327
NC		 6869 The test is done here, rather than somewhere else, because the
6870 start address is only set just before the final link commences.
6871
6872 Note - if the user deliberately sets a start address of 0, the
6873 flag will not be set. */
6874 if (bfd_get_start_address (output_bfd) != 0)
6875 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6876
252b5132
RH		 6877 dynobj = elf_hash_table (info)->dynobj;
6878 if (dynobj)
6879 {
6880 sgot = bfd_get_section_by_name (dynobj, ".got");
6881 splt = bfd_get_section_by_name (dynobj, ".plt");
6882 }
0ffa91dd 6883 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6884 sym_hashes = elf_sym_hashes (input_bfd);
6885 local_got_offsets = elf_local_got_offsets (input_bfd);
6886 r_symndx = ELF32_R_SYM (rel->r_info);
6887
4e7fd91e 6888 if (globals->use_rel)
ba96a88f 6889 {
4e7fd91e
PB		 6890 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6891
6892 if (addend & ((howto->src_mask + 1) >> 1))
6893 {
6894 signed_addend = -1;
6895 signed_addend &= ~ howto->src_mask;
6896 signed_addend |= addend;
6897 }
6898 else
6899 signed_addend = addend;
ba96a88f
NC		 6900 }
6901 else
4e7fd91e 6902 addend = signed_addend = rel->r_addend;
f21f3fe0 6903
252b5132
RH		 6904 switch (r_type)
6905 {
6906 case R_ARM_NONE:
28a094c2
DJ		 6907 /* We don't need to find a value for this symbol. It's just a
6908 marker. */
6909 *unresolved_reloc_p = FALSE;
252b5132
RH		 6910 return bfd_reloc_ok;
6911
00a97672
RS		 6912 case R_ARM_ABS12:
6913 if (!globals->vxworks_p)
6914 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6915
252b5132
RH		 6916 case R_ARM_PC24:
6917 case R_ARM_ABS32:
bb224fc3 6918 case R_ARM_ABS32_NOI:
252b5132 6919 case R_ARM_REL32:
bb224fc3 6920 case R_ARM_REL32_NOI:
5b5bb741
PB		 6921 case R_ARM_CALL:
6922 case R_ARM_JUMP24:
dfc5f959 6923 case R_ARM_XPC25:
eb043451 6924 case R_ARM_PREL31:
7359ea65 6925 case R_ARM_PLT32:
7359ea65
DJ		 6926 /* Handle relocations which should use the PLT entry. ABS32/REL32
6927 will use the symbol's value, which may point to a PLT entry, but we
6928 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6929 branches in this object should go to it, except if the PLT is too
6930 far away, in which case a long branch stub should be inserted. */
bb224fc3 6931 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6932 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6933 && r_type != R_ARM_CALL
6934 && r_type != R_ARM_JUMP24
6935 && r_type != R_ARM_PLT32)
7359ea65 6936 && h != NULL
c84cd8ee 6937 && splt != NULL
7359ea65
DJ		 6938 && h->plt.offset != (bfd_vma) -1)
6939 {
c84cd8ee
DJ		 6940 /* If we've created a .plt section, and assigned a PLT entry to
6941 this function, it should not be known to bind locally. If
6942 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6943 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6944
6945 value = (splt->output_section->vma
6946 + splt->output_offset
6947 + h->plt.offset);
0945cdfd 6948 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6949 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6950 contents, rel->r_offset, value,
00a97672 6951 rel->r_addend);
7359ea65
DJ		 6952 }
6953
67687978
PB		 6954 /* When generating a shared object or relocatable executable, these
6955 relocations are copied into the output file to be resolved at
6956 run time. */
6957 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6958 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 6959 && !(globals->vxworks_p
3348747a
NS		 6960 && strcmp (input_section->output_section->name,
6961 ".tls_vars") == 0)
bb224fc3 6962 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6963 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 6964 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 6965 && (h == NULL
6966 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6967 || h->root.type != bfd_link_hash_undefweak)
6968 && r_type != R_ARM_PC24
5b5bb741
PB		 6969 && r_type != R_ARM_CALL
6970 && r_type != R_ARM_JUMP24
ee06dc07 6971 && r_type != R_ARM_PREL31
7359ea65 6972 && r_type != R_ARM_PLT32)
252b5132 6973 {
947216bf
AM		 6974 Elf_Internal_Rela outrel;
6975 bfd_byte *loc;
b34976b6 6976 bfd_boolean skip, relocate;
f21f3fe0 6977
0945cdfd
DJ		 6978 *unresolved_reloc_p = FALSE;
6979
252b5132
RH		 6980 if (sreloc == NULL)
6981 {
83bac4b0
NC		 6982 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6983 ! globals->use_rel);
f21f3fe0 6984
83bac4b0 6985 if (sreloc == NULL)
252b5132 6986 return bfd_reloc_notsupported;
252b5132 6987 }
f21f3fe0 6988
b34976b6
AM		 6989 skip = FALSE;
6990 relocate = FALSE;
f21f3fe0 6991
00a97672 6992 outrel.r_addend = addend;
c629eae0
JJ		 6993 outrel.r_offset =
6994 _bfd_elf_section_offset (output_bfd, info, input_section,
6995 rel->r_offset);
6996 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6997 skip = TRUE;
0bb2d96a 6998 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6999 skip = TRUE, relocate = TRUE;
252b5132
RH		 7000 outrel.r_offset += (input_section->output_section->vma
7001 + input_section->output_offset);
f21f3fe0 7002
252b5132 7003 if (skip)
0bb2d96a 7004 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 7005 else if (h != NULL
7006 && h->dynindx != -1
7359ea65 7007 && (!info->shared
5e681ec4 7008 || !info->symbolic
f5385ebf 7009 || !h->def_regular))
5e681ec4 7010 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 7011 else
7012 {
a16385dc
MM		 7013 int symbol;
7014
5e681ec4 7015 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 7016 if (sym_flags == STT_ARM_TFUNC)
7017 value |= 1;
a16385dc 7018 if (globals->symbian_p)
6366ff1e 7019 {
74541ad4
AM		 7020 asection *osec;
7021
6366ff1e
MM		 7022 /* On Symbian OS, the data segment and text segement
7023 can be relocated independently. Therefore, we
7024 must indicate the segment to which this
7025 relocation is relative. The BPABI allows us to
7026 use any symbol in the right segment; we just use
7027 the section symbol as it is convenient. (We
7028 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7029 will not appear in the dynamic symbol table.)
7030
7031 Note that the dynamic linker ignores the section
7032 symbol value, so we don't subtract osec->vma
7033 from the emitted reloc addend. */
10dbd1f3 7034 if (sym_sec)
74541ad4 7035 osec = sym_sec->output_section;
10dbd1f3 7036 else
74541ad4
AM		 7037 osec = input_section->output_section;
7038 symbol = elf_section_data (osec)->dynindx;
7039 if (symbol == 0)
7040 {
7041 struct elf_link_hash_table *htab = elf_hash_table (info);
7042
7043 if ((osec->flags & SEC_READONLY) == 0
7044 && htab->data_index_section != NULL)
7045 osec = htab->data_index_section;
7046 else
7047 osec = htab->text_index_section;
7048 symbol = elf_section_data (osec)->dynindx;
7049 }
6366ff1e
MM		 7050 BFD_ASSERT (symbol != 0);
7051 }
a16385dc
MM		 7052 else
7053 /* On SVR4-ish systems, the dynamic loader cannot
7054 relocate the text and data segments independently,
7055 so the symbol does not matter. */
7056 symbol = 0;
7057 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7058 if (globals->use_rel)
7059 relocate = TRUE;
7060 else
7061 outrel.r_addend += value;
252b5132 7062 }
f21f3fe0 7063
947216bf 7064 loc = sreloc->contents;
00a97672
RS		 7065 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7066 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 7067
f21f3fe0 7068 /* If this reloc is against an external symbol, we do not want to
252b5132 7069 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7070 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7071 if (! relocate)
7072 return bfd_reloc_ok;
9a5aca8c 7073
f21f3fe0 7074 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7075 contents, rel->r_offset, value,
7076 (bfd_vma) 0);
7077 }
7078 else switch (r_type)
7079 {
00a97672
RS		 7080 case R_ARM_ABS12:
7081 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7082
dfc5f959 7083 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7084 case R_ARM_CALL:
7085 case R_ARM_JUMP24:
8029a119 7086 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7087 case R_ARM_PLT32:
906e58ca 7088 {
906e58ca
NC		 7089 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7090
dfc5f959 7091 if (r_type == R_ARM_XPC25)
252b5132 7092 {
dfc5f959
NC		 7093 /* Check for Arm calling Arm function. */
7094 /* FIXME: Should we translate the instruction into a BL
7095 instruction instead ? */
7096 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7097 (*_bfd_error_handler)
7098 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7099 input_bfd,
7100 h ? h->root.root.string : "(local)");
dfc5f959 7101 }
155d87d7 7102 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7103 {
7104 /* Check for Arm calling Thumb function. */
7105 if (sym_flags == STT_ARM_TFUNC)
7106 {
f2a9dd69
DJ		 7107 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7108 output_bfd, input_section,
7109 hit_data, sym_sec, rel->r_offset,
7110 signed_addend, value,
7111 error_message))
7112 return bfd_reloc_ok;
7113 else
7114 return bfd_reloc_dangerous;
dfc5f959 7115 }
252b5132 7116 }
ba96a88f 7117
906e58ca 7118 /* Check if a stub has to be inserted because the
8029a119 7119 destination is too far or we are changing mode. */
155d87d7
CL		 7120 if ( r_type == R_ARM_CALL
7121 || r_type == R_ARM_JUMP24
7122 || r_type == R_ARM_PLT32)
906e58ca 7123 {
fe33d2fa
CL		 7124 enum elf32_arm_stub_type stub_type = arm_stub_none;
7125 struct elf32_arm_link_hash_entry *hash;
7126
7127 hash = (struct elf32_arm_link_hash_entry *) h;
7128 stub_type = arm_type_of_stub (info, input_section, rel,
7129 &sym_flags, hash,
7130 value, sym_sec,
7131 input_bfd, sym_name);
5fa9e92f 7132
fe33d2fa 7133 if (stub_type != arm_stub_none)
906e58ca
NC		 7134 {
7135 /* The target is out of reach, so redirect the
7136 branch to the local stub for this function. */
7137
7138 stub_entry = elf32_arm_get_stub_entry (input_section,
7139 sym_sec, h,
fe33d2fa
CL		 7140 rel, globals,
7141 stub_type);
906e58ca
NC		 7142 if (stub_entry != NULL)
7143 value = (stub_entry->stub_offset
7144 + stub_entry->stub_sec->output_offset
7145 + stub_entry->stub_sec->output_section->vma);
7146 }
fe33d2fa
CL		 7147 else
7148 {
7149 /* If the call goes through a PLT entry, make sure to
7150 check distance to the right destination address. */
7151 if (h != NULL
7152 && splt != NULL
7153 && h->plt.offset != (bfd_vma) -1)
7154 {
7155 value = (splt->output_section->vma
7156 + splt->output_offset
7157 + h->plt.offset);
7158 *unresolved_reloc_p = FALSE;
7159 /* The PLT entry is in ARM mode, regardless of the
7160 target function. */
7161 sym_flags = STT_FUNC;
7162 }
7163 }
906e58ca
NC		 7164 }
7165
dea514f5
PB		 7166 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7167 where:
7168 S is the address of the symbol in the relocation.
7169 P is address of the instruction being relocated.
7170 A is the addend (extracted from the instruction) in bytes.
7171
7172 S is held in 'value'.
7173 P is the base address of the section containing the
7174 instruction plus the offset of the reloc into that
7175 section, ie:
7176 (input_section->output_section->vma +
7177 input_section->output_offset +
7178 rel->r_offset).
7179 A is the addend, converted into bytes, ie:
7180 (signed_addend * 4)
7181
7182 Note: None of these operations have knowledge of the pipeline
7183 size of the processor, thus it is up to the assembler to
7184 encode this information into the addend. */
7185 value -= (input_section->output_section->vma
7186 + input_section->output_offset);
7187 value -= rel->r_offset;
4e7fd91e
PB		 7188 if (globals->use_rel)
7189 value += (signed_addend << howto->size);
7190 else
7191 /* RELA addends do not have to be adjusted by howto->size. */
7192 value += signed_addend;
23080146 7193
dcb5e6e6
NC		 7194 signed_addend = value;
7195 signed_addend >>= howto->rightshift;
9a5aca8c 7196
5ab79981 7197 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7198 the next instruction unless a PLT entry will be created.
cd1dac3d
DG		 7199 Do the same for local undefined symbols.
7200 The jump to the next instruction is optimized as a NOP depending
7201 on the architecture. */
ffcb4889
NS		 7202 if (h ? (h->root.type == bfd_link_hash_undefweak
7203 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7204 : bfd_is_und_section (sym_sec))
5ab79981 7205 {
cd1dac3d
DG		 7206 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7207
7208 if (arch_has_arm_nop (globals))
7209 value |= 0x0320f000;
7210 else
7211 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7212 }
7213 else
59f2c4e7 7214 {
9b485d32 7215 /* Perform a signed range check. */
dcb5e6e6 7216 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7217 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7218 return bfd_reloc_overflow;
9a5aca8c 7219
5ab79981 7220 addend = (value & 2);
39b41c9c 7221
5ab79981
PB		 7222 value = (signed_addend & howto->dst_mask)
7223 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7224
5ab79981
PB		 7225 if (r_type == R_ARM_CALL)
7226 {
155d87d7
CL		 7227 /* Set the H bit in the BLX instruction. */
7228 if (sym_flags == STT_ARM_TFUNC)
7229 {
7230 if (addend)
7231 value |= (1 << 24);
7232 else
7233 value &= ~(bfd_vma)(1 << 24);
7234 }
7235
5ab79981 7236 /* Select the correct instruction (BL or BLX). */
906e58ca 7237 /* Only if we are not handling a BL to a stub. In this
8029a119 7238 case, mode switching is performed by the stub. */
906e58ca 7239 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7240 value |= (1 << 28);
7241 else
7242 {
7243 value &= ~(bfd_vma)(1 << 28);
7244 value |= (1 << 24);
7245 }
39b41c9c
PB		 7246 }
7247 }
906e58ca 7248 }
252b5132 7249 break;
f21f3fe0 7250
252b5132
RH		 7251 case R_ARM_ABS32:
7252 value += addend;
7253 if (sym_flags == STT_ARM_TFUNC)
7254 value |= 1;
7255 break;
f21f3fe0 7256
bb224fc3
MS		 7257 case R_ARM_ABS32_NOI:
7258 value += addend;
7259 break;
7260
252b5132 7261 case R_ARM_REL32:
a8bc6c78
PB		 7262 value += addend;
7263 if (sym_flags == STT_ARM_TFUNC)
7264 value |= 1;
252b5132 7265 value -= (input_section->output_section->vma
62efb346 7266 + input_section->output_offset + rel->r_offset);
252b5132 7267 break;
eb043451 7268
bb224fc3
MS		 7269 case R_ARM_REL32_NOI:
7270 value += addend;
7271 value -= (input_section->output_section->vma
7272 + input_section->output_offset + rel->r_offset);
7273 break;
7274
eb043451
PB		 7275 case R_ARM_PREL31:
7276 value -= (input_section->output_section->vma
7277 + input_section->output_offset + rel->r_offset);
7278 value += signed_addend;
7279 if (! h || h->root.type != bfd_link_hash_undefweak)
7280 {
8029a119 7281 /* Check for overflow. */
eb043451
PB		 7282 if ((value ^ (value >> 1)) & (1 << 30))
7283 return bfd_reloc_overflow;
7284 }
7285 value &= 0x7fffffff;
7286 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7287 if (sym_flags == STT_ARM_TFUNC)
7288 value |= 1;
7289 break;
252b5132 7290 }
f21f3fe0 7291
252b5132
RH		 7292 bfd_put_32 (input_bfd, value, hit_data);
7293 return bfd_reloc_ok;
7294
7295 case R_ARM_ABS8:
7296 value += addend;
4e67d4ca
DG		 7297
7298 /* There is no way to tell whether the user intended to use a signed or
7299 unsigned addend. When checking for overflow we accept either,
7300 as specified by the AAELF. */
7301 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7302 return bfd_reloc_overflow;
7303
7304 bfd_put_8 (input_bfd, value, hit_data);
7305 return bfd_reloc_ok;
7306
7307 case R_ARM_ABS16:
7308 value += addend;
7309
4e67d4ca
DG		 7310 /* See comment for R_ARM_ABS8. */
7311 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7312 return bfd_reloc_overflow;
7313
7314 bfd_put_16 (input_bfd, value, hit_data);
7315 return bfd_reloc_ok;
7316
252b5132 7317 case R_ARM_THM_ABS5:
9b485d32 7318 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7319 if (globals->use_rel)
7320 {
7321 /* Need to refetch addend. */
7322 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7323 /* ??? Need to determine shift amount from operand size. */
7324 addend >>= howto->rightshift;
7325 }
252b5132
RH		 7326 value += addend;
7327
7328 /* ??? Isn't value unsigned? */
7329 if ((long) value > 0x1f || (long) value < -0x10)
7330 return bfd_reloc_overflow;
7331
7332 /* ??? Value needs to be properly shifted into place first. */
7333 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7334 bfd_put_16 (input_bfd, value, hit_data);
7335 return bfd_reloc_ok;
7336
2cab6cc3
MS		 7337 case R_ARM_THM_ALU_PREL_11_0:
7338 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7339 {
7340 bfd_vma insn;
7341 bfd_signed_vma relocation;
7342
7343 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7344 | bfd_get_16 (input_bfd, hit_data + 2);
7345
7346 if (globals->use_rel)
7347 {
7348 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7349 | ((insn & (1 << 26)) >> 15);
7350 if (insn & 0xf00000)
7351 signed_addend = -signed_addend;
7352 }
7353
7354 relocation = value + signed_addend;
7355 relocation -= (input_section->output_section->vma
7356 + input_section->output_offset
7357 + rel->r_offset);
7358
7359 value = abs (relocation);
7360
7361 if (value >= 0x1000)
7362 return bfd_reloc_overflow;
7363
7364 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7365 | ((value & 0x700) << 4)
7366 | ((value & 0x800) << 15);
7367 if (relocation < 0)
7368 insn |= 0xa00000;
7369
7370 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7371 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7372
7373 return bfd_reloc_ok;
7374 }
7375
e1ec24c6
NC		 7376 case R_ARM_THM_PC8:
7377 /* PR 10073: This reloc is not generated by the GNU toolchain,
7378 but it is supported for compatibility with third party libraries
7379 generated by other compilers, specifically the ARM/IAR. */
7380 {
7381 bfd_vma insn;
7382 bfd_signed_vma relocation;
7383
7384 insn = bfd_get_16 (input_bfd, hit_data);
7385
7386 if (globals->use_rel)
7387 addend = (insn & 0x00ff) << 2;
7388
7389 relocation = value + addend;
7390 relocation -= (input_section->output_section->vma
7391 + input_section->output_offset
7392 + rel->r_offset);
7393
7394 value = abs (relocation);
7395
7396 /* We do not check for overflow of this reloc. Although strictly
7397 speaking this is incorrect, it appears to be necessary in order
7398 to work with IAR generated relocs. Since GCC and GAS do not
7399 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7400 a problem for them. */
7401 value &= 0x3fc;
7402
7403 insn = (insn & 0xff00) | (value >> 2);
7404
7405 bfd_put_16 (input_bfd, insn, hit_data);
7406
7407 return bfd_reloc_ok;
7408 }
7409
2cab6cc3
MS		 7410 case R_ARM_THM_PC12:
7411 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7412 {
7413 bfd_vma insn;
7414 bfd_signed_vma relocation;
7415
7416 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7417 | bfd_get_16 (input_bfd, hit_data + 2);
7418
7419 if (globals->use_rel)
7420 {
7421 signed_addend = insn & 0xfff;
7422 if (!(insn & (1 << 23)))
7423 signed_addend = -signed_addend;
7424 }
7425
7426 relocation = value + signed_addend;
7427 relocation -= (input_section->output_section->vma
7428 + input_section->output_offset
7429 + rel->r_offset);
7430
7431 value = abs (relocation);
7432
7433 if (value >= 0x1000)
7434 return bfd_reloc_overflow;
7435
7436 insn = (insn & 0xff7ff000) | value;
7437 if (relocation >= 0)
7438 insn |= (1 << 23);
7439
7440 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7441 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7442
7443 return bfd_reloc_ok;
7444 }
7445
dfc5f959 7446 case R_ARM_THM_XPC22:
c19d1205 7447 case R_ARM_THM_CALL:
bd97cb95 7448 case R_ARM_THM_JUMP24:
dfc5f959 7449 /* Thumb BL (branch long instruction). */
252b5132 7450 {
b34976b6 7451 bfd_vma relocation;
e95de063 7452 bfd_vma reloc_sign;
b34976b6
AM		 7453 bfd_boolean overflow = FALSE;
7454 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7455 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7456 bfd_signed_vma reloc_signed_max;
7457 bfd_signed_vma reloc_signed_min;
b34976b6 7458 bfd_vma check;
252b5132 7459 bfd_signed_vma signed_check;
e95de063 7460 int bitsize;
cd1dac3d 7461 const int thumb2 = using_thumb2 (globals);
252b5132 7462
5ab79981 7463 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7464 the next instruction unless a PLT entry will be created.
7465 The jump to the next instruction is optimized as a NOP.W for
7466 Thumb-2 enabled architectures. */
19540007
JM		 7467 if (h && h->root.type == bfd_link_hash_undefweak
7468 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7469 {
cd1dac3d
DG		 7470 if (arch_has_thumb2_nop (globals))
7471 {
7472 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7473 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7474 }
7475 else
7476 {
7477 bfd_put_16 (input_bfd, 0xe000, hit_data);
7478 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7479 }
5ab79981
PB		 7480 return bfd_reloc_ok;
7481 }
7482
e95de063
MS		 7483 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7484 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7485 if (globals->use_rel)
7486 {
e95de063
MS		 7487 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7488 bfd_vma upper = upper_insn & 0x3ff;
7489 bfd_vma lower = lower_insn & 0x7ff;
7490 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7491 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7492 bfd_vma i1 = j1 ^ s ? 0 : 1;
7493 bfd_vma i2 = j2 ^ s ? 0 : 1;
7494
7495 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7496 /* Sign extend. */
7497 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7498
4e7fd91e
PB		 7499 signed_addend = addend;
7500 }
cb1afa5c 7501
dfc5f959
NC		 7502 if (r_type == R_ARM_THM_XPC22)
7503 {
7504 /* Check for Thumb to Thumb call. */
7505 /* FIXME: Should we translate the instruction into a BL
7506 instruction instead ? */
7507 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7508 (*_bfd_error_handler)
7509 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7510 input_bfd,
7511 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7512 }
7513 else
252b5132 7514 {
dfc5f959
NC		 7515 /* If it is not a call to Thumb, assume call to Arm.
7516 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7517 function call at all, but rather a long jump. Calls through
7518 the PLT do not require stubs. */
7519 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7520 && (h == NULL || splt == NULL
7521 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7522 {
bd97cb95 7523 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7524 {
7525 /* Convert BL to BLX. */
7526 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7527 }
155d87d7
CL		 7528 else if (( r_type != R_ARM_THM_CALL)
7529 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7530 {
7531 if (elf32_thumb_to_arm_stub
7532 (info, sym_name, input_bfd, output_bfd, input_section,
7533 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7534 error_message))
7535 return bfd_reloc_ok;
7536 else
7537 return bfd_reloc_dangerous;
7538 }
da5938a2 7539 }
bd97cb95
DJ		 7540 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7541 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7542 {
7543 /* Make sure this is a BL. */
7544 lower_insn |= 0x1800;
7545 }
252b5132 7546 }
f21f3fe0 7547
fe33d2fa 7548 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7549 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7550 {
7551 /* Check if a stub has to be inserted because the destination
8029a119 7552 is too far. */
fe33d2fa
CL		 7553 struct elf32_arm_stub_hash_entry *stub_entry;
7554 struct elf32_arm_link_hash_entry *hash;
7555
7556 hash = (struct elf32_arm_link_hash_entry *) h;
7557
7558 stub_type = arm_type_of_stub (info, input_section, rel,
7559 &sym_flags, hash, value, sym_sec,
7560 input_bfd, sym_name);
7561
7562 if (stub_type != arm_stub_none)
906e58ca
NC		 7563 {
7564 /* The target is out of reach or we are changing modes, so
7565 redirect the branch to the local stub for this
7566 function. */
7567 stub_entry = elf32_arm_get_stub_entry (input_section,
7568 sym_sec, h,
fe33d2fa
CL		 7569 rel, globals,
7570 stub_type);
906e58ca
NC		 7571 if (stub_entry != NULL)
7572 value = (stub_entry->stub_offset
7573 + stub_entry->stub_sec->output_offset
7574 + stub_entry->stub_sec->output_section->vma);
7575
f4ac8484 7576 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7577 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7578 {
7579 if ((stub_entry
7580 && !arm_stub_is_thumb (stub_entry->stub_type))
7581 || (sym_flags != STT_ARM_TFUNC))
7582 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7583 }
906e58ca
NC		 7584 }
7585 }
7586
fe33d2fa
CL		 7587 /* Handle calls via the PLT. */
7588 if (stub_type == arm_stub_none
7589 && h != NULL
7590 && splt != NULL
7591 && h->plt.offset != (bfd_vma) -1)
7592 {
7593 value = (splt->output_section->vma
7594 + splt->output_offset
7595 + h->plt.offset);
7596
7597 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7598 {
7599 /* If the Thumb BLX instruction is available, convert
7600 the BL to a BLX instruction to call the ARM-mode
7601 PLT entry. */
7602 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7603 sym_flags = STT_FUNC;
7604 }
7605 else
7606 {
7607 /* Target the Thumb stub before the ARM PLT entry. */
7608 value -= PLT_THUMB_STUB_SIZE;
7609 sym_flags = STT_ARM_TFUNC;
7610 }
7611 *unresolved_reloc_p = FALSE;
7612 }
7613
ba96a88f 7614 relocation = value + signed_addend;
f21f3fe0 7615
252b5132 7616 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7617 + input_section->output_offset
7618 + rel->r_offset);
9a5aca8c 7619
252b5132
RH		 7620 check = relocation >> howto->rightshift;
7621
7622 /* If this is a signed value, the rightshift just dropped
7623 leading 1 bits (assuming twos complement). */
7624 if ((bfd_signed_vma) relocation >= 0)
7625 signed_check = check;
7626 else
7627 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7628
e95de063
MS		 7629 /* Calculate the permissable maximum and minimum values for
7630 this relocation according to whether we're relocating for
7631 Thumb-2 or not. */
7632 bitsize = howto->bitsize;
7633 if (!thumb2)
7634 bitsize -= 2;
f6ebfac0 7635 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 7636 reloc_signed_min = ~reloc_signed_max;
7637
252b5132 7638 /* Assumes two's complement. */
ba96a88f 7639 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7640 overflow = TRUE;
252b5132 7641
bd97cb95 7642 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7643 /* For a BLX instruction, make sure that the relocation is rounded up
7644 to a word boundary. This follows the semantics of the instruction
7645 which specifies that bit 1 of the target address will come from bit
7646 1 of the base address. */
7647 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7648
e95de063
MS		 7649 /* Put RELOCATION back into the insn. Assumes two's complement.
7650 We use the Thumb-2 encoding, which is safe even if dealing with
7651 a Thumb-1 instruction by virtue of our overflow check above. */
7652 reloc_sign = (signed_check < 0) ? 1 : 0;
7653 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7654 | ((relocation >> 12) & 0x3ff)
7655 | (reloc_sign << 10);
906e58ca 7656 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7657 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7658 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7659 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7660
252b5132
RH		 7661 /* Put the relocated value back in the object file: */
7662 bfd_put_16 (input_bfd, upper_insn, hit_data);
7663 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7664
7665 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7666 }
7667 break;
7668
c19d1205
ZW		 7669 case R_ARM_THM_JUMP19:
7670 /* Thumb32 conditional branch instruction. */
7671 {
7672 bfd_vma relocation;
7673 bfd_boolean overflow = FALSE;
7674 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7675 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7676 bfd_signed_vma reloc_signed_max = 0xffffe;
7677 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7678 bfd_signed_vma signed_check;
7679
7680 /* Need to refetch the addend, reconstruct the top three bits,
7681 and squish the two 11 bit pieces together. */
7682 if (globals->use_rel)
7683 {
7684 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7685 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7686 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7687 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7688 bfd_vma lower = (lower_insn & 0x07ff);
7689
a00a1f35
MS		 7690 upper |= J1 << 6;
7691 upper |= J2 << 7;
7692 upper |= (!S) << 8;
c19d1205
ZW		 7693 upper -= 0x0100; /* Sign extend. */
7694
7695 addend = (upper << 12) | (lower << 1);
7696 signed_addend = addend;
7697 }
7698
bd97cb95
DJ		 7699 /* Handle calls via the PLT. */
7700 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7701 {
7702 value = (splt->output_section->vma
7703 + splt->output_offset
7704 + h->plt.offset);
7705 /* Target the Thumb stub before the ARM PLT entry. */
7706 value -= PLT_THUMB_STUB_SIZE;
7707 *unresolved_reloc_p = FALSE;
7708 }
7709
c19d1205
ZW		 7710 /* ??? Should handle interworking? GCC might someday try to
7711 use this for tail calls. */
7712
7713 relocation = value + signed_addend;
7714 relocation -= (input_section->output_section->vma
7715 + input_section->output_offset
7716 + rel->r_offset);
a00a1f35 7717 signed_check = (bfd_signed_vma) relocation;
c19d1205 7718
c19d1205
ZW		 7719 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7720 overflow = TRUE;
7721
7722 /* Put RELOCATION back into the insn. */
7723 {
7724 bfd_vma S = (relocation & 0x00100000) >> 20;
7725 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7726 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7727 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7728 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7729
a00a1f35 7730 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7731 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7732 }
7733
7734 /* Put the relocated value back in the object file: */
7735 bfd_put_16 (input_bfd, upper_insn, hit_data);
7736 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7737
7738 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7739 }
7740
7741 case R_ARM_THM_JUMP11:
7742 case R_ARM_THM_JUMP8:
7743 case R_ARM_THM_JUMP6:
51c5503b
NC		 7744 /* Thumb B (branch) instruction). */
7745 {
6cf9e9fe 7746 bfd_signed_vma relocation;
51c5503b
NC		 7747 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7748 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7749 bfd_signed_vma signed_check;
7750
c19d1205
ZW		 7751 /* CZB cannot jump backward. */
7752 if (r_type == R_ARM_THM_JUMP6)
7753 reloc_signed_min = 0;
7754
4e7fd91e 7755 if (globals->use_rel)
6cf9e9fe 7756 {
4e7fd91e
PB		 7757 /* Need to refetch addend. */
7758 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7759 if (addend & ((howto->src_mask + 1) >> 1))
7760 {
7761 signed_addend = -1;
7762 signed_addend &= ~ howto->src_mask;
7763 signed_addend |= addend;
7764 }
7765 else
7766 signed_addend = addend;
7767 /* The value in the insn has been right shifted. We need to
7768 undo this, so that we can perform the address calculation
7769 in terms of bytes. */
7770 signed_addend <<= howto->rightshift;
6cf9e9fe 7771 }
6cf9e9fe 7772 relocation = value + signed_addend;
51c5503b
NC		 7773
7774 relocation -= (input_section->output_section->vma
7775 + input_section->output_offset
7776 + rel->r_offset);
7777
6cf9e9fe
NC		 7778 relocation >>= howto->rightshift;
7779 signed_check = relocation;
c19d1205
ZW		 7780
7781 if (r_type == R_ARM_THM_JUMP6)
7782 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7783 else
7784 relocation &= howto->dst_mask;
51c5503b 7785 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7786
51c5503b
NC		 7787 bfd_put_16 (input_bfd, relocation, hit_data);
7788
7789 /* Assumes two's complement. */
7790 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7791 return bfd_reloc_overflow;
7792
7793 return bfd_reloc_ok;
7794 }
cedb70c5 7795
8375c36b
PB		 7796 case R_ARM_ALU_PCREL7_0:
7797 case R_ARM_ALU_PCREL15_8:
7798 case R_ARM_ALU_PCREL23_15:
7799 {
7800 bfd_vma insn;
7801 bfd_vma relocation;
7802
7803 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7804 if (globals->use_rel)
7805 {
7806 /* Extract the addend. */
7807 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7808 signed_addend = addend;
7809 }
8375c36b
PB		 7810 relocation = value + signed_addend;
7811
7812 relocation -= (input_section->output_section->vma
7813 + input_section->output_offset
7814 + rel->r_offset);
7815 insn = (insn & ~0xfff)
7816 | ((howto->bitpos << 7) & 0xf00)
7817 | ((relocation >> howto->bitpos) & 0xff);
7818 bfd_put_32 (input_bfd, value, hit_data);
7819 }
7820 return bfd_reloc_ok;
7821
252b5132
RH		 7822 case R_ARM_GNU_VTINHERIT:
7823 case R_ARM_GNU_VTENTRY:
7824 return bfd_reloc_ok;
7825
c19d1205 7826 case R_ARM_GOTOFF32:
252b5132
RH		 7827 /* Relocation is relative to the start of the
7828 global offset table. */
7829
7830 BFD_ASSERT (sgot != NULL);
7831 if (sgot == NULL)
7832 return bfd_reloc_notsupported;
9a5aca8c 7833
cedb70c5 7834 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7835 address by one, so that attempts to call the function pointer will
7836 correctly interpret it as Thumb code. */
7837 if (sym_flags == STT_ARM_TFUNC)
7838 value += 1;
7839
252b5132
RH		 7840 /* Note that sgot->output_offset is not involved in this
7841 calculation. We always want the start of .got. If we
7842 define _GLOBAL_OFFSET_TABLE in a different way, as is
7843 permitted by the ABI, we might have to change this
9b485d32 7844 calculation. */
252b5132 7845 value -= sgot->output_section->vma;
f21f3fe0 7846 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7847 contents, rel->r_offset, value,
00a97672 7848 rel->r_addend);
252b5132
RH		 7849
7850 case R_ARM_GOTPC:
a7c10850 7851 /* Use global offset table as symbol value. */
252b5132 7852 BFD_ASSERT (sgot != NULL);
f21f3fe0 7853
252b5132
RH		 7854 if (sgot == NULL)
7855 return bfd_reloc_notsupported;
7856
0945cdfd 7857 *unresolved_reloc_p = FALSE;
252b5132 7858 value = sgot->output_section->vma;
f21f3fe0 7859 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7860 contents, rel->r_offset, value,
00a97672 7861 rel->r_addend);
f21f3fe0 7862
252b5132 7863 case R_ARM_GOT32:
eb043451 7864 case R_ARM_GOT_PREL:
252b5132 7865 /* Relocation is to the entry for this symbol in the
9b485d32 7866 global offset table. */
252b5132
RH		 7867 if (sgot == NULL)
7868 return bfd_reloc_notsupported;
f21f3fe0 7869
252b5132
RH		 7870 if (h != NULL)
7871 {
7872 bfd_vma off;
5e681ec4 7873 bfd_boolean dyn;
f21f3fe0 7874
252b5132
RH		 7875 off = h->got.offset;
7876 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7877 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7878
5e681ec4 7879 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7880 || (info->shared
5e681ec4
PB		 7881 && SYMBOL_REFERENCES_LOCAL (info, h))
7882 || (ELF_ST_VISIBILITY (h->other)
7883 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7884 {
7885 /* This is actually a static link, or it is a -Bsymbolic link
7886 and the symbol is defined locally. We must initialize this
7887 entry in the global offset table. Since the offset must
7888 always be a multiple of 4, we use the least significant bit
7889 to record whether we have initialized it already.
f21f3fe0 7890
00a97672 7891 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7892 entry to initialize the value. This is done in the
9b485d32 7893 finish_dynamic_symbol routine. */
252b5132
RH		 7894 if ((off & 1) != 0)
7895 off &= ~1;
7896 else
7897 {
ee29b9fb
RE		 7898 /* If we are addressing a Thumb function, we need to
7899 adjust the address by one, so that attempts to
7900 call the function pointer will correctly
7901 interpret it as Thumb code. */
7902 if (sym_flags == STT_ARM_TFUNC)
7903 value |= 1;
7904
252b5132
RH		 7905 bfd_put_32 (output_bfd, value, sgot->contents + off);
7906 h->got.offset |= 1;
7907 }
7908 }
0945cdfd
DJ		 7909 else
7910 *unresolved_reloc_p = FALSE;
f21f3fe0 7911
252b5132
RH		 7912 value = sgot->output_offset + off;
7913 }
7914 else
7915 {
7916 bfd_vma off;
f21f3fe0 7917
252b5132
RH		 7918 BFD_ASSERT (local_got_offsets != NULL &&
7919 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7920
252b5132 7921 off = local_got_offsets[r_symndx];
f21f3fe0 7922
252b5132
RH		 7923 /* The offset must always be a multiple of 4. We use the
7924 least significant bit to record whether we have already
9b485d32 7925 generated the necessary reloc. */
252b5132
RH		 7926 if ((off & 1) != 0)
7927 off &= ~1;
7928 else
7929 {
b7693d02
DJ		 7930 /* If we are addressing a Thumb function, we need to
7931 adjust the address by one, so that attempts to
7932 call the function pointer will correctly
7933 interpret it as Thumb code. */
7934 if (sym_flags == STT_ARM_TFUNC)
7935 value |= 1;
7936
00a97672
RS		 7937 if (globals->use_rel)
7938 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7939
252b5132
RH		 7940 if (info->shared)
7941 {
7942 asection * srelgot;
947216bf
AM		 7943 Elf_Internal_Rela outrel;
7944 bfd_byte *loc;
f21f3fe0 7945
00a97672
RS		 7946 srelgot = (bfd_get_section_by_name
7947 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7948 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7949
00a97672 7950 outrel.r_addend = addend + value;
252b5132 7951 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7952 + sgot->output_offset
252b5132
RH		 7953 + off);
7954 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7955 loc = srelgot->contents;
00a97672
RS		 7956 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7957 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7958 }
f21f3fe0 7959
252b5132
RH		 7960 local_got_offsets[r_symndx] |= 1;
7961 }
f21f3fe0 7962
252b5132
RH		 7963 value = sgot->output_offset + off;
7964 }
eb043451
PB		 7965 if (r_type != R_ARM_GOT32)
7966 value += sgot->output_section->vma;
9a5aca8c 7967
f21f3fe0 7968 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7969 contents, rel->r_offset, value,
00a97672 7970 rel->r_addend);
f21f3fe0 7971
ba93b8ac
DJ		 7972 case R_ARM_TLS_LDO32:
7973 value = value - dtpoff_base (info);
7974
7975 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7976 contents, rel->r_offset, value,
7977 rel->r_addend);
ba93b8ac
DJ		 7978
7979 case R_ARM_TLS_LDM32:
7980 {
7981 bfd_vma off;
7982
7983 if (globals->sgot == NULL)
7984 abort ();
7985
7986 off = globals->tls_ldm_got.offset;
7987
7988 if ((off & 1) != 0)
7989 off &= ~1;
7990 else
7991 {
7992 /* If we don't know the module number, create a relocation
7993 for it. */
7994 if (info->shared)
7995 {
7996 Elf_Internal_Rela outrel;
7997 bfd_byte *loc;
7998
7999 if (globals->srelgot == NULL)
8000 abort ();
8001
00a97672 8002 outrel.r_addend = 0;
ba93b8ac
DJ		 8003 outrel.r_offset = (globals->sgot->output_section->vma
8004 + globals->sgot->output_offset + off);
8005 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8006
00a97672
RS		 8007 if (globals->use_rel)
8008 bfd_put_32 (output_bfd, outrel.r_addend,
8009 globals->sgot->contents + off);
ba93b8ac
DJ		 8010
8011 loc = globals->srelgot->contents;
00a97672
RS		 8012 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
8013 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8014 }
8015 else
8016 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
8017
8018 globals->tls_ldm_got.offset |= 1;
8019 }
8020
906e58ca 8021 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8022 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8023
8024 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8025 contents, rel->r_offset, value,
00a97672 8026 rel->r_addend);
ba93b8ac
DJ		 8027 }
8028
8029 case R_ARM_TLS_GD32:
8030 case R_ARM_TLS_IE32:
8031 {
8032 bfd_vma off;
8033 int indx;
8034 char tls_type;
8035
8036 if (globals->sgot == NULL)
8037 abort ();
8038
8039 indx = 0;
8040 if (h != NULL)
8041 {
8042 bfd_boolean dyn;
8043 dyn = globals->root.dynamic_sections_created;
8044 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8045 && (!info->shared
8046 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8047 {
8048 *unresolved_reloc_p = FALSE;
8049 indx = h->dynindx;
8050 }
8051 off = h->got.offset;
8052 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8053 }
8054 else
8055 {
8056 if (local_got_offsets == NULL)
8057 abort ();
8058 off = local_got_offsets[r_symndx];
8059 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8060 }
8061
8062 if (tls_type == GOT_UNKNOWN)
8063 abort ();
8064
8065 if ((off & 1) != 0)
8066 off &= ~1;
8067 else
8068 {
8069 bfd_boolean need_relocs = FALSE;
8070 Elf_Internal_Rela outrel;
8071 bfd_byte *loc = NULL;
8072 int cur_off = off;
8073
8074 /* The GOT entries have not been initialized yet. Do it
8075 now, and emit any relocations. If both an IE GOT and a
8076 GD GOT are necessary, we emit the GD first. */
8077
8078 if ((info->shared || indx != 0)
8079 && (h == NULL
8080 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8081 || h->root.type != bfd_link_hash_undefweak))
8082 {
8083 need_relocs = TRUE;
8084 if (globals->srelgot == NULL)
8085 abort ();
8086 loc = globals->srelgot->contents;
00a97672 8087 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 8088 }
8089
8090 if (tls_type & GOT_TLS_GD)
8091 {
8092 if (need_relocs)
8093 {
00a97672 8094 outrel.r_addend = 0;
ba93b8ac 8095 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 8096 + globals->sgot->output_offset
8097 + cur_off);
ba93b8ac 8098 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8099
00a97672
RS		 8100 if (globals->use_rel)
8101 bfd_put_32 (output_bfd, outrel.r_addend,
8102 globals->sgot->contents + cur_off);
8103
8104 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8105 globals->srelgot->reloc_count++;
00a97672 8106 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8107
8108 if (indx == 0)
8109 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8110 globals->sgot->contents + cur_off + 4);
8111 else
8112 {
00a97672 8113 outrel.r_addend = 0;
ba93b8ac
DJ		 8114 outrel.r_info = ELF32_R_INFO (indx,
8115 R_ARM_TLS_DTPOFF32);
8116 outrel.r_offset += 4;
00a97672
RS		 8117
8118 if (globals->use_rel)
8119 bfd_put_32 (output_bfd, outrel.r_addend,
8120 globals->sgot->contents + cur_off + 4);
8121
8122
8123 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8124 globals->srelgot->reloc_count++;
00a97672 8125 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8126 }
8127 }
8128 else
8129 {
8130 /* If we are not emitting relocations for a
8131 general dynamic reference, then we must be in a
8132 static link or an executable link with the
8133 symbol binding locally. Mark it as belonging
8134 to module 1, the executable. */
8135 bfd_put_32 (output_bfd, 1,
8136 globals->sgot->contents + cur_off);
8137 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8138 globals->sgot->contents + cur_off + 4);
8139 }
8140
8141 cur_off += 8;
8142 }
8143
8144 if (tls_type & GOT_TLS_IE)
8145 {
8146 if (need_relocs)
8147 {
00a97672
RS		 8148 if (indx == 0)
8149 outrel.r_addend = value - dtpoff_base (info);
8150 else
8151 outrel.r_addend = 0;
ba93b8ac
DJ		 8152 outrel.r_offset = (globals->sgot->output_section->vma
8153 + globals->sgot->output_offset
8154 + cur_off);
8155 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8156
00a97672
RS		 8157 if (globals->use_rel)
8158 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8159 globals->sgot->contents + cur_off);
8160
00a97672 8161 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8162 globals->srelgot->reloc_count++;
00a97672 8163 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8164 }
8165 else
8166 bfd_put_32 (output_bfd, tpoff (info, value),
8167 globals->sgot->contents + cur_off);
8168 cur_off += 4;
8169 }
8170
8171 if (h != NULL)
8172 h->got.offset |= 1;
8173 else
8174 local_got_offsets[r_symndx] |= 1;
8175 }
8176
8177 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8178 off += 8;
906e58ca 8179 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8180 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8181
8182 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8183 contents, rel->r_offset, value,
00a97672 8184 rel->r_addend);
ba93b8ac
DJ		 8185 }
8186
8187 case R_ARM_TLS_LE32:
8188 if (info->shared)
8189 {
8190 (*_bfd_error_handler)
8191 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8192 input_bfd, input_section,
8193 (long) rel->r_offset, howto->name);
21d799b5 8194 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8195 }
8196 else
8197 value = tpoff (info, value);
906e58ca 8198
ba93b8ac 8199 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8200 contents, rel->r_offset, value,
8201 rel->r_addend);
ba93b8ac 8202
319850b4
JB		 8203 case R_ARM_V4BX:
8204 if (globals->fix_v4bx)
845b51d6
PB		 8205 {
8206 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8207
845b51d6
PB		 8208 /* Ensure that we have a BX instruction. */
8209 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8210
845b51d6
PB		 8211 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8212 {
8213 /* Branch to veneer. */
8214 bfd_vma glue_addr;
8215 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8216 glue_addr -= input_section->output_section->vma
8217 + input_section->output_offset
8218 + rel->r_offset + 8;
8219 insn = (insn & 0xf0000000) | 0x0a000000
8220 | ((glue_addr >> 2) & 0x00ffffff);
8221 }
8222 else
8223 {
8224 /* Preserve Rm (lowest four bits) and the condition code
8225 (highest four bits). Other bits encode MOV PC,Rm. */
8226 insn = (insn & 0xf000000f) | 0x01a0f000;
8227 }
319850b4 8228
845b51d6
PB		 8229 bfd_put_32 (input_bfd, insn, hit_data);
8230 }
319850b4
JB		 8231 return bfd_reloc_ok;
8232
b6895b4f
PB		 8233 case R_ARM_MOVW_ABS_NC:
8234 case R_ARM_MOVT_ABS:
8235 case R_ARM_MOVW_PREL_NC:
8236 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8237 /* Until we properly support segment-base-relative addressing then
8238 we assume the segment base to be zero, as for the group relocations.
8239 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8240 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8241 case R_ARM_MOVW_BREL_NC:
8242 case R_ARM_MOVW_BREL:
8243 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8244 {
8245 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8246
8247 if (globals->use_rel)
8248 {
8249 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8250 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8251 }
92f5d02b 8252
b6895b4f 8253 value += signed_addend;
b6895b4f
PB		 8254
8255 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8256 value -= (input_section->output_section->vma
8257 + input_section->output_offset + rel->r_offset);
8258
92f5d02b
MS		 8259 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8260 return bfd_reloc_overflow;
8261
8262 if (sym_flags == STT_ARM_TFUNC)
8263 value |= 1;
8264
8265 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8266 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8267 value >>= 16;
8268
8269 insn &= 0xfff0f000;
8270 insn |= value & 0xfff;
8271 insn |= (value & 0xf000) << 4;
8272 bfd_put_32 (input_bfd, insn, hit_data);
8273 }
8274 return bfd_reloc_ok;
8275
8276 case R_ARM_THM_MOVW_ABS_NC:
8277 case R_ARM_THM_MOVT_ABS:
8278 case R_ARM_THM_MOVW_PREL_NC:
8279 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8280 /* Until we properly support segment-base-relative addressing then
8281 we assume the segment base to be zero, as for the above relocations.
8282 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8283 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8284 as R_ARM_THM_MOVT_ABS. */
8285 case R_ARM_THM_MOVW_BREL_NC:
8286 case R_ARM_THM_MOVW_BREL:
8287 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8288 {
8289 bfd_vma insn;
906e58ca 8290
b6895b4f
PB		 8291 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8292 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8293
8294 if (globals->use_rel)
8295 {
8296 addend = ((insn >> 4) & 0xf000)
8297 | ((insn >> 15) & 0x0800)
8298 | ((insn >> 4) & 0x0700)
8299 | (insn & 0x00ff);
39623e12 8300 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8301 }
92f5d02b 8302
b6895b4f 8303 value += signed_addend;
b6895b4f
PB		 8304
8305 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8306 value -= (input_section->output_section->vma
8307 + input_section->output_offset + rel->r_offset);
8308
92f5d02b
MS		 8309 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8310 return bfd_reloc_overflow;
8311
8312 if (sym_flags == STT_ARM_TFUNC)
8313 value |= 1;
8314
8315 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8316 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8317 value >>= 16;
8318
8319 insn &= 0xfbf08f00;
8320 insn |= (value & 0xf000) << 4;
8321 insn |= (value & 0x0800) << 15;
8322 insn |= (value & 0x0700) << 4;
8323 insn |= (value & 0x00ff);
8324
8325 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8326 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8327 }
8328 return bfd_reloc_ok;
8329
4962c51a
MS		 8330 case R_ARM_ALU_PC_G0_NC:
8331 case R_ARM_ALU_PC_G1_NC:
8332 case R_ARM_ALU_PC_G0:
8333 case R_ARM_ALU_PC_G1:
8334 case R_ARM_ALU_PC_G2:
8335 case R_ARM_ALU_SB_G0_NC:
8336 case R_ARM_ALU_SB_G1_NC:
8337 case R_ARM_ALU_SB_G0:
8338 case R_ARM_ALU_SB_G1:
8339 case R_ARM_ALU_SB_G2:
8340 {
8341 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8342 bfd_vma pc = input_section->output_section->vma
8343 + input_section->output_offset + rel->r_offset;
8344 /* sb should be the origin of the *segment* containing the symbol.
8345 It is not clear how to obtain this OS-dependent value, so we
8346 make an arbitrary choice of zero. */
8347 bfd_vma sb = 0;
8348 bfd_vma residual;
8349 bfd_vma g_n;
8350 bfd_signed_vma signed_value;
8351 int group = 0;
8352
8353 /* Determine which group of bits to select. */
8354 switch (r_type)
8355 {
8356 case R_ARM_ALU_PC_G0_NC:
8357 case R_ARM_ALU_PC_G0:
8358 case R_ARM_ALU_SB_G0_NC:
8359 case R_ARM_ALU_SB_G0:
8360 group = 0;
8361 break;
8362
8363 case R_ARM_ALU_PC_G1_NC:
8364 case R_ARM_ALU_PC_G1:
8365 case R_ARM_ALU_SB_G1_NC:
8366 case R_ARM_ALU_SB_G1:
8367 group = 1;
8368 break;
8369
8370 case R_ARM_ALU_PC_G2:
8371 case R_ARM_ALU_SB_G2:
8372 group = 2;
8373 break;
8374
8375 default:
906e58ca 8376 abort ();
4962c51a
MS		 8377 }
8378
8379 /* If REL, extract the addend from the insn. If RELA, it will
8380 have already been fetched for us. */
8381 if (globals->use_rel)
8382 {
8383 int negative;
8384 bfd_vma constant = insn & 0xff;
8385 bfd_vma rotation = (insn & 0xf00) >> 8;
8386
8387 if (rotation == 0)
8388 signed_addend = constant;
8389 else
8390 {
8391 /* Compensate for the fact that in the instruction, the
8392 rotation is stored in multiples of 2 bits. */
8393 rotation *= 2;
8394
8395 /* Rotate "constant" right by "rotation" bits. */
8396 signed_addend = (constant >> rotation) |
8397 (constant << (8 * sizeof (bfd_vma) - rotation));
8398 }
8399
8400 /* Determine if the instruction is an ADD or a SUB.
8401 (For REL, this determines the sign of the addend.) */
8402 negative = identify_add_or_sub (insn);
8403 if (negative == 0)
8404 {
8405 (*_bfd_error_handler)
8406 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8407 input_bfd, input_section,
8408 (long) rel->r_offset, howto->name);
906e58ca 8409 return bfd_reloc_overflow;
4962c51a
MS		 8410 }
8411
8412 signed_addend *= negative;
8413 }
8414
8415 /* Compute the value (X) to go in the place. */
8416 if (r_type == R_ARM_ALU_PC_G0_NC
8417 || r_type == R_ARM_ALU_PC_G1_NC
8418 || r_type == R_ARM_ALU_PC_G0
8419 || r_type == R_ARM_ALU_PC_G1
8420 || r_type == R_ARM_ALU_PC_G2)
8421 /* PC relative. */
8422 signed_value = value - pc + signed_addend;
8423 else
8424 /* Section base relative. */
8425 signed_value = value - sb + signed_addend;
8426
8427 /* If the target symbol is a Thumb function, then set the
8428 Thumb bit in the address. */
8429 if (sym_flags == STT_ARM_TFUNC)
8430 signed_value |= 1;
8431
8432 /* Calculate the value of the relevant G_n, in encoded
8433 constant-with-rotation format. */
8434 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8435 &residual);
8436
8437 /* Check for overflow if required. */
8438 if ((r_type == R_ARM_ALU_PC_G0
8439 || r_type == R_ARM_ALU_PC_G1
8440 || r_type == R_ARM_ALU_PC_G2
8441 || r_type == R_ARM_ALU_SB_G0
8442 || r_type == R_ARM_ALU_SB_G1
8443 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8444 {
8445 (*_bfd_error_handler)
8446 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8447 input_bfd, input_section,
8448 (long) rel->r_offset, abs (signed_value), howto->name);
8449 return bfd_reloc_overflow;
8450 }
8451
8452 /* Mask out the value and the ADD/SUB part of the opcode; take care
8453 not to destroy the S bit. */
8454 insn &= 0xff1ff000;
8455
8456 /* Set the opcode according to whether the value to go in the
8457 place is negative. */
8458 if (signed_value < 0)
8459 insn |= 1 << 22;
8460 else
8461 insn |= 1 << 23;
8462
8463 /* Encode the offset. */
8464 insn |= g_n;
8465
8466 bfd_put_32 (input_bfd, insn, hit_data);
8467 }
8468 return bfd_reloc_ok;
8469
8470 case R_ARM_LDR_PC_G0:
8471 case R_ARM_LDR_PC_G1:
8472 case R_ARM_LDR_PC_G2:
8473 case R_ARM_LDR_SB_G0:
8474 case R_ARM_LDR_SB_G1:
8475 case R_ARM_LDR_SB_G2:
8476 {
8477 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8478 bfd_vma pc = input_section->output_section->vma
8479 + input_section->output_offset + rel->r_offset;
8480 bfd_vma sb = 0; /* See note above. */
8481 bfd_vma residual;
8482 bfd_signed_vma signed_value;
8483 int group = 0;
8484
8485 /* Determine which groups of bits to calculate. */
8486 switch (r_type)
8487 {
8488 case R_ARM_LDR_PC_G0:
8489 case R_ARM_LDR_SB_G0:
8490 group = 0;
8491 break;
8492
8493 case R_ARM_LDR_PC_G1:
8494 case R_ARM_LDR_SB_G1:
8495 group = 1;
8496 break;
8497
8498 case R_ARM_LDR_PC_G2:
8499 case R_ARM_LDR_SB_G2:
8500 group = 2;
8501 break;
8502
8503 default:
906e58ca 8504 abort ();
4962c51a
MS		 8505 }
8506
8507 /* If REL, extract the addend from the insn. If RELA, it will
8508 have already been fetched for us. */
8509 if (globals->use_rel)
8510 {
8511 int negative = (insn & (1 << 23)) ? 1 : -1;
8512 signed_addend = negative * (insn & 0xfff);
8513 }
8514
8515 /* Compute the value (X) to go in the place. */
8516 if (r_type == R_ARM_LDR_PC_G0
8517 || r_type == R_ARM_LDR_PC_G1
8518 || r_type == R_ARM_LDR_PC_G2)
8519 /* PC relative. */
8520 signed_value = value - pc + signed_addend;
8521 else
8522 /* Section base relative. */
8523 signed_value = value - sb + signed_addend;
8524
8525 /* Calculate the value of the relevant G_{n-1} to obtain
8526 the residual at that stage. */
8527 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8528
8529 /* Check for overflow. */
8530 if (residual >= 0x1000)
8531 {
8532 (*_bfd_error_handler)
8533 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8534 input_bfd, input_section,
8535 (long) rel->r_offset, abs (signed_value), howto->name);
8536 return bfd_reloc_overflow;
8537 }
8538
8539 /* Mask out the value and U bit. */
8540 insn &= 0xff7ff000;
8541
8542 /* Set the U bit if the value to go in the place is non-negative. */
8543 if (signed_value >= 0)
8544 insn |= 1 << 23;
8545
8546 /* Encode the offset. */
8547 insn |= residual;
8548
8549 bfd_put_32 (input_bfd, insn, hit_data);
8550 }
8551 return bfd_reloc_ok;
8552
8553 case R_ARM_LDRS_PC_G0:
8554 case R_ARM_LDRS_PC_G1:
8555 case R_ARM_LDRS_PC_G2:
8556 case R_ARM_LDRS_SB_G0:
8557 case R_ARM_LDRS_SB_G1:
8558 case R_ARM_LDRS_SB_G2:
8559 {
8560 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8561 bfd_vma pc = input_section->output_section->vma
8562 + input_section->output_offset + rel->r_offset;
8563 bfd_vma sb = 0; /* See note above. */
8564 bfd_vma residual;
8565 bfd_signed_vma signed_value;
8566 int group = 0;
8567
8568 /* Determine which groups of bits to calculate. */
8569 switch (r_type)
8570 {
8571 case R_ARM_LDRS_PC_G0:
8572 case R_ARM_LDRS_SB_G0:
8573 group = 0;
8574 break;
8575
8576 case R_ARM_LDRS_PC_G1:
8577 case R_ARM_LDRS_SB_G1:
8578 group = 1;
8579 break;
8580
8581 case R_ARM_LDRS_PC_G2:
8582 case R_ARM_LDRS_SB_G2:
8583 group = 2;
8584 break;
8585
8586 default:
906e58ca 8587 abort ();
4962c51a
MS		 8588 }
8589
8590 /* If REL, extract the addend from the insn. If RELA, it will
8591 have already been fetched for us. */
8592 if (globals->use_rel)
8593 {
8594 int negative = (insn & (1 << 23)) ? 1 : -1;
8595 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8596 }
8597
8598 /* Compute the value (X) to go in the place. */
8599 if (r_type == R_ARM_LDRS_PC_G0
8600 || r_type == R_ARM_LDRS_PC_G1
8601 || r_type == R_ARM_LDRS_PC_G2)
8602 /* PC relative. */
8603 signed_value = value - pc + signed_addend;
8604 else
8605 /* Section base relative. */
8606 signed_value = value - sb + signed_addend;
8607
8608 /* Calculate the value of the relevant G_{n-1} to obtain
8609 the residual at that stage. */
8610 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8611
8612 /* Check for overflow. */
8613 if (residual >= 0x100)
8614 {
8615 (*_bfd_error_handler)
8616 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8617 input_bfd, input_section,
8618 (long) rel->r_offset, abs (signed_value), howto->name);
8619 return bfd_reloc_overflow;
8620 }
8621
8622 /* Mask out the value and U bit. */
8623 insn &= 0xff7ff0f0;
8624
8625 /* Set the U bit if the value to go in the place is non-negative. */
8626 if (signed_value >= 0)
8627 insn |= 1 << 23;
8628
8629 /* Encode the offset. */
8630 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8631
8632 bfd_put_32 (input_bfd, insn, hit_data);
8633 }
8634 return bfd_reloc_ok;
8635
8636 case R_ARM_LDC_PC_G0:
8637 case R_ARM_LDC_PC_G1:
8638 case R_ARM_LDC_PC_G2:
8639 case R_ARM_LDC_SB_G0:
8640 case R_ARM_LDC_SB_G1:
8641 case R_ARM_LDC_SB_G2:
8642 {
8643 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8644 bfd_vma pc = input_section->output_section->vma
8645 + input_section->output_offset + rel->r_offset;
8646 bfd_vma sb = 0; /* See note above. */
8647 bfd_vma residual;
8648 bfd_signed_vma signed_value;
8649 int group = 0;
8650
8651 /* Determine which groups of bits to calculate. */
8652 switch (r_type)
8653 {
8654 case R_ARM_LDC_PC_G0:
8655 case R_ARM_LDC_SB_G0:
8656 group = 0;
8657 break;
8658
8659 case R_ARM_LDC_PC_G1:
8660 case R_ARM_LDC_SB_G1:
8661 group = 1;
8662 break;
8663
8664 case R_ARM_LDC_PC_G2:
8665 case R_ARM_LDC_SB_G2:
8666 group = 2;
8667 break;
8668
8669 default:
906e58ca 8670 abort ();
4962c51a
MS		 8671 }
8672
8673 /* If REL, extract the addend from the insn. If RELA, it will
8674 have already been fetched for us. */
8675 if (globals->use_rel)
8676 {
8677 int negative = (insn & (1 << 23)) ? 1 : -1;
8678 signed_addend = negative * ((insn & 0xff) << 2);
8679 }
8680
8681 /* Compute the value (X) to go in the place. */
8682 if (r_type == R_ARM_LDC_PC_G0
8683 || r_type == R_ARM_LDC_PC_G1
8684 || r_type == R_ARM_LDC_PC_G2)
8685 /* PC relative. */
8686 signed_value = value - pc + signed_addend;
8687 else
8688 /* Section base relative. */
8689 signed_value = value - sb + signed_addend;
8690
8691 /* Calculate the value of the relevant G_{n-1} to obtain
8692 the residual at that stage. */
8693 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8694
8695 /* Check for overflow. (The absolute value to go in the place must be
8696 divisible by four and, after having been divided by four, must
8697 fit in eight bits.) */
8698 if ((residual & 0x3) != 0 || residual >= 0x400)
8699 {
8700 (*_bfd_error_handler)
8701 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8702 input_bfd, input_section,
8703 (long) rel->r_offset, abs (signed_value), howto->name);
8704 return bfd_reloc_overflow;
8705 }
8706
8707 /* Mask out the value and U bit. */
8708 insn &= 0xff7fff00;
8709
8710 /* Set the U bit if the value to go in the place is non-negative. */
8711 if (signed_value >= 0)
8712 insn |= 1 << 23;
8713
8714 /* Encode the offset. */
8715 insn |= residual >> 2;
8716
8717 bfd_put_32 (input_bfd, insn, hit_data);
8718 }
8719 return bfd_reloc_ok;
8720
252b5132
RH		 8721 default:
8722 return bfd_reloc_notsupported;
8723 }
8724}
8725
98c1d4aa
NC		 8726/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8727static void
57e8b36a
NC		 8728arm_add_to_rel (bfd * abfd,
8729 bfd_byte * address,
8730 reloc_howto_type * howto,
8731 bfd_signed_vma increment)
98c1d4aa 8732{
98c1d4aa
NC		 8733 bfd_signed_vma addend;
8734
bd97cb95
DJ		 8735 if (howto->type == R_ARM_THM_CALL
8736 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8737 {
9a5aca8c
AM		 8738 int upper_insn, lower_insn;
8739 int upper, lower;
98c1d4aa 8740
9a5aca8c
AM		 8741 upper_insn = bfd_get_16 (abfd, address);
8742 lower_insn = bfd_get_16 (abfd, address + 2);
8743 upper = upper_insn & 0x7ff;
8744 lower = lower_insn & 0x7ff;
8745
8746 addend = (upper << 12) | (lower << 1);
ddda4409 8747 addend += increment;
9a5aca8c 8748 addend >>= 1;
98c1d4aa 8749
9a5aca8c
AM		 8750 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8751 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8752
dc810e39
AM		 8753 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8754 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8755 }
8756 else
8757 {
8758 bfd_vma contents;
8759
8760 contents = bfd_get_32 (abfd, address);
8761
8762 /* Get the (signed) value from the instruction. */
8763 addend = contents & howto->src_mask;
8764 if (addend & ((howto->src_mask + 1) >> 1))
8765 {
8766 bfd_signed_vma mask;
8767
8768 mask = -1;
8769 mask &= ~ howto->src_mask;
8770 addend |= mask;
8771 }
8772
8773 /* Add in the increment, (which is a byte value). */
8774 switch (howto->type)
8775 {
8776 default:
8777 addend += increment;
8778 break;
8779
8780 case R_ARM_PC24:
c6596c5e 8781 case R_ARM_PLT32:
5b5bb741
PB		 8782 case R_ARM_CALL:
8783 case R_ARM_JUMP24:
9a5aca8c 8784 addend <<= howto->size;
dc810e39 8785 addend += increment;
9a5aca8c
AM		 8786
8787 /* Should we check for overflow here ? */
8788
8789 /* Drop any undesired bits. */
8790 addend >>= howto->rightshift;
8791 break;
8792 }
8793
8794 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8795
8796 bfd_put_32 (abfd, contents, address);
ddda4409 8797 }
98c1d4aa 8798}
252b5132 8799
ba93b8ac
DJ		 8800#define IS_ARM_TLS_RELOC(R_TYPE) \
8801 ((R_TYPE) == R_ARM_TLS_GD32 \
8802 || (R_TYPE) == R_ARM_TLS_LDO32 \
8803 || (R_TYPE) == R_ARM_TLS_LDM32 \
8804 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8805 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8806 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8807 || (R_TYPE) == R_ARM_TLS_LE32 \
8808 || (R_TYPE) == R_ARM_TLS_IE32)
8809
252b5132 8810/* Relocate an ARM ELF section. */
906e58ca 8811
b34976b6 8812static bfd_boolean
57e8b36a
NC		 8813elf32_arm_relocate_section (bfd * output_bfd,
8814 struct bfd_link_info * info,
8815 bfd * input_bfd,
8816 asection * input_section,
8817 bfd_byte * contents,
8818 Elf_Internal_Rela * relocs,
8819 Elf_Internal_Sym * local_syms,
8820 asection ** local_sections)
252b5132 8821{
b34976b6
AM		 8822 Elf_Internal_Shdr *symtab_hdr;
8823 struct elf_link_hash_entry **sym_hashes;
8824 Elf_Internal_Rela *rel;
8825 Elf_Internal_Rela *relend;
8826 const char *name;
b32d3aa2 8827 struct elf32_arm_link_hash_table * globals;
252b5132 8828
4e7fd91e 8829 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8830 if (globals == NULL)
8831 return FALSE;
b491616a 8832
0ffa91dd 8833 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8834 sym_hashes = elf_sym_hashes (input_bfd);
8835
8836 rel = relocs;
8837 relend = relocs + input_section->reloc_count;
8838 for (; rel < relend; rel++)
8839 {
ba96a88f
NC		 8840 int r_type;
8841 reloc_howto_type * howto;
8842 unsigned long r_symndx;
8843 Elf_Internal_Sym * sym;
8844 asection * sec;
252b5132 8845 struct elf_link_hash_entry * h;
ba96a88f
NC		 8846 bfd_vma relocation;
8847 bfd_reloc_status_type r;
8848 arelent bfd_reloc;
ba93b8ac 8849 char sym_type;
0945cdfd 8850 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8851 char *error_message = NULL;
f21f3fe0 8852
252b5132 8853 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8854 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8855 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8856
ba96a88f
NC		 8857 if ( r_type == R_ARM_GNU_VTENTRY
8858 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8859 continue;
8860
b32d3aa2 8861 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8862 howto = bfd_reloc.howto;
252b5132 8863
252b5132
RH		 8864 h = NULL;
8865 sym = NULL;
8866 sec = NULL;
9b485d32 8867
252b5132
RH		 8868 if (r_symndx < symtab_hdr->sh_info)
8869 {
8870 sym = local_syms + r_symndx;
ba93b8ac 8871 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8872 sec = local_sections[r_symndx];
ffcb4889
NS		 8873
8874 /* An object file might have a reference to a local
8875 undefined symbol. This is a daft object file, but we
8876 should at least do something about it. V4BX & NONE
8877 relocations do not use the symbol and are explicitly
8878 allowed to use the undefined symbol, so allow those. */
8879 if (r_type != R_ARM_V4BX
8880 && r_type != R_ARM_NONE
8881 && bfd_is_und_section (sec)
8882 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8883 {
8884 if (!info->callbacks->undefined_symbol
8885 (info, bfd_elf_string_from_elf_section
8886 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8887 input_bfd, input_section,
8888 rel->r_offset, TRUE))
8889 return FALSE;
8890 }
8891
4e7fd91e 8892 if (globals->use_rel)
f8df10f4 8893 {
4e7fd91e
PB		 8894 relocation = (sec->output_section->vma
8895 + sec->output_offset
8896 + sym->st_value);
ab96bf03
AM		 8897 if (!info->relocatable
8898 && (sec->flags & SEC_MERGE)
8899 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8900 {
4e7fd91e
PB		 8901 asection *msec;
8902 bfd_vma addend, value;
8903
39623e12 8904 switch (r_type)
4e7fd91e 8905 {
39623e12
PB		 8906 case R_ARM_MOVW_ABS_NC:
8907 case R_ARM_MOVT_ABS:
8908 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8909 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8910 addend = (addend ^ 0x8000) - 0x8000;
8911 break;
f8df10f4 8912
39623e12
PB		 8913 case R_ARM_THM_MOVW_ABS_NC:
8914 case R_ARM_THM_MOVT_ABS:
8915 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8916 << 16;
8917 value |= bfd_get_16 (input_bfd,
8918 contents + rel->r_offset + 2);
8919 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8920 | ((value & 0x04000000) >> 15);
8921 addend = (addend ^ 0x8000) - 0x8000;
8922 break;
f8df10f4 8923
39623e12
PB		 8924 default:
8925 if (howto->rightshift
8926 || (howto->src_mask & (howto->src_mask + 1)))
8927 {
8928 (*_bfd_error_handler)
8929 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8930 input_bfd, input_section,
8931 (long) rel->r_offset, howto->name);
8932 return FALSE;
8933 }
8934
8935 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8936
8937 /* Get the (signed) value from the instruction. */
8938 addend = value & howto->src_mask;
8939 if (addend & ((howto->src_mask + 1) >> 1))
8940 {
8941 bfd_signed_vma mask;
8942
8943 mask = -1;
8944 mask &= ~ howto->src_mask;
8945 addend |= mask;
8946 }
8947 break;
4e7fd91e 8948 }
39623e12 8949
4e7fd91e
PB		 8950 msec = sec;
8951 addend =
8952 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8953 - relocation;
8954 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8955
8956 /* Cases here must match those in the preceeding
8957 switch statement. */
8958 switch (r_type)
8959 {
8960 case R_ARM_MOVW_ABS_NC:
8961 case R_ARM_MOVT_ABS:
8962 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8963 | (addend & 0xfff);
8964 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8965 break;
8966
8967 case R_ARM_THM_MOVW_ABS_NC:
8968 case R_ARM_THM_MOVT_ABS:
8969 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8970 | (addend & 0xff) | ((addend & 0x0800) << 15);
8971 bfd_put_16 (input_bfd, value >> 16,
8972 contents + rel->r_offset);
8973 bfd_put_16 (input_bfd, value,
8974 contents + rel->r_offset + 2);
8975 break;
8976
8977 default:
8978 value = (value & ~ howto->dst_mask)
8979 | (addend & howto->dst_mask);
8980 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8981 break;
8982 }
f8df10f4 8983 }
f8df10f4 8984 }
4e7fd91e
PB		 8985 else
8986 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8987 }
8988 else
8989 {
560e09e9 8990 bfd_boolean warned;
560e09e9 8991
b2a8e766
AM		 8992 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8993 r_symndx, symtab_hdr, sym_hashes,
8994 h, sec, relocation,
8995 unresolved_reloc, warned);
ba93b8ac
DJ		 8996
8997 sym_type = h->type;
252b5132
RH		 8998 }
8999
ab96bf03
AM		 9000 if (sec != NULL && elf_discarded_section (sec))
9001 {
9002 /* For relocs against symbols from removed linkonce sections,
9003 or sections discarded by a linker script, we just want the
9004 section contents zeroed. Avoid any special processing. */
9005 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
9006 rel->r_info = 0;
9007 rel->r_addend = 0;
9008 continue;
9009 }
9010
9011 if (info->relocatable)
9012 {
9013 /* This is a relocatable link. We don't have to change
9014 anything, unless the reloc is against a section symbol,
9015 in which case we have to adjust according to where the
9016 section symbol winds up in the output section. */
9017 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9018 {
9019 if (globals->use_rel)
9020 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9021 howto, (bfd_signed_vma) sec->output_offset);
9022 else
9023 rel->r_addend += sec->output_offset;
9024 }
9025 continue;
9026 }
9027
252b5132
RH		 9028 if (h != NULL)
9029 name = h->root.root.string;
9030 else
9031 {
9032 name = (bfd_elf_string_from_elf_section
9033 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9034 if (name == NULL || *name == '\0')
9035 name = bfd_section_name (input_bfd, sec);
9036 }
f21f3fe0 9037
ba93b8ac
DJ		 9038 if (r_symndx != 0
9039 && r_type != R_ARM_NONE
9040 && (h == NULL
9041 || h->root.type == bfd_link_hash_defined
9042 || h->root.type == bfd_link_hash_defweak)
9043 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9044 {
9045 (*_bfd_error_handler)
9046 ((sym_type == STT_TLS
9047 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9048 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9049 input_bfd,
9050 input_section,
9051 (long) rel->r_offset,
9052 howto->name,
9053 name);
9054 }
9055
252b5132
RH		 9056 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9057 input_section, contents, rel,
9058 relocation, info, sec, name,
9059 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 9060 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 9061 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9062
9063 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9064 because such sections are not SEC_ALLOC and thus ld.so will
9065 not process them. */
9066 if (unresolved_reloc
9067 && !((input_section->flags & SEC_DEBUGGING) != 0
9068 && h->def_dynamic))
9069 {
9070 (*_bfd_error_handler)
843fe662
L		 9071 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9072 input_bfd,
9073 input_section,
9074 (long) rel->r_offset,
9075 howto->name,
9076 h->root.root.string);
0945cdfd
DJ		 9077 return FALSE;
9078 }
252b5132
RH		 9079
9080 if (r != bfd_reloc_ok)
9081 {
252b5132
RH		 9082 switch (r)
9083 {
9084 case bfd_reloc_overflow:
cf919dfd
PB		 9085 /* If the overflowing reloc was to an undefined symbol,
9086 we have already printed one error message and there
9087 is no point complaining again. */
9088 if ((! h ||
9089 h->root.type != bfd_link_hash_undefined)
9090 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9091 (info, (h ? &h->root : NULL), name, howto->name,
9092 (bfd_vma) 0, input_bfd, input_section,
9093 rel->r_offset))))
b34976b6 9094 return FALSE;
252b5132
RH		 9095 break;
9096
9097 case bfd_reloc_undefined:
9098 if (!((*info->callbacks->undefined_symbol)
9099 (info, name, input_bfd, input_section,
b34976b6
AM		 9100 rel->r_offset, TRUE)))
9101 return FALSE;
252b5132
RH		 9102 break;
9103
9104 case bfd_reloc_outofrange:
f2a9dd69 9105 error_message = _("out of range");
252b5132
RH		 9106 goto common_error;
9107
9108 case bfd_reloc_notsupported:
f2a9dd69 9109 error_message = _("unsupported relocation");
252b5132
RH		 9110 goto common_error;
9111
9112 case bfd_reloc_dangerous:
f2a9dd69 9113 /* error_message should already be set. */
252b5132
RH		 9114 goto common_error;
9115
9116 default:
f2a9dd69 9117 error_message = _("unknown error");
8029a119 9118 /* Fall through. */
252b5132
RH		 9119
9120 common_error:
f2a9dd69
DJ		 9121 BFD_ASSERT (error_message != NULL);
9122 if (!((*info->callbacks->reloc_dangerous)
9123 (info, error_message, input_bfd, input_section,
252b5132 9124 rel->r_offset)))
b34976b6 9125 return FALSE;
252b5132
RH		 9126 break;
9127 }
9128 }
9129 }
9130
b34976b6 9131 return TRUE;
252b5132
RH		 9132}
9133
91d6fa6a 9134/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9135 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9136 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9137 maintaining that condition). */
9138
9139static void
9140add_unwind_table_edit (arm_unwind_table_edit **head,
9141 arm_unwind_table_edit **tail,
9142 arm_unwind_edit_type type,
9143 asection *linked_section,
91d6fa6a 9144 unsigned int tindex)
2468f9c9 9145{
21d799b5
NC		 9146 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9147 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9148
9149 new_edit->type = type;
9150 new_edit->linked_section = linked_section;
91d6fa6a 9151 new_edit->index = tindex;
2468f9c9 9152
91d6fa6a 9153 if (tindex > 0)
2468f9c9
PB		 9154 {
9155 new_edit->next = NULL;
9156
9157 if (*tail)
9158 (*tail)->next = new_edit;
9159
9160 (*tail) = new_edit;
9161
9162 if (!*head)
9163 (*head) = new_edit;
9164 }
9165 else
9166 {
9167 new_edit->next = *head;
9168
9169 if (!*tail)
9170 *tail = new_edit;
9171
9172 *head = new_edit;
9173 }
9174}
9175
9176static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9177
9178/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9179static void
9180adjust_exidx_size(asection *exidx_sec, int adjust)
9181{
9182 asection *out_sec;
9183
9184 if (!exidx_sec->rawsize)
9185 exidx_sec->rawsize = exidx_sec->size;
9186
9187 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9188 out_sec = exidx_sec->output_section;
9189 /* Adjust size of output section. */
9190 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9191}
9192
9193/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9194static void
9195insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9196{
9197 struct _arm_elf_section_data *exidx_arm_data;
9198
9199 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9200 add_unwind_table_edit (
9201 &exidx_arm_data->u.exidx.unwind_edit_list,
9202 &exidx_arm_data->u.exidx.unwind_edit_tail,
9203 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9204
9205 adjust_exidx_size(exidx_sec, 8);
9206}
9207
9208/* Scan .ARM.exidx tables, and create a list describing edits which should be
9209 made to those tables, such that:
9210
9211 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9212 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9213 codes which have been inlined into the index).
9214
9215 The edits are applied when the tables are written
9216 (in elf32_arm_write_section).
9217*/
9218
9219bfd_boolean
9220elf32_arm_fix_exidx_coverage (asection **text_section_order,
9221 unsigned int num_text_sections,
9222 struct bfd_link_info *info)
9223{
9224 bfd *inp;
9225 unsigned int last_second_word = 0, i;
9226 asection *last_exidx_sec = NULL;
9227 asection *last_text_sec = NULL;
9228 int last_unwind_type = -1;
9229
9230 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9231 text sections. */
9232 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9233 {
9234 asection *sec;
9235
9236 for (sec = inp->sections; sec != NULL; sec = sec->next)
9237 {
9238 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9239 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9240
dec9d5df 9241 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9242 continue;
9243
9244 if (elf_sec->linked_to)
9245 {
9246 Elf_Internal_Shdr *linked_hdr
9247 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9248 struct _arm_elf_section_data *linked_sec_arm_data
9249 = get_arm_elf_section_data (linked_hdr->bfd_section);
9250
9251 if (linked_sec_arm_data == NULL)
9252 continue;
9253
9254 /* Link this .ARM.exidx section back from the text section it
9255 describes. */
9256 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9257 }
9258 }
9259 }
9260
9261 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9262 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9263 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9264
9265 for (i = 0; i < num_text_sections; i++)
9266 {
9267 asection *sec = text_section_order[i];
9268 asection *exidx_sec;
9269 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9270 struct _arm_elf_section_data *exidx_arm_data;
9271 bfd_byte *contents = NULL;
9272 int deleted_exidx_bytes = 0;
9273 bfd_vma j;
9274 arm_unwind_table_edit *unwind_edit_head = NULL;
9275 arm_unwind_table_edit *unwind_edit_tail = NULL;
9276 Elf_Internal_Shdr *hdr;
9277 bfd *ibfd;
9278
9279 if (arm_data == NULL)
9280 continue;
9281
9282 exidx_sec = arm_data->u.text.arm_exidx_sec;
9283 if (exidx_sec == NULL)
9284 {
9285 /* Section has no unwind data. */
9286 if (last_unwind_type == 0 || !last_exidx_sec)
9287 continue;
9288
9289 /* Ignore zero sized sections. */
9290 if (sec->size == 0)
9291 continue;
9292
9293 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9294 last_unwind_type = 0;
9295 continue;
9296 }
9297
22a8f80e
PB		 9298 /* Skip /DISCARD/ sections. */
9299 if (bfd_is_abs_section (exidx_sec->output_section))
9300 continue;
9301
2468f9c9
PB		 9302 hdr = &elf_section_data (exidx_sec)->this_hdr;
9303 if (hdr->sh_type != SHT_ARM_EXIDX)
9304 continue;
9305
9306 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9307 if (exidx_arm_data == NULL)
9308 continue;
9309
9310 ibfd = exidx_sec->owner;
9311
9312 if (hdr->contents != NULL)
9313 contents = hdr->contents;
9314 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9315 /* An error? */
9316 continue;
9317
9318 for (j = 0; j < hdr->sh_size; j += 8)
9319 {
9320 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9321 int unwind_type;
9322 int elide = 0;
9323
9324 /* An EXIDX_CANTUNWIND entry. */
9325 if (second_word == 1)
9326 {
9327 if (last_unwind_type == 0)
9328 elide = 1;
9329 unwind_type = 0;
9330 }
9331 /* Inlined unwinding data. Merge if equal to previous. */
9332 else if ((second_word & 0x80000000) != 0)
9333 {
9334 if (last_second_word == second_word && last_unwind_type == 1)
9335 elide = 1;
9336 unwind_type = 1;
9337 last_second_word = second_word;
9338 }
9339 /* Normal table entry. In theory we could merge these too,
9340 but duplicate entries are likely to be much less common. */
9341 else
9342 unwind_type = 2;
9343
9344 if (elide)
9345 {
9346 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9347 DELETE_EXIDX_ENTRY, NULL, j / 8);
9348
9349 deleted_exidx_bytes += 8;
9350 }
9351
9352 last_unwind_type = unwind_type;
9353 }
9354
9355 /* Free contents if we allocated it ourselves. */
9356 if (contents != hdr->contents)
9357 free (contents);
9358
9359 /* Record edits to be applied later (in elf32_arm_write_section). */
9360 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9361 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9362
9363 if (deleted_exidx_bytes > 0)
9364 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9365
9366 last_exidx_sec = exidx_sec;
9367 last_text_sec = sec;
9368 }
9369
9370 /* Add terminating CANTUNWIND entry. */
9371 if (last_exidx_sec && last_unwind_type != 0)
9372 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9373
9374 return TRUE;
9375}
9376
3e6b1042
DJ		 9377static bfd_boolean
9378elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9379 bfd *ibfd, const char *name)
9380{
9381 asection *sec, *osec;
9382
9383 sec = bfd_get_section_by_name (ibfd, name);
9384 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9385 return TRUE;
9386
9387 osec = sec->output_section;
9388 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9389 return TRUE;
9390
9391 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9392 sec->output_offset, sec->size))
9393 return FALSE;
9394
9395 return TRUE;
9396}
9397
9398static bfd_boolean
9399elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9400{
9401 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 9402 asection *sec, *osec;
3e6b1042 9403
4dfe6ac6
NC		 9404 if (globals == NULL)
9405 return FALSE;
9406
3e6b1042
DJ		 9407 /* Invoke the regular ELF backend linker to do all the work. */
9408 if (!bfd_elf_final_link (abfd, info))
9409 return FALSE;
9410
fe33d2fa
CL		 9411 /* Process stub sections (eg BE8 encoding, ...). */
9412 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9413 int i;
9414 for(i=0; i<htab->top_id; i++) {
9415 sec = htab->stub_group[i].stub_sec;
9416 if (sec) {
9417 osec = sec->output_section;
9418 elf32_arm_write_section (abfd, info, sec, sec->contents);
9419 if (! bfd_set_section_contents (abfd, osec, sec->contents,
9420 sec->output_offset, sec->size))
9421 return FALSE;
9422 }
9423 }
9424
3e6b1042
DJ		 9425 /* Write out any glue sections now that we have created all the
9426 stubs. */
9427 if (globals->bfd_of_glue_owner != NULL)
9428 {
9429 if (! elf32_arm_output_glue_section (info, abfd,
9430 globals->bfd_of_glue_owner,
9431 ARM2THUMB_GLUE_SECTION_NAME))
9432 return FALSE;
9433
9434 if (! elf32_arm_output_glue_section (info, abfd,
9435 globals->bfd_of_glue_owner,
9436 THUMB2ARM_GLUE_SECTION_NAME))
9437 return FALSE;
9438
9439 if (! elf32_arm_output_glue_section (info, abfd,
9440 globals->bfd_of_glue_owner,
9441 VFP11_ERRATUM_VENEER_SECTION_NAME))
9442 return FALSE;
9443
9444 if (! elf32_arm_output_glue_section (info, abfd,
9445 globals->bfd_of_glue_owner,
9446 ARM_BX_GLUE_SECTION_NAME))
9447 return FALSE;
9448 }
9449
9450 return TRUE;
9451}
9452
c178919b
NC		 9453/* Set the right machine number. */
9454
9455static bfd_boolean
57e8b36a 9456elf32_arm_object_p (bfd *abfd)
c178919b 9457{
5a6c6817 9458 unsigned int mach;
57e8b36a 9459
5a6c6817 9460 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9461
5a6c6817
NC		 9462 if (mach != bfd_mach_arm_unknown)
9463 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9464
9465 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9466 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9467
e16bb312 9468 else
5a6c6817 9469 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9470
9471 return TRUE;
9472}
9473
fc830a83 9474/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9475
b34976b6 9476static bfd_boolean
57e8b36a 9477elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9478{
9479 if (elf_flags_init (abfd)
9480 && elf_elfheader (abfd)->e_flags != flags)
9481 {
fc830a83
NC		 9482 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9483 {
fd2ec330 9484 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9485 (*_bfd_error_handler)
9486 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9487 abfd);
fc830a83 9488 else
d003868e
AM		 9489 _bfd_error_handler
9490 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9491 abfd);
fc830a83 9492 }
252b5132
RH		 9493 }
9494 else
9495 {
9496 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9497 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9498 }
9499
b34976b6 9500 return TRUE;
252b5132
RH		 9501}
9502
fc830a83 9503/* Copy backend specific data from one object module to another. */
9b485d32 9504
b34976b6 9505static bfd_boolean
57e8b36a 9506elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9507{
9508 flagword in_flags;
9509 flagword out_flags;
9510
0ffa91dd 9511 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9512 return TRUE;
252b5132 9513
fc830a83 9514 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9515 out_flags = elf_elfheader (obfd)->e_flags;
9516
fc830a83
NC		 9517 if (elf_flags_init (obfd)
9518 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9519 && in_flags != out_flags)
252b5132 9520 {
252b5132 9521 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9522 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9523 return FALSE;
252b5132
RH		 9524
9525 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9526 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9527 return FALSE;
252b5132
RH		 9528
9529 /* If the src and dest have different interworking flags
9530 then turn off the interworking bit. */
fd2ec330 9531 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9532 {
fd2ec330 9533 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9534 _bfd_error_handler
9535 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9536 obfd, ibfd);
252b5132 9537
fd2ec330 9538 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9539 }
1006ba19
PB		 9540
9541 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9542 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9543 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9544 }
9545
9546 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9547 elf_flags_init (obfd) = TRUE;
252b5132 9548
94a3258f
PB		 9549 /* Also copy the EI_OSABI field. */
9550 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9551 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9552
104d59d1
JM		 9553 /* Copy object attributes. */
9554 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9555
9556 return TRUE;
9557}
9558
9559/* Values for Tag_ABI_PCS_R9_use. */
9560enum
9561{
9562 AEABI_R9_V6,
9563 AEABI_R9_SB,
9564 AEABI_R9_TLS,
9565 AEABI_R9_unused
9566};
9567
9568/* Values for Tag_ABI_PCS_RW_data. */
9569enum
9570{
9571 AEABI_PCS_RW_data_absolute,
9572 AEABI_PCS_RW_data_PCrel,
9573 AEABI_PCS_RW_data_SBrel,
9574 AEABI_PCS_RW_data_unused
9575};
9576
9577/* Values for Tag_ABI_enum_size. */
9578enum
9579{
9580 AEABI_enum_unused,
9581 AEABI_enum_short,
9582 AEABI_enum_wide,
9583 AEABI_enum_forced_wide
9584};
9585
104d59d1
JM		 9586/* Determine whether an object attribute tag takes an integer, a
9587 string or both. */
906e58ca 9588
104d59d1
JM		 9589static int
9590elf32_arm_obj_attrs_arg_type (int tag)
9591{
9592 if (tag == Tag_compatibility)
3483fe2e 9593 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9594 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9595 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9596 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9597 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9598 else if (tag < 32)
3483fe2e 9599 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9600 else
3483fe2e 9601 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9602}
9603
5aa6ff7c
AS		 9604/* The ABI defines that Tag_conformance should be emitted first, and that
9605 Tag_nodefaults should be second (if either is defined). This sets those
9606 two positions, and bumps up the position of all the remaining tags to
9607 compensate. */
9608static int
9609elf32_arm_obj_attrs_order (int num)
9610{
9611 if (num == 4)
9612 return Tag_conformance;
9613 if (num == 5)
9614 return Tag_nodefaults;
9615 if ((num - 2) < Tag_nodefaults)
9616 return num - 2;
9617 if ((num - 1) < Tag_conformance)
9618 return num - 1;
9619 return num;
9620}
9621
91e22acd
AS		 9622/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9623 Returns -1 if no architecture could be read. */
9624
9625static int
9626get_secondary_compatible_arch (bfd *abfd)
9627{
9628 obj_attribute *attr =
9629 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9630
9631 /* Note: the tag and its argument below are uleb128 values, though
9632 currently-defined values fit in one byte for each. */
9633 if (attr->s
9634 && attr->s[0] == Tag_CPU_arch
9635 && (attr->s[1] & 128) != 128
9636 && attr->s[2] == 0)
9637 return attr->s[1];
9638
9639 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9640 return -1;
9641}
9642
9643/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9644 The tag is removed if ARCH is -1. */
9645
8e79c3df 9646static void
91e22acd 9647set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9648{
91e22acd
AS		 9649 obj_attribute *attr =
9650 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9651
91e22acd
AS		 9652 if (arch == -1)
9653 {
9654 attr->s = NULL;
9655 return;
8e79c3df 9656 }
91e22acd
AS		 9657
9658 /* Note: the tag and its argument below are uleb128 values, though
9659 currently-defined values fit in one byte for each. */
9660 if (!attr->s)
21d799b5 9661 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 9662 attr->s[0] = Tag_CPU_arch;
9663 attr->s[1] = arch;
9664 attr->s[2] = '\0';
8e79c3df
CM		 9665}
9666
91e22acd
AS		 9667/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9668 into account. */
9669
9670static int
9671tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9672 int newtag, int secondary_compat)
8e79c3df 9673{
91e22acd
AS		 9674#define T(X) TAG_CPU_ARCH_##X
9675 int tagl, tagh, result;
9676 const int v6t2[] =
9677 {
9678 T(V6T2), /* PRE_V4. */
9679 T(V6T2), /* V4. */
9680 T(V6T2), /* V4T. */
9681 T(V6T2), /* V5T. */
9682 T(V6T2), /* V5TE. */
9683 T(V6T2), /* V5TEJ. */
9684 T(V6T2), /* V6. */
9685 T(V7), /* V6KZ. */
9686 T(V6T2) /* V6T2. */
9687 };
9688 const int v6k[] =
9689 {
9690 T(V6K), /* PRE_V4. */
9691 T(V6K), /* V4. */
9692 T(V6K), /* V4T. */
9693 T(V6K), /* V5T. */
9694 T(V6K), /* V5TE. */
9695 T(V6K), /* V5TEJ. */
9696 T(V6K), /* V6. */
9697 T(V6KZ), /* V6KZ. */
9698 T(V7), /* V6T2. */
9699 T(V6K) /* V6K. */
9700 };
9701 const int v7[] =
9702 {
9703 T(V7), /* PRE_V4. */
9704 T(V7), /* V4. */
9705 T(V7), /* V4T. */
9706 T(V7), /* V5T. */
9707 T(V7), /* V5TE. */
9708 T(V7), /* V5TEJ. */
9709 T(V7), /* V6. */
9710 T(V7), /* V6KZ. */
9711 T(V7), /* V6T2. */
9712 T(V7), /* V6K. */
9713 T(V7) /* V7. */
9714 };
9715 const int v6_m[] =
9716 {
9717 -1, /* PRE_V4. */
9718 -1, /* V4. */
9719 T(V6K), /* V4T. */
9720 T(V6K), /* V5T. */
9721 T(V6K), /* V5TE. */
9722 T(V6K), /* V5TEJ. */
9723 T(V6K), /* V6. */
9724 T(V6KZ), /* V6KZ. */
9725 T(V7), /* V6T2. */
9726 T(V6K), /* V6K. */
9727 T(V7), /* V7. */
9728 T(V6_M) /* V6_M. */
9729 };
9730 const int v6s_m[] =
9731 {
9732 -1, /* PRE_V4. */
9733 -1, /* V4. */
9734 T(V6K), /* V4T. */
9735 T(V6K), /* V5T. */
9736 T(V6K), /* V5TE. */
9737 T(V6K), /* V5TEJ. */
9738 T(V6K), /* V6. */
9739 T(V6KZ), /* V6KZ. */
9740 T(V7), /* V6T2. */
9741 T(V6K), /* V6K. */
9742 T(V7), /* V7. */
9743 T(V6S_M), /* V6_M. */
9744 T(V6S_M) /* V6S_M. */
9745 };
9e3c6df6
PB		 9746 const int v7e_m[] =
9747 {
9748 -1, /* PRE_V4. */
9749 -1, /* V4. */
9750 T(V7E_M), /* V4T. */
9751 T(V7E_M), /* V5T. */
9752 T(V7E_M), /* V5TE. */
9753 T(V7E_M), /* V5TEJ. */
9754 T(V7E_M), /* V6. */
9755 T(V7E_M), /* V6KZ. */
9756 T(V7E_M), /* V6T2. */
9757 T(V7E_M), /* V6K. */
9758 T(V7E_M), /* V7. */
9759 T(V7E_M), /* V6_M. */
9760 T(V7E_M), /* V6S_M. */
9761 T(V7E_M) /* V7E_M. */
9762 };
91e22acd
AS		 9763 const int v4t_plus_v6_m[] =
9764 {
9765 -1, /* PRE_V4. */
9766 -1, /* V4. */
9767 T(V4T), /* V4T. */
9768 T(V5T), /* V5T. */
9769 T(V5TE), /* V5TE. */
9770 T(V5TEJ), /* V5TEJ. */
9771 T(V6), /* V6. */
9772 T(V6KZ), /* V6KZ. */
9773 T(V6T2), /* V6T2. */
9774 T(V6K), /* V6K. */
9775 T(V7), /* V7. */
9776 T(V6_M), /* V6_M. */
9777 T(V6S_M), /* V6S_M. */
9e3c6df6 9778 T(V7E_M), /* V7E_M. */
91e22acd
AS		 9779 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9780 };
9781 const int *comb[] =
9782 {
9783 v6t2,
9784 v6k,
9785 v7,
9786 v6_m,
9787 v6s_m,
9e3c6df6 9788 v7e_m,
91e22acd
AS		 9789 /* Pseudo-architecture. */
9790 v4t_plus_v6_m
9791 };
9792
9793 /* Check we've not got a higher architecture than we know about. */
9794
9e3c6df6 9795 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 9796 {
3895f852 9797 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9798 return -1;
9799 }
9800
9801 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9802
9803 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9804 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9805 oldtag = T(V4T_PLUS_V6_M);
9806
9807 /* And override the new tag if we have a Tag_also_compatible_with on the
9808 input. */
9809
9810 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9811 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9812 newtag = T(V4T_PLUS_V6_M);
9813
9814 tagl = (oldtag < newtag) ? oldtag : newtag;
9815 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9816
9817 /* Architectures before V6KZ add features monotonically. */
9818 if (tagh <= TAG_CPU_ARCH_V6KZ)
9819 return result;
9820
9821 result = comb[tagh - T(V6T2)][tagl];
9822
9823 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9824 as the canonical version. */
9825 if (result == T(V4T_PLUS_V6_M))
9826 {
9827 result = T(V4T);
9828 *secondary_compat_out = T(V6_M);
9829 }
9830 else
9831 *secondary_compat_out = -1;
9832
9833 if (result == -1)
9834 {
3895f852 9835 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9836 ibfd, oldtag, newtag);
9837 return -1;
9838 }
9839
9840 return result;
9841#undef T
8e79c3df
CM		 9842}
9843
ee065d83
PB		 9844/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9845 are conflicting attributes. */
906e58ca 9846
ee065d83
PB		 9847static bfd_boolean
9848elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9849{
104d59d1
JM		 9850 obj_attribute *in_attr;
9851 obj_attribute *out_attr;
9852 obj_attribute_list *in_list;
8e79c3df 9853 obj_attribute_list *out_list;
91e22acd 9854 obj_attribute_list **out_listp;
ee065d83
PB		 9855 /* Some tags have 0 = don't care, 1 = strong requirement,
9856 2 = weak requirement. */
91e22acd 9857 static const int order_021[3] = {0, 2, 1};
ee065d83 9858 int i;
91e22acd 9859 bfd_boolean result = TRUE;
ee065d83 9860
3e6b1042
DJ		 9861 /* Skip the linker stubs file. This preserves previous behavior
9862 of accepting unknown attributes in the first input file - but
9863 is that a bug? */
9864 if (ibfd->flags & BFD_LINKER_CREATED)
9865 return TRUE;
9866
104d59d1 9867 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9868 {
9869 /* This is the first object. Copy the attributes. */
104d59d1 9870 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 9871
cd21e546
MGD		 9872 out_attr = elf_known_obj_attributes_proc (obfd);
9873
004ae526
PB		 9874 /* Use the Tag_null value to indicate the attributes have been
9875 initialized. */
cd21e546 9876 out_attr[0].i = 1;
004ae526 9877
cd21e546
MGD		 9878 /* We do not output objects with Tag_MPextension_use_legacy - we move
9879 the attribute's value to Tag_MPextension_use. */
9880 if (out_attr[Tag_MPextension_use_legacy].i != 0)
9881 {
9882 if (out_attr[Tag_MPextension_use].i != 0
9883 && out_attr[Tag_MPextension_use_legacy].i
9884 != out_attr[Tag_MPextension_use].i)
9885 {
9886 _bfd_error_handler
9887 (_("Error: %B has both the current and legacy "
9888 "Tag_MPextension_use attributes"), ibfd);
9889 result = FALSE;
9890 }
9891
9892 out_attr[Tag_MPextension_use] =
9893 out_attr[Tag_MPextension_use_legacy];
9894 out_attr[Tag_MPextension_use_legacy].type = 0;
9895 out_attr[Tag_MPextension_use_legacy].i = 0;
9896 }
9897
9898 return result;
ee065d83
PB		 9899 }
9900
104d59d1
JM		 9901 in_attr = elf_known_obj_attributes_proc (ibfd);
9902 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9903 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9904 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9905 {
8e79c3df 9906 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9907 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9908 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9909 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9910 {
9911 _bfd_error_handler
3895f852 9912 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 9913 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
9914 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 9915 result = FALSE;
ee065d83
PB		 9916 }
9917 }
9918
104d59d1 9919 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9920 {
9921 /* Merge this attribute with existing attributes. */
9922 switch (i)
9923 {
9924 case Tag_CPU_raw_name:
9925 case Tag_CPU_name:
91e22acd 9926 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9927 break;
9928
9929 case Tag_ABI_optimization_goals:
9930 case Tag_ABI_FP_optimization_goals:
9931 /* Use the first value seen. */
9932 break;
9933
9934 case Tag_CPU_arch:
91e22acd
AS		 9935 {
9936 int secondary_compat = -1, secondary_compat_out = -1;
9937 unsigned int saved_out_attr = out_attr[i].i;
9938 static const char *name_table[] = {
9939 /* These aren't real CPU names, but we can't guess
9940 that from the architecture version alone. */
9941 "Pre v4",
9942 "ARM v4",
9943 "ARM v4T",
9944 "ARM v5T",
9945 "ARM v5TE",
9946 "ARM v5TEJ",
9947 "ARM v6",
9948 "ARM v6KZ",
9949 "ARM v6T2",
9950 "ARM v6K",
9951 "ARM v7",
9952 "ARM v6-M",
9953 "ARM v6S-M"
9954 };
9955
9956 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9957 secondary_compat = get_secondary_compatible_arch (ibfd);
9958 secondary_compat_out = get_secondary_compatible_arch (obfd);
9959 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9960 &secondary_compat_out,
9961 in_attr[i].i,
9962 secondary_compat);
9963 set_secondary_compatible_arch (obfd, secondary_compat_out);
9964
9965 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9966 if (out_attr[i].i == saved_out_attr)
9967 ; /* Leave the names alone. */
9968 else if (out_attr[i].i == in_attr[i].i)
9969 {
9970 /* The output architecture has been changed to match the
9971 input architecture. Use the input names. */
9972 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9973 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9974 : NULL;
9975 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9976 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9977 : NULL;
9978 }
9979 else
9980 {
9981 out_attr[Tag_CPU_name].s = NULL;
9982 out_attr[Tag_CPU_raw_name].s = NULL;
9983 }
9984
9985 /* If we still don't have a value for Tag_CPU_name,
9986 make one up now. Tag_CPU_raw_name remains blank. */
9987 if (out_attr[Tag_CPU_name].s == NULL
9988 && out_attr[i].i < ARRAY_SIZE (name_table))
9989 out_attr[Tag_CPU_name].s =
9990 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9991 }
9992 break;
9993
ee065d83
PB		 9994 case Tag_ARM_ISA_use:
9995 case Tag_THUMB_ISA_use:
ee065d83 9996 case Tag_WMMX_arch:
91e22acd
AS		 9997 case Tag_Advanced_SIMD_arch:
9998 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9999 case Tag_ABI_FP_rounding:
ee065d83
PB		 10000 case Tag_ABI_FP_exceptions:
10001 case Tag_ABI_FP_user_exceptions:
10002 case Tag_ABI_FP_number_model:
91e22acd
AS		 10003 case Tag_VFP_HP_extension:
10004 case Tag_CPU_unaligned_access:
10005 case Tag_T2EE_use:
10006 case Tag_Virtualization_use:
10007 case Tag_MPextension_use:
ee065d83
PB		 10008 /* Use the largest value specified. */
10009 if (in_attr[i].i > out_attr[i].i)
10010 out_attr[i].i = in_attr[i].i;
10011 break;
10012
91e22acd
AS		 10013 case Tag_ABI_align8_preserved:
10014 case Tag_ABI_PCS_RO_data:
10015 /* Use the smallest value specified. */
10016 if (in_attr[i].i < out_attr[i].i)
10017 out_attr[i].i = in_attr[i].i;
10018 break;
10019
10020 case Tag_ABI_align8_needed:
10021 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
10022 && (in_attr[Tag_ABI_align8_preserved].i == 0
10023 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 10024 {
91e22acd
AS		 10025 /* This error message should be enabled once all non-conformant
10026 binaries in the toolchain have had the attributes set
10027 properly.
ee065d83 10028 _bfd_error_handler
3895f852 10029 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10030 obfd, ibfd);
10031 result = FALSE; */
ee065d83 10032 }
91e22acd
AS		 10033 /* Fall through. */
10034 case Tag_ABI_FP_denormal:
10035 case Tag_ABI_PCS_GOT_use:
10036 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10037 value if greater than 2 (for future-proofing). */
10038 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10039 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10040 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10041 out_attr[i].i = in_attr[i].i;
10042 break;
91e22acd
AS		 10043
10044
10045 case Tag_CPU_arch_profile:
10046 if (out_attr[i].i != in_attr[i].i)
10047 {
10048 /* 0 will merge with anything.
10049 'A' and 'S' merge to 'A'.
10050 'R' and 'S' merge to 'R'.
10051 'M' and 'A|R|S' is an error. */
10052 if (out_attr[i].i == 0
10053 || (out_attr[i].i == 'S'
10054 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10055 out_attr[i].i = in_attr[i].i;
10056 else if (in_attr[i].i == 0
10057 || (in_attr[i].i == 'S'
10058 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10059 ; /* Do nothing. */
10060 else
10061 {
10062 _bfd_error_handler
3895f852 10063 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10064 ibfd,
10065 in_attr[i].i ? in_attr[i].i : '0',
10066 out_attr[i].i ? out_attr[i].i : '0');
10067 result = FALSE;
10068 }
10069 }
10070 break;
b1cc4aeb 10071 case Tag_VFP_arch:
62f3b8c8
PB		 10072 {
10073 static const struct
10074 {
10075 int ver;
10076 int regs;
10077 } vfp_versions[7] =
10078 {
10079 {0, 0},
10080 {1, 16},
10081 {2, 16},
10082 {3, 32},
10083 {3, 16},
10084 {4, 32},
10085 {4, 16}
10086 };
10087 int ver;
10088 int regs;
10089 int newval;
10090
10091 /* Values greater than 6 aren't defined, so just pick the
10092 biggest */
10093 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10094 {
10095 out_attr[i] = in_attr[i];
10096 break;
10097 }
10098 /* The output uses the superset of input features
10099 (ISA version) and registers. */
10100 ver = vfp_versions[in_attr[i].i].ver;
10101 if (ver < vfp_versions[out_attr[i].i].ver)
10102 ver = vfp_versions[out_attr[i].i].ver;
10103 regs = vfp_versions[in_attr[i].i].regs;
10104 if (regs < vfp_versions[out_attr[i].i].regs)
10105 regs = vfp_versions[out_attr[i].i].regs;
10106 /* This assumes all possible supersets are also a valid
10107 options. */
10108 for (newval = 6; newval > 0; newval--)
10109 {
10110 if (regs == vfp_versions[newval].regs
10111 && ver == vfp_versions[newval].ver)
10112 break;
10113 }
10114 out_attr[i].i = newval;
10115 }
b1cc4aeb 10116 break;
ee065d83
PB		 10117 case Tag_PCS_config:
10118 if (out_attr[i].i == 0)
10119 out_attr[i].i = in_attr[i].i;
10120 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10121 {
10122 /* It's sometimes ok to mix different configs, so this is only
10123 a warning. */
10124 _bfd_error_handler
10125 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10126 }
10127 break;
10128 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10129 if (in_attr[i].i != out_attr[i].i
10130 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10131 && in_attr[i].i != AEABI_R9_unused)
10132 {
10133 _bfd_error_handler
3895f852 10134 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10135 result = FALSE;
ee065d83
PB		 10136 }
10137 if (out_attr[i].i == AEABI_R9_unused)
10138 out_attr[i].i = in_attr[i].i;
10139 break;
10140 case Tag_ABI_PCS_RW_data:
10141 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10142 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10143 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10144 {
10145 _bfd_error_handler
3895f852 10146 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10147 ibfd);
91e22acd 10148 result = FALSE;
ee065d83
PB		 10149 }
10150 /* Use the smallest value specified. */
10151 if (in_attr[i].i < out_attr[i].i)
10152 out_attr[i].i = in_attr[i].i;
10153 break;
ee065d83 10154 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10155 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10156 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10157 {
10158 _bfd_error_handler
a9dc9481
JM		 10159 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10160 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10161 }
a9dc9481 10162 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10163 out_attr[i].i = in_attr[i].i;
10164 break;
ee065d83
PB		 10165 case Tag_ABI_enum_size:
10166 if (in_attr[i].i != AEABI_enum_unused)
10167 {
10168 if (out_attr[i].i == AEABI_enum_unused
10169 || out_attr[i].i == AEABI_enum_forced_wide)
10170 {
10171 /* The existing object is compatible with anything.
10172 Use whatever requirements the new object has. */
10173 out_attr[i].i = in_attr[i].i;
10174 }
10175 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10176 && out_attr[i].i != in_attr[i].i
0ffa91dd 10177 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10178 {
91e22acd 10179 static const char *aeabi_enum_names[] =
bf21ed78 10180 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10181 const char *in_name =
10182 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10183 ? aeabi_enum_names[in_attr[i].i]
10184 : "<unknown>";
10185 const char *out_name =
10186 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10187 ? aeabi_enum_names[out_attr[i].i]
10188 : "<unknown>";
ee065d83 10189 _bfd_error_handler
bf21ed78 10190 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10191 ibfd, in_name, out_name);
ee065d83
PB		 10192 }
10193 }
10194 break;
10195 case Tag_ABI_VFP_args:
10196 /* Aready done. */
10197 break;
10198 case Tag_ABI_WMMX_args:
10199 if (in_attr[i].i != out_attr[i].i)
10200 {
10201 _bfd_error_handler
3895f852 10202 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10203 ibfd, obfd);
91e22acd 10204 result = FALSE;
ee065d83
PB		 10205 }
10206 break;
7b86a9fa
AS		 10207 case Tag_compatibility:
10208 /* Merged in target-independent code. */
10209 break;
91e22acd
AS		 10210 case Tag_ABI_HardFP_use:
10211 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
10212 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
10213 || (in_attr[i].i == 2 && out_attr[i].i == 1))
10214 out_attr[i].i = 3;
10215 else if (in_attr[i].i > out_attr[i].i)
10216 out_attr[i].i = in_attr[i].i;
10217 break;
10218 case Tag_ABI_FP_16bit_format:
10219 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10220 {
10221 if (in_attr[i].i != out_attr[i].i)
10222 {
10223 _bfd_error_handler
3895f852 10224 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10225 ibfd, obfd);
10226 result = FALSE;
10227 }
10228 }
10229 if (in_attr[i].i != 0)
10230 out_attr[i].i = in_attr[i].i;
10231 break;
7b86a9fa 10232
cd21e546
MGD		 10233 case Tag_DIV_use:
10234 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10235 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10236 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10237 CPU. We will merge as follows: If the input attribute's value
10238 is one then the output attribute's value remains unchanged. If
10239 the input attribute's value is zero or two then if the output
10240 attribute's value is one the output value is set to the input
10241 value, otherwise the output value must be the same as the
10242 inputs. */
10243 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10244 {
10245 if (in_attr[i].i != out_attr[i].i)
10246 {
10247 _bfd_error_handler
10248 (_("DIV usage mismatch between %B and %B"),
10249 ibfd, obfd);
10250 result = FALSE;
10251 }
10252 }
10253
10254 if (in_attr[i].i != 1)
10255 out_attr[i].i = in_attr[i].i;
10256
10257 break;
10258
10259 case Tag_MPextension_use_legacy:
10260 /* We don't output objects with Tag_MPextension_use_legacy - we
10261 move the value to Tag_MPextension_use. */
10262 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10263 {
10264 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10265 {
10266 _bfd_error_handler
10267 (_("%B has has both the current and legacy "
10268 "Tag_MPextension_use attributes"),
10269 ibfd);
10270 result = FALSE;
10271 }
10272 }
10273
10274 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10275 out_attr[Tag_MPextension_use] = in_attr[i];
10276
10277 break;
10278
91e22acd 10279 case Tag_nodefaults:
2d0bb761
AS		 10280 /* This tag is set if it exists, but the value is unused (and is
10281 typically zero). We don't actually need to do anything here -
10282 the merge happens automatically when the type flags are merged
10283 below. */
91e22acd
AS		 10284 break;
10285 case Tag_also_compatible_with:
10286 /* Already done in Tag_CPU_arch. */
10287 break;
10288 case Tag_conformance:
10289 /* Keep the attribute if it matches. Throw it away otherwise.
10290 No attribute means no claim to conform. */
10291 if (!in_attr[i].s || !out_attr[i].s
10292 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10293 out_attr[i].s = NULL;
10294 break;
3cfad14c 10295
91e22acd 10296 default:
3cfad14c 10297 {
91e22acd
AS		 10298 bfd *err_bfd = NULL;
10299
10300 /* The "known_obj_attributes" table does contain some undefined
10301 attributes. Ensure that there are unused. */
10302 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10303 err_bfd = obfd;
10304 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10305 err_bfd = ibfd;
10306
10307 if (err_bfd != NULL)
10308 {
10309 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10310 if ((i & 127) < 64)
10311 {
10312 _bfd_error_handler
10313 (_("%B: Unknown mandatory EABI object attribute %d"),
10314 err_bfd, i);
10315 bfd_set_error (bfd_error_bad_value);
10316 result = FALSE;
10317 }
10318 else
10319 {
10320 _bfd_error_handler
10321 (_("Warning: %B: Unknown EABI object attribute %d"),
10322 err_bfd, i);
10323 }
10324 }
10325
10326 /* Only pass on attributes that match in both inputs. */
10327 if (in_attr[i].i != out_attr[i].i
10328 || in_attr[i].s != out_attr[i].s
10329 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10330 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10331 {
10332 out_attr[i].i = 0;
10333 out_attr[i].s = NULL;
10334 }
3cfad14c 10335 }
91e22acd
AS		 10336 }
10337
10338 /* If out_attr was copied from in_attr then it won't have a type yet. */
10339 if (in_attr[i].type && !out_attr[i].type)
10340 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10341 }
10342
104d59d1 10343 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 10344 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10345 return FALSE;
ee065d83 10346
104d59d1
JM		 10347 /* Check for any attributes not known on ARM. */
10348 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10349 out_listp = &elf_other_obj_attributes_proc (obfd);
10350 out_list = *out_listp;
8e79c3df 10351
91e22acd 10352 for (; in_list || out_list; )
ee065d83 10353 {
91e22acd
AS		 10354 bfd *err_bfd = NULL;
10355 int err_tag = 0;
8e79c3df
CM		 10356
10357 /* The tags for each list are in numerical order. */
10358 /* If the tags are equal, then merge. */
91e22acd 10359 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10360 {
91e22acd
AS		 10361 /* This attribute only exists in obfd. We can't merge, and we don't
10362 know what the tag means, so delete it. */
10363 err_bfd = obfd;
10364 err_tag = out_list->tag;
10365 *out_listp = out_list->next;
10366 out_list = *out_listp;
8e79c3df 10367 }
91e22acd 10368 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10369 {
91e22acd
AS		 10370 /* This attribute only exists in ibfd. We can't merge, and we don't
10371 know what the tag means, so ignore it. */
10372 err_bfd = ibfd;
10373 err_tag = in_list->tag;
8e79c3df 10374 in_list = in_list->next;
eb111b1f 10375 }
91e22acd
AS		 10376 else /* The tags are equal. */
10377 {
10378 /* As present, all attributes in the list are unknown, and
10379 therefore can't be merged meaningfully. */
10380 err_bfd = obfd;
10381 err_tag = out_list->tag;
10382
10383 /* Only pass on attributes that match in both inputs. */
10384 if (in_list->attr.i != out_list->attr.i
10385 || in_list->attr.s != out_list->attr.s
10386 || (in_list->attr.s && out_list->attr.s
10387 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10388 {
10389 /* No match. Delete the attribute. */
10390 *out_listp = out_list->next;
10391 out_list = *out_listp;
10392 }
10393 else
10394 {
10395 /* Matched. Keep the attribute and move to the next. */
10396 out_list = out_list->next;
10397 in_list = in_list->next;
10398 }
10399 }
10400
10401 if (err_bfd)
10402 {
10403 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10404 if ((err_tag & 127) < 64)
10405 {
10406 _bfd_error_handler
10407 (_("%B: Unknown mandatory EABI object attribute %d"),
10408 err_bfd, err_tag);
10409 bfd_set_error (bfd_error_bad_value);
10410 result = FALSE;
10411 }
10412 else
10413 {
10414 _bfd_error_handler
10415 (_("Warning: %B: Unknown EABI object attribute %d"),
10416 err_bfd, err_tag);
10417 }
10418 }
ee065d83 10419 }
91e22acd 10420 return result;
252b5132
RH		 10421}
10422
3a4a14e9
PB		 10423
10424/* Return TRUE if the two EABI versions are incompatible. */
10425
10426static bfd_boolean
10427elf32_arm_versions_compatible (unsigned iver, unsigned over)
10428{
10429 /* v4 and v5 are the same spec before and after it was released,
10430 so allow mixing them. */
10431 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10432 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10433 return TRUE;
10434
10435 return (iver == over);
10436}
10437
252b5132
RH		 10438/* Merge backend specific data from an object file to the output
10439 object file when linking. */
9b485d32 10440
b34976b6 10441static bfd_boolean
21d799b5 10442elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10443
9b485d32
NC		 10444/* Display the flags field. */
10445
b34976b6 10446static bfd_boolean
57e8b36a 10447elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10448{
fc830a83
NC		 10449 FILE * file = (FILE *) ptr;
10450 unsigned long flags;
252b5132
RH		 10451
10452 BFD_ASSERT (abfd != NULL && ptr != NULL);
10453
10454 /* Print normal ELF private data. */
10455 _bfd_elf_print_private_bfd_data (abfd, ptr);
10456
fc830a83 10457 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10458 /* Ignore init flag - it may not be set, despite the flags field
10459 containing valid data. */
252b5132
RH		 10460
10461 /* xgettext:c-format */
9b485d32 10462 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10463
fc830a83
NC		 10464 switch (EF_ARM_EABI_VERSION (flags))
10465 {
10466 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10467 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10468 official ARM ELF extended ABI. Hence they are only decoded if
10469 the EABI version is not set. */
fd2ec330 10470 if (flags & EF_ARM_INTERWORK)
9b485d32 10471 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10472
fd2ec330 10473 if (flags & EF_ARM_APCS_26)
6c571f00 10474 fprintf (file, " [APCS-26]");
fc830a83 10475 else
6c571f00 10476 fprintf (file, " [APCS-32]");
9a5aca8c 10477
96a846ea
RE		 10478 if (flags & EF_ARM_VFP_FLOAT)
10479 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10480 else if (flags & EF_ARM_MAVERICK_FLOAT)
10481 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10482 else
10483 fprintf (file, _(" [FPA float format]"));
10484
fd2ec330 10485 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10486 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10487
fd2ec330 10488 if (flags & EF_ARM_PIC)
9b485d32 10489 fprintf (file, _(" [position independent]"));
fc830a83 10490
fd2ec330 10491 if (flags & EF_ARM_NEW_ABI)
9b485d32 10492 fprintf (file, _(" [new ABI]"));
9a5aca8c 10493
fd2ec330 10494 if (flags & EF_ARM_OLD_ABI)
9b485d32 10495 fprintf (file, _(" [old ABI]"));
9a5aca8c 10496
fd2ec330 10497 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10498 fprintf (file, _(" [software FP]"));
9a5aca8c 10499
96a846ea
RE		 10500 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10501 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10502 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10503 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10504 break;
9a5aca8c 10505
fc830a83 10506 case EF_ARM_EABI_VER1:
9b485d32 10507 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10508
fc830a83 10509 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10510 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10511 else
9b485d32 10512 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10513
fc830a83
NC		 10514 flags &= ~ EF_ARM_SYMSARESORTED;
10515 break;
9a5aca8c 10516
fd2ec330
PB		 10517 case EF_ARM_EABI_VER2:
10518 fprintf (file, _(" [Version2 EABI]"));
10519
10520 if (flags & EF_ARM_SYMSARESORTED)
10521 fprintf (file, _(" [sorted symbol table]"));
10522 else
10523 fprintf (file, _(" [unsorted symbol table]"));
10524
10525 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10526 fprintf (file, _(" [dynamic symbols use segment index]"));
10527
10528 if (flags & EF_ARM_MAPSYMSFIRST)
10529 fprintf (file, _(" [mapping symbols precede others]"));
10530
99e4ae17 10531 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10532 | EF_ARM_MAPSYMSFIRST);
10533 break;
10534
d507cf36
PB		 10535 case EF_ARM_EABI_VER3:
10536 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10537 break;
10538
10539 case EF_ARM_EABI_VER4:
10540 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10541 goto eabi;
d507cf36 10542
3a4a14e9
PB		 10543 case EF_ARM_EABI_VER5:
10544 fprintf (file, _(" [Version5 EABI]"));
10545 eabi:
d507cf36
PB		 10546 if (flags & EF_ARM_BE8)
10547 fprintf (file, _(" [BE8]"));
10548
10549 if (flags & EF_ARM_LE8)
10550 fprintf (file, _(" [LE8]"));
10551
10552 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10553 break;
10554
fc830a83 10555 default:
9b485d32 10556 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10557 break;
10558 }
252b5132 10559
fc830a83 10560 flags &= ~ EF_ARM_EABIMASK;
252b5132 10561
fc830a83 10562 if (flags & EF_ARM_RELEXEC)
9b485d32 10563 fprintf (file, _(" [relocatable executable]"));
252b5132 10564
fc830a83 10565 if (flags & EF_ARM_HASENTRY)
9b485d32 10566 fprintf (file, _(" [has entry point]"));
252b5132 10567
fc830a83
NC		 10568 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10569
10570 if (flags)
9b485d32 10571 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10572
252b5132
RH		 10573 fputc ('\n', file);
10574
b34976b6 10575 return TRUE;
252b5132
RH		 10576}
10577
10578static int
57e8b36a 10579elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10580{
2f0ca46a
NC		 10581 switch (ELF_ST_TYPE (elf_sym->st_info))
10582 {
10583 case STT_ARM_TFUNC:
10584 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10585
2f0ca46a
NC		 10586 case STT_ARM_16BIT:
10587 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10588 This allows us to distinguish between data used by Thumb instructions
10589 and non-data (which is probably code) inside Thumb regions of an
10590 executable. */
1a0eb693 10591 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10592 return ELF_ST_TYPE (elf_sym->st_info);
10593 break;
9a5aca8c 10594
ce855c42
NC		 10595 default:
10596 break;
2f0ca46a
NC		 10597 }
10598
10599 return type;
252b5132 10600}
f21f3fe0 10601
252b5132 10602static asection *
07adf181
AM		 10603elf32_arm_gc_mark_hook (asection *sec,
10604 struct bfd_link_info *info,
10605 Elf_Internal_Rela *rel,
10606 struct elf_link_hash_entry *h,
10607 Elf_Internal_Sym *sym)
252b5132
RH		 10608{
10609 if (h != NULL)
07adf181 10610 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10611 {
10612 case R_ARM_GNU_VTINHERIT:
10613 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10614 return NULL;
10615 }
9ad5cbcf 10616
07adf181 10617 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10618}
10619
780a67af
NC		 10620/* Update the got entry reference counts for the section being removed. */
10621
b34976b6 10622static bfd_boolean
ba93b8ac
DJ		 10623elf32_arm_gc_sweep_hook (bfd * abfd,
10624 struct bfd_link_info * info,
10625 asection * sec,
10626 const Elf_Internal_Rela * relocs)
252b5132 10627{
5e681ec4
PB		 10628 Elf_Internal_Shdr *symtab_hdr;
10629 struct elf_link_hash_entry **sym_hashes;
10630 bfd_signed_vma *local_got_refcounts;
10631 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10632 struct elf32_arm_link_hash_table * globals;
10633
7dda2462
TG		 10634 if (info->relocatable)
10635 return TRUE;
10636
eb043451 10637 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10638 if (globals == NULL)
10639 return FALSE;
5e681ec4
PB		 10640
10641 elf_section_data (sec)->local_dynrel = NULL;
10642
0ffa91dd 10643 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10644 sym_hashes = elf_sym_hashes (abfd);
10645 local_got_refcounts = elf_local_got_refcounts (abfd);
10646
906e58ca 10647 check_use_blx (globals);
bd97cb95 10648
5e681ec4
PB		 10649 relend = relocs + sec->reloc_count;
10650 for (rel = relocs; rel < relend; rel++)
eb043451 10651 {
3eb128b2
AM		 10652 unsigned long r_symndx;
10653 struct elf_link_hash_entry *h = NULL;
eb043451 10654 int r_type;
5e681ec4 10655
3eb128b2
AM		 10656 r_symndx = ELF32_R_SYM (rel->r_info);
10657 if (r_symndx >= symtab_hdr->sh_info)
10658 {
10659 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10660 while (h->root.type == bfd_link_hash_indirect
10661 || h->root.type == bfd_link_hash_warning)
10662 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10663 }
10664
eb043451 10665 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10666 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10667 switch (r_type)
10668 {
10669 case R_ARM_GOT32:
eb043451 10670 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10671 case R_ARM_TLS_GD32:
10672 case R_ARM_TLS_IE32:
3eb128b2 10673 if (h != NULL)
eb043451 10674 {
eb043451
PB		 10675 if (h->got.refcount > 0)
10676 h->got.refcount -= 1;
10677 }
10678 else if (local_got_refcounts != NULL)
10679 {
10680 if (local_got_refcounts[r_symndx] > 0)
10681 local_got_refcounts[r_symndx] -= 1;
10682 }
10683 break;
10684
ba93b8ac 10685 case R_ARM_TLS_LDM32:
4dfe6ac6 10686 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 10687 break;
10688
eb043451 10689 case R_ARM_ABS32:
bb224fc3 10690 case R_ARM_ABS32_NOI:
eb043451 10691 case R_ARM_REL32:
bb224fc3 10692 case R_ARM_REL32_NOI:
eb043451
PB		 10693 case R_ARM_PC24:
10694 case R_ARM_PLT32:
5b5bb741
PB		 10695 case R_ARM_CALL:
10696 case R_ARM_JUMP24:
eb043451 10697 case R_ARM_PREL31:
c19d1205 10698 case R_ARM_THM_CALL:
bd97cb95
DJ		 10699 case R_ARM_THM_JUMP24:
10700 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10701 case R_ARM_MOVW_ABS_NC:
10702 case R_ARM_MOVT_ABS:
10703 case R_ARM_MOVW_PREL_NC:
10704 case R_ARM_MOVT_PREL:
10705 case R_ARM_THM_MOVW_ABS_NC:
10706 case R_ARM_THM_MOVT_ABS:
10707 case R_ARM_THM_MOVW_PREL_NC:
10708 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10709 /* Should the interworking branches be here also? */
10710
3eb128b2 10711 if (h != NULL)
eb043451
PB		 10712 {
10713 struct elf32_arm_link_hash_entry *eh;
10714 struct elf32_arm_relocs_copied **pp;
10715 struct elf32_arm_relocs_copied *p;
5e681ec4 10716
b7693d02 10717 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10718
eb043451 10719 if (h->plt.refcount > 0)
b7693d02
DJ		 10720 {
10721 h->plt.refcount -= 1;
bd97cb95
DJ		 10722 if (r_type == R_ARM_THM_CALL)
10723 eh->plt_maybe_thumb_refcount--;
10724
10725 if (r_type == R_ARM_THM_JUMP24
10726 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10727 eh->plt_thumb_refcount--;
10728 }
5e681ec4 10729
eb043451 10730 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10731 || r_type == R_ARM_REL32
10732 || r_type == R_ARM_ABS32_NOI
10733 || r_type == R_ARM_REL32_NOI)
eb043451 10734 {
eb043451
PB		 10735 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10736 pp = &p->next)
10737 if (p->section == sec)
10738 {
10739 p->count -= 1;
bb224fc3
MS		 10740 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10741 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10742 p->pc_count -= 1;
eb043451
PB		 10743 if (p->count == 0)
10744 *pp = p->next;
10745 break;
10746 }
10747 }
10748 }
10749 break;
5e681ec4 10750
eb043451
PB		 10751 default:
10752 break;
10753 }
10754 }
5e681ec4 10755
b34976b6 10756 return TRUE;
252b5132
RH		 10757}
10758
780a67af
NC		 10759/* Look through the relocs for a section during the first phase. */
10760
b34976b6 10761static bfd_boolean
57e8b36a
NC		 10762elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10763 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10764{
b34976b6
AM		 10765 Elf_Internal_Shdr *symtab_hdr;
10766 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10767 const Elf_Internal_Rela *rel;
10768 const Elf_Internal_Rela *rel_end;
10769 bfd *dynobj;
5e681ec4 10770 asection *sreloc;
b34976b6 10771 bfd_vma *local_got_offsets;
5e681ec4 10772 struct elf32_arm_link_hash_table *htab;
39623e12 10773 bfd_boolean needs_plt;
ce98a316 10774 unsigned long nsyms;
9a5aca8c 10775
1049f94e 10776 if (info->relocatable)
b34976b6 10777 return TRUE;
9a5aca8c 10778
0ffa91dd
NC		 10779 BFD_ASSERT (is_arm_elf (abfd));
10780
5e681ec4 10781 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10782 if (htab == NULL)
10783 return FALSE;
10784
5e681ec4 10785 sreloc = NULL;
9a5aca8c 10786
67687978
PB		 10787 /* Create dynamic sections for relocatable executables so that we can
10788 copy relocations. */
10789 if (htab->root.is_relocatable_executable
10790 && ! htab->root.dynamic_sections_created)
10791 {
10792 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10793 return FALSE;
10794 }
10795
252b5132
RH		 10796 dynobj = elf_hash_table (info)->dynobj;
10797 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10798
0ffa91dd 10799 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10800 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10801 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10802
252b5132
RH		 10803 rel_end = relocs + sec->reloc_count;
10804 for (rel = relocs; rel < rel_end; rel++)
10805 {
10806 struct elf_link_hash_entry *h;
b7693d02 10807 struct elf32_arm_link_hash_entry *eh;
252b5132 10808 unsigned long r_symndx;
eb043451 10809 int r_type;
9a5aca8c 10810
252b5132 10811 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10812 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10813 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10814
ce98a316
NC		 10815 if (r_symndx >= nsyms
10816 /* PR 9934: It is possible to have relocations that do not
10817 refer to symbols, thus it is also possible to have an
10818 object file containing relocations but no symbol table. */
10819 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10820 {
10821 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10822 r_symndx);
ba93b8ac
DJ		 10823 return FALSE;
10824 }
10825
ce98a316 10826 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10827 h = NULL;
10828 else
973a3492
L		 10829 {
10830 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10831 while (h->root.type == bfd_link_hash_indirect
10832 || h->root.type == bfd_link_hash_warning)
10833 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10834 }
9a5aca8c 10835
b7693d02
DJ		 10836 eh = (struct elf32_arm_link_hash_entry *) h;
10837
eb043451 10838 switch (r_type)
252b5132 10839 {
5e681ec4 10840 case R_ARM_GOT32:
eb043451 10841 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10842 case R_ARM_TLS_GD32:
10843 case R_ARM_TLS_IE32:
5e681ec4 10844 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10845 {
10846 int tls_type, old_tls_type;
5e681ec4 10847
ba93b8ac
DJ		 10848 switch (r_type)
10849 {
10850 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10851 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10852 default: tls_type = GOT_NORMAL; break;
10853 }
252b5132 10854
ba93b8ac
DJ		 10855 if (h != NULL)
10856 {
10857 h->got.refcount++;
10858 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10859 }
10860 else
10861 {
10862 bfd_signed_vma *local_got_refcounts;
10863
10864 /* This is a global offset table entry for a local symbol. */
10865 local_got_refcounts = elf_local_got_refcounts (abfd);
10866 if (local_got_refcounts == NULL)
10867 {
10868 bfd_size_type size;
906e58ca 10869
ba93b8ac 10870 size = symtab_hdr->sh_info;
906e58ca 10871 size *= (sizeof (bfd_signed_vma) + sizeof (char));
21d799b5
NC		 10872 local_got_refcounts = (bfd_signed_vma *)
10873 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 10874 if (local_got_refcounts == NULL)
10875 return FALSE;
10876 elf_local_got_refcounts (abfd) = local_got_refcounts;
10877 elf32_arm_local_got_tls_type (abfd)
10878 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10879 }
10880 local_got_refcounts[r_symndx] += 1;
10881 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10882 }
10883
10884 /* We will already have issued an error message if there is a
10885 TLS / non-TLS mismatch, based on the symbol type. We don't
10886 support any linker relaxations. So just combine any TLS
10887 types needed. */
10888 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10889 && tls_type != GOT_NORMAL)
10890 tls_type |= old_tls_type;
10891
10892 if (old_tls_type != tls_type)
10893 {
10894 if (h != NULL)
10895 elf32_arm_hash_entry (h)->tls_type = tls_type;
10896 else
10897 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10898 }
10899 }
8029a119 10900 /* Fall through. */
ba93b8ac
DJ		 10901
10902 case R_ARM_TLS_LDM32:
10903 if (r_type == R_ARM_TLS_LDM32)
10904 htab->tls_ldm_got.refcount++;
8029a119 10905 /* Fall through. */
252b5132 10906
c19d1205 10907 case R_ARM_GOTOFF32:
5e681ec4
PB		 10908 case R_ARM_GOTPC:
10909 if (htab->sgot == NULL)
10910 {
10911 if (htab->root.dynobj == NULL)
10912 htab->root.dynobj = abfd;
10913 if (!create_got_section (htab->root.dynobj, info))
10914 return FALSE;
10915 }
252b5132
RH		 10916 break;
10917
00a97672
RS		 10918 case R_ARM_ABS12:
10919 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10920 ldr __GOTT_INDEX__ offsets. */
10921 if (!htab->vxworks_p)
10922 break;
8029a119 10923 /* Fall through. */
00a97672 10924
252b5132 10925 case R_ARM_PC24:
7359ea65 10926 case R_ARM_PLT32:
5b5bb741
PB		 10927 case R_ARM_CALL:
10928 case R_ARM_JUMP24:
eb043451 10929 case R_ARM_PREL31:
c19d1205 10930 case R_ARM_THM_CALL:
bd97cb95
DJ		 10931 case R_ARM_THM_JUMP24:
10932 case R_ARM_THM_JUMP19:
39623e12
PB		 10933 needs_plt = 1;
10934 goto normal_reloc;
10935
96c23d59
JM		 10936 case R_ARM_MOVW_ABS_NC:
10937 case R_ARM_MOVT_ABS:
10938 case R_ARM_THM_MOVW_ABS_NC:
10939 case R_ARM_THM_MOVT_ABS:
10940 if (info->shared)
10941 {
10942 (*_bfd_error_handler)
10943 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10944 abfd, elf32_arm_howto_table_1[r_type].name,
10945 (h) ? h->root.root.string : "a local symbol");
10946 bfd_set_error (bfd_error_bad_value);
10947 return FALSE;
10948 }
10949
10950 /* Fall through. */
39623e12
PB		 10951 case R_ARM_ABS32:
10952 case R_ARM_ABS32_NOI:
10953 case R_ARM_REL32:
10954 case R_ARM_REL32_NOI:
b6895b4f
PB		 10955 case R_ARM_MOVW_PREL_NC:
10956 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10957 case R_ARM_THM_MOVW_PREL_NC:
10958 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10959 needs_plt = 0;
10960 normal_reloc:
10961
b7693d02 10962 /* Should the interworking branches be listed here? */
7359ea65 10963 if (h != NULL)
5e681ec4
PB		 10964 {
10965 /* If this reloc is in a read-only section, we might
10966 need a copy reloc. We can't check reliably at this
10967 stage whether the section is read-only, as input
10968 sections have not yet been mapped to output sections.
10969 Tentatively set the flag for now, and correct in
10970 adjust_dynamic_symbol. */
7359ea65 10971 if (!info->shared)
f5385ebf 10972 h->non_got_ref = 1;
7359ea65 10973
5e681ec4 10974 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10975 refers to is in a different object. We can't tell for
10976 sure yet, because something later might force the
10977 symbol local. */
39623e12 10978 if (needs_plt)
f5385ebf 10979 h->needs_plt = 1;
4f199be3
DJ		 10980
10981 /* If we create a PLT entry, this relocation will reference
10982 it, even if it's an ABS32 relocation. */
10983 h->plt.refcount += 1;
b7693d02 10984
bd97cb95
DJ		 10985 /* It's too early to use htab->use_blx here, so we have to
10986 record possible blx references separately from
10987 relocs that definitely need a thumb stub. */
10988
c19d1205 10989 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10990 eh->plt_maybe_thumb_refcount += 1;
10991
10992 if (r_type == R_ARM_THM_JUMP24
10993 || r_type == R_ARM_THM_JUMP19)
b7693d02 10994 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10995 }
10996
67687978
PB		 10997 /* If we are creating a shared library or relocatable executable,
10998 and this is a reloc against a global symbol, or a non PC
10999 relative reloc against a local symbol, then we need to copy
11000 the reloc into the shared library. However, if we are linking
11001 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 11002 global symbol which is defined in an object we are
11003 including in the link (i.e., DEF_REGULAR is set). At
11004 this point we have not seen all the input files, so it is
11005 possible that DEF_REGULAR is not set now but will be set
11006 later (it is never cleared). We account for that
11007 possibility below by storing information in the
5e681ec4 11008 relocs_copied field of the hash table entry. */
67687978 11009 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 11010 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 11011 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 11012 || (h != NULL && ! h->needs_plt
11013 && (! info->symbolic || ! h->def_regular))))
252b5132 11014 {
5e681ec4
PB		 11015 struct elf32_arm_relocs_copied *p, **head;
11016
252b5132
RH		 11017 /* When creating a shared object, we must copy these
11018 reloc types into the output file. We create a reloc
11019 section in dynobj and make room for this reloc. */
83bac4b0 11020 if (sreloc == NULL)
252b5132 11021 {
83bac4b0
NC		 11022 sreloc = _bfd_elf_make_dynamic_reloc_section
11023 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 11024
83bac4b0 11025 if (sreloc == NULL)
b34976b6 11026 return FALSE;
252b5132 11027
83bac4b0 11028 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 11029 if (htab->symbian_p)
252b5132 11030 {
83bac4b0 11031 flagword flags;
5e681ec4 11032
83bac4b0 11033 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 11034 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 11035 bfd_set_section_flags (dynobj, sreloc, flags);
11036 }
252b5132
RH		 11037 }
11038
5e681ec4
PB		 11039 /* If this is a global symbol, we count the number of
11040 relocations we need for this symbol. */
11041 if (h != NULL)
252b5132 11042 {
5e681ec4
PB		 11043 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
11044 }
11045 else
11046 {
11047 /* Track dynamic relocs needed for local syms too.
11048 We really need local syms available to do this
11049 easily. Oh well. */
5e681ec4 11050 asection *s;
6edfbbad 11051 void *vpp;
87d72d41 11052 Elf_Internal_Sym *isym;
6edfbbad 11053
87d72d41
AM		 11054 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11055 abfd, r_symndx);
11056 if (isym == NULL)
5e681ec4 11057 return FALSE;
57e8b36a 11058
87d72d41
AM		 11059 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11060 if (s == NULL)
11061 s = sec;
11062
6edfbbad
DJ		 11063 vpp = &elf_section_data (s)->local_dynrel;
11064 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 11065 }
57e8b36a 11066
5e681ec4
PB		 11067 p = *head;
11068 if (p == NULL || p->section != sec)
11069 {
11070 bfd_size_type amt = sizeof *p;
57e8b36a 11071
21d799b5
NC		 11072 p = (struct elf32_arm_relocs_copied *)
11073 bfd_alloc (htab->root.dynobj, amt);
252b5132 11074 if (p == NULL)
5e681ec4
PB		 11075 return FALSE;
11076 p->next = *head;
11077 *head = p;
11078 p->section = sec;
11079 p->count = 0;
ba93b8ac 11080 p->pc_count = 0;
252b5132 11081 }
57e8b36a 11082
bb224fc3 11083 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11084 p->pc_count += 1;
71a976dd 11085 p->count += 1;
252b5132
RH		 11086 }
11087 break;
11088
11089 /* This relocation describes the C++ object vtable hierarchy.
11090 Reconstruct it for later use during GC. */
11091 case R_ARM_GNU_VTINHERIT:
c152c796 11092 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11093 return FALSE;
252b5132 11094 break;
9a5aca8c 11095
252b5132
RH		 11096 /* This relocation describes which C++ vtable entries are actually
11097 used. Record for later use during GC. */
11098 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11099 BFD_ASSERT (h != NULL);
11100 if (h != NULL
11101 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11102 return FALSE;
252b5132
RH		 11103 break;
11104 }
11105 }
f21f3fe0 11106
b34976b6 11107 return TRUE;
252b5132
RH		 11108}
11109
6a5bb875
PB		 11110/* Unwinding tables are not referenced directly. This pass marks them as
11111 required if the corresponding code section is marked. */
11112
11113static bfd_boolean
906e58ca
NC		 11114elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11115 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11116{
11117 bfd *sub;
11118 Elf_Internal_Shdr **elf_shdrp;
11119 bfd_boolean again;
11120
11121 /* Marking EH data may cause additional code sections to be marked,
11122 requiring multiple passes. */
11123 again = TRUE;
11124 while (again)
11125 {
11126 again = FALSE;
11127 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11128 {
11129 asection *o;
11130
0ffa91dd 11131 if (! is_arm_elf (sub))
6a5bb875
PB		 11132 continue;
11133
11134 elf_shdrp = elf_elfsections (sub);
11135 for (o = sub->sections; o != NULL; o = o->next)
11136 {
11137 Elf_Internal_Shdr *hdr;
0ffa91dd 11138
6a5bb875 11139 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11140 if (hdr->sh_type == SHT_ARM_EXIDX
11141 && hdr->sh_link
11142 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11143 && !o->gc_mark
11144 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11145 {
11146 again = TRUE;
11147 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11148 return FALSE;
11149 }
11150 }
11151 }
11152 }
11153
11154 return TRUE;
11155}
11156
3c9458e9
NC		 11157/* Treat mapping symbols as special target symbols. */
11158
11159static bfd_boolean
11160elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11161{
b0796911
PB		 11162 return bfd_is_arm_special_symbol_name (sym->name,
11163 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11164}
11165
0367ecfb
NC		 11166/* This is a copy of elf_find_function() from elf.c except that
11167 ARM mapping symbols are ignored when looking for function names
11168 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11169
0367ecfb
NC		 11170static bfd_boolean
11171arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11172 asection * section,
11173 asymbol ** symbols,
11174 bfd_vma offset,
11175 const char ** filename_ptr,
11176 const char ** functionname_ptr)
11177{
11178 const char * filename = NULL;
11179 asymbol * func = NULL;
11180 bfd_vma low_func = 0;
11181 asymbol ** p;
252b5132
RH		 11182
11183 for (p = symbols; *p != NULL; p++)
11184 {
11185 elf_symbol_type *q;
11186
11187 q = (elf_symbol_type *) *p;
11188
252b5132
RH		 11189 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11190 {
11191 default:
11192 break;
11193 case STT_FILE:
11194 filename = bfd_asymbol_name (&q->symbol);
11195 break;
252b5132
RH		 11196 case STT_FUNC:
11197 case STT_ARM_TFUNC:
9d2da7ca 11198 case STT_NOTYPE:
b0796911 11199 /* Skip mapping symbols. */
0367ecfb 11200 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11201 && bfd_is_arm_special_symbol_name (q->symbol.name,
11202 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11203 continue;
11204 /* Fall through. */
6b40fcba 11205 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11206 && q->symbol.value >= low_func
11207 && q->symbol.value <= offset)
11208 {
11209 func = (asymbol *) q;
11210 low_func = q->symbol.value;
11211 }
11212 break;
11213 }
11214 }
11215
11216 if (func == NULL)
b34976b6 11217 return FALSE;
252b5132 11218
0367ecfb
NC		 11219 if (filename_ptr)
11220 *filename_ptr = filename;
11221 if (functionname_ptr)
11222 *functionname_ptr = bfd_asymbol_name (func);
11223
11224 return TRUE;
906e58ca 11225}
0367ecfb
NC		 11226
11227
11228/* Find the nearest line to a particular section and offset, for error
11229 reporting. This code is a duplicate of the code in elf.c, except
11230 that it uses arm_elf_find_function. */
11231
11232static bfd_boolean
11233elf32_arm_find_nearest_line (bfd * abfd,
11234 asection * section,
11235 asymbol ** symbols,
11236 bfd_vma offset,
11237 const char ** filename_ptr,
11238 const char ** functionname_ptr,
11239 unsigned int * line_ptr)
11240{
11241 bfd_boolean found = FALSE;
11242
11243 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11244
11245 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11246 filename_ptr, functionname_ptr,
11247 line_ptr, 0,
11248 & elf_tdata (abfd)->dwarf2_find_line_info))
11249 {
11250 if (!*functionname_ptr)
11251 arm_elf_find_function (abfd, section, symbols, offset,
11252 *filename_ptr ? NULL : filename_ptr,
11253 functionname_ptr);
f21f3fe0 11254
0367ecfb
NC		 11255 return TRUE;
11256 }
11257
11258 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11259 & found, filename_ptr,
11260 functionname_ptr, line_ptr,
11261 & elf_tdata (abfd)->line_info))
11262 return FALSE;
11263
11264 if (found && (*functionname_ptr || *line_ptr))
11265 return TRUE;
11266
11267 if (symbols == NULL)
11268 return FALSE;
11269
11270 if (! arm_elf_find_function (abfd, section, symbols, offset,
11271 filename_ptr, functionname_ptr))
11272 return FALSE;
11273
11274 *line_ptr = 0;
b34976b6 11275 return TRUE;
252b5132
RH		 11276}
11277
4ab527b0
FF		 11278static bfd_boolean
11279elf32_arm_find_inliner_info (bfd * abfd,
11280 const char ** filename_ptr,
11281 const char ** functionname_ptr,
11282 unsigned int * line_ptr)
11283{
11284 bfd_boolean found;
11285 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11286 functionname_ptr, line_ptr,
11287 & elf_tdata (abfd)->dwarf2_find_line_info);
11288 return found;
11289}
11290
252b5132
RH		 11291/* Adjust a symbol defined by a dynamic object and referenced by a
11292 regular object. The current definition is in some section of the
11293 dynamic object, but we're not including those sections. We have to
11294 change the definition to something the rest of the link can
11295 understand. */
11296
b34976b6 11297static bfd_boolean
57e8b36a
NC		 11298elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11299 struct elf_link_hash_entry * h)
252b5132
RH		 11300{
11301 bfd * dynobj;
11302 asection * s;
b7693d02 11303 struct elf32_arm_link_hash_entry * eh;
67687978 11304 struct elf32_arm_link_hash_table *globals;
252b5132 11305
67687978 11306 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11307 if (globals == NULL)
11308 return FALSE;
11309
252b5132
RH		 11310 dynobj = elf_hash_table (info)->dynobj;
11311
11312 /* Make sure we know what is going on here. */
11313 BFD_ASSERT (dynobj != NULL
f5385ebf 11314 && (h->needs_plt
f6e332e6 11315 || h->u.weakdef != NULL
f5385ebf
AM		 11316 || (h->def_dynamic
11317 && h->ref_regular
11318 && !h->def_regular)));
252b5132 11319
b7693d02
DJ		 11320 eh = (struct elf32_arm_link_hash_entry *) h;
11321
252b5132
RH		 11322 /* If this is a function, put it in the procedure linkage table. We
11323 will fill in the contents of the procedure linkage table later,
11324 when we know the address of the .got section. */
0f88be7a 11325 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11326 || h->needs_plt)
252b5132 11327 {
5e681ec4
PB		 11328 if (h->plt.refcount <= 0
11329 || SYMBOL_CALLS_LOCAL (info, h)
11330 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11331 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11332 {
11333 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11334 file, but the symbol was never referred to by a dynamic
11335 object, or if all references were garbage collected. In
11336 such a case, we don't actually need to build a procedure
11337 linkage table, and we can just do a PC24 reloc instead. */
11338 h->plt.offset = (bfd_vma) -1;
b7693d02 11339 eh->plt_thumb_refcount = 0;
bd97cb95 11340 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11341 h->needs_plt = 0;
252b5132
RH		 11342 }
11343
b34976b6 11344 return TRUE;
252b5132 11345 }
5e681ec4 11346 else
b7693d02
DJ		 11347 {
11348 /* It's possible that we incorrectly decided a .plt reloc was
11349 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11350 in check_relocs. We can't decide accurately between function
11351 and non-function syms in check-relocs; Objects loaded later in
11352 the link may change h->type. So fix it now. */
11353 h->plt.offset = (bfd_vma) -1;
11354 eh->plt_thumb_refcount = 0;
bd97cb95 11355 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11356 }
252b5132
RH		 11357
11358 /* If this is a weak symbol, and there is a real definition, the
11359 processor independent code will have arranged for us to see the
11360 real definition first, and we can just use the same value. */
f6e332e6 11361 if (h->u.weakdef != NULL)
252b5132 11362 {
f6e332e6
AM		 11363 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11364 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11365 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11366 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11367 return TRUE;
252b5132
RH		 11368 }
11369
ba93b8ac
DJ		 11370 /* If there are no non-GOT references, we do not need a copy
11371 relocation. */
11372 if (!h->non_got_ref)
11373 return TRUE;
11374
252b5132
RH		 11375 /* This is a reference to a symbol defined by a dynamic object which
11376 is not a function. */
11377
11378 /* If we are creating a shared library, we must presume that the
11379 only references to the symbol are via the global offset table.
11380 For such cases we need not do anything here; the relocations will
67687978
PB		 11381 be handled correctly by relocate_section. Relocatable executables
11382 can reference data in shared objects directly, so we don't need to
11383 do anything here. */
11384 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11385 return TRUE;
252b5132 11386
909272ee
AM		 11387 if (h->size == 0)
11388 {
11389 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11390 h->root.root.string);
11391 return TRUE;
11392 }
11393
252b5132
RH		 11394 /* We must allocate the symbol in our .dynbss section, which will
11395 become part of the .bss section of the executable. There will be
11396 an entry for this symbol in the .dynsym section. The dynamic
11397 object will contain position independent code, so all references
11398 from the dynamic object to this symbol will go through the global
11399 offset table. The dynamic linker will use the .dynsym entry to
11400 determine the address it must put in the global offset table, so
11401 both the dynamic object and the regular object will refer to the
11402 same memory location for the variable. */
252b5132
RH		 11403 s = bfd_get_section_by_name (dynobj, ".dynbss");
11404 BFD_ASSERT (s != NULL);
11405
11406 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11407 copy the initial value out of the dynamic object and into the
11408 runtime process image. We need to remember the offset into the
00a97672 11409 .rel(a).bss section we are going to use. */
252b5132
RH		 11410 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11411 {
11412 asection *srel;
11413
00a97672 11414 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11415 BFD_ASSERT (srel != NULL);
00a97672 11416 srel->size += RELOC_SIZE (globals);
f5385ebf 11417 h->needs_copy = 1;
252b5132
RH		 11418 }
11419
027297b7 11420 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11421}
11422
5e681ec4
PB		 11423/* Allocate space in .plt, .got and associated reloc sections for
11424 dynamic relocs. */
11425
11426static bfd_boolean
57e8b36a 11427allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11428{
11429 struct bfd_link_info *info;
11430 struct elf32_arm_link_hash_table *htab;
11431 struct elf32_arm_link_hash_entry *eh;
11432 struct elf32_arm_relocs_copied *p;
bd97cb95 11433 bfd_signed_vma thumb_refs;
5e681ec4 11434
b7693d02
DJ		 11435 eh = (struct elf32_arm_link_hash_entry *) h;
11436
5e681ec4
PB		 11437 if (h->root.type == bfd_link_hash_indirect)
11438 return TRUE;
11439
11440 if (h->root.type == bfd_link_hash_warning)
11441 /* When warning symbols are created, they **replace** the "real"
11442 entry in the hash table, thus we never get to see the real
11443 symbol in a hash traversal. So look at it now. */
11444 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11445
11446 info = (struct bfd_link_info *) inf;
11447 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11448 if (htab == NULL)
11449 return FALSE;
5e681ec4
PB		 11450
11451 if (htab->root.dynamic_sections_created
11452 && h->plt.refcount > 0)
11453 {
11454 /* Make sure this symbol is output as a dynamic symbol.
11455 Undefined weak syms won't yet be marked as dynamic. */
11456 if (h->dynindx == -1
f5385ebf 11457 && !h->forced_local)
5e681ec4 11458 {
c152c796 11459 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11460 return FALSE;
11461 }
11462
11463 if (info->shared
7359ea65 11464 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11465 {
11466 asection *s = htab->splt;
11467
11468 /* If this is the first .plt entry, make room for the special
11469 first entry. */
eea6121a 11470 if (s->size == 0)
e5a52504 11471 s->size += htab->plt_header_size;
5e681ec4 11472
eea6121a 11473 h->plt.offset = s->size;
5e681ec4 11474
b7693d02
DJ		 11475 /* If we will insert a Thumb trampoline before this PLT, leave room
11476 for it. */
bd97cb95
DJ		 11477 thumb_refs = eh->plt_thumb_refcount;
11478 if (!htab->use_blx)
11479 thumb_refs += eh->plt_maybe_thumb_refcount;
11480
11481 if (thumb_refs > 0)
b7693d02
DJ		 11482 {
11483 h->plt.offset += PLT_THUMB_STUB_SIZE;
11484 s->size += PLT_THUMB_STUB_SIZE;
11485 }
11486
5e681ec4
PB		 11487 /* If this symbol is not defined in a regular file, and we are
11488 not generating a shared library, then set the symbol to this
11489 location in the .plt. This is required to make function
11490 pointers compare as equal between the normal executable and
11491 the shared library. */
11492 if (! info->shared
f5385ebf 11493 && !h->def_regular)
5e681ec4
PB		 11494 {
11495 h->root.u.def.section = s;
11496 h->root.u.def.value = h->plt.offset;
5e681ec4 11497
67d74e43
DJ		 11498 /* Make sure the function is not marked as Thumb, in case
11499 it is the target of an ABS32 relocation, which will
11500 point to the PLT entry. */
11501 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11502 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11503 }
022f8312 11504
5e681ec4 11505 /* Make room for this entry. */
e5a52504 11506 s->size += htab->plt_entry_size;
5e681ec4 11507
e5a52504 11508 if (!htab->symbian_p)
b7693d02
DJ		 11509 {
11510 /* We also need to make an entry in the .got.plt section, which
11511 will be placed in the .got section by the linker script. */
11512 eh->plt_got_offset = htab->sgotplt->size;
11513 htab->sgotplt->size += 4;
11514 }
5e681ec4 11515
00a97672
RS		 11516 /* We also need to make an entry in the .rel(a).plt section. */
11517 htab->srelplt->size += RELOC_SIZE (htab);
11518
11519 /* VxWorks executables have a second set of relocations for
11520 each PLT entry. They go in a separate relocation section,
11521 which is processed by the kernel loader. */
11522 if (htab->vxworks_p && !info->shared)
11523 {
11524 /* There is a relocation for the initial PLT entry:
11525 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11526 if (h->plt.offset == htab->plt_header_size)
11527 htab->srelplt2->size += RELOC_SIZE (htab);
11528
11529 /* There are two extra relocations for each subsequent
11530 PLT entry: an R_ARM_32 relocation for the GOT entry,
11531 and an R_ARM_32 relocation for the PLT entry. */
11532 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11533 }
5e681ec4
PB		 11534 }
11535 else
11536 {
11537 h->plt.offset = (bfd_vma) -1;
f5385ebf 11538 h->needs_plt = 0;
5e681ec4
PB		 11539 }
11540 }
11541 else
11542 {
11543 h->plt.offset = (bfd_vma) -1;
f5385ebf 11544 h->needs_plt = 0;
5e681ec4
PB		 11545 }
11546
11547 if (h->got.refcount > 0)
11548 {
11549 asection *s;
11550 bfd_boolean dyn;
ba93b8ac
DJ		 11551 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11552 int indx;
5e681ec4
PB		 11553
11554 /* Make sure this symbol is output as a dynamic symbol.
11555 Undefined weak syms won't yet be marked as dynamic. */
11556 if (h->dynindx == -1
f5385ebf 11557 && !h->forced_local)
5e681ec4 11558 {
c152c796 11559 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11560 return FALSE;
11561 }
11562
e5a52504
MM		 11563 if (!htab->symbian_p)
11564 {
11565 s = htab->sgot;
11566 h->got.offset = s->size;
ba93b8ac
DJ		 11567
11568 if (tls_type == GOT_UNKNOWN)
11569 abort ();
11570
11571 if (tls_type == GOT_NORMAL)
11572 /* Non-TLS symbols need one GOT slot. */
11573 s->size += 4;
11574 else
11575 {
11576 if (tls_type & GOT_TLS_GD)
11577 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11578 s->size += 8;
11579 if (tls_type & GOT_TLS_IE)
11580 /* R_ARM_TLS_IE32 needs one GOT slot. */
11581 s->size += 4;
11582 }
11583
e5a52504 11584 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11585
11586 indx = 0;
11587 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11588 && (!info->shared
11589 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11590 indx = h->dynindx;
11591
11592 if (tls_type != GOT_NORMAL
11593 && (info->shared || indx != 0)
11594 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11595 || h->root.type != bfd_link_hash_undefweak))
11596 {
11597 if (tls_type & GOT_TLS_IE)
00a97672 11598 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11599
11600 if (tls_type & GOT_TLS_GD)
00a97672 11601 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11602
11603 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11604 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11605 }
11606 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11607 || h->root.type != bfd_link_hash_undefweak)
11608 && (info->shared
11609 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11610 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11611 }
5e681ec4
PB		 11612 }
11613 else
11614 h->got.offset = (bfd_vma) -1;
11615
a4fd1a8e
PB		 11616 /* Allocate stubs for exported Thumb functions on v4t. */
11617 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11618 && h->def_regular
a4fd1a8e
PB		 11619 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11620 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11621 {
11622 struct elf_link_hash_entry * th;
11623 struct bfd_link_hash_entry * bh;
11624 struct elf_link_hash_entry * myh;
11625 char name[1024];
11626 asection *s;
11627 bh = NULL;
11628 /* Create a new symbol to regist the real location of the function. */
11629 s = h->root.u.def.section;
906e58ca 11630 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11631 _bfd_generic_link_add_one_symbol (info, s->owner,
11632 name, BSF_GLOBAL, s,
11633 h->root.u.def.value,
11634 NULL, TRUE, FALSE, &bh);
11635
11636 myh = (struct elf_link_hash_entry *) bh;
11637 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11638 myh->forced_local = 1;
11639 eh->export_glue = myh;
11640 th = record_arm_to_thumb_glue (info, h);
11641 /* Point the symbol at the stub. */
11642 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11643 h->root.u.def.section = th->root.u.def.section;
11644 h->root.u.def.value = th->root.u.def.value & ~1;
11645 }
11646
5e681ec4
PB		 11647 if (eh->relocs_copied == NULL)
11648 return TRUE;
11649
11650 /* In the shared -Bsymbolic case, discard space allocated for
11651 dynamic pc-relative relocs against symbols which turn out to be
11652 defined in regular objects. For the normal shared case, discard
11653 space for pc-relative relocs that have become local due to symbol
11654 visibility changes. */
11655
67687978 11656 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11657 {
7bdca076 11658 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11659 R_ARM_REL32_NOI, which will appear on something like
11660 ".long foo - .". We want calls to protected symbols to resolve
11661 directly to the function rather than going via the plt. If people
11662 want function pointer comparisons to work as expected then they
11663 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11664 if (SYMBOL_CALLS_LOCAL (info, h))
11665 {
11666 struct elf32_arm_relocs_copied **pp;
11667
11668 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11669 {
11670 p->count -= p->pc_count;
11671 p->pc_count = 0;
11672 if (p->count == 0)
11673 *pp = p->next;
11674 else
11675 pp = &p->next;
11676 }
11677 }
11678
4dfe6ac6 11679 if (htab->vxworks_p)
3348747a
NS		 11680 {
11681 struct elf32_arm_relocs_copied **pp;
11682
11683 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11684 {
11685 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11686 *pp = p->next;
11687 else
11688 pp = &p->next;
11689 }
11690 }
11691
ba93b8ac 11692 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11693 visibility. */
22d606e9 11694 if (eh->relocs_copied != NULL
5e681ec4 11695 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11696 {
11697 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11698 eh->relocs_copied = NULL;
11699
11700 /* Make sure undefined weak symbols are output as a dynamic
11701 symbol in PIEs. */
11702 else if (h->dynindx == -1
11703 && !h->forced_local)
11704 {
11705 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11706 return FALSE;
11707 }
11708 }
11709
67687978
PB		 11710 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11711 && h->root.type == bfd_link_hash_new)
11712 {
11713 /* Output absolute symbols so that we can create relocations
11714 against them. For normal symbols we output a relocation
11715 against the section that contains them. */
11716 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11717 return FALSE;
11718 }
11719
5e681ec4
PB		 11720 }
11721 else
11722 {
11723 /* For the non-shared case, discard space for relocs against
11724 symbols which turn out to need copy relocs or are not
11725 dynamic. */
11726
f5385ebf
AM		 11727 if (!h->non_got_ref
11728 && ((h->def_dynamic
11729 && !h->def_regular)
5e681ec4
PB		 11730 || (htab->root.dynamic_sections_created
11731 && (h->root.type == bfd_link_hash_undefweak
11732 || h->root.type == bfd_link_hash_undefined))))
11733 {
11734 /* Make sure this symbol is output as a dynamic symbol.
11735 Undefined weak syms won't yet be marked as dynamic. */
11736 if (h->dynindx == -1
f5385ebf 11737 && !h->forced_local)
5e681ec4 11738 {
c152c796 11739 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11740 return FALSE;
11741 }
11742
11743 /* If that succeeded, we know we'll be keeping all the
11744 relocs. */
11745 if (h->dynindx != -1)
11746 goto keep;
11747 }
11748
11749 eh->relocs_copied = NULL;
11750
11751 keep: ;
11752 }
11753
11754 /* Finally, allocate space. */
11755 for (p = eh->relocs_copied; p != NULL; p = p->next)
11756 {
11757 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11758 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11759 }
11760
11761 return TRUE;
11762}
11763
08d1f311
DJ		 11764/* Find any dynamic relocs that apply to read-only sections. */
11765
11766static bfd_boolean
8029a119 11767elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11768{
8029a119
NC		 11769 struct elf32_arm_link_hash_entry * eh;
11770 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11771
11772 if (h->root.type == bfd_link_hash_warning)
11773 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11774
11775 eh = (struct elf32_arm_link_hash_entry *) h;
11776 for (p = eh->relocs_copied; p != NULL; p = p->next)
11777 {
11778 asection *s = p->section;
11779
11780 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11781 {
11782 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11783
11784 info->flags |= DF_TEXTREL;
11785
11786 /* Not an error, just cut short the traversal. */
11787 return FALSE;
11788 }
11789 }
11790 return TRUE;
11791}
11792
d504ffc8
DJ		 11793void
11794bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11795 int byteswap_code)
11796{
11797 struct elf32_arm_link_hash_table *globals;
11798
11799 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11800 if (globals == NULL)
11801 return;
11802
d504ffc8
DJ		 11803 globals->byteswap_code = byteswap_code;
11804}
11805
252b5132
RH		 11806/* Set the sizes of the dynamic sections. */
11807
b34976b6 11808static bfd_boolean
57e8b36a
NC		 11809elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11810 struct bfd_link_info * info)
252b5132
RH		 11811{
11812 bfd * dynobj;
11813 asection * s;
b34976b6
AM		 11814 bfd_boolean plt;
11815 bfd_boolean relocs;
5e681ec4
PB		 11816 bfd *ibfd;
11817 struct elf32_arm_link_hash_table *htab;
252b5132 11818
5e681ec4 11819 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11820 if (htab == NULL)
11821 return FALSE;
11822
252b5132
RH		 11823 dynobj = elf_hash_table (info)->dynobj;
11824 BFD_ASSERT (dynobj != NULL);
39b41c9c 11825 check_use_blx (htab);
252b5132
RH		 11826
11827 if (elf_hash_table (info)->dynamic_sections_created)
11828 {
11829 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11830 if (info->executable)
252b5132
RH		 11831 {
11832 s = bfd_get_section_by_name (dynobj, ".interp");
11833 BFD_ASSERT (s != NULL);
eea6121a 11834 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11835 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11836 }
11837 }
5e681ec4
PB		 11838
11839 /* Set up .got offsets for local syms, and space for local dynamic
11840 relocs. */
11841 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11842 {
5e681ec4
PB		 11843 bfd_signed_vma *local_got;
11844 bfd_signed_vma *end_local_got;
11845 char *local_tls_type;
11846 bfd_size_type locsymcount;
11847 Elf_Internal_Shdr *symtab_hdr;
11848 asection *srel;
4dfe6ac6 11849 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 11850
0ffa91dd 11851 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11852 continue;
11853
11854 for (s = ibfd->sections; s != NULL; s = s->next)
11855 {
11856 struct elf32_arm_relocs_copied *p;
11857
21d799b5
NC		 11858 for (p = (struct elf32_arm_relocs_copied *)
11859 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11860 {
11861 if (!bfd_is_abs_section (p->section)
11862 && bfd_is_abs_section (p->section->output_section))
11863 {
11864 /* Input section has been discarded, either because
11865 it is a copy of a linkonce section or due to
11866 linker script /DISCARD/, so we'll be discarding
11867 the relocs too. */
11868 }
3348747a
NS		 11869 else if (is_vxworks
11870 && strcmp (p->section->output_section->name,
11871 ".tls_vars") == 0)
11872 {
11873 /* Relocations in vxworks .tls_vars sections are
11874 handled specially by the loader. */
11875 }
5e681ec4
PB		 11876 else if (p->count != 0)
11877 {
11878 srel = elf_section_data (p->section)->sreloc;
00a97672 11879 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11880 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11881 info->flags |= DF_TEXTREL;
11882 }
11883 }
11884 }
11885
11886 local_got = elf_local_got_refcounts (ibfd);
11887 if (!local_got)
11888 continue;
11889
0ffa91dd 11890 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11891 locsymcount = symtab_hdr->sh_info;
11892 end_local_got = local_got + locsymcount;
ba93b8ac 11893 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11894 s = htab->sgot;
11895 srel = htab->srelgot;
11896 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11897 {
11898 if (*local_got > 0)
11899 {
eea6121a 11900 *local_got = s->size;
ba93b8ac
DJ		 11901 if (*local_tls_type & GOT_TLS_GD)
11902 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11903 s->size += 8;
11904 if (*local_tls_type & GOT_TLS_IE)
11905 s->size += 4;
11906 if (*local_tls_type == GOT_NORMAL)
11907 s->size += 4;
11908
11909 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11910 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11911 }
11912 else
11913 *local_got = (bfd_vma) -1;
11914 }
252b5132
RH		 11915 }
11916
ba93b8ac
DJ		 11917 if (htab->tls_ldm_got.refcount > 0)
11918 {
11919 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11920 for R_ARM_TLS_LDM32 relocations. */
11921 htab->tls_ldm_got.offset = htab->sgot->size;
11922 htab->sgot->size += 8;
11923 if (info->shared)
00a97672 11924 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11925 }
11926 else
11927 htab->tls_ldm_got.offset = -1;
11928
5e681ec4
PB		 11929 /* Allocate global sym .plt and .got entries, and space for global
11930 sym dynamic relocs. */
57e8b36a 11931 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11932
d504ffc8
DJ		 11933 /* Here we rummage through the found bfds to collect glue information. */
11934 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11935 {
0ffa91dd 11936 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11937 continue;
11938
c7b8f16e
JB		 11939 /* Initialise mapping tables for code/data. */
11940 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11941
c7b8f16e
JB		 11942 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11943 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11944 /* xgettext:c-format */
11945 _bfd_error_handler (_("Errors encountered processing file %s"),
11946 ibfd->filename);
11947 }
d504ffc8 11948
3e6b1042
DJ		 11949 /* Allocate space for the glue sections now that we've sized them. */
11950 bfd_elf32_arm_allocate_interworking_sections (info);
11951
252b5132
RH		 11952 /* The check_relocs and adjust_dynamic_symbol entry points have
11953 determined the sizes of the various dynamic sections. Allocate
11954 memory for them. */
b34976b6
AM		 11955 plt = FALSE;
11956 relocs = FALSE;
252b5132
RH		 11957 for (s = dynobj->sections; s != NULL; s = s->next)
11958 {
11959 const char * name;
252b5132
RH		 11960
11961 if ((s->flags & SEC_LINKER_CREATED) == 0)
11962 continue;
11963
11964 /* It's OK to base decisions on the section name, because none
11965 of the dynobj section names depend upon the input files. */
11966 name = bfd_get_section_name (dynobj, s);
11967
24a1ba0f 11968 if (strcmp (name, ".plt") == 0)
252b5132 11969 {
c456f082
AM		 11970 /* Remember whether there is a PLT. */
11971 plt = s->size != 0;
252b5132 11972 }
0112cd26 11973 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11974 {
c456f082 11975 if (s->size != 0)
252b5132 11976 {
252b5132 11977 /* Remember whether there are any reloc sections other
00a97672
RS		 11978 than .rel(a).plt and .rela.plt.unloaded. */
11979 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11980 relocs = TRUE;
252b5132
RH		 11981
11982 /* We use the reloc_count field as a counter if we need
11983 to copy relocs into the output file. */
11984 s->reloc_count = 0;
11985 }
11986 }
0112cd26 11987 else if (! CONST_STRNEQ (name, ".got")
c456f082 11988 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11989 {
11990 /* It's not one of our sections, so don't allocate space. */
11991 continue;
11992 }
11993
c456f082 11994 if (s->size == 0)
252b5132 11995 {
c456f082 11996 /* If we don't need this section, strip it from the
00a97672
RS		 11997 output file. This is mostly to handle .rel(a).bss and
11998 .rel(a).plt. We must create both sections in
c456f082
AM		 11999 create_dynamic_sections, because they must be created
12000 before the linker maps input sections to output
12001 sections. The linker does that before
12002 adjust_dynamic_symbol is called, and it is that
12003 function which decides whether anything needs to go
12004 into these sections. */
8423293d 12005 s->flags |= SEC_EXCLUDE;
252b5132
RH		 12006 continue;
12007 }
12008
c456f082
AM		 12009 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12010 continue;
12011
252b5132 12012 /* Allocate memory for the section contents. */
21d799b5 12013 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 12014 if (s->contents == NULL)
b34976b6 12015 return FALSE;
252b5132
RH		 12016 }
12017
12018 if (elf_hash_table (info)->dynamic_sections_created)
12019 {
12020 /* Add some entries to the .dynamic section. We fill in the
12021 values later, in elf32_arm_finish_dynamic_sections, but we
12022 must add the entries now so that we get the correct size for
12023 the .dynamic section. The DT_DEBUG entry is filled in by the
12024 dynamic linker and used by the debugger. */
dc810e39 12025#define add_dynamic_entry(TAG, VAL) \
5a580b3a 12026 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 12027
8532796c 12028 if (info->executable)
252b5132 12029 {
dc810e39 12030 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 12031 return FALSE;
252b5132
RH		 12032 }
12033
12034 if (plt)
12035 {
dc810e39
AM		 12036 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12037 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 12038 || !add_dynamic_entry (DT_PLTREL,
12039 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 12040 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 12041 return FALSE;
252b5132
RH		 12042 }
12043
12044 if (relocs)
12045 {
00a97672
RS		 12046 if (htab->use_rel)
12047 {
12048 if (!add_dynamic_entry (DT_REL, 0)
12049 || !add_dynamic_entry (DT_RELSZ, 0)
12050 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12051 return FALSE;
12052 }
12053 else
12054 {
12055 if (!add_dynamic_entry (DT_RELA, 0)
12056 || !add_dynamic_entry (DT_RELASZ, 0)
12057 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12058 return FALSE;
12059 }
252b5132
RH		 12060 }
12061
08d1f311
DJ		 12062 /* If any dynamic relocs apply to a read-only section,
12063 then we need a DT_TEXTREL entry. */
12064 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12065 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12066 info);
08d1f311 12067
99e4ae17 12068 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12069 {
dc810e39 12070 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12071 return FALSE;
252b5132 12072 }
7a2b07ff
NS		 12073 if (htab->vxworks_p
12074 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12075 return FALSE;
252b5132 12076 }
8532796c 12077#undef add_dynamic_entry
252b5132 12078
b34976b6 12079 return TRUE;
252b5132
RH		 12080}
12081
252b5132
RH		 12082/* Finish up dynamic symbol handling. We set the contents of various
12083 dynamic sections here. */
12084
b34976b6 12085static bfd_boolean
906e58ca
NC		 12086elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12087 struct bfd_link_info * info,
12088 struct elf_link_hash_entry * h,
12089 Elf_Internal_Sym * sym)
252b5132
RH		 12090{
12091 bfd * dynobj;
e5a52504 12092 struct elf32_arm_link_hash_table *htab;
b7693d02 12093 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 12094
12095 dynobj = elf_hash_table (info)->dynobj;
e5a52504 12096 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12097 if (htab == NULL)
12098 return FALSE;
12099
b7693d02 12100 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12101
12102 if (h->plt.offset != (bfd_vma) -1)
12103 {
12104 asection * splt;
252b5132 12105 asection * srel;
e5a52504 12106 bfd_byte *loc;
24a1ba0f 12107 bfd_vma plt_index;
947216bf 12108 Elf_Internal_Rela rel;
252b5132
RH		 12109
12110 /* This symbol has an entry in the procedure linkage table. Set
12111 it up. */
12112
12113 BFD_ASSERT (h->dynindx != -1);
12114
12115 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 12116 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 12117 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12118
e5a52504
MM		 12119 /* Fill in the entry in the procedure linkage table. */
12120 if (htab->symbian_p)
12121 {
906e58ca 12122 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12123 elf32_arm_symbian_plt_entry[0],
12124 splt->contents + h->plt.offset);
906e58ca 12125 bfd_put_32 (output_bfd,
52ab56c2
PB		 12126 elf32_arm_symbian_plt_entry[1],
12127 splt->contents + h->plt.offset + 4);
906e58ca 12128
e5a52504 12129 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12130 rel.r_offset = (splt->output_section->vma
12131 + splt->output_offset
52ab56c2 12132 + h->plt.offset + 4);
e5a52504 12133 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12134
12135 /* Get the index in the procedure linkage table which
12136 corresponds to this symbol. This is the index of this symbol
12137 in all the symbols for which we are making plt entries. The
12138 first entry in the procedure linkage table is reserved. */
906e58ca 12139 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12140 / htab->plt_entry_size);
e5a52504
MM		 12141 }
12142 else
12143 {
00a97672 12144 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12145 bfd_vma got_displacement;
12146 asection * sgot;
52ab56c2 12147 bfd_byte * ptr;
906e58ca 12148
e5a52504
MM		 12149 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12150 BFD_ASSERT (sgot != NULL);
12151
b7693d02
DJ		 12152 /* Get the offset into the .got.plt table of the entry that
12153 corresponds to this function. */
12154 got_offset = eh->plt_got_offset;
12155
12156 /* Get the index in the procedure linkage table which
12157 corresponds to this symbol. This is the index of this symbol
12158 in all the symbols for which we are making plt entries. The
12159 first three entries in .got.plt are reserved; after that
12160 symbols appear in the same order as in .plt. */
12161 plt_index = (got_offset - 12) / 4;
e5a52504 12162
00a97672
RS		 12163 /* Calculate the address of the GOT entry. */
12164 got_address = (sgot->output_section->vma
12165 + sgot->output_offset
12166 + got_offset);
5e681ec4 12167
00a97672
RS		 12168 /* ...and the address of the PLT entry. */
12169 plt_address = (splt->output_section->vma
12170 + splt->output_offset
12171 + h->plt.offset);
5e681ec4 12172
52ab56c2 12173 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12174 if (htab->vxworks_p && info->shared)
12175 {
12176 unsigned int i;
12177 bfd_vma val;
12178
52ab56c2 12179 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12180 {
12181 val = elf32_arm_vxworks_shared_plt_entry[i];
12182 if (i == 2)
12183 val |= got_address - sgot->output_section->vma;
12184 if (i == 5)
12185 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12186 if (i == 2 || i == 5)
12187 bfd_put_32 (output_bfd, val, ptr);
12188 else
12189 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12190 }
12191 }
12192 else if (htab->vxworks_p)
b7693d02 12193 {
00a97672
RS		 12194 unsigned int i;
12195 bfd_vma val;
12196
d3753b85 12197 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12198 {
12199 val = elf32_arm_vxworks_exec_plt_entry[i];
12200 if (i == 2)
12201 val |= got_address;
12202 if (i == 4)
12203 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12204 if (i == 5)
12205 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12206 if (i == 2 || i == 5)
12207 bfd_put_32 (output_bfd, val, ptr);
12208 else
12209 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12210 }
12211
12212 loc = (htab->srelplt2->contents
12213 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12214
12215 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12216 referencing the GOT for this PLT entry. */
12217 rel.r_offset = plt_address + 8;
12218 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12219 rel.r_addend = got_offset;
12220 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12221 loc += RELOC_SIZE (htab);
12222
12223 /* Create the R_ARM_ABS32 relocation referencing the
12224 beginning of the PLT for this GOT entry. */
12225 rel.r_offset = got_address;
12226 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12227 rel.r_addend = 0;
12228 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12229 }
00a97672
RS		 12230 else
12231 {
bd97cb95 12232 bfd_signed_vma thumb_refs;
00a97672
RS		 12233 /* Calculate the displacement between the PLT slot and the
12234 entry in the GOT. The eight-byte offset accounts for the
12235 value produced by adding to pc in the first instruction
12236 of the PLT stub. */
12237 got_displacement = got_address - (plt_address + 8);
b7693d02 12238
00a97672
RS		 12239 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12240
bd97cb95
DJ		 12241 thumb_refs = eh->plt_thumb_refcount;
12242 if (!htab->use_blx)
12243 thumb_refs += eh->plt_maybe_thumb_refcount;
12244
12245 if (thumb_refs > 0)
00a97672 12246 {
52ab56c2
PB		 12247 put_thumb_insn (htab, output_bfd,
12248 elf32_arm_plt_thumb_stub[0], ptr - 4);
12249 put_thumb_insn (htab, output_bfd,
12250 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12251 }
12252
52ab56c2
PB		 12253 put_arm_insn (htab, output_bfd,
12254 elf32_arm_plt_entry[0]
12255 | ((got_displacement & 0x0ff00000) >> 20),
12256 ptr + 0);
12257 put_arm_insn (htab, output_bfd,
12258 elf32_arm_plt_entry[1]
12259 | ((got_displacement & 0x000ff000) >> 12),
12260 ptr+ 4);
12261 put_arm_insn (htab, output_bfd,
12262 elf32_arm_plt_entry[2]
12263 | (got_displacement & 0x00000fff),
12264 ptr + 8);
5e681ec4 12265#ifdef FOUR_WORD_PLT
52ab56c2 12266 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12267#endif
00a97672 12268 }
252b5132 12269
e5a52504
MM		 12270 /* Fill in the entry in the global offset table. */
12271 bfd_put_32 (output_bfd,
12272 (splt->output_section->vma
12273 + splt->output_offset),
12274 sgot->contents + got_offset);
906e58ca 12275
00a97672
RS		 12276 /* Fill in the entry in the .rel(a).plt section. */
12277 rel.r_addend = 0;
12278 rel.r_offset = got_address;
e5a52504
MM		 12279 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12280 }
57e8b36a 12281
00a97672
RS		 12282 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12283 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12284
f5385ebf 12285 if (!h->def_regular)
252b5132
RH		 12286 {
12287 /* Mark the symbol as undefined, rather than as defined in
12288 the .plt section. Leave the value alone. */
12289 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12290 /* If the symbol is weak, we do need to clear the value.
12291 Otherwise, the PLT entry would provide a definition for
12292 the symbol even if the symbol wasn't defined anywhere,
12293 and so the symbol would never be NULL. */
f5385ebf 12294 if (!h->ref_regular_nonweak)
d982ba73 12295 sym->st_value = 0;
252b5132
RH		 12296 }
12297 }
12298
ba93b8ac
DJ		 12299 if (h->got.offset != (bfd_vma) -1
12300 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12301 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12302 {
12303 asection * sgot;
12304 asection * srel;
947216bf
AM		 12305 Elf_Internal_Rela rel;
12306 bfd_byte *loc;
00a97672 12307 bfd_vma offset;
252b5132
RH		 12308
12309 /* This symbol has an entry in the global offset table. Set it
12310 up. */
252b5132 12311 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12312 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12313 BFD_ASSERT (sgot != NULL && srel != NULL);
12314
00a97672
RS		 12315 offset = (h->got.offset & ~(bfd_vma) 1);
12316 rel.r_addend = 0;
252b5132
RH		 12317 rel.r_offset = (sgot->output_section->vma
12318 + sgot->output_offset
00a97672 12319 + offset);
252b5132 12320
5e681ec4
PB		 12321 /* If this is a static link, or it is a -Bsymbolic link and the
12322 symbol is defined locally or was forced to be local because
12323 of a version file, we just want to emit a RELATIVE reloc.
12324 The entry in the global offset table will already have been
12325 initialized in the relocate_section function. */
252b5132 12326 if (info->shared
5e681ec4
PB		 12327 && SYMBOL_REFERENCES_LOCAL (info, h))
12328 {
906e58ca 12329 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12330 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12331 if (!htab->use_rel)
12332 {
12333 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12334 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12335 }
5e681ec4 12336 }
252b5132
RH		 12337 else
12338 {
906e58ca 12339 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12340 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12341 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12342 }
12343
00a97672
RS		 12344 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12345 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12346 }
12347
f5385ebf 12348 if (h->needs_copy)
252b5132
RH		 12349 {
12350 asection * s;
947216bf
AM		 12351 Elf_Internal_Rela rel;
12352 bfd_byte *loc;
252b5132
RH		 12353
12354 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12355 BFD_ASSERT (h->dynindx != -1
12356 && (h->root.type == bfd_link_hash_defined
12357 || h->root.type == bfd_link_hash_defweak));
12358
12359 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12360 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12361 BFD_ASSERT (s != NULL);
12362
00a97672 12363 rel.r_addend = 0;
252b5132
RH		 12364 rel.r_offset = (h->root.u.def.value
12365 + h->root.u.def.section->output_section->vma
12366 + h->root.u.def.section->output_offset);
12367 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12368 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12369 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12370 }
12371
00a97672
RS		 12372 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12373 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12374 to the ".got" section. */
252b5132 12375 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12376 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12377 sym->st_shndx = SHN_ABS;
12378
b34976b6 12379 return TRUE;
252b5132
RH		 12380}
12381
12382/* Finish up the dynamic sections. */
12383
b34976b6 12384static bfd_boolean
57e8b36a 12385elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12386{
12387 bfd * dynobj;
12388 asection * sgot;
12389 asection * sdyn;
4dfe6ac6
NC		 12390 struct elf32_arm_link_hash_table *htab;
12391
12392 htab = elf32_arm_hash_table (info);
12393 if (htab == NULL)
12394 return FALSE;
252b5132
RH		 12395
12396 dynobj = elf_hash_table (info)->dynobj;
12397
12398 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
4dfe6ac6 12399 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 12400 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12401
12402 if (elf_hash_table (info)->dynamic_sections_created)
12403 {
12404 asection *splt;
12405 Elf32_External_Dyn *dyncon, *dynconend;
12406
12407 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12408 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12409
12410 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12411 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12412
252b5132
RH		 12413 for (; dyncon < dynconend; dyncon++)
12414 {
12415 Elf_Internal_Dyn dyn;
12416 const char * name;
12417 asection * s;
12418
12419 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12420
12421 switch (dyn.d_tag)
12422 {
229fcec5
MM		 12423 unsigned int type;
12424
252b5132 12425 default:
7a2b07ff
NS		 12426 if (htab->vxworks_p
12427 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12428 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12429 break;
12430
229fcec5
MM		 12431 case DT_HASH:
12432 name = ".hash";
12433 goto get_vma_if_bpabi;
12434 case DT_STRTAB:
12435 name = ".dynstr";
12436 goto get_vma_if_bpabi;
12437 case DT_SYMTAB:
12438 name = ".dynsym";
12439 goto get_vma_if_bpabi;
c0042f5d
MM		 12440 case DT_VERSYM:
12441 name = ".gnu.version";
12442 goto get_vma_if_bpabi;
12443 case DT_VERDEF:
12444 name = ".gnu.version_d";
12445 goto get_vma_if_bpabi;
12446 case DT_VERNEED:
12447 name = ".gnu.version_r";
12448 goto get_vma_if_bpabi;
12449
252b5132
RH		 12450 case DT_PLTGOT:
12451 name = ".got";
12452 goto get_vma;
12453 case DT_JMPREL:
00a97672 12454 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12455 get_vma:
12456 s = bfd_get_section_by_name (output_bfd, name);
12457 BFD_ASSERT (s != NULL);
229fcec5
MM		 12458 if (!htab->symbian_p)
12459 dyn.d_un.d_ptr = s->vma;
12460 else
12461 /* In the BPABI, tags in the PT_DYNAMIC section point
12462 at the file offset, not the memory address, for the
12463 convenience of the post linker. */
12464 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12465 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12466 break;
12467
229fcec5
MM		 12468 get_vma_if_bpabi:
12469 if (htab->symbian_p)
12470 goto get_vma;
12471 break;
12472
252b5132 12473 case DT_PLTRELSZ:
00a97672
RS		 12474 s = bfd_get_section_by_name (output_bfd,
12475 RELOC_SECTION (htab, ".plt"));
252b5132 12476 BFD_ASSERT (s != NULL);
eea6121a 12477 dyn.d_un.d_val = s->size;
252b5132
RH		 12478 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12479 break;
906e58ca 12480
252b5132 12481 case DT_RELSZ:
00a97672 12482 case DT_RELASZ:
229fcec5
MM		 12483 if (!htab->symbian_p)
12484 {
12485 /* My reading of the SVR4 ABI indicates that the
12486 procedure linkage table relocs (DT_JMPREL) should be
12487 included in the overall relocs (DT_REL). This is
12488 what Solaris does. However, UnixWare can not handle
12489 that case. Therefore, we override the DT_RELSZ entry
12490 here to make it not include the JMPREL relocs. Since
00a97672 12491 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12492 other relocation sections, we don't have to worry
12493 about changing the DT_REL entry. */
00a97672
RS		 12494 s = bfd_get_section_by_name (output_bfd,
12495 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12496 if (s != NULL)
12497 dyn.d_un.d_val -= s->size;
12498 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12499 break;
12500 }
8029a119 12501 /* Fall through. */
229fcec5
MM		 12502
12503 case DT_REL:
12504 case DT_RELA:
229fcec5
MM		 12505 /* In the BPABI, the DT_REL tag must point at the file
12506 offset, not the VMA, of the first relocation
12507 section. So, we use code similar to that in
12508 elflink.c, but do not check for SHF_ALLOC on the
12509 relcoation section, since relocations sections are
12510 never allocated under the BPABI. The comments above
12511 about Unixware notwithstanding, we include all of the
12512 relocations here. */
12513 if (htab->symbian_p)
12514 {
12515 unsigned int i;
12516 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12517 ? SHT_REL : SHT_RELA);
12518 dyn.d_un.d_val = 0;
12519 for (i = 1; i < elf_numsections (output_bfd); i++)
12520 {
906e58ca 12521 Elf_Internal_Shdr *hdr
229fcec5
MM		 12522 = elf_elfsections (output_bfd)[i];
12523 if (hdr->sh_type == type)
12524 {
906e58ca 12525 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12526 || dyn.d_tag == DT_RELASZ)
12527 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12528 else if ((ufile_ptr) hdr->sh_offset
12529 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12530 dyn.d_un.d_val = hdr->sh_offset;
12531 }
12532 }
12533 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12534 }
252b5132 12535 break;
88f7bcd5
NC		 12536
12537 /* Set the bottom bit of DT_INIT/FINI if the
12538 corresponding function is Thumb. */
12539 case DT_INIT:
12540 name = info->init_function;
12541 goto get_sym;
12542 case DT_FINI:
12543 name = info->fini_function;
12544 get_sym:
12545 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12546 then there is nothing to adjust. */
88f7bcd5
NC		 12547 if (dyn.d_un.d_val != 0)
12548 {
12549 struct elf_link_hash_entry * eh;
12550
12551 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12552 FALSE, FALSE, TRUE);
906e58ca 12553 if (eh != NULL
88f7bcd5
NC		 12554 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12555 {
12556 dyn.d_un.d_val |= 1;
b34976b6 12557 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12558 }
12559 }
12560 break;
252b5132
RH		 12561 }
12562 }
12563
24a1ba0f 12564 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 12565 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 12566 {
00a97672
RS		 12567 const bfd_vma *plt0_entry;
12568 bfd_vma got_address, plt_address, got_displacement;
12569
12570 /* Calculate the addresses of the GOT and PLT. */
12571 got_address = sgot->output_section->vma + sgot->output_offset;
12572 plt_address = splt->output_section->vma + splt->output_offset;
12573
12574 if (htab->vxworks_p)
12575 {
12576 /* The VxWorks GOT is relocated by the dynamic linker.
12577 Therefore, we must emit relocations rather than simply
12578 computing the values now. */
12579 Elf_Internal_Rela rel;
12580
12581 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12582 put_arm_insn (htab, output_bfd, plt0_entry[0],
12583 splt->contents + 0);
12584 put_arm_insn (htab, output_bfd, plt0_entry[1],
12585 splt->contents + 4);
12586 put_arm_insn (htab, output_bfd, plt0_entry[2],
12587 splt->contents + 8);
00a97672
RS		 12588 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12589
8029a119 12590 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12591 rel.r_offset = plt_address + 12;
12592 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12593 rel.r_addend = 0;
12594 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12595 htab->srelplt2->contents);
12596 }
12597 else
12598 {
12599 got_displacement = got_address - (plt_address + 16);
12600
12601 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12602 put_arm_insn (htab, output_bfd, plt0_entry[0],
12603 splt->contents + 0);
12604 put_arm_insn (htab, output_bfd, plt0_entry[1],
12605 splt->contents + 4);
12606 put_arm_insn (htab, output_bfd, plt0_entry[2],
12607 splt->contents + 8);
12608 put_arm_insn (htab, output_bfd, plt0_entry[3],
12609 splt->contents + 12);
5e681ec4 12610
5e681ec4 12611#ifdef FOUR_WORD_PLT
00a97672
RS		 12612 /* The displacement value goes in the otherwise-unused
12613 last word of the second entry. */
12614 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12615#else
00a97672 12616 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12617#endif
00a97672 12618 }
f7a74f8c 12619 }
252b5132
RH		 12620
12621 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12622 really seem like the right value. */
74541ad4
AM		 12623 if (splt->output_section->owner == output_bfd)
12624 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12625
12626 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12627 {
12628 /* Correct the .rel(a).plt.unloaded relocations. They will have
12629 incorrect symbol indexes. */
12630 int num_plts;
eed62c48 12631 unsigned char *p;
00a97672
RS		 12632
12633 num_plts = ((htab->splt->size - htab->plt_header_size)
12634 / htab->plt_entry_size);
12635 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12636
12637 for (; num_plts; num_plts--)
12638 {
12639 Elf_Internal_Rela rel;
12640
12641 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12642 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12643 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12644 p += RELOC_SIZE (htab);
12645
12646 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12647 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12648 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12649 p += RELOC_SIZE (htab);
12650 }
12651 }
252b5132
RH		 12652 }
12653
12654 /* Fill in the first three entries in the global offset table. */
229fcec5 12655 if (sgot)
252b5132 12656 {
229fcec5
MM		 12657 if (sgot->size > 0)
12658 {
12659 if (sdyn == NULL)
12660 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12661 else
12662 bfd_put_32 (output_bfd,
12663 sdyn->output_section->vma + sdyn->output_offset,
12664 sgot->contents);
12665 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12666 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12667 }
252b5132 12668
229fcec5
MM		 12669 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12670 }
252b5132 12671
b34976b6 12672 return TRUE;
252b5132
RH		 12673}
12674
ba96a88f 12675static void
57e8b36a 12676elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12677{
9b485d32 12678 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12679 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12680
12681 i_ehdrp = elf_elfheader (abfd);
12682
94a3258f
PB		 12683 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12684 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12685 else
12686 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12687 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12688
93204d3a
PB		 12689 if (link_info)
12690 {
12691 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 12692 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 12693 i_ehdrp->e_flags |= EF_ARM_BE8;
12694 }
ba96a88f
NC		 12695}
12696
99e4ae17 12697static enum elf_reloc_type_class
57e8b36a 12698elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12699{
f51e552e 12700 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12701 {
12702 case R_ARM_RELATIVE:
12703 return reloc_class_relative;
12704 case R_ARM_JUMP_SLOT:
12705 return reloc_class_plt;
12706 case R_ARM_COPY:
12707 return reloc_class_copy;
12708 default:
12709 return reloc_class_normal;
12710 }
12711}
12712
e16bb312
NC		 12713/* Set the right machine number for an Arm ELF file. */
12714
12715static bfd_boolean
57e8b36a 12716elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12717{
12718 if (hdr->sh_type == SHT_NOTE)
12719 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12720
12721 return TRUE;
12722}
12723
e489d0ae 12724static void
57e8b36a 12725elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12726{
5a6c6817 12727 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12728}
12729
40a18ebd
NC		 12730/* Return TRUE if this is an unwinding table entry. */
12731
12732static bfd_boolean
12733is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12734{
0112cd26
NC		 12735 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12736 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12737}
12738
12739
12740/* Set the type and flags for an ARM section. We do this by
12741 the section name, which is a hack, but ought to work. */
12742
12743static bfd_boolean
12744elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12745{
12746 const char * name;
12747
12748 name = bfd_get_section_name (abfd, sec);
12749
12750 if (is_arm_elf_unwind_section_name (abfd, name))
12751 {
12752 hdr->sh_type = SHT_ARM_EXIDX;
12753 hdr->sh_flags |= SHF_LINK_ORDER;
12754 }
12755 return TRUE;
12756}
12757
6dc132d9
L		 12758/* Handle an ARM specific section when reading an object file. This is
12759 called when bfd_section_from_shdr finds a section with an unknown
12760 type. */
40a18ebd
NC		 12761
12762static bfd_boolean
12763elf32_arm_section_from_shdr (bfd *abfd,
12764 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12765 const char *name,
12766 int shindex)
40a18ebd
NC		 12767{
12768 /* There ought to be a place to keep ELF backend specific flags, but
12769 at the moment there isn't one. We just keep track of the
12770 sections by their name, instead. Fortunately, the ABI gives
12771 names for all the ARM specific sections, so we will probably get
12772 away with this. */
12773 switch (hdr->sh_type)
12774 {
12775 case SHT_ARM_EXIDX:
0951f019
RE		 12776 case SHT_ARM_PREEMPTMAP:
12777 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12778 break;
12779
12780 default:
12781 return FALSE;
12782 }
12783
6dc132d9 12784 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12785 return FALSE;
12786
12787 return TRUE;
12788}
e489d0ae 12789
8e3de13a
NC		 12790/* A structure used to record a list of sections, independently
12791 of the next and prev fields in the asection structure. */
12792typedef struct section_list
12793{
12794 asection * sec;
12795 struct section_list * next;
12796 struct section_list * prev;
12797}
12798section_list;
12799
12800/* Unfortunately we need to keep a list of sections for which
12801 an _arm_elf_section_data structure has been allocated. This
12802 is because it is possible for functions like elf32_arm_write_section
12803 to be called on a section which has had an elf_data_structure
12804 allocated for it (and so the used_by_bfd field is valid) but
12805 for which the ARM extended version of this structure - the
12806 _arm_elf_section_data structure - has not been allocated. */
12807static section_list * sections_with_arm_elf_section_data = NULL;
12808
12809static void
957c6e41 12810record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12811{
12812 struct section_list * entry;
12813
21d799b5 12814 entry = (struct section_list *) bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12815 if (entry == NULL)
12816 return;
12817 entry->sec = sec;
12818 entry->next = sections_with_arm_elf_section_data;
12819 entry->prev = NULL;
12820 if (entry->next != NULL)
12821 entry->next->prev = entry;
12822 sections_with_arm_elf_section_data = entry;
12823}
12824
44444f50
NC		 12825static struct section_list *
12826find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12827{
12828 struct section_list * entry;
bd4aae00 12829 static struct section_list * last_entry = NULL;
8e3de13a 12830
bd4aae00
NC		 12831 /* This is a short cut for the typical case where the sections are added
12832 to the sections_with_arm_elf_section_data list in forward order and
12833 then looked up here in backwards order. This makes a real difference
12834 to the ld-srec/sec64k.exp linker test. */
44444f50 12835 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12836 if (last_entry != NULL)
12837 {
12838 if (last_entry->sec == sec)
44444f50
NC		 12839 entry = last_entry;
12840 else if (last_entry->next != NULL
12841 && last_entry->next->sec == sec)
12842 entry = last_entry->next;
bd4aae00 12843 }
44444f50
NC		 12844
12845 for (; entry; entry = entry->next)
8e3de13a 12846 if (entry->sec == sec)
44444f50 12847 break;
bd4aae00 12848
44444f50
NC		 12849 if (entry)
12850 /* Record the entry prior to this one - it is the entry we are most
12851 likely to want to locate next time. Also this way if we have been
12852 called from unrecord_section_with_arm_elf_section_data() we will not
12853 be caching a pointer that is about to be freed. */
12854 last_entry = entry->prev;
12855
12856 return entry;
12857}
12858
12859static _arm_elf_section_data *
12860get_arm_elf_section_data (asection * sec)
12861{
12862 struct section_list * entry;
12863
12864 entry = find_arm_elf_section_entry (sec);
12865
12866 if (entry)
12867 return elf32_arm_section_data (entry->sec);
12868 else
12869 return NULL;
8e3de13a
NC		 12870}
12871
12872static void
12873unrecord_section_with_arm_elf_section_data (asection * sec)
12874{
12875 struct section_list * entry;
12876
44444f50
NC		 12877 entry = find_arm_elf_section_entry (sec);
12878
12879 if (entry)
12880 {
12881 if (entry->prev != NULL)
12882 entry->prev->next = entry->next;
12883 if (entry->next != NULL)
12884 entry->next->prev = entry->prev;
12885 if (entry == sections_with_arm_elf_section_data)
12886 sections_with_arm_elf_section_data = entry->next;
12887 free (entry);
12888 }
8e3de13a
NC		 12889}
12890
e489d0ae 12891
4e617b1e
PB		 12892typedef struct
12893{
12894 void *finfo;
12895 struct bfd_link_info *info;
91a5743d
PB		 12896 asection *sec;
12897 int sec_shndx;
6e0b88f1
AM		 12898 int (*func) (void *, const char *, Elf_Internal_Sym *,
12899 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12900} output_arch_syminfo;
12901
12902enum map_symbol_type
12903{
12904 ARM_MAP_ARM,
12905 ARM_MAP_THUMB,
12906 ARM_MAP_DATA
12907};
12908
12909
7413f23f 12910/* Output a single mapping symbol. */
4e617b1e
PB		 12911
12912static bfd_boolean
7413f23f
DJ		 12913elf32_arm_output_map_sym (output_arch_syminfo *osi,
12914 enum map_symbol_type type,
12915 bfd_vma offset)
4e617b1e
PB		 12916{
12917 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 12918 Elf_Internal_Sym sym;
12919
91a5743d
PB		 12920 sym.st_value = osi->sec->output_section->vma
12921 + osi->sec->output_offset
12922 + offset;
4e617b1e
PB		 12923 sym.st_size = 0;
12924 sym.st_other = 0;
12925 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12926 sym.st_shndx = osi->sec_shndx;
fe33d2fa 12927 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 12928 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12929}
12930
12931
12932/* Output mapping symbols for PLT entries associated with H. */
12933
12934static bfd_boolean
12935elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12936{
12937 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12938 struct elf32_arm_link_hash_table *htab;
12939 struct elf32_arm_link_hash_entry *eh;
12940 bfd_vma addr;
12941
4e617b1e
PB		 12942 if (h->root.type == bfd_link_hash_indirect)
12943 return TRUE;
12944
12945 if (h->root.type == bfd_link_hash_warning)
12946 /* When warning symbols are created, they **replace** the "real"
12947 entry in the hash table, thus we never get to see the real
12948 symbol in a hash traversal. So look at it now. */
12949 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12950
12951 if (h->plt.offset == (bfd_vma) -1)
12952 return TRUE;
12953
4dfe6ac6
NC		 12954 htab = elf32_arm_hash_table (osi->info);
12955 if (htab == NULL)
12956 return FALSE;
12957
4e617b1e
PB		 12958 eh = (struct elf32_arm_link_hash_entry *) h;
12959 addr = h->plt.offset;
12960 if (htab->symbian_p)
12961 {
7413f23f 12962 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12963 return FALSE;
7413f23f 12964 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12965 return FALSE;
12966 }
12967 else if (htab->vxworks_p)
12968 {
7413f23f 12969 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12970 return FALSE;
7413f23f 12971 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12972 return FALSE;
7413f23f 12973 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12974 return FALSE;
7413f23f 12975 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12976 return FALSE;
12977 }
12978 else
12979 {
bd97cb95
DJ		 12980 bfd_signed_vma thumb_refs;
12981
12982 thumb_refs = eh->plt_thumb_refcount;
12983 if (!htab->use_blx)
12984 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12985
bd97cb95 12986 if (thumb_refs > 0)
4e617b1e 12987 {
7413f23f 12988 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12989 return FALSE;
12990 }
12991#ifdef FOUR_WORD_PLT
7413f23f 12992 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12993 return FALSE;
7413f23f 12994 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12995 return FALSE;
12996#else
906e58ca 12997 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12998 so only need to output a mapping symbol for the first PLT entry and
12999 entries with thumb thunks. */
bd97cb95 13000 if (thumb_refs > 0 || addr == 20)
4e617b1e 13001 {
7413f23f 13002 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 13003 return FALSE;
13004 }
13005#endif
13006 }
13007
13008 return TRUE;
13009}
13010
7413f23f
DJ		 13011/* Output a single local symbol for a generated stub. */
13012
13013static bfd_boolean
13014elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
13015 bfd_vma offset, bfd_vma size)
13016{
7413f23f
DJ		 13017 Elf_Internal_Sym sym;
13018
7413f23f
DJ		 13019 sym.st_value = osi->sec->output_section->vma
13020 + osi->sec->output_offset
13021 + offset;
13022 sym.st_size = size;
13023 sym.st_other = 0;
13024 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13025 sym.st_shndx = osi->sec_shndx;
6e0b88f1 13026 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 13027}
4e617b1e 13028
da5938a2 13029static bfd_boolean
8029a119
NC		 13030arm_map_one_stub (struct bfd_hash_entry * gen_entry,
13031 void * in_arg)
da5938a2
NC		 13032{
13033 struct elf32_arm_stub_hash_entry *stub_entry;
13034 struct bfd_link_info *info;
da5938a2
NC		 13035 asection *stub_sec;
13036 bfd_vma addr;
7413f23f 13037 char *stub_name;
9a008db3 13038 output_arch_syminfo *osi;
d3ce72d0 13039 const insn_sequence *template_sequence;
461a49ca
DJ		 13040 enum stub_insn_type prev_type;
13041 int size;
13042 int i;
13043 enum map_symbol_type sym_type;
da5938a2
NC		 13044
13045 /* Massage our args to the form they really have. */
13046 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 13047 osi = (output_arch_syminfo *) in_arg;
da5938a2 13048
da5938a2
NC		 13049 info = osi->info;
13050
da5938a2
NC		 13051 stub_sec = stub_entry->stub_sec;
13052
13053 /* Ensure this stub is attached to the current section being
7413f23f 13054 processed. */
da5938a2
NC		 13055 if (stub_sec != osi->sec)
13056 return TRUE;
13057
7413f23f
DJ		 13058 addr = (bfd_vma) stub_entry->stub_offset;
13059 stub_name = stub_entry->output_name;
da5938a2 13060
d3ce72d0
NC		 13061 template_sequence = stub_entry->stub_template;
13062 switch (template_sequence[0].type)
7413f23f 13063 {
461a49ca
DJ		 13064 case ARM_TYPE:
13065 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13066 return FALSE;
13067 break;
461a49ca 13068 case THUMB16_TYPE:
48229727 13069 case THUMB32_TYPE:
461a49ca
DJ		 13070 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13071 stub_entry->stub_size))
da5938a2
NC		 13072 return FALSE;
13073 break;
13074 default:
13075 BFD_FAIL ();
48229727 13076 return 0;
7413f23f 13077 }
da5938a2 13078
461a49ca
DJ		 13079 prev_type = DATA_TYPE;
13080 size = 0;
13081 for (i = 0; i < stub_entry->stub_template_size; i++)
13082 {
d3ce72d0 13083 switch (template_sequence[i].type)
461a49ca
DJ		 13084 {
13085 case ARM_TYPE:
13086 sym_type = ARM_MAP_ARM;
13087 break;
13088
13089 case THUMB16_TYPE:
48229727 13090 case THUMB32_TYPE:
461a49ca
DJ		 13091 sym_type = ARM_MAP_THUMB;
13092 break;
13093
13094 case DATA_TYPE:
13095 sym_type = ARM_MAP_DATA;
13096 break;
13097
13098 default:
13099 BFD_FAIL ();
4e31c731 13100 return FALSE;
461a49ca
DJ		 13101 }
13102
d3ce72d0 13103 if (template_sequence[i].type != prev_type)
461a49ca 13104 {
d3ce72d0 13105 prev_type = template_sequence[i].type;
461a49ca
DJ		 13106 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13107 return FALSE;
13108 }
13109
d3ce72d0 13110 switch (template_sequence[i].type)
461a49ca
DJ		 13111 {
13112 case ARM_TYPE:
48229727 13113 case THUMB32_TYPE:
461a49ca
DJ		 13114 size += 4;
13115 break;
13116
13117 case THUMB16_TYPE:
13118 size += 2;
13119 break;
13120
13121 case DATA_TYPE:
13122 size += 4;
13123 break;
13124
13125 default:
13126 BFD_FAIL ();
4e31c731 13127 return FALSE;
461a49ca
DJ		 13128 }
13129 }
13130
da5938a2
NC		 13131 return TRUE;
13132}
13133
33811162
DG		 13134/* Output mapping symbols for linker generated sections,
13135 and for those data-only sections that do not have a
13136 $d. */
4e617b1e
PB		 13137
13138static bfd_boolean
13139elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13140 struct bfd_link_info *info,
13141 void *finfo,
6e0b88f1
AM		 13142 int (*func) (void *, const char *,
13143 Elf_Internal_Sym *,
13144 asection *,
13145 struct elf_link_hash_entry *))
4e617b1e
PB		 13146{
13147 output_arch_syminfo osi;
13148 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13149 bfd_vma offset;
13150 bfd_size_type size;
33811162 13151 bfd *input_bfd;
4e617b1e
PB		 13152
13153 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13154 if (htab == NULL)
13155 return FALSE;
13156
906e58ca 13157 check_use_blx (htab);
91a5743d 13158
4e617b1e
PB		 13159 osi.finfo = finfo;
13160 osi.info = info;
13161 osi.func = func;
906e58ca 13162
33811162
DG		 13163 /* Add a $d mapping symbol to data-only sections that
13164 don't have any mapping symbol. This may result in (harmless) redundant
13165 mapping symbols. */
13166 for (input_bfd = info->input_bfds;
13167 input_bfd != NULL;
13168 input_bfd = input_bfd->link_next)
13169 {
13170 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13171 for (osi.sec = input_bfd->sections;
13172 osi.sec != NULL;
13173 osi.sec = osi.sec->next)
13174 {
13175 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13176 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13177 != 0)
33811162
DG		 13178 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13179 == SEC_HAS_CONTENTS
13180 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13181 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13182 && osi.sec->size > 0)
33811162
DG		 13183 {
13184 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13185 (output_bfd, osi.sec->output_section);
13186 if (osi.sec_shndx != (int)SHN_BAD)
13187 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13188 }
13189 }
13190 }
13191
91a5743d
PB		 13192 /* ARM->Thumb glue. */
13193 if (htab->arm_glue_size > 0)
13194 {
13195 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13196 ARM2THUMB_GLUE_SECTION_NAME);
13197
13198 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13199 (output_bfd, osi.sec->output_section);
13200 if (info->shared || htab->root.is_relocatable_executable
13201 || htab->pic_veneer)
13202 size = ARM2THUMB_PIC_GLUE_SIZE;
13203 else if (htab->use_blx)
13204 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13205 else
13206 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13207
91a5743d
PB		 13208 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13209 {
7413f23f
DJ		 13210 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13211 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13212 }
13213 }
13214
13215 /* Thumb->ARM glue. */
13216 if (htab->thumb_glue_size > 0)
13217 {
13218 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13219 THUMB2ARM_GLUE_SECTION_NAME);
13220
13221 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13222 (output_bfd, osi.sec->output_section);
13223 size = THUMB2ARM_GLUE_SIZE;
13224
13225 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13226 {
7413f23f
DJ		 13227 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13228 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13229 }
13230 }
13231
845b51d6
PB		 13232 /* ARMv4 BX veneers. */
13233 if (htab->bx_glue_size > 0)
13234 {
13235 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13236 ARM_BX_GLUE_SECTION_NAME);
13237
13238 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13239 (output_bfd, osi.sec->output_section);
13240
7413f23f 13241 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13242 }
13243
8029a119
NC		 13244 /* Long calls stubs. */
13245 if (htab->stub_bfd && htab->stub_bfd->sections)
13246 {
da5938a2 13247 asection* stub_sec;
8029a119 13248
da5938a2
NC		 13249 for (stub_sec = htab->stub_bfd->sections;
13250 stub_sec != NULL;
8029a119
NC		 13251 stub_sec = stub_sec->next)
13252 {
13253 /* Ignore non-stub sections. */
13254 if (!strstr (stub_sec->name, STUB_SUFFIX))
13255 continue;
da5938a2 13256
8029a119 13257 osi.sec = stub_sec;
da5938a2 13258
8029a119
NC		 13259 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13260 (output_bfd, osi.sec->output_section);
da5938a2 13261
8029a119
NC		 13262 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13263 }
13264 }
da5938a2 13265
91a5743d
PB		 13266 /* Finally, output mapping symbols for the PLT. */
13267 if (!htab->splt || htab->splt->size == 0)
13268 return TRUE;
13269
13270 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13271 htab->splt->output_section);
91a5743d 13272 osi.sec = htab->splt;
4e617b1e
PB		 13273 /* Output mapping symbols for the plt header. SymbianOS does not have a
13274 plt header. */
13275 if (htab->vxworks_p)
13276 {
13277 /* VxWorks shared libraries have no PLT header. */
13278 if (!info->shared)
13279 {
7413f23f 13280 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13281 return FALSE;
7413f23f 13282 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13283 return FALSE;
13284 }
13285 }
13286 else if (!htab->symbian_p)
13287 {
7413f23f 13288 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13289 return FALSE;
13290#ifndef FOUR_WORD_PLT
7413f23f 13291 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13292 return FALSE;
13293#endif
13294 }
13295
13296 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13297 return TRUE;
13298}
13299
e489d0ae
PB		 13300/* Allocate target specific section data. */
13301
13302static bfd_boolean
13303elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13304{
f592407e
AM		 13305 if (!sec->used_by_bfd)
13306 {
13307 _arm_elf_section_data *sdata;
13308 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13309
21d799b5 13310 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 13311 if (sdata == NULL)
13312 return FALSE;
13313 sec->used_by_bfd = sdata;
13314 }
e489d0ae 13315
957c6e41 13316 record_section_with_arm_elf_section_data (sec);
8e3de13a 13317
e489d0ae
PB		 13318 return _bfd_elf_new_section_hook (abfd, sec);
13319}
13320
13321
13322/* Used to order a list of mapping symbols by address. */
13323
13324static int
13325elf32_arm_compare_mapping (const void * a, const void * b)
13326{
7f6a71ff
JM		 13327 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13328 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13329
13330 if (amap->vma > bmap->vma)
13331 return 1;
13332 else if (amap->vma < bmap->vma)
13333 return -1;
13334 else if (amap->type > bmap->type)
13335 /* Ensure results do not depend on the host qsort for objects with
13336 multiple mapping symbols at the same address by sorting on type
13337 after vma. */
13338 return 1;
13339 else if (amap->type < bmap->type)
13340 return -1;
13341 else
13342 return 0;
e489d0ae
PB		 13343}
13344
2468f9c9
PB		 13345/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13346
13347static unsigned long
13348offset_prel31 (unsigned long addr, bfd_vma offset)
13349{
13350 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13351}
13352
13353/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13354 relocations. */
13355
13356static void
13357copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13358{
13359 unsigned long first_word = bfd_get_32 (output_bfd, from);
13360 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13361
13362 /* High bit of first word is supposed to be zero. */
13363 if ((first_word & 0x80000000ul) == 0)
13364 first_word = offset_prel31 (first_word, offset);
13365
13366 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13367 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13368 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13369 second_word = offset_prel31 (second_word, offset);
13370
13371 bfd_put_32 (output_bfd, first_word, to);
13372 bfd_put_32 (output_bfd, second_word, to + 4);
13373}
e489d0ae 13374
48229727
JB		 13375/* Data for make_branch_to_a8_stub(). */
13376
13377struct a8_branch_to_stub_data {
13378 asection *writing_section;
13379 bfd_byte *contents;
13380};
13381
13382
13383/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13384 places for a particular section. */
13385
13386static bfd_boolean
13387make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13388 void *in_arg)
13389{
13390 struct elf32_arm_stub_hash_entry *stub_entry;
13391 struct a8_branch_to_stub_data *data;
13392 bfd_byte *contents;
13393 unsigned long branch_insn;
13394 bfd_vma veneered_insn_loc, veneer_entry_loc;
13395 bfd_signed_vma branch_offset;
13396 bfd *abfd;
91d6fa6a 13397 unsigned int target;
48229727
JB		 13398
13399 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13400 data = (struct a8_branch_to_stub_data *) in_arg;
13401
13402 if (stub_entry->target_section != data->writing_section
13403 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13404 return TRUE;
13405
13406 contents = data->contents;
13407
13408 veneered_insn_loc = stub_entry->target_section->output_section->vma
13409 + stub_entry->target_section->output_offset
13410 + stub_entry->target_value;
13411
13412 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13413 + stub_entry->stub_sec->output_offset
13414 + stub_entry->stub_offset;
13415
13416 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13417 veneered_insn_loc &= ~3u;
13418
13419 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13420
13421 abfd = stub_entry->target_section->owner;
91d6fa6a 13422 target = stub_entry->target_value;
48229727
JB		 13423
13424 /* We attempt to avoid this condition by setting stubs_always_after_branch
13425 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13426 This check is just to be on the safe side... */
13427 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13428 {
13429 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13430 "allocated in unsafe location"), abfd);
13431 return FALSE;
13432 }
13433
13434 switch (stub_entry->stub_type)
13435 {
13436 case arm_stub_a8_veneer_b:
13437 case arm_stub_a8_veneer_b_cond:
13438 branch_insn = 0xf0009000;
13439 goto jump24;
13440
13441 case arm_stub_a8_veneer_blx:
13442 branch_insn = 0xf000e800;
13443 goto jump24;
13444
13445 case arm_stub_a8_veneer_bl:
13446 {
13447 unsigned int i1, j1, i2, j2, s;
13448
13449 branch_insn = 0xf000d000;
13450
13451 jump24:
13452 if (branch_offset < -16777216 || branch_offset > 16777214)
13453 {
13454 /* There's not much we can do apart from complain if this
13455 happens. */
13456 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13457 "of range (input file too large)"), abfd);
13458 return FALSE;
13459 }
13460
13461 /* i1 = not(j1 eor s), so:
13462 not i1 = j1 eor s
13463 j1 = (not i1) eor s. */
13464
13465 branch_insn |= (branch_offset >> 1) & 0x7ff;
13466 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13467 i2 = (branch_offset >> 22) & 1;
13468 i1 = (branch_offset >> 23) & 1;
13469 s = (branch_offset >> 24) & 1;
13470 j1 = (!i1) ^ s;
13471 j2 = (!i2) ^ s;
13472 branch_insn |= j2 << 11;
13473 branch_insn |= j1 << 13;
13474 branch_insn |= s << 26;
13475 }
13476 break;
13477
13478 default:
13479 BFD_FAIL ();
13480 return FALSE;
13481 }
13482
91d6fa6a
NC		 13483 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13484 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 13485
13486 return TRUE;
13487}
13488
e489d0ae
PB		 13489/* Do code byteswapping. Return FALSE afterwards so that the section is
13490 written out as normal. */
13491
13492static bfd_boolean
c7b8f16e 13493elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13494 struct bfd_link_info *link_info,
13495 asection *sec,
e489d0ae
PB		 13496 bfd_byte *contents)
13497{
48229727 13498 unsigned int mapcount, errcount;
8e3de13a 13499 _arm_elf_section_data *arm_data;
c7b8f16e 13500 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13501 elf32_arm_section_map *map;
c7b8f16e 13502 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13503 bfd_vma ptr;
13504 bfd_vma end;
c7b8f16e 13505 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13506 bfd_byte tmp;
48229727 13507 unsigned int i;
57e8b36a 13508
4dfe6ac6
NC		 13509 if (globals == NULL)
13510 return FALSE;
13511
8e3de13a
NC		 13512 /* If this section has not been allocated an _arm_elf_section_data
13513 structure then we cannot record anything. */
13514 arm_data = get_arm_elf_section_data (sec);
13515 if (arm_data == NULL)
13516 return FALSE;
13517
13518 mapcount = arm_data->mapcount;
13519 map = arm_data->map;
c7b8f16e
JB		 13520 errcount = arm_data->erratumcount;
13521
13522 if (errcount != 0)
13523 {
13524 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13525
13526 for (errnode = arm_data->erratumlist; errnode != 0;
13527 errnode = errnode->next)
13528 {
91d6fa6a 13529 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 13530
13531 switch (errnode->type)
13532 {
13533 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13534 {
13535 bfd_vma branch_to_veneer;
13536 /* Original condition code of instruction, plus bit mask for
13537 ARM B instruction. */
13538 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13539 | 0x0a000000;
13540
13541 /* The instruction is before the label. */
91d6fa6a 13542 target -= 4;
c7b8f16e
JB		 13543
13544 /* Above offset included in -4 below. */
13545 branch_to_veneer = errnode->u.b.veneer->vma
13546 - errnode->vma - 4;
13547
13548 if ((signed) branch_to_veneer < -(1 << 25)
13549 || (signed) branch_to_veneer >= (1 << 25))
13550 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13551 "range"), output_bfd);
13552
13553 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 13554 contents[endianflip ^ target] = insn & 0xff;
13555 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13556 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13557 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13558 }
13559 break;
13560
13561 case VFP11_ERRATUM_ARM_VENEER:
13562 {
13563 bfd_vma branch_from_veneer;
13564 unsigned int insn;
13565
13566 /* Take size of veneer into account. */
13567 branch_from_veneer = errnode->u.v.branch->vma
13568 - errnode->vma - 12;
13569
13570 if ((signed) branch_from_veneer < -(1 << 25)
13571 || (signed) branch_from_veneer >= (1 << 25))
13572 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13573 "range"), output_bfd);
13574
13575 /* Original instruction. */
13576 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 13577 contents[endianflip ^ target] = insn & 0xff;
13578 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13579 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13580 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13581
13582 /* Branch back to insn after original insn. */
13583 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 13584 contents[endianflip ^ (target + 4)] = insn & 0xff;
13585 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13586 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13587 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13588 }
13589 break;
13590
13591 default:
13592 abort ();
13593 }
13594 }
13595 }
e489d0ae 13596
2468f9c9
PB		 13597 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13598 {
13599 arm_unwind_table_edit *edit_node
13600 = arm_data->u.exidx.unwind_edit_list;
13601 /* Now, sec->size is the size of the section we will write. The original
13602 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13603 markers) was sec->rawsize. (This isn't the case if we perform no
13604 edits, then rawsize will be zero and we should use size). */
21d799b5 13605 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 13606 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13607 unsigned int in_index, out_index;
13608 bfd_vma add_to_offsets = 0;
13609
13610 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13611 {
13612 if (edit_node)
13613 {
13614 unsigned int edit_index = edit_node->index;
13615
13616 if (in_index < edit_index && in_index * 8 < input_size)
13617 {
13618 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13619 contents + in_index * 8, add_to_offsets);
13620 out_index++;
13621 in_index++;
13622 }
13623 else if (in_index == edit_index
13624 || (in_index * 8 >= input_size
13625 && edit_index == UINT_MAX))
13626 {
13627 switch (edit_node->type)
13628 {
13629 case DELETE_EXIDX_ENTRY:
13630 in_index++;
13631 add_to_offsets += 8;
13632 break;
13633
13634 case INSERT_EXIDX_CANTUNWIND_AT_END:
13635 {
13636 asection *text_sec = edit_node->linked_section;
13637 bfd_vma text_offset = text_sec->output_section->vma
13638 + text_sec->output_offset
13639 + text_sec->size;
13640 bfd_vma exidx_offset = offset + out_index * 8;
13641 unsigned long prel31_offset;
13642
13643 /* Note: this is meant to be equivalent to an
13644 R_ARM_PREL31 relocation. These synthetic
13645 EXIDX_CANTUNWIND markers are not relocated by the
13646 usual BFD method. */
13647 prel31_offset = (text_offset - exidx_offset)
13648 & 0x7ffffffful;
13649
13650 /* First address we can't unwind. */
13651 bfd_put_32 (output_bfd, prel31_offset,
13652 &edited_contents[out_index * 8]);
13653
13654 /* Code for EXIDX_CANTUNWIND. */
13655 bfd_put_32 (output_bfd, 0x1,
13656 &edited_contents[out_index * 8 + 4]);
13657
13658 out_index++;
13659 add_to_offsets -= 8;
13660 }
13661 break;
13662 }
13663
13664 edit_node = edit_node->next;
13665 }
13666 }
13667 else
13668 {
13669 /* No more edits, copy remaining entries verbatim. */
13670 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13671 contents + in_index * 8, add_to_offsets);
13672 out_index++;
13673 in_index++;
13674 }
13675 }
13676
13677 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13678 bfd_set_section_contents (output_bfd, sec->output_section,
13679 edited_contents,
13680 (file_ptr) sec->output_offset, sec->size);
13681
13682 return TRUE;
13683 }
13684
48229727
JB		 13685 /* Fix code to point to Cortex-A8 erratum stubs. */
13686 if (globals->fix_cortex_a8)
13687 {
13688 struct a8_branch_to_stub_data data;
13689
13690 data.writing_section = sec;
13691 data.contents = contents;
13692
13693 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13694 &data);
13695 }
13696
e489d0ae
PB		 13697 if (mapcount == 0)
13698 return FALSE;
13699
c7b8f16e 13700 if (globals->byteswap_code)
e489d0ae 13701 {
c7b8f16e 13702 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13703
c7b8f16e
JB		 13704 ptr = map[0].vma;
13705 for (i = 0; i < mapcount; i++)
13706 {
13707 if (i == mapcount - 1)
13708 end = sec->size;
13709 else
13710 end = map[i + 1].vma;
e489d0ae 13711
c7b8f16e 13712 switch (map[i].type)
e489d0ae 13713 {
c7b8f16e
JB		 13714 case 'a':
13715 /* Byte swap code words. */
13716 while (ptr + 3 < end)
13717 {
13718 tmp = contents[ptr];
13719 contents[ptr] = contents[ptr + 3];
13720 contents[ptr + 3] = tmp;
13721 tmp = contents[ptr + 1];
13722 contents[ptr + 1] = contents[ptr + 2];
13723 contents[ptr + 2] = tmp;
13724 ptr += 4;
13725 }
13726 break;
e489d0ae 13727
c7b8f16e
JB		 13728 case 't':
13729 /* Byte swap code halfwords. */
13730 while (ptr + 1 < end)
13731 {
13732 tmp = contents[ptr];
13733 contents[ptr] = contents[ptr + 1];
13734 contents[ptr + 1] = tmp;
13735 ptr += 2;
13736 }
13737 break;
13738
13739 case 'd':
13740 /* Leave data alone. */
13741 break;
13742 }
13743 ptr = end;
13744 }
e489d0ae 13745 }
8e3de13a 13746
93204d3a 13747 free (map);
8e3de13a 13748 arm_data->mapcount = 0;
c7b8f16e 13749 arm_data->mapsize = 0;
8e3de13a
NC		 13750 arm_data->map = NULL;
13751 unrecord_section_with_arm_elf_section_data (sec);
13752
e489d0ae
PB		 13753 return FALSE;
13754}
13755
957c6e41
NC		 13756static void
13757unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13758 asection * sec,
13759 void * ignore ATTRIBUTE_UNUSED)
13760{
13761 unrecord_section_with_arm_elf_section_data (sec);
13762}
13763
13764static bfd_boolean
13765elf32_arm_close_and_cleanup (bfd * abfd)
13766{
b25e3d87
L		 13767 if (abfd->sections)
13768 bfd_map_over_sections (abfd,
13769 unrecord_section_via_map_over_sections,
13770 NULL);
957c6e41
NC		 13771
13772 return _bfd_elf_close_and_cleanup (abfd);
13773}
13774
b25e3d87
L		 13775static bfd_boolean
13776elf32_arm_bfd_free_cached_info (bfd * abfd)
13777{
13778 if (abfd->sections)
13779 bfd_map_over_sections (abfd,
13780 unrecord_section_via_map_over_sections,
13781 NULL);
13782
13783 return _bfd_free_cached_info (abfd);
13784}
13785
b7693d02
DJ		 13786/* Display STT_ARM_TFUNC symbols as functions. */
13787
13788static void
13789elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13790 asymbol *asym)
13791{
13792 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13793
13794 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13795 elfsym->symbol.flags |= BSF_FUNCTION;
13796}
13797
0beaef2b
PB		 13798
13799/* Mangle thumb function symbols as we read them in. */
13800
8384fb8f 13801static bfd_boolean
0beaef2b
PB		 13802elf32_arm_swap_symbol_in (bfd * abfd,
13803 const void *psrc,
13804 const void *pshn,
13805 Elf_Internal_Sym *dst)
13806{
8384fb8f
AM		 13807 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13808 return FALSE;
0beaef2b
PB		 13809
13810 /* New EABI objects mark thumb function symbols by setting the low bit of
13811 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13812 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13813 && (dst->st_value & 1))
13814 {
13815 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13816 dst->st_value &= ~(bfd_vma) 1;
13817 }
8384fb8f 13818 return TRUE;
0beaef2b
PB		 13819}
13820
13821
13822/* Mangle thumb function symbols as we write them out. */
13823
13824static void
13825elf32_arm_swap_symbol_out (bfd *abfd,
13826 const Elf_Internal_Sym *src,
13827 void *cdst,
13828 void *shndx)
13829{
13830 Elf_Internal_Sym newsym;
13831
13832 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13833 of the address set, as per the new EABI. We do this unconditionally
13834 because objcopy does not set the elf header flags until after
13835 it writes out the symbol table. */
13836 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13837 {
13838 newsym = *src;
13839 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13840 if (newsym.st_shndx != SHN_UNDEF)
13841 {
13842 /* Do this only for defined symbols. At link type, the static
13843 linker will simulate the work of dynamic linker of resolving
13844 symbols and will carry over the thumbness of found symbols to
13845 the output symbol table. It's not clear how it happens, but
b0fead2b 13846 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13847 runtime, and writing '1' for them will be confusing for users
13848 and possibly for dynamic linker itself.
13849 */
13850 newsym.st_value |= 1;
13851 }
906e58ca 13852
0beaef2b
PB		 13853 src = &newsym;
13854 }
13855 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13856}
13857
b294bdf8
MM		 13858/* Add the PT_ARM_EXIDX program header. */
13859
13860static bfd_boolean
906e58ca 13861elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13862 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13863{
13864 struct elf_segment_map *m;
13865 asection *sec;
13866
13867 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13868 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13869 {
13870 /* If there is already a PT_ARM_EXIDX header, then we do not
13871 want to add another one. This situation arises when running
13872 "strip"; the input binary already has the header. */
13873 m = elf_tdata (abfd)->segment_map;
13874 while (m && m->p_type != PT_ARM_EXIDX)
13875 m = m->next;
13876 if (!m)
13877 {
21d799b5
NC		 13878 m = (struct elf_segment_map *)
13879 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 13880 if (m == NULL)
13881 return FALSE;
13882 m->p_type = PT_ARM_EXIDX;
13883 m->count = 1;
13884 m->sections[0] = sec;
13885
13886 m->next = elf_tdata (abfd)->segment_map;
13887 elf_tdata (abfd)->segment_map = m;
13888 }
13889 }
13890
13891 return TRUE;
13892}
13893
13894/* We may add a PT_ARM_EXIDX program header. */
13895
13896static int
a6b96beb
AM		 13897elf32_arm_additional_program_headers (bfd *abfd,
13898 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13899{
13900 asection *sec;
13901
13902 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13903 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13904 return 1;
13905 else
13906 return 0;
13907}
13908
fcb93ecf 13909/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13910
fcb93ecf
PB		 13911static bfd_boolean
13912elf32_arm_is_function_type (unsigned int type)
13913{
0f88be7a 13914 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13915}
13916
0beaef2b 13917/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13918const struct elf_size_info elf32_arm_size_info =
13919{
0beaef2b
PB		 13920 sizeof (Elf32_External_Ehdr),
13921 sizeof (Elf32_External_Phdr),
13922 sizeof (Elf32_External_Shdr),
13923 sizeof (Elf32_External_Rel),
13924 sizeof (Elf32_External_Rela),
13925 sizeof (Elf32_External_Sym),
13926 sizeof (Elf32_External_Dyn),
13927 sizeof (Elf_External_Note),
13928 4,
13929 1,
13930 32, 2,
13931 ELFCLASS32, EV_CURRENT,
13932 bfd_elf32_write_out_phdrs,
13933 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13934 bfd_elf32_checksum_contents,
0beaef2b
PB		 13935 bfd_elf32_write_relocs,
13936 elf32_arm_swap_symbol_in,
13937 elf32_arm_swap_symbol_out,
13938 bfd_elf32_slurp_reloc_table,
13939 bfd_elf32_slurp_symbol_table,
13940 bfd_elf32_swap_dyn_in,
13941 bfd_elf32_swap_dyn_out,
13942 bfd_elf32_swap_reloc_in,
13943 bfd_elf32_swap_reloc_out,
13944 bfd_elf32_swap_reloca_in,
13945 bfd_elf32_swap_reloca_out
13946};
13947
252b5132
RH		 13948#define ELF_ARCH bfd_arch_arm
13949#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13950#ifdef __QNXTARGET__
13951#define ELF_MAXPAGESIZE 0x1000
13952#else
f21f3fe0 13953#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13954#endif
b1342370 13955#define ELF_MINPAGESIZE 0x1000
24718e3b 13956#define ELF_COMMONPAGESIZE 0x1000
252b5132 13957
ba93b8ac
DJ		 13958#define bfd_elf32_mkobject elf32_arm_mkobject
13959
99e4ae17
AJ		 13960#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13961#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13962#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13963#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13964#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13965#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13966#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13967#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13968#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13969#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13970#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13971#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13972#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13973#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13974#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13975
13976#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13977#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13978#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13979#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13980#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13981#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13982#define elf_backend_write_section elf32_arm_write_section
252b5132 13983#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13984#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13985#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13986#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13987#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13988#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13989#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13990#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13991#define elf_backend_object_p elf32_arm_object_p
e16bb312 13992#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13993#define elf_backend_fake_sections elf32_arm_fake_sections
13994#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13995#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13996#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13997#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13998#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13999#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 14000#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
14001#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
14002#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
14003#define elf_backend_is_function_type elf32_arm_is_function_type
14004
14005#define elf_backend_can_refcount 1
14006#define elf_backend_can_gc_sections 1
14007#define elf_backend_plt_readonly 1
14008#define elf_backend_want_got_plt 1
14009#define elf_backend_want_plt_sym 0
14010#define elf_backend_may_use_rel_p 1
14011#define elf_backend_may_use_rela_p 0
4e7fd91e 14012#define elf_backend_default_use_rela_p 0
252b5132 14013
04f7c78d 14014#define elf_backend_got_header_size 12
04f7c78d 14015
906e58ca
NC		 14016#undef elf_backend_obj_attrs_vendor
14017#define elf_backend_obj_attrs_vendor "aeabi"
14018#undef elf_backend_obj_attrs_section
14019#define elf_backend_obj_attrs_section ".ARM.attributes"
14020#undef elf_backend_obj_attrs_arg_type
14021#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
14022#undef elf_backend_obj_attrs_section_type
104d59d1 14023#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 14024#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 14025
252b5132 14026#include "elf32-target.h"
7f266840 14027
906e58ca 14028/* VxWorks Targets. */
4e7fd91e 14029
906e58ca 14030#undef TARGET_LITTLE_SYM
4e7fd91e 14031#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 14032#undef TARGET_LITTLE_NAME
4e7fd91e 14033#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 14034#undef TARGET_BIG_SYM
4e7fd91e 14035#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 14036#undef TARGET_BIG_NAME
4e7fd91e
PB		 14037#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
14038
14039/* Like elf32_arm_link_hash_table_create -- but overrides
14040 appropriately for VxWorks. */
906e58ca 14041
4e7fd91e
PB		 14042static struct bfd_link_hash_table *
14043elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
14044{
14045 struct bfd_link_hash_table *ret;
14046
14047 ret = elf32_arm_link_hash_table_create (abfd);
14048 if (ret)
14049 {
14050 struct elf32_arm_link_hash_table *htab
00a97672 14051 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 14052 htab->use_rel = 0;
00a97672 14053 htab->vxworks_p = 1;
4e7fd91e
PB		 14054 }
14055 return ret;
906e58ca 14056}
4e7fd91e 14057
00a97672
RS		 14058static void
14059elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
14060{
14061 elf32_arm_final_write_processing (abfd, linker);
14062 elf_vxworks_final_write_processing (abfd, linker);
14063}
14064
906e58ca 14065#undef elf32_bed
4e7fd91e
PB		 14066#define elf32_bed elf32_arm_vxworks_bed
14067
906e58ca
NC		 14068#undef bfd_elf32_bfd_link_hash_table_create
14069#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
14070#undef elf_backend_add_symbol_hook
14071#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
14072#undef elf_backend_final_write_processing
14073#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
14074#undef elf_backend_emit_relocs
14075#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 14076
906e58ca 14077#undef elf_backend_may_use_rel_p
00a97672 14078#define elf_backend_may_use_rel_p 0
906e58ca 14079#undef elf_backend_may_use_rela_p
00a97672 14080#define elf_backend_may_use_rela_p 1
906e58ca 14081#undef elf_backend_default_use_rela_p
00a97672 14082#define elf_backend_default_use_rela_p 1
906e58ca 14083#undef elf_backend_want_plt_sym
00a97672 14084#define elf_backend_want_plt_sym 1
906e58ca 14085#undef ELF_MAXPAGESIZE
00a97672 14086#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 14087
14088#include "elf32-target.h"
14089
14090
21d799b5
NC		 14091/* Merge backend specific data from an object file to the output
14092 object file when linking. */
14093
14094static bfd_boolean
14095elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
14096{
14097 flagword out_flags;
14098 flagword in_flags;
14099 bfd_boolean flags_compatible = TRUE;
14100 asection *sec;
14101
14102 /* Check if we have the same endianess. */
14103 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14104 return FALSE;
14105
14106 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14107 return TRUE;
14108
14109 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14110 return FALSE;
14111
14112 /* The input BFD must have had its flags initialised. */
14113 /* The following seems bogus to me -- The flags are initialized in
14114 the assembler but I don't think an elf_flags_init field is
14115 written into the object. */
14116 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14117
14118 in_flags = elf_elfheader (ibfd)->e_flags;
14119 out_flags = elf_elfheader (obfd)->e_flags;
14120
14121 /* In theory there is no reason why we couldn't handle this. However
14122 in practice it isn't even close to working and there is no real
14123 reason to want it. */
14124 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14125 && !(ibfd->flags & DYNAMIC)
14126 && (in_flags & EF_ARM_BE8))
14127 {
14128 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14129 ibfd);
14130 return FALSE;
14131 }
14132
14133 if (!elf_flags_init (obfd))
14134 {
14135 /* If the input is the default architecture and had the default
14136 flags then do not bother setting the flags for the output
14137 architecture, instead allow future merges to do this. If no
14138 future merges ever set these flags then they will retain their
14139 uninitialised values, which surprise surprise, correspond
14140 to the default values. */
14141 if (bfd_get_arch_info (ibfd)->the_default
14142 && elf_elfheader (ibfd)->e_flags == 0)
14143 return TRUE;
14144
14145 elf_flags_init (obfd) = TRUE;
14146 elf_elfheader (obfd)->e_flags = in_flags;
14147
14148 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14149 && bfd_get_arch_info (obfd)->the_default)
14150 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14151
14152 return TRUE;
14153 }
14154
14155 /* Determine what should happen if the input ARM architecture
14156 does not match the output ARM architecture. */
14157 if (! bfd_arm_merge_machines (ibfd, obfd))
14158 return FALSE;
14159
14160 /* Identical flags must be compatible. */
14161 if (in_flags == out_flags)
14162 return TRUE;
14163
14164 /* Check to see if the input BFD actually contains any sections. If
14165 not, its flags may not have been initialised either, but it
14166 cannot actually cause any incompatiblity. Do not short-circuit
14167 dynamic objects; their section list may be emptied by
14168 elf_link_add_object_symbols.
14169
14170 Also check to see if there are no code sections in the input.
14171 In this case there is no need to check for code specific flags.
14172 XXX - do we need to worry about floating-point format compatability
14173 in data sections ? */
14174 if (!(ibfd->flags & DYNAMIC))
14175 {
14176 bfd_boolean null_input_bfd = TRUE;
14177 bfd_boolean only_data_sections = TRUE;
14178
14179 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14180 {
14181 /* Ignore synthetic glue sections. */
14182 if (strcmp (sec->name, ".glue_7")
14183 && strcmp (sec->name, ".glue_7t"))
14184 {
14185 if ((bfd_get_section_flags (ibfd, sec)
14186 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14187 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14188 only_data_sections = FALSE;
14189
14190 null_input_bfd = FALSE;
14191 break;
14192 }
14193 }
14194
14195 if (null_input_bfd || only_data_sections)
14196 return TRUE;
14197 }
14198
14199 /* Complain about various flag mismatches. */
14200 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14201 EF_ARM_EABI_VERSION (out_flags)))
14202 {
14203 _bfd_error_handler
14204 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14205 ibfd, obfd,
14206 (in_flags & EF_ARM_EABIMASK) >> 24,
14207 (out_flags & EF_ARM_EABIMASK) >> 24);
14208 return FALSE;
14209 }
14210
14211 /* Not sure what needs to be checked for EABI versions >= 1. */
14212 /* VxWorks libraries do not use these flags. */
14213 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14214 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14215 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14216 {
14217 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14218 {
14219 _bfd_error_handler
14220 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14221 ibfd, obfd,
14222 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14223 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14224 flags_compatible = FALSE;
14225 }
14226
14227 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14228 {
14229 if (in_flags & EF_ARM_APCS_FLOAT)
14230 _bfd_error_handler
14231 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14232 ibfd, obfd);
14233 else
14234 _bfd_error_handler
14235 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14236 ibfd, obfd);
14237
14238 flags_compatible = FALSE;
14239 }
14240
14241 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14242 {
14243 if (in_flags & EF_ARM_VFP_FLOAT)
14244 _bfd_error_handler
14245 (_("error: %B uses VFP instructions, whereas %B does not"),
14246 ibfd, obfd);
14247 else
14248 _bfd_error_handler
14249 (_("error: %B uses FPA instructions, whereas %B does not"),
14250 ibfd, obfd);
14251
14252 flags_compatible = FALSE;
14253 }
14254
14255 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14256 {
14257 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14258 _bfd_error_handler
14259 (_("error: %B uses Maverick instructions, whereas %B does not"),
14260 ibfd, obfd);
14261 else
14262 _bfd_error_handler
14263 (_("error: %B does not use Maverick instructions, whereas %B does"),
14264 ibfd, obfd);
14265
14266 flags_compatible = FALSE;
14267 }
14268
14269#ifdef EF_ARM_SOFT_FLOAT
14270 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14271 {
14272 /* We can allow interworking between code that is VFP format
14273 layout, and uses either soft float or integer regs for
14274 passing floating point arguments and results. We already
14275 know that the APCS_FLOAT flags match; similarly for VFP
14276 flags. */
14277 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14278 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14279 {
14280 if (in_flags & EF_ARM_SOFT_FLOAT)
14281 _bfd_error_handler
14282 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14283 ibfd, obfd);
14284 else
14285 _bfd_error_handler
14286 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14287 ibfd, obfd);
14288
14289 flags_compatible = FALSE;
14290 }
14291 }
14292#endif
14293
14294 /* Interworking mismatch is only a warning. */
14295 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14296 {
14297 if (in_flags & EF_ARM_INTERWORK)
14298 {
14299 _bfd_error_handler
14300 (_("Warning: %B supports interworking, whereas %B does not"),
14301 ibfd, obfd);
14302 }
14303 else
14304 {
14305 _bfd_error_handler
14306 (_("Warning: %B does not support interworking, whereas %B does"),
14307 ibfd, obfd);
14308 }
14309 }
14310 }
14311
14312 return flags_compatible;
14313}
14314
14315
906e58ca 14316/* Symbian OS Targets. */
7f266840 14317
906e58ca 14318#undef TARGET_LITTLE_SYM
7f266840 14319#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14320#undef TARGET_LITTLE_NAME
7f266840 14321#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14322#undef TARGET_BIG_SYM
7f266840 14323#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14324#undef TARGET_BIG_NAME
7f266840
DJ		 14325#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14326
14327/* Like elf32_arm_link_hash_table_create -- but overrides
14328 appropriately for Symbian OS. */
906e58ca 14329
7f266840
DJ		 14330static struct bfd_link_hash_table *
14331elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14332{
14333 struct bfd_link_hash_table *ret;
14334
14335 ret = elf32_arm_link_hash_table_create (abfd);
14336 if (ret)
14337 {
14338 struct elf32_arm_link_hash_table *htab
14339 = (struct elf32_arm_link_hash_table *)ret;
14340 /* There is no PLT header for Symbian OS. */
14341 htab->plt_header_size = 0;
95720a86
DJ		 14342 /* The PLT entries are each one instruction and one word. */
14343 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14344 htab->symbian_p = 1;
33bfe774
JB		 14345 /* Symbian uses armv5t or above, so use_blx is always true. */
14346 htab->use_blx = 1;
67687978 14347 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14348 }
14349 return ret;
906e58ca 14350}
7f266840 14351
b35d266b 14352static const struct bfd_elf_special_section
551b43fd 14353elf32_arm_symbian_special_sections[] =
7f266840 14354{
5cd3778d
MM		 14355 /* In a BPABI executable, the dynamic linking sections do not go in
14356 the loadable read-only segment. The post-linker may wish to
14357 refer to these sections, but they are not part of the final
14358 program image. */
0112cd26
NC		 14359 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14360 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14361 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14362 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14363 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14364 /* These sections do not need to be writable as the SymbianOS
14365 postlinker will arrange things so that no dynamic relocation is
14366 required. */
0112cd26
NC		 14367 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14368 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14369 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14370 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14371};
14372
c3c76620 14373static void
906e58ca 14374elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14375 struct bfd_link_info *link_info)
c3c76620
MM		 14376{
14377 /* BPABI objects are never loaded directly by an OS kernel; they are
14378 processed by a postlinker first, into an OS-specific format. If
14379 the D_PAGED bit is set on the file, BFD will align segments on
14380 page boundaries, so that an OS can directly map the file. With
14381 BPABI objects, that just results in wasted space. In addition,
14382 because we clear the D_PAGED bit, map_sections_to_segments will
14383 recognize that the program headers should not be mapped into any
14384 loadable segment. */
14385 abfd->flags &= ~D_PAGED;
906e58ca 14386 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14387}
7f266840
DJ		 14388
14389static bfd_boolean
906e58ca 14390elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14391 struct bfd_link_info *info)
7f266840
DJ		 14392{
14393 struct elf_segment_map *m;
14394 asection *dynsec;
14395
7f266840
DJ		 14396 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14397 segment. However, because the .dynamic section is not marked
14398 with SEC_LOAD, the generic ELF code will not create such a
14399 segment. */
14400 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14401 if (dynsec)
14402 {
8ded5a0f
AM		 14403 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14404 if (m->p_type == PT_DYNAMIC)
14405 break;
14406
14407 if (m == NULL)
14408 {
14409 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14410 m->next = elf_tdata (abfd)->segment_map;
14411 elf_tdata (abfd)->segment_map = m;
14412 }
7f266840
DJ		 14413 }
14414
b294bdf8
MM		 14415 /* Also call the generic arm routine. */
14416 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14417}
14418
95720a86
DJ		 14419/* Return address for Ith PLT stub in section PLT, for relocation REL
14420 or (bfd_vma) -1 if it should not be included. */
14421
14422static bfd_vma
14423elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14424 const arelent *rel ATTRIBUTE_UNUSED)
14425{
14426 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14427}
14428
14429
8029a119 14430#undef elf32_bed
7f266840
DJ		 14431#define elf32_bed elf32_arm_symbian_bed
14432
14433/* The dynamic sections are not allocated on SymbianOS; the postlinker
14434 will process them and then discard them. */
906e58ca 14435#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14436#define ELF_DYNAMIC_SEC_FLAGS \
14437 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14438
00a97672 14439#undef elf_backend_add_symbol_hook
00a97672 14440#undef elf_backend_emit_relocs
c3c76620 14441
906e58ca
NC		 14442#undef bfd_elf32_bfd_link_hash_table_create
14443#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14444#undef elf_backend_special_sections
14445#define elf_backend_special_sections elf32_arm_symbian_special_sections
14446#undef elf_backend_begin_write_processing
14447#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14448#undef elf_backend_final_write_processing
14449#define elf_backend_final_write_processing elf32_arm_final_write_processing
14450
14451#undef elf_backend_modify_segment_map
7f266840
DJ		 14452#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14453
14454/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14455#undef elf_backend_got_header_size
7f266840
DJ		 14456#define elf_backend_got_header_size 0
14457
14458/* Similarly, there is no .got.plt section. */
906e58ca 14459#undef elf_backend_want_got_plt
7f266840
DJ		 14460#define elf_backend_want_got_plt 0
14461
906e58ca 14462#undef elf_backend_plt_sym_val
95720a86
DJ		 14463#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14464
906e58ca 14465#undef elf_backend_may_use_rel_p
00a97672 14466#define elf_backend_may_use_rel_p 1
906e58ca 14467#undef elf_backend_may_use_rela_p
00a97672 14468#define elf_backend_may_use_rela_p 0
906e58ca 14469#undef elf_backend_default_use_rela_p
00a97672 14470#define elf_backend_default_use_rela_p 0
906e58ca 14471#undef elf_backend_want_plt_sym
00a97672 14472#define elf_backend_want_plt_sym 0
906e58ca 14473#undef ELF_MAXPAGESIZE
00a97672 14474#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14475
7f266840 14476#include "elf32-target.h"
GDB Binutils - Deliverables
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