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Add support to readelf for reading NetBSD ELF core notes.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
b90efa5b 2 Copyright (C) 1998-2015 Free Software Foundation, Inc.
252b5132
RH		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
6e6718a3 21#include "sysdep.h"
2468f9c9
PB		 22#include <limits.h>
23
3db64b00 24#include "bfd.h"
6034aab8 25#include "bfd_stdint.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
b38cadfb 29#include "elf-nacl.h"
00a97672 30#include "elf-vxworks.h"
ee065d83 31#include "elf/arm.h"
7f266840 32
00a97672
RS		 33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ		 59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
79f08007
YZ		 65/* The Adjusted Place, as defined by AAELF. */
66#define Pa(X) ((X) & 0xfffffffc)
67
3e6b1042
DJ		 68static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
7f266840
DJ		 73/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
c19d1205 77static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 78{
8029a119 79 /* No relocation. */
7f266840
DJ		 80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
6346d5ca 82 3, /* size (0 = byte, 1 = short, 2 = long) */
7f266840
DJ		 83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
c19d1205 138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 139 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 142 32, /* bitsize */
143 TRUE, /* pc_relative */
7f266840 144 0, /* bitpos */
4962c51a 145 complain_overflow_dont,/* complain_on_overflow */
7f266840 146 bfd_elf_generic_reloc, /* special_function */
4962c51a 147 "R_ARM_LDR_PC_G0", /* name */
7f266840 148 FALSE, /* partial_inplace */
4962c51a
MS		 149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
7f266840
DJ		 152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
00a97672
RS		 179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
7f266840
DJ		 181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
c19d1205 226 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 229 24, /* bitsize */
7f266840
DJ		 230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
c19d1205 234 "R_ARM_THM_CALL", /* name */
7f266840 235 FALSE, /* partial_inplace */
7f6ab9f8
AM		 236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
7f266840
DJ		 238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
c19d1205 254 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 257 32, /* bitsize */
258 FALSE, /* pc_relative */
7f266840
DJ		 259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
c19d1205 262 "R_ARM_BREL_ADJ", /* name */
7f266840 263 FALSE, /* partial_inplace */
c19d1205
ZW		 264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
7f266840 267
0855e32b 268 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 269 0, /* rightshift */
0855e32b
NS		 270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
7f266840
DJ		 272 FALSE, /* pc_relative */
273 0, /* bitpos */
0855e32b 274 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 275 bfd_elf_generic_reloc, /* special_function */
0855e32b 276 "R_ARM_TLS_DESC", /* name */
7f266840 277 FALSE, /* partial_inplace */
0855e32b
NS		 278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
7f266840
DJ		 280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 300 24, /* bitsize */
7f266840
DJ		 301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 315 24, /* bitsize */
7f266840
DJ		 316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
7f6ab9f8
AM		 322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
7f266840
DJ		 324 TRUE), /* pcrel_offset */
325
ba93b8ac 326 /* Dynamic TLS relocations. */
7f266840 327
ba93b8ac 328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
99059e56
RM		 329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
7f266840 341
ba93b8ac 342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
99059e56
RM		 343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
7f266840 355
ba93b8ac 356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
99059e56
RM		 357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
7f266840
DJ		 369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
99059e56
RM		 373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
7f266840
DJ		 385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
99059e56
RM		 387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
7f266840
DJ		 399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
99059e56
RM		 401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
7f266840
DJ		 413
414 HOWTO (R_ARM_RELATIVE, /* type */
99059e56
RM		 415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
7f266840 427
c19d1205 428 HOWTO (R_ARM_GOTOFF32, /* type */
99059e56
RM		 429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
7f266840
DJ		 441
442 HOWTO (R_ARM_GOTPC, /* type */
99059e56
RM		 443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
7f266840
DJ		 455
456 HOWTO (R_ARM_GOT32, /* type */
99059e56
RM		 457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
7f266840
DJ		 469
470 HOWTO (R_ARM_PLT32, /* type */
99059e56
RM		 471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
7f266840
DJ		 483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
c19d1205
ZW		 512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
7f266840 517 0, /* bitpos */
c19d1205 518 complain_overflow_signed,/* complain_on_overflow */
7f266840 519 bfd_elf_generic_reloc, /* special_function */
c19d1205 520 "R_ARM_THM_JUMP24", /* name */
7f266840 521 FALSE, /* partial_inplace */
c19d1205
ZW		 522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
7f266840 525
c19d1205 526 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 527 0, /* rightshift */
c19d1205
ZW		 528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
7f266840
DJ		 530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
c19d1205 534 "R_ARM_BASE_ABS", /* name */
7f266840 535 FALSE, /* partial_inplace */
c19d1205
ZW		 536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
7f266840
DJ		 538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
c19d1205
ZW		 693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
39623e12
PB		 704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
c19d1205
ZW		 706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
39623e12
PB		 718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
c19d1205
ZW		 720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
39623e12
PB		 732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
c19d1205
ZW		 734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
39623e12
PB		 746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
c19d1205
ZW		 748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
2cab6cc3 843 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
2cab6cc3
MS		 847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
c19d1205
ZW		 849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
2cab6cc3 857 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
2cab6cc3
MS		 861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
c19d1205
ZW		 863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
7f266840 892
4962c51a
MS		 893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
c19d1205 1274
c19d1205
ZW		 1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
0855e32b
NS		 1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
c19d1205
ZW		 1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
99059e56
RM		 1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
c19d1205
ZW		 1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
99059e56
RM		 1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
c19d1205
ZW		 1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
ba93b8ac 1544
c19d1205
ZW		 1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
99059e56
RM		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
ba93b8ac 1559
ba93b8ac 1560 HOWTO (R_ARM_TLS_LDM32, /* type */
99059e56
RM		 1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
ba93b8ac 1573
c19d1205 1574 HOWTO (R_ARM_TLS_LDO32, /* type */
99059e56
RM		 1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
ba93b8ac 1587
ba93b8ac 1588 HOWTO (R_ARM_TLS_IE32, /* type */
99059e56
RM		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
7f266840 1601
c19d1205 1602 HOWTO (R_ARM_TLS_LE32, /* type */
99059e56
RM		 1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
75c11999 1609 NULL, /* special_function */
99059e56
RM		 1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
7f266840 1615
c19d1205
ZW		 1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
7f266840 1621 0, /* bitpos */
c19d1205 1622 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1623 bfd_elf_generic_reloc, /* special_function */
c19d1205 1624 "R_ARM_TLS_LDO12", /* name */
7f266840 1625 FALSE, /* partial_inplace */
c19d1205
ZW		 1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
7f266840 1629
c19d1205
ZW		 1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
7f266840 1635 0, /* bitpos */
c19d1205 1636 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1637 bfd_elf_generic_reloc, /* special_function */
c19d1205 1638 "R_ARM_TLS_LE12", /* name */
7f266840 1639 FALSE, /* partial_inplace */
c19d1205
ZW		 1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
7f266840 1643
c19d1205 1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
7f266840 1649 0, /* bitpos */
c19d1205 1650 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1651 bfd_elf_generic_reloc, /* special_function */
c19d1205 1652 "R_ARM_TLS_IE12GP", /* name */
7f266840 1653 FALSE, /* partial_inplace */
c19d1205
ZW		 1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
0855e32b 1657
34e77a92 1658 /* 112-127 private relocations. */
0855e32b
NS		 1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
34e77a92
RS		 1675
1676 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
c19d1205
ZW		 1692};
1693
34e77a92
RS		 1694/* 160 onwards: */
1695static reloc_howto_type elf32_arm_howto_table_2[1] =
1696{
1697 HOWTO (R_ARM_IRELATIVE, /* type */
99059e56
RM		 1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
34e77a92 1710};
c19d1205 1711
34e77a92
RS		 1712/* 249-255 extended, currently unused, relocations: */
1713static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1714{
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770};
1771
1772static reloc_howto_type *
1773elf32_arm_howto_from_type (unsigned int r_type)
1774{
906e58ca 1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1776 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1777
34e77a92
RS		 1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
c19d1205 1781 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1784
c19d1205 1785 return NULL;
7f266840
DJ		 1786}
1787
1788static void
1789elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791{
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796}
1797
1798struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804/* All entries in this list must also be present in elf32_arm_howto_table. */
1805static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1893 };
1894
1895static reloc_howto_type *
f1c71a59
ZW		 1896elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
7f266840
DJ		 1898{
1899 unsigned int i;
8029a119 1900
906e58ca 1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1904
c19d1205 1905 return NULL;
7f266840
DJ		 1906}
1907
157090f7
AM		 1908static reloc_howto_type *
1909elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911{
1912 unsigned int i;
1913
906e58ca 1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
906e58ca 1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
34e77a92
RS		 1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
157090f7
AM		 1929 return NULL;
1930}
1931
906e58ca
NC		 1932/* Support for core dump NOTE sections. */
1933
7f266840 1934static bfd_boolean
f1c71a59 1935elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1936{
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
8029a119 1945 case 148: /* Linux/ARM 32-bit. */
7f266840 1946 /* pr_cursig */
228e534f 1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
7f266840
DJ		 1948
1949 /* pr_pid */
228e534f 1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962}
1963
1964static bfd_boolean
f1c71a59 1965elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1966{
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
8029a119 1972 case 124: /* Linux/ARM elf_prpsinfo. */
228e534f 1973 elf_tdata (abfd)->core->pid
4395ee08 1974 = bfd_get_32 (abfd, note->descdata + 12);
228e534f 1975 elf_tdata (abfd)->core->program
7f266840 1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
228e534f 1977 elf_tdata (abfd)->core->command
7f266840
DJ		 1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
7f266840 1984 {
228e534f 1985 char *command = elf_tdata (abfd)->core->command;
7f266840
DJ		 1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993}
1994
1f20dca5
UW		 1995static char *
1996elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998{
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041}
2042
6d00b590 2043#define TARGET_LITTLE_SYM arm_elf32_le_vec
7f266840 2044#define TARGET_LITTLE_NAME "elf32-littlearm"
6d00b590 2045#define TARGET_BIG_SYM arm_elf32_be_vec
7f266840
DJ		 2046#define TARGET_BIG_NAME "elf32-bigarm"
2047
2048#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2050#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2051
252b5132
RH		 2052typedef unsigned long int insn32;
2053typedef unsigned short int insn16;
2054
3a4a14e9
PB		 2055/* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
57e8b36a 2057#define INTERWORK_FLAG(abfd) \
3a4a14e9 2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2061
252b5132
RH		 2062/* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
9b485d32 2065 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2066#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
c7b8f16e
JB		 2072#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
845b51d6
PB		 2075#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
7413f23f
DJ		 2078#define STUB_ENTRY_NAME "__%s_veneer"
2079
252b5132
RH		 2080/* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
0855e32b 2084static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2085{
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089};
0855e32b
NS		 2090
2091static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2092{
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
99059e56 2100 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102};
0855e32b 2103
5e681ec4
PB		 2104#ifdef FOUR_WORD_PLT
2105
252b5132
RH		 2106/* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
59f2c4e7 2108 called before the relocation has been set up calls the dynamic
9b485d32 2109 linker first. */
e5a52504 2110static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2111{
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116};
5e681ec4
PB		 2117
2118/* Subsequent entries in a procedure linkage table look like
2119 this. */
e5a52504 2120static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2121{
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126};
5e681ec4 2127
eed94f8f 2128#else /* not FOUR_WORD_PLT */
5e681ec4 2129
5e681ec4
PB		 2130/* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
e5a52504 2134static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2135{
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141};
252b5132 2142
1db37fe6
YG		 2143/* By default subsequent entries in a procedure linkage table look like
2144 this. Offsets that don't fit into 28 bits will cause link error. */
2145static const bfd_vma elf32_arm_plt_entry_short [] =
b38cadfb
NC		 2146{
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150};
5e681ec4 2151
1db37fe6
YG		 2152/* When explicitly asked, we'll use this "long" entry format
2153 which can cope with arbitrary displacements. */
2154static const bfd_vma elf32_arm_plt_entry_long [] =
2155{
2156 0xe28fc200, /* add ip, pc, #0xN0000000 */
2157 0xe28cc600, /* add ip, ip, #0xNN00000 */
2158 0xe28cca00, /* add ip, ip, #0xNN000 */
2159 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2160};
2161
2162static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2163
eed94f8f
NC		 2164#endif /* not FOUR_WORD_PLT */
2165
2166/* The first entry in a procedure linkage table looks like this.
2167 It is set up so that any shared library function that is called before the
2168 relocation has been set up calls the dynamic linker first. */
2169static const bfd_vma elf32_thumb2_plt0_entry [] =
2170{
2171 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2172 an instruction maybe encoded to one or two array elements. */
2173 0xf8dfb500, /* push {lr} */
2174 0x44fee008, /* ldr.w lr, [pc, #8] */
469a3493 2175 /* add lr, pc */
eed94f8f
NC		 2176 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2177 0x00000000, /* &GOT[0] - . */
2178};
2179
2180/* Subsequent entries in a procedure linkage table for thumb only target
2181 look like this. */
2182static const bfd_vma elf32_thumb2_plt_entry [] =
2183{
2184 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2185 an instruction maybe encoded to one or two array elements. */
2186 0x0c00f240, /* movw ip, #0xNNNN */
2187 0x0c00f2c0, /* movt ip, #0xNNNN */
2188 0xf8dc44fc, /* add ip, pc */
2189 0xbf00f000 /* ldr.w pc, [ip] */
469a3493 2190 /* nop */
eed94f8f 2191};
252b5132 2192
00a97672
RS		 2193/* The format of the first entry in the procedure linkage table
2194 for a VxWorks executable. */
2195static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2196{
2197 0xe52dc008, /* str ip,[sp,#-8]! */
2198 0xe59fc000, /* ldr ip,[pc] */
2199 0xe59cf008, /* ldr pc,[ip,#8] */
2200 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2201};
00a97672
RS		 2202
2203/* The format of subsequent entries in a VxWorks executable. */
2204static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2205{
2206 0xe59fc000, /* ldr ip,[pc] */
2207 0xe59cf000, /* ldr pc,[ip] */
2208 0x00000000, /* .long @got */
2209 0xe59fc000, /* ldr ip,[pc] */
2210 0xea000000, /* b _PLT */
2211 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2212};
00a97672
RS		 2213
2214/* The format of entries in a VxWorks shared library. */
2215static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2216{
2217 0xe59fc000, /* ldr ip,[pc] */
2218 0xe79cf009, /* ldr pc,[ip,r9] */
2219 0x00000000, /* .long @got */
2220 0xe59fc000, /* ldr ip,[pc] */
2221 0xe599f008, /* ldr pc,[r9,#8] */
2222 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2223};
00a97672 2224
b7693d02
DJ		 2225/* An initial stub used if the PLT entry is referenced from Thumb code. */
2226#define PLT_THUMB_STUB_SIZE 4
2227static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2228{
2229 0x4778, /* bx pc */
2230 0x46c0 /* nop */
2231};
b7693d02 2232
e5a52504
MM		 2233/* The entries in a PLT when using a DLL-based target with multiple
2234 address spaces. */
906e58ca 2235static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2236{
2237 0xe51ff004, /* ldr pc, [pc, #-4] */
2238 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2239};
2240
2241/* The first entry in a procedure linkage table looks like
2242 this. It is set up so that any shared library function that is
2243 called before the relocation has been set up calls the dynamic
2244 linker first. */
2245static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2246{
2247 /* First bundle: */
2248 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2249 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2250 0xe08cc00f, /* add ip, ip, pc */
2251 0xe52dc008, /* str ip, [sp, #-8]! */
2252 /* Second bundle: */
edccdf7c
RM		 2253 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2254 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2255 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2256 0xe12fff1c, /* bx ip */
b38cadfb 2257 /* Third bundle: */
edccdf7c
RM		 2258 0xe320f000, /* nop */
2259 0xe320f000, /* nop */
2260 0xe320f000, /* nop */
b38cadfb
NC		 2261 /* .Lplt_tail: */
2262 0xe50dc004, /* str ip, [sp, #-4] */
2263 /* Fourth bundle: */
edccdf7c
RM		 2264 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2265 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2266 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2267 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2268};
2269#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2270
2271/* Subsequent entries in a procedure linkage table look like this. */
2272static const bfd_vma elf32_arm_nacl_plt_entry [] =
2273{
2274 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2275 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2276 0xe08cc00f, /* add ip, ip, pc */
2277 0xea000000, /* b .Lplt_tail */
2278};
e5a52504 2279
906e58ca
NC		 2280#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2281#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2282#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2283#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2284#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2285#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
c5423981
TG		 2286#define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2287#define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
906e58ca 2288
461a49ca 2289enum stub_insn_type
b38cadfb
NC		 2290{
2291 THUMB16_TYPE = 1,
2292 THUMB32_TYPE,
2293 ARM_TYPE,
2294 DATA_TYPE
2295};
461a49ca 2296
48229727
JB		 2297#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2298/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2299 is inserted in arm_build_one_stub(). */
2300#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2301#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2302#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2303#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2304#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2305#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2306
2307typedef struct
2308{
b38cadfb
NC		 2309 bfd_vma data;
2310 enum stub_insn_type type;
2311 unsigned int r_type;
2312 int reloc_addend;
461a49ca
DJ		 2313} insn_sequence;
2314
fea2b4d6
CL		 2315/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2316 to reach the stub if necessary. */
461a49ca 2317static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2318{
2319 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2320 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2321};
906e58ca 2322
fea2b4d6
CL		 2323/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2324 available. */
461a49ca 2325static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2326{
2327 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2328 ARM_INSN (0xe12fff1c), /* bx ip */
2329 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2330};
906e58ca 2331
d3626fb0 2332/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2333static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2334{
2335 THUMB16_INSN (0xb401), /* push {r0} */
2336 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2337 THUMB16_INSN (0x4684), /* mov ip, r0 */
2338 THUMB16_INSN (0xbc01), /* pop {r0} */
2339 THUMB16_INSN (0x4760), /* bx ip */
2340 THUMB16_INSN (0xbf00), /* nop */
2341 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2342};
906e58ca 2343
d3626fb0
CL		 2344/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2345 allowed. */
2346static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2347{
2348 THUMB16_INSN (0x4778), /* bx pc */
2349 THUMB16_INSN (0x46c0), /* nop */
2350 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2351 ARM_INSN (0xe12fff1c), /* bx ip */
2352 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2353};
d3626fb0 2354
fea2b4d6
CL		 2355/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2356 available. */
461a49ca 2357static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2358{
2359 THUMB16_INSN (0x4778), /* bx pc */
2360 THUMB16_INSN (0x46c0), /* nop */
2361 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2362 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2363};
906e58ca 2364
fea2b4d6
CL		 2365/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2366 one, when the destination is close enough. */
461a49ca 2367static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2368{
2369 THUMB16_INSN (0x4778), /* bx pc */
2370 THUMB16_INSN (0x46c0), /* nop */
2371 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2372};
c820be07 2373
cf3eccff 2374/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2375 blx to reach the stub if necessary. */
cf3eccff 2376static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2377{
2378 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2379 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2380 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2381};
906e58ca 2382
cf3eccff
DJ		 2383/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2384 blx to reach the stub if necessary. We can not add into pc;
2385 it is not guaranteed to mode switch (different in ARMv6 and
2386 ARMv7). */
2387static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2388{
2389 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2390 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2391 ARM_INSN (0xe12fff1c), /* bx ip */
2392 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2393};
cf3eccff 2394
ebe24dd4
CL		 2395/* V4T ARM -> ARM long branch stub, PIC. */
2396static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2397{
2398 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2399 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2400 ARM_INSN (0xe12fff1c), /* bx ip */
2401 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2402};
ebe24dd4
CL		 2403
2404/* V4T Thumb -> ARM long branch stub, PIC. */
2405static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2406{
2407 THUMB16_INSN (0x4778), /* bx pc */
2408 THUMB16_INSN (0x46c0), /* nop */
2409 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2410 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2411 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2412};
ebe24dd4 2413
d3626fb0
CL		 2414/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2415 architectures. */
ebe24dd4 2416static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2417{
2418 THUMB16_INSN (0xb401), /* push {r0} */
2419 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2420 THUMB16_INSN (0x46fc), /* mov ip, pc */
2421 THUMB16_INSN (0x4484), /* add ip, r0 */
2422 THUMB16_INSN (0xbc01), /* pop {r0} */
2423 THUMB16_INSN (0x4760), /* bx ip */
2424 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2425};
ebe24dd4 2426
d3626fb0
CL		 2427/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2428 allowed. */
2429static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2430{
2431 THUMB16_INSN (0x4778), /* bx pc */
2432 THUMB16_INSN (0x46c0), /* nop */
2433 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2434 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2435 ARM_INSN (0xe12fff1c), /* bx ip */
2436 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2437};
d3626fb0 2438
0855e32b
NS		 2439/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2440 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2441static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2442{
b38cadfb
NC		 2443 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2444 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2445 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2446};
2447
2448/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2449 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2450static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2451{
b38cadfb
NC		 2452 THUMB16_INSN (0x4778), /* bx pc */
2453 THUMB16_INSN (0x46c0), /* nop */
2454 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2455 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2456 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2457};
2458
7a89b94e
NC		 2459/* NaCl ARM -> ARM long branch stub. */
2460static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2461{
2462 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2463 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2464 ARM_INSN (0xe12fff1c), /* bx ip */
2465 ARM_INSN (0xe320f000), /* nop */
2466 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2467 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2468 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2469 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2470};
2471
2472/* NaCl ARM -> ARM long branch stub, PIC. */
2473static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2474{
2475 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2476 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2477 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2478 ARM_INSN (0xe12fff1c), /* bx ip */
2479 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2480 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2481 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2482 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2483};
2484
2485
48229727
JB		 2486/* Cortex-A8 erratum-workaround stubs. */
2487
2488/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2489 can't use a conditional branch to reach this stub). */
2490
2491static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2492{
2493 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2494 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2495 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2496};
48229727
JB		 2497
2498/* Stub used for b.w and bl.w instructions. */
2499
2500static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2501{
2502 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2503};
48229727
JB		 2504
2505static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2506{
2507 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2508};
48229727
JB		 2509
2510/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2511 instruction (which switches to ARM mode) to point to this stub. Jump to the
2512 real destination using an ARM-mode branch. */
2513
2514static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2515{
2516 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2517};
48229727 2518
9553db3c
NC		 2519/* For each section group there can be a specially created linker section
2520 to hold the stubs for that group. The name of the stub section is based
2521 upon the name of another section within that group with the suffix below
2522 applied.
2523
2524 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2525 create what appeared to be a linker stub section when it actually
2526 contained user code/data. For example, consider this fragment:
b38cadfb 2527
9553db3c
NC		 2528 const char * stubborn_problems[] = { "np" };
2529
2530 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2531 section called:
2532
2533 .data.rel.local.stubborn_problems
2534
2535 This then causes problems in arm32_arm_build_stubs() as it triggers:
2536
2537 // Ignore non-stub sections.
2538 if (!strstr (stub_sec->name, STUB_SUFFIX))
2539 continue;
2540
2541 And so the section would be ignored instead of being processed. Hence
2542 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2543 C identifier. */
2544#define STUB_SUFFIX ".__stub"
906e58ca 2545
738a79f6
CL		 2546/* One entry per long/short branch stub defined above. */
2547#define DEF_STUBS \
2548 DEF_STUB(long_branch_any_any) \
2549 DEF_STUB(long_branch_v4t_arm_thumb) \
2550 DEF_STUB(long_branch_thumb_only) \
2551 DEF_STUB(long_branch_v4t_thumb_thumb) \
2552 DEF_STUB(long_branch_v4t_thumb_arm) \
2553 DEF_STUB(short_branch_v4t_thumb_arm) \
2554 DEF_STUB(long_branch_any_arm_pic) \
2555 DEF_STUB(long_branch_any_thumb_pic) \
2556 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2557 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2558 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2559 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2560 DEF_STUB(long_branch_any_tls_pic) \
2561 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
7a89b94e
NC		 2562 DEF_STUB(long_branch_arm_nacl) \
2563 DEF_STUB(long_branch_arm_nacl_pic) \
48229727
JB		 2564 DEF_STUB(a8_veneer_b_cond) \
2565 DEF_STUB(a8_veneer_b) \
2566 DEF_STUB(a8_veneer_bl) \
2567 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2568
2569#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2570enum elf32_arm_stub_type
2571{
906e58ca 2572 arm_stub_none,
738a79f6 2573 DEF_STUBS
6a631e86 2574 /* Note the first a8_veneer type. */
eb7c4339 2575 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2576};
2577#undef DEF_STUB
2578
2579typedef struct
2580{
d3ce72d0 2581 const insn_sequence* template_sequence;
738a79f6
CL		 2582 int template_size;
2583} stub_def;
2584
2585#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2586static const stub_def stub_definitions[] =
2587{
738a79f6
CL		 2588 {NULL, 0},
2589 DEF_STUBS
906e58ca
NC		 2590};
2591
2592struct elf32_arm_stub_hash_entry
2593{
2594 /* Base hash table entry structure. */
2595 struct bfd_hash_entry root;
2596
2597 /* The stub section. */
2598 asection *stub_sec;
2599
2600 /* Offset within stub_sec of the beginning of this stub. */
2601 bfd_vma stub_offset;
2602
2603 /* Given the symbol's value and its section we can determine its final
2604 value when building the stubs (so the stub knows where to jump). */
2605 bfd_vma target_value;
2606 asection *target_section;
2607
48229727
JB		 2608 /* Offset to apply to relocation referencing target_value. */
2609 bfd_vma target_addend;
2610
2611 /* The instruction which caused this stub to be generated (only valid for
2612 Cortex-A8 erratum workaround stubs at present). */
2613 unsigned long orig_insn;
2614
461a49ca 2615 /* The stub type. */
906e58ca 2616 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2617 /* Its encoding size in bytes. */
2618 int stub_size;
2619 /* Its template. */
2620 const insn_sequence *stub_template;
2621 /* The size of the template (number of entries). */
2622 int stub_template_size;
906e58ca
NC		 2623
2624 /* The symbol table entry, if any, that this was derived from. */
2625 struct elf32_arm_link_hash_entry *h;
2626
35fc36a8
RS		 2627 /* Type of branch. */
2628 enum arm_st_branch_type branch_type;
906e58ca
NC		 2629
2630 /* Where this stub is being called from, or, in the case of combined
2631 stub sections, the first input section in the group. */
2632 asection *id_sec;
7413f23f
DJ		 2633
2634 /* The name for the local symbol at the start of this stub. The
2635 stub name in the hash table has to be unique; this does not, so
2636 it can be friendlier. */
2637 char *output_name;
906e58ca
NC		 2638};
2639
e489d0ae
PB		 2640/* Used to build a map of a section. This is required for mixed-endian
2641 code/data. */
2642
2643typedef struct elf32_elf_section_map
2644{
2645 bfd_vma vma;
2646 char type;
2647}
2648elf32_arm_section_map;
2649
c7b8f16e
JB		 2650/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2651
2652typedef enum
2653{
2654 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2655 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2656 VFP11_ERRATUM_ARM_VENEER,
2657 VFP11_ERRATUM_THUMB_VENEER
2658}
2659elf32_vfp11_erratum_type;
2660
2661typedef struct elf32_vfp11_erratum_list
2662{
2663 struct elf32_vfp11_erratum_list *next;
2664 bfd_vma vma;
2665 union
2666 {
2667 struct
2668 {
2669 struct elf32_vfp11_erratum_list *veneer;
2670 unsigned int vfp_insn;
2671 } b;
2672 struct
2673 {
2674 struct elf32_vfp11_erratum_list *branch;
2675 unsigned int id;
2676 } v;
2677 } u;
2678 elf32_vfp11_erratum_type type;
2679}
2680elf32_vfp11_erratum_list;
2681
2468f9c9
PB		 2682typedef enum
2683{
2684 DELETE_EXIDX_ENTRY,
2685 INSERT_EXIDX_CANTUNWIND_AT_END
2686}
2687arm_unwind_edit_type;
2688
2689/* A (sorted) list of edits to apply to an unwind table. */
2690typedef struct arm_unwind_table_edit
2691{
2692 arm_unwind_edit_type type;
2693 /* Note: we sometimes want to insert an unwind entry corresponding to a
2694 section different from the one we're currently writing out, so record the
2695 (text) section this edit relates to here. */
2696 asection *linked_section;
2697 unsigned int index;
2698 struct arm_unwind_table_edit *next;
2699}
2700arm_unwind_table_edit;
2701
8e3de13a 2702typedef struct _arm_elf_section_data
e489d0ae 2703{
2468f9c9 2704 /* Information about mapping symbols. */
e489d0ae 2705 struct bfd_elf_section_data elf;
8e3de13a 2706 unsigned int mapcount;
c7b8f16e 2707 unsigned int mapsize;
e489d0ae 2708 elf32_arm_section_map *map;
2468f9c9 2709 /* Information about CPU errata. */
c7b8f16e
JB		 2710 unsigned int erratumcount;
2711 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2712 /* Information about unwind tables. */
2713 union
2714 {
2715 /* Unwind info attached to a text section. */
2716 struct
2717 {
2718 asection *arm_exidx_sec;
2719 } text;
2720
2721 /* Unwind info attached to an .ARM.exidx section. */
2722 struct
2723 {
2724 arm_unwind_table_edit *unwind_edit_list;
2725 arm_unwind_table_edit *unwind_edit_tail;
2726 } exidx;
2727 } u;
8e3de13a
NC		 2728}
2729_arm_elf_section_data;
e489d0ae
PB		 2730
2731#define elf32_arm_section_data(sec) \
8e3de13a 2732 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2733
48229727
JB		 2734/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2735 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2736 so may be created multiple times: we use an array of these entries whilst
2737 relaxing which we can refresh easily, then create stubs for each potentially
2738 erratum-triggering instruction once we've settled on a solution. */
2739
b38cadfb
NC		 2740struct a8_erratum_fix
2741{
48229727
JB		 2742 bfd *input_bfd;
2743 asection *section;
2744 bfd_vma offset;
2745 bfd_vma addend;
2746 unsigned long orig_insn;
2747 char *stub_name;
2748 enum elf32_arm_stub_type stub_type;
35fc36a8 2749 enum arm_st_branch_type branch_type;
48229727
JB		 2750};
2751
2752/* A table of relocs applied to branches which might trigger Cortex-A8
2753 erratum. */
2754
b38cadfb
NC		 2755struct a8_erratum_reloc
2756{
48229727
JB		 2757 bfd_vma from;
2758 bfd_vma destination;
92750f34
DJ		 2759 struct elf32_arm_link_hash_entry *hash;
2760 const char *sym_name;
48229727 2761 unsigned int r_type;
35fc36a8 2762 enum arm_st_branch_type branch_type;
48229727
JB		 2763 bfd_boolean non_a8_stub;
2764};
2765
ba93b8ac
DJ		 2766/* The size of the thread control block. */
2767#define TCB_SIZE 8
2768
34e77a92
RS		 2769/* ARM-specific information about a PLT entry, over and above the usual
2770 gotplt_union. */
b38cadfb
NC		 2771struct arm_plt_info
2772{
34e77a92
RS		 2773 /* We reference count Thumb references to a PLT entry separately,
2774 so that we can emit the Thumb trampoline only if needed. */
2775 bfd_signed_vma thumb_refcount;
2776
2777 /* Some references from Thumb code may be eliminated by BL->BLX
2778 conversion, so record them separately. */
2779 bfd_signed_vma maybe_thumb_refcount;
2780
2781 /* How many of the recorded PLT accesses were from non-call relocations.
2782 This information is useful when deciding whether anything takes the
2783 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2784 non-call references to the function should resolve directly to the
2785 real runtime target. */
2786 unsigned int noncall_refcount;
2787
2788 /* Since PLT entries have variable size if the Thumb prologue is
2789 used, we need to record the index into .got.plt instead of
2790 recomputing it from the PLT offset. */
2791 bfd_signed_vma got_offset;
2792};
2793
2794/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2795struct arm_local_iplt_info
2796{
34e77a92
RS		 2797 /* The information that is usually found in the generic ELF part of
2798 the hash table entry. */
2799 union gotplt_union root;
2800
2801 /* The information that is usually found in the ARM-specific part of
2802 the hash table entry. */
2803 struct arm_plt_info arm;
2804
2805 /* A list of all potential dynamic relocations against this symbol. */
2806 struct elf_dyn_relocs *dyn_relocs;
2807};
2808
0ffa91dd 2809struct elf_arm_obj_tdata
ba93b8ac
DJ		 2810{
2811 struct elf_obj_tdata root;
2812
2813 /* tls_type for each local got entry. */
2814 char *local_got_tls_type;
ee065d83 2815
0855e32b
NS		 2816 /* GOTPLT entries for TLS descriptors. */
2817 bfd_vma *local_tlsdesc_gotent;
2818
34e77a92
RS		 2819 /* Information for local symbols that need entries in .iplt. */
2820 struct arm_local_iplt_info **local_iplt;
2821
bf21ed78
MS		 2822 /* Zero to warn when linking objects with incompatible enum sizes. */
2823 int no_enum_size_warning;
a9dc9481
JM		 2824
2825 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2826 int no_wchar_size_warning;
ba93b8ac
DJ		 2827};
2828
0ffa91dd
NC		 2829#define elf_arm_tdata(bfd) \
2830 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2831
0ffa91dd
NC		 2832#define elf32_arm_local_got_tls_type(bfd) \
2833 (elf_arm_tdata (bfd)->local_got_tls_type)
2834
0855e32b
NS		 2835#define elf32_arm_local_tlsdesc_gotent(bfd) \
2836 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2837
34e77a92
RS		 2838#define elf32_arm_local_iplt(bfd) \
2839 (elf_arm_tdata (bfd)->local_iplt)
2840
0ffa91dd
NC		 2841#define is_arm_elf(bfd) \
2842 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2843 && elf_tdata (bfd) != NULL \
4dfe6ac6 2844 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2845
2846static bfd_boolean
2847elf32_arm_mkobject (bfd *abfd)
2848{
0ffa91dd 2849 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2850 ARM_ELF_DATA);
ba93b8ac
DJ		 2851}
2852
ba93b8ac
DJ		 2853#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2854
ba96a88f 2855/* Arm ELF linker hash entry. */
252b5132 2856struct elf32_arm_link_hash_entry
b38cadfb
NC		 2857{
2858 struct elf_link_hash_entry root;
252b5132 2859
b38cadfb
NC		 2860 /* Track dynamic relocs copied for this symbol. */
2861 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2862
b38cadfb
NC		 2863 /* ARM-specific PLT information. */
2864 struct arm_plt_info plt;
ba93b8ac
DJ		 2865
2866#define GOT_UNKNOWN 0
2867#define GOT_NORMAL 1
2868#define GOT_TLS_GD 2
2869#define GOT_TLS_IE 4
0855e32b
NS		 2870#define GOT_TLS_GDESC 8
2871#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2872 unsigned int tls_type : 8;
34e77a92 2873
b38cadfb
NC		 2874 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2875 unsigned int is_iplt : 1;
34e77a92 2876
b38cadfb 2877 unsigned int unused : 23;
a4fd1a8e 2878
b38cadfb
NC		 2879 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2880 starting at the end of the jump table. */
2881 bfd_vma tlsdesc_got;
0855e32b 2882
b38cadfb
NC		 2883 /* The symbol marking the real symbol location for exported thumb
2884 symbols with Arm stubs. */
2885 struct elf_link_hash_entry *export_glue;
906e58ca 2886
b38cadfb 2887 /* A pointer to the most recently used stub hash entry against this
8029a119 2888 symbol. */
b38cadfb
NC		 2889 struct elf32_arm_stub_hash_entry *stub_cache;
2890};
252b5132 2891
252b5132 2892/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2893#define elf32_arm_link_hash_traverse(table, func, info) \
2894 (elf_link_hash_traverse \
2895 (&(table)->root, \
b7693d02 2896 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2897 (info)))
2898
2899/* Get the ARM elf linker hash table from a link_info structure. */
2900#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2901 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2902 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2903
906e58ca
NC		 2904#define arm_stub_hash_lookup(table, string, create, copy) \
2905 ((struct elf32_arm_stub_hash_entry *) \
2906 bfd_hash_lookup ((table), (string), (create), (copy)))
2907
21d799b5
NC		 2908/* Array to keep track of which stub sections have been created, and
2909 information on stub grouping. */
2910struct map_stub
2911{
2912 /* This is the section to which stubs in the group will be
2913 attached. */
2914 asection *link_sec;
2915 /* The stub section. */
2916 asection *stub_sec;
2917};
2918
0855e32b
NS		 2919#define elf32_arm_compute_jump_table_size(htab) \
2920 ((htab)->next_tls_desc_index * 4)
2921
9b485d32 2922/* ARM ELF linker hash table. */
252b5132 2923struct elf32_arm_link_hash_table
906e58ca
NC		 2924{
2925 /* The main hash table. */
2926 struct elf_link_hash_table root;
252b5132 2927
906e58ca
NC		 2928 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2929 bfd_size_type thumb_glue_size;
252b5132 2930
906e58ca
NC		 2931 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2932 bfd_size_type arm_glue_size;
252b5132 2933
906e58ca
NC		 2934 /* The size in bytes of section containing the ARMv4 BX veneers. */
2935 bfd_size_type bx_glue_size;
845b51d6 2936
906e58ca
NC		 2937 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2938 veneer has been populated. */
2939 bfd_vma bx_glue_offset[15];
845b51d6 2940
906e58ca
NC		 2941 /* The size in bytes of the section containing glue for VFP11 erratum
2942 veneers. */
2943 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2944
48229727
JB		 2945 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2946 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2947 elf32_arm_write_section(). */
2948 struct a8_erratum_fix *a8_erratum_fixes;
2949 unsigned int num_a8_erratum_fixes;
2950
906e58ca
NC		 2951 /* An arbitrary input BFD chosen to hold the glue sections. */
2952 bfd * bfd_of_glue_owner;
ba96a88f 2953
906e58ca
NC		 2954 /* Nonzero to output a BE8 image. */
2955 int byteswap_code;
e489d0ae 2956
906e58ca
NC		 2957 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2958 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2959 int target1_is_rel;
9c504268 2960
906e58ca
NC		 2961 /* The relocation to use for R_ARM_TARGET2 relocations. */
2962 int target2_reloc;
eb043451 2963
906e58ca
NC		 2964 /* 0 = Ignore R_ARM_V4BX.
2965 1 = Convert BX to MOV PC.
2966 2 = Generate v4 interworing stubs. */
2967 int fix_v4bx;
319850b4 2968
48229727
JB		 2969 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2970 int fix_cortex_a8;
2971
2de70689
MGD		 2972 /* Whether we should fix the ARM1176 BLX immediate issue. */
2973 int fix_arm1176;
2974
906e58ca
NC		 2975 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2976 int use_blx;
33bfe774 2977
906e58ca
NC		 2978 /* What sort of code sequences we should look for which may trigger the
2979 VFP11 denorm erratum. */
2980 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2981
906e58ca
NC		 2982 /* Global counter for the number of fixes we have emitted. */
2983 int num_vfp11_fixes;
c7b8f16e 2984
906e58ca
NC		 2985 /* Nonzero to force PIC branch veneers. */
2986 int pic_veneer;
27e55c4d 2987
906e58ca
NC		 2988 /* The number of bytes in the initial entry in the PLT. */
2989 bfd_size_type plt_header_size;
e5a52504 2990
906e58ca
NC		 2991 /* The number of bytes in the subsequent PLT etries. */
2992 bfd_size_type plt_entry_size;
e5a52504 2993
906e58ca
NC		 2994 /* True if the target system is VxWorks. */
2995 int vxworks_p;
00a97672 2996
906e58ca
NC		 2997 /* True if the target system is Symbian OS. */
2998 int symbian_p;
e5a52504 2999
b38cadfb
NC		 3000 /* True if the target system is Native Client. */
3001 int nacl_p;
3002
906e58ca
NC		 3003 /* True if the target uses REL relocations. */
3004 int use_rel;
4e7fd91e 3005
0855e32b
NS		 3006 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3007 bfd_vma next_tls_desc_index;
3008
3009 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3010 bfd_vma num_tls_desc;
3011
906e58ca 3012 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 3013 asection *sdynbss;
3014 asection *srelbss;
5e681ec4 3015
906e58ca
NC		 3016 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3017 asection *srelplt2;
00a97672 3018
0855e32b
NS		 3019 /* The offset into splt of the PLT entry for the TLS descriptor
3020 resolver. Special values are 0, if not necessary (or not found
3021 to be necessary yet), and -1 if needed but not determined
3022 yet. */
3023 bfd_vma dt_tlsdesc_plt;
3024
3025 /* The offset into sgot of the GOT entry used by the PLT entry
3026 above. */
b38cadfb 3027 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 3028
3029 /* Offset in .plt section of tls_arm_trampoline. */
3030 bfd_vma tls_trampoline;
3031
906e58ca
NC		 3032 /* Data for R_ARM_TLS_LDM32 relocations. */
3033 union
3034 {
3035 bfd_signed_vma refcount;
3036 bfd_vma offset;
3037 } tls_ldm_got;
b7693d02 3038
87d72d41
AM		 3039 /* Small local sym cache. */
3040 struct sym_cache sym_cache;
906e58ca
NC		 3041
3042 /* For convenience in allocate_dynrelocs. */
3043 bfd * obfd;
3044
0855e32b
NS		 3045 /* The amount of space used by the reserved portion of the sgotplt
3046 section, plus whatever space is used by the jump slots. */
3047 bfd_vma sgotplt_jump_table_size;
3048
906e58ca
NC		 3049 /* The stub hash table. */
3050 struct bfd_hash_table stub_hash_table;
3051
3052 /* Linker stub bfd. */
3053 bfd *stub_bfd;
3054
3055 /* Linker call-backs. */
7a89b94e 3056 asection * (*add_stub_section) (const char *, asection *, unsigned int);
906e58ca
NC		 3057 void (*layout_sections_again) (void);
3058
3059 /* Array to keep track of which stub sections have been created, and
3060 information on stub grouping. */
21d799b5 3061 struct map_stub *stub_group;
906e58ca 3062
fe33d2fa 3063 /* Number of elements in stub_group. */
7292b3ac 3064 unsigned int top_id;
fe33d2fa 3065
906e58ca
NC		 3066 /* Assorted information used by elf32_arm_size_stubs. */
3067 unsigned int bfd_count;
7292b3ac 3068 unsigned int top_index;
906e58ca
NC		 3069 asection **input_list;
3070};
252b5132 3071
780a67af
NC		 3072/* Create an entry in an ARM ELF linker hash table. */
3073
3074static struct bfd_hash_entry *
57e8b36a 3075elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
99059e56
RM		 3076 struct bfd_hash_table * table,
3077 const char * string)
780a67af
NC		 3078{
3079 struct elf32_arm_link_hash_entry * ret =
3080 (struct elf32_arm_link_hash_entry *) entry;
3081
3082 /* Allocate the structure if it has not already been allocated by a
3083 subclass. */
906e58ca 3084 if (ret == NULL)
21d799b5 3085 ret = (struct elf32_arm_link_hash_entry *)
99059e56 3086 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3087 if (ret == NULL)
780a67af
NC		 3088 return (struct bfd_hash_entry *) ret;
3089
3090 /* Call the allocation method of the superclass. */
3091 ret = ((struct elf32_arm_link_hash_entry *)
3092 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3093 table, string));
57e8b36a 3094 if (ret != NULL)
b7693d02 3095 {
0bdcacaf 3096 ret->dyn_relocs = NULL;
ba93b8ac 3097 ret->tls_type = GOT_UNKNOWN;
0855e32b 3098 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3099 ret->plt.thumb_refcount = 0;
3100 ret->plt.maybe_thumb_refcount = 0;
3101 ret->plt.noncall_refcount = 0;
3102 ret->plt.got_offset = -1;
3103 ret->is_iplt = FALSE;
a4fd1a8e 3104 ret->export_glue = NULL;
906e58ca
NC		 3105
3106 ret->stub_cache = NULL;
b7693d02 3107 }
780a67af
NC		 3108
3109 return (struct bfd_hash_entry *) ret;
3110}
3111
34e77a92
RS		 3112/* Ensure that we have allocated bookkeeping structures for ABFD's local
3113 symbols. */
3114
3115static bfd_boolean
3116elf32_arm_allocate_local_sym_info (bfd *abfd)
3117{
3118 if (elf_local_got_refcounts (abfd) == NULL)
3119 {
3120 bfd_size_type num_syms;
3121 bfd_size_type size;
3122 char *data;
3123
3124 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3125 size = num_syms * (sizeof (bfd_signed_vma)
3126 + sizeof (struct arm_local_iplt_info *)
3127 + sizeof (bfd_vma)
3128 + sizeof (char));
3129 data = bfd_zalloc (abfd, size);
3130 if (data == NULL)
3131 return FALSE;
3132
3133 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3134 data += num_syms * sizeof (bfd_signed_vma);
3135
3136 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3137 data += num_syms * sizeof (struct arm_local_iplt_info *);
3138
3139 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3140 data += num_syms * sizeof (bfd_vma);
3141
3142 elf32_arm_local_got_tls_type (abfd) = data;
3143 }
3144 return TRUE;
3145}
3146
3147/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3148 to input bfd ABFD. Create the information if it doesn't already exist.
3149 Return null if an allocation fails. */
3150
3151static struct arm_local_iplt_info *
3152elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3153{
3154 struct arm_local_iplt_info **ptr;
3155
3156 if (!elf32_arm_allocate_local_sym_info (abfd))
3157 return NULL;
3158
3159 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3160 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3161 if (*ptr == NULL)
3162 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3163 return *ptr;
3164}
3165
3166/* Try to obtain PLT information for the symbol with index R_SYMNDX
3167 in ABFD's symbol table. If the symbol is global, H points to its
3168 hash table entry, otherwise H is null.
3169
3170 Return true if the symbol does have PLT information. When returning
3171 true, point *ROOT_PLT at the target-independent reference count/offset
3172 union and *ARM_PLT at the ARM-specific information. */
3173
3174static bfd_boolean
3175elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3176 unsigned long r_symndx, union gotplt_union **root_plt,
3177 struct arm_plt_info **arm_plt)
3178{
3179 struct arm_local_iplt_info *local_iplt;
3180
3181 if (h != NULL)
3182 {
3183 *root_plt = &h->root.plt;
3184 *arm_plt = &h->plt;
3185 return TRUE;
3186 }
3187
3188 if (elf32_arm_local_iplt (abfd) == NULL)
3189 return FALSE;
3190
3191 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3192 if (local_iplt == NULL)
3193 return FALSE;
3194
3195 *root_plt = &local_iplt->root;
3196 *arm_plt = &local_iplt->arm;
3197 return TRUE;
3198}
3199
3200/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3201 before it. */
3202
3203static bfd_boolean
3204elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3205 struct arm_plt_info *arm_plt)
3206{
3207 struct elf32_arm_link_hash_table *htab;
3208
3209 htab = elf32_arm_hash_table (info);
3210 return (arm_plt->thumb_refcount != 0
3211 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3212}
3213
3214/* Return a pointer to the head of the dynamic reloc list that should
3215 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3216 ABFD's symbol table. Return null if an error occurs. */
3217
3218static struct elf_dyn_relocs **
3219elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3220 Elf_Internal_Sym *isym)
3221{
3222 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3223 {
3224 struct arm_local_iplt_info *local_iplt;
3225
3226 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3227 if (local_iplt == NULL)
3228 return NULL;
3229 return &local_iplt->dyn_relocs;
3230 }
3231 else
3232 {
3233 /* Track dynamic relocs needed for local syms too.
3234 We really need local syms available to do this
3235 easily. Oh well. */
3236 asection *s;
3237 void *vpp;
3238
3239 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3240 if (s == NULL)
3241 abort ();
3242
3243 vpp = &elf_section_data (s)->local_dynrel;
3244 return (struct elf_dyn_relocs **) vpp;
3245 }
3246}
3247
906e58ca
NC		 3248/* Initialize an entry in the stub hash table. */
3249
3250static struct bfd_hash_entry *
3251stub_hash_newfunc (struct bfd_hash_entry *entry,
3252 struct bfd_hash_table *table,
3253 const char *string)
3254{
3255 /* Allocate the structure if it has not already been allocated by a
3256 subclass. */
3257 if (entry == NULL)
3258 {
21d799b5 3259 entry = (struct bfd_hash_entry *)
99059e56 3260 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3261 if (entry == NULL)
3262 return entry;
3263 }
3264
3265 /* Call the allocation method of the superclass. */
3266 entry = bfd_hash_newfunc (entry, table, string);
3267 if (entry != NULL)
3268 {
3269 struct elf32_arm_stub_hash_entry *eh;
3270
3271 /* Initialize the local fields. */
3272 eh = (struct elf32_arm_stub_hash_entry *) entry;
3273 eh->stub_sec = NULL;
3274 eh->stub_offset = 0;
3275 eh->target_value = 0;
3276 eh->target_section = NULL;
cedfb179
DK		 3277 eh->target_addend = 0;
3278 eh->orig_insn = 0;
906e58ca 3279 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3280 eh->stub_size = 0;
3281 eh->stub_template = NULL;
3282 eh->stub_template_size = 0;
906e58ca
NC		 3283 eh->h = NULL;
3284 eh->id_sec = NULL;
d8d2f433 3285 eh->output_name = NULL;
906e58ca
NC		 3286 }
3287
3288 return entry;
3289}
3290
00a97672 3291/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3292 shortcuts to them in our hash table. */
3293
3294static bfd_boolean
57e8b36a 3295create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3296{
3297 struct elf32_arm_link_hash_table *htab;
3298
e5a52504 3299 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3300 if (htab == NULL)
3301 return FALSE;
3302
e5a52504
MM		 3303 /* BPABI objects never have a GOT, or associated sections. */
3304 if (htab->symbian_p)
3305 return TRUE;
3306
5e681ec4
PB		 3307 if (! _bfd_elf_create_got_section (dynobj, info))
3308 return FALSE;
3309
5e681ec4
PB		 3310 return TRUE;
3311}
3312
34e77a92
RS		 3313/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3314
3315static bfd_boolean
3316create_ifunc_sections (struct bfd_link_info *info)
3317{
3318 struct elf32_arm_link_hash_table *htab;
3319 const struct elf_backend_data *bed;
3320 bfd *dynobj;
3321 asection *s;
3322 flagword flags;
b38cadfb 3323
34e77a92
RS		 3324 htab = elf32_arm_hash_table (info);
3325 dynobj = htab->root.dynobj;
3326 bed = get_elf_backend_data (dynobj);
3327 flags = bed->dynamic_sec_flags;
3328
3329 if (htab->root.iplt == NULL)
3330 {
3d4d4302
AM		 3331 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3332 flags | SEC_READONLY | SEC_CODE);
34e77a92 3333 if (s == NULL
a0f49396 3334 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3335 return FALSE;
3336 htab->root.iplt = s;
3337 }
3338
3339 if (htab->root.irelplt == NULL)
3340 {
3d4d4302
AM		 3341 s = bfd_make_section_anyway_with_flags (dynobj,
3342 RELOC_SECTION (htab, ".iplt"),
3343 flags | SEC_READONLY);
34e77a92 3344 if (s == NULL
a0f49396 3345 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3346 return FALSE;
3347 htab->root.irelplt = s;
3348 }
3349
3350 if (htab->root.igotplt == NULL)
3351 {
3d4d4302 3352 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3353 if (s == NULL
3354 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3355 return FALSE;
3356 htab->root.igotplt = s;
3357 }
3358 return TRUE;
3359}
3360
eed94f8f
NC		 3361/* Determine if we're dealing with a Thumb only architecture. */
3362
3363static bfd_boolean
3364using_thumb_only (struct elf32_arm_link_hash_table *globals)
3365{
3366 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3367 Tag_CPU_arch);
3368 int profile;
3369
3370 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3371 return TRUE;
3372
3373 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3374 return FALSE;
3375
3376 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3377 Tag_CPU_arch_profile);
3378
3379 return profile == 'M';
3380}
3381
3382/* Determine if we're dealing with a Thumb-2 object. */
3383
3384static bfd_boolean
3385using_thumb2 (struct elf32_arm_link_hash_table *globals)
3386{
3387 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3388 Tag_CPU_arch);
3389 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3390}
3391
00a97672
RS		 3392/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3393 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3394 hash table. */
3395
3396static bfd_boolean
57e8b36a 3397elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3398{
3399 struct elf32_arm_link_hash_table *htab;
3400
3401 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3402 if (htab == NULL)
3403 return FALSE;
3404
362d30a1 3405 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3406 return FALSE;
3407
3408 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3409 return FALSE;
3410
3d4d4302 3411 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
0e1862bb 3412 if (!bfd_link_pic (info))
3d4d4302
AM		 3413 htab->srelbss = bfd_get_linker_section (dynobj,
3414 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3415
3416 if (htab->vxworks_p)
3417 {
3418 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3419 return FALSE;
3420
0e1862bb 3421 if (bfd_link_pic (info))
00a97672
RS		 3422 {
3423 htab->plt_header_size = 0;
3424 htab->plt_entry_size
3425 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3426 }
3427 else
3428 {
3429 htab->plt_header_size
3430 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3431 htab->plt_entry_size
3432 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3433 }
3434 }
eed94f8f
NC		 3435 else
3436 {
3437 /* PR ld/16017
3438 Test for thumb only architectures. Note - we cannot just call
3439 using_thumb_only() as the attributes in the output bfd have not been
3440 initialised at this point, so instead we use the input bfd. */
3441 bfd * saved_obfd = htab->obfd;
3442
3443 htab->obfd = dynobj;
3444 if (using_thumb_only (htab))
3445 {
3446 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3447 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3448 }
3449 htab->obfd = saved_obfd;
3450 }
5e681ec4 3451
362d30a1
RS		 3452 if (!htab->root.splt
3453 || !htab->root.srelplt
e5a52504 3454 || !htab->sdynbss
0e1862bb 3455 || (!bfd_link_pic (info) && !htab->srelbss))
5e681ec4
PB		 3456 abort ();
3457
3458 return TRUE;
3459}
3460
906e58ca
NC		 3461/* Copy the extra info we tack onto an elf_link_hash_entry. */
3462
3463static void
3464elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3465 struct elf_link_hash_entry *dir,
3466 struct elf_link_hash_entry *ind)
3467{
3468 struct elf32_arm_link_hash_entry *edir, *eind;
3469
3470 edir = (struct elf32_arm_link_hash_entry *) dir;
3471 eind = (struct elf32_arm_link_hash_entry *) ind;
3472
0bdcacaf 3473 if (eind->dyn_relocs != NULL)
906e58ca 3474 {
0bdcacaf 3475 if (edir->dyn_relocs != NULL)
906e58ca 3476 {
0bdcacaf
RS		 3477 struct elf_dyn_relocs **pp;
3478 struct elf_dyn_relocs *p;
906e58ca
NC		 3479
3480 /* Add reloc counts against the indirect sym to the direct sym
3481 list. Merge any entries against the same section. */
0bdcacaf 3482 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3483 {
0bdcacaf 3484 struct elf_dyn_relocs *q;
906e58ca 3485
0bdcacaf
RS		 3486 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3487 if (q->sec == p->sec)
906e58ca
NC		 3488 {
3489 q->pc_count += p->pc_count;
3490 q->count += p->count;
3491 *pp = p->next;
3492 break;
3493 }
3494 if (q == NULL)
3495 pp = &p->next;
3496 }
0bdcacaf 3497 *pp = edir->dyn_relocs;
906e58ca
NC		 3498 }
3499
0bdcacaf
RS		 3500 edir->dyn_relocs = eind->dyn_relocs;
3501 eind->dyn_relocs = NULL;
906e58ca
NC		 3502 }
3503
3504 if (ind->root.type == bfd_link_hash_indirect)
3505 {
3506 /* Copy over PLT info. */
34e77a92
RS		 3507 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3508 eind->plt.thumb_refcount = 0;
3509 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3510 eind->plt.maybe_thumb_refcount = 0;
3511 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3512 eind->plt.noncall_refcount = 0;
3513
3514 /* We should only allocate a function to .iplt once the final
3515 symbol information is known. */
3516 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3517
3518 if (dir->got.refcount <= 0)
3519 {
3520 edir->tls_type = eind->tls_type;
3521 eind->tls_type = GOT_UNKNOWN;
3522 }
3523 }
3524
3525 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3526}
3527
68faa637
AM		 3528/* Destroy an ARM elf linker hash table. */
3529
3530static void
d495ab0d 3531elf32_arm_link_hash_table_free (bfd *obfd)
68faa637
AM		 3532{
3533 struct elf32_arm_link_hash_table *ret
d495ab0d 3534 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
68faa637
AM		 3535
3536 bfd_hash_table_free (&ret->stub_hash_table);
d495ab0d 3537 _bfd_elf_link_hash_table_free (obfd);
68faa637
AM		 3538}
3539
906e58ca
NC		 3540/* Create an ARM elf linker hash table. */
3541
3542static struct bfd_link_hash_table *
3543elf32_arm_link_hash_table_create (bfd *abfd)
3544{
3545 struct elf32_arm_link_hash_table *ret;
3546 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3547
7bf52ea2 3548 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
906e58ca
NC		 3549 if (ret == NULL)
3550 return NULL;
3551
3552 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3553 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3554 sizeof (struct elf32_arm_link_hash_entry),
3555 ARM_ELF_DATA))
906e58ca
NC		 3556 {
3557 free (ret);
3558 return NULL;
3559 }
3560
906e58ca 3561 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
906e58ca
NC		 3562#ifdef FOUR_WORD_PLT
3563 ret->plt_header_size = 16;
3564 ret->plt_entry_size = 16;
3565#else
3566 ret->plt_header_size = 20;
1db37fe6 3567 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
906e58ca 3568#endif
906e58ca 3569 ret->use_rel = 1;
906e58ca 3570 ret->obfd = abfd;
906e58ca
NC		 3571
3572 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3573 sizeof (struct elf32_arm_stub_hash_entry)))
3574 {
d495ab0d 3575 _bfd_elf_link_hash_table_free (abfd);
906e58ca
NC		 3576 return NULL;
3577 }
d495ab0d 3578 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
906e58ca
NC		 3579
3580 return &ret->root.root;
3581}
3582
cd1dac3d
DG		 3583/* Determine what kind of NOPs are available. */
3584
3585static bfd_boolean
3586arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3587{
3588 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3589 Tag_CPU_arch);
3590 return arch == TAG_CPU_ARCH_V6T2
3591 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3592 || arch == TAG_CPU_ARCH_V7
3593 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3594}
3595
3596static bfd_boolean
3597arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3598{
3599 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3600 Tag_CPU_arch);
9e3c6df6
PB		 3601 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3602 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3603}
3604
f4ac8484
DJ		 3605static bfd_boolean
3606arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3607{
3608 switch (stub_type)
3609 {
fea2b4d6
CL		 3610 case arm_stub_long_branch_thumb_only:
3611 case arm_stub_long_branch_v4t_thumb_arm:
3612 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3613 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3614 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3615 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3616 return TRUE;
3617 case arm_stub_none:
3618 BFD_FAIL ();
3619 return FALSE;
3620 break;
3621 default:
3622 return FALSE;
3623 }
3624}
3625
906e58ca
NC		 3626/* Determine the type of stub needed, if any, for a call. */
3627
3628static enum elf32_arm_stub_type
3629arm_type_of_stub (struct bfd_link_info *info,
3630 asection *input_sec,
3631 const Elf_Internal_Rela *rel,
34e77a92 3632 unsigned char st_type,
35fc36a8 3633 enum arm_st_branch_type *actual_branch_type,
906e58ca 3634 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3635 bfd_vma destination,
3636 asection *sym_sec,
3637 bfd *input_bfd,
3638 const char *name)
906e58ca
NC		 3639{
3640 bfd_vma location;
3641 bfd_signed_vma branch_offset;
3642 unsigned int r_type;
3643 struct elf32_arm_link_hash_table * globals;
3644 int thumb2;
3645 int thumb_only;
3646 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3647 int use_plt = 0;
35fc36a8 3648 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3649 union gotplt_union *root_plt;
3650 struct arm_plt_info *arm_plt;
906e58ca 3651
35fc36a8 3652 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3653 return stub_type;
3654
906e58ca 3655 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3656 if (globals == NULL)
3657 return stub_type;
906e58ca
NC		 3658
3659 thumb_only = using_thumb_only (globals);
3660
3661 thumb2 = using_thumb2 (globals);
3662
3663 /* Determine where the call point is. */
3664 location = (input_sec->output_offset
3665 + input_sec->output_section->vma
3666 + rel->r_offset);
3667
906e58ca
NC		 3668 r_type = ELF32_R_TYPE (rel->r_info);
3669
39f21624
NC		 3670 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3671 are considering a function call relocation. */
c5423981
TG		 3672 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3673 || r_type == R_ARM_THM_JUMP19)
39f21624
NC		 3674 && branch_type == ST_BRANCH_TO_ARM)
3675 branch_type = ST_BRANCH_TO_THUMB;
3676
34e77a92
RS		 3677 /* For TLS call relocs, it is the caller's responsibility to provide
3678 the address of the appropriate trampoline. */
3679 if (r_type != R_ARM_TLS_CALL
3680 && r_type != R_ARM_THM_TLS_CALL
3681 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3682 &root_plt, &arm_plt)
3683 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3684 {
34e77a92 3685 asection *splt;
fe33d2fa 3686
34e77a92
RS		 3687 if (hash == NULL || hash->is_iplt)
3688 splt = globals->root.iplt;
3689 else
3690 splt = globals->root.splt;
3691 if (splt != NULL)
b38cadfb 3692 {
34e77a92
RS		 3693 use_plt = 1;
3694
3695 /* Note when dealing with PLT entries: the main PLT stub is in
3696 ARM mode, so if the branch is in Thumb mode, another
3697 Thumb->ARM stub will be inserted later just before the ARM
3698 PLT stub. We don't take this extra distance into account
3699 here, because if a long branch stub is needed, we'll add a
3700 Thumb->Arm one and branch directly to the ARM PLT entry
3701 because it avoids spreading offset corrections in several
3702 places. */
3703
3704 destination = (splt->output_section->vma
3705 + splt->output_offset
3706 + root_plt->offset);
3707 st_type = STT_FUNC;
3708 branch_type = ST_BRANCH_TO_ARM;
3709 }
5fa9e92f 3710 }
34e77a92
RS		 3711 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3712 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3713
fe33d2fa
CL		 3714 branch_offset = (bfd_signed_vma)(destination - location);
3715
0855e32b 3716 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
c5423981 3717 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
906e58ca 3718 {
5fa9e92f
CL		 3719 /* Handle cases where:
3720 - this call goes too far (different Thumb/Thumb2 max
99059e56 3721 distance)
155d87d7 3722 - it's a Thumb->Arm call and blx is not available, or it's a
99059e56
RM		 3723 Thumb->Arm branch (not bl). A stub is needed in this case,
3724 but only if this call is not through a PLT entry. Indeed,
3725 PLT stubs handle mode switching already.
5fa9e92f 3726 */
906e58ca
NC		 3727 if ((!thumb2
3728 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3729 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3730 || (thumb2
3731 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3732 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
c5423981
TG		 3733 || (thumb2
3734 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3735 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3736 && (r_type == R_ARM_THM_JUMP19))
35fc36a8 3737 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3738 && (((r_type == R_ARM_THM_CALL
3739 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
c5423981
TG		 3740 || (r_type == R_ARM_THM_JUMP24)
3741 || (r_type == R_ARM_THM_JUMP19))
5fa9e92f 3742 && !use_plt))
906e58ca 3743 {
35fc36a8 3744 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3745 {
3746 /* Thumb to thumb. */
3747 if (!thumb_only)
3748 {
0e1862bb 3749 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
c2b4a39d 3750 /* PIC stubs. */
155d87d7 3751 ? ((globals->use_blx
9553db3c 3752 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3753 /* V5T and above. Stub starts with ARM code, so
3754 we must be able to switch mode before
3755 reaching it, which is only possible for 'bl'
3756 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3757 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3758 /* On V4T, use Thumb code only. */
d3626fb0 3759 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3760
3761 /* non-PIC stubs. */
155d87d7 3762 : ((globals->use_blx
9553db3c 3763 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3764 /* V5T and above. */
3765 ? arm_stub_long_branch_any_any
3766 /* V4T. */
d3626fb0 3767 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3768 }
3769 else
3770 {
0e1862bb 3771 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
ebe24dd4
CL		 3772 /* PIC stub. */
3773 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3774 /* non-PIC stub. */
3775 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3776 }
3777 }
3778 else
3779 {
3780 /* Thumb to arm. */
c820be07
NC		 3781 if (sym_sec != NULL
3782 && sym_sec->owner != NULL
3783 && !INTERWORK_FLAG (sym_sec->owner))
3784 {
3785 (*_bfd_error_handler)
3786 (_("%B(%s): warning: interworking not enabled.\n"
3787 " first occurrence: %B: Thumb call to ARM"),
3788 sym_sec->owner, input_bfd, name);
3789 }
3790
0855e32b 3791 stub_type =
0e1862bb 3792 (bfd_link_pic (info) | globals->pic_veneer)
c2b4a39d 3793 /* PIC stubs. */
0855e32b 3794 ? (r_type == R_ARM_THM_TLS_CALL
6a631e86 3795 /* TLS PIC stubs. */
0855e32b
NS		 3796 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3797 : arm_stub_long_branch_v4t_thumb_tls_pic)
3798 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3799 /* V5T PIC and above. */
3800 ? arm_stub_long_branch_any_arm_pic
3801 /* V4T PIC stub. */
3802 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3803
3804 /* non-PIC stubs. */
0855e32b 3805 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3806 /* V5T and above. */
3807 ? arm_stub_long_branch_any_any
3808 /* V4T. */
3809 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3810
3811 /* Handle v4t short branches. */
fea2b4d6 3812 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3813 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3814 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3815 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3816 }
3817 }
3818 }
fe33d2fa
CL		 3819 else if (r_type == R_ARM_CALL
3820 || r_type == R_ARM_JUMP24
0855e32b
NS		 3821 || r_type == R_ARM_PLT32
3822 || r_type == R_ARM_TLS_CALL)
906e58ca 3823 {
35fc36a8 3824 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3825 {
3826 /* Arm to thumb. */
c820be07
NC		 3827
3828 if (sym_sec != NULL
3829 && sym_sec->owner != NULL
3830 && !INTERWORK_FLAG (sym_sec->owner))
3831 {
3832 (*_bfd_error_handler)
3833 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3834 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3835 sym_sec->owner, input_bfd, name);
3836 }
3837
3838 /* We have an extra 2-bytes reach because of
3839 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3840 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3841 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3842 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3843 || (r_type == R_ARM_JUMP24)
3844 || (r_type == R_ARM_PLT32))
906e58ca 3845 {
0e1862bb 3846 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
c2b4a39d 3847 /* PIC stubs. */
ebe24dd4
CL		 3848 ? ((globals->use_blx)
3849 /* V5T and above. */
3850 ? arm_stub_long_branch_any_thumb_pic
3851 /* V4T stub. */
3852 : arm_stub_long_branch_v4t_arm_thumb_pic)
3853
c2b4a39d
CL		 3854 /* non-PIC stubs. */
3855 : ((globals->use_blx)
3856 /* V5T and above. */
3857 ? arm_stub_long_branch_any_any
3858 /* V4T. */
3859 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3860 }
3861 }
3862 else
3863 {
3864 /* Arm to arm. */
3865 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3866 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3867 {
0855e32b 3868 stub_type =
0e1862bb 3869 (bfd_link_pic (info) | globals->pic_veneer)
c2b4a39d 3870 /* PIC stubs. */
0855e32b 3871 ? (r_type == R_ARM_TLS_CALL
6a631e86 3872 /* TLS PIC Stub. */
0855e32b 3873 ? arm_stub_long_branch_any_tls_pic
7a89b94e
NC		 3874 : (globals->nacl_p
3875 ? arm_stub_long_branch_arm_nacl_pic
3876 : arm_stub_long_branch_any_arm_pic))
c2b4a39d 3877 /* non-PIC stubs. */
7a89b94e
NC		 3878 : (globals->nacl_p
3879 ? arm_stub_long_branch_arm_nacl
3880 : arm_stub_long_branch_any_any);
906e58ca
NC		 3881 }
3882 }
3883 }
3884
fe33d2fa
CL		 3885 /* If a stub is needed, record the actual destination type. */
3886 if (stub_type != arm_stub_none)
35fc36a8 3887 *actual_branch_type = branch_type;
fe33d2fa 3888
906e58ca
NC		 3889 return stub_type;
3890}
3891
3892/* Build a name for an entry in the stub hash table. */
3893
3894static char *
3895elf32_arm_stub_name (const asection *input_section,
3896 const asection *sym_sec,
3897 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3898 const Elf_Internal_Rela *rel,
3899 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3900{
3901 char *stub_name;
3902 bfd_size_type len;
3903
3904 if (hash)
3905 {
fe33d2fa 3906 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3907 stub_name = (char *) bfd_malloc (len);
906e58ca 3908 if (stub_name != NULL)
fe33d2fa 3909 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3910 input_section->id & 0xffffffff,
3911 hash->root.root.root.string,
fe33d2fa
CL		 3912 (int) rel->r_addend & 0xffffffff,
3913 (int) stub_type);
906e58ca
NC		 3914 }
3915 else
3916 {
fe33d2fa 3917 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3918 stub_name = (char *) bfd_malloc (len);
906e58ca 3919 if (stub_name != NULL)
fe33d2fa 3920 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3921 input_section->id & 0xffffffff,
3922 sym_sec->id & 0xffffffff,
0855e32b
NS		 3923 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3924 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3925 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3926 (int) rel->r_addend & 0xffffffff,
3927 (int) stub_type);
906e58ca
NC		 3928 }
3929
3930 return stub_name;
3931}
3932
3933/* Look up an entry in the stub hash. Stub entries are cached because
3934 creating the stub name takes a bit of time. */
3935
3936static struct elf32_arm_stub_hash_entry *
3937elf32_arm_get_stub_entry (const asection *input_section,
3938 const asection *sym_sec,
3939 struct elf_link_hash_entry *hash,
3940 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3941 struct elf32_arm_link_hash_table *htab,
3942 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3943{
3944 struct elf32_arm_stub_hash_entry *stub_entry;
3945 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3946 const asection *id_sec;
3947
3948 if ((input_section->flags & SEC_CODE) == 0)
3949 return NULL;
3950
3951 /* If this input section is part of a group of sections sharing one
3952 stub section, then use the id of the first section in the group.
3953 Stub names need to include a section id, as there may well be
3954 more than one stub used to reach say, printf, and we need to
3955 distinguish between them. */
3956 id_sec = htab->stub_group[input_section->id].link_sec;
3957
3958 if (h != NULL && h->stub_cache != NULL
3959 && h->stub_cache->h == h
fe33d2fa
CL		 3960 && h->stub_cache->id_sec == id_sec
3961 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3962 {
3963 stub_entry = h->stub_cache;
3964 }
3965 else
3966 {
3967 char *stub_name;
3968
fe33d2fa 3969 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3970 if (stub_name == NULL)
3971 return NULL;
3972
3973 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3974 stub_name, FALSE, FALSE);
3975 if (h != NULL)
3976 h->stub_cache = stub_entry;
3977
3978 free (stub_name);
3979 }
3980
3981 return stub_entry;
3982}
3983
48229727 3984/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3985 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3986 LINK_SEC_P may be NULL. */
906e58ca 3987
48229727
JB		 3988static asection *
3989elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3990 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3991{
3992 asection *link_sec;
3993 asection *stub_sec;
906e58ca
NC		 3994
3995 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3996 BFD_ASSERT (link_sec != NULL);
906e58ca 3997 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3998
906e58ca
NC		 3999 if (stub_sec == NULL)
4000 {
4001 stub_sec = htab->stub_group[link_sec->id].stub_sec;
4002 if (stub_sec == NULL)
4003 {
4004 size_t namelen;
4005 bfd_size_type len;
4006 char *s_name;
4007
4008 namelen = strlen (link_sec->name);
4009 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 4010 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 4011 if (s_name == NULL)
4012 return NULL;
4013
4014 memcpy (s_name, link_sec->name, namelen);
4015 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
7a89b94e
NC		 4016 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4017 htab->nacl_p ? 4 : 3);
906e58ca
NC		 4018 if (stub_sec == NULL)
4019 return NULL;
4020 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4021 }
4022 htab->stub_group[section->id].stub_sec = stub_sec;
4023 }
b38cadfb 4024
48229727
JB		 4025 if (link_sec_p)
4026 *link_sec_p = link_sec;
b38cadfb 4027
48229727
JB		 4028 return stub_sec;
4029}
4030
4031/* Add a new stub entry to the stub hash. Not all fields of the new
4032 stub entry are initialised. */
4033
4034static struct elf32_arm_stub_hash_entry *
4035elf32_arm_add_stub (const char *stub_name,
4036 asection *section,
4037 struct elf32_arm_link_hash_table *htab)
4038{
4039 asection *link_sec;
4040 asection *stub_sec;
4041 struct elf32_arm_stub_hash_entry *stub_entry;
4042
4043 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4044 if (stub_sec == NULL)
4045 return NULL;
906e58ca
NC		 4046
4047 /* Enter this entry into the linker stub hash table. */
4048 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4049 TRUE, FALSE);
4050 if (stub_entry == NULL)
4051 {
4052 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4053 section->owner,
4054 stub_name);
4055 return NULL;
4056 }
4057
4058 stub_entry->stub_sec = stub_sec;
4059 stub_entry->stub_offset = 0;
4060 stub_entry->id_sec = link_sec;
4061
906e58ca
NC		 4062 return stub_entry;
4063}
4064
4065/* Store an Arm insn into an output section not processed by
4066 elf32_arm_write_section. */
4067
4068static void
8029a119
NC		 4069put_arm_insn (struct elf32_arm_link_hash_table * htab,
4070 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4071{
4072 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4073 bfd_putl32 (val, ptr);
4074 else
4075 bfd_putb32 (val, ptr);
4076}
4077
4078/* Store a 16-bit Thumb insn into an output section not processed by
4079 elf32_arm_write_section. */
4080
4081static void
8029a119
NC		 4082put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4083 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4084{
4085 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4086 bfd_putl16 (val, ptr);
4087 else
4088 bfd_putb16 (val, ptr);
4089}
4090
0855e32b
NS		 4091/* If it's possible to change R_TYPE to a more efficient access
4092 model, return the new reloc type. */
4093
4094static unsigned
b38cadfb 4095elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4096 struct elf_link_hash_entry *h)
4097{
4098 int is_local = (h == NULL);
4099
0e1862bb
L		 4100 if (bfd_link_pic (info)
4101 || (h && h->root.type == bfd_link_hash_undefweak))
0855e32b
NS		 4102 return r_type;
4103
b38cadfb 4104 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4105 switch (r_type)
4106 {
4107 case R_ARM_TLS_GOTDESC:
4108 case R_ARM_TLS_CALL:
4109 case R_ARM_THM_TLS_CALL:
4110 case R_ARM_TLS_DESCSEQ:
4111 case R_ARM_THM_TLS_DESCSEQ:
4112 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4113 }
4114
4115 return r_type;
4116}
4117
48229727
JB		 4118static bfd_reloc_status_type elf32_arm_final_link_relocate
4119 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4120 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4121 const char *, unsigned char, enum arm_st_branch_type,
4122 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4123
4563a860
JB		 4124static unsigned int
4125arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4126{
4127 switch (stub_type)
4128 {
4129 case arm_stub_a8_veneer_b_cond:
4130 case arm_stub_a8_veneer_b:
4131 case arm_stub_a8_veneer_bl:
4132 return 2;
4133
4134 case arm_stub_long_branch_any_any:
4135 case arm_stub_long_branch_v4t_arm_thumb:
4136 case arm_stub_long_branch_thumb_only:
4137 case arm_stub_long_branch_v4t_thumb_thumb:
4138 case arm_stub_long_branch_v4t_thumb_arm:
4139 case arm_stub_short_branch_v4t_thumb_arm:
4140 case arm_stub_long_branch_any_arm_pic:
4141 case arm_stub_long_branch_any_thumb_pic:
4142 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4143 case arm_stub_long_branch_v4t_arm_thumb_pic:
4144 case arm_stub_long_branch_v4t_thumb_arm_pic:
4145 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4146 case arm_stub_long_branch_any_tls_pic:
4147 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4148 case arm_stub_a8_veneer_blx:
4149 return 4;
b38cadfb 4150
7a89b94e
NC		 4151 case arm_stub_long_branch_arm_nacl:
4152 case arm_stub_long_branch_arm_nacl_pic:
4153 return 16;
4154
4563a860
JB		 4155 default:
4156 abort (); /* Should be unreachable. */
4157 }
4158}
4159
906e58ca
NC		 4160static bfd_boolean
4161arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4162 void * in_arg)
4163{
7a89b94e 4164#define MAXRELOCS 3
906e58ca 4165 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4166 struct elf32_arm_link_hash_table *globals;
906e58ca 4167 struct bfd_link_info *info;
906e58ca
NC		 4168 asection *stub_sec;
4169 bfd *stub_bfd;
906e58ca
NC		 4170 bfd_byte *loc;
4171 bfd_vma sym_value;
4172 int template_size;
4173 int size;
d3ce72d0 4174 const insn_sequence *template_sequence;
906e58ca 4175 int i;
48229727
JB		 4176 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4177 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4178 int nrelocs = 0;
906e58ca
NC		 4179
4180 /* Massage our args to the form they really have. */
4181 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4182 info = (struct bfd_link_info *) in_arg;
4183
4184 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4185 if (globals == NULL)
4186 return FALSE;
906e58ca 4187
906e58ca
NC		 4188 stub_sec = stub_entry->stub_sec;
4189
4dfe6ac6 4190 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4191 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4192 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4193 return TRUE;
fe33d2fa 4194
906e58ca
NC		 4195 /* Make a note of the offset within the stubs for this entry. */
4196 stub_entry->stub_offset = stub_sec->size;
4197 loc = stub_sec->contents + stub_entry->stub_offset;
4198
4199 stub_bfd = stub_sec->owner;
4200
906e58ca
NC		 4201 /* This is the address of the stub destination. */
4202 sym_value = (stub_entry->target_value
4203 + stub_entry->target_section->output_offset
4204 + stub_entry->target_section->output_section->vma);
4205
d3ce72d0 4206 template_sequence = stub_entry->stub_template;
461a49ca 4207 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4208
4209 size = 0;
461a49ca 4210 for (i = 0; i < template_size; i++)
906e58ca 4211 {
d3ce72d0 4212 switch (template_sequence[i].type)
461a49ca
DJ		 4213 {
4214 case THUMB16_TYPE:
48229727 4215 {
d3ce72d0
NC		 4216 bfd_vma data = (bfd_vma) template_sequence[i].data;
4217 if (template_sequence[i].reloc_addend != 0)
48229727 4218 {
99059e56
RM		 4219 /* We've borrowed the reloc_addend field to mean we should
4220 insert a condition code into this (Thumb-1 branch)
4221 instruction. See THUMB16_BCOND_INSN. */
4222 BFD_ASSERT ((data & 0xff00) == 0xd000);
4223 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
48229727 4224 }
fe33d2fa 4225 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4226 size += 2;
4227 }
461a49ca 4228 break;
906e58ca 4229
48229727 4230 case THUMB32_TYPE:
fe33d2fa
CL		 4231 bfd_put_16 (stub_bfd,
4232 (template_sequence[i].data >> 16) & 0xffff,
4233 loc + size);
4234 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4235 loc + size + 2);
99059e56
RM		 4236 if (template_sequence[i].r_type != R_ARM_NONE)
4237 {
4238 stub_reloc_idx[nrelocs] = i;
4239 stub_reloc_offset[nrelocs++] = size;
4240 }
4241 size += 4;
4242 break;
48229727 4243
461a49ca 4244 case ARM_TYPE:
fe33d2fa
CL		 4245 bfd_put_32 (stub_bfd, template_sequence[i].data,
4246 loc + size);
461a49ca
DJ		 4247 /* Handle cases where the target is encoded within the
4248 instruction. */
d3ce72d0 4249 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4250 {
48229727
JB		 4251 stub_reloc_idx[nrelocs] = i;
4252 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4253 }
4254 size += 4;
4255 break;
4256
4257 case DATA_TYPE:
d3ce72d0 4258 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4259 stub_reloc_idx[nrelocs] = i;
4260 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4261 size += 4;
4262 break;
4263
4264 default:
4265 BFD_FAIL ();
4266 return FALSE;
4267 }
906e58ca 4268 }
461a49ca 4269
906e58ca
NC		 4270 stub_sec->size += size;
4271
461a49ca
DJ		 4272 /* Stub size has already been computed in arm_size_one_stub. Check
4273 consistency. */
4274 BFD_ASSERT (size == stub_entry->stub_size);
4275
906e58ca 4276 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4277 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4278 sym_value |= 1;
4279
48229727
JB		 4280 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4281 in each stub. */
4282 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4283
48229727 4284 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4285 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4286 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4287 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4288 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4289 {
4290 Elf_Internal_Rela rel;
4291 bfd_boolean unresolved_reloc;
4292 char *error_message;
35fc36a8
RS		 4293 enum arm_st_branch_type branch_type
4294 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4295 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4296 bfd_vma points_to = sym_value + stub_entry->target_addend;
4297
4298 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0 4299 rel.r_info = ELF32_R_INFO (0,
99059e56 4300 template_sequence[stub_reloc_idx[i]].r_type);
d3ce72d0 4301 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4302
4303 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4304 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4305 template should refer back to the instruction after the original
4306 branch. */
4307 points_to = sym_value;
4308
33c6a8fc
JB		 4309 /* There may be unintended consequences if this is not true. */
4310 BFD_ASSERT (stub_entry->h == NULL);
4311
48229727
JB		 4312 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4313 properly. We should probably use this function unconditionally,
4314 rather than only for certain relocations listed in the enclosing
4315 conditional, for the sake of consistency. */
4316 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4317 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4318 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4319 points_to, info, stub_entry->target_section, "", STT_FUNC,
4320 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4321 &unresolved_reloc, &error_message);
48229727
JB		 4322 }
4323 else
4324 {
fe33d2fa
CL		 4325 Elf_Internal_Rela rel;
4326 bfd_boolean unresolved_reloc;
4327 char *error_message;
4328 bfd_vma points_to = sym_value + stub_entry->target_addend
4329 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4330
4331 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4332 rel.r_info = ELF32_R_INFO (0,
99059e56 4333 template_sequence[stub_reloc_idx[i]].r_type);
fe33d2fa
CL		 4334 rel.r_addend = 0;
4335
4336 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4337 (template_sequence[stub_reloc_idx[i]].r_type),
4338 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4339 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4340 stub_entry->branch_type,
fe33d2fa
CL		 4341 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4342 &error_message);
48229727 4343 }
906e58ca
NC		 4344
4345 return TRUE;
48229727 4346#undef MAXRELOCS
906e58ca
NC		 4347}
4348
48229727
JB		 4349/* Calculate the template, template size and instruction size for a stub.
4350 Return value is the instruction size. */
906e58ca 4351
48229727
JB		 4352static unsigned int
4353find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4354 const insn_sequence **stub_template,
4355 int *stub_template_size)
906e58ca 4356{
d3ce72d0 4357 const insn_sequence *template_sequence = NULL;
48229727
JB		 4358 int template_size = 0, i;
4359 unsigned int size;
906e58ca 4360
d3ce72d0 4361 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4362 if (stub_template)
4363 *stub_template = template_sequence;
4364
48229727 4365 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4366 if (stub_template_size)
4367 *stub_template_size = template_size;
906e58ca
NC		 4368
4369 size = 0;
461a49ca
DJ		 4370 for (i = 0; i < template_size; i++)
4371 {
d3ce72d0 4372 switch (template_sequence[i].type)
461a49ca
DJ		 4373 {
4374 case THUMB16_TYPE:
4375 size += 2;
4376 break;
4377
4378 case ARM_TYPE:
48229727 4379 case THUMB32_TYPE:
461a49ca
DJ		 4380 case DATA_TYPE:
4381 size += 4;
4382 break;
4383
4384 default:
4385 BFD_FAIL ();
2a229407 4386 return 0;
461a49ca
DJ		 4387 }
4388 }
4389
48229727
JB		 4390 return size;
4391}
4392
4393/* As above, but don't actually build the stub. Just bump offset so
4394 we know stub section sizes. */
4395
4396static bfd_boolean
4397arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4398 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4399{
4400 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4401 const insn_sequence *template_sequence;
48229727
JB		 4402 int template_size, size;
4403
4404 /* Massage our args to the form they really have. */
4405 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4406
4407 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4408 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4409
d3ce72d0 4410 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4411 &template_size);
4412
461a49ca 4413 stub_entry->stub_size = size;
d3ce72d0 4414 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4415 stub_entry->stub_template_size = template_size;
4416
906e58ca
NC		 4417 size = (size + 7) & ~7;
4418 stub_entry->stub_sec->size += size;
461a49ca 4419
906e58ca
NC		 4420 return TRUE;
4421}
4422
4423/* External entry points for sizing and building linker stubs. */
4424
4425/* Set up various things so that we can make a list of input sections
4426 for each output section included in the link. Returns -1 on error,
4427 0 when no stubs will be needed, and 1 on success. */
4428
4429int
4430elf32_arm_setup_section_lists (bfd *output_bfd,
4431 struct bfd_link_info *info)
4432{
4433 bfd *input_bfd;
4434 unsigned int bfd_count;
7292b3ac 4435 unsigned int top_id, top_index;
906e58ca
NC		 4436 asection *section;
4437 asection **input_list, **list;
4438 bfd_size_type amt;
4439 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4440
4dfe6ac6
NC		 4441 if (htab == NULL)
4442 return 0;
906e58ca
NC		 4443 if (! is_elf_hash_table (htab))
4444 return 0;
4445
4446 /* Count the number of input BFDs and find the top input section id. */
4447 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4448 input_bfd != NULL;
c72f2fb2 4449 input_bfd = input_bfd->link.next)
906e58ca
NC		 4450 {
4451 bfd_count += 1;
4452 for (section = input_bfd->sections;
4453 section != NULL;
4454 section = section->next)
4455 {
4456 if (top_id < section->id)
4457 top_id = section->id;
4458 }
4459 }
4460 htab->bfd_count = bfd_count;
4461
4462 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4463 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4464 if (htab->stub_group == NULL)
4465 return -1;
fe33d2fa 4466 htab->top_id = top_id;
906e58ca
NC		 4467
4468 /* We can't use output_bfd->section_count here to find the top output
4469 section index as some sections may have been removed, and
4470 _bfd_strip_section_from_output doesn't renumber the indices. */
4471 for (section = output_bfd->sections, top_index = 0;
4472 section != NULL;
4473 section = section->next)
4474 {
4475 if (top_index < section->index)
4476 top_index = section->index;
4477 }
4478
4479 htab->top_index = top_index;
4480 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4481 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4482 htab->input_list = input_list;
4483 if (input_list == NULL)
4484 return -1;
4485
4486 /* For sections we aren't interested in, mark their entries with a
4487 value we can check later. */
4488 list = input_list + top_index;
4489 do
4490 *list = bfd_abs_section_ptr;
4491 while (list-- != input_list);
4492
4493 for (section = output_bfd->sections;
4494 section != NULL;
4495 section = section->next)
4496 {
4497 if ((section->flags & SEC_CODE) != 0)
4498 input_list[section->index] = NULL;
4499 }
4500
4501 return 1;
4502}
4503
4504/* The linker repeatedly calls this function for each input section,
4505 in the order that input sections are linked into output sections.
4506 Build lists of input sections to determine groupings between which
4507 we may insert linker stubs. */
4508
4509void
4510elf32_arm_next_input_section (struct bfd_link_info *info,
4511 asection *isec)
4512{
4513 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4514
4dfe6ac6
NC		 4515 if (htab == NULL)
4516 return;
4517
906e58ca
NC		 4518 if (isec->output_section->index <= htab->top_index)
4519 {
4520 asection **list = htab->input_list + isec->output_section->index;
4521
a7470592 4522 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4523 {
4524 /* Steal the link_sec pointer for our list. */
4525#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4526 /* This happens to make the list in reverse order,
07d72278 4527 which we reverse later. */
906e58ca
NC		 4528 PREV_SEC (isec) = *list;
4529 *list = isec;
4530 }
4531 }
4532}
4533
4534/* See whether we can group stub sections together. Grouping stub
4535 sections may result in fewer stubs. More importantly, we need to
07d72278 4536 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4537 .fini output sections respectively, because glibc splits the
4538 _init and _fini functions into multiple parts. Putting a stub in
4539 the middle of a function is not a good idea. */
4540
4541static void
4542group_sections (struct elf32_arm_link_hash_table *htab,
4543 bfd_size_type stub_group_size,
07d72278 4544 bfd_boolean stubs_always_after_branch)
906e58ca 4545{
07d72278 4546 asection **list = htab->input_list;
906e58ca
NC		 4547
4548 do
4549 {
4550 asection *tail = *list;
07d72278 4551 asection *head;
906e58ca
NC		 4552
4553 if (tail == bfd_abs_section_ptr)
4554 continue;
4555
07d72278
DJ		 4556 /* Reverse the list: we must avoid placing stubs at the
4557 beginning of the section because the beginning of the text
4558 section may be required for an interrupt vector in bare metal
4559 code. */
4560#define NEXT_SEC PREV_SEC
e780aef2
CL		 4561 head = NULL;
4562 while (tail != NULL)
99059e56
RM		 4563 {
4564 /* Pop from tail. */
4565 asection *item = tail;
4566 tail = PREV_SEC (item);
e780aef2 4567
99059e56
RM		 4568 /* Push on head. */
4569 NEXT_SEC (item) = head;
4570 head = item;
4571 }
07d72278
DJ		 4572
4573 while (head != NULL)
906e58ca
NC		 4574 {
4575 asection *curr;
07d72278 4576 asection *next;
e780aef2
CL		 4577 bfd_vma stub_group_start = head->output_offset;
4578 bfd_vma end_of_next;
906e58ca 4579
07d72278 4580 curr = head;
e780aef2 4581 while (NEXT_SEC (curr) != NULL)
8cd931b7 4582 {
e780aef2
CL		 4583 next = NEXT_SEC (curr);
4584 end_of_next = next->output_offset + next->size;
4585 if (end_of_next - stub_group_start >= stub_group_size)
4586 /* End of NEXT is too far from start, so stop. */
8cd931b7 4587 break;
e780aef2
CL		 4588 /* Add NEXT to the group. */
4589 curr = next;
8cd931b7 4590 }
906e58ca 4591
07d72278 4592 /* OK, the size from the start to the start of CURR is less
906e58ca 4593 than stub_group_size and thus can be handled by one stub
07d72278 4594 section. (Or the head section is itself larger than
906e58ca
NC		 4595 stub_group_size, in which case we may be toast.)
4596 We should really be keeping track of the total size of
4597 stubs added here, as stubs contribute to the final output
7fb9f789 4598 section size. */
906e58ca
NC		 4599 do
4600 {
07d72278 4601 next = NEXT_SEC (head);
906e58ca 4602 /* Set up this stub group. */
07d72278 4603 htab->stub_group[head->id].link_sec = curr;
906e58ca 4604 }
07d72278 4605 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4606
4607 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4608 bytes after the stub section can be handled by it too. */
4609 if (!stubs_always_after_branch)
906e58ca 4610 {
e780aef2
CL		 4611 stub_group_start = curr->output_offset + curr->size;
4612
8cd931b7 4613 while (next != NULL)
906e58ca 4614 {
e780aef2
CL		 4615 end_of_next = next->output_offset + next->size;
4616 if (end_of_next - stub_group_start >= stub_group_size)
4617 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4618 break;
e780aef2 4619 /* Add NEXT to the stub group. */
07d72278
DJ		 4620 head = next;
4621 next = NEXT_SEC (head);
4622 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4623 }
4624 }
07d72278 4625 head = next;
906e58ca
NC		 4626 }
4627 }
07d72278 4628 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4629
4630 free (htab->input_list);
4631#undef PREV_SEC
07d72278 4632#undef NEXT_SEC
906e58ca
NC		 4633}
4634
48229727
JB		 4635/* Comparison function for sorting/searching relocations relating to Cortex-A8
4636 erratum fix. */
4637
4638static int
4639a8_reloc_compare (const void *a, const void *b)
4640{
21d799b5
NC		 4641 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4642 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4643
4644 if (ra->from < rb->from)
4645 return -1;
4646 else if (ra->from > rb->from)
4647 return 1;
4648 else
4649 return 0;
4650}
4651
4652static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4653 const char *, char **);
4654
4655/* Helper function to scan code for sequences which might trigger the Cortex-A8
4656 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4657 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4658 otherwise. */
4659
81694485
NC		 4660static bfd_boolean
4661cortex_a8_erratum_scan (bfd *input_bfd,
4662 struct bfd_link_info *info,
48229727
JB		 4663 struct a8_erratum_fix **a8_fixes_p,
4664 unsigned int *num_a8_fixes_p,
4665 unsigned int *a8_fix_table_size_p,
4666 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4667 unsigned int num_a8_relocs,
4668 unsigned prev_num_a8_fixes,
4669 bfd_boolean *stub_changed_p)
48229727
JB		 4670{
4671 asection *section;
4672 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4673 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4674 unsigned int num_a8_fixes = *num_a8_fixes_p;
4675 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4676
4dfe6ac6
NC		 4677 if (htab == NULL)
4678 return FALSE;
4679
48229727
JB		 4680 for (section = input_bfd->sections;
4681 section != NULL;
4682 section = section->next)
4683 {
4684 bfd_byte *contents = NULL;
4685 struct _arm_elf_section_data *sec_data;
4686 unsigned int span;
4687 bfd_vma base_vma;
4688
4689 if (elf_section_type (section) != SHT_PROGBITS
99059e56
RM		 4690 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4691 || (section->flags & SEC_EXCLUDE) != 0
4692 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4693 || (section->output_section == bfd_abs_section_ptr))
4694 continue;
48229727
JB		 4695
4696 base_vma = section->output_section->vma + section->output_offset;
4697
4698 if (elf_section_data (section)->this_hdr.contents != NULL)
99059e56 4699 contents = elf_section_data (section)->this_hdr.contents;
48229727 4700 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
99059e56 4701 return TRUE;
48229727
JB		 4702
4703 sec_data = elf32_arm_section_data (section);
4704
4705 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 4706 {
4707 unsigned int span_start = sec_data->map[span].vma;
4708 unsigned int span_end = (span == sec_data->mapcount - 1)
4709 ? section->size : sec_data->map[span + 1].vma;
4710 unsigned int i;
4711 char span_type = sec_data->map[span].type;
4712 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4713
4714 if (span_type != 't')
4715 continue;
4716
4717 /* Span is entirely within a single 4KB region: skip scanning. */
4718 if (((base_vma + span_start) & ~0xfff)
48229727 4719 == ((base_vma + span_end) & ~0xfff))
99059e56
RM		 4720 continue;
4721
4722 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4723
4724 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4725 * The branch target is in the same 4KB region as the
4726 first half of the branch.
4727 * The instruction before the branch is a 32-bit
4728 length non-branch instruction. */
4729 for (i = span_start; i < span_end;)
4730 {
4731 unsigned int insn = bfd_getl16 (&contents[i]);
4732 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
48229727
JB		 4733 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4734
99059e56
RM		 4735 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4736 insn_32bit = TRUE;
48229727
JB		 4737
4738 if (insn_32bit)
99059e56
RM		 4739 {
4740 /* Load the rest of the insn (in manual-friendly order). */
4741 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4742
4743 /* Encoding T4: B<c>.W. */
4744 is_b = (insn & 0xf800d000) == 0xf0009000;
4745 /* Encoding T1: BL<c>.W. */
4746 is_bl = (insn & 0xf800d000) == 0xf000d000;
4747 /* Encoding T2: BLX<c>.W. */
4748 is_blx = (insn & 0xf800d000) == 0xf000c000;
48229727
JB		 4749 /* Encoding T3: B<c>.W (not permitted in IT block). */
4750 is_bcc = (insn & 0xf800d000) == 0xf0008000
4751 && (insn & 0x07f00000) != 0x03800000;
4752 }
4753
4754 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4755
99059e56 4756 if (((base_vma + i) & 0xfff) == 0xffe
81694485
NC		 4757 && insn_32bit
4758 && is_32bit_branch
4759 && last_was_32bit
4760 && ! last_was_branch)
99059e56
RM		 4761 {
4762 bfd_signed_vma offset = 0;
4763 bfd_boolean force_target_arm = FALSE;
48229727 4764 bfd_boolean force_target_thumb = FALSE;
99059e56
RM		 4765 bfd_vma target;
4766 enum elf32_arm_stub_type stub_type = arm_stub_none;
4767 struct a8_erratum_reloc key, *found;
4768 bfd_boolean use_plt = FALSE;
48229727 4769
99059e56
RM		 4770 key.from = base_vma + i;
4771 found = (struct a8_erratum_reloc *)
4772 bsearch (&key, a8_relocs, num_a8_relocs,
4773 sizeof (struct a8_erratum_reloc),
4774 &a8_reloc_compare);
48229727
JB		 4775
4776 if (found)
4777 {
4778 char *error_message = NULL;
4779 struct elf_link_hash_entry *entry;
4780
4781 /* We don't care about the error returned from this
99059e56 4782 function, only if there is glue or not. */
48229727
JB		 4783 entry = find_thumb_glue (info, found->sym_name,
4784 &error_message);
4785
4786 if (entry)
4787 found->non_a8_stub = TRUE;
4788
92750f34 4789 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4790 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4791 && found->hash->root.plt.offset != (bfd_vma) -1)
4792 use_plt = TRUE;
4793
4794 if (found->r_type == R_ARM_THM_CALL)
4795 {
35fc36a8
RS		 4796 if (found->branch_type == ST_BRANCH_TO_ARM
4797 || use_plt)
92750f34
DJ		 4798 force_target_arm = TRUE;
4799 else
4800 force_target_thumb = TRUE;
4801 }
48229727
JB		 4802 }
4803
99059e56 4804 /* Check if we have an offending branch instruction. */
48229727
JB		 4805
4806 if (found && found->non_a8_stub)
4807 /* We've already made a stub for this instruction, e.g.
4808 it's a long branch or a Thumb->ARM stub. Assume that
4809 stub will suffice to work around the A8 erratum (see
4810 setting of always_after_branch above). */
4811 ;
99059e56
RM		 4812 else if (is_bcc)
4813 {
4814 offset = (insn & 0x7ff) << 1;
4815 offset |= (insn & 0x3f0000) >> 4;
4816 offset |= (insn & 0x2000) ? 0x40000 : 0;
4817 offset |= (insn & 0x800) ? 0x80000 : 0;
4818 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4819 if (offset & 0x100000)
4820 offset |= ~ ((bfd_signed_vma) 0xfffff);
4821 stub_type = arm_stub_a8_veneer_b_cond;
4822 }
4823 else if (is_b || is_bl || is_blx)
4824 {
4825 int s = (insn & 0x4000000) != 0;
4826 int j1 = (insn & 0x2000) != 0;
4827 int j2 = (insn & 0x800) != 0;
4828 int i1 = !(j1 ^ s);
4829 int i2 = !(j2 ^ s);
4830
4831 offset = (insn & 0x7ff) << 1;
4832 offset |= (insn & 0x3ff0000) >> 4;
4833 offset |= i2 << 22;
4834 offset |= i1 << 23;
4835 offset |= s << 24;
4836 if (offset & 0x1000000)
4837 offset |= ~ ((bfd_signed_vma) 0xffffff);
4838
4839 if (is_blx)
4840 offset &= ~ ((bfd_signed_vma) 3);
4841
4842 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4843 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4844 }
4845
4846 if (stub_type != arm_stub_none)
4847 {
4848 bfd_vma pc_for_insn = base_vma + i + 4;
48229727
JB		 4849
4850 /* The original instruction is a BL, but the target is
99059e56 4851 an ARM instruction. If we were not making a stub,
48229727
JB		 4852 the BL would have been converted to a BLX. Use the
4853 BLX stub instead in that case. */
4854 if (htab->use_blx && force_target_arm
4855 && stub_type == arm_stub_a8_veneer_bl)
4856 {
4857 stub_type = arm_stub_a8_veneer_blx;
4858 is_blx = TRUE;
4859 is_bl = FALSE;
4860 }
4861 /* Conversely, if the original instruction was
4862 BLX but the target is Thumb mode, use the BL
4863 stub. */
4864 else if (force_target_thumb
4865 && stub_type == arm_stub_a8_veneer_blx)
4866 {
4867 stub_type = arm_stub_a8_veneer_bl;
4868 is_blx = FALSE;
4869 is_bl = TRUE;
4870 }
4871
99059e56
RM		 4872 if (is_blx)
4873 pc_for_insn &= ~ ((bfd_vma) 3);
48229727 4874
99059e56
RM		 4875 /* If we found a relocation, use the proper destination,
4876 not the offset in the (unrelocated) instruction.
48229727
JB		 4877 Note this is always done if we switched the stub type
4878 above. */
99059e56
RM		 4879 if (found)
4880 offset =
81694485 4881 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4882
99059e56
RM		 4883 /* If the stub will use a Thumb-mode branch to a
4884 PLT target, redirect it to the preceding Thumb
4885 entry point. */
4886 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4887 offset -= PLT_THUMB_STUB_SIZE;
7d24e6a6 4888
99059e56 4889 target = pc_for_insn + offset;
48229727 4890
99059e56
RM		 4891 /* The BLX stub is ARM-mode code. Adjust the offset to
4892 take the different PC value (+8 instead of +4) into
48229727 4893 account. */
99059e56
RM		 4894 if (stub_type == arm_stub_a8_veneer_blx)
4895 offset += 4;
4896
4897 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4898 {
4899 char *stub_name = NULL;
4900
4901 if (num_a8_fixes == a8_fix_table_size)
4902 {
4903 a8_fix_table_size *= 2;
4904 a8_fixes = (struct a8_erratum_fix *)
4905 bfd_realloc (a8_fixes,
4906 sizeof (struct a8_erratum_fix)
4907 * a8_fix_table_size);
4908 }
48229727 4909
eb7c4339
NS		 4910 if (num_a8_fixes < prev_num_a8_fixes)
4911 {
4912 /* If we're doing a subsequent scan,
4913 check if we've found the same fix as
4914 before, and try and reuse the stub
4915 name. */
4916 stub_name = a8_fixes[num_a8_fixes].stub_name;
4917 if ((a8_fixes[num_a8_fixes].section != section)
4918 || (a8_fixes[num_a8_fixes].offset != i))
4919 {
4920 free (stub_name);
4921 stub_name = NULL;
4922 *stub_changed_p = TRUE;
4923 }
4924 }
4925
4926 if (!stub_name)
4927 {
21d799b5 4928 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4929 if (stub_name != NULL)
4930 sprintf (stub_name, "%x:%x", section->id, i);
4931 }
48229727 4932
99059e56
RM		 4933 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4934 a8_fixes[num_a8_fixes].section = section;
4935 a8_fixes[num_a8_fixes].offset = i;
4936 a8_fixes[num_a8_fixes].addend = offset;
4937 a8_fixes[num_a8_fixes].orig_insn = insn;
4938 a8_fixes[num_a8_fixes].stub_name = stub_name;
4939 a8_fixes[num_a8_fixes].stub_type = stub_type;
4940 a8_fixes[num_a8_fixes].branch_type =
35fc36a8 4941 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727 4942
99059e56
RM		 4943 num_a8_fixes++;
4944 }
4945 }
4946 }
48229727 4947
99059e56
RM		 4948 i += insn_32bit ? 4 : 2;
4949 last_was_32bit = insn_32bit;
48229727 4950 last_was_branch = is_32bit_branch;
99059e56
RM		 4951 }
4952 }
48229727
JB		 4953
4954 if (elf_section_data (section)->this_hdr.contents == NULL)
99059e56 4955 free (contents);
48229727 4956 }
fe33d2fa 4957
48229727
JB		 4958 *a8_fixes_p = a8_fixes;
4959 *num_a8_fixes_p = num_a8_fixes;
4960 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4961
81694485 4962 return FALSE;
48229727
JB		 4963}
4964
906e58ca
NC		 4965/* Determine and set the size of the stub section for a final link.
4966
4967 The basic idea here is to examine all the relocations looking for
4968 PC-relative calls to a target that is unreachable with a "bl"
4969 instruction. */
4970
4971bfd_boolean
4972elf32_arm_size_stubs (bfd *output_bfd,
4973 bfd *stub_bfd,
4974 struct bfd_link_info *info,
4975 bfd_signed_vma group_size,
7a89b94e
NC		 4976 asection * (*add_stub_section) (const char *, asection *,
4977 unsigned int),
906e58ca
NC		 4978 void (*layout_sections_again) (void))
4979{
4980 bfd_size_type stub_group_size;
07d72278 4981 bfd_boolean stubs_always_after_branch;
906e58ca 4982 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4983 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4984 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4985 struct a8_erratum_reloc *a8_relocs = NULL;
4986 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4987
4dfe6ac6
NC		 4988 if (htab == NULL)
4989 return FALSE;
4990
48229727
JB		 4991 if (htab->fix_cortex_a8)
4992 {
21d799b5 4993 a8_fixes = (struct a8_erratum_fix *)
99059e56 4994 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
21d799b5 4995 a8_relocs = (struct a8_erratum_reloc *)
99059e56 4996 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4997 }
906e58ca
NC		 4998
4999 /* Propagate mach to stub bfd, because it may not have been
5000 finalized when we created stub_bfd. */
5001 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5002 bfd_get_mach (output_bfd));
5003
5004 /* Stash our params away. */
5005 htab->stub_bfd = stub_bfd;
5006 htab->add_stub_section = add_stub_section;
5007 htab->layout_sections_again = layout_sections_again;
07d72278 5008 stubs_always_after_branch = group_size < 0;
48229727
JB		 5009
5010 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5011 as the first half of a 32-bit branch straddling two 4K pages. This is a
5012 crude way of enforcing that. */
5013 if (htab->fix_cortex_a8)
5014 stubs_always_after_branch = 1;
5015
906e58ca
NC		 5016 if (group_size < 0)
5017 stub_group_size = -group_size;
5018 else
5019 stub_group_size = group_size;
5020
5021 if (stub_group_size == 1)
5022 {
5023 /* Default values. */
5024 /* Thumb branch range is +-4MB has to be used as the default
5025 maximum size (a given section can contain both ARM and Thumb
5026 code, so the worst case has to be taken into account).
5027
5028 This value is 24K less than that, which allows for 2025
5029 12-byte stubs. If we exceed that, then we will fail to link.
5030 The user will have to relink with an explicit group size
5031 option. */
5032 stub_group_size = 4170000;
5033 }
5034
07d72278 5035 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 5036
3ae046cc
NS		 5037 /* If we're applying the cortex A8 fix, we need to determine the
5038 program header size now, because we cannot change it later --
5039 that could alter section placements. Notice the A8 erratum fix
5040 ends up requiring the section addresses to remain unchanged
5041 modulo the page size. That's something we cannot represent
5042 inside BFD, and we don't want to force the section alignment to
5043 be the page size. */
5044 if (htab->fix_cortex_a8)
5045 (*htab->layout_sections_again) ();
5046
906e58ca
NC		 5047 while (1)
5048 {
5049 bfd *input_bfd;
5050 unsigned int bfd_indx;
5051 asection *stub_sec;
eb7c4339
NS		 5052 bfd_boolean stub_changed = FALSE;
5053 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 5054
48229727 5055 num_a8_fixes = 0;
906e58ca
NC		 5056 for (input_bfd = info->input_bfds, bfd_indx = 0;
5057 input_bfd != NULL;
c72f2fb2 5058 input_bfd = input_bfd->link.next, bfd_indx++)
906e58ca
NC		 5059 {
5060 Elf_Internal_Shdr *symtab_hdr;
5061 asection *section;
5062 Elf_Internal_Sym *local_syms = NULL;
5063
99059e56
RM		 5064 if (!is_arm_elf (input_bfd))
5065 continue;
adbcc655 5066
48229727
JB		 5067 num_a8_relocs = 0;
5068
906e58ca
NC		 5069 /* We'll need the symbol table in a second. */
5070 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5071 if (symtab_hdr->sh_info == 0)
5072 continue;
5073
5074 /* Walk over each section attached to the input bfd. */
5075 for (section = input_bfd->sections;
5076 section != NULL;
5077 section = section->next)
5078 {
5079 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5080
5081 /* If there aren't any relocs, then there's nothing more
5082 to do. */
5083 if ((section->flags & SEC_RELOC) == 0
5084 || section->reloc_count == 0
5085 || (section->flags & SEC_CODE) == 0)
5086 continue;
5087
5088 /* If this section is a link-once section that will be
5089 discarded, then don't create any stubs. */
5090 if (section->output_section == NULL
5091 || section->output_section->owner != output_bfd)
5092 continue;
5093
5094 /* Get the relocs. */
5095 internal_relocs
5096 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5097 NULL, info->keep_memory);
5098 if (internal_relocs == NULL)
5099 goto error_ret_free_local;
5100
5101 /* Now examine each relocation. */
5102 irela = internal_relocs;
5103 irelaend = irela + section->reloc_count;
5104 for (; irela < irelaend; irela++)
5105 {
5106 unsigned int r_type, r_indx;
5107 enum elf32_arm_stub_type stub_type;
5108 struct elf32_arm_stub_hash_entry *stub_entry;
5109 asection *sym_sec;
5110 bfd_vma sym_value;
5111 bfd_vma destination;
5112 struct elf32_arm_link_hash_entry *hash;
7413f23f 5113 const char *sym_name;
906e58ca
NC		 5114 char *stub_name;
5115 const asection *id_sec;
34e77a92 5116 unsigned char st_type;
35fc36a8 5117 enum arm_st_branch_type branch_type;
48229727 5118 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5119
5120 r_type = ELF32_R_TYPE (irela->r_info);
5121 r_indx = ELF32_R_SYM (irela->r_info);
5122
5123 if (r_type >= (unsigned int) R_ARM_max)
5124 {
5125 bfd_set_error (bfd_error_bad_value);
5126 error_ret_free_internal:
5127 if (elf_section_data (section)->relocs == NULL)
5128 free (internal_relocs);
5129 goto error_ret_free_local;
5130 }
b38cadfb 5131
0855e32b
NS		 5132 hash = NULL;
5133 if (r_indx >= symtab_hdr->sh_info)
5134 hash = elf32_arm_hash_entry
5135 (elf_sym_hashes (input_bfd)
5136 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5137
0855e32b
NS		 5138 /* Only look for stubs on branch instructions, or
5139 non-relaxed TLSCALL */
906e58ca 5140 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5141 && (r_type != (unsigned int) R_ARM_THM_CALL)
5142 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5143 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5144 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5145 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5146 && (r_type != (unsigned int) R_ARM_PLT32)
5147 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5148 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5149 && r_type == elf32_arm_tls_transition
5150 (info, r_type, &hash->root)
5151 && ((hash ? hash->tls_type
5152 : (elf32_arm_local_got_tls_type
5153 (input_bfd)[r_indx]))
5154 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5155 continue;
5156
5157 /* Now determine the call target, its name, value,
5158 section. */
5159 sym_sec = NULL;
5160 sym_value = 0;
5161 destination = 0;
7413f23f 5162 sym_name = NULL;
b38cadfb 5163
0855e32b
NS		 5164 if (r_type == (unsigned int) R_ARM_TLS_CALL
5165 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5166 {
5167 /* A non-relaxed TLS call. The target is the
5168 plt-resident trampoline and nothing to do
5169 with the symbol. */
5170 BFD_ASSERT (htab->tls_trampoline > 0);
5171 sym_sec = htab->root.splt;
5172 sym_value = htab->tls_trampoline;
5173 hash = 0;
34e77a92 5174 st_type = STT_FUNC;
35fc36a8 5175 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5176 }
5177 else if (!hash)
906e58ca
NC		 5178 {
5179 /* It's a local symbol. */
5180 Elf_Internal_Sym *sym;
906e58ca
NC		 5181
5182 if (local_syms == NULL)
5183 {
5184 local_syms
5185 = (Elf_Internal_Sym *) symtab_hdr->contents;
5186 if (local_syms == NULL)
5187 local_syms
5188 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5189 symtab_hdr->sh_info, 0,
5190 NULL, NULL, NULL);
5191 if (local_syms == NULL)
5192 goto error_ret_free_internal;
5193 }
5194
5195 sym = local_syms + r_indx;
f6d250ce
TS		 5196 if (sym->st_shndx == SHN_UNDEF)
5197 sym_sec = bfd_und_section_ptr;
5198 else if (sym->st_shndx == SHN_ABS)
5199 sym_sec = bfd_abs_section_ptr;
5200 else if (sym->st_shndx == SHN_COMMON)
5201 sym_sec = bfd_com_section_ptr;
5202 else
5203 sym_sec =
5204 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5205
ffcb4889
NS		 5206 if (!sym_sec)
5207 /* This is an undefined symbol. It can never
6a631e86 5208 be resolved. */
ffcb4889 5209 continue;
fe33d2fa 5210
906e58ca
NC		 5211 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5212 sym_value = sym->st_value;
5213 destination = (sym_value + irela->r_addend
5214 + sym_sec->output_offset
5215 + sym_sec->output_section->vma);
34e77a92 5216 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5217 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5218 sym_name
5219 = bfd_elf_string_from_elf_section (input_bfd,
5220 symtab_hdr->sh_link,
5221 sym->st_name);
906e58ca
NC		 5222 }
5223 else
5224 {
5225 /* It's an external symbol. */
906e58ca
NC		 5226 while (hash->root.root.type == bfd_link_hash_indirect
5227 || hash->root.root.type == bfd_link_hash_warning)
5228 hash = ((struct elf32_arm_link_hash_entry *)
5229 hash->root.root.u.i.link);
5230
5231 if (hash->root.root.type == bfd_link_hash_defined
5232 || hash->root.root.type == bfd_link_hash_defweak)
5233 {
5234 sym_sec = hash->root.root.u.def.section;
5235 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5236
5237 struct elf32_arm_link_hash_table *globals =
5238 elf32_arm_hash_table (info);
5239
5240 /* For a destination in a shared library,
5241 use the PLT stub as target address to
5242 decide whether a branch stub is
5243 needed. */
4dfe6ac6 5244 if (globals != NULL
362d30a1 5245 && globals->root.splt != NULL
4dfe6ac6 5246 && hash != NULL
022f8312
CL		 5247 && hash->root.plt.offset != (bfd_vma) -1)
5248 {
362d30a1 5249 sym_sec = globals->root.splt;
022f8312
CL		 5250 sym_value = hash->root.plt.offset;
5251 if (sym_sec->output_section != NULL)
5252 destination = (sym_value
5253 + sym_sec->output_offset
5254 + sym_sec->output_section->vma);
5255 }
5256 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5257 destination = (sym_value + irela->r_addend
5258 + sym_sec->output_offset
5259 + sym_sec->output_section->vma);
5260 }
69c5861e
CL		 5261 else if ((hash->root.root.type == bfd_link_hash_undefined)
5262 || (hash->root.root.type == bfd_link_hash_undefweak))
5263 {
5264 /* For a shared library, use the PLT stub as
5265 target address to decide whether a long
5266 branch stub is needed.
5267 For absolute code, they cannot be handled. */
5268 struct elf32_arm_link_hash_table *globals =
5269 elf32_arm_hash_table (info);
5270
4dfe6ac6 5271 if (globals != NULL
362d30a1 5272 && globals->root.splt != NULL
4dfe6ac6 5273 && hash != NULL
69c5861e
CL		 5274 && hash->root.plt.offset != (bfd_vma) -1)
5275 {
362d30a1 5276 sym_sec = globals->root.splt;
69c5861e
CL		 5277 sym_value = hash->root.plt.offset;
5278 if (sym_sec->output_section != NULL)
5279 destination = (sym_value
5280 + sym_sec->output_offset
5281 + sym_sec->output_section->vma);
5282 }
5283 else
5284 continue;
5285 }
906e58ca
NC		 5286 else
5287 {
5288 bfd_set_error (bfd_error_bad_value);
5289 goto error_ret_free_internal;
5290 }
34e77a92 5291 st_type = hash->root.type;
35fc36a8 5292 branch_type = hash->root.target_internal;
7413f23f 5293 sym_name = hash->root.root.root.string;
906e58ca
NC		 5294 }
5295
48229727 5296 do
7413f23f 5297 {
48229727
JB		 5298 /* Determine what (if any) linker stub is needed. */
5299 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5300 st_type, &branch_type,
5301 hash, destination, sym_sec,
48229727
JB		 5302 input_bfd, sym_name);
5303 if (stub_type == arm_stub_none)
5304 break;
5305
5306 /* Support for grouping stub sections. */
5307 id_sec = htab->stub_group[section->id].link_sec;
5308
5309 /* Get the name of this stub. */
5310 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5311 irela, stub_type);
48229727
JB		 5312 if (!stub_name)
5313 goto error_ret_free_internal;
5314
5315 /* We've either created a stub for this reloc already,
5316 or we are about to. */
5317 created_stub = TRUE;
5318
5319 stub_entry = arm_stub_hash_lookup
5320 (&htab->stub_hash_table, stub_name,
5321 FALSE, FALSE);
5322 if (stub_entry != NULL)
5323 {
5324 /* The proper stub has already been created. */
5325 free (stub_name);
eb7c4339 5326 stub_entry->target_value = sym_value;
48229727
JB		 5327 break;
5328 }
7413f23f 5329
48229727
JB		 5330 stub_entry = elf32_arm_add_stub (stub_name, section,
5331 htab);
5332 if (stub_entry == NULL)
5333 {
5334 free (stub_name);
5335 goto error_ret_free_internal;
5336 }
7413f23f 5337
99059e56
RM		 5338 stub_entry->target_value = sym_value;
5339 stub_entry->target_section = sym_sec;
5340 stub_entry->stub_type = stub_type;
5341 stub_entry->h = hash;
5342 stub_entry->branch_type = branch_type;
5343
5344 if (sym_name == NULL)
5345 sym_name = "unnamed";
5346 stub_entry->output_name = (char *)
5347 bfd_alloc (htab->stub_bfd,
5348 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5349 + strlen (sym_name));
5350 if (stub_entry->output_name == NULL)
5351 {
5352 free (stub_name);
5353 goto error_ret_free_internal;
5354 }
5355
5356 /* For historical reasons, use the existing names for
5357 ARM-to-Thumb and Thumb-to-ARM stubs. */
5358 if ((r_type == (unsigned int) R_ARM_THM_CALL
c5423981
TG		 5359 || r_type == (unsigned int) R_ARM_THM_JUMP24
5360 || r_type == (unsigned int) R_ARM_THM_JUMP19)
35fc36a8 5361 && branch_type == ST_BRANCH_TO_ARM)
99059e56
RM		 5362 sprintf (stub_entry->output_name,
5363 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5364 else if ((r_type == (unsigned int) R_ARM_CALL
35fc36a8
RS		 5365 || r_type == (unsigned int) R_ARM_JUMP24)
5366 && branch_type == ST_BRANCH_TO_THUMB)
99059e56
RM		 5367 sprintf (stub_entry->output_name,
5368 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5369 else
5370 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5371 sym_name);
5372
5373 stub_changed = TRUE;
5374 }
5375 while (0);
5376
5377 /* Look for relocations which might trigger Cortex-A8
5378 erratum. */
5379 if (htab->fix_cortex_a8
5380 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5381 || r_type == (unsigned int) R_ARM_THM_JUMP19
5382 || r_type == (unsigned int) R_ARM_THM_CALL
5383 || r_type == (unsigned int) R_ARM_THM_XPC22))
5384 {
5385 bfd_vma from = section->output_section->vma
5386 + section->output_offset
5387 + irela->r_offset;
5388
5389 if ((from & 0xfff) == 0xffe)
5390 {
5391 /* Found a candidate. Note we haven't checked the
5392 destination is within 4K here: if we do so (and
5393 don't create an entry in a8_relocs) we can't tell
5394 that a branch should have been relocated when
5395 scanning later. */
5396 if (num_a8_relocs == a8_reloc_table_size)
5397 {
5398 a8_reloc_table_size *= 2;
5399 a8_relocs = (struct a8_erratum_reloc *)
5400 bfd_realloc (a8_relocs,
5401 sizeof (struct a8_erratum_reloc)
5402 * a8_reloc_table_size);
5403 }
5404
5405 a8_relocs[num_a8_relocs].from = from;
5406 a8_relocs[num_a8_relocs].destination = destination;
5407 a8_relocs[num_a8_relocs].r_type = r_type;
5408 a8_relocs[num_a8_relocs].branch_type = branch_type;
5409 a8_relocs[num_a8_relocs].sym_name = sym_name;
5410 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5411 a8_relocs[num_a8_relocs].hash = hash;
5412
5413 num_a8_relocs++;
5414 }
5415 }
906e58ca
NC		 5416 }
5417
99059e56
RM		 5418 /* We're done with the internal relocs, free them. */
5419 if (elf_section_data (section)->relocs == NULL)
5420 free (internal_relocs);
5421 }
48229727 5422
99059e56 5423 if (htab->fix_cortex_a8)
48229727 5424 {
99059e56
RM		 5425 /* Sort relocs which might apply to Cortex-A8 erratum. */
5426 qsort (a8_relocs, num_a8_relocs,
eb7c4339 5427 sizeof (struct a8_erratum_reloc),
99059e56 5428 &a8_reloc_compare);
48229727 5429
99059e56
RM		 5430 /* Scan for branches which might trigger Cortex-A8 erratum. */
5431 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
48229727 5432 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5433 a8_relocs, num_a8_relocs,
5434 prev_num_a8_fixes, &stub_changed)
5435 != 0)
48229727 5436 goto error_ret_free_local;
5e681ec4 5437 }
5e681ec4
PB		 5438 }
5439
eb7c4339 5440 if (prev_num_a8_fixes != num_a8_fixes)
99059e56 5441 stub_changed = TRUE;
48229727 5442
906e58ca
NC		 5443 if (!stub_changed)
5444 break;
5e681ec4 5445
906e58ca
NC		 5446 /* OK, we've added some stubs. Find out the new size of the
5447 stub sections. */
5448 for (stub_sec = htab->stub_bfd->sections;
5449 stub_sec != NULL;
5450 stub_sec = stub_sec->next)
3e6b1042
DJ		 5451 {
5452 /* Ignore non-stub sections. */
5453 if (!strstr (stub_sec->name, STUB_SUFFIX))
5454 continue;
5455
5456 stub_sec->size = 0;
5457 }
b34b2d70 5458
906e58ca
NC		 5459 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5460
48229727
JB		 5461 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5462 if (htab->fix_cortex_a8)
99059e56
RM		 5463 for (i = 0; i < num_a8_fixes; i++)
5464 {
48229727
JB		 5465 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5466 a8_fixes[i].section, htab);
5467
5468 if (stub_sec == NULL)
5469 goto error_ret_free_local;
5470
99059e56
RM		 5471 stub_sec->size
5472 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5473 NULL);
5474 }
48229727
JB		 5475
5476
906e58ca
NC		 5477 /* Ask the linker to do its stuff. */
5478 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5479 }
5480
48229727
JB		 5481 /* Add stubs for Cortex-A8 erratum fixes now. */
5482 if (htab->fix_cortex_a8)
5483 {
5484 for (i = 0; i < num_a8_fixes; i++)
99059e56
RM		 5485 {
5486 struct elf32_arm_stub_hash_entry *stub_entry;
5487 char *stub_name = a8_fixes[i].stub_name;
5488 asection *section = a8_fixes[i].section;
5489 unsigned int section_id = a8_fixes[i].section->id;
5490 asection *link_sec = htab->stub_group[section_id].link_sec;
5491 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5492 const insn_sequence *template_sequence;
5493 int template_size, size = 0;
5494
5495 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5496 TRUE, FALSE);
5497 if (stub_entry == NULL)
5498 {
5499 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5500 section->owner,
5501 stub_name);
5502 return FALSE;
5503 }
5504
5505 stub_entry->stub_sec = stub_sec;
5506 stub_entry->stub_offset = 0;
5507 stub_entry->id_sec = link_sec;
5508 stub_entry->stub_type = a8_fixes[i].stub_type;
5509 stub_entry->target_section = a8_fixes[i].section;
5510 stub_entry->target_value = a8_fixes[i].offset;
5511 stub_entry->target_addend = a8_fixes[i].addend;
5512 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5513 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5514
99059e56
RM		 5515 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5516 &template_sequence,
5517 &template_size);
48229727 5518
99059e56
RM		 5519 stub_entry->stub_size = size;
5520 stub_entry->stub_template = template_sequence;
5521 stub_entry->stub_template_size = template_size;
5522 }
48229727
JB		 5523
5524 /* Stash the Cortex-A8 erratum fix array for use later in
99059e56 5525 elf32_arm_write_section(). */
48229727
JB		 5526 htab->a8_erratum_fixes = a8_fixes;
5527 htab->num_a8_erratum_fixes = num_a8_fixes;
5528 }
5529 else
5530 {
5531 htab->a8_erratum_fixes = NULL;
5532 htab->num_a8_erratum_fixes = 0;
5533 }
906e58ca
NC		 5534 return TRUE;
5535
5536 error_ret_free_local:
5537 return FALSE;
5e681ec4
PB		 5538}
5539
906e58ca
NC		 5540/* Build all the stubs associated with the current output file. The
5541 stubs are kept in a hash table attached to the main linker hash
5542 table. We also set up the .plt entries for statically linked PIC
5543 functions here. This function is called via arm_elf_finish in the
5544 linker. */
252b5132 5545
906e58ca
NC		 5546bfd_boolean
5547elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5548{
906e58ca
NC		 5549 asection *stub_sec;
5550 struct bfd_hash_table *table;
5551 struct elf32_arm_link_hash_table *htab;
252b5132 5552
906e58ca 5553 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5554 if (htab == NULL)
5555 return FALSE;
252b5132 5556
906e58ca
NC		 5557 for (stub_sec = htab->stub_bfd->sections;
5558 stub_sec != NULL;
5559 stub_sec = stub_sec->next)
252b5132 5560 {
906e58ca
NC		 5561 bfd_size_type size;
5562
8029a119 5563 /* Ignore non-stub sections. */
906e58ca
NC		 5564 if (!strstr (stub_sec->name, STUB_SUFFIX))
5565 continue;
5566
5567 /* Allocate memory to hold the linker stubs. */
5568 size = stub_sec->size;
21d799b5 5569 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5570 if (stub_sec->contents == NULL && size != 0)
5571 return FALSE;
5572 stub_sec->size = 0;
252b5132
RH		 5573 }
5574
906e58ca
NC		 5575 /* Build the stubs as directed by the stub hash table. */
5576 table = &htab->stub_hash_table;
5577 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5578 if (htab->fix_cortex_a8)
5579 {
5580 /* Place the cortex a8 stubs last. */
5581 htab->fix_cortex_a8 = -1;
5582 bfd_hash_traverse (table, arm_build_one_stub, info);
5583 }
252b5132 5584
906e58ca 5585 return TRUE;
252b5132
RH		 5586}
5587
9b485d32
NC		 5588/* Locate the Thumb encoded calling stub for NAME. */
5589
252b5132 5590static struct elf_link_hash_entry *
57e8b36a
NC		 5591find_thumb_glue (struct bfd_link_info *link_info,
5592 const char *name,
f2a9dd69 5593 char **error_message)
252b5132
RH		 5594{
5595 char *tmp_name;
5596 struct elf_link_hash_entry *hash;
5597 struct elf32_arm_link_hash_table *hash_table;
5598
5599 /* We need a pointer to the armelf specific hash table. */
5600 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5601 if (hash_table == NULL)
5602 return NULL;
252b5132 5603
21d799b5 5604 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5605 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5606
5607 BFD_ASSERT (tmp_name);
5608
5609 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5610
5611 hash = elf_link_hash_lookup
b34976b6 5612 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5613
b1657152
AM		 5614 if (hash == NULL
5615 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5616 tmp_name, name) == -1)
5617 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5618
5619 free (tmp_name);
5620
5621 return hash;
5622}
5623
9b485d32
NC		 5624/* Locate the ARM encoded calling stub for NAME. */
5625
252b5132 5626static struct elf_link_hash_entry *
57e8b36a
NC		 5627find_arm_glue (struct bfd_link_info *link_info,
5628 const char *name,
f2a9dd69 5629 char **error_message)
252b5132
RH		 5630{
5631 char *tmp_name;
5632 struct elf_link_hash_entry *myh;
5633 struct elf32_arm_link_hash_table *hash_table;
5634
5635 /* We need a pointer to the elfarm specific hash table. */
5636 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5637 if (hash_table == NULL)
5638 return NULL;
252b5132 5639
21d799b5 5640 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5641 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5642
5643 BFD_ASSERT (tmp_name);
5644
5645 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5646
5647 myh = elf_link_hash_lookup
b34976b6 5648 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5649
b1657152
AM		 5650 if (myh == NULL
5651 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5652 tmp_name, name) == -1)
5653 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5654
5655 free (tmp_name);
5656
5657 return myh;
5658}
5659
8f6277f5 5660/* ARM->Thumb glue (static images):
252b5132
RH		 5661
5662 .arm
5663 __func_from_arm:
5664 ldr r12, __func_addr
5665 bx r12
5666 __func_addr:
906e58ca 5667 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5668
26079076
PB		 5669 (v5t static images)
5670 .arm
5671 __func_from_arm:
5672 ldr pc, __func_addr
5673 __func_addr:
906e58ca 5674 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5675
8f6277f5
PB		 5676 (relocatable images)
5677 .arm
5678 __func_from_arm:
5679 ldr r12, __func_offset
5680 add r12, r12, pc
5681 bx r12
5682 __func_offset:
8029a119 5683 .word func - . */
8f6277f5
PB		 5684
5685#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5686static const insn32 a2t1_ldr_insn = 0xe59fc000;
5687static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5688static const insn32 a2t3_func_addr_insn = 0x00000001;
5689
26079076
PB		 5690#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5691static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5692static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5693
8f6277f5
PB		 5694#define ARM2THUMB_PIC_GLUE_SIZE 16
5695static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5696static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5697static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5698
9b485d32 5699/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5700
8029a119
NC		 5701 .thumb .thumb
5702 .align 2 .align 2
5703 __func_from_thumb: __func_from_thumb:
5704 bx pc push {r6, lr}
5705 nop ldr r6, __func_addr
5706 .arm mov lr, pc
5707 b func bx r6
99059e56
RM		 5708 .arm
5709 ;; back_to_thumb
5710 ldmia r13! {r6, lr}
5711 bx lr
5712 __func_addr:
5713 .word func */
252b5132
RH		 5714
5715#define THUMB2ARM_GLUE_SIZE 8
5716static const insn16 t2a1_bx_pc_insn = 0x4778;
5717static const insn16 t2a2_noop_insn = 0x46c0;
5718static const insn32 t2a3_b_insn = 0xea000000;
5719
c7b8f16e
JB		 5720#define VFP11_ERRATUM_VENEER_SIZE 8
5721
845b51d6
PB		 5722#define ARM_BX_VENEER_SIZE 12
5723static const insn32 armbx1_tst_insn = 0xe3100001;
5724static const insn32 armbx2_moveq_insn = 0x01a0f000;
5725static const insn32 armbx3_bx_insn = 0xe12fff10;
5726
7e392df6 5727#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5728static void
5729arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5730{
5731 asection * s;
8029a119 5732 bfd_byte * contents;
252b5132 5733
8029a119 5734 if (size == 0)
3e6b1042
DJ		 5735 {
5736 /* Do not include empty glue sections in the output. */
5737 if (abfd != NULL)
5738 {
3d4d4302 5739 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5740 if (s != NULL)
5741 s->flags |= SEC_EXCLUDE;
5742 }
5743 return;
5744 }
252b5132 5745
8029a119 5746 BFD_ASSERT (abfd != NULL);
252b5132 5747
3d4d4302 5748 s = bfd_get_linker_section (abfd, name);
8029a119 5749 BFD_ASSERT (s != NULL);
252b5132 5750
21d799b5 5751 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5752
8029a119
NC		 5753 BFD_ASSERT (s->size == size);
5754 s->contents = contents;
5755}
906e58ca 5756
8029a119
NC		 5757bfd_boolean
5758bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5759{
5760 struct elf32_arm_link_hash_table * globals;
906e58ca 5761
8029a119
NC		 5762 globals = elf32_arm_hash_table (info);
5763 BFD_ASSERT (globals != NULL);
906e58ca 5764
8029a119
NC		 5765 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5766 globals->arm_glue_size,
5767 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5768
8029a119
NC		 5769 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5770 globals->thumb_glue_size,
5771 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5772
8029a119
NC		 5773 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5774 globals->vfp11_erratum_glue_size,
5775 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5776
8029a119
NC		 5777 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5778 globals->bx_glue_size,
845b51d6
PB		 5779 ARM_BX_GLUE_SECTION_NAME);
5780
b34976b6 5781 return TRUE;
252b5132
RH		 5782}
5783
a4fd1a8e 5784/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5785 returns the symbol identifying the stub. */
5786
a4fd1a8e 5787static struct elf_link_hash_entry *
57e8b36a
NC		 5788record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5789 struct elf_link_hash_entry * h)
252b5132
RH		 5790{
5791 const char * name = h->root.root.string;
63b0f745 5792 asection * s;
252b5132
RH		 5793 char * tmp_name;
5794 struct elf_link_hash_entry * myh;
14a793b2 5795 struct bfd_link_hash_entry * bh;
252b5132 5796 struct elf32_arm_link_hash_table * globals;
dc810e39 5797 bfd_vma val;
2f475487 5798 bfd_size_type size;
252b5132
RH		 5799
5800 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5801 BFD_ASSERT (globals != NULL);
5802 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5803
3d4d4302 5804 s = bfd_get_linker_section
252b5132
RH		 5805 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5806
252b5132
RH		 5807 BFD_ASSERT (s != NULL);
5808
21d799b5 5809 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5810 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5811
5812 BFD_ASSERT (tmp_name);
5813
5814 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5815
5816 myh = elf_link_hash_lookup
b34976b6 5817 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5818
5819 if (myh != NULL)
5820 {
9b485d32 5821 /* We've already seen this guy. */
252b5132 5822 free (tmp_name);
a4fd1a8e 5823 return myh;
252b5132
RH		 5824 }
5825
57e8b36a
NC		 5826 /* The only trick here is using hash_table->arm_glue_size as the value.
5827 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5828 putting it. The +1 on the value marks that the stub has not been
5829 output yet - not that it is a Thumb function. */
14a793b2 5830 bh = NULL;
dc810e39
AM		 5831 val = globals->arm_glue_size + 1;
5832 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5833 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5834 NULL, TRUE, FALSE, &bh);
252b5132 5835
b7693d02
DJ		 5836 myh = (struct elf_link_hash_entry *) bh;
5837 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5838 myh->forced_local = 1;
5839
252b5132
RH		 5840 free (tmp_name);
5841
0e1862bb
L		 5842 if (bfd_link_pic (link_info)
5843 || globals->root.is_relocatable_executable
27e55c4d 5844 || globals->pic_veneer)
2f475487 5845 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5846 else if (globals->use_blx)
5847 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5848 else
2f475487
AM		 5849 size = ARM2THUMB_STATIC_GLUE_SIZE;
5850
5851 s->size += size;
5852 globals->arm_glue_size += size;
252b5132 5853
a4fd1a8e 5854 return myh;
252b5132
RH		 5855}
5856
845b51d6
PB		 5857/* Allocate space for ARMv4 BX veneers. */
5858
5859static void
5860record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5861{
5862 asection * s;
5863 struct elf32_arm_link_hash_table *globals;
5864 char *tmp_name;
5865 struct elf_link_hash_entry *myh;
5866 struct bfd_link_hash_entry *bh;
5867 bfd_vma val;
5868
5869 /* BX PC does not need a veneer. */
5870 if (reg == 15)
5871 return;
5872
5873 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5874 BFD_ASSERT (globals != NULL);
5875 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5876
5877 /* Check if this veneer has already been allocated. */
5878 if (globals->bx_glue_offset[reg])
5879 return;
5880
3d4d4302 5881 s = bfd_get_linker_section
845b51d6
PB		 5882 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5883
5884 BFD_ASSERT (s != NULL);
5885
5886 /* Add symbol for veneer. */
21d799b5
NC		 5887 tmp_name = (char *)
5888 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5889
845b51d6 5890 BFD_ASSERT (tmp_name);
906e58ca 5891
845b51d6 5892 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5893
845b51d6
PB		 5894 myh = elf_link_hash_lookup
5895 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5896
845b51d6 5897 BFD_ASSERT (myh == NULL);
906e58ca 5898
845b51d6
PB		 5899 bh = NULL;
5900 val = globals->bx_glue_size;
5901 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
99059e56
RM		 5902 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5903 NULL, TRUE, FALSE, &bh);
845b51d6
PB		 5904
5905 myh = (struct elf_link_hash_entry *) bh;
5906 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5907 myh->forced_local = 1;
5908
5909 s->size += ARM_BX_VENEER_SIZE;
5910 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5911 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5912}
5913
5914
c7b8f16e
JB		 5915/* Add an entry to the code/data map for section SEC. */
5916
5917static void
5918elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5919{
5920 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5921 unsigned int newidx;
906e58ca 5922
c7b8f16e
JB		 5923 if (sec_data->map == NULL)
5924 {
21d799b5 5925 sec_data->map = (elf32_arm_section_map *)
99059e56 5926 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5927 sec_data->mapcount = 0;
5928 sec_data->mapsize = 1;
5929 }
906e58ca 5930
c7b8f16e 5931 newidx = sec_data->mapcount++;
906e58ca 5932
c7b8f16e
JB		 5933 if (sec_data->mapcount > sec_data->mapsize)
5934 {
5935 sec_data->mapsize *= 2;
21d799b5 5936 sec_data->map = (elf32_arm_section_map *)
99059e56
RM		 5937 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5938 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5939 }
5940
5941 if (sec_data->map)
5942 {
5943 sec_data->map[newidx].vma = vma;
5944 sec_data->map[newidx].type = type;
c7b8f16e 5945 }
c7b8f16e
JB		 5946}
5947
5948
5949/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5950 veneers are handled for now. */
5951
5952static bfd_vma
5953record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
99059e56
RM		 5954 elf32_vfp11_erratum_list *branch,
5955 bfd *branch_bfd,
5956 asection *branch_sec,
5957 unsigned int offset)
c7b8f16e
JB		 5958{
5959 asection *s;
5960 struct elf32_arm_link_hash_table *hash_table;
5961 char *tmp_name;
5962 struct elf_link_hash_entry *myh;
5963 struct bfd_link_hash_entry *bh;
5964 bfd_vma val;
5965 struct _arm_elf_section_data *sec_data;
c7b8f16e 5966 elf32_vfp11_erratum_list *newerr;
906e58ca 5967
c7b8f16e 5968 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5969 BFD_ASSERT (hash_table != NULL);
5970 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5971
3d4d4302 5972 s = bfd_get_linker_section
c7b8f16e 5973 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5974
c7b8f16e 5975 sec_data = elf32_arm_section_data (s);
906e58ca 5976
c7b8f16e 5977 BFD_ASSERT (s != NULL);
906e58ca 5978
21d799b5 5979 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 5980 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5981
c7b8f16e 5982 BFD_ASSERT (tmp_name);
906e58ca 5983
c7b8f16e
JB		 5984 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5985 hash_table->num_vfp11_fixes);
906e58ca 5986
c7b8f16e
JB		 5987 myh = elf_link_hash_lookup
5988 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5989
c7b8f16e 5990 BFD_ASSERT (myh == NULL);
906e58ca 5991
c7b8f16e
JB		 5992 bh = NULL;
5993 val = hash_table->vfp11_erratum_glue_size;
5994 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
99059e56
RM		 5995 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5996 NULL, TRUE, FALSE, &bh);
c7b8f16e
JB		 5997
5998 myh = (struct elf_link_hash_entry *) bh;
5999 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6000 myh->forced_local = 1;
6001
6002 /* Link veneer back to calling location. */
c7e2358a 6003 sec_data->erratumcount += 1;
21d799b5
NC		 6004 newerr = (elf32_vfp11_erratum_list *)
6005 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 6006
c7b8f16e
JB		 6007 newerr->type = VFP11_ERRATUM_ARM_VENEER;
6008 newerr->vma = -1;
6009 newerr->u.v.branch = branch;
6010 newerr->u.v.id = hash_table->num_vfp11_fixes;
6011 branch->u.b.veneer = newerr;
6012
6013 newerr->next = sec_data->erratumlist;
6014 sec_data->erratumlist = newerr;
6015
6016 /* A symbol for the return from the veneer. */
6017 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6018 hash_table->num_vfp11_fixes);
6019
6020 myh = elf_link_hash_lookup
6021 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 6022
c7b8f16e
JB		 6023 if (myh != NULL)
6024 abort ();
6025
6026 bh = NULL;
6027 val = offset + 4;
6028 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6029 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 6030
c7b8f16e
JB		 6031 myh = (struct elf_link_hash_entry *) bh;
6032 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6033 myh->forced_local = 1;
6034
6035 free (tmp_name);
906e58ca 6036
c7b8f16e
JB		 6037 /* Generate a mapping symbol for the veneer section, and explicitly add an
6038 entry for that symbol to the code/data map for the section. */
6039 if (hash_table->vfp11_erratum_glue_size == 0)
6040 {
6041 bh = NULL;
6042 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
99059e56 6043 ever requires this erratum fix. */
c7b8f16e
JB		 6044 _bfd_generic_link_add_one_symbol (link_info,
6045 hash_table->bfd_of_glue_owner, "$a",
6046 BSF_LOCAL, s, 0, NULL,
99059e56 6047 TRUE, FALSE, &bh);
c7b8f16e
JB		 6048
6049 myh = (struct elf_link_hash_entry *) bh;
6050 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6051 myh->forced_local = 1;
906e58ca 6052
c7b8f16e 6053 /* The elf32_arm_init_maps function only cares about symbols from input
99059e56
RM		 6054 BFDs. We must make a note of this generated mapping symbol
6055 ourselves so that code byteswapping works properly in
6056 elf32_arm_write_section. */
c7b8f16e
JB		 6057 elf32_arm_section_map_add (s, 'a', 0);
6058 }
906e58ca 6059
c7b8f16e
JB		 6060 s->size += VFP11_ERRATUM_VENEER_SIZE;
6061 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6062 hash_table->num_vfp11_fixes++;
906e58ca 6063
c7b8f16e
JB		 6064 /* The offset of the veneer. */
6065 return val;
6066}
6067
8029a119 6068#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 6069 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6070 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 6071
6072/* Create a fake section for use by the ARM backend of the linker. */
6073
6074static bfd_boolean
6075arm_make_glue_section (bfd * abfd, const char * name)
6076{
6077 asection * sec;
6078
3d4d4302 6079 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 6080 if (sec != NULL)
6081 /* Already made. */
6082 return TRUE;
6083
3d4d4302 6084 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6085
6086 if (sec == NULL
6087 || !bfd_set_section_alignment (abfd, sec, 2))
6088 return FALSE;
6089
6090 /* Set the gc mark to prevent the section from being removed by garbage
6091 collection, despite the fact that no relocs refer to this section. */
6092 sec->gc_mark = 1;
6093
6094 return TRUE;
6095}
6096
1db37fe6
YG		 6097/* Set size of .plt entries. This function is called from the
6098 linker scripts in ld/emultempl/{armelf}.em. */
6099
6100void
6101bfd_elf32_arm_use_long_plt (void)
6102{
6103 elf32_arm_use_long_plt_entry = TRUE;
6104}
6105
8afb0e02
NC		 6106/* Add the glue sections to ABFD. This function is called from the
6107 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6108
b34976b6 6109bfd_boolean
57e8b36a
NC		 6110bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6111 struct bfd_link_info *info)
252b5132 6112{
8afb0e02
NC		 6113 /* If we are only performing a partial
6114 link do not bother adding the glue. */
0e1862bb 6115 if (bfd_link_relocatable (info))
b34976b6 6116 return TRUE;
252b5132 6117
8029a119
NC		 6118 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6119 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6120 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6121 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6122}
6123
6124/* Select a BFD to be used to hold the sections used by the glue code.
6125 This function is called from the linker scripts in ld/emultempl/
8029a119 6126 {armelf/pe}.em. */
8afb0e02 6127
b34976b6 6128bfd_boolean
57e8b36a 6129bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6130{
6131 struct elf32_arm_link_hash_table *globals;
6132
6133 /* If we are only performing a partial link
6134 do not bother getting a bfd to hold the glue. */
0e1862bb 6135 if (bfd_link_relocatable (info))
b34976b6 6136 return TRUE;
8afb0e02 6137
b7693d02
DJ		 6138 /* Make sure we don't attach the glue sections to a dynamic object. */
6139 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6140
8afb0e02 6141 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6142 BFD_ASSERT (globals != NULL);
6143
6144 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6145 return TRUE;
8afb0e02 6146
252b5132
RH		 6147 /* Save the bfd for later use. */
6148 globals->bfd_of_glue_owner = abfd;
cedb70c5 6149
b34976b6 6150 return TRUE;
252b5132
RH		 6151}
6152
906e58ca
NC		 6153static void
6154check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6155{
2de70689
MGD		 6156 int cpu_arch;
6157
b38cadfb 6158 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6159 Tag_CPU_arch);
6160
6161 if (globals->fix_arm1176)
6162 {
6163 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6164 globals->use_blx = 1;
6165 }
6166 else
6167 {
6168 if (cpu_arch > TAG_CPU_ARCH_V4T)
6169 globals->use_blx = 1;
6170 }
39b41c9c
PB		 6171}
6172
b34976b6 6173bfd_boolean
57e8b36a 6174bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6175 struct bfd_link_info *link_info)
252b5132
RH		 6176{
6177 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6178 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6179 Elf_Internal_Rela *irel, *irelend;
6180 bfd_byte *contents = NULL;
252b5132
RH		 6181
6182 asection *sec;
6183 struct elf32_arm_link_hash_table *globals;
6184
6185 /* If we are only performing a partial link do not bother
6186 to construct any glue. */
0e1862bb 6187 if (bfd_link_relocatable (link_info))
b34976b6 6188 return TRUE;
252b5132 6189
39ce1a6a
NC		 6190 /* Here we have a bfd that is to be included on the link. We have a
6191 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6192 globals = elf32_arm_hash_table (link_info);
252b5132 6193 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6194
6195 check_use_blx (globals);
252b5132 6196
d504ffc8 6197 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6198 {
d003868e
AM		 6199 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6200 abfd);
e489d0ae
PB		 6201 return FALSE;
6202 }
f21f3fe0 6203
39ce1a6a
NC		 6204 /* PR 5398: If we have not decided to include any loadable sections in
6205 the output then we will not have a glue owner bfd. This is OK, it
6206 just means that there is nothing else for us to do here. */
6207 if (globals->bfd_of_glue_owner == NULL)
6208 return TRUE;
6209
252b5132
RH		 6210 /* Rummage around all the relocs and map the glue vectors. */
6211 sec = abfd->sections;
6212
6213 if (sec == NULL)
b34976b6 6214 return TRUE;
252b5132
RH		 6215
6216 for (; sec != NULL; sec = sec->next)
6217 {
6218 if (sec->reloc_count == 0)
6219 continue;
6220
2f475487
AM		 6221 if ((sec->flags & SEC_EXCLUDE) != 0)
6222 continue;
6223
0ffa91dd 6224 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6225
9b485d32 6226 /* Load the relocs. */
6cdc0ccc 6227 internal_relocs
906e58ca 6228 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6229
6cdc0ccc
AM		 6230 if (internal_relocs == NULL)
6231 goto error_return;
252b5132 6232
6cdc0ccc
AM		 6233 irelend = internal_relocs + sec->reloc_count;
6234 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6235 {
6236 long r_type;
6237 unsigned long r_index;
252b5132
RH		 6238
6239 struct elf_link_hash_entry *h;
6240
6241 r_type = ELF32_R_TYPE (irel->r_info);
6242 r_index = ELF32_R_SYM (irel->r_info);
6243
9b485d32 6244 /* These are the only relocation types we care about. */
ba96a88f 6245 if ( r_type != R_ARM_PC24
845b51d6 6246 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6247 continue;
6248
6249 /* Get the section contents if we haven't done so already. */
6250 if (contents == NULL)
6251 {
6252 /* Get cached copy if it exists. */
6253 if (elf_section_data (sec)->this_hdr.contents != NULL)
6254 contents = elf_section_data (sec)->this_hdr.contents;
6255 else
6256 {
6257 /* Go get them off disk. */
57e8b36a 6258 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6259 goto error_return;
6260 }
6261 }
6262
845b51d6
PB		 6263 if (r_type == R_ARM_V4BX)
6264 {
6265 int reg;
6266
6267 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6268 record_arm_bx_glue (link_info, reg);
6269 continue;
6270 }
6271
a7c10850 6272 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6273 h = NULL;
6274
9b485d32 6275 /* We don't care about local symbols. */
252b5132
RH		 6276 if (r_index < symtab_hdr->sh_info)
6277 continue;
6278
9b485d32 6279 /* This is an external symbol. */
252b5132
RH		 6280 r_index -= symtab_hdr->sh_info;
6281 h = (struct elf_link_hash_entry *)
6282 elf_sym_hashes (abfd)[r_index];
6283
6284 /* If the relocation is against a static symbol it must be within
6285 the current section and so cannot be a cross ARM/Thumb relocation. */
6286 if (h == NULL)
6287 continue;
6288
d504ffc8
DJ		 6289 /* If the call will go through a PLT entry then we do not need
6290 glue. */
362d30a1 6291 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6292 continue;
6293
252b5132
RH		 6294 switch (r_type)
6295 {
6296 case R_ARM_PC24:
6297 /* This one is a call from arm code. We need to look up
99059e56
RM		 6298 the target of the call. If it is a thumb target, we
6299 insert glue. */
35fc36a8 6300 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6301 record_arm_to_thumb_glue (link_info, h);
6302 break;
6303
252b5132 6304 default:
c6596c5e 6305 abort ();
252b5132
RH		 6306 }
6307 }
6cdc0ccc
AM		 6308
6309 if (contents != NULL
6310 && elf_section_data (sec)->this_hdr.contents != contents)
6311 free (contents);
6312 contents = NULL;
6313
6314 if (internal_relocs != NULL
6315 && elf_section_data (sec)->relocs != internal_relocs)
6316 free (internal_relocs);
6317 internal_relocs = NULL;
252b5132
RH		 6318 }
6319
b34976b6 6320 return TRUE;
9a5aca8c 6321
252b5132 6322error_return:
6cdc0ccc
AM		 6323 if (contents != NULL
6324 && elf_section_data (sec)->this_hdr.contents != contents)
6325 free (contents);
6326 if (internal_relocs != NULL
6327 && elf_section_data (sec)->relocs != internal_relocs)
6328 free (internal_relocs);
9a5aca8c 6329
b34976b6 6330 return FALSE;
252b5132 6331}
7e392df6 6332#endif
252b5132 6333
eb043451 6334
c7b8f16e
JB		 6335/* Initialise maps of ARM/Thumb/data for input BFDs. */
6336
6337void
6338bfd_elf32_arm_init_maps (bfd *abfd)
6339{
6340 Elf_Internal_Sym *isymbuf;
6341 Elf_Internal_Shdr *hdr;
6342 unsigned int i, localsyms;
6343
af1f4419
NC		 6344 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6345 if (! is_arm_elf (abfd))
6346 return;
6347
c7b8f16e
JB		 6348 if ((abfd->flags & DYNAMIC) != 0)
6349 return;
6350
0ffa91dd 6351 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6352 localsyms = hdr->sh_info;
6353
6354 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6355 should contain the number of local symbols, which should come before any
6356 global symbols. Mapping symbols are always local. */
6357 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6358 NULL);
6359
6360 /* No internal symbols read? Skip this BFD. */
6361 if (isymbuf == NULL)
6362 return;
6363
6364 for (i = 0; i < localsyms; i++)
6365 {
6366 Elf_Internal_Sym *isym = &isymbuf[i];
6367 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6368 const char *name;
906e58ca 6369
c7b8f16e 6370 if (sec != NULL
99059e56
RM		 6371 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6372 {
6373 name = bfd_elf_string_from_elf_section (abfd,
6374 hdr->sh_link, isym->st_name);
906e58ca 6375
99059e56 6376 if (bfd_is_arm_special_symbol_name (name,
c7b8f16e 6377 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
99059e56
RM		 6378 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6379 }
c7b8f16e
JB		 6380 }
6381}
6382
6383
48229727
JB		 6384/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6385 say what they wanted. */
6386
6387void
6388bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6389{
6390 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6391 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6392
4dfe6ac6
NC		 6393 if (globals == NULL)
6394 return;
6395
48229727
JB		 6396 if (globals->fix_cortex_a8 == -1)
6397 {
6398 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6399 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6400 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6401 || out_attr[Tag_CPU_arch_profile].i == 0))
6402 globals->fix_cortex_a8 = 1;
6403 else
6404 globals->fix_cortex_a8 = 0;
6405 }
6406}
6407
6408
c7b8f16e
JB		 6409void
6410bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6411{
6412 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6413 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6414
4dfe6ac6
NC		 6415 if (globals == NULL)
6416 return;
c7b8f16e
JB		 6417 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6418 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6419 {
6420 switch (globals->vfp11_fix)
99059e56
RM		 6421 {
6422 case BFD_ARM_VFP11_FIX_DEFAULT:
6423 case BFD_ARM_VFP11_FIX_NONE:
6424 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6425 break;
6426
6427 default:
6428 /* Give a warning, but do as the user requests anyway. */
6429 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6430 "workaround is not necessary for target architecture"), obfd);
6431 }
c7b8f16e
JB		 6432 }
6433 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6434 /* For earlier architectures, we might need the workaround, but do not
6435 enable it by default. If users is running with broken hardware, they
6436 must enable the erratum fix explicitly. */
6437 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6438}
6439
6440
906e58ca
NC		 6441enum bfd_arm_vfp11_pipe
6442{
c7b8f16e
JB		 6443 VFP11_FMAC,
6444 VFP11_LS,
6445 VFP11_DS,
6446 VFP11_BAD
6447};
6448
6449/* Return a VFP register number. This is encoded as RX:X for single-precision
6450 registers, or X:RX for double-precision registers, where RX is the group of
6451 four bits in the instruction encoding and X is the single extension bit.
6452 RX and X fields are specified using their lowest (starting) bit. The return
6453 value is:
6454
6455 0...31: single-precision registers s0...s31
6456 32...63: double-precision registers d0...d31.
906e58ca 6457
c7b8f16e
JB		 6458 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6459 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6460
c7b8f16e
JB		 6461static unsigned int
6462bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
99059e56 6463 unsigned int x)
c7b8f16e
JB		 6464{
6465 if (is_double)
6466 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6467 else
6468 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6469}
6470
6471/* Set bits in *WMASK according to a register number REG as encoded by
6472 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6473
6474static void
6475bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6476{
6477 if (reg < 32)
6478 *wmask |= 1 << reg;
6479 else if (reg < 48)
6480 *wmask |= 3 << ((reg - 32) * 2);
6481}
6482
6483/* Return TRUE if WMASK overwrites anything in REGS. */
6484
6485static bfd_boolean
6486bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6487{
6488 int i;
906e58ca 6489
c7b8f16e
JB		 6490 for (i = 0; i < numregs; i++)
6491 {
6492 unsigned int reg = regs[i];
6493
6494 if (reg < 32 && (wmask & (1 << reg)) != 0)
99059e56 6495 return TRUE;
906e58ca 6496
c7b8f16e
JB		 6497 reg -= 32;
6498
6499 if (reg >= 16)
99059e56 6500 continue;
906e58ca 6501
c7b8f16e 6502 if ((wmask & (3 << (reg * 2))) != 0)
99059e56 6503 return TRUE;
c7b8f16e 6504 }
906e58ca 6505
c7b8f16e
JB		 6506 return FALSE;
6507}
6508
6509/* In this function, we're interested in two things: finding input registers
6510 for VFP data-processing instructions, and finding the set of registers which
6511 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6512 hold the written set, so FLDM etc. are easy to deal with (we're only
6513 interested in 32 SP registers or 16 dp registers, due to the VFP version
6514 implemented by the chip in question). DP registers are marked by setting
6515 both SP registers in the write mask). */
6516
6517static enum bfd_arm_vfp11_pipe
6518bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
99059e56 6519 int *numregs)
c7b8f16e 6520{
91d6fa6a 6521 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6522 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6523
6524 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6525 {
6526 unsigned int pqrs;
6527 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6528 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6529
6530 pqrs = ((insn & 0x00800000) >> 20)
99059e56
RM		 6531 | ((insn & 0x00300000) >> 19)
6532 | ((insn & 0x00000040) >> 6);
c7b8f16e
JB		 6533
6534 switch (pqrs)
99059e56
RM		 6535 {
6536 case 0: /* fmac[sd]. */
6537 case 1: /* fnmac[sd]. */
6538 case 2: /* fmsc[sd]. */
6539 case 3: /* fnmsc[sd]. */
6540 vpipe = VFP11_FMAC;
6541 bfd_arm_vfp11_write_mask (destmask, fd);
6542 regs[0] = fd;
6543 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6544 regs[2] = fm;
6545 *numregs = 3;
6546 break;
6547
6548 case 4: /* fmul[sd]. */
6549 case 5: /* fnmul[sd]. */
6550 case 6: /* fadd[sd]. */
6551 case 7: /* fsub[sd]. */
6552 vpipe = VFP11_FMAC;
6553 goto vfp_binop;
6554
6555 case 8: /* fdiv[sd]. */
6556 vpipe = VFP11_DS;
6557 vfp_binop:
6558 bfd_arm_vfp11_write_mask (destmask, fd);
6559 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6560 regs[1] = fm;
6561 *numregs = 2;
6562 break;
6563
6564 case 15: /* extended opcode. */
6565 {
6566 unsigned int extn = ((insn >> 15) & 0x1e)
6567 | ((insn >> 7) & 1);
6568
6569 switch (extn)
6570 {
6571 case 0: /* fcpy[sd]. */
6572 case 1: /* fabs[sd]. */
6573 case 2: /* fneg[sd]. */
6574 case 8: /* fcmp[sd]. */
6575 case 9: /* fcmpe[sd]. */
6576 case 10: /* fcmpz[sd]. */
6577 case 11: /* fcmpez[sd]. */
6578 case 16: /* fuito[sd]. */
6579 case 17: /* fsito[sd]. */
6580 case 24: /* ftoui[sd]. */
6581 case 25: /* ftouiz[sd]. */
6582 case 26: /* ftosi[sd]. */
6583 case 27: /* ftosiz[sd]. */
6584 /* These instructions will not bounce due to underflow. */
6585 *numregs = 0;
6586 vpipe = VFP11_FMAC;
6587 break;
6588
6589 case 3: /* fsqrt[sd]. */
6590 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6591 registers to cause the erratum in previous instructions. */
6592 bfd_arm_vfp11_write_mask (destmask, fd);
6593 vpipe = VFP11_DS;
6594 break;
6595
6596 case 15: /* fcvt{ds,sd}. */
6597 {
6598 int rnum = 0;
6599
6600 bfd_arm_vfp11_write_mask (destmask, fd);
c7b8f16e
JB		 6601
6602 /* Only FCVTSD can underflow. */
99059e56
RM		 6603 if ((insn & 0x100) != 0)
6604 regs[rnum++] = fm;
c7b8f16e 6605
99059e56 6606 *numregs = rnum;
c7b8f16e 6607
99059e56
RM		 6608 vpipe = VFP11_FMAC;
6609 }
6610 break;
c7b8f16e 6611
99059e56
RM		 6612 default:
6613 return VFP11_BAD;
6614 }
6615 }
6616 break;
c7b8f16e 6617
99059e56
RM		 6618 default:
6619 return VFP11_BAD;
6620 }
c7b8f16e
JB		 6621 }
6622 /* Two-register transfer. */
6623 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6624 {
6625 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6626
c7b8f16e
JB		 6627 if ((insn & 0x100000) == 0)
6628 {
99059e56
RM		 6629 if (is_double)
6630 bfd_arm_vfp11_write_mask (destmask, fm);
6631 else
6632 {
6633 bfd_arm_vfp11_write_mask (destmask, fm);
6634 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6635 }
c7b8f16e
JB		 6636 }
6637
91d6fa6a 6638 vpipe = VFP11_LS;
c7b8f16e
JB		 6639 }
6640 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6641 {
6642 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6643 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6644
c7b8f16e 6645 switch (puw)
99059e56
RM		 6646 {
6647 case 0: /* Two-reg transfer. We should catch these above. */
6648 abort ();
906e58ca 6649
99059e56
RM		 6650 case 2: /* fldm[sdx]. */
6651 case 3:
6652 case 5:
6653 {
6654 unsigned int i, offset = insn & 0xff;
c7b8f16e 6655
99059e56
RM		 6656 if (is_double)
6657 offset >>= 1;
c7b8f16e 6658
99059e56
RM		 6659 for (i = fd; i < fd + offset; i++)
6660 bfd_arm_vfp11_write_mask (destmask, i);
6661 }
6662 break;
906e58ca 6663
99059e56
RM		 6664 case 4: /* fld[sd]. */
6665 case 6:
6666 bfd_arm_vfp11_write_mask (destmask, fd);
6667 break;
906e58ca 6668
99059e56
RM		 6669 default:
6670 return VFP11_BAD;
6671 }
c7b8f16e 6672
91d6fa6a 6673 vpipe = VFP11_LS;
c7b8f16e
JB		 6674 }
6675 /* Single-register transfer. Note L==0. */
6676 else if ((insn & 0x0f100e10) == 0x0e000a10)
6677 {
6678 unsigned int opcode = (insn >> 21) & 7;
6679 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6680
6681 switch (opcode)
99059e56
RM		 6682 {
6683 case 0: /* fmsr/fmdlr. */
6684 case 1: /* fmdhr. */
6685 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6686 destination register. I don't know if this is exactly right,
6687 but it is the conservative choice. */
6688 bfd_arm_vfp11_write_mask (destmask, fn);
6689 break;
6690
6691 case 7: /* fmxr. */
6692 break;
6693 }
c7b8f16e 6694
91d6fa6a 6695 vpipe = VFP11_LS;
c7b8f16e
JB		 6696 }
6697
91d6fa6a 6698 return vpipe;
c7b8f16e
JB		 6699}
6700
6701
6702static int elf32_arm_compare_mapping (const void * a, const void * b);
6703
6704
6705/* Look for potentially-troublesome code sequences which might trigger the
6706 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6707 (available from ARM) for details of the erratum. A short version is
6708 described in ld.texinfo. */
6709
6710bfd_boolean
6711bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6712{
6713 asection *sec;
6714 bfd_byte *contents = NULL;
6715 int state = 0;
6716 int regs[3], numregs = 0;
6717 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6718 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6719
4dfe6ac6
NC		 6720 if (globals == NULL)
6721 return FALSE;
6722
c7b8f16e
JB		 6723 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6724 The states transition as follows:
906e58ca 6725
c7b8f16e 6726 0 -> 1 (vector) or 0 -> 2 (scalar)
99059e56
RM		 6727 A VFP FMAC-pipeline instruction has been seen. Fill
6728 regs[0]..regs[numregs-1] with its input operands. Remember this
6729 instruction in 'first_fmac'.
c7b8f16e
JB		 6730
6731 1 -> 2
99059e56
RM		 6732 Any instruction, except for a VFP instruction which overwrites
6733 regs[*].
906e58ca 6734
c7b8f16e
JB		 6735 1 -> 3 [ -> 0 ] or
6736 2 -> 3 [ -> 0 ]
99059e56
RM		 6737 A VFP instruction has been seen which overwrites any of regs[*].
6738 We must make a veneer! Reset state to 0 before examining next
6739 instruction.
906e58ca 6740
c7b8f16e 6741 2 -> 0
99059e56
RM		 6742 If we fail to match anything in state 2, reset to state 0 and reset
6743 the instruction pointer to the instruction after 'first_fmac'.
c7b8f16e
JB		 6744
6745 If the VFP11 vector mode is in use, there must be at least two unrelated
6746 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6747 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6748
6749 /* If we are only performing a partial link do not bother
6750 to construct any glue. */
0e1862bb 6751 if (bfd_link_relocatable (link_info))
c7b8f16e
JB		 6752 return TRUE;
6753
0ffa91dd
NC		 6754 /* Skip if this bfd does not correspond to an ELF image. */
6755 if (! is_arm_elf (abfd))
6756 return TRUE;
906e58ca 6757
c7b8f16e
JB		 6758 /* We should have chosen a fix type by the time we get here. */
6759 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6760
6761 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6762 return TRUE;
2e6030b9 6763
33a7ffc2
JM		 6764 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6765 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6766 return TRUE;
6767
c7b8f16e
JB		 6768 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6769 {
6770 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6771 struct _arm_elf_section_data *sec_data;
6772
6773 /* If we don't have executable progbits, we're not interested in this
99059e56 6774 section. Also skip if section is to be excluded. */
c7b8f16e 6775 if (elf_section_type (sec) != SHT_PROGBITS
99059e56
RM		 6776 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6777 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6778 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6779 || sec->output_section == bfd_abs_section_ptr
99059e56
RM		 6780 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6781 continue;
c7b8f16e
JB		 6782
6783 sec_data = elf32_arm_section_data (sec);
906e58ca 6784
c7b8f16e 6785 if (sec_data->mapcount == 0)
99059e56 6786 continue;
906e58ca 6787
c7b8f16e
JB		 6788 if (elf_section_data (sec)->this_hdr.contents != NULL)
6789 contents = elf_section_data (sec)->this_hdr.contents;
6790 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6791 goto error_return;
6792
6793 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6794 elf32_arm_compare_mapping);
6795
6796 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 6797 {
6798 unsigned int span_start = sec_data->map[span].vma;
6799 unsigned int span_end = (span == sec_data->mapcount - 1)
c7b8f16e 6800 ? sec->size : sec_data->map[span + 1].vma;
99059e56
RM		 6801 char span_type = sec_data->map[span].type;
6802
6803 /* FIXME: Only ARM mode is supported at present. We may need to
6804 support Thumb-2 mode also at some point. */
6805 if (span_type != 'a')
6806 continue;
6807
6808 for (i = span_start; i < span_end;)
6809 {
6810 unsigned int next_i = i + 4;
6811 unsigned int insn = bfd_big_endian (abfd)
6812 ? (contents[i] << 24)
6813 | (contents[i + 1] << 16)
6814 | (contents[i + 2] << 8)
6815 | contents[i + 3]
6816 : (contents[i + 3] << 24)
6817 | (contents[i + 2] << 16)
6818 | (contents[i + 1] << 8)
6819 | contents[i];
6820 unsigned int writemask = 0;
6821 enum bfd_arm_vfp11_pipe vpipe;
6822
6823 switch (state)
6824 {
6825 case 0:
6826 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6827 &numregs);
6828 /* I'm assuming the VFP11 erratum can trigger with denorm
6829 operands on either the FMAC or the DS pipeline. This might
6830 lead to slightly overenthusiastic veneer insertion. */
6831 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6832 {
6833 state = use_vector ? 1 : 2;
6834 first_fmac = i;
6835 veneer_of_insn = insn;
6836 }
6837 break;
6838
6839 case 1:
6840 {
6841 int other_regs[3], other_numregs;
6842 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6843 other_regs,
99059e56
RM		 6844 &other_numregs);
6845 if (vpipe != VFP11_BAD
6846 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6847 numregs))
99059e56
RM		 6848 state = 3;
6849 else
6850 state = 2;
6851 }
6852 break;
6853
6854 case 2:
6855 {
6856 int other_regs[3], other_numregs;
6857 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6858 other_regs,
99059e56
RM		 6859 &other_numregs);
6860 if (vpipe != VFP11_BAD
6861 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6862 numregs))
99059e56
RM		 6863 state = 3;
6864 else
6865 {
6866 state = 0;
6867 next_i = first_fmac + 4;
6868 }
6869 }
6870 break;
6871
6872 case 3:
6873 abort (); /* Should be unreachable. */
6874 }
6875
6876 if (state == 3)
6877 {
6878 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6879 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6880
6881 elf32_arm_section_data (sec)->erratumcount += 1;
6882
6883 newerr->u.b.vfp_insn = veneer_of_insn;
6884
6885 switch (span_type)
6886 {
6887 case 'a':
6888 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6889 break;
6890
6891 default:
6892 abort ();
6893 }
6894
6895 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
c7b8f16e
JB		 6896 first_fmac);
6897
99059e56 6898 newerr->vma = -1;
c7b8f16e 6899
99059e56
RM		 6900 newerr->next = sec_data->erratumlist;
6901 sec_data->erratumlist = newerr;
c7b8f16e 6902
99059e56
RM		 6903 state = 0;
6904 }
c7b8f16e 6905
99059e56
RM		 6906 i = next_i;
6907 }
6908 }
906e58ca 6909
c7b8f16e 6910 if (contents != NULL
99059e56
RM		 6911 && elf_section_data (sec)->this_hdr.contents != contents)
6912 free (contents);
c7b8f16e
JB		 6913 contents = NULL;
6914 }
6915
6916 return TRUE;
6917
6918error_return:
6919 if (contents != NULL
6920 && elf_section_data (sec)->this_hdr.contents != contents)
6921 free (contents);
906e58ca 6922
c7b8f16e
JB		 6923 return FALSE;
6924}
6925
6926/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6927 after sections have been laid out, using specially-named symbols. */
6928
6929void
6930bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6931 struct bfd_link_info *link_info)
6932{
6933 asection *sec;
6934 struct elf32_arm_link_hash_table *globals;
6935 char *tmp_name;
906e58ca 6936
0e1862bb 6937 if (bfd_link_relocatable (link_info))
c7b8f16e 6938 return;
2e6030b9
MS		 6939
6940 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6941 if (! is_arm_elf (abfd))
2e6030b9
MS		 6942 return;
6943
c7b8f16e 6944 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6945 if (globals == NULL)
6946 return;
906e58ca 6947
21d799b5 6948 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 6949 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6950
6951 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6952 {
6953 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6954 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6955
c7b8f16e 6956 for (; errnode != NULL; errnode = errnode->next)
99059e56
RM		 6957 {
6958 struct elf_link_hash_entry *myh;
6959 bfd_vma vma;
6960
6961 switch (errnode->type)
6962 {
6963 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6964 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6965 /* Find veneer symbol. */
6966 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
c7b8f16e
JB		 6967 errnode->u.b.veneer->u.v.id);
6968
99059e56
RM		 6969 myh = elf_link_hash_lookup
6970 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6971
99059e56
RM		 6972 if (myh == NULL)
6973 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6974 "`%s'"), abfd, tmp_name);
c7b8f16e 6975
99059e56
RM		 6976 vma = myh->root.u.def.section->output_section->vma
6977 + myh->root.u.def.section->output_offset
6978 + myh->root.u.def.value;
c7b8f16e 6979
99059e56
RM		 6980 errnode->u.b.veneer->vma = vma;
6981 break;
c7b8f16e
JB		 6982
6983 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 6984 case VFP11_ERRATUM_THUMB_VENEER:
6985 /* Find return location. */
6986 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6987 errnode->u.v.id);
c7b8f16e 6988
99059e56
RM		 6989 myh = elf_link_hash_lookup
6990 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6991
99059e56
RM		 6992 if (myh == NULL)
6993 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
c7b8f16e
JB		 6994 "`%s'"), abfd, tmp_name);
6995
99059e56
RM		 6996 vma = myh->root.u.def.section->output_section->vma
6997 + myh->root.u.def.section->output_offset
6998 + myh->root.u.def.value;
c7b8f16e 6999
99059e56
RM		 7000 errnode->u.v.branch->vma = vma;
7001 break;
906e58ca 7002
99059e56
RM		 7003 default:
7004 abort ();
7005 }
7006 }
c7b8f16e 7007 }
906e58ca 7008
c7b8f16e
JB		 7009 free (tmp_name);
7010}
7011
7012
eb043451
PB		 7013/* Set target relocation values needed during linking. */
7014
7015void
bf21ed78
MS		 7016bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7017 struct bfd_link_info *link_info,
eb043451 7018 int target1_is_rel,
319850b4 7019 char * target2_type,
99059e56 7020 int fix_v4bx,
c7b8f16e 7021 int use_blx,
99059e56 7022 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 7023 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 7024 int pic_veneer, int fix_cortex_a8,
7025 int fix_arm1176)
eb043451
PB		 7026{
7027 struct elf32_arm_link_hash_table *globals;
7028
7029 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7030 if (globals == NULL)
7031 return;
eb043451
PB		 7032
7033 globals->target1_is_rel = target1_is_rel;
7034 if (strcmp (target2_type, "rel") == 0)
7035 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 7036 else if (strcmp (target2_type, "abs") == 0)
7037 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 7038 else if (strcmp (target2_type, "got-rel") == 0)
7039 globals->target2_reloc = R_ARM_GOT_PREL;
7040 else
7041 {
7042 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7043 target2_type);
7044 }
319850b4 7045 globals->fix_v4bx = fix_v4bx;
33bfe774 7046 globals->use_blx |= use_blx;
c7b8f16e 7047 globals->vfp11_fix = vfp11_fix;
27e55c4d 7048 globals->pic_veneer = pic_veneer;
48229727 7049 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 7050 globals->fix_arm1176 = fix_arm1176;
bf21ed78 7051
0ffa91dd
NC		 7052 BFD_ASSERT (is_arm_elf (output_bfd));
7053 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 7054 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 7055}
eb043451 7056
12a0a0fd 7057/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 7058
12a0a0fd
PB		 7059static void
7060insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7061{
7062 bfd_vma upper;
7063 bfd_vma lower;
7064 int reloc_sign;
7065
7066 BFD_ASSERT ((offset & 1) == 0);
7067
7068 upper = bfd_get_16 (abfd, insn);
7069 lower = bfd_get_16 (abfd, insn + 2);
7070 reloc_sign = (offset < 0) ? 1 : 0;
7071 upper = (upper & ~(bfd_vma) 0x7ff)
7072 | ((offset >> 12) & 0x3ff)
7073 | (reloc_sign << 10);
906e58ca 7074 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 7075 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7076 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7077 | ((offset >> 1) & 0x7ff);
7078 bfd_put_16 (abfd, upper, insn);
7079 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 7080}
7081
9b485d32
NC		 7082/* Thumb code calling an ARM function. */
7083
252b5132 7084static int
57e8b36a
NC		 7085elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7086 const char * name,
7087 bfd * input_bfd,
7088 bfd * output_bfd,
7089 asection * input_section,
7090 bfd_byte * hit_data,
7091 asection * sym_sec,
7092 bfd_vma offset,
7093 bfd_signed_vma addend,
f2a9dd69
DJ		 7094 bfd_vma val,
7095 char **error_message)
252b5132 7096{
bcbdc74c 7097 asection * s = 0;
dc810e39 7098 bfd_vma my_offset;
252b5132 7099 long int ret_offset;
bcbdc74c
NC		 7100 struct elf_link_hash_entry * myh;
7101 struct elf32_arm_link_hash_table * globals;
252b5132 7102
f2a9dd69 7103 myh = find_thumb_glue (info, name, error_message);
252b5132 7104 if (myh == NULL)
b34976b6 7105 return FALSE;
252b5132
RH		 7106
7107 globals = elf32_arm_hash_table (info);
252b5132
RH		 7108 BFD_ASSERT (globals != NULL);
7109 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7110
7111 my_offset = myh->root.u.def.value;
7112
3d4d4302
AM		 7113 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7114 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7115
7116 BFD_ASSERT (s != NULL);
7117 BFD_ASSERT (s->contents != NULL);
7118 BFD_ASSERT (s->output_section != NULL);
7119
7120 if ((my_offset & 0x01) == 0x01)
7121 {
7122 if (sym_sec != NULL
7123 && sym_sec->owner != NULL
7124 && !INTERWORK_FLAG (sym_sec->owner))
7125 {
8f615d07 7126 (*_bfd_error_handler)
d003868e 7127 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7128 " first occurrence: %B: Thumb call to ARM"),
d003868e 7129 sym_sec->owner, input_bfd, name);
252b5132 7130
b34976b6 7131 return FALSE;
252b5132
RH		 7132 }
7133
7134 --my_offset;
7135 myh->root.u.def.value = my_offset;
7136
52ab56c2
PB		 7137 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7138 s->contents + my_offset);
252b5132 7139
52ab56c2
PB		 7140 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7141 s->contents + my_offset + 2);
252b5132
RH		 7142
7143 ret_offset =
9b485d32
NC		 7144 /* Address of destination of the stub. */
7145 ((bfd_signed_vma) val)
252b5132 7146 - ((bfd_signed_vma)
57e8b36a
NC		 7147 /* Offset from the start of the current section
7148 to the start of the stubs. */
9b485d32
NC		 7149 (s->output_offset
7150 /* Offset of the start of this stub from the start of the stubs. */
7151 + my_offset
7152 /* Address of the start of the current section. */
7153 + s->output_section->vma)
7154 /* The branch instruction is 4 bytes into the stub. */
7155 + 4
7156 /* ARM branches work from the pc of the instruction + 8. */
7157 + 8);
252b5132 7158
52ab56c2
PB		 7159 put_arm_insn (globals, output_bfd,
7160 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7161 s->contents + my_offset + 4);
252b5132
RH		 7162 }
7163
7164 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7165
427bfd90
NC		 7166 /* Now go back and fix up the original BL insn to point to here. */
7167 ret_offset =
7168 /* Address of where the stub is located. */
7169 (s->output_section->vma + s->output_offset + my_offset)
7170 /* Address of where the BL is located. */
57e8b36a
NC		 7171 - (input_section->output_section->vma + input_section->output_offset
7172 + offset)
427bfd90
NC		 7173 /* Addend in the relocation. */
7174 - addend
7175 /* Biassing for PC-relative addressing. */
7176 - 8;
252b5132 7177
12a0a0fd 7178 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7179
b34976b6 7180 return TRUE;
252b5132
RH		 7181}
7182
a4fd1a8e 7183/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7184
a4fd1a8e
PB		 7185static struct elf_link_hash_entry *
7186elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7187 const char * name,
7188 bfd * input_bfd,
7189 bfd * output_bfd,
7190 asection * sym_sec,
7191 bfd_vma val,
8029a119
NC		 7192 asection * s,
7193 char ** error_message)
252b5132 7194{
dc810e39 7195 bfd_vma my_offset;
252b5132 7196 long int ret_offset;
bcbdc74c
NC		 7197 struct elf_link_hash_entry * myh;
7198 struct elf32_arm_link_hash_table * globals;
252b5132 7199
f2a9dd69 7200 myh = find_arm_glue (info, name, error_message);
252b5132 7201 if (myh == NULL)
a4fd1a8e 7202 return NULL;
252b5132
RH		 7203
7204 globals = elf32_arm_hash_table (info);
252b5132
RH		 7205 BFD_ASSERT (globals != NULL);
7206 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7207
7208 my_offset = myh->root.u.def.value;
252b5132
RH		 7209
7210 if ((my_offset & 0x01) == 0x01)
7211 {
7212 if (sym_sec != NULL
7213 && sym_sec->owner != NULL
7214 && !INTERWORK_FLAG (sym_sec->owner))
7215 {
8f615d07 7216 (*_bfd_error_handler)
d003868e
AM		 7217 (_("%B(%s): warning: interworking not enabled.\n"
7218 " first occurrence: %B: arm call to thumb"),
7219 sym_sec->owner, input_bfd, name);
252b5132 7220 }
9b485d32 7221
252b5132
RH		 7222 --my_offset;
7223 myh->root.u.def.value = my_offset;
7224
0e1862bb
L		 7225 if (bfd_link_pic (info)
7226 || globals->root.is_relocatable_executable
27e55c4d 7227 || globals->pic_veneer)
8f6277f5
PB		 7228 {
7229 /* For relocatable objects we can't use absolute addresses,
7230 so construct the address from a relative offset. */
7231 /* TODO: If the offset is small it's probably worth
7232 constructing the address with adds. */
52ab56c2
PB		 7233 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7234 s->contents + my_offset);
7235 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7236 s->contents + my_offset + 4);
7237 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7238 s->contents + my_offset + 8);
8f6277f5
PB		 7239 /* Adjust the offset by 4 for the position of the add,
7240 and 8 for the pipeline offset. */
7241 ret_offset = (val - (s->output_offset
7242 + s->output_section->vma
7243 + my_offset + 12))
7244 | 1;
7245 bfd_put_32 (output_bfd, ret_offset,
7246 s->contents + my_offset + 12);
7247 }
26079076
PB		 7248 else if (globals->use_blx)
7249 {
7250 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7251 s->contents + my_offset);
7252
7253 /* It's a thumb address. Add the low order bit. */
7254 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7255 s->contents + my_offset + 4);
7256 }
8f6277f5
PB		 7257 else
7258 {
52ab56c2
PB		 7259 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7260 s->contents + my_offset);
252b5132 7261
52ab56c2
PB		 7262 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7263 s->contents + my_offset + 4);
252b5132 7264
8f6277f5
PB		 7265 /* It's a thumb address. Add the low order bit. */
7266 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7267 s->contents + my_offset + 8);
8029a119
NC		 7268
7269 my_offset += 12;
8f6277f5 7270 }
252b5132
RH		 7271 }
7272
7273 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7274
a4fd1a8e
PB		 7275 return myh;
7276}
7277
7278/* Arm code calling a Thumb function. */
7279
7280static int
7281elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7282 const char * name,
7283 bfd * input_bfd,
7284 bfd * output_bfd,
7285 asection * input_section,
7286 bfd_byte * hit_data,
7287 asection * sym_sec,
7288 bfd_vma offset,
7289 bfd_signed_vma addend,
f2a9dd69
DJ		 7290 bfd_vma val,
7291 char **error_message)
a4fd1a8e
PB		 7292{
7293 unsigned long int tmp;
7294 bfd_vma my_offset;
7295 asection * s;
7296 long int ret_offset;
7297 struct elf_link_hash_entry * myh;
7298 struct elf32_arm_link_hash_table * globals;
7299
7300 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7301 BFD_ASSERT (globals != NULL);
7302 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7303
3d4d4302
AM		 7304 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7305 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7306 BFD_ASSERT (s != NULL);
7307 BFD_ASSERT (s->contents != NULL);
7308 BFD_ASSERT (s->output_section != NULL);
7309
7310 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7311 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7312 if (!myh)
7313 return FALSE;
7314
7315 my_offset = myh->root.u.def.value;
252b5132
RH		 7316 tmp = bfd_get_32 (input_bfd, hit_data);
7317 tmp = tmp & 0xFF000000;
7318
9b485d32 7319 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7320 ret_offset = (s->output_offset
7321 + my_offset
7322 + s->output_section->vma
7323 - (input_section->output_offset
7324 + input_section->output_section->vma
7325 + offset + addend)
7326 - 8);
9a5aca8c 7327
252b5132
RH		 7328 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7329
dc810e39 7330 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7331
b34976b6 7332 return TRUE;
252b5132
RH		 7333}
7334
a4fd1a8e
PB		 7335/* Populate Arm stub for an exported Thumb function. */
7336
7337static bfd_boolean
7338elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7339{
7340 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7341 asection * s;
7342 struct elf_link_hash_entry * myh;
7343 struct elf32_arm_link_hash_entry *eh;
7344 struct elf32_arm_link_hash_table * globals;
7345 asection *sec;
7346 bfd_vma val;
f2a9dd69 7347 char *error_message;
a4fd1a8e 7348
906e58ca 7349 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7350 /* Allocate stubs for exported Thumb functions on v4t. */
7351 if (eh->export_glue == NULL)
7352 return TRUE;
7353
7354 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7355 BFD_ASSERT (globals != NULL);
7356 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7357
3d4d4302
AM		 7358 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7359 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7360 BFD_ASSERT (s != NULL);
7361 BFD_ASSERT (s->contents != NULL);
7362 BFD_ASSERT (s->output_section != NULL);
7363
7364 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7365
7366 BFD_ASSERT (sec->output_section != NULL);
7367
a4fd1a8e
PB		 7368 val = eh->export_glue->root.u.def.value + sec->output_offset
7369 + sec->output_section->vma;
8029a119 7370
a4fd1a8e
PB		 7371 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7372 h->root.u.def.section->owner,
f2a9dd69
DJ		 7373 globals->obfd, sec, val, s,
7374 &error_message);
a4fd1a8e
PB		 7375 BFD_ASSERT (myh);
7376 return TRUE;
7377}
7378
845b51d6
PB		 7379/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7380
7381static bfd_vma
7382elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7383{
7384 bfd_byte *p;
7385 bfd_vma glue_addr;
7386 asection *s;
7387 struct elf32_arm_link_hash_table *globals;
7388
7389 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7390 BFD_ASSERT (globals != NULL);
7391 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7392
3d4d4302
AM		 7393 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7394 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7395 BFD_ASSERT (s != NULL);
7396 BFD_ASSERT (s->contents != NULL);
7397 BFD_ASSERT (s->output_section != NULL);
7398
7399 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7400
7401 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7402
7403 if ((globals->bx_glue_offset[reg] & 1) == 0)
7404 {
7405 p = s->contents + glue_addr;
7406 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7407 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7408 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7409 globals->bx_glue_offset[reg] |= 1;
7410 }
7411
7412 return glue_addr + s->output_section->vma + s->output_offset;
7413}
7414
a4fd1a8e
PB		 7415/* Generate Arm stubs for exported Thumb symbols. */
7416static void
906e58ca 7417elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7418 struct bfd_link_info *link_info)
7419{
7420 struct elf32_arm_link_hash_table * globals;
7421
8029a119
NC		 7422 if (link_info == NULL)
7423 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7424 return;
7425
7426 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7427 if (globals == NULL)
7428 return;
7429
84c08195
PB		 7430 /* If blx is available then exported Thumb symbols are OK and there is
7431 nothing to do. */
a4fd1a8e
PB		 7432 if (globals->use_blx)
7433 return;
7434
7435 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7436 link_info);
7437}
7438
47beaa6a
RS		 7439/* Reserve space for COUNT dynamic relocations in relocation selection
7440 SRELOC. */
7441
7442static void
7443elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7444 bfd_size_type count)
7445{
7446 struct elf32_arm_link_hash_table *htab;
7447
7448 htab = elf32_arm_hash_table (info);
7449 BFD_ASSERT (htab->root.dynamic_sections_created);
7450 if (sreloc == NULL)
7451 abort ();
7452 sreloc->size += RELOC_SIZE (htab) * count;
7453}
7454
34e77a92
RS		 7455/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7456 dynamic, the relocations should go in SRELOC, otherwise they should
7457 go in the special .rel.iplt section. */
7458
7459static void
7460elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7461 bfd_size_type count)
7462{
7463 struct elf32_arm_link_hash_table *htab;
7464
7465 htab = elf32_arm_hash_table (info);
7466 if (!htab->root.dynamic_sections_created)
7467 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7468 else
7469 {
7470 BFD_ASSERT (sreloc != NULL);
7471 sreloc->size += RELOC_SIZE (htab) * count;
7472 }
7473}
7474
47beaa6a
RS		 7475/* Add relocation REL to the end of relocation section SRELOC. */
7476
7477static void
7478elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7479 asection *sreloc, Elf_Internal_Rela *rel)
7480{
7481 bfd_byte *loc;
7482 struct elf32_arm_link_hash_table *htab;
7483
7484 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7485 if (!htab->root.dynamic_sections_created
7486 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7487 sreloc = htab->root.irelplt;
47beaa6a
RS		 7488 if (sreloc == NULL)
7489 abort ();
7490 loc = sreloc->contents;
7491 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7492 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7493 abort ();
7494 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7495}
7496
34e77a92
RS		 7497/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7498 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7499 to .plt. */
7500
7501static void
7502elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7503 bfd_boolean is_iplt_entry,
7504 union gotplt_union *root_plt,
7505 struct arm_plt_info *arm_plt)
7506{
7507 struct elf32_arm_link_hash_table *htab;
7508 asection *splt;
7509 asection *sgotplt;
7510
7511 htab = elf32_arm_hash_table (info);
7512
7513 if (is_iplt_entry)
7514 {
7515 splt = htab->root.iplt;
7516 sgotplt = htab->root.igotplt;
7517
99059e56
RM		 7518 /* NaCl uses a special first entry in .iplt too. */
7519 if (htab->nacl_p && splt->size == 0)
7520 splt->size += htab->plt_header_size;
7521
34e77a92
RS		 7522 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7523 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7524 }
7525 else
7526 {
7527 splt = htab->root.splt;
7528 sgotplt = htab->root.sgotplt;
7529
7530 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7531 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7532
7533 /* If this is the first .plt entry, make room for the special
7534 first entry. */
7535 if (splt->size == 0)
7536 splt->size += htab->plt_header_size;
9f19ab6d
WN		 7537
7538 htab->next_tls_desc_index++;
34e77a92
RS		 7539 }
7540
7541 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7542 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7543 splt->size += PLT_THUMB_STUB_SIZE;
7544 root_plt->offset = splt->size;
7545 splt->size += htab->plt_entry_size;
7546
7547 if (!htab->symbian_p)
7548 {
7549 /* We also need to make an entry in the .got.plt section, which
7550 will be placed in the .got section by the linker script. */
9f19ab6d
WN		 7551 if (is_iplt_entry)
7552 arm_plt->got_offset = sgotplt->size;
7553 else
7554 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
34e77a92
RS		 7555 sgotplt->size += 4;
7556 }
7557}
7558
b38cadfb
NC		 7559static bfd_vma
7560arm_movw_immediate (bfd_vma value)
7561{
7562 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7563}
7564
7565static bfd_vma
7566arm_movt_immediate (bfd_vma value)
7567{
7568 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7569}
7570
34e77a92
RS		 7571/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7572 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7573 Otherwise, DYNINDX is the index of the symbol in the dynamic
7574 symbol table and SYM_VALUE is undefined.
7575
7576 ROOT_PLT points to the offset of the PLT entry from the start of its
7577 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
57460bcf 7578 bookkeeping information.
34e77a92 7579
57460bcf
NC		 7580 Returns FALSE if there was a problem. */
7581
7582static bfd_boolean
34e77a92
RS		 7583elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7584 union gotplt_union *root_plt,
7585 struct arm_plt_info *arm_plt,
7586 int dynindx, bfd_vma sym_value)
7587{
7588 struct elf32_arm_link_hash_table *htab;
7589 asection *sgot;
7590 asection *splt;
7591 asection *srel;
7592 bfd_byte *loc;
7593 bfd_vma plt_index;
7594 Elf_Internal_Rela rel;
7595 bfd_vma plt_header_size;
7596 bfd_vma got_header_size;
7597
7598 htab = elf32_arm_hash_table (info);
7599
7600 /* Pick the appropriate sections and sizes. */
7601 if (dynindx == -1)
7602 {
7603 splt = htab->root.iplt;
7604 sgot = htab->root.igotplt;
7605 srel = htab->root.irelplt;
7606
7607 /* There are no reserved entries in .igot.plt, and no special
7608 first entry in .iplt. */
7609 got_header_size = 0;
7610 plt_header_size = 0;
7611 }
7612 else
7613 {
7614 splt = htab->root.splt;
7615 sgot = htab->root.sgotplt;
7616 srel = htab->root.srelplt;
7617
7618 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7619 plt_header_size = htab->plt_header_size;
7620 }
7621 BFD_ASSERT (splt != NULL && srel != NULL);
7622
7623 /* Fill in the entry in the procedure linkage table. */
7624 if (htab->symbian_p)
7625 {
7626 BFD_ASSERT (dynindx >= 0);
7627 put_arm_insn (htab, output_bfd,
7628 elf32_arm_symbian_plt_entry[0],
7629 splt->contents + root_plt->offset);
7630 bfd_put_32 (output_bfd,
7631 elf32_arm_symbian_plt_entry[1],
7632 splt->contents + root_plt->offset + 4);
7633
7634 /* Fill in the entry in the .rel.plt section. */
7635 rel.r_offset = (splt->output_section->vma
7636 + splt->output_offset
7637 + root_plt->offset + 4);
7638 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7639
7640 /* Get the index in the procedure linkage table which
7641 corresponds to this symbol. This is the index of this symbol
7642 in all the symbols for which we are making plt entries. The
7643 first entry in the procedure linkage table is reserved. */
7644 plt_index = ((root_plt->offset - plt_header_size)
7645 / htab->plt_entry_size);
7646 }
7647 else
7648 {
7649 bfd_vma got_offset, got_address, plt_address;
7650 bfd_vma got_displacement, initial_got_entry;
7651 bfd_byte * ptr;
7652
7653 BFD_ASSERT (sgot != NULL);
7654
7655 /* Get the offset into the .(i)got.plt table of the entry that
7656 corresponds to this function. */
7657 got_offset = (arm_plt->got_offset & -2);
7658
7659 /* Get the index in the procedure linkage table which
7660 corresponds to this symbol. This is the index of this symbol
7661 in all the symbols for which we are making plt entries.
7662 After the reserved .got.plt entries, all symbols appear in
7663 the same order as in .plt. */
7664 plt_index = (got_offset - got_header_size) / 4;
7665
7666 /* Calculate the address of the GOT entry. */
7667 got_address = (sgot->output_section->vma
7668 + sgot->output_offset
7669 + got_offset);
7670
7671 /* ...and the address of the PLT entry. */
7672 plt_address = (splt->output_section->vma
7673 + splt->output_offset
7674 + root_plt->offset);
7675
7676 ptr = splt->contents + root_plt->offset;
0e1862bb 7677 if (htab->vxworks_p && bfd_link_pic (info))
34e77a92
RS		 7678 {
7679 unsigned int i;
7680 bfd_vma val;
7681
7682 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7683 {
7684 val = elf32_arm_vxworks_shared_plt_entry[i];
7685 if (i == 2)
7686 val |= got_address - sgot->output_section->vma;
7687 if (i == 5)
7688 val |= plt_index * RELOC_SIZE (htab);
7689 if (i == 2 || i == 5)
7690 bfd_put_32 (output_bfd, val, ptr);
7691 else
7692 put_arm_insn (htab, output_bfd, val, ptr);
7693 }
7694 }
7695 else if (htab->vxworks_p)
7696 {
7697 unsigned int i;
7698 bfd_vma val;
7699
7700 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7701 {
7702 val = elf32_arm_vxworks_exec_plt_entry[i];
7703 if (i == 2)
7704 val |= got_address;
7705 if (i == 4)
7706 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7707 if (i == 5)
7708 val |= plt_index * RELOC_SIZE (htab);
7709 if (i == 2 || i == 5)
7710 bfd_put_32 (output_bfd, val, ptr);
7711 else
7712 put_arm_insn (htab, output_bfd, val, ptr);
7713 }
7714
7715 loc = (htab->srelplt2->contents
7716 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7717
7718 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7719 referencing the GOT for this PLT entry. */
7720 rel.r_offset = plt_address + 8;
7721 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7722 rel.r_addend = got_offset;
7723 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7724 loc += RELOC_SIZE (htab);
7725
7726 /* Create the R_ARM_ABS32 relocation referencing the
7727 beginning of the PLT for this GOT entry. */
7728 rel.r_offset = got_address;
7729 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7730 rel.r_addend = 0;
7731 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7732 }
b38cadfb
NC		 7733 else if (htab->nacl_p)
7734 {
7735 /* Calculate the displacement between the PLT slot and the
7736 common tail that's part of the special initial PLT slot. */
6034aab8 7737 int32_t tail_displacement
b38cadfb
NC		 7738 = ((splt->output_section->vma + splt->output_offset
7739 + ARM_NACL_PLT_TAIL_OFFSET)
7740 - (plt_address + htab->plt_entry_size + 4));
7741 BFD_ASSERT ((tail_displacement & 3) == 0);
7742 tail_displacement >>= 2;
7743
7744 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7745 || (-tail_displacement & 0xff000000) == 0);
7746
7747 /* Calculate the displacement between the PLT slot and the entry
7748 in the GOT. The offset accounts for the value produced by
7749 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8 7750 got_displacement = (got_address
99059e56 7751 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7752
7753 /* NaCl does not support interworking at all. */
7754 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7755
7756 put_arm_insn (htab, output_bfd,
7757 elf32_arm_nacl_plt_entry[0]
7758 | arm_movw_immediate (got_displacement),
7759 ptr + 0);
7760 put_arm_insn (htab, output_bfd,
7761 elf32_arm_nacl_plt_entry[1]
7762 | arm_movt_immediate (got_displacement),
7763 ptr + 4);
7764 put_arm_insn (htab, output_bfd,
7765 elf32_arm_nacl_plt_entry[2],
7766 ptr + 8);
7767 put_arm_insn (htab, output_bfd,
7768 elf32_arm_nacl_plt_entry[3]
7769 | (tail_displacement & 0x00ffffff),
7770 ptr + 12);
7771 }
57460bcf
NC		 7772 else if (using_thumb_only (htab))
7773 {
eed94f8f 7774 /* PR ld/16017: Generate thumb only PLT entries. */
469a3493 7775 if (!using_thumb2 (htab))
eed94f8f
NC		 7776 {
7777 /* FIXME: We ought to be able to generate thumb-1 PLT
7778 instructions... */
7779 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
7780 output_bfd);
7781 return FALSE;
7782 }
57460bcf 7783
eed94f8f
NC		 7784 /* Calculate the displacement between the PLT slot and the entry in
7785 the GOT. The 12-byte offset accounts for the value produced by
7786 adding to pc in the 3rd instruction of the PLT stub. */
7787 got_displacement = got_address - (plt_address + 12);
7788
7789 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
7790 instead of 'put_thumb_insn'. */
7791 put_arm_insn (htab, output_bfd,
7792 elf32_thumb2_plt_entry[0]
7793 | ((got_displacement & 0x000000ff) << 16)
7794 | ((got_displacement & 0x00000700) << 20)
7795 | ((got_displacement & 0x00000800) >> 1)
7796 | ((got_displacement & 0x0000f000) >> 12),
7797 ptr + 0);
7798 put_arm_insn (htab, output_bfd,
7799 elf32_thumb2_plt_entry[1]
7800 | ((got_displacement & 0x00ff0000) )
7801 | ((got_displacement & 0x07000000) << 4)
7802 | ((got_displacement & 0x08000000) >> 17)
7803 | ((got_displacement & 0xf0000000) >> 28),
7804 ptr + 4);
7805 put_arm_insn (htab, output_bfd,
7806 elf32_thumb2_plt_entry[2],
7807 ptr + 8);
7808 put_arm_insn (htab, output_bfd,
7809 elf32_thumb2_plt_entry[3],
7810 ptr + 12);
57460bcf 7811 }
34e77a92
RS		 7812 else
7813 {
7814 /* Calculate the displacement between the PLT slot and the
7815 entry in the GOT. The eight-byte offset accounts for the
7816 value produced by adding to pc in the first instruction
7817 of the PLT stub. */
7818 got_displacement = got_address - (plt_address + 8);
7819
34e77a92
RS		 7820 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7821 {
7822 put_thumb_insn (htab, output_bfd,
7823 elf32_arm_plt_thumb_stub[0], ptr - 4);
7824 put_thumb_insn (htab, output_bfd,
7825 elf32_arm_plt_thumb_stub[1], ptr - 2);
7826 }
7827
1db37fe6
YG		 7828 if (!elf32_arm_use_long_plt_entry)
7829 {
7830 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7831
7832 put_arm_insn (htab, output_bfd,
7833 elf32_arm_plt_entry_short[0]
7834 | ((got_displacement & 0x0ff00000) >> 20),
7835 ptr + 0);
7836 put_arm_insn (htab, output_bfd,
7837 elf32_arm_plt_entry_short[1]
7838 | ((got_displacement & 0x000ff000) >> 12),
7839 ptr+ 4);
7840 put_arm_insn (htab, output_bfd,
7841 elf32_arm_plt_entry_short[2]
7842 | (got_displacement & 0x00000fff),
7843 ptr + 8);
34e77a92 7844#ifdef FOUR_WORD_PLT
1db37fe6 7845 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
34e77a92 7846#endif
1db37fe6
YG		 7847 }
7848 else
7849 {
7850 put_arm_insn (htab, output_bfd,
7851 elf32_arm_plt_entry_long[0]
7852 | ((got_displacement & 0xf0000000) >> 28),
7853 ptr + 0);
7854 put_arm_insn (htab, output_bfd,
7855 elf32_arm_plt_entry_long[1]
7856 | ((got_displacement & 0x0ff00000) >> 20),
7857 ptr + 4);
7858 put_arm_insn (htab, output_bfd,
7859 elf32_arm_plt_entry_long[2]
7860 | ((got_displacement & 0x000ff000) >> 12),
7861 ptr+ 8);
7862 put_arm_insn (htab, output_bfd,
7863 elf32_arm_plt_entry_long[3]
7864 | (got_displacement & 0x00000fff),
7865 ptr + 12);
7866 }
34e77a92
RS		 7867 }
7868
7869 /* Fill in the entry in the .rel(a).(i)plt section. */
7870 rel.r_offset = got_address;
7871 rel.r_addend = 0;
7872 if (dynindx == -1)
7873 {
7874 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7875 The dynamic linker or static executable then calls SYM_VALUE
7876 to determine the correct run-time value of the .igot.plt entry. */
7877 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7878 initial_got_entry = sym_value;
7879 }
7880 else
7881 {
7882 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7883 initial_got_entry = (splt->output_section->vma
7884 + splt->output_offset);
7885 }
7886
7887 /* Fill in the entry in the global offset table. */
7888 bfd_put_32 (output_bfd, initial_got_entry,
7889 sgot->contents + got_offset);
7890 }
7891
aba8c3de
WN		 7892 if (dynindx == -1)
7893 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7894 else
7895 {
7896 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7897 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7898 }
57460bcf
NC		 7899
7900 return TRUE;
34e77a92
RS		 7901}
7902
eb043451
PB		 7903/* Some relocations map to different relocations depending on the
7904 target. Return the real relocation. */
8029a119 7905
eb043451
PB		 7906static int
7907arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7908 int r_type)
7909{
7910 switch (r_type)
7911 {
7912 case R_ARM_TARGET1:
7913 if (globals->target1_is_rel)
7914 return R_ARM_REL32;
7915 else
7916 return R_ARM_ABS32;
7917
7918 case R_ARM_TARGET2:
7919 return globals->target2_reloc;
7920
7921 default:
7922 return r_type;
7923 }
7924}
eb043451 7925
ba93b8ac
DJ		 7926/* Return the base VMA address which should be subtracted from real addresses
7927 when resolving @dtpoff relocation.
7928 This is PT_TLS segment p_vaddr. */
7929
7930static bfd_vma
7931dtpoff_base (struct bfd_link_info *info)
7932{
7933 /* If tls_sec is NULL, we should have signalled an error already. */
7934 if (elf_hash_table (info)->tls_sec == NULL)
7935 return 0;
7936 return elf_hash_table (info)->tls_sec->vma;
7937}
7938
7939/* Return the relocation value for @tpoff relocation
7940 if STT_TLS virtual address is ADDRESS. */
7941
7942static bfd_vma
7943tpoff (struct bfd_link_info *info, bfd_vma address)
7944{
7945 struct elf_link_hash_table *htab = elf_hash_table (info);
7946 bfd_vma base;
7947
7948 /* If tls_sec is NULL, we should have signalled an error already. */
7949 if (htab->tls_sec == NULL)
7950 return 0;
7951 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7952 return address - htab->tls_sec->vma + base;
7953}
7954
00a97672
RS		 7955/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7956 VALUE is the relocation value. */
7957
7958static bfd_reloc_status_type
7959elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7960{
7961 if (value > 0xfff)
7962 return bfd_reloc_overflow;
7963
7964 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7965 bfd_put_32 (abfd, value, data);
7966 return bfd_reloc_ok;
7967}
7968
0855e32b
NS		 7969/* Handle TLS relaxations. Relaxing is possible for symbols that use
7970 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7971 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7972
7973 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7974 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7975 case of error.
7976
7977 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7978 the pre-relaxed code. It would be nice if the relocs were updated
7979 to match the optimization. */
0855e32b 7980
b38cadfb 7981static bfd_reloc_status_type
0855e32b 7982elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7983 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7984 Elf_Internal_Rela *rel, unsigned long is_local)
7985{
7986 unsigned long insn;
b38cadfb 7987
0855e32b
NS		 7988 switch (ELF32_R_TYPE (rel->r_info))
7989 {
7990 default:
7991 return bfd_reloc_notsupported;
b38cadfb 7992
0855e32b
NS		 7993 case R_ARM_TLS_GOTDESC:
7994 if (is_local)
7995 insn = 0;
7996 else
7997 {
7998 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7999 if (insn & 1)
8000 insn -= 5; /* THUMB */
8001 else
8002 insn -= 8; /* ARM */
8003 }
8004 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8005 return bfd_reloc_continue;
8006
8007 case R_ARM_THM_TLS_DESCSEQ:
8008 /* Thumb insn. */
8009 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
8010 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
8011 {
8012 if (is_local)
8013 /* nop */
8014 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8015 }
8016 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8017 {
8018 if (is_local)
8019 /* nop */
8020 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8021 else
8022 /* ldr rx,[ry] */
8023 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8024 }
8025 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8026 {
8027 if (is_local)
8028 /* nop */
8029 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8030 else
8031 /* mov r0, rx */
8032 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8033 contents + rel->r_offset);
8034 }
8035 else
8036 {
8037 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8038 /* It's a 32 bit instruction, fetch the rest of it for
8039 error generation. */
8040 insn = (insn << 16)
8041 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8042 (*_bfd_error_handler)
8043 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8044 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8045 return bfd_reloc_notsupported;
8046 }
8047 break;
b38cadfb 8048
0855e32b
NS		 8049 case R_ARM_TLS_DESCSEQ:
8050 /* arm insn. */
8051 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8052 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8053 {
8054 if (is_local)
8055 /* mov rx, ry */
8056 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8057 contents + rel->r_offset);
8058 }
8059 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8060 {
8061 if (is_local)
8062 /* nop */
8063 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8064 else
8065 /* ldr rx,[ry] */
8066 bfd_put_32 (input_bfd, insn & 0xfffff000,
8067 contents + rel->r_offset);
8068 }
8069 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8070 {
8071 if (is_local)
8072 /* nop */
8073 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8074 else
8075 /* mov r0, rx */
8076 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8077 contents + rel->r_offset);
8078 }
8079 else
8080 {
8081 (*_bfd_error_handler)
8082 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8083 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8084 return bfd_reloc_notsupported;
8085 }
8086 break;
8087
8088 case R_ARM_TLS_CALL:
8089 /* GD->IE relaxation, turn the instruction into 'nop' or
8090 'ldr r0, [pc,r0]' */
8091 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8092 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8093 break;
b38cadfb 8094
0855e32b 8095 case R_ARM_THM_TLS_CALL:
6a631e86 8096 /* GD->IE relaxation. */
0855e32b
NS		 8097 if (!is_local)
8098 /* add r0,pc; ldr r0, [r0] */
8099 insn = 0x44786800;
8100 else if (arch_has_thumb2_nop (globals))
8101 /* nop.w */
8102 insn = 0xf3af8000;
8103 else
8104 /* nop; nop */
8105 insn = 0xbf00bf00;
b38cadfb 8106
0855e32b
NS		 8107 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8108 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8109 break;
8110 }
8111 return bfd_reloc_ok;
8112}
8113
4962c51a
MS		 8114/* For a given value of n, calculate the value of G_n as required to
8115 deal with group relocations. We return it in the form of an
8116 encoded constant-and-rotation, together with the final residual. If n is
8117 specified as less than zero, then final_residual is filled with the
8118 input value and no further action is performed. */
8119
8120static bfd_vma
8121calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8122{
8123 int current_n;
8124 bfd_vma g_n;
8125 bfd_vma encoded_g_n = 0;
8126 bfd_vma residual = value; /* Also known as Y_n. */
8127
8128 for (current_n = 0; current_n <= n; current_n++)
8129 {
8130 int shift;
8131
8132 /* Calculate which part of the value to mask. */
8133 if (residual == 0)
99059e56 8134 shift = 0;
4962c51a 8135 else
99059e56
RM		 8136 {
8137 int msb;
8138
8139 /* Determine the most significant bit in the residual and
8140 align the resulting value to a 2-bit boundary. */
8141 for (msb = 30; msb >= 0; msb -= 2)
8142 if (residual & (3 << msb))
8143 break;
8144
8145 /* The desired shift is now (msb - 6), or zero, whichever
8146 is the greater. */
8147 shift = msb - 6;
8148 if (shift < 0)
8149 shift = 0;
8150 }
4962c51a
MS		 8151
8152 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8153 g_n = residual & (0xff << shift);
8154 encoded_g_n = (g_n >> shift)
99059e56 8155 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4962c51a
MS		 8156
8157 /* Calculate the residual for the next time around. */
8158 residual &= ~g_n;
8159 }
8160
8161 *final_residual = residual;
8162
8163 return encoded_g_n;
8164}
8165
8166/* Given an ARM instruction, determine whether it is an ADD or a SUB.
8167 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 8168
4962c51a 8169static int
906e58ca 8170identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 8171{
8172 int opcode = insn & 0x1e00000;
8173
8174 if (opcode == 1 << 23) /* ADD */
8175 return 1;
8176
8177 if (opcode == 1 << 22) /* SUB */
8178 return -1;
8179
8180 return 0;
8181}
8182
252b5132 8183/* Perform a relocation as part of a final link. */
9b485d32 8184
252b5132 8185static bfd_reloc_status_type
57e8b36a
NC		 8186elf32_arm_final_link_relocate (reloc_howto_type * howto,
8187 bfd * input_bfd,
8188 bfd * output_bfd,
8189 asection * input_section,
8190 bfd_byte * contents,
8191 Elf_Internal_Rela * rel,
8192 bfd_vma value,
8193 struct bfd_link_info * info,
8194 asection * sym_sec,
8195 const char * sym_name,
34e77a92
RS		 8196 unsigned char st_type,
8197 enum arm_st_branch_type branch_type,
0945cdfd 8198 struct elf_link_hash_entry * h,
f2a9dd69 8199 bfd_boolean * unresolved_reloc_p,
8029a119 8200 char ** error_message)
252b5132
RH		 8201{
8202 unsigned long r_type = howto->type;
8203 unsigned long r_symndx;
8204 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8205 bfd_vma * local_got_offsets;
0855e32b 8206 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8207 asection * sgot;
8208 asection * splt;
252b5132 8209 asection * sreloc = NULL;
362d30a1 8210 asection * srelgot;
252b5132 8211 bfd_vma addend;
ba96a88f 8212 bfd_signed_vma signed_addend;
34e77a92
RS		 8213 unsigned char dynreloc_st_type;
8214 bfd_vma dynreloc_value;
ba96a88f 8215 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8216 struct elf32_arm_link_hash_entry *eh;
8217 union gotplt_union *root_plt;
8218 struct arm_plt_info *arm_plt;
8219 bfd_vma plt_offset;
8220 bfd_vma gotplt_offset;
8221 bfd_boolean has_iplt_entry;
f21f3fe0 8222
9c504268 8223 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8224 if (globals == NULL)
8225 return bfd_reloc_notsupported;
9c504268 8226
0ffa91dd
NC		 8227 BFD_ASSERT (is_arm_elf (input_bfd));
8228
8229 /* Some relocation types map to different relocations depending on the
9c504268 8230 target. We pick the right one here. */
eb043451 8231 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8232
8233 /* It is possible to have linker relaxations on some TLS access
8234 models. Update our information here. */
8235 r_type = elf32_arm_tls_transition (info, r_type, h);
8236
eb043451
PB		 8237 if (r_type != howto->type)
8238 howto = elf32_arm_howto_from_type (r_type);
9c504268 8239
34e77a92 8240 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8241 sgot = globals->root.sgot;
252b5132 8242 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8243 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8244
34e77a92
RS		 8245 if (globals->root.dynamic_sections_created)
8246 srelgot = globals->root.srelgot;
8247 else
8248 srelgot = NULL;
8249
252b5132
RH		 8250 r_symndx = ELF32_R_SYM (rel->r_info);
8251
4e7fd91e 8252 if (globals->use_rel)
ba96a88f 8253 {
4e7fd91e
PB		 8254 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8255
8256 if (addend & ((howto->src_mask + 1) >> 1))
8257 {
8258 signed_addend = -1;
8259 signed_addend &= ~ howto->src_mask;
8260 signed_addend |= addend;
8261 }
8262 else
8263 signed_addend = addend;
ba96a88f
NC		 8264 }
8265 else
4e7fd91e 8266 addend = signed_addend = rel->r_addend;
f21f3fe0 8267
39f21624
NC		 8268 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8269 are resolving a function call relocation. */
8270 if (using_thumb_only (globals)
8271 && (r_type == R_ARM_THM_CALL
8272 || r_type == R_ARM_THM_JUMP24)
8273 && branch_type == ST_BRANCH_TO_ARM)
8274 branch_type = ST_BRANCH_TO_THUMB;
8275
34e77a92
RS		 8276 /* Record the symbol information that should be used in dynamic
8277 relocations. */
8278 dynreloc_st_type = st_type;
8279 dynreloc_value = value;
8280 if (branch_type == ST_BRANCH_TO_THUMB)
8281 dynreloc_value |= 1;
8282
8283 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8284 VALUE appropriately for relocations that we resolve at link time. */
8285 has_iplt_entry = FALSE;
8286 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8287 && root_plt->offset != (bfd_vma) -1)
8288 {
8289 plt_offset = root_plt->offset;
8290 gotplt_offset = arm_plt->got_offset;
8291
8292 if (h == NULL || eh->is_iplt)
8293 {
8294 has_iplt_entry = TRUE;
8295 splt = globals->root.iplt;
8296
8297 /* Populate .iplt entries here, because not all of them will
8298 be seen by finish_dynamic_symbol. The lower bit is set if
8299 we have already populated the entry. */
8300 if (plt_offset & 1)
8301 plt_offset--;
8302 else
8303 {
57460bcf
NC		 8304 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8305 -1, dynreloc_value))
8306 root_plt->offset |= 1;
8307 else
8308 return bfd_reloc_notsupported;
34e77a92
RS		 8309 }
8310
8311 /* Static relocations always resolve to the .iplt entry. */
8312 st_type = STT_FUNC;
8313 value = (splt->output_section->vma
8314 + splt->output_offset
8315 + plt_offset);
8316 branch_type = ST_BRANCH_TO_ARM;
8317
8318 /* If there are non-call relocations that resolve to the .iplt
8319 entry, then all dynamic ones must too. */
8320 if (arm_plt->noncall_refcount != 0)
8321 {
8322 dynreloc_st_type = st_type;
8323 dynreloc_value = value;
8324 }
8325 }
8326 else
8327 /* We populate the .plt entry in finish_dynamic_symbol. */
8328 splt = globals->root.splt;
8329 }
8330 else
8331 {
8332 splt = NULL;
8333 plt_offset = (bfd_vma) -1;
8334 gotplt_offset = (bfd_vma) -1;
8335 }
8336
252b5132
RH		 8337 switch (r_type)
8338 {
8339 case R_ARM_NONE:
28a094c2
DJ		 8340 /* We don't need to find a value for this symbol. It's just a
8341 marker. */
8342 *unresolved_reloc_p = FALSE;
252b5132
RH		 8343 return bfd_reloc_ok;
8344
00a97672
RS		 8345 case R_ARM_ABS12:
8346 if (!globals->vxworks_p)
8347 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8348
252b5132
RH		 8349 case R_ARM_PC24:
8350 case R_ARM_ABS32:
bb224fc3 8351 case R_ARM_ABS32_NOI:
252b5132 8352 case R_ARM_REL32:
bb224fc3 8353 case R_ARM_REL32_NOI:
5b5bb741
PB		 8354 case R_ARM_CALL:
8355 case R_ARM_JUMP24:
dfc5f959 8356 case R_ARM_XPC25:
eb043451 8357 case R_ARM_PREL31:
7359ea65 8358 case R_ARM_PLT32:
7359ea65
DJ		 8359 /* Handle relocations which should use the PLT entry. ABS32/REL32
8360 will use the symbol's value, which may point to a PLT entry, but we
8361 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8362 branches in this object should go to it, except if the PLT is too
8363 far away, in which case a long branch stub should be inserted. */
bb224fc3 8364 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
99059e56 8365 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8366 && r_type != R_ARM_CALL
8367 && r_type != R_ARM_JUMP24
8368 && r_type != R_ARM_PLT32)
34e77a92 8369 && plt_offset != (bfd_vma) -1)
7359ea65 8370 {
34e77a92
RS		 8371 /* If we've created a .plt section, and assigned a PLT entry
8372 to this function, it must either be a STT_GNU_IFUNC reference
8373 or not be known to bind locally. In other cases, we should
8374 have cleared the PLT entry by now. */
8375 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8376
8377 value = (splt->output_section->vma
8378 + splt->output_offset
34e77a92 8379 + plt_offset);
0945cdfd 8380 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8381 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8382 contents, rel->r_offset, value,
00a97672 8383 rel->r_addend);
7359ea65
DJ		 8384 }
8385
67687978
PB		 8386 /* When generating a shared object or relocatable executable, these
8387 relocations are copied into the output file to be resolved at
8388 run time. */
0e1862bb
L		 8389 if ((bfd_link_pic (info)
8390 || globals->root.is_relocatable_executable)
7359ea65 8391 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8392 && !(globals->vxworks_p
3348747a
NS		 8393 && strcmp (input_section->output_section->name,
8394 ".tls_vars") == 0)
bb224fc3 8395 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8396 || !SYMBOL_CALLS_LOCAL (info, h))
ca6b5f82
AM		 8397 && !(input_bfd == globals->stub_bfd
8398 && strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8399 && (h == NULL
8400 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8401 || h->root.type != bfd_link_hash_undefweak)
8402 && r_type != R_ARM_PC24
5b5bb741
PB		 8403 && r_type != R_ARM_CALL
8404 && r_type != R_ARM_JUMP24
ee06dc07 8405 && r_type != R_ARM_PREL31
7359ea65 8406 && r_type != R_ARM_PLT32)
252b5132 8407 {
947216bf 8408 Elf_Internal_Rela outrel;
b34976b6 8409 bfd_boolean skip, relocate;
f21f3fe0 8410
52db4ec2
JW		 8411 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
8412 && !h->def_regular)
8413 {
8414 char *v = _("shared object");
8415
0e1862bb 8416 if (bfd_link_executable (info))
52db4ec2
JW		 8417 v = _("PIE executable");
8418
8419 (*_bfd_error_handler)
8420 (_("%B: relocation %s against external or undefined symbol `%s'"
8421 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
8422 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
8423 return bfd_reloc_notsupported;
8424 }
8425
0945cdfd
DJ		 8426 *unresolved_reloc_p = FALSE;
8427
34e77a92 8428 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8429 {
83bac4b0
NC		 8430 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8431 ! globals->use_rel);
f21f3fe0 8432
83bac4b0 8433 if (sreloc == NULL)
252b5132 8434 return bfd_reloc_notsupported;
252b5132 8435 }
f21f3fe0 8436
b34976b6
AM		 8437 skip = FALSE;
8438 relocate = FALSE;
f21f3fe0 8439
00a97672 8440 outrel.r_addend = addend;
c629eae0
JJ		 8441 outrel.r_offset =
8442 _bfd_elf_section_offset (output_bfd, info, input_section,
8443 rel->r_offset);
8444 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8445 skip = TRUE;
0bb2d96a 8446 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8447 skip = TRUE, relocate = TRUE;
252b5132
RH		 8448 outrel.r_offset += (input_section->output_section->vma
8449 + input_section->output_offset);
f21f3fe0 8450
252b5132 8451 if (skip)
0bb2d96a 8452 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8453 else if (h != NULL
8454 && h->dynindx != -1
0e1862bb 8455 && (!bfd_link_pic (info)
a496fbc8 8456 || !SYMBOLIC_BIND (info, h)
f5385ebf 8457 || !h->def_regular))
5e681ec4 8458 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8459 else
8460 {
a16385dc
MM		 8461 int symbol;
8462
5e681ec4 8463 /* This symbol is local, or marked to become local. */
34e77a92 8464 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8465 if (globals->symbian_p)
6366ff1e 8466 {
74541ad4
AM		 8467 asection *osec;
8468
6366ff1e
MM		 8469 /* On Symbian OS, the data segment and text segement
8470 can be relocated independently. Therefore, we
8471 must indicate the segment to which this
8472 relocation is relative. The BPABI allows us to
8473 use any symbol in the right segment; we just use
8474 the section symbol as it is convenient. (We
8475 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8476 will not appear in the dynamic symbol table.)
8477
8478 Note that the dynamic linker ignores the section
8479 symbol value, so we don't subtract osec->vma
8480 from the emitted reloc addend. */
10dbd1f3 8481 if (sym_sec)
74541ad4 8482 osec = sym_sec->output_section;
10dbd1f3 8483 else
74541ad4
AM		 8484 osec = input_section->output_section;
8485 symbol = elf_section_data (osec)->dynindx;
8486 if (symbol == 0)
8487 {
8488 struct elf_link_hash_table *htab = elf_hash_table (info);
8489
8490 if ((osec->flags & SEC_READONLY) == 0
8491 && htab->data_index_section != NULL)
8492 osec = htab->data_index_section;
8493 else
8494 osec = htab->text_index_section;
8495 symbol = elf_section_data (osec)->dynindx;
8496 }
6366ff1e
MM		 8497 BFD_ASSERT (symbol != 0);
8498 }
a16385dc
MM		 8499 else
8500 /* On SVR4-ish systems, the dynamic loader cannot
8501 relocate the text and data segments independently,
8502 so the symbol does not matter. */
8503 symbol = 0;
34e77a92
RS		 8504 if (dynreloc_st_type == STT_GNU_IFUNC)
8505 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8506 to the .iplt entry. Instead, every non-call reference
8507 must use an R_ARM_IRELATIVE relocation to obtain the
8508 correct run-time address. */
8509 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8510 else
8511 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8512 if (globals->use_rel)
8513 relocate = TRUE;
8514 else
34e77a92 8515 outrel.r_addend += dynreloc_value;
252b5132 8516 }
f21f3fe0 8517
47beaa6a 8518 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8519
f21f3fe0 8520 /* If this reloc is against an external symbol, we do not want to
252b5132 8521 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8522 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8523 if (! relocate)
8524 return bfd_reloc_ok;
9a5aca8c 8525
f21f3fe0 8526 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8527 contents, rel->r_offset,
8528 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8529 }
8530 else switch (r_type)
8531 {
00a97672
RS		 8532 case R_ARM_ABS12:
8533 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8534
dfc5f959 8535 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8536 case R_ARM_CALL:
8537 case R_ARM_JUMP24:
8029a119 8538 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8539 case R_ARM_PLT32:
906e58ca 8540 {
906e58ca
NC		 8541 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8542
dfc5f959 8543 if (r_type == R_ARM_XPC25)
252b5132 8544 {
dfc5f959
NC		 8545 /* Check for Arm calling Arm function. */
8546 /* FIXME: Should we translate the instruction into a BL
8547 instruction instead ? */
35fc36a8 8548 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8549 (*_bfd_error_handler)
8550 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8551 input_bfd,
8552 h ? h->root.root.string : "(local)");
dfc5f959 8553 }
155d87d7 8554 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8555 {
8556 /* Check for Arm calling Thumb function. */
35fc36a8 8557 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8558 {
f2a9dd69
DJ		 8559 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8560 output_bfd, input_section,
8561 hit_data, sym_sec, rel->r_offset,
8562 signed_addend, value,
8563 error_message))
8564 return bfd_reloc_ok;
8565 else
8566 return bfd_reloc_dangerous;
dfc5f959 8567 }
252b5132 8568 }
ba96a88f 8569
906e58ca 8570 /* Check if a stub has to be inserted because the
8029a119 8571 destination is too far or we are changing mode. */
155d87d7
CL		 8572 if ( r_type == R_ARM_CALL
8573 || r_type == R_ARM_JUMP24
8574 || r_type == R_ARM_PLT32)
906e58ca 8575 {
fe33d2fa
CL		 8576 enum elf32_arm_stub_type stub_type = arm_stub_none;
8577 struct elf32_arm_link_hash_entry *hash;
8578
8579 hash = (struct elf32_arm_link_hash_entry *) h;
8580 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8581 st_type, &branch_type,
8582 hash, value, sym_sec,
fe33d2fa 8583 input_bfd, sym_name);
5fa9e92f 8584
fe33d2fa 8585 if (stub_type != arm_stub_none)
906e58ca
NC		 8586 {
8587 /* The target is out of reach, so redirect the
8588 branch to the local stub for this function. */
906e58ca
NC		 8589 stub_entry = elf32_arm_get_stub_entry (input_section,
8590 sym_sec, h,
fe33d2fa
CL		 8591 rel, globals,
8592 stub_type);
9cd3e4e5
NC		 8593 {
8594 if (stub_entry != NULL)
8595 value = (stub_entry->stub_offset
8596 + stub_entry->stub_sec->output_offset
8597 + stub_entry->stub_sec->output_section->vma);
8598
8599 if (plt_offset != (bfd_vma) -1)
8600 *unresolved_reloc_p = FALSE;
8601 }
906e58ca 8602 }
fe33d2fa
CL		 8603 else
8604 {
8605 /* If the call goes through a PLT entry, make sure to
8606 check distance to the right destination address. */
34e77a92 8607 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8608 {
8609 value = (splt->output_section->vma
8610 + splt->output_offset
34e77a92 8611 + plt_offset);
fe33d2fa
CL		 8612 *unresolved_reloc_p = FALSE;
8613 /* The PLT entry is in ARM mode, regardless of the
8614 target function. */
35fc36a8 8615 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8616 }
8617 }
906e58ca
NC		 8618 }
8619
dea514f5
PB		 8620 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8621 where:
8622 S is the address of the symbol in the relocation.
8623 P is address of the instruction being relocated.
8624 A is the addend (extracted from the instruction) in bytes.
8625
8626 S is held in 'value'.
8627 P is the base address of the section containing the
8628 instruction plus the offset of the reloc into that
8629 section, ie:
8630 (input_section->output_section->vma +
8631 input_section->output_offset +
8632 rel->r_offset).
8633 A is the addend, converted into bytes, ie:
8634 (signed_addend * 4)
8635
8636 Note: None of these operations have knowledge of the pipeline
8637 size of the processor, thus it is up to the assembler to
8638 encode this information into the addend. */
8639 value -= (input_section->output_section->vma
8640 + input_section->output_offset);
8641 value -= rel->r_offset;
4e7fd91e
PB		 8642 if (globals->use_rel)
8643 value += (signed_addend << howto->size);
8644 else
8645 /* RELA addends do not have to be adjusted by howto->size. */
8646 value += signed_addend;
23080146 8647
dcb5e6e6
NC		 8648 signed_addend = value;
8649 signed_addend >>= howto->rightshift;
9a5aca8c 8650
5ab79981 8651 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8652 the next instruction unless a PLT entry will be created.
77b4f08f 8653 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8654 The jump to the next instruction is optimized as a NOP depending
8655 on the architecture. */
ffcb4889 8656 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8657 && plt_offset == (bfd_vma) -1)
77b4f08f 8658 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8659 {
cd1dac3d
DG		 8660 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8661
8662 if (arch_has_arm_nop (globals))
8663 value |= 0x0320f000;
8664 else
8665 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8666 }
8667 else
59f2c4e7 8668 {
9b485d32 8669 /* Perform a signed range check. */
dcb5e6e6 8670 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8671 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8672 return bfd_reloc_overflow;
9a5aca8c 8673
5ab79981 8674 addend = (value & 2);
39b41c9c 8675
5ab79981
PB		 8676 value = (signed_addend & howto->dst_mask)
8677 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8678
5ab79981
PB		 8679 if (r_type == R_ARM_CALL)
8680 {
155d87d7 8681 /* Set the H bit in the BLX instruction. */
35fc36a8 8682 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8683 {
8684 if (addend)
8685 value |= (1 << 24);
8686 else
8687 value &= ~(bfd_vma)(1 << 24);
8688 }
8689
5ab79981 8690 /* Select the correct instruction (BL or BLX). */
906e58ca 8691 /* Only if we are not handling a BL to a stub. In this
8029a119 8692 case, mode switching is performed by the stub. */
35fc36a8 8693 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8694 value |= (1 << 28);
63e1a0fc 8695 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8696 {
8697 value &= ~(bfd_vma)(1 << 28);
8698 value |= (1 << 24);
8699 }
39b41c9c
PB		 8700 }
8701 }
906e58ca 8702 }
252b5132 8703 break;
f21f3fe0 8704
252b5132
RH		 8705 case R_ARM_ABS32:
8706 value += addend;
35fc36a8 8707 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8708 value |= 1;
8709 break;
f21f3fe0 8710
bb224fc3
MS		 8711 case R_ARM_ABS32_NOI:
8712 value += addend;
8713 break;
8714
252b5132 8715 case R_ARM_REL32:
a8bc6c78 8716 value += addend;
35fc36a8 8717 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8718 value |= 1;
252b5132 8719 value -= (input_section->output_section->vma
62efb346 8720 + input_section->output_offset + rel->r_offset);
252b5132 8721 break;
eb043451 8722
bb224fc3
MS		 8723 case R_ARM_REL32_NOI:
8724 value += addend;
8725 value -= (input_section->output_section->vma
8726 + input_section->output_offset + rel->r_offset);
8727 break;
8728
eb043451
PB		 8729 case R_ARM_PREL31:
8730 value -= (input_section->output_section->vma
8731 + input_section->output_offset + rel->r_offset);
8732 value += signed_addend;
8733 if (! h || h->root.type != bfd_link_hash_undefweak)
8734 {
8029a119 8735 /* Check for overflow. */
eb043451
PB		 8736 if ((value ^ (value >> 1)) & (1 << 30))
8737 return bfd_reloc_overflow;
8738 }
8739 value &= 0x7fffffff;
8740 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8741 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8742 value |= 1;
8743 break;
252b5132 8744 }
f21f3fe0 8745
252b5132
RH		 8746 bfd_put_32 (input_bfd, value, hit_data);
8747 return bfd_reloc_ok;
8748
8749 case R_ARM_ABS8:
fd0fd00c
MJ		 8750 /* PR 16202: Refectch the addend using the correct size. */
8751 if (globals->use_rel)
8752 addend = bfd_get_8 (input_bfd, hit_data);
252b5132 8753 value += addend;
4e67d4ca
DG		 8754
8755 /* There is no way to tell whether the user intended to use a signed or
8756 unsigned addend. When checking for overflow we accept either,
8757 as specified by the AAELF. */
8758 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8759 return bfd_reloc_overflow;
8760
8761 bfd_put_8 (input_bfd, value, hit_data);
8762 return bfd_reloc_ok;
8763
8764 case R_ARM_ABS16:
fd0fd00c
MJ		 8765 /* PR 16202: Refectch the addend using the correct size. */
8766 if (globals->use_rel)
8767 addend = bfd_get_16 (input_bfd, hit_data);
252b5132
RH		 8768 value += addend;
8769
4e67d4ca
DG		 8770 /* See comment for R_ARM_ABS8. */
8771 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8772 return bfd_reloc_overflow;
8773
8774 bfd_put_16 (input_bfd, value, hit_data);
8775 return bfd_reloc_ok;
8776
252b5132 8777 case R_ARM_THM_ABS5:
9b485d32 8778 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8779 if (globals->use_rel)
8780 {
8781 /* Need to refetch addend. */
8782 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8783 /* ??? Need to determine shift amount from operand size. */
8784 addend >>= howto->rightshift;
8785 }
252b5132
RH		 8786 value += addend;
8787
8788 /* ??? Isn't value unsigned? */
8789 if ((long) value > 0x1f || (long) value < -0x10)
8790 return bfd_reloc_overflow;
8791
8792 /* ??? Value needs to be properly shifted into place first. */
8793 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8794 bfd_put_16 (input_bfd, value, hit_data);
8795 return bfd_reloc_ok;
8796
2cab6cc3
MS		 8797 case R_ARM_THM_ALU_PREL_11_0:
8798 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8799 {
8800 bfd_vma insn;
8801 bfd_signed_vma relocation;
8802
8803 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8804 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8805
99059e56
RM		 8806 if (globals->use_rel)
8807 {
8808 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8809 | ((insn & (1 << 26)) >> 15);
8810 if (insn & 0xf00000)
8811 signed_addend = -signed_addend;
8812 }
2cab6cc3
MS		 8813
8814 relocation = value + signed_addend;
79f08007 8815 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8816 + input_section->output_offset
8817 + rel->r_offset);
2cab6cc3 8818
b6518b38 8819 value = relocation;
2cab6cc3 8820
99059e56
RM		 8821 if (value >= 0x1000)
8822 return bfd_reloc_overflow;
2cab6cc3
MS		 8823
8824 insn = (insn & 0xfb0f8f00) | (value & 0xff)
99059e56
RM		 8825 | ((value & 0x700) << 4)
8826 | ((value & 0x800) << 15);
8827 if (relocation < 0)
8828 insn |= 0xa00000;
2cab6cc3
MS		 8829
8830 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8831 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8832
99059e56 8833 return bfd_reloc_ok;
2cab6cc3
MS		 8834 }
8835
e1ec24c6
NC		 8836 case R_ARM_THM_PC8:
8837 /* PR 10073: This reloc is not generated by the GNU toolchain,
8838 but it is supported for compatibility with third party libraries
8839 generated by other compilers, specifically the ARM/IAR. */
8840 {
8841 bfd_vma insn;
8842 bfd_signed_vma relocation;
8843
8844 insn = bfd_get_16 (input_bfd, hit_data);
8845
99059e56 8846 if (globals->use_rel)
79f08007 8847 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8848
8849 relocation = value + addend;
79f08007 8850 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8851 + input_section->output_offset
8852 + rel->r_offset);
e1ec24c6 8853
b6518b38 8854 value = relocation;
e1ec24c6
NC		 8855
8856 /* We do not check for overflow of this reloc. Although strictly
8857 speaking this is incorrect, it appears to be necessary in order
8858 to work with IAR generated relocs. Since GCC and GAS do not
8859 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8860 a problem for them. */
8861 value &= 0x3fc;
8862
8863 insn = (insn & 0xff00) | (value >> 2);
8864
8865 bfd_put_16 (input_bfd, insn, hit_data);
8866
99059e56 8867 return bfd_reloc_ok;
e1ec24c6
NC		 8868 }
8869
2cab6cc3
MS		 8870 case R_ARM_THM_PC12:
8871 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8872 {
8873 bfd_vma insn;
8874 bfd_signed_vma relocation;
8875
8876 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8877 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8878
99059e56
RM		 8879 if (globals->use_rel)
8880 {
8881 signed_addend = insn & 0xfff;
8882 if (!(insn & (1 << 23)))
8883 signed_addend = -signed_addend;
8884 }
2cab6cc3
MS		 8885
8886 relocation = value + signed_addend;
79f08007 8887 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8888 + input_section->output_offset
8889 + rel->r_offset);
2cab6cc3 8890
b6518b38 8891 value = relocation;
2cab6cc3 8892
99059e56
RM		 8893 if (value >= 0x1000)
8894 return bfd_reloc_overflow;
2cab6cc3
MS		 8895
8896 insn = (insn & 0xff7ff000) | value;
99059e56
RM		 8897 if (relocation >= 0)
8898 insn |= (1 << 23);
2cab6cc3
MS		 8899
8900 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8901 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8902
99059e56 8903 return bfd_reloc_ok;
2cab6cc3
MS		 8904 }
8905
dfc5f959 8906 case R_ARM_THM_XPC22:
c19d1205 8907 case R_ARM_THM_CALL:
bd97cb95 8908 case R_ARM_THM_JUMP24:
dfc5f959 8909 /* Thumb BL (branch long instruction). */
252b5132 8910 {
b34976b6 8911 bfd_vma relocation;
99059e56 8912 bfd_vma reloc_sign;
b34976b6
AM		 8913 bfd_boolean overflow = FALSE;
8914 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8915 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8916 bfd_signed_vma reloc_signed_max;
8917 bfd_signed_vma reloc_signed_min;
b34976b6 8918 bfd_vma check;
252b5132 8919 bfd_signed_vma signed_check;
e95de063 8920 int bitsize;
cd1dac3d 8921 const int thumb2 = using_thumb2 (globals);
252b5132 8922
5ab79981 8923 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8924 the next instruction unless a PLT entry will be created.
8925 The jump to the next instruction is optimized as a NOP.W for
8926 Thumb-2 enabled architectures. */
19540007 8927 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8928 && plt_offset == (bfd_vma) -1)
5ab79981 8929 {
cd1dac3d
DG		 8930 if (arch_has_thumb2_nop (globals))
8931 {
8932 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8933 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8934 }
8935 else
8936 {
8937 bfd_put_16 (input_bfd, 0xe000, hit_data);
8938 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8939 }
5ab79981
PB		 8940 return bfd_reloc_ok;
8941 }
8942
e95de063 8943 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
99059e56 8944 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8945 if (globals->use_rel)
8946 {
99059e56
RM		 8947 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8948 bfd_vma upper = upper_insn & 0x3ff;
8949 bfd_vma lower = lower_insn & 0x7ff;
e95de063
MS		 8950 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8951 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
99059e56
RM		 8952 bfd_vma i1 = j1 ^ s ? 0 : 1;
8953 bfd_vma i2 = j2 ^ s ? 0 : 1;
e95de063 8954
99059e56
RM		 8955 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8956 /* Sign extend. */
8957 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
e95de063 8958
4e7fd91e
PB		 8959 signed_addend = addend;
8960 }
cb1afa5c 8961
dfc5f959
NC		 8962 if (r_type == R_ARM_THM_XPC22)
8963 {
8964 /* Check for Thumb to Thumb call. */
8965 /* FIXME: Should we translate the instruction into a BL
8966 instruction instead ? */
35fc36a8 8967 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8968 (*_bfd_error_handler)
8969 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8970 input_bfd,
8971 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8972 }
8973 else
252b5132 8974 {
dfc5f959
NC		 8975 /* If it is not a call to Thumb, assume call to Arm.
8976 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8977 function call at all, but rather a long jump. Calls through
8978 the PLT do not require stubs. */
34e77a92 8979 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8980 {
bd97cb95 8981 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8982 {
8983 /* Convert BL to BLX. */
8984 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8985 }
155d87d7
CL		 8986 else if (( r_type != R_ARM_THM_CALL)
8987 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8988 {
8989 if (elf32_thumb_to_arm_stub
8990 (info, sym_name, input_bfd, output_bfd, input_section,
8991 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8992 error_message))
8993 return bfd_reloc_ok;
8994 else
8995 return bfd_reloc_dangerous;
8996 }
da5938a2 8997 }
35fc36a8
RS		 8998 else if (branch_type == ST_BRANCH_TO_THUMB
8999 && globals->use_blx
bd97cb95 9000 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 9001 {
9002 /* Make sure this is a BL. */
9003 lower_insn |= 0x1800;
9004 }
252b5132 9005 }
f21f3fe0 9006
fe33d2fa 9007 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 9008 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 9009 {
9010 /* Check if a stub has to be inserted because the destination
8029a119 9011 is too far. */
fe33d2fa
CL		 9012 struct elf32_arm_stub_hash_entry *stub_entry;
9013 struct elf32_arm_link_hash_entry *hash;
9014
9015 hash = (struct elf32_arm_link_hash_entry *) h;
9016
9017 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 9018 st_type, &branch_type,
9019 hash, value, sym_sec,
fe33d2fa
CL		 9020 input_bfd, sym_name);
9021
9022 if (stub_type != arm_stub_none)
906e58ca
NC		 9023 {
9024 /* The target is out of reach or we are changing modes, so
9025 redirect the branch to the local stub for this
9026 function. */
9027 stub_entry = elf32_arm_get_stub_entry (input_section,
9028 sym_sec, h,
fe33d2fa
CL		 9029 rel, globals,
9030 stub_type);
906e58ca 9031 if (stub_entry != NULL)
9cd3e4e5
NC		 9032 {
9033 value = (stub_entry->stub_offset
9034 + stub_entry->stub_sec->output_offset
9035 + stub_entry->stub_sec->output_section->vma);
9036
9037 if (plt_offset != (bfd_vma) -1)
9038 *unresolved_reloc_p = FALSE;
9039 }
906e58ca 9040
f4ac8484 9041 /* If this call becomes a call to Arm, force BLX. */
155d87d7 9042 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 9043 {
9044 if ((stub_entry
9045 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 9046 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 9047 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9048 }
906e58ca
NC		 9049 }
9050 }
9051
fe33d2fa 9052 /* Handle calls via the PLT. */
34e77a92 9053 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 9054 {
9055 value = (splt->output_section->vma
9056 + splt->output_offset
34e77a92 9057 + plt_offset);
fe33d2fa 9058
eed94f8f
NC		 9059 if (globals->use_blx
9060 && r_type == R_ARM_THM_CALL
9061 && ! using_thumb_only (globals))
fe33d2fa
CL		 9062 {
9063 /* If the Thumb BLX instruction is available, convert
9064 the BL to a BLX instruction to call the ARM-mode
9065 PLT entry. */
9066 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 9067 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 9068 }
9069 else
9070 {
eed94f8f
NC		 9071 if (! using_thumb_only (globals))
9072 /* Target the Thumb stub before the ARM PLT entry. */
9073 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 9074 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 9075 }
9076 *unresolved_reloc_p = FALSE;
9077 }
9078
ba96a88f 9079 relocation = value + signed_addend;
f21f3fe0 9080
252b5132 9081 relocation -= (input_section->output_section->vma
ba96a88f
NC		 9082 + input_section->output_offset
9083 + rel->r_offset);
9a5aca8c 9084
252b5132
RH		 9085 check = relocation >> howto->rightshift;
9086
9087 /* If this is a signed value, the rightshift just dropped
9088 leading 1 bits (assuming twos complement). */
9089 if ((bfd_signed_vma) relocation >= 0)
9090 signed_check = check;
9091 else
9092 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9093
e95de063
MS		 9094 /* Calculate the permissable maximum and minimum values for
9095 this relocation according to whether we're relocating for
9096 Thumb-2 or not. */
9097 bitsize = howto->bitsize;
9098 if (!thumb2)
9099 bitsize -= 2;
f6ebfac0 9100 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 9101 reloc_signed_min = ~reloc_signed_max;
9102
252b5132 9103 /* Assumes two's complement. */
ba96a88f 9104 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 9105 overflow = TRUE;
252b5132 9106
bd97cb95 9107 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 9108 /* For a BLX instruction, make sure that the relocation is rounded up
9109 to a word boundary. This follows the semantics of the instruction
9110 which specifies that bit 1 of the target address will come from bit
9111 1 of the base address. */
9112 relocation = (relocation + 2) & ~ 3;
cb1afa5c 9113
e95de063
MS		 9114 /* Put RELOCATION back into the insn. Assumes two's complement.
9115 We use the Thumb-2 encoding, which is safe even if dealing with
9116 a Thumb-1 instruction by virtue of our overflow check above. */
99059e56 9117 reloc_sign = (signed_check < 0) ? 1 : 0;
e95de063 9118 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
99059e56
RM		 9119 | ((relocation >> 12) & 0x3ff)
9120 | (reloc_sign << 10);
906e58ca 9121 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
99059e56
RM		 9122 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9123 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9124 | ((relocation >> 1) & 0x7ff);
c62e1cc3 9125
252b5132
RH		 9126 /* Put the relocated value back in the object file: */
9127 bfd_put_16 (input_bfd, upper_insn, hit_data);
9128 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9129
9130 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9131 }
9132 break;
9133
c19d1205
ZW		 9134 case R_ARM_THM_JUMP19:
9135 /* Thumb32 conditional branch instruction. */
9136 {
9137 bfd_vma relocation;
9138 bfd_boolean overflow = FALSE;
9139 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9140 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 9141 bfd_signed_vma reloc_signed_max = 0xffffe;
9142 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205 9143 bfd_signed_vma signed_check;
c5423981
TG		 9144 enum elf32_arm_stub_type stub_type = arm_stub_none;
9145 struct elf32_arm_stub_hash_entry *stub_entry;
9146 struct elf32_arm_link_hash_entry *hash;
c19d1205
ZW		 9147
9148 /* Need to refetch the addend, reconstruct the top three bits,
9149 and squish the two 11 bit pieces together. */
9150 if (globals->use_rel)
9151 {
9152 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 9153 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 9154 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9155 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9156 bfd_vma lower = (lower_insn & 0x07ff);
9157
a00a1f35
MS		 9158 upper |= J1 << 6;
9159 upper |= J2 << 7;
9160 upper |= (!S) << 8;
c19d1205
ZW		 9161 upper -= 0x0100; /* Sign extend. */
9162
9163 addend = (upper << 12) | (lower << 1);
9164 signed_addend = addend;
9165 }
9166
bd97cb95 9167 /* Handle calls via the PLT. */
34e77a92 9168 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 9169 {
9170 value = (splt->output_section->vma
9171 + splt->output_offset
34e77a92 9172 + plt_offset);
bd97cb95
DJ		 9173 /* Target the Thumb stub before the ARM PLT entry. */
9174 value -= PLT_THUMB_STUB_SIZE;
9175 *unresolved_reloc_p = FALSE;
9176 }
9177
c5423981
TG		 9178 hash = (struct elf32_arm_link_hash_entry *)h;
9179
9180 stub_type = arm_type_of_stub (info, input_section, rel,
9181 st_type, &branch_type,
9182 hash, value, sym_sec,
9183 input_bfd, sym_name);
9184 if (stub_type != arm_stub_none)
9185 {
9186 stub_entry = elf32_arm_get_stub_entry (input_section,
9187 sym_sec, h,
9188 rel, globals,
9189 stub_type);
9190 if (stub_entry != NULL)
9191 {
9192 value = (stub_entry->stub_offset
9193 + stub_entry->stub_sec->output_offset
9194 + stub_entry->stub_sec->output_section->vma);
9195 }
9196 }
c19d1205 9197
99059e56 9198 relocation = value + signed_addend;
c19d1205
ZW		 9199 relocation -= (input_section->output_section->vma
9200 + input_section->output_offset
9201 + rel->r_offset);
a00a1f35 9202 signed_check = (bfd_signed_vma) relocation;
c19d1205 9203
c19d1205
ZW		 9204 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9205 overflow = TRUE;
9206
9207 /* Put RELOCATION back into the insn. */
9208 {
9209 bfd_vma S = (relocation & 0x00100000) >> 20;
9210 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9211 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9212 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9213 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9214
a00a1f35 9215 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9216 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9217 }
9218
9219 /* Put the relocated value back in the object file: */
9220 bfd_put_16 (input_bfd, upper_insn, hit_data);
9221 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9222
9223 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9224 }
9225
9226 case R_ARM_THM_JUMP11:
9227 case R_ARM_THM_JUMP8:
9228 case R_ARM_THM_JUMP6:
51c5503b
NC		 9229 /* Thumb B (branch) instruction). */
9230 {
6cf9e9fe 9231 bfd_signed_vma relocation;
51c5503b
NC		 9232 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9233 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9234 bfd_signed_vma signed_check;
9235
c19d1205
ZW		 9236 /* CZB cannot jump backward. */
9237 if (r_type == R_ARM_THM_JUMP6)
9238 reloc_signed_min = 0;
9239
4e7fd91e 9240 if (globals->use_rel)
6cf9e9fe 9241 {
4e7fd91e
PB		 9242 /* Need to refetch addend. */
9243 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9244 if (addend & ((howto->src_mask + 1) >> 1))
9245 {
9246 signed_addend = -1;
9247 signed_addend &= ~ howto->src_mask;
9248 signed_addend |= addend;
9249 }
9250 else
9251 signed_addend = addend;
9252 /* The value in the insn has been right shifted. We need to
9253 undo this, so that we can perform the address calculation
9254 in terms of bytes. */
9255 signed_addend <<= howto->rightshift;
6cf9e9fe 9256 }
6cf9e9fe 9257 relocation = value + signed_addend;
51c5503b
NC		 9258
9259 relocation -= (input_section->output_section->vma
9260 + input_section->output_offset
9261 + rel->r_offset);
9262
6cf9e9fe
NC		 9263 relocation >>= howto->rightshift;
9264 signed_check = relocation;
c19d1205
ZW		 9265
9266 if (r_type == R_ARM_THM_JUMP6)
9267 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9268 else
9269 relocation &= howto->dst_mask;
51c5503b 9270 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9271
51c5503b
NC		 9272 bfd_put_16 (input_bfd, relocation, hit_data);
9273
9274 /* Assumes two's complement. */
9275 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9276 return bfd_reloc_overflow;
9277
9278 return bfd_reloc_ok;
9279 }
cedb70c5 9280
8375c36b
PB		 9281 case R_ARM_ALU_PCREL7_0:
9282 case R_ARM_ALU_PCREL15_8:
9283 case R_ARM_ALU_PCREL23_15:
9284 {
9285 bfd_vma insn;
9286 bfd_vma relocation;
9287
9288 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9289 if (globals->use_rel)
9290 {
9291 /* Extract the addend. */
9292 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9293 signed_addend = addend;
9294 }
8375c36b
PB		 9295 relocation = value + signed_addend;
9296
9297 relocation -= (input_section->output_section->vma
9298 + input_section->output_offset
9299 + rel->r_offset);
9300 insn = (insn & ~0xfff)
9301 | ((howto->bitpos << 7) & 0xf00)
9302 | ((relocation >> howto->bitpos) & 0xff);
9303 bfd_put_32 (input_bfd, value, hit_data);
9304 }
9305 return bfd_reloc_ok;
9306
252b5132
RH		 9307 case R_ARM_GNU_VTINHERIT:
9308 case R_ARM_GNU_VTENTRY:
9309 return bfd_reloc_ok;
9310
c19d1205 9311 case R_ARM_GOTOFF32:
252b5132 9312 /* Relocation is relative to the start of the
99059e56 9313 global offset table. */
252b5132
RH		 9314
9315 BFD_ASSERT (sgot != NULL);
9316 if (sgot == NULL)
99059e56 9317 return bfd_reloc_notsupported;
9a5aca8c 9318
cedb70c5 9319 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9320 address by one, so that attempts to call the function pointer will
9321 correctly interpret it as Thumb code. */
35fc36a8 9322 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9323 value += 1;
9324
252b5132 9325 /* Note that sgot->output_offset is not involved in this
99059e56
RM		 9326 calculation. We always want the start of .got. If we
9327 define _GLOBAL_OFFSET_TABLE in a different way, as is
9328 permitted by the ABI, we might have to change this
9329 calculation. */
252b5132 9330 value -= sgot->output_section->vma;
f21f3fe0 9331 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9332 contents, rel->r_offset, value,
00a97672 9333 rel->r_addend);
252b5132
RH		 9334
9335 case R_ARM_GOTPC:
a7c10850 9336 /* Use global offset table as symbol value. */
252b5132 9337 BFD_ASSERT (sgot != NULL);
f21f3fe0 9338
252b5132 9339 if (sgot == NULL)
99059e56 9340 return bfd_reloc_notsupported;
252b5132 9341
0945cdfd 9342 *unresolved_reloc_p = FALSE;
252b5132 9343 value = sgot->output_section->vma;
f21f3fe0 9344 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9345 contents, rel->r_offset, value,
00a97672 9346 rel->r_addend);
f21f3fe0 9347
252b5132 9348 case R_ARM_GOT32:
eb043451 9349 case R_ARM_GOT_PREL:
252b5132 9350 /* Relocation is to the entry for this symbol in the
99059e56 9351 global offset table. */
252b5132
RH		 9352 if (sgot == NULL)
9353 return bfd_reloc_notsupported;
f21f3fe0 9354
34e77a92
RS		 9355 if (dynreloc_st_type == STT_GNU_IFUNC
9356 && plt_offset != (bfd_vma) -1
9357 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9358 {
9359 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9360 symbol, and the relocation resolves directly to the runtime
9361 target rather than to the .iplt entry. This means that any
9362 .got entry would be the same value as the .igot.plt entry,
9363 so there's no point creating both. */
9364 sgot = globals->root.igotplt;
9365 value = sgot->output_offset + gotplt_offset;
9366 }
9367 else if (h != NULL)
252b5132
RH		 9368 {
9369 bfd_vma off;
f21f3fe0 9370
252b5132
RH		 9371 off = h->got.offset;
9372 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9373 if ((off & 1) != 0)
252b5132 9374 {
b436d854
RS		 9375 /* We have already processsed one GOT relocation against
9376 this symbol. */
9377 off &= ~1;
9378 if (globals->root.dynamic_sections_created
9379 && !SYMBOL_REFERENCES_LOCAL (info, h))
9380 *unresolved_reloc_p = FALSE;
9381 }
9382 else
9383 {
9384 Elf_Internal_Rela outrel;
9385
6f820c85 9386 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 9387 {
9388 /* If the symbol doesn't resolve locally in a static
9389 object, we have an undefined reference. If the
9390 symbol doesn't resolve locally in a dynamic object,
9391 it should be resolved by the dynamic linker. */
9392 if (globals->root.dynamic_sections_created)
9393 {
9394 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9395 *unresolved_reloc_p = FALSE;
9396 }
9397 else
9398 outrel.r_info = 0;
9399 outrel.r_addend = 0;
9400 }
252b5132
RH		 9401 else
9402 {
34e77a92 9403 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9404 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
0e1862bb 9405 else if (bfd_link_pic (info) &&
31943882
WN		 9406 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9407 || h->root.type != bfd_link_hash_undefweak))
99059e56
RM		 9408 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9409 else
9410 outrel.r_info = 0;
34e77a92 9411 outrel.r_addend = dynreloc_value;
b436d854 9412 }
ee29b9fb 9413
b436d854
RS		 9414 /* The GOT entry is initialized to zero by default.
9415 See if we should install a different value. */
9416 if (outrel.r_addend != 0
9417 && (outrel.r_info == 0 || globals->use_rel))
9418 {
9419 bfd_put_32 (output_bfd, outrel.r_addend,
9420 sgot->contents + off);
9421 outrel.r_addend = 0;
252b5132 9422 }
f21f3fe0 9423
b436d854
RS		 9424 if (outrel.r_info != 0)
9425 {
9426 outrel.r_offset = (sgot->output_section->vma
9427 + sgot->output_offset
9428 + off);
9429 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9430 }
9431 h->got.offset |= 1;
9432 }
252b5132
RH		 9433 value = sgot->output_offset + off;
9434 }
9435 else
9436 {
9437 bfd_vma off;
f21f3fe0 9438
252b5132
RH		 9439 BFD_ASSERT (local_got_offsets != NULL &&
9440 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9441
252b5132 9442 off = local_got_offsets[r_symndx];
f21f3fe0 9443
252b5132
RH		 9444 /* The offset must always be a multiple of 4. We use the
9445 least significant bit to record whether we have already
9b485d32 9446 generated the necessary reloc. */
252b5132
RH		 9447 if ((off & 1) != 0)
9448 off &= ~1;
9449 else
9450 {
00a97672 9451 if (globals->use_rel)
34e77a92 9452 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9453
0e1862bb 9454 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9455 {
947216bf 9456 Elf_Internal_Rela outrel;
f21f3fe0 9457
34e77a92 9458 outrel.r_addend = addend + dynreloc_value;
252b5132 9459 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9460 + sgot->output_offset
252b5132 9461 + off);
34e77a92 9462 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9463 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
34e77a92
RS		 9464 else
9465 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9466 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9467 }
f21f3fe0 9468
252b5132
RH		 9469 local_got_offsets[r_symndx] |= 1;
9470 }
f21f3fe0 9471
252b5132
RH		 9472 value = sgot->output_offset + off;
9473 }
eb043451
PB		 9474 if (r_type != R_ARM_GOT32)
9475 value += sgot->output_section->vma;
9a5aca8c 9476
f21f3fe0 9477 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9478 contents, rel->r_offset, value,
00a97672 9479 rel->r_addend);
f21f3fe0 9480
ba93b8ac
DJ		 9481 case R_ARM_TLS_LDO32:
9482 value = value - dtpoff_base (info);
9483
9484 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9485 contents, rel->r_offset, value,
9486 rel->r_addend);
ba93b8ac
DJ		 9487
9488 case R_ARM_TLS_LDM32:
9489 {
9490 bfd_vma off;
9491
362d30a1 9492 if (sgot == NULL)
ba93b8ac
DJ		 9493 abort ();
9494
9495 off = globals->tls_ldm_got.offset;
9496
9497 if ((off & 1) != 0)
9498 off &= ~1;
9499 else
9500 {
9501 /* If we don't know the module number, create a relocation
9502 for it. */
0e1862bb 9503 if (bfd_link_pic (info))
ba93b8ac
DJ		 9504 {
9505 Elf_Internal_Rela outrel;
ba93b8ac 9506
362d30a1 9507 if (srelgot == NULL)
ba93b8ac
DJ		 9508 abort ();
9509
00a97672 9510 outrel.r_addend = 0;
362d30a1
RS		 9511 outrel.r_offset = (sgot->output_section->vma
9512 + sgot->output_offset + off);
ba93b8ac
DJ		 9513 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9514
00a97672
RS		 9515 if (globals->use_rel)
9516 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9517 sgot->contents + off);
ba93b8ac 9518
47beaa6a 9519 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9520 }
9521 else
362d30a1 9522 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9523
9524 globals->tls_ldm_got.offset |= 1;
9525 }
9526
362d30a1 9527 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9528 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9529
9530 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9531 contents, rel->r_offset, value,
00a97672 9532 rel->r_addend);
ba93b8ac
DJ		 9533 }
9534
0855e32b
NS		 9535 case R_ARM_TLS_CALL:
9536 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9537 case R_ARM_TLS_GD32:
9538 case R_ARM_TLS_IE32:
0855e32b
NS		 9539 case R_ARM_TLS_GOTDESC:
9540 case R_ARM_TLS_DESCSEQ:
9541 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9542 {
0855e32b
NS		 9543 bfd_vma off, offplt;
9544 int indx = 0;
ba93b8ac
DJ		 9545 char tls_type;
9546
0855e32b 9547 BFD_ASSERT (sgot != NULL);
ba93b8ac 9548
ba93b8ac
DJ		 9549 if (h != NULL)
9550 {
9551 bfd_boolean dyn;
9552 dyn = globals->root.dynamic_sections_created;
0e1862bb
L		 9553 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
9554 bfd_link_pic (info),
9555 h)
9556 && (!bfd_link_pic (info)
ba93b8ac
DJ		 9557 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9558 {
9559 *unresolved_reloc_p = FALSE;
9560 indx = h->dynindx;
9561 }
9562 off = h->got.offset;
0855e32b 9563 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9564 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9565 }
9566 else
9567 {
0855e32b 9568 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9569 off = local_got_offsets[r_symndx];
0855e32b 9570 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9571 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9572 }
9573
0855e32b 9574 /* Linker relaxations happens from one of the
b38cadfb 9575 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9576 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9577 tls_type = GOT_TLS_IE;
0855e32b
NS		 9578
9579 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9580
9581 if ((off & 1) != 0)
9582 off &= ~1;
9583 else
9584 {
9585 bfd_boolean need_relocs = FALSE;
9586 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9587 int cur_off = off;
9588
9589 /* The GOT entries have not been initialized yet. Do it
9590 now, and emit any relocations. If both an IE GOT and a
9591 GD GOT are necessary, we emit the GD first. */
9592
0e1862bb 9593 if ((bfd_link_pic (info) || indx != 0)
ba93b8ac
DJ		 9594 && (h == NULL
9595 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9596 || h->root.type != bfd_link_hash_undefweak))
9597 {
9598 need_relocs = TRUE;
0855e32b 9599 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9600 }
9601
0855e32b
NS		 9602 if (tls_type & GOT_TLS_GDESC)
9603 {
47beaa6a
RS		 9604 bfd_byte *loc;
9605
0855e32b
NS		 9606 /* We should have relaxed, unless this is an undefined
9607 weak symbol. */
9608 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
0e1862bb 9609 || bfd_link_pic (info));
0855e32b 9610 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
99059e56 9611 <= globals->root.sgotplt->size);
0855e32b
NS		 9612
9613 outrel.r_addend = 0;
9614 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9615 + globals->root.sgotplt->output_offset
9616 + offplt
9617 + globals->sgotplt_jump_table_size);
b38cadfb 9618
0855e32b
NS		 9619 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9620 sreloc = globals->root.srelplt;
9621 loc = sreloc->contents;
9622 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9623 BFD_ASSERT (loc + RELOC_SIZE (globals)
99059e56 9624 <= sreloc->contents + sreloc->size);
0855e32b
NS		 9625
9626 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9627
9628 /* For globals, the first word in the relocation gets
9629 the relocation index and the top bit set, or zero,
9630 if we're binding now. For locals, it gets the
9631 symbol's offset in the tls section. */
99059e56 9632 bfd_put_32 (output_bfd,
0855e32b
NS		 9633 !h ? value - elf_hash_table (info)->tls_sec->vma
9634 : info->flags & DF_BIND_NOW ? 0
9635 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9636 globals->root.sgotplt->contents + offplt
9637 + globals->sgotplt_jump_table_size);
9638
0855e32b 9639 /* Second word in the relocation is always zero. */
99059e56 9640 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9641 globals->root.sgotplt->contents + offplt
9642 + globals->sgotplt_jump_table_size + 4);
0855e32b 9643 }
ba93b8ac
DJ		 9644 if (tls_type & GOT_TLS_GD)
9645 {
9646 if (need_relocs)
9647 {
00a97672 9648 outrel.r_addend = 0;
362d30a1
RS		 9649 outrel.r_offset = (sgot->output_section->vma
9650 + sgot->output_offset
00a97672 9651 + cur_off);
ba93b8ac 9652 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9653
00a97672
RS		 9654 if (globals->use_rel)
9655 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9656 sgot->contents + cur_off);
00a97672 9657
47beaa6a 9658 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9659
9660 if (indx == 0)
9661 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9662 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9663 else
9664 {
00a97672 9665 outrel.r_addend = 0;
ba93b8ac
DJ		 9666 outrel.r_info = ELF32_R_INFO (indx,
9667 R_ARM_TLS_DTPOFF32);
9668 outrel.r_offset += 4;
00a97672
RS		 9669
9670 if (globals->use_rel)
9671 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9672 sgot->contents + cur_off + 4);
00a97672 9673
47beaa6a
RS		 9674 elf32_arm_add_dynreloc (output_bfd, info,
9675 srelgot, &outrel);
ba93b8ac
DJ		 9676 }
9677 }
9678 else
9679 {
9680 /* If we are not emitting relocations for a
9681 general dynamic reference, then we must be in a
9682 static link or an executable link with the
9683 symbol binding locally. Mark it as belonging
9684 to module 1, the executable. */
9685 bfd_put_32 (output_bfd, 1,
362d30a1 9686 sgot->contents + cur_off);
ba93b8ac 9687 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9688 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9689 }
9690
9691 cur_off += 8;
9692 }
9693
9694 if (tls_type & GOT_TLS_IE)
9695 {
9696 if (need_relocs)
9697 {
00a97672
RS		 9698 if (indx == 0)
9699 outrel.r_addend = value - dtpoff_base (info);
9700 else
9701 outrel.r_addend = 0;
362d30a1
RS		 9702 outrel.r_offset = (sgot->output_section->vma
9703 + sgot->output_offset
ba93b8ac
DJ		 9704 + cur_off);
9705 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9706
00a97672
RS		 9707 if (globals->use_rel)
9708 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9709 sgot->contents + cur_off);
ba93b8ac 9710
47beaa6a 9711 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9712 }
9713 else
9714 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9715 sgot->contents + cur_off);
ba93b8ac
DJ		 9716 cur_off += 4;
9717 }
9718
9719 if (h != NULL)
9720 h->got.offset |= 1;
9721 else
9722 local_got_offsets[r_symndx] |= 1;
9723 }
9724
9725 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9726 off += 8;
0855e32b
NS		 9727 else if (tls_type & GOT_TLS_GDESC)
9728 off = offplt;
9729
9730 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9731 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9732 {
9733 bfd_signed_vma offset;
12352d3f
PB		 9734 /* TLS stubs are arm mode. The original symbol is a
9735 data object, so branch_type is bogus. */
9736 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9737 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9738 = arm_type_of_stub (info, input_section, rel,
9739 st_type, &branch_type,
0855e32b
NS		 9740 (struct elf32_arm_link_hash_entry *)h,
9741 globals->tls_trampoline, globals->root.splt,
9742 input_bfd, sym_name);
9743
9744 if (stub_type != arm_stub_none)
9745 {
9746 struct elf32_arm_stub_hash_entry *stub_entry
9747 = elf32_arm_get_stub_entry
9748 (input_section, globals->root.splt, 0, rel,
9749 globals, stub_type);
9750 offset = (stub_entry->stub_offset
9751 + stub_entry->stub_sec->output_offset
9752 + stub_entry->stub_sec->output_section->vma);
9753 }
9754 else
9755 offset = (globals->root.splt->output_section->vma
9756 + globals->root.splt->output_offset
9757 + globals->tls_trampoline);
9758
9759 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9760 {
9761 unsigned long inst;
b38cadfb
NC		 9762
9763 offset -= (input_section->output_section->vma
9764 + input_section->output_offset
9765 + rel->r_offset + 8);
0855e32b
NS		 9766
9767 inst = offset >> 2;
9768 inst &= 0x00ffffff;
9769 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9770 }
9771 else
9772 {
9773 /* Thumb blx encodes the offset in a complicated
9774 fashion. */
9775 unsigned upper_insn, lower_insn;
9776 unsigned neg;
9777
b38cadfb
NC		 9778 offset -= (input_section->output_section->vma
9779 + input_section->output_offset
0855e32b 9780 + rel->r_offset + 4);
b38cadfb 9781
12352d3f
PB		 9782 if (stub_type != arm_stub_none
9783 && arm_stub_is_thumb (stub_type))
9784 {
9785 lower_insn = 0xd000;
9786 }
9787 else
9788 {
9789 lower_insn = 0xc000;
6a631e86 9790 /* Round up the offset to a word boundary. */
12352d3f
PB		 9791 offset = (offset + 2) & ~2;
9792 }
9793
0855e32b
NS		 9794 neg = offset < 0;
9795 upper_insn = (0xf000
9796 | ((offset >> 12) & 0x3ff)
9797 | (neg << 10));
12352d3f 9798 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9799 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9800 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9801 bfd_put_16 (input_bfd, upper_insn, hit_data);
9802 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9803 return bfd_reloc_ok;
9804 }
9805 }
9806 /* These relocations needs special care, as besides the fact
9807 they point somewhere in .gotplt, the addend must be
9808 adjusted accordingly depending on the type of instruction
6a631e86 9809 we refer to. */
0855e32b
NS		 9810 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9811 {
9812 unsigned long data, insn;
9813 unsigned thumb;
b38cadfb 9814
0855e32b
NS		 9815 data = bfd_get_32 (input_bfd, hit_data);
9816 thumb = data & 1;
9817 data &= ~1u;
b38cadfb 9818
0855e32b
NS		 9819 if (thumb)
9820 {
9821 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9822 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9823 insn = (insn << 16)
9824 | bfd_get_16 (input_bfd,
9825 contents + rel->r_offset - data + 2);
9826 if ((insn & 0xf800c000) == 0xf000c000)
9827 /* bl/blx */
9828 value = -6;
9829 else if ((insn & 0xffffff00) == 0x4400)
9830 /* add */
9831 value = -5;
9832 else
9833 {
9834 (*_bfd_error_handler)
9835 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9836 input_bfd, input_section,
9837 (unsigned long)rel->r_offset, insn);
9838 return bfd_reloc_notsupported;
9839 }
9840 }
9841 else
9842 {
9843 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9844
9845 switch (insn >> 24)
9846 {
9847 case 0xeb: /* bl */
9848 case 0xfa: /* blx */
9849 value = -4;
9850 break;
9851
9852 case 0xe0: /* add */
9853 value = -8;
9854 break;
b38cadfb 9855
0855e32b
NS		 9856 default:
9857 (*_bfd_error_handler)
9858 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9859 input_bfd, input_section,
9860 (unsigned long)rel->r_offset, insn);
9861 return bfd_reloc_notsupported;
9862 }
9863 }
b38cadfb 9864
0855e32b
NS		 9865 value += ((globals->root.sgotplt->output_section->vma
9866 + globals->root.sgotplt->output_offset + off)
9867 - (input_section->output_section->vma
9868 + input_section->output_offset
9869 + rel->r_offset)
9870 + globals->sgotplt_jump_table_size);
9871 }
9872 else
9873 value = ((globals->root.sgot->output_section->vma
9874 + globals->root.sgot->output_offset + off)
9875 - (input_section->output_section->vma
9876 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9877
9878 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9879 contents, rel->r_offset, value,
00a97672 9880 rel->r_addend);
ba93b8ac
DJ		 9881 }
9882
9883 case R_ARM_TLS_LE32:
3cbc1e5e 9884 if (bfd_link_dll (info))
ba93b8ac
DJ		 9885 {
9886 (*_bfd_error_handler)
9887 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9888 input_bfd, input_section,
9889 (long) rel->r_offset, howto->name);
46691134 9890 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9891 }
9892 else
9893 value = tpoff (info, value);
906e58ca 9894
ba93b8ac 9895 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9896 contents, rel->r_offset, value,
9897 rel->r_addend);
ba93b8ac 9898
319850b4
JB		 9899 case R_ARM_V4BX:
9900 if (globals->fix_v4bx)
845b51d6
PB		 9901 {
9902 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9903
845b51d6
PB		 9904 /* Ensure that we have a BX instruction. */
9905 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9906
845b51d6
PB		 9907 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9908 {
9909 /* Branch to veneer. */
9910 bfd_vma glue_addr;
9911 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9912 glue_addr -= input_section->output_section->vma
9913 + input_section->output_offset
9914 + rel->r_offset + 8;
9915 insn = (insn & 0xf0000000) | 0x0a000000
9916 | ((glue_addr >> 2) & 0x00ffffff);
9917 }
9918 else
9919 {
9920 /* Preserve Rm (lowest four bits) and the condition code
9921 (highest four bits). Other bits encode MOV PC,Rm. */
9922 insn = (insn & 0xf000000f) | 0x01a0f000;
9923 }
319850b4 9924
845b51d6
PB		 9925 bfd_put_32 (input_bfd, insn, hit_data);
9926 }
319850b4
JB		 9927 return bfd_reloc_ok;
9928
b6895b4f
PB		 9929 case R_ARM_MOVW_ABS_NC:
9930 case R_ARM_MOVT_ABS:
9931 case R_ARM_MOVW_PREL_NC:
9932 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9933 /* Until we properly support segment-base-relative addressing then
9934 we assume the segment base to be zero, as for the group relocations.
9935 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9936 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9937 case R_ARM_MOVW_BREL_NC:
9938 case R_ARM_MOVW_BREL:
9939 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9940 {
9941 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9942
9943 if (globals->use_rel)
9944 {
9945 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9946 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9947 }
92f5d02b 9948
b6895b4f 9949 value += signed_addend;
b6895b4f
PB		 9950
9951 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9952 value -= (input_section->output_section->vma
9953 + input_section->output_offset + rel->r_offset);
9954
92f5d02b 9955 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
99059e56 9956 return bfd_reloc_overflow;
92f5d02b 9957
35fc36a8 9958 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9959 value |= 1;
9960
9961 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
99059e56 9962 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9963 value >>= 16;
9964
9965 insn &= 0xfff0f000;
9966 insn |= value & 0xfff;
9967 insn |= (value & 0xf000) << 4;
9968 bfd_put_32 (input_bfd, insn, hit_data);
9969 }
9970 return bfd_reloc_ok;
9971
9972 case R_ARM_THM_MOVW_ABS_NC:
9973 case R_ARM_THM_MOVT_ABS:
9974 case R_ARM_THM_MOVW_PREL_NC:
9975 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9976 /* Until we properly support segment-base-relative addressing then
9977 we assume the segment base to be zero, as for the above relocations.
9978 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9979 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9980 as R_ARM_THM_MOVT_ABS. */
9981 case R_ARM_THM_MOVW_BREL_NC:
9982 case R_ARM_THM_MOVW_BREL:
9983 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9984 {
9985 bfd_vma insn;
906e58ca 9986
b6895b4f
PB		 9987 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9988 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9989
9990 if (globals->use_rel)
9991 {
9992 addend = ((insn >> 4) & 0xf000)
9993 | ((insn >> 15) & 0x0800)
9994 | ((insn >> 4) & 0x0700)
9995 | (insn & 0x00ff);
39623e12 9996 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9997 }
92f5d02b 9998
b6895b4f 9999 value += signed_addend;
b6895b4f
PB		 10000
10001 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
10002 value -= (input_section->output_section->vma
10003 + input_section->output_offset + rel->r_offset);
10004
92f5d02b 10005 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
99059e56 10006 return bfd_reloc_overflow;
92f5d02b 10007
35fc36a8 10008 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 10009 value |= 1;
10010
10011 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
99059e56 10012 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 10013 value >>= 16;
10014
10015 insn &= 0xfbf08f00;
10016 insn |= (value & 0xf000) << 4;
10017 insn |= (value & 0x0800) << 15;
10018 insn |= (value & 0x0700) << 4;
10019 insn |= (value & 0x00ff);
10020
10021 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10022 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10023 }
10024 return bfd_reloc_ok;
10025
4962c51a
MS		 10026 case R_ARM_ALU_PC_G0_NC:
10027 case R_ARM_ALU_PC_G1_NC:
10028 case R_ARM_ALU_PC_G0:
10029 case R_ARM_ALU_PC_G1:
10030 case R_ARM_ALU_PC_G2:
10031 case R_ARM_ALU_SB_G0_NC:
10032 case R_ARM_ALU_SB_G1_NC:
10033 case R_ARM_ALU_SB_G0:
10034 case R_ARM_ALU_SB_G1:
10035 case R_ARM_ALU_SB_G2:
10036 {
10037 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10038 bfd_vma pc = input_section->output_section->vma
4962c51a 10039 + input_section->output_offset + rel->r_offset;
31a91d61 10040 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10041 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56
RM		 10042 bfd_vma residual;
10043 bfd_vma g_n;
4962c51a 10044 bfd_signed_vma signed_value;
99059e56
RM		 10045 int group = 0;
10046
10047 /* Determine which group of bits to select. */
10048 switch (r_type)
10049 {
10050 case R_ARM_ALU_PC_G0_NC:
10051 case R_ARM_ALU_PC_G0:
10052 case R_ARM_ALU_SB_G0_NC:
10053 case R_ARM_ALU_SB_G0:
10054 group = 0;
10055 break;
10056
10057 case R_ARM_ALU_PC_G1_NC:
10058 case R_ARM_ALU_PC_G1:
10059 case R_ARM_ALU_SB_G1_NC:
10060 case R_ARM_ALU_SB_G1:
10061 group = 1;
10062 break;
10063
10064 case R_ARM_ALU_PC_G2:
10065 case R_ARM_ALU_SB_G2:
10066 group = 2;
10067 break;
10068
10069 default:
10070 abort ();
10071 }
10072
10073 /* If REL, extract the addend from the insn. If RELA, it will
10074 have already been fetched for us. */
4962c51a 10075 if (globals->use_rel)
99059e56
RM		 10076 {
10077 int negative;
10078 bfd_vma constant = insn & 0xff;
10079 bfd_vma rotation = (insn & 0xf00) >> 8;
10080
10081 if (rotation == 0)
10082 signed_addend = constant;
10083 else
10084 {
10085 /* Compensate for the fact that in the instruction, the
10086 rotation is stored in multiples of 2 bits. */
10087 rotation *= 2;
10088
10089 /* Rotate "constant" right by "rotation" bits. */
10090 signed_addend = (constant >> rotation) |
10091 (constant << (8 * sizeof (bfd_vma) - rotation));
10092 }
10093
10094 /* Determine if the instruction is an ADD or a SUB.
10095 (For REL, this determines the sign of the addend.) */
10096 negative = identify_add_or_sub (insn);
10097 if (negative == 0)
10098 {
10099 (*_bfd_error_handler)
10100 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10101 input_bfd, input_section,
10102 (long) rel->r_offset, howto->name);
10103 return bfd_reloc_overflow;
10104 }
10105
10106 signed_addend *= negative;
10107 }
4962c51a
MS		 10108
10109 /* Compute the value (X) to go in the place. */
99059e56
RM		 10110 if (r_type == R_ARM_ALU_PC_G0_NC
10111 || r_type == R_ARM_ALU_PC_G1_NC
10112 || r_type == R_ARM_ALU_PC_G0
10113 || r_type == R_ARM_ALU_PC_G1
10114 || r_type == R_ARM_ALU_PC_G2)
10115 /* PC relative. */
10116 signed_value = value - pc + signed_addend;
10117 else
10118 /* Section base relative. */
10119 signed_value = value - sb + signed_addend;
10120
10121 /* If the target symbol is a Thumb function, then set the
10122 Thumb bit in the address. */
35fc36a8 10123 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 10124 signed_value |= 1;
10125
99059e56
RM		 10126 /* Calculate the value of the relevant G_n, in encoded
10127 constant-with-rotation format. */
b6518b38
NC		 10128 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10129 group, &residual);
99059e56
RM		 10130
10131 /* Check for overflow if required. */
10132 if ((r_type == R_ARM_ALU_PC_G0
10133 || r_type == R_ARM_ALU_PC_G1
10134 || r_type == R_ARM_ALU_PC_G2
10135 || r_type == R_ARM_ALU_SB_G0
10136 || r_type == R_ARM_ALU_SB_G1
10137 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10138 {
10139 (*_bfd_error_handler)
10140 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10141 input_bfd, input_section,
b6518b38
NC		 10142 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
10143 howto->name);
99059e56
RM		 10144 return bfd_reloc_overflow;
10145 }
10146
10147 /* Mask out the value and the ADD/SUB part of the opcode; take care
10148 not to destroy the S bit. */
10149 insn &= 0xff1ff000;
10150
10151 /* Set the opcode according to whether the value to go in the
10152 place is negative. */
10153 if (signed_value < 0)
10154 insn |= 1 << 22;
10155 else
10156 insn |= 1 << 23;
10157
10158 /* Encode the offset. */
10159 insn |= g_n;
4962c51a
MS		 10160
10161 bfd_put_32 (input_bfd, insn, hit_data);
10162 }
10163 return bfd_reloc_ok;
10164
10165 case R_ARM_LDR_PC_G0:
10166 case R_ARM_LDR_PC_G1:
10167 case R_ARM_LDR_PC_G2:
10168 case R_ARM_LDR_SB_G0:
10169 case R_ARM_LDR_SB_G1:
10170 case R_ARM_LDR_SB_G2:
10171 {
10172 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10173 bfd_vma pc = input_section->output_section->vma
4962c51a 10174 + input_section->output_offset + rel->r_offset;
31a91d61 10175 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10176 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10177 bfd_vma residual;
4962c51a 10178 bfd_signed_vma signed_value;
99059e56
RM		 10179 int group = 0;
10180
10181 /* Determine which groups of bits to calculate. */
10182 switch (r_type)
10183 {
10184 case R_ARM_LDR_PC_G0:
10185 case R_ARM_LDR_SB_G0:
10186 group = 0;
10187 break;
10188
10189 case R_ARM_LDR_PC_G1:
10190 case R_ARM_LDR_SB_G1:
10191 group = 1;
10192 break;
10193
10194 case R_ARM_LDR_PC_G2:
10195 case R_ARM_LDR_SB_G2:
10196 group = 2;
10197 break;
10198
10199 default:
10200 abort ();
10201 }
10202
10203 /* If REL, extract the addend from the insn. If RELA, it will
10204 have already been fetched for us. */
4962c51a 10205 if (globals->use_rel)
99059e56
RM		 10206 {
10207 int negative = (insn & (1 << 23)) ? 1 : -1;
10208 signed_addend = negative * (insn & 0xfff);
10209 }
4962c51a
MS		 10210
10211 /* Compute the value (X) to go in the place. */
99059e56
RM		 10212 if (r_type == R_ARM_LDR_PC_G0
10213 || r_type == R_ARM_LDR_PC_G1
10214 || r_type == R_ARM_LDR_PC_G2)
10215 /* PC relative. */
10216 signed_value = value - pc + signed_addend;
10217 else
10218 /* Section base relative. */
10219 signed_value = value - sb + signed_addend;
10220
10221 /* Calculate the value of the relevant G_{n-1} to obtain
10222 the residual at that stage. */
b6518b38
NC		 10223 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10224 group - 1, &residual);
99059e56
RM		 10225
10226 /* Check for overflow. */
10227 if (residual >= 0x1000)
10228 {
10229 (*_bfd_error_handler)
10230 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
b6518b38
NC		 10231 input_bfd, input_section,
10232 (long) rel->r_offset, labs (signed_value), howto->name);
99059e56
RM		 10233 return bfd_reloc_overflow;
10234 }
10235
10236 /* Mask out the value and U bit. */
10237 insn &= 0xff7ff000;
10238
10239 /* Set the U bit if the value to go in the place is non-negative. */
10240 if (signed_value >= 0)
10241 insn |= 1 << 23;
10242
10243 /* Encode the offset. */
10244 insn |= residual;
4962c51a
MS		 10245
10246 bfd_put_32 (input_bfd, insn, hit_data);
10247 }
10248 return bfd_reloc_ok;
10249
10250 case R_ARM_LDRS_PC_G0:
10251 case R_ARM_LDRS_PC_G1:
10252 case R_ARM_LDRS_PC_G2:
10253 case R_ARM_LDRS_SB_G0:
10254 case R_ARM_LDRS_SB_G1:
10255 case R_ARM_LDRS_SB_G2:
10256 {
10257 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10258 bfd_vma pc = input_section->output_section->vma
4962c51a 10259 + input_section->output_offset + rel->r_offset;
31a91d61 10260 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10261 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10262 bfd_vma residual;
4962c51a 10263 bfd_signed_vma signed_value;
99059e56
RM		 10264 int group = 0;
10265
10266 /* Determine which groups of bits to calculate. */
10267 switch (r_type)
10268 {
10269 case R_ARM_LDRS_PC_G0:
10270 case R_ARM_LDRS_SB_G0:
10271 group = 0;
10272 break;
10273
10274 case R_ARM_LDRS_PC_G1:
10275 case R_ARM_LDRS_SB_G1:
10276 group = 1;
10277 break;
10278
10279 case R_ARM_LDRS_PC_G2:
10280 case R_ARM_LDRS_SB_G2:
10281 group = 2;
10282 break;
10283
10284 default:
10285 abort ();
10286 }
10287
10288 /* If REL, extract the addend from the insn. If RELA, it will
10289 have already been fetched for us. */
4962c51a 10290 if (globals->use_rel)
99059e56
RM		 10291 {
10292 int negative = (insn & (1 << 23)) ? 1 : -1;
10293 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10294 }
4962c51a
MS		 10295
10296 /* Compute the value (X) to go in the place. */
99059e56
RM		 10297 if (r_type == R_ARM_LDRS_PC_G0
10298 || r_type == R_ARM_LDRS_PC_G1
10299 || r_type == R_ARM_LDRS_PC_G2)
10300 /* PC relative. */
10301 signed_value = value - pc + signed_addend;
10302 else
10303 /* Section base relative. */
10304 signed_value = value - sb + signed_addend;
10305
10306 /* Calculate the value of the relevant G_{n-1} to obtain
10307 the residual at that stage. */
b6518b38
NC		 10308 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10309 group - 1, &residual);
99059e56
RM		 10310
10311 /* Check for overflow. */
10312 if (residual >= 0x100)
10313 {
10314 (*_bfd_error_handler)
10315 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
b6518b38
NC		 10316 input_bfd, input_section,
10317 (long) rel->r_offset, labs (signed_value), howto->name);
99059e56
RM		 10318 return bfd_reloc_overflow;
10319 }
10320
10321 /* Mask out the value and U bit. */
10322 insn &= 0xff7ff0f0;
10323
10324 /* Set the U bit if the value to go in the place is non-negative. */
10325 if (signed_value >= 0)
10326 insn |= 1 << 23;
10327
10328 /* Encode the offset. */
10329 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
4962c51a
MS		 10330
10331 bfd_put_32 (input_bfd, insn, hit_data);
10332 }
10333 return bfd_reloc_ok;
10334
10335 case R_ARM_LDC_PC_G0:
10336 case R_ARM_LDC_PC_G1:
10337 case R_ARM_LDC_PC_G2:
10338 case R_ARM_LDC_SB_G0:
10339 case R_ARM_LDC_SB_G1:
10340 case R_ARM_LDC_SB_G2:
10341 {
10342 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10343 bfd_vma pc = input_section->output_section->vma
4962c51a 10344 + input_section->output_offset + rel->r_offset;
31a91d61 10345 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10346 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10347 bfd_vma residual;
4962c51a 10348 bfd_signed_vma signed_value;
99059e56
RM		 10349 int group = 0;
10350
10351 /* Determine which groups of bits to calculate. */
10352 switch (r_type)
10353 {
10354 case R_ARM_LDC_PC_G0:
10355 case R_ARM_LDC_SB_G0:
10356 group = 0;
10357 break;
10358
10359 case R_ARM_LDC_PC_G1:
10360 case R_ARM_LDC_SB_G1:
10361 group = 1;
10362 break;
10363
10364 case R_ARM_LDC_PC_G2:
10365 case R_ARM_LDC_SB_G2:
10366 group = 2;
10367 break;
10368
10369 default:
10370 abort ();
10371 }
10372
10373 /* If REL, extract the addend from the insn. If RELA, it will
10374 have already been fetched for us. */
4962c51a 10375 if (globals->use_rel)
99059e56
RM		 10376 {
10377 int negative = (insn & (1 << 23)) ? 1 : -1;
10378 signed_addend = negative * ((insn & 0xff) << 2);
10379 }
4962c51a
MS		 10380
10381 /* Compute the value (X) to go in the place. */
99059e56
RM		 10382 if (r_type == R_ARM_LDC_PC_G0
10383 || r_type == R_ARM_LDC_PC_G1
10384 || r_type == R_ARM_LDC_PC_G2)
10385 /* PC relative. */
10386 signed_value = value - pc + signed_addend;
10387 else
10388 /* Section base relative. */
10389 signed_value = value - sb + signed_addend;
10390
10391 /* Calculate the value of the relevant G_{n-1} to obtain
10392 the residual at that stage. */
b6518b38
NC		 10393 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10394 group - 1, &residual);
99059e56
RM		 10395
10396 /* Check for overflow. (The absolute value to go in the place must be
10397 divisible by four and, after having been divided by four, must
10398 fit in eight bits.) */
10399 if ((residual & 0x3) != 0 || residual >= 0x400)
10400 {
10401 (*_bfd_error_handler)
10402 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10403 input_bfd, input_section,
b6518b38 10404 (long) rel->r_offset, labs (signed_value), howto->name);
99059e56
RM		 10405 return bfd_reloc_overflow;
10406 }
10407
10408 /* Mask out the value and U bit. */
10409 insn &= 0xff7fff00;
10410
10411 /* Set the U bit if the value to go in the place is non-negative. */
10412 if (signed_value >= 0)
10413 insn |= 1 << 23;
10414
10415 /* Encode the offset. */
10416 insn |= residual >> 2;
4962c51a
MS		 10417
10418 bfd_put_32 (input_bfd, insn, hit_data);
10419 }
10420 return bfd_reloc_ok;
10421
252b5132
RH		 10422 default:
10423 return bfd_reloc_notsupported;
10424 }
10425}
10426
98c1d4aa
NC		 10427/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10428static void
57e8b36a
NC		 10429arm_add_to_rel (bfd * abfd,
10430 bfd_byte * address,
10431 reloc_howto_type * howto,
10432 bfd_signed_vma increment)
98c1d4aa 10433{
98c1d4aa
NC		 10434 bfd_signed_vma addend;
10435
bd97cb95
DJ		 10436 if (howto->type == R_ARM_THM_CALL
10437 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10438 {
9a5aca8c
AM		 10439 int upper_insn, lower_insn;
10440 int upper, lower;
98c1d4aa 10441
9a5aca8c
AM		 10442 upper_insn = bfd_get_16 (abfd, address);
10443 lower_insn = bfd_get_16 (abfd, address + 2);
10444 upper = upper_insn & 0x7ff;
10445 lower = lower_insn & 0x7ff;
10446
10447 addend = (upper << 12) | (lower << 1);
ddda4409 10448 addend += increment;
9a5aca8c 10449 addend >>= 1;
98c1d4aa 10450
9a5aca8c
AM		 10451 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10452 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10453
dc810e39
AM		 10454 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10455 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10456 }
10457 else
10458 {
10459 bfd_vma contents;
10460
10461 contents = bfd_get_32 (abfd, address);
10462
10463 /* Get the (signed) value from the instruction. */
10464 addend = contents & howto->src_mask;
10465 if (addend & ((howto->src_mask + 1) >> 1))
10466 {
10467 bfd_signed_vma mask;
10468
10469 mask = -1;
10470 mask &= ~ howto->src_mask;
10471 addend |= mask;
10472 }
10473
10474 /* Add in the increment, (which is a byte value). */
10475 switch (howto->type)
10476 {
10477 default:
10478 addend += increment;
10479 break;
10480
10481 case R_ARM_PC24:
c6596c5e 10482 case R_ARM_PLT32:
5b5bb741
PB		 10483 case R_ARM_CALL:
10484 case R_ARM_JUMP24:
9a5aca8c 10485 addend <<= howto->size;
dc810e39 10486 addend += increment;
9a5aca8c
AM		 10487
10488 /* Should we check for overflow here ? */
10489
10490 /* Drop any undesired bits. */
10491 addend >>= howto->rightshift;
10492 break;
10493 }
10494
10495 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10496
10497 bfd_put_32 (abfd, contents, address);
ddda4409 10498 }
98c1d4aa 10499}
252b5132 10500
ba93b8ac
DJ		 10501#define IS_ARM_TLS_RELOC(R_TYPE) \
10502 ((R_TYPE) == R_ARM_TLS_GD32 \
10503 || (R_TYPE) == R_ARM_TLS_LDO32 \
10504 || (R_TYPE) == R_ARM_TLS_LDM32 \
10505 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10506 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10507 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10508 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10509 || (R_TYPE) == R_ARM_TLS_IE32 \
10510 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10511
10512/* Specific set of relocations for the gnu tls dialect. */
10513#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10514 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10515 || (R_TYPE) == R_ARM_TLS_CALL \
10516 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10517 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10518 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10519
252b5132 10520/* Relocate an ARM ELF section. */
906e58ca 10521
b34976b6 10522static bfd_boolean
57e8b36a
NC		 10523elf32_arm_relocate_section (bfd * output_bfd,
10524 struct bfd_link_info * info,
10525 bfd * input_bfd,
10526 asection * input_section,
10527 bfd_byte * contents,
10528 Elf_Internal_Rela * relocs,
10529 Elf_Internal_Sym * local_syms,
10530 asection ** local_sections)
252b5132 10531{
b34976b6
AM		 10532 Elf_Internal_Shdr *symtab_hdr;
10533 struct elf_link_hash_entry **sym_hashes;
10534 Elf_Internal_Rela *rel;
10535 Elf_Internal_Rela *relend;
10536 const char *name;
b32d3aa2 10537 struct elf32_arm_link_hash_table * globals;
252b5132 10538
4e7fd91e 10539 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10540 if (globals == NULL)
10541 return FALSE;
b491616a 10542
0ffa91dd 10543 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10544 sym_hashes = elf_sym_hashes (input_bfd);
10545
10546 rel = relocs;
10547 relend = relocs + input_section->reloc_count;
10548 for (; rel < relend; rel++)
10549 {
ba96a88f
NC		 10550 int r_type;
10551 reloc_howto_type * howto;
10552 unsigned long r_symndx;
10553 Elf_Internal_Sym * sym;
10554 asection * sec;
252b5132 10555 struct elf_link_hash_entry * h;
ba96a88f
NC		 10556 bfd_vma relocation;
10557 bfd_reloc_status_type r;
10558 arelent bfd_reloc;
ba93b8ac 10559 char sym_type;
0945cdfd 10560 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10561 char *error_message = NULL;
f21f3fe0 10562
252b5132 10563 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10564 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10565 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10566
ba96a88f 10567 if ( r_type == R_ARM_GNU_VTENTRY
99059e56
RM		 10568 || r_type == R_ARM_GNU_VTINHERIT)
10569 continue;
252b5132 10570
b32d3aa2 10571 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10572 howto = bfd_reloc.howto;
252b5132 10573
252b5132
RH		 10574 h = NULL;
10575 sym = NULL;
10576 sec = NULL;
9b485d32 10577
252b5132
RH		 10578 if (r_symndx < symtab_hdr->sh_info)
10579 {
10580 sym = local_syms + r_symndx;
ba93b8ac 10581 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10582 sec = local_sections[r_symndx];
ffcb4889
NS		 10583
10584 /* An object file might have a reference to a local
10585 undefined symbol. This is a daft object file, but we
10586 should at least do something about it. V4BX & NONE
10587 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10588 allowed to use the undefined symbol, so allow those.
10589 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10590 if (r_type != R_ARM_V4BX
10591 && r_type != R_ARM_NONE
77b4f08f 10592 && r_symndx != STN_UNDEF
ffcb4889
NS		 10593 && bfd_is_und_section (sec)
10594 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10595 {
10596 if (!info->callbacks->undefined_symbol
10597 (info, bfd_elf_string_from_elf_section
10598 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10599 input_bfd, input_section,
10600 rel->r_offset, TRUE))
10601 return FALSE;
10602 }
b38cadfb 10603
4e7fd91e 10604 if (globals->use_rel)
f8df10f4 10605 {
4e7fd91e
PB		 10606 relocation = (sec->output_section->vma
10607 + sec->output_offset
10608 + sym->st_value);
0e1862bb 10609 if (!bfd_link_relocatable (info)
ab96bf03
AM		 10610 && (sec->flags & SEC_MERGE)
10611 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10612 {
4e7fd91e
PB		 10613 asection *msec;
10614 bfd_vma addend, value;
10615
39623e12 10616 switch (r_type)
4e7fd91e 10617 {
39623e12
PB		 10618 case R_ARM_MOVW_ABS_NC:
10619 case R_ARM_MOVT_ABS:
10620 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10621 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10622 addend = (addend ^ 0x8000) - 0x8000;
10623 break;
f8df10f4 10624
39623e12
PB		 10625 case R_ARM_THM_MOVW_ABS_NC:
10626 case R_ARM_THM_MOVT_ABS:
10627 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10628 << 16;
10629 value |= bfd_get_16 (input_bfd,
10630 contents + rel->r_offset + 2);
10631 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10632 | ((value & 0x04000000) >> 15);
10633 addend = (addend ^ 0x8000) - 0x8000;
10634 break;
f8df10f4 10635
39623e12
PB		 10636 default:
10637 if (howto->rightshift
10638 || (howto->src_mask & (howto->src_mask + 1)))
10639 {
10640 (*_bfd_error_handler)
10641 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10642 input_bfd, input_section,
10643 (long) rel->r_offset, howto->name);
10644 return FALSE;
10645 }
10646
10647 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10648
10649 /* Get the (signed) value from the instruction. */
10650 addend = value & howto->src_mask;
10651 if (addend & ((howto->src_mask + 1) >> 1))
10652 {
10653 bfd_signed_vma mask;
10654
10655 mask = -1;
10656 mask &= ~ howto->src_mask;
10657 addend |= mask;
10658 }
10659 break;
4e7fd91e 10660 }
39623e12 10661
4e7fd91e
PB		 10662 msec = sec;
10663 addend =
10664 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10665 - relocation;
10666 addend += msec->output_section->vma + msec->output_offset;
39623e12 10667
cc643b88 10668 /* Cases here must match those in the preceding
39623e12
PB		 10669 switch statement. */
10670 switch (r_type)
10671 {
10672 case R_ARM_MOVW_ABS_NC:
10673 case R_ARM_MOVT_ABS:
10674 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10675 | (addend & 0xfff);
10676 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10677 break;
10678
10679 case R_ARM_THM_MOVW_ABS_NC:
10680 case R_ARM_THM_MOVT_ABS:
10681 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10682 | (addend & 0xff) | ((addend & 0x0800) << 15);
10683 bfd_put_16 (input_bfd, value >> 16,
10684 contents + rel->r_offset);
10685 bfd_put_16 (input_bfd, value,
10686 contents + rel->r_offset + 2);
10687 break;
10688
10689 default:
10690 value = (value & ~ howto->dst_mask)
10691 | (addend & howto->dst_mask);
10692 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10693 break;
10694 }
f8df10f4 10695 }
f8df10f4 10696 }
4e7fd91e
PB		 10697 else
10698 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10699 }
10700 else
10701 {
62d887d4 10702 bfd_boolean warned, ignored;
560e09e9 10703
b2a8e766
AM		 10704 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10705 r_symndx, symtab_hdr, sym_hashes,
10706 h, sec, relocation,
62d887d4 10707 unresolved_reloc, warned, ignored);
ba93b8ac
DJ		 10708
10709 sym_type = h->type;
252b5132
RH		 10710 }
10711
dbaa2011 10712 if (sec != NULL && discarded_section (sec))
e4067dbb 10713 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10714 rel, 1, relend, howto, 0, contents);
ab96bf03 10715
0e1862bb 10716 if (bfd_link_relocatable (info))
ab96bf03
AM		 10717 {
10718 /* This is a relocatable link. We don't have to change
10719 anything, unless the reloc is against a section symbol,
10720 in which case we have to adjust according to where the
10721 section symbol winds up in the output section. */
10722 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10723 {
10724 if (globals->use_rel)
10725 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10726 howto, (bfd_signed_vma) sec->output_offset);
10727 else
10728 rel->r_addend += sec->output_offset;
10729 }
10730 continue;
10731 }
10732
252b5132
RH		 10733 if (h != NULL)
10734 name = h->root.root.string;
10735 else
10736 {
10737 name = (bfd_elf_string_from_elf_section
10738 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10739 if (name == NULL || *name == '\0')
10740 name = bfd_section_name (input_bfd, sec);
10741 }
f21f3fe0 10742
cf35638d 10743 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10744 && r_type != R_ARM_NONE
10745 && (h == NULL
10746 || h->root.type == bfd_link_hash_defined
10747 || h->root.type == bfd_link_hash_defweak)
10748 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10749 {
10750 (*_bfd_error_handler)
10751 ((sym_type == STT_TLS
10752 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10753 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10754 input_bfd,
10755 input_section,
10756 (long) rel->r_offset,
10757 howto->name,
10758 name);
10759 }
10760
0855e32b 10761 /* We call elf32_arm_final_link_relocate unless we're completely
99059e56
RM		 10762 done, i.e., the relaxation produced the final output we want,
10763 and we won't let anybody mess with it. Also, we have to do
10764 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
6a631e86 10765 both in relaxed and non-relaxed cases. */
0855e32b
NS		 10766 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10767 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10768 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10769 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10770 & GOT_TLS_GDESC)))
10771 {
10772 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10773 contents, rel, h == NULL);
10774 /* This may have been marked unresolved because it came from
10775 a shared library. But we've just dealt with that. */
10776 unresolved_reloc = 0;
10777 }
10778 else
10779 r = bfd_reloc_continue;
b38cadfb 10780
0855e32b
NS		 10781 if (r == bfd_reloc_continue)
10782 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10783 input_section, contents, rel,
34e77a92 10784 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10785 (h ? h->target_internal
10786 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10787 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10788
10789 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10790 because such sections are not SEC_ALLOC and thus ld.so will
10791 not process them. */
10792 if (unresolved_reloc
99059e56
RM		 10793 && !((input_section->flags & SEC_DEBUGGING) != 0
10794 && h->def_dynamic)
1d5316ab
AM		 10795 && _bfd_elf_section_offset (output_bfd, info, input_section,
10796 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10797 {
10798 (*_bfd_error_handler)
843fe662
L		 10799 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10800 input_bfd,
10801 input_section,
10802 (long) rel->r_offset,
10803 howto->name,
10804 h->root.root.string);
0945cdfd
DJ		 10805 return FALSE;
10806 }
252b5132
RH		 10807
10808 if (r != bfd_reloc_ok)
10809 {
252b5132
RH		 10810 switch (r)
10811 {
10812 case bfd_reloc_overflow:
cf919dfd
PB		 10813 /* If the overflowing reloc was to an undefined symbol,
10814 we have already printed one error message and there
10815 is no point complaining again. */
10816 if ((! h ||
10817 h->root.type != bfd_link_hash_undefined)
10818 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10819 (info, (h ? &h->root : NULL), name, howto->name,
10820 (bfd_vma) 0, input_bfd, input_section,
10821 rel->r_offset))))
b34976b6 10822 return FALSE;
252b5132
RH		 10823 break;
10824
10825 case bfd_reloc_undefined:
10826 if (!((*info->callbacks->undefined_symbol)
10827 (info, name, input_bfd, input_section,
b34976b6
AM		 10828 rel->r_offset, TRUE)))
10829 return FALSE;
252b5132
RH		 10830 break;
10831
10832 case bfd_reloc_outofrange:
f2a9dd69 10833 error_message = _("out of range");
252b5132
RH		 10834 goto common_error;
10835
10836 case bfd_reloc_notsupported:
f2a9dd69 10837 error_message = _("unsupported relocation");
252b5132
RH		 10838 goto common_error;
10839
10840 case bfd_reloc_dangerous:
f2a9dd69 10841 /* error_message should already be set. */
252b5132
RH		 10842 goto common_error;
10843
10844 default:
f2a9dd69 10845 error_message = _("unknown error");
8029a119 10846 /* Fall through. */
252b5132
RH		 10847
10848 common_error:
f2a9dd69
DJ		 10849 BFD_ASSERT (error_message != NULL);
10850 if (!((*info->callbacks->reloc_dangerous)
10851 (info, error_message, input_bfd, input_section,
252b5132 10852 rel->r_offset)))
b34976b6 10853 return FALSE;
252b5132
RH		 10854 break;
10855 }
10856 }
10857 }
10858
b34976b6 10859 return TRUE;
252b5132
RH		 10860}
10861
91d6fa6a 10862/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10863 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10864 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10865 maintaining that condition). */
10866
10867static void
10868add_unwind_table_edit (arm_unwind_table_edit **head,
10869 arm_unwind_table_edit **tail,
10870 arm_unwind_edit_type type,
10871 asection *linked_section,
91d6fa6a 10872 unsigned int tindex)
2468f9c9 10873{
21d799b5
NC		 10874 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10875 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10876
2468f9c9
PB		 10877 new_edit->type = type;
10878 new_edit->linked_section = linked_section;
91d6fa6a 10879 new_edit->index = tindex;
b38cadfb 10880
91d6fa6a 10881 if (tindex > 0)
2468f9c9
PB		 10882 {
10883 new_edit->next = NULL;
10884
10885 if (*tail)
10886 (*tail)->next = new_edit;
10887
10888 (*tail) = new_edit;
10889
10890 if (!*head)
10891 (*head) = new_edit;
10892 }
10893 else
10894 {
10895 new_edit->next = *head;
10896
10897 if (!*tail)
10898 *tail = new_edit;
10899
10900 *head = new_edit;
10901 }
10902}
10903
10904static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10905
10906/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10907static void
10908adjust_exidx_size(asection *exidx_sec, int adjust)
10909{
10910 asection *out_sec;
10911
10912 if (!exidx_sec->rawsize)
10913 exidx_sec->rawsize = exidx_sec->size;
10914
10915 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10916 out_sec = exidx_sec->output_section;
10917 /* Adjust size of output section. */
10918 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10919}
10920
10921/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10922static void
10923insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10924{
10925 struct _arm_elf_section_data *exidx_arm_data;
10926
10927 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10928 add_unwind_table_edit (
10929 &exidx_arm_data->u.exidx.unwind_edit_list,
10930 &exidx_arm_data->u.exidx.unwind_edit_tail,
10931 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10932
10933 adjust_exidx_size(exidx_sec, 8);
10934}
10935
10936/* Scan .ARM.exidx tables, and create a list describing edits which should be
10937 made to those tables, such that:
b38cadfb 10938
2468f9c9
PB		 10939 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10940 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
99059e56 10941 codes which have been inlined into the index).
2468f9c9 10942
85fdf906
AH		 10943 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10944
2468f9c9 10945 The edits are applied when the tables are written
b38cadfb 10946 (in elf32_arm_write_section). */
2468f9c9
PB		 10947
10948bfd_boolean
10949elf32_arm_fix_exidx_coverage (asection **text_section_order,
10950 unsigned int num_text_sections,
85fdf906
AH		 10951 struct bfd_link_info *info,
10952 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10953{
10954 bfd *inp;
10955 unsigned int last_second_word = 0, i;
10956 asection *last_exidx_sec = NULL;
10957 asection *last_text_sec = NULL;
10958 int last_unwind_type = -1;
10959
10960 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10961 text sections. */
c72f2fb2 10962 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
2468f9c9
PB		 10963 {
10964 asection *sec;
b38cadfb 10965
2468f9c9 10966 for (sec = inp->sections; sec != NULL; sec = sec->next)
99059e56 10967 {
2468f9c9
PB		 10968 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10969 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10970
dec9d5df 10971 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10972 continue;
b38cadfb 10973
2468f9c9
PB		 10974 if (elf_sec->linked_to)
10975 {
10976 Elf_Internal_Shdr *linked_hdr
99059e56 10977 = &elf_section_data (elf_sec->linked_to)->this_hdr;
2468f9c9 10978 struct _arm_elf_section_data *linked_sec_arm_data
99059e56 10979 = get_arm_elf_section_data (linked_hdr->bfd_section);
2468f9c9
PB		 10980
10981 if (linked_sec_arm_data == NULL)
99059e56 10982 continue;
2468f9c9
PB		 10983
10984 /* Link this .ARM.exidx section back from the text section it
99059e56 10985 describes. */
2468f9c9
PB		 10986 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10987 }
10988 }
10989 }
10990
10991 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10992 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10993 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10994
10995 for (i = 0; i < num_text_sections; i++)
10996 {
10997 asection *sec = text_section_order[i];
10998 asection *exidx_sec;
10999 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
11000 struct _arm_elf_section_data *exidx_arm_data;
11001 bfd_byte *contents = NULL;
11002 int deleted_exidx_bytes = 0;
11003 bfd_vma j;
11004 arm_unwind_table_edit *unwind_edit_head = NULL;
11005 arm_unwind_table_edit *unwind_edit_tail = NULL;
11006 Elf_Internal_Shdr *hdr;
11007 bfd *ibfd;
11008
11009 if (arm_data == NULL)
99059e56 11010 continue;
2468f9c9
PB		 11011
11012 exidx_sec = arm_data->u.text.arm_exidx_sec;
11013 if (exidx_sec == NULL)
11014 {
11015 /* Section has no unwind data. */
11016 if (last_unwind_type == 0 || !last_exidx_sec)
11017 continue;
11018
11019 /* Ignore zero sized sections. */
11020 if (sec->size == 0)
11021 continue;
11022
11023 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11024 last_unwind_type = 0;
11025 continue;
11026 }
11027
22a8f80e
PB		 11028 /* Skip /DISCARD/ sections. */
11029 if (bfd_is_abs_section (exidx_sec->output_section))
11030 continue;
11031
2468f9c9
PB		 11032 hdr = &elf_section_data (exidx_sec)->this_hdr;
11033 if (hdr->sh_type != SHT_ARM_EXIDX)
99059e56 11034 continue;
b38cadfb 11035
2468f9c9
PB		 11036 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11037 if (exidx_arm_data == NULL)
99059e56 11038 continue;
b38cadfb 11039
2468f9c9 11040 ibfd = exidx_sec->owner;
b38cadfb 11041
2468f9c9
PB		 11042 if (hdr->contents != NULL)
11043 contents = hdr->contents;
11044 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11045 /* An error? */
11046 continue;
11047
11048 for (j = 0; j < hdr->sh_size; j += 8)
11049 {
11050 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11051 int unwind_type;
11052 int elide = 0;
11053
11054 /* An EXIDX_CANTUNWIND entry. */
11055 if (second_word == 1)
11056 {
11057 if (last_unwind_type == 0)
11058 elide = 1;
11059 unwind_type = 0;
11060 }
11061 /* Inlined unwinding data. Merge if equal to previous. */
11062 else if ((second_word & 0x80000000) != 0)
11063 {
85fdf906
AH		 11064 if (merge_exidx_entries
11065 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 11066 elide = 1;
11067 unwind_type = 1;
11068 last_second_word = second_word;
11069 }
11070 /* Normal table entry. In theory we could merge these too,
11071 but duplicate entries are likely to be much less common. */
11072 else
11073 unwind_type = 2;
11074
11075 if (elide)
11076 {
11077 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11078 DELETE_EXIDX_ENTRY, NULL, j / 8);
11079
11080 deleted_exidx_bytes += 8;
11081 }
11082
11083 last_unwind_type = unwind_type;
11084 }
11085
11086 /* Free contents if we allocated it ourselves. */
11087 if (contents != hdr->contents)
99059e56 11088 free (contents);
2468f9c9
PB		 11089
11090 /* Record edits to be applied later (in elf32_arm_write_section). */
11091 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11092 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 11093
2468f9c9
PB		 11094 if (deleted_exidx_bytes > 0)
11095 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11096
11097 last_exidx_sec = exidx_sec;
11098 last_text_sec = sec;
11099 }
11100
11101 /* Add terminating CANTUNWIND entry. */
11102 if (last_exidx_sec && last_unwind_type != 0)
11103 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11104
11105 return TRUE;
11106}
11107
3e6b1042
DJ		 11108static bfd_boolean
11109elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11110 bfd *ibfd, const char *name)
11111{
11112 asection *sec, *osec;
11113
3d4d4302 11114 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 11115 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11116 return TRUE;
11117
11118 osec = sec->output_section;
11119 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11120 return TRUE;
11121
11122 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11123 sec->output_offset, sec->size))
11124 return FALSE;
11125
11126 return TRUE;
11127}
11128
11129static bfd_boolean
11130elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11131{
11132 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 11133 asection *sec, *osec;
3e6b1042 11134
4dfe6ac6
NC		 11135 if (globals == NULL)
11136 return FALSE;
11137
3e6b1042
DJ		 11138 /* Invoke the regular ELF backend linker to do all the work. */
11139 if (!bfd_elf_final_link (abfd, info))
11140 return FALSE;
11141
fe33d2fa
CL		 11142 /* Process stub sections (eg BE8 encoding, ...). */
11143 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
7292b3ac 11144 unsigned int i;
cdb21a0a
NS		 11145 for (i=0; i<htab->top_id; i++)
11146 {
11147 sec = htab->stub_group[i].stub_sec;
11148 /* Only process it once, in its link_sec slot. */
11149 if (sec && i == htab->stub_group[i].link_sec->id)
11150 {
11151 osec = sec->output_section;
11152 elf32_arm_write_section (abfd, info, sec, sec->contents);
11153 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11154 sec->output_offset, sec->size))
11155 return FALSE;
11156 }
fe33d2fa 11157 }
fe33d2fa 11158
3e6b1042
DJ		 11159 /* Write out any glue sections now that we have created all the
11160 stubs. */
11161 if (globals->bfd_of_glue_owner != NULL)
11162 {
11163 if (! elf32_arm_output_glue_section (info, abfd,
11164 globals->bfd_of_glue_owner,
11165 ARM2THUMB_GLUE_SECTION_NAME))
11166 return FALSE;
11167
11168 if (! elf32_arm_output_glue_section (info, abfd,
11169 globals->bfd_of_glue_owner,
11170 THUMB2ARM_GLUE_SECTION_NAME))
11171 return FALSE;
11172
11173 if (! elf32_arm_output_glue_section (info, abfd,
11174 globals->bfd_of_glue_owner,
11175 VFP11_ERRATUM_VENEER_SECTION_NAME))
11176 return FALSE;
11177
11178 if (! elf32_arm_output_glue_section (info, abfd,
11179 globals->bfd_of_glue_owner,
11180 ARM_BX_GLUE_SECTION_NAME))
11181 return FALSE;
11182 }
11183
11184 return TRUE;
11185}
11186
5968a7b8
NC		 11187/* Return a best guess for the machine number based on the attributes. */
11188
11189static unsigned int
11190bfd_arm_get_mach_from_attributes (bfd * abfd)
11191{
11192 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11193
11194 switch (arch)
11195 {
11196 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11197 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11198 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11199
11200 case TAG_CPU_ARCH_V5TE:
11201 {
11202 char * name;
11203
11204 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11205 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11206
11207 if (name)
11208 {
11209 if (strcmp (name, "IWMMXT2") == 0)
11210 return bfd_mach_arm_iWMMXt2;
11211
11212 if (strcmp (name, "IWMMXT") == 0)
6034aab8 11213 return bfd_mach_arm_iWMMXt;
088ca6c1
NC		 11214
11215 if (strcmp (name, "XSCALE") == 0)
11216 {
11217 int wmmx;
11218
11219 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11220 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11221 switch (wmmx)
11222 {
11223 case 1: return bfd_mach_arm_iWMMXt;
11224 case 2: return bfd_mach_arm_iWMMXt2;
11225 default: return bfd_mach_arm_XScale;
11226 }
11227 }
5968a7b8
NC		 11228 }
11229
11230 return bfd_mach_arm_5TE;
11231 }
11232
11233 default:
11234 return bfd_mach_arm_unknown;
11235 }
11236}
11237
c178919b
NC		 11238/* Set the right machine number. */
11239
11240static bfd_boolean
57e8b36a 11241elf32_arm_object_p (bfd *abfd)
c178919b 11242{
5a6c6817 11243 unsigned int mach;
57e8b36a 11244
5a6c6817 11245 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11246
5968a7b8
NC		 11247 if (mach == bfd_mach_arm_unknown)
11248 {
11249 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11250 mach = bfd_mach_arm_ep9312;
11251 else
11252 mach = bfd_arm_get_mach_from_attributes (abfd);
11253 }
c178919b 11254
5968a7b8 11255 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11256 return TRUE;
11257}
11258
fc830a83 11259/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11260
b34976b6 11261static bfd_boolean
57e8b36a 11262elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11263{
11264 if (elf_flags_init (abfd)
11265 && elf_elfheader (abfd)->e_flags != flags)
11266 {
fc830a83
NC		 11267 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11268 {
fd2ec330 11269 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11270 (*_bfd_error_handler)
11271 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11272 abfd);
fc830a83 11273 else
d003868e
AM		 11274 _bfd_error_handler
11275 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11276 abfd);
fc830a83 11277 }
252b5132
RH		 11278 }
11279 else
11280 {
11281 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11282 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11283 }
11284
b34976b6 11285 return TRUE;
252b5132
RH		 11286}
11287
fc830a83 11288/* Copy backend specific data from one object module to another. */
9b485d32 11289
b34976b6 11290static bfd_boolean
57e8b36a 11291elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11292{
11293 flagword in_flags;
11294 flagword out_flags;
11295
0ffa91dd 11296 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11297 return TRUE;
252b5132 11298
fc830a83 11299 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11300 out_flags = elf_elfheader (obfd)->e_flags;
11301
fc830a83
NC		 11302 if (elf_flags_init (obfd)
11303 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11304 && in_flags != out_flags)
252b5132 11305 {
252b5132 11306 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11307 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11308 return FALSE;
252b5132
RH		 11309
11310 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11311 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11312 return FALSE;
252b5132
RH		 11313
11314 /* If the src and dest have different interworking flags
99059e56 11315 then turn off the interworking bit. */
fd2ec330 11316 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11317 {
fd2ec330 11318 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11319 _bfd_error_handler
11320 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11321 obfd, ibfd);
252b5132 11322
fd2ec330 11323 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11324 }
1006ba19
PB		 11325
11326 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11327 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11328 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11329 }
11330
11331 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11332 elf_flags_init (obfd) = TRUE;
252b5132 11333
e2349352 11334 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
ee065d83
PB		 11335}
11336
11337/* Values for Tag_ABI_PCS_R9_use. */
11338enum
11339{
11340 AEABI_R9_V6,
11341 AEABI_R9_SB,
11342 AEABI_R9_TLS,
11343 AEABI_R9_unused
11344};
11345
11346/* Values for Tag_ABI_PCS_RW_data. */
11347enum
11348{
11349 AEABI_PCS_RW_data_absolute,
11350 AEABI_PCS_RW_data_PCrel,
11351 AEABI_PCS_RW_data_SBrel,
11352 AEABI_PCS_RW_data_unused
11353};
11354
11355/* Values for Tag_ABI_enum_size. */
11356enum
11357{
11358 AEABI_enum_unused,
11359 AEABI_enum_short,
11360 AEABI_enum_wide,
11361 AEABI_enum_forced_wide
11362};
11363
104d59d1
JM		 11364/* Determine whether an object attribute tag takes an integer, a
11365 string or both. */
906e58ca 11366
104d59d1
JM		 11367static int
11368elf32_arm_obj_attrs_arg_type (int tag)
11369{
11370 if (tag == Tag_compatibility)
3483fe2e 11371 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11372 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11373 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11374 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11375 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11376 else if (tag < 32)
3483fe2e 11377 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11378 else
3483fe2e 11379 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11380}
11381
5aa6ff7c
AS		 11382/* The ABI defines that Tag_conformance should be emitted first, and that
11383 Tag_nodefaults should be second (if either is defined). This sets those
11384 two positions, and bumps up the position of all the remaining tags to
11385 compensate. */
11386static int
11387elf32_arm_obj_attrs_order (int num)
11388{
3de4a297 11389 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11390 return Tag_conformance;
3de4a297 11391 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11392 return Tag_nodefaults;
11393 if ((num - 2) < Tag_nodefaults)
11394 return num - 2;
11395 if ((num - 1) < Tag_conformance)
11396 return num - 1;
11397 return num;
11398}
11399
e8b36cd1
JM		 11400/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11401static bfd_boolean
11402elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11403{
11404 if ((tag & 127) < 64)
11405 {
11406 _bfd_error_handler
11407 (_("%B: Unknown mandatory EABI object attribute %d"),
11408 abfd, tag);
11409 bfd_set_error (bfd_error_bad_value);
11410 return FALSE;
11411 }
11412 else
11413 {
11414 _bfd_error_handler
11415 (_("Warning: %B: Unknown EABI object attribute %d"),
11416 abfd, tag);
11417 return TRUE;
11418 }
11419}
11420
91e22acd
AS		 11421/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11422 Returns -1 if no architecture could be read. */
11423
11424static int
11425get_secondary_compatible_arch (bfd *abfd)
11426{
11427 obj_attribute *attr =
11428 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11429
11430 /* Note: the tag and its argument below are uleb128 values, though
11431 currently-defined values fit in one byte for each. */
11432 if (attr->s
11433 && attr->s[0] == Tag_CPU_arch
11434 && (attr->s[1] & 128) != 128
11435 && attr->s[2] == 0)
11436 return attr->s[1];
11437
11438 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11439 return -1;
11440}
11441
11442/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11443 The tag is removed if ARCH is -1. */
11444
8e79c3df 11445static void
91e22acd 11446set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11447{
91e22acd
AS		 11448 obj_attribute *attr =
11449 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11450
91e22acd
AS		 11451 if (arch == -1)
11452 {
11453 attr->s = NULL;
11454 return;
8e79c3df 11455 }
91e22acd
AS		 11456
11457 /* Note: the tag and its argument below are uleb128 values, though
11458 currently-defined values fit in one byte for each. */
11459 if (!attr->s)
21d799b5 11460 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11461 attr->s[0] = Tag_CPU_arch;
11462 attr->s[1] = arch;
11463 attr->s[2] = '\0';
8e79c3df
CM		 11464}
11465
91e22acd
AS		 11466/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11467 into account. */
11468
11469static int
11470tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11471 int newtag, int secondary_compat)
8e79c3df 11472{
91e22acd
AS		 11473#define T(X) TAG_CPU_ARCH_##X
11474 int tagl, tagh, result;
11475 const int v6t2[] =
11476 {
11477 T(V6T2), /* PRE_V4. */
11478 T(V6T2), /* V4. */
11479 T(V6T2), /* V4T. */
11480 T(V6T2), /* V5T. */
11481 T(V6T2), /* V5TE. */
11482 T(V6T2), /* V5TEJ. */
11483 T(V6T2), /* V6. */
11484 T(V7), /* V6KZ. */
11485 T(V6T2) /* V6T2. */
11486 };
11487 const int v6k[] =
11488 {
11489 T(V6K), /* PRE_V4. */
11490 T(V6K), /* V4. */
11491 T(V6K), /* V4T. */
11492 T(V6K), /* V5T. */
11493 T(V6K), /* V5TE. */
11494 T(V6K), /* V5TEJ. */
11495 T(V6K), /* V6. */
11496 T(V6KZ), /* V6KZ. */
11497 T(V7), /* V6T2. */
11498 T(V6K) /* V6K. */
11499 };
11500 const int v7[] =
11501 {
11502 T(V7), /* PRE_V4. */
11503 T(V7), /* V4. */
11504 T(V7), /* V4T. */
11505 T(V7), /* V5T. */
11506 T(V7), /* V5TE. */
11507 T(V7), /* V5TEJ. */
11508 T(V7), /* V6. */
11509 T(V7), /* V6KZ. */
11510 T(V7), /* V6T2. */
11511 T(V7), /* V6K. */
11512 T(V7) /* V7. */
11513 };
11514 const int v6_m[] =
11515 {
11516 -1, /* PRE_V4. */
11517 -1, /* V4. */
11518 T(V6K), /* V4T. */
11519 T(V6K), /* V5T. */
11520 T(V6K), /* V5TE. */
11521 T(V6K), /* V5TEJ. */
11522 T(V6K), /* V6. */
11523 T(V6KZ), /* V6KZ. */
11524 T(V7), /* V6T2. */
11525 T(V6K), /* V6K. */
11526 T(V7), /* V7. */
11527 T(V6_M) /* V6_M. */
11528 };
11529 const int v6s_m[] =
11530 {
11531 -1, /* PRE_V4. */
11532 -1, /* V4. */
11533 T(V6K), /* V4T. */
11534 T(V6K), /* V5T. */
11535 T(V6K), /* V5TE. */
11536 T(V6K), /* V5TEJ. */
11537 T(V6K), /* V6. */
11538 T(V6KZ), /* V6KZ. */
11539 T(V7), /* V6T2. */
11540 T(V6K), /* V6K. */
11541 T(V7), /* V7. */
11542 T(V6S_M), /* V6_M. */
11543 T(V6S_M) /* V6S_M. */
11544 };
9e3c6df6
PB		 11545 const int v7e_m[] =
11546 {
11547 -1, /* PRE_V4. */
11548 -1, /* V4. */
11549 T(V7E_M), /* V4T. */
11550 T(V7E_M), /* V5T. */
11551 T(V7E_M), /* V5TE. */
11552 T(V7E_M), /* V5TEJ. */
11553 T(V7E_M), /* V6. */
11554 T(V7E_M), /* V6KZ. */
11555 T(V7E_M), /* V6T2. */
11556 T(V7E_M), /* V6K. */
11557 T(V7E_M), /* V7. */
11558 T(V7E_M), /* V6_M. */
11559 T(V7E_M), /* V6S_M. */
11560 T(V7E_M) /* V7E_M. */
11561 };
bca38921
MGD		 11562 const int v8[] =
11563 {
11564 T(V8), /* PRE_V4. */
11565 T(V8), /* V4. */
11566 T(V8), /* V4T. */
11567 T(V8), /* V5T. */
11568 T(V8), /* V5TE. */
11569 T(V8), /* V5TEJ. */
11570 T(V8), /* V6. */
11571 T(V8), /* V6KZ. */
11572 T(V8), /* V6T2. */
11573 T(V8), /* V6K. */
11574 T(V8), /* V7. */
11575 T(V8), /* V6_M. */
11576 T(V8), /* V6S_M. */
11577 T(V8), /* V7E_M. */
11578 T(V8) /* V8. */
11579 };
91e22acd
AS		 11580 const int v4t_plus_v6_m[] =
11581 {
11582 -1, /* PRE_V4. */
11583 -1, /* V4. */
11584 T(V4T), /* V4T. */
11585 T(V5T), /* V5T. */
11586 T(V5TE), /* V5TE. */
11587 T(V5TEJ), /* V5TEJ. */
11588 T(V6), /* V6. */
11589 T(V6KZ), /* V6KZ. */
11590 T(V6T2), /* V6T2. */
11591 T(V6K), /* V6K. */
11592 T(V7), /* V7. */
11593 T(V6_M), /* V6_M. */
11594 T(V6S_M), /* V6S_M. */
9e3c6df6 11595 T(V7E_M), /* V7E_M. */
bca38921 11596 T(V8), /* V8. */
91e22acd
AS		 11597 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11598 };
11599 const int *comb[] =
11600 {
11601 v6t2,
11602 v6k,
11603 v7,
11604 v6_m,
11605 v6s_m,
9e3c6df6 11606 v7e_m,
bca38921 11607 v8,
91e22acd
AS		 11608 /* Pseudo-architecture. */
11609 v4t_plus_v6_m
11610 };
11611
11612 /* Check we've not got a higher architecture than we know about. */
11613
9e3c6df6 11614 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11615 {
3895f852 11616 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11617 return -1;
11618 }
11619
11620 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11621
11622 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11623 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11624 oldtag = T(V4T_PLUS_V6_M);
11625
11626 /* And override the new tag if we have a Tag_also_compatible_with on the
11627 input. */
11628
11629 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11630 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11631 newtag = T(V4T_PLUS_V6_M);
11632
11633 tagl = (oldtag < newtag) ? oldtag : newtag;
11634 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11635
11636 /* Architectures before V6KZ add features monotonically. */
11637 if (tagh <= TAG_CPU_ARCH_V6KZ)
11638 return result;
11639
11640 result = comb[tagh - T(V6T2)][tagl];
11641
11642 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11643 as the canonical version. */
11644 if (result == T(V4T_PLUS_V6_M))
11645 {
11646 result = T(V4T);
11647 *secondary_compat_out = T(V6_M);
11648 }
11649 else
11650 *secondary_compat_out = -1;
11651
11652 if (result == -1)
11653 {
3895f852 11654 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11655 ibfd, oldtag, newtag);
11656 return -1;
11657 }
11658
11659 return result;
11660#undef T
8e79c3df
CM		 11661}
11662
ac56ee8f
MGD		 11663/* Query attributes object to see if integer divide instructions may be
11664 present in an object. */
11665static bfd_boolean
11666elf32_arm_attributes_accept_div (const obj_attribute *attr)
11667{
11668 int arch = attr[Tag_CPU_arch].i;
11669 int profile = attr[Tag_CPU_arch_profile].i;
11670
11671 switch (attr[Tag_DIV_use].i)
11672 {
11673 case 0:
11674 /* Integer divide allowed if instruction contained in archetecture. */
11675 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11676 return TRUE;
11677 else if (arch >= TAG_CPU_ARCH_V7E_M)
11678 return TRUE;
11679 else
11680 return FALSE;
11681
11682 case 1:
11683 /* Integer divide explicitly prohibited. */
11684 return FALSE;
11685
11686 default:
11687 /* Unrecognised case - treat as allowing divide everywhere. */
11688 case 2:
11689 /* Integer divide allowed in ARM state. */
11690 return TRUE;
11691 }
11692}
11693
11694/* Query attributes object to see if integer divide instructions are
11695 forbidden to be in the object. This is not the inverse of
11696 elf32_arm_attributes_accept_div. */
11697static bfd_boolean
11698elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11699{
11700 return attr[Tag_DIV_use].i == 1;
11701}
11702
ee065d83
PB		 11703/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11704 are conflicting attributes. */
906e58ca 11705
ee065d83
PB		 11706static bfd_boolean
11707elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11708{
104d59d1
JM		 11709 obj_attribute *in_attr;
11710 obj_attribute *out_attr;
ee065d83
PB		 11711 /* Some tags have 0 = don't care, 1 = strong requirement,
11712 2 = weak requirement. */
91e22acd 11713 static const int order_021[3] = {0, 2, 1};
ee065d83 11714 int i;
91e22acd 11715 bfd_boolean result = TRUE;
9274e9de 11716 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
ee065d83 11717
3e6b1042
DJ		 11718 /* Skip the linker stubs file. This preserves previous behavior
11719 of accepting unknown attributes in the first input file - but
11720 is that a bug? */
11721 if (ibfd->flags & BFD_LINKER_CREATED)
11722 return TRUE;
11723
9274e9de
TG		 11724 /* Skip any input that hasn't attribute section.
11725 This enables to link object files without attribute section with
11726 any others. */
11727 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
11728 return TRUE;
11729
104d59d1 11730 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11731 {
11732 /* This is the first object. Copy the attributes. */
104d59d1 11733 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11734
cd21e546
MGD		 11735 out_attr = elf_known_obj_attributes_proc (obfd);
11736
004ae526
PB		 11737 /* Use the Tag_null value to indicate the attributes have been
11738 initialized. */
cd21e546 11739 out_attr[0].i = 1;
004ae526 11740
cd21e546
MGD		 11741 /* We do not output objects with Tag_MPextension_use_legacy - we move
11742 the attribute's value to Tag_MPextension_use. */
11743 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11744 {
11745 if (out_attr[Tag_MPextension_use].i != 0
11746 && out_attr[Tag_MPextension_use_legacy].i
99059e56 11747 != out_attr[Tag_MPextension_use].i)
cd21e546
MGD		 11748 {
11749 _bfd_error_handler
11750 (_("Error: %B has both the current and legacy "
11751 "Tag_MPextension_use attributes"), ibfd);
11752 result = FALSE;
11753 }
11754
11755 out_attr[Tag_MPextension_use] =
11756 out_attr[Tag_MPextension_use_legacy];
11757 out_attr[Tag_MPextension_use_legacy].type = 0;
11758 out_attr[Tag_MPextension_use_legacy].i = 0;
11759 }
11760
11761 return result;
ee065d83
PB		 11762 }
11763
104d59d1
JM		 11764 in_attr = elf_known_obj_attributes_proc (ibfd);
11765 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11766 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11767 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11768 {
5c294fee
TG		 11769 /* Ignore mismatches if the object doesn't use floating point or is
11770 floating point ABI independent. */
11771 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
11772 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
11773 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
ee065d83 11774 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
5c294fee
TG		 11775 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
11776 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
ee065d83
PB		 11777 {
11778 _bfd_error_handler
3895f852 11779 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11780 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11781 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11782 result = FALSE;
ee065d83
PB		 11783 }
11784 }
11785
3de4a297 11786 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11787 {
11788 /* Merge this attribute with existing attributes. */
11789 switch (i)
11790 {
11791 case Tag_CPU_raw_name:
11792 case Tag_CPU_name:
6a631e86 11793 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11794 break;
11795
11796 case Tag_ABI_optimization_goals:
11797 case Tag_ABI_FP_optimization_goals:
11798 /* Use the first value seen. */
11799 break;
11800
11801 case Tag_CPU_arch:
91e22acd
AS		 11802 {
11803 int secondary_compat = -1, secondary_compat_out = -1;
11804 unsigned int saved_out_attr = out_attr[i].i;
70e99720
TG		 11805 int arch_attr;
11806 static const char *name_table[] =
11807 {
91e22acd
AS		 11808 /* These aren't real CPU names, but we can't guess
11809 that from the architecture version alone. */
11810 "Pre v4",
11811 "ARM v4",
11812 "ARM v4T",
11813 "ARM v5T",
11814 "ARM v5TE",
11815 "ARM v5TEJ",
11816 "ARM v6",
11817 "ARM v6KZ",
11818 "ARM v6T2",
11819 "ARM v6K",
11820 "ARM v7",
11821 "ARM v6-M",
bca38921
MGD		 11822 "ARM v6S-M",
11823 "ARM v8"
91e22acd
AS		 11824 };
11825
11826 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11827 secondary_compat = get_secondary_compatible_arch (ibfd);
11828 secondary_compat_out = get_secondary_compatible_arch (obfd);
70e99720
TG		 11829 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11830 &secondary_compat_out,
11831 in_attr[i].i,
11832 secondary_compat);
11833
11834 /* Return with error if failed to merge. */
11835 if (arch_attr == -1)
11836 return FALSE;
11837
11838 out_attr[i].i = arch_attr;
11839
91e22acd
AS		 11840 set_secondary_compatible_arch (obfd, secondary_compat_out);
11841
11842 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11843 if (out_attr[i].i == saved_out_attr)
11844 ; /* Leave the names alone. */
11845 else if (out_attr[i].i == in_attr[i].i)
11846 {
11847 /* The output architecture has been changed to match the
11848 input architecture. Use the input names. */
11849 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11850 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11851 : NULL;
11852 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11853 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11854 : NULL;
11855 }
11856 else
11857 {
11858 out_attr[Tag_CPU_name].s = NULL;
11859 out_attr[Tag_CPU_raw_name].s = NULL;
11860 }
11861
11862 /* If we still don't have a value for Tag_CPU_name,
11863 make one up now. Tag_CPU_raw_name remains blank. */
11864 if (out_attr[Tag_CPU_name].s == NULL
11865 && out_attr[i].i < ARRAY_SIZE (name_table))
11866 out_attr[Tag_CPU_name].s =
11867 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11868 }
11869 break;
11870
ee065d83
PB		 11871 case Tag_ARM_ISA_use:
11872 case Tag_THUMB_ISA_use:
ee065d83 11873 case Tag_WMMX_arch:
91e22acd
AS		 11874 case Tag_Advanced_SIMD_arch:
11875 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11876 case Tag_ABI_FP_rounding:
ee065d83
PB		 11877 case Tag_ABI_FP_exceptions:
11878 case Tag_ABI_FP_user_exceptions:
11879 case Tag_ABI_FP_number_model:
75375b3e 11880 case Tag_FP_HP_extension:
91e22acd
AS		 11881 case Tag_CPU_unaligned_access:
11882 case Tag_T2EE_use:
91e22acd 11883 case Tag_MPextension_use:
ee065d83
PB		 11884 /* Use the largest value specified. */
11885 if (in_attr[i].i > out_attr[i].i)
11886 out_attr[i].i = in_attr[i].i;
11887 break;
11888
75375b3e 11889 case Tag_ABI_align_preserved:
91e22acd
AS		 11890 case Tag_ABI_PCS_RO_data:
11891 /* Use the smallest value specified. */
11892 if (in_attr[i].i < out_attr[i].i)
11893 out_attr[i].i = in_attr[i].i;
11894 break;
11895
75375b3e 11896 case Tag_ABI_align_needed:
91e22acd 11897 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11898 && (in_attr[Tag_ABI_align_preserved].i == 0
11899 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11900 {
91e22acd
AS		 11901 /* This error message should be enabled once all non-conformant
11902 binaries in the toolchain have had the attributes set
11903 properly.
ee065d83 11904 _bfd_error_handler
3895f852 11905 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11906 obfd, ibfd);
11907 result = FALSE; */
ee065d83 11908 }
91e22acd
AS		 11909 /* Fall through. */
11910 case Tag_ABI_FP_denormal:
11911 case Tag_ABI_PCS_GOT_use:
11912 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11913 value if greater than 2 (for future-proofing). */
11914 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11915 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11916 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11917 out_attr[i].i = in_attr[i].i;
11918 break;
91e22acd 11919
75375b3e
MGD		 11920 case Tag_Virtualization_use:
11921 /* The virtualization tag effectively stores two bits of
11922 information: the intended use of TrustZone (in bit 0), and the
11923 intended use of Virtualization (in bit 1). */
11924 if (out_attr[i].i == 0)
11925 out_attr[i].i = in_attr[i].i;
11926 else if (in_attr[i].i != 0
11927 && in_attr[i].i != out_attr[i].i)
11928 {
11929 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11930 out_attr[i].i = 3;
11931 else
11932 {
11933 _bfd_error_handler
11934 (_("error: %B: unable to merge virtualization attributes "
11935 "with %B"),
11936 obfd, ibfd);
11937 result = FALSE;
11938 }
11939 }
11940 break;
91e22acd
AS		 11941
11942 case Tag_CPU_arch_profile:
11943 if (out_attr[i].i != in_attr[i].i)
11944 {
11945 /* 0 will merge with anything.
11946 'A' and 'S' merge to 'A'.
11947 'R' and 'S' merge to 'R'.
99059e56 11948 'M' and 'A|R|S' is an error. */
91e22acd
AS		 11949 if (out_attr[i].i == 0
11950 || (out_attr[i].i == 'S'
11951 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11952 out_attr[i].i = in_attr[i].i;
11953 else if (in_attr[i].i == 0
11954 || (in_attr[i].i == 'S'
11955 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
6a631e86 11956 ; /* Do nothing. */
91e22acd
AS		 11957 else
11958 {
11959 _bfd_error_handler
3895f852 11960 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11961 ibfd,
11962 in_attr[i].i ? in_attr[i].i : '0',
11963 out_attr[i].i ? out_attr[i].i : '0');
11964 result = FALSE;
11965 }
11966 }
11967 break;
75375b3e 11968 case Tag_FP_arch:
62f3b8c8 11969 {
4547cb56
NC		 11970 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11971 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11972 when it's 0. It might mean absence of FP hardware if
99654aaf 11973 Tag_FP_arch is zero. */
4547cb56 11974
a715796b 11975#define VFP_VERSION_COUNT 9
62f3b8c8
PB		 11976 static const struct
11977 {
11978 int ver;
11979 int regs;
bca38921 11980 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11981 {
11982 {0, 0},
11983 {1, 16},
11984 {2, 16},
11985 {3, 32},
11986 {3, 16},
11987 {4, 32},
bca38921 11988 {4, 16},
a715796b
TG		 11989 {8, 32},
11990 {8, 16}
62f3b8c8
PB		 11991 };
11992 int ver;
11993 int regs;
11994 int newval;
11995
4547cb56
NC		 11996 /* If the output has no requirement about FP hardware,
11997 follow the requirement of the input. */
11998 if (out_attr[i].i == 0)
11999 {
12000 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
12001 out_attr[i].i = in_attr[i].i;
12002 out_attr[Tag_ABI_HardFP_use].i
12003 = in_attr[Tag_ABI_HardFP_use].i;
12004 break;
12005 }
12006 /* If the input has no requirement about FP hardware, do
12007 nothing. */
12008 else if (in_attr[i].i == 0)
12009 {
12010 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
12011 break;
12012 }
12013
12014 /* Both the input and the output have nonzero Tag_FP_arch.
99654aaf 12015 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
4547cb56
NC		 12016
12017 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12018 do nothing. */
12019 if (in_attr[Tag_ABI_HardFP_use].i == 0
12020 && out_attr[Tag_ABI_HardFP_use].i == 0)
12021 ;
12022 /* If the input and the output have different Tag_ABI_HardFP_use,
99654aaf 12023 the combination of them is 0 (implied by Tag_FP_arch). */
4547cb56
NC		 12024 else if (in_attr[Tag_ABI_HardFP_use].i
12025 != out_attr[Tag_ABI_HardFP_use].i)
99654aaf 12026 out_attr[Tag_ABI_HardFP_use].i = 0;
4547cb56
NC		 12027
12028 /* Now we can handle Tag_FP_arch. */
12029
bca38921
MGD		 12030 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12031 pick the biggest. */
12032 if (in_attr[i].i >= VFP_VERSION_COUNT
12033 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 12034 {
12035 out_attr[i] = in_attr[i];
12036 break;
12037 }
12038 /* The output uses the superset of input features
12039 (ISA version) and registers. */
12040 ver = vfp_versions[in_attr[i].i].ver;
12041 if (ver < vfp_versions[out_attr[i].i].ver)
12042 ver = vfp_versions[out_attr[i].i].ver;
12043 regs = vfp_versions[in_attr[i].i].regs;
12044 if (regs < vfp_versions[out_attr[i].i].regs)
12045 regs = vfp_versions[out_attr[i].i].regs;
12046 /* This assumes all possible supersets are also a valid
99059e56 12047 options. */
bca38921 12048 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 12049 {
12050 if (regs == vfp_versions[newval].regs
12051 && ver == vfp_versions[newval].ver)
12052 break;
12053 }
12054 out_attr[i].i = newval;
12055 }
b1cc4aeb 12056 break;
ee065d83
PB		 12057 case Tag_PCS_config:
12058 if (out_attr[i].i == 0)
12059 out_attr[i].i = in_attr[i].i;
b6009aca 12060 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 12061 {
12062 /* It's sometimes ok to mix different configs, so this is only
99059e56 12063 a warning. */
ee065d83
PB		 12064 _bfd_error_handler
12065 (_("Warning: %B: Conflicting platform configuration"), ibfd);
12066 }
12067 break;
12068 case Tag_ABI_PCS_R9_use:
004ae526
PB		 12069 if (in_attr[i].i != out_attr[i].i
12070 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 12071 && in_attr[i].i != AEABI_R9_unused)
12072 {
12073 _bfd_error_handler
3895f852 12074 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 12075 result = FALSE;
ee065d83
PB		 12076 }
12077 if (out_attr[i].i == AEABI_R9_unused)
12078 out_attr[i].i = in_attr[i].i;
12079 break;
12080 case Tag_ABI_PCS_RW_data:
12081 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12082 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12083 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12084 {
12085 _bfd_error_handler
3895f852 12086 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 12087 ibfd);
91e22acd 12088 result = FALSE;
ee065d83
PB		 12089 }
12090 /* Use the smallest value specified. */
12091 if (in_attr[i].i < out_attr[i].i)
12092 out_attr[i].i = in_attr[i].i;
12093 break;
ee065d83 12094 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 12095 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12096 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 12097 {
12098 _bfd_error_handler
a9dc9481
JM		 12099 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12100 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 12101 }
a9dc9481 12102 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 12103 out_attr[i].i = in_attr[i].i;
12104 break;
ee065d83
PB		 12105 case Tag_ABI_enum_size:
12106 if (in_attr[i].i != AEABI_enum_unused)
12107 {
12108 if (out_attr[i].i == AEABI_enum_unused
12109 || out_attr[i].i == AEABI_enum_forced_wide)
12110 {
12111 /* The existing object is compatible with anything.
12112 Use whatever requirements the new object has. */
12113 out_attr[i].i = in_attr[i].i;
12114 }
12115 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 12116 && out_attr[i].i != in_attr[i].i
0ffa91dd 12117 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 12118 {
91e22acd 12119 static const char *aeabi_enum_names[] =
bf21ed78 12120 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 12121 const char *in_name =
12122 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12123 ? aeabi_enum_names[in_attr[i].i]
12124 : "<unknown>";
12125 const char *out_name =
12126 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12127 ? aeabi_enum_names[out_attr[i].i]
12128 : "<unknown>";
ee065d83 12129 _bfd_error_handler
bf21ed78 12130 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 12131 ibfd, in_name, out_name);
ee065d83
PB		 12132 }
12133 }
12134 break;
12135 case Tag_ABI_VFP_args:
12136 /* Aready done. */
12137 break;
12138 case Tag_ABI_WMMX_args:
12139 if (in_attr[i].i != out_attr[i].i)
12140 {
12141 _bfd_error_handler
3895f852 12142 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 12143 ibfd, obfd);
91e22acd 12144 result = FALSE;
ee065d83
PB		 12145 }
12146 break;
7b86a9fa
AS		 12147 case Tag_compatibility:
12148 /* Merged in target-independent code. */
12149 break;
91e22acd 12150 case Tag_ABI_HardFP_use:
4547cb56 12151 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 12152 break;
12153 case Tag_ABI_FP_16bit_format:
12154 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12155 {
12156 if (in_attr[i].i != out_attr[i].i)
12157 {
12158 _bfd_error_handler
3895f852 12159 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 12160 ibfd, obfd);
12161 result = FALSE;
12162 }
12163 }
12164 if (in_attr[i].i != 0)
12165 out_attr[i].i = in_attr[i].i;
12166 break;
7b86a9fa 12167
cd21e546 12168 case Tag_DIV_use:
ac56ee8f
MGD		 12169 /* A value of zero on input means that the divide instruction may
12170 be used if available in the base architecture as specified via
12171 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12172 the user did not want divide instructions. A value of 2
12173 explicitly means that divide instructions were allowed in ARM
12174 and Thumb state. */
12175 if (in_attr[i].i == out_attr[i].i)
12176 /* Do nothing. */ ;
12177 else if (elf32_arm_attributes_forbid_div (in_attr)
12178 && !elf32_arm_attributes_accept_div (out_attr))
12179 out_attr[i].i = 1;
12180 else if (elf32_arm_attributes_forbid_div (out_attr)
12181 && elf32_arm_attributes_accept_div (in_attr))
12182 out_attr[i].i = in_attr[i].i;
12183 else if (in_attr[i].i == 2)
12184 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 12185 break;
12186
12187 case Tag_MPextension_use_legacy:
12188 /* We don't output objects with Tag_MPextension_use_legacy - we
12189 move the value to Tag_MPextension_use. */
12190 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12191 {
12192 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12193 {
12194 _bfd_error_handler
12195 (_("%B has has both the current and legacy "
b38cadfb 12196 "Tag_MPextension_use attributes"),
cd21e546
MGD		 12197 ibfd);
12198 result = FALSE;
12199 }
12200 }
12201
12202 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12203 out_attr[Tag_MPextension_use] = in_attr[i];
12204
12205 break;
12206
91e22acd 12207 case Tag_nodefaults:
2d0bb761
AS		 12208 /* This tag is set if it exists, but the value is unused (and is
12209 typically zero). We don't actually need to do anything here -
12210 the merge happens automatically when the type flags are merged
12211 below. */
91e22acd
AS		 12212 break;
12213 case Tag_also_compatible_with:
12214 /* Already done in Tag_CPU_arch. */
12215 break;
12216 case Tag_conformance:
12217 /* Keep the attribute if it matches. Throw it away otherwise.
12218 No attribute means no claim to conform. */
12219 if (!in_attr[i].s || !out_attr[i].s
12220 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12221 out_attr[i].s = NULL;
12222 break;
3cfad14c 12223
91e22acd 12224 default:
e8b36cd1
JM		 12225 result
12226 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 12227 }
12228
12229 /* If out_attr was copied from in_attr then it won't have a type yet. */
12230 if (in_attr[i].type && !out_attr[i].type)
12231 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 12232 }
12233
104d59d1 12234 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 12235 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12236 return FALSE;
ee065d83 12237
104d59d1 12238 /* Check for any attributes not known on ARM. */
e8b36cd1 12239 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 12240
91e22acd 12241 return result;
252b5132
RH		 12242}
12243
3a4a14e9
PB		 12244
12245/* Return TRUE if the two EABI versions are incompatible. */
12246
12247static bfd_boolean
12248elf32_arm_versions_compatible (unsigned iver, unsigned over)
12249{
12250 /* v4 and v5 are the same spec before and after it was released,
12251 so allow mixing them. */
12252 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12253 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12254 return TRUE;
12255
12256 return (iver == over);
12257}
12258
252b5132
RH		 12259/* Merge backend specific data from an object file to the output
12260 object file when linking. */
9b485d32 12261
b34976b6 12262static bfd_boolean
21d799b5 12263elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 12264
9b485d32
NC		 12265/* Display the flags field. */
12266
b34976b6 12267static bfd_boolean
57e8b36a 12268elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12269{
fc830a83
NC		 12270 FILE * file = (FILE *) ptr;
12271 unsigned long flags;
252b5132
RH		 12272
12273 BFD_ASSERT (abfd != NULL && ptr != NULL);
12274
12275 /* Print normal ELF private data. */
12276 _bfd_elf_print_private_bfd_data (abfd, ptr);
12277
fc830a83 12278 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12279 /* Ignore init flag - it may not be set, despite the flags field
12280 containing valid data. */
252b5132
RH		 12281
12282 /* xgettext:c-format */
9b485d32 12283 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12284
fc830a83
NC		 12285 switch (EF_ARM_EABI_VERSION (flags))
12286 {
12287 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12288 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12289 official ARM ELF extended ABI. Hence they are only decoded if
12290 the EABI version is not set. */
fd2ec330 12291 if (flags & EF_ARM_INTERWORK)
9b485d32 12292 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12293
fd2ec330 12294 if (flags & EF_ARM_APCS_26)
6c571f00 12295 fprintf (file, " [APCS-26]");
fc830a83 12296 else
6c571f00 12297 fprintf (file, " [APCS-32]");
9a5aca8c 12298
96a846ea
RE		 12299 if (flags & EF_ARM_VFP_FLOAT)
12300 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12301 else if (flags & EF_ARM_MAVERICK_FLOAT)
12302 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12303 else
12304 fprintf (file, _(" [FPA float format]"));
12305
fd2ec330 12306 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12307 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12308
fd2ec330 12309 if (flags & EF_ARM_PIC)
9b485d32 12310 fprintf (file, _(" [position independent]"));
fc830a83 12311
fd2ec330 12312 if (flags & EF_ARM_NEW_ABI)
9b485d32 12313 fprintf (file, _(" [new ABI]"));
9a5aca8c 12314
fd2ec330 12315 if (flags & EF_ARM_OLD_ABI)
9b485d32 12316 fprintf (file, _(" [old ABI]"));
9a5aca8c 12317
fd2ec330 12318 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12319 fprintf (file, _(" [software FP]"));
9a5aca8c 12320
96a846ea
RE		 12321 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12322 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12323 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12324 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12325 break;
9a5aca8c 12326
fc830a83 12327 case EF_ARM_EABI_VER1:
9b485d32 12328 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12329
fc830a83 12330 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12331 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12332 else
9b485d32 12333 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12334
fc830a83
NC		 12335 flags &= ~ EF_ARM_SYMSARESORTED;
12336 break;
9a5aca8c 12337
fd2ec330
PB		 12338 case EF_ARM_EABI_VER2:
12339 fprintf (file, _(" [Version2 EABI]"));
12340
12341 if (flags & EF_ARM_SYMSARESORTED)
12342 fprintf (file, _(" [sorted symbol table]"));
12343 else
12344 fprintf (file, _(" [unsorted symbol table]"));
12345
12346 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12347 fprintf (file, _(" [dynamic symbols use segment index]"));
12348
12349 if (flags & EF_ARM_MAPSYMSFIRST)
12350 fprintf (file, _(" [mapping symbols precede others]"));
12351
99e4ae17 12352 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12353 | EF_ARM_MAPSYMSFIRST);
12354 break;
12355
d507cf36
PB		 12356 case EF_ARM_EABI_VER3:
12357 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12358 break;
12359
12360 case EF_ARM_EABI_VER4:
12361 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12362 goto eabi;
d507cf36 12363
3a4a14e9
PB		 12364 case EF_ARM_EABI_VER5:
12365 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12366
12367 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12368 fprintf (file, _(" [soft-float ABI]"));
12369
12370 if (flags & EF_ARM_ABI_FLOAT_HARD)
12371 fprintf (file, _(" [hard-float ABI]"));
12372
12373 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12374
3a4a14e9 12375 eabi:
d507cf36
PB		 12376 if (flags & EF_ARM_BE8)
12377 fprintf (file, _(" [BE8]"));
12378
12379 if (flags & EF_ARM_LE8)
12380 fprintf (file, _(" [LE8]"));
12381
12382 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12383 break;
12384
fc830a83 12385 default:
9b485d32 12386 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12387 break;
12388 }
252b5132 12389
fc830a83 12390 flags &= ~ EF_ARM_EABIMASK;
252b5132 12391
fc830a83 12392 if (flags & EF_ARM_RELEXEC)
9b485d32 12393 fprintf (file, _(" [relocatable executable]"));
252b5132 12394
a5721edd 12395 flags &= ~EF_ARM_RELEXEC;
fc830a83
NC		 12396
12397 if (flags)
9b485d32 12398 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12399
252b5132
RH		 12400 fputc ('\n', file);
12401
b34976b6 12402 return TRUE;
252b5132
RH		 12403}
12404
12405static int
57e8b36a 12406elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12407{
2f0ca46a
NC		 12408 switch (ELF_ST_TYPE (elf_sym->st_info))
12409 {
12410 case STT_ARM_TFUNC:
12411 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12412
2f0ca46a
NC		 12413 case STT_ARM_16BIT:
12414 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12415 This allows us to distinguish between data used by Thumb instructions
12416 and non-data (which is probably code) inside Thumb regions of an
12417 executable. */
1a0eb693 12418 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12419 return ELF_ST_TYPE (elf_sym->st_info);
12420 break;
9a5aca8c 12421
ce855c42
NC		 12422 default:
12423 break;
2f0ca46a
NC		 12424 }
12425
12426 return type;
252b5132 12427}
f21f3fe0 12428
252b5132 12429static asection *
07adf181
AM		 12430elf32_arm_gc_mark_hook (asection *sec,
12431 struct bfd_link_info *info,
12432 Elf_Internal_Rela *rel,
12433 struct elf_link_hash_entry *h,
12434 Elf_Internal_Sym *sym)
252b5132
RH		 12435{
12436 if (h != NULL)
07adf181 12437 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12438 {
12439 case R_ARM_GNU_VTINHERIT:
12440 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12441 return NULL;
12442 }
9ad5cbcf 12443
07adf181 12444 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12445}
12446
780a67af
NC		 12447/* Update the got entry reference counts for the section being removed. */
12448
b34976b6 12449static bfd_boolean
ba93b8ac
DJ		 12450elf32_arm_gc_sweep_hook (bfd * abfd,
12451 struct bfd_link_info * info,
12452 asection * sec,
12453 const Elf_Internal_Rela * relocs)
252b5132 12454{
5e681ec4
PB		 12455 Elf_Internal_Shdr *symtab_hdr;
12456 struct elf_link_hash_entry **sym_hashes;
12457 bfd_signed_vma *local_got_refcounts;
12458 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12459 struct elf32_arm_link_hash_table * globals;
12460
0e1862bb 12461 if (bfd_link_relocatable (info))
7dda2462
TG		 12462 return TRUE;
12463
eb043451 12464 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12465 if (globals == NULL)
12466 return FALSE;
5e681ec4
PB		 12467
12468 elf_section_data (sec)->local_dynrel = NULL;
12469
0ffa91dd 12470 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12471 sym_hashes = elf_sym_hashes (abfd);
12472 local_got_refcounts = elf_local_got_refcounts (abfd);
12473
906e58ca 12474 check_use_blx (globals);
bd97cb95 12475
5e681ec4
PB		 12476 relend = relocs + sec->reloc_count;
12477 for (rel = relocs; rel < relend; rel++)
eb043451 12478 {
3eb128b2
AM		 12479 unsigned long r_symndx;
12480 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12481 struct elf32_arm_link_hash_entry *eh;
eb043451 12482 int r_type;
34e77a92 12483 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12484 bfd_boolean may_become_dynamic_p;
12485 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12486 union gotplt_union *root_plt;
12487 struct arm_plt_info *arm_plt;
5e681ec4 12488
3eb128b2
AM		 12489 r_symndx = ELF32_R_SYM (rel->r_info);
12490 if (r_symndx >= symtab_hdr->sh_info)
12491 {
12492 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12493 while (h->root.type == bfd_link_hash_indirect
12494 || h->root.type == bfd_link_hash_warning)
12495 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12496 }
f6e32f6d
RS		 12497 eh = (struct elf32_arm_link_hash_entry *) h;
12498
34e77a92 12499 call_reloc_p = FALSE;
f6e32f6d
RS		 12500 may_become_dynamic_p = FALSE;
12501 may_need_local_target_p = FALSE;
3eb128b2 12502
eb043451 12503 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12504 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12505 switch (r_type)
12506 {
12507 case R_ARM_GOT32:
eb043451 12508 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12509 case R_ARM_TLS_GD32:
12510 case R_ARM_TLS_IE32:
3eb128b2 12511 if (h != NULL)
eb043451 12512 {
eb043451
PB		 12513 if (h->got.refcount > 0)
12514 h->got.refcount -= 1;
12515 }
12516 else if (local_got_refcounts != NULL)
12517 {
12518 if (local_got_refcounts[r_symndx] > 0)
12519 local_got_refcounts[r_symndx] -= 1;
12520 }
12521 break;
12522
ba93b8ac 12523 case R_ARM_TLS_LDM32:
4dfe6ac6 12524 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12525 break;
12526
eb043451
PB		 12527 case R_ARM_PC24:
12528 case R_ARM_PLT32:
5b5bb741
PB		 12529 case R_ARM_CALL:
12530 case R_ARM_JUMP24:
eb043451 12531 case R_ARM_PREL31:
c19d1205 12532 case R_ARM_THM_CALL:
bd97cb95
DJ		 12533 case R_ARM_THM_JUMP24:
12534 case R_ARM_THM_JUMP19:
34e77a92 12535 call_reloc_p = TRUE;
f6e32f6d
RS		 12536 may_need_local_target_p = TRUE;
12537 break;
12538
12539 case R_ARM_ABS12:
12540 if (!globals->vxworks_p)
12541 {
12542 may_need_local_target_p = TRUE;
12543 break;
12544 }
12545 /* Fall through. */
12546 case R_ARM_ABS32:
12547 case R_ARM_ABS32_NOI:
12548 case R_ARM_REL32:
12549 case R_ARM_REL32_NOI:
b6895b4f
PB		 12550 case R_ARM_MOVW_ABS_NC:
12551 case R_ARM_MOVT_ABS:
12552 case R_ARM_MOVW_PREL_NC:
12553 case R_ARM_MOVT_PREL:
12554 case R_ARM_THM_MOVW_ABS_NC:
12555 case R_ARM_THM_MOVT_ABS:
12556 case R_ARM_THM_MOVW_PREL_NC:
12557 case R_ARM_THM_MOVT_PREL:
b7693d02 12558 /* Should the interworking branches be here also? */
0e1862bb 12559 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
34e77a92
RS		 12560 && (sec->flags & SEC_ALLOC) != 0)
12561 {
12562 if (h == NULL
469a3493 12563 && elf32_arm_howto_from_type (r_type)->pc_relative)
34e77a92
RS		 12564 {
12565 call_reloc_p = TRUE;
12566 may_need_local_target_p = TRUE;
12567 }
12568 else
12569 may_become_dynamic_p = TRUE;
12570 }
f6e32f6d
RS		 12571 else
12572 may_need_local_target_p = TRUE;
12573 break;
b7693d02 12574
f6e32f6d
RS		 12575 default:
12576 break;
12577 }
5e681ec4 12578
34e77a92
RS		 12579 if (may_need_local_target_p
12580 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12581 {
27586251
HPN		 12582 /* If PLT refcount book-keeping is wrong and too low, we'll
12583 see a zero value (going to -1) for the root PLT reference
12584 count. */
12585 if (root_plt->refcount >= 0)
12586 {
12587 BFD_ASSERT (root_plt->refcount != 0);
12588 root_plt->refcount -= 1;
12589 }
12590 else
12591 /* A value of -1 means the symbol has become local, forced
12592 or seeing a hidden definition. Any other negative value
12593 is an error. */
12594 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12595
12596 if (!call_reloc_p)
12597 arm_plt->noncall_refcount--;
5e681ec4 12598
f6e32f6d 12599 if (r_type == R_ARM_THM_CALL)
34e77a92 12600 arm_plt->maybe_thumb_refcount--;
bd97cb95 12601
f6e32f6d
RS		 12602 if (r_type == R_ARM_THM_JUMP24
12603 || r_type == R_ARM_THM_JUMP19)
34e77a92 12604 arm_plt->thumb_refcount--;
f6e32f6d 12605 }
5e681ec4 12606
34e77a92 12607 if (may_become_dynamic_p)
f6e32f6d
RS		 12608 {
12609 struct elf_dyn_relocs **pp;
12610 struct elf_dyn_relocs *p;
5e681ec4 12611
34e77a92 12612 if (h != NULL)
9c489990 12613 pp = &(eh->dyn_relocs);
34e77a92
RS		 12614 else
12615 {
12616 Elf_Internal_Sym *isym;
12617
12618 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12619 abfd, r_symndx);
12620 if (isym == NULL)
12621 return FALSE;
12622 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12623 if (pp == NULL)
12624 return FALSE;
12625 }
9c489990 12626 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12627 if (p->sec == sec)
12628 {
12629 /* Everything must go for SEC. */
12630 *pp = p->next;
12631 break;
12632 }
eb043451
PB		 12633 }
12634 }
5e681ec4 12635
b34976b6 12636 return TRUE;
252b5132
RH		 12637}
12638
780a67af
NC		 12639/* Look through the relocs for a section during the first phase. */
12640
b34976b6 12641static bfd_boolean
57e8b36a
NC		 12642elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12643 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12644{
b34976b6
AM		 12645 Elf_Internal_Shdr *symtab_hdr;
12646 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12647 const Elf_Internal_Rela *rel;
12648 const Elf_Internal_Rela *rel_end;
12649 bfd *dynobj;
5e681ec4 12650 asection *sreloc;
5e681ec4 12651 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12652 bfd_boolean call_reloc_p;
12653 bfd_boolean may_become_dynamic_p;
12654 bfd_boolean may_need_local_target_p;
ce98a316 12655 unsigned long nsyms;
9a5aca8c 12656
0e1862bb 12657 if (bfd_link_relocatable (info))
b34976b6 12658 return TRUE;
9a5aca8c 12659
0ffa91dd
NC		 12660 BFD_ASSERT (is_arm_elf (abfd));
12661
5e681ec4 12662 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12663 if (htab == NULL)
12664 return FALSE;
12665
5e681ec4 12666 sreloc = NULL;
9a5aca8c 12667
67687978
PB		 12668 /* Create dynamic sections for relocatable executables so that we can
12669 copy relocations. */
12670 if (htab->root.is_relocatable_executable
12671 && ! htab->root.dynamic_sections_created)
12672 {
12673 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12674 return FALSE;
12675 }
12676
cbc704f3
RS		 12677 if (htab->root.dynobj == NULL)
12678 htab->root.dynobj = abfd;
34e77a92
RS		 12679 if (!create_ifunc_sections (info))
12680 return FALSE;
cbc704f3
RS		 12681
12682 dynobj = htab->root.dynobj;
12683
0ffa91dd 12684 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12685 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12686 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12687
252b5132
RH		 12688 rel_end = relocs + sec->reloc_count;
12689 for (rel = relocs; rel < rel_end; rel++)
12690 {
34e77a92 12691 Elf_Internal_Sym *isym;
252b5132 12692 struct elf_link_hash_entry *h;
b7693d02 12693 struct elf32_arm_link_hash_entry *eh;
252b5132 12694 unsigned long r_symndx;
eb043451 12695 int r_type;
9a5aca8c 12696
252b5132 12697 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12698 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12699 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12700
ce98a316
NC		 12701 if (r_symndx >= nsyms
12702 /* PR 9934: It is possible to have relocations that do not
12703 refer to symbols, thus it is also possible to have an
12704 object file containing relocations but no symbol table. */
cf35638d 12705 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12706 {
12707 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12708 r_symndx);
ba93b8ac
DJ		 12709 return FALSE;
12710 }
12711
34e77a92
RS		 12712 h = NULL;
12713 isym = NULL;
12714 if (nsyms > 0)
973a3492 12715 {
34e77a92
RS		 12716 if (r_symndx < symtab_hdr->sh_info)
12717 {
12718 /* A local symbol. */
12719 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12720 abfd, r_symndx);
12721 if (isym == NULL)
12722 return FALSE;
12723 }
12724 else
12725 {
12726 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12727 while (h->root.type == bfd_link_hash_indirect
12728 || h->root.type == bfd_link_hash_warning)
12729 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 12730
12731 /* PR15323, ref flags aren't set for references in the
12732 same object. */
12733 h->root.non_ir_ref = 1;
34e77a92 12734 }
973a3492 12735 }
9a5aca8c 12736
b7693d02
DJ		 12737 eh = (struct elf32_arm_link_hash_entry *) h;
12738
f6e32f6d
RS		 12739 call_reloc_p = FALSE;
12740 may_become_dynamic_p = FALSE;
12741 may_need_local_target_p = FALSE;
12742
0855e32b
NS		 12743 /* Could be done earlier, if h were already available. */
12744 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12745 switch (r_type)
99059e56 12746 {
5e681ec4 12747 case R_ARM_GOT32:
eb043451 12748 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12749 case R_ARM_TLS_GD32:
12750 case R_ARM_TLS_IE32:
0855e32b
NS		 12751 case R_ARM_TLS_GOTDESC:
12752 case R_ARM_TLS_DESCSEQ:
12753 case R_ARM_THM_TLS_DESCSEQ:
12754 case R_ARM_TLS_CALL:
12755 case R_ARM_THM_TLS_CALL:
5e681ec4 12756 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12757 {
12758 int tls_type, old_tls_type;
5e681ec4 12759
ba93b8ac
DJ		 12760 switch (r_type)
12761 {
12762 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12763
ba93b8ac 12764 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12765
0855e32b
NS		 12766 case R_ARM_TLS_GOTDESC:
12767 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12768 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12769 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12770
ba93b8ac
DJ		 12771 default: tls_type = GOT_NORMAL; break;
12772 }
252b5132 12773
0e1862bb 12774 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
eea6dad2
KM		 12775 info->flags |= DF_STATIC_TLS;
12776
ba93b8ac
DJ		 12777 if (h != NULL)
12778 {
12779 h->got.refcount++;
12780 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12781 }
12782 else
12783 {
ba93b8ac 12784 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12785 if (!elf32_arm_allocate_local_sym_info (abfd))
12786 return FALSE;
12787 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12788 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12789 }
12790
0855e32b 12791 /* If a variable is accessed with both tls methods, two
99059e56 12792 slots may be created. */
0855e32b
NS		 12793 if (GOT_TLS_GD_ANY_P (old_tls_type)
12794 && GOT_TLS_GD_ANY_P (tls_type))
12795 tls_type |= old_tls_type;
12796
12797 /* We will already have issued an error message if there
12798 is a TLS/non-TLS mismatch, based on the symbol
12799 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12800 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12801 && tls_type != GOT_NORMAL)
12802 tls_type |= old_tls_type;
12803
0855e32b 12804 /* If the symbol is accessed in both IE and GDESC
99059e56
RM		 12805 method, we're able to relax. Turn off the GDESC flag,
12806 without messing up with any other kind of tls types
6a631e86 12807 that may be involved. */
0855e32b
NS		 12808 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12809 tls_type &= ~GOT_TLS_GDESC;
12810
ba93b8ac
DJ		 12811 if (old_tls_type != tls_type)
12812 {
12813 if (h != NULL)
12814 elf32_arm_hash_entry (h)->tls_type = tls_type;
12815 else
12816 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12817 }
12818 }
8029a119 12819 /* Fall through. */
ba93b8ac
DJ		 12820
12821 case R_ARM_TLS_LDM32:
12822 if (r_type == R_ARM_TLS_LDM32)
12823 htab->tls_ldm_got.refcount++;
8029a119 12824 /* Fall through. */
252b5132 12825
c19d1205 12826 case R_ARM_GOTOFF32:
5e681ec4 12827 case R_ARM_GOTPC:
cbc704f3
RS		 12828 if (htab->root.sgot == NULL
12829 && !create_got_section (htab->root.dynobj, info))
12830 return FALSE;
252b5132
RH		 12831 break;
12832
252b5132 12833 case R_ARM_PC24:
7359ea65 12834 case R_ARM_PLT32:
5b5bb741
PB		 12835 case R_ARM_CALL:
12836 case R_ARM_JUMP24:
eb043451 12837 case R_ARM_PREL31:
c19d1205 12838 case R_ARM_THM_CALL:
bd97cb95
DJ		 12839 case R_ARM_THM_JUMP24:
12840 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12841 call_reloc_p = TRUE;
12842 may_need_local_target_p = TRUE;
12843 break;
12844
12845 case R_ARM_ABS12:
12846 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12847 ldr __GOTT_INDEX__ offsets. */
12848 if (!htab->vxworks_p)
12849 {
12850 may_need_local_target_p = TRUE;
12851 break;
12852 }
12853 /* Fall through. */
39623e12 12854
96c23d59
JM		 12855 case R_ARM_MOVW_ABS_NC:
12856 case R_ARM_MOVT_ABS:
12857 case R_ARM_THM_MOVW_ABS_NC:
12858 case R_ARM_THM_MOVT_ABS:
0e1862bb 12859 if (bfd_link_pic (info))
96c23d59
JM		 12860 {
12861 (*_bfd_error_handler)
12862 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12863 abfd, elf32_arm_howto_table_1[r_type].name,
12864 (h) ? h->root.root.string : "a local symbol");
12865 bfd_set_error (bfd_error_bad_value);
12866 return FALSE;
12867 }
12868
12869 /* Fall through. */
39623e12
PB		 12870 case R_ARM_ABS32:
12871 case R_ARM_ABS32_NOI:
0e1862bb 12872 if (h != NULL && bfd_link_executable (info))
97323ad1
WN		 12873 {
12874 h->pointer_equality_needed = 1;
12875 }
12876 /* Fall through. */
39623e12
PB		 12877 case R_ARM_REL32:
12878 case R_ARM_REL32_NOI:
b6895b4f
PB		 12879 case R_ARM_MOVW_PREL_NC:
12880 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12881 case R_ARM_THM_MOVW_PREL_NC:
12882 case R_ARM_THM_MOVT_PREL:
39623e12 12883
b7693d02 12884 /* Should the interworking branches be listed here? */
0e1862bb 12885 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
34e77a92
RS		 12886 && (sec->flags & SEC_ALLOC) != 0)
12887 {
12888 if (h == NULL
469a3493 12889 && elf32_arm_howto_from_type (r_type)->pc_relative)
34e77a92
RS		 12890 {
12891 /* In shared libraries and relocatable executables,
12892 we treat local relative references as calls;
12893 see the related SYMBOL_CALLS_LOCAL code in
12894 allocate_dynrelocs. */
12895 call_reloc_p = TRUE;
12896 may_need_local_target_p = TRUE;
12897 }
12898 else
12899 /* We are creating a shared library or relocatable
12900 executable, and this is a reloc against a global symbol,
12901 or a non-PC-relative reloc against a local symbol.
12902 We may need to copy the reloc into the output. */
12903 may_become_dynamic_p = TRUE;
12904 }
f6e32f6d
RS		 12905 else
12906 may_need_local_target_p = TRUE;
252b5132
RH		 12907 break;
12908
99059e56
RM		 12909 /* This relocation describes the C++ object vtable hierarchy.
12910 Reconstruct it for later use during GC. */
12911 case R_ARM_GNU_VTINHERIT:
12912 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12913 return FALSE;
12914 break;
12915
12916 /* This relocation describes which C++ vtable entries are actually
12917 used. Record for later use during GC. */
12918 case R_ARM_GNU_VTENTRY:
12919 BFD_ASSERT (h != NULL);
12920 if (h != NULL
12921 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12922 return FALSE;
12923 break;
12924 }
f6e32f6d
RS		 12925
12926 if (h != NULL)
12927 {
12928 if (call_reloc_p)
12929 /* We may need a .plt entry if the function this reloc
12930 refers to is in a different object, regardless of the
12931 symbol's type. We can't tell for sure yet, because
12932 something later might force the symbol local. */
12933 h->needs_plt = 1;
12934 else if (may_need_local_target_p)
12935 /* If this reloc is in a read-only section, we might
12936 need a copy reloc. We can't check reliably at this
12937 stage whether the section is read-only, as input
12938 sections have not yet been mapped to output sections.
12939 Tentatively set the flag for now, and correct in
12940 adjust_dynamic_symbol. */
12941 h->non_got_ref = 1;
12942 }
12943
34e77a92
RS		 12944 if (may_need_local_target_p
12945 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12946 {
34e77a92
RS		 12947 union gotplt_union *root_plt;
12948 struct arm_plt_info *arm_plt;
12949 struct arm_local_iplt_info *local_iplt;
12950
12951 if (h != NULL)
12952 {
12953 root_plt = &h->plt;
12954 arm_plt = &eh->plt;
12955 }
12956 else
12957 {
12958 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12959 if (local_iplt == NULL)
12960 return FALSE;
12961 root_plt = &local_iplt->root;
12962 arm_plt = &local_iplt->arm;
12963 }
12964
f6e32f6d
RS		 12965 /* If the symbol is a function that doesn't bind locally,
12966 this relocation will need a PLT entry. */
a8c887dd
NC		 12967 if (root_plt->refcount != -1)
12968 root_plt->refcount += 1;
34e77a92
RS		 12969
12970 if (!call_reloc_p)
12971 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12972
12973 /* It's too early to use htab->use_blx here, so we have to
12974 record possible blx references separately from
12975 relocs that definitely need a thumb stub. */
12976
12977 if (r_type == R_ARM_THM_CALL)
34e77a92 12978 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12979
12980 if (r_type == R_ARM_THM_JUMP24
12981 || r_type == R_ARM_THM_JUMP19)
34e77a92 12982 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12983 }
12984
12985 if (may_become_dynamic_p)
12986 {
12987 struct elf_dyn_relocs *p, **head;
12988
12989 /* Create a reloc section in dynobj. */
12990 if (sreloc == NULL)
12991 {
12992 sreloc = _bfd_elf_make_dynamic_reloc_section
12993 (sec, dynobj, 2, abfd, ! htab->use_rel);
12994
12995 if (sreloc == NULL)
12996 return FALSE;
12997
12998 /* BPABI objects never have dynamic relocations mapped. */
12999 if (htab->symbian_p)
13000 {
13001 flagword flags;
13002
13003 flags = bfd_get_section_flags (dynobj, sreloc);
13004 flags &= ~(SEC_LOAD | SEC_ALLOC);
13005 bfd_set_section_flags (dynobj, sreloc, flags);
13006 }
13007 }
13008
13009 /* If this is a global symbol, count the number of
13010 relocations we need for this symbol. */
13011 if (h != NULL)
13012 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
13013 else
13014 {
34e77a92
RS		 13015 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13016 if (head == NULL)
f6e32f6d 13017 return FALSE;
f6e32f6d
RS		 13018 }
13019
13020 p = *head;
13021 if (p == NULL || p->sec != sec)
13022 {
13023 bfd_size_type amt = sizeof *p;
13024
13025 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
13026 if (p == NULL)
13027 return FALSE;
13028 p->next = *head;
13029 *head = p;
13030 p->sec = sec;
13031 p->count = 0;
13032 p->pc_count = 0;
13033 }
13034
469a3493 13035 if (elf32_arm_howto_from_type (r_type)->pc_relative)
f6e32f6d
RS		 13036 p->pc_count += 1;
13037 p->count += 1;
13038 }
252b5132 13039 }
f21f3fe0 13040
b34976b6 13041 return TRUE;
252b5132
RH		 13042}
13043
6a5bb875
PB		 13044/* Unwinding tables are not referenced directly. This pass marks them as
13045 required if the corresponding code section is marked. */
13046
13047static bfd_boolean
906e58ca
NC		 13048elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
13049 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 13050{
13051 bfd *sub;
13052 Elf_Internal_Shdr **elf_shdrp;
13053 bfd_boolean again;
13054
7f6ab9f8
AM		 13055 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
13056
6a5bb875
PB		 13057 /* Marking EH data may cause additional code sections to be marked,
13058 requiring multiple passes. */
13059 again = TRUE;
13060 while (again)
13061 {
13062 again = FALSE;
c72f2fb2 13063 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
6a5bb875
PB		 13064 {
13065 asection *o;
13066
0ffa91dd 13067 if (! is_arm_elf (sub))
6a5bb875
PB		 13068 continue;
13069
13070 elf_shdrp = elf_elfsections (sub);
13071 for (o = sub->sections; o != NULL; o = o->next)
13072 {
13073 Elf_Internal_Shdr *hdr;
0ffa91dd 13074
6a5bb875 13075 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 13076 if (hdr->sh_type == SHT_ARM_EXIDX
13077 && hdr->sh_link
13078 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 13079 && !o->gc_mark
13080 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13081 {
13082 again = TRUE;
13083 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13084 return FALSE;
13085 }
13086 }
13087 }
13088 }
13089
13090 return TRUE;
13091}
13092
3c9458e9
NC		 13093/* Treat mapping symbols as special target symbols. */
13094
13095static bfd_boolean
13096elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13097{
b0796911
PB		 13098 return bfd_is_arm_special_symbol_name (sym->name,
13099 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 13100}
13101
0367ecfb
NC		 13102/* This is a copy of elf_find_function() from elf.c except that
13103 ARM mapping symbols are ignored when looking for function names
13104 and STT_ARM_TFUNC is considered to a function type. */
252b5132 13105
0367ecfb
NC		 13106static bfd_boolean
13107arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
0367ecfb 13108 asymbol ** symbols,
fb167eb2 13109 asection * section,
0367ecfb
NC		 13110 bfd_vma offset,
13111 const char ** filename_ptr,
13112 const char ** functionname_ptr)
13113{
13114 const char * filename = NULL;
13115 asymbol * func = NULL;
13116 bfd_vma low_func = 0;
13117 asymbol ** p;
252b5132
RH		 13118
13119 for (p = symbols; *p != NULL; p++)
13120 {
13121 elf_symbol_type *q;
13122
13123 q = (elf_symbol_type *) *p;
13124
252b5132
RH		 13125 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13126 {
13127 default:
13128 break;
13129 case STT_FILE:
13130 filename = bfd_asymbol_name (&q->symbol);
13131 break;
252b5132
RH		 13132 case STT_FUNC:
13133 case STT_ARM_TFUNC:
9d2da7ca 13134 case STT_NOTYPE:
b0796911 13135 /* Skip mapping symbols. */
0367ecfb 13136 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 13137 && bfd_is_arm_special_symbol_name (q->symbol.name,
13138 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 13139 continue;
13140 /* Fall through. */
6b40fcba 13141 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 13142 && q->symbol.value >= low_func
13143 && q->symbol.value <= offset)
13144 {
13145 func = (asymbol *) q;
13146 low_func = q->symbol.value;
13147 }
13148 break;
13149 }
13150 }
13151
13152 if (func == NULL)
b34976b6 13153 return FALSE;
252b5132 13154
0367ecfb
NC		 13155 if (filename_ptr)
13156 *filename_ptr = filename;
13157 if (functionname_ptr)
13158 *functionname_ptr = bfd_asymbol_name (func);
13159
13160 return TRUE;
906e58ca 13161}
0367ecfb
NC		 13162
13163
13164/* Find the nearest line to a particular section and offset, for error
13165 reporting. This code is a duplicate of the code in elf.c, except
13166 that it uses arm_elf_find_function. */
13167
13168static bfd_boolean
13169elf32_arm_find_nearest_line (bfd * abfd,
0367ecfb 13170 asymbol ** symbols,
fb167eb2 13171 asection * section,
0367ecfb
NC		 13172 bfd_vma offset,
13173 const char ** filename_ptr,
13174 const char ** functionname_ptr,
fb167eb2
AM		 13175 unsigned int * line_ptr,
13176 unsigned int * discriminator_ptr)
0367ecfb
NC		 13177{
13178 bfd_boolean found = FALSE;
13179
fb167eb2 13180 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
0367ecfb 13181 filename_ptr, functionname_ptr,
fb167eb2
AM		 13182 line_ptr, discriminator_ptr,
13183 dwarf_debug_sections, 0,
0367ecfb
NC		 13184 & elf_tdata (abfd)->dwarf2_find_line_info))
13185 {
13186 if (!*functionname_ptr)
fb167eb2 13187 arm_elf_find_function (abfd, symbols, section, offset,
0367ecfb
NC		 13188 *filename_ptr ? NULL : filename_ptr,
13189 functionname_ptr);
f21f3fe0 13190
0367ecfb
NC		 13191 return TRUE;
13192 }
13193
fb167eb2
AM		 13194 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
13195 uses DWARF1. */
13196
0367ecfb
NC		 13197 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13198 & found, filename_ptr,
13199 functionname_ptr, line_ptr,
13200 & elf_tdata (abfd)->line_info))
13201 return FALSE;
13202
13203 if (found && (*functionname_ptr || *line_ptr))
13204 return TRUE;
13205
13206 if (symbols == NULL)
13207 return FALSE;
13208
fb167eb2 13209 if (! arm_elf_find_function (abfd, symbols, section, offset,
0367ecfb
NC		 13210 filename_ptr, functionname_ptr))
13211 return FALSE;
13212
13213 *line_ptr = 0;
b34976b6 13214 return TRUE;
252b5132
RH		 13215}
13216
4ab527b0
FF		 13217static bfd_boolean
13218elf32_arm_find_inliner_info (bfd * abfd,
13219 const char ** filename_ptr,
13220 const char ** functionname_ptr,
13221 unsigned int * line_ptr)
13222{
13223 bfd_boolean found;
13224 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13225 functionname_ptr, line_ptr,
13226 & elf_tdata (abfd)->dwarf2_find_line_info);
13227 return found;
13228}
13229
252b5132
RH		 13230/* Adjust a symbol defined by a dynamic object and referenced by a
13231 regular object. The current definition is in some section of the
13232 dynamic object, but we're not including those sections. We have to
13233 change the definition to something the rest of the link can
13234 understand. */
13235
b34976b6 13236static bfd_boolean
57e8b36a
NC		 13237elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13238 struct elf_link_hash_entry * h)
252b5132
RH		 13239{
13240 bfd * dynobj;
13241 asection * s;
b7693d02 13242 struct elf32_arm_link_hash_entry * eh;
67687978 13243 struct elf32_arm_link_hash_table *globals;
252b5132 13244
67687978 13245 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13246 if (globals == NULL)
13247 return FALSE;
13248
252b5132
RH		 13249 dynobj = elf_hash_table (info)->dynobj;
13250
13251 /* Make sure we know what is going on here. */
13252 BFD_ASSERT (dynobj != NULL
f5385ebf 13253 && (h->needs_plt
34e77a92 13254 || h->type == STT_GNU_IFUNC
f6e332e6 13255 || h->u.weakdef != NULL
f5385ebf
AM		 13256 || (h->def_dynamic
13257 && h->ref_regular
13258 && !h->def_regular)));
252b5132 13259
b7693d02
DJ		 13260 eh = (struct elf32_arm_link_hash_entry *) h;
13261
252b5132
RH		 13262 /* If this is a function, put it in the procedure linkage table. We
13263 will fill in the contents of the procedure linkage table later,
13264 when we know the address of the .got section. */
34e77a92 13265 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 13266 {
34e77a92
RS		 13267 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13268 symbol binds locally. */
5e681ec4 13269 if (h->plt.refcount <= 0
34e77a92
RS		 13270 || (h->type != STT_GNU_IFUNC
13271 && (SYMBOL_CALLS_LOCAL (info, h)
13272 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13273 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 13274 {
13275 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 13276 file, but the symbol was never referred to by a dynamic
13277 object, or if all references were garbage collected. In
13278 such a case, we don't actually need to build a procedure
13279 linkage table, and we can just do a PC24 reloc instead. */
13280 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13281 eh->plt.thumb_refcount = 0;
13282 eh->plt.maybe_thumb_refcount = 0;
13283 eh->plt.noncall_refcount = 0;
f5385ebf 13284 h->needs_plt = 0;
252b5132
RH		 13285 }
13286
b34976b6 13287 return TRUE;
252b5132 13288 }
5e681ec4 13289 else
b7693d02
DJ		 13290 {
13291 /* It's possible that we incorrectly decided a .plt reloc was
13292 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13293 in check_relocs. We can't decide accurately between function
13294 and non-function syms in check-relocs; Objects loaded later in
13295 the link may change h->type. So fix it now. */
13296 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13297 eh->plt.thumb_refcount = 0;
13298 eh->plt.maybe_thumb_refcount = 0;
13299 eh->plt.noncall_refcount = 0;
b7693d02 13300 }
252b5132
RH		 13301
13302 /* If this is a weak symbol, and there is a real definition, the
13303 processor independent code will have arranged for us to see the
13304 real definition first, and we can just use the same value. */
f6e332e6 13305 if (h->u.weakdef != NULL)
252b5132 13306 {
f6e332e6
AM		 13307 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13308 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13309 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13310 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13311 return TRUE;
252b5132
RH		 13312 }
13313
ba93b8ac
DJ		 13314 /* If there are no non-GOT references, we do not need a copy
13315 relocation. */
13316 if (!h->non_got_ref)
13317 return TRUE;
13318
252b5132
RH		 13319 /* This is a reference to a symbol defined by a dynamic object which
13320 is not a function. */
13321
13322 /* If we are creating a shared library, we must presume that the
13323 only references to the symbol are via the global offset table.
13324 For such cases we need not do anything here; the relocations will
67687978
PB		 13325 be handled correctly by relocate_section. Relocatable executables
13326 can reference data in shared objects directly, so we don't need to
13327 do anything here. */
0e1862bb 13328 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
b34976b6 13329 return TRUE;
252b5132
RH		 13330
13331 /* We must allocate the symbol in our .dynbss section, which will
13332 become part of the .bss section of the executable. There will be
13333 an entry for this symbol in the .dynsym section. The dynamic
13334 object will contain position independent code, so all references
13335 from the dynamic object to this symbol will go through the global
13336 offset table. The dynamic linker will use the .dynsym entry to
13337 determine the address it must put in the global offset table, so
13338 both the dynamic object and the regular object will refer to the
13339 same memory location for the variable. */
3d4d4302 13340 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13341 BFD_ASSERT (s != NULL);
13342
13343 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13344 copy the initial value out of the dynamic object and into the
13345 runtime process image. We need to remember the offset into the
00a97672 13346 .rel(a).bss section we are going to use. */
1d7e9d18 13347 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13348 {
13349 asection *srel;
13350
3d4d4302 13351 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13352 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13353 h->needs_copy = 1;
252b5132
RH		 13354 }
13355
6cabe1ea 13356 return _bfd_elf_adjust_dynamic_copy (info, h, s);
252b5132
RH		 13357}
13358
5e681ec4
PB		 13359/* Allocate space in .plt, .got and associated reloc sections for
13360 dynamic relocs. */
13361
13362static bfd_boolean
47beaa6a 13363allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13364{
13365 struct bfd_link_info *info;
13366 struct elf32_arm_link_hash_table *htab;
13367 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13368 struct elf_dyn_relocs *p;
5e681ec4
PB		 13369
13370 if (h->root.type == bfd_link_hash_indirect)
13371 return TRUE;
13372
e6a6bb22
AM		 13373 eh = (struct elf32_arm_link_hash_entry *) h;
13374
5e681ec4
PB		 13375 info = (struct bfd_link_info *) inf;
13376 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13377 if (htab == NULL)
13378 return FALSE;
5e681ec4 13379
34e77a92 13380 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13381 && h->plt.refcount > 0)
13382 {
13383 /* Make sure this symbol is output as a dynamic symbol.
13384 Undefined weak syms won't yet be marked as dynamic. */
13385 if (h->dynindx == -1
f5385ebf 13386 && !h->forced_local)
5e681ec4 13387 {
c152c796 13388 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13389 return FALSE;
13390 }
13391
34e77a92
RS		 13392 /* If the call in the PLT entry binds locally, the associated
13393 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13394 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13395 than the .plt section. */
13396 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13397 {
13398 eh->is_iplt = 1;
13399 if (eh->plt.noncall_refcount == 0
13400 && SYMBOL_REFERENCES_LOCAL (info, h))
13401 /* All non-call references can be resolved directly.
13402 This means that they can (and in some cases, must)
13403 resolve directly to the run-time target, rather than
13404 to the PLT. That in turns means that any .got entry
13405 would be equal to the .igot.plt entry, so there's
13406 no point having both. */
13407 h->got.refcount = 0;
13408 }
13409
0e1862bb 13410 if (bfd_link_pic (info)
34e77a92 13411 || eh->is_iplt
7359ea65 13412 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13413 {
34e77a92 13414 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13415
5e681ec4
PB		 13416 /* If this symbol is not defined in a regular file, and we are
13417 not generating a shared library, then set the symbol to this
13418 location in the .plt. This is required to make function
13419 pointers compare as equal between the normal executable and
13420 the shared library. */
0e1862bb 13421 if (! bfd_link_pic (info)
f5385ebf 13422 && !h->def_regular)
5e681ec4 13423 {
34e77a92 13424 h->root.u.def.section = htab->root.splt;
5e681ec4 13425 h->root.u.def.value = h->plt.offset;
5e681ec4 13426
67d74e43
DJ		 13427 /* Make sure the function is not marked as Thumb, in case
13428 it is the target of an ABS32 relocation, which will
13429 point to the PLT entry. */
35fc36a8 13430 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13431 }
022f8312 13432
00a97672
RS		 13433 /* VxWorks executables have a second set of relocations for
13434 each PLT entry. They go in a separate relocation section,
13435 which is processed by the kernel loader. */
0e1862bb 13436 if (htab->vxworks_p && !bfd_link_pic (info))
00a97672
RS		 13437 {
13438 /* There is a relocation for the initial PLT entry:
13439 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13440 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13441 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13442
13443 /* There are two extra relocations for each subsequent
13444 PLT entry: an R_ARM_32 relocation for the GOT entry,
13445 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13446 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13447 }
5e681ec4
PB		 13448 }
13449 else
13450 {
13451 h->plt.offset = (bfd_vma) -1;
f5385ebf 13452 h->needs_plt = 0;
5e681ec4
PB		 13453 }
13454 }
13455 else
13456 {
13457 h->plt.offset = (bfd_vma) -1;
f5385ebf 13458 h->needs_plt = 0;
5e681ec4
PB		 13459 }
13460
0855e32b
NS		 13461 eh = (struct elf32_arm_link_hash_entry *) h;
13462 eh->tlsdesc_got = (bfd_vma) -1;
13463
5e681ec4
PB		 13464 if (h->got.refcount > 0)
13465 {
13466 asection *s;
13467 bfd_boolean dyn;
ba93b8ac
DJ		 13468 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13469 int indx;
5e681ec4
PB		 13470
13471 /* Make sure this symbol is output as a dynamic symbol.
13472 Undefined weak syms won't yet be marked as dynamic. */
13473 if (h->dynindx == -1
f5385ebf 13474 && !h->forced_local)
5e681ec4 13475 {
c152c796 13476 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13477 return FALSE;
13478 }
13479
e5a52504
MM		 13480 if (!htab->symbian_p)
13481 {
362d30a1 13482 s = htab->root.sgot;
e5a52504 13483 h->got.offset = s->size;
ba93b8ac
DJ		 13484
13485 if (tls_type == GOT_UNKNOWN)
13486 abort ();
13487
13488 if (tls_type == GOT_NORMAL)
13489 /* Non-TLS symbols need one GOT slot. */
13490 s->size += 4;
13491 else
13492 {
99059e56
RM		 13493 if (tls_type & GOT_TLS_GDESC)
13494 {
0855e32b 13495 /* R_ARM_TLS_DESC needs 2 GOT slots. */
99059e56 13496 eh->tlsdesc_got
0855e32b
NS		 13497 = (htab->root.sgotplt->size
13498 - elf32_arm_compute_jump_table_size (htab));
99059e56
RM		 13499 htab->root.sgotplt->size += 8;
13500 h->got.offset = (bfd_vma) -2;
34e77a92 13501 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13502 reloc in the middle of .got.plt. */
99059e56
RM		 13503 htab->num_tls_desc++;
13504 }
0855e32b 13505
ba93b8ac 13506 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13507 {
13508 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13509 the symbol is both GD and GDESC, got.offset may
13510 have been overwritten. */
13511 h->got.offset = s->size;
13512 s->size += 8;
13513 }
13514
ba93b8ac
DJ		 13515 if (tls_type & GOT_TLS_IE)
13516 /* R_ARM_TLS_IE32 needs one GOT slot. */
13517 s->size += 4;
13518 }
13519
e5a52504 13520 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13521
13522 indx = 0;
0e1862bb
L		 13523 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
13524 bfd_link_pic (info),
13525 h)
13526 && (!bfd_link_pic (info)
ba93b8ac
DJ		 13527 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13528 indx = h->dynindx;
13529
13530 if (tls_type != GOT_NORMAL
0e1862bb 13531 && (bfd_link_pic (info) || indx != 0)
ba93b8ac
DJ		 13532 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13533 || h->root.type != bfd_link_hash_undefweak))
13534 {
13535 if (tls_type & GOT_TLS_IE)
47beaa6a 13536 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13537
13538 if (tls_type & GOT_TLS_GD)
47beaa6a 13539 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13540
b38cadfb 13541 if (tls_type & GOT_TLS_GDESC)
0855e32b 13542 {
47beaa6a 13543 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13544 /* GDESC needs a trampoline to jump to. */
13545 htab->tls_trampoline = -1;
13546 }
13547
13548 /* Only GD needs it. GDESC just emits one relocation per
13549 2 entries. */
b38cadfb 13550 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13551 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13552 }
6f820c85 13553 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 13554 {
13555 if (htab->root.dynamic_sections_created)
13556 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13557 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13558 }
34e77a92
RS		 13559 else if (h->type == STT_GNU_IFUNC
13560 && eh->plt.noncall_refcount == 0)
13561 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13562 they all resolve dynamically instead. Reserve room for the
13563 GOT entry's R_ARM_IRELATIVE relocation. */
13564 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
0e1862bb
L		 13565 else if (bfd_link_pic (info)
13566 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13567 || h->root.type != bfd_link_hash_undefweak))
b436d854 13568 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13569 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13570 }
5e681ec4
PB		 13571 }
13572 else
13573 h->got.offset = (bfd_vma) -1;
13574
a4fd1a8e
PB		 13575 /* Allocate stubs for exported Thumb functions on v4t. */
13576 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13577 && h->def_regular
35fc36a8 13578 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13579 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13580 {
13581 struct elf_link_hash_entry * th;
13582 struct bfd_link_hash_entry * bh;
13583 struct elf_link_hash_entry * myh;
13584 char name[1024];
13585 asection *s;
13586 bh = NULL;
13587 /* Create a new symbol to regist the real location of the function. */
13588 s = h->root.u.def.section;
906e58ca 13589 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13590 _bfd_generic_link_add_one_symbol (info, s->owner,
13591 name, BSF_GLOBAL, s,
13592 h->root.u.def.value,
13593 NULL, TRUE, FALSE, &bh);
13594
13595 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13596 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13597 myh->forced_local = 1;
35fc36a8 13598 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13599 eh->export_glue = myh;
13600 th = record_arm_to_thumb_glue (info, h);
13601 /* Point the symbol at the stub. */
13602 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13603 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13604 h->root.u.def.section = th->root.u.def.section;
13605 h->root.u.def.value = th->root.u.def.value & ~1;
13606 }
13607
0bdcacaf 13608 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13609 return TRUE;
13610
13611 /* In the shared -Bsymbolic case, discard space allocated for
13612 dynamic pc-relative relocs against symbols which turn out to be
13613 defined in regular objects. For the normal shared case, discard
13614 space for pc-relative relocs that have become local due to symbol
13615 visibility changes. */
13616
0e1862bb 13617 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
5e681ec4 13618 {
469a3493
RM		 13619 /* Relocs that use pc_count are PC-relative forms, which will appear
13620 on something like ".long foo - ." or "movw REG, foo - .". We want
13621 calls to protected symbols to resolve directly to the function
13622 rather than going via the plt. If people want function pointer
13623 comparisons to work as expected then they should avoid writing
13624 assembly like ".long foo - .". */
ba93b8ac
DJ		 13625 if (SYMBOL_CALLS_LOCAL (info, h))
13626 {
0bdcacaf 13627 struct elf_dyn_relocs **pp;
ba93b8ac 13628
0bdcacaf 13629 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13630 {
13631 p->count -= p->pc_count;
13632 p->pc_count = 0;
13633 if (p->count == 0)
13634 *pp = p->next;
13635 else
13636 pp = &p->next;
13637 }
13638 }
13639
4dfe6ac6 13640 if (htab->vxworks_p)
3348747a 13641 {
0bdcacaf 13642 struct elf_dyn_relocs **pp;
3348747a 13643
0bdcacaf 13644 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13645 {
0bdcacaf 13646 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13647 *pp = p->next;
13648 else
13649 pp = &p->next;
13650 }
13651 }
13652
ba93b8ac 13653 /* Also discard relocs on undefined weak syms with non-default
99059e56 13654 visibility. */
0bdcacaf 13655 if (eh->dyn_relocs != NULL
5e681ec4 13656 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13657 {
13658 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13659 eh->dyn_relocs = NULL;
22d606e9
AM		 13660
13661 /* Make sure undefined weak symbols are output as a dynamic
13662 symbol in PIEs. */
13663 else if (h->dynindx == -1
13664 && !h->forced_local)
13665 {
13666 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13667 return FALSE;
13668 }
13669 }
13670
67687978
PB		 13671 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13672 && h->root.type == bfd_link_hash_new)
13673 {
13674 /* Output absolute symbols so that we can create relocations
13675 against them. For normal symbols we output a relocation
13676 against the section that contains them. */
13677 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13678 return FALSE;
13679 }
13680
5e681ec4
PB		 13681 }
13682 else
13683 {
13684 /* For the non-shared case, discard space for relocs against
13685 symbols which turn out to need copy relocs or are not
13686 dynamic. */
13687
f5385ebf
AM		 13688 if (!h->non_got_ref
13689 && ((h->def_dynamic
13690 && !h->def_regular)
5e681ec4
PB		 13691 || (htab->root.dynamic_sections_created
13692 && (h->root.type == bfd_link_hash_undefweak
13693 || h->root.type == bfd_link_hash_undefined))))
13694 {
13695 /* Make sure this symbol is output as a dynamic symbol.
13696 Undefined weak syms won't yet be marked as dynamic. */
13697 if (h->dynindx == -1
f5385ebf 13698 && !h->forced_local)
5e681ec4 13699 {
c152c796 13700 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13701 return FALSE;
13702 }
13703
13704 /* If that succeeded, we know we'll be keeping all the
13705 relocs. */
13706 if (h->dynindx != -1)
13707 goto keep;
13708 }
13709
0bdcacaf 13710 eh->dyn_relocs = NULL;
5e681ec4
PB		 13711
13712 keep: ;
13713 }
13714
13715 /* Finally, allocate space. */
0bdcacaf 13716 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13717 {
0bdcacaf 13718 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13719 if (h->type == STT_GNU_IFUNC
13720 && eh->plt.noncall_refcount == 0
13721 && SYMBOL_REFERENCES_LOCAL (info, h))
13722 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13723 else
13724 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13725 }
13726
13727 return TRUE;
13728}
13729
08d1f311
DJ		 13730/* Find any dynamic relocs that apply to read-only sections. */
13731
13732static bfd_boolean
8029a119 13733elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13734{
8029a119 13735 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13736 struct elf_dyn_relocs * p;
08d1f311 13737
08d1f311 13738 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13739 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13740 {
0bdcacaf 13741 asection *s = p->sec;
08d1f311
DJ		 13742
13743 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13744 {
13745 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13746
13747 info->flags |= DF_TEXTREL;
13748
13749 /* Not an error, just cut short the traversal. */
13750 return FALSE;
13751 }
13752 }
13753 return TRUE;
13754}
13755
d504ffc8
DJ		 13756void
13757bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13758 int byteswap_code)
13759{
13760 struct elf32_arm_link_hash_table *globals;
13761
13762 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13763 if (globals == NULL)
13764 return;
13765
d504ffc8
DJ		 13766 globals->byteswap_code = byteswap_code;
13767}
13768
252b5132
RH		 13769/* Set the sizes of the dynamic sections. */
13770
b34976b6 13771static bfd_boolean
57e8b36a
NC		 13772elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13773 struct bfd_link_info * info)
252b5132
RH		 13774{
13775 bfd * dynobj;
13776 asection * s;
b34976b6
AM		 13777 bfd_boolean plt;
13778 bfd_boolean relocs;
5e681ec4
PB		 13779 bfd *ibfd;
13780 struct elf32_arm_link_hash_table *htab;
252b5132 13781
5e681ec4 13782 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13783 if (htab == NULL)
13784 return FALSE;
13785
252b5132
RH		 13786 dynobj = elf_hash_table (info)->dynobj;
13787 BFD_ASSERT (dynobj != NULL);
39b41c9c 13788 check_use_blx (htab);
252b5132
RH		 13789
13790 if (elf_hash_table (info)->dynamic_sections_created)
13791 {
13792 /* Set the contents of the .interp section to the interpreter. */
9b8b325a 13793 if (bfd_link_executable (info) && !info->nointerp)
252b5132 13794 {
3d4d4302 13795 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13796 BFD_ASSERT (s != NULL);
eea6121a 13797 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13798 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13799 }
13800 }
5e681ec4
PB		 13801
13802 /* Set up .got offsets for local syms, and space for local dynamic
13803 relocs. */
c72f2fb2 13804 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
252b5132 13805 {
5e681ec4
PB		 13806 bfd_signed_vma *local_got;
13807 bfd_signed_vma *end_local_got;
34e77a92 13808 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13809 char *local_tls_type;
0855e32b 13810 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13811 bfd_size_type locsymcount;
13812 Elf_Internal_Shdr *symtab_hdr;
13813 asection *srel;
4dfe6ac6 13814 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13815 unsigned int symndx;
5e681ec4 13816
0ffa91dd 13817 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13818 continue;
13819
13820 for (s = ibfd->sections; s != NULL; s = s->next)
13821 {
0bdcacaf 13822 struct elf_dyn_relocs *p;
5e681ec4 13823
0bdcacaf 13824 for (p = (struct elf_dyn_relocs *)
99059e56 13825 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13826 {
0bdcacaf
RS		 13827 if (!bfd_is_abs_section (p->sec)
13828 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13829 {
13830 /* Input section has been discarded, either because
13831 it is a copy of a linkonce section or due to
13832 linker script /DISCARD/, so we'll be discarding
13833 the relocs too. */
13834 }
3348747a 13835 else if (is_vxworks
0bdcacaf 13836 && strcmp (p->sec->output_section->name,
3348747a
NS		 13837 ".tls_vars") == 0)
13838 {
13839 /* Relocations in vxworks .tls_vars sections are
13840 handled specially by the loader. */
13841 }
5e681ec4
PB		 13842 else if (p->count != 0)
13843 {
0bdcacaf 13844 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13845 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13846 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13847 info->flags |= DF_TEXTREL;
13848 }
13849 }
13850 }
13851
13852 local_got = elf_local_got_refcounts (ibfd);
13853 if (!local_got)
13854 continue;
13855
0ffa91dd 13856 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13857 locsymcount = symtab_hdr->sh_info;
13858 end_local_got = local_got + locsymcount;
34e77a92 13859 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13860 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13861 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13862 symndx = 0;
362d30a1
RS		 13863 s = htab->root.sgot;
13864 srel = htab->root.srelgot;
0855e32b 13865 for (; local_got < end_local_got;
34e77a92
RS		 13866 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13867 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13868 {
0855e32b 13869 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13870 local_iplt = *local_iplt_ptr;
13871 if (local_iplt != NULL)
13872 {
13873 struct elf_dyn_relocs *p;
13874
13875 if (local_iplt->root.refcount > 0)
13876 {
13877 elf32_arm_allocate_plt_entry (info, TRUE,
13878 &local_iplt->root,
13879 &local_iplt->arm);
13880 if (local_iplt->arm.noncall_refcount == 0)
13881 /* All references to the PLT are calls, so all
13882 non-call references can resolve directly to the
13883 run-time target. This means that the .got entry
13884 would be the same as the .igot.plt entry, so there's
13885 no point creating both. */
13886 *local_got = 0;
13887 }
13888 else
13889 {
13890 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13891 local_iplt->root.offset = (bfd_vma) -1;
13892 }
13893
13894 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13895 {
13896 asection *psrel;
13897
13898 psrel = elf_section_data (p->sec)->sreloc;
13899 if (local_iplt->arm.noncall_refcount == 0)
13900 elf32_arm_allocate_irelocs (info, psrel, p->count);
13901 else
13902 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13903 }
13904 }
5e681ec4
PB		 13905 if (*local_got > 0)
13906 {
34e77a92
RS		 13907 Elf_Internal_Sym *isym;
13908
eea6121a 13909 *local_got = s->size;
ba93b8ac
DJ		 13910 if (*local_tls_type & GOT_TLS_GD)
13911 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13912 s->size += 8;
0855e32b
NS		 13913 if (*local_tls_type & GOT_TLS_GDESC)
13914 {
13915 *local_tlsdesc_gotent = htab->root.sgotplt->size
13916 - elf32_arm_compute_jump_table_size (htab);
13917 htab->root.sgotplt->size += 8;
13918 *local_got = (bfd_vma) -2;
34e77a92 13919 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13920 reloc in the middle of .got.plt. */
99059e56 13921 htab->num_tls_desc++;
0855e32b 13922 }
ba93b8ac
DJ		 13923 if (*local_tls_type & GOT_TLS_IE)
13924 s->size += 4;
ba93b8ac 13925
0855e32b
NS		 13926 if (*local_tls_type & GOT_NORMAL)
13927 {
13928 /* If the symbol is both GD and GDESC, *local_got
13929 may have been overwritten. */
13930 *local_got = s->size;
13931 s->size += 4;
13932 }
13933
34e77a92
RS		 13934 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13935 if (isym == NULL)
13936 return FALSE;
13937
13938 /* If all references to an STT_GNU_IFUNC PLT are calls,
13939 then all non-call references, including this GOT entry,
13940 resolve directly to the run-time target. */
13941 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13942 && (local_iplt == NULL
13943 || local_iplt->arm.noncall_refcount == 0))
13944 elf32_arm_allocate_irelocs (info, srel, 1);
0e1862bb 13945 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
0855e32b 13946 {
0e1862bb 13947 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
3064e1ff
JB		 13948 || *local_tls_type & GOT_TLS_GD)
13949 elf32_arm_allocate_dynrelocs (info, srel, 1);
99059e56 13950
0e1862bb 13951 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
3064e1ff
JB		 13952 {
13953 elf32_arm_allocate_dynrelocs (info,
13954 htab->root.srelplt, 1);
13955 htab->tls_trampoline = -1;
13956 }
0855e32b 13957 }
5e681ec4
PB		 13958 }
13959 else
13960 *local_got = (bfd_vma) -1;
13961 }
252b5132
RH		 13962 }
13963
ba93b8ac
DJ		 13964 if (htab->tls_ldm_got.refcount > 0)
13965 {
13966 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13967 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13968 htab->tls_ldm_got.offset = htab->root.sgot->size;
13969 htab->root.sgot->size += 8;
0e1862bb 13970 if (bfd_link_pic (info))
47beaa6a 13971 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13972 }
13973 else
13974 htab->tls_ldm_got.offset = -1;
13975
5e681ec4
PB		 13976 /* Allocate global sym .plt and .got entries, and space for global
13977 sym dynamic relocs. */
47beaa6a 13978 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13979
d504ffc8 13980 /* Here we rummage through the found bfds to collect glue information. */
c72f2fb2 13981 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
c7b8f16e 13982 {
0ffa91dd 13983 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13984 continue;
13985
c7b8f16e
JB		 13986 /* Initialise mapping tables for code/data. */
13987 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13988
c7b8f16e
JB		 13989 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13990 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
99059e56
RM		 13991 /* xgettext:c-format */
13992 _bfd_error_handler (_("Errors encountered processing file %s"),
c7b8f16e
JB		 13993 ibfd->filename);
13994 }
d504ffc8 13995
3e6b1042
DJ		 13996 /* Allocate space for the glue sections now that we've sized them. */
13997 bfd_elf32_arm_allocate_interworking_sections (info);
13998
0855e32b
NS		 13999 /* For every jump slot reserved in the sgotplt, reloc_count is
14000 incremented. However, when we reserve space for TLS descriptors,
14001 it's not incremented, so in order to compute the space reserved
14002 for them, it suffices to multiply the reloc count by the jump
14003 slot size. */
14004 if (htab->root.srelplt)
14005 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
14006
14007 if (htab->tls_trampoline)
14008 {
14009 if (htab->root.splt->size == 0)
14010 htab->root.splt->size += htab->plt_header_size;
b38cadfb 14011
0855e32b
NS		 14012 htab->tls_trampoline = htab->root.splt->size;
14013 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 14014
0855e32b 14015 /* If we're not using lazy TLS relocations, don't generate the
99059e56 14016 PLT and GOT entries they require. */
0855e32b
NS		 14017 if (!(info->flags & DF_BIND_NOW))
14018 {
14019 htab->dt_tlsdesc_got = htab->root.sgot->size;
14020 htab->root.sgot->size += 4;
14021
14022 htab->dt_tlsdesc_plt = htab->root.splt->size;
14023 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
14024 }
14025 }
14026
252b5132
RH		 14027 /* The check_relocs and adjust_dynamic_symbol entry points have
14028 determined the sizes of the various dynamic sections. Allocate
14029 memory for them. */
b34976b6
AM		 14030 plt = FALSE;
14031 relocs = FALSE;
252b5132
RH		 14032 for (s = dynobj->sections; s != NULL; s = s->next)
14033 {
14034 const char * name;
252b5132
RH		 14035
14036 if ((s->flags & SEC_LINKER_CREATED) == 0)
14037 continue;
14038
14039 /* It's OK to base decisions on the section name, because none
14040 of the dynobj section names depend upon the input files. */
14041 name = bfd_get_section_name (dynobj, s);
14042
34e77a92 14043 if (s == htab->root.splt)
252b5132 14044 {
c456f082
AM		 14045 /* Remember whether there is a PLT. */
14046 plt = s->size != 0;
252b5132 14047 }
0112cd26 14048 else if (CONST_STRNEQ (name, ".rel"))
252b5132 14049 {
c456f082 14050 if (s->size != 0)
252b5132 14051 {
252b5132 14052 /* Remember whether there are any reloc sections other
00a97672 14053 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 14054 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 14055 relocs = TRUE;
252b5132
RH		 14056
14057 /* We use the reloc_count field as a counter if we need
14058 to copy relocs into the output file. */
14059 s->reloc_count = 0;
14060 }
14061 }
34e77a92
RS		 14062 else if (s != htab->root.sgot
14063 && s != htab->root.sgotplt
14064 && s != htab->root.iplt
14065 && s != htab->root.igotplt
14066 && s != htab->sdynbss)
252b5132
RH		 14067 {
14068 /* It's not one of our sections, so don't allocate space. */
14069 continue;
14070 }
14071
c456f082 14072 if (s->size == 0)
252b5132 14073 {
c456f082 14074 /* If we don't need this section, strip it from the
00a97672
RS		 14075 output file. This is mostly to handle .rel(a).bss and
14076 .rel(a).plt. We must create both sections in
c456f082
AM		 14077 create_dynamic_sections, because they must be created
14078 before the linker maps input sections to output
14079 sections. The linker does that before
14080 adjust_dynamic_symbol is called, and it is that
14081 function which decides whether anything needs to go
14082 into these sections. */
8423293d 14083 s->flags |= SEC_EXCLUDE;
252b5132
RH		 14084 continue;
14085 }
14086
c456f082
AM		 14087 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14088 continue;
14089
252b5132 14090 /* Allocate memory for the section contents. */
21d799b5 14091 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 14092 if (s->contents == NULL)
b34976b6 14093 return FALSE;
252b5132
RH		 14094 }
14095
14096 if (elf_hash_table (info)->dynamic_sections_created)
14097 {
14098 /* Add some entries to the .dynamic section. We fill in the
14099 values later, in elf32_arm_finish_dynamic_sections, but we
14100 must add the entries now so that we get the correct size for
14101 the .dynamic section. The DT_DEBUG entry is filled in by the
14102 dynamic linker and used by the debugger. */
dc810e39 14103#define add_dynamic_entry(TAG, VAL) \
5a580b3a 14104 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 14105
0e1862bb 14106 if (bfd_link_executable (info))
252b5132 14107 {
dc810e39 14108 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 14109 return FALSE;
252b5132
RH		 14110 }
14111
14112 if (plt)
14113 {
dc810e39
AM		 14114 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14115 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 14116 || !add_dynamic_entry (DT_PLTREL,
14117 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 14118 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 14119 return FALSE;
0855e32b
NS		 14120
14121 if (htab->dt_tlsdesc_plt &&
b38cadfb 14122 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 14123 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 14124 return FALSE;
252b5132
RH		 14125 }
14126
14127 if (relocs)
14128 {
00a97672
RS		 14129 if (htab->use_rel)
14130 {
14131 if (!add_dynamic_entry (DT_REL, 0)
14132 || !add_dynamic_entry (DT_RELSZ, 0)
14133 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14134 return FALSE;
14135 }
14136 else
14137 {
14138 if (!add_dynamic_entry (DT_RELA, 0)
14139 || !add_dynamic_entry (DT_RELASZ, 0)
14140 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14141 return FALSE;
14142 }
252b5132
RH		 14143 }
14144
08d1f311
DJ		 14145 /* If any dynamic relocs apply to a read-only section,
14146 then we need a DT_TEXTREL entry. */
14147 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 14148 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14149 info);
08d1f311 14150
99e4ae17 14151 if ((info->flags & DF_TEXTREL) != 0)
252b5132 14152 {
dc810e39 14153 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 14154 return FALSE;
252b5132 14155 }
7a2b07ff
NS		 14156 if (htab->vxworks_p
14157 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14158 return FALSE;
252b5132 14159 }
8532796c 14160#undef add_dynamic_entry
252b5132 14161
b34976b6 14162 return TRUE;
252b5132
RH		 14163}
14164
0855e32b
NS		 14165/* Size sections even though they're not dynamic. We use it to setup
14166 _TLS_MODULE_BASE_, if needed. */
14167
14168static bfd_boolean
14169elf32_arm_always_size_sections (bfd *output_bfd,
99059e56 14170 struct bfd_link_info *info)
0855e32b
NS		 14171{
14172 asection *tls_sec;
14173
0e1862bb 14174 if (bfd_link_relocatable (info))
0855e32b
NS		 14175 return TRUE;
14176
14177 tls_sec = elf_hash_table (info)->tls_sec;
14178
14179 if (tls_sec)
14180 {
14181 struct elf_link_hash_entry *tlsbase;
14182
14183 tlsbase = elf_link_hash_lookup
14184 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14185
14186 if (tlsbase)
99059e56
RM		 14187 {
14188 struct bfd_link_hash_entry *bh = NULL;
0855e32b 14189 const struct elf_backend_data *bed
99059e56 14190 = get_elf_backend_data (output_bfd);
0855e32b 14191
99059e56 14192 if (!(_bfd_generic_link_add_one_symbol
0855e32b
NS		 14193 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14194 tls_sec, 0, NULL, FALSE,
14195 bed->collect, &bh)))
14196 return FALSE;
b38cadfb 14197
99059e56
RM		 14198 tlsbase->type = STT_TLS;
14199 tlsbase = (struct elf_link_hash_entry *)bh;
14200 tlsbase->def_regular = 1;
14201 tlsbase->other = STV_HIDDEN;
14202 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
0855e32b
NS		 14203 }
14204 }
14205 return TRUE;
14206}
14207
252b5132
RH		 14208/* Finish up dynamic symbol handling. We set the contents of various
14209 dynamic sections here. */
14210
b34976b6 14211static bfd_boolean
906e58ca
NC		 14212elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14213 struct bfd_link_info * info,
14214 struct elf_link_hash_entry * h,
14215 Elf_Internal_Sym * sym)
252b5132 14216{
e5a52504 14217 struct elf32_arm_link_hash_table *htab;
b7693d02 14218 struct elf32_arm_link_hash_entry *eh;
252b5132 14219
e5a52504 14220 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14221 if (htab == NULL)
14222 return FALSE;
14223
b7693d02 14224 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 14225
14226 if (h->plt.offset != (bfd_vma) -1)
14227 {
34e77a92 14228 if (!eh->is_iplt)
e5a52504 14229 {
34e77a92 14230 BFD_ASSERT (h->dynindx != -1);
57460bcf
NC		 14231 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14232 h->dynindx, 0))
14233 return FALSE;
e5a52504 14234 }
57e8b36a 14235
f5385ebf 14236 if (!h->def_regular)
252b5132
RH		 14237 {
14238 /* Mark the symbol as undefined, rather than as defined in
3a635617 14239 the .plt section. */
252b5132 14240 sym->st_shndx = SHN_UNDEF;
3a635617 14241 /* If the symbol is weak we need to clear the value.
d982ba73
PB		 14242 Otherwise, the PLT entry would provide a definition for
14243 the symbol even if the symbol wasn't defined anywhere,
3a635617
WN		 14244 and so the symbol would never be NULL. Leave the value if
14245 there were any relocations where pointer equality matters
14246 (this is a clue for the dynamic linker, to make function
14247 pointer comparisons work between an application and shared
14248 library). */
97323ad1 14249 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
d982ba73 14250 sym->st_value = 0;
252b5132 14251 }
34e77a92
RS		 14252 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14253 {
14254 /* At least one non-call relocation references this .iplt entry,
14255 so the .iplt entry is the function's canonical address. */
14256 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14257 sym->st_target_internal = ST_BRANCH_TO_ARM;
14258 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14259 (output_bfd, htab->root.iplt->output_section));
14260 sym->st_value = (h->plt.offset
14261 + htab->root.iplt->output_section->vma
14262 + htab->root.iplt->output_offset);
14263 }
252b5132
RH		 14264 }
14265
f5385ebf 14266 if (h->needs_copy)
252b5132
RH		 14267 {
14268 asection * s;
947216bf 14269 Elf_Internal_Rela rel;
252b5132
RH		 14270
14271 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 14272 BFD_ASSERT (h->dynindx != -1
14273 && (h->root.type == bfd_link_hash_defined
14274 || h->root.type == bfd_link_hash_defweak));
14275
362d30a1 14276 s = htab->srelbss;
252b5132
RH		 14277 BFD_ASSERT (s != NULL);
14278
00a97672 14279 rel.r_addend = 0;
252b5132
RH		 14280 rel.r_offset = (h->root.u.def.value
14281 + h->root.u.def.section->output_section->vma
14282 + h->root.u.def.section->output_offset);
14283 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 14284 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14285 }
14286
00a97672
RS		 14287 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14288 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14289 to the ".got" section. */
9637f6ef 14290 if (h == htab->root.hdynamic
00a97672 14291 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14292 sym->st_shndx = SHN_ABS;
14293
b34976b6 14294 return TRUE;
252b5132
RH		 14295}
14296
0855e32b
NS		 14297static void
14298arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14299 void *contents,
14300 const unsigned long *template, unsigned count)
14301{
14302 unsigned ix;
b38cadfb 14303
0855e32b
NS		 14304 for (ix = 0; ix != count; ix++)
14305 {
14306 unsigned long insn = template[ix];
14307
14308 /* Emit mov pc,rx if bx is not permitted. */
14309 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14310 insn = (insn & 0xf000000f) | 0x01a0f000;
14311 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14312 }
14313}
14314
99059e56
RM		 14315/* Install the special first PLT entry for elf32-arm-nacl. Unlike
14316 other variants, NaCl needs this entry in a static executable's
14317 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14318 zero. For .iplt really only the last bundle is useful, and .iplt
14319 could have a shorter first entry, with each individual PLT entry's
14320 relative branch calculated differently so it targets the last
14321 bundle instead of the instruction before it (labelled .Lplt_tail
14322 above). But it's simpler to keep the size and layout of PLT0
14323 consistent with the dynamic case, at the cost of some dead code at
14324 the start of .iplt and the one dead store to the stack at the start
14325 of .Lplt_tail. */
14326static void
14327arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14328 asection *plt, bfd_vma got_displacement)
14329{
14330 unsigned int i;
14331
14332 put_arm_insn (htab, output_bfd,
14333 elf32_arm_nacl_plt0_entry[0]
14334 | arm_movw_immediate (got_displacement),
14335 plt->contents + 0);
14336 put_arm_insn (htab, output_bfd,
14337 elf32_arm_nacl_plt0_entry[1]
14338 | arm_movt_immediate (got_displacement),
14339 plt->contents + 4);
14340
14341 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14342 put_arm_insn (htab, output_bfd,
14343 elf32_arm_nacl_plt0_entry[i],
14344 plt->contents + (i * 4));
14345}
14346
252b5132
RH		 14347/* Finish up the dynamic sections. */
14348
b34976b6 14349static bfd_boolean
57e8b36a 14350elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14351{
14352 bfd * dynobj;
14353 asection * sgot;
14354 asection * sdyn;
4dfe6ac6
NC		 14355 struct elf32_arm_link_hash_table *htab;
14356
14357 htab = elf32_arm_hash_table (info);
14358 if (htab == NULL)
14359 return FALSE;
252b5132
RH		 14360
14361 dynobj = elf_hash_table (info)->dynobj;
14362
362d30a1 14363 sgot = htab->root.sgotplt;
894891db
NC		 14364 /* A broken linker script might have discarded the dynamic sections.
14365 Catch this here so that we do not seg-fault later on. */
14366 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14367 return FALSE;
3d4d4302 14368 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14369
14370 if (elf_hash_table (info)->dynamic_sections_created)
14371 {
14372 asection *splt;
14373 Elf32_External_Dyn *dyncon, *dynconend;
14374
362d30a1 14375 splt = htab->root.splt;
24a1ba0f 14376 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14377 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14378
14379 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14380 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14381
252b5132
RH		 14382 for (; dyncon < dynconend; dyncon++)
14383 {
14384 Elf_Internal_Dyn dyn;
14385 const char * name;
14386 asection * s;
14387
14388 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14389
14390 switch (dyn.d_tag)
14391 {
229fcec5
MM		 14392 unsigned int type;
14393
252b5132 14394 default:
7a2b07ff
NS		 14395 if (htab->vxworks_p
14396 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14397 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14398 break;
14399
229fcec5
MM		 14400 case DT_HASH:
14401 name = ".hash";
14402 goto get_vma_if_bpabi;
14403 case DT_STRTAB:
14404 name = ".dynstr";
14405 goto get_vma_if_bpabi;
14406 case DT_SYMTAB:
14407 name = ".dynsym";
14408 goto get_vma_if_bpabi;
c0042f5d
MM		 14409 case DT_VERSYM:
14410 name = ".gnu.version";
14411 goto get_vma_if_bpabi;
14412 case DT_VERDEF:
14413 name = ".gnu.version_d";
14414 goto get_vma_if_bpabi;
14415 case DT_VERNEED:
14416 name = ".gnu.version_r";
14417 goto get_vma_if_bpabi;
14418
252b5132
RH		 14419 case DT_PLTGOT:
14420 name = ".got";
14421 goto get_vma;
14422 case DT_JMPREL:
00a97672 14423 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14424 get_vma:
14425 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14426 if (s == NULL)
14427 {
14428 /* PR ld/14397: Issue an error message if a required section is missing. */
14429 (*_bfd_error_handler)
14430 (_("error: required section '%s' not found in the linker script"), name);
14431 bfd_set_error (bfd_error_invalid_operation);
14432 return FALSE;
14433 }
229fcec5
MM		 14434 if (!htab->symbian_p)
14435 dyn.d_un.d_ptr = s->vma;
14436 else
14437 /* In the BPABI, tags in the PT_DYNAMIC section point
14438 at the file offset, not the memory address, for the
14439 convenience of the post linker. */
14440 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14441 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14442 break;
14443
229fcec5
MM		 14444 get_vma_if_bpabi:
14445 if (htab->symbian_p)
14446 goto get_vma;
14447 break;
14448
252b5132 14449 case DT_PLTRELSZ:
362d30a1 14450 s = htab->root.srelplt;
252b5132 14451 BFD_ASSERT (s != NULL);
eea6121a 14452 dyn.d_un.d_val = s->size;
252b5132
RH		 14453 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14454 break;
906e58ca 14455
252b5132 14456 case DT_RELSZ:
00a97672 14457 case DT_RELASZ:
229fcec5
MM		 14458 if (!htab->symbian_p)
14459 {
14460 /* My reading of the SVR4 ABI indicates that the
14461 procedure linkage table relocs (DT_JMPREL) should be
14462 included in the overall relocs (DT_REL). This is
14463 what Solaris does. However, UnixWare can not handle
14464 that case. Therefore, we override the DT_RELSZ entry
14465 here to make it not include the JMPREL relocs. Since
00a97672 14466 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14467 other relocation sections, we don't have to worry
14468 about changing the DT_REL entry. */
362d30a1 14469 s = htab->root.srelplt;
229fcec5
MM		 14470 if (s != NULL)
14471 dyn.d_un.d_val -= s->size;
14472 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14473 break;
14474 }
8029a119 14475 /* Fall through. */
229fcec5
MM		 14476
14477 case DT_REL:
14478 case DT_RELA:
229fcec5
MM		 14479 /* In the BPABI, the DT_REL tag must point at the file
14480 offset, not the VMA, of the first relocation
14481 section. So, we use code similar to that in
14482 elflink.c, but do not check for SHF_ALLOC on the
14483 relcoation section, since relocations sections are
14484 never allocated under the BPABI. The comments above
14485 about Unixware notwithstanding, we include all of the
14486 relocations here. */
14487 if (htab->symbian_p)
14488 {
14489 unsigned int i;
14490 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14491 ? SHT_REL : SHT_RELA);
14492 dyn.d_un.d_val = 0;
14493 for (i = 1; i < elf_numsections (output_bfd); i++)
14494 {
906e58ca 14495 Elf_Internal_Shdr *hdr
229fcec5
MM		 14496 = elf_elfsections (output_bfd)[i];
14497 if (hdr->sh_type == type)
14498 {
906e58ca 14499 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14500 || dyn.d_tag == DT_RELASZ)
14501 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14502 else if ((ufile_ptr) hdr->sh_offset
14503 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14504 dyn.d_un.d_val = hdr->sh_offset;
14505 }
14506 }
14507 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14508 }
252b5132 14509 break;
88f7bcd5 14510
0855e32b 14511 case DT_TLSDESC_PLT:
99059e56 14512 s = htab->root.splt;
0855e32b
NS		 14513 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14514 + htab->dt_tlsdesc_plt);
14515 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14516 break;
14517
14518 case DT_TLSDESC_GOT:
99059e56 14519 s = htab->root.sgot;
0855e32b 14520 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
99059e56 14521 + htab->dt_tlsdesc_got);
0855e32b
NS		 14522 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14523 break;
14524
88f7bcd5
NC		 14525 /* Set the bottom bit of DT_INIT/FINI if the
14526 corresponding function is Thumb. */
14527 case DT_INIT:
14528 name = info->init_function;
14529 goto get_sym;
14530 case DT_FINI:
14531 name = info->fini_function;
14532 get_sym:
14533 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14534 then there is nothing to adjust. */
88f7bcd5
NC		 14535 if (dyn.d_un.d_val != 0)
14536 {
14537 struct elf_link_hash_entry * eh;
14538
14539 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14540 FALSE, FALSE, TRUE);
35fc36a8 14541 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14542 {
14543 dyn.d_un.d_val |= 1;
b34976b6 14544 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14545 }
14546 }
14547 break;
252b5132
RH		 14548 }
14549 }
14550
24a1ba0f 14551 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14552 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14553 {
00a97672
RS		 14554 const bfd_vma *plt0_entry;
14555 bfd_vma got_address, plt_address, got_displacement;
14556
14557 /* Calculate the addresses of the GOT and PLT. */
14558 got_address = sgot->output_section->vma + sgot->output_offset;
14559 plt_address = splt->output_section->vma + splt->output_offset;
14560
14561 if (htab->vxworks_p)
14562 {
14563 /* The VxWorks GOT is relocated by the dynamic linker.
14564 Therefore, we must emit relocations rather than simply
14565 computing the values now. */
14566 Elf_Internal_Rela rel;
14567
14568 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14569 put_arm_insn (htab, output_bfd, plt0_entry[0],
14570 splt->contents + 0);
14571 put_arm_insn (htab, output_bfd, plt0_entry[1],
14572 splt->contents + 4);
14573 put_arm_insn (htab, output_bfd, plt0_entry[2],
14574 splt->contents + 8);
00a97672
RS		 14575 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14576
8029a119 14577 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14578 rel.r_offset = plt_address + 12;
14579 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14580 rel.r_addend = 0;
14581 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14582 htab->srelplt2->contents);
14583 }
b38cadfb 14584 else if (htab->nacl_p)
99059e56
RM		 14585 arm_nacl_put_plt0 (htab, output_bfd, splt,
14586 got_address + 8 - (plt_address + 16));
eed94f8f
NC		 14587 else if (using_thumb_only (htab))
14588 {
14589 got_displacement = got_address - (plt_address + 12);
14590
14591 plt0_entry = elf32_thumb2_plt0_entry;
14592 put_arm_insn (htab, output_bfd, plt0_entry[0],
14593 splt->contents + 0);
14594 put_arm_insn (htab, output_bfd, plt0_entry[1],
14595 splt->contents + 4);
14596 put_arm_insn (htab, output_bfd, plt0_entry[2],
14597 splt->contents + 8);
14598
14599 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
14600 }
00a97672
RS		 14601 else
14602 {
14603 got_displacement = got_address - (plt_address + 16);
14604
14605 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14606 put_arm_insn (htab, output_bfd, plt0_entry[0],
14607 splt->contents + 0);
14608 put_arm_insn (htab, output_bfd, plt0_entry[1],
14609 splt->contents + 4);
14610 put_arm_insn (htab, output_bfd, plt0_entry[2],
14611 splt->contents + 8);
14612 put_arm_insn (htab, output_bfd, plt0_entry[3],
14613 splt->contents + 12);
5e681ec4 14614
5e681ec4 14615#ifdef FOUR_WORD_PLT
00a97672
RS		 14616 /* The displacement value goes in the otherwise-unused
14617 last word of the second entry. */
14618 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14619#else
00a97672 14620 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14621#endif
00a97672 14622 }
f7a74f8c 14623 }
252b5132
RH		 14624
14625 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14626 really seem like the right value. */
74541ad4
AM		 14627 if (splt->output_section->owner == output_bfd)
14628 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14629
0855e32b
NS		 14630 if (htab->dt_tlsdesc_plt)
14631 {
14632 bfd_vma got_address
14633 = sgot->output_section->vma + sgot->output_offset;
14634 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14635 + htab->root.sgot->output_offset);
14636 bfd_vma plt_address
14637 = splt->output_section->vma + splt->output_offset;
14638
b38cadfb 14639 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14640 splt->contents + htab->dt_tlsdesc_plt,
14641 dl_tlsdesc_lazy_trampoline, 6);
14642
14643 bfd_put_32 (output_bfd,
14644 gotplt_address + htab->dt_tlsdesc_got
14645 - (plt_address + htab->dt_tlsdesc_plt)
14646 - dl_tlsdesc_lazy_trampoline[6],
14647 splt->contents + htab->dt_tlsdesc_plt + 24);
14648 bfd_put_32 (output_bfd,
14649 got_address - (plt_address + htab->dt_tlsdesc_plt)
14650 - dl_tlsdesc_lazy_trampoline[7],
14651 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14652 }
14653
14654 if (htab->tls_trampoline)
14655 {
b38cadfb 14656 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14657 splt->contents + htab->tls_trampoline,
14658 tls_trampoline, 3);
14659#ifdef FOUR_WORD_PLT
14660 bfd_put_32 (output_bfd, 0x00000000,
14661 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14662#endif
0855e32b
NS		 14663 }
14664
0e1862bb
L		 14665 if (htab->vxworks_p
14666 && !bfd_link_pic (info)
14667 && htab->root.splt->size > 0)
00a97672
RS		 14668 {
14669 /* Correct the .rel(a).plt.unloaded relocations. They will have
14670 incorrect symbol indexes. */
14671 int num_plts;
eed62c48 14672 unsigned char *p;
00a97672 14673
362d30a1 14674 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14675 / htab->plt_entry_size);
14676 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14677
14678 for (; num_plts; num_plts--)
14679 {
14680 Elf_Internal_Rela rel;
14681
14682 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14683 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14684 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14685 p += RELOC_SIZE (htab);
14686
14687 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14688 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14689 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14690 p += RELOC_SIZE (htab);
14691 }
14692 }
252b5132
RH		 14693 }
14694
99059e56
RM		 14695 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14696 /* NaCl uses a special first entry in .iplt too. */
14697 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14698
252b5132 14699 /* Fill in the first three entries in the global offset table. */
229fcec5 14700 if (sgot)
252b5132 14701 {
229fcec5
MM		 14702 if (sgot->size > 0)
14703 {
14704 if (sdyn == NULL)
14705 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14706 else
14707 bfd_put_32 (output_bfd,
14708 sdyn->output_section->vma + sdyn->output_offset,
14709 sgot->contents);
14710 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14711 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14712 }
252b5132 14713
229fcec5
MM		 14714 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14715 }
252b5132 14716
b34976b6 14717 return TRUE;
252b5132
RH		 14718}
14719
ba96a88f 14720static void
57e8b36a 14721elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14722{
9b485d32 14723 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14724 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14725
14726 i_ehdrp = elf_elfheader (abfd);
14727
94a3258f
PB		 14728 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14729 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14730 else
7394f108 14731 _bfd_elf_post_process_headers (abfd, link_info);
ba96a88f 14732 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14733
93204d3a
PB		 14734 if (link_info)
14735 {
14736 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14737 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14738 i_ehdrp->e_flags |= EF_ARM_BE8;
14739 }
3bfcb652
NC		 14740
14741 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14742 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14743 {
14744 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
5c294fee 14745 if (abi == AEABI_VFP_args_vfp)
3bfcb652
NC		 14746 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14747 else
14748 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14749 }
ba96a88f
NC		 14750}
14751
99e4ae17 14752static enum elf_reloc_type_class
7e612e98
AM		 14753elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14754 const asection *rel_sec ATTRIBUTE_UNUSED,
14755 const Elf_Internal_Rela *rela)
99e4ae17 14756{
f51e552e 14757 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14758 {
14759 case R_ARM_RELATIVE:
14760 return reloc_class_relative;
14761 case R_ARM_JUMP_SLOT:
14762 return reloc_class_plt;
14763 case R_ARM_COPY:
14764 return reloc_class_copy;
14765 default:
14766 return reloc_class_normal;
14767 }
14768}
14769
e489d0ae 14770static void
57e8b36a 14771elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14772{
5a6c6817 14773 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14774}
14775
40a18ebd
NC		 14776/* Return TRUE if this is an unwinding table entry. */
14777
14778static bfd_boolean
14779is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14780{
0112cd26
NC		 14781 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14782 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14783}
14784
14785
14786/* Set the type and flags for an ARM section. We do this by
14787 the section name, which is a hack, but ought to work. */
14788
14789static bfd_boolean
14790elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14791{
14792 const char * name;
14793
14794 name = bfd_get_section_name (abfd, sec);
14795
14796 if (is_arm_elf_unwind_section_name (abfd, name))
14797 {
14798 hdr->sh_type = SHT_ARM_EXIDX;
14799 hdr->sh_flags |= SHF_LINK_ORDER;
14800 }
14801 return TRUE;
14802}
14803
6dc132d9
L		 14804/* Handle an ARM specific section when reading an object file. This is
14805 called when bfd_section_from_shdr finds a section with an unknown
14806 type. */
40a18ebd
NC		 14807
14808static bfd_boolean
14809elf32_arm_section_from_shdr (bfd *abfd,
14810 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14811 const char *name,
14812 int shindex)
40a18ebd
NC		 14813{
14814 /* There ought to be a place to keep ELF backend specific flags, but
14815 at the moment there isn't one. We just keep track of the
14816 sections by their name, instead. Fortunately, the ABI gives
14817 names for all the ARM specific sections, so we will probably get
14818 away with this. */
14819 switch (hdr->sh_type)
14820 {
14821 case SHT_ARM_EXIDX:
0951f019
RE		 14822 case SHT_ARM_PREEMPTMAP:
14823 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14824 break;
14825
14826 default:
14827 return FALSE;
14828 }
14829
6dc132d9 14830 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14831 return FALSE;
14832
14833 return TRUE;
14834}
e489d0ae 14835
44444f50
NC		 14836static _arm_elf_section_data *
14837get_arm_elf_section_data (asection * sec)
14838{
47b2e99c
JZ		 14839 if (sec && sec->owner && is_arm_elf (sec->owner))
14840 return elf32_arm_section_data (sec);
44444f50
NC		 14841 else
14842 return NULL;
8e3de13a
NC		 14843}
14844
4e617b1e
PB		 14845typedef struct
14846{
57402f1e 14847 void *flaginfo;
4e617b1e 14848 struct bfd_link_info *info;
91a5743d
PB		 14849 asection *sec;
14850 int sec_shndx;
6e0b88f1
AM		 14851 int (*func) (void *, const char *, Elf_Internal_Sym *,
14852 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14853} output_arch_syminfo;
14854
14855enum map_symbol_type
14856{
14857 ARM_MAP_ARM,
14858 ARM_MAP_THUMB,
14859 ARM_MAP_DATA
14860};
14861
14862
7413f23f 14863/* Output a single mapping symbol. */
4e617b1e
PB		 14864
14865static bfd_boolean
7413f23f
DJ		 14866elf32_arm_output_map_sym (output_arch_syminfo *osi,
14867 enum map_symbol_type type,
14868 bfd_vma offset)
4e617b1e
PB		 14869{
14870 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14871 Elf_Internal_Sym sym;
14872
91a5743d
PB		 14873 sym.st_value = osi->sec->output_section->vma
14874 + osi->sec->output_offset
14875 + offset;
4e617b1e
PB		 14876 sym.st_size = 0;
14877 sym.st_other = 0;
14878 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14879 sym.st_shndx = osi->sec_shndx;
35fc36a8 14880 sym.st_target_internal = 0;
fe33d2fa 14881 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14882 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14883}
14884
34e77a92
RS		 14885/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14886 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14887
14888static bfd_boolean
34e77a92
RS		 14889elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14890 bfd_boolean is_iplt_entry_p,
14891 union gotplt_union *root_plt,
14892 struct arm_plt_info *arm_plt)
4e617b1e 14893{
4e617b1e 14894 struct elf32_arm_link_hash_table *htab;
34e77a92 14895 bfd_vma addr, plt_header_size;
4e617b1e 14896
34e77a92 14897 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14898 return TRUE;
14899
4dfe6ac6
NC		 14900 htab = elf32_arm_hash_table (osi->info);
14901 if (htab == NULL)
14902 return FALSE;
14903
34e77a92
RS		 14904 if (is_iplt_entry_p)
14905 {
14906 osi->sec = htab->root.iplt;
14907 plt_header_size = 0;
14908 }
14909 else
14910 {
14911 osi->sec = htab->root.splt;
14912 plt_header_size = htab->plt_header_size;
14913 }
14914 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14915 (osi->info->output_bfd, osi->sec->output_section));
14916
14917 addr = root_plt->offset & -2;
4e617b1e
PB		 14918 if (htab->symbian_p)
14919 {
7413f23f 14920 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14921 return FALSE;
7413f23f 14922 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14923 return FALSE;
14924 }
14925 else if (htab->vxworks_p)
14926 {
7413f23f 14927 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14928 return FALSE;
7413f23f 14929 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14930 return FALSE;
7413f23f 14931 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14932 return FALSE;
7413f23f 14933 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14934 return FALSE;
14935 }
b38cadfb
NC		 14936 else if (htab->nacl_p)
14937 {
14938 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14939 return FALSE;
14940 }
eed94f8f
NC		 14941 else if (using_thumb_only (htab))
14942 {
14943 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
14944 return FALSE;
6a631e86 14945 }
4e617b1e
PB		 14946 else
14947 {
34e77a92 14948 bfd_boolean thumb_stub_p;
bd97cb95 14949
34e77a92
RS		 14950 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14951 if (thumb_stub_p)
4e617b1e 14952 {
7413f23f 14953 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14954 return FALSE;
14955 }
14956#ifdef FOUR_WORD_PLT
7413f23f 14957 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14958 return FALSE;
7413f23f 14959 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14960 return FALSE;
14961#else
906e58ca 14962 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14963 so only need to output a mapping symbol for the first PLT entry and
14964 entries with thumb thunks. */
34e77a92 14965 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14966 {
7413f23f 14967 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14968 return FALSE;
14969 }
14970#endif
14971 }
14972
14973 return TRUE;
14974}
14975
34e77a92
RS		 14976/* Output mapping symbols for PLT entries associated with H. */
14977
14978static bfd_boolean
14979elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14980{
14981 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14982 struct elf32_arm_link_hash_entry *eh;
14983
14984 if (h->root.type == bfd_link_hash_indirect)
14985 return TRUE;
14986
14987 if (h->root.type == bfd_link_hash_warning)
14988 /* When warning symbols are created, they **replace** the "real"
14989 entry in the hash table, thus we never get to see the real
14990 symbol in a hash traversal. So look at it now. */
14991 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14992
14993 eh = (struct elf32_arm_link_hash_entry *) h;
14994 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14995 &h->plt, &eh->plt);
14996}
14997
7413f23f
DJ		 14998/* Output a single local symbol for a generated stub. */
14999
15000static bfd_boolean
15001elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
15002 bfd_vma offset, bfd_vma size)
15003{
7413f23f
DJ		 15004 Elf_Internal_Sym sym;
15005
7413f23f
DJ		 15006 sym.st_value = osi->sec->output_section->vma
15007 + osi->sec->output_offset
15008 + offset;
15009 sym.st_size = size;
15010 sym.st_other = 0;
15011 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15012 sym.st_shndx = osi->sec_shndx;
35fc36a8 15013 sym.st_target_internal = 0;
57402f1e 15014 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 15015}
4e617b1e 15016
da5938a2 15017static bfd_boolean
8029a119
NC		 15018arm_map_one_stub (struct bfd_hash_entry * gen_entry,
15019 void * in_arg)
da5938a2
NC		 15020{
15021 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 15022 asection *stub_sec;
15023 bfd_vma addr;
7413f23f 15024 char *stub_name;
9a008db3 15025 output_arch_syminfo *osi;
d3ce72d0 15026 const insn_sequence *template_sequence;
461a49ca
DJ		 15027 enum stub_insn_type prev_type;
15028 int size;
15029 int i;
15030 enum map_symbol_type sym_type;
da5938a2
NC		 15031
15032 /* Massage our args to the form they really have. */
15033 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 15034 osi = (output_arch_syminfo *) in_arg;
da5938a2 15035
da5938a2
NC		 15036 stub_sec = stub_entry->stub_sec;
15037
15038 /* Ensure this stub is attached to the current section being
7413f23f 15039 processed. */
da5938a2
NC		 15040 if (stub_sec != osi->sec)
15041 return TRUE;
15042
7413f23f
DJ		 15043 addr = (bfd_vma) stub_entry->stub_offset;
15044 stub_name = stub_entry->output_name;
da5938a2 15045
d3ce72d0
NC		 15046 template_sequence = stub_entry->stub_template;
15047 switch (template_sequence[0].type)
7413f23f 15048 {
461a49ca
DJ		 15049 case ARM_TYPE:
15050 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 15051 return FALSE;
15052 break;
461a49ca 15053 case THUMB16_TYPE:
48229727 15054 case THUMB32_TYPE:
461a49ca
DJ		 15055 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
15056 stub_entry->stub_size))
da5938a2
NC		 15057 return FALSE;
15058 break;
15059 default:
15060 BFD_FAIL ();
48229727 15061 return 0;
7413f23f 15062 }
da5938a2 15063
461a49ca
DJ		 15064 prev_type = DATA_TYPE;
15065 size = 0;
15066 for (i = 0; i < stub_entry->stub_template_size; i++)
15067 {
d3ce72d0 15068 switch (template_sequence[i].type)
461a49ca
DJ		 15069 {
15070 case ARM_TYPE:
15071 sym_type = ARM_MAP_ARM;
15072 break;
15073
15074 case THUMB16_TYPE:
48229727 15075 case THUMB32_TYPE:
461a49ca
DJ		 15076 sym_type = ARM_MAP_THUMB;
15077 break;
15078
15079 case DATA_TYPE:
15080 sym_type = ARM_MAP_DATA;
15081 break;
15082
15083 default:
15084 BFD_FAIL ();
4e31c731 15085 return FALSE;
461a49ca
DJ		 15086 }
15087
d3ce72d0 15088 if (template_sequence[i].type != prev_type)
461a49ca 15089 {
d3ce72d0 15090 prev_type = template_sequence[i].type;
461a49ca
DJ		 15091 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15092 return FALSE;
15093 }
15094
d3ce72d0 15095 switch (template_sequence[i].type)
461a49ca
DJ		 15096 {
15097 case ARM_TYPE:
48229727 15098 case THUMB32_TYPE:
461a49ca
DJ		 15099 size += 4;
15100 break;
15101
15102 case THUMB16_TYPE:
15103 size += 2;
15104 break;
15105
15106 case DATA_TYPE:
15107 size += 4;
15108 break;
15109
15110 default:
15111 BFD_FAIL ();
4e31c731 15112 return FALSE;
461a49ca
DJ		 15113 }
15114 }
15115
da5938a2
NC		 15116 return TRUE;
15117}
15118
33811162
DG		 15119/* Output mapping symbols for linker generated sections,
15120 and for those data-only sections that do not have a
15121 $d. */
4e617b1e
PB		 15122
15123static bfd_boolean
15124elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 15125 struct bfd_link_info *info,
57402f1e 15126 void *flaginfo,
6e0b88f1
AM		 15127 int (*func) (void *, const char *,
15128 Elf_Internal_Sym *,
15129 asection *,
15130 struct elf_link_hash_entry *))
4e617b1e
PB		 15131{
15132 output_arch_syminfo osi;
15133 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 15134 bfd_vma offset;
15135 bfd_size_type size;
33811162 15136 bfd *input_bfd;
4e617b1e
PB		 15137
15138 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 15139 if (htab == NULL)
15140 return FALSE;
15141
906e58ca 15142 check_use_blx (htab);
91a5743d 15143
57402f1e 15144 osi.flaginfo = flaginfo;
4e617b1e
PB		 15145 osi.info = info;
15146 osi.func = func;
906e58ca 15147
33811162
DG		 15148 /* Add a $d mapping symbol to data-only sections that
15149 don't have any mapping symbol. This may result in (harmless) redundant
15150 mapping symbols. */
15151 for (input_bfd = info->input_bfds;
15152 input_bfd != NULL;
c72f2fb2 15153 input_bfd = input_bfd->link.next)
33811162
DG		 15154 {
15155 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
15156 for (osi.sec = input_bfd->sections;
15157 osi.sec != NULL;
15158 osi.sec = osi.sec->next)
15159 {
15160 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 15161 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
15162 != 0)
33811162
DG		 15163 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
15164 == SEC_HAS_CONTENTS
15165 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 15166 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 15167 && osi.sec->size > 0
15168 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 15169 {
15170 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15171 (output_bfd, osi.sec->output_section);
15172 if (osi.sec_shndx != (int)SHN_BAD)
15173 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
15174 }
15175 }
15176 }
15177
91a5743d
PB		 15178 /* ARM->Thumb glue. */
15179 if (htab->arm_glue_size > 0)
15180 {
3d4d4302
AM		 15181 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15182 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 15183
15184 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15185 (output_bfd, osi.sec->output_section);
0e1862bb 15186 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
91a5743d
PB		 15187 || htab->pic_veneer)
15188 size = ARM2THUMB_PIC_GLUE_SIZE;
15189 else if (htab->use_blx)
15190 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15191 else
15192 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 15193
91a5743d
PB		 15194 for (offset = 0; offset < htab->arm_glue_size; offset += size)
15195 {
7413f23f
DJ		 15196 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
15197 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 15198 }
15199 }
15200
15201 /* Thumb->ARM glue. */
15202 if (htab->thumb_glue_size > 0)
15203 {
3d4d4302
AM		 15204 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15205 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 15206
15207 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15208 (output_bfd, osi.sec->output_section);
15209 size = THUMB2ARM_GLUE_SIZE;
15210
15211 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
15212 {
7413f23f
DJ		 15213 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
15214 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 15215 }
15216 }
15217
845b51d6
PB		 15218 /* ARMv4 BX veneers. */
15219 if (htab->bx_glue_size > 0)
15220 {
3d4d4302
AM		 15221 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15222 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 15223
15224 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15225 (output_bfd, osi.sec->output_section);
15226
7413f23f 15227 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 15228 }
15229
8029a119
NC		 15230 /* Long calls stubs. */
15231 if (htab->stub_bfd && htab->stub_bfd->sections)
15232 {
da5938a2 15233 asection* stub_sec;
8029a119 15234
da5938a2
NC		 15235 for (stub_sec = htab->stub_bfd->sections;
15236 stub_sec != NULL;
8029a119
NC		 15237 stub_sec = stub_sec->next)
15238 {
15239 /* Ignore non-stub sections. */
15240 if (!strstr (stub_sec->name, STUB_SUFFIX))
15241 continue;
da5938a2 15242
8029a119 15243 osi.sec = stub_sec;
da5938a2 15244
8029a119
NC		 15245 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15246 (output_bfd, osi.sec->output_section);
da5938a2 15247
8029a119
NC		 15248 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15249 }
15250 }
da5938a2 15251
91a5743d 15252 /* Finally, output mapping symbols for the PLT. */
34e77a92 15253 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 15254 {
34e77a92
RS		 15255 osi.sec = htab->root.splt;
15256 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15257 (output_bfd, osi.sec->output_section));
15258
15259 /* Output mapping symbols for the plt header. SymbianOS does not have a
15260 plt header. */
15261 if (htab->vxworks_p)
15262 {
15263 /* VxWorks shared libraries have no PLT header. */
0e1862bb 15264 if (!bfd_link_pic (info))
34e77a92
RS		 15265 {
15266 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15267 return FALSE;
15268 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15269 return FALSE;
15270 }
15271 }
b38cadfb
NC		 15272 else if (htab->nacl_p)
15273 {
15274 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15275 return FALSE;
15276 }
eed94f8f
NC		 15277 else if (using_thumb_only (htab))
15278 {
15279 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
15280 return FALSE;
15281 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15282 return FALSE;
15283 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
15284 return FALSE;
15285 }
34e77a92 15286 else if (!htab->symbian_p)
4e617b1e 15287 {
7413f23f 15288 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 15289 return FALSE;
34e77a92
RS		 15290#ifndef FOUR_WORD_PLT
15291 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 15292 return FALSE;
34e77a92 15293#endif
4e617b1e
PB		 15294 }
15295 }
99059e56
RM		 15296 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15297 {
15298 /* NaCl uses a special first entry in .iplt too. */
15299 osi.sec = htab->root.iplt;
15300 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15301 (output_bfd, osi.sec->output_section));
15302 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15303 return FALSE;
15304 }
34e77a92
RS		 15305 if ((htab->root.splt && htab->root.splt->size > 0)
15306 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 15307 {
34e77a92
RS		 15308 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15309 for (input_bfd = info->input_bfds;
15310 input_bfd != NULL;
c72f2fb2 15311 input_bfd = input_bfd->link.next)
34e77a92
RS		 15312 {
15313 struct arm_local_iplt_info **local_iplt;
15314 unsigned int i, num_syms;
4e617b1e 15315
34e77a92
RS		 15316 local_iplt = elf32_arm_local_iplt (input_bfd);
15317 if (local_iplt != NULL)
15318 {
15319 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15320 for (i = 0; i < num_syms; i++)
15321 if (local_iplt[i] != NULL
15322 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15323 &local_iplt[i]->root,
15324 &local_iplt[i]->arm))
15325 return FALSE;
15326 }
15327 }
15328 }
0855e32b
NS		 15329 if (htab->dt_tlsdesc_plt != 0)
15330 {
15331 /* Mapping symbols for the lazy tls trampoline. */
15332 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15333 return FALSE;
b38cadfb 15334
0855e32b
NS		 15335 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15336 htab->dt_tlsdesc_plt + 24))
15337 return FALSE;
15338 }
15339 if (htab->tls_trampoline != 0)
15340 {
15341 /* Mapping symbols for the tls trampoline. */
15342 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15343 return FALSE;
15344#ifdef FOUR_WORD_PLT
15345 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15346 htab->tls_trampoline + 12))
15347 return FALSE;
b38cadfb 15348#endif
0855e32b 15349 }
b38cadfb 15350
4e617b1e
PB		 15351 return TRUE;
15352}
15353
e489d0ae
PB		 15354/* Allocate target specific section data. */
15355
15356static bfd_boolean
15357elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15358{
f592407e
AM		 15359 if (!sec->used_by_bfd)
15360 {
15361 _arm_elf_section_data *sdata;
15362 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15363
21d799b5 15364 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15365 if (sdata == NULL)
15366 return FALSE;
15367 sec->used_by_bfd = sdata;
15368 }
e489d0ae
PB		 15369
15370 return _bfd_elf_new_section_hook (abfd, sec);
15371}
15372
15373
15374/* Used to order a list of mapping symbols by address. */
15375
15376static int
15377elf32_arm_compare_mapping (const void * a, const void * b)
15378{
7f6a71ff
JM		 15379 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15380 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15381
15382 if (amap->vma > bmap->vma)
15383 return 1;
15384 else if (amap->vma < bmap->vma)
15385 return -1;
15386 else if (amap->type > bmap->type)
15387 /* Ensure results do not depend on the host qsort for objects with
15388 multiple mapping symbols at the same address by sorting on type
15389 after vma. */
15390 return 1;
15391 else if (amap->type < bmap->type)
15392 return -1;
15393 else
15394 return 0;
e489d0ae
PB		 15395}
15396
2468f9c9
PB		 15397/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15398
15399static unsigned long
15400offset_prel31 (unsigned long addr, bfd_vma offset)
15401{
15402 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15403}
15404
15405/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15406 relocations. */
15407
15408static void
15409copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15410{
15411 unsigned long first_word = bfd_get_32 (output_bfd, from);
15412 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15413
2468f9c9
PB		 15414 /* High bit of first word is supposed to be zero. */
15415 if ((first_word & 0x80000000ul) == 0)
15416 first_word = offset_prel31 (first_word, offset);
b38cadfb 15417
2468f9c9
PB		 15418 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15419 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15420 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15421 second_word = offset_prel31 (second_word, offset);
b38cadfb 15422
2468f9c9
PB		 15423 bfd_put_32 (output_bfd, first_word, to);
15424 bfd_put_32 (output_bfd, second_word, to + 4);
15425}
e489d0ae 15426
48229727
JB		 15427/* Data for make_branch_to_a8_stub(). */
15428
b38cadfb
NC		 15429struct a8_branch_to_stub_data
15430{
48229727
JB		 15431 asection *writing_section;
15432 bfd_byte *contents;
15433};
15434
15435
15436/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15437 places for a particular section. */
15438
15439static bfd_boolean
15440make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
99059e56 15441 void *in_arg)
48229727
JB		 15442{
15443 struct elf32_arm_stub_hash_entry *stub_entry;
15444 struct a8_branch_to_stub_data *data;
15445 bfd_byte *contents;
15446 unsigned long branch_insn;
15447 bfd_vma veneered_insn_loc, veneer_entry_loc;
15448 bfd_signed_vma branch_offset;
15449 bfd *abfd;
91d6fa6a 15450 unsigned int target;
48229727
JB		 15451
15452 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15453 data = (struct a8_branch_to_stub_data *) in_arg;
15454
15455 if (stub_entry->target_section != data->writing_section
4563a860 15456 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15457 return TRUE;
15458
15459 contents = data->contents;
15460
15461 veneered_insn_loc = stub_entry->target_section->output_section->vma
15462 + stub_entry->target_section->output_offset
15463 + stub_entry->target_value;
15464
15465 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15466 + stub_entry->stub_sec->output_offset
15467 + stub_entry->stub_offset;
15468
15469 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15470 veneered_insn_loc &= ~3u;
15471
15472 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15473
15474 abfd = stub_entry->target_section->owner;
91d6fa6a 15475 target = stub_entry->target_value;
48229727
JB		 15476
15477 /* We attempt to avoid this condition by setting stubs_always_after_branch
15478 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15479 This check is just to be on the safe side... */
15480 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15481 {
15482 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15483 "allocated in unsafe location"), abfd);
15484 return FALSE;
15485 }
15486
15487 switch (stub_entry->stub_type)
15488 {
15489 case arm_stub_a8_veneer_b:
15490 case arm_stub_a8_veneer_b_cond:
15491 branch_insn = 0xf0009000;
15492 goto jump24;
15493
15494 case arm_stub_a8_veneer_blx:
15495 branch_insn = 0xf000e800;
15496 goto jump24;
15497
15498 case arm_stub_a8_veneer_bl:
15499 {
15500 unsigned int i1, j1, i2, j2, s;
15501
15502 branch_insn = 0xf000d000;
15503
15504 jump24:
15505 if (branch_offset < -16777216 || branch_offset > 16777214)
15506 {
15507 /* There's not much we can do apart from complain if this
15508 happens. */
15509 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15510 "of range (input file too large)"), abfd);
15511 return FALSE;
15512 }
15513
15514 /* i1 = not(j1 eor s), so:
15515 not i1 = j1 eor s
15516 j1 = (not i1) eor s. */
15517
15518 branch_insn |= (branch_offset >> 1) & 0x7ff;
15519 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15520 i2 = (branch_offset >> 22) & 1;
15521 i1 = (branch_offset >> 23) & 1;
15522 s = (branch_offset >> 24) & 1;
15523 j1 = (!i1) ^ s;
15524 j2 = (!i2) ^ s;
15525 branch_insn |= j2 << 11;
15526 branch_insn |= j1 << 13;
15527 branch_insn |= s << 26;
15528 }
15529 break;
15530
15531 default:
15532 BFD_FAIL ();
15533 return FALSE;
15534 }
15535
91d6fa6a
NC		 15536 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15537 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15538
15539 return TRUE;
15540}
15541
e489d0ae
PB		 15542/* Do code byteswapping. Return FALSE afterwards so that the section is
15543 written out as normal. */
15544
15545static bfd_boolean
c7b8f16e 15546elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15547 struct bfd_link_info *link_info,
15548 asection *sec,
e489d0ae
PB		 15549 bfd_byte *contents)
15550{
48229727 15551 unsigned int mapcount, errcount;
8e3de13a 15552 _arm_elf_section_data *arm_data;
c7b8f16e 15553 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15554 elf32_arm_section_map *map;
c7b8f16e 15555 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15556 bfd_vma ptr;
15557 bfd_vma end;
c7b8f16e 15558 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15559 bfd_byte tmp;
48229727 15560 unsigned int i;
57e8b36a 15561
4dfe6ac6
NC		 15562 if (globals == NULL)
15563 return FALSE;
15564
8e3de13a
NC		 15565 /* If this section has not been allocated an _arm_elf_section_data
15566 structure then we cannot record anything. */
15567 arm_data = get_arm_elf_section_data (sec);
15568 if (arm_data == NULL)
15569 return FALSE;
15570
15571 mapcount = arm_data->mapcount;
15572 map = arm_data->map;
c7b8f16e
JB		 15573 errcount = arm_data->erratumcount;
15574
15575 if (errcount != 0)
15576 {
15577 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15578
15579 for (errnode = arm_data->erratumlist; errnode != 0;
99059e56
RM		 15580 errnode = errnode->next)
15581 {
15582 bfd_vma target = errnode->vma - offset;
15583
15584 switch (errnode->type)
15585 {
15586 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15587 {
15588 bfd_vma branch_to_veneer;
15589 /* Original condition code of instruction, plus bit mask for
15590 ARM B instruction. */
15591 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15592 | 0x0a000000;
c7b8f16e
JB		 15593
15594 /* The instruction is before the label. */
91d6fa6a 15595 target -= 4;
c7b8f16e
JB		 15596
15597 /* Above offset included in -4 below. */
15598 branch_to_veneer = errnode->u.b.veneer->vma
99059e56 15599 - errnode->vma - 4;
c7b8f16e
JB		 15600
15601 if ((signed) branch_to_veneer < -(1 << 25)
15602 || (signed) branch_to_veneer >= (1 << 25))
15603 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15604 "range"), output_bfd);
15605
99059e56
RM		 15606 insn |= (branch_to_veneer >> 2) & 0xffffff;
15607 contents[endianflip ^ target] = insn & 0xff;
15608 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15609 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15610 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15611 }
15612 break;
c7b8f16e
JB		 15613
15614 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 15615 {
15616 bfd_vma branch_from_veneer;
15617 unsigned int insn;
c7b8f16e 15618
99059e56
RM		 15619 /* Take size of veneer into account. */
15620 branch_from_veneer = errnode->u.v.branch->vma
15621 - errnode->vma - 12;
c7b8f16e
JB		 15622
15623 if ((signed) branch_from_veneer < -(1 << 25)
15624 || (signed) branch_from_veneer >= (1 << 25))
15625 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15626 "range"), output_bfd);
15627
99059e56
RM		 15628 /* Original instruction. */
15629 insn = errnode->u.v.branch->u.b.vfp_insn;
15630 contents[endianflip ^ target] = insn & 0xff;
15631 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15632 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15633 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15634
15635 /* Branch back to insn after original insn. */
15636 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15637 contents[endianflip ^ (target + 4)] = insn & 0xff;
15638 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15639 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15640 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15641 }
15642 break;
c7b8f16e 15643
99059e56
RM		 15644 default:
15645 abort ();
15646 }
15647 }
c7b8f16e 15648 }
e489d0ae 15649
2468f9c9
PB		 15650 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15651 {
15652 arm_unwind_table_edit *edit_node
99059e56 15653 = arm_data->u.exidx.unwind_edit_list;
2468f9c9 15654 /* Now, sec->size is the size of the section we will write. The original
99059e56 15655 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
2468f9c9
PB		 15656 markers) was sec->rawsize. (This isn't the case if we perform no
15657 edits, then rawsize will be zero and we should use size). */
21d799b5 15658 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15659 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15660 unsigned int in_index, out_index;
15661 bfd_vma add_to_offsets = 0;
15662
15663 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
99059e56 15664 {
2468f9c9
PB		 15665 if (edit_node)
15666 {
15667 unsigned int edit_index = edit_node->index;
b38cadfb 15668
2468f9c9 15669 if (in_index < edit_index && in_index * 8 < input_size)
99059e56 15670 {
2468f9c9
PB		 15671 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15672 contents + in_index * 8, add_to_offsets);
15673 out_index++;
15674 in_index++;
15675 }
15676 else if (in_index == edit_index
15677 || (in_index * 8 >= input_size
15678 && edit_index == UINT_MAX))
99059e56 15679 {
2468f9c9
PB		 15680 switch (edit_node->type)
15681 {
15682 case DELETE_EXIDX_ENTRY:
15683 in_index++;
15684 add_to_offsets += 8;
15685 break;
b38cadfb 15686
2468f9c9
PB		 15687 case INSERT_EXIDX_CANTUNWIND_AT_END:
15688 {
99059e56 15689 asection *text_sec = edit_node->linked_section;
2468f9c9
PB		 15690 bfd_vma text_offset = text_sec->output_section->vma
15691 + text_sec->output_offset
15692 + text_sec->size;
15693 bfd_vma exidx_offset = offset + out_index * 8;
99059e56 15694 unsigned long prel31_offset;
2468f9c9
PB		 15695
15696 /* Note: this is meant to be equivalent to an
15697 R_ARM_PREL31 relocation. These synthetic
15698 EXIDX_CANTUNWIND markers are not relocated by the
15699 usual BFD method. */
15700 prel31_offset = (text_offset - exidx_offset)
15701 & 0x7ffffffful;
15702
15703 /* First address we can't unwind. */
15704 bfd_put_32 (output_bfd, prel31_offset,
15705 &edited_contents[out_index * 8]);
15706
15707 /* Code for EXIDX_CANTUNWIND. */
15708 bfd_put_32 (output_bfd, 0x1,
15709 &edited_contents[out_index * 8 + 4]);
15710
15711 out_index++;
15712 add_to_offsets -= 8;
15713 }
15714 break;
15715 }
b38cadfb 15716
2468f9c9
PB		 15717 edit_node = edit_node->next;
15718 }
15719 }
15720 else
15721 {
15722 /* No more edits, copy remaining entries verbatim. */
15723 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15724 contents + in_index * 8, add_to_offsets);
15725 out_index++;
15726 in_index++;
15727 }
15728 }
15729
15730 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15731 bfd_set_section_contents (output_bfd, sec->output_section,
15732 edited_contents,
15733 (file_ptr) sec->output_offset, sec->size);
15734
15735 return TRUE;
15736 }
15737
48229727
JB		 15738 /* Fix code to point to Cortex-A8 erratum stubs. */
15739 if (globals->fix_cortex_a8)
15740 {
15741 struct a8_branch_to_stub_data data;
15742
15743 data.writing_section = sec;
15744 data.contents = contents;
15745
15746 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15747 &data);
15748 }
15749
e489d0ae
PB		 15750 if (mapcount == 0)
15751 return FALSE;
15752
c7b8f16e 15753 if (globals->byteswap_code)
e489d0ae 15754 {
c7b8f16e 15755 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15756
c7b8f16e
JB		 15757 ptr = map[0].vma;
15758 for (i = 0; i < mapcount; i++)
99059e56
RM		 15759 {
15760 if (i == mapcount - 1)
c7b8f16e 15761 end = sec->size;
99059e56
RM		 15762 else
15763 end = map[i + 1].vma;
e489d0ae 15764
99059e56 15765 switch (map[i].type)
e489d0ae 15766 {
c7b8f16e
JB		 15767 case 'a':
15768 /* Byte swap code words. */
15769 while (ptr + 3 < end)
99059e56
RM		 15770 {
15771 tmp = contents[ptr];
15772 contents[ptr] = contents[ptr + 3];
15773 contents[ptr + 3] = tmp;
15774 tmp = contents[ptr + 1];
15775 contents[ptr + 1] = contents[ptr + 2];
15776 contents[ptr + 2] = tmp;
15777 ptr += 4;
15778 }
c7b8f16e 15779 break;
e489d0ae 15780
c7b8f16e
JB		 15781 case 't':
15782 /* Byte swap code halfwords. */
15783 while (ptr + 1 < end)
99059e56
RM		 15784 {
15785 tmp = contents[ptr];
15786 contents[ptr] = contents[ptr + 1];
15787 contents[ptr + 1] = tmp;
15788 ptr += 2;
15789 }
c7b8f16e
JB		 15790 break;
15791
15792 case 'd':
15793 /* Leave data alone. */
15794 break;
15795 }
99059e56
RM		 15796 ptr = end;
15797 }
e489d0ae 15798 }
8e3de13a 15799
93204d3a 15800 free (map);
47b2e99c 15801 arm_data->mapcount = -1;
c7b8f16e 15802 arm_data->mapsize = 0;
8e3de13a 15803 arm_data->map = NULL;
8e3de13a 15804
e489d0ae
PB		 15805 return FALSE;
15806}
15807
0beaef2b
PB		 15808/* Mangle thumb function symbols as we read them in. */
15809
8384fb8f 15810static bfd_boolean
0beaef2b
PB		 15811elf32_arm_swap_symbol_in (bfd * abfd,
15812 const void *psrc,
15813 const void *pshn,
15814 Elf_Internal_Sym *dst)
15815{
8384fb8f
AM		 15816 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15817 return FALSE;
0beaef2b
PB		 15818
15819 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15820 the address. */
63e1a0fc
PB		 15821 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15822 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15823 {
63e1a0fc
PB		 15824 if (dst->st_value & 1)
15825 {
15826 dst->st_value &= ~(bfd_vma) 1;
15827 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15828 }
15829 else
15830 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15831 }
15832 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15833 {
15834 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15835 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15836 }
35fc36a8
RS		 15837 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15838 dst->st_target_internal = ST_BRANCH_LONG;
15839 else
63e1a0fc 15840 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15841
8384fb8f 15842 return TRUE;
0beaef2b
PB		 15843}
15844
15845
15846/* Mangle thumb function symbols as we write them out. */
15847
15848static void
15849elf32_arm_swap_symbol_out (bfd *abfd,
15850 const Elf_Internal_Sym *src,
15851 void *cdst,
15852 void *shndx)
15853{
15854 Elf_Internal_Sym newsym;
15855
15856 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15857 of the address set, as per the new EABI. We do this unconditionally
15858 because objcopy does not set the elf header flags until after
15859 it writes out the symbol table. */
35fc36a8 15860 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15861 {
15862 newsym = *src;
34e77a92
RS		 15863 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15864 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad 15865 if (newsym.st_shndx != SHN_UNDEF)
99059e56
RM		 15866 {
15867 /* Do this only for defined symbols. At link type, the static
15868 linker will simulate the work of dynamic linker of resolving
15869 symbols and will carry over the thumbness of found symbols to
15870 the output symbol table. It's not clear how it happens, but
15871 the thumbness of undefined symbols can well be different at
15872 runtime, and writing '1' for them will be confusing for users
15873 and possibly for dynamic linker itself.
15874 */
15875 newsym.st_value |= 1;
15876 }
906e58ca 15877
0beaef2b
PB		 15878 src = &newsym;
15879 }
15880 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15881}
15882
b294bdf8
MM		 15883/* Add the PT_ARM_EXIDX program header. */
15884
15885static bfd_boolean
906e58ca 15886elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15887 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15888{
15889 struct elf_segment_map *m;
15890 asection *sec;
15891
15892 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15893 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15894 {
15895 /* If there is already a PT_ARM_EXIDX header, then we do not
15896 want to add another one. This situation arises when running
15897 "strip"; the input binary already has the header. */
12bd6957 15898 m = elf_seg_map (abfd);
b294bdf8
MM		 15899 while (m && m->p_type != PT_ARM_EXIDX)
15900 m = m->next;
15901 if (!m)
15902 {
21d799b5 15903 m = (struct elf_segment_map *)
99059e56 15904 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15905 if (m == NULL)
15906 return FALSE;
15907 m->p_type = PT_ARM_EXIDX;
15908 m->count = 1;
15909 m->sections[0] = sec;
15910
12bd6957
AM		 15911 m->next = elf_seg_map (abfd);
15912 elf_seg_map (abfd) = m;
b294bdf8
MM		 15913 }
15914 }
15915
15916 return TRUE;
15917}
15918
15919/* We may add a PT_ARM_EXIDX program header. */
15920
15921static int
a6b96beb
AM		 15922elf32_arm_additional_program_headers (bfd *abfd,
15923 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15924{
15925 asection *sec;
15926
15927 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15928 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15929 return 1;
15930 else
15931 return 0;
15932}
15933
34e77a92
RS		 15934/* Hook called by the linker routine which adds symbols from an object
15935 file. */
15936
15937static bfd_boolean
15938elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15939 Elf_Internal_Sym *sym, const char **namep,
15940 flagword *flagsp, asection **secp, bfd_vma *valp)
15941{
f1885d1e
AM		 15942 if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15943 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
15944 && (abfd->flags & DYNAMIC) == 0
15945 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
13a2df29 15946 elf_tdata (info->output_bfd)->has_gnu_symbols = elf_gnu_symbol_any;
34e77a92 15947
c792917c
NC		 15948 if (elf32_arm_hash_table (info) == NULL)
15949 return FALSE;
15950
34e77a92
RS		 15951 if (elf32_arm_hash_table (info)->vxworks_p
15952 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15953 flagsp, secp, valp))
15954 return FALSE;
15955
15956 return TRUE;
15957}
15958
0beaef2b 15959/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15960const struct elf_size_info elf32_arm_size_info =
15961{
0beaef2b
PB		 15962 sizeof (Elf32_External_Ehdr),
15963 sizeof (Elf32_External_Phdr),
15964 sizeof (Elf32_External_Shdr),
15965 sizeof (Elf32_External_Rel),
15966 sizeof (Elf32_External_Rela),
15967 sizeof (Elf32_External_Sym),
15968 sizeof (Elf32_External_Dyn),
15969 sizeof (Elf_External_Note),
15970 4,
15971 1,
15972 32, 2,
15973 ELFCLASS32, EV_CURRENT,
15974 bfd_elf32_write_out_phdrs,
15975 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15976 bfd_elf32_checksum_contents,
0beaef2b
PB		 15977 bfd_elf32_write_relocs,
15978 elf32_arm_swap_symbol_in,
15979 elf32_arm_swap_symbol_out,
15980 bfd_elf32_slurp_reloc_table,
15981 bfd_elf32_slurp_symbol_table,
15982 bfd_elf32_swap_dyn_in,
15983 bfd_elf32_swap_dyn_out,
15984 bfd_elf32_swap_reloc_in,
15985 bfd_elf32_swap_reloc_out,
15986 bfd_elf32_swap_reloca_in,
15987 bfd_elf32_swap_reloca_out
15988};
15989
685e70ae
VK		 15990static bfd_vma
15991read_code32 (const bfd *abfd, const bfd_byte *addr)
15992{
15993 /* V7 BE8 code is always little endian. */
15994 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
15995 return bfd_getl32 (addr);
15996
15997 return bfd_get_32 (abfd, addr);
15998}
15999
16000static bfd_vma
16001read_code16 (const bfd *abfd, const bfd_byte *addr)
16002{
16003 /* V7 BE8 code is always little endian. */
16004 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
16005 return bfd_getl16 (addr);
16006
16007 return bfd_get_16 (abfd, addr);
16008}
16009
6a631e86
YG		 16010/* Return size of plt0 entry starting at ADDR
16011 or (bfd_vma) -1 if size can not be determined. */
16012
16013static bfd_vma
16014elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
16015{
16016 bfd_vma first_word;
16017 bfd_vma plt0_size;
16018
685e70ae 16019 first_word = read_code32 (abfd, addr);
6a631e86
YG		 16020
16021 if (first_word == elf32_arm_plt0_entry[0])
16022 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
16023 else if (first_word == elf32_thumb2_plt0_entry[0])
16024 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
16025 else
16026 /* We don't yet handle this PLT format. */
16027 return (bfd_vma) -1;
16028
16029 return plt0_size;
16030}
16031
16032/* Return size of plt entry starting at offset OFFSET
16033 of plt section located at address START
16034 or (bfd_vma) -1 if size can not be determined. */
16035
16036static bfd_vma
16037elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
16038{
16039 bfd_vma first_insn;
16040 bfd_vma plt_size = 0;
16041 const bfd_byte *addr = start + offset;
16042
16043 /* PLT entry size if fixed on Thumb-only platforms. */
685e70ae 16044 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
6a631e86
YG		 16045 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
16046
16047 /* Respect Thumb stub if necessary. */
685e70ae 16048 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
6a631e86
YG		 16049 {
16050 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
16051 }
16052
16053 /* Strip immediate from first add. */
685e70ae 16054 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
6a631e86
YG		 16055
16056#ifdef FOUR_WORD_PLT
16057 if (first_insn == elf32_arm_plt_entry[0])
16058 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
16059#else
16060 if (first_insn == elf32_arm_plt_entry_long[0])
16061 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
16062 else if (first_insn == elf32_arm_plt_entry_short[0])
16063 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
16064#endif
16065 else
16066 /* We don't yet handle this PLT format. */
16067 return (bfd_vma) -1;
16068
16069 return plt_size;
16070}
16071
16072/* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
16073
16074static long
16075elf32_arm_get_synthetic_symtab (bfd *abfd,
16076 long symcount ATTRIBUTE_UNUSED,
16077 asymbol **syms ATTRIBUTE_UNUSED,
16078 long dynsymcount,
16079 asymbol **dynsyms,
16080 asymbol **ret)
16081{
16082 asection *relplt;
16083 asymbol *s;
16084 arelent *p;
16085 long count, i, n;
16086 size_t size;
16087 Elf_Internal_Shdr *hdr;
16088 char *names;
16089 asection *plt;
16090 bfd_vma offset;
16091 bfd_byte *data;
16092
16093 *ret = NULL;
16094
16095 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
16096 return 0;
16097
16098 if (dynsymcount <= 0)
16099 return 0;
16100
16101 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
16102 if (relplt == NULL)
16103 return 0;
16104
16105 hdr = &elf_section_data (relplt)->this_hdr;
16106 if (hdr->sh_link != elf_dynsymtab (abfd)
16107 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
16108 return 0;
16109
16110 plt = bfd_get_section_by_name (abfd, ".plt");
16111 if (plt == NULL)
16112 return 0;
16113
16114 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
16115 return -1;
16116
16117 data = plt->contents;
16118 if (data == NULL)
16119 {
16120 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
16121 return -1;
16122 bfd_cache_section_contents((asection *) plt, data);
16123 }
16124
16125 count = relplt->size / hdr->sh_entsize;
16126 size = count * sizeof (asymbol);
16127 p = relplt->relocation;
16128 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16129 {
16130 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
16131 if (p->addend != 0)
16132 size += sizeof ("+0x") - 1 + 8;
16133 }
16134
16135 s = *ret = (asymbol *) bfd_malloc (size);
16136 if (s == NULL)
16137 return -1;
16138
16139 offset = elf32_arm_plt0_size (abfd, data);
16140 if (offset == (bfd_vma) -1)
16141 return -1;
16142
16143 names = (char *) (s + count);
16144 p = relplt->relocation;
16145 n = 0;
16146 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16147 {
16148 size_t len;
16149
16150 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
16151 if (plt_size == (bfd_vma) -1)
16152 break;
16153
16154 *s = **p->sym_ptr_ptr;
16155 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
16156 we are defining a symbol, ensure one of them is set. */
16157 if ((s->flags & BSF_LOCAL) == 0)
16158 s->flags |= BSF_GLOBAL;
16159 s->flags |= BSF_SYNTHETIC;
16160 s->section = plt;
16161 s->value = offset;
16162 s->name = names;
16163 s->udata.p = NULL;
16164 len = strlen ((*p->sym_ptr_ptr)->name);
16165 memcpy (names, (*p->sym_ptr_ptr)->name, len);
16166 names += len;
16167 if (p->addend != 0)
16168 {
16169 char buf[30], *a;
16170
16171 memcpy (names, "+0x", sizeof ("+0x") - 1);
16172 names += sizeof ("+0x") - 1;
16173 bfd_sprintf_vma (abfd, buf, p->addend);
16174 for (a = buf; *a == '0'; ++a)
16175 ;
16176 len = strlen (a);
16177 memcpy (names, a, len);
16178 names += len;
16179 }
16180 memcpy (names, "@plt", sizeof ("@plt"));
16181 names += sizeof ("@plt");
16182 ++s, ++n;
16183 offset += plt_size;
16184 }
16185
16186 return n;
16187}
16188
252b5132 16189#define ELF_ARCH bfd_arch_arm
ae95ffa6 16190#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 16191#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 16192#ifdef __QNXTARGET__
16193#define ELF_MAXPAGESIZE 0x1000
16194#else
7572ca89 16195#define ELF_MAXPAGESIZE 0x10000
d0facd1b 16196#endif
b1342370 16197#define ELF_MINPAGESIZE 0x1000
24718e3b 16198#define ELF_COMMONPAGESIZE 0x1000
252b5132 16199
ba93b8ac
DJ		 16200#define bfd_elf32_mkobject elf32_arm_mkobject
16201
99e4ae17
AJ		 16202#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
16203#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 16204#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
16205#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
16206#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 16207#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 16208#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 16209#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 16210#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 16211#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 16212#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 16213#define bfd_elf32_bfd_final_link elf32_arm_final_link
6a631e86 16214#define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
252b5132
RH		 16215
16216#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
16217#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 16218#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 16219#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
16220#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 16221#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 16222#define elf_backend_write_section elf32_arm_write_section
252b5132 16223#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 16224#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 16225#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
16226#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
16227#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 16228#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 16229#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 16230#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 16231#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 16232#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 16233#define elf_backend_fake_sections elf32_arm_fake_sections
16234#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 16235#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 16236#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 16237#define elf_backend_size_info elf32_arm_size_info
b294bdf8 16238#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 16239#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
16240#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
16241#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 16242#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 16243
16244#define elf_backend_can_refcount 1
16245#define elf_backend_can_gc_sections 1
16246#define elf_backend_plt_readonly 1
16247#define elf_backend_want_got_plt 1
16248#define elf_backend_want_plt_sym 0
16249#define elf_backend_may_use_rel_p 1
16250#define elf_backend_may_use_rela_p 0
4e7fd91e 16251#define elf_backend_default_use_rela_p 0
252b5132 16252
04f7c78d 16253#define elf_backend_got_header_size 12
b68a20d6 16254#define elf_backend_extern_protected_data 1
04f7c78d 16255
906e58ca
NC		 16256#undef elf_backend_obj_attrs_vendor
16257#define elf_backend_obj_attrs_vendor "aeabi"
16258#undef elf_backend_obj_attrs_section
16259#define elf_backend_obj_attrs_section ".ARM.attributes"
16260#undef elf_backend_obj_attrs_arg_type
16261#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
16262#undef elf_backend_obj_attrs_section_type
104d59d1 16263#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 16264#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
16265#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 16266
252b5132 16267#include "elf32-target.h"
7f266840 16268
b38cadfb
NC		 16269/* Native Client targets. */
16270
16271#undef TARGET_LITTLE_SYM
6d00b590 16272#define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
b38cadfb
NC		 16273#undef TARGET_LITTLE_NAME
16274#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
16275#undef TARGET_BIG_SYM
6d00b590 16276#define TARGET_BIG_SYM arm_elf32_nacl_be_vec
b38cadfb
NC		 16277#undef TARGET_BIG_NAME
16278#define TARGET_BIG_NAME "elf32-bigarm-nacl"
16279
16280/* Like elf32_arm_link_hash_table_create -- but overrides
16281 appropriately for NaCl. */
16282
16283static struct bfd_link_hash_table *
16284elf32_arm_nacl_link_hash_table_create (bfd *abfd)
16285{
16286 struct bfd_link_hash_table *ret;
16287
16288 ret = elf32_arm_link_hash_table_create (abfd);
16289 if (ret)
16290 {
16291 struct elf32_arm_link_hash_table *htab
16292 = (struct elf32_arm_link_hash_table *) ret;
16293
16294 htab->nacl_p = 1;
16295
16296 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
16297 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
16298 }
16299 return ret;
16300}
16301
16302/* Since NaCl doesn't use the ARM-specific unwind format, we don't
16303 really need to use elf32_arm_modify_segment_map. But we do it
16304 anyway just to reduce gratuitous differences with the stock ARM backend. */
16305
16306static bfd_boolean
16307elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
16308{
16309 return (elf32_arm_modify_segment_map (abfd, info)
16310 && nacl_modify_segment_map (abfd, info));
16311}
16312
887badb3
RM		 16313static void
16314elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
16315{
16316 elf32_arm_final_write_processing (abfd, linker);
16317 nacl_final_write_processing (abfd, linker);
16318}
16319
6a631e86
YG		 16320static bfd_vma
16321elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
16322 const arelent *rel ATTRIBUTE_UNUSED)
16323{
16324 return plt->vma
16325 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
16326 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
16327}
887badb3 16328
b38cadfb 16329#undef elf32_bed
6a631e86 16330#define elf32_bed elf32_arm_nacl_bed
b38cadfb
NC		 16331#undef bfd_elf32_bfd_link_hash_table_create
16332#define bfd_elf32_bfd_link_hash_table_create \
16333 elf32_arm_nacl_link_hash_table_create
16334#undef elf_backend_plt_alignment
6a631e86 16335#define elf_backend_plt_alignment 4
b38cadfb
NC		 16336#undef elf_backend_modify_segment_map
16337#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
16338#undef elf_backend_modify_program_headers
16339#define elf_backend_modify_program_headers nacl_modify_program_headers
887badb3
RM		 16340#undef elf_backend_final_write_processing
16341#define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
6a631e86
YG		 16342#undef bfd_elf32_get_synthetic_symtab
16343#undef elf_backend_plt_sym_val
16344#define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
b38cadfb 16345
887badb3
RM		 16346#undef ELF_MINPAGESIZE
16347#undef ELF_COMMONPAGESIZE
16348
b38cadfb
NC		 16349
16350#include "elf32-target.h"
16351
16352/* Reset to defaults. */
16353#undef elf_backend_plt_alignment
16354#undef elf_backend_modify_segment_map
16355#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
16356#undef elf_backend_modify_program_headers
887badb3
RM		 16357#undef elf_backend_final_write_processing
16358#define elf_backend_final_write_processing elf32_arm_final_write_processing
16359#undef ELF_MINPAGESIZE
16360#define ELF_MINPAGESIZE 0x1000
16361#undef ELF_COMMONPAGESIZE
16362#define ELF_COMMONPAGESIZE 0x1000
16363
b38cadfb 16364
906e58ca 16365/* VxWorks Targets. */
4e7fd91e 16366
906e58ca 16367#undef TARGET_LITTLE_SYM
6d00b590 16368#define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
906e58ca 16369#undef TARGET_LITTLE_NAME
4e7fd91e 16370#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 16371#undef TARGET_BIG_SYM
6d00b590 16372#define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
906e58ca 16373#undef TARGET_BIG_NAME
4e7fd91e
PB		 16374#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
16375
16376/* Like elf32_arm_link_hash_table_create -- but overrides
16377 appropriately for VxWorks. */
906e58ca 16378
4e7fd91e
PB		 16379static struct bfd_link_hash_table *
16380elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
16381{
16382 struct bfd_link_hash_table *ret;
16383
16384 ret = elf32_arm_link_hash_table_create (abfd);
16385 if (ret)
16386 {
16387 struct elf32_arm_link_hash_table *htab
00a97672 16388 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 16389 htab->use_rel = 0;
00a97672 16390 htab->vxworks_p = 1;
4e7fd91e
PB		 16391 }
16392 return ret;
906e58ca 16393}
4e7fd91e 16394
00a97672
RS		 16395static void
16396elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
16397{
16398 elf32_arm_final_write_processing (abfd, linker);
16399 elf_vxworks_final_write_processing (abfd, linker);
16400}
16401
906e58ca 16402#undef elf32_bed
4e7fd91e
PB		 16403#define elf32_bed elf32_arm_vxworks_bed
16404
906e58ca
NC		 16405#undef bfd_elf32_bfd_link_hash_table_create
16406#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 16407#undef elf_backend_final_write_processing
16408#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
16409#undef elf_backend_emit_relocs
16410#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 16411
906e58ca 16412#undef elf_backend_may_use_rel_p
00a97672 16413#define elf_backend_may_use_rel_p 0
906e58ca 16414#undef elf_backend_may_use_rela_p
00a97672 16415#define elf_backend_may_use_rela_p 1
906e58ca 16416#undef elf_backend_default_use_rela_p
00a97672 16417#define elf_backend_default_use_rela_p 1
906e58ca 16418#undef elf_backend_want_plt_sym
00a97672 16419#define elf_backend_want_plt_sym 1
906e58ca 16420#undef ELF_MAXPAGESIZE
00a97672 16421#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 16422
16423#include "elf32-target.h"
16424
16425
21d799b5
NC		 16426/* Merge backend specific data from an object file to the output
16427 object file when linking. */
16428
16429static bfd_boolean
16430elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
16431{
16432 flagword out_flags;
16433 flagword in_flags;
16434 bfd_boolean flags_compatible = TRUE;
16435 asection *sec;
16436
cc643b88 16437 /* Check if we have the same endianness. */
21d799b5
NC		 16438 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
16439 return FALSE;
16440
16441 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
16442 return TRUE;
16443
16444 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16445 return FALSE;
16446
16447 /* The input BFD must have had its flags initialised. */
16448 /* The following seems bogus to me -- The flags are initialized in
16449 the assembler but I don't think an elf_flags_init field is
16450 written into the object. */
16451 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16452
16453 in_flags = elf_elfheader (ibfd)->e_flags;
16454 out_flags = elf_elfheader (obfd)->e_flags;
16455
16456 /* In theory there is no reason why we couldn't handle this. However
16457 in practice it isn't even close to working and there is no real
16458 reason to want it. */
16459 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16460 && !(ibfd->flags & DYNAMIC)
16461 && (in_flags & EF_ARM_BE8))
16462 {
16463 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16464 ibfd);
16465 return FALSE;
16466 }
16467
16468 if (!elf_flags_init (obfd))
16469 {
16470 /* If the input is the default architecture and had the default
16471 flags then do not bother setting the flags for the output
16472 architecture, instead allow future merges to do this. If no
16473 future merges ever set these flags then they will retain their
99059e56
RM		 16474 uninitialised values, which surprise surprise, correspond
16475 to the default values. */
21d799b5
NC		 16476 if (bfd_get_arch_info (ibfd)->the_default
16477 && elf_elfheader (ibfd)->e_flags == 0)
16478 return TRUE;
16479
16480 elf_flags_init (obfd) = TRUE;
16481 elf_elfheader (obfd)->e_flags = in_flags;
16482
16483 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16484 && bfd_get_arch_info (obfd)->the_default)
16485 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16486
16487 return TRUE;
16488 }
16489
16490 /* Determine what should happen if the input ARM architecture
16491 does not match the output ARM architecture. */
16492 if (! bfd_arm_merge_machines (ibfd, obfd))
16493 return FALSE;
16494
16495 /* Identical flags must be compatible. */
16496 if (in_flags == out_flags)
16497 return TRUE;
16498
16499 /* Check to see if the input BFD actually contains any sections. If
16500 not, its flags may not have been initialised either, but it
16501 cannot actually cause any incompatiblity. Do not short-circuit
16502 dynamic objects; their section list may be emptied by
16503 elf_link_add_object_symbols.
16504
16505 Also check to see if there are no code sections in the input.
16506 In this case there is no need to check for code specific flags.
16507 XXX - do we need to worry about floating-point format compatability
16508 in data sections ? */
16509 if (!(ibfd->flags & DYNAMIC))
16510 {
16511 bfd_boolean null_input_bfd = TRUE;
16512 bfd_boolean only_data_sections = TRUE;
16513
16514 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16515 {
16516 /* Ignore synthetic glue sections. */
16517 if (strcmp (sec->name, ".glue_7")
16518 && strcmp (sec->name, ".glue_7t"))
16519 {
16520 if ((bfd_get_section_flags (ibfd, sec)
16521 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16522 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
99059e56 16523 only_data_sections = FALSE;
21d799b5
NC		 16524
16525 null_input_bfd = FALSE;
16526 break;
16527 }
16528 }
16529
16530 if (null_input_bfd || only_data_sections)
16531 return TRUE;
16532 }
16533
16534 /* Complain about various flag mismatches. */
16535 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16536 EF_ARM_EABI_VERSION (out_flags)))
16537 {
16538 _bfd_error_handler
16539 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16540 ibfd, obfd,
16541 (in_flags & EF_ARM_EABIMASK) >> 24,
16542 (out_flags & EF_ARM_EABIMASK) >> 24);
16543 return FALSE;
16544 }
16545
16546 /* Not sure what needs to be checked for EABI versions >= 1. */
16547 /* VxWorks libraries do not use these flags. */
16548 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16549 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16550 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16551 {
16552 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16553 {
16554 _bfd_error_handler
16555 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16556 ibfd, obfd,
16557 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16558 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16559 flags_compatible = FALSE;
16560 }
16561
16562 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16563 {
16564 if (in_flags & EF_ARM_APCS_FLOAT)
16565 _bfd_error_handler
16566 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16567 ibfd, obfd);
16568 else
16569 _bfd_error_handler
16570 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16571 ibfd, obfd);
16572
16573 flags_compatible = FALSE;
16574 }
16575
16576 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16577 {
16578 if (in_flags & EF_ARM_VFP_FLOAT)
16579 _bfd_error_handler
16580 (_("error: %B uses VFP instructions, whereas %B does not"),
16581 ibfd, obfd);
16582 else
16583 _bfd_error_handler
16584 (_("error: %B uses FPA instructions, whereas %B does not"),
16585 ibfd, obfd);
16586
16587 flags_compatible = FALSE;
16588 }
16589
16590 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16591 {
16592 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16593 _bfd_error_handler
16594 (_("error: %B uses Maverick instructions, whereas %B does not"),
16595 ibfd, obfd);
16596 else
16597 _bfd_error_handler
16598 (_("error: %B does not use Maverick instructions, whereas %B does"),
16599 ibfd, obfd);
16600
16601 flags_compatible = FALSE;
16602 }
16603
16604#ifdef EF_ARM_SOFT_FLOAT
16605 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16606 {
16607 /* We can allow interworking between code that is VFP format
16608 layout, and uses either soft float or integer regs for
16609 passing floating point arguments and results. We already
16610 know that the APCS_FLOAT flags match; similarly for VFP
16611 flags. */
16612 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16613 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16614 {
16615 if (in_flags & EF_ARM_SOFT_FLOAT)
16616 _bfd_error_handler
16617 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16618 ibfd, obfd);
16619 else
16620 _bfd_error_handler
16621 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16622 ibfd, obfd);
16623
16624 flags_compatible = FALSE;
16625 }
16626 }
16627#endif
16628
16629 /* Interworking mismatch is only a warning. */
16630 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16631 {
16632 if (in_flags & EF_ARM_INTERWORK)
16633 {
16634 _bfd_error_handler
16635 (_("Warning: %B supports interworking, whereas %B does not"),
16636 ibfd, obfd);
16637 }
16638 else
16639 {
16640 _bfd_error_handler
16641 (_("Warning: %B does not support interworking, whereas %B does"),
16642 ibfd, obfd);
16643 }
16644 }
16645 }
16646
16647 return flags_compatible;
16648}
16649
16650
906e58ca 16651/* Symbian OS Targets. */
7f266840 16652
906e58ca 16653#undef TARGET_LITTLE_SYM
6d00b590 16654#define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
906e58ca 16655#undef TARGET_LITTLE_NAME
7f266840 16656#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16657#undef TARGET_BIG_SYM
6d00b590 16658#define TARGET_BIG_SYM arm_elf32_symbian_be_vec
906e58ca 16659#undef TARGET_BIG_NAME
7f266840
DJ		 16660#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16661
16662/* Like elf32_arm_link_hash_table_create -- but overrides
16663 appropriately for Symbian OS. */
906e58ca 16664
7f266840
DJ		 16665static struct bfd_link_hash_table *
16666elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16667{
16668 struct bfd_link_hash_table *ret;
16669
16670 ret = elf32_arm_link_hash_table_create (abfd);
16671 if (ret)
16672 {
16673 struct elf32_arm_link_hash_table *htab
16674 = (struct elf32_arm_link_hash_table *)ret;
16675 /* There is no PLT header for Symbian OS. */
16676 htab->plt_header_size = 0;
95720a86
DJ		 16677 /* The PLT entries are each one instruction and one word. */
16678 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16679 htab->symbian_p = 1;
33bfe774
JB		 16680 /* Symbian uses armv5t or above, so use_blx is always true. */
16681 htab->use_blx = 1;
67687978 16682 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16683 }
16684 return ret;
906e58ca 16685}
7f266840 16686
b35d266b 16687static const struct bfd_elf_special_section
551b43fd 16688elf32_arm_symbian_special_sections[] =
7f266840 16689{
5cd3778d
MM		 16690 /* In a BPABI executable, the dynamic linking sections do not go in
16691 the loadable read-only segment. The post-linker may wish to
16692 refer to these sections, but they are not part of the final
16693 program image. */
0112cd26
NC		 16694 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16695 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16696 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16697 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16698 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16699 /* These sections do not need to be writable as the SymbianOS
16700 postlinker will arrange things so that no dynamic relocation is
16701 required. */
0112cd26
NC		 16702 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16703 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16704 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16705 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16706};
16707
c3c76620 16708static void
906e58ca 16709elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16710 struct bfd_link_info *link_info)
c3c76620
MM		 16711{
16712 /* BPABI objects are never loaded directly by an OS kernel; they are
16713 processed by a postlinker first, into an OS-specific format. If
16714 the D_PAGED bit is set on the file, BFD will align segments on
16715 page boundaries, so that an OS can directly map the file. With
16716 BPABI objects, that just results in wasted space. In addition,
16717 because we clear the D_PAGED bit, map_sections_to_segments will
16718 recognize that the program headers should not be mapped into any
16719 loadable segment. */
16720 abfd->flags &= ~D_PAGED;
906e58ca 16721 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16722}
7f266840
DJ		 16723
16724static bfd_boolean
906e58ca 16725elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16726 struct bfd_link_info *info)
7f266840
DJ		 16727{
16728 struct elf_segment_map *m;
16729 asection *dynsec;
16730
7f266840
DJ		 16731 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16732 segment. However, because the .dynamic section is not marked
16733 with SEC_LOAD, the generic ELF code will not create such a
16734 segment. */
16735 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16736 if (dynsec)
16737 {
12bd6957 16738 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
8ded5a0f
AM		 16739 if (m->p_type == PT_DYNAMIC)
16740 break;
16741
16742 if (m == NULL)
16743 {
16744 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12bd6957
AM		 16745 m->next = elf_seg_map (abfd);
16746 elf_seg_map (abfd) = m;
8ded5a0f 16747 }
7f266840
DJ		 16748 }
16749
b294bdf8
MM		 16750 /* Also call the generic arm routine. */
16751 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16752}
16753
95720a86
DJ		 16754/* Return address for Ith PLT stub in section PLT, for relocation REL
16755 or (bfd_vma) -1 if it should not be included. */
16756
16757static bfd_vma
16758elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16759 const arelent *rel ATTRIBUTE_UNUSED)
16760{
16761 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16762}
16763
16764
8029a119 16765#undef elf32_bed
7f266840
DJ		 16766#define elf32_bed elf32_arm_symbian_bed
16767
16768/* The dynamic sections are not allocated on SymbianOS; the postlinker
16769 will process them and then discard them. */
906e58ca 16770#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16771#define ELF_DYNAMIC_SEC_FLAGS \
16772 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16773
00a97672 16774#undef elf_backend_emit_relocs
c3c76620 16775
906e58ca
NC		 16776#undef bfd_elf32_bfd_link_hash_table_create
16777#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16778#undef elf_backend_special_sections
16779#define elf_backend_special_sections elf32_arm_symbian_special_sections
16780#undef elf_backend_begin_write_processing
16781#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16782#undef elf_backend_final_write_processing
16783#define elf_backend_final_write_processing elf32_arm_final_write_processing
16784
16785#undef elf_backend_modify_segment_map
7f266840
DJ		 16786#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16787
16788/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16789#undef elf_backend_got_header_size
7f266840
DJ		 16790#define elf_backend_got_header_size 0
16791
16792/* Similarly, there is no .got.plt section. */
906e58ca 16793#undef elf_backend_want_got_plt
7f266840
DJ		 16794#define elf_backend_want_got_plt 0
16795
906e58ca 16796#undef elf_backend_plt_sym_val
95720a86
DJ		 16797#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16798
906e58ca 16799#undef elf_backend_may_use_rel_p
00a97672 16800#define elf_backend_may_use_rel_p 1
906e58ca 16801#undef elf_backend_may_use_rela_p
00a97672 16802#define elf_backend_may_use_rela_p 0
906e58ca 16803#undef elf_backend_default_use_rela_p
00a97672 16804#define elf_backend_default_use_rela_p 0
906e58ca 16805#undef elf_backend_want_plt_sym
00a97672 16806#define elf_backend_want_plt_sym 0
906e58ca 16807#undef ELF_MAXPAGESIZE
00a97672 16808#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16809
7f266840 16810#include "elf32-target.h"
GDB Binutils - Deliverables
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