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* dwarf2read.c (init_cutu_and_read_dies): Renamed from
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
1d7e9d18 3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
b38cadfb 29#include "elf-nacl.h"
00a97672 30#include "elf-vxworks.h"
ee065d83 31#include "elf/arm.h"
7f266840 32
00a97672
RS		 33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ		 59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
3e6b1042
DJ		 65static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
66 struct bfd_link_info *link_info,
67 asection *sec,
68 bfd_byte *contents);
69
7f266840
DJ		 70/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
71 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
72 in that slot. */
73
c19d1205 74static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 75{
8029a119 76 /* No relocation. */
7f266840
DJ		 77 HOWTO (R_ARM_NONE, /* type */
78 0, /* rightshift */
79 0, /* size (0 = byte, 1 = short, 2 = long) */
80 0, /* bitsize */
81 FALSE, /* pc_relative */
82 0, /* bitpos */
83 complain_overflow_dont,/* complain_on_overflow */
84 bfd_elf_generic_reloc, /* special_function */
85 "R_ARM_NONE", /* name */
86 FALSE, /* partial_inplace */
87 0, /* src_mask */
88 0, /* dst_mask */
89 FALSE), /* pcrel_offset */
90
91 HOWTO (R_ARM_PC24, /* type */
92 2, /* rightshift */
93 2, /* size (0 = byte, 1 = short, 2 = long) */
94 24, /* bitsize */
95 TRUE, /* pc_relative */
96 0, /* bitpos */
97 complain_overflow_signed,/* complain_on_overflow */
98 bfd_elf_generic_reloc, /* special_function */
99 "R_ARM_PC24", /* name */
100 FALSE, /* partial_inplace */
101 0x00ffffff, /* src_mask */
102 0x00ffffff, /* dst_mask */
103 TRUE), /* pcrel_offset */
104
105 /* 32 bit absolute */
106 HOWTO (R_ARM_ABS32, /* type */
107 0, /* rightshift */
108 2, /* size (0 = byte, 1 = short, 2 = long) */
109 32, /* bitsize */
110 FALSE, /* pc_relative */
111 0, /* bitpos */
112 complain_overflow_bitfield,/* complain_on_overflow */
113 bfd_elf_generic_reloc, /* special_function */
114 "R_ARM_ABS32", /* name */
115 FALSE, /* partial_inplace */
116 0xffffffff, /* src_mask */
117 0xffffffff, /* dst_mask */
118 FALSE), /* pcrel_offset */
119
120 /* standard 32bit pc-relative reloc */
121 HOWTO (R_ARM_REL32, /* type */
122 0, /* rightshift */
123 2, /* size (0 = byte, 1 = short, 2 = long) */
124 32, /* bitsize */
125 TRUE, /* pc_relative */
126 0, /* bitpos */
127 complain_overflow_bitfield,/* complain_on_overflow */
128 bfd_elf_generic_reloc, /* special_function */
129 "R_ARM_REL32", /* name */
130 FALSE, /* partial_inplace */
131 0xffffffff, /* src_mask */
132 0xffffffff, /* dst_mask */
133 TRUE), /* pcrel_offset */
134
c19d1205 135 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 136 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 137 0, /* rightshift */
138 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 139 32, /* bitsize */
140 TRUE, /* pc_relative */
7f266840 141 0, /* bitpos */
4962c51a 142 complain_overflow_dont,/* complain_on_overflow */
7f266840 143 bfd_elf_generic_reloc, /* special_function */
4962c51a 144 "R_ARM_LDR_PC_G0", /* name */
7f266840 145 FALSE, /* partial_inplace */
4962c51a
MS		 146 0xffffffff, /* src_mask */
147 0xffffffff, /* dst_mask */
148 TRUE), /* pcrel_offset */
7f266840
DJ		 149
150 /* 16 bit absolute */
151 HOWTO (R_ARM_ABS16, /* type */
152 0, /* rightshift */
153 1, /* size (0 = byte, 1 = short, 2 = long) */
154 16, /* bitsize */
155 FALSE, /* pc_relative */
156 0, /* bitpos */
157 complain_overflow_bitfield,/* complain_on_overflow */
158 bfd_elf_generic_reloc, /* special_function */
159 "R_ARM_ABS16", /* name */
160 FALSE, /* partial_inplace */
161 0x0000ffff, /* src_mask */
162 0x0000ffff, /* dst_mask */
163 FALSE), /* pcrel_offset */
164
165 /* 12 bit absolute */
166 HOWTO (R_ARM_ABS12, /* type */
167 0, /* rightshift */
168 2, /* size (0 = byte, 1 = short, 2 = long) */
169 12, /* bitsize */
170 FALSE, /* pc_relative */
171 0, /* bitpos */
172 complain_overflow_bitfield,/* complain_on_overflow */
173 bfd_elf_generic_reloc, /* special_function */
174 "R_ARM_ABS12", /* name */
175 FALSE, /* partial_inplace */
00a97672
RS		 176 0x00000fff, /* src_mask */
177 0x00000fff, /* dst_mask */
7f266840
DJ		 178 FALSE), /* pcrel_offset */
179
180 HOWTO (R_ARM_THM_ABS5, /* type */
181 6, /* rightshift */
182 1, /* size (0 = byte, 1 = short, 2 = long) */
183 5, /* bitsize */
184 FALSE, /* pc_relative */
185 0, /* bitpos */
186 complain_overflow_bitfield,/* complain_on_overflow */
187 bfd_elf_generic_reloc, /* special_function */
188 "R_ARM_THM_ABS5", /* name */
189 FALSE, /* partial_inplace */
190 0x000007e0, /* src_mask */
191 0x000007e0, /* dst_mask */
192 FALSE), /* pcrel_offset */
193
194 /* 8 bit absolute */
195 HOWTO (R_ARM_ABS8, /* type */
196 0, /* rightshift */
197 0, /* size (0 = byte, 1 = short, 2 = long) */
198 8, /* bitsize */
199 FALSE, /* pc_relative */
200 0, /* bitpos */
201 complain_overflow_bitfield,/* complain_on_overflow */
202 bfd_elf_generic_reloc, /* special_function */
203 "R_ARM_ABS8", /* name */
204 FALSE, /* partial_inplace */
205 0x000000ff, /* src_mask */
206 0x000000ff, /* dst_mask */
207 FALSE), /* pcrel_offset */
208
209 HOWTO (R_ARM_SBREL32, /* type */
210 0, /* rightshift */
211 2, /* size (0 = byte, 1 = short, 2 = long) */
212 32, /* bitsize */
213 FALSE, /* pc_relative */
214 0, /* bitpos */
215 complain_overflow_dont,/* complain_on_overflow */
216 bfd_elf_generic_reloc, /* special_function */
217 "R_ARM_SBREL32", /* name */
218 FALSE, /* partial_inplace */
219 0xffffffff, /* src_mask */
220 0xffffffff, /* dst_mask */
221 FALSE), /* pcrel_offset */
222
c19d1205 223 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 224 1, /* rightshift */
225 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 226 24, /* bitsize */
7f266840
DJ		 227 TRUE, /* pc_relative */
228 0, /* bitpos */
229 complain_overflow_signed,/* complain_on_overflow */
230 bfd_elf_generic_reloc, /* special_function */
c19d1205 231 "R_ARM_THM_CALL", /* name */
7f266840 232 FALSE, /* partial_inplace */
7f6ab9f8
AM		 233 0x07ff2fff, /* src_mask */
234 0x07ff2fff, /* dst_mask */
7f266840
DJ		 235 TRUE), /* pcrel_offset */
236
237 HOWTO (R_ARM_THM_PC8, /* type */
238 1, /* rightshift */
239 1, /* size (0 = byte, 1 = short, 2 = long) */
240 8, /* bitsize */
241 TRUE, /* pc_relative */
242 0, /* bitpos */
243 complain_overflow_signed,/* complain_on_overflow */
244 bfd_elf_generic_reloc, /* special_function */
245 "R_ARM_THM_PC8", /* name */
246 FALSE, /* partial_inplace */
247 0x000000ff, /* src_mask */
248 0x000000ff, /* dst_mask */
249 TRUE), /* pcrel_offset */
250
c19d1205 251 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 252 1, /* rightshift */
253 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 254 32, /* bitsize */
255 FALSE, /* pc_relative */
7f266840
DJ		 256 0, /* bitpos */
257 complain_overflow_signed,/* complain_on_overflow */
258 bfd_elf_generic_reloc, /* special_function */
c19d1205 259 "R_ARM_BREL_ADJ", /* name */
7f266840 260 FALSE, /* partial_inplace */
c19d1205
ZW		 261 0xffffffff, /* src_mask */
262 0xffffffff, /* dst_mask */
263 FALSE), /* pcrel_offset */
7f266840 264
0855e32b 265 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 266 0, /* rightshift */
0855e32b
NS		 267 2, /* size (0 = byte, 1 = short, 2 = long) */
268 32, /* bitsize */
7f266840
DJ		 269 FALSE, /* pc_relative */
270 0, /* bitpos */
0855e32b 271 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 272 bfd_elf_generic_reloc, /* special_function */
0855e32b 273 "R_ARM_TLS_DESC", /* name */
7f266840 274 FALSE, /* partial_inplace */
0855e32b
NS		 275 0xffffffff, /* src_mask */
276 0xffffffff, /* dst_mask */
7f266840
DJ		 277 FALSE), /* pcrel_offset */
278
279 HOWTO (R_ARM_THM_SWI8, /* type */
280 0, /* rightshift */
281 0, /* size (0 = byte, 1 = short, 2 = long) */
282 0, /* bitsize */
283 FALSE, /* pc_relative */
284 0, /* bitpos */
285 complain_overflow_signed,/* complain_on_overflow */
286 bfd_elf_generic_reloc, /* special_function */
287 "R_ARM_SWI8", /* name */
288 FALSE, /* partial_inplace */
289 0x00000000, /* src_mask */
290 0x00000000, /* dst_mask */
291 FALSE), /* pcrel_offset */
292
293 /* BLX instruction for the ARM. */
294 HOWTO (R_ARM_XPC25, /* type */
295 2, /* rightshift */
296 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 297 24, /* bitsize */
7f266840
DJ		 298 TRUE, /* pc_relative */
299 0, /* bitpos */
300 complain_overflow_signed,/* complain_on_overflow */
301 bfd_elf_generic_reloc, /* special_function */
302 "R_ARM_XPC25", /* name */
303 FALSE, /* partial_inplace */
304 0x00ffffff, /* src_mask */
305 0x00ffffff, /* dst_mask */
306 TRUE), /* pcrel_offset */
307
308 /* BLX instruction for the Thumb. */
309 HOWTO (R_ARM_THM_XPC22, /* type */
310 2, /* rightshift */
311 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 312 24, /* bitsize */
7f266840
DJ		 313 TRUE, /* pc_relative */
314 0, /* bitpos */
315 complain_overflow_signed,/* complain_on_overflow */
316 bfd_elf_generic_reloc, /* special_function */
317 "R_ARM_THM_XPC22", /* name */
318 FALSE, /* partial_inplace */
7f6ab9f8
AM		 319 0x07ff2fff, /* src_mask */
320 0x07ff2fff, /* dst_mask */
7f266840
DJ		 321 TRUE), /* pcrel_offset */
322
ba93b8ac 323 /* Dynamic TLS relocations. */
7f266840 324
ba93b8ac
DJ		 325 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
326 0, /* rightshift */
327 2, /* size (0 = byte, 1 = short, 2 = long) */
328 32, /* bitsize */
329 FALSE, /* pc_relative */
330 0, /* bitpos */
331 complain_overflow_bitfield,/* complain_on_overflow */
332 bfd_elf_generic_reloc, /* special_function */
333 "R_ARM_TLS_DTPMOD32", /* name */
334 TRUE, /* partial_inplace */
335 0xffffffff, /* src_mask */
336 0xffffffff, /* dst_mask */
337 FALSE), /* pcrel_offset */
7f266840 338
ba93b8ac
DJ		 339 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
340 0, /* rightshift */
341 2, /* size (0 = byte, 1 = short, 2 = long) */
342 32, /* bitsize */
343 FALSE, /* pc_relative */
344 0, /* bitpos */
345 complain_overflow_bitfield,/* complain_on_overflow */
346 bfd_elf_generic_reloc, /* special_function */
347 "R_ARM_TLS_DTPOFF32", /* name */
348 TRUE, /* partial_inplace */
349 0xffffffff, /* src_mask */
350 0xffffffff, /* dst_mask */
351 FALSE), /* pcrel_offset */
7f266840 352
ba93b8ac
DJ		 353 HOWTO (R_ARM_TLS_TPOFF32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield,/* complain_on_overflow */
360 bfd_elf_generic_reloc, /* special_function */
361 "R_ARM_TLS_TPOFF32", /* name */
362 TRUE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
7f266840
DJ		 366
367 /* Relocs used in ARM Linux */
368
369 HOWTO (R_ARM_COPY, /* type */
370 0, /* rightshift */
371 2, /* size (0 = byte, 1 = short, 2 = long) */
372 32, /* bitsize */
373 FALSE, /* pc_relative */
374 0, /* bitpos */
375 complain_overflow_bitfield,/* complain_on_overflow */
376 bfd_elf_generic_reloc, /* special_function */
377 "R_ARM_COPY", /* name */
378 TRUE, /* partial_inplace */
379 0xffffffff, /* src_mask */
380 0xffffffff, /* dst_mask */
381 FALSE), /* pcrel_offset */
382
383 HOWTO (R_ARM_GLOB_DAT, /* type */
384 0, /* rightshift */
385 2, /* size (0 = byte, 1 = short, 2 = long) */
386 32, /* bitsize */
387 FALSE, /* pc_relative */
388 0, /* bitpos */
389 complain_overflow_bitfield,/* complain_on_overflow */
390 bfd_elf_generic_reloc, /* special_function */
391 "R_ARM_GLOB_DAT", /* name */
392 TRUE, /* partial_inplace */
393 0xffffffff, /* src_mask */
394 0xffffffff, /* dst_mask */
395 FALSE), /* pcrel_offset */
396
397 HOWTO (R_ARM_JUMP_SLOT, /* type */
398 0, /* rightshift */
399 2, /* size (0 = byte, 1 = short, 2 = long) */
400 32, /* bitsize */
401 FALSE, /* pc_relative */
402 0, /* bitpos */
403 complain_overflow_bitfield,/* complain_on_overflow */
404 bfd_elf_generic_reloc, /* special_function */
405 "R_ARM_JUMP_SLOT", /* name */
406 TRUE, /* partial_inplace */
407 0xffffffff, /* src_mask */
408 0xffffffff, /* dst_mask */
409 FALSE), /* pcrel_offset */
410
411 HOWTO (R_ARM_RELATIVE, /* type */
412 0, /* rightshift */
413 2, /* size (0 = byte, 1 = short, 2 = long) */
414 32, /* bitsize */
415 FALSE, /* pc_relative */
416 0, /* bitpos */
417 complain_overflow_bitfield,/* complain_on_overflow */
418 bfd_elf_generic_reloc, /* special_function */
419 "R_ARM_RELATIVE", /* name */
420 TRUE, /* partial_inplace */
421 0xffffffff, /* src_mask */
422 0xffffffff, /* dst_mask */
423 FALSE), /* pcrel_offset */
424
c19d1205 425 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 426 0, /* rightshift */
427 2, /* size (0 = byte, 1 = short, 2 = long) */
428 32, /* bitsize */
429 FALSE, /* pc_relative */
430 0, /* bitpos */
431 complain_overflow_bitfield,/* complain_on_overflow */
432 bfd_elf_generic_reloc, /* special_function */
c19d1205 433 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 434 TRUE, /* partial_inplace */
435 0xffffffff, /* src_mask */
436 0xffffffff, /* dst_mask */
437 FALSE), /* pcrel_offset */
438
439 HOWTO (R_ARM_GOTPC, /* type */
440 0, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 32, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_bitfield,/* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_ARM_GOTPC", /* name */
448 TRUE, /* partial_inplace */
449 0xffffffff, /* src_mask */
450 0xffffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 HOWTO (R_ARM_GOT32, /* type */
454 0, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 32, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_bitfield,/* complain_on_overflow */
460 bfd_elf_generic_reloc, /* special_function */
461 "R_ARM_GOT32", /* name */
462 TRUE, /* partial_inplace */
463 0xffffffff, /* src_mask */
464 0xffffffff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 HOWTO (R_ARM_PLT32, /* type */
468 2, /* rightshift */
469 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 470 24, /* bitsize */
7f266840
DJ		 471 TRUE, /* pc_relative */
472 0, /* bitpos */
473 complain_overflow_bitfield,/* complain_on_overflow */
474 bfd_elf_generic_reloc, /* special_function */
475 "R_ARM_PLT32", /* name */
ce490eda 476 FALSE, /* partial_inplace */
7f266840
DJ		 477 0x00ffffff, /* src_mask */
478 0x00ffffff, /* dst_mask */
479 TRUE), /* pcrel_offset */
480
481 HOWTO (R_ARM_CALL, /* type */
482 2, /* rightshift */
483 2, /* size (0 = byte, 1 = short, 2 = long) */
484 24, /* bitsize */
485 TRUE, /* pc_relative */
486 0, /* bitpos */
487 complain_overflow_signed,/* complain_on_overflow */
488 bfd_elf_generic_reloc, /* special_function */
489 "R_ARM_CALL", /* name */
490 FALSE, /* partial_inplace */
491 0x00ffffff, /* src_mask */
492 0x00ffffff, /* dst_mask */
493 TRUE), /* pcrel_offset */
494
495 HOWTO (R_ARM_JUMP24, /* type */
496 2, /* rightshift */
497 2, /* size (0 = byte, 1 = short, 2 = long) */
498 24, /* bitsize */
499 TRUE, /* pc_relative */
500 0, /* bitpos */
501 complain_overflow_signed,/* complain_on_overflow */
502 bfd_elf_generic_reloc, /* special_function */
503 "R_ARM_JUMP24", /* name */
504 FALSE, /* partial_inplace */
505 0x00ffffff, /* src_mask */
506 0x00ffffff, /* dst_mask */
507 TRUE), /* pcrel_offset */
508
c19d1205
ZW		 509 HOWTO (R_ARM_THM_JUMP24, /* type */
510 1, /* rightshift */
511 2, /* size (0 = byte, 1 = short, 2 = long) */
512 24, /* bitsize */
513 TRUE, /* pc_relative */
7f266840 514 0, /* bitpos */
c19d1205 515 complain_overflow_signed,/* complain_on_overflow */
7f266840 516 bfd_elf_generic_reloc, /* special_function */
c19d1205 517 "R_ARM_THM_JUMP24", /* name */
7f266840 518 FALSE, /* partial_inplace */
c19d1205
ZW		 519 0x07ff2fff, /* src_mask */
520 0x07ff2fff, /* dst_mask */
521 TRUE), /* pcrel_offset */
7f266840 522
c19d1205 523 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 524 0, /* rightshift */
c19d1205
ZW		 525 2, /* size (0 = byte, 1 = short, 2 = long) */
526 32, /* bitsize */
7f266840
DJ		 527 FALSE, /* pc_relative */
528 0, /* bitpos */
529 complain_overflow_dont,/* complain_on_overflow */
530 bfd_elf_generic_reloc, /* special_function */
c19d1205 531 "R_ARM_BASE_ABS", /* name */
7f266840 532 FALSE, /* partial_inplace */
c19d1205
ZW		 533 0xffffffff, /* src_mask */
534 0xffffffff, /* dst_mask */
7f266840
DJ		 535 FALSE), /* pcrel_offset */
536
537 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
538 0, /* rightshift */
539 2, /* size (0 = byte, 1 = short, 2 = long) */
540 12, /* bitsize */
541 TRUE, /* pc_relative */
542 0, /* bitpos */
543 complain_overflow_dont,/* complain_on_overflow */
544 bfd_elf_generic_reloc, /* special_function */
545 "R_ARM_ALU_PCREL_7_0", /* name */
546 FALSE, /* partial_inplace */
547 0x00000fff, /* src_mask */
548 0x00000fff, /* dst_mask */
549 TRUE), /* pcrel_offset */
550
551 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
552 0, /* rightshift */
553 2, /* size (0 = byte, 1 = short, 2 = long) */
554 12, /* bitsize */
555 TRUE, /* pc_relative */
556 8, /* bitpos */
557 complain_overflow_dont,/* complain_on_overflow */
558 bfd_elf_generic_reloc, /* special_function */
559 "R_ARM_ALU_PCREL_15_8",/* name */
560 FALSE, /* partial_inplace */
561 0x00000fff, /* src_mask */
562 0x00000fff, /* dst_mask */
563 TRUE), /* pcrel_offset */
564
565 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
566 0, /* rightshift */
567 2, /* size (0 = byte, 1 = short, 2 = long) */
568 12, /* bitsize */
569 TRUE, /* pc_relative */
570 16, /* bitpos */
571 complain_overflow_dont,/* complain_on_overflow */
572 bfd_elf_generic_reloc, /* special_function */
573 "R_ARM_ALU_PCREL_23_15",/* name */
574 FALSE, /* partial_inplace */
575 0x00000fff, /* src_mask */
576 0x00000fff, /* dst_mask */
577 TRUE), /* pcrel_offset */
578
579 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
580 0, /* rightshift */
581 2, /* size (0 = byte, 1 = short, 2 = long) */
582 12, /* bitsize */
583 FALSE, /* pc_relative */
584 0, /* bitpos */
585 complain_overflow_dont,/* complain_on_overflow */
586 bfd_elf_generic_reloc, /* special_function */
587 "R_ARM_LDR_SBREL_11_0",/* name */
588 FALSE, /* partial_inplace */
589 0x00000fff, /* src_mask */
590 0x00000fff, /* dst_mask */
591 FALSE), /* pcrel_offset */
592
593 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
594 0, /* rightshift */
595 2, /* size (0 = byte, 1 = short, 2 = long) */
596 8, /* bitsize */
597 FALSE, /* pc_relative */
598 12, /* bitpos */
599 complain_overflow_dont,/* complain_on_overflow */
600 bfd_elf_generic_reloc, /* special_function */
601 "R_ARM_ALU_SBREL_19_12",/* name */
602 FALSE, /* partial_inplace */
603 0x000ff000, /* src_mask */
604 0x000ff000, /* dst_mask */
605 FALSE), /* pcrel_offset */
606
607 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
608 0, /* rightshift */
609 2, /* size (0 = byte, 1 = short, 2 = long) */
610 8, /* bitsize */
611 FALSE, /* pc_relative */
612 20, /* bitpos */
613 complain_overflow_dont,/* complain_on_overflow */
614 bfd_elf_generic_reloc, /* special_function */
615 "R_ARM_ALU_SBREL_27_20",/* name */
616 FALSE, /* partial_inplace */
617 0x0ff00000, /* src_mask */
618 0x0ff00000, /* dst_mask */
619 FALSE), /* pcrel_offset */
620
621 HOWTO (R_ARM_TARGET1, /* type */
622 0, /* rightshift */
623 2, /* size (0 = byte, 1 = short, 2 = long) */
624 32, /* bitsize */
625 FALSE, /* pc_relative */
626 0, /* bitpos */
627 complain_overflow_dont,/* complain_on_overflow */
628 bfd_elf_generic_reloc, /* special_function */
629 "R_ARM_TARGET1", /* name */
630 FALSE, /* partial_inplace */
631 0xffffffff, /* src_mask */
632 0xffffffff, /* dst_mask */
633 FALSE), /* pcrel_offset */
634
635 HOWTO (R_ARM_ROSEGREL32, /* type */
636 0, /* rightshift */
637 2, /* size (0 = byte, 1 = short, 2 = long) */
638 32, /* bitsize */
639 FALSE, /* pc_relative */
640 0, /* bitpos */
641 complain_overflow_dont,/* complain_on_overflow */
642 bfd_elf_generic_reloc, /* special_function */
643 "R_ARM_ROSEGREL32", /* name */
644 FALSE, /* partial_inplace */
645 0xffffffff, /* src_mask */
646 0xffffffff, /* dst_mask */
647 FALSE), /* pcrel_offset */
648
649 HOWTO (R_ARM_V4BX, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 32, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_dont,/* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_ARM_V4BX", /* name */
658 FALSE, /* partial_inplace */
659 0xffffffff, /* src_mask */
660 0xffffffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_ARM_TARGET2, /* type */
664 0, /* rightshift */
665 2, /* size (0 = byte, 1 = short, 2 = long) */
666 32, /* bitsize */
667 FALSE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed,/* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_ARM_TARGET2", /* name */
672 FALSE, /* partial_inplace */
673 0xffffffff, /* src_mask */
674 0xffffffff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 HOWTO (R_ARM_PREL31, /* type */
678 0, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 31, /* bitsize */
681 TRUE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_signed,/* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_ARM_PREL31", /* name */
686 FALSE, /* partial_inplace */
687 0x7fffffff, /* src_mask */
688 0x7fffffff, /* dst_mask */
689 TRUE), /* pcrel_offset */
c19d1205
ZW		 690
691 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
692 0, /* rightshift */
693 2, /* size (0 = byte, 1 = short, 2 = long) */
694 16, /* bitsize */
695 FALSE, /* pc_relative */
696 0, /* bitpos */
697 complain_overflow_dont,/* complain_on_overflow */
698 bfd_elf_generic_reloc, /* special_function */
699 "R_ARM_MOVW_ABS_NC", /* name */
700 FALSE, /* partial_inplace */
39623e12
PB		 701 0x000f0fff, /* src_mask */
702 0x000f0fff, /* dst_mask */
c19d1205
ZW		 703 FALSE), /* pcrel_offset */
704
705 HOWTO (R_ARM_MOVT_ABS, /* type */
706 0, /* rightshift */
707 2, /* size (0 = byte, 1 = short, 2 = long) */
708 16, /* bitsize */
709 FALSE, /* pc_relative */
710 0, /* bitpos */
711 complain_overflow_bitfield,/* complain_on_overflow */
712 bfd_elf_generic_reloc, /* special_function */
713 "R_ARM_MOVT_ABS", /* name */
714 FALSE, /* partial_inplace */
39623e12
PB		 715 0x000f0fff, /* src_mask */
716 0x000f0fff, /* dst_mask */
c19d1205
ZW		 717 FALSE), /* pcrel_offset */
718
719 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
720 0, /* rightshift */
721 2, /* size (0 = byte, 1 = short, 2 = long) */
722 16, /* bitsize */
723 TRUE, /* pc_relative */
724 0, /* bitpos */
725 complain_overflow_dont,/* complain_on_overflow */
726 bfd_elf_generic_reloc, /* special_function */
727 "R_ARM_MOVW_PREL_NC", /* name */
728 FALSE, /* partial_inplace */
39623e12
PB		 729 0x000f0fff, /* src_mask */
730 0x000f0fff, /* dst_mask */
c19d1205
ZW		 731 TRUE), /* pcrel_offset */
732
733 HOWTO (R_ARM_MOVT_PREL, /* type */
734 0, /* rightshift */
735 2, /* size (0 = byte, 1 = short, 2 = long) */
736 16, /* bitsize */
737 TRUE, /* pc_relative */
738 0, /* bitpos */
739 complain_overflow_bitfield,/* complain_on_overflow */
740 bfd_elf_generic_reloc, /* special_function */
741 "R_ARM_MOVT_PREL", /* name */
742 FALSE, /* partial_inplace */
39623e12
PB		 743 0x000f0fff, /* src_mask */
744 0x000f0fff, /* dst_mask */
c19d1205
ZW		 745 TRUE), /* pcrel_offset */
746
747 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
748 0, /* rightshift */
749 2, /* size (0 = byte, 1 = short, 2 = long) */
750 16, /* bitsize */
751 FALSE, /* pc_relative */
752 0, /* bitpos */
753 complain_overflow_dont,/* complain_on_overflow */
754 bfd_elf_generic_reloc, /* special_function */
755 "R_ARM_THM_MOVW_ABS_NC",/* name */
756 FALSE, /* partial_inplace */
757 0x040f70ff, /* src_mask */
758 0x040f70ff, /* dst_mask */
759 FALSE), /* pcrel_offset */
760
761 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
762 0, /* rightshift */
763 2, /* size (0 = byte, 1 = short, 2 = long) */
764 16, /* bitsize */
765 FALSE, /* pc_relative */
766 0, /* bitpos */
767 complain_overflow_bitfield,/* complain_on_overflow */
768 bfd_elf_generic_reloc, /* special_function */
769 "R_ARM_THM_MOVT_ABS", /* name */
770 FALSE, /* partial_inplace */
771 0x040f70ff, /* src_mask */
772 0x040f70ff, /* dst_mask */
773 FALSE), /* pcrel_offset */
774
775 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
776 0, /* rightshift */
777 2, /* size (0 = byte, 1 = short, 2 = long) */
778 16, /* bitsize */
779 TRUE, /* pc_relative */
780 0, /* bitpos */
781 complain_overflow_dont,/* complain_on_overflow */
782 bfd_elf_generic_reloc, /* special_function */
783 "R_ARM_THM_MOVW_PREL_NC",/* name */
784 FALSE, /* partial_inplace */
785 0x040f70ff, /* src_mask */
786 0x040f70ff, /* dst_mask */
787 TRUE), /* pcrel_offset */
788
789 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
790 0, /* rightshift */
791 2, /* size (0 = byte, 1 = short, 2 = long) */
792 16, /* bitsize */
793 TRUE, /* pc_relative */
794 0, /* bitpos */
795 complain_overflow_bitfield,/* complain_on_overflow */
796 bfd_elf_generic_reloc, /* special_function */
797 "R_ARM_THM_MOVT_PREL", /* name */
798 FALSE, /* partial_inplace */
799 0x040f70ff, /* src_mask */
800 0x040f70ff, /* dst_mask */
801 TRUE), /* pcrel_offset */
802
803 HOWTO (R_ARM_THM_JUMP19, /* type */
804 1, /* rightshift */
805 2, /* size (0 = byte, 1 = short, 2 = long) */
806 19, /* bitsize */
807 TRUE, /* pc_relative */
808 0, /* bitpos */
809 complain_overflow_signed,/* complain_on_overflow */
810 bfd_elf_generic_reloc, /* special_function */
811 "R_ARM_THM_JUMP19", /* name */
812 FALSE, /* partial_inplace */
813 0x043f2fff, /* src_mask */
814 0x043f2fff, /* dst_mask */
815 TRUE), /* pcrel_offset */
816
817 HOWTO (R_ARM_THM_JUMP6, /* type */
818 1, /* rightshift */
819 1, /* size (0 = byte, 1 = short, 2 = long) */
820 6, /* bitsize */
821 TRUE, /* pc_relative */
822 0, /* bitpos */
823 complain_overflow_unsigned,/* complain_on_overflow */
824 bfd_elf_generic_reloc, /* special_function */
825 "R_ARM_THM_JUMP6", /* name */
826 FALSE, /* partial_inplace */
827 0x02f8, /* src_mask */
828 0x02f8, /* dst_mask */
829 TRUE), /* pcrel_offset */
830
831 /* These are declared as 13-bit signed relocations because we can
832 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
833 versa. */
834 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
835 0, /* rightshift */
836 2, /* size (0 = byte, 1 = short, 2 = long) */
837 13, /* bitsize */
838 TRUE, /* pc_relative */
839 0, /* bitpos */
2cab6cc3 840 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 841 bfd_elf_generic_reloc, /* special_function */
842 "R_ARM_THM_ALU_PREL_11_0",/* name */
843 FALSE, /* partial_inplace */
2cab6cc3
MS		 844 0xffffffff, /* src_mask */
845 0xffffffff, /* dst_mask */
c19d1205
ZW		 846 TRUE), /* pcrel_offset */
847
848 HOWTO (R_ARM_THM_PC12, /* type */
849 0, /* rightshift */
850 2, /* size (0 = byte, 1 = short, 2 = long) */
851 13, /* bitsize */
852 TRUE, /* pc_relative */
853 0, /* bitpos */
2cab6cc3 854 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 855 bfd_elf_generic_reloc, /* special_function */
856 "R_ARM_THM_PC12", /* name */
857 FALSE, /* partial_inplace */
2cab6cc3
MS		 858 0xffffffff, /* src_mask */
859 0xffffffff, /* dst_mask */
c19d1205
ZW		 860 TRUE), /* pcrel_offset */
861
862 HOWTO (R_ARM_ABS32_NOI, /* type */
863 0, /* rightshift */
864 2, /* size (0 = byte, 1 = short, 2 = long) */
865 32, /* bitsize */
866 FALSE, /* pc_relative */
867 0, /* bitpos */
868 complain_overflow_dont,/* complain_on_overflow */
869 bfd_elf_generic_reloc, /* special_function */
870 "R_ARM_ABS32_NOI", /* name */
871 FALSE, /* partial_inplace */
872 0xffffffff, /* src_mask */
873 0xffffffff, /* dst_mask */
874 FALSE), /* pcrel_offset */
875
876 HOWTO (R_ARM_REL32_NOI, /* type */
877 0, /* rightshift */
878 2, /* size (0 = byte, 1 = short, 2 = long) */
879 32, /* bitsize */
880 TRUE, /* pc_relative */
881 0, /* bitpos */
882 complain_overflow_dont,/* complain_on_overflow */
883 bfd_elf_generic_reloc, /* special_function */
884 "R_ARM_REL32_NOI", /* name */
885 FALSE, /* partial_inplace */
886 0xffffffff, /* src_mask */
887 0xffffffff, /* dst_mask */
888 FALSE), /* pcrel_offset */
7f266840 889
4962c51a
MS		 890 /* Group relocations. */
891
892 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
893 0, /* rightshift */
894 2, /* size (0 = byte, 1 = short, 2 = long) */
895 32, /* bitsize */
896 TRUE, /* pc_relative */
897 0, /* bitpos */
898 complain_overflow_dont,/* complain_on_overflow */
899 bfd_elf_generic_reloc, /* special_function */
900 "R_ARM_ALU_PC_G0_NC", /* name */
901 FALSE, /* partial_inplace */
902 0xffffffff, /* src_mask */
903 0xffffffff, /* dst_mask */
904 TRUE), /* pcrel_offset */
905
906 HOWTO (R_ARM_ALU_PC_G0, /* type */
907 0, /* rightshift */
908 2, /* size (0 = byte, 1 = short, 2 = long) */
909 32, /* bitsize */
910 TRUE, /* pc_relative */
911 0, /* bitpos */
912 complain_overflow_dont,/* complain_on_overflow */
913 bfd_elf_generic_reloc, /* special_function */
914 "R_ARM_ALU_PC_G0", /* name */
915 FALSE, /* partial_inplace */
916 0xffffffff, /* src_mask */
917 0xffffffff, /* dst_mask */
918 TRUE), /* pcrel_offset */
919
920 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
921 0, /* rightshift */
922 2, /* size (0 = byte, 1 = short, 2 = long) */
923 32, /* bitsize */
924 TRUE, /* pc_relative */
925 0, /* bitpos */
926 complain_overflow_dont,/* complain_on_overflow */
927 bfd_elf_generic_reloc, /* special_function */
928 "R_ARM_ALU_PC_G1_NC", /* name */
929 FALSE, /* partial_inplace */
930 0xffffffff, /* src_mask */
931 0xffffffff, /* dst_mask */
932 TRUE), /* pcrel_offset */
933
934 HOWTO (R_ARM_ALU_PC_G1, /* type */
935 0, /* rightshift */
936 2, /* size (0 = byte, 1 = short, 2 = long) */
937 32, /* bitsize */
938 TRUE, /* pc_relative */
939 0, /* bitpos */
940 complain_overflow_dont,/* complain_on_overflow */
941 bfd_elf_generic_reloc, /* special_function */
942 "R_ARM_ALU_PC_G1", /* name */
943 FALSE, /* partial_inplace */
944 0xffffffff, /* src_mask */
945 0xffffffff, /* dst_mask */
946 TRUE), /* pcrel_offset */
947
948 HOWTO (R_ARM_ALU_PC_G2, /* type */
949 0, /* rightshift */
950 2, /* size (0 = byte, 1 = short, 2 = long) */
951 32, /* bitsize */
952 TRUE, /* pc_relative */
953 0, /* bitpos */
954 complain_overflow_dont,/* complain_on_overflow */
955 bfd_elf_generic_reloc, /* special_function */
956 "R_ARM_ALU_PC_G2", /* name */
957 FALSE, /* partial_inplace */
958 0xffffffff, /* src_mask */
959 0xffffffff, /* dst_mask */
960 TRUE), /* pcrel_offset */
961
962 HOWTO (R_ARM_LDR_PC_G1, /* type */
963 0, /* rightshift */
964 2, /* size (0 = byte, 1 = short, 2 = long) */
965 32, /* bitsize */
966 TRUE, /* pc_relative */
967 0, /* bitpos */
968 complain_overflow_dont,/* complain_on_overflow */
969 bfd_elf_generic_reloc, /* special_function */
970 "R_ARM_LDR_PC_G1", /* name */
971 FALSE, /* partial_inplace */
972 0xffffffff, /* src_mask */
973 0xffffffff, /* dst_mask */
974 TRUE), /* pcrel_offset */
975
976 HOWTO (R_ARM_LDR_PC_G2, /* type */
977 0, /* rightshift */
978 2, /* size (0 = byte, 1 = short, 2 = long) */
979 32, /* bitsize */
980 TRUE, /* pc_relative */
981 0, /* bitpos */
982 complain_overflow_dont,/* complain_on_overflow */
983 bfd_elf_generic_reloc, /* special_function */
984 "R_ARM_LDR_PC_G2", /* name */
985 FALSE, /* partial_inplace */
986 0xffffffff, /* src_mask */
987 0xffffffff, /* dst_mask */
988 TRUE), /* pcrel_offset */
989
990 HOWTO (R_ARM_LDRS_PC_G0, /* type */
991 0, /* rightshift */
992 2, /* size (0 = byte, 1 = short, 2 = long) */
993 32, /* bitsize */
994 TRUE, /* pc_relative */
995 0, /* bitpos */
996 complain_overflow_dont,/* complain_on_overflow */
997 bfd_elf_generic_reloc, /* special_function */
998 "R_ARM_LDRS_PC_G0", /* name */
999 FALSE, /* partial_inplace */
1000 0xffffffff, /* src_mask */
1001 0xffffffff, /* dst_mask */
1002 TRUE), /* pcrel_offset */
1003
1004 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1005 0, /* rightshift */
1006 2, /* size (0 = byte, 1 = short, 2 = long) */
1007 32, /* bitsize */
1008 TRUE, /* pc_relative */
1009 0, /* bitpos */
1010 complain_overflow_dont,/* complain_on_overflow */
1011 bfd_elf_generic_reloc, /* special_function */
1012 "R_ARM_LDRS_PC_G1", /* name */
1013 FALSE, /* partial_inplace */
1014 0xffffffff, /* src_mask */
1015 0xffffffff, /* dst_mask */
1016 TRUE), /* pcrel_offset */
1017
1018 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1019 0, /* rightshift */
1020 2, /* size (0 = byte, 1 = short, 2 = long) */
1021 32, /* bitsize */
1022 TRUE, /* pc_relative */
1023 0, /* bitpos */
1024 complain_overflow_dont,/* complain_on_overflow */
1025 bfd_elf_generic_reloc, /* special_function */
1026 "R_ARM_LDRS_PC_G2", /* name */
1027 FALSE, /* partial_inplace */
1028 0xffffffff, /* src_mask */
1029 0xffffffff, /* dst_mask */
1030 TRUE), /* pcrel_offset */
1031
1032 HOWTO (R_ARM_LDC_PC_G0, /* type */
1033 0, /* rightshift */
1034 2, /* size (0 = byte, 1 = short, 2 = long) */
1035 32, /* bitsize */
1036 TRUE, /* pc_relative */
1037 0, /* bitpos */
1038 complain_overflow_dont,/* complain_on_overflow */
1039 bfd_elf_generic_reloc, /* special_function */
1040 "R_ARM_LDC_PC_G0", /* name */
1041 FALSE, /* partial_inplace */
1042 0xffffffff, /* src_mask */
1043 0xffffffff, /* dst_mask */
1044 TRUE), /* pcrel_offset */
1045
1046 HOWTO (R_ARM_LDC_PC_G1, /* type */
1047 0, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 32, /* bitsize */
1050 TRUE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_ARM_LDC_PC_G1", /* name */
1055 FALSE, /* partial_inplace */
1056 0xffffffff, /* src_mask */
1057 0xffffffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059
1060 HOWTO (R_ARM_LDC_PC_G2, /* type */
1061 0, /* rightshift */
1062 2, /* size (0 = byte, 1 = short, 2 = long) */
1063 32, /* bitsize */
1064 TRUE, /* pc_relative */
1065 0, /* bitpos */
1066 complain_overflow_dont,/* complain_on_overflow */
1067 bfd_elf_generic_reloc, /* special_function */
1068 "R_ARM_LDC_PC_G2", /* name */
1069 FALSE, /* partial_inplace */
1070 0xffffffff, /* src_mask */
1071 0xffffffff, /* dst_mask */
1072 TRUE), /* pcrel_offset */
1073
1074 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1075 0, /* rightshift */
1076 2, /* size (0 = byte, 1 = short, 2 = long) */
1077 32, /* bitsize */
1078 TRUE, /* pc_relative */
1079 0, /* bitpos */
1080 complain_overflow_dont,/* complain_on_overflow */
1081 bfd_elf_generic_reloc, /* special_function */
1082 "R_ARM_ALU_SB_G0_NC", /* name */
1083 FALSE, /* partial_inplace */
1084 0xffffffff, /* src_mask */
1085 0xffffffff, /* dst_mask */
1086 TRUE), /* pcrel_offset */
1087
1088 HOWTO (R_ARM_ALU_SB_G0, /* type */
1089 0, /* rightshift */
1090 2, /* size (0 = byte, 1 = short, 2 = long) */
1091 32, /* bitsize */
1092 TRUE, /* pc_relative */
1093 0, /* bitpos */
1094 complain_overflow_dont,/* complain_on_overflow */
1095 bfd_elf_generic_reloc, /* special_function */
1096 "R_ARM_ALU_SB_G0", /* name */
1097 FALSE, /* partial_inplace */
1098 0xffffffff, /* src_mask */
1099 0xffffffff, /* dst_mask */
1100 TRUE), /* pcrel_offset */
1101
1102 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 TRUE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 bfd_elf_generic_reloc, /* special_function */
1110 "R_ARM_ALU_SB_G1_NC", /* name */
1111 FALSE, /* partial_inplace */
1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
1114 TRUE), /* pcrel_offset */
1115
1116 HOWTO (R_ARM_ALU_SB_G1, /* type */
1117 0, /* rightshift */
1118 2, /* size (0 = byte, 1 = short, 2 = long) */
1119 32, /* bitsize */
1120 TRUE, /* pc_relative */
1121 0, /* bitpos */
1122 complain_overflow_dont,/* complain_on_overflow */
1123 bfd_elf_generic_reloc, /* special_function */
1124 "R_ARM_ALU_SB_G1", /* name */
1125 FALSE, /* partial_inplace */
1126 0xffffffff, /* src_mask */
1127 0xffffffff, /* dst_mask */
1128 TRUE), /* pcrel_offset */
1129
1130 HOWTO (R_ARM_ALU_SB_G2, /* type */
1131 0, /* rightshift */
1132 2, /* size (0 = byte, 1 = short, 2 = long) */
1133 32, /* bitsize */
1134 TRUE, /* pc_relative */
1135 0, /* bitpos */
1136 complain_overflow_dont,/* complain_on_overflow */
1137 bfd_elf_generic_reloc, /* special_function */
1138 "R_ARM_ALU_SB_G2", /* name */
1139 FALSE, /* partial_inplace */
1140 0xffffffff, /* src_mask */
1141 0xffffffff, /* dst_mask */
1142 TRUE), /* pcrel_offset */
1143
1144 HOWTO (R_ARM_LDR_SB_G0, /* type */
1145 0, /* rightshift */
1146 2, /* size (0 = byte, 1 = short, 2 = long) */
1147 32, /* bitsize */
1148 TRUE, /* pc_relative */
1149 0, /* bitpos */
1150 complain_overflow_dont,/* complain_on_overflow */
1151 bfd_elf_generic_reloc, /* special_function */
1152 "R_ARM_LDR_SB_G0", /* name */
1153 FALSE, /* partial_inplace */
1154 0xffffffff, /* src_mask */
1155 0xffffffff, /* dst_mask */
1156 TRUE), /* pcrel_offset */
1157
1158 HOWTO (R_ARM_LDR_SB_G1, /* type */
1159 0, /* rightshift */
1160 2, /* size (0 = byte, 1 = short, 2 = long) */
1161 32, /* bitsize */
1162 TRUE, /* pc_relative */
1163 0, /* bitpos */
1164 complain_overflow_dont,/* complain_on_overflow */
1165 bfd_elf_generic_reloc, /* special_function */
1166 "R_ARM_LDR_SB_G1", /* name */
1167 FALSE, /* partial_inplace */
1168 0xffffffff, /* src_mask */
1169 0xffffffff, /* dst_mask */
1170 TRUE), /* pcrel_offset */
1171
1172 HOWTO (R_ARM_LDR_SB_G2, /* type */
1173 0, /* rightshift */
1174 2, /* size (0 = byte, 1 = short, 2 = long) */
1175 32, /* bitsize */
1176 TRUE, /* pc_relative */
1177 0, /* bitpos */
1178 complain_overflow_dont,/* complain_on_overflow */
1179 bfd_elf_generic_reloc, /* special_function */
1180 "R_ARM_LDR_SB_G2", /* name */
1181 FALSE, /* partial_inplace */
1182 0xffffffff, /* src_mask */
1183 0xffffffff, /* dst_mask */
1184 TRUE), /* pcrel_offset */
1185
1186 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1187 0, /* rightshift */
1188 2, /* size (0 = byte, 1 = short, 2 = long) */
1189 32, /* bitsize */
1190 TRUE, /* pc_relative */
1191 0, /* bitpos */
1192 complain_overflow_dont,/* complain_on_overflow */
1193 bfd_elf_generic_reloc, /* special_function */
1194 "R_ARM_LDRS_SB_G0", /* name */
1195 FALSE, /* partial_inplace */
1196 0xffffffff, /* src_mask */
1197 0xffffffff, /* dst_mask */
1198 TRUE), /* pcrel_offset */
1199
1200 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1201 0, /* rightshift */
1202 2, /* size (0 = byte, 1 = short, 2 = long) */
1203 32, /* bitsize */
1204 TRUE, /* pc_relative */
1205 0, /* bitpos */
1206 complain_overflow_dont,/* complain_on_overflow */
1207 bfd_elf_generic_reloc, /* special_function */
1208 "R_ARM_LDRS_SB_G1", /* name */
1209 FALSE, /* partial_inplace */
1210 0xffffffff, /* src_mask */
1211 0xffffffff, /* dst_mask */
1212 TRUE), /* pcrel_offset */
1213
1214 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1215 0, /* rightshift */
1216 2, /* size (0 = byte, 1 = short, 2 = long) */
1217 32, /* bitsize */
1218 TRUE, /* pc_relative */
1219 0, /* bitpos */
1220 complain_overflow_dont,/* complain_on_overflow */
1221 bfd_elf_generic_reloc, /* special_function */
1222 "R_ARM_LDRS_SB_G2", /* name */
1223 FALSE, /* partial_inplace */
1224 0xffffffff, /* src_mask */
1225 0xffffffff, /* dst_mask */
1226 TRUE), /* pcrel_offset */
1227
1228 HOWTO (R_ARM_LDC_SB_G0, /* type */
1229 0, /* rightshift */
1230 2, /* size (0 = byte, 1 = short, 2 = long) */
1231 32, /* bitsize */
1232 TRUE, /* pc_relative */
1233 0, /* bitpos */
1234 complain_overflow_dont,/* complain_on_overflow */
1235 bfd_elf_generic_reloc, /* special_function */
1236 "R_ARM_LDC_SB_G0", /* name */
1237 FALSE, /* partial_inplace */
1238 0xffffffff, /* src_mask */
1239 0xffffffff, /* dst_mask */
1240 TRUE), /* pcrel_offset */
1241
1242 HOWTO (R_ARM_LDC_SB_G1, /* type */
1243 0, /* rightshift */
1244 2, /* size (0 = byte, 1 = short, 2 = long) */
1245 32, /* bitsize */
1246 TRUE, /* pc_relative */
1247 0, /* bitpos */
1248 complain_overflow_dont,/* complain_on_overflow */
1249 bfd_elf_generic_reloc, /* special_function */
1250 "R_ARM_LDC_SB_G1", /* name */
1251 FALSE, /* partial_inplace */
1252 0xffffffff, /* src_mask */
1253 0xffffffff, /* dst_mask */
1254 TRUE), /* pcrel_offset */
1255
1256 HOWTO (R_ARM_LDC_SB_G2, /* type */
1257 0, /* rightshift */
1258 2, /* size (0 = byte, 1 = short, 2 = long) */
1259 32, /* bitsize */
1260 TRUE, /* pc_relative */
1261 0, /* bitpos */
1262 complain_overflow_dont,/* complain_on_overflow */
1263 bfd_elf_generic_reloc, /* special_function */
1264 "R_ARM_LDC_SB_G2", /* name */
1265 FALSE, /* partial_inplace */
1266 0xffffffff, /* src_mask */
1267 0xffffffff, /* dst_mask */
1268 TRUE), /* pcrel_offset */
1269
1270 /* End of group relocations. */
c19d1205 1271
c19d1205
ZW		 1272 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1273 0, /* rightshift */
1274 2, /* size (0 = byte, 1 = short, 2 = long) */
1275 16, /* bitsize */
1276 FALSE, /* pc_relative */
1277 0, /* bitpos */
1278 complain_overflow_dont,/* complain_on_overflow */
1279 bfd_elf_generic_reloc, /* special_function */
1280 "R_ARM_MOVW_BREL_NC", /* name */
1281 FALSE, /* partial_inplace */
1282 0x0000ffff, /* src_mask */
1283 0x0000ffff, /* dst_mask */
1284 FALSE), /* pcrel_offset */
1285
1286 HOWTO (R_ARM_MOVT_BREL, /* type */
1287 0, /* rightshift */
1288 2, /* size (0 = byte, 1 = short, 2 = long) */
1289 16, /* bitsize */
1290 FALSE, /* pc_relative */
1291 0, /* bitpos */
1292 complain_overflow_bitfield,/* complain_on_overflow */
1293 bfd_elf_generic_reloc, /* special_function */
1294 "R_ARM_MOVT_BREL", /* name */
1295 FALSE, /* partial_inplace */
1296 0x0000ffff, /* src_mask */
1297 0x0000ffff, /* dst_mask */
1298 FALSE), /* pcrel_offset */
1299
1300 HOWTO (R_ARM_MOVW_BREL, /* type */
1301 0, /* rightshift */
1302 2, /* size (0 = byte, 1 = short, 2 = long) */
1303 16, /* bitsize */
1304 FALSE, /* pc_relative */
1305 0, /* bitpos */
1306 complain_overflow_dont,/* complain_on_overflow */
1307 bfd_elf_generic_reloc, /* special_function */
1308 "R_ARM_MOVW_BREL", /* name */
1309 FALSE, /* partial_inplace */
1310 0x0000ffff, /* src_mask */
1311 0x0000ffff, /* dst_mask */
1312 FALSE), /* pcrel_offset */
1313
1314 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1315 0, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 16, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_dont,/* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 "R_ARM_THM_MOVW_BREL_NC",/* name */
1323 FALSE, /* partial_inplace */
1324 0x040f70ff, /* src_mask */
1325 0x040f70ff, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
1328 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1329 0, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 16, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_bitfield,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_ARM_THM_MOVT_BREL", /* name */
1337 FALSE, /* partial_inplace */
1338 0x040f70ff, /* src_mask */
1339 0x040f70ff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1343 0, /* rightshift */
1344 2, /* size (0 = byte, 1 = short, 2 = long) */
1345 16, /* bitsize */
1346 FALSE, /* pc_relative */
1347 0, /* bitpos */
1348 complain_overflow_dont,/* complain_on_overflow */
1349 bfd_elf_generic_reloc, /* special_function */
1350 "R_ARM_THM_MOVW_BREL", /* name */
1351 FALSE, /* partial_inplace */
1352 0x040f70ff, /* src_mask */
1353 0x040f70ff, /* dst_mask */
1354 FALSE), /* pcrel_offset */
1355
0855e32b
NS		 1356 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1357 0, /* rightshift */
1358 2, /* size (0 = byte, 1 = short, 2 = long) */
1359 32, /* bitsize */
1360 FALSE, /* pc_relative */
1361 0, /* bitpos */
1362 complain_overflow_bitfield,/* complain_on_overflow */
1363 NULL, /* special_function */
1364 "R_ARM_TLS_GOTDESC", /* name */
1365 TRUE, /* partial_inplace */
1366 0xffffffff, /* src_mask */
1367 0xffffffff, /* dst_mask */
1368 FALSE), /* pcrel_offset */
1369
1370 HOWTO (R_ARM_TLS_CALL, /* type */
1371 0, /* rightshift */
1372 2, /* size (0 = byte, 1 = short, 2 = long) */
1373 24, /* bitsize */
1374 FALSE, /* pc_relative */
1375 0, /* bitpos */
1376 complain_overflow_dont,/* complain_on_overflow */
1377 bfd_elf_generic_reloc, /* special_function */
1378 "R_ARM_TLS_CALL", /* name */
1379 FALSE, /* partial_inplace */
1380 0x00ffffff, /* src_mask */
1381 0x00ffffff, /* dst_mask */
1382 FALSE), /* pcrel_offset */
1383
1384 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1385 0, /* rightshift */
1386 2, /* size (0 = byte, 1 = short, 2 = long) */
1387 0, /* bitsize */
1388 FALSE, /* pc_relative */
1389 0, /* bitpos */
1390 complain_overflow_bitfield,/* complain_on_overflow */
1391 bfd_elf_generic_reloc, /* special_function */
1392 "R_ARM_TLS_DESCSEQ", /* name */
1393 FALSE, /* partial_inplace */
1394 0x00000000, /* src_mask */
1395 0x00000000, /* dst_mask */
1396 FALSE), /* pcrel_offset */
1397
1398 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1399 0, /* rightshift */
1400 2, /* size (0 = byte, 1 = short, 2 = long) */
1401 24, /* bitsize */
1402 FALSE, /* pc_relative */
1403 0, /* bitpos */
1404 complain_overflow_dont,/* complain_on_overflow */
1405 bfd_elf_generic_reloc, /* special_function */
1406 "R_ARM_THM_TLS_CALL", /* name */
1407 FALSE, /* partial_inplace */
1408 0x07ff07ff, /* src_mask */
1409 0x07ff07ff, /* dst_mask */
1410 FALSE), /* pcrel_offset */
c19d1205
ZW		 1411
1412 HOWTO (R_ARM_PLT32_ABS, /* type */
1413 0, /* rightshift */
1414 2, /* size (0 = byte, 1 = short, 2 = long) */
1415 32, /* bitsize */
1416 FALSE, /* pc_relative */
1417 0, /* bitpos */
1418 complain_overflow_dont,/* complain_on_overflow */
1419 bfd_elf_generic_reloc, /* special_function */
1420 "R_ARM_PLT32_ABS", /* name */
1421 FALSE, /* partial_inplace */
1422 0xffffffff, /* src_mask */
1423 0xffffffff, /* dst_mask */
1424 FALSE), /* pcrel_offset */
1425
1426 HOWTO (R_ARM_GOT_ABS, /* type */
1427 0, /* rightshift */
1428 2, /* size (0 = byte, 1 = short, 2 = long) */
1429 32, /* bitsize */
1430 FALSE, /* pc_relative */
1431 0, /* bitpos */
1432 complain_overflow_dont,/* complain_on_overflow */
1433 bfd_elf_generic_reloc, /* special_function */
1434 "R_ARM_GOT_ABS", /* name */
1435 FALSE, /* partial_inplace */
1436 0xffffffff, /* src_mask */
1437 0xffffffff, /* dst_mask */
1438 FALSE), /* pcrel_offset */
1439
1440 HOWTO (R_ARM_GOT_PREL, /* type */
1441 0, /* rightshift */
1442 2, /* size (0 = byte, 1 = short, 2 = long) */
1443 32, /* bitsize */
1444 TRUE, /* pc_relative */
1445 0, /* bitpos */
1446 complain_overflow_dont, /* complain_on_overflow */
1447 bfd_elf_generic_reloc, /* special_function */
1448 "R_ARM_GOT_PREL", /* name */
1449 FALSE, /* partial_inplace */
1450 0xffffffff, /* src_mask */
1451 0xffffffff, /* dst_mask */
1452 TRUE), /* pcrel_offset */
1453
1454 HOWTO (R_ARM_GOT_BREL12, /* type */
1455 0, /* rightshift */
1456 2, /* size (0 = byte, 1 = short, 2 = long) */
1457 12, /* bitsize */
1458 FALSE, /* pc_relative */
1459 0, /* bitpos */
1460 complain_overflow_bitfield,/* complain_on_overflow */
1461 bfd_elf_generic_reloc, /* special_function */
1462 "R_ARM_GOT_BREL12", /* name */
1463 FALSE, /* partial_inplace */
1464 0x00000fff, /* src_mask */
1465 0x00000fff, /* dst_mask */
1466 FALSE), /* pcrel_offset */
1467
1468 HOWTO (R_ARM_GOTOFF12, /* type */
1469 0, /* rightshift */
1470 2, /* size (0 = byte, 1 = short, 2 = long) */
1471 12, /* bitsize */
1472 FALSE, /* pc_relative */
1473 0, /* bitpos */
1474 complain_overflow_bitfield,/* complain_on_overflow */
1475 bfd_elf_generic_reloc, /* special_function */
1476 "R_ARM_GOTOFF12", /* name */
1477 FALSE, /* partial_inplace */
1478 0x00000fff, /* src_mask */
1479 0x00000fff, /* dst_mask */
1480 FALSE), /* pcrel_offset */
1481
1482 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1483
1484 /* GNU extension to record C++ vtable member usage */
1485 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1486 0, /* rightshift */
1487 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1488 0, /* bitsize */
ba93b8ac
DJ		 1489 FALSE, /* pc_relative */
1490 0, /* bitpos */
c19d1205
ZW		 1491 complain_overflow_dont, /* complain_on_overflow */
1492 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1493 "R_ARM_GNU_VTENTRY", /* name */
1494 FALSE, /* partial_inplace */
1495 0, /* src_mask */
1496 0, /* dst_mask */
1497 FALSE), /* pcrel_offset */
1498
1499 /* GNU extension to record C++ vtable hierarchy */
1500 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1501 0, /* rightshift */
1502 2, /* size (0 = byte, 1 = short, 2 = long) */
1503 0, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont, /* complain_on_overflow */
1507 NULL, /* special_function */
1508 "R_ARM_GNU_VTINHERIT", /* name */
1509 FALSE, /* partial_inplace */
1510 0, /* src_mask */
1511 0, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513
1514 HOWTO (R_ARM_THM_JUMP11, /* type */
1515 1, /* rightshift */
1516 1, /* size (0 = byte, 1 = short, 2 = long) */
1517 11, /* bitsize */
1518 TRUE, /* pc_relative */
1519 0, /* bitpos */
1520 complain_overflow_signed, /* complain_on_overflow */
1521 bfd_elf_generic_reloc, /* special_function */
1522 "R_ARM_THM_JUMP11", /* name */
1523 FALSE, /* partial_inplace */
1524 0x000007ff, /* src_mask */
1525 0x000007ff, /* dst_mask */
1526 TRUE), /* pcrel_offset */
1527
1528 HOWTO (R_ARM_THM_JUMP8, /* type */
1529 1, /* rightshift */
1530 1, /* size (0 = byte, 1 = short, 2 = long) */
1531 8, /* bitsize */
1532 TRUE, /* pc_relative */
1533 0, /* bitpos */
1534 complain_overflow_signed, /* complain_on_overflow */
1535 bfd_elf_generic_reloc, /* special_function */
1536 "R_ARM_THM_JUMP8", /* name */
1537 FALSE, /* partial_inplace */
1538 0x000000ff, /* src_mask */
1539 0x000000ff, /* dst_mask */
1540 TRUE), /* pcrel_offset */
ba93b8ac 1541
c19d1205
ZW		 1542 /* TLS relocations */
1543 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1544 0, /* rightshift */
1545 2, /* size (0 = byte, 1 = short, 2 = long) */
1546 32, /* bitsize */
1547 FALSE, /* pc_relative */
1548 0, /* bitpos */
1549 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1550 NULL, /* special_function */
1551 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1552 TRUE, /* partial_inplace */
1553 0xffffffff, /* src_mask */
1554 0xffffffff, /* dst_mask */
c19d1205 1555 FALSE), /* pcrel_offset */
ba93b8ac 1556
ba93b8ac
DJ		 1557 HOWTO (R_ARM_TLS_LDM32, /* type */
1558 0, /* rightshift */
1559 2, /* size (0 = byte, 1 = short, 2 = long) */
1560 32, /* bitsize */
1561 FALSE, /* pc_relative */
1562 0, /* bitpos */
1563 complain_overflow_bitfield,/* complain_on_overflow */
1564 bfd_elf_generic_reloc, /* special_function */
1565 "R_ARM_TLS_LDM32", /* name */
1566 TRUE, /* partial_inplace */
1567 0xffffffff, /* src_mask */
1568 0xffffffff, /* dst_mask */
c19d1205 1569 FALSE), /* pcrel_offset */
ba93b8ac 1570
c19d1205 1571 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1572 0, /* rightshift */
1573 2, /* size (0 = byte, 1 = short, 2 = long) */
1574 32, /* bitsize */
1575 FALSE, /* pc_relative */
1576 0, /* bitpos */
1577 complain_overflow_bitfield,/* complain_on_overflow */
1578 bfd_elf_generic_reloc, /* special_function */
c19d1205 1579 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1580 TRUE, /* partial_inplace */
1581 0xffffffff, /* src_mask */
1582 0xffffffff, /* dst_mask */
c19d1205 1583 FALSE), /* pcrel_offset */
ba93b8ac 1584
ba93b8ac
DJ		 1585 HOWTO (R_ARM_TLS_IE32, /* type */
1586 0, /* rightshift */
1587 2, /* size (0 = byte, 1 = short, 2 = long) */
1588 32, /* bitsize */
1589 FALSE, /* pc_relative */
1590 0, /* bitpos */
1591 complain_overflow_bitfield,/* complain_on_overflow */
1592 NULL, /* special_function */
1593 "R_ARM_TLS_IE32", /* name */
1594 TRUE, /* partial_inplace */
1595 0xffffffff, /* src_mask */
1596 0xffffffff, /* dst_mask */
c19d1205 1597 FALSE), /* pcrel_offset */
7f266840 1598
c19d1205 1599 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1600 0, /* rightshift */
1601 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1602 32, /* bitsize */
7f266840
DJ		 1603 FALSE, /* pc_relative */
1604 0, /* bitpos */
c19d1205
ZW		 1605 complain_overflow_bitfield,/* complain_on_overflow */
1606 bfd_elf_generic_reloc, /* special_function */
1607 "R_ARM_TLS_LE32", /* name */
1608 TRUE, /* partial_inplace */
1609 0xffffffff, /* src_mask */
1610 0xffffffff, /* dst_mask */
1611 FALSE), /* pcrel_offset */
7f266840 1612
c19d1205
ZW		 1613 HOWTO (R_ARM_TLS_LDO12, /* type */
1614 0, /* rightshift */
1615 2, /* size (0 = byte, 1 = short, 2 = long) */
1616 12, /* bitsize */
1617 FALSE, /* pc_relative */
7f266840 1618 0, /* bitpos */
c19d1205 1619 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1620 bfd_elf_generic_reloc, /* special_function */
c19d1205 1621 "R_ARM_TLS_LDO12", /* name */
7f266840 1622 FALSE, /* partial_inplace */
c19d1205
ZW		 1623 0x00000fff, /* src_mask */
1624 0x00000fff, /* dst_mask */
1625 FALSE), /* pcrel_offset */
7f266840 1626
c19d1205
ZW		 1627 HOWTO (R_ARM_TLS_LE12, /* type */
1628 0, /* rightshift */
1629 2, /* size (0 = byte, 1 = short, 2 = long) */
1630 12, /* bitsize */
1631 FALSE, /* pc_relative */
7f266840 1632 0, /* bitpos */
c19d1205 1633 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1634 bfd_elf_generic_reloc, /* special_function */
c19d1205 1635 "R_ARM_TLS_LE12", /* name */
7f266840 1636 FALSE, /* partial_inplace */
c19d1205
ZW		 1637 0x00000fff, /* src_mask */
1638 0x00000fff, /* dst_mask */
1639 FALSE), /* pcrel_offset */
7f266840 1640
c19d1205 1641 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1642 0, /* rightshift */
1643 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1644 12, /* bitsize */
1645 FALSE, /* pc_relative */
7f266840 1646 0, /* bitpos */
c19d1205 1647 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1648 bfd_elf_generic_reloc, /* special_function */
c19d1205 1649 "R_ARM_TLS_IE12GP", /* name */
7f266840 1650 FALSE, /* partial_inplace */
c19d1205
ZW		 1651 0x00000fff, /* src_mask */
1652 0x00000fff, /* dst_mask */
1653 FALSE), /* pcrel_offset */
0855e32b 1654
34e77a92 1655 /* 112-127 private relocations. */
0855e32b
NS		 1656 EMPTY_HOWTO (112),
1657 EMPTY_HOWTO (113),
1658 EMPTY_HOWTO (114),
1659 EMPTY_HOWTO (115),
1660 EMPTY_HOWTO (116),
1661 EMPTY_HOWTO (117),
1662 EMPTY_HOWTO (118),
1663 EMPTY_HOWTO (119),
1664 EMPTY_HOWTO (120),
1665 EMPTY_HOWTO (121),
1666 EMPTY_HOWTO (122),
1667 EMPTY_HOWTO (123),
1668 EMPTY_HOWTO (124),
1669 EMPTY_HOWTO (125),
1670 EMPTY_HOWTO (126),
1671 EMPTY_HOWTO (127),
34e77a92
RS		 1672
1673 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1674 EMPTY_HOWTO (128),
1675
1676 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1677 0, /* rightshift */
1678 1, /* size (0 = byte, 1 = short, 2 = long) */
1679 0, /* bitsize */
1680 FALSE, /* pc_relative */
1681 0, /* bitpos */
1682 complain_overflow_bitfield,/* complain_on_overflow */
1683 bfd_elf_generic_reloc, /* special_function */
1684 "R_ARM_THM_TLS_DESCSEQ",/* name */
1685 FALSE, /* partial_inplace */
1686 0x00000000, /* src_mask */
1687 0x00000000, /* dst_mask */
1688 FALSE), /* pcrel_offset */
c19d1205
ZW		 1689};
1690
34e77a92
RS		 1691/* 160 onwards: */
1692static reloc_howto_type elf32_arm_howto_table_2[1] =
1693{
1694 HOWTO (R_ARM_IRELATIVE, /* type */
1695 0, /* rightshift */
1696 2, /* size (0 = byte, 1 = short, 2 = long) */
1697 32, /* bitsize */
1698 FALSE, /* pc_relative */
1699 0, /* bitpos */
1700 complain_overflow_bitfield,/* complain_on_overflow */
1701 bfd_elf_generic_reloc, /* special_function */
1702 "R_ARM_IRELATIVE", /* name */
1703 TRUE, /* partial_inplace */
1704 0xffffffff, /* src_mask */
1705 0xffffffff, /* dst_mask */
1706 FALSE) /* pcrel_offset */
1707};
c19d1205 1708
34e77a92
RS		 1709/* 249-255 extended, currently unused, relocations: */
1710static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1711{
1712 HOWTO (R_ARM_RREL32, /* type */
1713 0, /* rightshift */
1714 0, /* size (0 = byte, 1 = short, 2 = long) */
1715 0, /* bitsize */
1716 FALSE, /* pc_relative */
1717 0, /* bitpos */
1718 complain_overflow_dont,/* complain_on_overflow */
1719 bfd_elf_generic_reloc, /* special_function */
1720 "R_ARM_RREL32", /* name */
1721 FALSE, /* partial_inplace */
1722 0, /* src_mask */
1723 0, /* dst_mask */
1724 FALSE), /* pcrel_offset */
1725
1726 HOWTO (R_ARM_RABS32, /* type */
1727 0, /* rightshift */
1728 0, /* size (0 = byte, 1 = short, 2 = long) */
1729 0, /* bitsize */
1730 FALSE, /* pc_relative */
1731 0, /* bitpos */
1732 complain_overflow_dont,/* complain_on_overflow */
1733 bfd_elf_generic_reloc, /* special_function */
1734 "R_ARM_RABS32", /* name */
1735 FALSE, /* partial_inplace */
1736 0, /* src_mask */
1737 0, /* dst_mask */
1738 FALSE), /* pcrel_offset */
1739
1740 HOWTO (R_ARM_RPC24, /* type */
1741 0, /* rightshift */
1742 0, /* size (0 = byte, 1 = short, 2 = long) */
1743 0, /* bitsize */
1744 FALSE, /* pc_relative */
1745 0, /* bitpos */
1746 complain_overflow_dont,/* complain_on_overflow */
1747 bfd_elf_generic_reloc, /* special_function */
1748 "R_ARM_RPC24", /* name */
1749 FALSE, /* partial_inplace */
1750 0, /* src_mask */
1751 0, /* dst_mask */
1752 FALSE), /* pcrel_offset */
1753
1754 HOWTO (R_ARM_RBASE, /* type */
1755 0, /* rightshift */
1756 0, /* size (0 = byte, 1 = short, 2 = long) */
1757 0, /* bitsize */
1758 FALSE, /* pc_relative */
1759 0, /* bitpos */
1760 complain_overflow_dont,/* complain_on_overflow */
1761 bfd_elf_generic_reloc, /* special_function */
1762 "R_ARM_RBASE", /* name */
1763 FALSE, /* partial_inplace */
1764 0, /* src_mask */
1765 0, /* dst_mask */
1766 FALSE) /* pcrel_offset */
1767};
1768
1769static reloc_howto_type *
1770elf32_arm_howto_from_type (unsigned int r_type)
1771{
906e58ca 1772 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1773 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1774
34e77a92
RS		 1775 if (r_type == R_ARM_IRELATIVE)
1776 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1777
c19d1205 1778 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1779 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1780 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1781
c19d1205 1782 return NULL;
7f266840
DJ		 1783}
1784
1785static void
1786elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1787 Elf_Internal_Rela * elf_reloc)
1788{
1789 unsigned int r_type;
1790
1791 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1792 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1793}
1794
1795struct elf32_arm_reloc_map
1796 {
1797 bfd_reloc_code_real_type bfd_reloc_val;
1798 unsigned char elf_reloc_val;
1799 };
1800
1801/* All entries in this list must also be present in elf32_arm_howto_table. */
1802static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1803 {
1804 {BFD_RELOC_NONE, R_ARM_NONE},
1805 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1806 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1807 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1808 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1809 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1810 {BFD_RELOC_32, R_ARM_ABS32},
1811 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1812 {BFD_RELOC_8, R_ARM_ABS8},
1813 {BFD_RELOC_16, R_ARM_ABS16},
1814 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1815 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1816 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1822 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1823 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1824 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1825 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1826 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1827 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1828 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1829 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1830 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1831 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1832 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1833 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1834 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1835 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1836 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1837 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1838 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1839 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1840 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1841 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1842 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1843 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1844 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1845 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1846 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1847 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1848 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1849 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1850 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1851 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1852 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1853 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1854 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1855 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1856 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1857 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1858 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1859 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1860 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1861 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1862 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1863 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1864 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1865 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1866 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1867 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1868 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1869 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1870 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1871 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1872 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1873 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1874 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1875 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1876 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1877 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1878 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1879 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1880 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1881 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1882 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1883 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1884 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1885 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1886 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1887 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1888 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1889 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1890 };
1891
1892static reloc_howto_type *
f1c71a59
ZW		 1893elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1894 bfd_reloc_code_real_type code)
7f266840
DJ		 1895{
1896 unsigned int i;
8029a119 1897
906e58ca 1898 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1899 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1900 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1901
c19d1205 1902 return NULL;
7f266840
DJ		 1903}
1904
157090f7
AM		 1905static reloc_howto_type *
1906elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1907 const char *r_name)
1908{
1909 unsigned int i;
1910
906e58ca 1911 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1912 if (elf32_arm_howto_table_1[i].name != NULL
1913 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1914 return &elf32_arm_howto_table_1[i];
1915
906e58ca 1916 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1917 if (elf32_arm_howto_table_2[i].name != NULL
1918 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1919 return &elf32_arm_howto_table_2[i];
1920
34e77a92
RS		 1921 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1922 if (elf32_arm_howto_table_3[i].name != NULL
1923 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1924 return &elf32_arm_howto_table_3[i];
1925
157090f7
AM		 1926 return NULL;
1927}
1928
906e58ca
NC		 1929/* Support for core dump NOTE sections. */
1930
7f266840 1931static bfd_boolean
f1c71a59 1932elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1933{
1934 int offset;
1935 size_t size;
1936
1937 switch (note->descsz)
1938 {
1939 default:
1940 return FALSE;
1941
8029a119 1942 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1943 /* pr_cursig */
1944 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1945
1946 /* pr_pid */
261b8d08 1947 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1948
1949 /* pr_reg */
1950 offset = 72;
1951 size = 72;
1952
1953 break;
1954 }
1955
1956 /* Make a ".reg/999" section. */
1957 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1958 size, note->descpos + offset);
1959}
1960
1961static bfd_boolean
f1c71a59 1962elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1963{
1964 switch (note->descsz)
1965 {
1966 default:
1967 return FALSE;
1968
8029a119 1969 case 124: /* Linux/ARM elf_prpsinfo. */
4395ee08
UW		 1970 elf_tdata (abfd)->core_pid
1971 = bfd_get_32 (abfd, note->descdata + 12);
7f266840
DJ		 1972 elf_tdata (abfd)->core_program
1973 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1974 elf_tdata (abfd)->core_command
1975 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1976 }
1977
1978 /* Note that for some reason, a spurious space is tacked
1979 onto the end of the args in some (at least one anyway)
1980 implementations, so strip it off if it exists. */
7f266840
DJ		 1981 {
1982 char *command = elf_tdata (abfd)->core_command;
1983 int n = strlen (command);
1984
1985 if (0 < n && command[n - 1] == ' ')
1986 command[n - 1] = '\0';
1987 }
1988
1989 return TRUE;
1990}
1991
1f20dca5
UW		 1992static char *
1993elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1994 int note_type, ...)
1995{
1996 switch (note_type)
1997 {
1998 default:
1999 return NULL;
2000
2001 case NT_PRPSINFO:
2002 {
2003 char data[124];
2004 va_list ap;
2005
2006 va_start (ap, note_type);
2007 memset (data, 0, sizeof (data));
2008 strncpy (data + 28, va_arg (ap, const char *), 16);
2009 strncpy (data + 44, va_arg (ap, const char *), 80);
2010 va_end (ap);
2011
2012 return elfcore_write_note (abfd, buf, bufsiz,
2013 "CORE", note_type, data, sizeof (data));
2014 }
2015
2016 case NT_PRSTATUS:
2017 {
2018 char data[148];
2019 va_list ap;
2020 long pid;
2021 int cursig;
2022 const void *greg;
2023
2024 va_start (ap, note_type);
2025 memset (data, 0, sizeof (data));
2026 pid = va_arg (ap, long);
2027 bfd_put_32 (abfd, pid, data + 24);
2028 cursig = va_arg (ap, int);
2029 bfd_put_16 (abfd, cursig, data + 12);
2030 greg = va_arg (ap, const void *);
2031 memcpy (data + 72, greg, 72);
2032 va_end (ap);
2033
2034 return elfcore_write_note (abfd, buf, bufsiz,
2035 "CORE", note_type, data, sizeof (data));
2036 }
2037 }
2038}
2039
7f266840
DJ		 2040#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2041#define TARGET_LITTLE_NAME "elf32-littlearm"
2042#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2043#define TARGET_BIG_NAME "elf32-bigarm"
2044
2045#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2046#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2047#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2048
252b5132
RH		 2049typedef unsigned long int insn32;
2050typedef unsigned short int insn16;
2051
3a4a14e9
PB		 2052/* In lieu of proper flags, assume all EABIv4 or later objects are
2053 interworkable. */
57e8b36a 2054#define INTERWORK_FLAG(abfd) \
3a4a14e9 2055 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2056 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2057 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2058
252b5132
RH		 2059/* The linker script knows the section names for placement.
2060 The entry_names are used to do simple name mangling on the stubs.
2061 Given a function name, and its type, the stub can be found. The
9b485d32 2062 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2063#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2064#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2065
2066#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2067#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2068
c7b8f16e
JB		 2069#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2070#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2071
845b51d6
PB		 2072#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2073#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2074
7413f23f
DJ		 2075#define STUB_ENTRY_NAME "__%s_veneer"
2076
252b5132
RH		 2077/* The name of the dynamic interpreter. This is put in the .interp
2078 section. */
2079#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2080
0855e32b 2081static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2082{
2083 0xe08e0000, /* add r0, lr, r0 */
2084 0xe5901004, /* ldr r1, [r0,#4] */
2085 0xe12fff11, /* bx r1 */
2086};
0855e32b
NS		 2087
2088static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2089{
2090 0xe52d2004, /* push {r2} */
2091 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2092 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2093 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2094 0xe081100f, /* 2: add r1, pc */
2095 0xe12fff12, /* bx r2 */
2096 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
0855e32b 2097 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2098 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2099};
0855e32b 2100
5e681ec4
PB		 2101#ifdef FOUR_WORD_PLT
2102
252b5132
RH		 2103/* The first entry in a procedure linkage table looks like
2104 this. It is set up so that any shared library function that is
59f2c4e7 2105 called before the relocation has been set up calls the dynamic
9b485d32 2106 linker first. */
e5a52504 2107static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2108{
2109 0xe52de004, /* str lr, [sp, #-4]! */
2110 0xe59fe010, /* ldr lr, [pc, #16] */
2111 0xe08fe00e, /* add lr, pc, lr */
2112 0xe5bef008, /* ldr pc, [lr, #8]! */
2113};
5e681ec4
PB		 2114
2115/* Subsequent entries in a procedure linkage table look like
2116 this. */
e5a52504 2117static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2118{
2119 0xe28fc600, /* add ip, pc, #NN */
2120 0xe28cca00, /* add ip, ip, #NN */
2121 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2122 0x00000000, /* unused */
2123};
5e681ec4
PB		 2124
2125#else
2126
5e681ec4
PB		 2127/* The first entry in a procedure linkage table looks like
2128 this. It is set up so that any shared library function that is
2129 called before the relocation has been set up calls the dynamic
2130 linker first. */
e5a52504 2131static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2132{
2133 0xe52de004, /* str lr, [sp, #-4]! */
2134 0xe59fe004, /* ldr lr, [pc, #4] */
2135 0xe08fe00e, /* add lr, pc, lr */
2136 0xe5bef008, /* ldr pc, [lr, #8]! */
2137 0x00000000, /* &GOT[0] - . */
2138};
252b5132
RH		 2139
2140/* Subsequent entries in a procedure linkage table look like
2141 this. */
e5a52504 2142static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2143{
2144 0xe28fc600, /* add ip, pc, #0xNN00000 */
2145 0xe28cca00, /* add ip, ip, #0xNN000 */
2146 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2147};
5e681ec4
PB		 2148
2149#endif
252b5132 2150
00a97672
RS		 2151/* The format of the first entry in the procedure linkage table
2152 for a VxWorks executable. */
2153static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2154{
2155 0xe52dc008, /* str ip,[sp,#-8]! */
2156 0xe59fc000, /* ldr ip,[pc] */
2157 0xe59cf008, /* ldr pc,[ip,#8] */
2158 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2159};
00a97672
RS		 2160
2161/* The format of subsequent entries in a VxWorks executable. */
2162static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2163{
2164 0xe59fc000, /* ldr ip,[pc] */
2165 0xe59cf000, /* ldr pc,[ip] */
2166 0x00000000, /* .long @got */
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xea000000, /* b _PLT */
2169 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2170};
00a97672
RS		 2171
2172/* The format of entries in a VxWorks shared library. */
2173static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2174{
2175 0xe59fc000, /* ldr ip,[pc] */
2176 0xe79cf009, /* ldr pc,[ip,r9] */
2177 0x00000000, /* .long @got */
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe599f008, /* ldr pc,[r9,#8] */
2180 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2181};
00a97672 2182
b7693d02
DJ		 2183/* An initial stub used if the PLT entry is referenced from Thumb code. */
2184#define PLT_THUMB_STUB_SIZE 4
2185static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2186{
2187 0x4778, /* bx pc */
2188 0x46c0 /* nop */
2189};
b7693d02 2190
e5a52504
MM		 2191/* The entries in a PLT when using a DLL-based target with multiple
2192 address spaces. */
906e58ca 2193static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2194{
2195 0xe51ff004, /* ldr pc, [pc, #-4] */
2196 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2197};
2198
2199/* The first entry in a procedure linkage table looks like
2200 this. It is set up so that any shared library function that is
2201 called before the relocation has been set up calls the dynamic
2202 linker first. */
2203static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2204{
2205 /* First bundle: */
2206 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2207 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2208 0xe08cc00f, /* add ip, ip, pc */
2209 0xe52dc008, /* str ip, [sp, #-8]! */
2210 /* Second bundle: */
2211 0xe7dfcf1f, /* bfc ip, #30, #2 */
2212 0xe59cc000, /* ldr ip, [ip] */
2213 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2214 0xe12fff1c, /* bx ip */
2215 /* Third bundle: */
2216 0xe320f000, /* nop */
2217 0xe320f000, /* nop */
2218 0xe320f000, /* nop */
2219 /* .Lplt_tail: */
2220 0xe50dc004, /* str ip, [sp, #-4] */
2221 /* Fourth bundle: */
2222 0xe7dfcf1f, /* bfc ip, #30, #2 */
2223 0xe59cc000, /* ldr ip, [ip] */
2224 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2225 0xe12fff1c, /* bx ip */
2226};
2227#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2228
2229/* Subsequent entries in a procedure linkage table look like this. */
2230static const bfd_vma elf32_arm_nacl_plt_entry [] =
2231{
2232 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2233 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2234 0xe08cc00f, /* add ip, ip, pc */
2235 0xea000000, /* b .Lplt_tail */
2236};
e5a52504 2237
906e58ca
NC		 2238#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2239#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2240#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2241#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2242#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2243#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2244
461a49ca 2245enum stub_insn_type
b38cadfb
NC		 2246{
2247 THUMB16_TYPE = 1,
2248 THUMB32_TYPE,
2249 ARM_TYPE,
2250 DATA_TYPE
2251};
461a49ca 2252
48229727
JB		 2253#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2254/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2255 is inserted in arm_build_one_stub(). */
2256#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2257#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2258#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2259#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2260#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2261#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2262
2263typedef struct
2264{
b38cadfb
NC		 2265 bfd_vma data;
2266 enum stub_insn_type type;
2267 unsigned int r_type;
2268 int reloc_addend;
461a49ca
DJ		 2269} insn_sequence;
2270
fea2b4d6
CL		 2271/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2272 to reach the stub if necessary. */
461a49ca 2273static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2274{
2275 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2276 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2277};
906e58ca 2278
fea2b4d6
CL		 2279/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2280 available. */
461a49ca 2281static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2282{
2283 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2284 ARM_INSN (0xe12fff1c), /* bx ip */
2285 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2286};
906e58ca 2287
d3626fb0 2288/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2289static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2290{
2291 THUMB16_INSN (0xb401), /* push {r0} */
2292 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2293 THUMB16_INSN (0x4684), /* mov ip, r0 */
2294 THUMB16_INSN (0xbc01), /* pop {r0} */
2295 THUMB16_INSN (0x4760), /* bx ip */
2296 THUMB16_INSN (0xbf00), /* nop */
2297 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2298};
906e58ca 2299
d3626fb0
CL		 2300/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2301 allowed. */
2302static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2303{
2304 THUMB16_INSN (0x4778), /* bx pc */
2305 THUMB16_INSN (0x46c0), /* nop */
2306 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2307 ARM_INSN (0xe12fff1c), /* bx ip */
2308 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2309};
d3626fb0 2310
fea2b4d6
CL		 2311/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2312 available. */
461a49ca 2313static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2314{
2315 THUMB16_INSN (0x4778), /* bx pc */
2316 THUMB16_INSN (0x46c0), /* nop */
2317 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2318 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2319};
906e58ca 2320
fea2b4d6
CL		 2321/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2322 one, when the destination is close enough. */
461a49ca 2323static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2324{
2325 THUMB16_INSN (0x4778), /* bx pc */
2326 THUMB16_INSN (0x46c0), /* nop */
2327 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2328};
c820be07 2329
cf3eccff 2330/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2331 blx to reach the stub if necessary. */
cf3eccff 2332static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2333{
2334 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2335 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2336 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2337};
906e58ca 2338
cf3eccff
DJ		 2339/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2340 blx to reach the stub if necessary. We can not add into pc;
2341 it is not guaranteed to mode switch (different in ARMv6 and
2342 ARMv7). */
2343static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2344{
2345 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2346 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2347 ARM_INSN (0xe12fff1c), /* bx ip */
2348 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2349};
cf3eccff 2350
ebe24dd4
CL		 2351/* V4T ARM -> ARM long branch stub, PIC. */
2352static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2353{
2354 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2355 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2356 ARM_INSN (0xe12fff1c), /* bx ip */
2357 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2358};
ebe24dd4
CL		 2359
2360/* V4T Thumb -> ARM long branch stub, PIC. */
2361static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2362{
2363 THUMB16_INSN (0x4778), /* bx pc */
2364 THUMB16_INSN (0x46c0), /* nop */
2365 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2366 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2367 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2368};
ebe24dd4 2369
d3626fb0
CL		 2370/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2371 architectures. */
ebe24dd4 2372static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2373{
2374 THUMB16_INSN (0xb401), /* push {r0} */
2375 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2376 THUMB16_INSN (0x46fc), /* mov ip, pc */
2377 THUMB16_INSN (0x4484), /* add ip, r0 */
2378 THUMB16_INSN (0xbc01), /* pop {r0} */
2379 THUMB16_INSN (0x4760), /* bx ip */
2380 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2381};
ebe24dd4 2382
d3626fb0
CL		 2383/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2384 allowed. */
2385static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2386{
2387 THUMB16_INSN (0x4778), /* bx pc */
2388 THUMB16_INSN (0x46c0), /* nop */
2389 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2390 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2391 ARM_INSN (0xe12fff1c), /* bx ip */
2392 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2393};
d3626fb0 2394
0855e32b
NS		 2395/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2396 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2397static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2398{
b38cadfb
NC		 2399 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2400 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2401 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2402};
2403
2404/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2405 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2406static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2407{
b38cadfb
NC		 2408 THUMB16_INSN (0x4778), /* bx pc */
2409 THUMB16_INSN (0x46c0), /* nop */
2410 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2411 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2412 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2413};
2414
48229727
JB		 2415/* Cortex-A8 erratum-workaround stubs. */
2416
2417/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2418 can't use a conditional branch to reach this stub). */
2419
2420static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2421{
2422 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2423 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2424 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2425};
48229727
JB		 2426
2427/* Stub used for b.w and bl.w instructions. */
2428
2429static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2430{
2431 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2432};
48229727
JB		 2433
2434static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2435{
2436 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2437};
48229727
JB		 2438
2439/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2440 instruction (which switches to ARM mode) to point to this stub. Jump to the
2441 real destination using an ARM-mode branch. */
2442
2443static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2444{
2445 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2446};
48229727 2447
9553db3c
NC		 2448/* For each section group there can be a specially created linker section
2449 to hold the stubs for that group. The name of the stub section is based
2450 upon the name of another section within that group with the suffix below
2451 applied.
2452
2453 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2454 create what appeared to be a linker stub section when it actually
2455 contained user code/data. For example, consider this fragment:
b38cadfb 2456
9553db3c
NC		 2457 const char * stubborn_problems[] = { "np" };
2458
2459 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2460 section called:
2461
2462 .data.rel.local.stubborn_problems
2463
2464 This then causes problems in arm32_arm_build_stubs() as it triggers:
2465
2466 // Ignore non-stub sections.
2467 if (!strstr (stub_sec->name, STUB_SUFFIX))
2468 continue;
2469
2470 And so the section would be ignored instead of being processed. Hence
2471 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2472 C identifier. */
2473#define STUB_SUFFIX ".__stub"
906e58ca 2474
738a79f6
CL		 2475/* One entry per long/short branch stub defined above. */
2476#define DEF_STUBS \
2477 DEF_STUB(long_branch_any_any) \
2478 DEF_STUB(long_branch_v4t_arm_thumb) \
2479 DEF_STUB(long_branch_thumb_only) \
2480 DEF_STUB(long_branch_v4t_thumb_thumb) \
2481 DEF_STUB(long_branch_v4t_thumb_arm) \
2482 DEF_STUB(short_branch_v4t_thumb_arm) \
2483 DEF_STUB(long_branch_any_arm_pic) \
2484 DEF_STUB(long_branch_any_thumb_pic) \
2485 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2486 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2487 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2488 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2489 DEF_STUB(long_branch_any_tls_pic) \
2490 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2491 DEF_STUB(a8_veneer_b_cond) \
2492 DEF_STUB(a8_veneer_b) \
2493 DEF_STUB(a8_veneer_bl) \
2494 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2495
2496#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2497enum elf32_arm_stub_type
2498{
906e58ca 2499 arm_stub_none,
738a79f6 2500 DEF_STUBS
eb7c4339
NS		 2501 /* Note the first a8_veneer type */
2502 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2503};
2504#undef DEF_STUB
2505
2506typedef struct
2507{
d3ce72d0 2508 const insn_sequence* template_sequence;
738a79f6
CL		 2509 int template_size;
2510} stub_def;
2511
2512#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2513static const stub_def stub_definitions[] =
2514{
738a79f6
CL		 2515 {NULL, 0},
2516 DEF_STUBS
906e58ca
NC		 2517};
2518
2519struct elf32_arm_stub_hash_entry
2520{
2521 /* Base hash table entry structure. */
2522 struct bfd_hash_entry root;
2523
2524 /* The stub section. */
2525 asection *stub_sec;
2526
2527 /* Offset within stub_sec of the beginning of this stub. */
2528 bfd_vma stub_offset;
2529
2530 /* Given the symbol's value and its section we can determine its final
2531 value when building the stubs (so the stub knows where to jump). */
2532 bfd_vma target_value;
2533 asection *target_section;
2534
48229727
JB		 2535 /* Offset to apply to relocation referencing target_value. */
2536 bfd_vma target_addend;
2537
2538 /* The instruction which caused this stub to be generated (only valid for
2539 Cortex-A8 erratum workaround stubs at present). */
2540 unsigned long orig_insn;
2541
461a49ca 2542 /* The stub type. */
906e58ca 2543 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2544 /* Its encoding size in bytes. */
2545 int stub_size;
2546 /* Its template. */
2547 const insn_sequence *stub_template;
2548 /* The size of the template (number of entries). */
2549 int stub_template_size;
906e58ca
NC		 2550
2551 /* The symbol table entry, if any, that this was derived from. */
2552 struct elf32_arm_link_hash_entry *h;
2553
35fc36a8
RS		 2554 /* Type of branch. */
2555 enum arm_st_branch_type branch_type;
906e58ca
NC		 2556
2557 /* Where this stub is being called from, or, in the case of combined
2558 stub sections, the first input section in the group. */
2559 asection *id_sec;
7413f23f
DJ		 2560
2561 /* The name for the local symbol at the start of this stub. The
2562 stub name in the hash table has to be unique; this does not, so
2563 it can be friendlier. */
2564 char *output_name;
906e58ca
NC		 2565};
2566
e489d0ae
PB		 2567/* Used to build a map of a section. This is required for mixed-endian
2568 code/data. */
2569
2570typedef struct elf32_elf_section_map
2571{
2572 bfd_vma vma;
2573 char type;
2574}
2575elf32_arm_section_map;
2576
c7b8f16e
JB		 2577/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2578
2579typedef enum
2580{
2581 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2582 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2583 VFP11_ERRATUM_ARM_VENEER,
2584 VFP11_ERRATUM_THUMB_VENEER
2585}
2586elf32_vfp11_erratum_type;
2587
2588typedef struct elf32_vfp11_erratum_list
2589{
2590 struct elf32_vfp11_erratum_list *next;
2591 bfd_vma vma;
2592 union
2593 {
2594 struct
2595 {
2596 struct elf32_vfp11_erratum_list *veneer;
2597 unsigned int vfp_insn;
2598 } b;
2599 struct
2600 {
2601 struct elf32_vfp11_erratum_list *branch;
2602 unsigned int id;
2603 } v;
2604 } u;
2605 elf32_vfp11_erratum_type type;
2606}
2607elf32_vfp11_erratum_list;
2608
2468f9c9
PB		 2609typedef enum
2610{
2611 DELETE_EXIDX_ENTRY,
2612 INSERT_EXIDX_CANTUNWIND_AT_END
2613}
2614arm_unwind_edit_type;
2615
2616/* A (sorted) list of edits to apply to an unwind table. */
2617typedef struct arm_unwind_table_edit
2618{
2619 arm_unwind_edit_type type;
2620 /* Note: we sometimes want to insert an unwind entry corresponding to a
2621 section different from the one we're currently writing out, so record the
2622 (text) section this edit relates to here. */
2623 asection *linked_section;
2624 unsigned int index;
2625 struct arm_unwind_table_edit *next;
2626}
2627arm_unwind_table_edit;
2628
8e3de13a 2629typedef struct _arm_elf_section_data
e489d0ae 2630{
2468f9c9 2631 /* Information about mapping symbols. */
e489d0ae 2632 struct bfd_elf_section_data elf;
8e3de13a 2633 unsigned int mapcount;
c7b8f16e 2634 unsigned int mapsize;
e489d0ae 2635 elf32_arm_section_map *map;
2468f9c9 2636 /* Information about CPU errata. */
c7b8f16e
JB		 2637 unsigned int erratumcount;
2638 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2639 /* Information about unwind tables. */
2640 union
2641 {
2642 /* Unwind info attached to a text section. */
2643 struct
2644 {
2645 asection *arm_exidx_sec;
2646 } text;
2647
2648 /* Unwind info attached to an .ARM.exidx section. */
2649 struct
2650 {
2651 arm_unwind_table_edit *unwind_edit_list;
2652 arm_unwind_table_edit *unwind_edit_tail;
2653 } exidx;
2654 } u;
8e3de13a
NC		 2655}
2656_arm_elf_section_data;
e489d0ae
PB		 2657
2658#define elf32_arm_section_data(sec) \
8e3de13a 2659 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2660
48229727
JB		 2661/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2662 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2663 so may be created multiple times: we use an array of these entries whilst
2664 relaxing which we can refresh easily, then create stubs for each potentially
2665 erratum-triggering instruction once we've settled on a solution. */
2666
b38cadfb
NC		 2667struct a8_erratum_fix
2668{
48229727
JB		 2669 bfd *input_bfd;
2670 asection *section;
2671 bfd_vma offset;
2672 bfd_vma addend;
2673 unsigned long orig_insn;
2674 char *stub_name;
2675 enum elf32_arm_stub_type stub_type;
35fc36a8 2676 enum arm_st_branch_type branch_type;
48229727
JB		 2677};
2678
2679/* A table of relocs applied to branches which might trigger Cortex-A8
2680 erratum. */
2681
b38cadfb
NC		 2682struct a8_erratum_reloc
2683{
48229727
JB		 2684 bfd_vma from;
2685 bfd_vma destination;
92750f34
DJ		 2686 struct elf32_arm_link_hash_entry *hash;
2687 const char *sym_name;
48229727 2688 unsigned int r_type;
35fc36a8 2689 enum arm_st_branch_type branch_type;
48229727
JB		 2690 bfd_boolean non_a8_stub;
2691};
2692
ba93b8ac
DJ		 2693/* The size of the thread control block. */
2694#define TCB_SIZE 8
2695
34e77a92
RS		 2696/* ARM-specific information about a PLT entry, over and above the usual
2697 gotplt_union. */
b38cadfb
NC		 2698struct arm_plt_info
2699{
34e77a92
RS		 2700 /* We reference count Thumb references to a PLT entry separately,
2701 so that we can emit the Thumb trampoline only if needed. */
2702 bfd_signed_vma thumb_refcount;
2703
2704 /* Some references from Thumb code may be eliminated by BL->BLX
2705 conversion, so record them separately. */
2706 bfd_signed_vma maybe_thumb_refcount;
2707
2708 /* How many of the recorded PLT accesses were from non-call relocations.
2709 This information is useful when deciding whether anything takes the
2710 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2711 non-call references to the function should resolve directly to the
2712 real runtime target. */
2713 unsigned int noncall_refcount;
2714
2715 /* Since PLT entries have variable size if the Thumb prologue is
2716 used, we need to record the index into .got.plt instead of
2717 recomputing it from the PLT offset. */
2718 bfd_signed_vma got_offset;
2719};
2720
2721/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2722struct arm_local_iplt_info
2723{
34e77a92
RS		 2724 /* The information that is usually found in the generic ELF part of
2725 the hash table entry. */
2726 union gotplt_union root;
2727
2728 /* The information that is usually found in the ARM-specific part of
2729 the hash table entry. */
2730 struct arm_plt_info arm;
2731
2732 /* A list of all potential dynamic relocations against this symbol. */
2733 struct elf_dyn_relocs *dyn_relocs;
2734};
2735
0ffa91dd 2736struct elf_arm_obj_tdata
ba93b8ac
DJ		 2737{
2738 struct elf_obj_tdata root;
2739
2740 /* tls_type for each local got entry. */
2741 char *local_got_tls_type;
ee065d83 2742
0855e32b
NS		 2743 /* GOTPLT entries for TLS descriptors. */
2744 bfd_vma *local_tlsdesc_gotent;
2745
34e77a92
RS		 2746 /* Information for local symbols that need entries in .iplt. */
2747 struct arm_local_iplt_info **local_iplt;
2748
bf21ed78
MS		 2749 /* Zero to warn when linking objects with incompatible enum sizes. */
2750 int no_enum_size_warning;
a9dc9481
JM		 2751
2752 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2753 int no_wchar_size_warning;
ba93b8ac
DJ		 2754};
2755
0ffa91dd
NC		 2756#define elf_arm_tdata(bfd) \
2757 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2758
0ffa91dd
NC		 2759#define elf32_arm_local_got_tls_type(bfd) \
2760 (elf_arm_tdata (bfd)->local_got_tls_type)
2761
0855e32b
NS		 2762#define elf32_arm_local_tlsdesc_gotent(bfd) \
2763 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2764
34e77a92
RS		 2765#define elf32_arm_local_iplt(bfd) \
2766 (elf_arm_tdata (bfd)->local_iplt)
2767
0ffa91dd
NC		 2768#define is_arm_elf(bfd) \
2769 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2770 && elf_tdata (bfd) != NULL \
4dfe6ac6 2771 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2772
2773static bfd_boolean
2774elf32_arm_mkobject (bfd *abfd)
2775{
0ffa91dd 2776 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2777 ARM_ELF_DATA);
ba93b8ac
DJ		 2778}
2779
ba93b8ac
DJ		 2780#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2781
ba96a88f 2782/* Arm ELF linker hash entry. */
252b5132 2783struct elf32_arm_link_hash_entry
b38cadfb
NC		 2784{
2785 struct elf_link_hash_entry root;
252b5132 2786
b38cadfb
NC		 2787 /* Track dynamic relocs copied for this symbol. */
2788 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2789
b38cadfb
NC		 2790 /* ARM-specific PLT information. */
2791 struct arm_plt_info plt;
ba93b8ac
DJ		 2792
2793#define GOT_UNKNOWN 0
2794#define GOT_NORMAL 1
2795#define GOT_TLS_GD 2
2796#define GOT_TLS_IE 4
0855e32b
NS		 2797#define GOT_TLS_GDESC 8
2798#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2799 unsigned int tls_type : 8;
34e77a92 2800
b38cadfb
NC		 2801 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2802 unsigned int is_iplt : 1;
34e77a92 2803
b38cadfb 2804 unsigned int unused : 23;
a4fd1a8e 2805
b38cadfb
NC		 2806 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2807 starting at the end of the jump table. */
2808 bfd_vma tlsdesc_got;
0855e32b 2809
b38cadfb
NC		 2810 /* The symbol marking the real symbol location for exported thumb
2811 symbols with Arm stubs. */
2812 struct elf_link_hash_entry *export_glue;
906e58ca 2813
b38cadfb 2814 /* A pointer to the most recently used stub hash entry against this
8029a119 2815 symbol. */
b38cadfb
NC		 2816 struct elf32_arm_stub_hash_entry *stub_cache;
2817};
252b5132 2818
252b5132 2819/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2820#define elf32_arm_link_hash_traverse(table, func, info) \
2821 (elf_link_hash_traverse \
2822 (&(table)->root, \
b7693d02 2823 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2824 (info)))
2825
2826/* Get the ARM elf linker hash table from a link_info structure. */
2827#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2828 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2829 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2830
906e58ca
NC		 2831#define arm_stub_hash_lookup(table, string, create, copy) \
2832 ((struct elf32_arm_stub_hash_entry *) \
2833 bfd_hash_lookup ((table), (string), (create), (copy)))
2834
21d799b5
NC		 2835/* Array to keep track of which stub sections have been created, and
2836 information on stub grouping. */
2837struct map_stub
2838{
2839 /* This is the section to which stubs in the group will be
2840 attached. */
2841 asection *link_sec;
2842 /* The stub section. */
2843 asection *stub_sec;
2844};
2845
0855e32b
NS		 2846#define elf32_arm_compute_jump_table_size(htab) \
2847 ((htab)->next_tls_desc_index * 4)
2848
9b485d32 2849/* ARM ELF linker hash table. */
252b5132 2850struct elf32_arm_link_hash_table
906e58ca
NC		 2851{
2852 /* The main hash table. */
2853 struct elf_link_hash_table root;
252b5132 2854
906e58ca
NC		 2855 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2856 bfd_size_type thumb_glue_size;
252b5132 2857
906e58ca
NC		 2858 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2859 bfd_size_type arm_glue_size;
252b5132 2860
906e58ca
NC		 2861 /* The size in bytes of section containing the ARMv4 BX veneers. */
2862 bfd_size_type bx_glue_size;
845b51d6 2863
906e58ca
NC		 2864 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2865 veneer has been populated. */
2866 bfd_vma bx_glue_offset[15];
845b51d6 2867
906e58ca
NC		 2868 /* The size in bytes of the section containing glue for VFP11 erratum
2869 veneers. */
2870 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2871
48229727
JB		 2872 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2873 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2874 elf32_arm_write_section(). */
2875 struct a8_erratum_fix *a8_erratum_fixes;
2876 unsigned int num_a8_erratum_fixes;
2877
906e58ca
NC		 2878 /* An arbitrary input BFD chosen to hold the glue sections. */
2879 bfd * bfd_of_glue_owner;
ba96a88f 2880
906e58ca
NC		 2881 /* Nonzero to output a BE8 image. */
2882 int byteswap_code;
e489d0ae 2883
906e58ca
NC		 2884 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2885 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2886 int target1_is_rel;
9c504268 2887
906e58ca
NC		 2888 /* The relocation to use for R_ARM_TARGET2 relocations. */
2889 int target2_reloc;
eb043451 2890
906e58ca
NC		 2891 /* 0 = Ignore R_ARM_V4BX.
2892 1 = Convert BX to MOV PC.
2893 2 = Generate v4 interworing stubs. */
2894 int fix_v4bx;
319850b4 2895
48229727
JB		 2896 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2897 int fix_cortex_a8;
2898
2de70689
MGD		 2899 /* Whether we should fix the ARM1176 BLX immediate issue. */
2900 int fix_arm1176;
2901
906e58ca
NC		 2902 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2903 int use_blx;
33bfe774 2904
906e58ca
NC		 2905 /* What sort of code sequences we should look for which may trigger the
2906 VFP11 denorm erratum. */
2907 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2908
906e58ca
NC		 2909 /* Global counter for the number of fixes we have emitted. */
2910 int num_vfp11_fixes;
c7b8f16e 2911
906e58ca
NC		 2912 /* Nonzero to force PIC branch veneers. */
2913 int pic_veneer;
27e55c4d 2914
906e58ca
NC		 2915 /* The number of bytes in the initial entry in the PLT. */
2916 bfd_size_type plt_header_size;
e5a52504 2917
906e58ca
NC		 2918 /* The number of bytes in the subsequent PLT etries. */
2919 bfd_size_type plt_entry_size;
e5a52504 2920
906e58ca
NC		 2921 /* True if the target system is VxWorks. */
2922 int vxworks_p;
00a97672 2923
906e58ca
NC		 2924 /* True if the target system is Symbian OS. */
2925 int symbian_p;
e5a52504 2926
b38cadfb
NC		 2927 /* True if the target system is Native Client. */
2928 int nacl_p;
2929
906e58ca
NC		 2930 /* True if the target uses REL relocations. */
2931 int use_rel;
4e7fd91e 2932
0855e32b
NS		 2933 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2934 bfd_vma next_tls_desc_index;
2935
2936 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2937 bfd_vma num_tls_desc;
2938
906e58ca 2939 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2940 asection *sdynbss;
2941 asection *srelbss;
5e681ec4 2942
906e58ca
NC		 2943 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2944 asection *srelplt2;
00a97672 2945
0855e32b
NS		 2946 /* The offset into splt of the PLT entry for the TLS descriptor
2947 resolver. Special values are 0, if not necessary (or not found
2948 to be necessary yet), and -1 if needed but not determined
2949 yet. */
2950 bfd_vma dt_tlsdesc_plt;
2951
2952 /* The offset into sgot of the GOT entry used by the PLT entry
2953 above. */
b38cadfb 2954 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 2955
2956 /* Offset in .plt section of tls_arm_trampoline. */
2957 bfd_vma tls_trampoline;
2958
906e58ca
NC		 2959 /* Data for R_ARM_TLS_LDM32 relocations. */
2960 union
2961 {
2962 bfd_signed_vma refcount;
2963 bfd_vma offset;
2964 } tls_ldm_got;
b7693d02 2965
87d72d41
AM		 2966 /* Small local sym cache. */
2967 struct sym_cache sym_cache;
906e58ca
NC		 2968
2969 /* For convenience in allocate_dynrelocs. */
2970 bfd * obfd;
2971
0855e32b
NS		 2972 /* The amount of space used by the reserved portion of the sgotplt
2973 section, plus whatever space is used by the jump slots. */
2974 bfd_vma sgotplt_jump_table_size;
2975
906e58ca
NC		 2976 /* The stub hash table. */
2977 struct bfd_hash_table stub_hash_table;
2978
2979 /* Linker stub bfd. */
2980 bfd *stub_bfd;
2981
2982 /* Linker call-backs. */
2983 asection * (*add_stub_section) (const char *, asection *);
2984 void (*layout_sections_again) (void);
2985
2986 /* Array to keep track of which stub sections have been created, and
2987 information on stub grouping. */
21d799b5 2988 struct map_stub *stub_group;
906e58ca 2989
fe33d2fa
CL		 2990 /* Number of elements in stub_group. */
2991 int top_id;
2992
906e58ca
NC		 2993 /* Assorted information used by elf32_arm_size_stubs. */
2994 unsigned int bfd_count;
2995 int top_index;
2996 asection **input_list;
2997};
252b5132 2998
780a67af
NC		 2999/* Create an entry in an ARM ELF linker hash table. */
3000
3001static struct bfd_hash_entry *
57e8b36a
NC		 3002elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3003 struct bfd_hash_table * table,
3004 const char * string)
780a67af
NC		 3005{
3006 struct elf32_arm_link_hash_entry * ret =
3007 (struct elf32_arm_link_hash_entry *) entry;
3008
3009 /* Allocate the structure if it has not already been allocated by a
3010 subclass. */
906e58ca 3011 if (ret == NULL)
21d799b5
NC		 3012 ret = (struct elf32_arm_link_hash_entry *)
3013 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3014 if (ret == NULL)
780a67af
NC		 3015 return (struct bfd_hash_entry *) ret;
3016
3017 /* Call the allocation method of the superclass. */
3018 ret = ((struct elf32_arm_link_hash_entry *)
3019 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3020 table, string));
57e8b36a 3021 if (ret != NULL)
b7693d02 3022 {
0bdcacaf 3023 ret->dyn_relocs = NULL;
ba93b8ac 3024 ret->tls_type = GOT_UNKNOWN;
0855e32b 3025 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3026 ret->plt.thumb_refcount = 0;
3027 ret->plt.maybe_thumb_refcount = 0;
3028 ret->plt.noncall_refcount = 0;
3029 ret->plt.got_offset = -1;
3030 ret->is_iplt = FALSE;
a4fd1a8e 3031 ret->export_glue = NULL;
906e58ca
NC		 3032
3033 ret->stub_cache = NULL;
b7693d02 3034 }
780a67af
NC		 3035
3036 return (struct bfd_hash_entry *) ret;
3037}
3038
34e77a92
RS		 3039/* Ensure that we have allocated bookkeeping structures for ABFD's local
3040 symbols. */
3041
3042static bfd_boolean
3043elf32_arm_allocate_local_sym_info (bfd *abfd)
3044{
3045 if (elf_local_got_refcounts (abfd) == NULL)
3046 {
3047 bfd_size_type num_syms;
3048 bfd_size_type size;
3049 char *data;
3050
3051 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3052 size = num_syms * (sizeof (bfd_signed_vma)
3053 + sizeof (struct arm_local_iplt_info *)
3054 + sizeof (bfd_vma)
3055 + sizeof (char));
3056 data = bfd_zalloc (abfd, size);
3057 if (data == NULL)
3058 return FALSE;
3059
3060 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3061 data += num_syms * sizeof (bfd_signed_vma);
3062
3063 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3064 data += num_syms * sizeof (struct arm_local_iplt_info *);
3065
3066 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3067 data += num_syms * sizeof (bfd_vma);
3068
3069 elf32_arm_local_got_tls_type (abfd) = data;
3070 }
3071 return TRUE;
3072}
3073
3074/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3075 to input bfd ABFD. Create the information if it doesn't already exist.
3076 Return null if an allocation fails. */
3077
3078static struct arm_local_iplt_info *
3079elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3080{
3081 struct arm_local_iplt_info **ptr;
3082
3083 if (!elf32_arm_allocate_local_sym_info (abfd))
3084 return NULL;
3085
3086 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3087 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3088 if (*ptr == NULL)
3089 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3090 return *ptr;
3091}
3092
3093/* Try to obtain PLT information for the symbol with index R_SYMNDX
3094 in ABFD's symbol table. If the symbol is global, H points to its
3095 hash table entry, otherwise H is null.
3096
3097 Return true if the symbol does have PLT information. When returning
3098 true, point *ROOT_PLT at the target-independent reference count/offset
3099 union and *ARM_PLT at the ARM-specific information. */
3100
3101static bfd_boolean
3102elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3103 unsigned long r_symndx, union gotplt_union **root_plt,
3104 struct arm_plt_info **arm_plt)
3105{
3106 struct arm_local_iplt_info *local_iplt;
3107
3108 if (h != NULL)
3109 {
3110 *root_plt = &h->root.plt;
3111 *arm_plt = &h->plt;
3112 return TRUE;
3113 }
3114
3115 if (elf32_arm_local_iplt (abfd) == NULL)
3116 return FALSE;
3117
3118 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3119 if (local_iplt == NULL)
3120 return FALSE;
3121
3122 *root_plt = &local_iplt->root;
3123 *arm_plt = &local_iplt->arm;
3124 return TRUE;
3125}
3126
3127/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3128 before it. */
3129
3130static bfd_boolean
3131elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3132 struct arm_plt_info *arm_plt)
3133{
3134 struct elf32_arm_link_hash_table *htab;
3135
3136 htab = elf32_arm_hash_table (info);
3137 return (arm_plt->thumb_refcount != 0
3138 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3139}
3140
3141/* Return a pointer to the head of the dynamic reloc list that should
3142 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3143 ABFD's symbol table. Return null if an error occurs. */
3144
3145static struct elf_dyn_relocs **
3146elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3147 Elf_Internal_Sym *isym)
3148{
3149 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3150 {
3151 struct arm_local_iplt_info *local_iplt;
3152
3153 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3154 if (local_iplt == NULL)
3155 return NULL;
3156 return &local_iplt->dyn_relocs;
3157 }
3158 else
3159 {
3160 /* Track dynamic relocs needed for local syms too.
3161 We really need local syms available to do this
3162 easily. Oh well. */
3163 asection *s;
3164 void *vpp;
3165
3166 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3167 if (s == NULL)
3168 abort ();
3169
3170 vpp = &elf_section_data (s)->local_dynrel;
3171 return (struct elf_dyn_relocs **) vpp;
3172 }
3173}
3174
906e58ca
NC		 3175/* Initialize an entry in the stub hash table. */
3176
3177static struct bfd_hash_entry *
3178stub_hash_newfunc (struct bfd_hash_entry *entry,
3179 struct bfd_hash_table *table,
3180 const char *string)
3181{
3182 /* Allocate the structure if it has not already been allocated by a
3183 subclass. */
3184 if (entry == NULL)
3185 {
21d799b5
NC		 3186 entry = (struct bfd_hash_entry *)
3187 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3188 if (entry == NULL)
3189 return entry;
3190 }
3191
3192 /* Call the allocation method of the superclass. */
3193 entry = bfd_hash_newfunc (entry, table, string);
3194 if (entry != NULL)
3195 {
3196 struct elf32_arm_stub_hash_entry *eh;
3197
3198 /* Initialize the local fields. */
3199 eh = (struct elf32_arm_stub_hash_entry *) entry;
3200 eh->stub_sec = NULL;
3201 eh->stub_offset = 0;
3202 eh->target_value = 0;
3203 eh->target_section = NULL;
cedfb179
DK		 3204 eh->target_addend = 0;
3205 eh->orig_insn = 0;
906e58ca 3206 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3207 eh->stub_size = 0;
3208 eh->stub_template = NULL;
3209 eh->stub_template_size = 0;
906e58ca
NC		 3210 eh->h = NULL;
3211 eh->id_sec = NULL;
d8d2f433 3212 eh->output_name = NULL;
906e58ca
NC		 3213 }
3214
3215 return entry;
3216}
3217
00a97672 3218/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3219 shortcuts to them in our hash table. */
3220
3221static bfd_boolean
57e8b36a 3222create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3223{
3224 struct elf32_arm_link_hash_table *htab;
3225
e5a52504 3226 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3227 if (htab == NULL)
3228 return FALSE;
3229
e5a52504
MM		 3230 /* BPABI objects never have a GOT, or associated sections. */
3231 if (htab->symbian_p)
3232 return TRUE;
3233
5e681ec4
PB		 3234 if (! _bfd_elf_create_got_section (dynobj, info))
3235 return FALSE;
3236
5e681ec4
PB		 3237 return TRUE;
3238}
3239
34e77a92
RS		 3240/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3241
3242static bfd_boolean
3243create_ifunc_sections (struct bfd_link_info *info)
3244{
3245 struct elf32_arm_link_hash_table *htab;
3246 const struct elf_backend_data *bed;
3247 bfd *dynobj;
3248 asection *s;
3249 flagword flags;
b38cadfb 3250
34e77a92
RS		 3251 htab = elf32_arm_hash_table (info);
3252 dynobj = htab->root.dynobj;
3253 bed = get_elf_backend_data (dynobj);
3254 flags = bed->dynamic_sec_flags;
3255
3256 if (htab->root.iplt == NULL)
3257 {
3258 s = bfd_make_section_with_flags (dynobj, ".iplt",
3259 flags | SEC_READONLY | SEC_CODE);
3260 if (s == NULL
3261 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3262 return FALSE;
3263 htab->root.iplt = s;
3264 }
3265
3266 if (htab->root.irelplt == NULL)
3267 {
3268 s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
3269 flags | SEC_READONLY);
3270 if (s == NULL
3271 || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
3272 return FALSE;
3273 htab->root.irelplt = s;
3274 }
3275
3276 if (htab->root.igotplt == NULL)
3277 {
3278 s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
3279 if (s == NULL
3280 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3281 return FALSE;
3282 htab->root.igotplt = s;
3283 }
3284 return TRUE;
3285}
3286
00a97672
RS		 3287/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3288 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3289 hash table. */
3290
3291static bfd_boolean
57e8b36a 3292elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3293{
3294 struct elf32_arm_link_hash_table *htab;
3295
3296 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3297 if (htab == NULL)
3298 return FALSE;
3299
362d30a1 3300 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3301 return FALSE;
3302
3303 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3304 return FALSE;
3305
5e681ec4
PB		 3306 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
3307 if (!info->shared)
00a97672
RS		 3308 htab->srelbss = bfd_get_section_by_name (dynobj,
3309 RELOC_SECTION (htab, ".bss"));
3310
3311 if (htab->vxworks_p)
3312 {
3313 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3314 return FALSE;
3315
3316 if (info->shared)
3317 {
3318 htab->plt_header_size = 0;
3319 htab->plt_entry_size
3320 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3321 }
3322 else
3323 {
3324 htab->plt_header_size
3325 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3326 htab->plt_entry_size
3327 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3328 }
3329 }
5e681ec4 3330
362d30a1
RS		 3331 if (!htab->root.splt
3332 || !htab->root.srelplt
e5a52504 3333 || !htab->sdynbss
5e681ec4
PB		 3334 || (!info->shared && !htab->srelbss))
3335 abort ();
3336
3337 return TRUE;
3338}
3339
906e58ca
NC		 3340/* Copy the extra info we tack onto an elf_link_hash_entry. */
3341
3342static void
3343elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3344 struct elf_link_hash_entry *dir,
3345 struct elf_link_hash_entry *ind)
3346{
3347 struct elf32_arm_link_hash_entry *edir, *eind;
3348
3349 edir = (struct elf32_arm_link_hash_entry *) dir;
3350 eind = (struct elf32_arm_link_hash_entry *) ind;
3351
0bdcacaf 3352 if (eind->dyn_relocs != NULL)
906e58ca 3353 {
0bdcacaf 3354 if (edir->dyn_relocs != NULL)
906e58ca 3355 {
0bdcacaf
RS		 3356 struct elf_dyn_relocs **pp;
3357 struct elf_dyn_relocs *p;
906e58ca
NC		 3358
3359 /* Add reloc counts against the indirect sym to the direct sym
3360 list. Merge any entries against the same section. */
0bdcacaf 3361 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3362 {
0bdcacaf 3363 struct elf_dyn_relocs *q;
906e58ca 3364
0bdcacaf
RS		 3365 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3366 if (q->sec == p->sec)
906e58ca
NC		 3367 {
3368 q->pc_count += p->pc_count;
3369 q->count += p->count;
3370 *pp = p->next;
3371 break;
3372 }
3373 if (q == NULL)
3374 pp = &p->next;
3375 }
0bdcacaf 3376 *pp = edir->dyn_relocs;
906e58ca
NC		 3377 }
3378
0bdcacaf
RS		 3379 edir->dyn_relocs = eind->dyn_relocs;
3380 eind->dyn_relocs = NULL;
906e58ca
NC		 3381 }
3382
3383 if (ind->root.type == bfd_link_hash_indirect)
3384 {
3385 /* Copy over PLT info. */
34e77a92
RS		 3386 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3387 eind->plt.thumb_refcount = 0;
3388 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3389 eind->plt.maybe_thumb_refcount = 0;
3390 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3391 eind->plt.noncall_refcount = 0;
3392
3393 /* We should only allocate a function to .iplt once the final
3394 symbol information is known. */
3395 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3396
3397 if (dir->got.refcount <= 0)
3398 {
3399 edir->tls_type = eind->tls_type;
3400 eind->tls_type = GOT_UNKNOWN;
3401 }
3402 }
3403
3404 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3405}
3406
3407/* Create an ARM elf linker hash table. */
3408
3409static struct bfd_link_hash_table *
3410elf32_arm_link_hash_table_create (bfd *abfd)
3411{
3412 struct elf32_arm_link_hash_table *ret;
3413 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3414
21d799b5 3415 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3416 if (ret == NULL)
3417 return NULL;
3418
3419 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3420 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3421 sizeof (struct elf32_arm_link_hash_entry),
3422 ARM_ELF_DATA))
906e58ca
NC		 3423 {
3424 free (ret);
3425 return NULL;
3426 }
3427
906e58ca
NC		 3428 ret->sdynbss = NULL;
3429 ret->srelbss = NULL;
3430 ret->srelplt2 = NULL;
0855e32b
NS		 3431 ret->dt_tlsdesc_plt = 0;
3432 ret->dt_tlsdesc_got = 0;
3433 ret->tls_trampoline = 0;
3434 ret->next_tls_desc_index = 0;
3435 ret->num_tls_desc = 0;
906e58ca
NC		 3436 ret->thumb_glue_size = 0;
3437 ret->arm_glue_size = 0;
3438 ret->bx_glue_size = 0;
3439 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3440 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3441 ret->vfp11_erratum_glue_size = 0;
3442 ret->num_vfp11_fixes = 0;
48229727 3443 ret->fix_cortex_a8 = 0;
2de70689 3444 ret->fix_arm1176 = 0;
906e58ca
NC		 3445 ret->bfd_of_glue_owner = NULL;
3446 ret->byteswap_code = 0;
3447 ret->target1_is_rel = 0;
3448 ret->target2_reloc = R_ARM_NONE;
3449#ifdef FOUR_WORD_PLT
3450 ret->plt_header_size = 16;
3451 ret->plt_entry_size = 16;
3452#else
3453 ret->plt_header_size = 20;
3454 ret->plt_entry_size = 12;
3455#endif
3456 ret->fix_v4bx = 0;
3457 ret->use_blx = 0;
3458 ret->vxworks_p = 0;
3459 ret->symbian_p = 0;
b38cadfb 3460 ret->nacl_p = 0;
906e58ca 3461 ret->use_rel = 1;
87d72d41 3462 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3463 ret->obfd = abfd;
3464 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3465 ret->stub_bfd = NULL;
3466 ret->add_stub_section = NULL;
3467 ret->layout_sections_again = NULL;
3468 ret->stub_group = NULL;
fe33d2fa 3469 ret->top_id = 0;
6cee0a6f
L		 3470 ret->bfd_count = 0;
3471 ret->top_index = 0;
3472 ret->input_list = NULL;
906e58ca
NC		 3473
3474 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3475 sizeof (struct elf32_arm_stub_hash_entry)))
3476 {
3477 free (ret);
3478 return NULL;
3479 }
3480
3481 return &ret->root.root;
3482}
3483
3484/* Free the derived linker hash table. */
3485
3486static void
3487elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3488{
3489 struct elf32_arm_link_hash_table *ret
3490 = (struct elf32_arm_link_hash_table *) hash;
3491
3492 bfd_hash_table_free (&ret->stub_hash_table);
3493 _bfd_generic_link_hash_table_free (hash);
3494}
3495
3496/* Determine if we're dealing with a Thumb only architecture. */
3497
3498static bfd_boolean
3499using_thumb_only (struct elf32_arm_link_hash_table *globals)
3500{
3501 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3502 Tag_CPU_arch);
3503 int profile;
3504
41ed1ee7
DJ		 3505 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3506 return TRUE;
3507
9e3c6df6 3508 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3509 return FALSE;
3510
3511 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3512 Tag_CPU_arch_profile);
3513
3514 return profile == 'M';
3515}
3516
3517/* Determine if we're dealing with a Thumb-2 object. */
3518
3519static bfd_boolean
3520using_thumb2 (struct elf32_arm_link_hash_table *globals)
3521{
3522 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3523 Tag_CPU_arch);
3524 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3525}
3526
cd1dac3d
DG		 3527/* Determine what kind of NOPs are available. */
3528
3529static bfd_boolean
3530arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3531{
3532 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3533 Tag_CPU_arch);
3534 return arch == TAG_CPU_ARCH_V6T2
3535 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3536 || arch == TAG_CPU_ARCH_V7
3537 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3538}
3539
3540static bfd_boolean
3541arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3542{
3543 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3544 Tag_CPU_arch);
9e3c6df6
PB		 3545 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3546 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3547}
3548
f4ac8484
DJ		 3549static bfd_boolean
3550arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3551{
3552 switch (stub_type)
3553 {
fea2b4d6
CL		 3554 case arm_stub_long_branch_thumb_only:
3555 case arm_stub_long_branch_v4t_thumb_arm:
3556 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3557 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3558 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3559 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3560 return TRUE;
3561 case arm_stub_none:
3562 BFD_FAIL ();
3563 return FALSE;
3564 break;
3565 default:
3566 return FALSE;
3567 }
3568}
3569
906e58ca
NC		 3570/* Determine the type of stub needed, if any, for a call. */
3571
3572static enum elf32_arm_stub_type
3573arm_type_of_stub (struct bfd_link_info *info,
3574 asection *input_sec,
3575 const Elf_Internal_Rela *rel,
34e77a92 3576 unsigned char st_type,
35fc36a8 3577 enum arm_st_branch_type *actual_branch_type,
906e58ca 3578 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3579 bfd_vma destination,
3580 asection *sym_sec,
3581 bfd *input_bfd,
3582 const char *name)
906e58ca
NC		 3583{
3584 bfd_vma location;
3585 bfd_signed_vma branch_offset;
3586 unsigned int r_type;
3587 struct elf32_arm_link_hash_table * globals;
3588 int thumb2;
3589 int thumb_only;
3590 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3591 int use_plt = 0;
35fc36a8 3592 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3593 union gotplt_union *root_plt;
3594 struct arm_plt_info *arm_plt;
906e58ca 3595
35fc36a8 3596 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3597 return stub_type;
3598
906e58ca 3599 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3600 if (globals == NULL)
3601 return stub_type;
906e58ca
NC		 3602
3603 thumb_only = using_thumb_only (globals);
3604
3605 thumb2 = using_thumb2 (globals);
3606
3607 /* Determine where the call point is. */
3608 location = (input_sec->output_offset
3609 + input_sec->output_section->vma
3610 + rel->r_offset);
3611
906e58ca
NC		 3612 r_type = ELF32_R_TYPE (rel->r_info);
3613
34e77a92
RS		 3614 /* For TLS call relocs, it is the caller's responsibility to provide
3615 the address of the appropriate trampoline. */
3616 if (r_type != R_ARM_TLS_CALL
3617 && r_type != R_ARM_THM_TLS_CALL
3618 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3619 &root_plt, &arm_plt)
3620 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3621 {
34e77a92 3622 asection *splt;
fe33d2fa 3623
34e77a92
RS		 3624 if (hash == NULL || hash->is_iplt)
3625 splt = globals->root.iplt;
3626 else
3627 splt = globals->root.splt;
3628 if (splt != NULL)
b38cadfb 3629 {
34e77a92
RS		 3630 use_plt = 1;
3631
3632 /* Note when dealing with PLT entries: the main PLT stub is in
3633 ARM mode, so if the branch is in Thumb mode, another
3634 Thumb->ARM stub will be inserted later just before the ARM
3635 PLT stub. We don't take this extra distance into account
3636 here, because if a long branch stub is needed, we'll add a
3637 Thumb->Arm one and branch directly to the ARM PLT entry
3638 because it avoids spreading offset corrections in several
3639 places. */
3640
3641 destination = (splt->output_section->vma
3642 + splt->output_offset
3643 + root_plt->offset);
3644 st_type = STT_FUNC;
3645 branch_type = ST_BRANCH_TO_ARM;
3646 }
5fa9e92f 3647 }
34e77a92
RS		 3648 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3649 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3650
fe33d2fa
CL		 3651 branch_offset = (bfd_signed_vma)(destination - location);
3652
0855e32b
NS		 3653 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3654 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3655 {
5fa9e92f
CL		 3656 /* Handle cases where:
3657 - this call goes too far (different Thumb/Thumb2 max
3658 distance)
155d87d7
CL		 3659 - it's a Thumb->Arm call and blx is not available, or it's a
3660 Thumb->Arm branch (not bl). A stub is needed in this case,
3661 but only if this call is not through a PLT entry. Indeed,
3662 PLT stubs handle mode switching already.
5fa9e92f 3663 */
906e58ca
NC		 3664 if ((!thumb2
3665 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3666 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3667 || (thumb2
3668 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3669 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3670 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3671 && (((r_type == R_ARM_THM_CALL
3672 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3673 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3674 && !use_plt))
906e58ca 3675 {
35fc36a8 3676 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3677 {
3678 /* Thumb to thumb. */
3679 if (!thumb_only)
3680 {
3681 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3682 /* PIC stubs. */
155d87d7 3683 ? ((globals->use_blx
9553db3c 3684 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3685 /* V5T and above. Stub starts with ARM code, so
3686 we must be able to switch mode before
3687 reaching it, which is only possible for 'bl'
3688 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3689 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3690 /* On V4T, use Thumb code only. */
d3626fb0 3691 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3692
3693 /* non-PIC stubs. */
155d87d7 3694 : ((globals->use_blx
9553db3c 3695 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3696 /* V5T and above. */
3697 ? arm_stub_long_branch_any_any
3698 /* V4T. */
d3626fb0 3699 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3700 }
3701 else
3702 {
3703 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3704 /* PIC stub. */
3705 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3706 /* non-PIC stub. */
3707 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3708 }
3709 }
3710 else
3711 {
3712 /* Thumb to arm. */
c820be07
NC		 3713 if (sym_sec != NULL
3714 && sym_sec->owner != NULL
3715 && !INTERWORK_FLAG (sym_sec->owner))
3716 {
3717 (*_bfd_error_handler)
3718 (_("%B(%s): warning: interworking not enabled.\n"
3719 " first occurrence: %B: Thumb call to ARM"),
3720 sym_sec->owner, input_bfd, name);
3721 }
3722
0855e32b
NS		 3723 stub_type =
3724 (info->shared | globals->pic_veneer)
c2b4a39d 3725 /* PIC stubs. */
0855e32b
NS		 3726 ? (r_type == R_ARM_THM_TLS_CALL
3727 /* TLS PIC stubs */
3728 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3729 : arm_stub_long_branch_v4t_thumb_tls_pic)
3730 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3731 /* V5T PIC and above. */
3732 ? arm_stub_long_branch_any_arm_pic
3733 /* V4T PIC stub. */
3734 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3735
3736 /* non-PIC stubs. */
0855e32b 3737 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3738 /* V5T and above. */
3739 ? arm_stub_long_branch_any_any
3740 /* V4T. */
3741 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3742
3743 /* Handle v4t short branches. */
fea2b4d6 3744 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3745 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3746 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3747 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3748 }
3749 }
3750 }
fe33d2fa
CL		 3751 else if (r_type == R_ARM_CALL
3752 || r_type == R_ARM_JUMP24
0855e32b
NS		 3753 || r_type == R_ARM_PLT32
3754 || r_type == R_ARM_TLS_CALL)
906e58ca 3755 {
35fc36a8 3756 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3757 {
3758 /* Arm to thumb. */
c820be07
NC		 3759
3760 if (sym_sec != NULL
3761 && sym_sec->owner != NULL
3762 && !INTERWORK_FLAG (sym_sec->owner))
3763 {
3764 (*_bfd_error_handler)
3765 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3766 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3767 sym_sec->owner, input_bfd, name);
3768 }
3769
3770 /* We have an extra 2-bytes reach because of
3771 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3772 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3773 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3774 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3775 || (r_type == R_ARM_JUMP24)
3776 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3777 {
3778 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3779 /* PIC stubs. */
ebe24dd4
CL		 3780 ? ((globals->use_blx)
3781 /* V5T and above. */
3782 ? arm_stub_long_branch_any_thumb_pic
3783 /* V4T stub. */
3784 : arm_stub_long_branch_v4t_arm_thumb_pic)
3785
c2b4a39d
CL		 3786 /* non-PIC stubs. */
3787 : ((globals->use_blx)
3788 /* V5T and above. */
3789 ? arm_stub_long_branch_any_any
3790 /* V4T. */
3791 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3792 }
3793 }
3794 else
3795 {
3796 /* Arm to arm. */
3797 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3798 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3799 {
0855e32b
NS		 3800 stub_type =
3801 (info->shared | globals->pic_veneer)
c2b4a39d 3802 /* PIC stubs. */
0855e32b
NS		 3803 ? (r_type == R_ARM_TLS_CALL
3804 /* TLS PIC Stub */
3805 ? arm_stub_long_branch_any_tls_pic
3806 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3807 /* non-PIC stubs. */
fea2b4d6 3808 : arm_stub_long_branch_any_any;
906e58ca
NC		 3809 }
3810 }
3811 }
3812
fe33d2fa
CL		 3813 /* If a stub is needed, record the actual destination type. */
3814 if (stub_type != arm_stub_none)
35fc36a8 3815 *actual_branch_type = branch_type;
fe33d2fa 3816
906e58ca
NC		 3817 return stub_type;
3818}
3819
3820/* Build a name for an entry in the stub hash table. */
3821
3822static char *
3823elf32_arm_stub_name (const asection *input_section,
3824 const asection *sym_sec,
3825 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3826 const Elf_Internal_Rela *rel,
3827 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3828{
3829 char *stub_name;
3830 bfd_size_type len;
3831
3832 if (hash)
3833 {
fe33d2fa 3834 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3835 stub_name = (char *) bfd_malloc (len);
906e58ca 3836 if (stub_name != NULL)
fe33d2fa 3837 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3838 input_section->id & 0xffffffff,
3839 hash->root.root.root.string,
fe33d2fa
CL		 3840 (int) rel->r_addend & 0xffffffff,
3841 (int) stub_type);
906e58ca
NC		 3842 }
3843 else
3844 {
fe33d2fa 3845 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3846 stub_name = (char *) bfd_malloc (len);
906e58ca 3847 if (stub_name != NULL)
fe33d2fa 3848 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3849 input_section->id & 0xffffffff,
3850 sym_sec->id & 0xffffffff,
0855e32b
NS		 3851 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3852 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3853 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3854 (int) rel->r_addend & 0xffffffff,
3855 (int) stub_type);
906e58ca
NC		 3856 }
3857
3858 return stub_name;
3859}
3860
3861/* Look up an entry in the stub hash. Stub entries are cached because
3862 creating the stub name takes a bit of time. */
3863
3864static struct elf32_arm_stub_hash_entry *
3865elf32_arm_get_stub_entry (const asection *input_section,
3866 const asection *sym_sec,
3867 struct elf_link_hash_entry *hash,
3868 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3869 struct elf32_arm_link_hash_table *htab,
3870 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3871{
3872 struct elf32_arm_stub_hash_entry *stub_entry;
3873 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3874 const asection *id_sec;
3875
3876 if ((input_section->flags & SEC_CODE) == 0)
3877 return NULL;
3878
3879 /* If this input section is part of a group of sections sharing one
3880 stub section, then use the id of the first section in the group.
3881 Stub names need to include a section id, as there may well be
3882 more than one stub used to reach say, printf, and we need to
3883 distinguish between them. */
3884 id_sec = htab->stub_group[input_section->id].link_sec;
3885
3886 if (h != NULL && h->stub_cache != NULL
3887 && h->stub_cache->h == h
fe33d2fa
CL		 3888 && h->stub_cache->id_sec == id_sec
3889 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3890 {
3891 stub_entry = h->stub_cache;
3892 }
3893 else
3894 {
3895 char *stub_name;
3896
fe33d2fa 3897 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3898 if (stub_name == NULL)
3899 return NULL;
3900
3901 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3902 stub_name, FALSE, FALSE);
3903 if (h != NULL)
3904 h->stub_cache = stub_entry;
3905
3906 free (stub_name);
3907 }
3908
3909 return stub_entry;
3910}
3911
48229727 3912/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3913 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3914 LINK_SEC_P may be NULL. */
906e58ca 3915
48229727
JB		 3916static asection *
3917elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3918 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3919{
3920 asection *link_sec;
3921 asection *stub_sec;
906e58ca
NC		 3922
3923 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3924 BFD_ASSERT (link_sec != NULL);
906e58ca 3925 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3926
906e58ca
NC		 3927 if (stub_sec == NULL)
3928 {
3929 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3930 if (stub_sec == NULL)
3931 {
3932 size_t namelen;
3933 bfd_size_type len;
3934 char *s_name;
3935
3936 namelen = strlen (link_sec->name);
3937 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3938 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3939 if (s_name == NULL)
3940 return NULL;
3941
3942 memcpy (s_name, link_sec->name, namelen);
3943 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3944 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3945 if (stub_sec == NULL)
3946 return NULL;
3947 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3948 }
3949 htab->stub_group[section->id].stub_sec = stub_sec;
3950 }
b38cadfb 3951
48229727
JB		 3952 if (link_sec_p)
3953 *link_sec_p = link_sec;
b38cadfb 3954
48229727
JB		 3955 return stub_sec;
3956}
3957
3958/* Add a new stub entry to the stub hash. Not all fields of the new
3959 stub entry are initialised. */
3960
3961static struct elf32_arm_stub_hash_entry *
3962elf32_arm_add_stub (const char *stub_name,
3963 asection *section,
3964 struct elf32_arm_link_hash_table *htab)
3965{
3966 asection *link_sec;
3967 asection *stub_sec;
3968 struct elf32_arm_stub_hash_entry *stub_entry;
3969
3970 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3971 if (stub_sec == NULL)
3972 return NULL;
906e58ca
NC		 3973
3974 /* Enter this entry into the linker stub hash table. */
3975 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3976 TRUE, FALSE);
3977 if (stub_entry == NULL)
3978 {
3979 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3980 section->owner,
3981 stub_name);
3982 return NULL;
3983 }
3984
3985 stub_entry->stub_sec = stub_sec;
3986 stub_entry->stub_offset = 0;
3987 stub_entry->id_sec = link_sec;
3988
906e58ca
NC		 3989 return stub_entry;
3990}
3991
3992/* Store an Arm insn into an output section not processed by
3993 elf32_arm_write_section. */
3994
3995static void
8029a119
NC		 3996put_arm_insn (struct elf32_arm_link_hash_table * htab,
3997 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3998{
3999 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4000 bfd_putl32 (val, ptr);
4001 else
4002 bfd_putb32 (val, ptr);
4003}
4004
4005/* Store a 16-bit Thumb insn into an output section not processed by
4006 elf32_arm_write_section. */
4007
4008static void
8029a119
NC		 4009put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4010 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4011{
4012 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4013 bfd_putl16 (val, ptr);
4014 else
4015 bfd_putb16 (val, ptr);
4016}
4017
0855e32b
NS		 4018/* If it's possible to change R_TYPE to a more efficient access
4019 model, return the new reloc type. */
4020
4021static unsigned
b38cadfb 4022elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4023 struct elf_link_hash_entry *h)
4024{
4025 int is_local = (h == NULL);
4026
4027 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4028 return r_type;
4029
b38cadfb 4030 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4031 switch (r_type)
4032 {
4033 case R_ARM_TLS_GOTDESC:
4034 case R_ARM_TLS_CALL:
4035 case R_ARM_THM_TLS_CALL:
4036 case R_ARM_TLS_DESCSEQ:
4037 case R_ARM_THM_TLS_DESCSEQ:
4038 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4039 }
4040
4041 return r_type;
4042}
4043
48229727
JB		 4044static bfd_reloc_status_type elf32_arm_final_link_relocate
4045 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4046 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4047 const char *, unsigned char, enum arm_st_branch_type,
4048 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4049
4563a860
JB		 4050static unsigned int
4051arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4052{
4053 switch (stub_type)
4054 {
4055 case arm_stub_a8_veneer_b_cond:
4056 case arm_stub_a8_veneer_b:
4057 case arm_stub_a8_veneer_bl:
4058 return 2;
4059
4060 case arm_stub_long_branch_any_any:
4061 case arm_stub_long_branch_v4t_arm_thumb:
4062 case arm_stub_long_branch_thumb_only:
4063 case arm_stub_long_branch_v4t_thumb_thumb:
4064 case arm_stub_long_branch_v4t_thumb_arm:
4065 case arm_stub_short_branch_v4t_thumb_arm:
4066 case arm_stub_long_branch_any_arm_pic:
4067 case arm_stub_long_branch_any_thumb_pic:
4068 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4069 case arm_stub_long_branch_v4t_arm_thumb_pic:
4070 case arm_stub_long_branch_v4t_thumb_arm_pic:
4071 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4072 case arm_stub_long_branch_any_tls_pic:
4073 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4074 case arm_stub_a8_veneer_blx:
4075 return 4;
b38cadfb 4076
4563a860
JB		 4077 default:
4078 abort (); /* Should be unreachable. */
4079 }
4080}
4081
906e58ca
NC		 4082static bfd_boolean
4083arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4084 void * in_arg)
4085{
48229727 4086#define MAXRELOCS 2
906e58ca 4087 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4088 struct elf32_arm_link_hash_table *globals;
906e58ca 4089 struct bfd_link_info *info;
906e58ca
NC		 4090 asection *stub_sec;
4091 bfd *stub_bfd;
906e58ca
NC		 4092 bfd_byte *loc;
4093 bfd_vma sym_value;
4094 int template_size;
4095 int size;
d3ce72d0 4096 const insn_sequence *template_sequence;
906e58ca 4097 int i;
48229727
JB		 4098 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4099 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4100 int nrelocs = 0;
906e58ca
NC		 4101
4102 /* Massage our args to the form they really have. */
4103 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4104 info = (struct bfd_link_info *) in_arg;
4105
4106 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4107 if (globals == NULL)
4108 return FALSE;
906e58ca 4109
906e58ca
NC		 4110 stub_sec = stub_entry->stub_sec;
4111
4dfe6ac6 4112 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4113 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4114 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4115 return TRUE;
fe33d2fa 4116
906e58ca
NC		 4117 /* Make a note of the offset within the stubs for this entry. */
4118 stub_entry->stub_offset = stub_sec->size;
4119 loc = stub_sec->contents + stub_entry->stub_offset;
4120
4121 stub_bfd = stub_sec->owner;
4122
906e58ca
NC		 4123 /* This is the address of the stub destination. */
4124 sym_value = (stub_entry->target_value
4125 + stub_entry->target_section->output_offset
4126 + stub_entry->target_section->output_section->vma);
4127
d3ce72d0 4128 template_sequence = stub_entry->stub_template;
461a49ca 4129 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4130
4131 size = 0;
461a49ca 4132 for (i = 0; i < template_size; i++)
906e58ca 4133 {
d3ce72d0 4134 switch (template_sequence[i].type)
461a49ca
DJ		 4135 {
4136 case THUMB16_TYPE:
48229727 4137 {
d3ce72d0
NC		 4138 bfd_vma data = (bfd_vma) template_sequence[i].data;
4139 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 4140 {
4141 /* We've borrowed the reloc_addend field to mean we should
4142 insert a condition code into this (Thumb-1 branch)
4143 instruction. See THUMB16_BCOND_INSN. */
4144 BFD_ASSERT ((data & 0xff00) == 0xd000);
4145 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4146 }
fe33d2fa 4147 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4148 size += 2;
4149 }
461a49ca 4150 break;
906e58ca 4151
48229727 4152 case THUMB32_TYPE:
fe33d2fa
CL		 4153 bfd_put_16 (stub_bfd,
4154 (template_sequence[i].data >> 16) & 0xffff,
4155 loc + size);
4156 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4157 loc + size + 2);
d3ce72d0 4158 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 4159 {
4160 stub_reloc_idx[nrelocs] = i;
4161 stub_reloc_offset[nrelocs++] = size;
4162 }
4163 size += 4;
4164 break;
4165
461a49ca 4166 case ARM_TYPE:
fe33d2fa
CL		 4167 bfd_put_32 (stub_bfd, template_sequence[i].data,
4168 loc + size);
461a49ca
DJ		 4169 /* Handle cases where the target is encoded within the
4170 instruction. */
d3ce72d0 4171 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4172 {
48229727
JB		 4173 stub_reloc_idx[nrelocs] = i;
4174 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4175 }
4176 size += 4;
4177 break;
4178
4179 case DATA_TYPE:
d3ce72d0 4180 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4181 stub_reloc_idx[nrelocs] = i;
4182 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4183 size += 4;
4184 break;
4185
4186 default:
4187 BFD_FAIL ();
4188 return FALSE;
4189 }
906e58ca 4190 }
461a49ca 4191
906e58ca
NC		 4192 stub_sec->size += size;
4193
461a49ca
DJ		 4194 /* Stub size has already been computed in arm_size_one_stub. Check
4195 consistency. */
4196 BFD_ASSERT (size == stub_entry->stub_size);
4197
906e58ca 4198 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4199 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4200 sym_value |= 1;
4201
48229727
JB		 4202 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4203 in each stub. */
4204 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4205
48229727 4206 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4207 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4208 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4209 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4210 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4211 {
4212 Elf_Internal_Rela rel;
4213 bfd_boolean unresolved_reloc;
4214 char *error_message;
35fc36a8
RS		 4215 enum arm_st_branch_type branch_type
4216 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4217 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4218 bfd_vma points_to = sym_value + stub_entry->target_addend;
4219
4220 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 4221 rel.r_info = ELF32_R_INFO (0,
4222 template_sequence[stub_reloc_idx[i]].r_type);
4223 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4224
4225 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4226 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4227 template should refer back to the instruction after the original
4228 branch. */
4229 points_to = sym_value;
4230
33c6a8fc
JB		 4231 /* There may be unintended consequences if this is not true. */
4232 BFD_ASSERT (stub_entry->h == NULL);
4233
48229727
JB		 4234 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4235 properly. We should probably use this function unconditionally,
4236 rather than only for certain relocations listed in the enclosing
4237 conditional, for the sake of consistency. */
4238 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4239 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4240 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4241 points_to, info, stub_entry->target_section, "", STT_FUNC,
4242 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4243 &unresolved_reloc, &error_message);
48229727
JB		 4244 }
4245 else
4246 {
fe33d2fa
CL		 4247 Elf_Internal_Rela rel;
4248 bfd_boolean unresolved_reloc;
4249 char *error_message;
4250 bfd_vma points_to = sym_value + stub_entry->target_addend
4251 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4252
4253 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4254 rel.r_info = ELF32_R_INFO (0,
4255 template_sequence[stub_reloc_idx[i]].r_type);
4256 rel.r_addend = 0;
4257
4258 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4259 (template_sequence[stub_reloc_idx[i]].r_type),
4260 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4261 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4262 stub_entry->branch_type,
fe33d2fa
CL		 4263 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4264 &error_message);
48229727 4265 }
906e58ca
NC		 4266
4267 return TRUE;
48229727 4268#undef MAXRELOCS
906e58ca
NC		 4269}
4270
48229727
JB		 4271/* Calculate the template, template size and instruction size for a stub.
4272 Return value is the instruction size. */
906e58ca 4273
48229727
JB		 4274static unsigned int
4275find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4276 const insn_sequence **stub_template,
4277 int *stub_template_size)
906e58ca 4278{
d3ce72d0 4279 const insn_sequence *template_sequence = NULL;
48229727
JB		 4280 int template_size = 0, i;
4281 unsigned int size;
906e58ca 4282
d3ce72d0 4283 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4284 if (stub_template)
4285 *stub_template = template_sequence;
4286
48229727 4287 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4288 if (stub_template_size)
4289 *stub_template_size = template_size;
906e58ca
NC		 4290
4291 size = 0;
461a49ca
DJ		 4292 for (i = 0; i < template_size; i++)
4293 {
d3ce72d0 4294 switch (template_sequence[i].type)
461a49ca
DJ		 4295 {
4296 case THUMB16_TYPE:
4297 size += 2;
4298 break;
4299
4300 case ARM_TYPE:
48229727 4301 case THUMB32_TYPE:
461a49ca
DJ		 4302 case DATA_TYPE:
4303 size += 4;
4304 break;
4305
4306 default:
4307 BFD_FAIL ();
2a229407 4308 return 0;
461a49ca
DJ		 4309 }
4310 }
4311
48229727
JB		 4312 return size;
4313}
4314
4315/* As above, but don't actually build the stub. Just bump offset so
4316 we know stub section sizes. */
4317
4318static bfd_boolean
4319arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4320 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4321{
4322 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4323 const insn_sequence *template_sequence;
48229727
JB		 4324 int template_size, size;
4325
4326 /* Massage our args to the form they really have. */
4327 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4328
4329 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4330 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4331
d3ce72d0 4332 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4333 &template_size);
4334
461a49ca 4335 stub_entry->stub_size = size;
d3ce72d0 4336 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4337 stub_entry->stub_template_size = template_size;
4338
906e58ca
NC		 4339 size = (size + 7) & ~7;
4340 stub_entry->stub_sec->size += size;
461a49ca 4341
906e58ca
NC		 4342 return TRUE;
4343}
4344
4345/* External entry points for sizing and building linker stubs. */
4346
4347/* Set up various things so that we can make a list of input sections
4348 for each output section included in the link. Returns -1 on error,
4349 0 when no stubs will be needed, and 1 on success. */
4350
4351int
4352elf32_arm_setup_section_lists (bfd *output_bfd,
4353 struct bfd_link_info *info)
4354{
4355 bfd *input_bfd;
4356 unsigned int bfd_count;
4357 int top_id, top_index;
4358 asection *section;
4359 asection **input_list, **list;
4360 bfd_size_type amt;
4361 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4362
4dfe6ac6
NC		 4363 if (htab == NULL)
4364 return 0;
906e58ca
NC		 4365 if (! is_elf_hash_table (htab))
4366 return 0;
4367
4368 /* Count the number of input BFDs and find the top input section id. */
4369 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4370 input_bfd != NULL;
4371 input_bfd = input_bfd->link_next)
4372 {
4373 bfd_count += 1;
4374 for (section = input_bfd->sections;
4375 section != NULL;
4376 section = section->next)
4377 {
4378 if (top_id < section->id)
4379 top_id = section->id;
4380 }
4381 }
4382 htab->bfd_count = bfd_count;
4383
4384 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4385 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4386 if (htab->stub_group == NULL)
4387 return -1;
fe33d2fa 4388 htab->top_id = top_id;
906e58ca
NC		 4389
4390 /* We can't use output_bfd->section_count here to find the top output
4391 section index as some sections may have been removed, and
4392 _bfd_strip_section_from_output doesn't renumber the indices. */
4393 for (section = output_bfd->sections, top_index = 0;
4394 section != NULL;
4395 section = section->next)
4396 {
4397 if (top_index < section->index)
4398 top_index = section->index;
4399 }
4400
4401 htab->top_index = top_index;
4402 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4403 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4404 htab->input_list = input_list;
4405 if (input_list == NULL)
4406 return -1;
4407
4408 /* For sections we aren't interested in, mark their entries with a
4409 value we can check later. */
4410 list = input_list + top_index;
4411 do
4412 *list = bfd_abs_section_ptr;
4413 while (list-- != input_list);
4414
4415 for (section = output_bfd->sections;
4416 section != NULL;
4417 section = section->next)
4418 {
4419 if ((section->flags & SEC_CODE) != 0)
4420 input_list[section->index] = NULL;
4421 }
4422
4423 return 1;
4424}
4425
4426/* The linker repeatedly calls this function for each input section,
4427 in the order that input sections are linked into output sections.
4428 Build lists of input sections to determine groupings between which
4429 we may insert linker stubs. */
4430
4431void
4432elf32_arm_next_input_section (struct bfd_link_info *info,
4433 asection *isec)
4434{
4435 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4436
4dfe6ac6
NC		 4437 if (htab == NULL)
4438 return;
4439
906e58ca
NC		 4440 if (isec->output_section->index <= htab->top_index)
4441 {
4442 asection **list = htab->input_list + isec->output_section->index;
4443
a7470592 4444 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4445 {
4446 /* Steal the link_sec pointer for our list. */
4447#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4448 /* This happens to make the list in reverse order,
07d72278 4449 which we reverse later. */
906e58ca
NC		 4450 PREV_SEC (isec) = *list;
4451 *list = isec;
4452 }
4453 }
4454}
4455
4456/* See whether we can group stub sections together. Grouping stub
4457 sections may result in fewer stubs. More importantly, we need to
07d72278 4458 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4459 .fini output sections respectively, because glibc splits the
4460 _init and _fini functions into multiple parts. Putting a stub in
4461 the middle of a function is not a good idea. */
4462
4463static void
4464group_sections (struct elf32_arm_link_hash_table *htab,
4465 bfd_size_type stub_group_size,
07d72278 4466 bfd_boolean stubs_always_after_branch)
906e58ca 4467{
07d72278 4468 asection **list = htab->input_list;
906e58ca
NC		 4469
4470 do
4471 {
4472 asection *tail = *list;
07d72278 4473 asection *head;
906e58ca
NC		 4474
4475 if (tail == bfd_abs_section_ptr)
4476 continue;
4477
07d72278
DJ		 4478 /* Reverse the list: we must avoid placing stubs at the
4479 beginning of the section because the beginning of the text
4480 section may be required for an interrupt vector in bare metal
4481 code. */
4482#define NEXT_SEC PREV_SEC
e780aef2
CL		 4483 head = NULL;
4484 while (tail != NULL)
4485 {
4486 /* Pop from tail. */
4487 asection *item = tail;
4488 tail = PREV_SEC (item);
4489
4490 /* Push on head. */
4491 NEXT_SEC (item) = head;
4492 head = item;
4493 }
07d72278
DJ		 4494
4495 while (head != NULL)
906e58ca
NC		 4496 {
4497 asection *curr;
07d72278 4498 asection *next;
e780aef2
CL		 4499 bfd_vma stub_group_start = head->output_offset;
4500 bfd_vma end_of_next;
906e58ca 4501
07d72278 4502 curr = head;
e780aef2 4503 while (NEXT_SEC (curr) != NULL)
8cd931b7 4504 {
e780aef2
CL		 4505 next = NEXT_SEC (curr);
4506 end_of_next = next->output_offset + next->size;
4507 if (end_of_next - stub_group_start >= stub_group_size)
4508 /* End of NEXT is too far from start, so stop. */
8cd931b7 4509 break;
e780aef2
CL		 4510 /* Add NEXT to the group. */
4511 curr = next;
8cd931b7 4512 }
906e58ca 4513
07d72278 4514 /* OK, the size from the start to the start of CURR is less
906e58ca 4515 than stub_group_size and thus can be handled by one stub
07d72278 4516 section. (Or the head section is itself larger than
906e58ca
NC		 4517 stub_group_size, in which case we may be toast.)
4518 We should really be keeping track of the total size of
4519 stubs added here, as stubs contribute to the final output
7fb9f789 4520 section size. */
906e58ca
NC		 4521 do
4522 {
07d72278 4523 next = NEXT_SEC (head);
906e58ca 4524 /* Set up this stub group. */
07d72278 4525 htab->stub_group[head->id].link_sec = curr;
906e58ca 4526 }
07d72278 4527 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4528
4529 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4530 bytes after the stub section can be handled by it too. */
4531 if (!stubs_always_after_branch)
906e58ca 4532 {
e780aef2
CL		 4533 stub_group_start = curr->output_offset + curr->size;
4534
8cd931b7 4535 while (next != NULL)
906e58ca 4536 {
e780aef2
CL		 4537 end_of_next = next->output_offset + next->size;
4538 if (end_of_next - stub_group_start >= stub_group_size)
4539 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4540 break;
e780aef2 4541 /* Add NEXT to the stub group. */
07d72278
DJ		 4542 head = next;
4543 next = NEXT_SEC (head);
4544 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4545 }
4546 }
07d72278 4547 head = next;
906e58ca
NC		 4548 }
4549 }
07d72278 4550 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4551
4552 free (htab->input_list);
4553#undef PREV_SEC
07d72278 4554#undef NEXT_SEC
906e58ca
NC		 4555}
4556
48229727
JB		 4557/* Comparison function for sorting/searching relocations relating to Cortex-A8
4558 erratum fix. */
4559
4560static int
4561a8_reloc_compare (const void *a, const void *b)
4562{
21d799b5
NC		 4563 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4564 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4565
4566 if (ra->from < rb->from)
4567 return -1;
4568 else if (ra->from > rb->from)
4569 return 1;
4570 else
4571 return 0;
4572}
4573
4574static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4575 const char *, char **);
4576
4577/* Helper function to scan code for sequences which might trigger the Cortex-A8
4578 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4579 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4580 otherwise. */
4581
81694485
NC		 4582static bfd_boolean
4583cortex_a8_erratum_scan (bfd *input_bfd,
4584 struct bfd_link_info *info,
48229727
JB		 4585 struct a8_erratum_fix **a8_fixes_p,
4586 unsigned int *num_a8_fixes_p,
4587 unsigned int *a8_fix_table_size_p,
4588 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4589 unsigned int num_a8_relocs,
4590 unsigned prev_num_a8_fixes,
4591 bfd_boolean *stub_changed_p)
48229727
JB		 4592{
4593 asection *section;
4594 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4595 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4596 unsigned int num_a8_fixes = *num_a8_fixes_p;
4597 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4598
4dfe6ac6
NC		 4599 if (htab == NULL)
4600 return FALSE;
4601
48229727
JB		 4602 for (section = input_bfd->sections;
4603 section != NULL;
4604 section = section->next)
4605 {
4606 bfd_byte *contents = NULL;
4607 struct _arm_elf_section_data *sec_data;
4608 unsigned int span;
4609 bfd_vma base_vma;
4610
4611 if (elf_section_type (section) != SHT_PROGBITS
4612 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4613 || (section->flags & SEC_EXCLUDE) != 0
dbaa2011 4614 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
48229727
JB		 4615 || (section->output_section == bfd_abs_section_ptr))
4616 continue;
4617
4618 base_vma = section->output_section->vma + section->output_offset;
4619
4620 if (elf_section_data (section)->this_hdr.contents != NULL)
4621 contents = elf_section_data (section)->this_hdr.contents;
4622 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4623 return TRUE;
48229727
JB		 4624
4625 sec_data = elf32_arm_section_data (section);
4626
4627 for (span = 0; span < sec_data->mapcount; span++)
4628 {
4629 unsigned int span_start = sec_data->map[span].vma;
4630 unsigned int span_end = (span == sec_data->mapcount - 1)
4631 ? section->size : sec_data->map[span + 1].vma;
4632 unsigned int i;
4633 char span_type = sec_data->map[span].type;
4634 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4635
4636 if (span_type != 't')
4637 continue;
4638
4639 /* Span is entirely within a single 4KB region: skip scanning. */
4640 if (((base_vma + span_start) & ~0xfff)
4641 == ((base_vma + span_end) & ~0xfff))
4642 continue;
4643
4644 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4645
4646 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4647 * The branch target is in the same 4KB region as the
4648 first half of the branch.
4649 * The instruction before the branch is a 32-bit
81694485 4650 length non-branch instruction. */
48229727
JB		 4651 for (i = span_start; i < span_end;)
4652 {
4653 unsigned int insn = bfd_getl16 (&contents[i]);
4654 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4655 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4656
4657 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4658 insn_32bit = TRUE;
4659
4660 if (insn_32bit)
4661 {
4662 /* Load the rest of the insn (in manual-friendly order). */
4663 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4664
4665 /* Encoding T4: B<c>.W. */
4666 is_b = (insn & 0xf800d000) == 0xf0009000;
4667 /* Encoding T1: BL<c>.W. */
4668 is_bl = (insn & 0xf800d000) == 0xf000d000;
4669 /* Encoding T2: BLX<c>.W. */
4670 is_blx = (insn & 0xf800d000) == 0xf000c000;
4671 /* Encoding T3: B<c>.W (not permitted in IT block). */
4672 is_bcc = (insn & 0xf800d000) == 0xf0008000
4673 && (insn & 0x07f00000) != 0x03800000;
4674 }
4675
4676 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4677
81694485
NC		 4678 if (((base_vma + i) & 0xfff) == 0xffe
4679 && insn_32bit
4680 && is_32bit_branch
4681 && last_was_32bit
4682 && ! last_was_branch)
48229727 4683 {
8f73510c 4684 bfd_signed_vma offset = 0;
48229727
JB		 4685 bfd_boolean force_target_arm = FALSE;
4686 bfd_boolean force_target_thumb = FALSE;
4687 bfd_vma target;
4688 enum elf32_arm_stub_type stub_type = arm_stub_none;
4689 struct a8_erratum_reloc key, *found;
7d24e6a6 4690 bfd_boolean use_plt = FALSE;
48229727
JB		 4691
4692 key.from = base_vma + i;
21d799b5
NC		 4693 found = (struct a8_erratum_reloc *)
4694 bsearch (&key, a8_relocs, num_a8_relocs,
4695 sizeof (struct a8_erratum_reloc),
4696 &a8_reloc_compare);
48229727
JB		 4697
4698 if (found)
4699 {
4700 char *error_message = NULL;
4701 struct elf_link_hash_entry *entry;
4702
4703 /* We don't care about the error returned from this
4704 function, only if there is glue or not. */
4705 entry = find_thumb_glue (info, found->sym_name,
4706 &error_message);
4707
4708 if (entry)
4709 found->non_a8_stub = TRUE;
4710
92750f34 4711 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4712 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4713 && found->hash->root.plt.offset != (bfd_vma) -1)
4714 use_plt = TRUE;
4715
4716 if (found->r_type == R_ARM_THM_CALL)
4717 {
35fc36a8
RS		 4718 if (found->branch_type == ST_BRANCH_TO_ARM
4719 || use_plt)
92750f34
DJ		 4720 force_target_arm = TRUE;
4721 else
4722 force_target_thumb = TRUE;
4723 }
48229727
JB		 4724 }
4725
4726 /* Check if we have an offending branch instruction. */
4727
4728 if (found && found->non_a8_stub)
4729 /* We've already made a stub for this instruction, e.g.
4730 it's a long branch or a Thumb->ARM stub. Assume that
4731 stub will suffice to work around the A8 erratum (see
4732 setting of always_after_branch above). */
4733 ;
4734 else if (is_bcc)
4735 {
4736 offset = (insn & 0x7ff) << 1;
4737 offset |= (insn & 0x3f0000) >> 4;
4738 offset |= (insn & 0x2000) ? 0x40000 : 0;
4739 offset |= (insn & 0x800) ? 0x80000 : 0;
4740 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4741 if (offset & 0x100000)
81694485 4742 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4743 stub_type = arm_stub_a8_veneer_b_cond;
4744 }
4745 else if (is_b || is_bl || is_blx)
4746 {
4747 int s = (insn & 0x4000000) != 0;
4748 int j1 = (insn & 0x2000) != 0;
4749 int j2 = (insn & 0x800) != 0;
4750 int i1 = !(j1 ^ s);
4751 int i2 = !(j2 ^ s);
4752
4753 offset = (insn & 0x7ff) << 1;
4754 offset |= (insn & 0x3ff0000) >> 4;
4755 offset |= i2 << 22;
4756 offset |= i1 << 23;
4757 offset |= s << 24;
4758 if (offset & 0x1000000)
81694485 4759 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4760
4761 if (is_blx)
81694485 4762 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4763
4764 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4765 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4766 }
4767
4768 if (stub_type != arm_stub_none)
4769 {
4770 bfd_vma pc_for_insn = base_vma + i + 4;
4771
4772 /* The original instruction is a BL, but the target is
4773 an ARM instruction. If we were not making a stub,
4774 the BL would have been converted to a BLX. Use the
4775 BLX stub instead in that case. */
4776 if (htab->use_blx && force_target_arm
4777 && stub_type == arm_stub_a8_veneer_bl)
4778 {
4779 stub_type = arm_stub_a8_veneer_blx;
4780 is_blx = TRUE;
4781 is_bl = FALSE;
4782 }
4783 /* Conversely, if the original instruction was
4784 BLX but the target is Thumb mode, use the BL
4785 stub. */
4786 else if (force_target_thumb
4787 && stub_type == arm_stub_a8_veneer_blx)
4788 {
4789 stub_type = arm_stub_a8_veneer_bl;
4790 is_blx = FALSE;
4791 is_bl = TRUE;
4792 }
4793
4794 if (is_blx)
81694485 4795 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4796
4797 /* If we found a relocation, use the proper destination,
4798 not the offset in the (unrelocated) instruction.
4799 Note this is always done if we switched the stub type
4800 above. */
4801 if (found)
81694485
NC		 4802 offset =
4803 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4804
7d24e6a6
RS		 4805 /* If the stub will use a Thumb-mode branch to a
4806 PLT target, redirect it to the preceding Thumb
4807 entry point. */
4808 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4809 offset -= PLT_THUMB_STUB_SIZE;
4810
48229727
JB		 4811 target = pc_for_insn + offset;
4812
4813 /* The BLX stub is ARM-mode code. Adjust the offset to
4814 take the different PC value (+8 instead of +4) into
4815 account. */
4816 if (stub_type == arm_stub_a8_veneer_blx)
4817 offset += 4;
4818
4819 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4820 {
eb7c4339 4821 char *stub_name = NULL;
48229727
JB		 4822
4823 if (num_a8_fixes == a8_fix_table_size)
4824 {
4825 a8_fix_table_size *= 2;
21d799b5
NC		 4826 a8_fixes = (struct a8_erratum_fix *)
4827 bfd_realloc (a8_fixes,
4828 sizeof (struct a8_erratum_fix)
4829 * a8_fix_table_size);
48229727
JB		 4830 }
4831
eb7c4339
NS		 4832 if (num_a8_fixes < prev_num_a8_fixes)
4833 {
4834 /* If we're doing a subsequent scan,
4835 check if we've found the same fix as
4836 before, and try and reuse the stub
4837 name. */
4838 stub_name = a8_fixes[num_a8_fixes].stub_name;
4839 if ((a8_fixes[num_a8_fixes].section != section)
4840 || (a8_fixes[num_a8_fixes].offset != i))
4841 {
4842 free (stub_name);
4843 stub_name = NULL;
4844 *stub_changed_p = TRUE;
4845 }
4846 }
4847
4848 if (!stub_name)
4849 {
21d799b5 4850 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4851 if (stub_name != NULL)
4852 sprintf (stub_name, "%x:%x", section->id, i);
4853 }
48229727
JB		 4854
4855 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4856 a8_fixes[num_a8_fixes].section = section;
4857 a8_fixes[num_a8_fixes].offset = i;
4858 a8_fixes[num_a8_fixes].addend = offset;
4859 a8_fixes[num_a8_fixes].orig_insn = insn;
4860 a8_fixes[num_a8_fixes].stub_name = stub_name;
4861 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4862 a8_fixes[num_a8_fixes].branch_type =
4863 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4864
4865 num_a8_fixes++;
4866 }
4867 }
4868 }
4869
4870 i += insn_32bit ? 4 : 2;
4871 last_was_32bit = insn_32bit;
4872 last_was_branch = is_32bit_branch;
4873 }
4874 }
4875
4876 if (elf_section_data (section)->this_hdr.contents == NULL)
4877 free (contents);
4878 }
fe33d2fa 4879
48229727
JB		 4880 *a8_fixes_p = a8_fixes;
4881 *num_a8_fixes_p = num_a8_fixes;
4882 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4883
81694485 4884 return FALSE;
48229727
JB		 4885}
4886
906e58ca
NC		 4887/* Determine and set the size of the stub section for a final link.
4888
4889 The basic idea here is to examine all the relocations looking for
4890 PC-relative calls to a target that is unreachable with a "bl"
4891 instruction. */
4892
4893bfd_boolean
4894elf32_arm_size_stubs (bfd *output_bfd,
4895 bfd *stub_bfd,
4896 struct bfd_link_info *info,
4897 bfd_signed_vma group_size,
4898 asection * (*add_stub_section) (const char *, asection *),
4899 void (*layout_sections_again) (void))
4900{
4901 bfd_size_type stub_group_size;
07d72278 4902 bfd_boolean stubs_always_after_branch;
906e58ca 4903 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4904 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4905 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4906 struct a8_erratum_reloc *a8_relocs = NULL;
4907 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4908
4dfe6ac6
NC		 4909 if (htab == NULL)
4910 return FALSE;
4911
48229727
JB		 4912 if (htab->fix_cortex_a8)
4913 {
21d799b5
NC		 4914 a8_fixes = (struct a8_erratum_fix *)
4915 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4916 a8_relocs = (struct a8_erratum_reloc *)
4917 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4918 }
906e58ca
NC		 4919
4920 /* Propagate mach to stub bfd, because it may not have been
4921 finalized when we created stub_bfd. */
4922 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4923 bfd_get_mach (output_bfd));
4924
4925 /* Stash our params away. */
4926 htab->stub_bfd = stub_bfd;
4927 htab->add_stub_section = add_stub_section;
4928 htab->layout_sections_again = layout_sections_again;
07d72278 4929 stubs_always_after_branch = group_size < 0;
48229727
JB		 4930
4931 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4932 as the first half of a 32-bit branch straddling two 4K pages. This is a
4933 crude way of enforcing that. */
4934 if (htab->fix_cortex_a8)
4935 stubs_always_after_branch = 1;
4936
906e58ca
NC		 4937 if (group_size < 0)
4938 stub_group_size = -group_size;
4939 else
4940 stub_group_size = group_size;
4941
4942 if (stub_group_size == 1)
4943 {
4944 /* Default values. */
4945 /* Thumb branch range is +-4MB has to be used as the default
4946 maximum size (a given section can contain both ARM and Thumb
4947 code, so the worst case has to be taken into account).
4948
4949 This value is 24K less than that, which allows for 2025
4950 12-byte stubs. If we exceed that, then we will fail to link.
4951 The user will have to relink with an explicit group size
4952 option. */
4953 stub_group_size = 4170000;
4954 }
4955
07d72278 4956 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4957
3ae046cc
NS		 4958 /* If we're applying the cortex A8 fix, we need to determine the
4959 program header size now, because we cannot change it later --
4960 that could alter section placements. Notice the A8 erratum fix
4961 ends up requiring the section addresses to remain unchanged
4962 modulo the page size. That's something we cannot represent
4963 inside BFD, and we don't want to force the section alignment to
4964 be the page size. */
4965 if (htab->fix_cortex_a8)
4966 (*htab->layout_sections_again) ();
4967
906e58ca
NC		 4968 while (1)
4969 {
4970 bfd *input_bfd;
4971 unsigned int bfd_indx;
4972 asection *stub_sec;
eb7c4339
NS		 4973 bfd_boolean stub_changed = FALSE;
4974 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4975
48229727 4976 num_a8_fixes = 0;
906e58ca
NC		 4977 for (input_bfd = info->input_bfds, bfd_indx = 0;
4978 input_bfd != NULL;
4979 input_bfd = input_bfd->link_next, bfd_indx++)
4980 {
4981 Elf_Internal_Shdr *symtab_hdr;
4982 asection *section;
4983 Elf_Internal_Sym *local_syms = NULL;
4984
48229727
JB		 4985 num_a8_relocs = 0;
4986
906e58ca
NC		 4987 /* We'll need the symbol table in a second. */
4988 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4989 if (symtab_hdr->sh_info == 0)
4990 continue;
4991
4992 /* Walk over each section attached to the input bfd. */
4993 for (section = input_bfd->sections;
4994 section != NULL;
4995 section = section->next)
4996 {
4997 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4998
4999 /* If there aren't any relocs, then there's nothing more
5000 to do. */
5001 if ((section->flags & SEC_RELOC) == 0
5002 || section->reloc_count == 0
5003 || (section->flags & SEC_CODE) == 0)
5004 continue;
5005
5006 /* If this section is a link-once section that will be
5007 discarded, then don't create any stubs. */
5008 if (section->output_section == NULL
5009 || section->output_section->owner != output_bfd)
5010 continue;
5011
5012 /* Get the relocs. */
5013 internal_relocs
5014 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5015 NULL, info->keep_memory);
5016 if (internal_relocs == NULL)
5017 goto error_ret_free_local;
5018
5019 /* Now examine each relocation. */
5020 irela = internal_relocs;
5021 irelaend = irela + section->reloc_count;
5022 for (; irela < irelaend; irela++)
5023 {
5024 unsigned int r_type, r_indx;
5025 enum elf32_arm_stub_type stub_type;
5026 struct elf32_arm_stub_hash_entry *stub_entry;
5027 asection *sym_sec;
5028 bfd_vma sym_value;
5029 bfd_vma destination;
5030 struct elf32_arm_link_hash_entry *hash;
7413f23f 5031 const char *sym_name;
906e58ca
NC		 5032 char *stub_name;
5033 const asection *id_sec;
34e77a92 5034 unsigned char st_type;
35fc36a8 5035 enum arm_st_branch_type branch_type;
48229727 5036 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5037
5038 r_type = ELF32_R_TYPE (irela->r_info);
5039 r_indx = ELF32_R_SYM (irela->r_info);
5040
5041 if (r_type >= (unsigned int) R_ARM_max)
5042 {
5043 bfd_set_error (bfd_error_bad_value);
5044 error_ret_free_internal:
5045 if (elf_section_data (section)->relocs == NULL)
5046 free (internal_relocs);
5047 goto error_ret_free_local;
5048 }
b38cadfb 5049
0855e32b
NS		 5050 hash = NULL;
5051 if (r_indx >= symtab_hdr->sh_info)
5052 hash = elf32_arm_hash_entry
5053 (elf_sym_hashes (input_bfd)
5054 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5055
0855e32b
NS		 5056 /* Only look for stubs on branch instructions, or
5057 non-relaxed TLSCALL */
906e58ca 5058 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5059 && (r_type != (unsigned int) R_ARM_THM_CALL)
5060 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5061 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5062 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5063 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5064 && (r_type != (unsigned int) R_ARM_PLT32)
5065 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5066 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5067 && r_type == elf32_arm_tls_transition
5068 (info, r_type, &hash->root)
5069 && ((hash ? hash->tls_type
5070 : (elf32_arm_local_got_tls_type
5071 (input_bfd)[r_indx]))
5072 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5073 continue;
5074
5075 /* Now determine the call target, its name, value,
5076 section. */
5077 sym_sec = NULL;
5078 sym_value = 0;
5079 destination = 0;
7413f23f 5080 sym_name = NULL;
b38cadfb 5081
0855e32b
NS		 5082 if (r_type == (unsigned int) R_ARM_TLS_CALL
5083 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5084 {
5085 /* A non-relaxed TLS call. The target is the
5086 plt-resident trampoline and nothing to do
5087 with the symbol. */
5088 BFD_ASSERT (htab->tls_trampoline > 0);
5089 sym_sec = htab->root.splt;
5090 sym_value = htab->tls_trampoline;
5091 hash = 0;
34e77a92 5092 st_type = STT_FUNC;
35fc36a8 5093 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5094 }
5095 else if (!hash)
906e58ca
NC		 5096 {
5097 /* It's a local symbol. */
5098 Elf_Internal_Sym *sym;
906e58ca
NC		 5099
5100 if (local_syms == NULL)
5101 {
5102 local_syms
5103 = (Elf_Internal_Sym *) symtab_hdr->contents;
5104 if (local_syms == NULL)
5105 local_syms
5106 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5107 symtab_hdr->sh_info, 0,
5108 NULL, NULL, NULL);
5109 if (local_syms == NULL)
5110 goto error_ret_free_internal;
5111 }
5112
5113 sym = local_syms + r_indx;
f6d250ce
TS		 5114 if (sym->st_shndx == SHN_UNDEF)
5115 sym_sec = bfd_und_section_ptr;
5116 else if (sym->st_shndx == SHN_ABS)
5117 sym_sec = bfd_abs_section_ptr;
5118 else if (sym->st_shndx == SHN_COMMON)
5119 sym_sec = bfd_com_section_ptr;
5120 else
5121 sym_sec =
5122 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5123
ffcb4889
NS		 5124 if (!sym_sec)
5125 /* This is an undefined symbol. It can never
5126 be resolved. */
5127 continue;
fe33d2fa 5128
906e58ca
NC		 5129 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5130 sym_value = sym->st_value;
5131 destination = (sym_value + irela->r_addend
5132 + sym_sec->output_offset
5133 + sym_sec->output_section->vma);
34e77a92 5134 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5135 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5136 sym_name
5137 = bfd_elf_string_from_elf_section (input_bfd,
5138 symtab_hdr->sh_link,
5139 sym->st_name);
906e58ca
NC		 5140 }
5141 else
5142 {
5143 /* It's an external symbol. */
906e58ca
NC		 5144 while (hash->root.root.type == bfd_link_hash_indirect
5145 || hash->root.root.type == bfd_link_hash_warning)
5146 hash = ((struct elf32_arm_link_hash_entry *)
5147 hash->root.root.u.i.link);
5148
5149 if (hash->root.root.type == bfd_link_hash_defined
5150 || hash->root.root.type == bfd_link_hash_defweak)
5151 {
5152 sym_sec = hash->root.root.u.def.section;
5153 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5154
5155 struct elf32_arm_link_hash_table *globals =
5156 elf32_arm_hash_table (info);
5157
5158 /* For a destination in a shared library,
5159 use the PLT stub as target address to
5160 decide whether a branch stub is
5161 needed. */
4dfe6ac6 5162 if (globals != NULL
362d30a1 5163 && globals->root.splt != NULL
4dfe6ac6 5164 && hash != NULL
022f8312
CL		 5165 && hash->root.plt.offset != (bfd_vma) -1)
5166 {
362d30a1 5167 sym_sec = globals->root.splt;
022f8312
CL		 5168 sym_value = hash->root.plt.offset;
5169 if (sym_sec->output_section != NULL)
5170 destination = (sym_value
5171 + sym_sec->output_offset
5172 + sym_sec->output_section->vma);
5173 }
5174 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5175 destination = (sym_value + irela->r_addend
5176 + sym_sec->output_offset
5177 + sym_sec->output_section->vma);
5178 }
69c5861e
CL		 5179 else if ((hash->root.root.type == bfd_link_hash_undefined)
5180 || (hash->root.root.type == bfd_link_hash_undefweak))
5181 {
5182 /* For a shared library, use the PLT stub as
5183 target address to decide whether a long
5184 branch stub is needed.
5185 For absolute code, they cannot be handled. */
5186 struct elf32_arm_link_hash_table *globals =
5187 elf32_arm_hash_table (info);
5188
4dfe6ac6 5189 if (globals != NULL
362d30a1 5190 && globals->root.splt != NULL
4dfe6ac6 5191 && hash != NULL
69c5861e
CL		 5192 && hash->root.plt.offset != (bfd_vma) -1)
5193 {
362d30a1 5194 sym_sec = globals->root.splt;
69c5861e
CL		 5195 sym_value = hash->root.plt.offset;
5196 if (sym_sec->output_section != NULL)
5197 destination = (sym_value
5198 + sym_sec->output_offset
5199 + sym_sec->output_section->vma);
5200 }
5201 else
5202 continue;
5203 }
906e58ca
NC		 5204 else
5205 {
5206 bfd_set_error (bfd_error_bad_value);
5207 goto error_ret_free_internal;
5208 }
34e77a92 5209 st_type = hash->root.type;
35fc36a8 5210 branch_type = hash->root.target_internal;
7413f23f 5211 sym_name = hash->root.root.root.string;
906e58ca
NC		 5212 }
5213
48229727 5214 do
7413f23f 5215 {
48229727
JB		 5216 /* Determine what (if any) linker stub is needed. */
5217 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5218 st_type, &branch_type,
5219 hash, destination, sym_sec,
48229727
JB		 5220 input_bfd, sym_name);
5221 if (stub_type == arm_stub_none)
5222 break;
5223
5224 /* Support for grouping stub sections. */
5225 id_sec = htab->stub_group[section->id].link_sec;
5226
5227 /* Get the name of this stub. */
5228 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5229 irela, stub_type);
48229727
JB		 5230 if (!stub_name)
5231 goto error_ret_free_internal;
5232
5233 /* We've either created a stub for this reloc already,
5234 or we are about to. */
5235 created_stub = TRUE;
5236
5237 stub_entry = arm_stub_hash_lookup
5238 (&htab->stub_hash_table, stub_name,
5239 FALSE, FALSE);
5240 if (stub_entry != NULL)
5241 {
5242 /* The proper stub has already been created. */
5243 free (stub_name);
eb7c4339 5244 stub_entry->target_value = sym_value;
48229727
JB		 5245 break;
5246 }
7413f23f 5247
48229727
JB		 5248 stub_entry = elf32_arm_add_stub (stub_name, section,
5249 htab);
5250 if (stub_entry == NULL)
5251 {
5252 free (stub_name);
5253 goto error_ret_free_internal;
5254 }
7413f23f 5255
48229727
JB		 5256 stub_entry->target_value = sym_value;
5257 stub_entry->target_section = sym_sec;
5258 stub_entry->stub_type = stub_type;
5259 stub_entry->h = hash;
35fc36a8 5260 stub_entry->branch_type = branch_type;
48229727
JB		 5261
5262 if (sym_name == NULL)
5263 sym_name = "unnamed";
21d799b5
NC		 5264 stub_entry->output_name = (char *)
5265 bfd_alloc (htab->stub_bfd,
48229727
JB		 5266 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5267 + strlen (sym_name));
5268 if (stub_entry->output_name == NULL)
5269 {
5270 free (stub_name);
5271 goto error_ret_free_internal;
5272 }
5273
5274 /* For historical reasons, use the existing names for
5275 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 5276 if ((r_type == (unsigned int) R_ARM_THM_CALL
5277 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5278 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 5279 sprintf (stub_entry->output_name,
5280 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 5281 else if ((r_type == (unsigned int) R_ARM_CALL
5282 || r_type == (unsigned int) R_ARM_JUMP24)
5283 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 5284 sprintf (stub_entry->output_name,
5285 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5286 else
5287 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5288 sym_name);
5289
5290 stub_changed = TRUE;
5291 }
5292 while (0);
5293
5294 /* Look for relocations which might trigger Cortex-A8
5295 erratum. */
5296 if (htab->fix_cortex_a8
5297 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5298 || r_type == (unsigned int) R_ARM_THM_JUMP19
5299 || r_type == (unsigned int) R_ARM_THM_CALL
5300 || r_type == (unsigned int) R_ARM_THM_XPC22))
5301 {
5302 bfd_vma from = section->output_section->vma
5303 + section->output_offset
5304 + irela->r_offset;
5305
5306 if ((from & 0xfff) == 0xffe)
5307 {
5308 /* Found a candidate. Note we haven't checked the
5309 destination is within 4K here: if we do so (and
5310 don't create an entry in a8_relocs) we can't tell
5311 that a branch should have been relocated when
5312 scanning later. */
5313 if (num_a8_relocs == a8_reloc_table_size)
5314 {
5315 a8_reloc_table_size *= 2;
21d799b5
NC		 5316 a8_relocs = (struct a8_erratum_reloc *)
5317 bfd_realloc (a8_relocs,
5318 sizeof (struct a8_erratum_reloc)
5319 * a8_reloc_table_size);
48229727
JB		 5320 }
5321
5322 a8_relocs[num_a8_relocs].from = from;
5323 a8_relocs[num_a8_relocs].destination = destination;
5324 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 5325 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 5326 a8_relocs[num_a8_relocs].sym_name = sym_name;
5327 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 5328 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 5329
5330 num_a8_relocs++;
5331 }
5332 }
906e58ca
NC		 5333 }
5334
48229727
JB		 5335 /* We're done with the internal relocs, free them. */
5336 if (elf_section_data (section)->relocs == NULL)
5337 free (internal_relocs);
5338 }
5339
5340 if (htab->fix_cortex_a8)
5341 {
5342 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 5343 qsort (a8_relocs, num_a8_relocs,
5344 sizeof (struct a8_erratum_reloc),
48229727
JB		 5345 &a8_reloc_compare);
5346
5347 /* Scan for branches which might trigger Cortex-A8 erratum. */
5348 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5349 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5350 a8_relocs, num_a8_relocs,
5351 prev_num_a8_fixes, &stub_changed)
5352 != 0)
48229727 5353 goto error_ret_free_local;
5e681ec4 5354 }
5e681ec4
PB		 5355 }
5356
eb7c4339 5357 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 5358 stub_changed = TRUE;
5359
906e58ca
NC		 5360 if (!stub_changed)
5361 break;
5e681ec4 5362
906e58ca
NC		 5363 /* OK, we've added some stubs. Find out the new size of the
5364 stub sections. */
5365 for (stub_sec = htab->stub_bfd->sections;
5366 stub_sec != NULL;
5367 stub_sec = stub_sec->next)
3e6b1042
DJ		 5368 {
5369 /* Ignore non-stub sections. */
5370 if (!strstr (stub_sec->name, STUB_SUFFIX))
5371 continue;
5372
5373 stub_sec->size = 0;
5374 }
b34b2d70 5375
906e58ca
NC		 5376 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5377
48229727
JB		 5378 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5379 if (htab->fix_cortex_a8)
5380 for (i = 0; i < num_a8_fixes; i++)
5381 {
5382 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5383 a8_fixes[i].section, htab);
5384
5385 if (stub_sec == NULL)
5386 goto error_ret_free_local;
5387
5388 stub_sec->size
5389 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5390 NULL);
5391 }
5392
5393
906e58ca
NC		 5394 /* Ask the linker to do its stuff. */
5395 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5396 }
5397
48229727
JB		 5398 /* Add stubs for Cortex-A8 erratum fixes now. */
5399 if (htab->fix_cortex_a8)
5400 {
5401 for (i = 0; i < num_a8_fixes; i++)
5402 {
5403 struct elf32_arm_stub_hash_entry *stub_entry;
5404 char *stub_name = a8_fixes[i].stub_name;
5405 asection *section = a8_fixes[i].section;
5406 unsigned int section_id = a8_fixes[i].section->id;
5407 asection *link_sec = htab->stub_group[section_id].link_sec;
5408 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 5409 const insn_sequence *template_sequence;
48229727
JB		 5410 int template_size, size = 0;
5411
5412 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5413 TRUE, FALSE);
5414 if (stub_entry == NULL)
5415 {
5416 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5417 section->owner,
5418 stub_name);
5419 return FALSE;
5420 }
5421
5422 stub_entry->stub_sec = stub_sec;
5423 stub_entry->stub_offset = 0;
5424 stub_entry->id_sec = link_sec;
5425 stub_entry->stub_type = a8_fixes[i].stub_type;
5426 stub_entry->target_section = a8_fixes[i].section;
5427 stub_entry->target_value = a8_fixes[i].offset;
5428 stub_entry->target_addend = a8_fixes[i].addend;
5429 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5430 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5431
d3ce72d0
NC		 5432 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5433 &template_sequence,
48229727
JB		 5434 &template_size);
5435
5436 stub_entry->stub_size = size;
d3ce72d0 5437 stub_entry->stub_template = template_sequence;
48229727
JB		 5438 stub_entry->stub_template_size = template_size;
5439 }
5440
5441 /* Stash the Cortex-A8 erratum fix array for use later in
5442 elf32_arm_write_section(). */
5443 htab->a8_erratum_fixes = a8_fixes;
5444 htab->num_a8_erratum_fixes = num_a8_fixes;
5445 }
5446 else
5447 {
5448 htab->a8_erratum_fixes = NULL;
5449 htab->num_a8_erratum_fixes = 0;
5450 }
906e58ca
NC		 5451 return TRUE;
5452
5453 error_ret_free_local:
5454 return FALSE;
5e681ec4
PB		 5455}
5456
906e58ca
NC		 5457/* Build all the stubs associated with the current output file. The
5458 stubs are kept in a hash table attached to the main linker hash
5459 table. We also set up the .plt entries for statically linked PIC
5460 functions here. This function is called via arm_elf_finish in the
5461 linker. */
252b5132 5462
906e58ca
NC		 5463bfd_boolean
5464elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5465{
906e58ca
NC		 5466 asection *stub_sec;
5467 struct bfd_hash_table *table;
5468 struct elf32_arm_link_hash_table *htab;
252b5132 5469
906e58ca 5470 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5471 if (htab == NULL)
5472 return FALSE;
252b5132 5473
906e58ca
NC		 5474 for (stub_sec = htab->stub_bfd->sections;
5475 stub_sec != NULL;
5476 stub_sec = stub_sec->next)
252b5132 5477 {
906e58ca
NC		 5478 bfd_size_type size;
5479
8029a119 5480 /* Ignore non-stub sections. */
906e58ca
NC		 5481 if (!strstr (stub_sec->name, STUB_SUFFIX))
5482 continue;
5483
5484 /* Allocate memory to hold the linker stubs. */
5485 size = stub_sec->size;
21d799b5 5486 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5487 if (stub_sec->contents == NULL && size != 0)
5488 return FALSE;
5489 stub_sec->size = 0;
252b5132
RH		 5490 }
5491
906e58ca
NC		 5492 /* Build the stubs as directed by the stub hash table. */
5493 table = &htab->stub_hash_table;
5494 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5495 if (htab->fix_cortex_a8)
5496 {
5497 /* Place the cortex a8 stubs last. */
5498 htab->fix_cortex_a8 = -1;
5499 bfd_hash_traverse (table, arm_build_one_stub, info);
5500 }
252b5132 5501
906e58ca 5502 return TRUE;
252b5132
RH		 5503}
5504
9b485d32
NC		 5505/* Locate the Thumb encoded calling stub for NAME. */
5506
252b5132 5507static struct elf_link_hash_entry *
57e8b36a
NC		 5508find_thumb_glue (struct bfd_link_info *link_info,
5509 const char *name,
f2a9dd69 5510 char **error_message)
252b5132
RH		 5511{
5512 char *tmp_name;
5513 struct elf_link_hash_entry *hash;
5514 struct elf32_arm_link_hash_table *hash_table;
5515
5516 /* We need a pointer to the armelf specific hash table. */
5517 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5518 if (hash_table == NULL)
5519 return NULL;
252b5132 5520
21d799b5
NC		 5521 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5522 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5523
5524 BFD_ASSERT (tmp_name);
5525
5526 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5527
5528 hash = elf_link_hash_lookup
b34976b6 5529 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5530
b1657152
AM		 5531 if (hash == NULL
5532 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5533 tmp_name, name) == -1)
5534 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5535
5536 free (tmp_name);
5537
5538 return hash;
5539}
5540
9b485d32
NC		 5541/* Locate the ARM encoded calling stub for NAME. */
5542
252b5132 5543static struct elf_link_hash_entry *
57e8b36a
NC		 5544find_arm_glue (struct bfd_link_info *link_info,
5545 const char *name,
f2a9dd69 5546 char **error_message)
252b5132
RH		 5547{
5548 char *tmp_name;
5549 struct elf_link_hash_entry *myh;
5550 struct elf32_arm_link_hash_table *hash_table;
5551
5552 /* We need a pointer to the elfarm specific hash table. */
5553 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5554 if (hash_table == NULL)
5555 return NULL;
252b5132 5556
21d799b5
NC		 5557 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5558 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5559
5560 BFD_ASSERT (tmp_name);
5561
5562 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5563
5564 myh = elf_link_hash_lookup
b34976b6 5565 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5566
b1657152
AM		 5567 if (myh == NULL
5568 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5569 tmp_name, name) == -1)
5570 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5571
5572 free (tmp_name);
5573
5574 return myh;
5575}
5576
8f6277f5 5577/* ARM->Thumb glue (static images):
252b5132
RH		 5578
5579 .arm
5580 __func_from_arm:
5581 ldr r12, __func_addr
5582 bx r12
5583 __func_addr:
906e58ca 5584 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5585
26079076
PB		 5586 (v5t static images)
5587 .arm
5588 __func_from_arm:
5589 ldr pc, __func_addr
5590 __func_addr:
906e58ca 5591 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5592
8f6277f5
PB		 5593 (relocatable images)
5594 .arm
5595 __func_from_arm:
5596 ldr r12, __func_offset
5597 add r12, r12, pc
5598 bx r12
5599 __func_offset:
8029a119 5600 .word func - . */
8f6277f5
PB		 5601
5602#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5603static const insn32 a2t1_ldr_insn = 0xe59fc000;
5604static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5605static const insn32 a2t3_func_addr_insn = 0x00000001;
5606
26079076
PB		 5607#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5608static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5609static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5610
8f6277f5
PB		 5611#define ARM2THUMB_PIC_GLUE_SIZE 16
5612static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5613static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5614static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5615
9b485d32 5616/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5617
8029a119
NC		 5618 .thumb .thumb
5619 .align 2 .align 2
5620 __func_from_thumb: __func_from_thumb:
5621 bx pc push {r6, lr}
5622 nop ldr r6, __func_addr
5623 .arm mov lr, pc
5624 b func bx r6
fcef9eb7 5625 .arm
b38cadfb 5626 ;; back_to_thumb
fcef9eb7 5627 ldmia r13! {r6, lr}
b38cadfb 5628 bx lr
8029a119
NC		 5629 __func_addr:
5630 .word func */
252b5132
RH		 5631
5632#define THUMB2ARM_GLUE_SIZE 8
5633static const insn16 t2a1_bx_pc_insn = 0x4778;
5634static const insn16 t2a2_noop_insn = 0x46c0;
5635static const insn32 t2a3_b_insn = 0xea000000;
5636
c7b8f16e
JB		 5637#define VFP11_ERRATUM_VENEER_SIZE 8
5638
845b51d6
PB		 5639#define ARM_BX_VENEER_SIZE 12
5640static const insn32 armbx1_tst_insn = 0xe3100001;
5641static const insn32 armbx2_moveq_insn = 0x01a0f000;
5642static const insn32 armbx3_bx_insn = 0xe12fff10;
5643
7e392df6 5644#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5645static void
5646arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5647{
5648 asection * s;
8029a119 5649 bfd_byte * contents;
252b5132 5650
8029a119 5651 if (size == 0)
3e6b1042
DJ		 5652 {
5653 /* Do not include empty glue sections in the output. */
5654 if (abfd != NULL)
5655 {
5656 s = bfd_get_section_by_name (abfd, name);
5657 if (s != NULL)
5658 s->flags |= SEC_EXCLUDE;
5659 }
5660 return;
5661 }
252b5132 5662
8029a119 5663 BFD_ASSERT (abfd != NULL);
252b5132 5664
8029a119
NC		 5665 s = bfd_get_section_by_name (abfd, name);
5666 BFD_ASSERT (s != NULL);
252b5132 5667
21d799b5 5668 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5669
8029a119
NC		 5670 BFD_ASSERT (s->size == size);
5671 s->contents = contents;
5672}
906e58ca 5673
8029a119
NC		 5674bfd_boolean
5675bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5676{
5677 struct elf32_arm_link_hash_table * globals;
906e58ca 5678
8029a119
NC		 5679 globals = elf32_arm_hash_table (info);
5680 BFD_ASSERT (globals != NULL);
906e58ca 5681
8029a119
NC		 5682 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5683 globals->arm_glue_size,
5684 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5685
8029a119
NC		 5686 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5687 globals->thumb_glue_size,
5688 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5689
8029a119
NC		 5690 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5691 globals->vfp11_erratum_glue_size,
5692 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5693
8029a119
NC		 5694 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5695 globals->bx_glue_size,
845b51d6
PB		 5696 ARM_BX_GLUE_SECTION_NAME);
5697
b34976b6 5698 return TRUE;
252b5132
RH		 5699}
5700
a4fd1a8e 5701/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5702 returns the symbol identifying the stub. */
5703
a4fd1a8e 5704static struct elf_link_hash_entry *
57e8b36a
NC		 5705record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5706 struct elf_link_hash_entry * h)
252b5132
RH		 5707{
5708 const char * name = h->root.root.string;
63b0f745 5709 asection * s;
252b5132
RH		 5710 char * tmp_name;
5711 struct elf_link_hash_entry * myh;
14a793b2 5712 struct bfd_link_hash_entry * bh;
252b5132 5713 struct elf32_arm_link_hash_table * globals;
dc810e39 5714 bfd_vma val;
2f475487 5715 bfd_size_type size;
252b5132
RH		 5716
5717 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5718 BFD_ASSERT (globals != NULL);
5719 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5720
5721 s = bfd_get_section_by_name
5722 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5723
252b5132
RH		 5724 BFD_ASSERT (s != NULL);
5725
21d799b5
NC		 5726 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5727 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5728
5729 BFD_ASSERT (tmp_name);
5730
5731 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5732
5733 myh = elf_link_hash_lookup
b34976b6 5734 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5735
5736 if (myh != NULL)
5737 {
9b485d32 5738 /* We've already seen this guy. */
252b5132 5739 free (tmp_name);
a4fd1a8e 5740 return myh;
252b5132
RH		 5741 }
5742
57e8b36a
NC		 5743 /* The only trick here is using hash_table->arm_glue_size as the value.
5744 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5745 putting it. The +1 on the value marks that the stub has not been
5746 output yet - not that it is a Thumb function. */
14a793b2 5747 bh = NULL;
dc810e39
AM		 5748 val = globals->arm_glue_size + 1;
5749 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5750 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5751 NULL, TRUE, FALSE, &bh);
252b5132 5752
b7693d02
DJ		 5753 myh = (struct elf_link_hash_entry *) bh;
5754 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5755 myh->forced_local = 1;
5756
252b5132
RH		 5757 free (tmp_name);
5758
27e55c4d
PB		 5759 if (link_info->shared || globals->root.is_relocatable_executable
5760 || globals->pic_veneer)
2f475487 5761 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5762 else if (globals->use_blx)
5763 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5764 else
2f475487
AM		 5765 size = ARM2THUMB_STATIC_GLUE_SIZE;
5766
5767 s->size += size;
5768 globals->arm_glue_size += size;
252b5132 5769
a4fd1a8e 5770 return myh;
252b5132
RH		 5771}
5772
845b51d6
PB		 5773/* Allocate space for ARMv4 BX veneers. */
5774
5775static void
5776record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5777{
5778 asection * s;
5779 struct elf32_arm_link_hash_table *globals;
5780 char *tmp_name;
5781 struct elf_link_hash_entry *myh;
5782 struct bfd_link_hash_entry *bh;
5783 bfd_vma val;
5784
5785 /* BX PC does not need a veneer. */
5786 if (reg == 15)
5787 return;
5788
5789 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5790 BFD_ASSERT (globals != NULL);
5791 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5792
5793 /* Check if this veneer has already been allocated. */
5794 if (globals->bx_glue_offset[reg])
5795 return;
5796
5797 s = bfd_get_section_by_name
5798 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5799
5800 BFD_ASSERT (s != NULL);
5801
5802 /* Add symbol for veneer. */
21d799b5
NC		 5803 tmp_name = (char *)
5804 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5805
845b51d6 5806 BFD_ASSERT (tmp_name);
906e58ca 5807
845b51d6 5808 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5809
845b51d6
PB		 5810 myh = elf_link_hash_lookup
5811 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5812
845b51d6 5813 BFD_ASSERT (myh == NULL);
906e58ca 5814
845b51d6
PB		 5815 bh = NULL;
5816 val = globals->bx_glue_size;
5817 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5818 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5819 NULL, TRUE, FALSE, &bh);
5820
5821 myh = (struct elf_link_hash_entry *) bh;
5822 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5823 myh->forced_local = 1;
5824
5825 s->size += ARM_BX_VENEER_SIZE;
5826 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5827 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5828}
5829
5830
c7b8f16e
JB		 5831/* Add an entry to the code/data map for section SEC. */
5832
5833static void
5834elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5835{
5836 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5837 unsigned int newidx;
906e58ca 5838
c7b8f16e
JB		 5839 if (sec_data->map == NULL)
5840 {
21d799b5
NC		 5841 sec_data->map = (elf32_arm_section_map *)
5842 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5843 sec_data->mapcount = 0;
5844 sec_data->mapsize = 1;
5845 }
906e58ca 5846
c7b8f16e 5847 newidx = sec_data->mapcount++;
906e58ca 5848
c7b8f16e
JB		 5849 if (sec_data->mapcount > sec_data->mapsize)
5850 {
5851 sec_data->mapsize *= 2;
21d799b5
NC		 5852 sec_data->map = (elf32_arm_section_map *)
5853 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5854 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5855 }
5856
5857 if (sec_data->map)
5858 {
5859 sec_data->map[newidx].vma = vma;
5860 sec_data->map[newidx].type = type;
c7b8f16e 5861 }
c7b8f16e
JB		 5862}
5863
5864
5865/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5866 veneers are handled for now. */
5867
5868static bfd_vma
5869record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5870 elf32_vfp11_erratum_list *branch,
5871 bfd *branch_bfd,
5872 asection *branch_sec,
5873 unsigned int offset)
5874{
5875 asection *s;
5876 struct elf32_arm_link_hash_table *hash_table;
5877 char *tmp_name;
5878 struct elf_link_hash_entry *myh;
5879 struct bfd_link_hash_entry *bh;
5880 bfd_vma val;
5881 struct _arm_elf_section_data *sec_data;
c7b8f16e 5882 elf32_vfp11_erratum_list *newerr;
906e58ca 5883
c7b8f16e 5884 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5885 BFD_ASSERT (hash_table != NULL);
5886 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5887
c7b8f16e
JB		 5888 s = bfd_get_section_by_name
5889 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5890
c7b8f16e 5891 sec_data = elf32_arm_section_data (s);
906e58ca 5892
c7b8f16e 5893 BFD_ASSERT (s != NULL);
906e58ca 5894
21d799b5
NC		 5895 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5896 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5897
c7b8f16e 5898 BFD_ASSERT (tmp_name);
906e58ca 5899
c7b8f16e
JB		 5900 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5901 hash_table->num_vfp11_fixes);
906e58ca 5902
c7b8f16e
JB		 5903 myh = elf_link_hash_lookup
5904 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5905
c7b8f16e 5906 BFD_ASSERT (myh == NULL);
906e58ca 5907
c7b8f16e
JB		 5908 bh = NULL;
5909 val = hash_table->vfp11_erratum_glue_size;
5910 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5911 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5912 NULL, TRUE, FALSE, &bh);
5913
5914 myh = (struct elf_link_hash_entry *) bh;
5915 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5916 myh->forced_local = 1;
5917
5918 /* Link veneer back to calling location. */
c7e2358a 5919 sec_data->erratumcount += 1;
21d799b5
NC		 5920 newerr = (elf32_vfp11_erratum_list *)
5921 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5922
c7b8f16e
JB		 5923 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5924 newerr->vma = -1;
5925 newerr->u.v.branch = branch;
5926 newerr->u.v.id = hash_table->num_vfp11_fixes;
5927 branch->u.b.veneer = newerr;
5928
5929 newerr->next = sec_data->erratumlist;
5930 sec_data->erratumlist = newerr;
5931
5932 /* A symbol for the return from the veneer. */
5933 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5934 hash_table->num_vfp11_fixes);
5935
5936 myh = elf_link_hash_lookup
5937 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5938
c7b8f16e
JB		 5939 if (myh != NULL)
5940 abort ();
5941
5942 bh = NULL;
5943 val = offset + 4;
5944 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5945 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5946
c7b8f16e
JB		 5947 myh = (struct elf_link_hash_entry *) bh;
5948 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5949 myh->forced_local = 1;
5950
5951 free (tmp_name);
906e58ca 5952
c7b8f16e
JB		 5953 /* Generate a mapping symbol for the veneer section, and explicitly add an
5954 entry for that symbol to the code/data map for the section. */
5955 if (hash_table->vfp11_erratum_glue_size == 0)
5956 {
5957 bh = NULL;
5958 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5959 ever requires this erratum fix. */
5960 _bfd_generic_link_add_one_symbol (link_info,
5961 hash_table->bfd_of_glue_owner, "$a",
5962 BSF_LOCAL, s, 0, NULL,
5963 TRUE, FALSE, &bh);
5964
5965 myh = (struct elf_link_hash_entry *) bh;
5966 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5967 myh->forced_local = 1;
906e58ca 5968
c7b8f16e
JB		 5969 /* The elf32_arm_init_maps function only cares about symbols from input
5970 BFDs. We must make a note of this generated mapping symbol
5971 ourselves so that code byteswapping works properly in
5972 elf32_arm_write_section. */
5973 elf32_arm_section_map_add (s, 'a', 0);
5974 }
906e58ca 5975
c7b8f16e
JB		 5976 s->size += VFP11_ERRATUM_VENEER_SIZE;
5977 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5978 hash_table->num_vfp11_fixes++;
906e58ca 5979
c7b8f16e
JB		 5980 /* The offset of the veneer. */
5981 return val;
5982}
5983
8029a119 5984#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5985 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5986 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5987
5988/* Create a fake section for use by the ARM backend of the linker. */
5989
5990static bfd_boolean
5991arm_make_glue_section (bfd * abfd, const char * name)
5992{
5993 asection * sec;
5994
5995 sec = bfd_get_section_by_name (abfd, name);
5996 if (sec != NULL)
5997 /* Already made. */
5998 return TRUE;
5999
6000 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6001
6002 if (sec == NULL
6003 || !bfd_set_section_alignment (abfd, sec, 2))
6004 return FALSE;
6005
6006 /* Set the gc mark to prevent the section from being removed by garbage
6007 collection, despite the fact that no relocs refer to this section. */
6008 sec->gc_mark = 1;
6009
6010 return TRUE;
6011}
6012
8afb0e02
NC		 6013/* Add the glue sections to ABFD. This function is called from the
6014 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6015
b34976b6 6016bfd_boolean
57e8b36a
NC		 6017bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6018 struct bfd_link_info *info)
252b5132 6019{
8afb0e02
NC		 6020 /* If we are only performing a partial
6021 link do not bother adding the glue. */
1049f94e 6022 if (info->relocatable)
b34976b6 6023 return TRUE;
252b5132 6024
8029a119
NC		 6025 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6026 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6027 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6028 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6029}
6030
6031/* Select a BFD to be used to hold the sections used by the glue code.
6032 This function is called from the linker scripts in ld/emultempl/
8029a119 6033 {armelf/pe}.em. */
8afb0e02 6034
b34976b6 6035bfd_boolean
57e8b36a 6036bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6037{
6038 struct elf32_arm_link_hash_table *globals;
6039
6040 /* If we are only performing a partial link
6041 do not bother getting a bfd to hold the glue. */
1049f94e 6042 if (info->relocatable)
b34976b6 6043 return TRUE;
8afb0e02 6044
b7693d02
DJ		 6045 /* Make sure we don't attach the glue sections to a dynamic object. */
6046 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6047
8afb0e02 6048 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6049 BFD_ASSERT (globals != NULL);
6050
6051 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6052 return TRUE;
8afb0e02 6053
252b5132
RH		 6054 /* Save the bfd for later use. */
6055 globals->bfd_of_glue_owner = abfd;
cedb70c5 6056
b34976b6 6057 return TRUE;
252b5132
RH		 6058}
6059
906e58ca
NC		 6060static void
6061check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6062{
2de70689
MGD		 6063 int cpu_arch;
6064
b38cadfb 6065 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6066 Tag_CPU_arch);
6067
6068 if (globals->fix_arm1176)
6069 {
6070 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6071 globals->use_blx = 1;
6072 }
6073 else
6074 {
6075 if (cpu_arch > TAG_CPU_ARCH_V4T)
6076 globals->use_blx = 1;
6077 }
39b41c9c
PB		 6078}
6079
b34976b6 6080bfd_boolean
57e8b36a 6081bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6082 struct bfd_link_info *link_info)
252b5132
RH		 6083{
6084 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6085 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6086 Elf_Internal_Rela *irel, *irelend;
6087 bfd_byte *contents = NULL;
252b5132
RH		 6088
6089 asection *sec;
6090 struct elf32_arm_link_hash_table *globals;
6091
6092 /* If we are only performing a partial link do not bother
6093 to construct any glue. */
1049f94e 6094 if (link_info->relocatable)
b34976b6 6095 return TRUE;
252b5132 6096
39ce1a6a
NC		 6097 /* Here we have a bfd that is to be included on the link. We have a
6098 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6099 globals = elf32_arm_hash_table (link_info);
252b5132 6100 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6101
6102 check_use_blx (globals);
252b5132 6103
d504ffc8 6104 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6105 {
d003868e
AM		 6106 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6107 abfd);
e489d0ae
PB		 6108 return FALSE;
6109 }
f21f3fe0 6110
39ce1a6a
NC		 6111 /* PR 5398: If we have not decided to include any loadable sections in
6112 the output then we will not have a glue owner bfd. This is OK, it
6113 just means that there is nothing else for us to do here. */
6114 if (globals->bfd_of_glue_owner == NULL)
6115 return TRUE;
6116
252b5132
RH		 6117 /* Rummage around all the relocs and map the glue vectors. */
6118 sec = abfd->sections;
6119
6120 if (sec == NULL)
b34976b6 6121 return TRUE;
252b5132
RH		 6122
6123 for (; sec != NULL; sec = sec->next)
6124 {
6125 if (sec->reloc_count == 0)
6126 continue;
6127
2f475487
AM		 6128 if ((sec->flags & SEC_EXCLUDE) != 0)
6129 continue;
6130
0ffa91dd 6131 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6132
9b485d32 6133 /* Load the relocs. */
6cdc0ccc 6134 internal_relocs
906e58ca 6135 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6136
6cdc0ccc
AM		 6137 if (internal_relocs == NULL)
6138 goto error_return;
252b5132 6139
6cdc0ccc
AM		 6140 irelend = internal_relocs + sec->reloc_count;
6141 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6142 {
6143 long r_type;
6144 unsigned long r_index;
252b5132
RH		 6145
6146 struct elf_link_hash_entry *h;
6147
6148 r_type = ELF32_R_TYPE (irel->r_info);
6149 r_index = ELF32_R_SYM (irel->r_info);
6150
9b485d32 6151 /* These are the only relocation types we care about. */
ba96a88f 6152 if ( r_type != R_ARM_PC24
845b51d6 6153 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6154 continue;
6155
6156 /* Get the section contents if we haven't done so already. */
6157 if (contents == NULL)
6158 {
6159 /* Get cached copy if it exists. */
6160 if (elf_section_data (sec)->this_hdr.contents != NULL)
6161 contents = elf_section_data (sec)->this_hdr.contents;
6162 else
6163 {
6164 /* Go get them off disk. */
57e8b36a 6165 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6166 goto error_return;
6167 }
6168 }
6169
845b51d6
PB		 6170 if (r_type == R_ARM_V4BX)
6171 {
6172 int reg;
6173
6174 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6175 record_arm_bx_glue (link_info, reg);
6176 continue;
6177 }
6178
a7c10850 6179 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6180 h = NULL;
6181
9b485d32 6182 /* We don't care about local symbols. */
252b5132
RH		 6183 if (r_index < symtab_hdr->sh_info)
6184 continue;
6185
9b485d32 6186 /* This is an external symbol. */
252b5132
RH		 6187 r_index -= symtab_hdr->sh_info;
6188 h = (struct elf_link_hash_entry *)
6189 elf_sym_hashes (abfd)[r_index];
6190
6191 /* If the relocation is against a static symbol it must be within
6192 the current section and so cannot be a cross ARM/Thumb relocation. */
6193 if (h == NULL)
6194 continue;
6195
d504ffc8
DJ		 6196 /* If the call will go through a PLT entry then we do not need
6197 glue. */
362d30a1 6198 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6199 continue;
6200
252b5132
RH		 6201 switch (r_type)
6202 {
6203 case R_ARM_PC24:
6204 /* This one is a call from arm code. We need to look up
2f0ca46a 6205 the target of the call. If it is a thumb target, we
252b5132 6206 insert glue. */
35fc36a8 6207 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6208 record_arm_to_thumb_glue (link_info, h);
6209 break;
6210
252b5132 6211 default:
c6596c5e 6212 abort ();
252b5132
RH		 6213 }
6214 }
6cdc0ccc
AM		 6215
6216 if (contents != NULL
6217 && elf_section_data (sec)->this_hdr.contents != contents)
6218 free (contents);
6219 contents = NULL;
6220
6221 if (internal_relocs != NULL
6222 && elf_section_data (sec)->relocs != internal_relocs)
6223 free (internal_relocs);
6224 internal_relocs = NULL;
252b5132
RH		 6225 }
6226
b34976b6 6227 return TRUE;
9a5aca8c 6228
252b5132 6229error_return:
6cdc0ccc
AM		 6230 if (contents != NULL
6231 && elf_section_data (sec)->this_hdr.contents != contents)
6232 free (contents);
6233 if (internal_relocs != NULL
6234 && elf_section_data (sec)->relocs != internal_relocs)
6235 free (internal_relocs);
9a5aca8c 6236
b34976b6 6237 return FALSE;
252b5132 6238}
7e392df6 6239#endif
252b5132 6240
eb043451 6241
c7b8f16e
JB		 6242/* Initialise maps of ARM/Thumb/data for input BFDs. */
6243
6244void
6245bfd_elf32_arm_init_maps (bfd *abfd)
6246{
6247 Elf_Internal_Sym *isymbuf;
6248 Elf_Internal_Shdr *hdr;
6249 unsigned int i, localsyms;
6250
af1f4419
NC		 6251 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6252 if (! is_arm_elf (abfd))
6253 return;
6254
c7b8f16e
JB		 6255 if ((abfd->flags & DYNAMIC) != 0)
6256 return;
6257
0ffa91dd 6258 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6259 localsyms = hdr->sh_info;
6260
6261 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6262 should contain the number of local symbols, which should come before any
6263 global symbols. Mapping symbols are always local. */
6264 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6265 NULL);
6266
6267 /* No internal symbols read? Skip this BFD. */
6268 if (isymbuf == NULL)
6269 return;
6270
6271 for (i = 0; i < localsyms; i++)
6272 {
6273 Elf_Internal_Sym *isym = &isymbuf[i];
6274 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6275 const char *name;
906e58ca 6276
c7b8f16e
JB		 6277 if (sec != NULL
6278 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6279 {
6280 name = bfd_elf_string_from_elf_section (abfd,
6281 hdr->sh_link, isym->st_name);
906e58ca 6282
c7b8f16e
JB		 6283 if (bfd_is_arm_special_symbol_name (name,
6284 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6285 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6286 }
6287 }
6288}
6289
6290
48229727
JB		 6291/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6292 say what they wanted. */
6293
6294void
6295bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6296{
6297 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6298 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6299
4dfe6ac6
NC		 6300 if (globals == NULL)
6301 return;
6302
48229727
JB		 6303 if (globals->fix_cortex_a8 == -1)
6304 {
6305 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6306 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6307 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6308 || out_attr[Tag_CPU_arch_profile].i == 0))
6309 globals->fix_cortex_a8 = 1;
6310 else
6311 globals->fix_cortex_a8 = 0;
6312 }
6313}
6314
6315
c7b8f16e
JB		 6316void
6317bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6318{
6319 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6320 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6321
4dfe6ac6
NC		 6322 if (globals == NULL)
6323 return;
c7b8f16e
JB		 6324 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6325 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6326 {
6327 switch (globals->vfp11_fix)
6328 {
6329 case BFD_ARM_VFP11_FIX_DEFAULT:
6330 case BFD_ARM_VFP11_FIX_NONE:
6331 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6332 break;
906e58ca 6333
c7b8f16e
JB		 6334 default:
6335 /* Give a warning, but do as the user requests anyway. */
6336 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6337 "workaround is not necessary for target architecture"), obfd);
6338 }
6339 }
6340 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6341 /* For earlier architectures, we might need the workaround, but do not
6342 enable it by default. If users is running with broken hardware, they
6343 must enable the erratum fix explicitly. */
6344 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6345}
6346
6347
906e58ca
NC		 6348enum bfd_arm_vfp11_pipe
6349{
c7b8f16e
JB		 6350 VFP11_FMAC,
6351 VFP11_LS,
6352 VFP11_DS,
6353 VFP11_BAD
6354};
6355
6356/* Return a VFP register number. This is encoded as RX:X for single-precision
6357 registers, or X:RX for double-precision registers, where RX is the group of
6358 four bits in the instruction encoding and X is the single extension bit.
6359 RX and X fields are specified using their lowest (starting) bit. The return
6360 value is:
6361
6362 0...31: single-precision registers s0...s31
6363 32...63: double-precision registers d0...d31.
906e58ca 6364
c7b8f16e
JB		 6365 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6366 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6367
c7b8f16e
JB		 6368static unsigned int
6369bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6370 unsigned int x)
6371{
6372 if (is_double)
6373 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6374 else
6375 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6376}
6377
6378/* Set bits in *WMASK according to a register number REG as encoded by
6379 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6380
6381static void
6382bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6383{
6384 if (reg < 32)
6385 *wmask |= 1 << reg;
6386 else if (reg < 48)
6387 *wmask |= 3 << ((reg - 32) * 2);
6388}
6389
6390/* Return TRUE if WMASK overwrites anything in REGS. */
6391
6392static bfd_boolean
6393bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6394{
6395 int i;
906e58ca 6396
c7b8f16e
JB		 6397 for (i = 0; i < numregs; i++)
6398 {
6399 unsigned int reg = regs[i];
6400
6401 if (reg < 32 && (wmask & (1 << reg)) != 0)
6402 return TRUE;
906e58ca 6403
c7b8f16e
JB		 6404 reg -= 32;
6405
6406 if (reg >= 16)
6407 continue;
906e58ca 6408
c7b8f16e
JB		 6409 if ((wmask & (3 << (reg * 2))) != 0)
6410 return TRUE;
6411 }
906e58ca 6412
c7b8f16e
JB		 6413 return FALSE;
6414}
6415
6416/* In this function, we're interested in two things: finding input registers
6417 for VFP data-processing instructions, and finding the set of registers which
6418 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6419 hold the written set, so FLDM etc. are easy to deal with (we're only
6420 interested in 32 SP registers or 16 dp registers, due to the VFP version
6421 implemented by the chip in question). DP registers are marked by setting
6422 both SP registers in the write mask). */
6423
6424static enum bfd_arm_vfp11_pipe
6425bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6426 int *numregs)
6427{
91d6fa6a 6428 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6429 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6430
6431 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6432 {
6433 unsigned int pqrs;
6434 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6435 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6436
6437 pqrs = ((insn & 0x00800000) >> 20)
6438 | ((insn & 0x00300000) >> 19)
6439 | ((insn & 0x00000040) >> 6);
6440
6441 switch (pqrs)
6442 {
6443 case 0: /* fmac[sd]. */
6444 case 1: /* fnmac[sd]. */
6445 case 2: /* fmsc[sd]. */
6446 case 3: /* fnmsc[sd]. */
91d6fa6a 6447 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6448 bfd_arm_vfp11_write_mask (destmask, fd);
6449 regs[0] = fd;
6450 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6451 regs[2] = fm;
6452 *numregs = 3;
6453 break;
6454
6455 case 4: /* fmul[sd]. */
6456 case 5: /* fnmul[sd]. */
6457 case 6: /* fadd[sd]. */
6458 case 7: /* fsub[sd]. */
91d6fa6a 6459 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6460 goto vfp_binop;
6461
6462 case 8: /* fdiv[sd]. */
91d6fa6a 6463 vpipe = VFP11_DS;
c7b8f16e
JB		 6464 vfp_binop:
6465 bfd_arm_vfp11_write_mask (destmask, fd);
6466 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6467 regs[1] = fm;
6468 *numregs = 2;
6469 break;
6470
6471 case 15: /* extended opcode. */
6472 {
6473 unsigned int extn = ((insn >> 15) & 0x1e)
6474 | ((insn >> 7) & 1);
6475
6476 switch (extn)
6477 {
6478 case 0: /* fcpy[sd]. */
6479 case 1: /* fabs[sd]. */
6480 case 2: /* fneg[sd]. */
6481 case 8: /* fcmp[sd]. */
6482 case 9: /* fcmpe[sd]. */
6483 case 10: /* fcmpz[sd]. */
6484 case 11: /* fcmpez[sd]. */
6485 case 16: /* fuito[sd]. */
6486 case 17: /* fsito[sd]. */
6487 case 24: /* ftoui[sd]. */
6488 case 25: /* ftouiz[sd]. */
6489 case 26: /* ftosi[sd]. */
6490 case 27: /* ftosiz[sd]. */
6491 /* These instructions will not bounce due to underflow. */
6492 *numregs = 0;
91d6fa6a 6493 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6494 break;
6495
6496 case 3: /* fsqrt[sd]. */
6497 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6498 registers to cause the erratum in previous instructions. */
6499 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6500 vpipe = VFP11_DS;
c7b8f16e
JB		 6501 break;
6502
6503 case 15: /* fcvt{ds,sd}. */
6504 {
6505 int rnum = 0;
6506
6507 bfd_arm_vfp11_write_mask (destmask, fd);
6508
6509 /* Only FCVTSD can underflow. */
6510 if ((insn & 0x100) != 0)
6511 regs[rnum++] = fm;
6512
6513 *numregs = rnum;
6514
91d6fa6a 6515 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6516 }
6517 break;
6518
6519 default:
6520 return VFP11_BAD;
6521 }
6522 }
6523 break;
6524
6525 default:
6526 return VFP11_BAD;
6527 }
6528 }
6529 /* Two-register transfer. */
6530 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6531 {
6532 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6533
c7b8f16e
JB		 6534 if ((insn & 0x100000) == 0)
6535 {
6536 if (is_double)
6537 bfd_arm_vfp11_write_mask (destmask, fm);
6538 else
6539 {
6540 bfd_arm_vfp11_write_mask (destmask, fm);
6541 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6542 }
6543 }
6544
91d6fa6a 6545 vpipe = VFP11_LS;
c7b8f16e
JB		 6546 }
6547 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6548 {
6549 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6550 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6551
c7b8f16e
JB		 6552 switch (puw)
6553 {
6554 case 0: /* Two-reg transfer. We should catch these above. */
6555 abort ();
906e58ca 6556
c7b8f16e
JB		 6557 case 2: /* fldm[sdx]. */
6558 case 3:
6559 case 5:
6560 {
6561 unsigned int i, offset = insn & 0xff;
6562
6563 if (is_double)
6564 offset >>= 1;
6565
6566 for (i = fd; i < fd + offset; i++)
6567 bfd_arm_vfp11_write_mask (destmask, i);
6568 }
6569 break;
906e58ca 6570
c7b8f16e
JB		 6571 case 4: /* fld[sd]. */
6572 case 6:
6573 bfd_arm_vfp11_write_mask (destmask, fd);
6574 break;
906e58ca 6575
c7b8f16e
JB		 6576 default:
6577 return VFP11_BAD;
6578 }
6579
91d6fa6a 6580 vpipe = VFP11_LS;
c7b8f16e
JB		 6581 }
6582 /* Single-register transfer. Note L==0. */
6583 else if ((insn & 0x0f100e10) == 0x0e000a10)
6584 {
6585 unsigned int opcode = (insn >> 21) & 7;
6586 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6587
6588 switch (opcode)
6589 {
6590 case 0: /* fmsr/fmdlr. */
6591 case 1: /* fmdhr. */
6592 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6593 destination register. I don't know if this is exactly right,
6594 but it is the conservative choice. */
6595 bfd_arm_vfp11_write_mask (destmask, fn);
6596 break;
6597
6598 case 7: /* fmxr. */
6599 break;
6600 }
6601
91d6fa6a 6602 vpipe = VFP11_LS;
c7b8f16e
JB		 6603 }
6604
91d6fa6a 6605 return vpipe;
c7b8f16e
JB		 6606}
6607
6608
6609static int elf32_arm_compare_mapping (const void * a, const void * b);
6610
6611
6612/* Look for potentially-troublesome code sequences which might trigger the
6613 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6614 (available from ARM) for details of the erratum. A short version is
6615 described in ld.texinfo. */
6616
6617bfd_boolean
6618bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6619{
6620 asection *sec;
6621 bfd_byte *contents = NULL;
6622 int state = 0;
6623 int regs[3], numregs = 0;
6624 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6625 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6626
4dfe6ac6
NC		 6627 if (globals == NULL)
6628 return FALSE;
6629
c7b8f16e
JB		 6630 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6631 The states transition as follows:
906e58ca 6632
c7b8f16e
JB		 6633 0 -> 1 (vector) or 0 -> 2 (scalar)
6634 A VFP FMAC-pipeline instruction has been seen. Fill
6635 regs[0]..regs[numregs-1] with its input operands. Remember this
6636 instruction in 'first_fmac'.
6637
6638 1 -> 2
6639 Any instruction, except for a VFP instruction which overwrites
6640 regs[*].
906e58ca 6641
c7b8f16e
JB		 6642 1 -> 3 [ -> 0 ] or
6643 2 -> 3 [ -> 0 ]
6644 A VFP instruction has been seen which overwrites any of regs[*].
6645 We must make a veneer! Reset state to 0 before examining next
6646 instruction.
906e58ca 6647
c7b8f16e
JB		 6648 2 -> 0
6649 If we fail to match anything in state 2, reset to state 0 and reset
6650 the instruction pointer to the instruction after 'first_fmac'.
6651
6652 If the VFP11 vector mode is in use, there must be at least two unrelated
6653 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6654 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6655
6656 /* If we are only performing a partial link do not bother
6657 to construct any glue. */
6658 if (link_info->relocatable)
6659 return TRUE;
6660
0ffa91dd
NC		 6661 /* Skip if this bfd does not correspond to an ELF image. */
6662 if (! is_arm_elf (abfd))
6663 return TRUE;
906e58ca 6664
c7b8f16e
JB		 6665 /* We should have chosen a fix type by the time we get here. */
6666 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6667
6668 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6669 return TRUE;
2e6030b9 6670
33a7ffc2
JM		 6671 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6672 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6673 return TRUE;
6674
c7b8f16e
JB		 6675 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6676 {
6677 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6678 struct _arm_elf_section_data *sec_data;
6679
6680 /* If we don't have executable progbits, we're not interested in this
6681 section. Also skip if section is to be excluded. */
6682 if (elf_section_type (sec) != SHT_PROGBITS
6683 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6684 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6685 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6686 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6687 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6688 continue;
6689
6690 sec_data = elf32_arm_section_data (sec);
906e58ca 6691
c7b8f16e
JB		 6692 if (sec_data->mapcount == 0)
6693 continue;
906e58ca 6694
c7b8f16e
JB		 6695 if (elf_section_data (sec)->this_hdr.contents != NULL)
6696 contents = elf_section_data (sec)->this_hdr.contents;
6697 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6698 goto error_return;
6699
6700 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6701 elf32_arm_compare_mapping);
6702
6703 for (span = 0; span < sec_data->mapcount; span++)
6704 {
6705 unsigned int span_start = sec_data->map[span].vma;
6706 unsigned int span_end = (span == sec_data->mapcount - 1)
6707 ? sec->size : sec_data->map[span + 1].vma;
6708 char span_type = sec_data->map[span].type;
906e58ca 6709
c7b8f16e
JB		 6710 /* FIXME: Only ARM mode is supported at present. We may need to
6711 support Thumb-2 mode also at some point. */
6712 if (span_type != 'a')
6713 continue;
6714
6715 for (i = span_start; i < span_end;)
6716 {
6717 unsigned int next_i = i + 4;
6718 unsigned int insn = bfd_big_endian (abfd)
6719 ? (contents[i] << 24)
6720 | (contents[i + 1] << 16)
6721 | (contents[i + 2] << 8)
6722 | contents[i + 3]
6723 : (contents[i + 3] << 24)
6724 | (contents[i + 2] << 16)
6725 | (contents[i + 1] << 8)
6726 | contents[i];
6727 unsigned int writemask = 0;
91d6fa6a 6728 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6729
6730 switch (state)
6731 {
6732 case 0:
91d6fa6a 6733 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6734 &numregs);
6735 /* I'm assuming the VFP11 erratum can trigger with denorm
6736 operands on either the FMAC or the DS pipeline. This might
6737 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6738 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6739 {
6740 state = use_vector ? 1 : 2;
6741 first_fmac = i;
6742 veneer_of_insn = insn;
6743 }
6744 break;
6745
6746 case 1:
6747 {
6748 int other_regs[3], other_numregs;
91d6fa6a 6749 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6750 other_regs,
6751 &other_numregs);
91d6fa6a 6752 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6753 && bfd_arm_vfp11_antidependency (writemask, regs,
6754 numregs))
6755 state = 3;
6756 else
6757 state = 2;
6758 }
6759 break;
6760
6761 case 2:
6762 {
6763 int other_regs[3], other_numregs;
91d6fa6a 6764 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6765 other_regs,
6766 &other_numregs);
91d6fa6a 6767 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6768 && bfd_arm_vfp11_antidependency (writemask, regs,
6769 numregs))
6770 state = 3;
6771 else
6772 {
6773 state = 0;
6774 next_i = first_fmac + 4;
6775 }
6776 }
6777 break;
6778
6779 case 3:
6780 abort (); /* Should be unreachable. */
6781 }
6782
6783 if (state == 3)
6784 {
21d799b5
NC		 6785 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6786 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6787
c7e2358a 6788 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6789
6790 newerr->u.b.vfp_insn = veneer_of_insn;
6791
6792 switch (span_type)
6793 {
6794 case 'a':
6795 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6796 break;
906e58ca 6797
c7b8f16e
JB		 6798 default:
6799 abort ();
6800 }
6801
6802 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6803 first_fmac);
6804
6805 newerr->vma = -1;
6806
6807 newerr->next = sec_data->erratumlist;
6808 sec_data->erratumlist = newerr;
6809
6810 state = 0;
6811 }
6812
6813 i = next_i;
6814 }
6815 }
906e58ca 6816
c7b8f16e
JB		 6817 if (contents != NULL
6818 && elf_section_data (sec)->this_hdr.contents != contents)
6819 free (contents);
6820 contents = NULL;
6821 }
6822
6823 return TRUE;
6824
6825error_return:
6826 if (contents != NULL
6827 && elf_section_data (sec)->this_hdr.contents != contents)
6828 free (contents);
906e58ca 6829
c7b8f16e
JB		 6830 return FALSE;
6831}
6832
6833/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6834 after sections have been laid out, using specially-named symbols. */
6835
6836void
6837bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6838 struct bfd_link_info *link_info)
6839{
6840 asection *sec;
6841 struct elf32_arm_link_hash_table *globals;
6842 char *tmp_name;
906e58ca 6843
c7b8f16e
JB		 6844 if (link_info->relocatable)
6845 return;
2e6030b9
MS		 6846
6847 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6848 if (! is_arm_elf (abfd))
2e6030b9
MS		 6849 return;
6850
c7b8f16e 6851 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6852 if (globals == NULL)
6853 return;
906e58ca 6854
21d799b5
NC		 6855 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6856 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6857
6858 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6859 {
6860 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6861 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6862
c7b8f16e
JB		 6863 for (; errnode != NULL; errnode = errnode->next)
6864 {
6865 struct elf_link_hash_entry *myh;
6866 bfd_vma vma;
6867
6868 switch (errnode->type)
6869 {
6870 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6871 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6872 /* Find veneer symbol. */
6873 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6874 errnode->u.b.veneer->u.v.id);
6875
6876 myh = elf_link_hash_lookup
6877 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6878
6879 if (myh == NULL)
6880 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6881 "`%s'"), abfd, tmp_name);
6882
6883 vma = myh->root.u.def.section->output_section->vma
6884 + myh->root.u.def.section->output_offset
6885 + myh->root.u.def.value;
6886
6887 errnode->u.b.veneer->vma = vma;
6888 break;
6889
6890 case VFP11_ERRATUM_ARM_VENEER:
6891 case VFP11_ERRATUM_THUMB_VENEER:
6892 /* Find return location. */
6893 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6894 errnode->u.v.id);
6895
6896 myh = elf_link_hash_lookup
6897 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6898
6899 if (myh == NULL)
6900 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6901 "`%s'"), abfd, tmp_name);
6902
6903 vma = myh->root.u.def.section->output_section->vma
6904 + myh->root.u.def.section->output_offset
6905 + myh->root.u.def.value;
6906
6907 errnode->u.v.branch->vma = vma;
6908 break;
906e58ca 6909
c7b8f16e
JB		 6910 default:
6911 abort ();
6912 }
6913 }
6914 }
906e58ca 6915
c7b8f16e
JB		 6916 free (tmp_name);
6917}
6918
6919
eb043451
PB		 6920/* Set target relocation values needed during linking. */
6921
6922void
bf21ed78
MS		 6923bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6924 struct bfd_link_info *link_info,
eb043451 6925 int target1_is_rel,
319850b4 6926 char * target2_type,
33bfe774 6927 int fix_v4bx,
c7b8f16e 6928 int use_blx,
bf21ed78 6929 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6930 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6931 int pic_veneer, int fix_cortex_a8,
6932 int fix_arm1176)
eb043451
PB		 6933{
6934 struct elf32_arm_link_hash_table *globals;
6935
6936 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6937 if (globals == NULL)
6938 return;
eb043451
PB		 6939
6940 globals->target1_is_rel = target1_is_rel;
6941 if (strcmp (target2_type, "rel") == 0)
6942 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6943 else if (strcmp (target2_type, "abs") == 0)
6944 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6945 else if (strcmp (target2_type, "got-rel") == 0)
6946 globals->target2_reloc = R_ARM_GOT_PREL;
6947 else
6948 {
6949 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6950 target2_type);
6951 }
319850b4 6952 globals->fix_v4bx = fix_v4bx;
33bfe774 6953 globals->use_blx |= use_blx;
c7b8f16e 6954 globals->vfp11_fix = vfp11_fix;
27e55c4d 6955 globals->pic_veneer = pic_veneer;
48229727 6956 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6957 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6958
0ffa91dd
NC		 6959 BFD_ASSERT (is_arm_elf (output_bfd));
6960 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6961 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6962}
eb043451 6963
12a0a0fd 6964/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6965
12a0a0fd
PB		 6966static void
6967insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6968{
6969 bfd_vma upper;
6970 bfd_vma lower;
6971 int reloc_sign;
6972
6973 BFD_ASSERT ((offset & 1) == 0);
6974
6975 upper = bfd_get_16 (abfd, insn);
6976 lower = bfd_get_16 (abfd, insn + 2);
6977 reloc_sign = (offset < 0) ? 1 : 0;
6978 upper = (upper & ~(bfd_vma) 0x7ff)
6979 | ((offset >> 12) & 0x3ff)
6980 | (reloc_sign << 10);
906e58ca 6981 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6982 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6983 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6984 | ((offset >> 1) & 0x7ff);
6985 bfd_put_16 (abfd, upper, insn);
6986 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6987}
6988
9b485d32
NC		 6989/* Thumb code calling an ARM function. */
6990
252b5132 6991static int
57e8b36a
NC		 6992elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6993 const char * name,
6994 bfd * input_bfd,
6995 bfd * output_bfd,
6996 asection * input_section,
6997 bfd_byte * hit_data,
6998 asection * sym_sec,
6999 bfd_vma offset,
7000 bfd_signed_vma addend,
f2a9dd69
DJ		 7001 bfd_vma val,
7002 char **error_message)
252b5132 7003{
bcbdc74c 7004 asection * s = 0;
dc810e39 7005 bfd_vma my_offset;
252b5132 7006 long int ret_offset;
bcbdc74c
NC		 7007 struct elf_link_hash_entry * myh;
7008 struct elf32_arm_link_hash_table * globals;
252b5132 7009
f2a9dd69 7010 myh = find_thumb_glue (info, name, error_message);
252b5132 7011 if (myh == NULL)
b34976b6 7012 return FALSE;
252b5132
RH		 7013
7014 globals = elf32_arm_hash_table (info);
252b5132
RH		 7015 BFD_ASSERT (globals != NULL);
7016 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7017
7018 my_offset = myh->root.u.def.value;
7019
7020 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7021 THUMB2ARM_GLUE_SECTION_NAME);
7022
7023 BFD_ASSERT (s != NULL);
7024 BFD_ASSERT (s->contents != NULL);
7025 BFD_ASSERT (s->output_section != NULL);
7026
7027 if ((my_offset & 0x01) == 0x01)
7028 {
7029 if (sym_sec != NULL
7030 && sym_sec->owner != NULL
7031 && !INTERWORK_FLAG (sym_sec->owner))
7032 {
8f615d07 7033 (*_bfd_error_handler)
d003868e 7034 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7035 " first occurrence: %B: Thumb call to ARM"),
d003868e 7036 sym_sec->owner, input_bfd, name);
252b5132 7037
b34976b6 7038 return FALSE;
252b5132
RH		 7039 }
7040
7041 --my_offset;
7042 myh->root.u.def.value = my_offset;
7043
52ab56c2
PB		 7044 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7045 s->contents + my_offset);
252b5132 7046
52ab56c2
PB		 7047 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7048 s->contents + my_offset + 2);
252b5132
RH		 7049
7050 ret_offset =
9b485d32
NC		 7051 /* Address of destination of the stub. */
7052 ((bfd_signed_vma) val)
252b5132 7053 - ((bfd_signed_vma)
57e8b36a
NC		 7054 /* Offset from the start of the current section
7055 to the start of the stubs. */
9b485d32
NC		 7056 (s->output_offset
7057 /* Offset of the start of this stub from the start of the stubs. */
7058 + my_offset
7059 /* Address of the start of the current section. */
7060 + s->output_section->vma)
7061 /* The branch instruction is 4 bytes into the stub. */
7062 + 4
7063 /* ARM branches work from the pc of the instruction + 8. */
7064 + 8);
252b5132 7065
52ab56c2
PB		 7066 put_arm_insn (globals, output_bfd,
7067 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7068 s->contents + my_offset + 4);
252b5132
RH		 7069 }
7070
7071 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7072
427bfd90
NC		 7073 /* Now go back and fix up the original BL insn to point to here. */
7074 ret_offset =
7075 /* Address of where the stub is located. */
7076 (s->output_section->vma + s->output_offset + my_offset)
7077 /* Address of where the BL is located. */
57e8b36a
NC		 7078 - (input_section->output_section->vma + input_section->output_offset
7079 + offset)
427bfd90
NC		 7080 /* Addend in the relocation. */
7081 - addend
7082 /* Biassing for PC-relative addressing. */
7083 - 8;
252b5132 7084
12a0a0fd 7085 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7086
b34976b6 7087 return TRUE;
252b5132
RH		 7088}
7089
a4fd1a8e 7090/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7091
a4fd1a8e
PB		 7092static struct elf_link_hash_entry *
7093elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7094 const char * name,
7095 bfd * input_bfd,
7096 bfd * output_bfd,
7097 asection * sym_sec,
7098 bfd_vma val,
8029a119
NC		 7099 asection * s,
7100 char ** error_message)
252b5132 7101{
dc810e39 7102 bfd_vma my_offset;
252b5132 7103 long int ret_offset;
bcbdc74c
NC		 7104 struct elf_link_hash_entry * myh;
7105 struct elf32_arm_link_hash_table * globals;
252b5132 7106
f2a9dd69 7107 myh = find_arm_glue (info, name, error_message);
252b5132 7108 if (myh == NULL)
a4fd1a8e 7109 return NULL;
252b5132
RH		 7110
7111 globals = elf32_arm_hash_table (info);
252b5132
RH		 7112 BFD_ASSERT (globals != NULL);
7113 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7114
7115 my_offset = myh->root.u.def.value;
252b5132
RH		 7116
7117 if ((my_offset & 0x01) == 0x01)
7118 {
7119 if (sym_sec != NULL
7120 && sym_sec->owner != NULL
7121 && !INTERWORK_FLAG (sym_sec->owner))
7122 {
8f615d07 7123 (*_bfd_error_handler)
d003868e
AM		 7124 (_("%B(%s): warning: interworking not enabled.\n"
7125 " first occurrence: %B: arm call to thumb"),
7126 sym_sec->owner, input_bfd, name);
252b5132 7127 }
9b485d32 7128
252b5132
RH		 7129 --my_offset;
7130 myh->root.u.def.value = my_offset;
7131
27e55c4d
PB		 7132 if (info->shared || globals->root.is_relocatable_executable
7133 || globals->pic_veneer)
8f6277f5
PB		 7134 {
7135 /* For relocatable objects we can't use absolute addresses,
7136 so construct the address from a relative offset. */
7137 /* TODO: If the offset is small it's probably worth
7138 constructing the address with adds. */
52ab56c2
PB		 7139 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7140 s->contents + my_offset);
7141 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7142 s->contents + my_offset + 4);
7143 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7144 s->contents + my_offset + 8);
8f6277f5
PB		 7145 /* Adjust the offset by 4 for the position of the add,
7146 and 8 for the pipeline offset. */
7147 ret_offset = (val - (s->output_offset
7148 + s->output_section->vma
7149 + my_offset + 12))
7150 | 1;
7151 bfd_put_32 (output_bfd, ret_offset,
7152 s->contents + my_offset + 12);
7153 }
26079076
PB		 7154 else if (globals->use_blx)
7155 {
7156 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7157 s->contents + my_offset);
7158
7159 /* It's a thumb address. Add the low order bit. */
7160 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7161 s->contents + my_offset + 4);
7162 }
8f6277f5
PB		 7163 else
7164 {
52ab56c2
PB		 7165 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7166 s->contents + my_offset);
252b5132 7167
52ab56c2
PB		 7168 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7169 s->contents + my_offset + 4);
252b5132 7170
8f6277f5
PB		 7171 /* It's a thumb address. Add the low order bit. */
7172 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7173 s->contents + my_offset + 8);
8029a119
NC		 7174
7175 my_offset += 12;
8f6277f5 7176 }
252b5132
RH		 7177 }
7178
7179 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7180
a4fd1a8e
PB		 7181 return myh;
7182}
7183
7184/* Arm code calling a Thumb function. */
7185
7186static int
7187elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7188 const char * name,
7189 bfd * input_bfd,
7190 bfd * output_bfd,
7191 asection * input_section,
7192 bfd_byte * hit_data,
7193 asection * sym_sec,
7194 bfd_vma offset,
7195 bfd_signed_vma addend,
f2a9dd69
DJ		 7196 bfd_vma val,
7197 char **error_message)
a4fd1a8e
PB		 7198{
7199 unsigned long int tmp;
7200 bfd_vma my_offset;
7201 asection * s;
7202 long int ret_offset;
7203 struct elf_link_hash_entry * myh;
7204 struct elf32_arm_link_hash_table * globals;
7205
7206 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7207 BFD_ASSERT (globals != NULL);
7208 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7209
7210 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7211 ARM2THUMB_GLUE_SECTION_NAME);
7212 BFD_ASSERT (s != NULL);
7213 BFD_ASSERT (s->contents != NULL);
7214 BFD_ASSERT (s->output_section != NULL);
7215
7216 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7217 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7218 if (!myh)
7219 return FALSE;
7220
7221 my_offset = myh->root.u.def.value;
252b5132
RH		 7222 tmp = bfd_get_32 (input_bfd, hit_data);
7223 tmp = tmp & 0xFF000000;
7224
9b485d32 7225 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7226 ret_offset = (s->output_offset
7227 + my_offset
7228 + s->output_section->vma
7229 - (input_section->output_offset
7230 + input_section->output_section->vma
7231 + offset + addend)
7232 - 8);
9a5aca8c 7233
252b5132
RH		 7234 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7235
dc810e39 7236 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7237
b34976b6 7238 return TRUE;
252b5132
RH		 7239}
7240
a4fd1a8e
PB		 7241/* Populate Arm stub for an exported Thumb function. */
7242
7243static bfd_boolean
7244elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7245{
7246 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7247 asection * s;
7248 struct elf_link_hash_entry * myh;
7249 struct elf32_arm_link_hash_entry *eh;
7250 struct elf32_arm_link_hash_table * globals;
7251 asection *sec;
7252 bfd_vma val;
f2a9dd69 7253 char *error_message;
a4fd1a8e 7254
906e58ca 7255 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7256 /* Allocate stubs for exported Thumb functions on v4t. */
7257 if (eh->export_glue == NULL)
7258 return TRUE;
7259
7260 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7261 BFD_ASSERT (globals != NULL);
7262 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7263
7264 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7265 ARM2THUMB_GLUE_SECTION_NAME);
7266 BFD_ASSERT (s != NULL);
7267 BFD_ASSERT (s->contents != NULL);
7268 BFD_ASSERT (s->output_section != NULL);
7269
7270 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7271
7272 BFD_ASSERT (sec->output_section != NULL);
7273
a4fd1a8e
PB		 7274 val = eh->export_glue->root.u.def.value + sec->output_offset
7275 + sec->output_section->vma;
8029a119 7276
a4fd1a8e
PB		 7277 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7278 h->root.u.def.section->owner,
f2a9dd69
DJ		 7279 globals->obfd, sec, val, s,
7280 &error_message);
a4fd1a8e
PB		 7281 BFD_ASSERT (myh);
7282 return TRUE;
7283}
7284
845b51d6
PB		 7285/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7286
7287static bfd_vma
7288elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7289{
7290 bfd_byte *p;
7291 bfd_vma glue_addr;
7292 asection *s;
7293 struct elf32_arm_link_hash_table *globals;
7294
7295 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7296 BFD_ASSERT (globals != NULL);
7297 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7298
7299 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7300 ARM_BX_GLUE_SECTION_NAME);
7301 BFD_ASSERT (s != NULL);
7302 BFD_ASSERT (s->contents != NULL);
7303 BFD_ASSERT (s->output_section != NULL);
7304
7305 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7306
7307 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7308
7309 if ((globals->bx_glue_offset[reg] & 1) == 0)
7310 {
7311 p = s->contents + glue_addr;
7312 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7313 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7314 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7315 globals->bx_glue_offset[reg] |= 1;
7316 }
7317
7318 return glue_addr + s->output_section->vma + s->output_offset;
7319}
7320
a4fd1a8e
PB		 7321/* Generate Arm stubs for exported Thumb symbols. */
7322static void
906e58ca 7323elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7324 struct bfd_link_info *link_info)
7325{
7326 struct elf32_arm_link_hash_table * globals;
7327
8029a119
NC		 7328 if (link_info == NULL)
7329 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7330 return;
7331
7332 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7333 if (globals == NULL)
7334 return;
7335
84c08195
PB		 7336 /* If blx is available then exported Thumb symbols are OK and there is
7337 nothing to do. */
a4fd1a8e
PB		 7338 if (globals->use_blx)
7339 return;
7340
7341 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7342 link_info);
7343}
7344
47beaa6a
RS		 7345/* Reserve space for COUNT dynamic relocations in relocation selection
7346 SRELOC. */
7347
7348static void
7349elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7350 bfd_size_type count)
7351{
7352 struct elf32_arm_link_hash_table *htab;
7353
7354 htab = elf32_arm_hash_table (info);
7355 BFD_ASSERT (htab->root.dynamic_sections_created);
7356 if (sreloc == NULL)
7357 abort ();
7358 sreloc->size += RELOC_SIZE (htab) * count;
7359}
7360
34e77a92
RS		 7361/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7362 dynamic, the relocations should go in SRELOC, otherwise they should
7363 go in the special .rel.iplt section. */
7364
7365static void
7366elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7367 bfd_size_type count)
7368{
7369 struct elf32_arm_link_hash_table *htab;
7370
7371 htab = elf32_arm_hash_table (info);
7372 if (!htab->root.dynamic_sections_created)
7373 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7374 else
7375 {
7376 BFD_ASSERT (sreloc != NULL);
7377 sreloc->size += RELOC_SIZE (htab) * count;
7378 }
7379}
7380
47beaa6a
RS		 7381/* Add relocation REL to the end of relocation section SRELOC. */
7382
7383static void
7384elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7385 asection *sreloc, Elf_Internal_Rela *rel)
7386{
7387 bfd_byte *loc;
7388 struct elf32_arm_link_hash_table *htab;
7389
7390 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7391 if (!htab->root.dynamic_sections_created
7392 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7393 sreloc = htab->root.irelplt;
47beaa6a
RS		 7394 if (sreloc == NULL)
7395 abort ();
7396 loc = sreloc->contents;
7397 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7398 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7399 abort ();
7400 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7401}
7402
34e77a92
RS		 7403/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7404 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7405 to .plt. */
7406
7407static void
7408elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7409 bfd_boolean is_iplt_entry,
7410 union gotplt_union *root_plt,
7411 struct arm_plt_info *arm_plt)
7412{
7413 struct elf32_arm_link_hash_table *htab;
7414 asection *splt;
7415 asection *sgotplt;
7416
7417 htab = elf32_arm_hash_table (info);
7418
7419 if (is_iplt_entry)
7420 {
7421 splt = htab->root.iplt;
7422 sgotplt = htab->root.igotplt;
7423
7424 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7425 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7426 }
7427 else
7428 {
7429 splt = htab->root.splt;
7430 sgotplt = htab->root.sgotplt;
7431
7432 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7433 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7434
7435 /* If this is the first .plt entry, make room for the special
7436 first entry. */
7437 if (splt->size == 0)
7438 splt->size += htab->plt_header_size;
7439 }
7440
7441 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7442 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7443 splt->size += PLT_THUMB_STUB_SIZE;
7444 root_plt->offset = splt->size;
7445 splt->size += htab->plt_entry_size;
7446
7447 if (!htab->symbian_p)
7448 {
7449 /* We also need to make an entry in the .got.plt section, which
7450 will be placed in the .got section by the linker script. */
7451 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7452 sgotplt->size += 4;
7453 }
7454}
7455
b38cadfb
NC		 7456static bfd_vma
7457arm_movw_immediate (bfd_vma value)
7458{
7459 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7460}
7461
7462static bfd_vma
7463arm_movt_immediate (bfd_vma value)
7464{
7465 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7466}
7467
34e77a92
RS		 7468/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7469 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7470 Otherwise, DYNINDX is the index of the symbol in the dynamic
7471 symbol table and SYM_VALUE is undefined.
7472
7473 ROOT_PLT points to the offset of the PLT entry from the start of its
7474 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7475 bookkeeping information. */
7476
7477static void
7478elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7479 union gotplt_union *root_plt,
7480 struct arm_plt_info *arm_plt,
7481 int dynindx, bfd_vma sym_value)
7482{
7483 struct elf32_arm_link_hash_table *htab;
7484 asection *sgot;
7485 asection *splt;
7486 asection *srel;
7487 bfd_byte *loc;
7488 bfd_vma plt_index;
7489 Elf_Internal_Rela rel;
7490 bfd_vma plt_header_size;
7491 bfd_vma got_header_size;
7492
7493 htab = elf32_arm_hash_table (info);
7494
7495 /* Pick the appropriate sections and sizes. */
7496 if (dynindx == -1)
7497 {
7498 splt = htab->root.iplt;
7499 sgot = htab->root.igotplt;
7500 srel = htab->root.irelplt;
7501
7502 /* There are no reserved entries in .igot.plt, and no special
7503 first entry in .iplt. */
7504 got_header_size = 0;
7505 plt_header_size = 0;
7506 }
7507 else
7508 {
7509 splt = htab->root.splt;
7510 sgot = htab->root.sgotplt;
7511 srel = htab->root.srelplt;
7512
7513 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7514 plt_header_size = htab->plt_header_size;
7515 }
7516 BFD_ASSERT (splt != NULL && srel != NULL);
7517
7518 /* Fill in the entry in the procedure linkage table. */
7519 if (htab->symbian_p)
7520 {
7521 BFD_ASSERT (dynindx >= 0);
7522 put_arm_insn (htab, output_bfd,
7523 elf32_arm_symbian_plt_entry[0],
7524 splt->contents + root_plt->offset);
7525 bfd_put_32 (output_bfd,
7526 elf32_arm_symbian_plt_entry[1],
7527 splt->contents + root_plt->offset + 4);
7528
7529 /* Fill in the entry in the .rel.plt section. */
7530 rel.r_offset = (splt->output_section->vma
7531 + splt->output_offset
7532 + root_plt->offset + 4);
7533 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7534
7535 /* Get the index in the procedure linkage table which
7536 corresponds to this symbol. This is the index of this symbol
7537 in all the symbols for which we are making plt entries. The
7538 first entry in the procedure linkage table is reserved. */
7539 plt_index = ((root_plt->offset - plt_header_size)
7540 / htab->plt_entry_size);
7541 }
7542 else
7543 {
7544 bfd_vma got_offset, got_address, plt_address;
7545 bfd_vma got_displacement, initial_got_entry;
7546 bfd_byte * ptr;
7547
7548 BFD_ASSERT (sgot != NULL);
7549
7550 /* Get the offset into the .(i)got.plt table of the entry that
7551 corresponds to this function. */
7552 got_offset = (arm_plt->got_offset & -2);
7553
7554 /* Get the index in the procedure linkage table which
7555 corresponds to this symbol. This is the index of this symbol
7556 in all the symbols for which we are making plt entries.
7557 After the reserved .got.plt entries, all symbols appear in
7558 the same order as in .plt. */
7559 plt_index = (got_offset - got_header_size) / 4;
7560
7561 /* Calculate the address of the GOT entry. */
7562 got_address = (sgot->output_section->vma
7563 + sgot->output_offset
7564 + got_offset);
7565
7566 /* ...and the address of the PLT entry. */
7567 plt_address = (splt->output_section->vma
7568 + splt->output_offset
7569 + root_plt->offset);
7570
7571 ptr = splt->contents + root_plt->offset;
7572 if (htab->vxworks_p && info->shared)
7573 {
7574 unsigned int i;
7575 bfd_vma val;
7576
7577 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7578 {
7579 val = elf32_arm_vxworks_shared_plt_entry[i];
7580 if (i == 2)
7581 val |= got_address - sgot->output_section->vma;
7582 if (i == 5)
7583 val |= plt_index * RELOC_SIZE (htab);
7584 if (i == 2 || i == 5)
7585 bfd_put_32 (output_bfd, val, ptr);
7586 else
7587 put_arm_insn (htab, output_bfd, val, ptr);
7588 }
7589 }
7590 else if (htab->vxworks_p)
7591 {
7592 unsigned int i;
7593 bfd_vma val;
7594
7595 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7596 {
7597 val = elf32_arm_vxworks_exec_plt_entry[i];
7598 if (i == 2)
7599 val |= got_address;
7600 if (i == 4)
7601 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7602 if (i == 5)
7603 val |= plt_index * RELOC_SIZE (htab);
7604 if (i == 2 || i == 5)
7605 bfd_put_32 (output_bfd, val, ptr);
7606 else
7607 put_arm_insn (htab, output_bfd, val, ptr);
7608 }
7609
7610 loc = (htab->srelplt2->contents
7611 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7612
7613 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7614 referencing the GOT for this PLT entry. */
7615 rel.r_offset = plt_address + 8;
7616 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7617 rel.r_addend = got_offset;
7618 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7619 loc += RELOC_SIZE (htab);
7620
7621 /* Create the R_ARM_ABS32 relocation referencing the
7622 beginning of the PLT for this GOT entry. */
7623 rel.r_offset = got_address;
7624 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7625 rel.r_addend = 0;
7626 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7627 }
b38cadfb
NC		 7628 else if (htab->nacl_p)
7629 {
7630 /* Calculate the displacement between the PLT slot and the
7631 common tail that's part of the special initial PLT slot. */
7632 bfd_vma tail_displacement
7633 = ((splt->output_section->vma + splt->output_offset
7634 + ARM_NACL_PLT_TAIL_OFFSET)
7635 - (plt_address + htab->plt_entry_size + 4));
7636 BFD_ASSERT ((tail_displacement & 3) == 0);
7637 tail_displacement >>= 2;
7638
7639 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7640 || (-tail_displacement & 0xff000000) == 0);
7641
7642 /* Calculate the displacement between the PLT slot and the entry
7643 in the GOT. The offset accounts for the value produced by
7644 adding to pc in the penultimate instruction of the PLT stub. */
7645 got_displacement = got_address - (plt_address + htab->plt_entry_size);
7646
7647 /* NaCl does not support interworking at all. */
7648 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7649
7650 put_arm_insn (htab, output_bfd,
7651 elf32_arm_nacl_plt_entry[0]
7652 | arm_movw_immediate (got_displacement),
7653 ptr + 0);
7654 put_arm_insn (htab, output_bfd,
7655 elf32_arm_nacl_plt_entry[1]
7656 | arm_movt_immediate (got_displacement),
7657 ptr + 4);
7658 put_arm_insn (htab, output_bfd,
7659 elf32_arm_nacl_plt_entry[2],
7660 ptr + 8);
7661 put_arm_insn (htab, output_bfd,
7662 elf32_arm_nacl_plt_entry[3]
7663 | (tail_displacement & 0x00ffffff),
7664 ptr + 12);
7665 }
34e77a92
RS		 7666 else
7667 {
7668 /* Calculate the displacement between the PLT slot and the
7669 entry in the GOT. The eight-byte offset accounts for the
7670 value produced by adding to pc in the first instruction
7671 of the PLT stub. */
7672 got_displacement = got_address - (plt_address + 8);
7673
7674 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7675
7676 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7677 {
7678 put_thumb_insn (htab, output_bfd,
7679 elf32_arm_plt_thumb_stub[0], ptr - 4);
7680 put_thumb_insn (htab, output_bfd,
7681 elf32_arm_plt_thumb_stub[1], ptr - 2);
7682 }
7683
7684 put_arm_insn (htab, output_bfd,
7685 elf32_arm_plt_entry[0]
7686 | ((got_displacement & 0x0ff00000) >> 20),
7687 ptr + 0);
7688 put_arm_insn (htab, output_bfd,
7689 elf32_arm_plt_entry[1]
7690 | ((got_displacement & 0x000ff000) >> 12),
7691 ptr+ 4);
7692 put_arm_insn (htab, output_bfd,
7693 elf32_arm_plt_entry[2]
7694 | (got_displacement & 0x00000fff),
7695 ptr + 8);
7696#ifdef FOUR_WORD_PLT
7697 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7698#endif
7699 }
7700
7701 /* Fill in the entry in the .rel(a).(i)plt section. */
7702 rel.r_offset = got_address;
7703 rel.r_addend = 0;
7704 if (dynindx == -1)
7705 {
7706 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7707 The dynamic linker or static executable then calls SYM_VALUE
7708 to determine the correct run-time value of the .igot.plt entry. */
7709 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7710 initial_got_entry = sym_value;
7711 }
7712 else
7713 {
7714 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7715 initial_got_entry = (splt->output_section->vma
7716 + splt->output_offset);
7717 }
7718
7719 /* Fill in the entry in the global offset table. */
7720 bfd_put_32 (output_bfd, initial_got_entry,
7721 sgot->contents + got_offset);
7722 }
7723
7724 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7725 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7726}
7727
eb043451
PB		 7728/* Some relocations map to different relocations depending on the
7729 target. Return the real relocation. */
8029a119 7730
eb043451
PB		 7731static int
7732arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7733 int r_type)
7734{
7735 switch (r_type)
7736 {
7737 case R_ARM_TARGET1:
7738 if (globals->target1_is_rel)
7739 return R_ARM_REL32;
7740 else
7741 return R_ARM_ABS32;
7742
7743 case R_ARM_TARGET2:
7744 return globals->target2_reloc;
7745
7746 default:
7747 return r_type;
7748 }
7749}
eb043451 7750
ba93b8ac
DJ		 7751/* Return the base VMA address which should be subtracted from real addresses
7752 when resolving @dtpoff relocation.
7753 This is PT_TLS segment p_vaddr. */
7754
7755static bfd_vma
7756dtpoff_base (struct bfd_link_info *info)
7757{
7758 /* If tls_sec is NULL, we should have signalled an error already. */
7759 if (elf_hash_table (info)->tls_sec == NULL)
7760 return 0;
7761 return elf_hash_table (info)->tls_sec->vma;
7762}
7763
7764/* Return the relocation value for @tpoff relocation
7765 if STT_TLS virtual address is ADDRESS. */
7766
7767static bfd_vma
7768tpoff (struct bfd_link_info *info, bfd_vma address)
7769{
7770 struct elf_link_hash_table *htab = elf_hash_table (info);
7771 bfd_vma base;
7772
7773 /* If tls_sec is NULL, we should have signalled an error already. */
7774 if (htab->tls_sec == NULL)
7775 return 0;
7776 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7777 return address - htab->tls_sec->vma + base;
7778}
7779
00a97672
RS		 7780/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7781 VALUE is the relocation value. */
7782
7783static bfd_reloc_status_type
7784elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7785{
7786 if (value > 0xfff)
7787 return bfd_reloc_overflow;
7788
7789 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7790 bfd_put_32 (abfd, value, data);
7791 return bfd_reloc_ok;
7792}
7793
0855e32b
NS		 7794/* Handle TLS relaxations. Relaxing is possible for symbols that use
7795 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7796 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7797
7798 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7799 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7800 case of error.
7801
7802 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7803 the pre-relaxed code. It would be nice if the relocs were updated
7804 to match the optimization. */
0855e32b 7805
b38cadfb 7806static bfd_reloc_status_type
0855e32b 7807elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7808 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7809 Elf_Internal_Rela *rel, unsigned long is_local)
7810{
7811 unsigned long insn;
b38cadfb 7812
0855e32b
NS		 7813 switch (ELF32_R_TYPE (rel->r_info))
7814 {
7815 default:
7816 return bfd_reloc_notsupported;
b38cadfb 7817
0855e32b
NS		 7818 case R_ARM_TLS_GOTDESC:
7819 if (is_local)
7820 insn = 0;
7821 else
7822 {
7823 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7824 if (insn & 1)
7825 insn -= 5; /* THUMB */
7826 else
7827 insn -= 8; /* ARM */
7828 }
7829 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7830 return bfd_reloc_continue;
7831
7832 case R_ARM_THM_TLS_DESCSEQ:
7833 /* Thumb insn. */
7834 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7835 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7836 {
7837 if (is_local)
7838 /* nop */
7839 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7840 }
7841 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7842 {
7843 if (is_local)
7844 /* nop */
7845 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7846 else
7847 /* ldr rx,[ry] */
7848 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7849 }
7850 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7851 {
7852 if (is_local)
7853 /* nop */
7854 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7855 else
7856 /* mov r0, rx */
7857 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7858 contents + rel->r_offset);
7859 }
7860 else
7861 {
7862 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7863 /* It's a 32 bit instruction, fetch the rest of it for
7864 error generation. */
7865 insn = (insn << 16)
7866 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7867 (*_bfd_error_handler)
7868 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7869 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7870 return bfd_reloc_notsupported;
7871 }
7872 break;
b38cadfb 7873
0855e32b
NS		 7874 case R_ARM_TLS_DESCSEQ:
7875 /* arm insn. */
7876 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7877 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7878 {
7879 if (is_local)
7880 /* mov rx, ry */
7881 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7882 contents + rel->r_offset);
7883 }
7884 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7885 {
7886 if (is_local)
7887 /* nop */
7888 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7889 else
7890 /* ldr rx,[ry] */
7891 bfd_put_32 (input_bfd, insn & 0xfffff000,
7892 contents + rel->r_offset);
7893 }
7894 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7895 {
7896 if (is_local)
7897 /* nop */
7898 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7899 else
7900 /* mov r0, rx */
7901 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7902 contents + rel->r_offset);
7903 }
7904 else
7905 {
7906 (*_bfd_error_handler)
7907 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7908 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7909 return bfd_reloc_notsupported;
7910 }
7911 break;
7912
7913 case R_ARM_TLS_CALL:
7914 /* GD->IE relaxation, turn the instruction into 'nop' or
7915 'ldr r0, [pc,r0]' */
7916 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7917 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7918 break;
b38cadfb 7919
0855e32b
NS		 7920 case R_ARM_THM_TLS_CALL:
7921 /* GD->IE relaxation */
7922 if (!is_local)
7923 /* add r0,pc; ldr r0, [r0] */
7924 insn = 0x44786800;
7925 else if (arch_has_thumb2_nop (globals))
7926 /* nop.w */
7927 insn = 0xf3af8000;
7928 else
7929 /* nop; nop */
7930 insn = 0xbf00bf00;
b38cadfb 7931
0855e32b
NS		 7932 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7933 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7934 break;
7935 }
7936 return bfd_reloc_ok;
7937}
7938
4962c51a
MS		 7939/* For a given value of n, calculate the value of G_n as required to
7940 deal with group relocations. We return it in the form of an
7941 encoded constant-and-rotation, together with the final residual. If n is
7942 specified as less than zero, then final_residual is filled with the
7943 input value and no further action is performed. */
7944
7945static bfd_vma
7946calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7947{
7948 int current_n;
7949 bfd_vma g_n;
7950 bfd_vma encoded_g_n = 0;
7951 bfd_vma residual = value; /* Also known as Y_n. */
7952
7953 for (current_n = 0; current_n <= n; current_n++)
7954 {
7955 int shift;
7956
7957 /* Calculate which part of the value to mask. */
7958 if (residual == 0)
7959 shift = 0;
7960 else
7961 {
7962 int msb;
7963
7964 /* Determine the most significant bit in the residual and
7965 align the resulting value to a 2-bit boundary. */
7966 for (msb = 30; msb >= 0; msb -= 2)
7967 if (residual & (3 << msb))
7968 break;
7969
7970 /* The desired shift is now (msb - 6), or zero, whichever
7971 is the greater. */
7972 shift = msb - 6;
7973 if (shift < 0)
7974 shift = 0;
7975 }
7976
7977 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7978 g_n = residual & (0xff << shift);
7979 encoded_g_n = (g_n >> shift)
7980 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7981
7982 /* Calculate the residual for the next time around. */
7983 residual &= ~g_n;
7984 }
7985
7986 *final_residual = residual;
7987
7988 return encoded_g_n;
7989}
7990
7991/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7992 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7993
4962c51a 7994static int
906e58ca 7995identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7996{
7997 int opcode = insn & 0x1e00000;
7998
7999 if (opcode == 1 << 23) /* ADD */
8000 return 1;
8001
8002 if (opcode == 1 << 22) /* SUB */
8003 return -1;
8004
8005 return 0;
8006}
8007
252b5132 8008/* Perform a relocation as part of a final link. */
9b485d32 8009
252b5132 8010static bfd_reloc_status_type
57e8b36a
NC		 8011elf32_arm_final_link_relocate (reloc_howto_type * howto,
8012 bfd * input_bfd,
8013 bfd * output_bfd,
8014 asection * input_section,
8015 bfd_byte * contents,
8016 Elf_Internal_Rela * rel,
8017 bfd_vma value,
8018 struct bfd_link_info * info,
8019 asection * sym_sec,
8020 const char * sym_name,
34e77a92
RS		 8021 unsigned char st_type,
8022 enum arm_st_branch_type branch_type,
0945cdfd 8023 struct elf_link_hash_entry * h,
f2a9dd69 8024 bfd_boolean * unresolved_reloc_p,
8029a119 8025 char ** error_message)
252b5132
RH		 8026{
8027 unsigned long r_type = howto->type;
8028 unsigned long r_symndx;
8029 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8030 bfd_vma * local_got_offsets;
0855e32b 8031 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8032 asection * sgot;
8033 asection * splt;
252b5132 8034 asection * sreloc = NULL;
362d30a1 8035 asection * srelgot;
252b5132 8036 bfd_vma addend;
ba96a88f 8037 bfd_signed_vma signed_addend;
34e77a92
RS		 8038 unsigned char dynreloc_st_type;
8039 bfd_vma dynreloc_value;
ba96a88f 8040 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8041 struct elf32_arm_link_hash_entry *eh;
8042 union gotplt_union *root_plt;
8043 struct arm_plt_info *arm_plt;
8044 bfd_vma plt_offset;
8045 bfd_vma gotplt_offset;
8046 bfd_boolean has_iplt_entry;
f21f3fe0 8047
9c504268 8048 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8049 if (globals == NULL)
8050 return bfd_reloc_notsupported;
9c504268 8051
0ffa91dd
NC		 8052 BFD_ASSERT (is_arm_elf (input_bfd));
8053
8054 /* Some relocation types map to different relocations depending on the
9c504268 8055 target. We pick the right one here. */
eb043451 8056 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8057
8058 /* It is possible to have linker relaxations on some TLS access
8059 models. Update our information here. */
8060 r_type = elf32_arm_tls_transition (info, r_type, h);
8061
eb043451
PB		 8062 if (r_type != howto->type)
8063 howto = elf32_arm_howto_from_type (r_type);
9c504268 8064
cac15327
NC		 8065 /* If the start address has been set, then set the EF_ARM_HASENTRY
8066 flag. Setting this more than once is redundant, but the cost is
8067 not too high, and it keeps the code simple.
99e4ae17 8068
cac15327
NC		 8069 The test is done here, rather than somewhere else, because the
8070 start address is only set just before the final link commences.
8071
8072 Note - if the user deliberately sets a start address of 0, the
8073 flag will not be set. */
8074 if (bfd_get_start_address (output_bfd) != 0)
8075 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8076
34e77a92 8077 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8078 sgot = globals->root.sgot;
252b5132 8079 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8080 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8081
34e77a92
RS		 8082 if (globals->root.dynamic_sections_created)
8083 srelgot = globals->root.srelgot;
8084 else
8085 srelgot = NULL;
8086
252b5132
RH		 8087 r_symndx = ELF32_R_SYM (rel->r_info);
8088
4e7fd91e 8089 if (globals->use_rel)
ba96a88f 8090 {
4e7fd91e
PB		 8091 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8092
8093 if (addend & ((howto->src_mask + 1) >> 1))
8094 {
8095 signed_addend = -1;
8096 signed_addend &= ~ howto->src_mask;
8097 signed_addend |= addend;
8098 }
8099 else
8100 signed_addend = addend;
ba96a88f
NC		 8101 }
8102 else
4e7fd91e 8103 addend = signed_addend = rel->r_addend;
f21f3fe0 8104
34e77a92
RS		 8105 /* Record the symbol information that should be used in dynamic
8106 relocations. */
8107 dynreloc_st_type = st_type;
8108 dynreloc_value = value;
8109 if (branch_type == ST_BRANCH_TO_THUMB)
8110 dynreloc_value |= 1;
8111
8112 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8113 VALUE appropriately for relocations that we resolve at link time. */
8114 has_iplt_entry = FALSE;
8115 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8116 && root_plt->offset != (bfd_vma) -1)
8117 {
8118 plt_offset = root_plt->offset;
8119 gotplt_offset = arm_plt->got_offset;
8120
8121 if (h == NULL || eh->is_iplt)
8122 {
8123 has_iplt_entry = TRUE;
8124 splt = globals->root.iplt;
8125
8126 /* Populate .iplt entries here, because not all of them will
8127 be seen by finish_dynamic_symbol. The lower bit is set if
8128 we have already populated the entry. */
8129 if (plt_offset & 1)
8130 plt_offset--;
8131 else
8132 {
8133 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8134 -1, dynreloc_value);
8135 root_plt->offset |= 1;
8136 }
8137
8138 /* Static relocations always resolve to the .iplt entry. */
8139 st_type = STT_FUNC;
8140 value = (splt->output_section->vma
8141 + splt->output_offset
8142 + plt_offset);
8143 branch_type = ST_BRANCH_TO_ARM;
8144
8145 /* If there are non-call relocations that resolve to the .iplt
8146 entry, then all dynamic ones must too. */
8147 if (arm_plt->noncall_refcount != 0)
8148 {
8149 dynreloc_st_type = st_type;
8150 dynreloc_value = value;
8151 }
8152 }
8153 else
8154 /* We populate the .plt entry in finish_dynamic_symbol. */
8155 splt = globals->root.splt;
8156 }
8157 else
8158 {
8159 splt = NULL;
8160 plt_offset = (bfd_vma) -1;
8161 gotplt_offset = (bfd_vma) -1;
8162 }
8163
252b5132
RH		 8164 switch (r_type)
8165 {
8166 case R_ARM_NONE:
28a094c2
DJ		 8167 /* We don't need to find a value for this symbol. It's just a
8168 marker. */
8169 *unresolved_reloc_p = FALSE;
252b5132
RH		 8170 return bfd_reloc_ok;
8171
00a97672
RS		 8172 case R_ARM_ABS12:
8173 if (!globals->vxworks_p)
8174 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8175
252b5132
RH		 8176 case R_ARM_PC24:
8177 case R_ARM_ABS32:
bb224fc3 8178 case R_ARM_ABS32_NOI:
252b5132 8179 case R_ARM_REL32:
bb224fc3 8180 case R_ARM_REL32_NOI:
5b5bb741
PB		 8181 case R_ARM_CALL:
8182 case R_ARM_JUMP24:
dfc5f959 8183 case R_ARM_XPC25:
eb043451 8184 case R_ARM_PREL31:
7359ea65 8185 case R_ARM_PLT32:
7359ea65
DJ		 8186 /* Handle relocations which should use the PLT entry. ABS32/REL32
8187 will use the symbol's value, which may point to a PLT entry, but we
8188 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8189 branches in this object should go to it, except if the PLT is too
8190 far away, in which case a long branch stub should be inserted. */
bb224fc3 8191 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 8192 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8193 && r_type != R_ARM_CALL
8194 && r_type != R_ARM_JUMP24
8195 && r_type != R_ARM_PLT32)
34e77a92 8196 && plt_offset != (bfd_vma) -1)
7359ea65 8197 {
34e77a92
RS		 8198 /* If we've created a .plt section, and assigned a PLT entry
8199 to this function, it must either be a STT_GNU_IFUNC reference
8200 or not be known to bind locally. In other cases, we should
8201 have cleared the PLT entry by now. */
8202 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8203
8204 value = (splt->output_section->vma
8205 + splt->output_offset
34e77a92 8206 + plt_offset);
0945cdfd 8207 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8208 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8209 contents, rel->r_offset, value,
00a97672 8210 rel->r_addend);
7359ea65
DJ		 8211 }
8212
67687978
PB		 8213 /* When generating a shared object or relocatable executable, these
8214 relocations are copied into the output file to be resolved at
8215 run time. */
8216 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8217 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8218 && !(globals->vxworks_p
3348747a
NS		 8219 && strcmp (input_section->output_section->name,
8220 ".tls_vars") == 0)
bb224fc3 8221 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8222 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 8223 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8224 && (h == NULL
8225 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8226 || h->root.type != bfd_link_hash_undefweak)
8227 && r_type != R_ARM_PC24
5b5bb741
PB		 8228 && r_type != R_ARM_CALL
8229 && r_type != R_ARM_JUMP24
ee06dc07 8230 && r_type != R_ARM_PREL31
7359ea65 8231 && r_type != R_ARM_PLT32)
252b5132 8232 {
947216bf 8233 Elf_Internal_Rela outrel;
b34976b6 8234 bfd_boolean skip, relocate;
f21f3fe0 8235
0945cdfd
DJ		 8236 *unresolved_reloc_p = FALSE;
8237
34e77a92 8238 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8239 {
83bac4b0
NC		 8240 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8241 ! globals->use_rel);
f21f3fe0 8242
83bac4b0 8243 if (sreloc == NULL)
252b5132 8244 return bfd_reloc_notsupported;
252b5132 8245 }
f21f3fe0 8246
b34976b6
AM		 8247 skip = FALSE;
8248 relocate = FALSE;
f21f3fe0 8249
00a97672 8250 outrel.r_addend = addend;
c629eae0
JJ		 8251 outrel.r_offset =
8252 _bfd_elf_section_offset (output_bfd, info, input_section,
8253 rel->r_offset);
8254 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8255 skip = TRUE;
0bb2d96a 8256 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8257 skip = TRUE, relocate = TRUE;
252b5132
RH		 8258 outrel.r_offset += (input_section->output_section->vma
8259 + input_section->output_offset);
f21f3fe0 8260
252b5132 8261 if (skip)
0bb2d96a 8262 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8263 else if (h != NULL
8264 && h->dynindx != -1
7359ea65 8265 && (!info->shared
5e681ec4 8266 || !info->symbolic
f5385ebf 8267 || !h->def_regular))
5e681ec4 8268 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8269 else
8270 {
a16385dc
MM		 8271 int symbol;
8272
5e681ec4 8273 /* This symbol is local, or marked to become local. */
34e77a92 8274 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8275 if (globals->symbian_p)
6366ff1e 8276 {
74541ad4
AM		 8277 asection *osec;
8278
6366ff1e
MM		 8279 /* On Symbian OS, the data segment and text segement
8280 can be relocated independently. Therefore, we
8281 must indicate the segment to which this
8282 relocation is relative. The BPABI allows us to
8283 use any symbol in the right segment; we just use
8284 the section symbol as it is convenient. (We
8285 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8286 will not appear in the dynamic symbol table.)
8287
8288 Note that the dynamic linker ignores the section
8289 symbol value, so we don't subtract osec->vma
8290 from the emitted reloc addend. */
10dbd1f3 8291 if (sym_sec)
74541ad4 8292 osec = sym_sec->output_section;
10dbd1f3 8293 else
74541ad4
AM		 8294 osec = input_section->output_section;
8295 symbol = elf_section_data (osec)->dynindx;
8296 if (symbol == 0)
8297 {
8298 struct elf_link_hash_table *htab = elf_hash_table (info);
8299
8300 if ((osec->flags & SEC_READONLY) == 0
8301 && htab->data_index_section != NULL)
8302 osec = htab->data_index_section;
8303 else
8304 osec = htab->text_index_section;
8305 symbol = elf_section_data (osec)->dynindx;
8306 }
6366ff1e
MM		 8307 BFD_ASSERT (symbol != 0);
8308 }
a16385dc
MM		 8309 else
8310 /* On SVR4-ish systems, the dynamic loader cannot
8311 relocate the text and data segments independently,
8312 so the symbol does not matter. */
8313 symbol = 0;
34e77a92
RS		 8314 if (dynreloc_st_type == STT_GNU_IFUNC)
8315 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8316 to the .iplt entry. Instead, every non-call reference
8317 must use an R_ARM_IRELATIVE relocation to obtain the
8318 correct run-time address. */
8319 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8320 else
8321 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8322 if (globals->use_rel)
8323 relocate = TRUE;
8324 else
34e77a92 8325 outrel.r_addend += dynreloc_value;
252b5132 8326 }
f21f3fe0 8327
47beaa6a 8328 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8329
f21f3fe0 8330 /* If this reloc is against an external symbol, we do not want to
252b5132 8331 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8332 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8333 if (! relocate)
8334 return bfd_reloc_ok;
9a5aca8c 8335
f21f3fe0 8336 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8337 contents, rel->r_offset,
8338 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8339 }
8340 else switch (r_type)
8341 {
00a97672
RS		 8342 case R_ARM_ABS12:
8343 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8344
dfc5f959 8345 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8346 case R_ARM_CALL:
8347 case R_ARM_JUMP24:
8029a119 8348 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8349 case R_ARM_PLT32:
906e58ca 8350 {
906e58ca
NC		 8351 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8352
dfc5f959 8353 if (r_type == R_ARM_XPC25)
252b5132 8354 {
dfc5f959
NC		 8355 /* Check for Arm calling Arm function. */
8356 /* FIXME: Should we translate the instruction into a BL
8357 instruction instead ? */
35fc36a8 8358 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8359 (*_bfd_error_handler)
8360 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8361 input_bfd,
8362 h ? h->root.root.string : "(local)");
dfc5f959 8363 }
155d87d7 8364 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8365 {
8366 /* Check for Arm calling Thumb function. */
35fc36a8 8367 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8368 {
f2a9dd69
DJ		 8369 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8370 output_bfd, input_section,
8371 hit_data, sym_sec, rel->r_offset,
8372 signed_addend, value,
8373 error_message))
8374 return bfd_reloc_ok;
8375 else
8376 return bfd_reloc_dangerous;
dfc5f959 8377 }
252b5132 8378 }
ba96a88f 8379
906e58ca 8380 /* Check if a stub has to be inserted because the
8029a119 8381 destination is too far or we are changing mode. */
155d87d7
CL		 8382 if ( r_type == R_ARM_CALL
8383 || r_type == R_ARM_JUMP24
8384 || r_type == R_ARM_PLT32)
906e58ca 8385 {
fe33d2fa
CL		 8386 enum elf32_arm_stub_type stub_type = arm_stub_none;
8387 struct elf32_arm_link_hash_entry *hash;
8388
8389 hash = (struct elf32_arm_link_hash_entry *) h;
8390 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8391 st_type, &branch_type,
8392 hash, value, sym_sec,
fe33d2fa 8393 input_bfd, sym_name);
5fa9e92f 8394
fe33d2fa 8395 if (stub_type != arm_stub_none)
906e58ca
NC		 8396 {
8397 /* The target is out of reach, so redirect the
8398 branch to the local stub for this function. */
906e58ca
NC		 8399 stub_entry = elf32_arm_get_stub_entry (input_section,
8400 sym_sec, h,
fe33d2fa
CL		 8401 rel, globals,
8402 stub_type);
9cd3e4e5
NC		 8403 {
8404 if (stub_entry != NULL)
8405 value = (stub_entry->stub_offset
8406 + stub_entry->stub_sec->output_offset
8407 + stub_entry->stub_sec->output_section->vma);
8408
8409 if (plt_offset != (bfd_vma) -1)
8410 *unresolved_reloc_p = FALSE;
8411 }
906e58ca 8412 }
fe33d2fa
CL		 8413 else
8414 {
8415 /* If the call goes through a PLT entry, make sure to
8416 check distance to the right destination address. */
34e77a92 8417 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8418 {
8419 value = (splt->output_section->vma
8420 + splt->output_offset
34e77a92 8421 + plt_offset);
fe33d2fa
CL		 8422 *unresolved_reloc_p = FALSE;
8423 /* The PLT entry is in ARM mode, regardless of the
8424 target function. */
35fc36a8 8425 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8426 }
8427 }
906e58ca
NC		 8428 }
8429
dea514f5
PB		 8430 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8431 where:
8432 S is the address of the symbol in the relocation.
8433 P is address of the instruction being relocated.
8434 A is the addend (extracted from the instruction) in bytes.
8435
8436 S is held in 'value'.
8437 P is the base address of the section containing the
8438 instruction plus the offset of the reloc into that
8439 section, ie:
8440 (input_section->output_section->vma +
8441 input_section->output_offset +
8442 rel->r_offset).
8443 A is the addend, converted into bytes, ie:
8444 (signed_addend * 4)
8445
8446 Note: None of these operations have knowledge of the pipeline
8447 size of the processor, thus it is up to the assembler to
8448 encode this information into the addend. */
8449 value -= (input_section->output_section->vma
8450 + input_section->output_offset);
8451 value -= rel->r_offset;
4e7fd91e
PB		 8452 if (globals->use_rel)
8453 value += (signed_addend << howto->size);
8454 else
8455 /* RELA addends do not have to be adjusted by howto->size. */
8456 value += signed_addend;
23080146 8457
dcb5e6e6
NC		 8458 signed_addend = value;
8459 signed_addend >>= howto->rightshift;
9a5aca8c 8460
5ab79981 8461 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8462 the next instruction unless a PLT entry will be created.
77b4f08f 8463 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8464 The jump to the next instruction is optimized as a NOP depending
8465 on the architecture. */
ffcb4889 8466 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8467 && plt_offset == (bfd_vma) -1)
77b4f08f 8468 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8469 {
cd1dac3d
DG		 8470 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8471
8472 if (arch_has_arm_nop (globals))
8473 value |= 0x0320f000;
8474 else
8475 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8476 }
8477 else
59f2c4e7 8478 {
9b485d32 8479 /* Perform a signed range check. */
dcb5e6e6 8480 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8481 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8482 return bfd_reloc_overflow;
9a5aca8c 8483
5ab79981 8484 addend = (value & 2);
39b41c9c 8485
5ab79981
PB		 8486 value = (signed_addend & howto->dst_mask)
8487 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8488
5ab79981
PB		 8489 if (r_type == R_ARM_CALL)
8490 {
155d87d7 8491 /* Set the H bit in the BLX instruction. */
35fc36a8 8492 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8493 {
8494 if (addend)
8495 value |= (1 << 24);
8496 else
8497 value &= ~(bfd_vma)(1 << 24);
8498 }
8499
5ab79981 8500 /* Select the correct instruction (BL or BLX). */
906e58ca 8501 /* Only if we are not handling a BL to a stub. In this
8029a119 8502 case, mode switching is performed by the stub. */
35fc36a8 8503 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8504 value |= (1 << 28);
63e1a0fc 8505 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8506 {
8507 value &= ~(bfd_vma)(1 << 28);
8508 value |= (1 << 24);
8509 }
39b41c9c
PB		 8510 }
8511 }
906e58ca 8512 }
252b5132 8513 break;
f21f3fe0 8514
252b5132
RH		 8515 case R_ARM_ABS32:
8516 value += addend;
35fc36a8 8517 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8518 value |= 1;
8519 break;
f21f3fe0 8520
bb224fc3
MS		 8521 case R_ARM_ABS32_NOI:
8522 value += addend;
8523 break;
8524
252b5132 8525 case R_ARM_REL32:
a8bc6c78 8526 value += addend;
35fc36a8 8527 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8528 value |= 1;
252b5132 8529 value -= (input_section->output_section->vma
62efb346 8530 + input_section->output_offset + rel->r_offset);
252b5132 8531 break;
eb043451 8532
bb224fc3
MS		 8533 case R_ARM_REL32_NOI:
8534 value += addend;
8535 value -= (input_section->output_section->vma
8536 + input_section->output_offset + rel->r_offset);
8537 break;
8538
eb043451
PB		 8539 case R_ARM_PREL31:
8540 value -= (input_section->output_section->vma
8541 + input_section->output_offset + rel->r_offset);
8542 value += signed_addend;
8543 if (! h || h->root.type != bfd_link_hash_undefweak)
8544 {
8029a119 8545 /* Check for overflow. */
eb043451
PB		 8546 if ((value ^ (value >> 1)) & (1 << 30))
8547 return bfd_reloc_overflow;
8548 }
8549 value &= 0x7fffffff;
8550 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8551 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8552 value |= 1;
8553 break;
252b5132 8554 }
f21f3fe0 8555
252b5132
RH		 8556 bfd_put_32 (input_bfd, value, hit_data);
8557 return bfd_reloc_ok;
8558
8559 case R_ARM_ABS8:
8560 value += addend;
4e67d4ca
DG		 8561
8562 /* There is no way to tell whether the user intended to use a signed or
8563 unsigned addend. When checking for overflow we accept either,
8564 as specified by the AAELF. */
8565 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8566 return bfd_reloc_overflow;
8567
8568 bfd_put_8 (input_bfd, value, hit_data);
8569 return bfd_reloc_ok;
8570
8571 case R_ARM_ABS16:
8572 value += addend;
8573
4e67d4ca
DG		 8574 /* See comment for R_ARM_ABS8. */
8575 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8576 return bfd_reloc_overflow;
8577
8578 bfd_put_16 (input_bfd, value, hit_data);
8579 return bfd_reloc_ok;
8580
252b5132 8581 case R_ARM_THM_ABS5:
9b485d32 8582 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8583 if (globals->use_rel)
8584 {
8585 /* Need to refetch addend. */
8586 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8587 /* ??? Need to determine shift amount from operand size. */
8588 addend >>= howto->rightshift;
8589 }
252b5132
RH		 8590 value += addend;
8591
8592 /* ??? Isn't value unsigned? */
8593 if ((long) value > 0x1f || (long) value < -0x10)
8594 return bfd_reloc_overflow;
8595
8596 /* ??? Value needs to be properly shifted into place first. */
8597 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8598 bfd_put_16 (input_bfd, value, hit_data);
8599 return bfd_reloc_ok;
8600
2cab6cc3
MS		 8601 case R_ARM_THM_ALU_PREL_11_0:
8602 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8603 {
8604 bfd_vma insn;
8605 bfd_signed_vma relocation;
8606
8607 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8608 | bfd_get_16 (input_bfd, hit_data + 2);
8609
8610 if (globals->use_rel)
8611 {
8612 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8613 | ((insn & (1 << 26)) >> 15);
8614 if (insn & 0xf00000)
8615 signed_addend = -signed_addend;
8616 }
8617
8618 relocation = value + signed_addend;
8619 relocation -= (input_section->output_section->vma
8620 + input_section->output_offset
8621 + rel->r_offset);
8622
8623 value = abs (relocation);
8624
8625 if (value >= 0x1000)
8626 return bfd_reloc_overflow;
8627
8628 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8629 | ((value & 0x700) << 4)
8630 | ((value & 0x800) << 15);
8631 if (relocation < 0)
8632 insn |= 0xa00000;
8633
8634 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8635 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8636
8637 return bfd_reloc_ok;
8638 }
8639
e1ec24c6
NC		 8640 case R_ARM_THM_PC8:
8641 /* PR 10073: This reloc is not generated by the GNU toolchain,
8642 but it is supported for compatibility with third party libraries
8643 generated by other compilers, specifically the ARM/IAR. */
8644 {
8645 bfd_vma insn;
8646 bfd_signed_vma relocation;
8647
8648 insn = bfd_get_16 (input_bfd, hit_data);
8649
8650 if (globals->use_rel)
8651 addend = (insn & 0x00ff) << 2;
8652
8653 relocation = value + addend;
8654 relocation -= (input_section->output_section->vma
8655 + input_section->output_offset
8656 + rel->r_offset);
8657
8658 value = abs (relocation);
8659
8660 /* We do not check for overflow of this reloc. Although strictly
8661 speaking this is incorrect, it appears to be necessary in order
8662 to work with IAR generated relocs. Since GCC and GAS do not
8663 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8664 a problem for them. */
8665 value &= 0x3fc;
8666
8667 insn = (insn & 0xff00) | (value >> 2);
8668
8669 bfd_put_16 (input_bfd, insn, hit_data);
8670
8671 return bfd_reloc_ok;
8672 }
8673
2cab6cc3
MS		 8674 case R_ARM_THM_PC12:
8675 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8676 {
8677 bfd_vma insn;
8678 bfd_signed_vma relocation;
8679
8680 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8681 | bfd_get_16 (input_bfd, hit_data + 2);
8682
8683 if (globals->use_rel)
8684 {
8685 signed_addend = insn & 0xfff;
8686 if (!(insn & (1 << 23)))
8687 signed_addend = -signed_addend;
8688 }
8689
8690 relocation = value + signed_addend;
8691 relocation -= (input_section->output_section->vma
8692 + input_section->output_offset
8693 + rel->r_offset);
8694
8695 value = abs (relocation);
8696
8697 if (value >= 0x1000)
8698 return bfd_reloc_overflow;
8699
8700 insn = (insn & 0xff7ff000) | value;
8701 if (relocation >= 0)
8702 insn |= (1 << 23);
8703
8704 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8705 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8706
8707 return bfd_reloc_ok;
8708 }
8709
dfc5f959 8710 case R_ARM_THM_XPC22:
c19d1205 8711 case R_ARM_THM_CALL:
bd97cb95 8712 case R_ARM_THM_JUMP24:
dfc5f959 8713 /* Thumb BL (branch long instruction). */
252b5132 8714 {
b34976b6 8715 bfd_vma relocation;
e95de063 8716 bfd_vma reloc_sign;
b34976b6
AM		 8717 bfd_boolean overflow = FALSE;
8718 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8719 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8720 bfd_signed_vma reloc_signed_max;
8721 bfd_signed_vma reloc_signed_min;
b34976b6 8722 bfd_vma check;
252b5132 8723 bfd_signed_vma signed_check;
e95de063 8724 int bitsize;
cd1dac3d 8725 const int thumb2 = using_thumb2 (globals);
252b5132 8726
5ab79981 8727 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8728 the next instruction unless a PLT entry will be created.
8729 The jump to the next instruction is optimized as a NOP.W for
8730 Thumb-2 enabled architectures. */
19540007 8731 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8732 && plt_offset == (bfd_vma) -1)
5ab79981 8733 {
cd1dac3d
DG		 8734 if (arch_has_thumb2_nop (globals))
8735 {
8736 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8737 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8738 }
8739 else
8740 {
8741 bfd_put_16 (input_bfd, 0xe000, hit_data);
8742 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8743 }
5ab79981
PB		 8744 return bfd_reloc_ok;
8745 }
8746
e95de063
MS		 8747 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8748 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8749 if (globals->use_rel)
8750 {
e95de063
MS		 8751 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8752 bfd_vma upper = upper_insn & 0x3ff;
8753 bfd_vma lower = lower_insn & 0x7ff;
8754 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8755 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8756 bfd_vma i1 = j1 ^ s ? 0 : 1;
8757 bfd_vma i2 = j2 ^ s ? 0 : 1;
8758
8759 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8760 /* Sign extend. */
8761 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8762
4e7fd91e
PB		 8763 signed_addend = addend;
8764 }
cb1afa5c 8765
dfc5f959
NC		 8766 if (r_type == R_ARM_THM_XPC22)
8767 {
8768 /* Check for Thumb to Thumb call. */
8769 /* FIXME: Should we translate the instruction into a BL
8770 instruction instead ? */
35fc36a8 8771 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8772 (*_bfd_error_handler)
8773 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8774 input_bfd,
8775 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8776 }
8777 else
252b5132 8778 {
dfc5f959
NC		 8779 /* If it is not a call to Thumb, assume call to Arm.
8780 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8781 function call at all, but rather a long jump. Calls through
8782 the PLT do not require stubs. */
34e77a92 8783 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8784 {
bd97cb95 8785 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8786 {
8787 /* Convert BL to BLX. */
8788 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8789 }
155d87d7
CL		 8790 else if (( r_type != R_ARM_THM_CALL)
8791 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8792 {
8793 if (elf32_thumb_to_arm_stub
8794 (info, sym_name, input_bfd, output_bfd, input_section,
8795 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8796 error_message))
8797 return bfd_reloc_ok;
8798 else
8799 return bfd_reloc_dangerous;
8800 }
da5938a2 8801 }
35fc36a8
RS		 8802 else if (branch_type == ST_BRANCH_TO_THUMB
8803 && globals->use_blx
bd97cb95 8804 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8805 {
8806 /* Make sure this is a BL. */
8807 lower_insn |= 0x1800;
8808 }
252b5132 8809 }
f21f3fe0 8810
fe33d2fa 8811 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8812 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8813 {
8814 /* Check if a stub has to be inserted because the destination
8029a119 8815 is too far. */
fe33d2fa
CL		 8816 struct elf32_arm_stub_hash_entry *stub_entry;
8817 struct elf32_arm_link_hash_entry *hash;
8818
8819 hash = (struct elf32_arm_link_hash_entry *) h;
8820
8821 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8822 st_type, &branch_type,
8823 hash, value, sym_sec,
fe33d2fa
CL		 8824 input_bfd, sym_name);
8825
8826 if (stub_type != arm_stub_none)
906e58ca
NC		 8827 {
8828 /* The target is out of reach or we are changing modes, so
8829 redirect the branch to the local stub for this
8830 function. */
8831 stub_entry = elf32_arm_get_stub_entry (input_section,
8832 sym_sec, h,
fe33d2fa
CL		 8833 rel, globals,
8834 stub_type);
906e58ca 8835 if (stub_entry != NULL)
9cd3e4e5
NC		 8836 {
8837 value = (stub_entry->stub_offset
8838 + stub_entry->stub_sec->output_offset
8839 + stub_entry->stub_sec->output_section->vma);
8840
8841 if (plt_offset != (bfd_vma) -1)
8842 *unresolved_reloc_p = FALSE;
8843 }
906e58ca 8844
f4ac8484 8845 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8846 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8847 {
8848 if ((stub_entry
8849 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8850 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8851 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8852 }
906e58ca
NC		 8853 }
8854 }
8855
fe33d2fa 8856 /* Handle calls via the PLT. */
34e77a92 8857 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8858 {
8859 value = (splt->output_section->vma
8860 + splt->output_offset
34e77a92 8861 + plt_offset);
fe33d2fa
CL		 8862
8863 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8864 {
8865 /* If the Thumb BLX instruction is available, convert
8866 the BL to a BLX instruction to call the ARM-mode
8867 PLT entry. */
8868 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8869 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8870 }
8871 else
8872 {
8873 /* Target the Thumb stub before the ARM PLT entry. */
8874 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8875 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8876 }
8877 *unresolved_reloc_p = FALSE;
8878 }
8879
ba96a88f 8880 relocation = value + signed_addend;
f21f3fe0 8881
252b5132 8882 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8883 + input_section->output_offset
8884 + rel->r_offset);
9a5aca8c 8885
252b5132
RH		 8886 check = relocation >> howto->rightshift;
8887
8888 /* If this is a signed value, the rightshift just dropped
8889 leading 1 bits (assuming twos complement). */
8890 if ((bfd_signed_vma) relocation >= 0)
8891 signed_check = check;
8892 else
8893 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8894
e95de063
MS		 8895 /* Calculate the permissable maximum and minimum values for
8896 this relocation according to whether we're relocating for
8897 Thumb-2 or not. */
8898 bitsize = howto->bitsize;
8899 if (!thumb2)
8900 bitsize -= 2;
f6ebfac0 8901 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8902 reloc_signed_min = ~reloc_signed_max;
8903
252b5132 8904 /* Assumes two's complement. */
ba96a88f 8905 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8906 overflow = TRUE;
252b5132 8907
bd97cb95 8908 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8909 /* For a BLX instruction, make sure that the relocation is rounded up
8910 to a word boundary. This follows the semantics of the instruction
8911 which specifies that bit 1 of the target address will come from bit
8912 1 of the base address. */
8913 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8914
e95de063
MS		 8915 /* Put RELOCATION back into the insn. Assumes two's complement.
8916 We use the Thumb-2 encoding, which is safe even if dealing with
8917 a Thumb-1 instruction by virtue of our overflow check above. */
8918 reloc_sign = (signed_check < 0) ? 1 : 0;
8919 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8920 | ((relocation >> 12) & 0x3ff)
8921 | (reloc_sign << 10);
906e58ca 8922 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8923 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8924 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8925 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8926
252b5132
RH		 8927 /* Put the relocated value back in the object file: */
8928 bfd_put_16 (input_bfd, upper_insn, hit_data);
8929 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8930
8931 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8932 }
8933 break;
8934
c19d1205
ZW		 8935 case R_ARM_THM_JUMP19:
8936 /* Thumb32 conditional branch instruction. */
8937 {
8938 bfd_vma relocation;
8939 bfd_boolean overflow = FALSE;
8940 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8941 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8942 bfd_signed_vma reloc_signed_max = 0xffffe;
8943 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8944 bfd_signed_vma signed_check;
8945
8946 /* Need to refetch the addend, reconstruct the top three bits,
8947 and squish the two 11 bit pieces together. */
8948 if (globals->use_rel)
8949 {
8950 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8951 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8952 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8953 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8954 bfd_vma lower = (lower_insn & 0x07ff);
8955
a00a1f35
MS		 8956 upper |= J1 << 6;
8957 upper |= J2 << 7;
8958 upper |= (!S) << 8;
c19d1205
ZW		 8959 upper -= 0x0100; /* Sign extend. */
8960
8961 addend = (upper << 12) | (lower << 1);
8962 signed_addend = addend;
8963 }
8964
bd97cb95 8965 /* Handle calls via the PLT. */
34e77a92 8966 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 8967 {
8968 value = (splt->output_section->vma
8969 + splt->output_offset
34e77a92 8970 + plt_offset);
bd97cb95
DJ		 8971 /* Target the Thumb stub before the ARM PLT entry. */
8972 value -= PLT_THUMB_STUB_SIZE;
8973 *unresolved_reloc_p = FALSE;
8974 }
8975
c19d1205
ZW		 8976 /* ??? Should handle interworking? GCC might someday try to
8977 use this for tail calls. */
8978
8979 relocation = value + signed_addend;
8980 relocation -= (input_section->output_section->vma
8981 + input_section->output_offset
8982 + rel->r_offset);
a00a1f35 8983 signed_check = (bfd_signed_vma) relocation;
c19d1205 8984
c19d1205
ZW		 8985 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8986 overflow = TRUE;
8987
8988 /* Put RELOCATION back into the insn. */
8989 {
8990 bfd_vma S = (relocation & 0x00100000) >> 20;
8991 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8992 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8993 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8994 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8995
a00a1f35 8996 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 8997 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8998 }
8999
9000 /* Put the relocated value back in the object file: */
9001 bfd_put_16 (input_bfd, upper_insn, hit_data);
9002 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9003
9004 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9005 }
9006
9007 case R_ARM_THM_JUMP11:
9008 case R_ARM_THM_JUMP8:
9009 case R_ARM_THM_JUMP6:
51c5503b
NC		 9010 /* Thumb B (branch) instruction). */
9011 {
6cf9e9fe 9012 bfd_signed_vma relocation;
51c5503b
NC		 9013 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9014 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9015 bfd_signed_vma signed_check;
9016
c19d1205
ZW		 9017 /* CZB cannot jump backward. */
9018 if (r_type == R_ARM_THM_JUMP6)
9019 reloc_signed_min = 0;
9020
4e7fd91e 9021 if (globals->use_rel)
6cf9e9fe 9022 {
4e7fd91e
PB		 9023 /* Need to refetch addend. */
9024 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9025 if (addend & ((howto->src_mask + 1) >> 1))
9026 {
9027 signed_addend = -1;
9028 signed_addend &= ~ howto->src_mask;
9029 signed_addend |= addend;
9030 }
9031 else
9032 signed_addend = addend;
9033 /* The value in the insn has been right shifted. We need to
9034 undo this, so that we can perform the address calculation
9035 in terms of bytes. */
9036 signed_addend <<= howto->rightshift;
6cf9e9fe 9037 }
6cf9e9fe 9038 relocation = value + signed_addend;
51c5503b
NC		 9039
9040 relocation -= (input_section->output_section->vma
9041 + input_section->output_offset
9042 + rel->r_offset);
9043
6cf9e9fe
NC		 9044 relocation >>= howto->rightshift;
9045 signed_check = relocation;
c19d1205
ZW		 9046
9047 if (r_type == R_ARM_THM_JUMP6)
9048 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9049 else
9050 relocation &= howto->dst_mask;
51c5503b 9051 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9052
51c5503b
NC		 9053 bfd_put_16 (input_bfd, relocation, hit_data);
9054
9055 /* Assumes two's complement. */
9056 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9057 return bfd_reloc_overflow;
9058
9059 return bfd_reloc_ok;
9060 }
cedb70c5 9061
8375c36b
PB		 9062 case R_ARM_ALU_PCREL7_0:
9063 case R_ARM_ALU_PCREL15_8:
9064 case R_ARM_ALU_PCREL23_15:
9065 {
9066 bfd_vma insn;
9067 bfd_vma relocation;
9068
9069 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9070 if (globals->use_rel)
9071 {
9072 /* Extract the addend. */
9073 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9074 signed_addend = addend;
9075 }
8375c36b
PB		 9076 relocation = value + signed_addend;
9077
9078 relocation -= (input_section->output_section->vma
9079 + input_section->output_offset
9080 + rel->r_offset);
9081 insn = (insn & ~0xfff)
9082 | ((howto->bitpos << 7) & 0xf00)
9083 | ((relocation >> howto->bitpos) & 0xff);
9084 bfd_put_32 (input_bfd, value, hit_data);
9085 }
9086 return bfd_reloc_ok;
9087
252b5132
RH		 9088 case R_ARM_GNU_VTINHERIT:
9089 case R_ARM_GNU_VTENTRY:
9090 return bfd_reloc_ok;
9091
c19d1205 9092 case R_ARM_GOTOFF32:
252b5132
RH		 9093 /* Relocation is relative to the start of the
9094 global offset table. */
9095
9096 BFD_ASSERT (sgot != NULL);
9097 if (sgot == NULL)
9098 return bfd_reloc_notsupported;
9a5aca8c 9099
cedb70c5 9100 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9101 address by one, so that attempts to call the function pointer will
9102 correctly interpret it as Thumb code. */
35fc36a8 9103 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9104 value += 1;
9105
252b5132
RH		 9106 /* Note that sgot->output_offset is not involved in this
9107 calculation. We always want the start of .got. If we
9108 define _GLOBAL_OFFSET_TABLE in a different way, as is
9109 permitted by the ABI, we might have to change this
9b485d32 9110 calculation. */
252b5132 9111 value -= sgot->output_section->vma;
f21f3fe0 9112 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9113 contents, rel->r_offset, value,
00a97672 9114 rel->r_addend);
252b5132
RH		 9115
9116 case R_ARM_GOTPC:
a7c10850 9117 /* Use global offset table as symbol value. */
252b5132 9118 BFD_ASSERT (sgot != NULL);
f21f3fe0 9119
252b5132
RH		 9120 if (sgot == NULL)
9121 return bfd_reloc_notsupported;
9122
0945cdfd 9123 *unresolved_reloc_p = FALSE;
252b5132 9124 value = sgot->output_section->vma;
f21f3fe0 9125 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9126 contents, rel->r_offset, value,
00a97672 9127 rel->r_addend);
f21f3fe0 9128
252b5132 9129 case R_ARM_GOT32:
eb043451 9130 case R_ARM_GOT_PREL:
252b5132 9131 /* Relocation is to the entry for this symbol in the
9b485d32 9132 global offset table. */
252b5132
RH		 9133 if (sgot == NULL)
9134 return bfd_reloc_notsupported;
f21f3fe0 9135
34e77a92
RS		 9136 if (dynreloc_st_type == STT_GNU_IFUNC
9137 && plt_offset != (bfd_vma) -1
9138 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9139 {
9140 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9141 symbol, and the relocation resolves directly to the runtime
9142 target rather than to the .iplt entry. This means that any
9143 .got entry would be the same value as the .igot.plt entry,
9144 so there's no point creating both. */
9145 sgot = globals->root.igotplt;
9146 value = sgot->output_offset + gotplt_offset;
9147 }
9148 else if (h != NULL)
252b5132
RH		 9149 {
9150 bfd_vma off;
f21f3fe0 9151
252b5132
RH		 9152 off = h->got.offset;
9153 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9154 if ((off & 1) != 0)
252b5132 9155 {
b436d854
RS		 9156 /* We have already processsed one GOT relocation against
9157 this symbol. */
9158 off &= ~1;
9159 if (globals->root.dynamic_sections_created
9160 && !SYMBOL_REFERENCES_LOCAL (info, h))
9161 *unresolved_reloc_p = FALSE;
9162 }
9163 else
9164 {
9165 Elf_Internal_Rela outrel;
9166
9167 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9168 {
9169 /* If the symbol doesn't resolve locally in a static
9170 object, we have an undefined reference. If the
9171 symbol doesn't resolve locally in a dynamic object,
9172 it should be resolved by the dynamic linker. */
9173 if (globals->root.dynamic_sections_created)
9174 {
9175 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9176 *unresolved_reloc_p = FALSE;
9177 }
9178 else
9179 outrel.r_info = 0;
9180 outrel.r_addend = 0;
9181 }
252b5132
RH		 9182 else
9183 {
34e77a92
RS		 9184 if (dynreloc_st_type == STT_GNU_IFUNC)
9185 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9186 else if (info->shared)
9187 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9188 else
9189 outrel.r_info = 0;
9190 outrel.r_addend = dynreloc_value;
b436d854 9191 }
ee29b9fb 9192
b436d854
RS		 9193 /* The GOT entry is initialized to zero by default.
9194 See if we should install a different value. */
9195 if (outrel.r_addend != 0
9196 && (outrel.r_info == 0 || globals->use_rel))
9197 {
9198 bfd_put_32 (output_bfd, outrel.r_addend,
9199 sgot->contents + off);
9200 outrel.r_addend = 0;
252b5132 9201 }
f21f3fe0 9202
b436d854
RS		 9203 if (outrel.r_info != 0)
9204 {
9205 outrel.r_offset = (sgot->output_section->vma
9206 + sgot->output_offset
9207 + off);
9208 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9209 }
9210 h->got.offset |= 1;
9211 }
252b5132
RH		 9212 value = sgot->output_offset + off;
9213 }
9214 else
9215 {
9216 bfd_vma off;
f21f3fe0 9217
252b5132
RH		 9218 BFD_ASSERT (local_got_offsets != NULL &&
9219 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9220
252b5132 9221 off = local_got_offsets[r_symndx];
f21f3fe0 9222
252b5132
RH		 9223 /* The offset must always be a multiple of 4. We use the
9224 least significant bit to record whether we have already
9b485d32 9225 generated the necessary reloc. */
252b5132
RH		 9226 if ((off & 1) != 0)
9227 off &= ~1;
9228 else
9229 {
00a97672 9230 if (globals->use_rel)
34e77a92 9231 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9232
34e77a92 9233 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9234 {
947216bf 9235 Elf_Internal_Rela outrel;
f21f3fe0 9236
34e77a92 9237 outrel.r_addend = addend + dynreloc_value;
252b5132 9238 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9239 + sgot->output_offset
252b5132 9240 + off);
34e77a92
RS		 9241 if (dynreloc_st_type == STT_GNU_IFUNC)
9242 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9243 else
9244 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9245 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9246 }
f21f3fe0 9247
252b5132
RH		 9248 local_got_offsets[r_symndx] |= 1;
9249 }
f21f3fe0 9250
252b5132
RH		 9251 value = sgot->output_offset + off;
9252 }
eb043451
PB		 9253 if (r_type != R_ARM_GOT32)
9254 value += sgot->output_section->vma;
9a5aca8c 9255
f21f3fe0 9256 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9257 contents, rel->r_offset, value,
00a97672 9258 rel->r_addend);
f21f3fe0 9259
ba93b8ac
DJ		 9260 case R_ARM_TLS_LDO32:
9261 value = value - dtpoff_base (info);
9262
9263 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9264 contents, rel->r_offset, value,
9265 rel->r_addend);
ba93b8ac
DJ		 9266
9267 case R_ARM_TLS_LDM32:
9268 {
9269 bfd_vma off;
9270
362d30a1 9271 if (sgot == NULL)
ba93b8ac
DJ		 9272 abort ();
9273
9274 off = globals->tls_ldm_got.offset;
9275
9276 if ((off & 1) != 0)
9277 off &= ~1;
9278 else
9279 {
9280 /* If we don't know the module number, create a relocation
9281 for it. */
9282 if (info->shared)
9283 {
9284 Elf_Internal_Rela outrel;
ba93b8ac 9285
362d30a1 9286 if (srelgot == NULL)
ba93b8ac
DJ		 9287 abort ();
9288
00a97672 9289 outrel.r_addend = 0;
362d30a1
RS		 9290 outrel.r_offset = (sgot->output_section->vma
9291 + sgot->output_offset + off);
ba93b8ac
DJ		 9292 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9293
00a97672
RS		 9294 if (globals->use_rel)
9295 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9296 sgot->contents + off);
ba93b8ac 9297
47beaa6a 9298 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9299 }
9300 else
362d30a1 9301 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9302
9303 globals->tls_ldm_got.offset |= 1;
9304 }
9305
362d30a1 9306 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9307 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9308
9309 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9310 contents, rel->r_offset, value,
00a97672 9311 rel->r_addend);
ba93b8ac
DJ		 9312 }
9313
0855e32b
NS		 9314 case R_ARM_TLS_CALL:
9315 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9316 case R_ARM_TLS_GD32:
9317 case R_ARM_TLS_IE32:
0855e32b
NS		 9318 case R_ARM_TLS_GOTDESC:
9319 case R_ARM_TLS_DESCSEQ:
9320 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9321 {
0855e32b
NS		 9322 bfd_vma off, offplt;
9323 int indx = 0;
ba93b8ac
DJ		 9324 char tls_type;
9325
0855e32b 9326 BFD_ASSERT (sgot != NULL);
ba93b8ac 9327
ba93b8ac
DJ		 9328 if (h != NULL)
9329 {
9330 bfd_boolean dyn;
9331 dyn = globals->root.dynamic_sections_created;
9332 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9333 && (!info->shared
9334 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9335 {
9336 *unresolved_reloc_p = FALSE;
9337 indx = h->dynindx;
9338 }
9339 off = h->got.offset;
0855e32b 9340 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9341 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9342 }
9343 else
9344 {
0855e32b 9345 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9346 off = local_got_offsets[r_symndx];
0855e32b 9347 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9348 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9349 }
9350
0855e32b 9351 /* Linker relaxations happens from one of the
b38cadfb 9352 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9353 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9354 tls_type = GOT_TLS_IE;
0855e32b
NS		 9355
9356 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9357
9358 if ((off & 1) != 0)
9359 off &= ~1;
9360 else
9361 {
9362 bfd_boolean need_relocs = FALSE;
9363 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9364 int cur_off = off;
9365
9366 /* The GOT entries have not been initialized yet. Do it
9367 now, and emit any relocations. If both an IE GOT and a
9368 GD GOT are necessary, we emit the GD first. */
9369
9370 if ((info->shared || indx != 0)
9371 && (h == NULL
9372 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9373 || h->root.type != bfd_link_hash_undefweak))
9374 {
9375 need_relocs = TRUE;
0855e32b 9376 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9377 }
9378
0855e32b
NS		 9379 if (tls_type & GOT_TLS_GDESC)
9380 {
47beaa6a
RS		 9381 bfd_byte *loc;
9382
0855e32b
NS		 9383 /* We should have relaxed, unless this is an undefined
9384 weak symbol. */
9385 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9386 || info->shared);
9387 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9388 <= globals->root.sgotplt->size);
9389
9390 outrel.r_addend = 0;
9391 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9392 + globals->root.sgotplt->output_offset
9393 + offplt
9394 + globals->sgotplt_jump_table_size);
b38cadfb 9395
0855e32b
NS		 9396 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9397 sreloc = globals->root.srelplt;
9398 loc = sreloc->contents;
9399 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9400 BFD_ASSERT (loc + RELOC_SIZE (globals)
9401 <= sreloc->contents + sreloc->size);
9402
9403 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9404
9405 /* For globals, the first word in the relocation gets
9406 the relocation index and the top bit set, or zero,
9407 if we're binding now. For locals, it gets the
9408 symbol's offset in the tls section. */
9409 bfd_put_32 (output_bfd,
9410 !h ? value - elf_hash_table (info)->tls_sec->vma
9411 : info->flags & DF_BIND_NOW ? 0
9412 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9413 globals->root.sgotplt->contents + offplt
9414 + globals->sgotplt_jump_table_size);
9415
0855e32b
NS		 9416 /* Second word in the relocation is always zero. */
9417 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9418 globals->root.sgotplt->contents + offplt
9419 + globals->sgotplt_jump_table_size + 4);
0855e32b 9420 }
ba93b8ac
DJ		 9421 if (tls_type & GOT_TLS_GD)
9422 {
9423 if (need_relocs)
9424 {
00a97672 9425 outrel.r_addend = 0;
362d30a1
RS		 9426 outrel.r_offset = (sgot->output_section->vma
9427 + sgot->output_offset
00a97672 9428 + cur_off);
ba93b8ac 9429 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9430
00a97672
RS		 9431 if (globals->use_rel)
9432 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9433 sgot->contents + cur_off);
00a97672 9434
47beaa6a 9435 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9436
9437 if (indx == 0)
9438 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9439 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9440 else
9441 {
00a97672 9442 outrel.r_addend = 0;
ba93b8ac
DJ		 9443 outrel.r_info = ELF32_R_INFO (indx,
9444 R_ARM_TLS_DTPOFF32);
9445 outrel.r_offset += 4;
00a97672
RS		 9446
9447 if (globals->use_rel)
9448 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9449 sgot->contents + cur_off + 4);
00a97672 9450
47beaa6a
RS		 9451 elf32_arm_add_dynreloc (output_bfd, info,
9452 srelgot, &outrel);
ba93b8ac
DJ		 9453 }
9454 }
9455 else
9456 {
9457 /* If we are not emitting relocations for a
9458 general dynamic reference, then we must be in a
9459 static link or an executable link with the
9460 symbol binding locally. Mark it as belonging
9461 to module 1, the executable. */
9462 bfd_put_32 (output_bfd, 1,
362d30a1 9463 sgot->contents + cur_off);
ba93b8ac 9464 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9465 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9466 }
9467
9468 cur_off += 8;
9469 }
9470
9471 if (tls_type & GOT_TLS_IE)
9472 {
9473 if (need_relocs)
9474 {
00a97672
RS		 9475 if (indx == 0)
9476 outrel.r_addend = value - dtpoff_base (info);
9477 else
9478 outrel.r_addend = 0;
362d30a1
RS		 9479 outrel.r_offset = (sgot->output_section->vma
9480 + sgot->output_offset
ba93b8ac
DJ		 9481 + cur_off);
9482 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9483
00a97672
RS		 9484 if (globals->use_rel)
9485 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9486 sgot->contents + cur_off);
ba93b8ac 9487
47beaa6a 9488 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9489 }
9490 else
9491 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9492 sgot->contents + cur_off);
ba93b8ac
DJ		 9493 cur_off += 4;
9494 }
9495
9496 if (h != NULL)
9497 h->got.offset |= 1;
9498 else
9499 local_got_offsets[r_symndx] |= 1;
9500 }
9501
9502 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9503 off += 8;
0855e32b
NS		 9504 else if (tls_type & GOT_TLS_GDESC)
9505 off = offplt;
9506
9507 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9508 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9509 {
9510 bfd_signed_vma offset;
12352d3f
PB		 9511 /* TLS stubs are arm mode. The original symbol is a
9512 data object, so branch_type is bogus. */
9513 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9514 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9515 = arm_type_of_stub (info, input_section, rel,
9516 st_type, &branch_type,
0855e32b
NS		 9517 (struct elf32_arm_link_hash_entry *)h,
9518 globals->tls_trampoline, globals->root.splt,
9519 input_bfd, sym_name);
9520
9521 if (stub_type != arm_stub_none)
9522 {
9523 struct elf32_arm_stub_hash_entry *stub_entry
9524 = elf32_arm_get_stub_entry
9525 (input_section, globals->root.splt, 0, rel,
9526 globals, stub_type);
9527 offset = (stub_entry->stub_offset
9528 + stub_entry->stub_sec->output_offset
9529 + stub_entry->stub_sec->output_section->vma);
9530 }
9531 else
9532 offset = (globals->root.splt->output_section->vma
9533 + globals->root.splt->output_offset
9534 + globals->tls_trampoline);
9535
9536 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9537 {
9538 unsigned long inst;
b38cadfb
NC		 9539
9540 offset -= (input_section->output_section->vma
9541 + input_section->output_offset
9542 + rel->r_offset + 8);
0855e32b
NS		 9543
9544 inst = offset >> 2;
9545 inst &= 0x00ffffff;
9546 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9547 }
9548 else
9549 {
9550 /* Thumb blx encodes the offset in a complicated
9551 fashion. */
9552 unsigned upper_insn, lower_insn;
9553 unsigned neg;
9554
b38cadfb
NC		 9555 offset -= (input_section->output_section->vma
9556 + input_section->output_offset
0855e32b 9557 + rel->r_offset + 4);
b38cadfb 9558
12352d3f
PB		 9559 if (stub_type != arm_stub_none
9560 && arm_stub_is_thumb (stub_type))
9561 {
9562 lower_insn = 0xd000;
9563 }
9564 else
9565 {
9566 lower_insn = 0xc000;
9567 /* Round up the offset to a word boundary */
9568 offset = (offset + 2) & ~2;
9569 }
9570
0855e32b
NS		 9571 neg = offset < 0;
9572 upper_insn = (0xf000
9573 | ((offset >> 12) & 0x3ff)
9574 | (neg << 10));
12352d3f 9575 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9576 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9577 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9578 bfd_put_16 (input_bfd, upper_insn, hit_data);
9579 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9580 return bfd_reloc_ok;
9581 }
9582 }
9583 /* These relocations needs special care, as besides the fact
9584 they point somewhere in .gotplt, the addend must be
9585 adjusted accordingly depending on the type of instruction
9586 we refer to */
9587 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9588 {
9589 unsigned long data, insn;
9590 unsigned thumb;
b38cadfb 9591
0855e32b
NS		 9592 data = bfd_get_32 (input_bfd, hit_data);
9593 thumb = data & 1;
9594 data &= ~1u;
b38cadfb 9595
0855e32b
NS		 9596 if (thumb)
9597 {
9598 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9599 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9600 insn = (insn << 16)
9601 | bfd_get_16 (input_bfd,
9602 contents + rel->r_offset - data + 2);
9603 if ((insn & 0xf800c000) == 0xf000c000)
9604 /* bl/blx */
9605 value = -6;
9606 else if ((insn & 0xffffff00) == 0x4400)
9607 /* add */
9608 value = -5;
9609 else
9610 {
9611 (*_bfd_error_handler)
9612 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9613 input_bfd, input_section,
9614 (unsigned long)rel->r_offset, insn);
9615 return bfd_reloc_notsupported;
9616 }
9617 }
9618 else
9619 {
9620 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9621
9622 switch (insn >> 24)
9623 {
9624 case 0xeb: /* bl */
9625 case 0xfa: /* blx */
9626 value = -4;
9627 break;
9628
9629 case 0xe0: /* add */
9630 value = -8;
9631 break;
b38cadfb 9632
0855e32b
NS		 9633 default:
9634 (*_bfd_error_handler)
9635 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9636 input_bfd, input_section,
9637 (unsigned long)rel->r_offset, insn);
9638 return bfd_reloc_notsupported;
9639 }
9640 }
b38cadfb 9641
0855e32b
NS		 9642 value += ((globals->root.sgotplt->output_section->vma
9643 + globals->root.sgotplt->output_offset + off)
9644 - (input_section->output_section->vma
9645 + input_section->output_offset
9646 + rel->r_offset)
9647 + globals->sgotplt_jump_table_size);
9648 }
9649 else
9650 value = ((globals->root.sgot->output_section->vma
9651 + globals->root.sgot->output_offset + off)
9652 - (input_section->output_section->vma
9653 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9654
9655 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9656 contents, rel->r_offset, value,
00a97672 9657 rel->r_addend);
ba93b8ac
DJ		 9658 }
9659
9660 case R_ARM_TLS_LE32:
9ec0c936 9661 if (info->shared && !info->pie)
ba93b8ac
DJ		 9662 {
9663 (*_bfd_error_handler)
9664 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9665 input_bfd, input_section,
9666 (long) rel->r_offset, howto->name);
21d799b5 9667 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 9668 }
9669 else
9670 value = tpoff (info, value);
906e58ca 9671
ba93b8ac 9672 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9673 contents, rel->r_offset, value,
9674 rel->r_addend);
ba93b8ac 9675
319850b4
JB		 9676 case R_ARM_V4BX:
9677 if (globals->fix_v4bx)
845b51d6
PB		 9678 {
9679 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9680
845b51d6
PB		 9681 /* Ensure that we have a BX instruction. */
9682 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9683
845b51d6
PB		 9684 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9685 {
9686 /* Branch to veneer. */
9687 bfd_vma glue_addr;
9688 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9689 glue_addr -= input_section->output_section->vma
9690 + input_section->output_offset
9691 + rel->r_offset + 8;
9692 insn = (insn & 0xf0000000) | 0x0a000000
9693 | ((glue_addr >> 2) & 0x00ffffff);
9694 }
9695 else
9696 {
9697 /* Preserve Rm (lowest four bits) and the condition code
9698 (highest four bits). Other bits encode MOV PC,Rm. */
9699 insn = (insn & 0xf000000f) | 0x01a0f000;
9700 }
319850b4 9701
845b51d6
PB		 9702 bfd_put_32 (input_bfd, insn, hit_data);
9703 }
319850b4
JB		 9704 return bfd_reloc_ok;
9705
b6895b4f
PB		 9706 case R_ARM_MOVW_ABS_NC:
9707 case R_ARM_MOVT_ABS:
9708 case R_ARM_MOVW_PREL_NC:
9709 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9710 /* Until we properly support segment-base-relative addressing then
9711 we assume the segment base to be zero, as for the group relocations.
9712 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9713 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9714 case R_ARM_MOVW_BREL_NC:
9715 case R_ARM_MOVW_BREL:
9716 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9717 {
9718 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9719
9720 if (globals->use_rel)
9721 {
9722 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9723 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9724 }
92f5d02b 9725
b6895b4f 9726 value += signed_addend;
b6895b4f
PB		 9727
9728 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9729 value -= (input_section->output_section->vma
9730 + input_section->output_offset + rel->r_offset);
9731
92f5d02b
MS		 9732 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9733 return bfd_reloc_overflow;
9734
35fc36a8 9735 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9736 value |= 1;
9737
9738 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9739 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9740 value >>= 16;
9741
9742 insn &= 0xfff0f000;
9743 insn |= value & 0xfff;
9744 insn |= (value & 0xf000) << 4;
9745 bfd_put_32 (input_bfd, insn, hit_data);
9746 }
9747 return bfd_reloc_ok;
9748
9749 case R_ARM_THM_MOVW_ABS_NC:
9750 case R_ARM_THM_MOVT_ABS:
9751 case R_ARM_THM_MOVW_PREL_NC:
9752 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9753 /* Until we properly support segment-base-relative addressing then
9754 we assume the segment base to be zero, as for the above relocations.
9755 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9756 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9757 as R_ARM_THM_MOVT_ABS. */
9758 case R_ARM_THM_MOVW_BREL_NC:
9759 case R_ARM_THM_MOVW_BREL:
9760 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9761 {
9762 bfd_vma insn;
906e58ca 9763
b6895b4f
PB		 9764 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9765 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9766
9767 if (globals->use_rel)
9768 {
9769 addend = ((insn >> 4) & 0xf000)
9770 | ((insn >> 15) & 0x0800)
9771 | ((insn >> 4) & 0x0700)
9772 | (insn & 0x00ff);
39623e12 9773 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9774 }
92f5d02b 9775
b6895b4f 9776 value += signed_addend;
b6895b4f
PB		 9777
9778 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9779 value -= (input_section->output_section->vma
9780 + input_section->output_offset + rel->r_offset);
9781
92f5d02b
MS		 9782 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9783 return bfd_reloc_overflow;
9784
35fc36a8 9785 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9786 value |= 1;
9787
9788 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9789 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9790 value >>= 16;
9791
9792 insn &= 0xfbf08f00;
9793 insn |= (value & 0xf000) << 4;
9794 insn |= (value & 0x0800) << 15;
9795 insn |= (value & 0x0700) << 4;
9796 insn |= (value & 0x00ff);
9797
9798 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9799 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9800 }
9801 return bfd_reloc_ok;
9802
4962c51a
MS		 9803 case R_ARM_ALU_PC_G0_NC:
9804 case R_ARM_ALU_PC_G1_NC:
9805 case R_ARM_ALU_PC_G0:
9806 case R_ARM_ALU_PC_G1:
9807 case R_ARM_ALU_PC_G2:
9808 case R_ARM_ALU_SB_G0_NC:
9809 case R_ARM_ALU_SB_G1_NC:
9810 case R_ARM_ALU_SB_G0:
9811 case R_ARM_ALU_SB_G1:
9812 case R_ARM_ALU_SB_G2:
9813 {
9814 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9815 bfd_vma pc = input_section->output_section->vma
9816 + input_section->output_offset + rel->r_offset;
9817 /* sb should be the origin of the *segment* containing the symbol.
9818 It is not clear how to obtain this OS-dependent value, so we
9819 make an arbitrary choice of zero. */
9820 bfd_vma sb = 0;
9821 bfd_vma residual;
9822 bfd_vma g_n;
9823 bfd_signed_vma signed_value;
9824 int group = 0;
9825
9826 /* Determine which group of bits to select. */
9827 switch (r_type)
9828 {
9829 case R_ARM_ALU_PC_G0_NC:
9830 case R_ARM_ALU_PC_G0:
9831 case R_ARM_ALU_SB_G0_NC:
9832 case R_ARM_ALU_SB_G0:
9833 group = 0;
9834 break;
9835
9836 case R_ARM_ALU_PC_G1_NC:
9837 case R_ARM_ALU_PC_G1:
9838 case R_ARM_ALU_SB_G1_NC:
9839 case R_ARM_ALU_SB_G1:
9840 group = 1;
9841 break;
9842
9843 case R_ARM_ALU_PC_G2:
9844 case R_ARM_ALU_SB_G2:
9845 group = 2;
9846 break;
9847
9848 default:
906e58ca 9849 abort ();
4962c51a
MS		 9850 }
9851
9852 /* If REL, extract the addend from the insn. If RELA, it will
9853 have already been fetched for us. */
9854 if (globals->use_rel)
9855 {
9856 int negative;
9857 bfd_vma constant = insn & 0xff;
9858 bfd_vma rotation = (insn & 0xf00) >> 8;
9859
9860 if (rotation == 0)
9861 signed_addend = constant;
9862 else
9863 {
9864 /* Compensate for the fact that in the instruction, the
9865 rotation is stored in multiples of 2 bits. */
9866 rotation *= 2;
9867
9868 /* Rotate "constant" right by "rotation" bits. */
9869 signed_addend = (constant >> rotation) |
9870 (constant << (8 * sizeof (bfd_vma) - rotation));
9871 }
9872
9873 /* Determine if the instruction is an ADD or a SUB.
9874 (For REL, this determines the sign of the addend.) */
9875 negative = identify_add_or_sub (insn);
9876 if (negative == 0)
9877 {
9878 (*_bfd_error_handler)
9879 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9880 input_bfd, input_section,
9881 (long) rel->r_offset, howto->name);
906e58ca 9882 return bfd_reloc_overflow;
4962c51a
MS		 9883 }
9884
9885 signed_addend *= negative;
9886 }
9887
9888 /* Compute the value (X) to go in the place. */
9889 if (r_type == R_ARM_ALU_PC_G0_NC
9890 || r_type == R_ARM_ALU_PC_G1_NC
9891 || r_type == R_ARM_ALU_PC_G0
9892 || r_type == R_ARM_ALU_PC_G1
9893 || r_type == R_ARM_ALU_PC_G2)
9894 /* PC relative. */
9895 signed_value = value - pc + signed_addend;
9896 else
9897 /* Section base relative. */
9898 signed_value = value - sb + signed_addend;
9899
9900 /* If the target symbol is a Thumb function, then set the
9901 Thumb bit in the address. */
35fc36a8 9902 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9903 signed_value |= 1;
9904
9905 /* Calculate the value of the relevant G_n, in encoded
9906 constant-with-rotation format. */
9907 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9908 &residual);
9909
9910 /* Check for overflow if required. */
9911 if ((r_type == R_ARM_ALU_PC_G0
9912 || r_type == R_ARM_ALU_PC_G1
9913 || r_type == R_ARM_ALU_PC_G2
9914 || r_type == R_ARM_ALU_SB_G0
9915 || r_type == R_ARM_ALU_SB_G1
9916 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9917 {
9918 (*_bfd_error_handler)
9919 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9920 input_bfd, input_section,
9921 (long) rel->r_offset, abs (signed_value), howto->name);
9922 return bfd_reloc_overflow;
9923 }
9924
9925 /* Mask out the value and the ADD/SUB part of the opcode; take care
9926 not to destroy the S bit. */
9927 insn &= 0xff1ff000;
9928
9929 /* Set the opcode according to whether the value to go in the
9930 place is negative. */
9931 if (signed_value < 0)
9932 insn |= 1 << 22;
9933 else
9934 insn |= 1 << 23;
9935
9936 /* Encode the offset. */
9937 insn |= g_n;
9938
9939 bfd_put_32 (input_bfd, insn, hit_data);
9940 }
9941 return bfd_reloc_ok;
9942
9943 case R_ARM_LDR_PC_G0:
9944 case R_ARM_LDR_PC_G1:
9945 case R_ARM_LDR_PC_G2:
9946 case R_ARM_LDR_SB_G0:
9947 case R_ARM_LDR_SB_G1:
9948 case R_ARM_LDR_SB_G2:
9949 {
9950 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9951 bfd_vma pc = input_section->output_section->vma
9952 + input_section->output_offset + rel->r_offset;
9953 bfd_vma sb = 0; /* See note above. */
9954 bfd_vma residual;
9955 bfd_signed_vma signed_value;
9956 int group = 0;
9957
9958 /* Determine which groups of bits to calculate. */
9959 switch (r_type)
9960 {
9961 case R_ARM_LDR_PC_G0:
9962 case R_ARM_LDR_SB_G0:
9963 group = 0;
9964 break;
9965
9966 case R_ARM_LDR_PC_G1:
9967 case R_ARM_LDR_SB_G1:
9968 group = 1;
9969 break;
9970
9971 case R_ARM_LDR_PC_G2:
9972 case R_ARM_LDR_SB_G2:
9973 group = 2;
9974 break;
9975
9976 default:
906e58ca 9977 abort ();
4962c51a
MS		 9978 }
9979
9980 /* If REL, extract the addend from the insn. If RELA, it will
9981 have already been fetched for us. */
9982 if (globals->use_rel)
9983 {
9984 int negative = (insn & (1 << 23)) ? 1 : -1;
9985 signed_addend = negative * (insn & 0xfff);
9986 }
9987
9988 /* Compute the value (X) to go in the place. */
9989 if (r_type == R_ARM_LDR_PC_G0
9990 || r_type == R_ARM_LDR_PC_G1
9991 || r_type == R_ARM_LDR_PC_G2)
9992 /* PC relative. */
9993 signed_value = value - pc + signed_addend;
9994 else
9995 /* Section base relative. */
9996 signed_value = value - sb + signed_addend;
9997
9998 /* Calculate the value of the relevant G_{n-1} to obtain
9999 the residual at that stage. */
10000 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10001
10002 /* Check for overflow. */
10003 if (residual >= 0x1000)
10004 {
10005 (*_bfd_error_handler)
10006 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10007 input_bfd, input_section,
10008 (long) rel->r_offset, abs (signed_value), howto->name);
10009 return bfd_reloc_overflow;
10010 }
10011
10012 /* Mask out the value and U bit. */
10013 insn &= 0xff7ff000;
10014
10015 /* Set the U bit if the value to go in the place is non-negative. */
10016 if (signed_value >= 0)
10017 insn |= 1 << 23;
10018
10019 /* Encode the offset. */
10020 insn |= residual;
10021
10022 bfd_put_32 (input_bfd, insn, hit_data);
10023 }
10024 return bfd_reloc_ok;
10025
10026 case R_ARM_LDRS_PC_G0:
10027 case R_ARM_LDRS_PC_G1:
10028 case R_ARM_LDRS_PC_G2:
10029 case R_ARM_LDRS_SB_G0:
10030 case R_ARM_LDRS_SB_G1:
10031 case R_ARM_LDRS_SB_G2:
10032 {
10033 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10034 bfd_vma pc = input_section->output_section->vma
10035 + input_section->output_offset + rel->r_offset;
10036 bfd_vma sb = 0; /* See note above. */
10037 bfd_vma residual;
10038 bfd_signed_vma signed_value;
10039 int group = 0;
10040
10041 /* Determine which groups of bits to calculate. */
10042 switch (r_type)
10043 {
10044 case R_ARM_LDRS_PC_G0:
10045 case R_ARM_LDRS_SB_G0:
10046 group = 0;
10047 break;
10048
10049 case R_ARM_LDRS_PC_G1:
10050 case R_ARM_LDRS_SB_G1:
10051 group = 1;
10052 break;
10053
10054 case R_ARM_LDRS_PC_G2:
10055 case R_ARM_LDRS_SB_G2:
10056 group = 2;
10057 break;
10058
10059 default:
906e58ca 10060 abort ();
4962c51a
MS		 10061 }
10062
10063 /* If REL, extract the addend from the insn. If RELA, it will
10064 have already been fetched for us. */
10065 if (globals->use_rel)
10066 {
10067 int negative = (insn & (1 << 23)) ? 1 : -1;
10068 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10069 }
10070
10071 /* Compute the value (X) to go in the place. */
10072 if (r_type == R_ARM_LDRS_PC_G0
10073 || r_type == R_ARM_LDRS_PC_G1
10074 || r_type == R_ARM_LDRS_PC_G2)
10075 /* PC relative. */
10076 signed_value = value - pc + signed_addend;
10077 else
10078 /* Section base relative. */
10079 signed_value = value - sb + signed_addend;
10080
10081 /* Calculate the value of the relevant G_{n-1} to obtain
10082 the residual at that stage. */
10083 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10084
10085 /* Check for overflow. */
10086 if (residual >= 0x100)
10087 {
10088 (*_bfd_error_handler)
10089 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10090 input_bfd, input_section,
10091 (long) rel->r_offset, abs (signed_value), howto->name);
10092 return bfd_reloc_overflow;
10093 }
10094
10095 /* Mask out the value and U bit. */
10096 insn &= 0xff7ff0f0;
10097
10098 /* Set the U bit if the value to go in the place is non-negative. */
10099 if (signed_value >= 0)
10100 insn |= 1 << 23;
10101
10102 /* Encode the offset. */
10103 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10104
10105 bfd_put_32 (input_bfd, insn, hit_data);
10106 }
10107 return bfd_reloc_ok;
10108
10109 case R_ARM_LDC_PC_G0:
10110 case R_ARM_LDC_PC_G1:
10111 case R_ARM_LDC_PC_G2:
10112 case R_ARM_LDC_SB_G0:
10113 case R_ARM_LDC_SB_G1:
10114 case R_ARM_LDC_SB_G2:
10115 {
10116 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10117 bfd_vma pc = input_section->output_section->vma
10118 + input_section->output_offset + rel->r_offset;
10119 bfd_vma sb = 0; /* See note above. */
10120 bfd_vma residual;
10121 bfd_signed_vma signed_value;
10122 int group = 0;
10123
10124 /* Determine which groups of bits to calculate. */
10125 switch (r_type)
10126 {
10127 case R_ARM_LDC_PC_G0:
10128 case R_ARM_LDC_SB_G0:
10129 group = 0;
10130 break;
10131
10132 case R_ARM_LDC_PC_G1:
10133 case R_ARM_LDC_SB_G1:
10134 group = 1;
10135 break;
10136
10137 case R_ARM_LDC_PC_G2:
10138 case R_ARM_LDC_SB_G2:
10139 group = 2;
10140 break;
10141
10142 default:
906e58ca 10143 abort ();
4962c51a
MS		 10144 }
10145
10146 /* If REL, extract the addend from the insn. If RELA, it will
10147 have already been fetched for us. */
10148 if (globals->use_rel)
10149 {
10150 int negative = (insn & (1 << 23)) ? 1 : -1;
10151 signed_addend = negative * ((insn & 0xff) << 2);
10152 }
10153
10154 /* Compute the value (X) to go in the place. */
10155 if (r_type == R_ARM_LDC_PC_G0
10156 || r_type == R_ARM_LDC_PC_G1
10157 || r_type == R_ARM_LDC_PC_G2)
10158 /* PC relative. */
10159 signed_value = value - pc + signed_addend;
10160 else
10161 /* Section base relative. */
10162 signed_value = value - sb + signed_addend;
10163
10164 /* Calculate the value of the relevant G_{n-1} to obtain
10165 the residual at that stage. */
10166 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10167
10168 /* Check for overflow. (The absolute value to go in the place must be
10169 divisible by four and, after having been divided by four, must
10170 fit in eight bits.) */
10171 if ((residual & 0x3) != 0 || residual >= 0x400)
10172 {
10173 (*_bfd_error_handler)
10174 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10175 input_bfd, input_section,
10176 (long) rel->r_offset, abs (signed_value), howto->name);
10177 return bfd_reloc_overflow;
10178 }
10179
10180 /* Mask out the value and U bit. */
10181 insn &= 0xff7fff00;
10182
10183 /* Set the U bit if the value to go in the place is non-negative. */
10184 if (signed_value >= 0)
10185 insn |= 1 << 23;
10186
10187 /* Encode the offset. */
10188 insn |= residual >> 2;
10189
10190 bfd_put_32 (input_bfd, insn, hit_data);
10191 }
10192 return bfd_reloc_ok;
10193
252b5132
RH		 10194 default:
10195 return bfd_reloc_notsupported;
10196 }
10197}
10198
98c1d4aa
NC		 10199/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10200static void
57e8b36a
NC		 10201arm_add_to_rel (bfd * abfd,
10202 bfd_byte * address,
10203 reloc_howto_type * howto,
10204 bfd_signed_vma increment)
98c1d4aa 10205{
98c1d4aa
NC		 10206 bfd_signed_vma addend;
10207
bd97cb95
DJ		 10208 if (howto->type == R_ARM_THM_CALL
10209 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10210 {
9a5aca8c
AM		 10211 int upper_insn, lower_insn;
10212 int upper, lower;
98c1d4aa 10213
9a5aca8c
AM		 10214 upper_insn = bfd_get_16 (abfd, address);
10215 lower_insn = bfd_get_16 (abfd, address + 2);
10216 upper = upper_insn & 0x7ff;
10217 lower = lower_insn & 0x7ff;
10218
10219 addend = (upper << 12) | (lower << 1);
ddda4409 10220 addend += increment;
9a5aca8c 10221 addend >>= 1;
98c1d4aa 10222
9a5aca8c
AM		 10223 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10224 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10225
dc810e39
AM		 10226 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10227 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10228 }
10229 else
10230 {
10231 bfd_vma contents;
10232
10233 contents = bfd_get_32 (abfd, address);
10234
10235 /* Get the (signed) value from the instruction. */
10236 addend = contents & howto->src_mask;
10237 if (addend & ((howto->src_mask + 1) >> 1))
10238 {
10239 bfd_signed_vma mask;
10240
10241 mask = -1;
10242 mask &= ~ howto->src_mask;
10243 addend |= mask;
10244 }
10245
10246 /* Add in the increment, (which is a byte value). */
10247 switch (howto->type)
10248 {
10249 default:
10250 addend += increment;
10251 break;
10252
10253 case R_ARM_PC24:
c6596c5e 10254 case R_ARM_PLT32:
5b5bb741
PB		 10255 case R_ARM_CALL:
10256 case R_ARM_JUMP24:
9a5aca8c 10257 addend <<= howto->size;
dc810e39 10258 addend += increment;
9a5aca8c
AM		 10259
10260 /* Should we check for overflow here ? */
10261
10262 /* Drop any undesired bits. */
10263 addend >>= howto->rightshift;
10264 break;
10265 }
10266
10267 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10268
10269 bfd_put_32 (abfd, contents, address);
ddda4409 10270 }
98c1d4aa 10271}
252b5132 10272
ba93b8ac
DJ		 10273#define IS_ARM_TLS_RELOC(R_TYPE) \
10274 ((R_TYPE) == R_ARM_TLS_GD32 \
10275 || (R_TYPE) == R_ARM_TLS_LDO32 \
10276 || (R_TYPE) == R_ARM_TLS_LDM32 \
10277 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10278 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10279 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10280 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10281 || (R_TYPE) == R_ARM_TLS_IE32 \
10282 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10283
10284/* Specific set of relocations for the gnu tls dialect. */
10285#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10286 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10287 || (R_TYPE) == R_ARM_TLS_CALL \
10288 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10289 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10290 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10291
252b5132 10292/* Relocate an ARM ELF section. */
906e58ca 10293
b34976b6 10294static bfd_boolean
57e8b36a
NC		 10295elf32_arm_relocate_section (bfd * output_bfd,
10296 struct bfd_link_info * info,
10297 bfd * input_bfd,
10298 asection * input_section,
10299 bfd_byte * contents,
10300 Elf_Internal_Rela * relocs,
10301 Elf_Internal_Sym * local_syms,
10302 asection ** local_sections)
252b5132 10303{
b34976b6
AM		 10304 Elf_Internal_Shdr *symtab_hdr;
10305 struct elf_link_hash_entry **sym_hashes;
10306 Elf_Internal_Rela *rel;
10307 Elf_Internal_Rela *relend;
10308 const char *name;
b32d3aa2 10309 struct elf32_arm_link_hash_table * globals;
252b5132 10310
4e7fd91e 10311 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10312 if (globals == NULL)
10313 return FALSE;
b491616a 10314
0ffa91dd 10315 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10316 sym_hashes = elf_sym_hashes (input_bfd);
10317
10318 rel = relocs;
10319 relend = relocs + input_section->reloc_count;
10320 for (; rel < relend; rel++)
10321 {
ba96a88f
NC		 10322 int r_type;
10323 reloc_howto_type * howto;
10324 unsigned long r_symndx;
10325 Elf_Internal_Sym * sym;
10326 asection * sec;
252b5132 10327 struct elf_link_hash_entry * h;
ba96a88f
NC		 10328 bfd_vma relocation;
10329 bfd_reloc_status_type r;
10330 arelent bfd_reloc;
ba93b8ac 10331 char sym_type;
0945cdfd 10332 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10333 char *error_message = NULL;
f21f3fe0 10334
252b5132 10335 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10336 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10337 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10338
ba96a88f
NC		 10339 if ( r_type == R_ARM_GNU_VTENTRY
10340 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 10341 continue;
10342
b32d3aa2 10343 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10344 howto = bfd_reloc.howto;
252b5132 10345
252b5132
RH		 10346 h = NULL;
10347 sym = NULL;
10348 sec = NULL;
9b485d32 10349
252b5132
RH		 10350 if (r_symndx < symtab_hdr->sh_info)
10351 {
10352 sym = local_syms + r_symndx;
ba93b8ac 10353 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10354 sec = local_sections[r_symndx];
ffcb4889
NS		 10355
10356 /* An object file might have a reference to a local
10357 undefined symbol. This is a daft object file, but we
10358 should at least do something about it. V4BX & NONE
10359 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10360 allowed to use the undefined symbol, so allow those.
10361 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10362 if (r_type != R_ARM_V4BX
10363 && r_type != R_ARM_NONE
77b4f08f 10364 && r_symndx != STN_UNDEF
ffcb4889
NS		 10365 && bfd_is_und_section (sec)
10366 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10367 {
10368 if (!info->callbacks->undefined_symbol
10369 (info, bfd_elf_string_from_elf_section
10370 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10371 input_bfd, input_section,
10372 rel->r_offset, TRUE))
10373 return FALSE;
10374 }
b38cadfb 10375
4e7fd91e 10376 if (globals->use_rel)
f8df10f4 10377 {
4e7fd91e
PB		 10378 relocation = (sec->output_section->vma
10379 + sec->output_offset
10380 + sym->st_value);
ab96bf03
AM		 10381 if (!info->relocatable
10382 && (sec->flags & SEC_MERGE)
10383 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10384 {
4e7fd91e
PB		 10385 asection *msec;
10386 bfd_vma addend, value;
10387
39623e12 10388 switch (r_type)
4e7fd91e 10389 {
39623e12
PB		 10390 case R_ARM_MOVW_ABS_NC:
10391 case R_ARM_MOVT_ABS:
10392 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10393 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10394 addend = (addend ^ 0x8000) - 0x8000;
10395 break;
f8df10f4 10396
39623e12
PB		 10397 case R_ARM_THM_MOVW_ABS_NC:
10398 case R_ARM_THM_MOVT_ABS:
10399 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10400 << 16;
10401 value |= bfd_get_16 (input_bfd,
10402 contents + rel->r_offset + 2);
10403 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10404 | ((value & 0x04000000) >> 15);
10405 addend = (addend ^ 0x8000) - 0x8000;
10406 break;
f8df10f4 10407
39623e12
PB		 10408 default:
10409 if (howto->rightshift
10410 || (howto->src_mask & (howto->src_mask + 1)))
10411 {
10412 (*_bfd_error_handler)
10413 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10414 input_bfd, input_section,
10415 (long) rel->r_offset, howto->name);
10416 return FALSE;
10417 }
10418
10419 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10420
10421 /* Get the (signed) value from the instruction. */
10422 addend = value & howto->src_mask;
10423 if (addend & ((howto->src_mask + 1) >> 1))
10424 {
10425 bfd_signed_vma mask;
10426
10427 mask = -1;
10428 mask &= ~ howto->src_mask;
10429 addend |= mask;
10430 }
10431 break;
4e7fd91e 10432 }
39623e12 10433
4e7fd91e
PB		 10434 msec = sec;
10435 addend =
10436 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10437 - relocation;
10438 addend += msec->output_section->vma + msec->output_offset;
39623e12 10439
cc643b88 10440 /* Cases here must match those in the preceding
39623e12
PB		 10441 switch statement. */
10442 switch (r_type)
10443 {
10444 case R_ARM_MOVW_ABS_NC:
10445 case R_ARM_MOVT_ABS:
10446 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10447 | (addend & 0xfff);
10448 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10449 break;
10450
10451 case R_ARM_THM_MOVW_ABS_NC:
10452 case R_ARM_THM_MOVT_ABS:
10453 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10454 | (addend & 0xff) | ((addend & 0x0800) << 15);
10455 bfd_put_16 (input_bfd, value >> 16,
10456 contents + rel->r_offset);
10457 bfd_put_16 (input_bfd, value,
10458 contents + rel->r_offset + 2);
10459 break;
10460
10461 default:
10462 value = (value & ~ howto->dst_mask)
10463 | (addend & howto->dst_mask);
10464 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10465 break;
10466 }
f8df10f4 10467 }
f8df10f4 10468 }
4e7fd91e
PB		 10469 else
10470 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10471 }
10472 else
10473 {
560e09e9 10474 bfd_boolean warned;
560e09e9 10475
b2a8e766
AM		 10476 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10477 r_symndx, symtab_hdr, sym_hashes,
10478 h, sec, relocation,
10479 unresolved_reloc, warned);
ba93b8ac
DJ		 10480
10481 sym_type = h->type;
252b5132
RH		 10482 }
10483
dbaa2011 10484 if (sec != NULL && discarded_section (sec))
e4067dbb
DJ		 10485 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10486 rel, relend, howto, contents);
ab96bf03
AM		 10487
10488 if (info->relocatable)
10489 {
10490 /* This is a relocatable link. We don't have to change
10491 anything, unless the reloc is against a section symbol,
10492 in which case we have to adjust according to where the
10493 section symbol winds up in the output section. */
10494 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10495 {
10496 if (globals->use_rel)
10497 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10498 howto, (bfd_signed_vma) sec->output_offset);
10499 else
10500 rel->r_addend += sec->output_offset;
10501 }
10502 continue;
10503 }
10504
252b5132
RH		 10505 if (h != NULL)
10506 name = h->root.root.string;
10507 else
10508 {
10509 name = (bfd_elf_string_from_elf_section
10510 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10511 if (name == NULL || *name == '\0')
10512 name = bfd_section_name (input_bfd, sec);
10513 }
f21f3fe0 10514
cf35638d 10515 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10516 && r_type != R_ARM_NONE
10517 && (h == NULL
10518 || h->root.type == bfd_link_hash_defined
10519 || h->root.type == bfd_link_hash_defweak)
10520 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10521 {
10522 (*_bfd_error_handler)
10523 ((sym_type == STT_TLS
10524 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10525 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10526 input_bfd,
10527 input_section,
10528 (long) rel->r_offset,
10529 howto->name,
10530 name);
10531 }
10532
0855e32b
NS		 10533 /* We call elf32_arm_final_link_relocate unless we're completely
10534 done, i.e., the relaxation produced the final output we want,
10535 and we won't let anybody mess with it. Also, we have to do
10536 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10537 both in relaxed and non-relaxed cases */
10538 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10539 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10540 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10541 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10542 & GOT_TLS_GDESC)))
10543 {
10544 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10545 contents, rel, h == NULL);
10546 /* This may have been marked unresolved because it came from
10547 a shared library. But we've just dealt with that. */
10548 unresolved_reloc = 0;
10549 }
10550 else
10551 r = bfd_reloc_continue;
b38cadfb 10552
0855e32b
NS		 10553 if (r == bfd_reloc_continue)
10554 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10555 input_section, contents, rel,
34e77a92 10556 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10557 (h ? h->target_internal
10558 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10559 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10560
10561 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10562 because such sections are not SEC_ALLOC and thus ld.so will
10563 not process them. */
10564 if (unresolved_reloc
10565 && !((input_section->flags & SEC_DEBUGGING) != 0
1d5316ab
AM		 10566 && h->def_dynamic)
10567 && _bfd_elf_section_offset (output_bfd, info, input_section,
10568 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10569 {
10570 (*_bfd_error_handler)
843fe662
L		 10571 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10572 input_bfd,
10573 input_section,
10574 (long) rel->r_offset,
10575 howto->name,
10576 h->root.root.string);
0945cdfd
DJ		 10577 return FALSE;
10578 }
252b5132
RH		 10579
10580 if (r != bfd_reloc_ok)
10581 {
252b5132
RH		 10582 switch (r)
10583 {
10584 case bfd_reloc_overflow:
cf919dfd
PB		 10585 /* If the overflowing reloc was to an undefined symbol,
10586 we have already printed one error message and there
10587 is no point complaining again. */
10588 if ((! h ||
10589 h->root.type != bfd_link_hash_undefined)
10590 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10591 (info, (h ? &h->root : NULL), name, howto->name,
10592 (bfd_vma) 0, input_bfd, input_section,
10593 rel->r_offset))))
b34976b6 10594 return FALSE;
252b5132
RH		 10595 break;
10596
10597 case bfd_reloc_undefined:
10598 if (!((*info->callbacks->undefined_symbol)
10599 (info, name, input_bfd, input_section,
b34976b6
AM		 10600 rel->r_offset, TRUE)))
10601 return FALSE;
252b5132
RH		 10602 break;
10603
10604 case bfd_reloc_outofrange:
f2a9dd69 10605 error_message = _("out of range");
252b5132
RH		 10606 goto common_error;
10607
10608 case bfd_reloc_notsupported:
f2a9dd69 10609 error_message = _("unsupported relocation");
252b5132
RH		 10610 goto common_error;
10611
10612 case bfd_reloc_dangerous:
f2a9dd69 10613 /* error_message should already be set. */
252b5132
RH		 10614 goto common_error;
10615
10616 default:
f2a9dd69 10617 error_message = _("unknown error");
8029a119 10618 /* Fall through. */
252b5132
RH		 10619
10620 common_error:
f2a9dd69
DJ		 10621 BFD_ASSERT (error_message != NULL);
10622 if (!((*info->callbacks->reloc_dangerous)
10623 (info, error_message, input_bfd, input_section,
252b5132 10624 rel->r_offset)))
b34976b6 10625 return FALSE;
252b5132
RH		 10626 break;
10627 }
10628 }
10629 }
10630
b34976b6 10631 return TRUE;
252b5132
RH		 10632}
10633
91d6fa6a 10634/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10635 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10636 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10637 maintaining that condition). */
10638
10639static void
10640add_unwind_table_edit (arm_unwind_table_edit **head,
10641 arm_unwind_table_edit **tail,
10642 arm_unwind_edit_type type,
10643 asection *linked_section,
91d6fa6a 10644 unsigned int tindex)
2468f9c9 10645{
21d799b5
NC		 10646 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10647 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10648
2468f9c9
PB		 10649 new_edit->type = type;
10650 new_edit->linked_section = linked_section;
91d6fa6a 10651 new_edit->index = tindex;
b38cadfb 10652
91d6fa6a 10653 if (tindex > 0)
2468f9c9
PB		 10654 {
10655 new_edit->next = NULL;
10656
10657 if (*tail)
10658 (*tail)->next = new_edit;
10659
10660 (*tail) = new_edit;
10661
10662 if (!*head)
10663 (*head) = new_edit;
10664 }
10665 else
10666 {
10667 new_edit->next = *head;
10668
10669 if (!*tail)
10670 *tail = new_edit;
10671
10672 *head = new_edit;
10673 }
10674}
10675
10676static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10677
10678/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10679static void
10680adjust_exidx_size(asection *exidx_sec, int adjust)
10681{
10682 asection *out_sec;
10683
10684 if (!exidx_sec->rawsize)
10685 exidx_sec->rawsize = exidx_sec->size;
10686
10687 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10688 out_sec = exidx_sec->output_section;
10689 /* Adjust size of output section. */
10690 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10691}
10692
10693/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10694static void
10695insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10696{
10697 struct _arm_elf_section_data *exidx_arm_data;
10698
10699 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10700 add_unwind_table_edit (
10701 &exidx_arm_data->u.exidx.unwind_edit_list,
10702 &exidx_arm_data->u.exidx.unwind_edit_tail,
10703 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10704
10705 adjust_exidx_size(exidx_sec, 8);
10706}
10707
10708/* Scan .ARM.exidx tables, and create a list describing edits which should be
10709 made to those tables, such that:
b38cadfb 10710
2468f9c9
PB		 10711 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10712 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10713 codes which have been inlined into the index).
10714
85fdf906
AH		 10715 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10716
2468f9c9 10717 The edits are applied when the tables are written
b38cadfb 10718 (in elf32_arm_write_section). */
2468f9c9
PB		 10719
10720bfd_boolean
10721elf32_arm_fix_exidx_coverage (asection **text_section_order,
10722 unsigned int num_text_sections,
85fdf906
AH		 10723 struct bfd_link_info *info,
10724 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10725{
10726 bfd *inp;
10727 unsigned int last_second_word = 0, i;
10728 asection *last_exidx_sec = NULL;
10729 asection *last_text_sec = NULL;
10730 int last_unwind_type = -1;
10731
10732 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10733 text sections. */
10734 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10735 {
10736 asection *sec;
b38cadfb 10737
2468f9c9
PB		 10738 for (sec = inp->sections; sec != NULL; sec = sec->next)
10739 {
10740 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10741 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10742
dec9d5df 10743 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10744 continue;
b38cadfb 10745
2468f9c9
PB		 10746 if (elf_sec->linked_to)
10747 {
10748 Elf_Internal_Shdr *linked_hdr
10749 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10750 struct _arm_elf_section_data *linked_sec_arm_data
10751 = get_arm_elf_section_data (linked_hdr->bfd_section);
10752
10753 if (linked_sec_arm_data == NULL)
10754 continue;
10755
10756 /* Link this .ARM.exidx section back from the text section it
10757 describes. */
10758 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10759 }
10760 }
10761 }
10762
10763 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10764 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10765 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10766
10767 for (i = 0; i < num_text_sections; i++)
10768 {
10769 asection *sec = text_section_order[i];
10770 asection *exidx_sec;
10771 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10772 struct _arm_elf_section_data *exidx_arm_data;
10773 bfd_byte *contents = NULL;
10774 int deleted_exidx_bytes = 0;
10775 bfd_vma j;
10776 arm_unwind_table_edit *unwind_edit_head = NULL;
10777 arm_unwind_table_edit *unwind_edit_tail = NULL;
10778 Elf_Internal_Shdr *hdr;
10779 bfd *ibfd;
10780
10781 if (arm_data == NULL)
10782 continue;
10783
10784 exidx_sec = arm_data->u.text.arm_exidx_sec;
10785 if (exidx_sec == NULL)
10786 {
10787 /* Section has no unwind data. */
10788 if (last_unwind_type == 0 || !last_exidx_sec)
10789 continue;
10790
10791 /* Ignore zero sized sections. */
10792 if (sec->size == 0)
10793 continue;
10794
10795 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10796 last_unwind_type = 0;
10797 continue;
10798 }
10799
22a8f80e
PB		 10800 /* Skip /DISCARD/ sections. */
10801 if (bfd_is_abs_section (exidx_sec->output_section))
10802 continue;
10803
2468f9c9
PB		 10804 hdr = &elf_section_data (exidx_sec)->this_hdr;
10805 if (hdr->sh_type != SHT_ARM_EXIDX)
10806 continue;
b38cadfb 10807
2468f9c9
PB		 10808 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10809 if (exidx_arm_data == NULL)
10810 continue;
b38cadfb 10811
2468f9c9 10812 ibfd = exidx_sec->owner;
b38cadfb 10813
2468f9c9
PB		 10814 if (hdr->contents != NULL)
10815 contents = hdr->contents;
10816 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10817 /* An error? */
10818 continue;
10819
10820 for (j = 0; j < hdr->sh_size; j += 8)
10821 {
10822 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10823 int unwind_type;
10824 int elide = 0;
10825
10826 /* An EXIDX_CANTUNWIND entry. */
10827 if (second_word == 1)
10828 {
10829 if (last_unwind_type == 0)
10830 elide = 1;
10831 unwind_type = 0;
10832 }
10833 /* Inlined unwinding data. Merge if equal to previous. */
10834 else if ((second_word & 0x80000000) != 0)
10835 {
85fdf906
AH		 10836 if (merge_exidx_entries
10837 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10838 elide = 1;
10839 unwind_type = 1;
10840 last_second_word = second_word;
10841 }
10842 /* Normal table entry. In theory we could merge these too,
10843 but duplicate entries are likely to be much less common. */
10844 else
10845 unwind_type = 2;
10846
10847 if (elide)
10848 {
10849 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10850 DELETE_EXIDX_ENTRY, NULL, j / 8);
10851
10852 deleted_exidx_bytes += 8;
10853 }
10854
10855 last_unwind_type = unwind_type;
10856 }
10857
10858 /* Free contents if we allocated it ourselves. */
10859 if (contents != hdr->contents)
10860 free (contents);
10861
10862 /* Record edits to be applied later (in elf32_arm_write_section). */
10863 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10864 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 10865
2468f9c9
PB		 10866 if (deleted_exidx_bytes > 0)
10867 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10868
10869 last_exidx_sec = exidx_sec;
10870 last_text_sec = sec;
10871 }
10872
10873 /* Add terminating CANTUNWIND entry. */
10874 if (last_exidx_sec && last_unwind_type != 0)
10875 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10876
10877 return TRUE;
10878}
10879
3e6b1042
DJ		 10880static bfd_boolean
10881elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10882 bfd *ibfd, const char *name)
10883{
10884 asection *sec, *osec;
10885
10886 sec = bfd_get_section_by_name (ibfd, name);
10887 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10888 return TRUE;
10889
10890 osec = sec->output_section;
10891 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10892 return TRUE;
10893
10894 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10895 sec->output_offset, sec->size))
10896 return FALSE;
10897
10898 return TRUE;
10899}
10900
10901static bfd_boolean
10902elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10903{
10904 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10905 asection *sec, *osec;
3e6b1042 10906
4dfe6ac6
NC		 10907 if (globals == NULL)
10908 return FALSE;
10909
3e6b1042
DJ		 10910 /* Invoke the regular ELF backend linker to do all the work. */
10911 if (!bfd_elf_final_link (abfd, info))
10912 return FALSE;
10913
fe33d2fa
CL		 10914 /* Process stub sections (eg BE8 encoding, ...). */
10915 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10916 int i;
cdb21a0a
NS		 10917 for (i=0; i<htab->top_id; i++)
10918 {
10919 sec = htab->stub_group[i].stub_sec;
10920 /* Only process it once, in its link_sec slot. */
10921 if (sec && i == htab->stub_group[i].link_sec->id)
10922 {
10923 osec = sec->output_section;
10924 elf32_arm_write_section (abfd, info, sec, sec->contents);
10925 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10926 sec->output_offset, sec->size))
10927 return FALSE;
10928 }
fe33d2fa 10929 }
fe33d2fa 10930
3e6b1042
DJ		 10931 /* Write out any glue sections now that we have created all the
10932 stubs. */
10933 if (globals->bfd_of_glue_owner != NULL)
10934 {
10935 if (! elf32_arm_output_glue_section (info, abfd,
10936 globals->bfd_of_glue_owner,
10937 ARM2THUMB_GLUE_SECTION_NAME))
10938 return FALSE;
10939
10940 if (! elf32_arm_output_glue_section (info, abfd,
10941 globals->bfd_of_glue_owner,
10942 THUMB2ARM_GLUE_SECTION_NAME))
10943 return FALSE;
10944
10945 if (! elf32_arm_output_glue_section (info, abfd,
10946 globals->bfd_of_glue_owner,
10947 VFP11_ERRATUM_VENEER_SECTION_NAME))
10948 return FALSE;
10949
10950 if (! elf32_arm_output_glue_section (info, abfd,
10951 globals->bfd_of_glue_owner,
10952 ARM_BX_GLUE_SECTION_NAME))
10953 return FALSE;
10954 }
10955
10956 return TRUE;
10957}
10958
c178919b
NC		 10959/* Set the right machine number. */
10960
10961static bfd_boolean
57e8b36a 10962elf32_arm_object_p (bfd *abfd)
c178919b 10963{
5a6c6817 10964 unsigned int mach;
57e8b36a 10965
5a6c6817 10966 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 10967
5a6c6817
NC		 10968 if (mach != bfd_mach_arm_unknown)
10969 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10970
10971 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10972 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 10973
e16bb312 10974 else
5a6c6817 10975 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 10976
10977 return TRUE;
10978}
10979
fc830a83 10980/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 10981
b34976b6 10982static bfd_boolean
57e8b36a 10983elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 10984{
10985 if (elf_flags_init (abfd)
10986 && elf_elfheader (abfd)->e_flags != flags)
10987 {
fc830a83
NC		 10988 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10989 {
fd2ec330 10990 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 10991 (*_bfd_error_handler)
10992 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10993 abfd);
fc830a83 10994 else
d003868e
AM		 10995 _bfd_error_handler
10996 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10997 abfd);
fc830a83 10998 }
252b5132
RH		 10999 }
11000 else
11001 {
11002 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11003 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11004 }
11005
b34976b6 11006 return TRUE;
252b5132
RH		 11007}
11008
fc830a83 11009/* Copy backend specific data from one object module to another. */
9b485d32 11010
b34976b6 11011static bfd_boolean
57e8b36a 11012elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11013{
11014 flagword in_flags;
11015 flagword out_flags;
11016
0ffa91dd 11017 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11018 return TRUE;
252b5132 11019
fc830a83 11020 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11021 out_flags = elf_elfheader (obfd)->e_flags;
11022
fc830a83
NC		 11023 if (elf_flags_init (obfd)
11024 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11025 && in_flags != out_flags)
252b5132 11026 {
252b5132 11027 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11028 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11029 return FALSE;
252b5132
RH		 11030
11031 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11032 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11033 return FALSE;
252b5132
RH		 11034
11035 /* If the src and dest have different interworking flags
11036 then turn off the interworking bit. */
fd2ec330 11037 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11038 {
fd2ec330 11039 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11040 _bfd_error_handler
11041 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11042 obfd, ibfd);
252b5132 11043
fd2ec330 11044 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11045 }
1006ba19
PB		 11046
11047 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11048 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11049 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11050 }
11051
11052 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11053 elf_flags_init (obfd) = TRUE;
252b5132 11054
94a3258f
PB		 11055 /* Also copy the EI_OSABI field. */
11056 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11057 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11058
104d59d1
JM		 11059 /* Copy object attributes. */
11060 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 11061
11062 return TRUE;
11063}
11064
11065/* Values for Tag_ABI_PCS_R9_use. */
11066enum
11067{
11068 AEABI_R9_V6,
11069 AEABI_R9_SB,
11070 AEABI_R9_TLS,
11071 AEABI_R9_unused
11072};
11073
11074/* Values for Tag_ABI_PCS_RW_data. */
11075enum
11076{
11077 AEABI_PCS_RW_data_absolute,
11078 AEABI_PCS_RW_data_PCrel,
11079 AEABI_PCS_RW_data_SBrel,
11080 AEABI_PCS_RW_data_unused
11081};
11082
11083/* Values for Tag_ABI_enum_size. */
11084enum
11085{
11086 AEABI_enum_unused,
11087 AEABI_enum_short,
11088 AEABI_enum_wide,
11089 AEABI_enum_forced_wide
11090};
11091
104d59d1
JM		 11092/* Determine whether an object attribute tag takes an integer, a
11093 string or both. */
906e58ca 11094
104d59d1
JM		 11095static int
11096elf32_arm_obj_attrs_arg_type (int tag)
11097{
11098 if (tag == Tag_compatibility)
3483fe2e 11099 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11100 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11101 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11102 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11103 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11104 else if (tag < 32)
3483fe2e 11105 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11106 else
3483fe2e 11107 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11108}
11109
5aa6ff7c
AS		 11110/* The ABI defines that Tag_conformance should be emitted first, and that
11111 Tag_nodefaults should be second (if either is defined). This sets those
11112 two positions, and bumps up the position of all the remaining tags to
11113 compensate. */
11114static int
11115elf32_arm_obj_attrs_order (int num)
11116{
3de4a297 11117 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11118 return Tag_conformance;
3de4a297 11119 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11120 return Tag_nodefaults;
11121 if ((num - 2) < Tag_nodefaults)
11122 return num - 2;
11123 if ((num - 1) < Tag_conformance)
11124 return num - 1;
11125 return num;
11126}
11127
e8b36cd1
JM		 11128/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11129static bfd_boolean
11130elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11131{
11132 if ((tag & 127) < 64)
11133 {
11134 _bfd_error_handler
11135 (_("%B: Unknown mandatory EABI object attribute %d"),
11136 abfd, tag);
11137 bfd_set_error (bfd_error_bad_value);
11138 return FALSE;
11139 }
11140 else
11141 {
11142 _bfd_error_handler
11143 (_("Warning: %B: Unknown EABI object attribute %d"),
11144 abfd, tag);
11145 return TRUE;
11146 }
11147}
11148
91e22acd
AS		 11149/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11150 Returns -1 if no architecture could be read. */
11151
11152static int
11153get_secondary_compatible_arch (bfd *abfd)
11154{
11155 obj_attribute *attr =
11156 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11157
11158 /* Note: the tag and its argument below are uleb128 values, though
11159 currently-defined values fit in one byte for each. */
11160 if (attr->s
11161 && attr->s[0] == Tag_CPU_arch
11162 && (attr->s[1] & 128) != 128
11163 && attr->s[2] == 0)
11164 return attr->s[1];
11165
11166 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11167 return -1;
11168}
11169
11170/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11171 The tag is removed if ARCH is -1. */
11172
8e79c3df 11173static void
91e22acd 11174set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11175{
91e22acd
AS		 11176 obj_attribute *attr =
11177 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11178
91e22acd
AS		 11179 if (arch == -1)
11180 {
11181 attr->s = NULL;
11182 return;
8e79c3df 11183 }
91e22acd
AS		 11184
11185 /* Note: the tag and its argument below are uleb128 values, though
11186 currently-defined values fit in one byte for each. */
11187 if (!attr->s)
21d799b5 11188 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11189 attr->s[0] = Tag_CPU_arch;
11190 attr->s[1] = arch;
11191 attr->s[2] = '\0';
8e79c3df
CM		 11192}
11193
91e22acd
AS		 11194/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11195 into account. */
11196
11197static int
11198tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11199 int newtag, int secondary_compat)
8e79c3df 11200{
91e22acd
AS		 11201#define T(X) TAG_CPU_ARCH_##X
11202 int tagl, tagh, result;
11203 const int v6t2[] =
11204 {
11205 T(V6T2), /* PRE_V4. */
11206 T(V6T2), /* V4. */
11207 T(V6T2), /* V4T. */
11208 T(V6T2), /* V5T. */
11209 T(V6T2), /* V5TE. */
11210 T(V6T2), /* V5TEJ. */
11211 T(V6T2), /* V6. */
11212 T(V7), /* V6KZ. */
11213 T(V6T2) /* V6T2. */
11214 };
11215 const int v6k[] =
11216 {
11217 T(V6K), /* PRE_V4. */
11218 T(V6K), /* V4. */
11219 T(V6K), /* V4T. */
11220 T(V6K), /* V5T. */
11221 T(V6K), /* V5TE. */
11222 T(V6K), /* V5TEJ. */
11223 T(V6K), /* V6. */
11224 T(V6KZ), /* V6KZ. */
11225 T(V7), /* V6T2. */
11226 T(V6K) /* V6K. */
11227 };
11228 const int v7[] =
11229 {
11230 T(V7), /* PRE_V4. */
11231 T(V7), /* V4. */
11232 T(V7), /* V4T. */
11233 T(V7), /* V5T. */
11234 T(V7), /* V5TE. */
11235 T(V7), /* V5TEJ. */
11236 T(V7), /* V6. */
11237 T(V7), /* V6KZ. */
11238 T(V7), /* V6T2. */
11239 T(V7), /* V6K. */
11240 T(V7) /* V7. */
11241 };
11242 const int v6_m[] =
11243 {
11244 -1, /* PRE_V4. */
11245 -1, /* V4. */
11246 T(V6K), /* V4T. */
11247 T(V6K), /* V5T. */
11248 T(V6K), /* V5TE. */
11249 T(V6K), /* V5TEJ. */
11250 T(V6K), /* V6. */
11251 T(V6KZ), /* V6KZ. */
11252 T(V7), /* V6T2. */
11253 T(V6K), /* V6K. */
11254 T(V7), /* V7. */
11255 T(V6_M) /* V6_M. */
11256 };
11257 const int v6s_m[] =
11258 {
11259 -1, /* PRE_V4. */
11260 -1, /* V4. */
11261 T(V6K), /* V4T. */
11262 T(V6K), /* V5T. */
11263 T(V6K), /* V5TE. */
11264 T(V6K), /* V5TEJ. */
11265 T(V6K), /* V6. */
11266 T(V6KZ), /* V6KZ. */
11267 T(V7), /* V6T2. */
11268 T(V6K), /* V6K. */
11269 T(V7), /* V7. */
11270 T(V6S_M), /* V6_M. */
11271 T(V6S_M) /* V6S_M. */
11272 };
9e3c6df6
PB		 11273 const int v7e_m[] =
11274 {
11275 -1, /* PRE_V4. */
11276 -1, /* V4. */
11277 T(V7E_M), /* V4T. */
11278 T(V7E_M), /* V5T. */
11279 T(V7E_M), /* V5TE. */
11280 T(V7E_M), /* V5TEJ. */
11281 T(V7E_M), /* V6. */
11282 T(V7E_M), /* V6KZ. */
11283 T(V7E_M), /* V6T2. */
11284 T(V7E_M), /* V6K. */
11285 T(V7E_M), /* V7. */
11286 T(V7E_M), /* V6_M. */
11287 T(V7E_M), /* V6S_M. */
11288 T(V7E_M) /* V7E_M. */
11289 };
91e22acd
AS		 11290 const int v4t_plus_v6_m[] =
11291 {
11292 -1, /* PRE_V4. */
11293 -1, /* V4. */
11294 T(V4T), /* V4T. */
11295 T(V5T), /* V5T. */
11296 T(V5TE), /* V5TE. */
11297 T(V5TEJ), /* V5TEJ. */
11298 T(V6), /* V6. */
11299 T(V6KZ), /* V6KZ. */
11300 T(V6T2), /* V6T2. */
11301 T(V6K), /* V6K. */
11302 T(V7), /* V7. */
11303 T(V6_M), /* V6_M. */
11304 T(V6S_M), /* V6S_M. */
9e3c6df6 11305 T(V7E_M), /* V7E_M. */
91e22acd
AS		 11306 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11307 };
11308 const int *comb[] =
11309 {
11310 v6t2,
11311 v6k,
11312 v7,
11313 v6_m,
11314 v6s_m,
9e3c6df6 11315 v7e_m,
91e22acd
AS		 11316 /* Pseudo-architecture. */
11317 v4t_plus_v6_m
11318 };
11319
11320 /* Check we've not got a higher architecture than we know about. */
11321
9e3c6df6 11322 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11323 {
3895f852 11324 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11325 return -1;
11326 }
11327
11328 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11329
11330 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11331 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11332 oldtag = T(V4T_PLUS_V6_M);
11333
11334 /* And override the new tag if we have a Tag_also_compatible_with on the
11335 input. */
11336
11337 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11338 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11339 newtag = T(V4T_PLUS_V6_M);
11340
11341 tagl = (oldtag < newtag) ? oldtag : newtag;
11342 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11343
11344 /* Architectures before V6KZ add features monotonically. */
11345 if (tagh <= TAG_CPU_ARCH_V6KZ)
11346 return result;
11347
11348 result = comb[tagh - T(V6T2)][tagl];
11349
11350 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11351 as the canonical version. */
11352 if (result == T(V4T_PLUS_V6_M))
11353 {
11354 result = T(V4T);
11355 *secondary_compat_out = T(V6_M);
11356 }
11357 else
11358 *secondary_compat_out = -1;
11359
11360 if (result == -1)
11361 {
3895f852 11362 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11363 ibfd, oldtag, newtag);
11364 return -1;
11365 }
11366
11367 return result;
11368#undef T
8e79c3df
CM		 11369}
11370
ac56ee8f
MGD		 11371/* Query attributes object to see if integer divide instructions may be
11372 present in an object. */
11373static bfd_boolean
11374elf32_arm_attributes_accept_div (const obj_attribute *attr)
11375{
11376 int arch = attr[Tag_CPU_arch].i;
11377 int profile = attr[Tag_CPU_arch_profile].i;
11378
11379 switch (attr[Tag_DIV_use].i)
11380 {
11381 case 0:
11382 /* Integer divide allowed if instruction contained in archetecture. */
11383 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11384 return TRUE;
11385 else if (arch >= TAG_CPU_ARCH_V7E_M)
11386 return TRUE;
11387 else
11388 return FALSE;
11389
11390 case 1:
11391 /* Integer divide explicitly prohibited. */
11392 return FALSE;
11393
11394 default:
11395 /* Unrecognised case - treat as allowing divide everywhere. */
11396 case 2:
11397 /* Integer divide allowed in ARM state. */
11398 return TRUE;
11399 }
11400}
11401
11402/* Query attributes object to see if integer divide instructions are
11403 forbidden to be in the object. This is not the inverse of
11404 elf32_arm_attributes_accept_div. */
11405static bfd_boolean
11406elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11407{
11408 return attr[Tag_DIV_use].i == 1;
11409}
11410
ee065d83
PB		 11411/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11412 are conflicting attributes. */
906e58ca 11413
ee065d83
PB		 11414static bfd_boolean
11415elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11416{
104d59d1
JM		 11417 obj_attribute *in_attr;
11418 obj_attribute *out_attr;
ee065d83
PB		 11419 /* Some tags have 0 = don't care, 1 = strong requirement,
11420 2 = weak requirement. */
91e22acd 11421 static const int order_021[3] = {0, 2, 1};
ee065d83 11422 int i;
91e22acd 11423 bfd_boolean result = TRUE;
ee065d83 11424
3e6b1042
DJ		 11425 /* Skip the linker stubs file. This preserves previous behavior
11426 of accepting unknown attributes in the first input file - but
11427 is that a bug? */
11428 if (ibfd->flags & BFD_LINKER_CREATED)
11429 return TRUE;
11430
104d59d1 11431 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11432 {
11433 /* This is the first object. Copy the attributes. */
104d59d1 11434 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11435
cd21e546
MGD		 11436 out_attr = elf_known_obj_attributes_proc (obfd);
11437
004ae526
PB		 11438 /* Use the Tag_null value to indicate the attributes have been
11439 initialized. */
cd21e546 11440 out_attr[0].i = 1;
004ae526 11441
cd21e546
MGD		 11442 /* We do not output objects with Tag_MPextension_use_legacy - we move
11443 the attribute's value to Tag_MPextension_use. */
11444 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11445 {
11446 if (out_attr[Tag_MPextension_use].i != 0
11447 && out_attr[Tag_MPextension_use_legacy].i
11448 != out_attr[Tag_MPextension_use].i)
11449 {
11450 _bfd_error_handler
11451 (_("Error: %B has both the current and legacy "
11452 "Tag_MPextension_use attributes"), ibfd);
11453 result = FALSE;
11454 }
11455
11456 out_attr[Tag_MPextension_use] =
11457 out_attr[Tag_MPextension_use_legacy];
11458 out_attr[Tag_MPextension_use_legacy].type = 0;
11459 out_attr[Tag_MPextension_use_legacy].i = 0;
11460 }
11461
11462 return result;
ee065d83
PB		 11463 }
11464
104d59d1
JM		 11465 in_attr = elf_known_obj_attributes_proc (ibfd);
11466 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11467 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11468 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11469 {
8e79c3df 11470 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11471 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11472 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11473 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11474 {
11475 _bfd_error_handler
3895f852 11476 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11477 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11478 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11479 result = FALSE;
ee065d83
PB		 11480 }
11481 }
11482
3de4a297 11483 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11484 {
11485 /* Merge this attribute with existing attributes. */
11486 switch (i)
11487 {
11488 case Tag_CPU_raw_name:
11489 case Tag_CPU_name:
91e22acd 11490 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11491 break;
11492
11493 case Tag_ABI_optimization_goals:
11494 case Tag_ABI_FP_optimization_goals:
11495 /* Use the first value seen. */
11496 break;
11497
11498 case Tag_CPU_arch:
91e22acd
AS		 11499 {
11500 int secondary_compat = -1, secondary_compat_out = -1;
11501 unsigned int saved_out_attr = out_attr[i].i;
11502 static const char *name_table[] = {
11503 /* These aren't real CPU names, but we can't guess
11504 that from the architecture version alone. */
11505 "Pre v4",
11506 "ARM v4",
11507 "ARM v4T",
11508 "ARM v5T",
11509 "ARM v5TE",
11510 "ARM v5TEJ",
11511 "ARM v6",
11512 "ARM v6KZ",
11513 "ARM v6T2",
11514 "ARM v6K",
11515 "ARM v7",
11516 "ARM v6-M",
11517 "ARM v6S-M"
11518 };
11519
11520 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11521 secondary_compat = get_secondary_compatible_arch (ibfd);
11522 secondary_compat_out = get_secondary_compatible_arch (obfd);
11523 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11524 &secondary_compat_out,
11525 in_attr[i].i,
11526 secondary_compat);
11527 set_secondary_compatible_arch (obfd, secondary_compat_out);
11528
11529 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11530 if (out_attr[i].i == saved_out_attr)
11531 ; /* Leave the names alone. */
11532 else if (out_attr[i].i == in_attr[i].i)
11533 {
11534 /* The output architecture has been changed to match the
11535 input architecture. Use the input names. */
11536 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11537 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11538 : NULL;
11539 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11540 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11541 : NULL;
11542 }
11543 else
11544 {
11545 out_attr[Tag_CPU_name].s = NULL;
11546 out_attr[Tag_CPU_raw_name].s = NULL;
11547 }
11548
11549 /* If we still don't have a value for Tag_CPU_name,
11550 make one up now. Tag_CPU_raw_name remains blank. */
11551 if (out_attr[Tag_CPU_name].s == NULL
11552 && out_attr[i].i < ARRAY_SIZE (name_table))
11553 out_attr[Tag_CPU_name].s =
11554 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11555 }
11556 break;
11557
ee065d83
PB		 11558 case Tag_ARM_ISA_use:
11559 case Tag_THUMB_ISA_use:
ee065d83 11560 case Tag_WMMX_arch:
91e22acd
AS		 11561 case Tag_Advanced_SIMD_arch:
11562 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11563 case Tag_ABI_FP_rounding:
ee065d83
PB		 11564 case Tag_ABI_FP_exceptions:
11565 case Tag_ABI_FP_user_exceptions:
11566 case Tag_ABI_FP_number_model:
75375b3e 11567 case Tag_FP_HP_extension:
91e22acd
AS		 11568 case Tag_CPU_unaligned_access:
11569 case Tag_T2EE_use:
91e22acd 11570 case Tag_MPextension_use:
ee065d83
PB		 11571 /* Use the largest value specified. */
11572 if (in_attr[i].i > out_attr[i].i)
11573 out_attr[i].i = in_attr[i].i;
11574 break;
11575
75375b3e 11576 case Tag_ABI_align_preserved:
91e22acd
AS		 11577 case Tag_ABI_PCS_RO_data:
11578 /* Use the smallest value specified. */
11579 if (in_attr[i].i < out_attr[i].i)
11580 out_attr[i].i = in_attr[i].i;
11581 break;
11582
75375b3e 11583 case Tag_ABI_align_needed:
91e22acd 11584 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11585 && (in_attr[Tag_ABI_align_preserved].i == 0
11586 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11587 {
91e22acd
AS		 11588 /* This error message should be enabled once all non-conformant
11589 binaries in the toolchain have had the attributes set
11590 properly.
ee065d83 11591 _bfd_error_handler
3895f852 11592 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11593 obfd, ibfd);
11594 result = FALSE; */
ee065d83 11595 }
91e22acd
AS		 11596 /* Fall through. */
11597 case Tag_ABI_FP_denormal:
11598 case Tag_ABI_PCS_GOT_use:
11599 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11600 value if greater than 2 (for future-proofing). */
11601 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11602 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11603 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11604 out_attr[i].i = in_attr[i].i;
11605 break;
91e22acd 11606
75375b3e
MGD		 11607 case Tag_Virtualization_use:
11608 /* The virtualization tag effectively stores two bits of
11609 information: the intended use of TrustZone (in bit 0), and the
11610 intended use of Virtualization (in bit 1). */
11611 if (out_attr[i].i == 0)
11612 out_attr[i].i = in_attr[i].i;
11613 else if (in_attr[i].i != 0
11614 && in_attr[i].i != out_attr[i].i)
11615 {
11616 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11617 out_attr[i].i = 3;
11618 else
11619 {
11620 _bfd_error_handler
11621 (_("error: %B: unable to merge virtualization attributes "
11622 "with %B"),
11623 obfd, ibfd);
11624 result = FALSE;
11625 }
11626 }
11627 break;
91e22acd
AS		 11628
11629 case Tag_CPU_arch_profile:
11630 if (out_attr[i].i != in_attr[i].i)
11631 {
11632 /* 0 will merge with anything.
11633 'A' and 'S' merge to 'A'.
11634 'R' and 'S' merge to 'R'.
11635 'M' and 'A|R|S' is an error. */
11636 if (out_attr[i].i == 0
11637 || (out_attr[i].i == 'S'
11638 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11639 out_attr[i].i = in_attr[i].i;
11640 else if (in_attr[i].i == 0
11641 || (in_attr[i].i == 'S'
11642 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11643 ; /* Do nothing. */
11644 else
11645 {
11646 _bfd_error_handler
3895f852 11647 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11648 ibfd,
11649 in_attr[i].i ? in_attr[i].i : '0',
11650 out_attr[i].i ? out_attr[i].i : '0');
11651 result = FALSE;
11652 }
11653 }
11654 break;
75375b3e 11655 case Tag_FP_arch:
62f3b8c8 11656 {
4547cb56
NC		 11657 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11658 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11659 when it's 0. It might mean absence of FP hardware if
11660 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11661
62f3b8c8
PB		 11662 static const struct
11663 {
11664 int ver;
11665 int regs;
11666 } vfp_versions[7] =
11667 {
11668 {0, 0},
11669 {1, 16},
11670 {2, 16},
11671 {3, 32},
11672 {3, 16},
11673 {4, 32},
11674 {4, 16}
11675 };
11676 int ver;
11677 int regs;
11678 int newval;
11679
4547cb56
NC		 11680 /* If the output has no requirement about FP hardware,
11681 follow the requirement of the input. */
11682 if (out_attr[i].i == 0)
11683 {
11684 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11685 out_attr[i].i = in_attr[i].i;
11686 out_attr[Tag_ABI_HardFP_use].i
11687 = in_attr[Tag_ABI_HardFP_use].i;
11688 break;
11689 }
11690 /* If the input has no requirement about FP hardware, do
11691 nothing. */
11692 else if (in_attr[i].i == 0)
11693 {
11694 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11695 break;
11696 }
11697
11698 /* Both the input and the output have nonzero Tag_FP_arch.
11699 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11700
11701 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11702 do nothing. */
11703 if (in_attr[Tag_ABI_HardFP_use].i == 0
11704 && out_attr[Tag_ABI_HardFP_use].i == 0)
11705 ;
11706 /* If the input and the output have different Tag_ABI_HardFP_use,
11707 the combination of them is 3 (SP & DP). */
11708 else if (in_attr[Tag_ABI_HardFP_use].i
11709 != out_attr[Tag_ABI_HardFP_use].i)
11710 out_attr[Tag_ABI_HardFP_use].i = 3;
11711
11712 /* Now we can handle Tag_FP_arch. */
11713
62f3b8c8
PB		 11714 /* Values greater than 6 aren't defined, so just pick the
11715 biggest */
11716 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11717 {
11718 out_attr[i] = in_attr[i];
11719 break;
11720 }
11721 /* The output uses the superset of input features
11722 (ISA version) and registers. */
11723 ver = vfp_versions[in_attr[i].i].ver;
11724 if (ver < vfp_versions[out_attr[i].i].ver)
11725 ver = vfp_versions[out_attr[i].i].ver;
11726 regs = vfp_versions[in_attr[i].i].regs;
11727 if (regs < vfp_versions[out_attr[i].i].regs)
11728 regs = vfp_versions[out_attr[i].i].regs;
11729 /* This assumes all possible supersets are also a valid
11730 options. */
11731 for (newval = 6; newval > 0; newval--)
11732 {
11733 if (regs == vfp_versions[newval].regs
11734 && ver == vfp_versions[newval].ver)
11735 break;
11736 }
11737 out_attr[i].i = newval;
11738 }
b1cc4aeb 11739 break;
ee065d83
PB		 11740 case Tag_PCS_config:
11741 if (out_attr[i].i == 0)
11742 out_attr[i].i = in_attr[i].i;
b6009aca 11743 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11744 {
11745 /* It's sometimes ok to mix different configs, so this is only
11746 a warning. */
11747 _bfd_error_handler
11748 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11749 }
11750 break;
11751 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11752 if (in_attr[i].i != out_attr[i].i
11753 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11754 && in_attr[i].i != AEABI_R9_unused)
11755 {
11756 _bfd_error_handler
3895f852 11757 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11758 result = FALSE;
ee065d83
PB		 11759 }
11760 if (out_attr[i].i == AEABI_R9_unused)
11761 out_attr[i].i = in_attr[i].i;
11762 break;
11763 case Tag_ABI_PCS_RW_data:
11764 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11765 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11766 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11767 {
11768 _bfd_error_handler
3895f852 11769 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11770 ibfd);
91e22acd 11771 result = FALSE;
ee065d83
PB		 11772 }
11773 /* Use the smallest value specified. */
11774 if (in_attr[i].i < out_attr[i].i)
11775 out_attr[i].i = in_attr[i].i;
11776 break;
ee065d83 11777 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11778 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11779 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11780 {
11781 _bfd_error_handler
a9dc9481
JM		 11782 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11783 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11784 }
a9dc9481 11785 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11786 out_attr[i].i = in_attr[i].i;
11787 break;
ee065d83
PB		 11788 case Tag_ABI_enum_size:
11789 if (in_attr[i].i != AEABI_enum_unused)
11790 {
11791 if (out_attr[i].i == AEABI_enum_unused
11792 || out_attr[i].i == AEABI_enum_forced_wide)
11793 {
11794 /* The existing object is compatible with anything.
11795 Use whatever requirements the new object has. */
11796 out_attr[i].i = in_attr[i].i;
11797 }
11798 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11799 && out_attr[i].i != in_attr[i].i
0ffa91dd 11800 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11801 {
91e22acd 11802 static const char *aeabi_enum_names[] =
bf21ed78 11803 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11804 const char *in_name =
11805 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11806 ? aeabi_enum_names[in_attr[i].i]
11807 : "<unknown>";
11808 const char *out_name =
11809 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11810 ? aeabi_enum_names[out_attr[i].i]
11811 : "<unknown>";
ee065d83 11812 _bfd_error_handler
bf21ed78 11813 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11814 ibfd, in_name, out_name);
ee065d83
PB		 11815 }
11816 }
11817 break;
11818 case Tag_ABI_VFP_args:
11819 /* Aready done. */
11820 break;
11821 case Tag_ABI_WMMX_args:
11822 if (in_attr[i].i != out_attr[i].i)
11823 {
11824 _bfd_error_handler
3895f852 11825 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11826 ibfd, obfd);
91e22acd 11827 result = FALSE;
ee065d83
PB		 11828 }
11829 break;
7b86a9fa
AS		 11830 case Tag_compatibility:
11831 /* Merged in target-independent code. */
11832 break;
91e22acd 11833 case Tag_ABI_HardFP_use:
4547cb56 11834 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11835 break;
11836 case Tag_ABI_FP_16bit_format:
11837 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11838 {
11839 if (in_attr[i].i != out_attr[i].i)
11840 {
11841 _bfd_error_handler
3895f852 11842 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11843 ibfd, obfd);
11844 result = FALSE;
11845 }
11846 }
11847 if (in_attr[i].i != 0)
11848 out_attr[i].i = in_attr[i].i;
11849 break;
7b86a9fa 11850
cd21e546 11851 case Tag_DIV_use:
ac56ee8f
MGD		 11852 /* A value of zero on input means that the divide instruction may
11853 be used if available in the base architecture as specified via
11854 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11855 the user did not want divide instructions. A value of 2
11856 explicitly means that divide instructions were allowed in ARM
11857 and Thumb state. */
11858 if (in_attr[i].i == out_attr[i].i)
11859 /* Do nothing. */ ;
11860 else if (elf32_arm_attributes_forbid_div (in_attr)
11861 && !elf32_arm_attributes_accept_div (out_attr))
11862 out_attr[i].i = 1;
11863 else if (elf32_arm_attributes_forbid_div (out_attr)
11864 && elf32_arm_attributes_accept_div (in_attr))
11865 out_attr[i].i = in_attr[i].i;
11866 else if (in_attr[i].i == 2)
11867 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 11868 break;
11869
11870 case Tag_MPextension_use_legacy:
11871 /* We don't output objects with Tag_MPextension_use_legacy - we
11872 move the value to Tag_MPextension_use. */
11873 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11874 {
11875 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11876 {
11877 _bfd_error_handler
11878 (_("%B has has both the current and legacy "
b38cadfb 11879 "Tag_MPextension_use attributes"),
cd21e546
MGD		 11880 ibfd);
11881 result = FALSE;
11882 }
11883 }
11884
11885 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11886 out_attr[Tag_MPextension_use] = in_attr[i];
11887
11888 break;
11889
91e22acd 11890 case Tag_nodefaults:
2d0bb761
AS		 11891 /* This tag is set if it exists, but the value is unused (and is
11892 typically zero). We don't actually need to do anything here -
11893 the merge happens automatically when the type flags are merged
11894 below. */
91e22acd
AS		 11895 break;
11896 case Tag_also_compatible_with:
11897 /* Already done in Tag_CPU_arch. */
11898 break;
11899 case Tag_conformance:
11900 /* Keep the attribute if it matches. Throw it away otherwise.
11901 No attribute means no claim to conform. */
11902 if (!in_attr[i].s || !out_attr[i].s
11903 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11904 out_attr[i].s = NULL;
11905 break;
3cfad14c 11906
91e22acd 11907 default:
e8b36cd1
JM		 11908 result
11909 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11910 }
11911
11912 /* If out_attr was copied from in_attr then it won't have a type yet. */
11913 if (in_attr[i].type && !out_attr[i].type)
11914 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11915 }
11916
104d59d1 11917 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11918 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11919 return FALSE;
ee065d83 11920
104d59d1 11921 /* Check for any attributes not known on ARM. */
e8b36cd1 11922 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11923
91e22acd 11924 return result;
252b5132
RH		 11925}
11926
3a4a14e9
PB		 11927
11928/* Return TRUE if the two EABI versions are incompatible. */
11929
11930static bfd_boolean
11931elf32_arm_versions_compatible (unsigned iver, unsigned over)
11932{
11933 /* v4 and v5 are the same spec before and after it was released,
11934 so allow mixing them. */
11935 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11936 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11937 return TRUE;
11938
11939 return (iver == over);
11940}
11941
252b5132
RH		 11942/* Merge backend specific data from an object file to the output
11943 object file when linking. */
9b485d32 11944
b34976b6 11945static bfd_boolean
21d799b5 11946elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 11947
9b485d32
NC		 11948/* Display the flags field. */
11949
b34976b6 11950static bfd_boolean
57e8b36a 11951elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 11952{
fc830a83
NC		 11953 FILE * file = (FILE *) ptr;
11954 unsigned long flags;
252b5132
RH		 11955
11956 BFD_ASSERT (abfd != NULL && ptr != NULL);
11957
11958 /* Print normal ELF private data. */
11959 _bfd_elf_print_private_bfd_data (abfd, ptr);
11960
fc830a83 11961 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 11962 /* Ignore init flag - it may not be set, despite the flags field
11963 containing valid data. */
252b5132
RH		 11964
11965 /* xgettext:c-format */
9b485d32 11966 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 11967
fc830a83
NC		 11968 switch (EF_ARM_EABI_VERSION (flags))
11969 {
11970 case EF_ARM_EABI_UNKNOWN:
4cc11e76 11971 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 11972 official ARM ELF extended ABI. Hence they are only decoded if
11973 the EABI version is not set. */
fd2ec330 11974 if (flags & EF_ARM_INTERWORK)
9b485d32 11975 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 11976
fd2ec330 11977 if (flags & EF_ARM_APCS_26)
6c571f00 11978 fprintf (file, " [APCS-26]");
fc830a83 11979 else
6c571f00 11980 fprintf (file, " [APCS-32]");
9a5aca8c 11981
96a846ea
RE		 11982 if (flags & EF_ARM_VFP_FLOAT)
11983 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 11984 else if (flags & EF_ARM_MAVERICK_FLOAT)
11985 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 11986 else
11987 fprintf (file, _(" [FPA float format]"));
11988
fd2ec330 11989 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 11990 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 11991
fd2ec330 11992 if (flags & EF_ARM_PIC)
9b485d32 11993 fprintf (file, _(" [position independent]"));
fc830a83 11994
fd2ec330 11995 if (flags & EF_ARM_NEW_ABI)
9b485d32 11996 fprintf (file, _(" [new ABI]"));
9a5aca8c 11997
fd2ec330 11998 if (flags & EF_ARM_OLD_ABI)
9b485d32 11999 fprintf (file, _(" [old ABI]"));
9a5aca8c 12000
fd2ec330 12001 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12002 fprintf (file, _(" [software FP]"));
9a5aca8c 12003
96a846ea
RE		 12004 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12005 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12006 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12007 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12008 break;
9a5aca8c 12009
fc830a83 12010 case EF_ARM_EABI_VER1:
9b485d32 12011 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12012
fc830a83 12013 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12014 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12015 else
9b485d32 12016 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12017
fc830a83
NC		 12018 flags &= ~ EF_ARM_SYMSARESORTED;
12019 break;
9a5aca8c 12020
fd2ec330
PB		 12021 case EF_ARM_EABI_VER2:
12022 fprintf (file, _(" [Version2 EABI]"));
12023
12024 if (flags & EF_ARM_SYMSARESORTED)
12025 fprintf (file, _(" [sorted symbol table]"));
12026 else
12027 fprintf (file, _(" [unsorted symbol table]"));
12028
12029 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12030 fprintf (file, _(" [dynamic symbols use segment index]"));
12031
12032 if (flags & EF_ARM_MAPSYMSFIRST)
12033 fprintf (file, _(" [mapping symbols precede others]"));
12034
99e4ae17 12035 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12036 | EF_ARM_MAPSYMSFIRST);
12037 break;
12038
d507cf36
PB		 12039 case EF_ARM_EABI_VER3:
12040 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12041 break;
12042
12043 case EF_ARM_EABI_VER4:
12044 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12045 goto eabi;
d507cf36 12046
3a4a14e9
PB		 12047 case EF_ARM_EABI_VER5:
12048 fprintf (file, _(" [Version5 EABI]"));
12049 eabi:
d507cf36
PB		 12050 if (flags & EF_ARM_BE8)
12051 fprintf (file, _(" [BE8]"));
12052
12053 if (flags & EF_ARM_LE8)
12054 fprintf (file, _(" [LE8]"));
12055
12056 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12057 break;
12058
fc830a83 12059 default:
9b485d32 12060 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12061 break;
12062 }
252b5132 12063
fc830a83 12064 flags &= ~ EF_ARM_EABIMASK;
252b5132 12065
fc830a83 12066 if (flags & EF_ARM_RELEXEC)
9b485d32 12067 fprintf (file, _(" [relocatable executable]"));
252b5132 12068
fc830a83 12069 if (flags & EF_ARM_HASENTRY)
9b485d32 12070 fprintf (file, _(" [has entry point]"));
252b5132 12071
fc830a83
NC		 12072 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12073
12074 if (flags)
9b485d32 12075 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12076
252b5132
RH		 12077 fputc ('\n', file);
12078
b34976b6 12079 return TRUE;
252b5132
RH		 12080}
12081
12082static int
57e8b36a 12083elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12084{
2f0ca46a
NC		 12085 switch (ELF_ST_TYPE (elf_sym->st_info))
12086 {
12087 case STT_ARM_TFUNC:
12088 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12089
2f0ca46a
NC		 12090 case STT_ARM_16BIT:
12091 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12092 This allows us to distinguish between data used by Thumb instructions
12093 and non-data (which is probably code) inside Thumb regions of an
12094 executable. */
1a0eb693 12095 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12096 return ELF_ST_TYPE (elf_sym->st_info);
12097 break;
9a5aca8c 12098
ce855c42
NC		 12099 default:
12100 break;
2f0ca46a
NC		 12101 }
12102
12103 return type;
252b5132 12104}
f21f3fe0 12105
252b5132 12106static asection *
07adf181
AM		 12107elf32_arm_gc_mark_hook (asection *sec,
12108 struct bfd_link_info *info,
12109 Elf_Internal_Rela *rel,
12110 struct elf_link_hash_entry *h,
12111 Elf_Internal_Sym *sym)
252b5132
RH		 12112{
12113 if (h != NULL)
07adf181 12114 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12115 {
12116 case R_ARM_GNU_VTINHERIT:
12117 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12118 return NULL;
12119 }
9ad5cbcf 12120
07adf181 12121 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12122}
12123
780a67af
NC		 12124/* Update the got entry reference counts for the section being removed. */
12125
b34976b6 12126static bfd_boolean
ba93b8ac
DJ		 12127elf32_arm_gc_sweep_hook (bfd * abfd,
12128 struct bfd_link_info * info,
12129 asection * sec,
12130 const Elf_Internal_Rela * relocs)
252b5132 12131{
5e681ec4
PB		 12132 Elf_Internal_Shdr *symtab_hdr;
12133 struct elf_link_hash_entry **sym_hashes;
12134 bfd_signed_vma *local_got_refcounts;
12135 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12136 struct elf32_arm_link_hash_table * globals;
12137
7dda2462
TG		 12138 if (info->relocatable)
12139 return TRUE;
12140
eb043451 12141 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12142 if (globals == NULL)
12143 return FALSE;
5e681ec4
PB		 12144
12145 elf_section_data (sec)->local_dynrel = NULL;
12146
0ffa91dd 12147 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12148 sym_hashes = elf_sym_hashes (abfd);
12149 local_got_refcounts = elf_local_got_refcounts (abfd);
12150
906e58ca 12151 check_use_blx (globals);
bd97cb95 12152
5e681ec4
PB		 12153 relend = relocs + sec->reloc_count;
12154 for (rel = relocs; rel < relend; rel++)
eb043451 12155 {
3eb128b2
AM		 12156 unsigned long r_symndx;
12157 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12158 struct elf32_arm_link_hash_entry *eh;
eb043451 12159 int r_type;
34e77a92 12160 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12161 bfd_boolean may_become_dynamic_p;
12162 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12163 union gotplt_union *root_plt;
12164 struct arm_plt_info *arm_plt;
5e681ec4 12165
3eb128b2
AM		 12166 r_symndx = ELF32_R_SYM (rel->r_info);
12167 if (r_symndx >= symtab_hdr->sh_info)
12168 {
12169 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12170 while (h->root.type == bfd_link_hash_indirect
12171 || h->root.type == bfd_link_hash_warning)
12172 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12173 }
f6e32f6d
RS		 12174 eh = (struct elf32_arm_link_hash_entry *) h;
12175
34e77a92 12176 call_reloc_p = FALSE;
f6e32f6d
RS		 12177 may_become_dynamic_p = FALSE;
12178 may_need_local_target_p = FALSE;
3eb128b2 12179
eb043451 12180 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12181 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12182 switch (r_type)
12183 {
12184 case R_ARM_GOT32:
eb043451 12185 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12186 case R_ARM_TLS_GD32:
12187 case R_ARM_TLS_IE32:
3eb128b2 12188 if (h != NULL)
eb043451 12189 {
eb043451
PB		 12190 if (h->got.refcount > 0)
12191 h->got.refcount -= 1;
12192 }
12193 else if (local_got_refcounts != NULL)
12194 {
12195 if (local_got_refcounts[r_symndx] > 0)
12196 local_got_refcounts[r_symndx] -= 1;
12197 }
12198 break;
12199
ba93b8ac 12200 case R_ARM_TLS_LDM32:
4dfe6ac6 12201 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12202 break;
12203
eb043451
PB		 12204 case R_ARM_PC24:
12205 case R_ARM_PLT32:
5b5bb741
PB		 12206 case R_ARM_CALL:
12207 case R_ARM_JUMP24:
eb043451 12208 case R_ARM_PREL31:
c19d1205 12209 case R_ARM_THM_CALL:
bd97cb95
DJ		 12210 case R_ARM_THM_JUMP24:
12211 case R_ARM_THM_JUMP19:
34e77a92 12212 call_reloc_p = TRUE;
f6e32f6d
RS		 12213 may_need_local_target_p = TRUE;
12214 break;
12215
12216 case R_ARM_ABS12:
12217 if (!globals->vxworks_p)
12218 {
12219 may_need_local_target_p = TRUE;
12220 break;
12221 }
12222 /* Fall through. */
12223 case R_ARM_ABS32:
12224 case R_ARM_ABS32_NOI:
12225 case R_ARM_REL32:
12226 case R_ARM_REL32_NOI:
b6895b4f
PB		 12227 case R_ARM_MOVW_ABS_NC:
12228 case R_ARM_MOVT_ABS:
12229 case R_ARM_MOVW_PREL_NC:
12230 case R_ARM_MOVT_PREL:
12231 case R_ARM_THM_MOVW_ABS_NC:
12232 case R_ARM_THM_MOVT_ABS:
12233 case R_ARM_THM_MOVW_PREL_NC:
12234 case R_ARM_THM_MOVT_PREL:
b7693d02 12235 /* Should the interworking branches be here also? */
f6e32f6d 12236 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12237 && (sec->flags & SEC_ALLOC) != 0)
12238 {
12239 if (h == NULL
12240 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12241 {
12242 call_reloc_p = TRUE;
12243 may_need_local_target_p = TRUE;
12244 }
12245 else
12246 may_become_dynamic_p = TRUE;
12247 }
f6e32f6d
RS		 12248 else
12249 may_need_local_target_p = TRUE;
12250 break;
b7693d02 12251
f6e32f6d
RS		 12252 default:
12253 break;
12254 }
5e681ec4 12255
34e77a92
RS		 12256 if (may_need_local_target_p
12257 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12258 {
27586251
HPN		 12259 /* If PLT refcount book-keeping is wrong and too low, we'll
12260 see a zero value (going to -1) for the root PLT reference
12261 count. */
12262 if (root_plt->refcount >= 0)
12263 {
12264 BFD_ASSERT (root_plt->refcount != 0);
12265 root_plt->refcount -= 1;
12266 }
12267 else
12268 /* A value of -1 means the symbol has become local, forced
12269 or seeing a hidden definition. Any other negative value
12270 is an error. */
12271 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12272
12273 if (!call_reloc_p)
12274 arm_plt->noncall_refcount--;
5e681ec4 12275
f6e32f6d 12276 if (r_type == R_ARM_THM_CALL)
34e77a92 12277 arm_plt->maybe_thumb_refcount--;
bd97cb95 12278
f6e32f6d
RS		 12279 if (r_type == R_ARM_THM_JUMP24
12280 || r_type == R_ARM_THM_JUMP19)
34e77a92 12281 arm_plt->thumb_refcount--;
f6e32f6d 12282 }
5e681ec4 12283
34e77a92 12284 if (may_become_dynamic_p)
f6e32f6d
RS		 12285 {
12286 struct elf_dyn_relocs **pp;
12287 struct elf_dyn_relocs *p;
5e681ec4 12288
34e77a92 12289 if (h != NULL)
9c489990 12290 pp = &(eh->dyn_relocs);
34e77a92
RS		 12291 else
12292 {
12293 Elf_Internal_Sym *isym;
12294
12295 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12296 abfd, r_symndx);
12297 if (isym == NULL)
12298 return FALSE;
12299 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12300 if (pp == NULL)
12301 return FALSE;
12302 }
9c489990 12303 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12304 if (p->sec == sec)
12305 {
12306 /* Everything must go for SEC. */
12307 *pp = p->next;
12308 break;
12309 }
eb043451
PB		 12310 }
12311 }
5e681ec4 12312
b34976b6 12313 return TRUE;
252b5132
RH		 12314}
12315
780a67af
NC		 12316/* Look through the relocs for a section during the first phase. */
12317
b34976b6 12318static bfd_boolean
57e8b36a
NC		 12319elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12320 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12321{
b34976b6
AM		 12322 Elf_Internal_Shdr *symtab_hdr;
12323 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12324 const Elf_Internal_Rela *rel;
12325 const Elf_Internal_Rela *rel_end;
12326 bfd *dynobj;
5e681ec4 12327 asection *sreloc;
5e681ec4 12328 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12329 bfd_boolean call_reloc_p;
12330 bfd_boolean may_become_dynamic_p;
12331 bfd_boolean may_need_local_target_p;
ce98a316 12332 unsigned long nsyms;
9a5aca8c 12333
1049f94e 12334 if (info->relocatable)
b34976b6 12335 return TRUE;
9a5aca8c 12336
0ffa91dd
NC		 12337 BFD_ASSERT (is_arm_elf (abfd));
12338
5e681ec4 12339 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12340 if (htab == NULL)
12341 return FALSE;
12342
5e681ec4 12343 sreloc = NULL;
9a5aca8c 12344
67687978
PB		 12345 /* Create dynamic sections for relocatable executables so that we can
12346 copy relocations. */
12347 if (htab->root.is_relocatable_executable
12348 && ! htab->root.dynamic_sections_created)
12349 {
12350 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12351 return FALSE;
12352 }
12353
cbc704f3
RS		 12354 if (htab->root.dynobj == NULL)
12355 htab->root.dynobj = abfd;
34e77a92
RS		 12356 if (!create_ifunc_sections (info))
12357 return FALSE;
cbc704f3
RS		 12358
12359 dynobj = htab->root.dynobj;
12360
0ffa91dd 12361 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12362 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12363 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12364
252b5132
RH		 12365 rel_end = relocs + sec->reloc_count;
12366 for (rel = relocs; rel < rel_end; rel++)
12367 {
34e77a92 12368 Elf_Internal_Sym *isym;
252b5132 12369 struct elf_link_hash_entry *h;
b7693d02 12370 struct elf32_arm_link_hash_entry *eh;
252b5132 12371 unsigned long r_symndx;
eb043451 12372 int r_type;
9a5aca8c 12373
252b5132 12374 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12375 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12376 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12377
ce98a316
NC		 12378 if (r_symndx >= nsyms
12379 /* PR 9934: It is possible to have relocations that do not
12380 refer to symbols, thus it is also possible to have an
12381 object file containing relocations but no symbol table. */
cf35638d 12382 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12383 {
12384 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12385 r_symndx);
ba93b8ac
DJ		 12386 return FALSE;
12387 }
12388
34e77a92
RS		 12389 h = NULL;
12390 isym = NULL;
12391 if (nsyms > 0)
973a3492 12392 {
34e77a92
RS		 12393 if (r_symndx < symtab_hdr->sh_info)
12394 {
12395 /* A local symbol. */
12396 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12397 abfd, r_symndx);
12398 if (isym == NULL)
12399 return FALSE;
12400 }
12401 else
12402 {
12403 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12404 while (h->root.type == bfd_link_hash_indirect
12405 || h->root.type == bfd_link_hash_warning)
12406 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12407 }
973a3492 12408 }
9a5aca8c 12409
b7693d02
DJ		 12410 eh = (struct elf32_arm_link_hash_entry *) h;
12411
f6e32f6d
RS		 12412 call_reloc_p = FALSE;
12413 may_become_dynamic_p = FALSE;
12414 may_need_local_target_p = FALSE;
12415
0855e32b
NS		 12416 /* Could be done earlier, if h were already available. */
12417 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12418 switch (r_type)
252b5132 12419 {
5e681ec4 12420 case R_ARM_GOT32:
eb043451 12421 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12422 case R_ARM_TLS_GD32:
12423 case R_ARM_TLS_IE32:
0855e32b
NS		 12424 case R_ARM_TLS_GOTDESC:
12425 case R_ARM_TLS_DESCSEQ:
12426 case R_ARM_THM_TLS_DESCSEQ:
12427 case R_ARM_TLS_CALL:
12428 case R_ARM_THM_TLS_CALL:
5e681ec4 12429 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12430 {
12431 int tls_type, old_tls_type;
5e681ec4 12432
ba93b8ac
DJ		 12433 switch (r_type)
12434 {
12435 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12436
ba93b8ac 12437 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12438
0855e32b
NS		 12439 case R_ARM_TLS_GOTDESC:
12440 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12441 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12442 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12443
ba93b8ac
DJ		 12444 default: tls_type = GOT_NORMAL; break;
12445 }
252b5132 12446
ba93b8ac
DJ		 12447 if (h != NULL)
12448 {
12449 h->got.refcount++;
12450 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12451 }
12452 else
12453 {
ba93b8ac 12454 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12455 if (!elf32_arm_allocate_local_sym_info (abfd))
12456 return FALSE;
12457 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12458 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12459 }
12460
0855e32b
NS		 12461 /* If a variable is accessed with both tls methods, two
12462 slots may be created. */
12463 if (GOT_TLS_GD_ANY_P (old_tls_type)
12464 && GOT_TLS_GD_ANY_P (tls_type))
12465 tls_type |= old_tls_type;
12466
12467 /* We will already have issued an error message if there
12468 is a TLS/non-TLS mismatch, based on the symbol
12469 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12470 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12471 && tls_type != GOT_NORMAL)
12472 tls_type |= old_tls_type;
12473
0855e32b
NS		 12474 /* If the symbol is accessed in both IE and GDESC
12475 method, we're able to relax. Turn off the GDESC flag,
12476 without messing up with any other kind of tls types
12477 that may be involved */
12478 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12479 tls_type &= ~GOT_TLS_GDESC;
12480
ba93b8ac
DJ		 12481 if (old_tls_type != tls_type)
12482 {
12483 if (h != NULL)
12484 elf32_arm_hash_entry (h)->tls_type = tls_type;
12485 else
12486 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12487 }
12488 }
8029a119 12489 /* Fall through. */
ba93b8ac
DJ		 12490
12491 case R_ARM_TLS_LDM32:
12492 if (r_type == R_ARM_TLS_LDM32)
12493 htab->tls_ldm_got.refcount++;
8029a119 12494 /* Fall through. */
252b5132 12495
c19d1205 12496 case R_ARM_GOTOFF32:
5e681ec4 12497 case R_ARM_GOTPC:
cbc704f3
RS		 12498 if (htab->root.sgot == NULL
12499 && !create_got_section (htab->root.dynobj, info))
12500 return FALSE;
252b5132
RH		 12501 break;
12502
252b5132 12503 case R_ARM_PC24:
7359ea65 12504 case R_ARM_PLT32:
5b5bb741
PB		 12505 case R_ARM_CALL:
12506 case R_ARM_JUMP24:
eb043451 12507 case R_ARM_PREL31:
c19d1205 12508 case R_ARM_THM_CALL:
bd97cb95
DJ		 12509 case R_ARM_THM_JUMP24:
12510 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12511 call_reloc_p = TRUE;
12512 may_need_local_target_p = TRUE;
12513 break;
12514
12515 case R_ARM_ABS12:
12516 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12517 ldr __GOTT_INDEX__ offsets. */
12518 if (!htab->vxworks_p)
12519 {
12520 may_need_local_target_p = TRUE;
12521 break;
12522 }
12523 /* Fall through. */
39623e12 12524
96c23d59
JM		 12525 case R_ARM_MOVW_ABS_NC:
12526 case R_ARM_MOVT_ABS:
12527 case R_ARM_THM_MOVW_ABS_NC:
12528 case R_ARM_THM_MOVT_ABS:
12529 if (info->shared)
12530 {
12531 (*_bfd_error_handler)
12532 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12533 abfd, elf32_arm_howto_table_1[r_type].name,
12534 (h) ? h->root.root.string : "a local symbol");
12535 bfd_set_error (bfd_error_bad_value);
12536 return FALSE;
12537 }
12538
12539 /* Fall through. */
39623e12
PB		 12540 case R_ARM_ABS32:
12541 case R_ARM_ABS32_NOI:
12542 case R_ARM_REL32:
12543 case R_ARM_REL32_NOI:
b6895b4f
PB		 12544 case R_ARM_MOVW_PREL_NC:
12545 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12546 case R_ARM_THM_MOVW_PREL_NC:
12547 case R_ARM_THM_MOVT_PREL:
39623e12 12548
b7693d02 12549 /* Should the interworking branches be listed here? */
67687978 12550 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12551 && (sec->flags & SEC_ALLOC) != 0)
12552 {
12553 if (h == NULL
12554 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12555 {
12556 /* In shared libraries and relocatable executables,
12557 we treat local relative references as calls;
12558 see the related SYMBOL_CALLS_LOCAL code in
12559 allocate_dynrelocs. */
12560 call_reloc_p = TRUE;
12561 may_need_local_target_p = TRUE;
12562 }
12563 else
12564 /* We are creating a shared library or relocatable
12565 executable, and this is a reloc against a global symbol,
12566 or a non-PC-relative reloc against a local symbol.
12567 We may need to copy the reloc into the output. */
12568 may_become_dynamic_p = TRUE;
12569 }
f6e32f6d
RS		 12570 else
12571 may_need_local_target_p = TRUE;
252b5132
RH		 12572 break;
12573
12574 /* This relocation describes the C++ object vtable hierarchy.
12575 Reconstruct it for later use during GC. */
12576 case R_ARM_GNU_VTINHERIT:
c152c796 12577 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 12578 return FALSE;
252b5132 12579 break;
9a5aca8c 12580
252b5132
RH		 12581 /* This relocation describes which C++ vtable entries are actually
12582 used. Record for later use during GC. */
12583 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 12584 BFD_ASSERT (h != NULL);
12585 if (h != NULL
12586 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 12587 return FALSE;
252b5132
RH		 12588 break;
12589 }
f6e32f6d
RS		 12590
12591 if (h != NULL)
12592 {
12593 if (call_reloc_p)
12594 /* We may need a .plt entry if the function this reloc
12595 refers to is in a different object, regardless of the
12596 symbol's type. We can't tell for sure yet, because
12597 something later might force the symbol local. */
12598 h->needs_plt = 1;
12599 else if (may_need_local_target_p)
12600 /* If this reloc is in a read-only section, we might
12601 need a copy reloc. We can't check reliably at this
12602 stage whether the section is read-only, as input
12603 sections have not yet been mapped to output sections.
12604 Tentatively set the flag for now, and correct in
12605 adjust_dynamic_symbol. */
12606 h->non_got_ref = 1;
12607 }
12608
34e77a92
RS		 12609 if (may_need_local_target_p
12610 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12611 {
34e77a92
RS		 12612 union gotplt_union *root_plt;
12613 struct arm_plt_info *arm_plt;
12614 struct arm_local_iplt_info *local_iplt;
12615
12616 if (h != NULL)
12617 {
12618 root_plt = &h->plt;
12619 arm_plt = &eh->plt;
12620 }
12621 else
12622 {
12623 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12624 if (local_iplt == NULL)
12625 return FALSE;
12626 root_plt = &local_iplt->root;
12627 arm_plt = &local_iplt->arm;
12628 }
12629
f6e32f6d
RS		 12630 /* If the symbol is a function that doesn't bind locally,
12631 this relocation will need a PLT entry. */
34e77a92
RS		 12632 root_plt->refcount += 1;
12633
12634 if (!call_reloc_p)
12635 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12636
12637 /* It's too early to use htab->use_blx here, so we have to
12638 record possible blx references separately from
12639 relocs that definitely need a thumb stub. */
12640
12641 if (r_type == R_ARM_THM_CALL)
34e77a92 12642 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12643
12644 if (r_type == R_ARM_THM_JUMP24
12645 || r_type == R_ARM_THM_JUMP19)
34e77a92 12646 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12647 }
12648
12649 if (may_become_dynamic_p)
12650 {
12651 struct elf_dyn_relocs *p, **head;
12652
12653 /* Create a reloc section in dynobj. */
12654 if (sreloc == NULL)
12655 {
12656 sreloc = _bfd_elf_make_dynamic_reloc_section
12657 (sec, dynobj, 2, abfd, ! htab->use_rel);
12658
12659 if (sreloc == NULL)
12660 return FALSE;
12661
12662 /* BPABI objects never have dynamic relocations mapped. */
12663 if (htab->symbian_p)
12664 {
12665 flagword flags;
12666
12667 flags = bfd_get_section_flags (dynobj, sreloc);
12668 flags &= ~(SEC_LOAD | SEC_ALLOC);
12669 bfd_set_section_flags (dynobj, sreloc, flags);
12670 }
12671 }
12672
12673 /* If this is a global symbol, count the number of
12674 relocations we need for this symbol. */
12675 if (h != NULL)
12676 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12677 else
12678 {
34e77a92
RS		 12679 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12680 if (head == NULL)
f6e32f6d 12681 return FALSE;
f6e32f6d
RS		 12682 }
12683
12684 p = *head;
12685 if (p == NULL || p->sec != sec)
12686 {
12687 bfd_size_type amt = sizeof *p;
12688
12689 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12690 if (p == NULL)
12691 return FALSE;
12692 p->next = *head;
12693 *head = p;
12694 p->sec = sec;
12695 p->count = 0;
12696 p->pc_count = 0;
12697 }
12698
12699 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12700 p->pc_count += 1;
12701 p->count += 1;
12702 }
252b5132 12703 }
f21f3fe0 12704
b34976b6 12705 return TRUE;
252b5132
RH		 12706}
12707
6a5bb875
PB		 12708/* Unwinding tables are not referenced directly. This pass marks them as
12709 required if the corresponding code section is marked. */
12710
12711static bfd_boolean
906e58ca
NC		 12712elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12713 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12714{
12715 bfd *sub;
12716 Elf_Internal_Shdr **elf_shdrp;
12717 bfd_boolean again;
12718
7f6ab9f8
AM		 12719 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12720
6a5bb875
PB		 12721 /* Marking EH data may cause additional code sections to be marked,
12722 requiring multiple passes. */
12723 again = TRUE;
12724 while (again)
12725 {
12726 again = FALSE;
12727 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12728 {
12729 asection *o;
12730
0ffa91dd 12731 if (! is_arm_elf (sub))
6a5bb875
PB		 12732 continue;
12733
12734 elf_shdrp = elf_elfsections (sub);
12735 for (o = sub->sections; o != NULL; o = o->next)
12736 {
12737 Elf_Internal_Shdr *hdr;
0ffa91dd 12738
6a5bb875 12739 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12740 if (hdr->sh_type == SHT_ARM_EXIDX
12741 && hdr->sh_link
12742 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12743 && !o->gc_mark
12744 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12745 {
12746 again = TRUE;
12747 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12748 return FALSE;
12749 }
12750 }
12751 }
12752 }
12753
12754 return TRUE;
12755}
12756
3c9458e9
NC		 12757/* Treat mapping symbols as special target symbols. */
12758
12759static bfd_boolean
12760elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12761{
b0796911
PB		 12762 return bfd_is_arm_special_symbol_name (sym->name,
12763 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12764}
12765
0367ecfb
NC		 12766/* This is a copy of elf_find_function() from elf.c except that
12767 ARM mapping symbols are ignored when looking for function names
12768 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12769
0367ecfb
NC		 12770static bfd_boolean
12771arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12772 asection * section,
12773 asymbol ** symbols,
12774 bfd_vma offset,
12775 const char ** filename_ptr,
12776 const char ** functionname_ptr)
12777{
12778 const char * filename = NULL;
12779 asymbol * func = NULL;
12780 bfd_vma low_func = 0;
12781 asymbol ** p;
252b5132
RH		 12782
12783 for (p = symbols; *p != NULL; p++)
12784 {
12785 elf_symbol_type *q;
12786
12787 q = (elf_symbol_type *) *p;
12788
252b5132
RH		 12789 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12790 {
12791 default:
12792 break;
12793 case STT_FILE:
12794 filename = bfd_asymbol_name (&q->symbol);
12795 break;
252b5132
RH		 12796 case STT_FUNC:
12797 case STT_ARM_TFUNC:
9d2da7ca 12798 case STT_NOTYPE:
b0796911 12799 /* Skip mapping symbols. */
0367ecfb 12800 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12801 && bfd_is_arm_special_symbol_name (q->symbol.name,
12802 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12803 continue;
12804 /* Fall through. */
6b40fcba 12805 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12806 && q->symbol.value >= low_func
12807 && q->symbol.value <= offset)
12808 {
12809 func = (asymbol *) q;
12810 low_func = q->symbol.value;
12811 }
12812 break;
12813 }
12814 }
12815
12816 if (func == NULL)
b34976b6 12817 return FALSE;
252b5132 12818
0367ecfb
NC		 12819 if (filename_ptr)
12820 *filename_ptr = filename;
12821 if (functionname_ptr)
12822 *functionname_ptr = bfd_asymbol_name (func);
12823
12824 return TRUE;
906e58ca 12825}
0367ecfb
NC		 12826
12827
12828/* Find the nearest line to a particular section and offset, for error
12829 reporting. This code is a duplicate of the code in elf.c, except
12830 that it uses arm_elf_find_function. */
12831
12832static bfd_boolean
12833elf32_arm_find_nearest_line (bfd * abfd,
12834 asection * section,
12835 asymbol ** symbols,
12836 bfd_vma offset,
12837 const char ** filename_ptr,
12838 const char ** functionname_ptr,
12839 unsigned int * line_ptr)
12840{
12841 bfd_boolean found = FALSE;
12842
12843 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12844
fc28f9aa
TG		 12845 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12846 section, symbols, offset,
0367ecfb
NC		 12847 filename_ptr, functionname_ptr,
12848 line_ptr, 0,
12849 & elf_tdata (abfd)->dwarf2_find_line_info))
12850 {
12851 if (!*functionname_ptr)
12852 arm_elf_find_function (abfd, section, symbols, offset,
12853 *filename_ptr ? NULL : filename_ptr,
12854 functionname_ptr);
f21f3fe0 12855
0367ecfb
NC		 12856 return TRUE;
12857 }
12858
12859 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12860 & found, filename_ptr,
12861 functionname_ptr, line_ptr,
12862 & elf_tdata (abfd)->line_info))
12863 return FALSE;
12864
12865 if (found && (*functionname_ptr || *line_ptr))
12866 return TRUE;
12867
12868 if (symbols == NULL)
12869 return FALSE;
12870
12871 if (! arm_elf_find_function (abfd, section, symbols, offset,
12872 filename_ptr, functionname_ptr))
12873 return FALSE;
12874
12875 *line_ptr = 0;
b34976b6 12876 return TRUE;
252b5132
RH		 12877}
12878
4ab527b0
FF		 12879static bfd_boolean
12880elf32_arm_find_inliner_info (bfd * abfd,
12881 const char ** filename_ptr,
12882 const char ** functionname_ptr,
12883 unsigned int * line_ptr)
12884{
12885 bfd_boolean found;
12886 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12887 functionname_ptr, line_ptr,
12888 & elf_tdata (abfd)->dwarf2_find_line_info);
12889 return found;
12890}
12891
252b5132
RH		 12892/* Adjust a symbol defined by a dynamic object and referenced by a
12893 regular object. The current definition is in some section of the
12894 dynamic object, but we're not including those sections. We have to
12895 change the definition to something the rest of the link can
12896 understand. */
12897
b34976b6 12898static bfd_boolean
57e8b36a
NC		 12899elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12900 struct elf_link_hash_entry * h)
252b5132
RH		 12901{
12902 bfd * dynobj;
12903 asection * s;
b7693d02 12904 struct elf32_arm_link_hash_entry * eh;
67687978 12905 struct elf32_arm_link_hash_table *globals;
252b5132 12906
67687978 12907 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12908 if (globals == NULL)
12909 return FALSE;
12910
252b5132
RH		 12911 dynobj = elf_hash_table (info)->dynobj;
12912
12913 /* Make sure we know what is going on here. */
12914 BFD_ASSERT (dynobj != NULL
f5385ebf 12915 && (h->needs_plt
34e77a92 12916 || h->type == STT_GNU_IFUNC
f6e332e6 12917 || h->u.weakdef != NULL
f5385ebf
AM		 12918 || (h->def_dynamic
12919 && h->ref_regular
12920 && !h->def_regular)));
252b5132 12921
b7693d02
DJ		 12922 eh = (struct elf32_arm_link_hash_entry *) h;
12923
252b5132
RH		 12924 /* If this is a function, put it in the procedure linkage table. We
12925 will fill in the contents of the procedure linkage table later,
12926 when we know the address of the .got section. */
34e77a92 12927 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 12928 {
34e77a92
RS		 12929 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12930 symbol binds locally. */
5e681ec4 12931 if (h->plt.refcount <= 0
34e77a92
RS		 12932 || (h->type != STT_GNU_IFUNC
12933 && (SYMBOL_CALLS_LOCAL (info, h)
12934 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12935 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 12936 {
12937 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 12938 file, but the symbol was never referred to by a dynamic
12939 object, or if all references were garbage collected. In
12940 such a case, we don't actually need to build a procedure
12941 linkage table, and we can just do a PC24 reloc instead. */
12942 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12943 eh->plt.thumb_refcount = 0;
12944 eh->plt.maybe_thumb_refcount = 0;
12945 eh->plt.noncall_refcount = 0;
f5385ebf 12946 h->needs_plt = 0;
252b5132
RH		 12947 }
12948
b34976b6 12949 return TRUE;
252b5132 12950 }
5e681ec4 12951 else
b7693d02
DJ		 12952 {
12953 /* It's possible that we incorrectly decided a .plt reloc was
12954 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12955 in check_relocs. We can't decide accurately between function
12956 and non-function syms in check-relocs; Objects loaded later in
12957 the link may change h->type. So fix it now. */
12958 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12959 eh->plt.thumb_refcount = 0;
12960 eh->plt.maybe_thumb_refcount = 0;
12961 eh->plt.noncall_refcount = 0;
b7693d02 12962 }
252b5132
RH		 12963
12964 /* If this is a weak symbol, and there is a real definition, the
12965 processor independent code will have arranged for us to see the
12966 real definition first, and we can just use the same value. */
f6e332e6 12967 if (h->u.weakdef != NULL)
252b5132 12968 {
f6e332e6
AM		 12969 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
12970 || h->u.weakdef->root.type == bfd_link_hash_defweak);
12971 h->root.u.def.section = h->u.weakdef->root.u.def.section;
12972 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 12973 return TRUE;
252b5132
RH		 12974 }
12975
ba93b8ac
DJ		 12976 /* If there are no non-GOT references, we do not need a copy
12977 relocation. */
12978 if (!h->non_got_ref)
12979 return TRUE;
12980
252b5132
RH		 12981 /* This is a reference to a symbol defined by a dynamic object which
12982 is not a function. */
12983
12984 /* If we are creating a shared library, we must presume that the
12985 only references to the symbol are via the global offset table.
12986 For such cases we need not do anything here; the relocations will
67687978
PB		 12987 be handled correctly by relocate_section. Relocatable executables
12988 can reference data in shared objects directly, so we don't need to
12989 do anything here. */
12990 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 12991 return TRUE;
252b5132
RH		 12992
12993 /* We must allocate the symbol in our .dynbss section, which will
12994 become part of the .bss section of the executable. There will be
12995 an entry for this symbol in the .dynsym section. The dynamic
12996 object will contain position independent code, so all references
12997 from the dynamic object to this symbol will go through the global
12998 offset table. The dynamic linker will use the .dynsym entry to
12999 determine the address it must put in the global offset table, so
13000 both the dynamic object and the regular object will refer to the
13001 same memory location for the variable. */
252b5132
RH		 13002 s = bfd_get_section_by_name (dynobj, ".dynbss");
13003 BFD_ASSERT (s != NULL);
13004
13005 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13006 copy the initial value out of the dynamic object and into the
13007 runtime process image. We need to remember the offset into the
00a97672 13008 .rel(a).bss section we are going to use. */
1d7e9d18 13009 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13010 {
13011 asection *srel;
13012
00a97672 13013 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13014 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13015 h->needs_copy = 1;
252b5132
RH		 13016 }
13017
027297b7 13018 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13019}
13020
5e681ec4
PB		 13021/* Allocate space in .plt, .got and associated reloc sections for
13022 dynamic relocs. */
13023
13024static bfd_boolean
47beaa6a 13025allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13026{
13027 struct bfd_link_info *info;
13028 struct elf32_arm_link_hash_table *htab;
13029 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13030 struct elf_dyn_relocs *p;
5e681ec4
PB		 13031
13032 if (h->root.type == bfd_link_hash_indirect)
13033 return TRUE;
13034
e6a6bb22
AM		 13035 eh = (struct elf32_arm_link_hash_entry *) h;
13036
5e681ec4
PB		 13037 info = (struct bfd_link_info *) inf;
13038 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13039 if (htab == NULL)
13040 return FALSE;
5e681ec4 13041
34e77a92 13042 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13043 && h->plt.refcount > 0)
13044 {
13045 /* Make sure this symbol is output as a dynamic symbol.
13046 Undefined weak syms won't yet be marked as dynamic. */
13047 if (h->dynindx == -1
f5385ebf 13048 && !h->forced_local)
5e681ec4 13049 {
c152c796 13050 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13051 return FALSE;
13052 }
13053
34e77a92
RS		 13054 /* If the call in the PLT entry binds locally, the associated
13055 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13056 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13057 than the .plt section. */
13058 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13059 {
13060 eh->is_iplt = 1;
13061 if (eh->plt.noncall_refcount == 0
13062 && SYMBOL_REFERENCES_LOCAL (info, h))
13063 /* All non-call references can be resolved directly.
13064 This means that they can (and in some cases, must)
13065 resolve directly to the run-time target, rather than
13066 to the PLT. That in turns means that any .got entry
13067 would be equal to the .igot.plt entry, so there's
13068 no point having both. */
13069 h->got.refcount = 0;
13070 }
13071
5e681ec4 13072 if (info->shared
34e77a92 13073 || eh->is_iplt
7359ea65 13074 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13075 {
34e77a92 13076 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13077
5e681ec4
PB		 13078 /* If this symbol is not defined in a regular file, and we are
13079 not generating a shared library, then set the symbol to this
13080 location in the .plt. This is required to make function
13081 pointers compare as equal between the normal executable and
13082 the shared library. */
13083 if (! info->shared
f5385ebf 13084 && !h->def_regular)
5e681ec4 13085 {
34e77a92 13086 h->root.u.def.section = htab->root.splt;
5e681ec4 13087 h->root.u.def.value = h->plt.offset;
5e681ec4 13088
67d74e43
DJ		 13089 /* Make sure the function is not marked as Thumb, in case
13090 it is the target of an ABS32 relocation, which will
13091 point to the PLT entry. */
35fc36a8 13092 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13093 }
022f8312 13094
0855e32b 13095 htab->next_tls_desc_index++;
00a97672
RS		 13096
13097 /* VxWorks executables have a second set of relocations for
13098 each PLT entry. They go in a separate relocation section,
13099 which is processed by the kernel loader. */
13100 if (htab->vxworks_p && !info->shared)
13101 {
13102 /* There is a relocation for the initial PLT entry:
13103 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13104 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13105 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13106
13107 /* There are two extra relocations for each subsequent
13108 PLT entry: an R_ARM_32 relocation for the GOT entry,
13109 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13110 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13111 }
5e681ec4
PB		 13112 }
13113 else
13114 {
13115 h->plt.offset = (bfd_vma) -1;
f5385ebf 13116 h->needs_plt = 0;
5e681ec4
PB		 13117 }
13118 }
13119 else
13120 {
13121 h->plt.offset = (bfd_vma) -1;
f5385ebf 13122 h->needs_plt = 0;
5e681ec4
PB		 13123 }
13124
0855e32b
NS		 13125 eh = (struct elf32_arm_link_hash_entry *) h;
13126 eh->tlsdesc_got = (bfd_vma) -1;
13127
5e681ec4
PB		 13128 if (h->got.refcount > 0)
13129 {
13130 asection *s;
13131 bfd_boolean dyn;
ba93b8ac
DJ		 13132 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13133 int indx;
5e681ec4
PB		 13134
13135 /* Make sure this symbol is output as a dynamic symbol.
13136 Undefined weak syms won't yet be marked as dynamic. */
13137 if (h->dynindx == -1
f5385ebf 13138 && !h->forced_local)
5e681ec4 13139 {
c152c796 13140 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13141 return FALSE;
13142 }
13143
e5a52504
MM		 13144 if (!htab->symbian_p)
13145 {
362d30a1 13146 s = htab->root.sgot;
e5a52504 13147 h->got.offset = s->size;
ba93b8ac
DJ		 13148
13149 if (tls_type == GOT_UNKNOWN)
13150 abort ();
13151
13152 if (tls_type == GOT_NORMAL)
13153 /* Non-TLS symbols need one GOT slot. */
13154 s->size += 4;
13155 else
13156 {
0855e32b
NS		 13157 if (tls_type & GOT_TLS_GDESC)
13158 {
13159 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13160 eh->tlsdesc_got
13161 = (htab->root.sgotplt->size
13162 - elf32_arm_compute_jump_table_size (htab));
13163 htab->root.sgotplt->size += 8;
13164 h->got.offset = (bfd_vma) -2;
34e77a92 13165 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13166 reloc in the middle of .got.plt. */
13167 htab->num_tls_desc++;
13168 }
13169
ba93b8ac 13170 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13171 {
13172 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13173 the symbol is both GD and GDESC, got.offset may
13174 have been overwritten. */
13175 h->got.offset = s->size;
13176 s->size += 8;
13177 }
13178
ba93b8ac
DJ		 13179 if (tls_type & GOT_TLS_IE)
13180 /* R_ARM_TLS_IE32 needs one GOT slot. */
13181 s->size += 4;
13182 }
13183
e5a52504 13184 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13185
13186 indx = 0;
13187 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13188 && (!info->shared
13189 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13190 indx = h->dynindx;
13191
13192 if (tls_type != GOT_NORMAL
13193 && (info->shared || indx != 0)
13194 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13195 || h->root.type != bfd_link_hash_undefweak))
13196 {
13197 if (tls_type & GOT_TLS_IE)
47beaa6a 13198 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13199
13200 if (tls_type & GOT_TLS_GD)
47beaa6a 13201 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13202
b38cadfb 13203 if (tls_type & GOT_TLS_GDESC)
0855e32b 13204 {
47beaa6a 13205 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13206 /* GDESC needs a trampoline to jump to. */
13207 htab->tls_trampoline = -1;
13208 }
13209
13210 /* Only GD needs it. GDESC just emits one relocation per
13211 2 entries. */
b38cadfb 13212 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13213 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13214 }
b436d854
RS		 13215 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13216 {
13217 if (htab->root.dynamic_sections_created)
13218 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13219 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13220 }
34e77a92
RS		 13221 else if (h->type == STT_GNU_IFUNC
13222 && eh->plt.noncall_refcount == 0)
13223 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13224 they all resolve dynamically instead. Reserve room for the
13225 GOT entry's R_ARM_IRELATIVE relocation. */
13226 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
b436d854
RS		 13227 else if (info->shared)
13228 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13229 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13230 }
5e681ec4
PB		 13231 }
13232 else
13233 h->got.offset = (bfd_vma) -1;
13234
a4fd1a8e
PB		 13235 /* Allocate stubs for exported Thumb functions on v4t. */
13236 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13237 && h->def_regular
35fc36a8 13238 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13239 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13240 {
13241 struct elf_link_hash_entry * th;
13242 struct bfd_link_hash_entry * bh;
13243 struct elf_link_hash_entry * myh;
13244 char name[1024];
13245 asection *s;
13246 bh = NULL;
13247 /* Create a new symbol to regist the real location of the function. */
13248 s = h->root.u.def.section;
906e58ca 13249 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13250 _bfd_generic_link_add_one_symbol (info, s->owner,
13251 name, BSF_GLOBAL, s,
13252 h->root.u.def.value,
13253 NULL, TRUE, FALSE, &bh);
13254
13255 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13256 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13257 myh->forced_local = 1;
35fc36a8 13258 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13259 eh->export_glue = myh;
13260 th = record_arm_to_thumb_glue (info, h);
13261 /* Point the symbol at the stub. */
13262 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13263 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13264 h->root.u.def.section = th->root.u.def.section;
13265 h->root.u.def.value = th->root.u.def.value & ~1;
13266 }
13267
0bdcacaf 13268 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13269 return TRUE;
13270
13271 /* In the shared -Bsymbolic case, discard space allocated for
13272 dynamic pc-relative relocs against symbols which turn out to be
13273 defined in regular objects. For the normal shared case, discard
13274 space for pc-relative relocs that have become local due to symbol
13275 visibility changes. */
13276
67687978 13277 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13278 {
7bdca076 13279 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 13280 R_ARM_REL32_NOI, which will appear on something like
13281 ".long foo - .". We want calls to protected symbols to resolve
13282 directly to the function rather than going via the plt. If people
13283 want function pointer comparisons to work as expected then they
13284 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13285 if (SYMBOL_CALLS_LOCAL (info, h))
13286 {
0bdcacaf 13287 struct elf_dyn_relocs **pp;
ba93b8ac 13288
0bdcacaf 13289 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13290 {
13291 p->count -= p->pc_count;
13292 p->pc_count = 0;
13293 if (p->count == 0)
13294 *pp = p->next;
13295 else
13296 pp = &p->next;
13297 }
13298 }
13299
4dfe6ac6 13300 if (htab->vxworks_p)
3348747a 13301 {
0bdcacaf 13302 struct elf_dyn_relocs **pp;
3348747a 13303
0bdcacaf 13304 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13305 {
0bdcacaf 13306 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13307 *pp = p->next;
13308 else
13309 pp = &p->next;
13310 }
13311 }
13312
ba93b8ac 13313 /* Also discard relocs on undefined weak syms with non-default
7359ea65 13314 visibility. */
0bdcacaf 13315 if (eh->dyn_relocs != NULL
5e681ec4 13316 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13317 {
13318 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13319 eh->dyn_relocs = NULL;
22d606e9
AM		 13320
13321 /* Make sure undefined weak symbols are output as a dynamic
13322 symbol in PIEs. */
13323 else if (h->dynindx == -1
13324 && !h->forced_local)
13325 {
13326 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13327 return FALSE;
13328 }
13329 }
13330
67687978
PB		 13331 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13332 && h->root.type == bfd_link_hash_new)
13333 {
13334 /* Output absolute symbols so that we can create relocations
13335 against them. For normal symbols we output a relocation
13336 against the section that contains them. */
13337 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13338 return FALSE;
13339 }
13340
5e681ec4
PB		 13341 }
13342 else
13343 {
13344 /* For the non-shared case, discard space for relocs against
13345 symbols which turn out to need copy relocs or are not
13346 dynamic. */
13347
f5385ebf
AM		 13348 if (!h->non_got_ref
13349 && ((h->def_dynamic
13350 && !h->def_regular)
5e681ec4
PB		 13351 || (htab->root.dynamic_sections_created
13352 && (h->root.type == bfd_link_hash_undefweak
13353 || h->root.type == bfd_link_hash_undefined))))
13354 {
13355 /* Make sure this symbol is output as a dynamic symbol.
13356 Undefined weak syms won't yet be marked as dynamic. */
13357 if (h->dynindx == -1
f5385ebf 13358 && !h->forced_local)
5e681ec4 13359 {
c152c796 13360 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13361 return FALSE;
13362 }
13363
13364 /* If that succeeded, we know we'll be keeping all the
13365 relocs. */
13366 if (h->dynindx != -1)
13367 goto keep;
13368 }
13369
0bdcacaf 13370 eh->dyn_relocs = NULL;
5e681ec4
PB		 13371
13372 keep: ;
13373 }
13374
13375 /* Finally, allocate space. */
0bdcacaf 13376 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13377 {
0bdcacaf 13378 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13379 if (h->type == STT_GNU_IFUNC
13380 && eh->plt.noncall_refcount == 0
13381 && SYMBOL_REFERENCES_LOCAL (info, h))
13382 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13383 else
13384 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13385 }
13386
13387 return TRUE;
13388}
13389
08d1f311
DJ		 13390/* Find any dynamic relocs that apply to read-only sections. */
13391
13392static bfd_boolean
8029a119 13393elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13394{
8029a119 13395 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13396 struct elf_dyn_relocs * p;
08d1f311 13397
08d1f311 13398 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13399 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13400 {
0bdcacaf 13401 asection *s = p->sec;
08d1f311
DJ		 13402
13403 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13404 {
13405 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13406
13407 info->flags |= DF_TEXTREL;
13408
13409 /* Not an error, just cut short the traversal. */
13410 return FALSE;
13411 }
13412 }
13413 return TRUE;
13414}
13415
d504ffc8
DJ		 13416void
13417bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13418 int byteswap_code)
13419{
13420 struct elf32_arm_link_hash_table *globals;
13421
13422 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13423 if (globals == NULL)
13424 return;
13425
d504ffc8
DJ		 13426 globals->byteswap_code = byteswap_code;
13427}
13428
252b5132
RH		 13429/* Set the sizes of the dynamic sections. */
13430
b34976b6 13431static bfd_boolean
57e8b36a
NC		 13432elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13433 struct bfd_link_info * info)
252b5132
RH		 13434{
13435 bfd * dynobj;
13436 asection * s;
b34976b6
AM		 13437 bfd_boolean plt;
13438 bfd_boolean relocs;
5e681ec4
PB		 13439 bfd *ibfd;
13440 struct elf32_arm_link_hash_table *htab;
252b5132 13441
5e681ec4 13442 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13443 if (htab == NULL)
13444 return FALSE;
13445
252b5132
RH		 13446 dynobj = elf_hash_table (info)->dynobj;
13447 BFD_ASSERT (dynobj != NULL);
39b41c9c 13448 check_use_blx (htab);
252b5132
RH		 13449
13450 if (elf_hash_table (info)->dynamic_sections_created)
13451 {
13452 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13453 if (info->executable)
252b5132
RH		 13454 {
13455 s = bfd_get_section_by_name (dynobj, ".interp");
13456 BFD_ASSERT (s != NULL);
eea6121a 13457 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13458 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13459 }
13460 }
5e681ec4
PB		 13461
13462 /* Set up .got offsets for local syms, and space for local dynamic
13463 relocs. */
13464 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13465 {
5e681ec4
PB		 13466 bfd_signed_vma *local_got;
13467 bfd_signed_vma *end_local_got;
34e77a92 13468 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13469 char *local_tls_type;
0855e32b 13470 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13471 bfd_size_type locsymcount;
13472 Elf_Internal_Shdr *symtab_hdr;
13473 asection *srel;
4dfe6ac6 13474 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13475 unsigned int symndx;
5e681ec4 13476
0ffa91dd 13477 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13478 continue;
13479
13480 for (s = ibfd->sections; s != NULL; s = s->next)
13481 {
0bdcacaf 13482 struct elf_dyn_relocs *p;
5e681ec4 13483
0bdcacaf 13484 for (p = (struct elf_dyn_relocs *)
21d799b5 13485 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13486 {
0bdcacaf
RS		 13487 if (!bfd_is_abs_section (p->sec)
13488 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13489 {
13490 /* Input section has been discarded, either because
13491 it is a copy of a linkonce section or due to
13492 linker script /DISCARD/, so we'll be discarding
13493 the relocs too. */
13494 }
3348747a 13495 else if (is_vxworks
0bdcacaf 13496 && strcmp (p->sec->output_section->name,
3348747a
NS		 13497 ".tls_vars") == 0)
13498 {
13499 /* Relocations in vxworks .tls_vars sections are
13500 handled specially by the loader. */
13501 }
5e681ec4
PB		 13502 else if (p->count != 0)
13503 {
0bdcacaf 13504 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13505 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13506 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13507 info->flags |= DF_TEXTREL;
13508 }
13509 }
13510 }
13511
13512 local_got = elf_local_got_refcounts (ibfd);
13513 if (!local_got)
13514 continue;
13515
0ffa91dd 13516 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13517 locsymcount = symtab_hdr->sh_info;
13518 end_local_got = local_got + locsymcount;
34e77a92 13519 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13520 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13521 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13522 symndx = 0;
362d30a1
RS		 13523 s = htab->root.sgot;
13524 srel = htab->root.srelgot;
0855e32b 13525 for (; local_got < end_local_got;
34e77a92
RS		 13526 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13527 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13528 {
0855e32b 13529 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13530 local_iplt = *local_iplt_ptr;
13531 if (local_iplt != NULL)
13532 {
13533 struct elf_dyn_relocs *p;
13534
13535 if (local_iplt->root.refcount > 0)
13536 {
13537 elf32_arm_allocate_plt_entry (info, TRUE,
13538 &local_iplt->root,
13539 &local_iplt->arm);
13540 if (local_iplt->arm.noncall_refcount == 0)
13541 /* All references to the PLT are calls, so all
13542 non-call references can resolve directly to the
13543 run-time target. This means that the .got entry
13544 would be the same as the .igot.plt entry, so there's
13545 no point creating both. */
13546 *local_got = 0;
13547 }
13548 else
13549 {
13550 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13551 local_iplt->root.offset = (bfd_vma) -1;
13552 }
13553
13554 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13555 {
13556 asection *psrel;
13557
13558 psrel = elf_section_data (p->sec)->sreloc;
13559 if (local_iplt->arm.noncall_refcount == 0)
13560 elf32_arm_allocate_irelocs (info, psrel, p->count);
13561 else
13562 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13563 }
13564 }
5e681ec4
PB		 13565 if (*local_got > 0)
13566 {
34e77a92
RS		 13567 Elf_Internal_Sym *isym;
13568
eea6121a 13569 *local_got = s->size;
ba93b8ac
DJ		 13570 if (*local_tls_type & GOT_TLS_GD)
13571 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13572 s->size += 8;
0855e32b
NS		 13573 if (*local_tls_type & GOT_TLS_GDESC)
13574 {
13575 *local_tlsdesc_gotent = htab->root.sgotplt->size
13576 - elf32_arm_compute_jump_table_size (htab);
13577 htab->root.sgotplt->size += 8;
13578 *local_got = (bfd_vma) -2;
34e77a92 13579 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13580 reloc in the middle of .got.plt. */
13581 htab->num_tls_desc++;
13582 }
ba93b8ac
DJ		 13583 if (*local_tls_type & GOT_TLS_IE)
13584 s->size += 4;
ba93b8ac 13585
0855e32b
NS		 13586 if (*local_tls_type & GOT_NORMAL)
13587 {
13588 /* If the symbol is both GD and GDESC, *local_got
13589 may have been overwritten. */
13590 *local_got = s->size;
13591 s->size += 4;
13592 }
13593
34e77a92
RS		 13594 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13595 if (isym == NULL)
13596 return FALSE;
13597
13598 /* If all references to an STT_GNU_IFUNC PLT are calls,
13599 then all non-call references, including this GOT entry,
13600 resolve directly to the run-time target. */
13601 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13602 && (local_iplt == NULL
13603 || local_iplt->arm.noncall_refcount == 0))
13604 elf32_arm_allocate_irelocs (info, srel, 1);
13605 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13606 || *local_tls_type & GOT_TLS_GD)
47beaa6a 13607 elf32_arm_allocate_dynrelocs (info, srel, 1);
0855e32b
NS		 13608
13609 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13610 {
47beaa6a 13611 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13612 htab->tls_trampoline = -1;
13613 }
5e681ec4
PB		 13614 }
13615 else
13616 *local_got = (bfd_vma) -1;
13617 }
252b5132
RH		 13618 }
13619
ba93b8ac
DJ		 13620 if (htab->tls_ldm_got.refcount > 0)
13621 {
13622 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13623 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13624 htab->tls_ldm_got.offset = htab->root.sgot->size;
13625 htab->root.sgot->size += 8;
ba93b8ac 13626 if (info->shared)
47beaa6a 13627 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13628 }
13629 else
13630 htab->tls_ldm_got.offset = -1;
13631
5e681ec4
PB		 13632 /* Allocate global sym .plt and .got entries, and space for global
13633 sym dynamic relocs. */
47beaa6a 13634 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13635
d504ffc8
DJ		 13636 /* Here we rummage through the found bfds to collect glue information. */
13637 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13638 {
0ffa91dd 13639 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13640 continue;
13641
c7b8f16e
JB		 13642 /* Initialise mapping tables for code/data. */
13643 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13644
c7b8f16e
JB		 13645 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13646 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13647 /* xgettext:c-format */
13648 _bfd_error_handler (_("Errors encountered processing file %s"),
13649 ibfd->filename);
13650 }
d504ffc8 13651
3e6b1042
DJ		 13652 /* Allocate space for the glue sections now that we've sized them. */
13653 bfd_elf32_arm_allocate_interworking_sections (info);
13654
0855e32b
NS		 13655 /* For every jump slot reserved in the sgotplt, reloc_count is
13656 incremented. However, when we reserve space for TLS descriptors,
13657 it's not incremented, so in order to compute the space reserved
13658 for them, it suffices to multiply the reloc count by the jump
13659 slot size. */
13660 if (htab->root.srelplt)
13661 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13662
13663 if (htab->tls_trampoline)
13664 {
13665 if (htab->root.splt->size == 0)
13666 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13667
0855e32b
NS		 13668 htab->tls_trampoline = htab->root.splt->size;
13669 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13670
0855e32b
NS		 13671 /* If we're not using lazy TLS relocations, don't generate the
13672 PLT and GOT entries they require. */
13673 if (!(info->flags & DF_BIND_NOW))
13674 {
13675 htab->dt_tlsdesc_got = htab->root.sgot->size;
13676 htab->root.sgot->size += 4;
13677
13678 htab->dt_tlsdesc_plt = htab->root.splt->size;
13679 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13680 }
13681 }
13682
252b5132
RH		 13683 /* The check_relocs and adjust_dynamic_symbol entry points have
13684 determined the sizes of the various dynamic sections. Allocate
13685 memory for them. */
b34976b6
AM		 13686 plt = FALSE;
13687 relocs = FALSE;
252b5132
RH		 13688 for (s = dynobj->sections; s != NULL; s = s->next)
13689 {
13690 const char * name;
252b5132
RH		 13691
13692 if ((s->flags & SEC_LINKER_CREATED) == 0)
13693 continue;
13694
13695 /* It's OK to base decisions on the section name, because none
13696 of the dynobj section names depend upon the input files. */
13697 name = bfd_get_section_name (dynobj, s);
13698
34e77a92 13699 if (s == htab->root.splt)
252b5132 13700 {
c456f082
AM		 13701 /* Remember whether there is a PLT. */
13702 plt = s->size != 0;
252b5132 13703 }
0112cd26 13704 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13705 {
c456f082 13706 if (s->size != 0)
252b5132 13707 {
252b5132 13708 /* Remember whether there are any reloc sections other
00a97672 13709 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13710 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13711 relocs = TRUE;
252b5132
RH		 13712
13713 /* We use the reloc_count field as a counter if we need
13714 to copy relocs into the output file. */
13715 s->reloc_count = 0;
13716 }
13717 }
34e77a92
RS		 13718 else if (s != htab->root.sgot
13719 && s != htab->root.sgotplt
13720 && s != htab->root.iplt
13721 && s != htab->root.igotplt
13722 && s != htab->sdynbss)
252b5132
RH		 13723 {
13724 /* It's not one of our sections, so don't allocate space. */
13725 continue;
13726 }
13727
c456f082 13728 if (s->size == 0)
252b5132 13729 {
c456f082 13730 /* If we don't need this section, strip it from the
00a97672
RS		 13731 output file. This is mostly to handle .rel(a).bss and
13732 .rel(a).plt. We must create both sections in
c456f082
AM		 13733 create_dynamic_sections, because they must be created
13734 before the linker maps input sections to output
13735 sections. The linker does that before
13736 adjust_dynamic_symbol is called, and it is that
13737 function which decides whether anything needs to go
13738 into these sections. */
8423293d 13739 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13740 continue;
13741 }
13742
c456f082
AM		 13743 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13744 continue;
13745
252b5132 13746 /* Allocate memory for the section contents. */
21d799b5 13747 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13748 if (s->contents == NULL)
b34976b6 13749 return FALSE;
252b5132
RH		 13750 }
13751
13752 if (elf_hash_table (info)->dynamic_sections_created)
13753 {
13754 /* Add some entries to the .dynamic section. We fill in the
13755 values later, in elf32_arm_finish_dynamic_sections, but we
13756 must add the entries now so that we get the correct size for
13757 the .dynamic section. The DT_DEBUG entry is filled in by the
13758 dynamic linker and used by the debugger. */
dc810e39 13759#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13760 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13761
8532796c 13762 if (info->executable)
252b5132 13763 {
dc810e39 13764 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13765 return FALSE;
252b5132
RH		 13766 }
13767
13768 if (plt)
13769 {
dc810e39
AM		 13770 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13771 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13772 || !add_dynamic_entry (DT_PLTREL,
13773 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13774 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13775 return FALSE;
0855e32b
NS		 13776
13777 if (htab->dt_tlsdesc_plt &&
b38cadfb 13778 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 13779 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 13780 return FALSE;
252b5132
RH		 13781 }
13782
13783 if (relocs)
13784 {
00a97672
RS		 13785 if (htab->use_rel)
13786 {
13787 if (!add_dynamic_entry (DT_REL, 0)
13788 || !add_dynamic_entry (DT_RELSZ, 0)
13789 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13790 return FALSE;
13791 }
13792 else
13793 {
13794 if (!add_dynamic_entry (DT_RELA, 0)
13795 || !add_dynamic_entry (DT_RELASZ, 0)
13796 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13797 return FALSE;
13798 }
252b5132
RH		 13799 }
13800
08d1f311
DJ		 13801 /* If any dynamic relocs apply to a read-only section,
13802 then we need a DT_TEXTREL entry. */
13803 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13804 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13805 info);
08d1f311 13806
99e4ae17 13807 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13808 {
dc810e39 13809 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13810 return FALSE;
252b5132 13811 }
7a2b07ff
NS		 13812 if (htab->vxworks_p
13813 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13814 return FALSE;
252b5132 13815 }
8532796c 13816#undef add_dynamic_entry
252b5132 13817
b34976b6 13818 return TRUE;
252b5132
RH		 13819}
13820
0855e32b
NS		 13821/* Size sections even though they're not dynamic. We use it to setup
13822 _TLS_MODULE_BASE_, if needed. */
13823
13824static bfd_boolean
13825elf32_arm_always_size_sections (bfd *output_bfd,
13826 struct bfd_link_info *info)
13827{
13828 asection *tls_sec;
13829
13830 if (info->relocatable)
13831 return TRUE;
13832
13833 tls_sec = elf_hash_table (info)->tls_sec;
13834
13835 if (tls_sec)
13836 {
13837 struct elf_link_hash_entry *tlsbase;
13838
13839 tlsbase = elf_link_hash_lookup
13840 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13841
13842 if (tlsbase)
13843 {
13844 struct bfd_link_hash_entry *bh = NULL;
13845 const struct elf_backend_data *bed
13846 = get_elf_backend_data (output_bfd);
13847
13848 if (!(_bfd_generic_link_add_one_symbol
13849 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13850 tls_sec, 0, NULL, FALSE,
13851 bed->collect, &bh)))
13852 return FALSE;
b38cadfb 13853
0855e32b
NS		 13854 tlsbase->type = STT_TLS;
13855 tlsbase = (struct elf_link_hash_entry *)bh;
13856 tlsbase->def_regular = 1;
13857 tlsbase->other = STV_HIDDEN;
13858 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13859 }
13860 }
13861 return TRUE;
13862}
13863
252b5132
RH		 13864/* Finish up dynamic symbol handling. We set the contents of various
13865 dynamic sections here. */
13866
b34976b6 13867static bfd_boolean
906e58ca
NC		 13868elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13869 struct bfd_link_info * info,
13870 struct elf_link_hash_entry * h,
13871 Elf_Internal_Sym * sym)
252b5132 13872{
e5a52504 13873 struct elf32_arm_link_hash_table *htab;
b7693d02 13874 struct elf32_arm_link_hash_entry *eh;
252b5132 13875
e5a52504 13876 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13877 if (htab == NULL)
13878 return FALSE;
13879
b7693d02 13880 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 13881
13882 if (h->plt.offset != (bfd_vma) -1)
13883 {
34e77a92 13884 if (!eh->is_iplt)
e5a52504 13885 {
34e77a92
RS		 13886 BFD_ASSERT (h->dynindx != -1);
13887 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13888 h->dynindx, 0);
e5a52504 13889 }
57e8b36a 13890
f5385ebf 13891 if (!h->def_regular)
252b5132
RH		 13892 {
13893 /* Mark the symbol as undefined, rather than as defined in
13894 the .plt section. Leave the value alone. */
13895 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13896 /* If the symbol is weak, we do need to clear the value.
13897 Otherwise, the PLT entry would provide a definition for
13898 the symbol even if the symbol wasn't defined anywhere,
13899 and so the symbol would never be NULL. */
f5385ebf 13900 if (!h->ref_regular_nonweak)
d982ba73 13901 sym->st_value = 0;
252b5132 13902 }
34e77a92
RS		 13903 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13904 {
13905 /* At least one non-call relocation references this .iplt entry,
13906 so the .iplt entry is the function's canonical address. */
13907 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13908 sym->st_target_internal = ST_BRANCH_TO_ARM;
13909 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13910 (output_bfd, htab->root.iplt->output_section));
13911 sym->st_value = (h->plt.offset
13912 + htab->root.iplt->output_section->vma
13913 + htab->root.iplt->output_offset);
13914 }
252b5132
RH		 13915 }
13916
f5385ebf 13917 if (h->needs_copy)
252b5132
RH		 13918 {
13919 asection * s;
947216bf 13920 Elf_Internal_Rela rel;
252b5132
RH		 13921
13922 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13923 BFD_ASSERT (h->dynindx != -1
13924 && (h->root.type == bfd_link_hash_defined
13925 || h->root.type == bfd_link_hash_defweak));
13926
362d30a1 13927 s = htab->srelbss;
252b5132
RH		 13928 BFD_ASSERT (s != NULL);
13929
00a97672 13930 rel.r_addend = 0;
252b5132
RH		 13931 rel.r_offset = (h->root.u.def.value
13932 + h->root.u.def.section->output_section->vma
13933 + h->root.u.def.section->output_offset);
13934 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 13935 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 13936 }
13937
00a97672
RS		 13938 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13939 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13940 to the ".got" section. */
252b5132 13941 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 13942 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 13943 sym->st_shndx = SHN_ABS;
13944
b34976b6 13945 return TRUE;
252b5132
RH		 13946}
13947
0855e32b
NS		 13948static void
13949arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13950 void *contents,
13951 const unsigned long *template, unsigned count)
13952{
13953 unsigned ix;
b38cadfb 13954
0855e32b
NS		 13955 for (ix = 0; ix != count; ix++)
13956 {
13957 unsigned long insn = template[ix];
13958
13959 /* Emit mov pc,rx if bx is not permitted. */
13960 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13961 insn = (insn & 0xf000000f) | 0x01a0f000;
13962 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13963 }
13964}
13965
252b5132
RH		 13966/* Finish up the dynamic sections. */
13967
b34976b6 13968static bfd_boolean
57e8b36a 13969elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 13970{
13971 bfd * dynobj;
13972 asection * sgot;
13973 asection * sdyn;
4dfe6ac6
NC		 13974 struct elf32_arm_link_hash_table *htab;
13975
13976 htab = elf32_arm_hash_table (info);
13977 if (htab == NULL)
13978 return FALSE;
252b5132
RH		 13979
13980 dynobj = elf_hash_table (info)->dynobj;
13981
362d30a1 13982 sgot = htab->root.sgotplt;
894891db
NC		 13983 /* A broken linker script might have discarded the dynamic sections.
13984 Catch this here so that we do not seg-fault later on. */
13985 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
13986 return FALSE;
252b5132
RH		 13987 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13988
13989 if (elf_hash_table (info)->dynamic_sections_created)
13990 {
13991 asection *splt;
13992 Elf32_External_Dyn *dyncon, *dynconend;
13993
362d30a1 13994 splt = htab->root.splt;
24a1ba0f 13995 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 13996 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 13997
13998 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 13999 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14000
252b5132
RH		 14001 for (; dyncon < dynconend; dyncon++)
14002 {
14003 Elf_Internal_Dyn dyn;
14004 const char * name;
14005 asection * s;
14006
14007 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14008
14009 switch (dyn.d_tag)
14010 {
229fcec5
MM		 14011 unsigned int type;
14012
252b5132 14013 default:
7a2b07ff
NS		 14014 if (htab->vxworks_p
14015 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14016 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14017 break;
14018
229fcec5
MM		 14019 case DT_HASH:
14020 name = ".hash";
14021 goto get_vma_if_bpabi;
14022 case DT_STRTAB:
14023 name = ".dynstr";
14024 goto get_vma_if_bpabi;
14025 case DT_SYMTAB:
14026 name = ".dynsym";
14027 goto get_vma_if_bpabi;
c0042f5d
MM		 14028 case DT_VERSYM:
14029 name = ".gnu.version";
14030 goto get_vma_if_bpabi;
14031 case DT_VERDEF:
14032 name = ".gnu.version_d";
14033 goto get_vma_if_bpabi;
14034 case DT_VERNEED:
14035 name = ".gnu.version_r";
14036 goto get_vma_if_bpabi;
14037
252b5132
RH		 14038 case DT_PLTGOT:
14039 name = ".got";
14040 goto get_vma;
14041 case DT_JMPREL:
00a97672 14042 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14043 get_vma:
14044 s = bfd_get_section_by_name (output_bfd, name);
14045 BFD_ASSERT (s != NULL);
229fcec5
MM		 14046 if (!htab->symbian_p)
14047 dyn.d_un.d_ptr = s->vma;
14048 else
14049 /* In the BPABI, tags in the PT_DYNAMIC section point
14050 at the file offset, not the memory address, for the
14051 convenience of the post linker. */
14052 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14053 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14054 break;
14055
229fcec5
MM		 14056 get_vma_if_bpabi:
14057 if (htab->symbian_p)
14058 goto get_vma;
14059 break;
14060
252b5132 14061 case DT_PLTRELSZ:
362d30a1 14062 s = htab->root.srelplt;
252b5132 14063 BFD_ASSERT (s != NULL);
eea6121a 14064 dyn.d_un.d_val = s->size;
252b5132
RH		 14065 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14066 break;
906e58ca 14067
252b5132 14068 case DT_RELSZ:
00a97672 14069 case DT_RELASZ:
229fcec5
MM		 14070 if (!htab->symbian_p)
14071 {
14072 /* My reading of the SVR4 ABI indicates that the
14073 procedure linkage table relocs (DT_JMPREL) should be
14074 included in the overall relocs (DT_REL). This is
14075 what Solaris does. However, UnixWare can not handle
14076 that case. Therefore, we override the DT_RELSZ entry
14077 here to make it not include the JMPREL relocs. Since
00a97672 14078 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14079 other relocation sections, we don't have to worry
14080 about changing the DT_REL entry. */
362d30a1 14081 s = htab->root.srelplt;
229fcec5
MM		 14082 if (s != NULL)
14083 dyn.d_un.d_val -= s->size;
14084 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14085 break;
14086 }
8029a119 14087 /* Fall through. */
229fcec5
MM		 14088
14089 case DT_REL:
14090 case DT_RELA:
229fcec5
MM		 14091 /* In the BPABI, the DT_REL tag must point at the file
14092 offset, not the VMA, of the first relocation
14093 section. So, we use code similar to that in
14094 elflink.c, but do not check for SHF_ALLOC on the
14095 relcoation section, since relocations sections are
14096 never allocated under the BPABI. The comments above
14097 about Unixware notwithstanding, we include all of the
14098 relocations here. */
14099 if (htab->symbian_p)
14100 {
14101 unsigned int i;
14102 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14103 ? SHT_REL : SHT_RELA);
14104 dyn.d_un.d_val = 0;
14105 for (i = 1; i < elf_numsections (output_bfd); i++)
14106 {
906e58ca 14107 Elf_Internal_Shdr *hdr
229fcec5
MM		 14108 = elf_elfsections (output_bfd)[i];
14109 if (hdr->sh_type == type)
14110 {
906e58ca 14111 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14112 || dyn.d_tag == DT_RELASZ)
14113 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14114 else if ((ufile_ptr) hdr->sh_offset
14115 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14116 dyn.d_un.d_val = hdr->sh_offset;
14117 }
14118 }
14119 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14120 }
252b5132 14121 break;
88f7bcd5 14122
0855e32b
NS		 14123 case DT_TLSDESC_PLT:
14124 s = htab->root.splt;
14125 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14126 + htab->dt_tlsdesc_plt);
14127 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14128 break;
14129
14130 case DT_TLSDESC_GOT:
14131 s = htab->root.sgot;
14132 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14133 + htab->dt_tlsdesc_got);
14134 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14135 break;
14136
88f7bcd5
NC		 14137 /* Set the bottom bit of DT_INIT/FINI if the
14138 corresponding function is Thumb. */
14139 case DT_INIT:
14140 name = info->init_function;
14141 goto get_sym;
14142 case DT_FINI:
14143 name = info->fini_function;
14144 get_sym:
14145 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14146 then there is nothing to adjust. */
88f7bcd5
NC		 14147 if (dyn.d_un.d_val != 0)
14148 {
14149 struct elf_link_hash_entry * eh;
14150
14151 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14152 FALSE, FALSE, TRUE);
35fc36a8 14153 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14154 {
14155 dyn.d_un.d_val |= 1;
b34976b6 14156 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14157 }
14158 }
14159 break;
252b5132
RH		 14160 }
14161 }
14162
24a1ba0f 14163 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14164 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14165 {
00a97672
RS		 14166 const bfd_vma *plt0_entry;
14167 bfd_vma got_address, plt_address, got_displacement;
14168
14169 /* Calculate the addresses of the GOT and PLT. */
14170 got_address = sgot->output_section->vma + sgot->output_offset;
14171 plt_address = splt->output_section->vma + splt->output_offset;
14172
14173 if (htab->vxworks_p)
14174 {
14175 /* The VxWorks GOT is relocated by the dynamic linker.
14176 Therefore, we must emit relocations rather than simply
14177 computing the values now. */
14178 Elf_Internal_Rela rel;
14179
14180 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14181 put_arm_insn (htab, output_bfd, plt0_entry[0],
14182 splt->contents + 0);
14183 put_arm_insn (htab, output_bfd, plt0_entry[1],
14184 splt->contents + 4);
14185 put_arm_insn (htab, output_bfd, plt0_entry[2],
14186 splt->contents + 8);
00a97672
RS		 14187 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14188
8029a119 14189 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14190 rel.r_offset = plt_address + 12;
14191 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14192 rel.r_addend = 0;
14193 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14194 htab->srelplt2->contents);
14195 }
b38cadfb
NC		 14196 else if (htab->nacl_p)
14197 {
14198 unsigned int i;
14199
14200 got_displacement = got_address + 8 - (plt_address + 16);
14201
14202 put_arm_insn (htab, output_bfd,
14203 elf32_arm_nacl_plt0_entry[0]
14204 | arm_movw_immediate (got_displacement),
14205 splt->contents + 0);
14206 put_arm_insn (htab, output_bfd,
14207 elf32_arm_nacl_plt0_entry[1]
14208 | arm_movt_immediate (got_displacement),
14209 splt->contents + 4);
14210 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14211 put_arm_insn (htab, output_bfd,
14212 elf32_arm_nacl_plt0_entry[i],
14213 splt->contents + (i * 4));
14214 }
00a97672
RS		 14215 else
14216 {
14217 got_displacement = got_address - (plt_address + 16);
14218
14219 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14220 put_arm_insn (htab, output_bfd, plt0_entry[0],
14221 splt->contents + 0);
14222 put_arm_insn (htab, output_bfd, plt0_entry[1],
14223 splt->contents + 4);
14224 put_arm_insn (htab, output_bfd, plt0_entry[2],
14225 splt->contents + 8);
14226 put_arm_insn (htab, output_bfd, plt0_entry[3],
14227 splt->contents + 12);
5e681ec4 14228
5e681ec4 14229#ifdef FOUR_WORD_PLT
00a97672
RS		 14230 /* The displacement value goes in the otherwise-unused
14231 last word of the second entry. */
14232 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14233#else
00a97672 14234 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14235#endif
00a97672 14236 }
f7a74f8c 14237 }
252b5132
RH		 14238
14239 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14240 really seem like the right value. */
74541ad4
AM		 14241 if (splt->output_section->owner == output_bfd)
14242 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14243
0855e32b
NS		 14244 if (htab->dt_tlsdesc_plt)
14245 {
14246 bfd_vma got_address
14247 = sgot->output_section->vma + sgot->output_offset;
14248 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14249 + htab->root.sgot->output_offset);
14250 bfd_vma plt_address
14251 = splt->output_section->vma + splt->output_offset;
14252
b38cadfb 14253 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14254 splt->contents + htab->dt_tlsdesc_plt,
14255 dl_tlsdesc_lazy_trampoline, 6);
14256
14257 bfd_put_32 (output_bfd,
14258 gotplt_address + htab->dt_tlsdesc_got
14259 - (plt_address + htab->dt_tlsdesc_plt)
14260 - dl_tlsdesc_lazy_trampoline[6],
14261 splt->contents + htab->dt_tlsdesc_plt + 24);
14262 bfd_put_32 (output_bfd,
14263 got_address - (plt_address + htab->dt_tlsdesc_plt)
14264 - dl_tlsdesc_lazy_trampoline[7],
14265 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14266 }
14267
14268 if (htab->tls_trampoline)
14269 {
b38cadfb 14270 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14271 splt->contents + htab->tls_trampoline,
14272 tls_trampoline, 3);
14273#ifdef FOUR_WORD_PLT
14274 bfd_put_32 (output_bfd, 0x00000000,
14275 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14276#endif
0855e32b
NS		 14277 }
14278
362d30a1 14279 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14280 {
14281 /* Correct the .rel(a).plt.unloaded relocations. They will have
14282 incorrect symbol indexes. */
14283 int num_plts;
eed62c48 14284 unsigned char *p;
00a97672 14285
362d30a1 14286 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14287 / htab->plt_entry_size);
14288 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14289
14290 for (; num_plts; num_plts--)
14291 {
14292 Elf_Internal_Rela rel;
14293
14294 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14295 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14296 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14297 p += RELOC_SIZE (htab);
14298
14299 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14300 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14301 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14302 p += RELOC_SIZE (htab);
14303 }
14304 }
252b5132
RH		 14305 }
14306
14307 /* Fill in the first three entries in the global offset table. */
229fcec5 14308 if (sgot)
252b5132 14309 {
229fcec5
MM		 14310 if (sgot->size > 0)
14311 {
14312 if (sdyn == NULL)
14313 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14314 else
14315 bfd_put_32 (output_bfd,
14316 sdyn->output_section->vma + sdyn->output_offset,
14317 sgot->contents);
14318 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14319 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14320 }
252b5132 14321
229fcec5
MM		 14322 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14323 }
252b5132 14324
b34976b6 14325 return TRUE;
252b5132
RH		 14326}
14327
ba96a88f 14328static void
57e8b36a 14329elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14330{
9b485d32 14331 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14332 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14333
14334 i_ehdrp = elf_elfheader (abfd);
14335
94a3258f
PB		 14336 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14337 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14338 else
14339 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14340 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14341
93204d3a
PB		 14342 if (link_info)
14343 {
14344 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14345 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14346 i_ehdrp->e_flags |= EF_ARM_BE8;
14347 }
ba96a88f
NC		 14348}
14349
99e4ae17 14350static enum elf_reloc_type_class
57e8b36a 14351elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 14352{
f51e552e 14353 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14354 {
14355 case R_ARM_RELATIVE:
14356 return reloc_class_relative;
14357 case R_ARM_JUMP_SLOT:
14358 return reloc_class_plt;
14359 case R_ARM_COPY:
14360 return reloc_class_copy;
14361 default:
14362 return reloc_class_normal;
14363 }
14364}
14365
e489d0ae 14366static void
57e8b36a 14367elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14368{
5a6c6817 14369 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14370}
14371
40a18ebd
NC		 14372/* Return TRUE if this is an unwinding table entry. */
14373
14374static bfd_boolean
14375is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14376{
0112cd26
NC		 14377 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14378 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14379}
14380
14381
14382/* Set the type and flags for an ARM section. We do this by
14383 the section name, which is a hack, but ought to work. */
14384
14385static bfd_boolean
14386elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14387{
14388 const char * name;
14389
14390 name = bfd_get_section_name (abfd, sec);
14391
14392 if (is_arm_elf_unwind_section_name (abfd, name))
14393 {
14394 hdr->sh_type = SHT_ARM_EXIDX;
14395 hdr->sh_flags |= SHF_LINK_ORDER;
14396 }
14397 return TRUE;
14398}
14399
6dc132d9
L		 14400/* Handle an ARM specific section when reading an object file. This is
14401 called when bfd_section_from_shdr finds a section with an unknown
14402 type. */
40a18ebd
NC		 14403
14404static bfd_boolean
14405elf32_arm_section_from_shdr (bfd *abfd,
14406 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14407 const char *name,
14408 int shindex)
40a18ebd
NC		 14409{
14410 /* There ought to be a place to keep ELF backend specific flags, but
14411 at the moment there isn't one. We just keep track of the
14412 sections by their name, instead. Fortunately, the ABI gives
14413 names for all the ARM specific sections, so we will probably get
14414 away with this. */
14415 switch (hdr->sh_type)
14416 {
14417 case SHT_ARM_EXIDX:
0951f019
RE		 14418 case SHT_ARM_PREEMPTMAP:
14419 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14420 break;
14421
14422 default:
14423 return FALSE;
14424 }
14425
6dc132d9 14426 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14427 return FALSE;
14428
14429 return TRUE;
14430}
e489d0ae 14431
44444f50
NC		 14432static _arm_elf_section_data *
14433get_arm_elf_section_data (asection * sec)
14434{
47b2e99c
JZ		 14435 if (sec && sec->owner && is_arm_elf (sec->owner))
14436 return elf32_arm_section_data (sec);
44444f50
NC		 14437 else
14438 return NULL;
8e3de13a
NC		 14439}
14440
4e617b1e
PB		 14441typedef struct
14442{
14443 void *finfo;
14444 struct bfd_link_info *info;
91a5743d
PB		 14445 asection *sec;
14446 int sec_shndx;
6e0b88f1
AM		 14447 int (*func) (void *, const char *, Elf_Internal_Sym *,
14448 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14449} output_arch_syminfo;
14450
14451enum map_symbol_type
14452{
14453 ARM_MAP_ARM,
14454 ARM_MAP_THUMB,
14455 ARM_MAP_DATA
14456};
14457
14458
7413f23f 14459/* Output a single mapping symbol. */
4e617b1e
PB		 14460
14461static bfd_boolean
7413f23f
DJ		 14462elf32_arm_output_map_sym (output_arch_syminfo *osi,
14463 enum map_symbol_type type,
14464 bfd_vma offset)
4e617b1e
PB		 14465{
14466 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14467 Elf_Internal_Sym sym;
14468
91a5743d
PB		 14469 sym.st_value = osi->sec->output_section->vma
14470 + osi->sec->output_offset
14471 + offset;
4e617b1e
PB		 14472 sym.st_size = 0;
14473 sym.st_other = 0;
14474 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14475 sym.st_shndx = osi->sec_shndx;
35fc36a8 14476 sym.st_target_internal = 0;
fe33d2fa 14477 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 14478 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14479}
14480
34e77a92
RS		 14481/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14482 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14483
14484static bfd_boolean
34e77a92
RS		 14485elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14486 bfd_boolean is_iplt_entry_p,
14487 union gotplt_union *root_plt,
14488 struct arm_plt_info *arm_plt)
4e617b1e 14489{
4e617b1e 14490 struct elf32_arm_link_hash_table *htab;
34e77a92 14491 bfd_vma addr, plt_header_size;
4e617b1e 14492
34e77a92 14493 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14494 return TRUE;
14495
4dfe6ac6
NC		 14496 htab = elf32_arm_hash_table (osi->info);
14497 if (htab == NULL)
14498 return FALSE;
14499
34e77a92
RS		 14500 if (is_iplt_entry_p)
14501 {
14502 osi->sec = htab->root.iplt;
14503 plt_header_size = 0;
14504 }
14505 else
14506 {
14507 osi->sec = htab->root.splt;
14508 plt_header_size = htab->plt_header_size;
14509 }
14510 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14511 (osi->info->output_bfd, osi->sec->output_section));
14512
14513 addr = root_plt->offset & -2;
4e617b1e
PB		 14514 if (htab->symbian_p)
14515 {
7413f23f 14516 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14517 return FALSE;
7413f23f 14518 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14519 return FALSE;
14520 }
14521 else if (htab->vxworks_p)
14522 {
7413f23f 14523 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14524 return FALSE;
7413f23f 14525 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14526 return FALSE;
7413f23f 14527 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14528 return FALSE;
7413f23f 14529 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14530 return FALSE;
14531 }
b38cadfb
NC		 14532 else if (htab->nacl_p)
14533 {
14534 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14535 return FALSE;
14536 }
4e617b1e
PB		 14537 else
14538 {
34e77a92 14539 bfd_boolean thumb_stub_p;
bd97cb95 14540
34e77a92
RS		 14541 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14542 if (thumb_stub_p)
4e617b1e 14543 {
7413f23f 14544 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14545 return FALSE;
14546 }
14547#ifdef FOUR_WORD_PLT
7413f23f 14548 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14549 return FALSE;
7413f23f 14550 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14551 return FALSE;
14552#else
906e58ca 14553 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14554 so only need to output a mapping symbol for the first PLT entry and
14555 entries with thumb thunks. */
34e77a92 14556 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14557 {
7413f23f 14558 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14559 return FALSE;
14560 }
14561#endif
14562 }
14563
14564 return TRUE;
14565}
14566
34e77a92
RS		 14567/* Output mapping symbols for PLT entries associated with H. */
14568
14569static bfd_boolean
14570elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14571{
14572 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14573 struct elf32_arm_link_hash_entry *eh;
14574
14575 if (h->root.type == bfd_link_hash_indirect)
14576 return TRUE;
14577
14578 if (h->root.type == bfd_link_hash_warning)
14579 /* When warning symbols are created, they **replace** the "real"
14580 entry in the hash table, thus we never get to see the real
14581 symbol in a hash traversal. So look at it now. */
14582 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14583
14584 eh = (struct elf32_arm_link_hash_entry *) h;
14585 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14586 &h->plt, &eh->plt);
14587}
14588
7413f23f
DJ		 14589/* Output a single local symbol for a generated stub. */
14590
14591static bfd_boolean
14592elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14593 bfd_vma offset, bfd_vma size)
14594{
7413f23f
DJ		 14595 Elf_Internal_Sym sym;
14596
7413f23f
DJ		 14597 sym.st_value = osi->sec->output_section->vma
14598 + osi->sec->output_offset
14599 + offset;
14600 sym.st_size = size;
14601 sym.st_other = 0;
14602 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14603 sym.st_shndx = osi->sec_shndx;
35fc36a8 14604 sym.st_target_internal = 0;
6e0b88f1 14605 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14606}
4e617b1e 14607
da5938a2 14608static bfd_boolean
8029a119
NC		 14609arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14610 void * in_arg)
da5938a2
NC		 14611{
14612 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14613 asection *stub_sec;
14614 bfd_vma addr;
7413f23f 14615 char *stub_name;
9a008db3 14616 output_arch_syminfo *osi;
d3ce72d0 14617 const insn_sequence *template_sequence;
461a49ca
DJ		 14618 enum stub_insn_type prev_type;
14619 int size;
14620 int i;
14621 enum map_symbol_type sym_type;
da5938a2
NC		 14622
14623 /* Massage our args to the form they really have. */
14624 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14625 osi = (output_arch_syminfo *) in_arg;
da5938a2 14626
da5938a2
NC		 14627 stub_sec = stub_entry->stub_sec;
14628
14629 /* Ensure this stub is attached to the current section being
7413f23f 14630 processed. */
da5938a2
NC		 14631 if (stub_sec != osi->sec)
14632 return TRUE;
14633
7413f23f
DJ		 14634 addr = (bfd_vma) stub_entry->stub_offset;
14635 stub_name = stub_entry->output_name;
da5938a2 14636
d3ce72d0
NC		 14637 template_sequence = stub_entry->stub_template;
14638 switch (template_sequence[0].type)
7413f23f 14639 {
461a49ca
DJ		 14640 case ARM_TYPE:
14641 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14642 return FALSE;
14643 break;
461a49ca 14644 case THUMB16_TYPE:
48229727 14645 case THUMB32_TYPE:
461a49ca
DJ		 14646 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14647 stub_entry->stub_size))
da5938a2
NC		 14648 return FALSE;
14649 break;
14650 default:
14651 BFD_FAIL ();
48229727 14652 return 0;
7413f23f 14653 }
da5938a2 14654
461a49ca
DJ		 14655 prev_type = DATA_TYPE;
14656 size = 0;
14657 for (i = 0; i < stub_entry->stub_template_size; i++)
14658 {
d3ce72d0 14659 switch (template_sequence[i].type)
461a49ca
DJ		 14660 {
14661 case ARM_TYPE:
14662 sym_type = ARM_MAP_ARM;
14663 break;
14664
14665 case THUMB16_TYPE:
48229727 14666 case THUMB32_TYPE:
461a49ca
DJ		 14667 sym_type = ARM_MAP_THUMB;
14668 break;
14669
14670 case DATA_TYPE:
14671 sym_type = ARM_MAP_DATA;
14672 break;
14673
14674 default:
14675 BFD_FAIL ();
4e31c731 14676 return FALSE;
461a49ca
DJ		 14677 }
14678
d3ce72d0 14679 if (template_sequence[i].type != prev_type)
461a49ca 14680 {
d3ce72d0 14681 prev_type = template_sequence[i].type;
461a49ca
DJ		 14682 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14683 return FALSE;
14684 }
14685
d3ce72d0 14686 switch (template_sequence[i].type)
461a49ca
DJ		 14687 {
14688 case ARM_TYPE:
48229727 14689 case THUMB32_TYPE:
461a49ca
DJ		 14690 size += 4;
14691 break;
14692
14693 case THUMB16_TYPE:
14694 size += 2;
14695 break;
14696
14697 case DATA_TYPE:
14698 size += 4;
14699 break;
14700
14701 default:
14702 BFD_FAIL ();
4e31c731 14703 return FALSE;
461a49ca
DJ		 14704 }
14705 }
14706
da5938a2
NC		 14707 return TRUE;
14708}
14709
33811162
DG		 14710/* Output mapping symbols for linker generated sections,
14711 and for those data-only sections that do not have a
14712 $d. */
4e617b1e
PB		 14713
14714static bfd_boolean
14715elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 14716 struct bfd_link_info *info,
14717 void *finfo,
6e0b88f1
AM		 14718 int (*func) (void *, const char *,
14719 Elf_Internal_Sym *,
14720 asection *,
14721 struct elf_link_hash_entry *))
4e617b1e
PB		 14722{
14723 output_arch_syminfo osi;
14724 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14725 bfd_vma offset;
14726 bfd_size_type size;
33811162 14727 bfd *input_bfd;
4e617b1e
PB		 14728
14729 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14730 if (htab == NULL)
14731 return FALSE;
14732
906e58ca 14733 check_use_blx (htab);
91a5743d 14734
4e617b1e
PB		 14735 osi.finfo = finfo;
14736 osi.info = info;
14737 osi.func = func;
906e58ca 14738
33811162
DG		 14739 /* Add a $d mapping symbol to data-only sections that
14740 don't have any mapping symbol. This may result in (harmless) redundant
14741 mapping symbols. */
14742 for (input_bfd = info->input_bfds;
14743 input_bfd != NULL;
14744 input_bfd = input_bfd->link_next)
14745 {
14746 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14747 for (osi.sec = input_bfd->sections;
14748 osi.sec != NULL;
14749 osi.sec = osi.sec->next)
14750 {
14751 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14752 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14753 != 0)
33811162
DG		 14754 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14755 == SEC_HAS_CONTENTS
14756 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14757 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14758 && osi.sec->size > 0
14759 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14760 {
14761 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14762 (output_bfd, osi.sec->output_section);
14763 if (osi.sec_shndx != (int)SHN_BAD)
14764 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14765 }
14766 }
14767 }
14768
91a5743d
PB		 14769 /* ARM->Thumb glue. */
14770 if (htab->arm_glue_size > 0)
14771 {
14772 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14773 ARM2THUMB_GLUE_SECTION_NAME);
14774
14775 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14776 (output_bfd, osi.sec->output_section);
14777 if (info->shared || htab->root.is_relocatable_executable
14778 || htab->pic_veneer)
14779 size = ARM2THUMB_PIC_GLUE_SIZE;
14780 else if (htab->use_blx)
14781 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14782 else
14783 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14784
91a5743d
PB		 14785 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14786 {
7413f23f
DJ		 14787 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14788 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14789 }
14790 }
14791
14792 /* Thumb->ARM glue. */
14793 if (htab->thumb_glue_size > 0)
14794 {
14795 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14796 THUMB2ARM_GLUE_SECTION_NAME);
14797
14798 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14799 (output_bfd, osi.sec->output_section);
14800 size = THUMB2ARM_GLUE_SIZE;
14801
14802 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14803 {
7413f23f
DJ		 14804 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14805 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14806 }
14807 }
14808
845b51d6
PB		 14809 /* ARMv4 BX veneers. */
14810 if (htab->bx_glue_size > 0)
14811 {
14812 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14813 ARM_BX_GLUE_SECTION_NAME);
14814
14815 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14816 (output_bfd, osi.sec->output_section);
14817
7413f23f 14818 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14819 }
14820
8029a119
NC		 14821 /* Long calls stubs. */
14822 if (htab->stub_bfd && htab->stub_bfd->sections)
14823 {
da5938a2 14824 asection* stub_sec;
8029a119 14825
da5938a2
NC		 14826 for (stub_sec = htab->stub_bfd->sections;
14827 stub_sec != NULL;
8029a119
NC		 14828 stub_sec = stub_sec->next)
14829 {
14830 /* Ignore non-stub sections. */
14831 if (!strstr (stub_sec->name, STUB_SUFFIX))
14832 continue;
da5938a2 14833
8029a119 14834 osi.sec = stub_sec;
da5938a2 14835
8029a119
NC		 14836 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14837 (output_bfd, osi.sec->output_section);
da5938a2 14838
8029a119
NC		 14839 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14840 }
14841 }
da5938a2 14842
91a5743d 14843 /* Finally, output mapping symbols for the PLT. */
34e77a92 14844 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 14845 {
34e77a92
RS		 14846 osi.sec = htab->root.splt;
14847 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14848 (output_bfd, osi.sec->output_section));
14849
14850 /* Output mapping symbols for the plt header. SymbianOS does not have a
14851 plt header. */
14852 if (htab->vxworks_p)
14853 {
14854 /* VxWorks shared libraries have no PLT header. */
14855 if (!info->shared)
14856 {
14857 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14858 return FALSE;
14859 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14860 return FALSE;
14861 }
14862 }
b38cadfb
NC		 14863 else if (htab->nacl_p)
14864 {
14865 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14866 return FALSE;
14867 }
34e77a92 14868 else if (!htab->symbian_p)
4e617b1e 14869 {
7413f23f 14870 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 14871 return FALSE;
34e77a92
RS		 14872#ifndef FOUR_WORD_PLT
14873 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 14874 return FALSE;
34e77a92 14875#endif
4e617b1e
PB		 14876 }
14877 }
34e77a92
RS		 14878 if ((htab->root.splt && htab->root.splt->size > 0)
14879 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 14880 {
34e77a92
RS		 14881 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14882 for (input_bfd = info->input_bfds;
14883 input_bfd != NULL;
14884 input_bfd = input_bfd->link_next)
14885 {
14886 struct arm_local_iplt_info **local_iplt;
14887 unsigned int i, num_syms;
4e617b1e 14888
34e77a92
RS		 14889 local_iplt = elf32_arm_local_iplt (input_bfd);
14890 if (local_iplt != NULL)
14891 {
14892 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14893 for (i = 0; i < num_syms; i++)
14894 if (local_iplt[i] != NULL
14895 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14896 &local_iplt[i]->root,
14897 &local_iplt[i]->arm))
14898 return FALSE;
14899 }
14900 }
14901 }
0855e32b
NS		 14902 if (htab->dt_tlsdesc_plt != 0)
14903 {
14904 /* Mapping symbols for the lazy tls trampoline. */
14905 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14906 return FALSE;
b38cadfb 14907
0855e32b
NS		 14908 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14909 htab->dt_tlsdesc_plt + 24))
14910 return FALSE;
14911 }
14912 if (htab->tls_trampoline != 0)
14913 {
14914 /* Mapping symbols for the tls trampoline. */
14915 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14916 return FALSE;
14917#ifdef FOUR_WORD_PLT
14918 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14919 htab->tls_trampoline + 12))
14920 return FALSE;
b38cadfb 14921#endif
0855e32b 14922 }
b38cadfb 14923
4e617b1e
PB		 14924 return TRUE;
14925}
14926
e489d0ae
PB		 14927/* Allocate target specific section data. */
14928
14929static bfd_boolean
14930elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14931{
f592407e
AM		 14932 if (!sec->used_by_bfd)
14933 {
14934 _arm_elf_section_data *sdata;
14935 bfd_size_type amt = sizeof (*sdata);
e489d0ae 14936
21d799b5 14937 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 14938 if (sdata == NULL)
14939 return FALSE;
14940 sec->used_by_bfd = sdata;
14941 }
e489d0ae
PB		 14942
14943 return _bfd_elf_new_section_hook (abfd, sec);
14944}
14945
14946
14947/* Used to order a list of mapping symbols by address. */
14948
14949static int
14950elf32_arm_compare_mapping (const void * a, const void * b)
14951{
7f6a71ff
JM		 14952 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14953 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14954
14955 if (amap->vma > bmap->vma)
14956 return 1;
14957 else if (amap->vma < bmap->vma)
14958 return -1;
14959 else if (amap->type > bmap->type)
14960 /* Ensure results do not depend on the host qsort for objects with
14961 multiple mapping symbols at the same address by sorting on type
14962 after vma. */
14963 return 1;
14964 else if (amap->type < bmap->type)
14965 return -1;
14966 else
14967 return 0;
e489d0ae
PB		 14968}
14969
2468f9c9
PB		 14970/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14971
14972static unsigned long
14973offset_prel31 (unsigned long addr, bfd_vma offset)
14974{
14975 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14976}
14977
14978/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14979 relocations. */
14980
14981static void
14982copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14983{
14984 unsigned long first_word = bfd_get_32 (output_bfd, from);
14985 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 14986
2468f9c9
PB		 14987 /* High bit of first word is supposed to be zero. */
14988 if ((first_word & 0x80000000ul) == 0)
14989 first_word = offset_prel31 (first_word, offset);
b38cadfb 14990
2468f9c9
PB		 14991 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14992 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14993 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14994 second_word = offset_prel31 (second_word, offset);
b38cadfb 14995
2468f9c9
PB		 14996 bfd_put_32 (output_bfd, first_word, to);
14997 bfd_put_32 (output_bfd, second_word, to + 4);
14998}
e489d0ae 14999
48229727
JB		 15000/* Data for make_branch_to_a8_stub(). */
15001
b38cadfb
NC		 15002struct a8_branch_to_stub_data
15003{
48229727
JB		 15004 asection *writing_section;
15005 bfd_byte *contents;
15006};
15007
15008
15009/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15010 places for a particular section. */
15011
15012static bfd_boolean
15013make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15014 void *in_arg)
15015{
15016 struct elf32_arm_stub_hash_entry *stub_entry;
15017 struct a8_branch_to_stub_data *data;
15018 bfd_byte *contents;
15019 unsigned long branch_insn;
15020 bfd_vma veneered_insn_loc, veneer_entry_loc;
15021 bfd_signed_vma branch_offset;
15022 bfd *abfd;
91d6fa6a 15023 unsigned int target;
48229727
JB		 15024
15025 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15026 data = (struct a8_branch_to_stub_data *) in_arg;
15027
15028 if (stub_entry->target_section != data->writing_section
4563a860 15029 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15030 return TRUE;
15031
15032 contents = data->contents;
15033
15034 veneered_insn_loc = stub_entry->target_section->output_section->vma
15035 + stub_entry->target_section->output_offset
15036 + stub_entry->target_value;
15037
15038 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15039 + stub_entry->stub_sec->output_offset
15040 + stub_entry->stub_offset;
15041
15042 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15043 veneered_insn_loc &= ~3u;
15044
15045 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15046
15047 abfd = stub_entry->target_section->owner;
91d6fa6a 15048 target = stub_entry->target_value;
48229727
JB		 15049
15050 /* We attempt to avoid this condition by setting stubs_always_after_branch
15051 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15052 This check is just to be on the safe side... */
15053 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15054 {
15055 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15056 "allocated in unsafe location"), abfd);
15057 return FALSE;
15058 }
15059
15060 switch (stub_entry->stub_type)
15061 {
15062 case arm_stub_a8_veneer_b:
15063 case arm_stub_a8_veneer_b_cond:
15064 branch_insn = 0xf0009000;
15065 goto jump24;
15066
15067 case arm_stub_a8_veneer_blx:
15068 branch_insn = 0xf000e800;
15069 goto jump24;
15070
15071 case arm_stub_a8_veneer_bl:
15072 {
15073 unsigned int i1, j1, i2, j2, s;
15074
15075 branch_insn = 0xf000d000;
15076
15077 jump24:
15078 if (branch_offset < -16777216 || branch_offset > 16777214)
15079 {
15080 /* There's not much we can do apart from complain if this
15081 happens. */
15082 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15083 "of range (input file too large)"), abfd);
15084 return FALSE;
15085 }
15086
15087 /* i1 = not(j1 eor s), so:
15088 not i1 = j1 eor s
15089 j1 = (not i1) eor s. */
15090
15091 branch_insn |= (branch_offset >> 1) & 0x7ff;
15092 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15093 i2 = (branch_offset >> 22) & 1;
15094 i1 = (branch_offset >> 23) & 1;
15095 s = (branch_offset >> 24) & 1;
15096 j1 = (!i1) ^ s;
15097 j2 = (!i2) ^ s;
15098 branch_insn |= j2 << 11;
15099 branch_insn |= j1 << 13;
15100 branch_insn |= s << 26;
15101 }
15102 break;
15103
15104 default:
15105 BFD_FAIL ();
15106 return FALSE;
15107 }
15108
91d6fa6a
NC		 15109 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15110 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15111
15112 return TRUE;
15113}
15114
e489d0ae
PB		 15115/* Do code byteswapping. Return FALSE afterwards so that the section is
15116 written out as normal. */
15117
15118static bfd_boolean
c7b8f16e 15119elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15120 struct bfd_link_info *link_info,
15121 asection *sec,
e489d0ae
PB		 15122 bfd_byte *contents)
15123{
48229727 15124 unsigned int mapcount, errcount;
8e3de13a 15125 _arm_elf_section_data *arm_data;
c7b8f16e 15126 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15127 elf32_arm_section_map *map;
c7b8f16e 15128 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15129 bfd_vma ptr;
15130 bfd_vma end;
c7b8f16e 15131 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15132 bfd_byte tmp;
48229727 15133 unsigned int i;
57e8b36a 15134
4dfe6ac6
NC		 15135 if (globals == NULL)
15136 return FALSE;
15137
8e3de13a
NC		 15138 /* If this section has not been allocated an _arm_elf_section_data
15139 structure then we cannot record anything. */
15140 arm_data = get_arm_elf_section_data (sec);
15141 if (arm_data == NULL)
15142 return FALSE;
15143
15144 mapcount = arm_data->mapcount;
15145 map = arm_data->map;
c7b8f16e
JB		 15146 errcount = arm_data->erratumcount;
15147
15148 if (errcount != 0)
15149 {
15150 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15151
15152 for (errnode = arm_data->erratumlist; errnode != 0;
15153 errnode = errnode->next)
15154 {
91d6fa6a 15155 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 15156
15157 switch (errnode->type)
15158 {
15159 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15160 {
15161 bfd_vma branch_to_veneer;
15162 /* Original condition code of instruction, plus bit mask for
15163 ARM B instruction. */
15164 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15165 | 0x0a000000;
15166
15167 /* The instruction is before the label. */
91d6fa6a 15168 target -= 4;
c7b8f16e
JB		 15169
15170 /* Above offset included in -4 below. */
15171 branch_to_veneer = errnode->u.b.veneer->vma
15172 - errnode->vma - 4;
15173
15174 if ((signed) branch_to_veneer < -(1 << 25)
15175 || (signed) branch_to_veneer >= (1 << 25))
15176 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15177 "range"), output_bfd);
15178
15179 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 15180 contents[endianflip ^ target] = insn & 0xff;
15181 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15182 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15183 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15184 }
15185 break;
15186
15187 case VFP11_ERRATUM_ARM_VENEER:
15188 {
15189 bfd_vma branch_from_veneer;
15190 unsigned int insn;
15191
15192 /* Take size of veneer into account. */
15193 branch_from_veneer = errnode->u.v.branch->vma
15194 - errnode->vma - 12;
15195
15196 if ((signed) branch_from_veneer < -(1 << 25)
15197 || (signed) branch_from_veneer >= (1 << 25))
15198 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15199 "range"), output_bfd);
15200
15201 /* Original instruction. */
15202 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 15203 contents[endianflip ^ target] = insn & 0xff;
15204 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15205 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15206 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15207
15208 /* Branch back to insn after original insn. */
15209 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 15210 contents[endianflip ^ (target + 4)] = insn & 0xff;
15211 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15212 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15213 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15214 }
15215 break;
15216
15217 default:
15218 abort ();
15219 }
15220 }
15221 }
e489d0ae 15222
2468f9c9
PB		 15223 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15224 {
15225 arm_unwind_table_edit *edit_node
15226 = arm_data->u.exidx.unwind_edit_list;
15227 /* Now, sec->size is the size of the section we will write. The original
15228 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15229 markers) was sec->rawsize. (This isn't the case if we perform no
15230 edits, then rawsize will be zero and we should use size). */
21d799b5 15231 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15232 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15233 unsigned int in_index, out_index;
15234 bfd_vma add_to_offsets = 0;
15235
15236 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15237 {
15238 if (edit_node)
15239 {
15240 unsigned int edit_index = edit_node->index;
b38cadfb 15241
2468f9c9
PB		 15242 if (in_index < edit_index && in_index * 8 < input_size)
15243 {
15244 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15245 contents + in_index * 8, add_to_offsets);
15246 out_index++;
15247 in_index++;
15248 }
15249 else if (in_index == edit_index
15250 || (in_index * 8 >= input_size
15251 && edit_index == UINT_MAX))
15252 {
15253 switch (edit_node->type)
15254 {
15255 case DELETE_EXIDX_ENTRY:
15256 in_index++;
15257 add_to_offsets += 8;
15258 break;
b38cadfb 15259
2468f9c9
PB		 15260 case INSERT_EXIDX_CANTUNWIND_AT_END:
15261 {
15262 asection *text_sec = edit_node->linked_section;
15263 bfd_vma text_offset = text_sec->output_section->vma
15264 + text_sec->output_offset
15265 + text_sec->size;
15266 bfd_vma exidx_offset = offset + out_index * 8;
15267 unsigned long prel31_offset;
15268
15269 /* Note: this is meant to be equivalent to an
15270 R_ARM_PREL31 relocation. These synthetic
15271 EXIDX_CANTUNWIND markers are not relocated by the
15272 usual BFD method. */
15273 prel31_offset = (text_offset - exidx_offset)
15274 & 0x7ffffffful;
15275
15276 /* First address we can't unwind. */
15277 bfd_put_32 (output_bfd, prel31_offset,
15278 &edited_contents[out_index * 8]);
15279
15280 /* Code for EXIDX_CANTUNWIND. */
15281 bfd_put_32 (output_bfd, 0x1,
15282 &edited_contents[out_index * 8 + 4]);
15283
15284 out_index++;
15285 add_to_offsets -= 8;
15286 }
15287 break;
15288 }
b38cadfb 15289
2468f9c9
PB		 15290 edit_node = edit_node->next;
15291 }
15292 }
15293 else
15294 {
15295 /* No more edits, copy remaining entries verbatim. */
15296 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15297 contents + in_index * 8, add_to_offsets);
15298 out_index++;
15299 in_index++;
15300 }
15301 }
15302
15303 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15304 bfd_set_section_contents (output_bfd, sec->output_section,
15305 edited_contents,
15306 (file_ptr) sec->output_offset, sec->size);
15307
15308 return TRUE;
15309 }
15310
48229727
JB		 15311 /* Fix code to point to Cortex-A8 erratum stubs. */
15312 if (globals->fix_cortex_a8)
15313 {
15314 struct a8_branch_to_stub_data data;
15315
15316 data.writing_section = sec;
15317 data.contents = contents;
15318
15319 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15320 &data);
15321 }
15322
e489d0ae
PB		 15323 if (mapcount == 0)
15324 return FALSE;
15325
c7b8f16e 15326 if (globals->byteswap_code)
e489d0ae 15327 {
c7b8f16e 15328 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15329
c7b8f16e
JB		 15330 ptr = map[0].vma;
15331 for (i = 0; i < mapcount; i++)
15332 {
15333 if (i == mapcount - 1)
15334 end = sec->size;
15335 else
15336 end = map[i + 1].vma;
e489d0ae 15337
c7b8f16e 15338 switch (map[i].type)
e489d0ae 15339 {
c7b8f16e
JB		 15340 case 'a':
15341 /* Byte swap code words. */
15342 while (ptr + 3 < end)
15343 {
15344 tmp = contents[ptr];
15345 contents[ptr] = contents[ptr + 3];
15346 contents[ptr + 3] = tmp;
15347 tmp = contents[ptr + 1];
15348 contents[ptr + 1] = contents[ptr + 2];
15349 contents[ptr + 2] = tmp;
15350 ptr += 4;
15351 }
15352 break;
e489d0ae 15353
c7b8f16e
JB		 15354 case 't':
15355 /* Byte swap code halfwords. */
15356 while (ptr + 1 < end)
15357 {
15358 tmp = contents[ptr];
15359 contents[ptr] = contents[ptr + 1];
15360 contents[ptr + 1] = tmp;
15361 ptr += 2;
15362 }
15363 break;
15364
15365 case 'd':
15366 /* Leave data alone. */
15367 break;
15368 }
15369 ptr = end;
15370 }
e489d0ae 15371 }
8e3de13a 15372
93204d3a 15373 free (map);
47b2e99c 15374 arm_data->mapcount = -1;
c7b8f16e 15375 arm_data->mapsize = 0;
8e3de13a 15376 arm_data->map = NULL;
8e3de13a 15377
e489d0ae
PB		 15378 return FALSE;
15379}
15380
0beaef2b
PB		 15381/* Mangle thumb function symbols as we read them in. */
15382
8384fb8f 15383static bfd_boolean
0beaef2b
PB		 15384elf32_arm_swap_symbol_in (bfd * abfd,
15385 const void *psrc,
15386 const void *pshn,
15387 Elf_Internal_Sym *dst)
15388{
8384fb8f
AM		 15389 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15390 return FALSE;
0beaef2b
PB		 15391
15392 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15393 the address. */
63e1a0fc
PB		 15394 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15395 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15396 {
63e1a0fc
PB		 15397 if (dst->st_value & 1)
15398 {
15399 dst->st_value &= ~(bfd_vma) 1;
15400 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15401 }
15402 else
15403 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15404 }
15405 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15406 {
15407 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15408 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15409 }
35fc36a8
RS		 15410 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15411 dst->st_target_internal = ST_BRANCH_LONG;
15412 else
63e1a0fc 15413 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15414
8384fb8f 15415 return TRUE;
0beaef2b
PB		 15416}
15417
15418
15419/* Mangle thumb function symbols as we write them out. */
15420
15421static void
15422elf32_arm_swap_symbol_out (bfd *abfd,
15423 const Elf_Internal_Sym *src,
15424 void *cdst,
15425 void *shndx)
15426{
15427 Elf_Internal_Sym newsym;
15428
15429 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15430 of the address set, as per the new EABI. We do this unconditionally
15431 because objcopy does not set the elf header flags until after
15432 it writes out the symbol table. */
35fc36a8 15433 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15434 {
15435 newsym = *src;
34e77a92
RS		 15436 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15437 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 15438 if (newsym.st_shndx != SHN_UNDEF)
15439 {
15440 /* Do this only for defined symbols. At link type, the static
15441 linker will simulate the work of dynamic linker of resolving
15442 symbols and will carry over the thumbness of found symbols to
15443 the output symbol table. It's not clear how it happens, but
b0fead2b 15444 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 15445 runtime, and writing '1' for them will be confusing for users
15446 and possibly for dynamic linker itself.
15447 */
15448 newsym.st_value |= 1;
15449 }
906e58ca 15450
0beaef2b
PB		 15451 src = &newsym;
15452 }
15453 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15454}
15455
b294bdf8
MM		 15456/* Add the PT_ARM_EXIDX program header. */
15457
15458static bfd_boolean
906e58ca 15459elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15460 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15461{
15462 struct elf_segment_map *m;
15463 asection *sec;
15464
15465 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15466 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15467 {
15468 /* If there is already a PT_ARM_EXIDX header, then we do not
15469 want to add another one. This situation arises when running
15470 "strip"; the input binary already has the header. */
15471 m = elf_tdata (abfd)->segment_map;
15472 while (m && m->p_type != PT_ARM_EXIDX)
15473 m = m->next;
15474 if (!m)
15475 {
21d799b5
NC		 15476 m = (struct elf_segment_map *)
15477 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15478 if (m == NULL)
15479 return FALSE;
15480 m->p_type = PT_ARM_EXIDX;
15481 m->count = 1;
15482 m->sections[0] = sec;
15483
15484 m->next = elf_tdata (abfd)->segment_map;
15485 elf_tdata (abfd)->segment_map = m;
15486 }
15487 }
15488
15489 return TRUE;
15490}
15491
15492/* We may add a PT_ARM_EXIDX program header. */
15493
15494static int
a6b96beb
AM		 15495elf32_arm_additional_program_headers (bfd *abfd,
15496 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15497{
15498 asection *sec;
15499
15500 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15501 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15502 return 1;
15503 else
15504 return 0;
15505}
15506
34e77a92
RS		 15507/* Hook called by the linker routine which adds symbols from an object
15508 file. */
15509
15510static bfd_boolean
15511elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15512 Elf_Internal_Sym *sym, const char **namep,
15513 flagword *flagsp, asection **secp, bfd_vma *valp)
15514{
15515 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15516 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15517 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15518 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15519
15520 if (elf32_arm_hash_table (info)->vxworks_p
15521 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15522 flagsp, secp, valp))
15523 return FALSE;
15524
15525 return TRUE;
15526}
15527
0beaef2b 15528/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15529const struct elf_size_info elf32_arm_size_info =
15530{
0beaef2b
PB		 15531 sizeof (Elf32_External_Ehdr),
15532 sizeof (Elf32_External_Phdr),
15533 sizeof (Elf32_External_Shdr),
15534 sizeof (Elf32_External_Rel),
15535 sizeof (Elf32_External_Rela),
15536 sizeof (Elf32_External_Sym),
15537 sizeof (Elf32_External_Dyn),
15538 sizeof (Elf_External_Note),
15539 4,
15540 1,
15541 32, 2,
15542 ELFCLASS32, EV_CURRENT,
15543 bfd_elf32_write_out_phdrs,
15544 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15545 bfd_elf32_checksum_contents,
0beaef2b
PB		 15546 bfd_elf32_write_relocs,
15547 elf32_arm_swap_symbol_in,
15548 elf32_arm_swap_symbol_out,
15549 bfd_elf32_slurp_reloc_table,
15550 bfd_elf32_slurp_symbol_table,
15551 bfd_elf32_swap_dyn_in,
15552 bfd_elf32_swap_dyn_out,
15553 bfd_elf32_swap_reloc_in,
15554 bfd_elf32_swap_reloc_out,
15555 bfd_elf32_swap_reloca_in,
15556 bfd_elf32_swap_reloca_out
15557};
15558
252b5132 15559#define ELF_ARCH bfd_arch_arm
ae95ffa6 15560#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15561#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15562#ifdef __QNXTARGET__
15563#define ELF_MAXPAGESIZE 0x1000
15564#else
f21f3fe0 15565#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15566#endif
b1342370 15567#define ELF_MINPAGESIZE 0x1000
24718e3b 15568#define ELF_COMMONPAGESIZE 0x1000
252b5132 15569
ba93b8ac
DJ		 15570#define bfd_elf32_mkobject elf32_arm_mkobject
15571
99e4ae17
AJ		 15572#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15573#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15574#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15575#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15576#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15577#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15578#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 15579#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15580#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15581#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15582#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15583#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15584#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15585
15586#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15587#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15588#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15589#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15590#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15591#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15592#define elf_backend_write_section elf32_arm_write_section
252b5132 15593#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15594#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15595#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15596#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15597#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15598#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15599#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15600#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15601#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15602#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15603#define elf_backend_fake_sections elf32_arm_fake_sections
15604#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15605#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15606#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15607#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15608#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15609#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15610#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15611#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15612#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15613
15614#define elf_backend_can_refcount 1
15615#define elf_backend_can_gc_sections 1
15616#define elf_backend_plt_readonly 1
15617#define elf_backend_want_got_plt 1
15618#define elf_backend_want_plt_sym 0
15619#define elf_backend_may_use_rel_p 1
15620#define elf_backend_may_use_rela_p 0
4e7fd91e 15621#define elf_backend_default_use_rela_p 0
252b5132 15622
04f7c78d 15623#define elf_backend_got_header_size 12
04f7c78d 15624
906e58ca
NC		 15625#undef elf_backend_obj_attrs_vendor
15626#define elf_backend_obj_attrs_vendor "aeabi"
15627#undef elf_backend_obj_attrs_section
15628#define elf_backend_obj_attrs_section ".ARM.attributes"
15629#undef elf_backend_obj_attrs_arg_type
15630#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15631#undef elf_backend_obj_attrs_section_type
104d59d1 15632#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 15633#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15634#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15635
252b5132 15636#include "elf32-target.h"
7f266840 15637
b38cadfb
NC		 15638/* Native Client targets. */
15639
15640#undef TARGET_LITTLE_SYM
15641#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15642#undef TARGET_LITTLE_NAME
15643#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15644#undef TARGET_BIG_SYM
15645#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15646#undef TARGET_BIG_NAME
15647#define TARGET_BIG_NAME "elf32-bigarm-nacl"
15648
15649/* Like elf32_arm_link_hash_table_create -- but overrides
15650 appropriately for NaCl. */
15651
15652static struct bfd_link_hash_table *
15653elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15654{
15655 struct bfd_link_hash_table *ret;
15656
15657 ret = elf32_arm_link_hash_table_create (abfd);
15658 if (ret)
15659 {
15660 struct elf32_arm_link_hash_table *htab
15661 = (struct elf32_arm_link_hash_table *) ret;
15662
15663 htab->nacl_p = 1;
15664
15665 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15666 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15667 }
15668 return ret;
15669}
15670
15671/* Since NaCl doesn't use the ARM-specific unwind format, we don't
15672 really need to use elf32_arm_modify_segment_map. But we do it
15673 anyway just to reduce gratuitous differences with the stock ARM backend. */
15674
15675static bfd_boolean
15676elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15677{
15678 return (elf32_arm_modify_segment_map (abfd, info)
15679 && nacl_modify_segment_map (abfd, info));
15680}
15681
15682#undef elf32_bed
15683#define elf32_bed elf32_arm_nacl_bed
15684#undef bfd_elf32_bfd_link_hash_table_create
15685#define bfd_elf32_bfd_link_hash_table_create \
15686 elf32_arm_nacl_link_hash_table_create
15687#undef elf_backend_plt_alignment
15688#define elf_backend_plt_alignment 4
15689#undef elf_backend_modify_segment_map
15690#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15691#undef elf_backend_modify_program_headers
15692#define elf_backend_modify_program_headers nacl_modify_program_headers
15693
15694#undef ELF_MAXPAGESIZE
15695#define ELF_MAXPAGESIZE 0x10000
15696
15697#include "elf32-target.h"
15698
15699/* Reset to defaults. */
15700#undef elf_backend_plt_alignment
15701#undef elf_backend_modify_segment_map
15702#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15703#undef elf_backend_modify_program_headers
15704
906e58ca 15705/* VxWorks Targets. */
4e7fd91e 15706
906e58ca 15707#undef TARGET_LITTLE_SYM
4e7fd91e 15708#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15709#undef TARGET_LITTLE_NAME
4e7fd91e 15710#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15711#undef TARGET_BIG_SYM
4e7fd91e 15712#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15713#undef TARGET_BIG_NAME
4e7fd91e
PB		 15714#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15715
15716/* Like elf32_arm_link_hash_table_create -- but overrides
15717 appropriately for VxWorks. */
906e58ca 15718
4e7fd91e
PB		 15719static struct bfd_link_hash_table *
15720elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15721{
15722 struct bfd_link_hash_table *ret;
15723
15724 ret = elf32_arm_link_hash_table_create (abfd);
15725 if (ret)
15726 {
15727 struct elf32_arm_link_hash_table *htab
00a97672 15728 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15729 htab->use_rel = 0;
00a97672 15730 htab->vxworks_p = 1;
4e7fd91e
PB		 15731 }
15732 return ret;
906e58ca 15733}
4e7fd91e 15734
00a97672
RS		 15735static void
15736elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15737{
15738 elf32_arm_final_write_processing (abfd, linker);
15739 elf_vxworks_final_write_processing (abfd, linker);
15740}
15741
906e58ca 15742#undef elf32_bed
4e7fd91e
PB		 15743#define elf32_bed elf32_arm_vxworks_bed
15744
906e58ca
NC		 15745#undef bfd_elf32_bfd_link_hash_table_create
15746#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15747#undef elf_backend_final_write_processing
15748#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15749#undef elf_backend_emit_relocs
15750#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15751
906e58ca 15752#undef elf_backend_may_use_rel_p
00a97672 15753#define elf_backend_may_use_rel_p 0
906e58ca 15754#undef elf_backend_may_use_rela_p
00a97672 15755#define elf_backend_may_use_rela_p 1
906e58ca 15756#undef elf_backend_default_use_rela_p
00a97672 15757#define elf_backend_default_use_rela_p 1
906e58ca 15758#undef elf_backend_want_plt_sym
00a97672 15759#define elf_backend_want_plt_sym 1
906e58ca 15760#undef ELF_MAXPAGESIZE
00a97672 15761#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15762
15763#include "elf32-target.h"
15764
15765
21d799b5
NC		 15766/* Merge backend specific data from an object file to the output
15767 object file when linking. */
15768
15769static bfd_boolean
15770elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15771{
15772 flagword out_flags;
15773 flagword in_flags;
15774 bfd_boolean flags_compatible = TRUE;
15775 asection *sec;
15776
cc643b88 15777 /* Check if we have the same endianness. */
21d799b5
NC		 15778 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15779 return FALSE;
15780
15781 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15782 return TRUE;
15783
15784 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15785 return FALSE;
15786
15787 /* The input BFD must have had its flags initialised. */
15788 /* The following seems bogus to me -- The flags are initialized in
15789 the assembler but I don't think an elf_flags_init field is
15790 written into the object. */
15791 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15792
15793 in_flags = elf_elfheader (ibfd)->e_flags;
15794 out_flags = elf_elfheader (obfd)->e_flags;
15795
15796 /* In theory there is no reason why we couldn't handle this. However
15797 in practice it isn't even close to working and there is no real
15798 reason to want it. */
15799 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15800 && !(ibfd->flags & DYNAMIC)
15801 && (in_flags & EF_ARM_BE8))
15802 {
15803 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15804 ibfd);
15805 return FALSE;
15806 }
15807
15808 if (!elf_flags_init (obfd))
15809 {
15810 /* If the input is the default architecture and had the default
15811 flags then do not bother setting the flags for the output
15812 architecture, instead allow future merges to do this. If no
15813 future merges ever set these flags then they will retain their
15814 uninitialised values, which surprise surprise, correspond
15815 to the default values. */
15816 if (bfd_get_arch_info (ibfd)->the_default
15817 && elf_elfheader (ibfd)->e_flags == 0)
15818 return TRUE;
15819
15820 elf_flags_init (obfd) = TRUE;
15821 elf_elfheader (obfd)->e_flags = in_flags;
15822
15823 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15824 && bfd_get_arch_info (obfd)->the_default)
15825 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15826
15827 return TRUE;
15828 }
15829
15830 /* Determine what should happen if the input ARM architecture
15831 does not match the output ARM architecture. */
15832 if (! bfd_arm_merge_machines (ibfd, obfd))
15833 return FALSE;
15834
15835 /* Identical flags must be compatible. */
15836 if (in_flags == out_flags)
15837 return TRUE;
15838
15839 /* Check to see if the input BFD actually contains any sections. If
15840 not, its flags may not have been initialised either, but it
15841 cannot actually cause any incompatiblity. Do not short-circuit
15842 dynamic objects; their section list may be emptied by
15843 elf_link_add_object_symbols.
15844
15845 Also check to see if there are no code sections in the input.
15846 In this case there is no need to check for code specific flags.
15847 XXX - do we need to worry about floating-point format compatability
15848 in data sections ? */
15849 if (!(ibfd->flags & DYNAMIC))
15850 {
15851 bfd_boolean null_input_bfd = TRUE;
15852 bfd_boolean only_data_sections = TRUE;
15853
15854 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15855 {
15856 /* Ignore synthetic glue sections. */
15857 if (strcmp (sec->name, ".glue_7")
15858 && strcmp (sec->name, ".glue_7t"))
15859 {
15860 if ((bfd_get_section_flags (ibfd, sec)
15861 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15862 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15863 only_data_sections = FALSE;
15864
15865 null_input_bfd = FALSE;
15866 break;
15867 }
15868 }
15869
15870 if (null_input_bfd || only_data_sections)
15871 return TRUE;
15872 }
15873
15874 /* Complain about various flag mismatches. */
15875 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15876 EF_ARM_EABI_VERSION (out_flags)))
15877 {
15878 _bfd_error_handler
15879 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15880 ibfd, obfd,
15881 (in_flags & EF_ARM_EABIMASK) >> 24,
15882 (out_flags & EF_ARM_EABIMASK) >> 24);
15883 return FALSE;
15884 }
15885
15886 /* Not sure what needs to be checked for EABI versions >= 1. */
15887 /* VxWorks libraries do not use these flags. */
15888 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15889 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15890 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15891 {
15892 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15893 {
15894 _bfd_error_handler
15895 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15896 ibfd, obfd,
15897 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15898 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15899 flags_compatible = FALSE;
15900 }
15901
15902 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15903 {
15904 if (in_flags & EF_ARM_APCS_FLOAT)
15905 _bfd_error_handler
15906 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15907 ibfd, obfd);
15908 else
15909 _bfd_error_handler
15910 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15911 ibfd, obfd);
15912
15913 flags_compatible = FALSE;
15914 }
15915
15916 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15917 {
15918 if (in_flags & EF_ARM_VFP_FLOAT)
15919 _bfd_error_handler
15920 (_("error: %B uses VFP instructions, whereas %B does not"),
15921 ibfd, obfd);
15922 else
15923 _bfd_error_handler
15924 (_("error: %B uses FPA instructions, whereas %B does not"),
15925 ibfd, obfd);
15926
15927 flags_compatible = FALSE;
15928 }
15929
15930 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15931 {
15932 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15933 _bfd_error_handler
15934 (_("error: %B uses Maverick instructions, whereas %B does not"),
15935 ibfd, obfd);
15936 else
15937 _bfd_error_handler
15938 (_("error: %B does not use Maverick instructions, whereas %B does"),
15939 ibfd, obfd);
15940
15941 flags_compatible = FALSE;
15942 }
15943
15944#ifdef EF_ARM_SOFT_FLOAT
15945 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15946 {
15947 /* We can allow interworking between code that is VFP format
15948 layout, and uses either soft float or integer regs for
15949 passing floating point arguments and results. We already
15950 know that the APCS_FLOAT flags match; similarly for VFP
15951 flags. */
15952 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15953 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15954 {
15955 if (in_flags & EF_ARM_SOFT_FLOAT)
15956 _bfd_error_handler
15957 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15958 ibfd, obfd);
15959 else
15960 _bfd_error_handler
15961 (_("error: %B uses hardware FP, whereas %B uses software FP"),
15962 ibfd, obfd);
15963
15964 flags_compatible = FALSE;
15965 }
15966 }
15967#endif
15968
15969 /* Interworking mismatch is only a warning. */
15970 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
15971 {
15972 if (in_flags & EF_ARM_INTERWORK)
15973 {
15974 _bfd_error_handler
15975 (_("Warning: %B supports interworking, whereas %B does not"),
15976 ibfd, obfd);
15977 }
15978 else
15979 {
15980 _bfd_error_handler
15981 (_("Warning: %B does not support interworking, whereas %B does"),
15982 ibfd, obfd);
15983 }
15984 }
15985 }
15986
15987 return flags_compatible;
15988}
15989
15990
906e58ca 15991/* Symbian OS Targets. */
7f266840 15992
906e58ca 15993#undef TARGET_LITTLE_SYM
7f266840 15994#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 15995#undef TARGET_LITTLE_NAME
7f266840 15996#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 15997#undef TARGET_BIG_SYM
7f266840 15998#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 15999#undef TARGET_BIG_NAME
7f266840
DJ		 16000#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16001
16002/* Like elf32_arm_link_hash_table_create -- but overrides
16003 appropriately for Symbian OS. */
906e58ca 16004
7f266840
DJ		 16005static struct bfd_link_hash_table *
16006elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16007{
16008 struct bfd_link_hash_table *ret;
16009
16010 ret = elf32_arm_link_hash_table_create (abfd);
16011 if (ret)
16012 {
16013 struct elf32_arm_link_hash_table *htab
16014 = (struct elf32_arm_link_hash_table *)ret;
16015 /* There is no PLT header for Symbian OS. */
16016 htab->plt_header_size = 0;
95720a86
DJ		 16017 /* The PLT entries are each one instruction and one word. */
16018 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16019 htab->symbian_p = 1;
33bfe774
JB		 16020 /* Symbian uses armv5t or above, so use_blx is always true. */
16021 htab->use_blx = 1;
67687978 16022 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16023 }
16024 return ret;
906e58ca 16025}
7f266840 16026
b35d266b 16027static const struct bfd_elf_special_section
551b43fd 16028elf32_arm_symbian_special_sections[] =
7f266840 16029{
5cd3778d
MM		 16030 /* In a BPABI executable, the dynamic linking sections do not go in
16031 the loadable read-only segment. The post-linker may wish to
16032 refer to these sections, but they are not part of the final
16033 program image. */
0112cd26
NC		 16034 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16035 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16036 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16037 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16038 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16039 /* These sections do not need to be writable as the SymbianOS
16040 postlinker will arrange things so that no dynamic relocation is
16041 required. */
0112cd26
NC		 16042 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16043 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16044 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16045 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16046};
16047
c3c76620 16048static void
906e58ca 16049elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16050 struct bfd_link_info *link_info)
c3c76620
MM		 16051{
16052 /* BPABI objects are never loaded directly by an OS kernel; they are
16053 processed by a postlinker first, into an OS-specific format. If
16054 the D_PAGED bit is set on the file, BFD will align segments on
16055 page boundaries, so that an OS can directly map the file. With
16056 BPABI objects, that just results in wasted space. In addition,
16057 because we clear the D_PAGED bit, map_sections_to_segments will
16058 recognize that the program headers should not be mapped into any
16059 loadable segment. */
16060 abfd->flags &= ~D_PAGED;
906e58ca 16061 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16062}
7f266840
DJ		 16063
16064static bfd_boolean
906e58ca 16065elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16066 struct bfd_link_info *info)
7f266840
DJ		 16067{
16068 struct elf_segment_map *m;
16069 asection *dynsec;
16070
7f266840
DJ		 16071 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16072 segment. However, because the .dynamic section is not marked
16073 with SEC_LOAD, the generic ELF code will not create such a
16074 segment. */
16075 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16076 if (dynsec)
16077 {
8ded5a0f
AM		 16078 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
16079 if (m->p_type == PT_DYNAMIC)
16080 break;
16081
16082 if (m == NULL)
16083 {
16084 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16085 m->next = elf_tdata (abfd)->segment_map;
16086 elf_tdata (abfd)->segment_map = m;
16087 }
7f266840
DJ		 16088 }
16089
b294bdf8
MM		 16090 /* Also call the generic arm routine. */
16091 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16092}
16093
95720a86
DJ		 16094/* Return address for Ith PLT stub in section PLT, for relocation REL
16095 or (bfd_vma) -1 if it should not be included. */
16096
16097static bfd_vma
16098elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16099 const arelent *rel ATTRIBUTE_UNUSED)
16100{
16101 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16102}
16103
16104
8029a119 16105#undef elf32_bed
7f266840
DJ		 16106#define elf32_bed elf32_arm_symbian_bed
16107
16108/* The dynamic sections are not allocated on SymbianOS; the postlinker
16109 will process them and then discard them. */
906e58ca 16110#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16111#define ELF_DYNAMIC_SEC_FLAGS \
16112 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16113
00a97672 16114#undef elf_backend_emit_relocs
c3c76620 16115
906e58ca
NC		 16116#undef bfd_elf32_bfd_link_hash_table_create
16117#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16118#undef elf_backend_special_sections
16119#define elf_backend_special_sections elf32_arm_symbian_special_sections
16120#undef elf_backend_begin_write_processing
16121#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16122#undef elf_backend_final_write_processing
16123#define elf_backend_final_write_processing elf32_arm_final_write_processing
16124
16125#undef elf_backend_modify_segment_map
7f266840
DJ		 16126#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16127
16128/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16129#undef elf_backend_got_header_size
7f266840
DJ		 16130#define elf_backend_got_header_size 0
16131
16132/* Similarly, there is no .got.plt section. */
906e58ca 16133#undef elf_backend_want_got_plt
7f266840
DJ		 16134#define elf_backend_want_got_plt 0
16135
906e58ca 16136#undef elf_backend_plt_sym_val
95720a86
DJ		 16137#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16138
906e58ca 16139#undef elf_backend_may_use_rel_p
00a97672 16140#define elf_backend_may_use_rel_p 1
906e58ca 16141#undef elf_backend_may_use_rela_p
00a97672 16142#define elf_backend_may_use_rela_p 0
906e58ca 16143#undef elf_backend_default_use_rela_p
00a97672 16144#define elf_backend_default_use_rela_p 0
906e58ca 16145#undef elf_backend_want_plt_sym
00a97672 16146#define elf_backend_want_plt_sym 0
906e58ca 16147#undef ELF_MAXPAGESIZE
00a97672 16148#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16149
7f266840 16150#include "elf32-target.h"
GDB Binutils - Deliverables
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