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Prevent adjustments to symbols in merge sections.
[deliverable/binutils-gdb.git] / bfd / elf32-m32r.c
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252b5132 1/* M32R-specific support for 32-bit ELF.
7898deda
NC		 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
252b5132
RH		 4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/m32r.h"
26
27static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
28 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
29static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
30 PARAMS ((bfd *, reloc_howto_type *, asection *,
31 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma));
32static bfd_reloc_status_type m32r_elf_hi16_reloc
33 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
34static void m32r_elf_relocate_hi16
35 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *,
36 bfd_byte *, bfd_vma));
37bfd_reloc_status_type m32r_elf_lo16_reloc
38 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
8b125cde
DE		 39bfd_reloc_status_type m32r_elf_generic_reloc
40 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
252b5132
RH		 41static bfd_reloc_status_type m32r_elf_sda16_reloc
42 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
43static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
44 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
45static void m32r_info_to_howto_rel
46 PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
47boolean _bfd_m32r_elf_section_from_bfd_section
af746e92 48 PARAMS ((bfd *, asection *, int *));
252b5132
RH		 49void _bfd_m32r_elf_symbol_processing
50 PARAMS ((bfd *, asymbol *));
51static boolean m32r_elf_add_symbol_hook
52 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
53 const char **, flagword *, asection **, bfd_vma *));
54static boolean m32r_elf_relocate_section
55 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
56 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
57#if 0 /* not yet */
58static boolean m32r_elf_relax_delete_bytes
59 PARAMS ((bfd *, asection *, bfd_vma, int));
60#endif
252b5132
RH		 61static bfd_reloc_status_type m32r_elf_final_sda_base
62 PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *));
63static boolean m32r_elf_object_p
64 PARAMS ((bfd *));
65static void m32r_elf_final_write_processing
66 PARAMS ((bfd *, boolean));
67static boolean m32r_elf_set_private_flags
68 PARAMS ((bfd *, flagword));
252b5132
RH		 69static boolean m32r_elf_merge_private_bfd_data
70 PARAMS ((bfd *, bfd *));
71static boolean m32r_elf_print_private_bfd_data
72 PARAMS ((bfd *, PTR));
917583ad
NC		 73static boolean m32r_elf_gc_sweep_hook
74 PARAMS ((bfd *, struct bfd_link_info *, asection *,
75 const Elf_Internal_Rela *));
76static boolean m32r_elf_check_relocs
77 PARAMS ((bfd *, struct bfd_link_info *, asection *,
78 const Elf_Internal_Rela *));
79
80asection * m32r_elf_gc_mark_hook
81 PARAMS ((bfd *, struct bfd_link_info *, Elf_Internal_Rela *,
82 struct elf_link_hash_entry *, Elf_Internal_Sym *));
252b5132
RH		 83
84#define NOP_INSN 0x7000
85#define MAKE_PARALLEL(insn) ((insn) | 0x8000)
86
87/* Use REL instead of RELA to save space.
88 This only saves space in libraries and object files, but perhaps
89 relocs will be put in ROM? All in all though, REL relocs are a pain
90 to work with. */
91#define USE_REL
92
93static reloc_howto_type m32r_elf_howto_table[] =
94{
95 /* This reloc does nothing. */
96 HOWTO (R_M32R_NONE, /* type */
97 0, /* rightshift */
98 2, /* size (0 = byte, 1 = short, 2 = long) */
99 32, /* bitsize */
100 false, /* pc_relative */
101 0, /* bitpos */
102 complain_overflow_bitfield, /* complain_on_overflow */
103 bfd_elf_generic_reloc, /* special_function */
104 "R_M32R_NONE", /* name */
105 false, /* partial_inplace */
106 0, /* src_mask */
107 0, /* dst_mask */
108 false), /* pcrel_offset */
109
110 /* A 16 bit absolute relocation. */
111 HOWTO (R_M32R_16, /* type */
112 0, /* rightshift */
113 1, /* size (0 = byte, 1 = short, 2 = long) */
114 16, /* bitsize */
115 false, /* pc_relative */
116 0, /* bitpos */
117 complain_overflow_bitfield, /* complain_on_overflow */
8b125cde 118 m32r_elf_generic_reloc,/* special_function */
252b5132
RH		 119 "R_M32R_16", /* name */
120 true, /* partial_inplace */
121 0xffff, /* src_mask */
122 0xffff, /* dst_mask */
123 false), /* pcrel_offset */
124
125 /* A 32 bit absolute relocation. */
126 HOWTO (R_M32R_32, /* type */
127 0, /* rightshift */
128 2, /* size (0 = byte, 1 = short, 2 = long) */
129 32, /* bitsize */
130 false, /* pc_relative */
131 0, /* bitpos */
132 complain_overflow_bitfield, /* complain_on_overflow */
8b125cde 133 m32r_elf_generic_reloc,/* special_function */
252b5132
RH		 134 "R_M32R_32", /* name */
135 true, /* partial_inplace */
136 0xffffffff, /* src_mask */
137 0xffffffff, /* dst_mask */
138 false), /* pcrel_offset */
139
140 /* A 24 bit address. */
141 HOWTO (R_M32R_24, /* type */
142 0, /* rightshift */
143 2, /* size (0 = byte, 1 = short, 2 = long) */
144 24, /* bitsize */
145 false, /* pc_relative */
146 0, /* bitpos */
147 complain_overflow_unsigned, /* complain_on_overflow */
8b125cde 148 m32r_elf_generic_reloc,/* special_function */
252b5132
RH		 149 "R_M32R_24", /* name */
150 true, /* partial_inplace */
151 0xffffff, /* src_mask */
152 0xffffff, /* dst_mask */
153 false), /* pcrel_offset */
154
155 /* An PC Relative 10-bit relocation, shifted by 2.
156 This reloc is complicated because relocations are relative to pc & -4.
157 i.e. branches in the right insn slot use the address of the left insn
158 slot for pc. */
159 /* ??? It's not clear whether this should have partial_inplace set or not.
160 Branch relaxing in the assembler can store the addend in the insn,
161 and if bfd_install_relocation gets called the addend may get added
162 again. */
163 HOWTO (R_M32R_10_PCREL, /* type */
164 2, /* rightshift */
165 1, /* size (0 = byte, 1 = short, 2 = long) */
166 10, /* bitsize */
167 true, /* pc_relative */
168 0, /* bitpos */
169 complain_overflow_signed, /* complain_on_overflow */
170 m32r_elf_10_pcrel_reloc, /* special_function */
171 "R_M32R_10_PCREL", /* name */
172 false, /* partial_inplace */
173 0xff, /* src_mask */
174 0xff, /* dst_mask */
175 true), /* pcrel_offset */
176
177 /* A relative 18 bit relocation, right shifted by 2. */
178 HOWTO (R_M32R_18_PCREL, /* type */
179 2, /* rightshift */
180 2, /* size (0 = byte, 1 = short, 2 = long) */
181 16, /* bitsize */
182 true, /* pc_relative */
183 0, /* bitpos */
184 complain_overflow_signed, /* complain_on_overflow */
185 bfd_elf_generic_reloc, /* special_function */
186 "R_M32R_18_PCREL", /* name */
187 false, /* partial_inplace */
188 0xffff, /* src_mask */
189 0xffff, /* dst_mask */
190 true), /* pcrel_offset */
191
192 /* A relative 26 bit relocation, right shifted by 2. */
193 /* ??? It's not clear whether this should have partial_inplace set or not.
194 Branch relaxing in the assembler can store the addend in the insn,
195 and if bfd_install_relocation gets called the addend may get added
196 again. */
197 HOWTO (R_M32R_26_PCREL, /* type */
198 2, /* rightshift */
199 2, /* size (0 = byte, 1 = short, 2 = long) */
200 26, /* bitsize */
201 true, /* pc_relative */
202 0, /* bitpos */
203 complain_overflow_signed, /* complain_on_overflow */
204 bfd_elf_generic_reloc, /* special_function */
205 "R_M32R_26_PCREL", /* name */
206 false, /* partial_inplace */
207 0xffffff, /* src_mask */
208 0xffffff, /* dst_mask */
209 true), /* pcrel_offset */
210
211 /* High 16 bits of address when lower 16 is or'd in. */
212 HOWTO (R_M32R_HI16_ULO, /* type */
213 16, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 16, /* bitsize */
216 false, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont, /* complain_on_overflow */
219 m32r_elf_hi16_reloc, /* special_function */
220 "R_M32R_HI16_ULO", /* name */
221 true, /* partial_inplace */
222 0x0000ffff, /* src_mask */
223 0x0000ffff, /* dst_mask */
224 false), /* pcrel_offset */
225
226 /* High 16 bits of address when lower 16 is added in. */
227 HOWTO (R_M32R_HI16_SLO, /* type */
228 16, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 16, /* bitsize */
231 false, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_dont, /* complain_on_overflow */
234 m32r_elf_hi16_reloc, /* special_function */
235 "R_M32R_HI16_SLO", /* name */
236 true, /* partial_inplace */
237 0x0000ffff, /* src_mask */
238 0x0000ffff, /* dst_mask */
239 false), /* pcrel_offset */
240
241 /* Lower 16 bits of address. */
242 HOWTO (R_M32R_LO16, /* type */
243 0, /* rightshift */
244 2, /* size (0 = byte, 1 = short, 2 = long) */
245 16, /* bitsize */
246 false, /* pc_relative */
247 0, /* bitpos */
248 complain_overflow_dont, /* complain_on_overflow */
249 m32r_elf_lo16_reloc, /* special_function */
250 "R_M32R_LO16", /* name */
251 true, /* partial_inplace */
252 0x0000ffff, /* src_mask */
253 0x0000ffff, /* dst_mask */
254 false), /* pcrel_offset */
255
256 /* Small data area 16 bits offset. */
257 HOWTO (R_M32R_SDA16, /* type */
258 0, /* rightshift */
259 2, /* size (0 = byte, 1 = short, 2 = long) */
260 16, /* bitsize */
261 false, /* pc_relative */
262 0, /* bitpos */
263 complain_overflow_signed, /* complain_on_overflow */
264 m32r_elf_sda16_reloc, /* special_function */
265 "R_M32R_SDA16", /* name */
266 true, /* partial_inplace */ /* FIXME: correct? */
267 0x0000ffff, /* src_mask */
268 0x0000ffff, /* dst_mask */
269 false), /* pcrel_offset */
270
271 /* GNU extension to record C++ vtable hierarchy */
272 HOWTO (R_M32R_GNU_VTINHERIT, /* type */
273 0, /* rightshift */
274 2, /* size (0 = byte, 1 = short, 2 = long) */
275 0, /* bitsize */
276 false, /* pc_relative */
277 0, /* bitpos */
278 complain_overflow_dont, /* complain_on_overflow */
279 NULL, /* special_function */
280 "R_M32R_GNU_VTINHERIT", /* name */
281 false, /* partial_inplace */
282 0, /* src_mask */
283 0, /* dst_mask */
284 false), /* pcrel_offset */
285
286 /* GNU extension to record C++ vtable member usage */
287 HOWTO (R_M32R_GNU_VTENTRY, /* type */
288 0, /* rightshift */
289 2, /* size (0 = byte, 1 = short, 2 = long) */
290 0, /* bitsize */
291 false, /* pc_relative */
292 0, /* bitpos */
293 complain_overflow_dont, /* complain_on_overflow */
294 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
295 "R_M32R_GNU_VTENTRY", /* name */
296 false, /* partial_inplace */
297 0, /* src_mask */
298 0, /* dst_mask */
299 false), /* pcrel_offset */
300
301};
302\f
303/* Handle the R_M32R_10_PCREL reloc. */
304
305static bfd_reloc_status_type
306m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data,
307 input_section, output_bfd, error_message)
308 bfd * abfd;
309 arelent * reloc_entry;
310 asymbol * symbol;
311 PTR data;
312 asection * input_section;
313 bfd * output_bfd;
5f771d47 314 char ** error_message ATTRIBUTE_UNUSED;
252b5132
RH		 315{
316 /* This part is from bfd_elf_generic_reloc. */
317 if (output_bfd != (bfd *) NULL
318 && (symbol->flags & BSF_SECTION_SYM) == 0
319 && (! reloc_entry->howto->partial_inplace
320 || reloc_entry->addend == 0))
321 {
322 reloc_entry->address += input_section->output_offset;
323 return bfd_reloc_ok;
324 }
325
326 if (output_bfd != NULL)
327 {
328 /* FIXME: See bfd_perform_relocation. Is this right? */
329 return bfd_reloc_continue;
330 }
331
332 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto,
333 input_section,
334 data, reloc_entry->address,
335 symbol->section,
336 (symbol->value
337 + symbol->section->output_section->vma
338 + symbol->section->output_offset),
339 reloc_entry->addend);
340}
341
342/* Utility to actually perform an R_M32R_10_PCREL reloc. */
343
344static bfd_reloc_status_type
345m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset,
346 symbol_section, symbol_value, addend)
347 bfd *abfd;
348 reloc_howto_type *howto;
349 asection *input_section;
350 bfd_byte *data;
351 bfd_vma offset;
5f771d47 352 asection *symbol_section ATTRIBUTE_UNUSED;
252b5132
RH		 353 bfd_vma symbol_value;
354 bfd_vma addend;
355{
356 bfd_signed_vma relocation;
357 unsigned long x;
358 bfd_reloc_status_type status;
359
360 /* Sanity check the address (offset in section). */
361 if (offset > input_section->_cooked_size)
362 return bfd_reloc_outofrange;
363
364 relocation = symbol_value + addend;
365 /* Make it pc relative. */
366 relocation -= (input_section->output_section->vma
367 + input_section->output_offset);
368 /* These jumps mask off the lower two bits of the current address
369 before doing pcrel calculations. */
dc810e39 370 relocation -= (offset & -(bfd_vma) 4);
252b5132
RH		 371
372 if (relocation < -0x200 || relocation > 0x1ff)
373 status = bfd_reloc_overflow;
374 else
375 status = bfd_reloc_ok;
376
377 x = bfd_get_16 (abfd, data + offset);
378 relocation >>= howto->rightshift;
379 relocation <<= howto->bitpos;
380 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask);
dc810e39 381 bfd_put_16 (abfd, (bfd_vma) x, data + offset);
252b5132
RH		 382
383 return status;
384}
385
386/* Handle the R_M32R_HI16_[SU]LO relocs.
387 HI16_SLO is for the add3 and load/store with displacement instructions.
388 HI16_ULO is for the or3 instruction.
389 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
390 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
391 we must add one to the high 16 bytes (which will get subtracted off when
392 the low 16 bits are added).
393 These relocs have to be done in combination with an R_M32R_LO16 reloc
394 because there is a carry from the LO16 to the HI16. Here we just save
395 the information we need; we do the actual relocation when we see the LO16.
396 This code is copied from the elf32-mips.c. We also support an arbitrary
397 number of HI16 relocs to be associated with a single LO16 reloc. The
398 assembler sorts the relocs to ensure each HI16 immediately precedes its
399 LO16. However if there are multiple copies, the assembler may not find
400 the real LO16 so it picks the first one it finds. */
401
402struct m32r_hi16
403{
404 struct m32r_hi16 *next;
405 bfd_byte *addr;
406 bfd_vma addend;
407};
408
409/* FIXME: This should not be a static variable. */
410
411static struct m32r_hi16 *m32r_hi16_list;
412
413static bfd_reloc_status_type
414m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
415 input_section, output_bfd, error_message)
5f771d47 416 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH		 417 arelent *reloc_entry;
418 asymbol *symbol;
419 PTR data;
420 asection *input_section;
421 bfd *output_bfd;
5f771d47 422 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH		 423{
424 bfd_reloc_status_type ret;
425 bfd_vma relocation;
426 struct m32r_hi16 *n;
427
428 /* This part is from bfd_elf_generic_reloc.
429 If we're relocating, and this an external symbol, we don't want
430 to change anything. */
431 if (output_bfd != (bfd *) NULL
432 && (symbol->flags & BSF_SECTION_SYM) == 0
433 && reloc_entry->addend == 0)
434 {
435 reloc_entry->address += input_section->output_offset;
436 return bfd_reloc_ok;
437 }
438
439 /* Sanity check the address (offset in section). */
440 if (reloc_entry->address > input_section->_cooked_size)
441 return bfd_reloc_outofrange;
442
443 ret = bfd_reloc_ok;
444 if (bfd_is_und_section (symbol->section)
445 && output_bfd == (bfd *) NULL)
446 ret = bfd_reloc_undefined;
447
448 if (bfd_is_com_section (symbol->section))
449 relocation = 0;
450 else
451 relocation = symbol->value;
452
453 relocation += symbol->section->output_section->vma;
454 relocation += symbol->section->output_offset;
455 relocation += reloc_entry->addend;
456
457 /* Save the information, and let LO16 do the actual relocation. */
dc810e39 458 n = (struct m32r_hi16 *) bfd_malloc ((bfd_size_type) sizeof *n);
252b5132
RH		 459 if (n == NULL)
460 return bfd_reloc_outofrange;
461 n->addr = (bfd_byte *) data + reloc_entry->address;
462 n->addend = relocation;
463 n->next = m32r_hi16_list;
464 m32r_hi16_list = n;
465
466 if (output_bfd != (bfd *) NULL)
467 reloc_entry->address += input_section->output_offset;
468
469 return ret;
470}
471
472/* Handle an M32R ELF HI16 reloc. */
473
474static void
475m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend)
476 bfd *input_bfd;
477 int type;
478 Elf_Internal_Rela *relhi;
479 Elf_Internal_Rela *rello;
480 bfd_byte *contents;
481 bfd_vma addend;
482{
483 unsigned long insn;
484 bfd_vma addlo;
485
486 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset);
487
488 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset);
489 if (type == R_M32R_HI16_SLO)
490 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000;
491 else
492 addlo &= 0xffff;
493
494 addend += ((insn & 0xffff) << 16) + addlo;
495
496 /* Reaccount for sign extension of low part. */
497 if (type == R_M32R_HI16_SLO
498 && (addend & 0x8000) != 0)
499 addend += 0x10000;
500
501 bfd_put_32 (input_bfd,
502 (insn & 0xffff0000) | ((addend >> 16) & 0xffff),
503 contents + relhi->r_offset);
504}
505
506/* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
507 inplace relocation; this function exists in order to do the
508 R_M32R_HI16_[SU]LO relocation described above. */
509
510bfd_reloc_status_type
4c72e23a 511m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data,
252b5132 512 input_section, output_bfd, error_message)
4c72e23a 513 bfd *input_bfd;
252b5132
RH		 514 arelent *reloc_entry;
515 asymbol *symbol;
516 PTR data;
517 asection *input_section;
518 bfd *output_bfd;
519 char **error_message;
520{
4c72e23a
CM		 521 /* This part is from bfd_elf_generic_reloc.
522 If we're relocating, and this an external symbol, we don't want
523 to change anything. */
524 if (output_bfd != (bfd *) NULL
525 && (symbol->flags & BSF_SECTION_SYM) == 0
526 && reloc_entry->addend == 0)
527 {
528 reloc_entry->address += input_section->output_offset;
529 return bfd_reloc_ok;
530 }
531
252b5132
RH		 532 if (m32r_hi16_list != NULL)
533 {
534 struct m32r_hi16 *l;
535
536 l = m32r_hi16_list;
537 while (l != NULL)
538 {
539 unsigned long insn;
540 unsigned long val;
541 unsigned long vallo;
542 struct m32r_hi16 *next;
543
544 /* Do the HI16 relocation. Note that we actually don't need
545 to know anything about the LO16 itself, except where to
546 find the low 16 bits of the addend needed by the LO16. */
4c72e23a
CM		 547 insn = bfd_get_32 (input_bfd, l->addr);
548 vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address)
252b5132
RH		 549 & 0xffff) ^ 0x8000) - 0x8000;
550 val = ((insn & 0xffff) << 16) + vallo;
551 val += l->addend;
552
553 /* Reaccount for sign extension of low part. */
554 if ((val & 0x8000) != 0)
555 val += 0x10000;
556
dc810e39
AM		 557 insn = (insn &~ (bfd_vma) 0xffff) | ((val >> 16) & 0xffff);
558 bfd_put_32 (input_bfd, (bfd_vma) insn, l->addr);
252b5132
RH		 559
560 next = l->next;
561 free (l);
562 l = next;
563 }
564
565 m32r_hi16_list = NULL;
566 }
567
4c72e23a
CM		 568 /* Now do the LO16 reloc in the usual way.
569 ??? It would be nice to call bfd_elf_generic_reloc here,
570 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
571 pass the handling back to bfd_install_relocation which will install
572 a section relative addend which is wrong. */
8b125cde
DE		 573 return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
574 input_section, output_bfd, error_message);
575}
576
c3668558
KH		 577/* Do generic partial_inplace relocation.
578 This is a local replacement for bfd_elf_generic_reloc. */
8b125cde
DE		 579
580bfd_reloc_status_type
581m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
582 input_section, output_bfd, error_message)
583 bfd *input_bfd;
584 arelent *reloc_entry;
585 asymbol *symbol;
586 PTR data;
587 asection *input_section;
588 bfd *output_bfd;
23ccc829 589 char **error_message ATTRIBUTE_UNUSED;
8b125cde
DE		 590{
591 bfd_reloc_status_type ret;
592 bfd_vma relocation;
593 bfd_byte *inplace_address;
594
595 /* This part is from bfd_elf_generic_reloc.
596 If we're relocating, and this an external symbol, we don't want
597 to change anything. */
598 if (output_bfd != (bfd *) NULL
599 && (symbol->flags & BSF_SECTION_SYM) == 0
600 && reloc_entry->addend == 0)
601 {
602 reloc_entry->address += input_section->output_offset;
603 return bfd_reloc_ok;
604 }
605
08da05b0 606 /* Now do the reloc in the usual way.
8b125cde
DE		 607 ??? It would be nice to call bfd_elf_generic_reloc here,
608 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
609 pass the handling back to bfd_install_relocation which will install
610 a section relative addend which is wrong. */
4c72e23a
CM		 611
612 /* Sanity check the address (offset in section). */
613 if (reloc_entry->address > input_section->_cooked_size)
614 return bfd_reloc_outofrange;
615
616 ret = bfd_reloc_ok;
617 if (bfd_is_und_section (symbol->section)
618 && output_bfd == (bfd *) NULL)
619 ret = bfd_reloc_undefined;
620
621 if (bfd_is_com_section (symbol->section)
622 || output_bfd != (bfd *) NULL)
623 relocation = 0;
624 else
625 relocation = symbol->value;
626
627 /* Only do this for a final link. */
628 if (output_bfd == (bfd *) NULL)
629 {
630 relocation += symbol->section->output_section->vma;
631 relocation += symbol->section->output_offset;
632 }
633
634 relocation += reloc_entry->addend;
23ccc829 635 inplace_address = (bfd_byte *) data + reloc_entry->address;
8b125cde
DE		 636
637#define DOIT(x) \
638 x = ( (x & ~reloc_entry->howto->dst_mask) | \
639 (((x & reloc_entry->howto->src_mask) + relocation) & \
640 reloc_entry->howto->dst_mask))
4c72e23a 641
8b125cde
DE		 642 switch (reloc_entry->howto->size)
643 {
644 case 1:
645 {
646 short x = bfd_get_16 (input_bfd, inplace_address);
647 DOIT (x);
dc810e39 648 bfd_put_16 (input_bfd, (bfd_vma) x, inplace_address);
8b125cde
DE		 649 }
650 break;
651 case 2:
652 {
653 unsigned long x = bfd_get_32 (input_bfd, inplace_address);
654 DOIT (x);
dc810e39 655 bfd_put_32 (input_bfd, (bfd_vma)x , inplace_address);
8b125cde
DE		 656 }
657 break;
658 default:
659 BFD_ASSERT (0);
660 }
4c72e23a
CM		 661
662 if (output_bfd != (bfd *) NULL)
663 reloc_entry->address += input_section->output_offset;
664
665 return ret;
252b5132
RH		 666}
667
668/* Handle the R_M32R_SDA16 reloc.
669 This reloc is used to compute the address of objects in the small data area
670 and to perform loads and stores from that area.
671 The lower 16 bits are sign extended and added to the register specified
672 in the instruction, which is assumed to point to _SDA_BASE_. */
673
674static bfd_reloc_status_type
675m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data,
676 input_section, output_bfd, error_message)
5f771d47 677 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH		 678 arelent *reloc_entry;
679 asymbol *symbol;
5f771d47 680 PTR data ATTRIBUTE_UNUSED;
252b5132
RH		 681 asection *input_section;
682 bfd *output_bfd;
5f771d47 683 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH		 684{
685 /* This part is from bfd_elf_generic_reloc. */
686 if (output_bfd != (bfd *) NULL
687 && (symbol->flags & BSF_SECTION_SYM) == 0
688 && (! reloc_entry->howto->partial_inplace
689 || reloc_entry->addend == 0))
690 {
691 reloc_entry->address += input_section->output_offset;
692 return bfd_reloc_ok;
693 }
694
695 if (output_bfd != NULL)
696 {
697 /* FIXME: See bfd_perform_relocation. Is this right? */
698 return bfd_reloc_continue;
699 }
700
701 /* FIXME: not sure what to do here yet. But then again, the linker
702 may never call us. */
703 abort ();
704}
705\f
706/* Map BFD reloc types to M32R ELF reloc types. */
707
708struct m32r_reloc_map
709{
710 bfd_reloc_code_real_type bfd_reloc_val;
711 unsigned char elf_reloc_val;
712};
713
714static const struct m32r_reloc_map m32r_reloc_map[] =
715{
716 { BFD_RELOC_NONE, R_M32R_NONE },
717 { BFD_RELOC_16, R_M32R_16 },
718 { BFD_RELOC_32, R_M32R_32 },
719 { BFD_RELOC_M32R_24, R_M32R_24 },
720 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL },
721 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL },
722 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL },
723 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO },
724 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO },
725 { BFD_RELOC_M32R_LO16, R_M32R_LO16 },
726 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 },
727 { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT },
728 { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY },
729};
730
731static reloc_howto_type *
732bfd_elf32_bfd_reloc_type_lookup (abfd, code)
5f771d47 733 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH		 734 bfd_reloc_code_real_type code;
735{
736 unsigned int i;
737
738 for (i = 0;
739 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map);
740 i++)
741 {
742 if (m32r_reloc_map[i].bfd_reloc_val == code)
743 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val];
744 }
745
746 return NULL;
747}
748
749/* Set the howto pointer for an M32R ELF reloc. */
750
751static void
752m32r_info_to_howto_rel (abfd, cache_ptr, dst)
5f771d47 753 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH		 754 arelent *cache_ptr;
755 Elf32_Internal_Rel *dst;
756{
757 unsigned int r_type;
758
759 r_type = ELF32_R_TYPE (dst->r_info);
760 BFD_ASSERT (r_type < (unsigned int) R_M32R_max);
761 cache_ptr->howto = &m32r_elf_howto_table[r_type];
762}
763\f
764/* Given a BFD section, try to locate the corresponding ELF section
765 index. */
766
767boolean
af746e92 768_bfd_m32r_elf_section_from_bfd_section (abfd, sec, retval)
5f771d47 769 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH		 770 asection *sec;
771 int *retval;
772{
773 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
774 {
775 *retval = SHN_M32R_SCOMMON;
776 return true;
777 }
778 return false;
779}
780
781/* M32R ELF uses two common sections. One is the usual one, and the other
782 is for small objects. All the small objects are kept together, and then
783 referenced via one register, which yields faster assembler code. It is
784 up to the compiler to emit an instruction to load the register with
785 _SDA_BASE. This is what we use for the small common section. This
786 approach is copied from elf32-mips.c. */
787static asection m32r_elf_scom_section;
788static asymbol m32r_elf_scom_symbol;
789static asymbol *m32r_elf_scom_symbol_ptr;
790
791/* Handle the special M32R section numbers that a symbol may use. */
792
793void
794_bfd_m32r_elf_symbol_processing (abfd, asym)
5f771d47 795 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH		 796 asymbol *asym;
797{
798 elf_symbol_type *elfsym;
799
800 elfsym = (elf_symbol_type *) asym;
801
802 switch (elfsym->internal_elf_sym.st_shndx)
803 {
804 case SHN_M32R_SCOMMON:
805 if (m32r_elf_scom_section.name == NULL)
806 {
807 /* Initialize the small common section. */
808 m32r_elf_scom_section.name = ".scommon";
809 m32r_elf_scom_section.flags = SEC_IS_COMMON;
810 m32r_elf_scom_section.output_section = &m32r_elf_scom_section;
811 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol;
812 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr;
813 m32r_elf_scom_symbol.name = ".scommon";
814 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM;
815 m32r_elf_scom_symbol.section = &m32r_elf_scom_section;
816 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol;
817 }
818 asym->section = &m32r_elf_scom_section;
819 asym->value = elfsym->internal_elf_sym.st_size;
820 break;
821 }
822}
823
824/* Hook called by the linker routine which adds symbols from an object
825 file. We must handle the special M32R section numbers here.
826 We also keep watching for whether we need to create the sdata special
827 linker sections. */
828
829static boolean
830m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
831 bfd *abfd;
832 struct bfd_link_info *info;
833 const Elf_Internal_Sym *sym;
834 const char **namep;
5f771d47 835 flagword *flagsp ATTRIBUTE_UNUSED;
252b5132
RH		 836 asection **secp;
837 bfd_vma *valp;
838{
839 if (! info->relocateable
840 && (*namep)[0] == '_' && (*namep)[1] == 'S'
841 && strcmp (*namep, "_SDA_BASE_") == 0)
842 {
843 /* This is simpler than using _bfd_elf_create_linker_section
844 (our needs are simpler than ppc's needs). Also
845 _bfd_elf_create_linker_section currently has a bug where if a .sdata
846 section already exists a new one is created that follows it which
847 screws of _SDA_BASE_ address calcs because output_offset != 0. */
848 struct elf_link_hash_entry *h;
849 asection *s = bfd_get_section_by_name (abfd, ".sdata");
850
851 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
852
853 if (s == NULL)
854 {
dc810e39
AM		 855 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
856 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
252b5132
RH		 857
858 s = bfd_make_section_anyway (abfd, ".sdata");
859 if (s == NULL)
860 return false;
861 bfd_set_section_flags (abfd, s, flags);
862 bfd_set_section_alignment (abfd, s, 2);
863 }
864
865 h = (struct elf_link_hash_entry *)
866 bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false);
867
868 if ((h == NULL || h->root.type == bfd_link_hash_undefined)
869 && !(_bfd_generic_link_add_one_symbol (info,
870 abfd,
871 "_SDA_BASE_",
872 BSF_GLOBAL,
873 s,
dc810e39 874 (bfd_vma) 32768,
252b5132
RH		 875 (const char *) NULL,
876 false,
877 get_elf_backend_data (abfd)->collect,
878 (struct bfd_link_hash_entry **) &h)))
879 return false;
880 h->type = STT_OBJECT;
881 }
882
883 switch (sym->st_shndx)
884 {
885 case SHN_M32R_SCOMMON:
886 *secp = bfd_make_section_old_way (abfd, ".scommon");
887 (*secp)->flags |= SEC_IS_COMMON;
888 *valp = sym->st_size;
889 break;
890 }
891
892 return true;
893}
894
895/* We have to figure out the SDA_BASE value, so that we can adjust the
896 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
897 BFD. If we can't find it, we're stuck. We cache it in the ELF
898 target data. We don't need to adjust the symbol value for an
899 external symbol if we are producing relocateable output. */
900
901static bfd_reloc_status_type
902m32r_elf_final_sda_base (output_bfd, info, error_message, psb)
903 bfd *output_bfd;
904 struct bfd_link_info *info;
905 const char **error_message;
906 bfd_vma *psb;
907{
908 if (elf_gp (output_bfd) == 0)
909 {
910 struct bfd_link_hash_entry *h;
911
912 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
913 if (h != (struct bfd_link_hash_entry *) NULL
914 && h->type == bfd_link_hash_defined)
915 elf_gp (output_bfd) = (h->u.def.value
916 + h->u.def.section->output_section->vma
917 + h->u.def.section->output_offset);
918 else
919 {
920 /* Only get the error once. */
921 *psb = elf_gp (output_bfd) = 4;
922 *error_message =
923 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
924 return bfd_reloc_dangerous;
925 }
926 }
927 *psb = elf_gp (output_bfd);
928 return bfd_reloc_ok;
929}
930\f
931/* Relocate an M32R/D ELF section.
932 There is some attempt to make this function usable for many architectures,
933 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
934 if only to serve as a learning tool.
935
936 The RELOCATE_SECTION function is called by the new ELF backend linker
937 to handle the relocations for a section.
938
939 The relocs are always passed as Rela structures; if the section
940 actually uses Rel structures, the r_addend field will always be
941 zero.
942
943 This function is responsible for adjust the section contents as
944 necessary, and (if using Rela relocs and generating a
945 relocateable output file) adjusting the reloc addend as
946 necessary.
947
948 This function does not have to worry about setting the reloc
949 address or the reloc symbol index.
950
951 LOCAL_SYMS is a pointer to the swapped in local symbols.
952
953 LOCAL_SECTIONS is an array giving the section in the input file
954 corresponding to the st_shndx field of each local symbol.
955
956 The global hash table entry for the global symbols can be found
957 via elf_sym_hashes (input_bfd).
958
959 When generating relocateable output, this function must handle
960 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
961 going to be the section symbol corresponding to the output
962 section, which means that the addend must be adjusted
963 accordingly. */
964
965static boolean
966m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section,
967 contents, relocs, local_syms, local_sections)
5f771d47 968 bfd *output_bfd ATTRIBUTE_UNUSED;
252b5132
RH		 969 struct bfd_link_info *info;
970 bfd *input_bfd;
971 asection *input_section;
972 bfd_byte *contents;
973 Elf_Internal_Rela *relocs;
974 Elf_Internal_Sym *local_syms;
975 asection **local_sections;
976{
977 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
978 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
979 Elf_Internal_Rela *rel, *relend;
980 /* Assume success. */
981 boolean ret = true;
982
983 rel = relocs;
984 relend = relocs + input_section->reloc_count;
985 for (; rel < relend; rel++)
986 {
987 int r_type;
988 reloc_howto_type *howto;
989 unsigned long r_symndx;
990 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
991 ensure it's zero (we use REL relocs, not RELA). Therefore this
992 should be assigning zero to `addend', but for clarity we use
993 `r_addend'. */
994 bfd_vma addend = rel->r_addend;
995 bfd_vma offset = rel->r_offset;
996 struct elf_link_hash_entry *h;
997 Elf_Internal_Sym *sym;
998 asection *sec;
999 const char *sym_name;
1000 bfd_reloc_status_type r;
1001 const char *errmsg = NULL;
1002
1003 h = NULL;
1004 r_type = ELF32_R_TYPE (rel->r_info);
1005 if (r_type < 0 || r_type >= (int) R_M32R_max)
1006 {
1007 (*_bfd_error_handler) (_("%s: unknown relocation type %d"),
8f615d07 1008 bfd_archive_filename (input_bfd),
252b5132
RH		 1009 (int) r_type);
1010 bfd_set_error (bfd_error_bad_value);
1011 ret = false;
1012 continue;
1013 }
1014
1015 if (r_type == R_M32R_GNU_VTENTRY
1016 || r_type == R_M32R_GNU_VTINHERIT)
1017 continue;
1018
1019 howto = m32r_elf_howto_table + r_type;
1020 r_symndx = ELF32_R_SYM (rel->r_info);
1021
1022 if (info->relocateable)
1023 {
1024 /* This is a relocateable link. We don't have to change
1025 anything, unless the reloc is against a section symbol,
1026 in which case we have to adjust according to where the
1027 section symbol winds up in the output section. */
1028 sec = NULL;
1029 if (r_symndx >= symtab_hdr->sh_info)
1030 {
1031 /* External symbol. */
1032 continue;
1033 }
1034
1035 /* Local symbol. */
1036 sym = local_syms + r_symndx;
1037 sym_name = "<local symbol>";
1038 /* STT_SECTION: symbol is associated with a section. */
1039 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
1040 {
1041 /* Symbol isn't associated with a section. Nothing to do. */
1042 continue;
1043 }
1044
1045 sec = local_sections[r_symndx];
1046 addend += sec->output_offset + sym->st_value;
1047#ifndef USE_REL
1048 /* This can't be done for USE_REL because it doesn't mean anything
1049 and elf_link_input_bfd asserts this stays zero. */
1050 rel->r_addend = addend;
1051#endif
1052
1053#ifndef USE_REL
1054 /* Addends are stored with relocs. We're done. */
1055 continue;
1056#else /* USE_REL */
1057 /* If partial_inplace, we need to store any additional addend
1058 back in the section. */
1059 if (! howto->partial_inplace)
1060 continue;
1061 /* ??? Here is a nice place to call a special_function
1062 like handler. */
1063 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO)
1064 r = _bfd_relocate_contents (howto, input_bfd,
1065 addend, contents + offset);
1066 else
1067 {
1068 Elf_Internal_Rela *lorel;
1069
1070 /* We allow an arbitrary number of HI16 relocs before the
1071 LO16 reloc. This permits gcc to emit the HI and LO relocs
1072 itself. */
1073 for (lorel = rel + 1;
1074 (lorel < relend
1075 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1076 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1077 lorel++)
1078 continue;
1079 if (lorel < relend
1080 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1081 {
1082 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1083 contents, addend);
1084 r = bfd_reloc_ok;
1085 }
1086 else
1087 r = _bfd_relocate_contents (howto, input_bfd,
1088 addend, contents + offset);
1089 }
1090#endif /* USE_REL */
1091 }
1092 else
1093 {
1094 bfd_vma relocation;
1095
1096 /* This is a final link. */
1097 sym = NULL;
1098 sec = NULL;
1099
1100 if (r_symndx < symtab_hdr->sh_info)
1101 {
1102 /* Local symbol. */
1103 sym = local_syms + r_symndx;
1104 sec = local_sections[r_symndx];
1105 sym_name = "<local symbol>";
f8df10f4
JJ		 1106#ifndef USE_REL
1107 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, sec, rel);
1108 addend = rel->r_addend;
1109#else
1110 /* FIXME: This won't handle local relocations against SEC_MERGE
1111 symbols. See elf32-i386.c for how to do this. */
252b5132
RH		 1112 relocation = (sec->output_section->vma
1113 + sec->output_offset
1114 + sym->st_value);
f8df10f4 1115#endif
252b5132
RH		 1116 }
1117 else
1118 {
1119 /* External symbol. */
1120 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1121 while (h->root.type == bfd_link_hash_indirect
1122 || h->root.type == bfd_link_hash_warning)
1123 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1124 sym_name = h->root.root.string;
1125
1126 if (h->root.type == bfd_link_hash_defined
1127 || h->root.type == bfd_link_hash_defweak)
1128 {
1129 sec = h->root.u.def.section;
1130 if (sec->output_section == NULL)
1131 relocation = 0;
1132 else
1133 relocation = (h->root.u.def.value
1134 + sec->output_section->vma
1135 + sec->output_offset);
1136 }
1137 else if (h->root.type == bfd_link_hash_undefweak)
1138 relocation = 0;
1139 else
1140 {
1141 if (! ((*info->callbacks->undefined_symbol)
1142 (info, h->root.root.string, input_bfd,
5cc7c785 1143 input_section, offset, true)))
252b5132
RH		 1144 return false;
1145 relocation = 0;
1146 }
1147 }
1148
1149 /* Sanity check the address. */
1150 if (offset > input_section->_raw_size)
1151 {
1152 r = bfd_reloc_outofrange;
1153 goto check_reloc;
1154 }
1155
1156 switch ((int) r_type)
1157 {
1158 case (int) R_M32R_10_PCREL :
1159 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section,
1160 contents, offset,
1161 sec, relocation, addend);
1162 break;
1163
1164 case (int) R_M32R_HI16_SLO :
1165 case (int) R_M32R_HI16_ULO :
1166 {
1167 Elf_Internal_Rela *lorel;
1168
1169 /* We allow an arbitrary number of HI16 relocs before the
1170 LO16 reloc. This permits gcc to emit the HI and LO relocs
1171 itself. */
1172 for (lorel = rel + 1;
1173 (lorel < relend
1174 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1175 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1176 lorel++)
1177 continue;
1178 if (lorel < relend
1179 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1180 {
1181 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1182 contents, relocation + addend);
1183 r = bfd_reloc_ok;
1184 }
1185 else
1186 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1187 contents, offset,
1188 relocation, addend);
1189 }
1190 break;
1191
1192 case (int) R_M32R_SDA16 :
1193 {
1194 const char *name;
1195
1196 BFD_ASSERT (sec != NULL);
1197 name = bfd_get_section_name (abfd, sec);
1198
1199 if (strcmp (name, ".sdata") == 0
1200 || strcmp (name, ".sbss") == 0
1201 || strcmp (name, ".scommon") == 0)
1202 {
1203 bfd_vma sda_base;
1204 bfd *out_bfd = sec->output_section->owner;
1205
1206 r = m32r_elf_final_sda_base (out_bfd, info,
1207 &errmsg,
1208 &sda_base);
1209 if (r != bfd_reloc_ok)
1210 {
1211 ret = false;
1212 goto check_reloc;
1213 }
1214
1215 /* At this point `relocation' contains the object's
1216 address. */
1217 relocation -= sda_base;
1218 /* Now it contains the offset from _SDA_BASE_. */
1219 }
1220 else
1221 {
8f615d07
AM		 1222 (*_bfd_error_handler)
1223 (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1224 bfd_archive_filename (input_bfd),
1225 sym_name,
1226 m32r_elf_howto_table[(int) r_type].name,
1227 bfd_get_section_name (abfd, sec));
252b5132
RH		 1228 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1229 ret = false;
1230 continue;
1231 }
1232 }
1233 /* fall through */
1234
1235 default :
1236 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1237 contents, offset,
1238 relocation, addend);
1239 break;
1240 }
1241 }
1242
1243 check_reloc:
1244
1245 if (r != bfd_reloc_ok)
1246 {
1247 /* FIXME: This should be generic enough to go in a utility. */
1248 const char *name;
1249
1250 if (h != NULL)
1251 name = h->root.root.string;
1252 else
1253 {
1254 name = (bfd_elf_string_from_elf_section
1255 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1256 if (name == NULL || *name == '\0')
1257 name = bfd_section_name (input_bfd, sec);
1258 }
1259
1260 if (errmsg != NULL)
1261 goto common_error;
1262
1263 switch (r)
1264 {
1265 case bfd_reloc_overflow:
1266 if (! ((*info->callbacks->reloc_overflow)
1267 (info, name, howto->name, (bfd_vma) 0,
1268 input_bfd, input_section, offset)))
1269 return false;
1270 break;
1271
1272 case bfd_reloc_undefined:
1273 if (! ((*info->callbacks->undefined_symbol)
1274 (info, name, input_bfd, input_section,
5cc7c785 1275 offset, true)))
252b5132
RH		 1276 return false;
1277 break;
1278
1279 case bfd_reloc_outofrange:
1280 errmsg = _("internal error: out of range error");
1281 goto common_error;
1282
1283 case bfd_reloc_notsupported:
1284 errmsg = _("internal error: unsupported relocation error");
1285 goto common_error;
1286
1287 case bfd_reloc_dangerous:
1288 errmsg = _("internal error: dangerous error");
1289 goto common_error;
1290
1291 default:
1292 errmsg = _("internal error: unknown error");
1293 /* fall through */
1294
1295 common_error:
1296 if (!((*info->callbacks->warning)
1297 (info, errmsg, name, input_bfd, input_section,
1298 offset)))
1299 return false;
1300 break;
1301 }
1302 }
1303 }
1304
1305 return ret;
1306}
1307\f
1308#if 0 /* relaxing not supported yet */
1309
1310/* This function handles relaxing for the m32r.
1311 Relaxing on the m32r is tricky because of instruction alignment
1312 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1313
1314 The following relaxing opportunities are handled:
1315
1316 seth/add3/jl -> bl24 or bl8
1317 seth/add3 -> ld24
1318
1319 It would be nice to handle bl24 -> bl8 but given:
1320
1321 - 4 byte insns must be on 4 byte boundaries
1322 - branch instructions only branch to insns on 4 byte boundaries
1323
1324 this isn't much of a win because the insn in the 2 "deleted" bytes
1325 must become a nop. With some complexity some real relaxation could be
1326 done but the frequency just wouldn't make it worth it; it's better to
1327 try to do all the code compaction one can elsewhere.
1328 When the chip supports parallel 16 bit insns, things may change.
1329*/
1330
c3668558 1331static boolean
252b5132
RH		 1332m32r_elf_relax_section (abfd, sec, link_info, again)
1333 bfd *abfd;
1334 asection *sec;
1335 struct bfd_link_info *link_info;
1336 boolean *again;
1337{
1338 Elf_Internal_Shdr *symtab_hdr;
1339 /* The Rela structures are used here because that's what
1340 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend
1341 field to 0]. */
1342 Elf_Internal_Rela *internal_relocs;
1343 Elf_Internal_Rela *free_relocs = NULL;
1344 Elf_Internal_Rela *irel, *irelend;
1345 bfd_byte *contents = NULL;
1346 bfd_byte *free_contents = NULL;
1347 Elf32_External_Sym *extsyms = NULL;
1348 Elf32_External_Sym *free_extsyms = NULL;
1349
1350 /* Assume nothing changes. */
1351 *again = false;
1352
1353 /* We don't have to do anything for a relocateable link, if
1354 this section does not have relocs, or if this is not a
1355 code section. */
1356 if (link_info->relocateable
1357 || (sec->flags & SEC_RELOC) == 0
1358 || sec->reloc_count == 0
1359 || (sec->flags & SEC_CODE) == 0
1360 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1361 return true;
1362
1363 /* If this is the first time we have been called for this section,
1364 initialize the cooked size. */
1365 if (sec->_cooked_size == 0)
1366 sec->_cooked_size = sec->_raw_size;
1367
1368 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1369
1370 /* Get a copy of the native relocations. */
1371 internal_relocs = (_bfd_elf32_link_read_relocs
1372 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1373 link_info->keep_memory));
1374 if (internal_relocs == NULL)
1375 goto error_return;
1376 if (! link_info->keep_memory)
1377 free_relocs = internal_relocs;
1378
1379 /* Walk through them looking for relaxing opportunities. */
1380 irelend = internal_relocs + sec->reloc_count;
1381 for (irel = internal_relocs; irel < irelend; irel++)
1382 {
1383 bfd_vma symval;
1384
1385 /* If this isn't something that can be relaxed, then ignore
1386 this reloc. */
1387 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO)
1388 continue;
1389
1390 /* Get the section contents if we haven't done so already. */
1391 if (contents == NULL)
1392 {
1393 /* Get cached copy if it exists. */
1394 if (elf_section_data (sec)->this_hdr.contents != NULL)
1395 contents = elf_section_data (sec)->this_hdr.contents;
1396 else
1397 {
1398 /* Go get them off disk. */
1399 contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
1400 if (contents == NULL)
1401 goto error_return;
1402 free_contents = contents;
1403
1404 if (! bfd_get_section_contents (abfd, sec, contents,
1405 (file_ptr) 0, sec->_raw_size))
1406 goto error_return;
1407 }
1408 }
1409
1410 /* Read this BFD's symbols if we haven't done so already. */
1411 if (extsyms == NULL)
1412 {
1413 /* Get cached copy if it exists. */
1414 if (symtab_hdr->contents != NULL)
1415 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1416 else
1417 {
dc810e39 1418 bfd_size_type amt = symtab_hdr->sh_size;
252b5132 1419 /* Go get them off disk. */
dc810e39 1420 extsyms = (Elf32_External_Sym *) bfd_malloc (amt);
252b5132
RH		 1421 if (extsyms == NULL)
1422 goto error_return;
1423 free_extsyms = extsyms;
1424 if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0
dc810e39 1425 || bfd_bread (extsyms, amt, abfd) != amt)
252b5132
RH		 1426 goto error_return;
1427 }
1428 }
1429
1430 /* Get the value of the symbol referred to by the reloc. */
1431 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1432 {
1433 Elf_Internal_Sym isym;
1434 asection *sym_sec;
1435
1436 /* A local symbol. */
1437 bfd_elf32_swap_symbol_in (abfd,
1438 extsyms + ELF32_R_SYM (irel->r_info),
1439 &isym);
1440
1441 sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx);
1442 symval = (isym.st_value
1443 + sym_sec->output_section->vma
1444 + sym_sec->output_offset);
1445 }
1446 else
1447 {
1448 unsigned long indx;
1449 struct elf_link_hash_entry *h;
1450
1451 /* An external symbol. */
1452 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1453 h = elf_sym_hashes (abfd)[indx];
1454 BFD_ASSERT (h != NULL);
1455 if (h->root.type != bfd_link_hash_defined
1456 && h->root.type != bfd_link_hash_defweak)
1457 {
1458 /* This appears to be a reference to an undefined
1459 symbol. Just ignore it--it will be caught by the
1460 regular reloc processing. */
1461 continue;
1462 }
1463
1464 symval = (h->root.u.def.value
1465 + h->root.u.def.section->output_section->vma
1466 + h->root.u.def.section->output_offset);
1467 }
1468
1469 /* For simplicity of coding, we are going to modify the section
1470 contents, the section relocs, and the BFD symbol table. We
1471 must tell the rest of the code not to free up this
1472 information. It would be possible to instead create a table
1473 of changes which have to be made, as is done in coff-mips.c;
1474 that would be more work, but would require less memory when
1475 the linker is run. */
1476
1477 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1478 This sequence is generated by the compiler when compiling in
1479 32 bit mode. Also look for seth/add3 -> ld24. */
1480
1481 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO)
1482 {
1483 Elf_Internal_Rela *nrel;
1484 bfd_vma pc = (sec->output_section->vma + sec->output_offset
1485 + irel->r_offset);
1486 bfd_signed_vma pcrel_value = symval - pc;
1487 unsigned int code,reg;
1488 int addend,nop_p,bl8_p,to_delete;
1489
1490 /* The tests are ordered so that we get out as quickly as possible
1491 if this isn't something we can relax, taking into account that
1492 we are looking for two separate possibilities (jl/ld24). */
1493
1494 /* Do nothing if no room in the section for this to be what we're
1495 looking for. */
1496 if (irel->r_offset > sec->_cooked_size - 8)
1497 continue;
1498
1499 /* Make sure the next relocation applies to the next
1500 instruction and that it's the add3's reloc. */
1501 nrel = irel + 1;
1502 if (nrel == irelend
1503 || irel->r_offset + 4 != nrel->r_offset
1504 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16)
1505 continue;
1506
1507 /* See if the instructions are seth/add3. */
1508 /* FIXME: This is where macros from cgen can come in. */
1509 code = bfd_get_16 (abfd, contents + irel->r_offset + 0);
1510 if ((code & 0xf0ff) != 0xd0c0)
1511 continue; /* not seth rN,foo */
1512 reg = (code & 0x0f00) >> 8;
1513 code = bfd_get_16 (abfd, contents + irel->r_offset + 4);
1514 if (code != (0x80a0 | reg | (reg << 8)))
1515 continue; /* not add3 rN,rN,foo */
1516
1517 /* At this point we've confirmed we have seth/add3. Now check
1518 whether the next insn is a jl, in which case try to change this
1519 to bl24 or bl8. */
1520
1521 /* Ensure the branch target is in range.
1522 The bl24 instruction has a 24 bit operand which is the target
1523 address right shifted by 2, giving a signed range of 26 bits.
1524 Note that 4 bytes are added to the high value because the target
1525 will be at least 4 bytes closer if we can relax. It'll actually
1526 be 4 or 8 bytes closer, but we don't know which just yet and
1527 the difference isn't significant enough to worry about. */
1528#ifndef USE_REL /* put in for learning purposes */
1529 pcrel_value += irel->r_addend;
1530#else
1531 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
1532 pcrel_value += addend;
1533#endif
1534
1535 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4
1536 /* Do nothing if no room in the section for this to be what we're
1537 looking for. */
1538 && (irel->r_offset <= sec->_cooked_size - 12)
1539 /* Ensure the next insn is "jl rN". */
1540 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)),
1541 code != (0x1ec0 | reg)))
1542 {
1543 /* We can relax to bl24/bl8. */
1544
1545 /* See if there's a nop following the jl.
1546 Also see if we can use a bl8 insn. */
1547 code = bfd_get_16 (abfd, contents + irel->r_offset + 10);
1548 nop_p = (code & 0x7fff) == NOP_INSN;
1549 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200;
1550
1551 if (bl8_p)
1552 {
1553 /* Change "seth rN,foo" to "bl8 foo || nop".
1554 We OR in CODE just in case it's not a nop (technically,
1555 CODE currently must be a nop, but for cleanness we
1556 allow it to be anything). */
1557#ifndef USE_REL /* put in for learning purposes */
1558 code = 0x7e000000 | MAKE_PARALLEL (code);
1559#else
1560 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code);
1561#endif
1562 to_delete = 8;
1563 }
1564 else
1565 {
1566 /* Change the seth rN,foo to a bl24 foo. */
1567#ifndef USE_REL /* put in for learning purposes */
1568 code = 0xfe000000;
1569#else
1570 code = 0xfe000000 + ((addend >> 2) & 0xffffff);
1571#endif
1572 to_delete = nop_p ? 8 : 4;
1573 }
1574
1575 bfd_put_32 (abfd, code, contents + irel->r_offset);
1576
1577 /* Set the new reloc type. */
1578 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1579 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL);
1580
1581 /* Delete the add3 reloc by making it a null reloc. */
1582 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1583 R_M32R_NONE);
1584 }
1585 else if (addend >= 0
1586 && symval + addend <= 0xffffff)
1587 {
1588 /* We can relax to ld24. */
1589
1590 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff);
1591 bfd_put_32 (abfd, code, contents + irel->r_offset);
1592 to_delete = 4;
1593 /* Tell the following code a nop filler isn't needed. */
1594 nop_p = 1;
1595 }
1596 else
1597 {
1598 /* Can't do anything here. */
1599 continue;
1600 }
1601
1602 /* Note that we've changed the relocs, section contents, etc. */
1603 elf_section_data (sec)->relocs = internal_relocs;
1604 free_relocs = NULL;
1605
1606 elf_section_data (sec)->this_hdr.contents = contents;
1607 free_contents = NULL;
1608
1609 symtab_hdr->contents = (bfd_byte *) extsyms;
1610 free_extsyms = NULL;
1611
1612 /* Delete TO_DELETE bytes of data. */
1613 if (!m32r_elf_relax_delete_bytes (abfd, sec,
1614 irel->r_offset + 4, to_delete))
1615 goto error_return;
1616
1617 /* Now that the following bytes have been moved into place, see if
1618 we need to replace the jl with a nop. This happens when we had
1619 to use a bl24 insn and the insn following the jl isn't a nop.
1620 Technically, this situation can't happen (since the insn can
1621 never be executed) but to be clean we do this. When the chip
1622 supports parallel 16 bit insns things may change.
1623 We don't need to do this in the case of relaxing to ld24,
1624 and the above code sets nop_p so this isn't done. */
1625 if (! nop_p && to_delete == 4)
1626 bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4);
1627
1628 /* That will change things, so we should relax again.
1629 Note that this is not required, and it may be slow. */
1630 *again = true;
1631
1632 continue;
1633 }
1634
1635 /* loop to try the next reloc */
1636 }
1637
1638 if (free_relocs != NULL)
1639 {
1640 free (free_relocs);
1641 free_relocs = NULL;
1642 }
1643
1644 if (free_contents != NULL)
1645 {
1646 if (! link_info->keep_memory)
1647 free (free_contents);
1648 else
1649 {
1650 /* Cache the section contents for elf_link_input_bfd. */
1651 elf_section_data (sec)->this_hdr.contents = contents;
1652 }
1653 free_contents = NULL;
1654 }
1655
1656 if (free_extsyms != NULL)
1657 {
1658 if (! link_info->keep_memory)
1659 free (free_extsyms);
1660 else
1661 {
1662 /* Cache the symbols for elf_link_input_bfd. */
1663 symtab_hdr->contents = extsyms;
1664 }
1665 free_extsyms = NULL;
1666 }
1667
1668 return true;
1669
1670 error_return:
1671 if (free_relocs != NULL)
1672 free (free_relocs);
1673 if (free_contents != NULL)
1674 free (free_contents);
1675 if (free_extsyms != NULL)
1676 free (free_extsyms);
1677 return false;
1678}
1679
1680/* Delete some bytes from a section while relaxing. */
1681
1682static boolean
1683m32r_elf_relax_delete_bytes (abfd, sec, addr, count)
1684 bfd *abfd;
1685 asection *sec;
1686 bfd_vma addr;
1687 int count;
1688{
1689 Elf_Internal_Shdr *symtab_hdr;
1690 Elf32_External_Sym *extsyms;
1691 int shndx, index;
1692 bfd_byte *contents;
1693 Elf_Internal_Rela *irel, *irelend;
1694 Elf_Internal_Rela *irelalign;
1695 bfd_vma toaddr;
1696 Elf32_External_Sym *esym, *esymend;
1697 struct elf_link_hash_entry *sym_hash;
1698
1699 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1700 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1701
1702 shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1703
1704 contents = elf_section_data (sec)->this_hdr.contents;
1705
1706 /* The deletion must stop at the next ALIGN reloc for an aligment
1707 power larger than the number of bytes we are deleting. */
1708
1709 irelalign = NULL;
1710 toaddr = sec->_cooked_size;
1711
1712 irel = elf_section_data (sec)->relocs;
1713 irelend = irel + sec->reloc_count;
1714
1715 /* Actually delete the bytes. */
1716 memmove (contents + addr, contents + addr + count, toaddr - addr - count);
1717 sec->_cooked_size -= count;
1718
1719 /* Adjust all the relocs. */
1720 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1721 {
1722 /* Get the new reloc address. */
1723 if ((irel->r_offset > addr
1724 && irel->r_offset < toaddr))
1725 irel->r_offset -= count;
1726 }
1727
1728 /* Adjust the local symbols defined in this section. */
1729 esym = extsyms;
1730 esymend = esym + symtab_hdr->sh_info;
1731 for (; esym < esymend; esym++)
1732 {
1733 Elf_Internal_Sym isym;
1734
1735 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1736
1737 if (isym.st_shndx == shndx
1738 && isym.st_value > addr
1739 && isym.st_value < toaddr)
1740 {
1741 isym.st_value -= count;
1742 bfd_elf32_swap_symbol_out (abfd, &isym, esym);
1743 }
1744 }
1745
1746 /* Now adjust the global symbols defined in this section. */
1747 esym = extsyms + symtab_hdr->sh_info;
1748 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
1749 for (index = 0; esym < esymend; esym++, index++)
1750 {
1751 Elf_Internal_Sym isym;
1752
1753 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1754 sym_hash = elf_sym_hashes (abfd)[index];
1755 if (isym.st_shndx == shndx
1756 && ((sym_hash)->root.type == bfd_link_hash_defined
1757 || (sym_hash)->root.type == bfd_link_hash_defweak)
1758 && (sym_hash)->root.u.def.section == sec
1759 && (sym_hash)->root.u.def.value > addr
1760 && (sym_hash)->root.u.def.value < toaddr)
1761 {
1762 (sym_hash)->root.u.def.value -= count;
1763 }
1764 }
1765
1766 return true;
1767}
1768
1769/* This is a version of bfd_generic_get_relocated_section_contents
1770 which uses m32r_elf_relocate_section. */
1771
1772static bfd_byte *
1773m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1774 data, relocateable, symbols)
1775 bfd *output_bfd;
1776 struct bfd_link_info *link_info;
1777 struct bfd_link_order *link_order;
1778 bfd_byte *data;
1779 boolean relocateable;
1780 asymbol **symbols;
1781{
1782 Elf_Internal_Shdr *symtab_hdr;
1783 asection *input_section = link_order->u.indirect.section;
1784 bfd *input_bfd = input_section->owner;
1785 asection **sections = NULL;
1786 Elf_Internal_Rela *internal_relocs = NULL;
1787 Elf32_External_Sym *external_syms = NULL;
1788 Elf_Internal_Sym *internal_syms = NULL;
dc810e39 1789 bfd_size_type amt;
252b5132
RH		 1790
1791 /* We only need to handle the case of relaxing, or of having a
1792 particular set of section contents, specially. */
1793 if (relocateable
1794 || elf_section_data (input_section)->this_hdr.contents == NULL)
1795 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1796 link_order, data,
1797 relocateable,
1798 symbols);
1799
1800 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1801
1802 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1803 input_section->_raw_size);
1804
1805 if ((input_section->flags & SEC_RELOC) != 0
1806 && input_section->reloc_count > 0)
1807 {
1808 Elf_Internal_Sym *isymp;
1809 asection **secpp;
1810 Elf32_External_Sym *esym, *esymend;
1811
1812 if (symtab_hdr->contents != NULL)
1813 external_syms = (Elf32_External_Sym *) symtab_hdr->contents;
1814 else
1815 {
dc810e39
AM		 1816 amt = symtab_hdr->sh_info;
1817 amt *= sizeof (Elf32_External_Sym);
1818 external_syms = (Elf32_External_Sym *) bfd_malloc (amt);
252b5132
RH		 1819 if (external_syms == NULL && symtab_hdr->sh_info > 0)
1820 goto error_return;
1821 if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0
dc810e39 1822 || bfd_bread (external_syms, amt, input_bfd) != amt)
252b5132
RH		 1823 goto error_return;
1824 }
1825
1826 internal_relocs = (_bfd_elf32_link_read_relocs
1827 (input_bfd, input_section, (PTR) NULL,
1828 (Elf_Internal_Rela *) NULL, false));
1829 if (internal_relocs == NULL)
1830 goto error_return;
1831
dc810e39
AM		 1832 amt = symtab_hdr->sh_info;
1833 amt *= sizeof (Elf_Internal_Sym);
1834 internal_syms = (Elf_Internal_Sym *) bfd_malloc (amt);
252b5132
RH		 1835 if (internal_syms == NULL && symtab_hdr->sh_info > 0)
1836 goto error_return;
1837
dc810e39
AM		 1838 amt = symtab_hdr->sh_info;
1839 amt *= sizeof (asection *);
1840 sections = (asection **) bfd_malloc (amt);
252b5132
RH		 1841 if (sections == NULL && symtab_hdr->sh_info > 0)
1842 goto error_return;
1843
1844 isymp = internal_syms;
1845 secpp = sections;
1846 esym = external_syms;
1847 esymend = esym + symtab_hdr->sh_info;
1848 for (; esym < esymend; ++esym, ++isymp, ++secpp)
1849 {
1850 asection *isec;
1851
1852 bfd_elf32_swap_symbol_in (input_bfd, esym, isymp);
1853
1854 if (isymp->st_shndx == SHN_UNDEF)
1855 isec = bfd_und_section_ptr;
252b5132
RH		 1856 else if (isymp->st_shndx == SHN_ABS)
1857 isec = bfd_abs_section_ptr;
1858 else if (isymp->st_shndx == SHN_COMMON)
1859 isec = bfd_com_section_ptr;
1860 else if (isymp->st_shndx == SHN_M32R_SCOMMON)
1861 isec = &m32r_elf_scom_section;
1862 else
9ad5cbcf 1863 isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx);
252b5132
RH		 1864
1865 *secpp = isec;
1866 }
1867
1868 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd,
1869 input_section, data, internal_relocs,
1870 internal_syms, sections))
1871 goto error_return;
1872
1873 if (sections != NULL)
1874 free (sections);
1875 sections = NULL;
1876 if (internal_syms != NULL)
1877 free (internal_syms);
1878 internal_syms = NULL;
1879 if (external_syms != NULL && symtab_hdr->contents == NULL)
1880 free (external_syms);
1881 external_syms = NULL;
1882 if (internal_relocs != elf_section_data (input_section)->relocs)
1883 free (internal_relocs);
1884 internal_relocs = NULL;
1885 }
1886
1887 return data;
1888
1889 error_return:
1890 if (internal_relocs != NULL
1891 && internal_relocs != elf_section_data (input_section)->relocs)
1892 free (internal_relocs);
1893 if (external_syms != NULL && symtab_hdr->contents == NULL)
1894 free (external_syms);
1895 if (internal_syms != NULL)
1896 free (internal_syms);
1897 if (sections != NULL)
1898 free (sections);
1899 return NULL;
1900}
1901
1902#endif /* #if 0 */
1903\f
1904/* Set the right machine number. */
1905static boolean
1906m32r_elf_object_p (abfd)
1907 bfd *abfd;
1908{
1909 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1910 {
1911 default:
1912 case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break;
e916b64e 1913 case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
252b5132
RH		 1914 }
1915 return true;
1916}
1917
1918/* Store the machine number in the flags field. */
1919static void
1920m32r_elf_final_write_processing (abfd, linker)
1921 bfd * abfd;
5f771d47 1922 boolean linker ATTRIBUTE_UNUSED;
252b5132
RH		 1923{
1924 unsigned long val;
1925
1926 switch (bfd_get_mach (abfd))
1927 {
1928 default:
1929 case bfd_mach_m32r: val = E_M32R_ARCH; break;
e916b64e 1930 case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
252b5132
RH		 1931 }
1932
1933 elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
1934 elf_elfheader (abfd)->e_flags |= val;
1935}
1936
c3668558 1937/* Function to keep M32R specific file flags. */
252b5132
RH		 1938static boolean
1939m32r_elf_set_private_flags (abfd, flags)
1940 bfd * abfd;
1941 flagword flags;
1942{
1943 BFD_ASSERT (!elf_flags_init (abfd)
1944 || elf_elfheader (abfd)->e_flags == flags);
1945
1946 elf_elfheader (abfd)->e_flags = flags;
1947 elf_flags_init (abfd) = true;
1948 return true;
1949}
1950
252b5132
RH		 1951/* Merge backend specific data from an object file to the output
1952 object file when linking. */
1953static boolean
1954m32r_elf_merge_private_bfd_data (ibfd, obfd)
1955 bfd * ibfd;
1956 bfd * obfd;
1957{
1958 flagword out_flags;
1959 flagword in_flags;
1960
1961 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1962 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1963 return true;
1964
1965 in_flags = elf_elfheader (ibfd)->e_flags;
1966 out_flags = elf_elfheader (obfd)->e_flags;
1967
1968 if (! elf_flags_init (obfd))
1969 {
1970 /* If the input is the default architecture then do not
1971 bother setting the flags for the output architecture,
1972 instead allow future merges to do this. If no future
1973 merges ever set these flags then they will retain their
1974 unitialised values, which surprise surprise, correspond
1975 to the default values. */
1976 if (bfd_get_arch_info (ibfd)->the_default)
1977 return true;
c3668558 1978
252b5132
RH		 1979 elf_flags_init (obfd) = true;
1980 elf_elfheader (obfd)->e_flags = in_flags;
1981
1982 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1983 && bfd_get_arch_info (obfd)->the_default)
1984 {
1985 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
1986 }
1987
1988 return true;
1989 }
1990
1991 /* Check flag compatibility. */
1992 if (in_flags == out_flags)
1993 return true;
1994
1995 if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH))
1996 {
1997 if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH)
1998 {
8f615d07
AM		 1999 (*_bfd_error_handler)
2000 (_("%s: Instruction set mismatch with previous modules"),
2001 bfd_archive_filename (ibfd));
252b5132
RH		 2002
2003 bfd_set_error (bfd_error_bad_value);
2004 return false;
2005 }
2006 }
2007
2008 return true;
2009}
2010
2011/* Display the flags field */
2012static boolean
2013m32r_elf_print_private_bfd_data (abfd, ptr)
2014 bfd * abfd;
2015 PTR ptr;
2016{
2017 FILE * file = (FILE *) ptr;
c3668558 2018
252b5132 2019 BFD_ASSERT (abfd != NULL && ptr != NULL)
c3668558 2020
252b5132 2021 _bfd_elf_print_private_bfd_data (abfd, ptr);
c3668558 2022
252b5132 2023 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
c3668558 2024
252b5132
RH		 2025 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
2026 {
2027 default:
2028 case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
e916b64e 2029 case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
252b5132 2030 }
c3668558 2031
252b5132 2032 fputc ('\n', file);
c3668558 2033
252b5132
RH		 2034 return true;
2035}
2036
2037asection *
2038m32r_elf_gc_mark_hook (abfd, info, rel, h, sym)
2039 bfd *abfd;
5f771d47 2040 struct bfd_link_info *info ATTRIBUTE_UNUSED;
252b5132
RH		 2041 Elf_Internal_Rela *rel;
2042 struct elf_link_hash_entry *h;
2043 Elf_Internal_Sym *sym;
2044{
2045 if (h != NULL)
2046 {
2047 switch (ELF32_R_TYPE (rel->r_info))
2048 {
2049 case R_M32R_GNU_VTINHERIT:
2050 case R_M32R_GNU_VTENTRY:
2051 break;
c3668558 2052
252b5132
RH		 2053 default:
2054 switch (h->root.type)
2055 {
2056 case bfd_link_hash_defined:
2057 case bfd_link_hash_defweak:
2058 return h->root.u.def.section;
c3668558 2059
252b5132
RH		 2060 case bfd_link_hash_common:
2061 return h->root.u.c.p->section;
e049a0de
ILT		 2062
2063 default:
2064 break;
252b5132
RH		 2065 }
2066 }
2067 }
2068 else
2069 {
9ad5cbcf
AM		 2070 return bfd_section_from_elf_index (abfd, sym->st_shndx);
2071 }
252b5132
RH		 2072 return NULL;
2073}
2074
2075static boolean
2076m32r_elf_gc_sweep_hook (abfd, info, sec, relocs)
5f771d47
ILT		 2077 bfd *abfd ATTRIBUTE_UNUSED;
2078 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2079 asection *sec ATTRIBUTE_UNUSED;
2080 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
252b5132
RH		 2081{
2082 /* we don't use got and plt entries for m32r */
2083 return true;
2084}
2085
252b5132
RH		 2086/* Look through the relocs for a section during the first phase.
2087 Since we don't do .gots or .plts, we just need to consider the
2088 virtual table relocs for gc. */
c3668558 2089
252b5132
RH		 2090static boolean
2091m32r_elf_check_relocs (abfd, info, sec, relocs)
2092 bfd *abfd;
2093 struct bfd_link_info *info;
2094 asection *sec;
2095 const Elf_Internal_Rela *relocs;
2096{
2097 Elf_Internal_Shdr *symtab_hdr;
2098 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
2099 const Elf_Internal_Rela *rel;
2100 const Elf_Internal_Rela *rel_end;
c3668558 2101
252b5132
RH		 2102 if (info->relocateable)
2103 return true;
c3668558 2104
252b5132
RH		 2105 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2106 sym_hashes = elf_sym_hashes (abfd);
c3668558 2107 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
252b5132
RH		 2108 if (!elf_bad_symtab (abfd))
2109 sym_hashes_end -= symtab_hdr->sh_info;
c3668558 2110
252b5132
RH		 2111 rel_end = relocs + sec->reloc_count;
2112 for (rel = relocs; rel < rel_end; rel++)
2113 {
2114 struct elf_link_hash_entry *h;
2115 unsigned long r_symndx;
c3668558 2116
252b5132
RH		 2117 r_symndx = ELF32_R_SYM (rel->r_info);
2118 if (r_symndx < symtab_hdr->sh_info)
2119 h = NULL;
2120 else
2121 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
c3668558 2122
252b5132
RH		 2123 switch (ELF32_R_TYPE (rel->r_info))
2124 {
2125 /* This relocation describes the C++ object vtable hierarchy.
2126 Reconstruct it for later use during GC. */
2127 case R_M32R_GNU_VTINHERIT:
2128 if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
2129 return false;
2130 break;
c3668558 2131
252b5132
RH		 2132 /* This relocation describes which C++ vtable entries are actually
2133 used. Record for later use during GC. */
2134 case R_M32R_GNU_VTENTRY:
2135 if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset))
2136 return false;
2137 break;
2138 }
2139 }
c3668558 2140
252b5132
RH		 2141 return true;
2142}
252b5132 2143\f
252b5132 2144#define ELF_ARCH bfd_arch_m32r
aa4f99bb
AO		 2145#define ELF_MACHINE_CODE EM_M32R
2146#define ELF_MACHINE_ALT1 EM_CYGNUS_M32R
e916b64e 2147#define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
252b5132
RH		 2148
2149#define TARGET_BIG_SYM bfd_elf32_m32r_vec
2150#define TARGET_BIG_NAME "elf32-m32r"
2151
2152#define elf_info_to_howto 0
2153#define elf_info_to_howto_rel m32r_info_to_howto_rel
2154#define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
2155#define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
2156#define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
2157#define elf_backend_relocate_section m32r_elf_relocate_section
2158#define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook
2159#define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook
2160#define elf_backend_check_relocs m32r_elf_check_relocs
2161
2162#define elf_backend_can_gc_sections 1
2163#if 0 /* not yet */
2164/* relax support */
2165#define bfd_elf32_bfd_relax_section m32r_elf_relax_section
2166#define bfd_elf32_bfd_get_relocated_section_contents \
2167 m32r_elf_get_relocated_section_contents
2168#endif
2169
2170#define elf_backend_object_p m32r_elf_object_p
2171#define elf_backend_final_write_processing m32r_elf_final_write_processing
252b5132
RH		 2172#define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
2173#define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
2174#define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
c3668558 2175
252b5132 2176#include "elf32-target.h"
GDB Binutils - Deliverables
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