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* elflink.c (_bfd_elf_gc_mark_hook): New function.
[deliverable/binutils-gdb.git] / bfd / elf32-msp430.c
CommitLineData
2469cfa2 1/* MSP430-specific support for 32-bit ELF
07adf181
AM		 2 Copyright (C) 2002, 2003, 2004, 2005, 2006
3 Free Software Foundation, Inc.
2469cfa2
NC		 4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of BFD, the Binary File Descriptor library.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
3e110533 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
2469cfa2
NC		 21
22#include "bfd.h"
23#include "sysdep.h"
24#include "libiberty.h"
25#include "libbfd.h"
26#include "elf-bfd.h"
27#include "elf/msp430.h"
28
2469cfa2
NC		 29/* Use RELA instead of REL. */
30#undef USE_REL
31
32static reloc_howto_type elf_msp430_howto_table[] =
33{
34 HOWTO (R_MSP430_NONE, /* type */
35 0, /* rightshift */
36 2, /* size (0 = byte, 1 = short, 2 = long) */
37 32, /* bitsize */
38 FALSE, /* pc_relative */
39 0, /* bitpos */
b18c562e 40 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 41 bfd_elf_generic_reloc, /* special_function */
42 "R_MSP430_NONE", /* name */
43 FALSE, /* partial_inplace */
44 0, /* src_mask */
45 0, /* dst_mask */
46 FALSE), /* pcrel_offset */
47
48 HOWTO (R_MSP430_32, /* type */
49 0, /* rightshift */
50 2, /* size (0 = byte, 1 = short, 2 = long) */
51 32, /* bitsize */
52 FALSE, /* pc_relative */
53 0, /* bitpos */
b18c562e 54 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 55 bfd_elf_generic_reloc, /* special_function */
56 "R_MSP430_32", /* name */
57 FALSE, /* partial_inplace */
58 0xffffffff, /* src_mask */
59 0xffffffff, /* dst_mask */
60 FALSE), /* pcrel_offset */
61
62 /* A 13 bit PC relative relocation. */
63 HOWTO (R_MSP430_10_PCREL, /* type */
64 1, /* rightshift */
65 1, /* size (0 = byte, 1 = short, 2 = long) */
66 10, /* bitsize */
67 TRUE, /* pc_relative */
68 0, /* bitpos */
b18c562e 69 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 70 bfd_elf_generic_reloc, /* special_function */
71 "R_MSP430_13_PCREL", /* name */
72 FALSE, /* partial_inplace */
73 0xfff, /* src_mask */
74 0xfff, /* dst_mask */
75 TRUE), /* pcrel_offset */
76
77 /* A 16 bit absolute relocation. */
78 HOWTO (R_MSP430_16, /* type */
79 0, /* rightshift */
80 1, /* size (0 = byte, 1 = short, 2 = long) */
81 16, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_MSP430_16", /* name */
87 FALSE, /* partial_inplace */
b18c562e 88 0, /* src_mask */
2469cfa2
NC		 89 0xffff, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 /* A 16 bit absolute relocation for command address. */
93 HOWTO (R_MSP430_16_PCREL, /* type */
94 1, /* rightshift */
95 1, /* size (0 = byte, 1 = short, 2 = long) */
96 16, /* bitsize */
97 TRUE, /* pc_relative */
98 0, /* bitpos */
99 complain_overflow_dont,/* complain_on_overflow */
100 bfd_elf_generic_reloc, /* special_function */
101 "R_MSP430_16_PCREL", /* name */
102 FALSE, /* partial_inplace */
b18c562e 103 0, /* src_mask */
2469cfa2
NC		 104 0xffff, /* dst_mask */
105 TRUE), /* pcrel_offset */
106
107 /* A 16 bit absolute relocation, byte operations. */
108 HOWTO (R_MSP430_16_BYTE, /* type */
109 0, /* rightshift */
110 1, /* size (0 = byte, 1 = short, 2 = long) */
111 16, /* bitsize */
112 FALSE, /* pc_relative */
113 0, /* bitpos */
114 complain_overflow_dont,/* complain_on_overflow */
115 bfd_elf_generic_reloc, /* special_function */
116 "R_MSP430_16_BYTE", /* name */
117 FALSE, /* partial_inplace */
118 0xffff, /* src_mask */
119 0xffff, /* dst_mask */
120 FALSE), /* pcrel_offset */
121
122 /* A 16 bit absolute relocation for command address. */
123 HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
124 1, /* rightshift */
125 1, /* size (0 = byte, 1 = short, 2 = long) */
126 16, /* bitsize */
127 TRUE, /* pc_relative */
128 0, /* bitpos */
129 complain_overflow_dont,/* complain_on_overflow */
130 bfd_elf_generic_reloc, /* special_function */
b18c562e 131 "R_MSP430_16_PCREL_BYTE",/* name */
2469cfa2
NC		 132 FALSE, /* partial_inplace */
133 0xffff, /* src_mask */
134 0xffff, /* dst_mask */
b18c562e
NC		 135 TRUE), /* pcrel_offset */
136
137 /* A 13 bit PC relative relocation for complicated polymorphs. */
138 HOWTO (R_MSP430_2X_PCREL, /* type */
139 1, /* rightshift */
140 2, /* size (0 = byte, 1 = short, 2 = long) */
141 10, /* bitsize */
142 TRUE, /* pc_relative */
143 0, /* bitpos */
144 complain_overflow_bitfield,/* complain_on_overflow */
145 bfd_elf_generic_reloc, /* special_function */
146 "R_MSP430_2X_PCREL", /* name */
147 FALSE, /* partial_inplace */
148 0xfff, /* src_mask */
149 0xfff, /* dst_mask */
150 TRUE), /* pcrel_offset */
151
152 /* A 16 bit relaxable relocation for command address. */
153 HOWTO (R_MSP430_RL_PCREL, /* type */
154 1, /* rightshift */
155 1, /* size (0 = byte, 1 = short, 2 = long) */
156 16, /* bitsize */
157 TRUE, /* pc_relative */
158 0, /* bitpos */
159 complain_overflow_dont,/* complain_on_overflow */
160 bfd_elf_generic_reloc, /* special_function */
161 "R_MSP430_RL_PCREL", /* name */
162 FALSE, /* partial_inplace */
163 0, /* src_mask */
164 0xffff, /* dst_mask */
2469cfa2
NC		 165 TRUE) /* pcrel_offset */
166};
167
168/* Map BFD reloc types to MSP430 ELF reloc types. */
169
170struct msp430_reloc_map
171{
172 bfd_reloc_code_real_type bfd_reloc_val;
173 unsigned int elf_reloc_val;
174};
175
176static const struct msp430_reloc_map msp430_reloc_map[] =
177 {
b18c562e
NC		 178 {BFD_RELOC_NONE, R_MSP430_NONE},
179 {BFD_RELOC_32, R_MSP430_32},
180 {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
181 {BFD_RELOC_16, R_MSP430_16_BYTE},
182 {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
183 {BFD_RELOC_MSP430_16, R_MSP430_16},
2469cfa2 184 {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
b18c562e
NC		 185 {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
186 {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
187 {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
2469cfa2
NC		 188 };
189
190static reloc_howto_type *
b18c562e
NC		 191bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
192 bfd_reloc_code_real_type code)
2469cfa2
NC		 193{
194 unsigned int i;
195
196 for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
197 if (msp430_reloc_map[i].bfd_reloc_val == code)
198 return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
199
200 return NULL;
201}
202
203/* Set the howto pointer for an MSP430 ELF reloc. */
204
205static void
b18c562e
NC		 206msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
207 arelent * cache_ptr,
208 Elf_Internal_Rela * dst)
2469cfa2
NC		 209{
210 unsigned int r_type;
211
212 r_type = ELF32_R_TYPE (dst->r_info);
213 BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
214 cache_ptr->howto = &elf_msp430_howto_table[r_type];
215}
216
2469cfa2
NC		 217/* Look through the relocs for a section during the first phase.
218 Since we don't do .gots or .plts, we just need to consider the
219 virtual table relocs for gc. */
220
221static bfd_boolean
b18c562e
NC		 222elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
223 asection * sec, const Elf_Internal_Rela * relocs)
2469cfa2
NC		 224{
225 Elf_Internal_Shdr *symtab_hdr;
226 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
227 const Elf_Internal_Rela *rel;
228 const Elf_Internal_Rela *rel_end;
229
1049f94e 230 if (info->relocatable)
2469cfa2
NC		 231 return TRUE;
232
233 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
234 sym_hashes = elf_sym_hashes (abfd);
235 sym_hashes_end =
236 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
237 if (!elf_bad_symtab (abfd))
238 sym_hashes_end -= symtab_hdr->sh_info;
239
240 rel_end = relocs + sec->reloc_count;
241 for (rel = relocs; rel < rel_end; rel++)
242 {
243 struct elf_link_hash_entry *h;
244 unsigned long r_symndx;
245
246 r_symndx = ELF32_R_SYM (rel->r_info);
247 if (r_symndx < symtab_hdr->sh_info)
248 h = NULL;
249 else
973a3492
L		 250 {
251 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
252 while (h->root.type == bfd_link_hash_indirect
253 || h->root.type == bfd_link_hash_warning)
254 h = (struct elf_link_hash_entry *) h->root.u.i.link;
255 }
2469cfa2
NC		 256 }
257
258 return TRUE;
259}
260
261/* Perform a single relocation. By default we use the standard BFD
262 routines, but a few relocs, we have to do them ourselves. */
263
264static bfd_reloc_status_type
b18c562e
NC		 265msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
266 asection * input_section, bfd_byte * contents,
267 Elf_Internal_Rela * rel, bfd_vma relocation)
2469cfa2
NC		 268{
269 bfd_reloc_status_type r = bfd_reloc_ok;
270 bfd_vma x;
271 bfd_signed_vma srel;
272
273 switch (howto->type)
274 {
275 case R_MSP430_10_PCREL:
276 contents += rel->r_offset;
277 srel = (bfd_signed_vma) relocation;
278 srel += rel->r_addend;
279 srel -= rel->r_offset;
280 srel -= 2; /* Branch instructions add 2 to the PC... */
281 srel -= (input_section->output_section->vma +
282 input_section->output_offset);
283
284 if (srel & 1)
285 return bfd_reloc_outofrange;
286
287 /* MSP430 addresses commands as words. */
288 srel >>= 1;
289
290 /* Check for an overflow. */
291 if (srel < -512 || srel > 511)
292 return bfd_reloc_overflow;
293
294 x = bfd_get_16 (input_bfd, contents);
295 x = (x & 0xfc00) | (srel & 0x3ff);
296 bfd_put_16 (input_bfd, x, contents);
297 break;
298
b18c562e
NC		 299 case R_MSP430_2X_PCREL:
300 contents += rel->r_offset;
301 srel = (bfd_signed_vma) relocation;
302 srel += rel->r_addend;
303 srel -= rel->r_offset;
304 srel -= 2; /* Branch instructions add 2 to the PC... */
305 srel -= (input_section->output_section->vma +
306 input_section->output_offset);
307
308 if (srel & 1)
309 return bfd_reloc_outofrange;
310
311 /* MSP430 addresses commands as words. */
312 srel >>= 1;
313
314 /* Check for an overflow. */
315 if (srel < -512 || srel > 511)
316 return bfd_reloc_overflow;
317
318 x = bfd_get_16 (input_bfd, contents);
319 x = (x & 0xfc00) | (srel & 0x3ff);
320 bfd_put_16 (input_bfd, x, contents);
321 /* Handle second jump instruction. */
322 x = bfd_get_16 (input_bfd, contents - 2);
323 srel += 1;
324 x = (x & 0xfc00) | (srel & 0x3ff);
325 bfd_put_16 (input_bfd, x, contents - 2);
326 break;
327
2469cfa2 328 case R_MSP430_16_PCREL:
b18c562e 329 case R_MSP430_RL_PCREL:
2469cfa2
NC		 330 contents += rel->r_offset;
331 srel = (bfd_signed_vma) relocation;
332 srel += rel->r_addend;
333 srel -= rel->r_offset;
334 /* Only branch instructions add 2 to the PC... */
335 srel -= (input_section->output_section->vma +
336 input_section->output_offset);
337
338 if (srel & 1)
339 return bfd_reloc_outofrange;
340
341 bfd_put_16 (input_bfd, srel & 0xffff, contents);
342 break;
343
344 case R_MSP430_16_PCREL_BYTE:
345 contents += rel->r_offset;
346 srel = (bfd_signed_vma) relocation;
347 srel += rel->r_addend;
348 srel -= rel->r_offset;
349 /* Only branch instructions add 2 to the PC... */
350 srel -= (input_section->output_section->vma +
351 input_section->output_offset);
352
353 bfd_put_16 (input_bfd, srel & 0xffff, contents);
354 break;
355
356 case R_MSP430_16_BYTE:
357 contents += rel->r_offset;
358 srel = (bfd_signed_vma) relocation;
359 srel += rel->r_addend;
360 bfd_put_16 (input_bfd, srel & 0xffff, contents);
361 break;
362
363 case R_MSP430_16:
364 contents += rel->r_offset;
365 srel = (bfd_signed_vma) relocation;
366 srel += rel->r_addend;
367
368 if (srel & 1)
369 return bfd_reloc_notsupported;
370
371 bfd_put_16 (input_bfd, srel & 0xffff, contents);
372 break;
373
374 default:
375 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
376 contents, rel->r_offset,
377 relocation, rel->r_addend);
378 }
379
380 return r;
381}
382
383/* Relocate an MSP430 ELF section. */
384
385static bfd_boolean
b18c562e
NC		 386elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
387 struct bfd_link_info * info,
388 bfd * input_bfd,
389 asection * input_section,
390 bfd_byte * contents,
391 Elf_Internal_Rela * relocs,
392 Elf_Internal_Sym * local_syms,
393 asection ** local_sections)
2469cfa2
NC		 394{
395 Elf_Internal_Shdr *symtab_hdr;
396 struct elf_link_hash_entry **sym_hashes;
397 Elf_Internal_Rela *rel;
398 Elf_Internal_Rela *relend;
399
400 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
401 sym_hashes = elf_sym_hashes (input_bfd);
402 relend = relocs + input_section->reloc_count;
403
404 for (rel = relocs; rel < relend; rel++)
405 {
406 reloc_howto_type *howto;
407 unsigned long r_symndx;
408 Elf_Internal_Sym *sym;
409 asection *sec;
410 struct elf_link_hash_entry *h;
411 bfd_vma relocation;
412 bfd_reloc_status_type r;
413 const char *name = NULL;
414 int r_type;
415
416 /* This is a final link. */
417
418 r_type = ELF32_R_TYPE (rel->r_info);
419 r_symndx = ELF32_R_SYM (rel->r_info);
420 howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
421 h = NULL;
422 sym = NULL;
423 sec = NULL;
424
425 if (r_symndx < symtab_hdr->sh_info)
426 {
427 sym = local_syms + r_symndx;
428 sec = local_sections[r_symndx];
8517fae7 429 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
2469cfa2
NC		 430
431 name = bfd_elf_string_from_elf_section
432 (input_bfd, symtab_hdr->sh_link, sym->st_name);
433 name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
434 }
435 else
436 {
59c2e50f 437 bfd_boolean unresolved_reloc, warned;
2469cfa2 438
b2a8e766
AM		 439 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
440 r_symndx, symtab_hdr, sym_hashes,
441 h, sec, relocation,
442 unresolved_reloc, warned);
2469cfa2
NC		 443 }
444
445 r = msp430_final_link_relocate (howto, input_bfd, input_section,
446 contents, rel, relocation);
447
448 if (r != bfd_reloc_ok)
449 {
450 const char *msg = (const char *) NULL;
451
452 switch (r)
453 {
454 case bfd_reloc_overflow:
455 r = info->callbacks->reloc_overflow
dfeffb9f
L		 456 (info, (h ? &h->root : NULL), name, howto->name,
457 (bfd_vma) 0, input_bfd, input_section,
458 rel->r_offset);
2469cfa2
NC		 459 break;
460
461 case bfd_reloc_undefined:
462 r = info->callbacks->undefined_symbol
463 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
464 break;
465
466 case bfd_reloc_outofrange:
467 msg = _("internal error: out of range error");
468 break;
469
470 case bfd_reloc_notsupported:
471 msg = _("internal error: unsupported relocation error");
472 break;
473
474 case bfd_reloc_dangerous:
475 msg = _("internal error: dangerous relocation");
476 break;
477
478 default:
479 msg = _("internal error: unknown error");
480 break;
481 }
482
483 if (msg)
484 r = info->callbacks->warning
485 (info, msg, name, input_bfd, input_section, rel->r_offset);
486
487 if (!r)
488 return FALSE;
489 }
490
491 }
492
493 return TRUE;
494}
495
496/* The final processing done just before writing out a MSP430 ELF object
497 file. This gets the MSP430 architecture right based on the machine
498 number. */
499
500static void
b18c562e
NC		 501bfd_elf_msp430_final_write_processing (bfd * abfd,
502 bfd_boolean linker ATTRIBUTE_UNUSED)
2469cfa2
NC		 503{
504 unsigned long val;
505
506 switch (bfd_get_mach (abfd))
507 {
508 default:
2469cfa2
NC		 509 case bfd_mach_msp110:
510 val = E_MSP430_MACH_MSP430x11x1;
511 break;
512
513 case bfd_mach_msp11:
514 val = E_MSP430_MACH_MSP430x11;
515 break;
516
3b260895
NC		 517 case bfd_mach_msp12:
518 val = E_MSP430_MACH_MSP430x12;
519 break;
520
2469cfa2
NC		 521 case bfd_mach_msp13:
522 val = E_MSP430_MACH_MSP430x13;
523 break;
524
525 case bfd_mach_msp14:
526 val = E_MSP430_MACH_MSP430x14;
527 break;
528
3b260895
NC		 529 case bfd_mach_msp15:
530 val = E_MSP430_MACH_MSP430x15;
2469cfa2
NC		 531 break;
532
3b260895
NC		 533 case bfd_mach_msp16:
534 val = E_MSP430_MACH_MSP430x16;
2469cfa2
NC		 535 break;
536
537 case bfd_mach_msp31:
538 val = E_MSP430_MACH_MSP430x31;
539 break;
540
541 case bfd_mach_msp32:
542 val = E_MSP430_MACH_MSP430x32;
543 break;
544
545 case bfd_mach_msp33:
546 val = E_MSP430_MACH_MSP430x33;
547 break;
548
3b260895
NC		 549 case bfd_mach_msp41:
550 val = E_MSP430_MACH_MSP430x41;
2469cfa2
NC		 551 break;
552
3b260895
NC		 553 case bfd_mach_msp42:
554 val = E_MSP430_MACH_MSP430x42;
555 break;
556
557 case bfd_mach_msp43:
558 val = E_MSP430_MACH_MSP430x43;
559 break;
560
561 case bfd_mach_msp44:
562 val = E_MSP430_MACH_MSP430x44;
2469cfa2
NC		 563 break;
564 }
565
566 elf_elfheader (abfd)->e_machine = EM_MSP430;
567 elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
568 elf_elfheader (abfd)->e_flags |= val;
569}
570
571/* Set the right machine number. */
572
573static bfd_boolean
b18c562e 574elf32_msp430_object_p (bfd * abfd)
2469cfa2
NC		 575{
576 int e_set = bfd_mach_msp14;
577
578 if (elf_elfheader (abfd)->e_machine == EM_MSP430
579 || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
580 {
581 int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
582
583 switch (e_mach)
584 {
585 default:
2469cfa2
NC		 586 case E_MSP430_MACH_MSP430x11:
587 e_set = bfd_mach_msp11;
588 break;
589
590 case E_MSP430_MACH_MSP430x11x1:
591 e_set = bfd_mach_msp110;
592 break;
593
3b260895
NC		 594 case E_MSP430_MACH_MSP430x12:
595 e_set = bfd_mach_msp12;
596 break;
597
2469cfa2
NC		 598 case E_MSP430_MACH_MSP430x13:
599 e_set = bfd_mach_msp13;
600 break;
601
602 case E_MSP430_MACH_MSP430x14:
603 e_set = bfd_mach_msp14;
604 break;
605
3b260895
NC		 606 case E_MSP430_MACH_MSP430x15:
607 e_set = bfd_mach_msp15;
608 break;
609
610 case E_MSP430_MACH_MSP430x16:
611 e_set = bfd_mach_msp16;
2469cfa2
NC		 612 break;
613
614 case E_MSP430_MACH_MSP430x31:
615 e_set = bfd_mach_msp31;
616 break;
617
618 case E_MSP430_MACH_MSP430x32:
619 e_set = bfd_mach_msp32;
620 break;
621
622 case E_MSP430_MACH_MSP430x33:
623 e_set = bfd_mach_msp33;
624 break;
625
3b260895
NC		 626 case E_MSP430_MACH_MSP430x41:
627 e_set = bfd_mach_msp41;
2469cfa2
NC		 628 break;
629
3b260895
NC		 630 case E_MSP430_MACH_MSP430x42:
631 e_set = bfd_mach_msp42;
2469cfa2
NC		 632 break;
633
3b260895
NC		 634 case E_MSP430_MACH_MSP430x43:
635 e_set = bfd_mach_msp43;
2469cfa2
NC		 636 break;
637
3b260895
NC		 638 case E_MSP430_MACH_MSP430x44:
639 e_set = bfd_mach_msp44;
2469cfa2
NC		 640 break;
641 }
642 }
643
644 return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
645}
646
647static void
b18c562e
NC		 648elf32_msp430_post_process_headers (bfd * abfd,
649 struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
2469cfa2 650{
b18c562e 651 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
2469cfa2
NC		 652
653 i_ehdrp = elf_elfheader (abfd);
654
655#ifndef ELFOSABI_STANDALONE
656#define ELFOSABI_STANDALONE 255
657#endif
658
659 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_STANDALONE;
660}
661
b18c562e
NC		 662/* These functions handle relaxing for the msp430.
663 Relaxation required only in two cases:
664 - Bad hand coding like jumps from one section to another or
665 from file to file.
666 - Sibling calls. This will affect onlu 'jump label' polymorph. Without
667 relaxing this enlarges code by 2 bytes. Sibcalls implemented but
668 do not work in gcc's port by the reason I do not know.
669 Anyway, if a relaxation required, user should pass -relax option to the
670 linker.
671
672 There are quite a few relaxing opportunities available on the msp430:
673
674 ================================================================
675
676 1. 3 words -> 1 word
677
678 eq == jeq label jne +4; br lab
679 ne != jne label jeq +4; br lab
680 lt < jl label jge +4; br lab
681 ltu < jlo label lhs +4; br lab
682 ge >= jge label jl +4; br lab
683 geu >= jhs label jlo +4; br lab
684
685 2. 4 words -> 1 word
686
687 ltn < jn jn +2; jmp +4; br lab
688
689 3. 4 words -> 2 words
690
691 gt > jeq +2; jge label jeq +6; jl +4; br label
692 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
693
694 4. 4 words -> 2 words and 2 labels
695
696 leu <= jeq label; jlo label jeq +2; jhs +4; br label
697 le <= jeq label; jl label jeq +2; jge +4; br label
698 =================================================================
699
700 codemap for first cases is (labels masked ):
701 eq: 0x2002,0x4010,0x0000 -> 0x2400
702 ne: 0x2402,0x4010,0x0000 -> 0x2000
703 lt: 0x3402,0x4010,0x0000 -> 0x3800
704 ltu: 0x2c02,0x4010,0x0000 -> 0x2800
705 ge: 0x3802,0x4010,0x0000 -> 0x3400
706 geu: 0x2802,0x4010,0x0000 -> 0x2c00
707
708 second case:
709 ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000
710
711 third case:
712 gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
713 gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
714
715 fourth case:
716 leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
717 le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
718
719 Unspecified case :)
720 jump: 0x4010,0x0000 -> 0x3c00. */
721
722#define NUMB_RELAX_CODES 12
723static struct rcodes_s
724{
725 int f0, f1; /* From code. */
726 int t0, t1; /* To code. */
727 int labels; /* Position of labels: 1 - one label at first
728 word, 2 - one at second word, 3 - two
729 labels at both. */
730 int cdx; /* Words to match. */
731 int bs; /* Shrink bytes. */
732 int off; /* Offset from old label for new code. */
733 int ncl; /* New code length. */
734} rcode[] =
735{/* lab,cdx,bs,off,ncl */
736 { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */
737 { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */
738 { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */
739 { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */
740 { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */
741 { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */
742 { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */
743 { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */
744 { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */
745 { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */
746 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */
747 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */
748 { 0, 0, 0, 0, 0, 0, 0, 0, 0}
749};
750
751/* Return TRUE if a symbol exists at the given address. */
752
753static bfd_boolean
754msp430_elf_symbol_address_p (bfd * abfd,
755 asection * sec,
756 Elf_Internal_Sym * isym,
757 bfd_vma addr)
758{
759 Elf_Internal_Shdr *symtab_hdr;
760 unsigned int sec_shndx;
761 Elf_Internal_Sym *isymend;
762 struct elf_link_hash_entry **sym_hashes;
763 struct elf_link_hash_entry **end_hashes;
764 unsigned int symcount;
765
766 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
767
768 /* Examine all the local symbols. */
769 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
770 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
771 if (isym->st_shndx == sec_shndx && isym->st_value == addr)
772 return TRUE;
773
774 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
775 - symtab_hdr->sh_info);
776 sym_hashes = elf_sym_hashes (abfd);
777 end_hashes = sym_hashes + symcount;
778 for (; sym_hashes < end_hashes; sym_hashes++)
779 {
780 struct elf_link_hash_entry *sym_hash = *sym_hashes;
781
782 if ((sym_hash->root.type == bfd_link_hash_defined
783 || sym_hash->root.type == bfd_link_hash_defweak)
784 && sym_hash->root.u.def.section == sec
785 && sym_hash->root.u.def.value == addr)
786 return TRUE;
787 }
788
789 return FALSE;
790}
791
046aeb74
DD		 792/* Adjust all local symbols defined as '.section + 0xXXXX' (.section has sec_shndx)
793 referenced from current and other sections */
794static bfd_boolean
795msp430_elf_relax_adjust_locals(bfd * abfd, asection * sec, bfd_vma addr,
796 int count, unsigned int sec_shndx, bfd_vma toaddr)
797{
798 Elf_Internal_Shdr *symtab_hdr;
799 Elf_Internal_Rela *irel;
800 Elf_Internal_Rela *irelend;
801 Elf_Internal_Sym *isym;
802
803 irel = elf_section_data (sec)->relocs;
804 irelend = irel + sec->reloc_count;
805 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
806 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
807
808 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
809 {
810 int sidx = ELF32_R_SYM(irel->r_info);
811 Elf_Internal_Sym *lsym = isym + sidx;
812
813 /* Adjust symbols referenced by .sec+0xXX */
814 if (irel->r_addend > addr && irel->r_addend < toaddr
815 && lsym->st_shndx == sec_shndx)
816 irel->r_addend -= count;
817 }
818
819 return TRUE;
820}
821
b18c562e
NC		 822/* Delete some bytes from a section while relaxing. */
823
824static bfd_boolean
825msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
826 int count)
827{
828 Elf_Internal_Shdr *symtab_hdr;
829 unsigned int sec_shndx;
830 bfd_byte *contents;
831 Elf_Internal_Rela *irel;
832 Elf_Internal_Rela *irelend;
833 Elf_Internal_Rela *irelalign;
834 bfd_vma toaddr;
835 Elf_Internal_Sym *isym;
836 Elf_Internal_Sym *isymend;
837 struct elf_link_hash_entry **sym_hashes;
838 struct elf_link_hash_entry **end_hashes;
839 unsigned int symcount;
046aeb74 840 asection *p;
b18c562e
NC		 841
842 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
843
844 contents = elf_section_data (sec)->this_hdr.contents;
845
846 /* The deletion must stop at the next ALIGN reloc for an aligment
847 power larger than the number of bytes we are deleting. */
848
849 irelalign = NULL;
850 toaddr = sec->size;
851
852 irel = elf_section_data (sec)->relocs;
853 irelend = irel + sec->reloc_count;
854
855 /* Actually delete the bytes. */
856 memmove (contents + addr, contents + addr + count,
857 (size_t) (toaddr - addr - count));
858 sec->size -= count;
859
860 /* Adjust all the relocs. */
fa9ee72b
DD		 861 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
862 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
b18c562e 863 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
fa9ee72b 864 {
fa9ee72b
DD		 865 /* Get the new reloc address. */
866 if ((irel->r_offset > addr && irel->r_offset < toaddr))
867 irel->r_offset -= count;
fa9ee72b 868 }
b18c562e 869
046aeb74
DD		 870 for (p = abfd->sections; p != NULL; p = p->next)
871 msp430_elf_relax_adjust_locals(abfd,p,addr,count,sec_shndx,toaddr);
872
b18c562e
NC		 873 /* Adjust the local symbols defined in this section. */
874 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
875 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
876 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
877 if (isym->st_shndx == sec_shndx
878 && isym->st_value > addr && isym->st_value < toaddr)
879 isym->st_value -= count;
880
881 /* Now adjust the global symbols defined in this section. */
882 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
883 - symtab_hdr->sh_info);
884 sym_hashes = elf_sym_hashes (abfd);
885 end_hashes = sym_hashes + symcount;
886 for (; sym_hashes < end_hashes; sym_hashes++)
887 {
888 struct elf_link_hash_entry *sym_hash = *sym_hashes;
889
890 if ((sym_hash->root.type == bfd_link_hash_defined
891 || sym_hash->root.type == bfd_link_hash_defweak)
892 && sym_hash->root.u.def.section == sec
893 && sym_hash->root.u.def.value > addr
894 && sym_hash->root.u.def.value < toaddr)
895 sym_hash->root.u.def.value -= count;
896 }
897
898 return TRUE;
899}
900
901
902static bfd_boolean
903msp430_elf_relax_section (bfd * abfd, asection * sec,
904 struct bfd_link_info * link_info,
905 bfd_boolean * again)
906{
907 Elf_Internal_Shdr * symtab_hdr;
908 Elf_Internal_Rela * internal_relocs;
909 Elf_Internal_Rela * irel;
910 Elf_Internal_Rela * irelend;
911 bfd_byte * contents = NULL;
912 Elf_Internal_Sym * isymbuf = NULL;
913
914 /* Assume nothing changes. */
915 *again = FALSE;
916
917 /* We don't have to do anything for a relocatable link, if
918 this section does not have relocs, or if this is not a
919 code section. */
920 if (link_info->relocatable
921 || (sec->flags & SEC_RELOC) == 0
922 || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
923 return TRUE;
924
925 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
926
927 /* Get a copy of the native relocations. */
928 internal_relocs =
929 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
930 if (internal_relocs == NULL)
931 goto error_return;
932
933 /* Walk through them looking for relaxing opportunities. */
934 irelend = internal_relocs + sec->reloc_count;
935 for (irel = internal_relocs; irel < irelend; irel++)
936 {
937 bfd_vma symval;
938
939 /* If this isn't something that can be relaxed, then ignore
940 this reloc. */
941 if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
942 continue;
943
944 /* Get the section contents if we haven't done so already. */
945 if (contents == NULL)
946 {
947 /* Get cached copy if it exists. */
948 if (elf_section_data (sec)->this_hdr.contents != NULL)
949 contents = elf_section_data (sec)->this_hdr.contents;
950 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
951 goto error_return;
952 }
953
954 /* Read this BFD's local symbols if we haven't done so already. */
955 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
956 {
957 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
958 if (isymbuf == NULL)
959 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
960 symtab_hdr->sh_info, 0,
961 NULL, NULL, NULL);
962 if (isymbuf == NULL)
963 goto error_return;
964 }
965
966 /* Get the value of the symbol referred to by the reloc. */
967 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
968 {
969 /* A local symbol. */
970 Elf_Internal_Sym *isym;
971 asection *sym_sec;
972
973 isym = isymbuf + ELF32_R_SYM (irel->r_info);
974 if (isym->st_shndx == SHN_UNDEF)
975 sym_sec = bfd_und_section_ptr;
976 else if (isym->st_shndx == SHN_ABS)
977 sym_sec = bfd_abs_section_ptr;
978 else if (isym->st_shndx == SHN_COMMON)
979 sym_sec = bfd_com_section_ptr;
980 else
981 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
982 symval = (isym->st_value
983 + sym_sec->output_section->vma + sym_sec->output_offset);
984 }
985 else
986 {
987 unsigned long indx;
988 struct elf_link_hash_entry *h;
989
990 /* An external symbol. */
991 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
992 h = elf_sym_hashes (abfd)[indx];
993 BFD_ASSERT (h != NULL);
994
995 if (h->root.type != bfd_link_hash_defined
996 && h->root.type != bfd_link_hash_defweak)
997 /* This appears to be a reference to an undefined
998 symbol. Just ignore it--it will be caught by the
999 regular reloc processing. */
1000 continue;
1001
1002 symval = (h->root.u.def.value
1003 + h->root.u.def.section->output_section->vma
1004 + h->root.u.def.section->output_offset);
1005 }
1006
1007 /* For simplicity of coding, we are going to modify the section
1008 contents, the section relocs, and the BFD symbol table. We
1009 must tell the rest of the code not to free up this
1010 information. It would be possible to instead create a table
1011 of changes which have to be made, as is done in coff-mips.c;
1012 that would be more work, but would require less memory when
1013 the linker is run. */
1014
1015 /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
1016 branch. */
1017 /* Paranoia? paranoia... */
1018 if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
1019 {
1020 bfd_vma value = symval;
1021
1022 /* Deal with pc-relative gunk. */
1023 value -= (sec->output_section->vma + sec->output_offset);
1024 value -= irel->r_offset;
1025 value += irel->r_addend;
1026
1027 /* See if the value will fit in 10 bits, note the high value is
1028 1016 as the target will be two bytes closer if we are
1029 able to relax. */
1030 if ((long) value < 1016 && (long) value > -1016)
1031 {
1032 int code0 = 0, code1 = 0, code2 = 0;
1033 int i;
1034 struct rcodes_s *rx;
1035
1036 /* Get the opcode. */
1037 if (irel->r_offset >= 6)
1038 code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
1039
1040 if (irel->r_offset >= 4)
1041 code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
1042
1043 code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
1044
1045 if (code2 != 0x4010)
1046 continue;
1047
1048 /* Check r4 and r3. */
1049 for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
1050 {
1051 rx = &rcode[i];
1052 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
1053 break;
1054 else if (rx->cdx == 1 && rx->f1 == code1)
1055 break;
1056 else if (rx->cdx == 0) /* This is an unconditional jump. */
1057 break;
1058 }
1059
1060 /* Check labels:
1061 .Label0: ; we do not care about this label
1062 jeq +6
1063 .Label1: ; make sure there is no label here
1064 jl +4
1065 .Label2: ; make sure there is no label here
1066 br .Label_dst
1067
1068 So, if there is .Label1 or .Label2 we cannot relax this code.
1069 This actually should not happen, cause for relaxable
1070 instructions we use RL_PCREL reloc instead of 16_PCREL.
1071 Will change this in the future. */
1072
1073 if (rx->cdx > 0
1074 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1075 irel->r_offset - 2))
1076 continue;
1077 if (rx->cdx > 1
1078 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1079 irel->r_offset - 4))
1080 continue;
1081
1082 /* Note that we've changed the relocs, section contents, etc. */
1083 elf_section_data (sec)->relocs = internal_relocs;
1084 elf_section_data (sec)->this_hdr.contents = contents;
1085 symtab_hdr->contents = (unsigned char *) isymbuf;
1086
1087 /* Fix the relocation's type. */
1088 if (rx->labels == 3) /* Handle special cases. */
1089 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1090 R_MSP430_2X_PCREL);
1091 else
1092 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1093 R_MSP430_10_PCREL);
1094
1095 /* Fix the opcode right way. */
1096 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
1097 if (rx->t1)
1098 bfd_put_16 (abfd, rx->t1,
1099 contents + irel->r_offset - rx->off + 2);
1100
1101 /* Delete bytes. */
1102 if (!msp430_elf_relax_delete_bytes (abfd, sec,
1103 irel->r_offset - rx->off +
1104 rx->ncl, rx->bs))
1105 goto error_return;
1106
1107 /* Handle unconditional jumps. */
1108 if (rx->cdx == 0)
1109 irel->r_offset -= 2;
1110
1111 /* That will change things, so, we should relax again.
1112 Note that this is not required, and it may be slow. */
1113 *again = TRUE;
1114 }
1115 }
1116 }
1117
1118 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1119 {
1120 if (!link_info->keep_memory)
1121 free (isymbuf);
1122 else
1123 {
1124 /* Cache the symbols for elf_link_input_bfd. */
1125 symtab_hdr->contents = (unsigned char *) isymbuf;
1126 }
1127 }
1128
1129 if (contents != NULL
1130 && elf_section_data (sec)->this_hdr.contents != contents)
1131 {
1132 if (!link_info->keep_memory)
1133 free (contents);
1134 else
1135 {
1136 /* Cache the section contents for elf_link_input_bfd. */
1137 elf_section_data (sec)->this_hdr.contents = contents;
1138 }
1139 }
1140
1141 if (internal_relocs != NULL
1142 && elf_section_data (sec)->relocs != internal_relocs)
1143 free (internal_relocs);
1144
1145 return TRUE;
1146
1147error_return:
1148 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1149 free (isymbuf);
1150 if (contents != NULL
1151 && elf_section_data (sec)->this_hdr.contents != contents)
1152 free (contents);
1153 if (internal_relocs != NULL
1154 && elf_section_data (sec)->relocs != internal_relocs)
1155 free (internal_relocs);
1156
1157 return FALSE;
1158}
1159
2469cfa2
NC		 1160
1161#define ELF_ARCH bfd_arch_msp430
1162#define ELF_MACHINE_CODE EM_MSP430
1163#define ELF_MACHINE_ALT1 EM_MSP430_OLD
1164#define ELF_MAXPAGESIZE 1
1165
1166#define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
1167#define TARGET_LITTLE_NAME "elf32-msp430"
1168
1169#define elf_info_to_howto msp430_info_to_howto_rela
1170#define elf_info_to_howto_rel NULL
1171#define elf_backend_relocate_section elf32_msp430_relocate_section
2469cfa2
NC		 1172#define elf_backend_check_relocs elf32_msp430_check_relocs
1173#define elf_backend_can_gc_sections 1
1174#define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
1175#define elf_backend_object_p elf32_msp430_object_p
1176#define elf_backend_post_process_headers elf32_msp430_post_process_headers
b18c562e 1177#define bfd_elf32_bfd_relax_section msp430_elf_relax_section
2469cfa2
NC		 1178
1179#include "elf32-target.h"
GDB Binutils - Deliverables
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