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35c08157 1/* NDS32-specific support for 32-bit ELF.
4b95cf5c 2 Copyright (C) 2012-2014 Free Software Foundation, Inc.
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3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
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21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
1c8f6a4d 100static bfd_boolean nds32_elf_mkobject (bfd *);
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101
102/* Nds32 helper functions. */
103static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110static bfd_vma calculate_memory_address
111 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112static int nds32_get_section_contents (bfd *, asection *, bfd_byte **);
113static bfd_boolean nds32_elf_ex9_build_hash_table
114 (bfd *, asection *, struct bfd_link_info *);
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115static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
116static void nds32_elf_ex9_import_table (struct bfd_link_info *);
117static void nds32_elf_ex9_finish (struct bfd_link_info *);
118static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 119static void nds32_elf_get_insn_with_reg
1c8f6a4d 120 (Elf_Internal_Rela *, uint32_t, uint32_t *);
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121static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
122 Elf_Internal_Sym **);
123static bfd_boolean nds32_elf_ex9_replace_instruction
124 (struct bfd_link_info *, bfd *, asection *);
125static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
126 asection *);
1c8f6a4d 127static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 128static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 129static bfd_boolean nds32_elf_ifc_reloc (void);
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130static bfd_boolean nds32_relax_fp_as_gp
131 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
132 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
133 Elf_Internal_Sym *isymbuf);
134static bfd_boolean nds32_fag_remove_unused_fpbase
135 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
136 Elf_Internal_Rela *irelend);
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137static bfd_byte *
138nds32_elf_get_relocated_section_contents (bfd *abfd,
139 struct bfd_link_info *link_info,
140 struct bfd_link_order *link_order,
141 bfd_byte *data,
142 bfd_boolean relocatable,
143 asymbol **symbols);
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144
145enum
146{
147 MACH_V1 = bfd_mach_n1h,
148 MACH_V2 = bfd_mach_n1h_v2,
149 MACH_V3 = bfd_mach_n1h_v3,
150 MACH_V3M = bfd_mach_n1h_v3m
151};
152
153#define MIN(a, b) ((a) > (b) ? (b) : (a))
154#define MAX(a, b) ((a) > (b) ? (a) : (b))
155
156/* The name of the dynamic interpreter. This is put in the .interp
157 section. */
158#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
159
160/* The nop opcode we use. */
161#define NDS32_NOP32 0x40000009
162#define NDS32_NOP16 0x9200
163
164/* The size in bytes of an entry in the procedure linkage table. */
165#define PLT_ENTRY_SIZE 24
166#define PLT_HEADER_SIZE 24
167
168/* The first entry in a procedure linkage table are reserved,
169 and the initial contents are unimportant (we zero them out).
170 Subsequent entries look like this. */
171#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
172#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
173#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
174#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
175#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
176
177/* $ta is change to $r15 (from $r25). */
178#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
179#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
181#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
182#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
183#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
184
185#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
186#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
187#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
188#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
189#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
190
191#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
192#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
194#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
195#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
196#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
197
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198/* These are macros used to get the relocation accurate value. */
199#define ACCURATE_8BIT_S1 (0x100)
200#define ACCURATE_U9BIT_S1 (0x400)
201#define ACCURATE_12BIT_S1 (0x2000)
202#define ACCURATE_14BIT_S1 (0x4000)
203#define ACCURATE_19BIT (0x40000)
204
205/* These are macros used to get the relocation conservative value. */
206#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
207#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
208#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
209#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
210/* These must be more conservative because the address may be in
211 different segment. */
212#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
213#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
214#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
215#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
216#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
217
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218/* Size of small data/bss sections, used to calculate SDA_BASE. */
219static long got_size = 0;
220static int is_SDA_BASE_set = 0;
221static int is_ITB_BASE_set = 0;
222
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223/* Convert ELF-VER in eflags to string for debugging purpose. */
224static const char *const nds32_elfver_strtab[] =
225{
226 "ELF-1.2",
227 "ELF-1.3",
228 "ELF-1.4",
229};
230
231/* The nds32 linker needs to keep track of the number of relocs that it
232 decides to copy in check_relocs for each symbol. This is so that
233 it can discard PC relative relocs if it doesn't need them when
234 linking with -Bsymbolic. We store the information in a field
235 extending the regular ELF linker hash table. */
236
237/* This structure keeps track of the number of PC relative relocs we
238 have copied for a given symbol. */
239
240struct elf_nds32_pcrel_relocs_copied
241{
242 /* Next section. */
243 struct elf_nds32_pcrel_relocs_copied *next;
244 /* A section in dynobj. */
245 asection *section;
246 /* Number of relocs copied in this section. */
247 bfd_size_type count;
248};
249
250/* The sh linker needs to keep track of the number of relocs that it
251 decides to copy as dynamic relocs in check_relocs for each symbol.
252 This is so that it can later discard them if they are found to be
253 unnecessary. We store the information in a field extending the
254 regular ELF linker hash table. */
255
256struct elf_nds32_dyn_relocs
257{
258 struct elf_nds32_dyn_relocs *next;
259
260 /* The input section of the reloc. */
261 asection *sec;
262
263 /* Total number of relocs copied for the input section. */
264 bfd_size_type count;
265
266 /* Number of pc-relative relocs copied for the input section. */
267 bfd_size_type pc_count;
268};
269
270/* Nds32 ELF linker hash entry. */
271
272struct elf_nds32_link_hash_entry
273{
274 struct elf_link_hash_entry root;
275
276 /* Track dynamic relocs copied for this symbol. */
277 struct elf_nds32_dyn_relocs *dyn_relocs;
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278
279 /* For checking relocation type. */
280#define GOT_UNKNOWN 0
281#define GOT_NORMAL 1
282#define GOT_TLS_IE 2
283 unsigned int tls_type;
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284};
285
286/* Get the nds32 ELF linker hash table from a link_info structure. */
287
288#define FP_BASE_NAME "_FP_BASE_"
289static int check_start_export_sym = 0;
290static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
291
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292/* The offset for executable tls relaxation. */
293#define TP_OFFSET 0x0
294
295struct elf_nds32_obj_tdata
296{
297 struct elf_obj_tdata root;
298
299 /* tls_type for each local got entry. */
300 char *local_got_tls_type;
301};
302
303#define elf_nds32_tdata(bfd) \
304 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
305
306#define elf32_nds32_local_got_tls_type(bfd) \
307 (elf_nds32_tdata (bfd)->local_got_tls_type)
308
309#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
310
311static bfd_boolean
312nds32_elf_mkobject (bfd *abfd)
313{
314 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
315 NDS32_ELF_DATA);
316}
317
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318/* Relocations used for relocation. */
319static reloc_howto_type nds32_elf_howto_table[] =
320{
321 /* This reloc does nothing. */
322 HOWTO (R_NDS32_NONE, /* type */
323 0, /* rightshift */
324 2, /* size (0 = byte, 1 = short, 2 = long) */
325 32, /* bitsize */
326 FALSE, /* pc_relative */
327 0, /* bitpos */
328 complain_overflow_bitfield, /* complain_on_overflow */
329 bfd_elf_generic_reloc, /* special_function */
330 "R_NDS32_NONE", /* name */
331 FALSE, /* partial_inplace */
332 0, /* src_mask */
333 0, /* dst_mask */
334 FALSE), /* pcrel_offset */
335
336 /* A 16 bit absolute relocation. */
337 HOWTO (R_NDS32_16, /* type */
338 0, /* rightshift */
339 1, /* size (0 = byte, 1 = short, 2 = long) */
340 16, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield, /* complain_on_overflow */
344 nds32_elf_generic_reloc, /* special_function */
345 "R_NDS32_16", /* name */
346 FALSE, /* partial_inplace */
347 0xffff, /* src_mask */
348 0xffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
350
351 /* A 32 bit absolute relocation. */
352 HOWTO (R_NDS32_32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield, /* complain_on_overflow */
359 nds32_elf_generic_reloc, /* special_function */
360 "R_NDS32_32", /* name */
361 FALSE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
365
366 /* A 20 bit address. */
367 HOWTO (R_NDS32_20, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 20, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_unsigned, /* complain_on_overflow */
374 nds32_elf_generic_reloc, /* special_function */
375 "R_NDS32_20", /* name */
376 FALSE, /* partial_inplace */
377 0xfffff, /* src_mask */
378 0xfffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 /* An PC Relative 9-bit relocation, shifted by 2.
382 This reloc is complicated because relocations are relative to pc & -4.
383 i.e. branches in the right insn slot use the address of the left insn
384 slot for pc. */
385 /* ??? It's not clear whether this should have partial_inplace set or not.
386 Branch relaxing in the assembler can store the addend in the insn,
387 and if bfd_install_relocation gets called the addend may get added
388 again. */
389 HOWTO (R_NDS32_9_PCREL, /* type */
390 1, /* rightshift */
391 1, /* size (0 = byte, 1 = short, 2 = long) */
392 8, /* bitsize */
393 TRUE, /* pc_relative */
394 0, /* bitpos */
395 complain_overflow_signed, /* complain_on_overflow */
396 nds32_elf_9_pcrel_reloc, /* special_function */
397 "R_NDS32_9_PCREL", /* name */
398 FALSE, /* partial_inplace */
399 0xff, /* src_mask */
400 0xff, /* dst_mask */
401 TRUE), /* pcrel_offset */
402
403 /* A relative 15 bit relocation, right shifted by 1. */
404 HOWTO (R_NDS32_15_PCREL, /* type */
405 1, /* rightshift */
406 2, /* size (0 = byte, 1 = short, 2 = long) */
407 14, /* bitsize */
408 TRUE, /* pc_relative */
409 0, /* bitpos */
410 complain_overflow_signed, /* complain_on_overflow */
411 bfd_elf_generic_reloc, /* special_function */
412 "R_NDS32_15_PCREL", /* name */
413 FALSE, /* partial_inplace */
414 0x3fff, /* src_mask */
415 0x3fff, /* dst_mask */
416 TRUE), /* pcrel_offset */
417
418 /* A relative 17 bit relocation, right shifted by 1. */
419 HOWTO (R_NDS32_17_PCREL, /* type */
420 1, /* rightshift */
421 2, /* size (0 = byte, 1 = short, 2 = long) */
422 16, /* bitsize */
423 TRUE, /* pc_relative */
424 0, /* bitpos */
425 complain_overflow_signed, /* complain_on_overflow */
426 bfd_elf_generic_reloc, /* special_function */
427 "R_NDS32_17_PCREL", /* name */
428 FALSE, /* partial_inplace */
429 0xffff, /* src_mask */
430 0xffff, /* dst_mask */
431 TRUE), /* pcrel_offset */
432
433 /* A relative 25 bit relocation, right shifted by 1. */
434 /* ??? It's not clear whether this should have partial_inplace set or not.
435 Branch relaxing in the assembler can store the addend in the insn,
436 and if bfd_install_relocation gets called the addend may get added
437 again. */
438 HOWTO (R_NDS32_25_PCREL, /* type */
439 1, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 24, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_signed, /* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_NDS32_25_PCREL", /* name */
447 FALSE, /* partial_inplace */
448 0xffffff, /* src_mask */
449 0xffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 /* High 20 bits of address when lower 12 is or'd in. */
453 HOWTO (R_NDS32_HI20, /* type */
454 12, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 20, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_dont,/* complain_on_overflow */
460 nds32_elf_hi20_reloc, /* special_function */
461 "R_NDS32_HI20", /* name */
462 FALSE, /* partial_inplace */
463 0x000fffff, /* src_mask */
464 0x000fffff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Lower 12 bits of address. */
468 HOWTO (R_NDS32_LO12S3, /* type */
469 3, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 9, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_dont,/* complain_on_overflow */
475 nds32_elf_lo12_reloc, /* special_function */
476 "R_NDS32_LO12S3", /* name */
477 FALSE, /* partial_inplace */
478 0x000001ff, /* src_mask */
479 0x000001ff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Lower 12 bits of address. */
483 HOWTO (R_NDS32_LO12S2, /* type */
484 2, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 10, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_dont,/* complain_on_overflow */
490 nds32_elf_lo12_reloc, /* special_function */
491 "R_NDS32_LO12S2", /* name */
492 FALSE, /* partial_inplace */
493 0x000003ff, /* src_mask */
494 0x000003ff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Lower 12 bits of address. */
498 HOWTO (R_NDS32_LO12S1, /* type */
499 1, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 11, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_dont,/* complain_on_overflow */
505 nds32_elf_lo12_reloc, /* special_function */
506 "R_NDS32_LO12S1", /* name */
507 FALSE, /* partial_inplace */
508 0x000007ff, /* src_mask */
509 0x000007ff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* Lower 12 bits of address. */
513 HOWTO (R_NDS32_LO12S0, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 12, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 nds32_elf_lo12_reloc, /* special_function */
521 "R_NDS32_LO12S0", /* name */
522 FALSE, /* partial_inplace */
523 0x00000fff, /* src_mask */
524 0x00000fff, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* Small data area 15 bits offset. */
528 HOWTO (R_NDS32_SDA15S3, /* type */
529 3, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 15, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_signed, /* complain_on_overflow */
535 nds32_elf_sda15_reloc, /* special_function */
536 "R_NDS32_SDA15S3", /* name */
537 FALSE, /* partial_inplace */
538 0x00007fff, /* src_mask */
539 0x00007fff, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* Small data area 15 bits offset. */
543 HOWTO (R_NDS32_SDA15S2, /* type */
544 2, /* rightshift */
545 2, /* size (0 = byte, 1 = short, 2 = long) */
546 15, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_signed, /* complain_on_overflow */
550 nds32_elf_sda15_reloc, /* special_function */
551 "R_NDS32_SDA15S2", /* name */
552 FALSE, /* partial_inplace */
553 0x00007fff, /* src_mask */
554 0x00007fff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* Small data area 15 bits offset. */
558 HOWTO (R_NDS32_SDA15S1, /* type */
559 1, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 15, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_signed, /* complain_on_overflow */
565 nds32_elf_sda15_reloc, /* special_function */
566 "R_NDS32_SDA15S1", /* name */
567 FALSE, /* partial_inplace */
568 0x00007fff, /* src_mask */
569 0x00007fff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* Small data area 15 bits offset. */
573 HOWTO (R_NDS32_SDA15S0, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 15, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 nds32_elf_sda15_reloc, /* special_function */
581 "R_NDS32_SDA15S0", /* name */
582 FALSE, /* partial_inplace */
583 0x00007fff, /* src_mask */
584 0x00007fff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 /* GNU extension to record C++ vtable hierarchy */
588 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
589 0, /* rightshift */
590 2, /* size (0 = byte, 1 = short, 2 = long) */
591 0, /* bitsize */
592 FALSE, /* pc_relative */
593 0, /* bitpos */
594 complain_overflow_dont,/* complain_on_overflow */
595 NULL, /* special_function */
596 "R_NDS32_GNU_VTINHERIT", /* name */
597 FALSE, /* partial_inplace */
598 0, /* src_mask */
599 0, /* dst_mask */
600 FALSE), /* pcrel_offset */
601
602 /* GNU extension to record C++ vtable member usage */
603 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
604 0, /* rightshift */
605 2, /* size (0 = byte, 1 = short, 2 = long) */
606 0, /* bitsize */
607 FALSE, /* pc_relative */
608 0, /* bitpos */
609 complain_overflow_dont,/* complain_on_overflow */
610 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
611 "R_NDS32_GNU_VTENTRY", /* name */
612 FALSE, /* partial_inplace */
613 0, /* src_mask */
614 0, /* dst_mask */
615 FALSE), /* pcrel_offset */
616
617 /* A 16 bit absolute relocation. */
618 HOWTO (R_NDS32_16_RELA, /* type */
619 0, /* rightshift */
620 1, /* size (0 = byte, 1 = short, 2 = long) */
621 16, /* bitsize */
622 FALSE, /* pc_relative */
623 0, /* bitpos */
624 complain_overflow_bitfield, /* complain_on_overflow */
625 bfd_elf_generic_reloc, /* special_function */
626 "R_NDS32_16_RELA", /* name */
627 FALSE, /* partial_inplace */
628 0xffff, /* src_mask */
629 0xffff, /* dst_mask */
630 FALSE), /* pcrel_offset */
631
632 /* A 32 bit absolute relocation. */
633 HOWTO (R_NDS32_32_RELA, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_bitfield, /* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_NDS32_32_RELA", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 /* A 20 bit address. */
648 HOWTO (R_NDS32_20_RELA, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 20, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_signed, /* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_NDS32_20_RELA", /* name */
657 FALSE, /* partial_inplace */
658 0xfffff, /* src_mask */
659 0xfffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
663 1, /* rightshift */
664 1, /* size (0 = byte, 1 = short, 2 = long) */
665 8, /* bitsize */
666 TRUE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed, /* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_9_PCREL_RELA",/* name */
671 FALSE, /* partial_inplace */
672 0xff, /* src_mask */
673 0xff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 /* A relative 15 bit relocation, right shifted by 1. */
677 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
678 1, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 14, /* bitsize */
681 TRUE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_signed, /* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_15_PCREL_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x3fff, /* src_mask */
688 0x3fff, /* dst_mask */
689 TRUE), /* pcrel_offset */
690
691 /* A relative 17 bit relocation, right shifted by 1. */
692 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 TRUE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_signed, /* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_17_PCREL_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0xffff, /* src_mask */
703 0xffff, /* dst_mask */
704 TRUE), /* pcrel_offset */
705
706 /* A relative 25 bit relocation, right shifted by 2. */
707 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
708 1, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 24, /* bitsize */
711 TRUE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_signed, /* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_25_PCREL_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0xffffff, /* src_mask */
718 0xffffff, /* dst_mask */
719 TRUE), /* pcrel_offset */
720
721 /* High 20 bits of address when lower 16 is or'd in. */
722 HOWTO (R_NDS32_HI20_RELA, /* type */
723 12, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 20, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_HI20_RELA", /* name */
731 FALSE, /* partial_inplace */
732 0x000fffff, /* src_mask */
733 0x000fffff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Lower 12 bits of address. */
737 HOWTO (R_NDS32_LO12S3_RELA, /* type */
738 3, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 9, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_dont,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_LO12S3_RELA", /* name */
746 FALSE, /* partial_inplace */
747 0x000001ff, /* src_mask */
748 0x000001ff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 /* Lower 12 bits of address. */
752 HOWTO (R_NDS32_LO12S2_RELA, /* type */
753 2, /* rightshift */
754 2, /* size (0 = byte, 1 = short, 2 = long) */
755 10, /* bitsize */
756 FALSE, /* pc_relative */
757 0, /* bitpos */
758 complain_overflow_dont,/* complain_on_overflow */
759 bfd_elf_generic_reloc, /* special_function */
760 "R_NDS32_LO12S2_RELA", /* name */
761 FALSE, /* partial_inplace */
762 0x000003ff, /* src_mask */
763 0x000003ff, /* dst_mask */
764 FALSE), /* pcrel_offset */
765
766 /* Lower 12 bits of address. */
767 HOWTO (R_NDS32_LO12S1_RELA, /* type */
768 1, /* rightshift */
769 2, /* size (0 = byte, 1 = short, 2 = long) */
770 11, /* bitsize */
771 FALSE, /* pc_relative */
772 0, /* bitpos */
773 complain_overflow_dont,/* complain_on_overflow */
774 bfd_elf_generic_reloc, /* special_function */
775 "R_NDS32_LO12S1_RELA", /* name */
776 FALSE, /* partial_inplace */
777 0x000007ff, /* src_mask */
778 0x000007ff, /* dst_mask */
779 FALSE), /* pcrel_offset */
780
781 /* Lower 12 bits of address. */
782 HOWTO (R_NDS32_LO12S0_RELA, /* type */
783 0, /* rightshift */
784 2, /* size (0 = byte, 1 = short, 2 = long) */
785 12, /* bitsize */
786 FALSE, /* pc_relative */
787 0, /* bitpos */
788 complain_overflow_dont,/* complain_on_overflow */
789 bfd_elf_generic_reloc, /* special_function */
790 "R_NDS32_LO12S0_RELA", /* name */
791 FALSE, /* partial_inplace */
792 0x00000fff, /* src_mask */
793 0x00000fff, /* dst_mask */
794 FALSE), /* pcrel_offset */
795
796 /* Small data area 15 bits offset. */
797 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
798 3, /* rightshift */
799 2, /* size (0 = byte, 1 = short, 2 = long) */
800 15, /* bitsize */
801 FALSE, /* pc_relative */
802 0, /* bitpos */
803 complain_overflow_signed, /* complain_on_overflow */
804 bfd_elf_generic_reloc, /* special_function */
805 "R_NDS32_SDA15S3_RELA",/* name */
806 FALSE, /* partial_inplace */
807 0x00007fff, /* src_mask */
808 0x00007fff, /* dst_mask */
809 FALSE), /* pcrel_offset */
810
811 /* Small data area 15 bits offset. */
812 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
813 2, /* rightshift */
814 2, /* size (0 = byte, 1 = short, 2 = long) */
815 15, /* bitsize */
816 FALSE, /* pc_relative */
817 0, /* bitpos */
818 complain_overflow_signed, /* complain_on_overflow */
819 bfd_elf_generic_reloc, /* special_function */
820 "R_NDS32_SDA15S2_RELA",/* name */
821 FALSE, /* partial_inplace */
822 0x00007fff, /* src_mask */
823 0x00007fff, /* dst_mask */
824 FALSE), /* pcrel_offset */
825
826 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
827 1, /* rightshift */
828 2, /* size (0 = byte, 1 = short, 2 = long) */
829 15, /* bitsize */
830 FALSE, /* pc_relative */
831 0, /* bitpos */
832 complain_overflow_signed, /* complain_on_overflow */
833 bfd_elf_generic_reloc, /* special_function */
834 "R_NDS32_SDA15S1_RELA",/* name */
835 FALSE, /* partial_inplace */
836 0x00007fff, /* src_mask */
837 0x00007fff, /* dst_mask */
838 FALSE), /* pcrel_offset */
839
840 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
841 0, /* rightshift */
842 2, /* size (0 = byte, 1 = short, 2 = long) */
843 15, /* bitsize */
844 FALSE, /* pc_relative */
845 0, /* bitpos */
846 complain_overflow_signed, /* complain_on_overflow */
847 bfd_elf_generic_reloc, /* special_function */
848 "R_NDS32_SDA15S0_RELA",/* name */
849 FALSE, /* partial_inplace */
850 0x00007fff, /* src_mask */
851 0x00007fff, /* dst_mask */
852 FALSE), /* pcrel_offset */
853
854 /* GNU extension to record C++ vtable hierarchy */
855 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
856 0, /* rightshift */
857 2, /* size (0 = byte, 1 = short, 2 = long) */
858 0, /* bitsize */
859 FALSE, /* pc_relative */
860 0, /* bitpos */
861 complain_overflow_dont,/* complain_on_overflow */
862 NULL, /* special_function */
863 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
864 FALSE, /* partial_inplace */
865 0, /* src_mask */
866 0, /* dst_mask */
867 FALSE), /* pcrel_offset */
868
869 /* GNU extension to record C++ vtable member usage */
870 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
871 0, /* rightshift */
872 2, /* size (0 = byte, 1 = short, 2 = long) */
873 0, /* bitsize */
874 FALSE, /* pc_relative */
875 0, /* bitpos */
876 complain_overflow_dont,/* complain_on_overflow */
877 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
878 "R_NDS32_RELA_GNU_VTENTRY", /* name */
879 FALSE, /* partial_inplace */
880 0, /* src_mask */
881 0, /* dst_mask */
882 FALSE), /* pcrel_offset */
883
884 /* Like R_NDS32_20, but referring to the GOT table entry for
885 the symbol. */
886 HOWTO (R_NDS32_GOT20, /* type */
887 0, /* rightshift */
888 2, /* size (0 = byte, 1 = short, 2 = long) */
889 20, /* bitsize */
890 FALSE, /* pc_relative */
891 0, /* bitpos */
892 complain_overflow_signed, /* complain_on_overflow */
893 bfd_elf_generic_reloc, /* special_function */
894 "R_NDS32_GOT20", /* name */
895 FALSE, /* partial_inplace */
896 0xfffff, /* src_mask */
897 0xfffff, /* dst_mask */
898 FALSE), /* pcrel_offset */
899
900 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
901 entry for the symbol. */
902 HOWTO (R_NDS32_25_PLTREL, /* type */
903 1, /* rightshift */
904 2, /* size (0 = byte, 1 = short, 2 = long) */
905 24, /* bitsize */
906 TRUE, /* pc_relative */
907 0, /* bitpos */
908 complain_overflow_signed, /* complain_on_overflow */
909 bfd_elf_generic_reloc, /* special_function */
910 "R_NDS32_25_PLTREL", /* name */
911 FALSE, /* partial_inplace */
912 0xffffff, /* src_mask */
913 0xffffff, /* dst_mask */
914 TRUE), /* pcrel_offset */
915
916 /* This is used only by the dynamic linker. The symbol should exist
917 both in the object being run and in some shared library. The
918 dynamic linker copies the data addressed by the symbol from the
919 shared library into the object, because the object being
920 run has to have the data at some particular address. */
921 HOWTO (R_NDS32_COPY, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 FALSE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_bitfield, /* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_NDS32_COPY", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 FALSE), /* pcrel_offset */
934
935 /* Like R_NDS32_20, but used when setting global offset table
936 entries. */
937 HOWTO (R_NDS32_GLOB_DAT, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 FALSE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_bitfield, /* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_NDS32_GLOB_DAT", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 FALSE), /* pcrel_offset */
950
951 /* Marks a procedure linkage table entry for a symbol. */
952 HOWTO (R_NDS32_JMP_SLOT, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 FALSE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_bitfield, /* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_NDS32_JMP_SLOT", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 FALSE), /* pcrel_offset */
965
966 /* Used only by the dynamic linker. When the object is run, this
967 longword is set to the load address of the object, plus the
968 addend. */
969 HOWTO (R_NDS32_RELATIVE, /* type */
970 0, /* rightshift */
971 2, /* size (0 = byte, 1 = short, 2 = long) */
972 32, /* bitsize */
973 FALSE, /* pc_relative */
974 0, /* bitpos */
975 complain_overflow_bitfield, /* complain_on_overflow */
976 bfd_elf_generic_reloc, /* special_function */
977 "R_NDS32_RELATIVE", /* name */
978 FALSE, /* partial_inplace */
979 0xffffffff, /* src_mask */
980 0xffffffff, /* dst_mask */
981 FALSE), /* pcrel_offset */
982
983 HOWTO (R_NDS32_GOTOFF, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 20, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_signed, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTOFF", /* name */
992 FALSE, /* partial_inplace */
993 0xfffff, /* src_mask */
994 0xfffff, /* dst_mask */
995 FALSE), /* pcrel_offset */
996
997 /* An PC Relative 20-bit relocation used when setting PIC offset
998 table register. */
999 HOWTO (R_NDS32_GOTPC20, /* type */
1000 0, /* rightshift */
1001 2, /* size (0 = byte, 1 = short, 2 = long) */
1002 20, /* bitsize */
1003 TRUE, /* pc_relative */
1004 0, /* bitpos */
1005 complain_overflow_signed, /* complain_on_overflow */
1006 bfd_elf_generic_reloc, /* special_function */
1007 "R_NDS32_GOTPC20", /* name */
1008 FALSE, /* partial_inplace */
1009 0xfffff, /* src_mask */
1010 0xfffff, /* dst_mask */
1011 TRUE), /* pcrel_offset */
1012
1013 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1014 the symbol. */
1015 HOWTO (R_NDS32_GOT_HI20, /* type */
1016 12, /* rightshift */
1017 2, /* size (0 = byte, 1 = short, 2 = long) */
1018 20, /* bitsize */
1019 FALSE, /* pc_relative */
1020 0, /* bitpos */
1021 complain_overflow_dont,/* complain_on_overflow */
1022 bfd_elf_generic_reloc, /* special_function */
1023 "R_NDS32_GOT_HI20", /* name */
1024 FALSE, /* partial_inplace */
1025 0x000fffff, /* src_mask */
1026 0x000fffff, /* dst_mask */
1027 FALSE), /* pcrel_offset */
1028 HOWTO (R_NDS32_GOT_LO12, /* type */
1029 0, /* rightshift */
1030 2, /* size (0 = byte, 1 = short, 2 = long) */
1031 12, /* bitsize */
1032 FALSE, /* pc_relative */
1033 0, /* bitpos */
1034 complain_overflow_dont,/* complain_on_overflow */
1035 bfd_elf_generic_reloc, /* special_function */
1036 "R_NDS32_GOT_LO12", /* name */
1037 FALSE, /* partial_inplace */
1038 0x00000fff, /* src_mask */
1039 0x00000fff, /* dst_mask */
1040 FALSE), /* pcrel_offset */
1041
1042 /* An PC Relative relocation used when setting PIC offset table register.
1043 Like R_NDS32_HI20, but referring to the GOT table entry for
1044 the symbol. */
1045 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1046 12, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 20, /* bitsize */
1049 FALSE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_NDS32_GOTPC_HI20", /* name */
1054 FALSE, /* partial_inplace */
1055 0x000fffff, /* src_mask */
1056 0x000fffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 12, /* bitsize */
1062 FALSE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont, /* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_NDS32_GOTPC_LO12", /* name */
1067 FALSE, /* partial_inplace */
1068 0x00000fff, /* src_mask */
1069 0x00000fff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1073 12, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 20, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_NDS32_GOTOFF_HI20", /* name */
1081 FALSE, /* partial_inplace */
1082 0x000fffff, /* src_mask */
1083 0x000fffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1086 0, /* rightshift */
1087 2, /* size (0 = byte, 1 = short, 2 = long) */
1088 12, /* bitsize */
1089 FALSE, /* pc_relative */
1090 0, /* bitpos */
1091 complain_overflow_dont,/* complain_on_overflow */
1092 bfd_elf_generic_reloc, /* special_function */
1093 "R_NDS32_GOTOFF_LO12", /* name */
1094 FALSE, /* partial_inplace */
1095 0x00000fff, /* src_mask */
1096 0x00000fff, /* dst_mask */
1097 FALSE), /* pcrel_offset */
1098
1099 /* Alignment hint for relaxable instruction. This is used with
1100 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1101 in order to make next label aligned on word boundary. */
1102 HOWTO (R_NDS32_INSN16, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_INSN16", /* name */
1111 FALSE, /* partial_inplace */
1112 0x00000fff, /* src_mask */
1113 0x00000fff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Alignment hint for label. */
1117 HOWTO (R_NDS32_LABEL, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LABEL", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for unconditional call sequence */
1132 HOWTO (R_NDS32_LONGCALL1, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGCALL1", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for conditional call sequence. */
1147 HOWTO (R_NDS32_LONGCALL2, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LONGCALL2", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for conditional call sequence. */
1162 HOWTO (R_NDS32_LONGCALL3, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_LONGCALL3", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for unconditional branch sequence. */
1177 HOWTO (R_NDS32_LONGJUMP1, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_LONGJUMP1", /* name */
1186 FALSE, /* partial_inplace */
1187 0xffffffff, /* src_mask */
1188 0xffffffff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for conditional branch sequence. */
1192 HOWTO (R_NDS32_LONGJUMP2, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_LONGJUMP2", /* name */
1201 FALSE, /* partial_inplace */
1202 0xffffffff, /* src_mask */
1203 0xffffffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for conditional branch sequence. */
1207 HOWTO (R_NDS32_LONGJUMP3, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_LONGJUMP3", /* name */
1216 FALSE, /* partial_inplace */
1217 0xffffffff, /* src_mask */
1218 0xffffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* Relax hint for load/store sequence. */
1222 HOWTO (R_NDS32_LOADSTORE, /* type */
1223 0, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 32, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 nds32_elf_ignore_reloc,/* special_function */
1230 "R_NDS32_LOADSTORE", /* name */
1231 FALSE, /* partial_inplace */
1232 0xffffffff, /* src_mask */
1233 0xffffffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Relax hint for load/store sequence. */
1237 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1238 0, /* rightshift */
1239 1, /* size (0 = byte, 1 = short, 2 = long) */
1240 16, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 nds32_elf_ignore_reloc,/* special_function */
1245 "R_NDS32_9_FIXED_RELA",/* name */
1246 FALSE, /* partial_inplace */
1247 0x000000ff, /* src_mask */
1248 0x000000ff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* Relax hint for load/store sequence. */
1252 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1253 0, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 32, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 nds32_elf_ignore_reloc,/* special_function */
1260 "R_NDS32_15_FIXED_RELA", /* name */
1261 FALSE, /* partial_inplace */
1262 0x00003fff, /* src_mask */
1263 0x00003fff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Relax hint for load/store sequence. */
1267 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 32, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 nds32_elf_ignore_reloc,/* special_function */
1275 "R_NDS32_17_FIXED_RELA", /* name */
1276 FALSE, /* partial_inplace */
1277 0x0000ffff, /* src_mask */
1278 0x0000ffff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Relax hint for load/store sequence. */
1282 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1283 0, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 32, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_dont,/* complain_on_overflow */
1289 nds32_elf_ignore_reloc,/* special_function */
1290 "R_NDS32_25_FIXED_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00ffffff, /* src_mask */
1293 0x00ffffff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* High 20 bits of PLT symbol offset relative to PC. */
1297 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1298 12, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 20, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_dont,/* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_PLTREL_HI20", /* name */
1306 FALSE, /* partial_inplace */
1307 0x000fffff, /* src_mask */
1308 0x000fffff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310
1311 /* Low 12 bits of PLT symbol offset relative to PC. */
1312 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 12, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_PLTREL_LO12", /* name */
1321 FALSE, /* partial_inplace */
1322 0x00000fff, /* src_mask */
1323 0x00000fff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1327 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1328 12, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 20, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_PLT_GOTREL_HI20", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000fffff, /* src_mask */
1338 0x000fffff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1342 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1343 0, /* rightshift */
1344 2, /* size (0 = byte, 1 = short, 2 = long) */
1345 12, /* bitsize */
1346 FALSE, /* pc_relative */
1347 0, /* bitpos */
1348 complain_overflow_dont,/* complain_on_overflow */
1349 bfd_elf_generic_reloc, /* special_function */
1350 "R_NDS32_PLT_GOTREL_LO12", /* name */
1351 FALSE, /* partial_inplace */
1352 0x00000fff, /* src_mask */
1353 0x00000fff, /* dst_mask */
1354 FALSE), /* pcrel_offset */
1355
1356 /* Small data area 12 bits offset. */
1357 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1358 2, /* rightshift */
1359 2, /* size (0 = byte, 1 = short, 2 = long) */
1360 12, /* bitsize */
1361 FALSE, /* pc_relative */
1362 0, /* bitpos */
1363 complain_overflow_signed, /* complain_on_overflow */
1364 bfd_elf_generic_reloc, /* special_function */
1365 "R_NDS32_SDA12S2_DP_RELA", /* name */
1366 FALSE, /* partial_inplace */
1367 0x00000fff, /* src_mask */
1368 0x00000fff, /* dst_mask */
1369 FALSE), /* pcrel_offset */
1370
1371 /* Small data area 12 bits offset. */
1372 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1373 2, /* rightshift */
1374 2, /* size (0 = byte, 1 = short, 2 = long) */
1375 12, /* bitsize */
1376 FALSE, /* pc_relative */
1377 0, /* bitpos */
1378 complain_overflow_signed, /* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_NDS32_SDA12S2_SP_RELA", /* name */
1381 FALSE, /* partial_inplace */
1382 0x00000fff, /* src_mask */
1383 0x00000fff, /* dst_mask */
1384 FALSE), /* pcrel_offset */
1385 /* Lower 12 bits of address. */
1386
1387 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1388 2, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 10, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_NDS32_LO12S2_DP_RELA", /* name */
1396 FALSE, /* partial_inplace */
1397 0x000003ff, /* src_mask */
1398 0x000003ff, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 /* Lower 12 bits of address. */
1402 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1403 2, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 10, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_NDS32_LO12S2_SP_RELA", /* name */
1411 FALSE, /* partial_inplace */
1412 0x000003ff, /* src_mask */
1413 0x000003ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415 /* Lower 12 bits of address. Special identity for or case. */
1416 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_NDS32_LO12S0_ORI_RELA", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429 /* Small data area 19 bits offset. */
1430 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1431 3, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 16, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_signed, /* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_NDS32_SDA16S3_RELA",/* name */
1439 FALSE, /* partial_inplace */
1440 0x0000ffff, /* src_mask */
1441 0x0000ffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 /* Small data area 15 bits offset. */
1445 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1446 2, /* rightshift */
1447 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 17, /* bitsize */
1449 FALSE, /* pc_relative */
1450 0, /* bitpos */
1451 complain_overflow_signed, /* complain_on_overflow */
1452 bfd_elf_generic_reloc, /* special_function */
1453 "R_NDS32_SDA17S2_RELA",/* name */
1454 FALSE, /* partial_inplace */
1455 0x0001ffff, /* src_mask */
1456 0x0001ffff, /* dst_mask */
1457 FALSE), /* pcrel_offset */
1458
1459 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1460 1, /* rightshift */
1461 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 18, /* bitsize */
1463 FALSE, /* pc_relative */
1464 0, /* bitpos */
1465 complain_overflow_signed, /* complain_on_overflow */
1466 bfd_elf_generic_reloc, /* special_function */
1467 "R_NDS32_SDA18S1_RELA",/* name */
1468 FALSE, /* partial_inplace */
1469 0x0003ffff, /* src_mask */
1470 0x0003ffff, /* dst_mask */
1471 FALSE), /* pcrel_offset */
1472
1473 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1474 0, /* rightshift */
1475 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 19, /* bitsize */
1477 FALSE, /* pc_relative */
1478 0, /* bitpos */
1479 complain_overflow_signed, /* complain_on_overflow */
1480 bfd_elf_generic_reloc, /* special_function */
1481 "R_NDS32_SDA19S0_RELA",/* name */
1482 FALSE, /* partial_inplace */
1483 0x0007ffff, /* src_mask */
1484 0x0007ffff, /* dst_mask */
1485 FALSE), /* pcrel_offset */
1486 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1487 0, /* rightshift */
1488 0, /* size (0 = byte, 1 = short, 2 = long) */
1489 8, /* bitsize */
1490 FALSE, /* pc_relative */
1491 0, /* bitpos */
1492 complain_overflow_dont,/* complain_on_overflow */
1493 nds32_elf_ignore_reloc,/* special_function */
1494 "R_NDS32_DWARF2_OP1_RELA", /* name */
1495 FALSE, /* partial_inplace */
1496 0xff, /* src_mask */
1497 0xff, /* dst_mask */
1498 FALSE), /* pcrel_offset */
1499 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1500 0, /* rightshift */
1501 1, /* size (0 = byte, 1 = short, 2 = long) */
1502 16, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont,/* complain_on_overflow */
1506 nds32_elf_ignore_reloc,/* special_function */
1507 "R_NDS32_DWARF2_OP2_RELA", /* name */
1508 FALSE, /* partial_inplace */
1509 0xffff, /* src_mask */
1510 0xffff, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1513 0, /* rightshift */
1514 2, /* size (0 = byte, 1 = short, 2 = long) */
1515 32, /* bitsize */
1516 FALSE, /* pc_relative */
1517 0, /* bitpos */
1518 complain_overflow_dont,/* complain_on_overflow */
1519 nds32_elf_ignore_reloc,/* special_function */
1520 "R_NDS32_DWARF2_LEB_RELA", /* name */
1521 FALSE, /* partial_inplace */
1522 0xffffffff, /* src_mask */
1523 0xffffffff, /* dst_mask */
1524 FALSE), /* pcrel_offset */
1525 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1526 0, /* rightshift */
1527 1, /* size (0 = byte, 1 = short, 2 = long) */
1528 16, /* bitsize */
1529 FALSE, /* pc_relative */
1530 0, /* bitpos */
1531 complain_overflow_dont,/* complain_on_overflow */
1532 nds32_elf_ignore_reloc,/* special_function */
1533 "R_NDS32_UPDATE_TA_RELA", /* name */
1534 FALSE, /* partial_inplace */
1535 0xffff, /* src_mask */
1536 0xffff, /* dst_mask */
1537 FALSE), /* pcrel_offset */
1538 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1539 entry for the symbol. */
1540 HOWTO (R_NDS32_9_PLTREL, /* type */
1541 1, /* rightshift */
1542 1, /* size (0 = byte, 1 = short, 2 = long) */
1543 8, /* bitsize */
1544 TRUE, /* pc_relative */
1545 0, /* bitpos */
1546 complain_overflow_signed, /* complain_on_overflow */
1547 bfd_elf_generic_reloc, /* special_function */
1548 "R_NDS32_9_PLTREL", /* name */
1549 FALSE, /* partial_inplace */
1550 0xff, /* src_mask */
1551 0xff, /* dst_mask */
1552 TRUE), /* pcrel_offset */
1553 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1554 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1555 0, /* rightshift */
1556 2, /* size (0 = byte, 1 = short, 2 = long) */
1557 20, /* bitsize */
1558 FALSE, /* pc_relative */
1559 0, /* bitpos */
1560 complain_overflow_dont,/* complain_on_overflow */
1561 bfd_elf_generic_reloc, /* special_function */
1562 "R_NDS32_PLT_GOTREL_LO20", /* name */
1563 FALSE, /* partial_inplace */
1564 0x000fffff, /* src_mask */
1565 0x000fffff, /* dst_mask */
1566 FALSE), /* pcrel_offset */
1567 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1568 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1569 0, /* rightshift */
1570 2, /* size (0 = byte, 1 = short, 2 = long) */
1571 15, /* bitsize */
1572 FALSE, /* pc_relative */
1573 0, /* bitpos */
1574 complain_overflow_dont,/* complain_on_overflow */
1575 bfd_elf_generic_reloc, /* special_function */
1576 "R_NDS32_PLT_GOTREL_LO15", /* name */
1577 FALSE, /* partial_inplace */
1578 0x00007fff, /* src_mask */
1579 0x00007fff, /* dst_mask */
1580 FALSE), /* pcrel_offset */
1581 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1582 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1583 0, /* rightshift */
1584 2, /* size (0 = byte, 1 = short, 2 = long) */
1585 19, /* bitsize */
1586 FALSE, /* pc_relative */
1587 0, /* bitpos */
1588 complain_overflow_dont,/* complain_on_overflow */
1589 bfd_elf_generic_reloc, /* special_function */
1590 "R_NDS32_PLT_GOTREL_LO19", /* name */
1591 FALSE, /* partial_inplace */
1592 0x0007ffff, /* src_mask */
1593 0x0007ffff, /* dst_mask */
1594 FALSE), /* pcrel_offset */
1595 HOWTO (R_NDS32_GOT_LO15, /* type */
1596 0, /* rightshift */
1597 2, /* size (0 = byte, 1 = short, 2 = long) */
1598 15, /* bitsize */
1599 FALSE, /* pc_relative */
1600 0, /* bitpos */
1601 complain_overflow_dont,/* complain_on_overflow */
1602 bfd_elf_generic_reloc, /* special_function */
1603 "R_NDS32_GOT_LO15", /* name */
1604 FALSE, /* partial_inplace */
1605 0x00007fff, /* src_mask */
1606 0x00007fff, /* dst_mask */
1607 FALSE), /* pcrel_offset */
1608 HOWTO (R_NDS32_GOT_LO19, /* type */
1609 0, /* rightshift */
1610 2, /* size (0 = byte, 1 = short, 2 = long) */
1611 19, /* bitsize */
1612 FALSE, /* pc_relative */
1613 0, /* bitpos */
1614 complain_overflow_dont,/* complain_on_overflow */
1615 bfd_elf_generic_reloc, /* special_function */
1616 "R_NDS32_GOT_LO19", /* name */
1617 FALSE, /* partial_inplace */
1618 0x0007ffff, /* src_mask */
1619 0x0007ffff, /* dst_mask */
1620 FALSE), /* pcrel_offset */
1621 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1622 0, /* rightshift */
1623 2, /* size (0 = byte, 1 = short, 2 = long) */
1624 15, /* bitsize */
1625 FALSE, /* pc_relative */
1626 0, /* bitpos */
1627 complain_overflow_dont,/* complain_on_overflow */
1628 bfd_elf_generic_reloc, /* special_function */
1629 "R_NDS32_GOTOFF_LO15", /* name */
1630 FALSE, /* partial_inplace */
1631 0x00007fff, /* src_mask */
1632 0x00007fff, /* dst_mask */
1633 FALSE), /* pcrel_offset */
1634 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1635 0, /* rightshift */
1636 2, /* size (0 = byte, 1 = short, 2 = long) */
1637 19, /* bitsize */
1638 FALSE, /* pc_relative */
1639 0, /* bitpos */
1640 complain_overflow_dont,/* complain_on_overflow */
1641 bfd_elf_generic_reloc, /* special_function */
1642 "R_NDS32_GOTOFF_LO19", /* name */
1643 FALSE, /* partial_inplace */
1644 0x0007ffff, /* src_mask */
1645 0x0007ffff, /* dst_mask */
1646 FALSE), /* pcrel_offset */
1647 /* GOT 15 bits offset. */
1648 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1649 2, /* rightshift */
1650 2, /* size (0 = byte, 1 = short, 2 = long) */
1651 15, /* bitsize */
1652 FALSE, /* pc_relative */
1653 0, /* bitpos */
1654 complain_overflow_signed, /* complain_on_overflow */
1655 bfd_elf_generic_reloc, /* special_function */
1656 "R_NDS32_GOT15S2_RELA",/* name */
1657 FALSE, /* partial_inplace */
1658 0x00007fff, /* src_mask */
1659 0x00007fff, /* dst_mask */
1660 FALSE), /* pcrel_offset */
1661 /* GOT 17 bits offset. */
1662 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1663 2, /* rightshift */
1664 2, /* size (0 = byte, 1 = short, 2 = long) */
1665 17, /* bitsize */
1666 FALSE, /* pc_relative */
1667 0, /* bitpos */
1668 complain_overflow_signed, /* complain_on_overflow */
1669 bfd_elf_generic_reloc, /* special_function */
1670 "R_NDS32_GOT17S2_RELA",/* name */
1671 FALSE, /* partial_inplace */
1672 0x0001ffff, /* src_mask */
1673 0x0001ffff, /* dst_mask */
1674 FALSE), /* pcrel_offset */
1675 /* A 5 bit address. */
1676 HOWTO (R_NDS32_5_RELA, /* type */
1677 0, /* rightshift */
1678 1, /* size (0 = byte, 1 = short, 2 = long) */
1679 5, /* bitsize */
1680 FALSE, /* pc_relative */
1681 0, /* bitpos */
1682 complain_overflow_signed, /* complain_on_overflow */
1683 bfd_elf_generic_reloc, /* special_function */
1684 "R_NDS32_5_RELA", /* name */
1685 FALSE, /* partial_inplace */
1686 0x1f, /* src_mask */
1687 0x1f, /* dst_mask */
1688 FALSE), /* pcrel_offset */
1689 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1690 1, /* rightshift */
1691 1, /* size (0 = byte, 1 = short, 2 = long) */
1692 9, /* bitsize */
1693 TRUE, /* pc_relative */
1694 0, /* bitpos */
1695 complain_overflow_unsigned, /* complain_on_overflow */
1696 bfd_elf_generic_reloc, /* special_function */
1697 "R_NDS32_10_UPCREL_RELA", /* name */
1698 FALSE, /* partial_inplace */
1699 0x1ff, /* src_mask */
1700 0x1ff, /* dst_mask */
1701 TRUE), /* pcrel_offset */
1702 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1703 2, /* rightshift */
1704 1, /* size (0 = byte, 1 = short, 2 = long) */
1705 7, /* bitsize */
1706 FALSE, /* pc_relative */
1707 0, /* bitpos */
1708 complain_overflow_unsigned, /* complain_on_overflow */
1709 bfd_elf_generic_reloc, /* special_function */
1710 "R_NDS32_SDA_FP7U2_RELA", /* name */
1711 FALSE, /* partial_inplace */
1712 0x0000007f, /* src_mask */
1713 0x0000007f, /* dst_mask */
1714 FALSE), /* pcrel_offset */
1715 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1716 1, /* rightshift */
1717 2, /* size (0 = byte, 1 = short, 2 = long) */
1718 8, /* bitsize */
1719 TRUE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_signed, /* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1724 FALSE, /* partial_inplace */
1725 0xff, /* src_mask */
1726 0xff, /* dst_mask */
1727 TRUE), /* pcrel_offset */
1728 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1729 1, /* rightshift */
1730 2, /* size (0 = byte, 1 = short, 2 = long) */
1731 24, /* bitsize */
1732 FALSE, /* pc_relative */
1733 0, /* bitpos */
1734 complain_overflow_dont,/* complain_on_overflow */
1735 bfd_elf_generic_reloc, /* special_function */
1736 "R_NDS32_25_ABS_RELA", /* name */
1737 FALSE, /* partial_inplace */
1738 0xffffff, /* src_mask */
1739 0xffffff, /* dst_mask */
1740 FALSE), /* pcrel_offset */
1741
1742 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1743 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1744 1, /* rightshift */
1745 2, /* size (0 = byte, 1 = short, 2 = long) */
1746 16, /* bitsize */
1747 TRUE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_signed, /* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_NDS32_17IFC_PCREL_RELA", /* name */
1752 FALSE, /* partial_inplace */
1753 0xffff, /* src_mask */
1754 0xffff, /* dst_mask */
1755 TRUE), /* pcrel_offset */
1756
1757 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1758 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1759 1, /* rightshift */
1760 1, /* size (0 = byte, 1 = short, 2 = long) */
1761 9, /* bitsize */
1762 TRUE, /* pc_relative */
1763 0, /* bitpos */
1764 complain_overflow_unsigned, /* complain_on_overflow */
1765 bfd_elf_generic_reloc, /* special_function */
1766 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1767 FALSE, /* partial_inplace */
1768 0x1ff, /* src_mask */
1769 0x1ff, /* dst_mask */
1770 TRUE), /* pcrel_offset */
1c8f6a4d
KLC
1771
1772 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1773 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1774 12, /* rightshift */
1775 2, /* size (0 = byte, 1 = short, 2 = long) */
1776 20, /* bitsize */
1777 FALSE, /* pc_relative */
1778 0, /* bitpos */
1779 complain_overflow_dont, /* complain_on_overflow */
1780 bfd_elf_generic_reloc, /* special_function */
1781 "R_NDS32_TLS_LE_HI20", /* name */
1782 FALSE, /* partial_inplace */
1783 0x000fffff, /* src_mask */
1784 0x000fffff, /* dst_mask */
1785 FALSE), /* pcrel_offset */
1786 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1787 0, /* rightshift */
1788 2, /* size (0 = byte, 1 = short, 2 = long) */
1789 12, /* bitsize */
1790 FALSE, /* pc_relative */
1791 0, /* bitpos */
1792 complain_overflow_dont, /* complain_on_overflow */
1793 bfd_elf_generic_reloc, /* special_function */
1794 "R_NDS32_TLS_LE_LO12", /* name */
1795 FALSE, /* partial_inplace */
1796 0x00000fff, /* src_mask */
1797 0x00000fff, /* dst_mask */
1798 FALSE), /* pcrel_offset */
1799
1800 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1801 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1802 12, /* rightshift */
1803 2, /* size (0 = byte, 1 = short, 2 = long) */
1804 20, /* bitsize */
1805 FALSE, /* pc_relative */
1806 0, /* bitpos */
1807 complain_overflow_dont, /* complain_on_overflow */
1808 bfd_elf_generic_reloc, /* special_function */
1809 "R_NDS32_TLS_IE_HI20", /* name */
1810 FALSE, /* partial_inplace */
1811 0x000fffff, /* src_mask */
1812 0x000fffff, /* dst_mask */
1813 FALSE), /* pcrel_offset */
1814 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1815 2, /* rightshift */
1816 2, /* size (0 = byte, 1 = short, 2 = long) */
1817 10, /* bitsize */
1818 FALSE, /* pc_relative */
1819 0, /* bitpos */
1820 complain_overflow_dont, /* complain_on_overflow */
1821 bfd_elf_generic_reloc, /* special_function */
1822 "R_NDS32_TLS_IE_LO12S2", /* name */
1823 FALSE, /* partial_inplace */
1824 0x000003ff, /* src_mask */
1825 0x000003ff, /* dst_mask */
1826 FALSE), /* pcrel_offset */
1827 /* Mark a TLS IE entry in GOT. */
1828 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1829 0, /* rightshift */
1830 2, /* size (0 = byte, 1 = short, 2 = long) */
1831 32, /* bitsize */
1832 FALSE, /* pc_relative */
1833 0, /* bitpos */
1834 complain_overflow_bitfield, /* complain_on_overflow */
1835 bfd_elf_generic_reloc, /* special_function */
1836 "R_NDS32_TLS_TPOFF", /* name */
1837 FALSE, /* partial_inplace */
1838 0xffffffff, /* src_mask */
1839 0xffffffff, /* dst_mask */
1840 FALSE), /* pcrel_offset */
1841 /* A 20 bit address. */
1842 HOWTO (R_NDS32_TLS_LE_20, /* type */
1843 0, /* rightshift */
1844 2, /* size (0 = byte, 1 = short, 2 = long) */
1845 20, /* bitsize */
1846 FALSE, /* pc_relative */
1847 0, /* bitpos */
1848 complain_overflow_signed, /* complain_on_overflow */
1849 bfd_elf_generic_reloc, /* special_function */
1850 "R_NDS32_TLS_LE_20", /* name */
1851 FALSE, /* partial_inplace */
1852 0xfffff, /* src_mask */
1853 0xfffff, /* dst_mask */
1854 FALSE), /* pcrel_offset */
1855 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1856 0, /* rightshift */
1857 2, /* size (0 = byte, 1 = short, 2 = long) */
1858 15, /* bitsize */
1859 FALSE, /* pc_relative */
1860 0, /* bitpos */
1861 complain_overflow_signed, /* complain_on_overflow */
1862 bfd_elf_generic_reloc, /* special_function */
1863 "R_NDS32_TLS_LE_15S0", /* name */
1864 FALSE, /* partial_inplace */
1865 0x7fff, /* src_mask */
1866 0x7fff, /* dst_mask */
1867 FALSE), /* pcrel_offset */
1868 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1869 1, /* rightshift */
1870 2, /* size (0 = byte, 1 = short, 2 = long) */
1871 15, /* bitsize */
1872 FALSE, /* pc_relative */
1873 0, /* bitpos */
1874 complain_overflow_signed, /* complain_on_overflow */
1875 bfd_elf_generic_reloc, /* special_function */
1876 "R_NDS32_TLS_LE_15S1", /* name */
1877 FALSE, /* partial_inplace */
1878 0x7fff, /* src_mask */
1879 0x7fff, /* dst_mask */
1880 FALSE), /* pcrel_offset */
1881 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1882 2, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 15, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_signed, /* complain_on_overflow */
1888 bfd_elf_generic_reloc, /* special_function */
1889 "R_NDS32_TLS_LE_15S2", /* name */
1890 FALSE, /* partial_inplace */
1891 0x7fff, /* src_mask */
1892 0x7fff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for unconditional call sequence */
1896 HOWTO (R_NDS32_LONGCALL4, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGCALL4", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional call sequence. */
1911 HOWTO (R_NDS32_LONGCALL5, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGCALL5", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
1924
1925 /* Relax hint for conditional call sequence. */
1926 HOWTO (R_NDS32_LONGCALL6, /* type */
1927 0, /* rightshift */
1928 2, /* size (0 = byte, 1 = short, 2 = long) */
1929 32, /* bitsize */
1930 FALSE, /* pc_relative */
1931 0, /* bitpos */
1932 complain_overflow_dont, /* complain_on_overflow */
1933 nds32_elf_ignore_reloc, /* special_function */
1934 "R_NDS32_LONGCALL6", /* name */
1935 FALSE, /* partial_inplace */
1936 0xffffffff, /* src_mask */
1937 0xffffffff, /* dst_mask */
1938 FALSE), /* pcrel_offset */
1939
1940 /* Relax hint for unconditional branch sequence. */
1941 HOWTO (R_NDS32_LONGJUMP4, /* type */
1942 0, /* rightshift */
1943 2, /* size (0 = byte, 1 = short, 2 = long) */
1944 32, /* bitsize */
1945 FALSE, /* pc_relative */
1946 0, /* bitpos */
1947 complain_overflow_dont, /* complain_on_overflow */
1948 nds32_elf_ignore_reloc, /* special_function */
1949 "R_NDS32_LONGJUMP4", /* name */
1950 FALSE, /* partial_inplace */
1951 0xffffffff, /* src_mask */
1952 0xffffffff, /* dst_mask */
1953 FALSE), /* pcrel_offset */
1954
1955 /* Relax hint for conditional branch sequence. */
1956 HOWTO (R_NDS32_LONGJUMP5, /* type */
1957 0, /* rightshift */
1958 2, /* size (0 = byte, 1 = short, 2 = long) */
1959 32, /* bitsize */
1960 FALSE, /* pc_relative */
1961 0, /* bitpos */
1962 complain_overflow_dont, /* complain_on_overflow */
1963 nds32_elf_ignore_reloc, /* special_function */
1964 "R_NDS32_LONGJUMP5", /* name */
1965 FALSE, /* partial_inplace */
1966 0xffffffff, /* src_mask */
1967 0xffffffff, /* dst_mask */
1968 FALSE), /* pcrel_offset */
1969
1970 /* Relax hint for conditional branch sequence. */
1971 HOWTO (R_NDS32_LONGJUMP6, /* type */
1972 0, /* rightshift */
1973 2, /* size (0 = byte, 1 = short, 2 = long) */
1974 32, /* bitsize */
1975 FALSE, /* pc_relative */
1976 0, /* bitpos */
1977 complain_overflow_dont, /* complain_on_overflow */
1978 nds32_elf_ignore_reloc, /* special_function */
1979 "R_NDS32_LONGJUMP6", /* name */
1980 FALSE, /* partial_inplace */
1981 0xffffffff, /* src_mask */
1982 0xffffffff, /* dst_mask */
1983 FALSE), /* pcrel_offset */
1984
1985 /* Relax hint for conditional branch sequence. */
1986 HOWTO (R_NDS32_LONGJUMP7, /* type */
1987 0, /* rightshift */
1988 2, /* size (0 = byte, 1 = short, 2 = long) */
1989 32, /* bitsize */
1990 FALSE, /* pc_relative */
1991 0, /* bitpos */
1992 complain_overflow_dont, /* complain_on_overflow */
1993 nds32_elf_ignore_reloc, /* special_function */
1994 "R_NDS32_LONGJUMP7", /* name */
1995 FALSE, /* partial_inplace */
1996 0xffffffff, /* src_mask */
1997 0xffffffff, /* dst_mask */
1998 FALSE), /* pcrel_offset */
35c08157
KLC
1999};
2000
2001/* Relocations used for relaxation. */
2002static reloc_howto_type nds32_elf_relax_howto_table[] =
2003{
2004 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2005 0, /* rightshift */
2006 2, /* size (0 = byte, 1 = short, 2 = long) */
2007 32, /* bitsize */
2008 FALSE, /* pc_relative */
2009 0, /* bitpos */
2010 complain_overflow_dont,/* complain_on_overflow */
2011 nds32_elf_ignore_reloc,/* special_function */
2012 "R_NDS32_RELAX_ENTRY", /* name */
2013 FALSE, /* partial_inplace */
2014 0xffffffff, /* src_mask */
2015 0xffffffff, /* dst_mask */
2016 FALSE), /* pcrel_offset */
2017 HOWTO (R_NDS32_GOT_SUFF, /* type */
2018 0, /* rightshift */
2019 2, /* size (0 = byte, 1 = short, 2 = long) */
2020 32, /* bitsize */
2021 FALSE, /* pc_relative */
2022 0, /* bitpos */
2023 complain_overflow_dont,/* complain_on_overflow */
2024 nds32_elf_ignore_reloc,/* special_function */
2025 "R_NDS32_GOT_SUFF", /* name */
2026 FALSE, /* partial_inplace */
2027 0xffffffff, /* src_mask */
2028 0xffffffff, /* dst_mask */
2029 FALSE), /* pcrel_offset */
2030 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2031 0, /* rightshift */
2032 2, /* size (0 = byte, 1 = short, 2 = long) */
2033 32, /* bitsize */
2034 FALSE, /* pc_relative */
2035 0, /* bitpos */
2036 complain_overflow_bitfield, /* complain_on_overflow */
2037 nds32_elf_ignore_reloc,/* special_function */
2038 "R_NDS32_GOTOFF_SUFF", /* name */
2039 FALSE, /* partial_inplace */
2040 0xffffffff, /* src_mask */
2041 0xffffffff, /* dst_mask */
2042 FALSE), /* pcrel_offset */
2043 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2044 0, /* rightshift */
2045 2, /* size (0 = byte, 1 = short, 2 = long) */
2046 32, /* bitsize */
2047 FALSE, /* pc_relative */
2048 0, /* bitpos */
2049 complain_overflow_dont,/* complain_on_overflow */
2050 nds32_elf_ignore_reloc,/* special_function */
2051 "R_NDS32_PLT_GOT_SUFF",/* name */
2052 FALSE, /* partial_inplace */
2053 0xffffffff, /* src_mask */
2054 0xffffffff, /* dst_mask */
2055 FALSE), /* pcrel_offset */
2056 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2057 0, /* rightshift */
2058 2, /* size (0 = byte, 1 = short, 2 = long) */
2059 32, /* bitsize */
2060 FALSE, /* pc_relative */
2061 0, /* bitpos */
2062 complain_overflow_dont,/* complain_on_overflow */
2063 nds32_elf_ignore_reloc,/* special_function */
2064 "R_NDS32_MULCALL_SUFF",/* name */
2065 FALSE, /* partial_inplace */
2066 0xffffffff, /* src_mask */
2067 0xffffffff, /* dst_mask */
2068 FALSE), /* pcrel_offset */
2069 HOWTO (R_NDS32_PTR, /* type */
2070 0, /* rightshift */
2071 2, /* size (0 = byte, 1 = short, 2 = long) */
2072 32, /* bitsize */
2073 FALSE, /* pc_relative */
2074 0, /* bitpos */
2075 complain_overflow_dont,/* complain_on_overflow */
2076 nds32_elf_ignore_reloc,/* special_function */
2077 "R_NDS32_PTR", /* name */
2078 FALSE, /* partial_inplace */
2079 0xffffffff, /* src_mask */
2080 0xffffffff, /* dst_mask */
2081 FALSE), /* pcrel_offset */
2082 HOWTO (R_NDS32_PTR_COUNT, /* type */
2083 0, /* rightshift */
2084 2, /* size (0 = byte, 1 = short, 2 = long) */
2085 32, /* bitsize */
2086 FALSE, /* pc_relative */
2087 0, /* bitpos */
2088 complain_overflow_dont,/* complain_on_overflow */
2089 nds32_elf_ignore_reloc,/* special_function */
2090 "R_NDS32_PTR_COUNT", /* name */
2091 FALSE, /* partial_inplace */
2092 0xffffffff, /* src_mask */
2093 0xffffffff, /* dst_mask */
2094 FALSE), /* pcrel_offset */
2095 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2096 0, /* rightshift */
2097 2, /* size (0 = byte, 1 = short, 2 = long) */
2098 32, /* bitsize */
2099 FALSE, /* pc_relative */
2100 0, /* bitpos */
2101 complain_overflow_dont,/* complain_on_overflow */
2102 nds32_elf_ignore_reloc,/* special_function */
2103 "R_NDS32_PTR_RESOLVED",/* name */
2104 FALSE, /* partial_inplace */
2105 0xffffffff, /* src_mask */
2106 0xffffffff, /* dst_mask */
2107 FALSE), /* pcrel_offset */
2108 HOWTO (R_NDS32_PLTBLOCK, /* type */
2109 0, /* rightshift */
2110 2, /* size (0 = byte, 1 = short, 2 = long) */
2111 32, /* bitsize */
2112 FALSE, /* pc_relative */
2113 0, /* bitpos */
2114 complain_overflow_dont,/* complain_on_overflow */
2115 nds32_elf_ignore_reloc,/* special_function */
2116 "R_NDS32_PLTBLOCK", /* name */
2117 FALSE, /* partial_inplace */
2118 0xffffffff, /* src_mask */
2119 0xffffffff, /* dst_mask */
2120 FALSE), /* pcrel_offset */
2121 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2122 0, /* rightshift */
2123 2, /* size (0 = byte, 1 = short, 2 = long) */
2124 32, /* bitsize */
2125 FALSE, /* pc_relative */
2126 0, /* bitpos */
2127 complain_overflow_dont,/* complain_on_overflow */
2128 nds32_elf_ignore_reloc,/* special_function */
2129 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2130 FALSE, /* partial_inplace */
2131 0xffffffff, /* src_mask */
2132 0xffffffff, /* dst_mask */
2133 FALSE), /* pcrel_offset */
2134 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2135 0, /* rightshift */
2136 2, /* size (0 = byte, 1 = short, 2 = long) */
2137 32, /* bitsize */
2138 FALSE, /* pc_relative */
2139 0, /* bitpos */
2140 complain_overflow_dont,/* complain_on_overflow */
2141 nds32_elf_ignore_reloc,/* special_function */
2142 "R_NDS32_RELAX_REGION_END", /* name */
2143 FALSE, /* partial_inplace */
2144 0xffffffff, /* src_mask */
2145 0xffffffff, /* dst_mask */
2146 FALSE), /* pcrel_offset */
2147 HOWTO (R_NDS32_MINUEND, /* type */
2148 0, /* rightshift */
2149 2, /* size (0 = byte, 1 = short, 2 = long) */
2150 32, /* bitsize */
2151 FALSE, /* pc_relative */
2152 0, /* bitpos */
2153 complain_overflow_dont,/* complain_on_overflow */
2154 nds32_elf_ignore_reloc,/* special_function */
2155 "R_NDS32_MINUEND", /* name */
2156 FALSE, /* partial_inplace */
2157 0xffffffff, /* src_mask */
2158 0xffffffff, /* dst_mask */
2159 FALSE), /* pcrel_offset */
2160 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2161 0, /* rightshift */
2162 2, /* size (0 = byte, 1 = short, 2 = long) */
2163 32, /* bitsize */
2164 FALSE, /* pc_relative */
2165 0, /* bitpos */
2166 complain_overflow_dont,/* complain_on_overflow */
2167 nds32_elf_ignore_reloc,/* special_function */
2168 "R_NDS32_SUBTRAHEND", /* name */
2169 FALSE, /* partial_inplace */
2170 0xffffffff, /* src_mask */
2171 0xffffffff, /* dst_mask */
2172 FALSE), /* pcrel_offset */
2173 HOWTO (R_NDS32_DIFF8, /* type */
2174 0, /* rightshift */
2175 0, /* size (0 = byte, 1 = short, 2 = long) */
2176 8, /* bitsize */
2177 FALSE, /* pc_relative */
2178 0, /* bitpos */
2179 complain_overflow_dont,/* complain_on_overflow */
2180 nds32_elf_ignore_reloc,/* special_function */
2181 "R_NDS32_DIFF8", /* name */
2182 FALSE, /* partial_inplace */
2183 0x000000ff, /* src_mask */
2184 0x000000ff, /* dst_mask */
2185 FALSE), /* pcrel_offset */
2186 HOWTO (R_NDS32_DIFF16, /* type */
2187 0, /* rightshift */
2188 1, /* size (0 = byte, 1 = short, 2 = long) */
2189 16, /* bitsize */
2190 FALSE, /* pc_relative */
2191 0, /* bitpos */
2192 complain_overflow_dont,/* complain_on_overflow */
2193 nds32_elf_ignore_reloc,/* special_function */
2194 "R_NDS32_DIFF16", /* name */
2195 FALSE, /* partial_inplace */
2196 0x0000ffff, /* src_mask */
2197 0x0000ffff, /* dst_mask */
2198 FALSE), /* pcrel_offset */
2199 HOWTO (R_NDS32_DIFF32, /* type */
2200 0, /* rightshift */
2201 2, /* size (0 = byte, 1 = short, 2 = long) */
2202 32, /* bitsize */
2203 FALSE, /* pc_relative */
2204 0, /* bitpos */
2205 complain_overflow_dont,/* complain_on_overflow */
2206 nds32_elf_ignore_reloc,/* special_function */
2207 "R_NDS32_DIFF32", /* name */
2208 FALSE, /* partial_inplace */
2209 0xffffffff, /* src_mask */
2210 0xffffffff, /* dst_mask */
2211 FALSE), /* pcrel_offset */
2212 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2213 0, /* rightshift */
2214 0, /* size (0 = byte, 1 = short, 2 = long) */
2215 0, /* bitsize */
2216 FALSE, /* pc_relative */
2217 0, /* bitpos */
2218 complain_overflow_dont,/* complain_on_overflow */
2219 nds32_elf_ignore_reloc,/* special_function */
2220 "R_NDS32_DIFF_ULEB128",/* name */
2221 FALSE, /* partial_inplace */
2222 0xffffffff, /* src_mask */
2223 0xffffffff, /* dst_mask */
2224 FALSE), /* pcrel_offset */
2225 HOWTO (R_NDS32_DATA, /* type */
2226 0, /* rightshift */
2227 2, /* size (0 = byte, 1 = short, 2 = long) */
2228 32, /* bitsize */
2229 FALSE, /* pc_relative */
2230 0, /* bitpos */
2231 complain_overflow_dont,/* complain_on_overflow */
2232 nds32_elf_ignore_reloc,/* special_function */
2233 "R_NDS32_DATA", /* name */
2234 FALSE, /* partial_inplace */
2235 0xffffffff, /* src_mask */
2236 0xffffffff, /* dst_mask */
2237 FALSE), /* pcrel_offset */
2238 HOWTO (R_NDS32_TRAN, /* type */
2239 0, /* rightshift */
2240 2, /* size (0 = byte, 1 = short, 2 = long) */
2241 32, /* bitsize */
2242 FALSE, /* pc_relative */
2243 0, /* bitpos */
2244 complain_overflow_dont,/* complain_on_overflow */
2245 nds32_elf_ignore_reloc,/* special_function */
2246 "R_NDS32_TRAN", /* name */
2247 FALSE, /* partial_inplace */
2248 0xffffffff, /* src_mask */
2249 0xffffffff, /* dst_mask */
2250 FALSE), /* pcrel_offset */
1c8f6a4d
KLC
2251 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2252 0, /* rightshift */
2253 2, /* size (0 = byte, 1 = short, 2 = long) */
2254 32, /* bitsize */
2255 FALSE, /* pc_relative */
2256 0, /* bitpos */
2257 complain_overflow_dont, /* complain_on_overflow */
2258 nds32_elf_ignore_reloc, /* special_function */
2259 "R_NDS32_TLS_LE_ADD", /* name */
2260 FALSE, /* partial_inplace */
2261 0xffffffff, /* src_mask */
2262 0xffffffff, /* dst_mask */
2263 FALSE), /* pcrel_offset */
2264 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2265 0, /* rightshift */
2266 2, /* size (0 = byte, 1 = short, 2 = long) */
2267 32, /* bitsize */
2268 FALSE, /* pc_relative */
2269 0, /* bitpos */
2270 complain_overflow_dont, /* complain_on_overflow */
2271 nds32_elf_ignore_reloc, /* special_function */
2272 "R_NDS32_TLS_LE_LS", /* name */
2273 FALSE, /* partial_inplace */
2274 0xffffffff, /* src_mask */
2275 0xffffffff, /* dst_mask */
2276 FALSE), /* pcrel_offset */
2277 HOWTO (R_NDS32_EMPTY, /* type */
2278 0, /* rightshift */
2279 2, /* size (0 = byte, 1 = short, 2 = long) */
2280 32, /* bitsize */
2281 FALSE, /* pc_relative */
2282 0, /* bitpos */
2283 complain_overflow_dont, /* complain_on_overflow */
2284 nds32_elf_ignore_reloc, /* special_function */
2285 "R_NDS32_EMPTY", /* name */
2286 FALSE, /* partial_inplace */
2287 0xffffffff, /* src_mask */
2288 0xffffffff, /* dst_mask */
2289 FALSE), /* pcrel_offset */
35c08157
KLC
2290};
2291
2292\f
2293/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2294 This prototype is the same as qsort (). */
2295
2296void
2297nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2298 int (*compar) (const void *lhs, const void *rhs))
2299{
2300 char *ptr = (char *) base;
1c8f6a4d 2301 int i, j;
35c08157
KLC
2302 char *tmp = alloca (size);
2303
2304 /* If i is less than j, i is inserted before j.
2305
2306 |---- j ----- i --------------|
2307 \ / \ /
2308 sorted unsorted
2309 */
2310
1c8f6a4d 2311 for (i = 1; i < (int) nmemb; i++)
35c08157 2312 {
1c8f6a4d
KLC
2313 for (j = (i - 1); j >= 0; j--)
2314 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC
2315 break;
2316
1c8f6a4d
KLC
2317 j++;
2318
35c08157 2319 if (i == j)
1c8f6a4d 2320 continue; /* i is in order. */
35c08157
KLC
2321
2322 memcpy (tmp, ptr + i * size, size);
2323 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2324 memcpy (ptr + j * size, tmp, size);
2325 }
2326}
2327
2328/* Sort relocation by r_offset.
2329
2330 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2331 algorithm. Relocations at the same r_offset must keep their order.
2332 For example, RELAX_ENTRY must be the very first relocation entry.
2333
2334 Currently, this function implements insertion-sort.
2335
2336 FIXME: If we already sort them in assembler, why bother sort them
2337 here again? */
2338
2339static int
2340compar_reloc (const void *lhs, const void *rhs)
2341{
2342 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2343 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2344
2345 if (l->r_offset > r->r_offset)
2346 return 1;
2347 else if (l->r_offset == r->r_offset)
2348 return 0;
2349 else
2350 return -1;
2351}
2352
2353/* Functions listed below are only used for old relocs.
2354 * nds32_elf_9_pcrel_reloc
2355 * nds32_elf_do_9_pcrel_reloc
2356 * nds32_elf_hi20_reloc
2357 * nds32_elf_relocate_hi20
2358 * nds32_elf_lo12_reloc
2359 * nds32_elf_sda15_reloc
2360 * nds32_elf_generic_reloc
2361 */
2362
2363/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2364
2365static bfd_reloc_status_type
2366nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2367 void *data, asection *input_section, bfd *output_bfd,
2368 char **error_message ATTRIBUTE_UNUSED)
2369{
2370 /* This part is from bfd_elf_generic_reloc. */
2371 if (output_bfd != (bfd *) NULL
2372 && (symbol->flags & BSF_SECTION_SYM) == 0
2373 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2374 {
2375 reloc_entry->address += input_section->output_offset;
2376 return bfd_reloc_ok;
2377 }
2378
2379 if (output_bfd != NULL)
2380 {
2381 /* FIXME: See bfd_perform_relocation. Is this right? */
2382 return bfd_reloc_continue;
2383 }
2384
2385 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2386 input_section,
2387 data, reloc_entry->address,
2388 symbol->section,
2389 (symbol->value
2390 + symbol->section->output_section->vma
2391 + symbol->section->output_offset),
2392 reloc_entry->addend);
2393}
2394
2395/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2396#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2397
2398static bfd_reloc_status_type
2399nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2400 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC
2401 bfd_vma offset,
2402 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC
2403 bfd_vma symbol_value, bfd_vma addend)
2404{
2405 bfd_signed_vma relocation;
2406 unsigned short x;
2407 bfd_reloc_status_type status;
2408
2409 /* Sanity check the address (offset in section). */
2410 if (offset > bfd_get_section_limit (abfd, input_section))
2411 return bfd_reloc_outofrange;
2412
2413 relocation = symbol_value + addend;
2414 /* Make it pc relative. */
2415 relocation -= (input_section->output_section->vma
2416 + input_section->output_offset);
2417 /* These jumps mask off the lower two bits of the current address
2418 before doing pcrel calculations. */
2419 relocation -= (offset & -(bfd_vma) 2);
2420
1c8f6a4d 2421 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC
2422 status = bfd_reloc_overflow;
2423 else
2424 status = bfd_reloc_ok;
2425
2426 x = bfd_getb16 (data + offset);
2427
2428 relocation >>= howto->rightshift;
2429 relocation <<= howto->bitpos;
2430 x = (x & ~howto->dst_mask)
2431 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2432
2433 bfd_putb16 ((bfd_vma) x, data + offset);
2434
2435 return status;
2436}
2437
2438/* Handle the R_NDS32_HI20_[SU]LO relocs.
2439 HI20_SLO is for the add3 and load/store with displacement instructions.
2440 HI20 is for the or3 instruction.
2441 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2442 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2443 we must add one to the high 16 bytes (which will get subtracted off when
2444 the low 16 bits are added).
2445 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2446 because there is a carry from the LO12 to the HI20. Here we just save
2447 the information we need; we do the actual relocation when we see the LO12.
2448 This code is copied from the elf32-mips.c. We also support an arbitrary
2449 number of HI20 relocs to be associated with a single LO12 reloc. The
2450 assembler sorts the relocs to ensure each HI20 immediately precedes its
2451 LO12. However if there are multiple copies, the assembler may not find
2452 the real LO12 so it picks the first one it finds. */
2453
2454struct nds32_hi20
2455{
2456 struct nds32_hi20 *next;
2457 bfd_byte *addr;
2458 bfd_vma addend;
2459};
2460
2461static struct nds32_hi20 *nds32_hi20_list;
2462
2463static bfd_reloc_status_type
2464nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2465 asymbol *symbol, void *data, asection *input_section,
2466 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2467{
2468 bfd_reloc_status_type ret;
2469 bfd_vma relocation;
2470 struct nds32_hi20 *n;
2471
2472 /* This part is from bfd_elf_generic_reloc.
2473 If we're relocating, and this an external symbol, we don't want
2474 to change anything. */
2475 if (output_bfd != (bfd *) NULL
2476 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2477 {
2478 reloc_entry->address += input_section->output_offset;
2479 return bfd_reloc_ok;
2480 }
2481
2482 /* Sanity check the address (offset in section). */
2483 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2484 return bfd_reloc_outofrange;
2485
2486 ret = bfd_reloc_ok;
2487 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2488 ret = bfd_reloc_undefined;
2489
2490 if (bfd_is_com_section (symbol->section))
2491 relocation = 0;
2492 else
2493 relocation = symbol->value;
2494
2495 relocation += symbol->section->output_section->vma;
2496 relocation += symbol->section->output_offset;
2497 relocation += reloc_entry->addend;
2498
2499 /* Save the information, and let LO12 do the actual relocation. */
2500 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2501 if (n == NULL)
2502 return bfd_reloc_outofrange;
2503
2504 n->addr = (bfd_byte *) data + reloc_entry->address;
2505 n->addend = relocation;
2506 n->next = nds32_hi20_list;
2507 nds32_hi20_list = n;
2508
2509 if (output_bfd != (bfd *) NULL)
2510 reloc_entry->address += input_section->output_offset;
2511
2512 return ret;
2513}
2514
2515/* Handle an NDS32 ELF HI20 reloc. */
2516
2517static void
2518nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2519 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2520 Elf_Internal_Rela *rello, bfd_byte *contents,
2521 bfd_vma addend)
2522{
2523 unsigned long insn;
2524 bfd_vma addlo;
2525
2526 insn = bfd_getb32 (contents + relhi->r_offset);
2527
2528 addlo = bfd_getb32 (contents + rello->r_offset);
2529 addlo &= 0xfff;
2530
2531 addend += ((insn & 0xfffff) << 20) + addlo;
2532
2533 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2534 bfd_putb32 (insn, contents + relhi->r_offset);
2535}
2536
2537/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2538 inplace relocation; this function exists in order to do the
2539 R_NDS32_HI20_[SU]LO relocation described above. */
2540
2541static bfd_reloc_status_type
2542nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2543 void *data, asection *input_section, bfd *output_bfd,
2544 char **error_message)
2545{
2546 /* This part is from bfd_elf_generic_reloc.
2547 If we're relocating, and this an external symbol, we don't want
2548 to change anything. */
2549 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2550 && reloc_entry->addend == 0)
2551 {
2552 reloc_entry->address += input_section->output_offset;
2553 return bfd_reloc_ok;
2554 }
2555
2556 if (nds32_hi20_list != NULL)
2557 {
2558 struct nds32_hi20 *l;
2559
2560 l = nds32_hi20_list;
2561 while (l != NULL)
2562 {
2563 unsigned long insn;
2564 unsigned long val;
2565 unsigned long vallo;
2566 struct nds32_hi20 *next;
2567
2568 /* Do the HI20 relocation. Note that we actually don't need
2569 to know anything about the LO12 itself, except where to
2570 find the low 12 bits of the addend needed by the LO12. */
2571 insn = bfd_getb32 (l->addr);
2572 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2573 vallo &= 0xfff;
2574 switch (reloc_entry->howto->type)
2575 {
2576 case R_NDS32_LO12S3:
2577 vallo <<= 3;
2578 break;
2579
2580 case R_NDS32_LO12S2:
2581 vallo <<= 2;
2582 break;
2583
2584 case R_NDS32_LO12S1:
2585 vallo <<= 1;
2586 break;
2587
2588 case R_NDS32_LO12S0:
2589 vallo <<= 0;
2590 break;
2591 }
2592
2593 val = ((insn & 0xfffff) << 12) + vallo;
2594 val += l->addend;
2595
2596 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2597 bfd_putb32 ((bfd_vma) insn, l->addr);
2598
2599 next = l->next;
2600 free (l);
2601 l = next;
2602 }
2603
2604 nds32_hi20_list = NULL;
2605 }
2606
2607 /* Now do the LO12 reloc in the usual way.
2608 ??? It would be nice to call bfd_elf_generic_reloc here,
2609 but we have partial_inplace set. bfd_elf_generic_reloc will
2610 pass the handling back to bfd_install_relocation which will install
2611 a section relative addend which is wrong. */
2612 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2613 input_section, output_bfd, error_message);
2614}
2615
2616/* Do generic partial_inplace relocation.
2617 This is a local replacement for bfd_elf_generic_reloc. */
2618
2619static bfd_reloc_status_type
2620nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2621 asymbol *symbol, void *data, asection *input_section,
2622 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2623{
2624 bfd_reloc_status_type ret;
2625 bfd_vma relocation;
2626 bfd_byte *inplace_address;
2627
2628 /* This part is from bfd_elf_generic_reloc.
2629 If we're relocating, and this an external symbol, we don't want
2630 to change anything. */
2631 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2632 && reloc_entry->addend == 0)
2633 {
2634 reloc_entry->address += input_section->output_offset;
2635 return bfd_reloc_ok;
2636 }
2637
2638 /* Now do the reloc in the usual way.
2639 ??? It would be nice to call bfd_elf_generic_reloc here,
2640 but we have partial_inplace set. bfd_elf_generic_reloc will
2641 pass the handling back to bfd_install_relocation which will install
2642 a section relative addend which is wrong. */
2643
2644 /* Sanity check the address (offset in section). */
2645 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2646 return bfd_reloc_outofrange;
2647
2648 ret = bfd_reloc_ok;
2649 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2650 ret = bfd_reloc_undefined;
2651
2652 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2653 relocation = 0;
2654 else
2655 relocation = symbol->value;
2656
2657 /* Only do this for a final link. */
2658 if (output_bfd == (bfd *) NULL)
2659 {
2660 relocation += symbol->section->output_section->vma;
2661 relocation += symbol->section->output_offset;
2662 }
2663
2664 relocation += reloc_entry->addend;
2665 switch (reloc_entry->howto->type)
2666 {
2667 case R_NDS32_LO12S3:
2668 relocation >>= 3;
2669 break;
2670
2671 case R_NDS32_LO12S2:
2672 relocation >>= 2;
2673 break;
2674
2675 case R_NDS32_LO12S1:
2676 relocation >>= 1;
2677 break;
2678
2679 case R_NDS32_LO12S0:
2680 default:
2681 relocation >>= 0;
2682 break;
2683 }
2684
2685 inplace_address = (bfd_byte *) data + reloc_entry->address;
2686
2687#define DOIT(x) \
2688 x = ((x & ~reloc_entry->howto->dst_mask) | \
2689 (((x & reloc_entry->howto->src_mask) + relocation) & \
2690 reloc_entry->howto->dst_mask))
2691
2692 switch (reloc_entry->howto->size)
2693 {
2694 case 1:
2695 {
2696 short x = bfd_getb16 (inplace_address);
2697
2698 DOIT (x);
2699 bfd_putb16 ((bfd_vma) x, inplace_address);
2700 }
2701 break;
2702 case 2:
2703 {
2704 unsigned long x = bfd_getb32 (inplace_address);
2705
2706 DOIT (x);
2707 bfd_putb32 ((bfd_vma) x, inplace_address);
2708 }
2709 break;
2710 default:
2711 BFD_ASSERT (0);
2712 }
2713
2714 if (output_bfd != (bfd *) NULL)
2715 reloc_entry->address += input_section->output_offset;
2716
2717 return ret;
2718}
2719
2720/* Handle the R_NDS32_SDA15 reloc.
2721 This reloc is used to compute the address of objects in the small data area
2722 and to perform loads and stores from that area.
2723 The lower 15 bits are sign extended and added to the register specified
2724 in the instruction, which is assumed to point to _SDA_BASE_.
2725
2726 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2727 the access size, this must be taken care of. */
2728
2729static bfd_reloc_status_type
2730nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2731 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2732 asection *input_section, bfd *output_bfd,
2733 char **error_message ATTRIBUTE_UNUSED)
2734{
2735 /* This part is from bfd_elf_generic_reloc. */
2736 if (output_bfd != (bfd *) NULL
2737 && (symbol->flags & BSF_SECTION_SYM) == 0
2738 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2739 {
2740 reloc_entry->address += input_section->output_offset;
2741 return bfd_reloc_ok;
2742 }
2743
2744 if (output_bfd != NULL)
2745 {
2746 /* FIXME: See bfd_perform_relocation. Is this right? */
2747 return bfd_reloc_continue;
2748 }
2749
2750 /* FIXME: not sure what to do here yet. But then again, the linker
2751 may never call us. */
2752 abort ();
2753}
2754
2755/* nds32_elf_ignore_reloc is the special function for
2756 relocation types which don't need to be relocated
2757 like relaxation relocation types.
2758 This function simply return bfd_reloc_ok when it is
2759 invoked. */
2760
2761static bfd_reloc_status_type
2762nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2763 asymbol *symbol ATTRIBUTE_UNUSED,
2764 void *data ATTRIBUTE_UNUSED, asection *input_section,
2765 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2766{
2767 if (output_bfd != NULL)
2768 reloc_entry->address += input_section->output_offset;
2769
2770 return bfd_reloc_ok;
2771}
2772\f
2773
2774/* Map BFD reloc types to NDS32 ELF reloc types. */
2775
2776struct nds32_reloc_map_entry
2777{
2778 bfd_reloc_code_real_type bfd_reloc_val;
2779 unsigned char elf_reloc_val;
2780};
2781
2782static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2783{
2784 {BFD_RELOC_NONE, R_NDS32_NONE},
2785 {BFD_RELOC_16, R_NDS32_16_RELA},
2786 {BFD_RELOC_32, R_NDS32_32_RELA},
2787 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2788 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2789 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2790 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2791 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2792 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2793 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2794 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2795 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2796 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2797 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2798 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2799 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2800 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2801 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2802 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2803 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2804 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2805 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2806 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2807
2808 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2809 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2810 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2811 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2812 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2813 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2814 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2815 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2816 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2817 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2818 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2819 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2820 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2821 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2822 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2823 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2824 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2825 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2826 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2827 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2828 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2829 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2830 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2831 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC
2832 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2833 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2834 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC
2835 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2836 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2837 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC
2838 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2839 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2840 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2841 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC
2842 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2843 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2844 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2845 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2846 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2847 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2848 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2849 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2850 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2854 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2855 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2856 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2857 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2858 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2859 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2860 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2861 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2862 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2863 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2864 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2866 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2867 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2868 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2869 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2870 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2871 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2872 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2873 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2874 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2875 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2876 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2877 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2878 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2879 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2880 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2881 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2882 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC
2883
2884 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2885 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2886 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2887 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2888 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2889 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2890 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2891 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2892 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC
2893 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2894 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2895 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2896 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2897 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2898 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2899 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2900 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2901 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2902 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2903 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC
2904};
2905
2906/* Patch tag. */
2907
2908static reloc_howto_type *
2909bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2910 const char *r_name)
2911{
2912 unsigned int i;
2913
2914 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2915 if (nds32_elf_howto_table[i].name != NULL
2916 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2917 return &nds32_elf_howto_table[i];
2918
2919 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2920 if (nds32_elf_relax_howto_table[i].name != NULL
2921 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2922 return &nds32_elf_relax_howto_table[i];
2923
2924 return NULL;
2925}
2926
2927static reloc_howto_type *
2928bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2929{
2930 if (code < R_NDS32_RELAX_ENTRY)
2931 {
2932 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2933 return &nds32_elf_howto_table[code];
2934 }
2935 else
2936 {
2937 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2938 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2939 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2940 }
2941}
2942
2943static reloc_howto_type *
2944bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2945 bfd_reloc_code_real_type code)
2946{
2947 unsigned int i;
2948
2949 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2950 {
2951 if (nds32_reloc_map[i].bfd_reloc_val == code)
2952 return bfd_elf32_bfd_reloc_type_table_lookup
2953 (nds32_reloc_map[i].elf_reloc_val);
2954 }
2955
2956 return NULL;
2957}
2958
2959/* Set the howto pointer for an NDS32 ELF reloc. */
2960
2961static void
2962nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2963 Elf_Internal_Rela *dst)
2964{
2965 enum elf_nds32_reloc_type r_type;
2966
2967 r_type = ELF32_R_TYPE (dst->r_info);
2968 BFD_ASSERT (ELF32_R_TYPE (dst->r_info) <= R_NDS32_GNU_VTENTRY);
2969 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2970}
2971
2972static void
2973nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2974 Elf_Internal_Rela *dst)
2975{
2976 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2977 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2978 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2979 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2980}
2981
2982/* Support for core dump NOTE sections.
2983 Reference to include/linux/elfcore.h in Linux. */
2984
2985static bfd_boolean
2986nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2987{
2988 int offset;
2989 size_t size;
2990
2991 switch (note->descsz)
2992 {
2993 case 0x114:
2994 /* Linux/NDS32 32-bit, ABI1 */
2995
2996 /* pr_cursig */
2997 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2998
2999 /* pr_pid */
3000 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3001
3002 /* pr_reg */
3003 offset = 72;
3004 size = 200;
3005 break;
3006
3007 case 0xfc:
3008 /* Linux/NDS32 32-bit */
3009
3010 /* pr_cursig */
3011 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3012
3013 /* pr_pid */
3014 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3015
3016 /* pr_reg */
3017 offset = 72;
3018 size = 176;
3019 break;
3020
3021 default:
3022 return FALSE;
3023 }
3024
3025 /* Make a ".reg" section. */
3026 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3027 size, note->descpos + offset);
3028}
3029
3030static bfd_boolean
3031nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3032{
3033 switch (note->descsz)
3034 {
3035 case 124:
3036 /* Linux/NDS32 */
3037
3038 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3039 elf_tdata (abfd)->core->program =
3040 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3041 elf_tdata (abfd)->core->command =
3042 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3043
3044 default:
3045 return FALSE;
3046 }
3047
3048 /* Note that for some reason, a spurious space is tacked
3049 onto the end of the args in some (at least one anyway)
3050 implementations, so strip it off if it exists. */
3051 {
3052 char *command = elf_tdata (abfd)->core->command;
3053 int n = strlen (command);
3054
3055 if (0 < n && command[n - 1] == ' ')
3056 command[n - 1] = '\0';
3057 }
3058
3059 return TRUE;
3060}
3061
3062/* Hook called by the linker routine which adds symbols from an object
3063 file. We must handle the special NDS32 section numbers here.
3064 We also keep watching for whether we need to create the sdata special
3065 linker sections. */
3066
3067static bfd_boolean
3068nds32_elf_add_symbol_hook (bfd *abfd,
3069 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3070 Elf_Internal_Sym *sym,
3071 const char **namep ATTRIBUTE_UNUSED,
3072 flagword *flagsp ATTRIBUTE_UNUSED,
3073 asection **secp, bfd_vma *valp)
3074{
3075 switch (sym->st_shndx)
3076 {
3077 case SHN_COMMON:
3078 /* Common symbols less than the GP size are automatically
3079 treated as SHN_MIPS_SCOMMON symbols. */
3080 if (sym->st_size > elf_gp_size (abfd)
3081 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3082 break;
3083
3084 /* st_value is the alignemnt constraint.
3085 That might be its actual size if it is an array or structure. */
3086 switch (sym->st_value)
3087 {
3088 case 1:
3089 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3090 break;
3091 case 2:
3092 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3093 break;
3094 case 4:
3095 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3096 break;
3097 case 8:
3098 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3099 break;
3100 default:
3101 return TRUE;
3102 }
3103
3104 (*secp)->flags |= SEC_IS_COMMON;
3105 *valp = sym->st_size;
3106 break;
3107 }
3108
3109 return TRUE;
3110}
3111
3112
3113/* This function can figure out the best location for a base register to access
3114 data relative to this base register
3115 INPUT:
3116 sda_d0: size of first DOUBLE WORD data section
3117 sda_w0: size of first WORD data section
3118 sda_h0: size of first HALF WORD data section
3119 sda_b : size of BYTE data section
3120 sda_hi: size of second HALF WORD data section
3121 sda_w1: size of second WORD data section
3122 sda_d1: size of second DOUBLE WORD data section
3123 OUTPUT:
3124 offset (always positive) from the beginning of sda_d0 if OK
3125 a negative error value if fail
3126 NOTE:
3127 these 7 sections have to be located back to back if exist
3128 a pass in 0 value for non-existing section */
3129
3130/* Due to the interpretation of simm15 field of load/store depending on
3131 data accessing size, the organization of base register relative data shall
3132 like the following figure
3133 -------------------------------------------
3134 | DOUBLE WORD sized data (range +/- 128K)
3135 -------------------------------------------
3136 | WORD sized data (range +/- 64K)
3137 -------------------------------------------
3138 | HALF WORD sized data (range +/- 32K)
3139 -------------------------------------------
3140 | BYTE sized data (range +/- 16K)
3141 -------------------------------------------
3142 | HALF WORD sized data (range +/- 32K)
3143 -------------------------------------------
3144 | WORD sized data (range +/- 64K)
3145 -------------------------------------------
3146 | DOUBLE WORD sized data (range +/- 128K)
3147 -------------------------------------------
3148 Its base register shall be set to access these data freely. */
3149
3150/* We have to figure out the SDA_BASE value, so that we can adjust the
3151 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3152 BFD. If we can't find it, we're stuck. We cache it in the ELF
3153 target data. We don't need to adjust the symbol value for an
3154 external symbol if we are producing relocatable output. */
3155
3156static asection *sda_rela_sec = NULL;
3157
1c8f6a4d 3158#define SDA_SECTION_NUM 10
35c08157
KLC
3159
3160static bfd_reloc_status_type
3161nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3162 bfd_vma *psb, bfd_boolean add_symbol)
3163{
3164 int relax_fp_as_gp;
3165 struct elf_nds32_link_hash_table *table;
3166 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3167 long unsigned int total = 0;
35c08157
KLC
3168
3169 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3170 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3171 {
3172 asection *first = NULL, *final = NULL, *temp;
3173 bfd_vma sda_base;
3174 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3175 4 byte-aligned. Therefore, it has to set the first section ".data"
3176 4 byte-aligned. */
3177 static const char sec_name[SDA_SECTION_NUM][10] =
3178 {
3179 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3180 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC
3181 };
3182 size_t i = 0;
3183
3184 if (output_bfd->sections == NULL)
3185 {
3186 *psb = elf_gp (output_bfd);
3187 return bfd_reloc_ok;
3188 }
3189
3190 /* Get the first and final section. */
1c8f6a4d 3191 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3192 {
3193 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3194 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3195 first = temp;
3196 if (temp && (temp->size != 0 || temp->rawsize != 0))
3197 final = temp;
1c8f6a4d
KLC
3198
3199 /* Summarize the sections in order to check if joining .bss. */
3200 if (temp && temp->size != 0)
3201 total += temp->size;
3202 else if (temp && temp->rawsize != 0)
3203 total += temp->rawsize;
3204
35c08157
KLC
3205 i++;
3206 }
3207
1c8f6a4d
KLC
3208 /* Check .bss size. */
3209 temp = bfd_get_section_by_name (output_bfd, ".bss");
3210 if (temp)
3211 {
3212 if (temp->size != 0)
3213 total += temp->size;
3214 else if (temp->rawsize != 0)
3215 total += temp->rawsize;
3216
3217 if (total < 0x80000)
3218 {
3219 if (!first && (temp->size != 0 || temp->rawsize != 0))
3220 first = temp;
3221 if ((temp->size != 0 || temp->rawsize != 0))
3222 final = temp;
3223 }
3224 }
3225
35c08157
KLC
3226 if (first && final)
3227 {
3228 /* The middle of data region. */
1c8f6a4d 3229 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC
3230
3231 /* Find the section sda_base located. */
3232 i = 0;
1c8f6a4d 3233 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3234 {
3235 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3236 if (final && (final->size != 0 || final->rawsize != 0)
3237 && sda_base >= final->vma)
3238 {
3239 first = final;
3240 i++;
3241 }
3242 else
3243 break;
3244 }
3245 }
3246 else
3247 {
3248 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3249 first output section. */
3250 first = output_bfd->sections;
3251 while (first && first->size == 0 && first->rawsize == 0)
3252 first = first->next;
3253 if (!first)
3254 {
3255 *psb = elf_gp (output_bfd);
3256 return bfd_reloc_ok;
3257 }
1c8f6a4d 3258 sda_base = first->vma + first->rawsize;
35c08157
KLC
3259 }
3260
3261 sda_base -= first->vma;
3262 sda_base = sda_base & (~7);
3263
3264 if (!_bfd_generic_link_add_one_symbol
3265 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3266 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3267 get_elf_backend_data (output_bfd)->collect, &h))
3268 return FALSE;
3269
3270 sda_rela_sec = first;
3271
3272 table = nds32_elf_hash_table (info);
3273 relax_fp_as_gp = table->relax_fp_as_gp;
3274 if (relax_fp_as_gp)
3275 {
3276 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3277 FALSE, FALSE, FALSE);
3278 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3279 And set FP equal to SDA_BASE to do relaxation for
3280 la $fp, _FP_BASE_. */
3281 if (!_bfd_generic_link_add_one_symbol
3282 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3283 first, (bfd_vma) sda_base, (const char *) NULL,
3284 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3285 return FALSE;
3286 }
3287 }
3288
3289 if (add_symbol == TRUE)
3290 {
3291 if (h)
3292 {
3293 /* Now set gp. */
3294 elf_gp (output_bfd) = (h->u.def.value
3295 + h->u.def.section->output_section->vma
3296 + h->u.def.section->output_offset);
3297 }
3298 else
3299 {
3300 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3301 return bfd_reloc_dangerous;
3302 }
3303 }
3304
3305 *psb = h->u.def.value + h->u.def.section->output_section->vma
3306 + h->u.def.section->output_offset;
3307 return bfd_reloc_ok;
3308}
3309\f
3310
3311/* Return size of a PLT entry. */
3312#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3313
3314
3315/* Create an entry in an nds32 ELF linker hash table. */
3316
3317static struct bfd_hash_entry *
3318nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3319 struct bfd_hash_table *table,
3320 const char *string)
3321{
3322 struct elf_nds32_link_hash_entry *ret;
3323
3324 ret = (struct elf_nds32_link_hash_entry *) entry;
3325
3326 /* Allocate the structure if it has not already been allocated by a
3327 subclass. */
3328 if (ret == NULL)
3329 ret = (struct elf_nds32_link_hash_entry *)
3330 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3331
3332 if (ret == NULL)
3333 return (struct bfd_hash_entry *) ret;
3334
3335 /* Call the allocation method of the superclass. */
3336 ret = (struct elf_nds32_link_hash_entry *)
3337 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3338
3339 if (ret != NULL)
3340 {
3341 struct elf_nds32_link_hash_entry *eh;
3342
3343 eh = (struct elf_nds32_link_hash_entry *) ret;
3344 eh->dyn_relocs = NULL;
1c8f6a4d 3345 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC
3346 }
3347
3348 return (struct bfd_hash_entry *) ret;
3349}
3350
3351/* Create an nds32 ELF linker hash table. */
3352
3353static struct bfd_link_hash_table *
3354nds32_elf_link_hash_table_create (bfd *abfd)
3355{
3356 struct elf_nds32_link_hash_table *ret;
3357
3358 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3359
3360 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3361 if (ret == NULL)
3362 return NULL;
3363
3364 /* patch tag. */
3365 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3366 nds32_elf_link_hash_newfunc,
3367 sizeof (struct elf_nds32_link_hash_entry),
3368 NDS32_ELF_DATA))
3369 {
3370 free (ret);
3371 return NULL;
3372 }
3373
3374 ret->sgot = NULL;
3375 ret->sgotplt = NULL;
3376 ret->srelgot = NULL;
3377 ret->splt = NULL;
3378 ret->srelplt = NULL;
3379 ret->sdynbss = NULL;
3380 ret->srelbss = NULL;
3381 ret->sym_ld_script = NULL;
3382 ret->ex9_export_file = NULL;
3383 ret->ex9_import_file = NULL;
3384
3385 return &ret->root.root;
3386}
3387
3388/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3389 shortcuts to them in our hash table. */
3390
3391static bfd_boolean
3392create_got_section (bfd *dynobj, struct bfd_link_info *info)
3393{
3394 struct elf_nds32_link_hash_table *htab;
3395
3396 if (!_bfd_elf_create_got_section (dynobj, info))
3397 return FALSE;
3398
3399 htab = nds32_elf_hash_table (info);
3400 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3401 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3402 if (!htab->sgot || !htab->sgotplt)
3403 abort ();
3404
3405 /* _bfd_elf_create_got_section will create it for us. */
3406 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3407 if (htab->srelgot == NULL
3408 || !bfd_set_section_flags (dynobj, htab->srelgot,
3409 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3410 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3411 | SEC_READONLY))
3412 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3413 return FALSE;
3414
3415 return TRUE;
3416}
3417
3418/* Create dynamic sections when linking against a dynamic object. */
3419
3420static bfd_boolean
3421nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3422{
3423 struct elf_nds32_link_hash_table *htab;
3424 flagword flags, pltflags;
3425 register asection *s;
3426 const struct elf_backend_data *bed;
3427 int ptralign = 2; /* 32-bit */
3428
3429 bed = get_elf_backend_data (abfd);
3430
3431 htab = nds32_elf_hash_table (info);
3432
3433 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3434 .rel[a].bss sections. */
3435
3436 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3437 | SEC_LINKER_CREATED);
3438
3439 pltflags = flags;
3440 pltflags |= SEC_CODE;
3441 if (bed->plt_not_loaded)
3442 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3443 if (bed->plt_readonly)
3444 pltflags |= SEC_READONLY;
3445
3446 s = bfd_make_section (abfd, ".plt");
3447 htab->splt = s;
3448 if (s == NULL
3449 || !bfd_set_section_flags (abfd, s, pltflags)
3450 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3451 return FALSE;
3452
3453 if (bed->want_plt_sym)
3454 {
3455 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3456 .plt section. */
3457 struct bfd_link_hash_entry *bh = NULL;
3458 struct elf_link_hash_entry *h;
3459
3460 if (!(_bfd_generic_link_add_one_symbol
3461 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3462 (bfd_vma) 0, (const char *) NULL, FALSE,
3463 get_elf_backend_data (abfd)->collect, &bh)))
3464 return FALSE;
3465
3466 h = (struct elf_link_hash_entry *) bh;
3467 h->def_regular = 1;
3468 h->type = STT_OBJECT;
3469
3470 if (info->shared && !bfd_elf_link_record_dynamic_symbol (info, h))
3471 return FALSE;
3472 }
3473
3474 s = bfd_make_section (abfd,
3475 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3476 htab->srelplt = s;
3477 if (s == NULL
3478 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3479 || !bfd_set_section_alignment (abfd, s, ptralign))
3480 return FALSE;
3481
3482 if (htab->sgot == NULL && !create_got_section (abfd, info))
3483 return FALSE;
3484
3485 {
3486 const char *secname;
3487 char *relname;
3488 flagword secflags;
3489 asection *sec;
3490
3491 for (sec = abfd->sections; sec; sec = sec->next)
3492 {
3493 secflags = bfd_get_section_flags (abfd, sec);
3494 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3495 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3496 continue;
3497 secname = bfd_get_section_name (abfd, sec);
3498 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3499 strcpy (relname, ".rela");
3500 strcat (relname, secname);
3501 if (bfd_get_section_by_name (abfd, secname))
3502 continue;
3503 s = bfd_make_section (abfd, relname);
3504 if (s == NULL
3505 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3506 || !bfd_set_section_alignment (abfd, s, ptralign))
3507 return FALSE;
3508 }
3509 }
3510
3511 if (bed->want_dynbss)
3512 {
3513 /* The .dynbss section is a place to put symbols which are defined
3514 by dynamic objects, are referenced by regular objects, and are
3515 not functions. We must allocate space for them in the process
3516 image and use a R_*_COPY reloc to tell the dynamic linker to
3517 initialize them at run time. The linker script puts the .dynbss
3518 section into the .bss section of the final image. */
3519 s = bfd_make_section (abfd, ".dynbss");
3520 htab->sdynbss = s;
3521 if (s == NULL
3522 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3523 return FALSE;
3524 /* The .rel[a].bss section holds copy relocs. This section is not
3525 normally needed. We need to create it here, though, so that the
3526 linker will map it to an output section. We can't just create it
3527 only if we need it, because we will not know whether we need it
3528 until we have seen all the input files, and the first time the
3529 main linker code calls BFD after examining all the input files
3530 (size_dynamic_sections) the input sections have already been
3531 mapped to the output sections. If the section turns out not to
3532 be needed, we can discard it later. We will never need this
3533 section when generating a shared object, since they do not use
3534 copy relocs. */
3535 if (!info->shared)
3536 {
3537 s = bfd_make_section (abfd, (bed->default_use_rela_p
3538 ? ".rela.bss" : ".rel.bss"));
3539 htab->srelbss = s;
3540 if (s == NULL
3541 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3542 || !bfd_set_section_alignment (abfd, s, ptralign))
3543 return FALSE;
3544 }
3545 }
3546
3547 return TRUE;
3548}
3549
3550/* Copy the extra info we tack onto an elf_link_hash_entry. */
3551static void
3552nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3553 struct elf_link_hash_entry *dir,
3554 struct elf_link_hash_entry *ind)
3555{
3556 struct elf_nds32_link_hash_entry *edir, *eind;
3557
3558 edir = (struct elf_nds32_link_hash_entry *) dir;
3559 eind = (struct elf_nds32_link_hash_entry *) ind;
3560
3561 if (eind->dyn_relocs != NULL)
3562 {
3563 if (edir->dyn_relocs != NULL)
3564 {
3565 struct elf_nds32_dyn_relocs **pp;
3566 struct elf_nds32_dyn_relocs *p;
3567
3568 if (ind->root.type == bfd_link_hash_indirect)
3569 abort ();
3570
3571 /* Add reloc counts against the weak sym to the strong sym
3572 list. Merge any entries against the same section. */
3573 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3574 {
3575 struct elf_nds32_dyn_relocs *q;
3576
3577 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3578 if (q->sec == p->sec)
3579 {
3580 q->pc_count += p->pc_count;
3581 q->count += p->count;
3582 *pp = p->next;
3583 break;
3584 }
3585 if (q == NULL)
3586 pp = &p->next;
3587 }
3588 *pp = edir->dyn_relocs;
3589 }
3590
3591 edir->dyn_relocs = eind->dyn_relocs;
3592 eind->dyn_relocs = NULL;
3593 }
3594
3595 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3596}
3597\f
3598
3599/* Adjust a symbol defined by a dynamic object and referenced by a
3600 regular object. The current definition is in some section of the
3601 dynamic object, but we're not including those sections. We have to
3602 change the definition to something the rest of the link can
3603 understand. */
3604
3605static bfd_boolean
3606nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3607 struct elf_link_hash_entry *h)
3608{
3609 struct elf_nds32_link_hash_table *htab;
3610 struct elf_nds32_link_hash_entry *eh;
3611 struct elf_nds32_dyn_relocs *p;
3612 bfd *dynobj;
3613 asection *s;
3614 unsigned int power_of_two;
3615
3616 dynobj = elf_hash_table (info)->dynobj;
3617
3618 /* Make sure we know what is going on here. */
3619 BFD_ASSERT (dynobj != NULL
3620 && (h->needs_plt
3621 || h->u.weakdef != NULL
3622 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3623
3624
3625 /* If this is a function, put it in the procedure linkage table. We
3626 will fill in the contents of the procedure linkage table later,
3627 when we know the address of the .got section. */
3628 if (h->type == STT_FUNC || h->needs_plt)
3629 {
3630 if (!info->shared
3631 && !h->def_dynamic
3632 && !h->ref_dynamic
3633 && h->root.type != bfd_link_hash_undefweak
3634 && h->root.type != bfd_link_hash_undefined)
3635 {
3636 /* This case can occur if we saw a PLT reloc in an input
3637 file, but the symbol was never referred to by a dynamic
3638 object. In such a case, we don't actually need to build
3639 a procedure linkage table, and we can just do a PCREL
3640 reloc instead. */
3641 h->plt.offset = (bfd_vma) - 1;
3642 h->needs_plt = 0;
3643 }
3644
3645 return TRUE;
3646 }
3647 else
3648 h->plt.offset = (bfd_vma) - 1;
3649
3650 /* If this is a weak symbol, and there is a real definition, the
3651 processor independent code will have arranged for us to see the
3652 real definition first, and we can just use the same value. */
3653 if (h->u.weakdef != NULL)
3654 {
3655 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3656 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3657 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3658 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3659 return TRUE;
3660 }
3661
3662 /* This is a reference to a symbol defined by a dynamic object which
3663 is not a function. */
3664
3665 /* If we are creating a shared library, we must presume that the
3666 only references to the symbol are via the global offset table.
3667 For such cases we need not do anything here; the relocations will
3668 be handled correctly by relocate_section. */
3669 if (info->shared)
3670 return TRUE;
3671
3672 /* If there are no references to this symbol that do not use the
3673 GOT, we don't need to generate a copy reloc. */
3674 if (!h->non_got_ref)
3675 return TRUE;
3676
3677 /* If -z nocopyreloc was given, we won't generate them either. */
3678 if (info->nocopyreloc)
3679 {
3680 h->non_got_ref = 0;
3681 return TRUE;
3682 }
3683
3684 eh = (struct elf_nds32_link_hash_entry *) h;
3685 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3686 {
3687 s = p->sec->output_section;
3688 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3689 break;
3690 }
3691
3692 /* If we didn't find any dynamic relocs in sections which needs the
3693 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3694 the copy reloc. */
3695 if (p == NULL)
3696 {
3697 h->non_got_ref = 0;
3698 return TRUE;
3699 }
3700
3701 /* We must allocate the symbol in our .dynbss section, which will
3702 become part of the .bss section of the executable. There will be
3703 an entry for this symbol in the .dynsym section. The dynamic
3704 object will contain position independent code, so all references
3705 from the dynamic object to this symbol will go through the global
3706 offset table. The dynamic linker will use the .dynsym entry to
3707 determine the address it must put in the global offset table, so
3708 both the dynamic object and the regular object will refer to the
3709 same memory location for the variable. */
3710
3711 htab = nds32_elf_hash_table (info);
3712 s = htab->sdynbss;
3713 BFD_ASSERT (s != NULL);
3714
3715 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3716 to copy the initial value out of the dynamic object and into the
3717 runtime process image. We need to remember the offset into the
3718 .rela.bss section we are going to use. */
3719 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3720 {
3721 asection *srel;
3722
3723 srel = htab->srelbss;
3724 BFD_ASSERT (srel != NULL);
3725 srel->size += sizeof (Elf32_External_Rela);
3726 h->needs_copy = 1;
3727 }
3728
3729 /* We need to figure out the alignment required for this symbol. I
3730 have no idea how ELF linkers handle this. */
3731 power_of_two = bfd_log2 (h->size);
3732 if (power_of_two > 3)
3733 power_of_two = 3;
3734
3735 /* Apply the required alignment. */
3736 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3737 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3738 {
3739 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3740 return FALSE;
3741 }
3742
3743 /* Define the symbol as being at this point in the section. */
3744 h->root.u.def.section = s;
3745 h->root.u.def.value = s->size;
3746
3747 /* Increment the section size to make room for the symbol. */
3748 s->size += h->size;
3749
3750 return TRUE;
3751}
3752
3753/* Allocate space in .plt, .got and associated reloc sections for
3754 dynamic relocs. */
3755
3756static bfd_boolean
3757allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3758{
3759 struct bfd_link_info *info;
3760 struct elf_nds32_link_hash_table *htab;
3761 struct elf_nds32_link_hash_entry *eh;
3762 struct elf_nds32_dyn_relocs *p;
3763
3764 if (h->root.type == bfd_link_hash_indirect)
3765 return TRUE;
3766
3767 if (h->root.type == bfd_link_hash_warning)
3768 /* When warning symbols are created, they **replace** the "real"
3769 entry in the hash table, thus we never get to see the real
3770 symbol in a hash traversal. So look at it now. */
3771 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3772
3773 info = (struct bfd_link_info *) inf;
3774 htab = nds32_elf_hash_table (info);
3775
3776 eh = (struct elf_nds32_link_hash_entry *) h;
3777
3778 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3779 {
3780 /* Make sure this symbol is output as a dynamic symbol.
3781 Undefined weak syms won't yet be marked as dynamic. */
3782 if (h->dynindx == -1 && !h->forced_local)
3783 {
3784 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3785 return FALSE;
3786 }
3787
3788 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h))
3789 {
3790 asection *s = htab->splt;
3791
3792 /* If this is the first .plt entry, make room for the special
3793 first entry. */
3794 if (s->size == 0)
3795 s->size += PLT_ENTRY_SIZE;
3796
3797 h->plt.offset = s->size;
3798
3799 /* If this symbol is not defined in a regular file, and we are
3800 not generating a shared library, then set the symbol to this
3801 location in the .plt. This is required to make function
3802 pointers compare as equal between the normal executable and
3803 the shared library. */
3804 if (!info->shared && !h->def_regular)
3805 {
3806 h->root.u.def.section = s;
3807 h->root.u.def.value = h->plt.offset;
3808 }
3809
3810 /* Make room for this entry. */
3811 s->size += PLT_ENTRY_SIZE;
3812
3813 /* We also need to make an entry in the .got.plt section, which
3814 will be placed in the .got section by the linker script. */
3815 htab->sgotplt->size += 4;
3816
3817 /* We also need to make an entry in the .rel.plt section. */
3818 htab->srelplt->size += sizeof (Elf32_External_Rela);
3819 }
3820 else
3821 {
3822 h->plt.offset = (bfd_vma) - 1;
3823 h->needs_plt = 0;
3824 }
3825 }
3826 else
3827 {
3828 h->plt.offset = (bfd_vma) - 1;
3829 h->needs_plt = 0;
3830 }
3831
3832 if (h->got.refcount > 0)
3833 {
3834 asection *s;
3835 bfd_boolean dyn;
1c8f6a4d 3836 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC
3837
3838 /* Make sure this symbol is output as a dynamic symbol.
3839 Undefined weak syms won't yet be marked as dynamic. */
3840 if (h->dynindx == -1 && !h->forced_local)
3841 {
3842 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3843 return FALSE;
3844 }
3845
3846 s = htab->sgot;
35c08157 3847 h->got.offset = s->size;
1c8f6a4d
KLC
3848
3849 if (tls_type == GOT_UNKNOWN)
3850 abort ();
3851 else if (tls_type == GOT_NORMAL
3852 || tls_type == GOT_TLS_IE)
3853 /* Need a GOT slot. */
3854 s->size += 4;
3855
35c08157
KLC
3856 dyn = htab->root.dynamic_sections_created;
3857 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h))
3858 htab->srelgot->size += sizeof (Elf32_External_Rela);
3859 }
3860 else
3861 h->got.offset = (bfd_vma) - 1;
3862
3863 if (eh->dyn_relocs == NULL)
3864 return TRUE;
3865
3866 /* In the shared -Bsymbolic case, discard space allocated for
3867 dynamic pc-relative relocs against symbols which turn out to be
3868 defined in regular objects. For the normal shared case, discard
3869 space for pc-relative relocs that have become local due to symbol
3870 visibility changes. */
3871
3872 if (info->shared)
3873 {
3874 if (h->def_regular && (h->forced_local || info->symbolic))
3875 {
3876 struct elf_nds32_dyn_relocs **pp;
3877
3878 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3879 {
3880 p->count -= p->pc_count;
3881 p->pc_count = 0;
3882 if (p->count == 0)
3883 *pp = p->next;
3884 else
3885 pp = &p->next;
3886 }
3887 }
3888 }
3889 else
3890 {
3891 /* For the non-shared case, discard space for relocs against
3892 symbols which turn out to need copy relocs or are not dynamic. */
3893
3894 if (!h->non_got_ref
3895 && ((h->def_dynamic
3896 && !h->def_regular)
3897 || (htab->root.dynamic_sections_created
3898 && (h->root.type == bfd_link_hash_undefweak
3899 || h->root.type == bfd_link_hash_undefined))))
3900 {
3901 /* Make sure this symbol is output as a dynamic symbol.
3902 Undefined weak syms won't yet be marked as dynamic. */
3903 if (h->dynindx == -1 && !h->forced_local)
3904 {
3905 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3906 return FALSE;
3907 }
3908
3909 /* If that succeeded, we know we'll be keeping all the
3910 relocs. */
3911 if (h->dynindx != -1)
3912 goto keep;
3913 }
3914
3915 eh->dyn_relocs = NULL;
3916
3917 keep:;
3918 }
3919
3920 /* Finally, allocate space. */
3921 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3922 {
3923 asection *sreloc = elf_section_data (p->sec)->sreloc;
3924 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3925 }
3926
3927 return TRUE;
3928}
3929
3930/* Find any dynamic relocs that apply to read-only sections. */
3931
3932static bfd_boolean
3933readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3934{
3935 struct elf_nds32_link_hash_entry *eh;
3936 struct elf_nds32_dyn_relocs *p;
3937
3938 if (h->root.type == bfd_link_hash_warning)
3939 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3940
3941 eh = (struct elf_nds32_link_hash_entry *) h;
3942 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3943 {
3944 asection *s = p->sec->output_section;
3945
3946 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3947 {
3948 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3949
3950 info->flags |= DF_TEXTREL;
3951
3952 /* Not an error, just cut short the traversal. */
3953 return FALSE;
3954 }
3955 }
3956 return TRUE;
3957}
3958
3959/* Set the sizes of the dynamic sections. */
3960
3961static bfd_boolean
3962nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3963 struct bfd_link_info *info)
3964{
3965 struct elf_nds32_link_hash_table *htab;
3966 bfd *dynobj;
3967 asection *s;
3968 bfd_boolean relocs;
3969 bfd *ibfd;
3970
3971 htab = nds32_elf_hash_table (info);
3972 dynobj = htab->root.dynobj;
3973 BFD_ASSERT (dynobj != NULL);
3974
3975 if (htab->root.dynamic_sections_created)
3976 {
3977 /* Set the contents of the .interp section to the interpreter. */
3978 if (!info->shared)
3979 {
3980 s = bfd_get_section_by_name (dynobj, ".interp");
3981 BFD_ASSERT (s != NULL);
3982 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3983 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3984 }
3985 }
3986
3987 /* Set up .got offsets for local syms, and space for local dynamic
3988 relocs. */
c72f2fb2 3989 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC
3990 {
3991 bfd_signed_vma *local_got;
3992 bfd_signed_vma *end_local_got;
3993 bfd_size_type locsymcount;
3994 Elf_Internal_Shdr *symtab_hdr;
3995 asection *srel;
3996
3997 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3998 continue;
3999
4000 for (s = ibfd->sections; s != NULL; s = s->next)
4001 {
4002 struct elf_nds32_dyn_relocs *p;
4003
4004 for (p = ((struct elf_nds32_dyn_relocs *)
4005 elf_section_data (s)->local_dynrel);
4006 p != NULL; p = p->next)
4007 {
4008 if (!bfd_is_abs_section (p->sec)
4009 && bfd_is_abs_section (p->sec->output_section))
4010 {
4011 /* Input section has been discarded, either because
4012 it is a copy of a linkonce section or due to
4013 linker script /DISCARD/, so we'll be discarding
4014 the relocs too. */
4015 }
4016 else if (p->count != 0)
4017 {
4018 srel = elf_section_data (p->sec)->sreloc;
4019 srel->size += p->count * sizeof (Elf32_External_Rela);
4020 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4021 info->flags |= DF_TEXTREL;
4022 }
4023 }
4024 }
4025
4026 local_got = elf_local_got_refcounts (ibfd);
4027 if (!local_got)
4028 continue;
4029
4030 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4031 locsymcount = symtab_hdr->sh_info;
4032 end_local_got = local_got + locsymcount;
4033 s = htab->sgot;
4034 srel = htab->srelgot;
4035 for (; local_got < end_local_got; ++local_got)
4036 {
4037 if (*local_got > 0)
4038 {
4039 *local_got = s->size;
4040 s->size += 4;
4041 if (info->shared)
4042 srel->size += sizeof (Elf32_External_Rela);
4043 }
4044 else
4045 *local_got = (bfd_vma) - 1;
4046 }
4047 }
4048
4049 /* Allocate global sym .plt and .got entries, and space for global
4050 sym dynamic relocs. */
4051 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4052
4053 /* We now have determined the sizes of the various dynamic sections.
4054 Allocate memory for them. */
4055 relocs = FALSE;
4056 for (s = dynobj->sections; s != NULL; s = s->next)
4057 {
4058 if ((s->flags & SEC_LINKER_CREATED) == 0)
4059 continue;
4060
4061 if (s == htab->splt)
4062 {
4063 /* Strip this section if we don't need it; see the
4064 comment below. */
4065 }
4066 else if (s == htab->sgot)
4067 {
4068 got_size += s->size;
4069 }
4070 else if (s == htab->sgotplt)
4071 {
4072 got_size += s->size;
4073 }
4074 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4075 {
4076 if (s->size != 0 && s != htab->srelplt)
4077 relocs = TRUE;
4078
4079 /* We use the reloc_count field as a counter if we need
4080 to copy relocs into the output file. */
4081 s->reloc_count = 0;
4082 }
4083 else
4084 {
4085 /* It's not one of our sections, so don't allocate space. */
4086 continue;
4087 }
4088
4089 if (s->size == 0)
4090 {
4091 /* If we don't need this section, strip it from the
4092 output file. This is mostly to handle .rela.bss and
4093 .rela.plt. We must create both sections in
4094 create_dynamic_sections, because they must be created
4095 before the linker maps input sections to output
4096 sections. The linker does that before
4097 adjust_dynamic_symbol is called, and it is that
4098 function which decides whether anything needs to go
4099 into these sections. */
4100 s->flags |= SEC_EXCLUDE;
4101 continue;
4102 }
4103
4104 /* Allocate memory for the section contents. We use bfd_zalloc
4105 here in case unused entries are not reclaimed before the
4106 section's contents are written out. This should not happen,
4107 but this way if it does, we get a R_NDS32_NONE reloc instead
4108 of garbage. */
4109 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4110 if (s->contents == NULL)
4111 return FALSE;
4112 }
4113
4114
4115 if (htab->root.dynamic_sections_created)
4116 {
4117 /* Add some entries to the .dynamic section. We fill in the
4118 values later, in nds32_elf_finish_dynamic_sections, but we
4119 must add the entries now so that we get the correct size for
4120 the .dynamic section. The DT_DEBUG entry is filled in by the
4121 dynamic linker and used by the debugger. */
4122#define add_dynamic_entry(TAG, VAL) \
4123 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4124
4125 if (!info->shared)
4126 {
4127 if (!add_dynamic_entry (DT_DEBUG, 0))
4128 return FALSE;
4129 }
4130
4131 if (htab->splt->size != 0)
4132 {
4133 if (!add_dynamic_entry (DT_PLTGOT, 0)
4134 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4135 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4136 || !add_dynamic_entry (DT_JMPREL, 0))
4137 return FALSE;
4138 }
4139
4140 if (relocs)
4141 {
4142 if (!add_dynamic_entry (DT_RELA, 0)
4143 || !add_dynamic_entry (DT_RELASZ, 0)
4144 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4145 return FALSE;
4146
4147 /* If any dynamic relocs apply to a read-only section,
4148 then we need a DT_TEXTREL entry. */
4149 if ((info->flags & DF_TEXTREL) == 0)
4150 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4151 (void *) info);
4152
4153 if ((info->flags & DF_TEXTREL) != 0)
4154 {
4155 if (!add_dynamic_entry (DT_TEXTREL, 0))
4156 return FALSE;
4157 }
4158 }
4159 }
4160#undef add_dynamic_entry
4161
4162 return TRUE;
4163}
4164
4165static bfd_reloc_status_type
4166nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4167 bfd_vma relocation, bfd_byte *location)
4168{
4169 int size;
4170 bfd_vma x = 0;
4171 bfd_reloc_status_type flag;
4172 unsigned int rightshift = howto->rightshift;
4173 unsigned int bitpos = howto->bitpos;
4174
4175 /* If the size is negative, negate RELOCATION. This isn't very
4176 general. */
4177 if (howto->size < 0)
4178 relocation = -relocation;
4179
4180 /* Get the value we are going to relocate. */
4181 size = bfd_get_reloc_size (howto);
4182 switch (size)
4183 {
4184 default:
4185 case 0:
4186 case 1:
4187 case 8:
4188 abort ();
4189 break;
4190 case 2:
4191 x = bfd_getb16 (location);
4192 break;
4193 case 4:
4194 x = bfd_getb32 (location);
4195 break;
4196 }
4197
4198 /* Check for overflow. FIXME: We may drop bits during the addition
4199 which we don't check for. We must either check at every single
4200 operation, which would be tedious, or we must do the computations
4201 in a type larger than bfd_vma, which would be inefficient. */
4202 flag = bfd_reloc_ok;
4203 if (howto->complain_on_overflow != complain_overflow_dont)
4204 {
4205 bfd_vma addrmask, fieldmask, signmask, ss;
4206 bfd_vma a, b, sum;
4207
4208 /* Get the values to be added together. For signed and unsigned
4209 relocations, we assume that all values should be truncated to
4210 the size of an address. For bitfields, all the bits matter.
4211 See also bfd_check_overflow. */
4212 fieldmask = N_ONES (howto->bitsize);
4213 signmask = ~fieldmask;
4214 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4215 a = (relocation & addrmask) >> rightshift;
4216 b = (x & howto->src_mask & addrmask) >> bitpos;
4217
4218 switch (howto->complain_on_overflow)
4219 {
4220 case complain_overflow_signed:
4221 /* If any sign bits are set, all sign bits must be set.
4222 That is, A must be a valid negative address after
4223 shifting. */
4224 signmask = ~(fieldmask >> 1);
4225 /* Fall through. */
4226
4227 case complain_overflow_bitfield:
4228 /* Much like the signed check, but for a field one bit
4229 wider. We allow a bitfield to represent numbers in the
4230 range -2**n to 2**n-1, where n is the number of bits in the
4231 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4232 can't overflow, which is exactly what we want. */
4233 ss = a & signmask;
4234 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4235 flag = bfd_reloc_overflow;
4236
4237 /* We only need this next bit of code if the sign bit of B
4238 is below the sign bit of A. This would only happen if
4239 SRC_MASK had fewer bits than BITSIZE. Note that if
4240 SRC_MASK has more bits than BITSIZE, we can get into
4241 trouble; we would need to verify that B is in range, as
4242 we do for A above. */
4243 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4244 ss >>= bitpos;
4245
4246 /* Set all the bits above the sign bit. */
4247 b = (b ^ ss) - ss;
4248
4249 /* Now we can do the addition. */
4250 sum = a + b;
4251
4252 /* See if the result has the correct sign. Bits above the
4253 sign bit are junk now; ignore them. If the sum is
4254 positive, make sure we did not have all negative inputs;
4255 if the sum is negative, make sure we did not have all
4256 positive inputs. The test below looks only at the sign
4257 bits, and it really just
4258 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4259
4260 We mask with addrmask here to explicitly allow an address
4261 wrap-around. The Linux kernel relies on it, and it is
4262 the only way to write assembler code which can run when
4263 loaded at a location 0x80000000 away from the location at
4264 which it is linked. */
4265 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4266 flag = bfd_reloc_overflow;
4267
4268 break;
4269
4270 case complain_overflow_unsigned:
4271 /* Checking for an unsigned overflow is relatively easy:
4272 trim the addresses and add, and trim the result as well.
4273 Overflow is normally indicated when the result does not
4274 fit in the field. However, we also need to consider the
4275 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4276 input is 0x80000000, and bfd_vma is only 32 bits; then we
4277 will get sum == 0, but there is an overflow, since the
4278 inputs did not fit in the field. Instead of doing a
4279 separate test, we can check for this by or-ing in the
4280 operands when testing for the sum overflowing its final
4281 field. */
4282 sum = (a + b) & addrmask;
4283 if ((a | b | sum) & signmask)
4284 flag = bfd_reloc_overflow;
4285 break;
4286
4287 default:
4288 abort ();
4289 }
4290 }
4291
4292 /* Put RELOCATION in the right bits. */
4293 relocation >>= (bfd_vma) rightshift;
4294 relocation <<= (bfd_vma) bitpos;
4295
4296 /* Add RELOCATION to the right bits of X. */
4297 /* FIXME : 090616
4298 Because the relaxation may generate duplicate relocation at one address,
4299 an addition to immediate in the instruction may cause the relocation added
4300 several times.
4301 This bug should be fixed in assembler, but a check is also needed here. */
4302 if (howto->partial_inplace)
4303 x = ((x & ~howto->dst_mask)
4304 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4305 else
4306 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4307
4308
4309 /* Put the relocated value back in the object file. */
4310 switch (size)
4311 {
4312 default:
4313 case 0:
4314 case 1:
4315 case 8:
4316 abort ();
4317 break;
4318 case 2:
4319 bfd_putb16 (x, location);
4320 break;
4321 case 4:
4322 bfd_putb32 (x, location);
4323 break;
4324 }
4325
4326 return flag;
4327}
4328
4329static bfd_reloc_status_type
4330nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4331 asection *input_section, bfd_byte *contents,
4332 bfd_vma address, bfd_vma value, bfd_vma addend)
4333{
4334 bfd_vma relocation;
4335
4336 /* Sanity check the address. */
4337 if (address > bfd_get_section_limit (input_bfd, input_section))
4338 return bfd_reloc_outofrange;
4339
4340 /* This function assumes that we are dealing with a basic relocation
4341 against a symbol. We want to compute the value of the symbol to
4342 relocate to. This is just VALUE, the value of the symbol, plus
4343 ADDEND, any addend associated with the reloc. */
4344 relocation = value + addend;
4345
4346 /* If the relocation is PC relative, we want to set RELOCATION to
4347 the distance between the symbol (currently in RELOCATION) and the
4348 location we are relocating. Some targets (e.g., i386-aout)
4349 arrange for the contents of the section to be the negative of the
4350 offset of the location within the section; for such targets
4351 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4352 simply leave the contents of the section as zero; for such
4353 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4354 need to subtract out the offset of the location within the
4355 section (which is just ADDRESS). */
4356 if (howto->pc_relative)
4357 {
4358 relocation -= (input_section->output_section->vma
4359 + input_section->output_offset);
4360 if (howto->pcrel_offset)
4361 relocation -= address;
4362 }
4363
4364 return nds32_relocate_contents (howto, input_bfd, relocation,
4365 contents + address);
4366}
4367
4368static bfd_boolean
4369nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4370 const char *name,
4371 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4372 asection *input_sec,
4373 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4374{
4375 const char *source;
4376 FILE *sym_ld_script = NULL;
4377 struct elf_nds32_link_hash_table *table;
4378
4379 table = nds32_elf_hash_table (info);
4380 sym_ld_script = table->sym_ld_script;
4381 if (!sym_ld_script)
4382 return TRUE;
4383
4384 if (!h || !name || *name == '\0')
4385 return TRUE;
4386
4387 if (input_sec->flags & SEC_EXCLUDE)
4388 return TRUE;
4389
4390 if (!check_start_export_sym)
4391 {
4392 fprintf (sym_ld_script, "SECTIONS\n{\n");
4393 check_start_export_sym = 1;
4394 }
4395
4396 if (h->root.type == bfd_link_hash_defined
4397 || h->root.type == bfd_link_hash_defweak)
4398 {
4399 if (!h->root.u.def.section->output_section)
4400 return TRUE;
4401
4402 if (bfd_is_const_section (input_sec))
4403 source = input_sec->name;
4404 else
4405 source = input_sec->owner->filename;
4406
4407 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4408 h->root.root.string,
4409 (long) (h->root.u.def.value
4410 + h->root.u.def.section->output_section->vma
4411 + h->root.u.def.section->output_offset), source);
4412 }
4413
4414 return TRUE;
4415}
4416
4417/* Relocate an NDS32/D ELF section.
4418 There is some attempt to make this function usable for many architectures,
4419 both for RELA and REL type relocs, if only to serve as a learning tool.
4420
4421 The RELOCATE_SECTION function is called by the new ELF backend linker
4422 to handle the relocations for a section.
4423
4424 The relocs are always passed as Rela structures; if the section
4425 actually uses Rel structures, the r_addend field will always be
4426 zero.
4427
4428 This function is responsible for adjust the section contents as
4429 necessary, and (if using Rela relocs and generating a
4430 relocatable output file) adjusting the reloc addend as
4431 necessary.
4432
4433 This function does not have to worry about setting the reloc
4434 address or the reloc symbol index.
4435
4436 LOCAL_SYMS is a pointer to the swapped in local symbols.
4437
4438 LOCAL_SECTIONS is an array giving the section in the input file
4439 corresponding to the st_shndx field of each local symbol.
4440
4441 The global hash table entry for the global symbols can be found
4442 via elf_sym_hashes (input_bfd).
4443
4444 When generating relocatable output, this function must handle
4445 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4446 going to be the section symbol corresponding to the output
4447 section, which means that the addend must be adjusted
4448 accordingly. */
4449
1c8f6a4d
KLC
4450static bfd_vma
4451dtpoff_base (struct bfd_link_info *info)
4452{
4453 /* If tls_sec is NULL, we should have signalled an error already. */
4454 if (elf_hash_table (info)->tls_sec == NULL)
4455 return 0;
4456 return elf_hash_table (info)->tls_sec->vma;
4457}
4458
35c08157
KLC
4459static bfd_boolean
4460nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4461 struct bfd_link_info * info,
4462 bfd * input_bfd,
4463 asection * input_section,
4464 bfd_byte * contents,
4465 Elf_Internal_Rela * relocs,
4466 Elf_Internal_Sym * local_syms,
4467 asection ** local_sections)
4468{
4469 Elf_Internal_Shdr *symtab_hdr;
4470 struct elf_link_hash_entry **sym_hashes;
4471 Elf_Internal_Rela *rel, *relend;
4472 bfd_boolean ret = TRUE; /* Assume success. */
4473 int align = 0;
4474 bfd_reloc_status_type r;
4475 const char *errmsg = NULL;
4476 bfd_vma gp;
4477 struct elf_nds32_link_hash_table *htab;
4478 bfd *dynobj;
4479 bfd_vma *local_got_offsets;
4480 asection *sgot, *splt, *sreloc;
4481 bfd_vma high_address;
4482 struct elf_nds32_link_hash_table *table;
4483 int eliminate_gc_relocs;
4484 bfd_vma fpbase_addr;
4485
4486 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4487 sym_hashes = elf_sym_hashes (input_bfd);
4488 htab = nds32_elf_hash_table (info);
4489 high_address = bfd_get_section_limit (input_bfd, input_section);
4490
4491 dynobj = htab->root.dynobj;
4492 local_got_offsets = elf_local_got_offsets (input_bfd);
4493
4494 sgot = htab->sgot;
4495 splt = htab->splt;
4496 sreloc = NULL;
4497
4498 rel = relocs;
4499 relend = relocs + input_section->reloc_count;
4500
4501 table = nds32_elf_hash_table (info);
4502 eliminate_gc_relocs = table->eliminate_gc_relocs;
4503 /* By this time, we can adjust the value of _SDA_BASE_. */
4504 if ((!info->relocatable))
4505 {
4506 is_SDA_BASE_set = 1;
4507 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4508 if (r != bfd_reloc_ok)
4509 return FALSE;
4510 }
4511
1c8f6a4d
KLC
4512 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4513 if (!nds32_elf_ifc_reloc ())
4514 (*_bfd_error_handler) (_("error: IFC relocation error."));
4515
4516 /* Relocation for .ex9.itable. */
4517 if (table->target_optimize & NDS32_RELAX_EX9_ON
4518 || (table->ex9_import_file && table->update_ex9_table))
4519 nds32_elf_ex9_reloc_jmp (info);
4520
35c08157
KLC
4521 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4522 the fp value is set as gp, and it has be reverted for instruction
4523 setting fp. */
4524 fpbase_addr = elf_gp (output_bfd);
4525
4526 for (rel = relocs; rel < relend; rel++)
4527 {
4528 enum elf_nds32_reloc_type r_type;
4529 reloc_howto_type *howto = NULL;
4530 unsigned long r_symndx;
4531 struct elf_link_hash_entry *h = NULL;
4532 Elf_Internal_Sym *sym = NULL;
4533 asection *sec;
4534 bfd_vma relocation;
4535
4536 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4537 ensure it's zero (we use REL relocs, not RELA). Therefore this
4538 should be assigning zero to `addend', but for clarity we use
4539 `r_addend'. */
4540
4541 bfd_vma addend = rel->r_addend;
4542 bfd_vma offset = rel->r_offset;
4543
4544 r_type = ELF32_R_TYPE (rel->r_info);
4545 if (r_type >= R_NDS32_max)
4546 {
4547 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4548 input_bfd, r_type);
4549 bfd_set_error (bfd_error_bad_value);
4550 ret = FALSE;
4551 continue;
4552 }
4553
4554 if (r_type == R_NDS32_GNU_VTENTRY
4555 || r_type == R_NDS32_GNU_VTINHERIT
4556 || r_type == R_NDS32_NONE
4557 || r_type == R_NDS32_RELA_GNU_VTENTRY
4558 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4559 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4560 || r_type == R_NDS32_DATA
1c8f6a4d
KLC
4561 || r_type == R_NDS32_TRAN
4562 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP6))
35c08157
KLC
4563 continue;
4564
4565 /* If we enter the fp-as-gp region. Resolve the address of best fp-base. */
4566 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4567 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4568 {
4569 int dist;
4570
4571 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4572 dist = rel->r_addend >> 16;
4573 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4574 local_syms, symtab_hdr);
4575 }
4576 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4577 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4578 {
4579 fpbase_addr = elf_gp (output_bfd);
4580 }
4581
4582 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4583 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4584 || r_type >= R_NDS32_RELAX_ENTRY) && !info->relocatable)
4585 continue;
4586
4587 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4588 r_symndx = ELF32_R_SYM (rel->r_info);
4589
4590 /* This is a final link. */
4591 sym = NULL;
4592 sec = NULL;
4593 h = NULL;
4594
4595 if (r_symndx < symtab_hdr->sh_info)
4596 {
4597 /* Local symbol. */
4598 sym = local_syms + r_symndx;
4599 sec = local_sections[r_symndx];
4600
4601 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4602 addend = rel->r_addend;
4603 }
4604 else
4605 {
4606 /* External symbol. */
4607 bfd_boolean warned, ignored, unresolved_reloc;
4608 int symndx = r_symndx - symtab_hdr->sh_info;
4609
4610 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4611 r_symndx, symtab_hdr, sym_hashes, h, sec,
4612 relocation, unresolved_reloc, warned,
4613 ignored);
4614
4615 /* la $fp, _FP_BASE_ is per-function (region).
4616 Handle it specially. */
4617 switch ((int) r_type)
4618 {
4619 case R_NDS32_SDA19S0_RELA:
4620 case R_NDS32_SDA15S0_RELA:
4621 case R_NDS32_20_RELA:
4622 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4623 FP_BASE_NAME) == 0)
4624 {
4625 relocation = fpbase_addr;
4626 break;
4627 }
4628 }
4629
4630 }
4631
4632 if (info->relocatable)
4633 {
4634 /* This is a relocatable link. We don't have to change
4635 anything, unless the reloc is against a section symbol,
4636 in which case we have to adjust according to where the
4637 section symbol winds up in the output section. */
4638 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4639 rel->r_addend += sec->output_offset + sym->st_value;
4640
4641 continue;
4642 }
4643
4644 /* Sanity check the address. */
4645 if (offset > high_address)
4646 {
4647 r = bfd_reloc_outofrange;
4648 goto check_reloc;
4649 }
4650
4651 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4652 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4653 || r_type >= R_NDS32_RELAX_ENTRY)
4654 continue;
4655
4656 switch ((int) r_type)
4657 {
4658 case R_NDS32_GOTOFF:
4659 /* Relocation is relative to the start of the global offset
4660 table (for ld24 rx, #uimm24), e.g. access at label+addend
4661
4662 ld24 rx. #label@GOTOFF + addend
4663 sub rx, r12. */
4664 case R_NDS32_GOTOFF_HI20:
4665 case R_NDS32_GOTOFF_LO12:
4666 case R_NDS32_GOTOFF_LO15:
4667 case R_NDS32_GOTOFF_LO19:
4668 BFD_ASSERT (sgot != NULL);
4669
4670 relocation -= elf_gp (output_bfd);
4671 break;
4672
4673 case R_NDS32_9_PLTREL:
4674 case R_NDS32_25_PLTREL:
4675 /* Relocation is to the entry for this symbol in the
4676 procedure linkage table. */
4677
4678 /* The native assembler will generate a 25_PLTREL reloc
4679 for a local symbol if you assemble a call from one
4680 section to another when using -K pic. */
4681 if (h == NULL)
4682 break;
4683
4684 if (h->forced_local)
4685 break;
4686
4687 /* We didn't make a PLT entry for this symbol. This
4688 happens when statically linking PIC code, or when
4689 using -Bsymbolic. */
4690 if (h->plt.offset == (bfd_vma) - 1)
4691 break;
4692
4693 relocation = (splt->output_section->vma
4694 + splt->output_offset + h->plt.offset);
4695 break;
4696
4697 case R_NDS32_PLT_GOTREL_HI20:
4698 case R_NDS32_PLT_GOTREL_LO12:
4699 case R_NDS32_PLT_GOTREL_LO15:
4700 case R_NDS32_PLT_GOTREL_LO19:
4701 case R_NDS32_PLT_GOTREL_LO20:
4702 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4703 {
4704 /* We didn't make a PLT entry for this symbol. This
4705 happens when statically linking PIC code, or when
4706 using -Bsymbolic. */
4707 relocation -= elf_gp (output_bfd);
4708 break;
4709 }
4710
4711 relocation = (splt->output_section->vma
4712 + splt->output_offset + h->plt.offset);
4713
4714 relocation -= elf_gp (output_bfd);
4715 break;
4716
4717 case R_NDS32_PLTREL_HI20:
4718 case R_NDS32_PLTREL_LO12:
4719
4720 /* Relocation is to the entry for this symbol in the
4721 procedure linkage table. */
4722
4723 /* The native assembler will generate a 25_PLTREL reloc
4724 for a local symbol if you assemble a call from one
4725 section to another when using -K pic. */
4726 if (h == NULL)
4727 break;
4728
4729 if (h->forced_local)
4730 break;
4731
4732 if (h->plt.offset == (bfd_vma) - 1)
4733 /* We didn't make a PLT entry for this symbol. This
4734 happens when statically linking PIC code, or when
4735 using -Bsymbolic. */
4736 break;
4737
4738 if (splt == NULL)
4739 break;
4740
4741 relocation = (splt->output_section->vma
4742 + splt->output_offset
4743 + h->plt.offset + 4)
4744 - (input_section->output_section->vma
4745 + input_section->output_offset
4746 + rel->r_offset);
4747
4748 break;
4749
4750 case R_NDS32_GOTPC20:
4751 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4752 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4753 relocation = elf_gp (output_bfd);
4754 break;
4755
4756 case R_NDS32_GOTPC_HI20:
4757 case R_NDS32_GOTPC_LO12:
4758 {
4759 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4760 bl .+4
4761 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4762 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4763 or
4764 bl .+4
4765 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4766 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4767 */
4768 relocation = elf_gp (output_bfd);
4769 relocation -= (input_section->output_section->vma
4770 + input_section->output_offset + rel->r_offset);
4771 break;
4772 }
4773
4774 case R_NDS32_GOT20:
4775 /* Fall through. */
4776 case R_NDS32_GOT_HI20:
4777 case R_NDS32_GOT_LO12:
4778 case R_NDS32_GOT_LO15:
4779 case R_NDS32_GOT_LO19:
4780 /* Relocation is to the entry for this symbol in the global
4781 offset table. */
4782 BFD_ASSERT (sgot != NULL);
4783
4784 if (h != NULL)
4785 {
4786 bfd_boolean dyn;
4787 bfd_vma off;
4788
4789 off = h->got.offset;
4790 BFD_ASSERT (off != (bfd_vma) - 1);
4791 dyn = htab->root.dynamic_sections_created;
4792 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
4793 || (info->shared
4794 && (info->symbolic
4795 || h->dynindx == -1
4796 || h->forced_local) && h->def_regular))
4797 {
4798 /* This is actually a static link, or it is a
4799 -Bsymbolic link and the symbol is defined
4800 locally, or the symbol was forced to be local
4801 because of a version file. We must initialize
4802 this entry in the global offset table. Since the
4803 offset must always be a multiple of 4, we use the
4804 least significant bit to record whether we have
4805 initialized it already.
4806
4807 When doing a dynamic link, we create a .rela.got
4808 relocation entry to initialize the value. This
4809 is done in the finish_dynamic_symbol routine. */
4810 if ((off & 1) != 0)
4811 off &= ~1;
4812 else
4813 {
4814 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4815 h->got.offset |= 1;
4816 }
4817 }
4818 relocation = sgot->output_section->vma + sgot->output_offset + off
4819 - elf_gp (output_bfd);
4820 }
4821 else
4822 {
4823 bfd_vma off;
4824 bfd_byte *loc;
4825
4826 BFD_ASSERT (local_got_offsets != NULL
4827 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4828
4829 off = local_got_offsets[r_symndx];
4830
4831 /* The offset must always be a multiple of 4. We use
4832 the least significant bit to record whether we have
4833 already processed this entry. */
4834 if ((off & 1) != 0)
4835 off &= ~1;
4836 else
4837 {
4838 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4839
4840 if (info->shared)
4841 {
4842 asection *srelgot;
4843 Elf_Internal_Rela outrel;
4844
4845 /* We need to generate a R_NDS32_RELATIVE reloc
4846 for the dynamic linker. */
4847 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4848 BFD_ASSERT (srelgot != NULL);
4849
4850 outrel.r_offset = (elf_gp (output_bfd)
4851 + sgot->output_offset + off);
4852 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4853 outrel.r_addend = relocation;
4854 loc = srelgot->contents;
4855 loc +=
4856 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4857 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4858 ++srelgot->reloc_count;
4859 }
4860 local_got_offsets[r_symndx] |= 1;
4861 }
4862 relocation = sgot->output_section->vma + sgot->output_offset + off
4863 - elf_gp (output_bfd);
4864 }
4865
4866 break;
4867
4868 case R_NDS32_16_RELA:
4869 case R_NDS32_20_RELA:
4870 case R_NDS32_5_RELA:
4871 case R_NDS32_32_RELA:
4872 case R_NDS32_9_PCREL_RELA:
4873 case R_NDS32_WORD_9_PCREL_RELA:
4874 case R_NDS32_10_UPCREL_RELA:
4875 case R_NDS32_15_PCREL_RELA:
4876 case R_NDS32_17_PCREL_RELA:
4877 case R_NDS32_25_PCREL_RELA:
4878 case R_NDS32_HI20_RELA:
4879 case R_NDS32_LO12S3_RELA:
4880 case R_NDS32_LO12S2_RELA:
4881 case R_NDS32_LO12S2_DP_RELA:
4882 case R_NDS32_LO12S2_SP_RELA:
4883 case R_NDS32_LO12S1_RELA:
4884 case R_NDS32_LO12S0_RELA:
4885 case R_NDS32_LO12S0_ORI_RELA:
4886 if (info->shared && r_symndx != 0
4887 && (input_section->flags & SEC_ALLOC) != 0
4888 && (eliminate_gc_relocs == 0
4889 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4890 && ((r_type != R_NDS32_9_PCREL_RELA
4891 && r_type != R_NDS32_WORD_9_PCREL_RELA
4892 && r_type != R_NDS32_10_UPCREL_RELA
4893 && r_type != R_NDS32_15_PCREL_RELA
4894 && r_type != R_NDS32_17_PCREL_RELA
4895 && r_type != R_NDS32_25_PCREL_RELA
4896 && !(r_type == R_NDS32_32_RELA
4897 && strcmp (input_section->name, ".eh_frame") == 0))
4898 || (h != NULL && h->dynindx != -1
4899 && (!info->symbolic || !h->def_regular))))
4900 {
4901 Elf_Internal_Rela outrel;
4902 bfd_boolean skip, relocate;
4903 bfd_byte *loc;
4904
4905 /* When generating a shared object, these relocations
4906 are copied into the output file to be resolved at run
4907 time. */
4908
4909 if (sreloc == NULL)
4910 {
4911 const char *name;
4912
4913 name = bfd_elf_string_from_elf_section
4914 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4915 elf_section_data (input_section)->rela.hdr->sh_name);
4916 if (name == NULL)
4917 return FALSE;
4918
4919 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4920 && strcmp (bfd_get_section_name (input_bfd,
4921 input_section),
4922 name + 5) == 0);
4923
4924 sreloc = bfd_get_section_by_name (dynobj, name);
4925 BFD_ASSERT (sreloc != NULL);
4926 }
4927
4928 skip = FALSE;
4929 relocate = FALSE;
4930
4931 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4932 info,
4933 input_section,
4934 rel->r_offset);
4935 if (outrel.r_offset == (bfd_vma) - 1)
4936 skip = TRUE;
4937 else if (outrel.r_offset == (bfd_vma) - 2)
4938 skip = TRUE, relocate = TRUE;
4939 outrel.r_offset += (input_section->output_section->vma
4940 + input_section->output_offset);
4941
4942 if (skip)
4943 memset (&outrel, 0, sizeof outrel);
4944 else if (r_type == R_NDS32_17_PCREL_RELA
4945 || r_type == R_NDS32_15_PCREL_RELA
4946 || r_type == R_NDS32_25_PCREL_RELA)
4947 {
4948 BFD_ASSERT (h != NULL && h->dynindx != -1);
4949 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4950 outrel.r_addend = rel->r_addend;
4951 }
4952 else
4953 {
4954 /* h->dynindx may be -1 if this symbol was marked to
4955 become local. */
4956 if (h == NULL
4957 || ((info->symbolic || h->dynindx == -1)
4958 && h->def_regular))
4959 {
4960 relocate = TRUE;
4961 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4962 outrel.r_addend = relocation + rel->r_addend;
4963 }
4964 else
4965 {
4966 BFD_ASSERT (h->dynindx != -1);
4967 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4968 outrel.r_addend = rel->r_addend;
4969 }
4970 }
4971
4972 loc = sreloc->contents;
4973 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4974 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4975 ++sreloc->reloc_count;
4976
4977 /* If this reloc is against an external symbol, we do
4978 not want to fiddle with the addend. Otherwise, we
4979 need to include the symbol value so that it becomes
4980 an addend for the dynamic reloc. */
4981 if (!relocate)
4982 continue;
4983 }
4984 break;
4985
4986 case R_NDS32_25_ABS_RELA:
4987 if (info->shared)
4988 {
4989 (*_bfd_error_handler)
1c8f6a4d
KLC
4990 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
4991 "mode."), bfd_get_filename (input_bfd));
35c08157
KLC
4992 return FALSE;
4993 }
4994 break;
4995
4996 case R_NDS32_9_PCREL:
4997 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4998 contents, offset,
4999 sec, relocation, addend);
5000 goto check_reloc;
5001
5002 case R_NDS32_HI20:
5003 {
5004 Elf_Internal_Rela *lorel;
5005
5006 /* We allow an arbitrary number of HI20 relocs before the
5007 LO12 reloc. This permits gcc to emit the HI and LO relocs
5008 itself. */
5009 for (lorel = rel + 1;
5010 (lorel < relend
5011 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5012 continue;
5013 if (lorel < relend
5014 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5015 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5016 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5017 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5018 {
5019 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5020 contents, relocation + addend);
5021 r = bfd_reloc_ok;
5022 }
5023 else
5024 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC
5025 contents, offset, relocation,
5026 addend);
35c08157
KLC
5027 }
5028
5029 goto check_reloc;
5030
5031 case R_NDS32_GOT17S2_RELA:
5032 case R_NDS32_GOT15S2_RELA:
5033 {
5034 bfd_vma off;
5035
5036 BFD_ASSERT (sgot != NULL);
5037
5038 if (h != NULL)
5039 {
5040 bfd_boolean dyn;
5041
5042 off = h->got.offset;
5043 BFD_ASSERT (off != (bfd_vma) - 1);
5044
5045 dyn = htab->root.dynamic_sections_created;
5046 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5047 (dyn, info->shared, h) || (info->shared
5048 && (info->symbolic
5049 || h->dynindx == -1
5050 || h->forced_local)
5051 && h->def_regular))
5052 {
5053 /* This is actually a static link, or it is a
5054 -Bsymbolic link and the symbol is defined
5055 locally, or the symbol was forced to be local
5056 because of a version file. We must initialize
5057 this entry in the global offset table. Since the
5058 offset must always be a multiple of 4, we use the
5059 least significant bit to record whether we have
5060 initialized it already.
5061
5062 When doing a dynamic link, we create a .rela.got
5063 relocation entry to initialize the value. This
5064 is done in the finish_dynamic_symbol routine. */
5065 if ((off & 1) != 0)
5066 off &= ~1;
5067 else
5068 {
5069 bfd_put_32 (output_bfd, relocation,
5070 sgot->contents + off);
5071 h->got.offset |= 1;
5072 }
5073 }
5074 }
5075 else
5076 {
5077 bfd_byte *loc;
5078
5079 BFD_ASSERT (local_got_offsets != NULL
5080 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5081
5082 off = local_got_offsets[r_symndx];
5083
5084 /* The offset must always be a multiple of 4. We use
5085 the least significant bit to record whether we have
5086 already processed this entry. */
5087 if ((off & 1) != 0)
5088 off &= ~1;
5089 else
5090 {
5091 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5092
5093 if (info->shared)
5094 {
5095 asection *srelgot;
5096 Elf_Internal_Rela outrel;
5097
5098 /* We need to generate a R_NDS32_RELATIVE reloc
5099 for the dynamic linker. */
5100 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5101 BFD_ASSERT (srelgot != NULL);
5102
5103 outrel.r_offset = (elf_gp (output_bfd)
5104 + sgot->output_offset + off);
5105 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5106 outrel.r_addend = relocation;
5107 loc = srelgot->contents;
5108 loc +=
5109 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5110 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5111 ++srelgot->reloc_count;
5112 }
5113 local_got_offsets[r_symndx] |= 1;
5114 }
5115 }
5116 relocation = sgot->output_section->vma + sgot->output_offset + off
5117 - elf_gp (output_bfd);
5118 }
5119 if (relocation & align)
5120 {
5121 /* Incorrect alignment. */
5122 (*_bfd_error_handler)
5123 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5124 ret = FALSE;
5125 r = bfd_reloc_dangerous;
5126 goto check_reloc;
5127 }
5128 break;
5129
5130 case R_NDS32_SDA16S3_RELA:
5131 case R_NDS32_SDA15S3_RELA:
5132 case R_NDS32_SDA15S3:
5133 align = 0x7;
5134 goto handle_sda;
5135
5136 case R_NDS32_SDA17S2_RELA:
5137 case R_NDS32_SDA15S2_RELA:
5138 case R_NDS32_SDA12S2_SP_RELA:
5139 case R_NDS32_SDA12S2_DP_RELA:
5140 case R_NDS32_SDA15S2:
5141 case R_NDS32_SDA_FP7U2_RELA:
5142 align = 0x3;
5143 goto handle_sda;
5144
5145 case R_NDS32_SDA18S1_RELA:
5146 case R_NDS32_SDA15S1_RELA:
5147 case R_NDS32_SDA15S1:
5148 align = 0x1;
5149 goto handle_sda;
5150
5151 case R_NDS32_SDA19S0_RELA:
5152 case R_NDS32_SDA15S0_RELA:
5153 case R_NDS32_SDA15S0:
5154 {
5155 align = 0x0;
5156handle_sda:
5157 BFD_ASSERT (sec != NULL);
5158
5159 /* If the symbol is in the abs section, the out_bfd will be null.
5160 This happens when the relocation has a symbol@GOTOFF. */
5161 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5162 if (r != bfd_reloc_ok)
5163 {
5164 (*_bfd_error_handler)
5165 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5166 ret = FALSE;
5167 goto check_reloc;
5168 }
5169
5170 /* At this point `relocation' contains the object's
5171 address. */
5172 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5173 {
5174 relocation -= fpbase_addr;
5175 }
5176 else
5177 relocation -= gp;
5178 /* Now it contains the offset from _SDA_BASE_. */
5179
5180 /* Make sure alignment is correct. */
5181
5182 if (relocation & align)
5183 {
5184 /* Incorrect alignment. */
5185 (*_bfd_error_handler)
5186 (_("%B(%A): warning: unaligned small data access of type %d."),
5187 input_bfd, input_section, r_type);
5188 ret = FALSE;
5189 goto check_reloc;
5190 }
5191 }
5192
5193 break;
5194 case R_NDS32_17IFC_PCREL_RELA:
5195 case R_NDS32_10IFCU_PCREL_RELA:
5196 /* do nothing */
5197 break;
5198
1c8f6a4d
KLC
5199 case R_NDS32_TLS_LE_HI20:
5200 case R_NDS32_TLS_LE_LO12:
5201 case R_NDS32_TLS_LE_20:
5202 case R_NDS32_TLS_LE_15S0:
5203 case R_NDS32_TLS_LE_15S1:
5204 case R_NDS32_TLS_LE_15S2:
5205 if (elf_hash_table (info)->tls_sec != NULL)
5206 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5207 break;
5208 case R_NDS32_TLS_IE_HI20:
5209 case R_NDS32_TLS_IE_LO12S2:
5210 {
5211 /* Relocation is to the entry for this symbol in the global
5212 offset table. */
5213 unsigned int tls_type;
5214 asection *srelgot;
5215 Elf_Internal_Rela outrel;
5216 bfd_vma off;
5217 bfd_byte *loc;
5218 int indx = 0;
5219
5220 BFD_ASSERT (sgot != NULL);
5221 if (h != NULL)
5222 {
5223 bfd_boolean dyn;
5224
5225 off = h->got.offset;
5226 BFD_ASSERT (off != (bfd_vma) - 1);
5227 dyn = htab->root.dynamic_sections_created;
5228 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5229 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5230 && (!info->shared
5231 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5232 indx = h->dynindx;
5233 }
5234 else
5235 {
5236 /* Never happen currently. */
5237 BFD_ASSERT (local_got_offsets != NULL
5238 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5239
5240 off = local_got_offsets[r_symndx];
5241
5242 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5243 }
5244 relocation = sgot->output_section->vma + sgot->output_offset + off;
5245
5246 if (r_type == R_NDS32_TLS_IE_LO12S2)
5247 break;
5248
5249 /* The offset must always be a multiple of 4. We use
5250 the least significant bit to record whether we have
5251 already processed this entry. */
5252 if ((off & 1) != 0)
5253 off &= ~1;
5254 else
5255 {
5256 bfd_boolean need_relocs = FALSE;
5257 srelgot = htab->srelgot;
5258 if ((info->shared || indx != 0)
5259 && (h == NULL
5260 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5261 || h->root.type != bfd_link_hash_undefweak))
5262 {
5263 need_relocs = TRUE;
5264 BFD_ASSERT (srelgot != NULL);
5265 }
5266 if (tls_type & GOT_TLS_IE)
5267 {
5268 if (need_relocs)
5269 {
5270 if (h->dynindx == 0)
5271 outrel.r_addend = relocation - dtpoff_base (info);
5272 else
5273 outrel.r_addend = 0;
5274 outrel.r_offset = (sgot->output_section->vma
5275 + sgot->output_offset
5276 + off);
5277 outrel.r_info =
5278 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5279
5280 loc = srelgot->contents;
5281 loc +=
5282 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5283 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5284 ++srelgot->reloc_count;
5285 }
5286 else
5287 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5288 sgot->contents + off);
5289 }
5290 }
5291 }
5292 break;
5293
35c08157
KLC
5294 /* DON'T fall through. */
5295
5296 default:
5297 /* OLD_NDS32_RELOC. */
5298
5299 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5300 contents, offset, relocation, addend);
5301 goto check_reloc;
5302 }
5303
5304 switch ((int) r_type)
5305 {
5306 case R_NDS32_20_RELA:
5307 case R_NDS32_5_RELA:
5308 case R_NDS32_9_PCREL_RELA:
5309 case R_NDS32_WORD_9_PCREL_RELA:
5310 case R_NDS32_10_UPCREL_RELA:
5311 case R_NDS32_15_PCREL_RELA:
5312 case R_NDS32_17_PCREL_RELA:
5313 case R_NDS32_25_PCREL_RELA:
5314 case R_NDS32_25_ABS_RELA:
5315 case R_NDS32_HI20_RELA:
5316 case R_NDS32_LO12S3_RELA:
5317 case R_NDS32_LO12S2_RELA:
5318 case R_NDS32_LO12S2_DP_RELA:
5319 case R_NDS32_LO12S2_SP_RELA:
5320 case R_NDS32_LO12S1_RELA:
5321 case R_NDS32_LO12S0_RELA:
5322 case R_NDS32_LO12S0_ORI_RELA:
5323 case R_NDS32_SDA16S3_RELA:
5324 case R_NDS32_SDA17S2_RELA:
5325 case R_NDS32_SDA18S1_RELA:
5326 case R_NDS32_SDA19S0_RELA:
5327 case R_NDS32_SDA15S3_RELA:
5328 case R_NDS32_SDA15S2_RELA:
5329 case R_NDS32_SDA12S2_DP_RELA:
5330 case R_NDS32_SDA12S2_SP_RELA:
5331 case R_NDS32_SDA15S1_RELA:
5332 case R_NDS32_SDA15S0_RELA:
5333 case R_NDS32_SDA_FP7U2_RELA:
5334 case R_NDS32_9_PLTREL:
5335 case R_NDS32_25_PLTREL:
5336 case R_NDS32_GOT20:
5337 case R_NDS32_GOT_HI20:
5338 case R_NDS32_GOT_LO12:
5339 case R_NDS32_GOT_LO15:
5340 case R_NDS32_GOT_LO19:
5341 case R_NDS32_GOT15S2_RELA:
5342 case R_NDS32_GOT17S2_RELA:
5343 case R_NDS32_GOTPC20:
5344 case R_NDS32_GOTPC_HI20:
5345 case R_NDS32_GOTPC_LO12:
5346 case R_NDS32_GOTOFF:
5347 case R_NDS32_GOTOFF_HI20:
5348 case R_NDS32_GOTOFF_LO12:
5349 case R_NDS32_GOTOFF_LO15:
5350 case R_NDS32_GOTOFF_LO19:
5351 case R_NDS32_PLTREL_HI20:
5352 case R_NDS32_PLTREL_LO12:
5353 case R_NDS32_PLT_GOTREL_HI20:
5354 case R_NDS32_PLT_GOTREL_LO12:
5355 case R_NDS32_PLT_GOTREL_LO15:
5356 case R_NDS32_PLT_GOTREL_LO19:
5357 case R_NDS32_PLT_GOTREL_LO20:
5358 case R_NDS32_17IFC_PCREL_RELA:
5359 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC
5360 case R_NDS32_TLS_LE_HI20:
5361 case R_NDS32_TLS_LE_LO12:
5362 case R_NDS32_TLS_IE_HI20:
5363 case R_NDS32_TLS_IE_LO12S2:
5364 case R_NDS32_TLS_LE_20:
5365 case R_NDS32_TLS_LE_15S0:
5366 case R_NDS32_TLS_LE_15S1:
5367 case R_NDS32_TLS_LE_15S2:
35c08157 5368 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5369 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC
5370 r = nds32_elf_final_link_relocate (howto, input_bfd,
5371 input_section, contents,
5372 rel->r_offset, relocation,
5373 rel->r_addend);
5374 break;
5375
5376 default:
5377 /* All other relocs can use default handler. */
5378 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5379 contents, rel->r_offset,
5380 relocation, rel->r_addend);
5381 break;
5382 }
5383
5384check_reloc:
5385
5386 if (r != bfd_reloc_ok)
5387 {
5388 /* FIXME: This should be generic enough to go in a utility. */
5389 const char *name;
5390
5391 if (h != NULL)
5392 name = h->root.root.string;
5393 else
5394 {
5395 name = bfd_elf_string_from_elf_section
5396 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5397 if (name == NULL || *name == '\0')
5398 name = bfd_section_name (input_bfd, sec);
5399 }
5400
5401 if (errmsg != NULL)
5402 goto common_error;
5403
5404 switch (r)
5405 {
5406 case bfd_reloc_overflow:
5407 if (!((*info->callbacks->reloc_overflow)
5408 (info, (h ? &h->root : NULL), name, howto->name,
5409 (bfd_vma) 0, input_bfd, input_section, offset)))
5410 return FALSE;
5411 break;
5412
5413 case bfd_reloc_undefined:
5414 if (!((*info->callbacks->undefined_symbol)
5415 (info, name, input_bfd, input_section, offset, TRUE)))
5416 return FALSE;
5417 break;
5418
5419 case bfd_reloc_outofrange:
5420 errmsg = _("internal error: out of range error");
5421 goto common_error;
5422
5423 case bfd_reloc_notsupported:
5424 errmsg = _("internal error: unsupported relocation error");
5425 goto common_error;
5426
5427 case bfd_reloc_dangerous:
5428 errmsg = _("internal error: dangerous error");
5429 goto common_error;
5430
5431 default:
5432 errmsg = _("internal error: unknown error");
5433 /* Fall through. */
5434
5435common_error:
5436 if (!((*info->callbacks->warning)
5437 (info, errmsg, name, input_bfd, input_section, offset)))
5438 return FALSE;
5439 break;
5440 }
5441 }
5442 }
5443
5444 return ret;
5445}
5446
5447/* Finish up dynamic symbol handling. We set the contents of various
5448 dynamic sections here. */
5449
5450static bfd_boolean
5451nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5452 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5453{
5454 struct elf_nds32_link_hash_table *htab;
5455 bfd_byte *loc;
5456
5457 htab = nds32_elf_hash_table (info);
5458
5459 if (h->plt.offset != (bfd_vma) - 1)
5460 {
5461 asection *splt;
5462 asection *sgot;
5463 asection *srela;
5464
5465 bfd_vma plt_index;
5466 bfd_vma got_offset;
5467 bfd_vma local_plt_offset;
5468 Elf_Internal_Rela rela;
5469
5470 /* This symbol has an entry in the procedure linkage table. Set
5471 it up. */
5472
5473 BFD_ASSERT (h->dynindx != -1);
5474
5475 splt = htab->splt;
5476 sgot = htab->sgotplt;
5477 srela = htab->srelplt;
5478 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5479
5480 /* Get the index in the procedure linkage table which
5481 corresponds to this symbol. This is the index of this symbol
5482 in all the symbols for which we are making plt entries. The
5483 first entry in the procedure linkage table is reserved. */
5484 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5485
5486 /* Get the offset into the .got table of the entry that
5487 corresponds to this function. Each .got entry is 4 bytes.
5488 The first three are reserved. */
5489 got_offset = (plt_index + 3) * 4;
5490
5491 /* Fill in the entry in the procedure linkage table. */
5492 if (!info->shared)
5493 {
5494 unsigned long insn;
5495
5496 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5497 + sgot->output_offset + got_offset) >> 12)
5498 & 0xfffff);
5499 bfd_putb32 (insn, splt->contents + h->plt.offset);
5500
5501 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5502 + sgot->output_offset + got_offset) & 0x0fff)
5503 >> 2);
5504 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5505
5506 insn = PLT_ENTRY_WORD2;
5507 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5508
5509 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5510 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5511
5512 insn = PLT_ENTRY_WORD4
5513 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5514 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5515 local_plt_offset = 12;
5516 }
5517 else
5518 {
5519 /* sda_base must be set at this time. */
5520 unsigned long insn;
5521 long offset;
5522
5523 /* FIXME, sda_base is 65536, it will damage opcode. */
5524 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5525 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5526 - elf_gp (output_bfd);
5527 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5528 bfd_putb32 (insn, splt->contents + h->plt.offset);
5529
5530 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5531 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5532
5533 insn = PLT_PIC_ENTRY_WORD2;
5534 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5535
5536 insn = PLT_PIC_ENTRY_WORD3;
5537 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5538
5539 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5540 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5541
5542 insn = PLT_PIC_ENTRY_WORD5
5543 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5544 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5545
5546 local_plt_offset = 16;
5547 }
5548
5549 /* Fill in the entry in the global offset table,
5550 so it will fall through to the next instruction for the first time. */
5551 bfd_put_32 (output_bfd,
5552 (splt->output_section->vma + splt->output_offset
5553 + h->plt.offset + local_plt_offset),
5554 sgot->contents + got_offset);
5555
5556 /* Fill in the entry in the .rela.plt section. */
5557 rela.r_offset = (sgot->output_section->vma
5558 + sgot->output_offset + got_offset);
5559 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5560 rela.r_addend = 0;
5561 loc = srela->contents;
5562 loc += plt_index * sizeof (Elf32_External_Rela);
5563 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5564
5565 if (!h->def_regular)
5566 {
5567 /* Mark the symbol as undefined, rather than as defined in
5568 the .plt section. Leave the value alone. */
5569 sym->st_shndx = SHN_UNDEF;
5570 if (!h->ref_regular_nonweak)
5571 sym->st_value = 0;
5572 }
5573 }
5574
5575 if (h->got.offset != (bfd_vma) - 1)
5576 {
5577 asection *sgot;
5578 asection *srela;
5579 Elf_Internal_Rela rela;
5580
5581 /* This symbol has an entry in the global offset table.
5582 Set it up. */
5583
5584 sgot = htab->sgot;
5585 srela = htab->srelgot;
5586 BFD_ASSERT (sgot != NULL && srela != NULL);
5587
5588 rela.r_offset = (sgot->output_section->vma
5589 + sgot->output_offset + (h->got.offset & ~1));
5590
5591 /* If this is a -Bsymbolic link, and the symbol is defined
5592 locally, we just want to emit a RELATIVE reloc. Likewise if
5593 the symbol was forced to be local because of a version file.
5594 The entry in the global offset table will already have been
5595 initialized in the relocate_section function. */
5596 if (info->shared
5597 && (info->symbolic
5598 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5599 {
5600 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5601 rela.r_addend = (h->root.u.def.value
5602 + h->root.u.def.section->output_section->vma
5603 + h->root.u.def.section->output_offset);
5604 }
5605 else
5606 {
5607 BFD_ASSERT ((h->got.offset & 1) == 0);
5608 bfd_put_32 (output_bfd, (bfd_vma) 0,
5609 sgot->contents + h->got.offset);
5610 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5611 rela.r_addend = 0;
5612 }
5613
5614 loc = srela->contents;
5615 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5616 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5617 ++srela->reloc_count;
5618 }
5619
5620 if (h->needs_copy)
5621 {
5622 asection *s;
5623 Elf_Internal_Rela rela;
5624
5625 /* This symbols needs a copy reloc. Set it up. */
5626
5627 BFD_ASSERT (h->dynindx != -1
5628 && (h->root.type == bfd_link_hash_defined
5629 || h->root.type == bfd_link_hash_defweak));
5630
5631 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5632 BFD_ASSERT (s != NULL);
5633
5634 rela.r_offset = (h->root.u.def.value
5635 + h->root.u.def.section->output_section->vma
5636 + h->root.u.def.section->output_offset);
5637 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5638 rela.r_addend = 0;
5639 loc = s->contents;
5640 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5641 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5642 ++s->reloc_count;
5643 }
5644
5645 /* Mark some specially defined symbols as absolute. */
5646 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5647 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5648 sym->st_shndx = SHN_ABS;
5649
5650 return TRUE;
5651}
5652
5653
5654/* Finish up the dynamic sections. */
5655
5656static bfd_boolean
5657nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5658{
5659 struct elf_nds32_link_hash_table *htab;
5660 bfd *dynobj;
5661 asection *sdyn;
5662 asection *sgot;
5663
5664 htab = nds32_elf_hash_table (info);
5665 dynobj = htab->root.dynobj;
5666
5667 sgot = htab->sgotplt;
5668 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5669
5670 if (htab->root.dynamic_sections_created)
5671 {
5672 asection *splt;
5673 Elf32_External_Dyn *dyncon, *dynconend;
5674
5675 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5676
5677 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5678 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5679
5680 for (; dyncon < dynconend; dyncon++)
5681 {
5682 Elf_Internal_Dyn dyn;
5683 asection *s;
5684
5685 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5686
5687 switch (dyn.d_tag)
5688 {
5689 default:
5690 break;
5691
5692 case DT_PLTGOT:
5693 /* name = ".got"; */
5694 s = htab->sgot->output_section;
5695 goto get_vma;
5696 case DT_JMPREL:
5697 s = htab->srelplt->output_section;
5698 get_vma:
5699 BFD_ASSERT (s != NULL);
5700 dyn.d_un.d_ptr = s->vma;
5701 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5702 break;
5703
5704 case DT_PLTRELSZ:
5705 s = htab->srelplt->output_section;
5706 BFD_ASSERT (s != NULL);
5707 dyn.d_un.d_val = s->size;
5708 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5709 break;
5710
5711 case DT_RELASZ:
5712 /* My reading of the SVR4 ABI indicates that the
5713 procedure linkage table relocs (DT_JMPREL) should be
5714 included in the overall relocs (DT_RELA). This is
5715 what Solaris does. However, UnixWare can not handle
5716 that case. Therefore, we override the DT_RELASZ entry
5717 here to make it not include the JMPREL relocs. Since
5718 the linker script arranges for .rela.plt to follow all
5719 other relocation sections, we don't have to worry
5720 about changing the DT_RELA entry. */
5721 if (htab->srelplt != NULL)
5722 {
5723 s = htab->srelplt->output_section;
5724 dyn.d_un.d_val -= s->size;
5725 }
5726 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5727 break;
5728 }
5729 }
5730
5731 /* Fill in the first entry in the procedure linkage table. */
5732 splt = htab->splt;
5733 if (splt && splt->size > 0)
5734 {
5735 if (info->shared)
5736 {
5737 unsigned long insn;
5738 long offset;
5739
5740 /* FIXME, sda_base is 65536, it will damage opcode. */
5741 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5742 offset = sgot->output_section->vma + sgot->output_offset + 4
5743 - elf_gp (output_bfd);
5744 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5745 bfd_putb32 (insn, splt->contents);
5746
5747 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5748 /* here has a typo? */
5749 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5750 bfd_putb32 (insn, splt->contents + 4);
5751
5752 insn = PLT0_PIC_ENTRY_WORD2;
5753 bfd_putb32 (insn, splt->contents + 8);
5754
5755 insn = PLT0_PIC_ENTRY_WORD3;
5756 bfd_putb32 (insn, splt->contents + 12);
5757
5758 insn = PLT0_PIC_ENTRY_WORD4;
5759 bfd_putb32 (insn, splt->contents + 16);
5760
5761 insn = PLT0_PIC_ENTRY_WORD5;
5762 bfd_putb32 (insn, splt->contents + 20);
5763 }
5764 else
5765 {
5766 unsigned long insn;
5767 unsigned long addr;
5768
5769 /* addr = .got + 4 */
5770 addr = sgot->output_section->vma + sgot->output_offset + 4;
5771 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5772 bfd_putb32 (insn, splt->contents);
5773
5774 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5775 bfd_putb32 (insn, splt->contents + 4);
5776
5777 insn = PLT0_ENTRY_WORD2;
5778 bfd_putb32 (insn, splt->contents + 8);
5779
5780 insn = PLT0_ENTRY_WORD3;
5781 bfd_putb32 (insn, splt->contents + 12);
5782
5783 insn = PLT0_ENTRY_WORD4;
5784 bfd_putb32 (insn, splt->contents + 16);
5785 }
5786
5787 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5788 PLT_ENTRY_SIZE;
5789 }
5790 }
5791
5792 /* Fill in the first three entries in the global offset table. */
5793 if (sgot && sgot->size > 0)
5794 {
5795 if (sdyn == NULL)
5796 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5797 else
5798 bfd_put_32 (output_bfd,
5799 sdyn->output_section->vma + sdyn->output_offset,
5800 sgot->contents);
5801 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5802 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5803
5804 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5805 }
5806
5807 return TRUE;
5808}
5809\f
5810
5811/* Set the right machine number. */
5812
5813static bfd_boolean
5814nds32_elf_object_p (bfd *abfd)
5815{
5816 static unsigned int cur_arch = 0;
5817
5818 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5819 {
5820 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5821 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5822 }
5823
5824 switch (cur_arch)
5825 {
5826 default:
5827 case E_N1_ARCH:
5828 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5829 break;
5830 case E_N1H_ARCH:
5831 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5832 break;
5833 case E_NDS_ARCH_STAR_V2_0:
5834 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5835 break;
5836 case E_NDS_ARCH_STAR_V3_0:
5837 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5838 break;
5839 case E_NDS_ARCH_STAR_V3_M:
5840 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5841 break;
5842 }
5843
5844 return TRUE;
5845}
5846
5847/* Store the machine number in the flags field. */
5848
5849static void
5850nds32_elf_final_write_processing (bfd *abfd,
5851 bfd_boolean linker ATTRIBUTE_UNUSED)
5852{
5853 unsigned long val;
5854 static unsigned int cur_mach = 0;
5855
5856 if (bfd_mach_n1 != bfd_get_mach (abfd))
5857 {
5858 cur_mach = bfd_get_mach (abfd);
5859 }
5860
5861 switch (cur_mach)
5862 {
5863 case bfd_mach_n1:
5864 /* Only happen when object is empty, since the case is abandon. */
5865 val = E_N1_ARCH;
5866 val |= E_NDS_ABI_AABI;
5867 val |= E_NDS32_ELF_VER_1_4;
5868 break;
5869 case bfd_mach_n1h:
5870 val = E_N1H_ARCH;
5871 break;
5872 case bfd_mach_n1h_v2:
5873 val = E_NDS_ARCH_STAR_V2_0;
5874 break;
5875 case bfd_mach_n1h_v3:
5876 val = E_NDS_ARCH_STAR_V3_0;
5877 break;
5878 case bfd_mach_n1h_v3m:
5879 val = E_NDS_ARCH_STAR_V3_M;
5880 break;
5881 default:
5882 val = 0;
5883 break;
5884 }
5885
5886 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5887 elf_elfheader (abfd)->e_flags |= val;
5888}
5889
5890/* Function to keep NDS32 specific file flags. */
5891
5892static bfd_boolean
5893nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5894{
5895 BFD_ASSERT (!elf_flags_init (abfd)
5896 || elf_elfheader (abfd)->e_flags == flags);
5897
5898 elf_elfheader (abfd)->e_flags = flags;
5899 elf_flags_init (abfd) = TRUE;
5900 return TRUE;
5901}
5902
5903static unsigned int
5904convert_e_flags (unsigned int e_flags, unsigned int arch)
5905{
5906 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5907 {
5908 /* From 0.9 to 1.0. */
5909 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5910
5911 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5912 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5913 if (arch == E_NDS_ARCH_STAR_V1_0)
5914 {
5915 /* Done. */
5916 return e_flags;
5917 }
5918 }
5919
5920 /* From 1.0 to 2.0. */
5921 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5922
5923 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5924 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5925
5926 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5927 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5928 return e_flags;
5929}
5930
5931static bfd_boolean
5932nds32_check_vec_size (bfd *ibfd)
5933{
5934 static unsigned int nds32_vec_size = 0;
5935
5936 asection *sec_t = NULL;
5937 bfd_byte *contents = NULL;
5938
5939 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5940
5941 if (sec_t && sec_t->size >= 4)
5942 {
5943 /* Get vec_size in file. */
5944 unsigned int flag_t;
5945
5946 nds32_get_section_contents (ibfd, sec_t, &contents);
5947 flag_t = bfd_get_32 (ibfd, contents);
5948
5949 /* The value could only be 4 or 16. */
5950
5951 if (!nds32_vec_size)
5952 /* Set if not set yet. */
5953 nds32_vec_size = (flag_t & 0x3);
5954 else if (nds32_vec_size != (flag_t & 0x3))
5955 {
5956 (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5957 " with previous modules, previous %u-byte, current %u-byte"),
5958 ibfd,
5959 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5960 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5961 return FALSE;
5962 }
5963 else
5964 /* Only keep the first vec_size section. */
5965 sec_t->flags |= SEC_EXCLUDE;
5966 }
5967
5968 return TRUE;
5969}
5970
5971/* Merge backend specific data from an object file to the output
5972 object file when linking. */
5973
5974static bfd_boolean
5975nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5976{
5977 flagword out_flags;
5978 flagword in_flags;
5979 flagword out_16regs;
5980 flagword in_no_mac;
5981 flagword out_no_mac;
5982 flagword in_16regs;
5983 flagword out_version;
5984 flagword in_version;
5985 flagword out_fpu_config;
5986 flagword in_fpu_config;
5987
5988 /* TODO: Revise to use object-attributes instead. */
5989 if (!nds32_check_vec_size (ibfd))
5990 return FALSE;
5991
5992 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5993 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5994 return TRUE;
5995
5996 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5997 {
5998 (*_bfd_error_handler)
5999 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6000
6001 bfd_set_error (bfd_error_bad_value);
6002 return FALSE;
6003 }
6004
6005 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6006 if (in_version == E_NDS32_ELF_VER_1_2)
6007 {
6008 (*_bfd_error_handler)
6009 (_("%B: warning: Older version of object file encountered, "
6010 "Please recompile with current tool chain."), ibfd);
6011 }
6012
6013 /* We may need to merge V1 and V2 arch object files to V2. */
6014 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6015 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6016 {
6017 /* Need to convert version. */
6018 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6019 == E_NDS_ARCH_STAR_RESERVED)
6020 {
6021 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6022 }
6023 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6024 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6025 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6026 {
6027 elf_elfheader (obfd)->e_flags =
6028 convert_e_flags (elf_elfheader (obfd)->e_flags,
6029 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6030 }
6031 else
6032 {
6033 elf_elfheader (ibfd)->e_flags =
6034 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6035 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6036 }
6037 }
6038
6039 /* Extract some flags. */
6040 in_flags = elf_elfheader (ibfd)->e_flags
6041 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6042 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6043
6044 /* The following flags need special treatment. */
6045 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6046 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6047 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6048
6049 /* Extract some flags. */
6050 out_flags = elf_elfheader (obfd)->e_flags
6051 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6052 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6053
6054 /* The following flags need special treatment. */
6055 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6056 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6057 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6058 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6059 if (!elf_flags_init (obfd))
6060 {
6061 /* If the input is the default architecture then do not
6062 bother setting the flags for the output architecture,
6063 instead allow future merges to do this. If no future
6064 merges ever set these flags then they will retain their
6065 unitialised values, which surprise surprise, correspond
6066 to the default values. */
6067 if (bfd_get_arch_info (ibfd)->the_default)
6068 return TRUE;
6069
6070 elf_flags_init (obfd) = TRUE;
6071 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6072
6073 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6074 && bfd_get_arch_info (obfd)->the_default)
6075 {
6076 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6077 bfd_get_mach (ibfd));
6078 }
6079
6080 return TRUE;
6081 }
6082
6083 /* Check flag compatibility. */
6084 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6085 {
6086 (*_bfd_error_handler)
6087 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6088
6089 bfd_set_error (bfd_error_bad_value);
6090 return FALSE;
6091 }
6092
6093 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6094 {
6095 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6096 {
6097 (*_bfd_error_handler)
6098 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6099
6100 bfd_set_error (bfd_error_bad_value);
6101 return FALSE;
6102 }
6103 }
6104
6105 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6106 and perf ext1 and DIV are mergerd to perf ext1. */
6107 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6108 {
6109 elf_elfheader (obfd)->e_flags =
6110 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6111 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6112 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6113 ? E_NDS32_HAS_EXT_INST : 0)
6114 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6115 ? E_NDS32_HAS_EXT_INST : 0)
6116 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6117 | ((in_version > out_version) ? out_version : in_version);
6118 }
6119 else
6120 {
6121 if (in_version != out_version)
6122 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."),
6123 ibfd, nds32_elfver_strtab[out_version],
6124 nds32_elfver_strtab[in_version]);
6125
6126 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6127 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6128 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6129 | (in_version > out_version ? out_version : in_version);
6130 }
6131
6132 return TRUE;
6133}
6134
6135/* Display the flags field. */
6136
6137static bfd_boolean
6138nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6139{
6140 FILE *file = (FILE *) ptr;
6141
6142 BFD_ASSERT (abfd != NULL && ptr != NULL);
6143
6144 _bfd_elf_print_private_bfd_data (abfd, ptr);
6145
6146 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6147
6148 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6149 {
6150 default:
6151 case E_N1_ARCH:
6152 fprintf (file, _(": n1 instructions"));
6153 break;
6154 case E_N1H_ARCH:
6155 fprintf (file, _(": n1h instructions"));
6156 break;
6157 }
6158
6159 fputc ('\n', file);
6160
6161 return TRUE;
6162}
6163
6164static unsigned int
6165nds32_elf_action_discarded (asection *sec)
6166{
6167
6168 if (strncmp
6169 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6170 return 0;
6171
6172 return _bfd_elf_default_action_discarded (sec);
6173}
6174
6175static asection *
6176nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6177 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6178 Elf_Internal_Sym *sym)
6179{
6180 if (h != NULL)
6181 switch (ELF32_R_TYPE (rel->r_info))
6182 {
6183 case R_NDS32_GNU_VTINHERIT:
6184 case R_NDS32_GNU_VTENTRY:
6185 case R_NDS32_RELA_GNU_VTINHERIT:
6186 case R_NDS32_RELA_GNU_VTENTRY:
6187 return NULL;
6188 }
6189
6190 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6191}
6192
6193static bfd_boolean
6194nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6195 const Elf_Internal_Rela *relocs)
6196{
6197 /* Update the got entry reference counts for the section being removed. */
6198 Elf_Internal_Shdr *symtab_hdr;
6199 struct elf_link_hash_entry **sym_hashes;
6200 bfd_signed_vma *local_got_refcounts;
6201 const Elf_Internal_Rela *rel, *relend;
6202
6203 elf_section_data (sec)->local_dynrel = NULL;
6204
6205 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6206 sym_hashes = elf_sym_hashes (abfd);
6207 local_got_refcounts = elf_local_got_refcounts (abfd);
6208
6209 relend = relocs + sec->reloc_count;
6210 for (rel = relocs; rel < relend; rel++)
6211 {
6212 unsigned long r_symndx;
6213 struct elf_link_hash_entry *h = NULL;
6214
6215 r_symndx = ELF32_R_SYM (rel->r_info);
6216 if (r_symndx >= symtab_hdr->sh_info)
6217 {
6218 /* External symbol. */
6219 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6220 while (h->root.type == bfd_link_hash_indirect
6221 || h->root.type == bfd_link_hash_warning)
6222 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6223 }
6224
6225 switch (ELF32_R_TYPE (rel->r_info))
6226 {
6227 case R_NDS32_GOT_HI20:
6228 case R_NDS32_GOT_LO12:
6229 case R_NDS32_GOT_LO15:
6230 case R_NDS32_GOT_LO19:
6231 case R_NDS32_GOT17S2_RELA:
6232 case R_NDS32_GOT15S2_RELA:
6233 case R_NDS32_GOTOFF:
6234 case R_NDS32_GOTOFF_HI20:
6235 case R_NDS32_GOTOFF_LO12:
6236 case R_NDS32_GOTOFF_LO15:
6237 case R_NDS32_GOTOFF_LO19:
6238 case R_NDS32_GOT20:
6239 case R_NDS32_GOTPC_HI20:
6240 case R_NDS32_GOTPC_LO12:
6241 case R_NDS32_GOTPC20:
6242 if (h != NULL)
6243 {
6244 if (h->got.refcount > 0)
6245 h->got.refcount--;
6246 }
6247 else
6248 {
6249 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6250 local_got_refcounts[r_symndx]--;
6251 }
6252 break;
6253
6254 case R_NDS32_16_RELA:
6255 case R_NDS32_20_RELA:
6256 case R_NDS32_5_RELA:
6257 case R_NDS32_32_RELA:
6258 case R_NDS32_HI20_RELA:
6259 case R_NDS32_LO12S3_RELA:
6260 case R_NDS32_LO12S2_RELA:
6261 case R_NDS32_LO12S2_DP_RELA:
6262 case R_NDS32_LO12S2_SP_RELA:
6263 case R_NDS32_LO12S1_RELA:
6264 case R_NDS32_LO12S0_RELA:
6265 case R_NDS32_LO12S0_ORI_RELA:
6266 case R_NDS32_SDA16S3_RELA:
6267 case R_NDS32_SDA17S2_RELA:
6268 case R_NDS32_SDA18S1_RELA:
6269 case R_NDS32_SDA19S0_RELA:
6270 case R_NDS32_SDA15S3_RELA:
6271 case R_NDS32_SDA15S2_RELA:
6272 case R_NDS32_SDA12S2_DP_RELA:
6273 case R_NDS32_SDA12S2_SP_RELA:
6274 case R_NDS32_SDA15S1_RELA:
6275 case R_NDS32_SDA15S0_RELA:
6276 case R_NDS32_SDA_FP7U2_RELA:
6277 case R_NDS32_15_PCREL_RELA:
6278 case R_NDS32_17_PCREL_RELA:
6279 case R_NDS32_25_PCREL_RELA:
6280 if (h != NULL)
6281 {
6282 struct elf_nds32_link_hash_entry *eh;
6283 struct elf_nds32_dyn_relocs **pp;
6284 struct elf_nds32_dyn_relocs *p;
6285
6286 if (!info->shared && h->plt.refcount > 0)
6287 h->plt.refcount -= 1;
6288
6289 eh = (struct elf_nds32_link_hash_entry *) h;
6290
6291 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6292 if (p->sec == sec)
6293 {
6294 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6295 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6296 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6297 p->pc_count -= 1;
6298 p->count -= 1;
6299 if (p->count == 0)
6300 *pp = p->next;
6301 break;
6302 }
6303 }
6304 break;
6305
6306 case R_NDS32_9_PLTREL:
6307 case R_NDS32_25_PLTREL:
6308 if (h != NULL)
6309 {
6310 if (h->plt.refcount > 0)
6311 h->plt.refcount--;
6312 }
6313 break;
6314
6315 default:
6316 break;
6317 }
6318 }
6319
6320 return TRUE;
6321}
6322
6323/* Look through the relocs for a section during the first phase.
6324 Since we don't do .gots or .plts, we just need to consider the
6325 virtual table relocs for gc. */
6326
6327static bfd_boolean
6328nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6329 asection *sec, const Elf_Internal_Rela *relocs)
6330{
6331 Elf_Internal_Shdr *symtab_hdr;
6332 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6333 const Elf_Internal_Rela *rel;
6334 const Elf_Internal_Rela *rel_end;
6335 struct elf_nds32_link_hash_table *htab;
6336 bfd *dynobj;
6337 asection *sreloc = NULL;
6338
6339 if (info->relocatable)
6340 return TRUE;
6341
6342 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6343 sym_hashes = elf_sym_hashes (abfd);
6344 sym_hashes_end =
6345 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6346 if (!elf_bad_symtab (abfd))
6347 sym_hashes_end -= symtab_hdr->sh_info;
6348
6349 htab = nds32_elf_hash_table (info);
6350 dynobj = htab->root.dynobj;
6351
6352 rel_end = relocs + sec->reloc_count;
6353 for (rel = relocs; rel < rel_end; rel++)
6354 {
6355 enum elf_nds32_reloc_type r_type;
6356 struct elf_link_hash_entry *h;
6357 unsigned long r_symndx;
1c8f6a4d 6358 int tls_type, old_tls_type;
35c08157
KLC
6359
6360 r_symndx = ELF32_R_SYM (rel->r_info);
6361 r_type = ELF32_R_TYPE (rel->r_info);
6362 if (r_symndx < symtab_hdr->sh_info)
6363 h = NULL;
6364 else
6365 {
6366 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6367 while (h->root.type == bfd_link_hash_indirect
6368 || h->root.type == bfd_link_hash_warning)
6369 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6370 }
6371
1c8f6a4d
KLC
6372 /* Some relocs require a global offset table. We create
6373 got section here, since these relocation need got section
6374 and it is not created yet. */
35c08157
KLC
6375 if (htab->sgot == NULL)
6376 {
6377 switch (r_type)
6378 {
6379 case R_NDS32_GOT_HI20:
6380 case R_NDS32_GOT_LO12:
6381 case R_NDS32_GOT_LO15:
6382 case R_NDS32_GOT_LO19:
6383 case R_NDS32_GOT17S2_RELA:
6384 case R_NDS32_GOT15S2_RELA:
6385 case R_NDS32_GOTOFF:
6386 case R_NDS32_GOTOFF_HI20:
6387 case R_NDS32_GOTOFF_LO12:
6388 case R_NDS32_GOTOFF_LO15:
6389 case R_NDS32_GOTOFF_LO19:
6390 case R_NDS32_GOTPC20:
6391 case R_NDS32_GOTPC_HI20:
6392 case R_NDS32_GOTPC_LO12:
6393 case R_NDS32_GOT20:
1c8f6a4d
KLC
6394 case R_NDS32_TLS_IE_HI20:
6395 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC
6396 if (dynobj == NULL)
6397 htab->root.dynobj = dynobj = abfd;
6398 if (!create_got_section (dynobj, info))
6399 return FALSE;
6400 break;
6401
6402 default:
6403 break;
6404 }
6405 }
6406
6407 switch ((int) r_type)
6408 {
6409 case R_NDS32_GOT_HI20:
6410 case R_NDS32_GOT_LO12:
6411 case R_NDS32_GOT_LO15:
6412 case R_NDS32_GOT_LO19:
6413 case R_NDS32_GOT20:
1c8f6a4d
KLC
6414 case R_NDS32_TLS_IE_HI20:
6415 case R_NDS32_TLS_IE_LO12S2:
6416 switch (r_type)
6417 {
6418 case R_NDS32_TLS_IE_HI20:
6419 case R_NDS32_TLS_IE_LO12S2:
6420 tls_type = GOT_TLS_IE;
6421 break;
6422 default:
6423 tls_type = GOT_NORMAL;
6424 break;
6425 }
35c08157 6426 if (h != NULL)
1c8f6a4d
KLC
6427 {
6428 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6429 h->got.refcount += 1;
6430 }
35c08157
KLC
6431 else
6432 {
6433 bfd_signed_vma *local_got_refcounts;
6434
6435 /* This is a global offset table entry for a local
6436 symbol. */
6437 local_got_refcounts = elf_local_got_refcounts (abfd);
6438 if (local_got_refcounts == NULL)
6439 {
6440 bfd_size_type size;
6441
6442 size = symtab_hdr->sh_info;
6443 size *= sizeof (bfd_signed_vma);
6444 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6445 if (local_got_refcounts == NULL)
6446 return FALSE;
6447 elf_local_got_refcounts (abfd) = local_got_refcounts;
6448 }
6449 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6450 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6451 }
35c08157 6452
1c8f6a4d
KLC
6453 /* We will already have issued an error message if there
6454 is a TLS/non-TLS mismatch, based on the symbol
6455 type. So just combine any TLS types needed. */
6456 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6457 && tls_type != GOT_NORMAL)
6458 tls_type |= old_tls_type;
6459
6460 if (old_tls_type != tls_type)
6461 {
6462 if (h != NULL)
6463 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6464 else
6465 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6466 }
6467 break;
6468 case R_NDS32_9_PLTREL:
35c08157
KLC
6469 case R_NDS32_25_PLTREL:
6470 case R_NDS32_PLTREL_HI20:
6471 case R_NDS32_PLTREL_LO12:
6472 case R_NDS32_PLT_GOTREL_HI20:
6473 case R_NDS32_PLT_GOTREL_LO12:
6474 case R_NDS32_PLT_GOTREL_LO15:
6475 case R_NDS32_PLT_GOTREL_LO19:
6476 case R_NDS32_PLT_GOTREL_LO20:
6477
6478 /* This symbol requires a procedure linkage table entry. We
6479 actually build the entry in adjust_dynamic_symbol,
6480 because this might be a case of linking PIC code without
6481 linking in any dynamic objects, in which case we don't
6482 need to generate a procedure linkage table after all. */
6483
6484 /* If this is a local symbol, we resolve it directly without
6485 creating a procedure linkage table entry. */
6486 if (h == NULL)
6487 continue;
6488
6489 if (h->forced_local)
6490 break;
6491
1c8f6a4d 6492 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC
6493 h->needs_plt = 1;
6494 h->plt.refcount += 1;
6495 break;
6496
6497 case R_NDS32_16_RELA:
6498 case R_NDS32_20_RELA:
6499 case R_NDS32_5_RELA:
6500 case R_NDS32_32_RELA:
6501 case R_NDS32_HI20_RELA:
6502 case R_NDS32_LO12S3_RELA:
6503 case R_NDS32_LO12S2_RELA:
6504 case R_NDS32_LO12S2_DP_RELA:
6505 case R_NDS32_LO12S2_SP_RELA:
6506 case R_NDS32_LO12S1_RELA:
6507 case R_NDS32_LO12S0_RELA:
6508 case R_NDS32_LO12S0_ORI_RELA:
6509 case R_NDS32_SDA16S3_RELA:
6510 case R_NDS32_SDA17S2_RELA:
6511 case R_NDS32_SDA18S1_RELA:
6512 case R_NDS32_SDA19S0_RELA:
6513 case R_NDS32_SDA15S3_RELA:
6514 case R_NDS32_SDA15S2_RELA:
6515 case R_NDS32_SDA12S2_DP_RELA:
6516 case R_NDS32_SDA12S2_SP_RELA:
6517 case R_NDS32_SDA15S1_RELA:
6518 case R_NDS32_SDA15S0_RELA:
6519 case R_NDS32_SDA_FP7U2_RELA:
6520 case R_NDS32_15_PCREL_RELA:
6521 case R_NDS32_17_PCREL_RELA:
6522 case R_NDS32_25_PCREL_RELA:
6523
6524 if (h != NULL && !info->shared)
6525 {
6526 h->non_got_ref = 1;
6527 h->plt.refcount += 1;
6528 }
6529
6530 /* If we are creating a shared library, and this is a reloc against
6531 a global symbol, or a non PC relative reloc against a local
6532 symbol, then we need to copy the reloc into the shared library.
6533 However, if we are linking with -Bsymbolic, we do not need to
6534 copy a reloc against a global symbol which is defined in an
6535 object we are including in the link (i.e., DEF_REGULAR is set).
6536 At this point we have not seen all the input files, so it is
6537 possible that DEF_REGULAR is not set now but will be set later
6538 (it is never cleared). We account for that possibility below by
6539 storing information in the dyn_relocs field of the hash table
6540 entry. A similar situation occurs when creating shared libraries
6541 and symbol visibility changes render the symbol local.
6542
6543 If on the other hand, we are creating an executable, we may need
6544 to keep relocations for symbols satisfied by a dynamic library
6545 if we manage to avoid copy relocs for the symbol. */
6546 if ((info->shared
6547 && (sec->flags & SEC_ALLOC) != 0
6548 && ((r_type != R_NDS32_25_PCREL_RELA
6549 && r_type != R_NDS32_15_PCREL_RELA
6550 && r_type != R_NDS32_17_PCREL_RELA
6551 && !(r_type == R_NDS32_32_RELA
6552 && strcmp (sec->name, ".eh_frame") == 0))
6553 || (h != NULL
6554 && (!info->symbolic
6555 || h->root.type == bfd_link_hash_defweak
6556 || !h->def_regular))))
6557 || (!info->shared
6558 && (sec->flags & SEC_ALLOC) != 0
6559 && h != NULL
6560 && (h->root.type == bfd_link_hash_defweak
6561 || !h->def_regular)))
6562 {
6563 struct elf_nds32_dyn_relocs *p;
6564 struct elf_nds32_dyn_relocs **head;
6565
6566 if (dynobj == NULL)
6567 htab->root.dynobj = dynobj = abfd;
6568
6569 /* When creating a shared object, we must copy these
6570 relocs into the output file. We create a reloc
6571 section in dynobj and make room for the reloc. */
6572 if (sreloc == NULL)
6573 {
6574 const char *name;
6575
6576 name = bfd_elf_string_from_elf_section
6577 (abfd, elf_elfheader (abfd)->e_shstrndx,
6578 elf_section_data (sec)->rela.hdr->sh_name);
6579 if (name == NULL)
6580 return FALSE;
6581
6582 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6583 && strcmp (bfd_get_section_name (abfd, sec),
6584 name + 5) == 0);
6585
6586 sreloc = bfd_get_section_by_name (dynobj, name);
6587 if (sreloc == NULL)
6588 {
6589 flagword flags;
6590
6591 sreloc = bfd_make_section (dynobj, name);
6592 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6593 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6594 if ((sec->flags & SEC_ALLOC) != 0)
6595 flags |= SEC_ALLOC | SEC_LOAD;
6596 if (sreloc == NULL
6597 || !bfd_set_section_flags (dynobj, sreloc, flags)
6598 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6599 return FALSE;
6600
6601 elf_section_type (sreloc) = SHT_RELA;
6602 }
6603 elf_section_data (sec)->sreloc = sreloc;
6604 }
6605
6606 /* If this is a global symbol, we count the number of
6607 relocations we need for this symbol. */
6608 if (h != NULL)
6609 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6610 else
6611 {
6612 asection *s;
6613
6614 Elf_Internal_Sym *isym;
6615 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6616 if (isym == NULL)
6617 return FALSE;
6618
6619 /* Track dynamic relocs needed for local syms too. */
6620 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6621 if (s == NULL)
6622 return FALSE;
6623
6624 head = ((struct elf_nds32_dyn_relocs **)
6625 &elf_section_data (s)->local_dynrel);
6626 }
6627
6628 p = *head;
6629 if (p == NULL || p->sec != sec)
6630 {
6631 bfd_size_type amt = sizeof (*p);
6632 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6633 if (p == NULL)
6634 return FALSE;
6635 p->next = *head;
6636 *head = p;
6637 p->sec = sec;
6638 p->count = 0;
6639 p->pc_count = 0;
6640 }
6641
6642 p->count += 1;
6643 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6644 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6645 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6646 p->pc_count += 1;
6647 }
6648 break;
6649
6650 /* This relocation describes the C++ object vtable hierarchy.
6651 Reconstruct it for later use during GC. */
6652 case R_NDS32_RELA_GNU_VTINHERIT:
6653 case R_NDS32_GNU_VTINHERIT:
6654 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6655 return FALSE;
6656 break;
6657
6658 /* This relocation describes which C++ vtable entries are actually
6659 used. Record for later use during GC. */
6660 case R_NDS32_GNU_VTENTRY:
6661 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6662 return FALSE;
6663 break;
6664 case R_NDS32_RELA_GNU_VTENTRY:
6665 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6666 return FALSE;
6667 break;
6668 }
6669 }
6670
6671 return TRUE;
6672}
6673
6674/* Write VAL in uleb128 format to P, returning a pointer to the
6675 following byte.
6676 This code is copied from elf-attr.c. */
6677
6678static bfd_byte *
6679write_uleb128 (bfd_byte *p, unsigned int val)
6680{
6681 bfd_byte c;
6682 do
6683 {
6684 c = val & 0x7f;
6685 val >>= 7;
6686 if (val)
6687 c |= 0x80;
6688 *(p++) = c;
6689 }
6690 while (val);
6691 return p;
6692}
6693
6694static bfd_signed_vma
6695calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6696 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6697 int *pic_ext_target)
6698{
6699 bfd_signed_vma foff;
6700 bfd_vma symval, addend;
6701 asection *sym_sec;
6702
6703 /* Get the value of the symbol referred to by the reloc. */
6704 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6705 {
6706 Elf_Internal_Sym *isym;
6707
6708 /* A local symbol. */
6709 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6710
6711 if (isym->st_shndx == SHN_UNDEF)
6712 sym_sec = bfd_und_section_ptr;
6713 else if (isym->st_shndx == SHN_ABS)
6714 sym_sec = bfd_abs_section_ptr;
6715 else if (isym->st_shndx == SHN_COMMON)
6716 sym_sec = bfd_com_section_ptr;
6717 else
6718 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6719 symval = isym->st_value + sym_sec->output_section->vma
6720 + sym_sec->output_offset;
6721 }
6722 else
6723 {
6724 unsigned long indx;
6725 struct elf_link_hash_entry *h;
6726 bfd *owner;
6727
6728 /* An external symbol. */
6729 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6730 h = elf_sym_hashes (abfd)[indx];
6731 BFD_ASSERT (h != NULL);
6732
6733 if (h->root.type != bfd_link_hash_defined
6734 && h->root.type != bfd_link_hash_defweak)
6735 /* This appears to be a reference to an undefined
6736 symbol. Just ignore it--it will be caught by the
6737 regular reloc processing. */
6738 return 0;
6739 owner = h->root.u.def.section->owner;
6740 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6741 *pic_ext_target = 1;
6742
6743 if (h->root.u.def.section->flags & SEC_MERGE)
6744 {
6745 sym_sec = h->root.u.def.section;
6746 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6747 elf_section_data (sym_sec)->sec_info,
6748 h->root.u.def.value);
6749 symval = symval + sym_sec->output_section->vma
6750 + sym_sec->output_offset;
6751 }
6752 else
6753 symval = (h->root.u.def.value
6754 + h->root.u.def.section->output_section->vma
6755 + h->root.u.def.section->output_offset);
6756 }
6757
6758 addend = irel->r_addend;
6759
6760 foff = (symval + addend
6761 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6762 return foff;
6763}
6764
6765static bfd_vma
6766calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6767 Elf_Internal_Sym *isymbuf,
6768 Elf_Internal_Rela *irel,
6769 Elf_Internal_Shdr *symtab_hdr)
6770{
6771 bfd_vma symval;
6772
6773 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6774 {
6775 Elf_Internal_Sym *isym;
6776 asection *sym_sec;
6777 /* A local symbol. */
6778 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6779
6780 if (isym->st_shndx == SHN_UNDEF)
6781 sym_sec = bfd_und_section_ptr;
6782 else if (isym->st_shndx == SHN_ABS)
6783 sym_sec = bfd_abs_section_ptr;
6784 else if (isym->st_shndx == SHN_COMMON)
6785 sym_sec = bfd_com_section_ptr;
6786 else
6787 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6788 symval = isym->st_value + sym_sec->output_section->vma
6789 + sym_sec->output_offset;
6790 }
6791 else
6792 {
6793 unsigned long indx;
6794 struct elf_link_hash_entry *h;
6795 struct elf_nds32_link_hash_table *htab;
6796 asection *splt;
6797
6798 /* An external symbol. */
6799 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6800 h = elf_sym_hashes (abfd)[indx];
6801 BFD_ASSERT (h != NULL);
6802 htab = nds32_elf_hash_table (link_info);
6803 splt = htab->splt;
6804
6805 while (h->root.type == bfd_link_hash_indirect
6806 || h->root.type == bfd_link_hash_warning)
6807 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6808
6809 if (h->plt.offset == (bfd_vma) - 1)
6810 {
6811 if (h->root.type != bfd_link_hash_defined
6812 && h->root.type != bfd_link_hash_defweak)
6813 /* This appears to be a reference to an undefined
6814 * symbol. Just ignore it--it will be caught by the
6815 * regular reloc processing. */
6816 return 0;
6817 symval = (h->root.u.def.value
6818 + h->root.u.def.section->output_section->vma
6819 + h->root.u.def.section->output_offset);
6820 }
6821 else
6822 symval = splt->output_section->vma + h->plt.offset;
6823 }
6824
6825 return symval;
6826}
6827
6828static bfd_signed_vma
6829calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6830 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6831 Elf_Internal_Shdr *symtab_hdr)
6832{
6833 bfd_vma foff;
6834 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6835 symtab_hdr)) == 0)
6836 return 0;
6837 else
6838 return foff - (irel->r_offset
6839 + sec->output_section->vma + sec->output_offset);
6840}
6841\f
6842/* Convert a 32-bit instruction to 16-bit one.
6843 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6844 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6845 type of INSN16. Return 1 if successful. */
6846
6847static int
6848nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6849 int *pinsn_type)
6850{
6851 uint16_t insn16 = 0;
6852 int insn_type;
6853 unsigned long mach = bfd_get_mach (abfd);
6854
6855 if (N32_SH5 (insn) != 0)
6856 return 0;
6857
6858 switch (N32_SUB5 (insn))
6859 {
6860 case N32_ALU1_ADD_SLLI:
6861 case N32_ALU1_ADD_SRLI:
6862 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6863 {
6864 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6865 N32_RB5 (insn));
6866 insn_type = NDS32_INSN_ADD333;
6867 }
6868 else if (N32_IS_RT4 (insn))
6869 {
6870 if (N32_RT5 (insn) == N32_RA5 (insn))
6871 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6872 else if (N32_RT5 (insn) == N32_RB5 (insn))
6873 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6874 insn_type = NDS32_INSN_ADD45;
6875 }
6876 break;
6877
6878 case N32_ALU1_SUB_SLLI:
6879 case N32_ALU1_SUB_SRLI:
6880 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6881 {
6882 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6883 N32_RB5 (insn));
6884 insn_type = NDS32_INSN_SUB333;
6885 }
6886 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6887 {
6888 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6889 insn_type = NDS32_INSN_SUB45;
6890 }
6891 break;
6892
6893 case N32_ALU1_AND_SLLI:
6894 case N32_ALU1_AND_SRLI:
6895 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6896 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6897 && N32_IS_RB3 (insn))
6898 {
6899 if (N32_RT5 (insn) == N32_RA5 (insn))
6900 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6901 else if (N32_RT5 (insn) == N32_RB5 (insn))
6902 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6903 if (insn16)
6904 insn_type = NDS32_INSN_AND33;
6905 }
6906 break;
6907
6908 case N32_ALU1_XOR_SLLI:
6909 case N32_ALU1_XOR_SRLI:
6910 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6911 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6912 && N32_IS_RB3 (insn))
6913 {
6914 if (N32_RT5 (insn) == N32_RA5 (insn))
6915 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6916 else if (N32_RT5 (insn) == N32_RB5 (insn))
6917 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6918 if (insn16)
6919 insn_type = NDS32_INSN_XOR33;
6920 }
6921 break;
6922
6923 case N32_ALU1_OR_SLLI:
6924 case N32_ALU1_OR_SRLI:
6925 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6926 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6927 && N32_IS_RB3 (insn))
6928 {
6929 if (N32_RT5 (insn) == N32_RA5 (insn))
6930 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6931 else if (N32_RT5 (insn) == N32_RB5 (insn))
6932 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6933 if (insn16)
6934 insn_type = NDS32_INSN_OR33;
6935 }
6936 break;
6937 case N32_ALU1_NOR:
6938 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6939 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6940 && N32_RA5 (insn) == N32_RB5 (insn))
6941 {
6942 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6943 insn_type = NDS32_INSN_NOT33;
6944 }
6945 break;
6946 case N32_ALU1_SRAI:
6947 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6948 {
6949 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6950 insn_type = NDS32_INSN_SRAI45;
6951 }
6952 break;
6953
6954 case N32_ALU1_SRLI:
6955 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6956 {
6957 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6958 insn_type = NDS32_INSN_SRLI45;
6959 }
6960 break;
6961
6962 case N32_ALU1_SLLI:
6963 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6964 {
6965 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6966 N32_UB5 (insn));
6967 insn_type = NDS32_INSN_SLLI333;
6968 }
6969 break;
6970
6971 case N32_ALU1_ZEH:
6972 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6973 {
6974 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6975 insn_type = NDS32_INSN_ZEH33;
6976 }
6977 break;
6978
6979 case N32_ALU1_SEB:
6980 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6981 {
6982 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6983 insn_type = NDS32_INSN_SEB33;
6984 }
6985 break;
6986
6987 case N32_ALU1_SEH:
6988 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6989 {
6990 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6991 insn_type = NDS32_INSN_SEH33;
6992 }
6993 break;
6994
6995 case N32_ALU1_SLT:
6996 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6997 {
6998 /* Implicit r15. */
6999 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7000 insn_type = NDS32_INSN_SLT45;
7001 }
7002 break;
7003
7004 case N32_ALU1_SLTS:
7005 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7006 {
7007 /* Implicit r15. */
7008 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7009 insn_type = NDS32_INSN_SLTS45;
7010 }
7011 break;
7012 }
7013
7014 if ((insn16 & 0x8000) == 0)
7015 return 0;
7016
7017 if (pinsn16)
7018 *pinsn16 = insn16;
7019 if (pinsn_type)
7020 *pinsn_type = insn_type;
7021 return 1;
7022}
7023
7024static int
7025nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7026 int *pinsn_type)
7027{
7028 uint16_t insn16 = 0;
7029 int insn_type;
7030 unsigned long mach = bfd_get_mach (abfd);
7031
7032 /* TODO: bset, bclr, btgl, btst. */
7033 if (__GF (insn, 6, 4) != 0)
7034 return 0;
7035
7036 switch (N32_IMMU (insn, 6))
7037 {
7038 case N32_ALU2_MUL:
7039 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7040 && N32_IS_RB3 (insn))
7041 {
7042 if (N32_RT5 (insn) == N32_RA5 (insn))
7043 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7044 else if (N32_RT5 (insn) == N32_RB5 (insn))
7045 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7046 if (insn16)
7047 insn_type = NDS32_INSN_MUL33;
7048 }
7049 }
7050
7051 if ((insn16 & 0x8000) == 0)
7052 return 0;
7053
7054 if (pinsn16)
7055 *pinsn16 = insn16;
7056 if (pinsn_type)
7057 *pinsn_type = insn_type;
7058 return 1;
7059}
7060
7061int
7062nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7063 int *pinsn_type)
7064{
7065 int op6;
7066 uint16_t insn16 = 0;
7067 int insn_type;
7068 unsigned long mach = bfd_get_mach (abfd);
7069
7070 /* Decode 32-bit instruction. */
7071 if (insn & 0x80000000)
7072 {
7073 /* Not 32-bit insn. */
7074 return 0;
7075 }
7076
7077 op6 = N32_OP6 (insn);
7078
7079 /* Convert it to 16-bit instruction. */
7080 switch (op6)
7081 {
7082 case N32_OP6_MOVI:
7083 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7084 {
7085 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7086 insn_type = NDS32_INSN_MOVI55;
7087 }
7088 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7089 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7090 {
7091 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7092 N32_IMM20S (insn) - 16);
7093 insn_type = NDS32_INSN_MOVPI45;
7094 }
7095 break;
7096
7097 case N32_OP6_ADDI:
7098 if (N32_IMM15S (insn) == 0)
7099 {
7100 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7101 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7102 if (mach <= MACH_V2
7103 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7104 {
7105 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7106 insn_type = NDS32_INSN_MOV55;
7107 }
7108 }
7109 else if (N32_IMM15S (insn) > 0)
7110 {
7111 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7112 {
7113 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7114 N32_IMM15S (insn));
7115 insn_type = NDS32_INSN_ADDI333;
7116 }
7117 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7118 && N32_IMM15S (insn) < 32)
7119 {
7120 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7121 insn_type = NDS32_INSN_ADDI45;
7122 }
7123 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7124 && N32_RT5 (insn) == N32_RA5 (insn)
7125 && N32_IMM15S (insn) < 512)
7126 {
7127 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7128 insn_type = NDS32_INSN_ADDI10_SP;
7129 }
7130 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7131 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7132 && (N32_IMM15S (insn) % 4 == 0))
7133 {
7134 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7135 N32_IMM15S (insn) >> 2);
7136 insn_type = NDS32_INSN_ADDRI36_SP;
7137 }
7138 }
7139 else
7140 {
7141 /* Less than 0. */
7142 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7143 {
7144 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7145 0 - N32_IMM15S (insn));
7146 insn_type = NDS32_INSN_SUBI333;
7147 }
7148 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7149 && N32_IMM15S (insn) > -32)
7150 {
1c8f6a4d
KLC
7151 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7152 0 - N32_IMM15S (insn));
35c08157
KLC
7153 insn_type = NDS32_INSN_SUBI45;
7154 }
7155 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7156 && N32_RT5 (insn) == N32_RA5 (insn)
7157 && N32_IMM15S (insn) >= -512)
7158 {
7159 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7160 insn_type = NDS32_INSN_ADDI10_SP;
7161 }
7162 }
7163 break;
7164
7165 case N32_OP6_ORI:
7166 if (N32_IMM15S (insn) == 0)
7167 {
7168 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7169 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7170 if (mach <= MACH_V2
7171 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7172 {
7173 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7174 insn_type = NDS32_INSN_MOV55;
7175 }
7176 }
7177 break;
7178
7179 case N32_OP6_SUBRI:
7180 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7181 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7182 {
7183 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7184 insn_type = NDS32_INSN_NEG33;
7185 }
7186 break;
7187
7188 case N32_OP6_ANDI:
7189 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7190 {
7191 if (N32_IMM15U (insn) == 1)
7192 {
7193 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7194 insn_type = NDS32_INSN_XLSB33;
7195 }
7196 else if (N32_IMM15U (insn) == 0x7ff)
7197 {
7198 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7199 insn_type = NDS32_INSN_X11B33;
7200 }
7201 else if (N32_IMM15U (insn) == 0xff)
7202 {
7203 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7204 insn_type = NDS32_INSN_ZEB33;
7205 }
7206 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7207 && N32_IMM15U (insn) < 256)
7208 {
7209 int imm15u = N32_IMM15U (insn);
7210
7211 if (__builtin_popcount (imm15u) == 1)
7212 {
7213 /* BMSKI33 */
7214 int imm3u = __builtin_ctz (imm15u);
7215
7216 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7217 insn_type = NDS32_INSN_BMSKI33;
7218 }
7219 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7220 {
7221 /* FEXTI33 */
7222 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7223
7224 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7225 insn_type = NDS32_INSN_FEXTI33;
7226 }
7227 }
7228 }
7229 break;
7230
7231 case N32_OP6_SLTI:
7232 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7233 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7234 {
7235 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7236 insn_type = NDS32_INSN_SLTI45;
7237 }
7238 break;
7239
7240 case N32_OP6_SLTSI:
7241 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7242 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7243 {
7244 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7245 insn_type = NDS32_INSN_SLTSI45;
7246 }
7247 break;
7248
7249 case N32_OP6_LWI:
7250 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7251 {
7252 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7253 insn_type = NDS32_INSN_LWI450;
7254 }
7255 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7256 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7257 {
7258 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7259 N32_IMM15S (insn));
7260 insn_type = NDS32_INSN_LWI333;
7261 }
7262 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7263 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7264 {
7265 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7266 insn_type = NDS32_INSN_LWI37;
7267 }
7268 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7269 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7270 {
7271 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7272 insn_type = NDS32_INSN_LWI37_SP;
7273 }
7274 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7275 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7276 {
1c8f6a4d
KLC
7277 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7278 N32_IMM15S (insn) + 32);
35c08157
KLC
7279 insn_type = NDS32_INSN_LWI45_FE;
7280 }
7281 break;
7282
7283 case N32_OP6_SWI:
7284 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7285 {
7286 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7287 insn_type = NDS32_INSN_SWI450;
7288 }
7289 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7290 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7291 {
1c8f6a4d
KLC
7292 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7293 N32_IMM15S (insn));
35c08157
KLC
7294 insn_type = NDS32_INSN_SWI333;
7295 }
7296 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7297 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7298 {
7299 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7300 insn_type = NDS32_INSN_SWI37;
7301 }
7302 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7303 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7304 {
7305 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7306 insn_type = NDS32_INSN_SWI37_SP;
7307 }
7308 break;
7309
7310 case N32_OP6_LWI_BI:
7311 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7312 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7313 {
7314 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7315 N32_IMM15S (insn));
7316 insn_type = NDS32_INSN_LWI333_BI;
7317 }
7318 break;
7319
7320 case N32_OP6_SWI_BI:
7321 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7322 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7323 {
7324 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7325 N32_IMM15S (insn));
7326 insn_type = NDS32_INSN_SWI333_BI;
7327 }
7328 break;
7329
7330 case N32_OP6_LHI:
7331 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7332 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7333 {
7334 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7335 N32_IMM15S (insn));
7336 insn_type = NDS32_INSN_LHI333;
7337 }
7338 break;
7339
7340 case N32_OP6_SHI:
7341 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7342 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7343 {
7344 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7345 N32_IMM15S (insn));
7346 insn_type = NDS32_INSN_SHI333;
7347 }
7348 break;
7349
7350 case N32_OP6_LBI:
7351 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7352 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7353 {
7354 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7355 N32_IMM15S (insn));
7356 insn_type = NDS32_INSN_LBI333;
7357 }
7358 break;
7359
7360 case N32_OP6_SBI:
7361 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7362 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7363 {
7364 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7365 N32_IMM15S (insn));
7366 insn_type = NDS32_INSN_SBI333;
7367 }
7368 break;
7369
7370 case N32_OP6_ALU1:
7371 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7372
7373 case N32_OP6_ALU2:
7374 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7375
7376 case N32_OP6_BR1:
7377 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7378 goto done;
7379
7380 if ((insn & __BIT (14)) == 0)
7381 {
7382 /* N32_BR1_BEQ */
7383 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7384 && N32_RT5 (insn) != REG_R5)
7385 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7386 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7387 && N32_RA5 (insn) != REG_R5)
7388 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7389 insn_type = NDS32_INSN_BEQS38;
7390 break;
7391 }
7392 else
7393 {
7394 /* N32_BR1_BNE */
7395 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7396 && N32_RT5 (insn) != REG_R5)
7397 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7398 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7399 && N32_RA5 (insn) != REG_R5)
7400 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7401 insn_type = NDS32_INSN_BNES38;
7402 break;
7403 }
7404 break;
7405
7406 case N32_OP6_BR2:
7407 switch (N32_BR2_SUB (insn))
7408 {
7409 case N32_BR2_BEQZ:
7410 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7411 {
7412 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7413 insn_type = NDS32_INSN_BEQZ38;
7414 }
1c8f6a4d
KLC
7415 else if (N32_RT5 (insn) == REG_R15
7416 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7417 {
7418 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7419 insn_type = NDS32_INSN_BEQZS8;
7420 }
7421 break;
7422
7423 case N32_BR2_BNEZ:
7424 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7425 {
7426 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7427 insn_type = NDS32_INSN_BNEZ38;
7428 }
1c8f6a4d
KLC
7429 else if (N32_RT5 (insn) == REG_R15
7430 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7431 {
7432 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7433 insn_type = NDS32_INSN_BNEZS8;
7434 }
7435 break;
7436
7437 case N32_BR2_IFCALL:
7438 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7439 {
7440 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7441 insn_type = NDS32_INSN_IFCALL9;
7442 }
7443 break;
7444 }
7445 break;
7446
7447 case N32_OP6_JI:
7448 if ((insn & __BIT (24)) == 0)
7449 {
7450 /* N32_JI_J */
7451 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7452 {
7453 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7454 insn_type = NDS32_INSN_J8;
7455 }
7456 }
7457 break;
7458
7459 case N32_OP6_JREG:
7460 if (__GF (insn, 8, 2) != 0)
7461 goto done;
7462
7463 switch (N32_IMMU (insn, 5))
7464 {
7465 case N32_JREG_JR:
7466 if (N32_JREG_HINT (insn) == 0)
7467 {
7468 /* jr */
7469 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7470 insn_type = NDS32_INSN_JR5;
7471 }
7472 else if (N32_JREG_HINT (insn) == 1)
7473 {
7474 /* ret */
7475 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7476 insn_type = NDS32_INSN_RET5;
7477 }
7478 else if (N32_JREG_HINT (insn) == 3)
7479 {
7480 /* ifret = mov55 $sp, $sp */
7481 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7482 insn_type = NDS32_INSN_IFRET;
7483 }
7484 break;
7485
7486 case N32_JREG_JRAL:
7487 /* It's convertible when return rt5 is $lp and address
7488 translation is kept. */
7489 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7490 {
7491 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7492 insn_type = NDS32_INSN_JRAL5;
7493 }
7494 break;
7495 }
7496 break;
7497
7498 case N32_OP6_MISC:
7499 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7500 {
7501 /* For v3, swid above 31 are used for ex9.it. */
7502 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7503 insn_type = NDS32_INSN_BREAK16;
7504 }
7505 break;
7506
7507 default:
7508 /* This instruction has no 16-bit variant. */
7509 goto done;
7510 }
7511
7512done:
7513 /* Bit-15 of insn16 should be set for a valid instruction. */
7514 if ((insn16 & 0x8000) == 0)
7515 return 0;
7516
7517 if (pinsn16)
7518 *pinsn16 = insn16;
7519 if (pinsn_type)
7520 *pinsn_type = insn_type;
7521 return 1;
7522}
7523
7524static int
7525special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7526 Elf_Internal_Rela *reloc)
7527{
7528 uint16_t insn16 = 0;
7529
7530 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7531 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7532 return 0;
7533
7534 if (!N32_IS_RT3 (insn))
7535 return 0;
7536
7537 switch (N32_OP6 (insn))
7538 {
7539 case N32_OP6_LWI:
7540 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7541 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7542 break;
7543 case N32_OP6_SWI:
7544 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7545 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7546 break;
7547 case N32_OP6_HWGP:
7548 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7549 break;
7550
7551 if (__GF (insn, 17, 3) == 6)
7552 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7553 else if (__GF (insn, 17, 3) == 7)
7554 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7555 break;
7556 }
7557
7558 if ((insn16 & 0x8000) == 0)
7559 return 0;
7560
7561 *pinsn16 = insn16;
7562 return 1;
7563}
7564
7565/* Convert a 16-bit instruction to 32-bit one.
7566 INSN16 it the input and PINSN it the point to output.
7567 Return non-zero on successful. Otherwise 0 is returned. */
7568
7569int
7570nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7571{
7572 uint32_t insn = 0xffffffff;
7573 unsigned long mach = bfd_get_mach (abfd);
7574
7575 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7576
7577 switch (__GF (insn16, 9, 6))
7578 {
7579 case 0x4: /* add45 */
1c8f6a4d
KLC
7580 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7581 N16_RA5 (insn16));
35c08157
KLC
7582 goto done;
7583 case 0x5: /* sub45 */
1c8f6a4d
KLC
7584 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7585 N16_RA5 (insn16));
35c08157
KLC
7586 goto done;
7587 case 0x6: /* addi45 */
1c8f6a4d
KLC
7588 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7589 N16_IMM5U (insn16));
35c08157
KLC
7590 goto done;
7591 case 0x7: /* subi45 */
1c8f6a4d
KLC
7592 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7593 -N16_IMM5U (insn16));
35c08157
KLC
7594 goto done;
7595 case 0x8: /* srai45 */
1c8f6a4d
KLC
7596 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7597 N16_IMM5U (insn16));
35c08157
KLC
7598 goto done;
7599 case 0x9: /* srli45 */
1c8f6a4d
KLC
7600 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7601 N16_IMM5U (insn16));
35c08157 7602 goto done;
35c08157 7603 case 0xa: /* slli333 */
1c8f6a4d
KLC
7604 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7605 N16_IMM3U (insn16));
35c08157
KLC
7606 goto done;
7607 case 0xc: /* add333 */
1c8f6a4d
KLC
7608 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7609 N16_RB3 (insn16));
35c08157
KLC
7610 goto done;
7611 case 0xd: /* sub333 */
1c8f6a4d
KLC
7612 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7613 N16_RB3 (insn16));
35c08157
KLC
7614 goto done;
7615 case 0xe: /* addi333 */
1c8f6a4d
KLC
7616 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7617 N16_IMM3U (insn16));
35c08157
KLC
7618 goto done;
7619 case 0xf: /* subi333 */
1c8f6a4d
KLC
7620 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7621 -N16_IMM3U (insn16));
35c08157 7622 goto done;
35c08157 7623 case 0x10: /* lwi333 */
1c8f6a4d
KLC
7624 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7625 N16_IMM3U (insn16));
35c08157
KLC
7626 goto done;
7627 case 0x12: /* lhi333 */
1c8f6a4d
KLC
7628 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7629 N16_IMM3U (insn16));
35c08157
KLC
7630 goto done;
7631 case 0x13: /* lbi333 */
1c8f6a4d
KLC
7632 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7633 N16_IMM3U (insn16));
35c08157
KLC
7634 goto done;
7635 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC
7636 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7637 N16_IMM3U (insn16));
35c08157
KLC
7638 goto done;
7639 case 0x14: /* swi333 */
1c8f6a4d
KLC
7640 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7641 N16_IMM3U (insn16));
35c08157
KLC
7642 goto done;
7643 case 0x16: /* shi333 */
1c8f6a4d
KLC
7644 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7645 N16_IMM3U (insn16));
35c08157
KLC
7646 goto done;
7647 case 0x17: /* sbi333 */
1c8f6a4d
KLC
7648 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7649 N16_IMM3U (insn16));
35c08157
KLC
7650 goto done;
7651 case 0x15: /* swi333.bi */
1c8f6a4d
KLC
7652 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7653 N16_IMM3U (insn16));
35c08157 7654 goto done;
35c08157 7655 case 0x18: /* addri36.sp */
1c8f6a4d
KLC
7656 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7657 N16_IMM6U (insn16) << 2);
35c08157 7658 goto done;
35c08157 7659 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC
7660 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7661 (N16_IMM5U (insn16) - 32));
35c08157
KLC
7662 goto done;
7663 case 0x1a: /* lwi450 */
7664 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7665 goto done;
7666 case 0x1b: /* swi450 */
7667 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7668 goto done;
7669
1c8f6a4d 7670 /* These are r15 implied instructions. */
35c08157
KLC
7671 case 0x30: /* slts45 */
7672 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7673 goto done;
7674 case 0x31: /* slt45 */
7675 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7676 goto done;
7677 case 0x32: /* sltsi45 */
7678 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7679 goto done;
7680 case 0x33: /* slti45 */
7681 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7682 goto done;
7683 case 0x34: /* beqzs8, bnezs8 */
7684 if (insn16 & __BIT (8))
7685 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7686 else
7687 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7688 goto done;
7689
7690 case 0x35: /* break16, ex9.it */
7691 /* Only consider range of v3 break16. */
7692 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7693 goto done;
7694
7695 case 0x3c: /* ifcall9 */
7696 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7697 goto done;
7698 case 0x3d: /* movpi45 */
7699 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7700 goto done;
7701
7702 case 0x3f: /* MISC33 */
1c8f6a4d 7703 switch (insn16 & 0x7)
35c08157
KLC
7704 {
7705 case 2: /* neg33 */
7706 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7707 break;
7708 case 3: /* not33 */
1c8f6a4d
KLC
7709 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7710 N16_RA3 (insn16));
35c08157
KLC
7711 break;
7712 case 4: /* mul33 */
1c8f6a4d
KLC
7713 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7714 N16_RA3 (insn16));
35c08157
KLC
7715 break;
7716 case 5: /* xor33 */
1c8f6a4d
KLC
7717 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7718 N16_RA3 (insn16));
35c08157
KLC
7719 break;
7720 case 6: /* and33 */
1c8f6a4d
KLC
7721 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7722 N16_RA3 (insn16));
35c08157
KLC
7723 break;
7724 case 7: /* or33 */
1c8f6a4d
KLC
7725 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7726 N16_RA3 (insn16));
35c08157
KLC
7727 break;
7728 }
7729 goto done;
7730
1c8f6a4d 7731 case 0xb:
35c08157
KLC
7732 switch (insn16 & 0x7)
7733 {
7734 case 0: /* zeb33 */
7735 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7736 break;
7737 case 1: /* zeh33 */
7738 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7739 break;
7740 case 2: /* seb33 */
7741 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7742 break;
7743 case 3: /* seh33 */
7744 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7745 break;
7746 case 4: /* xlsb33 */
7747 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7748 break;
7749 case 5: /* x11b33 */
7750 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7751 break;
7752 case 6: /* bmski33 */
7753 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7754 1 << __GF (insn16, 3, 3));
35c08157
KLC
7755 break;
7756 case 7: /* fexti33 */
7757 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7758 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC
7759 break;
7760 }
7761 goto done;
7762 }
7763
7764 switch (__GF (insn16, 10, 5))
7765 {
7766 case 0x0: /* mov55 or ifret16 */
7767 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7768 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7769 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7770 else
1c8f6a4d 7771 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC
7772 goto done;
7773 case 0x1: /* movi55 */
7774 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7775 goto done;
7776 case 0x1b: /* addi10s (V2) */
7777 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7778 goto done;
7779 }
7780
7781 switch (__GF (insn16, 11, 4))
7782 {
7783 case 0x7: /* lwi37.fp/swi37.fp */
7784 if (insn16 & __BIT (7)) /* swi37.fp */
7785 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7786 else /* lwi37.fp */
7787 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7788 goto done;
7789 case 0x8: /* beqz38 */
7790 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7791 goto done;
7792 case 0x9: /* bnez38 */
7793 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7794 goto done;
7795 case 0xa: /* beqs38/j8, implied r5 */
7796 if (N16_RT38 (insn16) == 5)
7797 insn = N32_JI (J, N16_IMM8S (insn16));
7798 else
7799 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7800 goto done;
7801 case 0xb: /* bnes38 and others */
7802 if (N16_RT38 (insn16) == 5)
7803 {
7804 switch (__GF (insn16, 5, 3))
7805 {
7806 case 0: /* jr5 */
7807 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7808 break;
7809 case 4: /* ret5 */
7810 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7811 break;
7812 case 1: /* jral5 */
7813 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7814 break;
7815 case 2: /* ex9.it imm5 */
7816 /* ex9.it had no 32-bit variantl. */
7817 break;
7818 case 5: /* add5.pc */
7819 /* add5.pc had no 32-bit variantl. */
7820 break;
7821 }
7822 }
7823 else /* bnes38 */
7824 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7825 goto done;
7826 case 0xe: /* lwi37/swi37 */
7827 if (insn16 & (1 << 7)) /* swi37.sp */
7828 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7829 else /* lwi37.sp */
7830 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7831 goto done;
7832 }
7833
7834done:
7835 if (insn & 0x80000000)
7836 return 0;
7837
7838 if (pinsn)
7839 *pinsn = insn;
7840 return 1;
7841}
7842\f
7843static bfd_boolean
7844is_sda_access_insn (unsigned long insn)
7845{
7846 switch (N32_OP6 (insn))
7847 {
7848 case N32_OP6_LWI:
7849 case N32_OP6_LHI:
7850 case N32_OP6_LHSI:
7851 case N32_OP6_LBI:
7852 case N32_OP6_LBSI:
7853 case N32_OP6_SWI:
7854 case N32_OP6_SHI:
7855 case N32_OP6_SBI:
7856 case N32_OP6_LWC:
7857 case N32_OP6_LDC:
7858 case N32_OP6_SWC:
7859 case N32_OP6_SDC:
7860 return TRUE;
7861 default:
7862 ;
7863 }
7864 return FALSE;
7865}
7866
7867static unsigned long
7868turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7869{
7870 uint32_t oinsn = 0;
7871
7872 switch (type)
7873 {
7874 case R_NDS32_GOT_LO12:
7875 case R_NDS32_GOTOFF_LO12:
7876 case R_NDS32_PLTREL_LO12:
7877 case R_NDS32_PLT_GOTREL_LO12:
7878 case R_NDS32_LO12S0_RELA:
7879 switch (N32_OP6 (insn))
7880 {
7881 case N32_OP6_LBI:
7882 /* lbi.gp */
7883 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7884 break;
7885 case N32_OP6_LBSI:
7886 /* lbsi.gp */
7887 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7888 break;
7889 case N32_OP6_SBI:
7890 /* sbi.gp */
7891 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7892 break;
7893 case N32_OP6_ORI:
7894 /* addi.gp */
7895 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7896 break;
7897 }
7898 break;
7899
7900 case R_NDS32_LO12S1_RELA:
7901 switch (N32_OP6 (insn))
7902 {
7903 case N32_OP6_LHI:
7904 /* lhi.gp */
7905 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7906 break;
7907 case N32_OP6_LHSI:
7908 /* lhsi.gp */
7909 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7910 break;
7911 case N32_OP6_SHI:
7912 /* shi.gp */
7913 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7914 break;
7915 }
7916 break;
7917
7918 case R_NDS32_LO12S2_RELA:
7919 switch (N32_OP6 (insn))
7920 {
7921 case N32_OP6_LWI:
7922 /* lwi.gp */
7923 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7924 break;
7925 case N32_OP6_SWI:
7926 /* swi.gp */
7927 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7928 break;
7929 }
7930 break;
7931
7932 case R_NDS32_LO12S2_DP_RELA:
7933 case R_NDS32_LO12S2_SP_RELA:
7934 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7935 break;
7936 }
7937
7938 if (oinsn)
7939 *pinsn = oinsn;
7940
7941 return oinsn != 0;
7942}
7943
7944/* Linker hasn't found the correct merge section for non-section symbol
7945 in relax time, this work is left to the function elf_link_input_bfd().
7946 So for non-section symbol, _bfd_merged_section_offset is also needed
7947 to find the correct symbol address. */
7948
7949static bfd_vma
7950nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7951 asection **psec, Elf_Internal_Rela *rel)
7952{
7953 asection *sec = *psec;
7954 bfd_vma relocation;
7955
7956 relocation = (sec->output_section->vma
7957 + sec->output_offset + sym->st_value);
7958 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7959 {
7960 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7961 rel->r_addend =
7962 _bfd_merged_section_offset (abfd, psec,
7963 elf_section_data (sec)->sec_info,
7964 sym->st_value + rel->r_addend);
7965 else
7966 rel->r_addend =
7967 _bfd_merged_section_offset (abfd, psec,
7968 elf_section_data (sec)->sec_info,
7969 sym->st_value) + rel->r_addend;
7970
7971 if (sec != *psec)
7972 {
7973 /* If we have changed the section, and our original section is
7974 marked with SEC_EXCLUDE, it means that the original
7975 SEC_MERGE section has been completely subsumed in some
7976 other SEC_MERGE section. In this case, we need to leave
7977 some info around for --emit-relocs. */
7978 if ((sec->flags & SEC_EXCLUDE) != 0)
7979 sec->kept_section = *psec;
7980 sec = *psec;
7981 }
7982 rel->r_addend -= relocation;
7983 rel->r_addend += sec->output_section->vma + sec->output_offset;
7984 }
7985 return relocation;
7986}
7987
7988static bfd_vma
7989calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7990 Elf_Internal_Sym *isymbuf,
7991 Elf_Internal_Shdr *symtab_hdr)
7992{
7993 bfd_signed_vma foff;
7994 bfd_vma symval, addend;
7995 Elf_Internal_Rela irel_fn;
7996 Elf_Internal_Sym *isym;
7997 asection *sym_sec;
7998
7999 /* Get the value of the symbol referred to by the reloc. */
8000 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8001 {
8002 /* A local symbol. */
8003 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8004
8005 if (isym->st_shndx == SHN_UNDEF)
8006 sym_sec = bfd_und_section_ptr;
8007 else if (isym->st_shndx == SHN_ABS)
8008 sym_sec = bfd_abs_section_ptr;
8009 else if (isym->st_shndx == SHN_COMMON)
8010 sym_sec = bfd_com_section_ptr;
8011 else
8012 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8013 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8014 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8015 addend = irel_fn.r_addend;
8016 }
8017 else
8018 {
8019 unsigned long indx;
8020 struct elf_link_hash_entry *h;
8021
8022 /* An external symbol. */
8023 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8024 h = elf_sym_hashes (abfd)[indx];
8025 BFD_ASSERT (h != NULL);
8026
8027 while (h->root.type == bfd_link_hash_indirect
8028 || h->root.type == bfd_link_hash_warning)
8029 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8030
8031 if (h->root.type != bfd_link_hash_defined
8032 && h->root.type != bfd_link_hash_defweak)
8033 /* This appears to be a reference to an undefined
8034 symbol. Just ignore it--it will be caught by the
8035 regular reloc processing. */
8036 return 0;
8037
8038 if (h->root.u.def.section->flags & SEC_MERGE)
8039 {
8040 sym_sec = h->root.u.def.section;
8041 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8042 (sym_sec)->sec_info, h->root.u.def.value);
8043 symval = symval + sym_sec->output_section->vma
8044 + sym_sec->output_offset;
8045 }
8046 else
8047 symval = (h->root.u.def.value
8048 + h->root.u.def.section->output_section->vma
8049 + h->root.u.def.section->output_offset);
8050 addend = irel->r_addend;
8051 }
8052
8053 foff = symval + addend;
8054
8055 return foff;
8056}
8057
8058static bfd_vma
8059calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8060 Elf_Internal_Rela *irel,
8061 Elf_Internal_Shdr *symtab_hdr)
8062{
8063 int symndx;
8064 bfd_vma *local_got_offsets;
8065 /* Get the value of the symbol referred to by the reloc. */
8066 struct elf_link_hash_entry *h;
8067 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8068
8069 /* An external symbol. */
8070 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8071 h = elf_sym_hashes (abfd)[symndx];
8072 while (h->root.type == bfd_link_hash_indirect
8073 || h->root.type == bfd_link_hash_warning)
8074 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8075
8076 if (symndx >= 0)
8077 {
8078 BFD_ASSERT (h != NULL);
8079 return htab->sgot->output_section->vma + htab->sgot->output_offset
8080 + h->got.offset;
8081 }
8082 else
8083 {
8084 local_got_offsets = elf_local_got_offsets (abfd);
8085 BFD_ASSERT (local_got_offsets != NULL);
8086 return htab->sgot->output_section->vma + htab->sgot->output_offset
8087 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8088 }
8089
8090 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8091 /* The check of h->root.type is passed. */
8092}
8093
8094static int
8095is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8096 asection *sec, Elf_Internal_Rela *rel)
8097{
8098 bfd_byte *contents;
8099 unsigned short insn16;
8100
8101 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8102 return FALSE;
8103 contents = elf_section_data (sec)->this_hdr.contents;
8104 insn16 = bfd_getb16 (contents + rel->r_offset);
8105 if (insn16 == NDS32_NOP16)
8106 return TRUE;
8107 return FALSE;
8108}
8109
8110/* It checks whether the instruction could be converted to
8111 16-bit form and returns the converted one.
8112
8113 `internal_relocs' is supposed to be sorted. */
8114
8115static int
8116is_convert_32_to_16 (bfd *abfd, asection *sec,
8117 Elf_Internal_Rela *reloc,
8118 Elf_Internal_Rela *internal_relocs,
8119 Elf_Internal_Rela *irelend,
8120 uint16_t *insn16)
8121{
8122#define NORMAL_32_TO_16 (1 << 0)
8123#define SPECIAL_32_TO_16 (1 << 1)
8124 bfd_byte *contents = NULL;
8125 bfd_signed_vma off;
8126 bfd_vma mem_addr;
8127 uint32_t insn = 0;
8128 Elf_Internal_Rela *pc_rel;
8129 int pic_ext_target = 0;
8130 Elf_Internal_Shdr *symtab_hdr;
8131 Elf_Internal_Sym *isymbuf = NULL;
8132 int convert_type;
8133 bfd_vma offset;
8134
8135 if (reloc->r_offset + 4 > sec->size)
8136 return FALSE;
8137
8138 offset = reloc->r_offset;
8139
8140 if (!nds32_get_section_contents (abfd, sec, &contents))
8141 return FALSE;
8142 insn = bfd_getb32 (contents + offset);
8143
8144 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8145 convert_type = NORMAL_32_TO_16;
8146 else if (special_convert_32_to_16 (insn, insn16, reloc))
8147 convert_type = SPECIAL_32_TO_16;
8148 else
8149 return FALSE;
8150
8151 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8152 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8153 return FALSE;
8154
8155 /* Find the first relocation of the same relocation-type,
8156 so we iteratie them forward. */
8157 pc_rel = reloc;
1c8f6a4d 8158 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC
8159 pc_rel--;
8160
8161 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8162 {
8163 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8164 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8165 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8166 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8167 {
8168 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8169 &pic_ext_target);
1c8f6a4d
KLC
8170 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8171 || off == 0)
35c08157
KLC
8172 return FALSE;
8173 break;
8174 }
8175 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8176 {
8177 /* movi => movi55 */
1c8f6a4d
KLC
8178 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8179 symtab_hdr);
8180 /* mem_addr is unsigned, but the value should
8181 be between [-16, 15]. */
35c08157
KLC
8182 if ((mem_addr + 0x10) >> 5)
8183 return FALSE;
8184 break;
8185 }
1c8f6a4d
KLC
8186 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8187 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8188 {
8189 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8190 because it can be relaxed to addi for TLS_LE_ADD. */
8191 return FALSE;
8192 }
35c08157
KLC
8193 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8194 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8195 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8196 && convert_type == SPECIAL_32_TO_16)
8197 {
8198 /* fp-as-gp
8199 We've selected a best fp-base for this access, so we can
8200 always resolve it anyway. Do nothing. */
8201 break;
8202 }
8203 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8204 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8205 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8206 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8207 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8208 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8209 {
1c8f6a4d
KLC
8210 /* Prevent unresolved addi instruction translate
8211 to addi45 or addi333. */
35c08157
KLC
8212 return FALSE;
8213 }
1c8f6a4d
KLC
8214 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8215 {
8216 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8217 &pic_ext_target);
8218 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8219 return FALSE;
8220 break;
8221 }
35c08157
KLC
8222 }
8223
8224 return TRUE;
8225}
8226
8227static void
8228nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8229 Elf_Internal_Rela *reloc,
8230 Elf_Internal_Rela *internal_relocs,
8231 Elf_Internal_Rela *irelend,
8232 unsigned short insn16)
8233{
8234 Elf_Internal_Rela *pc_rel;
8235 bfd_vma offset;
8236
8237 offset = reloc->r_offset;
8238 bfd_putb16 (insn16, contents + offset);
8239 /* Find the first relocation of the same relocation-type,
8240 so we iteratie them forward. */
8241 pc_rel = reloc;
8242 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8243 pc_rel--;
8244
8245 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8246 {
8247 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8248 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8249 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8250 {
8251 pc_rel->r_info =
8252 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8253 }
8254 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8255 pc_rel->r_info =
8256 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8257 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8258 pc_rel->r_info =
8259 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8260 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8261 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8262 pc_rel->r_info =
8263 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC
8264 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8265 pc_rel->r_info =
8266 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
8267 }
8268}
8269
8270/* Find a relocation of type specified by `reloc_type'
8271 of the same r_offset with reloc.
8272 If not found, return irelend.
8273
8274 Assuming relocations are sorted by r_offset,
8275 we find the relocation from `reloc' backward untill relocs,
8276 or find it from `reloc' forward untill irelend. */
8277
8278static Elf_Internal_Rela *
8279find_relocs_at_address (Elf_Internal_Rela *reloc,
8280 Elf_Internal_Rela *relocs,
8281 Elf_Internal_Rela *irelend,
8282 enum elf_nds32_reloc_type reloc_type)
8283{
8284 Elf_Internal_Rela *rel_t;
8285
8286 /* Find backward. */
8287 for (rel_t = reloc;
8288 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8289 rel_t--)
8290 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8291 return rel_t;
8292
1c8f6a4d 8293 /* We didn't find it backward. Try find it forward. */
35c08157
KLC
8294 for (rel_t = reloc;
8295 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8296 rel_t++)
8297 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8298 return rel_t;
8299
8300 return irelend;
8301}
8302
8303/* Find a relocation of specified type and offset.
8304 `reloc' is just a refence point to find a relocation at specified offset.
8305 If not found, return irelend.
8306
8307 Assuming relocations are sorted by r_offset,
8308 we find the relocation from `reloc' backward untill relocs,
8309 or find it from `reloc' forward untill irelend. */
8310
8311static Elf_Internal_Rela *
8312find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8313 Elf_Internal_Rela *relocs,
8314 Elf_Internal_Rela *irelend,
8315 unsigned char reloc_type,
8316 bfd_vma offset_p)
8317{
8318 Elf_Internal_Rela *rel_t = NULL;
8319
8320 /* First, we try to find a relocation of offset `offset_p',
8321 and then we use find_relocs_at_address to find specific type. */
8322
8323 if (reloc->r_offset > offset_p)
8324 {
8325 /* Find backward. */
8326 for (rel_t = reloc;
8327 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8328 /* Do nothing. */;
8329 }
8330 else if (reloc->r_offset < offset_p)
8331 {
8332 /* Find forward. */
8333 for (rel_t = reloc;
8334 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8335 /* Do nothing. */;
8336 }
8337 else
8338 rel_t = reloc;
8339
8340 /* Not found? */
8341 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8342 return irelend;
8343
8344 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8345}
8346
8347static bfd_boolean
8348nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8349 Elf_Internal_Rela *internal_relocs,
8350 Elf_Internal_Rela *irelend,
8351 unsigned char reloc_type)
8352{
8353 Elf_Internal_Rela *rel_t;
8354
8355 for (rel_t = reloc;
8356 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8357 rel_t--)
8358 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8359 {
8360 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8361 && rel_t->r_addend == reloc->r_addend)
8362 continue;
8363 return TRUE;
8364 }
8365
8366 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8367 rel_t++)
8368 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8369 {
8370 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8371 && rel_t->r_addend == reloc->r_addend)
8372 continue;
8373 return TRUE;
8374 }
8375
8376 return FALSE;
8377}
8378
8379typedef struct nds32_elf_blank nds32_elf_blank_t;
8380struct nds32_elf_blank
8381{
8382 /* Where the blank begins. */
8383 bfd_vma offset;
8384 /* The size of the blank. */
8385 bfd_vma size;
8386 /* The accumulative size before this blank. */
8387 bfd_vma total_size;
8388 nds32_elf_blank_t *next;
8389 nds32_elf_blank_t *prev;
8390};
8391
8392static nds32_elf_blank_t *blank_free_list = NULL;
8393
8394static nds32_elf_blank_t *
8395create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8396{
8397 nds32_elf_blank_t *blank_t;
8398
8399 if (blank_free_list)
8400 {
8401 blank_t = blank_free_list;
8402 blank_free_list = blank_free_list->next;
8403 }
8404 else
8405 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8406
8407 if (blank_t == NULL)
8408 return NULL;
8409
8410 blank_t->offset = offset_p;
8411 blank_t->size = size_p;
8412 blank_t->total_size = 0;
8413 blank_t->next = NULL;
8414 blank_t->prev = NULL;
8415
8416 return blank_t;
8417}
8418
8419static void
8420remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8421{
8422 if (blank_free_list)
8423 {
8424 blank_free_list->prev = blank_p;
8425 blank_p->next = blank_free_list;
8426 }
8427 else
8428 blank_p->next = NULL;
8429
8430 blank_p->prev = NULL;
8431 blank_free_list = blank_p;
8432}
8433
8434static void
8435clean_nds32_elf_blank (void)
8436{
8437 nds32_elf_blank_t *blank_t;
8438
8439 while (blank_free_list)
8440 {
8441 blank_t = blank_free_list;
8442 blank_free_list = blank_free_list->next;
8443 free (blank_t);
8444 }
8445}
8446
8447static nds32_elf_blank_t *
8448search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8449{
8450 nds32_elf_blank_t *blank_t;
8451
8452 if (!blank_p)
8453 return NULL;
8454 blank_t = blank_p;
8455
8456 while (blank_t && addr < blank_t->offset)
8457 blank_t = blank_t->prev;
8458 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8459 blank_t = blank_t->next;
8460
8461 return blank_t;
8462}
8463
8464static bfd_vma
8465get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8466 int overwrite)
8467{
8468 nds32_elf_blank_t *blank_t;
8469
8470 blank_t = search_nds32_elf_blank (*blank_p, addr);
8471 if (!blank_t)
8472 return 0;
8473
8474 if (overwrite)
8475 *blank_p = blank_t;
8476
8477 if (addr < blank_t->offset + blank_t->size)
8478 return blank_t->total_size + (addr - blank_t->offset);
8479 else
8480 return blank_t->total_size + blank_t->size;
8481}
8482
8483static bfd_boolean
8484insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8485{
8486 nds32_elf_blank_t *blank_t, *blank_t2;
8487
8488 if (!*blank_p)
8489 {
8490 *blank_p = create_nds32_elf_blank (addr, len);
8491 return *blank_p ? TRUE : FALSE;
8492 }
8493
8494 blank_t = search_nds32_elf_blank (*blank_p, addr);
8495
8496 if (blank_t == NULL)
8497 {
8498 blank_t = create_nds32_elf_blank (addr, len);
8499 if (!blank_t)
8500 return FALSE;
8501 while ((*blank_p)->prev != NULL)
8502 *blank_p = (*blank_p)->prev;
8503 blank_t->next = *blank_p;
8504 (*blank_p)->prev = blank_t;
8505 (*blank_p) = blank_t;
8506 return TRUE;
8507 }
8508
8509 if (addr < blank_t->offset + blank_t->size)
8510 {
8511 if (addr > blank_t->offset + blank_t->size)
8512 blank_t->size = addr - blank_t->offset;
8513 }
8514 else
8515 {
8516 blank_t2 = create_nds32_elf_blank (addr, len);
8517 if (!blank_t2)
8518 return FALSE;
8519 if (blank_t->next)
8520 {
8521 blank_t->next->prev = blank_t2;
8522 blank_t2->next = blank_t->next;
8523 }
8524 blank_t2->prev = blank_t;
8525 blank_t->next = blank_t2;
8526 *blank_p = blank_t2;
8527 }
8528
8529 return TRUE;
8530}
8531
8532static bfd_boolean
8533insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8534 bfd_vma len)
8535{
8536 nds32_elf_blank_t *blank_t;
8537
8538 if (!insert_nds32_elf_blank (blank_p, addr, len))
8539 return FALSE;
8540
8541 blank_t = *blank_p;
8542
8543 if (!blank_t->prev)
8544 {
8545 blank_t->total_size = 0;
8546 blank_t = blank_t->next;
8547 }
8548
8549 while (blank_t)
8550 {
8551 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8552 blank_t = blank_t->next;
8553 }
8554
8555 return TRUE;
8556}
8557
8558static void
8559calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8560{
8561 nds32_elf_blank_t *blank_t;
8562 bfd_vma total_size = 0;
8563
8564 if (!blank_p)
8565 return;
8566
8567 blank_t = blank_p;
8568 while (blank_t->prev)
8569 blank_t = blank_t->prev;
8570 while (blank_t)
8571 {
8572 blank_t->total_size = total_size;
8573 total_size += blank_t->size;
8574 blank_t = blank_t->next;
8575 }
8576}
8577
8578static bfd_boolean
8579nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8580 nds32_elf_blank_t *blank_p)
8581{
8582 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8583 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC
8584 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8585 unsigned int sec_shndx; /* The section the be relaxed. */
8586 bfd_byte *contents; /* Contents data of iterating section. */
8587 Elf_Internal_Rela *internal_relocs;
8588 Elf_Internal_Rela *irel;
8589 Elf_Internal_Rela *irelend;
8590 struct elf_link_hash_entry **sym_hashes;
8591 struct elf_link_hash_entry **end_hashes;
8592 unsigned int symcount;
8593 asection *sect;
8594 nds32_elf_blank_t *blank_t;
8595 nds32_elf_blank_t *blank_t2;
8596 nds32_elf_blank_t *blank_head;
8597
8598 blank_head = blank_t = blank_p;
8599 while (blank_head->prev != NULL)
8600 blank_head = blank_head->prev;
8601 while (blank_t->next != NULL)
8602 blank_t = blank_t->next;
8603
8604 if (blank_t->offset + blank_t->size <= sec->size)
8605 {
8606 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8607 blank_t->next->prev = blank_t;
8608 }
8609 if (blank_head->offset > 0)
8610 {
8611 blank_head->prev = create_nds32_elf_blank (0, 0);
8612 blank_head->prev->next = blank_head;
8613 blank_head = blank_head->prev;
8614 }
8615
8616 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8617
8618 /* The deletion must stop at the next ALIGN reloc for an alignment
8619 power larger than the number of bytes we are deleting. */
8620
8621 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8622 if (!nds32_get_local_syms (abfd, sec, &isym))
8623 return FALSE;
8624
8625 if (isym == NULL)
8626 {
8627 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8628 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8629 symtab_hdr->contents = (bfd_byte *) isym;
8630 }
8631
8632 if (isym == NULL || symtab_hdr->sh_info == 0)
8633 return FALSE;
8634
8635 blank_t = blank_head;
8636 calc_nds32_blank_total (blank_head);
8637
8638 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8639 {
8640 /* Adjust all the relocs. */
8641
8642 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8643 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8644 TRUE /* keep_memory */);
8645 irelend = internal_relocs + sect->reloc_count;
8646
8647 blank_t = blank_head;
8648 blank_t2 = blank_head;
8649
8650 if (!(sect->flags & SEC_RELOC))
8651 continue;
8652
8653 nds32_get_section_contents (abfd, sect, &contents);
8654
8655 for (irel = internal_relocs; irel < irelend; irel++)
8656 {
8657 bfd_vma raddr;
8658
8659 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8660 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8661 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8662 {
8663 unsigned long val = 0;
1c8f6a4d
KLC
8664 unsigned long mask;
8665 long before, between;
8666 long offset;
35c08157
KLC
8667
8668 switch (ELF32_R_TYPE (irel->r_info))
8669 {
8670 case R_NDS32_DIFF8:
1c8f6a4d 8671 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC
8672 break;
8673 case R_NDS32_DIFF16:
1c8f6a4d 8674 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC
8675 break;
8676 case R_NDS32_DIFF32:
8677 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC
8678 /* Get the signed bit and mask for the high part. The
8679 gcc will alarm when right shift 32-bit since the
8680 type size of long may be 32-bit. */
8681 mask = 0 - (val >> 31);
8682 if (mask)
8683 offset = (val | (mask - 0xffffffff));
8684 else
8685 offset = val;
35c08157
KLC
8686 break;
8687 default:
8688 BFD_ASSERT (0);
8689 }
8690
8691 /* DIFF value
8692 0 |encoded in location|
8693 |------------|-------------------|---------
8694 sym+off(addend)
8695 -- before ---| *****************
8696 --------------------- between ---|
8697
1c8f6a4d
KLC
8698 We only care how much data are relax between DIFF,
8699 marked as ***. */
35c08157
KLC
8700
8701 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8702 between = get_nds32_elf_blank_total (&blank_t,
8703 irel->r_addend + offset, 0);
35c08157
KLC
8704 if (between == before)
8705 goto done_adjust_diff;
8706
8707 switch (ELF32_R_TYPE (irel->r_info))
8708 {
8709 case R_NDS32_DIFF8:
1c8f6a4d
KLC
8710 bfd_put_8 (abfd, offset - (between - before),
8711 contents + irel->r_offset);
35c08157
KLC
8712 break;
8713 case R_NDS32_DIFF16:
1c8f6a4d
KLC
8714 bfd_put_16 (abfd, offset - (between - before),
8715 contents + irel->r_offset);
35c08157
KLC
8716 break;
8717 case R_NDS32_DIFF32:
1c8f6a4d
KLC
8718 bfd_put_32 (abfd, offset - (between - before),
8719 contents + irel->r_offset);
35c08157
KLC
8720 break;
8721 }
8722 }
8723 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8724 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8725 {
8726 bfd_vma val = 0;
8727 unsigned int len = 0;
8728 unsigned long before, between;
8729 bfd_byte *endp, *p;
8730
1c8f6a4d
KLC
8731 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8732 &len);
35c08157
KLC
8733
8734 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8735 between = get_nds32_elf_blank_total (&blank_t,
8736 irel->r_addend + val, 0);
35c08157
KLC
8737 if (between == before)
8738 goto done_adjust_diff;
8739
8740 p = contents + irel->r_offset;
8741 endp = p + len -1;
8742 memset (p, 0x80, len);
8743 *(endp) = 0;
8744 p = write_uleb128 (p, val - (between - before)) - 1;
8745 if (p < endp)
8746 *p |= 0x80;
8747 }
8748done_adjust_diff:
8749
8750 if (sec == sect)
8751 {
8752 raddr = irel->r_offset;
1c8f6a4d
KLC
8753 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8754 irel->r_offset, 1);
35c08157
KLC
8755
8756 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8757 continue;
8758 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC
8759 && (blank_t2->offset > raddr
8760 || blank_t2->next->offset <= raddr))
8761 (*_bfd_error_handler)
8762 (_("%B: %s\n"), abfd,
8763 "Error: search_nds32_elf_blank reports wrong node");
35c08157
KLC
8764
8765 /* Mark reloc in deleted portion as NONE.
8766 For some relocs like R_NDS32_LABEL that doesn't modify the
8767 content in the section. R_NDS32_LABEL doesn't belong to the
8768 instruction in the section, so we should preserve it. */
8769 if (raddr >= blank_t2->offset
8770 && raddr < blank_t2->offset + blank_t2->size
8771 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8772 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8773 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8774 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8775 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8776 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8777 {
8778 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8779 R_NDS32_NONE);
8780 continue;
8781 }
8782 }
8783
8784 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8785 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8786 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8787 continue;
8788
8789 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8790 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8791 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8792 {
8793 if (irel->r_addend <= sec->size)
8794 irel->r_addend -=
8795 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8796 }
8797 }
8798 }
8799
8800 /* Adjust the local symbols defined in this section. */
8801 blank_t = blank_head;
8802 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8803 {
8804 if (isym->st_shndx == sec_shndx)
8805 {
8806 if (isym->st_value <= sec->size)
8807 {
8808 bfd_vma ahead;
8809 bfd_vma orig_addr = isym->st_value;
8810
8811 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8812 isym->st_value -= ahead;
8813
8814 /* Adjust function size. */
1c8f6a4d
KLC
8815 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8816 && isym->st_size > 0)
8817 isym->st_size -=
8818 get_nds32_elf_blank_total
8819 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC
8820 }
8821 }
8822 }
8823
8824 /* Now adjust the global symbols defined in this section. */
8825 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8826 - symtab_hdr->sh_info);
8827 sym_hashes = elf_sym_hashes (abfd);
8828 end_hashes = sym_hashes + symcount;
8829 blank_t = blank_head;
8830 for (; sym_hashes < end_hashes; sym_hashes++)
8831 {
8832 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8833
8834 if ((sym_hash->root.type == bfd_link_hash_defined
8835 || sym_hash->root.type == bfd_link_hash_defweak)
8836 && sym_hash->root.u.def.section == sec)
8837 {
8838 if (sym_hash->root.u.def.value <= sec->size)
8839 {
8840 bfd_vma ahead;
8841 bfd_vma orig_addr = sym_hash->root.u.def.value;
8842
8843 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8844 sym_hash->root.u.def.value -= ahead;
8845
8846 /* Adjust function size. */
8847 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC
8848 sym_hash->size -=
8849 get_nds32_elf_blank_total
8850 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC
8851
8852 }
8853 }
8854 }
8855
8856 contents = elf_section_data (sec)->this_hdr.contents;
8857 blank_t = blank_head;
8858 while (blank_t->next)
8859 {
8860 /* Actually delete the bytes. */
8861
8862 /* If current blank is the last blank overlap with current section,
8863 go to finish process. */
8864 if (sec->size <= (blank_t->next->offset))
8865 break;
8866
8867 memmove (contents + blank_t->offset - blank_t->total_size,
8868 contents + blank_t->offset + blank_t->size,
8869 blank_t->next->offset - (blank_t->offset + blank_t->size));
8870
8871 blank_t = blank_t->next;
8872 }
8873
8874 if (sec->size > (blank_t->offset + blank_t->size))
8875 {
8876 /* There are remaining code between blank and section boundary.
8877 Move the remaining code to appropriate location. */
8878 memmove (contents + blank_t->offset - blank_t->total_size,
8879 contents + blank_t->offset + blank_t->size,
8880 sec->size - (blank_t->offset + blank_t->size));
8881 sec->size -= blank_t->total_size + blank_t->size;
8882 }
8883 else
8884 /* This blank is not entirely included in the section,
8885 reduce the section size by only part of the blank size. */
8886 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8887
8888 while (blank_head)
8889 {
8890 blank_t = blank_head;
8891 blank_head = blank_head->next;
8892 remove_nds32_elf_blank (blank_t);
8893 }
8894
8895 return TRUE;
8896}
8897
8898/* Get the contents of a section. */
8899
8900static int
8901nds32_get_section_contents (bfd *abfd, asection *sec, bfd_byte **contents_p)
8902{
8903 /* Get the section contents. */
8904 if (elf_section_data (sec)->this_hdr.contents != NULL)
8905 *contents_p = elf_section_data (sec)->this_hdr.contents;
8906 else
8907 {
8908 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8909 return FALSE;
8910 elf_section_data (sec)->this_hdr.contents = *contents_p;
8911 }
8912
8913 return TRUE;
8914}
8915
8916/* Get the contents of the internal symbol of abfd. */
8917
8918static int
8919nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8920 Elf_Internal_Sym **isymbuf_p)
8921{
8922 Elf_Internal_Shdr *symtab_hdr;
8923 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8924
8925 /* Read this BFD's local symbols if we haven't done so already. */
8926 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8927 {
8928 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8929 if (*isymbuf_p == NULL)
8930 {
8931 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8932 symtab_hdr->sh_info, 0,
8933 NULL, NULL, NULL);
8934 if (*isymbuf_p == NULL)
8935 return FALSE;
8936 }
8937 }
8938 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8939
8940 return TRUE;
8941}
8942
8943/* Range of small data. */
1c8f6a4d
KLC
8944static bfd_vma sdata_range[2][2];
8945static bfd_vma const sdata_init_range[2] =
8946{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC
8947
8948static int
8949nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8950 bfd_byte *contents, bfd_vma addr)
8951{
8952 unsigned long insn = bfd_getb32 (contents + addr);
8953
8954 if (insn & 0x80000000)
8955 return 2;
8956
8957 return 4;
8958}
8959
8960/* Set the gp relax range. We have to measure the safe range
8961 to do gp relaxation. */
8962
8963static void
8964relax_range_measurement (bfd *abfd)
8965{
8966 asection *sec_f, *sec_b;
8967 /* For upper bound. */
8968 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8969 bfd_vma align;
35c08157
KLC
8970 static int decide_relax_range = 0;
8971 int i;
1c8f6a4d 8972 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC
8973
8974 if (decide_relax_range)
8975 return;
8976 decide_relax_range = 1;
8977
8978 if (sda_rela_sec == NULL)
8979 {
8980 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8981 for (i = 0; i < range_number; i++)
35c08157
KLC
8982 {
8983 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8984 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8985 }
8986 return;
8987 }
8988
8989 /* Get the biggest alignment power after the gp located section. */
8990 sec_f = sda_rela_sec->output_section;
8991 sec_b = sec_f->next;
8992 align = 0;
8993 while (sec_b != NULL)
8994 {
8995 if ((unsigned)(1 << sec_b->alignment_power) > align)
8996 align = (1 << sec_b->alignment_power);
8997 sec_b = sec_b->next;
8998 }
8999
9000 /* I guess we can not determine the section before
9001 gp located section, so we assume the align is max page size. */
1c8f6a4d 9002 for (i = 0; i < range_number; i++)
35c08157 9003 {
1c8f6a4d 9004 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9005 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9006 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC
9007 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9008 }
9009}
9010
9011/* These are macros used to check flags encoded in r_addend.
9012 They are only used by nds32_elf_relax_section (). */
9013#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9014#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9015#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9016#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9017
1c8f6a4d
KLC
9018/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9019
35c08157 9020static bfd_boolean
1c8f6a4d
KLC
9021nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9022 Elf_Internal_Rela *internal_relocs, int *insn_len,
9023 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9024 Elf_Internal_Shdr *symtab_hdr)
9025{
9026 /* There are 3 variations for LONGCALL1
9027 case 4-4-2; 16-bit on, optimize off or optimize for space
9028 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9029 ori ta, ta, lo12(symbol) ; LO12S0
9030 jral5 ta ;
9031
9032 case 4-4-4; 16-bit off, optimize don't care
9033 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9034 ori ta, ta, lo12(symbol) ; LO12S0
9035 jral ta ;
9036
9037 case 4-4-4; 16-bit on, optimize for speed
9038 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9039 ori ta, ta, lo12(symbol) ; LO12S0
9040 jral ta ;
9041 Check code for -mlong-calls output. */
9042
9043 /* Get the reloc for the address from which the register is
9044 being loaded. This reloc will tell us which function is
9045 actually being called. */
9046
9047 bfd_vma laddr;
9048 int seq_len; /* Original length of instruction sequence. */
35c08157 9049 uint32_t insn;
1c8f6a4d
KLC
9050 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9051 int pic_ext_target = 0;
9052 bfd_signed_vma foff;
35c08157 9053 uint16_t insn16;
35c08157 9054
1c8f6a4d
KLC
9055 irelend = internal_relocs + sec->reloc_count;
9056 seq_len = GET_SEQ_LEN (irel->r_addend);
9057 laddr = irel->r_offset;
9058 *insn_len = seq_len;
35c08157 9059
1c8f6a4d
KLC
9060 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9061 R_NDS32_HI20_RELA, laddr);
9062 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9063 R_NDS32_LO12S0_ORI_RELA,
9064 laddr + 4);
35c08157 9065
1c8f6a4d 9066 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157
KLC
9067 {
9068 (*_bfd_error_handler)
1c8f6a4d
KLC
9069 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9070 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9071 return FALSE;
35c08157
KLC
9072 }
9073
1c8f6a4d
KLC
9074 /* Get the value of the symbol referred to by the reloc. */
9075 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9076 &pic_ext_target);
35c08157 9077
1c8f6a4d
KLC
9078 /* This condition only happened when symbol is undefined. */
9079 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9080 || foff >= CONSERVATIVE_24BIT_S1)
9081 return FALSE;
35c08157 9082
1c8f6a4d
KLC
9083 /* Relax to: jal symbol; 25_PCREL */
9084 /* For simplicity of coding, we are going to modify the section
9085 contents, the section relocs, and the BFD symbol table. We
9086 must tell the rest of the code not to free up this
9087 information. It would be possible to instead create a table
9088 of changes which have to be made, as is done in coff-mips.c;
9089 that would be more work, but would require less memory when
9090 the linker is run. */
9091
9092 /* Replace the long call with a jal. */
9093 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9094 R_NDS32_25_PCREL_RELA);
9095 irel->r_addend = hi_irelfn->r_addend;
9096
9097 /* We don't resolve this here but resolve it in relocate_section. */
9098 insn = INSN_JAL;
9099 bfd_putb32 (insn, contents + irel->r_offset);
9100
9101 hi_irelfn->r_info =
9102 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9103 lo_irelfn->r_info =
9104 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9105 *insn_len = 4;
9106
9107 if (seq_len & 0x2)
9108 {
9109 insn16 = NDS32_NOP16;
9110 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9111 lo_irelfn->r_info =
9112 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9113 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9114 *insn_len += 2;
9115 }
9116 return TRUE;
9117}
35c08157 9118
1c8f6a4d
KLC
9119#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9120/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9121
1c8f6a4d
KLC
9122static bfd_boolean
9123nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9124 Elf_Internal_Rela *internal_relocs, int *insn_len,
9125 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9126 Elf_Internal_Shdr *symtab_hdr)
9127{
9128 /* bltz rt, .L1 ; LONGCALL2
9129 jal symbol ; 25_PCREL
9130 .L1: */
35c08157 9131
1c8f6a4d
KLC
9132 /* Get the reloc for the address from which the register is
9133 being loaded. This reloc will tell us which function is
9134 actually being called. */
35c08157 9135
1c8f6a4d
KLC
9136 bfd_vma laddr;
9137 uint32_t insn;
9138 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9139 int pic_ext_target = 0;
9140 bfd_signed_vma foff;
35c08157 9141
1c8f6a4d
KLC
9142 irelend = internal_relocs + sec->reloc_count;
9143 laddr = irel->r_offset;
9144 i1_irelfn =
9145 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9146 R_NDS32_25_PCREL_RELA, laddr + 4);
9147
9148 if (i1_irelfn == irelend)
35c08157 9149 {
1c8f6a4d
KLC
9150 (*_bfd_error_handler)
9151 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9152 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9153 return FALSE;
35c08157
KLC
9154 }
9155
1c8f6a4d 9156 insn = bfd_getb32 (contents + laddr);
35c08157 9157
1c8f6a4d
KLC
9158 /* Get the value of the symbol referred to by the reloc. */
9159 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9160 &pic_ext_target);
35c08157 9161
1c8f6a4d
KLC
9162 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9163 || foff >= CONSERVATIVE_16BIT_S1)
9164 return FALSE;
35c08157 9165
1c8f6a4d
KLC
9166 /* Relax to bgezal rt, label ; 17_PCREL
9167 or bltzal rt, label ; 17_PCREL */
9168
9169 /* Convert to complimentary conditional call. */
9170 insn = CONVERT_CONDITION_CALL (insn);
9171
9172 /* For simplicity of coding, we are going to modify the section
9173 contents, the section relocs, and the BFD symbol table. We
9174 must tell the rest of the code not to free up this
9175 information. It would be possible to instead create a table
9176 of changes which have to be made, as is done in coff-mips.c;
9177 that would be more work, but would require less memory when
9178 the linker is run. */
9179
9180 /* Clean unnessary relocations. */
9181 i1_irelfn->r_info =
9182 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9183 cond_irelfn =
9184 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9185 R_NDS32_17_PCREL_RELA, laddr);
9186 if (cond_irelfn != irelend)
9187 cond_irelfn->r_info =
9188 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9189
9190 /* Replace the long call with a bgezal. */
9191 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9192 R_NDS32_17_PCREL_RELA);
9193 irel->r_addend = i1_irelfn->r_addend;
9194
9195 bfd_putb32 (insn, contents + irel->r_offset);
9196
9197 *insn_len = 4;
9198 return TRUE;
9199}
35c08157 9200
1c8f6a4d
KLC
9201/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9202
9203static bfd_boolean
9204nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9205 Elf_Internal_Rela *internal_relocs, int *insn_len,
9206 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9207 Elf_Internal_Shdr *symtab_hdr)
9208{
9209 /* There are 3 variations for LONGCALL3
9210 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9211 bltz rt, $1 ; LONGCALL3
9212 sethi ta, hi20(symbol) ; HI20
9213 ori ta, ta, lo12(symbol) ; LO12S0
9214 jral5 ta ;
9215 $1
9216
9217 case 4-4-4-4; 16-bit off, optimize don't care
9218 bltz rt, $1 ; LONGCALL3
9219 sethi ta, hi20(symbol) ; HI20
9220 ori ta, ta, lo12(symbol) ; LO12S0
9221 jral ta ;
9222 $1
9223
9224 case 4-4-4-4; 16-bit on, optimize for speed
9225 bltz rt, $1 ; LONGCALL3
9226 sethi ta, hi20(symbol) ; HI20
9227 ori ta, ta, lo12(symbol) ; LO12S0
9228 jral ta ;
9229 $1 */
9230
9231 /* Get the reloc for the address from which the register is
9232 being loaded. This reloc will tell us which function is
9233 actually being called. */
9234
9235 bfd_vma laddr;
9236 int seq_len; /* Original length of instruction sequence. */
9237 uint32_t insn;
9238 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9239 int pic_ext_target = 0;
9240 bfd_signed_vma foff;
9241 uint16_t insn16;
9242
9243 irelend = internal_relocs + sec->reloc_count;
9244 seq_len = GET_SEQ_LEN (irel->r_addend);
9245 laddr = irel->r_offset;
9246 *insn_len = seq_len;
9247
9248 hi_irelfn =
9249 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9250 R_NDS32_HI20_RELA, laddr + 4);
9251 lo_irelfn =
9252 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9253 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9254
9255 if (hi_irelfn == irelend || lo_irelfn == irelend)
9256 {
9257 (*_bfd_error_handler)
9258 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9259 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9260 return FALSE;
35c08157
KLC
9261 }
9262
1c8f6a4d
KLC
9263 /* Get the value of the symbol referred to by the reloc. */
9264 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9265 &pic_ext_target);
35c08157 9266
1c8f6a4d
KLC
9267 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9268 || foff >= CONSERVATIVE_24BIT_S1)
9269 return FALSE;
35c08157 9270
1c8f6a4d
KLC
9271 insn = bfd_getb32 (contents + laddr);
9272 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9273 {
1c8f6a4d
KLC
9274 /* Relax to bgezal rt, label ; 17_PCREL
9275 or bltzal rt, label ; 17_PCREL */
35c08157 9276
1c8f6a4d
KLC
9277 /* Convert to complimentary conditional call. */
9278 insn = CONVERT_CONDITION_CALL (insn);
9279 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9280
1c8f6a4d
KLC
9281 *insn_len = 4;
9282 irel->r_info =
9283 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9284 hi_irelfn->r_info =
9285 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9286 lo_irelfn->r_info =
9287 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9288
9289 cond_irelfn =
9290 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9291 R_NDS32_17_PCREL_RELA, laddr);
9292 if (cond_irelfn != irelend)
35c08157 9293 {
1c8f6a4d
KLC
9294 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9295 R_NDS32_17_PCREL_RELA);
9296 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9297 }
1c8f6a4d
KLC
9298
9299 if (seq_len & 0x2)
35c08157 9300 {
1c8f6a4d
KLC
9301 insn16 = NDS32_NOP16;
9302 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9303 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9304 R_NDS32_INSN16);
9305 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9306 insn_len += 2;
35c08157 9307 }
1c8f6a4d
KLC
9308 }
9309 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9310 {
9311 /* Relax to the following instruction sequence
9312 bltz rt, $1 ; LONGCALL2
9313 jal symbol ; 25_PCREL
9314 $1 */
9315 *insn_len = 8;
9316 insn = INSN_JAL;
9317 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9318
1c8f6a4d
KLC
9319 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9320 R_NDS32_25_PCREL_RELA);
9321 irel->r_info =
9322 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9323
9324 lo_irelfn->r_info =
9325 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9326
1c8f6a4d 9327 if (seq_len & 0x2)
35c08157 9328 {
1c8f6a4d
KLC
9329 insn16 = NDS32_NOP16;
9330 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9331 lo_irelfn->r_info =
9332 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9333 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9334 insn_len += 2;
9335 }
9336 }
9337 return TRUE;
9338}
35c08157 9339
1c8f6a4d 9340/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9341
1c8f6a4d
KLC
9342static bfd_boolean
9343nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9344 Elf_Internal_Rela *internal_relocs, int *insn_len,
9345 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9346 Elf_Internal_Shdr *symtab_hdr)
9347{
9348 /* There are 3 variations for LONGJUMP1
9349 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9350 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9351 ori ta, ta, lo12(symbol) ; LO12S0
9352 jr5 ta ;
9353
9354 case 4-4-4; 16-bit off, optimize don't care
9355 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9356 ori ta, ta, lo12(symbol) ; LO12S0
9357 jr ta ;
9358
9359 case 4-4-4; 16-bit on, optimize for speed
9360 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9361 ori ta, ta, lo12(symbol) ; LO12S0
9362 jr ta ; */
9363
9364 /* Get the reloc for the address from which the register is
9365 being loaded. This reloc will tell us which function is
9366 actually being called. */
9367
9368 bfd_vma laddr;
9369 int seq_len; /* Original length of instruction sequence. */
9370 int insn16_on; /* 16-bit on/off. */
9371 uint32_t insn;
9372 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9373 int pic_ext_target = 0;
9374 bfd_signed_vma foff;
9375 uint16_t insn16;
9376 unsigned long reloc;
35c08157 9377
1c8f6a4d
KLC
9378 irelend = internal_relocs + sec->reloc_count;
9379 seq_len = GET_SEQ_LEN (irel->r_addend);
9380 laddr = irel->r_offset;
9381 *insn_len = seq_len;
9382 insn16_on = IS_16BIT_ON (irel->r_addend);
9383
9384 hi_irelfn =
9385 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9386 R_NDS32_HI20_RELA, laddr);
9387 lo_irelfn =
9388 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9389 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9390 if (hi_irelfn == irelend || lo_irelfn == irelend)
9391 {
9392 (*_bfd_error_handler)
9393 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9394 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9395 return FALSE;
9396 }
35c08157 9397
1c8f6a4d
KLC
9398 /* Get the value of the symbol referred to by the reloc. */
9399 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9400 &pic_ext_target);
35c08157 9401
1c8f6a4d
KLC
9402 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9403 || foff < -CONSERVATIVE_24BIT_S1)
9404 return FALSE;
35c08157 9405
1c8f6a4d
KLC
9406 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9407 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9408 {
9409 /* j8 label */
9410 /* 16-bit on, but not optimized for speed. */
9411 reloc = R_NDS32_9_PCREL_RELA;
9412 insn16 = INSN_J8;
9413 bfd_putb16 (insn16, contents + irel->r_offset);
9414 *insn_len = 2;
9415 irel->r_info =
9416 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9417 }
9418 else
9419 {
9420 /* j label */
9421 reloc = R_NDS32_25_PCREL_RELA;
9422 insn = INSN_J;
9423 bfd_putb32 (insn, contents + irel->r_offset);
9424 *insn_len = 4;
9425 irel->r_info =
9426 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9427 irel->r_addend = 0;
9428 }
35c08157 9429
1c8f6a4d
KLC
9430 hi_irelfn->r_info =
9431 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9432 lo_irelfn->r_info =
9433 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9434
1c8f6a4d
KLC
9435 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9436 {
9437 insn16 = NDS32_NOP16;
9438 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9439 lo_irelfn->r_info =
9440 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9441 R_NDS32_INSN16);
9442 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9443 *insn_len += 2;
9444 }
9445 return TRUE;
9446}
9447
9448/* Revert condition branch. This function does not check if the input
9449 instruction is condition branch or not. */
9450
9451static void
9452nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9453 uint16_t *re_insn16, uint32_t *re_insn)
9454{
9455 uint32_t comp_insn = 0;
9456 uint16_t comp_insn16 = 0;
9457
9458 if (insn)
9459 {
9460 if (N32_OP6 (insn) == N32_OP6_BR1)
9461 {
9462 /* beqs label. */
9463 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9464 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9465 {
1c8f6a4d
KLC
9466 /* Insn can be contracted to 16-bit implied r5. */
9467 comp_insn16 =
9468 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9469 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9470 }
1c8f6a4d
KLC
9471 }
9472 else if (N32_OP6 (insn) == N32_OP6_BR3)
9473 {
9474 /* bnec $ta, imm11, label. */
9475 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9476 }
9477 else
9478 {
9479 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9480 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9481 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9482 {
1c8f6a4d 9483 if (N32_IS_RT3 (insn))
35c08157 9484 {
1c8f6a4d
KLC
9485 /* Insn can be contracted to 16-bit. */
9486 comp_insn16 =
9487 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9488 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9489 }
9490 else if (N32_RT5 (insn) == REG_R15)
9491 {
9492 /* Insn can be contracted to 16-bit. */
9493 comp_insn16 =
9494 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9495 }
35c08157
KLC
9496 }
9497 }
1c8f6a4d
KLC
9498 }
9499 else
9500 {
9501 switch ((insn16 & 0xf000) >> 12)
35c08157 9502 {
1c8f6a4d
KLC
9503 case 0xc:
9504 /* beqz38 or bnez38 */
9505 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9506 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9507 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9508 break;
35c08157 9509
1c8f6a4d
KLC
9510 case 0xd:
9511 /* beqs38 or bnes38 */
9512 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9513 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9514 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9515 | (REG_R5 << 15);
9516 break;
35c08157 9517
1c8f6a4d
KLC
9518 case 0xe:
9519 /* beqzS8 or bnezS8 */
9520 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9521 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9522 comp_insn |= REG_R15 << 20;
9523 break;
35c08157 9524
1c8f6a4d
KLC
9525 default:
9526 break;
9527 }
9528 }
9529 if (comp_insn && re_insn)
9530 *re_insn = comp_insn;
9531 if (comp_insn16 && re_insn16)
9532 *re_insn16 = comp_insn16;
9533}
35c08157 9534
1c8f6a4d 9535/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9536
1c8f6a4d
KLC
9537static bfd_boolean
9538nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9539 Elf_Internal_Rela *internal_relocs, int *insn_len,
9540 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9541 Elf_Internal_Shdr *symtab_hdr)
9542{
9543 /* There are 3 variations for LONGJUMP2
9544 case 2-4; 1st insn convertible, 16-bit on,
9545 optimize off or optimize for space
9546 bnes38 rt, ra, $1 ; LONGJUMP2
9547 j label ; 25_PCREL
9548 $1:
9549
9550 case 4-4; 1st insn not convertible
9551 bne rt, ra, $1 ; LONGJUMP2
9552 j label ; 25_PCREL
9553 $1:
9554
9555 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9556 bne rt, ra, $1 ; LONGJUMP2
9557 j label ; 25_PCREL
9558 $1: */
9559
9560 /* Get the reloc for the address from which the register is
9561 being loaded. This reloc will tell us which function is
9562 actually being called. */
9563
9564 bfd_vma laddr;
9565 int seq_len; /* Original length of instruction sequence. */
9566 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9567 int pic_ext_target = 0, first_size;
9568 unsigned int i;
9569 bfd_signed_vma foff;
9570 uint32_t insn, re_insn = 0;
9571 uint16_t insn16, re_insn16 = 0;
9572 unsigned long reloc, cond_reloc;
35c08157 9573
1c8f6a4d
KLC
9574 enum elf_nds32_reloc_type checked_types[] =
9575 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9576
1c8f6a4d
KLC
9577 irelend = internal_relocs + sec->reloc_count;
9578 seq_len = GET_SEQ_LEN (irel->r_addend);
9579 laddr = irel->r_offset;
9580 *insn_len = seq_len;
9581 first_size = (seq_len == 6) ? 2 : 4;
9582
9583 i2_irelfn =
9584 find_relocs_at_address_addr (irel, internal_relocs,
9585 irelend, R_NDS32_25_PCREL_RELA,
9586 laddr + first_size);
9587
9588 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9589 {
9590 cond_irelfn =
9591 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9592 checked_types[i], laddr);
9593 if (cond_irelfn != irelend)
9594 break;
9595 }
35c08157 9596
1c8f6a4d
KLC
9597 if (i2_irelfn == irelend || cond_irelfn == irelend)
9598 {
9599 (*_bfd_error_handler)
9600 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9601 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9602 return FALSE;
9603 }
35c08157 9604
1c8f6a4d
KLC
9605 /* Get the value of the symbol referred to by the reloc. */
9606 foff =
9607 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9608 &pic_ext_target);
9609 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9610 || foff >= CONSERVATIVE_16BIT_S1)
9611 return FALSE;
35c08157 9612
1c8f6a4d
KLC
9613 /* Get the all corresponding instructions. */
9614 if (first_size == 4)
9615 {
9616 insn = bfd_getb32 (contents + laddr);
9617 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9618 }
9619 else
9620 {
9621 insn16 = bfd_getb16 (contents + laddr);
9622 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9623 }
35c08157 9624
1c8f6a4d
KLC
9625 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9626 && foff < ACCURATE_8BIT_S1 - first_size)
9627 {
9628 if (first_size == 4)
9629 {
9630 /* Don't convert it to 16-bit now, keep this as relaxable for
9631 ``label reloc; INSN16''. */
35c08157 9632
1c8f6a4d
KLC
9633 /* Save comp_insn32 to buffer. */
9634 bfd_putb32 (re_insn, contents + irel->r_offset);
9635 *insn_len = 4;
9636 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9637 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9638 cond_reloc = R_NDS32_INSN16;
9639 }
9640 else
9641 {
9642 bfd_putb16 (re_insn16, contents + irel->r_offset);
9643 *insn_len = 2;
9644 reloc = R_NDS32_9_PCREL_RELA;
9645 cond_reloc = R_NDS32_NONE;
9646 }
9647 }
9648 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9649 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9650 && foff < ACCURATE_14BIT_S1 - first_size))
9651 {
9652 /* beqs label ; 15_PCREL */
9653 bfd_putb32 (re_insn, contents + irel->r_offset);
9654 *insn_len = 4;
9655 reloc = R_NDS32_15_PCREL_RELA;
9656 cond_reloc = R_NDS32_NONE;
9657 }
9658 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9659 && foff >= -CONSERVATIVE_16BIT_S1
9660 && foff < CONSERVATIVE_16BIT_S1)
9661 {
9662 /* beqz label ; 17_PCREL */
9663 bfd_putb32 (re_insn, contents + irel->r_offset);
9664 *insn_len = 4;
9665 reloc = R_NDS32_17_PCREL_RELA;
9666 cond_reloc = R_NDS32_NONE;
9667 }
9668 else
9669 return FALSE;
35c08157 9670
1c8f6a4d
KLC
9671 /* Set all relocations. */
9672 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9673 irel->r_addend = i2_irelfn->r_addend;
35c08157 9674
1c8f6a4d
KLC
9675 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9676 cond_reloc);
9677 cond_irelfn->r_addend = 0;
35c08157 9678
1c8f6a4d
KLC
9679 if ((seq_len ^ *insn_len ) & 0x2)
9680 {
9681 insn16 = NDS32_NOP16;
9682 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9683 i2_irelfn->r_offset = 4;
9684 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9685 R_NDS32_INSN16);
9686 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9687 *insn_len += 2;
9688 }
9689 else
9690 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9691 R_NDS32_NONE);
9692 return TRUE;
9693}
35c08157 9694
1c8f6a4d 9695/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9696
1c8f6a4d
KLC
9697static bfd_boolean
9698nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9699 Elf_Internal_Rela *internal_relocs, int *insn_len,
9700 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9701 Elf_Internal_Shdr *symtab_hdr)
9702{
9703 /* There are 5 variations for LONGJUMP3
9704 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9705 optimize off or optimize for space
9706 bnes38 rt, ra, $1 ; LONGJUMP3
9707 sethi ta, hi20(symbol) ; HI20
9708 ori ta, ta, lo12(symbol) ; LO12S0
9709 jr5 ta ;
9710 $1: ;
9711
9712 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9713 bnes38 rt, ra, $1 ; LONGJUMP3
9714 sethi ta, hi20(symbol) ; HI20
9715 ori ta, ta, lo12(symbol) ; LO12S0
9716 jr5 ta ;
9717 $1: ; LABEL
9718
9719 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9720 optimize off or optimize for space
9721 bne rt, ra, $1 ; LONGJUMP3
9722 sethi ta, hi20(symbol) ; HI20
9723 ori ta, ta, lo12(symbol) ; LO12S0
9724 jr5 ta ;
9725 $1: ;
9726
9727 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9728 16-bit off if no INSN16
9729 bne rt, ra, $1 ; LONGJUMP3
9730 sethi ta, hi20(symbol) ; HI20
9731 ori ta, ta, lo12(symbol) ; LO12S0
9732 jr ta ;
9733 $1: ;
9734
9735 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9736 16-bit off if no INSN16
9737 bne rt, ra, $1 ; LONGJUMP3
9738 sethi ta, hi20(symbol) ; HI20
9739 ori ta, ta, lo12(symbol) ; LO12S0
9740 jr ta ;
9741 $1: ; LABEL */
9742
9743 /* Get the reloc for the address from which the register is
9744 being loaded. This reloc will tell us which function is
9745 actually being called. */
9746 enum elf_nds32_reloc_type checked_types[] =
9747 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9748
9749 int reloc_off = 0, cond_removed = 0, convertible;
9750 bfd_vma laddr;
9751 int seq_len; /* Original length of instruction sequence. */
9752 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9753 int pic_ext_target = 0, first_size;
9754 unsigned int i;
9755 bfd_signed_vma foff;
9756 uint32_t insn, re_insn = 0;
9757 uint16_t insn16, re_insn16 = 0;
9758 unsigned long reloc, cond_reloc;
35c08157 9759
1c8f6a4d
KLC
9760 irelend = internal_relocs + sec->reloc_count;
9761 seq_len = GET_SEQ_LEN (irel->r_addend);
9762 laddr = irel->r_offset;
9763 *insn_len = seq_len;
35c08157 9764
1c8f6a4d 9765 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9766
1c8f6a4d
KLC
9767 if (convertible)
9768 first_size = 2;
9769 else
9770 first_size = 4;
9771
9772 /* Get all needed relocations. */
9773 hi_irelfn =
9774 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9775 R_NDS32_HI20_RELA, laddr + first_size);
9776 lo_irelfn =
9777 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9778 R_NDS32_LO12S0_ORI_RELA,
9779 laddr + first_size + 4);
9780
9781 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9782 {
9783 cond_irelfn =
9784 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9785 checked_types[i], laddr);
9786 if (cond_irelfn != irelend)
9787 break;
9788 }
35c08157 9789
1c8f6a4d
KLC
9790 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9791 {
9792 (*_bfd_error_handler)
9793 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9794 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9795 return FALSE;
9796 }
35c08157 9797
1c8f6a4d
KLC
9798 /* Get the value of the symbol referred to by the reloc. */
9799 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9800 &pic_ext_target);
35c08157 9801
1c8f6a4d
KLC
9802 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9803 || foff >= CONSERVATIVE_24BIT_S1)
9804 return FALSE;
35c08157 9805
1c8f6a4d
KLC
9806 /* Get the all corresponding instructions. */
9807 if (first_size == 4)
9808 {
9809 insn = bfd_getb32 (contents + laddr);
9810 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9811 }
9812 else
9813 {
9814 insn16 = bfd_getb16 (contents + laddr);
9815 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9816 }
35c08157 9817
1c8f6a4d
KLC
9818 /* For simplicity of coding, we are going to modify the section
9819 contents, the section relocs, and the BFD symbol table. We
9820 must tell the rest of the code not to free up this
9821 information. It would be possible to instead create a table
9822 of changes which have to be made, as is done in coff-mips.c;
9823 that would be more work, but would require less memory when
9824 the linker is run. */
35c08157 9825
1c8f6a4d
KLC
9826 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9827 && foff < ACCURATE_8BIT_S1 - first_size)
9828 {
9829 if (!(seq_len & 0x2))
9830 {
9831 /* Don't convert it to 16-bit now, keep this as relaxable
9832 for ``label reloc; INSN1a''6. */
9833 /* Save comp_insn32 to buffer. */
9834 bfd_putb32 (re_insn, contents + irel->r_offset);
9835 *insn_len = 4;
9836 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9837 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9838 cond_reloc = R_NDS32_INSN16;
9839 }
9840 else
9841 {
9842 /* Not optimize for speed; convert sequence to 16-bit. */
9843 /* Save comp_insn16 to buffer. */
9844 bfd_putb16 (re_insn16, contents + irel->r_offset);
9845 *insn_len = 2;
9846 reloc = R_NDS32_9_PCREL_RELA;
9847 cond_reloc = R_NDS32_NONE;
9848 }
9849 cond_removed = 1;
9850 }
9851 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9852 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9853 && foff < ACCURATE_14BIT_S1 - first_size))
9854 {
9855 /* beqs label ; 15_PCREL */
9856 bfd_putb32 (re_insn, contents + irel->r_offset);
9857 *insn_len = 4;
9858 reloc = R_NDS32_15_PCREL_RELA;
9859 cond_reloc = R_NDS32_NONE;
9860 cond_removed = 1;
9861 }
9862 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9863 && foff >= -CONSERVATIVE_16BIT_S1
9864 && foff < CONSERVATIVE_16BIT_S1)
9865 {
9866 /* beqz label ; 17_PCREL */
9867 bfd_putb32 (re_insn, contents + irel->r_offset);
9868 *insn_len = 4;
9869 reloc = R_NDS32_17_PCREL_RELA;
9870 cond_reloc = R_NDS32_NONE;
9871 cond_removed = 1;
9872 }
9873 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9874 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9875 {
9876 /* Relax to one of the following 3 variations
9877
9878 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9879 for space
9880 bnes38 rt, $1 ; LONGJUMP2
9881 j label ; 25_PCREL
9882 $1
9883
9884 case 4-4; 1st insn not convertible, others don't care
9885 bne rt, ra, $1 ; LONGJUMP2
9886 j label ; 25_PCREL
9887 $1
9888
9889 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9890 bne rt, ra, $1 ; LONGJUMP2
9891 j label ; 25_PCREL
9892 $1 */
9893
9894 /* Offset for first instruction. */
9895
9896 /* Use j label as second instruction. */
9897 *insn_len = 4 + first_size;
9898 insn = INSN_J;
9899 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9900 reloc = R_NDS32_LONGJUMP2;
9901 cond_reloc = R_NDS32_25_PLTREL;
9902 }
9903 else
9904 return FALSE;
35c08157 9905
1c8f6a4d
KLC
9906 if (cond_removed == 1)
9907 {
9908 /* Set all relocations. */
9909 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9910 irel->r_addend = hi_irelfn->r_addend;
9911
9912 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9913 cond_reloc);
9914 cond_irelfn->r_addend = 0;
9915 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9916 R_NDS32_NONE);
9917 }
9918 else
9919 {
9920 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9921 irel->r_addend = irel->r_addend;
9922 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9923 cond_reloc);
9924 }
35c08157 9925
1c8f6a4d
KLC
9926 if ((seq_len ^ *insn_len ) & 0x2)
9927 {
9928 insn16 = NDS32_NOP16;
9929 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9930 lo_irelfn->r_offset = *insn_len;
9931 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9932 R_NDS32_INSN16);
9933 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9934 *insn_len += 2;
9935 }
9936 else
9937 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9938 R_NDS32_NONE);
9939 return TRUE;
9940}
35c08157 9941
1c8f6a4d 9942/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9943
1c8f6a4d
KLC
9944static bfd_boolean
9945nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9946 Elf_Internal_Rela *internal_relocs, int *insn_len,
9947 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9948 Elf_Internal_Shdr *symtab_hdr)
9949{
9950 /* The pattern for LONGCALL4. Support for function cse.
9951 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9952 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9953 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9954
1c8f6a4d
KLC
9955 bfd_vma laddr;
9956 uint32_t insn;
9957 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9958 Elf_Internal_Rela *irelend;
9959 int pic_ext_target = 0;
9960 bfd_signed_vma foff;
35c08157 9961
1c8f6a4d
KLC
9962 irelend = internal_relocs + sec->reloc_count;
9963 laddr = irel->r_offset;
35c08157 9964
1c8f6a4d
KLC
9965 /* Get the reloc for the address from which the register is
9966 being loaded. This reloc will tell us which function is
9967 actually being called. */
9968 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9969 R_NDS32_HI20_RELA, laddr);
35c08157 9970
1c8f6a4d
KLC
9971 if (hi_irel == irelend)
9972 {
9973 (*_bfd_error_handler)
9974 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9975 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9976 return FALSE;
9977 }
35c08157 9978
1c8f6a4d
KLC
9979 /* Get the value of the symbol referred to by the reloc. */
9980 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9981 &pic_ext_target);
35c08157 9982
1c8f6a4d
KLC
9983 /* This condition only happened when symbol is undefined. */
9984 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9985 || foff >= CONSERVATIVE_24BIT_S1)
9986 return FALSE;
35c08157 9987
1c8f6a4d
KLC
9988 /* Relax to: jal symbol; 25_PCREL */
9989 /* For simplicity of coding, we are going to modify the section
9990 contents, the section relocs, and the BFD symbol table. We
9991 must tell the rest of the code not to free up this
9992 information. It would be possible to instead create a table
9993 of changes which have to be made, as is done in coff-mips.c;
9994 that would be more work, but would require less memory when
9995 the linker is run. */
35c08157 9996
1c8f6a4d
KLC
9997 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9998 R_NDS32_PTR_RESOLVED, irel->r_addend);
9999 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10000 R_NDS32_EMPTY, irel->r_addend);
35c08157 10001
1c8f6a4d
KLC
10002 if (ptr_irel == irelend || em_irel == irelend)
10003 {
10004 (*_bfd_error_handler)
10005 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10006 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10007 return FALSE;
10008 }
10009 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10010 insn = bfd_getb32 (contents + irel->r_addend);
10011 if (insn & 0x80000000)
10012 return FALSE;
35c08157 10013
1c8f6a4d
KLC
10014 /* Replace the long call with a jal. */
10015 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10016 R_NDS32_25_PCREL_RELA);
10017 ptr_irel->r_addend = 1;
35c08157 10018
1c8f6a4d
KLC
10019 /* We don't resolve this here but resolve it in relocate_section. */
10020 insn = INSN_JAL;
10021 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10022
1c8f6a4d
KLC
10023 irel->r_info =
10024 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10025
1c8f6a4d
KLC
10026 /* If there is function cse, HI20 can not remove now. */
10027 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10028 R_NDS32_LONGCALL4, laddr);
10029 if (call_irel == irelend)
10030 {
10031 *insn_len = 0;
10032 hi_irel->r_info =
10033 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10034 }
35c08157 10035
1c8f6a4d
KLC
10036 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10037 R_NDS32_INSN16, irel->r_addend);
10038 if (insn_irel != irelend)
10039 insn_irel->r_info =
10040 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10041
1c8f6a4d
KLC
10042 return TRUE;
10043}
35c08157 10044
1c8f6a4d 10045/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10046
1c8f6a4d
KLC
10047static bfd_boolean
10048nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10049 Elf_Internal_Rela *internal_relocs, int *insn_len,
10050 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10051 Elf_Internal_Shdr *symtab_hdr)
10052{
10053 /* The pattern for LONGCALL5.
10054 bltz rt, .L1 ; LONGCALL5/17_PCREL
10055 jal symbol ; 25_PCREL
10056 .L1: */
35c08157 10057
1c8f6a4d
KLC
10058 bfd_vma laddr;
10059 uint32_t insn;
10060 Elf_Internal_Rela *cond_irel, *irelend;
10061 int pic_ext_target = 0;
10062 bfd_signed_vma foff;
35c08157 10063
1c8f6a4d
KLC
10064 irelend = internal_relocs + sec->reloc_count;
10065 laddr = irel->r_offset;
10066 insn = bfd_getb32 (contents + laddr);
35c08157 10067
1c8f6a4d
KLC
10068 /* Get the reloc for the address from which the register is
10069 being loaded. This reloc will tell us which function is
10070 actually being called. */
10071 cond_irel =
10072 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10073 R_NDS32_25_PCREL_RELA, irel->r_addend);
10074 if (cond_irel == irelend)
10075 {
10076 (*_bfd_error_handler)
10077 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10078 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10079 return FALSE;
10080 }
35c08157 10081
1c8f6a4d
KLC
10082 /* Get the value of the symbol referred to by the reloc. */
10083 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10084 &pic_ext_target);
35c08157 10085
1c8f6a4d
KLC
10086 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10087 || foff >= CONSERVATIVE_16BIT_S1)
10088 return FALSE;
35c08157 10089
1c8f6a4d
KLC
10090 /* Relax to bgezal rt, label ; 17_PCREL
10091 or bltzal rt, label ; 17_PCREL */
35c08157 10092
1c8f6a4d
KLC
10093 /* Convert to complimentary conditional call. */
10094 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10095
1c8f6a4d
KLC
10096 /* For simplicity of coding, we are going to modify the section
10097 contents, the section relocs, and the BFD symbol table. We
10098 must tell the rest of the code not to free up this
10099 information. It would be possible to instead create a table
10100 of changes which have to be made, as is done in coff-mips.c;
10101 that would be more work, but would require less memory when
10102 the linker is run. */
35c08157 10103
1c8f6a4d
KLC
10104 /* Modify relocation and contents. */
10105 cond_irel->r_info =
10106 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10107
1c8f6a4d
KLC
10108 /* Replace the long call with a bgezal. */
10109 bfd_putb32 (insn, contents + cond_irel->r_offset);
10110 *insn_len = 0;
35c08157 10111
1c8f6a4d
KLC
10112 /* Clean unnessary relocations. */
10113 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10114
1c8f6a4d
KLC
10115 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10116 R_NDS32_17_PCREL_RELA, laddr);
10117 cond_irel->r_info =
10118 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10119
1c8f6a4d
KLC
10120 return TRUE;
10121}
35c08157 10122
1c8f6a4d 10123/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10124
1c8f6a4d
KLC
10125static bfd_boolean
10126nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10127 Elf_Internal_Rela *internal_relocs, int *insn_len,
10128 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10129 Elf_Internal_Shdr *symtab_hdr)
10130{
10131 /* The pattern for LONGCALL6.
10132 bltz rt, .L1 ; LONGCALL6/17_PCREL
10133 sethi ta, hi20(symbol) ; HI20/PTR
10134 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10135 jral ta ; PTR_RES/EMPTY/INSN16
10136 .L1 */
10137
10138 bfd_vma laddr;
10139 uint32_t insn;
10140 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10141 int pic_ext_target = 0;
10142 bfd_signed_vma foff;
35c08157 10143
1c8f6a4d
KLC
10144 irelend = internal_relocs + sec->reloc_count;
10145 laddr = irel->r_offset;
35c08157 10146
1c8f6a4d
KLC
10147 /* Get the reloc for the address from which the register is
10148 being loaded. This reloc will tell us which function is
10149 actually being called. */
10150 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10151 R_NDS32_EMPTY, irel->r_addend);
35c08157 10152
1c8f6a4d
KLC
10153 if (em_irel == irelend)
10154 {
10155 (*_bfd_error_handler)
10156 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10157 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10158 return FALSE;
10159 }
35c08157 10160
1c8f6a4d
KLC
10161 /* Get the value of the symbol referred to by the reloc. */
10162 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10163 &pic_ext_target);
35c08157 10164
1c8f6a4d
KLC
10165 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10166 || foff >= CONSERVATIVE_24BIT_S1)
10167 return FALSE;
35c08157 10168
1c8f6a4d
KLC
10169 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10170 insn = bfd_getb32 (contents + irel->r_addend);
10171 if (insn & 0x80000000)
10172 return FALSE;
35c08157 10173
1c8f6a4d
KLC
10174 insn = bfd_getb32 (contents + laddr);
10175 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10176 {
10177 /* Relax to bgezal rt, label ; 17_PCREL
10178 or bltzal rt, label ; 17_PCREL */
35c08157 10179
1c8f6a4d
KLC
10180 /* Convert to complimentary conditional call. */
10181 *insn_len = 0;
10182 insn = CONVERT_CONDITION_CALL (insn);
10183 bfd_putb32 (insn, contents + em_irel->r_offset);
10184
10185 em_irel->r_info =
10186 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10187
10188 /* Set resolved relocation. */
10189 cond_irel =
10190 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10191 R_NDS32_PTR_RESOLVED, irel->r_addend);
10192 if (cond_irel == irelend)
35c08157 10193 {
1c8f6a4d
KLC
10194 (*_bfd_error_handler)
10195 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10196 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10197 return FALSE;
10198 }
10199 cond_irel->r_addend = 1;
35c08157 10200
1c8f6a4d 10201 /* Clear relocations. */
35c08157 10202
1c8f6a4d
KLC
10203 irel->r_info =
10204 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10205
1c8f6a4d
KLC
10206 cond_irel =
10207 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10208 R_NDS32_17_PCREL_RELA, laddr);
10209 if (cond_irel != irelend)
10210 cond_irel->r_info =
10211 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10212
1c8f6a4d
KLC
10213 cond_irel =
10214 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10215 R_NDS32_INSN16, irel->r_addend);
10216 if (cond_irel != irelend)
10217 cond_irel->r_info =
10218 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10219
1c8f6a4d
KLC
10220 }
10221 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10222 {
10223 /* Relax to the following instruction sequence
10224 bltz rt, .L1 ; LONGCALL2/17_PCREL
10225 jal symbol ; 25_PCREL/PTR_RES
10226 .L1 */
10227 *insn_len = 4;
10228 /* Convert instruction. */
10229 insn = INSN_JAL;
10230 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10231
1c8f6a4d
KLC
10232 /* Convert relocations. */
10233 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10234 R_NDS32_25_PCREL_RELA);
10235 irel->r_info =
10236 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10237
1c8f6a4d
KLC
10238 /* Set resolved relocation. */
10239 cond_irel =
10240 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10241 R_NDS32_PTR_RESOLVED, irel->r_addend);
10242 if (cond_irel == irelend)
10243 {
10244 (*_bfd_error_handler)
10245 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10246 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10247 return FALSE;
10248 }
10249 cond_irel->r_addend = 1;
35c08157 10250
1c8f6a4d
KLC
10251 cond_irel =
10252 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10253 R_NDS32_INSN16, irel->r_addend);
10254 if (cond_irel != irelend)
10255 cond_irel->r_info =
10256 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10257 }
10258 return TRUE;
10259}
35c08157 10260
1c8f6a4d 10261/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10262
1c8f6a4d
KLC
10263static bfd_boolean
10264nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10265 Elf_Internal_Rela *internal_relocs, int *insn_len,
10266 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10267 Elf_Internal_Shdr *symtab_hdr)
10268{
10269 /* The pattern for LONGJUMP4.
10270 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10271 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10272 jr ta ; PTR_RES/INSN16/EMPTY */
10273
10274 bfd_vma laddr;
10275 int seq_len; /* Original length of instruction sequence. */
10276 uint32_t insn;
10277 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10278 int pic_ext_target = 0;
10279 bfd_signed_vma foff;
35c08157 10280
1c8f6a4d
KLC
10281 irelend = internal_relocs + sec->reloc_count;
10282 seq_len = GET_SEQ_LEN (irel->r_addend);
10283 laddr = irel->r_offset;
10284 *insn_len = seq_len;
35c08157 10285
1c8f6a4d
KLC
10286 /* Get the reloc for the address from which the register is
10287 being loaded. This reloc will tell us which function is
10288 actually being called. */
35c08157 10289
1c8f6a4d
KLC
10290 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10291 R_NDS32_HI20_RELA, laddr);
35c08157 10292
1c8f6a4d
KLC
10293 if (hi_irel == irelend)
10294 {
10295 (*_bfd_error_handler)
10296 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10297 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10298 return FALSE;
10299 }
35c08157 10300
1c8f6a4d
KLC
10301 /* Get the value of the symbol referred to by the reloc. */
10302 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10303 &pic_ext_target);
35c08157 10304
1c8f6a4d
KLC
10305 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10306 || foff < -CONSERVATIVE_24BIT_S1)
10307 return FALSE;
35c08157 10308
1c8f6a4d
KLC
10309 /* Convert it to "j label", it may be converted to j8 in the final
10310 pass of relaxation. Therefore, we do not consider this currently. */
10311 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10312 R_NDS32_PTR_RESOLVED, irel->r_addend);
10313 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10314 R_NDS32_EMPTY, irel->r_addend);
35c08157 10315
1c8f6a4d
KLC
10316 if (ptr_irel == irelend || em_irel == irelend)
10317 {
10318 (*_bfd_error_handler)
10319 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10320 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10321 return FALSE;
10322 }
35c08157 10323
1c8f6a4d
KLC
10324 em_irel->r_info =
10325 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10326 ptr_irel->r_addend = 1;
35c08157 10327
1c8f6a4d
KLC
10328 /* Write instruction. */
10329 insn = INSN_J;
10330 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10331
1c8f6a4d
KLC
10332 /* Clear relocations. */
10333 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10334
1c8f6a4d
KLC
10335 /* If there is function cse, HI20 can not remove now. */
10336 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10337 R_NDS32_LONGJUMP4, laddr);
10338 if (call_irel == irelend)
10339 {
10340 *insn_len = 0;
10341 hi_irel->r_info =
10342 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10343 }
35c08157 10344
1c8f6a4d
KLC
10345 return TRUE;
10346}
35c08157 10347
1c8f6a4d 10348/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10349
1c8f6a4d
KLC
10350static bfd_boolean
10351nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10352 Elf_Internal_Rela *internal_relocs, int *insn_len,
10353 int *seq_len, bfd_byte *contents,
10354 Elf_Internal_Sym *isymbuf,
10355 Elf_Internal_Shdr *symtab_hdr)
10356{
10357 /* There are 2 variations for LONGJUMP5
10358 case 2-4; 1st insn convertible, 16-bit on.
10359 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10360 j label ; 25_PCREL/INSN16
10361 $1:
10362
10363 case 4-4; 1st insn not convertible
10364 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10365 j label ; 25_PCREL/INSN16
10366 .L1: */
10367
10368 bfd_vma laddr;
10369 Elf_Internal_Rela *cond_irel, *irelend;
10370 int pic_ext_target = 0;
10371 unsigned int i;
10372 bfd_signed_vma foff;
10373 uint32_t insn, re_insn = 0;
10374 uint16_t insn16, re_insn16 = 0;
10375 unsigned long reloc;
35c08157 10376
1c8f6a4d
KLC
10377 enum elf_nds32_reloc_type checked_types[] =
10378 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10379 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10380
1c8f6a4d
KLC
10381 irelend = internal_relocs + sec->reloc_count;
10382 laddr = irel->r_offset;
35c08157 10383
1c8f6a4d
KLC
10384 /* Get the reloc for the address from which the register is
10385 being loaded. This reloc will tell us which function is
10386 actually being called. */
35c08157 10387
1c8f6a4d
KLC
10388 cond_irel =
10389 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10390 R_NDS32_25_PCREL_RELA, irel->r_addend);
10391 if (cond_irel == irelend)
10392 {
10393 (*_bfd_error_handler)
10394 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10395 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10396 return FALSE;
10397 }
35c08157 10398
1c8f6a4d
KLC
10399 /* Get the value of the symbol referred to by the reloc. */
10400 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10401 &pic_ext_target);
35c08157 10402
1c8f6a4d
KLC
10403 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10404 || foff >= CONSERVATIVE_16BIT_S1)
10405 return FALSE;
35c08157 10406
1c8f6a4d
KLC
10407 /* Get the all corresponding instructions. */
10408 insn = bfd_getb32 (contents + laddr);
10409 /* Check instruction size. */
10410 if (insn & 0x80000000)
10411 {
10412 *seq_len = 0;
10413 insn16 = insn >> 16;
10414 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10415 }
10416 else
10417 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10418
1c8f6a4d
KLC
10419 if (N32_OP6 (re_insn) == N32_OP6_BR1
10420 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10421 {
10422 /* beqs label ; 15_PCREL. */
10423 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10424 reloc = R_NDS32_15_PCREL_RELA;
10425 }
10426 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10427 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10428 {
10429 /* beqz label ; 17_PCREL. */
10430 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10431 reloc = R_NDS32_17_PCREL_RELA;
10432 }
10433 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10434 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10435 {
10436 /* beqc label ; 9_PCREL. */
10437 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10438 reloc = R_NDS32_WORD_9_PCREL_RELA;
10439 }
10440 else
10441 return FALSE;
35c08157 10442
1c8f6a4d
KLC
10443 /* Set all relocations. */
10444 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10445
1c8f6a4d
KLC
10446 /* Clean relocations. */
10447 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10448 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10449 {
10450 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10451 checked_types[i], laddr);
10452 if (cond_irel != irelend)
10453 {
10454 if (*seq_len == 0
10455 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10456 {
1c8f6a4d
KLC
10457 /* If the branch instruction is 2 byte, it cannot remove
10458 directly. Only convert it to nop16 and remove it after
10459 checking alignment issue. */
10460 insn16 = NDS32_NOP16;
10461 bfd_putb16 (insn16, contents + laddr);
10462 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC
10463 }
10464 else
1c8f6a4d
KLC
10465 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10466 R_NDS32_NONE);
35c08157 10467 }
1c8f6a4d
KLC
10468 }
10469 *insn_len = 0;
35c08157 10470
1c8f6a4d
KLC
10471 return TRUE;
10472}
35c08157 10473
1c8f6a4d 10474/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10475
1c8f6a4d
KLC
10476static bfd_boolean
10477nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10478 Elf_Internal_Rela *internal_relocs, int *insn_len,
10479 int *seq_len, bfd_byte *contents,
10480 Elf_Internal_Sym *isymbuf,
10481 Elf_Internal_Shdr *symtab_hdr)
10482{
10483 /* There are 5 variations for LONGJUMP6
10484 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10485 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10486 sethi ta, hi20(symbol) ; HI20/PTR
10487 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10488 jr ta ; PTR_RES/INSN16/EMPTY
10489 .L1:
10490
10491 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10492 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10493 sethi ta, hi20(symbol) ; HI20/PTR
10494 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10495 jr ta ; PTR_RES/INSN16/EMPTY
10496 .L1: */
10497
10498 enum elf_nds32_reloc_type checked_types[] =
10499 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10500 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10501
10502 int reloc_off = 0, cond_removed = 0;
10503 bfd_vma laddr;
10504 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10505 int pic_ext_target = 0;
10506 unsigned int i;
10507 bfd_signed_vma foff;
10508 uint32_t insn, re_insn = 0;
10509 uint16_t insn16, re_insn16 = 0;
10510 unsigned long reloc;
35c08157 10511
1c8f6a4d
KLC
10512 irelend = internal_relocs + sec->reloc_count;
10513 laddr = irel->r_offset;
35c08157 10514
1c8f6a4d
KLC
10515 /* Get the reloc for the address from which the register is
10516 being loaded. This reloc will tell us which function is
10517 actually being called. */
10518 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10519 R_NDS32_EMPTY, irel->r_addend);
35c08157 10520
1c8f6a4d
KLC
10521 if (em_irel == irelend)
10522 {
10523 (*_bfd_error_handler)
10524 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10525 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10526 return FALSE;
10527 }
35c08157 10528
1c8f6a4d
KLC
10529 /* Get the value of the symbol referred to by the reloc. */
10530 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10531 &pic_ext_target);
35c08157 10532
1c8f6a4d
KLC
10533 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10534 || foff >= CONSERVATIVE_24BIT_S1)
10535 return FALSE;
35c08157 10536
1c8f6a4d
KLC
10537 insn = bfd_getb32 (contents + laddr);
10538 /* Check instruction size. */
10539 if (insn & 0x80000000)
10540 {
10541 *seq_len = 0;
10542 insn16 = insn >> 16;
10543 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10544 }
10545 else
10546 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10547
1c8f6a4d
KLC
10548 /* For simplicity of coding, we are going to modify the section
10549 contents, the section relocs, and the BFD symbol table. We
10550 must tell the rest of the code not to free up this
10551 information. It would be possible to instead create a table
10552 of changes which have to be made, as is done in coff-mips.c;
10553 that would be more work, but would require less memory when
10554 the linker is run. */
35c08157 10555
1c8f6a4d
KLC
10556 if (N32_OP6 (re_insn) == N32_OP6_BR1
10557 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10558 {
10559 /* beqs label ; 15_PCREL */
10560 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10561 reloc = R_NDS32_15_PCREL_RELA;
10562 cond_removed = 1;
10563 }
10564 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10565 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10566 {
10567 /* beqz label ; 17_PCREL */
10568 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10569 reloc = R_NDS32_17_PCREL_RELA;
10570 cond_removed = 1;
10571 }
10572 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10573 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10574 {
10575 /* Relax to one of the following 2 variations
35c08157 10576
1c8f6a4d
KLC
10577 case 2-4; 1st insn convertible, 16-bit on.
10578 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10579 j label ; 25_PCREL/INSN16
10580 $1:
35c08157 10581
1c8f6a4d
KLC
10582 case 4-4; 1st insn not convertible
10583 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10584 j label ; 25_PCREL/INSN16
10585 .L1: */
35c08157 10586
1c8f6a4d
KLC
10587 /* Use j label as second instruction. */
10588 insn = INSN_J;
10589 reloc = R_NDS32_25_PCREL_RELA;
10590 bfd_putb32 (insn, contents + em_irel->r_offset);
10591 }
10592 else
10593 return FALSE;
35c08157 10594
1c8f6a4d
KLC
10595 /* Set all relocations. */
10596 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10597
1c8f6a4d
KLC
10598 cond_irel =
10599 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10600 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10601 cond_irel->r_addend = 1;
35c08157 10602
1c8f6a4d
KLC
10603 /* Use INSN16 of first branch instruction to distinguish if keeping
10604 INSN16 of final instruction or not. */
10605 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10606 R_NDS32_INSN16, irel->r_offset);
10607 if (insn_irel == irelend)
10608 {
10609 /* Clean the final INSN16. */
10610 insn_irel =
10611 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10612 R_NDS32_INSN16, em_irel->r_offset);
10613 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10614 R_NDS32_NONE);
10615 }
10616
10617 if (cond_removed == 1)
10618 {
10619 *insn_len = 0;
10620
10621 /* Clear relocations. */
10622 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10623
1c8f6a4d
KLC
10624 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10625 {
10626 cond_irel =
10627 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10628 checked_types[i], laddr);
10629 if (cond_irel != irelend)
35c08157 10630 {
1c8f6a4d
KLC
10631 if (*seq_len == 0
10632 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10633 {
10634 /* If the branch instruction is 2 byte, it cannot remove
10635 directly. Only convert it to nop16 and remove it after
10636 checking alignment issue. */
10637 insn16 = NDS32_NOP16;
10638 bfd_putb16 (insn16, contents + laddr);
10639 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10640 }
10641 else
10642 cond_irel->r_info =
10643 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10644 }
35c08157 10645 }
1c8f6a4d
KLC
10646 }
10647 else
10648 {
10649 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10650 R_NDS32_LONGJUMP5);
10651 }
35c08157 10652
1c8f6a4d
KLC
10653 return TRUE;
10654}
35c08157 10655
1c8f6a4d 10656/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10657
1c8f6a4d
KLC
10658static bfd_boolean
10659nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10660 Elf_Internal_Rela *internal_relocs, int *insn_len,
10661 int *seq_len, bfd_byte *contents,
10662 Elf_Internal_Sym *isymbuf,
10663 Elf_Internal_Shdr *symtab_hdr)
10664{
10665 /* There are 2 variations for LONGJUMP5
10666 case 2-4; 1st insn convertible, 16-bit on.
10667 movi55 ta, imm11 ; LONGJUMP7/INSN16
10668 beq rt, ta, label ; 15_PCREL
10669
10670 case 4-4; 1st insn not convertible
10671 movi55 ta, imm11 ; LONGJUMP7/INSN16
10672 beq rt, ta, label ; 15_PCREL */
10673
10674 bfd_vma laddr;
10675 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10676 int pic_ext_target = 0;
10677 bfd_signed_vma foff;
10678 uint32_t insn, re_insn = 0;
10679 uint16_t insn16;
10680 uint32_t imm11;
35c08157 10681
1c8f6a4d
KLC
10682 irelend = internal_relocs + sec->reloc_count;
10683 laddr = irel->r_offset;
35c08157 10684
1c8f6a4d
KLC
10685 /* Get the reloc for the address from which the register is
10686 being loaded. This reloc will tell us which function is
10687 actually being called. */
35c08157 10688
1c8f6a4d
KLC
10689 cond_irel =
10690 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10691 R_NDS32_15_PCREL_RELA, irel->r_addend);
10692 if (cond_irel == irelend)
10693 {
10694 (*_bfd_error_handler)
10695 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10696 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10697 return FALSE;
10698 }
35c08157 10699
1c8f6a4d
KLC
10700 /* Get the value of the symbol referred to by the reloc. */
10701 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10702 &pic_ext_target);
35c08157 10703
1c8f6a4d
KLC
10704 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10705 || foff >= CONSERVATIVE_8BIT_S1)
10706 return FALSE;
35c08157 10707
1c8f6a4d
KLC
10708 /* Get the first instruction for its size. */
10709 insn = bfd_getb32 (contents + laddr);
10710 if (insn & 0x80000000)
10711 {
10712 *seq_len = 0;
10713 /* Get the immediate from movi55. */
10714 imm11 = N16_IMM5S (insn >> 16);
10715 }
10716 else
10717 {
10718 /* Get the immediate from movi. */
10719 imm11 = N32_IMM20S (insn);
35c08157
KLC
10720 }
10721
1c8f6a4d
KLC
10722 /* Get the branch instruction. */
10723 insn = bfd_getb32 (contents + irel->r_addend);
10724 /* Convert instruction to BR3. */
10725 if ((insn >> 14) & 0x1)
10726 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10727 else
10728 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10729
1c8f6a4d 10730 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10731
1c8f6a4d
KLC
10732 /* Set all relocations. */
10733 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10734 R_NDS32_WORD_9_PCREL_RELA);
10735
10736 /* Clean relocations. */
10737 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10738 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10739 R_NDS32_INSN16, irel->r_offset);
10740 if (insn_irel != irelend)
10741 {
10742 if (*seq_len == 0)
35c08157 10743 {
1c8f6a4d
KLC
10744 /* If the first insntruction is 16bit, convert it to nop16. */
10745 insn16 = NDS32_NOP16;
10746 bfd_putb16 (insn16, contents + laddr);
10747 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10748 }
1c8f6a4d
KLC
10749 else
10750 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10751 R_NDS32_NONE);
35c08157 10752 }
1c8f6a4d 10753 *insn_len = 0;
35c08157 10754
1c8f6a4d
KLC
10755 return TRUE;
10756}
35c08157 10757
1c8f6a4d 10758#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10759
1c8f6a4d 10760/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10761
1c8f6a4d
KLC
10762static bfd_boolean
10763nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10764 asection *sec, Elf_Internal_Rela *irel,
10765 Elf_Internal_Rela *internal_relocs, int *insn_len,
10766 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10767 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10768{
10769 int eliminate_sethi = 0, range_type, i;
10770 bfd_vma local_sda, laddr;
10771 int seq_len; /* Original length of instruction sequence. */
10772 uint32_t insn;
10773 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10774 bfd_vma access_addr = 0;
10775 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10776 enum elf_nds32_reloc_type checked_types[] =
10777 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10778 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10779 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10780 R_NDS32_TLS_LE_HI20
10781 };
35c08157 10782
1c8f6a4d
KLC
10783 irelend = internal_relocs + sec->reloc_count;
10784 seq_len = GET_SEQ_LEN (irel->r_addend);
10785 laddr = irel->r_offset;
10786 *insn_len = seq_len;
35c08157 10787
1c8f6a4d
KLC
10788 /* Get the high part relocation. */
10789 for (i = 0; (unsigned) i < sizeof (checked_types); i++)
10790 {
10791 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10792 checked_types[i], laddr);
10793 if (hi_irelfn != irelend)
10794 break;
10795 }
35c08157 10796
1c8f6a4d
KLC
10797 if (hi_irelfn == irelend)
10798 {
10799 (*_bfd_error_handler)
10800 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10801 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10802 return FALSE;
10803 }
35c08157 10804
1c8f6a4d
KLC
10805 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10806 nds32_elf_final_sda_base (sec->output_section->owner,
10807 link_info, &local_sda, FALSE);
35c08157 10808
1c8f6a4d
KLC
10809 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10810 {
10811 case R_NDS32_HI20_RELA:
10812 insn = bfd_getb32 (contents + laddr);
10813 access_addr =
10814 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10815
10816 if (range_type == NDS32_LOADSTORE_IMM)
10817 {
10818 struct elf_link_hash_entry *h = NULL;
10819 int indx;
35c08157 10820
1c8f6a4d 10821 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10822 {
1c8f6a4d
KLC
10823 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10824 h = elf_sym_hashes (abfd)[indx];
35c08157 10825 }
35c08157 10826
1c8f6a4d
KLC
10827 if ((access_addr < CONSERVATIVE_20BIT)
10828 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10829 {
1c8f6a4d
KLC
10830 eliminate_sethi = 1;
10831 break;
35c08157 10832 }
1c8f6a4d
KLC
10833
10834 /* This is avoid to relax symbol address which is fixed
10835 relocations. Ex: _stack. */
10836 if (h && bfd_is_abs_section (h->root.u.def.section))
10837 return FALSE;
10838 }
10839
10840 if (!load_store_relax)
10841 return FALSE;
10842
10843 /* Case for set gp register. */
10844 if (N32_RT5 (insn) == REG_GP)
10845 break;
10846
10847 if (range_type == NDS32_LOADSTORE_FLOAT_S
10848 || range_type == NDS32_LOADSTORE_FLOAT_S)
10849 {
10850 range_l = sdata_range[0][0];
10851 range_h = sdata_range[0][1];
10852 }
10853 else
10854 {
10855 range_l = sdata_range[1][0];
10856 range_h = sdata_range[1][1];
10857 }
10858 break;
10859
10860 case R_NDS32_GOT_HI20:
10861 access_addr =
10862 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10863
10864 /* If this symbol is not in .got, the return value will be -1.
10865 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10866 a negative offset is allowed. */
10867 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10868 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10869 eliminate_sethi = 1;
10870 break;
10871
10872 case R_NDS32_PLT_GOTREL_HI20:
10873 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10874 hi_irelfn, symtab_hdr);
10875
10876 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10877 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10878 eliminate_sethi = 1;
10879 break;
10880
10881 case R_NDS32_GOTOFF_HI20:
10882 access_addr =
10883 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10884
10885 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10886 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10887 eliminate_sethi = 1;
10888 break;
10889
10890 case R_NDS32_GOTPC_HI20:
10891 /* The access_addr must consider r_addend of hi_irel. */
10892 access_addr = sec->output_section->vma + sec->output_offset
10893 + irel->r_offset + hi_irelfn->r_addend;
10894
10895 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10896 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10897 eliminate_sethi = 1;
10898 break;
10899
10900 case R_NDS32_TLS_LE_HI20:
10901 access_addr =
10902 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10903 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10904 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10905 if ((range_type == NDS32_LOADSTORE_IMM)
10906 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10907 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10908 eliminate_sethi = 1;
10909 break;
10910
10911 default:
10912 return FALSE;
10913 }
10914
10915 /* Delete sethi instruction. */
10916 if (eliminate_sethi == 1
10917 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10918 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10919 {
10920 hi_irelfn->r_info =
10921 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10922 irel->r_info =
10923 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10924 *insn_len = 0;
10925 }
10926 return TRUE;
10927}
10928
10929/* Relax LO12 relocation for nds32_elf_relax_section. */
10930
10931static void
10932nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10933 asection *sec, Elf_Internal_Rela *irel,
10934 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10935 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10936{
10937 uint32_t insn;
10938 bfd_vma local_sda, laddr;
10939 unsigned long reloc;
10940 bfd_vma access_addr;
10941 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10942 Elf_Internal_Rela *irelfn = NULL, *irelend;
10943 struct elf_link_hash_entry *h = NULL;
10944 int indx;
10945
10946 /* For SDA base relative relaxation. */
10947 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10948 &local_sda, FALSE);
10949
10950 irelend = internal_relocs + sec->reloc_count;
10951 laddr = irel->r_offset;
10952 insn = bfd_getb32 (contents + laddr);
10953
10954 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10955 return;
10956
10957 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10958
10959 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10960 {
10961 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10962 h = elf_sym_hashes (abfd)[indx];
10963 }
10964
10965 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10966 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10967 {
10968 reloc = R_NDS32_20_RELA;
10969 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10970 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10971 bfd_putb32 (insn, contents + laddr);
10972 }
10973 /* This is avoid to relax symbol address which is fixed
10974 relocations. Ex: _stack. */
10975 else if (N32_OP6 (insn) == N32_OP6_ORI
10976 && h && bfd_is_abs_section (h->root.u.def.section))
10977 return;
10978 else
10979 {
10980 range_l = sdata_range[1][0];
10981 range_h = sdata_range[1][1];
10982 switch (ELF32_R_TYPE (irel->r_info))
10983 {
10984 case R_NDS32_LO12S0_RELA:
10985 reloc = R_NDS32_SDA19S0_RELA;
10986 break;
10987 case R_NDS32_LO12S1_RELA:
10988 reloc = R_NDS32_SDA18S1_RELA;
10989 break;
10990 case R_NDS32_LO12S2_RELA:
10991 reloc = R_NDS32_SDA17S2_RELA;
10992 break;
10993 case R_NDS32_LO12S2_DP_RELA:
10994 range_l = sdata_range[0][0];
10995 range_h = sdata_range[0][1];
10996 reloc = R_NDS32_SDA12S2_DP_RELA;
10997 break;
10998 case R_NDS32_LO12S2_SP_RELA:
10999 range_l = sdata_range[0][0];
11000 range_h = sdata_range[0][1];
11001 reloc = R_NDS32_SDA12S2_SP_RELA;
11002 break;
11003 default:
11004 return;
11005 }
11006
11007 /* There are range_h and range_l because linker has to promise
11008 all sections move cross one page together. */
11009 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11010 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11011 {
11012 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11013 {
1c8f6a4d
KLC
11014 /* Maybe we should add R_NDS32_INSN16 reloc type here
11015 or manually do some optimization. sethi can't be
11016 eliminated when updating $gp so the relative ori
11017 needs to be preserved. */
11018 return;
35c08157 11019 }
1c8f6a4d
KLC
11020 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11021 &insn))
11022 return;
11023 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11024 bfd_putb32 (insn, contents + laddr);
11025
11026 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11027 R_NDS32_INSN16);
11028 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11029 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11030 irelfn->r_info =
11031 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11032
35c08157 11033 }
1c8f6a4d
KLC
11034 }
11035 return;
11036}
35c08157 11037
1c8f6a4d
KLC
11038/* Relax low part of PIC instruction pattern. */
11039
11040static void
11041nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11042 asection *sec, Elf_Internal_Rela *irel,
11043 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11044 Elf_Internal_Shdr *symtab_hdr)
11045{
11046 uint32_t insn;
11047 bfd_vma local_sda, laddr;
11048 bfd_signed_vma foff;
11049 unsigned long reloc;
11050
11051 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11052 &local_sda, FALSE);
11053 laddr = irel->r_offset;
11054 insn = bfd_getb32 (contents + laddr);
11055
11056 if (N32_OP6 (insn) != N32_OP6_ORI)
11057 return;
11058
11059 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11060 {
11061 foff = calculate_got_memory_address (abfd, link_info, irel,
11062 symtab_hdr) - local_sda;
11063 reloc = R_NDS32_GOT20;
11064 }
11065 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11066 {
11067 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11068 symtab_hdr) - local_sda;
11069 reloc = R_NDS32_PLT_GOTREL_LO20;
11070 }
11071 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11072 {
11073 foff = calculate_memory_address (abfd, irel, isymbuf,
11074 symtab_hdr) - local_sda;
11075 reloc = R_NDS32_GOTOFF;
11076 }
11077 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11078 {
11079 foff = local_sda - sec->output_section->vma + sec->output_offset
11080 + irel->r_offset + irel->r_addend;
11081 reloc = R_NDS32_GOTPC20;
11082 }
11083 else
11084 return;
11085
11086 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11087 {
11088 /* Turn into MOVI. */
11089 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11090 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11091 bfd_putb32 (insn, contents + laddr);
11092 }
11093}
11094
11095/* Relax low part of LE TLS instruction pattern. */
11096
11097static void
11098nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11099 Elf_Internal_Rela *irel,
11100 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11101 Elf_Internal_Shdr *symtab_hdr)
11102{
11103 uint32_t insn;
11104 bfd_vma laddr;
11105 bfd_signed_vma foff;
11106 unsigned long reloc;
11107
11108 laddr = irel->r_offset;
11109 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11110 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11111 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11112 insn = bfd_getb32 (contents + laddr);
11113
11114 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11115 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11116 {
11117 /* Pattern sethi-ori transform to movi. */
11118 reloc = R_NDS32_TLS_LE_20;
11119 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11120 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11121 bfd_putb32 (insn, contents + laddr);
11122 }
11123}
11124
11125/* Relax LE TLS calculate address instruction pattern. */
11126
11127static void
11128nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11129 asection *sec, Elf_Internal_Rela *irel,
11130 Elf_Internal_Rela *internal_relocs,
11131 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11132 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11133{
11134 /* Local TLS non-pic
11135 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11136 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11137 add ra, ta, tp ; TLS_LE_ADD */
11138
11139 uint32_t insn;
11140 bfd_vma laddr;
11141 bfd_signed_vma foff;
11142 Elf_Internal_Rela *i1_irelfn, *irelend;
11143
11144 irelend = internal_relocs + sec->reloc_count;
11145 laddr = irel->r_offset;
11146 insn = bfd_getb32 (contents + laddr);
11147 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11148 R_NDS32_PTR_RESOLVED);
11149 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11150 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11151 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11152
11153 /* The range is +/-16k. */
11154 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11155 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11156 {
11157 /* Transform add to addi. */
11158 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11159 irel->r_info =
11160 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11161
11162 bfd_putb32 (insn, contents + laddr);
11163 if (i1_irelfn != irelend)
11164 {
11165 i1_irelfn->r_addend |= 1;
11166 *again = TRUE;
11167 }
11168 }
11169}
11170
11171/* Relax LE TLS load store instruction pattern. */
11172
11173static void
11174nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11175 asection *sec, Elf_Internal_Rela *irel,
11176 Elf_Internal_Rela *internal_relocs,
11177 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11178 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11179{
11180
11181 uint32_t insn;
11182 bfd_vma laddr;
11183 bfd_signed_vma foff;
11184 Elf_Internal_Rela *i1_irelfn, *irelend;
11185 int success = 0;
11186
11187 irelend = internal_relocs + sec->reloc_count;
11188 laddr = irel->r_offset;
11189 insn = bfd_getb32 (contents + laddr);
11190 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11191 R_NDS32_PTR_RESOLVED);
11192 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11193 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11194 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11195
11196 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11197 {
11198 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11199 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11200 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11201 /* The range is +/-16k. */
11202 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11203 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11204 {
11205 insn =
11206 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11207 irel->r_info =
11208 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11209 success = 1;
11210 break;
11211 }
11212 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11213 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11214 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11215 /* The range is +/-32k. */
11216 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11217 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11218 {
1c8f6a4d
KLC
11219 insn =
11220 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11221 irel->r_info =
11222 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11223 success = 1;
11224 break;
11225 }
11226 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11227 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11228 /* The range is +/-64k. */
11229 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11230 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11231 {
11232 insn =
11233 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11234 irel->r_info =
11235 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11236 success = 1;
11237 break;
11238 }
11239 default:
11240 break;
11241 }
35c08157 11242
1c8f6a4d
KLC
11243 if (success)
11244 {
11245 bfd_putb32 (insn, contents + laddr);
11246 if (i1_irelfn != irelend)
11247 {
11248 i1_irelfn->r_addend |= 1;
11249 *again = TRUE;
11250 }
11251 }
11252}
35c08157 11253
1c8f6a4d 11254/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11255
1c8f6a4d
KLC
11256static bfd_boolean
11257nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11258 Elf_Internal_Rela *internal_relocs, int *insn_len,
11259 int *seq_len, bfd_byte *contents)
11260{
11261 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11262
1c8f6a4d 11263 irelend = internal_relocs + sec->reloc_count;
35c08157 11264
1c8f6a4d
KLC
11265 re_irel =
11266 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11267 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11268
1c8f6a4d
KLC
11269 if (re_irel == irelend)
11270 {
11271 (*_bfd_error_handler)
11272 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11273 abfd, (long) irel->r_offset);
11274 return FALSE;
11275 }
35c08157 11276
1c8f6a4d
KLC
11277 if (re_irel->r_addend != 1)
11278 return FALSE;
35c08157 11279
1c8f6a4d
KLC
11280 /* Pointed target is relaxed and no longer needs this void *,
11281 change the type to NONE. */
11282 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11283
1c8f6a4d
KLC
11284 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11285 not exist, it means only count 1 and remove it directly. */
11286 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11287 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11288 R_NDS32_PTR_COUNT);
11289 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11290 R_NDS32_PTR);
11291 if (count_irel != irelend)
11292 {
11293 if (--count_irel->r_addend > 0)
11294 return FALSE;
11295 }
11296
11297 if (ptr_irel != irelend)
11298 return FALSE;
11299
11300 /* If the PTR_COUNT is already 0, remove current instruction. */
11301 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11302 *insn_len = 0;
11303 return TRUE;
11304}
11305
11306/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11307
11308static void
11309nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11310 asection *sec, Elf_Internal_Rela *irel,
11311 Elf_Internal_Rela *internal_relocs,
11312 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11313 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11314{
11315 uint32_t insn;
11316 bfd_signed_vma foff;
11317 Elf_Internal_Rela *i1_irelfn, *irelend;
11318 bfd_vma local_sda, laddr;
11319
11320 irelend = internal_relocs + sec->reloc_count;
11321 laddr = irel->r_offset;
11322 insn = bfd_getb32 (contents + laddr);
11323
11324 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11325 we need additional space. It might be help if we could
11326 borrow some space from instructions to be eliminated
11327 such as sethi, ori, add. */
11328 if (insn & 0x80000000)
11329 return;
11330
11331 if (nds32_elf_check_dup_relocs
11332 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11333 return;
11334
11335 i1_irelfn =
11336 find_relocs_at_address (irel, internal_relocs, irelend,
11337 R_NDS32_PTR_RESOLVED);
11338
11339 /* FIXIT 090606
11340 The boundary should be reduced since the .plt section hasn't
11341 been created and the address of specific entry is still unknown
11342 Maybe the range between the function call and the begin of the
11343 .text section can be used to decide if the .plt is in the range
11344 of function call. */
11345
11346 if (N32_OP6 (insn) == N32_OP6_ALU1
11347 && N32_SUB5 (insn) == N32_ALU1_ADD)
11348 {
11349 /* Get the value of the symbol referred to by the reloc. */
11350 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11351 &local_sda, FALSE);
11352 foff = (bfd_signed_vma) (calculate_plt_memory_address
11353 (abfd, link_info, isymbuf, irel,
11354 symtab_hdr) - local_sda);
11355 /* This condition only happened when symbol is undefined. */
11356 if (foff == 0)
11357 return;
11358
11359 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11360 return;
11361 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11362 R_NDS32_PLT_GOTREL_LO19);
11363 /* addi.gp */
11364 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11365 }
11366 else if (N32_OP6 (insn) == N32_OP6_JREG
11367 && N32_SUB5 (insn) == N32_JREG_JRAL)
11368 {
11369 /* Get the value of the symbol referred to by the reloc. */
11370 foff =
11371 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11372 /* This condition only happened when symbol is undefined. */
11373 if (foff == 0)
11374 return;
11375 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11376 return;
11377 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11378 insn = INSN_JAL;
11379 }
11380 else
11381 return;
11382
11383 bfd_putb32 (insn, contents + laddr);
11384 if (i1_irelfn != irelend)
11385 {
11386 i1_irelfn->r_addend |= 1;
11387 *again = TRUE;
11388 }
11389}
11390
11391/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11392
11393static void
11394nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11395 asection *sec, Elf_Internal_Rela *irel,
11396 Elf_Internal_Rela *internal_relocs,
11397 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11398 bfd_boolean *again)
11399{
11400 uint32_t insn;
11401 bfd_signed_vma foff;
11402 Elf_Internal_Rela *i1_irelfn, *irelend;
11403 bfd_vma local_sda, laddr;
11404
11405 irelend = internal_relocs + sec->reloc_count;
11406 laddr = irel->r_offset;
11407 insn = bfd_getb32 (contents + laddr);
11408 if (insn & 0x80000000)
11409 return;
11410
11411 if (nds32_elf_check_dup_relocs
11412 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11413 return;
11414
11415 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11416 R_NDS32_PTR_RESOLVED);
11417
11418 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11419 &local_sda, FALSE);
11420 foff = calculate_got_memory_address (abfd, link_info, irel,
11421 symtab_hdr) - local_sda;
11422
11423 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11424 {
11425 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11426 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11427 irel->r_info =
11428 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11429 bfd_putb32 (insn, contents + laddr);
11430 if (i1_irelfn != irelend)
11431 {
11432 i1_irelfn->r_addend |= 1;
11433 *again = TRUE;
11434 }
11435 }
11436}
11437
11438/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11439
11440static void
11441nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11442 asection *sec, Elf_Internal_Rela *irel,
11443 Elf_Internal_Rela *internal_relocs,
11444 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11445 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11446{
11447 int opc_insn_gotoff;
11448 uint32_t insn;
11449 bfd_signed_vma foff;
11450 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11451 bfd_vma local_sda, laddr;
11452
11453 irelend = internal_relocs + sec->reloc_count;
11454 laddr = irel->r_offset;
11455 insn = bfd_getb32 (contents + laddr);
11456
11457 if (insn & 0x80000000)
11458 return;
11459
11460 if (nds32_elf_check_dup_relocs
11461 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11462 return;
11463
11464 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11465 R_NDS32_PTR_RESOLVED);
11466 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11467 &local_sda, FALSE);
11468 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11469 foff = foff - local_sda;
11470
11471 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11472 return;
11473
11474 /* Concatenate opcode and sub-opcode for switch case.
11475 It may be MEM or ALU1. */
11476 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11477 switch (opc_insn_gotoff)
11478 {
11479 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11480 /* 4-byte aligned. */
11481 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11482 irel->r_info =
11483 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11484 break;
11485 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11486 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11487 irel->r_info =
11488 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11489 break;
11490 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11491 /* 2-byte aligned. */
11492 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11493 irel->r_info =
11494 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11495 break;
11496 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11497 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11498 irel->r_info =
11499 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11500 break;
11501 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11502 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11503 irel->r_info =
11504 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11505 break;
11506 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11507 /* 1-byte aligned. */
11508 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11509 irel->r_info =
11510 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11511 break;
11512 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11513 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11514 irel->r_info =
11515 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11516 break;
11517 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11518 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11519 irel->r_info =
11520 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11521 break;
11522 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11523 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11524 irel->r_info =
11525 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11526 break;
11527 default:
11528 return;
11529 }
11530
11531 bfd_putb32 (insn, contents + laddr);
11532 if (i1_irelfn != irelend)
11533 {
11534 i1_irelfn->r_addend |= 1;
11535 *again = TRUE;
11536 }
11537 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11538 R_NDS32_INSN16)) != irelend)
11539 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11540
11541}
11542
11543static bfd_boolean
11544nds32_relax_adjust_label (bfd *abfd, asection *sec,
11545 Elf_Internal_Rela *internal_relocs,
11546 bfd_byte *contents,
11547 nds32_elf_blank_t **relax_blank_list,
11548 int optimize, int opt_size)
11549{
11550 /* This code block is used to adjust 4-byte alignment by relax a pair
11551 of instruction a time.
11552
11553 It recognizes three types of relocations.
11554 1. R_NDS32_LABEL - a aligment.
11555 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11556 3. is_16bit_NOP () - remove a 16-bit instruction. */
11557
11558 /* TODO: It seems currently implementation only support 4-byte aligment.
11559 We should handle any-aligment. */
11560
11561 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11562 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11563 Elf_Internal_Rela rel_temp;
11564 Elf_Internal_Rela *irelend;
11565 bfd_vma address;
11566 uint16_t insn16;
11567
11568 /* Checking for branch relaxation relies on the relocations to
11569 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11570 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11571 sizeof (Elf_Internal_Rela), compar_reloc);
11572
11573 irelend = internal_relocs + sec->reloc_count;
11574
11575 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11576 /* FIXME: Can we generate the right order in assembler?
11577 So we don't have to swapping them here. */
11578
11579 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11580 label_rel < irelend; label_rel++)
11581 {
11582 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11583 continue;
11584
11585 /* Find the first reloc has the same offset with label_rel. */
11586 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11587 insn_rel++;
11588
11589 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11590 insn_rel++)
11591 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11592 address. */
11593 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11594 break;
11595
11596 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11597 && insn_rel < label_rel)
11598 {
11599 /* Swap the two reloc if the R_NDS32_INSN16 is
11600 before R_NDS32_LABEL. */
11601 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11602 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11603 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11604 }
11605 }
11606
11607 label_rel = NULL;
11608 insn_rel = NULL;
11609 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11610 or higher, remove other R_NDS32_LABEL with lower alignment.
11611 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11612 then the R_NDS32_LABEL sequence is broke. */
11613 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11614 {
11615 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11616 {
11617 if (label_rel == NULL)
11618 {
11619 if (tmp_rel->r_addend < 2)
11620 label_rel = tmp_rel;
11621 continue;
11622 }
11623 else if (tmp_rel->r_addend > 1)
11624 {
11625 /* Remove all LABEL relocation from label_rel to tmp_rel
11626 including relocations with same offset as tmp_rel. */
11627 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11628 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11629 {
11630 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11631 && tmp2_rel->r_addend < 2)
11632 tmp2_rel->r_info =
11633 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11634 R_NDS32_NONE);
11635 }
11636 label_rel = NULL;
11637 }
11638 }
11639 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11640 {
11641 /* A new INSN16 which can be converted, so clear label_rel. */
11642 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11643 irelend, &insn16)
11644 || is_16bit_NOP (abfd, sec, tmp_rel))
11645 label_rel = NULL;
11646 }
11647 }
11648
11649 label_rel = NULL;
11650 insn_rel = NULL;
11651 /* Optimized for speed and nothing has not been relaxed.
11652 It's time to align labels.
11653 We may convert a 16-bit instruction right before a label to
11654 32-bit, in order to align the label if necessary
11655 all reloc entries has been sorted by r_offset. */
11656 for (irel = internal_relocs; irel < irelend; irel++)
11657 {
11658 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11659 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11660 continue;
11661
11662 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11663 {
11664 /* A new INSN16 found, resize the old one. */
11665 if (is_convert_32_to_16
11666 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11667 || is_16bit_NOP (abfd, sec, irel))
11668 {
11669 if (insn_rel)
11670 {
11671 /* Previous INSN16 reloc exists, reduce its
11672 size to 16-bit. */
11673 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11674 irelend, &insn16))
35c08157 11675 {
1c8f6a4d
KLC
11676 nds32_elf_write_16 (abfd, contents, insn_rel,
11677 internal_relocs, irelend, insn16);
11678
11679 if (!insert_nds32_elf_blank_recalc_total
11680 (relax_blank_list, insn_rel->r_offset + 2, 2))
11681 return FALSE;
11682 }
11683 else if (is_16bit_NOP (abfd, sec, insn_rel))
11684 {
11685 if (!insert_nds32_elf_blank_recalc_total
11686 (relax_blank_list, insn_rel->r_offset, 2))
11687 return FALSE;
11688 }
11689 insn_rel->r_info =
11690 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11691 }
11692 /* Save the new one for later use. */
11693 insn_rel = irel;
11694 }
11695 else
11696 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11697 R_NDS32_NONE);
11698 }
11699 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11700 {
11701 /* Search for label. */
11702 int force_relax = 0;
11703
11704 /* Label on 16-bit instruction or optimization
11705 needless, just reset this reloc. */
11706 insn16 = bfd_getb16 (contents + irel->r_offset);
11707 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11708 {
11709 irel->r_info =
11710 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11711 continue;
11712 }
11713
11714 address =
11715 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11716 irel->r_offset, 1);
11717
11718 if (!insn_rel)
11719 {
11720 /* Check if there is case which can not be aligned. */
11721 if (irel->r_addend == 2 && address & 0x2)
11722 return FALSE;
11723 continue;
11724 }
11725
11726 /* Try to align this label. */
11727
11728 if ((irel->r_addend & 0x1f) < 2)
11729 {
11730 /* Check if there is a INSN16 at the same address.
11731 Label_rel always seats before insn_rel after
11732 our sort. */
11733
11734 /* Search for INSN16 at LABEL location. If INSN16 is at
11735 same location and this LABEL alignment is lower than 2,
11736 the INSN16 can be converted to 2-byte. */
11737 for (tmp_rel = irel;
11738 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11739 tmp_rel++)
11740 {
11741 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11742 && (is_convert_32_to_16
11743 (abfd, sec, tmp_rel, internal_relocs,
11744 irelend, &insn16)
11745 || is_16bit_NOP (abfd, sec, tmp_rel)))
11746 {
11747 force_relax = 1;
11748 break;
11749 }
11750 }
11751 }
11752
11753 if (force_relax || irel->r_addend == 1 || address & 0x2)
11754 {
11755 /* Label not aligned. */
11756 /* Previous reloc exists, reduce its size to 16-bit. */
11757 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11758 internal_relocs, irelend, &insn16))
11759 {
11760 nds32_elf_write_16 (abfd, contents, insn_rel,
11761 internal_relocs, irelend, insn16);
11762
11763 if (!insert_nds32_elf_blank_recalc_total
11764 (relax_blank_list, insn_rel->r_offset + 2, 2))
11765 return FALSE;
11766 }
11767 else if (is_16bit_NOP (abfd, sec, insn_rel))
11768 {
11769 if (!insert_nds32_elf_blank_recalc_total
11770 (relax_blank_list, insn_rel->r_offset, 2))
11771 return FALSE;
11772 }
11773
11774 }
11775 /* INSN16 reloc is used. */
11776 insn_rel = NULL;
11777 }
11778 }
11779
11780 address =
11781 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11782 if (insn_rel && (address & 0x2 || opt_size))
11783 {
11784 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11785 irelend, &insn16))
11786 {
11787 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11788 irelend, insn16);
11789 if (!insert_nds32_elf_blank_recalc_total
11790 (relax_blank_list, insn_rel->r_offset + 2, 2))
11791 return FALSE;
11792 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11793 R_NDS32_NONE);
11794 }
11795 else if (is_16bit_NOP (abfd, sec, insn_rel))
11796 {
11797 if (!insert_nds32_elf_blank_recalc_total
11798 (relax_blank_list, insn_rel->r_offset, 2))
11799 return FALSE;
11800 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11801 R_NDS32_NONE);
11802 }
11803 }
11804 insn_rel = NULL;
11805 return TRUE;
11806}
11807
11808/* Pick relaxation round. */
11809
11810static int
11811nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11812 struct elf_nds32_link_hash_table *table,
11813 struct bfd_link_info *link_info)
11814{
11815 static asection *final_sec;
11816 static bfd_boolean set = FALSE;
11817 static bfd_boolean first = TRUE;
11818 int round_table[] = {
11819 NDS32_RELAX_NORMAL_ROUND,
11820 NDS32_RELAX_JUMP_IFC_ROUND,
11821 NDS32_RELAX_EX9_BUILD_ROUND,
11822 NDS32_RELAX_EX9_REPLACE_ROUND,
11823 };
11824 static int pass = 0;
11825 static int relax_round;
11826
11827 if (first)
11828 {
11829 /* Run an empty run to get the final section. */
11830 relax_round = NDS32_RELAX_EMPTY_ROUND;
11831
11832 /* It has to enter relax again because we can
11833 not make sure what the final turn is. */
11834 *again = TRUE;
11835 first = FALSE;
11836 }
11837
11838 if (!set && *again)
11839 {
11840 /* It is reentered when again is FALSE. */
11841 final_sec = sec;
11842 return relax_round;
11843 }
11844
11845 /* The second round begins. */
11846 set = TRUE;
11847
11848 relax_round = round_table[pass];
11849
11850 if (!init && final_sec == sec)
11851 {
11852 switch (relax_round)
11853 {
11854 case NDS32_RELAX_NORMAL_ROUND:
11855 if (!*again)
11856 {
11857 /* Normal relaxation done. */
11858 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11859 {
11860 pass++;
11861 *again = TRUE;
11862 }
11863 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11864 {
11865 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11866 *again = TRUE;
11867 }
11868 else if (table->ex9_import_file)
11869 {
11870 /* Import ex9 table. */
11871 if (table->update_ex9_table)
11872 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11873 else
11874 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11875 nds32_elf_ex9_import_table (link_info);
11876 *again = TRUE;
11877 }
11878 }
11879 break;
11880 case NDS32_RELAX_JUMP_IFC_ROUND:
11881 if (!nds32_elf_ifc_finish (link_info))
11882 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11883 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11884 {
11885 pass++;
11886 *again = TRUE;
11887 }
11888 break;
11889 case NDS32_RELAX_EX9_BUILD_ROUND:
11890 nds32_elf_ex9_finish (link_info);
11891 pass++;
11892 *again = TRUE;
11893 break;
11894 case NDS32_RELAX_EX9_REPLACE_ROUND:
11895 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11896 {
11897 /* Do jump IFC optimization again. */
11898 if (!nds32_elf_ifc_finish (link_info))
11899 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11900 }
11901 break;
11902 default:
11903 break;
11904 }
11905 }
11906
11907 return relax_round;
11908}
11909
11910static bfd_boolean
11911nds32_elf_relax_section (bfd *abfd, asection *sec,
11912 struct bfd_link_info *link_info, bfd_boolean *again)
11913{
11914 nds32_elf_blank_t *relax_blank_list = NULL;
11915 Elf_Internal_Shdr *symtab_hdr;
11916 Elf_Internal_Rela *internal_relocs;
11917 Elf_Internal_Rela *irel;
11918 Elf_Internal_Rela *irelend;
11919 Elf_Internal_Sym *isymbuf = NULL;
11920 bfd_byte *contents = NULL;
11921 bfd_boolean result = TRUE;
11922 int optimize = 0;
11923 int opt_size = 0;
11924 uint32_t insn;
11925 uint16_t insn16;
11926
11927 /* Target dependnet option. */
11928 struct elf_nds32_link_hash_table *table;
11929 int load_store_relax;
11930 int relax_round;
11931
11932 relax_blank_list = NULL;
11933
11934 *again = FALSE;
11935
11936 /* Nothing to do for
11937 * relocatable link or
11938 * non-relocatable section or
11939 * non-code section or
11940 * empty content or
11941 * no reloc entry. */
11942 if (link_info->relocatable
11943 || (sec->flags & SEC_RELOC) == 0
11944 || (sec->flags & SEC_EXCLUDE) == 1
11945 || (sec->flags & SEC_CODE) == 0
11946 || sec->size == 0)
11947 return TRUE;
11948
11949 /* 09.12.11 Workaround. */
11950 /* We have to adjust align for R_NDS32_LABEL if needed.
11951 The adjust approach only can fix 2-byte align once. */
11952 if (sec->alignment_power > 2)
11953 return TRUE;
11954
11955 /* The optimization type to do. */
11956
11957 table = nds32_elf_hash_table (link_info);
11958 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11959 switch (relax_round)
11960 {
11961 case NDS32_RELAX_JUMP_IFC_ROUND:
11962 /* Here is the entrance of ifc jump relaxation. */
11963 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11964 return FALSE;
11965 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11966 return TRUE;
11967
11968 case NDS32_RELAX_EX9_BUILD_ROUND:
11969 /* Here is the entrance of ex9 relaxation. There are two pass of
11970 ex9 relaxation. The one is to traverse all instructions and build
11971 the hash table. The other one is to compare instructions and replace
11972 it by ex9.it. */
11973 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11974 return FALSE;
11975 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11976 return TRUE;
11977
11978 case NDS32_RELAX_EX9_REPLACE_ROUND:
11979 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11980 return FALSE;
11981 return TRUE;
11982
11983 case NDS32_RELAX_EMPTY_ROUND:
11984 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11985 return TRUE;
11986
11987 case NDS32_RELAX_NORMAL_ROUND:
11988 default:
11989 if (sec->reloc_count == 0)
11990 return TRUE;
11991 break;
11992 }
11993
11994 /* The begining of general relaxation. */
11995
11996 if (is_SDA_BASE_set == 0)
11997 {
11998 bfd_vma gp;
11999 is_SDA_BASE_set = 1;
12000 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12001 &gp, FALSE);
12002 relax_range_measurement (abfd);
12003 }
12004
12005 if (is_ITB_BASE_set == 0)
12006 {
12007 /* Set the _ITB_BASE_. */
12008 if (!nds32_elf_ex9_itb_base (link_info))
12009 {
12010 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12011 bfd_set_error (bfd_error_bad_value);
12012 }
12013 }
12014
12015 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12016 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12017 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12018 TRUE /* keep_memory */);
12019 if (internal_relocs == NULL)
12020 goto error_return;
12021
12022 irelend = internal_relocs + sec->reloc_count;
12023 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12024 irelend, R_NDS32_RELAX_ENTRY);
12025
12026 if (irel == irelend)
12027 return TRUE;
12028
12029 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12030 {
12031 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
12032 return TRUE;
12033
12034 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12035 optimize = 1;
12036
12037 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12038 opt_size = 1;
12039 }
12040
12041 load_store_relax = table->load_store_relax;
12042
12043 /* Get symbol table and section content. */
12044 if (!nds32_get_section_contents (abfd, sec, &contents)
12045 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12046 goto error_return;
12047
12048 /* Do relax loop only when finalize is not done.
12049 Take care of relaxable relocs except INSN16. */
12050 for (irel = internal_relocs; irel < irelend; irel++)
12051 {
12052 int seq_len; /* Original length of instruction sequence. */
12053 int insn_len = 0; /* Final length of instruction sequence. */
12054 bfd_boolean removed;
12055
12056 insn = 0;
12057 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12058 && (irel->r_addend & 0x1f) >= 2)
12059 optimize = 1;
12060
12061 /* Relocation Types
12062 R_NDS32_LONGCALL1 53
12063 R_NDS32_LONGCALL2 54
12064 R_NDS32_LONGCALL3 55
12065 R_NDS32_LONGJUMP1 56
12066 R_NDS32_LONGJUMP2 57
12067 R_NDS32_LONGJUMP3 58
12068 R_NDS32_LOADSTORE 59 */
12069 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12070 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12071 seq_len = GET_SEQ_LEN (irel->r_addend);
12072
12073 /* Relocation Types
12074 R_NDS32_LONGCALL4 107
12075 R_NDS32_LONGCALL5 108
12076 R_NDS32_LONGCALL6 109
12077 R_NDS32_LONGJUMP4 110
12078 R_NDS32_LONGJUMP5 111
12079 R_NDS32_LONGJUMP6 112
12080 R_NDS32_LONGJUMP7 113 */
12081 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12082 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12083 seq_len = 4;
12084
12085 /* Relocation Types
12086 R_NDS32_LO12S0_RELA 30
12087 R_NDS32_LO12S1_RELA 29
12088 R_NDS32_LO12S2_RELA 28
12089 R_NDS32_LO12S2_SP_RELA 71
12090 R_NDS32_LO12S2_DP_RELA 70
12091 R_NDS32_GOT_LO12 46
12092 R_NDS32_GOTOFF_LO12 50
12093 R_NDS32_PLTREL_LO12 65
12094 R_NDS32_PLT_GOTREL_LO12 67
12095 R_NDS32_17IFC_PCREL_RELA 96
12096 R_NDS32_GOT_SUFF 193
12097 R_NDS32_GOTOFF_SUFF 194
12098 R_NDS32_PLT_GOT_SUFF 195
12099 R_NDS32_MULCALL_SUFF 196
12100 R_NDS32_PTR 197 */
12101 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12102 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12103 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12104 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12105 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12106 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12107 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12108 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12109 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12110 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12111 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12112 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12113 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12114 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12115 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12116 seq_len = 0;
12117 else
12118 continue;
12119
12120 insn_len = seq_len;
12121 removed = FALSE;
12122
12123 switch (ELF32_R_TYPE (irel->r_info))
12124 {
12125 case R_NDS32_LONGCALL1:
12126 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12127 &insn_len, contents, isymbuf,
12128 symtab_hdr);
12129 break;
12130 case R_NDS32_LONGCALL2:
12131 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12132 &insn_len, contents, isymbuf,
12133 symtab_hdr);
12134 break;
12135 case R_NDS32_LONGCALL3:
12136 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12137 &insn_len, contents, isymbuf,
12138 symtab_hdr);
12139 break;
12140 case R_NDS32_LONGJUMP1:
12141 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12142 &insn_len, contents, isymbuf,
12143 symtab_hdr);
12144 break;
12145 case R_NDS32_LONGJUMP2:
12146 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12147 &insn_len, contents, isymbuf,
12148 symtab_hdr);
12149 break;
12150 case R_NDS32_LONGJUMP3:
12151 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12152 &insn_len, contents, isymbuf,
12153 symtab_hdr);
12154 break;
12155 case R_NDS32_LONGCALL4:
12156 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12157 &insn_len, contents, isymbuf,
12158 symtab_hdr);
12159 break;
12160 case R_NDS32_LONGCALL5:
12161 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12162 &insn_len, contents, isymbuf,
12163 symtab_hdr);
12164 break;
12165 case R_NDS32_LONGCALL6:
12166 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12167 &insn_len, contents, isymbuf,
12168 symtab_hdr);
12169 break;
12170 case R_NDS32_LONGJUMP4:
12171 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12172 &insn_len, contents, isymbuf,
12173 symtab_hdr);
12174 break;
12175 case R_NDS32_LONGJUMP5:
12176 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12177 &insn_len, &seq_len, contents,
12178 isymbuf, symtab_hdr);
12179 break;
12180 case R_NDS32_LONGJUMP6:
12181 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12182 &insn_len, &seq_len, contents,
12183 isymbuf, symtab_hdr);
12184 break;
12185 case R_NDS32_LONGJUMP7:
12186 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12187 &insn_len, &seq_len, contents,
12188 isymbuf, symtab_hdr);
12189 break;
12190 case R_NDS32_LOADSTORE:
12191 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12192 internal_relocs, &insn_len,
12193 contents, isymbuf, symtab_hdr,
12194 load_store_relax);
12195 break;
12196 case R_NDS32_LO12S0_RELA:
12197 case R_NDS32_LO12S1_RELA:
12198 case R_NDS32_LO12S2_DP_RELA:
12199 case R_NDS32_LO12S2_SP_RELA:
12200 case R_NDS32_LO12S2_RELA:
12201 /* Relax for low part. */
12202 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12203 contents, isymbuf, symtab_hdr);
12204
12205 /* It is impossible to delete blank, so just continue. */
12206 continue;
12207 case R_NDS32_GOT_LO12:
12208 case R_NDS32_GOTOFF_LO12:
12209 case R_NDS32_PLTREL_LO12:
12210 case R_NDS32_PLT_GOTREL_LO12:
12211 case R_NDS32_GOTPC_LO12:
12212 /* Relax for PIC gp-relative low part. */
12213 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12214 isymbuf, symtab_hdr);
35c08157 12215
1c8f6a4d
KLC
12216 /* It is impossible to delete blank, so just continue. */
12217 continue;
12218 case R_NDS32_TLS_LE_LO12:
12219 /* Relax for LE TLS low part. */
12220 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12221 isymbuf, symtab_hdr);
35c08157 12222
1c8f6a4d
KLC
12223 /* It is impossible to delete blank, so just continue. */
12224 continue;
12225 case R_NDS32_TLS_LE_ADD:
12226 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12227 contents, isymbuf, symtab_hdr, again);
12228 /* It is impossible to delete blank, so just continue. */
12229 continue;
12230 case R_NDS32_TLS_LE_LS:
12231 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12232 contents, isymbuf, symtab_hdr, again);
12233 continue;
12234 case R_NDS32_PTR:
12235 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12236 &insn_len, &seq_len, contents);
12237 break;
12238 case R_NDS32_PLT_GOT_SUFF:
12239 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12240 internal_relocs, contents,
12241 isymbuf, symtab_hdr, again);
12242 /* It is impossible to delete blank, so just continue. */
12243 continue;
12244 case R_NDS32_GOT_SUFF:
12245 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12246 internal_relocs, contents,
12247 symtab_hdr, again);
12248 /* It is impossible to delete blank, so just continue. */
12249 continue;
12250 case R_NDS32_GOTOFF_SUFF:
12251 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12252 internal_relocs, contents,
12253 isymbuf, symtab_hdr, again);
12254 /* It is impossible to delete blank, so just continue. */
12255 continue;
12256 default:
12257 continue;
12258
12259 }
12260 if (removed && seq_len - insn_len > 0)
12261 {
12262 if (!insert_nds32_elf_blank
12263 (&relax_blank_list, irel->r_offset + insn_len,
12264 seq_len - insn_len))
12265 goto error_return;
12266 *again = TRUE;
35c08157 12267 }
1c8f6a4d
KLC
12268 }
12269
12270 calc_nds32_blank_total (relax_blank_list);
12271
12272 if (table->relax_fp_as_gp)
12273 {
12274 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12275 irelend, isymbuf))
12276 goto error_return;
35c08157 12277
1c8f6a4d 12278 if (*again == FALSE)
35c08157 12279 {
1c8f6a4d
KLC
12280 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12281 irelend))
12282 goto error_return;
35c08157
KLC
12283 }
12284 }
1c8f6a4d
KLC
12285
12286 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12287
12288 if (*again == FALSE)
12289 {
12290 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12291 &relax_blank_list, optimize, opt_size))
12292 goto error_return;
12293 }
12294
12295 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC
12296 If object file is assembled with flag '-Os',
12297 the we don't adjust jump-destination on 4-byte boundary. */
12298
12299 if (relax_blank_list)
12300 {
12301 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12302 relax_blank_list = NULL;
12303 }
12304
12305 if (*again == FALSE)
12306 {
12307 /* Closing the section, so we don't relax it anymore. */
12308 bfd_vma sec_size_align;
12309 Elf_Internal_Rela *tmp_rel;
12310
12311 /* Pad to alignment boundary. Only handle current section alignment. */
12312 sec_size_align = (sec->size + (~((-1) << sec->alignment_power)))
12313 & ((-1) << sec->alignment_power);
12314 if ((sec_size_align - sec->size) & 0x2)
12315 {
12316 insn16 = NDS32_NOP16;
12317 bfd_putb16 (insn16, contents + sec->size);
12318 sec->size += 2;
12319 }
12320
12321 while (sec_size_align != sec->size)
12322 {
12323 insn = NDS32_NOP32;
12324 bfd_putb32 (insn, contents + sec->size);
12325 sec->size += 4;
12326 }
12327
1c8f6a4d
KLC
12328 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12329 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
12330 if (tmp_rel != irelend)
12331 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12332
12333 clean_nds32_elf_blank ();
12334 }
12335
12336finish:
12337 if (internal_relocs != NULL
12338 && elf_section_data (sec)->relocs != internal_relocs)
12339 free (internal_relocs);
12340
12341 if (contents != NULL
12342 && elf_section_data (sec)->this_hdr.contents != contents)
12343 free (contents);
12344
12345 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12346 free (isymbuf);
12347
12348 return result;
12349
12350error_return:
12351 result = FALSE;
12352 goto finish;
12353}
12354
12355static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12356{
12357 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12358 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12359 {NULL, 0, 0, 0, 0}
12360};
12361
12362static bfd_boolean
12363nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12364 struct bfd_link_info *info,
12365 void *finfo ATTRIBUTE_UNUSED,
12366 bfd_boolean (*func) (void *, const char *,
12367 Elf_Internal_Sym *,
12368 asection *,
12369 struct elf_link_hash_entry *)
12370 ATTRIBUTE_UNUSED)
12371{
12372 FILE *sym_ld_script = NULL;
12373 struct elf_nds32_link_hash_table *table;
12374
12375 table = nds32_elf_hash_table (info);
12376 sym_ld_script = table->sym_ld_script;
12377
12378 if (check_start_export_sym)
12379 fprintf (sym_ld_script, "}\n");
12380
12381 return TRUE;
12382}
12383
12384static enum elf_reloc_type_class
12385nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12386 const asection *rel_sec ATTRIBUTE_UNUSED,
12387 const Elf_Internal_Rela *rela)
12388{
12389 switch ((int) ELF32_R_TYPE (rela->r_info))
12390 {
12391 case R_NDS32_RELATIVE:
12392 return reloc_class_relative;
12393 case R_NDS32_JMP_SLOT:
12394 return reloc_class_plt;
12395 case R_NDS32_COPY:
12396 return reloc_class_copy;
12397 default:
12398 return reloc_class_normal;
12399 }
12400}
12401
12402/* Put target dependent option into info hash table. */
12403void
12404bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12405 int relax_fp_as_gp,
12406 int eliminate_gc_relocs,
12407 FILE * sym_ld_script, int load_store_relax,
12408 int target_optimize, int relax_status,
12409 int relax_round, FILE * ex9_export_file,
12410 FILE * ex9_import_file,
12411 int update_ex9_table, int ex9_limit,
12412 bfd_boolean ex9_loop_aware,
12413 bfd_boolean ifc_loop_aware)
12414{
12415 struct elf_nds32_link_hash_table *table;
12416
12417 table = nds32_elf_hash_table (link_info);
12418 if (table == NULL)
12419 return;
12420
12421 table->relax_fp_as_gp = relax_fp_as_gp;
12422 table->eliminate_gc_relocs = eliminate_gc_relocs;
12423 table->sym_ld_script = sym_ld_script;
12424 table ->load_store_relax = load_store_relax;
12425 table->target_optimize = target_optimize;
12426 table->relax_status = relax_status;
12427 table->relax_round = relax_round;
12428 table->ex9_export_file = ex9_export_file;
12429 table->ex9_import_file = ex9_import_file;
12430 table->update_ex9_table = update_ex9_table;
12431 table->ex9_limit = ex9_limit;
12432 table->ex9_loop_aware = ex9_loop_aware;
12433 table->ifc_loop_aware = ifc_loop_aware;
12434}
12435\f
12436/* These functions and data-structures are used for fp-as-gp
12437 optimization. */
12438
12439#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC
12440/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12441 the read-only section and read-write section. */
12442#define FAG_WINDOW (508 - 32)
35c08157
KLC
12443
12444/* An nds32_fag represent a gp-relative access.
12445 We find best fp-base by using a sliding window
12446 to find a base address which can cover most gp-access. */
12447struct nds32_fag
12448{
12449 struct nds32_fag *next; /* NULL-teminated linked list. */
12450 bfd_vma addr; /* The address of this fag. */
12451 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12452 It is used for applying FP7U2_FLAG. */
12453 int count; /* How many times this address is referred.
12454 There should be exactly `count' relocations
12455 in relas. */
12456 int relas_capcity; /* The buffer size of relas.
12457 We use an array instead of linked-list,
12458 and realloc is used to adjust buffer size. */
12459};
12460
12461static void
12462nds32_fag_init (struct nds32_fag *head)
12463{
12464 memset (head, 0, sizeof (struct nds32_fag));
12465}
12466
12467static void
12468nds32_fag_verify (struct nds32_fag *head)
12469{
12470 struct nds32_fag *iter;
12471 struct nds32_fag *prev;
12472
12473 prev = NULL;
12474 iter = head->next;
12475 while (iter)
12476 {
12477 if (prev && prev->addr >= iter->addr)
12478 puts ("Bug in fp-as-gp insertion.");
12479 prev = iter;
12480 iter = iter->next;
12481 }
12482}
12483
12484/* Insert a fag in ascending order.
12485 If a fag of the same address already exists,
12486 they are chained by relas array. */
12487
12488static void
12489nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12490 Elf_Internal_Rela * rel)
12491{
12492 struct nds32_fag *iter;
12493 struct nds32_fag *new_fag;
12494 const int INIT_RELAS_CAP = 4;
12495
12496 for (iter = head;
12497 iter->next && iter->next->addr <= addr;
12498 iter = iter->next)
12499 /* Find somewhere to insert. */ ;
12500
12501 /* `iter' will be equal to `head' if the list is empty. */
12502 if (iter != head && iter->addr == addr)
12503 {
12504 /* The address exists in the list.
12505 Insert `rel' into relocation list, relas. */
12506
12507 /* Check whether relas is big enough. */
12508 if (iter->count >= iter->relas_capcity)
12509 {
12510 iter->relas_capcity *= 2;
12511 iter->relas = bfd_realloc
12512 (iter->relas, iter->relas_capcity * sizeof (void *));
12513 }
12514 iter->relas[iter->count++] = rel;
12515 return;
12516 }
12517
12518 /* This is a new address. Create a fag node for it. */
12519 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12520 memset (new_fag, 0, sizeof (*new_fag));
12521 new_fag->addr = addr;
12522 new_fag->count = 1;
12523 new_fag->next = iter->next;
12524 new_fag->relas_capcity = INIT_RELAS_CAP;
12525 new_fag->relas = (Elf_Internal_Rela **)
12526 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12527 new_fag->relas[0] = rel;
12528 iter->next = new_fag;
12529
12530 nds32_fag_verify (head);
12531}
12532
12533static void
12534nds32_fag_free_list (struct nds32_fag *head)
12535{
12536 struct nds32_fag *iter;
12537
12538 iter = head->next;
12539 while (iter)
12540 {
12541 struct nds32_fag *tmp = iter;
12542 iter = iter->next;
12543 free (tmp->relas);
12544 tmp->relas = NULL;
12545 free (tmp);
12546 }
12547}
12548
35c08157
KLC
12549/* Find the best fp-base address.
12550 The relocation associated with that address is returned,
12551 so we can track the symbol instead of a fixed address.
12552
12553 When relaxation, the address of an datum may change,
12554 because a text section is shrinked, so the data section
1c8f6a4d 12555 moves forward. If the aligments of text and data section
35c08157
KLC
12556 are different, their distance may change too.
12557 Therefore, tracking a fixed address is not appriate. */
12558
12559static int
12560nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12561{
12562 struct nds32_fag *base; /* First fag in the window. */
12563 struct nds32_fag *last; /* First fag outside the window. */
12564 int accu = 0; /* Usage accumulation. */
12565 struct nds32_fag *best; /* Best fag. */
12566 int baccu = 0; /* Best accumulation. */
12567
12568 /* Use first fag for initial, and find the last fag in the window.
12569
12570 In each iteration, we could simply subtract previous fag
12571 and accumulate following fags which are inside the window,
12572 untill we each the end. */
12573
1c8f6a4d
KLC
12574 if (head->next == NULL)
12575 {
12576 *bestpp = NULL;
12577 return 0;
12578 }
35c08157
KLC
12579
12580 /* Initialize base. */
12581 base = head->next;
12582 best = base;
12583 for (last = base;
12584 last && last->addr < base->addr + FAG_WINDOW;
12585 last = last->next)
12586 accu += last->count;
12587
12588 baccu = accu;
12589
12590 /* Record the best base in each iteration. */
12591 while (base->next)
1c8f6a4d
KLC
12592 {
12593 accu -= base->count;
12594 base = base->next;
12595 /* Account fags in window. */
12596 for (/* Nothing. */;
12597 last && last->addr < base->addr + FAG_WINDOW;
12598 last = last->next)
12599 accu += last->count;
12600
12601 /* A better fp-base? */
12602 if (accu > baccu)
12603 {
12604 best = base;
12605 baccu = accu;
12606 }
12607 }
35c08157
KLC
12608
12609 if (bestpp)
12610 *bestpp = best;
12611 return baccu;
12612}
12613
12614/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12615 so we can convert it fo fp-relative access later.
12616 `best_fag' is the best fp-base. Only those inside the window
12617 of best_fag is applied the flag. */
12618
12619static bfd_boolean
12620nds32_fag_mark_relax (struct bfd_link_info *link_info,
12621 bfd *abfd, struct nds32_fag *best_fag,
12622 Elf_Internal_Rela *internal_relocs,
12623 Elf_Internal_Rela *irelend)
12624{
12625 struct nds32_fag *ifag;
12626 bfd_vma best_fpbase, gp;
12627 bfd *output_bfd;
12628
12629 output_bfd = abfd->sections->output_section->owner;
12630 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12631 best_fpbase = best_fag->addr;
12632
1c8f6a4d
KLC
12633 if (best_fpbase > gp + sdata_range[1][1]
12634 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC
12635 return FALSE;
12636
12637 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12638 so we know they can be converted to lwi37.fp. */
12639 for (ifag = best_fag;
12640 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12641 {
12642 int i;
12643
12644 for (i = 0; i < ifag->count; i++)
12645 {
12646 Elf_Internal_Rela *insn16_rel;
12647 Elf_Internal_Rela *fag_rel;
12648
12649 fag_rel = ifag->relas[i];
12650
12651 /* Only if this is within the WINDOWS, FP7U2_FLAG
12652 is applied. */
12653
12654 insn16_rel = find_relocs_at_address
12655 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12656
12657 if (insn16_rel != irelend)
12658 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12659 }
12660 }
12661 return TRUE;
12662}
12663
1c8f6a4d
KLC
12664/* Reset INSN16 to clean fp as gp. */
12665
12666static void
12667nds32_fag_unmark_relax (struct nds32_fag *fag,
12668 Elf_Internal_Rela *internal_relocs,
12669 Elf_Internal_Rela *irelend)
12670{
12671 struct nds32_fag *ifag;
12672 int i;
12673 Elf_Internal_Rela *insn16_rel;
12674 Elf_Internal_Rela *fag_rel;
12675
12676 for (ifag = fag; ifag; ifag = ifag->next)
12677 {
12678 for (i = 0; i < ifag->count; i++)
12679 {
12680 fag_rel = ifag->relas[i];
12681
12682 /* Restore the INSN16 relocation. */
12683 insn16_rel = find_relocs_at_address
12684 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12685
12686 if (insn16_rel != irelend)
12687 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12688 }
12689 }
12690}
12691
35c08157
KLC
12692/* This is the main function of fp-as-gp optimization.
12693 It should be called by relax_section. */
12694
12695static bfd_boolean
12696nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12697 bfd *abfd, asection *sec,
12698 Elf_Internal_Rela *internal_relocs,
12699 Elf_Internal_Rela *irelend,
12700 Elf_Internal_Sym *isymbuf)
12701{
12702 Elf_Internal_Rela *begin_rel = NULL;
12703 Elf_Internal_Rela *irel;
12704 struct nds32_fag fag_head;
12705 Elf_Internal_Shdr *symtab_hdr;
12706 bfd_byte *contents;
1c8f6a4d 12707 bfd_boolean ifc_inside = FALSE;
35c08157
KLC
12708
12709 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12710
12711 /* Per-function fp-base selection.
12712 1. Create a list for all the gp-relative access.
12713 2. Base on those gp-relative address,
12714 find a fp-base which can cover most access.
12715 3. Use the fp-base for fp-as-gp relaxation.
12716
12717 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12718 we should
12719 1. delete the `la $fp, _FP_BASE_' instruction and
12720 2. not convert lwi.gp to lwi37.fp.
12721
12722 To delete the _FP_BASE_ instruction, we simply apply
12723 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12724
12725 To suppress the conversion, we simply NOT to apply
12726 R_NDS32_INSN16_FP7U2_FLAG flag. */
12727
12728 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12729
12730 if (!nds32_get_section_contents (abfd, sec, &contents)
12731 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12732 return FALSE;
12733
12734 /* Check whether it is worth for fp-as-gp optimization,
12735 i.e., at least 3 gp-load.
12736
12737 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12738 apply this optimization. */
12739
12740 for (irel = internal_relocs; irel < irelend; irel++)
12741 {
12742 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12743 One we enter the begin of the region, we track all the LW/ST
12744 instructions, so when we leave the region, we try to find
12745 the best fp-base address for those LW/ST instructions. */
12746
12747 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12748 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12749 {
12750 /* Begin of the region. */
12751 if (begin_rel)
12752 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12753
12754 begin_rel = irel;
12755 nds32_fag_init (&fag_head);
1c8f6a4d 12756 ifc_inside = FALSE;
35c08157
KLC
12757 }
12758 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12759 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12760 {
12761 int accu;
1c8f6a4d 12762 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC
12763 int dist;
12764
12765 /* End of the region.
12766 Check whether it is worth to do fp-as-gp. */
12767
12768 if (begin_rel == NULL)
12769 {
12770 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12771 continue;
12772 }
12773
12774 accu = nds32_fag_find_base (&fag_head, &best_fag);
12775
1c8f6a4d
KLC
12776 /* Clean FP7U2_FLAG because they may set ever. */
12777 tmp_fag = fag_head.next;
12778 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12779
35c08157
KLC
12780 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12781 if (accu < FAG_THRESHOLD
12782 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12783 internal_relocs, irelend))
12784 {
12785 /* Not worth to do fp-as-gp. */
12786 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12787 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12788 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12789 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12790 nds32_fag_free_list (&fag_head);
12791 begin_rel = NULL;
12792 continue;
12793 }
12794
12795 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12796 so we use it to record the distance to the reloction of best
12797 fp-base. */
12798 dist = best_fag->relas[0] - begin_rel;
12799 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12800 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12801 relocation. And get the base value when relocating. */
1c8f6a4d 12802 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC
12803 begin_rel->r_addend |= dist << 16;
12804
12805 nds32_fag_free_list (&fag_head);
12806 begin_rel = NULL;
12807 }
12808
1c8f6a4d 12809 if (begin_rel == NULL || ifc_inside)
35c08157
KLC
12810 /* Skip if we are not in the region of fp-as-gp. */
12811 continue;
12812
12813 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12814 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12815 {
12816 bfd_vma addr;
12817 uint32_t insn;
12818
12819 /* A gp-relative access is found. Insert it to the fag-list. */
12820
12821 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12822 insn = bfd_getb32 (contents + irel->r_offset);
12823 if (!N32_IS_RT3 (insn))
12824 continue;
12825
12826 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12827 nds32_fag_insert (&fag_head, addr, irel);
12828 }
12829 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12830 {
12831 begin_rel = NULL;
12832 }
1c8f6a4d
KLC
12833 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12834 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12835 {
12836 /* Suppress fp as gp when encounter ifc. */
12837 ifc_inside = TRUE;
12838 }
35c08157
KLC
12839 }
12840
12841 return TRUE;
12842}
12843
12844/* Remove unused `la $fp, _FD_BASE_' instruction. */
12845
12846static bfd_boolean
12847nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12848 Elf_Internal_Rela *internal_relocs,
12849 Elf_Internal_Rela *irelend)
12850{
12851 Elf_Internal_Rela *irel;
12852 Elf_Internal_Shdr *symtab_hdr;
12853 bfd_byte *contents = NULL;
12854 nds32_elf_blank_t *relax_blank_list = NULL;
12855 bfd_boolean result = TRUE;
12856 bfd_boolean unused_region = FALSE;
12857
12858 /*
12859 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12860 * R_NDS32_17IFC_PCREL_RELA
12861 * R_NDS32_10IFCU_PCREL_RELA
12862
12863 CASE??????????????
12864 */
12865
12866 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12867 nds32_get_section_contents (abfd, sec, &contents);
12868
12869 for (irel = internal_relocs; irel < irelend; irel++)
12870 {
12871 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12872 we marked to in previous pass.
12873 DO NOT scan relocations again, since we've alreadly decided it
12874 and set the flag. */
12875 const char *syname;
12876 int syndx;
12877 uint32_t insn;
12878
12879 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12880 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12881 unused_region = TRUE;
12882 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12883 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12884 unused_region = FALSE;
12885
12886 /* We're not in the region. */
12887 if (!unused_region)
12888 continue;
12889
12890 /* _FP_BASE_ must be a GLOBAL symbol. */
12891 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12892 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12893 continue;
12894
12895 /* The symbol name must be _FP_BASE_. */
12896 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12897 if (strcmp (syname, FP_BASE_NAME) != 0)
12898 continue;
12899
12900 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12901 {
12902 /* addi.gp $fp, -256 */
12903 insn = bfd_getb32 (contents + irel->r_offset);
12904 if (insn != INSN_ADDIGP_TO_FP)
12905 continue;
12906 }
12907 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12908 {
12909 /* addi $fp, $gp, -256 */
12910 insn = bfd_getb32 (contents + irel->r_offset);
12911 if (insn != INSN_ADDI_GP_TO_FP)
12912 continue;
12913 }
12914 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12915 {
12916 /* movi $fp, FP_BASE */
12917 insn = bfd_getb32 (contents + irel->r_offset);
12918 if (insn != INSN_MOVI_TO_FP)
12919 continue;
12920 }
12921 else
12922 continue;
12923
12924 /* We got here because a FP_BASE instruction is found. */
12925 if (!insert_nds32_elf_blank_recalc_total
12926 (&relax_blank_list, irel->r_offset, 4))
12927 goto error_return;
12928 }
12929
12930finish:
12931 if (relax_blank_list)
12932 {
12933 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12934 relax_blank_list = NULL;
12935 }
12936 return result;
12937
12938error_return:
12939 result = FALSE;
12940 goto finish;
12941}
1c8f6a4d
KLC
12942
12943/* This is a version of bfd_generic_get_relocated_section_contents.
12944 We need this variety because relaxation will modify the dwarf
12945 infomation. When there is undefined symbol reference error mesage,
12946 linker need to dump line number where the symbol be used. However
12947 the address is be relaxed, it can not get the original dwarf contents.
12948 The variety only modify function call for reading in the section. */
12949
12950static bfd_byte *
12951nds32_elf_get_relocated_section_contents (bfd *abfd,
12952 struct bfd_link_info *link_info,
12953 struct bfd_link_order *link_order,
12954 bfd_byte *data,
12955 bfd_boolean relocatable,
12956 asymbol **symbols)
12957{
12958 bfd *input_bfd = link_order->u.indirect.section->owner;
12959 asection *input_section = link_order->u.indirect.section;
12960 long reloc_size;
12961 arelent **reloc_vector;
12962 long reloc_count;
12963
12964 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12965 if (reloc_size < 0)
12966 return NULL;
12967
12968 /* Read in the section. */
12969 if (!nds32_get_section_contents (input_bfd, input_section, &data))
12970 return NULL;
12971
12972 if (reloc_size == 0)
12973 return data;
12974
12975 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12976 if (reloc_vector == NULL)
12977 return NULL;
12978
12979 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12980 reloc_vector, symbols);
12981 if (reloc_count < 0)
12982 goto error_return;
12983
12984 if (reloc_count > 0)
12985 {
12986 arelent **parent;
12987 for (parent = reloc_vector; *parent != NULL; parent++)
12988 {
12989 char *error_message = NULL;
12990 asymbol *symbol;
12991 bfd_reloc_status_type r;
12992
12993 symbol = *(*parent)->sym_ptr_ptr;
12994 if (symbol->section && discarded_section (symbol->section))
12995 {
12996 bfd_byte *p;
12997 static reloc_howto_type none_howto
12998 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12999 "unused", FALSE, 0, 0, FALSE);
13000
13001 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13002 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13003 p);
13004 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13005 (*parent)->addend = 0;
13006 (*parent)->howto = &none_howto;
13007 r = bfd_reloc_ok;
13008 }
13009 else
13010 r = bfd_perform_relocation (input_bfd, *parent, data,
13011 input_section,
13012 relocatable ? abfd : NULL,
13013 &error_message);
13014
13015 if (relocatable)
13016 {
13017 asection *os = input_section->output_section;
13018
13019 /* A partial link, so keep the relocs. */
13020 os->orelocation[os->reloc_count] = *parent;
13021 os->reloc_count++;
13022 }
13023
13024 if (r != bfd_reloc_ok)
13025 {
13026 switch (r)
13027 {
13028 case bfd_reloc_undefined:
13029 if (!((*link_info->callbacks->undefined_symbol)
13030 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13031 input_bfd, input_section, (*parent)->address, TRUE)))
13032 goto error_return;
13033 break;
13034 case bfd_reloc_dangerous:
13035 BFD_ASSERT (error_message != NULL);
13036 if (!((*link_info->callbacks->reloc_dangerous)
13037 (link_info, error_message, input_bfd, input_section,
13038 (*parent)->address)))
13039 goto error_return;
13040 break;
13041 case bfd_reloc_overflow:
13042 if (!((*link_info->callbacks->reloc_overflow)
13043 (link_info, NULL,
13044 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13045 (*parent)->howto->name, (*parent)->addend,
13046 input_bfd, input_section, (*parent)->address)))
13047 goto error_return;
13048 break;
13049 case bfd_reloc_outofrange:
13050 /* PR ld/13730:
13051 This error can result when processing some partially
13052 complete binaries. Do not abort, but issue an error
13053 message instead. */
13054 link_info->callbacks->einfo
13055 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13056 abfd, input_section, * parent);
13057 goto error_return;
13058
13059 default:
13060 abort ();
13061 break;
13062 }
13063 }
13064 }
13065 }
13066
13067 free (reloc_vector);
13068 return data;
13069
13070error_return:
13071 free (reloc_vector);
13072 return NULL;
13073}
35c08157
KLC
13074\f
13075/* Link-time IFC relaxation.
13076 In this optimization, we chains jump instructions
13077 of the same destination with ifcall. */
13078
13079
13080/* List to save jal and j relocation. */
13081struct elf_nds32_ifc_symbol_entry
13082{
13083 asection *sec;
13084 struct elf_link_hash_entry *h;
13085 struct elf_nds32_ifc_irel_list *irel_head;
13086 unsigned long insn;
13087 int times;
13088 int enable; /* Apply ifc. */
13089 int ex9_enable; /* Apply ifc after ex9. */
13090 struct elf_nds32_ifc_symbol_entry *next;
13091};
13092
13093struct elf_nds32_ifc_irel_list
13094{
13095 Elf_Internal_Rela *irel;
13096 asection *sec;
13097 bfd_vma addr;
13098 /* If this is set, then it is the last instruction for
13099 ifc-chain, so it must be keep for the actual branching. */
13100 int keep;
13101 struct elf_nds32_ifc_irel_list *next;
13102};
13103
13104static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13105
13106/* Insert symbol of jal and j for ifc. */
13107
13108static void
13109nds32_elf_ifc_insert_symbol (asection *sec,
13110 struct elf_link_hash_entry *h,
13111 Elf_Internal_Rela *irel,
13112 unsigned long insn)
13113{
13114 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13115
13116 /* Check there is target of existing entry the same as the new one. */
13117 while (ptr != NULL)
13118 {
13119 if (((h == NULL && ptr->sec == sec
13120 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13121 && ptr->irel_head->irel->r_addend == irel->r_addend)
13122 || h != NULL)
13123 && ptr->h == h
13124 && ptr->insn == insn)
13125 {
13126 /* The same target exist, so insert into list. */
13127 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13128
13129 while (irel_list->next != NULL)
13130 irel_list = irel_list->next;
13131 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13132 irel_list = irel_list->next;
13133 irel_list->irel = irel;
13134 irel_list->keep = 1;
13135
13136 if (h == NULL)
13137 irel_list->sec = NULL;
13138 else
13139 irel_list->sec = sec;
13140 irel_list->next = NULL;
13141 return;
13142 }
13143 if (ptr->next == NULL)
13144 break;
13145 ptr = ptr->next;
13146 }
13147
13148 /* There is no same target entry, so build a new one. */
13149 if (ifc_symbol_head == NULL)
13150 {
13151 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13152 ptr = ifc_symbol_head;
13153 }
13154 else
13155 {
13156 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13157 ptr = ptr->next;
13158 }
13159
13160 ptr->h = h;
13161 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13162 ptr->irel_head->irel = irel;
13163 ptr->insn = insn;
13164 ptr->irel_head->keep = 1;
13165
13166 if (h == NULL)
13167 {
13168 /* Local symbols. */
13169 ptr->sec = sec;
13170 ptr->irel_head->sec = NULL;
13171 }
13172 else
13173 {
13174 /* Global symbol. */
13175 ptr->sec = NULL;
13176 ptr->irel_head->sec = sec;
13177 }
13178
13179 ptr->irel_head->next = NULL;
13180 ptr->times = 0;
13181 ptr->enable = 0;
13182 ptr->ex9_enable = 0;
13183 ptr->next = NULL;
13184}
13185
13186/* Gather all jal and j instructions. */
13187
13188static bfd_boolean
13189nds32_elf_ifc_calc (struct bfd_link_info *info,
13190 bfd *abfd, asection *sec)
13191{
13192 Elf_Internal_Rela *internal_relocs;
13193 Elf_Internal_Rela *irelend;
13194 Elf_Internal_Rela *irel;
13195 Elf_Internal_Shdr *symtab_hdr;
13196 bfd_byte *contents = NULL;
1c8f6a4d 13197 uint32_t insn, insn_with_reg;
35c08157
KLC
13198 unsigned long r_symndx;
13199 struct elf_link_hash_entry *h;
13200 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13201 struct elf_nds32_link_hash_table *table;
13202 bfd_boolean ifc_loop_aware;
13203
13204 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13205 TRUE /* keep_memory */);
13206 irelend = internal_relocs + sec->reloc_count;
13207 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13208
13209 /* Check if the object enable ifc. */
13210 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13211 R_NDS32_RELAX_ENTRY);
13212
13213 if (irel == NULL
13214 || irel >= irelend
13215 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13216 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13217 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13218 return TRUE;
13219
13220 if (!nds32_get_section_contents (abfd, sec, &contents))
13221 return FALSE;
13222
13223 table = nds32_elf_hash_table (info);
13224 ifc_loop_aware = table->ifc_loop_aware;
13225 while (irel != NULL && irel < irelend)
13226 {
13227 /* Traverse all relocation and gather all of them to build the list. */
13228
13229 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13230 {
13231 if (ifc_loop_aware == 1
13232 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13233 {
13234 /* Check the region if loop or not. If it is true and
13235 ifc-loop-aware is true, ignore the region till region end. */
13236 while (irel != NULL
13237 && irel < irelend
13238 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13239 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13240 irel++;
13241 }
13242 }
13243
13244 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13245 {
13246 insn = bfd_getb32 (contents + irel->r_offset);
13247 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13248 r_symndx = ELF32_R_SYM (irel->r_info);
13249 if (r_symndx < symtab_hdr->sh_info)
13250 {
13251 /* Local symbol. */
13252 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13253 }
13254 else
13255 {
13256 /* External symbol. */
13257 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13258 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13259 }
13260 }
13261 irel++;
13262 }
13263 return TRUE;
13264}
13265
13266/* Determine whether j and jal should be substituted. */
13267
13268static void
13269nds32_elf_ifc_filter (struct bfd_link_info *info)
13270{
13271 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13272 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13273 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13274 struct elf_nds32_link_hash_table *table;
13275 int target_optimize;
13276 bfd_vma address;
13277
13278 table = nds32_elf_hash_table (info);
13279 target_optimize = table->target_optimize;
13280 while (ptr)
13281 {
13282 irel_ptr = ptr->irel_head;
13283 if (ptr->h == NULL)
13284 {
13285 /* Local symbol. */
13286 irel_keeper = irel_ptr;
13287 while (irel_ptr && irel_ptr->next)
13288 {
13289 /* Check there is jump target can be used. */
13290 if ((irel_ptr->next->irel->r_offset
13291 - irel_keeper->irel->r_offset) > 1022)
13292 irel_keeper = irel_ptr->next;
13293 else
13294 {
13295 ptr->enable = 1;
13296 irel_ptr->keep = 0;
13297 }
13298 irel_ptr = irel_ptr->next;
13299 }
13300 }
13301 else
13302 {
1c8f6a4d
KLC
13303 /* Global symbol. */
13304 /* We have to get the absolute address and decide
13305 whether to keep it or not. */
35c08157
KLC
13306 while (irel_ptr)
13307 {
13308 address = (irel_ptr->irel->r_offset
13309 + irel_ptr->sec->output_section->vma
13310 + irel_ptr->sec->output_offset);
13311 irel_ptr->addr = address;
13312 irel_ptr = irel_ptr->next;
13313 }
13314
13315 irel_ptr = ptr->irel_head;
13316 while (irel_ptr)
13317 {
1c8f6a4d 13318 /* Sort by address. */
35c08157
KLC
13319 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13320 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13321 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13322 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13323
1c8f6a4d 13324 /* Get the smallest one. */
35c08157
KLC
13325 while (irel_temp->next)
13326 {
13327 if (irel_temp->next->addr < irel_dest->addr)
13328 {
13329 irel_dest_prev = irel_temp;
13330 irel_dest = irel_temp->next;
13331 }
13332 irel_temp = irel_temp->next;
13333 }
1c8f6a4d 13334
35c08157
KLC
13335 if (irel_dest != irel_ptr)
13336 {
13337 if (irel_ptr_prev)
13338 irel_ptr_prev->next = irel_dest;
13339 if (irel_dest_prev)
13340 irel_dest_prev->next = irel_ptr;
13341 irel_temp = irel_ptr->next;
13342 irel_ptr->next = irel_dest->next;
13343 irel_dest->next = irel_temp;
13344 }
13345 irel_ptr_prev = irel_ptr;
13346 irel_ptr = irel_ptr->next;
13347 }
13348
13349 irel_ptr = ptr->irel_head;
13350 irel_keeper = irel_ptr;
13351 while (irel_ptr && irel_ptr->next)
13352 {
13353 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13354 irel_keeper = irel_ptr->next;
13355 else
13356 {
13357 ptr->enable = 1;
13358 irel_ptr->keep = 0;
13359 }
13360 irel_ptr = irel_ptr->next;
13361 }
13362 }
13363
1c8f6a4d 13364 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC
13365 if ((target_optimize & NDS32_RELAX_EX9_ON)
13366 && ptr->irel_head != irel_keeper)
13367 ptr->enable = 0;
13368 ptr = ptr->next;
13369 }
13370}
13371
13372/* Determine whether j and jal should be substituted after ex9 done. */
13373
13374static void
13375nds32_elf_ifc_filter_after_ex9 (void)
13376{
13377 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13378 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13379
13380 while (ptr)
13381 {
13382 if (ptr->enable == 0)
13383 {
13384 /* Check whether ifc is applied or not. */
13385 irel_ptr = ptr->irel_head;
13386 ptr->ex9_enable = 1;
13387 while (irel_ptr)
13388 {
13389 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13390 {
13391 /* Ex9 already. */
13392 ptr->ex9_enable = 0;
13393 break;
13394 }
13395 irel_ptr = irel_ptr->next;
13396 }
13397 }
13398 ptr = ptr->next;
13399 }
13400}
13401
13402/* Wrapper to do ifc relaxation. */
13403
13404bfd_boolean
13405nds32_elf_ifc_finish (struct bfd_link_info *info)
13406{
13407 int relax_status;
13408 struct elf_nds32_link_hash_table *table;
13409
13410 table = nds32_elf_hash_table (info);
13411 relax_status = table->relax_status;
13412
13413 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13414 nds32_elf_ifc_filter (info);
13415 else
13416 nds32_elf_ifc_filter_after_ex9 ();
13417
13418 if (!nds32_elf_ifc_replace (info))
13419 return FALSE;
13420
13421 if (table)
13422 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13423 return TRUE;
13424}
13425
13426/* Traverse the result of ifc filter and replace it with ifcall9. */
13427
13428static bfd_boolean
13429nds32_elf_ifc_replace (struct bfd_link_info *info)
13430{
13431 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13432 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13433 nds32_elf_blank_t *relax_blank_list = NULL;
13434 bfd_byte *contents = NULL;
13435 Elf_Internal_Rela *internal_relocs;
13436 Elf_Internal_Rela *irel;
13437 Elf_Internal_Rela *irelend;
13438 unsigned short insn16 = INSN_IFCALL9;
13439 struct elf_nds32_link_hash_table *table;
13440 int relax_status;
13441
13442 table = nds32_elf_hash_table (info);
13443 relax_status = table->relax_status;
13444
13445 while (ptr)
13446 {
13447 /* Traverse the ifc gather list, and replace the
13448 filter entries by ifcall9. */
13449 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC
13450 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13451 && ptr->ex9_enable == 1))
35c08157
KLC
13452 {
13453 irel_ptr = ptr->irel_head;
13454 if (ptr->h == NULL)
13455 {
13456 /* Local symbol. */
13457 internal_relocs = _bfd_elf_link_read_relocs
13458 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13459 irelend = internal_relocs + ptr->sec->reloc_count;
13460
1c8f6a4d
KLC
13461 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13462 &contents))
35c08157
KLC
13463 return FALSE;
13464
13465 while (irel_ptr)
13466 {
13467 if (irel_ptr->keep == 0 && irel_ptr->next)
13468 {
1c8f6a4d 13469 /* The one can be replaced. We have to check whether
35c08157
KLC
13470 there is any alignment point in the region. */
13471 irel = irel_ptr->irel;
1c8f6a4d
KLC
13472 while (((irel_ptr->next->keep == 0
13473 && irel < irel_ptr->next->irel)
35c08157
KLC
13474 || (irel_ptr->next->keep == 1 && irel < irelend))
13475 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13476 && (irel->r_addend & 0x1f) == 2))
13477 irel++;
13478 if (irel >= irelend
13479 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13480 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC
13481 && ((irel->r_offset - get_nds32_elf_blank_total
13482 (&relax_blank_list, irel->r_offset, 1))
13483 & 0x02) == 0))
35c08157
KLC
13484 {
13485 /* Replace by ifcall9. */
13486 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13487 if (!insert_nds32_elf_blank_recalc_total
13488 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13489 return FALSE;
13490 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13491 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13492 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13493 }
13494 }
13495 irel_ptr = irel_ptr->next;
13496 }
13497
13498 /* Delete the redundant code. */
13499 if (relax_blank_list)
13500 {
13501 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13502 relax_blank_list);
13503 relax_blank_list = NULL;
13504 }
13505 }
13506 else
13507 {
13508 /* Global symbol. */
13509 while (irel_ptr)
13510 {
13511 if (irel_ptr->keep == 0 && irel_ptr->next)
13512 {
13513 /* The one can be replaced, and we have to check
13514 whether there is any alignment point in the region. */
13515 internal_relocs = _bfd_elf_link_read_relocs
13516 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13517 TRUE /* keep_memory */);
13518 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13519 if (!nds32_get_section_contents
13520 (irel_ptr->sec->owner, irel_ptr->sec, &contents))
13521 return FALSE;
13522
13523 irel = irel_ptr->irel;
13524 while (((irel_ptr->sec == irel_ptr->next->sec
13525 && irel_ptr->next->keep == 0
13526 && irel < irel_ptr->next->irel)
13527 || ((irel_ptr->sec != irel_ptr->next->sec
13528 || irel_ptr->next->keep == 1)
13529 && irel < irelend))
13530 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13531 && (irel->r_addend & 0x1f) == 2))
13532 irel++;
13533 if (irel >= irelend
13534 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13535 && (irel->r_addend & 0x1f) == 2
13536 && ((irel->r_offset
13537 - get_nds32_elf_blank_total (&relax_blank_list,
13538 irel->r_offset, 1)) & 0x02) == 0))
13539 {
13540 /* Replace by ifcall9. */
13541 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13542 if (!insert_nds32_elf_blank_recalc_total
13543 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13544 return FALSE;
13545
13546 /* Delete the redundant code, and clear the relocation. */
13547 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13548 irel_ptr->sec,
13549 relax_blank_list);
13550 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13551 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13552 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13553 relax_blank_list = NULL;
13554 }
13555 }
13556
13557 irel_ptr = irel_ptr->next;
13558 }
13559 }
13560 }
13561 ptr = ptr->next;
13562 }
13563
13564 return TRUE;
13565}
13566
13567/* Relocate ifcall. */
13568
1c8f6a4d 13569static bfd_boolean
35c08157
KLC
13570nds32_elf_ifc_reloc (void)
13571{
13572 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13573 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13574 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13575 bfd_vma relocation, address;
13576 unsigned short insn16;
35c08157 13577 bfd_byte *contents = NULL;
1c8f6a4d
KLC
13578 static bfd_boolean done = FALSE;
13579
13580 if (done)
13581 return TRUE;
13582
13583 done = TRUE;
35c08157
KLC
13584
13585 while (ptr)
13586 {
1c8f6a4d 13587 /* Check the entry is enable ifcall. */
35c08157
KLC
13588 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13589 {
1c8f6a4d 13590 /* Get the reserve jump. */
35c08157
KLC
13591 irel_ptr = ptr->irel_head;
13592 while (irel_ptr)
13593 {
13594 if (irel_ptr->keep == 1)
13595 {
13596 irel_keeper = irel_ptr;
13597 break;
13598 }
13599 irel_ptr = irel_ptr->next;
13600 }
13601
13602 irel_ptr = ptr->irel_head;
13603 if (ptr->h == NULL)
13604 {
13605 /* Local symbol. */
13606 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, &contents))
13607 return FALSE;
13608
13609 while (irel_ptr)
13610 {
13611 if (irel_ptr->keep == 0
1c8f6a4d 13612 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC
13613 {
13614 relocation = irel_keeper->irel->r_offset;
13615 relocation = relocation - irel_ptr->irel->r_offset;
13616 while (irel_keeper && relocation > 1022)
13617 {
13618 irel_keeper = irel_keeper->next;
13619 if (irel_keeper && irel_keeper->keep == 1)
13620 {
13621 relocation = irel_keeper->irel->r_offset;
13622 relocation = relocation - irel_ptr->irel->r_offset;
13623 }
13624 }
13625 if (relocation > 1022)
13626 {
13627 /* Double check. */
13628 irel_keeper = ptr->irel_head;
13629 while (irel_keeper)
13630 {
13631 if (irel_keeper->keep == 1)
13632 {
13633 relocation = irel_keeper->irel->r_offset;
13634 relocation = relocation - irel_ptr->irel->r_offset;
13635 }
13636 if (relocation <= 1022)
13637 break;
13638 irel_keeper = irel_keeper->next;
13639 }
13640 if (!irel_keeper)
13641 return FALSE;
13642 }
1c8f6a4d
KLC
13643 irel_ptr->irel->r_info =
13644 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13645 R_NDS32_NONE);
35c08157
KLC
13646 insn16 = INSN_IFCALL9 | (relocation >> 1);
13647 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13648 }
13649 irel_ptr = irel_ptr->next;
13650 }
13651 }
13652 else
13653 {
13654 /* Global symbol. */
13655 while (irel_ptr)
13656 {
13657 if (irel_ptr->keep == 0
1c8f6a4d 13658 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13659 {
1c8f6a4d 13660 /* Get the distance between ifcall and jump. */
35c08157
KLC
13661 relocation = (irel_keeper->irel->r_offset
13662 + irel_keeper->sec->output_section->vma
13663 + irel_keeper->sec->output_offset);
13664 address = (irel_ptr->irel->r_offset
13665 + irel_ptr->sec->output_section->vma
13666 + irel_ptr->sec->output_offset);
13667 relocation = relocation - address;
1c8f6a4d
KLC
13668
13669 /* The distance is over ragne, find callee again. */
35c08157
KLC
13670 while (irel_keeper && relocation > 1022)
13671 {
13672 irel_keeper = irel_keeper->next;
13673 if (irel_keeper && irel_keeper->keep ==1)
13674 {
13675 relocation = (irel_keeper->irel->r_offset
13676 + irel_keeper->sec->output_section->vma
13677 + irel_keeper->sec->output_offset);
13678 relocation = relocation - address;
13679 }
13680 }
13681
13682 if (relocation > 1022)
13683 {
13684 /* Double check. */
13685 irel_keeper = ptr->irel_head;
13686 while (irel_keeper)
13687 {
13688 if (irel_keeper->keep == 1)
13689 {
13690
13691 relocation = (irel_keeper->irel->r_offset
13692 + irel_keeper->sec->output_section->vma
13693 + irel_keeper->sec->output_offset);
13694 relocation = relocation - address;
13695 }
13696 if (relocation <= 1022)
13697 break;
13698 irel_keeper = irel_keeper->next;
13699 }
13700 if (!irel_keeper)
13701 return FALSE;
13702 }
13703 if (!nds32_get_section_contents
1c8f6a4d
KLC
13704 (irel_ptr->sec->owner, irel_ptr->sec, &contents))
13705 return FALSE;
13706 insn16 = INSN_IFCALL9 | (relocation >> 1);
13707 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13708 irel_ptr->irel->r_info =
13709 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13710 R_NDS32_NONE);
35c08157
KLC
13711 }
13712 irel_ptr =irel_ptr->next;
13713 }
13714 }
13715 }
13716 ptr = ptr->next;
13717 }
13718
13719 return TRUE;
13720}
13721
13722/* End of IFC relaxation. */
13723\f
13724/* EX9 Instruction Table Relaxation. */
13725
13726/* Global hash list. */
13727struct elf_link_hash_entry_list
13728{
13729 struct elf_link_hash_entry *h;
13730 struct elf_link_hash_entry_list *next;
13731};
13732
13733/* Save different destination but same insn. */
13734struct elf_link_hash_entry_mul_list
13735{
13736 /* Global symbol times. */
13737 int times;
13738 /* Save relocation for each global symbol but useful?? */
13739 Elf_Internal_Rela *irel;
13740 /* For sethi, two sethi may have the same high-part but different low-parts. */
13741 Elf_Internal_Rela rel_backup;
13742 struct elf_link_hash_entry_list *h_list;
13743 struct elf_link_hash_entry_mul_list *next;
13744};
13745
13746/* Instruction hash table. */
13747struct elf_nds32_code_hash_entry
13748{
13749 struct bfd_hash_entry root;
13750 int times;
13751 /* For insn that can use relocation or constant ex: sethi. */
13752 int const_insn;
13753 asection *sec;
13754 struct elf_link_hash_entry_mul_list *m_list;
13755 /* Using r_addend. */
13756 Elf_Internal_Rela *irel;
13757 /* Using r_info. */
13758 Elf_Internal_Rela rel_backup;
13759};
13760
13761/* Instruction count list. */
13762struct elf_nds32_insn_times_entry
13763{
13764 const char *string;
13765 int times;
13766 int order;
13767 asection *sec;
13768 struct elf_link_hash_entry_mul_list *m_list;
13769 Elf_Internal_Rela *irel;
13770 Elf_Internal_Rela rel_backup;
13771 struct elf_nds32_insn_times_entry *next;
13772};
13773
13774/* J and JAL symbol list. */
13775struct elf_nds32_symbol_entry
13776{
13777 char *string;
13778 unsigned long insn;
13779 struct elf_nds32_symbol_entry *next;
13780};
13781
13782/* Relocation list. */
13783struct elf_nds32_irel_entry
13784{
13785 Elf_Internal_Rela *irel;
13786 struct elf_nds32_irel_entry *next;
13787};
13788
13789/* ex9.it insn need to be fixed. */
13790struct elf_nds32_ex9_refix
13791{
13792 Elf_Internal_Rela *irel;
13793 asection *sec;
13794 struct elf_link_hash_entry *h;
13795 int order;
13796 struct elf_nds32_ex9_refix *next;
13797};
13798
13799static struct bfd_hash_table ex9_code_table;
13800static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13801static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13802
13803/* EX9 hash function. */
13804
13805static struct bfd_hash_entry *
13806nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13807 struct bfd_hash_table *table,
13808 const char *string)
13809{
13810 struct elf_nds32_code_hash_entry *ret;
13811
13812 /* Allocate the structure if it has not already been allocated by a
13813 subclass. */
13814 if (entry == NULL)
13815 {
13816 entry = (struct bfd_hash_entry *)
13817 bfd_hash_allocate (table, sizeof (*ret));
13818 if (entry == NULL)
13819 return entry;
13820 }
13821
13822 /* Call the allocation method of the superclass. */
13823 entry = bfd_hash_newfunc (entry, table, string);
13824 if (entry == NULL)
13825 return entry;
13826
13827 ret = (struct elf_nds32_code_hash_entry*) entry;
13828 ret->times = 0;
13829 ret->const_insn = 0;
13830 ret->m_list = NULL;
13831 ret->sec = NULL;
13832 ret->irel = NULL;
13833 return &ret->root;
13834}
13835
13836/* Insert ex9 entry
13837 this insert must be stable sorted by times. */
13838
13839static void
13840nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13841{
13842 struct elf_nds32_insn_times_entry *temp;
13843 struct elf_nds32_insn_times_entry *temp2;
13844
13845 if (ex9_insn_head == NULL)
13846 {
13847 ex9_insn_head = ptr;
13848 ptr->next = NULL;
13849 }
13850 else
13851 {
13852 temp = ex9_insn_head;
13853 temp2 = ex9_insn_head;
13854 while (temp->next &&
13855 (temp->next->times >= ptr->times
13856 || temp->times == -1))
13857 {
13858 if (temp->times == -1)
13859 temp2 = temp;
13860 temp = temp->next;
13861 }
13862 if (ptr->times > temp->times && temp->times != -1)
13863 {
13864 ptr->next = temp;
13865 if (temp2->times == -1)
13866 temp2->next = ptr;
13867 else
13868 ex9_insn_head = ptr;
13869 }
13870 else if (temp->next == NULL)
13871 {
13872 temp->next = ptr;
13873 ptr->next = NULL;
13874 }
13875 else
13876 {
13877 ptr->next = temp->next;
13878 temp->next = ptr;
13879 }
13880 }
13881}
13882
13883/* Examine each insn times in hash table.
13884 Handle multi-link hash entry.
13885
13886 TODO: This function doesn't assign so much info since it is fake. */
13887
13888static int
13889nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13890{
13891 struct elf_nds32_insn_times_entry *ptr;
13892 int times;
13893
13894 if (h->m_list == NULL)
13895 {
13896 /* Local symbol insn or insn without relocation. */
13897 if (h->times < 3)
13898 return TRUE;
13899
13900 ptr = (struct elf_nds32_insn_times_entry *)
13901 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13902 ptr->times = h->times;
13903 ptr->string = h->root.string;
13904 ptr->m_list = NULL;
13905 ptr->sec = h->sec;
13906 ptr->irel = h->irel;
13907 ptr->rel_backup = h->rel_backup;
13908 nds32_elf_ex9_insert_entry (ptr);
13909 }
13910 else
13911 {
13912 /* Global symbol insn. */
13913 /* Only sethi insn has multiple m_list. */
13914 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13915
13916 times = 0;
13917 while (m_list)
13918 {
13919 times += m_list->times;
13920 m_list = m_list->next;
13921 }
13922 if (times >= 3)
13923 {
13924 m_list = h->m_list;
13925 ptr = (struct elf_nds32_insn_times_entry *)
13926 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13927 ptr->times = times; /* Use the total times. */
13928 ptr->string = h->root.string;
13929 ptr->m_list = m_list;
13930 ptr->sec = h->sec;
13931 ptr->irel = m_list->irel;
13932 ptr->rel_backup = m_list->rel_backup;
13933 nds32_elf_ex9_insert_entry (ptr);
13934 }
13935 if (h->const_insn == 1)
13936 {
13937 /* sethi with constant value. */
13938 if (h->times < 3)
13939 return TRUE;
13940
13941 ptr = (struct elf_nds32_insn_times_entry *)
13942 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13943 ptr->times = h->times;
13944 ptr->string = h->root.string;
13945 ptr->m_list = NULL;
13946 ptr->sec = NULL;
13947 ptr->irel = NULL;
13948 ptr->rel_backup = h->rel_backup;
13949 nds32_elf_ex9_insert_entry (ptr);
13950 }
13951 }
13952 return TRUE;
13953}
13954
13955/* Count each insn times in hash table.
13956 Handle multi-link hash entry. */
13957
13958static int
13959nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13960{
13961 int reservation, times;
13962 unsigned long relocation, min_relocation;
13963 struct elf_nds32_insn_times_entry *ptr;
13964
13965 if (h->m_list == NULL)
13966 {
13967 /* Local symbol insn or insn without relocation. */
13968 if (h->times < 3)
13969 return TRUE;
13970 ptr = (struct elf_nds32_insn_times_entry *)
13971 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13972 ptr->times = h->times;
13973 ptr->string = h->root.string;
13974 ptr->m_list = NULL;
13975 ptr->sec = h->sec;
13976 ptr->irel = h->irel;
13977 ptr->rel_backup = h->rel_backup;
13978 nds32_elf_ex9_insert_entry (ptr);
13979 }
13980 else
13981 {
13982 /* Global symbol insn. */
13983 /* Only sethi insn has multiple m_list. */
13984 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13985
13986 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13987 && m_list->next != NULL)
13988 {
13989 /* Sethi insn has different symbol or addend but has same hi20. */
13990 times = 0;
13991 reservation = 1;
13992 relocation = 0;
13993 min_relocation = 0xffffffff;
13994 while (m_list)
13995 {
13996 /* Get the minimum sethi address
13997 and calculate how many entry the sethi-list have to use. */
13998 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
13999 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14000 && (m_list->h_list->h->root.u.def.section != NULL
14001 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14002 {
14003 relocation = (m_list->h_list->h->root.u.def.value +
14004 m_list->h_list->h->root.u.def.section->output_section->vma +
14005 m_list->h_list->h->root.u.def.section->output_offset);
14006 relocation += m_list->irel->r_addend;
14007 }
14008 else
14009 relocation = 0;
14010 if (relocation < min_relocation)
14011 min_relocation = relocation;
14012 times += m_list->times;
14013 m_list = m_list->next;
14014 }
14015 if (min_relocation < ex9_relax_size)
14016 reservation = (min_relocation >> 12) + 1;
14017 else
14018 reservation = (min_relocation >> 12)
14019 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14020 if (reservation < (times / 3))
14021 {
14022 /* Efficient enough to use ex9. */
14023 int i;
14024
14025 for (i = reservation ; i > 0; i--)
14026 {
14027 /* Allocate number of reservation ex9 entry. */
14028 ptr = (struct elf_nds32_insn_times_entry *)
14029 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14030 ptr->times = h->m_list->times / reservation;
14031 ptr->string = h->root.string;
14032 ptr->m_list = h->m_list;
14033 ptr->sec = h->sec;
14034 ptr->irel = h->m_list->irel;
14035 ptr->rel_backup = h->m_list->rel_backup;
14036 nds32_elf_ex9_insert_entry (ptr);
14037 }
14038 }
14039 }
14040 else
14041 {
14042 /* Normal global symbol that means no different address symbol
14043 using same ex9 entry. */
14044 if (m_list->times >= 3)
14045 {
14046 ptr = (struct elf_nds32_insn_times_entry *)
14047 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14048 ptr->times = m_list->times;
14049 ptr->string = h->root.string;
14050 ptr->m_list = h->m_list;
14051 ptr->sec = h->sec;
14052 ptr->irel = h->m_list->irel;
14053 ptr->rel_backup = h->m_list->rel_backup;
14054 nds32_elf_ex9_insert_entry (ptr);
14055 }
14056 }
14057
14058 if (h->const_insn == 1)
14059 {
14060 /* sethi with constant value. */
14061 if (h->times < 3)
14062 return TRUE;
14063
14064 ptr = (struct elf_nds32_insn_times_entry *)
14065 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14066 ptr->times = h->times;
14067 ptr->string = h->root.string;
14068 ptr->m_list = NULL;
14069 ptr->sec = NULL;
14070 ptr->irel = NULL;
14071 ptr->rel_backup = h->rel_backup;
14072 nds32_elf_ex9_insert_entry (ptr);
14073 }
14074 }
14075
14076 return TRUE;
14077}
14078
14079/* Hash table traverse function. */
14080
14081static void
14082nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14083{
14084 unsigned int i;
14085
14086 ex9_code_table.frozen = 1;
14087 for (i = 0; i < ex9_code_table.size; i++)
14088 {
14089 struct bfd_hash_entry *p;
14090
14091 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14092 if (!func ((struct elf_nds32_code_hash_entry *) p))
14093 goto out;
14094 }
14095out:
14096 ex9_code_table.frozen = 0;
14097}
14098
14099
14100/* Give order number to insn list. */
14101
14102static void
14103nds32_elf_order_insn_times (struct bfd_link_info *info)
14104{
14105 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 14106 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 14107 struct elf_nds32_link_hash_table *table;
35c08157 14108 int ex9_limit;
1c8f6a4d
KLC
14109 int number = 0;
14110
14111 if (ex9_insn_head == NULL)
14112 return;
35c08157
KLC
14113
14114/* The max number of entries is 512. */
14115 ex9_insn = ex9_insn_head;
14116 table = nds32_elf_hash_table (info);
14117 ex9_limit = table->ex9_limit;
14118
35c08157
KLC
14119 ex9_insn = ex9_insn_head;
14120
1c8f6a4d 14121 while (ex9_insn != NULL && number < ex9_limit)
35c08157 14122 {
1c8f6a4d 14123 ex9_insn->order = number;
35c08157 14124 number++;
1c8f6a4d 14125 temp = ex9_insn;
35c08157
KLC
14126 ex9_insn = ex9_insn->next;
14127 }
14128
1c8f6a4d
KLC
14129 if (ex9_insn && temp)
14130 temp->next = NULL;
35c08157
KLC
14131
14132 while (ex9_insn != NULL)
14133 {
14134 /* Free useless entry. */
14135 temp = ex9_insn;
14136 ex9_insn = ex9_insn->next;
14137 free (temp);
14138 }
14139}
14140
14141/* Build .ex9.itable section. */
14142
14143static void
14144nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14145{
14146 asection *table_sec;
14147 struct elf_nds32_insn_times_entry *ptr;
14148 bfd *it_abfd;
14149 int number = 0;
14150 bfd_byte *contents = NULL;
14151
14152 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14153 it_abfd = it_abfd->link.next)
35c08157
KLC
14154 {
14155 /* Find the section .ex9.itable, and put all entries into it. */
14156 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14157 if (table_sec != NULL)
14158 {
14159 if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
14160 return;
14161
14162 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14163 number++;
14164
14165 table_sec->size = number * 4;
14166
14167 if (number == 0)
1c8f6a4d 14168 return;
35c08157
KLC
14169
14170 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14171 number = 0;
14172 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14173 {
14174 long val;
14175
14176 val = strtol (ptr->string, NULL, 16);
14177 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14178 number++;
14179 }
14180 break;
14181 }
14182 }
14183}
14184
14185/* Get insn with regs according to relocation type. */
14186
14187static void
14188nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14189 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC
14190{
14191 reloc_howto_type *howto = NULL;
14192
14193 if (irel == NULL
14194 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14195 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14196 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14197 {
14198 *insn_with_reg = insn;
14199 return;
14200 }
14201
14202 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14203 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14204}
14205
14206/* Mask number of address bits according to relocation. */
14207
14208static unsigned long
14209nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14210{
14211 reloc_howto_type *howto = NULL;
14212
14213 if (irel == NULL
14214 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14215 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14216 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14217 return 0;
14218
14219 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14220 return howto->dst_mask;
14221}
14222
14223static void
14224nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14225 struct elf_nds32_irel_entry *irel_ptr)
14226{
14227 if (*irel_list == NULL)
14228 {
14229 *irel_list = irel_ptr;
14230 irel_ptr->next = NULL;
14231 }
14232 else
14233 {
14234 irel_ptr->next = *irel_list;
14235 *irel_list = irel_ptr;
14236 }
14237}
14238
14239static void
14240nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14241 struct elf_link_hash_entry *h, int order)
14242{
14243 struct elf_nds32_ex9_refix *ptr;
14244
14245 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14246 ptr->sec = sec;
14247 ptr->irel = irel;
14248 ptr->h = h;
14249 ptr->order = order;
14250 ptr->next = NULL;
14251
14252 if (ex9_refix_head == NULL)
14253 ex9_refix_head = ptr;
14254 else
14255 {
14256 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14257
14258 while (temp->next != NULL)
14259 temp = temp->next;
14260 temp->next = ptr;
14261 }
14262}
14263
14264enum
14265{
14266 DATA_EXIST = 1,
14267 CLEAN_PRE = 1 << 1,
14268 PUSH_PRE = 1 << 2
14269};
14270
14271/* Check relocation type if supporting for ex9. */
14272
14273static int
14274nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14275 Elf_Internal_Rela **irel,
14276 Elf_Internal_Rela *irelend,
14277 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14278 asection *sec,bfd_vma *off,
35c08157
KLC
14279 bfd_byte *contents)
14280{
14281 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14282 bfd_boolean nested_ex9, nested_loop;
14283 bfd_boolean ex9_loop_aware;
14284 /* We use the highest 1 byte of result to record
14285 how many bytes location counter has to move. */
14286 int result = 0;
14287 Elf_Internal_Rela *irel_save = NULL;
14288 struct elf_nds32_link_hash_table *table;
14289
14290 table = nds32_elf_hash_table (info);
14291 ex9_loop_aware = table->ex9_loop_aware;
14292
14293 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14294 {
14295 switch (ELF32_R_TYPE ((*irel)->r_info))
14296 {
14297 case R_NDS32_RELAX_REGION_BEGIN:
14298 /* Ignore code block. */
14299 nested_ex9 = FALSE;
14300 nested_loop = FALSE;
14301 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14302 || (ex9_loop_aware
14303 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14304 {
14305 /* Check the region if loop or not. If it is true and
14306 ex9-loop-aware is true, ignore the region till region end. */
14307 /* To save the status for in .no_relax ex9 region and
14308 loop region to conform the block can do ex9 relaxation. */
14309 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14310 nested_loop = (ex9_loop_aware
14311 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14312 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14313 {
14314 (*irel)++;
14315 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14316 {
14317 /* There may be nested region. */
14318 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14319 nested_ex9 = TRUE;
14320 else if (ex9_loop_aware
14321 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14322 nested_loop = TRUE;
14323 }
14324 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14325 {
14326 /* The end of region. */
14327 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14328 nested_ex9 = FALSE;
14329 else if (ex9_loop_aware
14330 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14331 nested_loop = FALSE;
14332 }
1c8f6a4d 14333 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC
14334 && ((*irel)->r_addend & 0x1f) == 2)
14335 {
14336 /* Alignment exist in the region. */
14337 result |= CLEAN_PRE;
14338 if (((*irel)->r_offset -
14339 get_nds32_elf_blank_total (&relax_blank_list,
14340 (*irel)->r_offset, 0)) & 0x02)
14341 result |= PUSH_PRE;
14342 }
14343 }
14344 if ((*irel) >= irelend)
14345 *off = sec->size;
14346 else
14347 *off = (*irel)->r_offset;
14348
14349 /* The final instruction in the region, regard this one as data to ignore it. */
14350 result |= DATA_EXIST;
14351 return result;
14352 }
14353 break;
14354
14355 case R_NDS32_LABEL:
1c8f6a4d 14356 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC
14357 {
14358 /* Check this point is align and decide to do ex9 or not. */
14359 result |= CLEAN_PRE;
14360 if (((*irel)->r_offset -
14361 get_nds32_elf_blank_total (&relax_blank_list,
14362 (*irel)->r_offset, 0)) & 0x02)
14363 result |= PUSH_PRE;
14364 }
14365 break;
14366 case R_NDS32_32_RELA:
14367 /* Data. */
14368 result |= (4 << 24);
14369 result |= DATA_EXIST;
14370 break;
14371 case R_NDS32_16_RELA:
14372 /* Data. */
14373 result |= (2 << 24);
14374 result |= DATA_EXIST;
14375 break;
14376 case R_NDS32_DATA:
14377 /* Data. */
14378 /* The least code alignment is 2. If the data is only one byte,
14379 we have to shift one more byte. */
14380 if ((*irel)->r_addend == 1)
14381 result |= ((*irel)->r_addend << 25) ;
14382 else
14383 result |= ((*irel)->r_addend << 24) ;
14384
14385 result |= DATA_EXIST;
14386 break;
14387
14388 case R_NDS32_25_PCREL_RELA:
14389 case R_NDS32_SDA16S3_RELA:
14390 case R_NDS32_SDA15S3_RELA:
14391 case R_NDS32_SDA15S3:
14392 case R_NDS32_SDA17S2_RELA:
14393 case R_NDS32_SDA15S2_RELA:
14394 case R_NDS32_SDA12S2_SP_RELA:
14395 case R_NDS32_SDA12S2_DP_RELA:
14396 case R_NDS32_SDA15S2:
14397 case R_NDS32_SDA18S1_RELA:
14398 case R_NDS32_SDA15S1_RELA:
14399 case R_NDS32_SDA15S1:
14400 case R_NDS32_SDA19S0_RELA:
14401 case R_NDS32_SDA15S0_RELA:
14402 case R_NDS32_SDA15S0:
14403 case R_NDS32_HI20_RELA:
14404 case R_NDS32_LO12S0_ORI_RELA:
14405 case R_NDS32_LO12S0_RELA:
14406 case R_NDS32_LO12S1_RELA:
14407 case R_NDS32_LO12S2_RELA:
14408 /* These relocation is supported ex9 relaxation currently. */
14409 /* We have to save the relocation for using later, since we have
14410 to check there is any alignment in the same address. */
14411 irel_save = *irel;
14412 break;
14413 default:
14414 /* Not support relocations. */
14415 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC
14416 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14417 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC
14418 {
14419 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14420 But we have to consider if there is any side-effect. */
14421 if (!(result & DATA_EXIST))
14422 {
14423 /* We have to confirm there is no data relocation in the
14424 same address. In general case, this won't happen. */
14425 /* We have to do ex9 conservative, for those relocation not
14426 considerd we ignore instruction. */
14427 result |= DATA_EXIST;
14428 if (*(contents + *off) & 0x80)
14429 result |= (2 << 24);
14430 else
14431 result |= (4 << 24);
14432 break;
14433 }
14434 }
14435 }
14436 if ((*irel) < irelend
14437 && ((*irel) + 1) < irelend
14438 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14439 /* There are relocations pointing to the same address, we have to
14440 check all of them. */
14441 (*irel)++;
14442 else
14443 {
14444 if (irel_save)
14445 *irel = irel_save;
14446 return result;
14447 }
14448 }
14449 return result;
14450}
14451
1c8f6a4d
KLC
14452/* Replace with ex9 instruction. */
14453
14454static bfd_boolean
14455nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14456 nds32_elf_blank_t **relax_blank_list,
14457 struct elf_nds32_irel_entry *pre_irel_ptr,
14458 struct elf_nds32_irel_entry **irel_list)
14459{
14460 if (insn16 != 0)
14461 {
14462 /* Implement the ex9 relaxation. */
14463 bfd_putb16 (insn16, contents + pre_off);
14464 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14465 pre_off + 2, 2))
14466 return FALSE;
14467 if (pre_irel_ptr != NULL)
14468 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14469 }
14470 return TRUE;
14471}
14472
35c08157
KLC
14473/* Replace input file instruction which is in ex9 itable. */
14474
14475static bfd_boolean
14476nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14477{
14478 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14479 bfd_byte *contents = NULL;
1c8f6a4d
KLC
14480 bfd_vma off;
14481 uint16_t insn16, insn_ex9;
35c08157 14482 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC
14483 bfd_vma pre_off = -1;
14484 uint16_t pre_insn16 = 0;
35c08157
KLC
14485 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14486 Elf_Internal_Rela *internal_relocs;
14487 Elf_Internal_Rela *irel;
14488 Elf_Internal_Rela *irelend;
14489 Elf_Internal_Shdr *symtab_hdr;
14490 Elf_Internal_Sym *isym = NULL;
14491 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC
14492 uint32_t insn = 0;
14493 uint32_t insn_with_reg = 0;
14494 uint32_t it_insn;
14495 uint32_t it_insn_with_reg;
35c08157
KLC
14496 unsigned long r_symndx;
14497 asection *isec;
14498 struct elf_nds32_irel_entry *irel_list = NULL;
14499 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14500 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC
14501 struct elf_link_hash_entry_list *h_list;
14502
35c08157
KLC
14503
14504 /* Load section instructions, relocations, and symbol table. */
14505 if (!nds32_get_section_contents (abfd, sec, &contents)
14506 || !nds32_get_local_syms (abfd, sec, &isym))
14507 return FALSE;
1c8f6a4d
KLC
14508 internal_relocs =
14509 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC
14510 irelend = internal_relocs + sec->reloc_count;
14511 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14512
14513 off = 0;
14514
14515 /* Check if the object enable ex9. */
1c8f6a4d
KLC
14516 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14517 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
14518
14519 /* Check this section trigger ex9 relaxation. */
14520 if (irel == NULL
14521 || irel >= irelend
14522 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14523 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14524 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14525 return TRUE;
14526
14527 irel = internal_relocs;
14528
14529 /* Check alignment and fetch proper relocation. */
14530 while (off < sec->size)
14531 {
14532 struct elf_link_hash_entry *h = NULL;
14533 struct elf_nds32_irel_entry *irel_ptr = NULL;
14534
14535 /* Syn the instruction and the relocation. */
14536 while (irel != NULL && irel < irelend && irel->r_offset < off)
14537 irel++;
14538
14539 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14540 relax_blank_list, sec,
14541 &off, contents);
14542 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC
14543 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14544 &relax_blank_list, pre_irel_ptr,
14545 &irel_list))
14546 return FALSE;
35c08157
KLC
14547
14548 if (data_flag & CLEAN_PRE)
14549 {
14550 pre_off = 0;
14551 pre_insn16 = 0;
14552 pre_irel_ptr = NULL;
14553 }
14554 if (data_flag & DATA_EXIST)
14555 {
14556 /* We save the move offset in the highest byte. */
14557 off += (data_flag >> 24);
14558 continue;
14559 }
14560
14561 if (*(contents + off) & 0x80)
14562 {
14563 /* 2-byte instruction. */
14564 off += 2;
14565 continue;
14566 }
14567
14568 /* Load the instruction and its opcode with register for comparing. */
14569 ex9_insn = ex9_insn_head;
14570 insn = bfd_getb32 (contents + off);
14571 insn_with_reg = 0;
14572 while (ex9_insn)
14573 {
14574 it_insn = strtol (ex9_insn->string, NULL, 16);
14575 it_insn_with_reg = 0;
14576 do_replace = 0;
14577 save_irel = 0;
14578
14579 if (irel != NULL && irel < irelend && irel->r_offset == off)
14580 {
14581 /* Insn with relocation. */
14582 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14583
14584 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC
14585 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14586 &it_insn_with_reg);
35c08157
KLC
14587
14588 if (ex9_insn->irel != NULL
1c8f6a4d
KLC
14589 && (ELF32_R_TYPE (irel->r_info) ==
14590 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC
14591 && (insn_with_reg == it_insn_with_reg))
14592 {
14593 /* Insn relocation and format is the same as table entry. */
14594
14595 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14596 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14597 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14598 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14599 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14600 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14601 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14602 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14603 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14604 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14605 && ELF32_R_TYPE (irel->r_info) <=
14606 R_NDS32_SDA12S2_SP_RELA)
14607 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14608 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14609 {
14610 r_symndx = ELF32_R_SYM (irel->r_info);
14611 if (r_symndx < symtab_hdr->sh_info)
14612 {
14613 /* Local symbol. */
14614 int shndx = isym[r_symndx].st_shndx;
14615
14616 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14617 if (ex9_insn->sec == isec
14618 && ex9_insn->irel->r_addend == irel->r_addend
14619 && ex9_insn->irel->r_info == irel->r_info)
14620 {
14621 do_replace = 1;
14622 save_irel = 1;
14623 }
14624 }
14625 else
14626 {
14627 /* External symbol. */
14628 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14629 if (ex9_insn->m_list)
14630 {
35c08157
KLC
14631 h_list = ex9_insn->m_list->h_list;
14632 while (h_list)
14633 {
14634 if (h == h_list->h
1c8f6a4d
KLC
14635 && (ex9_insn->m_list->irel->r_addend ==
14636 irel->r_addend))
35c08157
KLC
14637 {
14638 do_replace = 1;
14639 save_irel = 1;
14640 break;
14641 }
14642 h_list = h_list->next;
14643 }
14644 }
14645 }
14646 }
14647 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14648 {
14649 r_symndx = ELF32_R_SYM (irel->r_info);
14650 if (r_symndx < symtab_hdr->sh_info)
14651 {
14652 /* Local symbols. Compare its base symbol and offset. */
14653 int shndx = isym[r_symndx].st_shndx;
14654
14655 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14656 if (ex9_insn->sec == isec
14657 && ex9_insn->irel->r_addend == irel->r_addend
14658 && ex9_insn->irel->r_info == irel->r_info)
14659 {
14660 do_replace = 1;
14661 save_irel = 1;
14662 }
14663 }
14664 else
14665 {
14666 /* External symbol. */
14667 struct elf_link_hash_entry_mul_list *m_list;
14668
14669 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14670 m_list = ex9_insn->m_list;
14671
14672 while (m_list)
14673 {
1c8f6a4d 14674 h_list = m_list->h_list;
35c08157
KLC
14675
14676 while (h_list)
14677 {
14678 if (h == h_list->h
1c8f6a4d
KLC
14679 && (m_list->irel->r_addend
14680 == irel->r_addend))
35c08157
KLC
14681 {
14682 do_replace = 1;
14683 save_irel = 1;
14684 if (ex9_insn->next
14685 && ex9_insn->m_list
14686 && ex9_insn->m_list == ex9_insn->next->m_list)
14687 {
14688 /* sethi multiple entry must be fixed */
14689 nds32_elf_ex9_insert_fix (sec, irel,
14690 h, ex9_insn->order);
14691 }
14692 break;
14693 }
14694 h_list = h_list->next;
14695 }
14696 m_list = m_list->next;
14697 }
14698 }
14699 }
14700 }
14701
14702 /* Import table: Check the symbol hash table and the
14703 jump target. Only R_NDS32_25_PCREL_RELA now. */
14704 else if (ex9_insn->times == -1
14705 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14706 {
14707 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14708 if (insn_with_reg == it_insn_with_reg)
14709 {
14710 char code[10];
14711 bfd_vma relocation;
14712
14713 r_symndx = ELF32_R_SYM (irel->r_info);
14714 if (r_symndx >= symtab_hdr->sh_info)
14715 {
14716 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14717 if ((h->root.type == bfd_link_hash_defined
14718 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC
14719 && h->root.u.def.section != NULL
14720 && h->root.u.def.section->output_section != NULL
35c08157 14721 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14722 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC
14723 && h->root.u.def.value > sec->size)
14724 {
1c8f6a4d
KLC
14725 relocation = h->root.u.def.value +
14726 h->root.u.def.section->output_section->vma +
14727 h->root.u.def.section->output_offset;
35c08157 14728 relocation += irel->r_addend;
1c8f6a4d
KLC
14729 insn = insn_with_reg
14730 | ((relocation >> 1) & 0xffffff);
14731 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
14732 if (strcmp (code, ex9_insn->string) == 0)
14733 {
14734 do_replace = 1;
14735 save_irel = 1;
14736 }
14737 }
14738 }
14739 }
14740 }
14741 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
14742 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14743 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
14744 {
14745 /* These relocations do not have to relocate contens, so it can
14746 be regard as instruction without relocation. */
14747 if (insn == it_insn && ex9_insn->irel == NULL)
14748 do_replace = 1;
14749 }
14750 }
14751 else
14752 {
14753 /* Instruction without relocation, we only
14754 have to compare their byte code. */
14755 if (insn == it_insn && ex9_insn->irel == NULL)
14756 do_replace = 1;
14757 }
14758
14759 /* Insntruction match so replacing the code here. */
14760 if (do_replace == 1)
14761 {
14762 /* There are two formats of ex9 instruction. */
14763 if (ex9_insn->order < 32)
14764 insn_ex9 = INSN_EX9_IT_2;
14765 else
14766 insn_ex9 = INSN_EX9_IT_1;
14767 insn16 = insn_ex9 | ex9_insn->order;
14768
1c8f6a4d
KLC
14769 /* Insert ex9 instruction. */
14770 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14771 &relax_blank_list, pre_irel_ptr,
14772 &irel_list);
35c08157
KLC
14773 pre_off = off;
14774 pre_insn16 = insn16;
14775
14776 if (save_irel)
14777 {
14778 /* For instuction with relocation do relax. */
14779 irel_ptr = (struct elf_nds32_irel_entry *)
14780 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14781 irel_ptr->irel = irel;
14782 irel_ptr->next = NULL;
14783 pre_irel_ptr = irel_ptr;
14784 }
14785 else
14786 pre_irel_ptr = NULL;
14787 break;
14788 }
14789 ex9_insn = ex9_insn->next;
14790 }
14791 off += 4;
14792 }
14793
1c8f6a4d
KLC
14794 /* Insert ex9 instruction. */
14795 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14796 &relax_blank_list, pre_irel_ptr,
14797 &irel_list);
35c08157
KLC
14798
14799 /* Delete the redundant code. */
14800 if (relax_blank_list)
14801 {
14802 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14803 relax_blank_list = NULL;
14804 }
14805
14806 /* Clear the relocation that is replaced by ex9. */
14807 while (irel_list)
14808 {
14809 struct elf_nds32_irel_entry *irel_ptr;
14810
14811 irel_ptr = irel_list;
14812 irel_list = irel_ptr->next;
14813 irel_ptr->irel->r_info =
14814 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14815 free (irel_ptr);
14816 }
14817 return TRUE;
14818}
14819
14820/* Initialize ex9 hash table. */
14821
14822int
14823nds32_elf_ex9_init (void)
14824{
14825 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14826 sizeof (struct elf_nds32_code_hash_entry),
14827 1023))
14828 {
14829 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14830 return FALSE;
14831 }
14832 return TRUE;
14833}
14834
14835/* Predict how many bytes will be relaxed with ex9 and ifc. */
14836
14837static void
14838nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14839{
14840 struct elf_nds32_insn_times_entry *ex9_insn;
14841 struct elf_nds32_insn_times_entry *temp;
14842 int target_optimize;
14843 struct elf_nds32_link_hash_table *table;
14844
14845 if (ex9_insn_head == NULL)
14846 return;
14847
14848 table = nds32_elf_hash_table (info);
14849 target_optimize = table->target_optimize;
14850 ex9_insn = ex9_insn_head;
14851 while (ex9_insn)
14852 {
14853 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14854 temp = ex9_insn;
14855 ex9_insn = ex9_insn->next;
14856 free (temp);
14857 }
14858 ex9_insn_head = NULL;
14859
14860 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14861 {
14862 /* Examine ifc reduce size. */
14863 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14864 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14865 int size = 0;
14866
14867 while (ifc_ent)
14868 {
14869 if (ifc_ent->enable == 0)
14870 {
14871 /* Not ifc yet. */
14872 irel_ptr = ifc_ent->irel_head;
14873 while (irel_ptr)
14874 {
14875 size += 2;
14876 irel_ptr = irel_ptr->next;
14877 }
14878 }
14879 size -= 2;
14880 ifc_ent = ifc_ent->next;
14881 }
14882 ex9_relax_size += size;
14883 }
14884}
14885
14886/* Finish ex9 table. */
14887
14888void
14889nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14890{
35c08157
KLC
14891 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14892 nds32_elf_order_insn_times (link_info);
14893 nds32_elf_ex9_total_relax (link_info);
14894 /* Traverse the hash table and count its times. */
14895 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14896 nds32_elf_order_insn_times (link_info);
14897 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC
14898}
14899
14900/* Relocate the entries in ex9 table. */
14901
14902static bfd_vma
14903nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14904 struct bfd_link_info *link_info)
14905{
14906 Elf_Internal_Sym *isym = NULL;
14907 bfd_vma relocation = -1;
1c8f6a4d 14908 struct elf_link_hash_entry *h;
35c08157
KLC
14909
14910 if (ptr->m_list != NULL)
14911 {
14912 /* Global symbol. */
1c8f6a4d
KLC
14913 h = ptr->m_list->h_list->h;
14914 if ((h->root.type == bfd_link_hash_defined
14915 || h->root.type == bfd_link_hash_defweak)
14916 && h->root.u.def.section != NULL
14917 && h->root.u.def.section->output_section != NULL)
35c08157
KLC
14918 {
14919
1c8f6a4d
KLC
14920 relocation = h->root.u.def.value +
14921 h->root.u.def.section->output_section->vma +
14922 h->root.u.def.section->output_offset;
35c08157
KLC
14923 relocation += ptr->m_list->irel->r_addend;
14924 }
14925 else
14926 relocation = 0;
14927 }
14928 else if (ptr->sec !=NULL)
14929 {
14930 /* Local symbol. */
14931 Elf_Internal_Sym sym;
14932 asection *sec = NULL;
14933 asection isec;
14934 asection *isec_ptr = &isec;
14935 Elf_Internal_Rela irel_backup = *(ptr->irel);
14936 asection *sec_backup = ptr->sec;
14937 bfd *abfd = ptr->sec->owner;
14938
14939 if (!nds32_get_local_syms (abfd, sec, &isym))
14940 return FALSE;
14941 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14942
14943 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14944 if (sec != NULL)
14945 *isec_ptr = *sec;
14946 sym = *isym;
14947
14948 /* The purpose is same as elf_link_input_bfd. */
14949 if (isec_ptr != NULL
14950 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14951 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14952 {
14953 sym.st_value =
14954 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14955 elf_section_data (isec_ptr)->sec_info,
14956 isym->st_value);
14957 }
14958 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14959 &ptr->sec, ptr->irel);
14960 if (ptr->irel != NULL)
14961 relocation += ptr->irel->r_addend;
14962
14963 /* Restore origin value since there may be some insntructions that
14964 could not be replaced with ex9.it. */
14965 *(ptr->irel) = irel_backup;
14966 ptr->sec = sec_backup;
14967 }
14968
14969 return relocation;
14970}
14971
14972/* Import ex9 table and build list. */
14973
14974void
14975nds32_elf_ex9_import_table (struct bfd_link_info *info)
14976{
1c8f6a4d 14977 int num = 0;
35c08157
KLC
14978 bfd_byte *contents;
14979 unsigned long insn;
14980 FILE *ex9_import_file;
14981 int update_ex9_table;
14982 struct elf_nds32_link_hash_table *table;
14983
14984 table = nds32_elf_hash_table (info);
14985 ex9_import_file = table->ex9_import_file;
1c8f6a4d 14986 rewind (table->ex9_import_file);
35c08157
KLC
14987
14988 contents = bfd_malloc (sizeof (bfd_byte) * 4);
14989
35c08157 14990 /* Read instructions from the input file and build the list. */
1c8f6a4d 14991 while (!feof (ex9_import_file))
35c08157
KLC
14992 {
14993 char *code;
14994 struct elf_nds32_insn_times_entry *ptr;
14995 size_t nread;
14996
14997 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC
14998 /* Ignore the final byte 0x0a. */
14999 if (nread < 1)
15000 break;
35c08157
KLC
15001 insn = bfd_getb32 (contents);
15002 code = bfd_malloc (sizeof (char) * 9);
15003 snprintf (code, 9, "%08lx", insn);
15004 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15005 ptr->string = code;
15006 ptr->order = num;
15007 ptr->times = -1;
15008 ptr->sec = NULL;
15009 ptr->m_list = NULL;
15010 ptr->rel_backup.r_offset = 0;
15011 ptr->rel_backup.r_info = 0;
15012 ptr->rel_backup.r_addend = 0;
15013 ptr->irel = NULL;
15014 ptr->next = NULL;
15015 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC
15016 num++;
15017 }
15018
15019 update_ex9_table = table->update_ex9_table;
15020 if (update_ex9_table == 1)
15021 {
15022 /* It has to consider of sethi need to use multiple page
15023 but it not be done yet. */
15024 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15025 nds32_elf_order_insn_times (info);
15026 }
15027}
15028
15029/* Export ex9 table. */
15030
15031static void
15032nds32_elf_ex9_export (struct bfd_link_info *info,
15033 bfd_byte *contents, int size)
15034{
15035 FILE *ex9_export_file;
15036 struct elf_nds32_link_hash_table *table;
15037
15038 table = nds32_elf_hash_table (info);
15039 ex9_export_file = table->ex9_export_file;
15040 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15041 fclose (ex9_export_file);
15042}
15043
15044/* Adjust relocations of J and JAL in ex9.itable.
15045 Export ex9 table. */
15046
1c8f6a4d 15047static void
35c08157
KLC
15048nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15049{
15050 asection *table_sec = NULL;
15051 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15052 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15053 bfd *it_abfd;
1c8f6a4d 15054 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC
15055 bfd_byte *contents = NULL, *source_contents = NULL;
15056 int size = 0;
15057 bfd_vma gp;
15058 int shift, update_ex9_table, offset = 0;
15059 reloc_howto_type *howto = NULL;
15060 Elf_Internal_Rela rel_backup;
15061 unsigned short insn_ex9;
15062 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC
15063 FILE *ex9_export_file;
15064 static bfd_boolean done = FALSE;
15065
15066 if (done)
15067 return;
15068
15069 done = TRUE;
35c08157
KLC
15070
15071 table = nds32_elf_hash_table (link_info);
15072 if (table)
15073 table->relax_status |= NDS32_RELAX_EX9_DONE;
15074
15075
15076 update_ex9_table = table->update_ex9_table;
15077 /* Generated ex9.itable exactly. */
15078 if (update_ex9_table == 0)
15079 {
15080 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 15081 it_abfd = it_abfd->link.next)
35c08157
KLC
15082 {
15083 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15084 if (table_sec != NULL)
15085 break;
15086 }
15087
15088 if (table_sec != NULL)
15089 {
15090 bfd *output_bfd;
35c08157
KLC
15091
15092 output_bfd = table_sec->output_section->owner;
15093 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15094 if (table_sec->size == 0)
15095 return;
15096
15097 if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
15098 return;
35c08157
KLC
15099 }
15100 }
15101 else
15102 {
15103 /* Set gp. */
15104 bfd *output_bfd;
15105
15106 output_bfd = link_info->input_bfds->sections->output_section->owner;
15107 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15108 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15109 }
15110
15111 /* Relocate instruction. */
15112 while (ex9_insn)
15113 {
15114 bfd_vma relocation, min_relocation = 0xffffffff;
15115
15116 insn = strtol (ex9_insn->string, NULL, 16);
15117 insn_with_reg = 0;
15118 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15119 {
15120 if (ex9_insn->m_list)
15121 rel_backup = ex9_insn->m_list->rel_backup;
15122 else
15123 rel_backup = ex9_insn->rel_backup;
15124
15125 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15126 howto =
15127 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15128 (rel_backup.r_info));
15129 shift = howto->rightshift;
15130 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15131 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15132 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15133 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15134 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15135 {
15136 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15137 insn =
15138 insn_with_reg | ((relocation >> shift) &
15139 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15140 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15141 }
15142 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15143 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15144 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15145 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15146 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15147 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15148 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15149 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15150 {
15151 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15152 insn =
15153 insn_with_reg | (((relocation - gp) >> shift) &
15154 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15155 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15156 }
15157 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15158 {
15159 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC
15160 if (ex9_insn->next && ex9_insn->m_list
15161 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15162 {
15163 struct elf_link_hash_entry_mul_list *m_list;
15164 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15165 struct elf_link_hash_entry *h;
35c08157
KLC
15166
15167 temp_ptr = ex9_insn;
15168 temp_ptr2 = ex9_insn;
15169 m_list = ex9_insn->m_list;
15170 while (m_list)
15171 {
1c8f6a4d
KLC
15172 h = m_list->h_list->h;
15173 relocation = h->root.u.def.value +
15174 h->root.u.def.section->output_section->vma +
15175 h->root.u.def.section->output_offset;
35c08157
KLC
15176 relocation += m_list->irel->r_addend;
15177
15178 if (relocation < min_relocation)
15179 min_relocation = relocation;
15180 m_list = m_list->next;
15181 }
15182 relocation = min_relocation;
15183
15184 /* Put insntruction into ex9 table. */
15185 insn = insn_with_reg
15186 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15187 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15188 relocation = relocation + 0x1000; /* hi20 */
15189
1c8f6a4d
KLC
15190 while (ex9_insn->next && ex9_insn->m_list
15191 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15192 {
15193 /* Multiple sethi. */
15194 ex9_insn = ex9_insn->next;
15195 size += 4;
35c08157
KLC
15196 insn =
15197 insn_with_reg | ((relocation >> shift) &
15198 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15199 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15200 relocation = relocation + 0x1000; /* hi20 */
15201 }
15202
15203 fix_ptr = ex9_refix_head;
15204 while (fix_ptr)
15205 {
15206 /* Fix ex9 insn. */
15207 /* temp_ptr2 points to the head of multiple sethi. */
15208 temp_ptr = temp_ptr2;
15209 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15210 {
15211 fix_ptr = fix_ptr->next;
15212 }
15213 if (fix_ptr->order != temp_ptr->order)
15214 break;
15215
15216 /* Set source insn. */
1c8f6a4d
KLC
15217 relocation =
15218 fix_ptr->h->root.u.def.value +
15219 fix_ptr->h->root.u.def.section->output_section->vma +
15220 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC
15221 relocation += fix_ptr->irel->r_addend;
15222 /* sethi imm is imm20s. */
15223 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15224
15225 while (temp_ptr)
15226 {
35c08157
KLC
15227 /* Match entry and source code. */
15228 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15229 if (insn == source_insn)
15230 {
15231 /* Fix the ex9 insn. */
15232 if (temp_ptr->order != fix_ptr->order)
15233 {
15234 if (!nds32_get_section_contents
15235 (fix_ptr->sec->owner, fix_ptr->sec,
15236 &source_contents))
15237 (*_bfd_error_handler)
15238 (_("Linker: error cannot fixed ex9 relocation \n"));
15239 if (temp_ptr->order < 32)
15240 insn_ex9 = INSN_EX9_IT_2;
15241 else
15242 insn_ex9 = INSN_EX9_IT_1;
15243 insn_ex9 = insn_ex9 | temp_ptr->order;
15244 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15245 }
15246 break;
15247 }
15248 else
15249 {
15250 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15251 (*_bfd_error_handler)
15252 (_("Linker: error cannot fixed ex9 relocation \n"));
15253 else
15254 temp_ptr = temp_ptr->next;
15255 }
15256 }
15257 fix_ptr = fix_ptr->next;
15258 }
15259 }
15260 else
15261 {
15262 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15263 insn = insn_with_reg
15264 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15265 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15266 }
15267 }
15268 }
15269 else
15270 {
15271 /* Insn without relocation does not have to be fixed
15272 if need to update export table. */
15273 if (update_ex9_table == 1)
15274 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15275 }
15276 ex9_insn = ex9_insn->next;
15277 size += 4;
15278 }
15279
15280 ex9_export_file = table->ex9_export_file;
15281 if (ex9_export_file != NULL)
1c8f6a4d 15282 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC
15283 else if (update_ex9_table == 1)
15284 {
1c8f6a4d
KLC
15285 table->ex9_export_file = table->ex9_import_file;
15286 rewind (table->ex9_export_file);
15287 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC
15288 }
15289}
15290
15291/* Generate ex9 hash table. */
15292
15293static bfd_boolean
f4cb41f4 15294nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC
15295 struct bfd_link_info *link_info)
15296{
15297 Elf_Internal_Rela *internal_relocs;
15298 Elf_Internal_Rela *irelend;
15299 Elf_Internal_Rela *irel;
15300 Elf_Internal_Rela *jrel;
15301 Elf_Internal_Rela rel_backup;
15302 Elf_Internal_Shdr *symtab_hdr;
15303 Elf_Internal_Sym *isym = NULL;
15304 asection *isec;
15305 struct elf_link_hash_entry **sym_hashes;
15306 bfd_byte *contents = NULL;
f4cb41f4 15307 bfd_vma off = 0;
35c08157 15308 unsigned long r_symndx;
1c8f6a4d 15309 uint32_t insn, insn_with_reg;
35c08157
KLC
15310 struct elf_link_hash_entry *h;
15311 int data_flag, shift, align;
15312 bfd_vma relocation;
15313 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15314 reloc_howto_type *howto = NULL;
15315
15316 sym_hashes = elf_sym_hashes (abfd);
15317 /* Load section instructions, relocations, and symbol table. */
15318 if (!nds32_get_section_contents (abfd, sec, &contents))
15319 return FALSE;
15320
15321 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15322 TRUE /* keep_memory */);
15323 irelend = internal_relocs + sec->reloc_count;
15324 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15325 if (!nds32_get_local_syms (abfd, sec, &isym))
15326 return FALSE;
15327
15328 /* Check the object if enable ex9. */
15329 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15330 R_NDS32_RELAX_ENTRY);
15331
15332 /* Check this section trigger ex9 relaxation. */
15333 if (irel == NULL
15334 || irel >= irelend
15335 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15336 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15337 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15338 return TRUE;
15339
15340 irel = internal_relocs;
15341
15342 /* Push each insn into hash table. */
15343 while (off < sec->size)
15344 {
15345 char code[10];
15346 struct elf_nds32_code_hash_entry *entry;
15347
15348 while (irel != NULL && irel < irelend && irel->r_offset < off)
15349 irel++;
15350
1c8f6a4d
KLC
15351 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15352 NULL, sec, &off, contents);
35c08157
KLC
15353 if (data_flag & DATA_EXIST)
15354 {
15355 /* We save the move offset in the highest byte. */
15356 off += (data_flag >> 24);
15357 continue;
15358 }
15359
15360 if (*(contents + off) & 0x80)
15361 {
15362 off += 2;
15363 }
15364 else
15365 {
15366 h = NULL;
15367 isec = NULL;
15368 jrel = NULL;
15369 rel_backup.r_info = 0;
15370 rel_backup.r_offset = 0;
15371 rel_backup.r_addend = 0;
15372 /* Load the instruction and its opcode with register for comparing. */
15373 insn = bfd_getb32 (contents + off);
15374 insn_with_reg = 0;
15375 if (irel != NULL && irel < irelend && irel->r_offset == off)
15376 {
15377 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15378 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15379 shift = howto->rightshift;
15380 align = (1 << shift) - 1;
15381 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15382 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15383 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15384 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15385 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15386 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15387 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15388 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15389 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15390 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15391 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15392 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15393 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15394 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15395 {
15396 r_symndx = ELF32_R_SYM (irel->r_info);
15397 jrel = irel;
15398 rel_backup = *irel;
15399 if (r_symndx < symtab_hdr->sh_info)
15400 {
15401 /* Local symbol. */
15402 int shndx = isym[r_symndx].st_shndx;
15403
15404 bfd_vma st_value = (isym + r_symndx)->st_value;
15405 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15406 relocation = (isec->output_section->vma + isec->output_offset
15407 + st_value + irel->r_addend);
15408 }
15409 else
15410 {
15411 /* External symbol. */
15412 bfd_boolean warned ATTRIBUTE_UNUSED;
15413 bfd_boolean ignored ATTRIBUTE_UNUSED;
15414 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15415 asection *sym_sec;
15416
15417 /* Maybe there is a better way to get h and relocation */
15418 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15419 r_symndx, symtab_hdr, sym_hashes,
15420 h, sym_sec, relocation,
15421 unresolved_reloc, warned, ignored);
15422 relocation += irel->r_addend;
1c8f6a4d
KLC
15423 if ((h->root.type != bfd_link_hash_defined
15424 && h->root.type != bfd_link_hash_defweak)
15425 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC
15426 {
15427 off += 4;
15428 continue;
15429 }
15430 }
15431
15432 /* Check for gp relative instruction alignment. */
15433 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15434 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15435 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15436 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15437 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15438 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15439 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15440 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15441 {
15442 bfd_vma gp;
15443 bfd *output_bfd = sec->output_section->owner;
15444 bfd_reloc_status_type r;
15445
15446 /* If the symbol is in the abs section, the out_bfd will be null.
15447 This happens when the relocation has a symbol@GOTOFF. */
15448 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15449 if (r != bfd_reloc_ok)
15450 {
15451 off += 4;
15452 continue;
15453 }
15454
15455 relocation -= gp;
15456
15457 /* Make sure alignment is correct. */
15458 if (relocation & align)
15459 {
15460 /* Incorrect alignment. */
15461 (*_bfd_error_handler)
15462 (_("%s: warning: unaligned small data access. "
15463 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15464 bfd_get_filename (abfd), irel->r_offset,
15465 irel->r_info, irel->r_addend, relocation, align);
15466 off += 4;
15467 continue;
15468 }
15469 }
15470
15471 insn = insn_with_reg
15472 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15473 }
15474 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
15475 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15476 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
15477 {
15478 /* These relocations do not have to relocate contens, so it can
15479 be regard as instruction without relocation. */
15480 }
15481 else
15482 {
15483 off += 4;
15484 continue;
15485 }
15486 }
15487
1c8f6a4d 15488 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
15489 /* Copy "code". */
15490 entry = (struct elf_nds32_code_hash_entry*)
15491 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15492 if (entry == NULL)
15493 {
15494 (*_bfd_error_handler)
15495 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15496 return FALSE;
15497 }
15498 if (h)
15499 {
15500 if (h->root.type == bfd_link_hash_undefined)
15501 return TRUE;
15502 /* Global symbol. */
15503 /* In order to do sethi with different symbol but same value. */
15504 if (entry->m_list == NULL)
15505 {
15506 struct elf_link_hash_entry_mul_list *m_list_new;
15507 struct elf_link_hash_entry_list *h_list_new;
15508
15509 m_list_new = (struct elf_link_hash_entry_mul_list *)
15510 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15511 h_list_new = (struct elf_link_hash_entry_list *)
15512 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15513 entry->m_list = m_list_new;
15514 m_list_new->h_list = h_list_new;
15515 m_list_new->rel_backup = rel_backup;
15516 m_list_new->times = 1;
15517 m_list_new->irel = jrel;
15518 m_list_new->next = NULL;
15519 h_list_new->h = h;
15520 h_list_new->next = NULL;
15521 }
15522 else
15523 {
15524 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15525 struct elf_link_hash_entry_list *h_list;
15526
15527 while (m_list)
15528 {
15529 /* Build the different symbols that point to the same address. */
15530 h_list = m_list->h_list;
15531 if (h_list->h->root.u.def.value == h->root.u.def.value
15532 && h_list->h->root.u.def.section->output_section->vma
15533 == h->root.u.def.section->output_section->vma
15534 && h_list->h->root.u.def.section->output_offset
15535 == h->root.u.def.section->output_offset
15536 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15537 {
15538 m_list->times++;
15539 m_list->irel = jrel;
15540 while (h_list->h != h && h_list->next)
15541 h_list = h_list->next;
15542 if (h_list->h != h)
15543 {
15544 struct elf_link_hash_entry_list *h_list_new;
15545
15546 h_list_new = (struct elf_link_hash_entry_list *)
15547 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15548 h_list->next = h_list_new;
15549 h_list_new->h = h;
15550 h_list_new->next = NULL;
15551 }
15552 break;
15553 }
15554 /* The sethi case may have different address but the
15555 hi20 is the same. */
15556 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15557 && m_list->next == NULL)
15558 {
15559 struct elf_link_hash_entry_mul_list *m_list_new;
15560 struct elf_link_hash_entry_list *h_list_new;
15561
15562 m_list_new = (struct elf_link_hash_entry_mul_list *)
15563 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15564 h_list_new = (struct elf_link_hash_entry_list *)
15565 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15566 m_list->next = m_list_new;
15567 m_list_new->h_list = h_list_new;
15568 m_list_new->rel_backup = rel_backup;
15569 m_list_new->times = 1;
15570 m_list_new->irel = jrel;
15571 m_list_new->next = NULL;
15572 h_list_new->h = h;
15573 h_list_new->next = NULL;
15574 break;
15575 }
15576 m_list = m_list->next;
15577 }
15578 if (!m_list)
15579 {
15580 off += 4;
15581 continue;
15582 }
15583 }
15584 }
15585 else
15586 {
15587 /* Local symbol and insn without relocation*/
15588 entry->times++;
15589 entry->rel_backup = rel_backup;
15590 }
15591
15592 /* Use in sethi insn with constant and global symbol in same format. */
15593 if (!jrel)
15594 entry->const_insn = 1;
15595 else
15596 entry->irel = jrel;
15597 entry->sec = isec;
15598 off += 4;
15599 }
15600 }
15601 return TRUE;
15602}
15603
15604/* Set the _ITB_BASE, and point it to ex9 table. */
15605
15606bfd_boolean
15607nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15608{
15609 bfd *abfd;
15610 asection *sec;
15611 bfd *output_bfd = NULL;
15612 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC
15613
15614 if (is_ITB_BASE_set == 1)
15615 return TRUE;
15616
15617 is_ITB_BASE_set = 1;
15618
1c8f6a4d
KLC
15619 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15620
15621 if (bh && (bh->type == bfd_link_hash_defined
15622 || bh->type == bfd_link_hash_defweak))
15623 return TRUE;
35c08157
KLC
15624
15625 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15626 abfd = abfd->link.next)
35c08157
KLC
15627 {
15628 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15629 if (sec != NULL)
15630 {
15631 output_bfd = sec->output_section->owner;
15632 break;
15633 }
15634 }
15635 if (output_bfd == NULL)
15636 {
15637 output_bfd = link_info->output_bfd;
15638 if (output_bfd->sections == NULL)
15639 return TRUE;
15640 else
15641 sec = bfd_abs_section_ptr;
15642 }
15643 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15644 FALSE, FALSE, TRUE);
15645 return (_bfd_generic_link_add_one_symbol
15646 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15647 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC
15648 (const char *) NULL, FALSE, get_elf_backend_data
15649 (output_bfd)->collect, &bh));
15650} /* End EX9.IT */
15651\f
15652
15653#define ELF_ARCH bfd_arch_nds32
15654#define ELF_MACHINE_CODE EM_NDS32
15655#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15656#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15657
6d00b590 15658#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15659#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15660#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC
15661#define TARGET_LITTLE_NAME "elf32-nds32le"
15662
15663#define elf_info_to_howto nds32_info_to_howto
15664#define elf_info_to_howto_rel nds32_info_to_howto_rel
15665
15666#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15667#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15668#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15669#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15670#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15671
1c8f6a4d 15672#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC
15673#define elf_backend_action_discarded nds32_elf_action_discarded
15674#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15675#define elf_backend_check_relocs nds32_elf_check_relocs
15676#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15677#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15678#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15679#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15680#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15681#define elf_backend_relocate_section nds32_elf_relocate_section
15682#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15683#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15684#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15685#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15686#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15687#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15688#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15689#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15690#define elf_backend_object_p nds32_elf_object_p
15691#define elf_backend_final_write_processing nds32_elf_final_write_processing
15692#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC
15693#define bfd_elf32_bfd_get_relocated_section_contents \
15694 nds32_elf_get_relocated_section_contents
35c08157
KLC
15695
15696#define elf_backend_can_gc_sections 1
15697#define elf_backend_can_refcount 1
15698#define elf_backend_want_got_plt 1
15699#define elf_backend_plt_readonly 1
15700#define elf_backend_want_plt_sym 0
15701#define elf_backend_got_header_size 12
15702#define elf_backend_may_use_rel_p 1
15703#define elf_backend_default_use_rela_p 1
15704#define elf_backend_may_use_rela_p 1
15705
15706#include "elf32-target.h"
15707
15708#undef ELF_MAXPAGESIZE
15709#define ELF_MAXPAGESIZE 0x2000
15710
15711#undef TARGET_BIG_SYM
6d00b590 15712#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC
15713#undef TARGET_BIG_NAME
15714#define TARGET_BIG_NAME "elf32-nds32be-linux"
15715#undef TARGET_LITTLE_SYM
6d00b590 15716#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC
15717#undef TARGET_LITTLE_NAME
15718#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15719#undef elf32_bed
15720#define elf32_bed elf32_nds32_lin_bed
15721
15722#include "elf32-target.h"
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