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Return void from linker callbacks
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
CommitLineData
35c08157 1/* NDS32-specific support for 32-bit ELF.
6f2750fe 2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
1c8f6a4d 100static bfd_boolean nds32_elf_mkobject (bfd *);
35c08157
KLC		 101
102/* Nds32 helper functions. */
103static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110static bfd_vma calculate_memory_address
0c4bd9d9
KLC		 111(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112static int nds32_get_section_contents (bfd *, asection *,
113 bfd_byte **, bfd_boolean);
35c08157 114static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 115(bfd *, asection *, struct bfd_link_info *);
1c8f6a4d
KLC		 116static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
117static void nds32_elf_ex9_import_table (struct bfd_link_info *);
118static void nds32_elf_ex9_finish (struct bfd_link_info *);
119static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 120static void nds32_elf_get_insn_with_reg
1c8f6a4d 121 (Elf_Internal_Rela *, uint32_t, uint32_t *);
35c08157
KLC		 122static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
123 Elf_Internal_Sym **);
124static bfd_boolean nds32_elf_ex9_replace_instruction
125 (struct bfd_link_info *, bfd *, asection *);
126static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
127 asection *);
1c8f6a4d 128static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 129static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 130static bfd_boolean nds32_elf_ifc_reloc (void);
35c08157
KLC		 131static bfd_boolean nds32_relax_fp_as_gp
132 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
133 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
134 Elf_Internal_Sym *isymbuf);
135static bfd_boolean nds32_fag_remove_unused_fpbase
136 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
137 Elf_Internal_Rela *irelend);
1c8f6a4d
KLC		 138static bfd_byte *
139nds32_elf_get_relocated_section_contents (bfd *abfd,
140 struct bfd_link_info *link_info,
141 struct bfd_link_order *link_order,
142 bfd_byte *data,
143 bfd_boolean relocatable,
144 asymbol **symbols);
35c08157
KLC		 145
146enum
147{
148 MACH_V1 = bfd_mach_n1h,
149 MACH_V2 = bfd_mach_n1h_v2,
150 MACH_V3 = bfd_mach_n1h_v3,
151 MACH_V3M = bfd_mach_n1h_v3m
152};
153
154#define MIN(a, b) ((a) > (b) ? (b) : (a))
155#define MAX(a, b) ((a) > (b) ? (a) : (b))
156
157/* The name of the dynamic interpreter. This is put in the .interp
158 section. */
159#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
160
161/* The nop opcode we use. */
162#define NDS32_NOP32 0x40000009
163#define NDS32_NOP16 0x9200
164
165/* The size in bytes of an entry in the procedure linkage table. */
166#define PLT_ENTRY_SIZE 24
167#define PLT_HEADER_SIZE 24
168
169/* The first entry in a procedure linkage table are reserved,
170 and the initial contents are unimportant (we zero them out).
171 Subsequent entries look like this. */
172#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
173#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
174#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
175#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
176#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
177
178/* $ta is change to $r15 (from $r25). */
179#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
181#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
182#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
183#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
184#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
185
186#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
187#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
188#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
189#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
190#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
191
192#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
194#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
195#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
196#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
197#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
198
1c8f6a4d
KLC		 199/* These are macros used to get the relocation accurate value. */
200#define ACCURATE_8BIT_S1 (0x100)
201#define ACCURATE_U9BIT_S1 (0x400)
202#define ACCURATE_12BIT_S1 (0x2000)
203#define ACCURATE_14BIT_S1 (0x4000)
204#define ACCURATE_19BIT (0x40000)
205
206/* These are macros used to get the relocation conservative value. */
207#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
208#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
209#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
210#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
211/* These must be more conservative because the address may be in
212 different segment. */
213#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
214#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
215#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
216#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
217#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
218
35c08157
KLC		 219/* Size of small data/bss sections, used to calculate SDA_BASE. */
220static long got_size = 0;
221static int is_SDA_BASE_set = 0;
222static int is_ITB_BASE_set = 0;
223
35c08157
KLC		 224/* Convert ELF-VER in eflags to string for debugging purpose. */
225static const char *const nds32_elfver_strtab[] =
226{
227 "ELF-1.2",
228 "ELF-1.3",
229 "ELF-1.4",
230};
231
232/* The nds32 linker needs to keep track of the number of relocs that it
233 decides to copy in check_relocs for each symbol. This is so that
234 it can discard PC relative relocs if it doesn't need them when
235 linking with -Bsymbolic. We store the information in a field
236 extending the regular ELF linker hash table. */
237
238/* This structure keeps track of the number of PC relative relocs we
239 have copied for a given symbol. */
240
241struct elf_nds32_pcrel_relocs_copied
242{
243 /* Next section. */
244 struct elf_nds32_pcrel_relocs_copied *next;
245 /* A section in dynobj. */
246 asection *section;
247 /* Number of relocs copied in this section. */
248 bfd_size_type count;
249};
250
251/* The sh linker needs to keep track of the number of relocs that it
252 decides to copy as dynamic relocs in check_relocs for each symbol.
253 This is so that it can later discard them if they are found to be
254 unnecessary. We store the information in a field extending the
255 regular ELF linker hash table. */
256
257struct elf_nds32_dyn_relocs
258{
259 struct elf_nds32_dyn_relocs *next;
260
261 /* The input section of the reloc. */
262 asection *sec;
263
264 /* Total number of relocs copied for the input section. */
265 bfd_size_type count;
266
267 /* Number of pc-relative relocs copied for the input section. */
268 bfd_size_type pc_count;
269};
270
271/* Nds32 ELF linker hash entry. */
272
273struct elf_nds32_link_hash_entry
274{
275 struct elf_link_hash_entry root;
276
277 /* Track dynamic relocs copied for this symbol. */
278 struct elf_nds32_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 279
280 /* For checking relocation type. */
281#define GOT_UNKNOWN 0
282#define GOT_NORMAL 1
283#define GOT_TLS_IE 2
284 unsigned int tls_type;
35c08157
KLC		 285};
286
287/* Get the nds32 ELF linker hash table from a link_info structure. */
288
289#define FP_BASE_NAME "_FP_BASE_"
290static int check_start_export_sym = 0;
291static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
292
1c8f6a4d
KLC		 293/* The offset for executable tls relaxation. */
294#define TP_OFFSET 0x0
295
296struct elf_nds32_obj_tdata
297{
298 struct elf_obj_tdata root;
299
300 /* tls_type for each local got entry. */
301 char *local_got_tls_type;
302};
303
304#define elf_nds32_tdata(bfd) \
305 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
306
307#define elf32_nds32_local_got_tls_type(bfd) \
308 (elf_nds32_tdata (bfd)->local_got_tls_type)
309
310#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
311
312static bfd_boolean
313nds32_elf_mkobject (bfd *abfd)
314{
315 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
316 NDS32_ELF_DATA);
317}
318
35c08157
KLC		 319/* Relocations used for relocation. */
320static reloc_howto_type nds32_elf_howto_table[] =
321{
322 /* This reloc does nothing. */
323 HOWTO (R_NDS32_NONE, /* type */
324 0, /* rightshift */
6346d5ca
AM		 325 3, /* size (0 = byte, 1 = short, 2 = long) */
326 0, /* bitsize */
35c08157
KLC		 327 FALSE, /* pc_relative */
328 0, /* bitpos */
6346d5ca 329 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 330 bfd_elf_generic_reloc, /* special_function */
331 "R_NDS32_NONE", /* name */
332 FALSE, /* partial_inplace */
333 0, /* src_mask */
334 0, /* dst_mask */
335 FALSE), /* pcrel_offset */
336
337 /* A 16 bit absolute relocation. */
338 HOWTO (R_NDS32_16, /* type */
339 0, /* rightshift */
340 1, /* size (0 = byte, 1 = short, 2 = long) */
341 16, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield, /* complain_on_overflow */
345 nds32_elf_generic_reloc, /* special_function */
346 "R_NDS32_16", /* name */
347 FALSE, /* partial_inplace */
348 0xffff, /* src_mask */
349 0xffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 /* A 32 bit absolute relocation. */
353 HOWTO (R_NDS32_32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield, /* complain_on_overflow */
360 nds32_elf_generic_reloc, /* special_function */
361 "R_NDS32_32", /* name */
362 FALSE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
366
367 /* A 20 bit address. */
368 HOWTO (R_NDS32_20, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 20, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_unsigned, /* complain_on_overflow */
375 nds32_elf_generic_reloc, /* special_function */
376 "R_NDS32_20", /* name */
377 FALSE, /* partial_inplace */
378 0xfffff, /* src_mask */
379 0xfffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 /* An PC Relative 9-bit relocation, shifted by 2.
383 This reloc is complicated because relocations are relative to pc & -4.
384 i.e. branches in the right insn slot use the address of the left insn
385 slot for pc. */
386 /* ??? It's not clear whether this should have partial_inplace set or not.
387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
390 HOWTO (R_NDS32_9_PCREL, /* type */
391 1, /* rightshift */
392 1, /* size (0 = byte, 1 = short, 2 = long) */
393 8, /* bitsize */
394 TRUE, /* pc_relative */
395 0, /* bitpos */
396 complain_overflow_signed, /* complain_on_overflow */
397 nds32_elf_9_pcrel_reloc, /* special_function */
398 "R_NDS32_9_PCREL", /* name */
399 FALSE, /* partial_inplace */
400 0xff, /* src_mask */
401 0xff, /* dst_mask */
402 TRUE), /* pcrel_offset */
403
404 /* A relative 15 bit relocation, right shifted by 1. */
405 HOWTO (R_NDS32_15_PCREL, /* type */
406 1, /* rightshift */
407 2, /* size (0 = byte, 1 = short, 2 = long) */
408 14, /* bitsize */
409 TRUE, /* pc_relative */
410 0, /* bitpos */
411 complain_overflow_signed, /* complain_on_overflow */
412 bfd_elf_generic_reloc, /* special_function */
413 "R_NDS32_15_PCREL", /* name */
414 FALSE, /* partial_inplace */
415 0x3fff, /* src_mask */
416 0x3fff, /* dst_mask */
417 TRUE), /* pcrel_offset */
418
419 /* A relative 17 bit relocation, right shifted by 1. */
420 HOWTO (R_NDS32_17_PCREL, /* type */
421 1, /* rightshift */
422 2, /* size (0 = byte, 1 = short, 2 = long) */
423 16, /* bitsize */
424 TRUE, /* pc_relative */
425 0, /* bitpos */
426 complain_overflow_signed, /* complain_on_overflow */
427 bfd_elf_generic_reloc, /* special_function */
428 "R_NDS32_17_PCREL", /* name */
429 FALSE, /* partial_inplace */
430 0xffff, /* src_mask */
431 0xffff, /* dst_mask */
432 TRUE), /* pcrel_offset */
433
434 /* A relative 25 bit relocation, right shifted by 1. */
435 /* ??? It's not clear whether this should have partial_inplace set or not.
436 Branch relaxing in the assembler can store the addend in the insn,
437 and if bfd_install_relocation gets called the addend may get added
438 again. */
439 HOWTO (R_NDS32_25_PCREL, /* type */
440 1, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 24, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_signed, /* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_NDS32_25_PCREL", /* name */
448 FALSE, /* partial_inplace */
449 0xffffff, /* src_mask */
450 0xffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 /* High 20 bits of address when lower 12 is or'd in. */
454 HOWTO (R_NDS32_HI20, /* type */
455 12, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 20, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_dont,/* complain_on_overflow */
461 nds32_elf_hi20_reloc, /* special_function */
462 "R_NDS32_HI20", /* name */
463 FALSE, /* partial_inplace */
464 0x000fffff, /* src_mask */
465 0x000fffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 /* Lower 12 bits of address. */
469 HOWTO (R_NDS32_LO12S3, /* type */
470 3, /* rightshift */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
472 9, /* bitsize */
473 FALSE, /* pc_relative */
474 0, /* bitpos */
475 complain_overflow_dont,/* complain_on_overflow */
476 nds32_elf_lo12_reloc, /* special_function */
477 "R_NDS32_LO12S3", /* name */
478 FALSE, /* partial_inplace */
479 0x000001ff, /* src_mask */
480 0x000001ff, /* dst_mask */
481 FALSE), /* pcrel_offset */
482
483 /* Lower 12 bits of address. */
484 HOWTO (R_NDS32_LO12S2, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 10, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_dont,/* complain_on_overflow */
491 nds32_elf_lo12_reloc, /* special_function */
492 "R_NDS32_LO12S2", /* name */
493 FALSE, /* partial_inplace */
494 0x000003ff, /* src_mask */
495 0x000003ff, /* dst_mask */
496 FALSE), /* pcrel_offset */
497
498 /* Lower 12 bits of address. */
499 HOWTO (R_NDS32_LO12S1, /* type */
500 1, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 11, /* bitsize */
503 FALSE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_dont,/* complain_on_overflow */
506 nds32_elf_lo12_reloc, /* special_function */
507 "R_NDS32_LO12S1", /* name */
508 FALSE, /* partial_inplace */
509 0x000007ff, /* src_mask */
510 0x000007ff, /* dst_mask */
511 FALSE), /* pcrel_offset */
512
513 /* Lower 12 bits of address. */
514 HOWTO (R_NDS32_LO12S0, /* type */
515 0, /* rightshift */
516 2, /* size (0 = byte, 1 = short, 2 = long) */
517 12, /* bitsize */
518 FALSE, /* pc_relative */
519 0, /* bitpos */
520 complain_overflow_dont,/* complain_on_overflow */
521 nds32_elf_lo12_reloc, /* special_function */
522 "R_NDS32_LO12S0", /* name */
523 FALSE, /* partial_inplace */
524 0x00000fff, /* src_mask */
525 0x00000fff, /* dst_mask */
526 FALSE), /* pcrel_offset */
527
528 /* Small data area 15 bits offset. */
529 HOWTO (R_NDS32_SDA15S3, /* type */
530 3, /* rightshift */
531 2, /* size (0 = byte, 1 = short, 2 = long) */
532 15, /* bitsize */
533 FALSE, /* pc_relative */
534 0, /* bitpos */
535 complain_overflow_signed, /* complain_on_overflow */
536 nds32_elf_sda15_reloc, /* special_function */
537 "R_NDS32_SDA15S3", /* name */
538 FALSE, /* partial_inplace */
539 0x00007fff, /* src_mask */
540 0x00007fff, /* dst_mask */
541 FALSE), /* pcrel_offset */
542
543 /* Small data area 15 bits offset. */
544 HOWTO (R_NDS32_SDA15S2, /* type */
545 2, /* rightshift */
546 2, /* size (0 = byte, 1 = short, 2 = long) */
547 15, /* bitsize */
548 FALSE, /* pc_relative */
549 0, /* bitpos */
550 complain_overflow_signed, /* complain_on_overflow */
551 nds32_elf_sda15_reloc, /* special_function */
552 "R_NDS32_SDA15S2", /* name */
553 FALSE, /* partial_inplace */
554 0x00007fff, /* src_mask */
555 0x00007fff, /* dst_mask */
556 FALSE), /* pcrel_offset */
557
558 /* Small data area 15 bits offset. */
559 HOWTO (R_NDS32_SDA15S1, /* type */
560 1, /* rightshift */
561 2, /* size (0 = byte, 1 = short, 2 = long) */
562 15, /* bitsize */
563 FALSE, /* pc_relative */
564 0, /* bitpos */
565 complain_overflow_signed, /* complain_on_overflow */
566 nds32_elf_sda15_reloc, /* special_function */
567 "R_NDS32_SDA15S1", /* name */
568 FALSE, /* partial_inplace */
569 0x00007fff, /* src_mask */
570 0x00007fff, /* dst_mask */
571 FALSE), /* pcrel_offset */
572
573 /* Small data area 15 bits offset. */
574 HOWTO (R_NDS32_SDA15S0, /* type */
575 0, /* rightshift */
576 2, /* size (0 = byte, 1 = short, 2 = long) */
577 15, /* bitsize */
578 FALSE, /* pc_relative */
579 0, /* bitpos */
580 complain_overflow_signed, /* complain_on_overflow */
581 nds32_elf_sda15_reloc, /* special_function */
582 "R_NDS32_SDA15S0", /* name */
583 FALSE, /* partial_inplace */
584 0x00007fff, /* src_mask */
585 0x00007fff, /* dst_mask */
586 FALSE), /* pcrel_offset */
587
588 /* GNU extension to record C++ vtable hierarchy */
589 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
590 0, /* rightshift */
591 2, /* size (0 = byte, 1 = short, 2 = long) */
592 0, /* bitsize */
593 FALSE, /* pc_relative */
594 0, /* bitpos */
595 complain_overflow_dont,/* complain_on_overflow */
596 NULL, /* special_function */
597 "R_NDS32_GNU_VTINHERIT", /* name */
598 FALSE, /* partial_inplace */
599 0, /* src_mask */
600 0, /* dst_mask */
601 FALSE), /* pcrel_offset */
602
603 /* GNU extension to record C++ vtable member usage */
604 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
605 0, /* rightshift */
606 2, /* size (0 = byte, 1 = short, 2 = long) */
607 0, /* bitsize */
608 FALSE, /* pc_relative */
609 0, /* bitpos */
610 complain_overflow_dont,/* complain_on_overflow */
611 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
612 "R_NDS32_GNU_VTENTRY", /* name */
613 FALSE, /* partial_inplace */
614 0, /* src_mask */
615 0, /* dst_mask */
616 FALSE), /* pcrel_offset */
617
618 /* A 16 bit absolute relocation. */
619 HOWTO (R_NDS32_16_RELA, /* type */
620 0, /* rightshift */
621 1, /* size (0 = byte, 1 = short, 2 = long) */
622 16, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_bitfield, /* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_NDS32_16_RELA", /* name */
628 FALSE, /* partial_inplace */
629 0xffff, /* src_mask */
630 0xffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 /* A 32 bit absolute relocation. */
634 HOWTO (R_NDS32_32_RELA, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_bitfield, /* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_NDS32_32_RELA", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 /* A 20 bit address. */
649 HOWTO (R_NDS32_20_RELA, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 20, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_signed, /* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_NDS32_20_RELA", /* name */
658 FALSE, /* partial_inplace */
659 0xfffff, /* src_mask */
660 0xfffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
664 1, /* rightshift */
665 1, /* size (0 = byte, 1 = short, 2 = long) */
666 8, /* bitsize */
667 TRUE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed, /* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_NDS32_9_PCREL_RELA",/* name */
672 FALSE, /* partial_inplace */
673 0xff, /* src_mask */
674 0xff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 /* A relative 15 bit relocation, right shifted by 1. */
678 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
679 1, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 14, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed, /* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_NDS32_15_PCREL_RELA", /* name */
687 FALSE, /* partial_inplace */
688 0x3fff, /* src_mask */
689 0x3fff, /* dst_mask */
690 TRUE), /* pcrel_offset */
691
692 /* A relative 17 bit relocation, right shifted by 1. */
693 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
694 1, /* rightshift */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
696 16, /* bitsize */
697 TRUE, /* pc_relative */
698 0, /* bitpos */
699 complain_overflow_signed, /* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_NDS32_17_PCREL_RELA", /* name */
702 FALSE, /* partial_inplace */
703 0xffff, /* src_mask */
704 0xffff, /* dst_mask */
705 TRUE), /* pcrel_offset */
706
707 /* A relative 25 bit relocation, right shifted by 2. */
708 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
709 1, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 24, /* bitsize */
712 TRUE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_signed, /* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_NDS32_25_PCREL_RELA", /* name */
717 FALSE, /* partial_inplace */
718 0xffffff, /* src_mask */
719 0xffffff, /* dst_mask */
720 TRUE), /* pcrel_offset */
721
722 /* High 20 bits of address when lower 16 is or'd in. */
723 HOWTO (R_NDS32_HI20_RELA, /* type */
724 12, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 20, /* bitsize */
727 FALSE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_NDS32_HI20_RELA", /* name */
732 FALSE, /* partial_inplace */
733 0x000fffff, /* src_mask */
734 0x000fffff, /* dst_mask */
735 FALSE), /* pcrel_offset */
736
737 /* Lower 12 bits of address. */
738 HOWTO (R_NDS32_LO12S3_RELA, /* type */
739 3, /* rightshift */
740 2, /* size (0 = byte, 1 = short, 2 = long) */
741 9, /* bitsize */
742 FALSE, /* pc_relative */
743 0, /* bitpos */
744 complain_overflow_dont,/* complain_on_overflow */
745 bfd_elf_generic_reloc, /* special_function */
746 "R_NDS32_LO12S3_RELA", /* name */
747 FALSE, /* partial_inplace */
748 0x000001ff, /* src_mask */
749 0x000001ff, /* dst_mask */
750 FALSE), /* pcrel_offset */
751
752 /* Lower 12 bits of address. */
753 HOWTO (R_NDS32_LO12S2_RELA, /* type */
754 2, /* rightshift */
755 2, /* size (0 = byte, 1 = short, 2 = long) */
756 10, /* bitsize */
757 FALSE, /* pc_relative */
758 0, /* bitpos */
759 complain_overflow_dont,/* complain_on_overflow */
760 bfd_elf_generic_reloc, /* special_function */
761 "R_NDS32_LO12S2_RELA", /* name */
762 FALSE, /* partial_inplace */
763 0x000003ff, /* src_mask */
764 0x000003ff, /* dst_mask */
765 FALSE), /* pcrel_offset */
766
767 /* Lower 12 bits of address. */
768 HOWTO (R_NDS32_LO12S1_RELA, /* type */
769 1, /* rightshift */
770 2, /* size (0 = byte, 1 = short, 2 = long) */
771 11, /* bitsize */
772 FALSE, /* pc_relative */
773 0, /* bitpos */
774 complain_overflow_dont,/* complain_on_overflow */
775 bfd_elf_generic_reloc, /* special_function */
776 "R_NDS32_LO12S1_RELA", /* name */
777 FALSE, /* partial_inplace */
778 0x000007ff, /* src_mask */
779 0x000007ff, /* dst_mask */
780 FALSE), /* pcrel_offset */
781
782 /* Lower 12 bits of address. */
783 HOWTO (R_NDS32_LO12S0_RELA, /* type */
784 0, /* rightshift */
785 2, /* size (0 = byte, 1 = short, 2 = long) */
786 12, /* bitsize */
787 FALSE, /* pc_relative */
788 0, /* bitpos */
789 complain_overflow_dont,/* complain_on_overflow */
790 bfd_elf_generic_reloc, /* special_function */
791 "R_NDS32_LO12S0_RELA", /* name */
792 FALSE, /* partial_inplace */
793 0x00000fff, /* src_mask */
794 0x00000fff, /* dst_mask */
795 FALSE), /* pcrel_offset */
796
797 /* Small data area 15 bits offset. */
798 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
799 3, /* rightshift */
800 2, /* size (0 = byte, 1 = short, 2 = long) */
801 15, /* bitsize */
802 FALSE, /* pc_relative */
803 0, /* bitpos */
804 complain_overflow_signed, /* complain_on_overflow */
805 bfd_elf_generic_reloc, /* special_function */
806 "R_NDS32_SDA15S3_RELA",/* name */
807 FALSE, /* partial_inplace */
808 0x00007fff, /* src_mask */
809 0x00007fff, /* dst_mask */
810 FALSE), /* pcrel_offset */
811
812 /* Small data area 15 bits offset. */
813 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
814 2, /* rightshift */
815 2, /* size (0 = byte, 1 = short, 2 = long) */
816 15, /* bitsize */
817 FALSE, /* pc_relative */
818 0, /* bitpos */
819 complain_overflow_signed, /* complain_on_overflow */
820 bfd_elf_generic_reloc, /* special_function */
821 "R_NDS32_SDA15S2_RELA",/* name */
822 FALSE, /* partial_inplace */
823 0x00007fff, /* src_mask */
824 0x00007fff, /* dst_mask */
825 FALSE), /* pcrel_offset */
826
827 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 15, /* bitsize */
831 FALSE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_SDA15S1_RELA",/* name */
836 FALSE, /* partial_inplace */
837 0x00007fff, /* src_mask */
838 0x00007fff, /* dst_mask */
839 FALSE), /* pcrel_offset */
840
841 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
842 0, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 15, /* bitsize */
845 FALSE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_signed, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 "R_NDS32_SDA15S0_RELA",/* name */
850 FALSE, /* partial_inplace */
851 0x00007fff, /* src_mask */
852 0x00007fff, /* dst_mask */
853 FALSE), /* pcrel_offset */
854
855 /* GNU extension to record C++ vtable hierarchy */
856 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
857 0, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 0, /* bitsize */
860 FALSE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont,/* complain_on_overflow */
863 NULL, /* special_function */
864 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
865 FALSE, /* partial_inplace */
866 0, /* src_mask */
867 0, /* dst_mask */
868 FALSE), /* pcrel_offset */
869
870 /* GNU extension to record C++ vtable member usage */
871 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
872 0, /* rightshift */
873 2, /* size (0 = byte, 1 = short, 2 = long) */
874 0, /* bitsize */
875 FALSE, /* pc_relative */
876 0, /* bitpos */
877 complain_overflow_dont,/* complain_on_overflow */
878 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
879 "R_NDS32_RELA_GNU_VTENTRY", /* name */
880 FALSE, /* partial_inplace */
881 0, /* src_mask */
882 0, /* dst_mask */
883 FALSE), /* pcrel_offset */
884
885 /* Like R_NDS32_20, but referring to the GOT table entry for
886 the symbol. */
887 HOWTO (R_NDS32_GOT20, /* type */
888 0, /* rightshift */
889 2, /* size (0 = byte, 1 = short, 2 = long) */
890 20, /* bitsize */
891 FALSE, /* pc_relative */
892 0, /* bitpos */
893 complain_overflow_signed, /* complain_on_overflow */
894 bfd_elf_generic_reloc, /* special_function */
895 "R_NDS32_GOT20", /* name */
896 FALSE, /* partial_inplace */
897 0xfffff, /* src_mask */
898 0xfffff, /* dst_mask */
899 FALSE), /* pcrel_offset */
900
901 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
902 entry for the symbol. */
903 HOWTO (R_NDS32_25_PLTREL, /* type */
904 1, /* rightshift */
905 2, /* size (0 = byte, 1 = short, 2 = long) */
906 24, /* bitsize */
907 TRUE, /* pc_relative */
908 0, /* bitpos */
909 complain_overflow_signed, /* complain_on_overflow */
910 bfd_elf_generic_reloc, /* special_function */
911 "R_NDS32_25_PLTREL", /* name */
912 FALSE, /* partial_inplace */
913 0xffffff, /* src_mask */
914 0xffffff, /* dst_mask */
915 TRUE), /* pcrel_offset */
916
917 /* This is used only by the dynamic linker. The symbol should exist
918 both in the object being run and in some shared library. The
919 dynamic linker copies the data addressed by the symbol from the
920 shared library into the object, because the object being
921 run has to have the data at some particular address. */
922 HOWTO (R_NDS32_COPY, /* type */
923 0, /* rightshift */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
925 32, /* bitsize */
926 FALSE, /* pc_relative */
927 0, /* bitpos */
928 complain_overflow_bitfield, /* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_NDS32_COPY", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 FALSE), /* pcrel_offset */
935
936 /* Like R_NDS32_20, but used when setting global offset table
937 entries. */
938 HOWTO (R_NDS32_GLOB_DAT, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 FALSE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_bitfield, /* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_NDS32_GLOB_DAT", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 FALSE), /* pcrel_offset */
951
952 /* Marks a procedure linkage table entry for a symbol. */
953 HOWTO (R_NDS32_JMP_SLOT, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 32, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_bitfield, /* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_JMP_SLOT", /* name */
962 FALSE, /* partial_inplace */
963 0xffffffff, /* src_mask */
964 0xffffffff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* Used only by the dynamic linker. When the object is run, this
968 longword is set to the load address of the object, plus the
969 addend. */
970 HOWTO (R_NDS32_RELATIVE, /* type */
971 0, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 32, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_bitfield, /* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_RELATIVE", /* name */
979 FALSE, /* partial_inplace */
980 0xffffffff, /* src_mask */
981 0xffffffff, /* dst_mask */
982 FALSE), /* pcrel_offset */
983
984 HOWTO (R_NDS32_GOTOFF, /* type */
985 0, /* rightshift */
986 2, /* size (0 = byte, 1 = short, 2 = long) */
987 20, /* bitsize */
988 FALSE, /* pc_relative */
989 0, /* bitpos */
990 complain_overflow_signed, /* complain_on_overflow */
991 bfd_elf_generic_reloc, /* special_function */
992 "R_NDS32_GOTOFF", /* name */
993 FALSE, /* partial_inplace */
994 0xfffff, /* src_mask */
995 0xfffff, /* dst_mask */
996 FALSE), /* pcrel_offset */
997
998 /* An PC Relative 20-bit relocation used when setting PIC offset
999 table register. */
1000 HOWTO (R_NDS32_GOTPC20, /* type */
1001 0, /* rightshift */
1002 2, /* size (0 = byte, 1 = short, 2 = long) */
1003 20, /* bitsize */
1004 TRUE, /* pc_relative */
1005 0, /* bitpos */
1006 complain_overflow_signed, /* complain_on_overflow */
1007 bfd_elf_generic_reloc, /* special_function */
1008 "R_NDS32_GOTPC20", /* name */
1009 FALSE, /* partial_inplace */
1010 0xfffff, /* src_mask */
1011 0xfffff, /* dst_mask */
1012 TRUE), /* pcrel_offset */
1013
1014 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1015 the symbol. */
1016 HOWTO (R_NDS32_GOT_HI20, /* type */
1017 12, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 20, /* bitsize */
1020 FALSE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_NDS32_GOT_HI20", /* name */
1025 FALSE, /* partial_inplace */
1026 0x000fffff, /* src_mask */
1027 0x000fffff, /* dst_mask */
1028 FALSE), /* pcrel_offset */
1029 HOWTO (R_NDS32_GOT_LO12, /* type */
1030 0, /* rightshift */
1031 2, /* size (0 = byte, 1 = short, 2 = long) */
1032 12, /* bitsize */
1033 FALSE, /* pc_relative */
1034 0, /* bitpos */
1035 complain_overflow_dont,/* complain_on_overflow */
1036 bfd_elf_generic_reloc, /* special_function */
1037 "R_NDS32_GOT_LO12", /* name */
1038 FALSE, /* partial_inplace */
1039 0x00000fff, /* src_mask */
1040 0x00000fff, /* dst_mask */
1041 FALSE), /* pcrel_offset */
1042
1043 /* An PC Relative relocation used when setting PIC offset table register.
1044 Like R_NDS32_HI20, but referring to the GOT table entry for
1045 the symbol. */
1046 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1047 12, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 20, /* bitsize */
1050 FALSE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_NDS32_GOTPC_HI20", /* name */
1055 FALSE, /* partial_inplace */
1056 0x000fffff, /* src_mask */
1057 0x000fffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 12, /* bitsize */
1063 FALSE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont, /* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_NDS32_GOTPC_LO12", /* name */
1068 FALSE, /* partial_inplace */
1069 0x00000fff, /* src_mask */
1070 0x00000fff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1074 12, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 20, /* bitsize */
1077 FALSE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_NDS32_GOTOFF_HI20", /* name */
1082 FALSE, /* partial_inplace */
1083 0x000fffff, /* src_mask */
1084 0x000fffff, /* dst_mask */
1085 FALSE), /* pcrel_offset */
1086 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 12, /* bitsize */
1090 FALSE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_NDS32_GOTOFF_LO12", /* name */
1095 FALSE, /* partial_inplace */
1096 0x00000fff, /* src_mask */
1097 0x00000fff, /* dst_mask */
1098 FALSE), /* pcrel_offset */
1099
1100 /* Alignment hint for relaxable instruction. This is used with
1101 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1102 in order to make next label aligned on word boundary. */
1103 HOWTO (R_NDS32_INSN16, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 FALSE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 nds32_elf_ignore_reloc,/* special_function */
1111 "R_NDS32_INSN16", /* name */
1112 FALSE, /* partial_inplace */
1113 0x00000fff, /* src_mask */
1114 0x00000fff, /* dst_mask */
1115 FALSE), /* pcrel_offset */
1116
1117 /* Alignment hint for label. */
1118 HOWTO (R_NDS32_LABEL, /* type */
1119 0, /* rightshift */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 32, /* bitsize */
1122 FALSE, /* pc_relative */
1123 0, /* bitpos */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 nds32_elf_ignore_reloc,/* special_function */
1126 "R_NDS32_LABEL", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 FALSE), /* pcrel_offset */
1131
1132 /* Relax hint for unconditional call sequence */
1133 HOWTO (R_NDS32_LONGCALL1, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 FALSE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 nds32_elf_ignore_reloc,/* special_function */
1141 "R_NDS32_LONGCALL1", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 FALSE), /* pcrel_offset */
1146
1147 /* Relax hint for conditional call sequence. */
1148 HOWTO (R_NDS32_LONGCALL2, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 FALSE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 nds32_elf_ignore_reloc,/* special_function */
1156 "R_NDS32_LONGCALL2", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 FALSE), /* pcrel_offset */
1161
1162 /* Relax hint for conditional call sequence. */
1163 HOWTO (R_NDS32_LONGCALL3, /* type */
1164 0, /* rightshift */
1165 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 32, /* bitsize */
1167 FALSE, /* pc_relative */
1168 0, /* bitpos */
1169 complain_overflow_dont,/* complain_on_overflow */
1170 nds32_elf_ignore_reloc,/* special_function */
1171 "R_NDS32_LONGCALL3", /* name */
1172 FALSE, /* partial_inplace */
1173 0xffffffff, /* src_mask */
1174 0xffffffff, /* dst_mask */
1175 FALSE), /* pcrel_offset */
1176
1177 /* Relax hint for unconditional branch sequence. */
1178 HOWTO (R_NDS32_LONGJUMP1, /* type */
1179 0, /* rightshift */
1180 2, /* size (0 = byte, 1 = short, 2 = long) */
1181 32, /* bitsize */
1182 FALSE, /* pc_relative */
1183 0, /* bitpos */
1184 complain_overflow_dont,/* complain_on_overflow */
1185 nds32_elf_ignore_reloc,/* special_function */
1186 "R_NDS32_LONGJUMP1", /* name */
1187 FALSE, /* partial_inplace */
1188 0xffffffff, /* src_mask */
1189 0xffffffff, /* dst_mask */
1190 FALSE), /* pcrel_offset */
1191
1192 /* Relax hint for conditional branch sequence. */
1193 HOWTO (R_NDS32_LONGJUMP2, /* type */
1194 0, /* rightshift */
1195 2, /* size (0 = byte, 1 = short, 2 = long) */
1196 32, /* bitsize */
1197 FALSE, /* pc_relative */
1198 0, /* bitpos */
1199 complain_overflow_dont,/* complain_on_overflow */
1200 nds32_elf_ignore_reloc,/* special_function */
1201 "R_NDS32_LONGJUMP2", /* name */
1202 FALSE, /* partial_inplace */
1203 0xffffffff, /* src_mask */
1204 0xffffffff, /* dst_mask */
1205 FALSE), /* pcrel_offset */
1206
1207 /* Relax hint for conditional branch sequence. */
1208 HOWTO (R_NDS32_LONGJUMP3, /* type */
1209 0, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 32, /* bitsize */
1212 FALSE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont,/* complain_on_overflow */
1215 nds32_elf_ignore_reloc,/* special_function */
1216 "R_NDS32_LONGJUMP3", /* name */
1217 FALSE, /* partial_inplace */
1218 0xffffffff, /* src_mask */
1219 0xffffffff, /* dst_mask */
1220 FALSE), /* pcrel_offset */
1221
1222 /* Relax hint for load/store sequence. */
1223 HOWTO (R_NDS32_LOADSTORE, /* type */
1224 0, /* rightshift */
1225 2, /* size (0 = byte, 1 = short, 2 = long) */
1226 32, /* bitsize */
1227 FALSE, /* pc_relative */
1228 0, /* bitpos */
1229 complain_overflow_dont,/* complain_on_overflow */
1230 nds32_elf_ignore_reloc,/* special_function */
1231 "R_NDS32_LOADSTORE", /* name */
1232 FALSE, /* partial_inplace */
1233 0xffffffff, /* src_mask */
1234 0xffffffff, /* dst_mask */
1235 FALSE), /* pcrel_offset */
1236
1237 /* Relax hint for load/store sequence. */
1238 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1239 0, /* rightshift */
1240 1, /* size (0 = byte, 1 = short, 2 = long) */
1241 16, /* bitsize */
1242 FALSE, /* pc_relative */
1243 0, /* bitpos */
1244 complain_overflow_dont,/* complain_on_overflow */
1245 nds32_elf_ignore_reloc,/* special_function */
1246 "R_NDS32_9_FIXED_RELA",/* name */
1247 FALSE, /* partial_inplace */
1248 0x000000ff, /* src_mask */
1249 0x000000ff, /* dst_mask */
1250 FALSE), /* pcrel_offset */
1251
1252 /* Relax hint for load/store sequence. */
1253 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1254 0, /* rightshift */
1255 2, /* size (0 = byte, 1 = short, 2 = long) */
1256 32, /* bitsize */
1257 FALSE, /* pc_relative */
1258 0, /* bitpos */
1259 complain_overflow_dont,/* complain_on_overflow */
1260 nds32_elf_ignore_reloc,/* special_function */
1261 "R_NDS32_15_FIXED_RELA", /* name */
1262 FALSE, /* partial_inplace */
1263 0x00003fff, /* src_mask */
1264 0x00003fff, /* dst_mask */
1265 FALSE), /* pcrel_offset */
1266
1267 /* Relax hint for load/store sequence. */
1268 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1269 0, /* rightshift */
1270 2, /* size (0 = byte, 1 = short, 2 = long) */
1271 32, /* bitsize */
1272 FALSE, /* pc_relative */
1273 0, /* bitpos */
1274 complain_overflow_dont,/* complain_on_overflow */
1275 nds32_elf_ignore_reloc,/* special_function */
1276 "R_NDS32_17_FIXED_RELA", /* name */
1277 FALSE, /* partial_inplace */
1278 0x0000ffff, /* src_mask */
1279 0x0000ffff, /* dst_mask */
1280 FALSE), /* pcrel_offset */
1281
1282 /* Relax hint for load/store sequence. */
1283 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1284 0, /* rightshift */
1285 2, /* size (0 = byte, 1 = short, 2 = long) */
1286 32, /* bitsize */
1287 FALSE, /* pc_relative */
1288 0, /* bitpos */
1289 complain_overflow_dont,/* complain_on_overflow */
1290 nds32_elf_ignore_reloc,/* special_function */
1291 "R_NDS32_25_FIXED_RELA", /* name */
1292 FALSE, /* partial_inplace */
1293 0x00ffffff, /* src_mask */
1294 0x00ffffff, /* dst_mask */
1295 FALSE), /* pcrel_offset */
1296
1297 /* High 20 bits of PLT symbol offset relative to PC. */
1298 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1299 12, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 20, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_NDS32_PLTREL_HI20", /* name */
1307 FALSE, /* partial_inplace */
1308 0x000fffff, /* src_mask */
1309 0x000fffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 /* Low 12 bits of PLT symbol offset relative to PC. */
1313 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 12, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_NDS32_PLTREL_LO12", /* name */
1322 FALSE, /* partial_inplace */
1323 0x00000fff, /* src_mask */
1324 0x00000fff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1328 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1329 12, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 20, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_dont,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_NDS32_PLT_GOTREL_HI20", /* name */
1337 FALSE, /* partial_inplace */
1338 0x000fffff, /* src_mask */
1339 0x000fffff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1343 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 12, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_NDS32_PLT_GOTREL_LO12", /* name */
1352 FALSE, /* partial_inplace */
1353 0x00000fff, /* src_mask */
1354 0x00000fff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
1357 /* Small data area 12 bits offset. */
1358 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1359 2, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 12, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_signed, /* complain_on_overflow */
1365 bfd_elf_generic_reloc, /* special_function */
1366 "R_NDS32_SDA12S2_DP_RELA", /* name */
1367 FALSE, /* partial_inplace */
1368 0x00000fff, /* src_mask */
1369 0x00000fff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 /* Small data area 12 bits offset. */
1373 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1374 2, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 12, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_signed, /* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_NDS32_SDA12S2_SP_RELA", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00000fff, /* src_mask */
1384 0x00000fff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386 /* Lower 12 bits of address. */
1387
1388 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1389 2, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 10, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_NDS32_LO12S2_DP_RELA", /* name */
1397 FALSE, /* partial_inplace */
1398 0x000003ff, /* src_mask */
1399 0x000003ff, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 /* Lower 12 bits of address. */
1403 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1404 2, /* rightshift */
1405 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 10, /* bitsize */
1407 FALSE, /* pc_relative */
1408 0, /* bitpos */
1409 complain_overflow_dont,/* complain_on_overflow */
1410 bfd_elf_generic_reloc, /* special_function */
1411 "R_NDS32_LO12S2_SP_RELA", /* name */
1412 FALSE, /* partial_inplace */
1413 0x000003ff, /* src_mask */
1414 0x000003ff, /* dst_mask */
1415 FALSE), /* pcrel_offset */
1416 /* Lower 12 bits of address. Special identity for or case. */
1417 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1418 0, /* rightshift */
1419 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 12, /* bitsize */
1421 FALSE, /* pc_relative */
1422 0, /* bitpos */
1423 complain_overflow_dont,/* complain_on_overflow */
1424 bfd_elf_generic_reloc, /* special_function */
1425 "R_NDS32_LO12S0_ORI_RELA", /* name */
1426 FALSE, /* partial_inplace */
1427 0x00000fff, /* src_mask */
1428 0x00000fff, /* dst_mask */
1429 FALSE), /* pcrel_offset */
1430 /* Small data area 19 bits offset. */
1431 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1432 3, /* rightshift */
1433 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 16, /* bitsize */
1435 FALSE, /* pc_relative */
1436 0, /* bitpos */
1437 complain_overflow_signed, /* complain_on_overflow */
1438 bfd_elf_generic_reloc, /* special_function */
1439 "R_NDS32_SDA16S3_RELA",/* name */
1440 FALSE, /* partial_inplace */
1441 0x0000ffff, /* src_mask */
1442 0x0000ffff, /* dst_mask */
1443 FALSE), /* pcrel_offset */
1444
1445 /* Small data area 15 bits offset. */
1446 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1447 2, /* rightshift */
1448 2, /* size (0 = byte, 1 = short, 2 = long) */
1449 17, /* bitsize */
1450 FALSE, /* pc_relative */
1451 0, /* bitpos */
1452 complain_overflow_signed, /* complain_on_overflow */
1453 bfd_elf_generic_reloc, /* special_function */
1454 "R_NDS32_SDA17S2_RELA",/* name */
1455 FALSE, /* partial_inplace */
1456 0x0001ffff, /* src_mask */
1457 0x0001ffff, /* dst_mask */
1458 FALSE), /* pcrel_offset */
1459
1460 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1461 1, /* rightshift */
1462 2, /* size (0 = byte, 1 = short, 2 = long) */
1463 18, /* bitsize */
1464 FALSE, /* pc_relative */
1465 0, /* bitpos */
1466 complain_overflow_signed, /* complain_on_overflow */
1467 bfd_elf_generic_reloc, /* special_function */
1468 "R_NDS32_SDA18S1_RELA",/* name */
1469 FALSE, /* partial_inplace */
1470 0x0003ffff, /* src_mask */
1471 0x0003ffff, /* dst_mask */
1472 FALSE), /* pcrel_offset */
1473
1474 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1475 0, /* rightshift */
1476 2, /* size (0 = byte, 1 = short, 2 = long) */
1477 19, /* bitsize */
1478 FALSE, /* pc_relative */
1479 0, /* bitpos */
1480 complain_overflow_signed, /* complain_on_overflow */
1481 bfd_elf_generic_reloc, /* special_function */
1482 "R_NDS32_SDA19S0_RELA",/* name */
1483 FALSE, /* partial_inplace */
1484 0x0007ffff, /* src_mask */
1485 0x0007ffff, /* dst_mask */
1486 FALSE), /* pcrel_offset */
1487 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1488 0, /* rightshift */
1489 0, /* size (0 = byte, 1 = short, 2 = long) */
1490 8, /* bitsize */
1491 FALSE, /* pc_relative */
1492 0, /* bitpos */
1493 complain_overflow_dont,/* complain_on_overflow */
1494 nds32_elf_ignore_reloc,/* special_function */
1495 "R_NDS32_DWARF2_OP1_RELA", /* name */
1496 FALSE, /* partial_inplace */
1497 0xff, /* src_mask */
1498 0xff, /* dst_mask */
1499 FALSE), /* pcrel_offset */
1500 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1501 0, /* rightshift */
1502 1, /* size (0 = byte, 1 = short, 2 = long) */
1503 16, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont,/* complain_on_overflow */
1507 nds32_elf_ignore_reloc,/* special_function */
1508 "R_NDS32_DWARF2_OP2_RELA", /* name */
1509 FALSE, /* partial_inplace */
1510 0xffff, /* src_mask */
1511 0xffff, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1514 0, /* rightshift */
1515 2, /* size (0 = byte, 1 = short, 2 = long) */
1516 32, /* bitsize */
1517 FALSE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_dont,/* complain_on_overflow */
1520 nds32_elf_ignore_reloc,/* special_function */
1521 "R_NDS32_DWARF2_LEB_RELA", /* name */
1522 FALSE, /* partial_inplace */
1523 0xffffffff, /* src_mask */
1524 0xffffffff, /* dst_mask */
1525 FALSE), /* pcrel_offset */
1526 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1527 0, /* rightshift */
1528 1, /* size (0 = byte, 1 = short, 2 = long) */
1529 16, /* bitsize */
1530 FALSE, /* pc_relative */
1531 0, /* bitpos */
1532 complain_overflow_dont,/* complain_on_overflow */
1533 nds32_elf_ignore_reloc,/* special_function */
1534 "R_NDS32_UPDATE_TA_RELA", /* name */
1535 FALSE, /* partial_inplace */
1536 0xffff, /* src_mask */
1537 0xffff, /* dst_mask */
1538 FALSE), /* pcrel_offset */
1539 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1540 entry for the symbol. */
1541 HOWTO (R_NDS32_9_PLTREL, /* type */
1542 1, /* rightshift */
1543 1, /* size (0 = byte, 1 = short, 2 = long) */
1544 8, /* bitsize */
1545 TRUE, /* pc_relative */
1546 0, /* bitpos */
1547 complain_overflow_signed, /* complain_on_overflow */
1548 bfd_elf_generic_reloc, /* special_function */
1549 "R_NDS32_9_PLTREL", /* name */
1550 FALSE, /* partial_inplace */
1551 0xff, /* src_mask */
1552 0xff, /* dst_mask */
1553 TRUE), /* pcrel_offset */
1554 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1555 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1556 0, /* rightshift */
1557 2, /* size (0 = byte, 1 = short, 2 = long) */
1558 20, /* bitsize */
1559 FALSE, /* pc_relative */
1560 0, /* bitpos */
1561 complain_overflow_dont,/* complain_on_overflow */
1562 bfd_elf_generic_reloc, /* special_function */
1563 "R_NDS32_PLT_GOTREL_LO20", /* name */
1564 FALSE, /* partial_inplace */
1565 0x000fffff, /* src_mask */
1566 0x000fffff, /* dst_mask */
1567 FALSE), /* pcrel_offset */
1568 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1569 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1570 0, /* rightshift */
1571 2, /* size (0 = byte, 1 = short, 2 = long) */
1572 15, /* bitsize */
1573 FALSE, /* pc_relative */
1574 0, /* bitpos */
1575 complain_overflow_dont,/* complain_on_overflow */
1576 bfd_elf_generic_reloc, /* special_function */
1577 "R_NDS32_PLT_GOTREL_LO15", /* name */
1578 FALSE, /* partial_inplace */
1579 0x00007fff, /* src_mask */
1580 0x00007fff, /* dst_mask */
1581 FALSE), /* pcrel_offset */
1582 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1583 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1584 0, /* rightshift */
1585 2, /* size (0 = byte, 1 = short, 2 = long) */
1586 19, /* bitsize */
1587 FALSE, /* pc_relative */
1588 0, /* bitpos */
1589 complain_overflow_dont,/* complain_on_overflow */
1590 bfd_elf_generic_reloc, /* special_function */
1591 "R_NDS32_PLT_GOTREL_LO19", /* name */
1592 FALSE, /* partial_inplace */
1593 0x0007ffff, /* src_mask */
1594 0x0007ffff, /* dst_mask */
1595 FALSE), /* pcrel_offset */
1596 HOWTO (R_NDS32_GOT_LO15, /* type */
1597 0, /* rightshift */
1598 2, /* size (0 = byte, 1 = short, 2 = long) */
1599 15, /* bitsize */
1600 FALSE, /* pc_relative */
1601 0, /* bitpos */
1602 complain_overflow_dont,/* complain_on_overflow */
1603 bfd_elf_generic_reloc, /* special_function */
1604 "R_NDS32_GOT_LO15", /* name */
1605 FALSE, /* partial_inplace */
1606 0x00007fff, /* src_mask */
1607 0x00007fff, /* dst_mask */
1608 FALSE), /* pcrel_offset */
1609 HOWTO (R_NDS32_GOT_LO19, /* type */
1610 0, /* rightshift */
1611 2, /* size (0 = byte, 1 = short, 2 = long) */
1612 19, /* bitsize */
1613 FALSE, /* pc_relative */
1614 0, /* bitpos */
1615 complain_overflow_dont,/* complain_on_overflow */
1616 bfd_elf_generic_reloc, /* special_function */
1617 "R_NDS32_GOT_LO19", /* name */
1618 FALSE, /* partial_inplace */
1619 0x0007ffff, /* src_mask */
1620 0x0007ffff, /* dst_mask */
1621 FALSE), /* pcrel_offset */
1622 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1623 0, /* rightshift */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 15, /* bitsize */
1626 FALSE, /* pc_relative */
1627 0, /* bitpos */
1628 complain_overflow_dont,/* complain_on_overflow */
1629 bfd_elf_generic_reloc, /* special_function */
1630 "R_NDS32_GOTOFF_LO15", /* name */
1631 FALSE, /* partial_inplace */
1632 0x00007fff, /* src_mask */
1633 0x00007fff, /* dst_mask */
1634 FALSE), /* pcrel_offset */
1635 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1636 0, /* rightshift */
1637 2, /* size (0 = byte, 1 = short, 2 = long) */
1638 19, /* bitsize */
1639 FALSE, /* pc_relative */
1640 0, /* bitpos */
1641 complain_overflow_dont,/* complain_on_overflow */
1642 bfd_elf_generic_reloc, /* special_function */
1643 "R_NDS32_GOTOFF_LO19", /* name */
1644 FALSE, /* partial_inplace */
1645 0x0007ffff, /* src_mask */
1646 0x0007ffff, /* dst_mask */
1647 FALSE), /* pcrel_offset */
1648 /* GOT 15 bits offset. */
1649 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1650 2, /* rightshift */
1651 2, /* size (0 = byte, 1 = short, 2 = long) */
1652 15, /* bitsize */
1653 FALSE, /* pc_relative */
1654 0, /* bitpos */
1655 complain_overflow_signed, /* complain_on_overflow */
1656 bfd_elf_generic_reloc, /* special_function */
1657 "R_NDS32_GOT15S2_RELA",/* name */
1658 FALSE, /* partial_inplace */
1659 0x00007fff, /* src_mask */
1660 0x00007fff, /* dst_mask */
1661 FALSE), /* pcrel_offset */
1662 /* GOT 17 bits offset. */
1663 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1664 2, /* rightshift */
1665 2, /* size (0 = byte, 1 = short, 2 = long) */
1666 17, /* bitsize */
1667 FALSE, /* pc_relative */
1668 0, /* bitpos */
1669 complain_overflow_signed, /* complain_on_overflow */
1670 bfd_elf_generic_reloc, /* special_function */
1671 "R_NDS32_GOT17S2_RELA",/* name */
1672 FALSE, /* partial_inplace */
1673 0x0001ffff, /* src_mask */
1674 0x0001ffff, /* dst_mask */
1675 FALSE), /* pcrel_offset */
1676 /* A 5 bit address. */
1677 HOWTO (R_NDS32_5_RELA, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 5, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_signed, /* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_NDS32_5_RELA", /* name */
1686 FALSE, /* partial_inplace */
1687 0x1f, /* src_mask */
1688 0x1f, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1690 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1691 1, /* rightshift */
1692 1, /* size (0 = byte, 1 = short, 2 = long) */
1693 9, /* bitsize */
1694 TRUE, /* pc_relative */
1695 0, /* bitpos */
1696 complain_overflow_unsigned, /* complain_on_overflow */
1697 bfd_elf_generic_reloc, /* special_function */
1698 "R_NDS32_10_UPCREL_RELA", /* name */
1699 FALSE, /* partial_inplace */
1700 0x1ff, /* src_mask */
1701 0x1ff, /* dst_mask */
1702 TRUE), /* pcrel_offset */
1703 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1704 2, /* rightshift */
1705 1, /* size (0 = byte, 1 = short, 2 = long) */
1706 7, /* bitsize */
1707 FALSE, /* pc_relative */
1708 0, /* bitpos */
1709 complain_overflow_unsigned, /* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_SDA_FP7U2_RELA", /* name */
1712 FALSE, /* partial_inplace */
1713 0x0000007f, /* src_mask */
1714 0x0000007f, /* dst_mask */
1715 FALSE), /* pcrel_offset */
1716 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1717 1, /* rightshift */
1718 2, /* size (0 = byte, 1 = short, 2 = long) */
1719 8, /* bitsize */
1720 TRUE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_signed, /* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1725 FALSE, /* partial_inplace */
1726 0xff, /* src_mask */
1727 0xff, /* dst_mask */
1728 TRUE), /* pcrel_offset */
1729 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1730 1, /* rightshift */
1731 2, /* size (0 = byte, 1 = short, 2 = long) */
1732 24, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_NDS32_25_ABS_RELA", /* name */
1738 FALSE, /* partial_inplace */
1739 0xffffff, /* src_mask */
1740 0xffffff, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1744 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1745 1, /* rightshift */
1746 2, /* size (0 = byte, 1 = short, 2 = long) */
1747 16, /* bitsize */
1748 TRUE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_signed, /* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_NDS32_17IFC_PCREL_RELA", /* name */
1753 FALSE, /* partial_inplace */
1754 0xffff, /* src_mask */
1755 0xffff, /* dst_mask */
1756 TRUE), /* pcrel_offset */
1757
1758 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1759 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1760 1, /* rightshift */
1761 1, /* size (0 = byte, 1 = short, 2 = long) */
1762 9, /* bitsize */
1763 TRUE, /* pc_relative */
1764 0, /* bitpos */
1765 complain_overflow_unsigned, /* complain_on_overflow */
1766 bfd_elf_generic_reloc, /* special_function */
1767 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1768 FALSE, /* partial_inplace */
1769 0x1ff, /* src_mask */
1770 0x1ff, /* dst_mask */
1771 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1772
1773 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1774 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1775 12, /* rightshift */
1776 2, /* size (0 = byte, 1 = short, 2 = long) */
1777 20, /* bitsize */
1778 FALSE, /* pc_relative */
1779 0, /* bitpos */
1780 complain_overflow_dont, /* complain_on_overflow */
1781 bfd_elf_generic_reloc, /* special_function */
1782 "R_NDS32_TLS_LE_HI20", /* name */
1783 FALSE, /* partial_inplace */
1784 0x000fffff, /* src_mask */
1785 0x000fffff, /* dst_mask */
1786 FALSE), /* pcrel_offset */
1787 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1788 0, /* rightshift */
1789 2, /* size (0 = byte, 1 = short, 2 = long) */
1790 12, /* bitsize */
1791 FALSE, /* pc_relative */
1792 0, /* bitpos */
1793 complain_overflow_dont, /* complain_on_overflow */
1794 bfd_elf_generic_reloc, /* special_function */
1795 "R_NDS32_TLS_LE_LO12", /* name */
1796 FALSE, /* partial_inplace */
1797 0x00000fff, /* src_mask */
1798 0x00000fff, /* dst_mask */
1799 FALSE), /* pcrel_offset */
1800
1801 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1802 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1803 12, /* rightshift */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1805 20, /* bitsize */
1806 FALSE, /* pc_relative */
1807 0, /* bitpos */
1808 complain_overflow_dont, /* complain_on_overflow */
1809 bfd_elf_generic_reloc, /* special_function */
1810 "R_NDS32_TLS_IE_HI20", /* name */
1811 FALSE, /* partial_inplace */
1812 0x000fffff, /* src_mask */
1813 0x000fffff, /* dst_mask */
1814 FALSE), /* pcrel_offset */
1815 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1816 2, /* rightshift */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1818 10, /* bitsize */
1819 FALSE, /* pc_relative */
1820 0, /* bitpos */
1821 complain_overflow_dont, /* complain_on_overflow */
1822 bfd_elf_generic_reloc, /* special_function */
1823 "R_NDS32_TLS_IE_LO12S2", /* name */
1824 FALSE, /* partial_inplace */
1825 0x000003ff, /* src_mask */
1826 0x000003ff, /* dst_mask */
1827 FALSE), /* pcrel_offset */
1828 /* Mark a TLS IE entry in GOT. */
1829 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1830 0, /* rightshift */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 32, /* bitsize */
1833 FALSE, /* pc_relative */
1834 0, /* bitpos */
1835 complain_overflow_bitfield, /* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_NDS32_TLS_TPOFF", /* name */
1838 FALSE, /* partial_inplace */
1839 0xffffffff, /* src_mask */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 /* A 20 bit address. */
1843 HOWTO (R_NDS32_TLS_LE_20, /* type */
1844 0, /* rightshift */
1845 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 20, /* bitsize */
1847 FALSE, /* pc_relative */
1848 0, /* bitpos */
1849 complain_overflow_signed, /* complain_on_overflow */
1850 bfd_elf_generic_reloc, /* special_function */
1851 "R_NDS32_TLS_LE_20", /* name */
1852 FALSE, /* partial_inplace */
1853 0xfffff, /* src_mask */
1854 0xfffff, /* dst_mask */
1855 FALSE), /* pcrel_offset */
1856 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1857 0, /* rightshift */
1858 2, /* size (0 = byte, 1 = short, 2 = long) */
1859 15, /* bitsize */
1860 FALSE, /* pc_relative */
1861 0, /* bitpos */
1862 complain_overflow_signed, /* complain_on_overflow */
1863 bfd_elf_generic_reloc, /* special_function */
1864 "R_NDS32_TLS_LE_15S0", /* name */
1865 FALSE, /* partial_inplace */
1866 0x7fff, /* src_mask */
1867 0x7fff, /* dst_mask */
1868 FALSE), /* pcrel_offset */
1869 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1870 1, /* rightshift */
1871 2, /* size (0 = byte, 1 = short, 2 = long) */
1872 15, /* bitsize */
1873 FALSE, /* pc_relative */
1874 0, /* bitpos */
1875 complain_overflow_signed, /* complain_on_overflow */
1876 bfd_elf_generic_reloc, /* special_function */
1877 "R_NDS32_TLS_LE_15S1", /* name */
1878 FALSE, /* partial_inplace */
1879 0x7fff, /* src_mask */
1880 0x7fff, /* dst_mask */
1881 FALSE), /* pcrel_offset */
1882 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1883 2, /* rightshift */
1884 2, /* size (0 = byte, 1 = short, 2 = long) */
1885 15, /* bitsize */
1886 FALSE, /* pc_relative */
1887 0, /* bitpos */
1888 complain_overflow_signed, /* complain_on_overflow */
1889 bfd_elf_generic_reloc, /* special_function */
1890 "R_NDS32_TLS_LE_15S2", /* name */
1891 FALSE, /* partial_inplace */
1892 0x7fff, /* src_mask */
1893 0x7fff, /* dst_mask */
1894 FALSE), /* pcrel_offset */
1895
1896 /* Relax hint for unconditional call sequence */
1897 HOWTO (R_NDS32_LONGCALL4, /* type */
1898 0, /* rightshift */
1899 2, /* size (0 = byte, 1 = short, 2 = long) */
1900 32, /* bitsize */
1901 FALSE, /* pc_relative */
1902 0, /* bitpos */
1903 complain_overflow_dont, /* complain_on_overflow */
1904 nds32_elf_ignore_reloc, /* special_function */
1905 "R_NDS32_LONGCALL4", /* name */
1906 FALSE, /* partial_inplace */
1907 0xffffffff, /* src_mask */
1908 0xffffffff, /* dst_mask */
1909 FALSE), /* pcrel_offset */
1910
1911 /* Relax hint for conditional call sequence. */
1912 HOWTO (R_NDS32_LONGCALL5, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont, /* complain_on_overflow */
1919 nds32_elf_ignore_reloc, /* special_function */
1920 "R_NDS32_LONGCALL5", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925
1926 /* Relax hint for conditional call sequence. */
1927 HOWTO (R_NDS32_LONGCALL6, /* type */
1928 0, /* rightshift */
1929 2, /* size (0 = byte, 1 = short, 2 = long) */
1930 32, /* bitsize */
1931 FALSE, /* pc_relative */
1932 0, /* bitpos */
1933 complain_overflow_dont, /* complain_on_overflow */
1934 nds32_elf_ignore_reloc, /* special_function */
1935 "R_NDS32_LONGCALL6", /* name */
1936 FALSE, /* partial_inplace */
1937 0xffffffff, /* src_mask */
1938 0xffffffff, /* dst_mask */
1939 FALSE), /* pcrel_offset */
1940
1941 /* Relax hint for unconditional branch sequence. */
1942 HOWTO (R_NDS32_LONGJUMP4, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont, /* complain_on_overflow */
1949 nds32_elf_ignore_reloc, /* special_function */
1950 "R_NDS32_LONGJUMP4", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955
1956 /* Relax hint for conditional branch sequence. */
1957 HOWTO (R_NDS32_LONGJUMP5, /* type */
1958 0, /* rightshift */
1959 2, /* size (0 = byte, 1 = short, 2 = long) */
1960 32, /* bitsize */
1961 FALSE, /* pc_relative */
1962 0, /* bitpos */
1963 complain_overflow_dont, /* complain_on_overflow */
1964 nds32_elf_ignore_reloc, /* special_function */
1965 "R_NDS32_LONGJUMP5", /* name */
1966 FALSE, /* partial_inplace */
1967 0xffffffff, /* src_mask */
1968 0xffffffff, /* dst_mask */
1969 FALSE), /* pcrel_offset */
1970
1971 /* Relax hint for conditional branch sequence. */
1972 HOWTO (R_NDS32_LONGJUMP6, /* type */
1973 0, /* rightshift */
1974 2, /* size (0 = byte, 1 = short, 2 = long) */
1975 32, /* bitsize */
1976 FALSE, /* pc_relative */
1977 0, /* bitpos */
1978 complain_overflow_dont, /* complain_on_overflow */
1979 nds32_elf_ignore_reloc, /* special_function */
1980 "R_NDS32_LONGJUMP6", /* name */
1981 FALSE, /* partial_inplace */
1982 0xffffffff, /* src_mask */
1983 0xffffffff, /* dst_mask */
1984 FALSE), /* pcrel_offset */
1985
1986 /* Relax hint for conditional branch sequence. */
1987 HOWTO (R_NDS32_LONGJUMP7, /* type */
1988 0, /* rightshift */
1989 2, /* size (0 = byte, 1 = short, 2 = long) */
1990 32, /* bitsize */
1991 FALSE, /* pc_relative */
1992 0, /* bitpos */
1993 complain_overflow_dont, /* complain_on_overflow */
1994 nds32_elf_ignore_reloc, /* special_function */
1995 "R_NDS32_LONGJUMP7", /* name */
1996 FALSE, /* partial_inplace */
1997 0xffffffff, /* src_mask */
1998 0xffffffff, /* dst_mask */
1999 FALSE), /* pcrel_offset */
35c08157
KLC		 2000};
2001
2002/* Relocations used for relaxation. */
2003static reloc_howto_type nds32_elf_relax_howto_table[] =
2004{
2005 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2006 0, /* rightshift */
2007 2, /* size (0 = byte, 1 = short, 2 = long) */
2008 32, /* bitsize */
2009 FALSE, /* pc_relative */
2010 0, /* bitpos */
2011 complain_overflow_dont,/* complain_on_overflow */
2012 nds32_elf_ignore_reloc,/* special_function */
2013 "R_NDS32_RELAX_ENTRY", /* name */
2014 FALSE, /* partial_inplace */
2015 0xffffffff, /* src_mask */
2016 0xffffffff, /* dst_mask */
2017 FALSE), /* pcrel_offset */
2018 HOWTO (R_NDS32_GOT_SUFF, /* type */
2019 0, /* rightshift */
2020 2, /* size (0 = byte, 1 = short, 2 = long) */
2021 32, /* bitsize */
2022 FALSE, /* pc_relative */
2023 0, /* bitpos */
2024 complain_overflow_dont,/* complain_on_overflow */
2025 nds32_elf_ignore_reloc,/* special_function */
2026 "R_NDS32_GOT_SUFF", /* name */
2027 FALSE, /* partial_inplace */
2028 0xffffffff, /* src_mask */
2029 0xffffffff, /* dst_mask */
2030 FALSE), /* pcrel_offset */
2031 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2032 0, /* rightshift */
2033 2, /* size (0 = byte, 1 = short, 2 = long) */
2034 32, /* bitsize */
2035 FALSE, /* pc_relative */
2036 0, /* bitpos */
2037 complain_overflow_bitfield, /* complain_on_overflow */
2038 nds32_elf_ignore_reloc,/* special_function */
2039 "R_NDS32_GOTOFF_SUFF", /* name */
2040 FALSE, /* partial_inplace */
2041 0xffffffff, /* src_mask */
2042 0xffffffff, /* dst_mask */
2043 FALSE), /* pcrel_offset */
2044 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2045 0, /* rightshift */
2046 2, /* size (0 = byte, 1 = short, 2 = long) */
2047 32, /* bitsize */
2048 FALSE, /* pc_relative */
2049 0, /* bitpos */
2050 complain_overflow_dont,/* complain_on_overflow */
2051 nds32_elf_ignore_reloc,/* special_function */
2052 "R_NDS32_PLT_GOT_SUFF",/* name */
2053 FALSE, /* partial_inplace */
2054 0xffffffff, /* src_mask */
2055 0xffffffff, /* dst_mask */
2056 FALSE), /* pcrel_offset */
2057 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2058 0, /* rightshift */
2059 2, /* size (0 = byte, 1 = short, 2 = long) */
2060 32, /* bitsize */
2061 FALSE, /* pc_relative */
2062 0, /* bitpos */
2063 complain_overflow_dont,/* complain_on_overflow */
2064 nds32_elf_ignore_reloc,/* special_function */
2065 "R_NDS32_MULCALL_SUFF",/* name */
2066 FALSE, /* partial_inplace */
2067 0xffffffff, /* src_mask */
2068 0xffffffff, /* dst_mask */
2069 FALSE), /* pcrel_offset */
2070 HOWTO (R_NDS32_PTR, /* type */
2071 0, /* rightshift */
2072 2, /* size (0 = byte, 1 = short, 2 = long) */
2073 32, /* bitsize */
2074 FALSE, /* pc_relative */
2075 0, /* bitpos */
2076 complain_overflow_dont,/* complain_on_overflow */
2077 nds32_elf_ignore_reloc,/* special_function */
2078 "R_NDS32_PTR", /* name */
2079 FALSE, /* partial_inplace */
2080 0xffffffff, /* src_mask */
2081 0xffffffff, /* dst_mask */
2082 FALSE), /* pcrel_offset */
2083 HOWTO (R_NDS32_PTR_COUNT, /* type */
2084 0, /* rightshift */
2085 2, /* size (0 = byte, 1 = short, 2 = long) */
2086 32, /* bitsize */
2087 FALSE, /* pc_relative */
2088 0, /* bitpos */
2089 complain_overflow_dont,/* complain_on_overflow */
2090 nds32_elf_ignore_reloc,/* special_function */
2091 "R_NDS32_PTR_COUNT", /* name */
2092 FALSE, /* partial_inplace */
2093 0xffffffff, /* src_mask */
2094 0xffffffff, /* dst_mask */
2095 FALSE), /* pcrel_offset */
2096 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2097 0, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 32, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont,/* complain_on_overflow */
2103 nds32_elf_ignore_reloc,/* special_function */
2104 "R_NDS32_PTR_RESOLVED",/* name */
2105 FALSE, /* partial_inplace */
2106 0xffffffff, /* src_mask */
2107 0xffffffff, /* dst_mask */
2108 FALSE), /* pcrel_offset */
2109 HOWTO (R_NDS32_PLTBLOCK, /* type */
2110 0, /* rightshift */
2111 2, /* size (0 = byte, 1 = short, 2 = long) */
2112 32, /* bitsize */
2113 FALSE, /* pc_relative */
2114 0, /* bitpos */
2115 complain_overflow_dont,/* complain_on_overflow */
2116 nds32_elf_ignore_reloc,/* special_function */
2117 "R_NDS32_PLTBLOCK", /* name */
2118 FALSE, /* partial_inplace */
2119 0xffffffff, /* src_mask */
2120 0xffffffff, /* dst_mask */
2121 FALSE), /* pcrel_offset */
2122 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2123 0, /* rightshift */
2124 2, /* size (0 = byte, 1 = short, 2 = long) */
2125 32, /* bitsize */
2126 FALSE, /* pc_relative */
2127 0, /* bitpos */
2128 complain_overflow_dont,/* complain_on_overflow */
2129 nds32_elf_ignore_reloc,/* special_function */
2130 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2131 FALSE, /* partial_inplace */
2132 0xffffffff, /* src_mask */
2133 0xffffffff, /* dst_mask */
2134 FALSE), /* pcrel_offset */
2135 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2136 0, /* rightshift */
2137 2, /* size (0 = byte, 1 = short, 2 = long) */
2138 32, /* bitsize */
2139 FALSE, /* pc_relative */
2140 0, /* bitpos */
2141 complain_overflow_dont,/* complain_on_overflow */
2142 nds32_elf_ignore_reloc,/* special_function */
2143 "R_NDS32_RELAX_REGION_END", /* name */
2144 FALSE, /* partial_inplace */
2145 0xffffffff, /* src_mask */
2146 0xffffffff, /* dst_mask */
2147 FALSE), /* pcrel_offset */
2148 HOWTO (R_NDS32_MINUEND, /* type */
2149 0, /* rightshift */
2150 2, /* size (0 = byte, 1 = short, 2 = long) */
2151 32, /* bitsize */
2152 FALSE, /* pc_relative */
2153 0, /* bitpos */
2154 complain_overflow_dont,/* complain_on_overflow */
2155 nds32_elf_ignore_reloc,/* special_function */
2156 "R_NDS32_MINUEND", /* name */
2157 FALSE, /* partial_inplace */
2158 0xffffffff, /* src_mask */
2159 0xffffffff, /* dst_mask */
2160 FALSE), /* pcrel_offset */
2161 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2162 0, /* rightshift */
2163 2, /* size (0 = byte, 1 = short, 2 = long) */
2164 32, /* bitsize */
2165 FALSE, /* pc_relative */
2166 0, /* bitpos */
2167 complain_overflow_dont,/* complain_on_overflow */
2168 nds32_elf_ignore_reloc,/* special_function */
2169 "R_NDS32_SUBTRAHEND", /* name */
2170 FALSE, /* partial_inplace */
2171 0xffffffff, /* src_mask */
2172 0xffffffff, /* dst_mask */
2173 FALSE), /* pcrel_offset */
2174 HOWTO (R_NDS32_DIFF8, /* type */
2175 0, /* rightshift */
2176 0, /* size (0 = byte, 1 = short, 2 = long) */
2177 8, /* bitsize */
2178 FALSE, /* pc_relative */
2179 0, /* bitpos */
2180 complain_overflow_dont,/* complain_on_overflow */
2181 nds32_elf_ignore_reloc,/* special_function */
2182 "R_NDS32_DIFF8", /* name */
2183 FALSE, /* partial_inplace */
2184 0x000000ff, /* src_mask */
2185 0x000000ff, /* dst_mask */
2186 FALSE), /* pcrel_offset */
2187 HOWTO (R_NDS32_DIFF16, /* type */
2188 0, /* rightshift */
2189 1, /* size (0 = byte, 1 = short, 2 = long) */
2190 16, /* bitsize */
2191 FALSE, /* pc_relative */
2192 0, /* bitpos */
2193 complain_overflow_dont,/* complain_on_overflow */
2194 nds32_elf_ignore_reloc,/* special_function */
2195 "R_NDS32_DIFF16", /* name */
2196 FALSE, /* partial_inplace */
2197 0x0000ffff, /* src_mask */
2198 0x0000ffff, /* dst_mask */
2199 FALSE), /* pcrel_offset */
2200 HOWTO (R_NDS32_DIFF32, /* type */
2201 0, /* rightshift */
2202 2, /* size (0 = byte, 1 = short, 2 = long) */
2203 32, /* bitsize */
2204 FALSE, /* pc_relative */
2205 0, /* bitpos */
2206 complain_overflow_dont,/* complain_on_overflow */
2207 nds32_elf_ignore_reloc,/* special_function */
2208 "R_NDS32_DIFF32", /* name */
2209 FALSE, /* partial_inplace */
2210 0xffffffff, /* src_mask */
2211 0xffffffff, /* dst_mask */
2212 FALSE), /* pcrel_offset */
2213 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2214 0, /* rightshift */
2215 0, /* size (0 = byte, 1 = short, 2 = long) */
2216 0, /* bitsize */
2217 FALSE, /* pc_relative */
2218 0, /* bitpos */
2219 complain_overflow_dont,/* complain_on_overflow */
2220 nds32_elf_ignore_reloc,/* special_function */
2221 "R_NDS32_DIFF_ULEB128",/* name */
2222 FALSE, /* partial_inplace */
2223 0xffffffff, /* src_mask */
2224 0xffffffff, /* dst_mask */
2225 FALSE), /* pcrel_offset */
2226 HOWTO (R_NDS32_DATA, /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 32, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont,/* complain_on_overflow */
2233 nds32_elf_ignore_reloc,/* special_function */
2234 "R_NDS32_DATA", /* name */
2235 FALSE, /* partial_inplace */
2236 0xffffffff, /* src_mask */
2237 0xffffffff, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239 HOWTO (R_NDS32_TRAN, /* type */
2240 0, /* rightshift */
2241 2, /* size (0 = byte, 1 = short, 2 = long) */
2242 32, /* bitsize */
2243 FALSE, /* pc_relative */
2244 0, /* bitpos */
2245 complain_overflow_dont,/* complain_on_overflow */
2246 nds32_elf_ignore_reloc,/* special_function */
2247 "R_NDS32_TRAN", /* name */
2248 FALSE, /* partial_inplace */
2249 0xffffffff, /* src_mask */
2250 0xffffffff, /* dst_mask */
2251 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2252 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2253 0, /* rightshift */
2254 2, /* size (0 = byte, 1 = short, 2 = long) */
2255 32, /* bitsize */
2256 FALSE, /* pc_relative */
2257 0, /* bitpos */
2258 complain_overflow_dont, /* complain_on_overflow */
2259 nds32_elf_ignore_reloc, /* special_function */
2260 "R_NDS32_TLS_LE_ADD", /* name */
2261 FALSE, /* partial_inplace */
2262 0xffffffff, /* src_mask */
2263 0xffffffff, /* dst_mask */
2264 FALSE), /* pcrel_offset */
2265 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2266 0, /* rightshift */
2267 2, /* size (0 = byte, 1 = short, 2 = long) */
2268 32, /* bitsize */
2269 FALSE, /* pc_relative */
2270 0, /* bitpos */
2271 complain_overflow_dont, /* complain_on_overflow */
2272 nds32_elf_ignore_reloc, /* special_function */
2273 "R_NDS32_TLS_LE_LS", /* name */
2274 FALSE, /* partial_inplace */
2275 0xffffffff, /* src_mask */
2276 0xffffffff, /* dst_mask */
2277 FALSE), /* pcrel_offset */
2278 HOWTO (R_NDS32_EMPTY, /* type */
2279 0, /* rightshift */
2280 2, /* size (0 = byte, 1 = short, 2 = long) */
2281 32, /* bitsize */
2282 FALSE, /* pc_relative */
2283 0, /* bitpos */
2284 complain_overflow_dont, /* complain_on_overflow */
2285 nds32_elf_ignore_reloc, /* special_function */
2286 "R_NDS32_EMPTY", /* name */
2287 FALSE, /* partial_inplace */
2288 0xffffffff, /* src_mask */
2289 0xffffffff, /* dst_mask */
2290 FALSE), /* pcrel_offset */
35c08157
KLC		 2291};
2292
2293\f
2294/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2295 This prototype is the same as qsort (). */
2296
2297void
2298nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2299 int (*compar) (const void *lhs, const void *rhs))
2300{
2301 char *ptr = (char *) base;
1c8f6a4d 2302 int i, j;
e1fa0163 2303 char *tmp = xmalloc (size);
35c08157
KLC		 2304
2305 /* If i is less than j, i is inserted before j.
2306
2307 |---- j ----- i --------------|
2308 \ / \ /
2309 sorted unsorted
2310 */
2311
1c8f6a4d 2312 for (i = 1; i < (int) nmemb; i++)
35c08157 2313 {
1c8f6a4d
KLC		 2314 for (j = (i - 1); j >= 0; j--)
2315 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2316 break;
2317
1c8f6a4d
KLC		 2318 j++;
2319
35c08157 2320 if (i == j)
1c8f6a4d 2321 continue; /* i is in order. */
35c08157
KLC		 2322
2323 memcpy (tmp, ptr + i * size, size);
2324 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2325 memcpy (ptr + j * size, tmp, size);
2326 }
e1fa0163 2327 free (tmp);
35c08157
KLC		 2328}
2329
2330/* Sort relocation by r_offset.
2331
2332 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2333 algorithm. Relocations at the same r_offset must keep their order.
2334 For example, RELAX_ENTRY must be the very first relocation entry.
2335
2336 Currently, this function implements insertion-sort.
2337
2338 FIXME: If we already sort them in assembler, why bother sort them
2339 here again? */
2340
2341static int
2342compar_reloc (const void *lhs, const void *rhs)
2343{
2344 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2345 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2346
2347 if (l->r_offset > r->r_offset)
2348 return 1;
2349 else if (l->r_offset == r->r_offset)
2350 return 0;
2351 else
2352 return -1;
2353}
2354
2355/* Functions listed below are only used for old relocs.
2356 * nds32_elf_9_pcrel_reloc
2357 * nds32_elf_do_9_pcrel_reloc
2358 * nds32_elf_hi20_reloc
2359 * nds32_elf_relocate_hi20
2360 * nds32_elf_lo12_reloc
2361 * nds32_elf_sda15_reloc
2362 * nds32_elf_generic_reloc
2363 */
2364
2365/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2366
2367static bfd_reloc_status_type
2368nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2369 void *data, asection *input_section, bfd *output_bfd,
2370 char **error_message ATTRIBUTE_UNUSED)
2371{
2372 /* This part is from bfd_elf_generic_reloc. */
2373 if (output_bfd != (bfd *) NULL
2374 && (symbol->flags & BSF_SECTION_SYM) == 0
2375 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2376 {
2377 reloc_entry->address += input_section->output_offset;
2378 return bfd_reloc_ok;
2379 }
2380
2381 if (output_bfd != NULL)
2382 {
2383 /* FIXME: See bfd_perform_relocation. Is this right? */
2384 return bfd_reloc_continue;
2385 }
2386
2387 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2388 input_section,
2389 data, reloc_entry->address,
2390 symbol->section,
2391 (symbol->value
2392 + symbol->section->output_section->vma
2393 + symbol->section->output_offset),
2394 reloc_entry->addend);
2395}
2396
2397/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2398#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2399
2400static bfd_reloc_status_type
2401nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2402 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2403 bfd_vma offset,
2404 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2405 bfd_vma symbol_value, bfd_vma addend)
2406{
2407 bfd_signed_vma relocation;
2408 unsigned short x;
2409 bfd_reloc_status_type status;
2410
2411 /* Sanity check the address (offset in section). */
2412 if (offset > bfd_get_section_limit (abfd, input_section))
2413 return bfd_reloc_outofrange;
2414
2415 relocation = symbol_value + addend;
2416 /* Make it pc relative. */
2417 relocation -= (input_section->output_section->vma
2418 + input_section->output_offset);
2419 /* These jumps mask off the lower two bits of the current address
2420 before doing pcrel calculations. */
2421 relocation -= (offset & -(bfd_vma) 2);
2422
1c8f6a4d 2423 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2424 status = bfd_reloc_overflow;
2425 else
2426 status = bfd_reloc_ok;
2427
2428 x = bfd_getb16 (data + offset);
2429
2430 relocation >>= howto->rightshift;
2431 relocation <<= howto->bitpos;
2432 x = (x & ~howto->dst_mask)
2433 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2434
2435 bfd_putb16 ((bfd_vma) x, data + offset);
2436
2437 return status;
2438}
2439
2440/* Handle the R_NDS32_HI20_[SU]LO relocs.
2441 HI20_SLO is for the add3 and load/store with displacement instructions.
2442 HI20 is for the or3 instruction.
2443 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2444 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2445 we must add one to the high 16 bytes (which will get subtracted off when
2446 the low 16 bits are added).
2447 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2448 because there is a carry from the LO12 to the HI20. Here we just save
2449 the information we need; we do the actual relocation when we see the LO12.
2450 This code is copied from the elf32-mips.c. We also support an arbitrary
2451 number of HI20 relocs to be associated with a single LO12 reloc. The
2452 assembler sorts the relocs to ensure each HI20 immediately precedes its
2453 LO12. However if there are multiple copies, the assembler may not find
2454 the real LO12 so it picks the first one it finds. */
2455
2456struct nds32_hi20
2457{
2458 struct nds32_hi20 *next;
2459 bfd_byte *addr;
2460 bfd_vma addend;
2461};
2462
2463static struct nds32_hi20 *nds32_hi20_list;
2464
2465static bfd_reloc_status_type
2466nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2467 asymbol *symbol, void *data, asection *input_section,
2468 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2469{
2470 bfd_reloc_status_type ret;
2471 bfd_vma relocation;
2472 struct nds32_hi20 *n;
2473
2474 /* This part is from bfd_elf_generic_reloc.
2475 If we're relocating, and this an external symbol, we don't want
2476 to change anything. */
2477 if (output_bfd != (bfd *) NULL
2478 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2479 {
2480 reloc_entry->address += input_section->output_offset;
2481 return bfd_reloc_ok;
2482 }
2483
2484 /* Sanity check the address (offset in section). */
2485 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2486 return bfd_reloc_outofrange;
2487
2488 ret = bfd_reloc_ok;
2489 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2490 ret = bfd_reloc_undefined;
2491
2492 if (bfd_is_com_section (symbol->section))
2493 relocation = 0;
2494 else
2495 relocation = symbol->value;
2496
2497 relocation += symbol->section->output_section->vma;
2498 relocation += symbol->section->output_offset;
2499 relocation += reloc_entry->addend;
2500
2501 /* Save the information, and let LO12 do the actual relocation. */
2502 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2503 if (n == NULL)
2504 return bfd_reloc_outofrange;
2505
2506 n->addr = (bfd_byte *) data + reloc_entry->address;
2507 n->addend = relocation;
2508 n->next = nds32_hi20_list;
2509 nds32_hi20_list = n;
2510
2511 if (output_bfd != (bfd *) NULL)
2512 reloc_entry->address += input_section->output_offset;
2513
2514 return ret;
2515}
2516
2517/* Handle an NDS32 ELF HI20 reloc. */
2518
2519static void
2520nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2521 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2522 Elf_Internal_Rela *rello, bfd_byte *contents,
2523 bfd_vma addend)
2524{
2525 unsigned long insn;
2526 bfd_vma addlo;
2527
2528 insn = bfd_getb32 (contents + relhi->r_offset);
2529
2530 addlo = bfd_getb32 (contents + rello->r_offset);
2531 addlo &= 0xfff;
2532
2533 addend += ((insn & 0xfffff) << 20) + addlo;
2534
2535 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2536 bfd_putb32 (insn, contents + relhi->r_offset);
2537}
2538
2539/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2540 inplace relocation; this function exists in order to do the
2541 R_NDS32_HI20_[SU]LO relocation described above. */
2542
2543static bfd_reloc_status_type
2544nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2545 void *data, asection *input_section, bfd *output_bfd,
2546 char **error_message)
2547{
2548 /* This part is from bfd_elf_generic_reloc.
2549 If we're relocating, and this an external symbol, we don't want
2550 to change anything. */
2551 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2552 && reloc_entry->addend == 0)
2553 {
2554 reloc_entry->address += input_section->output_offset;
2555 return bfd_reloc_ok;
2556 }
2557
2558 if (nds32_hi20_list != NULL)
2559 {
2560 struct nds32_hi20 *l;
2561
2562 l = nds32_hi20_list;
2563 while (l != NULL)
2564 {
2565 unsigned long insn;
2566 unsigned long val;
2567 unsigned long vallo;
2568 struct nds32_hi20 *next;
2569
2570 /* Do the HI20 relocation. Note that we actually don't need
2571 to know anything about the LO12 itself, except where to
2572 find the low 12 bits of the addend needed by the LO12. */
2573 insn = bfd_getb32 (l->addr);
2574 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2575 vallo &= 0xfff;
2576 switch (reloc_entry->howto->type)
2577 {
2578 case R_NDS32_LO12S3:
2579 vallo <<= 3;
2580 break;
2581
2582 case R_NDS32_LO12S2:
2583 vallo <<= 2;
2584 break;
2585
2586 case R_NDS32_LO12S1:
2587 vallo <<= 1;
2588 break;
2589
2590 case R_NDS32_LO12S0:
2591 vallo <<= 0;
2592 break;
2593 }
2594
2595 val = ((insn & 0xfffff) << 12) + vallo;
2596 val += l->addend;
2597
2598 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2599 bfd_putb32 ((bfd_vma) insn, l->addr);
2600
2601 next = l->next;
2602 free (l);
2603 l = next;
2604 }
2605
2606 nds32_hi20_list = NULL;
2607 }
2608
2609 /* Now do the LO12 reloc in the usual way.
2610 ??? It would be nice to call bfd_elf_generic_reloc here,
2611 but we have partial_inplace set. bfd_elf_generic_reloc will
2612 pass the handling back to bfd_install_relocation which will install
2613 a section relative addend which is wrong. */
2614 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2615 input_section, output_bfd, error_message);
2616}
2617
2618/* Do generic partial_inplace relocation.
2619 This is a local replacement for bfd_elf_generic_reloc. */
2620
2621static bfd_reloc_status_type
2622nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2623 asymbol *symbol, void *data, asection *input_section,
2624 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2625{
2626 bfd_reloc_status_type ret;
2627 bfd_vma relocation;
2628 bfd_byte *inplace_address;
2629
2630 /* This part is from bfd_elf_generic_reloc.
2631 If we're relocating, and this an external symbol, we don't want
2632 to change anything. */
2633 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2634 && reloc_entry->addend == 0)
2635 {
2636 reloc_entry->address += input_section->output_offset;
2637 return bfd_reloc_ok;
2638 }
2639
2640 /* Now do the reloc in the usual way.
2641 ??? It would be nice to call bfd_elf_generic_reloc here,
2642 but we have partial_inplace set. bfd_elf_generic_reloc will
2643 pass the handling back to bfd_install_relocation which will install
2644 a section relative addend which is wrong. */
2645
2646 /* Sanity check the address (offset in section). */
2647 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2648 return bfd_reloc_outofrange;
2649
2650 ret = bfd_reloc_ok;
2651 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2652 ret = bfd_reloc_undefined;
2653
2654 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2655 relocation = 0;
2656 else
2657 relocation = symbol->value;
2658
2659 /* Only do this for a final link. */
2660 if (output_bfd == (bfd *) NULL)
2661 {
2662 relocation += symbol->section->output_section->vma;
2663 relocation += symbol->section->output_offset;
2664 }
2665
2666 relocation += reloc_entry->addend;
2667 switch (reloc_entry->howto->type)
2668 {
2669 case R_NDS32_LO12S3:
2670 relocation >>= 3;
2671 break;
2672
2673 case R_NDS32_LO12S2:
2674 relocation >>= 2;
2675 break;
2676
2677 case R_NDS32_LO12S1:
2678 relocation >>= 1;
2679 break;
2680
2681 case R_NDS32_LO12S0:
2682 default:
2683 relocation >>= 0;
2684 break;
2685 }
2686
2687 inplace_address = (bfd_byte *) data + reloc_entry->address;
2688
2689#define DOIT(x) \
2690 x = ((x & ~reloc_entry->howto->dst_mask) | \
2691 (((x & reloc_entry->howto->src_mask) + relocation) & \
2692 reloc_entry->howto->dst_mask))
2693
2694 switch (reloc_entry->howto->size)
2695 {
2696 case 1:
2697 {
2698 short x = bfd_getb16 (inplace_address);
2699
2700 DOIT (x);
2701 bfd_putb16 ((bfd_vma) x, inplace_address);
2702 }
2703 break;
2704 case 2:
2705 {
2706 unsigned long x = bfd_getb32 (inplace_address);
2707
2708 DOIT (x);
2709 bfd_putb32 ((bfd_vma) x, inplace_address);
2710 }
2711 break;
2712 default:
2713 BFD_ASSERT (0);
2714 }
2715
2716 if (output_bfd != (bfd *) NULL)
2717 reloc_entry->address += input_section->output_offset;
2718
2719 return ret;
2720}
2721
2722/* Handle the R_NDS32_SDA15 reloc.
2723 This reloc is used to compute the address of objects in the small data area
2724 and to perform loads and stores from that area.
2725 The lower 15 bits are sign extended and added to the register specified
2726 in the instruction, which is assumed to point to _SDA_BASE_.
2727
2728 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2729 the access size, this must be taken care of. */
2730
2731static bfd_reloc_status_type
2732nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2733 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2734 asection *input_section, bfd *output_bfd,
2735 char **error_message ATTRIBUTE_UNUSED)
2736{
2737 /* This part is from bfd_elf_generic_reloc. */
2738 if (output_bfd != (bfd *) NULL
2739 && (symbol->flags & BSF_SECTION_SYM) == 0
2740 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2741 {
2742 reloc_entry->address += input_section->output_offset;
2743 return bfd_reloc_ok;
2744 }
2745
2746 if (output_bfd != NULL)
2747 {
2748 /* FIXME: See bfd_perform_relocation. Is this right? */
2749 return bfd_reloc_continue;
2750 }
2751
2752 /* FIXME: not sure what to do here yet. But then again, the linker
2753 may never call us. */
2754 abort ();
2755}
2756
2757/* nds32_elf_ignore_reloc is the special function for
2758 relocation types which don't need to be relocated
2759 like relaxation relocation types.
2760 This function simply return bfd_reloc_ok when it is
2761 invoked. */
2762
2763static bfd_reloc_status_type
2764nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2765 asymbol *symbol ATTRIBUTE_UNUSED,
2766 void *data ATTRIBUTE_UNUSED, asection *input_section,
2767 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2768{
2769 if (output_bfd != NULL)
2770 reloc_entry->address += input_section->output_offset;
2771
2772 return bfd_reloc_ok;
2773}
2774\f
2775
2776/* Map BFD reloc types to NDS32 ELF reloc types. */
2777
2778struct nds32_reloc_map_entry
2779{
2780 bfd_reloc_code_real_type bfd_reloc_val;
2781 unsigned char elf_reloc_val;
2782};
2783
2784static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2785{
2786 {BFD_RELOC_NONE, R_NDS32_NONE},
2787 {BFD_RELOC_16, R_NDS32_16_RELA},
2788 {BFD_RELOC_32, R_NDS32_32_RELA},
2789 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2790 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2791 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2792 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2793 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2794 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2795 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2796 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2797 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2798 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2799 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2800 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2801 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2802 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2803 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2804 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2805 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2806 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2807 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2808 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2809
2810 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2811 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2812 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2813 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2814 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2815 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2816 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2817 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2818 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2819 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2820 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2821 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2822 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2823 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2824 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2825 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2826 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2827 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2828 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2829 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2830 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2831 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2832 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2833 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2834 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2835 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2836 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2837 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2838 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2839 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2840 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2841 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2842 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2843 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2844 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2845 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2846 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2847 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2848 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2849 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2850 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2856 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2857 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2858 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2859 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2860 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2861 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2862 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2863 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2864 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2867 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2868 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2869 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2870 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2871 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2872 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2873 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2874 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2875 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2876 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2877 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2878 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2879 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2880 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2881 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2882 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2883 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2884 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2885
2886 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2887 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2888 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2889 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2890 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2891 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2892 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2893 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2894 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2895 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2896 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2897 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2898 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2899 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2900 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2901 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2902 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2903 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2904 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2905 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2906};
2907
2908/* Patch tag. */
2909
2910static reloc_howto_type *
2911bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2912 const char *r_name)
2913{
2914 unsigned int i;
2915
2916 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2917 if (nds32_elf_howto_table[i].name != NULL
2918 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2919 return &nds32_elf_howto_table[i];
2920
2921 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2922 if (nds32_elf_relax_howto_table[i].name != NULL
2923 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2924 return &nds32_elf_relax_howto_table[i];
2925
2926 return NULL;
2927}
2928
2929static reloc_howto_type *
2930bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2931{
2932 if (code < R_NDS32_RELAX_ENTRY)
2933 {
2934 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2935 return &nds32_elf_howto_table[code];
2936 }
2937 else
2938 {
2939 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2940 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2941 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2942 }
2943}
2944
2945static reloc_howto_type *
2946bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2947 bfd_reloc_code_real_type code)
2948{
2949 unsigned int i;
2950
2951 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2952 {
2953 if (nds32_reloc_map[i].bfd_reloc_val == code)
2954 return bfd_elf32_bfd_reloc_type_table_lookup
2955 (nds32_reloc_map[i].elf_reloc_val);
2956 }
2957
2958 return NULL;
2959}
2960
2961/* Set the howto pointer for an NDS32 ELF reloc. */
2962
2963static void
2964nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2965 Elf_Internal_Rela *dst)
2966{
2967 enum elf_nds32_reloc_type r_type;
2968
2969 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2970 if (r_type > R_NDS32_GNU_VTENTRY)
2971 {
64d29018 2972 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
5860e3f8
NC		 2973 r_type = 0;
2974 }
35c08157
KLC		 2975 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2976}
2977
2978static void
2979nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2980 Elf_Internal_Rela *dst)
2981{
2982 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2983 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2984 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2985 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2986}
2987
2988/* Support for core dump NOTE sections.
2989 Reference to include/linux/elfcore.h in Linux. */
2990
2991static bfd_boolean
2992nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2993{
2994 int offset;
2995 size_t size;
2996
2997 switch (note->descsz)
2998 {
2999 case 0x114:
3000 /* Linux/NDS32 32-bit, ABI1 */
3001
3002 /* pr_cursig */
3003 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3004
3005 /* pr_pid */
3006 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3007
3008 /* pr_reg */
3009 offset = 72;
3010 size = 200;
3011 break;
3012
3013 case 0xfc:
3014 /* Linux/NDS32 32-bit */
3015
3016 /* pr_cursig */
3017 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3018
3019 /* pr_pid */
3020 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3021
3022 /* pr_reg */
3023 offset = 72;
3024 size = 176;
3025 break;
3026
3027 default:
3028 return FALSE;
3029 }
3030
3031 /* Make a ".reg" section. */
3032 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3033 size, note->descpos + offset);
3034}
3035
3036static bfd_boolean
3037nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3038{
3039 switch (note->descsz)
3040 {
3041 case 124:
3042 /* Linux/NDS32 */
3043
3044 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3045 elf_tdata (abfd)->core->program =
3046 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3047 elf_tdata (abfd)->core->command =
3048 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3049
3050 default:
3051 return FALSE;
3052 }
3053
3054 /* Note that for some reason, a spurious space is tacked
3055 onto the end of the args in some (at least one anyway)
3056 implementations, so strip it off if it exists. */
3057 {
3058 char *command = elf_tdata (abfd)->core->command;
3059 int n = strlen (command);
3060
3061 if (0 < n && command[n - 1] == ' ')
3062 command[n - 1] = '\0';
3063 }
3064
3065 return TRUE;
3066}
3067
3068/* Hook called by the linker routine which adds symbols from an object
3069 file. We must handle the special NDS32 section numbers here.
3070 We also keep watching for whether we need to create the sdata special
3071 linker sections. */
3072
3073static bfd_boolean
3074nds32_elf_add_symbol_hook (bfd *abfd,
3075 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3076 Elf_Internal_Sym *sym,
3077 const char **namep ATTRIBUTE_UNUSED,
3078 flagword *flagsp ATTRIBUTE_UNUSED,
3079 asection **secp, bfd_vma *valp)
3080{
3081 switch (sym->st_shndx)
3082 {
3083 case SHN_COMMON:
3084 /* Common symbols less than the GP size are automatically
3085 treated as SHN_MIPS_SCOMMON symbols. */
3086 if (sym->st_size > elf_gp_size (abfd)
3087 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3088 break;
3089
3090 /* st_value is the alignemnt constraint.
3091 That might be its actual size if it is an array or structure. */
3092 switch (sym->st_value)
3093 {
3094 case 1:
3095 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3096 break;
3097 case 2:
3098 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3099 break;
3100 case 4:
3101 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3102 break;
3103 case 8:
3104 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3105 break;
3106 default:
3107 return TRUE;
3108 }
3109
3110 (*secp)->flags |= SEC_IS_COMMON;
3111 *valp = sym->st_size;
3112 break;
3113 }
3114
3115 return TRUE;
3116}
3117
3118
3119/* This function can figure out the best location for a base register to access
3120 data relative to this base register
3121 INPUT:
3122 sda_d0: size of first DOUBLE WORD data section
3123 sda_w0: size of first WORD data section
3124 sda_h0: size of first HALF WORD data section
3125 sda_b : size of BYTE data section
3126 sda_hi: size of second HALF WORD data section
3127 sda_w1: size of second WORD data section
3128 sda_d1: size of second DOUBLE WORD data section
3129 OUTPUT:
3130 offset (always positive) from the beginning of sda_d0 if OK
3131 a negative error value if fail
3132 NOTE:
3133 these 7 sections have to be located back to back if exist
3134 a pass in 0 value for non-existing section */
3135
3136/* Due to the interpretation of simm15 field of load/store depending on
3137 data accessing size, the organization of base register relative data shall
3138 like the following figure
3139 -------------------------------------------
3140 | DOUBLE WORD sized data (range +/- 128K)
3141 -------------------------------------------
3142 | WORD sized data (range +/- 64K)
3143 -------------------------------------------
3144 | HALF WORD sized data (range +/- 32K)
3145 -------------------------------------------
3146 | BYTE sized data (range +/- 16K)
3147 -------------------------------------------
3148 | HALF WORD sized data (range +/- 32K)
3149 -------------------------------------------
3150 | WORD sized data (range +/- 64K)
3151 -------------------------------------------
3152 | DOUBLE WORD sized data (range +/- 128K)
3153 -------------------------------------------
3154 Its base register shall be set to access these data freely. */
3155
3156/* We have to figure out the SDA_BASE value, so that we can adjust the
3157 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3158 BFD. If we can't find it, we're stuck. We cache it in the ELF
3159 target data. We don't need to adjust the symbol value for an
3160 external symbol if we are producing relocatable output. */
3161
3162static asection *sda_rela_sec = NULL;
3163
1c8f6a4d 3164#define SDA_SECTION_NUM 10
35c08157
KLC		 3165
3166static bfd_reloc_status_type
3167nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3168 bfd_vma *psb, bfd_boolean add_symbol)
3169{
3170 int relax_fp_as_gp;
3171 struct elf_nds32_link_hash_table *table;
3172 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3173 long unsigned int total = 0;
35c08157
KLC		 3174
3175 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3176 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3177 {
3178 asection *first = NULL, *final = NULL, *temp;
3179 bfd_vma sda_base;
3180 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3181 4 byte-aligned. Therefore, it has to set the first section ".data"
3182 4 byte-aligned. */
3183 static const char sec_name[SDA_SECTION_NUM][10] =
3184 {
3185 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3186 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3187 };
3188 size_t i = 0;
3189
3190 if (output_bfd->sections == NULL)
3191 {
3192 *psb = elf_gp (output_bfd);
3193 return bfd_reloc_ok;
3194 }
3195
3196 /* Get the first and final section. */
1c8f6a4d 3197 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3198 {
3199 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3200 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3201 first = temp;
3202 if (temp && (temp->size != 0 || temp->rawsize != 0))
3203 final = temp;
1c8f6a4d
KLC		 3204
3205 /* Summarize the sections in order to check if joining .bss. */
3206 if (temp && temp->size != 0)
3207 total += temp->size;
3208 else if (temp && temp->rawsize != 0)
3209 total += temp->rawsize;
3210
35c08157
KLC		 3211 i++;
3212 }
3213
1c8f6a4d
KLC		 3214 /* Check .bss size. */
3215 temp = bfd_get_section_by_name (output_bfd, ".bss");
3216 if (temp)
3217 {
3218 if (temp->size != 0)
3219 total += temp->size;
3220 else if (temp->rawsize != 0)
3221 total += temp->rawsize;
3222
3223 if (total < 0x80000)
3224 {
3225 if (!first && (temp->size != 0 || temp->rawsize != 0))
3226 first = temp;
3227 if ((temp->size != 0 || temp->rawsize != 0))
3228 final = temp;
3229 }
3230 }
3231
35c08157
KLC		 3232 if (first && final)
3233 {
3234 /* The middle of data region. */
1c8f6a4d 3235 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3236
3237 /* Find the section sda_base located. */
3238 i = 0;
1c8f6a4d 3239 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3240 {
3241 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3242 if (final && (final->size != 0 || final->rawsize != 0)
3243 && sda_base >= final->vma)
3244 {
3245 first = final;
3246 i++;
3247 }
3248 else
3249 break;
3250 }
3251 }
3252 else
3253 {
3254 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3255 first output section. */
3256 first = output_bfd->sections;
3257 while (first && first->size == 0 && first->rawsize == 0)
3258 first = first->next;
3259 if (!first)
3260 {
3261 *psb = elf_gp (output_bfd);
3262 return bfd_reloc_ok;
3263 }
1c8f6a4d 3264 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3265 }
3266
3267 sda_base -= first->vma;
3268 sda_base = sda_base & (~7);
3269
3270 if (!_bfd_generic_link_add_one_symbol
3271 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3272 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3273 get_elf_backend_data (output_bfd)->collect, &h))
3274 return FALSE;
3275
3276 sda_rela_sec = first;
3277
3278 table = nds32_elf_hash_table (info);
3279 relax_fp_as_gp = table->relax_fp_as_gp;
3280 if (relax_fp_as_gp)
3281 {
3282 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3283 FALSE, FALSE, FALSE);
3284 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3285 And set FP equal to SDA_BASE to do relaxation for
3286 la $fp, _FP_BASE_. */
3287 if (!_bfd_generic_link_add_one_symbol
3288 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3289 first, (bfd_vma) sda_base, (const char *) NULL,
3290 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3291 return FALSE;
3292 }
3293 }
3294
3295 if (add_symbol == TRUE)
3296 {
3297 if (h)
3298 {
3299 /* Now set gp. */
3300 elf_gp (output_bfd) = (h->u.def.value
3301 + h->u.def.section->output_section->vma
3302 + h->u.def.section->output_offset);
3303 }
3304 else
3305 {
3306 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3307 return bfd_reloc_dangerous;
3308 }
3309 }
3310
3311 *psb = h->u.def.value + h->u.def.section->output_section->vma
3312 + h->u.def.section->output_offset;
3313 return bfd_reloc_ok;
3314}
3315\f
3316
3317/* Return size of a PLT entry. */
3318#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3319
3320
3321/* Create an entry in an nds32 ELF linker hash table. */
3322
3323static struct bfd_hash_entry *
3324nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3325 struct bfd_hash_table *table,
3326 const char *string)
3327{
3328 struct elf_nds32_link_hash_entry *ret;
3329
3330 ret = (struct elf_nds32_link_hash_entry *) entry;
3331
3332 /* Allocate the structure if it has not already been allocated by a
3333 subclass. */
3334 if (ret == NULL)
3335 ret = (struct elf_nds32_link_hash_entry *)
3336 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3337
3338 if (ret == NULL)
3339 return (struct bfd_hash_entry *) ret;
3340
3341 /* Call the allocation method of the superclass. */
3342 ret = (struct elf_nds32_link_hash_entry *)
3343 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3344
3345 if (ret != NULL)
3346 {
3347 struct elf_nds32_link_hash_entry *eh;
3348
3349 eh = (struct elf_nds32_link_hash_entry *) ret;
3350 eh->dyn_relocs = NULL;
1c8f6a4d 3351 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3352 }
3353
3354 return (struct bfd_hash_entry *) ret;
3355}
3356
3357/* Create an nds32 ELF linker hash table. */
3358
3359static struct bfd_link_hash_table *
3360nds32_elf_link_hash_table_create (bfd *abfd)
3361{
3362 struct elf_nds32_link_hash_table *ret;
3363
3364 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3365
3366 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3367 if (ret == NULL)
3368 return NULL;
3369
3370 /* patch tag. */
3371 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3372 nds32_elf_link_hash_newfunc,
3373 sizeof (struct elf_nds32_link_hash_entry),
3374 NDS32_ELF_DATA))
3375 {
3376 free (ret);
3377 return NULL;
3378 }
3379
3380 ret->sgot = NULL;
3381 ret->sgotplt = NULL;
3382 ret->srelgot = NULL;
3383 ret->splt = NULL;
3384 ret->srelplt = NULL;
3385 ret->sdynbss = NULL;
3386 ret->srelbss = NULL;
3387 ret->sym_ld_script = NULL;
3388 ret->ex9_export_file = NULL;
3389 ret->ex9_import_file = NULL;
3390
3391 return &ret->root.root;
3392}
3393
3394/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3395 shortcuts to them in our hash table. */
3396
3397static bfd_boolean
3398create_got_section (bfd *dynobj, struct bfd_link_info *info)
3399{
3400 struct elf_nds32_link_hash_table *htab;
3401
3402 if (!_bfd_elf_create_got_section (dynobj, info))
3403 return FALSE;
3404
3405 htab = nds32_elf_hash_table (info);
3406 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3407 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3408 if (!htab->sgot || !htab->sgotplt)
3409 abort ();
3410
3411 /* _bfd_elf_create_got_section will create it for us. */
3412 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3413 if (htab->srelgot == NULL
3414 || !bfd_set_section_flags (dynobj, htab->srelgot,
3415 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3416 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3417 | SEC_READONLY))
3418 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3419 return FALSE;
3420
3421 return TRUE;
3422}
3423
3424/* Create dynamic sections when linking against a dynamic object. */
3425
3426static bfd_boolean
3427nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3428{
3429 struct elf_nds32_link_hash_table *htab;
3430 flagword flags, pltflags;
3431 register asection *s;
3432 const struct elf_backend_data *bed;
3433 int ptralign = 2; /* 32-bit */
3434
3435 bed = get_elf_backend_data (abfd);
3436
3437 htab = nds32_elf_hash_table (info);
3438
3439 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3440 .rel[a].bss sections. */
3441
3442 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3443 | SEC_LINKER_CREATED);
3444
3445 pltflags = flags;
3446 pltflags |= SEC_CODE;
3447 if (bed->plt_not_loaded)
3448 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3449 if (bed->plt_readonly)
3450 pltflags |= SEC_READONLY;
3451
3452 s = bfd_make_section (abfd, ".plt");
3453 htab->splt = s;
3454 if (s == NULL
3455 || !bfd_set_section_flags (abfd, s, pltflags)
3456 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3457 return FALSE;
3458
3459 if (bed->want_plt_sym)
3460 {
3461 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3462 .plt section. */
3463 struct bfd_link_hash_entry *bh = NULL;
3464 struct elf_link_hash_entry *h;
3465
3466 if (!(_bfd_generic_link_add_one_symbol
3467 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3468 (bfd_vma) 0, (const char *) NULL, FALSE,
3469 get_elf_backend_data (abfd)->collect, &bh)))
3470 return FALSE;
3471
3472 h = (struct elf_link_hash_entry *) bh;
3473 h->def_regular = 1;
3474 h->type = STT_OBJECT;
3475
0e1862bb 3476 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC		 3477 return FALSE;
3478 }
3479
3480 s = bfd_make_section (abfd,
3481 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3482 htab->srelplt = s;
3483 if (s == NULL
3484 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3485 || !bfd_set_section_alignment (abfd, s, ptralign))
3486 return FALSE;
3487
3488 if (htab->sgot == NULL && !create_got_section (abfd, info))
3489 return FALSE;
3490
3491 {
3492 const char *secname;
3493 char *relname;
3494 flagword secflags;
3495 asection *sec;
3496
3497 for (sec = abfd->sections; sec; sec = sec->next)
3498 {
3499 secflags = bfd_get_section_flags (abfd, sec);
3500 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3501 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3502 continue;
3503 secname = bfd_get_section_name (abfd, sec);
3504 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3505 strcpy (relname, ".rela");
3506 strcat (relname, secname);
3507 if (bfd_get_section_by_name (abfd, secname))
3508 continue;
3509 s = bfd_make_section (abfd, relname);
3510 if (s == NULL
3511 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3512 || !bfd_set_section_alignment (abfd, s, ptralign))
3513 return FALSE;
3514 }
3515 }
3516
3517 if (bed->want_dynbss)
3518 {
3519 /* The .dynbss section is a place to put symbols which are defined
3520 by dynamic objects, are referenced by regular objects, and are
3521 not functions. We must allocate space for them in the process
3522 image and use a R_*_COPY reloc to tell the dynamic linker to
3523 initialize them at run time. The linker script puts the .dynbss
3524 section into the .bss section of the final image. */
3525 s = bfd_make_section (abfd, ".dynbss");
3526 htab->sdynbss = s;
3527 if (s == NULL
3528 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3529 return FALSE;
3530 /* The .rel[a].bss section holds copy relocs. This section is not
3531 normally needed. We need to create it here, though, so that the
3532 linker will map it to an output section. We can't just create it
3533 only if we need it, because we will not know whether we need it
3534 until we have seen all the input files, and the first time the
3535 main linker code calls BFD after examining all the input files
3536 (size_dynamic_sections) the input sections have already been
3537 mapped to the output sections. If the section turns out not to
3538 be needed, we can discard it later. We will never need this
3539 section when generating a shared object, since they do not use
3540 copy relocs. */
0e1862bb 3541 if (!bfd_link_pic (info))
35c08157
KLC		 3542 {
3543 s = bfd_make_section (abfd, (bed->default_use_rela_p
3544 ? ".rela.bss" : ".rel.bss"));
3545 htab->srelbss = s;
3546 if (s == NULL
3547 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3548 || !bfd_set_section_alignment (abfd, s, ptralign))
3549 return FALSE;
3550 }
3551 }
3552
3553 return TRUE;
3554}
3555
3556/* Copy the extra info we tack onto an elf_link_hash_entry. */
3557static void
3558nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3559 struct elf_link_hash_entry *dir,
3560 struct elf_link_hash_entry *ind)
3561{
3562 struct elf_nds32_link_hash_entry *edir, *eind;
3563
3564 edir = (struct elf_nds32_link_hash_entry *) dir;
3565 eind = (struct elf_nds32_link_hash_entry *) ind;
3566
3567 if (eind->dyn_relocs != NULL)
3568 {
3569 if (edir->dyn_relocs != NULL)
3570 {
3571 struct elf_nds32_dyn_relocs **pp;
3572 struct elf_nds32_dyn_relocs *p;
3573
3574 if (ind->root.type == bfd_link_hash_indirect)
3575 abort ();
3576
3577 /* Add reloc counts against the weak sym to the strong sym
3578 list. Merge any entries against the same section. */
3579 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3580 {
3581 struct elf_nds32_dyn_relocs *q;
3582
3583 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3584 if (q->sec == p->sec)
3585 {
3586 q->pc_count += p->pc_count;
3587 q->count += p->count;
3588 *pp = p->next;
3589 break;
3590 }
3591 if (q == NULL)
3592 pp = &p->next;
3593 }
3594 *pp = edir->dyn_relocs;
3595 }
3596
3597 edir->dyn_relocs = eind->dyn_relocs;
3598 eind->dyn_relocs = NULL;
3599 }
3600
3601 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3602}
3603\f
3604
3605/* Adjust a symbol defined by a dynamic object and referenced by a
3606 regular object. The current definition is in some section of the
3607 dynamic object, but we're not including those sections. We have to
3608 change the definition to something the rest of the link can
3609 understand. */
3610
3611static bfd_boolean
3612nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3613 struct elf_link_hash_entry *h)
3614{
3615 struct elf_nds32_link_hash_table *htab;
3616 struct elf_nds32_link_hash_entry *eh;
3617 struct elf_nds32_dyn_relocs *p;
3618 bfd *dynobj;
3619 asection *s;
3620 unsigned int power_of_two;
3621
3622 dynobj = elf_hash_table (info)->dynobj;
3623
3624 /* Make sure we know what is going on here. */
3625 BFD_ASSERT (dynobj != NULL
3626 && (h->needs_plt
3627 || h->u.weakdef != NULL
3628 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3629
3630
3631 /* If this is a function, put it in the procedure linkage table. We
3632 will fill in the contents of the procedure linkage table later,
3633 when we know the address of the .got section. */
3634 if (h->type == STT_FUNC || h->needs_plt)
3635 {
0e1862bb 3636 if (!bfd_link_pic (info)
35c08157
KLC		 3637 && !h->def_dynamic
3638 && !h->ref_dynamic
3639 && h->root.type != bfd_link_hash_undefweak
3640 && h->root.type != bfd_link_hash_undefined)
3641 {
3642 /* This case can occur if we saw a PLT reloc in an input
3643 file, but the symbol was never referred to by a dynamic
3644 object. In such a case, we don't actually need to build
3645 a procedure linkage table, and we can just do a PCREL
3646 reloc instead. */
3647 h->plt.offset = (bfd_vma) - 1;
3648 h->needs_plt = 0;
3649 }
3650
3651 return TRUE;
3652 }
3653 else
3654 h->plt.offset = (bfd_vma) - 1;
3655
3656 /* If this is a weak symbol, and there is a real definition, the
3657 processor independent code will have arranged for us to see the
3658 real definition first, and we can just use the same value. */
3659 if (h->u.weakdef != NULL)
3660 {
3661 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3662 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3663 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3664 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3665 return TRUE;
3666 }
3667
3668 /* This is a reference to a symbol defined by a dynamic object which
3669 is not a function. */
3670
3671 /* If we are creating a shared library, we must presume that the
3672 only references to the symbol are via the global offset table.
3673 For such cases we need not do anything here; the relocations will
3674 be handled correctly by relocate_section. */
0e1862bb 3675 if (bfd_link_pic (info))
35c08157
KLC		 3676 return TRUE;
3677
3678 /* If there are no references to this symbol that do not use the
3679 GOT, we don't need to generate a copy reloc. */
3680 if (!h->non_got_ref)
3681 return TRUE;
3682
3683 /* If -z nocopyreloc was given, we won't generate them either. */
3684 if (info->nocopyreloc)
3685 {
3686 h->non_got_ref = 0;
3687 return TRUE;
3688 }
3689
3690 eh = (struct elf_nds32_link_hash_entry *) h;
3691 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3692 {
3693 s = p->sec->output_section;
3694 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3695 break;
3696 }
3697
3698 /* If we didn't find any dynamic relocs in sections which needs the
3699 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3700 the copy reloc. */
3701 if (p == NULL)
3702 {
3703 h->non_got_ref = 0;
3704 return TRUE;
3705 }
3706
3707 /* We must allocate the symbol in our .dynbss section, which will
3708 become part of the .bss section of the executable. There will be
3709 an entry for this symbol in the .dynsym section. The dynamic
3710 object will contain position independent code, so all references
3711 from the dynamic object to this symbol will go through the global
3712 offset table. The dynamic linker will use the .dynsym entry to
3713 determine the address it must put in the global offset table, so
3714 both the dynamic object and the regular object will refer to the
3715 same memory location for the variable. */
3716
3717 htab = nds32_elf_hash_table (info);
3718 s = htab->sdynbss;
3719 BFD_ASSERT (s != NULL);
3720
3721 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3722 to copy the initial value out of the dynamic object and into the
3723 runtime process image. We need to remember the offset into the
3724 .rela.bss section we are going to use. */
3725 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3726 {
3727 asection *srel;
3728
3729 srel = htab->srelbss;
3730 BFD_ASSERT (srel != NULL);
3731 srel->size += sizeof (Elf32_External_Rela);
3732 h->needs_copy = 1;
3733 }
3734
3735 /* We need to figure out the alignment required for this symbol. I
3736 have no idea how ELF linkers handle this. */
3737 power_of_two = bfd_log2 (h->size);
3738 if (power_of_two > 3)
3739 power_of_two = 3;
3740
3741 /* Apply the required alignment. */
3742 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3743 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3744 {
3745 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3746 return FALSE;
3747 }
3748
3749 /* Define the symbol as being at this point in the section. */
3750 h->root.u.def.section = s;
3751 h->root.u.def.value = s->size;
3752
3753 /* Increment the section size to make room for the symbol. */
3754 s->size += h->size;
3755
3756 return TRUE;
3757}
3758
3759/* Allocate space in .plt, .got and associated reloc sections for
3760 dynamic relocs. */
3761
3762static bfd_boolean
3763allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3764{
3765 struct bfd_link_info *info;
3766 struct elf_nds32_link_hash_table *htab;
3767 struct elf_nds32_link_hash_entry *eh;
3768 struct elf_nds32_dyn_relocs *p;
3769
3770 if (h->root.type == bfd_link_hash_indirect)
3771 return TRUE;
3772
3773 if (h->root.type == bfd_link_hash_warning)
3774 /* When warning symbols are created, they **replace** the "real"
3775 entry in the hash table, thus we never get to see the real
3776 symbol in a hash traversal. So look at it now. */
3777 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3778
3779 info = (struct bfd_link_info *) inf;
3780 htab = nds32_elf_hash_table (info);
3781
3782 eh = (struct elf_nds32_link_hash_entry *) h;
3783
3784 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3785 {
3786 /* Make sure this symbol is output as a dynamic symbol.
3787 Undefined weak syms won't yet be marked as dynamic. */
3788 if (h->dynindx == -1 && !h->forced_local)
3789 {
3790 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3791 return FALSE;
3792 }
3793
0e1862bb 3794 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157
KLC		 3795 {
3796 asection *s = htab->splt;
3797
3798 /* If this is the first .plt entry, make room for the special
3799 first entry. */
3800 if (s->size == 0)
3801 s->size += PLT_ENTRY_SIZE;
3802
3803 h->plt.offset = s->size;
3804
3805 /* If this symbol is not defined in a regular file, and we are
3806 not generating a shared library, then set the symbol to this
3807 location in the .plt. This is required to make function
3808 pointers compare as equal between the normal executable and
3809 the shared library. */
0e1862bb 3810 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 3811 {
3812 h->root.u.def.section = s;
3813 h->root.u.def.value = h->plt.offset;
3814 }
3815
3816 /* Make room for this entry. */
3817 s->size += PLT_ENTRY_SIZE;
3818
3819 /* We also need to make an entry in the .got.plt section, which
3820 will be placed in the .got section by the linker script. */
3821 htab->sgotplt->size += 4;
3822
3823 /* We also need to make an entry in the .rel.plt section. */
3824 htab->srelplt->size += sizeof (Elf32_External_Rela);
3825 }
3826 else
3827 {
3828 h->plt.offset = (bfd_vma) - 1;
3829 h->needs_plt = 0;
3830 }
3831 }
3832 else
3833 {
3834 h->plt.offset = (bfd_vma) - 1;
3835 h->needs_plt = 0;
3836 }
3837
3838 if (h->got.refcount > 0)
3839 {
3840 asection *s;
3841 bfd_boolean dyn;
1c8f6a4d 3842 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3843
3844 /* Make sure this symbol is output as a dynamic symbol.
3845 Undefined weak syms won't yet be marked as dynamic. */
3846 if (h->dynindx == -1 && !h->forced_local)
3847 {
3848 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3849 return FALSE;
3850 }
3851
3852 s = htab->sgot;
35c08157 3853 h->got.offset = s->size;
1c8f6a4d
KLC		 3854
3855 if (tls_type == GOT_UNKNOWN)
3856 abort ();
3857 else if (tls_type == GOT_NORMAL
3858 || tls_type == GOT_TLS_IE)
3859 /* Need a GOT slot. */
3860 s->size += 4;
3861
35c08157 3862 dyn = htab->root.dynamic_sections_created;
0e1862bb 3863 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
35c08157
KLC		 3864 htab->srelgot->size += sizeof (Elf32_External_Rela);
3865 }
3866 else
3867 h->got.offset = (bfd_vma) - 1;
3868
3869 if (eh->dyn_relocs == NULL)
3870 return TRUE;
3871
3872 /* In the shared -Bsymbolic case, discard space allocated for
3873 dynamic pc-relative relocs against symbols which turn out to be
3874 defined in regular objects. For the normal shared case, discard
3875 space for pc-relative relocs that have become local due to symbol
3876 visibility changes. */
3877
0e1862bb 3878 if (bfd_link_pic (info))
35c08157
KLC		 3879 {
3880 if (h->def_regular && (h->forced_local || info->symbolic))
3881 {
3882 struct elf_nds32_dyn_relocs **pp;
3883
3884 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3885 {
3886 p->count -= p->pc_count;
3887 p->pc_count = 0;
3888 if (p->count == 0)
3889 *pp = p->next;
3890 else
3891 pp = &p->next;
3892 }
3893 }
3894 }
3895 else
3896 {
3897 /* For the non-shared case, discard space for relocs against
3898 symbols which turn out to need copy relocs or are not dynamic. */
3899
3900 if (!h->non_got_ref
3901 && ((h->def_dynamic
3902 && !h->def_regular)
3903 || (htab->root.dynamic_sections_created
3904 && (h->root.type == bfd_link_hash_undefweak
3905 || h->root.type == bfd_link_hash_undefined))))
3906 {
3907 /* Make sure this symbol is output as a dynamic symbol.
3908 Undefined weak syms won't yet be marked as dynamic. */
3909 if (h->dynindx == -1 && !h->forced_local)
3910 {
3911 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3912 return FALSE;
3913 }
3914
3915 /* If that succeeded, we know we'll be keeping all the
3916 relocs. */
3917 if (h->dynindx != -1)
3918 goto keep;
3919 }
3920
3921 eh->dyn_relocs = NULL;
3922
3923 keep:;
3924 }
3925
3926 /* Finally, allocate space. */
3927 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3928 {
3929 asection *sreloc = elf_section_data (p->sec)->sreloc;
3930 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3931 }
3932
3933 return TRUE;
3934}
3935
3936/* Find any dynamic relocs that apply to read-only sections. */
3937
3938static bfd_boolean
3939readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3940{
3941 struct elf_nds32_link_hash_entry *eh;
3942 struct elf_nds32_dyn_relocs *p;
3943
3944 if (h->root.type == bfd_link_hash_warning)
3945 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3946
3947 eh = (struct elf_nds32_link_hash_entry *) h;
3948 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3949 {
3950 asection *s = p->sec->output_section;
3951
3952 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3953 {
3954 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3955
3956 info->flags |= DF_TEXTREL;
3957
3958 /* Not an error, just cut short the traversal. */
3959 return FALSE;
3960 }
3961 }
3962 return TRUE;
3963}
3964
3965/* Set the sizes of the dynamic sections. */
3966
3967static bfd_boolean
3968nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3969 struct bfd_link_info *info)
3970{
3971 struct elf_nds32_link_hash_table *htab;
3972 bfd *dynobj;
3973 asection *s;
3974 bfd_boolean relocs;
3975 bfd *ibfd;
3976
3977 htab = nds32_elf_hash_table (info);
3978 dynobj = htab->root.dynobj;
3979 BFD_ASSERT (dynobj != NULL);
3980
3981 if (htab->root.dynamic_sections_created)
3982 {
3983 /* Set the contents of the .interp section to the interpreter. */
9b8b325a 3984 if (!bfd_link_pic (info) && !info->nointerp)
35c08157
KLC		 3985 {
3986 s = bfd_get_section_by_name (dynobj, ".interp");
3987 BFD_ASSERT (s != NULL);
3988 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3989 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3990 }
3991 }
3992
3993 /* Set up .got offsets for local syms, and space for local dynamic
3994 relocs. */
c72f2fb2 3995 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3996 {
3997 bfd_signed_vma *local_got;
3998 bfd_signed_vma *end_local_got;
3999 bfd_size_type locsymcount;
4000 Elf_Internal_Shdr *symtab_hdr;
4001 asection *srel;
4002
4003 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4004 continue;
4005
4006 for (s = ibfd->sections; s != NULL; s = s->next)
4007 {
4008 struct elf_nds32_dyn_relocs *p;
4009
4010 for (p = ((struct elf_nds32_dyn_relocs *)
4011 elf_section_data (s)->local_dynrel);
4012 p != NULL; p = p->next)
4013 {
4014 if (!bfd_is_abs_section (p->sec)
4015 && bfd_is_abs_section (p->sec->output_section))
4016 {
4017 /* Input section has been discarded, either because
4018 it is a copy of a linkonce section or due to
4019 linker script /DISCARD/, so we'll be discarding
4020 the relocs too. */
4021 }
4022 else if (p->count != 0)
4023 {
4024 srel = elf_section_data (p->sec)->sreloc;
4025 srel->size += p->count * sizeof (Elf32_External_Rela);
4026 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4027 info->flags |= DF_TEXTREL;
4028 }
4029 }
4030 }
4031
4032 local_got = elf_local_got_refcounts (ibfd);
4033 if (!local_got)
4034 continue;
4035
4036 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4037 locsymcount = symtab_hdr->sh_info;
4038 end_local_got = local_got + locsymcount;
4039 s = htab->sgot;
4040 srel = htab->srelgot;
4041 for (; local_got < end_local_got; ++local_got)
4042 {
4043 if (*local_got > 0)
4044 {
4045 *local_got = s->size;
4046 s->size += 4;
0e1862bb 4047 if (bfd_link_pic (info))
35c08157
KLC		 4048 srel->size += sizeof (Elf32_External_Rela);
4049 }
4050 else
4051 *local_got = (bfd_vma) - 1;
4052 }
4053 }
4054
4055 /* Allocate global sym .plt and .got entries, and space for global
4056 sym dynamic relocs. */
4057 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4058
4059 /* We now have determined the sizes of the various dynamic sections.
4060 Allocate memory for them. */
4061 relocs = FALSE;
4062 for (s = dynobj->sections; s != NULL; s = s->next)
4063 {
4064 if ((s->flags & SEC_LINKER_CREATED) == 0)
4065 continue;
4066
4067 if (s == htab->splt)
4068 {
4069 /* Strip this section if we don't need it; see the
4070 comment below. */
4071 }
4072 else if (s == htab->sgot)
4073 {
4074 got_size += s->size;
4075 }
4076 else if (s == htab->sgotplt)
4077 {
4078 got_size += s->size;
4079 }
4080 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4081 {
4082 if (s->size != 0 && s != htab->srelplt)
4083 relocs = TRUE;
4084
4085 /* We use the reloc_count field as a counter if we need
4086 to copy relocs into the output file. */
4087 s->reloc_count = 0;
4088 }
4089 else
4090 {
4091 /* It's not one of our sections, so don't allocate space. */
4092 continue;
4093 }
4094
4095 if (s->size == 0)
4096 {
4097 /* If we don't need this section, strip it from the
4098 output file. This is mostly to handle .rela.bss and
4099 .rela.plt. We must create both sections in
4100 create_dynamic_sections, because they must be created
4101 before the linker maps input sections to output
4102 sections. The linker does that before
4103 adjust_dynamic_symbol is called, and it is that
4104 function which decides whether anything needs to go
4105 into these sections. */
4106 s->flags |= SEC_EXCLUDE;
4107 continue;
4108 }
4109
4110 /* Allocate memory for the section contents. We use bfd_zalloc
4111 here in case unused entries are not reclaimed before the
4112 section's contents are written out. This should not happen,
4113 but this way if it does, we get a R_NDS32_NONE reloc instead
4114 of garbage. */
4115 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4116 if (s->contents == NULL)
4117 return FALSE;
4118 }
4119
4120
4121 if (htab->root.dynamic_sections_created)
4122 {
4123 /* Add some entries to the .dynamic section. We fill in the
4124 values later, in nds32_elf_finish_dynamic_sections, but we
4125 must add the entries now so that we get the correct size for
4126 the .dynamic section. The DT_DEBUG entry is filled in by the
4127 dynamic linker and used by the debugger. */
4128#define add_dynamic_entry(TAG, VAL) \
4129 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4130
0e1862bb 4131 if (!bfd_link_pic (info))
35c08157
KLC		 4132 {
4133 if (!add_dynamic_entry (DT_DEBUG, 0))
4134 return FALSE;
4135 }
4136
4137 if (htab->splt->size != 0)
4138 {
4139 if (!add_dynamic_entry (DT_PLTGOT, 0)
4140 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4141 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4142 || !add_dynamic_entry (DT_JMPREL, 0))
4143 return FALSE;
4144 }
4145
4146 if (relocs)
4147 {
4148 if (!add_dynamic_entry (DT_RELA, 0)
4149 || !add_dynamic_entry (DT_RELASZ, 0)
4150 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4151 return FALSE;
4152
4153 /* If any dynamic relocs apply to a read-only section,
4154 then we need a DT_TEXTREL entry. */
4155 if ((info->flags & DF_TEXTREL) == 0)
4156 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4157 (void *) info);
4158
4159 if ((info->flags & DF_TEXTREL) != 0)
4160 {
4161 if (!add_dynamic_entry (DT_TEXTREL, 0))
4162 return FALSE;
4163 }
4164 }
4165 }
4166#undef add_dynamic_entry
4167
4168 return TRUE;
4169}
4170
4171static bfd_reloc_status_type
4172nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4173 bfd_vma relocation, bfd_byte *location)
4174{
4175 int size;
4176 bfd_vma x = 0;
4177 bfd_reloc_status_type flag;
4178 unsigned int rightshift = howto->rightshift;
4179 unsigned int bitpos = howto->bitpos;
4180
4181 /* If the size is negative, negate RELOCATION. This isn't very
4182 general. */
4183 if (howto->size < 0)
4184 relocation = -relocation;
4185
4186 /* Get the value we are going to relocate. */
4187 size = bfd_get_reloc_size (howto);
4188 switch (size)
4189 {
4190 default:
35c08157
KLC		 4191 abort ();
4192 break;
6346d5ca
AM		 4193 case 0:
4194 return bfd_reloc_ok;
35c08157
KLC		 4195 case 2:
4196 x = bfd_getb16 (location);
4197 break;
4198 case 4:
4199 x = bfd_getb32 (location);
4200 break;
4201 }
4202
4203 /* Check for overflow. FIXME: We may drop bits during the addition
4204 which we don't check for. We must either check at every single
4205 operation, which would be tedious, or we must do the computations
4206 in a type larger than bfd_vma, which would be inefficient. */
4207 flag = bfd_reloc_ok;
4208 if (howto->complain_on_overflow != complain_overflow_dont)
4209 {
4210 bfd_vma addrmask, fieldmask, signmask, ss;
4211 bfd_vma a, b, sum;
4212
4213 /* Get the values to be added together. For signed and unsigned
4214 relocations, we assume that all values should be truncated to
4215 the size of an address. For bitfields, all the bits matter.
4216 See also bfd_check_overflow. */
4217 fieldmask = N_ONES (howto->bitsize);
4218 signmask = ~fieldmask;
4219 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4220 a = (relocation & addrmask) >> rightshift;
4221 b = (x & howto->src_mask & addrmask) >> bitpos;
4222
4223 switch (howto->complain_on_overflow)
4224 {
4225 case complain_overflow_signed:
4226 /* If any sign bits are set, all sign bits must be set.
4227 That is, A must be a valid negative address after
4228 shifting. */
4229 signmask = ~(fieldmask >> 1);
4230 /* Fall through. */
4231
4232 case complain_overflow_bitfield:
4233 /* Much like the signed check, but for a field one bit
4234 wider. We allow a bitfield to represent numbers in the
4235 range -2**n to 2**n-1, where n is the number of bits in the
4236 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4237 can't overflow, which is exactly what we want. */
4238 ss = a & signmask;
4239 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4240 flag = bfd_reloc_overflow;
4241
4242 /* We only need this next bit of code if the sign bit of B
4243 is below the sign bit of A. This would only happen if
4244 SRC_MASK had fewer bits than BITSIZE. Note that if
4245 SRC_MASK has more bits than BITSIZE, we can get into
4246 trouble; we would need to verify that B is in range, as
4247 we do for A above. */
4248 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4249 ss >>= bitpos;
4250
4251 /* Set all the bits above the sign bit. */
4252 b = (b ^ ss) - ss;
4253
4254 /* Now we can do the addition. */
4255 sum = a + b;
4256
4257 /* See if the result has the correct sign. Bits above the
4258 sign bit are junk now; ignore them. If the sum is
4259 positive, make sure we did not have all negative inputs;
4260 if the sum is negative, make sure we did not have all
4261 positive inputs. The test below looks only at the sign
4262 bits, and it really just
4263 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4264
4265 We mask with addrmask here to explicitly allow an address
4266 wrap-around. The Linux kernel relies on it, and it is
4267 the only way to write assembler code which can run when
4268 loaded at a location 0x80000000 away from the location at
4269 which it is linked. */
4270 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4271 flag = bfd_reloc_overflow;
4272
4273 break;
4274
4275 case complain_overflow_unsigned:
4276 /* Checking for an unsigned overflow is relatively easy:
4277 trim the addresses and add, and trim the result as well.
4278 Overflow is normally indicated when the result does not
4279 fit in the field. However, we also need to consider the
4280 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4281 input is 0x80000000, and bfd_vma is only 32 bits; then we
4282 will get sum == 0, but there is an overflow, since the
4283 inputs did not fit in the field. Instead of doing a
4284 separate test, we can check for this by or-ing in the
4285 operands when testing for the sum overflowing its final
4286 field. */
4287 sum = (a + b) & addrmask;
4288 if ((a | b | sum) & signmask)
4289 flag = bfd_reloc_overflow;
4290 break;
4291
4292 default:
4293 abort ();
4294 }
4295 }
4296
4297 /* Put RELOCATION in the right bits. */
4298 relocation >>= (bfd_vma) rightshift;
4299 relocation <<= (bfd_vma) bitpos;
4300
4301 /* Add RELOCATION to the right bits of X. */
4302 /* FIXME : 090616
4303 Because the relaxation may generate duplicate relocation at one address,
4304 an addition to immediate in the instruction may cause the relocation added
4305 several times.
4306 This bug should be fixed in assembler, but a check is also needed here. */
4307 if (howto->partial_inplace)
4308 x = ((x & ~howto->dst_mask)
4309 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4310 else
4311 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4312
4313
4314 /* Put the relocated value back in the object file. */
4315 switch (size)
4316 {
4317 default:
4318 case 0:
4319 case 1:
4320 case 8:
4321 abort ();
4322 break;
4323 case 2:
4324 bfd_putb16 (x, location);
4325 break;
4326 case 4:
4327 bfd_putb32 (x, location);
4328 break;
4329 }
4330
4331 return flag;
4332}
4333
4334static bfd_reloc_status_type
4335nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4336 asection *input_section, bfd_byte *contents,
4337 bfd_vma address, bfd_vma value, bfd_vma addend)
4338{
4339 bfd_vma relocation;
4340
4341 /* Sanity check the address. */
4342 if (address > bfd_get_section_limit (input_bfd, input_section))
4343 return bfd_reloc_outofrange;
4344
4345 /* This function assumes that we are dealing with a basic relocation
4346 against a symbol. We want to compute the value of the symbol to
4347 relocate to. This is just VALUE, the value of the symbol, plus
4348 ADDEND, any addend associated with the reloc. */
4349 relocation = value + addend;
4350
4351 /* If the relocation is PC relative, we want to set RELOCATION to
4352 the distance between the symbol (currently in RELOCATION) and the
4353 location we are relocating. Some targets (e.g., i386-aout)
4354 arrange for the contents of the section to be the negative of the
4355 offset of the location within the section; for such targets
4356 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4357 simply leave the contents of the section as zero; for such
4358 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4359 need to subtract out the offset of the location within the
4360 section (which is just ADDRESS). */
4361 if (howto->pc_relative)
4362 {
4363 relocation -= (input_section->output_section->vma
4364 + input_section->output_offset);
4365 if (howto->pcrel_offset)
4366 relocation -= address;
4367 }
4368
4369 return nds32_relocate_contents (howto, input_bfd, relocation,
4370 contents + address);
4371}
4372
4373static bfd_boolean
4374nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4375 const char *name,
4376 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4377 asection *input_sec,
4378 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4379{
4380 const char *source;
4381 FILE *sym_ld_script = NULL;
4382 struct elf_nds32_link_hash_table *table;
4383
4384 table = nds32_elf_hash_table (info);
4385 sym_ld_script = table->sym_ld_script;
4386 if (!sym_ld_script)
4387 return TRUE;
4388
4389 if (!h || !name || *name == '\0')
4390 return TRUE;
4391
4392 if (input_sec->flags & SEC_EXCLUDE)
4393 return TRUE;
4394
4395 if (!check_start_export_sym)
4396 {
4397 fprintf (sym_ld_script, "SECTIONS\n{\n");
4398 check_start_export_sym = 1;
4399 }
4400
4401 if (h->root.type == bfd_link_hash_defined
4402 || h->root.type == bfd_link_hash_defweak)
4403 {
4404 if (!h->root.u.def.section->output_section)
4405 return TRUE;
4406
4407 if (bfd_is_const_section (input_sec))
4408 source = input_sec->name;
4409 else
4410 source = input_sec->owner->filename;
4411
4412 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4413 h->root.root.string,
4414 (long) (h->root.u.def.value
4415 + h->root.u.def.section->output_section->vma
4416 + h->root.u.def.section->output_offset), source);
4417 }
4418
4419 return TRUE;
4420}
4421
4422/* Relocate an NDS32/D ELF section.
4423 There is some attempt to make this function usable for many architectures,
4424 both for RELA and REL type relocs, if only to serve as a learning tool.
4425
4426 The RELOCATE_SECTION function is called by the new ELF backend linker
4427 to handle the relocations for a section.
4428
4429 The relocs are always passed as Rela structures; if the section
4430 actually uses Rel structures, the r_addend field will always be
4431 zero.
4432
4433 This function is responsible for adjust the section contents as
4434 necessary, and (if using Rela relocs and generating a
4435 relocatable output file) adjusting the reloc addend as
4436 necessary.
4437
4438 This function does not have to worry about setting the reloc
4439 address or the reloc symbol index.
4440
4441 LOCAL_SYMS is a pointer to the swapped in local symbols.
4442
4443 LOCAL_SECTIONS is an array giving the section in the input file
4444 corresponding to the st_shndx field of each local symbol.
4445
4446 The global hash table entry for the global symbols can be found
4447 via elf_sym_hashes (input_bfd).
4448
4449 When generating relocatable output, this function must handle
4450 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4451 going to be the section symbol corresponding to the output
4452 section, which means that the addend must be adjusted
4453 accordingly. */
4454
1c8f6a4d
KLC		 4455static bfd_vma
4456dtpoff_base (struct bfd_link_info *info)
4457{
4458 /* If tls_sec is NULL, we should have signalled an error already. */
4459 if (elf_hash_table (info)->tls_sec == NULL)
4460 return 0;
4461 return elf_hash_table (info)->tls_sec->vma;
4462}
4463
35c08157
KLC		 4464static bfd_boolean
4465nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4466 struct bfd_link_info * info,
4467 bfd * input_bfd,
4468 asection * input_section,
4469 bfd_byte * contents,
4470 Elf_Internal_Rela * relocs,
4471 Elf_Internal_Sym * local_syms,
4472 asection ** local_sections)
4473{
4474 Elf_Internal_Shdr *symtab_hdr;
4475 struct elf_link_hash_entry **sym_hashes;
4476 Elf_Internal_Rela *rel, *relend;
4477 bfd_boolean ret = TRUE; /* Assume success. */
4478 int align = 0;
4479 bfd_reloc_status_type r;
4480 const char *errmsg = NULL;
4481 bfd_vma gp;
4482 struct elf_nds32_link_hash_table *htab;
4483 bfd *dynobj;
4484 bfd_vma *local_got_offsets;
4485 asection *sgot, *splt, *sreloc;
4486 bfd_vma high_address;
4487 struct elf_nds32_link_hash_table *table;
4488 int eliminate_gc_relocs;
4489 bfd_vma fpbase_addr;
4490
4491 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4492 sym_hashes = elf_sym_hashes (input_bfd);
4493 htab = nds32_elf_hash_table (info);
4494 high_address = bfd_get_section_limit (input_bfd, input_section);
4495
4496 dynobj = htab->root.dynobj;
4497 local_got_offsets = elf_local_got_offsets (input_bfd);
4498
4499 sgot = htab->sgot;
4500 splt = htab->splt;
4501 sreloc = NULL;
4502
4503 rel = relocs;
4504 relend = relocs + input_section->reloc_count;
4505
4506 table = nds32_elf_hash_table (info);
4507 eliminate_gc_relocs = table->eliminate_gc_relocs;
4508 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4509 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 4510 {
4511 is_SDA_BASE_set = 1;
4512 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4513 if (r != bfd_reloc_ok)
4514 return FALSE;
4515 }
4516
0c4bd9d9
KLC		 4517 if (is_ITB_BASE_set == 0)
4518 {
4519 /* Set the _ITB_BASE_. */
4520 if (!nds32_elf_ex9_itb_base (info))
4521 {
4522 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"),
4523 output_bfd);
4524 bfd_set_error (bfd_error_bad_value);
4525 }
4526 }
4527
1c8f6a4d
KLC		 4528 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4529 if (!nds32_elf_ifc_reloc ())
4530 (*_bfd_error_handler) (_("error: IFC relocation error."));
4531
4532 /* Relocation for .ex9.itable. */
4533 if (table->target_optimize & NDS32_RELAX_EX9_ON
4534 || (table->ex9_import_file && table->update_ex9_table))
4535 nds32_elf_ex9_reloc_jmp (info);
4536
35c08157
KLC		 4537 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4538 the fp value is set as gp, and it has be reverted for instruction
4539 setting fp. */
4540 fpbase_addr = elf_gp (output_bfd);
4541
4542 for (rel = relocs; rel < relend; rel++)
4543 {
4544 enum elf_nds32_reloc_type r_type;
4545 reloc_howto_type *howto = NULL;
4546 unsigned long r_symndx;
4547 struct elf_link_hash_entry *h = NULL;
4548 Elf_Internal_Sym *sym = NULL;
4549 asection *sec;
4550 bfd_vma relocation;
4551
4552 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4553 ensure it's zero (we use REL relocs, not RELA). Therefore this
4554 should be assigning zero to `addend', but for clarity we use
4555 `r_addend'. */
4556
4557 bfd_vma addend = rel->r_addend;
4558 bfd_vma offset = rel->r_offset;
4559
4560 r_type = ELF32_R_TYPE (rel->r_info);
4561 if (r_type >= R_NDS32_max)
4562 {
4563 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4564 input_bfd, r_type);
4565 bfd_set_error (bfd_error_bad_value);
4566 ret = FALSE;
4567 continue;
4568 }
4569
4570 if (r_type == R_NDS32_GNU_VTENTRY
4571 || r_type == R_NDS32_GNU_VTINHERIT
4572 || r_type == R_NDS32_NONE
4573 || r_type == R_NDS32_RELA_GNU_VTENTRY
4574 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4575 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4576 || r_type == R_NDS32_DATA
1c8f6a4d 4577 || r_type == R_NDS32_TRAN
0c4bd9d9 4578 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC		 4579 continue;
4580
0c4bd9d9
KLC		 4581 /* If we enter the fp-as-gp region. Resolve the address
4582 of best fp-base. */
35c08157
KLC		 4583 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4584 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4585 {
4586 int dist;
4587
4588 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4589 dist = rel->r_addend >> 16;
4590 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4591 local_syms, symtab_hdr);
4592 }
4593 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4594 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4595 {
4596 fpbase_addr = elf_gp (output_bfd);
4597 }
4598
4599 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4600 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4601 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC		 4602 continue;
4603
4604 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4605 r_symndx = ELF32_R_SYM (rel->r_info);
4606
4607 /* This is a final link. */
4608 sym = NULL;
4609 sec = NULL;
4610 h = NULL;
4611
4612 if (r_symndx < symtab_hdr->sh_info)
4613 {
4614 /* Local symbol. */
4615 sym = local_syms + r_symndx;
4616 sec = local_sections[r_symndx];
4617
4618 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4619 addend = rel->r_addend;
4620 }
4621 else
4622 {
4623 /* External symbol. */
4624 bfd_boolean warned, ignored, unresolved_reloc;
4625 int symndx = r_symndx - symtab_hdr->sh_info;
4626
4627 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4628 r_symndx, symtab_hdr, sym_hashes, h, sec,
4629 relocation, unresolved_reloc, warned,
4630 ignored);
4631
4632 /* la $fp, _FP_BASE_ is per-function (region).
4633 Handle it specially. */
4634 switch ((int) r_type)
4635 {
4636 case R_NDS32_SDA19S0_RELA:
4637 case R_NDS32_SDA15S0_RELA:
4638 case R_NDS32_20_RELA:
4639 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4640 FP_BASE_NAME) == 0)
4641 {
4642 relocation = fpbase_addr;
4643 break;
4644 }
4645 }
4646
4647 }
4648
0e1862bb 4649 if (bfd_link_relocatable (info))
35c08157
KLC		 4650 {
4651 /* This is a relocatable link. We don't have to change
4652 anything, unless the reloc is against a section symbol,
4653 in which case we have to adjust according to where the
4654 section symbol winds up in the output section. */
4655 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4656 rel->r_addend += sec->output_offset + sym->st_value;
4657
4658 continue;
4659 }
4660
4661 /* Sanity check the address. */
4662 if (offset > high_address)
4663 {
4664 r = bfd_reloc_outofrange;
4665 goto check_reloc;
4666 }
4667
4668 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4669 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4670 || r_type >= R_NDS32_RELAX_ENTRY)
4671 continue;
4672
4673 switch ((int) r_type)
4674 {
4675 case R_NDS32_GOTOFF:
4676 /* Relocation is relative to the start of the global offset
4677 table (for ld24 rx, #uimm24), e.g. access at label+addend
4678
4679 ld24 rx. #label@GOTOFF + addend
4680 sub rx, r12. */
4681 case R_NDS32_GOTOFF_HI20:
4682 case R_NDS32_GOTOFF_LO12:
4683 case R_NDS32_GOTOFF_LO15:
4684 case R_NDS32_GOTOFF_LO19:
4685 BFD_ASSERT (sgot != NULL);
4686
4687 relocation -= elf_gp (output_bfd);
4688 break;
4689
4690 case R_NDS32_9_PLTREL:
4691 case R_NDS32_25_PLTREL:
4692 /* Relocation is to the entry for this symbol in the
4693 procedure linkage table. */
4694
4695 /* The native assembler will generate a 25_PLTREL reloc
4696 for a local symbol if you assemble a call from one
4697 section to another when using -K pic. */
4698 if (h == NULL)
4699 break;
4700
4701 if (h->forced_local)
4702 break;
4703
4704 /* We didn't make a PLT entry for this symbol. This
4705 happens when statically linking PIC code, or when
4706 using -Bsymbolic. */
4707 if (h->plt.offset == (bfd_vma) - 1)
4708 break;
4709
4710 relocation = (splt->output_section->vma
4711 + splt->output_offset + h->plt.offset);
4712 break;
4713
4714 case R_NDS32_PLT_GOTREL_HI20:
4715 case R_NDS32_PLT_GOTREL_LO12:
4716 case R_NDS32_PLT_GOTREL_LO15:
4717 case R_NDS32_PLT_GOTREL_LO19:
4718 case R_NDS32_PLT_GOTREL_LO20:
4719 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4720 {
4721 /* We didn't make a PLT entry for this symbol. This
4722 happens when statically linking PIC code, or when
4723 using -Bsymbolic. */
4724 relocation -= elf_gp (output_bfd);
4725 break;
4726 }
4727
4728 relocation = (splt->output_section->vma
4729 + splt->output_offset + h->plt.offset);
4730
4731 relocation -= elf_gp (output_bfd);
4732 break;
4733
4734 case R_NDS32_PLTREL_HI20:
4735 case R_NDS32_PLTREL_LO12:
4736
4737 /* Relocation is to the entry for this symbol in the
4738 procedure linkage table. */
4739
4740 /* The native assembler will generate a 25_PLTREL reloc
4741 for a local symbol if you assemble a call from one
4742 section to another when using -K pic. */
4743 if (h == NULL)
4744 break;
4745
4746 if (h->forced_local)
4747 break;
4748
4749 if (h->plt.offset == (bfd_vma) - 1)
4750 /* We didn't make a PLT entry for this symbol. This
4751 happens when statically linking PIC code, or when
4752 using -Bsymbolic. */
4753 break;
4754
4755 if (splt == NULL)
4756 break;
4757
4758 relocation = (splt->output_section->vma
4759 + splt->output_offset
4760 + h->plt.offset + 4)
4761 - (input_section->output_section->vma
4762 + input_section->output_offset
4763 + rel->r_offset);
4764
4765 break;
4766
4767 case R_NDS32_GOTPC20:
4768 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4769 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4770 relocation = elf_gp (output_bfd);
4771 break;
4772
4773 case R_NDS32_GOTPC_HI20:
4774 case R_NDS32_GOTPC_LO12:
4775 {
4776 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4777 bl .+4
4778 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4779 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4780 or
4781 bl .+4
4782 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4783 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4784 */
4785 relocation = elf_gp (output_bfd);
4786 relocation -= (input_section->output_section->vma
4787 + input_section->output_offset + rel->r_offset);
4788 break;
4789 }
4790
4791 case R_NDS32_GOT20:
4792 /* Fall through. */
4793 case R_NDS32_GOT_HI20:
4794 case R_NDS32_GOT_LO12:
4795 case R_NDS32_GOT_LO15:
4796 case R_NDS32_GOT_LO19:
4797 /* Relocation is to the entry for this symbol in the global
4798 offset table. */
4799 BFD_ASSERT (sgot != NULL);
4800
4801 if (h != NULL)
4802 {
4803 bfd_boolean dyn;
4804 bfd_vma off;
4805
4806 off = h->got.offset;
4807 BFD_ASSERT (off != (bfd_vma) - 1);
4808 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 4809 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4810 bfd_link_pic (info),
4811 h)
4812 || (bfd_link_pic (info)
35c08157
KLC		 4813 && (info->symbolic
4814 || h->dynindx == -1
4815 || h->forced_local) && h->def_regular))
4816 {
4817 /* This is actually a static link, or it is a
4818 -Bsymbolic link and the symbol is defined
4819 locally, or the symbol was forced to be local
4820 because of a version file. We must initialize
4821 this entry in the global offset table. Since the
4822 offset must always be a multiple of 4, we use the
4823 least significant bit to record whether we have
4824 initialized it already.
4825
4826 When doing a dynamic link, we create a .rela.got
4827 relocation entry to initialize the value. This
4828 is done in the finish_dynamic_symbol routine. */
4829 if ((off & 1) != 0)
4830 off &= ~1;
4831 else
4832 {
4833 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4834 h->got.offset |= 1;
4835 }
4836 }
4837 relocation = sgot->output_section->vma + sgot->output_offset + off
4838 - elf_gp (output_bfd);
4839 }
4840 else
4841 {
4842 bfd_vma off;
4843 bfd_byte *loc;
4844
4845 BFD_ASSERT (local_got_offsets != NULL
4846 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4847
4848 off = local_got_offsets[r_symndx];
4849
4850 /* The offset must always be a multiple of 4. We use
4851 the least significant bit to record whether we have
4852 already processed this entry. */
4853 if ((off & 1) != 0)
4854 off &= ~1;
4855 else
4856 {
4857 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4858
0e1862bb 4859 if (bfd_link_pic (info))
35c08157
KLC		 4860 {
4861 asection *srelgot;
4862 Elf_Internal_Rela outrel;
4863
4864 /* We need to generate a R_NDS32_RELATIVE reloc
4865 for the dynamic linker. */
4866 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4867 BFD_ASSERT (srelgot != NULL);
4868
4869 outrel.r_offset = (elf_gp (output_bfd)
4870 + sgot->output_offset + off);
4871 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4872 outrel.r_addend = relocation;
4873 loc = srelgot->contents;
4874 loc +=
4875 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4876 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4877 ++srelgot->reloc_count;
4878 }
4879 local_got_offsets[r_symndx] |= 1;
4880 }
4881 relocation = sgot->output_section->vma + sgot->output_offset + off
4882 - elf_gp (output_bfd);
4883 }
4884
4885 break;
4886
4887 case R_NDS32_16_RELA:
4888 case R_NDS32_20_RELA:
4889 case R_NDS32_5_RELA:
4890 case R_NDS32_32_RELA:
4891 case R_NDS32_9_PCREL_RELA:
4892 case R_NDS32_WORD_9_PCREL_RELA:
4893 case R_NDS32_10_UPCREL_RELA:
4894 case R_NDS32_15_PCREL_RELA:
4895 case R_NDS32_17_PCREL_RELA:
4896 case R_NDS32_25_PCREL_RELA:
4897 case R_NDS32_HI20_RELA:
4898 case R_NDS32_LO12S3_RELA:
4899 case R_NDS32_LO12S2_RELA:
4900 case R_NDS32_LO12S2_DP_RELA:
4901 case R_NDS32_LO12S2_SP_RELA:
4902 case R_NDS32_LO12S1_RELA:
4903 case R_NDS32_LO12S0_RELA:
4904 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4905 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 4906 && (input_section->flags & SEC_ALLOC) != 0
4907 && (eliminate_gc_relocs == 0
4908 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4909 && ((r_type != R_NDS32_9_PCREL_RELA
4910 && r_type != R_NDS32_WORD_9_PCREL_RELA
4911 && r_type != R_NDS32_10_UPCREL_RELA
4912 && r_type != R_NDS32_15_PCREL_RELA
4913 && r_type != R_NDS32_17_PCREL_RELA
4914 && r_type != R_NDS32_25_PCREL_RELA
4915 && !(r_type == R_NDS32_32_RELA
4916 && strcmp (input_section->name, ".eh_frame") == 0))
4917 || (h != NULL && h->dynindx != -1
4918 && (!info->symbolic || !h->def_regular))))
4919 {
4920 Elf_Internal_Rela outrel;
4921 bfd_boolean skip, relocate;
4922 bfd_byte *loc;
4923
4924 /* When generating a shared object, these relocations
4925 are copied into the output file to be resolved at run
4926 time. */
4927
4928 if (sreloc == NULL)
4929 {
4930 const char *name;
4931
4932 name = bfd_elf_string_from_elf_section
4933 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4934 elf_section_data (input_section)->rela.hdr->sh_name);
4935 if (name == NULL)
4936 return FALSE;
4937
4938 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4939 && strcmp (bfd_get_section_name (input_bfd,
4940 input_section),
4941 name + 5) == 0);
4942
4943 sreloc = bfd_get_section_by_name (dynobj, name);
4944 BFD_ASSERT (sreloc != NULL);
4945 }
4946
4947 skip = FALSE;
4948 relocate = FALSE;
4949
4950 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4951 info,
4952 input_section,
4953 rel->r_offset);
4954 if (outrel.r_offset == (bfd_vma) - 1)
4955 skip = TRUE;
4956 else if (outrel.r_offset == (bfd_vma) - 2)
4957 skip = TRUE, relocate = TRUE;
4958 outrel.r_offset += (input_section->output_section->vma
4959 + input_section->output_offset);
4960
4961 if (skip)
4962 memset (&outrel, 0, sizeof outrel);
4963 else if (r_type == R_NDS32_17_PCREL_RELA
4964 || r_type == R_NDS32_15_PCREL_RELA
4965 || r_type == R_NDS32_25_PCREL_RELA)
4966 {
4967 BFD_ASSERT (h != NULL && h->dynindx != -1);
4968 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4969 outrel.r_addend = rel->r_addend;
4970 }
4971 else
4972 {
4973 /* h->dynindx may be -1 if this symbol was marked to
4974 become local. */
4975 if (h == NULL
4976 || ((info->symbolic || h->dynindx == -1)
4977 && h->def_regular))
4978 {
4979 relocate = TRUE;
4980 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4981 outrel.r_addend = relocation + rel->r_addend;
4982 }
4983 else
4984 {
4985 BFD_ASSERT (h->dynindx != -1);
4986 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4987 outrel.r_addend = rel->r_addend;
4988 }
4989 }
4990
4991 loc = sreloc->contents;
4992 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4993 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4994 ++sreloc->reloc_count;
4995
4996 /* If this reloc is against an external symbol, we do
4997 not want to fiddle with the addend. Otherwise, we
4998 need to include the symbol value so that it becomes
4999 an addend for the dynamic reloc. */
5000 if (!relocate)
5001 continue;
5002 }
5003 break;
5004
5005 case R_NDS32_25_ABS_RELA:
0e1862bb 5006 if (bfd_link_pic (info))
35c08157
KLC		 5007 {
5008 (*_bfd_error_handler)
1c8f6a4d
KLC		 5009 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5010 "mode."), bfd_get_filename (input_bfd));
35c08157
KLC		 5011 return FALSE;
5012 }
5013 break;
5014
5015 case R_NDS32_9_PCREL:
5016 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5017 contents, offset,
5018 sec, relocation, addend);
5019 goto check_reloc;
5020
5021 case R_NDS32_HI20:
5022 {
5023 Elf_Internal_Rela *lorel;
5024
5025 /* We allow an arbitrary number of HI20 relocs before the
5026 LO12 reloc. This permits gcc to emit the HI and LO relocs
5027 itself. */
5028 for (lorel = rel + 1;
5029 (lorel < relend
5030 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5031 continue;
5032 if (lorel < relend
5033 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5034 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5035 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5036 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5037 {
5038 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5039 contents, relocation + addend);
5040 r = bfd_reloc_ok;
5041 }
5042 else
5043 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 5044 contents, offset, relocation,
5045 addend);
35c08157
KLC		 5046 }
5047
5048 goto check_reloc;
5049
5050 case R_NDS32_GOT17S2_RELA:
5051 case R_NDS32_GOT15S2_RELA:
5052 {
5053 bfd_vma off;
5054
5055 BFD_ASSERT (sgot != NULL);
5056
5057 if (h != NULL)
5058 {
5059 bfd_boolean dyn;
5060
5061 off = h->got.offset;
5062 BFD_ASSERT (off != (bfd_vma) - 1);
5063
5064 dyn = htab->root.dynamic_sections_created;
5065 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L		 5066 (dyn, bfd_link_pic (info), h)
5067 || (bfd_link_pic (info)
5068 && (info->symbolic
5069 || h->dynindx == -1
5070 || h->forced_local)
5071 && h->def_regular))
35c08157
KLC		 5072 {
5073 /* This is actually a static link, or it is a
5074 -Bsymbolic link and the symbol is defined
5075 locally, or the symbol was forced to be local
5076 because of a version file. We must initialize
5077 this entry in the global offset table. Since the
5078 offset must always be a multiple of 4, we use the
5079 least significant bit to record whether we have
5080 initialized it already.
5081
5082 When doing a dynamic link, we create a .rela.got
5083 relocation entry to initialize the value. This
5084 is done in the finish_dynamic_symbol routine. */
5085 if ((off & 1) != 0)
5086 off &= ~1;
5087 else
5088 {
5089 bfd_put_32 (output_bfd, relocation,
5090 sgot->contents + off);
5091 h->got.offset |= 1;
5092 }
5093 }
5094 }
5095 else
5096 {
5097 bfd_byte *loc;
5098
5099 BFD_ASSERT (local_got_offsets != NULL
5100 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5101
5102 off = local_got_offsets[r_symndx];
5103
5104 /* The offset must always be a multiple of 4. We use
5105 the least significant bit to record whether we have
5106 already processed this entry. */
5107 if ((off & 1) != 0)
5108 off &= ~1;
5109 else
5110 {
5111 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5112
0e1862bb 5113 if (bfd_link_pic (info))
35c08157
KLC		 5114 {
5115 asection *srelgot;
5116 Elf_Internal_Rela outrel;
5117
5118 /* We need to generate a R_NDS32_RELATIVE reloc
5119 for the dynamic linker. */
5120 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5121 BFD_ASSERT (srelgot != NULL);
5122
5123 outrel.r_offset = (elf_gp (output_bfd)
5124 + sgot->output_offset + off);
5125 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5126 outrel.r_addend = relocation;
5127 loc = srelgot->contents;
5128 loc +=
5129 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5130 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5131 ++srelgot->reloc_count;
5132 }
5133 local_got_offsets[r_symndx] |= 1;
5134 }
5135 }
5136 relocation = sgot->output_section->vma + sgot->output_offset + off
5137 - elf_gp (output_bfd);
5138 }
5139 if (relocation & align)
5140 {
5141 /* Incorrect alignment. */
5142 (*_bfd_error_handler)
5143 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5144 ret = FALSE;
5145 r = bfd_reloc_dangerous;
5146 goto check_reloc;
5147 }
5148 break;
5149
5150 case R_NDS32_SDA16S3_RELA:
5151 case R_NDS32_SDA15S3_RELA:
5152 case R_NDS32_SDA15S3:
5153 align = 0x7;
5154 goto handle_sda;
5155
5156 case R_NDS32_SDA17S2_RELA:
5157 case R_NDS32_SDA15S2_RELA:
5158 case R_NDS32_SDA12S2_SP_RELA:
5159 case R_NDS32_SDA12S2_DP_RELA:
5160 case R_NDS32_SDA15S2:
5161 case R_NDS32_SDA_FP7U2_RELA:
5162 align = 0x3;
5163 goto handle_sda;
5164
5165 case R_NDS32_SDA18S1_RELA:
5166 case R_NDS32_SDA15S1_RELA:
5167 case R_NDS32_SDA15S1:
5168 align = 0x1;
5169 goto handle_sda;
5170
5171 case R_NDS32_SDA19S0_RELA:
5172 case R_NDS32_SDA15S0_RELA:
5173 case R_NDS32_SDA15S0:
5174 {
5175 align = 0x0;
5176handle_sda:
5177 BFD_ASSERT (sec != NULL);
5178
5179 /* If the symbol is in the abs section, the out_bfd will be null.
5180 This happens when the relocation has a symbol@GOTOFF. */
5181 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5182 if (r != bfd_reloc_ok)
5183 {
5184 (*_bfd_error_handler)
5185 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5186 ret = FALSE;
5187 goto check_reloc;
5188 }
5189
5190 /* At this point `relocation' contains the object's
5191 address. */
5192 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5193 {
5194 relocation -= fpbase_addr;
5195 }
5196 else
5197 relocation -= gp;
5198 /* Now it contains the offset from _SDA_BASE_. */
5199
5200 /* Make sure alignment is correct. */
5201
5202 if (relocation & align)
5203 {
5204 /* Incorrect alignment. */
5205 (*_bfd_error_handler)
5206 (_("%B(%A): warning: unaligned small data access of type %d."),
5207 input_bfd, input_section, r_type);
5208 ret = FALSE;
5209 goto check_reloc;
5210 }
5211 }
5212
5213 break;
5214 case R_NDS32_17IFC_PCREL_RELA:
5215 case R_NDS32_10IFCU_PCREL_RELA:
5216 /* do nothing */
5217 break;
5218
1c8f6a4d
KLC		 5219 case R_NDS32_TLS_LE_HI20:
5220 case R_NDS32_TLS_LE_LO12:
5221 case R_NDS32_TLS_LE_20:
5222 case R_NDS32_TLS_LE_15S0:
5223 case R_NDS32_TLS_LE_15S1:
5224 case R_NDS32_TLS_LE_15S2:
5225 if (elf_hash_table (info)->tls_sec != NULL)
5226 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5227 break;
5228 case R_NDS32_TLS_IE_HI20:
5229 case R_NDS32_TLS_IE_LO12S2:
5230 {
5231 /* Relocation is to the entry for this symbol in the global
5232 offset table. */
5233 unsigned int tls_type;
5234 asection *srelgot;
5235 Elf_Internal_Rela outrel;
5236 bfd_vma off;
5237 bfd_byte *loc;
5238 int indx = 0;
5239
5240 BFD_ASSERT (sgot != NULL);
5241 if (h != NULL)
5242 {
5243 bfd_boolean dyn;
5244
5245 off = h->got.offset;
5246 BFD_ASSERT (off != (bfd_vma) - 1);
5247 dyn = htab->root.dynamic_sections_created;
5248 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5249 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5250 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5251 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5252 indx = h->dynindx;
5253 }
5254 else
5255 {
5256 /* Never happen currently. */
5257 BFD_ASSERT (local_got_offsets != NULL
5258 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5259
5260 off = local_got_offsets[r_symndx];
5261
5262 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5263 }
5264 relocation = sgot->output_section->vma + sgot->output_offset + off;
5265
5266 if (r_type == R_NDS32_TLS_IE_LO12S2)
5267 break;
5268
5269 /* The offset must always be a multiple of 4. We use
5270 the least significant bit to record whether we have
5271 already processed this entry. */
5272 if ((off & 1) != 0)
5273 off &= ~1;
5274 else
5275 {
5276 bfd_boolean need_relocs = FALSE;
5277 srelgot = htab->srelgot;
0e1862bb 5278 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC		 5279 && (h == NULL
5280 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5281 || h->root.type != bfd_link_hash_undefweak))
5282 {
5283 need_relocs = TRUE;
5284 BFD_ASSERT (srelgot != NULL);
5285 }
5286 if (tls_type & GOT_TLS_IE)
5287 {
5288 if (need_relocs)
5289 {
5290 if (h->dynindx == 0)
5291 outrel.r_addend = relocation - dtpoff_base (info);
5292 else
5293 outrel.r_addend = 0;
5294 outrel.r_offset = (sgot->output_section->vma
5295 + sgot->output_offset
5296 + off);
5297 outrel.r_info =
5298 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5299
5300 loc = srelgot->contents;
5301 loc +=
5302 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5303 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5304 ++srelgot->reloc_count;
5305 }
5306 else
5307 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5308 sgot->contents + off);
5309 }
5310 }
5311 }
5312 break;
5313
35c08157
KLC		 5314 /* DON'T fall through. */
5315
5316 default:
5317 /* OLD_NDS32_RELOC. */
5318
5319 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5320 contents, offset, relocation, addend);
5321 goto check_reloc;
5322 }
5323
5324 switch ((int) r_type)
5325 {
5326 case R_NDS32_20_RELA:
5327 case R_NDS32_5_RELA:
5328 case R_NDS32_9_PCREL_RELA:
5329 case R_NDS32_WORD_9_PCREL_RELA:
5330 case R_NDS32_10_UPCREL_RELA:
5331 case R_NDS32_15_PCREL_RELA:
5332 case R_NDS32_17_PCREL_RELA:
5333 case R_NDS32_25_PCREL_RELA:
5334 case R_NDS32_25_ABS_RELA:
5335 case R_NDS32_HI20_RELA:
5336 case R_NDS32_LO12S3_RELA:
5337 case R_NDS32_LO12S2_RELA:
5338 case R_NDS32_LO12S2_DP_RELA:
5339 case R_NDS32_LO12S2_SP_RELA:
5340 case R_NDS32_LO12S1_RELA:
5341 case R_NDS32_LO12S0_RELA:
5342 case R_NDS32_LO12S0_ORI_RELA:
5343 case R_NDS32_SDA16S3_RELA:
5344 case R_NDS32_SDA17S2_RELA:
5345 case R_NDS32_SDA18S1_RELA:
5346 case R_NDS32_SDA19S0_RELA:
5347 case R_NDS32_SDA15S3_RELA:
5348 case R_NDS32_SDA15S2_RELA:
5349 case R_NDS32_SDA12S2_DP_RELA:
5350 case R_NDS32_SDA12S2_SP_RELA:
5351 case R_NDS32_SDA15S1_RELA:
5352 case R_NDS32_SDA15S0_RELA:
5353 case R_NDS32_SDA_FP7U2_RELA:
5354 case R_NDS32_9_PLTREL:
5355 case R_NDS32_25_PLTREL:
5356 case R_NDS32_GOT20:
5357 case R_NDS32_GOT_HI20:
5358 case R_NDS32_GOT_LO12:
5359 case R_NDS32_GOT_LO15:
5360 case R_NDS32_GOT_LO19:
5361 case R_NDS32_GOT15S2_RELA:
5362 case R_NDS32_GOT17S2_RELA:
5363 case R_NDS32_GOTPC20:
5364 case R_NDS32_GOTPC_HI20:
5365 case R_NDS32_GOTPC_LO12:
5366 case R_NDS32_GOTOFF:
5367 case R_NDS32_GOTOFF_HI20:
5368 case R_NDS32_GOTOFF_LO12:
5369 case R_NDS32_GOTOFF_LO15:
5370 case R_NDS32_GOTOFF_LO19:
5371 case R_NDS32_PLTREL_HI20:
5372 case R_NDS32_PLTREL_LO12:
5373 case R_NDS32_PLT_GOTREL_HI20:
5374 case R_NDS32_PLT_GOTREL_LO12:
5375 case R_NDS32_PLT_GOTREL_LO15:
5376 case R_NDS32_PLT_GOTREL_LO19:
5377 case R_NDS32_PLT_GOTREL_LO20:
5378 case R_NDS32_17IFC_PCREL_RELA:
5379 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5380 case R_NDS32_TLS_LE_HI20:
5381 case R_NDS32_TLS_LE_LO12:
5382 case R_NDS32_TLS_IE_HI20:
5383 case R_NDS32_TLS_IE_LO12S2:
5384 case R_NDS32_TLS_LE_20:
5385 case R_NDS32_TLS_LE_15S0:
5386 case R_NDS32_TLS_LE_15S1:
5387 case R_NDS32_TLS_LE_15S2:
35c08157 5388 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5389 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5390 r = nds32_elf_final_link_relocate (howto, input_bfd,
5391 input_section, contents,
5392 rel->r_offset, relocation,
5393 rel->r_addend);
5394 break;
5395
5396 default:
5397 /* All other relocs can use default handler. */
5398 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5399 contents, rel->r_offset,
5400 relocation, rel->r_addend);
5401 break;
5402 }
5403
5404check_reloc:
5405
5406 if (r != bfd_reloc_ok)
5407 {
5408 /* FIXME: This should be generic enough to go in a utility. */
5409 const char *name;
5410
5411 if (h != NULL)
5412 name = h->root.root.string;
5413 else
5414 {
5415 name = bfd_elf_string_from_elf_section
5416 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5417 if (name == NULL || *name == '\0')
5418 name = bfd_section_name (input_bfd, sec);
5419 }
5420
5421 if (errmsg != NULL)
5422 goto common_error;
5423
5424 switch (r)
5425 {
5426 case bfd_reloc_overflow:
1a72702b
AM		 5427 (*info->callbacks->reloc_overflow)
5428 (info, (h ? &h->root : NULL), name, howto->name,
5429 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 5430 break;
5431
5432 case bfd_reloc_undefined:
1a72702b
AM		 5433 (*info->callbacks->undefined_symbol)
5434 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC		 5435 break;
5436
5437 case bfd_reloc_outofrange:
5438 errmsg = _("internal error: out of range error");
5439 goto common_error;
5440
5441 case bfd_reloc_notsupported:
5442 errmsg = _("internal error: unsupported relocation error");
5443 goto common_error;
5444
5445 case bfd_reloc_dangerous:
5446 errmsg = _("internal error: dangerous error");
5447 goto common_error;
5448
5449 default:
5450 errmsg = _("internal error: unknown error");
5451 /* Fall through. */
5452
1a72702b
AM		 5453 common_error:
5454 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5455 input_section, offset);
35c08157
KLC		 5456 break;
5457 }
5458 }
5459 }
5460
5461 return ret;
5462}
5463
5464/* Finish up dynamic symbol handling. We set the contents of various
5465 dynamic sections here. */
5466
5467static bfd_boolean
5468nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5469 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5470{
5471 struct elf_nds32_link_hash_table *htab;
5472 bfd_byte *loc;
5473
5474 htab = nds32_elf_hash_table (info);
5475
5476 if (h->plt.offset != (bfd_vma) - 1)
5477 {
5478 asection *splt;
5479 asection *sgot;
5480 asection *srela;
5481
5482 bfd_vma plt_index;
5483 bfd_vma got_offset;
5484 bfd_vma local_plt_offset;
5485 Elf_Internal_Rela rela;
5486
5487 /* This symbol has an entry in the procedure linkage table. Set
5488 it up. */
5489
5490 BFD_ASSERT (h->dynindx != -1);
5491
5492 splt = htab->splt;
5493 sgot = htab->sgotplt;
5494 srela = htab->srelplt;
5495 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5496
5497 /* Get the index in the procedure linkage table which
5498 corresponds to this symbol. This is the index of this symbol
5499 in all the symbols for which we are making plt entries. The
5500 first entry in the procedure linkage table is reserved. */
5501 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5502
5503 /* Get the offset into the .got table of the entry that
5504 corresponds to this function. Each .got entry is 4 bytes.
5505 The first three are reserved. */
5506 got_offset = (plt_index + 3) * 4;
5507
5508 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5509 if (!bfd_link_pic (info))
35c08157
KLC		 5510 {
5511 unsigned long insn;
5512
5513 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5514 + sgot->output_offset + got_offset) >> 12)
5515 & 0xfffff);
5516 bfd_putb32 (insn, splt->contents + h->plt.offset);
5517
5518 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5519 + sgot->output_offset + got_offset) & 0x0fff)
5520 >> 2);
5521 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5522
5523 insn = PLT_ENTRY_WORD2;
5524 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5525
5526 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5527 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5528
5529 insn = PLT_ENTRY_WORD4
5530 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5531 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5532 local_plt_offset = 12;
5533 }
5534 else
5535 {
5536 /* sda_base must be set at this time. */
5537 unsigned long insn;
5538 long offset;
5539
5540 /* FIXME, sda_base is 65536, it will damage opcode. */
5541 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5542 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5543 - elf_gp (output_bfd);
5544 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5545 bfd_putb32 (insn, splt->contents + h->plt.offset);
5546
5547 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5548 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5549
5550 insn = PLT_PIC_ENTRY_WORD2;
5551 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5552
5553 insn = PLT_PIC_ENTRY_WORD3;
5554 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5555
5556 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5557 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5558
5559 insn = PLT_PIC_ENTRY_WORD5
5560 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5561 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5562
5563 local_plt_offset = 16;
5564 }
5565
5566 /* Fill in the entry in the global offset table,
5567 so it will fall through to the next instruction for the first time. */
5568 bfd_put_32 (output_bfd,
5569 (splt->output_section->vma + splt->output_offset
5570 + h->plt.offset + local_plt_offset),
5571 sgot->contents + got_offset);
5572
5573 /* Fill in the entry in the .rela.plt section. */
5574 rela.r_offset = (sgot->output_section->vma
5575 + sgot->output_offset + got_offset);
5576 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5577 rela.r_addend = 0;
5578 loc = srela->contents;
5579 loc += plt_index * sizeof (Elf32_External_Rela);
5580 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5581
5582 if (!h->def_regular)
5583 {
5584 /* Mark the symbol as undefined, rather than as defined in
5585 the .plt section. Leave the value alone. */
5586 sym->st_shndx = SHN_UNDEF;
5587 if (!h->ref_regular_nonweak)
5588 sym->st_value = 0;
5589 }
5590 }
5591
5592 if (h->got.offset != (bfd_vma) - 1)
5593 {
5594 asection *sgot;
5595 asection *srela;
5596 Elf_Internal_Rela rela;
5597
5598 /* This symbol has an entry in the global offset table.
5599 Set it up. */
5600
5601 sgot = htab->sgot;
5602 srela = htab->srelgot;
5603 BFD_ASSERT (sgot != NULL && srela != NULL);
5604
5605 rela.r_offset = (sgot->output_section->vma
5606 + sgot->output_offset + (h->got.offset & ~1));
5607
5608 /* If this is a -Bsymbolic link, and the symbol is defined
5609 locally, we just want to emit a RELATIVE reloc. Likewise if
5610 the symbol was forced to be local because of a version file.
5611 The entry in the global offset table will already have been
5612 initialized in the relocate_section function. */
0e1862bb 5613 if (bfd_link_pic (info)
35c08157
KLC		 5614 && (info->symbolic
5615 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5616 {
5617 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5618 rela.r_addend = (h->root.u.def.value
5619 + h->root.u.def.section->output_section->vma
5620 + h->root.u.def.section->output_offset);
5621 }
5622 else
5623 {
5624 BFD_ASSERT ((h->got.offset & 1) == 0);
5625 bfd_put_32 (output_bfd, (bfd_vma) 0,
5626 sgot->contents + h->got.offset);
5627 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5628 rela.r_addend = 0;
5629 }
5630
5631 loc = srela->contents;
5632 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5633 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5634 ++srela->reloc_count;
5635 }
5636
5637 if (h->needs_copy)
5638 {
5639 asection *s;
5640 Elf_Internal_Rela rela;
5641
5642 /* This symbols needs a copy reloc. Set it up. */
5643
5644 BFD_ASSERT (h->dynindx != -1
5645 && (h->root.type == bfd_link_hash_defined
5646 || h->root.type == bfd_link_hash_defweak));
5647
5648 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5649 BFD_ASSERT (s != NULL);
5650
5651 rela.r_offset = (h->root.u.def.value
5652 + h->root.u.def.section->output_section->vma
5653 + h->root.u.def.section->output_offset);
5654 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5655 rela.r_addend = 0;
5656 loc = s->contents;
5657 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5658 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5659 ++s->reloc_count;
5660 }
5661
5662 /* Mark some specially defined symbols as absolute. */
5663 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5664 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5665 sym->st_shndx = SHN_ABS;
5666
5667 return TRUE;
5668}
5669
5670
5671/* Finish up the dynamic sections. */
5672
5673static bfd_boolean
5674nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5675{
5676 struct elf_nds32_link_hash_table *htab;
5677 bfd *dynobj;
5678 asection *sdyn;
5679 asection *sgot;
5680
5681 htab = nds32_elf_hash_table (info);
5682 dynobj = htab->root.dynobj;
5683
5684 sgot = htab->sgotplt;
5685 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5686
5687 if (htab->root.dynamic_sections_created)
5688 {
5689 asection *splt;
5690 Elf32_External_Dyn *dyncon, *dynconend;
5691
5692 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5693
5694 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5695 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5696
5697 for (; dyncon < dynconend; dyncon++)
5698 {
5699 Elf_Internal_Dyn dyn;
5700 asection *s;
5701
5702 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5703
5704 switch (dyn.d_tag)
5705 {
5706 default:
5707 break;
5708
5709 case DT_PLTGOT:
4ade44b7 5710 s = htab->sgotplt;
35c08157
KLC		 5711 goto get_vma;
5712 case DT_JMPREL:
4ade44b7 5713 s = htab->srelplt;
35c08157 5714 get_vma:
4ade44b7 5715 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 5716 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5717 break;
5718
5719 case DT_PLTRELSZ:
4ade44b7 5720 s = htab->srelplt;
35c08157
KLC		 5721 dyn.d_un.d_val = s->size;
5722 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5723 break;
5724
5725 case DT_RELASZ:
5726 /* My reading of the SVR4 ABI indicates that the
5727 procedure linkage table relocs (DT_JMPREL) should be
5728 included in the overall relocs (DT_RELA). This is
5729 what Solaris does. However, UnixWare can not handle
5730 that case. Therefore, we override the DT_RELASZ entry
5731 here to make it not include the JMPREL relocs. Since
5732 the linker script arranges for .rela.plt to follow all
5733 other relocation sections, we don't have to worry
5734 about changing the DT_RELA entry. */
5735 if (htab->srelplt != NULL)
5736 {
4ade44b7 5737 s = htab->srelplt;
35c08157
KLC		 5738 dyn.d_un.d_val -= s->size;
5739 }
5740 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5741 break;
5742 }
5743 }
5744
5745 /* Fill in the first entry in the procedure linkage table. */
5746 splt = htab->splt;
5747 if (splt && splt->size > 0)
5748 {
0e1862bb 5749 if (bfd_link_pic (info))
35c08157
KLC		 5750 {
5751 unsigned long insn;
5752 long offset;
5753
5754 /* FIXME, sda_base is 65536, it will damage opcode. */
5755 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5756 offset = sgot->output_section->vma + sgot->output_offset + 4
5757 - elf_gp (output_bfd);
5758 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5759 bfd_putb32 (insn, splt->contents);
5760
5761 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5762 /* here has a typo? */
5763 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5764 bfd_putb32 (insn, splt->contents + 4);
5765
5766 insn = PLT0_PIC_ENTRY_WORD2;
5767 bfd_putb32 (insn, splt->contents + 8);
5768
5769 insn = PLT0_PIC_ENTRY_WORD3;
5770 bfd_putb32 (insn, splt->contents + 12);
5771
5772 insn = PLT0_PIC_ENTRY_WORD4;
5773 bfd_putb32 (insn, splt->contents + 16);
5774
5775 insn = PLT0_PIC_ENTRY_WORD5;
5776 bfd_putb32 (insn, splt->contents + 20);
5777 }
5778 else
5779 {
5780 unsigned long insn;
5781 unsigned long addr;
5782
5783 /* addr = .got + 4 */
5784 addr = sgot->output_section->vma + sgot->output_offset + 4;
5785 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5786 bfd_putb32 (insn, splt->contents);
5787
5788 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5789 bfd_putb32 (insn, splt->contents + 4);
5790
5791 insn = PLT0_ENTRY_WORD2;
5792 bfd_putb32 (insn, splt->contents + 8);
5793
5794 insn = PLT0_ENTRY_WORD3;
5795 bfd_putb32 (insn, splt->contents + 12);
5796
5797 insn = PLT0_ENTRY_WORD4;
5798 bfd_putb32 (insn, splt->contents + 16);
5799 }
5800
5801 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5802 PLT_ENTRY_SIZE;
5803 }
5804 }
5805
5806 /* Fill in the first three entries in the global offset table. */
5807 if (sgot && sgot->size > 0)
5808 {
5809 if (sdyn == NULL)
5810 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5811 else
5812 bfd_put_32 (output_bfd,
5813 sdyn->output_section->vma + sdyn->output_offset,
5814 sgot->contents);
5815 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5816 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5817
5818 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5819 }
5820
5821 return TRUE;
5822}
5823\f
5824
5825/* Set the right machine number. */
5826
5827static bfd_boolean
5828nds32_elf_object_p (bfd *abfd)
5829{
5830 static unsigned int cur_arch = 0;
5831
5832 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5833 {
5834 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5835 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5836 }
5837
5838 switch (cur_arch)
5839 {
5840 default:
5841 case E_N1_ARCH:
5842 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5843 break;
5844 case E_N1H_ARCH:
5845 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5846 break;
5847 case E_NDS_ARCH_STAR_V2_0:
5848 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5849 break;
5850 case E_NDS_ARCH_STAR_V3_0:
5851 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5852 break;
5853 case E_NDS_ARCH_STAR_V3_M:
5854 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5855 break;
5856 }
5857
5858 return TRUE;
5859}
5860
5861/* Store the machine number in the flags field. */
5862
5863static void
5864nds32_elf_final_write_processing (bfd *abfd,
5865 bfd_boolean linker ATTRIBUTE_UNUSED)
5866{
5867 unsigned long val;
5868 static unsigned int cur_mach = 0;
5869
5870 if (bfd_mach_n1 != bfd_get_mach (abfd))
5871 {
5872 cur_mach = bfd_get_mach (abfd);
5873 }
5874
5875 switch (cur_mach)
5876 {
5877 case bfd_mach_n1:
5878 /* Only happen when object is empty, since the case is abandon. */
5879 val = E_N1_ARCH;
5880 val |= E_NDS_ABI_AABI;
5881 val |= E_NDS32_ELF_VER_1_4;
5882 break;
5883 case bfd_mach_n1h:
5884 val = E_N1H_ARCH;
5885 break;
5886 case bfd_mach_n1h_v2:
5887 val = E_NDS_ARCH_STAR_V2_0;
5888 break;
5889 case bfd_mach_n1h_v3:
5890 val = E_NDS_ARCH_STAR_V3_0;
5891 break;
5892 case bfd_mach_n1h_v3m:
5893 val = E_NDS_ARCH_STAR_V3_M;
5894 break;
5895 default:
5896 val = 0;
5897 break;
5898 }
5899
5900 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5901 elf_elfheader (abfd)->e_flags |= val;
5902}
5903
5904/* Function to keep NDS32 specific file flags. */
5905
5906static bfd_boolean
5907nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5908{
5909 BFD_ASSERT (!elf_flags_init (abfd)
5910 || elf_elfheader (abfd)->e_flags == flags);
5911
5912 elf_elfheader (abfd)->e_flags = flags;
5913 elf_flags_init (abfd) = TRUE;
5914 return TRUE;
5915}
5916
5917static unsigned int
5918convert_e_flags (unsigned int e_flags, unsigned int arch)
5919{
5920 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5921 {
5922 /* From 0.9 to 1.0. */
5923 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5924
5925 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5926 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5927 if (arch == E_NDS_ARCH_STAR_V1_0)
5928 {
5929 /* Done. */
5930 return e_flags;
5931 }
5932 }
5933
5934 /* From 1.0 to 2.0. */
5935 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5936
5937 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5938 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5939
5940 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5941 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5942 return e_flags;
5943}
5944
5945static bfd_boolean
5946nds32_check_vec_size (bfd *ibfd)
5947{
5948 static unsigned int nds32_vec_size = 0;
5949
5950 asection *sec_t = NULL;
5951 bfd_byte *contents = NULL;
5952
5953 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5954
5955 if (sec_t && sec_t->size >= 4)
5956 {
5957 /* Get vec_size in file. */
5958 unsigned int flag_t;
5959
0c4bd9d9 5960 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC		 5961 flag_t = bfd_get_32 (ibfd, contents);
5962
5963 /* The value could only be 4 or 16. */
5964
5965 if (!nds32_vec_size)
5966 /* Set if not set yet. */
5967 nds32_vec_size = (flag_t & 0x3);
5968 else if (nds32_vec_size != (flag_t & 0x3))
5969 {
5970 (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5971 " with previous modules, previous %u-byte, current %u-byte"),
5972 ibfd,
5973 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5974 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5975 return FALSE;
5976 }
5977 else
5978 /* Only keep the first vec_size section. */
5979 sec_t->flags |= SEC_EXCLUDE;
5980 }
5981
5982 return TRUE;
5983}
5984
5985/* Merge backend specific data from an object file to the output
5986 object file when linking. */
5987
5988static bfd_boolean
5989nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5990{
5991 flagword out_flags;
5992 flagword in_flags;
5993 flagword out_16regs;
5994 flagword in_no_mac;
5995 flagword out_no_mac;
5996 flagword in_16regs;
5997 flagword out_version;
5998 flagword in_version;
5999 flagword out_fpu_config;
6000 flagword in_fpu_config;
6001
6002 /* TODO: Revise to use object-attributes instead. */
6003 if (!nds32_check_vec_size (ibfd))
6004 return FALSE;
6005
6006 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6007 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6008 return TRUE;
6009
6010 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6011 {
6012 (*_bfd_error_handler)
6013 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6014
6015 bfd_set_error (bfd_error_bad_value);
6016 return FALSE;
6017 }
6018
6019 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6020 if (in_version == E_NDS32_ELF_VER_1_2)
6021 {
6022 (*_bfd_error_handler)
6023 (_("%B: warning: Older version of object file encountered, "
6024 "Please recompile with current tool chain."), ibfd);
6025 }
6026
6027 /* We may need to merge V1 and V2 arch object files to V2. */
6028 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6029 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6030 {
6031 /* Need to convert version. */
6032 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6033 == E_NDS_ARCH_STAR_RESERVED)
6034 {
6035 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6036 }
6037 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6038 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6039 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6040 {
6041 elf_elfheader (obfd)->e_flags =
6042 convert_e_flags (elf_elfheader (obfd)->e_flags,
6043 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6044 }
6045 else
6046 {
6047 elf_elfheader (ibfd)->e_flags =
6048 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6049 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6050 }
6051 }
6052
6053 /* Extract some flags. */
6054 in_flags = elf_elfheader (ibfd)->e_flags
6055 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6056 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6057
6058 /* The following flags need special treatment. */
6059 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6060 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6061 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6062
6063 /* Extract some flags. */
6064 out_flags = elf_elfheader (obfd)->e_flags
6065 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6066 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6067
6068 /* The following flags need special treatment. */
6069 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6070 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6071 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6072 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6073 if (!elf_flags_init (obfd))
6074 {
6075 /* If the input is the default architecture then do not
6076 bother setting the flags for the output architecture,
6077 instead allow future merges to do this. If no future
6078 merges ever set these flags then they will retain their
6079 unitialised values, which surprise surprise, correspond
6080 to the default values. */
6081 if (bfd_get_arch_info (ibfd)->the_default)
6082 return TRUE;
6083
6084 elf_flags_init (obfd) = TRUE;
6085 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6086
6087 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6088 && bfd_get_arch_info (obfd)->the_default)
6089 {
6090 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6091 bfd_get_mach (ibfd));
6092 }
6093
6094 return TRUE;
6095 }
6096
6097 /* Check flag compatibility. */
6098 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6099 {
6100 (*_bfd_error_handler)
6101 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6102
6103 bfd_set_error (bfd_error_bad_value);
6104 return FALSE;
6105 }
6106
6107 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6108 {
6109 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6110 {
6111 (*_bfd_error_handler)
6112 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6113
6114 bfd_set_error (bfd_error_bad_value);
6115 return FALSE;
6116 }
6117 }
6118
6119 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6120 and perf ext1 and DIV are mergerd to perf ext1. */
6121 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6122 {
6123 elf_elfheader (obfd)->e_flags =
6124 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6125 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6126 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6127 ? E_NDS32_HAS_EXT_INST : 0)
6128 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6129 ? E_NDS32_HAS_EXT_INST : 0)
6130 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6131 | ((in_version > out_version) ? out_version : in_version);
6132 }
6133 else
6134 {
6135 if (in_version != out_version)
6136 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."),
6137 ibfd, nds32_elfver_strtab[out_version],
6138 nds32_elfver_strtab[in_version]);
6139
6140 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6141 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6142 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6143 | (in_version > out_version ? out_version : in_version);
6144 }
6145
6146 return TRUE;
6147}
6148
6149/* Display the flags field. */
6150
6151static bfd_boolean
6152nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6153{
6154 FILE *file = (FILE *) ptr;
6155
6156 BFD_ASSERT (abfd != NULL && ptr != NULL);
6157
6158 _bfd_elf_print_private_bfd_data (abfd, ptr);
6159
6160 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6161
6162 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6163 {
6164 default:
6165 case E_N1_ARCH:
6166 fprintf (file, _(": n1 instructions"));
6167 break;
6168 case E_N1H_ARCH:
6169 fprintf (file, _(": n1h instructions"));
6170 break;
6171 }
6172
6173 fputc ('\n', file);
6174
6175 return TRUE;
6176}
6177
6178static unsigned int
6179nds32_elf_action_discarded (asection *sec)
6180{
6181
6182 if (strncmp
6183 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6184 return 0;
6185
6186 return _bfd_elf_default_action_discarded (sec);
6187}
6188
6189static asection *
6190nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6191 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6192 Elf_Internal_Sym *sym)
6193{
6194 if (h != NULL)
6195 switch (ELF32_R_TYPE (rel->r_info))
6196 {
6197 case R_NDS32_GNU_VTINHERIT:
6198 case R_NDS32_GNU_VTENTRY:
6199 case R_NDS32_RELA_GNU_VTINHERIT:
6200 case R_NDS32_RELA_GNU_VTENTRY:
6201 return NULL;
6202 }
6203
6204 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6205}
6206
6207static bfd_boolean
6208nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6209 const Elf_Internal_Rela *relocs)
6210{
6211 /* Update the got entry reference counts for the section being removed. */
6212 Elf_Internal_Shdr *symtab_hdr;
6213 struct elf_link_hash_entry **sym_hashes;
6214 bfd_signed_vma *local_got_refcounts;
6215 const Elf_Internal_Rela *rel, *relend;
6216
6217 elf_section_data (sec)->local_dynrel = NULL;
6218
6219 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6220 sym_hashes = elf_sym_hashes (abfd);
6221 local_got_refcounts = elf_local_got_refcounts (abfd);
6222
6223 relend = relocs + sec->reloc_count;
6224 for (rel = relocs; rel < relend; rel++)
6225 {
6226 unsigned long r_symndx;
6227 struct elf_link_hash_entry *h = NULL;
6228
6229 r_symndx = ELF32_R_SYM (rel->r_info);
6230 if (r_symndx >= symtab_hdr->sh_info)
6231 {
6232 /* External symbol. */
6233 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6234 while (h->root.type == bfd_link_hash_indirect
6235 || h->root.type == bfd_link_hash_warning)
6236 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6237 }
6238
6239 switch (ELF32_R_TYPE (rel->r_info))
6240 {
6241 case R_NDS32_GOT_HI20:
6242 case R_NDS32_GOT_LO12:
6243 case R_NDS32_GOT_LO15:
6244 case R_NDS32_GOT_LO19:
6245 case R_NDS32_GOT17S2_RELA:
6246 case R_NDS32_GOT15S2_RELA:
6247 case R_NDS32_GOTOFF:
6248 case R_NDS32_GOTOFF_HI20:
6249 case R_NDS32_GOTOFF_LO12:
6250 case R_NDS32_GOTOFF_LO15:
6251 case R_NDS32_GOTOFF_LO19:
6252 case R_NDS32_GOT20:
6253 case R_NDS32_GOTPC_HI20:
6254 case R_NDS32_GOTPC_LO12:
6255 case R_NDS32_GOTPC20:
6256 if (h != NULL)
6257 {
6258 if (h->got.refcount > 0)
6259 h->got.refcount--;
6260 }
6261 else
6262 {
6263 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6264 local_got_refcounts[r_symndx]--;
6265 }
6266 break;
6267
6268 case R_NDS32_16_RELA:
6269 case R_NDS32_20_RELA:
6270 case R_NDS32_5_RELA:
6271 case R_NDS32_32_RELA:
6272 case R_NDS32_HI20_RELA:
6273 case R_NDS32_LO12S3_RELA:
6274 case R_NDS32_LO12S2_RELA:
6275 case R_NDS32_LO12S2_DP_RELA:
6276 case R_NDS32_LO12S2_SP_RELA:
6277 case R_NDS32_LO12S1_RELA:
6278 case R_NDS32_LO12S0_RELA:
6279 case R_NDS32_LO12S0_ORI_RELA:
6280 case R_NDS32_SDA16S3_RELA:
6281 case R_NDS32_SDA17S2_RELA:
6282 case R_NDS32_SDA18S1_RELA:
6283 case R_NDS32_SDA19S0_RELA:
6284 case R_NDS32_SDA15S3_RELA:
6285 case R_NDS32_SDA15S2_RELA:
6286 case R_NDS32_SDA12S2_DP_RELA:
6287 case R_NDS32_SDA12S2_SP_RELA:
6288 case R_NDS32_SDA15S1_RELA:
6289 case R_NDS32_SDA15S0_RELA:
6290 case R_NDS32_SDA_FP7U2_RELA:
6291 case R_NDS32_15_PCREL_RELA:
6292 case R_NDS32_17_PCREL_RELA:
6293 case R_NDS32_25_PCREL_RELA:
6294 if (h != NULL)
6295 {
6296 struct elf_nds32_link_hash_entry *eh;
6297 struct elf_nds32_dyn_relocs **pp;
6298 struct elf_nds32_dyn_relocs *p;
6299
0e1862bb 6300 if (!bfd_link_pic (info) && h->plt.refcount > 0)
35c08157
KLC		 6301 h->plt.refcount -= 1;
6302
6303 eh = (struct elf_nds32_link_hash_entry *) h;
6304
6305 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6306 if (p->sec == sec)
6307 {
6308 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6309 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6310 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6311 p->pc_count -= 1;
6312 p->count -= 1;
6313 if (p->count == 0)
6314 *pp = p->next;
6315 break;
6316 }
6317 }
6318 break;
6319
6320 case R_NDS32_9_PLTREL:
6321 case R_NDS32_25_PLTREL:
6322 if (h != NULL)
6323 {
6324 if (h->plt.refcount > 0)
6325 h->plt.refcount--;
6326 }
6327 break;
6328
6329 default:
6330 break;
6331 }
6332 }
6333
6334 return TRUE;
6335}
6336
6337/* Look through the relocs for a section during the first phase.
6338 Since we don't do .gots or .plts, we just need to consider the
6339 virtual table relocs for gc. */
6340
6341static bfd_boolean
6342nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6343 asection *sec, const Elf_Internal_Rela *relocs)
6344{
6345 Elf_Internal_Shdr *symtab_hdr;
6346 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6347 const Elf_Internal_Rela *rel;
6348 const Elf_Internal_Rela *rel_end;
6349 struct elf_nds32_link_hash_table *htab;
6350 bfd *dynobj;
6351 asection *sreloc = NULL;
6352
0e1862bb 6353 if (bfd_link_relocatable (info))
35c08157
KLC		 6354 return TRUE;
6355
6356 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6357 sym_hashes = elf_sym_hashes (abfd);
6358 sym_hashes_end =
6359 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6360 if (!elf_bad_symtab (abfd))
6361 sym_hashes_end -= symtab_hdr->sh_info;
6362
6363 htab = nds32_elf_hash_table (info);
6364 dynobj = htab->root.dynobj;
6365
6366 rel_end = relocs + sec->reloc_count;
6367 for (rel = relocs; rel < rel_end; rel++)
6368 {
6369 enum elf_nds32_reloc_type r_type;
6370 struct elf_link_hash_entry *h;
6371 unsigned long r_symndx;
1c8f6a4d 6372 int tls_type, old_tls_type;
35c08157
KLC		 6373
6374 r_symndx = ELF32_R_SYM (rel->r_info);
6375 r_type = ELF32_R_TYPE (rel->r_info);
6376 if (r_symndx < symtab_hdr->sh_info)
6377 h = NULL;
6378 else
6379 {
6380 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6381 while (h->root.type == bfd_link_hash_indirect
6382 || h->root.type == bfd_link_hash_warning)
6383 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6384 }
6385
1c8f6a4d
KLC		 6386 /* Some relocs require a global offset table. We create
6387 got section here, since these relocation need got section
6388 and it is not created yet. */
35c08157
KLC		 6389 if (htab->sgot == NULL)
6390 {
6391 switch (r_type)
6392 {
6393 case R_NDS32_GOT_HI20:
6394 case R_NDS32_GOT_LO12:
6395 case R_NDS32_GOT_LO15:
6396 case R_NDS32_GOT_LO19:
6397 case R_NDS32_GOT17S2_RELA:
6398 case R_NDS32_GOT15S2_RELA:
6399 case R_NDS32_GOTOFF:
6400 case R_NDS32_GOTOFF_HI20:
6401 case R_NDS32_GOTOFF_LO12:
6402 case R_NDS32_GOTOFF_LO15:
6403 case R_NDS32_GOTOFF_LO19:
6404 case R_NDS32_GOTPC20:
6405 case R_NDS32_GOTPC_HI20:
6406 case R_NDS32_GOTPC_LO12:
6407 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6408 case R_NDS32_TLS_IE_HI20:
6409 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6410 if (dynobj == NULL)
6411 htab->root.dynobj = dynobj = abfd;
6412 if (!create_got_section (dynobj, info))
6413 return FALSE;
6414 break;
6415
6416 default:
6417 break;
6418 }
6419 }
6420
6421 switch ((int) r_type)
6422 {
6423 case R_NDS32_GOT_HI20:
6424 case R_NDS32_GOT_LO12:
6425 case R_NDS32_GOT_LO15:
6426 case R_NDS32_GOT_LO19:
6427 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6428 case R_NDS32_TLS_IE_HI20:
6429 case R_NDS32_TLS_IE_LO12S2:
6430 switch (r_type)
6431 {
6432 case R_NDS32_TLS_IE_HI20:
6433 case R_NDS32_TLS_IE_LO12S2:
6434 tls_type = GOT_TLS_IE;
6435 break;
6436 default:
6437 tls_type = GOT_NORMAL;
6438 break;
6439 }
35c08157 6440 if (h != NULL)
1c8f6a4d
KLC		 6441 {
6442 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6443 h->got.refcount += 1;
6444 }
35c08157
KLC		 6445 else
6446 {
6447 bfd_signed_vma *local_got_refcounts;
6448
6449 /* This is a global offset table entry for a local
6450 symbol. */
6451 local_got_refcounts = elf_local_got_refcounts (abfd);
6452 if (local_got_refcounts == NULL)
6453 {
6454 bfd_size_type size;
6455
6456 size = symtab_hdr->sh_info;
6457 size *= sizeof (bfd_signed_vma);
6458 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6459 if (local_got_refcounts == NULL)
6460 return FALSE;
6461 elf_local_got_refcounts (abfd) = local_got_refcounts;
6462 }
6463 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6464 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6465 }
35c08157 6466
1c8f6a4d
KLC		 6467 /* We will already have issued an error message if there
6468 is a TLS/non-TLS mismatch, based on the symbol
6469 type. So just combine any TLS types needed. */
6470 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6471 && tls_type != GOT_NORMAL)
6472 tls_type |= old_tls_type;
6473
6474 if (old_tls_type != tls_type)
6475 {
6476 if (h != NULL)
6477 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6478 else
6479 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6480 }
6481 break;
6482 case R_NDS32_9_PLTREL:
35c08157
KLC		 6483 case R_NDS32_25_PLTREL:
6484 case R_NDS32_PLTREL_HI20:
6485 case R_NDS32_PLTREL_LO12:
6486 case R_NDS32_PLT_GOTREL_HI20:
6487 case R_NDS32_PLT_GOTREL_LO12:
6488 case R_NDS32_PLT_GOTREL_LO15:
6489 case R_NDS32_PLT_GOTREL_LO19:
6490 case R_NDS32_PLT_GOTREL_LO20:
6491
6492 /* This symbol requires a procedure linkage table entry. We
6493 actually build the entry in adjust_dynamic_symbol,
6494 because this might be a case of linking PIC code without
6495 linking in any dynamic objects, in which case we don't
6496 need to generate a procedure linkage table after all. */
6497
6498 /* If this is a local symbol, we resolve it directly without
6499 creating a procedure linkage table entry. */
6500 if (h == NULL)
6501 continue;
6502
6503 if (h->forced_local)
6504 break;
6505
1c8f6a4d 6506 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6507 h->needs_plt = 1;
6508 h->plt.refcount += 1;
6509 break;
6510
6511 case R_NDS32_16_RELA:
6512 case R_NDS32_20_RELA:
6513 case R_NDS32_5_RELA:
6514 case R_NDS32_32_RELA:
6515 case R_NDS32_HI20_RELA:
6516 case R_NDS32_LO12S3_RELA:
6517 case R_NDS32_LO12S2_RELA:
6518 case R_NDS32_LO12S2_DP_RELA:
6519 case R_NDS32_LO12S2_SP_RELA:
6520 case R_NDS32_LO12S1_RELA:
6521 case R_NDS32_LO12S0_RELA:
6522 case R_NDS32_LO12S0_ORI_RELA:
6523 case R_NDS32_SDA16S3_RELA:
6524 case R_NDS32_SDA17S2_RELA:
6525 case R_NDS32_SDA18S1_RELA:
6526 case R_NDS32_SDA19S0_RELA:
6527 case R_NDS32_SDA15S3_RELA:
6528 case R_NDS32_SDA15S2_RELA:
6529 case R_NDS32_SDA12S2_DP_RELA:
6530 case R_NDS32_SDA12S2_SP_RELA:
6531 case R_NDS32_SDA15S1_RELA:
6532 case R_NDS32_SDA15S0_RELA:
6533 case R_NDS32_SDA_FP7U2_RELA:
6534 case R_NDS32_15_PCREL_RELA:
6535 case R_NDS32_17_PCREL_RELA:
6536 case R_NDS32_25_PCREL_RELA:
6537
0e1862bb 6538 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 6539 {
6540 h->non_got_ref = 1;
6541 h->plt.refcount += 1;
6542 }
6543
6544 /* If we are creating a shared library, and this is a reloc against
6545 a global symbol, or a non PC relative reloc against a local
6546 symbol, then we need to copy the reloc into the shared library.
6547 However, if we are linking with -Bsymbolic, we do not need to
6548 copy a reloc against a global symbol which is defined in an
6549 object we are including in the link (i.e., DEF_REGULAR is set).
6550 At this point we have not seen all the input files, so it is
6551 possible that DEF_REGULAR is not set now but will be set later
6552 (it is never cleared). We account for that possibility below by
6553 storing information in the dyn_relocs field of the hash table
6554 entry. A similar situation occurs when creating shared libraries
6555 and symbol visibility changes render the symbol local.
6556
6557 If on the other hand, we are creating an executable, we may need
6558 to keep relocations for symbols satisfied by a dynamic library
6559 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6560 if ((bfd_link_pic (info)
35c08157
KLC		 6561 && (sec->flags & SEC_ALLOC) != 0
6562 && ((r_type != R_NDS32_25_PCREL_RELA
6563 && r_type != R_NDS32_15_PCREL_RELA
6564 && r_type != R_NDS32_17_PCREL_RELA
6565 && !(r_type == R_NDS32_32_RELA
6566 && strcmp (sec->name, ".eh_frame") == 0))
6567 || (h != NULL
6568 && (!info->symbolic
6569 || h->root.type == bfd_link_hash_defweak
6570 || !h->def_regular))))
0e1862bb 6571 || (!bfd_link_pic (info)
35c08157
KLC		 6572 && (sec->flags & SEC_ALLOC) != 0
6573 && h != NULL
6574 && (h->root.type == bfd_link_hash_defweak
6575 || !h->def_regular)))
6576 {
6577 struct elf_nds32_dyn_relocs *p;
6578 struct elf_nds32_dyn_relocs **head;
6579
6580 if (dynobj == NULL)
6581 htab->root.dynobj = dynobj = abfd;
6582
6583 /* When creating a shared object, we must copy these
6584 relocs into the output file. We create a reloc
6585 section in dynobj and make room for the reloc. */
6586 if (sreloc == NULL)
6587 {
6588 const char *name;
6589
6590 name = bfd_elf_string_from_elf_section
6591 (abfd, elf_elfheader (abfd)->e_shstrndx,
6592 elf_section_data (sec)->rela.hdr->sh_name);
6593 if (name == NULL)
6594 return FALSE;
6595
6596 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6597 && strcmp (bfd_get_section_name (abfd, sec),
6598 name + 5) == 0);
6599
6600 sreloc = bfd_get_section_by_name (dynobj, name);
6601 if (sreloc == NULL)
6602 {
6603 flagword flags;
6604
6605 sreloc = bfd_make_section (dynobj, name);
6606 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6607 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6608 if ((sec->flags & SEC_ALLOC) != 0)
6609 flags |= SEC_ALLOC | SEC_LOAD;
6610 if (sreloc == NULL
6611 || !bfd_set_section_flags (dynobj, sreloc, flags)
6612 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6613 return FALSE;
6614
6615 elf_section_type (sreloc) = SHT_RELA;
6616 }
6617 elf_section_data (sec)->sreloc = sreloc;
6618 }
6619
6620 /* If this is a global symbol, we count the number of
6621 relocations we need for this symbol. */
6622 if (h != NULL)
6623 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6624 else
6625 {
6626 asection *s;
6627
6628 Elf_Internal_Sym *isym;
6629 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6630 if (isym == NULL)
6631 return FALSE;
6632
6633 /* Track dynamic relocs needed for local syms too. */
6634 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6635 if (s == NULL)
6636 return FALSE;
6637
6638 head = ((struct elf_nds32_dyn_relocs **)
6639 &elf_section_data (s)->local_dynrel);
6640 }
6641
6642 p = *head;
6643 if (p == NULL || p->sec != sec)
6644 {
6645 bfd_size_type amt = sizeof (*p);
6646 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6647 if (p == NULL)
6648 return FALSE;
6649 p->next = *head;
6650 *head = p;
6651 p->sec = sec;
6652 p->count = 0;
6653 p->pc_count = 0;
6654 }
6655
6656 p->count += 1;
6657 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6658 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6659 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6660 p->pc_count += 1;
6661 }
6662 break;
6663
6664 /* This relocation describes the C++ object vtable hierarchy.
6665 Reconstruct it for later use during GC. */
6666 case R_NDS32_RELA_GNU_VTINHERIT:
6667 case R_NDS32_GNU_VTINHERIT:
6668 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6669 return FALSE;
6670 break;
6671
6672 /* This relocation describes which C++ vtable entries are actually
6673 used. Record for later use during GC. */
6674 case R_NDS32_GNU_VTENTRY:
6675 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6676 return FALSE;
6677 break;
6678 case R_NDS32_RELA_GNU_VTENTRY:
6679 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6680 return FALSE;
6681 break;
6682 }
6683 }
6684
6685 return TRUE;
6686}
6687
6688/* Write VAL in uleb128 format to P, returning a pointer to the
6689 following byte.
6690 This code is copied from elf-attr.c. */
6691
6692static bfd_byte *
6693write_uleb128 (bfd_byte *p, unsigned int val)
6694{
6695 bfd_byte c;
6696 do
6697 {
6698 c = val & 0x7f;
6699 val >>= 7;
6700 if (val)
6701 c |= 0x80;
6702 *(p++) = c;
6703 }
6704 while (val);
6705 return p;
6706}
6707
6708static bfd_signed_vma
6709calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6710 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6711 int *pic_ext_target)
6712{
6713 bfd_signed_vma foff;
6714 bfd_vma symval, addend;
6715 asection *sym_sec;
6716
6717 /* Get the value of the symbol referred to by the reloc. */
6718 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6719 {
6720 Elf_Internal_Sym *isym;
6721
6722 /* A local symbol. */
6723 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6724
6725 if (isym->st_shndx == SHN_UNDEF)
6726 sym_sec = bfd_und_section_ptr;
6727 else if (isym->st_shndx == SHN_ABS)
6728 sym_sec = bfd_abs_section_ptr;
6729 else if (isym->st_shndx == SHN_COMMON)
6730 sym_sec = bfd_com_section_ptr;
6731 else
6732 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6733 symval = isym->st_value + sym_sec->output_section->vma
6734 + sym_sec->output_offset;
6735 }
6736 else
6737 {
6738 unsigned long indx;
6739 struct elf_link_hash_entry *h;
6740 bfd *owner;
6741
6742 /* An external symbol. */
6743 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6744 h = elf_sym_hashes (abfd)[indx];
6745 BFD_ASSERT (h != NULL);
6746
6747 if (h->root.type != bfd_link_hash_defined
6748 && h->root.type != bfd_link_hash_defweak)
6749 /* This appears to be a reference to an undefined
6750 symbol. Just ignore it--it will be caught by the
6751 regular reloc processing. */
6752 return 0;
6753 owner = h->root.u.def.section->owner;
6754 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6755 *pic_ext_target = 1;
6756
6757 if (h->root.u.def.section->flags & SEC_MERGE)
6758 {
6759 sym_sec = h->root.u.def.section;
6760 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6761 elf_section_data (sym_sec)->sec_info,
6762 h->root.u.def.value);
6763 symval = symval + sym_sec->output_section->vma
6764 + sym_sec->output_offset;
6765 }
6766 else
6767 symval = (h->root.u.def.value
6768 + h->root.u.def.section->output_section->vma
6769 + h->root.u.def.section->output_offset);
6770 }
6771
6772 addend = irel->r_addend;
6773
6774 foff = (symval + addend
6775 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6776 return foff;
6777}
6778
6779static bfd_vma
6780calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6781 Elf_Internal_Sym *isymbuf,
6782 Elf_Internal_Rela *irel,
6783 Elf_Internal_Shdr *symtab_hdr)
6784{
6785 bfd_vma symval;
6786
6787 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6788 {
6789 Elf_Internal_Sym *isym;
6790 asection *sym_sec;
6791 /* A local symbol. */
6792 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6793
6794 if (isym->st_shndx == SHN_UNDEF)
6795 sym_sec = bfd_und_section_ptr;
6796 else if (isym->st_shndx == SHN_ABS)
6797 sym_sec = bfd_abs_section_ptr;
6798 else if (isym->st_shndx == SHN_COMMON)
6799 sym_sec = bfd_com_section_ptr;
6800 else
6801 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6802 symval = isym->st_value + sym_sec->output_section->vma
6803 + sym_sec->output_offset;
6804 }
6805 else
6806 {
6807 unsigned long indx;
6808 struct elf_link_hash_entry *h;
6809 struct elf_nds32_link_hash_table *htab;
6810 asection *splt;
6811
6812 /* An external symbol. */
6813 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6814 h = elf_sym_hashes (abfd)[indx];
6815 BFD_ASSERT (h != NULL);
6816 htab = nds32_elf_hash_table (link_info);
6817 splt = htab->splt;
6818
6819 while (h->root.type == bfd_link_hash_indirect
6820 || h->root.type == bfd_link_hash_warning)
6821 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6822
6823 if (h->plt.offset == (bfd_vma) - 1)
6824 {
6825 if (h->root.type != bfd_link_hash_defined
6826 && h->root.type != bfd_link_hash_defweak)
6827 /* This appears to be a reference to an undefined
6828 * symbol. Just ignore it--it will be caught by the
6829 * regular reloc processing. */
6830 return 0;
6831 symval = (h->root.u.def.value
6832 + h->root.u.def.section->output_section->vma
6833 + h->root.u.def.section->output_offset);
6834 }
6835 else
6836 symval = splt->output_section->vma + h->plt.offset;
6837 }
6838
6839 return symval;
6840}
6841
6842static bfd_signed_vma
6843calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6844 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6845 Elf_Internal_Shdr *symtab_hdr)
6846{
6847 bfd_vma foff;
6848 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6849 symtab_hdr)) == 0)
6850 return 0;
6851 else
6852 return foff - (irel->r_offset
6853 + sec->output_section->vma + sec->output_offset);
6854}
6855\f
6856/* Convert a 32-bit instruction to 16-bit one.
6857 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6858 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6859 type of INSN16. Return 1 if successful. */
6860
6861static int
6862nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6863 int *pinsn_type)
6864{
6865 uint16_t insn16 = 0;
6cae483a 6866 int insn_type = 0;
35c08157
KLC		 6867 unsigned long mach = bfd_get_mach (abfd);
6868
6869 if (N32_SH5 (insn) != 0)
6870 return 0;
6871
6872 switch (N32_SUB5 (insn))
6873 {
6874 case N32_ALU1_ADD_SLLI:
6875 case N32_ALU1_ADD_SRLI:
6876 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6877 {
6878 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6879 N32_RB5 (insn));
6880 insn_type = NDS32_INSN_ADD333;
6881 }
6882 else if (N32_IS_RT4 (insn))
6883 {
6884 if (N32_RT5 (insn) == N32_RA5 (insn))
6885 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6886 else if (N32_RT5 (insn) == N32_RB5 (insn))
6887 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6888 insn_type = NDS32_INSN_ADD45;
6889 }
6890 break;
6891
6892 case N32_ALU1_SUB_SLLI:
6893 case N32_ALU1_SUB_SRLI:
6894 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6895 {
6896 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6897 N32_RB5 (insn));
6898 insn_type = NDS32_INSN_SUB333;
6899 }
6900 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6901 {
6902 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6903 insn_type = NDS32_INSN_SUB45;
6904 }
6905 break;
6906
6907 case N32_ALU1_AND_SLLI:
6908 case N32_ALU1_AND_SRLI:
6909 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6910 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6911 && N32_IS_RB3 (insn))
6912 {
6913 if (N32_RT5 (insn) == N32_RA5 (insn))
6914 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6915 else if (N32_RT5 (insn) == N32_RB5 (insn))
6916 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6917 if (insn16)
6918 insn_type = NDS32_INSN_AND33;
6919 }
6920 break;
6921
6922 case N32_ALU1_XOR_SLLI:
6923 case N32_ALU1_XOR_SRLI:
6924 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6925 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6926 && N32_IS_RB3 (insn))
6927 {
6928 if (N32_RT5 (insn) == N32_RA5 (insn))
6929 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6930 else if (N32_RT5 (insn) == N32_RB5 (insn))
6931 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6932 if (insn16)
6933 insn_type = NDS32_INSN_XOR33;
6934 }
6935 break;
6936
6937 case N32_ALU1_OR_SLLI:
6938 case N32_ALU1_OR_SRLI:
6939 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6940 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6941 && N32_IS_RB3 (insn))
6942 {
6943 if (N32_RT5 (insn) == N32_RA5 (insn))
6944 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6945 else if (N32_RT5 (insn) == N32_RB5 (insn))
6946 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6947 if (insn16)
6948 insn_type = NDS32_INSN_OR33;
6949 }
6950 break;
6951 case N32_ALU1_NOR:
6952 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6953 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6954 && N32_RA5 (insn) == N32_RB5 (insn))
6955 {
6956 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6957 insn_type = NDS32_INSN_NOT33;
6958 }
6959 break;
6960 case N32_ALU1_SRAI:
6961 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6962 {
6963 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6964 insn_type = NDS32_INSN_SRAI45;
6965 }
6966 break;
6967
6968 case N32_ALU1_SRLI:
6969 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6970 {
6971 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6972 insn_type = NDS32_INSN_SRLI45;
6973 }
6974 break;
6975
6976 case N32_ALU1_SLLI:
6977 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6978 {
6979 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6980 N32_UB5 (insn));
6981 insn_type = NDS32_INSN_SLLI333;
6982 }
6983 break;
6984
6985 case N32_ALU1_ZEH:
6986 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6987 {
6988 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6989 insn_type = NDS32_INSN_ZEH33;
6990 }
6991 break;
6992
6993 case N32_ALU1_SEB:
6994 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6995 {
6996 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6997 insn_type = NDS32_INSN_SEB33;
6998 }
6999 break;
7000
7001 case N32_ALU1_SEH:
7002 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7003 {
7004 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7005 insn_type = NDS32_INSN_SEH33;
7006 }
7007 break;
7008
7009 case N32_ALU1_SLT:
7010 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7011 {
7012 /* Implicit r15. */
7013 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7014 insn_type = NDS32_INSN_SLT45;
7015 }
7016 break;
7017
7018 case N32_ALU1_SLTS:
7019 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7020 {
7021 /* Implicit r15. */
7022 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7023 insn_type = NDS32_INSN_SLTS45;
7024 }
7025 break;
7026 }
7027
7028 if ((insn16 & 0x8000) == 0)
7029 return 0;
7030
7031 if (pinsn16)
7032 *pinsn16 = insn16;
7033 if (pinsn_type)
7034 *pinsn_type = insn_type;
7035 return 1;
7036}
7037
7038static int
7039nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7040 int *pinsn_type)
7041{
7042 uint16_t insn16 = 0;
7043 int insn_type;
7044 unsigned long mach = bfd_get_mach (abfd);
7045
7046 /* TODO: bset, bclr, btgl, btst. */
7047 if (__GF (insn, 6, 4) != 0)
7048 return 0;
7049
7050 switch (N32_IMMU (insn, 6))
7051 {
7052 case N32_ALU2_MUL:
7053 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7054 && N32_IS_RB3 (insn))
7055 {
7056 if (N32_RT5 (insn) == N32_RA5 (insn))
7057 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7058 else if (N32_RT5 (insn) == N32_RB5 (insn))
7059 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7060 if (insn16)
7061 insn_type = NDS32_INSN_MUL33;
7062 }
7063 }
7064
7065 if ((insn16 & 0x8000) == 0)
7066 return 0;
7067
7068 if (pinsn16)
7069 *pinsn16 = insn16;
7070 if (pinsn_type)
7071 *pinsn_type = insn_type;
7072 return 1;
7073}
7074
7075int
7076nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7077 int *pinsn_type)
7078{
7079 int op6;
7080 uint16_t insn16 = 0;
7081 int insn_type;
7082 unsigned long mach = bfd_get_mach (abfd);
7083
7084 /* Decode 32-bit instruction. */
7085 if (insn & 0x80000000)
7086 {
7087 /* Not 32-bit insn. */
7088 return 0;
7089 }
7090
7091 op6 = N32_OP6 (insn);
7092
7093 /* Convert it to 16-bit instruction. */
7094 switch (op6)
7095 {
7096 case N32_OP6_MOVI:
7097 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7098 {
7099 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7100 insn_type = NDS32_INSN_MOVI55;
7101 }
7102 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7103 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7104 {
7105 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7106 N32_IMM20S (insn) - 16);
7107 insn_type = NDS32_INSN_MOVPI45;
7108 }
7109 break;
7110
7111 case N32_OP6_ADDI:
7112 if (N32_IMM15S (insn) == 0)
7113 {
7114 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7115 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7116 if (mach <= MACH_V2
7117 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7118 {
7119 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7120 insn_type = NDS32_INSN_MOV55;
7121 }
7122 }
7123 else if (N32_IMM15S (insn) > 0)
7124 {
7125 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7126 {
7127 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7128 N32_IMM15S (insn));
7129 insn_type = NDS32_INSN_ADDI333;
7130 }
7131 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7132 && N32_IMM15S (insn) < 32)
7133 {
7134 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7135 insn_type = NDS32_INSN_ADDI45;
7136 }
7137 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7138 && N32_RT5 (insn) == N32_RA5 (insn)
7139 && N32_IMM15S (insn) < 512)
7140 {
7141 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7142 insn_type = NDS32_INSN_ADDI10_SP;
7143 }
7144 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7145 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7146 && (N32_IMM15S (insn) % 4 == 0))
7147 {
7148 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7149 N32_IMM15S (insn) >> 2);
7150 insn_type = NDS32_INSN_ADDRI36_SP;
7151 }
7152 }
7153 else
7154 {
7155 /* Less than 0. */
7156 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7157 {
7158 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7159 0 - N32_IMM15S (insn));
7160 insn_type = NDS32_INSN_SUBI333;
7161 }
7162 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7163 && N32_IMM15S (insn) > -32)
7164 {
1c8f6a4d
KLC		 7165 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7166 0 - N32_IMM15S (insn));
35c08157
KLC		 7167 insn_type = NDS32_INSN_SUBI45;
7168 }
7169 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7170 && N32_RT5 (insn) == N32_RA5 (insn)
7171 && N32_IMM15S (insn) >= -512)
7172 {
7173 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7174 insn_type = NDS32_INSN_ADDI10_SP;
7175 }
7176 }
7177 break;
7178
7179 case N32_OP6_ORI:
7180 if (N32_IMM15S (insn) == 0)
7181 {
7182 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7183 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7184 if (mach <= MACH_V2
7185 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7186 {
7187 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7188 insn_type = NDS32_INSN_MOV55;
7189 }
7190 }
7191 break;
7192
7193 case N32_OP6_SUBRI:
7194 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7195 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7196 {
7197 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7198 insn_type = NDS32_INSN_NEG33;
7199 }
7200 break;
7201
7202 case N32_OP6_ANDI:
7203 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7204 {
7205 if (N32_IMM15U (insn) == 1)
7206 {
7207 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7208 insn_type = NDS32_INSN_XLSB33;
7209 }
7210 else if (N32_IMM15U (insn) == 0x7ff)
7211 {
7212 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7213 insn_type = NDS32_INSN_X11B33;
7214 }
7215 else if (N32_IMM15U (insn) == 0xff)
7216 {
7217 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7218 insn_type = NDS32_INSN_ZEB33;
7219 }
7220 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7221 && N32_IMM15U (insn) < 256)
7222 {
7223 int imm15u = N32_IMM15U (insn);
7224
7225 if (__builtin_popcount (imm15u) == 1)
7226 {
7227 /* BMSKI33 */
7228 int imm3u = __builtin_ctz (imm15u);
7229
7230 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7231 insn_type = NDS32_INSN_BMSKI33;
7232 }
7233 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7234 {
7235 /* FEXTI33 */
7236 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7237
7238 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7239 insn_type = NDS32_INSN_FEXTI33;
7240 }
7241 }
7242 }
7243 break;
7244
7245 case N32_OP6_SLTI:
7246 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7247 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7248 {
7249 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7250 insn_type = NDS32_INSN_SLTI45;
7251 }
7252 break;
7253
7254 case N32_OP6_SLTSI:
7255 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7256 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7257 {
7258 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7259 insn_type = NDS32_INSN_SLTSI45;
7260 }
7261 break;
7262
7263 case N32_OP6_LWI:
7264 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7265 {
7266 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7267 insn_type = NDS32_INSN_LWI450;
7268 }
7269 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7270 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7271 {
7272 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7273 N32_IMM15S (insn));
7274 insn_type = NDS32_INSN_LWI333;
7275 }
7276 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7277 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7278 {
7279 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7280 insn_type = NDS32_INSN_LWI37;
7281 }
7282 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7283 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7284 {
7285 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7286 insn_type = NDS32_INSN_LWI37_SP;
7287 }
7288 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7289 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7290 {
1c8f6a4d
KLC		 7291 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7292 N32_IMM15S (insn) + 32);
35c08157
KLC		 7293 insn_type = NDS32_INSN_LWI45_FE;
7294 }
7295 break;
7296
7297 case N32_OP6_SWI:
7298 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7299 {
7300 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7301 insn_type = NDS32_INSN_SWI450;
7302 }
7303 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7304 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7305 {
1c8f6a4d
KLC		 7306 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7307 N32_IMM15S (insn));
35c08157
KLC		 7308 insn_type = NDS32_INSN_SWI333;
7309 }
7310 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7311 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7312 {
7313 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7314 insn_type = NDS32_INSN_SWI37;
7315 }
7316 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7317 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7318 {
7319 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7320 insn_type = NDS32_INSN_SWI37_SP;
7321 }
7322 break;
7323
7324 case N32_OP6_LWI_BI:
7325 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7326 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7327 {
7328 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7329 N32_IMM15S (insn));
7330 insn_type = NDS32_INSN_LWI333_BI;
7331 }
7332 break;
7333
7334 case N32_OP6_SWI_BI:
7335 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7336 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7337 {
7338 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7339 N32_IMM15S (insn));
7340 insn_type = NDS32_INSN_SWI333_BI;
7341 }
7342 break;
7343
7344 case N32_OP6_LHI:
7345 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7346 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7347 {
7348 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7349 N32_IMM15S (insn));
7350 insn_type = NDS32_INSN_LHI333;
7351 }
7352 break;
7353
7354 case N32_OP6_SHI:
7355 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7356 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7357 {
7358 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7359 N32_IMM15S (insn));
7360 insn_type = NDS32_INSN_SHI333;
7361 }
7362 break;
7363
7364 case N32_OP6_LBI:
7365 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7366 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7367 {
7368 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7369 N32_IMM15S (insn));
7370 insn_type = NDS32_INSN_LBI333;
7371 }
7372 break;
7373
7374 case N32_OP6_SBI:
7375 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7376 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7377 {
7378 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7379 N32_IMM15S (insn));
7380 insn_type = NDS32_INSN_SBI333;
7381 }
7382 break;
7383
7384 case N32_OP6_ALU1:
7385 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7386
7387 case N32_OP6_ALU2:
7388 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7389
7390 case N32_OP6_BR1:
7391 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7392 goto done;
7393
7394 if ((insn & __BIT (14)) == 0)
7395 {
7396 /* N32_BR1_BEQ */
7397 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7398 && N32_RT5 (insn) != REG_R5)
7399 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7400 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7401 && N32_RA5 (insn) != REG_R5)
7402 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7403 insn_type = NDS32_INSN_BEQS38;
7404 break;
7405 }
7406 else
7407 {
7408 /* N32_BR1_BNE */
7409 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7410 && N32_RT5 (insn) != REG_R5)
7411 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7412 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7413 && N32_RA5 (insn) != REG_R5)
7414 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7415 insn_type = NDS32_INSN_BNES38;
7416 break;
7417 }
7418 break;
7419
7420 case N32_OP6_BR2:
7421 switch (N32_BR2_SUB (insn))
7422 {
7423 case N32_BR2_BEQZ:
7424 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7425 {
7426 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7427 insn_type = NDS32_INSN_BEQZ38;
7428 }
1c8f6a4d
KLC		 7429 else if (N32_RT5 (insn) == REG_R15
7430 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7431 {
7432 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7433 insn_type = NDS32_INSN_BEQZS8;
7434 }
7435 break;
7436
7437 case N32_BR2_BNEZ:
7438 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7439 {
7440 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7441 insn_type = NDS32_INSN_BNEZ38;
7442 }
1c8f6a4d
KLC		 7443 else if (N32_RT5 (insn) == REG_R15
7444 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7445 {
7446 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7447 insn_type = NDS32_INSN_BNEZS8;
7448 }
7449 break;
7450
7451 case N32_BR2_IFCALL:
7452 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7453 {
7454 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7455 insn_type = NDS32_INSN_IFCALL9;
7456 }
7457 break;
7458 }
7459 break;
7460
7461 case N32_OP6_JI:
7462 if ((insn & __BIT (24)) == 0)
7463 {
7464 /* N32_JI_J */
7465 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7466 {
7467 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7468 insn_type = NDS32_INSN_J8;
7469 }
7470 }
7471 break;
7472
7473 case N32_OP6_JREG:
7474 if (__GF (insn, 8, 2) != 0)
7475 goto done;
7476
7477 switch (N32_IMMU (insn, 5))
7478 {
7479 case N32_JREG_JR:
7480 if (N32_JREG_HINT (insn) == 0)
7481 {
7482 /* jr */
7483 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7484 insn_type = NDS32_INSN_JR5;
7485 }
7486 else if (N32_JREG_HINT (insn) == 1)
7487 {
7488 /* ret */
7489 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7490 insn_type = NDS32_INSN_RET5;
7491 }
7492 else if (N32_JREG_HINT (insn) == 3)
7493 {
7494 /* ifret = mov55 $sp, $sp */
7495 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7496 insn_type = NDS32_INSN_IFRET;
7497 }
7498 break;
7499
7500 case N32_JREG_JRAL:
7501 /* It's convertible when return rt5 is $lp and address
7502 translation is kept. */
7503 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7504 {
7505 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7506 insn_type = NDS32_INSN_JRAL5;
7507 }
7508 break;
7509 }
7510 break;
7511
7512 case N32_OP6_MISC:
7513 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7514 {
7515 /* For v3, swid above 31 are used for ex9.it. */
7516 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7517 insn_type = NDS32_INSN_BREAK16;
7518 }
7519 break;
7520
7521 default:
7522 /* This instruction has no 16-bit variant. */
7523 goto done;
7524 }
7525
7526done:
7527 /* Bit-15 of insn16 should be set for a valid instruction. */
7528 if ((insn16 & 0x8000) == 0)
7529 return 0;
7530
7531 if (pinsn16)
7532 *pinsn16 = insn16;
7533 if (pinsn_type)
7534 *pinsn_type = insn_type;
7535 return 1;
7536}
7537
7538static int
7539special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7540 Elf_Internal_Rela *reloc)
7541{
7542 uint16_t insn16 = 0;
7543
7544 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7545 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7546 return 0;
7547
7548 if (!N32_IS_RT3 (insn))
7549 return 0;
7550
7551 switch (N32_OP6 (insn))
7552 {
7553 case N32_OP6_LWI:
7554 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7555 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7556 break;
7557 case N32_OP6_SWI:
7558 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7559 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7560 break;
7561 case N32_OP6_HWGP:
7562 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7563 break;
7564
7565 if (__GF (insn, 17, 3) == 6)
7566 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7567 else if (__GF (insn, 17, 3) == 7)
7568 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7569 break;
7570 }
7571
7572 if ((insn16 & 0x8000) == 0)
7573 return 0;
7574
7575 *pinsn16 = insn16;
7576 return 1;
7577}
7578
7579/* Convert a 16-bit instruction to 32-bit one.
7580 INSN16 it the input and PINSN it the point to output.
7581 Return non-zero on successful. Otherwise 0 is returned. */
7582
7583int
7584nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7585{
7586 uint32_t insn = 0xffffffff;
7587 unsigned long mach = bfd_get_mach (abfd);
7588
7589 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7590
7591 switch (__GF (insn16, 9, 6))
7592 {
7593 case 0x4: /* add45 */
1c8f6a4d
KLC		 7594 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7595 N16_RA5 (insn16));
35c08157
KLC		 7596 goto done;
7597 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7598 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7599 N16_RA5 (insn16));
35c08157
KLC		 7600 goto done;
7601 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7602 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7603 N16_IMM5U (insn16));
35c08157
KLC		 7604 goto done;
7605 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7606 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7607 -N16_IMM5U (insn16));
35c08157
KLC		 7608 goto done;
7609 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7610 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7611 N16_IMM5U (insn16));
35c08157
KLC		 7612 goto done;
7613 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7614 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7615 N16_IMM5U (insn16));
35c08157 7616 goto done;
35c08157 7617 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7618 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7619 N16_IMM3U (insn16));
35c08157
KLC		 7620 goto done;
7621 case 0xc: /* add333 */
1c8f6a4d
KLC		 7622 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7623 N16_RB3 (insn16));
35c08157
KLC		 7624 goto done;
7625 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7626 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7627 N16_RB3 (insn16));
35c08157
KLC		 7628 goto done;
7629 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7630 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7631 N16_IMM3U (insn16));
35c08157
KLC		 7632 goto done;
7633 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7634 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7635 -N16_IMM3U (insn16));
35c08157 7636 goto done;
35c08157 7637 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7638 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7639 N16_IMM3U (insn16));
35c08157
KLC		 7640 goto done;
7641 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7642 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7643 N16_IMM3U (insn16));
35c08157
KLC		 7644 goto done;
7645 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7646 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7647 N16_IMM3U (insn16));
35c08157
KLC		 7648 goto done;
7649 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7650 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7651 N16_IMM3U (insn16));
35c08157
KLC		 7652 goto done;
7653 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7654 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7655 N16_IMM3U (insn16));
35c08157
KLC		 7656 goto done;
7657 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7658 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7659 N16_IMM3U (insn16));
35c08157
KLC		 7660 goto done;
7661 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7662 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7663 N16_IMM3U (insn16));
35c08157
KLC		 7664 goto done;
7665 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7666 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7667 N16_IMM3U (insn16));
35c08157 7668 goto done;
35c08157 7669 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7670 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7671 N16_IMM6U (insn16) << 2);
35c08157 7672 goto done;
35c08157 7673 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7674 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7675 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7676 goto done;
7677 case 0x1a: /* lwi450 */
7678 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7679 goto done;
7680 case 0x1b: /* swi450 */
7681 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7682 goto done;
7683
1c8f6a4d 7684 /* These are r15 implied instructions. */
35c08157
KLC		 7685 case 0x30: /* slts45 */
7686 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7687 goto done;
7688 case 0x31: /* slt45 */
7689 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7690 goto done;
7691 case 0x32: /* sltsi45 */
7692 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7693 goto done;
7694 case 0x33: /* slti45 */
7695 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7696 goto done;
7697 case 0x34: /* beqzs8, bnezs8 */
7698 if (insn16 & __BIT (8))
7699 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7700 else
7701 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7702 goto done;
7703
7704 case 0x35: /* break16, ex9.it */
7705 /* Only consider range of v3 break16. */
7706 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7707 goto done;
7708
7709 case 0x3c: /* ifcall9 */
7710 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7711 goto done;
7712 case 0x3d: /* movpi45 */
7713 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7714 goto done;
7715
7716 case 0x3f: /* MISC33 */
1c8f6a4d 7717 switch (insn16 & 0x7)
35c08157
KLC		 7718 {
7719 case 2: /* neg33 */
7720 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7721 break;
7722 case 3: /* not33 */
1c8f6a4d
KLC		 7723 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7724 N16_RA3 (insn16));
35c08157
KLC		 7725 break;
7726 case 4: /* mul33 */
1c8f6a4d
KLC		 7727 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7728 N16_RA3 (insn16));
35c08157
KLC		 7729 break;
7730 case 5: /* xor33 */
1c8f6a4d
KLC		 7731 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7732 N16_RA3 (insn16));
35c08157
KLC		 7733 break;
7734 case 6: /* and33 */
1c8f6a4d
KLC		 7735 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7736 N16_RA3 (insn16));
35c08157
KLC		 7737 break;
7738 case 7: /* or33 */
1c8f6a4d
KLC		 7739 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7740 N16_RA3 (insn16));
35c08157
KLC		 7741 break;
7742 }
7743 goto done;
7744
1c8f6a4d 7745 case 0xb:
35c08157
KLC		 7746 switch (insn16 & 0x7)
7747 {
7748 case 0: /* zeb33 */
7749 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7750 break;
7751 case 1: /* zeh33 */
7752 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7753 break;
7754 case 2: /* seb33 */
7755 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7756 break;
7757 case 3: /* seh33 */
7758 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7759 break;
7760 case 4: /* xlsb33 */
7761 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7762 break;
7763 case 5: /* x11b33 */
7764 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7765 break;
7766 case 6: /* bmski33 */
7767 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7768 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7769 break;
7770 case 7: /* fexti33 */
7771 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7772 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7773 break;
7774 }
7775 goto done;
7776 }
7777
7778 switch (__GF (insn16, 10, 5))
7779 {
7780 case 0x0: /* mov55 or ifret16 */
7781 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7782 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7783 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7784 else
1c8f6a4d 7785 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7786 goto done;
7787 case 0x1: /* movi55 */
7788 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7789 goto done;
7790 case 0x1b: /* addi10s (V2) */
7791 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7792 goto done;
7793 }
7794
7795 switch (__GF (insn16, 11, 4))
7796 {
7797 case 0x7: /* lwi37.fp/swi37.fp */
7798 if (insn16 & __BIT (7)) /* swi37.fp */
7799 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7800 else /* lwi37.fp */
7801 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7802 goto done;
7803 case 0x8: /* beqz38 */
7804 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7805 goto done;
7806 case 0x9: /* bnez38 */
7807 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7808 goto done;
7809 case 0xa: /* beqs38/j8, implied r5 */
7810 if (N16_RT38 (insn16) == 5)
7811 insn = N32_JI (J, N16_IMM8S (insn16));
7812 else
7813 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7814 goto done;
7815 case 0xb: /* bnes38 and others */
7816 if (N16_RT38 (insn16) == 5)
7817 {
7818 switch (__GF (insn16, 5, 3))
7819 {
7820 case 0: /* jr5 */
7821 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7822 break;
7823 case 4: /* ret5 */
7824 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7825 break;
7826 case 1: /* jral5 */
7827 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7828 break;
7829 case 2: /* ex9.it imm5 */
7830 /* ex9.it had no 32-bit variantl. */
7831 break;
7832 case 5: /* add5.pc */
7833 /* add5.pc had no 32-bit variantl. */
7834 break;
7835 }
7836 }
7837 else /* bnes38 */
7838 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7839 goto done;
7840 case 0xe: /* lwi37/swi37 */
7841 if (insn16 & (1 << 7)) /* swi37.sp */
7842 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7843 else /* lwi37.sp */
7844 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7845 goto done;
7846 }
7847
7848done:
7849 if (insn & 0x80000000)
7850 return 0;
7851
7852 if (pinsn)
7853 *pinsn = insn;
7854 return 1;
7855}
7856\f
7857static bfd_boolean
7858is_sda_access_insn (unsigned long insn)
7859{
7860 switch (N32_OP6 (insn))
7861 {
7862 case N32_OP6_LWI:
7863 case N32_OP6_LHI:
7864 case N32_OP6_LHSI:
7865 case N32_OP6_LBI:
7866 case N32_OP6_LBSI:
7867 case N32_OP6_SWI:
7868 case N32_OP6_SHI:
7869 case N32_OP6_SBI:
7870 case N32_OP6_LWC:
7871 case N32_OP6_LDC:
7872 case N32_OP6_SWC:
7873 case N32_OP6_SDC:
7874 return TRUE;
7875 default:
7876 ;
7877 }
7878 return FALSE;
7879}
7880
7881static unsigned long
7882turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7883{
7884 uint32_t oinsn = 0;
7885
7886 switch (type)
7887 {
7888 case R_NDS32_GOT_LO12:
7889 case R_NDS32_GOTOFF_LO12:
7890 case R_NDS32_PLTREL_LO12:
7891 case R_NDS32_PLT_GOTREL_LO12:
7892 case R_NDS32_LO12S0_RELA:
7893 switch (N32_OP6 (insn))
7894 {
7895 case N32_OP6_LBI:
7896 /* lbi.gp */
7897 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7898 break;
7899 case N32_OP6_LBSI:
7900 /* lbsi.gp */
7901 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7902 break;
7903 case N32_OP6_SBI:
7904 /* sbi.gp */
7905 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7906 break;
7907 case N32_OP6_ORI:
7908 /* addi.gp */
7909 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7910 break;
7911 }
7912 break;
7913
7914 case R_NDS32_LO12S1_RELA:
7915 switch (N32_OP6 (insn))
7916 {
7917 case N32_OP6_LHI:
7918 /* lhi.gp */
7919 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7920 break;
7921 case N32_OP6_LHSI:
7922 /* lhsi.gp */
7923 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7924 break;
7925 case N32_OP6_SHI:
7926 /* shi.gp */
7927 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7928 break;
7929 }
7930 break;
7931
7932 case R_NDS32_LO12S2_RELA:
7933 switch (N32_OP6 (insn))
7934 {
7935 case N32_OP6_LWI:
7936 /* lwi.gp */
7937 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7938 break;
7939 case N32_OP6_SWI:
7940 /* swi.gp */
7941 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7942 break;
7943 }
7944 break;
7945
7946 case R_NDS32_LO12S2_DP_RELA:
7947 case R_NDS32_LO12S2_SP_RELA:
7948 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7949 break;
7950 }
7951
7952 if (oinsn)
7953 *pinsn = oinsn;
7954
7955 return oinsn != 0;
7956}
7957
7958/* Linker hasn't found the correct merge section for non-section symbol
7959 in relax time, this work is left to the function elf_link_input_bfd().
7960 So for non-section symbol, _bfd_merged_section_offset is also needed
7961 to find the correct symbol address. */
7962
7963static bfd_vma
7964nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7965 asection **psec, Elf_Internal_Rela *rel)
7966{
7967 asection *sec = *psec;
7968 bfd_vma relocation;
7969
7970 relocation = (sec->output_section->vma
7971 + sec->output_offset + sym->st_value);
7972 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7973 {
7974 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7975 rel->r_addend =
7976 _bfd_merged_section_offset (abfd, psec,
7977 elf_section_data (sec)->sec_info,
7978 sym->st_value + rel->r_addend);
7979 else
7980 rel->r_addend =
7981 _bfd_merged_section_offset (abfd, psec,
7982 elf_section_data (sec)->sec_info,
7983 sym->st_value) + rel->r_addend;
7984
7985 if (sec != *psec)
7986 {
7987 /* If we have changed the section, and our original section is
7988 marked with SEC_EXCLUDE, it means that the original
7989 SEC_MERGE section has been completely subsumed in some
7990 other SEC_MERGE section. In this case, we need to leave
7991 some info around for --emit-relocs. */
7992 if ((sec->flags & SEC_EXCLUDE) != 0)
7993 sec->kept_section = *psec;
7994 sec = *psec;
7995 }
7996 rel->r_addend -= relocation;
7997 rel->r_addend += sec->output_section->vma + sec->output_offset;
7998 }
7999 return relocation;
8000}
8001
8002static bfd_vma
8003calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8004 Elf_Internal_Sym *isymbuf,
8005 Elf_Internal_Shdr *symtab_hdr)
8006{
8007 bfd_signed_vma foff;
8008 bfd_vma symval, addend;
8009 Elf_Internal_Rela irel_fn;
8010 Elf_Internal_Sym *isym;
8011 asection *sym_sec;
8012
8013 /* Get the value of the symbol referred to by the reloc. */
8014 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8015 {
8016 /* A local symbol. */
8017 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8018
8019 if (isym->st_shndx == SHN_UNDEF)
8020 sym_sec = bfd_und_section_ptr;
8021 else if (isym->st_shndx == SHN_ABS)
8022 sym_sec = bfd_abs_section_ptr;
8023 else if (isym->st_shndx == SHN_COMMON)
8024 sym_sec = bfd_com_section_ptr;
8025 else
8026 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8027 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8028 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8029 addend = irel_fn.r_addend;
8030 }
8031 else
8032 {
8033 unsigned long indx;
8034 struct elf_link_hash_entry *h;
8035
8036 /* An external symbol. */
8037 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8038 h = elf_sym_hashes (abfd)[indx];
8039 BFD_ASSERT (h != NULL);
8040
8041 while (h->root.type == bfd_link_hash_indirect
8042 || h->root.type == bfd_link_hash_warning)
8043 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8044
8045 if (h->root.type != bfd_link_hash_defined
8046 && h->root.type != bfd_link_hash_defweak)
8047 /* This appears to be a reference to an undefined
8048 symbol. Just ignore it--it will be caught by the
8049 regular reloc processing. */
8050 return 0;
8051
8052 if (h->root.u.def.section->flags & SEC_MERGE)
8053 {
8054 sym_sec = h->root.u.def.section;
8055 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8056 (sym_sec)->sec_info, h->root.u.def.value);
8057 symval = symval + sym_sec->output_section->vma
8058 + sym_sec->output_offset;
8059 }
8060 else
8061 symval = (h->root.u.def.value
8062 + h->root.u.def.section->output_section->vma
8063 + h->root.u.def.section->output_offset);
8064 addend = irel->r_addend;
8065 }
8066
8067 foff = symval + addend;
8068
8069 return foff;
8070}
8071
8072static bfd_vma
8073calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8074 Elf_Internal_Rela *irel,
8075 Elf_Internal_Shdr *symtab_hdr)
8076{
8077 int symndx;
8078 bfd_vma *local_got_offsets;
8079 /* Get the value of the symbol referred to by the reloc. */
8080 struct elf_link_hash_entry *h;
8081 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8082
8083 /* An external symbol. */
8084 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8085 h = elf_sym_hashes (abfd)[symndx];
8086 while (h->root.type == bfd_link_hash_indirect
8087 || h->root.type == bfd_link_hash_warning)
8088 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8089
8090 if (symndx >= 0)
8091 {
8092 BFD_ASSERT (h != NULL);
8093 return htab->sgot->output_section->vma + htab->sgot->output_offset
8094 + h->got.offset;
8095 }
8096 else
8097 {
8098 local_got_offsets = elf_local_got_offsets (abfd);
8099 BFD_ASSERT (local_got_offsets != NULL);
8100 return htab->sgot->output_section->vma + htab->sgot->output_offset
8101 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8102 }
8103
8104 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8105 /* The check of h->root.type is passed. */
8106}
8107
8108static int
8109is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8110 asection *sec, Elf_Internal_Rela *rel)
8111{
8112 bfd_byte *contents;
8113 unsigned short insn16;
8114
8115 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8116 return FALSE;
8117 contents = elf_section_data (sec)->this_hdr.contents;
8118 insn16 = bfd_getb16 (contents + rel->r_offset);
8119 if (insn16 == NDS32_NOP16)
8120 return TRUE;
8121 return FALSE;
8122}
8123
8124/* It checks whether the instruction could be converted to
8125 16-bit form and returns the converted one.
8126
8127 `internal_relocs' is supposed to be sorted. */
8128
8129static int
8130is_convert_32_to_16 (bfd *abfd, asection *sec,
8131 Elf_Internal_Rela *reloc,
8132 Elf_Internal_Rela *internal_relocs,
8133 Elf_Internal_Rela *irelend,
8134 uint16_t *insn16)
8135{
8136#define NORMAL_32_TO_16 (1 << 0)
8137#define SPECIAL_32_TO_16 (1 << 1)
8138 bfd_byte *contents = NULL;
8139 bfd_signed_vma off;
8140 bfd_vma mem_addr;
8141 uint32_t insn = 0;
8142 Elf_Internal_Rela *pc_rel;
8143 int pic_ext_target = 0;
8144 Elf_Internal_Shdr *symtab_hdr;
8145 Elf_Internal_Sym *isymbuf = NULL;
8146 int convert_type;
8147 bfd_vma offset;
8148
8149 if (reloc->r_offset + 4 > sec->size)
8150 return FALSE;
8151
8152 offset = reloc->r_offset;
8153
0c4bd9d9 8154 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 8155 return FALSE;
8156 insn = bfd_getb32 (contents + offset);
8157
8158 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8159 convert_type = NORMAL_32_TO_16;
8160 else if (special_convert_32_to_16 (insn, insn16, reloc))
8161 convert_type = SPECIAL_32_TO_16;
8162 else
8163 return FALSE;
8164
8165 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8166 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8167 return FALSE;
8168
8169 /* Find the first relocation of the same relocation-type,
8170 so we iteratie them forward. */
8171 pc_rel = reloc;
1c8f6a4d 8172 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 8173 pc_rel--;
8174
8175 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8176 {
8177 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8178 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8179 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8180 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8181 {
8182 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8183 &pic_ext_target);
1c8f6a4d
KLC		 8184 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8185 || off == 0)
35c08157
KLC		 8186 return FALSE;
8187 break;
8188 }
8189 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8190 {
8191 /* movi => movi55 */
1c8f6a4d
KLC		 8192 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8193 symtab_hdr);
8194 /* mem_addr is unsigned, but the value should
8195 be between [-16, 15]. */
35c08157
KLC		 8196 if ((mem_addr + 0x10) >> 5)
8197 return FALSE;
8198 break;
8199 }
1c8f6a4d
KLC		 8200 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8201 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8202 {
8203 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8204 because it can be relaxed to addi for TLS_LE_ADD. */
8205 return FALSE;
8206 }
35c08157
KLC		 8207 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8208 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8209 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8210 && convert_type == SPECIAL_32_TO_16)
8211 {
8212 /* fp-as-gp
8213 We've selected a best fp-base for this access, so we can
8214 always resolve it anyway. Do nothing. */
8215 break;
8216 }
8217 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8218 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8219 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8220 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8221 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8222 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8223 {
1c8f6a4d
KLC		 8224 /* Prevent unresolved addi instruction translate
8225 to addi45 or addi333. */
35c08157
KLC		 8226 return FALSE;
8227 }
1c8f6a4d
KLC		 8228 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8229 {
8230 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8231 &pic_ext_target);
8232 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8233 return FALSE;
8234 break;
8235 }
35c08157
KLC		 8236 }
8237
8238 return TRUE;
8239}
8240
8241static void
8242nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8243 Elf_Internal_Rela *reloc,
8244 Elf_Internal_Rela *internal_relocs,
8245 Elf_Internal_Rela *irelend,
8246 unsigned short insn16)
8247{
8248 Elf_Internal_Rela *pc_rel;
8249 bfd_vma offset;
8250
8251 offset = reloc->r_offset;
8252 bfd_putb16 (insn16, contents + offset);
8253 /* Find the first relocation of the same relocation-type,
8254 so we iteratie them forward. */
8255 pc_rel = reloc;
8256 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8257 pc_rel--;
8258
8259 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8260 {
8261 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8262 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8263 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8264 {
8265 pc_rel->r_info =
8266 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8267 }
8268 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8269 pc_rel->r_info =
8270 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8271 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8272 pc_rel->r_info =
8273 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8274 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8275 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8276 pc_rel->r_info =
8277 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8278 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8279 pc_rel->r_info =
8280 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8281 }
8282}
8283
8284/* Find a relocation of type specified by `reloc_type'
8285 of the same r_offset with reloc.
8286 If not found, return irelend.
8287
8288 Assuming relocations are sorted by r_offset,
8289 we find the relocation from `reloc' backward untill relocs,
8290 or find it from `reloc' forward untill irelend. */
8291
8292static Elf_Internal_Rela *
8293find_relocs_at_address (Elf_Internal_Rela *reloc,
8294 Elf_Internal_Rela *relocs,
8295 Elf_Internal_Rela *irelend,
8296 enum elf_nds32_reloc_type reloc_type)
8297{
8298 Elf_Internal_Rela *rel_t;
8299
8300 /* Find backward. */
8301 for (rel_t = reloc;
8302 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8303 rel_t--)
8304 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8305 return rel_t;
8306
1c8f6a4d 8307 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8308 for (rel_t = reloc;
8309 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8310 rel_t++)
8311 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8312 return rel_t;
8313
8314 return irelend;
8315}
8316
8317/* Find a relocation of specified type and offset.
8318 `reloc' is just a refence point to find a relocation at specified offset.
8319 If not found, return irelend.
8320
8321 Assuming relocations are sorted by r_offset,
8322 we find the relocation from `reloc' backward untill relocs,
8323 or find it from `reloc' forward untill irelend. */
8324
8325static Elf_Internal_Rela *
8326find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8327 Elf_Internal_Rela *relocs,
8328 Elf_Internal_Rela *irelend,
6cae483a 8329 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8330 bfd_vma offset_p)
8331{
8332 Elf_Internal_Rela *rel_t = NULL;
8333
8334 /* First, we try to find a relocation of offset `offset_p',
8335 and then we use find_relocs_at_address to find specific type. */
8336
8337 if (reloc->r_offset > offset_p)
8338 {
8339 /* Find backward. */
8340 for (rel_t = reloc;
8341 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8342 /* Do nothing. */;
8343 }
8344 else if (reloc->r_offset < offset_p)
8345 {
8346 /* Find forward. */
8347 for (rel_t = reloc;
8348 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8349 /* Do nothing. */;
8350 }
8351 else
8352 rel_t = reloc;
8353
8354 /* Not found? */
8355 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8356 return irelend;
8357
8358 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8359}
8360
8361static bfd_boolean
8362nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8363 Elf_Internal_Rela *internal_relocs,
8364 Elf_Internal_Rela *irelend,
8365 unsigned char reloc_type)
8366{
8367 Elf_Internal_Rela *rel_t;
8368
8369 for (rel_t = reloc;
8370 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8371 rel_t--)
8372 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8373 {
8374 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8375 && rel_t->r_addend == reloc->r_addend)
8376 continue;
8377 return TRUE;
8378 }
8379
8380 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8381 rel_t++)
8382 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8383 {
8384 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8385 && rel_t->r_addend == reloc->r_addend)
8386 continue;
8387 return TRUE;
8388 }
8389
8390 return FALSE;
8391}
8392
8393typedef struct nds32_elf_blank nds32_elf_blank_t;
8394struct nds32_elf_blank
8395{
8396 /* Where the blank begins. */
8397 bfd_vma offset;
8398 /* The size of the blank. */
8399 bfd_vma size;
8400 /* The accumulative size before this blank. */
8401 bfd_vma total_size;
8402 nds32_elf_blank_t *next;
8403 nds32_elf_blank_t *prev;
8404};
8405
8406static nds32_elf_blank_t *blank_free_list = NULL;
8407
8408static nds32_elf_blank_t *
8409create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8410{
8411 nds32_elf_blank_t *blank_t;
8412
8413 if (blank_free_list)
8414 {
8415 blank_t = blank_free_list;
8416 blank_free_list = blank_free_list->next;
8417 }
8418 else
8419 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8420
8421 if (blank_t == NULL)
8422 return NULL;
8423
8424 blank_t->offset = offset_p;
8425 blank_t->size = size_p;
8426 blank_t->total_size = 0;
8427 blank_t->next = NULL;
8428 blank_t->prev = NULL;
8429
8430 return blank_t;
8431}
8432
8433static void
8434remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8435{
8436 if (blank_free_list)
8437 {
8438 blank_free_list->prev = blank_p;
8439 blank_p->next = blank_free_list;
8440 }
8441 else
8442 blank_p->next = NULL;
8443
8444 blank_p->prev = NULL;
8445 blank_free_list = blank_p;
8446}
8447
8448static void
8449clean_nds32_elf_blank (void)
8450{
8451 nds32_elf_blank_t *blank_t;
8452
8453 while (blank_free_list)
8454 {
8455 blank_t = blank_free_list;
8456 blank_free_list = blank_free_list->next;
8457 free (blank_t);
8458 }
8459}
8460
8461static nds32_elf_blank_t *
8462search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8463{
8464 nds32_elf_blank_t *blank_t;
8465
8466 if (!blank_p)
8467 return NULL;
8468 blank_t = blank_p;
8469
8470 while (blank_t && addr < blank_t->offset)
8471 blank_t = blank_t->prev;
8472 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8473 blank_t = blank_t->next;
8474
8475 return blank_t;
8476}
8477
8478static bfd_vma
8479get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8480 int overwrite)
8481{
8482 nds32_elf_blank_t *blank_t;
8483
8484 blank_t = search_nds32_elf_blank (*blank_p, addr);
8485 if (!blank_t)
8486 return 0;
8487
8488 if (overwrite)
8489 *blank_p = blank_t;
8490
8491 if (addr < blank_t->offset + blank_t->size)
8492 return blank_t->total_size + (addr - blank_t->offset);
8493 else
8494 return blank_t->total_size + blank_t->size;
8495}
8496
8497static bfd_boolean
8498insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8499{
8500 nds32_elf_blank_t *blank_t, *blank_t2;
8501
8502 if (!*blank_p)
8503 {
8504 *blank_p = create_nds32_elf_blank (addr, len);
8505 return *blank_p ? TRUE : FALSE;
8506 }
8507
8508 blank_t = search_nds32_elf_blank (*blank_p, addr);
8509
8510 if (blank_t == NULL)
8511 {
8512 blank_t = create_nds32_elf_blank (addr, len);
8513 if (!blank_t)
8514 return FALSE;
8515 while ((*blank_p)->prev != NULL)
8516 *blank_p = (*blank_p)->prev;
8517 blank_t->next = *blank_p;
8518 (*blank_p)->prev = blank_t;
8519 (*blank_p) = blank_t;
8520 return TRUE;
8521 }
8522
8523 if (addr < blank_t->offset + blank_t->size)
8524 {
8525 if (addr > blank_t->offset + blank_t->size)
8526 blank_t->size = addr - blank_t->offset;
8527 }
8528 else
8529 {
8530 blank_t2 = create_nds32_elf_blank (addr, len);
8531 if (!blank_t2)
8532 return FALSE;
8533 if (blank_t->next)
8534 {
8535 blank_t->next->prev = blank_t2;
8536 blank_t2->next = blank_t->next;
8537 }
8538 blank_t2->prev = blank_t;
8539 blank_t->next = blank_t2;
8540 *blank_p = blank_t2;
8541 }
8542
8543 return TRUE;
8544}
8545
8546static bfd_boolean
8547insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8548 bfd_vma len)
8549{
8550 nds32_elf_blank_t *blank_t;
8551
8552 if (!insert_nds32_elf_blank (blank_p, addr, len))
8553 return FALSE;
8554
8555 blank_t = *blank_p;
8556
8557 if (!blank_t->prev)
8558 {
8559 blank_t->total_size = 0;
8560 blank_t = blank_t->next;
8561 }
8562
8563 while (blank_t)
8564 {
8565 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8566 blank_t = blank_t->next;
8567 }
8568
8569 return TRUE;
8570}
8571
8572static void
8573calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8574{
8575 nds32_elf_blank_t *blank_t;
8576 bfd_vma total_size = 0;
8577
8578 if (!blank_p)
8579 return;
8580
8581 blank_t = blank_p;
8582 while (blank_t->prev)
8583 blank_t = blank_t->prev;
8584 while (blank_t)
8585 {
8586 blank_t->total_size = total_size;
8587 total_size += blank_t->size;
8588 blank_t = blank_t->next;
8589 }
8590}
8591
8592static bfd_boolean
8593nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8594 nds32_elf_blank_t *blank_p)
8595{
8596 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8597 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8598 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8599 unsigned int sec_shndx; /* The section the be relaxed. */
8600 bfd_byte *contents; /* Contents data of iterating section. */
8601 Elf_Internal_Rela *internal_relocs;
8602 Elf_Internal_Rela *irel;
8603 Elf_Internal_Rela *irelend;
8604 struct elf_link_hash_entry **sym_hashes;
8605 struct elf_link_hash_entry **end_hashes;
8606 unsigned int symcount;
8607 asection *sect;
8608 nds32_elf_blank_t *blank_t;
8609 nds32_elf_blank_t *blank_t2;
8610 nds32_elf_blank_t *blank_head;
8611
8612 blank_head = blank_t = blank_p;
8613 while (blank_head->prev != NULL)
8614 blank_head = blank_head->prev;
8615 while (blank_t->next != NULL)
8616 blank_t = blank_t->next;
8617
8618 if (blank_t->offset + blank_t->size <= sec->size)
8619 {
8620 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8621 blank_t->next->prev = blank_t;
8622 }
8623 if (blank_head->offset > 0)
8624 {
8625 blank_head->prev = create_nds32_elf_blank (0, 0);
8626 blank_head->prev->next = blank_head;
8627 blank_head = blank_head->prev;
8628 }
8629
8630 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8631
8632 /* The deletion must stop at the next ALIGN reloc for an alignment
8633 power larger than the number of bytes we are deleting. */
8634
8635 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8636 if (!nds32_get_local_syms (abfd, sec, &isym))
8637 return FALSE;
8638
8639 if (isym == NULL)
8640 {
8641 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8642 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8643 symtab_hdr->contents = (bfd_byte *) isym;
8644 }
8645
8646 if (isym == NULL || symtab_hdr->sh_info == 0)
8647 return FALSE;
8648
8649 blank_t = blank_head;
8650 calc_nds32_blank_total (blank_head);
8651
8652 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8653 {
8654 /* Adjust all the relocs. */
8655
8656 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8657 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8658 TRUE /* keep_memory */);
8659 irelend = internal_relocs + sect->reloc_count;
8660
8661 blank_t = blank_head;
8662 blank_t2 = blank_head;
8663
8664 if (!(sect->flags & SEC_RELOC))
8665 continue;
8666
0c4bd9d9 8667 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC		 8668
8669 for (irel = internal_relocs; irel < irelend; irel++)
8670 {
8671 bfd_vma raddr;
8672
8673 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8674 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8675 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8676 {
8677 unsigned long val = 0;
1c8f6a4d
KLC		 8678 unsigned long mask;
8679 long before, between;
6cae483a 8680 long offset = 0;
35c08157
KLC		 8681
8682 switch (ELF32_R_TYPE (irel->r_info))
8683 {
8684 case R_NDS32_DIFF8:
1c8f6a4d 8685 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8686 break;
8687 case R_NDS32_DIFF16:
1c8f6a4d 8688 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8689 break;
8690 case R_NDS32_DIFF32:
8691 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8692 /* Get the signed bit and mask for the high part. The
8693 gcc will alarm when right shift 32-bit since the
8694 type size of long may be 32-bit. */
8695 mask = 0 - (val >> 31);
8696 if (mask)
8697 offset = (val | (mask - 0xffffffff));
8698 else
8699 offset = val;
35c08157
KLC		 8700 break;
8701 default:
8702 BFD_ASSERT (0);
8703 }
8704
8705 /* DIFF value
8706 0 |encoded in location|
8707 |------------|-------------------|---------
8708 sym+off(addend)
8709 -- before ---| *****************
8710 --------------------- between ---|
8711
1c8f6a4d
KLC		 8712 We only care how much data are relax between DIFF,
8713 marked as ***. */
35c08157
KLC		 8714
8715 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8716 between = get_nds32_elf_blank_total (&blank_t,
8717 irel->r_addend + offset, 0);
35c08157
KLC		 8718 if (between == before)
8719 goto done_adjust_diff;
8720
8721 switch (ELF32_R_TYPE (irel->r_info))
8722 {
8723 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8724 bfd_put_8 (abfd, offset - (between - before),
8725 contents + irel->r_offset);
35c08157
KLC		 8726 break;
8727 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8728 bfd_put_16 (abfd, offset - (between - before),
8729 contents + irel->r_offset);
35c08157
KLC		 8730 break;
8731 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8732 bfd_put_32 (abfd, offset - (between - before),
8733 contents + irel->r_offset);
35c08157
KLC		 8734 break;
8735 }
8736 }
8737 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8738 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8739 {
8740 bfd_vma val = 0;
8741 unsigned int len = 0;
8742 unsigned long before, between;
8743 bfd_byte *endp, *p;
8744
1c8f6a4d
KLC		 8745 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8746 &len);
35c08157
KLC		 8747
8748 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8749 between = get_nds32_elf_blank_total (&blank_t,
8750 irel->r_addend + val, 0);
35c08157
KLC		 8751 if (between == before)
8752 goto done_adjust_diff;
8753
8754 p = contents + irel->r_offset;
8755 endp = p + len -1;
8756 memset (p, 0x80, len);
8757 *(endp) = 0;
8758 p = write_uleb128 (p, val - (between - before)) - 1;
8759 if (p < endp)
8760 *p |= 0x80;
8761 }
8762done_adjust_diff:
8763
8764 if (sec == sect)
8765 {
8766 raddr = irel->r_offset;
1c8f6a4d
KLC		 8767 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8768 irel->r_offset, 1);
35c08157
KLC		 8769
8770 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8771 continue;
8772 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8773 && (blank_t2->offset > raddr
8774 || blank_t2->next->offset <= raddr))
8775 (*_bfd_error_handler)
8776 (_("%B: %s\n"), abfd,
8777 "Error: search_nds32_elf_blank reports wrong node");
35c08157
KLC		 8778
8779 /* Mark reloc in deleted portion as NONE.
8780 For some relocs like R_NDS32_LABEL that doesn't modify the
8781 content in the section. R_NDS32_LABEL doesn't belong to the
8782 instruction in the section, so we should preserve it. */
8783 if (raddr >= blank_t2->offset
8784 && raddr < blank_t2->offset + blank_t2->size
8785 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8786 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8787 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8788 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8789 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8790 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8791 {
8792 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8793 R_NDS32_NONE);
8794 continue;
8795 }
8796 }
8797
8798 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8799 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8800 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8801 continue;
8802
8803 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8804 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8805 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8806 {
8807 if (irel->r_addend <= sec->size)
8808 irel->r_addend -=
8809 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8810 }
8811 }
8812 }
8813
8814 /* Adjust the local symbols defined in this section. */
8815 blank_t = blank_head;
8816 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8817 {
8818 if (isym->st_shndx == sec_shndx)
8819 {
8820 if (isym->st_value <= sec->size)
8821 {
8822 bfd_vma ahead;
8823 bfd_vma orig_addr = isym->st_value;
8824
8825 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8826 isym->st_value -= ahead;
8827
8828 /* Adjust function size. */
1c8f6a4d
KLC		 8829 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8830 && isym->st_size > 0)
8831 isym->st_size -=
8832 get_nds32_elf_blank_total
8833 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8834 }
8835 }
8836 }
8837
8838 /* Now adjust the global symbols defined in this section. */
8839 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8840 - symtab_hdr->sh_info);
8841 sym_hashes = elf_sym_hashes (abfd);
8842 end_hashes = sym_hashes + symcount;
8843 blank_t = blank_head;
8844 for (; sym_hashes < end_hashes; sym_hashes++)
8845 {
8846 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8847
8848 if ((sym_hash->root.type == bfd_link_hash_defined
8849 || sym_hash->root.type == bfd_link_hash_defweak)
8850 && sym_hash->root.u.def.section == sec)
8851 {
8852 if (sym_hash->root.u.def.value <= sec->size)
8853 {
8854 bfd_vma ahead;
8855 bfd_vma orig_addr = sym_hash->root.u.def.value;
8856
8857 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8858 sym_hash->root.u.def.value -= ahead;
8859
8860 /* Adjust function size. */
8861 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8862 sym_hash->size -=
8863 get_nds32_elf_blank_total
8864 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8865
8866 }
8867 }
8868 }
8869
8870 contents = elf_section_data (sec)->this_hdr.contents;
8871 blank_t = blank_head;
8872 while (blank_t->next)
8873 {
8874 /* Actually delete the bytes. */
8875
8876 /* If current blank is the last blank overlap with current section,
8877 go to finish process. */
8878 if (sec->size <= (blank_t->next->offset))
8879 break;
8880
8881 memmove (contents + blank_t->offset - blank_t->total_size,
8882 contents + blank_t->offset + blank_t->size,
8883 blank_t->next->offset - (blank_t->offset + blank_t->size));
8884
8885 blank_t = blank_t->next;
8886 }
8887
8888 if (sec->size > (blank_t->offset + blank_t->size))
8889 {
8890 /* There are remaining code between blank and section boundary.
8891 Move the remaining code to appropriate location. */
8892 memmove (contents + blank_t->offset - blank_t->total_size,
8893 contents + blank_t->offset + blank_t->size,
8894 sec->size - (blank_t->offset + blank_t->size));
8895 sec->size -= blank_t->total_size + blank_t->size;
8896 }
8897 else
8898 /* This blank is not entirely included in the section,
8899 reduce the section size by only part of the blank size. */
8900 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8901
8902 while (blank_head)
8903 {
8904 blank_t = blank_head;
8905 blank_head = blank_head->next;
8906 remove_nds32_elf_blank (blank_t);
8907 }
8908
8909 return TRUE;
8910}
8911
8912/* Get the contents of a section. */
8913
8914static int
0c4bd9d9
KLC		 8915nds32_get_section_contents (bfd *abfd, asection *sec,
8916 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC		 8917{
8918 /* Get the section contents. */
8919 if (elf_section_data (sec)->this_hdr.contents != NULL)
8920 *contents_p = elf_section_data (sec)->this_hdr.contents;
8921 else
8922 {
8923 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8924 return FALSE;
0c4bd9d9
KLC		 8925 if (cache)
8926 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 8927 }
8928
8929 return TRUE;
8930}
8931
8932/* Get the contents of the internal symbol of abfd. */
8933
8934static int
8935nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8936 Elf_Internal_Sym **isymbuf_p)
8937{
8938 Elf_Internal_Shdr *symtab_hdr;
8939 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8940
8941 /* Read this BFD's local symbols if we haven't done so already. */
8942 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8943 {
8944 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8945 if (*isymbuf_p == NULL)
8946 {
8947 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8948 symtab_hdr->sh_info, 0,
8949 NULL, NULL, NULL);
8950 if (*isymbuf_p == NULL)
8951 return FALSE;
8952 }
8953 }
8954 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8955
8956 return TRUE;
8957}
8958
8959/* Range of small data. */
1c8f6a4d
KLC		 8960static bfd_vma sdata_range[2][2];
8961static bfd_vma const sdata_init_range[2] =
8962{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8963
8964static int
8965nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8966 bfd_byte *contents, bfd_vma addr)
8967{
8968 unsigned long insn = bfd_getb32 (contents + addr);
8969
8970 if (insn & 0x80000000)
8971 return 2;
8972
8973 return 4;
8974}
8975
8976/* Set the gp relax range. We have to measure the safe range
8977 to do gp relaxation. */
8978
8979static void
8980relax_range_measurement (bfd *abfd)
8981{
8982 asection *sec_f, *sec_b;
8983 /* For upper bound. */
8984 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8985 bfd_vma align;
35c08157
KLC		 8986 static int decide_relax_range = 0;
8987 int i;
1c8f6a4d 8988 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8989
8990 if (decide_relax_range)
8991 return;
8992 decide_relax_range = 1;
8993
8994 if (sda_rela_sec == NULL)
8995 {
8996 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8997 for (i = 0; i < range_number; i++)
35c08157
KLC		 8998 {
8999 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9000 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9001 }
9002 return;
9003 }
9004
9005 /* Get the biggest alignment power after the gp located section. */
9006 sec_f = sda_rela_sec->output_section;
9007 sec_b = sec_f->next;
9008 align = 0;
9009 while (sec_b != NULL)
9010 {
9011 if ((unsigned)(1 << sec_b->alignment_power) > align)
9012 align = (1 << sec_b->alignment_power);
9013 sec_b = sec_b->next;
9014 }
9015
9016 /* I guess we can not determine the section before
9017 gp located section, so we assume the align is max page size. */
1c8f6a4d 9018 for (i = 0; i < range_number; i++)
35c08157 9019 {
1c8f6a4d 9020 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9021 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9022 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 9023 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9024 }
9025}
9026
9027/* These are macros used to check flags encoded in r_addend.
9028 They are only used by nds32_elf_relax_section (). */
9029#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9030#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9031#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9032#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9033
1c8f6a4d
KLC		 9034/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9035
35c08157 9036static bfd_boolean
1c8f6a4d
KLC		 9037nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9038 Elf_Internal_Rela *internal_relocs, int *insn_len,
9039 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9040 Elf_Internal_Shdr *symtab_hdr)
9041{
9042 /* There are 3 variations for LONGCALL1
9043 case 4-4-2; 16-bit on, optimize off or optimize for space
9044 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9045 ori ta, ta, lo12(symbol) ; LO12S0
9046 jral5 ta ;
9047
9048 case 4-4-4; 16-bit off, optimize don't care
9049 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9050 ori ta, ta, lo12(symbol) ; LO12S0
9051 jral ta ;
9052
9053 case 4-4-4; 16-bit on, optimize for speed
9054 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9055 ori ta, ta, lo12(symbol) ; LO12S0
9056 jral ta ;
9057 Check code for -mlong-calls output. */
9058
9059 /* Get the reloc for the address from which the register is
9060 being loaded. This reloc will tell us which function is
9061 actually being called. */
9062
9063 bfd_vma laddr;
9064 int seq_len; /* Original length of instruction sequence. */
35c08157 9065 uint32_t insn;
1c8f6a4d
KLC		 9066 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9067 int pic_ext_target = 0;
9068 bfd_signed_vma foff;
35c08157 9069 uint16_t insn16;
35c08157 9070
1c8f6a4d
KLC		 9071 irelend = internal_relocs + sec->reloc_count;
9072 seq_len = GET_SEQ_LEN (irel->r_addend);
9073 laddr = irel->r_offset;
9074 *insn_len = seq_len;
35c08157 9075
1c8f6a4d
KLC		 9076 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9077 R_NDS32_HI20_RELA, laddr);
9078 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9079 R_NDS32_LO12S0_ORI_RELA,
9080 laddr + 4);
35c08157 9081
1c8f6a4d 9082 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157
KLC		 9083 {
9084 (*_bfd_error_handler)
1c8f6a4d
KLC		 9085 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9086 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9087 return FALSE;
35c08157
KLC		 9088 }
9089
1c8f6a4d
KLC		 9090 /* Get the value of the symbol referred to by the reloc. */
9091 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9092 &pic_ext_target);
35c08157 9093
1c8f6a4d
KLC		 9094 /* This condition only happened when symbol is undefined. */
9095 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9096 || foff >= CONSERVATIVE_24BIT_S1)
9097 return FALSE;
35c08157 9098
1c8f6a4d
KLC		 9099 /* Relax to: jal symbol; 25_PCREL */
9100 /* For simplicity of coding, we are going to modify the section
9101 contents, the section relocs, and the BFD symbol table. We
9102 must tell the rest of the code not to free up this
9103 information. It would be possible to instead create a table
9104 of changes which have to be made, as is done in coff-mips.c;
9105 that would be more work, but would require less memory when
9106 the linker is run. */
9107
9108 /* Replace the long call with a jal. */
9109 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9110 R_NDS32_25_PCREL_RELA);
9111 irel->r_addend = hi_irelfn->r_addend;
9112
9113 /* We don't resolve this here but resolve it in relocate_section. */
9114 insn = INSN_JAL;
9115 bfd_putb32 (insn, contents + irel->r_offset);
9116
9117 hi_irelfn->r_info =
9118 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9119 lo_irelfn->r_info =
9120 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9121 *insn_len = 4;
9122
9123 if (seq_len & 0x2)
9124 {
9125 insn16 = NDS32_NOP16;
9126 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9127 lo_irelfn->r_info =
9128 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9129 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9130 *insn_len += 2;
9131 }
9132 return TRUE;
9133}
35c08157 9134
1c8f6a4d
KLC		 9135#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9136/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9137
1c8f6a4d
KLC		 9138static bfd_boolean
9139nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9140 Elf_Internal_Rela *internal_relocs, int *insn_len,
9141 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9142 Elf_Internal_Shdr *symtab_hdr)
9143{
9144 /* bltz rt, .L1 ; LONGCALL2
9145 jal symbol ; 25_PCREL
9146 .L1: */
35c08157 9147
1c8f6a4d
KLC		 9148 /* Get the reloc for the address from which the register is
9149 being loaded. This reloc will tell us which function is
9150 actually being called. */
35c08157 9151
1c8f6a4d
KLC		 9152 bfd_vma laddr;
9153 uint32_t insn;
9154 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9155 int pic_ext_target = 0;
9156 bfd_signed_vma foff;
35c08157 9157
1c8f6a4d
KLC		 9158 irelend = internal_relocs + sec->reloc_count;
9159 laddr = irel->r_offset;
9160 i1_irelfn =
9161 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9162 R_NDS32_25_PCREL_RELA, laddr + 4);
9163
9164 if (i1_irelfn == irelend)
35c08157 9165 {
1c8f6a4d
KLC		 9166 (*_bfd_error_handler)
9167 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9168 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9169 return FALSE;
35c08157
KLC		 9170 }
9171
1c8f6a4d 9172 insn = bfd_getb32 (contents + laddr);
35c08157 9173
1c8f6a4d
KLC		 9174 /* Get the value of the symbol referred to by the reloc. */
9175 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9176 &pic_ext_target);
35c08157 9177
1c8f6a4d
KLC		 9178 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9179 || foff >= CONSERVATIVE_16BIT_S1)
9180 return FALSE;
35c08157 9181
1c8f6a4d
KLC		 9182 /* Relax to bgezal rt, label ; 17_PCREL
9183 or bltzal rt, label ; 17_PCREL */
9184
9185 /* Convert to complimentary conditional call. */
9186 insn = CONVERT_CONDITION_CALL (insn);
9187
9188 /* For simplicity of coding, we are going to modify the section
9189 contents, the section relocs, and the BFD symbol table. We
9190 must tell the rest of the code not to free up this
9191 information. It would be possible to instead create a table
9192 of changes which have to be made, as is done in coff-mips.c;
9193 that would be more work, but would require less memory when
9194 the linker is run. */
9195
9196 /* Clean unnessary relocations. */
9197 i1_irelfn->r_info =
9198 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9199 cond_irelfn =
9200 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9201 R_NDS32_17_PCREL_RELA, laddr);
9202 if (cond_irelfn != irelend)
9203 cond_irelfn->r_info =
9204 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9205
9206 /* Replace the long call with a bgezal. */
9207 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9208 R_NDS32_17_PCREL_RELA);
9209 irel->r_addend = i1_irelfn->r_addend;
9210
9211 bfd_putb32 (insn, contents + irel->r_offset);
9212
9213 *insn_len = 4;
9214 return TRUE;
9215}
35c08157 9216
1c8f6a4d
KLC		 9217/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9218
9219static bfd_boolean
9220nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9221 Elf_Internal_Rela *internal_relocs, int *insn_len,
9222 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9223 Elf_Internal_Shdr *symtab_hdr)
9224{
9225 /* There are 3 variations for LONGCALL3
9226 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9227 bltz rt, $1 ; LONGCALL3
9228 sethi ta, hi20(symbol) ; HI20
9229 ori ta, ta, lo12(symbol) ; LO12S0
9230 jral5 ta ;
9231 $1
9232
9233 case 4-4-4-4; 16-bit off, optimize don't care
9234 bltz rt, $1 ; LONGCALL3
9235 sethi ta, hi20(symbol) ; HI20
9236 ori ta, ta, lo12(symbol) ; LO12S0
9237 jral ta ;
9238 $1
9239
9240 case 4-4-4-4; 16-bit on, optimize for speed
9241 bltz rt, $1 ; LONGCALL3
9242 sethi ta, hi20(symbol) ; HI20
9243 ori ta, ta, lo12(symbol) ; LO12S0
9244 jral ta ;
9245 $1 */
9246
9247 /* Get the reloc for the address from which the register is
9248 being loaded. This reloc will tell us which function is
9249 actually being called. */
9250
9251 bfd_vma laddr;
9252 int seq_len; /* Original length of instruction sequence. */
9253 uint32_t insn;
9254 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9255 int pic_ext_target = 0;
9256 bfd_signed_vma foff;
9257 uint16_t insn16;
9258
9259 irelend = internal_relocs + sec->reloc_count;
9260 seq_len = GET_SEQ_LEN (irel->r_addend);
9261 laddr = irel->r_offset;
9262 *insn_len = seq_len;
9263
9264 hi_irelfn =
9265 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9266 R_NDS32_HI20_RELA, laddr + 4);
9267 lo_irelfn =
9268 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9269 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9270
9271 if (hi_irelfn == irelend || lo_irelfn == irelend)
9272 {
9273 (*_bfd_error_handler)
9274 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9275 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9276 return FALSE;
35c08157
KLC		 9277 }
9278
1c8f6a4d
KLC		 9279 /* Get the value of the symbol referred to by the reloc. */
9280 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9281 &pic_ext_target);
35c08157 9282
1c8f6a4d
KLC		 9283 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9284 || foff >= CONSERVATIVE_24BIT_S1)
9285 return FALSE;
35c08157 9286
1c8f6a4d
KLC		 9287 insn = bfd_getb32 (contents + laddr);
9288 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9289 {
1c8f6a4d
KLC		 9290 /* Relax to bgezal rt, label ; 17_PCREL
9291 or bltzal rt, label ; 17_PCREL */
35c08157 9292
1c8f6a4d
KLC		 9293 /* Convert to complimentary conditional call. */
9294 insn = CONVERT_CONDITION_CALL (insn);
9295 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9296
1c8f6a4d
KLC		 9297 *insn_len = 4;
9298 irel->r_info =
9299 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9300 hi_irelfn->r_info =
9301 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9302 lo_irelfn->r_info =
9303 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9304
9305 cond_irelfn =
9306 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9307 R_NDS32_17_PCREL_RELA, laddr);
9308 if (cond_irelfn != irelend)
35c08157 9309 {
1c8f6a4d
KLC		 9310 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9311 R_NDS32_17_PCREL_RELA);
9312 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9313 }
1c8f6a4d
KLC		 9314
9315 if (seq_len & 0x2)
35c08157 9316 {
1c8f6a4d
KLC		 9317 insn16 = NDS32_NOP16;
9318 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9319 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9320 R_NDS32_INSN16);
9321 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9322 insn_len += 2;
35c08157 9323 }
1c8f6a4d
KLC		 9324 }
9325 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9326 {
9327 /* Relax to the following instruction sequence
9328 bltz rt, $1 ; LONGCALL2
9329 jal symbol ; 25_PCREL
9330 $1 */
9331 *insn_len = 8;
9332 insn = INSN_JAL;
9333 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9334
1c8f6a4d
KLC		 9335 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9336 R_NDS32_25_PCREL_RELA);
9337 irel->r_info =
9338 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9339
9340 lo_irelfn->r_info =
9341 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9342
1c8f6a4d 9343 if (seq_len & 0x2)
35c08157 9344 {
1c8f6a4d
KLC		 9345 insn16 = NDS32_NOP16;
9346 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9347 lo_irelfn->r_info =
9348 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9349 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9350 insn_len += 2;
9351 }
9352 }
9353 return TRUE;
9354}
35c08157 9355
1c8f6a4d 9356/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9357
1c8f6a4d
KLC		 9358static bfd_boolean
9359nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9360 Elf_Internal_Rela *internal_relocs, int *insn_len,
9361 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9362 Elf_Internal_Shdr *symtab_hdr)
9363{
9364 /* There are 3 variations for LONGJUMP1
9365 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9366 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9367 ori ta, ta, lo12(symbol) ; LO12S0
9368 jr5 ta ;
9369
9370 case 4-4-4; 16-bit off, optimize don't care
9371 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9372 ori ta, ta, lo12(symbol) ; LO12S0
9373 jr ta ;
9374
9375 case 4-4-4; 16-bit on, optimize for speed
9376 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9377 ori ta, ta, lo12(symbol) ; LO12S0
9378 jr ta ; */
9379
9380 /* Get the reloc for the address from which the register is
9381 being loaded. This reloc will tell us which function is
9382 actually being called. */
9383
9384 bfd_vma laddr;
9385 int seq_len; /* Original length of instruction sequence. */
9386 int insn16_on; /* 16-bit on/off. */
9387 uint32_t insn;
9388 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9389 int pic_ext_target = 0;
9390 bfd_signed_vma foff;
9391 uint16_t insn16;
9392 unsigned long reloc;
35c08157 9393
1c8f6a4d
KLC		 9394 irelend = internal_relocs + sec->reloc_count;
9395 seq_len = GET_SEQ_LEN (irel->r_addend);
9396 laddr = irel->r_offset;
9397 *insn_len = seq_len;
9398 insn16_on = IS_16BIT_ON (irel->r_addend);
9399
9400 hi_irelfn =
9401 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9402 R_NDS32_HI20_RELA, laddr);
9403 lo_irelfn =
9404 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9405 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9406 if (hi_irelfn == irelend || lo_irelfn == irelend)
9407 {
9408 (*_bfd_error_handler)
9409 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9410 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9411 return FALSE;
9412 }
35c08157 9413
1c8f6a4d
KLC		 9414 /* Get the value of the symbol referred to by the reloc. */
9415 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9416 &pic_ext_target);
35c08157 9417
1c8f6a4d
KLC		 9418 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9419 || foff < -CONSERVATIVE_24BIT_S1)
9420 return FALSE;
35c08157 9421
1c8f6a4d
KLC		 9422 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9423 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9424 {
9425 /* j8 label */
9426 /* 16-bit on, but not optimized for speed. */
9427 reloc = R_NDS32_9_PCREL_RELA;
9428 insn16 = INSN_J8;
9429 bfd_putb16 (insn16, contents + irel->r_offset);
9430 *insn_len = 2;
9431 irel->r_info =
9432 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9433 }
9434 else
9435 {
9436 /* j label */
9437 reloc = R_NDS32_25_PCREL_RELA;
9438 insn = INSN_J;
9439 bfd_putb32 (insn, contents + irel->r_offset);
9440 *insn_len = 4;
9441 irel->r_info =
9442 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9443 irel->r_addend = 0;
9444 }
35c08157 9445
1c8f6a4d
KLC		 9446 hi_irelfn->r_info =
9447 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9448 lo_irelfn->r_info =
9449 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9450
1c8f6a4d
KLC		 9451 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9452 {
9453 insn16 = NDS32_NOP16;
9454 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9455 lo_irelfn->r_info =
9456 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9457 R_NDS32_INSN16);
9458 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9459 *insn_len += 2;
9460 }
9461 return TRUE;
9462}
9463
9464/* Revert condition branch. This function does not check if the input
9465 instruction is condition branch or not. */
9466
9467static void
9468nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9469 uint16_t *re_insn16, uint32_t *re_insn)
9470{
9471 uint32_t comp_insn = 0;
9472 uint16_t comp_insn16 = 0;
9473
9474 if (insn)
9475 {
9476 if (N32_OP6 (insn) == N32_OP6_BR1)
9477 {
9478 /* beqs label. */
9479 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9480 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9481 {
1c8f6a4d
KLC		 9482 /* Insn can be contracted to 16-bit implied r5. */
9483 comp_insn16 =
9484 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9485 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9486 }
1c8f6a4d
KLC		 9487 }
9488 else if (N32_OP6 (insn) == N32_OP6_BR3)
9489 {
9490 /* bnec $ta, imm11, label. */
9491 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9492 }
9493 else
9494 {
9495 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9496 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9497 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9498 {
1c8f6a4d 9499 if (N32_IS_RT3 (insn))
35c08157 9500 {
1c8f6a4d
KLC		 9501 /* Insn can be contracted to 16-bit. */
9502 comp_insn16 =
9503 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9504 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9505 }
9506 else if (N32_RT5 (insn) == REG_R15)
9507 {
9508 /* Insn can be contracted to 16-bit. */
9509 comp_insn16 =
9510 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9511 }
35c08157
KLC		 9512 }
9513 }
1c8f6a4d
KLC		 9514 }
9515 else
9516 {
9517 switch ((insn16 & 0xf000) >> 12)
35c08157 9518 {
1c8f6a4d
KLC		 9519 case 0xc:
9520 /* beqz38 or bnez38 */
9521 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9522 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9523 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9524 break;
35c08157 9525
1c8f6a4d
KLC		 9526 case 0xd:
9527 /* beqs38 or bnes38 */
9528 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9529 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9530 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9531 | (REG_R5 << 15);
9532 break;
35c08157 9533
1c8f6a4d
KLC		 9534 case 0xe:
9535 /* beqzS8 or bnezS8 */
9536 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9537 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9538 comp_insn |= REG_R15 << 20;
9539 break;
35c08157 9540
1c8f6a4d
KLC		 9541 default:
9542 break;
9543 }
9544 }
9545 if (comp_insn && re_insn)
9546 *re_insn = comp_insn;
9547 if (comp_insn16 && re_insn16)
9548 *re_insn16 = comp_insn16;
9549}
35c08157 9550
1c8f6a4d 9551/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9552
1c8f6a4d
KLC		 9553static bfd_boolean
9554nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9555 Elf_Internal_Rela *internal_relocs, int *insn_len,
9556 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9557 Elf_Internal_Shdr *symtab_hdr)
9558{
9559 /* There are 3 variations for LONGJUMP2
9560 case 2-4; 1st insn convertible, 16-bit on,
9561 optimize off or optimize for space
9562 bnes38 rt, ra, $1 ; LONGJUMP2
9563 j label ; 25_PCREL
9564 $1:
9565
9566 case 4-4; 1st insn not convertible
9567 bne rt, ra, $1 ; LONGJUMP2
9568 j label ; 25_PCREL
9569 $1:
9570
9571 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9572 bne rt, ra, $1 ; LONGJUMP2
9573 j label ; 25_PCREL
9574 $1: */
9575
9576 /* Get the reloc for the address from which the register is
9577 being loaded. This reloc will tell us which function is
9578 actually being called. */
9579
9580 bfd_vma laddr;
9581 int seq_len; /* Original length of instruction sequence. */
9582 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9583 int pic_ext_target = 0, first_size;
9584 unsigned int i;
9585 bfd_signed_vma foff;
9586 uint32_t insn, re_insn = 0;
9587 uint16_t insn16, re_insn16 = 0;
9588 unsigned long reloc, cond_reloc;
35c08157 9589
1c8f6a4d
KLC		 9590 enum elf_nds32_reloc_type checked_types[] =
9591 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9592
1c8f6a4d
KLC		 9593 irelend = internal_relocs + sec->reloc_count;
9594 seq_len = GET_SEQ_LEN (irel->r_addend);
9595 laddr = irel->r_offset;
9596 *insn_len = seq_len;
9597 first_size = (seq_len == 6) ? 2 : 4;
9598
9599 i2_irelfn =
9600 find_relocs_at_address_addr (irel, internal_relocs,
9601 irelend, R_NDS32_25_PCREL_RELA,
9602 laddr + first_size);
9603
9604 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9605 {
9606 cond_irelfn =
9607 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9608 checked_types[i], laddr);
9609 if (cond_irelfn != irelend)
9610 break;
9611 }
35c08157 9612
1c8f6a4d
KLC		 9613 if (i2_irelfn == irelend || cond_irelfn == irelend)
9614 {
9615 (*_bfd_error_handler)
9616 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9617 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9618 return FALSE;
9619 }
35c08157 9620
1c8f6a4d
KLC		 9621 /* Get the value of the symbol referred to by the reloc. */
9622 foff =
9623 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9624 &pic_ext_target);
9625 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9626 || foff >= CONSERVATIVE_16BIT_S1)
9627 return FALSE;
35c08157 9628
1c8f6a4d
KLC		 9629 /* Get the all corresponding instructions. */
9630 if (first_size == 4)
9631 {
9632 insn = bfd_getb32 (contents + laddr);
9633 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9634 }
9635 else
9636 {
9637 insn16 = bfd_getb16 (contents + laddr);
9638 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9639 }
35c08157 9640
1c8f6a4d
KLC		 9641 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9642 && foff < ACCURATE_8BIT_S1 - first_size)
9643 {
9644 if (first_size == 4)
9645 {
9646 /* Don't convert it to 16-bit now, keep this as relaxable for
9647 ``label reloc; INSN16''. */
35c08157 9648
1c8f6a4d
KLC		 9649 /* Save comp_insn32 to buffer. */
9650 bfd_putb32 (re_insn, contents + irel->r_offset);
9651 *insn_len = 4;
9652 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9653 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9654 cond_reloc = R_NDS32_INSN16;
9655 }
9656 else
9657 {
9658 bfd_putb16 (re_insn16, contents + irel->r_offset);
9659 *insn_len = 2;
9660 reloc = R_NDS32_9_PCREL_RELA;
9661 cond_reloc = R_NDS32_NONE;
9662 }
9663 }
9664 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9665 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9666 && foff < ACCURATE_14BIT_S1 - first_size))
9667 {
9668 /* beqs label ; 15_PCREL */
9669 bfd_putb32 (re_insn, contents + irel->r_offset);
9670 *insn_len = 4;
9671 reloc = R_NDS32_15_PCREL_RELA;
9672 cond_reloc = R_NDS32_NONE;
9673 }
9674 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9675 && foff >= -CONSERVATIVE_16BIT_S1
9676 && foff < CONSERVATIVE_16BIT_S1)
9677 {
9678 /* beqz label ; 17_PCREL */
9679 bfd_putb32 (re_insn, contents + irel->r_offset);
9680 *insn_len = 4;
9681 reloc = R_NDS32_17_PCREL_RELA;
9682 cond_reloc = R_NDS32_NONE;
9683 }
9684 else
9685 return FALSE;
35c08157 9686
1c8f6a4d
KLC		 9687 /* Set all relocations. */
9688 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9689 irel->r_addend = i2_irelfn->r_addend;
35c08157 9690
1c8f6a4d
KLC		 9691 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9692 cond_reloc);
9693 cond_irelfn->r_addend = 0;
35c08157 9694
1c8f6a4d
KLC		 9695 if ((seq_len ^ *insn_len ) & 0x2)
9696 {
9697 insn16 = NDS32_NOP16;
9698 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9699 i2_irelfn->r_offset = 4;
9700 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9701 R_NDS32_INSN16);
9702 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9703 *insn_len += 2;
9704 }
9705 else
9706 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9707 R_NDS32_NONE);
9708 return TRUE;
9709}
35c08157 9710
1c8f6a4d 9711/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9712
1c8f6a4d
KLC		 9713static bfd_boolean
9714nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9715 Elf_Internal_Rela *internal_relocs, int *insn_len,
9716 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9717 Elf_Internal_Shdr *symtab_hdr)
9718{
9719 /* There are 5 variations for LONGJUMP3
9720 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9721 optimize off or optimize for space
9722 bnes38 rt, ra, $1 ; LONGJUMP3
9723 sethi ta, hi20(symbol) ; HI20
9724 ori ta, ta, lo12(symbol) ; LO12S0
9725 jr5 ta ;
9726 $1: ;
9727
9728 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9729 bnes38 rt, ra, $1 ; LONGJUMP3
9730 sethi ta, hi20(symbol) ; HI20
9731 ori ta, ta, lo12(symbol) ; LO12S0
9732 jr5 ta ;
9733 $1: ; LABEL
9734
9735 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9736 optimize off or optimize for space
9737 bne rt, ra, $1 ; LONGJUMP3
9738 sethi ta, hi20(symbol) ; HI20
9739 ori ta, ta, lo12(symbol) ; LO12S0
9740 jr5 ta ;
9741 $1: ;
9742
9743 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9744 16-bit off if no INSN16
9745 bne rt, ra, $1 ; LONGJUMP3
9746 sethi ta, hi20(symbol) ; HI20
9747 ori ta, ta, lo12(symbol) ; LO12S0
9748 jr ta ;
9749 $1: ;
9750
9751 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9752 16-bit off if no INSN16
9753 bne rt, ra, $1 ; LONGJUMP3
9754 sethi ta, hi20(symbol) ; HI20
9755 ori ta, ta, lo12(symbol) ; LO12S0
9756 jr ta ;
9757 $1: ; LABEL */
9758
9759 /* Get the reloc for the address from which the register is
9760 being loaded. This reloc will tell us which function is
9761 actually being called. */
9762 enum elf_nds32_reloc_type checked_types[] =
9763 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9764
9765 int reloc_off = 0, cond_removed = 0, convertible;
9766 bfd_vma laddr;
9767 int seq_len; /* Original length of instruction sequence. */
9768 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9769 int pic_ext_target = 0, first_size;
9770 unsigned int i;
9771 bfd_signed_vma foff;
9772 uint32_t insn, re_insn = 0;
9773 uint16_t insn16, re_insn16 = 0;
9774 unsigned long reloc, cond_reloc;
35c08157 9775
1c8f6a4d
KLC		 9776 irelend = internal_relocs + sec->reloc_count;
9777 seq_len = GET_SEQ_LEN (irel->r_addend);
9778 laddr = irel->r_offset;
9779 *insn_len = seq_len;
35c08157 9780
1c8f6a4d 9781 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9782
1c8f6a4d
KLC		 9783 if (convertible)
9784 first_size = 2;
9785 else
9786 first_size = 4;
9787
9788 /* Get all needed relocations. */
9789 hi_irelfn =
9790 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9791 R_NDS32_HI20_RELA, laddr + first_size);
9792 lo_irelfn =
9793 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9794 R_NDS32_LO12S0_ORI_RELA,
9795 laddr + first_size + 4);
9796
9797 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9798 {
9799 cond_irelfn =
9800 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9801 checked_types[i], laddr);
9802 if (cond_irelfn != irelend)
9803 break;
9804 }
35c08157 9805
1c8f6a4d
KLC		 9806 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9807 {
9808 (*_bfd_error_handler)
9809 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9810 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9811 return FALSE;
9812 }
35c08157 9813
1c8f6a4d
KLC		 9814 /* Get the value of the symbol referred to by the reloc. */
9815 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9816 &pic_ext_target);
35c08157 9817
1c8f6a4d
KLC		 9818 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9819 || foff >= CONSERVATIVE_24BIT_S1)
9820 return FALSE;
35c08157 9821
1c8f6a4d
KLC		 9822 /* Get the all corresponding instructions. */
9823 if (first_size == 4)
9824 {
9825 insn = bfd_getb32 (contents + laddr);
9826 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9827 }
9828 else
9829 {
9830 insn16 = bfd_getb16 (contents + laddr);
9831 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9832 }
35c08157 9833
1c8f6a4d
KLC		 9834 /* For simplicity of coding, we are going to modify the section
9835 contents, the section relocs, and the BFD symbol table. We
9836 must tell the rest of the code not to free up this
9837 information. It would be possible to instead create a table
9838 of changes which have to be made, as is done in coff-mips.c;
9839 that would be more work, but would require less memory when
9840 the linker is run. */
35c08157 9841
1c8f6a4d
KLC		 9842 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9843 && foff < ACCURATE_8BIT_S1 - first_size)
9844 {
9845 if (!(seq_len & 0x2))
9846 {
9847 /* Don't convert it to 16-bit now, keep this as relaxable
9848 for ``label reloc; INSN1a''6. */
9849 /* Save comp_insn32 to buffer. */
9850 bfd_putb32 (re_insn, contents + irel->r_offset);
9851 *insn_len = 4;
9852 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9853 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9854 cond_reloc = R_NDS32_INSN16;
9855 }
9856 else
9857 {
9858 /* Not optimize for speed; convert sequence to 16-bit. */
9859 /* Save comp_insn16 to buffer. */
9860 bfd_putb16 (re_insn16, contents + irel->r_offset);
9861 *insn_len = 2;
9862 reloc = R_NDS32_9_PCREL_RELA;
9863 cond_reloc = R_NDS32_NONE;
9864 }
9865 cond_removed = 1;
9866 }
9867 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9868 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9869 && foff < ACCURATE_14BIT_S1 - first_size))
9870 {
9871 /* beqs label ; 15_PCREL */
9872 bfd_putb32 (re_insn, contents + irel->r_offset);
9873 *insn_len = 4;
9874 reloc = R_NDS32_15_PCREL_RELA;
9875 cond_reloc = R_NDS32_NONE;
9876 cond_removed = 1;
9877 }
9878 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9879 && foff >= -CONSERVATIVE_16BIT_S1
9880 && foff < CONSERVATIVE_16BIT_S1)
9881 {
9882 /* beqz label ; 17_PCREL */
9883 bfd_putb32 (re_insn, contents + irel->r_offset);
9884 *insn_len = 4;
9885 reloc = R_NDS32_17_PCREL_RELA;
9886 cond_reloc = R_NDS32_NONE;
9887 cond_removed = 1;
9888 }
9889 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9890 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9891 {
9892 /* Relax to one of the following 3 variations
9893
9894 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9895 for space
9896 bnes38 rt, $1 ; LONGJUMP2
9897 j label ; 25_PCREL
9898 $1
9899
9900 case 4-4; 1st insn not convertible, others don't care
9901 bne rt, ra, $1 ; LONGJUMP2
9902 j label ; 25_PCREL
9903 $1
9904
9905 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9906 bne rt, ra, $1 ; LONGJUMP2
9907 j label ; 25_PCREL
9908 $1 */
9909
9910 /* Offset for first instruction. */
9911
9912 /* Use j label as second instruction. */
9913 *insn_len = 4 + first_size;
9914 insn = INSN_J;
9915 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9916 reloc = R_NDS32_LONGJUMP2;
9917 cond_reloc = R_NDS32_25_PLTREL;
9918 }
9919 else
9920 return FALSE;
35c08157 9921
1c8f6a4d
KLC		 9922 if (cond_removed == 1)
9923 {
9924 /* Set all relocations. */
9925 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9926 irel->r_addend = hi_irelfn->r_addend;
9927
9928 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9929 cond_reloc);
9930 cond_irelfn->r_addend = 0;
9931 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9932 R_NDS32_NONE);
9933 }
9934 else
9935 {
9936 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9937 irel->r_addend = irel->r_addend;
9938 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9939 cond_reloc);
9940 }
35c08157 9941
1c8f6a4d
KLC		 9942 if ((seq_len ^ *insn_len ) & 0x2)
9943 {
9944 insn16 = NDS32_NOP16;
9945 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9946 lo_irelfn->r_offset = *insn_len;
9947 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9948 R_NDS32_INSN16);
9949 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9950 *insn_len += 2;
9951 }
9952 else
9953 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9954 R_NDS32_NONE);
9955 return TRUE;
9956}
35c08157 9957
1c8f6a4d 9958/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9959
1c8f6a4d
KLC		 9960static bfd_boolean
9961nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9962 Elf_Internal_Rela *internal_relocs, int *insn_len,
9963 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9964 Elf_Internal_Shdr *symtab_hdr)
9965{
9966 /* The pattern for LONGCALL4. Support for function cse.
9967 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9968 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9969 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9970
1c8f6a4d
KLC		 9971 bfd_vma laddr;
9972 uint32_t insn;
9973 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9974 Elf_Internal_Rela *irelend;
9975 int pic_ext_target = 0;
9976 bfd_signed_vma foff;
35c08157 9977
1c8f6a4d
KLC		 9978 irelend = internal_relocs + sec->reloc_count;
9979 laddr = irel->r_offset;
35c08157 9980
1c8f6a4d
KLC		 9981 /* Get the reloc for the address from which the register is
9982 being loaded. This reloc will tell us which function is
9983 actually being called. */
9984 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9985 R_NDS32_HI20_RELA, laddr);
35c08157 9986
1c8f6a4d
KLC		 9987 if (hi_irel == irelend)
9988 {
9989 (*_bfd_error_handler)
9990 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9991 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9992 return FALSE;
9993 }
35c08157 9994
1c8f6a4d
KLC		 9995 /* Get the value of the symbol referred to by the reloc. */
9996 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9997 &pic_ext_target);
35c08157 9998
1c8f6a4d
KLC		 9999 /* This condition only happened when symbol is undefined. */
10000 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10001 || foff >= CONSERVATIVE_24BIT_S1)
10002 return FALSE;
35c08157 10003
1c8f6a4d
KLC		 10004 /* Relax to: jal symbol; 25_PCREL */
10005 /* For simplicity of coding, we are going to modify the section
10006 contents, the section relocs, and the BFD symbol table. We
10007 must tell the rest of the code not to free up this
10008 information. It would be possible to instead create a table
10009 of changes which have to be made, as is done in coff-mips.c;
10010 that would be more work, but would require less memory when
10011 the linker is run. */
35c08157 10012
1c8f6a4d
KLC		 10013 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10014 R_NDS32_PTR_RESOLVED, irel->r_addend);
10015 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10016 R_NDS32_EMPTY, irel->r_addend);
35c08157 10017
1c8f6a4d
KLC		 10018 if (ptr_irel == irelend || em_irel == irelend)
10019 {
10020 (*_bfd_error_handler)
10021 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10022 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10023 return FALSE;
10024 }
10025 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10026 insn = bfd_getb32 (contents + irel->r_addend);
10027 if (insn & 0x80000000)
10028 return FALSE;
35c08157 10029
1c8f6a4d
KLC		 10030 /* Replace the long call with a jal. */
10031 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10032 R_NDS32_25_PCREL_RELA);
10033 ptr_irel->r_addend = 1;
35c08157 10034
1c8f6a4d
KLC		 10035 /* We don't resolve this here but resolve it in relocate_section. */
10036 insn = INSN_JAL;
10037 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10038
1c8f6a4d
KLC		 10039 irel->r_info =
10040 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10041
1c8f6a4d
KLC		 10042 /* If there is function cse, HI20 can not remove now. */
10043 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10044 R_NDS32_LONGCALL4, laddr);
10045 if (call_irel == irelend)
10046 {
10047 *insn_len = 0;
10048 hi_irel->r_info =
10049 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10050 }
35c08157 10051
1c8f6a4d
KLC		 10052 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10053 R_NDS32_INSN16, irel->r_addend);
10054 if (insn_irel != irelend)
10055 insn_irel->r_info =
10056 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10057
1c8f6a4d
KLC		 10058 return TRUE;
10059}
35c08157 10060
1c8f6a4d 10061/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10062
1c8f6a4d
KLC		 10063static bfd_boolean
10064nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10065 Elf_Internal_Rela *internal_relocs, int *insn_len,
10066 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10067 Elf_Internal_Shdr *symtab_hdr)
10068{
10069 /* The pattern for LONGCALL5.
10070 bltz rt, .L1 ; LONGCALL5/17_PCREL
10071 jal symbol ; 25_PCREL
10072 .L1: */
35c08157 10073
1c8f6a4d
KLC		 10074 bfd_vma laddr;
10075 uint32_t insn;
10076 Elf_Internal_Rela *cond_irel, *irelend;
10077 int pic_ext_target = 0;
10078 bfd_signed_vma foff;
35c08157 10079
1c8f6a4d
KLC		 10080 irelend = internal_relocs + sec->reloc_count;
10081 laddr = irel->r_offset;
10082 insn = bfd_getb32 (contents + laddr);
35c08157 10083
1c8f6a4d
KLC		 10084 /* Get the reloc for the address from which the register is
10085 being loaded. This reloc will tell us which function is
10086 actually being called. */
10087 cond_irel =
10088 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10089 R_NDS32_25_PCREL_RELA, irel->r_addend);
10090 if (cond_irel == irelend)
10091 {
10092 (*_bfd_error_handler)
10093 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10094 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10095 return FALSE;
10096 }
35c08157 10097
1c8f6a4d
KLC		 10098 /* Get the value of the symbol referred to by the reloc. */
10099 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10100 &pic_ext_target);
35c08157 10101
1c8f6a4d
KLC		 10102 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10103 || foff >= CONSERVATIVE_16BIT_S1)
10104 return FALSE;
35c08157 10105
1c8f6a4d
KLC		 10106 /* Relax to bgezal rt, label ; 17_PCREL
10107 or bltzal rt, label ; 17_PCREL */
35c08157 10108
1c8f6a4d
KLC		 10109 /* Convert to complimentary conditional call. */
10110 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10111
1c8f6a4d
KLC		 10112 /* For simplicity of coding, we are going to modify the section
10113 contents, the section relocs, and the BFD symbol table. We
10114 must tell the rest of the code not to free up this
10115 information. It would be possible to instead create a table
10116 of changes which have to be made, as is done in coff-mips.c;
10117 that would be more work, but would require less memory when
10118 the linker is run. */
35c08157 10119
1c8f6a4d
KLC		 10120 /* Modify relocation and contents. */
10121 cond_irel->r_info =
10122 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10123
1c8f6a4d
KLC		 10124 /* Replace the long call with a bgezal. */
10125 bfd_putb32 (insn, contents + cond_irel->r_offset);
10126 *insn_len = 0;
35c08157 10127
1c8f6a4d
KLC		 10128 /* Clean unnessary relocations. */
10129 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10130
1c8f6a4d
KLC		 10131 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10132 R_NDS32_17_PCREL_RELA, laddr);
10133 cond_irel->r_info =
10134 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10135
1c8f6a4d
KLC		 10136 return TRUE;
10137}
35c08157 10138
1c8f6a4d 10139/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10140
1c8f6a4d
KLC		 10141static bfd_boolean
10142nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10143 Elf_Internal_Rela *internal_relocs, int *insn_len,
10144 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10145 Elf_Internal_Shdr *symtab_hdr)
10146{
10147 /* The pattern for LONGCALL6.
10148 bltz rt, .L1 ; LONGCALL6/17_PCREL
10149 sethi ta, hi20(symbol) ; HI20/PTR
10150 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10151 jral ta ; PTR_RES/EMPTY/INSN16
10152 .L1 */
10153
10154 bfd_vma laddr;
10155 uint32_t insn;
10156 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10157 int pic_ext_target = 0;
10158 bfd_signed_vma foff;
35c08157 10159
1c8f6a4d
KLC		 10160 irelend = internal_relocs + sec->reloc_count;
10161 laddr = irel->r_offset;
35c08157 10162
1c8f6a4d
KLC		 10163 /* Get the reloc for the address from which the register is
10164 being loaded. This reloc will tell us which function is
10165 actually being called. */
10166 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10167 R_NDS32_EMPTY, irel->r_addend);
35c08157 10168
1c8f6a4d
KLC		 10169 if (em_irel == irelend)
10170 {
10171 (*_bfd_error_handler)
10172 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10173 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10174 return FALSE;
10175 }
35c08157 10176
1c8f6a4d
KLC		 10177 /* Get the value of the symbol referred to by the reloc. */
10178 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10179 &pic_ext_target);
35c08157 10180
1c8f6a4d
KLC		 10181 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10182 || foff >= CONSERVATIVE_24BIT_S1)
10183 return FALSE;
35c08157 10184
1c8f6a4d
KLC		 10185 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10186 insn = bfd_getb32 (contents + irel->r_addend);
10187 if (insn & 0x80000000)
10188 return FALSE;
35c08157 10189
1c8f6a4d
KLC		 10190 insn = bfd_getb32 (contents + laddr);
10191 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10192 {
10193 /* Relax to bgezal rt, label ; 17_PCREL
10194 or bltzal rt, label ; 17_PCREL */
35c08157 10195
1c8f6a4d
KLC		 10196 /* Convert to complimentary conditional call. */
10197 *insn_len = 0;
10198 insn = CONVERT_CONDITION_CALL (insn);
10199 bfd_putb32 (insn, contents + em_irel->r_offset);
10200
10201 em_irel->r_info =
10202 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10203
10204 /* Set resolved relocation. */
10205 cond_irel =
10206 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10207 R_NDS32_PTR_RESOLVED, irel->r_addend);
10208 if (cond_irel == irelend)
35c08157 10209 {
1c8f6a4d
KLC		 10210 (*_bfd_error_handler)
10211 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10212 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10213 return FALSE;
10214 }
10215 cond_irel->r_addend = 1;
35c08157 10216
1c8f6a4d 10217 /* Clear relocations. */
35c08157 10218
1c8f6a4d
KLC		 10219 irel->r_info =
10220 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10221
1c8f6a4d
KLC		 10222 cond_irel =
10223 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10224 R_NDS32_17_PCREL_RELA, laddr);
10225 if (cond_irel != irelend)
10226 cond_irel->r_info =
10227 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10228
1c8f6a4d
KLC		 10229 cond_irel =
10230 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10231 R_NDS32_INSN16, irel->r_addend);
10232 if (cond_irel != irelend)
10233 cond_irel->r_info =
10234 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10235
1c8f6a4d
KLC		 10236 }
10237 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10238 {
10239 /* Relax to the following instruction sequence
10240 bltz rt, .L1 ; LONGCALL2/17_PCREL
10241 jal symbol ; 25_PCREL/PTR_RES
10242 .L1 */
10243 *insn_len = 4;
10244 /* Convert instruction. */
10245 insn = INSN_JAL;
10246 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10247
1c8f6a4d
KLC		 10248 /* Convert relocations. */
10249 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10250 R_NDS32_25_PCREL_RELA);
10251 irel->r_info =
10252 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10253
1c8f6a4d
KLC		 10254 /* Set resolved relocation. */
10255 cond_irel =
10256 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10257 R_NDS32_PTR_RESOLVED, irel->r_addend);
10258 if (cond_irel == irelend)
10259 {
10260 (*_bfd_error_handler)
10261 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10262 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10263 return FALSE;
10264 }
10265 cond_irel->r_addend = 1;
35c08157 10266
1c8f6a4d
KLC		 10267 cond_irel =
10268 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10269 R_NDS32_INSN16, irel->r_addend);
10270 if (cond_irel != irelend)
10271 cond_irel->r_info =
10272 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10273 }
10274 return TRUE;
10275}
35c08157 10276
1c8f6a4d 10277/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10278
1c8f6a4d
KLC		 10279static bfd_boolean
10280nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10281 Elf_Internal_Rela *internal_relocs, int *insn_len,
10282 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10283 Elf_Internal_Shdr *symtab_hdr)
10284{
10285 /* The pattern for LONGJUMP4.
10286 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10287 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10288 jr ta ; PTR_RES/INSN16/EMPTY */
10289
10290 bfd_vma laddr;
10291 int seq_len; /* Original length of instruction sequence. */
10292 uint32_t insn;
10293 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10294 int pic_ext_target = 0;
10295 bfd_signed_vma foff;
35c08157 10296
1c8f6a4d
KLC		 10297 irelend = internal_relocs + sec->reloc_count;
10298 seq_len = GET_SEQ_LEN (irel->r_addend);
10299 laddr = irel->r_offset;
10300 *insn_len = seq_len;
35c08157 10301
1c8f6a4d
KLC		 10302 /* Get the reloc for the address from which the register is
10303 being loaded. This reloc will tell us which function is
10304 actually being called. */
35c08157 10305
1c8f6a4d
KLC		 10306 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10307 R_NDS32_HI20_RELA, laddr);
35c08157 10308
1c8f6a4d
KLC		 10309 if (hi_irel == irelend)
10310 {
10311 (*_bfd_error_handler)
10312 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10313 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10314 return FALSE;
10315 }
35c08157 10316
1c8f6a4d
KLC		 10317 /* Get the value of the symbol referred to by the reloc. */
10318 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10319 &pic_ext_target);
35c08157 10320
1c8f6a4d
KLC		 10321 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10322 || foff < -CONSERVATIVE_24BIT_S1)
10323 return FALSE;
35c08157 10324
1c8f6a4d
KLC		 10325 /* Convert it to "j label", it may be converted to j8 in the final
10326 pass of relaxation. Therefore, we do not consider this currently. */
10327 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10328 R_NDS32_PTR_RESOLVED, irel->r_addend);
10329 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10330 R_NDS32_EMPTY, irel->r_addend);
35c08157 10331
1c8f6a4d
KLC		 10332 if (ptr_irel == irelend || em_irel == irelend)
10333 {
10334 (*_bfd_error_handler)
10335 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10336 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10337 return FALSE;
10338 }
35c08157 10339
1c8f6a4d
KLC		 10340 em_irel->r_info =
10341 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10342 ptr_irel->r_addend = 1;
35c08157 10343
1c8f6a4d
KLC		 10344 /* Write instruction. */
10345 insn = INSN_J;
10346 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10347
1c8f6a4d
KLC		 10348 /* Clear relocations. */
10349 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10350
1c8f6a4d
KLC		 10351 /* If there is function cse, HI20 can not remove now. */
10352 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10353 R_NDS32_LONGJUMP4, laddr);
10354 if (call_irel == irelend)
10355 {
10356 *insn_len = 0;
10357 hi_irel->r_info =
10358 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10359 }
35c08157 10360
1c8f6a4d
KLC		 10361 return TRUE;
10362}
35c08157 10363
1c8f6a4d 10364/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10365
1c8f6a4d
KLC		 10366static bfd_boolean
10367nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10368 Elf_Internal_Rela *internal_relocs, int *insn_len,
10369 int *seq_len, bfd_byte *contents,
10370 Elf_Internal_Sym *isymbuf,
10371 Elf_Internal_Shdr *symtab_hdr)
10372{
10373 /* There are 2 variations for LONGJUMP5
10374 case 2-4; 1st insn convertible, 16-bit on.
10375 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10376 j label ; 25_PCREL/INSN16
10377 $1:
10378
10379 case 4-4; 1st insn not convertible
10380 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10381 j label ; 25_PCREL/INSN16
10382 .L1: */
10383
10384 bfd_vma laddr;
10385 Elf_Internal_Rela *cond_irel, *irelend;
10386 int pic_ext_target = 0;
10387 unsigned int i;
10388 bfd_signed_vma foff;
10389 uint32_t insn, re_insn = 0;
10390 uint16_t insn16, re_insn16 = 0;
10391 unsigned long reloc;
35c08157 10392
1c8f6a4d
KLC		 10393 enum elf_nds32_reloc_type checked_types[] =
10394 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10395 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10396
1c8f6a4d
KLC		 10397 irelend = internal_relocs + sec->reloc_count;
10398 laddr = irel->r_offset;
35c08157 10399
1c8f6a4d
KLC		 10400 /* Get the reloc for the address from which the register is
10401 being loaded. This reloc will tell us which function is
10402 actually being called. */
35c08157 10403
1c8f6a4d
KLC		 10404 cond_irel =
10405 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10406 R_NDS32_25_PCREL_RELA, irel->r_addend);
10407 if (cond_irel == irelend)
10408 {
10409 (*_bfd_error_handler)
10410 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10411 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10412 return FALSE;
10413 }
35c08157 10414
1c8f6a4d
KLC		 10415 /* Get the value of the symbol referred to by the reloc. */
10416 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10417 &pic_ext_target);
35c08157 10418
1c8f6a4d
KLC		 10419 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10420 || foff >= CONSERVATIVE_16BIT_S1)
10421 return FALSE;
35c08157 10422
1c8f6a4d
KLC		 10423 /* Get the all corresponding instructions. */
10424 insn = bfd_getb32 (contents + laddr);
10425 /* Check instruction size. */
10426 if (insn & 0x80000000)
10427 {
10428 *seq_len = 0;
10429 insn16 = insn >> 16;
10430 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10431 }
10432 else
10433 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10434
1c8f6a4d
KLC		 10435 if (N32_OP6 (re_insn) == N32_OP6_BR1
10436 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10437 {
10438 /* beqs label ; 15_PCREL. */
10439 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10440 reloc = R_NDS32_15_PCREL_RELA;
10441 }
10442 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10443 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10444 {
10445 /* beqz label ; 17_PCREL. */
10446 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10447 reloc = R_NDS32_17_PCREL_RELA;
10448 }
10449 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10450 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10451 {
10452 /* beqc label ; 9_PCREL. */
10453 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10454 reloc = R_NDS32_WORD_9_PCREL_RELA;
10455 }
10456 else
10457 return FALSE;
35c08157 10458
1c8f6a4d
KLC		 10459 /* Set all relocations. */
10460 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10461
1c8f6a4d
KLC		 10462 /* Clean relocations. */
10463 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10464 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10465 {
10466 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10467 checked_types[i], laddr);
10468 if (cond_irel != irelend)
10469 {
10470 if (*seq_len == 0
10471 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10472 {
1c8f6a4d
KLC		 10473 /* If the branch instruction is 2 byte, it cannot remove
10474 directly. Only convert it to nop16 and remove it after
10475 checking alignment issue. */
10476 insn16 = NDS32_NOP16;
10477 bfd_putb16 (insn16, contents + laddr);
10478 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10479 }
10480 else
1c8f6a4d
KLC		 10481 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10482 R_NDS32_NONE);
35c08157 10483 }
1c8f6a4d
KLC		 10484 }
10485 *insn_len = 0;
35c08157 10486
1c8f6a4d
KLC		 10487 return TRUE;
10488}
35c08157 10489
1c8f6a4d 10490/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10491
1c8f6a4d
KLC		 10492static bfd_boolean
10493nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10494 Elf_Internal_Rela *internal_relocs, int *insn_len,
10495 int *seq_len, bfd_byte *contents,
10496 Elf_Internal_Sym *isymbuf,
10497 Elf_Internal_Shdr *symtab_hdr)
10498{
10499 /* There are 5 variations for LONGJUMP6
10500 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10501 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10502 sethi ta, hi20(symbol) ; HI20/PTR
10503 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10504 jr ta ; PTR_RES/INSN16/EMPTY
10505 .L1:
10506
10507 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10508 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10509 sethi ta, hi20(symbol) ; HI20/PTR
10510 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10511 jr ta ; PTR_RES/INSN16/EMPTY
10512 .L1: */
10513
10514 enum elf_nds32_reloc_type checked_types[] =
10515 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10516 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10517
10518 int reloc_off = 0, cond_removed = 0;
10519 bfd_vma laddr;
10520 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10521 int pic_ext_target = 0;
10522 unsigned int i;
10523 bfd_signed_vma foff;
10524 uint32_t insn, re_insn = 0;
10525 uint16_t insn16, re_insn16 = 0;
10526 unsigned long reloc;
35c08157 10527
1c8f6a4d
KLC		 10528 irelend = internal_relocs + sec->reloc_count;
10529 laddr = irel->r_offset;
35c08157 10530
1c8f6a4d
KLC		 10531 /* Get the reloc for the address from which the register is
10532 being loaded. This reloc will tell us which function is
10533 actually being called. */
10534 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10535 R_NDS32_EMPTY, irel->r_addend);
35c08157 10536
1c8f6a4d
KLC		 10537 if (em_irel == irelend)
10538 {
10539 (*_bfd_error_handler)
10540 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10541 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10542 return FALSE;
10543 }
35c08157 10544
1c8f6a4d
KLC		 10545 /* Get the value of the symbol referred to by the reloc. */
10546 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10547 &pic_ext_target);
35c08157 10548
1c8f6a4d
KLC		 10549 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10550 || foff >= CONSERVATIVE_24BIT_S1)
10551 return FALSE;
35c08157 10552
1c8f6a4d
KLC		 10553 insn = bfd_getb32 (contents + laddr);
10554 /* Check instruction size. */
10555 if (insn & 0x80000000)
10556 {
10557 *seq_len = 0;
10558 insn16 = insn >> 16;
10559 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10560 }
10561 else
10562 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10563
1c8f6a4d
KLC		 10564 /* For simplicity of coding, we are going to modify the section
10565 contents, the section relocs, and the BFD symbol table. We
10566 must tell the rest of the code not to free up this
10567 information. It would be possible to instead create a table
10568 of changes which have to be made, as is done in coff-mips.c;
10569 that would be more work, but would require less memory when
10570 the linker is run. */
35c08157 10571
1c8f6a4d
KLC		 10572 if (N32_OP6 (re_insn) == N32_OP6_BR1
10573 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10574 {
10575 /* beqs label ; 15_PCREL */
10576 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10577 reloc = R_NDS32_15_PCREL_RELA;
10578 cond_removed = 1;
10579 }
10580 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10581 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10582 {
10583 /* beqz label ; 17_PCREL */
10584 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10585 reloc = R_NDS32_17_PCREL_RELA;
10586 cond_removed = 1;
10587 }
10588 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10589 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10590 {
10591 /* Relax to one of the following 2 variations
35c08157 10592
1c8f6a4d
KLC		 10593 case 2-4; 1st insn convertible, 16-bit on.
10594 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10595 j label ; 25_PCREL/INSN16
10596 $1:
35c08157 10597
1c8f6a4d
KLC		 10598 case 4-4; 1st insn not convertible
10599 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10600 j label ; 25_PCREL/INSN16
10601 .L1: */
35c08157 10602
1c8f6a4d
KLC		 10603 /* Use j label as second instruction. */
10604 insn = INSN_J;
10605 reloc = R_NDS32_25_PCREL_RELA;
10606 bfd_putb32 (insn, contents + em_irel->r_offset);
10607 }
10608 else
10609 return FALSE;
35c08157 10610
1c8f6a4d
KLC		 10611 /* Set all relocations. */
10612 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10613
1c8f6a4d
KLC		 10614 cond_irel =
10615 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10616 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10617 cond_irel->r_addend = 1;
35c08157 10618
1c8f6a4d
KLC		 10619 /* Use INSN16 of first branch instruction to distinguish if keeping
10620 INSN16 of final instruction or not. */
10621 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10622 R_NDS32_INSN16, irel->r_offset);
10623 if (insn_irel == irelend)
10624 {
10625 /* Clean the final INSN16. */
10626 insn_irel =
10627 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10628 R_NDS32_INSN16, em_irel->r_offset);
10629 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10630 R_NDS32_NONE);
10631 }
10632
10633 if (cond_removed == 1)
10634 {
10635 *insn_len = 0;
10636
10637 /* Clear relocations. */
10638 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10639
1c8f6a4d
KLC		 10640 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10641 {
10642 cond_irel =
10643 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10644 checked_types[i], laddr);
10645 if (cond_irel != irelend)
35c08157 10646 {
1c8f6a4d
KLC		 10647 if (*seq_len == 0
10648 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10649 {
10650 /* If the branch instruction is 2 byte, it cannot remove
10651 directly. Only convert it to nop16 and remove it after
10652 checking alignment issue. */
10653 insn16 = NDS32_NOP16;
10654 bfd_putb16 (insn16, contents + laddr);
10655 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10656 }
10657 else
10658 cond_irel->r_info =
10659 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10660 }
35c08157 10661 }
1c8f6a4d
KLC		 10662 }
10663 else
10664 {
10665 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10666 R_NDS32_LONGJUMP5);
10667 }
35c08157 10668
1c8f6a4d
KLC		 10669 return TRUE;
10670}
35c08157 10671
1c8f6a4d 10672/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10673
1c8f6a4d
KLC		 10674static bfd_boolean
10675nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10676 Elf_Internal_Rela *internal_relocs, int *insn_len,
10677 int *seq_len, bfd_byte *contents,
10678 Elf_Internal_Sym *isymbuf,
10679 Elf_Internal_Shdr *symtab_hdr)
10680{
10681 /* There are 2 variations for LONGJUMP5
10682 case 2-4; 1st insn convertible, 16-bit on.
10683 movi55 ta, imm11 ; LONGJUMP7/INSN16
10684 beq rt, ta, label ; 15_PCREL
10685
10686 case 4-4; 1st insn not convertible
10687 movi55 ta, imm11 ; LONGJUMP7/INSN16
10688 beq rt, ta, label ; 15_PCREL */
10689
10690 bfd_vma laddr;
10691 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10692 int pic_ext_target = 0;
10693 bfd_signed_vma foff;
10694 uint32_t insn, re_insn = 0;
10695 uint16_t insn16;
10696 uint32_t imm11;
35c08157 10697
1c8f6a4d
KLC		 10698 irelend = internal_relocs + sec->reloc_count;
10699 laddr = irel->r_offset;
35c08157 10700
1c8f6a4d
KLC		 10701 /* Get the reloc for the address from which the register is
10702 being loaded. This reloc will tell us which function is
10703 actually being called. */
35c08157 10704
1c8f6a4d
KLC		 10705 cond_irel =
10706 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10707 R_NDS32_15_PCREL_RELA, irel->r_addend);
10708 if (cond_irel == irelend)
10709 {
10710 (*_bfd_error_handler)
10711 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10712 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10713 return FALSE;
10714 }
35c08157 10715
1c8f6a4d
KLC		 10716 /* Get the value of the symbol referred to by the reloc. */
10717 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10718 &pic_ext_target);
35c08157 10719
1c8f6a4d
KLC		 10720 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10721 || foff >= CONSERVATIVE_8BIT_S1)
10722 return FALSE;
35c08157 10723
1c8f6a4d
KLC		 10724 /* Get the first instruction for its size. */
10725 insn = bfd_getb32 (contents + laddr);
10726 if (insn & 0x80000000)
10727 {
10728 *seq_len = 0;
10729 /* Get the immediate from movi55. */
10730 imm11 = N16_IMM5S (insn >> 16);
10731 }
10732 else
10733 {
10734 /* Get the immediate from movi. */
10735 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10736 }
10737
1c8f6a4d
KLC		 10738 /* Get the branch instruction. */
10739 insn = bfd_getb32 (contents + irel->r_addend);
10740 /* Convert instruction to BR3. */
10741 if ((insn >> 14) & 0x1)
10742 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10743 else
10744 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10745
1c8f6a4d 10746 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10747
1c8f6a4d
KLC		 10748 /* Set all relocations. */
10749 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10750 R_NDS32_WORD_9_PCREL_RELA);
10751
10752 /* Clean relocations. */
10753 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10754 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10755 R_NDS32_INSN16, irel->r_offset);
10756 if (insn_irel != irelend)
10757 {
10758 if (*seq_len == 0)
35c08157 10759 {
1c8f6a4d
KLC		 10760 /* If the first insntruction is 16bit, convert it to nop16. */
10761 insn16 = NDS32_NOP16;
10762 bfd_putb16 (insn16, contents + laddr);
10763 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10764 }
1c8f6a4d
KLC		 10765 else
10766 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10767 R_NDS32_NONE);
35c08157 10768 }
1c8f6a4d 10769 *insn_len = 0;
35c08157 10770
1c8f6a4d
KLC		 10771 return TRUE;
10772}
35c08157 10773
1c8f6a4d 10774#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10775
1c8f6a4d 10776/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10777
1c8f6a4d
KLC		 10778static bfd_boolean
10779nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10780 asection *sec, Elf_Internal_Rela *irel,
10781 Elf_Internal_Rela *internal_relocs, int *insn_len,
10782 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10783 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10784{
6cae483a
AM		 10785 int eliminate_sethi = 0, range_type;
10786 unsigned int i;
1c8f6a4d
KLC		 10787 bfd_vma local_sda, laddr;
10788 int seq_len; /* Original length of instruction sequence. */
10789 uint32_t insn;
10790 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10791 bfd_vma access_addr = 0;
10792 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10793 enum elf_nds32_reloc_type checked_types[] =
10794 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10795 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10796 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10797 R_NDS32_TLS_LE_HI20
10798 };
35c08157 10799
1c8f6a4d
KLC		 10800 irelend = internal_relocs + sec->reloc_count;
10801 seq_len = GET_SEQ_LEN (irel->r_addend);
10802 laddr = irel->r_offset;
10803 *insn_len = seq_len;
35c08157 10804
1c8f6a4d 10805 /* Get the high part relocation. */
6cae483a 10806 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10807 {
10808 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10809 checked_types[i], laddr);
10810 if (hi_irelfn != irelend)
10811 break;
10812 }
35c08157 10813
1c8f6a4d
KLC		 10814 if (hi_irelfn == irelend)
10815 {
10816 (*_bfd_error_handler)
10817 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10818 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10819 return FALSE;
10820 }
35c08157 10821
1c8f6a4d
KLC		 10822 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10823 nds32_elf_final_sda_base (sec->output_section->owner,
10824 link_info, &local_sda, FALSE);
35c08157 10825
1c8f6a4d
KLC		 10826 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10827 {
10828 case R_NDS32_HI20_RELA:
10829 insn = bfd_getb32 (contents + laddr);
10830 access_addr =
10831 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10832
10833 if (range_type == NDS32_LOADSTORE_IMM)
10834 {
10835 struct elf_link_hash_entry *h = NULL;
10836 int indx;
35c08157 10837
1c8f6a4d 10838 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10839 {
1c8f6a4d
KLC		 10840 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10841 h = elf_sym_hashes (abfd)[indx];
35c08157 10842 }
35c08157 10843
1c8f6a4d
KLC		 10844 if ((access_addr < CONSERVATIVE_20BIT)
10845 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10846 {
1c8f6a4d
KLC		 10847 eliminate_sethi = 1;
10848 break;
35c08157 10849 }
1c8f6a4d
KLC		 10850
10851 /* This is avoid to relax symbol address which is fixed
10852 relocations. Ex: _stack. */
10853 if (h && bfd_is_abs_section (h->root.u.def.section))
10854 return FALSE;
10855 }
10856
10857 if (!load_store_relax)
10858 return FALSE;
10859
10860 /* Case for set gp register. */
10861 if (N32_RT5 (insn) == REG_GP)
10862 break;
10863
10864 if (range_type == NDS32_LOADSTORE_FLOAT_S
10865 || range_type == NDS32_LOADSTORE_FLOAT_S)
10866 {
10867 range_l = sdata_range[0][0];
10868 range_h = sdata_range[0][1];
10869 }
10870 else
10871 {
10872 range_l = sdata_range[1][0];
10873 range_h = sdata_range[1][1];
10874 }
10875 break;
10876
10877 case R_NDS32_GOT_HI20:
10878 access_addr =
10879 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10880
10881 /* If this symbol is not in .got, the return value will be -1.
10882 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10883 a negative offset is allowed. */
10884 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10885 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10886 eliminate_sethi = 1;
10887 break;
10888
10889 case R_NDS32_PLT_GOTREL_HI20:
10890 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10891 hi_irelfn, symtab_hdr);
10892
10893 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10894 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10895 eliminate_sethi = 1;
10896 break;
10897
10898 case R_NDS32_GOTOFF_HI20:
10899 access_addr =
10900 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10901
10902 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10903 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10904 eliminate_sethi = 1;
10905 break;
10906
10907 case R_NDS32_GOTPC_HI20:
10908 /* The access_addr must consider r_addend of hi_irel. */
10909 access_addr = sec->output_section->vma + sec->output_offset
10910 + irel->r_offset + hi_irelfn->r_addend;
10911
10912 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10913 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10914 eliminate_sethi = 1;
10915 break;
10916
10917 case R_NDS32_TLS_LE_HI20:
10918 access_addr =
10919 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10920 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10921 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10922 if ((range_type == NDS32_LOADSTORE_IMM)
10923 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10924 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10925 eliminate_sethi = 1;
10926 break;
10927
10928 default:
10929 return FALSE;
10930 }
10931
10932 /* Delete sethi instruction. */
10933 if (eliminate_sethi == 1
10934 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10935 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10936 {
10937 hi_irelfn->r_info =
10938 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10939 irel->r_info =
10940 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10941 *insn_len = 0;
10942 }
10943 return TRUE;
10944}
10945
10946/* Relax LO12 relocation for nds32_elf_relax_section. */
10947
10948static void
10949nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10950 asection *sec, Elf_Internal_Rela *irel,
10951 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10952 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10953{
10954 uint32_t insn;
10955 bfd_vma local_sda, laddr;
10956 unsigned long reloc;
10957 bfd_vma access_addr;
10958 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10959 Elf_Internal_Rela *irelfn = NULL, *irelend;
10960 struct elf_link_hash_entry *h = NULL;
10961 int indx;
10962
10963 /* For SDA base relative relaxation. */
10964 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10965 &local_sda, FALSE);
10966
10967 irelend = internal_relocs + sec->reloc_count;
10968 laddr = irel->r_offset;
10969 insn = bfd_getb32 (contents + laddr);
10970
10971 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10972 return;
10973
10974 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10975
10976 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10977 {
10978 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10979 h = elf_sym_hashes (abfd)[indx];
10980 }
10981
10982 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10983 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10984 {
10985 reloc = R_NDS32_20_RELA;
10986 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10987 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10988 bfd_putb32 (insn, contents + laddr);
10989 }
10990 /* This is avoid to relax symbol address which is fixed
10991 relocations. Ex: _stack. */
10992 else if (N32_OP6 (insn) == N32_OP6_ORI
10993 && h && bfd_is_abs_section (h->root.u.def.section))
10994 return;
10995 else
10996 {
10997 range_l = sdata_range[1][0];
10998 range_h = sdata_range[1][1];
10999 switch (ELF32_R_TYPE (irel->r_info))
11000 {
11001 case R_NDS32_LO12S0_RELA:
11002 reloc = R_NDS32_SDA19S0_RELA;
11003 break;
11004 case R_NDS32_LO12S1_RELA:
11005 reloc = R_NDS32_SDA18S1_RELA;
11006 break;
11007 case R_NDS32_LO12S2_RELA:
11008 reloc = R_NDS32_SDA17S2_RELA;
11009 break;
11010 case R_NDS32_LO12S2_DP_RELA:
11011 range_l = sdata_range[0][0];
11012 range_h = sdata_range[0][1];
11013 reloc = R_NDS32_SDA12S2_DP_RELA;
11014 break;
11015 case R_NDS32_LO12S2_SP_RELA:
11016 range_l = sdata_range[0][0];
11017 range_h = sdata_range[0][1];
11018 reloc = R_NDS32_SDA12S2_SP_RELA;
11019 break;
11020 default:
11021 return;
11022 }
11023
11024 /* There are range_h and range_l because linker has to promise
11025 all sections move cross one page together. */
11026 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11027 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11028 {
11029 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11030 {
1c8f6a4d
KLC		 11031 /* Maybe we should add R_NDS32_INSN16 reloc type here
11032 or manually do some optimization. sethi can't be
11033 eliminated when updating $gp so the relative ori
11034 needs to be preserved. */
11035 return;
35c08157 11036 }
1c8f6a4d
KLC		 11037 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11038 &insn))
11039 return;
11040 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11041 bfd_putb32 (insn, contents + laddr);
11042
11043 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11044 R_NDS32_INSN16);
11045 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11046 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11047 irelfn->r_info =
11048 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11049
35c08157 11050 }
1c8f6a4d
KLC		 11051 }
11052 return;
11053}
35c08157 11054
1c8f6a4d
KLC		 11055/* Relax low part of PIC instruction pattern. */
11056
11057static void
11058nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11059 asection *sec, Elf_Internal_Rela *irel,
11060 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11061 Elf_Internal_Shdr *symtab_hdr)
11062{
11063 uint32_t insn;
11064 bfd_vma local_sda, laddr;
11065 bfd_signed_vma foff;
11066 unsigned long reloc;
11067
11068 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11069 &local_sda, FALSE);
11070 laddr = irel->r_offset;
11071 insn = bfd_getb32 (contents + laddr);
11072
11073 if (N32_OP6 (insn) != N32_OP6_ORI)
11074 return;
11075
11076 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11077 {
11078 foff = calculate_got_memory_address (abfd, link_info, irel,
11079 symtab_hdr) - local_sda;
11080 reloc = R_NDS32_GOT20;
11081 }
11082 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11083 {
11084 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11085 symtab_hdr) - local_sda;
11086 reloc = R_NDS32_PLT_GOTREL_LO20;
11087 }
11088 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11089 {
11090 foff = calculate_memory_address (abfd, irel, isymbuf,
11091 symtab_hdr) - local_sda;
11092 reloc = R_NDS32_GOTOFF;
11093 }
11094 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11095 {
11096 foff = local_sda - sec->output_section->vma + sec->output_offset
11097 + irel->r_offset + irel->r_addend;
11098 reloc = R_NDS32_GOTPC20;
11099 }
11100 else
11101 return;
11102
11103 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11104 {
11105 /* Turn into MOVI. */
11106 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11107 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11108 bfd_putb32 (insn, contents + laddr);
11109 }
11110}
11111
11112/* Relax low part of LE TLS instruction pattern. */
11113
11114static void
11115nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11116 Elf_Internal_Rela *irel,
11117 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11118 Elf_Internal_Shdr *symtab_hdr)
11119{
11120 uint32_t insn;
11121 bfd_vma laddr;
11122 bfd_signed_vma foff;
11123 unsigned long reloc;
11124
11125 laddr = irel->r_offset;
11126 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11127 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11128 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11129 insn = bfd_getb32 (contents + laddr);
11130
11131 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11132 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11133 {
11134 /* Pattern sethi-ori transform to movi. */
11135 reloc = R_NDS32_TLS_LE_20;
11136 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11137 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11138 bfd_putb32 (insn, contents + laddr);
11139 }
11140}
11141
11142/* Relax LE TLS calculate address instruction pattern. */
11143
11144static void
11145nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11146 asection *sec, Elf_Internal_Rela *irel,
11147 Elf_Internal_Rela *internal_relocs,
11148 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11149 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11150{
11151 /* Local TLS non-pic
11152 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11153 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11154 add ra, ta, tp ; TLS_LE_ADD */
11155
11156 uint32_t insn;
11157 bfd_vma laddr;
11158 bfd_signed_vma foff;
11159 Elf_Internal_Rela *i1_irelfn, *irelend;
11160
11161 irelend = internal_relocs + sec->reloc_count;
11162 laddr = irel->r_offset;
11163 insn = bfd_getb32 (contents + laddr);
11164 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11165 R_NDS32_PTR_RESOLVED);
11166 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11167 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11168 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11169
11170 /* The range is +/-16k. */
11171 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11172 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11173 {
11174 /* Transform add to addi. */
11175 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11176 irel->r_info =
11177 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11178
11179 bfd_putb32 (insn, contents + laddr);
11180 if (i1_irelfn != irelend)
11181 {
11182 i1_irelfn->r_addend |= 1;
11183 *again = TRUE;
11184 }
11185 }
11186}
11187
11188/* Relax LE TLS load store instruction pattern. */
11189
11190static void
11191nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11192 asection *sec, Elf_Internal_Rela *irel,
11193 Elf_Internal_Rela *internal_relocs,
11194 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11195 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11196{
11197
11198 uint32_t insn;
11199 bfd_vma laddr;
11200 bfd_signed_vma foff;
11201 Elf_Internal_Rela *i1_irelfn, *irelend;
11202 int success = 0;
11203
11204 irelend = internal_relocs + sec->reloc_count;
11205 laddr = irel->r_offset;
11206 insn = bfd_getb32 (contents + laddr);
11207 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11208 R_NDS32_PTR_RESOLVED);
11209 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11210 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11211 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11212
11213 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11214 {
11215 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11216 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11217 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11218 /* The range is +/-16k. */
11219 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11220 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11221 {
11222 insn =
11223 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11224 irel->r_info =
11225 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11226 success = 1;
11227 break;
11228 }
11229 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11230 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11231 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11232 /* The range is +/-32k. */
11233 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11234 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11235 {
1c8f6a4d
KLC		 11236 insn =
11237 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11238 irel->r_info =
11239 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11240 success = 1;
11241 break;
11242 }
11243 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11244 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11245 /* The range is +/-64k. */
11246 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11247 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11248 {
11249 insn =
11250 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11251 irel->r_info =
11252 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11253 success = 1;
11254 break;
11255 }
11256 default:
11257 break;
11258 }
35c08157 11259
1c8f6a4d
KLC		 11260 if (success)
11261 {
11262 bfd_putb32 (insn, contents + laddr);
11263 if (i1_irelfn != irelend)
11264 {
11265 i1_irelfn->r_addend |= 1;
11266 *again = TRUE;
11267 }
11268 }
11269}
35c08157 11270
1c8f6a4d 11271/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11272
1c8f6a4d
KLC		 11273static bfd_boolean
11274nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11275 Elf_Internal_Rela *internal_relocs, int *insn_len,
11276 int *seq_len, bfd_byte *contents)
11277{
11278 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11279
1c8f6a4d 11280 irelend = internal_relocs + sec->reloc_count;
35c08157 11281
1c8f6a4d
KLC		 11282 re_irel =
11283 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11284 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11285
1c8f6a4d
KLC		 11286 if (re_irel == irelend)
11287 {
11288 (*_bfd_error_handler)
11289 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11290 abfd, (long) irel->r_offset);
11291 return FALSE;
11292 }
35c08157 11293
1c8f6a4d
KLC		 11294 if (re_irel->r_addend != 1)
11295 return FALSE;
35c08157 11296
1c8f6a4d
KLC		 11297 /* Pointed target is relaxed and no longer needs this void *,
11298 change the type to NONE. */
11299 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11300
1c8f6a4d
KLC		 11301 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11302 not exist, it means only count 1 and remove it directly. */
11303 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11304 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11305 R_NDS32_PTR_COUNT);
11306 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11307 R_NDS32_PTR);
11308 if (count_irel != irelend)
11309 {
11310 if (--count_irel->r_addend > 0)
11311 return FALSE;
11312 }
11313
11314 if (ptr_irel != irelend)
11315 return FALSE;
11316
11317 /* If the PTR_COUNT is already 0, remove current instruction. */
11318 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11319 *insn_len = 0;
11320 return TRUE;
11321}
11322
11323/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11324
11325static void
11326nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11327 asection *sec, Elf_Internal_Rela *irel,
11328 Elf_Internal_Rela *internal_relocs,
11329 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11330 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11331{
11332 uint32_t insn;
11333 bfd_signed_vma foff;
11334 Elf_Internal_Rela *i1_irelfn, *irelend;
11335 bfd_vma local_sda, laddr;
11336
11337 irelend = internal_relocs + sec->reloc_count;
11338 laddr = irel->r_offset;
11339 insn = bfd_getb32 (contents + laddr);
11340
11341 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11342 we need additional space. It might be help if we could
11343 borrow some space from instructions to be eliminated
11344 such as sethi, ori, add. */
11345 if (insn & 0x80000000)
11346 return;
11347
11348 if (nds32_elf_check_dup_relocs
11349 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11350 return;
11351
11352 i1_irelfn =
11353 find_relocs_at_address (irel, internal_relocs, irelend,
11354 R_NDS32_PTR_RESOLVED);
11355
11356 /* FIXIT 090606
11357 The boundary should be reduced since the .plt section hasn't
11358 been created and the address of specific entry is still unknown
11359 Maybe the range between the function call and the begin of the
11360 .text section can be used to decide if the .plt is in the range
11361 of function call. */
11362
11363 if (N32_OP6 (insn) == N32_OP6_ALU1
11364 && N32_SUB5 (insn) == N32_ALU1_ADD)
11365 {
11366 /* Get the value of the symbol referred to by the reloc. */
11367 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11368 &local_sda, FALSE);
11369 foff = (bfd_signed_vma) (calculate_plt_memory_address
11370 (abfd, link_info, isymbuf, irel,
11371 symtab_hdr) - local_sda);
11372 /* This condition only happened when symbol is undefined. */
11373 if (foff == 0)
11374 return;
11375
11376 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11377 return;
11378 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11379 R_NDS32_PLT_GOTREL_LO19);
11380 /* addi.gp */
11381 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11382 }
11383 else if (N32_OP6 (insn) == N32_OP6_JREG
11384 && N32_SUB5 (insn) == N32_JREG_JRAL)
11385 {
11386 /* Get the value of the symbol referred to by the reloc. */
11387 foff =
11388 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11389 /* This condition only happened when symbol is undefined. */
11390 if (foff == 0)
11391 return;
11392 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11393 return;
11394 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11395 insn = INSN_JAL;
11396 }
11397 else
11398 return;
11399
11400 bfd_putb32 (insn, contents + laddr);
11401 if (i1_irelfn != irelend)
11402 {
11403 i1_irelfn->r_addend |= 1;
11404 *again = TRUE;
11405 }
11406}
11407
11408/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11409
11410static void
11411nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11412 asection *sec, Elf_Internal_Rela *irel,
11413 Elf_Internal_Rela *internal_relocs,
11414 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11415 bfd_boolean *again)
11416{
11417 uint32_t insn;
11418 bfd_signed_vma foff;
11419 Elf_Internal_Rela *i1_irelfn, *irelend;
11420 bfd_vma local_sda, laddr;
11421
11422 irelend = internal_relocs + sec->reloc_count;
11423 laddr = irel->r_offset;
11424 insn = bfd_getb32 (contents + laddr);
11425 if (insn & 0x80000000)
11426 return;
11427
11428 if (nds32_elf_check_dup_relocs
11429 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11430 return;
11431
11432 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11433 R_NDS32_PTR_RESOLVED);
11434
11435 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11436 &local_sda, FALSE);
11437 foff = calculate_got_memory_address (abfd, link_info, irel,
11438 symtab_hdr) - local_sda;
11439
11440 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11441 {
11442 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11443 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11444 irel->r_info =
11445 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11446 bfd_putb32 (insn, contents + laddr);
11447 if (i1_irelfn != irelend)
11448 {
11449 i1_irelfn->r_addend |= 1;
11450 *again = TRUE;
11451 }
11452 }
11453}
11454
11455/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11456
11457static void
11458nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11459 asection *sec, Elf_Internal_Rela *irel,
11460 Elf_Internal_Rela *internal_relocs,
11461 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11462 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11463{
11464 int opc_insn_gotoff;
11465 uint32_t insn;
11466 bfd_signed_vma foff;
11467 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11468 bfd_vma local_sda, laddr;
11469
11470 irelend = internal_relocs + sec->reloc_count;
11471 laddr = irel->r_offset;
11472 insn = bfd_getb32 (contents + laddr);
11473
11474 if (insn & 0x80000000)
11475 return;
11476
11477 if (nds32_elf_check_dup_relocs
11478 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11479 return;
11480
11481 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11482 R_NDS32_PTR_RESOLVED);
11483 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11484 &local_sda, FALSE);
11485 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11486 foff = foff - local_sda;
11487
11488 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11489 return;
11490
11491 /* Concatenate opcode and sub-opcode for switch case.
11492 It may be MEM or ALU1. */
11493 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11494 switch (opc_insn_gotoff)
11495 {
11496 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11497 /* 4-byte aligned. */
11498 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11499 irel->r_info =
11500 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11501 break;
11502 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11503 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11504 irel->r_info =
11505 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11506 break;
11507 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11508 /* 2-byte aligned. */
11509 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11510 irel->r_info =
11511 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11512 break;
11513 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11514 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11515 irel->r_info =
11516 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11517 break;
11518 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11519 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11520 irel->r_info =
11521 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11522 break;
11523 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11524 /* 1-byte aligned. */
11525 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11526 irel->r_info =
11527 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11528 break;
11529 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11530 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11531 irel->r_info =
11532 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11533 break;
11534 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11535 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11536 irel->r_info =
11537 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11538 break;
11539 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11540 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11541 irel->r_info =
11542 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11543 break;
11544 default:
11545 return;
11546 }
11547
11548 bfd_putb32 (insn, contents + laddr);
11549 if (i1_irelfn != irelend)
11550 {
11551 i1_irelfn->r_addend |= 1;
11552 *again = TRUE;
11553 }
11554 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11555 R_NDS32_INSN16)) != irelend)
11556 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11557
11558}
11559
11560static bfd_boolean
11561nds32_relax_adjust_label (bfd *abfd, asection *sec,
11562 Elf_Internal_Rela *internal_relocs,
11563 bfd_byte *contents,
11564 nds32_elf_blank_t **relax_blank_list,
11565 int optimize, int opt_size)
11566{
11567 /* This code block is used to adjust 4-byte alignment by relax a pair
11568 of instruction a time.
11569
11570 It recognizes three types of relocations.
11571 1. R_NDS32_LABEL - a aligment.
11572 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11573 3. is_16bit_NOP () - remove a 16-bit instruction. */
11574
11575 /* TODO: It seems currently implementation only support 4-byte aligment.
11576 We should handle any-aligment. */
11577
11578 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11579 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11580 Elf_Internal_Rela rel_temp;
11581 Elf_Internal_Rela *irelend;
11582 bfd_vma address;
11583 uint16_t insn16;
11584
11585 /* Checking for branch relaxation relies on the relocations to
11586 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11587 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11588 sizeof (Elf_Internal_Rela), compar_reloc);
11589
11590 irelend = internal_relocs + sec->reloc_count;
11591
11592 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11593 /* FIXME: Can we generate the right order in assembler?
11594 So we don't have to swapping them here. */
11595
11596 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11597 label_rel < irelend; label_rel++)
11598 {
11599 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11600 continue;
11601
11602 /* Find the first reloc has the same offset with label_rel. */
11603 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11604 insn_rel++;
11605
11606 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11607 insn_rel++)
11608 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11609 address. */
11610 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11611 break;
11612
11613 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11614 && insn_rel < label_rel)
11615 {
11616 /* Swap the two reloc if the R_NDS32_INSN16 is
11617 before R_NDS32_LABEL. */
11618 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11619 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11620 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11621 }
11622 }
11623
11624 label_rel = NULL;
11625 insn_rel = NULL;
11626 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11627 or higher, remove other R_NDS32_LABEL with lower alignment.
11628 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11629 then the R_NDS32_LABEL sequence is broke. */
11630 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11631 {
11632 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11633 {
11634 if (label_rel == NULL)
11635 {
11636 if (tmp_rel->r_addend < 2)
11637 label_rel = tmp_rel;
11638 continue;
11639 }
11640 else if (tmp_rel->r_addend > 1)
11641 {
11642 /* Remove all LABEL relocation from label_rel to tmp_rel
11643 including relocations with same offset as tmp_rel. */
11644 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11645 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11646 {
11647 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11648 && tmp2_rel->r_addend < 2)
11649 tmp2_rel->r_info =
11650 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11651 R_NDS32_NONE);
11652 }
11653 label_rel = NULL;
11654 }
11655 }
11656 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11657 {
11658 /* A new INSN16 which can be converted, so clear label_rel. */
11659 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11660 irelend, &insn16)
11661 || is_16bit_NOP (abfd, sec, tmp_rel))
11662 label_rel = NULL;
11663 }
11664 }
11665
11666 label_rel = NULL;
11667 insn_rel = NULL;
11668 /* Optimized for speed and nothing has not been relaxed.
11669 It's time to align labels.
11670 We may convert a 16-bit instruction right before a label to
11671 32-bit, in order to align the label if necessary
11672 all reloc entries has been sorted by r_offset. */
11673 for (irel = internal_relocs; irel < irelend; irel++)
11674 {
11675 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11676 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11677 continue;
11678
11679 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11680 {
11681 /* A new INSN16 found, resize the old one. */
11682 if (is_convert_32_to_16
11683 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11684 || is_16bit_NOP (abfd, sec, irel))
11685 {
11686 if (insn_rel)
11687 {
11688 /* Previous INSN16 reloc exists, reduce its
11689 size to 16-bit. */
11690 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11691 irelend, &insn16))
35c08157 11692 {
1c8f6a4d
KLC		 11693 nds32_elf_write_16 (abfd, contents, insn_rel,
11694 internal_relocs, irelend, insn16);
11695
11696 if (!insert_nds32_elf_blank_recalc_total
11697 (relax_blank_list, insn_rel->r_offset + 2, 2))
11698 return FALSE;
11699 }
11700 else if (is_16bit_NOP (abfd, sec, insn_rel))
11701 {
11702 if (!insert_nds32_elf_blank_recalc_total
11703 (relax_blank_list, insn_rel->r_offset, 2))
11704 return FALSE;
11705 }
11706 insn_rel->r_info =
11707 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11708 }
11709 /* Save the new one for later use. */
11710 insn_rel = irel;
11711 }
11712 else
11713 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11714 R_NDS32_NONE);
11715 }
11716 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11717 {
11718 /* Search for label. */
11719 int force_relax = 0;
11720
11721 /* Label on 16-bit instruction or optimization
11722 needless, just reset this reloc. */
11723 insn16 = bfd_getb16 (contents + irel->r_offset);
11724 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11725 {
11726 irel->r_info =
11727 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11728 continue;
11729 }
11730
11731 address =
11732 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11733 irel->r_offset, 1);
11734
11735 if (!insn_rel)
11736 {
11737 /* Check if there is case which can not be aligned. */
11738 if (irel->r_addend == 2 && address & 0x2)
11739 return FALSE;
11740 continue;
11741 }
11742
11743 /* Try to align this label. */
11744
11745 if ((irel->r_addend & 0x1f) < 2)
11746 {
11747 /* Check if there is a INSN16 at the same address.
11748 Label_rel always seats before insn_rel after
11749 our sort. */
11750
11751 /* Search for INSN16 at LABEL location. If INSN16 is at
11752 same location and this LABEL alignment is lower than 2,
11753 the INSN16 can be converted to 2-byte. */
11754 for (tmp_rel = irel;
11755 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11756 tmp_rel++)
11757 {
11758 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11759 && (is_convert_32_to_16
11760 (abfd, sec, tmp_rel, internal_relocs,
11761 irelend, &insn16)
11762 || is_16bit_NOP (abfd, sec, tmp_rel)))
11763 {
11764 force_relax = 1;
11765 break;
11766 }
11767 }
11768 }
11769
11770 if (force_relax || irel->r_addend == 1 || address & 0x2)
11771 {
11772 /* Label not aligned. */
11773 /* Previous reloc exists, reduce its size to 16-bit. */
11774 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11775 internal_relocs, irelend, &insn16))
11776 {
11777 nds32_elf_write_16 (abfd, contents, insn_rel,
11778 internal_relocs, irelend, insn16);
11779
11780 if (!insert_nds32_elf_blank_recalc_total
11781 (relax_blank_list, insn_rel->r_offset + 2, 2))
11782 return FALSE;
11783 }
11784 else if (is_16bit_NOP (abfd, sec, insn_rel))
11785 {
11786 if (!insert_nds32_elf_blank_recalc_total
11787 (relax_blank_list, insn_rel->r_offset, 2))
11788 return FALSE;
11789 }
11790
11791 }
11792 /* INSN16 reloc is used. */
11793 insn_rel = NULL;
11794 }
11795 }
11796
11797 address =
11798 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11799 if (insn_rel && (address & 0x2 || opt_size))
11800 {
11801 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11802 irelend, &insn16))
11803 {
11804 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11805 irelend, insn16);
11806 if (!insert_nds32_elf_blank_recalc_total
11807 (relax_blank_list, insn_rel->r_offset + 2, 2))
11808 return FALSE;
11809 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11810 R_NDS32_NONE);
11811 }
11812 else if (is_16bit_NOP (abfd, sec, insn_rel))
11813 {
11814 if (!insert_nds32_elf_blank_recalc_total
11815 (relax_blank_list, insn_rel->r_offset, 2))
11816 return FALSE;
11817 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11818 R_NDS32_NONE);
11819 }
11820 }
11821 insn_rel = NULL;
11822 return TRUE;
11823}
11824
11825/* Pick relaxation round. */
11826
11827static int
11828nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11829 struct elf_nds32_link_hash_table *table,
11830 struct bfd_link_info *link_info)
11831{
18393a2e
KLC		 11832 static asection *final_sec, *first_sec = NULL;
11833 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC		 11834 static bfd_boolean set = FALSE;
11835 static bfd_boolean first = TRUE;
11836 int round_table[] = {
11837 NDS32_RELAX_NORMAL_ROUND,
11838 NDS32_RELAX_JUMP_IFC_ROUND,
11839 NDS32_RELAX_EX9_BUILD_ROUND,
11840 NDS32_RELAX_EX9_REPLACE_ROUND,
11841 };
11842 static int pass = 0;
11843 static int relax_round;
11844
18393a2e
KLC		 11845 /* The new round. */
11846 if (init && first_sec == sec)
11847 {
11848 set = TRUE;
11849 normal_again = FALSE;
11850 }
11851
1c8f6a4d
KLC		 11852 if (first)
11853 {
11854 /* Run an empty run to get the final section. */
11855 relax_round = NDS32_RELAX_EMPTY_ROUND;
11856
11857 /* It has to enter relax again because we can
11858 not make sure what the final turn is. */
11859 *again = TRUE;
18393a2e 11860
1c8f6a4d 11861 first = FALSE;
18393a2e 11862 first_sec = sec;
1c8f6a4d
KLC		 11863 }
11864
18393a2e 11865 if (!set)
1c8f6a4d 11866 {
18393a2e 11867 /* Not reenter yet. */
1c8f6a4d
KLC		 11868 final_sec = sec;
11869 return relax_round;
11870 }
11871
1c8f6a4d
KLC		 11872 relax_round = round_table[pass];
11873
18393a2e
KLC		 11874 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11875 normal_again = TRUE;
11876
1c8f6a4d
KLC		 11877 if (!init && final_sec == sec)
11878 {
11879 switch (relax_round)
11880 {
11881 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11882 if (!normal_again)
1c8f6a4d
KLC		 11883 {
11884 /* Normal relaxation done. */
11885 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11886 {
11887 pass++;
11888 *again = TRUE;
11889 }
11890 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11891 {
11892 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11893 *again = TRUE;
11894 }
11895 else if (table->ex9_import_file)
11896 {
11897 /* Import ex9 table. */
11898 if (table->update_ex9_table)
11899 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11900 else
11901 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11902 nds32_elf_ex9_import_table (link_info);
11903 *again = TRUE;
11904 }
11905 }
11906 break;
11907 case NDS32_RELAX_JUMP_IFC_ROUND:
11908 if (!nds32_elf_ifc_finish (link_info))
11909 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11910 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11911 {
11912 pass++;
11913 *again = TRUE;
11914 }
11915 break;
11916 case NDS32_RELAX_EX9_BUILD_ROUND:
11917 nds32_elf_ex9_finish (link_info);
11918 pass++;
11919 *again = TRUE;
11920 break;
11921 case NDS32_RELAX_EX9_REPLACE_ROUND:
11922 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11923 {
11924 /* Do jump IFC optimization again. */
11925 if (!nds32_elf_ifc_finish (link_info))
11926 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11927 }
11928 break;
11929 default:
11930 break;
11931 }
11932 }
11933
11934 return relax_round;
11935}
11936
11937static bfd_boolean
11938nds32_elf_relax_section (bfd *abfd, asection *sec,
11939 struct bfd_link_info *link_info, bfd_boolean *again)
11940{
11941 nds32_elf_blank_t *relax_blank_list = NULL;
11942 Elf_Internal_Shdr *symtab_hdr;
11943 Elf_Internal_Rela *internal_relocs;
11944 Elf_Internal_Rela *irel;
11945 Elf_Internal_Rela *irelend;
11946 Elf_Internal_Sym *isymbuf = NULL;
11947 bfd_byte *contents = NULL;
11948 bfd_boolean result = TRUE;
11949 int optimize = 0;
11950 int opt_size = 0;
11951 uint32_t insn;
11952 uint16_t insn16;
11953
11954 /* Target dependnet option. */
11955 struct elf_nds32_link_hash_table *table;
11956 int load_store_relax;
11957 int relax_round;
11958
11959 relax_blank_list = NULL;
11960
11961 *again = FALSE;
11962
11963 /* Nothing to do for
11964 * relocatable link or
11965 * non-relocatable section or
11966 * non-code section or
11967 * empty content or
11968 * no reloc entry. */
0e1862bb 11969 if (bfd_link_relocatable (link_info)
1c8f6a4d
KLC		 11970 || (sec->flags & SEC_RELOC) == 0
11971 || (sec->flags & SEC_EXCLUDE) == 1
11972 || (sec->flags & SEC_CODE) == 0
11973 || sec->size == 0)
11974 return TRUE;
11975
11976 /* 09.12.11 Workaround. */
11977 /* We have to adjust align for R_NDS32_LABEL if needed.
11978 The adjust approach only can fix 2-byte align once. */
11979 if (sec->alignment_power > 2)
11980 return TRUE;
11981
11982 /* The optimization type to do. */
11983
11984 table = nds32_elf_hash_table (link_info);
11985 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11986 switch (relax_round)
11987 {
11988 case NDS32_RELAX_JUMP_IFC_ROUND:
11989 /* Here is the entrance of ifc jump relaxation. */
11990 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11991 return FALSE;
11992 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11993 return TRUE;
11994
11995 case NDS32_RELAX_EX9_BUILD_ROUND:
11996 /* Here is the entrance of ex9 relaxation. There are two pass of
11997 ex9 relaxation. The one is to traverse all instructions and build
11998 the hash table. The other one is to compare instructions and replace
11999 it by ex9.it. */
12000 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12001 return FALSE;
12002 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12003 return TRUE;
12004
12005 case NDS32_RELAX_EX9_REPLACE_ROUND:
12006 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12007 return FALSE;
12008 return TRUE;
12009
12010 case NDS32_RELAX_EMPTY_ROUND:
12011 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12012 return TRUE;
12013
12014 case NDS32_RELAX_NORMAL_ROUND:
12015 default:
12016 if (sec->reloc_count == 0)
12017 return TRUE;
12018 break;
12019 }
12020
12021 /* The begining of general relaxation. */
12022
12023 if (is_SDA_BASE_set == 0)
12024 {
12025 bfd_vma gp;
12026 is_SDA_BASE_set = 1;
12027 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12028 &gp, FALSE);
12029 relax_range_measurement (abfd);
12030 }
12031
12032 if (is_ITB_BASE_set == 0)
12033 {
12034 /* Set the _ITB_BASE_. */
12035 if (!nds32_elf_ex9_itb_base (link_info))
12036 {
12037 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12038 bfd_set_error (bfd_error_bad_value);
12039 }
12040 }
12041
12042 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12043 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12044 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12045 TRUE /* keep_memory */);
12046 if (internal_relocs == NULL)
12047 goto error_return;
12048
12049 irelend = internal_relocs + sec->reloc_count;
12050 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12051 irelend, R_NDS32_RELAX_ENTRY);
12052
12053 if (irel == irelend)
12054 return TRUE;
12055
12056 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12057 {
12058 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC		 12059 {
12060 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12061 return TRUE;
12062 }
1c8f6a4d
KLC		 12063
12064 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12065 optimize = 1;
12066
12067 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12068 opt_size = 1;
12069 }
12070
12071 load_store_relax = table->load_store_relax;
12072
12073 /* Get symbol table and section content. */
0c4bd9d9 12074 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC		 12075 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12076 goto error_return;
12077
12078 /* Do relax loop only when finalize is not done.
12079 Take care of relaxable relocs except INSN16. */
12080 for (irel = internal_relocs; irel < irelend; irel++)
12081 {
12082 int seq_len; /* Original length of instruction sequence. */
12083 int insn_len = 0; /* Final length of instruction sequence. */
12084 bfd_boolean removed;
12085
12086 insn = 0;
12087 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12088 && (irel->r_addend & 0x1f) >= 2)
12089 optimize = 1;
12090
12091 /* Relocation Types
12092 R_NDS32_LONGCALL1 53
12093 R_NDS32_LONGCALL2 54
12094 R_NDS32_LONGCALL3 55
12095 R_NDS32_LONGJUMP1 56
12096 R_NDS32_LONGJUMP2 57
12097 R_NDS32_LONGJUMP3 58
12098 R_NDS32_LOADSTORE 59 */
12099 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12100 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12101 seq_len = GET_SEQ_LEN (irel->r_addend);
12102
12103 /* Relocation Types
12104 R_NDS32_LONGCALL4 107
12105 R_NDS32_LONGCALL5 108
12106 R_NDS32_LONGCALL6 109
12107 R_NDS32_LONGJUMP4 110
12108 R_NDS32_LONGJUMP5 111
12109 R_NDS32_LONGJUMP6 112
12110 R_NDS32_LONGJUMP7 113 */
12111 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12112 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12113 seq_len = 4;
12114
12115 /* Relocation Types
12116 R_NDS32_LO12S0_RELA 30
12117 R_NDS32_LO12S1_RELA 29
12118 R_NDS32_LO12S2_RELA 28
12119 R_NDS32_LO12S2_SP_RELA 71
12120 R_NDS32_LO12S2_DP_RELA 70
12121 R_NDS32_GOT_LO12 46
12122 R_NDS32_GOTOFF_LO12 50
12123 R_NDS32_PLTREL_LO12 65
12124 R_NDS32_PLT_GOTREL_LO12 67
12125 R_NDS32_17IFC_PCREL_RELA 96
12126 R_NDS32_GOT_SUFF 193
12127 R_NDS32_GOTOFF_SUFF 194
12128 R_NDS32_PLT_GOT_SUFF 195
12129 R_NDS32_MULCALL_SUFF 196
12130 R_NDS32_PTR 197 */
12131 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12132 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12133 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12134 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12135 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12136 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12137 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12138 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12139 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12140 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12141 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12144 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12146 seq_len = 0;
12147 else
12148 continue;
12149
12150 insn_len = seq_len;
12151 removed = FALSE;
12152
12153 switch (ELF32_R_TYPE (irel->r_info))
12154 {
12155 case R_NDS32_LONGCALL1:
12156 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12157 &insn_len, contents, isymbuf,
12158 symtab_hdr);
12159 break;
12160 case R_NDS32_LONGCALL2:
12161 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12162 &insn_len, contents, isymbuf,
12163 symtab_hdr);
12164 break;
12165 case R_NDS32_LONGCALL3:
12166 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12167 &insn_len, contents, isymbuf,
12168 symtab_hdr);
12169 break;
12170 case R_NDS32_LONGJUMP1:
12171 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12172 &insn_len, contents, isymbuf,
12173 symtab_hdr);
12174 break;
12175 case R_NDS32_LONGJUMP2:
12176 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12177 &insn_len, contents, isymbuf,
12178 symtab_hdr);
12179 break;
12180 case R_NDS32_LONGJUMP3:
12181 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12182 &insn_len, contents, isymbuf,
12183 symtab_hdr);
12184 break;
12185 case R_NDS32_LONGCALL4:
12186 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12187 &insn_len, contents, isymbuf,
12188 symtab_hdr);
12189 break;
12190 case R_NDS32_LONGCALL5:
12191 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12192 &insn_len, contents, isymbuf,
12193 symtab_hdr);
12194 break;
12195 case R_NDS32_LONGCALL6:
12196 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12197 &insn_len, contents, isymbuf,
12198 symtab_hdr);
12199 break;
12200 case R_NDS32_LONGJUMP4:
12201 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12202 &insn_len, contents, isymbuf,
12203 symtab_hdr);
12204 break;
12205 case R_NDS32_LONGJUMP5:
12206 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12207 &insn_len, &seq_len, contents,
12208 isymbuf, symtab_hdr);
12209 break;
12210 case R_NDS32_LONGJUMP6:
12211 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12212 &insn_len, &seq_len, contents,
12213 isymbuf, symtab_hdr);
12214 break;
12215 case R_NDS32_LONGJUMP7:
12216 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12217 &insn_len, &seq_len, contents,
12218 isymbuf, symtab_hdr);
12219 break;
12220 case R_NDS32_LOADSTORE:
12221 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12222 internal_relocs, &insn_len,
12223 contents, isymbuf, symtab_hdr,
12224 load_store_relax);
12225 break;
12226 case R_NDS32_LO12S0_RELA:
12227 case R_NDS32_LO12S1_RELA:
12228 case R_NDS32_LO12S2_DP_RELA:
12229 case R_NDS32_LO12S2_SP_RELA:
12230 case R_NDS32_LO12S2_RELA:
12231 /* Relax for low part. */
12232 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12233 contents, isymbuf, symtab_hdr);
12234
12235 /* It is impossible to delete blank, so just continue. */
12236 continue;
12237 case R_NDS32_GOT_LO12:
12238 case R_NDS32_GOTOFF_LO12:
12239 case R_NDS32_PLTREL_LO12:
12240 case R_NDS32_PLT_GOTREL_LO12:
12241 case R_NDS32_GOTPC_LO12:
12242 /* Relax for PIC gp-relative low part. */
12243 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12244 isymbuf, symtab_hdr);
35c08157 12245
1c8f6a4d
KLC		 12246 /* It is impossible to delete blank, so just continue. */
12247 continue;
12248 case R_NDS32_TLS_LE_LO12:
12249 /* Relax for LE TLS low part. */
12250 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12251 isymbuf, symtab_hdr);
35c08157 12252
1c8f6a4d
KLC		 12253 /* It is impossible to delete blank, so just continue. */
12254 continue;
12255 case R_NDS32_TLS_LE_ADD:
12256 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12257 contents, isymbuf, symtab_hdr, again);
12258 /* It is impossible to delete blank, so just continue. */
12259 continue;
12260 case R_NDS32_TLS_LE_LS:
12261 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12262 contents, isymbuf, symtab_hdr, again);
12263 continue;
12264 case R_NDS32_PTR:
12265 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12266 &insn_len, &seq_len, contents);
12267 break;
12268 case R_NDS32_PLT_GOT_SUFF:
12269 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12270 internal_relocs, contents,
12271 isymbuf, symtab_hdr, again);
12272 /* It is impossible to delete blank, so just continue. */
12273 continue;
12274 case R_NDS32_GOT_SUFF:
12275 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12276 internal_relocs, contents,
12277 symtab_hdr, again);
12278 /* It is impossible to delete blank, so just continue. */
12279 continue;
12280 case R_NDS32_GOTOFF_SUFF:
12281 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12282 internal_relocs, contents,
12283 isymbuf, symtab_hdr, again);
12284 /* It is impossible to delete blank, so just continue. */
12285 continue;
12286 default:
12287 continue;
12288
12289 }
12290 if (removed && seq_len - insn_len > 0)
12291 {
12292 if (!insert_nds32_elf_blank
12293 (&relax_blank_list, irel->r_offset + insn_len,
12294 seq_len - insn_len))
12295 goto error_return;
12296 *again = TRUE;
35c08157 12297 }
1c8f6a4d
KLC		 12298 }
12299
12300 calc_nds32_blank_total (relax_blank_list);
12301
12302 if (table->relax_fp_as_gp)
12303 {
12304 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12305 irelend, isymbuf))
12306 goto error_return;
35c08157 12307
1c8f6a4d 12308 if (*again == FALSE)
35c08157 12309 {
1c8f6a4d
KLC		 12310 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12311 irelend))
12312 goto error_return;
35c08157
KLC		 12313 }
12314 }
1c8f6a4d
KLC		 12315
12316 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12317
12318 if (*again == FALSE)
12319 {
12320 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12321 &relax_blank_list, optimize, opt_size))
12322 goto error_return;
12323 }
12324
12325 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12326 If object file is assembled with flag '-Os',
12327 the we don't adjust jump-destination on 4-byte boundary. */
12328
12329 if (relax_blank_list)
12330 {
12331 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12332 relax_blank_list = NULL;
12333 }
12334
12335 if (*again == FALSE)
12336 {
12337 /* Closing the section, so we don't relax it anymore. */
12338 bfd_vma sec_size_align;
12339 Elf_Internal_Rela *tmp_rel;
12340
12341 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12342 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12343 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12344 if ((sec_size_align - sec->size) & 0x2)
12345 {
12346 insn16 = NDS32_NOP16;
12347 bfd_putb16 (insn16, contents + sec->size);
12348 sec->size += 2;
12349 }
12350
12351 while (sec_size_align != sec->size)
12352 {
12353 insn = NDS32_NOP32;
12354 bfd_putb32 (insn, contents + sec->size);
12355 sec->size += 4;
12356 }
12357
1c8f6a4d
KLC		 12358 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12359 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12360 if (tmp_rel != irelend)
12361 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12362
12363 clean_nds32_elf_blank ();
12364 }
12365
12366finish:
12367 if (internal_relocs != NULL
12368 && elf_section_data (sec)->relocs != internal_relocs)
12369 free (internal_relocs);
12370
12371 if (contents != NULL
12372 && elf_section_data (sec)->this_hdr.contents != contents)
12373 free (contents);
12374
12375 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12376 free (isymbuf);
12377
12378 return result;
12379
12380error_return:
12381 result = FALSE;
12382 goto finish;
12383}
12384
12385static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12386{
12387 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12388 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12389 {NULL, 0, 0, 0, 0}
12390};
12391
12392static bfd_boolean
12393nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12394 struct bfd_link_info *info,
12395 void *finfo ATTRIBUTE_UNUSED,
12396 bfd_boolean (*func) (void *, const char *,
12397 Elf_Internal_Sym *,
12398 asection *,
12399 struct elf_link_hash_entry *)
12400 ATTRIBUTE_UNUSED)
12401{
12402 FILE *sym_ld_script = NULL;
12403 struct elf_nds32_link_hash_table *table;
12404
12405 table = nds32_elf_hash_table (info);
12406 sym_ld_script = table->sym_ld_script;
12407
12408 if (check_start_export_sym)
12409 fprintf (sym_ld_script, "}\n");
12410
12411 return TRUE;
12412}
12413
12414static enum elf_reloc_type_class
12415nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12416 const asection *rel_sec ATTRIBUTE_UNUSED,
12417 const Elf_Internal_Rela *rela)
12418{
12419 switch ((int) ELF32_R_TYPE (rela->r_info))
12420 {
12421 case R_NDS32_RELATIVE:
12422 return reloc_class_relative;
12423 case R_NDS32_JMP_SLOT:
12424 return reloc_class_plt;
12425 case R_NDS32_COPY:
12426 return reloc_class_copy;
12427 default:
12428 return reloc_class_normal;
12429 }
12430}
12431
12432/* Put target dependent option into info hash table. */
12433void
12434bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12435 int relax_fp_as_gp,
12436 int eliminate_gc_relocs,
12437 FILE * sym_ld_script, int load_store_relax,
12438 int target_optimize, int relax_status,
12439 int relax_round, FILE * ex9_export_file,
12440 FILE * ex9_import_file,
12441 int update_ex9_table, int ex9_limit,
12442 bfd_boolean ex9_loop_aware,
12443 bfd_boolean ifc_loop_aware)
12444{
12445 struct elf_nds32_link_hash_table *table;
12446
12447 table = nds32_elf_hash_table (link_info);
12448 if (table == NULL)
12449 return;
12450
12451 table->relax_fp_as_gp = relax_fp_as_gp;
12452 table->eliminate_gc_relocs = eliminate_gc_relocs;
12453 table->sym_ld_script = sym_ld_script;
12454 table ->load_store_relax = load_store_relax;
12455 table->target_optimize = target_optimize;
12456 table->relax_status = relax_status;
12457 table->relax_round = relax_round;
12458 table->ex9_export_file = ex9_export_file;
12459 table->ex9_import_file = ex9_import_file;
12460 table->update_ex9_table = update_ex9_table;
12461 table->ex9_limit = ex9_limit;
12462 table->ex9_loop_aware = ex9_loop_aware;
12463 table->ifc_loop_aware = ifc_loop_aware;
12464}
12465\f
12466/* These functions and data-structures are used for fp-as-gp
12467 optimization. */
12468
12469#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12470/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12471 the read-only section and read-write section. */
12472#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12473
12474/* An nds32_fag represent a gp-relative access.
12475 We find best fp-base by using a sliding window
12476 to find a base address which can cover most gp-access. */
12477struct nds32_fag
12478{
12479 struct nds32_fag *next; /* NULL-teminated linked list. */
12480 bfd_vma addr; /* The address of this fag. */
12481 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12482 It is used for applying FP7U2_FLAG. */
12483 int count; /* How many times this address is referred.
12484 There should be exactly `count' relocations
12485 in relas. */
12486 int relas_capcity; /* The buffer size of relas.
12487 We use an array instead of linked-list,
12488 and realloc is used to adjust buffer size. */
12489};
12490
12491static void
12492nds32_fag_init (struct nds32_fag *head)
12493{
12494 memset (head, 0, sizeof (struct nds32_fag));
12495}
12496
12497static void
12498nds32_fag_verify (struct nds32_fag *head)
12499{
12500 struct nds32_fag *iter;
12501 struct nds32_fag *prev;
12502
12503 prev = NULL;
12504 iter = head->next;
12505 while (iter)
12506 {
12507 if (prev && prev->addr >= iter->addr)
12508 puts ("Bug in fp-as-gp insertion.");
12509 prev = iter;
12510 iter = iter->next;
12511 }
12512}
12513
12514/* Insert a fag in ascending order.
12515 If a fag of the same address already exists,
12516 they are chained by relas array. */
12517
12518static void
12519nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12520 Elf_Internal_Rela * rel)
12521{
12522 struct nds32_fag *iter;
12523 struct nds32_fag *new_fag;
12524 const int INIT_RELAS_CAP = 4;
12525
12526 for (iter = head;
12527 iter->next && iter->next->addr <= addr;
12528 iter = iter->next)
12529 /* Find somewhere to insert. */ ;
12530
12531 /* `iter' will be equal to `head' if the list is empty. */
12532 if (iter != head && iter->addr == addr)
12533 {
12534 /* The address exists in the list.
12535 Insert `rel' into relocation list, relas. */
12536
12537 /* Check whether relas is big enough. */
12538 if (iter->count >= iter->relas_capcity)
12539 {
12540 iter->relas_capcity *= 2;
12541 iter->relas = bfd_realloc
12542 (iter->relas, iter->relas_capcity * sizeof (void *));
12543 }
12544 iter->relas[iter->count++] = rel;
12545 return;
12546 }
12547
12548 /* This is a new address. Create a fag node for it. */
12549 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12550 memset (new_fag, 0, sizeof (*new_fag));
12551 new_fag->addr = addr;
12552 new_fag->count = 1;
12553 new_fag->next = iter->next;
12554 new_fag->relas_capcity = INIT_RELAS_CAP;
12555 new_fag->relas = (Elf_Internal_Rela **)
12556 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12557 new_fag->relas[0] = rel;
12558 iter->next = new_fag;
12559
12560 nds32_fag_verify (head);
12561}
12562
12563static void
12564nds32_fag_free_list (struct nds32_fag *head)
12565{
12566 struct nds32_fag *iter;
12567
12568 iter = head->next;
12569 while (iter)
12570 {
12571 struct nds32_fag *tmp = iter;
12572 iter = iter->next;
12573 free (tmp->relas);
12574 tmp->relas = NULL;
12575 free (tmp);
12576 }
12577}
12578
35c08157
KLC		 12579/* Find the best fp-base address.
12580 The relocation associated with that address is returned,
12581 so we can track the symbol instead of a fixed address.
12582
12583 When relaxation, the address of an datum may change,
12584 because a text section is shrinked, so the data section
1c8f6a4d 12585 moves forward. If the aligments of text and data section
35c08157
KLC		 12586 are different, their distance may change too.
12587 Therefore, tracking a fixed address is not appriate. */
12588
12589static int
12590nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12591{
12592 struct nds32_fag *base; /* First fag in the window. */
12593 struct nds32_fag *last; /* First fag outside the window. */
12594 int accu = 0; /* Usage accumulation. */
12595 struct nds32_fag *best; /* Best fag. */
12596 int baccu = 0; /* Best accumulation. */
12597
12598 /* Use first fag for initial, and find the last fag in the window.
12599
12600 In each iteration, we could simply subtract previous fag
12601 and accumulate following fags which are inside the window,
12602 untill we each the end. */
12603
1c8f6a4d
KLC		 12604 if (head->next == NULL)
12605 {
12606 *bestpp = NULL;
12607 return 0;
12608 }
35c08157
KLC		 12609
12610 /* Initialize base. */
12611 base = head->next;
12612 best = base;
12613 for (last = base;
12614 last && last->addr < base->addr + FAG_WINDOW;
12615 last = last->next)
12616 accu += last->count;
12617
12618 baccu = accu;
12619
12620 /* Record the best base in each iteration. */
12621 while (base->next)
1c8f6a4d
KLC		 12622 {
12623 accu -= base->count;
12624 base = base->next;
12625 /* Account fags in window. */
12626 for (/* Nothing. */;
12627 last && last->addr < base->addr + FAG_WINDOW;
12628 last = last->next)
12629 accu += last->count;
12630
12631 /* A better fp-base? */
12632 if (accu > baccu)
12633 {
12634 best = base;
12635 baccu = accu;
12636 }
12637 }
35c08157
KLC		 12638
12639 if (bestpp)
12640 *bestpp = best;
12641 return baccu;
12642}
12643
12644/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12645 so we can convert it fo fp-relative access later.
12646 `best_fag' is the best fp-base. Only those inside the window
12647 of best_fag is applied the flag. */
12648
12649static bfd_boolean
12650nds32_fag_mark_relax (struct bfd_link_info *link_info,
12651 bfd *abfd, struct nds32_fag *best_fag,
12652 Elf_Internal_Rela *internal_relocs,
12653 Elf_Internal_Rela *irelend)
12654{
12655 struct nds32_fag *ifag;
12656 bfd_vma best_fpbase, gp;
12657 bfd *output_bfd;
12658
12659 output_bfd = abfd->sections->output_section->owner;
12660 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12661 best_fpbase = best_fag->addr;
12662
1c8f6a4d
KLC		 12663 if (best_fpbase > gp + sdata_range[1][1]
12664 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12665 return FALSE;
12666
12667 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12668 so we know they can be converted to lwi37.fp. */
12669 for (ifag = best_fag;
12670 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12671 {
12672 int i;
12673
12674 for (i = 0; i < ifag->count; i++)
12675 {
12676 Elf_Internal_Rela *insn16_rel;
12677 Elf_Internal_Rela *fag_rel;
12678
12679 fag_rel = ifag->relas[i];
12680
12681 /* Only if this is within the WINDOWS, FP7U2_FLAG
12682 is applied. */
12683
12684 insn16_rel = find_relocs_at_address
12685 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12686
12687 if (insn16_rel != irelend)
12688 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12689 }
12690 }
12691 return TRUE;
12692}
12693
1c8f6a4d
KLC		 12694/* Reset INSN16 to clean fp as gp. */
12695
12696static void
12697nds32_fag_unmark_relax (struct nds32_fag *fag,
12698 Elf_Internal_Rela *internal_relocs,
12699 Elf_Internal_Rela *irelend)
12700{
12701 struct nds32_fag *ifag;
12702 int i;
12703 Elf_Internal_Rela *insn16_rel;
12704 Elf_Internal_Rela *fag_rel;
12705
12706 for (ifag = fag; ifag; ifag = ifag->next)
12707 {
12708 for (i = 0; i < ifag->count; i++)
12709 {
12710 fag_rel = ifag->relas[i];
12711
12712 /* Restore the INSN16 relocation. */
12713 insn16_rel = find_relocs_at_address
12714 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12715
12716 if (insn16_rel != irelend)
12717 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12718 }
12719 }
12720}
12721
35c08157
KLC		 12722/* This is the main function of fp-as-gp optimization.
12723 It should be called by relax_section. */
12724
12725static bfd_boolean
12726nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12727 bfd *abfd, asection *sec,
12728 Elf_Internal_Rela *internal_relocs,
12729 Elf_Internal_Rela *irelend,
12730 Elf_Internal_Sym *isymbuf)
12731{
12732 Elf_Internal_Rela *begin_rel = NULL;
12733 Elf_Internal_Rela *irel;
12734 struct nds32_fag fag_head;
12735 Elf_Internal_Shdr *symtab_hdr;
12736 bfd_byte *contents;
1c8f6a4d 12737 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12738
12739 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12740
12741 /* Per-function fp-base selection.
12742 1. Create a list for all the gp-relative access.
12743 2. Base on those gp-relative address,
12744 find a fp-base which can cover most access.
12745 3. Use the fp-base for fp-as-gp relaxation.
12746
12747 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12748 we should
12749 1. delete the `la $fp, _FP_BASE_' instruction and
12750 2. not convert lwi.gp to lwi37.fp.
12751
12752 To delete the _FP_BASE_ instruction, we simply apply
12753 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12754
12755 To suppress the conversion, we simply NOT to apply
12756 R_NDS32_INSN16_FP7U2_FLAG flag. */
12757
12758 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12759
0c4bd9d9 12760 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 12761 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12762 return FALSE;
12763
12764 /* Check whether it is worth for fp-as-gp optimization,
12765 i.e., at least 3 gp-load.
12766
12767 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12768 apply this optimization. */
12769
12770 for (irel = internal_relocs; irel < irelend; irel++)
12771 {
12772 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12773 One we enter the begin of the region, we track all the LW/ST
12774 instructions, so when we leave the region, we try to find
12775 the best fp-base address for those LW/ST instructions. */
12776
12777 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12778 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12779 {
12780 /* Begin of the region. */
12781 if (begin_rel)
12782 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12783
12784 begin_rel = irel;
12785 nds32_fag_init (&fag_head);
1c8f6a4d 12786 ifc_inside = FALSE;
35c08157
KLC		 12787 }
12788 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12789 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12790 {
12791 int accu;
1c8f6a4d 12792 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12793 int dist;
12794
12795 /* End of the region.
12796 Check whether it is worth to do fp-as-gp. */
12797
12798 if (begin_rel == NULL)
12799 {
12800 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12801 continue;
12802 }
12803
12804 accu = nds32_fag_find_base (&fag_head, &best_fag);
12805
1c8f6a4d
KLC		 12806 /* Clean FP7U2_FLAG because they may set ever. */
12807 tmp_fag = fag_head.next;
12808 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12809
35c08157
KLC		 12810 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12811 if (accu < FAG_THRESHOLD
12812 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12813 internal_relocs, irelend))
12814 {
12815 /* Not worth to do fp-as-gp. */
12816 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12817 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12818 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12819 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12820 nds32_fag_free_list (&fag_head);
12821 begin_rel = NULL;
12822 continue;
12823 }
12824
12825 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12826 so we use it to record the distance to the reloction of best
12827 fp-base. */
12828 dist = best_fag->relas[0] - begin_rel;
12829 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12830 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12831 relocation. And get the base value when relocating. */
1c8f6a4d 12832 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12833 begin_rel->r_addend |= dist << 16;
12834
12835 nds32_fag_free_list (&fag_head);
12836 begin_rel = NULL;
12837 }
12838
1c8f6a4d 12839 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12840 /* Skip if we are not in the region of fp-as-gp. */
12841 continue;
12842
12843 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12844 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12845 {
12846 bfd_vma addr;
12847 uint32_t insn;
12848
12849 /* A gp-relative access is found. Insert it to the fag-list. */
12850
12851 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12852 insn = bfd_getb32 (contents + irel->r_offset);
12853 if (!N32_IS_RT3 (insn))
12854 continue;
12855
12856 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12857 nds32_fag_insert (&fag_head, addr, irel);
12858 }
12859 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12860 {
12861 begin_rel = NULL;
12862 }
1c8f6a4d
KLC		 12863 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12864 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12865 {
12866 /* Suppress fp as gp when encounter ifc. */
12867 ifc_inside = TRUE;
12868 }
35c08157
KLC		 12869 }
12870
12871 return TRUE;
12872}
12873
12874/* Remove unused `la $fp, _FD_BASE_' instruction. */
12875
12876static bfd_boolean
12877nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12878 Elf_Internal_Rela *internal_relocs,
12879 Elf_Internal_Rela *irelend)
12880{
12881 Elf_Internal_Rela *irel;
12882 Elf_Internal_Shdr *symtab_hdr;
12883 bfd_byte *contents = NULL;
12884 nds32_elf_blank_t *relax_blank_list = NULL;
12885 bfd_boolean result = TRUE;
12886 bfd_boolean unused_region = FALSE;
12887
12888 /*
12889 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12890 * R_NDS32_17IFC_PCREL_RELA
12891 * R_NDS32_10IFCU_PCREL_RELA
12892
12893 CASE??????????????
12894 */
12895
12896 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12897 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC		 12898
12899 for (irel = internal_relocs; irel < irelend; irel++)
12900 {
12901 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12902 we marked to in previous pass.
12903 DO NOT scan relocations again, since we've alreadly decided it
12904 and set the flag. */
12905 const char *syname;
12906 int syndx;
12907 uint32_t insn;
12908
12909 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12910 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12911 unused_region = TRUE;
12912 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12913 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12914 unused_region = FALSE;
12915
12916 /* We're not in the region. */
12917 if (!unused_region)
12918 continue;
12919
12920 /* _FP_BASE_ must be a GLOBAL symbol. */
12921 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12922 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12923 continue;
12924
12925 /* The symbol name must be _FP_BASE_. */
12926 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12927 if (strcmp (syname, FP_BASE_NAME) != 0)
12928 continue;
12929
12930 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12931 {
12932 /* addi.gp $fp, -256 */
12933 insn = bfd_getb32 (contents + irel->r_offset);
12934 if (insn != INSN_ADDIGP_TO_FP)
12935 continue;
12936 }
12937 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12938 {
12939 /* addi $fp, $gp, -256 */
12940 insn = bfd_getb32 (contents + irel->r_offset);
12941 if (insn != INSN_ADDI_GP_TO_FP)
12942 continue;
12943 }
12944 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12945 {
12946 /* movi $fp, FP_BASE */
12947 insn = bfd_getb32 (contents + irel->r_offset);
12948 if (insn != INSN_MOVI_TO_FP)
12949 continue;
12950 }
12951 else
12952 continue;
12953
12954 /* We got here because a FP_BASE instruction is found. */
12955 if (!insert_nds32_elf_blank_recalc_total
12956 (&relax_blank_list, irel->r_offset, 4))
12957 goto error_return;
12958 }
12959
12960finish:
12961 if (relax_blank_list)
12962 {
12963 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12964 relax_blank_list = NULL;
12965 }
12966 return result;
12967
12968error_return:
12969 result = FALSE;
12970 goto finish;
12971}
1c8f6a4d
KLC		 12972
12973/* This is a version of bfd_generic_get_relocated_section_contents.
12974 We need this variety because relaxation will modify the dwarf
12975 infomation. When there is undefined symbol reference error mesage,
12976 linker need to dump line number where the symbol be used. However
12977 the address is be relaxed, it can not get the original dwarf contents.
12978 The variety only modify function call for reading in the section. */
12979
12980static bfd_byte *
12981nds32_elf_get_relocated_section_contents (bfd *abfd,
12982 struct bfd_link_info *link_info,
12983 struct bfd_link_order *link_order,
12984 bfd_byte *data,
12985 bfd_boolean relocatable,
12986 asymbol **symbols)
12987{
12988 bfd *input_bfd = link_order->u.indirect.section->owner;
12989 asection *input_section = link_order->u.indirect.section;
12990 long reloc_size;
12991 arelent **reloc_vector;
12992 long reloc_count;
12993
12994 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12995 if (reloc_size < 0)
12996 return NULL;
12997
12998 /* Read in the section. */
0c4bd9d9 12999 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC		 13000 return NULL;
13001
13002 if (reloc_size == 0)
13003 return data;
13004
13005 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13006 if (reloc_vector == NULL)
13007 return NULL;
13008
13009 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13010 reloc_vector, symbols);
13011 if (reloc_count < 0)
13012 goto error_return;
13013
13014 if (reloc_count > 0)
13015 {
13016 arelent **parent;
13017 for (parent = reloc_vector; *parent != NULL; parent++)
13018 {
13019 char *error_message = NULL;
13020 asymbol *symbol;
13021 bfd_reloc_status_type r;
13022
13023 symbol = *(*parent)->sym_ptr_ptr;
13024 if (symbol->section && discarded_section (symbol->section))
13025 {
13026 bfd_byte *p;
13027 static reloc_howto_type none_howto
13028 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13029 "unused", FALSE, 0, 0, FALSE);
13030
13031 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13032 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13033 p);
13034 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13035 (*parent)->addend = 0;
13036 (*parent)->howto = &none_howto;
13037 r = bfd_reloc_ok;
13038 }
13039 else
13040 r = bfd_perform_relocation (input_bfd, *parent, data,
13041 input_section,
13042 relocatable ? abfd : NULL,
13043 &error_message);
13044
13045 if (relocatable)
13046 {
13047 asection *os = input_section->output_section;
13048
13049 /* A partial link, so keep the relocs. */
13050 os->orelocation[os->reloc_count] = *parent;
13051 os->reloc_count++;
13052 }
13053
13054 if (r != bfd_reloc_ok)
13055 {
13056 switch (r)
13057 {
13058 case bfd_reloc_undefined:
1a72702b
AM		 13059 (*link_info->callbacks->undefined_symbol)
13060 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13061 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC		 13062 break;
13063 case bfd_reloc_dangerous:
13064 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 13065 (*link_info->callbacks->reloc_dangerous)
13066 (link_info, error_message,
13067 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13068 break;
13069 case bfd_reloc_overflow:
1a72702b
AM		 13070 (*link_info->callbacks->reloc_overflow)
13071 (link_info, NULL,
13072 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13073 (*parent)->howto->name, (*parent)->addend,
13074 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13075 break;
13076 case bfd_reloc_outofrange:
13077 /* PR ld/13730:
13078 This error can result when processing some partially
13079 complete binaries. Do not abort, but issue an error
13080 message instead. */
13081 link_info->callbacks->einfo
13082 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13083 abfd, input_section, * parent);
13084 goto error_return;
13085
13086 default:
13087 abort ();
13088 break;
13089 }
13090 }
13091 }
13092 }
13093
13094 free (reloc_vector);
13095 return data;
13096
13097error_return:
13098 free (reloc_vector);
13099 return NULL;
13100}
35c08157
KLC		 13101\f
13102/* Link-time IFC relaxation.
13103 In this optimization, we chains jump instructions
13104 of the same destination with ifcall. */
13105
13106
13107/* List to save jal and j relocation. */
13108struct elf_nds32_ifc_symbol_entry
13109{
13110 asection *sec;
13111 struct elf_link_hash_entry *h;
13112 struct elf_nds32_ifc_irel_list *irel_head;
13113 unsigned long insn;
13114 int times;
13115 int enable; /* Apply ifc. */
13116 int ex9_enable; /* Apply ifc after ex9. */
13117 struct elf_nds32_ifc_symbol_entry *next;
13118};
13119
13120struct elf_nds32_ifc_irel_list
13121{
13122 Elf_Internal_Rela *irel;
13123 asection *sec;
13124 bfd_vma addr;
13125 /* If this is set, then it is the last instruction for
13126 ifc-chain, so it must be keep for the actual branching. */
13127 int keep;
13128 struct elf_nds32_ifc_irel_list *next;
13129};
13130
13131static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13132
13133/* Insert symbol of jal and j for ifc. */
13134
13135static void
13136nds32_elf_ifc_insert_symbol (asection *sec,
13137 struct elf_link_hash_entry *h,
13138 Elf_Internal_Rela *irel,
13139 unsigned long insn)
13140{
13141 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13142
13143 /* Check there is target of existing entry the same as the new one. */
13144 while (ptr != NULL)
13145 {
13146 if (((h == NULL && ptr->sec == sec
13147 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13148 && ptr->irel_head->irel->r_addend == irel->r_addend)
13149 || h != NULL)
13150 && ptr->h == h
13151 && ptr->insn == insn)
13152 {
13153 /* The same target exist, so insert into list. */
13154 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13155
13156 while (irel_list->next != NULL)
13157 irel_list = irel_list->next;
13158 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13159 irel_list = irel_list->next;
13160 irel_list->irel = irel;
13161 irel_list->keep = 1;
13162
13163 if (h == NULL)
13164 irel_list->sec = NULL;
13165 else
13166 irel_list->sec = sec;
13167 irel_list->next = NULL;
13168 return;
13169 }
13170 if (ptr->next == NULL)
13171 break;
13172 ptr = ptr->next;
13173 }
13174
13175 /* There is no same target entry, so build a new one. */
13176 if (ifc_symbol_head == NULL)
13177 {
13178 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13179 ptr = ifc_symbol_head;
13180 }
13181 else
13182 {
13183 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13184 ptr = ptr->next;
13185 }
13186
13187 ptr->h = h;
13188 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13189 ptr->irel_head->irel = irel;
13190 ptr->insn = insn;
13191 ptr->irel_head->keep = 1;
13192
13193 if (h == NULL)
13194 {
13195 /* Local symbols. */
13196 ptr->sec = sec;
13197 ptr->irel_head->sec = NULL;
13198 }
13199 else
13200 {
13201 /* Global symbol. */
13202 ptr->sec = NULL;
13203 ptr->irel_head->sec = sec;
13204 }
13205
13206 ptr->irel_head->next = NULL;
13207 ptr->times = 0;
13208 ptr->enable = 0;
13209 ptr->ex9_enable = 0;
13210 ptr->next = NULL;
13211}
13212
13213/* Gather all jal and j instructions. */
13214
13215static bfd_boolean
13216nds32_elf_ifc_calc (struct bfd_link_info *info,
13217 bfd *abfd, asection *sec)
13218{
13219 Elf_Internal_Rela *internal_relocs;
13220 Elf_Internal_Rela *irelend;
13221 Elf_Internal_Rela *irel;
13222 Elf_Internal_Shdr *symtab_hdr;
13223 bfd_byte *contents = NULL;
1c8f6a4d 13224 uint32_t insn, insn_with_reg;
35c08157
KLC		 13225 unsigned long r_symndx;
13226 struct elf_link_hash_entry *h;
13227 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13228 struct elf_nds32_link_hash_table *table;
13229 bfd_boolean ifc_loop_aware;
13230
13231 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13232 TRUE /* keep_memory */);
13233 irelend = internal_relocs + sec->reloc_count;
13234 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13235
13236 /* Check if the object enable ifc. */
13237 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13238 R_NDS32_RELAX_ENTRY);
13239
13240 if (irel == NULL
13241 || irel >= irelend
13242 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13243 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13244 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13245 return TRUE;
13246
0c4bd9d9 13247 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 13248 return FALSE;
13249
13250 table = nds32_elf_hash_table (info);
13251 ifc_loop_aware = table->ifc_loop_aware;
13252 while (irel != NULL && irel < irelend)
13253 {
13254 /* Traverse all relocation and gather all of them to build the list. */
13255
13256 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13257 {
13258 if (ifc_loop_aware == 1
13259 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13260 {
13261 /* Check the region if loop or not. If it is true and
13262 ifc-loop-aware is true, ignore the region till region end. */
13263 while (irel != NULL
13264 && irel < irelend
13265 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13266 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13267 irel++;
13268 }
13269 }
13270
13271 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13272 {
13273 insn = bfd_getb32 (contents + irel->r_offset);
13274 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13275 r_symndx = ELF32_R_SYM (irel->r_info);
13276 if (r_symndx < symtab_hdr->sh_info)
13277 {
13278 /* Local symbol. */
13279 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13280 }
13281 else
13282 {
13283 /* External symbol. */
13284 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13285 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13286 }
13287 }
13288 irel++;
13289 }
13290 return TRUE;
13291}
13292
13293/* Determine whether j and jal should be substituted. */
13294
13295static void
13296nds32_elf_ifc_filter (struct bfd_link_info *info)
13297{
13298 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13299 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13300 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13301 struct elf_nds32_link_hash_table *table;
13302 int target_optimize;
13303 bfd_vma address;
13304
13305 table = nds32_elf_hash_table (info);
13306 target_optimize = table->target_optimize;
13307 while (ptr)
13308 {
13309 irel_ptr = ptr->irel_head;
13310 if (ptr->h == NULL)
13311 {
13312 /* Local symbol. */
13313 irel_keeper = irel_ptr;
13314 while (irel_ptr && irel_ptr->next)
13315 {
13316 /* Check there is jump target can be used. */
13317 if ((irel_ptr->next->irel->r_offset
13318 - irel_keeper->irel->r_offset) > 1022)
13319 irel_keeper = irel_ptr->next;
13320 else
13321 {
13322 ptr->enable = 1;
13323 irel_ptr->keep = 0;
13324 }
13325 irel_ptr = irel_ptr->next;
13326 }
13327 }
13328 else
13329 {
1c8f6a4d
KLC		 13330 /* Global symbol. */
13331 /* We have to get the absolute address and decide
13332 whether to keep it or not. */
35c08157
KLC		 13333 while (irel_ptr)
13334 {
13335 address = (irel_ptr->irel->r_offset
13336 + irel_ptr->sec->output_section->vma
13337 + irel_ptr->sec->output_offset);
13338 irel_ptr->addr = address;
13339 irel_ptr = irel_ptr->next;
13340 }
13341
13342 irel_ptr = ptr->irel_head;
13343 while (irel_ptr)
13344 {
1c8f6a4d 13345 /* Sort by address. */
35c08157
KLC		 13346 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13347 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13348 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13349 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13350
1c8f6a4d 13351 /* Get the smallest one. */
35c08157
KLC		 13352 while (irel_temp->next)
13353 {
13354 if (irel_temp->next->addr < irel_dest->addr)
13355 {
13356 irel_dest_prev = irel_temp;
13357 irel_dest = irel_temp->next;
13358 }
13359 irel_temp = irel_temp->next;
13360 }
1c8f6a4d 13361
35c08157
KLC		 13362 if (irel_dest != irel_ptr)
13363 {
13364 if (irel_ptr_prev)
13365 irel_ptr_prev->next = irel_dest;
13366 if (irel_dest_prev)
13367 irel_dest_prev->next = irel_ptr;
13368 irel_temp = irel_ptr->next;
13369 irel_ptr->next = irel_dest->next;
13370 irel_dest->next = irel_temp;
13371 }
13372 irel_ptr_prev = irel_ptr;
13373 irel_ptr = irel_ptr->next;
13374 }
13375
13376 irel_ptr = ptr->irel_head;
13377 irel_keeper = irel_ptr;
13378 while (irel_ptr && irel_ptr->next)
13379 {
13380 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13381 irel_keeper = irel_ptr->next;
13382 else
13383 {
13384 ptr->enable = 1;
13385 irel_ptr->keep = 0;
13386 }
13387 irel_ptr = irel_ptr->next;
13388 }
13389 }
13390
1c8f6a4d 13391 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC		 13392 if ((target_optimize & NDS32_RELAX_EX9_ON)
13393 && ptr->irel_head != irel_keeper)
13394 ptr->enable = 0;
13395 ptr = ptr->next;
13396 }
13397}
13398
13399/* Determine whether j and jal should be substituted after ex9 done. */
13400
13401static void
13402nds32_elf_ifc_filter_after_ex9 (void)
13403{
13404 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13405 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13406
13407 while (ptr)
13408 {
13409 if (ptr->enable == 0)
13410 {
13411 /* Check whether ifc is applied or not. */
13412 irel_ptr = ptr->irel_head;
13413 ptr->ex9_enable = 1;
13414 while (irel_ptr)
13415 {
13416 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13417 {
13418 /* Ex9 already. */
13419 ptr->ex9_enable = 0;
13420 break;
13421 }
13422 irel_ptr = irel_ptr->next;
13423 }
13424 }
13425 ptr = ptr->next;
13426 }
13427}
13428
13429/* Wrapper to do ifc relaxation. */
13430
13431bfd_boolean
13432nds32_elf_ifc_finish (struct bfd_link_info *info)
13433{
13434 int relax_status;
13435 struct elf_nds32_link_hash_table *table;
13436
13437 table = nds32_elf_hash_table (info);
13438 relax_status = table->relax_status;
13439
13440 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13441 nds32_elf_ifc_filter (info);
13442 else
13443 nds32_elf_ifc_filter_after_ex9 ();
13444
13445 if (!nds32_elf_ifc_replace (info))
13446 return FALSE;
13447
13448 if (table)
13449 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13450 return TRUE;
13451}
13452
13453/* Traverse the result of ifc filter and replace it with ifcall9. */
13454
13455static bfd_boolean
13456nds32_elf_ifc_replace (struct bfd_link_info *info)
13457{
13458 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13459 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13460 nds32_elf_blank_t *relax_blank_list = NULL;
13461 bfd_byte *contents = NULL;
13462 Elf_Internal_Rela *internal_relocs;
13463 Elf_Internal_Rela *irel;
13464 Elf_Internal_Rela *irelend;
13465 unsigned short insn16 = INSN_IFCALL9;
13466 struct elf_nds32_link_hash_table *table;
13467 int relax_status;
13468
13469 table = nds32_elf_hash_table (info);
13470 relax_status = table->relax_status;
13471
13472 while (ptr)
13473 {
13474 /* Traverse the ifc gather list, and replace the
13475 filter entries by ifcall9. */
13476 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC		 13477 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13478 && ptr->ex9_enable == 1))
35c08157
KLC		 13479 {
13480 irel_ptr = ptr->irel_head;
13481 if (ptr->h == NULL)
13482 {
13483 /* Local symbol. */
13484 internal_relocs = _bfd_elf_link_read_relocs
13485 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13486 irelend = internal_relocs + ptr->sec->reloc_count;
13487
1c8f6a4d 13488 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13489 &contents, TRUE))
35c08157
KLC		 13490 return FALSE;
13491
13492 while (irel_ptr)
13493 {
13494 if (irel_ptr->keep == 0 && irel_ptr->next)
13495 {
1c8f6a4d 13496 /* The one can be replaced. We have to check whether
35c08157
KLC		 13497 there is any alignment point in the region. */
13498 irel = irel_ptr->irel;
1c8f6a4d
KLC		 13499 while (((irel_ptr->next->keep == 0
13500 && irel < irel_ptr->next->irel)
35c08157
KLC		 13501 || (irel_ptr->next->keep == 1 && irel < irelend))
13502 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13503 && (irel->r_addend & 0x1f) == 2))
13504 irel++;
13505 if (irel >= irelend
13506 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13507 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC		 13508 && ((irel->r_offset - get_nds32_elf_blank_total
13509 (&relax_blank_list, irel->r_offset, 1))
13510 & 0x02) == 0))
35c08157
KLC		 13511 {
13512 /* Replace by ifcall9. */
13513 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13514 if (!insert_nds32_elf_blank_recalc_total
13515 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13516 return FALSE;
13517 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13518 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13519 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13520 }
13521 }
13522 irel_ptr = irel_ptr->next;
13523 }
13524
13525 /* Delete the redundant code. */
13526 if (relax_blank_list)
13527 {
13528 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13529 relax_blank_list);
13530 relax_blank_list = NULL;
13531 }
13532 }
13533 else
13534 {
13535 /* Global symbol. */
13536 while (irel_ptr)
13537 {
13538 if (irel_ptr->keep == 0 && irel_ptr->next)
13539 {
13540 /* The one can be replaced, and we have to check
13541 whether there is any alignment point in the region. */
13542 internal_relocs = _bfd_elf_link_read_relocs
13543 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13544 TRUE /* keep_memory */);
13545 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC		 13546 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13547 irel_ptr->sec, &contents,
13548 TRUE))
35c08157
KLC		 13549 return FALSE;
13550
13551 irel = irel_ptr->irel;
13552 while (((irel_ptr->sec == irel_ptr->next->sec
13553 && irel_ptr->next->keep == 0
13554 && irel < irel_ptr->next->irel)
13555 || ((irel_ptr->sec != irel_ptr->next->sec
13556 || irel_ptr->next->keep == 1)
13557 && irel < irelend))
13558 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13559 && (irel->r_addend & 0x1f) == 2))
13560 irel++;
13561 if (irel >= irelend
13562 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13563 && (irel->r_addend & 0x1f) == 2
13564 && ((irel->r_offset
13565 - get_nds32_elf_blank_total (&relax_blank_list,
13566 irel->r_offset, 1)) & 0x02) == 0))
13567 {
13568 /* Replace by ifcall9. */
13569 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13570 if (!insert_nds32_elf_blank_recalc_total
13571 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13572 return FALSE;
13573
13574 /* Delete the redundant code, and clear the relocation. */
13575 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13576 irel_ptr->sec,
13577 relax_blank_list);
13578 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13579 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13580 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13581 relax_blank_list = NULL;
13582 }
13583 }
13584
13585 irel_ptr = irel_ptr->next;
13586 }
13587 }
13588 }
13589 ptr = ptr->next;
13590 }
13591
13592 return TRUE;
13593}
13594
13595/* Relocate ifcall. */
13596
1c8f6a4d 13597static bfd_boolean
35c08157
KLC		 13598nds32_elf_ifc_reloc (void)
13599{
13600 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13601 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13602 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13603 bfd_vma relocation, address;
13604 unsigned short insn16;
35c08157 13605 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 13606 static bfd_boolean done = FALSE;
13607
13608 if (done)
13609 return TRUE;
13610
13611 done = TRUE;
35c08157
KLC		 13612
13613 while (ptr)
13614 {
1c8f6a4d 13615 /* Check the entry is enable ifcall. */
35c08157
KLC		 13616 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13617 {
1c8f6a4d 13618 /* Get the reserve jump. */
35c08157
KLC		 13619 irel_ptr = ptr->irel_head;
13620 while (irel_ptr)
13621 {
13622 if (irel_ptr->keep == 1)
13623 {
13624 irel_keeper = irel_ptr;
13625 break;
13626 }
13627 irel_ptr = irel_ptr->next;
13628 }
13629
13630 irel_ptr = ptr->irel_head;
13631 if (ptr->h == NULL)
13632 {
13633 /* Local symbol. */
0c4bd9d9
KLC		 13634 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13635 &contents, TRUE))
35c08157
KLC		 13636 return FALSE;
13637
13638 while (irel_ptr)
13639 {
13640 if (irel_ptr->keep == 0
1c8f6a4d 13641 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC		 13642 {
13643 relocation = irel_keeper->irel->r_offset;
13644 relocation = relocation - irel_ptr->irel->r_offset;
13645 while (irel_keeper && relocation > 1022)
13646 {
13647 irel_keeper = irel_keeper->next;
13648 if (irel_keeper && irel_keeper->keep == 1)
13649 {
13650 relocation = irel_keeper->irel->r_offset;
13651 relocation = relocation - irel_ptr->irel->r_offset;
13652 }
13653 }
13654 if (relocation > 1022)
13655 {
13656 /* Double check. */
13657 irel_keeper = ptr->irel_head;
13658 while (irel_keeper)
13659 {
13660 if (irel_keeper->keep == 1)
13661 {
13662 relocation = irel_keeper->irel->r_offset;
13663 relocation = relocation - irel_ptr->irel->r_offset;
13664 }
13665 if (relocation <= 1022)
13666 break;
13667 irel_keeper = irel_keeper->next;
13668 }
13669 if (!irel_keeper)
13670 return FALSE;
13671 }
1c8f6a4d
KLC		 13672 irel_ptr->irel->r_info =
13673 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13674 R_NDS32_NONE);
35c08157
KLC		 13675 insn16 = INSN_IFCALL9 | (relocation >> 1);
13676 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13677 }
13678 irel_ptr = irel_ptr->next;
13679 }
13680 }
13681 else
13682 {
13683 /* Global symbol. */
13684 while (irel_ptr)
13685 {
13686 if (irel_ptr->keep == 0
1c8f6a4d 13687 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13688 {
1c8f6a4d 13689 /* Get the distance between ifcall and jump. */
35c08157
KLC		 13690 relocation = (irel_keeper->irel->r_offset
13691 + irel_keeper->sec->output_section->vma
13692 + irel_keeper->sec->output_offset);
13693 address = (irel_ptr->irel->r_offset
13694 + irel_ptr->sec->output_section->vma
13695 + irel_ptr->sec->output_offset);
13696 relocation = relocation - address;
1c8f6a4d
KLC		 13697
13698 /* The distance is over ragne, find callee again. */
35c08157
KLC		 13699 while (irel_keeper && relocation > 1022)
13700 {
13701 irel_keeper = irel_keeper->next;
13702 if (irel_keeper && irel_keeper->keep ==1)
13703 {
13704 relocation = (irel_keeper->irel->r_offset
13705 + irel_keeper->sec->output_section->vma
13706 + irel_keeper->sec->output_offset);
13707 relocation = relocation - address;
13708 }
13709 }
13710
13711 if (relocation > 1022)
13712 {
13713 /* Double check. */
13714 irel_keeper = ptr->irel_head;
13715 while (irel_keeper)
13716 {
13717 if (irel_keeper->keep == 1)
13718 {
13719
13720 relocation = (irel_keeper->irel->r_offset
13721 + irel_keeper->sec->output_section->vma
13722 + irel_keeper->sec->output_offset);
13723 relocation = relocation - address;
13724 }
13725 if (relocation <= 1022)
13726 break;
13727 irel_keeper = irel_keeper->next;
13728 }
13729 if (!irel_keeper)
13730 return FALSE;
13731 }
13732 if (!nds32_get_section_contents
0c4bd9d9 13733 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC		 13734 return FALSE;
13735 insn16 = INSN_IFCALL9 | (relocation >> 1);
13736 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13737 irel_ptr->irel->r_info =
13738 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13739 R_NDS32_NONE);
35c08157
KLC		 13740 }
13741 irel_ptr =irel_ptr->next;
13742 }
13743 }
13744 }
13745 ptr = ptr->next;
13746 }
13747
13748 return TRUE;
13749}
13750
13751/* End of IFC relaxation. */
13752\f
13753/* EX9 Instruction Table Relaxation. */
13754
13755/* Global hash list. */
13756struct elf_link_hash_entry_list
13757{
13758 struct elf_link_hash_entry *h;
13759 struct elf_link_hash_entry_list *next;
13760};
13761
13762/* Save different destination but same insn. */
13763struct elf_link_hash_entry_mul_list
13764{
13765 /* Global symbol times. */
13766 int times;
13767 /* Save relocation for each global symbol but useful?? */
13768 Elf_Internal_Rela *irel;
13769 /* For sethi, two sethi may have the same high-part but different low-parts. */
13770 Elf_Internal_Rela rel_backup;
13771 struct elf_link_hash_entry_list *h_list;
13772 struct elf_link_hash_entry_mul_list *next;
13773};
13774
13775/* Instruction hash table. */
13776struct elf_nds32_code_hash_entry
13777{
13778 struct bfd_hash_entry root;
13779 int times;
13780 /* For insn that can use relocation or constant ex: sethi. */
13781 int const_insn;
13782 asection *sec;
13783 struct elf_link_hash_entry_mul_list *m_list;
13784 /* Using r_addend. */
13785 Elf_Internal_Rela *irel;
13786 /* Using r_info. */
13787 Elf_Internal_Rela rel_backup;
13788};
13789
13790/* Instruction count list. */
13791struct elf_nds32_insn_times_entry
13792{
13793 const char *string;
13794 int times;
13795 int order;
13796 asection *sec;
13797 struct elf_link_hash_entry_mul_list *m_list;
13798 Elf_Internal_Rela *irel;
13799 Elf_Internal_Rela rel_backup;
13800 struct elf_nds32_insn_times_entry *next;
13801};
13802
13803/* J and JAL symbol list. */
13804struct elf_nds32_symbol_entry
13805{
13806 char *string;
13807 unsigned long insn;
13808 struct elf_nds32_symbol_entry *next;
13809};
13810
13811/* Relocation list. */
13812struct elf_nds32_irel_entry
13813{
13814 Elf_Internal_Rela *irel;
13815 struct elf_nds32_irel_entry *next;
13816};
13817
13818/* ex9.it insn need to be fixed. */
13819struct elf_nds32_ex9_refix
13820{
13821 Elf_Internal_Rela *irel;
13822 asection *sec;
13823 struct elf_link_hash_entry *h;
13824 int order;
13825 struct elf_nds32_ex9_refix *next;
13826};
13827
13828static struct bfd_hash_table ex9_code_table;
13829static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13830static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13831
13832/* EX9 hash function. */
13833
13834static struct bfd_hash_entry *
13835nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13836 struct bfd_hash_table *table,
13837 const char *string)
13838{
13839 struct elf_nds32_code_hash_entry *ret;
13840
13841 /* Allocate the structure if it has not already been allocated by a
13842 subclass. */
13843 if (entry == NULL)
13844 {
13845 entry = (struct bfd_hash_entry *)
13846 bfd_hash_allocate (table, sizeof (*ret));
13847 if (entry == NULL)
13848 return entry;
13849 }
13850
13851 /* Call the allocation method of the superclass. */
13852 entry = bfd_hash_newfunc (entry, table, string);
13853 if (entry == NULL)
13854 return entry;
13855
13856 ret = (struct elf_nds32_code_hash_entry*) entry;
13857 ret->times = 0;
13858 ret->const_insn = 0;
13859 ret->m_list = NULL;
13860 ret->sec = NULL;
13861 ret->irel = NULL;
13862 return &ret->root;
13863}
13864
13865/* Insert ex9 entry
13866 this insert must be stable sorted by times. */
13867
13868static void
13869nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13870{
13871 struct elf_nds32_insn_times_entry *temp;
13872 struct elf_nds32_insn_times_entry *temp2;
13873
13874 if (ex9_insn_head == NULL)
13875 {
13876 ex9_insn_head = ptr;
13877 ptr->next = NULL;
13878 }
13879 else
13880 {
13881 temp = ex9_insn_head;
13882 temp2 = ex9_insn_head;
13883 while (temp->next &&
13884 (temp->next->times >= ptr->times
13885 || temp->times == -1))
13886 {
13887 if (temp->times == -1)
13888 temp2 = temp;
13889 temp = temp->next;
13890 }
13891 if (ptr->times > temp->times && temp->times != -1)
13892 {
13893 ptr->next = temp;
13894 if (temp2->times == -1)
13895 temp2->next = ptr;
13896 else
13897 ex9_insn_head = ptr;
13898 }
13899 else if (temp->next == NULL)
13900 {
13901 temp->next = ptr;
13902 ptr->next = NULL;
13903 }
13904 else
13905 {
13906 ptr->next = temp->next;
13907 temp->next = ptr;
13908 }
13909 }
13910}
13911
13912/* Examine each insn times in hash table.
13913 Handle multi-link hash entry.
13914
13915 TODO: This function doesn't assign so much info since it is fake. */
13916
13917static int
13918nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13919{
13920 struct elf_nds32_insn_times_entry *ptr;
13921 int times;
13922
13923 if (h->m_list == NULL)
13924 {
13925 /* Local symbol insn or insn without relocation. */
13926 if (h->times < 3)
13927 return TRUE;
13928
13929 ptr = (struct elf_nds32_insn_times_entry *)
13930 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13931 ptr->times = h->times;
13932 ptr->string = h->root.string;
13933 ptr->m_list = NULL;
13934 ptr->sec = h->sec;
13935 ptr->irel = h->irel;
13936 ptr->rel_backup = h->rel_backup;
13937 nds32_elf_ex9_insert_entry (ptr);
13938 }
13939 else
13940 {
13941 /* Global symbol insn. */
13942 /* Only sethi insn has multiple m_list. */
13943 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13944
13945 times = 0;
13946 while (m_list)
13947 {
13948 times += m_list->times;
13949 m_list = m_list->next;
13950 }
13951 if (times >= 3)
13952 {
13953 m_list = h->m_list;
13954 ptr = (struct elf_nds32_insn_times_entry *)
13955 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13956 ptr->times = times; /* Use the total times. */
13957 ptr->string = h->root.string;
13958 ptr->m_list = m_list;
13959 ptr->sec = h->sec;
13960 ptr->irel = m_list->irel;
13961 ptr->rel_backup = m_list->rel_backup;
13962 nds32_elf_ex9_insert_entry (ptr);
13963 }
13964 if (h->const_insn == 1)
13965 {
13966 /* sethi with constant value. */
13967 if (h->times < 3)
13968 return TRUE;
13969
13970 ptr = (struct elf_nds32_insn_times_entry *)
13971 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13972 ptr->times = h->times;
13973 ptr->string = h->root.string;
13974 ptr->m_list = NULL;
13975 ptr->sec = NULL;
13976 ptr->irel = NULL;
13977 ptr->rel_backup = h->rel_backup;
13978 nds32_elf_ex9_insert_entry (ptr);
13979 }
13980 }
13981 return TRUE;
13982}
13983
13984/* Count each insn times in hash table.
13985 Handle multi-link hash entry. */
13986
13987static int
13988nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13989{
13990 int reservation, times;
13991 unsigned long relocation, min_relocation;
13992 struct elf_nds32_insn_times_entry *ptr;
13993
13994 if (h->m_list == NULL)
13995 {
13996 /* Local symbol insn or insn without relocation. */
13997 if (h->times < 3)
13998 return TRUE;
13999 ptr = (struct elf_nds32_insn_times_entry *)
14000 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14001 ptr->times = h->times;
14002 ptr->string = h->root.string;
14003 ptr->m_list = NULL;
14004 ptr->sec = h->sec;
14005 ptr->irel = h->irel;
14006 ptr->rel_backup = h->rel_backup;
14007 nds32_elf_ex9_insert_entry (ptr);
14008 }
14009 else
14010 {
14011 /* Global symbol insn. */
14012 /* Only sethi insn has multiple m_list. */
14013 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14014
14015 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14016 && m_list->next != NULL)
14017 {
14018 /* Sethi insn has different symbol or addend but has same hi20. */
14019 times = 0;
14020 reservation = 1;
14021 relocation = 0;
14022 min_relocation = 0xffffffff;
14023 while (m_list)
14024 {
14025 /* Get the minimum sethi address
14026 and calculate how many entry the sethi-list have to use. */
14027 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14028 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14029 && (m_list->h_list->h->root.u.def.section != NULL
14030 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14031 {
14032 relocation = (m_list->h_list->h->root.u.def.value +
14033 m_list->h_list->h->root.u.def.section->output_section->vma +
14034 m_list->h_list->h->root.u.def.section->output_offset);
14035 relocation += m_list->irel->r_addend;
14036 }
14037 else
14038 relocation = 0;
14039 if (relocation < min_relocation)
14040 min_relocation = relocation;
14041 times += m_list->times;
14042 m_list = m_list->next;
14043 }
14044 if (min_relocation < ex9_relax_size)
14045 reservation = (min_relocation >> 12) + 1;
14046 else
14047 reservation = (min_relocation >> 12)
14048 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14049 if (reservation < (times / 3))
14050 {
14051 /* Efficient enough to use ex9. */
14052 int i;
14053
14054 for (i = reservation ; i > 0; i--)
14055 {
14056 /* Allocate number of reservation ex9 entry. */
14057 ptr = (struct elf_nds32_insn_times_entry *)
14058 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14059 ptr->times = h->m_list->times / reservation;
14060 ptr->string = h->root.string;
14061 ptr->m_list = h->m_list;
14062 ptr->sec = h->sec;
14063 ptr->irel = h->m_list->irel;
14064 ptr->rel_backup = h->m_list->rel_backup;
14065 nds32_elf_ex9_insert_entry (ptr);
14066 }
14067 }
14068 }
14069 else
14070 {
14071 /* Normal global symbol that means no different address symbol
14072 using same ex9 entry. */
14073 if (m_list->times >= 3)
14074 {
14075 ptr = (struct elf_nds32_insn_times_entry *)
14076 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14077 ptr->times = m_list->times;
14078 ptr->string = h->root.string;
14079 ptr->m_list = h->m_list;
14080 ptr->sec = h->sec;
14081 ptr->irel = h->m_list->irel;
14082 ptr->rel_backup = h->m_list->rel_backup;
14083 nds32_elf_ex9_insert_entry (ptr);
14084 }
14085 }
14086
14087 if (h->const_insn == 1)
14088 {
14089 /* sethi with constant value. */
14090 if (h->times < 3)
14091 return TRUE;
14092
14093 ptr = (struct elf_nds32_insn_times_entry *)
14094 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14095 ptr->times = h->times;
14096 ptr->string = h->root.string;
14097 ptr->m_list = NULL;
14098 ptr->sec = NULL;
14099 ptr->irel = NULL;
14100 ptr->rel_backup = h->rel_backup;
14101 nds32_elf_ex9_insert_entry (ptr);
14102 }
14103 }
14104
14105 return TRUE;
14106}
14107
14108/* Hash table traverse function. */
14109
14110static void
14111nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14112{
14113 unsigned int i;
14114
14115 ex9_code_table.frozen = 1;
14116 for (i = 0; i < ex9_code_table.size; i++)
14117 {
14118 struct bfd_hash_entry *p;
14119
14120 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14121 if (!func ((struct elf_nds32_code_hash_entry *) p))
14122 goto out;
14123 }
14124out:
14125 ex9_code_table.frozen = 0;
14126}
14127
14128
14129/* Give order number to insn list. */
14130
14131static void
14132nds32_elf_order_insn_times (struct bfd_link_info *info)
14133{
14134 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 14135 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 14136 struct elf_nds32_link_hash_table *table;
35c08157 14137 int ex9_limit;
1c8f6a4d
KLC		 14138 int number = 0;
14139
14140 if (ex9_insn_head == NULL)
14141 return;
35c08157
KLC		 14142
14143/* The max number of entries is 512. */
14144 ex9_insn = ex9_insn_head;
14145 table = nds32_elf_hash_table (info);
14146 ex9_limit = table->ex9_limit;
14147
35c08157
KLC		 14148 ex9_insn = ex9_insn_head;
14149
1c8f6a4d 14150 while (ex9_insn != NULL && number < ex9_limit)
35c08157 14151 {
1c8f6a4d 14152 ex9_insn->order = number;
35c08157 14153 number++;
1c8f6a4d 14154 temp = ex9_insn;
35c08157
KLC		 14155 ex9_insn = ex9_insn->next;
14156 }
14157
1c8f6a4d
KLC		 14158 if (ex9_insn && temp)
14159 temp->next = NULL;
35c08157
KLC		 14160
14161 while (ex9_insn != NULL)
14162 {
14163 /* Free useless entry. */
14164 temp = ex9_insn;
14165 ex9_insn = ex9_insn->next;
14166 free (temp);
14167 }
14168}
14169
14170/* Build .ex9.itable section. */
14171
14172static void
14173nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14174{
14175 asection *table_sec;
14176 struct elf_nds32_insn_times_entry *ptr;
14177 bfd *it_abfd;
14178 int number = 0;
14179 bfd_byte *contents = NULL;
14180
14181 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14182 it_abfd = it_abfd->link.next)
35c08157
KLC		 14183 {
14184 /* Find the section .ex9.itable, and put all entries into it. */
14185 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14186 if (table_sec != NULL)
14187 {
0c4bd9d9 14188 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC		 14189 return;
14190
14191 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14192 number++;
14193
14194 table_sec->size = number * 4;
14195
14196 if (number == 0)
1c8f6a4d 14197 return;
35c08157
KLC		 14198
14199 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14200 number = 0;
14201 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14202 {
14203 long val;
14204
14205 val = strtol (ptr->string, NULL, 16);
14206 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14207 number++;
14208 }
14209 break;
14210 }
14211 }
14212}
14213
14214/* Get insn with regs according to relocation type. */
14215
14216static void
14217nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14218 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC		 14219{
14220 reloc_howto_type *howto = NULL;
14221
14222 if (irel == NULL
14223 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14224 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14225 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14226 {
14227 *insn_with_reg = insn;
14228 return;
14229 }
14230
14231 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14232 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14233}
14234
14235/* Mask number of address bits according to relocation. */
14236
14237static unsigned long
14238nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14239{
14240 reloc_howto_type *howto = NULL;
14241
14242 if (irel == NULL
14243 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14244 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14245 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14246 return 0;
14247
14248 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14249 return howto->dst_mask;
14250}
14251
14252static void
14253nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14254 struct elf_nds32_irel_entry *irel_ptr)
14255{
14256 if (*irel_list == NULL)
14257 {
14258 *irel_list = irel_ptr;
14259 irel_ptr->next = NULL;
14260 }
14261 else
14262 {
14263 irel_ptr->next = *irel_list;
14264 *irel_list = irel_ptr;
14265 }
14266}
14267
14268static void
14269nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14270 struct elf_link_hash_entry *h, int order)
14271{
14272 struct elf_nds32_ex9_refix *ptr;
14273
14274 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14275 ptr->sec = sec;
14276 ptr->irel = irel;
14277 ptr->h = h;
14278 ptr->order = order;
14279 ptr->next = NULL;
14280
14281 if (ex9_refix_head == NULL)
14282 ex9_refix_head = ptr;
14283 else
14284 {
14285 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14286
14287 while (temp->next != NULL)
14288 temp = temp->next;
14289 temp->next = ptr;
14290 }
14291}
14292
14293enum
14294{
14295 DATA_EXIST = 1,
14296 CLEAN_PRE = 1 << 1,
14297 PUSH_PRE = 1 << 2
14298};
14299
14300/* Check relocation type if supporting for ex9. */
14301
14302static int
14303nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14304 Elf_Internal_Rela **irel,
14305 Elf_Internal_Rela *irelend,
14306 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14307 asection *sec,bfd_vma *off,
35c08157
KLC		 14308 bfd_byte *contents)
14309{
14310 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14311 bfd_boolean nested_ex9, nested_loop;
14312 bfd_boolean ex9_loop_aware;
14313 /* We use the highest 1 byte of result to record
14314 how many bytes location counter has to move. */
14315 int result = 0;
14316 Elf_Internal_Rela *irel_save = NULL;
14317 struct elf_nds32_link_hash_table *table;
14318
14319 table = nds32_elf_hash_table (info);
14320 ex9_loop_aware = table->ex9_loop_aware;
14321
14322 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14323 {
14324 switch (ELF32_R_TYPE ((*irel)->r_info))
14325 {
14326 case R_NDS32_RELAX_REGION_BEGIN:
14327 /* Ignore code block. */
14328 nested_ex9 = FALSE;
14329 nested_loop = FALSE;
14330 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14331 || (ex9_loop_aware
14332 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14333 {
14334 /* Check the region if loop or not. If it is true and
14335 ex9-loop-aware is true, ignore the region till region end. */
14336 /* To save the status for in .no_relax ex9 region and
14337 loop region to conform the block can do ex9 relaxation. */
14338 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14339 nested_loop = (ex9_loop_aware
14340 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14341 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14342 {
14343 (*irel)++;
14344 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14345 {
14346 /* There may be nested region. */
14347 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14348 nested_ex9 = TRUE;
14349 else if (ex9_loop_aware
14350 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14351 nested_loop = TRUE;
14352 }
14353 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14354 {
14355 /* The end of region. */
14356 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14357 nested_ex9 = FALSE;
14358 else if (ex9_loop_aware
14359 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14360 nested_loop = FALSE;
14361 }
1c8f6a4d 14362 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC		 14363 && ((*irel)->r_addend & 0x1f) == 2)
14364 {
14365 /* Alignment exist in the region. */
14366 result |= CLEAN_PRE;
14367 if (((*irel)->r_offset -
14368 get_nds32_elf_blank_total (&relax_blank_list,
14369 (*irel)->r_offset, 0)) & 0x02)
14370 result |= PUSH_PRE;
14371 }
14372 }
14373 if ((*irel) >= irelend)
14374 *off = sec->size;
14375 else
14376 *off = (*irel)->r_offset;
14377
14378 /* The final instruction in the region, regard this one as data to ignore it. */
14379 result |= DATA_EXIST;
14380 return result;
14381 }
14382 break;
14383
14384 case R_NDS32_LABEL:
1c8f6a4d 14385 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC		 14386 {
14387 /* Check this point is align and decide to do ex9 or not. */
14388 result |= CLEAN_PRE;
14389 if (((*irel)->r_offset -
14390 get_nds32_elf_blank_total (&relax_blank_list,
14391 (*irel)->r_offset, 0)) & 0x02)
14392 result |= PUSH_PRE;
14393 }
14394 break;
14395 case R_NDS32_32_RELA:
14396 /* Data. */
14397 result |= (4 << 24);
14398 result |= DATA_EXIST;
14399 break;
14400 case R_NDS32_16_RELA:
14401 /* Data. */
14402 result |= (2 << 24);
14403 result |= DATA_EXIST;
14404 break;
14405 case R_NDS32_DATA:
14406 /* Data. */
14407 /* The least code alignment is 2. If the data is only one byte,
14408 we have to shift one more byte. */
14409 if ((*irel)->r_addend == 1)
14410 result |= ((*irel)->r_addend << 25) ;
14411 else
14412 result |= ((*irel)->r_addend << 24) ;
14413
14414 result |= DATA_EXIST;
14415 break;
14416
14417 case R_NDS32_25_PCREL_RELA:
14418 case R_NDS32_SDA16S3_RELA:
14419 case R_NDS32_SDA15S3_RELA:
14420 case R_NDS32_SDA15S3:
14421 case R_NDS32_SDA17S2_RELA:
14422 case R_NDS32_SDA15S2_RELA:
14423 case R_NDS32_SDA12S2_SP_RELA:
14424 case R_NDS32_SDA12S2_DP_RELA:
14425 case R_NDS32_SDA15S2:
14426 case R_NDS32_SDA18S1_RELA:
14427 case R_NDS32_SDA15S1_RELA:
14428 case R_NDS32_SDA15S1:
14429 case R_NDS32_SDA19S0_RELA:
14430 case R_NDS32_SDA15S0_RELA:
14431 case R_NDS32_SDA15S0:
14432 case R_NDS32_HI20_RELA:
14433 case R_NDS32_LO12S0_ORI_RELA:
14434 case R_NDS32_LO12S0_RELA:
14435 case R_NDS32_LO12S1_RELA:
14436 case R_NDS32_LO12S2_RELA:
14437 /* These relocation is supported ex9 relaxation currently. */
14438 /* We have to save the relocation for using later, since we have
14439 to check there is any alignment in the same address. */
14440 irel_save = *irel;
14441 break;
14442 default:
14443 /* Not support relocations. */
14444 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC		 14445 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14446 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC		 14447 {
14448 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14449 But we have to consider if there is any side-effect. */
14450 if (!(result & DATA_EXIST))
14451 {
14452 /* We have to confirm there is no data relocation in the
14453 same address. In general case, this won't happen. */
14454 /* We have to do ex9 conservative, for those relocation not
14455 considerd we ignore instruction. */
14456 result |= DATA_EXIST;
14457 if (*(contents + *off) & 0x80)
14458 result |= (2 << 24);
14459 else
14460 result |= (4 << 24);
14461 break;
14462 }
14463 }
14464 }
14465 if ((*irel) < irelend
14466 && ((*irel) + 1) < irelend
14467 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14468 /* There are relocations pointing to the same address, we have to
14469 check all of them. */
14470 (*irel)++;
14471 else
14472 {
14473 if (irel_save)
14474 *irel = irel_save;
14475 return result;
14476 }
14477 }
14478 return result;
14479}
14480
1c8f6a4d
KLC		 14481/* Replace with ex9 instruction. */
14482
14483static bfd_boolean
14484nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14485 nds32_elf_blank_t **relax_blank_list,
14486 struct elf_nds32_irel_entry *pre_irel_ptr,
14487 struct elf_nds32_irel_entry **irel_list)
14488{
14489 if (insn16 != 0)
14490 {
14491 /* Implement the ex9 relaxation. */
14492 bfd_putb16 (insn16, contents + pre_off);
14493 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14494 pre_off + 2, 2))
14495 return FALSE;
14496 if (pre_irel_ptr != NULL)
14497 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14498 }
14499 return TRUE;
14500}
14501
35c08157
KLC		 14502/* Replace input file instruction which is in ex9 itable. */
14503
14504static bfd_boolean
14505nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14506{
14507 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14508 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 14509 bfd_vma off;
14510 uint16_t insn16, insn_ex9;
35c08157 14511 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC		 14512 bfd_vma pre_off = -1;
14513 uint16_t pre_insn16 = 0;
35c08157
KLC		 14514 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14515 Elf_Internal_Rela *internal_relocs;
14516 Elf_Internal_Rela *irel;
14517 Elf_Internal_Rela *irelend;
14518 Elf_Internal_Shdr *symtab_hdr;
14519 Elf_Internal_Sym *isym = NULL;
14520 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC		 14521 uint32_t insn = 0;
14522 uint32_t insn_with_reg = 0;
14523 uint32_t it_insn;
14524 uint32_t it_insn_with_reg;
35c08157
KLC		 14525 unsigned long r_symndx;
14526 asection *isec;
14527 struct elf_nds32_irel_entry *irel_list = NULL;
14528 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14529 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC		 14530 struct elf_link_hash_entry_list *h_list;
14531
35c08157
KLC		 14532
14533 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14534 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 14535 || !nds32_get_local_syms (abfd, sec, &isym))
14536 return FALSE;
1c8f6a4d
KLC		 14537 internal_relocs =
14538 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC		 14539 irelend = internal_relocs + sec->reloc_count;
14540 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14541
14542 off = 0;
14543
14544 /* Check if the object enable ex9. */
1c8f6a4d
KLC		 14545 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14546 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 14547
14548 /* Check this section trigger ex9 relaxation. */
14549 if (irel == NULL
14550 || irel >= irelend
14551 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14552 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14553 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14554 return TRUE;
14555
14556 irel = internal_relocs;
14557
14558 /* Check alignment and fetch proper relocation. */
14559 while (off < sec->size)
14560 {
14561 struct elf_link_hash_entry *h = NULL;
14562 struct elf_nds32_irel_entry *irel_ptr = NULL;
14563
14564 /* Syn the instruction and the relocation. */
14565 while (irel != NULL && irel < irelend && irel->r_offset < off)
14566 irel++;
14567
14568 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14569 relax_blank_list, sec,
14570 &off, contents);
14571 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC		 14572 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14573 &relax_blank_list, pre_irel_ptr,
14574 &irel_list))
14575 return FALSE;
35c08157
KLC		 14576
14577 if (data_flag & CLEAN_PRE)
14578 {
14579 pre_off = 0;
14580 pre_insn16 = 0;
14581 pre_irel_ptr = NULL;
14582 }
14583 if (data_flag & DATA_EXIST)
14584 {
14585 /* We save the move offset in the highest byte. */
14586 off += (data_flag >> 24);
14587 continue;
14588 }
14589
14590 if (*(contents + off) & 0x80)
14591 {
14592 /* 2-byte instruction. */
14593 off += 2;
14594 continue;
14595 }
14596
14597 /* Load the instruction and its opcode with register for comparing. */
14598 ex9_insn = ex9_insn_head;
14599 insn = bfd_getb32 (contents + off);
14600 insn_with_reg = 0;
14601 while (ex9_insn)
14602 {
14603 it_insn = strtol (ex9_insn->string, NULL, 16);
14604 it_insn_with_reg = 0;
14605 do_replace = 0;
14606 save_irel = 0;
14607
14608 if (irel != NULL && irel < irelend && irel->r_offset == off)
14609 {
14610 /* Insn with relocation. */
14611 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14612
14613 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC		 14614 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14615 &it_insn_with_reg);
35c08157
KLC		 14616
14617 if (ex9_insn->irel != NULL
1c8f6a4d
KLC		 14618 && (ELF32_R_TYPE (irel->r_info) ==
14619 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC		 14620 && (insn_with_reg == it_insn_with_reg))
14621 {
14622 /* Insn relocation and format is the same as table entry. */
14623
14624 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14625 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14626 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14627 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14628 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14629 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14630 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14631 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14632 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14633 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14634 && ELF32_R_TYPE (irel->r_info) <=
14635 R_NDS32_SDA12S2_SP_RELA)
14636 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14637 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14638 {
14639 r_symndx = ELF32_R_SYM (irel->r_info);
14640 if (r_symndx < symtab_hdr->sh_info)
14641 {
14642 /* Local symbol. */
14643 int shndx = isym[r_symndx].st_shndx;
14644
14645 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14646 if (ex9_insn->sec == isec
14647 && ex9_insn->irel->r_addend == irel->r_addend
14648 && ex9_insn->irel->r_info == irel->r_info)
14649 {
14650 do_replace = 1;
14651 save_irel = 1;
14652 }
14653 }
14654 else
14655 {
14656 /* External symbol. */
14657 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14658 if (ex9_insn->m_list)
14659 {
35c08157
KLC		 14660 h_list = ex9_insn->m_list->h_list;
14661 while (h_list)
14662 {
14663 if (h == h_list->h
1c8f6a4d
KLC		 14664 && (ex9_insn->m_list->irel->r_addend ==
14665 irel->r_addend))
35c08157
KLC		 14666 {
14667 do_replace = 1;
14668 save_irel = 1;
14669 break;
14670 }
14671 h_list = h_list->next;
14672 }
14673 }
14674 }
14675 }
14676 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14677 {
14678 r_symndx = ELF32_R_SYM (irel->r_info);
14679 if (r_symndx < symtab_hdr->sh_info)
14680 {
14681 /* Local symbols. Compare its base symbol and offset. */
14682 int shndx = isym[r_symndx].st_shndx;
14683
14684 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14685 if (ex9_insn->sec == isec
14686 && ex9_insn->irel->r_addend == irel->r_addend
14687 && ex9_insn->irel->r_info == irel->r_info)
14688 {
14689 do_replace = 1;
14690 save_irel = 1;
14691 }
14692 }
14693 else
14694 {
14695 /* External symbol. */
14696 struct elf_link_hash_entry_mul_list *m_list;
14697
14698 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14699 m_list = ex9_insn->m_list;
14700
14701 while (m_list)
14702 {
1c8f6a4d 14703 h_list = m_list->h_list;
35c08157
KLC		 14704
14705 while (h_list)
14706 {
14707 if (h == h_list->h
1c8f6a4d
KLC		 14708 && (m_list->irel->r_addend
14709 == irel->r_addend))
35c08157
KLC		 14710 {
14711 do_replace = 1;
14712 save_irel = 1;
14713 if (ex9_insn->next
14714 && ex9_insn->m_list
14715 && ex9_insn->m_list == ex9_insn->next->m_list)
14716 {
14717 /* sethi multiple entry must be fixed */
14718 nds32_elf_ex9_insert_fix (sec, irel,
14719 h, ex9_insn->order);
14720 }
14721 break;
14722 }
14723 h_list = h_list->next;
14724 }
14725 m_list = m_list->next;
14726 }
14727 }
14728 }
14729 }
14730
14731 /* Import table: Check the symbol hash table and the
14732 jump target. Only R_NDS32_25_PCREL_RELA now. */
14733 else if (ex9_insn->times == -1
14734 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14735 {
14736 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14737 if (insn_with_reg == it_insn_with_reg)
14738 {
14739 char code[10];
14740 bfd_vma relocation;
14741
14742 r_symndx = ELF32_R_SYM (irel->r_info);
14743 if (r_symndx >= symtab_hdr->sh_info)
14744 {
14745 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14746 if ((h->root.type == bfd_link_hash_defined
14747 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC		 14748 && h->root.u.def.section != NULL
14749 && h->root.u.def.section->output_section != NULL
35c08157 14750 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14751 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC		 14752 && h->root.u.def.value > sec->size)
14753 {
1c8f6a4d
KLC		 14754 relocation = h->root.u.def.value +
14755 h->root.u.def.section->output_section->vma +
14756 h->root.u.def.section->output_offset;
35c08157 14757 relocation += irel->r_addend;
1c8f6a4d
KLC		 14758 insn = insn_with_reg
14759 | ((relocation >> 1) & 0xffffff);
14760 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 14761 if (strcmp (code, ex9_insn->string) == 0)
14762 {
14763 do_replace = 1;
14764 save_irel = 1;
14765 }
14766 }
14767 }
14768 }
14769 }
14770 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 14771 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14772 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 14773 {
14774 /* These relocations do not have to relocate contens, so it can
14775 be regard as instruction without relocation. */
14776 if (insn == it_insn && ex9_insn->irel == NULL)
14777 do_replace = 1;
14778 }
14779 }
14780 else
14781 {
14782 /* Instruction without relocation, we only
14783 have to compare their byte code. */
14784 if (insn == it_insn && ex9_insn->irel == NULL)
14785 do_replace = 1;
14786 }
14787
14788 /* Insntruction match so replacing the code here. */
14789 if (do_replace == 1)
14790 {
14791 /* There are two formats of ex9 instruction. */
14792 if (ex9_insn->order < 32)
14793 insn_ex9 = INSN_EX9_IT_2;
14794 else
14795 insn_ex9 = INSN_EX9_IT_1;
14796 insn16 = insn_ex9 | ex9_insn->order;
14797
1c8f6a4d
KLC		 14798 /* Insert ex9 instruction. */
14799 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14800 &relax_blank_list, pre_irel_ptr,
14801 &irel_list);
35c08157
KLC		 14802 pre_off = off;
14803 pre_insn16 = insn16;
14804
14805 if (save_irel)
14806 {
14807 /* For instuction with relocation do relax. */
14808 irel_ptr = (struct elf_nds32_irel_entry *)
14809 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14810 irel_ptr->irel = irel;
14811 irel_ptr->next = NULL;
14812 pre_irel_ptr = irel_ptr;
14813 }
14814 else
14815 pre_irel_ptr = NULL;
14816 break;
14817 }
14818 ex9_insn = ex9_insn->next;
14819 }
14820 off += 4;
14821 }
14822
1c8f6a4d
KLC		 14823 /* Insert ex9 instruction. */
14824 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14825 &relax_blank_list, pre_irel_ptr,
14826 &irel_list);
35c08157
KLC		 14827
14828 /* Delete the redundant code. */
14829 if (relax_blank_list)
14830 {
14831 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14832 relax_blank_list = NULL;
14833 }
14834
14835 /* Clear the relocation that is replaced by ex9. */
14836 while (irel_list)
14837 {
14838 struct elf_nds32_irel_entry *irel_ptr;
14839
14840 irel_ptr = irel_list;
14841 irel_list = irel_ptr->next;
14842 irel_ptr->irel->r_info =
14843 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14844 free (irel_ptr);
14845 }
14846 return TRUE;
14847}
14848
14849/* Initialize ex9 hash table. */
14850
14851int
14852nds32_elf_ex9_init (void)
14853{
14854 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14855 sizeof (struct elf_nds32_code_hash_entry),
14856 1023))
14857 {
14858 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14859 return FALSE;
14860 }
14861 return TRUE;
14862}
14863
14864/* Predict how many bytes will be relaxed with ex9 and ifc. */
14865
14866static void
14867nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14868{
14869 struct elf_nds32_insn_times_entry *ex9_insn;
14870 struct elf_nds32_insn_times_entry *temp;
14871 int target_optimize;
14872 struct elf_nds32_link_hash_table *table;
14873
14874 if (ex9_insn_head == NULL)
14875 return;
14876
14877 table = nds32_elf_hash_table (info);
14878 target_optimize = table->target_optimize;
14879 ex9_insn = ex9_insn_head;
14880 while (ex9_insn)
14881 {
14882 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14883 temp = ex9_insn;
14884 ex9_insn = ex9_insn->next;
14885 free (temp);
14886 }
14887 ex9_insn_head = NULL;
14888
14889 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14890 {
14891 /* Examine ifc reduce size. */
14892 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14893 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14894 int size = 0;
14895
14896 while (ifc_ent)
14897 {
14898 if (ifc_ent->enable == 0)
14899 {
14900 /* Not ifc yet. */
14901 irel_ptr = ifc_ent->irel_head;
14902 while (irel_ptr)
14903 {
14904 size += 2;
14905 irel_ptr = irel_ptr->next;
14906 }
14907 }
14908 size -= 2;
14909 ifc_ent = ifc_ent->next;
14910 }
14911 ex9_relax_size += size;
14912 }
14913}
14914
14915/* Finish ex9 table. */
14916
14917void
14918nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14919{
35c08157
KLC		 14920 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14921 nds32_elf_order_insn_times (link_info);
14922 nds32_elf_ex9_total_relax (link_info);
14923 /* Traverse the hash table and count its times. */
14924 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14925 nds32_elf_order_insn_times (link_info);
14926 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC		 14927}
14928
14929/* Relocate the entries in ex9 table. */
14930
14931static bfd_vma
14932nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14933 struct bfd_link_info *link_info)
14934{
14935 Elf_Internal_Sym *isym = NULL;
14936 bfd_vma relocation = -1;
1c8f6a4d 14937 struct elf_link_hash_entry *h;
35c08157
KLC		 14938
14939 if (ptr->m_list != NULL)
14940 {
14941 /* Global symbol. */
1c8f6a4d
KLC		 14942 h = ptr->m_list->h_list->h;
14943 if ((h->root.type == bfd_link_hash_defined
14944 || h->root.type == bfd_link_hash_defweak)
14945 && h->root.u.def.section != NULL
14946 && h->root.u.def.section->output_section != NULL)
35c08157
KLC		 14947 {
14948
1c8f6a4d
KLC		 14949 relocation = h->root.u.def.value +
14950 h->root.u.def.section->output_section->vma +
14951 h->root.u.def.section->output_offset;
35c08157
KLC		 14952 relocation += ptr->m_list->irel->r_addend;
14953 }
14954 else
14955 relocation = 0;
14956 }
14957 else if (ptr->sec !=NULL)
14958 {
14959 /* Local symbol. */
14960 Elf_Internal_Sym sym;
14961 asection *sec = NULL;
14962 asection isec;
14963 asection *isec_ptr = &isec;
14964 Elf_Internal_Rela irel_backup = *(ptr->irel);
14965 asection *sec_backup = ptr->sec;
14966 bfd *abfd = ptr->sec->owner;
14967
14968 if (!nds32_get_local_syms (abfd, sec, &isym))
14969 return FALSE;
14970 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14971
14972 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14973 if (sec != NULL)
14974 *isec_ptr = *sec;
14975 sym = *isym;
14976
14977 /* The purpose is same as elf_link_input_bfd. */
14978 if (isec_ptr != NULL
14979 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14980 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14981 {
14982 sym.st_value =
14983 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14984 elf_section_data (isec_ptr)->sec_info,
14985 isym->st_value);
14986 }
14987 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14988 &ptr->sec, ptr->irel);
14989 if (ptr->irel != NULL)
14990 relocation += ptr->irel->r_addend;
14991
14992 /* Restore origin value since there may be some insntructions that
14993 could not be replaced with ex9.it. */
14994 *(ptr->irel) = irel_backup;
14995 ptr->sec = sec_backup;
14996 }
14997
14998 return relocation;
14999}
15000
15001/* Import ex9 table and build list. */
15002
15003void
15004nds32_elf_ex9_import_table (struct bfd_link_info *info)
15005{
1c8f6a4d 15006 int num = 0;
35c08157
KLC		 15007 bfd_byte *contents;
15008 unsigned long insn;
15009 FILE *ex9_import_file;
15010 int update_ex9_table;
15011 struct elf_nds32_link_hash_table *table;
15012
15013 table = nds32_elf_hash_table (info);
15014 ex9_import_file = table->ex9_import_file;
1c8f6a4d 15015 rewind (table->ex9_import_file);
35c08157
KLC		 15016
15017 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15018
35c08157 15019 /* Read instructions from the input file and build the list. */
1c8f6a4d 15020 while (!feof (ex9_import_file))
35c08157
KLC		 15021 {
15022 char *code;
15023 struct elf_nds32_insn_times_entry *ptr;
15024 size_t nread;
15025
15026 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC		 15027 /* Ignore the final byte 0x0a. */
15028 if (nread < 1)
15029 break;
35c08157
KLC		 15030 insn = bfd_getb32 (contents);
15031 code = bfd_malloc (sizeof (char) * 9);
15032 snprintf (code, 9, "%08lx", insn);
15033 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15034 ptr->string = code;
15035 ptr->order = num;
15036 ptr->times = -1;
15037 ptr->sec = NULL;
15038 ptr->m_list = NULL;
15039 ptr->rel_backup.r_offset = 0;
15040 ptr->rel_backup.r_info = 0;
15041 ptr->rel_backup.r_addend = 0;
15042 ptr->irel = NULL;
15043 ptr->next = NULL;
15044 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC		 15045 num++;
15046 }
15047
15048 update_ex9_table = table->update_ex9_table;
15049 if (update_ex9_table == 1)
15050 {
15051 /* It has to consider of sethi need to use multiple page
15052 but it not be done yet. */
15053 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15054 nds32_elf_order_insn_times (info);
15055 }
15056}
15057
15058/* Export ex9 table. */
15059
15060static void
15061nds32_elf_ex9_export (struct bfd_link_info *info,
15062 bfd_byte *contents, int size)
15063{
15064 FILE *ex9_export_file;
15065 struct elf_nds32_link_hash_table *table;
15066
15067 table = nds32_elf_hash_table (info);
15068 ex9_export_file = table->ex9_export_file;
15069 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15070 fclose (ex9_export_file);
15071}
15072
15073/* Adjust relocations of J and JAL in ex9.itable.
15074 Export ex9 table. */
15075
1c8f6a4d 15076static void
35c08157
KLC		 15077nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15078{
15079 asection *table_sec = NULL;
15080 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15081 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15082 bfd *it_abfd;
1c8f6a4d 15083 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC		 15084 bfd_byte *contents = NULL, *source_contents = NULL;
15085 int size = 0;
15086 bfd_vma gp;
15087 int shift, update_ex9_table, offset = 0;
15088 reloc_howto_type *howto = NULL;
15089 Elf_Internal_Rela rel_backup;
15090 unsigned short insn_ex9;
15091 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC		 15092 FILE *ex9_export_file;
15093 static bfd_boolean done = FALSE;
15094
15095 if (done)
15096 return;
15097
15098 done = TRUE;
35c08157
KLC		 15099
15100 table = nds32_elf_hash_table (link_info);
15101 if (table)
15102 table->relax_status |= NDS32_RELAX_EX9_DONE;
15103
15104
15105 update_ex9_table = table->update_ex9_table;
15106 /* Generated ex9.itable exactly. */
15107 if (update_ex9_table == 0)
15108 {
15109 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 15110 it_abfd = it_abfd->link.next)
35c08157
KLC		 15111 {
15112 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15113 if (table_sec != NULL)
15114 break;
15115 }
15116
15117 if (table_sec != NULL)
15118 {
15119 bfd *output_bfd;
35c08157
KLC		 15120
15121 output_bfd = table_sec->output_section->owner;
15122 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15123 if (table_sec->size == 0)
15124 return;
15125
0c4bd9d9 15126 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 15127 return;
35c08157
KLC		 15128 }
15129 }
15130 else
15131 {
15132 /* Set gp. */
15133 bfd *output_bfd;
15134
15135 output_bfd = link_info->input_bfds->sections->output_section->owner;
15136 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15137 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15138 }
15139
15140 /* Relocate instruction. */
15141 while (ex9_insn)
15142 {
15143 bfd_vma relocation, min_relocation = 0xffffffff;
15144
15145 insn = strtol (ex9_insn->string, NULL, 16);
15146 insn_with_reg = 0;
15147 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15148 {
15149 if (ex9_insn->m_list)
15150 rel_backup = ex9_insn->m_list->rel_backup;
15151 else
15152 rel_backup = ex9_insn->rel_backup;
15153
15154 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15155 howto =
15156 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15157 (rel_backup.r_info));
15158 shift = howto->rightshift;
15159 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15160 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15161 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15162 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15163 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15164 {
15165 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15166 insn =
15167 insn_with_reg | ((relocation >> shift) &
15168 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15169 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15170 }
15171 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15172 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15173 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15174 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15175 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15176 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15177 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15178 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15179 {
15180 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15181 insn =
15182 insn_with_reg | (((relocation - gp) >> shift) &
15183 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15184 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15185 }
15186 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15187 {
15188 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC		 15189 if (ex9_insn->next && ex9_insn->m_list
15190 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15191 {
15192 struct elf_link_hash_entry_mul_list *m_list;
15193 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15194 struct elf_link_hash_entry *h;
35c08157
KLC		 15195
15196 temp_ptr = ex9_insn;
15197 temp_ptr2 = ex9_insn;
15198 m_list = ex9_insn->m_list;
15199 while (m_list)
15200 {
1c8f6a4d
KLC		 15201 h = m_list->h_list->h;
15202 relocation = h->root.u.def.value +
15203 h->root.u.def.section->output_section->vma +
15204 h->root.u.def.section->output_offset;
35c08157
KLC		 15205 relocation += m_list->irel->r_addend;
15206
15207 if (relocation < min_relocation)
15208 min_relocation = relocation;
15209 m_list = m_list->next;
15210 }
15211 relocation = min_relocation;
15212
15213 /* Put insntruction into ex9 table. */
15214 insn = insn_with_reg
15215 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15216 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15217 relocation = relocation + 0x1000; /* hi20 */
15218
1c8f6a4d
KLC		 15219 while (ex9_insn->next && ex9_insn->m_list
15220 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15221 {
15222 /* Multiple sethi. */
15223 ex9_insn = ex9_insn->next;
15224 size += 4;
35c08157
KLC		 15225 insn =
15226 insn_with_reg | ((relocation >> shift) &
15227 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15228 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15229 relocation = relocation + 0x1000; /* hi20 */
15230 }
15231
15232 fix_ptr = ex9_refix_head;
15233 while (fix_ptr)
15234 {
15235 /* Fix ex9 insn. */
15236 /* temp_ptr2 points to the head of multiple sethi. */
15237 temp_ptr = temp_ptr2;
15238 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15239 {
15240 fix_ptr = fix_ptr->next;
15241 }
15242 if (fix_ptr->order != temp_ptr->order)
15243 break;
15244
15245 /* Set source insn. */
1c8f6a4d
KLC		 15246 relocation =
15247 fix_ptr->h->root.u.def.value +
15248 fix_ptr->h->root.u.def.section->output_section->vma +
15249 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC		 15250 relocation += fix_ptr->irel->r_addend;
15251 /* sethi imm is imm20s. */
15252 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15253
15254 while (temp_ptr)
15255 {
35c08157
KLC		 15256 /* Match entry and source code. */
15257 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15258 if (insn == source_insn)
15259 {
15260 /* Fix the ex9 insn. */
15261 if (temp_ptr->order != fix_ptr->order)
15262 {
15263 if (!nds32_get_section_contents
15264 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15265 &source_contents, TRUE))
35c08157
KLC		 15266 (*_bfd_error_handler)
15267 (_("Linker: error cannot fixed ex9 relocation \n"));
15268 if (temp_ptr->order < 32)
15269 insn_ex9 = INSN_EX9_IT_2;
15270 else
15271 insn_ex9 = INSN_EX9_IT_1;
15272 insn_ex9 = insn_ex9 | temp_ptr->order;
15273 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15274 }
15275 break;
15276 }
15277 else
15278 {
15279 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15280 (*_bfd_error_handler)
15281 (_("Linker: error cannot fixed ex9 relocation \n"));
15282 else
15283 temp_ptr = temp_ptr->next;
15284 }
15285 }
15286 fix_ptr = fix_ptr->next;
15287 }
15288 }
15289 else
15290 {
15291 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15292 insn = insn_with_reg
15293 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15294 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15295 }
15296 }
15297 }
15298 else
15299 {
15300 /* Insn without relocation does not have to be fixed
15301 if need to update export table. */
15302 if (update_ex9_table == 1)
15303 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15304 }
15305 ex9_insn = ex9_insn->next;
15306 size += 4;
15307 }
15308
15309 ex9_export_file = table->ex9_export_file;
15310 if (ex9_export_file != NULL)
1c8f6a4d 15311 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC		 15312 else if (update_ex9_table == 1)
15313 {
1c8f6a4d
KLC		 15314 table->ex9_export_file = table->ex9_import_file;
15315 rewind (table->ex9_export_file);
15316 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC		 15317 }
15318}
15319
15320/* Generate ex9 hash table. */
15321
15322static bfd_boolean
f4cb41f4 15323nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC		 15324 struct bfd_link_info *link_info)
15325{
15326 Elf_Internal_Rela *internal_relocs;
15327 Elf_Internal_Rela *irelend;
15328 Elf_Internal_Rela *irel;
15329 Elf_Internal_Rela *jrel;
15330 Elf_Internal_Rela rel_backup;
15331 Elf_Internal_Shdr *symtab_hdr;
15332 Elf_Internal_Sym *isym = NULL;
15333 asection *isec;
15334 struct elf_link_hash_entry **sym_hashes;
15335 bfd_byte *contents = NULL;
f4cb41f4 15336 bfd_vma off = 0;
35c08157 15337 unsigned long r_symndx;
1c8f6a4d 15338 uint32_t insn, insn_with_reg;
35c08157
KLC		 15339 struct elf_link_hash_entry *h;
15340 int data_flag, shift, align;
15341 bfd_vma relocation;
15342 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15343 reloc_howto_type *howto = NULL;
15344
15345 sym_hashes = elf_sym_hashes (abfd);
15346 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15347 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 15348 return FALSE;
15349
15350 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15351 TRUE /* keep_memory */);
15352 irelend = internal_relocs + sec->reloc_count;
15353 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15354 if (!nds32_get_local_syms (abfd, sec, &isym))
15355 return FALSE;
15356
15357 /* Check the object if enable ex9. */
15358 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15359 R_NDS32_RELAX_ENTRY);
15360
15361 /* Check this section trigger ex9 relaxation. */
15362 if (irel == NULL
15363 || irel >= irelend
15364 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15365 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15366 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15367 return TRUE;
15368
15369 irel = internal_relocs;
15370
15371 /* Push each insn into hash table. */
15372 while (off < sec->size)
15373 {
15374 char code[10];
15375 struct elf_nds32_code_hash_entry *entry;
15376
15377 while (irel != NULL && irel < irelend && irel->r_offset < off)
15378 irel++;
15379
1c8f6a4d
KLC		 15380 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15381 NULL, sec, &off, contents);
35c08157
KLC		 15382 if (data_flag & DATA_EXIST)
15383 {
15384 /* We save the move offset in the highest byte. */
15385 off += (data_flag >> 24);
15386 continue;
15387 }
15388
15389 if (*(contents + off) & 0x80)
15390 {
15391 off += 2;
15392 }
15393 else
15394 {
15395 h = NULL;
15396 isec = NULL;
15397 jrel = NULL;
15398 rel_backup.r_info = 0;
15399 rel_backup.r_offset = 0;
15400 rel_backup.r_addend = 0;
15401 /* Load the instruction and its opcode with register for comparing. */
15402 insn = bfd_getb32 (contents + off);
15403 insn_with_reg = 0;
15404 if (irel != NULL && irel < irelend && irel->r_offset == off)
15405 {
15406 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15407 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15408 shift = howto->rightshift;
15409 align = (1 << shift) - 1;
15410 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15411 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15412 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15413 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15414 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15415 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15416 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15417 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15418 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15419 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15420 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15421 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15422 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15423 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15424 {
15425 r_symndx = ELF32_R_SYM (irel->r_info);
15426 jrel = irel;
15427 rel_backup = *irel;
15428 if (r_symndx < symtab_hdr->sh_info)
15429 {
15430 /* Local symbol. */
15431 int shndx = isym[r_symndx].st_shndx;
15432
15433 bfd_vma st_value = (isym + r_symndx)->st_value;
15434 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15435 relocation = (isec->output_section->vma + isec->output_offset
15436 + st_value + irel->r_addend);
15437 }
15438 else
15439 {
15440 /* External symbol. */
15441 bfd_boolean warned ATTRIBUTE_UNUSED;
15442 bfd_boolean ignored ATTRIBUTE_UNUSED;
15443 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15444 asection *sym_sec;
15445
15446 /* Maybe there is a better way to get h and relocation */
15447 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15448 r_symndx, symtab_hdr, sym_hashes,
15449 h, sym_sec, relocation,
15450 unresolved_reloc, warned, ignored);
15451 relocation += irel->r_addend;
1c8f6a4d
KLC		 15452 if ((h->root.type != bfd_link_hash_defined
15453 && h->root.type != bfd_link_hash_defweak)
15454 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC		 15455 {
15456 off += 4;
15457 continue;
15458 }
15459 }
15460
15461 /* Check for gp relative instruction alignment. */
15462 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15463 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15464 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15465 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15466 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15467 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15468 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15469 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15470 {
15471 bfd_vma gp;
15472 bfd *output_bfd = sec->output_section->owner;
15473 bfd_reloc_status_type r;
15474
15475 /* If the symbol is in the abs section, the out_bfd will be null.
15476 This happens when the relocation has a symbol@GOTOFF. */
15477 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15478 if (r != bfd_reloc_ok)
15479 {
15480 off += 4;
15481 continue;
15482 }
15483
15484 relocation -= gp;
15485
15486 /* Make sure alignment is correct. */
15487 if (relocation & align)
15488 {
15489 /* Incorrect alignment. */
15490 (*_bfd_error_handler)
15491 (_("%s: warning: unaligned small data access. "
15492 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15493 bfd_get_filename (abfd), irel->r_offset,
15494 irel->r_info, irel->r_addend, relocation, align);
15495 off += 4;
15496 continue;
15497 }
15498 }
15499
15500 insn = insn_with_reg
15501 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15502 }
15503 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 15504 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15505 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 15506 {
15507 /* These relocations do not have to relocate contens, so it can
15508 be regard as instruction without relocation. */
15509 }
15510 else
15511 {
15512 off += 4;
15513 continue;
15514 }
15515 }
15516
1c8f6a4d 15517 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 15518 /* Copy "code". */
15519 entry = (struct elf_nds32_code_hash_entry*)
15520 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15521 if (entry == NULL)
15522 {
15523 (*_bfd_error_handler)
15524 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15525 return FALSE;
15526 }
15527 if (h)
15528 {
15529 if (h->root.type == bfd_link_hash_undefined)
15530 return TRUE;
15531 /* Global symbol. */
15532 /* In order to do sethi with different symbol but same value. */
15533 if (entry->m_list == NULL)
15534 {
15535 struct elf_link_hash_entry_mul_list *m_list_new;
15536 struct elf_link_hash_entry_list *h_list_new;
15537
15538 m_list_new = (struct elf_link_hash_entry_mul_list *)
15539 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15540 h_list_new = (struct elf_link_hash_entry_list *)
15541 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15542 entry->m_list = m_list_new;
15543 m_list_new->h_list = h_list_new;
15544 m_list_new->rel_backup = rel_backup;
15545 m_list_new->times = 1;
15546 m_list_new->irel = jrel;
15547 m_list_new->next = NULL;
15548 h_list_new->h = h;
15549 h_list_new->next = NULL;
15550 }
15551 else
15552 {
15553 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15554 struct elf_link_hash_entry_list *h_list;
15555
15556 while (m_list)
15557 {
15558 /* Build the different symbols that point to the same address. */
15559 h_list = m_list->h_list;
15560 if (h_list->h->root.u.def.value == h->root.u.def.value
15561 && h_list->h->root.u.def.section->output_section->vma
15562 == h->root.u.def.section->output_section->vma
15563 && h_list->h->root.u.def.section->output_offset
15564 == h->root.u.def.section->output_offset
15565 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15566 {
15567 m_list->times++;
15568 m_list->irel = jrel;
15569 while (h_list->h != h && h_list->next)
15570 h_list = h_list->next;
15571 if (h_list->h != h)
15572 {
15573 struct elf_link_hash_entry_list *h_list_new;
15574
15575 h_list_new = (struct elf_link_hash_entry_list *)
15576 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15577 h_list->next = h_list_new;
15578 h_list_new->h = h;
15579 h_list_new->next = NULL;
15580 }
15581 break;
15582 }
15583 /* The sethi case may have different address but the
15584 hi20 is the same. */
15585 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15586 && m_list->next == NULL)
15587 {
15588 struct elf_link_hash_entry_mul_list *m_list_new;
15589 struct elf_link_hash_entry_list *h_list_new;
15590
15591 m_list_new = (struct elf_link_hash_entry_mul_list *)
15592 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15593 h_list_new = (struct elf_link_hash_entry_list *)
15594 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15595 m_list->next = m_list_new;
15596 m_list_new->h_list = h_list_new;
15597 m_list_new->rel_backup = rel_backup;
15598 m_list_new->times = 1;
15599 m_list_new->irel = jrel;
15600 m_list_new->next = NULL;
15601 h_list_new->h = h;
15602 h_list_new->next = NULL;
15603 break;
15604 }
15605 m_list = m_list->next;
15606 }
15607 if (!m_list)
15608 {
15609 off += 4;
15610 continue;
15611 }
15612 }
15613 }
15614 else
15615 {
15616 /* Local symbol and insn without relocation*/
15617 entry->times++;
15618 entry->rel_backup = rel_backup;
15619 }
15620
15621 /* Use in sethi insn with constant and global symbol in same format. */
15622 if (!jrel)
15623 entry->const_insn = 1;
15624 else
15625 entry->irel = jrel;
15626 entry->sec = isec;
15627 off += 4;
15628 }
15629 }
15630 return TRUE;
15631}
15632
15633/* Set the _ITB_BASE, and point it to ex9 table. */
15634
15635bfd_boolean
15636nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15637{
15638 bfd *abfd;
15639 asection *sec;
15640 bfd *output_bfd = NULL;
15641 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC		 15642
15643 if (is_ITB_BASE_set == 1)
15644 return TRUE;
15645
15646 is_ITB_BASE_set = 1;
15647
1c8f6a4d
KLC		 15648 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15649
15650 if (bh && (bh->type == bfd_link_hash_defined
15651 || bh->type == bfd_link_hash_defweak))
15652 return TRUE;
35c08157
KLC		 15653
15654 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15655 abfd = abfd->link.next)
35c08157
KLC		 15656 {
15657 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15658 if (sec != NULL)
15659 {
15660 output_bfd = sec->output_section->owner;
15661 break;
15662 }
15663 }
15664 if (output_bfd == NULL)
15665 {
15666 output_bfd = link_info->output_bfd;
15667 if (output_bfd->sections == NULL)
15668 return TRUE;
15669 else
15670 sec = bfd_abs_section_ptr;
15671 }
15672 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15673 FALSE, FALSE, TRUE);
15674 return (_bfd_generic_link_add_one_symbol
15675 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15676 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC		 15677 (const char *) NULL, FALSE, get_elf_backend_data
15678 (output_bfd)->collect, &bh));
15679} /* End EX9.IT */
15680\f
15681
15682#define ELF_ARCH bfd_arch_nds32
15683#define ELF_MACHINE_CODE EM_NDS32
15684#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15685#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15686
6d00b590 15687#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15688#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15689#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 15690#define TARGET_LITTLE_NAME "elf32-nds32le"
15691
15692#define elf_info_to_howto nds32_info_to_howto
15693#define elf_info_to_howto_rel nds32_info_to_howto_rel
15694
15695#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15696#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15697#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15698#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15699#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15700
1c8f6a4d 15701#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 15702#define elf_backend_action_discarded nds32_elf_action_discarded
15703#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15704#define elf_backend_check_relocs nds32_elf_check_relocs
15705#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15706#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15707#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15708#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15709#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15710#define elf_backend_relocate_section nds32_elf_relocate_section
15711#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15712#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15713#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15714#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15715#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15716#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15717#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15718#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15719#define elf_backend_object_p nds32_elf_object_p
15720#define elf_backend_final_write_processing nds32_elf_final_write_processing
15721#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC		 15722#define bfd_elf32_bfd_get_relocated_section_contents \
15723 nds32_elf_get_relocated_section_contents
35c08157
KLC		 15724
15725#define elf_backend_can_gc_sections 1
15726#define elf_backend_can_refcount 1
15727#define elf_backend_want_got_plt 1
15728#define elf_backend_plt_readonly 1
15729#define elf_backend_want_plt_sym 0
15730#define elf_backend_got_header_size 12
15731#define elf_backend_may_use_rel_p 1
15732#define elf_backend_default_use_rela_p 1
15733#define elf_backend_may_use_rela_p 1
15734
15735#include "elf32-target.h"
15736
15737#undef ELF_MAXPAGESIZE
15738#define ELF_MAXPAGESIZE 0x2000
15739
15740#undef TARGET_BIG_SYM
6d00b590 15741#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 15742#undef TARGET_BIG_NAME
15743#define TARGET_BIG_NAME "elf32-nds32be-linux"
15744#undef TARGET_LITTLE_SYM
6d00b590 15745#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 15746#undef TARGET_LITTLE_NAME
15747#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15748#undef elf32_bed
15749#define elf32_bed elf32_nds32_lin_bed
15750
15751#include "elf32-target.h"
GDB Binutils - Deliverables
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