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[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
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35c08157 1/* NDS32-specific support for 32-bit ELF.
6f2750fe 2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
50e03d47
AM		 80static bfd_boolean nds32_elf_merge_private_bfd_data
81 (bfd *, struct bfd_link_info *);
35c08157
KLC		 82static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
83static bfd_boolean nds32_elf_gc_sweep_hook
84 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
85static bfd_boolean nds32_elf_check_relocs
86 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
87static asection *nds32_elf_gc_mark_hook
88 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
89 struct elf_link_hash_entry *, Elf_Internal_Sym *);
90static bfd_boolean nds32_elf_adjust_dynamic_symbol
91 (struct bfd_link_info *, struct elf_link_hash_entry *);
92static bfd_boolean nds32_elf_size_dynamic_sections
93 (bfd *, struct bfd_link_info *);
94static bfd_boolean nds32_elf_create_dynamic_sections
95 (bfd *, struct bfd_link_info *);
96static bfd_boolean nds32_elf_finish_dynamic_sections
97 (bfd *, struct bfd_link_info *info);
98static bfd_boolean nds32_elf_finish_dynamic_symbol
99 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
100 Elf_Internal_Sym *);
1c8f6a4d 101static bfd_boolean nds32_elf_mkobject (bfd *);
35c08157
KLC		 102
103/* Nds32 helper functions. */
104static bfd_reloc_status_type nds32_elf_final_sda_base
105 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
106static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
107static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
108static Elf_Internal_Rela *find_relocs_at_address
109 (Elf_Internal_Rela *, Elf_Internal_Rela *,
110 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
111static bfd_vma calculate_memory_address
0c4bd9d9
KLC		 112(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
113static int nds32_get_section_contents (bfd *, asection *,
114 bfd_byte **, bfd_boolean);
35c08157 115static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 116(bfd *, asection *, struct bfd_link_info *);
1c8f6a4d
KLC		 117static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
118static void nds32_elf_ex9_import_table (struct bfd_link_info *);
119static void nds32_elf_ex9_finish (struct bfd_link_info *);
120static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 121static void nds32_elf_get_insn_with_reg
1c8f6a4d 122 (Elf_Internal_Rela *, uint32_t, uint32_t *);
35c08157
KLC		 123static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
124 Elf_Internal_Sym **);
125static bfd_boolean nds32_elf_ex9_replace_instruction
126 (struct bfd_link_info *, bfd *, asection *);
127static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
128 asection *);
1c8f6a4d 129static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 130static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 131static bfd_boolean nds32_elf_ifc_reloc (void);
35c08157
KLC		 132static bfd_boolean nds32_relax_fp_as_gp
133 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
134 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
135 Elf_Internal_Sym *isymbuf);
136static bfd_boolean nds32_fag_remove_unused_fpbase
137 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
138 Elf_Internal_Rela *irelend);
1c8f6a4d
KLC		 139static bfd_byte *
140nds32_elf_get_relocated_section_contents (bfd *abfd,
141 struct bfd_link_info *link_info,
142 struct bfd_link_order *link_order,
143 bfd_byte *data,
144 bfd_boolean relocatable,
145 asymbol **symbols);
35c08157
KLC		 146
147enum
148{
149 MACH_V1 = bfd_mach_n1h,
150 MACH_V2 = bfd_mach_n1h_v2,
151 MACH_V3 = bfd_mach_n1h_v3,
152 MACH_V3M = bfd_mach_n1h_v3m
153};
154
155#define MIN(a, b) ((a) > (b) ? (b) : (a))
156#define MAX(a, b) ((a) > (b) ? (a) : (b))
157
158/* The name of the dynamic interpreter. This is put in the .interp
159 section. */
160#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
161
162/* The nop opcode we use. */
163#define NDS32_NOP32 0x40000009
164#define NDS32_NOP16 0x9200
165
166/* The size in bytes of an entry in the procedure linkage table. */
167#define PLT_ENTRY_SIZE 24
168#define PLT_HEADER_SIZE 24
169
170/* The first entry in a procedure linkage table are reserved,
171 and the initial contents are unimportant (we zero them out).
172 Subsequent entries look like this. */
173#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
174#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
175#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
176#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
177#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
178
179/* $ta is change to $r15 (from $r25). */
180#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
181#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
182#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
183#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
184#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
185#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
186
187#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
188#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
189#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
190#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
191#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
192
193#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
194#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
195#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
196#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
197#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
198#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
199
1c8f6a4d
KLC		 200/* These are macros used to get the relocation accurate value. */
201#define ACCURATE_8BIT_S1 (0x100)
202#define ACCURATE_U9BIT_S1 (0x400)
203#define ACCURATE_12BIT_S1 (0x2000)
204#define ACCURATE_14BIT_S1 (0x4000)
205#define ACCURATE_19BIT (0x40000)
206
207/* These are macros used to get the relocation conservative value. */
208#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
209#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
210#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
211#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
212/* These must be more conservative because the address may be in
213 different segment. */
214#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
215#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
216#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
217#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
218#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
219
35c08157
KLC		 220/* Size of small data/bss sections, used to calculate SDA_BASE. */
221static long got_size = 0;
222static int is_SDA_BASE_set = 0;
223static int is_ITB_BASE_set = 0;
224
35c08157
KLC		 225/* Convert ELF-VER in eflags to string for debugging purpose. */
226static const char *const nds32_elfver_strtab[] =
227{
228 "ELF-1.2",
229 "ELF-1.3",
230 "ELF-1.4",
231};
232
233/* The nds32 linker needs to keep track of the number of relocs that it
234 decides to copy in check_relocs for each symbol. This is so that
235 it can discard PC relative relocs if it doesn't need them when
236 linking with -Bsymbolic. We store the information in a field
237 extending the regular ELF linker hash table. */
238
239/* This structure keeps track of the number of PC relative relocs we
240 have copied for a given symbol. */
241
242struct elf_nds32_pcrel_relocs_copied
243{
244 /* Next section. */
245 struct elf_nds32_pcrel_relocs_copied *next;
246 /* A section in dynobj. */
247 asection *section;
248 /* Number of relocs copied in this section. */
249 bfd_size_type count;
250};
251
252/* The sh linker needs to keep track of the number of relocs that it
253 decides to copy as dynamic relocs in check_relocs for each symbol.
254 This is so that it can later discard them if they are found to be
255 unnecessary. We store the information in a field extending the
256 regular ELF linker hash table. */
257
258struct elf_nds32_dyn_relocs
259{
260 struct elf_nds32_dyn_relocs *next;
261
262 /* The input section of the reloc. */
263 asection *sec;
264
265 /* Total number of relocs copied for the input section. */
266 bfd_size_type count;
267
268 /* Number of pc-relative relocs copied for the input section. */
269 bfd_size_type pc_count;
270};
271
272/* Nds32 ELF linker hash entry. */
273
274struct elf_nds32_link_hash_entry
275{
276 struct elf_link_hash_entry root;
277
278 /* Track dynamic relocs copied for this symbol. */
279 struct elf_nds32_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 280
281 /* For checking relocation type. */
282#define GOT_UNKNOWN 0
283#define GOT_NORMAL 1
284#define GOT_TLS_IE 2
285 unsigned int tls_type;
35c08157
KLC		 286};
287
288/* Get the nds32 ELF linker hash table from a link_info structure. */
289
290#define FP_BASE_NAME "_FP_BASE_"
291static int check_start_export_sym = 0;
292static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
293
1c8f6a4d
KLC		 294/* The offset for executable tls relaxation. */
295#define TP_OFFSET 0x0
296
297struct elf_nds32_obj_tdata
298{
299 struct elf_obj_tdata root;
300
301 /* tls_type for each local got entry. */
302 char *local_got_tls_type;
303};
304
305#define elf_nds32_tdata(bfd) \
306 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
307
308#define elf32_nds32_local_got_tls_type(bfd) \
309 (elf_nds32_tdata (bfd)->local_got_tls_type)
310
311#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
312
313static bfd_boolean
314nds32_elf_mkobject (bfd *abfd)
315{
316 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
317 NDS32_ELF_DATA);
318}
319
35c08157
KLC		 320/* Relocations used for relocation. */
321static reloc_howto_type nds32_elf_howto_table[] =
322{
323 /* This reloc does nothing. */
324 HOWTO (R_NDS32_NONE, /* type */
325 0, /* rightshift */
6346d5ca
AM		 326 3, /* size (0 = byte, 1 = short, 2 = long) */
327 0, /* bitsize */
35c08157
KLC		 328 FALSE, /* pc_relative */
329 0, /* bitpos */
6346d5ca 330 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 331 bfd_elf_generic_reloc, /* special_function */
332 "R_NDS32_NONE", /* name */
333 FALSE, /* partial_inplace */
334 0, /* src_mask */
335 0, /* dst_mask */
336 FALSE), /* pcrel_offset */
337
338 /* A 16 bit absolute relocation. */
339 HOWTO (R_NDS32_16, /* type */
340 0, /* rightshift */
341 1, /* size (0 = byte, 1 = short, 2 = long) */
342 16, /* bitsize */
343 FALSE, /* pc_relative */
344 0, /* bitpos */
345 complain_overflow_bitfield, /* complain_on_overflow */
346 nds32_elf_generic_reloc, /* special_function */
347 "R_NDS32_16", /* name */
348 FALSE, /* partial_inplace */
349 0xffff, /* src_mask */
350 0xffff, /* dst_mask */
351 FALSE), /* pcrel_offset */
352
353 /* A 32 bit absolute relocation. */
354 HOWTO (R_NDS32_32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield, /* complain_on_overflow */
361 nds32_elf_generic_reloc, /* special_function */
362 "R_NDS32_32", /* name */
363 FALSE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
367
368 /* A 20 bit address. */
369 HOWTO (R_NDS32_20, /* type */
370 0, /* rightshift */
371 2, /* size (0 = byte, 1 = short, 2 = long) */
372 20, /* bitsize */
373 FALSE, /* pc_relative */
374 0, /* bitpos */
375 complain_overflow_unsigned, /* complain_on_overflow */
376 nds32_elf_generic_reloc, /* special_function */
377 "R_NDS32_20", /* name */
378 FALSE, /* partial_inplace */
379 0xfffff, /* src_mask */
380 0xfffff, /* dst_mask */
381 FALSE), /* pcrel_offset */
382
383 /* An PC Relative 9-bit relocation, shifted by 2.
384 This reloc is complicated because relocations are relative to pc & -4.
385 i.e. branches in the right insn slot use the address of the left insn
386 slot for pc. */
387 /* ??? It's not clear whether this should have partial_inplace set or not.
388 Branch relaxing in the assembler can store the addend in the insn,
389 and if bfd_install_relocation gets called the addend may get added
390 again. */
391 HOWTO (R_NDS32_9_PCREL, /* type */
392 1, /* rightshift */
393 1, /* size (0 = byte, 1 = short, 2 = long) */
394 8, /* bitsize */
395 TRUE, /* pc_relative */
396 0, /* bitpos */
397 complain_overflow_signed, /* complain_on_overflow */
398 nds32_elf_9_pcrel_reloc, /* special_function */
399 "R_NDS32_9_PCREL", /* name */
400 FALSE, /* partial_inplace */
401 0xff, /* src_mask */
402 0xff, /* dst_mask */
403 TRUE), /* pcrel_offset */
404
405 /* A relative 15 bit relocation, right shifted by 1. */
406 HOWTO (R_NDS32_15_PCREL, /* type */
407 1, /* rightshift */
408 2, /* size (0 = byte, 1 = short, 2 = long) */
409 14, /* bitsize */
410 TRUE, /* pc_relative */
411 0, /* bitpos */
412 complain_overflow_signed, /* complain_on_overflow */
413 bfd_elf_generic_reloc, /* special_function */
414 "R_NDS32_15_PCREL", /* name */
415 FALSE, /* partial_inplace */
416 0x3fff, /* src_mask */
417 0x3fff, /* dst_mask */
418 TRUE), /* pcrel_offset */
419
420 /* A relative 17 bit relocation, right shifted by 1. */
421 HOWTO (R_NDS32_17_PCREL, /* type */
422 1, /* rightshift */
423 2, /* size (0 = byte, 1 = short, 2 = long) */
424 16, /* bitsize */
425 TRUE, /* pc_relative */
426 0, /* bitpos */
427 complain_overflow_signed, /* complain_on_overflow */
428 bfd_elf_generic_reloc, /* special_function */
429 "R_NDS32_17_PCREL", /* name */
430 FALSE, /* partial_inplace */
431 0xffff, /* src_mask */
432 0xffff, /* dst_mask */
433 TRUE), /* pcrel_offset */
434
435 /* A relative 25 bit relocation, right shifted by 1. */
436 /* ??? It's not clear whether this should have partial_inplace set or not.
437 Branch relaxing in the assembler can store the addend in the insn,
438 and if bfd_install_relocation gets called the addend may get added
439 again. */
440 HOWTO (R_NDS32_25_PCREL, /* type */
441 1, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 24, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_signed, /* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_NDS32_25_PCREL", /* name */
449 FALSE, /* partial_inplace */
450 0xffffff, /* src_mask */
451 0xffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 /* High 20 bits of address when lower 12 is or'd in. */
455 HOWTO (R_NDS32_HI20, /* type */
456 12, /* rightshift */
457 2, /* size (0 = byte, 1 = short, 2 = long) */
458 20, /* bitsize */
459 FALSE, /* pc_relative */
460 0, /* bitpos */
461 complain_overflow_dont,/* complain_on_overflow */
462 nds32_elf_hi20_reloc, /* special_function */
463 "R_NDS32_HI20", /* name */
464 FALSE, /* partial_inplace */
465 0x000fffff, /* src_mask */
466 0x000fffff, /* dst_mask */
467 FALSE), /* pcrel_offset */
468
469 /* Lower 12 bits of address. */
470 HOWTO (R_NDS32_LO12S3, /* type */
471 3, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 9, /* bitsize */
474 FALSE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_dont,/* complain_on_overflow */
477 nds32_elf_lo12_reloc, /* special_function */
478 "R_NDS32_LO12S3", /* name */
479 FALSE, /* partial_inplace */
480 0x000001ff, /* src_mask */
481 0x000001ff, /* dst_mask */
482 FALSE), /* pcrel_offset */
483
484 /* Lower 12 bits of address. */
485 HOWTO (R_NDS32_LO12S2, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 10, /* bitsize */
489 FALSE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_dont,/* complain_on_overflow */
492 nds32_elf_lo12_reloc, /* special_function */
493 "R_NDS32_LO12S2", /* name */
494 FALSE, /* partial_inplace */
495 0x000003ff, /* src_mask */
496 0x000003ff, /* dst_mask */
497 FALSE), /* pcrel_offset */
498
499 /* Lower 12 bits of address. */
500 HOWTO (R_NDS32_LO12S1, /* type */
501 1, /* rightshift */
502 2, /* size (0 = byte, 1 = short, 2 = long) */
503 11, /* bitsize */
504 FALSE, /* pc_relative */
505 0, /* bitpos */
506 complain_overflow_dont,/* complain_on_overflow */
507 nds32_elf_lo12_reloc, /* special_function */
508 "R_NDS32_LO12S1", /* name */
509 FALSE, /* partial_inplace */
510 0x000007ff, /* src_mask */
511 0x000007ff, /* dst_mask */
512 FALSE), /* pcrel_offset */
513
514 /* Lower 12 bits of address. */
515 HOWTO (R_NDS32_LO12S0, /* type */
516 0, /* rightshift */
517 2, /* size (0 = byte, 1 = short, 2 = long) */
518 12, /* bitsize */
519 FALSE, /* pc_relative */
520 0, /* bitpos */
521 complain_overflow_dont,/* complain_on_overflow */
522 nds32_elf_lo12_reloc, /* special_function */
523 "R_NDS32_LO12S0", /* name */
524 FALSE, /* partial_inplace */
525 0x00000fff, /* src_mask */
526 0x00000fff, /* dst_mask */
527 FALSE), /* pcrel_offset */
528
529 /* Small data area 15 bits offset. */
530 HOWTO (R_NDS32_SDA15S3, /* type */
531 3, /* rightshift */
532 2, /* size (0 = byte, 1 = short, 2 = long) */
533 15, /* bitsize */
534 FALSE, /* pc_relative */
535 0, /* bitpos */
536 complain_overflow_signed, /* complain_on_overflow */
537 nds32_elf_sda15_reloc, /* special_function */
538 "R_NDS32_SDA15S3", /* name */
539 FALSE, /* partial_inplace */
540 0x00007fff, /* src_mask */
541 0x00007fff, /* dst_mask */
542 FALSE), /* pcrel_offset */
543
544 /* Small data area 15 bits offset. */
545 HOWTO (R_NDS32_SDA15S2, /* type */
546 2, /* rightshift */
547 2, /* size (0 = byte, 1 = short, 2 = long) */
548 15, /* bitsize */
549 FALSE, /* pc_relative */
550 0, /* bitpos */
551 complain_overflow_signed, /* complain_on_overflow */
552 nds32_elf_sda15_reloc, /* special_function */
553 "R_NDS32_SDA15S2", /* name */
554 FALSE, /* partial_inplace */
555 0x00007fff, /* src_mask */
556 0x00007fff, /* dst_mask */
557 FALSE), /* pcrel_offset */
558
559 /* Small data area 15 bits offset. */
560 HOWTO (R_NDS32_SDA15S1, /* type */
561 1, /* rightshift */
562 2, /* size (0 = byte, 1 = short, 2 = long) */
563 15, /* bitsize */
564 FALSE, /* pc_relative */
565 0, /* bitpos */
566 complain_overflow_signed, /* complain_on_overflow */
567 nds32_elf_sda15_reloc, /* special_function */
568 "R_NDS32_SDA15S1", /* name */
569 FALSE, /* partial_inplace */
570 0x00007fff, /* src_mask */
571 0x00007fff, /* dst_mask */
572 FALSE), /* pcrel_offset */
573
574 /* Small data area 15 bits offset. */
575 HOWTO (R_NDS32_SDA15S0, /* type */
576 0, /* rightshift */
577 2, /* size (0 = byte, 1 = short, 2 = long) */
578 15, /* bitsize */
579 FALSE, /* pc_relative */
580 0, /* bitpos */
581 complain_overflow_signed, /* complain_on_overflow */
582 nds32_elf_sda15_reloc, /* special_function */
583 "R_NDS32_SDA15S0", /* name */
584 FALSE, /* partial_inplace */
585 0x00007fff, /* src_mask */
586 0x00007fff, /* dst_mask */
587 FALSE), /* pcrel_offset */
588
589 /* GNU extension to record C++ vtable hierarchy */
590 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
591 0, /* rightshift */
592 2, /* size (0 = byte, 1 = short, 2 = long) */
593 0, /* bitsize */
594 FALSE, /* pc_relative */
595 0, /* bitpos */
596 complain_overflow_dont,/* complain_on_overflow */
597 NULL, /* special_function */
598 "R_NDS32_GNU_VTINHERIT", /* name */
599 FALSE, /* partial_inplace */
600 0, /* src_mask */
601 0, /* dst_mask */
602 FALSE), /* pcrel_offset */
603
604 /* GNU extension to record C++ vtable member usage */
605 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 0, /* bitsize */
609 FALSE, /* pc_relative */
610 0, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
613 "R_NDS32_GNU_VTENTRY", /* name */
614 FALSE, /* partial_inplace */
615 0, /* src_mask */
616 0, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 /* A 16 bit absolute relocation. */
620 HOWTO (R_NDS32_16_RELA, /* type */
621 0, /* rightshift */
622 1, /* size (0 = byte, 1 = short, 2 = long) */
623 16, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_bitfield, /* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_NDS32_16_RELA", /* name */
629 FALSE, /* partial_inplace */
630 0xffff, /* src_mask */
631 0xffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 /* A 32 bit absolute relocation. */
635 HOWTO (R_NDS32_32_RELA, /* type */
636 0, /* rightshift */
637 2, /* size (0 = byte, 1 = short, 2 = long) */
638 32, /* bitsize */
639 FALSE, /* pc_relative */
640 0, /* bitpos */
641 complain_overflow_bitfield, /* complain_on_overflow */
642 bfd_elf_generic_reloc, /* special_function */
643 "R_NDS32_32_RELA", /* name */
644 FALSE, /* partial_inplace */
645 0xffffffff, /* src_mask */
646 0xffffffff, /* dst_mask */
647 FALSE), /* pcrel_offset */
648
649 /* A 20 bit address. */
650 HOWTO (R_NDS32_20_RELA, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 20, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_signed, /* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_NDS32_20_RELA", /* name */
659 FALSE, /* partial_inplace */
660 0xfffff, /* src_mask */
661 0xfffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
665 1, /* rightshift */
666 1, /* size (0 = byte, 1 = short, 2 = long) */
667 8, /* bitsize */
668 TRUE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed, /* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_NDS32_9_PCREL_RELA",/* name */
673 FALSE, /* partial_inplace */
674 0xff, /* src_mask */
675 0xff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 /* A relative 15 bit relocation, right shifted by 1. */
679 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
680 1, /* rightshift */
681 2, /* size (0 = byte, 1 = short, 2 = long) */
682 14, /* bitsize */
683 TRUE, /* pc_relative */
684 0, /* bitpos */
685 complain_overflow_signed, /* complain_on_overflow */
686 bfd_elf_generic_reloc, /* special_function */
687 "R_NDS32_15_PCREL_RELA", /* name */
688 FALSE, /* partial_inplace */
689 0x3fff, /* src_mask */
690 0x3fff, /* dst_mask */
691 TRUE), /* pcrel_offset */
692
693 /* A relative 17 bit relocation, right shifted by 1. */
694 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
695 1, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 TRUE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_signed, /* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_NDS32_17_PCREL_RELA", /* name */
703 FALSE, /* partial_inplace */
704 0xffff, /* src_mask */
705 0xffff, /* dst_mask */
706 TRUE), /* pcrel_offset */
707
708 /* A relative 25 bit relocation, right shifted by 2. */
709 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
710 1, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 24, /* bitsize */
713 TRUE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_signed, /* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_NDS32_25_PCREL_RELA", /* name */
718 FALSE, /* partial_inplace */
719 0xffffff, /* src_mask */
720 0xffffff, /* dst_mask */
721 TRUE), /* pcrel_offset */
722
723 /* High 20 bits of address when lower 16 is or'd in. */
724 HOWTO (R_NDS32_HI20_RELA, /* type */
725 12, /* rightshift */
726 2, /* size (0 = byte, 1 = short, 2 = long) */
727 20, /* bitsize */
728 FALSE, /* pc_relative */
729 0, /* bitpos */
730 complain_overflow_dont,/* complain_on_overflow */
731 bfd_elf_generic_reloc, /* special_function */
732 "R_NDS32_HI20_RELA", /* name */
733 FALSE, /* partial_inplace */
734 0x000fffff, /* src_mask */
735 0x000fffff, /* dst_mask */
736 FALSE), /* pcrel_offset */
737
738 /* Lower 12 bits of address. */
739 HOWTO (R_NDS32_LO12S3_RELA, /* type */
740 3, /* rightshift */
741 2, /* size (0 = byte, 1 = short, 2 = long) */
742 9, /* bitsize */
743 FALSE, /* pc_relative */
744 0, /* bitpos */
745 complain_overflow_dont,/* complain_on_overflow */
746 bfd_elf_generic_reloc, /* special_function */
747 "R_NDS32_LO12S3_RELA", /* name */
748 FALSE, /* partial_inplace */
749 0x000001ff, /* src_mask */
750 0x000001ff, /* dst_mask */
751 FALSE), /* pcrel_offset */
752
753 /* Lower 12 bits of address. */
754 HOWTO (R_NDS32_LO12S2_RELA, /* type */
755 2, /* rightshift */
756 2, /* size (0 = byte, 1 = short, 2 = long) */
757 10, /* bitsize */
758 FALSE, /* pc_relative */
759 0, /* bitpos */
760 complain_overflow_dont,/* complain_on_overflow */
761 bfd_elf_generic_reloc, /* special_function */
762 "R_NDS32_LO12S2_RELA", /* name */
763 FALSE, /* partial_inplace */
764 0x000003ff, /* src_mask */
765 0x000003ff, /* dst_mask */
766 FALSE), /* pcrel_offset */
767
768 /* Lower 12 bits of address. */
769 HOWTO (R_NDS32_LO12S1_RELA, /* type */
770 1, /* rightshift */
771 2, /* size (0 = byte, 1 = short, 2 = long) */
772 11, /* bitsize */
773 FALSE, /* pc_relative */
774 0, /* bitpos */
775 complain_overflow_dont,/* complain_on_overflow */
776 bfd_elf_generic_reloc, /* special_function */
777 "R_NDS32_LO12S1_RELA", /* name */
778 FALSE, /* partial_inplace */
779 0x000007ff, /* src_mask */
780 0x000007ff, /* dst_mask */
781 FALSE), /* pcrel_offset */
782
783 /* Lower 12 bits of address. */
784 HOWTO (R_NDS32_LO12S0_RELA, /* type */
785 0, /* rightshift */
786 2, /* size (0 = byte, 1 = short, 2 = long) */
787 12, /* bitsize */
788 FALSE, /* pc_relative */
789 0, /* bitpos */
790 complain_overflow_dont,/* complain_on_overflow */
791 bfd_elf_generic_reloc, /* special_function */
792 "R_NDS32_LO12S0_RELA", /* name */
793 FALSE, /* partial_inplace */
794 0x00000fff, /* src_mask */
795 0x00000fff, /* dst_mask */
796 FALSE), /* pcrel_offset */
797
798 /* Small data area 15 bits offset. */
799 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
800 3, /* rightshift */
801 2, /* size (0 = byte, 1 = short, 2 = long) */
802 15, /* bitsize */
803 FALSE, /* pc_relative */
804 0, /* bitpos */
805 complain_overflow_signed, /* complain_on_overflow */
806 bfd_elf_generic_reloc, /* special_function */
807 "R_NDS32_SDA15S3_RELA",/* name */
808 FALSE, /* partial_inplace */
809 0x00007fff, /* src_mask */
810 0x00007fff, /* dst_mask */
811 FALSE), /* pcrel_offset */
812
813 /* Small data area 15 bits offset. */
814 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
815 2, /* rightshift */
816 2, /* size (0 = byte, 1 = short, 2 = long) */
817 15, /* bitsize */
818 FALSE, /* pc_relative */
819 0, /* bitpos */
820 complain_overflow_signed, /* complain_on_overflow */
821 bfd_elf_generic_reloc, /* special_function */
822 "R_NDS32_SDA15S2_RELA",/* name */
823 FALSE, /* partial_inplace */
824 0x00007fff, /* src_mask */
825 0x00007fff, /* dst_mask */
826 FALSE), /* pcrel_offset */
827
828 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
829 1, /* rightshift */
830 2, /* size (0 = byte, 1 = short, 2 = long) */
831 15, /* bitsize */
832 FALSE, /* pc_relative */
833 0, /* bitpos */
834 complain_overflow_signed, /* complain_on_overflow */
835 bfd_elf_generic_reloc, /* special_function */
836 "R_NDS32_SDA15S1_RELA",/* name */
837 FALSE, /* partial_inplace */
838 0x00007fff, /* src_mask */
839 0x00007fff, /* dst_mask */
840 FALSE), /* pcrel_offset */
841
842 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
843 0, /* rightshift */
844 2, /* size (0 = byte, 1 = short, 2 = long) */
845 15, /* bitsize */
846 FALSE, /* pc_relative */
847 0, /* bitpos */
848 complain_overflow_signed, /* complain_on_overflow */
849 bfd_elf_generic_reloc, /* special_function */
850 "R_NDS32_SDA15S0_RELA",/* name */
851 FALSE, /* partial_inplace */
852 0x00007fff, /* src_mask */
853 0x00007fff, /* dst_mask */
854 FALSE), /* pcrel_offset */
855
856 /* GNU extension to record C++ vtable hierarchy */
857 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
858 0, /* rightshift */
859 2, /* size (0 = byte, 1 = short, 2 = long) */
860 0, /* bitsize */
861 FALSE, /* pc_relative */
862 0, /* bitpos */
863 complain_overflow_dont,/* complain_on_overflow */
864 NULL, /* special_function */
865 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
866 FALSE, /* partial_inplace */
867 0, /* src_mask */
868 0, /* dst_mask */
869 FALSE), /* pcrel_offset */
870
871 /* GNU extension to record C++ vtable member usage */
872 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
873 0, /* rightshift */
874 2, /* size (0 = byte, 1 = short, 2 = long) */
875 0, /* bitsize */
876 FALSE, /* pc_relative */
877 0, /* bitpos */
878 complain_overflow_dont,/* complain_on_overflow */
879 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
880 "R_NDS32_RELA_GNU_VTENTRY", /* name */
881 FALSE, /* partial_inplace */
882 0, /* src_mask */
883 0, /* dst_mask */
884 FALSE), /* pcrel_offset */
885
886 /* Like R_NDS32_20, but referring to the GOT table entry for
887 the symbol. */
888 HOWTO (R_NDS32_GOT20, /* type */
889 0, /* rightshift */
890 2, /* size (0 = byte, 1 = short, 2 = long) */
891 20, /* bitsize */
892 FALSE, /* pc_relative */
893 0, /* bitpos */
894 complain_overflow_signed, /* complain_on_overflow */
895 bfd_elf_generic_reloc, /* special_function */
896 "R_NDS32_GOT20", /* name */
897 FALSE, /* partial_inplace */
898 0xfffff, /* src_mask */
899 0xfffff, /* dst_mask */
900 FALSE), /* pcrel_offset */
901
902 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
903 entry for the symbol. */
904 HOWTO (R_NDS32_25_PLTREL, /* type */
905 1, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 24, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_signed, /* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_NDS32_25_PLTREL", /* name */
913 FALSE, /* partial_inplace */
914 0xffffff, /* src_mask */
915 0xffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 /* This is used only by the dynamic linker. The symbol should exist
919 both in the object being run and in some shared library. The
920 dynamic linker copies the data addressed by the symbol from the
921 shared library into the object, because the object being
922 run has to have the data at some particular address. */
923 HOWTO (R_NDS32_COPY, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 FALSE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_bitfield, /* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_NDS32_COPY", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 FALSE), /* pcrel_offset */
936
937 /* Like R_NDS32_20, but used when setting global offset table
938 entries. */
939 HOWTO (R_NDS32_GLOB_DAT, /* type */
940 0, /* rightshift */
941 2, /* size (0 = byte, 1 = short, 2 = long) */
942 32, /* bitsize */
943 FALSE, /* pc_relative */
944 0, /* bitpos */
945 complain_overflow_bitfield, /* complain_on_overflow */
946 bfd_elf_generic_reloc, /* special_function */
947 "R_NDS32_GLOB_DAT", /* name */
948 FALSE, /* partial_inplace */
949 0xffffffff, /* src_mask */
950 0xffffffff, /* dst_mask */
951 FALSE), /* pcrel_offset */
952
953 /* Marks a procedure linkage table entry for a symbol. */
954 HOWTO (R_NDS32_JMP_SLOT, /* type */
955 0, /* rightshift */
956 2, /* size (0 = byte, 1 = short, 2 = long) */
957 32, /* bitsize */
958 FALSE, /* pc_relative */
959 0, /* bitpos */
960 complain_overflow_bitfield, /* complain_on_overflow */
961 bfd_elf_generic_reloc, /* special_function */
962 "R_NDS32_JMP_SLOT", /* name */
963 FALSE, /* partial_inplace */
964 0xffffffff, /* src_mask */
965 0xffffffff, /* dst_mask */
966 FALSE), /* pcrel_offset */
967
968 /* Used only by the dynamic linker. When the object is run, this
969 longword is set to the load address of the object, plus the
970 addend. */
971 HOWTO (R_NDS32_RELATIVE, /* type */
972 0, /* rightshift */
973 2, /* size (0 = byte, 1 = short, 2 = long) */
974 32, /* bitsize */
975 FALSE, /* pc_relative */
976 0, /* bitpos */
977 complain_overflow_bitfield, /* complain_on_overflow */
978 bfd_elf_generic_reloc, /* special_function */
979 "R_NDS32_RELATIVE", /* name */
980 FALSE, /* partial_inplace */
981 0xffffffff, /* src_mask */
982 0xffffffff, /* dst_mask */
983 FALSE), /* pcrel_offset */
984
985 HOWTO (R_NDS32_GOTOFF, /* type */
986 0, /* rightshift */
987 2, /* size (0 = byte, 1 = short, 2 = long) */
988 20, /* bitsize */
989 FALSE, /* pc_relative */
990 0, /* bitpos */
991 complain_overflow_signed, /* complain_on_overflow */
992 bfd_elf_generic_reloc, /* special_function */
993 "R_NDS32_GOTOFF", /* name */
994 FALSE, /* partial_inplace */
995 0xfffff, /* src_mask */
996 0xfffff, /* dst_mask */
997 FALSE), /* pcrel_offset */
998
999 /* An PC Relative 20-bit relocation used when setting PIC offset
1000 table register. */
1001 HOWTO (R_NDS32_GOTPC20, /* type */
1002 0, /* rightshift */
1003 2, /* size (0 = byte, 1 = short, 2 = long) */
1004 20, /* bitsize */
1005 TRUE, /* pc_relative */
1006 0, /* bitpos */
1007 complain_overflow_signed, /* complain_on_overflow */
1008 bfd_elf_generic_reloc, /* special_function */
1009 "R_NDS32_GOTPC20", /* name */
1010 FALSE, /* partial_inplace */
1011 0xfffff, /* src_mask */
1012 0xfffff, /* dst_mask */
1013 TRUE), /* pcrel_offset */
1014
1015 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1016 the symbol. */
1017 HOWTO (R_NDS32_GOT_HI20, /* type */
1018 12, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 20, /* bitsize */
1021 FALSE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_NDS32_GOT_HI20", /* name */
1026 FALSE, /* partial_inplace */
1027 0x000fffff, /* src_mask */
1028 0x000fffff, /* dst_mask */
1029 FALSE), /* pcrel_offset */
1030 HOWTO (R_NDS32_GOT_LO12, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 12, /* bitsize */
1034 FALSE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_NDS32_GOT_LO12", /* name */
1039 FALSE, /* partial_inplace */
1040 0x00000fff, /* src_mask */
1041 0x00000fff, /* dst_mask */
1042 FALSE), /* pcrel_offset */
1043
1044 /* An PC Relative relocation used when setting PIC offset table register.
1045 Like R_NDS32_HI20, but referring to the GOT table entry for
1046 the symbol. */
1047 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1048 12, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 20, /* bitsize */
1051 FALSE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_NDS32_GOTPC_HI20", /* name */
1056 FALSE, /* partial_inplace */
1057 0x000fffff, /* src_mask */
1058 0x000fffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1061 0, /* rightshift */
1062 2, /* size (0 = byte, 1 = short, 2 = long) */
1063 12, /* bitsize */
1064 FALSE, /* pc_relative */
1065 0, /* bitpos */
1066 complain_overflow_dont, /* complain_on_overflow */
1067 bfd_elf_generic_reloc, /* special_function */
1068 "R_NDS32_GOTPC_LO12", /* name */
1069 FALSE, /* partial_inplace */
1070 0x00000fff, /* src_mask */
1071 0x00000fff, /* dst_mask */
1072 TRUE), /* pcrel_offset */
1073
1074 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1075 12, /* rightshift */
1076 2, /* size (0 = byte, 1 = short, 2 = long) */
1077 20, /* bitsize */
1078 FALSE, /* pc_relative */
1079 0, /* bitpos */
1080 complain_overflow_dont,/* complain_on_overflow */
1081 bfd_elf_generic_reloc, /* special_function */
1082 "R_NDS32_GOTOFF_HI20", /* name */
1083 FALSE, /* partial_inplace */
1084 0x000fffff, /* src_mask */
1085 0x000fffff, /* dst_mask */
1086 FALSE), /* pcrel_offset */
1087 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 12, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_NDS32_GOTOFF_LO12", /* name */
1096 FALSE, /* partial_inplace */
1097 0x00000fff, /* src_mask */
1098 0x00000fff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Alignment hint for relaxable instruction. This is used with
1102 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1103 in order to make next label aligned on word boundary. */
1104 HOWTO (R_NDS32_INSN16, /* type */
1105 0, /* rightshift */
1106 2, /* size (0 = byte, 1 = short, 2 = long) */
1107 32, /* bitsize */
1108 FALSE, /* pc_relative */
1109 0, /* bitpos */
1110 complain_overflow_dont,/* complain_on_overflow */
1111 nds32_elf_ignore_reloc,/* special_function */
1112 "R_NDS32_INSN16", /* name */
1113 FALSE, /* partial_inplace */
1114 0x00000fff, /* src_mask */
1115 0x00000fff, /* dst_mask */
1116 FALSE), /* pcrel_offset */
1117
1118 /* Alignment hint for label. */
1119 HOWTO (R_NDS32_LABEL, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 FALSE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 nds32_elf_ignore_reloc,/* special_function */
1127 "R_NDS32_LABEL", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 FALSE), /* pcrel_offset */
1132
1133 /* Relax hint for unconditional call sequence */
1134 HOWTO (R_NDS32_LONGCALL1, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 FALSE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 nds32_elf_ignore_reloc,/* special_function */
1142 "R_NDS32_LONGCALL1", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 FALSE), /* pcrel_offset */
1147
1148 /* Relax hint for conditional call sequence. */
1149 HOWTO (R_NDS32_LONGCALL2, /* type */
1150 0, /* rightshift */
1151 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 32, /* bitsize */
1153 FALSE, /* pc_relative */
1154 0, /* bitpos */
1155 complain_overflow_dont,/* complain_on_overflow */
1156 nds32_elf_ignore_reloc,/* special_function */
1157 "R_NDS32_LONGCALL2", /* name */
1158 FALSE, /* partial_inplace */
1159 0xffffffff, /* src_mask */
1160 0xffffffff, /* dst_mask */
1161 FALSE), /* pcrel_offset */
1162
1163 /* Relax hint for conditional call sequence. */
1164 HOWTO (R_NDS32_LONGCALL3, /* type */
1165 0, /* rightshift */
1166 2, /* size (0 = byte, 1 = short, 2 = long) */
1167 32, /* bitsize */
1168 FALSE, /* pc_relative */
1169 0, /* bitpos */
1170 complain_overflow_dont,/* complain_on_overflow */
1171 nds32_elf_ignore_reloc,/* special_function */
1172 "R_NDS32_LONGCALL3", /* name */
1173 FALSE, /* partial_inplace */
1174 0xffffffff, /* src_mask */
1175 0xffffffff, /* dst_mask */
1176 FALSE), /* pcrel_offset */
1177
1178 /* Relax hint for unconditional branch sequence. */
1179 HOWTO (R_NDS32_LONGJUMP1, /* type */
1180 0, /* rightshift */
1181 2, /* size (0 = byte, 1 = short, 2 = long) */
1182 32, /* bitsize */
1183 FALSE, /* pc_relative */
1184 0, /* bitpos */
1185 complain_overflow_dont,/* complain_on_overflow */
1186 nds32_elf_ignore_reloc,/* special_function */
1187 "R_NDS32_LONGJUMP1", /* name */
1188 FALSE, /* partial_inplace */
1189 0xffffffff, /* src_mask */
1190 0xffffffff, /* dst_mask */
1191 FALSE), /* pcrel_offset */
1192
1193 /* Relax hint for conditional branch sequence. */
1194 HOWTO (R_NDS32_LONGJUMP2, /* type */
1195 0, /* rightshift */
1196 2, /* size (0 = byte, 1 = short, 2 = long) */
1197 32, /* bitsize */
1198 FALSE, /* pc_relative */
1199 0, /* bitpos */
1200 complain_overflow_dont,/* complain_on_overflow */
1201 nds32_elf_ignore_reloc,/* special_function */
1202 "R_NDS32_LONGJUMP2", /* name */
1203 FALSE, /* partial_inplace */
1204 0xffffffff, /* src_mask */
1205 0xffffffff, /* dst_mask */
1206 FALSE), /* pcrel_offset */
1207
1208 /* Relax hint for conditional branch sequence. */
1209 HOWTO (R_NDS32_LONGJUMP3, /* type */
1210 0, /* rightshift */
1211 2, /* size (0 = byte, 1 = short, 2 = long) */
1212 32, /* bitsize */
1213 FALSE, /* pc_relative */
1214 0, /* bitpos */
1215 complain_overflow_dont,/* complain_on_overflow */
1216 nds32_elf_ignore_reloc,/* special_function */
1217 "R_NDS32_LONGJUMP3", /* name */
1218 FALSE, /* partial_inplace */
1219 0xffffffff, /* src_mask */
1220 0xffffffff, /* dst_mask */
1221 FALSE), /* pcrel_offset */
1222
1223 /* Relax hint for load/store sequence. */
1224 HOWTO (R_NDS32_LOADSTORE, /* type */
1225 0, /* rightshift */
1226 2, /* size (0 = byte, 1 = short, 2 = long) */
1227 32, /* bitsize */
1228 FALSE, /* pc_relative */
1229 0, /* bitpos */
1230 complain_overflow_dont,/* complain_on_overflow */
1231 nds32_elf_ignore_reloc,/* special_function */
1232 "R_NDS32_LOADSTORE", /* name */
1233 FALSE, /* partial_inplace */
1234 0xffffffff, /* src_mask */
1235 0xffffffff, /* dst_mask */
1236 FALSE), /* pcrel_offset */
1237
1238 /* Relax hint for load/store sequence. */
1239 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1240 0, /* rightshift */
1241 1, /* size (0 = byte, 1 = short, 2 = long) */
1242 16, /* bitsize */
1243 FALSE, /* pc_relative */
1244 0, /* bitpos */
1245 complain_overflow_dont,/* complain_on_overflow */
1246 nds32_elf_ignore_reloc,/* special_function */
1247 "R_NDS32_9_FIXED_RELA",/* name */
1248 FALSE, /* partial_inplace */
1249 0x000000ff, /* src_mask */
1250 0x000000ff, /* dst_mask */
1251 FALSE), /* pcrel_offset */
1252
1253 /* Relax hint for load/store sequence. */
1254 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 FALSE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 nds32_elf_ignore_reloc,/* special_function */
1262 "R_NDS32_15_FIXED_RELA", /* name */
1263 FALSE, /* partial_inplace */
1264 0x00003fff, /* src_mask */
1265 0x00003fff, /* dst_mask */
1266 FALSE), /* pcrel_offset */
1267
1268 /* Relax hint for load/store sequence. */
1269 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1270 0, /* rightshift */
1271 2, /* size (0 = byte, 1 = short, 2 = long) */
1272 32, /* bitsize */
1273 FALSE, /* pc_relative */
1274 0, /* bitpos */
1275 complain_overflow_dont,/* complain_on_overflow */
1276 nds32_elf_ignore_reloc,/* special_function */
1277 "R_NDS32_17_FIXED_RELA", /* name */
1278 FALSE, /* partial_inplace */
1279 0x0000ffff, /* src_mask */
1280 0x0000ffff, /* dst_mask */
1281 FALSE), /* pcrel_offset */
1282
1283 /* Relax hint for load/store sequence. */
1284 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 32, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_dont,/* complain_on_overflow */
1291 nds32_elf_ignore_reloc,/* special_function */
1292 "R_NDS32_25_FIXED_RELA", /* name */
1293 FALSE, /* partial_inplace */
1294 0x00ffffff, /* src_mask */
1295 0x00ffffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 /* High 20 bits of PLT symbol offset relative to PC. */
1299 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1300 12, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 20, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_NDS32_PLTREL_HI20", /* name */
1308 FALSE, /* partial_inplace */
1309 0x000fffff, /* src_mask */
1310 0x000fffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 /* Low 12 bits of PLT symbol offset relative to PC. */
1314 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1315 0, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 12, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_dont,/* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 "R_NDS32_PLTREL_LO12", /* name */
1323 FALSE, /* partial_inplace */
1324 0x00000fff, /* src_mask */
1325 0x00000fff, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
1328 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1329 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1330 12, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 20, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_dont,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_NDS32_PLT_GOTREL_HI20", /* name */
1338 FALSE, /* partial_inplace */
1339 0x000fffff, /* src_mask */
1340 0x000fffff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1344 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1345 0, /* rightshift */
1346 2, /* size (0 = byte, 1 = short, 2 = long) */
1347 12, /* bitsize */
1348 FALSE, /* pc_relative */
1349 0, /* bitpos */
1350 complain_overflow_dont,/* complain_on_overflow */
1351 bfd_elf_generic_reloc, /* special_function */
1352 "R_NDS32_PLT_GOTREL_LO12", /* name */
1353 FALSE, /* partial_inplace */
1354 0x00000fff, /* src_mask */
1355 0x00000fff, /* dst_mask */
1356 FALSE), /* pcrel_offset */
1357
1358 /* Small data area 12 bits offset. */
1359 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1360 2, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 12, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_signed, /* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_NDS32_SDA12S2_DP_RELA", /* name */
1368 FALSE, /* partial_inplace */
1369 0x00000fff, /* src_mask */
1370 0x00000fff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 /* Small data area 12 bits offset. */
1374 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1375 2, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 12, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_signed, /* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_NDS32_SDA12S2_SP_RELA", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00000fff, /* src_mask */
1385 0x00000fff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387 /* Lower 12 bits of address. */
1388
1389 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1390 2, /* rightshift */
1391 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 10, /* bitsize */
1393 FALSE, /* pc_relative */
1394 0, /* bitpos */
1395 complain_overflow_dont,/* complain_on_overflow */
1396 bfd_elf_generic_reloc, /* special_function */
1397 "R_NDS32_LO12S2_DP_RELA", /* name */
1398 FALSE, /* partial_inplace */
1399 0x000003ff, /* src_mask */
1400 0x000003ff, /* dst_mask */
1401 FALSE), /* pcrel_offset */
1402
1403 /* Lower 12 bits of address. */
1404 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1405 2, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 10, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_dont,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_NDS32_LO12S2_SP_RELA", /* name */
1413 FALSE, /* partial_inplace */
1414 0x000003ff, /* src_mask */
1415 0x000003ff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417 /* Lower 12 bits of address. Special identity for or case. */
1418 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_dont,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_NDS32_LO12S0_ORI_RELA", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431 /* Small data area 19 bits offset. */
1432 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1433 3, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
1435 16, /* bitsize */
1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
1438 complain_overflow_signed, /* complain_on_overflow */
1439 bfd_elf_generic_reloc, /* special_function */
1440 "R_NDS32_SDA16S3_RELA",/* name */
1441 FALSE, /* partial_inplace */
1442 0x0000ffff, /* src_mask */
1443 0x0000ffff, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* Small data area 15 bits offset. */
1447 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1448 2, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 17, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_signed, /* complain_on_overflow */
1454 bfd_elf_generic_reloc, /* special_function */
1455 "R_NDS32_SDA17S2_RELA",/* name */
1456 FALSE, /* partial_inplace */
1457 0x0001ffff, /* src_mask */
1458 0x0001ffff, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1462 1, /* rightshift */
1463 2, /* size (0 = byte, 1 = short, 2 = long) */
1464 18, /* bitsize */
1465 FALSE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_NDS32_SDA18S1_RELA",/* name */
1470 FALSE, /* partial_inplace */
1471 0x0003ffff, /* src_mask */
1472 0x0003ffff, /* dst_mask */
1473 FALSE), /* pcrel_offset */
1474
1475 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1476 0, /* rightshift */
1477 2, /* size (0 = byte, 1 = short, 2 = long) */
1478 19, /* bitsize */
1479 FALSE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_NDS32_SDA19S0_RELA",/* name */
1484 FALSE, /* partial_inplace */
1485 0x0007ffff, /* src_mask */
1486 0x0007ffff, /* dst_mask */
1487 FALSE), /* pcrel_offset */
1488 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1489 0, /* rightshift */
1490 0, /* size (0 = byte, 1 = short, 2 = long) */
1491 8, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont,/* complain_on_overflow */
1495 nds32_elf_ignore_reloc,/* special_function */
1496 "R_NDS32_DWARF2_OP1_RELA", /* name */
1497 FALSE, /* partial_inplace */
1498 0xff, /* src_mask */
1499 0xff, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1502 0, /* rightshift */
1503 1, /* size (0 = byte, 1 = short, 2 = long) */
1504 16, /* bitsize */
1505 FALSE, /* pc_relative */
1506 0, /* bitpos */
1507 complain_overflow_dont,/* complain_on_overflow */
1508 nds32_elf_ignore_reloc,/* special_function */
1509 "R_NDS32_DWARF2_OP2_RELA", /* name */
1510 FALSE, /* partial_inplace */
1511 0xffff, /* src_mask */
1512 0xffff, /* dst_mask */
1513 FALSE), /* pcrel_offset */
1514 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1515 0, /* rightshift */
1516 2, /* size (0 = byte, 1 = short, 2 = long) */
1517 32, /* bitsize */
1518 FALSE, /* pc_relative */
1519 0, /* bitpos */
1520 complain_overflow_dont,/* complain_on_overflow */
1521 nds32_elf_ignore_reloc,/* special_function */
1522 "R_NDS32_DWARF2_LEB_RELA", /* name */
1523 FALSE, /* partial_inplace */
1524 0xffffffff, /* src_mask */
1525 0xffffffff, /* dst_mask */
1526 FALSE), /* pcrel_offset */
1527 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1528 0, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 16, /* bitsize */
1531 FALSE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_dont,/* complain_on_overflow */
1534 nds32_elf_ignore_reloc,/* special_function */
1535 "R_NDS32_UPDATE_TA_RELA", /* name */
1536 FALSE, /* partial_inplace */
1537 0xffff, /* src_mask */
1538 0xffff, /* dst_mask */
1539 FALSE), /* pcrel_offset */
1540 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1541 entry for the symbol. */
1542 HOWTO (R_NDS32_9_PLTREL, /* type */
1543 1, /* rightshift */
1544 1, /* size (0 = byte, 1 = short, 2 = long) */
1545 8, /* bitsize */
1546 TRUE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_signed, /* complain_on_overflow */
1549 bfd_elf_generic_reloc, /* special_function */
1550 "R_NDS32_9_PLTREL", /* name */
1551 FALSE, /* partial_inplace */
1552 0xff, /* src_mask */
1553 0xff, /* dst_mask */
1554 TRUE), /* pcrel_offset */
1555 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1556 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 20, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_dont,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_NDS32_PLT_GOTREL_LO20", /* name */
1565 FALSE, /* partial_inplace */
1566 0x000fffff, /* src_mask */
1567 0x000fffff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1570 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 15, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_dont,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_NDS32_PLT_GOTREL_LO15", /* name */
1579 FALSE, /* partial_inplace */
1580 0x00007fff, /* src_mask */
1581 0x00007fff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1584 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 19, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_dont,/* complain_on_overflow */
1591 bfd_elf_generic_reloc, /* special_function */
1592 "R_NDS32_PLT_GOTREL_LO19", /* name */
1593 FALSE, /* partial_inplace */
1594 0x0007ffff, /* src_mask */
1595 0x0007ffff, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597 HOWTO (R_NDS32_GOT_LO15, /* type */
1598 0, /* rightshift */
1599 2, /* size (0 = byte, 1 = short, 2 = long) */
1600 15, /* bitsize */
1601 FALSE, /* pc_relative */
1602 0, /* bitpos */
1603 complain_overflow_dont,/* complain_on_overflow */
1604 bfd_elf_generic_reloc, /* special_function */
1605 "R_NDS32_GOT_LO15", /* name */
1606 FALSE, /* partial_inplace */
1607 0x00007fff, /* src_mask */
1608 0x00007fff, /* dst_mask */
1609 FALSE), /* pcrel_offset */
1610 HOWTO (R_NDS32_GOT_LO19, /* type */
1611 0, /* rightshift */
1612 2, /* size (0 = byte, 1 = short, 2 = long) */
1613 19, /* bitsize */
1614 FALSE, /* pc_relative */
1615 0, /* bitpos */
1616 complain_overflow_dont,/* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 "R_NDS32_GOT_LO19", /* name */
1619 FALSE, /* partial_inplace */
1620 0x0007ffff, /* src_mask */
1621 0x0007ffff, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1624 0, /* rightshift */
1625 2, /* size (0 = byte, 1 = short, 2 = long) */
1626 15, /* bitsize */
1627 FALSE, /* pc_relative */
1628 0, /* bitpos */
1629 complain_overflow_dont,/* complain_on_overflow */
1630 bfd_elf_generic_reloc, /* special_function */
1631 "R_NDS32_GOTOFF_LO15", /* name */
1632 FALSE, /* partial_inplace */
1633 0x00007fff, /* src_mask */
1634 0x00007fff, /* dst_mask */
1635 FALSE), /* pcrel_offset */
1636 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1637 0, /* rightshift */
1638 2, /* size (0 = byte, 1 = short, 2 = long) */
1639 19, /* bitsize */
1640 FALSE, /* pc_relative */
1641 0, /* bitpos */
1642 complain_overflow_dont,/* complain_on_overflow */
1643 bfd_elf_generic_reloc, /* special_function */
1644 "R_NDS32_GOTOFF_LO19", /* name */
1645 FALSE, /* partial_inplace */
1646 0x0007ffff, /* src_mask */
1647 0x0007ffff, /* dst_mask */
1648 FALSE), /* pcrel_offset */
1649 /* GOT 15 bits offset. */
1650 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1651 2, /* rightshift */
1652 2, /* size (0 = byte, 1 = short, 2 = long) */
1653 15, /* bitsize */
1654 FALSE, /* pc_relative */
1655 0, /* bitpos */
1656 complain_overflow_signed, /* complain_on_overflow */
1657 bfd_elf_generic_reloc, /* special_function */
1658 "R_NDS32_GOT15S2_RELA",/* name */
1659 FALSE, /* partial_inplace */
1660 0x00007fff, /* src_mask */
1661 0x00007fff, /* dst_mask */
1662 FALSE), /* pcrel_offset */
1663 /* GOT 17 bits offset. */
1664 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1665 2, /* rightshift */
1666 2, /* size (0 = byte, 1 = short, 2 = long) */
1667 17, /* bitsize */
1668 FALSE, /* pc_relative */
1669 0, /* bitpos */
1670 complain_overflow_signed, /* complain_on_overflow */
1671 bfd_elf_generic_reloc, /* special_function */
1672 "R_NDS32_GOT17S2_RELA",/* name */
1673 FALSE, /* partial_inplace */
1674 0x0001ffff, /* src_mask */
1675 0x0001ffff, /* dst_mask */
1676 FALSE), /* pcrel_offset */
1677 /* A 5 bit address. */
1678 HOWTO (R_NDS32_5_RELA, /* type */
1679 0, /* rightshift */
1680 1, /* size (0 = byte, 1 = short, 2 = long) */
1681 5, /* bitsize */
1682 FALSE, /* pc_relative */
1683 0, /* bitpos */
1684 complain_overflow_signed, /* complain_on_overflow */
1685 bfd_elf_generic_reloc, /* special_function */
1686 "R_NDS32_5_RELA", /* name */
1687 FALSE, /* partial_inplace */
1688 0x1f, /* src_mask */
1689 0x1f, /* dst_mask */
1690 FALSE), /* pcrel_offset */
1691 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1692 1, /* rightshift */
1693 1, /* size (0 = byte, 1 = short, 2 = long) */
1694 9, /* bitsize */
1695 TRUE, /* pc_relative */
1696 0, /* bitpos */
1697 complain_overflow_unsigned, /* complain_on_overflow */
1698 bfd_elf_generic_reloc, /* special_function */
1699 "R_NDS32_10_UPCREL_RELA", /* name */
1700 FALSE, /* partial_inplace */
1701 0x1ff, /* src_mask */
1702 0x1ff, /* dst_mask */
1703 TRUE), /* pcrel_offset */
1704 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1705 2, /* rightshift */
1706 1, /* size (0 = byte, 1 = short, 2 = long) */
1707 7, /* bitsize */
1708 FALSE, /* pc_relative */
1709 0, /* bitpos */
1710 complain_overflow_unsigned, /* complain_on_overflow */
1711 bfd_elf_generic_reloc, /* special_function */
1712 "R_NDS32_SDA_FP7U2_RELA", /* name */
1713 FALSE, /* partial_inplace */
1714 0x0000007f, /* src_mask */
1715 0x0000007f, /* dst_mask */
1716 FALSE), /* pcrel_offset */
1717 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1718 1, /* rightshift */
1719 2, /* size (0 = byte, 1 = short, 2 = long) */
1720 8, /* bitsize */
1721 TRUE, /* pc_relative */
1722 0, /* bitpos */
1723 complain_overflow_signed, /* complain_on_overflow */
1724 bfd_elf_generic_reloc, /* special_function */
1725 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1726 FALSE, /* partial_inplace */
1727 0xff, /* src_mask */
1728 0xff, /* dst_mask */
1729 TRUE), /* pcrel_offset */
1730 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1731 1, /* rightshift */
1732 2, /* size (0 = byte, 1 = short, 2 = long) */
1733 24, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_dont,/* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 "R_NDS32_25_ABS_RELA", /* name */
1739 FALSE, /* partial_inplace */
1740 0xffffff, /* src_mask */
1741 0xffffff, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1745 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1746 1, /* rightshift */
1747 2, /* size (0 = byte, 1 = short, 2 = long) */
1748 16, /* bitsize */
1749 TRUE, /* pc_relative */
1750 0, /* bitpos */
1751 complain_overflow_signed, /* complain_on_overflow */
1752 bfd_elf_generic_reloc, /* special_function */
1753 "R_NDS32_17IFC_PCREL_RELA", /* name */
1754 FALSE, /* partial_inplace */
1755 0xffff, /* src_mask */
1756 0xffff, /* dst_mask */
1757 TRUE), /* pcrel_offset */
1758
1759 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1760 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1761 1, /* rightshift */
1762 1, /* size (0 = byte, 1 = short, 2 = long) */
1763 9, /* bitsize */
1764 TRUE, /* pc_relative */
1765 0, /* bitpos */
1766 complain_overflow_unsigned, /* complain_on_overflow */
1767 bfd_elf_generic_reloc, /* special_function */
1768 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1769 FALSE, /* partial_inplace */
1770 0x1ff, /* src_mask */
1771 0x1ff, /* dst_mask */
1772 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1773
1774 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1775 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1776 12, /* rightshift */
1777 2, /* size (0 = byte, 1 = short, 2 = long) */
1778 20, /* bitsize */
1779 FALSE, /* pc_relative */
1780 0, /* bitpos */
1781 complain_overflow_dont, /* complain_on_overflow */
1782 bfd_elf_generic_reloc, /* special_function */
1783 "R_NDS32_TLS_LE_HI20", /* name */
1784 FALSE, /* partial_inplace */
1785 0x000fffff, /* src_mask */
1786 0x000fffff, /* dst_mask */
1787 FALSE), /* pcrel_offset */
1788 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1789 0, /* rightshift */
1790 2, /* size (0 = byte, 1 = short, 2 = long) */
1791 12, /* bitsize */
1792 FALSE, /* pc_relative */
1793 0, /* bitpos */
1794 complain_overflow_dont, /* complain_on_overflow */
1795 bfd_elf_generic_reloc, /* special_function */
1796 "R_NDS32_TLS_LE_LO12", /* name */
1797 FALSE, /* partial_inplace */
1798 0x00000fff, /* src_mask */
1799 0x00000fff, /* dst_mask */
1800 FALSE), /* pcrel_offset */
1801
1802 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1803 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1804 12, /* rightshift */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1806 20, /* bitsize */
1807 FALSE, /* pc_relative */
1808 0, /* bitpos */
1809 complain_overflow_dont, /* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_NDS32_TLS_IE_HI20", /* name */
1812 FALSE, /* partial_inplace */
1813 0x000fffff, /* src_mask */
1814 0x000fffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1817 2, /* rightshift */
1818 2, /* size (0 = byte, 1 = short, 2 = long) */
1819 10, /* bitsize */
1820 FALSE, /* pc_relative */
1821 0, /* bitpos */
1822 complain_overflow_dont, /* complain_on_overflow */
1823 bfd_elf_generic_reloc, /* special_function */
1824 "R_NDS32_TLS_IE_LO12S2", /* name */
1825 FALSE, /* partial_inplace */
1826 0x000003ff, /* src_mask */
1827 0x000003ff, /* dst_mask */
1828 FALSE), /* pcrel_offset */
1829 /* Mark a TLS IE entry in GOT. */
1830 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1831 0, /* rightshift */
1832 2, /* size (0 = byte, 1 = short, 2 = long) */
1833 32, /* bitsize */
1834 FALSE, /* pc_relative */
1835 0, /* bitpos */
1836 complain_overflow_bitfield, /* complain_on_overflow */
1837 bfd_elf_generic_reloc, /* special_function */
1838 "R_NDS32_TLS_TPOFF", /* name */
1839 FALSE, /* partial_inplace */
1840 0xffffffff, /* src_mask */
1841 0xffffffff, /* dst_mask */
1842 FALSE), /* pcrel_offset */
1843 /* A 20 bit address. */
1844 HOWTO (R_NDS32_TLS_LE_20, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 20, /* bitsize */
1848 FALSE, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_signed, /* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_NDS32_TLS_LE_20", /* name */
1853 FALSE, /* partial_inplace */
1854 0xfffff, /* src_mask */
1855 0xfffff, /* dst_mask */
1856 FALSE), /* pcrel_offset */
1857 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 15, /* bitsize */
1861 FALSE, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_signed, /* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_NDS32_TLS_LE_15S0", /* name */
1866 FALSE, /* partial_inplace */
1867 0x7fff, /* src_mask */
1868 0x7fff, /* dst_mask */
1869 FALSE), /* pcrel_offset */
1870 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1871 1, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 15, /* bitsize */
1874 FALSE, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_signed, /* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_NDS32_TLS_LE_15S1", /* name */
1879 FALSE, /* partial_inplace */
1880 0x7fff, /* src_mask */
1881 0x7fff, /* dst_mask */
1882 FALSE), /* pcrel_offset */
1883 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1884 2, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 15, /* bitsize */
1887 FALSE, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_signed, /* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_NDS32_TLS_LE_15S2", /* name */
1892 FALSE, /* partial_inplace */
1893 0x7fff, /* src_mask */
1894 0x7fff, /* dst_mask */
1895 FALSE), /* pcrel_offset */
1896
1897 /* Relax hint for unconditional call sequence */
1898 HOWTO (R_NDS32_LONGCALL4, /* type */
1899 0, /* rightshift */
1900 2, /* size (0 = byte, 1 = short, 2 = long) */
1901 32, /* bitsize */
1902 FALSE, /* pc_relative */
1903 0, /* bitpos */
1904 complain_overflow_dont, /* complain_on_overflow */
1905 nds32_elf_ignore_reloc, /* special_function */
1906 "R_NDS32_LONGCALL4", /* name */
1907 FALSE, /* partial_inplace */
1908 0xffffffff, /* src_mask */
1909 0xffffffff, /* dst_mask */
1910 FALSE), /* pcrel_offset */
1911
1912 /* Relax hint for conditional call sequence. */
1913 HOWTO (R_NDS32_LONGCALL5, /* type */
1914 0, /* rightshift */
1915 2, /* size (0 = byte, 1 = short, 2 = long) */
1916 32, /* bitsize */
1917 FALSE, /* pc_relative */
1918 0, /* bitpos */
1919 complain_overflow_dont, /* complain_on_overflow */
1920 nds32_elf_ignore_reloc, /* special_function */
1921 "R_NDS32_LONGCALL5", /* name */
1922 FALSE, /* partial_inplace */
1923 0xffffffff, /* src_mask */
1924 0xffffffff, /* dst_mask */
1925 FALSE), /* pcrel_offset */
1926
1927 /* Relax hint for conditional call sequence. */
1928 HOWTO (R_NDS32_LONGCALL6, /* type */
1929 0, /* rightshift */
1930 2, /* size (0 = byte, 1 = short, 2 = long) */
1931 32, /* bitsize */
1932 FALSE, /* pc_relative */
1933 0, /* bitpos */
1934 complain_overflow_dont, /* complain_on_overflow */
1935 nds32_elf_ignore_reloc, /* special_function */
1936 "R_NDS32_LONGCALL6", /* name */
1937 FALSE, /* partial_inplace */
1938 0xffffffff, /* src_mask */
1939 0xffffffff, /* dst_mask */
1940 FALSE), /* pcrel_offset */
1941
1942 /* Relax hint for unconditional branch sequence. */
1943 HOWTO (R_NDS32_LONGJUMP4, /* type */
1944 0, /* rightshift */
1945 2, /* size (0 = byte, 1 = short, 2 = long) */
1946 32, /* bitsize */
1947 FALSE, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont, /* complain_on_overflow */
1950 nds32_elf_ignore_reloc, /* special_function */
1951 "R_NDS32_LONGJUMP4", /* name */
1952 FALSE, /* partial_inplace */
1953 0xffffffff, /* src_mask */
1954 0xffffffff, /* dst_mask */
1955 FALSE), /* pcrel_offset */
1956
1957 /* Relax hint for conditional branch sequence. */
1958 HOWTO (R_NDS32_LONGJUMP5, /* type */
1959 0, /* rightshift */
1960 2, /* size (0 = byte, 1 = short, 2 = long) */
1961 32, /* bitsize */
1962 FALSE, /* pc_relative */
1963 0, /* bitpos */
1964 complain_overflow_dont, /* complain_on_overflow */
1965 nds32_elf_ignore_reloc, /* special_function */
1966 "R_NDS32_LONGJUMP5", /* name */
1967 FALSE, /* partial_inplace */
1968 0xffffffff, /* src_mask */
1969 0xffffffff, /* dst_mask */
1970 FALSE), /* pcrel_offset */
1971
1972 /* Relax hint for conditional branch sequence. */
1973 HOWTO (R_NDS32_LONGJUMP6, /* type */
1974 0, /* rightshift */
1975 2, /* size (0 = byte, 1 = short, 2 = long) */
1976 32, /* bitsize */
1977 FALSE, /* pc_relative */
1978 0, /* bitpos */
1979 complain_overflow_dont, /* complain_on_overflow */
1980 nds32_elf_ignore_reloc, /* special_function */
1981 "R_NDS32_LONGJUMP6", /* name */
1982 FALSE, /* partial_inplace */
1983 0xffffffff, /* src_mask */
1984 0xffffffff, /* dst_mask */
1985 FALSE), /* pcrel_offset */
1986
1987 /* Relax hint for conditional branch sequence. */
1988 HOWTO (R_NDS32_LONGJUMP7, /* type */
1989 0, /* rightshift */
1990 2, /* size (0 = byte, 1 = short, 2 = long) */
1991 32, /* bitsize */
1992 FALSE, /* pc_relative */
1993 0, /* bitpos */
1994 complain_overflow_dont, /* complain_on_overflow */
1995 nds32_elf_ignore_reloc, /* special_function */
1996 "R_NDS32_LONGJUMP7", /* name */
1997 FALSE, /* partial_inplace */
1998 0xffffffff, /* src_mask */
1999 0xffffffff, /* dst_mask */
2000 FALSE), /* pcrel_offset */
35c08157
KLC		 2001};
2002
2003/* Relocations used for relaxation. */
2004static reloc_howto_type nds32_elf_relax_howto_table[] =
2005{
2006 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2007 0, /* rightshift */
2008 2, /* size (0 = byte, 1 = short, 2 = long) */
2009 32, /* bitsize */
2010 FALSE, /* pc_relative */
2011 0, /* bitpos */
2012 complain_overflow_dont,/* complain_on_overflow */
2013 nds32_elf_ignore_reloc,/* special_function */
2014 "R_NDS32_RELAX_ENTRY", /* name */
2015 FALSE, /* partial_inplace */
2016 0xffffffff, /* src_mask */
2017 0xffffffff, /* dst_mask */
2018 FALSE), /* pcrel_offset */
2019 HOWTO (R_NDS32_GOT_SUFF, /* type */
2020 0, /* rightshift */
2021 2, /* size (0 = byte, 1 = short, 2 = long) */
2022 32, /* bitsize */
2023 FALSE, /* pc_relative */
2024 0, /* bitpos */
2025 complain_overflow_dont,/* complain_on_overflow */
2026 nds32_elf_ignore_reloc,/* special_function */
2027 "R_NDS32_GOT_SUFF", /* name */
2028 FALSE, /* partial_inplace */
2029 0xffffffff, /* src_mask */
2030 0xffffffff, /* dst_mask */
2031 FALSE), /* pcrel_offset */
2032 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2033 0, /* rightshift */
2034 2, /* size (0 = byte, 1 = short, 2 = long) */
2035 32, /* bitsize */
2036 FALSE, /* pc_relative */
2037 0, /* bitpos */
2038 complain_overflow_bitfield, /* complain_on_overflow */
2039 nds32_elf_ignore_reloc,/* special_function */
2040 "R_NDS32_GOTOFF_SUFF", /* name */
2041 FALSE, /* partial_inplace */
2042 0xffffffff, /* src_mask */
2043 0xffffffff, /* dst_mask */
2044 FALSE), /* pcrel_offset */
2045 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2046 0, /* rightshift */
2047 2, /* size (0 = byte, 1 = short, 2 = long) */
2048 32, /* bitsize */
2049 FALSE, /* pc_relative */
2050 0, /* bitpos */
2051 complain_overflow_dont,/* complain_on_overflow */
2052 nds32_elf_ignore_reloc,/* special_function */
2053 "R_NDS32_PLT_GOT_SUFF",/* name */
2054 FALSE, /* partial_inplace */
2055 0xffffffff, /* src_mask */
2056 0xffffffff, /* dst_mask */
2057 FALSE), /* pcrel_offset */
2058 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2059 0, /* rightshift */
2060 2, /* size (0 = byte, 1 = short, 2 = long) */
2061 32, /* bitsize */
2062 FALSE, /* pc_relative */
2063 0, /* bitpos */
2064 complain_overflow_dont,/* complain_on_overflow */
2065 nds32_elf_ignore_reloc,/* special_function */
2066 "R_NDS32_MULCALL_SUFF",/* name */
2067 FALSE, /* partial_inplace */
2068 0xffffffff, /* src_mask */
2069 0xffffffff, /* dst_mask */
2070 FALSE), /* pcrel_offset */
2071 HOWTO (R_NDS32_PTR, /* type */
2072 0, /* rightshift */
2073 2, /* size (0 = byte, 1 = short, 2 = long) */
2074 32, /* bitsize */
2075 FALSE, /* pc_relative */
2076 0, /* bitpos */
2077 complain_overflow_dont,/* complain_on_overflow */
2078 nds32_elf_ignore_reloc,/* special_function */
2079 "R_NDS32_PTR", /* name */
2080 FALSE, /* partial_inplace */
2081 0xffffffff, /* src_mask */
2082 0xffffffff, /* dst_mask */
2083 FALSE), /* pcrel_offset */
2084 HOWTO (R_NDS32_PTR_COUNT, /* type */
2085 0, /* rightshift */
2086 2, /* size (0 = byte, 1 = short, 2 = long) */
2087 32, /* bitsize */
2088 FALSE, /* pc_relative */
2089 0, /* bitpos */
2090 complain_overflow_dont,/* complain_on_overflow */
2091 nds32_elf_ignore_reloc,/* special_function */
2092 "R_NDS32_PTR_COUNT", /* name */
2093 FALSE, /* partial_inplace */
2094 0xffffffff, /* src_mask */
2095 0xffffffff, /* dst_mask */
2096 FALSE), /* pcrel_offset */
2097 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2098 0, /* rightshift */
2099 2, /* size (0 = byte, 1 = short, 2 = long) */
2100 32, /* bitsize */
2101 FALSE, /* pc_relative */
2102 0, /* bitpos */
2103 complain_overflow_dont,/* complain_on_overflow */
2104 nds32_elf_ignore_reloc,/* special_function */
2105 "R_NDS32_PTR_RESOLVED",/* name */
2106 FALSE, /* partial_inplace */
2107 0xffffffff, /* src_mask */
2108 0xffffffff, /* dst_mask */
2109 FALSE), /* pcrel_offset */
2110 HOWTO (R_NDS32_PLTBLOCK, /* type */
2111 0, /* rightshift */
2112 2, /* size (0 = byte, 1 = short, 2 = long) */
2113 32, /* bitsize */
2114 FALSE, /* pc_relative */
2115 0, /* bitpos */
2116 complain_overflow_dont,/* complain_on_overflow */
2117 nds32_elf_ignore_reloc,/* special_function */
2118 "R_NDS32_PLTBLOCK", /* name */
2119 FALSE, /* partial_inplace */
2120 0xffffffff, /* src_mask */
2121 0xffffffff, /* dst_mask */
2122 FALSE), /* pcrel_offset */
2123 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2124 0, /* rightshift */
2125 2, /* size (0 = byte, 1 = short, 2 = long) */
2126 32, /* bitsize */
2127 FALSE, /* pc_relative */
2128 0, /* bitpos */
2129 complain_overflow_dont,/* complain_on_overflow */
2130 nds32_elf_ignore_reloc,/* special_function */
2131 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2132 FALSE, /* partial_inplace */
2133 0xffffffff, /* src_mask */
2134 0xffffffff, /* dst_mask */
2135 FALSE), /* pcrel_offset */
2136 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2137 0, /* rightshift */
2138 2, /* size (0 = byte, 1 = short, 2 = long) */
2139 32, /* bitsize */
2140 FALSE, /* pc_relative */
2141 0, /* bitpos */
2142 complain_overflow_dont,/* complain_on_overflow */
2143 nds32_elf_ignore_reloc,/* special_function */
2144 "R_NDS32_RELAX_REGION_END", /* name */
2145 FALSE, /* partial_inplace */
2146 0xffffffff, /* src_mask */
2147 0xffffffff, /* dst_mask */
2148 FALSE), /* pcrel_offset */
2149 HOWTO (R_NDS32_MINUEND, /* type */
2150 0, /* rightshift */
2151 2, /* size (0 = byte, 1 = short, 2 = long) */
2152 32, /* bitsize */
2153 FALSE, /* pc_relative */
2154 0, /* bitpos */
2155 complain_overflow_dont,/* complain_on_overflow */
2156 nds32_elf_ignore_reloc,/* special_function */
2157 "R_NDS32_MINUEND", /* name */
2158 FALSE, /* partial_inplace */
2159 0xffffffff, /* src_mask */
2160 0xffffffff, /* dst_mask */
2161 FALSE), /* pcrel_offset */
2162 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2163 0, /* rightshift */
2164 2, /* size (0 = byte, 1 = short, 2 = long) */
2165 32, /* bitsize */
2166 FALSE, /* pc_relative */
2167 0, /* bitpos */
2168 complain_overflow_dont,/* complain_on_overflow */
2169 nds32_elf_ignore_reloc,/* special_function */
2170 "R_NDS32_SUBTRAHEND", /* name */
2171 FALSE, /* partial_inplace */
2172 0xffffffff, /* src_mask */
2173 0xffffffff, /* dst_mask */
2174 FALSE), /* pcrel_offset */
2175 HOWTO (R_NDS32_DIFF8, /* type */
2176 0, /* rightshift */
2177 0, /* size (0 = byte, 1 = short, 2 = long) */
2178 8, /* bitsize */
2179 FALSE, /* pc_relative */
2180 0, /* bitpos */
2181 complain_overflow_dont,/* complain_on_overflow */
2182 nds32_elf_ignore_reloc,/* special_function */
2183 "R_NDS32_DIFF8", /* name */
2184 FALSE, /* partial_inplace */
2185 0x000000ff, /* src_mask */
2186 0x000000ff, /* dst_mask */
2187 FALSE), /* pcrel_offset */
2188 HOWTO (R_NDS32_DIFF16, /* type */
2189 0, /* rightshift */
2190 1, /* size (0 = byte, 1 = short, 2 = long) */
2191 16, /* bitsize */
2192 FALSE, /* pc_relative */
2193 0, /* bitpos */
2194 complain_overflow_dont,/* complain_on_overflow */
2195 nds32_elf_ignore_reloc,/* special_function */
2196 "R_NDS32_DIFF16", /* name */
2197 FALSE, /* partial_inplace */
2198 0x0000ffff, /* src_mask */
2199 0x0000ffff, /* dst_mask */
2200 FALSE), /* pcrel_offset */
2201 HOWTO (R_NDS32_DIFF32, /* type */
2202 0, /* rightshift */
2203 2, /* size (0 = byte, 1 = short, 2 = long) */
2204 32, /* bitsize */
2205 FALSE, /* pc_relative */
2206 0, /* bitpos */
2207 complain_overflow_dont,/* complain_on_overflow */
2208 nds32_elf_ignore_reloc,/* special_function */
2209 "R_NDS32_DIFF32", /* name */
2210 FALSE, /* partial_inplace */
2211 0xffffffff, /* src_mask */
2212 0xffffffff, /* dst_mask */
2213 FALSE), /* pcrel_offset */
2214 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2215 0, /* rightshift */
2216 0, /* size (0 = byte, 1 = short, 2 = long) */
2217 0, /* bitsize */
2218 FALSE, /* pc_relative */
2219 0, /* bitpos */
2220 complain_overflow_dont,/* complain_on_overflow */
2221 nds32_elf_ignore_reloc,/* special_function */
2222 "R_NDS32_DIFF_ULEB128",/* name */
2223 FALSE, /* partial_inplace */
2224 0xffffffff, /* src_mask */
2225 0xffffffff, /* dst_mask */
2226 FALSE), /* pcrel_offset */
2227 HOWTO (R_NDS32_DATA, /* type */
2228 0, /* rightshift */
2229 2, /* size (0 = byte, 1 = short, 2 = long) */
2230 32, /* bitsize */
2231 FALSE, /* pc_relative */
2232 0, /* bitpos */
2233 complain_overflow_dont,/* complain_on_overflow */
2234 nds32_elf_ignore_reloc,/* special_function */
2235 "R_NDS32_DATA", /* name */
2236 FALSE, /* partial_inplace */
2237 0xffffffff, /* src_mask */
2238 0xffffffff, /* dst_mask */
2239 FALSE), /* pcrel_offset */
2240 HOWTO (R_NDS32_TRAN, /* type */
2241 0, /* rightshift */
2242 2, /* size (0 = byte, 1 = short, 2 = long) */
2243 32, /* bitsize */
2244 FALSE, /* pc_relative */
2245 0, /* bitpos */
2246 complain_overflow_dont,/* complain_on_overflow */
2247 nds32_elf_ignore_reloc,/* special_function */
2248 "R_NDS32_TRAN", /* name */
2249 FALSE, /* partial_inplace */
2250 0xffffffff, /* src_mask */
2251 0xffffffff, /* dst_mask */
2252 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2253 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2254 0, /* rightshift */
2255 2, /* size (0 = byte, 1 = short, 2 = long) */
2256 32, /* bitsize */
2257 FALSE, /* pc_relative */
2258 0, /* bitpos */
2259 complain_overflow_dont, /* complain_on_overflow */
2260 nds32_elf_ignore_reloc, /* special_function */
2261 "R_NDS32_TLS_LE_ADD", /* name */
2262 FALSE, /* partial_inplace */
2263 0xffffffff, /* src_mask */
2264 0xffffffff, /* dst_mask */
2265 FALSE), /* pcrel_offset */
2266 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2267 0, /* rightshift */
2268 2, /* size (0 = byte, 1 = short, 2 = long) */
2269 32, /* bitsize */
2270 FALSE, /* pc_relative */
2271 0, /* bitpos */
2272 complain_overflow_dont, /* complain_on_overflow */
2273 nds32_elf_ignore_reloc, /* special_function */
2274 "R_NDS32_TLS_LE_LS", /* name */
2275 FALSE, /* partial_inplace */
2276 0xffffffff, /* src_mask */
2277 0xffffffff, /* dst_mask */
2278 FALSE), /* pcrel_offset */
2279 HOWTO (R_NDS32_EMPTY, /* type */
2280 0, /* rightshift */
2281 2, /* size (0 = byte, 1 = short, 2 = long) */
2282 32, /* bitsize */
2283 FALSE, /* pc_relative */
2284 0, /* bitpos */
2285 complain_overflow_dont, /* complain_on_overflow */
2286 nds32_elf_ignore_reloc, /* special_function */
2287 "R_NDS32_EMPTY", /* name */
2288 FALSE, /* partial_inplace */
2289 0xffffffff, /* src_mask */
2290 0xffffffff, /* dst_mask */
2291 FALSE), /* pcrel_offset */
35c08157
KLC		 2292};
2293
2294\f
2295/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2296 This prototype is the same as qsort (). */
2297
2298void
2299nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2300 int (*compar) (const void *lhs, const void *rhs))
2301{
2302 char *ptr = (char *) base;
1c8f6a4d 2303 int i, j;
e1fa0163 2304 char *tmp = xmalloc (size);
35c08157
KLC		 2305
2306 /* If i is less than j, i is inserted before j.
2307
2308 |---- j ----- i --------------|
2309 \ / \ /
2310 sorted unsorted
2311 */
2312
1c8f6a4d 2313 for (i = 1; i < (int) nmemb; i++)
35c08157 2314 {
1c8f6a4d
KLC		 2315 for (j = (i - 1); j >= 0; j--)
2316 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2317 break;
2318
1c8f6a4d
KLC		 2319 j++;
2320
35c08157 2321 if (i == j)
1c8f6a4d 2322 continue; /* i is in order. */
35c08157
KLC		 2323
2324 memcpy (tmp, ptr + i * size, size);
2325 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2326 memcpy (ptr + j * size, tmp, size);
2327 }
e1fa0163 2328 free (tmp);
35c08157
KLC		 2329}
2330
2331/* Sort relocation by r_offset.
2332
2333 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2334 algorithm. Relocations at the same r_offset must keep their order.
2335 For example, RELAX_ENTRY must be the very first relocation entry.
2336
2337 Currently, this function implements insertion-sort.
2338
2339 FIXME: If we already sort them in assembler, why bother sort them
2340 here again? */
2341
2342static int
2343compar_reloc (const void *lhs, const void *rhs)
2344{
2345 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2346 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2347
2348 if (l->r_offset > r->r_offset)
2349 return 1;
2350 else if (l->r_offset == r->r_offset)
2351 return 0;
2352 else
2353 return -1;
2354}
2355
2356/* Functions listed below are only used for old relocs.
2357 * nds32_elf_9_pcrel_reloc
2358 * nds32_elf_do_9_pcrel_reloc
2359 * nds32_elf_hi20_reloc
2360 * nds32_elf_relocate_hi20
2361 * nds32_elf_lo12_reloc
2362 * nds32_elf_sda15_reloc
2363 * nds32_elf_generic_reloc
2364 */
2365
2366/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2367
2368static bfd_reloc_status_type
2369nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2370 void *data, asection *input_section, bfd *output_bfd,
2371 char **error_message ATTRIBUTE_UNUSED)
2372{
2373 /* This part is from bfd_elf_generic_reloc. */
2374 if (output_bfd != (bfd *) NULL
2375 && (symbol->flags & BSF_SECTION_SYM) == 0
2376 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2377 {
2378 reloc_entry->address += input_section->output_offset;
2379 return bfd_reloc_ok;
2380 }
2381
2382 if (output_bfd != NULL)
2383 {
2384 /* FIXME: See bfd_perform_relocation. Is this right? */
2385 return bfd_reloc_continue;
2386 }
2387
2388 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2389 input_section,
2390 data, reloc_entry->address,
2391 symbol->section,
2392 (symbol->value
2393 + symbol->section->output_section->vma
2394 + symbol->section->output_offset),
2395 reloc_entry->addend);
2396}
2397
2398/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2399#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2400
2401static bfd_reloc_status_type
2402nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2403 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2404 bfd_vma offset,
2405 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2406 bfd_vma symbol_value, bfd_vma addend)
2407{
2408 bfd_signed_vma relocation;
2409 unsigned short x;
2410 bfd_reloc_status_type status;
2411
2412 /* Sanity check the address (offset in section). */
2413 if (offset > bfd_get_section_limit (abfd, input_section))
2414 return bfd_reloc_outofrange;
2415
2416 relocation = symbol_value + addend;
2417 /* Make it pc relative. */
2418 relocation -= (input_section->output_section->vma
2419 + input_section->output_offset);
2420 /* These jumps mask off the lower two bits of the current address
2421 before doing pcrel calculations. */
2422 relocation -= (offset & -(bfd_vma) 2);
2423
1c8f6a4d 2424 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2425 status = bfd_reloc_overflow;
2426 else
2427 status = bfd_reloc_ok;
2428
2429 x = bfd_getb16 (data + offset);
2430
2431 relocation >>= howto->rightshift;
2432 relocation <<= howto->bitpos;
2433 x = (x & ~howto->dst_mask)
2434 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2435
2436 bfd_putb16 ((bfd_vma) x, data + offset);
2437
2438 return status;
2439}
2440
2441/* Handle the R_NDS32_HI20_[SU]LO relocs.
2442 HI20_SLO is for the add3 and load/store with displacement instructions.
2443 HI20 is for the or3 instruction.
2444 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2445 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2446 we must add one to the high 16 bytes (which will get subtracted off when
2447 the low 16 bits are added).
2448 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2449 because there is a carry from the LO12 to the HI20. Here we just save
2450 the information we need; we do the actual relocation when we see the LO12.
2451 This code is copied from the elf32-mips.c. We also support an arbitrary
2452 number of HI20 relocs to be associated with a single LO12 reloc. The
2453 assembler sorts the relocs to ensure each HI20 immediately precedes its
2454 LO12. However if there are multiple copies, the assembler may not find
2455 the real LO12 so it picks the first one it finds. */
2456
2457struct nds32_hi20
2458{
2459 struct nds32_hi20 *next;
2460 bfd_byte *addr;
2461 bfd_vma addend;
2462};
2463
2464static struct nds32_hi20 *nds32_hi20_list;
2465
2466static bfd_reloc_status_type
2467nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2468 asymbol *symbol, void *data, asection *input_section,
2469 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2470{
2471 bfd_reloc_status_type ret;
2472 bfd_vma relocation;
2473 struct nds32_hi20 *n;
2474
2475 /* This part is from bfd_elf_generic_reloc.
2476 If we're relocating, and this an external symbol, we don't want
2477 to change anything. */
2478 if (output_bfd != (bfd *) NULL
2479 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2480 {
2481 reloc_entry->address += input_section->output_offset;
2482 return bfd_reloc_ok;
2483 }
2484
2485 /* Sanity check the address (offset in section). */
2486 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2487 return bfd_reloc_outofrange;
2488
2489 ret = bfd_reloc_ok;
2490 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2491 ret = bfd_reloc_undefined;
2492
2493 if (bfd_is_com_section (symbol->section))
2494 relocation = 0;
2495 else
2496 relocation = symbol->value;
2497
2498 relocation += symbol->section->output_section->vma;
2499 relocation += symbol->section->output_offset;
2500 relocation += reloc_entry->addend;
2501
2502 /* Save the information, and let LO12 do the actual relocation. */
2503 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2504 if (n == NULL)
2505 return bfd_reloc_outofrange;
2506
2507 n->addr = (bfd_byte *) data + reloc_entry->address;
2508 n->addend = relocation;
2509 n->next = nds32_hi20_list;
2510 nds32_hi20_list = n;
2511
2512 if (output_bfd != (bfd *) NULL)
2513 reloc_entry->address += input_section->output_offset;
2514
2515 return ret;
2516}
2517
2518/* Handle an NDS32 ELF HI20 reloc. */
2519
2520static void
2521nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2522 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2523 Elf_Internal_Rela *rello, bfd_byte *contents,
2524 bfd_vma addend)
2525{
2526 unsigned long insn;
2527 bfd_vma addlo;
2528
2529 insn = bfd_getb32 (contents + relhi->r_offset);
2530
2531 addlo = bfd_getb32 (contents + rello->r_offset);
2532 addlo &= 0xfff;
2533
2534 addend += ((insn & 0xfffff) << 20) + addlo;
2535
2536 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2537 bfd_putb32 (insn, contents + relhi->r_offset);
2538}
2539
2540/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2541 inplace relocation; this function exists in order to do the
2542 R_NDS32_HI20_[SU]LO relocation described above. */
2543
2544static bfd_reloc_status_type
2545nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2546 void *data, asection *input_section, bfd *output_bfd,
2547 char **error_message)
2548{
2549 /* This part is from bfd_elf_generic_reloc.
2550 If we're relocating, and this an external symbol, we don't want
2551 to change anything. */
2552 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2553 && reloc_entry->addend == 0)
2554 {
2555 reloc_entry->address += input_section->output_offset;
2556 return bfd_reloc_ok;
2557 }
2558
2559 if (nds32_hi20_list != NULL)
2560 {
2561 struct nds32_hi20 *l;
2562
2563 l = nds32_hi20_list;
2564 while (l != NULL)
2565 {
2566 unsigned long insn;
2567 unsigned long val;
2568 unsigned long vallo;
2569 struct nds32_hi20 *next;
2570
2571 /* Do the HI20 relocation. Note that we actually don't need
2572 to know anything about the LO12 itself, except where to
2573 find the low 12 bits of the addend needed by the LO12. */
2574 insn = bfd_getb32 (l->addr);
2575 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2576 vallo &= 0xfff;
2577 switch (reloc_entry->howto->type)
2578 {
2579 case R_NDS32_LO12S3:
2580 vallo <<= 3;
2581 break;
2582
2583 case R_NDS32_LO12S2:
2584 vallo <<= 2;
2585 break;
2586
2587 case R_NDS32_LO12S1:
2588 vallo <<= 1;
2589 break;
2590
2591 case R_NDS32_LO12S0:
2592 vallo <<= 0;
2593 break;
2594 }
2595
2596 val = ((insn & 0xfffff) << 12) + vallo;
2597 val += l->addend;
2598
2599 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2600 bfd_putb32 ((bfd_vma) insn, l->addr);
2601
2602 next = l->next;
2603 free (l);
2604 l = next;
2605 }
2606
2607 nds32_hi20_list = NULL;
2608 }
2609
2610 /* Now do the LO12 reloc in the usual way.
2611 ??? It would be nice to call bfd_elf_generic_reloc here,
2612 but we have partial_inplace set. bfd_elf_generic_reloc will
2613 pass the handling back to bfd_install_relocation which will install
2614 a section relative addend which is wrong. */
2615 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2616 input_section, output_bfd, error_message);
2617}
2618
2619/* Do generic partial_inplace relocation.
2620 This is a local replacement for bfd_elf_generic_reloc. */
2621
2622static bfd_reloc_status_type
2623nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2624 asymbol *symbol, void *data, asection *input_section,
2625 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2626{
2627 bfd_reloc_status_type ret;
2628 bfd_vma relocation;
2629 bfd_byte *inplace_address;
2630
2631 /* This part is from bfd_elf_generic_reloc.
2632 If we're relocating, and this an external symbol, we don't want
2633 to change anything. */
2634 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2635 && reloc_entry->addend == 0)
2636 {
2637 reloc_entry->address += input_section->output_offset;
2638 return bfd_reloc_ok;
2639 }
2640
2641 /* Now do the reloc in the usual way.
2642 ??? It would be nice to call bfd_elf_generic_reloc here,
2643 but we have partial_inplace set. bfd_elf_generic_reloc will
2644 pass the handling back to bfd_install_relocation which will install
2645 a section relative addend which is wrong. */
2646
2647 /* Sanity check the address (offset in section). */
2648 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2649 return bfd_reloc_outofrange;
2650
2651 ret = bfd_reloc_ok;
2652 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2653 ret = bfd_reloc_undefined;
2654
2655 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2656 relocation = 0;
2657 else
2658 relocation = symbol->value;
2659
2660 /* Only do this for a final link. */
2661 if (output_bfd == (bfd *) NULL)
2662 {
2663 relocation += symbol->section->output_section->vma;
2664 relocation += symbol->section->output_offset;
2665 }
2666
2667 relocation += reloc_entry->addend;
2668 switch (reloc_entry->howto->type)
2669 {
2670 case R_NDS32_LO12S3:
2671 relocation >>= 3;
2672 break;
2673
2674 case R_NDS32_LO12S2:
2675 relocation >>= 2;
2676 break;
2677
2678 case R_NDS32_LO12S1:
2679 relocation >>= 1;
2680 break;
2681
2682 case R_NDS32_LO12S0:
2683 default:
2684 relocation >>= 0;
2685 break;
2686 }
2687
2688 inplace_address = (bfd_byte *) data + reloc_entry->address;
2689
2690#define DOIT(x) \
2691 x = ((x & ~reloc_entry->howto->dst_mask) | \
2692 (((x & reloc_entry->howto->src_mask) + relocation) & \
2693 reloc_entry->howto->dst_mask))
2694
2695 switch (reloc_entry->howto->size)
2696 {
2697 case 1:
2698 {
2699 short x = bfd_getb16 (inplace_address);
2700
2701 DOIT (x);
2702 bfd_putb16 ((bfd_vma) x, inplace_address);
2703 }
2704 break;
2705 case 2:
2706 {
2707 unsigned long x = bfd_getb32 (inplace_address);
2708
2709 DOIT (x);
2710 bfd_putb32 ((bfd_vma) x, inplace_address);
2711 }
2712 break;
2713 default:
2714 BFD_ASSERT (0);
2715 }
2716
2717 if (output_bfd != (bfd *) NULL)
2718 reloc_entry->address += input_section->output_offset;
2719
2720 return ret;
2721}
2722
2723/* Handle the R_NDS32_SDA15 reloc.
2724 This reloc is used to compute the address of objects in the small data area
2725 and to perform loads and stores from that area.
2726 The lower 15 bits are sign extended and added to the register specified
2727 in the instruction, which is assumed to point to _SDA_BASE_.
2728
2729 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2730 the access size, this must be taken care of. */
2731
2732static bfd_reloc_status_type
2733nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2734 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2735 asection *input_section, bfd *output_bfd,
2736 char **error_message ATTRIBUTE_UNUSED)
2737{
2738 /* This part is from bfd_elf_generic_reloc. */
2739 if (output_bfd != (bfd *) NULL
2740 && (symbol->flags & BSF_SECTION_SYM) == 0
2741 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2742 {
2743 reloc_entry->address += input_section->output_offset;
2744 return bfd_reloc_ok;
2745 }
2746
2747 if (output_bfd != NULL)
2748 {
2749 /* FIXME: See bfd_perform_relocation. Is this right? */
2750 return bfd_reloc_continue;
2751 }
2752
2753 /* FIXME: not sure what to do here yet. But then again, the linker
2754 may never call us. */
2755 abort ();
2756}
2757
2758/* nds32_elf_ignore_reloc is the special function for
2759 relocation types which don't need to be relocated
2760 like relaxation relocation types.
2761 This function simply return bfd_reloc_ok when it is
2762 invoked. */
2763
2764static bfd_reloc_status_type
2765nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2766 asymbol *symbol ATTRIBUTE_UNUSED,
2767 void *data ATTRIBUTE_UNUSED, asection *input_section,
2768 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2769{
2770 if (output_bfd != NULL)
2771 reloc_entry->address += input_section->output_offset;
2772
2773 return bfd_reloc_ok;
2774}
2775\f
2776
2777/* Map BFD reloc types to NDS32 ELF reloc types. */
2778
2779struct nds32_reloc_map_entry
2780{
2781 bfd_reloc_code_real_type bfd_reloc_val;
2782 unsigned char elf_reloc_val;
2783};
2784
2785static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2786{
2787 {BFD_RELOC_NONE, R_NDS32_NONE},
2788 {BFD_RELOC_16, R_NDS32_16_RELA},
2789 {BFD_RELOC_32, R_NDS32_32_RELA},
2790 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2791 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2792 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2793 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2794 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2795 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2796 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2797 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2798 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2799 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2800 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2801 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2802 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2803 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2804 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2805 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2806 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2807 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2808 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2809 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2810
2811 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2812 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2813 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2814 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2815 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2816 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2817 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2818 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2819 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2820 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2821 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2822 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2823 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2824 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2825 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2826 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2827 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2828 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2829 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2830 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2831 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2832 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2833 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2834 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2835 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2836 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2837 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2838 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2839 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2840 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2841 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2842 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2843 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2844 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2845 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2846 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2847 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2848 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2849 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2850 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2851 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2856 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2857 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2858 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2859 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2860 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2861 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2862 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2863 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2864 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2865 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2867 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2868 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2869 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2870 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2871 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2872 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2873 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2874 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2875 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2876 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2877 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2878 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2879 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2880 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2881 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2882 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2883 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2884 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2885 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2886
2887 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2888 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2889 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2890 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2891 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2892 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2893 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2894 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2895 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2896 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2897 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2898 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2899 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2900 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2901 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2902 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2903 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2904 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2905 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2906 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2907};
2908
2909/* Patch tag. */
2910
2911static reloc_howto_type *
2912bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2913 const char *r_name)
2914{
2915 unsigned int i;
2916
2917 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2918 if (nds32_elf_howto_table[i].name != NULL
2919 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2920 return &nds32_elf_howto_table[i];
2921
2922 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2923 if (nds32_elf_relax_howto_table[i].name != NULL
2924 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2925 return &nds32_elf_relax_howto_table[i];
2926
2927 return NULL;
2928}
2929
2930static reloc_howto_type *
2931bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2932{
2933 if (code < R_NDS32_RELAX_ENTRY)
2934 {
2935 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2936 return &nds32_elf_howto_table[code];
2937 }
2938 else
2939 {
2940 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2941 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2942 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2943 }
2944}
2945
2946static reloc_howto_type *
2947bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2948 bfd_reloc_code_real_type code)
2949{
2950 unsigned int i;
2951
2952 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2953 {
2954 if (nds32_reloc_map[i].bfd_reloc_val == code)
2955 return bfd_elf32_bfd_reloc_type_table_lookup
2956 (nds32_reloc_map[i].elf_reloc_val);
2957 }
2958
2959 return NULL;
2960}
2961
2962/* Set the howto pointer for an NDS32 ELF reloc. */
2963
2964static void
2965nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2966 Elf_Internal_Rela *dst)
2967{
2968 enum elf_nds32_reloc_type r_type;
2969
2970 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2971 if (r_type > R_NDS32_GNU_VTENTRY)
2972 {
695344c0 2973 /* xgettext:c-format */
64d29018 2974 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
5860e3f8
NC		 2975 r_type = 0;
2976 }
35c08157
KLC		 2977 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2978}
2979
2980static void
2981nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2982 Elf_Internal_Rela *dst)
2983{
2984 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2985 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2986 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2987 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2988}
2989
2990/* Support for core dump NOTE sections.
2991 Reference to include/linux/elfcore.h in Linux. */
2992
2993static bfd_boolean
2994nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2995{
2996 int offset;
2997 size_t size;
2998
2999 switch (note->descsz)
3000 {
3001 case 0x114:
3002 /* Linux/NDS32 32-bit, ABI1 */
3003
3004 /* pr_cursig */
3005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3006
3007 /* pr_pid */
3008 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3009
3010 /* pr_reg */
3011 offset = 72;
3012 size = 200;
3013 break;
3014
3015 case 0xfc:
3016 /* Linux/NDS32 32-bit */
3017
3018 /* pr_cursig */
3019 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3020
3021 /* pr_pid */
3022 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3023
3024 /* pr_reg */
3025 offset = 72;
3026 size = 176;
3027 break;
3028
3029 default:
3030 return FALSE;
3031 }
3032
3033 /* Make a ".reg" section. */
3034 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3035 size, note->descpos + offset);
3036}
3037
3038static bfd_boolean
3039nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3040{
3041 switch (note->descsz)
3042 {
3043 case 124:
3044 /* Linux/NDS32 */
3045
3046 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3047 elf_tdata (abfd)->core->program =
3048 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3049 elf_tdata (abfd)->core->command =
3050 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 3051 break;
35c08157
KLC		 3052
3053 default:
3054 return FALSE;
3055 }
3056
3057 /* Note that for some reason, a spurious space is tacked
3058 onto the end of the args in some (at least one anyway)
3059 implementations, so strip it off if it exists. */
3060 {
3061 char *command = elf_tdata (abfd)->core->command;
3062 int n = strlen (command);
3063
3064 if (0 < n && command[n - 1] == ' ')
3065 command[n - 1] = '\0';
3066 }
3067
3068 return TRUE;
3069}
3070
3071/* Hook called by the linker routine which adds symbols from an object
3072 file. We must handle the special NDS32 section numbers here.
3073 We also keep watching for whether we need to create the sdata special
3074 linker sections. */
3075
3076static bfd_boolean
3077nds32_elf_add_symbol_hook (bfd *abfd,
3078 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3079 Elf_Internal_Sym *sym,
3080 const char **namep ATTRIBUTE_UNUSED,
3081 flagword *flagsp ATTRIBUTE_UNUSED,
3082 asection **secp, bfd_vma *valp)
3083{
3084 switch (sym->st_shndx)
3085 {
3086 case SHN_COMMON:
3087 /* Common symbols less than the GP size are automatically
3088 treated as SHN_MIPS_SCOMMON symbols. */
3089 if (sym->st_size > elf_gp_size (abfd)
3090 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3091 break;
3092
3093 /* st_value is the alignemnt constraint.
3094 That might be its actual size if it is an array or structure. */
3095 switch (sym->st_value)
3096 {
3097 case 1:
3098 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3099 break;
3100 case 2:
3101 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3102 break;
3103 case 4:
3104 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3105 break;
3106 case 8:
3107 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3108 break;
3109 default:
3110 return TRUE;
3111 }
3112
3113 (*secp)->flags |= SEC_IS_COMMON;
3114 *valp = sym->st_size;
3115 break;
3116 }
3117
3118 return TRUE;
3119}
3120
3121
3122/* This function can figure out the best location for a base register to access
3123 data relative to this base register
3124 INPUT:
3125 sda_d0: size of first DOUBLE WORD data section
3126 sda_w0: size of first WORD data section
3127 sda_h0: size of first HALF WORD data section
3128 sda_b : size of BYTE data section
3129 sda_hi: size of second HALF WORD data section
3130 sda_w1: size of second WORD data section
3131 sda_d1: size of second DOUBLE WORD data section
3132 OUTPUT:
3133 offset (always positive) from the beginning of sda_d0 if OK
3134 a negative error value if fail
3135 NOTE:
3136 these 7 sections have to be located back to back if exist
3137 a pass in 0 value for non-existing section */
3138
3139/* Due to the interpretation of simm15 field of load/store depending on
3140 data accessing size, the organization of base register relative data shall
3141 like the following figure
3142 -------------------------------------------
3143 | DOUBLE WORD sized data (range +/- 128K)
3144 -------------------------------------------
3145 | WORD sized data (range +/- 64K)
3146 -------------------------------------------
3147 | HALF WORD sized data (range +/- 32K)
3148 -------------------------------------------
3149 | BYTE sized data (range +/- 16K)
3150 -------------------------------------------
3151 | HALF WORD sized data (range +/- 32K)
3152 -------------------------------------------
3153 | WORD sized data (range +/- 64K)
3154 -------------------------------------------
3155 | DOUBLE WORD sized data (range +/- 128K)
3156 -------------------------------------------
3157 Its base register shall be set to access these data freely. */
3158
3159/* We have to figure out the SDA_BASE value, so that we can adjust the
3160 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3161 BFD. If we can't find it, we're stuck. We cache it in the ELF
3162 target data. We don't need to adjust the symbol value for an
3163 external symbol if we are producing relocatable output. */
3164
3165static asection *sda_rela_sec = NULL;
3166
1c8f6a4d 3167#define SDA_SECTION_NUM 10
35c08157
KLC		 3168
3169static bfd_reloc_status_type
3170nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3171 bfd_vma *psb, bfd_boolean add_symbol)
3172{
3173 int relax_fp_as_gp;
3174 struct elf_nds32_link_hash_table *table;
3175 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3176 long unsigned int total = 0;
35c08157
KLC		 3177
3178 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3179 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3180 {
3181 asection *first = NULL, *final = NULL, *temp;
3182 bfd_vma sda_base;
3183 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3184 4 byte-aligned. Therefore, it has to set the first section ".data"
3185 4 byte-aligned. */
3186 static const char sec_name[SDA_SECTION_NUM][10] =
3187 {
3188 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3189 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3190 };
3191 size_t i = 0;
3192
3193 if (output_bfd->sections == NULL)
3194 {
3195 *psb = elf_gp (output_bfd);
3196 return bfd_reloc_ok;
3197 }
3198
3199 /* Get the first and final section. */
1c8f6a4d 3200 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3201 {
3202 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3203 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3204 first = temp;
3205 if (temp && (temp->size != 0 || temp->rawsize != 0))
3206 final = temp;
1c8f6a4d
KLC		 3207
3208 /* Summarize the sections in order to check if joining .bss. */
3209 if (temp && temp->size != 0)
3210 total += temp->size;
3211 else if (temp && temp->rawsize != 0)
3212 total += temp->rawsize;
3213
35c08157
KLC		 3214 i++;
3215 }
3216
1c8f6a4d
KLC		 3217 /* Check .bss size. */
3218 temp = bfd_get_section_by_name (output_bfd, ".bss");
3219 if (temp)
3220 {
3221 if (temp->size != 0)
3222 total += temp->size;
3223 else if (temp->rawsize != 0)
3224 total += temp->rawsize;
3225
3226 if (total < 0x80000)
3227 {
3228 if (!first && (temp->size != 0 || temp->rawsize != 0))
3229 first = temp;
3230 if ((temp->size != 0 || temp->rawsize != 0))
3231 final = temp;
3232 }
3233 }
3234
35c08157
KLC		 3235 if (first && final)
3236 {
3237 /* The middle of data region. */
1c8f6a4d 3238 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3239
3240 /* Find the section sda_base located. */
3241 i = 0;
1c8f6a4d 3242 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3243 {
3244 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3245 if (final && (final->size != 0 || final->rawsize != 0)
3246 && sda_base >= final->vma)
3247 {
3248 first = final;
3249 i++;
3250 }
3251 else
3252 break;
3253 }
3254 }
3255 else
3256 {
3257 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3258 first output section. */
3259 first = output_bfd->sections;
3260 while (first && first->size == 0 && first->rawsize == 0)
3261 first = first->next;
3262 if (!first)
3263 {
3264 *psb = elf_gp (output_bfd);
3265 return bfd_reloc_ok;
3266 }
1c8f6a4d 3267 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3268 }
3269
3270 sda_base -= first->vma;
3271 sda_base = sda_base & (~7);
3272
3273 if (!_bfd_generic_link_add_one_symbol
3274 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3275 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3276 get_elf_backend_data (output_bfd)->collect, &h))
3277 return FALSE;
3278
3279 sda_rela_sec = first;
3280
3281 table = nds32_elf_hash_table (info);
3282 relax_fp_as_gp = table->relax_fp_as_gp;
3283 if (relax_fp_as_gp)
3284 {
3285 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3286 FALSE, FALSE, FALSE);
3287 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3288 And set FP equal to SDA_BASE to do relaxation for
3289 la $fp, _FP_BASE_. */
3290 if (!_bfd_generic_link_add_one_symbol
3291 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3292 first, (bfd_vma) sda_base, (const char *) NULL,
3293 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3294 return FALSE;
3295 }
3296 }
3297
3298 if (add_symbol == TRUE)
3299 {
3300 if (h)
3301 {
3302 /* Now set gp. */
3303 elf_gp (output_bfd) = (h->u.def.value
3304 + h->u.def.section->output_section->vma
3305 + h->u.def.section->output_offset);
3306 }
3307 else
3308 {
4eca0228 3309 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
35c08157
KLC		 3310 return bfd_reloc_dangerous;
3311 }
3312 }
3313
3314 *psb = h->u.def.value + h->u.def.section->output_section->vma
3315 + h->u.def.section->output_offset;
3316 return bfd_reloc_ok;
3317}
3318\f
3319
3320/* Return size of a PLT entry. */
3321#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3322
3323
3324/* Create an entry in an nds32 ELF linker hash table. */
3325
3326static struct bfd_hash_entry *
3327nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3328 struct bfd_hash_table *table,
3329 const char *string)
3330{
3331 struct elf_nds32_link_hash_entry *ret;
3332
3333 ret = (struct elf_nds32_link_hash_entry *) entry;
3334
3335 /* Allocate the structure if it has not already been allocated by a
3336 subclass. */
3337 if (ret == NULL)
3338 ret = (struct elf_nds32_link_hash_entry *)
3339 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3340
3341 if (ret == NULL)
3342 return (struct bfd_hash_entry *) ret;
3343
3344 /* Call the allocation method of the superclass. */
3345 ret = (struct elf_nds32_link_hash_entry *)
3346 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3347
3348 if (ret != NULL)
3349 {
3350 struct elf_nds32_link_hash_entry *eh;
3351
3352 eh = (struct elf_nds32_link_hash_entry *) ret;
3353 eh->dyn_relocs = NULL;
1c8f6a4d 3354 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3355 }
3356
3357 return (struct bfd_hash_entry *) ret;
3358}
3359
3360/* Create an nds32 ELF linker hash table. */
3361
3362static struct bfd_link_hash_table *
3363nds32_elf_link_hash_table_create (bfd *abfd)
3364{
3365 struct elf_nds32_link_hash_table *ret;
3366
3367 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3368
3369 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3370 if (ret == NULL)
3371 return NULL;
3372
3373 /* patch tag. */
3374 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3375 nds32_elf_link_hash_newfunc,
3376 sizeof (struct elf_nds32_link_hash_entry),
3377 NDS32_ELF_DATA))
3378 {
3379 free (ret);
3380 return NULL;
3381 }
3382
3383 ret->sgot = NULL;
3384 ret->sgotplt = NULL;
3385 ret->srelgot = NULL;
3386 ret->splt = NULL;
3387 ret->srelplt = NULL;
3388 ret->sdynbss = NULL;
3389 ret->srelbss = NULL;
3390 ret->sym_ld_script = NULL;
3391 ret->ex9_export_file = NULL;
3392 ret->ex9_import_file = NULL;
3393
3394 return &ret->root.root;
3395}
3396
3397/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3398 shortcuts to them in our hash table. */
3399
3400static bfd_boolean
3401create_got_section (bfd *dynobj, struct bfd_link_info *info)
3402{
3403 struct elf_nds32_link_hash_table *htab;
3404
3405 if (!_bfd_elf_create_got_section (dynobj, info))
3406 return FALSE;
3407
3408 htab = nds32_elf_hash_table (info);
3409 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3410 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3411 if (!htab->sgot || !htab->sgotplt)
3412 abort ();
3413
3414 /* _bfd_elf_create_got_section will create it for us. */
3415 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3416 if (htab->srelgot == NULL
3417 || !bfd_set_section_flags (dynobj, htab->srelgot,
3418 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3419 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3420 | SEC_READONLY))
3421 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3422 return FALSE;
3423
3424 return TRUE;
3425}
3426
3427/* Create dynamic sections when linking against a dynamic object. */
3428
3429static bfd_boolean
3430nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3431{
3432 struct elf_nds32_link_hash_table *htab;
3433 flagword flags, pltflags;
3434 register asection *s;
3435 const struct elf_backend_data *bed;
3436 int ptralign = 2; /* 32-bit */
3437
3438 bed = get_elf_backend_data (abfd);
3439
3440 htab = nds32_elf_hash_table (info);
3441
3442 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3443 .rel[a].bss sections. */
3444
3445 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3446 | SEC_LINKER_CREATED);
3447
3448 pltflags = flags;
3449 pltflags |= SEC_CODE;
3450 if (bed->plt_not_loaded)
3451 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3452 if (bed->plt_readonly)
3453 pltflags |= SEC_READONLY;
3454
3455 s = bfd_make_section (abfd, ".plt");
3456 htab->splt = s;
3457 if (s == NULL
3458 || !bfd_set_section_flags (abfd, s, pltflags)
3459 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3460 return FALSE;
3461
3462 if (bed->want_plt_sym)
3463 {
3464 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3465 .plt section. */
3466 struct bfd_link_hash_entry *bh = NULL;
3467 struct elf_link_hash_entry *h;
3468
3469 if (!(_bfd_generic_link_add_one_symbol
3470 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3471 (bfd_vma) 0, (const char *) NULL, FALSE,
3472 get_elf_backend_data (abfd)->collect, &bh)))
3473 return FALSE;
3474
3475 h = (struct elf_link_hash_entry *) bh;
3476 h->def_regular = 1;
3477 h->type = STT_OBJECT;
3478
0e1862bb 3479 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC		 3480 return FALSE;
3481 }
3482
3483 s = bfd_make_section (abfd,
3484 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3485 htab->srelplt = s;
3486 if (s == NULL
3487 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3488 || !bfd_set_section_alignment (abfd, s, ptralign))
3489 return FALSE;
3490
3491 if (htab->sgot == NULL && !create_got_section (abfd, info))
3492 return FALSE;
3493
3494 {
3495 const char *secname;
3496 char *relname;
3497 flagword secflags;
3498 asection *sec;
3499
3500 for (sec = abfd->sections; sec; sec = sec->next)
3501 {
3502 secflags = bfd_get_section_flags (abfd, sec);
3503 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3504 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3505 continue;
3506 secname = bfd_get_section_name (abfd, sec);
3507 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3508 strcpy (relname, ".rela");
3509 strcat (relname, secname);
3510 if (bfd_get_section_by_name (abfd, secname))
3511 continue;
3512 s = bfd_make_section (abfd, relname);
3513 if (s == NULL
3514 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3515 || !bfd_set_section_alignment (abfd, s, ptralign))
3516 return FALSE;
3517 }
3518 }
3519
3520 if (bed->want_dynbss)
3521 {
3522 /* The .dynbss section is a place to put symbols which are defined
3523 by dynamic objects, are referenced by regular objects, and are
3524 not functions. We must allocate space for them in the process
3525 image and use a R_*_COPY reloc to tell the dynamic linker to
3526 initialize them at run time. The linker script puts the .dynbss
3527 section into the .bss section of the final image. */
3528 s = bfd_make_section (abfd, ".dynbss");
3529 htab->sdynbss = s;
3530 if (s == NULL
3531 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3532 return FALSE;
3533 /* The .rel[a].bss section holds copy relocs. This section is not
3534 normally needed. We need to create it here, though, so that the
3535 linker will map it to an output section. We can't just create it
3536 only if we need it, because we will not know whether we need it
3537 until we have seen all the input files, and the first time the
3538 main linker code calls BFD after examining all the input files
3539 (size_dynamic_sections) the input sections have already been
3540 mapped to the output sections. If the section turns out not to
3541 be needed, we can discard it later. We will never need this
3542 section when generating a shared object, since they do not use
3543 copy relocs. */
0e1862bb 3544 if (!bfd_link_pic (info))
35c08157
KLC		 3545 {
3546 s = bfd_make_section (abfd, (bed->default_use_rela_p
3547 ? ".rela.bss" : ".rel.bss"));
3548 htab->srelbss = s;
3549 if (s == NULL
3550 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3551 || !bfd_set_section_alignment (abfd, s, ptralign))
3552 return FALSE;
3553 }
3554 }
3555
3556 return TRUE;
3557}
3558
3559/* Copy the extra info we tack onto an elf_link_hash_entry. */
3560static void
3561nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3562 struct elf_link_hash_entry *dir,
3563 struct elf_link_hash_entry *ind)
3564{
3565 struct elf_nds32_link_hash_entry *edir, *eind;
3566
3567 edir = (struct elf_nds32_link_hash_entry *) dir;
3568 eind = (struct elf_nds32_link_hash_entry *) ind;
3569
3570 if (eind->dyn_relocs != NULL)
3571 {
3572 if (edir->dyn_relocs != NULL)
3573 {
3574 struct elf_nds32_dyn_relocs **pp;
3575 struct elf_nds32_dyn_relocs *p;
3576
3577 if (ind->root.type == bfd_link_hash_indirect)
3578 abort ();
3579
3580 /* Add reloc counts against the weak sym to the strong sym
3581 list. Merge any entries against the same section. */
3582 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3583 {
3584 struct elf_nds32_dyn_relocs *q;
3585
3586 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3587 if (q->sec == p->sec)
3588 {
3589 q->pc_count += p->pc_count;
3590 q->count += p->count;
3591 *pp = p->next;
3592 break;
3593 }
3594 if (q == NULL)
3595 pp = &p->next;
3596 }
3597 *pp = edir->dyn_relocs;
3598 }
3599
3600 edir->dyn_relocs = eind->dyn_relocs;
3601 eind->dyn_relocs = NULL;
3602 }
3603
3604 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3605}
3606\f
3607
3608/* Adjust a symbol defined by a dynamic object and referenced by a
3609 regular object. The current definition is in some section of the
3610 dynamic object, but we're not including those sections. We have to
3611 change the definition to something the rest of the link can
3612 understand. */
3613
3614static bfd_boolean
3615nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3616 struct elf_link_hash_entry *h)
3617{
3618 struct elf_nds32_link_hash_table *htab;
3619 struct elf_nds32_link_hash_entry *eh;
3620 struct elf_nds32_dyn_relocs *p;
3621 bfd *dynobj;
3622 asection *s;
3623 unsigned int power_of_two;
3624
3625 dynobj = elf_hash_table (info)->dynobj;
3626
3627 /* Make sure we know what is going on here. */
3628 BFD_ASSERT (dynobj != NULL
3629 && (h->needs_plt
3630 || h->u.weakdef != NULL
3631 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3632
3633
3634 /* If this is a function, put it in the procedure linkage table. We
3635 will fill in the contents of the procedure linkage table later,
3636 when we know the address of the .got section. */
3637 if (h->type == STT_FUNC || h->needs_plt)
3638 {
0e1862bb 3639 if (!bfd_link_pic (info)
35c08157
KLC		 3640 && !h->def_dynamic
3641 && !h->ref_dynamic
3642 && h->root.type != bfd_link_hash_undefweak
3643 && h->root.type != bfd_link_hash_undefined)
3644 {
3645 /* This case can occur if we saw a PLT reloc in an input
3646 file, but the symbol was never referred to by a dynamic
3647 object. In such a case, we don't actually need to build
3648 a procedure linkage table, and we can just do a PCREL
3649 reloc instead. */
3650 h->plt.offset = (bfd_vma) - 1;
3651 h->needs_plt = 0;
3652 }
3653
3654 return TRUE;
3655 }
3656 else
3657 h->plt.offset = (bfd_vma) - 1;
3658
3659 /* If this is a weak symbol, and there is a real definition, the
3660 processor independent code will have arranged for us to see the
3661 real definition first, and we can just use the same value. */
3662 if (h->u.weakdef != NULL)
3663 {
3664 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3665 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3666 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3667 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3668 return TRUE;
3669 }
3670
3671 /* This is a reference to a symbol defined by a dynamic object which
3672 is not a function. */
3673
3674 /* If we are creating a shared library, we must presume that the
3675 only references to the symbol are via the global offset table.
3676 For such cases we need not do anything here; the relocations will
3677 be handled correctly by relocate_section. */
0e1862bb 3678 if (bfd_link_pic (info))
35c08157
KLC		 3679 return TRUE;
3680
3681 /* If there are no references to this symbol that do not use the
3682 GOT, we don't need to generate a copy reloc. */
3683 if (!h->non_got_ref)
3684 return TRUE;
3685
3686 /* If -z nocopyreloc was given, we won't generate them either. */
3687 if (info->nocopyreloc)
3688 {
3689 h->non_got_ref = 0;
3690 return TRUE;
3691 }
3692
3693 eh = (struct elf_nds32_link_hash_entry *) h;
3694 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3695 {
3696 s = p->sec->output_section;
3697 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3698 break;
3699 }
3700
3701 /* If we didn't find any dynamic relocs in sections which needs the
3702 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3703 the copy reloc. */
3704 if (p == NULL)
3705 {
3706 h->non_got_ref = 0;
3707 return TRUE;
3708 }
3709
3710 /* We must allocate the symbol in our .dynbss section, which will
3711 become part of the .bss section of the executable. There will be
3712 an entry for this symbol in the .dynsym section. The dynamic
3713 object will contain position independent code, so all references
3714 from the dynamic object to this symbol will go through the global
3715 offset table. The dynamic linker will use the .dynsym entry to
3716 determine the address it must put in the global offset table, so
3717 both the dynamic object and the regular object will refer to the
3718 same memory location for the variable. */
3719
3720 htab = nds32_elf_hash_table (info);
3721 s = htab->sdynbss;
3722 BFD_ASSERT (s != NULL);
3723
3724 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3725 to copy the initial value out of the dynamic object and into the
3726 runtime process image. We need to remember the offset into the
3727 .rela.bss section we are going to use. */
3728 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3729 {
3730 asection *srel;
3731
3732 srel = htab->srelbss;
3733 BFD_ASSERT (srel != NULL);
3734 srel->size += sizeof (Elf32_External_Rela);
3735 h->needs_copy = 1;
3736 }
3737
3738 /* We need to figure out the alignment required for this symbol. I
3739 have no idea how ELF linkers handle this. */
3740 power_of_two = bfd_log2 (h->size);
3741 if (power_of_two > 3)
3742 power_of_two = 3;
3743
3744 /* Apply the required alignment. */
3745 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3746 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3747 {
3748 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3749 return FALSE;
3750 }
3751
3752 /* Define the symbol as being at this point in the section. */
3753 h->root.u.def.section = s;
3754 h->root.u.def.value = s->size;
3755
3756 /* Increment the section size to make room for the symbol. */
3757 s->size += h->size;
3758
3759 return TRUE;
3760}
3761
3762/* Allocate space in .plt, .got and associated reloc sections for
3763 dynamic relocs. */
3764
3765static bfd_boolean
3766allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3767{
3768 struct bfd_link_info *info;
3769 struct elf_nds32_link_hash_table *htab;
3770 struct elf_nds32_link_hash_entry *eh;
3771 struct elf_nds32_dyn_relocs *p;
3772
3773 if (h->root.type == bfd_link_hash_indirect)
3774 return TRUE;
3775
3776 if (h->root.type == bfd_link_hash_warning)
3777 /* When warning symbols are created, they **replace** the "real"
3778 entry in the hash table, thus we never get to see the real
3779 symbol in a hash traversal. So look at it now. */
3780 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3781
3782 info = (struct bfd_link_info *) inf;
3783 htab = nds32_elf_hash_table (info);
3784
3785 eh = (struct elf_nds32_link_hash_entry *) h;
3786
3787 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3788 {
3789 /* Make sure this symbol is output as a dynamic symbol.
3790 Undefined weak syms won't yet be marked as dynamic. */
3791 if (h->dynindx == -1 && !h->forced_local)
3792 {
3793 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3794 return FALSE;
3795 }
3796
0e1862bb 3797 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157
KLC		 3798 {
3799 asection *s = htab->splt;
3800
3801 /* If this is the first .plt entry, make room for the special
3802 first entry. */
3803 if (s->size == 0)
3804 s->size += PLT_ENTRY_SIZE;
3805
3806 h->plt.offset = s->size;
3807
3808 /* If this symbol is not defined in a regular file, and we are
3809 not generating a shared library, then set the symbol to this
3810 location in the .plt. This is required to make function
3811 pointers compare as equal between the normal executable and
3812 the shared library. */
0e1862bb 3813 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 3814 {
3815 h->root.u.def.section = s;
3816 h->root.u.def.value = h->plt.offset;
3817 }
3818
3819 /* Make room for this entry. */
3820 s->size += PLT_ENTRY_SIZE;
3821
3822 /* We also need to make an entry in the .got.plt section, which
3823 will be placed in the .got section by the linker script. */
3824 htab->sgotplt->size += 4;
3825
3826 /* We also need to make an entry in the .rel.plt section. */
3827 htab->srelplt->size += sizeof (Elf32_External_Rela);
3828 }
3829 else
3830 {
3831 h->plt.offset = (bfd_vma) - 1;
3832 h->needs_plt = 0;
3833 }
3834 }
3835 else
3836 {
3837 h->plt.offset = (bfd_vma) - 1;
3838 h->needs_plt = 0;
3839 }
3840
3841 if (h->got.refcount > 0)
3842 {
3843 asection *s;
3844 bfd_boolean dyn;
1c8f6a4d 3845 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3846
3847 /* Make sure this symbol is output as a dynamic symbol.
3848 Undefined weak syms won't yet be marked as dynamic. */
3849 if (h->dynindx == -1 && !h->forced_local)
3850 {
3851 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3852 return FALSE;
3853 }
3854
3855 s = htab->sgot;
35c08157 3856 h->got.offset = s->size;
1c8f6a4d
KLC		 3857
3858 if (tls_type == GOT_UNKNOWN)
3859 abort ();
3860 else if (tls_type == GOT_NORMAL
3861 || tls_type == GOT_TLS_IE)
3862 /* Need a GOT slot. */
3863 s->size += 4;
3864
35c08157 3865 dyn = htab->root.dynamic_sections_created;
0e1862bb 3866 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
35c08157
KLC		 3867 htab->srelgot->size += sizeof (Elf32_External_Rela);
3868 }
3869 else
3870 h->got.offset = (bfd_vma) - 1;
3871
3872 if (eh->dyn_relocs == NULL)
3873 return TRUE;
3874
3875 /* In the shared -Bsymbolic case, discard space allocated for
3876 dynamic pc-relative relocs against symbols which turn out to be
3877 defined in regular objects. For the normal shared case, discard
3878 space for pc-relative relocs that have become local due to symbol
3879 visibility changes. */
3880
0e1862bb 3881 if (bfd_link_pic (info))
35c08157
KLC		 3882 {
3883 if (h->def_regular && (h->forced_local || info->symbolic))
3884 {
3885 struct elf_nds32_dyn_relocs **pp;
3886
3887 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3888 {
3889 p->count -= p->pc_count;
3890 p->pc_count = 0;
3891 if (p->count == 0)
3892 *pp = p->next;
3893 else
3894 pp = &p->next;
3895 }
3896 }
3897 }
3898 else
3899 {
3900 /* For the non-shared case, discard space for relocs against
3901 symbols which turn out to need copy relocs or are not dynamic. */
3902
3903 if (!h->non_got_ref
3904 && ((h->def_dynamic
3905 && !h->def_regular)
3906 || (htab->root.dynamic_sections_created
3907 && (h->root.type == bfd_link_hash_undefweak
3908 || h->root.type == bfd_link_hash_undefined))))
3909 {
3910 /* Make sure this symbol is output as a dynamic symbol.
3911 Undefined weak syms won't yet be marked as dynamic. */
3912 if (h->dynindx == -1 && !h->forced_local)
3913 {
3914 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3915 return FALSE;
3916 }
3917
3918 /* If that succeeded, we know we'll be keeping all the
3919 relocs. */
3920 if (h->dynindx != -1)
3921 goto keep;
3922 }
3923
3924 eh->dyn_relocs = NULL;
3925
3926 keep:;
3927 }
3928
3929 /* Finally, allocate space. */
3930 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3931 {
3932 asection *sreloc = elf_section_data (p->sec)->sreloc;
3933 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3934 }
3935
3936 return TRUE;
3937}
3938
3939/* Find any dynamic relocs that apply to read-only sections. */
3940
3941static bfd_boolean
3942readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3943{
3944 struct elf_nds32_link_hash_entry *eh;
3945 struct elf_nds32_dyn_relocs *p;
3946
3947 if (h->root.type == bfd_link_hash_warning)
3948 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3949
3950 eh = (struct elf_nds32_link_hash_entry *) h;
3951 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3952 {
3953 asection *s = p->sec->output_section;
3954
3955 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3956 {
3957 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3958
3959 info->flags |= DF_TEXTREL;
3960
3961 /* Not an error, just cut short the traversal. */
3962 return FALSE;
3963 }
3964 }
3965 return TRUE;
3966}
3967
3968/* Set the sizes of the dynamic sections. */
3969
3970static bfd_boolean
3971nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3972 struct bfd_link_info *info)
3973{
3974 struct elf_nds32_link_hash_table *htab;
3975 bfd *dynobj;
3976 asection *s;
3977 bfd_boolean relocs;
3978 bfd *ibfd;
3979
3980 htab = nds32_elf_hash_table (info);
3981 dynobj = htab->root.dynobj;
3982 BFD_ASSERT (dynobj != NULL);
3983
3984 if (htab->root.dynamic_sections_created)
3985 {
3986 /* Set the contents of the .interp section to the interpreter. */
9b8b325a 3987 if (!bfd_link_pic (info) && !info->nointerp)
35c08157
KLC		 3988 {
3989 s = bfd_get_section_by_name (dynobj, ".interp");
3990 BFD_ASSERT (s != NULL);
3991 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3992 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3993 }
3994 }
3995
3996 /* Set up .got offsets for local syms, and space for local dynamic
3997 relocs. */
c72f2fb2 3998 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3999 {
4000 bfd_signed_vma *local_got;
4001 bfd_signed_vma *end_local_got;
4002 bfd_size_type locsymcount;
4003 Elf_Internal_Shdr *symtab_hdr;
4004 asection *srel;
4005
4006 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4007 continue;
4008
4009 for (s = ibfd->sections; s != NULL; s = s->next)
4010 {
4011 struct elf_nds32_dyn_relocs *p;
4012
4013 for (p = ((struct elf_nds32_dyn_relocs *)
4014 elf_section_data (s)->local_dynrel);
4015 p != NULL; p = p->next)
4016 {
4017 if (!bfd_is_abs_section (p->sec)
4018 && bfd_is_abs_section (p->sec->output_section))
4019 {
4020 /* Input section has been discarded, either because
4021 it is a copy of a linkonce section or due to
4022 linker script /DISCARD/, so we'll be discarding
4023 the relocs too. */
4024 }
4025 else if (p->count != 0)
4026 {
4027 srel = elf_section_data (p->sec)->sreloc;
4028 srel->size += p->count * sizeof (Elf32_External_Rela);
4029 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4030 info->flags |= DF_TEXTREL;
4031 }
4032 }
4033 }
4034
4035 local_got = elf_local_got_refcounts (ibfd);
4036 if (!local_got)
4037 continue;
4038
4039 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4040 locsymcount = symtab_hdr->sh_info;
4041 end_local_got = local_got + locsymcount;
4042 s = htab->sgot;
4043 srel = htab->srelgot;
4044 for (; local_got < end_local_got; ++local_got)
4045 {
4046 if (*local_got > 0)
4047 {
4048 *local_got = s->size;
4049 s->size += 4;
0e1862bb 4050 if (bfd_link_pic (info))
35c08157
KLC		 4051 srel->size += sizeof (Elf32_External_Rela);
4052 }
4053 else
4054 *local_got = (bfd_vma) - 1;
4055 }
4056 }
4057
4058 /* Allocate global sym .plt and .got entries, and space for global
4059 sym dynamic relocs. */
4060 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4061
4062 /* We now have determined the sizes of the various dynamic sections.
4063 Allocate memory for them. */
4064 relocs = FALSE;
4065 for (s = dynobj->sections; s != NULL; s = s->next)
4066 {
4067 if ((s->flags & SEC_LINKER_CREATED) == 0)
4068 continue;
4069
4070 if (s == htab->splt)
4071 {
4072 /* Strip this section if we don't need it; see the
4073 comment below. */
4074 }
4075 else if (s == htab->sgot)
4076 {
4077 got_size += s->size;
4078 }
4079 else if (s == htab->sgotplt)
4080 {
4081 got_size += s->size;
4082 }
4083 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4084 {
4085 if (s->size != 0 && s != htab->srelplt)
4086 relocs = TRUE;
4087
4088 /* We use the reloc_count field as a counter if we need
4089 to copy relocs into the output file. */
4090 s->reloc_count = 0;
4091 }
4092 else
4093 {
4094 /* It's not one of our sections, so don't allocate space. */
4095 continue;
4096 }
4097
4098 if (s->size == 0)
4099 {
4100 /* If we don't need this section, strip it from the
4101 output file. This is mostly to handle .rela.bss and
4102 .rela.plt. We must create both sections in
4103 create_dynamic_sections, because they must be created
4104 before the linker maps input sections to output
4105 sections. The linker does that before
4106 adjust_dynamic_symbol is called, and it is that
4107 function which decides whether anything needs to go
4108 into these sections. */
4109 s->flags |= SEC_EXCLUDE;
4110 continue;
4111 }
4112
4113 /* Allocate memory for the section contents. We use bfd_zalloc
4114 here in case unused entries are not reclaimed before the
4115 section's contents are written out. This should not happen,
4116 but this way if it does, we get a R_NDS32_NONE reloc instead
4117 of garbage. */
4118 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4119 if (s->contents == NULL)
4120 return FALSE;
4121 }
4122
4123
4124 if (htab->root.dynamic_sections_created)
4125 {
4126 /* Add some entries to the .dynamic section. We fill in the
4127 values later, in nds32_elf_finish_dynamic_sections, but we
4128 must add the entries now so that we get the correct size for
4129 the .dynamic section. The DT_DEBUG entry is filled in by the
4130 dynamic linker and used by the debugger. */
4131#define add_dynamic_entry(TAG, VAL) \
4132 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4133
0e1862bb 4134 if (!bfd_link_pic (info))
35c08157
KLC		 4135 {
4136 if (!add_dynamic_entry (DT_DEBUG, 0))
4137 return FALSE;
4138 }
4139
4140 if (htab->splt->size != 0)
4141 {
4142 if (!add_dynamic_entry (DT_PLTGOT, 0)
4143 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4144 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4145 || !add_dynamic_entry (DT_JMPREL, 0))
4146 return FALSE;
4147 }
4148
4149 if (relocs)
4150 {
4151 if (!add_dynamic_entry (DT_RELA, 0)
4152 || !add_dynamic_entry (DT_RELASZ, 0)
4153 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4154 return FALSE;
4155
4156 /* If any dynamic relocs apply to a read-only section,
4157 then we need a DT_TEXTREL entry. */
4158 if ((info->flags & DF_TEXTREL) == 0)
4159 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4160 (void *) info);
4161
4162 if ((info->flags & DF_TEXTREL) != 0)
4163 {
4164 if (!add_dynamic_entry (DT_TEXTREL, 0))
4165 return FALSE;
4166 }
4167 }
4168 }
4169#undef add_dynamic_entry
4170
4171 return TRUE;
4172}
4173
4174static bfd_reloc_status_type
4175nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4176 bfd_vma relocation, bfd_byte *location)
4177{
4178 int size;
4179 bfd_vma x = 0;
4180 bfd_reloc_status_type flag;
4181 unsigned int rightshift = howto->rightshift;
4182 unsigned int bitpos = howto->bitpos;
4183
4184 /* If the size is negative, negate RELOCATION. This isn't very
4185 general. */
4186 if (howto->size < 0)
4187 relocation = -relocation;
4188
4189 /* Get the value we are going to relocate. */
4190 size = bfd_get_reloc_size (howto);
4191 switch (size)
4192 {
4193 default:
35c08157
KLC		 4194 abort ();
4195 break;
6346d5ca
AM		 4196 case 0:
4197 return bfd_reloc_ok;
35c08157
KLC		 4198 case 2:
4199 x = bfd_getb16 (location);
4200 break;
4201 case 4:
4202 x = bfd_getb32 (location);
4203 break;
4204 }
4205
4206 /* Check for overflow. FIXME: We may drop bits during the addition
4207 which we don't check for. We must either check at every single
4208 operation, which would be tedious, or we must do the computations
4209 in a type larger than bfd_vma, which would be inefficient. */
4210 flag = bfd_reloc_ok;
4211 if (howto->complain_on_overflow != complain_overflow_dont)
4212 {
4213 bfd_vma addrmask, fieldmask, signmask, ss;
4214 bfd_vma a, b, sum;
4215
4216 /* Get the values to be added together. For signed and unsigned
4217 relocations, we assume that all values should be truncated to
4218 the size of an address. For bitfields, all the bits matter.
4219 See also bfd_check_overflow. */
4220 fieldmask = N_ONES (howto->bitsize);
4221 signmask = ~fieldmask;
4222 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4223 a = (relocation & addrmask) >> rightshift;
4224 b = (x & howto->src_mask & addrmask) >> bitpos;
4225
4226 switch (howto->complain_on_overflow)
4227 {
4228 case complain_overflow_signed:
4229 /* If any sign bits are set, all sign bits must be set.
4230 That is, A must be a valid negative address after
4231 shifting. */
4232 signmask = ~(fieldmask >> 1);
4233 /* Fall through. */
4234
4235 case complain_overflow_bitfield:
4236 /* Much like the signed check, but for a field one bit
4237 wider. We allow a bitfield to represent numbers in the
4238 range -2**n to 2**n-1, where n is the number of bits in the
4239 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4240 can't overflow, which is exactly what we want. */
4241 ss = a & signmask;
4242 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4243 flag = bfd_reloc_overflow;
4244
4245 /* We only need this next bit of code if the sign bit of B
4246 is below the sign bit of A. This would only happen if
4247 SRC_MASK had fewer bits than BITSIZE. Note that if
4248 SRC_MASK has more bits than BITSIZE, we can get into
4249 trouble; we would need to verify that B is in range, as
4250 we do for A above. */
4251 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4252 ss >>= bitpos;
4253
4254 /* Set all the bits above the sign bit. */
4255 b = (b ^ ss) - ss;
4256
4257 /* Now we can do the addition. */
4258 sum = a + b;
4259
4260 /* See if the result has the correct sign. Bits above the
4261 sign bit are junk now; ignore them. If the sum is
4262 positive, make sure we did not have all negative inputs;
4263 if the sum is negative, make sure we did not have all
4264 positive inputs. The test below looks only at the sign
4265 bits, and it really just
4266 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4267
4268 We mask with addrmask here to explicitly allow an address
4269 wrap-around. The Linux kernel relies on it, and it is
4270 the only way to write assembler code which can run when
4271 loaded at a location 0x80000000 away from the location at
4272 which it is linked. */
4273 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4274 flag = bfd_reloc_overflow;
4275
4276 break;
4277
4278 case complain_overflow_unsigned:
4279 /* Checking for an unsigned overflow is relatively easy:
4280 trim the addresses and add, and trim the result as well.
4281 Overflow is normally indicated when the result does not
4282 fit in the field. However, we also need to consider the
4283 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4284 input is 0x80000000, and bfd_vma is only 32 bits; then we
4285 will get sum == 0, but there is an overflow, since the
4286 inputs did not fit in the field. Instead of doing a
4287 separate test, we can check for this by or-ing in the
4288 operands when testing for the sum overflowing its final
4289 field. */
4290 sum = (a + b) & addrmask;
4291 if ((a | b | sum) & signmask)
4292 flag = bfd_reloc_overflow;
4293 break;
4294
4295 default:
4296 abort ();
4297 }
4298 }
4299
4300 /* Put RELOCATION in the right bits. */
4301 relocation >>= (bfd_vma) rightshift;
4302 relocation <<= (bfd_vma) bitpos;
4303
4304 /* Add RELOCATION to the right bits of X. */
4305 /* FIXME : 090616
4306 Because the relaxation may generate duplicate relocation at one address,
4307 an addition to immediate in the instruction may cause the relocation added
4308 several times.
4309 This bug should be fixed in assembler, but a check is also needed here. */
4310 if (howto->partial_inplace)
4311 x = ((x & ~howto->dst_mask)
4312 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4313 else
4314 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4315
4316
4317 /* Put the relocated value back in the object file. */
4318 switch (size)
4319 {
4320 default:
4321 case 0:
4322 case 1:
4323 case 8:
4324 abort ();
4325 break;
4326 case 2:
4327 bfd_putb16 (x, location);
4328 break;
4329 case 4:
4330 bfd_putb32 (x, location);
4331 break;
4332 }
4333
4334 return flag;
4335}
4336
4337static bfd_reloc_status_type
4338nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4339 asection *input_section, bfd_byte *contents,
4340 bfd_vma address, bfd_vma value, bfd_vma addend)
4341{
4342 bfd_vma relocation;
4343
4344 /* Sanity check the address. */
4345 if (address > bfd_get_section_limit (input_bfd, input_section))
4346 return bfd_reloc_outofrange;
4347
4348 /* This function assumes that we are dealing with a basic relocation
4349 against a symbol. We want to compute the value of the symbol to
4350 relocate to. This is just VALUE, the value of the symbol, plus
4351 ADDEND, any addend associated with the reloc. */
4352 relocation = value + addend;
4353
4354 /* If the relocation is PC relative, we want to set RELOCATION to
4355 the distance between the symbol (currently in RELOCATION) and the
4356 location we are relocating. Some targets (e.g., i386-aout)
4357 arrange for the contents of the section to be the negative of the
4358 offset of the location within the section; for such targets
4359 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4360 simply leave the contents of the section as zero; for such
4361 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4362 need to subtract out the offset of the location within the
4363 section (which is just ADDRESS). */
4364 if (howto->pc_relative)
4365 {
4366 relocation -= (input_section->output_section->vma
4367 + input_section->output_offset);
4368 if (howto->pcrel_offset)
4369 relocation -= address;
4370 }
4371
4372 return nds32_relocate_contents (howto, input_bfd, relocation,
4373 contents + address);
4374}
4375
4376static bfd_boolean
4377nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4378 const char *name,
4379 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4380 asection *input_sec,
4381 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4382{
4383 const char *source;
4384 FILE *sym_ld_script = NULL;
4385 struct elf_nds32_link_hash_table *table;
4386
4387 table = nds32_elf_hash_table (info);
4388 sym_ld_script = table->sym_ld_script;
4389 if (!sym_ld_script)
4390 return TRUE;
4391
4392 if (!h || !name || *name == '\0')
4393 return TRUE;
4394
4395 if (input_sec->flags & SEC_EXCLUDE)
4396 return TRUE;
4397
4398 if (!check_start_export_sym)
4399 {
4400 fprintf (sym_ld_script, "SECTIONS\n{\n");
4401 check_start_export_sym = 1;
4402 }
4403
4404 if (h->root.type == bfd_link_hash_defined
4405 || h->root.type == bfd_link_hash_defweak)
4406 {
4407 if (!h->root.u.def.section->output_section)
4408 return TRUE;
4409
4410 if (bfd_is_const_section (input_sec))
4411 source = input_sec->name;
4412 else
4413 source = input_sec->owner->filename;
4414
4415 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4416 h->root.root.string,
4417 (long) (h->root.u.def.value
4418 + h->root.u.def.section->output_section->vma
4419 + h->root.u.def.section->output_offset), source);
4420 }
4421
4422 return TRUE;
4423}
4424
4425/* Relocate an NDS32/D ELF section.
4426 There is some attempt to make this function usable for many architectures,
4427 both for RELA and REL type relocs, if only to serve as a learning tool.
4428
4429 The RELOCATE_SECTION function is called by the new ELF backend linker
4430 to handle the relocations for a section.
4431
4432 The relocs are always passed as Rela structures; if the section
4433 actually uses Rel structures, the r_addend field will always be
4434 zero.
4435
4436 This function is responsible for adjust the section contents as
4437 necessary, and (if using Rela relocs and generating a
4438 relocatable output file) adjusting the reloc addend as
4439 necessary.
4440
4441 This function does not have to worry about setting the reloc
4442 address or the reloc symbol index.
4443
4444 LOCAL_SYMS is a pointer to the swapped in local symbols.
4445
4446 LOCAL_SECTIONS is an array giving the section in the input file
4447 corresponding to the st_shndx field of each local symbol.
4448
4449 The global hash table entry for the global symbols can be found
4450 via elf_sym_hashes (input_bfd).
4451
4452 When generating relocatable output, this function must handle
4453 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4454 going to be the section symbol corresponding to the output
4455 section, which means that the addend must be adjusted
4456 accordingly. */
4457
1c8f6a4d
KLC		 4458static bfd_vma
4459dtpoff_base (struct bfd_link_info *info)
4460{
4461 /* If tls_sec is NULL, we should have signalled an error already. */
4462 if (elf_hash_table (info)->tls_sec == NULL)
4463 return 0;
4464 return elf_hash_table (info)->tls_sec->vma;
4465}
4466
35c08157
KLC		 4467static bfd_boolean
4468nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4469 struct bfd_link_info * info,
4470 bfd * input_bfd,
4471 asection * input_section,
4472 bfd_byte * contents,
4473 Elf_Internal_Rela * relocs,
4474 Elf_Internal_Sym * local_syms,
4475 asection ** local_sections)
4476{
4477 Elf_Internal_Shdr *symtab_hdr;
4478 struct elf_link_hash_entry **sym_hashes;
4479 Elf_Internal_Rela *rel, *relend;
4480 bfd_boolean ret = TRUE; /* Assume success. */
4481 int align = 0;
4482 bfd_reloc_status_type r;
4483 const char *errmsg = NULL;
4484 bfd_vma gp;
4485 struct elf_nds32_link_hash_table *htab;
4486 bfd *dynobj;
4487 bfd_vma *local_got_offsets;
4488 asection *sgot, *splt, *sreloc;
4489 bfd_vma high_address;
4490 struct elf_nds32_link_hash_table *table;
4491 int eliminate_gc_relocs;
4492 bfd_vma fpbase_addr;
4493
4494 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4495 sym_hashes = elf_sym_hashes (input_bfd);
4496 htab = nds32_elf_hash_table (info);
4497 high_address = bfd_get_section_limit (input_bfd, input_section);
4498
4499 dynobj = htab->root.dynobj;
4500 local_got_offsets = elf_local_got_offsets (input_bfd);
4501
4502 sgot = htab->sgot;
4503 splt = htab->splt;
4504 sreloc = NULL;
4505
4506 rel = relocs;
4507 relend = relocs + input_section->reloc_count;
4508
4509 table = nds32_elf_hash_table (info);
4510 eliminate_gc_relocs = table->eliminate_gc_relocs;
4511 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4512 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 4513 {
4514 is_SDA_BASE_set = 1;
4515 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4516 if (r != bfd_reloc_ok)
4517 return FALSE;
4518 }
4519
0c4bd9d9
KLC		 4520 if (is_ITB_BASE_set == 0)
4521 {
4522 /* Set the _ITB_BASE_. */
4523 if (!nds32_elf_ex9_itb_base (info))
4524 {
4eca0228
AM		 4525 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"),
4526 output_bfd);
0c4bd9d9
KLC		 4527 bfd_set_error (bfd_error_bad_value);
4528 }
4529 }
4530
1c8f6a4d
KLC		 4531 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4532 if (!nds32_elf_ifc_reloc ())
4eca0228 4533 _bfd_error_handler (_("error: IFC relocation error."));
1c8f6a4d
KLC		 4534
4535 /* Relocation for .ex9.itable. */
4536 if (table->target_optimize & NDS32_RELAX_EX9_ON
4537 || (table->ex9_import_file && table->update_ex9_table))
4538 nds32_elf_ex9_reloc_jmp (info);
4539
35c08157
KLC		 4540 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4541 the fp value is set as gp, and it has be reverted for instruction
4542 setting fp. */
4543 fpbase_addr = elf_gp (output_bfd);
4544
4545 for (rel = relocs; rel < relend; rel++)
4546 {
4547 enum elf_nds32_reloc_type r_type;
4548 reloc_howto_type *howto = NULL;
4549 unsigned long r_symndx;
4550 struct elf_link_hash_entry *h = NULL;
4551 Elf_Internal_Sym *sym = NULL;
4552 asection *sec;
4553 bfd_vma relocation;
4554
4555 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4556 ensure it's zero (we use REL relocs, not RELA). Therefore this
4557 should be assigning zero to `addend', but for clarity we use
4558 `r_addend'. */
4559
4560 bfd_vma addend = rel->r_addend;
4561 bfd_vma offset = rel->r_offset;
4562
4563 r_type = ELF32_R_TYPE (rel->r_info);
4564 if (r_type >= R_NDS32_max)
4565 {
695344c0 4566 /* xgettext:c-format */
4eca0228
AM		 4567 _bfd_error_handler (_("%B: error: unknown relocation type %d."),
4568 input_bfd, r_type);
35c08157
KLC		 4569 bfd_set_error (bfd_error_bad_value);
4570 ret = FALSE;
4571 continue;
4572 }
4573
4574 if (r_type == R_NDS32_GNU_VTENTRY
4575 || r_type == R_NDS32_GNU_VTINHERIT
4576 || r_type == R_NDS32_NONE
4577 || r_type == R_NDS32_RELA_GNU_VTENTRY
4578 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4579 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4580 || r_type == R_NDS32_DATA
1c8f6a4d 4581 || r_type == R_NDS32_TRAN
0c4bd9d9 4582 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC		 4583 continue;
4584
0c4bd9d9
KLC		 4585 /* If we enter the fp-as-gp region. Resolve the address
4586 of best fp-base. */
35c08157
KLC		 4587 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4588 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4589 {
4590 int dist;
4591
4592 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4593 dist = rel->r_addend >> 16;
4594 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4595 local_syms, symtab_hdr);
4596 }
4597 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4598 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4599 {
4600 fpbase_addr = elf_gp (output_bfd);
4601 }
4602
4603 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4604 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4605 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC		 4606 continue;
4607
4608 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4609 r_symndx = ELF32_R_SYM (rel->r_info);
4610
4611 /* This is a final link. */
4612 sym = NULL;
4613 sec = NULL;
4614 h = NULL;
4615
4616 if (r_symndx < symtab_hdr->sh_info)
4617 {
4618 /* Local symbol. */
4619 sym = local_syms + r_symndx;
4620 sec = local_sections[r_symndx];
4621
4622 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4623 addend = rel->r_addend;
4624 }
4625 else
4626 {
4627 /* External symbol. */
4628 bfd_boolean warned, ignored, unresolved_reloc;
4629 int symndx = r_symndx - symtab_hdr->sh_info;
4630
4631 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4632 r_symndx, symtab_hdr, sym_hashes, h, sec,
4633 relocation, unresolved_reloc, warned,
4634 ignored);
4635
4636 /* la $fp, _FP_BASE_ is per-function (region).
4637 Handle it specially. */
4638 switch ((int) r_type)
4639 {
4640 case R_NDS32_SDA19S0_RELA:
4641 case R_NDS32_SDA15S0_RELA:
4642 case R_NDS32_20_RELA:
4643 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4644 FP_BASE_NAME) == 0)
4645 {
4646 relocation = fpbase_addr;
4647 break;
4648 }
4649 }
4650
4651 }
4652
0e1862bb 4653 if (bfd_link_relocatable (info))
35c08157
KLC		 4654 {
4655 /* This is a relocatable link. We don't have to change
4656 anything, unless the reloc is against a section symbol,
4657 in which case we have to adjust according to where the
4658 section symbol winds up in the output section. */
4659 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4660 rel->r_addend += sec->output_offset + sym->st_value;
4661
4662 continue;
4663 }
4664
4665 /* Sanity check the address. */
4666 if (offset > high_address)
4667 {
4668 r = bfd_reloc_outofrange;
4669 goto check_reloc;
4670 }
4671
4672 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4673 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4674 || r_type >= R_NDS32_RELAX_ENTRY)
4675 continue;
4676
4677 switch ((int) r_type)
4678 {
4679 case R_NDS32_GOTOFF:
4680 /* Relocation is relative to the start of the global offset
4681 table (for ld24 rx, #uimm24), e.g. access at label+addend
4682
4683 ld24 rx. #label@GOTOFF + addend
4684 sub rx, r12. */
4685 case R_NDS32_GOTOFF_HI20:
4686 case R_NDS32_GOTOFF_LO12:
4687 case R_NDS32_GOTOFF_LO15:
4688 case R_NDS32_GOTOFF_LO19:
4689 BFD_ASSERT (sgot != NULL);
4690
4691 relocation -= elf_gp (output_bfd);
4692 break;
4693
4694 case R_NDS32_9_PLTREL:
4695 case R_NDS32_25_PLTREL:
4696 /* Relocation is to the entry for this symbol in the
4697 procedure linkage table. */
4698
4699 /* The native assembler will generate a 25_PLTREL reloc
4700 for a local symbol if you assemble a call from one
4701 section to another when using -K pic. */
4702 if (h == NULL)
4703 break;
4704
4705 if (h->forced_local)
4706 break;
4707
4708 /* We didn't make a PLT entry for this symbol. This
4709 happens when statically linking PIC code, or when
4710 using -Bsymbolic. */
4711 if (h->plt.offset == (bfd_vma) - 1)
4712 break;
4713
4714 relocation = (splt->output_section->vma
4715 + splt->output_offset + h->plt.offset);
4716 break;
4717
4718 case R_NDS32_PLT_GOTREL_HI20:
4719 case R_NDS32_PLT_GOTREL_LO12:
4720 case R_NDS32_PLT_GOTREL_LO15:
4721 case R_NDS32_PLT_GOTREL_LO19:
4722 case R_NDS32_PLT_GOTREL_LO20:
4723 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4724 {
4725 /* We didn't make a PLT entry for this symbol. This
4726 happens when statically linking PIC code, or when
4727 using -Bsymbolic. */
4728 relocation -= elf_gp (output_bfd);
4729 break;
4730 }
4731
4732 relocation = (splt->output_section->vma
4733 + splt->output_offset + h->plt.offset);
4734
4735 relocation -= elf_gp (output_bfd);
4736 break;
4737
4738 case R_NDS32_PLTREL_HI20:
4739 case R_NDS32_PLTREL_LO12:
4740
4741 /* Relocation is to the entry for this symbol in the
4742 procedure linkage table. */
4743
4744 /* The native assembler will generate a 25_PLTREL reloc
4745 for a local symbol if you assemble a call from one
4746 section to another when using -K pic. */
4747 if (h == NULL)
4748 break;
4749
4750 if (h->forced_local)
4751 break;
4752
4753 if (h->plt.offset == (bfd_vma) - 1)
4754 /* We didn't make a PLT entry for this symbol. This
4755 happens when statically linking PIC code, or when
4756 using -Bsymbolic. */
4757 break;
4758
4759 if (splt == NULL)
4760 break;
4761
4762 relocation = (splt->output_section->vma
4763 + splt->output_offset
4764 + h->plt.offset + 4)
4765 - (input_section->output_section->vma
4766 + input_section->output_offset
4767 + rel->r_offset);
4768
4769 break;
4770
4771 case R_NDS32_GOTPC20:
4772 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4773 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4774 relocation = elf_gp (output_bfd);
4775 break;
4776
4777 case R_NDS32_GOTPC_HI20:
4778 case R_NDS32_GOTPC_LO12:
4779 {
4780 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4781 bl .+4
4782 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4783 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4784 or
4785 bl .+4
4786 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4787 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4788 */
4789 relocation = elf_gp (output_bfd);
4790 relocation -= (input_section->output_section->vma
4791 + input_section->output_offset + rel->r_offset);
4792 break;
4793 }
4794
4795 case R_NDS32_GOT20:
4796 /* Fall through. */
4797 case R_NDS32_GOT_HI20:
4798 case R_NDS32_GOT_LO12:
4799 case R_NDS32_GOT_LO15:
4800 case R_NDS32_GOT_LO19:
4801 /* Relocation is to the entry for this symbol in the global
4802 offset table. */
4803 BFD_ASSERT (sgot != NULL);
4804
4805 if (h != NULL)
4806 {
4807 bfd_boolean dyn;
4808 bfd_vma off;
4809
4810 off = h->got.offset;
4811 BFD_ASSERT (off != (bfd_vma) - 1);
4812 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 4813 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4814 bfd_link_pic (info),
4815 h)
4816 || (bfd_link_pic (info)
35c08157
KLC		 4817 && (info->symbolic
4818 || h->dynindx == -1
4819 || h->forced_local) && h->def_regular))
4820 {
4821 /* This is actually a static link, or it is a
4822 -Bsymbolic link and the symbol is defined
4823 locally, or the symbol was forced to be local
4824 because of a version file. We must initialize
4825 this entry in the global offset table. Since the
4826 offset must always be a multiple of 4, we use the
4827 least significant bit to record whether we have
4828 initialized it already.
4829
4830 When doing a dynamic link, we create a .rela.got
4831 relocation entry to initialize the value. This
4832 is done in the finish_dynamic_symbol routine. */
4833 if ((off & 1) != 0)
4834 off &= ~1;
4835 else
4836 {
4837 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4838 h->got.offset |= 1;
4839 }
4840 }
4841 relocation = sgot->output_section->vma + sgot->output_offset + off
4842 - elf_gp (output_bfd);
4843 }
4844 else
4845 {
4846 bfd_vma off;
4847 bfd_byte *loc;
4848
4849 BFD_ASSERT (local_got_offsets != NULL
4850 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4851
4852 off = local_got_offsets[r_symndx];
4853
4854 /* The offset must always be a multiple of 4. We use
4855 the least significant bit to record whether we have
4856 already processed this entry. */
4857 if ((off & 1) != 0)
4858 off &= ~1;
4859 else
4860 {
4861 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4862
0e1862bb 4863 if (bfd_link_pic (info))
35c08157
KLC		 4864 {
4865 asection *srelgot;
4866 Elf_Internal_Rela outrel;
4867
4868 /* We need to generate a R_NDS32_RELATIVE reloc
4869 for the dynamic linker. */
4870 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4871 BFD_ASSERT (srelgot != NULL);
4872
4873 outrel.r_offset = (elf_gp (output_bfd)
4874 + sgot->output_offset + off);
4875 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4876 outrel.r_addend = relocation;
4877 loc = srelgot->contents;
4878 loc +=
4879 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4880 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4881 ++srelgot->reloc_count;
4882 }
4883 local_got_offsets[r_symndx] |= 1;
4884 }
4885 relocation = sgot->output_section->vma + sgot->output_offset + off
4886 - elf_gp (output_bfd);
4887 }
4888
4889 break;
4890
4891 case R_NDS32_16_RELA:
4892 case R_NDS32_20_RELA:
4893 case R_NDS32_5_RELA:
4894 case R_NDS32_32_RELA:
4895 case R_NDS32_9_PCREL_RELA:
4896 case R_NDS32_WORD_9_PCREL_RELA:
4897 case R_NDS32_10_UPCREL_RELA:
4898 case R_NDS32_15_PCREL_RELA:
4899 case R_NDS32_17_PCREL_RELA:
4900 case R_NDS32_25_PCREL_RELA:
4901 case R_NDS32_HI20_RELA:
4902 case R_NDS32_LO12S3_RELA:
4903 case R_NDS32_LO12S2_RELA:
4904 case R_NDS32_LO12S2_DP_RELA:
4905 case R_NDS32_LO12S2_SP_RELA:
4906 case R_NDS32_LO12S1_RELA:
4907 case R_NDS32_LO12S0_RELA:
4908 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4909 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 4910 && (input_section->flags & SEC_ALLOC) != 0
4911 && (eliminate_gc_relocs == 0
4912 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4913 && ((r_type != R_NDS32_9_PCREL_RELA
4914 && r_type != R_NDS32_WORD_9_PCREL_RELA
4915 && r_type != R_NDS32_10_UPCREL_RELA
4916 && r_type != R_NDS32_15_PCREL_RELA
4917 && r_type != R_NDS32_17_PCREL_RELA
4918 && r_type != R_NDS32_25_PCREL_RELA
4919 && !(r_type == R_NDS32_32_RELA
4920 && strcmp (input_section->name, ".eh_frame") == 0))
4921 || (h != NULL && h->dynindx != -1
4922 && (!info->symbolic || !h->def_regular))))
4923 {
4924 Elf_Internal_Rela outrel;
4925 bfd_boolean skip, relocate;
4926 bfd_byte *loc;
4927
4928 /* When generating a shared object, these relocations
4929 are copied into the output file to be resolved at run
4930 time. */
4931
4932 if (sreloc == NULL)
4933 {
4934 const char *name;
4935
4936 name = bfd_elf_string_from_elf_section
4937 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4938 elf_section_data (input_section)->rela.hdr->sh_name);
4939 if (name == NULL)
4940 return FALSE;
4941
4942 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4943 && strcmp (bfd_get_section_name (input_bfd,
4944 input_section),
4945 name + 5) == 0);
4946
4947 sreloc = bfd_get_section_by_name (dynobj, name);
4948 BFD_ASSERT (sreloc != NULL);
4949 }
4950
4951 skip = FALSE;
4952 relocate = FALSE;
4953
4954 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4955 info,
4956 input_section,
4957 rel->r_offset);
4958 if (outrel.r_offset == (bfd_vma) - 1)
4959 skip = TRUE;
4960 else if (outrel.r_offset == (bfd_vma) - 2)
4961 skip = TRUE, relocate = TRUE;
4962 outrel.r_offset += (input_section->output_section->vma
4963 + input_section->output_offset);
4964
4965 if (skip)
4966 memset (&outrel, 0, sizeof outrel);
4967 else if (r_type == R_NDS32_17_PCREL_RELA
4968 || r_type == R_NDS32_15_PCREL_RELA
4969 || r_type == R_NDS32_25_PCREL_RELA)
4970 {
4971 BFD_ASSERT (h != NULL && h->dynindx != -1);
4972 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4973 outrel.r_addend = rel->r_addend;
4974 }
4975 else
4976 {
4977 /* h->dynindx may be -1 if this symbol was marked to
4978 become local. */
4979 if (h == NULL
4980 || ((info->symbolic || h->dynindx == -1)
4981 && h->def_regular))
4982 {
4983 relocate = TRUE;
4984 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4985 outrel.r_addend = relocation + rel->r_addend;
4986 }
4987 else
4988 {
4989 BFD_ASSERT (h->dynindx != -1);
4990 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4991 outrel.r_addend = rel->r_addend;
4992 }
4993 }
4994
4995 loc = sreloc->contents;
4996 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4997 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4998 ++sreloc->reloc_count;
4999
5000 /* If this reloc is against an external symbol, we do
5001 not want to fiddle with the addend. Otherwise, we
5002 need to include the symbol value so that it becomes
5003 an addend for the dynamic reloc. */
5004 if (!relocate)
5005 continue;
5006 }
5007 break;
5008
5009 case R_NDS32_25_ABS_RELA:
0e1862bb 5010 if (bfd_link_pic (info))
35c08157 5011 {
4eca0228 5012 _bfd_error_handler
1c8f6a4d
KLC		 5013 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5014 "mode."), bfd_get_filename (input_bfd));
35c08157
KLC		 5015 return FALSE;
5016 }
5017 break;
5018
5019 case R_NDS32_9_PCREL:
5020 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5021 contents, offset,
5022 sec, relocation, addend);
5023 goto check_reloc;
5024
5025 case R_NDS32_HI20:
5026 {
5027 Elf_Internal_Rela *lorel;
5028
5029 /* We allow an arbitrary number of HI20 relocs before the
5030 LO12 reloc. This permits gcc to emit the HI and LO relocs
5031 itself. */
5032 for (lorel = rel + 1;
5033 (lorel < relend
5034 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5035 continue;
5036 if (lorel < relend
5037 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5038 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5039 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5040 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5041 {
5042 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5043 contents, relocation + addend);
5044 r = bfd_reloc_ok;
5045 }
5046 else
5047 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 5048 contents, offset, relocation,
5049 addend);
35c08157
KLC		 5050 }
5051
5052 goto check_reloc;
5053
5054 case R_NDS32_GOT17S2_RELA:
5055 case R_NDS32_GOT15S2_RELA:
5056 {
5057 bfd_vma off;
5058
5059 BFD_ASSERT (sgot != NULL);
5060
5061 if (h != NULL)
5062 {
5063 bfd_boolean dyn;
5064
5065 off = h->got.offset;
5066 BFD_ASSERT (off != (bfd_vma) - 1);
5067
5068 dyn = htab->root.dynamic_sections_created;
5069 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L		 5070 (dyn, bfd_link_pic (info), h)
5071 || (bfd_link_pic (info)
5072 && (info->symbolic
5073 || h->dynindx == -1
5074 || h->forced_local)
5075 && h->def_regular))
35c08157
KLC		 5076 {
5077 /* This is actually a static link, or it is a
5078 -Bsymbolic link and the symbol is defined
5079 locally, or the symbol was forced to be local
5080 because of a version file. We must initialize
5081 this entry in the global offset table. Since the
5082 offset must always be a multiple of 4, we use the
5083 least significant bit to record whether we have
5084 initialized it already.
5085
5086 When doing a dynamic link, we create a .rela.got
5087 relocation entry to initialize the value. This
5088 is done in the finish_dynamic_symbol routine. */
5089 if ((off & 1) != 0)
5090 off &= ~1;
5091 else
5092 {
5093 bfd_put_32 (output_bfd, relocation,
5094 sgot->contents + off);
5095 h->got.offset |= 1;
5096 }
5097 }
5098 }
5099 else
5100 {
5101 bfd_byte *loc;
5102
5103 BFD_ASSERT (local_got_offsets != NULL
5104 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5105
5106 off = local_got_offsets[r_symndx];
5107
5108 /* The offset must always be a multiple of 4. We use
5109 the least significant bit to record whether we have
5110 already processed this entry. */
5111 if ((off & 1) != 0)
5112 off &= ~1;
5113 else
5114 {
5115 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5116
0e1862bb 5117 if (bfd_link_pic (info))
35c08157
KLC		 5118 {
5119 asection *srelgot;
5120 Elf_Internal_Rela outrel;
5121
5122 /* We need to generate a R_NDS32_RELATIVE reloc
5123 for the dynamic linker. */
5124 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5125 BFD_ASSERT (srelgot != NULL);
5126
5127 outrel.r_offset = (elf_gp (output_bfd)
5128 + sgot->output_offset + off);
5129 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5130 outrel.r_addend = relocation;
5131 loc = srelgot->contents;
5132 loc +=
5133 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5134 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5135 ++srelgot->reloc_count;
5136 }
5137 local_got_offsets[r_symndx] |= 1;
5138 }
5139 }
5140 relocation = sgot->output_section->vma + sgot->output_offset + off
5141 - elf_gp (output_bfd);
5142 }
5143 if (relocation & align)
5144 {
5145 /* Incorrect alignment. */
4eca0228 5146 _bfd_error_handler
35c08157
KLC		 5147 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5148 ret = FALSE;
5149 r = bfd_reloc_dangerous;
5150 goto check_reloc;
5151 }
5152 break;
5153
5154 case R_NDS32_SDA16S3_RELA:
5155 case R_NDS32_SDA15S3_RELA:
5156 case R_NDS32_SDA15S3:
5157 align = 0x7;
5158 goto handle_sda;
5159
5160 case R_NDS32_SDA17S2_RELA:
5161 case R_NDS32_SDA15S2_RELA:
5162 case R_NDS32_SDA12S2_SP_RELA:
5163 case R_NDS32_SDA12S2_DP_RELA:
5164 case R_NDS32_SDA15S2:
5165 case R_NDS32_SDA_FP7U2_RELA:
5166 align = 0x3;
5167 goto handle_sda;
5168
5169 case R_NDS32_SDA18S1_RELA:
5170 case R_NDS32_SDA15S1_RELA:
5171 case R_NDS32_SDA15S1:
5172 align = 0x1;
5173 goto handle_sda;
5174
5175 case R_NDS32_SDA19S0_RELA:
5176 case R_NDS32_SDA15S0_RELA:
5177 case R_NDS32_SDA15S0:
5178 {
5179 align = 0x0;
5180handle_sda:
5181 BFD_ASSERT (sec != NULL);
5182
5183 /* If the symbol is in the abs section, the out_bfd will be null.
5184 This happens when the relocation has a symbol@GOTOFF. */
5185 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5186 if (r != bfd_reloc_ok)
5187 {
4eca0228 5188 _bfd_error_handler
35c08157
KLC		 5189 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5190 ret = FALSE;
5191 goto check_reloc;
5192 }
5193
5194 /* At this point `relocation' contains the object's
5195 address. */
5196 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5197 {
5198 relocation -= fpbase_addr;
5199 }
5200 else
5201 relocation -= gp;
5202 /* Now it contains the offset from _SDA_BASE_. */
5203
5204 /* Make sure alignment is correct. */
5205
5206 if (relocation & align)
5207 {
5208 /* Incorrect alignment. */
4eca0228 5209 _bfd_error_handler
695344c0 5210 /* xgettext:c-format */
35c08157
KLC		 5211 (_("%B(%A): warning: unaligned small data access of type %d."),
5212 input_bfd, input_section, r_type);
5213 ret = FALSE;
5214 goto check_reloc;
5215 }
5216 }
5217
5218 break;
5219 case R_NDS32_17IFC_PCREL_RELA:
5220 case R_NDS32_10IFCU_PCREL_RELA:
5221 /* do nothing */
5222 break;
5223
1c8f6a4d
KLC		 5224 case R_NDS32_TLS_LE_HI20:
5225 case R_NDS32_TLS_LE_LO12:
5226 case R_NDS32_TLS_LE_20:
5227 case R_NDS32_TLS_LE_15S0:
5228 case R_NDS32_TLS_LE_15S1:
5229 case R_NDS32_TLS_LE_15S2:
5230 if (elf_hash_table (info)->tls_sec != NULL)
5231 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5232 break;
5233 case R_NDS32_TLS_IE_HI20:
5234 case R_NDS32_TLS_IE_LO12S2:
5235 {
5236 /* Relocation is to the entry for this symbol in the global
5237 offset table. */
5238 unsigned int tls_type;
5239 asection *srelgot;
5240 Elf_Internal_Rela outrel;
5241 bfd_vma off;
5242 bfd_byte *loc;
5243 int indx = 0;
5244
5245 BFD_ASSERT (sgot != NULL);
5246 if (h != NULL)
5247 {
5248 bfd_boolean dyn;
5249
5250 off = h->got.offset;
5251 BFD_ASSERT (off != (bfd_vma) - 1);
5252 dyn = htab->root.dynamic_sections_created;
5253 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5254 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5255 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5256 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5257 indx = h->dynindx;
5258 }
5259 else
5260 {
5261 /* Never happen currently. */
5262 BFD_ASSERT (local_got_offsets != NULL
5263 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5264
5265 off = local_got_offsets[r_symndx];
5266
5267 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5268 }
5269 relocation = sgot->output_section->vma + sgot->output_offset + off;
5270
5271 if (r_type == R_NDS32_TLS_IE_LO12S2)
5272 break;
5273
5274 /* The offset must always be a multiple of 4. We use
5275 the least significant bit to record whether we have
5276 already processed this entry. */
5277 if ((off & 1) != 0)
5278 off &= ~1;
5279 else
5280 {
5281 bfd_boolean need_relocs = FALSE;
5282 srelgot = htab->srelgot;
0e1862bb 5283 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC		 5284 && (h == NULL
5285 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5286 || h->root.type != bfd_link_hash_undefweak))
5287 {
5288 need_relocs = TRUE;
5289 BFD_ASSERT (srelgot != NULL);
5290 }
5291 if (tls_type & GOT_TLS_IE)
5292 {
5293 if (need_relocs)
5294 {
5295 if (h->dynindx == 0)
5296 outrel.r_addend = relocation - dtpoff_base (info);
5297 else
5298 outrel.r_addend = 0;
5299 outrel.r_offset = (sgot->output_section->vma
5300 + sgot->output_offset
5301 + off);
5302 outrel.r_info =
5303 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5304
5305 loc = srelgot->contents;
5306 loc +=
5307 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5308 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5309 ++srelgot->reloc_count;
5310 }
5311 else
5312 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5313 sgot->contents + off);
5314 }
5315 }
5316 }
5317 break;
5318
35c08157
KLC		 5319 /* DON'T fall through. */
5320
5321 default:
5322 /* OLD_NDS32_RELOC. */
5323
5324 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5325 contents, offset, relocation, addend);
5326 goto check_reloc;
5327 }
5328
5329 switch ((int) r_type)
5330 {
5331 case R_NDS32_20_RELA:
5332 case R_NDS32_5_RELA:
5333 case R_NDS32_9_PCREL_RELA:
5334 case R_NDS32_WORD_9_PCREL_RELA:
5335 case R_NDS32_10_UPCREL_RELA:
5336 case R_NDS32_15_PCREL_RELA:
5337 case R_NDS32_17_PCREL_RELA:
5338 case R_NDS32_25_PCREL_RELA:
5339 case R_NDS32_25_ABS_RELA:
5340 case R_NDS32_HI20_RELA:
5341 case R_NDS32_LO12S3_RELA:
5342 case R_NDS32_LO12S2_RELA:
5343 case R_NDS32_LO12S2_DP_RELA:
5344 case R_NDS32_LO12S2_SP_RELA:
5345 case R_NDS32_LO12S1_RELA:
5346 case R_NDS32_LO12S0_RELA:
5347 case R_NDS32_LO12S0_ORI_RELA:
5348 case R_NDS32_SDA16S3_RELA:
5349 case R_NDS32_SDA17S2_RELA:
5350 case R_NDS32_SDA18S1_RELA:
5351 case R_NDS32_SDA19S0_RELA:
5352 case R_NDS32_SDA15S3_RELA:
5353 case R_NDS32_SDA15S2_RELA:
5354 case R_NDS32_SDA12S2_DP_RELA:
5355 case R_NDS32_SDA12S2_SP_RELA:
5356 case R_NDS32_SDA15S1_RELA:
5357 case R_NDS32_SDA15S0_RELA:
5358 case R_NDS32_SDA_FP7U2_RELA:
5359 case R_NDS32_9_PLTREL:
5360 case R_NDS32_25_PLTREL:
5361 case R_NDS32_GOT20:
5362 case R_NDS32_GOT_HI20:
5363 case R_NDS32_GOT_LO12:
5364 case R_NDS32_GOT_LO15:
5365 case R_NDS32_GOT_LO19:
5366 case R_NDS32_GOT15S2_RELA:
5367 case R_NDS32_GOT17S2_RELA:
5368 case R_NDS32_GOTPC20:
5369 case R_NDS32_GOTPC_HI20:
5370 case R_NDS32_GOTPC_LO12:
5371 case R_NDS32_GOTOFF:
5372 case R_NDS32_GOTOFF_HI20:
5373 case R_NDS32_GOTOFF_LO12:
5374 case R_NDS32_GOTOFF_LO15:
5375 case R_NDS32_GOTOFF_LO19:
5376 case R_NDS32_PLTREL_HI20:
5377 case R_NDS32_PLTREL_LO12:
5378 case R_NDS32_PLT_GOTREL_HI20:
5379 case R_NDS32_PLT_GOTREL_LO12:
5380 case R_NDS32_PLT_GOTREL_LO15:
5381 case R_NDS32_PLT_GOTREL_LO19:
5382 case R_NDS32_PLT_GOTREL_LO20:
5383 case R_NDS32_17IFC_PCREL_RELA:
5384 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5385 case R_NDS32_TLS_LE_HI20:
5386 case R_NDS32_TLS_LE_LO12:
5387 case R_NDS32_TLS_IE_HI20:
5388 case R_NDS32_TLS_IE_LO12S2:
5389 case R_NDS32_TLS_LE_20:
5390 case R_NDS32_TLS_LE_15S0:
5391 case R_NDS32_TLS_LE_15S1:
5392 case R_NDS32_TLS_LE_15S2:
35c08157 5393 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5394 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5395 r = nds32_elf_final_link_relocate (howto, input_bfd,
5396 input_section, contents,
5397 rel->r_offset, relocation,
5398 rel->r_addend);
5399 break;
5400
5401 default:
5402 /* All other relocs can use default handler. */
5403 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5404 contents, rel->r_offset,
5405 relocation, rel->r_addend);
5406 break;
5407 }
5408
5409check_reloc:
5410
5411 if (r != bfd_reloc_ok)
5412 {
5413 /* FIXME: This should be generic enough to go in a utility. */
5414 const char *name;
5415
5416 if (h != NULL)
5417 name = h->root.root.string;
5418 else
5419 {
5420 name = bfd_elf_string_from_elf_section
5421 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5422 if (name == NULL || *name == '\0')
5423 name = bfd_section_name (input_bfd, sec);
5424 }
5425
5426 if (errmsg != NULL)
5427 goto common_error;
5428
5429 switch (r)
5430 {
5431 case bfd_reloc_overflow:
1a72702b
AM		 5432 (*info->callbacks->reloc_overflow)
5433 (info, (h ? &h->root : NULL), name, howto->name,
5434 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 5435 break;
5436
5437 case bfd_reloc_undefined:
1a72702b
AM		 5438 (*info->callbacks->undefined_symbol)
5439 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC		 5440 break;
5441
5442 case bfd_reloc_outofrange:
5443 errmsg = _("internal error: out of range error");
5444 goto common_error;
5445
5446 case bfd_reloc_notsupported:
5447 errmsg = _("internal error: unsupported relocation error");
5448 goto common_error;
5449
5450 case bfd_reloc_dangerous:
5451 errmsg = _("internal error: dangerous error");
5452 goto common_error;
5453
5454 default:
5455 errmsg = _("internal error: unknown error");
5456 /* Fall through. */
5457
1a72702b
AM		 5458 common_error:
5459 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5460 input_section, offset);
35c08157
KLC		 5461 break;
5462 }
5463 }
5464 }
5465
5466 return ret;
5467}
5468
5469/* Finish up dynamic symbol handling. We set the contents of various
5470 dynamic sections here. */
5471
5472static bfd_boolean
5473nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5474 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5475{
5476 struct elf_nds32_link_hash_table *htab;
5477 bfd_byte *loc;
5478
5479 htab = nds32_elf_hash_table (info);
5480
5481 if (h->plt.offset != (bfd_vma) - 1)
5482 {
5483 asection *splt;
5484 asection *sgot;
5485 asection *srela;
5486
5487 bfd_vma plt_index;
5488 bfd_vma got_offset;
5489 bfd_vma local_plt_offset;
5490 Elf_Internal_Rela rela;
5491
5492 /* This symbol has an entry in the procedure linkage table. Set
5493 it up. */
5494
5495 BFD_ASSERT (h->dynindx != -1);
5496
5497 splt = htab->splt;
5498 sgot = htab->sgotplt;
5499 srela = htab->srelplt;
5500 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5501
5502 /* Get the index in the procedure linkage table which
5503 corresponds to this symbol. This is the index of this symbol
5504 in all the symbols for which we are making plt entries. The
5505 first entry in the procedure linkage table is reserved. */
5506 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5507
5508 /* Get the offset into the .got table of the entry that
5509 corresponds to this function. Each .got entry is 4 bytes.
5510 The first three are reserved. */
5511 got_offset = (plt_index + 3) * 4;
5512
5513 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5514 if (!bfd_link_pic (info))
35c08157
KLC		 5515 {
5516 unsigned long insn;
5517
5518 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5519 + sgot->output_offset + got_offset) >> 12)
5520 & 0xfffff);
5521 bfd_putb32 (insn, splt->contents + h->plt.offset);
5522
5523 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5524 + sgot->output_offset + got_offset) & 0x0fff)
5525 >> 2);
5526 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5527
5528 insn = PLT_ENTRY_WORD2;
5529 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5530
5531 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5532 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5533
5534 insn = PLT_ENTRY_WORD4
5535 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5536 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5537 local_plt_offset = 12;
5538 }
5539 else
5540 {
5541 /* sda_base must be set at this time. */
5542 unsigned long insn;
5543 long offset;
5544
5545 /* FIXME, sda_base is 65536, it will damage opcode. */
5546 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5547 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5548 - elf_gp (output_bfd);
5549 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5550 bfd_putb32 (insn, splt->contents + h->plt.offset);
5551
5552 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5553 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5554
5555 insn = PLT_PIC_ENTRY_WORD2;
5556 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5557
5558 insn = PLT_PIC_ENTRY_WORD3;
5559 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5560
5561 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5562 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5563
5564 insn = PLT_PIC_ENTRY_WORD5
5565 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5566 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5567
5568 local_plt_offset = 16;
5569 }
5570
5571 /* Fill in the entry in the global offset table,
5572 so it will fall through to the next instruction for the first time. */
5573 bfd_put_32 (output_bfd,
5574 (splt->output_section->vma + splt->output_offset
5575 + h->plt.offset + local_plt_offset),
5576 sgot->contents + got_offset);
5577
5578 /* Fill in the entry in the .rela.plt section. */
5579 rela.r_offset = (sgot->output_section->vma
5580 + sgot->output_offset + got_offset);
5581 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5582 rela.r_addend = 0;
5583 loc = srela->contents;
5584 loc += plt_index * sizeof (Elf32_External_Rela);
5585 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5586
5587 if (!h->def_regular)
5588 {
5589 /* Mark the symbol as undefined, rather than as defined in
5590 the .plt section. Leave the value alone. */
5591 sym->st_shndx = SHN_UNDEF;
5592 if (!h->ref_regular_nonweak)
5593 sym->st_value = 0;
5594 }
5595 }
5596
5597 if (h->got.offset != (bfd_vma) - 1)
5598 {
5599 asection *sgot;
5600 asection *srela;
5601 Elf_Internal_Rela rela;
5602
5603 /* This symbol has an entry in the global offset table.
5604 Set it up. */
5605
5606 sgot = htab->sgot;
5607 srela = htab->srelgot;
5608 BFD_ASSERT (sgot != NULL && srela != NULL);
5609
5610 rela.r_offset = (sgot->output_section->vma
5611 + sgot->output_offset + (h->got.offset & ~1));
5612
5613 /* If this is a -Bsymbolic link, and the symbol is defined
5614 locally, we just want to emit a RELATIVE reloc. Likewise if
5615 the symbol was forced to be local because of a version file.
5616 The entry in the global offset table will already have been
5617 initialized in the relocate_section function. */
0e1862bb 5618 if (bfd_link_pic (info)
35c08157
KLC		 5619 && (info->symbolic
5620 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5621 {
5622 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5623 rela.r_addend = (h->root.u.def.value
5624 + h->root.u.def.section->output_section->vma
5625 + h->root.u.def.section->output_offset);
5626 }
5627 else
5628 {
5629 BFD_ASSERT ((h->got.offset & 1) == 0);
5630 bfd_put_32 (output_bfd, (bfd_vma) 0,
5631 sgot->contents + h->got.offset);
5632 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5633 rela.r_addend = 0;
5634 }
5635
5636 loc = srela->contents;
5637 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5638 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5639 ++srela->reloc_count;
5640 }
5641
5642 if (h->needs_copy)
5643 {
5644 asection *s;
5645 Elf_Internal_Rela rela;
5646
5647 /* This symbols needs a copy reloc. Set it up. */
5648
5649 BFD_ASSERT (h->dynindx != -1
5650 && (h->root.type == bfd_link_hash_defined
5651 || h->root.type == bfd_link_hash_defweak));
5652
5653 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5654 BFD_ASSERT (s != NULL);
5655
5656 rela.r_offset = (h->root.u.def.value
5657 + h->root.u.def.section->output_section->vma
5658 + h->root.u.def.section->output_offset);
5659 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5660 rela.r_addend = 0;
5661 loc = s->contents;
5662 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5663 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5664 ++s->reloc_count;
5665 }
5666
5667 /* Mark some specially defined symbols as absolute. */
5668 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5669 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5670 sym->st_shndx = SHN_ABS;
5671
5672 return TRUE;
5673}
5674
5675
5676/* Finish up the dynamic sections. */
5677
5678static bfd_boolean
5679nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5680{
5681 struct elf_nds32_link_hash_table *htab;
5682 bfd *dynobj;
5683 asection *sdyn;
5684 asection *sgot;
5685
5686 htab = nds32_elf_hash_table (info);
5687 dynobj = htab->root.dynobj;
5688
5689 sgot = htab->sgotplt;
5690 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5691
5692 if (htab->root.dynamic_sections_created)
5693 {
5694 asection *splt;
5695 Elf32_External_Dyn *dyncon, *dynconend;
5696
5697 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5698
5699 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5700 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5701
5702 for (; dyncon < dynconend; dyncon++)
5703 {
5704 Elf_Internal_Dyn dyn;
5705 asection *s;
5706
5707 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5708
5709 switch (dyn.d_tag)
5710 {
5711 default:
5712 break;
5713
5714 case DT_PLTGOT:
4ade44b7 5715 s = htab->sgotplt;
35c08157
KLC		 5716 goto get_vma;
5717 case DT_JMPREL:
4ade44b7 5718 s = htab->srelplt;
35c08157 5719 get_vma:
4ade44b7 5720 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 5721 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5722 break;
5723
5724 case DT_PLTRELSZ:
4ade44b7 5725 s = htab->srelplt;
35c08157
KLC		 5726 dyn.d_un.d_val = s->size;
5727 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5728 break;
5729
5730 case DT_RELASZ:
5731 /* My reading of the SVR4 ABI indicates that the
5732 procedure linkage table relocs (DT_JMPREL) should be
5733 included in the overall relocs (DT_RELA). This is
5734 what Solaris does. However, UnixWare can not handle
5735 that case. Therefore, we override the DT_RELASZ entry
5736 here to make it not include the JMPREL relocs. Since
5737 the linker script arranges for .rela.plt to follow all
5738 other relocation sections, we don't have to worry
5739 about changing the DT_RELA entry. */
5740 if (htab->srelplt != NULL)
5741 {
4ade44b7 5742 s = htab->srelplt;
35c08157
KLC		 5743 dyn.d_un.d_val -= s->size;
5744 }
5745 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5746 break;
5747 }
5748 }
5749
5750 /* Fill in the first entry in the procedure linkage table. */
5751 splt = htab->splt;
5752 if (splt && splt->size > 0)
5753 {
0e1862bb 5754 if (bfd_link_pic (info))
35c08157
KLC		 5755 {
5756 unsigned long insn;
5757 long offset;
5758
5759 /* FIXME, sda_base is 65536, it will damage opcode. */
5760 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5761 offset = sgot->output_section->vma + sgot->output_offset + 4
5762 - elf_gp (output_bfd);
5763 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5764 bfd_putb32 (insn, splt->contents);
5765
5766 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5767 /* here has a typo? */
5768 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5769 bfd_putb32 (insn, splt->contents + 4);
5770
5771 insn = PLT0_PIC_ENTRY_WORD2;
5772 bfd_putb32 (insn, splt->contents + 8);
5773
5774 insn = PLT0_PIC_ENTRY_WORD3;
5775 bfd_putb32 (insn, splt->contents + 12);
5776
5777 insn = PLT0_PIC_ENTRY_WORD4;
5778 bfd_putb32 (insn, splt->contents + 16);
5779
5780 insn = PLT0_PIC_ENTRY_WORD5;
5781 bfd_putb32 (insn, splt->contents + 20);
5782 }
5783 else
5784 {
5785 unsigned long insn;
5786 unsigned long addr;
5787
5788 /* addr = .got + 4 */
5789 addr = sgot->output_section->vma + sgot->output_offset + 4;
5790 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5791 bfd_putb32 (insn, splt->contents);
5792
5793 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5794 bfd_putb32 (insn, splt->contents + 4);
5795
5796 insn = PLT0_ENTRY_WORD2;
5797 bfd_putb32 (insn, splt->contents + 8);
5798
5799 insn = PLT0_ENTRY_WORD3;
5800 bfd_putb32 (insn, splt->contents + 12);
5801
5802 insn = PLT0_ENTRY_WORD4;
5803 bfd_putb32 (insn, splt->contents + 16);
5804 }
5805
5806 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5807 PLT_ENTRY_SIZE;
5808 }
5809 }
5810
5811 /* Fill in the first three entries in the global offset table. */
5812 if (sgot && sgot->size > 0)
5813 {
5814 if (sdyn == NULL)
5815 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5816 else
5817 bfd_put_32 (output_bfd,
5818 sdyn->output_section->vma + sdyn->output_offset,
5819 sgot->contents);
5820 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5821 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5822
5823 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5824 }
5825
5826 return TRUE;
5827}
5828\f
5829
5830/* Set the right machine number. */
5831
5832static bfd_boolean
5833nds32_elf_object_p (bfd *abfd)
5834{
5835 static unsigned int cur_arch = 0;
5836
5837 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5838 {
5839 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5840 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5841 }
5842
5843 switch (cur_arch)
5844 {
5845 default:
5846 case E_N1_ARCH:
5847 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5848 break;
5849 case E_N1H_ARCH:
5850 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5851 break;
5852 case E_NDS_ARCH_STAR_V2_0:
5853 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5854 break;
5855 case E_NDS_ARCH_STAR_V3_0:
5856 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5857 break;
5858 case E_NDS_ARCH_STAR_V3_M:
5859 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5860 break;
5861 }
5862
5863 return TRUE;
5864}
5865
5866/* Store the machine number in the flags field. */
5867
5868static void
5869nds32_elf_final_write_processing (bfd *abfd,
5870 bfd_boolean linker ATTRIBUTE_UNUSED)
5871{
5872 unsigned long val;
5873 static unsigned int cur_mach = 0;
5874
5875 if (bfd_mach_n1 != bfd_get_mach (abfd))
5876 {
5877 cur_mach = bfd_get_mach (abfd);
5878 }
5879
5880 switch (cur_mach)
5881 {
5882 case bfd_mach_n1:
5883 /* Only happen when object is empty, since the case is abandon. */
5884 val = E_N1_ARCH;
5885 val |= E_NDS_ABI_AABI;
5886 val |= E_NDS32_ELF_VER_1_4;
5887 break;
5888 case bfd_mach_n1h:
5889 val = E_N1H_ARCH;
5890 break;
5891 case bfd_mach_n1h_v2:
5892 val = E_NDS_ARCH_STAR_V2_0;
5893 break;
5894 case bfd_mach_n1h_v3:
5895 val = E_NDS_ARCH_STAR_V3_0;
5896 break;
5897 case bfd_mach_n1h_v3m:
5898 val = E_NDS_ARCH_STAR_V3_M;
5899 break;
5900 default:
5901 val = 0;
5902 break;
5903 }
5904
5905 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5906 elf_elfheader (abfd)->e_flags |= val;
5907}
5908
5909/* Function to keep NDS32 specific file flags. */
5910
5911static bfd_boolean
5912nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5913{
5914 BFD_ASSERT (!elf_flags_init (abfd)
5915 || elf_elfheader (abfd)->e_flags == flags);
5916
5917 elf_elfheader (abfd)->e_flags = flags;
5918 elf_flags_init (abfd) = TRUE;
5919 return TRUE;
5920}
5921
5922static unsigned int
5923convert_e_flags (unsigned int e_flags, unsigned int arch)
5924{
5925 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5926 {
5927 /* From 0.9 to 1.0. */
5928 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5929
5930 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5931 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5932 if (arch == E_NDS_ARCH_STAR_V1_0)
5933 {
5934 /* Done. */
5935 return e_flags;
5936 }
5937 }
5938
5939 /* From 1.0 to 2.0. */
5940 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5941
5942 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5943 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5944
5945 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5946 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5947 return e_flags;
5948}
5949
5950static bfd_boolean
5951nds32_check_vec_size (bfd *ibfd)
5952{
5953 static unsigned int nds32_vec_size = 0;
5954
5955 asection *sec_t = NULL;
5956 bfd_byte *contents = NULL;
5957
5958 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5959
5960 if (sec_t && sec_t->size >= 4)
5961 {
5962 /* Get vec_size in file. */
5963 unsigned int flag_t;
5964
0c4bd9d9 5965 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC		 5966 flag_t = bfd_get_32 (ibfd, contents);
5967
5968 /* The value could only be 4 or 16. */
5969
5970 if (!nds32_vec_size)
5971 /* Set if not set yet. */
5972 nds32_vec_size = (flag_t & 0x3);
5973 else if (nds32_vec_size != (flag_t & 0x3))
5974 {
4eca0228 5975 _bfd_error_handler
695344c0 5976 /* xgettext:c-format */
4eca0228
AM		 5977 (_("%B: ISR vector size mismatch"
5978 " with previous modules, previous %u-byte, current %u-byte"),
5979 ibfd,
5980 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5981 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC		 5982 return FALSE;
5983 }
5984 else
5985 /* Only keep the first vec_size section. */
5986 sec_t->flags |= SEC_EXCLUDE;
5987 }
5988
5989 return TRUE;
5990}
5991
5992/* Merge backend specific data from an object file to the output
5993 object file when linking. */
5994
5995static bfd_boolean
50e03d47 5996nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 5997{
50e03d47 5998 bfd *obfd = info->output_bfd;
35c08157
KLC		 5999 flagword out_flags;
6000 flagword in_flags;
6001 flagword out_16regs;
6002 flagword in_no_mac;
6003 flagword out_no_mac;
6004 flagword in_16regs;
6005 flagword out_version;
6006 flagword in_version;
6007 flagword out_fpu_config;
6008 flagword in_fpu_config;
6009
6010 /* TODO: Revise to use object-attributes instead. */
6011 if (!nds32_check_vec_size (ibfd))
6012 return FALSE;
6013
6014 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6015 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6016 return TRUE;
6017
6018 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6019 {
4eca0228 6020 _bfd_error_handler
35c08157
KLC		 6021 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6022
6023 bfd_set_error (bfd_error_bad_value);
6024 return FALSE;
6025 }
6026
6027 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6028 if (in_version == E_NDS32_ELF_VER_1_2)
6029 {
4eca0228 6030 _bfd_error_handler
35c08157
KLC		 6031 (_("%B: warning: Older version of object file encountered, "
6032 "Please recompile with current tool chain."), ibfd);
6033 }
6034
6035 /* We may need to merge V1 and V2 arch object files to V2. */
6036 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6037 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6038 {
6039 /* Need to convert version. */
6040 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6041 == E_NDS_ARCH_STAR_RESERVED)
6042 {
6043 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6044 }
6045 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6046 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6047 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6048 {
6049 elf_elfheader (obfd)->e_flags =
6050 convert_e_flags (elf_elfheader (obfd)->e_flags,
6051 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6052 }
6053 else
6054 {
6055 elf_elfheader (ibfd)->e_flags =
6056 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6057 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6058 }
6059 }
6060
6061 /* Extract some flags. */
6062 in_flags = elf_elfheader (ibfd)->e_flags
6063 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6064 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6065
6066 /* The following flags need special treatment. */
6067 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6068 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6069 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6070
6071 /* Extract some flags. */
6072 out_flags = elf_elfheader (obfd)->e_flags
6073 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6074 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6075
6076 /* The following flags need special treatment. */
6077 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6078 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6079 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6080 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6081 if (!elf_flags_init (obfd))
6082 {
6083 /* If the input is the default architecture then do not
6084 bother setting the flags for the output architecture,
6085 instead allow future merges to do this. If no future
6086 merges ever set these flags then they will retain their
6087 unitialised values, which surprise surprise, correspond
6088 to the default values. */
6089 if (bfd_get_arch_info (ibfd)->the_default)
6090 return TRUE;
6091
6092 elf_flags_init (obfd) = TRUE;
6093 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6094
6095 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6096 && bfd_get_arch_info (obfd)->the_default)
6097 {
6098 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6099 bfd_get_mach (ibfd));
6100 }
6101
6102 return TRUE;
6103 }
6104
6105 /* Check flag compatibility. */
6106 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6107 {
4eca0228 6108 _bfd_error_handler
35c08157
KLC		 6109 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6110
6111 bfd_set_error (bfd_error_bad_value);
6112 return FALSE;
6113 }
6114
6115 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6116 {
6117 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6118 {
4eca0228 6119 _bfd_error_handler
35c08157
KLC		 6120 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6121
6122 bfd_set_error (bfd_error_bad_value);
6123 return FALSE;
6124 }
6125 }
6126
6127 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6128 and perf ext1 and DIV are mergerd to perf ext1. */
6129 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6130 {
6131 elf_elfheader (obfd)->e_flags =
6132 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6133 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6134 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6135 ? E_NDS32_HAS_EXT_INST : 0)
6136 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6137 ? E_NDS32_HAS_EXT_INST : 0)
6138 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6139 | ((in_version > out_version) ? out_version : in_version);
6140 }
6141 else
6142 {
6143 if (in_version != out_version)
4eca0228 6144 _bfd_error_handler
695344c0 6145 /* xgettext:c-format */
4eca0228
AM		 6146 (_("%B: warning: Incompatible elf-versions %s and %s."),
6147 ibfd, nds32_elfver_strtab[out_version],
6148 nds32_elfver_strtab[in_version]);
35c08157
KLC		 6149
6150 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6151 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6152 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6153 | (in_version > out_version ? out_version : in_version);
6154 }
6155
6156 return TRUE;
6157}
6158
6159/* Display the flags field. */
6160
6161static bfd_boolean
6162nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6163{
6164 FILE *file = (FILE *) ptr;
6165
6166 BFD_ASSERT (abfd != NULL && ptr != NULL);
6167
6168 _bfd_elf_print_private_bfd_data (abfd, ptr);
6169
6170 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6171
6172 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6173 {
6174 default:
6175 case E_N1_ARCH:
6176 fprintf (file, _(": n1 instructions"));
6177 break;
6178 case E_N1H_ARCH:
6179 fprintf (file, _(": n1h instructions"));
6180 break;
6181 }
6182
6183 fputc ('\n', file);
6184
6185 return TRUE;
6186}
6187
6188static unsigned int
6189nds32_elf_action_discarded (asection *sec)
6190{
6191
6192 if (strncmp
6193 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6194 return 0;
6195
6196 return _bfd_elf_default_action_discarded (sec);
6197}
6198
6199static asection *
6200nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6201 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6202 Elf_Internal_Sym *sym)
6203{
6204 if (h != NULL)
6205 switch (ELF32_R_TYPE (rel->r_info))
6206 {
6207 case R_NDS32_GNU_VTINHERIT:
6208 case R_NDS32_GNU_VTENTRY:
6209 case R_NDS32_RELA_GNU_VTINHERIT:
6210 case R_NDS32_RELA_GNU_VTENTRY:
6211 return NULL;
6212 }
6213
6214 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6215}
6216
6217static bfd_boolean
6218nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6219 const Elf_Internal_Rela *relocs)
6220{
6221 /* Update the got entry reference counts for the section being removed. */
6222 Elf_Internal_Shdr *symtab_hdr;
6223 struct elf_link_hash_entry **sym_hashes;
6224 bfd_signed_vma *local_got_refcounts;
6225 const Elf_Internal_Rela *rel, *relend;
6226
6227 elf_section_data (sec)->local_dynrel = NULL;
6228
6229 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6230 sym_hashes = elf_sym_hashes (abfd);
6231 local_got_refcounts = elf_local_got_refcounts (abfd);
6232
6233 relend = relocs + sec->reloc_count;
6234 for (rel = relocs; rel < relend; rel++)
6235 {
6236 unsigned long r_symndx;
6237 struct elf_link_hash_entry *h = NULL;
6238
6239 r_symndx = ELF32_R_SYM (rel->r_info);
6240 if (r_symndx >= symtab_hdr->sh_info)
6241 {
6242 /* External symbol. */
6243 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6244 while (h->root.type == bfd_link_hash_indirect
6245 || h->root.type == bfd_link_hash_warning)
6246 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6247 }
6248
6249 switch (ELF32_R_TYPE (rel->r_info))
6250 {
6251 case R_NDS32_GOT_HI20:
6252 case R_NDS32_GOT_LO12:
6253 case R_NDS32_GOT_LO15:
6254 case R_NDS32_GOT_LO19:
6255 case R_NDS32_GOT17S2_RELA:
6256 case R_NDS32_GOT15S2_RELA:
6257 case R_NDS32_GOTOFF:
6258 case R_NDS32_GOTOFF_HI20:
6259 case R_NDS32_GOTOFF_LO12:
6260 case R_NDS32_GOTOFF_LO15:
6261 case R_NDS32_GOTOFF_LO19:
6262 case R_NDS32_GOT20:
6263 case R_NDS32_GOTPC_HI20:
6264 case R_NDS32_GOTPC_LO12:
6265 case R_NDS32_GOTPC20:
6266 if (h != NULL)
6267 {
6268 if (h->got.refcount > 0)
6269 h->got.refcount--;
6270 }
6271 else
6272 {
6273 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6274 local_got_refcounts[r_symndx]--;
6275 }
6276 break;
6277
6278 case R_NDS32_16_RELA:
6279 case R_NDS32_20_RELA:
6280 case R_NDS32_5_RELA:
6281 case R_NDS32_32_RELA:
6282 case R_NDS32_HI20_RELA:
6283 case R_NDS32_LO12S3_RELA:
6284 case R_NDS32_LO12S2_RELA:
6285 case R_NDS32_LO12S2_DP_RELA:
6286 case R_NDS32_LO12S2_SP_RELA:
6287 case R_NDS32_LO12S1_RELA:
6288 case R_NDS32_LO12S0_RELA:
6289 case R_NDS32_LO12S0_ORI_RELA:
6290 case R_NDS32_SDA16S3_RELA:
6291 case R_NDS32_SDA17S2_RELA:
6292 case R_NDS32_SDA18S1_RELA:
6293 case R_NDS32_SDA19S0_RELA:
6294 case R_NDS32_SDA15S3_RELA:
6295 case R_NDS32_SDA15S2_RELA:
6296 case R_NDS32_SDA12S2_DP_RELA:
6297 case R_NDS32_SDA12S2_SP_RELA:
6298 case R_NDS32_SDA15S1_RELA:
6299 case R_NDS32_SDA15S0_RELA:
6300 case R_NDS32_SDA_FP7U2_RELA:
6301 case R_NDS32_15_PCREL_RELA:
6302 case R_NDS32_17_PCREL_RELA:
6303 case R_NDS32_25_PCREL_RELA:
6304 if (h != NULL)
6305 {
6306 struct elf_nds32_link_hash_entry *eh;
6307 struct elf_nds32_dyn_relocs **pp;
6308 struct elf_nds32_dyn_relocs *p;
6309
0e1862bb 6310 if (!bfd_link_pic (info) && h->plt.refcount > 0)
35c08157
KLC		 6311 h->plt.refcount -= 1;
6312
6313 eh = (struct elf_nds32_link_hash_entry *) h;
6314
6315 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6316 if (p->sec == sec)
6317 {
6318 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6319 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6320 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6321 p->pc_count -= 1;
6322 p->count -= 1;
6323 if (p->count == 0)
6324 *pp = p->next;
6325 break;
6326 }
6327 }
6328 break;
6329
6330 case R_NDS32_9_PLTREL:
6331 case R_NDS32_25_PLTREL:
6332 if (h != NULL)
6333 {
6334 if (h->plt.refcount > 0)
6335 h->plt.refcount--;
6336 }
6337 break;
6338
6339 default:
6340 break;
6341 }
6342 }
6343
6344 return TRUE;
6345}
6346
6347/* Look through the relocs for a section during the first phase.
6348 Since we don't do .gots or .plts, we just need to consider the
6349 virtual table relocs for gc. */
6350
6351static bfd_boolean
6352nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6353 asection *sec, const Elf_Internal_Rela *relocs)
6354{
6355 Elf_Internal_Shdr *symtab_hdr;
6356 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6357 const Elf_Internal_Rela *rel;
6358 const Elf_Internal_Rela *rel_end;
6359 struct elf_nds32_link_hash_table *htab;
6360 bfd *dynobj;
6361 asection *sreloc = NULL;
6362
0e1862bb 6363 if (bfd_link_relocatable (info))
35c08157
KLC		 6364 return TRUE;
6365
6366 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6367 sym_hashes = elf_sym_hashes (abfd);
6368 sym_hashes_end =
6369 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6370 if (!elf_bad_symtab (abfd))
6371 sym_hashes_end -= symtab_hdr->sh_info;
6372
6373 htab = nds32_elf_hash_table (info);
6374 dynobj = htab->root.dynobj;
6375
6376 rel_end = relocs + sec->reloc_count;
6377 for (rel = relocs; rel < rel_end; rel++)
6378 {
6379 enum elf_nds32_reloc_type r_type;
6380 struct elf_link_hash_entry *h;
6381 unsigned long r_symndx;
1c8f6a4d 6382 int tls_type, old_tls_type;
35c08157
KLC		 6383
6384 r_symndx = ELF32_R_SYM (rel->r_info);
6385 r_type = ELF32_R_TYPE (rel->r_info);
6386 if (r_symndx < symtab_hdr->sh_info)
6387 h = NULL;
6388 else
6389 {
6390 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6391 while (h->root.type == bfd_link_hash_indirect
6392 || h->root.type == bfd_link_hash_warning)
6393 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6394 }
6395
1c8f6a4d
KLC		 6396 /* Some relocs require a global offset table. We create
6397 got section here, since these relocation need got section
6398 and it is not created yet. */
35c08157
KLC		 6399 if (htab->sgot == NULL)
6400 {
6401 switch (r_type)
6402 {
6403 case R_NDS32_GOT_HI20:
6404 case R_NDS32_GOT_LO12:
6405 case R_NDS32_GOT_LO15:
6406 case R_NDS32_GOT_LO19:
6407 case R_NDS32_GOT17S2_RELA:
6408 case R_NDS32_GOT15S2_RELA:
6409 case R_NDS32_GOTOFF:
6410 case R_NDS32_GOTOFF_HI20:
6411 case R_NDS32_GOTOFF_LO12:
6412 case R_NDS32_GOTOFF_LO15:
6413 case R_NDS32_GOTOFF_LO19:
6414 case R_NDS32_GOTPC20:
6415 case R_NDS32_GOTPC_HI20:
6416 case R_NDS32_GOTPC_LO12:
6417 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6418 case R_NDS32_TLS_IE_HI20:
6419 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6420 if (dynobj == NULL)
6421 htab->root.dynobj = dynobj = abfd;
6422 if (!create_got_section (dynobj, info))
6423 return FALSE;
6424 break;
6425
6426 default:
6427 break;
6428 }
6429 }
6430
6431 switch ((int) r_type)
6432 {
6433 case R_NDS32_GOT_HI20:
6434 case R_NDS32_GOT_LO12:
6435 case R_NDS32_GOT_LO15:
6436 case R_NDS32_GOT_LO19:
6437 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6438 case R_NDS32_TLS_IE_HI20:
6439 case R_NDS32_TLS_IE_LO12S2:
6440 switch (r_type)
6441 {
6442 case R_NDS32_TLS_IE_HI20:
6443 case R_NDS32_TLS_IE_LO12S2:
6444 tls_type = GOT_TLS_IE;
6445 break;
6446 default:
6447 tls_type = GOT_NORMAL;
6448 break;
6449 }
35c08157 6450 if (h != NULL)
1c8f6a4d
KLC		 6451 {
6452 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6453 h->got.refcount += 1;
6454 }
35c08157
KLC		 6455 else
6456 {
6457 bfd_signed_vma *local_got_refcounts;
6458
6459 /* This is a global offset table entry for a local
6460 symbol. */
6461 local_got_refcounts = elf_local_got_refcounts (abfd);
6462 if (local_got_refcounts == NULL)
6463 {
6464 bfd_size_type size;
6465
6466 size = symtab_hdr->sh_info;
6467 size *= sizeof (bfd_signed_vma);
6468 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6469 if (local_got_refcounts == NULL)
6470 return FALSE;
6471 elf_local_got_refcounts (abfd) = local_got_refcounts;
6472 }
6473 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6474 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6475 }
35c08157 6476
1c8f6a4d
KLC		 6477 /* We will already have issued an error message if there
6478 is a TLS/non-TLS mismatch, based on the symbol
6479 type. So just combine any TLS types needed. */
6480 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6481 && tls_type != GOT_NORMAL)
6482 tls_type |= old_tls_type;
6483
6484 if (old_tls_type != tls_type)
6485 {
6486 if (h != NULL)
6487 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6488 else
6489 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6490 }
6491 break;
6492 case R_NDS32_9_PLTREL:
35c08157
KLC		 6493 case R_NDS32_25_PLTREL:
6494 case R_NDS32_PLTREL_HI20:
6495 case R_NDS32_PLTREL_LO12:
6496 case R_NDS32_PLT_GOTREL_HI20:
6497 case R_NDS32_PLT_GOTREL_LO12:
6498 case R_NDS32_PLT_GOTREL_LO15:
6499 case R_NDS32_PLT_GOTREL_LO19:
6500 case R_NDS32_PLT_GOTREL_LO20:
6501
6502 /* This symbol requires a procedure linkage table entry. We
6503 actually build the entry in adjust_dynamic_symbol,
6504 because this might be a case of linking PIC code without
6505 linking in any dynamic objects, in which case we don't
6506 need to generate a procedure linkage table after all. */
6507
6508 /* If this is a local symbol, we resolve it directly without
6509 creating a procedure linkage table entry. */
6510 if (h == NULL)
6511 continue;
6512
6513 if (h->forced_local)
6514 break;
6515
1c8f6a4d 6516 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6517 h->needs_plt = 1;
6518 h->plt.refcount += 1;
6519 break;
6520
6521 case R_NDS32_16_RELA:
6522 case R_NDS32_20_RELA:
6523 case R_NDS32_5_RELA:
6524 case R_NDS32_32_RELA:
6525 case R_NDS32_HI20_RELA:
6526 case R_NDS32_LO12S3_RELA:
6527 case R_NDS32_LO12S2_RELA:
6528 case R_NDS32_LO12S2_DP_RELA:
6529 case R_NDS32_LO12S2_SP_RELA:
6530 case R_NDS32_LO12S1_RELA:
6531 case R_NDS32_LO12S0_RELA:
6532 case R_NDS32_LO12S0_ORI_RELA:
6533 case R_NDS32_SDA16S3_RELA:
6534 case R_NDS32_SDA17S2_RELA:
6535 case R_NDS32_SDA18S1_RELA:
6536 case R_NDS32_SDA19S0_RELA:
6537 case R_NDS32_SDA15S3_RELA:
6538 case R_NDS32_SDA15S2_RELA:
6539 case R_NDS32_SDA12S2_DP_RELA:
6540 case R_NDS32_SDA12S2_SP_RELA:
6541 case R_NDS32_SDA15S1_RELA:
6542 case R_NDS32_SDA15S0_RELA:
6543 case R_NDS32_SDA_FP7U2_RELA:
6544 case R_NDS32_15_PCREL_RELA:
6545 case R_NDS32_17_PCREL_RELA:
6546 case R_NDS32_25_PCREL_RELA:
6547
0e1862bb 6548 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 6549 {
6550 h->non_got_ref = 1;
6551 h->plt.refcount += 1;
6552 }
6553
6554 /* If we are creating a shared library, and this is a reloc against
6555 a global symbol, or a non PC relative reloc against a local
6556 symbol, then we need to copy the reloc into the shared library.
6557 However, if we are linking with -Bsymbolic, we do not need to
6558 copy a reloc against a global symbol which is defined in an
6559 object we are including in the link (i.e., DEF_REGULAR is set).
6560 At this point we have not seen all the input files, so it is
6561 possible that DEF_REGULAR is not set now but will be set later
6562 (it is never cleared). We account for that possibility below by
6563 storing information in the dyn_relocs field of the hash table
6564 entry. A similar situation occurs when creating shared libraries
6565 and symbol visibility changes render the symbol local.
6566
6567 If on the other hand, we are creating an executable, we may need
6568 to keep relocations for symbols satisfied by a dynamic library
6569 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6570 if ((bfd_link_pic (info)
35c08157
KLC		 6571 && (sec->flags & SEC_ALLOC) != 0
6572 && ((r_type != R_NDS32_25_PCREL_RELA
6573 && r_type != R_NDS32_15_PCREL_RELA
6574 && r_type != R_NDS32_17_PCREL_RELA
6575 && !(r_type == R_NDS32_32_RELA
6576 && strcmp (sec->name, ".eh_frame") == 0))
6577 || (h != NULL
6578 && (!info->symbolic
6579 || h->root.type == bfd_link_hash_defweak
6580 || !h->def_regular))))
0e1862bb 6581 || (!bfd_link_pic (info)
35c08157
KLC		 6582 && (sec->flags & SEC_ALLOC) != 0
6583 && h != NULL
6584 && (h->root.type == bfd_link_hash_defweak
6585 || !h->def_regular)))
6586 {
6587 struct elf_nds32_dyn_relocs *p;
6588 struct elf_nds32_dyn_relocs **head;
6589
6590 if (dynobj == NULL)
6591 htab->root.dynobj = dynobj = abfd;
6592
6593 /* When creating a shared object, we must copy these
6594 relocs into the output file. We create a reloc
6595 section in dynobj and make room for the reloc. */
6596 if (sreloc == NULL)
6597 {
6598 const char *name;
6599
6600 name = bfd_elf_string_from_elf_section
6601 (abfd, elf_elfheader (abfd)->e_shstrndx,
6602 elf_section_data (sec)->rela.hdr->sh_name);
6603 if (name == NULL)
6604 return FALSE;
6605
6606 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6607 && strcmp (bfd_get_section_name (abfd, sec),
6608 name + 5) == 0);
6609
6610 sreloc = bfd_get_section_by_name (dynobj, name);
6611 if (sreloc == NULL)
6612 {
6613 flagword flags;
6614
6615 sreloc = bfd_make_section (dynobj, name);
6616 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6617 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6618 if ((sec->flags & SEC_ALLOC) != 0)
6619 flags |= SEC_ALLOC | SEC_LOAD;
6620 if (sreloc == NULL
6621 || !bfd_set_section_flags (dynobj, sreloc, flags)
6622 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6623 return FALSE;
6624
6625 elf_section_type (sreloc) = SHT_RELA;
6626 }
6627 elf_section_data (sec)->sreloc = sreloc;
6628 }
6629
6630 /* If this is a global symbol, we count the number of
6631 relocations we need for this symbol. */
6632 if (h != NULL)
6633 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6634 else
6635 {
6636 asection *s;
61034b0b 6637 void *vpp;
35c08157
KLC		 6638
6639 Elf_Internal_Sym *isym;
6640 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6641 if (isym == NULL)
6642 return FALSE;
6643
6644 /* Track dynamic relocs needed for local syms too. */
6645 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6646 if (s == NULL)
6647 return FALSE;
6648
61034b0b
MR		 6649 vpp = &elf_section_data (s)->local_dynrel;
6650 head = (struct elf_nds32_dyn_relocs **) vpp;
35c08157
KLC		 6651 }
6652
6653 p = *head;
6654 if (p == NULL || p->sec != sec)
6655 {
6656 bfd_size_type amt = sizeof (*p);
6657 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6658 if (p == NULL)
6659 return FALSE;
6660 p->next = *head;
6661 *head = p;
6662 p->sec = sec;
6663 p->count = 0;
6664 p->pc_count = 0;
6665 }
6666
6667 p->count += 1;
6668 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6669 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6670 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6671 p->pc_count += 1;
6672 }
6673 break;
6674
6675 /* This relocation describes the C++ object vtable hierarchy.
6676 Reconstruct it for later use during GC. */
6677 case R_NDS32_RELA_GNU_VTINHERIT:
6678 case R_NDS32_GNU_VTINHERIT:
6679 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6680 return FALSE;
6681 break;
6682
6683 /* This relocation describes which C++ vtable entries are actually
6684 used. Record for later use during GC. */
6685 case R_NDS32_GNU_VTENTRY:
6686 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6687 return FALSE;
6688 break;
6689 case R_NDS32_RELA_GNU_VTENTRY:
6690 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6691 return FALSE;
6692 break;
6693 }
6694 }
6695
6696 return TRUE;
6697}
6698
6699/* Write VAL in uleb128 format to P, returning a pointer to the
6700 following byte.
6701 This code is copied from elf-attr.c. */
6702
6703static bfd_byte *
6704write_uleb128 (bfd_byte *p, unsigned int val)
6705{
6706 bfd_byte c;
6707 do
6708 {
6709 c = val & 0x7f;
6710 val >>= 7;
6711 if (val)
6712 c |= 0x80;
6713 *(p++) = c;
6714 }
6715 while (val);
6716 return p;
6717}
6718
6719static bfd_signed_vma
6720calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6721 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6722 int *pic_ext_target)
6723{
6724 bfd_signed_vma foff;
6725 bfd_vma symval, addend;
6726 asection *sym_sec;
6727
6728 /* Get the value of the symbol referred to by the reloc. */
6729 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6730 {
6731 Elf_Internal_Sym *isym;
6732
6733 /* A local symbol. */
6734 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6735
6736 if (isym->st_shndx == SHN_UNDEF)
6737 sym_sec = bfd_und_section_ptr;
6738 else if (isym->st_shndx == SHN_ABS)
6739 sym_sec = bfd_abs_section_ptr;
6740 else if (isym->st_shndx == SHN_COMMON)
6741 sym_sec = bfd_com_section_ptr;
6742 else
6743 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6744 symval = isym->st_value + sym_sec->output_section->vma
6745 + sym_sec->output_offset;
6746 }
6747 else
6748 {
6749 unsigned long indx;
6750 struct elf_link_hash_entry *h;
6751 bfd *owner;
6752
6753 /* An external symbol. */
6754 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6755 h = elf_sym_hashes (abfd)[indx];
6756 BFD_ASSERT (h != NULL);
6757
6758 if (h->root.type != bfd_link_hash_defined
6759 && h->root.type != bfd_link_hash_defweak)
6760 /* This appears to be a reference to an undefined
6761 symbol. Just ignore it--it will be caught by the
6762 regular reloc processing. */
6763 return 0;
6764 owner = h->root.u.def.section->owner;
6765 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6766 *pic_ext_target = 1;
6767
6768 if (h->root.u.def.section->flags & SEC_MERGE)
6769 {
6770 sym_sec = h->root.u.def.section;
6771 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6772 elf_section_data (sym_sec)->sec_info,
6773 h->root.u.def.value);
6774 symval = symval + sym_sec->output_section->vma
6775 + sym_sec->output_offset;
6776 }
6777 else
6778 symval = (h->root.u.def.value
6779 + h->root.u.def.section->output_section->vma
6780 + h->root.u.def.section->output_offset);
6781 }
6782
6783 addend = irel->r_addend;
6784
6785 foff = (symval + addend
6786 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6787 return foff;
6788}
6789
6790static bfd_vma
6791calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6792 Elf_Internal_Sym *isymbuf,
6793 Elf_Internal_Rela *irel,
6794 Elf_Internal_Shdr *symtab_hdr)
6795{
6796 bfd_vma symval;
6797
6798 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6799 {
6800 Elf_Internal_Sym *isym;
6801 asection *sym_sec;
6802 /* A local symbol. */
6803 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6804
6805 if (isym->st_shndx == SHN_UNDEF)
6806 sym_sec = bfd_und_section_ptr;
6807 else if (isym->st_shndx == SHN_ABS)
6808 sym_sec = bfd_abs_section_ptr;
6809 else if (isym->st_shndx == SHN_COMMON)
6810 sym_sec = bfd_com_section_ptr;
6811 else
6812 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6813 symval = isym->st_value + sym_sec->output_section->vma
6814 + sym_sec->output_offset;
6815 }
6816 else
6817 {
6818 unsigned long indx;
6819 struct elf_link_hash_entry *h;
6820 struct elf_nds32_link_hash_table *htab;
6821 asection *splt;
6822
6823 /* An external symbol. */
6824 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6825 h = elf_sym_hashes (abfd)[indx];
6826 BFD_ASSERT (h != NULL);
6827 htab = nds32_elf_hash_table (link_info);
6828 splt = htab->splt;
6829
6830 while (h->root.type == bfd_link_hash_indirect
6831 || h->root.type == bfd_link_hash_warning)
6832 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6833
6834 if (h->plt.offset == (bfd_vma) - 1)
6835 {
6836 if (h->root.type != bfd_link_hash_defined
6837 && h->root.type != bfd_link_hash_defweak)
6838 /* This appears to be a reference to an undefined
6839 * symbol. Just ignore it--it will be caught by the
6840 * regular reloc processing. */
6841 return 0;
6842 symval = (h->root.u.def.value
6843 + h->root.u.def.section->output_section->vma
6844 + h->root.u.def.section->output_offset);
6845 }
6846 else
6847 symval = splt->output_section->vma + h->plt.offset;
6848 }
6849
6850 return symval;
6851}
6852
6853static bfd_signed_vma
6854calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6855 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6856 Elf_Internal_Shdr *symtab_hdr)
6857{
6858 bfd_vma foff;
6859 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6860 symtab_hdr)) == 0)
6861 return 0;
6862 else
6863 return foff - (irel->r_offset
6864 + sec->output_section->vma + sec->output_offset);
6865}
6866\f
6867/* Convert a 32-bit instruction to 16-bit one.
6868 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6869 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6870 type of INSN16. Return 1 if successful. */
6871
6872static int
6873nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6874 int *pinsn_type)
6875{
6876 uint16_t insn16 = 0;
6cae483a 6877 int insn_type = 0;
35c08157
KLC		 6878 unsigned long mach = bfd_get_mach (abfd);
6879
6880 if (N32_SH5 (insn) != 0)
6881 return 0;
6882
6883 switch (N32_SUB5 (insn))
6884 {
6885 case N32_ALU1_ADD_SLLI:
6886 case N32_ALU1_ADD_SRLI:
6887 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6888 {
6889 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6890 N32_RB5 (insn));
6891 insn_type = NDS32_INSN_ADD333;
6892 }
6893 else if (N32_IS_RT4 (insn))
6894 {
6895 if (N32_RT5 (insn) == N32_RA5 (insn))
6896 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6897 else if (N32_RT5 (insn) == N32_RB5 (insn))
6898 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6899 insn_type = NDS32_INSN_ADD45;
6900 }
6901 break;
6902
6903 case N32_ALU1_SUB_SLLI:
6904 case N32_ALU1_SUB_SRLI:
6905 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6906 {
6907 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6908 N32_RB5 (insn));
6909 insn_type = NDS32_INSN_SUB333;
6910 }
6911 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6912 {
6913 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6914 insn_type = NDS32_INSN_SUB45;
6915 }
6916 break;
6917
6918 case N32_ALU1_AND_SLLI:
6919 case N32_ALU1_AND_SRLI:
6920 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6921 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6922 && N32_IS_RB3 (insn))
6923 {
6924 if (N32_RT5 (insn) == N32_RA5 (insn))
6925 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6926 else if (N32_RT5 (insn) == N32_RB5 (insn))
6927 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6928 if (insn16)
6929 insn_type = NDS32_INSN_AND33;
6930 }
6931 break;
6932
6933 case N32_ALU1_XOR_SLLI:
6934 case N32_ALU1_XOR_SRLI:
6935 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6936 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6937 && N32_IS_RB3 (insn))
6938 {
6939 if (N32_RT5 (insn) == N32_RA5 (insn))
6940 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6941 else if (N32_RT5 (insn) == N32_RB5 (insn))
6942 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6943 if (insn16)
6944 insn_type = NDS32_INSN_XOR33;
6945 }
6946 break;
6947
6948 case N32_ALU1_OR_SLLI:
6949 case N32_ALU1_OR_SRLI:
6950 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6951 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6952 && N32_IS_RB3 (insn))
6953 {
6954 if (N32_RT5 (insn) == N32_RA5 (insn))
6955 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6956 else if (N32_RT5 (insn) == N32_RB5 (insn))
6957 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6958 if (insn16)
6959 insn_type = NDS32_INSN_OR33;
6960 }
6961 break;
6962 case N32_ALU1_NOR:
6963 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6964 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6965 && N32_RA5 (insn) == N32_RB5 (insn))
6966 {
6967 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6968 insn_type = NDS32_INSN_NOT33;
6969 }
6970 break;
6971 case N32_ALU1_SRAI:
6972 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6973 {
6974 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6975 insn_type = NDS32_INSN_SRAI45;
6976 }
6977 break;
6978
6979 case N32_ALU1_SRLI:
6980 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6981 {
6982 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6983 insn_type = NDS32_INSN_SRLI45;
6984 }
6985 break;
6986
6987 case N32_ALU1_SLLI:
6988 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6989 {
6990 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6991 N32_UB5 (insn));
6992 insn_type = NDS32_INSN_SLLI333;
6993 }
6994 break;
6995
6996 case N32_ALU1_ZEH:
6997 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6998 {
6999 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
7000 insn_type = NDS32_INSN_ZEH33;
7001 }
7002 break;
7003
7004 case N32_ALU1_SEB:
7005 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7006 {
7007 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7008 insn_type = NDS32_INSN_SEB33;
7009 }
7010 break;
7011
7012 case N32_ALU1_SEH:
7013 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7014 {
7015 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7016 insn_type = NDS32_INSN_SEH33;
7017 }
7018 break;
7019
7020 case N32_ALU1_SLT:
7021 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7022 {
7023 /* Implicit r15. */
7024 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7025 insn_type = NDS32_INSN_SLT45;
7026 }
7027 break;
7028
7029 case N32_ALU1_SLTS:
7030 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7031 {
7032 /* Implicit r15. */
7033 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7034 insn_type = NDS32_INSN_SLTS45;
7035 }
7036 break;
7037 }
7038
7039 if ((insn16 & 0x8000) == 0)
7040 return 0;
7041
7042 if (pinsn16)
7043 *pinsn16 = insn16;
7044 if (pinsn_type)
7045 *pinsn_type = insn_type;
7046 return 1;
7047}
7048
7049static int
7050nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7051 int *pinsn_type)
7052{
7053 uint16_t insn16 = 0;
7054 int insn_type;
7055 unsigned long mach = bfd_get_mach (abfd);
7056
7057 /* TODO: bset, bclr, btgl, btst. */
7058 if (__GF (insn, 6, 4) != 0)
7059 return 0;
7060
7061 switch (N32_IMMU (insn, 6))
7062 {
7063 case N32_ALU2_MUL:
7064 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7065 && N32_IS_RB3 (insn))
7066 {
7067 if (N32_RT5 (insn) == N32_RA5 (insn))
7068 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7069 else if (N32_RT5 (insn) == N32_RB5 (insn))
7070 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7071 if (insn16)
7072 insn_type = NDS32_INSN_MUL33;
7073 }
7074 }
7075
7076 if ((insn16 & 0x8000) == 0)
7077 return 0;
7078
7079 if (pinsn16)
7080 *pinsn16 = insn16;
7081 if (pinsn_type)
7082 *pinsn_type = insn_type;
7083 return 1;
7084}
7085
7086int
7087nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7088 int *pinsn_type)
7089{
7090 int op6;
7091 uint16_t insn16 = 0;
7092 int insn_type;
7093 unsigned long mach = bfd_get_mach (abfd);
7094
7095 /* Decode 32-bit instruction. */
7096 if (insn & 0x80000000)
7097 {
7098 /* Not 32-bit insn. */
7099 return 0;
7100 }
7101
7102 op6 = N32_OP6 (insn);
7103
7104 /* Convert it to 16-bit instruction. */
7105 switch (op6)
7106 {
7107 case N32_OP6_MOVI:
7108 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7109 {
7110 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7111 insn_type = NDS32_INSN_MOVI55;
7112 }
7113 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7114 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7115 {
7116 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7117 N32_IMM20S (insn) - 16);
7118 insn_type = NDS32_INSN_MOVPI45;
7119 }
7120 break;
7121
7122 case N32_OP6_ADDI:
7123 if (N32_IMM15S (insn) == 0)
7124 {
7125 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7126 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7127 if (mach <= MACH_V2
7128 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7129 {
7130 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7131 insn_type = NDS32_INSN_MOV55;
7132 }
7133 }
7134 else if (N32_IMM15S (insn) > 0)
7135 {
7136 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7137 {
7138 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7139 N32_IMM15S (insn));
7140 insn_type = NDS32_INSN_ADDI333;
7141 }
7142 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7143 && N32_IMM15S (insn) < 32)
7144 {
7145 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7146 insn_type = NDS32_INSN_ADDI45;
7147 }
7148 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7149 && N32_RT5 (insn) == N32_RA5 (insn)
7150 && N32_IMM15S (insn) < 512)
7151 {
7152 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7153 insn_type = NDS32_INSN_ADDI10_SP;
7154 }
7155 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7156 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7157 && (N32_IMM15S (insn) % 4 == 0))
7158 {
7159 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7160 N32_IMM15S (insn) >> 2);
7161 insn_type = NDS32_INSN_ADDRI36_SP;
7162 }
7163 }
7164 else
7165 {
7166 /* Less than 0. */
7167 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7168 {
7169 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7170 0 - N32_IMM15S (insn));
7171 insn_type = NDS32_INSN_SUBI333;
7172 }
7173 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7174 && N32_IMM15S (insn) > -32)
7175 {
1c8f6a4d
KLC		 7176 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7177 0 - N32_IMM15S (insn));
35c08157
KLC		 7178 insn_type = NDS32_INSN_SUBI45;
7179 }
7180 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7181 && N32_RT5 (insn) == N32_RA5 (insn)
7182 && N32_IMM15S (insn) >= -512)
7183 {
7184 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7185 insn_type = NDS32_INSN_ADDI10_SP;
7186 }
7187 }
7188 break;
7189
7190 case N32_OP6_ORI:
7191 if (N32_IMM15S (insn) == 0)
7192 {
7193 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7194 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7195 if (mach <= MACH_V2
7196 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7197 {
7198 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7199 insn_type = NDS32_INSN_MOV55;
7200 }
7201 }
7202 break;
7203
7204 case N32_OP6_SUBRI:
7205 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7206 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7207 {
7208 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7209 insn_type = NDS32_INSN_NEG33;
7210 }
7211 break;
7212
7213 case N32_OP6_ANDI:
7214 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7215 {
7216 if (N32_IMM15U (insn) == 1)
7217 {
7218 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7219 insn_type = NDS32_INSN_XLSB33;
7220 }
7221 else if (N32_IMM15U (insn) == 0x7ff)
7222 {
7223 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7224 insn_type = NDS32_INSN_X11B33;
7225 }
7226 else if (N32_IMM15U (insn) == 0xff)
7227 {
7228 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7229 insn_type = NDS32_INSN_ZEB33;
7230 }
7231 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7232 && N32_IMM15U (insn) < 256)
7233 {
7234 int imm15u = N32_IMM15U (insn);
7235
7236 if (__builtin_popcount (imm15u) == 1)
7237 {
7238 /* BMSKI33 */
7239 int imm3u = __builtin_ctz (imm15u);
7240
7241 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7242 insn_type = NDS32_INSN_BMSKI33;
7243 }
7244 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7245 {
7246 /* FEXTI33 */
7247 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7248
7249 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7250 insn_type = NDS32_INSN_FEXTI33;
7251 }
7252 }
7253 }
7254 break;
7255
7256 case N32_OP6_SLTI:
7257 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7258 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7259 {
7260 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7261 insn_type = NDS32_INSN_SLTI45;
7262 }
7263 break;
7264
7265 case N32_OP6_SLTSI:
7266 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7267 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7268 {
7269 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7270 insn_type = NDS32_INSN_SLTSI45;
7271 }
7272 break;
7273
7274 case N32_OP6_LWI:
7275 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7276 {
7277 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7278 insn_type = NDS32_INSN_LWI450;
7279 }
7280 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7281 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7282 {
7283 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7284 N32_IMM15S (insn));
7285 insn_type = NDS32_INSN_LWI333;
7286 }
7287 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7288 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7289 {
7290 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7291 insn_type = NDS32_INSN_LWI37;
7292 }
7293 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7294 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7295 {
7296 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7297 insn_type = NDS32_INSN_LWI37_SP;
7298 }
7299 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7300 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7301 {
1c8f6a4d
KLC		 7302 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7303 N32_IMM15S (insn) + 32);
35c08157
KLC		 7304 insn_type = NDS32_INSN_LWI45_FE;
7305 }
7306 break;
7307
7308 case N32_OP6_SWI:
7309 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7310 {
7311 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7312 insn_type = NDS32_INSN_SWI450;
7313 }
7314 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7315 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7316 {
1c8f6a4d
KLC		 7317 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7318 N32_IMM15S (insn));
35c08157
KLC		 7319 insn_type = NDS32_INSN_SWI333;
7320 }
7321 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7322 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7323 {
7324 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7325 insn_type = NDS32_INSN_SWI37;
7326 }
7327 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7328 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7329 {
7330 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7331 insn_type = NDS32_INSN_SWI37_SP;
7332 }
7333 break;
7334
7335 case N32_OP6_LWI_BI:
7336 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7337 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7338 {
7339 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7340 N32_IMM15S (insn));
7341 insn_type = NDS32_INSN_LWI333_BI;
7342 }
7343 break;
7344
7345 case N32_OP6_SWI_BI:
7346 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7347 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7348 {
7349 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7350 N32_IMM15S (insn));
7351 insn_type = NDS32_INSN_SWI333_BI;
7352 }
7353 break;
7354
7355 case N32_OP6_LHI:
7356 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7357 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7358 {
7359 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7360 N32_IMM15S (insn));
7361 insn_type = NDS32_INSN_LHI333;
7362 }
7363 break;
7364
7365 case N32_OP6_SHI:
7366 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7367 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7368 {
7369 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7370 N32_IMM15S (insn));
7371 insn_type = NDS32_INSN_SHI333;
7372 }
7373 break;
7374
7375 case N32_OP6_LBI:
7376 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7377 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7378 {
7379 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7380 N32_IMM15S (insn));
7381 insn_type = NDS32_INSN_LBI333;
7382 }
7383 break;
7384
7385 case N32_OP6_SBI:
7386 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7387 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7388 {
7389 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7390 N32_IMM15S (insn));
7391 insn_type = NDS32_INSN_SBI333;
7392 }
7393 break;
7394
7395 case N32_OP6_ALU1:
7396 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7397
7398 case N32_OP6_ALU2:
7399 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7400
7401 case N32_OP6_BR1:
7402 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7403 goto done;
7404
7405 if ((insn & __BIT (14)) == 0)
7406 {
7407 /* N32_BR1_BEQ */
7408 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7409 && N32_RT5 (insn) != REG_R5)
7410 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7411 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7412 && N32_RA5 (insn) != REG_R5)
7413 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7414 insn_type = NDS32_INSN_BEQS38;
7415 break;
7416 }
7417 else
7418 {
7419 /* N32_BR1_BNE */
7420 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7421 && N32_RT5 (insn) != REG_R5)
7422 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7423 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7424 && N32_RA5 (insn) != REG_R5)
7425 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7426 insn_type = NDS32_INSN_BNES38;
7427 break;
7428 }
7429 break;
7430
7431 case N32_OP6_BR2:
7432 switch (N32_BR2_SUB (insn))
7433 {
7434 case N32_BR2_BEQZ:
7435 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7436 {
7437 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7438 insn_type = NDS32_INSN_BEQZ38;
7439 }
1c8f6a4d
KLC		 7440 else if (N32_RT5 (insn) == REG_R15
7441 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7442 {
7443 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7444 insn_type = NDS32_INSN_BEQZS8;
7445 }
7446 break;
7447
7448 case N32_BR2_BNEZ:
7449 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7450 {
7451 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7452 insn_type = NDS32_INSN_BNEZ38;
7453 }
1c8f6a4d
KLC		 7454 else if (N32_RT5 (insn) == REG_R15
7455 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7456 {
7457 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7458 insn_type = NDS32_INSN_BNEZS8;
7459 }
7460 break;
7461
7462 case N32_BR2_IFCALL:
7463 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7464 {
7465 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7466 insn_type = NDS32_INSN_IFCALL9;
7467 }
7468 break;
7469 }
7470 break;
7471
7472 case N32_OP6_JI:
7473 if ((insn & __BIT (24)) == 0)
7474 {
7475 /* N32_JI_J */
7476 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7477 {
7478 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7479 insn_type = NDS32_INSN_J8;
7480 }
7481 }
7482 break;
7483
7484 case N32_OP6_JREG:
7485 if (__GF (insn, 8, 2) != 0)
7486 goto done;
7487
7488 switch (N32_IMMU (insn, 5))
7489 {
7490 case N32_JREG_JR:
7491 if (N32_JREG_HINT (insn) == 0)
7492 {
7493 /* jr */
7494 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7495 insn_type = NDS32_INSN_JR5;
7496 }
7497 else if (N32_JREG_HINT (insn) == 1)
7498 {
7499 /* ret */
7500 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7501 insn_type = NDS32_INSN_RET5;
7502 }
7503 else if (N32_JREG_HINT (insn) == 3)
7504 {
7505 /* ifret = mov55 $sp, $sp */
7506 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7507 insn_type = NDS32_INSN_IFRET;
7508 }
7509 break;
7510
7511 case N32_JREG_JRAL:
7512 /* It's convertible when return rt5 is $lp and address
7513 translation is kept. */
7514 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7515 {
7516 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7517 insn_type = NDS32_INSN_JRAL5;
7518 }
7519 break;
7520 }
7521 break;
7522
7523 case N32_OP6_MISC:
7524 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7525 {
7526 /* For v3, swid above 31 are used for ex9.it. */
7527 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7528 insn_type = NDS32_INSN_BREAK16;
7529 }
7530 break;
7531
7532 default:
7533 /* This instruction has no 16-bit variant. */
7534 goto done;
7535 }
7536
7537done:
7538 /* Bit-15 of insn16 should be set for a valid instruction. */
7539 if ((insn16 & 0x8000) == 0)
7540 return 0;
7541
7542 if (pinsn16)
7543 *pinsn16 = insn16;
7544 if (pinsn_type)
7545 *pinsn_type = insn_type;
7546 return 1;
7547}
7548
7549static int
7550special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7551 Elf_Internal_Rela *reloc)
7552{
7553 uint16_t insn16 = 0;
7554
7555 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7556 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7557 return 0;
7558
7559 if (!N32_IS_RT3 (insn))
7560 return 0;
7561
7562 switch (N32_OP6 (insn))
7563 {
7564 case N32_OP6_LWI:
7565 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7566 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7567 break;
7568 case N32_OP6_SWI:
7569 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7570 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7571 break;
7572 case N32_OP6_HWGP:
7573 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7574 break;
7575
7576 if (__GF (insn, 17, 3) == 6)
7577 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7578 else if (__GF (insn, 17, 3) == 7)
7579 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7580 break;
7581 }
7582
7583 if ((insn16 & 0x8000) == 0)
7584 return 0;
7585
7586 *pinsn16 = insn16;
7587 return 1;
7588}
7589
7590/* Convert a 16-bit instruction to 32-bit one.
7591 INSN16 it the input and PINSN it the point to output.
7592 Return non-zero on successful. Otherwise 0 is returned. */
7593
7594int
7595nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7596{
7597 uint32_t insn = 0xffffffff;
7598 unsigned long mach = bfd_get_mach (abfd);
7599
7600 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7601
7602 switch (__GF (insn16, 9, 6))
7603 {
7604 case 0x4: /* add45 */
1c8f6a4d
KLC		 7605 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7606 N16_RA5 (insn16));
35c08157
KLC		 7607 goto done;
7608 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7609 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7610 N16_RA5 (insn16));
35c08157
KLC		 7611 goto done;
7612 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7613 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7614 N16_IMM5U (insn16));
35c08157
KLC		 7615 goto done;
7616 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7617 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7618 -N16_IMM5U (insn16));
35c08157
KLC		 7619 goto done;
7620 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7621 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7622 N16_IMM5U (insn16));
35c08157
KLC		 7623 goto done;
7624 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7625 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7626 N16_IMM5U (insn16));
35c08157 7627 goto done;
35c08157 7628 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7629 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7630 N16_IMM3U (insn16));
35c08157
KLC		 7631 goto done;
7632 case 0xc: /* add333 */
1c8f6a4d
KLC		 7633 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7634 N16_RB3 (insn16));
35c08157
KLC		 7635 goto done;
7636 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7637 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7638 N16_RB3 (insn16));
35c08157
KLC		 7639 goto done;
7640 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7641 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7642 N16_IMM3U (insn16));
35c08157
KLC		 7643 goto done;
7644 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7645 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7646 -N16_IMM3U (insn16));
35c08157 7647 goto done;
35c08157 7648 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7649 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7650 N16_IMM3U (insn16));
35c08157
KLC		 7651 goto done;
7652 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7653 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7654 N16_IMM3U (insn16));
35c08157
KLC		 7655 goto done;
7656 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7657 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7658 N16_IMM3U (insn16));
35c08157
KLC		 7659 goto done;
7660 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7661 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7662 N16_IMM3U (insn16));
35c08157
KLC		 7663 goto done;
7664 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7665 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7666 N16_IMM3U (insn16));
35c08157
KLC		 7667 goto done;
7668 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7669 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7670 N16_IMM3U (insn16));
35c08157
KLC		 7671 goto done;
7672 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7673 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7674 N16_IMM3U (insn16));
35c08157
KLC		 7675 goto done;
7676 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7677 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7678 N16_IMM3U (insn16));
35c08157 7679 goto done;
35c08157 7680 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7681 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7682 N16_IMM6U (insn16) << 2);
35c08157 7683 goto done;
35c08157 7684 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7685 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7686 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7687 goto done;
7688 case 0x1a: /* lwi450 */
7689 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7690 goto done;
7691 case 0x1b: /* swi450 */
7692 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7693 goto done;
7694
1c8f6a4d 7695 /* These are r15 implied instructions. */
35c08157
KLC		 7696 case 0x30: /* slts45 */
7697 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7698 goto done;
7699 case 0x31: /* slt45 */
7700 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7701 goto done;
7702 case 0x32: /* sltsi45 */
7703 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7704 goto done;
7705 case 0x33: /* slti45 */
7706 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7707 goto done;
7708 case 0x34: /* beqzs8, bnezs8 */
7709 if (insn16 & __BIT (8))
7710 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7711 else
7712 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7713 goto done;
7714
7715 case 0x35: /* break16, ex9.it */
7716 /* Only consider range of v3 break16. */
7717 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7718 goto done;
7719
7720 case 0x3c: /* ifcall9 */
7721 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7722 goto done;
7723 case 0x3d: /* movpi45 */
7724 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7725 goto done;
7726
7727 case 0x3f: /* MISC33 */
1c8f6a4d 7728 switch (insn16 & 0x7)
35c08157
KLC		 7729 {
7730 case 2: /* neg33 */
7731 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7732 break;
7733 case 3: /* not33 */
1c8f6a4d
KLC		 7734 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7735 N16_RA3 (insn16));
35c08157
KLC		 7736 break;
7737 case 4: /* mul33 */
1c8f6a4d
KLC		 7738 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7739 N16_RA3 (insn16));
35c08157
KLC		 7740 break;
7741 case 5: /* xor33 */
1c8f6a4d
KLC		 7742 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7743 N16_RA3 (insn16));
35c08157
KLC		 7744 break;
7745 case 6: /* and33 */
1c8f6a4d
KLC		 7746 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7747 N16_RA3 (insn16));
35c08157
KLC		 7748 break;
7749 case 7: /* or33 */
1c8f6a4d
KLC		 7750 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7751 N16_RA3 (insn16));
35c08157
KLC		 7752 break;
7753 }
7754 goto done;
7755
1c8f6a4d 7756 case 0xb:
35c08157
KLC		 7757 switch (insn16 & 0x7)
7758 {
7759 case 0: /* zeb33 */
7760 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7761 break;
7762 case 1: /* zeh33 */
7763 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7764 break;
7765 case 2: /* seb33 */
7766 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7767 break;
7768 case 3: /* seh33 */
7769 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7770 break;
7771 case 4: /* xlsb33 */
7772 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7773 break;
7774 case 5: /* x11b33 */
7775 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7776 break;
7777 case 6: /* bmski33 */
7778 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7779 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7780 break;
7781 case 7: /* fexti33 */
7782 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7783 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7784 break;
7785 }
7786 goto done;
7787 }
7788
7789 switch (__GF (insn16, 10, 5))
7790 {
7791 case 0x0: /* mov55 or ifret16 */
7792 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7793 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7794 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7795 else
1c8f6a4d 7796 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7797 goto done;
7798 case 0x1: /* movi55 */
7799 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7800 goto done;
7801 case 0x1b: /* addi10s (V2) */
7802 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7803 goto done;
7804 }
7805
7806 switch (__GF (insn16, 11, 4))
7807 {
7808 case 0x7: /* lwi37.fp/swi37.fp */
7809 if (insn16 & __BIT (7)) /* swi37.fp */
7810 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7811 else /* lwi37.fp */
7812 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7813 goto done;
7814 case 0x8: /* beqz38 */
7815 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7816 goto done;
7817 case 0x9: /* bnez38 */
7818 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7819 goto done;
7820 case 0xa: /* beqs38/j8, implied r5 */
7821 if (N16_RT38 (insn16) == 5)
7822 insn = N32_JI (J, N16_IMM8S (insn16));
7823 else
7824 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7825 goto done;
7826 case 0xb: /* bnes38 and others */
7827 if (N16_RT38 (insn16) == 5)
7828 {
7829 switch (__GF (insn16, 5, 3))
7830 {
7831 case 0: /* jr5 */
7832 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7833 break;
7834 case 4: /* ret5 */
7835 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7836 break;
7837 case 1: /* jral5 */
7838 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7839 break;
7840 case 2: /* ex9.it imm5 */
7841 /* ex9.it had no 32-bit variantl. */
7842 break;
7843 case 5: /* add5.pc */
7844 /* add5.pc had no 32-bit variantl. */
7845 break;
7846 }
7847 }
7848 else /* bnes38 */
7849 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7850 goto done;
7851 case 0xe: /* lwi37/swi37 */
7852 if (insn16 & (1 << 7)) /* swi37.sp */
7853 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7854 else /* lwi37.sp */
7855 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7856 goto done;
7857 }
7858
7859done:
7860 if (insn & 0x80000000)
7861 return 0;
7862
7863 if (pinsn)
7864 *pinsn = insn;
7865 return 1;
7866}
7867\f
7868static bfd_boolean
7869is_sda_access_insn (unsigned long insn)
7870{
7871 switch (N32_OP6 (insn))
7872 {
7873 case N32_OP6_LWI:
7874 case N32_OP6_LHI:
7875 case N32_OP6_LHSI:
7876 case N32_OP6_LBI:
7877 case N32_OP6_LBSI:
7878 case N32_OP6_SWI:
7879 case N32_OP6_SHI:
7880 case N32_OP6_SBI:
7881 case N32_OP6_LWC:
7882 case N32_OP6_LDC:
7883 case N32_OP6_SWC:
7884 case N32_OP6_SDC:
7885 return TRUE;
7886 default:
7887 ;
7888 }
7889 return FALSE;
7890}
7891
7892static unsigned long
7893turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7894{
7895 uint32_t oinsn = 0;
7896
7897 switch (type)
7898 {
7899 case R_NDS32_GOT_LO12:
7900 case R_NDS32_GOTOFF_LO12:
7901 case R_NDS32_PLTREL_LO12:
7902 case R_NDS32_PLT_GOTREL_LO12:
7903 case R_NDS32_LO12S0_RELA:
7904 switch (N32_OP6 (insn))
7905 {
7906 case N32_OP6_LBI:
7907 /* lbi.gp */
7908 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7909 break;
7910 case N32_OP6_LBSI:
7911 /* lbsi.gp */
7912 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7913 break;
7914 case N32_OP6_SBI:
7915 /* sbi.gp */
7916 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7917 break;
7918 case N32_OP6_ORI:
7919 /* addi.gp */
7920 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7921 break;
7922 }
7923 break;
7924
7925 case R_NDS32_LO12S1_RELA:
7926 switch (N32_OP6 (insn))
7927 {
7928 case N32_OP6_LHI:
7929 /* lhi.gp */
7930 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7931 break;
7932 case N32_OP6_LHSI:
7933 /* lhsi.gp */
7934 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7935 break;
7936 case N32_OP6_SHI:
7937 /* shi.gp */
7938 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7939 break;
7940 }
7941 break;
7942
7943 case R_NDS32_LO12S2_RELA:
7944 switch (N32_OP6 (insn))
7945 {
7946 case N32_OP6_LWI:
7947 /* lwi.gp */
7948 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7949 break;
7950 case N32_OP6_SWI:
7951 /* swi.gp */
7952 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7953 break;
7954 }
7955 break;
7956
7957 case R_NDS32_LO12S2_DP_RELA:
7958 case R_NDS32_LO12S2_SP_RELA:
7959 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7960 break;
7961 }
7962
7963 if (oinsn)
7964 *pinsn = oinsn;
7965
7966 return oinsn != 0;
7967}
7968
7969/* Linker hasn't found the correct merge section for non-section symbol
7970 in relax time, this work is left to the function elf_link_input_bfd().
7971 So for non-section symbol, _bfd_merged_section_offset is also needed
7972 to find the correct symbol address. */
7973
7974static bfd_vma
7975nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7976 asection **psec, Elf_Internal_Rela *rel)
7977{
7978 asection *sec = *psec;
7979 bfd_vma relocation;
7980
7981 relocation = (sec->output_section->vma
7982 + sec->output_offset + sym->st_value);
7983 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7984 {
7985 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7986 rel->r_addend =
7987 _bfd_merged_section_offset (abfd, psec,
7988 elf_section_data (sec)->sec_info,
7989 sym->st_value + rel->r_addend);
7990 else
7991 rel->r_addend =
7992 _bfd_merged_section_offset (abfd, psec,
7993 elf_section_data (sec)->sec_info,
7994 sym->st_value) + rel->r_addend;
7995
7996 if (sec != *psec)
7997 {
7998 /* If we have changed the section, and our original section is
7999 marked with SEC_EXCLUDE, it means that the original
8000 SEC_MERGE section has been completely subsumed in some
8001 other SEC_MERGE section. In this case, we need to leave
8002 some info around for --emit-relocs. */
8003 if ((sec->flags & SEC_EXCLUDE) != 0)
8004 sec->kept_section = *psec;
8005 sec = *psec;
8006 }
8007 rel->r_addend -= relocation;
8008 rel->r_addend += sec->output_section->vma + sec->output_offset;
8009 }
8010 return relocation;
8011}
8012
8013static bfd_vma
8014calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8015 Elf_Internal_Sym *isymbuf,
8016 Elf_Internal_Shdr *symtab_hdr)
8017{
8018 bfd_signed_vma foff;
8019 bfd_vma symval, addend;
8020 Elf_Internal_Rela irel_fn;
8021 Elf_Internal_Sym *isym;
8022 asection *sym_sec;
8023
8024 /* Get the value of the symbol referred to by the reloc. */
8025 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8026 {
8027 /* A local symbol. */
8028 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8029
8030 if (isym->st_shndx == SHN_UNDEF)
8031 sym_sec = bfd_und_section_ptr;
8032 else if (isym->st_shndx == SHN_ABS)
8033 sym_sec = bfd_abs_section_ptr;
8034 else if (isym->st_shndx == SHN_COMMON)
8035 sym_sec = bfd_com_section_ptr;
8036 else
8037 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8038 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8039 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8040 addend = irel_fn.r_addend;
8041 }
8042 else
8043 {
8044 unsigned long indx;
8045 struct elf_link_hash_entry *h;
8046
8047 /* An external symbol. */
8048 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8049 h = elf_sym_hashes (abfd)[indx];
8050 BFD_ASSERT (h != NULL);
8051
8052 while (h->root.type == bfd_link_hash_indirect
8053 || h->root.type == bfd_link_hash_warning)
8054 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8055
8056 if (h->root.type != bfd_link_hash_defined
8057 && h->root.type != bfd_link_hash_defweak)
8058 /* This appears to be a reference to an undefined
8059 symbol. Just ignore it--it will be caught by the
8060 regular reloc processing. */
8061 return 0;
8062
8063 if (h->root.u.def.section->flags & SEC_MERGE)
8064 {
8065 sym_sec = h->root.u.def.section;
8066 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8067 (sym_sec)->sec_info, h->root.u.def.value);
8068 symval = symval + sym_sec->output_section->vma
8069 + sym_sec->output_offset;
8070 }
8071 else
8072 symval = (h->root.u.def.value
8073 + h->root.u.def.section->output_section->vma
8074 + h->root.u.def.section->output_offset);
8075 addend = irel->r_addend;
8076 }
8077
8078 foff = symval + addend;
8079
8080 return foff;
8081}
8082
8083static bfd_vma
8084calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8085 Elf_Internal_Rela *irel,
8086 Elf_Internal_Shdr *symtab_hdr)
8087{
8088 int symndx;
8089 bfd_vma *local_got_offsets;
8090 /* Get the value of the symbol referred to by the reloc. */
8091 struct elf_link_hash_entry *h;
8092 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8093
8094 /* An external symbol. */
8095 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8096 h = elf_sym_hashes (abfd)[symndx];
8097 while (h->root.type == bfd_link_hash_indirect
8098 || h->root.type == bfd_link_hash_warning)
8099 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8100
8101 if (symndx >= 0)
8102 {
8103 BFD_ASSERT (h != NULL);
8104 return htab->sgot->output_section->vma + htab->sgot->output_offset
8105 + h->got.offset;
8106 }
8107 else
8108 {
8109 local_got_offsets = elf_local_got_offsets (abfd);
8110 BFD_ASSERT (local_got_offsets != NULL);
8111 return htab->sgot->output_section->vma + htab->sgot->output_offset
8112 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8113 }
8114
8115 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8116 /* The check of h->root.type is passed. */
8117}
8118
8119static int
8120is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8121 asection *sec, Elf_Internal_Rela *rel)
8122{
8123 bfd_byte *contents;
8124 unsigned short insn16;
8125
8126 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8127 return FALSE;
8128 contents = elf_section_data (sec)->this_hdr.contents;
8129 insn16 = bfd_getb16 (contents + rel->r_offset);
8130 if (insn16 == NDS32_NOP16)
8131 return TRUE;
8132 return FALSE;
8133}
8134
8135/* It checks whether the instruction could be converted to
8136 16-bit form and returns the converted one.
8137
8138 `internal_relocs' is supposed to be sorted. */
8139
8140static int
8141is_convert_32_to_16 (bfd *abfd, asection *sec,
8142 Elf_Internal_Rela *reloc,
8143 Elf_Internal_Rela *internal_relocs,
8144 Elf_Internal_Rela *irelend,
8145 uint16_t *insn16)
8146{
8147#define NORMAL_32_TO_16 (1 << 0)
8148#define SPECIAL_32_TO_16 (1 << 1)
8149 bfd_byte *contents = NULL;
8150 bfd_signed_vma off;
8151 bfd_vma mem_addr;
8152 uint32_t insn = 0;
8153 Elf_Internal_Rela *pc_rel;
8154 int pic_ext_target = 0;
8155 Elf_Internal_Shdr *symtab_hdr;
8156 Elf_Internal_Sym *isymbuf = NULL;
8157 int convert_type;
8158 bfd_vma offset;
8159
8160 if (reloc->r_offset + 4 > sec->size)
8161 return FALSE;
8162
8163 offset = reloc->r_offset;
8164
0c4bd9d9 8165 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 8166 return FALSE;
8167 insn = bfd_getb32 (contents + offset);
8168
8169 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8170 convert_type = NORMAL_32_TO_16;
8171 else if (special_convert_32_to_16 (insn, insn16, reloc))
8172 convert_type = SPECIAL_32_TO_16;
8173 else
8174 return FALSE;
8175
8176 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8177 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8178 return FALSE;
8179
8180 /* Find the first relocation of the same relocation-type,
8181 so we iteratie them forward. */
8182 pc_rel = reloc;
1c8f6a4d 8183 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 8184 pc_rel--;
8185
8186 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8187 {
8188 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8189 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8190 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8191 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8192 {
8193 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8194 &pic_ext_target);
1c8f6a4d
KLC		 8195 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8196 || off == 0)
35c08157
KLC		 8197 return FALSE;
8198 break;
8199 }
8200 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8201 {
8202 /* movi => movi55 */
1c8f6a4d
KLC		 8203 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8204 symtab_hdr);
8205 /* mem_addr is unsigned, but the value should
8206 be between [-16, 15]. */
35c08157
KLC		 8207 if ((mem_addr + 0x10) >> 5)
8208 return FALSE;
8209 break;
8210 }
1c8f6a4d
KLC		 8211 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8212 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8213 {
8214 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8215 because it can be relaxed to addi for TLS_LE_ADD. */
8216 return FALSE;
8217 }
35c08157
KLC		 8218 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8219 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8220 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8221 && convert_type == SPECIAL_32_TO_16)
8222 {
8223 /* fp-as-gp
8224 We've selected a best fp-base for this access, so we can
8225 always resolve it anyway. Do nothing. */
8226 break;
8227 }
8228 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8229 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8230 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8231 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8232 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8233 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8234 {
1c8f6a4d
KLC		 8235 /* Prevent unresolved addi instruction translate
8236 to addi45 or addi333. */
35c08157
KLC		 8237 return FALSE;
8238 }
1c8f6a4d
KLC		 8239 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8240 {
8241 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8242 &pic_ext_target);
8243 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8244 return FALSE;
8245 break;
8246 }
35c08157
KLC		 8247 }
8248
8249 return TRUE;
8250}
8251
8252static void
8253nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8254 Elf_Internal_Rela *reloc,
8255 Elf_Internal_Rela *internal_relocs,
8256 Elf_Internal_Rela *irelend,
8257 unsigned short insn16)
8258{
8259 Elf_Internal_Rela *pc_rel;
8260 bfd_vma offset;
8261
8262 offset = reloc->r_offset;
8263 bfd_putb16 (insn16, contents + offset);
8264 /* Find the first relocation of the same relocation-type,
8265 so we iteratie them forward. */
8266 pc_rel = reloc;
8267 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8268 pc_rel--;
8269
8270 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8271 {
8272 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8273 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8274 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8275 {
8276 pc_rel->r_info =
8277 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8278 }
8279 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8280 pc_rel->r_info =
8281 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8282 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8283 pc_rel->r_info =
8284 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8285 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8286 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8287 pc_rel->r_info =
8288 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8289 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8290 pc_rel->r_info =
8291 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8292 }
8293}
8294
8295/* Find a relocation of type specified by `reloc_type'
8296 of the same r_offset with reloc.
8297 If not found, return irelend.
8298
8299 Assuming relocations are sorted by r_offset,
8300 we find the relocation from `reloc' backward untill relocs,
8301 or find it from `reloc' forward untill irelend. */
8302
8303static Elf_Internal_Rela *
8304find_relocs_at_address (Elf_Internal_Rela *reloc,
8305 Elf_Internal_Rela *relocs,
8306 Elf_Internal_Rela *irelend,
8307 enum elf_nds32_reloc_type reloc_type)
8308{
8309 Elf_Internal_Rela *rel_t;
8310
8311 /* Find backward. */
8312 for (rel_t = reloc;
8313 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8314 rel_t--)
8315 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8316 return rel_t;
8317
1c8f6a4d 8318 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8319 for (rel_t = reloc;
8320 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8321 rel_t++)
8322 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8323 return rel_t;
8324
8325 return irelend;
8326}
8327
8328/* Find a relocation of specified type and offset.
8329 `reloc' is just a refence point to find a relocation at specified offset.
8330 If not found, return irelend.
8331
8332 Assuming relocations are sorted by r_offset,
8333 we find the relocation from `reloc' backward untill relocs,
8334 or find it from `reloc' forward untill irelend. */
8335
8336static Elf_Internal_Rela *
8337find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8338 Elf_Internal_Rela *relocs,
8339 Elf_Internal_Rela *irelend,
6cae483a 8340 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8341 bfd_vma offset_p)
8342{
8343 Elf_Internal_Rela *rel_t = NULL;
8344
8345 /* First, we try to find a relocation of offset `offset_p',
8346 and then we use find_relocs_at_address to find specific type. */
8347
8348 if (reloc->r_offset > offset_p)
8349 {
8350 /* Find backward. */
8351 for (rel_t = reloc;
8352 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8353 /* Do nothing. */;
8354 }
8355 else if (reloc->r_offset < offset_p)
8356 {
8357 /* Find forward. */
8358 for (rel_t = reloc;
8359 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8360 /* Do nothing. */;
8361 }
8362 else
8363 rel_t = reloc;
8364
8365 /* Not found? */
8366 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8367 return irelend;
8368
8369 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8370}
8371
8372static bfd_boolean
8373nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8374 Elf_Internal_Rela *internal_relocs,
8375 Elf_Internal_Rela *irelend,
8376 unsigned char reloc_type)
8377{
8378 Elf_Internal_Rela *rel_t;
8379
8380 for (rel_t = reloc;
8381 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8382 rel_t--)
8383 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8384 {
8385 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8386 && rel_t->r_addend == reloc->r_addend)
8387 continue;
8388 return TRUE;
8389 }
8390
8391 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8392 rel_t++)
8393 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8394 {
8395 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8396 && rel_t->r_addend == reloc->r_addend)
8397 continue;
8398 return TRUE;
8399 }
8400
8401 return FALSE;
8402}
8403
8404typedef struct nds32_elf_blank nds32_elf_blank_t;
8405struct nds32_elf_blank
8406{
8407 /* Where the blank begins. */
8408 bfd_vma offset;
8409 /* The size of the blank. */
8410 bfd_vma size;
8411 /* The accumulative size before this blank. */
8412 bfd_vma total_size;
8413 nds32_elf_blank_t *next;
8414 nds32_elf_blank_t *prev;
8415};
8416
8417static nds32_elf_blank_t *blank_free_list = NULL;
8418
8419static nds32_elf_blank_t *
8420create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8421{
8422 nds32_elf_blank_t *blank_t;
8423
8424 if (blank_free_list)
8425 {
8426 blank_t = blank_free_list;
8427 blank_free_list = blank_free_list->next;
8428 }
8429 else
8430 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8431
8432 if (blank_t == NULL)
8433 return NULL;
8434
8435 blank_t->offset = offset_p;
8436 blank_t->size = size_p;
8437 blank_t->total_size = 0;
8438 blank_t->next = NULL;
8439 blank_t->prev = NULL;
8440
8441 return blank_t;
8442}
8443
8444static void
8445remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8446{
8447 if (blank_free_list)
8448 {
8449 blank_free_list->prev = blank_p;
8450 blank_p->next = blank_free_list;
8451 }
8452 else
8453 blank_p->next = NULL;
8454
8455 blank_p->prev = NULL;
8456 blank_free_list = blank_p;
8457}
8458
8459static void
8460clean_nds32_elf_blank (void)
8461{
8462 nds32_elf_blank_t *blank_t;
8463
8464 while (blank_free_list)
8465 {
8466 blank_t = blank_free_list;
8467 blank_free_list = blank_free_list->next;
8468 free (blank_t);
8469 }
8470}
8471
8472static nds32_elf_blank_t *
8473search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8474{
8475 nds32_elf_blank_t *blank_t;
8476
8477 if (!blank_p)
8478 return NULL;
8479 blank_t = blank_p;
8480
8481 while (blank_t && addr < blank_t->offset)
8482 blank_t = blank_t->prev;
8483 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8484 blank_t = blank_t->next;
8485
8486 return blank_t;
8487}
8488
8489static bfd_vma
8490get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8491 int overwrite)
8492{
8493 nds32_elf_blank_t *blank_t;
8494
8495 blank_t = search_nds32_elf_blank (*blank_p, addr);
8496 if (!blank_t)
8497 return 0;
8498
8499 if (overwrite)
8500 *blank_p = blank_t;
8501
8502 if (addr < blank_t->offset + blank_t->size)
8503 return blank_t->total_size + (addr - blank_t->offset);
8504 else
8505 return blank_t->total_size + blank_t->size;
8506}
8507
8508static bfd_boolean
8509insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8510{
8511 nds32_elf_blank_t *blank_t, *blank_t2;
8512
8513 if (!*blank_p)
8514 {
8515 *blank_p = create_nds32_elf_blank (addr, len);
8516 return *blank_p ? TRUE : FALSE;
8517 }
8518
8519 blank_t = search_nds32_elf_blank (*blank_p, addr);
8520
8521 if (blank_t == NULL)
8522 {
8523 blank_t = create_nds32_elf_blank (addr, len);
8524 if (!blank_t)
8525 return FALSE;
8526 while ((*blank_p)->prev != NULL)
8527 *blank_p = (*blank_p)->prev;
8528 blank_t->next = *blank_p;
8529 (*blank_p)->prev = blank_t;
8530 (*blank_p) = blank_t;
8531 return TRUE;
8532 }
8533
8534 if (addr < blank_t->offset + blank_t->size)
8535 {
8536 if (addr > blank_t->offset + blank_t->size)
8537 blank_t->size = addr - blank_t->offset;
8538 }
8539 else
8540 {
8541 blank_t2 = create_nds32_elf_blank (addr, len);
8542 if (!blank_t2)
8543 return FALSE;
8544 if (blank_t->next)
8545 {
8546 blank_t->next->prev = blank_t2;
8547 blank_t2->next = blank_t->next;
8548 }
8549 blank_t2->prev = blank_t;
8550 blank_t->next = blank_t2;
8551 *blank_p = blank_t2;
8552 }
8553
8554 return TRUE;
8555}
8556
8557static bfd_boolean
8558insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8559 bfd_vma len)
8560{
8561 nds32_elf_blank_t *blank_t;
8562
8563 if (!insert_nds32_elf_blank (blank_p, addr, len))
8564 return FALSE;
8565
8566 blank_t = *blank_p;
8567
8568 if (!blank_t->prev)
8569 {
8570 blank_t->total_size = 0;
8571 blank_t = blank_t->next;
8572 }
8573
8574 while (blank_t)
8575 {
8576 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8577 blank_t = blank_t->next;
8578 }
8579
8580 return TRUE;
8581}
8582
8583static void
8584calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8585{
8586 nds32_elf_blank_t *blank_t;
8587 bfd_vma total_size = 0;
8588
8589 if (!blank_p)
8590 return;
8591
8592 blank_t = blank_p;
8593 while (blank_t->prev)
8594 blank_t = blank_t->prev;
8595 while (blank_t)
8596 {
8597 blank_t->total_size = total_size;
8598 total_size += blank_t->size;
8599 blank_t = blank_t->next;
8600 }
8601}
8602
8603static bfd_boolean
8604nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8605 nds32_elf_blank_t *blank_p)
8606{
8607 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8608 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8609 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8610 unsigned int sec_shndx; /* The section the be relaxed. */
8611 bfd_byte *contents; /* Contents data of iterating section. */
8612 Elf_Internal_Rela *internal_relocs;
8613 Elf_Internal_Rela *irel;
8614 Elf_Internal_Rela *irelend;
8615 struct elf_link_hash_entry **sym_hashes;
8616 struct elf_link_hash_entry **end_hashes;
8617 unsigned int symcount;
8618 asection *sect;
8619 nds32_elf_blank_t *blank_t;
8620 nds32_elf_blank_t *blank_t2;
8621 nds32_elf_blank_t *blank_head;
8622
8623 blank_head = blank_t = blank_p;
8624 while (blank_head->prev != NULL)
8625 blank_head = blank_head->prev;
8626 while (blank_t->next != NULL)
8627 blank_t = blank_t->next;
8628
8629 if (blank_t->offset + blank_t->size <= sec->size)
8630 {
8631 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8632 blank_t->next->prev = blank_t;
8633 }
8634 if (blank_head->offset > 0)
8635 {
8636 blank_head->prev = create_nds32_elf_blank (0, 0);
8637 blank_head->prev->next = blank_head;
8638 blank_head = blank_head->prev;
8639 }
8640
8641 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8642
8643 /* The deletion must stop at the next ALIGN reloc for an alignment
8644 power larger than the number of bytes we are deleting. */
8645
8646 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8647 if (!nds32_get_local_syms (abfd, sec, &isym))
8648 return FALSE;
8649
8650 if (isym == NULL)
8651 {
8652 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8653 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8654 symtab_hdr->contents = (bfd_byte *) isym;
8655 }
8656
8657 if (isym == NULL || symtab_hdr->sh_info == 0)
8658 return FALSE;
8659
8660 blank_t = blank_head;
8661 calc_nds32_blank_total (blank_head);
8662
8663 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8664 {
8665 /* Adjust all the relocs. */
8666
8667 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8668 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8669 TRUE /* keep_memory */);
8670 irelend = internal_relocs + sect->reloc_count;
8671
8672 blank_t = blank_head;
8673 blank_t2 = blank_head;
8674
8675 if (!(sect->flags & SEC_RELOC))
8676 continue;
8677
0c4bd9d9 8678 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC		 8679
8680 for (irel = internal_relocs; irel < irelend; irel++)
8681 {
8682 bfd_vma raddr;
8683
8684 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8685 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8686 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8687 {
8688 unsigned long val = 0;
1c8f6a4d
KLC		 8689 unsigned long mask;
8690 long before, between;
6cae483a 8691 long offset = 0;
35c08157
KLC		 8692
8693 switch (ELF32_R_TYPE (irel->r_info))
8694 {
8695 case R_NDS32_DIFF8:
1c8f6a4d 8696 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8697 break;
8698 case R_NDS32_DIFF16:
1c8f6a4d 8699 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8700 break;
8701 case R_NDS32_DIFF32:
8702 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8703 /* Get the signed bit and mask for the high part. The
8704 gcc will alarm when right shift 32-bit since the
8705 type size of long may be 32-bit. */
8706 mask = 0 - (val >> 31);
8707 if (mask)
8708 offset = (val | (mask - 0xffffffff));
8709 else
8710 offset = val;
35c08157
KLC		 8711 break;
8712 default:
8713 BFD_ASSERT (0);
8714 }
8715
8716 /* DIFF value
8717 0 |encoded in location|
8718 |------------|-------------------|---------
8719 sym+off(addend)
8720 -- before ---| *****************
8721 --------------------- between ---|
8722
1c8f6a4d
KLC		 8723 We only care how much data are relax between DIFF,
8724 marked as ***. */
35c08157
KLC		 8725
8726 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8727 between = get_nds32_elf_blank_total (&blank_t,
8728 irel->r_addend + offset, 0);
35c08157
KLC		 8729 if (between == before)
8730 goto done_adjust_diff;
8731
8732 switch (ELF32_R_TYPE (irel->r_info))
8733 {
8734 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8735 bfd_put_8 (abfd, offset - (between - before),
8736 contents + irel->r_offset);
35c08157
KLC		 8737 break;
8738 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8739 bfd_put_16 (abfd, offset - (between - before),
8740 contents + irel->r_offset);
35c08157
KLC		 8741 break;
8742 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8743 bfd_put_32 (abfd, offset - (between - before),
8744 contents + irel->r_offset);
35c08157
KLC		 8745 break;
8746 }
8747 }
8748 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8749 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8750 {
8751 bfd_vma val = 0;
8752 unsigned int len = 0;
8753 unsigned long before, between;
8754 bfd_byte *endp, *p;
8755
1c8f6a4d
KLC		 8756 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8757 &len);
35c08157
KLC		 8758
8759 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8760 between = get_nds32_elf_blank_total (&blank_t,
8761 irel->r_addend + val, 0);
35c08157
KLC		 8762 if (between == before)
8763 goto done_adjust_diff;
8764
8765 p = contents + irel->r_offset;
8766 endp = p + len -1;
8767 memset (p, 0x80, len);
8768 *(endp) = 0;
8769 p = write_uleb128 (p, val - (between - before)) - 1;
8770 if (p < endp)
8771 *p |= 0x80;
8772 }
8773done_adjust_diff:
8774
8775 if (sec == sect)
8776 {
8777 raddr = irel->r_offset;
1c8f6a4d
KLC		 8778 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8779 irel->r_offset, 1);
35c08157
KLC		 8780
8781 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8782 continue;
8783 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8784 && (blank_t2->offset > raddr
8785 || blank_t2->next->offset <= raddr))
4eca0228 8786 _bfd_error_handler
695344c0 8787 (_("%B: Error: search_nds32_elf_blank reports wrong node\n"), abfd);
35c08157
KLC		 8788
8789 /* Mark reloc in deleted portion as NONE.
8790 For some relocs like R_NDS32_LABEL that doesn't modify the
8791 content in the section. R_NDS32_LABEL doesn't belong to the
8792 instruction in the section, so we should preserve it. */
8793 if (raddr >= blank_t2->offset
8794 && raddr < blank_t2->offset + blank_t2->size
8795 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8796 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8797 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8798 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8799 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8800 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8801 {
8802 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8803 R_NDS32_NONE);
8804 continue;
8805 }
8806 }
8807
8808 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8809 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8810 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8811 continue;
8812
8813 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8814 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8815 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8816 {
8817 if (irel->r_addend <= sec->size)
8818 irel->r_addend -=
8819 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8820 }
8821 }
8822 }
8823
8824 /* Adjust the local symbols defined in this section. */
8825 blank_t = blank_head;
8826 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8827 {
8828 if (isym->st_shndx == sec_shndx)
8829 {
8830 if (isym->st_value <= sec->size)
8831 {
8832 bfd_vma ahead;
8833 bfd_vma orig_addr = isym->st_value;
8834
8835 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8836 isym->st_value -= ahead;
8837
8838 /* Adjust function size. */
1c8f6a4d
KLC		 8839 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8840 && isym->st_size > 0)
8841 isym->st_size -=
8842 get_nds32_elf_blank_total
8843 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8844 }
8845 }
8846 }
8847
8848 /* Now adjust the global symbols defined in this section. */
8849 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8850 - symtab_hdr->sh_info);
8851 sym_hashes = elf_sym_hashes (abfd);
8852 end_hashes = sym_hashes + symcount;
8853 blank_t = blank_head;
8854 for (; sym_hashes < end_hashes; sym_hashes++)
8855 {
8856 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8857
8858 if ((sym_hash->root.type == bfd_link_hash_defined
8859 || sym_hash->root.type == bfd_link_hash_defweak)
8860 && sym_hash->root.u.def.section == sec)
8861 {
8862 if (sym_hash->root.u.def.value <= sec->size)
8863 {
8864 bfd_vma ahead;
8865 bfd_vma orig_addr = sym_hash->root.u.def.value;
8866
8867 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8868 sym_hash->root.u.def.value -= ahead;
8869
8870 /* Adjust function size. */
8871 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8872 sym_hash->size -=
8873 get_nds32_elf_blank_total
8874 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8875
8876 }
8877 }
8878 }
8879
8880 contents = elf_section_data (sec)->this_hdr.contents;
8881 blank_t = blank_head;
8882 while (blank_t->next)
8883 {
8884 /* Actually delete the bytes. */
8885
8886 /* If current blank is the last blank overlap with current section,
8887 go to finish process. */
8888 if (sec->size <= (blank_t->next->offset))
8889 break;
8890
8891 memmove (contents + blank_t->offset - blank_t->total_size,
8892 contents + blank_t->offset + blank_t->size,
8893 blank_t->next->offset - (blank_t->offset + blank_t->size));
8894
8895 blank_t = blank_t->next;
8896 }
8897
8898 if (sec->size > (blank_t->offset + blank_t->size))
8899 {
8900 /* There are remaining code between blank and section boundary.
8901 Move the remaining code to appropriate location. */
8902 memmove (contents + blank_t->offset - blank_t->total_size,
8903 contents + blank_t->offset + blank_t->size,
8904 sec->size - (blank_t->offset + blank_t->size));
8905 sec->size -= blank_t->total_size + blank_t->size;
8906 }
8907 else
8908 /* This blank is not entirely included in the section,
8909 reduce the section size by only part of the blank size. */
8910 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8911
8912 while (blank_head)
8913 {
8914 blank_t = blank_head;
8915 blank_head = blank_head->next;
8916 remove_nds32_elf_blank (blank_t);
8917 }
8918
8919 return TRUE;
8920}
8921
8922/* Get the contents of a section. */
8923
8924static int
0c4bd9d9
KLC		 8925nds32_get_section_contents (bfd *abfd, asection *sec,
8926 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC		 8927{
8928 /* Get the section contents. */
8929 if (elf_section_data (sec)->this_hdr.contents != NULL)
8930 *contents_p = elf_section_data (sec)->this_hdr.contents;
8931 else
8932 {
8933 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8934 return FALSE;
0c4bd9d9
KLC		 8935 if (cache)
8936 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 8937 }
8938
8939 return TRUE;
8940}
8941
8942/* Get the contents of the internal symbol of abfd. */
8943
8944static int
8945nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8946 Elf_Internal_Sym **isymbuf_p)
8947{
8948 Elf_Internal_Shdr *symtab_hdr;
8949 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8950
8951 /* Read this BFD's local symbols if we haven't done so already. */
8952 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8953 {
8954 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8955 if (*isymbuf_p == NULL)
8956 {
8957 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8958 symtab_hdr->sh_info, 0,
8959 NULL, NULL, NULL);
8960 if (*isymbuf_p == NULL)
8961 return FALSE;
8962 }
8963 }
8964 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8965
8966 return TRUE;
8967}
8968
8969/* Range of small data. */
1c8f6a4d
KLC		 8970static bfd_vma sdata_range[2][2];
8971static bfd_vma const sdata_init_range[2] =
8972{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8973
8974static int
8975nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8976 bfd_byte *contents, bfd_vma addr)
8977{
8978 unsigned long insn = bfd_getb32 (contents + addr);
8979
8980 if (insn & 0x80000000)
8981 return 2;
8982
8983 return 4;
8984}
8985
8986/* Set the gp relax range. We have to measure the safe range
8987 to do gp relaxation. */
8988
8989static void
8990relax_range_measurement (bfd *abfd)
8991{
8992 asection *sec_f, *sec_b;
8993 /* For upper bound. */
8994 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8995 bfd_vma align;
35c08157
KLC		 8996 static int decide_relax_range = 0;
8997 int i;
1c8f6a4d 8998 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8999
9000 if (decide_relax_range)
9001 return;
9002 decide_relax_range = 1;
9003
9004 if (sda_rela_sec == NULL)
9005 {
9006 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 9007 for (i = 0; i < range_number; i++)
35c08157
KLC		 9008 {
9009 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9010 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9011 }
9012 return;
9013 }
9014
9015 /* Get the biggest alignment power after the gp located section. */
9016 sec_f = sda_rela_sec->output_section;
9017 sec_b = sec_f->next;
9018 align = 0;
9019 while (sec_b != NULL)
9020 {
9021 if ((unsigned)(1 << sec_b->alignment_power) > align)
9022 align = (1 << sec_b->alignment_power);
9023 sec_b = sec_b->next;
9024 }
9025
9026 /* I guess we can not determine the section before
9027 gp located section, so we assume the align is max page size. */
1c8f6a4d 9028 for (i = 0; i < range_number; i++)
35c08157 9029 {
1c8f6a4d 9030 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9031 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9032 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 9033 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9034 }
9035}
9036
9037/* These are macros used to check flags encoded in r_addend.
9038 They are only used by nds32_elf_relax_section (). */
9039#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9040#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9041#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9042#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9043
695344c0
NC		 9044static const char * unrecognized_reloc_msg =
9045 /* xgettext:c-format */
9046 N_("%B: warning: %s points to unrecognized reloc at 0x%lx.");
9047
1c8f6a4d
KLC		 9048/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9049
35c08157 9050static bfd_boolean
1c8f6a4d
KLC		 9051nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9052 Elf_Internal_Rela *internal_relocs, int *insn_len,
9053 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9054 Elf_Internal_Shdr *symtab_hdr)
9055{
9056 /* There are 3 variations for LONGCALL1
9057 case 4-4-2; 16-bit on, optimize off or optimize for space
9058 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9059 ori ta, ta, lo12(symbol) ; LO12S0
9060 jral5 ta ;
9061
9062 case 4-4-4; 16-bit off, optimize don't care
9063 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9064 ori ta, ta, lo12(symbol) ; LO12S0
9065 jral ta ;
9066
9067 case 4-4-4; 16-bit on, optimize for speed
9068 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9069 ori ta, ta, lo12(symbol) ; LO12S0
9070 jral ta ;
9071 Check code for -mlong-calls output. */
9072
9073 /* Get the reloc for the address from which the register is
9074 being loaded. This reloc will tell us which function is
9075 actually being called. */
9076
9077 bfd_vma laddr;
9078 int seq_len; /* Original length of instruction sequence. */
35c08157 9079 uint32_t insn;
1c8f6a4d
KLC		 9080 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9081 int pic_ext_target = 0;
9082 bfd_signed_vma foff;
35c08157 9083 uint16_t insn16;
35c08157 9084
1c8f6a4d
KLC		 9085 irelend = internal_relocs + sec->reloc_count;
9086 seq_len = GET_SEQ_LEN (irel->r_addend);
9087 laddr = irel->r_offset;
9088 *insn_len = seq_len;
35c08157 9089
1c8f6a4d
KLC		 9090 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9091 R_NDS32_HI20_RELA, laddr);
9092 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9093 R_NDS32_LO12S0_ORI_RELA,
9094 laddr + 4);
35c08157 9095
1c8f6a4d 9096 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 9097 {
695344c0
NC		 9098 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
9099 (long) irel->r_offset);
1c8f6a4d 9100 return FALSE;
35c08157
KLC		 9101 }
9102
1c8f6a4d
KLC		 9103 /* Get the value of the symbol referred to by the reloc. */
9104 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9105 &pic_ext_target);
35c08157 9106
1c8f6a4d
KLC		 9107 /* This condition only happened when symbol is undefined. */
9108 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9109 || foff >= CONSERVATIVE_24BIT_S1)
9110 return FALSE;
35c08157 9111
1c8f6a4d
KLC		 9112 /* Relax to: jal symbol; 25_PCREL */
9113 /* For simplicity of coding, we are going to modify the section
9114 contents, the section relocs, and the BFD symbol table. We
9115 must tell the rest of the code not to free up this
9116 information. It would be possible to instead create a table
9117 of changes which have to be made, as is done in coff-mips.c;
9118 that would be more work, but would require less memory when
9119 the linker is run. */
9120
9121 /* Replace the long call with a jal. */
9122 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9123 R_NDS32_25_PCREL_RELA);
9124 irel->r_addend = hi_irelfn->r_addend;
9125
9126 /* We don't resolve this here but resolve it in relocate_section. */
9127 insn = INSN_JAL;
9128 bfd_putb32 (insn, contents + irel->r_offset);
9129
9130 hi_irelfn->r_info =
9131 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9132 lo_irelfn->r_info =
9133 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9134 *insn_len = 4;
9135
9136 if (seq_len & 0x2)
9137 {
9138 insn16 = NDS32_NOP16;
9139 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9140 lo_irelfn->r_info =
9141 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9142 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9143 *insn_len += 2;
9144 }
9145 return TRUE;
9146}
35c08157 9147
1c8f6a4d
KLC		 9148#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9149/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9150
1c8f6a4d
KLC		 9151static bfd_boolean
9152nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9153 Elf_Internal_Rela *internal_relocs, int *insn_len,
9154 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9155 Elf_Internal_Shdr *symtab_hdr)
9156{
9157 /* bltz rt, .L1 ; LONGCALL2
9158 jal symbol ; 25_PCREL
9159 .L1: */
35c08157 9160
1c8f6a4d
KLC		 9161 /* Get the reloc for the address from which the register is
9162 being loaded. This reloc will tell us which function is
9163 actually being called. */
35c08157 9164
1c8f6a4d
KLC		 9165 bfd_vma laddr;
9166 uint32_t insn;
9167 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9168 int pic_ext_target = 0;
9169 bfd_signed_vma foff;
35c08157 9170
1c8f6a4d
KLC		 9171 irelend = internal_relocs + sec->reloc_count;
9172 laddr = irel->r_offset;
9173 i1_irelfn =
9174 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9175 R_NDS32_25_PCREL_RELA, laddr + 4);
9176
9177 if (i1_irelfn == irelend)
35c08157 9178 {
695344c0
NC		 9179 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
9180 (long) irel->r_offset);
1c8f6a4d 9181 return FALSE;
35c08157
KLC		 9182 }
9183
1c8f6a4d 9184 insn = bfd_getb32 (contents + laddr);
35c08157 9185
1c8f6a4d
KLC		 9186 /* Get the value of the symbol referred to by the reloc. */
9187 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9188 &pic_ext_target);
35c08157 9189
1c8f6a4d
KLC		 9190 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9191 || foff >= CONSERVATIVE_16BIT_S1)
9192 return FALSE;
35c08157 9193
1c8f6a4d
KLC		 9194 /* Relax to bgezal rt, label ; 17_PCREL
9195 or bltzal rt, label ; 17_PCREL */
9196
9197 /* Convert to complimentary conditional call. */
9198 insn = CONVERT_CONDITION_CALL (insn);
9199
9200 /* For simplicity of coding, we are going to modify the section
9201 contents, the section relocs, and the BFD symbol table. We
9202 must tell the rest of the code not to free up this
9203 information. It would be possible to instead create a table
9204 of changes which have to be made, as is done in coff-mips.c;
9205 that would be more work, but would require less memory when
9206 the linker is run. */
9207
9208 /* Clean unnessary relocations. */
9209 i1_irelfn->r_info =
9210 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9211 cond_irelfn =
9212 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9213 R_NDS32_17_PCREL_RELA, laddr);
9214 if (cond_irelfn != irelend)
9215 cond_irelfn->r_info =
9216 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9217
9218 /* Replace the long call with a bgezal. */
9219 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9220 R_NDS32_17_PCREL_RELA);
9221 irel->r_addend = i1_irelfn->r_addend;
9222
9223 bfd_putb32 (insn, contents + irel->r_offset);
9224
9225 *insn_len = 4;
9226 return TRUE;
9227}
35c08157 9228
1c8f6a4d
KLC		 9229/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9230
9231static bfd_boolean
9232nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9233 Elf_Internal_Rela *internal_relocs, int *insn_len,
9234 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9235 Elf_Internal_Shdr *symtab_hdr)
9236{
9237 /* There are 3 variations for LONGCALL3
9238 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9239 bltz rt, $1 ; LONGCALL3
9240 sethi ta, hi20(symbol) ; HI20
9241 ori ta, ta, lo12(symbol) ; LO12S0
9242 jral5 ta ;
9243 $1
9244
9245 case 4-4-4-4; 16-bit off, optimize don't care
9246 bltz rt, $1 ; LONGCALL3
9247 sethi ta, hi20(symbol) ; HI20
9248 ori ta, ta, lo12(symbol) ; LO12S0
9249 jral ta ;
9250 $1
9251
9252 case 4-4-4-4; 16-bit on, optimize for speed
9253 bltz rt, $1 ; LONGCALL3
9254 sethi ta, hi20(symbol) ; HI20
9255 ori ta, ta, lo12(symbol) ; LO12S0
9256 jral ta ;
9257 $1 */
9258
9259 /* Get the reloc for the address from which the register is
9260 being loaded. This reloc will tell us which function is
9261 actually being called. */
9262
9263 bfd_vma laddr;
9264 int seq_len; /* Original length of instruction sequence. */
9265 uint32_t insn;
9266 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9267 int pic_ext_target = 0;
9268 bfd_signed_vma foff;
9269 uint16_t insn16;
9270
9271 irelend = internal_relocs + sec->reloc_count;
9272 seq_len = GET_SEQ_LEN (irel->r_addend);
9273 laddr = irel->r_offset;
9274 *insn_len = seq_len;
9275
9276 hi_irelfn =
9277 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9278 R_NDS32_HI20_RELA, laddr + 4);
9279 lo_irelfn =
9280 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9281 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9282
9283 if (hi_irelfn == irelend || lo_irelfn == irelend)
9284 {
695344c0
NC		 9285 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
9286 (long) irel->r_offset);
1c8f6a4d 9287 return FALSE;
35c08157
KLC		 9288 }
9289
1c8f6a4d
KLC		 9290 /* Get the value of the symbol referred to by the reloc. */
9291 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9292 &pic_ext_target);
35c08157 9293
1c8f6a4d
KLC		 9294 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9295 || foff >= CONSERVATIVE_24BIT_S1)
9296 return FALSE;
35c08157 9297
1c8f6a4d
KLC		 9298 insn = bfd_getb32 (contents + laddr);
9299 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9300 {
1c8f6a4d
KLC		 9301 /* Relax to bgezal rt, label ; 17_PCREL
9302 or bltzal rt, label ; 17_PCREL */
35c08157 9303
1c8f6a4d
KLC		 9304 /* Convert to complimentary conditional call. */
9305 insn = CONVERT_CONDITION_CALL (insn);
9306 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9307
1c8f6a4d
KLC		 9308 *insn_len = 4;
9309 irel->r_info =
9310 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9311 hi_irelfn->r_info =
9312 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9313 lo_irelfn->r_info =
9314 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9315
9316 cond_irelfn =
9317 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9318 R_NDS32_17_PCREL_RELA, laddr);
9319 if (cond_irelfn != irelend)
35c08157 9320 {
1c8f6a4d
KLC		 9321 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9322 R_NDS32_17_PCREL_RELA);
9323 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9324 }
1c8f6a4d
KLC		 9325
9326 if (seq_len & 0x2)
35c08157 9327 {
1c8f6a4d
KLC		 9328 insn16 = NDS32_NOP16;
9329 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9330 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9331 R_NDS32_INSN16);
9332 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9333 insn_len += 2;
35c08157 9334 }
1c8f6a4d
KLC		 9335 }
9336 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9337 {
9338 /* Relax to the following instruction sequence
9339 bltz rt, $1 ; LONGCALL2
9340 jal symbol ; 25_PCREL
9341 $1 */
9342 *insn_len = 8;
9343 insn = INSN_JAL;
9344 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9345
1c8f6a4d
KLC		 9346 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9347 R_NDS32_25_PCREL_RELA);
9348 irel->r_info =
9349 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9350
9351 lo_irelfn->r_info =
9352 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9353
1c8f6a4d 9354 if (seq_len & 0x2)
35c08157 9355 {
1c8f6a4d
KLC		 9356 insn16 = NDS32_NOP16;
9357 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9358 lo_irelfn->r_info =
9359 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9360 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9361 insn_len += 2;
9362 }
9363 }
9364 return TRUE;
9365}
35c08157 9366
1c8f6a4d 9367/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9368
1c8f6a4d
KLC		 9369static bfd_boolean
9370nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9371 Elf_Internal_Rela *internal_relocs, int *insn_len,
9372 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9373 Elf_Internal_Shdr *symtab_hdr)
9374{
9375 /* There are 3 variations for LONGJUMP1
9376 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9377 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9378 ori ta, ta, lo12(symbol) ; LO12S0
9379 jr5 ta ;
9380
9381 case 4-4-4; 16-bit off, optimize don't care
9382 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9383 ori ta, ta, lo12(symbol) ; LO12S0
9384 jr ta ;
9385
9386 case 4-4-4; 16-bit on, optimize for speed
9387 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9388 ori ta, ta, lo12(symbol) ; LO12S0
9389 jr ta ; */
9390
9391 /* Get the reloc for the address from which the register is
9392 being loaded. This reloc will tell us which function is
9393 actually being called. */
9394
9395 bfd_vma laddr;
9396 int seq_len; /* Original length of instruction sequence. */
9397 int insn16_on; /* 16-bit on/off. */
9398 uint32_t insn;
9399 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9400 int pic_ext_target = 0;
9401 bfd_signed_vma foff;
9402 uint16_t insn16;
9403 unsigned long reloc;
35c08157 9404
1c8f6a4d
KLC		 9405 irelend = internal_relocs + sec->reloc_count;
9406 seq_len = GET_SEQ_LEN (irel->r_addend);
9407 laddr = irel->r_offset;
9408 *insn_len = seq_len;
9409 insn16_on = IS_16BIT_ON (irel->r_addend);
9410
9411 hi_irelfn =
9412 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9413 R_NDS32_HI20_RELA, laddr);
9414 lo_irelfn =
9415 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9416 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9417 if (hi_irelfn == irelend || lo_irelfn == irelend)
9418 {
695344c0
NC		 9419 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
9420 (long) irel->r_offset);
1c8f6a4d
KLC		 9421 return FALSE;
9422 }
35c08157 9423
1c8f6a4d
KLC		 9424 /* Get the value of the symbol referred to by the reloc. */
9425 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9426 &pic_ext_target);
35c08157 9427
1c8f6a4d
KLC		 9428 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9429 || foff < -CONSERVATIVE_24BIT_S1)
9430 return FALSE;
35c08157 9431
1c8f6a4d
KLC		 9432 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9433 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9434 {
9435 /* j8 label */
9436 /* 16-bit on, but not optimized for speed. */
9437 reloc = R_NDS32_9_PCREL_RELA;
9438 insn16 = INSN_J8;
9439 bfd_putb16 (insn16, contents + irel->r_offset);
9440 *insn_len = 2;
9441 irel->r_info =
9442 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9443 }
9444 else
9445 {
9446 /* j label */
9447 reloc = R_NDS32_25_PCREL_RELA;
9448 insn = INSN_J;
9449 bfd_putb32 (insn, contents + irel->r_offset);
9450 *insn_len = 4;
9451 irel->r_info =
9452 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9453 irel->r_addend = 0;
9454 }
35c08157 9455
1c8f6a4d
KLC		 9456 hi_irelfn->r_info =
9457 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9458 lo_irelfn->r_info =
9459 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9460
1c8f6a4d
KLC		 9461 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9462 {
9463 insn16 = NDS32_NOP16;
9464 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9465 lo_irelfn->r_info =
9466 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9467 R_NDS32_INSN16);
9468 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9469 *insn_len += 2;
9470 }
9471 return TRUE;
9472}
9473
9474/* Revert condition branch. This function does not check if the input
9475 instruction is condition branch or not. */
9476
9477static void
9478nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9479 uint16_t *re_insn16, uint32_t *re_insn)
9480{
9481 uint32_t comp_insn = 0;
9482 uint16_t comp_insn16 = 0;
9483
9484 if (insn)
9485 {
9486 if (N32_OP6 (insn) == N32_OP6_BR1)
9487 {
9488 /* beqs label. */
9489 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9490 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9491 {
1c8f6a4d
KLC		 9492 /* Insn can be contracted to 16-bit implied r5. */
9493 comp_insn16 =
9494 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9495 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9496 }
1c8f6a4d
KLC		 9497 }
9498 else if (N32_OP6 (insn) == N32_OP6_BR3)
9499 {
9500 /* bnec $ta, imm11, label. */
9501 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9502 }
9503 else
9504 {
9505 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9506 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9507 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9508 {
1c8f6a4d 9509 if (N32_IS_RT3 (insn))
35c08157 9510 {
1c8f6a4d
KLC		 9511 /* Insn can be contracted to 16-bit. */
9512 comp_insn16 =
9513 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9514 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9515 }
9516 else if (N32_RT5 (insn) == REG_R15)
9517 {
9518 /* Insn can be contracted to 16-bit. */
9519 comp_insn16 =
9520 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9521 }
35c08157
KLC		 9522 }
9523 }
1c8f6a4d
KLC		 9524 }
9525 else
9526 {
9527 switch ((insn16 & 0xf000) >> 12)
35c08157 9528 {
1c8f6a4d
KLC		 9529 case 0xc:
9530 /* beqz38 or bnez38 */
9531 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9532 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9533 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9534 break;
35c08157 9535
1c8f6a4d
KLC		 9536 case 0xd:
9537 /* beqs38 or bnes38 */
9538 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9539 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9540 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9541 | (REG_R5 << 15);
9542 break;
35c08157 9543
1c8f6a4d
KLC		 9544 case 0xe:
9545 /* beqzS8 or bnezS8 */
9546 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9547 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9548 comp_insn |= REG_R15 << 20;
9549 break;
35c08157 9550
1c8f6a4d
KLC		 9551 default:
9552 break;
9553 }
9554 }
9555 if (comp_insn && re_insn)
9556 *re_insn = comp_insn;
9557 if (comp_insn16 && re_insn16)
9558 *re_insn16 = comp_insn16;
9559}
35c08157 9560
1c8f6a4d 9561/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9562
1c8f6a4d
KLC		 9563static bfd_boolean
9564nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9565 Elf_Internal_Rela *internal_relocs, int *insn_len,
9566 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9567 Elf_Internal_Shdr *symtab_hdr)
9568{
9569 /* There are 3 variations for LONGJUMP2
9570 case 2-4; 1st insn convertible, 16-bit on,
9571 optimize off or optimize for space
9572 bnes38 rt, ra, $1 ; LONGJUMP2
9573 j label ; 25_PCREL
9574 $1:
9575
9576 case 4-4; 1st insn not convertible
9577 bne rt, ra, $1 ; LONGJUMP2
9578 j label ; 25_PCREL
9579 $1:
9580
9581 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9582 bne rt, ra, $1 ; LONGJUMP2
9583 j label ; 25_PCREL
9584 $1: */
9585
9586 /* Get the reloc for the address from which the register is
9587 being loaded. This reloc will tell us which function is
9588 actually being called. */
9589
9590 bfd_vma laddr;
9591 int seq_len; /* Original length of instruction sequence. */
9592 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9593 int pic_ext_target = 0, first_size;
9594 unsigned int i;
9595 bfd_signed_vma foff;
9596 uint32_t insn, re_insn = 0;
9597 uint16_t insn16, re_insn16 = 0;
9598 unsigned long reloc, cond_reloc;
35c08157 9599
1c8f6a4d
KLC		 9600 enum elf_nds32_reloc_type checked_types[] =
9601 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9602
1c8f6a4d
KLC		 9603 irelend = internal_relocs + sec->reloc_count;
9604 seq_len = GET_SEQ_LEN (irel->r_addend);
9605 laddr = irel->r_offset;
9606 *insn_len = seq_len;
9607 first_size = (seq_len == 6) ? 2 : 4;
9608
9609 i2_irelfn =
9610 find_relocs_at_address_addr (irel, internal_relocs,
9611 irelend, R_NDS32_25_PCREL_RELA,
9612 laddr + first_size);
9613
9614 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9615 {
9616 cond_irelfn =
9617 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9618 checked_types[i], laddr);
9619 if (cond_irelfn != irelend)
9620 break;
9621 }
35c08157 9622
1c8f6a4d
KLC		 9623 if (i2_irelfn == irelend || cond_irelfn == irelend)
9624 {
695344c0
NC		 9625 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
9626 (long) irel->r_offset);
1c8f6a4d
KLC		 9627 return FALSE;
9628 }
35c08157 9629
1c8f6a4d
KLC		 9630 /* Get the value of the symbol referred to by the reloc. */
9631 foff =
9632 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9633 &pic_ext_target);
9634 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9635 || foff >= CONSERVATIVE_16BIT_S1)
9636 return FALSE;
35c08157 9637
1c8f6a4d
KLC		 9638 /* Get the all corresponding instructions. */
9639 if (first_size == 4)
9640 {
9641 insn = bfd_getb32 (contents + laddr);
9642 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9643 }
9644 else
9645 {
9646 insn16 = bfd_getb16 (contents + laddr);
9647 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9648 }
35c08157 9649
1c8f6a4d
KLC		 9650 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9651 && foff < ACCURATE_8BIT_S1 - first_size)
9652 {
9653 if (first_size == 4)
9654 {
9655 /* Don't convert it to 16-bit now, keep this as relaxable for
9656 ``label reloc; INSN16''. */
35c08157 9657
1c8f6a4d
KLC		 9658 /* Save comp_insn32 to buffer. */
9659 bfd_putb32 (re_insn, contents + irel->r_offset);
9660 *insn_len = 4;
9661 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9662 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9663 cond_reloc = R_NDS32_INSN16;
9664 }
9665 else
9666 {
9667 bfd_putb16 (re_insn16, contents + irel->r_offset);
9668 *insn_len = 2;
9669 reloc = R_NDS32_9_PCREL_RELA;
9670 cond_reloc = R_NDS32_NONE;
9671 }
9672 }
9673 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9674 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9675 && foff < ACCURATE_14BIT_S1 - first_size))
9676 {
9677 /* beqs label ; 15_PCREL */
9678 bfd_putb32 (re_insn, contents + irel->r_offset);
9679 *insn_len = 4;
9680 reloc = R_NDS32_15_PCREL_RELA;
9681 cond_reloc = R_NDS32_NONE;
9682 }
9683 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9684 && foff >= -CONSERVATIVE_16BIT_S1
9685 && foff < CONSERVATIVE_16BIT_S1)
9686 {
9687 /* beqz label ; 17_PCREL */
9688 bfd_putb32 (re_insn, contents + irel->r_offset);
9689 *insn_len = 4;
9690 reloc = R_NDS32_17_PCREL_RELA;
9691 cond_reloc = R_NDS32_NONE;
9692 }
9693 else
9694 return FALSE;
35c08157 9695
1c8f6a4d
KLC		 9696 /* Set all relocations. */
9697 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9698 irel->r_addend = i2_irelfn->r_addend;
35c08157 9699
1c8f6a4d
KLC		 9700 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9701 cond_reloc);
9702 cond_irelfn->r_addend = 0;
35c08157 9703
1c8f6a4d
KLC		 9704 if ((seq_len ^ *insn_len ) & 0x2)
9705 {
9706 insn16 = NDS32_NOP16;
9707 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9708 i2_irelfn->r_offset = 4;
9709 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9710 R_NDS32_INSN16);
9711 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9712 *insn_len += 2;
9713 }
9714 else
9715 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9716 R_NDS32_NONE);
9717 return TRUE;
9718}
35c08157 9719
1c8f6a4d 9720/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9721
1c8f6a4d
KLC		 9722static bfd_boolean
9723nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9724 Elf_Internal_Rela *internal_relocs, int *insn_len,
9725 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9726 Elf_Internal_Shdr *symtab_hdr)
9727{
9728 /* There are 5 variations for LONGJUMP3
9729 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9730 optimize off or optimize for space
9731 bnes38 rt, ra, $1 ; LONGJUMP3
9732 sethi ta, hi20(symbol) ; HI20
9733 ori ta, ta, lo12(symbol) ; LO12S0
9734 jr5 ta ;
9735 $1: ;
9736
9737 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9738 bnes38 rt, ra, $1 ; LONGJUMP3
9739 sethi ta, hi20(symbol) ; HI20
9740 ori ta, ta, lo12(symbol) ; LO12S0
9741 jr5 ta ;
9742 $1: ; LABEL
9743
9744 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9745 optimize off or optimize for space
9746 bne rt, ra, $1 ; LONGJUMP3
9747 sethi ta, hi20(symbol) ; HI20
9748 ori ta, ta, lo12(symbol) ; LO12S0
9749 jr5 ta ;
9750 $1: ;
9751
9752 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9753 16-bit off if no INSN16
9754 bne rt, ra, $1 ; LONGJUMP3
9755 sethi ta, hi20(symbol) ; HI20
9756 ori ta, ta, lo12(symbol) ; LO12S0
9757 jr ta ;
9758 $1: ;
9759
9760 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9761 16-bit off if no INSN16
9762 bne rt, ra, $1 ; LONGJUMP3
9763 sethi ta, hi20(symbol) ; HI20
9764 ori ta, ta, lo12(symbol) ; LO12S0
9765 jr ta ;
9766 $1: ; LABEL */
9767
9768 /* Get the reloc for the address from which the register is
9769 being loaded. This reloc will tell us which function is
9770 actually being called. */
9771 enum elf_nds32_reloc_type checked_types[] =
9772 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9773
9774 int reloc_off = 0, cond_removed = 0, convertible;
9775 bfd_vma laddr;
9776 int seq_len; /* Original length of instruction sequence. */
9777 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9778 int pic_ext_target = 0, first_size;
9779 unsigned int i;
9780 bfd_signed_vma foff;
9781 uint32_t insn, re_insn = 0;
9782 uint16_t insn16, re_insn16 = 0;
9783 unsigned long reloc, cond_reloc;
35c08157 9784
1c8f6a4d
KLC		 9785 irelend = internal_relocs + sec->reloc_count;
9786 seq_len = GET_SEQ_LEN (irel->r_addend);
9787 laddr = irel->r_offset;
9788 *insn_len = seq_len;
35c08157 9789
1c8f6a4d 9790 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9791
1c8f6a4d
KLC		 9792 if (convertible)
9793 first_size = 2;
9794 else
9795 first_size = 4;
9796
9797 /* Get all needed relocations. */
9798 hi_irelfn =
9799 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9800 R_NDS32_HI20_RELA, laddr + first_size);
9801 lo_irelfn =
9802 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9803 R_NDS32_LO12S0_ORI_RELA,
9804 laddr + first_size + 4);
9805
9806 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9807 {
9808 cond_irelfn =
9809 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9810 checked_types[i], laddr);
9811 if (cond_irelfn != irelend)
9812 break;
9813 }
35c08157 9814
1c8f6a4d
KLC		 9815 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9816 {
695344c0
NC		 9817 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
9818 (long) irel->r_offset);
1c8f6a4d
KLC		 9819 return FALSE;
9820 }
35c08157 9821
1c8f6a4d
KLC		 9822 /* Get the value of the symbol referred to by the reloc. */
9823 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9824 &pic_ext_target);
35c08157 9825
1c8f6a4d
KLC		 9826 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9827 || foff >= CONSERVATIVE_24BIT_S1)
9828 return FALSE;
35c08157 9829
1c8f6a4d
KLC		 9830 /* Get the all corresponding instructions. */
9831 if (first_size == 4)
9832 {
9833 insn = bfd_getb32 (contents + laddr);
9834 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9835 }
9836 else
9837 {
9838 insn16 = bfd_getb16 (contents + laddr);
9839 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9840 }
35c08157 9841
1c8f6a4d
KLC		 9842 /* For simplicity of coding, we are going to modify the section
9843 contents, the section relocs, and the BFD symbol table. We
9844 must tell the rest of the code not to free up this
9845 information. It would be possible to instead create a table
9846 of changes which have to be made, as is done in coff-mips.c;
9847 that would be more work, but would require less memory when
9848 the linker is run. */
35c08157 9849
1c8f6a4d
KLC		 9850 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9851 && foff < ACCURATE_8BIT_S1 - first_size)
9852 {
9853 if (!(seq_len & 0x2))
9854 {
9855 /* Don't convert it to 16-bit now, keep this as relaxable
9856 for ``label reloc; INSN1a''6. */
9857 /* Save comp_insn32 to buffer. */
9858 bfd_putb32 (re_insn, contents + irel->r_offset);
9859 *insn_len = 4;
9860 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9861 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9862 cond_reloc = R_NDS32_INSN16;
9863 }
9864 else
9865 {
9866 /* Not optimize for speed; convert sequence to 16-bit. */
9867 /* Save comp_insn16 to buffer. */
9868 bfd_putb16 (re_insn16, contents + irel->r_offset);
9869 *insn_len = 2;
9870 reloc = R_NDS32_9_PCREL_RELA;
9871 cond_reloc = R_NDS32_NONE;
9872 }
9873 cond_removed = 1;
9874 }
9875 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9876 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9877 && foff < ACCURATE_14BIT_S1 - first_size))
9878 {
9879 /* beqs label ; 15_PCREL */
9880 bfd_putb32 (re_insn, contents + irel->r_offset);
9881 *insn_len = 4;
9882 reloc = R_NDS32_15_PCREL_RELA;
9883 cond_reloc = R_NDS32_NONE;
9884 cond_removed = 1;
9885 }
9886 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9887 && foff >= -CONSERVATIVE_16BIT_S1
9888 && foff < CONSERVATIVE_16BIT_S1)
9889 {
9890 /* beqz label ; 17_PCREL */
9891 bfd_putb32 (re_insn, contents + irel->r_offset);
9892 *insn_len = 4;
9893 reloc = R_NDS32_17_PCREL_RELA;
9894 cond_reloc = R_NDS32_NONE;
9895 cond_removed = 1;
9896 }
9897 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9898 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9899 {
9900 /* Relax to one of the following 3 variations
9901
9902 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9903 for space
9904 bnes38 rt, $1 ; LONGJUMP2
9905 j label ; 25_PCREL
9906 $1
9907
9908 case 4-4; 1st insn not convertible, others don't care
9909 bne rt, ra, $1 ; LONGJUMP2
9910 j label ; 25_PCREL
9911 $1
9912
9913 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9914 bne rt, ra, $1 ; LONGJUMP2
9915 j label ; 25_PCREL
9916 $1 */
9917
9918 /* Offset for first instruction. */
9919
9920 /* Use j label as second instruction. */
9921 *insn_len = 4 + first_size;
9922 insn = INSN_J;
9923 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9924 reloc = R_NDS32_LONGJUMP2;
9925 cond_reloc = R_NDS32_25_PLTREL;
9926 }
9927 else
9928 return FALSE;
35c08157 9929
1c8f6a4d
KLC		 9930 if (cond_removed == 1)
9931 {
9932 /* Set all relocations. */
9933 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9934 irel->r_addend = hi_irelfn->r_addend;
9935
9936 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9937 cond_reloc);
9938 cond_irelfn->r_addend = 0;
9939 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9940 R_NDS32_NONE);
9941 }
9942 else
9943 {
9944 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9945 irel->r_addend = irel->r_addend;
9946 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9947 cond_reloc);
9948 }
35c08157 9949
1c8f6a4d
KLC		 9950 if ((seq_len ^ *insn_len ) & 0x2)
9951 {
9952 insn16 = NDS32_NOP16;
9953 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9954 lo_irelfn->r_offset = *insn_len;
9955 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9956 R_NDS32_INSN16);
9957 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9958 *insn_len += 2;
9959 }
9960 else
9961 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9962 R_NDS32_NONE);
9963 return TRUE;
9964}
35c08157 9965
1c8f6a4d 9966/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9967
1c8f6a4d
KLC		 9968static bfd_boolean
9969nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9970 Elf_Internal_Rela *internal_relocs, int *insn_len,
9971 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9972 Elf_Internal_Shdr *symtab_hdr)
9973{
9974 /* The pattern for LONGCALL4. Support for function cse.
9975 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9976 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9977 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9978
1c8f6a4d
KLC		 9979 bfd_vma laddr;
9980 uint32_t insn;
9981 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9982 Elf_Internal_Rela *irelend;
9983 int pic_ext_target = 0;
9984 bfd_signed_vma foff;
35c08157 9985
1c8f6a4d
KLC		 9986 irelend = internal_relocs + sec->reloc_count;
9987 laddr = irel->r_offset;
35c08157 9988
1c8f6a4d
KLC		 9989 /* Get the reloc for the address from which the register is
9990 being loaded. This reloc will tell us which function is
9991 actually being called. */
9992 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9993 R_NDS32_HI20_RELA, laddr);
35c08157 9994
1c8f6a4d
KLC		 9995 if (hi_irel == irelend)
9996 {
695344c0
NC		 9997 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
9998 (long) irel->r_offset);
1c8f6a4d
KLC		 9999 return FALSE;
10000 }
35c08157 10001
1c8f6a4d
KLC		 10002 /* Get the value of the symbol referred to by the reloc. */
10003 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10004 &pic_ext_target);
35c08157 10005
1c8f6a4d
KLC		 10006 /* This condition only happened when symbol is undefined. */
10007 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10008 || foff >= CONSERVATIVE_24BIT_S1)
10009 return FALSE;
35c08157 10010
1c8f6a4d
KLC		 10011 /* Relax to: jal symbol; 25_PCREL */
10012 /* For simplicity of coding, we are going to modify the section
10013 contents, the section relocs, and the BFD symbol table. We
10014 must tell the rest of the code not to free up this
10015 information. It would be possible to instead create a table
10016 of changes which have to be made, as is done in coff-mips.c;
10017 that would be more work, but would require less memory when
10018 the linker is run. */
35c08157 10019
1c8f6a4d
KLC		 10020 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10021 R_NDS32_PTR_RESOLVED, irel->r_addend);
10022 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10023 R_NDS32_EMPTY, irel->r_addend);
35c08157 10024
1c8f6a4d
KLC		 10025 if (ptr_irel == irelend || em_irel == irelend)
10026 {
695344c0
NC		 10027 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
10028 (long) irel->r_offset);
1c8f6a4d
KLC		 10029 return FALSE;
10030 }
10031 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10032 insn = bfd_getb32 (contents + irel->r_addend);
10033 if (insn & 0x80000000)
10034 return FALSE;
35c08157 10035
1c8f6a4d
KLC		 10036 /* Replace the long call with a jal. */
10037 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10038 R_NDS32_25_PCREL_RELA);
10039 ptr_irel->r_addend = 1;
35c08157 10040
1c8f6a4d
KLC		 10041 /* We don't resolve this here but resolve it in relocate_section. */
10042 insn = INSN_JAL;
10043 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10044
1c8f6a4d
KLC		 10045 irel->r_info =
10046 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10047
1c8f6a4d
KLC		 10048 /* If there is function cse, HI20 can not remove now. */
10049 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10050 R_NDS32_LONGCALL4, laddr);
10051 if (call_irel == irelend)
10052 {
10053 *insn_len = 0;
10054 hi_irel->r_info =
10055 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10056 }
35c08157 10057
1c8f6a4d
KLC		 10058 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10059 R_NDS32_INSN16, irel->r_addend);
10060 if (insn_irel != irelend)
10061 insn_irel->r_info =
10062 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10063
1c8f6a4d
KLC		 10064 return TRUE;
10065}
35c08157 10066
1c8f6a4d 10067/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10068
1c8f6a4d
KLC		 10069static bfd_boolean
10070nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10071 Elf_Internal_Rela *internal_relocs, int *insn_len,
10072 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10073 Elf_Internal_Shdr *symtab_hdr)
10074{
10075 /* The pattern for LONGCALL5.
10076 bltz rt, .L1 ; LONGCALL5/17_PCREL
10077 jal symbol ; 25_PCREL
10078 .L1: */
35c08157 10079
1c8f6a4d
KLC		 10080 bfd_vma laddr;
10081 uint32_t insn;
10082 Elf_Internal_Rela *cond_irel, *irelend;
10083 int pic_ext_target = 0;
10084 bfd_signed_vma foff;
35c08157 10085
1c8f6a4d
KLC		 10086 irelend = internal_relocs + sec->reloc_count;
10087 laddr = irel->r_offset;
10088 insn = bfd_getb32 (contents + laddr);
35c08157 10089
1c8f6a4d
KLC		 10090 /* Get the reloc for the address from which the register is
10091 being loaded. This reloc will tell us which function is
10092 actually being called. */
10093 cond_irel =
10094 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10095 R_NDS32_25_PCREL_RELA, irel->r_addend);
10096 if (cond_irel == irelend)
10097 {
695344c0
NC		 10098 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
10099 (long) irel->r_offset);
1c8f6a4d
KLC		 10100 return FALSE;
10101 }
35c08157 10102
1c8f6a4d
KLC		 10103 /* Get the value of the symbol referred to by the reloc. */
10104 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10105 &pic_ext_target);
35c08157 10106
1c8f6a4d
KLC		 10107 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10108 || foff >= CONSERVATIVE_16BIT_S1)
10109 return FALSE;
35c08157 10110
1c8f6a4d
KLC		 10111 /* Relax to bgezal rt, label ; 17_PCREL
10112 or bltzal rt, label ; 17_PCREL */
35c08157 10113
1c8f6a4d
KLC		 10114 /* Convert to complimentary conditional call. */
10115 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10116
1c8f6a4d
KLC		 10117 /* For simplicity of coding, we are going to modify the section
10118 contents, the section relocs, and the BFD symbol table. We
10119 must tell the rest of the code not to free up this
10120 information. It would be possible to instead create a table
10121 of changes which have to be made, as is done in coff-mips.c;
10122 that would be more work, but would require less memory when
10123 the linker is run. */
35c08157 10124
1c8f6a4d
KLC		 10125 /* Modify relocation and contents. */
10126 cond_irel->r_info =
10127 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10128
1c8f6a4d
KLC		 10129 /* Replace the long call with a bgezal. */
10130 bfd_putb32 (insn, contents + cond_irel->r_offset);
10131 *insn_len = 0;
35c08157 10132
1c8f6a4d
KLC		 10133 /* Clean unnessary relocations. */
10134 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10135
1c8f6a4d
KLC		 10136 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10137 R_NDS32_17_PCREL_RELA, laddr);
10138 cond_irel->r_info =
10139 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10140
1c8f6a4d
KLC		 10141 return TRUE;
10142}
35c08157 10143
1c8f6a4d 10144/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10145
1c8f6a4d
KLC		 10146static bfd_boolean
10147nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10148 Elf_Internal_Rela *internal_relocs, int *insn_len,
10149 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10150 Elf_Internal_Shdr *symtab_hdr)
10151{
10152 /* The pattern for LONGCALL6.
10153 bltz rt, .L1 ; LONGCALL6/17_PCREL
10154 sethi ta, hi20(symbol) ; HI20/PTR
10155 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10156 jral ta ; PTR_RES/EMPTY/INSN16
10157 .L1 */
10158
10159 bfd_vma laddr;
10160 uint32_t insn;
10161 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10162 int pic_ext_target = 0;
10163 bfd_signed_vma foff;
35c08157 10164
1c8f6a4d
KLC		 10165 irelend = internal_relocs + sec->reloc_count;
10166 laddr = irel->r_offset;
35c08157 10167
1c8f6a4d
KLC		 10168 /* Get the reloc for the address from which the register is
10169 being loaded. This reloc will tell us which function is
10170 actually being called. */
10171 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10172 R_NDS32_EMPTY, irel->r_addend);
35c08157 10173
1c8f6a4d
KLC		 10174 if (em_irel == irelend)
10175 {
695344c0
NC		 10176 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
10177 (long) irel->r_offset);
1c8f6a4d
KLC		 10178 return FALSE;
10179 }
35c08157 10180
1c8f6a4d
KLC		 10181 /* Get the value of the symbol referred to by the reloc. */
10182 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10183 &pic_ext_target);
35c08157 10184
1c8f6a4d
KLC		 10185 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10186 || foff >= CONSERVATIVE_24BIT_S1)
10187 return FALSE;
35c08157 10188
1c8f6a4d
KLC		 10189 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10190 insn = bfd_getb32 (contents + irel->r_addend);
10191 if (insn & 0x80000000)
10192 return FALSE;
35c08157 10193
1c8f6a4d
KLC		 10194 insn = bfd_getb32 (contents + laddr);
10195 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10196 {
10197 /* Relax to bgezal rt, label ; 17_PCREL
10198 or bltzal rt, label ; 17_PCREL */
35c08157 10199
1c8f6a4d
KLC		 10200 /* Convert to complimentary conditional call. */
10201 *insn_len = 0;
10202 insn = CONVERT_CONDITION_CALL (insn);
10203 bfd_putb32 (insn, contents + em_irel->r_offset);
10204
10205 em_irel->r_info =
10206 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10207
10208 /* Set resolved relocation. */
10209 cond_irel =
10210 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10211 R_NDS32_PTR_RESOLVED, irel->r_addend);
10212 if (cond_irel == irelend)
35c08157 10213 {
695344c0
NC		 10214 _bfd_error_handler (unrecognized_reloc_msg, abfd,
10215 "R_NDS32_LONGCALL6", (long) irel->r_offset);
1c8f6a4d
KLC		 10216 return FALSE;
10217 }
10218 cond_irel->r_addend = 1;
35c08157 10219
1c8f6a4d 10220 /* Clear relocations. */
35c08157 10221
1c8f6a4d
KLC		 10222 irel->r_info =
10223 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10224
1c8f6a4d
KLC		 10225 cond_irel =
10226 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10227 R_NDS32_17_PCREL_RELA, laddr);
10228 if (cond_irel != irelend)
10229 cond_irel->r_info =
10230 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10231
1c8f6a4d
KLC		 10232 cond_irel =
10233 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10234 R_NDS32_INSN16, irel->r_addend);
10235 if (cond_irel != irelend)
10236 cond_irel->r_info =
10237 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10238
1c8f6a4d
KLC		 10239 }
10240 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10241 {
10242 /* Relax to the following instruction sequence
10243 bltz rt, .L1 ; LONGCALL2/17_PCREL
10244 jal symbol ; 25_PCREL/PTR_RES
10245 .L1 */
10246 *insn_len = 4;
10247 /* Convert instruction. */
10248 insn = INSN_JAL;
10249 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10250
1c8f6a4d
KLC		 10251 /* Convert relocations. */
10252 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10253 R_NDS32_25_PCREL_RELA);
10254 irel->r_info =
10255 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10256
1c8f6a4d
KLC		 10257 /* Set resolved relocation. */
10258 cond_irel =
10259 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10260 R_NDS32_PTR_RESOLVED, irel->r_addend);
10261 if (cond_irel == irelend)
10262 {
695344c0
NC		 10263 _bfd_error_handler (unrecognized_reloc_msg, abfd,
10264 "R_NDS32_LONGCALL6", (long) irel->r_offset);
1c8f6a4d
KLC		 10265 return FALSE;
10266 }
10267 cond_irel->r_addend = 1;
35c08157 10268
1c8f6a4d
KLC		 10269 cond_irel =
10270 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10271 R_NDS32_INSN16, irel->r_addend);
10272 if (cond_irel != irelend)
10273 cond_irel->r_info =
10274 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10275 }
10276 return TRUE;
10277}
35c08157 10278
1c8f6a4d 10279/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10280
1c8f6a4d
KLC		 10281static bfd_boolean
10282nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10283 Elf_Internal_Rela *internal_relocs, int *insn_len,
10284 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10285 Elf_Internal_Shdr *symtab_hdr)
10286{
10287 /* The pattern for LONGJUMP4.
10288 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10289 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10290 jr ta ; PTR_RES/INSN16/EMPTY */
10291
10292 bfd_vma laddr;
10293 int seq_len; /* Original length of instruction sequence. */
10294 uint32_t insn;
10295 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10296 int pic_ext_target = 0;
10297 bfd_signed_vma foff;
35c08157 10298
1c8f6a4d
KLC		 10299 irelend = internal_relocs + sec->reloc_count;
10300 seq_len = GET_SEQ_LEN (irel->r_addend);
10301 laddr = irel->r_offset;
10302 *insn_len = seq_len;
35c08157 10303
1c8f6a4d
KLC		 10304 /* Get the reloc for the address from which the register is
10305 being loaded. This reloc will tell us which function is
10306 actually being called. */
35c08157 10307
1c8f6a4d
KLC		 10308 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10309 R_NDS32_HI20_RELA, laddr);
35c08157 10310
1c8f6a4d
KLC		 10311 if (hi_irel == irelend)
10312 {
695344c0
NC		 10313 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
10314 (long) irel->r_offset);
1c8f6a4d
KLC		 10315 return FALSE;
10316 }
35c08157 10317
1c8f6a4d
KLC		 10318 /* Get the value of the symbol referred to by the reloc. */
10319 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10320 &pic_ext_target);
35c08157 10321
1c8f6a4d
KLC		 10322 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10323 || foff < -CONSERVATIVE_24BIT_S1)
10324 return FALSE;
35c08157 10325
1c8f6a4d
KLC		 10326 /* Convert it to "j label", it may be converted to j8 in the final
10327 pass of relaxation. Therefore, we do not consider this currently. */
10328 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10329 R_NDS32_PTR_RESOLVED, irel->r_addend);
10330 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10331 R_NDS32_EMPTY, irel->r_addend);
35c08157 10332
1c8f6a4d
KLC		 10333 if (ptr_irel == irelend || em_irel == irelend)
10334 {
695344c0
NC		 10335 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
10336 (long) irel->r_offset);
1c8f6a4d
KLC		 10337 return FALSE;
10338 }
35c08157 10339
1c8f6a4d
KLC		 10340 em_irel->r_info =
10341 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10342 ptr_irel->r_addend = 1;
35c08157 10343
1c8f6a4d
KLC		 10344 /* Write instruction. */
10345 insn = INSN_J;
10346 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10347
1c8f6a4d
KLC		 10348 /* Clear relocations. */
10349 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10350
1c8f6a4d
KLC		 10351 /* If there is function cse, HI20 can not remove now. */
10352 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10353 R_NDS32_LONGJUMP4, laddr);
10354 if (call_irel == irelend)
10355 {
10356 *insn_len = 0;
10357 hi_irel->r_info =
10358 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10359 }
35c08157 10360
1c8f6a4d
KLC		 10361 return TRUE;
10362}
35c08157 10363
1c8f6a4d 10364/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10365
1c8f6a4d
KLC		 10366static bfd_boolean
10367nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10368 Elf_Internal_Rela *internal_relocs, int *insn_len,
10369 int *seq_len, bfd_byte *contents,
10370 Elf_Internal_Sym *isymbuf,
10371 Elf_Internal_Shdr *symtab_hdr)
10372{
10373 /* There are 2 variations for LONGJUMP5
10374 case 2-4; 1st insn convertible, 16-bit on.
10375 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10376 j label ; 25_PCREL/INSN16
10377 $1:
10378
10379 case 4-4; 1st insn not convertible
10380 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10381 j label ; 25_PCREL/INSN16
10382 .L1: */
10383
10384 bfd_vma laddr;
10385 Elf_Internal_Rela *cond_irel, *irelend;
10386 int pic_ext_target = 0;
10387 unsigned int i;
10388 bfd_signed_vma foff;
10389 uint32_t insn, re_insn = 0;
10390 uint16_t insn16, re_insn16 = 0;
10391 unsigned long reloc;
35c08157 10392
1c8f6a4d
KLC		 10393 enum elf_nds32_reloc_type checked_types[] =
10394 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10395 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10396
1c8f6a4d
KLC		 10397 irelend = internal_relocs + sec->reloc_count;
10398 laddr = irel->r_offset;
35c08157 10399
1c8f6a4d
KLC		 10400 /* Get the reloc for the address from which the register is
10401 being loaded. This reloc will tell us which function is
10402 actually being called. */
35c08157 10403
1c8f6a4d
KLC		 10404 cond_irel =
10405 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10406 R_NDS32_25_PCREL_RELA, irel->r_addend);
10407 if (cond_irel == irelend)
10408 {
695344c0
NC		 10409 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
10410 (long) irel->r_offset);
1c8f6a4d
KLC		 10411 return FALSE;
10412 }
35c08157 10413
1c8f6a4d
KLC		 10414 /* Get the value of the symbol referred to by the reloc. */
10415 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10416 &pic_ext_target);
35c08157 10417
1c8f6a4d
KLC		 10418 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10419 || foff >= CONSERVATIVE_16BIT_S1)
10420 return FALSE;
35c08157 10421
1c8f6a4d
KLC		 10422 /* Get the all corresponding instructions. */
10423 insn = bfd_getb32 (contents + laddr);
10424 /* Check instruction size. */
10425 if (insn & 0x80000000)
10426 {
10427 *seq_len = 0;
10428 insn16 = insn >> 16;
10429 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10430 }
10431 else
10432 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10433
1c8f6a4d
KLC		 10434 if (N32_OP6 (re_insn) == N32_OP6_BR1
10435 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10436 {
10437 /* beqs label ; 15_PCREL. */
10438 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10439 reloc = R_NDS32_15_PCREL_RELA;
10440 }
10441 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10442 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10443 {
10444 /* beqz label ; 17_PCREL. */
10445 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10446 reloc = R_NDS32_17_PCREL_RELA;
10447 }
10448 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10449 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10450 {
10451 /* beqc label ; 9_PCREL. */
10452 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10453 reloc = R_NDS32_WORD_9_PCREL_RELA;
10454 }
10455 else
10456 return FALSE;
35c08157 10457
1c8f6a4d
KLC		 10458 /* Set all relocations. */
10459 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10460
1c8f6a4d
KLC		 10461 /* Clean relocations. */
10462 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10463 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10464 {
10465 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10466 checked_types[i], laddr);
10467 if (cond_irel != irelend)
10468 {
10469 if (*seq_len == 0
10470 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10471 {
1c8f6a4d
KLC		 10472 /* If the branch instruction is 2 byte, it cannot remove
10473 directly. Only convert it to nop16 and remove it after
10474 checking alignment issue. */
10475 insn16 = NDS32_NOP16;
10476 bfd_putb16 (insn16, contents + laddr);
10477 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10478 }
10479 else
1c8f6a4d
KLC		 10480 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10481 R_NDS32_NONE);
35c08157 10482 }
1c8f6a4d
KLC		 10483 }
10484 *insn_len = 0;
35c08157 10485
1c8f6a4d
KLC		 10486 return TRUE;
10487}
35c08157 10488
1c8f6a4d 10489/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10490
1c8f6a4d
KLC		 10491static bfd_boolean
10492nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10493 Elf_Internal_Rela *internal_relocs, int *insn_len,
10494 int *seq_len, bfd_byte *contents,
10495 Elf_Internal_Sym *isymbuf,
10496 Elf_Internal_Shdr *symtab_hdr)
10497{
10498 /* There are 5 variations for LONGJUMP6
10499 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10500 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10501 sethi ta, hi20(symbol) ; HI20/PTR
10502 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10503 jr ta ; PTR_RES/INSN16/EMPTY
10504 .L1:
10505
10506 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10507 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10508 sethi ta, hi20(symbol) ; HI20/PTR
10509 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10510 jr ta ; PTR_RES/INSN16/EMPTY
10511 .L1: */
10512
10513 enum elf_nds32_reloc_type checked_types[] =
10514 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10515 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10516
10517 int reloc_off = 0, cond_removed = 0;
10518 bfd_vma laddr;
10519 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10520 int pic_ext_target = 0;
10521 unsigned int i;
10522 bfd_signed_vma foff;
10523 uint32_t insn, re_insn = 0;
10524 uint16_t insn16, re_insn16 = 0;
10525 unsigned long reloc;
35c08157 10526
1c8f6a4d
KLC		 10527 irelend = internal_relocs + sec->reloc_count;
10528 laddr = irel->r_offset;
35c08157 10529
1c8f6a4d
KLC		 10530 /* Get the reloc for the address from which the register is
10531 being loaded. This reloc will tell us which function is
10532 actually being called. */
10533 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10534 R_NDS32_EMPTY, irel->r_addend);
35c08157 10535
1c8f6a4d
KLC		 10536 if (em_irel == irelend)
10537 {
695344c0
NC		 10538 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
10539 (long) irel->r_offset);
1c8f6a4d
KLC		 10540 return FALSE;
10541 }
35c08157 10542
1c8f6a4d
KLC		 10543 /* Get the value of the symbol referred to by the reloc. */
10544 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10545 &pic_ext_target);
35c08157 10546
1c8f6a4d
KLC		 10547 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10548 || foff >= CONSERVATIVE_24BIT_S1)
10549 return FALSE;
35c08157 10550
1c8f6a4d
KLC		 10551 insn = bfd_getb32 (contents + laddr);
10552 /* Check instruction size. */
10553 if (insn & 0x80000000)
10554 {
10555 *seq_len = 0;
10556 insn16 = insn >> 16;
10557 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10558 }
10559 else
10560 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10561
1c8f6a4d
KLC		 10562 /* For simplicity of coding, we are going to modify the section
10563 contents, the section relocs, and the BFD symbol table. We
10564 must tell the rest of the code not to free up this
10565 information. It would be possible to instead create a table
10566 of changes which have to be made, as is done in coff-mips.c;
10567 that would be more work, but would require less memory when
10568 the linker is run. */
35c08157 10569
1c8f6a4d
KLC		 10570 if (N32_OP6 (re_insn) == N32_OP6_BR1
10571 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10572 {
10573 /* beqs label ; 15_PCREL */
10574 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10575 reloc = R_NDS32_15_PCREL_RELA;
10576 cond_removed = 1;
10577 }
10578 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10579 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10580 {
10581 /* beqz label ; 17_PCREL */
10582 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10583 reloc = R_NDS32_17_PCREL_RELA;
10584 cond_removed = 1;
10585 }
10586 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10587 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10588 {
10589 /* Relax to one of the following 2 variations
35c08157 10590
1c8f6a4d
KLC		 10591 case 2-4; 1st insn convertible, 16-bit on.
10592 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10593 j label ; 25_PCREL/INSN16
10594 $1:
35c08157 10595
1c8f6a4d
KLC		 10596 case 4-4; 1st insn not convertible
10597 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10598 j label ; 25_PCREL/INSN16
10599 .L1: */
35c08157 10600
1c8f6a4d
KLC		 10601 /* Use j label as second instruction. */
10602 insn = INSN_J;
10603 reloc = R_NDS32_25_PCREL_RELA;
10604 bfd_putb32 (insn, contents + em_irel->r_offset);
10605 }
10606 else
10607 return FALSE;
35c08157 10608
1c8f6a4d
KLC		 10609 /* Set all relocations. */
10610 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10611
1c8f6a4d
KLC		 10612 cond_irel =
10613 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10614 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10615 cond_irel->r_addend = 1;
35c08157 10616
1c8f6a4d
KLC		 10617 /* Use INSN16 of first branch instruction to distinguish if keeping
10618 INSN16 of final instruction or not. */
10619 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10620 R_NDS32_INSN16, irel->r_offset);
10621 if (insn_irel == irelend)
10622 {
10623 /* Clean the final INSN16. */
10624 insn_irel =
10625 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10626 R_NDS32_INSN16, em_irel->r_offset);
10627 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10628 R_NDS32_NONE);
10629 }
10630
10631 if (cond_removed == 1)
10632 {
10633 *insn_len = 0;
10634
10635 /* Clear relocations. */
10636 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10637
1c8f6a4d
KLC		 10638 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10639 {
10640 cond_irel =
10641 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10642 checked_types[i], laddr);
10643 if (cond_irel != irelend)
35c08157 10644 {
1c8f6a4d
KLC		 10645 if (*seq_len == 0
10646 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10647 {
10648 /* If the branch instruction is 2 byte, it cannot remove
10649 directly. Only convert it to nop16 and remove it after
10650 checking alignment issue. */
10651 insn16 = NDS32_NOP16;
10652 bfd_putb16 (insn16, contents + laddr);
10653 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10654 }
10655 else
10656 cond_irel->r_info =
10657 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10658 }
35c08157 10659 }
1c8f6a4d
KLC		 10660 }
10661 else
10662 {
10663 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10664 R_NDS32_LONGJUMP5);
10665 }
35c08157 10666
1c8f6a4d
KLC		 10667 return TRUE;
10668}
35c08157 10669
1c8f6a4d 10670/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10671
1c8f6a4d
KLC		 10672static bfd_boolean
10673nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10674 Elf_Internal_Rela *internal_relocs, int *insn_len,
10675 int *seq_len, bfd_byte *contents,
10676 Elf_Internal_Sym *isymbuf,
10677 Elf_Internal_Shdr *symtab_hdr)
10678{
10679 /* There are 2 variations for LONGJUMP5
10680 case 2-4; 1st insn convertible, 16-bit on.
10681 movi55 ta, imm11 ; LONGJUMP7/INSN16
10682 beq rt, ta, label ; 15_PCREL
10683
10684 case 4-4; 1st insn not convertible
10685 movi55 ta, imm11 ; LONGJUMP7/INSN16
10686 beq rt, ta, label ; 15_PCREL */
10687
10688 bfd_vma laddr;
10689 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10690 int pic_ext_target = 0;
10691 bfd_signed_vma foff;
10692 uint32_t insn, re_insn = 0;
10693 uint16_t insn16;
10694 uint32_t imm11;
35c08157 10695
1c8f6a4d
KLC		 10696 irelend = internal_relocs + sec->reloc_count;
10697 laddr = irel->r_offset;
35c08157 10698
1c8f6a4d
KLC		 10699 /* Get the reloc for the address from which the register is
10700 being loaded. This reloc will tell us which function is
10701 actually being called. */
35c08157 10702
1c8f6a4d
KLC		 10703 cond_irel =
10704 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10705 R_NDS32_15_PCREL_RELA, irel->r_addend);
10706 if (cond_irel == irelend)
10707 {
695344c0
NC		 10708 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
10709 (long) irel->r_offset);
1c8f6a4d
KLC		 10710 return FALSE;
10711 }
35c08157 10712
1c8f6a4d
KLC		 10713 /* Get the value of the symbol referred to by the reloc. */
10714 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10715 &pic_ext_target);
35c08157 10716
1c8f6a4d
KLC		 10717 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10718 || foff >= CONSERVATIVE_8BIT_S1)
10719 return FALSE;
35c08157 10720
1c8f6a4d
KLC		 10721 /* Get the first instruction for its size. */
10722 insn = bfd_getb32 (contents + laddr);
10723 if (insn & 0x80000000)
10724 {
10725 *seq_len = 0;
10726 /* Get the immediate from movi55. */
10727 imm11 = N16_IMM5S (insn >> 16);
10728 }
10729 else
10730 {
10731 /* Get the immediate from movi. */
10732 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10733 }
10734
1c8f6a4d
KLC		 10735 /* Get the branch instruction. */
10736 insn = bfd_getb32 (contents + irel->r_addend);
10737 /* Convert instruction to BR3. */
10738 if ((insn >> 14) & 0x1)
10739 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10740 else
10741 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10742
1c8f6a4d 10743 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10744
1c8f6a4d
KLC		 10745 /* Set all relocations. */
10746 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10747 R_NDS32_WORD_9_PCREL_RELA);
10748
10749 /* Clean relocations. */
10750 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10751 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10752 R_NDS32_INSN16, irel->r_offset);
10753 if (insn_irel != irelend)
10754 {
10755 if (*seq_len == 0)
35c08157 10756 {
1c8f6a4d
KLC		 10757 /* If the first insntruction is 16bit, convert it to nop16. */
10758 insn16 = NDS32_NOP16;
10759 bfd_putb16 (insn16, contents + laddr);
10760 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10761 }
1c8f6a4d
KLC		 10762 else
10763 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10764 R_NDS32_NONE);
35c08157 10765 }
1c8f6a4d 10766 *insn_len = 0;
35c08157 10767
1c8f6a4d
KLC		 10768 return TRUE;
10769}
35c08157 10770
1c8f6a4d 10771#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10772
1c8f6a4d 10773/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10774
1c8f6a4d
KLC		 10775static bfd_boolean
10776nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10777 asection *sec, Elf_Internal_Rela *irel,
10778 Elf_Internal_Rela *internal_relocs, int *insn_len,
10779 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10780 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10781{
6cae483a
AM		 10782 int eliminate_sethi = 0, range_type;
10783 unsigned int i;
1c8f6a4d
KLC		 10784 bfd_vma local_sda, laddr;
10785 int seq_len; /* Original length of instruction sequence. */
10786 uint32_t insn;
10787 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10788 bfd_vma access_addr = 0;
10789 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10790 enum elf_nds32_reloc_type checked_types[] =
10791 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10792 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10793 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10794 R_NDS32_TLS_LE_HI20
10795 };
35c08157 10796
1c8f6a4d
KLC		 10797 irelend = internal_relocs + sec->reloc_count;
10798 seq_len = GET_SEQ_LEN (irel->r_addend);
10799 laddr = irel->r_offset;
10800 *insn_len = seq_len;
35c08157 10801
1c8f6a4d 10802 /* Get the high part relocation. */
6cae483a 10803 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10804 {
10805 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10806 checked_types[i], laddr);
10807 if (hi_irelfn != irelend)
10808 break;
10809 }
35c08157 10810
1c8f6a4d
KLC		 10811 if (hi_irelfn == irelend)
10812 {
695344c0
NC		 10813 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
10814 (long) irel->r_offset);
1c8f6a4d
KLC		 10815 return FALSE;
10816 }
35c08157 10817
1c8f6a4d
KLC		 10818 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10819 nds32_elf_final_sda_base (sec->output_section->owner,
10820 link_info, &local_sda, FALSE);
35c08157 10821
1c8f6a4d
KLC		 10822 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10823 {
10824 case R_NDS32_HI20_RELA:
10825 insn = bfd_getb32 (contents + laddr);
10826 access_addr =
10827 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10828
10829 if (range_type == NDS32_LOADSTORE_IMM)
10830 {
10831 struct elf_link_hash_entry *h = NULL;
10832 int indx;
35c08157 10833
1c8f6a4d 10834 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10835 {
1c8f6a4d
KLC		 10836 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10837 h = elf_sym_hashes (abfd)[indx];
35c08157 10838 }
35c08157 10839
1c8f6a4d
KLC		 10840 if ((access_addr < CONSERVATIVE_20BIT)
10841 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10842 {
1c8f6a4d
KLC		 10843 eliminate_sethi = 1;
10844 break;
35c08157 10845 }
1c8f6a4d
KLC		 10846
10847 /* This is avoid to relax symbol address which is fixed
10848 relocations. Ex: _stack. */
10849 if (h && bfd_is_abs_section (h->root.u.def.section))
10850 return FALSE;
10851 }
10852
10853 if (!load_store_relax)
10854 return FALSE;
10855
10856 /* Case for set gp register. */
10857 if (N32_RT5 (insn) == REG_GP)
10858 break;
10859
10860 if (range_type == NDS32_LOADSTORE_FLOAT_S
10861 || range_type == NDS32_LOADSTORE_FLOAT_S)
10862 {
10863 range_l = sdata_range[0][0];
10864 range_h = sdata_range[0][1];
10865 }
10866 else
10867 {
10868 range_l = sdata_range[1][0];
10869 range_h = sdata_range[1][1];
10870 }
10871 break;
10872
10873 case R_NDS32_GOT_HI20:
10874 access_addr =
10875 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10876
10877 /* If this symbol is not in .got, the return value will be -1.
10878 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10879 a negative offset is allowed. */
10880 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10881 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10882 eliminate_sethi = 1;
10883 break;
10884
10885 case R_NDS32_PLT_GOTREL_HI20:
10886 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10887 hi_irelfn, symtab_hdr);
10888
10889 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10890 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10891 eliminate_sethi = 1;
10892 break;
10893
10894 case R_NDS32_GOTOFF_HI20:
10895 access_addr =
10896 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10897
10898 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10899 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10900 eliminate_sethi = 1;
10901 break;
10902
10903 case R_NDS32_GOTPC_HI20:
10904 /* The access_addr must consider r_addend of hi_irel. */
10905 access_addr = sec->output_section->vma + sec->output_offset
10906 + irel->r_offset + hi_irelfn->r_addend;
10907
10908 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10909 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10910 eliminate_sethi = 1;
10911 break;
10912
10913 case R_NDS32_TLS_LE_HI20:
10914 access_addr =
10915 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10916 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10917 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10918 if ((range_type == NDS32_LOADSTORE_IMM)
10919 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10920 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10921 eliminate_sethi = 1;
10922 break;
10923
10924 default:
10925 return FALSE;
10926 }
10927
10928 /* Delete sethi instruction. */
10929 if (eliminate_sethi == 1
10930 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10931 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10932 {
10933 hi_irelfn->r_info =
10934 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10935 irel->r_info =
10936 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10937 *insn_len = 0;
10938 }
10939 return TRUE;
10940}
10941
10942/* Relax LO12 relocation for nds32_elf_relax_section. */
10943
10944static void
10945nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10946 asection *sec, Elf_Internal_Rela *irel,
10947 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10948 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10949{
10950 uint32_t insn;
10951 bfd_vma local_sda, laddr;
10952 unsigned long reloc;
10953 bfd_vma access_addr;
10954 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10955 Elf_Internal_Rela *irelfn = NULL, *irelend;
10956 struct elf_link_hash_entry *h = NULL;
10957 int indx;
10958
10959 /* For SDA base relative relaxation. */
10960 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10961 &local_sda, FALSE);
10962
10963 irelend = internal_relocs + sec->reloc_count;
10964 laddr = irel->r_offset;
10965 insn = bfd_getb32 (contents + laddr);
10966
10967 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10968 return;
10969
10970 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10971
10972 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10973 {
10974 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10975 h = elf_sym_hashes (abfd)[indx];
10976 }
10977
10978 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10979 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10980 {
10981 reloc = R_NDS32_20_RELA;
10982 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10983 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10984 bfd_putb32 (insn, contents + laddr);
10985 }
10986 /* This is avoid to relax symbol address which is fixed
10987 relocations. Ex: _stack. */
10988 else if (N32_OP6 (insn) == N32_OP6_ORI
10989 && h && bfd_is_abs_section (h->root.u.def.section))
10990 return;
10991 else
10992 {
10993 range_l = sdata_range[1][0];
10994 range_h = sdata_range[1][1];
10995 switch (ELF32_R_TYPE (irel->r_info))
10996 {
10997 case R_NDS32_LO12S0_RELA:
10998 reloc = R_NDS32_SDA19S0_RELA;
10999 break;
11000 case R_NDS32_LO12S1_RELA:
11001 reloc = R_NDS32_SDA18S1_RELA;
11002 break;
11003 case R_NDS32_LO12S2_RELA:
11004 reloc = R_NDS32_SDA17S2_RELA;
11005 break;
11006 case R_NDS32_LO12S2_DP_RELA:
11007 range_l = sdata_range[0][0];
11008 range_h = sdata_range[0][1];
11009 reloc = R_NDS32_SDA12S2_DP_RELA;
11010 break;
11011 case R_NDS32_LO12S2_SP_RELA:
11012 range_l = sdata_range[0][0];
11013 range_h = sdata_range[0][1];
11014 reloc = R_NDS32_SDA12S2_SP_RELA;
11015 break;
11016 default:
11017 return;
11018 }
11019
11020 /* There are range_h and range_l because linker has to promise
11021 all sections move cross one page together. */
11022 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11023 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11024 {
11025 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11026 {
1c8f6a4d
KLC		 11027 /* Maybe we should add R_NDS32_INSN16 reloc type here
11028 or manually do some optimization. sethi can't be
11029 eliminated when updating $gp so the relative ori
11030 needs to be preserved. */
11031 return;
35c08157 11032 }
1c8f6a4d
KLC		 11033 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11034 &insn))
11035 return;
11036 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11037 bfd_putb32 (insn, contents + laddr);
11038
11039 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11040 R_NDS32_INSN16);
11041 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11042 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11043 irelfn->r_info =
11044 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11045
35c08157 11046 }
1c8f6a4d
KLC		 11047 }
11048 return;
11049}
35c08157 11050
1c8f6a4d
KLC		 11051/* Relax low part of PIC instruction pattern. */
11052
11053static void
11054nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11055 asection *sec, Elf_Internal_Rela *irel,
11056 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11057 Elf_Internal_Shdr *symtab_hdr)
11058{
11059 uint32_t insn;
11060 bfd_vma local_sda, laddr;
11061 bfd_signed_vma foff;
11062 unsigned long reloc;
11063
11064 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11065 &local_sda, FALSE);
11066 laddr = irel->r_offset;
11067 insn = bfd_getb32 (contents + laddr);
11068
11069 if (N32_OP6 (insn) != N32_OP6_ORI)
11070 return;
11071
11072 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11073 {
11074 foff = calculate_got_memory_address (abfd, link_info, irel,
11075 symtab_hdr) - local_sda;
11076 reloc = R_NDS32_GOT20;
11077 }
11078 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11079 {
11080 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11081 symtab_hdr) - local_sda;
11082 reloc = R_NDS32_PLT_GOTREL_LO20;
11083 }
11084 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11085 {
11086 foff = calculate_memory_address (abfd, irel, isymbuf,
11087 symtab_hdr) - local_sda;
11088 reloc = R_NDS32_GOTOFF;
11089 }
11090 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11091 {
11092 foff = local_sda - sec->output_section->vma + sec->output_offset
11093 + irel->r_offset + irel->r_addend;
11094 reloc = R_NDS32_GOTPC20;
11095 }
11096 else
11097 return;
11098
11099 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11100 {
11101 /* Turn into MOVI. */
11102 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11103 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11104 bfd_putb32 (insn, contents + laddr);
11105 }
11106}
11107
11108/* Relax low part of LE TLS instruction pattern. */
11109
11110static void
11111nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11112 Elf_Internal_Rela *irel,
11113 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11114 Elf_Internal_Shdr *symtab_hdr)
11115{
11116 uint32_t insn;
11117 bfd_vma laddr;
11118 bfd_signed_vma foff;
11119 unsigned long reloc;
11120
11121 laddr = irel->r_offset;
11122 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11123 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11124 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11125 insn = bfd_getb32 (contents + laddr);
11126
11127 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11128 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11129 {
11130 /* Pattern sethi-ori transform to movi. */
11131 reloc = R_NDS32_TLS_LE_20;
11132 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11133 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11134 bfd_putb32 (insn, contents + laddr);
11135 }
11136}
11137
11138/* Relax LE TLS calculate address instruction pattern. */
11139
11140static void
11141nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11142 asection *sec, Elf_Internal_Rela *irel,
11143 Elf_Internal_Rela *internal_relocs,
11144 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11145 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11146{
11147 /* Local TLS non-pic
11148 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11149 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11150 add ra, ta, tp ; TLS_LE_ADD */
11151
11152 uint32_t insn;
11153 bfd_vma laddr;
11154 bfd_signed_vma foff;
11155 Elf_Internal_Rela *i1_irelfn, *irelend;
11156
11157 irelend = internal_relocs + sec->reloc_count;
11158 laddr = irel->r_offset;
11159 insn = bfd_getb32 (contents + laddr);
11160 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11161 R_NDS32_PTR_RESOLVED);
11162 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11163 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11164 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11165
11166 /* The range is +/-16k. */
11167 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11168 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11169 {
11170 /* Transform add to addi. */
11171 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11172 irel->r_info =
11173 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11174
11175 bfd_putb32 (insn, contents + laddr);
11176 if (i1_irelfn != irelend)
11177 {
11178 i1_irelfn->r_addend |= 1;
11179 *again = TRUE;
11180 }
11181 }
11182}
11183
11184/* Relax LE TLS load store instruction pattern. */
11185
11186static void
11187nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11188 asection *sec, Elf_Internal_Rela *irel,
11189 Elf_Internal_Rela *internal_relocs,
11190 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11191 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11192{
11193
11194 uint32_t insn;
11195 bfd_vma laddr;
11196 bfd_signed_vma foff;
11197 Elf_Internal_Rela *i1_irelfn, *irelend;
11198 int success = 0;
11199
11200 irelend = internal_relocs + sec->reloc_count;
11201 laddr = irel->r_offset;
11202 insn = bfd_getb32 (contents + laddr);
11203 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11204 R_NDS32_PTR_RESOLVED);
11205 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11206 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11207 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11208
11209 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11210 {
11211 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11212 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11213 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11214 /* The range is +/-16k. */
11215 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11216 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11217 {
11218 insn =
11219 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11220 irel->r_info =
11221 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11222 success = 1;
11223 break;
11224 }
1a0670f3 11225 /* Fall through. */
1c8f6a4d
KLC		 11226 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11227 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11228 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11229 /* The range is +/-32k. */
11230 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11231 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11232 {
1c8f6a4d
KLC		 11233 insn =
11234 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11235 irel->r_info =
11236 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11237 success = 1;
11238 break;
11239 }
1a0670f3 11240 /* Fall through. */
1c8f6a4d
KLC		 11241 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11242 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11243 /* The range is +/-64k. */
11244 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11245 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11246 {
11247 insn =
11248 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11249 irel->r_info =
11250 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11251 success = 1;
11252 break;
11253 }
1a0670f3 11254 /* Fall through. */
1c8f6a4d
KLC		 11255 default:
11256 break;
11257 }
35c08157 11258
1c8f6a4d
KLC		 11259 if (success)
11260 {
11261 bfd_putb32 (insn, contents + laddr);
11262 if (i1_irelfn != irelend)
11263 {
11264 i1_irelfn->r_addend |= 1;
11265 *again = TRUE;
11266 }
11267 }
11268}
35c08157 11269
1c8f6a4d 11270/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11271
1c8f6a4d
KLC		 11272static bfd_boolean
11273nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11274 Elf_Internal_Rela *internal_relocs, int *insn_len,
11275 int *seq_len, bfd_byte *contents)
11276{
11277 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11278
1c8f6a4d 11279 irelend = internal_relocs + sec->reloc_count;
35c08157 11280
1c8f6a4d
KLC		 11281 re_irel =
11282 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11283 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11284
1c8f6a4d
KLC		 11285 if (re_irel == irelend)
11286 {
695344c0
NC		 11287 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
11288 (long) irel->r_offset);
1c8f6a4d
KLC		 11289 return FALSE;
11290 }
35c08157 11291
1c8f6a4d
KLC		 11292 if (re_irel->r_addend != 1)
11293 return FALSE;
35c08157 11294
1c8f6a4d
KLC		 11295 /* Pointed target is relaxed and no longer needs this void *,
11296 change the type to NONE. */
11297 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11298
1c8f6a4d
KLC		 11299 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11300 not exist, it means only count 1 and remove it directly. */
11301 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11302 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11303 R_NDS32_PTR_COUNT);
11304 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11305 R_NDS32_PTR);
11306 if (count_irel != irelend)
11307 {
11308 if (--count_irel->r_addend > 0)
11309 return FALSE;
11310 }
11311
11312 if (ptr_irel != irelend)
11313 return FALSE;
11314
11315 /* If the PTR_COUNT is already 0, remove current instruction. */
11316 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11317 *insn_len = 0;
11318 return TRUE;
11319}
11320
11321/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11322
11323static void
11324nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11325 asection *sec, Elf_Internal_Rela *irel,
11326 Elf_Internal_Rela *internal_relocs,
11327 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11328 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11329{
11330 uint32_t insn;
11331 bfd_signed_vma foff;
11332 Elf_Internal_Rela *i1_irelfn, *irelend;
11333 bfd_vma local_sda, laddr;
11334
11335 irelend = internal_relocs + sec->reloc_count;
11336 laddr = irel->r_offset;
11337 insn = bfd_getb32 (contents + laddr);
11338
11339 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11340 we need additional space. It might be help if we could
11341 borrow some space from instructions to be eliminated
11342 such as sethi, ori, add. */
11343 if (insn & 0x80000000)
11344 return;
11345
11346 if (nds32_elf_check_dup_relocs
11347 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11348 return;
11349
11350 i1_irelfn =
11351 find_relocs_at_address (irel, internal_relocs, irelend,
11352 R_NDS32_PTR_RESOLVED);
11353
11354 /* FIXIT 090606
11355 The boundary should be reduced since the .plt section hasn't
11356 been created and the address of specific entry is still unknown
11357 Maybe the range between the function call and the begin of the
11358 .text section can be used to decide if the .plt is in the range
11359 of function call. */
11360
11361 if (N32_OP6 (insn) == N32_OP6_ALU1
11362 && N32_SUB5 (insn) == N32_ALU1_ADD)
11363 {
11364 /* Get the value of the symbol referred to by the reloc. */
11365 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11366 &local_sda, FALSE);
11367 foff = (bfd_signed_vma) (calculate_plt_memory_address
11368 (abfd, link_info, isymbuf, irel,
11369 symtab_hdr) - local_sda);
11370 /* This condition only happened when symbol is undefined. */
11371 if (foff == 0)
11372 return;
11373
11374 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11375 return;
11376 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11377 R_NDS32_PLT_GOTREL_LO19);
11378 /* addi.gp */
11379 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11380 }
11381 else if (N32_OP6 (insn) == N32_OP6_JREG
11382 && N32_SUB5 (insn) == N32_JREG_JRAL)
11383 {
11384 /* Get the value of the symbol referred to by the reloc. */
11385 foff =
11386 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11387 /* This condition only happened when symbol is undefined. */
11388 if (foff == 0)
11389 return;
11390 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11391 return;
11392 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11393 insn = INSN_JAL;
11394 }
11395 else
11396 return;
11397
11398 bfd_putb32 (insn, contents + laddr);
11399 if (i1_irelfn != irelend)
11400 {
11401 i1_irelfn->r_addend |= 1;
11402 *again = TRUE;
11403 }
11404}
11405
11406/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11407
11408static void
11409nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11410 asection *sec, Elf_Internal_Rela *irel,
11411 Elf_Internal_Rela *internal_relocs,
11412 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11413 bfd_boolean *again)
11414{
11415 uint32_t insn;
11416 bfd_signed_vma foff;
11417 Elf_Internal_Rela *i1_irelfn, *irelend;
11418 bfd_vma local_sda, laddr;
11419
11420 irelend = internal_relocs + sec->reloc_count;
11421 laddr = irel->r_offset;
11422 insn = bfd_getb32 (contents + laddr);
11423 if (insn & 0x80000000)
11424 return;
11425
11426 if (nds32_elf_check_dup_relocs
11427 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11428 return;
11429
11430 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11431 R_NDS32_PTR_RESOLVED);
11432
11433 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11434 &local_sda, FALSE);
11435 foff = calculate_got_memory_address (abfd, link_info, irel,
11436 symtab_hdr) - local_sda;
11437
11438 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11439 {
11440 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11441 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11442 irel->r_info =
11443 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11444 bfd_putb32 (insn, contents + laddr);
11445 if (i1_irelfn != irelend)
11446 {
11447 i1_irelfn->r_addend |= 1;
11448 *again = TRUE;
11449 }
11450 }
11451}
11452
11453/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11454
11455static void
11456nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11457 asection *sec, Elf_Internal_Rela *irel,
11458 Elf_Internal_Rela *internal_relocs,
11459 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11460 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11461{
11462 int opc_insn_gotoff;
11463 uint32_t insn;
11464 bfd_signed_vma foff;
11465 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11466 bfd_vma local_sda, laddr;
11467
11468 irelend = internal_relocs + sec->reloc_count;
11469 laddr = irel->r_offset;
11470 insn = bfd_getb32 (contents + laddr);
11471
11472 if (insn & 0x80000000)
11473 return;
11474
11475 if (nds32_elf_check_dup_relocs
11476 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11477 return;
11478
11479 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11480 R_NDS32_PTR_RESOLVED);
11481 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11482 &local_sda, FALSE);
11483 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11484 foff = foff - local_sda;
11485
11486 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11487 return;
11488
11489 /* Concatenate opcode and sub-opcode for switch case.
11490 It may be MEM or ALU1. */
11491 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11492 switch (opc_insn_gotoff)
11493 {
11494 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11495 /* 4-byte aligned. */
11496 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11497 irel->r_info =
11498 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11499 break;
11500 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11501 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11502 irel->r_info =
11503 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11504 break;
11505 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11506 /* 2-byte aligned. */
11507 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11508 irel->r_info =
11509 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11510 break;
11511 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11512 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11513 irel->r_info =
11514 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11515 break;
11516 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11517 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11518 irel->r_info =
11519 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11520 break;
11521 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11522 /* 1-byte aligned. */
11523 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11524 irel->r_info =
11525 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11526 break;
11527 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11528 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11529 irel->r_info =
11530 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11531 break;
11532 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11533 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11534 irel->r_info =
11535 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11536 break;
11537 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11538 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11539 irel->r_info =
11540 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11541 break;
11542 default:
11543 return;
11544 }
11545
11546 bfd_putb32 (insn, contents + laddr);
11547 if (i1_irelfn != irelend)
11548 {
11549 i1_irelfn->r_addend |= 1;
11550 *again = TRUE;
11551 }
11552 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11553 R_NDS32_INSN16)) != irelend)
11554 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11555
11556}
11557
11558static bfd_boolean
11559nds32_relax_adjust_label (bfd *abfd, asection *sec,
11560 Elf_Internal_Rela *internal_relocs,
11561 bfd_byte *contents,
11562 nds32_elf_blank_t **relax_blank_list,
11563 int optimize, int opt_size)
11564{
11565 /* This code block is used to adjust 4-byte alignment by relax a pair
11566 of instruction a time.
11567
11568 It recognizes three types of relocations.
11569 1. R_NDS32_LABEL - a aligment.
11570 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11571 3. is_16bit_NOP () - remove a 16-bit instruction. */
11572
11573 /* TODO: It seems currently implementation only support 4-byte aligment.
11574 We should handle any-aligment. */
11575
11576 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11577 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11578 Elf_Internal_Rela rel_temp;
11579 Elf_Internal_Rela *irelend;
11580 bfd_vma address;
11581 uint16_t insn16;
11582
11583 /* Checking for branch relaxation relies on the relocations to
11584 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11585 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11586 sizeof (Elf_Internal_Rela), compar_reloc);
11587
11588 irelend = internal_relocs + sec->reloc_count;
11589
11590 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11591 /* FIXME: Can we generate the right order in assembler?
11592 So we don't have to swapping them here. */
11593
11594 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11595 label_rel < irelend; label_rel++)
11596 {
11597 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11598 continue;
11599
11600 /* Find the first reloc has the same offset with label_rel. */
11601 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11602 insn_rel++;
11603
11604 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11605 insn_rel++)
11606 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11607 address. */
11608 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11609 break;
11610
11611 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11612 && insn_rel < label_rel)
11613 {
11614 /* Swap the two reloc if the R_NDS32_INSN16 is
11615 before R_NDS32_LABEL. */
11616 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11617 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11618 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11619 }
11620 }
11621
11622 label_rel = NULL;
11623 insn_rel = NULL;
11624 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11625 or higher, remove other R_NDS32_LABEL with lower alignment.
11626 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11627 then the R_NDS32_LABEL sequence is broke. */
11628 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11629 {
11630 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11631 {
11632 if (label_rel == NULL)
11633 {
11634 if (tmp_rel->r_addend < 2)
11635 label_rel = tmp_rel;
11636 continue;
11637 }
11638 else if (tmp_rel->r_addend > 1)
11639 {
11640 /* Remove all LABEL relocation from label_rel to tmp_rel
11641 including relocations with same offset as tmp_rel. */
11642 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11643 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11644 {
11645 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11646 && tmp2_rel->r_addend < 2)
11647 tmp2_rel->r_info =
11648 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11649 R_NDS32_NONE);
11650 }
11651 label_rel = NULL;
11652 }
11653 }
11654 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11655 {
11656 /* A new INSN16 which can be converted, so clear label_rel. */
11657 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11658 irelend, &insn16)
11659 || is_16bit_NOP (abfd, sec, tmp_rel))
11660 label_rel = NULL;
11661 }
11662 }
11663
11664 label_rel = NULL;
11665 insn_rel = NULL;
11666 /* Optimized for speed and nothing has not been relaxed.
11667 It's time to align labels.
11668 We may convert a 16-bit instruction right before a label to
11669 32-bit, in order to align the label if necessary
11670 all reloc entries has been sorted by r_offset. */
11671 for (irel = internal_relocs; irel < irelend; irel++)
11672 {
11673 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11674 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11675 continue;
11676
11677 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11678 {
11679 /* A new INSN16 found, resize the old one. */
11680 if (is_convert_32_to_16
11681 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11682 || is_16bit_NOP (abfd, sec, irel))
11683 {
11684 if (insn_rel)
11685 {
11686 /* Previous INSN16 reloc exists, reduce its
11687 size to 16-bit. */
11688 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11689 irelend, &insn16))
35c08157 11690 {
1c8f6a4d
KLC		 11691 nds32_elf_write_16 (abfd, contents, insn_rel,
11692 internal_relocs, irelend, insn16);
11693
11694 if (!insert_nds32_elf_blank_recalc_total
11695 (relax_blank_list, insn_rel->r_offset + 2, 2))
11696 return FALSE;
11697 }
11698 else if (is_16bit_NOP (abfd, sec, insn_rel))
11699 {
11700 if (!insert_nds32_elf_blank_recalc_total
11701 (relax_blank_list, insn_rel->r_offset, 2))
11702 return FALSE;
11703 }
11704 insn_rel->r_info =
11705 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11706 }
11707 /* Save the new one for later use. */
11708 insn_rel = irel;
11709 }
11710 else
11711 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11712 R_NDS32_NONE);
11713 }
11714 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11715 {
11716 /* Search for label. */
11717 int force_relax = 0;
11718
11719 /* Label on 16-bit instruction or optimization
11720 needless, just reset this reloc. */
11721 insn16 = bfd_getb16 (contents + irel->r_offset);
11722 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11723 {
11724 irel->r_info =
11725 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11726 continue;
11727 }
11728
11729 address =
11730 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11731 irel->r_offset, 1);
11732
11733 if (!insn_rel)
11734 {
11735 /* Check if there is case which can not be aligned. */
11736 if (irel->r_addend == 2 && address & 0x2)
11737 return FALSE;
11738 continue;
11739 }
11740
11741 /* Try to align this label. */
11742
11743 if ((irel->r_addend & 0x1f) < 2)
11744 {
11745 /* Check if there is a INSN16 at the same address.
11746 Label_rel always seats before insn_rel after
11747 our sort. */
11748
11749 /* Search for INSN16 at LABEL location. If INSN16 is at
11750 same location and this LABEL alignment is lower than 2,
11751 the INSN16 can be converted to 2-byte. */
11752 for (tmp_rel = irel;
11753 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11754 tmp_rel++)
11755 {
11756 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11757 && (is_convert_32_to_16
11758 (abfd, sec, tmp_rel, internal_relocs,
11759 irelend, &insn16)
11760 || is_16bit_NOP (abfd, sec, tmp_rel)))
11761 {
11762 force_relax = 1;
11763 break;
11764 }
11765 }
11766 }
11767
11768 if (force_relax || irel->r_addend == 1 || address & 0x2)
11769 {
11770 /* Label not aligned. */
11771 /* Previous reloc exists, reduce its size to 16-bit. */
11772 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11773 internal_relocs, irelend, &insn16))
11774 {
11775 nds32_elf_write_16 (abfd, contents, insn_rel,
11776 internal_relocs, irelend, insn16);
11777
11778 if (!insert_nds32_elf_blank_recalc_total
11779 (relax_blank_list, insn_rel->r_offset + 2, 2))
11780 return FALSE;
11781 }
11782 else if (is_16bit_NOP (abfd, sec, insn_rel))
11783 {
11784 if (!insert_nds32_elf_blank_recalc_total
11785 (relax_blank_list, insn_rel->r_offset, 2))
11786 return FALSE;
11787 }
11788
11789 }
11790 /* INSN16 reloc is used. */
11791 insn_rel = NULL;
11792 }
11793 }
11794
11795 address =
11796 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11797 if (insn_rel && (address & 0x2 || opt_size))
11798 {
11799 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11800 irelend, &insn16))
11801 {
11802 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11803 irelend, insn16);
11804 if (!insert_nds32_elf_blank_recalc_total
11805 (relax_blank_list, insn_rel->r_offset + 2, 2))
11806 return FALSE;
11807 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11808 R_NDS32_NONE);
11809 }
11810 else if (is_16bit_NOP (abfd, sec, insn_rel))
11811 {
11812 if (!insert_nds32_elf_blank_recalc_total
11813 (relax_blank_list, insn_rel->r_offset, 2))
11814 return FALSE;
11815 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11816 R_NDS32_NONE);
11817 }
11818 }
11819 insn_rel = NULL;
11820 return TRUE;
11821}
11822
11823/* Pick relaxation round. */
11824
11825static int
11826nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11827 struct elf_nds32_link_hash_table *table,
11828 struct bfd_link_info *link_info)
11829{
18393a2e
KLC		 11830 static asection *final_sec, *first_sec = NULL;
11831 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC		 11832 static bfd_boolean set = FALSE;
11833 static bfd_boolean first = TRUE;
11834 int round_table[] = {
11835 NDS32_RELAX_NORMAL_ROUND,
11836 NDS32_RELAX_JUMP_IFC_ROUND,
11837 NDS32_RELAX_EX9_BUILD_ROUND,
11838 NDS32_RELAX_EX9_REPLACE_ROUND,
11839 };
11840 static int pass = 0;
11841 static int relax_round;
11842
18393a2e
KLC		 11843 /* The new round. */
11844 if (init && first_sec == sec)
11845 {
11846 set = TRUE;
11847 normal_again = FALSE;
11848 }
11849
1c8f6a4d
KLC		 11850 if (first)
11851 {
11852 /* Run an empty run to get the final section. */
11853 relax_round = NDS32_RELAX_EMPTY_ROUND;
11854
11855 /* It has to enter relax again because we can
11856 not make sure what the final turn is. */
11857 *again = TRUE;
18393a2e 11858
1c8f6a4d 11859 first = FALSE;
18393a2e 11860 first_sec = sec;
1c8f6a4d
KLC		 11861 }
11862
18393a2e 11863 if (!set)
1c8f6a4d 11864 {
18393a2e 11865 /* Not reenter yet. */
1c8f6a4d
KLC		 11866 final_sec = sec;
11867 return relax_round;
11868 }
11869
1c8f6a4d
KLC		 11870 relax_round = round_table[pass];
11871
18393a2e
KLC		 11872 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11873 normal_again = TRUE;
11874
1c8f6a4d
KLC		 11875 if (!init && final_sec == sec)
11876 {
11877 switch (relax_round)
11878 {
11879 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11880 if (!normal_again)
1c8f6a4d
KLC		 11881 {
11882 /* Normal relaxation done. */
11883 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11884 {
11885 pass++;
11886 *again = TRUE;
11887 }
11888 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11889 {
11890 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11891 *again = TRUE;
11892 }
11893 else if (table->ex9_import_file)
11894 {
11895 /* Import ex9 table. */
11896 if (table->update_ex9_table)
11897 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11898 else
11899 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11900 nds32_elf_ex9_import_table (link_info);
11901 *again = TRUE;
11902 }
11903 }
11904 break;
11905 case NDS32_RELAX_JUMP_IFC_ROUND:
11906 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11907 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC		 11908 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11909 {
11910 pass++;
11911 *again = TRUE;
11912 }
11913 break;
11914 case NDS32_RELAX_EX9_BUILD_ROUND:
11915 nds32_elf_ex9_finish (link_info);
11916 pass++;
11917 *again = TRUE;
11918 break;
11919 case NDS32_RELAX_EX9_REPLACE_ROUND:
11920 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11921 {
11922 /* Do jump IFC optimization again. */
11923 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11924 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC		 11925 }
11926 break;
11927 default:
11928 break;
11929 }
11930 }
11931
11932 return relax_round;
11933}
11934
11935static bfd_boolean
11936nds32_elf_relax_section (bfd *abfd, asection *sec,
11937 struct bfd_link_info *link_info, bfd_boolean *again)
11938{
11939 nds32_elf_blank_t *relax_blank_list = NULL;
11940 Elf_Internal_Shdr *symtab_hdr;
11941 Elf_Internal_Rela *internal_relocs;
11942 Elf_Internal_Rela *irel;
11943 Elf_Internal_Rela *irelend;
11944 Elf_Internal_Sym *isymbuf = NULL;
11945 bfd_byte *contents = NULL;
11946 bfd_boolean result = TRUE;
11947 int optimize = 0;
11948 int opt_size = 0;
11949 uint32_t insn;
11950 uint16_t insn16;
11951
11952 /* Target dependnet option. */
11953 struct elf_nds32_link_hash_table *table;
11954 int load_store_relax;
11955 int relax_round;
11956
11957 relax_blank_list = NULL;
11958
11959 *again = FALSE;
11960
11961 /* Nothing to do for
11962 * relocatable link or
11963 * non-relocatable section or
11964 * non-code section or
11965 * empty content or
11966 * no reloc entry. */
0e1862bb 11967 if (bfd_link_relocatable (link_info)
1c8f6a4d
KLC		 11968 || (sec->flags & SEC_RELOC) == 0
11969 || (sec->flags & SEC_EXCLUDE) == 1
11970 || (sec->flags & SEC_CODE) == 0
11971 || sec->size == 0)
11972 return TRUE;
11973
11974 /* 09.12.11 Workaround. */
11975 /* We have to adjust align for R_NDS32_LABEL if needed.
11976 The adjust approach only can fix 2-byte align once. */
11977 if (sec->alignment_power > 2)
11978 return TRUE;
11979
11980 /* The optimization type to do. */
11981
11982 table = nds32_elf_hash_table (link_info);
11983 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11984 switch (relax_round)
11985 {
11986 case NDS32_RELAX_JUMP_IFC_ROUND:
11987 /* Here is the entrance of ifc jump relaxation. */
11988 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11989 return FALSE;
11990 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11991 return TRUE;
11992
11993 case NDS32_RELAX_EX9_BUILD_ROUND:
11994 /* Here is the entrance of ex9 relaxation. There are two pass of
11995 ex9 relaxation. The one is to traverse all instructions and build
11996 the hash table. The other one is to compare instructions and replace
11997 it by ex9.it. */
11998 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11999 return FALSE;
12000 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12001 return TRUE;
12002
12003 case NDS32_RELAX_EX9_REPLACE_ROUND:
12004 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12005 return FALSE;
12006 return TRUE;
12007
12008 case NDS32_RELAX_EMPTY_ROUND:
12009 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12010 return TRUE;
12011
12012 case NDS32_RELAX_NORMAL_ROUND:
12013 default:
12014 if (sec->reloc_count == 0)
12015 return TRUE;
12016 break;
12017 }
12018
12019 /* The begining of general relaxation. */
12020
12021 if (is_SDA_BASE_set == 0)
12022 {
12023 bfd_vma gp;
12024 is_SDA_BASE_set = 1;
12025 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12026 &gp, FALSE);
12027 relax_range_measurement (abfd);
12028 }
12029
12030 if (is_ITB_BASE_set == 0)
12031 {
12032 /* Set the _ITB_BASE_. */
12033 if (!nds32_elf_ex9_itb_base (link_info))
12034 {
4eca0228 12035 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), abfd);
1c8f6a4d
KLC		 12036 bfd_set_error (bfd_error_bad_value);
12037 }
12038 }
12039
12040 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12041 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12042 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12043 TRUE /* keep_memory */);
12044 if (internal_relocs == NULL)
12045 goto error_return;
12046
12047 irelend = internal_relocs + sec->reloc_count;
12048 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12049 irelend, R_NDS32_RELAX_ENTRY);
12050
12051 if (irel == irelend)
12052 return TRUE;
12053
12054 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12055 {
12056 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC		 12057 {
12058 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12059 return TRUE;
12060 }
1c8f6a4d
KLC		 12061
12062 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12063 optimize = 1;
12064
12065 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12066 opt_size = 1;
12067 }
12068
12069 load_store_relax = table->load_store_relax;
12070
12071 /* Get symbol table and section content. */
0c4bd9d9 12072 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC		 12073 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12074 goto error_return;
12075
12076 /* Do relax loop only when finalize is not done.
12077 Take care of relaxable relocs except INSN16. */
12078 for (irel = internal_relocs; irel < irelend; irel++)
12079 {
12080 int seq_len; /* Original length of instruction sequence. */
12081 int insn_len = 0; /* Final length of instruction sequence. */
12082 bfd_boolean removed;
12083
12084 insn = 0;
12085 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12086 && (irel->r_addend & 0x1f) >= 2)
12087 optimize = 1;
12088
12089 /* Relocation Types
12090 R_NDS32_LONGCALL1 53
12091 R_NDS32_LONGCALL2 54
12092 R_NDS32_LONGCALL3 55
12093 R_NDS32_LONGJUMP1 56
12094 R_NDS32_LONGJUMP2 57
12095 R_NDS32_LONGJUMP3 58
12096 R_NDS32_LOADSTORE 59 */
12097 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12098 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12099 seq_len = GET_SEQ_LEN (irel->r_addend);
12100
12101 /* Relocation Types
12102 R_NDS32_LONGCALL4 107
12103 R_NDS32_LONGCALL5 108
12104 R_NDS32_LONGCALL6 109
12105 R_NDS32_LONGJUMP4 110
12106 R_NDS32_LONGJUMP5 111
12107 R_NDS32_LONGJUMP6 112
12108 R_NDS32_LONGJUMP7 113 */
12109 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12110 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12111 seq_len = 4;
12112
12113 /* Relocation Types
12114 R_NDS32_LO12S0_RELA 30
12115 R_NDS32_LO12S1_RELA 29
12116 R_NDS32_LO12S2_RELA 28
12117 R_NDS32_LO12S2_SP_RELA 71
12118 R_NDS32_LO12S2_DP_RELA 70
12119 R_NDS32_GOT_LO12 46
12120 R_NDS32_GOTOFF_LO12 50
12121 R_NDS32_PLTREL_LO12 65
12122 R_NDS32_PLT_GOTREL_LO12 67
12123 R_NDS32_17IFC_PCREL_RELA 96
12124 R_NDS32_GOT_SUFF 193
12125 R_NDS32_GOTOFF_SUFF 194
12126 R_NDS32_PLT_GOT_SUFF 195
12127 R_NDS32_MULCALL_SUFF 196
12128 R_NDS32_PTR 197 */
12129 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12130 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12131 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12132 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12133 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12134 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12135 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12136 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12137 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12138 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12139 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12140 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12141 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12144 seq_len = 0;
12145 else
12146 continue;
12147
12148 insn_len = seq_len;
12149 removed = FALSE;
12150
12151 switch (ELF32_R_TYPE (irel->r_info))
12152 {
12153 case R_NDS32_LONGCALL1:
12154 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12155 &insn_len, contents, isymbuf,
12156 symtab_hdr);
12157 break;
12158 case R_NDS32_LONGCALL2:
12159 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12160 &insn_len, contents, isymbuf,
12161 symtab_hdr);
12162 break;
12163 case R_NDS32_LONGCALL3:
12164 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12165 &insn_len, contents, isymbuf,
12166 symtab_hdr);
12167 break;
12168 case R_NDS32_LONGJUMP1:
12169 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12170 &insn_len, contents, isymbuf,
12171 symtab_hdr);
12172 break;
12173 case R_NDS32_LONGJUMP2:
12174 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12175 &insn_len, contents, isymbuf,
12176 symtab_hdr);
12177 break;
12178 case R_NDS32_LONGJUMP3:
12179 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12180 &insn_len, contents, isymbuf,
12181 symtab_hdr);
12182 break;
12183 case R_NDS32_LONGCALL4:
12184 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12185 &insn_len, contents, isymbuf,
12186 symtab_hdr);
12187 break;
12188 case R_NDS32_LONGCALL5:
12189 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12190 &insn_len, contents, isymbuf,
12191 symtab_hdr);
12192 break;
12193 case R_NDS32_LONGCALL6:
12194 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12195 &insn_len, contents, isymbuf,
12196 symtab_hdr);
12197 break;
12198 case R_NDS32_LONGJUMP4:
12199 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12200 &insn_len, contents, isymbuf,
12201 symtab_hdr);
12202 break;
12203 case R_NDS32_LONGJUMP5:
12204 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12205 &insn_len, &seq_len, contents,
12206 isymbuf, symtab_hdr);
12207 break;
12208 case R_NDS32_LONGJUMP6:
12209 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12210 &insn_len, &seq_len, contents,
12211 isymbuf, symtab_hdr);
12212 break;
12213 case R_NDS32_LONGJUMP7:
12214 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12215 &insn_len, &seq_len, contents,
12216 isymbuf, symtab_hdr);
12217 break;
12218 case R_NDS32_LOADSTORE:
12219 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12220 internal_relocs, &insn_len,
12221 contents, isymbuf, symtab_hdr,
12222 load_store_relax);
12223 break;
12224 case R_NDS32_LO12S0_RELA:
12225 case R_NDS32_LO12S1_RELA:
12226 case R_NDS32_LO12S2_DP_RELA:
12227 case R_NDS32_LO12S2_SP_RELA:
12228 case R_NDS32_LO12S2_RELA:
12229 /* Relax for low part. */
12230 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12231 contents, isymbuf, symtab_hdr);
12232
12233 /* It is impossible to delete blank, so just continue. */
12234 continue;
12235 case R_NDS32_GOT_LO12:
12236 case R_NDS32_GOTOFF_LO12:
12237 case R_NDS32_PLTREL_LO12:
12238 case R_NDS32_PLT_GOTREL_LO12:
12239 case R_NDS32_GOTPC_LO12:
12240 /* Relax for PIC gp-relative low part. */
12241 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12242 isymbuf, symtab_hdr);
35c08157 12243
1c8f6a4d
KLC		 12244 /* It is impossible to delete blank, so just continue. */
12245 continue;
12246 case R_NDS32_TLS_LE_LO12:
12247 /* Relax for LE TLS low part. */
12248 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12249 isymbuf, symtab_hdr);
35c08157 12250
1c8f6a4d
KLC		 12251 /* It is impossible to delete blank, so just continue. */
12252 continue;
12253 case R_NDS32_TLS_LE_ADD:
12254 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12255 contents, isymbuf, symtab_hdr, again);
12256 /* It is impossible to delete blank, so just continue. */
12257 continue;
12258 case R_NDS32_TLS_LE_LS:
12259 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12260 contents, isymbuf, symtab_hdr, again);
12261 continue;
12262 case R_NDS32_PTR:
12263 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12264 &insn_len, &seq_len, contents);
12265 break;
12266 case R_NDS32_PLT_GOT_SUFF:
12267 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12268 internal_relocs, contents,
12269 isymbuf, symtab_hdr, again);
12270 /* It is impossible to delete blank, so just continue. */
12271 continue;
12272 case R_NDS32_GOT_SUFF:
12273 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12274 internal_relocs, contents,
12275 symtab_hdr, again);
12276 /* It is impossible to delete blank, so just continue. */
12277 continue;
12278 case R_NDS32_GOTOFF_SUFF:
12279 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12280 internal_relocs, contents,
12281 isymbuf, symtab_hdr, again);
12282 /* It is impossible to delete blank, so just continue. */
12283 continue;
12284 default:
12285 continue;
12286
12287 }
12288 if (removed && seq_len - insn_len > 0)
12289 {
12290 if (!insert_nds32_elf_blank
12291 (&relax_blank_list, irel->r_offset + insn_len,
12292 seq_len - insn_len))
12293 goto error_return;
12294 *again = TRUE;
35c08157 12295 }
1c8f6a4d
KLC		 12296 }
12297
12298 calc_nds32_blank_total (relax_blank_list);
12299
12300 if (table->relax_fp_as_gp)
12301 {
12302 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12303 irelend, isymbuf))
12304 goto error_return;
35c08157 12305
1c8f6a4d 12306 if (*again == FALSE)
35c08157 12307 {
1c8f6a4d
KLC		 12308 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12309 irelend))
12310 goto error_return;
35c08157
KLC		 12311 }
12312 }
1c8f6a4d
KLC		 12313
12314 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12315
12316 if (*again == FALSE)
12317 {
12318 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12319 &relax_blank_list, optimize, opt_size))
12320 goto error_return;
12321 }
12322
12323 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12324 If object file is assembled with flag '-Os',
12325 the we don't adjust jump-destination on 4-byte boundary. */
12326
12327 if (relax_blank_list)
12328 {
12329 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12330 relax_blank_list = NULL;
12331 }
12332
12333 if (*again == FALSE)
12334 {
12335 /* Closing the section, so we don't relax it anymore. */
12336 bfd_vma sec_size_align;
12337 Elf_Internal_Rela *tmp_rel;
12338
12339 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12340 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12341 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12342 if ((sec_size_align - sec->size) & 0x2)
12343 {
12344 insn16 = NDS32_NOP16;
12345 bfd_putb16 (insn16, contents + sec->size);
12346 sec->size += 2;
12347 }
12348
12349 while (sec_size_align != sec->size)
12350 {
12351 insn = NDS32_NOP32;
12352 bfd_putb32 (insn, contents + sec->size);
12353 sec->size += 4;
12354 }
12355
1c8f6a4d
KLC		 12356 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12357 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12358 if (tmp_rel != irelend)
12359 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12360
12361 clean_nds32_elf_blank ();
12362 }
12363
12364finish:
12365 if (internal_relocs != NULL
12366 && elf_section_data (sec)->relocs != internal_relocs)
12367 free (internal_relocs);
12368
12369 if (contents != NULL
12370 && elf_section_data (sec)->this_hdr.contents != contents)
12371 free (contents);
12372
12373 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12374 free (isymbuf);
12375
12376 return result;
12377
12378error_return:
12379 result = FALSE;
12380 goto finish;
12381}
12382
12383static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12384{
12385 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12386 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12387 {NULL, 0, 0, 0, 0}
12388};
12389
12390static bfd_boolean
12391nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12392 struct bfd_link_info *info,
12393 void *finfo ATTRIBUTE_UNUSED,
12394 bfd_boolean (*func) (void *, const char *,
12395 Elf_Internal_Sym *,
12396 asection *,
12397 struct elf_link_hash_entry *)
12398 ATTRIBUTE_UNUSED)
12399{
12400 FILE *sym_ld_script = NULL;
12401 struct elf_nds32_link_hash_table *table;
12402
12403 table = nds32_elf_hash_table (info);
12404 sym_ld_script = table->sym_ld_script;
12405
12406 if (check_start_export_sym)
12407 fprintf (sym_ld_script, "}\n");
12408
12409 return TRUE;
12410}
12411
12412static enum elf_reloc_type_class
12413nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12414 const asection *rel_sec ATTRIBUTE_UNUSED,
12415 const Elf_Internal_Rela *rela)
12416{
12417 switch ((int) ELF32_R_TYPE (rela->r_info))
12418 {
12419 case R_NDS32_RELATIVE:
12420 return reloc_class_relative;
12421 case R_NDS32_JMP_SLOT:
12422 return reloc_class_plt;
12423 case R_NDS32_COPY:
12424 return reloc_class_copy;
12425 default:
12426 return reloc_class_normal;
12427 }
12428}
12429
12430/* Put target dependent option into info hash table. */
12431void
12432bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12433 int relax_fp_as_gp,
12434 int eliminate_gc_relocs,
12435 FILE * sym_ld_script, int load_store_relax,
12436 int target_optimize, int relax_status,
12437 int relax_round, FILE * ex9_export_file,
12438 FILE * ex9_import_file,
12439 int update_ex9_table, int ex9_limit,
12440 bfd_boolean ex9_loop_aware,
12441 bfd_boolean ifc_loop_aware)
12442{
12443 struct elf_nds32_link_hash_table *table;
12444
12445 table = nds32_elf_hash_table (link_info);
12446 if (table == NULL)
12447 return;
12448
12449 table->relax_fp_as_gp = relax_fp_as_gp;
12450 table->eliminate_gc_relocs = eliminate_gc_relocs;
12451 table->sym_ld_script = sym_ld_script;
12452 table ->load_store_relax = load_store_relax;
12453 table->target_optimize = target_optimize;
12454 table->relax_status = relax_status;
12455 table->relax_round = relax_round;
12456 table->ex9_export_file = ex9_export_file;
12457 table->ex9_import_file = ex9_import_file;
12458 table->update_ex9_table = update_ex9_table;
12459 table->ex9_limit = ex9_limit;
12460 table->ex9_loop_aware = ex9_loop_aware;
12461 table->ifc_loop_aware = ifc_loop_aware;
12462}
12463\f
12464/* These functions and data-structures are used for fp-as-gp
12465 optimization. */
12466
12467#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12468/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12469 the read-only section and read-write section. */
12470#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12471
12472/* An nds32_fag represent a gp-relative access.
12473 We find best fp-base by using a sliding window
12474 to find a base address which can cover most gp-access. */
12475struct nds32_fag
12476{
12477 struct nds32_fag *next; /* NULL-teminated linked list. */
12478 bfd_vma addr; /* The address of this fag. */
12479 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12480 It is used for applying FP7U2_FLAG. */
12481 int count; /* How many times this address is referred.
12482 There should be exactly `count' relocations
12483 in relas. */
12484 int relas_capcity; /* The buffer size of relas.
12485 We use an array instead of linked-list,
12486 and realloc is used to adjust buffer size. */
12487};
12488
12489static void
12490nds32_fag_init (struct nds32_fag *head)
12491{
12492 memset (head, 0, sizeof (struct nds32_fag));
12493}
12494
12495static void
12496nds32_fag_verify (struct nds32_fag *head)
12497{
12498 struct nds32_fag *iter;
12499 struct nds32_fag *prev;
12500
12501 prev = NULL;
12502 iter = head->next;
12503 while (iter)
12504 {
12505 if (prev && prev->addr >= iter->addr)
12506 puts ("Bug in fp-as-gp insertion.");
12507 prev = iter;
12508 iter = iter->next;
12509 }
12510}
12511
12512/* Insert a fag in ascending order.
12513 If a fag of the same address already exists,
12514 they are chained by relas array. */
12515
12516static void
12517nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12518 Elf_Internal_Rela * rel)
12519{
12520 struct nds32_fag *iter;
12521 struct nds32_fag *new_fag;
12522 const int INIT_RELAS_CAP = 4;
12523
12524 for (iter = head;
12525 iter->next && iter->next->addr <= addr;
12526 iter = iter->next)
12527 /* Find somewhere to insert. */ ;
12528
12529 /* `iter' will be equal to `head' if the list is empty. */
12530 if (iter != head && iter->addr == addr)
12531 {
12532 /* The address exists in the list.
12533 Insert `rel' into relocation list, relas. */
12534
12535 /* Check whether relas is big enough. */
12536 if (iter->count >= iter->relas_capcity)
12537 {
12538 iter->relas_capcity *= 2;
12539 iter->relas = bfd_realloc
12540 (iter->relas, iter->relas_capcity * sizeof (void *));
12541 }
12542 iter->relas[iter->count++] = rel;
12543 return;
12544 }
12545
12546 /* This is a new address. Create a fag node for it. */
12547 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12548 memset (new_fag, 0, sizeof (*new_fag));
12549 new_fag->addr = addr;
12550 new_fag->count = 1;
12551 new_fag->next = iter->next;
12552 new_fag->relas_capcity = INIT_RELAS_CAP;
12553 new_fag->relas = (Elf_Internal_Rela **)
12554 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12555 new_fag->relas[0] = rel;
12556 iter->next = new_fag;
12557
12558 nds32_fag_verify (head);
12559}
12560
12561static void
12562nds32_fag_free_list (struct nds32_fag *head)
12563{
12564 struct nds32_fag *iter;
12565
12566 iter = head->next;
12567 while (iter)
12568 {
12569 struct nds32_fag *tmp = iter;
12570 iter = iter->next;
12571 free (tmp->relas);
12572 tmp->relas = NULL;
12573 free (tmp);
12574 }
12575}
12576
35c08157
KLC		 12577/* Find the best fp-base address.
12578 The relocation associated with that address is returned,
12579 so we can track the symbol instead of a fixed address.
12580
12581 When relaxation, the address of an datum may change,
12582 because a text section is shrinked, so the data section
1c8f6a4d 12583 moves forward. If the aligments of text and data section
35c08157
KLC		 12584 are different, their distance may change too.
12585 Therefore, tracking a fixed address is not appriate. */
12586
12587static int
12588nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12589{
12590 struct nds32_fag *base; /* First fag in the window. */
12591 struct nds32_fag *last; /* First fag outside the window. */
12592 int accu = 0; /* Usage accumulation. */
12593 struct nds32_fag *best; /* Best fag. */
12594 int baccu = 0; /* Best accumulation. */
12595
12596 /* Use first fag for initial, and find the last fag in the window.
12597
12598 In each iteration, we could simply subtract previous fag
12599 and accumulate following fags which are inside the window,
12600 untill we each the end. */
12601
1c8f6a4d
KLC		 12602 if (head->next == NULL)
12603 {
12604 *bestpp = NULL;
12605 return 0;
12606 }
35c08157
KLC		 12607
12608 /* Initialize base. */
12609 base = head->next;
12610 best = base;
12611 for (last = base;
12612 last && last->addr < base->addr + FAG_WINDOW;
12613 last = last->next)
12614 accu += last->count;
12615
12616 baccu = accu;
12617
12618 /* Record the best base in each iteration. */
12619 while (base->next)
1c8f6a4d
KLC		 12620 {
12621 accu -= base->count;
12622 base = base->next;
12623 /* Account fags in window. */
12624 for (/* Nothing. */;
12625 last && last->addr < base->addr + FAG_WINDOW;
12626 last = last->next)
12627 accu += last->count;
12628
12629 /* A better fp-base? */
12630 if (accu > baccu)
12631 {
12632 best = base;
12633 baccu = accu;
12634 }
12635 }
35c08157
KLC		 12636
12637 if (bestpp)
12638 *bestpp = best;
12639 return baccu;
12640}
12641
12642/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12643 so we can convert it fo fp-relative access later.
12644 `best_fag' is the best fp-base. Only those inside the window
12645 of best_fag is applied the flag. */
12646
12647static bfd_boolean
12648nds32_fag_mark_relax (struct bfd_link_info *link_info,
12649 bfd *abfd, struct nds32_fag *best_fag,
12650 Elf_Internal_Rela *internal_relocs,
12651 Elf_Internal_Rela *irelend)
12652{
12653 struct nds32_fag *ifag;
12654 bfd_vma best_fpbase, gp;
12655 bfd *output_bfd;
12656
12657 output_bfd = abfd->sections->output_section->owner;
12658 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12659 best_fpbase = best_fag->addr;
12660
1c8f6a4d
KLC		 12661 if (best_fpbase > gp + sdata_range[1][1]
12662 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12663 return FALSE;
12664
12665 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12666 so we know they can be converted to lwi37.fp. */
12667 for (ifag = best_fag;
12668 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12669 {
12670 int i;
12671
12672 for (i = 0; i < ifag->count; i++)
12673 {
12674 Elf_Internal_Rela *insn16_rel;
12675 Elf_Internal_Rela *fag_rel;
12676
12677 fag_rel = ifag->relas[i];
12678
12679 /* Only if this is within the WINDOWS, FP7U2_FLAG
12680 is applied. */
12681
12682 insn16_rel = find_relocs_at_address
12683 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12684
12685 if (insn16_rel != irelend)
12686 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12687 }
12688 }
12689 return TRUE;
12690}
12691
1c8f6a4d
KLC		 12692/* Reset INSN16 to clean fp as gp. */
12693
12694static void
12695nds32_fag_unmark_relax (struct nds32_fag *fag,
12696 Elf_Internal_Rela *internal_relocs,
12697 Elf_Internal_Rela *irelend)
12698{
12699 struct nds32_fag *ifag;
12700 int i;
12701 Elf_Internal_Rela *insn16_rel;
12702 Elf_Internal_Rela *fag_rel;
12703
12704 for (ifag = fag; ifag; ifag = ifag->next)
12705 {
12706 for (i = 0; i < ifag->count; i++)
12707 {
12708 fag_rel = ifag->relas[i];
12709
12710 /* Restore the INSN16 relocation. */
12711 insn16_rel = find_relocs_at_address
12712 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12713
12714 if (insn16_rel != irelend)
12715 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12716 }
12717 }
12718}
12719
35c08157
KLC		 12720/* This is the main function of fp-as-gp optimization.
12721 It should be called by relax_section. */
12722
12723static bfd_boolean
12724nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12725 bfd *abfd, asection *sec,
12726 Elf_Internal_Rela *internal_relocs,
12727 Elf_Internal_Rela *irelend,
12728 Elf_Internal_Sym *isymbuf)
12729{
12730 Elf_Internal_Rela *begin_rel = NULL;
12731 Elf_Internal_Rela *irel;
12732 struct nds32_fag fag_head;
12733 Elf_Internal_Shdr *symtab_hdr;
12734 bfd_byte *contents;
1c8f6a4d 12735 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12736
12737 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12738
12739 /* Per-function fp-base selection.
12740 1. Create a list for all the gp-relative access.
12741 2. Base on those gp-relative address,
12742 find a fp-base which can cover most access.
12743 3. Use the fp-base for fp-as-gp relaxation.
12744
12745 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12746 we should
12747 1. delete the `la $fp, _FP_BASE_' instruction and
12748 2. not convert lwi.gp to lwi37.fp.
12749
12750 To delete the _FP_BASE_ instruction, we simply apply
12751 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12752
12753 To suppress the conversion, we simply NOT to apply
12754 R_NDS32_INSN16_FP7U2_FLAG flag. */
12755
12756 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12757
0c4bd9d9 12758 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 12759 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12760 return FALSE;
12761
12762 /* Check whether it is worth for fp-as-gp optimization,
12763 i.e., at least 3 gp-load.
12764
12765 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12766 apply this optimization. */
12767
12768 for (irel = internal_relocs; irel < irelend; irel++)
12769 {
12770 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12771 One we enter the begin of the region, we track all the LW/ST
12772 instructions, so when we leave the region, we try to find
12773 the best fp-base address for those LW/ST instructions. */
12774
12775 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12776 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12777 {
12778 /* Begin of the region. */
12779 if (begin_rel)
695344c0 12780 /* xgettext:c-format */
4eca0228 12781 _bfd_error_handler (_("%B: Nested OMIT_FP in %A."), abfd, sec);
35c08157
KLC		 12782
12783 begin_rel = irel;
12784 nds32_fag_init (&fag_head);
1c8f6a4d 12785 ifc_inside = FALSE;
35c08157
KLC		 12786 }
12787 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12788 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12789 {
12790 int accu;
1c8f6a4d 12791 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12792 int dist;
12793
12794 /* End of the region.
12795 Check whether it is worth to do fp-as-gp. */
12796
12797 if (begin_rel == NULL)
12798 {
695344c0 12799 /* xgettext:c-format */
4eca0228 12800 _bfd_error_handler (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
35c08157
KLC		 12801 continue;
12802 }
12803
12804 accu = nds32_fag_find_base (&fag_head, &best_fag);
12805
1c8f6a4d
KLC		 12806 /* Clean FP7U2_FLAG because they may set ever. */
12807 tmp_fag = fag_head.next;
12808 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12809
35c08157
KLC		 12810 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12811 if (accu < FAG_THRESHOLD
12812 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12813 internal_relocs, irelend))
12814 {
12815 /* Not worth to do fp-as-gp. */
12816 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12817 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12818 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12819 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12820 nds32_fag_free_list (&fag_head);
12821 begin_rel = NULL;
12822 continue;
12823 }
12824
12825 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12826 so we use it to record the distance to the reloction of best
12827 fp-base. */
12828 dist = best_fag->relas[0] - begin_rel;
12829 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12830 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12831 relocation. And get the base value when relocating. */
1c8f6a4d 12832 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12833 begin_rel->r_addend |= dist << 16;
12834
12835 nds32_fag_free_list (&fag_head);
12836 begin_rel = NULL;
12837 }
12838
1c8f6a4d 12839 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12840 /* Skip if we are not in the region of fp-as-gp. */
12841 continue;
12842
12843 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12844 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12845 {
12846 bfd_vma addr;
12847 uint32_t insn;
12848
12849 /* A gp-relative access is found. Insert it to the fag-list. */
12850
12851 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12852 insn = bfd_getb32 (contents + irel->r_offset);
12853 if (!N32_IS_RT3 (insn))
12854 continue;
12855
12856 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12857 nds32_fag_insert (&fag_head, addr, irel);
12858 }
12859 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12860 {
12861 begin_rel = NULL;
12862 }
1c8f6a4d
KLC		 12863 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12864 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12865 {
12866 /* Suppress fp as gp when encounter ifc. */
12867 ifc_inside = TRUE;
12868 }
35c08157
KLC		 12869 }
12870
12871 return TRUE;
12872}
12873
12874/* Remove unused `la $fp, _FD_BASE_' instruction. */
12875
12876static bfd_boolean
12877nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12878 Elf_Internal_Rela *internal_relocs,
12879 Elf_Internal_Rela *irelend)
12880{
12881 Elf_Internal_Rela *irel;
12882 Elf_Internal_Shdr *symtab_hdr;
12883 bfd_byte *contents = NULL;
12884 nds32_elf_blank_t *relax_blank_list = NULL;
12885 bfd_boolean result = TRUE;
12886 bfd_boolean unused_region = FALSE;
12887
12888 /*
12889 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12890 * R_NDS32_17IFC_PCREL_RELA
12891 * R_NDS32_10IFCU_PCREL_RELA
12892
12893 CASE??????????????
12894 */
12895
12896 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12897 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC		 12898
12899 for (irel = internal_relocs; irel < irelend; irel++)
12900 {
12901 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12902 we marked to in previous pass.
12903 DO NOT scan relocations again, since we've alreadly decided it
12904 and set the flag. */
12905 const char *syname;
12906 int syndx;
12907 uint32_t insn;
12908
12909 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12910 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12911 unused_region = TRUE;
12912 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12913 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12914 unused_region = FALSE;
12915
12916 /* We're not in the region. */
12917 if (!unused_region)
12918 continue;
12919
12920 /* _FP_BASE_ must be a GLOBAL symbol. */
12921 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12922 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12923 continue;
12924
12925 /* The symbol name must be _FP_BASE_. */
12926 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12927 if (strcmp (syname, FP_BASE_NAME) != 0)
12928 continue;
12929
12930 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12931 {
12932 /* addi.gp $fp, -256 */
12933 insn = bfd_getb32 (contents + irel->r_offset);
12934 if (insn != INSN_ADDIGP_TO_FP)
12935 continue;
12936 }
12937 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12938 {
12939 /* addi $fp, $gp, -256 */
12940 insn = bfd_getb32 (contents + irel->r_offset);
12941 if (insn != INSN_ADDI_GP_TO_FP)
12942 continue;
12943 }
12944 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12945 {
12946 /* movi $fp, FP_BASE */
12947 insn = bfd_getb32 (contents + irel->r_offset);
12948 if (insn != INSN_MOVI_TO_FP)
12949 continue;
12950 }
12951 else
12952 continue;
12953
12954 /* We got here because a FP_BASE instruction is found. */
12955 if (!insert_nds32_elf_blank_recalc_total
12956 (&relax_blank_list, irel->r_offset, 4))
12957 goto error_return;
12958 }
12959
12960finish:
12961 if (relax_blank_list)
12962 {
12963 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12964 relax_blank_list = NULL;
12965 }
12966 return result;
12967
12968error_return:
12969 result = FALSE;
12970 goto finish;
12971}
1c8f6a4d
KLC		 12972
12973/* This is a version of bfd_generic_get_relocated_section_contents.
12974 We need this variety because relaxation will modify the dwarf
12975 infomation. When there is undefined symbol reference error mesage,
12976 linker need to dump line number where the symbol be used. However
12977 the address is be relaxed, it can not get the original dwarf contents.
12978 The variety only modify function call for reading in the section. */
12979
12980static bfd_byte *
12981nds32_elf_get_relocated_section_contents (bfd *abfd,
12982 struct bfd_link_info *link_info,
12983 struct bfd_link_order *link_order,
12984 bfd_byte *data,
12985 bfd_boolean relocatable,
12986 asymbol **symbols)
12987{
12988 bfd *input_bfd = link_order->u.indirect.section->owner;
12989 asection *input_section = link_order->u.indirect.section;
12990 long reloc_size;
12991 arelent **reloc_vector;
12992 long reloc_count;
12993
12994 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12995 if (reloc_size < 0)
12996 return NULL;
12997
12998 /* Read in the section. */
0c4bd9d9 12999 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC		 13000 return NULL;
13001
13002 if (reloc_size == 0)
13003 return data;
13004
13005 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13006 if (reloc_vector == NULL)
13007 return NULL;
13008
13009 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13010 reloc_vector, symbols);
13011 if (reloc_count < 0)
13012 goto error_return;
13013
13014 if (reloc_count > 0)
13015 {
13016 arelent **parent;
13017 for (parent = reloc_vector; *parent != NULL; parent++)
13018 {
13019 char *error_message = NULL;
13020 asymbol *symbol;
13021 bfd_reloc_status_type r;
13022
13023 symbol = *(*parent)->sym_ptr_ptr;
13024 if (symbol->section && discarded_section (symbol->section))
13025 {
13026 bfd_byte *p;
13027 static reloc_howto_type none_howto
13028 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13029 "unused", FALSE, 0, 0, FALSE);
13030
13031 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13032 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13033 p);
13034 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13035 (*parent)->addend = 0;
13036 (*parent)->howto = &none_howto;
13037 r = bfd_reloc_ok;
13038 }
13039 else
13040 r = bfd_perform_relocation (input_bfd, *parent, data,
13041 input_section,
13042 relocatable ? abfd : NULL,
13043 &error_message);
13044
13045 if (relocatable)
13046 {
13047 asection *os = input_section->output_section;
13048
13049 /* A partial link, so keep the relocs. */
13050 os->orelocation[os->reloc_count] = *parent;
13051 os->reloc_count++;
13052 }
13053
13054 if (r != bfd_reloc_ok)
13055 {
13056 switch (r)
13057 {
13058 case bfd_reloc_undefined:
1a72702b
AM		 13059 (*link_info->callbacks->undefined_symbol)
13060 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13061 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC		 13062 break;
13063 case bfd_reloc_dangerous:
13064 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 13065 (*link_info->callbacks->reloc_dangerous)
13066 (link_info, error_message,
13067 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13068 break;
13069 case bfd_reloc_overflow:
1a72702b
AM		 13070 (*link_info->callbacks->reloc_overflow)
13071 (link_info, NULL,
13072 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13073 (*parent)->howto->name, (*parent)->addend,
13074 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13075 break;
13076 case bfd_reloc_outofrange:
13077 /* PR ld/13730:
13078 This error can result when processing some partially
13079 complete binaries. Do not abort, but issue an error
13080 message instead. */
13081 link_info->callbacks->einfo
695344c0 13082 /* xgettext:c-format */
1c8f6a4d
KLC		 13083 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13084 abfd, input_section, * parent);
13085 goto error_return;
13086
13087 default:
13088 abort ();
13089 break;
13090 }
13091 }
13092 }
13093 }
13094
13095 free (reloc_vector);
13096 return data;
13097
13098error_return:
13099 free (reloc_vector);
13100 return NULL;
13101}
35c08157
KLC		 13102\f
13103/* Link-time IFC relaxation.
13104 In this optimization, we chains jump instructions
13105 of the same destination with ifcall. */
13106
13107
13108/* List to save jal and j relocation. */
13109struct elf_nds32_ifc_symbol_entry
13110{
13111 asection *sec;
13112 struct elf_link_hash_entry *h;
13113 struct elf_nds32_ifc_irel_list *irel_head;
13114 unsigned long insn;
13115 int times;
13116 int enable; /* Apply ifc. */
13117 int ex9_enable; /* Apply ifc after ex9. */
13118 struct elf_nds32_ifc_symbol_entry *next;
13119};
13120
13121struct elf_nds32_ifc_irel_list
13122{
13123 Elf_Internal_Rela *irel;
13124 asection *sec;
13125 bfd_vma addr;
13126 /* If this is set, then it is the last instruction for
13127 ifc-chain, so it must be keep for the actual branching. */
13128 int keep;
13129 struct elf_nds32_ifc_irel_list *next;
13130};
13131
13132static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13133
13134/* Insert symbol of jal and j for ifc. */
13135
13136static void
13137nds32_elf_ifc_insert_symbol (asection *sec,
13138 struct elf_link_hash_entry *h,
13139 Elf_Internal_Rela *irel,
13140 unsigned long insn)
13141{
13142 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13143
13144 /* Check there is target of existing entry the same as the new one. */
13145 while (ptr != NULL)
13146 {
13147 if (((h == NULL && ptr->sec == sec
13148 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13149 && ptr->irel_head->irel->r_addend == irel->r_addend)
13150 || h != NULL)
13151 && ptr->h == h
13152 && ptr->insn == insn)
13153 {
13154 /* The same target exist, so insert into list. */
13155 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13156
13157 while (irel_list->next != NULL)
13158 irel_list = irel_list->next;
13159 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13160 irel_list = irel_list->next;
13161 irel_list->irel = irel;
13162 irel_list->keep = 1;
13163
13164 if (h == NULL)
13165 irel_list->sec = NULL;
13166 else
13167 irel_list->sec = sec;
13168 irel_list->next = NULL;
13169 return;
13170 }
13171 if (ptr->next == NULL)
13172 break;
13173 ptr = ptr->next;
13174 }
13175
13176 /* There is no same target entry, so build a new one. */
13177 if (ifc_symbol_head == NULL)
13178 {
13179 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13180 ptr = ifc_symbol_head;
13181 }
13182 else
13183 {
13184 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13185 ptr = ptr->next;
13186 }
13187
13188 ptr->h = h;
13189 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13190 ptr->irel_head->irel = irel;
13191 ptr->insn = insn;
13192 ptr->irel_head->keep = 1;
13193
13194 if (h == NULL)
13195 {
13196 /* Local symbols. */
13197 ptr->sec = sec;
13198 ptr->irel_head->sec = NULL;
13199 }
13200 else
13201 {
13202 /* Global symbol. */
13203 ptr->sec = NULL;
13204 ptr->irel_head->sec = sec;
13205 }
13206
13207 ptr->irel_head->next = NULL;
13208 ptr->times = 0;
13209 ptr->enable = 0;
13210 ptr->ex9_enable = 0;
13211 ptr->next = NULL;
13212}
13213
13214/* Gather all jal and j instructions. */
13215
13216static bfd_boolean
13217nds32_elf_ifc_calc (struct bfd_link_info *info,
13218 bfd *abfd, asection *sec)
13219{
13220 Elf_Internal_Rela *internal_relocs;
13221 Elf_Internal_Rela *irelend;
13222 Elf_Internal_Rela *irel;
13223 Elf_Internal_Shdr *symtab_hdr;
13224 bfd_byte *contents = NULL;
1c8f6a4d 13225 uint32_t insn, insn_with_reg;
35c08157
KLC		 13226 unsigned long r_symndx;
13227 struct elf_link_hash_entry *h;
13228 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13229 struct elf_nds32_link_hash_table *table;
13230 bfd_boolean ifc_loop_aware;
13231
13232 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13233 TRUE /* keep_memory */);
13234 irelend = internal_relocs + sec->reloc_count;
13235 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13236
13237 /* Check if the object enable ifc. */
13238 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13239 R_NDS32_RELAX_ENTRY);
13240
13241 if (irel == NULL
13242 || irel >= irelend
13243 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13244 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13245 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13246 return TRUE;
13247
0c4bd9d9 13248 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 13249 return FALSE;
13250
13251 table = nds32_elf_hash_table (info);
13252 ifc_loop_aware = table->ifc_loop_aware;
13253 while (irel != NULL && irel < irelend)
13254 {
13255 /* Traverse all relocation and gather all of them to build the list. */
13256
13257 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13258 {
13259 if (ifc_loop_aware == 1
13260 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13261 {
13262 /* Check the region if loop or not. If it is true and
13263 ifc-loop-aware is true, ignore the region till region end. */
13264 while (irel != NULL
13265 && irel < irelend
13266 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13267 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13268 irel++;
13269 }
13270 }
13271
13272 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13273 {
13274 insn = bfd_getb32 (contents + irel->r_offset);
13275 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13276 r_symndx = ELF32_R_SYM (irel->r_info);
13277 if (r_symndx < symtab_hdr->sh_info)
13278 {
13279 /* Local symbol. */
13280 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13281 }
13282 else
13283 {
13284 /* External symbol. */
13285 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13286 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13287 }
13288 }
13289 irel++;
13290 }
13291 return TRUE;
13292}
13293
13294/* Determine whether j and jal should be substituted. */
13295
13296static void
13297nds32_elf_ifc_filter (struct bfd_link_info *info)
13298{
13299 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13300 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13301 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13302 struct elf_nds32_link_hash_table *table;
13303 int target_optimize;
13304 bfd_vma address;
13305
13306 table = nds32_elf_hash_table (info);
13307 target_optimize = table->target_optimize;
13308 while (ptr)
13309 {
13310 irel_ptr = ptr->irel_head;
13311 if (ptr->h == NULL)
13312 {
13313 /* Local symbol. */
13314 irel_keeper = irel_ptr;
13315 while (irel_ptr && irel_ptr->next)
13316 {
13317 /* Check there is jump target can be used. */
13318 if ((irel_ptr->next->irel->r_offset
13319 - irel_keeper->irel->r_offset) > 1022)
13320 irel_keeper = irel_ptr->next;
13321 else
13322 {
13323 ptr->enable = 1;
13324 irel_ptr->keep = 0;
13325 }
13326 irel_ptr = irel_ptr->next;
13327 }
13328 }
13329 else
13330 {
1c8f6a4d
KLC		 13331 /* Global symbol. */
13332 /* We have to get the absolute address and decide
13333 whether to keep it or not. */
35c08157
KLC		 13334 while (irel_ptr)
13335 {
13336 address = (irel_ptr->irel->r_offset
13337 + irel_ptr->sec->output_section->vma
13338 + irel_ptr->sec->output_offset);
13339 irel_ptr->addr = address;
13340 irel_ptr = irel_ptr->next;
13341 }
13342
13343 irel_ptr = ptr->irel_head;
13344 while (irel_ptr)
13345 {
1c8f6a4d 13346 /* Sort by address. */
35c08157
KLC		 13347 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13348 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13349 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13350 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13351
1c8f6a4d 13352 /* Get the smallest one. */
35c08157
KLC		 13353 while (irel_temp->next)
13354 {
13355 if (irel_temp->next->addr < irel_dest->addr)
13356 {
13357 irel_dest_prev = irel_temp;
13358 irel_dest = irel_temp->next;
13359 }
13360 irel_temp = irel_temp->next;
13361 }
1c8f6a4d 13362
35c08157
KLC		 13363 if (irel_dest != irel_ptr)
13364 {
13365 if (irel_ptr_prev)
13366 irel_ptr_prev->next = irel_dest;
13367 if (irel_dest_prev)
13368 irel_dest_prev->next = irel_ptr;
13369 irel_temp = irel_ptr->next;
13370 irel_ptr->next = irel_dest->next;
13371 irel_dest->next = irel_temp;
13372 }
13373 irel_ptr_prev = irel_ptr;
13374 irel_ptr = irel_ptr->next;
13375 }
13376
13377 irel_ptr = ptr->irel_head;
13378 irel_keeper = irel_ptr;
13379 while (irel_ptr && irel_ptr->next)
13380 {
13381 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13382 irel_keeper = irel_ptr->next;
13383 else
13384 {
13385 ptr->enable = 1;
13386 irel_ptr->keep = 0;
13387 }
13388 irel_ptr = irel_ptr->next;
13389 }
13390 }
13391
1c8f6a4d 13392 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC		 13393 if ((target_optimize & NDS32_RELAX_EX9_ON)
13394 && ptr->irel_head != irel_keeper)
13395 ptr->enable = 0;
13396 ptr = ptr->next;
13397 }
13398}
13399
13400/* Determine whether j and jal should be substituted after ex9 done. */
13401
13402static void
13403nds32_elf_ifc_filter_after_ex9 (void)
13404{
13405 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13406 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13407
13408 while (ptr)
13409 {
13410 if (ptr->enable == 0)
13411 {
13412 /* Check whether ifc is applied or not. */
13413 irel_ptr = ptr->irel_head;
13414 ptr->ex9_enable = 1;
13415 while (irel_ptr)
13416 {
13417 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13418 {
13419 /* Ex9 already. */
13420 ptr->ex9_enable = 0;
13421 break;
13422 }
13423 irel_ptr = irel_ptr->next;
13424 }
13425 }
13426 ptr = ptr->next;
13427 }
13428}
13429
13430/* Wrapper to do ifc relaxation. */
13431
13432bfd_boolean
13433nds32_elf_ifc_finish (struct bfd_link_info *info)
13434{
13435 int relax_status;
13436 struct elf_nds32_link_hash_table *table;
13437
13438 table = nds32_elf_hash_table (info);
13439 relax_status = table->relax_status;
13440
13441 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13442 nds32_elf_ifc_filter (info);
13443 else
13444 nds32_elf_ifc_filter_after_ex9 ();
13445
13446 if (!nds32_elf_ifc_replace (info))
13447 return FALSE;
13448
13449 if (table)
13450 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13451 return TRUE;
13452}
13453
13454/* Traverse the result of ifc filter and replace it with ifcall9. */
13455
13456static bfd_boolean
13457nds32_elf_ifc_replace (struct bfd_link_info *info)
13458{
13459 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13460 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13461 nds32_elf_blank_t *relax_blank_list = NULL;
13462 bfd_byte *contents = NULL;
13463 Elf_Internal_Rela *internal_relocs;
13464 Elf_Internal_Rela *irel;
13465 Elf_Internal_Rela *irelend;
13466 unsigned short insn16 = INSN_IFCALL9;
13467 struct elf_nds32_link_hash_table *table;
13468 int relax_status;
13469
13470 table = nds32_elf_hash_table (info);
13471 relax_status = table->relax_status;
13472
13473 while (ptr)
13474 {
13475 /* Traverse the ifc gather list, and replace the
13476 filter entries by ifcall9. */
13477 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC		 13478 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13479 && ptr->ex9_enable == 1))
35c08157
KLC		 13480 {
13481 irel_ptr = ptr->irel_head;
13482 if (ptr->h == NULL)
13483 {
13484 /* Local symbol. */
13485 internal_relocs = _bfd_elf_link_read_relocs
13486 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13487 irelend = internal_relocs + ptr->sec->reloc_count;
13488
1c8f6a4d 13489 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13490 &contents, TRUE))
35c08157
KLC		 13491 return FALSE;
13492
13493 while (irel_ptr)
13494 {
13495 if (irel_ptr->keep == 0 && irel_ptr->next)
13496 {
1c8f6a4d 13497 /* The one can be replaced. We have to check whether
35c08157
KLC		 13498 there is any alignment point in the region. */
13499 irel = irel_ptr->irel;
1c8f6a4d
KLC		 13500 while (((irel_ptr->next->keep == 0
13501 && irel < irel_ptr->next->irel)
35c08157
KLC		 13502 || (irel_ptr->next->keep == 1 && irel < irelend))
13503 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13504 && (irel->r_addend & 0x1f) == 2))
13505 irel++;
13506 if (irel >= irelend
13507 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13508 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC		 13509 && ((irel->r_offset - get_nds32_elf_blank_total
13510 (&relax_blank_list, irel->r_offset, 1))
13511 & 0x02) == 0))
35c08157
KLC		 13512 {
13513 /* Replace by ifcall9. */
13514 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13515 if (!insert_nds32_elf_blank_recalc_total
13516 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13517 return FALSE;
13518 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13519 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13520 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13521 }
13522 }
13523 irel_ptr = irel_ptr->next;
13524 }
13525
13526 /* Delete the redundant code. */
13527 if (relax_blank_list)
13528 {
13529 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13530 relax_blank_list);
13531 relax_blank_list = NULL;
13532 }
13533 }
13534 else
13535 {
13536 /* Global symbol. */
13537 while (irel_ptr)
13538 {
13539 if (irel_ptr->keep == 0 && irel_ptr->next)
13540 {
13541 /* The one can be replaced, and we have to check
13542 whether there is any alignment point in the region. */
13543 internal_relocs = _bfd_elf_link_read_relocs
13544 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13545 TRUE /* keep_memory */);
13546 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC		 13547 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13548 irel_ptr->sec, &contents,
13549 TRUE))
35c08157
KLC		 13550 return FALSE;
13551
13552 irel = irel_ptr->irel;
13553 while (((irel_ptr->sec == irel_ptr->next->sec
13554 && irel_ptr->next->keep == 0
13555 && irel < irel_ptr->next->irel)
13556 || ((irel_ptr->sec != irel_ptr->next->sec
13557 || irel_ptr->next->keep == 1)
13558 && irel < irelend))
13559 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13560 && (irel->r_addend & 0x1f) == 2))
13561 irel++;
13562 if (irel >= irelend
13563 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13564 && (irel->r_addend & 0x1f) == 2
13565 && ((irel->r_offset
13566 - get_nds32_elf_blank_total (&relax_blank_list,
13567 irel->r_offset, 1)) & 0x02) == 0))
13568 {
13569 /* Replace by ifcall9. */
13570 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13571 if (!insert_nds32_elf_blank_recalc_total
13572 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13573 return FALSE;
13574
13575 /* Delete the redundant code, and clear the relocation. */
13576 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13577 irel_ptr->sec,
13578 relax_blank_list);
13579 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13580 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13581 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13582 relax_blank_list = NULL;
13583 }
13584 }
13585
13586 irel_ptr = irel_ptr->next;
13587 }
13588 }
13589 }
13590 ptr = ptr->next;
13591 }
13592
13593 return TRUE;
13594}
13595
13596/* Relocate ifcall. */
13597
1c8f6a4d 13598static bfd_boolean
35c08157
KLC		 13599nds32_elf_ifc_reloc (void)
13600{
13601 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13602 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13603 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13604 bfd_vma relocation, address;
13605 unsigned short insn16;
35c08157 13606 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 13607 static bfd_boolean done = FALSE;
13608
13609 if (done)
13610 return TRUE;
13611
13612 done = TRUE;
35c08157
KLC		 13613
13614 while (ptr)
13615 {
1c8f6a4d 13616 /* Check the entry is enable ifcall. */
35c08157
KLC		 13617 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13618 {
1c8f6a4d 13619 /* Get the reserve jump. */
35c08157
KLC		 13620 irel_ptr = ptr->irel_head;
13621 while (irel_ptr)
13622 {
13623 if (irel_ptr->keep == 1)
13624 {
13625 irel_keeper = irel_ptr;
13626 break;
13627 }
13628 irel_ptr = irel_ptr->next;
13629 }
13630
13631 irel_ptr = ptr->irel_head;
13632 if (ptr->h == NULL)
13633 {
13634 /* Local symbol. */
0c4bd9d9
KLC		 13635 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13636 &contents, TRUE))
35c08157
KLC		 13637 return FALSE;
13638
13639 while (irel_ptr)
13640 {
13641 if (irel_ptr->keep == 0
1c8f6a4d 13642 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC		 13643 {
13644 relocation = irel_keeper->irel->r_offset;
13645 relocation = relocation - irel_ptr->irel->r_offset;
13646 while (irel_keeper && relocation > 1022)
13647 {
13648 irel_keeper = irel_keeper->next;
13649 if (irel_keeper && irel_keeper->keep == 1)
13650 {
13651 relocation = irel_keeper->irel->r_offset;
13652 relocation = relocation - irel_ptr->irel->r_offset;
13653 }
13654 }
13655 if (relocation > 1022)
13656 {
13657 /* Double check. */
13658 irel_keeper = ptr->irel_head;
13659 while (irel_keeper)
13660 {
13661 if (irel_keeper->keep == 1)
13662 {
13663 relocation = irel_keeper->irel->r_offset;
13664 relocation = relocation - irel_ptr->irel->r_offset;
13665 }
13666 if (relocation <= 1022)
13667 break;
13668 irel_keeper = irel_keeper->next;
13669 }
13670 if (!irel_keeper)
13671 return FALSE;
13672 }
1c8f6a4d
KLC		 13673 irel_ptr->irel->r_info =
13674 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13675 R_NDS32_NONE);
35c08157
KLC		 13676 insn16 = INSN_IFCALL9 | (relocation >> 1);
13677 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13678 }
13679 irel_ptr = irel_ptr->next;
13680 }
13681 }
13682 else
13683 {
13684 /* Global symbol. */
13685 while (irel_ptr)
13686 {
13687 if (irel_ptr->keep == 0
1c8f6a4d 13688 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13689 {
1c8f6a4d 13690 /* Get the distance between ifcall and jump. */
35c08157
KLC		 13691 relocation = (irel_keeper->irel->r_offset
13692 + irel_keeper->sec->output_section->vma
13693 + irel_keeper->sec->output_offset);
13694 address = (irel_ptr->irel->r_offset
13695 + irel_ptr->sec->output_section->vma
13696 + irel_ptr->sec->output_offset);
13697 relocation = relocation - address;
1c8f6a4d
KLC		 13698
13699 /* The distance is over ragne, find callee again. */
35c08157
KLC		 13700 while (irel_keeper && relocation > 1022)
13701 {
13702 irel_keeper = irel_keeper->next;
13703 if (irel_keeper && irel_keeper->keep ==1)
13704 {
13705 relocation = (irel_keeper->irel->r_offset
13706 + irel_keeper->sec->output_section->vma
13707 + irel_keeper->sec->output_offset);
13708 relocation = relocation - address;
13709 }
13710 }
13711
13712 if (relocation > 1022)
13713 {
13714 /* Double check. */
13715 irel_keeper = ptr->irel_head;
13716 while (irel_keeper)
13717 {
13718 if (irel_keeper->keep == 1)
13719 {
13720
13721 relocation = (irel_keeper->irel->r_offset
13722 + irel_keeper->sec->output_section->vma
13723 + irel_keeper->sec->output_offset);
13724 relocation = relocation - address;
13725 }
13726 if (relocation <= 1022)
13727 break;
13728 irel_keeper = irel_keeper->next;
13729 }
13730 if (!irel_keeper)
13731 return FALSE;
13732 }
13733 if (!nds32_get_section_contents
0c4bd9d9 13734 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC		 13735 return FALSE;
13736 insn16 = INSN_IFCALL9 | (relocation >> 1);
13737 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13738 irel_ptr->irel->r_info =
13739 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13740 R_NDS32_NONE);
35c08157
KLC		 13741 }
13742 irel_ptr =irel_ptr->next;
13743 }
13744 }
13745 }
13746 ptr = ptr->next;
13747 }
13748
13749 return TRUE;
13750}
13751
13752/* End of IFC relaxation. */
13753\f
13754/* EX9 Instruction Table Relaxation. */
13755
13756/* Global hash list. */
13757struct elf_link_hash_entry_list
13758{
13759 struct elf_link_hash_entry *h;
13760 struct elf_link_hash_entry_list *next;
13761};
13762
13763/* Save different destination but same insn. */
13764struct elf_link_hash_entry_mul_list
13765{
13766 /* Global symbol times. */
13767 int times;
13768 /* Save relocation for each global symbol but useful?? */
13769 Elf_Internal_Rela *irel;
13770 /* For sethi, two sethi may have the same high-part but different low-parts. */
13771 Elf_Internal_Rela rel_backup;
13772 struct elf_link_hash_entry_list *h_list;
13773 struct elf_link_hash_entry_mul_list *next;
13774};
13775
13776/* Instruction hash table. */
13777struct elf_nds32_code_hash_entry
13778{
13779 struct bfd_hash_entry root;
13780 int times;
13781 /* For insn that can use relocation or constant ex: sethi. */
13782 int const_insn;
13783 asection *sec;
13784 struct elf_link_hash_entry_mul_list *m_list;
13785 /* Using r_addend. */
13786 Elf_Internal_Rela *irel;
13787 /* Using r_info. */
13788 Elf_Internal_Rela rel_backup;
13789};
13790
13791/* Instruction count list. */
13792struct elf_nds32_insn_times_entry
13793{
13794 const char *string;
13795 int times;
13796 int order;
13797 asection *sec;
13798 struct elf_link_hash_entry_mul_list *m_list;
13799 Elf_Internal_Rela *irel;
13800 Elf_Internal_Rela rel_backup;
13801 struct elf_nds32_insn_times_entry *next;
13802};
13803
13804/* J and JAL symbol list. */
13805struct elf_nds32_symbol_entry
13806{
13807 char *string;
13808 unsigned long insn;
13809 struct elf_nds32_symbol_entry *next;
13810};
13811
13812/* Relocation list. */
13813struct elf_nds32_irel_entry
13814{
13815 Elf_Internal_Rela *irel;
13816 struct elf_nds32_irel_entry *next;
13817};
13818
13819/* ex9.it insn need to be fixed. */
13820struct elf_nds32_ex9_refix
13821{
13822 Elf_Internal_Rela *irel;
13823 asection *sec;
13824 struct elf_link_hash_entry *h;
13825 int order;
13826 struct elf_nds32_ex9_refix *next;
13827};
13828
13829static struct bfd_hash_table ex9_code_table;
13830static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13831static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13832
13833/* EX9 hash function. */
13834
13835static struct bfd_hash_entry *
13836nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13837 struct bfd_hash_table *table,
13838 const char *string)
13839{
13840 struct elf_nds32_code_hash_entry *ret;
13841
13842 /* Allocate the structure if it has not already been allocated by a
13843 subclass. */
13844 if (entry == NULL)
13845 {
13846 entry = (struct bfd_hash_entry *)
13847 bfd_hash_allocate (table, sizeof (*ret));
13848 if (entry == NULL)
13849 return entry;
13850 }
13851
13852 /* Call the allocation method of the superclass. */
13853 entry = bfd_hash_newfunc (entry, table, string);
13854 if (entry == NULL)
13855 return entry;
13856
13857 ret = (struct elf_nds32_code_hash_entry*) entry;
13858 ret->times = 0;
13859 ret->const_insn = 0;
13860 ret->m_list = NULL;
13861 ret->sec = NULL;
13862 ret->irel = NULL;
13863 return &ret->root;
13864}
13865
13866/* Insert ex9 entry
13867 this insert must be stable sorted by times. */
13868
13869static void
13870nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13871{
13872 struct elf_nds32_insn_times_entry *temp;
13873 struct elf_nds32_insn_times_entry *temp2;
13874
13875 if (ex9_insn_head == NULL)
13876 {
13877 ex9_insn_head = ptr;
13878 ptr->next = NULL;
13879 }
13880 else
13881 {
13882 temp = ex9_insn_head;
13883 temp2 = ex9_insn_head;
13884 while (temp->next &&
13885 (temp->next->times >= ptr->times
13886 || temp->times == -1))
13887 {
13888 if (temp->times == -1)
13889 temp2 = temp;
13890 temp = temp->next;
13891 }
13892 if (ptr->times > temp->times && temp->times != -1)
13893 {
13894 ptr->next = temp;
13895 if (temp2->times == -1)
13896 temp2->next = ptr;
13897 else
13898 ex9_insn_head = ptr;
13899 }
13900 else if (temp->next == NULL)
13901 {
13902 temp->next = ptr;
13903 ptr->next = NULL;
13904 }
13905 else
13906 {
13907 ptr->next = temp->next;
13908 temp->next = ptr;
13909 }
13910 }
13911}
13912
13913/* Examine each insn times in hash table.
13914 Handle multi-link hash entry.
13915
13916 TODO: This function doesn't assign so much info since it is fake. */
13917
13918static int
13919nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13920{
13921 struct elf_nds32_insn_times_entry *ptr;
13922 int times;
13923
13924 if (h->m_list == NULL)
13925 {
13926 /* Local symbol insn or insn without relocation. */
13927 if (h->times < 3)
13928 return TRUE;
13929
13930 ptr = (struct elf_nds32_insn_times_entry *)
13931 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13932 ptr->times = h->times;
13933 ptr->string = h->root.string;
13934 ptr->m_list = NULL;
13935 ptr->sec = h->sec;
13936 ptr->irel = h->irel;
13937 ptr->rel_backup = h->rel_backup;
13938 nds32_elf_ex9_insert_entry (ptr);
13939 }
13940 else
13941 {
13942 /* Global symbol insn. */
13943 /* Only sethi insn has multiple m_list. */
13944 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13945
13946 times = 0;
13947 while (m_list)
13948 {
13949 times += m_list->times;
13950 m_list = m_list->next;
13951 }
13952 if (times >= 3)
13953 {
13954 m_list = h->m_list;
13955 ptr = (struct elf_nds32_insn_times_entry *)
13956 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13957 ptr->times = times; /* Use the total times. */
13958 ptr->string = h->root.string;
13959 ptr->m_list = m_list;
13960 ptr->sec = h->sec;
13961 ptr->irel = m_list->irel;
13962 ptr->rel_backup = m_list->rel_backup;
13963 nds32_elf_ex9_insert_entry (ptr);
13964 }
13965 if (h->const_insn == 1)
13966 {
13967 /* sethi with constant value. */
13968 if (h->times < 3)
13969 return TRUE;
13970
13971 ptr = (struct elf_nds32_insn_times_entry *)
13972 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13973 ptr->times = h->times;
13974 ptr->string = h->root.string;
13975 ptr->m_list = NULL;
13976 ptr->sec = NULL;
13977 ptr->irel = NULL;
13978 ptr->rel_backup = h->rel_backup;
13979 nds32_elf_ex9_insert_entry (ptr);
13980 }
13981 }
13982 return TRUE;
13983}
13984
13985/* Count each insn times in hash table.
13986 Handle multi-link hash entry. */
13987
13988static int
13989nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13990{
13991 int reservation, times;
13992 unsigned long relocation, min_relocation;
13993 struct elf_nds32_insn_times_entry *ptr;
13994
13995 if (h->m_list == NULL)
13996 {
13997 /* Local symbol insn or insn without relocation. */
13998 if (h->times < 3)
13999 return TRUE;
14000 ptr = (struct elf_nds32_insn_times_entry *)
14001 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14002 ptr->times = h->times;
14003 ptr->string = h->root.string;
14004 ptr->m_list = NULL;
14005 ptr->sec = h->sec;
14006 ptr->irel = h->irel;
14007 ptr->rel_backup = h->rel_backup;
14008 nds32_elf_ex9_insert_entry (ptr);
14009 }
14010 else
14011 {
14012 /* Global symbol insn. */
14013 /* Only sethi insn has multiple m_list. */
14014 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14015
14016 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14017 && m_list->next != NULL)
14018 {
14019 /* Sethi insn has different symbol or addend but has same hi20. */
14020 times = 0;
14021 reservation = 1;
14022 relocation = 0;
14023 min_relocation = 0xffffffff;
14024 while (m_list)
14025 {
14026 /* Get the minimum sethi address
14027 and calculate how many entry the sethi-list have to use. */
14028 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14029 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14030 && (m_list->h_list->h->root.u.def.section != NULL
14031 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14032 {
14033 relocation = (m_list->h_list->h->root.u.def.value +
14034 m_list->h_list->h->root.u.def.section->output_section->vma +
14035 m_list->h_list->h->root.u.def.section->output_offset);
14036 relocation += m_list->irel->r_addend;
14037 }
14038 else
14039 relocation = 0;
14040 if (relocation < min_relocation)
14041 min_relocation = relocation;
14042 times += m_list->times;
14043 m_list = m_list->next;
14044 }
14045 if (min_relocation < ex9_relax_size)
14046 reservation = (min_relocation >> 12) + 1;
14047 else
14048 reservation = (min_relocation >> 12)
14049 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14050 if (reservation < (times / 3))
14051 {
14052 /* Efficient enough to use ex9. */
14053 int i;
14054
14055 for (i = reservation ; i > 0; i--)
14056 {
14057 /* Allocate number of reservation ex9 entry. */
14058 ptr = (struct elf_nds32_insn_times_entry *)
14059 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14060 ptr->times = h->m_list->times / reservation;
14061 ptr->string = h->root.string;
14062 ptr->m_list = h->m_list;
14063 ptr->sec = h->sec;
14064 ptr->irel = h->m_list->irel;
14065 ptr->rel_backup = h->m_list->rel_backup;
14066 nds32_elf_ex9_insert_entry (ptr);
14067 }
14068 }
14069 }
14070 else
14071 {
14072 /* Normal global symbol that means no different address symbol
14073 using same ex9 entry. */
14074 if (m_list->times >= 3)
14075 {
14076 ptr = (struct elf_nds32_insn_times_entry *)
14077 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14078 ptr->times = m_list->times;
14079 ptr->string = h->root.string;
14080 ptr->m_list = h->m_list;
14081 ptr->sec = h->sec;
14082 ptr->irel = h->m_list->irel;
14083 ptr->rel_backup = h->m_list->rel_backup;
14084 nds32_elf_ex9_insert_entry (ptr);
14085 }
14086 }
14087
14088 if (h->const_insn == 1)
14089 {
14090 /* sethi with constant value. */
14091 if (h->times < 3)
14092 return TRUE;
14093
14094 ptr = (struct elf_nds32_insn_times_entry *)
14095 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14096 ptr->times = h->times;
14097 ptr->string = h->root.string;
14098 ptr->m_list = NULL;
14099 ptr->sec = NULL;
14100 ptr->irel = NULL;
14101 ptr->rel_backup = h->rel_backup;
14102 nds32_elf_ex9_insert_entry (ptr);
14103 }
14104 }
14105
14106 return TRUE;
14107}
14108
14109/* Hash table traverse function. */
14110
14111static void
14112nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14113{
14114 unsigned int i;
14115
14116 ex9_code_table.frozen = 1;
14117 for (i = 0; i < ex9_code_table.size; i++)
14118 {
14119 struct bfd_hash_entry *p;
14120
14121 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14122 if (!func ((struct elf_nds32_code_hash_entry *) p))
14123 goto out;
14124 }
14125out:
14126 ex9_code_table.frozen = 0;
14127}
14128
14129
14130/* Give order number to insn list. */
14131
14132static void
14133nds32_elf_order_insn_times (struct bfd_link_info *info)
14134{
14135 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 14136 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 14137 struct elf_nds32_link_hash_table *table;
35c08157 14138 int ex9_limit;
1c8f6a4d
KLC		 14139 int number = 0;
14140
14141 if (ex9_insn_head == NULL)
14142 return;
35c08157
KLC		 14143
14144/* The max number of entries is 512. */
14145 ex9_insn = ex9_insn_head;
14146 table = nds32_elf_hash_table (info);
14147 ex9_limit = table->ex9_limit;
14148
35c08157
KLC		 14149 ex9_insn = ex9_insn_head;
14150
1c8f6a4d 14151 while (ex9_insn != NULL && number < ex9_limit)
35c08157 14152 {
1c8f6a4d 14153 ex9_insn->order = number;
35c08157 14154 number++;
1c8f6a4d 14155 temp = ex9_insn;
35c08157
KLC		 14156 ex9_insn = ex9_insn->next;
14157 }
14158
1c8f6a4d
KLC		 14159 if (ex9_insn && temp)
14160 temp->next = NULL;
35c08157
KLC		 14161
14162 while (ex9_insn != NULL)
14163 {
14164 /* Free useless entry. */
14165 temp = ex9_insn;
14166 ex9_insn = ex9_insn->next;
14167 free (temp);
14168 }
14169}
14170
14171/* Build .ex9.itable section. */
14172
14173static void
14174nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14175{
14176 asection *table_sec;
14177 struct elf_nds32_insn_times_entry *ptr;
14178 bfd *it_abfd;
14179 int number = 0;
14180 bfd_byte *contents = NULL;
14181
14182 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14183 it_abfd = it_abfd->link.next)
35c08157
KLC		 14184 {
14185 /* Find the section .ex9.itable, and put all entries into it. */
14186 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14187 if (table_sec != NULL)
14188 {
0c4bd9d9 14189 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC		 14190 return;
14191
14192 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14193 number++;
14194
14195 table_sec->size = number * 4;
14196
14197 if (number == 0)
1c8f6a4d 14198 return;
35c08157
KLC		 14199
14200 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14201 number = 0;
14202 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14203 {
14204 long val;
14205
14206 val = strtol (ptr->string, NULL, 16);
14207 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14208 number++;
14209 }
14210 break;
14211 }
14212 }
14213}
14214
14215/* Get insn with regs according to relocation type. */
14216
14217static void
14218nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14219 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC		 14220{
14221 reloc_howto_type *howto = NULL;
14222
14223 if (irel == NULL
14224 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14225 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14226 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14227 {
14228 *insn_with_reg = insn;
14229 return;
14230 }
14231
14232 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14233 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14234}
14235
14236/* Mask number of address bits according to relocation. */
14237
14238static unsigned long
14239nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14240{
14241 reloc_howto_type *howto = NULL;
14242
14243 if (irel == NULL
14244 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14245 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14246 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14247 return 0;
14248
14249 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14250 return howto->dst_mask;
14251}
14252
14253static void
14254nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14255 struct elf_nds32_irel_entry *irel_ptr)
14256{
14257 if (*irel_list == NULL)
14258 {
14259 *irel_list = irel_ptr;
14260 irel_ptr->next = NULL;
14261 }
14262 else
14263 {
14264 irel_ptr->next = *irel_list;
14265 *irel_list = irel_ptr;
14266 }
14267}
14268
14269static void
14270nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14271 struct elf_link_hash_entry *h, int order)
14272{
14273 struct elf_nds32_ex9_refix *ptr;
14274
14275 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14276 ptr->sec = sec;
14277 ptr->irel = irel;
14278 ptr->h = h;
14279 ptr->order = order;
14280 ptr->next = NULL;
14281
14282 if (ex9_refix_head == NULL)
14283 ex9_refix_head = ptr;
14284 else
14285 {
14286 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14287
14288 while (temp->next != NULL)
14289 temp = temp->next;
14290 temp->next = ptr;
14291 }
14292}
14293
14294enum
14295{
14296 DATA_EXIST = 1,
14297 CLEAN_PRE = 1 << 1,
14298 PUSH_PRE = 1 << 2
14299};
14300
14301/* Check relocation type if supporting for ex9. */
14302
14303static int
14304nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14305 Elf_Internal_Rela **irel,
14306 Elf_Internal_Rela *irelend,
14307 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14308 asection *sec,bfd_vma *off,
35c08157
KLC		 14309 bfd_byte *contents)
14310{
14311 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14312 bfd_boolean nested_ex9, nested_loop;
14313 bfd_boolean ex9_loop_aware;
14314 /* We use the highest 1 byte of result to record
14315 how many bytes location counter has to move. */
14316 int result = 0;
14317 Elf_Internal_Rela *irel_save = NULL;
14318 struct elf_nds32_link_hash_table *table;
14319
14320 table = nds32_elf_hash_table (info);
14321 ex9_loop_aware = table->ex9_loop_aware;
14322
14323 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14324 {
14325 switch (ELF32_R_TYPE ((*irel)->r_info))
14326 {
14327 case R_NDS32_RELAX_REGION_BEGIN:
14328 /* Ignore code block. */
14329 nested_ex9 = FALSE;
14330 nested_loop = FALSE;
14331 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14332 || (ex9_loop_aware
14333 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14334 {
14335 /* Check the region if loop or not. If it is true and
14336 ex9-loop-aware is true, ignore the region till region end. */
14337 /* To save the status for in .no_relax ex9 region and
14338 loop region to conform the block can do ex9 relaxation. */
14339 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14340 nested_loop = (ex9_loop_aware
14341 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14342 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14343 {
14344 (*irel)++;
14345 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14346 {
14347 /* There may be nested region. */
14348 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14349 nested_ex9 = TRUE;
14350 else if (ex9_loop_aware
14351 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14352 nested_loop = TRUE;
14353 }
14354 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14355 {
14356 /* The end of region. */
14357 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14358 nested_ex9 = FALSE;
14359 else if (ex9_loop_aware
14360 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14361 nested_loop = FALSE;
14362 }
1c8f6a4d 14363 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC		 14364 && ((*irel)->r_addend & 0x1f) == 2)
14365 {
14366 /* Alignment exist in the region. */
14367 result |= CLEAN_PRE;
14368 if (((*irel)->r_offset -
14369 get_nds32_elf_blank_total (&relax_blank_list,
14370 (*irel)->r_offset, 0)) & 0x02)
14371 result |= PUSH_PRE;
14372 }
14373 }
14374 if ((*irel) >= irelend)
14375 *off = sec->size;
14376 else
14377 *off = (*irel)->r_offset;
14378
14379 /* The final instruction in the region, regard this one as data to ignore it. */
14380 result |= DATA_EXIST;
14381 return result;
14382 }
14383 break;
14384
14385 case R_NDS32_LABEL:
1c8f6a4d 14386 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC		 14387 {
14388 /* Check this point is align and decide to do ex9 or not. */
14389 result |= CLEAN_PRE;
14390 if (((*irel)->r_offset -
14391 get_nds32_elf_blank_total (&relax_blank_list,
14392 (*irel)->r_offset, 0)) & 0x02)
14393 result |= PUSH_PRE;
14394 }
14395 break;
14396 case R_NDS32_32_RELA:
14397 /* Data. */
14398 result |= (4 << 24);
14399 result |= DATA_EXIST;
14400 break;
14401 case R_NDS32_16_RELA:
14402 /* Data. */
14403 result |= (2 << 24);
14404 result |= DATA_EXIST;
14405 break;
14406 case R_NDS32_DATA:
14407 /* Data. */
14408 /* The least code alignment is 2. If the data is only one byte,
14409 we have to shift one more byte. */
14410 if ((*irel)->r_addend == 1)
14411 result |= ((*irel)->r_addend << 25) ;
14412 else
14413 result |= ((*irel)->r_addend << 24) ;
14414
14415 result |= DATA_EXIST;
14416 break;
14417
14418 case R_NDS32_25_PCREL_RELA:
14419 case R_NDS32_SDA16S3_RELA:
14420 case R_NDS32_SDA15S3_RELA:
14421 case R_NDS32_SDA15S3:
14422 case R_NDS32_SDA17S2_RELA:
14423 case R_NDS32_SDA15S2_RELA:
14424 case R_NDS32_SDA12S2_SP_RELA:
14425 case R_NDS32_SDA12S2_DP_RELA:
14426 case R_NDS32_SDA15S2:
14427 case R_NDS32_SDA18S1_RELA:
14428 case R_NDS32_SDA15S1_RELA:
14429 case R_NDS32_SDA15S1:
14430 case R_NDS32_SDA19S0_RELA:
14431 case R_NDS32_SDA15S0_RELA:
14432 case R_NDS32_SDA15S0:
14433 case R_NDS32_HI20_RELA:
14434 case R_NDS32_LO12S0_ORI_RELA:
14435 case R_NDS32_LO12S0_RELA:
14436 case R_NDS32_LO12S1_RELA:
14437 case R_NDS32_LO12S2_RELA:
14438 /* These relocation is supported ex9 relaxation currently. */
14439 /* We have to save the relocation for using later, since we have
14440 to check there is any alignment in the same address. */
14441 irel_save = *irel;
14442 break;
14443 default:
14444 /* Not support relocations. */
14445 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC		 14446 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14447 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC		 14448 {
14449 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14450 But we have to consider if there is any side-effect. */
14451 if (!(result & DATA_EXIST))
14452 {
14453 /* We have to confirm there is no data relocation in the
14454 same address. In general case, this won't happen. */
14455 /* We have to do ex9 conservative, for those relocation not
14456 considerd we ignore instruction. */
14457 result |= DATA_EXIST;
14458 if (*(contents + *off) & 0x80)
14459 result |= (2 << 24);
14460 else
14461 result |= (4 << 24);
14462 break;
14463 }
14464 }
14465 }
14466 if ((*irel) < irelend
14467 && ((*irel) + 1) < irelend
14468 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14469 /* There are relocations pointing to the same address, we have to
14470 check all of them. */
14471 (*irel)++;
14472 else
14473 {
14474 if (irel_save)
14475 *irel = irel_save;
14476 return result;
14477 }
14478 }
14479 return result;
14480}
14481
1c8f6a4d
KLC		 14482/* Replace with ex9 instruction. */
14483
14484static bfd_boolean
14485nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14486 nds32_elf_blank_t **relax_blank_list,
14487 struct elf_nds32_irel_entry *pre_irel_ptr,
14488 struct elf_nds32_irel_entry **irel_list)
14489{
14490 if (insn16 != 0)
14491 {
14492 /* Implement the ex9 relaxation. */
14493 bfd_putb16 (insn16, contents + pre_off);
14494 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14495 pre_off + 2, 2))
14496 return FALSE;
14497 if (pre_irel_ptr != NULL)
14498 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14499 }
14500 return TRUE;
14501}
14502
35c08157
KLC		 14503/* Replace input file instruction which is in ex9 itable. */
14504
14505static bfd_boolean
14506nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14507{
14508 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14509 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 14510 bfd_vma off;
14511 uint16_t insn16, insn_ex9;
35c08157 14512 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC		 14513 bfd_vma pre_off = -1;
14514 uint16_t pre_insn16 = 0;
35c08157
KLC		 14515 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14516 Elf_Internal_Rela *internal_relocs;
14517 Elf_Internal_Rela *irel;
14518 Elf_Internal_Rela *irelend;
14519 Elf_Internal_Shdr *symtab_hdr;
14520 Elf_Internal_Sym *isym = NULL;
14521 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC		 14522 uint32_t insn = 0;
14523 uint32_t insn_with_reg = 0;
14524 uint32_t it_insn;
14525 uint32_t it_insn_with_reg;
35c08157
KLC		 14526 unsigned long r_symndx;
14527 asection *isec;
14528 struct elf_nds32_irel_entry *irel_list = NULL;
14529 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14530 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC		 14531 struct elf_link_hash_entry_list *h_list;
14532
35c08157
KLC		 14533
14534 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14535 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 14536 || !nds32_get_local_syms (abfd, sec, &isym))
14537 return FALSE;
1c8f6a4d
KLC		 14538 internal_relocs =
14539 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC		 14540 irelend = internal_relocs + sec->reloc_count;
14541 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14542
14543 off = 0;
14544
14545 /* Check if the object enable ex9. */
1c8f6a4d
KLC		 14546 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14547 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 14548
14549 /* Check this section trigger ex9 relaxation. */
14550 if (irel == NULL
14551 || irel >= irelend
14552 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14553 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14554 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14555 return TRUE;
14556
14557 irel = internal_relocs;
14558
14559 /* Check alignment and fetch proper relocation. */
14560 while (off < sec->size)
14561 {
14562 struct elf_link_hash_entry *h = NULL;
14563 struct elf_nds32_irel_entry *irel_ptr = NULL;
14564
14565 /* Syn the instruction and the relocation. */
14566 while (irel != NULL && irel < irelend && irel->r_offset < off)
14567 irel++;
14568
14569 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14570 relax_blank_list, sec,
14571 &off, contents);
14572 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC		 14573 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14574 &relax_blank_list, pre_irel_ptr,
14575 &irel_list))
14576 return FALSE;
35c08157
KLC		 14577
14578 if (data_flag & CLEAN_PRE)
14579 {
14580 pre_off = 0;
14581 pre_insn16 = 0;
14582 pre_irel_ptr = NULL;
14583 }
14584 if (data_flag & DATA_EXIST)
14585 {
14586 /* We save the move offset in the highest byte. */
14587 off += (data_flag >> 24);
14588 continue;
14589 }
14590
14591 if (*(contents + off) & 0x80)
14592 {
14593 /* 2-byte instruction. */
14594 off += 2;
14595 continue;
14596 }
14597
14598 /* Load the instruction and its opcode with register for comparing. */
14599 ex9_insn = ex9_insn_head;
14600 insn = bfd_getb32 (contents + off);
14601 insn_with_reg = 0;
14602 while (ex9_insn)
14603 {
14604 it_insn = strtol (ex9_insn->string, NULL, 16);
14605 it_insn_with_reg = 0;
14606 do_replace = 0;
14607 save_irel = 0;
14608
14609 if (irel != NULL && irel < irelend && irel->r_offset == off)
14610 {
14611 /* Insn with relocation. */
14612 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14613
14614 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC		 14615 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14616 &it_insn_with_reg);
35c08157
KLC		 14617
14618 if (ex9_insn->irel != NULL
1c8f6a4d
KLC		 14619 && (ELF32_R_TYPE (irel->r_info) ==
14620 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC		 14621 && (insn_with_reg == it_insn_with_reg))
14622 {
14623 /* Insn relocation and format is the same as table entry. */
14624
14625 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14626 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14627 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14628 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14629 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14630 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14631 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14632 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14633 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14634 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14635 && ELF32_R_TYPE (irel->r_info) <=
14636 R_NDS32_SDA12S2_SP_RELA)
14637 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14638 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14639 {
14640 r_symndx = ELF32_R_SYM (irel->r_info);
14641 if (r_symndx < symtab_hdr->sh_info)
14642 {
14643 /* Local symbol. */
14644 int shndx = isym[r_symndx].st_shndx;
14645
14646 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14647 if (ex9_insn->sec == isec
14648 && ex9_insn->irel->r_addend == irel->r_addend
14649 && ex9_insn->irel->r_info == irel->r_info)
14650 {
14651 do_replace = 1;
14652 save_irel = 1;
14653 }
14654 }
14655 else
14656 {
14657 /* External symbol. */
14658 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14659 if (ex9_insn->m_list)
14660 {
35c08157
KLC		 14661 h_list = ex9_insn->m_list->h_list;
14662 while (h_list)
14663 {
14664 if (h == h_list->h
1c8f6a4d
KLC		 14665 && (ex9_insn->m_list->irel->r_addend ==
14666 irel->r_addend))
35c08157
KLC		 14667 {
14668 do_replace = 1;
14669 save_irel = 1;
14670 break;
14671 }
14672 h_list = h_list->next;
14673 }
14674 }
14675 }
14676 }
14677 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14678 {
14679 r_symndx = ELF32_R_SYM (irel->r_info);
14680 if (r_symndx < symtab_hdr->sh_info)
14681 {
14682 /* Local symbols. Compare its base symbol and offset. */
14683 int shndx = isym[r_symndx].st_shndx;
14684
14685 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14686 if (ex9_insn->sec == isec
14687 && ex9_insn->irel->r_addend == irel->r_addend
14688 && ex9_insn->irel->r_info == irel->r_info)
14689 {
14690 do_replace = 1;
14691 save_irel = 1;
14692 }
14693 }
14694 else
14695 {
14696 /* External symbol. */
14697 struct elf_link_hash_entry_mul_list *m_list;
14698
14699 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14700 m_list = ex9_insn->m_list;
14701
14702 while (m_list)
14703 {
1c8f6a4d 14704 h_list = m_list->h_list;
35c08157
KLC		 14705
14706 while (h_list)
14707 {
14708 if (h == h_list->h
1c8f6a4d
KLC		 14709 && (m_list->irel->r_addend
14710 == irel->r_addend))
35c08157
KLC		 14711 {
14712 do_replace = 1;
14713 save_irel = 1;
14714 if (ex9_insn->next
14715 && ex9_insn->m_list
14716 && ex9_insn->m_list == ex9_insn->next->m_list)
14717 {
14718 /* sethi multiple entry must be fixed */
14719 nds32_elf_ex9_insert_fix (sec, irel,
14720 h, ex9_insn->order);
14721 }
14722 break;
14723 }
14724 h_list = h_list->next;
14725 }
14726 m_list = m_list->next;
14727 }
14728 }
14729 }
14730 }
14731
14732 /* Import table: Check the symbol hash table and the
14733 jump target. Only R_NDS32_25_PCREL_RELA now. */
14734 else if (ex9_insn->times == -1
14735 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14736 {
14737 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14738 if (insn_with_reg == it_insn_with_reg)
14739 {
14740 char code[10];
14741 bfd_vma relocation;
14742
14743 r_symndx = ELF32_R_SYM (irel->r_info);
14744 if (r_symndx >= symtab_hdr->sh_info)
14745 {
14746 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14747 if ((h->root.type == bfd_link_hash_defined
14748 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC		 14749 && h->root.u.def.section != NULL
14750 && h->root.u.def.section->output_section != NULL
35c08157 14751 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14752 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC		 14753 && h->root.u.def.value > sec->size)
14754 {
1c8f6a4d
KLC		 14755 relocation = h->root.u.def.value +
14756 h->root.u.def.section->output_section->vma +
14757 h->root.u.def.section->output_offset;
35c08157 14758 relocation += irel->r_addend;
1c8f6a4d
KLC		 14759 insn = insn_with_reg
14760 | ((relocation >> 1) & 0xffffff);
14761 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 14762 if (strcmp (code, ex9_insn->string) == 0)
14763 {
14764 do_replace = 1;
14765 save_irel = 1;
14766 }
14767 }
14768 }
14769 }
14770 }
14771 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 14772 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14773 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 14774 {
14775 /* These relocations do not have to relocate contens, so it can
14776 be regard as instruction without relocation. */
14777 if (insn == it_insn && ex9_insn->irel == NULL)
14778 do_replace = 1;
14779 }
14780 }
14781 else
14782 {
14783 /* Instruction without relocation, we only
14784 have to compare their byte code. */
14785 if (insn == it_insn && ex9_insn->irel == NULL)
14786 do_replace = 1;
14787 }
14788
14789 /* Insntruction match so replacing the code here. */
14790 if (do_replace == 1)
14791 {
14792 /* There are two formats of ex9 instruction. */
14793 if (ex9_insn->order < 32)
14794 insn_ex9 = INSN_EX9_IT_2;
14795 else
14796 insn_ex9 = INSN_EX9_IT_1;
14797 insn16 = insn_ex9 | ex9_insn->order;
14798
1c8f6a4d
KLC		 14799 /* Insert ex9 instruction. */
14800 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14801 &relax_blank_list, pre_irel_ptr,
14802 &irel_list);
35c08157
KLC		 14803 pre_off = off;
14804 pre_insn16 = insn16;
14805
14806 if (save_irel)
14807 {
14808 /* For instuction with relocation do relax. */
14809 irel_ptr = (struct elf_nds32_irel_entry *)
14810 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14811 irel_ptr->irel = irel;
14812 irel_ptr->next = NULL;
14813 pre_irel_ptr = irel_ptr;
14814 }
14815 else
14816 pre_irel_ptr = NULL;
14817 break;
14818 }
14819 ex9_insn = ex9_insn->next;
14820 }
14821 off += 4;
14822 }
14823
1c8f6a4d
KLC		 14824 /* Insert ex9 instruction. */
14825 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14826 &relax_blank_list, pre_irel_ptr,
14827 &irel_list);
35c08157
KLC		 14828
14829 /* Delete the redundant code. */
14830 if (relax_blank_list)
14831 {
14832 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14833 relax_blank_list = NULL;
14834 }
14835
14836 /* Clear the relocation that is replaced by ex9. */
14837 while (irel_list)
14838 {
14839 struct elf_nds32_irel_entry *irel_ptr;
14840
14841 irel_ptr = irel_list;
14842 irel_list = irel_ptr->next;
14843 irel_ptr->irel->r_info =
14844 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14845 free (irel_ptr);
14846 }
14847 return TRUE;
14848}
14849
14850/* Initialize ex9 hash table. */
14851
14852int
14853nds32_elf_ex9_init (void)
14854{
14855 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14856 sizeof (struct elf_nds32_code_hash_entry),
14857 1023))
14858 {
4eca0228 14859 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
35c08157
KLC		 14860 return FALSE;
14861 }
14862 return TRUE;
14863}
14864
14865/* Predict how many bytes will be relaxed with ex9 and ifc. */
14866
14867static void
14868nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14869{
14870 struct elf_nds32_insn_times_entry *ex9_insn;
14871 struct elf_nds32_insn_times_entry *temp;
14872 int target_optimize;
14873 struct elf_nds32_link_hash_table *table;
14874
14875 if (ex9_insn_head == NULL)
14876 return;
14877
14878 table = nds32_elf_hash_table (info);
14879 target_optimize = table->target_optimize;
14880 ex9_insn = ex9_insn_head;
14881 while (ex9_insn)
14882 {
14883 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14884 temp = ex9_insn;
14885 ex9_insn = ex9_insn->next;
14886 free (temp);
14887 }
14888 ex9_insn_head = NULL;
14889
14890 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14891 {
14892 /* Examine ifc reduce size. */
14893 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14894 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14895 int size = 0;
14896
14897 while (ifc_ent)
14898 {
14899 if (ifc_ent->enable == 0)
14900 {
14901 /* Not ifc yet. */
14902 irel_ptr = ifc_ent->irel_head;
14903 while (irel_ptr)
14904 {
14905 size += 2;
14906 irel_ptr = irel_ptr->next;
14907 }
14908 }
14909 size -= 2;
14910 ifc_ent = ifc_ent->next;
14911 }
14912 ex9_relax_size += size;
14913 }
14914}
14915
14916/* Finish ex9 table. */
14917
14918void
14919nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14920{
35c08157
KLC		 14921 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14922 nds32_elf_order_insn_times (link_info);
14923 nds32_elf_ex9_total_relax (link_info);
14924 /* Traverse the hash table and count its times. */
14925 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14926 nds32_elf_order_insn_times (link_info);
14927 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC		 14928}
14929
14930/* Relocate the entries in ex9 table. */
14931
14932static bfd_vma
14933nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14934 struct bfd_link_info *link_info)
14935{
14936 Elf_Internal_Sym *isym = NULL;
14937 bfd_vma relocation = -1;
1c8f6a4d 14938 struct elf_link_hash_entry *h;
35c08157
KLC		 14939
14940 if (ptr->m_list != NULL)
14941 {
14942 /* Global symbol. */
1c8f6a4d
KLC		 14943 h = ptr->m_list->h_list->h;
14944 if ((h->root.type == bfd_link_hash_defined
14945 || h->root.type == bfd_link_hash_defweak)
14946 && h->root.u.def.section != NULL
14947 && h->root.u.def.section->output_section != NULL)
35c08157
KLC		 14948 {
14949
1c8f6a4d
KLC		 14950 relocation = h->root.u.def.value +
14951 h->root.u.def.section->output_section->vma +
14952 h->root.u.def.section->output_offset;
35c08157
KLC		 14953 relocation += ptr->m_list->irel->r_addend;
14954 }
14955 else
14956 relocation = 0;
14957 }
14958 else if (ptr->sec !=NULL)
14959 {
14960 /* Local symbol. */
14961 Elf_Internal_Sym sym;
14962 asection *sec = NULL;
14963 asection isec;
14964 asection *isec_ptr = &isec;
14965 Elf_Internal_Rela irel_backup = *(ptr->irel);
14966 asection *sec_backup = ptr->sec;
14967 bfd *abfd = ptr->sec->owner;
14968
14969 if (!nds32_get_local_syms (abfd, sec, &isym))
14970 return FALSE;
14971 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14972
14973 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14974 if (sec != NULL)
14975 *isec_ptr = *sec;
14976 sym = *isym;
14977
14978 /* The purpose is same as elf_link_input_bfd. */
14979 if (isec_ptr != NULL
14980 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14981 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14982 {
14983 sym.st_value =
14984 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14985 elf_section_data (isec_ptr)->sec_info,
14986 isym->st_value);
14987 }
14988 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14989 &ptr->sec, ptr->irel);
14990 if (ptr->irel != NULL)
14991 relocation += ptr->irel->r_addend;
14992
14993 /* Restore origin value since there may be some insntructions that
14994 could not be replaced with ex9.it. */
14995 *(ptr->irel) = irel_backup;
14996 ptr->sec = sec_backup;
14997 }
14998
14999 return relocation;
15000}
15001
15002/* Import ex9 table and build list. */
15003
15004void
15005nds32_elf_ex9_import_table (struct bfd_link_info *info)
15006{
1c8f6a4d 15007 int num = 0;
35c08157
KLC		 15008 bfd_byte *contents;
15009 unsigned long insn;
15010 FILE *ex9_import_file;
15011 int update_ex9_table;
15012 struct elf_nds32_link_hash_table *table;
15013
15014 table = nds32_elf_hash_table (info);
15015 ex9_import_file = table->ex9_import_file;
1c8f6a4d 15016 rewind (table->ex9_import_file);
35c08157
KLC		 15017
15018 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15019
35c08157 15020 /* Read instructions from the input file and build the list. */
1c8f6a4d 15021 while (!feof (ex9_import_file))
35c08157
KLC		 15022 {
15023 char *code;
15024 struct elf_nds32_insn_times_entry *ptr;
15025 size_t nread;
15026
15027 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC		 15028 /* Ignore the final byte 0x0a. */
15029 if (nread < 1)
15030 break;
35c08157
KLC		 15031 insn = bfd_getb32 (contents);
15032 code = bfd_malloc (sizeof (char) * 9);
15033 snprintf (code, 9, "%08lx", insn);
15034 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15035 ptr->string = code;
15036 ptr->order = num;
15037 ptr->times = -1;
15038 ptr->sec = NULL;
15039 ptr->m_list = NULL;
15040 ptr->rel_backup.r_offset = 0;
15041 ptr->rel_backup.r_info = 0;
15042 ptr->rel_backup.r_addend = 0;
15043 ptr->irel = NULL;
15044 ptr->next = NULL;
15045 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC		 15046 num++;
15047 }
15048
15049 update_ex9_table = table->update_ex9_table;
15050 if (update_ex9_table == 1)
15051 {
15052 /* It has to consider of sethi need to use multiple page
15053 but it not be done yet. */
15054 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15055 nds32_elf_order_insn_times (info);
15056 }
15057}
15058
15059/* Export ex9 table. */
15060
15061static void
15062nds32_elf_ex9_export (struct bfd_link_info *info,
15063 bfd_byte *contents, int size)
15064{
15065 FILE *ex9_export_file;
15066 struct elf_nds32_link_hash_table *table;
15067
15068 table = nds32_elf_hash_table (info);
15069 ex9_export_file = table->ex9_export_file;
15070 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15071 fclose (ex9_export_file);
15072}
15073
15074/* Adjust relocations of J and JAL in ex9.itable.
15075 Export ex9 table. */
15076
1c8f6a4d 15077static void
35c08157
KLC		 15078nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15079{
15080 asection *table_sec = NULL;
15081 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15082 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15083 bfd *it_abfd;
1c8f6a4d 15084 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC		 15085 bfd_byte *contents = NULL, *source_contents = NULL;
15086 int size = 0;
15087 bfd_vma gp;
15088 int shift, update_ex9_table, offset = 0;
15089 reloc_howto_type *howto = NULL;
15090 Elf_Internal_Rela rel_backup;
15091 unsigned short insn_ex9;
15092 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC		 15093 FILE *ex9_export_file;
15094 static bfd_boolean done = FALSE;
15095
15096 if (done)
15097 return;
15098
15099 done = TRUE;
35c08157
KLC		 15100
15101 table = nds32_elf_hash_table (link_info);
15102 if (table)
15103 table->relax_status |= NDS32_RELAX_EX9_DONE;
15104
15105
15106 update_ex9_table = table->update_ex9_table;
15107 /* Generated ex9.itable exactly. */
15108 if (update_ex9_table == 0)
15109 {
15110 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 15111 it_abfd = it_abfd->link.next)
35c08157
KLC		 15112 {
15113 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15114 if (table_sec != NULL)
15115 break;
15116 }
15117
15118 if (table_sec != NULL)
15119 {
15120 bfd *output_bfd;
35c08157
KLC		 15121
15122 output_bfd = table_sec->output_section->owner;
15123 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15124 if (table_sec->size == 0)
15125 return;
15126
0c4bd9d9 15127 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 15128 return;
35c08157
KLC		 15129 }
15130 }
15131 else
15132 {
15133 /* Set gp. */
15134 bfd *output_bfd;
15135
15136 output_bfd = link_info->input_bfds->sections->output_section->owner;
15137 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15138 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15139 }
15140
15141 /* Relocate instruction. */
15142 while (ex9_insn)
15143 {
15144 bfd_vma relocation, min_relocation = 0xffffffff;
15145
15146 insn = strtol (ex9_insn->string, NULL, 16);
15147 insn_with_reg = 0;
15148 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15149 {
15150 if (ex9_insn->m_list)
15151 rel_backup = ex9_insn->m_list->rel_backup;
15152 else
15153 rel_backup = ex9_insn->rel_backup;
15154
15155 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15156 howto =
15157 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15158 (rel_backup.r_info));
15159 shift = howto->rightshift;
15160 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15161 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15162 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15163 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15164 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15165 {
15166 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15167 insn =
15168 insn_with_reg | ((relocation >> shift) &
15169 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15170 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15171 }
15172 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15173 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15174 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15175 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15176 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15177 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15178 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15179 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15180 {
15181 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15182 insn =
15183 insn_with_reg | (((relocation - gp) >> shift) &
15184 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15185 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15186 }
15187 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15188 {
15189 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC		 15190 if (ex9_insn->next && ex9_insn->m_list
15191 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15192 {
15193 struct elf_link_hash_entry_mul_list *m_list;
15194 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15195 struct elf_link_hash_entry *h;
35c08157
KLC		 15196
15197 temp_ptr = ex9_insn;
15198 temp_ptr2 = ex9_insn;
15199 m_list = ex9_insn->m_list;
15200 while (m_list)
15201 {
1c8f6a4d
KLC		 15202 h = m_list->h_list->h;
15203 relocation = h->root.u.def.value +
15204 h->root.u.def.section->output_section->vma +
15205 h->root.u.def.section->output_offset;
35c08157
KLC		 15206 relocation += m_list->irel->r_addend;
15207
15208 if (relocation < min_relocation)
15209 min_relocation = relocation;
15210 m_list = m_list->next;
15211 }
15212 relocation = min_relocation;
15213
15214 /* Put insntruction into ex9 table. */
15215 insn = insn_with_reg
15216 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15217 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15218 relocation = relocation + 0x1000; /* hi20 */
15219
1c8f6a4d
KLC		 15220 while (ex9_insn->next && ex9_insn->m_list
15221 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15222 {
15223 /* Multiple sethi. */
15224 ex9_insn = ex9_insn->next;
15225 size += 4;
35c08157
KLC		 15226 insn =
15227 insn_with_reg | ((relocation >> shift) &
15228 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15229 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15230 relocation = relocation + 0x1000; /* hi20 */
15231 }
15232
15233 fix_ptr = ex9_refix_head;
15234 while (fix_ptr)
15235 {
15236 /* Fix ex9 insn. */
15237 /* temp_ptr2 points to the head of multiple sethi. */
15238 temp_ptr = temp_ptr2;
15239 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15240 {
15241 fix_ptr = fix_ptr->next;
15242 }
15243 if (fix_ptr->order != temp_ptr->order)
15244 break;
15245
15246 /* Set source insn. */
1c8f6a4d
KLC		 15247 relocation =
15248 fix_ptr->h->root.u.def.value +
15249 fix_ptr->h->root.u.def.section->output_section->vma +
15250 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC		 15251 relocation += fix_ptr->irel->r_addend;
15252 /* sethi imm is imm20s. */
15253 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15254
15255 while (temp_ptr)
15256 {
35c08157
KLC		 15257 /* Match entry and source code. */
15258 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15259 if (insn == source_insn)
15260 {
15261 /* Fix the ex9 insn. */
15262 if (temp_ptr->order != fix_ptr->order)
15263 {
15264 if (!nds32_get_section_contents
15265 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15266 &source_contents, TRUE))
4eca0228 15267 _bfd_error_handler
35c08157
KLC		 15268 (_("Linker: error cannot fixed ex9 relocation \n"));
15269 if (temp_ptr->order < 32)
15270 insn_ex9 = INSN_EX9_IT_2;
15271 else
15272 insn_ex9 = INSN_EX9_IT_1;
15273 insn_ex9 = insn_ex9 | temp_ptr->order;
15274 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15275 }
15276 break;
15277 }
15278 else
15279 {
15280 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
4eca0228 15281 _bfd_error_handler
35c08157
KLC		 15282 (_("Linker: error cannot fixed ex9 relocation \n"));
15283 else
15284 temp_ptr = temp_ptr->next;
15285 }
15286 }
15287 fix_ptr = fix_ptr->next;
15288 }
15289 }
15290 else
15291 {
15292 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15293 insn = insn_with_reg
15294 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15295 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15296 }
15297 }
15298 }
15299 else
15300 {
15301 /* Insn without relocation does not have to be fixed
15302 if need to update export table. */
15303 if (update_ex9_table == 1)
15304 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15305 }
15306 ex9_insn = ex9_insn->next;
15307 size += 4;
15308 }
15309
15310 ex9_export_file = table->ex9_export_file;
15311 if (ex9_export_file != NULL)
1c8f6a4d 15312 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC		 15313 else if (update_ex9_table == 1)
15314 {
1c8f6a4d
KLC		 15315 table->ex9_export_file = table->ex9_import_file;
15316 rewind (table->ex9_export_file);
15317 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC		 15318 }
15319}
15320
15321/* Generate ex9 hash table. */
15322
15323static bfd_boolean
f4cb41f4 15324nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC		 15325 struct bfd_link_info *link_info)
15326{
15327 Elf_Internal_Rela *internal_relocs;
15328 Elf_Internal_Rela *irelend;
15329 Elf_Internal_Rela *irel;
15330 Elf_Internal_Rela *jrel;
15331 Elf_Internal_Rela rel_backup;
15332 Elf_Internal_Shdr *symtab_hdr;
15333 Elf_Internal_Sym *isym = NULL;
15334 asection *isec;
15335 struct elf_link_hash_entry **sym_hashes;
15336 bfd_byte *contents = NULL;
f4cb41f4 15337 bfd_vma off = 0;
35c08157 15338 unsigned long r_symndx;
1c8f6a4d 15339 uint32_t insn, insn_with_reg;
35c08157
KLC		 15340 struct elf_link_hash_entry *h;
15341 int data_flag, shift, align;
15342 bfd_vma relocation;
15343 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15344 reloc_howto_type *howto = NULL;
15345
15346 sym_hashes = elf_sym_hashes (abfd);
15347 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15348 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 15349 return FALSE;
15350
15351 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15352 TRUE /* keep_memory */);
15353 irelend = internal_relocs + sec->reloc_count;
15354 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15355 if (!nds32_get_local_syms (abfd, sec, &isym))
15356 return FALSE;
15357
15358 /* Check the object if enable ex9. */
15359 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15360 R_NDS32_RELAX_ENTRY);
15361
15362 /* Check this section trigger ex9 relaxation. */
15363 if (irel == NULL
15364 || irel >= irelend
15365 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15366 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15367 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15368 return TRUE;
15369
15370 irel = internal_relocs;
15371
15372 /* Push each insn into hash table. */
15373 while (off < sec->size)
15374 {
15375 char code[10];
15376 struct elf_nds32_code_hash_entry *entry;
15377
15378 while (irel != NULL && irel < irelend && irel->r_offset < off)
15379 irel++;
15380
1c8f6a4d
KLC		 15381 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15382 NULL, sec, &off, contents);
35c08157
KLC		 15383 if (data_flag & DATA_EXIST)
15384 {
15385 /* We save the move offset in the highest byte. */
15386 off += (data_flag >> 24);
15387 continue;
15388 }
15389
15390 if (*(contents + off) & 0x80)
15391 {
15392 off += 2;
15393 }
15394 else
15395 {
15396 h = NULL;
15397 isec = NULL;
15398 jrel = NULL;
15399 rel_backup.r_info = 0;
15400 rel_backup.r_offset = 0;
15401 rel_backup.r_addend = 0;
15402 /* Load the instruction and its opcode with register for comparing. */
15403 insn = bfd_getb32 (contents + off);
15404 insn_with_reg = 0;
15405 if (irel != NULL && irel < irelend && irel->r_offset == off)
15406 {
15407 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15408 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15409 shift = howto->rightshift;
15410 align = (1 << shift) - 1;
15411 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15412 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15413 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15414 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15415 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15416 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15417 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15418 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15419 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15420 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15421 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15422 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15423 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15424 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15425 {
15426 r_symndx = ELF32_R_SYM (irel->r_info);
15427 jrel = irel;
15428 rel_backup = *irel;
15429 if (r_symndx < symtab_hdr->sh_info)
15430 {
15431 /* Local symbol. */
15432 int shndx = isym[r_symndx].st_shndx;
15433
15434 bfd_vma st_value = (isym + r_symndx)->st_value;
15435 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15436 relocation = (isec->output_section->vma + isec->output_offset
15437 + st_value + irel->r_addend);
15438 }
15439 else
15440 {
15441 /* External symbol. */
15442 bfd_boolean warned ATTRIBUTE_UNUSED;
15443 bfd_boolean ignored ATTRIBUTE_UNUSED;
15444 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15445 asection *sym_sec;
15446
15447 /* Maybe there is a better way to get h and relocation */
15448 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15449 r_symndx, symtab_hdr, sym_hashes,
15450 h, sym_sec, relocation,
15451 unresolved_reloc, warned, ignored);
15452 relocation += irel->r_addend;
1c8f6a4d
KLC		 15453 if ((h->root.type != bfd_link_hash_defined
15454 && h->root.type != bfd_link_hash_defweak)
15455 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC		 15456 {
15457 off += 4;
15458 continue;
15459 }
15460 }
15461
15462 /* Check for gp relative instruction alignment. */
15463 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15464 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15465 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15466 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15467 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15468 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15469 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15470 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15471 {
15472 bfd_vma gp;
15473 bfd *output_bfd = sec->output_section->owner;
15474 bfd_reloc_status_type r;
15475
15476 /* If the symbol is in the abs section, the out_bfd will be null.
15477 This happens when the relocation has a symbol@GOTOFF. */
15478 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15479 if (r != bfd_reloc_ok)
15480 {
15481 off += 4;
15482 continue;
15483 }
15484
15485 relocation -= gp;
15486
15487 /* Make sure alignment is correct. */
15488 if (relocation & align)
15489 {
15490 /* Incorrect alignment. */
4eca0228 15491 _bfd_error_handler
695344c0 15492 /* xgettext:c-format */
35c08157
KLC		 15493 (_("%s: warning: unaligned small data access. "
15494 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15495 bfd_get_filename (abfd), irel->r_offset,
15496 irel->r_info, irel->r_addend, relocation, align);
15497 off += 4;
15498 continue;
15499 }
15500 }
15501
15502 insn = insn_with_reg
15503 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15504 }
15505 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 15506 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15507 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 15508 {
15509 /* These relocations do not have to relocate contens, so it can
15510 be regard as instruction without relocation. */
15511 }
15512 else
15513 {
15514 off += 4;
15515 continue;
15516 }
15517 }
15518
1c8f6a4d 15519 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 15520 /* Copy "code". */
15521 entry = (struct elf_nds32_code_hash_entry*)
15522 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15523 if (entry == NULL)
15524 {
4eca0228 15525 _bfd_error_handler
35c08157
KLC		 15526 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15527 return FALSE;
15528 }
15529 if (h)
15530 {
15531 if (h->root.type == bfd_link_hash_undefined)
15532 return TRUE;
15533 /* Global symbol. */
15534 /* In order to do sethi with different symbol but same value. */
15535 if (entry->m_list == NULL)
15536 {
15537 struct elf_link_hash_entry_mul_list *m_list_new;
15538 struct elf_link_hash_entry_list *h_list_new;
15539
15540 m_list_new = (struct elf_link_hash_entry_mul_list *)
15541 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15542 h_list_new = (struct elf_link_hash_entry_list *)
15543 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15544 entry->m_list = m_list_new;
15545 m_list_new->h_list = h_list_new;
15546 m_list_new->rel_backup = rel_backup;
15547 m_list_new->times = 1;
15548 m_list_new->irel = jrel;
15549 m_list_new->next = NULL;
15550 h_list_new->h = h;
15551 h_list_new->next = NULL;
15552 }
15553 else
15554 {
15555 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15556 struct elf_link_hash_entry_list *h_list;
15557
15558 while (m_list)
15559 {
15560 /* Build the different symbols that point to the same address. */
15561 h_list = m_list->h_list;
15562 if (h_list->h->root.u.def.value == h->root.u.def.value
15563 && h_list->h->root.u.def.section->output_section->vma
15564 == h->root.u.def.section->output_section->vma
15565 && h_list->h->root.u.def.section->output_offset
15566 == h->root.u.def.section->output_offset
15567 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15568 {
15569 m_list->times++;
15570 m_list->irel = jrel;
15571 while (h_list->h != h && h_list->next)
15572 h_list = h_list->next;
15573 if (h_list->h != h)
15574 {
15575 struct elf_link_hash_entry_list *h_list_new;
15576
15577 h_list_new = (struct elf_link_hash_entry_list *)
15578 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15579 h_list->next = h_list_new;
15580 h_list_new->h = h;
15581 h_list_new->next = NULL;
15582 }
15583 break;
15584 }
15585 /* The sethi case may have different address but the
15586 hi20 is the same. */
15587 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15588 && m_list->next == NULL)
15589 {
15590 struct elf_link_hash_entry_mul_list *m_list_new;
15591 struct elf_link_hash_entry_list *h_list_new;
15592
15593 m_list_new = (struct elf_link_hash_entry_mul_list *)
15594 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15595 h_list_new = (struct elf_link_hash_entry_list *)
15596 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15597 m_list->next = m_list_new;
15598 m_list_new->h_list = h_list_new;
15599 m_list_new->rel_backup = rel_backup;
15600 m_list_new->times = 1;
15601 m_list_new->irel = jrel;
15602 m_list_new->next = NULL;
15603 h_list_new->h = h;
15604 h_list_new->next = NULL;
15605 break;
15606 }
15607 m_list = m_list->next;
15608 }
15609 if (!m_list)
15610 {
15611 off += 4;
15612 continue;
15613 }
15614 }
15615 }
15616 else
15617 {
15618 /* Local symbol and insn without relocation*/
15619 entry->times++;
15620 entry->rel_backup = rel_backup;
15621 }
15622
15623 /* Use in sethi insn with constant and global symbol in same format. */
15624 if (!jrel)
15625 entry->const_insn = 1;
15626 else
15627 entry->irel = jrel;
15628 entry->sec = isec;
15629 off += 4;
15630 }
15631 }
15632 return TRUE;
15633}
15634
15635/* Set the _ITB_BASE, and point it to ex9 table. */
15636
15637bfd_boolean
15638nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15639{
15640 bfd *abfd;
15641 asection *sec;
15642 bfd *output_bfd = NULL;
15643 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC		 15644
15645 if (is_ITB_BASE_set == 1)
15646 return TRUE;
15647
15648 is_ITB_BASE_set = 1;
15649
1c8f6a4d
KLC		 15650 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15651
15652 if (bh && (bh->type == bfd_link_hash_defined
15653 || bh->type == bfd_link_hash_defweak))
15654 return TRUE;
35c08157
KLC		 15655
15656 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15657 abfd = abfd->link.next)
35c08157
KLC		 15658 {
15659 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15660 if (sec != NULL)
15661 {
15662 output_bfd = sec->output_section->owner;
15663 break;
15664 }
15665 }
15666 if (output_bfd == NULL)
15667 {
15668 output_bfd = link_info->output_bfd;
15669 if (output_bfd->sections == NULL)
15670 return TRUE;
15671 else
15672 sec = bfd_abs_section_ptr;
15673 }
15674 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15675 FALSE, FALSE, TRUE);
15676 return (_bfd_generic_link_add_one_symbol
15677 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15678 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC		 15679 (const char *) NULL, FALSE, get_elf_backend_data
15680 (output_bfd)->collect, &bh));
15681} /* End EX9.IT */
15682\f
15683
15684#define ELF_ARCH bfd_arch_nds32
15685#define ELF_MACHINE_CODE EM_NDS32
15686#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15687#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15688
6d00b590 15689#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15690#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15691#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 15692#define TARGET_LITTLE_NAME "elf32-nds32le"
15693
15694#define elf_info_to_howto nds32_info_to_howto
15695#define elf_info_to_howto_rel nds32_info_to_howto_rel
15696
15697#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15698#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15699#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15700#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15701#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15702
1c8f6a4d 15703#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 15704#define elf_backend_action_discarded nds32_elf_action_discarded
15705#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15706#define elf_backend_check_relocs nds32_elf_check_relocs
15707#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15708#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15709#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15710#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15711#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15712#define elf_backend_relocate_section nds32_elf_relocate_section
15713#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15714#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15715#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15716#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15717#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15718#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15719#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15720#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15721#define elf_backend_object_p nds32_elf_object_p
15722#define elf_backend_final_write_processing nds32_elf_final_write_processing
15723#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC		 15724#define bfd_elf32_bfd_get_relocated_section_contents \
15725 nds32_elf_get_relocated_section_contents
35c08157
KLC		 15726
15727#define elf_backend_can_gc_sections 1
15728#define elf_backend_can_refcount 1
15729#define elf_backend_want_got_plt 1
15730#define elf_backend_plt_readonly 1
15731#define elf_backend_want_plt_sym 0
15732#define elf_backend_got_header_size 12
15733#define elf_backend_may_use_rel_p 1
15734#define elf_backend_default_use_rela_p 1
15735#define elf_backend_may_use_rela_p 1
15736
15737#include "elf32-target.h"
15738
15739#undef ELF_MAXPAGESIZE
15740#define ELF_MAXPAGESIZE 0x2000
15741
15742#undef TARGET_BIG_SYM
6d00b590 15743#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 15744#undef TARGET_BIG_NAME
15745#define TARGET_BIG_NAME "elf32-nds32be-linux"
15746#undef TARGET_LITTLE_SYM
6d00b590 15747#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 15748#undef TARGET_LITTLE_NAME
15749#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15750#undef elf32_bed
15751#define elf32_bed elf32_nds32_lin_bed
15752
15753#include "elf32-target.h"
GDB Binutils - Deliverables
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