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[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
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35c08157 1/* NDS32-specific support for 32-bit ELF.
219d1afa 2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
35c08157
KLC		 59
60/* Nds32 helper functions. */
35c08157 61static bfd_vma calculate_memory_address
0c4bd9d9
KLC		 62(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
63static int nds32_get_section_contents (bfd *, asection *,
64 bfd_byte **, bfd_boolean);
35c08157 65static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 66(bfd *, asection *, struct bfd_link_info *);
1c8f6a4d
KLC		 67static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
68static void nds32_elf_ex9_import_table (struct bfd_link_info *);
69static void nds32_elf_ex9_finish (struct bfd_link_info *);
70static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 71static void nds32_elf_get_insn_with_reg
1c8f6a4d 72 (Elf_Internal_Rela *, uint32_t, uint32_t *);
35c08157
KLC		 73static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
74 Elf_Internal_Sym **);
75static bfd_boolean nds32_elf_ex9_replace_instruction
76 (struct bfd_link_info *, bfd *, asection *);
77static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
78 asection *);
1c8f6a4d 79static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 80static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 81static bfd_boolean nds32_elf_ifc_reloc (void);
35c08157
KLC		 82static bfd_boolean nds32_relax_fp_as_gp
83 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
84 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
85 Elf_Internal_Sym *isymbuf);
86static bfd_boolean nds32_fag_remove_unused_fpbase
87 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
88 Elf_Internal_Rela *irelend);
89
90enum
91{
92 MACH_V1 = bfd_mach_n1h,
93 MACH_V2 = bfd_mach_n1h_v2,
94 MACH_V3 = bfd_mach_n1h_v3,
95 MACH_V3M = bfd_mach_n1h_v3m
96};
97
98#define MIN(a, b) ((a) > (b) ? (b) : (a))
99#define MAX(a, b) ((a) > (b) ? (a) : (b))
100
101/* The name of the dynamic interpreter. This is put in the .interp
102 section. */
103#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
104
105/* The nop opcode we use. */
106#define NDS32_NOP32 0x40000009
107#define NDS32_NOP16 0x9200
108
109/* The size in bytes of an entry in the procedure linkage table. */
110#define PLT_ENTRY_SIZE 24
111#define PLT_HEADER_SIZE 24
112
113/* The first entry in a procedure linkage table are reserved,
114 and the initial contents are unimportant (we zero them out).
115 Subsequent entries look like this. */
07d6d2b8
AM		 116#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
117#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
118#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
119#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
120#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
35c08157
KLC		 121
122/* $ta is change to $r15 (from $r25). */
123#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
07d6d2b8
AM		 124#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
125#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
126#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
127#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
128#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
129
130#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
131#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
132#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
133#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
134#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
35c08157
KLC		 135
136#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
07d6d2b8
AM		 137#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
138#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
139#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
140#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
141#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 142
1c8f6a4d
KLC		 143/* These are macros used to get the relocation accurate value. */
144#define ACCURATE_8BIT_S1 (0x100)
145#define ACCURATE_U9BIT_S1 (0x400)
146#define ACCURATE_12BIT_S1 (0x2000)
147#define ACCURATE_14BIT_S1 (0x4000)
148#define ACCURATE_19BIT (0x40000)
149
150/* These are macros used to get the relocation conservative value. */
151#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
152#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
153#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
154#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
155/* These must be more conservative because the address may be in
156 different segment. */
157#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
158#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
159#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
160#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
161#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
162
35c08157
KLC		 163/* Size of small data/bss sections, used to calculate SDA_BASE. */
164static long got_size = 0;
165static int is_SDA_BASE_set = 0;
166static int is_ITB_BASE_set = 0;
167
35c08157
KLC		 168/* Convert ELF-VER in eflags to string for debugging purpose. */
169static const char *const nds32_elfver_strtab[] =
170{
171 "ELF-1.2",
172 "ELF-1.3",
173 "ELF-1.4",
174};
175
176/* The nds32 linker needs to keep track of the number of relocs that it
177 decides to copy in check_relocs for each symbol. This is so that
178 it can discard PC relative relocs if it doesn't need them when
179 linking with -Bsymbolic. We store the information in a field
180 extending the regular ELF linker hash table. */
181
182/* This structure keeps track of the number of PC relative relocs we
183 have copied for a given symbol. */
184
185struct elf_nds32_pcrel_relocs_copied
186{
187 /* Next section. */
188 struct elf_nds32_pcrel_relocs_copied *next;
189 /* A section in dynobj. */
190 asection *section;
191 /* Number of relocs copied in this section. */
192 bfd_size_type count;
193};
194
35c08157
KLC		 195/* Nds32 ELF linker hash entry. */
196
197struct elf_nds32_link_hash_entry
198{
199 struct elf_link_hash_entry root;
200
201 /* Track dynamic relocs copied for this symbol. */
3bf083ed 202 struct elf_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 203
204 /* For checking relocation type. */
205#define GOT_UNKNOWN 0
206#define GOT_NORMAL 1
207#define GOT_TLS_IE 2
208 unsigned int tls_type;
35c08157
KLC		 209};
210
211/* Get the nds32 ELF linker hash table from a link_info structure. */
212
213#define FP_BASE_NAME "_FP_BASE_"
214static int check_start_export_sym = 0;
215static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
216
1c8f6a4d
KLC		 217/* The offset for executable tls relaxation. */
218#define TP_OFFSET 0x0
219
220struct elf_nds32_obj_tdata
221{
222 struct elf_obj_tdata root;
223
224 /* tls_type for each local got entry. */
225 char *local_got_tls_type;
226};
227
228#define elf_nds32_tdata(bfd) \
229 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
230
231#define elf32_nds32_local_got_tls_type(bfd) \
232 (elf_nds32_tdata (bfd)->local_got_tls_type)
233
234#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
235
236static bfd_boolean
237nds32_elf_mkobject (bfd *abfd)
238{
239 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
240 NDS32_ELF_DATA);
241}
242
35c08157
KLC		 243/* Relocations used for relocation. */
244static reloc_howto_type nds32_elf_howto_table[] =
245{
246 /* This reloc does nothing. */
247 HOWTO (R_NDS32_NONE, /* type */
248 0, /* rightshift */
6346d5ca
AM		 249 3, /* size (0 = byte, 1 = short, 2 = long) */
250 0, /* bitsize */
35c08157
KLC		 251 FALSE, /* pc_relative */
252 0, /* bitpos */
6346d5ca 253 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 254 bfd_elf_generic_reloc, /* special_function */
255 "R_NDS32_NONE", /* name */
256 FALSE, /* partial_inplace */
257 0, /* src_mask */
258 0, /* dst_mask */
259 FALSE), /* pcrel_offset */
260
261 /* A 16 bit absolute relocation. */
262 HOWTO (R_NDS32_16, /* type */
263 0, /* rightshift */
264 1, /* size (0 = byte, 1 = short, 2 = long) */
265 16, /* bitsize */
266 FALSE, /* pc_relative */
267 0, /* bitpos */
268 complain_overflow_bitfield, /* complain_on_overflow */
269 nds32_elf_generic_reloc, /* special_function */
270 "R_NDS32_16", /* name */
271 FALSE, /* partial_inplace */
272 0xffff, /* src_mask */
273 0xffff, /* dst_mask */
274 FALSE), /* pcrel_offset */
275
276 /* A 32 bit absolute relocation. */
277 HOWTO (R_NDS32_32, /* type */
278 0, /* rightshift */
279 2, /* size (0 = byte, 1 = short, 2 = long) */
280 32, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_bitfield, /* complain_on_overflow */
284 nds32_elf_generic_reloc, /* special_function */
285 "R_NDS32_32", /* name */
286 FALSE, /* partial_inplace */
287 0xffffffff, /* src_mask */
288 0xffffffff, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* A 20 bit address. */
292 HOWTO (R_NDS32_20, /* type */
293 0, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 20, /* bitsize */
296 FALSE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_unsigned, /* complain_on_overflow */
299 nds32_elf_generic_reloc, /* special_function */
300 "R_NDS32_20", /* name */
301 FALSE, /* partial_inplace */
302 0xfffff, /* src_mask */
303 0xfffff, /* dst_mask */
304 FALSE), /* pcrel_offset */
305
306 /* An PC Relative 9-bit relocation, shifted by 2.
307 This reloc is complicated because relocations are relative to pc & -4.
308 i.e. branches in the right insn slot use the address of the left insn
309 slot for pc. */
310 /* ??? It's not clear whether this should have partial_inplace set or not.
311 Branch relaxing in the assembler can store the addend in the insn,
312 and if bfd_install_relocation gets called the addend may get added
313 again. */
314 HOWTO (R_NDS32_9_PCREL, /* type */
315 1, /* rightshift */
316 1, /* size (0 = byte, 1 = short, 2 = long) */
317 8, /* bitsize */
318 TRUE, /* pc_relative */
319 0, /* bitpos */
320 complain_overflow_signed, /* complain_on_overflow */
321 nds32_elf_9_pcrel_reloc, /* special_function */
322 "R_NDS32_9_PCREL", /* name */
323 FALSE, /* partial_inplace */
324 0xff, /* src_mask */
325 0xff, /* dst_mask */
326 TRUE), /* pcrel_offset */
327
328 /* A relative 15 bit relocation, right shifted by 1. */
329 HOWTO (R_NDS32_15_PCREL, /* type */
330 1, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 14, /* bitsize */
333 TRUE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_signed, /* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_NDS32_15_PCREL", /* name */
338 FALSE, /* partial_inplace */
339 0x3fff, /* src_mask */
340 0x3fff, /* dst_mask */
341 TRUE), /* pcrel_offset */
342
343 /* A relative 17 bit relocation, right shifted by 1. */
344 HOWTO (R_NDS32_17_PCREL, /* type */
345 1, /* rightshift */
346 2, /* size (0 = byte, 1 = short, 2 = long) */
347 16, /* bitsize */
348 TRUE, /* pc_relative */
349 0, /* bitpos */
350 complain_overflow_signed, /* complain_on_overflow */
351 bfd_elf_generic_reloc, /* special_function */
352 "R_NDS32_17_PCREL", /* name */
353 FALSE, /* partial_inplace */
354 0xffff, /* src_mask */
355 0xffff, /* dst_mask */
356 TRUE), /* pcrel_offset */
357
358 /* A relative 25 bit relocation, right shifted by 1. */
359 /* ??? It's not clear whether this should have partial_inplace set or not.
360 Branch relaxing in the assembler can store the addend in the insn,
361 and if bfd_install_relocation gets called the addend may get added
362 again. */
363 HOWTO (R_NDS32_25_PCREL, /* type */
364 1, /* rightshift */
365 2, /* size (0 = byte, 1 = short, 2 = long) */
366 24, /* bitsize */
367 TRUE, /* pc_relative */
368 0, /* bitpos */
369 complain_overflow_signed, /* complain_on_overflow */
370 bfd_elf_generic_reloc, /* special_function */
371 "R_NDS32_25_PCREL", /* name */
372 FALSE, /* partial_inplace */
373 0xffffff, /* src_mask */
374 0xffffff, /* dst_mask */
375 TRUE), /* pcrel_offset */
376
377 /* High 20 bits of address when lower 12 is or'd in. */
378 HOWTO (R_NDS32_HI20, /* type */
379 12, /* rightshift */
380 2, /* size (0 = byte, 1 = short, 2 = long) */
381 20, /* bitsize */
382 FALSE, /* pc_relative */
383 0, /* bitpos */
384 complain_overflow_dont,/* complain_on_overflow */
385 nds32_elf_hi20_reloc, /* special_function */
386 "R_NDS32_HI20", /* name */
387 FALSE, /* partial_inplace */
388 0x000fffff, /* src_mask */
389 0x000fffff, /* dst_mask */
390 FALSE), /* pcrel_offset */
391
392 /* Lower 12 bits of address. */
393 HOWTO (R_NDS32_LO12S3, /* type */
394 3, /* rightshift */
395 2, /* size (0 = byte, 1 = short, 2 = long) */
396 9, /* bitsize */
397 FALSE, /* pc_relative */
398 0, /* bitpos */
399 complain_overflow_dont,/* complain_on_overflow */
400 nds32_elf_lo12_reloc, /* special_function */
401 "R_NDS32_LO12S3", /* name */
402 FALSE, /* partial_inplace */
403 0x000001ff, /* src_mask */
404 0x000001ff, /* dst_mask */
405 FALSE), /* pcrel_offset */
406
407 /* Lower 12 bits of address. */
408 HOWTO (R_NDS32_LO12S2, /* type */
409 2, /* rightshift */
410 2, /* size (0 = byte, 1 = short, 2 = long) */
411 10, /* bitsize */
412 FALSE, /* pc_relative */
413 0, /* bitpos */
414 complain_overflow_dont,/* complain_on_overflow */
415 nds32_elf_lo12_reloc, /* special_function */
416 "R_NDS32_LO12S2", /* name */
417 FALSE, /* partial_inplace */
418 0x000003ff, /* src_mask */
419 0x000003ff, /* dst_mask */
420 FALSE), /* pcrel_offset */
421
422 /* Lower 12 bits of address. */
423 HOWTO (R_NDS32_LO12S1, /* type */
424 1, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 11, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_dont,/* complain_on_overflow */
430 nds32_elf_lo12_reloc, /* special_function */
431 "R_NDS32_LO12S1", /* name */
432 FALSE, /* partial_inplace */
433 0x000007ff, /* src_mask */
434 0x000007ff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 /* Lower 12 bits of address. */
438 HOWTO (R_NDS32_LO12S0, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 12, /* bitsize */
442 FALSE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_dont,/* complain_on_overflow */
445 nds32_elf_lo12_reloc, /* special_function */
446 "R_NDS32_LO12S0", /* name */
447 FALSE, /* partial_inplace */
448 0x00000fff, /* src_mask */
449 0x00000fff, /* dst_mask */
450 FALSE), /* pcrel_offset */
451
452 /* Small data area 15 bits offset. */
453 HOWTO (R_NDS32_SDA15S3, /* type */
454 3, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 15, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_signed, /* complain_on_overflow */
460 nds32_elf_sda15_reloc, /* special_function */
461 "R_NDS32_SDA15S3", /* name */
462 FALSE, /* partial_inplace */
463 0x00007fff, /* src_mask */
464 0x00007fff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Small data area 15 bits offset. */
468 HOWTO (R_NDS32_SDA15S2, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 15, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_signed, /* complain_on_overflow */
475 nds32_elf_sda15_reloc, /* special_function */
476 "R_NDS32_SDA15S2", /* name */
477 FALSE, /* partial_inplace */
478 0x00007fff, /* src_mask */
479 0x00007fff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Small data area 15 bits offset. */
483 HOWTO (R_NDS32_SDA15S1, /* type */
484 1, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 15, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_signed, /* complain_on_overflow */
490 nds32_elf_sda15_reloc, /* special_function */
491 "R_NDS32_SDA15S1", /* name */
492 FALSE, /* partial_inplace */
493 0x00007fff, /* src_mask */
494 0x00007fff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Small data area 15 bits offset. */
498 HOWTO (R_NDS32_SDA15S0, /* type */
499 0, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 15, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed, /* complain_on_overflow */
505 nds32_elf_sda15_reloc, /* special_function */
506 "R_NDS32_SDA15S0", /* name */
507 FALSE, /* partial_inplace */
508 0x00007fff, /* src_mask */
509 0x00007fff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* GNU extension to record C++ vtable hierarchy */
513 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 0, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 NULL, /* special_function */
521 "R_NDS32_GNU_VTINHERIT", /* name */
522 FALSE, /* partial_inplace */
523 0, /* src_mask */
524 0, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* GNU extension to record C++ vtable member usage */
528 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
529 0, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 0, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_dont,/* complain_on_overflow */
535 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
536 "R_NDS32_GNU_VTENTRY", /* name */
537 FALSE, /* partial_inplace */
538 0, /* src_mask */
539 0, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* A 16 bit absolute relocation. */
543 HOWTO (R_NDS32_16_RELA, /* type */
544 0, /* rightshift */
545 1, /* size (0 = byte, 1 = short, 2 = long) */
546 16, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_bitfield, /* complain_on_overflow */
550 bfd_elf_generic_reloc, /* special_function */
551 "R_NDS32_16_RELA", /* name */
552 FALSE, /* partial_inplace */
553 0xffff, /* src_mask */
554 0xffff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* A 32 bit absolute relocation. */
558 HOWTO (R_NDS32_32_RELA, /* type */
559 0, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 32, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_bitfield, /* complain_on_overflow */
565 bfd_elf_generic_reloc, /* special_function */
566 "R_NDS32_32_RELA", /* name */
567 FALSE, /* partial_inplace */
568 0xffffffff, /* src_mask */
569 0xffffffff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* A 20 bit address. */
573 HOWTO (R_NDS32_20_RELA, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 20, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 bfd_elf_generic_reloc, /* special_function */
581 "R_NDS32_20_RELA", /* name */
582 FALSE, /* partial_inplace */
583 0xfffff, /* src_mask */
584 0xfffff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
588 1, /* rightshift */
589 1, /* size (0 = byte, 1 = short, 2 = long) */
590 8, /* bitsize */
591 TRUE, /* pc_relative */
592 0, /* bitpos */
593 complain_overflow_signed, /* complain_on_overflow */
594 bfd_elf_generic_reloc, /* special_function */
595 "R_NDS32_9_PCREL_RELA",/* name */
596 FALSE, /* partial_inplace */
597 0xff, /* src_mask */
598 0xff, /* dst_mask */
599 TRUE), /* pcrel_offset */
600
601 /* A relative 15 bit relocation, right shifted by 1. */
602 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
603 1, /* rightshift */
604 2, /* size (0 = byte, 1 = short, 2 = long) */
605 14, /* bitsize */
606 TRUE, /* pc_relative */
607 0, /* bitpos */
608 complain_overflow_signed, /* complain_on_overflow */
609 bfd_elf_generic_reloc, /* special_function */
610 "R_NDS32_15_PCREL_RELA", /* name */
611 FALSE, /* partial_inplace */
612 0x3fff, /* src_mask */
613 0x3fff, /* dst_mask */
614 TRUE), /* pcrel_offset */
615
616 /* A relative 17 bit relocation, right shifted by 1. */
617 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
618 1, /* rightshift */
619 2, /* size (0 = byte, 1 = short, 2 = long) */
620 16, /* bitsize */
621 TRUE, /* pc_relative */
622 0, /* bitpos */
623 complain_overflow_signed, /* complain_on_overflow */
624 bfd_elf_generic_reloc, /* special_function */
625 "R_NDS32_17_PCREL_RELA", /* name */
626 FALSE, /* partial_inplace */
627 0xffff, /* src_mask */
628 0xffff, /* dst_mask */
629 TRUE), /* pcrel_offset */
630
631 /* A relative 25 bit relocation, right shifted by 2. */
632 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
633 1, /* rightshift */
634 2, /* size (0 = byte, 1 = short, 2 = long) */
635 24, /* bitsize */
636 TRUE, /* pc_relative */
637 0, /* bitpos */
638 complain_overflow_signed, /* complain_on_overflow */
639 bfd_elf_generic_reloc, /* special_function */
640 "R_NDS32_25_PCREL_RELA", /* name */
641 FALSE, /* partial_inplace */
642 0xffffff, /* src_mask */
643 0xffffff, /* dst_mask */
644 TRUE), /* pcrel_offset */
645
646 /* High 20 bits of address when lower 16 is or'd in. */
647 HOWTO (R_NDS32_HI20_RELA, /* type */
648 12, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 20, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_NDS32_HI20_RELA", /* name */
656 FALSE, /* partial_inplace */
657 0x000fffff, /* src_mask */
658 0x000fffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 /* Lower 12 bits of address. */
662 HOWTO (R_NDS32_LO12S3_RELA, /* type */
663 3, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 9, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_dont,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_LO12S3_RELA", /* name */
671 FALSE, /* partial_inplace */
672 0x000001ff, /* src_mask */
673 0x000001ff, /* dst_mask */
674 FALSE), /* pcrel_offset */
675
676 /* Lower 12 bits of address. */
677 HOWTO (R_NDS32_LO12S2_RELA, /* type */
678 2, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 10, /* bitsize */
681 FALSE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_dont,/* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_LO12S2_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x000003ff, /* src_mask */
688 0x000003ff, /* dst_mask */
689 FALSE), /* pcrel_offset */
690
691 /* Lower 12 bits of address. */
692 HOWTO (R_NDS32_LO12S1_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 11, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_LO12S1_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0x000007ff, /* src_mask */
703 0x000007ff, /* dst_mask */
704 FALSE), /* pcrel_offset */
705
706 /* Lower 12 bits of address. */
707 HOWTO (R_NDS32_LO12S0_RELA, /* type */
708 0, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 12, /* bitsize */
711 FALSE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_dont,/* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_LO12S0_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0x00000fff, /* src_mask */
718 0x00000fff, /* dst_mask */
719 FALSE), /* pcrel_offset */
720
721 /* Small data area 15 bits offset. */
722 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
723 3, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 15, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_signed, /* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_SDA15S3_RELA",/* name */
731 FALSE, /* partial_inplace */
732 0x00007fff, /* src_mask */
733 0x00007fff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Small data area 15 bits offset. */
737 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
738 2, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 15, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_signed, /* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_SDA15S2_RELA",/* name */
746 FALSE, /* partial_inplace */
747 0x00007fff, /* src_mask */
748 0x00007fff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
752 1, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 15, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_signed, /* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_NDS32_SDA15S1_RELA",/* name */
760 FALSE, /* partial_inplace */
761 0x00007fff, /* src_mask */
762 0x00007fff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 15, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_signed, /* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_NDS32_SDA15S0_RELA",/* name */
774 FALSE, /* partial_inplace */
775 0x00007fff, /* src_mask */
776 0x00007fff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 /* GNU extension to record C++ vtable hierarchy */
780 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
781 0, /* rightshift */
782 2, /* size (0 = byte, 1 = short, 2 = long) */
783 0, /* bitsize */
784 FALSE, /* pc_relative */
785 0, /* bitpos */
786 complain_overflow_dont,/* complain_on_overflow */
787 NULL, /* special_function */
788 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
789 FALSE, /* partial_inplace */
790 0, /* src_mask */
791 0, /* dst_mask */
792 FALSE), /* pcrel_offset */
793
794 /* GNU extension to record C++ vtable member usage */
795 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
796 0, /* rightshift */
797 2, /* size (0 = byte, 1 = short, 2 = long) */
798 0, /* bitsize */
799 FALSE, /* pc_relative */
800 0, /* bitpos */
801 complain_overflow_dont,/* complain_on_overflow */
802 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
803 "R_NDS32_RELA_GNU_VTENTRY", /* name */
804 FALSE, /* partial_inplace */
805 0, /* src_mask */
806 0, /* dst_mask */
807 FALSE), /* pcrel_offset */
808
809 /* Like R_NDS32_20, but referring to the GOT table entry for
810 the symbol. */
811 HOWTO (R_NDS32_GOT20, /* type */
812 0, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 20, /* bitsize */
815 FALSE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_signed, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 "R_NDS32_GOT20", /* name */
820 FALSE, /* partial_inplace */
821 0xfffff, /* src_mask */
822 0xfffff, /* dst_mask */
823 FALSE), /* pcrel_offset */
824
825 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
826 entry for the symbol. */
827 HOWTO (R_NDS32_25_PLTREL, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 24, /* bitsize */
831 TRUE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_25_PLTREL", /* name */
836 FALSE, /* partial_inplace */
837 0xffffff, /* src_mask */
838 0xffffff, /* dst_mask */
839 TRUE), /* pcrel_offset */
840
841 /* This is used only by the dynamic linker. The symbol should exist
842 both in the object being run and in some shared library. The
843 dynamic linker copies the data addressed by the symbol from the
844 shared library into the object, because the object being
845 run has to have the data at some particular address. */
846 HOWTO (R_NDS32_COPY, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 32, /* bitsize */
850 FALSE, /* pc_relative */
851 0, /* bitpos */
852 complain_overflow_bitfield, /* complain_on_overflow */
853 bfd_elf_generic_reloc, /* special_function */
854 "R_NDS32_COPY", /* name */
855 FALSE, /* partial_inplace */
856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
858 FALSE), /* pcrel_offset */
859
860 /* Like R_NDS32_20, but used when setting global offset table
861 entries. */
862 HOWTO (R_NDS32_GLOB_DAT, /* type */
863 0, /* rightshift */
864 2, /* size (0 = byte, 1 = short, 2 = long) */
865 32, /* bitsize */
866 FALSE, /* pc_relative */
867 0, /* bitpos */
868 complain_overflow_bitfield, /* complain_on_overflow */
869 bfd_elf_generic_reloc, /* special_function */
870 "R_NDS32_GLOB_DAT", /* name */
871 FALSE, /* partial_inplace */
872 0xffffffff, /* src_mask */
873 0xffffffff, /* dst_mask */
874 FALSE), /* pcrel_offset */
875
876 /* Marks a procedure linkage table entry for a symbol. */
877 HOWTO (R_NDS32_JMP_SLOT, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 FALSE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_bitfield, /* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_NDS32_JMP_SLOT", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 /* Used only by the dynamic linker. When the object is run, this
892 longword is set to the load address of the object, plus the
893 addend. */
894 HOWTO (R_NDS32_RELATIVE, /* type */
895 0, /* rightshift */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
897 32, /* bitsize */
898 FALSE, /* pc_relative */
899 0, /* bitpos */
900 complain_overflow_bitfield, /* complain_on_overflow */
901 bfd_elf_generic_reloc, /* special_function */
902 "R_NDS32_RELATIVE", /* name */
903 FALSE, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 FALSE), /* pcrel_offset */
907
908 HOWTO (R_NDS32_GOTOFF, /* type */
909 0, /* rightshift */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
911 20, /* bitsize */
912 FALSE, /* pc_relative */
913 0, /* bitpos */
914 complain_overflow_signed, /* complain_on_overflow */
915 bfd_elf_generic_reloc, /* special_function */
916 "R_NDS32_GOTOFF", /* name */
917 FALSE, /* partial_inplace */
918 0xfffff, /* src_mask */
919 0xfffff, /* dst_mask */
920 FALSE), /* pcrel_offset */
921
922 /* An PC Relative 20-bit relocation used when setting PIC offset
923 table register. */
924 HOWTO (R_NDS32_GOTPC20, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 20, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_signed, /* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_NDS32_GOTPC20", /* name */
933 FALSE, /* partial_inplace */
934 0xfffff, /* src_mask */
935 0xfffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 /* Like R_NDS32_HI20, but referring to the GOT table entry for
939 the symbol. */
940 HOWTO (R_NDS32_GOT_HI20, /* type */
941 12, /* rightshift */
942 2, /* size (0 = byte, 1 = short, 2 = long) */
943 20, /* bitsize */
944 FALSE, /* pc_relative */
945 0, /* bitpos */
946 complain_overflow_dont,/* complain_on_overflow */
947 bfd_elf_generic_reloc, /* special_function */
948 "R_NDS32_GOT_HI20", /* name */
949 FALSE, /* partial_inplace */
950 0x000fffff, /* src_mask */
951 0x000fffff, /* dst_mask */
952 FALSE), /* pcrel_offset */
953 HOWTO (R_NDS32_GOT_LO12, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 12, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_dont,/* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_GOT_LO12", /* name */
962 FALSE, /* partial_inplace */
963 0x00000fff, /* src_mask */
964 0x00000fff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* An PC Relative relocation used when setting PIC offset table register.
968 Like R_NDS32_HI20, but referring to the GOT table entry for
969 the symbol. */
970 HOWTO (R_NDS32_GOTPC_HI20, /* type */
971 12, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 20, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_dont,/* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_GOTPC_HI20", /* name */
979 FALSE, /* partial_inplace */
980 0x000fffff, /* src_mask */
981 0x000fffff, /* dst_mask */
982 TRUE), /* pcrel_offset */
983 HOWTO (R_NDS32_GOTPC_LO12, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 12, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_dont, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTPC_LO12", /* name */
992 FALSE, /* partial_inplace */
993 0x00000fff, /* src_mask */
994 0x00000fff, /* dst_mask */
995 TRUE), /* pcrel_offset */
996
997 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
998 12, /* rightshift */
999 2, /* size (0 = byte, 1 = short, 2 = long) */
1000 20, /* bitsize */
1001 FALSE, /* pc_relative */
1002 0, /* bitpos */
1003 complain_overflow_dont,/* complain_on_overflow */
1004 bfd_elf_generic_reloc, /* special_function */
1005 "R_NDS32_GOTOFF_HI20", /* name */
1006 FALSE, /* partial_inplace */
1007 0x000fffff, /* src_mask */
1008 0x000fffff, /* dst_mask */
1009 FALSE), /* pcrel_offset */
1010 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 12, /* bitsize */
1014 FALSE, /* pc_relative */
1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 bfd_elf_generic_reloc, /* special_function */
1018 "R_NDS32_GOTOFF_LO12", /* name */
1019 FALSE, /* partial_inplace */
1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
1022 FALSE), /* pcrel_offset */
1023
1024 /* Alignment hint for relaxable instruction. This is used with
1025 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1026 in order to make next label aligned on word boundary. */
1027 HOWTO (R_NDS32_INSN16, /* type */
1028 0, /* rightshift */
1029 2, /* size (0 = byte, 1 = short, 2 = long) */
1030 32, /* bitsize */
1031 FALSE, /* pc_relative */
1032 0, /* bitpos */
1033 complain_overflow_dont,/* complain_on_overflow */
1034 nds32_elf_ignore_reloc,/* special_function */
1035 "R_NDS32_INSN16", /* name */
1036 FALSE, /* partial_inplace */
1037 0x00000fff, /* src_mask */
1038 0x00000fff, /* dst_mask */
1039 FALSE), /* pcrel_offset */
1040
1041 /* Alignment hint for label. */
1042 HOWTO (R_NDS32_LABEL, /* type */
1043 0, /* rightshift */
1044 2, /* size (0 = byte, 1 = short, 2 = long) */
1045 32, /* bitsize */
1046 FALSE, /* pc_relative */
1047 0, /* bitpos */
1048 complain_overflow_dont,/* complain_on_overflow */
1049 nds32_elf_ignore_reloc,/* special_function */
1050 "R_NDS32_LABEL", /* name */
1051 FALSE, /* partial_inplace */
1052 0xffffffff, /* src_mask */
1053 0xffffffff, /* dst_mask */
1054 FALSE), /* pcrel_offset */
1055
1056 /* Relax hint for unconditional call sequence */
1057 HOWTO (R_NDS32_LONGCALL1, /* type */
1058 0, /* rightshift */
1059 2, /* size (0 = byte, 1 = short, 2 = long) */
1060 32, /* bitsize */
1061 FALSE, /* pc_relative */
1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 nds32_elf_ignore_reloc,/* special_function */
1065 "R_NDS32_LONGCALL1", /* name */
1066 FALSE, /* partial_inplace */
1067 0xffffffff, /* src_mask */
1068 0xffffffff, /* dst_mask */
1069 FALSE), /* pcrel_offset */
1070
1071 /* Relax hint for conditional call sequence. */
1072 HOWTO (R_NDS32_LONGCALL2, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 nds32_elf_ignore_reloc,/* special_function */
1080 "R_NDS32_LONGCALL2", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085
1086 /* Relax hint for conditional call sequence. */
1087 HOWTO (R_NDS32_LONGCALL3, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 nds32_elf_ignore_reloc,/* special_function */
1095 "R_NDS32_LONGCALL3", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Relax hint for unconditional branch sequence. */
1102 HOWTO (R_NDS32_LONGJUMP1, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_LONGJUMP1", /* name */
1111 FALSE, /* partial_inplace */
1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Relax hint for conditional branch sequence. */
1117 HOWTO (R_NDS32_LONGJUMP2, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LONGJUMP2", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for conditional branch sequence. */
1132 HOWTO (R_NDS32_LONGJUMP3, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGJUMP3", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for load/store sequence. */
1147 HOWTO (R_NDS32_LOADSTORE, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LOADSTORE", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for load/store sequence. */
1162 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1163 0, /* rightshift */
1164 1, /* size (0 = byte, 1 = short, 2 = long) */
1165 16, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_9_FIXED_RELA",/* name */
1171 FALSE, /* partial_inplace */
1172 0x000000ff, /* src_mask */
1173 0x000000ff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for load/store sequence. */
1177 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_15_FIXED_RELA", /* name */
1186 FALSE, /* partial_inplace */
1187 0x00003fff, /* src_mask */
1188 0x00003fff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for load/store sequence. */
1192 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_17_FIXED_RELA", /* name */
1201 FALSE, /* partial_inplace */
1202 0x0000ffff, /* src_mask */
1203 0x0000ffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for load/store sequence. */
1207 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_25_FIXED_RELA", /* name */
1216 FALSE, /* partial_inplace */
1217 0x00ffffff, /* src_mask */
1218 0x00ffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* High 20 bits of PLT symbol offset relative to PC. */
1222 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1223 12, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 20, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 bfd_elf_generic_reloc, /* special_function */
1230 "R_NDS32_PLTREL_HI20", /* name */
1231 FALSE, /* partial_inplace */
1232 0x000fffff, /* src_mask */
1233 0x000fffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Low 12 bits of PLT symbol offset relative to PC. */
1237 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1238 0, /* rightshift */
1239 2, /* size (0 = byte, 1 = short, 2 = long) */
1240 12, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 bfd_elf_generic_reloc, /* special_function */
1245 "R_NDS32_PLTREL_LO12", /* name */
1246 FALSE, /* partial_inplace */
1247 0x00000fff, /* src_mask */
1248 0x00000fff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1252 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1253 12, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 20, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 bfd_elf_generic_reloc, /* special_function */
1260 "R_NDS32_PLT_GOTREL_HI20", /* name */
1261 FALSE, /* partial_inplace */
1262 0x000fffff, /* src_mask */
1263 0x000fffff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1267 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 12, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 bfd_elf_generic_reloc, /* special_function */
1275 "R_NDS32_PLT_GOTREL_LO12", /* name */
1276 FALSE, /* partial_inplace */
1277 0x00000fff, /* src_mask */
1278 0x00000fff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Small data area 12 bits offset. */
1282 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1283 2, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 12, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_signed, /* complain_on_overflow */
1289 bfd_elf_generic_reloc, /* special_function */
1290 "R_NDS32_SDA12S2_DP_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00000fff, /* src_mask */
1293 0x00000fff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* Small data area 12 bits offset. */
1297 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1298 2, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 12, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_signed, /* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_SDA12S2_SP_RELA", /* name */
1306 FALSE, /* partial_inplace */
1307 0x00000fff, /* src_mask */
1308 0x00000fff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310 /* Lower 12 bits of address. */
1311
1312 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1313 2, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 10, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_LO12S2_DP_RELA", /* name */
1321 FALSE, /* partial_inplace */
1322 0x000003ff, /* src_mask */
1323 0x000003ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* Lower 12 bits of address. */
1327 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1328 2, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 10, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_LO12S2_SP_RELA", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000003ff, /* src_mask */
1338 0x000003ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340 /* Lower 12 bits of address. Special identity for or case. */
1341 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 12, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_NDS32_LO12S0_ORI_RELA", /* name */
1350 FALSE, /* partial_inplace */
1351 0x00000fff, /* src_mask */
1352 0x00000fff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354 /* Small data area 19 bits offset. */
1355 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1356 3, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 16, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_signed, /* complain_on_overflow */
1362 bfd_elf_generic_reloc, /* special_function */
1363 "R_NDS32_SDA16S3_RELA",/* name */
1364 FALSE, /* partial_inplace */
1365 0x0000ffff, /* src_mask */
1366 0x0000ffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 /* Small data area 15 bits offset. */
1370 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1371 2, /* rightshift */
1372 2, /* size (0 = byte, 1 = short, 2 = long) */
1373 17, /* bitsize */
1374 FALSE, /* pc_relative */
1375 0, /* bitpos */
1376 complain_overflow_signed, /* complain_on_overflow */
1377 bfd_elf_generic_reloc, /* special_function */
1378 "R_NDS32_SDA17S2_RELA",/* name */
1379 FALSE, /* partial_inplace */
1380 0x0001ffff, /* src_mask */
1381 0x0001ffff, /* dst_mask */
1382 FALSE), /* pcrel_offset */
1383
1384 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1385 1, /* rightshift */
1386 2, /* size (0 = byte, 1 = short, 2 = long) */
1387 18, /* bitsize */
1388 FALSE, /* pc_relative */
1389 0, /* bitpos */
1390 complain_overflow_signed, /* complain_on_overflow */
1391 bfd_elf_generic_reloc, /* special_function */
1392 "R_NDS32_SDA18S1_RELA",/* name */
1393 FALSE, /* partial_inplace */
1394 0x0003ffff, /* src_mask */
1395 0x0003ffff, /* dst_mask */
1396 FALSE), /* pcrel_offset */
1397
1398 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1399 0, /* rightshift */
1400 2, /* size (0 = byte, 1 = short, 2 = long) */
1401 19, /* bitsize */
1402 FALSE, /* pc_relative */
1403 0, /* bitpos */
1404 complain_overflow_signed, /* complain_on_overflow */
1405 bfd_elf_generic_reloc, /* special_function */
1406 "R_NDS32_SDA19S0_RELA",/* name */
1407 FALSE, /* partial_inplace */
1408 0x0007ffff, /* src_mask */
1409 0x0007ffff, /* dst_mask */
1410 FALSE), /* pcrel_offset */
1411 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1412 0, /* rightshift */
1413 0, /* size (0 = byte, 1 = short, 2 = long) */
1414 8, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 nds32_elf_ignore_reloc,/* special_function */
1419 "R_NDS32_DWARF2_OP1_RELA", /* name */
1420 FALSE, /* partial_inplace */
1421 0xff, /* src_mask */
1422 0xff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1425 0, /* rightshift */
1426 1, /* size (0 = byte, 1 = short, 2 = long) */
1427 16, /* bitsize */
1428 FALSE, /* pc_relative */
1429 0, /* bitpos */
1430 complain_overflow_dont,/* complain_on_overflow */
1431 nds32_elf_ignore_reloc,/* special_function */
1432 "R_NDS32_DWARF2_OP2_RELA", /* name */
1433 FALSE, /* partial_inplace */
1434 0xffff, /* src_mask */
1435 0xffff, /* dst_mask */
1436 FALSE), /* pcrel_offset */
1437 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1438 0, /* rightshift */
1439 2, /* size (0 = byte, 1 = short, 2 = long) */
1440 32, /* bitsize */
1441 FALSE, /* pc_relative */
1442 0, /* bitpos */
1443 complain_overflow_dont,/* complain_on_overflow */
1444 nds32_elf_ignore_reloc,/* special_function */
1445 "R_NDS32_DWARF2_LEB_RELA", /* name */
1446 FALSE, /* partial_inplace */
1447 0xffffffff, /* src_mask */
1448 0xffffffff, /* dst_mask */
1449 FALSE), /* pcrel_offset */
1450 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1451 0, /* rightshift */
1452 1, /* size (0 = byte, 1 = short, 2 = long) */
1453 16, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont,/* complain_on_overflow */
1457 nds32_elf_ignore_reloc,/* special_function */
1458 "R_NDS32_UPDATE_TA_RELA", /* name */
1459 FALSE, /* partial_inplace */
1460 0xffff, /* src_mask */
1461 0xffff, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1464 entry for the symbol. */
1465 HOWTO (R_NDS32_9_PLTREL, /* type */
1466 1, /* rightshift */
1467 1, /* size (0 = byte, 1 = short, 2 = long) */
1468 8, /* bitsize */
1469 TRUE, /* pc_relative */
1470 0, /* bitpos */
1471 complain_overflow_signed, /* complain_on_overflow */
1472 bfd_elf_generic_reloc, /* special_function */
1473 "R_NDS32_9_PLTREL", /* name */
1474 FALSE, /* partial_inplace */
1475 0xff, /* src_mask */
1476 0xff, /* dst_mask */
1477 TRUE), /* pcrel_offset */
1478 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1479 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1480 0, /* rightshift */
1481 2, /* size (0 = byte, 1 = short, 2 = long) */
1482 20, /* bitsize */
1483 FALSE, /* pc_relative */
1484 0, /* bitpos */
1485 complain_overflow_dont,/* complain_on_overflow */
1486 bfd_elf_generic_reloc, /* special_function */
1487 "R_NDS32_PLT_GOTREL_LO20", /* name */
1488 FALSE, /* partial_inplace */
1489 0x000fffff, /* src_mask */
1490 0x000fffff, /* dst_mask */
1491 FALSE), /* pcrel_offset */
1492 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1493 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 15, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_dont,/* complain_on_overflow */
1500 bfd_elf_generic_reloc, /* special_function */
1501 "R_NDS32_PLT_GOTREL_LO15", /* name */
1502 FALSE, /* partial_inplace */
1503 0x00007fff, /* src_mask */
1504 0x00007fff, /* dst_mask */
1505 FALSE), /* pcrel_offset */
1506 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1507 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 19, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_dont,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_NDS32_PLT_GOTREL_LO19", /* name */
1516 FALSE, /* partial_inplace */
1517 0x0007ffff, /* src_mask */
1518 0x0007ffff, /* dst_mask */
1519 FALSE), /* pcrel_offset */
1520 HOWTO (R_NDS32_GOT_LO15, /* type */
1521 0, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 15, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_dont,/* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 "R_NDS32_GOT_LO15", /* name */
1529 FALSE, /* partial_inplace */
1530 0x00007fff, /* src_mask */
1531 0x00007fff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533 HOWTO (R_NDS32_GOT_LO19, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 19, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_dont,/* complain_on_overflow */
1540 bfd_elf_generic_reloc, /* special_function */
1541 "R_NDS32_GOT_LO19", /* name */
1542 FALSE, /* partial_inplace */
1543 0x0007ffff, /* src_mask */
1544 0x0007ffff, /* dst_mask */
1545 FALSE), /* pcrel_offset */
1546 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 15, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_dont,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_NDS32_GOTOFF_LO15", /* name */
1555 FALSE, /* partial_inplace */
1556 0x00007fff, /* src_mask */
1557 0x00007fff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1560 0, /* rightshift */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 19, /* bitsize */
1563 FALSE, /* pc_relative */
1564 0, /* bitpos */
1565 complain_overflow_dont,/* complain_on_overflow */
1566 bfd_elf_generic_reloc, /* special_function */
1567 "R_NDS32_GOTOFF_LO19", /* name */
1568 FALSE, /* partial_inplace */
1569 0x0007ffff, /* src_mask */
1570 0x0007ffff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
1572 /* GOT 15 bits offset. */
1573 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1574 2, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 15, /* bitsize */
1577 FALSE, /* pc_relative */
1578 0, /* bitpos */
1579 complain_overflow_signed, /* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_NDS32_GOT15S2_RELA",/* name */
1582 FALSE, /* partial_inplace */
1583 0x00007fff, /* src_mask */
1584 0x00007fff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
1586 /* GOT 17 bits offset. */
1587 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1588 2, /* rightshift */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1590 17, /* bitsize */
1591 FALSE, /* pc_relative */
1592 0, /* bitpos */
1593 complain_overflow_signed, /* complain_on_overflow */
1594 bfd_elf_generic_reloc, /* special_function */
1595 "R_NDS32_GOT17S2_RELA",/* name */
1596 FALSE, /* partial_inplace */
1597 0x0001ffff, /* src_mask */
1598 0x0001ffff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1600 /* A 5 bit address. */
1601 HOWTO (R_NDS32_5_RELA, /* type */
1602 0, /* rightshift */
1603 1, /* size (0 = byte, 1 = short, 2 = long) */
1604 5, /* bitsize */
1605 FALSE, /* pc_relative */
1606 0, /* bitpos */
1607 complain_overflow_signed, /* complain_on_overflow */
1608 bfd_elf_generic_reloc, /* special_function */
1609 "R_NDS32_5_RELA", /* name */
1610 FALSE, /* partial_inplace */
1611 0x1f, /* src_mask */
1612 0x1f, /* dst_mask */
1613 FALSE), /* pcrel_offset */
1614 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1615 1, /* rightshift */
1616 1, /* size (0 = byte, 1 = short, 2 = long) */
1617 9, /* bitsize */
1618 TRUE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_unsigned, /* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_NDS32_10_UPCREL_RELA", /* name */
1623 FALSE, /* partial_inplace */
1624 0x1ff, /* src_mask */
1625 0x1ff, /* dst_mask */
1626 TRUE), /* pcrel_offset */
1627 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1628 2, /* rightshift */
1629 1, /* size (0 = byte, 1 = short, 2 = long) */
1630 7, /* bitsize */
1631 FALSE, /* pc_relative */
1632 0, /* bitpos */
1633 complain_overflow_unsigned, /* complain_on_overflow */
1634 bfd_elf_generic_reloc, /* special_function */
1635 "R_NDS32_SDA_FP7U2_RELA", /* name */
1636 FALSE, /* partial_inplace */
1637 0x0000007f, /* src_mask */
1638 0x0000007f, /* dst_mask */
1639 FALSE), /* pcrel_offset */
1640 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1641 1, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 8, /* bitsize */
1644 TRUE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_signed, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1649 FALSE, /* partial_inplace */
1650 0xff, /* src_mask */
1651 0xff, /* dst_mask */
1652 TRUE), /* pcrel_offset */
1653 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1654 1, /* rightshift */
1655 2, /* size (0 = byte, 1 = short, 2 = long) */
1656 24, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_NDS32_25_ABS_RELA", /* name */
1662 FALSE, /* partial_inplace */
1663 0xffffff, /* src_mask */
1664 0xffffff, /* dst_mask */
1665 FALSE), /* pcrel_offset */
1666
1667 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1668 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1669 1, /* rightshift */
1670 2, /* size (0 = byte, 1 = short, 2 = long) */
1671 16, /* bitsize */
1672 TRUE, /* pc_relative */
1673 0, /* bitpos */
1674 complain_overflow_signed, /* complain_on_overflow */
1675 bfd_elf_generic_reloc, /* special_function */
1676 "R_NDS32_17IFC_PCREL_RELA", /* name */
1677 FALSE, /* partial_inplace */
1678 0xffff, /* src_mask */
1679 0xffff, /* dst_mask */
1680 TRUE), /* pcrel_offset */
1681
1682 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1683 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1684 1, /* rightshift */
1685 1, /* size (0 = byte, 1 = short, 2 = long) */
1686 9, /* bitsize */
1687 TRUE, /* pc_relative */
1688 0, /* bitpos */
1689 complain_overflow_unsigned, /* complain_on_overflow */
1690 bfd_elf_generic_reloc, /* special_function */
1691 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1692 FALSE, /* partial_inplace */
1693 0x1ff, /* src_mask */
1694 0x1ff, /* dst_mask */
1695 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1696
1697 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1698 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1699 12, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 20, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_dont, /* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_NDS32_TLS_LE_HI20", /* name */
1707 FALSE, /* partial_inplace */
1708 0x000fffff, /* src_mask */
1709 0x000fffff, /* dst_mask */
1710 FALSE), /* pcrel_offset */
1711 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1712 0, /* rightshift */
1713 2, /* size (0 = byte, 1 = short, 2 = long) */
1714 12, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont, /* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_NDS32_TLS_LE_LO12", /* name */
1720 FALSE, /* partial_inplace */
1721 0x00000fff, /* src_mask */
1722 0x00000fff, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1726 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1727 12, /* rightshift */
1728 2, /* size (0 = byte, 1 = short, 2 = long) */
1729 20, /* bitsize */
1730 FALSE, /* pc_relative */
1731 0, /* bitpos */
1732 complain_overflow_dont, /* complain_on_overflow */
1733 bfd_elf_generic_reloc, /* special_function */
1734 "R_NDS32_TLS_IE_HI20", /* name */
1735 FALSE, /* partial_inplace */
1736 0x000fffff, /* src_mask */
1737 0x000fffff, /* dst_mask */
1738 FALSE), /* pcrel_offset */
1739 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1740 2, /* rightshift */
1741 2, /* size (0 = byte, 1 = short, 2 = long) */
1742 10, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont, /* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_NDS32_TLS_IE_LO12S2", /* name */
1748 FALSE, /* partial_inplace */
1749 0x000003ff, /* src_mask */
1750 0x000003ff, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752 /* Mark a TLS IE entry in GOT. */
1753 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1754 0, /* rightshift */
1755 2, /* size (0 = byte, 1 = short, 2 = long) */
1756 32, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_bitfield, /* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_NDS32_TLS_TPOFF", /* name */
1762 FALSE, /* partial_inplace */
1763 0xffffffff, /* src_mask */
1764 0xffffffff, /* dst_mask */
1765 FALSE), /* pcrel_offset */
1766 /* A 20 bit address. */
1767 HOWTO (R_NDS32_TLS_LE_20, /* type */
1768 0, /* rightshift */
1769 2, /* size (0 = byte, 1 = short, 2 = long) */
1770 20, /* bitsize */
1771 FALSE, /* pc_relative */
1772 0, /* bitpos */
1773 complain_overflow_signed, /* complain_on_overflow */
1774 bfd_elf_generic_reloc, /* special_function */
1775 "R_NDS32_TLS_LE_20", /* name */
1776 FALSE, /* partial_inplace */
1777 0xfffff, /* src_mask */
1778 0xfffff, /* dst_mask */
1779 FALSE), /* pcrel_offset */
1780 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1781 0, /* rightshift */
1782 2, /* size (0 = byte, 1 = short, 2 = long) */
1783 15, /* bitsize */
1784 FALSE, /* pc_relative */
1785 0, /* bitpos */
1786 complain_overflow_signed, /* complain_on_overflow */
1787 bfd_elf_generic_reloc, /* special_function */
1788 "R_NDS32_TLS_LE_15S0", /* name */
1789 FALSE, /* partial_inplace */
1790 0x7fff, /* src_mask */
1791 0x7fff, /* dst_mask */
1792 FALSE), /* pcrel_offset */
1793 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1794 1, /* rightshift */
1795 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 15, /* bitsize */
1797 FALSE, /* pc_relative */
1798 0, /* bitpos */
1799 complain_overflow_signed, /* complain_on_overflow */
1800 bfd_elf_generic_reloc, /* special_function */
1801 "R_NDS32_TLS_LE_15S1", /* name */
1802 FALSE, /* partial_inplace */
1803 0x7fff, /* src_mask */
1804 0x7fff, /* dst_mask */
1805 FALSE), /* pcrel_offset */
1806 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1807 2, /* rightshift */
1808 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 15, /* bitsize */
1810 FALSE, /* pc_relative */
1811 0, /* bitpos */
1812 complain_overflow_signed, /* complain_on_overflow */
1813 bfd_elf_generic_reloc, /* special_function */
1814 "R_NDS32_TLS_LE_15S2", /* name */
1815 FALSE, /* partial_inplace */
1816 0x7fff, /* src_mask */
1817 0x7fff, /* dst_mask */
1818 FALSE), /* pcrel_offset */
1819
1820 /* Relax hint for unconditional call sequence */
1821 HOWTO (R_NDS32_LONGCALL4, /* type */
1822 0, /* rightshift */
1823 2, /* size (0 = byte, 1 = short, 2 = long) */
1824 32, /* bitsize */
1825 FALSE, /* pc_relative */
1826 0, /* bitpos */
1827 complain_overflow_dont, /* complain_on_overflow */
1828 nds32_elf_ignore_reloc, /* special_function */
1829 "R_NDS32_LONGCALL4", /* name */
1830 FALSE, /* partial_inplace */
1831 0xffffffff, /* src_mask */
1832 0xffffffff, /* dst_mask */
1833 FALSE), /* pcrel_offset */
1834
1835 /* Relax hint for conditional call sequence. */
1836 HOWTO (R_NDS32_LONGCALL5, /* type */
1837 0, /* rightshift */
1838 2, /* size (0 = byte, 1 = short, 2 = long) */
1839 32, /* bitsize */
1840 FALSE, /* pc_relative */
1841 0, /* bitpos */
1842 complain_overflow_dont, /* complain_on_overflow */
1843 nds32_elf_ignore_reloc, /* special_function */
1844 "R_NDS32_LONGCALL5", /* name */
1845 FALSE, /* partial_inplace */
1846 0xffffffff, /* src_mask */
1847 0xffffffff, /* dst_mask */
1848 FALSE), /* pcrel_offset */
1849
1850 /* Relax hint for conditional call sequence. */
1851 HOWTO (R_NDS32_LONGCALL6, /* type */
1852 0, /* rightshift */
1853 2, /* size (0 = byte, 1 = short, 2 = long) */
1854 32, /* bitsize */
1855 FALSE, /* pc_relative */
1856 0, /* bitpos */
1857 complain_overflow_dont, /* complain_on_overflow */
1858 nds32_elf_ignore_reloc, /* special_function */
1859 "R_NDS32_LONGCALL6", /* name */
1860 FALSE, /* partial_inplace */
1861 0xffffffff, /* src_mask */
1862 0xffffffff, /* dst_mask */
1863 FALSE), /* pcrel_offset */
1864
1865 /* Relax hint for unconditional branch sequence. */
1866 HOWTO (R_NDS32_LONGJUMP4, /* type */
1867 0, /* rightshift */
1868 2, /* size (0 = byte, 1 = short, 2 = long) */
1869 32, /* bitsize */
1870 FALSE, /* pc_relative */
1871 0, /* bitpos */
1872 complain_overflow_dont, /* complain_on_overflow */
1873 nds32_elf_ignore_reloc, /* special_function */
1874 "R_NDS32_LONGJUMP4", /* name */
1875 FALSE, /* partial_inplace */
1876 0xffffffff, /* src_mask */
1877 0xffffffff, /* dst_mask */
1878 FALSE), /* pcrel_offset */
1879
1880 /* Relax hint for conditional branch sequence. */
1881 HOWTO (R_NDS32_LONGJUMP5, /* type */
1882 0, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 32, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_dont, /* complain_on_overflow */
1888 nds32_elf_ignore_reloc, /* special_function */
1889 "R_NDS32_LONGJUMP5", /* name */
1890 FALSE, /* partial_inplace */
1891 0xffffffff, /* src_mask */
1892 0xffffffff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for conditional branch sequence. */
1896 HOWTO (R_NDS32_LONGJUMP6, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGJUMP6", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional branch sequence. */
1911 HOWTO (R_NDS32_LONGJUMP7, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGJUMP7", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
35c08157
KLC		 1924};
1925
1926/* Relocations used for relaxation. */
1927static reloc_howto_type nds32_elf_relax_howto_table[] =
1928{
1929 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
1930 0, /* rightshift */
1931 2, /* size (0 = byte, 1 = short, 2 = long) */
1932 32, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 nds32_elf_ignore_reloc,/* special_function */
1937 "R_NDS32_RELAX_ENTRY", /* name */
1938 FALSE, /* partial_inplace */
1939 0xffffffff, /* src_mask */
1940 0xffffffff, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942 HOWTO (R_NDS32_GOT_SUFF, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont,/* complain_on_overflow */
1949 nds32_elf_ignore_reloc,/* special_function */
1950 "R_NDS32_GOT_SUFF", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
1956 0, /* rightshift */
1957 2, /* size (0 = byte, 1 = short, 2 = long) */
1958 32, /* bitsize */
1959 FALSE, /* pc_relative */
1960 0, /* bitpos */
1961 complain_overflow_bitfield, /* complain_on_overflow */
1962 nds32_elf_ignore_reloc,/* special_function */
1963 "R_NDS32_GOTOFF_SUFF", /* name */
1964 FALSE, /* partial_inplace */
1965 0xffffffff, /* src_mask */
1966 0xffffffff, /* dst_mask */
1967 FALSE), /* pcrel_offset */
1968 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
1969 0, /* rightshift */
1970 2, /* size (0 = byte, 1 = short, 2 = long) */
1971 32, /* bitsize */
1972 FALSE, /* pc_relative */
1973 0, /* bitpos */
1974 complain_overflow_dont,/* complain_on_overflow */
1975 nds32_elf_ignore_reloc,/* special_function */
1976 "R_NDS32_PLT_GOT_SUFF",/* name */
1977 FALSE, /* partial_inplace */
1978 0xffffffff, /* src_mask */
1979 0xffffffff, /* dst_mask */
1980 FALSE), /* pcrel_offset */
1981 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
1982 0, /* rightshift */
1983 2, /* size (0 = byte, 1 = short, 2 = long) */
1984 32, /* bitsize */
1985 FALSE, /* pc_relative */
1986 0, /* bitpos */
1987 complain_overflow_dont,/* complain_on_overflow */
1988 nds32_elf_ignore_reloc,/* special_function */
1989 "R_NDS32_MULCALL_SUFF",/* name */
1990 FALSE, /* partial_inplace */
1991 0xffffffff, /* src_mask */
1992 0xffffffff, /* dst_mask */
1993 FALSE), /* pcrel_offset */
1994 HOWTO (R_NDS32_PTR, /* type */
1995 0, /* rightshift */
1996 2, /* size (0 = byte, 1 = short, 2 = long) */
1997 32, /* bitsize */
1998 FALSE, /* pc_relative */
1999 0, /* bitpos */
2000 complain_overflow_dont,/* complain_on_overflow */
2001 nds32_elf_ignore_reloc,/* special_function */
2002 "R_NDS32_PTR", /* name */
2003 FALSE, /* partial_inplace */
2004 0xffffffff, /* src_mask */
2005 0xffffffff, /* dst_mask */
2006 FALSE), /* pcrel_offset */
2007 HOWTO (R_NDS32_PTR_COUNT, /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 32, /* bitsize */
2011 FALSE, /* pc_relative */
2012 0, /* bitpos */
2013 complain_overflow_dont,/* complain_on_overflow */
2014 nds32_elf_ignore_reloc,/* special_function */
2015 "R_NDS32_PTR_COUNT", /* name */
2016 FALSE, /* partial_inplace */
2017 0xffffffff, /* src_mask */
2018 0xffffffff, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2021 0, /* rightshift */
2022 2, /* size (0 = byte, 1 = short, 2 = long) */
2023 32, /* bitsize */
2024 FALSE, /* pc_relative */
2025 0, /* bitpos */
2026 complain_overflow_dont,/* complain_on_overflow */
2027 nds32_elf_ignore_reloc,/* special_function */
2028 "R_NDS32_PTR_RESOLVED",/* name */
2029 FALSE, /* partial_inplace */
2030 0xffffffff, /* src_mask */
2031 0xffffffff, /* dst_mask */
2032 FALSE), /* pcrel_offset */
2033 HOWTO (R_NDS32_PLTBLOCK, /* type */
2034 0, /* rightshift */
2035 2, /* size (0 = byte, 1 = short, 2 = long) */
2036 32, /* bitsize */
2037 FALSE, /* pc_relative */
2038 0, /* bitpos */
2039 complain_overflow_dont,/* complain_on_overflow */
2040 nds32_elf_ignore_reloc,/* special_function */
2041 "R_NDS32_PLTBLOCK", /* name */
2042 FALSE, /* partial_inplace */
2043 0xffffffff, /* src_mask */
2044 0xffffffff, /* dst_mask */
2045 FALSE), /* pcrel_offset */
2046 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2047 0, /* rightshift */
2048 2, /* size (0 = byte, 1 = short, 2 = long) */
2049 32, /* bitsize */
2050 FALSE, /* pc_relative */
2051 0, /* bitpos */
2052 complain_overflow_dont,/* complain_on_overflow */
2053 nds32_elf_ignore_reloc,/* special_function */
2054 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2055 FALSE, /* partial_inplace */
2056 0xffffffff, /* src_mask */
2057 0xffffffff, /* dst_mask */
2058 FALSE), /* pcrel_offset */
2059 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2060 0, /* rightshift */
2061 2, /* size (0 = byte, 1 = short, 2 = long) */
2062 32, /* bitsize */
2063 FALSE, /* pc_relative */
2064 0, /* bitpos */
2065 complain_overflow_dont,/* complain_on_overflow */
2066 nds32_elf_ignore_reloc,/* special_function */
2067 "R_NDS32_RELAX_REGION_END", /* name */
2068 FALSE, /* partial_inplace */
2069 0xffffffff, /* src_mask */
2070 0xffffffff, /* dst_mask */
2071 FALSE), /* pcrel_offset */
2072 HOWTO (R_NDS32_MINUEND, /* type */
2073 0, /* rightshift */
2074 2, /* size (0 = byte, 1 = short, 2 = long) */
2075 32, /* bitsize */
2076 FALSE, /* pc_relative */
2077 0, /* bitpos */
2078 complain_overflow_dont,/* complain_on_overflow */
2079 nds32_elf_ignore_reloc,/* special_function */
2080 "R_NDS32_MINUEND", /* name */
2081 FALSE, /* partial_inplace */
2082 0xffffffff, /* src_mask */
2083 0xffffffff, /* dst_mask */
2084 FALSE), /* pcrel_offset */
2085 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2086 0, /* rightshift */
2087 2, /* size (0 = byte, 1 = short, 2 = long) */
2088 32, /* bitsize */
2089 FALSE, /* pc_relative */
2090 0, /* bitpos */
2091 complain_overflow_dont,/* complain_on_overflow */
2092 nds32_elf_ignore_reloc,/* special_function */
2093 "R_NDS32_SUBTRAHEND", /* name */
2094 FALSE, /* partial_inplace */
2095 0xffffffff, /* src_mask */
2096 0xffffffff, /* dst_mask */
2097 FALSE), /* pcrel_offset */
2098 HOWTO (R_NDS32_DIFF8, /* type */
2099 0, /* rightshift */
2100 0, /* size (0 = byte, 1 = short, 2 = long) */
2101 8, /* bitsize */
2102 FALSE, /* pc_relative */
2103 0, /* bitpos */
2104 complain_overflow_dont,/* complain_on_overflow */
2105 nds32_elf_ignore_reloc,/* special_function */
2106 "R_NDS32_DIFF8", /* name */
2107 FALSE, /* partial_inplace */
2108 0x000000ff, /* src_mask */
2109 0x000000ff, /* dst_mask */
2110 FALSE), /* pcrel_offset */
2111 HOWTO (R_NDS32_DIFF16, /* type */
2112 0, /* rightshift */
2113 1, /* size (0 = byte, 1 = short, 2 = long) */
2114 16, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
2117 complain_overflow_dont,/* complain_on_overflow */
2118 nds32_elf_ignore_reloc,/* special_function */
2119 "R_NDS32_DIFF16", /* name */
2120 FALSE, /* partial_inplace */
2121 0x0000ffff, /* src_mask */
2122 0x0000ffff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124 HOWTO (R_NDS32_DIFF32, /* type */
2125 0, /* rightshift */
2126 2, /* size (0 = byte, 1 = short, 2 = long) */
2127 32, /* bitsize */
2128 FALSE, /* pc_relative */
2129 0, /* bitpos */
2130 complain_overflow_dont,/* complain_on_overflow */
2131 nds32_elf_ignore_reloc,/* special_function */
2132 "R_NDS32_DIFF32", /* name */
2133 FALSE, /* partial_inplace */
2134 0xffffffff, /* src_mask */
2135 0xffffffff, /* dst_mask */
2136 FALSE), /* pcrel_offset */
2137 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2138 0, /* rightshift */
2139 0, /* size (0 = byte, 1 = short, 2 = long) */
2140 0, /* bitsize */
2141 FALSE, /* pc_relative */
2142 0, /* bitpos */
2143 complain_overflow_dont,/* complain_on_overflow */
2144 nds32_elf_ignore_reloc,/* special_function */
2145 "R_NDS32_DIFF_ULEB128",/* name */
2146 FALSE, /* partial_inplace */
2147 0xffffffff, /* src_mask */
2148 0xffffffff, /* dst_mask */
2149 FALSE), /* pcrel_offset */
2150 HOWTO (R_NDS32_DATA, /* type */
2151 0, /* rightshift */
2152 2, /* size (0 = byte, 1 = short, 2 = long) */
2153 32, /* bitsize */
2154 FALSE, /* pc_relative */
2155 0, /* bitpos */
2156 complain_overflow_dont,/* complain_on_overflow */
2157 nds32_elf_ignore_reloc,/* special_function */
2158 "R_NDS32_DATA", /* name */
2159 FALSE, /* partial_inplace */
2160 0xffffffff, /* src_mask */
2161 0xffffffff, /* dst_mask */
2162 FALSE), /* pcrel_offset */
2163 HOWTO (R_NDS32_TRAN, /* type */
2164 0, /* rightshift */
2165 2, /* size (0 = byte, 1 = short, 2 = long) */
2166 32, /* bitsize */
2167 FALSE, /* pc_relative */
2168 0, /* bitpos */
2169 complain_overflow_dont,/* complain_on_overflow */
2170 nds32_elf_ignore_reloc,/* special_function */
2171 "R_NDS32_TRAN", /* name */
2172 FALSE, /* partial_inplace */
2173 0xffffffff, /* src_mask */
2174 0xffffffff, /* dst_mask */
2175 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2176 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2177 0, /* rightshift */
2178 2, /* size (0 = byte, 1 = short, 2 = long) */
2179 32, /* bitsize */
2180 FALSE, /* pc_relative */
2181 0, /* bitpos */
2182 complain_overflow_dont, /* complain_on_overflow */
2183 nds32_elf_ignore_reloc, /* special_function */
2184 "R_NDS32_TLS_LE_ADD", /* name */
2185 FALSE, /* partial_inplace */
2186 0xffffffff, /* src_mask */
2187 0xffffffff, /* dst_mask */
2188 FALSE), /* pcrel_offset */
2189 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2190 0, /* rightshift */
2191 2, /* size (0 = byte, 1 = short, 2 = long) */
2192 32, /* bitsize */
2193 FALSE, /* pc_relative */
2194 0, /* bitpos */
2195 complain_overflow_dont, /* complain_on_overflow */
2196 nds32_elf_ignore_reloc, /* special_function */
2197 "R_NDS32_TLS_LE_LS", /* name */
2198 FALSE, /* partial_inplace */
2199 0xffffffff, /* src_mask */
2200 0xffffffff, /* dst_mask */
2201 FALSE), /* pcrel_offset */
2202 HOWTO (R_NDS32_EMPTY, /* type */
2203 0, /* rightshift */
2204 2, /* size (0 = byte, 1 = short, 2 = long) */
2205 32, /* bitsize */
2206 FALSE, /* pc_relative */
2207 0, /* bitpos */
2208 complain_overflow_dont, /* complain_on_overflow */
2209 nds32_elf_ignore_reloc, /* special_function */
2210 "R_NDS32_EMPTY", /* name */
2211 FALSE, /* partial_inplace */
2212 0xffffffff, /* src_mask */
2213 0xffffffff, /* dst_mask */
2214 FALSE), /* pcrel_offset */
35c08157
KLC		 2215};
2216
2217\f
2218/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2219 This prototype is the same as qsort (). */
2220
2221void
2222nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2223 int (*compar) (const void *lhs, const void *rhs))
2224{
2225 char *ptr = (char *) base;
1c8f6a4d 2226 int i, j;
e1fa0163 2227 char *tmp = xmalloc (size);
35c08157
KLC		 2228
2229 /* If i is less than j, i is inserted before j.
2230
2231 |---- j ----- i --------------|
2232 \ / \ /
2233 sorted unsorted
2234 */
2235
1c8f6a4d 2236 for (i = 1; i < (int) nmemb; i++)
35c08157 2237 {
1c8f6a4d
KLC		 2238 for (j = (i - 1); j >= 0; j--)
2239 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2240 break;
2241
1c8f6a4d
KLC		 2242 j++;
2243
35c08157 2244 if (i == j)
1c8f6a4d 2245 continue; /* i is in order. */
35c08157
KLC		 2246
2247 memcpy (tmp, ptr + i * size, size);
2248 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2249 memcpy (ptr + j * size, tmp, size);
2250 }
e1fa0163 2251 free (tmp);
35c08157
KLC		 2252}
2253
2254/* Sort relocation by r_offset.
2255
2256 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2257 algorithm. Relocations at the same r_offset must keep their order.
2258 For example, RELAX_ENTRY must be the very first relocation entry.
2259
2260 Currently, this function implements insertion-sort.
2261
2262 FIXME: If we already sort them in assembler, why bother sort them
2263 here again? */
2264
2265static int
2266compar_reloc (const void *lhs, const void *rhs)
2267{
2268 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2269 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2270
2271 if (l->r_offset > r->r_offset)
2272 return 1;
2273 else if (l->r_offset == r->r_offset)
2274 return 0;
2275 else
2276 return -1;
2277}
2278
2279/* Functions listed below are only used for old relocs.
2280 * nds32_elf_9_pcrel_reloc
2281 * nds32_elf_do_9_pcrel_reloc
2282 * nds32_elf_hi20_reloc
2283 * nds32_elf_relocate_hi20
2284 * nds32_elf_lo12_reloc
2285 * nds32_elf_sda15_reloc
2286 * nds32_elf_generic_reloc
2287 */
2288
2289/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2290
2291static bfd_reloc_status_type
2292nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2293 void *data, asection *input_section, bfd *output_bfd,
2294 char **error_message ATTRIBUTE_UNUSED)
2295{
2296 /* This part is from bfd_elf_generic_reloc. */
2297 if (output_bfd != (bfd *) NULL
2298 && (symbol->flags & BSF_SECTION_SYM) == 0
2299 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2300 {
2301 reloc_entry->address += input_section->output_offset;
2302 return bfd_reloc_ok;
2303 }
2304
2305 if (output_bfd != NULL)
2306 {
2307 /* FIXME: See bfd_perform_relocation. Is this right? */
2308 return bfd_reloc_continue;
2309 }
2310
2311 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2312 input_section,
2313 data, reloc_entry->address,
2314 symbol->section,
2315 (symbol->value
2316 + symbol->section->output_section->vma
2317 + symbol->section->output_offset),
2318 reloc_entry->addend);
2319}
2320
2321/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2322#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2323
2324static bfd_reloc_status_type
2325nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2326 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2327 bfd_vma offset,
2328 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2329 bfd_vma symbol_value, bfd_vma addend)
2330{
2331 bfd_signed_vma relocation;
2332 unsigned short x;
2333 bfd_reloc_status_type status;
2334
2335 /* Sanity check the address (offset in section). */
2336 if (offset > bfd_get_section_limit (abfd, input_section))
2337 return bfd_reloc_outofrange;
2338
2339 relocation = symbol_value + addend;
2340 /* Make it pc relative. */
2341 relocation -= (input_section->output_section->vma
2342 + input_section->output_offset);
2343 /* These jumps mask off the lower two bits of the current address
2344 before doing pcrel calculations. */
2345 relocation -= (offset & -(bfd_vma) 2);
2346
1c8f6a4d 2347 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2348 status = bfd_reloc_overflow;
2349 else
2350 status = bfd_reloc_ok;
2351
2352 x = bfd_getb16 (data + offset);
2353
2354 relocation >>= howto->rightshift;
2355 relocation <<= howto->bitpos;
2356 x = (x & ~howto->dst_mask)
2357 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2358
2359 bfd_putb16 ((bfd_vma) x, data + offset);
2360
2361 return status;
2362}
2363
2364/* Handle the R_NDS32_HI20_[SU]LO relocs.
2365 HI20_SLO is for the add3 and load/store with displacement instructions.
2366 HI20 is for the or3 instruction.
2367 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2368 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2369 we must add one to the high 16 bytes (which will get subtracted off when
2370 the low 16 bits are added).
2371 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2372 because there is a carry from the LO12 to the HI20. Here we just save
2373 the information we need; we do the actual relocation when we see the LO12.
2374 This code is copied from the elf32-mips.c. We also support an arbitrary
2375 number of HI20 relocs to be associated with a single LO12 reloc. The
2376 assembler sorts the relocs to ensure each HI20 immediately precedes its
2377 LO12. However if there are multiple copies, the assembler may not find
2378 the real LO12 so it picks the first one it finds. */
2379
2380struct nds32_hi20
2381{
2382 struct nds32_hi20 *next;
2383 bfd_byte *addr;
2384 bfd_vma addend;
2385};
2386
2387static struct nds32_hi20 *nds32_hi20_list;
2388
2389static bfd_reloc_status_type
2390nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2391 asymbol *symbol, void *data, asection *input_section,
2392 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2393{
2394 bfd_reloc_status_type ret;
2395 bfd_vma relocation;
2396 struct nds32_hi20 *n;
2397
2398 /* This part is from bfd_elf_generic_reloc.
2399 If we're relocating, and this an external symbol, we don't want
2400 to change anything. */
2401 if (output_bfd != (bfd *) NULL
2402 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2403 {
2404 reloc_entry->address += input_section->output_offset;
2405 return bfd_reloc_ok;
2406 }
2407
2408 /* Sanity check the address (offset in section). */
2409 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2410 return bfd_reloc_outofrange;
2411
2412 ret = bfd_reloc_ok;
2413 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2414 ret = bfd_reloc_undefined;
2415
2416 if (bfd_is_com_section (symbol->section))
2417 relocation = 0;
2418 else
2419 relocation = symbol->value;
2420
2421 relocation += symbol->section->output_section->vma;
2422 relocation += symbol->section->output_offset;
2423 relocation += reloc_entry->addend;
2424
2425 /* Save the information, and let LO12 do the actual relocation. */
2426 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2427 if (n == NULL)
2428 return bfd_reloc_outofrange;
2429
2430 n->addr = (bfd_byte *) data + reloc_entry->address;
2431 n->addend = relocation;
2432 n->next = nds32_hi20_list;
2433 nds32_hi20_list = n;
2434
2435 if (output_bfd != (bfd *) NULL)
2436 reloc_entry->address += input_section->output_offset;
2437
2438 return ret;
2439}
2440
2441/* Handle an NDS32 ELF HI20 reloc. */
2442
2443static void
2444nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2445 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2446 Elf_Internal_Rela *rello, bfd_byte *contents,
2447 bfd_vma addend)
2448{
2449 unsigned long insn;
2450 bfd_vma addlo;
2451
2452 insn = bfd_getb32 (contents + relhi->r_offset);
2453
2454 addlo = bfd_getb32 (contents + rello->r_offset);
2455 addlo &= 0xfff;
2456
2457 addend += ((insn & 0xfffff) << 20) + addlo;
2458
2459 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2460 bfd_putb32 (insn, contents + relhi->r_offset);
2461}
2462
2463/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2464 inplace relocation; this function exists in order to do the
2465 R_NDS32_HI20_[SU]LO relocation described above. */
2466
2467static bfd_reloc_status_type
2468nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2469 void *data, asection *input_section, bfd *output_bfd,
2470 char **error_message)
2471{
2472 /* This part is from bfd_elf_generic_reloc.
2473 If we're relocating, and this an external symbol, we don't want
2474 to change anything. */
2475 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2476 && reloc_entry->addend == 0)
2477 {
2478 reloc_entry->address += input_section->output_offset;
2479 return bfd_reloc_ok;
2480 }
2481
2482 if (nds32_hi20_list != NULL)
2483 {
2484 struct nds32_hi20 *l;
2485
2486 l = nds32_hi20_list;
2487 while (l != NULL)
2488 {
2489 unsigned long insn;
2490 unsigned long val;
2491 unsigned long vallo;
2492 struct nds32_hi20 *next;
2493
2494 /* Do the HI20 relocation. Note that we actually don't need
2495 to know anything about the LO12 itself, except where to
2496 find the low 12 bits of the addend needed by the LO12. */
2497 insn = bfd_getb32 (l->addr);
2498 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2499 vallo &= 0xfff;
2500 switch (reloc_entry->howto->type)
2501 {
2502 case R_NDS32_LO12S3:
2503 vallo <<= 3;
2504 break;
2505
2506 case R_NDS32_LO12S2:
2507 vallo <<= 2;
2508 break;
2509
2510 case R_NDS32_LO12S1:
2511 vallo <<= 1;
2512 break;
2513
2514 case R_NDS32_LO12S0:
2515 vallo <<= 0;
2516 break;
2517 }
2518
2519 val = ((insn & 0xfffff) << 12) + vallo;
2520 val += l->addend;
2521
2522 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2523 bfd_putb32 ((bfd_vma) insn, l->addr);
2524
2525 next = l->next;
2526 free (l);
2527 l = next;
2528 }
2529
2530 nds32_hi20_list = NULL;
2531 }
2532
2533 /* Now do the LO12 reloc in the usual way.
2534 ??? It would be nice to call bfd_elf_generic_reloc here,
2535 but we have partial_inplace set. bfd_elf_generic_reloc will
2536 pass the handling back to bfd_install_relocation which will install
2537 a section relative addend which is wrong. */
2538 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2539 input_section, output_bfd, error_message);
2540}
2541
2542/* Do generic partial_inplace relocation.
2543 This is a local replacement for bfd_elf_generic_reloc. */
2544
2545static bfd_reloc_status_type
2546nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2547 asymbol *symbol, void *data, asection *input_section,
2548 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2549{
2550 bfd_reloc_status_type ret;
2551 bfd_vma relocation;
2552 bfd_byte *inplace_address;
2553
2554 /* This part is from bfd_elf_generic_reloc.
2555 If we're relocating, and this an external symbol, we don't want
2556 to change anything. */
2557 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2558 && reloc_entry->addend == 0)
2559 {
2560 reloc_entry->address += input_section->output_offset;
2561 return bfd_reloc_ok;
2562 }
2563
2564 /* Now do the reloc in the usual way.
2565 ??? It would be nice to call bfd_elf_generic_reloc here,
2566 but we have partial_inplace set. bfd_elf_generic_reloc will
2567 pass the handling back to bfd_install_relocation which will install
2568 a section relative addend which is wrong. */
2569
2570 /* Sanity check the address (offset in section). */
2571 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2572 return bfd_reloc_outofrange;
2573
2574 ret = bfd_reloc_ok;
2575 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2576 ret = bfd_reloc_undefined;
2577
2578 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2579 relocation = 0;
2580 else
2581 relocation = symbol->value;
2582
2583 /* Only do this for a final link. */
2584 if (output_bfd == (bfd *) NULL)
2585 {
2586 relocation += symbol->section->output_section->vma;
2587 relocation += symbol->section->output_offset;
2588 }
2589
2590 relocation += reloc_entry->addend;
2591 switch (reloc_entry->howto->type)
2592 {
2593 case R_NDS32_LO12S3:
2594 relocation >>= 3;
2595 break;
2596
2597 case R_NDS32_LO12S2:
2598 relocation >>= 2;
2599 break;
2600
2601 case R_NDS32_LO12S1:
2602 relocation >>= 1;
2603 break;
2604
2605 case R_NDS32_LO12S0:
2606 default:
2607 relocation >>= 0;
2608 break;
2609 }
2610
2611 inplace_address = (bfd_byte *) data + reloc_entry->address;
2612
2613#define DOIT(x) \
2614 x = ((x & ~reloc_entry->howto->dst_mask) | \
2615 (((x & reloc_entry->howto->src_mask) + relocation) & \
2616 reloc_entry->howto->dst_mask))
2617
2618 switch (reloc_entry->howto->size)
2619 {
2620 case 1:
2621 {
2622 short x = bfd_getb16 (inplace_address);
2623
2624 DOIT (x);
2625 bfd_putb16 ((bfd_vma) x, inplace_address);
2626 }
2627 break;
2628 case 2:
2629 {
2630 unsigned long x = bfd_getb32 (inplace_address);
2631
2632 DOIT (x);
2633 bfd_putb32 ((bfd_vma) x, inplace_address);
2634 }
2635 break;
2636 default:
2637 BFD_ASSERT (0);
2638 }
2639
2640 if (output_bfd != (bfd *) NULL)
2641 reloc_entry->address += input_section->output_offset;
2642
2643 return ret;
2644}
2645
2646/* Handle the R_NDS32_SDA15 reloc.
2647 This reloc is used to compute the address of objects in the small data area
2648 and to perform loads and stores from that area.
2649 The lower 15 bits are sign extended and added to the register specified
2650 in the instruction, which is assumed to point to _SDA_BASE_.
2651
2652 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2653 the access size, this must be taken care of. */
2654
2655static bfd_reloc_status_type
2656nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2657 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2658 asection *input_section, bfd *output_bfd,
2659 char **error_message ATTRIBUTE_UNUSED)
2660{
2661 /* This part is from bfd_elf_generic_reloc. */
2662 if (output_bfd != (bfd *) NULL
2663 && (symbol->flags & BSF_SECTION_SYM) == 0
2664 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2665 {
2666 reloc_entry->address += input_section->output_offset;
2667 return bfd_reloc_ok;
2668 }
2669
2670 if (output_bfd != NULL)
2671 {
2672 /* FIXME: See bfd_perform_relocation. Is this right? */
2673 return bfd_reloc_continue;
2674 }
2675
2676 /* FIXME: not sure what to do here yet. But then again, the linker
2677 may never call us. */
2678 abort ();
2679}
2680
2681/* nds32_elf_ignore_reloc is the special function for
2682 relocation types which don't need to be relocated
2683 like relaxation relocation types.
2684 This function simply return bfd_reloc_ok when it is
2685 invoked. */
2686
2687static bfd_reloc_status_type
2688nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2689 asymbol *symbol ATTRIBUTE_UNUSED,
2690 void *data ATTRIBUTE_UNUSED, asection *input_section,
2691 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2692{
2693 if (output_bfd != NULL)
2694 reloc_entry->address += input_section->output_offset;
2695
2696 return bfd_reloc_ok;
2697}
2698\f
2699
2700/* Map BFD reloc types to NDS32 ELF reloc types. */
2701
2702struct nds32_reloc_map_entry
2703{
2704 bfd_reloc_code_real_type bfd_reloc_val;
2705 unsigned char elf_reloc_val;
2706};
2707
2708static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2709{
2710 {BFD_RELOC_NONE, R_NDS32_NONE},
2711 {BFD_RELOC_16, R_NDS32_16_RELA},
2712 {BFD_RELOC_32, R_NDS32_32_RELA},
2713 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2714 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2715 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2716 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2717 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2718 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2719 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2720 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2721 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2722 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2723 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2724 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2725 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2726 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2727 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2728 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2729 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2730 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2731 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2732 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2733
2734 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2735 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2736 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2737 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2738 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2739 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2740 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2741 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2742 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2743 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2744 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2745 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2746 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2747 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2748 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2749 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2750 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2751 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2752 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2753 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2754 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2755 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2756 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2757 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2758 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2759 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2760 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2761 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2762 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2763 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2764 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2765 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2766 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2767 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2768 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2769 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2770 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2771 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2772 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2773 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2774 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2775 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2776 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2777 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2778 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2779 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2780 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2781 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2782 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2783 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2784 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2785 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2786 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2787 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2788 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2789 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2790 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2791 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2792 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2793 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2794 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2795 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2796 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2797 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2798 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2799 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2800 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2801 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2802 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2803 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2804 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2805 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2806 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2807 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2808 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2809
2810 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2811 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2812 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2813 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2814 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2815 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2816 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2817 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2818 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2819 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2820 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2821 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2822 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2823 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2824 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2825 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2826 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2827 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2828 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2829 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2830};
2831
2832/* Patch tag. */
2833
2834static reloc_howto_type *
2835bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2836 const char *r_name)
2837{
2838 unsigned int i;
2839
2840 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2841 if (nds32_elf_howto_table[i].name != NULL
2842 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2843 return &nds32_elf_howto_table[i];
2844
2845 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2846 if (nds32_elf_relax_howto_table[i].name != NULL
2847 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2848 return &nds32_elf_relax_howto_table[i];
2849
2850 return NULL;
2851}
2852
2853static reloc_howto_type *
2854bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2855{
2856 if (code < R_NDS32_RELAX_ENTRY)
2857 {
2858 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2859 return &nds32_elf_howto_table[code];
2860 }
2861 else
2862 {
2863 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2864 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2865 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2866 }
2867}
2868
2869static reloc_howto_type *
2870bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2871 bfd_reloc_code_real_type code)
2872{
2873 unsigned int i;
2874
2875 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2876 {
2877 if (nds32_reloc_map[i].bfd_reloc_val == code)
2878 return bfd_elf32_bfd_reloc_type_table_lookup
2879 (nds32_reloc_map[i].elf_reloc_val);
2880 }
2881
2882 return NULL;
2883}
2884
2885/* Set the howto pointer for an NDS32 ELF reloc. */
2886
2887static void
2888nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2889 Elf_Internal_Rela *dst)
2890{
2891 enum elf_nds32_reloc_type r_type;
2892
2893 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2894 if (r_type > R_NDS32_GNU_VTENTRY)
2895 {
695344c0 2896 /* xgettext:c-format */
0aa13fee
AM		 2897 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2898 abfd, r_type);
5860e3f8
NC		 2899 r_type = 0;
2900 }
35c08157
KLC		 2901 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2902}
2903
2904static void
2905nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2906 Elf_Internal_Rela *dst)
2907{
2908 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2909 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2910 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2911 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2912}
2913
2914/* Support for core dump NOTE sections.
2915 Reference to include/linux/elfcore.h in Linux. */
2916
2917static bfd_boolean
2918nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2919{
2920 int offset;
2921 size_t size;
2922
2923 switch (note->descsz)
2924 {
2925 case 0x114:
2926 /* Linux/NDS32 32-bit, ABI1 */
2927
2928 /* pr_cursig */
2929 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2930
2931 /* pr_pid */
2932 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2933
2934 /* pr_reg */
2935 offset = 72;
2936 size = 200;
2937 break;
2938
2939 case 0xfc:
2940 /* Linux/NDS32 32-bit */
2941
2942 /* pr_cursig */
2943 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2944
2945 /* pr_pid */
2946 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2947
2948 /* pr_reg */
2949 offset = 72;
2950 size = 176;
2951 break;
2952
2953 default:
2954 return FALSE;
2955 }
2956
2957 /* Make a ".reg" section. */
2958 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2959 size, note->descpos + offset);
2960}
2961
2962static bfd_boolean
2963nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2964{
2965 switch (note->descsz)
2966 {
2967 case 124:
2968 /* Linux/NDS32 */
2969
2970 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
2971 elf_tdata (abfd)->core->program =
2972 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2973 elf_tdata (abfd)->core->command =
2974 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 2975 break;
35c08157
KLC		 2976
2977 default:
2978 return FALSE;
2979 }
2980
2981 /* Note that for some reason, a spurious space is tacked
2982 onto the end of the args in some (at least one anyway)
2983 implementations, so strip it off if it exists. */
2984 {
2985 char *command = elf_tdata (abfd)->core->command;
2986 int n = strlen (command);
2987
2988 if (0 < n && command[n - 1] == ' ')
2989 command[n - 1] = '\0';
2990 }
2991
2992 return TRUE;
2993}
2994
2995/* Hook called by the linker routine which adds symbols from an object
2996 file. We must handle the special NDS32 section numbers here.
2997 We also keep watching for whether we need to create the sdata special
2998 linker sections. */
2999
3000static bfd_boolean
3001nds32_elf_add_symbol_hook (bfd *abfd,
3002 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3003 Elf_Internal_Sym *sym,
3004 const char **namep ATTRIBUTE_UNUSED,
3005 flagword *flagsp ATTRIBUTE_UNUSED,
3006 asection **secp, bfd_vma *valp)
3007{
3008 switch (sym->st_shndx)
3009 {
3010 case SHN_COMMON:
3011 /* Common symbols less than the GP size are automatically
3012 treated as SHN_MIPS_SCOMMON symbols. */
3013 if (sym->st_size > elf_gp_size (abfd)
3014 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3015 break;
3016
3017 /* st_value is the alignemnt constraint.
3018 That might be its actual size if it is an array or structure. */
3019 switch (sym->st_value)
3020 {
3021 case 1:
3022 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3023 break;
3024 case 2:
3025 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3026 break;
3027 case 4:
3028 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3029 break;
3030 case 8:
3031 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3032 break;
3033 default:
3034 return TRUE;
3035 }
3036
3037 (*secp)->flags |= SEC_IS_COMMON;
3038 *valp = sym->st_size;
3039 break;
3040 }
3041
3042 return TRUE;
3043}
3044
3045
3046/* This function can figure out the best location for a base register to access
3047 data relative to this base register
3048 INPUT:
3049 sda_d0: size of first DOUBLE WORD data section
3050 sda_w0: size of first WORD data section
3051 sda_h0: size of first HALF WORD data section
3052 sda_b : size of BYTE data section
3053 sda_hi: size of second HALF WORD data section
3054 sda_w1: size of second WORD data section
3055 sda_d1: size of second DOUBLE WORD data section
3056 OUTPUT:
3057 offset (always positive) from the beginning of sda_d0 if OK
3058 a negative error value if fail
3059 NOTE:
3060 these 7 sections have to be located back to back if exist
3061 a pass in 0 value for non-existing section */
3062
3063/* Due to the interpretation of simm15 field of load/store depending on
3064 data accessing size, the organization of base register relative data shall
3065 like the following figure
3066 -------------------------------------------
3067 | DOUBLE WORD sized data (range +/- 128K)
3068 -------------------------------------------
3069 | WORD sized data (range +/- 64K)
3070 -------------------------------------------
3071 | HALF WORD sized data (range +/- 32K)
3072 -------------------------------------------
3073 | BYTE sized data (range +/- 16K)
3074 -------------------------------------------
3075 | HALF WORD sized data (range +/- 32K)
3076 -------------------------------------------
3077 | WORD sized data (range +/- 64K)
3078 -------------------------------------------
3079 | DOUBLE WORD sized data (range +/- 128K)
3080 -------------------------------------------
3081 Its base register shall be set to access these data freely. */
3082
3083/* We have to figure out the SDA_BASE value, so that we can adjust the
3084 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3085 BFD. If we can't find it, we're stuck. We cache it in the ELF
3086 target data. We don't need to adjust the symbol value for an
3087 external symbol if we are producing relocatable output. */
3088
3089static asection *sda_rela_sec = NULL;
3090
1c8f6a4d 3091#define SDA_SECTION_NUM 10
35c08157
KLC		 3092
3093static bfd_reloc_status_type
3094nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3095 bfd_vma *psb, bfd_boolean add_symbol)
3096{
3097 int relax_fp_as_gp;
3098 struct elf_nds32_link_hash_table *table;
3099 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3100 long unsigned int total = 0;
35c08157
KLC		 3101
3102 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3103 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3104 {
3105 asection *first = NULL, *final = NULL, *temp;
3106 bfd_vma sda_base;
3107 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3108 4 byte-aligned. Therefore, it has to set the first section ".data"
3109 4 byte-aligned. */
3110 static const char sec_name[SDA_SECTION_NUM][10] =
3111 {
3112 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3113 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3114 };
3115 size_t i = 0;
3116
3117 if (output_bfd->sections == NULL)
3118 {
3119 *psb = elf_gp (output_bfd);
3120 return bfd_reloc_ok;
3121 }
3122
3123 /* Get the first and final section. */
1c8f6a4d 3124 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3125 {
3126 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3127 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3128 first = temp;
3129 if (temp && (temp->size != 0 || temp->rawsize != 0))
3130 final = temp;
1c8f6a4d
KLC		 3131
3132 /* Summarize the sections in order to check if joining .bss. */
3133 if (temp && temp->size != 0)
3134 total += temp->size;
3135 else if (temp && temp->rawsize != 0)
3136 total += temp->rawsize;
3137
35c08157
KLC		 3138 i++;
3139 }
3140
1c8f6a4d
KLC		 3141 /* Check .bss size. */
3142 temp = bfd_get_section_by_name (output_bfd, ".bss");
3143 if (temp)
3144 {
3145 if (temp->size != 0)
3146 total += temp->size;
3147 else if (temp->rawsize != 0)
3148 total += temp->rawsize;
3149
3150 if (total < 0x80000)
3151 {
3152 if (!first && (temp->size != 0 || temp->rawsize != 0))
3153 first = temp;
3154 if ((temp->size != 0 || temp->rawsize != 0))
3155 final = temp;
3156 }
3157 }
3158
35c08157
KLC		 3159 if (first && final)
3160 {
3161 /* The middle of data region. */
1c8f6a4d 3162 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3163
3164 /* Find the section sda_base located. */
3165 i = 0;
1c8f6a4d 3166 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3167 {
3168 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3169 if (final && (final->size != 0 || final->rawsize != 0)
3170 && sda_base >= final->vma)
3171 {
3172 first = final;
3173 i++;
3174 }
3175 else
3176 break;
3177 }
3178 }
3179 else
3180 {
3181 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3182 first output section. */
3183 first = output_bfd->sections;
3184 while (first && first->size == 0 && first->rawsize == 0)
3185 first = first->next;
3186 if (!first)
3187 {
3188 *psb = elf_gp (output_bfd);
3189 return bfd_reloc_ok;
3190 }
1c8f6a4d 3191 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3192 }
3193
3194 sda_base -= first->vma;
3195 sda_base = sda_base & (~7);
3196
3197 if (!_bfd_generic_link_add_one_symbol
3198 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3199 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3200 get_elf_backend_data (output_bfd)->collect, &h))
3201 return FALSE;
3202
3203 sda_rela_sec = first;
3204
3205 table = nds32_elf_hash_table (info);
3206 relax_fp_as_gp = table->relax_fp_as_gp;
3207 if (relax_fp_as_gp)
3208 {
3209 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3210 FALSE, FALSE, FALSE);
3211 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3212 And set FP equal to SDA_BASE to do relaxation for
3213 la $fp, _FP_BASE_. */
3214 if (!_bfd_generic_link_add_one_symbol
3215 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3216 first, (bfd_vma) sda_base, (const char *) NULL,
3217 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3218 return FALSE;
3219 }
3220 }
3221
535b785f 3222 if (add_symbol)
35c08157
KLC		 3223 {
3224 if (h)
3225 {
3226 /* Now set gp. */
3227 elf_gp (output_bfd) = (h->u.def.value
3228 + h->u.def.section->output_section->vma
3229 + h->u.def.section->output_offset);
3230 }
3231 else
3232 {
4eca0228 3233 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
35c08157
KLC		 3234 return bfd_reloc_dangerous;
3235 }
3236 }
3237
3238 *psb = h->u.def.value + h->u.def.section->output_section->vma
3239 + h->u.def.section->output_offset;
3240 return bfd_reloc_ok;
3241}
3242\f
3243
3244/* Return size of a PLT entry. */
3245#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3246
3247
3248/* Create an entry in an nds32 ELF linker hash table. */
3249
3250static struct bfd_hash_entry *
3251nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3252 struct bfd_hash_table *table,
3253 const char *string)
3254{
3255 struct elf_nds32_link_hash_entry *ret;
3256
3257 ret = (struct elf_nds32_link_hash_entry *) entry;
3258
3259 /* Allocate the structure if it has not already been allocated by a
3260 subclass. */
3261 if (ret == NULL)
3262 ret = (struct elf_nds32_link_hash_entry *)
3263 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3264
3265 if (ret == NULL)
3266 return (struct bfd_hash_entry *) ret;
3267
3268 /* Call the allocation method of the superclass. */
3269 ret = (struct elf_nds32_link_hash_entry *)
3270 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3271
3272 if (ret != NULL)
3273 {
3274 struct elf_nds32_link_hash_entry *eh;
3275
3276 eh = (struct elf_nds32_link_hash_entry *) ret;
3277 eh->dyn_relocs = NULL;
1c8f6a4d 3278 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3279 }
3280
3281 return (struct bfd_hash_entry *) ret;
3282}
3283
3284/* Create an nds32 ELF linker hash table. */
3285
3286static struct bfd_link_hash_table *
3287nds32_elf_link_hash_table_create (bfd *abfd)
3288{
3289 struct elf_nds32_link_hash_table *ret;
3290
3291 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3292
3293 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3294 if (ret == NULL)
3295 return NULL;
3296
3297 /* patch tag. */
3298 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3299 nds32_elf_link_hash_newfunc,
3300 sizeof (struct elf_nds32_link_hash_entry),
3301 NDS32_ELF_DATA))
3302 {
3303 free (ret);
3304 return NULL;
3305 }
3306
35c08157
KLC		 3307 return &ret->root.root;
3308}
3309
35c08157
KLC		 3310/* Create dynamic sections when linking against a dynamic object. */
3311
3312static bfd_boolean
3313nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3314{
3315 struct elf_nds32_link_hash_table *htab;
3316 flagword flags, pltflags;
3317 register asection *s;
3318 const struct elf_backend_data *bed;
3319 int ptralign = 2; /* 32-bit */
3320
3321 bed = get_elf_backend_data (abfd);
3322
3323 htab = nds32_elf_hash_table (info);
3324
3325 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3326 .rel[a].bss sections. */
3327
3328 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3329 | SEC_LINKER_CREATED);
3330
3331 pltflags = flags;
3332 pltflags |= SEC_CODE;
3333 if (bed->plt_not_loaded)
3334 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3335 if (bed->plt_readonly)
3336 pltflags |= SEC_READONLY;
3337
3338 s = bfd_make_section (abfd, ".plt");
ce558b89 3339 htab->root.splt = s;
35c08157
KLC		 3340 if (s == NULL
3341 || !bfd_set_section_flags (abfd, s, pltflags)
3342 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3343 return FALSE;
3344
3345 if (bed->want_plt_sym)
3346 {
3347 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3348 .plt section. */
3349 struct bfd_link_hash_entry *bh = NULL;
3350 struct elf_link_hash_entry *h;
3351
3352 if (!(_bfd_generic_link_add_one_symbol
3353 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3354 (bfd_vma) 0, (const char *) NULL, FALSE,
3355 get_elf_backend_data (abfd)->collect, &bh)))
3356 return FALSE;
3357
3358 h = (struct elf_link_hash_entry *) bh;
3359 h->def_regular = 1;
3360 h->type = STT_OBJECT;
3361
0e1862bb 3362 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC		 3363 return FALSE;
3364 }
3365
3366 s = bfd_make_section (abfd,
3367 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
ce558b89 3368 htab->root.srelplt = s;
35c08157
KLC		 3369 if (s == NULL
3370 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3371 || !bfd_set_section_alignment (abfd, s, ptralign))
3372 return FALSE;
3373
ce558b89 3374 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
35c08157
KLC		 3375 return FALSE;
3376
3377 {
3378 const char *secname;
3379 char *relname;
3380 flagword secflags;
3381 asection *sec;
3382
3383 for (sec = abfd->sections; sec; sec = sec->next)
3384 {
3385 secflags = bfd_get_section_flags (abfd, sec);
3386 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3387 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3388 continue;
3389 secname = bfd_get_section_name (abfd, sec);
3390 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3391 strcpy (relname, ".rela");
3392 strcat (relname, secname);
3393 if (bfd_get_section_by_name (abfd, secname))
3394 continue;
3395 s = bfd_make_section (abfd, relname);
3396 if (s == NULL
3397 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3398 || !bfd_set_section_alignment (abfd, s, ptralign))
3399 return FALSE;
3400 }
3401 }
3402
3403 if (bed->want_dynbss)
3404 {
3405 /* The .dynbss section is a place to put symbols which are defined
3406 by dynamic objects, are referenced by regular objects, and are
3407 not functions. We must allocate space for them in the process
3408 image and use a R_*_COPY reloc to tell the dynamic linker to
3409 initialize them at run time. The linker script puts the .dynbss
3410 section into the .bss section of the final image. */
3411 s = bfd_make_section (abfd, ".dynbss");
3412 htab->sdynbss = s;
3413 if (s == NULL
3414 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3415 return FALSE;
3416 /* The .rel[a].bss section holds copy relocs. This section is not
3417 normally needed. We need to create it here, though, so that the
3418 linker will map it to an output section. We can't just create it
3419 only if we need it, because we will not know whether we need it
3420 until we have seen all the input files, and the first time the
3421 main linker code calls BFD after examining all the input files
3422 (size_dynamic_sections) the input sections have already been
3423 mapped to the output sections. If the section turns out not to
3424 be needed, we can discard it later. We will never need this
3425 section when generating a shared object, since they do not use
3426 copy relocs. */
0e1862bb 3427 if (!bfd_link_pic (info))
35c08157
KLC		 3428 {
3429 s = bfd_make_section (abfd, (bed->default_use_rela_p
3430 ? ".rela.bss" : ".rel.bss"));
3431 htab->srelbss = s;
3432 if (s == NULL
3433 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3434 || !bfd_set_section_alignment (abfd, s, ptralign))
3435 return FALSE;
3436 }
3437 }
3438
3439 return TRUE;
3440}
3441
3442/* Copy the extra info we tack onto an elf_link_hash_entry. */
3443static void
3444nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3445 struct elf_link_hash_entry *dir,
3446 struct elf_link_hash_entry *ind)
3447{
3448 struct elf_nds32_link_hash_entry *edir, *eind;
3449
3450 edir = (struct elf_nds32_link_hash_entry *) dir;
3451 eind = (struct elf_nds32_link_hash_entry *) ind;
3452
3453 if (eind->dyn_relocs != NULL)
3454 {
3455 if (edir->dyn_relocs != NULL)
3456 {
3bf083ed
AM		 3457 struct elf_dyn_relocs **pp;
3458 struct elf_dyn_relocs *p;
35c08157
KLC		 3459
3460 if (ind->root.type == bfd_link_hash_indirect)
3461 abort ();
3462
3463 /* Add reloc counts against the weak sym to the strong sym
3464 list. Merge any entries against the same section. */
3465 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3466 {
3bf083ed 3467 struct elf_dyn_relocs *q;
35c08157
KLC		 3468
3469 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3470 if (q->sec == p->sec)
3471 {
3472 q->pc_count += p->pc_count;
3473 q->count += p->count;
3474 *pp = p->next;
3475 break;
3476 }
3477 if (q == NULL)
3478 pp = &p->next;
3479 }
3480 *pp = edir->dyn_relocs;
3481 }
3482
3483 edir->dyn_relocs = eind->dyn_relocs;
3484 eind->dyn_relocs = NULL;
3485 }
3486
3487 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3488}
3489\f
63c1f59d
AM		 3490/* Find dynamic relocs for H that apply to read-only sections. */
3491
3492static asection *
3493readonly_dynrelocs (struct elf_link_hash_entry *h)
3494{
3bf083ed 3495 struct elf_dyn_relocs *p;
63c1f59d
AM		 3496
3497 for (p = elf32_nds32_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
3498 {
3499 asection *s = p->sec->output_section;
3500
3501 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3502 return p->sec;
3503 }
3504 return NULL;
3505}
35c08157
KLC		 3506
3507/* Adjust a symbol defined by a dynamic object and referenced by a
3508 regular object. The current definition is in some section of the
3509 dynamic object, but we're not including those sections. We have to
3510 change the definition to something the rest of the link can
3511 understand. */
3512
3513static bfd_boolean
3514nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3515 struct elf_link_hash_entry *h)
3516{
3517 struct elf_nds32_link_hash_table *htab;
35c08157
KLC		 3518 bfd *dynobj;
3519 asection *s;
3520 unsigned int power_of_two;
3521
3522 dynobj = elf_hash_table (info)->dynobj;
3523
3524 /* Make sure we know what is going on here. */
3525 BFD_ASSERT (dynobj != NULL
3526 && (h->needs_plt
60d67dc8 3527 || h->is_weakalias
35c08157
KLC		 3528 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3529
3530
3531 /* If this is a function, put it in the procedure linkage table. We
3532 will fill in the contents of the procedure linkage table later,
3533 when we know the address of the .got section. */
3534 if (h->type == STT_FUNC || h->needs_plt)
3535 {
0e1862bb 3536 if (!bfd_link_pic (info)
35c08157
KLC		 3537 && !h->def_dynamic
3538 && !h->ref_dynamic
3539 && h->root.type != bfd_link_hash_undefweak
3540 && h->root.type != bfd_link_hash_undefined)
3541 {
3542 /* This case can occur if we saw a PLT reloc in an input
3543 file, but the symbol was never referred to by a dynamic
3544 object. In such a case, we don't actually need to build
3545 a procedure linkage table, and we can just do a PCREL
3546 reloc instead. */
3547 h->plt.offset = (bfd_vma) - 1;
3548 h->needs_plt = 0;
3549 }
3550
3551 return TRUE;
3552 }
3553 else
3554 h->plt.offset = (bfd_vma) - 1;
3555
3556 /* If this is a weak symbol, and there is a real definition, the
3557 processor independent code will have arranged for us to see the
3558 real definition first, and we can just use the same value. */
60d67dc8 3559 if (h->is_weakalias)
35c08157 3560 {
60d67dc8
AM		 3561 struct elf_link_hash_entry *def = weakdef (h);
3562 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3563 h->root.u.def.section = def->root.u.def.section;
3564 h->root.u.def.value = def->root.u.def.value;
35c08157
KLC		 3565 return TRUE;
3566 }
3567
3568 /* This is a reference to a symbol defined by a dynamic object which
3569 is not a function. */
3570
3571 /* If we are creating a shared library, we must presume that the
3572 only references to the symbol are via the global offset table.
3573 For such cases we need not do anything here; the relocations will
3574 be handled correctly by relocate_section. */
0e1862bb 3575 if (bfd_link_pic (info))
35c08157
KLC		 3576 return TRUE;
3577
3578 /* If there are no references to this symbol that do not use the
3579 GOT, we don't need to generate a copy reloc. */
3580 if (!h->non_got_ref)
3581 return TRUE;
3582
3583 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 3584 if (0 && info->nocopyreloc)
35c08157
KLC		 3585 {
3586 h->non_got_ref = 0;
3587 return TRUE;
3588 }
3589
3bf083ed
AM		 3590 /* If we don't find any dynamic relocs in read-only sections, then
3591 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
3592 if (0 && !readonly_dynrelocs (h))
35c08157
KLC		 3593 {
3594 h->non_got_ref = 0;
3595 return TRUE;
3596 }
3597
3598 /* We must allocate the symbol in our .dynbss section, which will
3599 become part of the .bss section of the executable. There will be
3600 an entry for this symbol in the .dynsym section. The dynamic
3601 object will contain position independent code, so all references
3602 from the dynamic object to this symbol will go through the global
3603 offset table. The dynamic linker will use the .dynsym entry to
3604 determine the address it must put in the global offset table, so
3605 both the dynamic object and the regular object will refer to the
3606 same memory location for the variable. */
3607
3608 htab = nds32_elf_hash_table (info);
3609 s = htab->sdynbss;
3610 BFD_ASSERT (s != NULL);
3611
3612 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3613 to copy the initial value out of the dynamic object and into the
3614 runtime process image. We need to remember the offset into the
3615 .rela.bss section we are going to use. */
3616 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3617 {
3618 asection *srel;
3619
3620 srel = htab->srelbss;
3621 BFD_ASSERT (srel != NULL);
3622 srel->size += sizeof (Elf32_External_Rela);
3623 h->needs_copy = 1;
3624 }
3625
3626 /* We need to figure out the alignment required for this symbol. I
3627 have no idea how ELF linkers handle this. */
3628 power_of_two = bfd_log2 (h->size);
3629 if (power_of_two > 3)
3630 power_of_two = 3;
3631
3632 /* Apply the required alignment. */
3633 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3634 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3635 {
3636 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3637 return FALSE;
3638 }
3639
3640 /* Define the symbol as being at this point in the section. */
3641 h->root.u.def.section = s;
3642 h->root.u.def.value = s->size;
3643
3644 /* Increment the section size to make room for the symbol. */
3645 s->size += h->size;
3646
3647 return TRUE;
3648}
3649
3650/* Allocate space in .plt, .got and associated reloc sections for
3651 dynamic relocs. */
3652
3653static bfd_boolean
3654allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3655{
3656 struct bfd_link_info *info;
3657 struct elf_nds32_link_hash_table *htab;
3658 struct elf_nds32_link_hash_entry *eh;
3bf083ed 3659 struct elf_dyn_relocs *p;
35c08157
KLC		 3660
3661 if (h->root.type == bfd_link_hash_indirect)
3662 return TRUE;
3663
3664 if (h->root.type == bfd_link_hash_warning)
3665 /* When warning symbols are created, they **replace** the "real"
3666 entry in the hash table, thus we never get to see the real
3667 symbol in a hash traversal. So look at it now. */
3668 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3669
3670 info = (struct bfd_link_info *) inf;
3671 htab = nds32_elf_hash_table (info);
3672
3673 eh = (struct elf_nds32_link_hash_entry *) h;
3674
3675 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3676 {
3677 /* Make sure this symbol is output as a dynamic symbol.
3678 Undefined weak syms won't yet be marked as dynamic. */
3679 if (h->dynindx == -1 && !h->forced_local)
3680 {
3681 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3682 return FALSE;
3683 }
3684
0e1862bb 3685 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 3686 {
ce558b89 3687 asection *s = htab->root.splt;
35c08157
KLC		 3688
3689 /* If this is the first .plt entry, make room for the special
3690 first entry. */
3691 if (s->size == 0)
3692 s->size += PLT_ENTRY_SIZE;
3693
3694 h->plt.offset = s->size;
3695
3696 /* If this symbol is not defined in a regular file, and we are
3697 not generating a shared library, then set the symbol to this
3698 location in the .plt. This is required to make function
3699 pointers compare as equal between the normal executable and
3700 the shared library. */
0e1862bb 3701 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 3702 {
3703 h->root.u.def.section = s;
3704 h->root.u.def.value = h->plt.offset;
3705 }
3706
3707 /* Make room for this entry. */
3708 s->size += PLT_ENTRY_SIZE;
3709
3710 /* We also need to make an entry in the .got.plt section, which
3711 will be placed in the .got section by the linker script. */
ce558b89 3712 htab->root.sgotplt->size += 4;
35c08157
KLC		 3713
3714 /* We also need to make an entry in the .rel.plt section. */
ce558b89 3715 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3716 }
3717 else
3718 {
3719 h->plt.offset = (bfd_vma) - 1;
3720 h->needs_plt = 0;
3721 }
3722 }
3723 else
3724 {
3725 h->plt.offset = (bfd_vma) - 1;
3726 h->needs_plt = 0;
3727 }
3728
3729 if (h->got.refcount > 0)
3730 {
3731 asection *s;
3732 bfd_boolean dyn;
1c8f6a4d 3733 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3734
3735 /* Make sure this symbol is output as a dynamic symbol.
3736 Undefined weak syms won't yet be marked as dynamic. */
3737 if (h->dynindx == -1 && !h->forced_local)
3738 {
3739 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3740 return FALSE;
3741 }
3742
ce558b89 3743 s = htab->root.sgot;
35c08157 3744 h->got.offset = s->size;
1c8f6a4d
KLC		 3745
3746 if (tls_type == GOT_UNKNOWN)
3747 abort ();
3748 else if (tls_type == GOT_NORMAL
3749 || tls_type == GOT_TLS_IE)
3750 /* Need a GOT slot. */
3751 s->size += 4;
3752
35c08157 3753 dyn = htab->root.dynamic_sections_created;
0e1862bb 3754 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
ce558b89 3755 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3756 }
3757 else
3758 h->got.offset = (bfd_vma) - 1;
3759
3760 if (eh->dyn_relocs == NULL)
3761 return TRUE;
3762
3763 /* In the shared -Bsymbolic case, discard space allocated for
3764 dynamic pc-relative relocs against symbols which turn out to be
3765 defined in regular objects. For the normal shared case, discard
3766 space for pc-relative relocs that have become local due to symbol
3767 visibility changes. */
3768
0e1862bb 3769 if (bfd_link_pic (info))
35c08157
KLC		 3770 {
3771 if (h->def_regular && (h->forced_local || info->symbolic))
3772 {
3bf083ed 3773 struct elf_dyn_relocs **pp;
35c08157
KLC		 3774
3775 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3776 {
3777 p->count -= p->pc_count;
3778 p->pc_count = 0;
3779 if (p->count == 0)
3780 *pp = p->next;
3781 else
3782 pp = &p->next;
3783 }
3784 }
3785 }
3786 else
3787 {
3788 /* For the non-shared case, discard space for relocs against
3789 symbols which turn out to need copy relocs or are not dynamic. */
3790
3791 if (!h->non_got_ref
3792 && ((h->def_dynamic
3793 && !h->def_regular)
3794 || (htab->root.dynamic_sections_created
3795 && (h->root.type == bfd_link_hash_undefweak
3796 || h->root.type == bfd_link_hash_undefined))))
3797 {
3798 /* Make sure this symbol is output as a dynamic symbol.
3799 Undefined weak syms won't yet be marked as dynamic. */
3800 if (h->dynindx == -1 && !h->forced_local)
3801 {
3802 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3803 return FALSE;
3804 }
3805
3806 /* If that succeeded, we know we'll be keeping all the
3807 relocs. */
3808 if (h->dynindx != -1)
3809 goto keep;
3810 }
3811
3812 eh->dyn_relocs = NULL;
3813
3814 keep:;
3815 }
3816
3817 /* Finally, allocate space. */
3818 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3819 {
3820 asection *sreloc = elf_section_data (p->sec)->sreloc;
3821 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3822 }
3823
3824 return TRUE;
3825}
3826
63c1f59d
AM		 3827/* Set DF_TEXTREL if we find any dynamic relocs that apply to
3828 read-only sections. */
35c08157
KLC		 3829
3830static bfd_boolean
63c1f59d 3831maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
35c08157 3832{
63c1f59d 3833 asection *sec;
35c08157 3834
63c1f59d
AM		 3835 if (h->root.type == bfd_link_hash_indirect)
3836 return TRUE;
35c08157 3837
63c1f59d
AM		 3838 sec = readonly_dynrelocs (h);
3839 if (sec != NULL)
35c08157 3840 {
63c1f59d 3841 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
35c08157 3842
63c1f59d
AM		 3843 info->flags |= DF_TEXTREL;
3844 info->callbacks->minfo
c1c8c1ef 3845 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
63c1f59d 3846 sec->owner, h->root.root.string, sec);
35c08157 3847
63c1f59d
AM		 3848 /* Not an error, just cut short the traversal. */
3849 return FALSE;
35c08157
KLC		 3850 }
3851 return TRUE;
3852}
3853
3854/* Set the sizes of the dynamic sections. */
3855
3856static bfd_boolean
3857nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3858 struct bfd_link_info *info)
3859{
3860 struct elf_nds32_link_hash_table *htab;
3861 bfd *dynobj;
3862 asection *s;
3863 bfd_boolean relocs;
3864 bfd *ibfd;
3865
3866 htab = nds32_elf_hash_table (info);
3867 dynobj = htab->root.dynobj;
3868 BFD_ASSERT (dynobj != NULL);
3869
3870 if (htab->root.dynamic_sections_created)
3871 {
3872 /* Set the contents of the .interp section to the interpreter. */
f5233a16 3873 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC		 3874 {
3875 s = bfd_get_section_by_name (dynobj, ".interp");
3876 BFD_ASSERT (s != NULL);
3877 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3878 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3879 }
3880 }
3881
3882 /* Set up .got offsets for local syms, and space for local dynamic
3883 relocs. */
c72f2fb2 3884 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3885 {
3886 bfd_signed_vma *local_got;
3887 bfd_signed_vma *end_local_got;
3888 bfd_size_type locsymcount;
3889 Elf_Internal_Shdr *symtab_hdr;
3890 asection *srel;
3891
3892 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3893 continue;
3894
3895 for (s = ibfd->sections; s != NULL; s = s->next)
3896 {
3bf083ed 3897 struct elf_dyn_relocs *p;
35c08157 3898
3bf083ed 3899 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC		 3900 elf_section_data (s)->local_dynrel);
3901 p != NULL; p = p->next)
3902 {
3903 if (!bfd_is_abs_section (p->sec)
3904 && bfd_is_abs_section (p->sec->output_section))
3905 {
3906 /* Input section has been discarded, either because
3907 it is a copy of a linkonce section or due to
3908 linker script /DISCARD/, so we'll be discarding
3909 the relocs too. */
3910 }
3911 else if (p->count != 0)
3912 {
3913 srel = elf_section_data (p->sec)->sreloc;
3914 srel->size += p->count * sizeof (Elf32_External_Rela);
3915 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3916 info->flags |= DF_TEXTREL;
3917 }
3918 }
3919 }
3920
3921 local_got = elf_local_got_refcounts (ibfd);
3922 if (!local_got)
3923 continue;
3924
3925 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3926 locsymcount = symtab_hdr->sh_info;
3927 end_local_got = local_got + locsymcount;
ce558b89
AM		 3928 s = htab->root.sgot;
3929 srel = htab->root.srelgot;
35c08157
KLC		 3930 for (; local_got < end_local_got; ++local_got)
3931 {
3932 if (*local_got > 0)
3933 {
3934 *local_got = s->size;
3935 s->size += 4;
0e1862bb 3936 if (bfd_link_pic (info))
35c08157
KLC		 3937 srel->size += sizeof (Elf32_External_Rela);
3938 }
3939 else
3940 *local_got = (bfd_vma) - 1;
3941 }
3942 }
3943
3944 /* Allocate global sym .plt and .got entries, and space for global
3945 sym dynamic relocs. */
3946 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3947
3948 /* We now have determined the sizes of the various dynamic sections.
3949 Allocate memory for them. */
3950 relocs = FALSE;
3951 for (s = dynobj->sections; s != NULL; s = s->next)
3952 {
3953 if ((s->flags & SEC_LINKER_CREATED) == 0)
3954 continue;
3955
ce558b89 3956 if (s == htab->root.splt)
35c08157
KLC		 3957 {
3958 /* Strip this section if we don't need it; see the
3959 comment below. */
3960 }
ce558b89 3961 else if (s == htab->root.sgot)
35c08157
KLC		 3962 {
3963 got_size += s->size;
3964 }
ce558b89 3965 else if (s == htab->root.sgotplt)
35c08157
KLC		 3966 {
3967 got_size += s->size;
3968 }
3969 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3970 {
ce558b89 3971 if (s->size != 0 && s != htab->root.srelplt)
35c08157
KLC		 3972 relocs = TRUE;
3973
3974 /* We use the reloc_count field as a counter if we need
3975 to copy relocs into the output file. */
3976 s->reloc_count = 0;
3977 }
3978 else
3979 {
3980 /* It's not one of our sections, so don't allocate space. */
3981 continue;
3982 }
3983
3984 if (s->size == 0)
3985 {
3986 /* If we don't need this section, strip it from the
3987 output file. This is mostly to handle .rela.bss and
3988 .rela.plt. We must create both sections in
3989 create_dynamic_sections, because they must be created
3990 before the linker maps input sections to output
3991 sections. The linker does that before
3992 adjust_dynamic_symbol is called, and it is that
3993 function which decides whether anything needs to go
3994 into these sections. */
3995 s->flags |= SEC_EXCLUDE;
3996 continue;
3997 }
3998
3999 /* Allocate memory for the section contents. We use bfd_zalloc
4000 here in case unused entries are not reclaimed before the
4001 section's contents are written out. This should not happen,
4002 but this way if it does, we get a R_NDS32_NONE reloc instead
4003 of garbage. */
4004 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4005 if (s->contents == NULL)
4006 return FALSE;
4007 }
4008
4009
4010 if (htab->root.dynamic_sections_created)
4011 {
4012 /* Add some entries to the .dynamic section. We fill in the
4013 values later, in nds32_elf_finish_dynamic_sections, but we
4014 must add the entries now so that we get the correct size for
4015 the .dynamic section. The DT_DEBUG entry is filled in by the
4016 dynamic linker and used by the debugger. */
4017#define add_dynamic_entry(TAG, VAL) \
4018 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4019
0e1862bb 4020 if (!bfd_link_pic (info))
35c08157
KLC		 4021 {
4022 if (!add_dynamic_entry (DT_DEBUG, 0))
4023 return FALSE;
4024 }
4025
ce558b89 4026 if (htab->root.splt->size != 0)
35c08157
KLC		 4027 {
4028 if (!add_dynamic_entry (DT_PLTGOT, 0)
4029 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4030 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4031 || !add_dynamic_entry (DT_JMPREL, 0))
4032 return FALSE;
4033 }
4034
4035 if (relocs)
4036 {
4037 if (!add_dynamic_entry (DT_RELA, 0)
4038 || !add_dynamic_entry (DT_RELASZ, 0)
4039 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4040 return FALSE;
4041
4042 /* If any dynamic relocs apply to a read-only section,
4043 then we need a DT_TEXTREL entry. */
4044 if ((info->flags & DF_TEXTREL) == 0)
63c1f59d 4045 elf_link_hash_traverse (&htab->root, maybe_set_textrel,
35c08157
KLC		 4046 (void *) info);
4047
4048 if ((info->flags & DF_TEXTREL) != 0)
4049 {
4050 if (!add_dynamic_entry (DT_TEXTREL, 0))
4051 return FALSE;
4052 }
4053 }
4054 }
4055#undef add_dynamic_entry
4056
4057 return TRUE;
4058}
4059
4060static bfd_reloc_status_type
4061nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4062 bfd_vma relocation, bfd_byte *location)
4063{
4064 int size;
4065 bfd_vma x = 0;
4066 bfd_reloc_status_type flag;
4067 unsigned int rightshift = howto->rightshift;
4068 unsigned int bitpos = howto->bitpos;
4069
4070 /* If the size is negative, negate RELOCATION. This isn't very
4071 general. */
4072 if (howto->size < 0)
4073 relocation = -relocation;
4074
4075 /* Get the value we are going to relocate. */
4076 size = bfd_get_reloc_size (howto);
4077 switch (size)
4078 {
4079 default:
35c08157
KLC		 4080 abort ();
4081 break;
6346d5ca
AM		 4082 case 0:
4083 return bfd_reloc_ok;
35c08157
KLC		 4084 case 2:
4085 x = bfd_getb16 (location);
4086 break;
4087 case 4:
4088 x = bfd_getb32 (location);
4089 break;
4090 }
4091
4092 /* Check for overflow. FIXME: We may drop bits during the addition
4093 which we don't check for. We must either check at every single
4094 operation, which would be tedious, or we must do the computations
4095 in a type larger than bfd_vma, which would be inefficient. */
4096 flag = bfd_reloc_ok;
4097 if (howto->complain_on_overflow != complain_overflow_dont)
4098 {
4099 bfd_vma addrmask, fieldmask, signmask, ss;
4100 bfd_vma a, b, sum;
4101
4102 /* Get the values to be added together. For signed and unsigned
4103 relocations, we assume that all values should be truncated to
4104 the size of an address. For bitfields, all the bits matter.
4105 See also bfd_check_overflow. */
4106 fieldmask = N_ONES (howto->bitsize);
4107 signmask = ~fieldmask;
4108 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4109 a = (relocation & addrmask) >> rightshift;
4110 b = (x & howto->src_mask & addrmask) >> bitpos;
4111
4112 switch (howto->complain_on_overflow)
4113 {
4114 case complain_overflow_signed:
4115 /* If any sign bits are set, all sign bits must be set.
4116 That is, A must be a valid negative address after
4117 shifting. */
4118 signmask = ~(fieldmask >> 1);
4119 /* Fall through. */
4120
4121 case complain_overflow_bitfield:
4122 /* Much like the signed check, but for a field one bit
4123 wider. We allow a bitfield to represent numbers in the
4124 range -2**n to 2**n-1, where n is the number of bits in the
4125 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4126 can't overflow, which is exactly what we want. */
4127 ss = a & signmask;
4128 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4129 flag = bfd_reloc_overflow;
4130
4131 /* We only need this next bit of code if the sign bit of B
4132 is below the sign bit of A. This would only happen if
4133 SRC_MASK had fewer bits than BITSIZE. Note that if
4134 SRC_MASK has more bits than BITSIZE, we can get into
4135 trouble; we would need to verify that B is in range, as
4136 we do for A above. */
4137 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4138 ss >>= bitpos;
4139
4140 /* Set all the bits above the sign bit. */
4141 b = (b ^ ss) - ss;
4142
4143 /* Now we can do the addition. */
4144 sum = a + b;
4145
4146 /* See if the result has the correct sign. Bits above the
4147 sign bit are junk now; ignore them. If the sum is
4148 positive, make sure we did not have all negative inputs;
4149 if the sum is negative, make sure we did not have all
4150 positive inputs. The test below looks only at the sign
4151 bits, and it really just
4152 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4153
4154 We mask with addrmask here to explicitly allow an address
4155 wrap-around. The Linux kernel relies on it, and it is
4156 the only way to write assembler code which can run when
4157 loaded at a location 0x80000000 away from the location at
4158 which it is linked. */
4159 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4160 flag = bfd_reloc_overflow;
4161
4162 break;
4163
4164 case complain_overflow_unsigned:
4165 /* Checking for an unsigned overflow is relatively easy:
4166 trim the addresses and add, and trim the result as well.
4167 Overflow is normally indicated when the result does not
4168 fit in the field. However, we also need to consider the
4169 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4170 input is 0x80000000, and bfd_vma is only 32 bits; then we
4171 will get sum == 0, but there is an overflow, since the
4172 inputs did not fit in the field. Instead of doing a
4173 separate test, we can check for this by or-ing in the
4174 operands when testing for the sum overflowing its final
4175 field. */
4176 sum = (a + b) & addrmask;
4177 if ((a | b | sum) & signmask)
4178 flag = bfd_reloc_overflow;
4179 break;
4180
4181 default:
4182 abort ();
4183 }
4184 }
4185
4186 /* Put RELOCATION in the right bits. */
4187 relocation >>= (bfd_vma) rightshift;
4188 relocation <<= (bfd_vma) bitpos;
4189
4190 /* Add RELOCATION to the right bits of X. */
4191 /* FIXME : 090616
4192 Because the relaxation may generate duplicate relocation at one address,
4193 an addition to immediate in the instruction may cause the relocation added
4194 several times.
4195 This bug should be fixed in assembler, but a check is also needed here. */
4196 if (howto->partial_inplace)
4197 x = ((x & ~howto->dst_mask)
4198 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4199 else
4200 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4201
4202
4203 /* Put the relocated value back in the object file. */
4204 switch (size)
4205 {
4206 default:
4207 case 0:
4208 case 1:
4209 case 8:
4210 abort ();
4211 break;
4212 case 2:
4213 bfd_putb16 (x, location);
4214 break;
4215 case 4:
4216 bfd_putb32 (x, location);
4217 break;
4218 }
4219
4220 return flag;
4221}
4222
4223static bfd_reloc_status_type
4224nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4225 asection *input_section, bfd_byte *contents,
4226 bfd_vma address, bfd_vma value, bfd_vma addend)
4227{
4228 bfd_vma relocation;
4229
4230 /* Sanity check the address. */
4231 if (address > bfd_get_section_limit (input_bfd, input_section))
4232 return bfd_reloc_outofrange;
4233
4234 /* This function assumes that we are dealing with a basic relocation
4235 against a symbol. We want to compute the value of the symbol to
4236 relocate to. This is just VALUE, the value of the symbol, plus
4237 ADDEND, any addend associated with the reloc. */
4238 relocation = value + addend;
4239
4240 /* If the relocation is PC relative, we want to set RELOCATION to
4241 the distance between the symbol (currently in RELOCATION) and the
4242 location we are relocating. Some targets (e.g., i386-aout)
4243 arrange for the contents of the section to be the negative of the
4244 offset of the location within the section; for such targets
4245 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4246 simply leave the contents of the section as zero; for such
4247 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4248 need to subtract out the offset of the location within the
4249 section (which is just ADDRESS). */
4250 if (howto->pc_relative)
4251 {
4252 relocation -= (input_section->output_section->vma
4253 + input_section->output_offset);
4254 if (howto->pcrel_offset)
4255 relocation -= address;
4256 }
4257
4258 return nds32_relocate_contents (howto, input_bfd, relocation,
4259 contents + address);
4260}
4261
4262static bfd_boolean
4263nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4264 const char *name,
4265 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4266 asection *input_sec,
4267 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4268{
4269 const char *source;
4270 FILE *sym_ld_script = NULL;
4271 struct elf_nds32_link_hash_table *table;
4272
4273 table = nds32_elf_hash_table (info);
4274 sym_ld_script = table->sym_ld_script;
4275 if (!sym_ld_script)
4276 return TRUE;
4277
4278 if (!h || !name || *name == '\0')
4279 return TRUE;
4280
4281 if (input_sec->flags & SEC_EXCLUDE)
4282 return TRUE;
4283
4284 if (!check_start_export_sym)
4285 {
4286 fprintf (sym_ld_script, "SECTIONS\n{\n");
4287 check_start_export_sym = 1;
4288 }
4289
4290 if (h->root.type == bfd_link_hash_defined
4291 || h->root.type == bfd_link_hash_defweak)
4292 {
4293 if (!h->root.u.def.section->output_section)
4294 return TRUE;
4295
4296 if (bfd_is_const_section (input_sec))
4297 source = input_sec->name;
4298 else
4299 source = input_sec->owner->filename;
4300
4301 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4302 h->root.root.string,
4303 (long) (h->root.u.def.value
4304 + h->root.u.def.section->output_section->vma
4305 + h->root.u.def.section->output_offset), source);
4306 }
4307
4308 return TRUE;
4309}
4310
4311/* Relocate an NDS32/D ELF section.
4312 There is some attempt to make this function usable for many architectures,
4313 both for RELA and REL type relocs, if only to serve as a learning tool.
4314
4315 The RELOCATE_SECTION function is called by the new ELF backend linker
4316 to handle the relocations for a section.
4317
4318 The relocs are always passed as Rela structures; if the section
4319 actually uses Rel structures, the r_addend field will always be
4320 zero.
4321
4322 This function is responsible for adjust the section contents as
4323 necessary, and (if using Rela relocs and generating a
4324 relocatable output file) adjusting the reloc addend as
4325 necessary.
4326
4327 This function does not have to worry about setting the reloc
4328 address or the reloc symbol index.
4329
4330 LOCAL_SYMS is a pointer to the swapped in local symbols.
4331
4332 LOCAL_SECTIONS is an array giving the section in the input file
4333 corresponding to the st_shndx field of each local symbol.
4334
4335 The global hash table entry for the global symbols can be found
4336 via elf_sym_hashes (input_bfd).
4337
4338 When generating relocatable output, this function must handle
4339 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4340 going to be the section symbol corresponding to the output
4341 section, which means that the addend must be adjusted
4342 accordingly. */
4343
1c8f6a4d
KLC		 4344static bfd_vma
4345dtpoff_base (struct bfd_link_info *info)
4346{
4347 /* If tls_sec is NULL, we should have signalled an error already. */
4348 if (elf_hash_table (info)->tls_sec == NULL)
4349 return 0;
4350 return elf_hash_table (info)->tls_sec->vma;
4351}
4352
35c08157 4353static bfd_boolean
07d6d2b8 4354nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
35c08157 4355 struct bfd_link_info * info,
07d6d2b8
AM		 4356 bfd * input_bfd,
4357 asection * input_section,
4358 bfd_byte * contents,
4359 Elf_Internal_Rela * relocs,
4360 Elf_Internal_Sym * local_syms,
4361 asection ** local_sections)
35c08157
KLC		 4362{
4363 Elf_Internal_Shdr *symtab_hdr;
4364 struct elf_link_hash_entry **sym_hashes;
4365 Elf_Internal_Rela *rel, *relend;
4366 bfd_boolean ret = TRUE; /* Assume success. */
4367 int align = 0;
4368 bfd_reloc_status_type r;
4369 const char *errmsg = NULL;
4370 bfd_vma gp;
4371 struct elf_nds32_link_hash_table *htab;
4372 bfd *dynobj;
4373 bfd_vma *local_got_offsets;
4374 asection *sgot, *splt, *sreloc;
4375 bfd_vma high_address;
4376 struct elf_nds32_link_hash_table *table;
4377 int eliminate_gc_relocs;
4378 bfd_vma fpbase_addr;
4379
4380 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4381 sym_hashes = elf_sym_hashes (input_bfd);
4382 htab = nds32_elf_hash_table (info);
4383 high_address = bfd_get_section_limit (input_bfd, input_section);
4384
4385 dynobj = htab->root.dynobj;
4386 local_got_offsets = elf_local_got_offsets (input_bfd);
4387
ce558b89
AM		 4388 sgot = htab->root.sgot;
4389 splt = htab->root.splt;
35c08157
KLC		 4390 sreloc = NULL;
4391
4392 rel = relocs;
4393 relend = relocs + input_section->reloc_count;
4394
4395 table = nds32_elf_hash_table (info);
4396 eliminate_gc_relocs = table->eliminate_gc_relocs;
4397 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4398 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 4399 {
4400 is_SDA_BASE_set = 1;
4401 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4402 if (r != bfd_reloc_ok)
4403 return FALSE;
4404 }
4405
0c4bd9d9
KLC		 4406 if (is_ITB_BASE_set == 0)
4407 {
4408 /* Set the _ITB_BASE_. */
4409 if (!nds32_elf_ex9_itb_base (info))
4410 {
871b3ab2 4411 _bfd_error_handler (_("%pB: error: Cannot set _ITB_BASE_"),
4eca0228 4412 output_bfd);
0c4bd9d9
KLC		 4413 bfd_set_error (bfd_error_bad_value);
4414 }
4415 }
4416
1c8f6a4d
KLC		 4417 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4418 if (!nds32_elf_ifc_reloc ())
4eca0228 4419 _bfd_error_handler (_("error: IFC relocation error."));
1c8f6a4d
KLC		 4420
4421 /* Relocation for .ex9.itable. */
4422 if (table->target_optimize & NDS32_RELAX_EX9_ON
4423 || (table->ex9_import_file && table->update_ex9_table))
4424 nds32_elf_ex9_reloc_jmp (info);
4425
35c08157
KLC		 4426 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4427 the fp value is set as gp, and it has be reverted for instruction
4428 setting fp. */
4429 fpbase_addr = elf_gp (output_bfd);
4430
4431 for (rel = relocs; rel < relend; rel++)
4432 {
4433 enum elf_nds32_reloc_type r_type;
4434 reloc_howto_type *howto = NULL;
4435 unsigned long r_symndx;
4436 struct elf_link_hash_entry *h = NULL;
4437 Elf_Internal_Sym *sym = NULL;
4438 asection *sec;
4439 bfd_vma relocation;
4440
4441 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4442 ensure it's zero (we use REL relocs, not RELA). Therefore this
4443 should be assigning zero to `addend', but for clarity we use
4444 `r_addend'. */
4445
4446 bfd_vma addend = rel->r_addend;
4447 bfd_vma offset = rel->r_offset;
4448
4449 r_type = ELF32_R_TYPE (rel->r_info);
4450 if (r_type >= R_NDS32_max)
4451 {
695344c0 4452 /* xgettext:c-format */
0aa13fee 4453 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 4454 input_bfd, r_type);
35c08157
KLC		 4455 bfd_set_error (bfd_error_bad_value);
4456 ret = FALSE;
4457 continue;
4458 }
4459
4460 if (r_type == R_NDS32_GNU_VTENTRY
4461 || r_type == R_NDS32_GNU_VTINHERIT
4462 || r_type == R_NDS32_NONE
4463 || r_type == R_NDS32_RELA_GNU_VTENTRY
4464 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4465 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4466 || r_type == R_NDS32_DATA
1c8f6a4d 4467 || r_type == R_NDS32_TRAN
0c4bd9d9 4468 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC		 4469 continue;
4470
0c4bd9d9
KLC		 4471 /* If we enter the fp-as-gp region. Resolve the address
4472 of best fp-base. */
35c08157
KLC		 4473 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4474 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4475 {
4476 int dist;
4477
4478 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4479 dist = rel->r_addend >> 16;
4480 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4481 local_syms, symtab_hdr);
4482 }
4483 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4484 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4485 {
4486 fpbase_addr = elf_gp (output_bfd);
4487 }
4488
4489 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4490 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4491 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC		 4492 continue;
4493
4494 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4495 r_symndx = ELF32_R_SYM (rel->r_info);
4496
4497 /* This is a final link. */
4498 sym = NULL;
4499 sec = NULL;
4500 h = NULL;
4501
4502 if (r_symndx < symtab_hdr->sh_info)
4503 {
4504 /* Local symbol. */
4505 sym = local_syms + r_symndx;
4506 sec = local_sections[r_symndx];
4507
4508 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4509 addend = rel->r_addend;
4510 }
4511 else
4512 {
4513 /* External symbol. */
4514 bfd_boolean warned, ignored, unresolved_reloc;
4515 int symndx = r_symndx - symtab_hdr->sh_info;
4516
4517 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4518 r_symndx, symtab_hdr, sym_hashes, h, sec,
4519 relocation, unresolved_reloc, warned,
4520 ignored);
4521
4522 /* la $fp, _FP_BASE_ is per-function (region).
4523 Handle it specially. */
4524 switch ((int) r_type)
4525 {
4526 case R_NDS32_SDA19S0_RELA:
4527 case R_NDS32_SDA15S0_RELA:
4528 case R_NDS32_20_RELA:
4529 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4530 FP_BASE_NAME) == 0)
4531 {
4532 relocation = fpbase_addr;
4533 break;
4534 }
4535 }
4536
4537 }
4538
0e1862bb 4539 if (bfd_link_relocatable (info))
35c08157
KLC		 4540 {
4541 /* This is a relocatable link. We don't have to change
4542 anything, unless the reloc is against a section symbol,
4543 in which case we have to adjust according to where the
4544 section symbol winds up in the output section. */
4545 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4546 rel->r_addend += sec->output_offset + sym->st_value;
4547
4548 continue;
4549 }
4550
4551 /* Sanity check the address. */
4552 if (offset > high_address)
4553 {
4554 r = bfd_reloc_outofrange;
4555 goto check_reloc;
4556 }
4557
4558 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4559 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4560 || r_type >= R_NDS32_RELAX_ENTRY)
4561 continue;
4562
4563 switch ((int) r_type)
4564 {
4565 case R_NDS32_GOTOFF:
4566 /* Relocation is relative to the start of the global offset
4567 table (for ld24 rx, #uimm24), e.g. access at label+addend
4568
4569 ld24 rx. #label@GOTOFF + addend
4570 sub rx, r12. */
4571 case R_NDS32_GOTOFF_HI20:
4572 case R_NDS32_GOTOFF_LO12:
4573 case R_NDS32_GOTOFF_LO15:
4574 case R_NDS32_GOTOFF_LO19:
4575 BFD_ASSERT (sgot != NULL);
4576
4577 relocation -= elf_gp (output_bfd);
4578 break;
4579
4580 case R_NDS32_9_PLTREL:
4581 case R_NDS32_25_PLTREL:
4582 /* Relocation is to the entry for this symbol in the
4583 procedure linkage table. */
4584
4585 /* The native assembler will generate a 25_PLTREL reloc
4586 for a local symbol if you assemble a call from one
4587 section to another when using -K pic. */
4588 if (h == NULL)
4589 break;
4590
4591 if (h->forced_local)
4592 break;
4593
4594 /* We didn't make a PLT entry for this symbol. This
4595 happens when statically linking PIC code, or when
4596 using -Bsymbolic. */
4597 if (h->plt.offset == (bfd_vma) - 1)
4598 break;
4599
4600 relocation = (splt->output_section->vma
4601 + splt->output_offset + h->plt.offset);
4602 break;
4603
4604 case R_NDS32_PLT_GOTREL_HI20:
4605 case R_NDS32_PLT_GOTREL_LO12:
4606 case R_NDS32_PLT_GOTREL_LO15:
4607 case R_NDS32_PLT_GOTREL_LO19:
4608 case R_NDS32_PLT_GOTREL_LO20:
4609 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4610 {
4611 /* We didn't make a PLT entry for this symbol. This
4612 happens when statically linking PIC code, or when
4613 using -Bsymbolic. */
4614 relocation -= elf_gp (output_bfd);
4615 break;
4616 }
4617
4618 relocation = (splt->output_section->vma
4619 + splt->output_offset + h->plt.offset);
4620
4621 relocation -= elf_gp (output_bfd);
4622 break;
4623
4624 case R_NDS32_PLTREL_HI20:
4625 case R_NDS32_PLTREL_LO12:
4626
4627 /* Relocation is to the entry for this symbol in the
4628 procedure linkage table. */
4629
4630 /* The native assembler will generate a 25_PLTREL reloc
4631 for a local symbol if you assemble a call from one
4632 section to another when using -K pic. */
4633 if (h == NULL)
4634 break;
4635
4636 if (h->forced_local)
4637 break;
4638
4639 if (h->plt.offset == (bfd_vma) - 1)
4640 /* We didn't make a PLT entry for this symbol. This
4641 happens when statically linking PIC code, or when
4642 using -Bsymbolic. */
4643 break;
4644
4645 if (splt == NULL)
4646 break;
4647
4648 relocation = (splt->output_section->vma
4649 + splt->output_offset
4650 + h->plt.offset + 4)
4651 - (input_section->output_section->vma
4652 + input_section->output_offset
4653 + rel->r_offset);
4654
4655 break;
4656
4657 case R_NDS32_GOTPC20:
4658 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4659 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4660 relocation = elf_gp (output_bfd);
4661 break;
4662
4663 case R_NDS32_GOTPC_HI20:
4664 case R_NDS32_GOTPC_LO12:
4665 {
4666 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4667 bl .+4
4668 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4669 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4670 or
4671 bl .+4
4672 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4673 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4674 */
4675 relocation = elf_gp (output_bfd);
4676 relocation -= (input_section->output_section->vma
4677 + input_section->output_offset + rel->r_offset);
4678 break;
4679 }
4680
4681 case R_NDS32_GOT20:
4682 /* Fall through. */
4683 case R_NDS32_GOT_HI20:
4684 case R_NDS32_GOT_LO12:
4685 case R_NDS32_GOT_LO15:
4686 case R_NDS32_GOT_LO19:
4687 /* Relocation is to the entry for this symbol in the global
4688 offset table. */
4689 BFD_ASSERT (sgot != NULL);
4690
4691 if (h != NULL)
4692 {
4693 bfd_boolean dyn;
4694 bfd_vma off;
4695
4696 off = h->got.offset;
4697 BFD_ASSERT (off != (bfd_vma) - 1);
4698 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 4699 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4700 bfd_link_pic (info),
4701 h)
4702 || (bfd_link_pic (info)
35c08157
KLC		 4703 && (info->symbolic
4704 || h->dynindx == -1
4705 || h->forced_local) && h->def_regular))
4706 {
4707 /* This is actually a static link, or it is a
4708 -Bsymbolic link and the symbol is defined
4709 locally, or the symbol was forced to be local
4710 because of a version file. We must initialize
4711 this entry in the global offset table. Since the
4712 offset must always be a multiple of 4, we use the
4713 least significant bit to record whether we have
4714 initialized it already.
4715
4716 When doing a dynamic link, we create a .rela.got
4717 relocation entry to initialize the value. This
4718 is done in the finish_dynamic_symbol routine. */
4719 if ((off & 1) != 0)
4720 off &= ~1;
4721 else
4722 {
4723 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4724 h->got.offset |= 1;
4725 }
4726 }
4727 relocation = sgot->output_section->vma + sgot->output_offset + off
4728 - elf_gp (output_bfd);
4729 }
4730 else
4731 {
4732 bfd_vma off;
4733 bfd_byte *loc;
4734
4735 BFD_ASSERT (local_got_offsets != NULL
4736 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4737
4738 off = local_got_offsets[r_symndx];
4739
4740 /* The offset must always be a multiple of 4. We use
4741 the least significant bit to record whether we have
4742 already processed this entry. */
4743 if ((off & 1) != 0)
4744 off &= ~1;
4745 else
4746 {
4747 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4748
0e1862bb 4749 if (bfd_link_pic (info))
35c08157
KLC		 4750 {
4751 asection *srelgot;
4752 Elf_Internal_Rela outrel;
4753
4754 /* We need to generate a R_NDS32_RELATIVE reloc
4755 for the dynamic linker. */
ce558b89 4756 srelgot = htab->root.srelgot;
35c08157
KLC		 4757 BFD_ASSERT (srelgot != NULL);
4758
4759 outrel.r_offset = (elf_gp (output_bfd)
4760 + sgot->output_offset + off);
4761 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4762 outrel.r_addend = relocation;
4763 loc = srelgot->contents;
4764 loc +=
4765 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4766 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4767 ++srelgot->reloc_count;
4768 }
4769 local_got_offsets[r_symndx] |= 1;
4770 }
4771 relocation = sgot->output_section->vma + sgot->output_offset + off
4772 - elf_gp (output_bfd);
4773 }
4774
4775 break;
4776
4777 case R_NDS32_16_RELA:
4778 case R_NDS32_20_RELA:
4779 case R_NDS32_5_RELA:
4780 case R_NDS32_32_RELA:
4781 case R_NDS32_9_PCREL_RELA:
4782 case R_NDS32_WORD_9_PCREL_RELA:
4783 case R_NDS32_10_UPCREL_RELA:
4784 case R_NDS32_15_PCREL_RELA:
4785 case R_NDS32_17_PCREL_RELA:
4786 case R_NDS32_25_PCREL_RELA:
4787 case R_NDS32_HI20_RELA:
4788 case R_NDS32_LO12S3_RELA:
4789 case R_NDS32_LO12S2_RELA:
4790 case R_NDS32_LO12S2_DP_RELA:
4791 case R_NDS32_LO12S2_SP_RELA:
4792 case R_NDS32_LO12S1_RELA:
4793 case R_NDS32_LO12S0_RELA:
4794 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4795 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 4796 && (input_section->flags & SEC_ALLOC) != 0
4797 && (eliminate_gc_relocs == 0
4798 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4799 && ((r_type != R_NDS32_9_PCREL_RELA
4800 && r_type != R_NDS32_WORD_9_PCREL_RELA
4801 && r_type != R_NDS32_10_UPCREL_RELA
4802 && r_type != R_NDS32_15_PCREL_RELA
4803 && r_type != R_NDS32_17_PCREL_RELA
4804 && r_type != R_NDS32_25_PCREL_RELA
4805 && !(r_type == R_NDS32_32_RELA
4806 && strcmp (input_section->name, ".eh_frame") == 0))
4807 || (h != NULL && h->dynindx != -1
4808 && (!info->symbolic || !h->def_regular))))
4809 {
4810 Elf_Internal_Rela outrel;
4811 bfd_boolean skip, relocate;
4812 bfd_byte *loc;
4813
4814 /* When generating a shared object, these relocations
4815 are copied into the output file to be resolved at run
4816 time. */
4817
4818 if (sreloc == NULL)
4819 {
4820 const char *name;
4821
4822 name = bfd_elf_string_from_elf_section
4823 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4824 elf_section_data (input_section)->rela.hdr->sh_name);
4825 if (name == NULL)
4826 return FALSE;
4827
4828 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4829 && strcmp (bfd_get_section_name (input_bfd,
4830 input_section),
4831 name + 5) == 0);
4832
4833 sreloc = bfd_get_section_by_name (dynobj, name);
4834 BFD_ASSERT (sreloc != NULL);
4835 }
4836
4837 skip = FALSE;
4838 relocate = FALSE;
4839
4840 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4841 info,
4842 input_section,
4843 rel->r_offset);
4844 if (outrel.r_offset == (bfd_vma) - 1)
4845 skip = TRUE;
4846 else if (outrel.r_offset == (bfd_vma) - 2)
4847 skip = TRUE, relocate = TRUE;
4848 outrel.r_offset += (input_section->output_section->vma
4849 + input_section->output_offset);
4850
4851 if (skip)
4852 memset (&outrel, 0, sizeof outrel);
4853 else if (r_type == R_NDS32_17_PCREL_RELA
4854 || r_type == R_NDS32_15_PCREL_RELA
4855 || r_type == R_NDS32_25_PCREL_RELA)
4856 {
4857 BFD_ASSERT (h != NULL && h->dynindx != -1);
4858 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4859 outrel.r_addend = rel->r_addend;
4860 }
4861 else
4862 {
4863 /* h->dynindx may be -1 if this symbol was marked to
4864 become local. */
4865 if (h == NULL
4866 || ((info->symbolic || h->dynindx == -1)
4867 && h->def_regular))
4868 {
4869 relocate = TRUE;
4870 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4871 outrel.r_addend = relocation + rel->r_addend;
4872 }
4873 else
4874 {
4875 BFD_ASSERT (h->dynindx != -1);
4876 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4877 outrel.r_addend = rel->r_addend;
4878 }
4879 }
4880
4881 loc = sreloc->contents;
4882 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4883 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4884 ++sreloc->reloc_count;
4885
4886 /* If this reloc is against an external symbol, we do
4887 not want to fiddle with the addend. Otherwise, we
4888 need to include the symbol value so that it becomes
4889 an addend for the dynamic reloc. */
4890 if (!relocate)
4891 continue;
4892 }
4893 break;
4894
4895 case R_NDS32_25_ABS_RELA:
0e1862bb 4896 if (bfd_link_pic (info))
35c08157 4897 {
4eca0228 4898 _bfd_error_handler
871b3ab2 4899 (_("%pB: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
dae82561 4900 "mode."), input_bfd);
35c08157
KLC		 4901 return FALSE;
4902 }
4903 break;
4904
4905 case R_NDS32_9_PCREL:
4906 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4907 contents, offset,
4908 sec, relocation, addend);
4909 goto check_reloc;
4910
4911 case R_NDS32_HI20:
4912 {
4913 Elf_Internal_Rela *lorel;
4914
4915 /* We allow an arbitrary number of HI20 relocs before the
4916 LO12 reloc. This permits gcc to emit the HI and LO relocs
4917 itself. */
4918 for (lorel = rel + 1;
4919 (lorel < relend
4920 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4921 continue;
4922 if (lorel < relend
4923 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4924 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4925 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4926 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4927 {
4928 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4929 contents, relocation + addend);
4930 r = bfd_reloc_ok;
4931 }
4932 else
4933 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 4934 contents, offset, relocation,
4935 addend);
35c08157
KLC		 4936 }
4937
4938 goto check_reloc;
4939
4940 case R_NDS32_GOT17S2_RELA:
4941 case R_NDS32_GOT15S2_RELA:
4942 {
4943 bfd_vma off;
4944
4945 BFD_ASSERT (sgot != NULL);
4946
4947 if (h != NULL)
4948 {
4949 bfd_boolean dyn;
4950
4951 off = h->got.offset;
4952 BFD_ASSERT (off != (bfd_vma) - 1);
4953
4954 dyn = htab->root.dynamic_sections_created;
4955 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L		 4956 (dyn, bfd_link_pic (info), h)
4957 || (bfd_link_pic (info)
4958 && (info->symbolic
4959 || h->dynindx == -1
4960 || h->forced_local)
4961 && h->def_regular))
35c08157
KLC		 4962 {
4963 /* This is actually a static link, or it is a
4964 -Bsymbolic link and the symbol is defined
4965 locally, or the symbol was forced to be local
4966 because of a version file. We must initialize
4967 this entry in the global offset table. Since the
4968 offset must always be a multiple of 4, we use the
4969 least significant bit to record whether we have
4970 initialized it already.
4971
4972 When doing a dynamic link, we create a .rela.got
4973 relocation entry to initialize the value. This
4974 is done in the finish_dynamic_symbol routine. */
4975 if ((off & 1) != 0)
4976 off &= ~1;
4977 else
4978 {
4979 bfd_put_32 (output_bfd, relocation,
4980 sgot->contents + off);
4981 h->got.offset |= 1;
4982 }
4983 }
4984 }
4985 else
4986 {
4987 bfd_byte *loc;
4988
4989 BFD_ASSERT (local_got_offsets != NULL
4990 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4991
4992 off = local_got_offsets[r_symndx];
4993
4994 /* The offset must always be a multiple of 4. We use
4995 the least significant bit to record whether we have
4996 already processed this entry. */
4997 if ((off & 1) != 0)
4998 off &= ~1;
4999 else
5000 {
5001 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5002
0e1862bb 5003 if (bfd_link_pic (info))
35c08157
KLC		 5004 {
5005 asection *srelgot;
5006 Elf_Internal_Rela outrel;
5007
5008 /* We need to generate a R_NDS32_RELATIVE reloc
5009 for the dynamic linker. */
ce558b89 5010 srelgot = htab->root.srelgot;
35c08157
KLC		 5011 BFD_ASSERT (srelgot != NULL);
5012
5013 outrel.r_offset = (elf_gp (output_bfd)
5014 + sgot->output_offset + off);
5015 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5016 outrel.r_addend = relocation;
5017 loc = srelgot->contents;
5018 loc +=
5019 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5020 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5021 ++srelgot->reloc_count;
5022 }
5023 local_got_offsets[r_symndx] |= 1;
5024 }
5025 }
5026 relocation = sgot->output_section->vma + sgot->output_offset + off
5027 - elf_gp (output_bfd);
5028 }
5029 if (relocation & align)
5030 {
5031 /* Incorrect alignment. */
4eca0228 5032 _bfd_error_handler
871b3ab2 5033 (_("%pB: warning: unaligned access to GOT entry."), input_bfd);
35c08157
KLC		 5034 ret = FALSE;
5035 r = bfd_reloc_dangerous;
5036 goto check_reloc;
5037 }
5038 break;
5039
5040 case R_NDS32_SDA16S3_RELA:
5041 case R_NDS32_SDA15S3_RELA:
5042 case R_NDS32_SDA15S3:
5043 align = 0x7;
5044 goto handle_sda;
5045
5046 case R_NDS32_SDA17S2_RELA:
5047 case R_NDS32_SDA15S2_RELA:
5048 case R_NDS32_SDA12S2_SP_RELA:
5049 case R_NDS32_SDA12S2_DP_RELA:
5050 case R_NDS32_SDA15S2:
5051 case R_NDS32_SDA_FP7U2_RELA:
5052 align = 0x3;
5053 goto handle_sda;
5054
5055 case R_NDS32_SDA18S1_RELA:
5056 case R_NDS32_SDA15S1_RELA:
5057 case R_NDS32_SDA15S1:
5058 align = 0x1;
5059 goto handle_sda;
5060
5061 case R_NDS32_SDA19S0_RELA:
5062 case R_NDS32_SDA15S0_RELA:
5063 case R_NDS32_SDA15S0:
5064 {
5065 align = 0x0;
5066handle_sda:
5067 BFD_ASSERT (sec != NULL);
5068
5069 /* If the symbol is in the abs section, the out_bfd will be null.
5070 This happens when the relocation has a symbol@GOTOFF. */
5071 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5072 if (r != bfd_reloc_ok)
5073 {
4eca0228 5074 _bfd_error_handler
871b3ab2 5075 (_("%pB: warning: relocate SDA_BASE failed."), input_bfd);
35c08157
KLC		 5076 ret = FALSE;
5077 goto check_reloc;
5078 }
5079
5080 /* At this point `relocation' contains the object's
5081 address. */
5082 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5083 {
5084 relocation -= fpbase_addr;
5085 }
5086 else
5087 relocation -= gp;
5088 /* Now it contains the offset from _SDA_BASE_. */
5089
5090 /* Make sure alignment is correct. */
5091
5092 if (relocation & align)
5093 {
5094 /* Incorrect alignment. */
4eca0228 5095 _bfd_error_handler
695344c0 5096 /* xgettext:c-format */
871b3ab2 5097 (_("%pB(%pA): warning: unaligned small data access of type %d."),
35c08157
KLC		 5098 input_bfd, input_section, r_type);
5099 ret = FALSE;
5100 goto check_reloc;
5101 }
5102 }
5103
5104 break;
5105 case R_NDS32_17IFC_PCREL_RELA:
5106 case R_NDS32_10IFCU_PCREL_RELA:
5107 /* do nothing */
5108 break;
5109
1c8f6a4d
KLC		 5110 case R_NDS32_TLS_LE_HI20:
5111 case R_NDS32_TLS_LE_LO12:
5112 case R_NDS32_TLS_LE_20:
5113 case R_NDS32_TLS_LE_15S0:
5114 case R_NDS32_TLS_LE_15S1:
5115 case R_NDS32_TLS_LE_15S2:
5116 if (elf_hash_table (info)->tls_sec != NULL)
5117 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5118 break;
5119 case R_NDS32_TLS_IE_HI20:
5120 case R_NDS32_TLS_IE_LO12S2:
5121 {
5122 /* Relocation is to the entry for this symbol in the global
5123 offset table. */
5124 unsigned int tls_type;
5125 asection *srelgot;
5126 Elf_Internal_Rela outrel;
5127 bfd_vma off;
5128 bfd_byte *loc;
5129 int indx = 0;
5130
5131 BFD_ASSERT (sgot != NULL);
5132 if (h != NULL)
5133 {
5134 bfd_boolean dyn;
5135
5136 off = h->got.offset;
5137 BFD_ASSERT (off != (bfd_vma) - 1);
5138 dyn = htab->root.dynamic_sections_created;
5139 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5140 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5141 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5142 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5143 indx = h->dynindx;
5144 }
5145 else
5146 {
5147 /* Never happen currently. */
5148 BFD_ASSERT (local_got_offsets != NULL
5149 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5150
5151 off = local_got_offsets[r_symndx];
5152
5153 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5154 }
5155 relocation = sgot->output_section->vma + sgot->output_offset + off;
5156
5157 if (r_type == R_NDS32_TLS_IE_LO12S2)
5158 break;
5159
5160 /* The offset must always be a multiple of 4. We use
5161 the least significant bit to record whether we have
5162 already processed this entry. */
5163 if ((off & 1) != 0)
5164 off &= ~1;
5165 else
5166 {
5167 bfd_boolean need_relocs = FALSE;
ce558b89 5168 srelgot = htab->root.srelgot;
0e1862bb 5169 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC		 5170 && (h == NULL
5171 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5172 || h->root.type != bfd_link_hash_undefweak))
5173 {
5174 need_relocs = TRUE;
5175 BFD_ASSERT (srelgot != NULL);
5176 }
5177 if (tls_type & GOT_TLS_IE)
5178 {
5179 if (need_relocs)
5180 {
5181 if (h->dynindx == 0)
5182 outrel.r_addend = relocation - dtpoff_base (info);
5183 else
5184 outrel.r_addend = 0;
5185 outrel.r_offset = (sgot->output_section->vma
5186 + sgot->output_offset
5187 + off);
5188 outrel.r_info =
5189 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5190
5191 loc = srelgot->contents;
5192 loc +=
5193 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5194 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5195 ++srelgot->reloc_count;
5196 }
5197 else
5198 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5199 sgot->contents + off);
5200 }
5201 }
5202 }
5203 break;
5204
35c08157
KLC		 5205 /* DON'T fall through. */
5206
5207 default:
5208 /* OLD_NDS32_RELOC. */
5209
5210 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5211 contents, offset, relocation, addend);
5212 goto check_reloc;
5213 }
5214
5215 switch ((int) r_type)
5216 {
5217 case R_NDS32_20_RELA:
5218 case R_NDS32_5_RELA:
5219 case R_NDS32_9_PCREL_RELA:
5220 case R_NDS32_WORD_9_PCREL_RELA:
5221 case R_NDS32_10_UPCREL_RELA:
5222 case R_NDS32_15_PCREL_RELA:
5223 case R_NDS32_17_PCREL_RELA:
5224 case R_NDS32_25_PCREL_RELA:
5225 case R_NDS32_25_ABS_RELA:
5226 case R_NDS32_HI20_RELA:
5227 case R_NDS32_LO12S3_RELA:
5228 case R_NDS32_LO12S2_RELA:
5229 case R_NDS32_LO12S2_DP_RELA:
5230 case R_NDS32_LO12S2_SP_RELA:
5231 case R_NDS32_LO12S1_RELA:
5232 case R_NDS32_LO12S0_RELA:
5233 case R_NDS32_LO12S0_ORI_RELA:
5234 case R_NDS32_SDA16S3_RELA:
5235 case R_NDS32_SDA17S2_RELA:
5236 case R_NDS32_SDA18S1_RELA:
5237 case R_NDS32_SDA19S0_RELA:
5238 case R_NDS32_SDA15S3_RELA:
5239 case R_NDS32_SDA15S2_RELA:
5240 case R_NDS32_SDA12S2_DP_RELA:
5241 case R_NDS32_SDA12S2_SP_RELA:
5242 case R_NDS32_SDA15S1_RELA:
5243 case R_NDS32_SDA15S0_RELA:
5244 case R_NDS32_SDA_FP7U2_RELA:
5245 case R_NDS32_9_PLTREL:
5246 case R_NDS32_25_PLTREL:
5247 case R_NDS32_GOT20:
5248 case R_NDS32_GOT_HI20:
5249 case R_NDS32_GOT_LO12:
5250 case R_NDS32_GOT_LO15:
5251 case R_NDS32_GOT_LO19:
5252 case R_NDS32_GOT15S2_RELA:
5253 case R_NDS32_GOT17S2_RELA:
5254 case R_NDS32_GOTPC20:
5255 case R_NDS32_GOTPC_HI20:
5256 case R_NDS32_GOTPC_LO12:
5257 case R_NDS32_GOTOFF:
5258 case R_NDS32_GOTOFF_HI20:
5259 case R_NDS32_GOTOFF_LO12:
5260 case R_NDS32_GOTOFF_LO15:
5261 case R_NDS32_GOTOFF_LO19:
5262 case R_NDS32_PLTREL_HI20:
5263 case R_NDS32_PLTREL_LO12:
5264 case R_NDS32_PLT_GOTREL_HI20:
5265 case R_NDS32_PLT_GOTREL_LO12:
5266 case R_NDS32_PLT_GOTREL_LO15:
5267 case R_NDS32_PLT_GOTREL_LO19:
5268 case R_NDS32_PLT_GOTREL_LO20:
5269 case R_NDS32_17IFC_PCREL_RELA:
5270 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5271 case R_NDS32_TLS_LE_HI20:
5272 case R_NDS32_TLS_LE_LO12:
5273 case R_NDS32_TLS_IE_HI20:
5274 case R_NDS32_TLS_IE_LO12S2:
5275 case R_NDS32_TLS_LE_20:
5276 case R_NDS32_TLS_LE_15S0:
5277 case R_NDS32_TLS_LE_15S1:
5278 case R_NDS32_TLS_LE_15S2:
35c08157 5279 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5280 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5281 r = nds32_elf_final_link_relocate (howto, input_bfd,
5282 input_section, contents,
5283 rel->r_offset, relocation,
5284 rel->r_addend);
5285 break;
5286
5287 default:
5288 /* All other relocs can use default handler. */
5289 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5290 contents, rel->r_offset,
5291 relocation, rel->r_addend);
5292 break;
5293 }
5294
5295check_reloc:
5296
5297 if (r != bfd_reloc_ok)
5298 {
5299 /* FIXME: This should be generic enough to go in a utility. */
5300 const char *name;
5301
5302 if (h != NULL)
5303 name = h->root.root.string;
5304 else
5305 {
5306 name = bfd_elf_string_from_elf_section
5307 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5308 if (name == NULL || *name == '\0')
5309 name = bfd_section_name (input_bfd, sec);
5310 }
5311
5312 if (errmsg != NULL)
5313 goto common_error;
5314
5315 switch (r)
5316 {
5317 case bfd_reloc_overflow:
1a72702b
AM		 5318 (*info->callbacks->reloc_overflow)
5319 (info, (h ? &h->root : NULL), name, howto->name,
5320 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 5321 break;
5322
5323 case bfd_reloc_undefined:
1a72702b
AM		 5324 (*info->callbacks->undefined_symbol)
5325 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC		 5326 break;
5327
5328 case bfd_reloc_outofrange:
5329 errmsg = _("internal error: out of range error");
5330 goto common_error;
5331
5332 case bfd_reloc_notsupported:
5333 errmsg = _("internal error: unsupported relocation error");
5334 goto common_error;
5335
5336 case bfd_reloc_dangerous:
5337 errmsg = _("internal error: dangerous error");
5338 goto common_error;
5339
5340 default:
5341 errmsg = _("internal error: unknown error");
5342 /* Fall through. */
5343
1a72702b
AM		 5344 common_error:
5345 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5346 input_section, offset);
35c08157
KLC		 5347 break;
5348 }
5349 }
5350 }
5351
5352 return ret;
5353}
5354
5355/* Finish up dynamic symbol handling. We set the contents of various
5356 dynamic sections here. */
5357
5358static bfd_boolean
5359nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5360 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5361{
5362 struct elf_nds32_link_hash_table *htab;
5363 bfd_byte *loc;
5364
5365 htab = nds32_elf_hash_table (info);
5366
5367 if (h->plt.offset != (bfd_vma) - 1)
5368 {
5369 asection *splt;
5370 asection *sgot;
5371 asection *srela;
5372
5373 bfd_vma plt_index;
5374 bfd_vma got_offset;
5375 bfd_vma local_plt_offset;
5376 Elf_Internal_Rela rela;
5377
5378 /* This symbol has an entry in the procedure linkage table. Set
5379 it up. */
5380
5381 BFD_ASSERT (h->dynindx != -1);
5382
ce558b89
AM		 5383 splt = htab->root.splt;
5384 sgot = htab->root.sgotplt;
5385 srela = htab->root.srelplt;
35c08157
KLC		 5386 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5387
5388 /* Get the index in the procedure linkage table which
5389 corresponds to this symbol. This is the index of this symbol
5390 in all the symbols for which we are making plt entries. The
5391 first entry in the procedure linkage table is reserved. */
5392 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5393
5394 /* Get the offset into the .got table of the entry that
5395 corresponds to this function. Each .got entry is 4 bytes.
5396 The first three are reserved. */
5397 got_offset = (plt_index + 3) * 4;
5398
5399 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5400 if (!bfd_link_pic (info))
35c08157
KLC		 5401 {
5402 unsigned long insn;
5403
5404 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5405 + sgot->output_offset + got_offset) >> 12)
5406 & 0xfffff);
5407 bfd_putb32 (insn, splt->contents + h->plt.offset);
5408
5409 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5410 + sgot->output_offset + got_offset) & 0x0fff)
5411 >> 2);
5412 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5413
5414 insn = PLT_ENTRY_WORD2;
5415 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5416
5417 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5418 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5419
5420 insn = PLT_ENTRY_WORD4
5421 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5422 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5423 local_plt_offset = 12;
5424 }
5425 else
5426 {
5427 /* sda_base must be set at this time. */
5428 unsigned long insn;
5429 long offset;
5430
5431 /* FIXME, sda_base is 65536, it will damage opcode. */
5432 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5433 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5434 - elf_gp (output_bfd);
5435 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5436 bfd_putb32 (insn, splt->contents + h->plt.offset);
5437
5438 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5439 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5440
5441 insn = PLT_PIC_ENTRY_WORD2;
5442 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5443
5444 insn = PLT_PIC_ENTRY_WORD3;
5445 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5446
5447 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5448 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5449
5450 insn = PLT_PIC_ENTRY_WORD5
5451 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5452 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5453
5454 local_plt_offset = 16;
5455 }
5456
5457 /* Fill in the entry in the global offset table,
5458 so it will fall through to the next instruction for the first time. */
5459 bfd_put_32 (output_bfd,
5460 (splt->output_section->vma + splt->output_offset
5461 + h->plt.offset + local_plt_offset),
5462 sgot->contents + got_offset);
5463
5464 /* Fill in the entry in the .rela.plt section. */
5465 rela.r_offset = (sgot->output_section->vma
5466 + sgot->output_offset + got_offset);
5467 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5468 rela.r_addend = 0;
5469 loc = srela->contents;
5470 loc += plt_index * sizeof (Elf32_External_Rela);
5471 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5472
5473 if (!h->def_regular)
5474 {
5475 /* Mark the symbol as undefined, rather than as defined in
5476 the .plt section. Leave the value alone. */
5477 sym->st_shndx = SHN_UNDEF;
5478 if (!h->ref_regular_nonweak)
5479 sym->st_value = 0;
5480 }
5481 }
5482
5483 if (h->got.offset != (bfd_vma) - 1)
5484 {
5485 asection *sgot;
5486 asection *srela;
5487 Elf_Internal_Rela rela;
5488
5489 /* This symbol has an entry in the global offset table.
5490 Set it up. */
5491
ce558b89
AM		 5492 sgot = htab->root.sgot;
5493 srela = htab->root.srelgot;
35c08157
KLC		 5494 BFD_ASSERT (sgot != NULL && srela != NULL);
5495
5496 rela.r_offset = (sgot->output_section->vma
5497 + sgot->output_offset + (h->got.offset & ~1));
5498
5499 /* If this is a -Bsymbolic link, and the symbol is defined
5500 locally, we just want to emit a RELATIVE reloc. Likewise if
5501 the symbol was forced to be local because of a version file.
5502 The entry in the global offset table will already have been
5503 initialized in the relocate_section function. */
0e1862bb 5504 if (bfd_link_pic (info)
35c08157
KLC		 5505 && (info->symbolic
5506 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5507 {
5508 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5509 rela.r_addend = (h->root.u.def.value
5510 + h->root.u.def.section->output_section->vma
5511 + h->root.u.def.section->output_offset);
5512 }
5513 else
5514 {
5515 BFD_ASSERT ((h->got.offset & 1) == 0);
5516 bfd_put_32 (output_bfd, (bfd_vma) 0,
5517 sgot->contents + h->got.offset);
5518 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5519 rela.r_addend = 0;
5520 }
5521
5522 loc = srela->contents;
5523 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5524 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5525 ++srela->reloc_count;
5526 }
5527
5528 if (h->needs_copy)
5529 {
5530 asection *s;
5531 Elf_Internal_Rela rela;
5532
5533 /* This symbols needs a copy reloc. Set it up. */
5534
5535 BFD_ASSERT (h->dynindx != -1
5536 && (h->root.type == bfd_link_hash_defined
5537 || h->root.type == bfd_link_hash_defweak));
5538
5539 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5540 BFD_ASSERT (s != NULL);
5541
5542 rela.r_offset = (h->root.u.def.value
5543 + h->root.u.def.section->output_section->vma
5544 + h->root.u.def.section->output_offset);
5545 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5546 rela.r_addend = 0;
5547 loc = s->contents;
5548 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5549 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5550 ++s->reloc_count;
5551 }
5552
5553 /* Mark some specially defined symbols as absolute. */
5554 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5555 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5556 sym->st_shndx = SHN_ABS;
5557
5558 return TRUE;
5559}
5560
5561
5562/* Finish up the dynamic sections. */
5563
5564static bfd_boolean
5565nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5566{
5567 struct elf_nds32_link_hash_table *htab;
5568 bfd *dynobj;
5569 asection *sdyn;
5570 asection *sgot;
5571
5572 htab = nds32_elf_hash_table (info);
5573 dynobj = htab->root.dynobj;
5574
ce558b89 5575 sgot = htab->root.sgotplt;
35c08157
KLC		 5576 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5577
5578 if (htab->root.dynamic_sections_created)
5579 {
5580 asection *splt;
5581 Elf32_External_Dyn *dyncon, *dynconend;
5582
5583 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5584
5585 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5586 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5587
5588 for (; dyncon < dynconend; dyncon++)
5589 {
5590 Elf_Internal_Dyn dyn;
5591 asection *s;
5592
5593 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5594
5595 switch (dyn.d_tag)
5596 {
5597 default:
5598 break;
5599
5600 case DT_PLTGOT:
ce558b89 5601 s = htab->root.sgotplt;
35c08157
KLC		 5602 goto get_vma;
5603 case DT_JMPREL:
ce558b89 5604 s = htab->root.srelplt;
35c08157 5605 get_vma:
4ade44b7 5606 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 5607 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5608 break;
5609
5610 case DT_PLTRELSZ:
ce558b89 5611 s = htab->root.srelplt;
35c08157
KLC		 5612 dyn.d_un.d_val = s->size;
5613 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5614 break;
35c08157
KLC		 5615 }
5616 }
5617
5618 /* Fill in the first entry in the procedure linkage table. */
ce558b89 5619 splt = htab->root.splt;
35c08157
KLC		 5620 if (splt && splt->size > 0)
5621 {
0e1862bb 5622 if (bfd_link_pic (info))
35c08157
KLC		 5623 {
5624 unsigned long insn;
5625 long offset;
5626
5627 /* FIXME, sda_base is 65536, it will damage opcode. */
5628 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5629 offset = sgot->output_section->vma + sgot->output_offset + 4
5630 - elf_gp (output_bfd);
5631 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5632 bfd_putb32 (insn, splt->contents);
5633
5634 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5635 /* here has a typo? */
5636 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5637 bfd_putb32 (insn, splt->contents + 4);
5638
5639 insn = PLT0_PIC_ENTRY_WORD2;
5640 bfd_putb32 (insn, splt->contents + 8);
5641
5642 insn = PLT0_PIC_ENTRY_WORD3;
5643 bfd_putb32 (insn, splt->contents + 12);
5644
5645 insn = PLT0_PIC_ENTRY_WORD4;
5646 bfd_putb32 (insn, splt->contents + 16);
5647
5648 insn = PLT0_PIC_ENTRY_WORD5;
5649 bfd_putb32 (insn, splt->contents + 20);
5650 }
5651 else
5652 {
5653 unsigned long insn;
5654 unsigned long addr;
5655
5656 /* addr = .got + 4 */
5657 addr = sgot->output_section->vma + sgot->output_offset + 4;
5658 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5659 bfd_putb32 (insn, splt->contents);
5660
5661 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5662 bfd_putb32 (insn, splt->contents + 4);
5663
5664 insn = PLT0_ENTRY_WORD2;
5665 bfd_putb32 (insn, splt->contents + 8);
5666
5667 insn = PLT0_ENTRY_WORD3;
5668 bfd_putb32 (insn, splt->contents + 12);
5669
5670 insn = PLT0_ENTRY_WORD4;
5671 bfd_putb32 (insn, splt->contents + 16);
5672 }
5673
5674 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5675 PLT_ENTRY_SIZE;
5676 }
5677 }
5678
5679 /* Fill in the first three entries in the global offset table. */
5680 if (sgot && sgot->size > 0)
5681 {
5682 if (sdyn == NULL)
5683 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5684 else
5685 bfd_put_32 (output_bfd,
5686 sdyn->output_section->vma + sdyn->output_offset,
5687 sgot->contents);
5688 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5689 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5690
5691 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5692 }
5693
5694 return TRUE;
5695}
5696\f
5697
5698/* Set the right machine number. */
5699
5700static bfd_boolean
5701nds32_elf_object_p (bfd *abfd)
5702{
5703 static unsigned int cur_arch = 0;
5704
5705 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5706 {
5707 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5708 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5709 }
5710
5711 switch (cur_arch)
5712 {
5713 default:
5714 case E_N1_ARCH:
5715 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5716 break;
5717 case E_N1H_ARCH:
5718 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5719 break;
5720 case E_NDS_ARCH_STAR_V2_0:
5721 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5722 break;
5723 case E_NDS_ARCH_STAR_V3_0:
5724 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5725 break;
5726 case E_NDS_ARCH_STAR_V3_M:
5727 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5728 break;
5729 }
5730
5731 return TRUE;
5732}
5733
5734/* Store the machine number in the flags field. */
5735
5736static void
5737nds32_elf_final_write_processing (bfd *abfd,
5738 bfd_boolean linker ATTRIBUTE_UNUSED)
5739{
5740 unsigned long val;
5741 static unsigned int cur_mach = 0;
5742
5743 if (bfd_mach_n1 != bfd_get_mach (abfd))
5744 {
5745 cur_mach = bfd_get_mach (abfd);
5746 }
5747
5748 switch (cur_mach)
5749 {
5750 case bfd_mach_n1:
5751 /* Only happen when object is empty, since the case is abandon. */
5752 val = E_N1_ARCH;
5753 val |= E_NDS_ABI_AABI;
5754 val |= E_NDS32_ELF_VER_1_4;
5755 break;
5756 case bfd_mach_n1h:
5757 val = E_N1H_ARCH;
5758 break;
5759 case bfd_mach_n1h_v2:
5760 val = E_NDS_ARCH_STAR_V2_0;
5761 break;
5762 case bfd_mach_n1h_v3:
5763 val = E_NDS_ARCH_STAR_V3_0;
5764 break;
5765 case bfd_mach_n1h_v3m:
5766 val = E_NDS_ARCH_STAR_V3_M;
5767 break;
5768 default:
5769 val = 0;
5770 break;
5771 }
5772
5773 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5774 elf_elfheader (abfd)->e_flags |= val;
5775}
5776
5777/* Function to keep NDS32 specific file flags. */
5778
5779static bfd_boolean
5780nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5781{
5782 BFD_ASSERT (!elf_flags_init (abfd)
5783 || elf_elfheader (abfd)->e_flags == flags);
5784
5785 elf_elfheader (abfd)->e_flags = flags;
5786 elf_flags_init (abfd) = TRUE;
5787 return TRUE;
5788}
5789
5790static unsigned int
5791convert_e_flags (unsigned int e_flags, unsigned int arch)
5792{
5793 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5794 {
5795 /* From 0.9 to 1.0. */
5796 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5797
5798 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5799 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5800 if (arch == E_NDS_ARCH_STAR_V1_0)
5801 {
5802 /* Done. */
5803 return e_flags;
5804 }
5805 }
5806
5807 /* From 1.0 to 2.0. */
5808 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5809
5810 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5811 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5812
5813 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5814 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5815 return e_flags;
5816}
5817
5818static bfd_boolean
5819nds32_check_vec_size (bfd *ibfd)
5820{
5821 static unsigned int nds32_vec_size = 0;
5822
5823 asection *sec_t = NULL;
5824 bfd_byte *contents = NULL;
5825
5826 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5827
5828 if (sec_t && sec_t->size >= 4)
5829 {
5830 /* Get vec_size in file. */
5831 unsigned int flag_t;
5832
0c4bd9d9 5833 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC		 5834 flag_t = bfd_get_32 (ibfd, contents);
5835
5836 /* The value could only be 4 or 16. */
5837
5838 if (!nds32_vec_size)
5839 /* Set if not set yet. */
5840 nds32_vec_size = (flag_t & 0x3);
5841 else if (nds32_vec_size != (flag_t & 0x3))
5842 {
4eca0228 5843 _bfd_error_handler
695344c0 5844 /* xgettext:c-format */
871b3ab2 5845 (_("%pB: ISR vector size mismatch"
4eca0228
AM		 5846 " with previous modules, previous %u-byte, current %u-byte"),
5847 ibfd,
5848 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5849 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC		 5850 return FALSE;
5851 }
5852 else
5853 /* Only keep the first vec_size section. */
5854 sec_t->flags |= SEC_EXCLUDE;
5855 }
5856
5857 return TRUE;
5858}
5859
5860/* Merge backend specific data from an object file to the output
5861 object file when linking. */
5862
5863static bfd_boolean
50e03d47 5864nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 5865{
50e03d47 5866 bfd *obfd = info->output_bfd;
35c08157
KLC		 5867 flagword out_flags;
5868 flagword in_flags;
5869 flagword out_16regs;
5870 flagword in_no_mac;
5871 flagword out_no_mac;
5872 flagword in_16regs;
5873 flagword out_version;
5874 flagword in_version;
5875 flagword out_fpu_config;
5876 flagword in_fpu_config;
5877
5878 /* TODO: Revise to use object-attributes instead. */
5879 if (!nds32_check_vec_size (ibfd))
5880 return FALSE;
5881
5882 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5883 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5884 return TRUE;
5885
5886 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5887 {
4eca0228 5888 _bfd_error_handler
871b3ab2 5889 (_("%pB: warning: Endian mismatch with previous modules."), ibfd);
35c08157
KLC		 5890
5891 bfd_set_error (bfd_error_bad_value);
5892 return FALSE;
5893 }
5894
5895 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5896 if (in_version == E_NDS32_ELF_VER_1_2)
5897 {
4eca0228 5898 _bfd_error_handler
871b3ab2 5899 (_("%pB: warning: Older version of object file encountered, "
35c08157
KLC		 5900 "Please recompile with current tool chain."), ibfd);
5901 }
5902
5903 /* We may need to merge V1 and V2 arch object files to V2. */
5904 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5905 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5906 {
5907 /* Need to convert version. */
5908 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5909 == E_NDS_ARCH_STAR_RESERVED)
5910 {
5911 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5912 }
5913 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5914 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5915 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5916 {
5917 elf_elfheader (obfd)->e_flags =
5918 convert_e_flags (elf_elfheader (obfd)->e_flags,
5919 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5920 }
5921 else
5922 {
5923 elf_elfheader (ibfd)->e_flags =
5924 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5925 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5926 }
5927 }
5928
5929 /* Extract some flags. */
5930 in_flags = elf_elfheader (ibfd)->e_flags
5931 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5932 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5933
5934 /* The following flags need special treatment. */
5935 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5936 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5937 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5938
5939 /* Extract some flags. */
5940 out_flags = elf_elfheader (obfd)->e_flags
5941 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5942 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5943
5944 /* The following flags need special treatment. */
5945 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5946 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5947 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5948 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5949 if (!elf_flags_init (obfd))
5950 {
5951 /* If the input is the default architecture then do not
5952 bother setting the flags for the output architecture,
5953 instead allow future merges to do this. If no future
5954 merges ever set these flags then they will retain their
5955 unitialised values, which surprise surprise, correspond
5956 to the default values. */
5957 if (bfd_get_arch_info (ibfd)->the_default)
5958 return TRUE;
5959
5960 elf_flags_init (obfd) = TRUE;
5961 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5962
5963 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5964 && bfd_get_arch_info (obfd)->the_default)
5965 {
5966 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5967 bfd_get_mach (ibfd));
5968 }
5969
5970 return TRUE;
5971 }
5972
5973 /* Check flag compatibility. */
5974 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5975 {
4eca0228 5976 _bfd_error_handler
871b3ab2 5977 (_("%pB: error: ABI mismatch with previous modules."), ibfd);
35c08157
KLC		 5978
5979 bfd_set_error (bfd_error_bad_value);
5980 return FALSE;
5981 }
5982
5983 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5984 {
5985 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5986 {
4eca0228 5987 _bfd_error_handler
871b3ab2 5988 (_("%pB: error: Instruction set mismatch with previous modules."), ibfd);
35c08157
KLC		 5989
5990 bfd_set_error (bfd_error_bad_value);
5991 return FALSE;
5992 }
5993 }
5994
5995 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
5996 and perf ext1 and DIV are mergerd to perf ext1. */
5997 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
5998 {
5999 elf_elfheader (obfd)->e_flags =
6000 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6001 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6002 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6003 ? E_NDS32_HAS_EXT_INST : 0)
6004 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6005 ? E_NDS32_HAS_EXT_INST : 0)
6006 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6007 | ((in_version > out_version) ? out_version : in_version);
6008 }
6009 else
6010 {
6011 if (in_version != out_version)
4eca0228 6012 _bfd_error_handler
695344c0 6013 /* xgettext:c-format */
871b3ab2 6014 (_("%pB: warning: Incompatible elf-versions %s and %s."),
4eca0228
AM		 6015 ibfd, nds32_elfver_strtab[out_version],
6016 nds32_elfver_strtab[in_version]);
35c08157
KLC		 6017
6018 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6019 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6020 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6021 | (in_version > out_version ? out_version : in_version);
6022 }
6023
6024 return TRUE;
6025}
6026
6027/* Display the flags field. */
6028
6029static bfd_boolean
6030nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6031{
6032 FILE *file = (FILE *) ptr;
6033
6034 BFD_ASSERT (abfd != NULL && ptr != NULL);
6035
6036 _bfd_elf_print_private_bfd_data (abfd, ptr);
6037
6038 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6039
6040 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6041 {
6042 default:
6043 case E_N1_ARCH:
6044 fprintf (file, _(": n1 instructions"));
6045 break;
6046 case E_N1H_ARCH:
6047 fprintf (file, _(": n1h instructions"));
6048 break;
6049 }
6050
6051 fputc ('\n', file);
6052
6053 return TRUE;
6054}
6055
6056static unsigned int
6057nds32_elf_action_discarded (asection *sec)
6058{
6059
6060 if (strncmp
6061 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6062 return 0;
6063
6064 return _bfd_elf_default_action_discarded (sec);
6065}
6066
6067static asection *
6068nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6069 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6070 Elf_Internal_Sym *sym)
6071{
6072 if (h != NULL)
6073 switch (ELF32_R_TYPE (rel->r_info))
6074 {
6075 case R_NDS32_GNU_VTINHERIT:
6076 case R_NDS32_GNU_VTENTRY:
6077 case R_NDS32_RELA_GNU_VTINHERIT:
6078 case R_NDS32_RELA_GNU_VTENTRY:
6079 return NULL;
6080 }
6081
6082 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6083}
6084
35c08157
KLC		 6085/* Look through the relocs for a section during the first phase.
6086 Since we don't do .gots or .plts, we just need to consider the
6087 virtual table relocs for gc. */
6088
6089static bfd_boolean
6090nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6091 asection *sec, const Elf_Internal_Rela *relocs)
6092{
6093 Elf_Internal_Shdr *symtab_hdr;
6094 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6095 const Elf_Internal_Rela *rel;
6096 const Elf_Internal_Rela *rel_end;
6097 struct elf_nds32_link_hash_table *htab;
6098 bfd *dynobj;
6099 asection *sreloc = NULL;
6100
0e1862bb 6101 if (bfd_link_relocatable (info))
35c08157
KLC		 6102 return TRUE;
6103
65281396
AM		 6104 /* Don't do anything special with non-loaded, non-alloced sections.
6105 In particular, any relocs in such sections should not affect GOT
6106 and PLT reference counting (ie. we don't allow them to create GOT
6107 or PLT entries), there's no possibility or desire to optimize TLS
6108 relocs, and there's not much point in propagating relocs to shared
6109 libs that the dynamic linker won't relocate. */
6110 if ((sec->flags & SEC_ALLOC) == 0)
6111 return TRUE;
6112
35c08157
KLC		 6113 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6114 sym_hashes = elf_sym_hashes (abfd);
6115 sym_hashes_end =
6116 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6117 if (!elf_bad_symtab (abfd))
6118 sym_hashes_end -= symtab_hdr->sh_info;
6119
6120 htab = nds32_elf_hash_table (info);
6121 dynobj = htab->root.dynobj;
6122
6123 rel_end = relocs + sec->reloc_count;
6124 for (rel = relocs; rel < rel_end; rel++)
6125 {
6126 enum elf_nds32_reloc_type r_type;
6127 struct elf_link_hash_entry *h;
6128 unsigned long r_symndx;
1c8f6a4d 6129 int tls_type, old_tls_type;
35c08157
KLC		 6130
6131 r_symndx = ELF32_R_SYM (rel->r_info);
6132 r_type = ELF32_R_TYPE (rel->r_info);
6133 if (r_symndx < symtab_hdr->sh_info)
6134 h = NULL;
6135 else
6136 {
6137 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6138 while (h->root.type == bfd_link_hash_indirect
6139 || h->root.type == bfd_link_hash_warning)
6140 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6141 }
6142
1c8f6a4d
KLC		 6143 /* Some relocs require a global offset table. We create
6144 got section here, since these relocation need got section
6145 and it is not created yet. */
ce558b89 6146 if (htab->root.sgot == NULL)
35c08157
KLC		 6147 {
6148 switch (r_type)
6149 {
6150 case R_NDS32_GOT_HI20:
6151 case R_NDS32_GOT_LO12:
6152 case R_NDS32_GOT_LO15:
6153 case R_NDS32_GOT_LO19:
6154 case R_NDS32_GOT17S2_RELA:
6155 case R_NDS32_GOT15S2_RELA:
6156 case R_NDS32_GOTOFF:
6157 case R_NDS32_GOTOFF_HI20:
6158 case R_NDS32_GOTOFF_LO12:
6159 case R_NDS32_GOTOFF_LO15:
6160 case R_NDS32_GOTOFF_LO19:
6161 case R_NDS32_GOTPC20:
6162 case R_NDS32_GOTPC_HI20:
6163 case R_NDS32_GOTPC_LO12:
6164 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6165 case R_NDS32_TLS_IE_HI20:
6166 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6167 if (dynobj == NULL)
6168 htab->root.dynobj = dynobj = abfd;
ce558b89 6169 if (!_bfd_elf_create_got_section (dynobj, info))
35c08157
KLC		 6170 return FALSE;
6171 break;
6172
6173 default:
6174 break;
6175 }
6176 }
6177
6178 switch ((int) r_type)
6179 {
6180 case R_NDS32_GOT_HI20:
6181 case R_NDS32_GOT_LO12:
6182 case R_NDS32_GOT_LO15:
6183 case R_NDS32_GOT_LO19:
6184 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6185 case R_NDS32_TLS_IE_HI20:
6186 case R_NDS32_TLS_IE_LO12S2:
6187 switch (r_type)
6188 {
6189 case R_NDS32_TLS_IE_HI20:
6190 case R_NDS32_TLS_IE_LO12S2:
6191 tls_type = GOT_TLS_IE;
6192 break;
6193 default:
6194 tls_type = GOT_NORMAL;
6195 break;
6196 }
35c08157 6197 if (h != NULL)
1c8f6a4d
KLC		 6198 {
6199 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6200 h->got.refcount += 1;
6201 }
35c08157
KLC		 6202 else
6203 {
6204 bfd_signed_vma *local_got_refcounts;
6205
6206 /* This is a global offset table entry for a local
6207 symbol. */
6208 local_got_refcounts = elf_local_got_refcounts (abfd);
6209 if (local_got_refcounts == NULL)
6210 {
6211 bfd_size_type size;
6212
6213 size = symtab_hdr->sh_info;
6214 size *= sizeof (bfd_signed_vma);
6215 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6216 if (local_got_refcounts == NULL)
6217 return FALSE;
6218 elf_local_got_refcounts (abfd) = local_got_refcounts;
6219 }
6220 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6221 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6222 }
35c08157 6223
1c8f6a4d
KLC		 6224 /* We will already have issued an error message if there
6225 is a TLS/non-TLS mismatch, based on the symbol
6226 type. So just combine any TLS types needed. */
6227 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6228 && tls_type != GOT_NORMAL)
6229 tls_type |= old_tls_type;
6230
6231 if (old_tls_type != tls_type)
6232 {
6233 if (h != NULL)
6234 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6235 else
6236 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6237 }
6238 break;
6239 case R_NDS32_9_PLTREL:
35c08157
KLC		 6240 case R_NDS32_25_PLTREL:
6241 case R_NDS32_PLTREL_HI20:
6242 case R_NDS32_PLTREL_LO12:
6243 case R_NDS32_PLT_GOTREL_HI20:
6244 case R_NDS32_PLT_GOTREL_LO12:
6245 case R_NDS32_PLT_GOTREL_LO15:
6246 case R_NDS32_PLT_GOTREL_LO19:
6247 case R_NDS32_PLT_GOTREL_LO20:
6248
6249 /* This symbol requires a procedure linkage table entry. We
6250 actually build the entry in adjust_dynamic_symbol,
6251 because this might be a case of linking PIC code without
6252 linking in any dynamic objects, in which case we don't
6253 need to generate a procedure linkage table after all. */
6254
6255 /* If this is a local symbol, we resolve it directly without
6256 creating a procedure linkage table entry. */
6257 if (h == NULL)
6258 continue;
6259
6260 if (h->forced_local)
6261 break;
6262
1c8f6a4d 6263 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6264 h->needs_plt = 1;
6265 h->plt.refcount += 1;
6266 break;
6267
6268 case R_NDS32_16_RELA:
6269 case R_NDS32_20_RELA:
6270 case R_NDS32_5_RELA:
6271 case R_NDS32_32_RELA:
6272 case R_NDS32_HI20_RELA:
6273 case R_NDS32_LO12S3_RELA:
6274 case R_NDS32_LO12S2_RELA:
6275 case R_NDS32_LO12S2_DP_RELA:
6276 case R_NDS32_LO12S2_SP_RELA:
6277 case R_NDS32_LO12S1_RELA:
6278 case R_NDS32_LO12S0_RELA:
6279 case R_NDS32_LO12S0_ORI_RELA:
6280 case R_NDS32_SDA16S3_RELA:
6281 case R_NDS32_SDA17S2_RELA:
6282 case R_NDS32_SDA18S1_RELA:
6283 case R_NDS32_SDA19S0_RELA:
6284 case R_NDS32_SDA15S3_RELA:
6285 case R_NDS32_SDA15S2_RELA:
6286 case R_NDS32_SDA12S2_DP_RELA:
6287 case R_NDS32_SDA12S2_SP_RELA:
6288 case R_NDS32_SDA15S1_RELA:
6289 case R_NDS32_SDA15S0_RELA:
6290 case R_NDS32_SDA_FP7U2_RELA:
6291 case R_NDS32_15_PCREL_RELA:
6292 case R_NDS32_17_PCREL_RELA:
6293 case R_NDS32_25_PCREL_RELA:
6294
0e1862bb 6295 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 6296 {
6297 h->non_got_ref = 1;
6298 h->plt.refcount += 1;
6299 }
6300
6301 /* If we are creating a shared library, and this is a reloc against
6302 a global symbol, or a non PC relative reloc against a local
6303 symbol, then we need to copy the reloc into the shared library.
6304 However, if we are linking with -Bsymbolic, we do not need to
6305 copy a reloc against a global symbol which is defined in an
6306 object we are including in the link (i.e., DEF_REGULAR is set).
6307 At this point we have not seen all the input files, so it is
6308 possible that DEF_REGULAR is not set now but will be set later
6309 (it is never cleared). We account for that possibility below by
6310 storing information in the dyn_relocs field of the hash table
6311 entry. A similar situation occurs when creating shared libraries
6312 and symbol visibility changes render the symbol local.
6313
6314 If on the other hand, we are creating an executable, we may need
6315 to keep relocations for symbols satisfied by a dynamic library
6316 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6317 if ((bfd_link_pic (info)
35c08157
KLC		 6318 && (sec->flags & SEC_ALLOC) != 0
6319 && ((r_type != R_NDS32_25_PCREL_RELA
6320 && r_type != R_NDS32_15_PCREL_RELA
6321 && r_type != R_NDS32_17_PCREL_RELA
6322 && !(r_type == R_NDS32_32_RELA
6323 && strcmp (sec->name, ".eh_frame") == 0))
6324 || (h != NULL
6325 && (!info->symbolic
6326 || h->root.type == bfd_link_hash_defweak
6327 || !h->def_regular))))
0e1862bb 6328 || (!bfd_link_pic (info)
35c08157
KLC		 6329 && (sec->flags & SEC_ALLOC) != 0
6330 && h != NULL
6331 && (h->root.type == bfd_link_hash_defweak
6332 || !h->def_regular)))
6333 {
3bf083ed
AM		 6334 struct elf_dyn_relocs *p;
6335 struct elf_dyn_relocs **head;
35c08157
KLC		 6336
6337 if (dynobj == NULL)
6338 htab->root.dynobj = dynobj = abfd;
6339
6340 /* When creating a shared object, we must copy these
6341 relocs into the output file. We create a reloc
6342 section in dynobj and make room for the reloc. */
6343 if (sreloc == NULL)
6344 {
6345 const char *name;
6346
6347 name = bfd_elf_string_from_elf_section
6348 (abfd, elf_elfheader (abfd)->e_shstrndx,
6349 elf_section_data (sec)->rela.hdr->sh_name);
6350 if (name == NULL)
6351 return FALSE;
6352
6353 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6354 && strcmp (bfd_get_section_name (abfd, sec),
6355 name + 5) == 0);
6356
6357 sreloc = bfd_get_section_by_name (dynobj, name);
6358 if (sreloc == NULL)
6359 {
6360 flagword flags;
6361
6362 sreloc = bfd_make_section (dynobj, name);
6363 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6364 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6365 if ((sec->flags & SEC_ALLOC) != 0)
6366 flags |= SEC_ALLOC | SEC_LOAD;
6367 if (sreloc == NULL
6368 || !bfd_set_section_flags (dynobj, sreloc, flags)
6369 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6370 return FALSE;
6371
6372 elf_section_type (sreloc) = SHT_RELA;
6373 }
6374 elf_section_data (sec)->sreloc = sreloc;
6375 }
6376
6377 /* If this is a global symbol, we count the number of
6378 relocations we need for this symbol. */
6379 if (h != NULL)
6380 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6381 else
6382 {
6383 asection *s;
61034b0b 6384 void *vpp;
35c08157
KLC		 6385
6386 Elf_Internal_Sym *isym;
6387 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6388 if (isym == NULL)
6389 return FALSE;
6390
6391 /* Track dynamic relocs needed for local syms too. */
6392 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6393 if (s == NULL)
6394 return FALSE;
6395
61034b0b 6396 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 6397 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC		 6398 }
6399
6400 p = *head;
6401 if (p == NULL || p->sec != sec)
6402 {
6403 bfd_size_type amt = sizeof (*p);
3bf083ed 6404 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157
KLC		 6405 if (p == NULL)
6406 return FALSE;
6407 p->next = *head;
6408 *head = p;
6409 p->sec = sec;
6410 p->count = 0;
6411 p->pc_count = 0;
6412 }
6413
6414 p->count += 1;
6415 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6416 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6417 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6418 p->pc_count += 1;
6419 }
6420 break;
6421
6422 /* This relocation describes the C++ object vtable hierarchy.
6423 Reconstruct it for later use during GC. */
6424 case R_NDS32_RELA_GNU_VTINHERIT:
6425 case R_NDS32_GNU_VTINHERIT:
6426 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6427 return FALSE;
6428 break;
6429
6430 /* This relocation describes which C++ vtable entries are actually
6431 used. Record for later use during GC. */
6432 case R_NDS32_GNU_VTENTRY:
6433 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6434 return FALSE;
6435 break;
6436 case R_NDS32_RELA_GNU_VTENTRY:
6437 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6438 return FALSE;
6439 break;
6440 }
6441 }
6442
6443 return TRUE;
6444}
6445
6446/* Write VAL in uleb128 format to P, returning a pointer to the
6447 following byte.
6448 This code is copied from elf-attr.c. */
6449
6450static bfd_byte *
6451write_uleb128 (bfd_byte *p, unsigned int val)
6452{
6453 bfd_byte c;
6454 do
6455 {
6456 c = val & 0x7f;
6457 val >>= 7;
6458 if (val)
6459 c |= 0x80;
6460 *(p++) = c;
6461 }
6462 while (val);
6463 return p;
6464}
6465
6466static bfd_signed_vma
6467calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6468 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6469 int *pic_ext_target)
6470{
6471 bfd_signed_vma foff;
6472 bfd_vma symval, addend;
6473 asection *sym_sec;
6474
6475 /* Get the value of the symbol referred to by the reloc. */
6476 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6477 {
6478 Elf_Internal_Sym *isym;
6479
6480 /* A local symbol. */
6481 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6482
6483 if (isym->st_shndx == SHN_UNDEF)
6484 sym_sec = bfd_und_section_ptr;
6485 else if (isym->st_shndx == SHN_ABS)
6486 sym_sec = bfd_abs_section_ptr;
6487 else if (isym->st_shndx == SHN_COMMON)
6488 sym_sec = bfd_com_section_ptr;
6489 else
6490 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6491 symval = isym->st_value + sym_sec->output_section->vma
6492 + sym_sec->output_offset;
6493 }
6494 else
6495 {
6496 unsigned long indx;
6497 struct elf_link_hash_entry *h;
6498 bfd *owner;
6499
6500 /* An external symbol. */
6501 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6502 h = elf_sym_hashes (abfd)[indx];
6503 BFD_ASSERT (h != NULL);
6504
6505 if (h->root.type != bfd_link_hash_defined
6506 && h->root.type != bfd_link_hash_defweak)
6507 /* This appears to be a reference to an undefined
6508 symbol. Just ignore it--it will be caught by the
6509 regular reloc processing. */
6510 return 0;
6511 owner = h->root.u.def.section->owner;
6512 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6513 *pic_ext_target = 1;
6514
6515 if (h->root.u.def.section->flags & SEC_MERGE)
6516 {
6517 sym_sec = h->root.u.def.section;
6518 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6519 elf_section_data (sym_sec)->sec_info,
6520 h->root.u.def.value);
6521 symval = symval + sym_sec->output_section->vma
6522 + sym_sec->output_offset;
6523 }
6524 else
6525 symval = (h->root.u.def.value
6526 + h->root.u.def.section->output_section->vma
6527 + h->root.u.def.section->output_offset);
6528 }
6529
6530 addend = irel->r_addend;
6531
6532 foff = (symval + addend
6533 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6534 return foff;
6535}
6536
6537static bfd_vma
6538calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6539 Elf_Internal_Sym *isymbuf,
6540 Elf_Internal_Rela *irel,
6541 Elf_Internal_Shdr *symtab_hdr)
6542{
6543 bfd_vma symval;
6544
6545 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6546 {
6547 Elf_Internal_Sym *isym;
6548 asection *sym_sec;
6549 /* A local symbol. */
6550 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6551
6552 if (isym->st_shndx == SHN_UNDEF)
6553 sym_sec = bfd_und_section_ptr;
6554 else if (isym->st_shndx == SHN_ABS)
6555 sym_sec = bfd_abs_section_ptr;
6556 else if (isym->st_shndx == SHN_COMMON)
6557 sym_sec = bfd_com_section_ptr;
6558 else
6559 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6560 symval = isym->st_value + sym_sec->output_section->vma
6561 + sym_sec->output_offset;
6562 }
6563 else
6564 {
6565 unsigned long indx;
6566 struct elf_link_hash_entry *h;
6567 struct elf_nds32_link_hash_table *htab;
6568 asection *splt;
6569
6570 /* An external symbol. */
6571 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6572 h = elf_sym_hashes (abfd)[indx];
6573 BFD_ASSERT (h != NULL);
6574 htab = nds32_elf_hash_table (link_info);
ce558b89 6575 splt = htab->root.splt;
35c08157
KLC		 6576
6577 while (h->root.type == bfd_link_hash_indirect
6578 || h->root.type == bfd_link_hash_warning)
6579 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6580
6581 if (h->plt.offset == (bfd_vma) - 1)
6582 {
6583 if (h->root.type != bfd_link_hash_defined
6584 && h->root.type != bfd_link_hash_defweak)
6585 /* This appears to be a reference to an undefined
6586 * symbol. Just ignore it--it will be caught by the
6587 * regular reloc processing. */
6588 return 0;
6589 symval = (h->root.u.def.value
6590 + h->root.u.def.section->output_section->vma
6591 + h->root.u.def.section->output_offset);
6592 }
6593 else
6594 symval = splt->output_section->vma + h->plt.offset;
6595 }
6596
6597 return symval;
6598}
6599
6600static bfd_signed_vma
6601calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6602 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6603 Elf_Internal_Shdr *symtab_hdr)
6604{
6605 bfd_vma foff;
6606 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6607 symtab_hdr)) == 0)
6608 return 0;
6609 else
6610 return foff - (irel->r_offset
6611 + sec->output_section->vma + sec->output_offset);
6612}
6613\f
6614/* Convert a 32-bit instruction to 16-bit one.
6615 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6616 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6617 type of INSN16. Return 1 if successful. */
6618
6619static int
6620nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6621 int *pinsn_type)
6622{
6623 uint16_t insn16 = 0;
6cae483a 6624 int insn_type = 0;
35c08157
KLC		 6625 unsigned long mach = bfd_get_mach (abfd);
6626
6627 if (N32_SH5 (insn) != 0)
6628 return 0;
6629
6630 switch (N32_SUB5 (insn))
6631 {
6632 case N32_ALU1_ADD_SLLI:
6633 case N32_ALU1_ADD_SRLI:
6634 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6635 {
6636 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6637 N32_RB5 (insn));
6638 insn_type = NDS32_INSN_ADD333;
6639 }
6640 else if (N32_IS_RT4 (insn))
6641 {
6642 if (N32_RT5 (insn) == N32_RA5 (insn))
6643 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6644 else if (N32_RT5 (insn) == N32_RB5 (insn))
6645 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6646 insn_type = NDS32_INSN_ADD45;
6647 }
6648 break;
6649
6650 case N32_ALU1_SUB_SLLI:
6651 case N32_ALU1_SUB_SRLI:
6652 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6653 {
6654 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6655 N32_RB5 (insn));
6656 insn_type = NDS32_INSN_SUB333;
6657 }
6658 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6659 {
6660 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6661 insn_type = NDS32_INSN_SUB45;
6662 }
6663 break;
6664
6665 case N32_ALU1_AND_SLLI:
6666 case N32_ALU1_AND_SRLI:
6667 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6668 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6669 && N32_IS_RB3 (insn))
6670 {
6671 if (N32_RT5 (insn) == N32_RA5 (insn))
6672 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6673 else if (N32_RT5 (insn) == N32_RB5 (insn))
6674 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6675 if (insn16)
6676 insn_type = NDS32_INSN_AND33;
6677 }
6678 break;
6679
6680 case N32_ALU1_XOR_SLLI:
6681 case N32_ALU1_XOR_SRLI:
6682 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6683 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6684 && N32_IS_RB3 (insn))
6685 {
6686 if (N32_RT5 (insn) == N32_RA5 (insn))
6687 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6688 else if (N32_RT5 (insn) == N32_RB5 (insn))
6689 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6690 if (insn16)
6691 insn_type = NDS32_INSN_XOR33;
6692 }
6693 break;
6694
6695 case N32_ALU1_OR_SLLI:
6696 case N32_ALU1_OR_SRLI:
6697 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6698 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6699 && N32_IS_RB3 (insn))
6700 {
6701 if (N32_RT5 (insn) == N32_RA5 (insn))
6702 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6703 else if (N32_RT5 (insn) == N32_RB5 (insn))
6704 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6705 if (insn16)
6706 insn_type = NDS32_INSN_OR33;
6707 }
6708 break;
6709 case N32_ALU1_NOR:
6710 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6711 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6712 && N32_RA5 (insn) == N32_RB5 (insn))
6713 {
6714 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6715 insn_type = NDS32_INSN_NOT33;
6716 }
6717 break;
6718 case N32_ALU1_SRAI:
6719 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6720 {
6721 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6722 insn_type = NDS32_INSN_SRAI45;
6723 }
6724 break;
6725
6726 case N32_ALU1_SRLI:
6727 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6728 {
6729 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6730 insn_type = NDS32_INSN_SRLI45;
6731 }
6732 break;
6733
6734 case N32_ALU1_SLLI:
6735 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6736 {
6737 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6738 N32_UB5 (insn));
6739 insn_type = NDS32_INSN_SLLI333;
6740 }
6741 break;
6742
6743 case N32_ALU1_ZEH:
6744 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6745 {
6746 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6747 insn_type = NDS32_INSN_ZEH33;
6748 }
6749 break;
6750
6751 case N32_ALU1_SEB:
6752 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6753 {
6754 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6755 insn_type = NDS32_INSN_SEB33;
6756 }
6757 break;
6758
6759 case N32_ALU1_SEH:
6760 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6761 {
6762 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6763 insn_type = NDS32_INSN_SEH33;
6764 }
6765 break;
6766
6767 case N32_ALU1_SLT:
6768 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6769 {
6770 /* Implicit r15. */
6771 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6772 insn_type = NDS32_INSN_SLT45;
6773 }
6774 break;
6775
6776 case N32_ALU1_SLTS:
6777 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6778 {
6779 /* Implicit r15. */
6780 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6781 insn_type = NDS32_INSN_SLTS45;
6782 }
6783 break;
6784 }
6785
6786 if ((insn16 & 0x8000) == 0)
6787 return 0;
6788
6789 if (pinsn16)
6790 *pinsn16 = insn16;
6791 if (pinsn_type)
6792 *pinsn_type = insn_type;
6793 return 1;
6794}
6795
6796static int
6797nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6798 int *pinsn_type)
6799{
6800 uint16_t insn16 = 0;
6801 int insn_type;
6802 unsigned long mach = bfd_get_mach (abfd);
6803
6804 /* TODO: bset, bclr, btgl, btst. */
6805 if (__GF (insn, 6, 4) != 0)
6806 return 0;
6807
6808 switch (N32_IMMU (insn, 6))
6809 {
6810 case N32_ALU2_MUL:
6811 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6812 && N32_IS_RB3 (insn))
6813 {
6814 if (N32_RT5 (insn) == N32_RA5 (insn))
6815 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6816 else if (N32_RT5 (insn) == N32_RB5 (insn))
6817 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6818 if (insn16)
6819 insn_type = NDS32_INSN_MUL33;
6820 }
6821 }
6822
6823 if ((insn16 & 0x8000) == 0)
6824 return 0;
6825
6826 if (pinsn16)
6827 *pinsn16 = insn16;
6828 if (pinsn_type)
6829 *pinsn_type = insn_type;
6830 return 1;
6831}
6832
6833int
6834nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6835 int *pinsn_type)
6836{
6837 int op6;
6838 uint16_t insn16 = 0;
6839 int insn_type;
6840 unsigned long mach = bfd_get_mach (abfd);
6841
6842 /* Decode 32-bit instruction. */
6843 if (insn & 0x80000000)
6844 {
6845 /* Not 32-bit insn. */
6846 return 0;
6847 }
6848
6849 op6 = N32_OP6 (insn);
6850
6851 /* Convert it to 16-bit instruction. */
6852 switch (op6)
6853 {
6854 case N32_OP6_MOVI:
6855 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6856 {
6857 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6858 insn_type = NDS32_INSN_MOVI55;
6859 }
6860 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6861 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6862 {
6863 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6864 N32_IMM20S (insn) - 16);
6865 insn_type = NDS32_INSN_MOVPI45;
6866 }
6867 break;
6868
6869 case N32_OP6_ADDI:
6870 if (N32_IMM15S (insn) == 0)
6871 {
6872 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6873 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6874 if (mach <= MACH_V2
6875 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6876 {
6877 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6878 insn_type = NDS32_INSN_MOV55;
6879 }
6880 }
6881 else if (N32_IMM15S (insn) > 0)
6882 {
6883 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6884 {
6885 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6886 N32_IMM15S (insn));
6887 insn_type = NDS32_INSN_ADDI333;
6888 }
6889 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6890 && N32_IMM15S (insn) < 32)
6891 {
6892 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6893 insn_type = NDS32_INSN_ADDI45;
6894 }
6895 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6896 && N32_RT5 (insn) == N32_RA5 (insn)
6897 && N32_IMM15S (insn) < 512)
6898 {
6899 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6900 insn_type = NDS32_INSN_ADDI10_SP;
6901 }
6902 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6903 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6904 && (N32_IMM15S (insn) % 4 == 0))
6905 {
6906 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6907 N32_IMM15S (insn) >> 2);
6908 insn_type = NDS32_INSN_ADDRI36_SP;
6909 }
6910 }
6911 else
6912 {
6913 /* Less than 0. */
6914 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6915 {
6916 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6917 0 - N32_IMM15S (insn));
6918 insn_type = NDS32_INSN_SUBI333;
6919 }
6920 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6921 && N32_IMM15S (insn) > -32)
6922 {
1c8f6a4d
KLC		 6923 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6924 0 - N32_IMM15S (insn));
35c08157
KLC		 6925 insn_type = NDS32_INSN_SUBI45;
6926 }
6927 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6928 && N32_RT5 (insn) == N32_RA5 (insn)
6929 && N32_IMM15S (insn) >= -512)
6930 {
6931 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6932 insn_type = NDS32_INSN_ADDI10_SP;
6933 }
6934 }
6935 break;
6936
6937 case N32_OP6_ORI:
6938 if (N32_IMM15S (insn) == 0)
6939 {
6940 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6941 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6942 if (mach <= MACH_V2
6943 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6944 {
6945 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6946 insn_type = NDS32_INSN_MOV55;
6947 }
6948 }
6949 break;
6950
6951 case N32_OP6_SUBRI:
6952 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6953 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6954 {
6955 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6956 insn_type = NDS32_INSN_NEG33;
6957 }
6958 break;
6959
6960 case N32_OP6_ANDI:
6961 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6962 {
6963 if (N32_IMM15U (insn) == 1)
6964 {
6965 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6966 insn_type = NDS32_INSN_XLSB33;
6967 }
6968 else if (N32_IMM15U (insn) == 0x7ff)
6969 {
6970 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6971 insn_type = NDS32_INSN_X11B33;
6972 }
6973 else if (N32_IMM15U (insn) == 0xff)
6974 {
6975 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6976 insn_type = NDS32_INSN_ZEB33;
6977 }
6978 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6979 && N32_IMM15U (insn) < 256)
6980 {
6981 int imm15u = N32_IMM15U (insn);
6982
6983 if (__builtin_popcount (imm15u) == 1)
6984 {
6985 /* BMSKI33 */
6986 int imm3u = __builtin_ctz (imm15u);
6987
6988 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
6989 insn_type = NDS32_INSN_BMSKI33;
6990 }
6991 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
6992 {
6993 /* FEXTI33 */
6994 int imm3u = __builtin_ctz (imm15u + 1) - 1;
6995
6996 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
6997 insn_type = NDS32_INSN_FEXTI33;
6998 }
6999 }
7000 }
7001 break;
7002
7003 case N32_OP6_SLTI:
7004 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7005 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7006 {
7007 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7008 insn_type = NDS32_INSN_SLTI45;
7009 }
7010 break;
7011
7012 case N32_OP6_SLTSI:
7013 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7014 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7015 {
7016 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7017 insn_type = NDS32_INSN_SLTSI45;
7018 }
7019 break;
7020
7021 case N32_OP6_LWI:
7022 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7023 {
7024 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7025 insn_type = NDS32_INSN_LWI450;
7026 }
7027 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7028 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7029 {
7030 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7031 N32_IMM15S (insn));
7032 insn_type = NDS32_INSN_LWI333;
7033 }
7034 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7035 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7036 {
7037 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7038 insn_type = NDS32_INSN_LWI37;
7039 }
7040 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7041 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7042 {
7043 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7044 insn_type = NDS32_INSN_LWI37_SP;
7045 }
7046 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7047 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7048 {
1c8f6a4d
KLC		 7049 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7050 N32_IMM15S (insn) + 32);
35c08157
KLC		 7051 insn_type = NDS32_INSN_LWI45_FE;
7052 }
7053 break;
7054
7055 case N32_OP6_SWI:
7056 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7057 {
7058 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7059 insn_type = NDS32_INSN_SWI450;
7060 }
7061 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7062 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7063 {
1c8f6a4d
KLC		 7064 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7065 N32_IMM15S (insn));
35c08157
KLC		 7066 insn_type = NDS32_INSN_SWI333;
7067 }
7068 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7069 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7070 {
7071 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7072 insn_type = NDS32_INSN_SWI37;
7073 }
7074 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7075 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7076 {
7077 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7078 insn_type = NDS32_INSN_SWI37_SP;
7079 }
7080 break;
7081
7082 case N32_OP6_LWI_BI:
7083 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7084 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7085 {
7086 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7087 N32_IMM15S (insn));
7088 insn_type = NDS32_INSN_LWI333_BI;
7089 }
7090 break;
7091
7092 case N32_OP6_SWI_BI:
7093 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7094 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7095 {
7096 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7097 N32_IMM15S (insn));
7098 insn_type = NDS32_INSN_SWI333_BI;
7099 }
7100 break;
7101
7102 case N32_OP6_LHI:
7103 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7104 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7105 {
7106 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7107 N32_IMM15S (insn));
7108 insn_type = NDS32_INSN_LHI333;
7109 }
7110 break;
7111
7112 case N32_OP6_SHI:
7113 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7114 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7115 {
7116 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7117 N32_IMM15S (insn));
7118 insn_type = NDS32_INSN_SHI333;
7119 }
7120 break;
7121
7122 case N32_OP6_LBI:
7123 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7124 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7125 {
7126 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7127 N32_IMM15S (insn));
7128 insn_type = NDS32_INSN_LBI333;
7129 }
7130 break;
7131
7132 case N32_OP6_SBI:
7133 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7134 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7135 {
7136 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7137 N32_IMM15S (insn));
7138 insn_type = NDS32_INSN_SBI333;
7139 }
7140 break;
7141
7142 case N32_OP6_ALU1:
7143 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7144
7145 case N32_OP6_ALU2:
7146 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7147
7148 case N32_OP6_BR1:
7149 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7150 goto done;
7151
4ec521f2 7152 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC		 7153 {
7154 /* N32_BR1_BEQ */
7155 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7156 && N32_RT5 (insn) != REG_R5)
7157 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7158 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7159 && N32_RA5 (insn) != REG_R5)
7160 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7161 insn_type = NDS32_INSN_BEQS38;
7162 break;
7163 }
7164 else
7165 {
7166 /* N32_BR1_BNE */
7167 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7168 && N32_RT5 (insn) != REG_R5)
7169 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7170 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7171 && N32_RA5 (insn) != REG_R5)
7172 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7173 insn_type = NDS32_INSN_BNES38;
7174 break;
7175 }
7176 break;
7177
7178 case N32_OP6_BR2:
7179 switch (N32_BR2_SUB (insn))
7180 {
7181 case N32_BR2_BEQZ:
7182 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7183 {
7184 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7185 insn_type = NDS32_INSN_BEQZ38;
7186 }
1c8f6a4d
KLC		 7187 else if (N32_RT5 (insn) == REG_R15
7188 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7189 {
7190 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7191 insn_type = NDS32_INSN_BEQZS8;
7192 }
7193 break;
7194
7195 case N32_BR2_BNEZ:
7196 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7197 {
7198 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7199 insn_type = NDS32_INSN_BNEZ38;
7200 }
1c8f6a4d
KLC		 7201 else if (N32_RT5 (insn) == REG_R15
7202 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7203 {
7204 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7205 insn_type = NDS32_INSN_BNEZS8;
7206 }
7207 break;
7208
7209 case N32_BR2_IFCALL:
7210 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7211 {
7212 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7213 insn_type = NDS32_INSN_IFCALL9;
7214 }
7215 break;
7216 }
7217 break;
7218
7219 case N32_OP6_JI:
4ec521f2 7220 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC		 7221 {
7222 /* N32_JI_J */
7223 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7224 {
7225 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7226 insn_type = NDS32_INSN_J8;
7227 }
7228 }
7229 break;
7230
7231 case N32_OP6_JREG:
7232 if (__GF (insn, 8, 2) != 0)
7233 goto done;
7234
7235 switch (N32_IMMU (insn, 5))
7236 {
7237 case N32_JREG_JR:
7238 if (N32_JREG_HINT (insn) == 0)
7239 {
7240 /* jr */
7241 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7242 insn_type = NDS32_INSN_JR5;
7243 }
7244 else if (N32_JREG_HINT (insn) == 1)
7245 {
7246 /* ret */
7247 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7248 insn_type = NDS32_INSN_RET5;
7249 }
7250 else if (N32_JREG_HINT (insn) == 3)
7251 {
7252 /* ifret = mov55 $sp, $sp */
7253 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7254 insn_type = NDS32_INSN_IFRET;
7255 }
7256 break;
7257
7258 case N32_JREG_JRAL:
7259 /* It's convertible when return rt5 is $lp and address
7260 translation is kept. */
7261 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7262 {
7263 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7264 insn_type = NDS32_INSN_JRAL5;
7265 }
7266 break;
7267 }
7268 break;
7269
7270 case N32_OP6_MISC:
7271 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7272 {
7273 /* For v3, swid above 31 are used for ex9.it. */
7274 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7275 insn_type = NDS32_INSN_BREAK16;
7276 }
7277 break;
7278
7279 default:
7280 /* This instruction has no 16-bit variant. */
7281 goto done;
7282 }
7283
7284done:
7285 /* Bit-15 of insn16 should be set for a valid instruction. */
7286 if ((insn16 & 0x8000) == 0)
7287 return 0;
7288
7289 if (pinsn16)
7290 *pinsn16 = insn16;
7291 if (pinsn_type)
7292 *pinsn_type = insn_type;
7293 return 1;
7294}
7295
7296static int
7297special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7298 Elf_Internal_Rela *reloc)
7299{
7300 uint16_t insn16 = 0;
7301
7302 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7303 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7304 return 0;
7305
7306 if (!N32_IS_RT3 (insn))
7307 return 0;
7308
7309 switch (N32_OP6 (insn))
7310 {
7311 case N32_OP6_LWI:
7312 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7313 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7314 break;
7315 case N32_OP6_SWI:
7316 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7317 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7318 break;
7319 case N32_OP6_HWGP:
7320 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7321 break;
7322
7323 if (__GF (insn, 17, 3) == 6)
7324 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7325 else if (__GF (insn, 17, 3) == 7)
7326 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7327 break;
7328 }
7329
7330 if ((insn16 & 0x8000) == 0)
7331 return 0;
7332
7333 *pinsn16 = insn16;
7334 return 1;
7335}
7336
7337/* Convert a 16-bit instruction to 32-bit one.
7338 INSN16 it the input and PINSN it the point to output.
7339 Return non-zero on successful. Otherwise 0 is returned. */
7340
7341int
7342nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7343{
7344 uint32_t insn = 0xffffffff;
7345 unsigned long mach = bfd_get_mach (abfd);
7346
7347 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7348
7349 switch (__GF (insn16, 9, 6))
7350 {
7351 case 0x4: /* add45 */
1c8f6a4d
KLC		 7352 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7353 N16_RA5 (insn16));
35c08157
KLC		 7354 goto done;
7355 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7356 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7357 N16_RA5 (insn16));
35c08157
KLC		 7358 goto done;
7359 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7360 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7361 N16_IMM5U (insn16));
35c08157
KLC		 7362 goto done;
7363 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7364 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7365 -N16_IMM5U (insn16));
35c08157
KLC		 7366 goto done;
7367 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7368 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7369 N16_IMM5U (insn16));
35c08157
KLC		 7370 goto done;
7371 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7372 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7373 N16_IMM5U (insn16));
35c08157 7374 goto done;
35c08157 7375 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7376 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7377 N16_IMM3U (insn16));
35c08157
KLC		 7378 goto done;
7379 case 0xc: /* add333 */
1c8f6a4d
KLC		 7380 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7381 N16_RB3 (insn16));
35c08157
KLC		 7382 goto done;
7383 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7384 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7385 N16_RB3 (insn16));
35c08157
KLC		 7386 goto done;
7387 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7388 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7389 N16_IMM3U (insn16));
35c08157
KLC		 7390 goto done;
7391 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7392 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7393 -N16_IMM3U (insn16));
35c08157 7394 goto done;
35c08157 7395 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7396 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7397 N16_IMM3U (insn16));
35c08157
KLC		 7398 goto done;
7399 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7400 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7401 N16_IMM3U (insn16));
35c08157
KLC		 7402 goto done;
7403 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7404 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7405 N16_IMM3U (insn16));
35c08157
KLC		 7406 goto done;
7407 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7408 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7409 N16_IMM3U (insn16));
35c08157
KLC		 7410 goto done;
7411 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7412 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7413 N16_IMM3U (insn16));
35c08157
KLC		 7414 goto done;
7415 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7416 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7417 N16_IMM3U (insn16));
35c08157
KLC		 7418 goto done;
7419 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7420 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7421 N16_IMM3U (insn16));
35c08157
KLC		 7422 goto done;
7423 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7424 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7425 N16_IMM3U (insn16));
35c08157 7426 goto done;
35c08157 7427 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7428 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7429 N16_IMM6U (insn16) << 2);
35c08157 7430 goto done;
35c08157 7431 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7432 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7433 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7434 goto done;
7435 case 0x1a: /* lwi450 */
7436 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7437 goto done;
7438 case 0x1b: /* swi450 */
7439 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7440 goto done;
7441
1c8f6a4d 7442 /* These are r15 implied instructions. */
35c08157
KLC		 7443 case 0x30: /* slts45 */
7444 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7445 goto done;
7446 case 0x31: /* slt45 */
7447 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7448 goto done;
7449 case 0x32: /* sltsi45 */
7450 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7451 goto done;
7452 case 0x33: /* slti45 */
7453 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7454 goto done;
7455 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 7456 if (insn16 & N32_BIT (8))
35c08157
KLC		 7457 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7458 else
7459 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7460 goto done;
7461
7462 case 0x35: /* break16, ex9.it */
7463 /* Only consider range of v3 break16. */
7464 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7465 goto done;
7466
7467 case 0x3c: /* ifcall9 */
7468 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7469 goto done;
7470 case 0x3d: /* movpi45 */
7471 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7472 goto done;
7473
7474 case 0x3f: /* MISC33 */
1c8f6a4d 7475 switch (insn16 & 0x7)
35c08157
KLC		 7476 {
7477 case 2: /* neg33 */
7478 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7479 break;
7480 case 3: /* not33 */
1c8f6a4d
KLC		 7481 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7482 N16_RA3 (insn16));
35c08157
KLC		 7483 break;
7484 case 4: /* mul33 */
1c8f6a4d
KLC		 7485 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7486 N16_RA3 (insn16));
35c08157
KLC		 7487 break;
7488 case 5: /* xor33 */
1c8f6a4d
KLC		 7489 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7490 N16_RA3 (insn16));
35c08157
KLC		 7491 break;
7492 case 6: /* and33 */
1c8f6a4d
KLC		 7493 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7494 N16_RA3 (insn16));
35c08157
KLC		 7495 break;
7496 case 7: /* or33 */
1c8f6a4d
KLC		 7497 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7498 N16_RA3 (insn16));
35c08157
KLC		 7499 break;
7500 }
7501 goto done;
7502
1c8f6a4d 7503 case 0xb:
35c08157
KLC		 7504 switch (insn16 & 0x7)
7505 {
7506 case 0: /* zeb33 */
7507 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7508 break;
7509 case 1: /* zeh33 */
7510 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7511 break;
7512 case 2: /* seb33 */
7513 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7514 break;
7515 case 3: /* seh33 */
7516 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7517 break;
7518 case 4: /* xlsb33 */
7519 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7520 break;
7521 case 5: /* x11b33 */
7522 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7523 break;
7524 case 6: /* bmski33 */
7525 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7526 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7527 break;
7528 case 7: /* fexti33 */
7529 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7530 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7531 break;
7532 }
7533 goto done;
7534 }
7535
7536 switch (__GF (insn16, 10, 5))
7537 {
7538 case 0x0: /* mov55 or ifret16 */
7539 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7540 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7541 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7542 else
1c8f6a4d 7543 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7544 goto done;
7545 case 0x1: /* movi55 */
7546 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7547 goto done;
7548 case 0x1b: /* addi10s (V2) */
7549 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7550 goto done;
7551 }
7552
7553 switch (__GF (insn16, 11, 4))
7554 {
7555 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 7556 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC		 7557 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7558 else /* lwi37.fp */
7559 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7560 goto done;
7561 case 0x8: /* beqz38 */
7562 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7563 goto done;
7564 case 0x9: /* bnez38 */
7565 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7566 goto done;
7567 case 0xa: /* beqs38/j8, implied r5 */
7568 if (N16_RT38 (insn16) == 5)
7569 insn = N32_JI (J, N16_IMM8S (insn16));
7570 else
7571 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7572 goto done;
7573 case 0xb: /* bnes38 and others */
7574 if (N16_RT38 (insn16) == 5)
7575 {
7576 switch (__GF (insn16, 5, 3))
7577 {
7578 case 0: /* jr5 */
7579 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7580 break;
7581 case 4: /* ret5 */
7582 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7583 break;
7584 case 1: /* jral5 */
7585 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7586 break;
7587 case 2: /* ex9.it imm5 */
7588 /* ex9.it had no 32-bit variantl. */
7589 break;
7590 case 5: /* add5.pc */
7591 /* add5.pc had no 32-bit variantl. */
7592 break;
7593 }
7594 }
7595 else /* bnes38 */
7596 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7597 goto done;
7598 case 0xe: /* lwi37/swi37 */
7599 if (insn16 & (1 << 7)) /* swi37.sp */
7600 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7601 else /* lwi37.sp */
7602 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7603 goto done;
7604 }
7605
7606done:
7607 if (insn & 0x80000000)
7608 return 0;
7609
7610 if (pinsn)
7611 *pinsn = insn;
7612 return 1;
7613}
7614\f
7615static bfd_boolean
7616is_sda_access_insn (unsigned long insn)
7617{
7618 switch (N32_OP6 (insn))
7619 {
7620 case N32_OP6_LWI:
7621 case N32_OP6_LHI:
7622 case N32_OP6_LHSI:
7623 case N32_OP6_LBI:
7624 case N32_OP6_LBSI:
7625 case N32_OP6_SWI:
7626 case N32_OP6_SHI:
7627 case N32_OP6_SBI:
7628 case N32_OP6_LWC:
7629 case N32_OP6_LDC:
7630 case N32_OP6_SWC:
7631 case N32_OP6_SDC:
7632 return TRUE;
7633 default:
7634 ;
7635 }
7636 return FALSE;
7637}
7638
7639static unsigned long
7640turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7641{
7642 uint32_t oinsn = 0;
7643
7644 switch (type)
7645 {
7646 case R_NDS32_GOT_LO12:
7647 case R_NDS32_GOTOFF_LO12:
7648 case R_NDS32_PLTREL_LO12:
7649 case R_NDS32_PLT_GOTREL_LO12:
7650 case R_NDS32_LO12S0_RELA:
7651 switch (N32_OP6 (insn))
7652 {
7653 case N32_OP6_LBI:
7654 /* lbi.gp */
7655 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7656 break;
7657 case N32_OP6_LBSI:
7658 /* lbsi.gp */
4ec521f2 7659 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7660 break;
7661 case N32_OP6_SBI:
7662 /* sbi.gp */
7663 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7664 break;
7665 case N32_OP6_ORI:
7666 /* addi.gp */
4ec521f2 7667 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7668 break;
7669 }
7670 break;
7671
7672 case R_NDS32_LO12S1_RELA:
7673 switch (N32_OP6 (insn))
7674 {
7675 case N32_OP6_LHI:
7676 /* lhi.gp */
7677 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7678 break;
7679 case N32_OP6_LHSI:
7680 /* lhsi.gp */
4ec521f2 7681 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC		 7682 break;
7683 case N32_OP6_SHI:
7684 /* shi.gp */
4ec521f2 7685 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7686 break;
7687 }
7688 break;
7689
7690 case R_NDS32_LO12S2_RELA:
7691 switch (N32_OP6 (insn))
7692 {
7693 case N32_OP6_LWI:
7694 /* lwi.gp */
7695 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7696 break;
7697 case N32_OP6_SWI:
7698 /* swi.gp */
7699 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7700 break;
7701 }
7702 break;
7703
7704 case R_NDS32_LO12S2_DP_RELA:
7705 case R_NDS32_LO12S2_SP_RELA:
7706 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7707 break;
7708 }
7709
7710 if (oinsn)
7711 *pinsn = oinsn;
7712
7713 return oinsn != 0;
7714}
7715
7716/* Linker hasn't found the correct merge section for non-section symbol
7717 in relax time, this work is left to the function elf_link_input_bfd().
7718 So for non-section symbol, _bfd_merged_section_offset is also needed
7719 to find the correct symbol address. */
7720
7721static bfd_vma
7722nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7723 asection **psec, Elf_Internal_Rela *rel)
7724{
7725 asection *sec = *psec;
7726 bfd_vma relocation;
7727
7728 relocation = (sec->output_section->vma
7729 + sec->output_offset + sym->st_value);
7730 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7731 {
7732 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7733 rel->r_addend =
7734 _bfd_merged_section_offset (abfd, psec,
7735 elf_section_data (sec)->sec_info,
7736 sym->st_value + rel->r_addend);
7737 else
7738 rel->r_addend =
7739 _bfd_merged_section_offset (abfd, psec,
7740 elf_section_data (sec)->sec_info,
7741 sym->st_value) + rel->r_addend;
7742
7743 if (sec != *psec)
7744 {
7745 /* If we have changed the section, and our original section is
7746 marked with SEC_EXCLUDE, it means that the original
7747 SEC_MERGE section has been completely subsumed in some
7748 other SEC_MERGE section. In this case, we need to leave
7749 some info around for --emit-relocs. */
7750 if ((sec->flags & SEC_EXCLUDE) != 0)
7751 sec->kept_section = *psec;
7752 sec = *psec;
7753 }
7754 rel->r_addend -= relocation;
7755 rel->r_addend += sec->output_section->vma + sec->output_offset;
7756 }
7757 return relocation;
7758}
7759
7760static bfd_vma
7761calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7762 Elf_Internal_Sym *isymbuf,
7763 Elf_Internal_Shdr *symtab_hdr)
7764{
7765 bfd_signed_vma foff;
7766 bfd_vma symval, addend;
7767 Elf_Internal_Rela irel_fn;
7768 Elf_Internal_Sym *isym;
7769 asection *sym_sec;
7770
7771 /* Get the value of the symbol referred to by the reloc. */
7772 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7773 {
7774 /* A local symbol. */
7775 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7776
7777 if (isym->st_shndx == SHN_UNDEF)
7778 sym_sec = bfd_und_section_ptr;
7779 else if (isym->st_shndx == SHN_ABS)
7780 sym_sec = bfd_abs_section_ptr;
7781 else if (isym->st_shndx == SHN_COMMON)
7782 sym_sec = bfd_com_section_ptr;
7783 else
7784 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7785 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7786 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7787 addend = irel_fn.r_addend;
7788 }
7789 else
7790 {
7791 unsigned long indx;
7792 struct elf_link_hash_entry *h;
7793
7794 /* An external symbol. */
7795 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7796 h = elf_sym_hashes (abfd)[indx];
7797 BFD_ASSERT (h != NULL);
7798
7799 while (h->root.type == bfd_link_hash_indirect
7800 || h->root.type == bfd_link_hash_warning)
7801 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7802
7803 if (h->root.type != bfd_link_hash_defined
7804 && h->root.type != bfd_link_hash_defweak)
7805 /* This appears to be a reference to an undefined
7806 symbol. Just ignore it--it will be caught by the
7807 regular reloc processing. */
7808 return 0;
7809
7810 if (h->root.u.def.section->flags & SEC_MERGE)
7811 {
7812 sym_sec = h->root.u.def.section;
7813 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7814 (sym_sec)->sec_info, h->root.u.def.value);
7815 symval = symval + sym_sec->output_section->vma
7816 + sym_sec->output_offset;
7817 }
7818 else
7819 symval = (h->root.u.def.value
7820 + h->root.u.def.section->output_section->vma
7821 + h->root.u.def.section->output_offset);
7822 addend = irel->r_addend;
7823 }
7824
7825 foff = symval + addend;
7826
7827 return foff;
7828}
7829
7830static bfd_vma
7831calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7832 Elf_Internal_Rela *irel,
7833 Elf_Internal_Shdr *symtab_hdr)
7834{
7835 int symndx;
7836 bfd_vma *local_got_offsets;
7837 /* Get the value of the symbol referred to by the reloc. */
7838 struct elf_link_hash_entry *h;
7839 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7840
7841 /* An external symbol. */
7842 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7843 h = elf_sym_hashes (abfd)[symndx];
7844 while (h->root.type == bfd_link_hash_indirect
7845 || h->root.type == bfd_link_hash_warning)
7846 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7847
7848 if (symndx >= 0)
7849 {
7850 BFD_ASSERT (h != NULL);
ce558b89
AM		 7851 return (htab->root.sgot->output_section->vma
7852 + htab->root.sgot->output_offset
7853 + h->got.offset);
35c08157
KLC		 7854 }
7855 else
7856 {
7857 local_got_offsets = elf_local_got_offsets (abfd);
7858 BFD_ASSERT (local_got_offsets != NULL);
ce558b89
AM		 7859 return (htab->root.sgot->output_section->vma
7860 + htab->root.sgot->output_offset
7861 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
35c08157
KLC		 7862 }
7863
7864 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7865 /* The check of h->root.type is passed. */
7866}
7867
7868static int
7869is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7870 asection *sec, Elf_Internal_Rela *rel)
7871{
7872 bfd_byte *contents;
7873 unsigned short insn16;
7874
7875 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7876 return FALSE;
7877 contents = elf_section_data (sec)->this_hdr.contents;
7878 insn16 = bfd_getb16 (contents + rel->r_offset);
7879 if (insn16 == NDS32_NOP16)
7880 return TRUE;
7881 return FALSE;
7882}
7883
7884/* It checks whether the instruction could be converted to
7885 16-bit form and returns the converted one.
7886
7887 `internal_relocs' is supposed to be sorted. */
7888
7889static int
7890is_convert_32_to_16 (bfd *abfd, asection *sec,
7891 Elf_Internal_Rela *reloc,
7892 Elf_Internal_Rela *internal_relocs,
7893 Elf_Internal_Rela *irelend,
7894 uint16_t *insn16)
7895{
7896#define NORMAL_32_TO_16 (1 << 0)
7897#define SPECIAL_32_TO_16 (1 << 1)
7898 bfd_byte *contents = NULL;
7899 bfd_signed_vma off;
7900 bfd_vma mem_addr;
7901 uint32_t insn = 0;
7902 Elf_Internal_Rela *pc_rel;
7903 int pic_ext_target = 0;
7904 Elf_Internal_Shdr *symtab_hdr;
7905 Elf_Internal_Sym *isymbuf = NULL;
7906 int convert_type;
7907 bfd_vma offset;
7908
7909 if (reloc->r_offset + 4 > sec->size)
7910 return FALSE;
7911
7912 offset = reloc->r_offset;
7913
0c4bd9d9 7914 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 7915 return FALSE;
7916 insn = bfd_getb32 (contents + offset);
7917
7918 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7919 convert_type = NORMAL_32_TO_16;
7920 else if (special_convert_32_to_16 (insn, insn16, reloc))
7921 convert_type = SPECIAL_32_TO_16;
7922 else
7923 return FALSE;
7924
7925 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7926 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7927 return FALSE;
7928
7929 /* Find the first relocation of the same relocation-type,
7930 so we iteratie them forward. */
7931 pc_rel = reloc;
1c8f6a4d 7932 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 7933 pc_rel--;
7934
7935 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7936 {
7937 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7938 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7939 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7940 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7941 {
7942 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7943 &pic_ext_target);
1c8f6a4d
KLC		 7944 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
7945 || off == 0)
35c08157
KLC		 7946 return FALSE;
7947 break;
7948 }
7949 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7950 {
7951 /* movi => movi55 */
1c8f6a4d
KLC		 7952 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
7953 symtab_hdr);
7954 /* mem_addr is unsigned, but the value should
7955 be between [-16, 15]. */
35c08157
KLC		 7956 if ((mem_addr + 0x10) >> 5)
7957 return FALSE;
7958 break;
7959 }
1c8f6a4d
KLC		 7960 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
7961 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
7962 {
7963 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
7964 because it can be relaxed to addi for TLS_LE_ADD. */
7965 return FALSE;
7966 }
35c08157
KLC		 7967 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7968 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7969 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7970 && convert_type == SPECIAL_32_TO_16)
7971 {
7972 /* fp-as-gp
7973 We've selected a best fp-base for this access, so we can
7974 always resolve it anyway. Do nothing. */
7975 break;
7976 }
7977 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7978 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7979 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7980 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7981 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7982 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7983 {
1c8f6a4d
KLC		 7984 /* Prevent unresolved addi instruction translate
7985 to addi45 or addi333. */
35c08157
KLC		 7986 return FALSE;
7987 }
1c8f6a4d
KLC		 7988 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
7989 {
7990 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7991 &pic_ext_target);
7992 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
7993 return FALSE;
7994 break;
7995 }
35c08157
KLC		 7996 }
7997
7998 return TRUE;
7999}
8000
8001static void
8002nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8003 Elf_Internal_Rela *reloc,
8004 Elf_Internal_Rela *internal_relocs,
8005 Elf_Internal_Rela *irelend,
8006 unsigned short insn16)
8007{
8008 Elf_Internal_Rela *pc_rel;
8009 bfd_vma offset;
8010
8011 offset = reloc->r_offset;
8012 bfd_putb16 (insn16, contents + offset);
8013 /* Find the first relocation of the same relocation-type,
8014 so we iteratie them forward. */
8015 pc_rel = reloc;
8016 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8017 pc_rel--;
8018
8019 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8020 {
8021 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8022 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8023 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8024 {
8025 pc_rel->r_info =
8026 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8027 }
8028 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8029 pc_rel->r_info =
8030 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8031 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8032 pc_rel->r_info =
8033 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8034 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8035 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8036 pc_rel->r_info =
8037 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8038 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8039 pc_rel->r_info =
8040 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8041 }
8042}
8043
8044/* Find a relocation of type specified by `reloc_type'
8045 of the same r_offset with reloc.
8046 If not found, return irelend.
8047
8048 Assuming relocations are sorted by r_offset,
8049 we find the relocation from `reloc' backward untill relocs,
8050 or find it from `reloc' forward untill irelend. */
8051
8052static Elf_Internal_Rela *
8053find_relocs_at_address (Elf_Internal_Rela *reloc,
8054 Elf_Internal_Rela *relocs,
8055 Elf_Internal_Rela *irelend,
8056 enum elf_nds32_reloc_type reloc_type)
8057{
8058 Elf_Internal_Rela *rel_t;
8059
8060 /* Find backward. */
8061 for (rel_t = reloc;
8062 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8063 rel_t--)
8064 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8065 return rel_t;
8066
1c8f6a4d 8067 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8068 for (rel_t = reloc;
8069 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8070 rel_t++)
8071 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8072 return rel_t;
8073
8074 return irelend;
8075}
8076
8077/* Find a relocation of specified type and offset.
8078 `reloc' is just a refence point to find a relocation at specified offset.
8079 If not found, return irelend.
8080
8081 Assuming relocations are sorted by r_offset,
8082 we find the relocation from `reloc' backward untill relocs,
8083 or find it from `reloc' forward untill irelend. */
8084
8085static Elf_Internal_Rela *
8086find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8087 Elf_Internal_Rela *relocs,
8088 Elf_Internal_Rela *irelend,
6cae483a 8089 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8090 bfd_vma offset_p)
8091{
8092 Elf_Internal_Rela *rel_t = NULL;
8093
8094 /* First, we try to find a relocation of offset `offset_p',
8095 and then we use find_relocs_at_address to find specific type. */
8096
8097 if (reloc->r_offset > offset_p)
8098 {
8099 /* Find backward. */
8100 for (rel_t = reloc;
8101 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8102 /* Do nothing. */;
8103 }
8104 else if (reloc->r_offset < offset_p)
8105 {
8106 /* Find forward. */
8107 for (rel_t = reloc;
8108 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8109 /* Do nothing. */;
8110 }
8111 else
8112 rel_t = reloc;
8113
8114 /* Not found? */
8115 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8116 return irelend;
8117
8118 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8119}
8120
8121static bfd_boolean
8122nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8123 Elf_Internal_Rela *internal_relocs,
8124 Elf_Internal_Rela *irelend,
8125 unsigned char reloc_type)
8126{
8127 Elf_Internal_Rela *rel_t;
8128
8129 for (rel_t = reloc;
8130 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8131 rel_t--)
8132 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8133 {
8134 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8135 && rel_t->r_addend == reloc->r_addend)
8136 continue;
8137 return TRUE;
8138 }
8139
8140 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8141 rel_t++)
8142 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8143 {
8144 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8145 && rel_t->r_addend == reloc->r_addend)
8146 continue;
8147 return TRUE;
8148 }
8149
8150 return FALSE;
8151}
8152
8153typedef struct nds32_elf_blank nds32_elf_blank_t;
8154struct nds32_elf_blank
8155{
8156 /* Where the blank begins. */
8157 bfd_vma offset;
8158 /* The size of the blank. */
8159 bfd_vma size;
8160 /* The accumulative size before this blank. */
8161 bfd_vma total_size;
8162 nds32_elf_blank_t *next;
8163 nds32_elf_blank_t *prev;
8164};
8165
8166static nds32_elf_blank_t *blank_free_list = NULL;
8167
8168static nds32_elf_blank_t *
8169create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8170{
8171 nds32_elf_blank_t *blank_t;
8172
8173 if (blank_free_list)
8174 {
8175 blank_t = blank_free_list;
8176 blank_free_list = blank_free_list->next;
8177 }
8178 else
8179 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8180
8181 if (blank_t == NULL)
8182 return NULL;
8183
8184 blank_t->offset = offset_p;
8185 blank_t->size = size_p;
8186 blank_t->total_size = 0;
8187 blank_t->next = NULL;
8188 blank_t->prev = NULL;
8189
8190 return blank_t;
8191}
8192
8193static void
8194remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8195{
8196 if (blank_free_list)
8197 {
8198 blank_free_list->prev = blank_p;
8199 blank_p->next = blank_free_list;
8200 }
8201 else
8202 blank_p->next = NULL;
8203
8204 blank_p->prev = NULL;
8205 blank_free_list = blank_p;
8206}
8207
8208static void
8209clean_nds32_elf_blank (void)
8210{
8211 nds32_elf_blank_t *blank_t;
8212
8213 while (blank_free_list)
8214 {
8215 blank_t = blank_free_list;
8216 blank_free_list = blank_free_list->next;
8217 free (blank_t);
8218 }
8219}
8220
8221static nds32_elf_blank_t *
8222search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8223{
8224 nds32_elf_blank_t *blank_t;
8225
8226 if (!blank_p)
8227 return NULL;
8228 blank_t = blank_p;
8229
8230 while (blank_t && addr < blank_t->offset)
8231 blank_t = blank_t->prev;
8232 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8233 blank_t = blank_t->next;
8234
8235 return blank_t;
8236}
8237
8238static bfd_vma
8239get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8240 int overwrite)
8241{
8242 nds32_elf_blank_t *blank_t;
8243
8244 blank_t = search_nds32_elf_blank (*blank_p, addr);
8245 if (!blank_t)
8246 return 0;
8247
8248 if (overwrite)
8249 *blank_p = blank_t;
8250
8251 if (addr < blank_t->offset + blank_t->size)
8252 return blank_t->total_size + (addr - blank_t->offset);
8253 else
8254 return blank_t->total_size + blank_t->size;
8255}
8256
8257static bfd_boolean
8258insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8259{
8260 nds32_elf_blank_t *blank_t, *blank_t2;
8261
8262 if (!*blank_p)
8263 {
8264 *blank_p = create_nds32_elf_blank (addr, len);
8265 return *blank_p ? TRUE : FALSE;
8266 }
8267
8268 blank_t = search_nds32_elf_blank (*blank_p, addr);
8269
8270 if (blank_t == NULL)
8271 {
8272 blank_t = create_nds32_elf_blank (addr, len);
8273 if (!blank_t)
8274 return FALSE;
8275 while ((*blank_p)->prev != NULL)
8276 *blank_p = (*blank_p)->prev;
8277 blank_t->next = *blank_p;
8278 (*blank_p)->prev = blank_t;
8279 (*blank_p) = blank_t;
8280 return TRUE;
8281 }
8282
8283 if (addr < blank_t->offset + blank_t->size)
8284 {
8285 if (addr > blank_t->offset + blank_t->size)
8286 blank_t->size = addr - blank_t->offset;
8287 }
8288 else
8289 {
8290 blank_t2 = create_nds32_elf_blank (addr, len);
8291 if (!blank_t2)
8292 return FALSE;
8293 if (blank_t->next)
8294 {
8295 blank_t->next->prev = blank_t2;
8296 blank_t2->next = blank_t->next;
8297 }
8298 blank_t2->prev = blank_t;
8299 blank_t->next = blank_t2;
8300 *blank_p = blank_t2;
8301 }
8302
8303 return TRUE;
8304}
8305
8306static bfd_boolean
8307insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8308 bfd_vma len)
8309{
8310 nds32_elf_blank_t *blank_t;
8311
8312 if (!insert_nds32_elf_blank (blank_p, addr, len))
8313 return FALSE;
8314
8315 blank_t = *blank_p;
8316
8317 if (!blank_t->prev)
8318 {
8319 blank_t->total_size = 0;
8320 blank_t = blank_t->next;
8321 }
8322
8323 while (blank_t)
8324 {
8325 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8326 blank_t = blank_t->next;
8327 }
8328
8329 return TRUE;
8330}
8331
8332static void
8333calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8334{
8335 nds32_elf_blank_t *blank_t;
8336 bfd_vma total_size = 0;
8337
8338 if (!blank_p)
8339 return;
8340
8341 blank_t = blank_p;
8342 while (blank_t->prev)
8343 blank_t = blank_t->prev;
8344 while (blank_t)
8345 {
8346 blank_t->total_size = total_size;
8347 total_size += blank_t->size;
8348 blank_t = blank_t->next;
8349 }
8350}
8351
8352static bfd_boolean
8353nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8354 nds32_elf_blank_t *blank_p)
8355{
8356 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8357 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8358 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8359 unsigned int sec_shndx; /* The section the be relaxed. */
8360 bfd_byte *contents; /* Contents data of iterating section. */
8361 Elf_Internal_Rela *internal_relocs;
8362 Elf_Internal_Rela *irel;
8363 Elf_Internal_Rela *irelend;
8364 struct elf_link_hash_entry **sym_hashes;
8365 struct elf_link_hash_entry **end_hashes;
8366 unsigned int symcount;
8367 asection *sect;
8368 nds32_elf_blank_t *blank_t;
8369 nds32_elf_blank_t *blank_t2;
8370 nds32_elf_blank_t *blank_head;
8371
8372 blank_head = blank_t = blank_p;
8373 while (blank_head->prev != NULL)
8374 blank_head = blank_head->prev;
8375 while (blank_t->next != NULL)
8376 blank_t = blank_t->next;
8377
8378 if (blank_t->offset + blank_t->size <= sec->size)
8379 {
8380 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8381 blank_t->next->prev = blank_t;
8382 }
8383 if (blank_head->offset > 0)
8384 {
8385 blank_head->prev = create_nds32_elf_blank (0, 0);
8386 blank_head->prev->next = blank_head;
8387 blank_head = blank_head->prev;
8388 }
8389
8390 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8391
8392 /* The deletion must stop at the next ALIGN reloc for an alignment
8393 power larger than the number of bytes we are deleting. */
8394
8395 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8396 if (!nds32_get_local_syms (abfd, sec, &isym))
8397 return FALSE;
8398
8399 if (isym == NULL)
8400 {
8401 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8402 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8403 symtab_hdr->contents = (bfd_byte *) isym;
8404 }
8405
8406 if (isym == NULL || symtab_hdr->sh_info == 0)
8407 return FALSE;
8408
8409 blank_t = blank_head;
8410 calc_nds32_blank_total (blank_head);
8411
8412 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8413 {
8414 /* Adjust all the relocs. */
8415
8416 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8417 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8418 TRUE /* keep_memory */);
8419 irelend = internal_relocs + sect->reloc_count;
8420
8421 blank_t = blank_head;
8422 blank_t2 = blank_head;
8423
8424 if (!(sect->flags & SEC_RELOC))
8425 continue;
8426
0c4bd9d9 8427 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC		 8428
8429 for (irel = internal_relocs; irel < irelend; irel++)
8430 {
8431 bfd_vma raddr;
8432
8433 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8434 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8435 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8436 {
8437 unsigned long val = 0;
1c8f6a4d
KLC		 8438 unsigned long mask;
8439 long before, between;
6cae483a 8440 long offset = 0;
35c08157
KLC		 8441
8442 switch (ELF32_R_TYPE (irel->r_info))
8443 {
8444 case R_NDS32_DIFF8:
1c8f6a4d 8445 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8446 break;
8447 case R_NDS32_DIFF16:
1c8f6a4d 8448 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8449 break;
8450 case R_NDS32_DIFF32:
8451 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8452 /* Get the signed bit and mask for the high part. The
8453 gcc will alarm when right shift 32-bit since the
8454 type size of long may be 32-bit. */
8455 mask = 0 - (val >> 31);
8456 if (mask)
8457 offset = (val | (mask - 0xffffffff));
8458 else
8459 offset = val;
35c08157
KLC		 8460 break;
8461 default:
8462 BFD_ASSERT (0);
8463 }
8464
8465 /* DIFF value
8466 0 |encoded in location|
8467 |------------|-------------------|---------
8468 sym+off(addend)
8469 -- before ---| *****************
8470 --------------------- between ---|
8471
1c8f6a4d
KLC		 8472 We only care how much data are relax between DIFF,
8473 marked as ***. */
35c08157
KLC		 8474
8475 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8476 between = get_nds32_elf_blank_total (&blank_t,
8477 irel->r_addend + offset, 0);
35c08157
KLC		 8478 if (between == before)
8479 goto done_adjust_diff;
8480
8481 switch (ELF32_R_TYPE (irel->r_info))
8482 {
8483 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8484 bfd_put_8 (abfd, offset - (between - before),
8485 contents + irel->r_offset);
35c08157
KLC		 8486 break;
8487 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8488 bfd_put_16 (abfd, offset - (between - before),
8489 contents + irel->r_offset);
35c08157
KLC		 8490 break;
8491 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8492 bfd_put_32 (abfd, offset - (between - before),
8493 contents + irel->r_offset);
35c08157
KLC		 8494 break;
8495 }
8496 }
8497 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8498 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8499 {
8500 bfd_vma val = 0;
8501 unsigned int len = 0;
8502 unsigned long before, between;
8503 bfd_byte *endp, *p;
8504
4265548c
PA		 8505 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8506 &len);
35c08157
KLC		 8507
8508 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8509 between = get_nds32_elf_blank_total (&blank_t,
8510 irel->r_addend + val, 0);
35c08157
KLC		 8511 if (between == before)
8512 goto done_adjust_diff;
8513
8514 p = contents + irel->r_offset;
8515 endp = p + len -1;
8516 memset (p, 0x80, len);
8517 *(endp) = 0;
8518 p = write_uleb128 (p, val - (between - before)) - 1;
8519 if (p < endp)
8520 *p |= 0x80;
8521 }
8522done_adjust_diff:
8523
8524 if (sec == sect)
8525 {
8526 raddr = irel->r_offset;
1c8f6a4d
KLC		 8527 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8528 irel->r_offset, 1);
35c08157
KLC		 8529
8530 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8531 continue;
8532 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8533 && (blank_t2->offset > raddr
8534 || blank_t2->next->offset <= raddr))
4eca0228 8535 _bfd_error_handler
871b3ab2 8536 (_("%pB: Error: search_nds32_elf_blank reports wrong node\n"), abfd);
35c08157
KLC		 8537
8538 /* Mark reloc in deleted portion as NONE.
8539 For some relocs like R_NDS32_LABEL that doesn't modify the
8540 content in the section. R_NDS32_LABEL doesn't belong to the
8541 instruction in the section, so we should preserve it. */
8542 if (raddr >= blank_t2->offset
8543 && raddr < blank_t2->offset + blank_t2->size
8544 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8545 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8546 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8547 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8548 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8549 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8550 {
8551 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8552 R_NDS32_NONE);
8553 continue;
8554 }
8555 }
8556
8557 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8558 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8559 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8560 continue;
8561
8562 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8563 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8564 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8565 {
8566 if (irel->r_addend <= sec->size)
8567 irel->r_addend -=
8568 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8569 }
8570 }
8571 }
8572
8573 /* Adjust the local symbols defined in this section. */
8574 blank_t = blank_head;
8575 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8576 {
8577 if (isym->st_shndx == sec_shndx)
8578 {
8579 if (isym->st_value <= sec->size)
8580 {
8581 bfd_vma ahead;
8582 bfd_vma orig_addr = isym->st_value;
8583
8584 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8585 isym->st_value -= ahead;
8586
8587 /* Adjust function size. */
1c8f6a4d
KLC		 8588 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8589 && isym->st_size > 0)
8590 isym->st_size -=
8591 get_nds32_elf_blank_total
8592 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8593 }
8594 }
8595 }
8596
8597 /* Now adjust the global symbols defined in this section. */
8598 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8599 - symtab_hdr->sh_info);
8600 sym_hashes = elf_sym_hashes (abfd);
8601 end_hashes = sym_hashes + symcount;
8602 blank_t = blank_head;
8603 for (; sym_hashes < end_hashes; sym_hashes++)
8604 {
8605 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8606
8607 if ((sym_hash->root.type == bfd_link_hash_defined
8608 || sym_hash->root.type == bfd_link_hash_defweak)
8609 && sym_hash->root.u.def.section == sec)
8610 {
8611 if (sym_hash->root.u.def.value <= sec->size)
8612 {
8613 bfd_vma ahead;
8614 bfd_vma orig_addr = sym_hash->root.u.def.value;
8615
8616 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8617 sym_hash->root.u.def.value -= ahead;
8618
8619 /* Adjust function size. */
8620 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8621 sym_hash->size -=
8622 get_nds32_elf_blank_total
8623 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8624
8625 }
8626 }
8627 }
8628
8629 contents = elf_section_data (sec)->this_hdr.contents;
8630 blank_t = blank_head;
8631 while (blank_t->next)
8632 {
8633 /* Actually delete the bytes. */
8634
8635 /* If current blank is the last blank overlap with current section,
8636 go to finish process. */
8637 if (sec->size <= (blank_t->next->offset))
8638 break;
8639
8640 memmove (contents + blank_t->offset - blank_t->total_size,
8641 contents + blank_t->offset + blank_t->size,
8642 blank_t->next->offset - (blank_t->offset + blank_t->size));
8643
8644 blank_t = blank_t->next;
8645 }
8646
8647 if (sec->size > (blank_t->offset + blank_t->size))
8648 {
8649 /* There are remaining code between blank and section boundary.
8650 Move the remaining code to appropriate location. */
8651 memmove (contents + blank_t->offset - blank_t->total_size,
8652 contents + blank_t->offset + blank_t->size,
8653 sec->size - (blank_t->offset + blank_t->size));
8654 sec->size -= blank_t->total_size + blank_t->size;
8655 }
8656 else
8657 /* This blank is not entirely included in the section,
8658 reduce the section size by only part of the blank size. */
8659 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8660
8661 while (blank_head)
8662 {
8663 blank_t = blank_head;
8664 blank_head = blank_head->next;
8665 remove_nds32_elf_blank (blank_t);
8666 }
8667
8668 return TRUE;
8669}
8670
8671/* Get the contents of a section. */
8672
8673static int
0c4bd9d9
KLC		 8674nds32_get_section_contents (bfd *abfd, asection *sec,
8675 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC		 8676{
8677 /* Get the section contents. */
8678 if (elf_section_data (sec)->this_hdr.contents != NULL)
8679 *contents_p = elf_section_data (sec)->this_hdr.contents;
8680 else
8681 {
8682 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8683 return FALSE;
0c4bd9d9
KLC		 8684 if (cache)
8685 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 8686 }
8687
8688 return TRUE;
8689}
8690
8691/* Get the contents of the internal symbol of abfd. */
8692
8693static int
8694nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8695 Elf_Internal_Sym **isymbuf_p)
8696{
8697 Elf_Internal_Shdr *symtab_hdr;
8698 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8699
8700 /* Read this BFD's local symbols if we haven't done so already. */
8701 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8702 {
8703 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8704 if (*isymbuf_p == NULL)
8705 {
8706 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8707 symtab_hdr->sh_info, 0,
8708 NULL, NULL, NULL);
8709 if (*isymbuf_p == NULL)
8710 return FALSE;
8711 }
8712 }
8713 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8714
8715 return TRUE;
8716}
8717
8718/* Range of small data. */
1c8f6a4d
KLC		 8719static bfd_vma sdata_range[2][2];
8720static bfd_vma const sdata_init_range[2] =
8721{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8722
8723static int
8724nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8725 bfd_byte *contents, bfd_vma addr)
8726{
8727 unsigned long insn = bfd_getb32 (contents + addr);
8728
8729 if (insn & 0x80000000)
8730 return 2;
8731
8732 return 4;
8733}
8734
8735/* Set the gp relax range. We have to measure the safe range
8736 to do gp relaxation. */
8737
8738static void
8739relax_range_measurement (bfd *abfd)
8740{
8741 asection *sec_f, *sec_b;
8742 /* For upper bound. */
8743 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8744 bfd_vma align;
35c08157
KLC		 8745 static int decide_relax_range = 0;
8746 int i;
1c8f6a4d 8747 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8748
8749 if (decide_relax_range)
8750 return;
8751 decide_relax_range = 1;
8752
8753 if (sda_rela_sec == NULL)
8754 {
8755 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8756 for (i = 0; i < range_number; i++)
35c08157
KLC		 8757 {
8758 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8759 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8760 }
8761 return;
8762 }
8763
8764 /* Get the biggest alignment power after the gp located section. */
8765 sec_f = sda_rela_sec->output_section;
8766 sec_b = sec_f->next;
8767 align = 0;
8768 while (sec_b != NULL)
8769 {
8770 if ((unsigned)(1 << sec_b->alignment_power) > align)
8771 align = (1 << sec_b->alignment_power);
8772 sec_b = sec_b->next;
8773 }
8774
8775 /* I guess we can not determine the section before
8776 gp located section, so we assume the align is max page size. */
1c8f6a4d 8777 for (i = 0; i < range_number; i++)
35c08157 8778 {
1c8f6a4d 8779 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 8780 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 8781 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 8782 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8783 }
8784}
8785
8786/* These are macros used to check flags encoded in r_addend.
8787 They are only used by nds32_elf_relax_section (). */
8788#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8789#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8790#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8791#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8792
695344c0
NC		 8793static const char * unrecognized_reloc_msg =
8794 /* xgettext:c-format */
2dcf00ce 8795 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 8796
1c8f6a4d
KLC		 8797/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8798
35c08157 8799static bfd_boolean
1c8f6a4d
KLC		 8800nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8801 Elf_Internal_Rela *internal_relocs, int *insn_len,
8802 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8803 Elf_Internal_Shdr *symtab_hdr)
8804{
8805 /* There are 3 variations for LONGCALL1
8806 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 8807 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8808 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8809 jral5 ta ;
1c8f6a4d
KLC		 8810
8811 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 8812 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8813 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8814 jral ta ;
1c8f6a4d
KLC		 8815
8816 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 8817 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8818 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8819 jral ta ;
1c8f6a4d
KLC		 8820 Check code for -mlong-calls output. */
8821
8822 /* Get the reloc for the address from which the register is
8823 being loaded. This reloc will tell us which function is
8824 actually being called. */
8825
8826 bfd_vma laddr;
8827 int seq_len; /* Original length of instruction sequence. */
35c08157 8828 uint32_t insn;
1c8f6a4d
KLC		 8829 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8830 int pic_ext_target = 0;
8831 bfd_signed_vma foff;
35c08157 8832 uint16_t insn16;
35c08157 8833
1c8f6a4d
KLC		 8834 irelend = internal_relocs + sec->reloc_count;
8835 seq_len = GET_SEQ_LEN (irel->r_addend);
8836 laddr = irel->r_offset;
8837 *insn_len = seq_len;
35c08157 8838
1c8f6a4d
KLC		 8839 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8840 R_NDS32_HI20_RELA, laddr);
8841 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8842 R_NDS32_LO12S0_ORI_RELA,
8843 laddr + 4);
35c08157 8844
1c8f6a4d 8845 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 8846 {
695344c0 8847 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 8848 (uint64_t) irel->r_offset);
1c8f6a4d 8849 return FALSE;
35c08157
KLC		 8850 }
8851
1c8f6a4d
KLC		 8852 /* Get the value of the symbol referred to by the reloc. */
8853 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8854 &pic_ext_target);
35c08157 8855
1c8f6a4d
KLC		 8856 /* This condition only happened when symbol is undefined. */
8857 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8858 || foff >= CONSERVATIVE_24BIT_S1)
8859 return FALSE;
35c08157 8860
1c8f6a4d
KLC		 8861 /* Relax to: jal symbol; 25_PCREL */
8862 /* For simplicity of coding, we are going to modify the section
8863 contents, the section relocs, and the BFD symbol table. We
8864 must tell the rest of the code not to free up this
8865 information. It would be possible to instead create a table
8866 of changes which have to be made, as is done in coff-mips.c;
8867 that would be more work, but would require less memory when
8868 the linker is run. */
8869
8870 /* Replace the long call with a jal. */
8871 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8872 R_NDS32_25_PCREL_RELA);
8873 irel->r_addend = hi_irelfn->r_addend;
8874
8875 /* We don't resolve this here but resolve it in relocate_section. */
8876 insn = INSN_JAL;
8877 bfd_putb32 (insn, contents + irel->r_offset);
8878
8879 hi_irelfn->r_info =
8880 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8881 lo_irelfn->r_info =
8882 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8883 *insn_len = 4;
8884
8885 if (seq_len & 0x2)
8886 {
8887 insn16 = NDS32_NOP16;
8888 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8889 lo_irelfn->r_info =
8890 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8891 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8892 *insn_len += 2;
8893 }
8894 return TRUE;
8895}
35c08157 8896
1c8f6a4d
KLC		 8897#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8898/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 8899
1c8f6a4d
KLC		 8900static bfd_boolean
8901nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8902 Elf_Internal_Rela *internal_relocs, int *insn_len,
8903 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8904 Elf_Internal_Shdr *symtab_hdr)
8905{
8906 /* bltz rt, .L1 ; LONGCALL2
8907 jal symbol ; 25_PCREL
8908 .L1: */
35c08157 8909
1c8f6a4d
KLC		 8910 /* Get the reloc for the address from which the register is
8911 being loaded. This reloc will tell us which function is
8912 actually being called. */
35c08157 8913
1c8f6a4d
KLC		 8914 bfd_vma laddr;
8915 uint32_t insn;
8916 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8917 int pic_ext_target = 0;
8918 bfd_signed_vma foff;
35c08157 8919
1c8f6a4d
KLC		 8920 irelend = internal_relocs + sec->reloc_count;
8921 laddr = irel->r_offset;
8922 i1_irelfn =
8923 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8924 R_NDS32_25_PCREL_RELA, laddr + 4);
8925
8926 if (i1_irelfn == irelend)
35c08157 8927 {
695344c0 8928 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 8929 (uint64_t) irel->r_offset);
1c8f6a4d 8930 return FALSE;
35c08157
KLC		 8931 }
8932
1c8f6a4d 8933 insn = bfd_getb32 (contents + laddr);
35c08157 8934
1c8f6a4d
KLC		 8935 /* Get the value of the symbol referred to by the reloc. */
8936 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8937 &pic_ext_target);
35c08157 8938
1c8f6a4d
KLC		 8939 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
8940 || foff >= CONSERVATIVE_16BIT_S1)
8941 return FALSE;
35c08157 8942
1c8f6a4d
KLC		 8943 /* Relax to bgezal rt, label ; 17_PCREL
8944 or bltzal rt, label ; 17_PCREL */
8945
8946 /* Convert to complimentary conditional call. */
8947 insn = CONVERT_CONDITION_CALL (insn);
8948
8949 /* For simplicity of coding, we are going to modify the section
8950 contents, the section relocs, and the BFD symbol table. We
8951 must tell the rest of the code not to free up this
8952 information. It would be possible to instead create a table
8953 of changes which have to be made, as is done in coff-mips.c;
8954 that would be more work, but would require less memory when
8955 the linker is run. */
8956
8957 /* Clean unnessary relocations. */
8958 i1_irelfn->r_info =
8959 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8960 cond_irelfn =
8961 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8962 R_NDS32_17_PCREL_RELA, laddr);
8963 if (cond_irelfn != irelend)
8964 cond_irelfn->r_info =
8965 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
8966
8967 /* Replace the long call with a bgezal. */
8968 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8969 R_NDS32_17_PCREL_RELA);
8970 irel->r_addend = i1_irelfn->r_addend;
8971
8972 bfd_putb32 (insn, contents + irel->r_offset);
8973
8974 *insn_len = 4;
8975 return TRUE;
8976}
35c08157 8977
1c8f6a4d
KLC		 8978/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
8979
8980static bfd_boolean
8981nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8982 Elf_Internal_Rela *internal_relocs, int *insn_len,
8983 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8984 Elf_Internal_Shdr *symtab_hdr)
8985{
8986 /* There are 3 variations for LONGCALL3
8987 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM		 8988 bltz rt, $1 ; LONGCALL3
8989 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8990 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8991 jral5 ta ;
1c8f6a4d
KLC		 8992 $1
8993
8994 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 8995 bltz rt, $1 ; LONGCALL3
8996 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8997 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8998 jral ta ;
1c8f6a4d
KLC		 8999 $1
9000
9001 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9002 bltz rt, $1 ; LONGCALL3
9003 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9004 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9005 jral ta ;
1c8f6a4d
KLC		 9006 $1 */
9007
9008 /* Get the reloc for the address from which the register is
9009 being loaded. This reloc will tell us which function is
9010 actually being called. */
9011
9012 bfd_vma laddr;
9013 int seq_len; /* Original length of instruction sequence. */
9014 uint32_t insn;
9015 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9016 int pic_ext_target = 0;
9017 bfd_signed_vma foff;
9018 uint16_t insn16;
9019
9020 irelend = internal_relocs + sec->reloc_count;
9021 seq_len = GET_SEQ_LEN (irel->r_addend);
9022 laddr = irel->r_offset;
9023 *insn_len = seq_len;
9024
9025 hi_irelfn =
9026 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9027 R_NDS32_HI20_RELA, laddr + 4);
9028 lo_irelfn =
9029 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9030 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9031
9032 if (hi_irelfn == irelend || lo_irelfn == irelend)
9033 {
695344c0 9034 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9035 (uint64_t) irel->r_offset);
1c8f6a4d 9036 return FALSE;
35c08157
KLC		 9037 }
9038
1c8f6a4d
KLC		 9039 /* Get the value of the symbol referred to by the reloc. */
9040 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9041 &pic_ext_target);
35c08157 9042
1c8f6a4d
KLC		 9043 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9044 || foff >= CONSERVATIVE_24BIT_S1)
9045 return FALSE;
35c08157 9046
1c8f6a4d
KLC		 9047 insn = bfd_getb32 (contents + laddr);
9048 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9049 {
1c8f6a4d
KLC		 9050 /* Relax to bgezal rt, label ; 17_PCREL
9051 or bltzal rt, label ; 17_PCREL */
35c08157 9052
1c8f6a4d
KLC		 9053 /* Convert to complimentary conditional call. */
9054 insn = CONVERT_CONDITION_CALL (insn);
9055 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9056
1c8f6a4d
KLC		 9057 *insn_len = 4;
9058 irel->r_info =
9059 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9060 hi_irelfn->r_info =
9061 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9062 lo_irelfn->r_info =
9063 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9064
9065 cond_irelfn =
9066 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9067 R_NDS32_17_PCREL_RELA, laddr);
9068 if (cond_irelfn != irelend)
35c08157 9069 {
1c8f6a4d
KLC		 9070 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9071 R_NDS32_17_PCREL_RELA);
9072 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9073 }
1c8f6a4d
KLC		 9074
9075 if (seq_len & 0x2)
35c08157 9076 {
1c8f6a4d
KLC		 9077 insn16 = NDS32_NOP16;
9078 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9079 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9080 R_NDS32_INSN16);
9081 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9082 insn_len += 2;
35c08157 9083 }
1c8f6a4d
KLC		 9084 }
9085 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9086 {
9087 /* Relax to the following instruction sequence
9088 bltz rt, $1 ; LONGCALL2
9089 jal symbol ; 25_PCREL
9090 $1 */
9091 *insn_len = 8;
9092 insn = INSN_JAL;
9093 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9094
1c8f6a4d
KLC		 9095 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9096 R_NDS32_25_PCREL_RELA);
9097 irel->r_info =
9098 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9099
9100 lo_irelfn->r_info =
9101 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9102
1c8f6a4d 9103 if (seq_len & 0x2)
35c08157 9104 {
1c8f6a4d
KLC		 9105 insn16 = NDS32_NOP16;
9106 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9107 lo_irelfn->r_info =
9108 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9109 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9110 insn_len += 2;
9111 }
9112 }
9113 return TRUE;
9114}
35c08157 9115
1c8f6a4d 9116/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9117
1c8f6a4d
KLC		 9118static bfd_boolean
9119nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9120 Elf_Internal_Rela *internal_relocs, int *insn_len,
9121 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9122 Elf_Internal_Shdr *symtab_hdr)
9123{
9124 /* There are 3 variations for LONGJUMP1
9125 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM		 9126 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9127 ori ta, ta, lo12(symbol) ; LO12S0
9128 jr5 ta ;
1c8f6a4d
KLC		 9129
9130 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9131 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9132 ori ta, ta, lo12(symbol) ; LO12S0
9133 jr ta ;
1c8f6a4d
KLC		 9134
9135 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9136 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9137 ori ta, ta, lo12(symbol) ; LO12S0
9138 jr ta ; */
1c8f6a4d
KLC		 9139
9140 /* Get the reloc for the address from which the register is
9141 being loaded. This reloc will tell us which function is
9142 actually being called. */
9143
9144 bfd_vma laddr;
9145 int seq_len; /* Original length of instruction sequence. */
9146 int insn16_on; /* 16-bit on/off. */
9147 uint32_t insn;
9148 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9149 int pic_ext_target = 0;
9150 bfd_signed_vma foff;
9151 uint16_t insn16;
9152 unsigned long reloc;
35c08157 9153
1c8f6a4d
KLC		 9154 irelend = internal_relocs + sec->reloc_count;
9155 seq_len = GET_SEQ_LEN (irel->r_addend);
9156 laddr = irel->r_offset;
9157 *insn_len = seq_len;
9158 insn16_on = IS_16BIT_ON (irel->r_addend);
9159
9160 hi_irelfn =
9161 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9162 R_NDS32_HI20_RELA, laddr);
9163 lo_irelfn =
9164 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9165 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9166 if (hi_irelfn == irelend || lo_irelfn == irelend)
9167 {
695344c0 9168 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9169 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9170 return FALSE;
9171 }
35c08157 9172
1c8f6a4d
KLC		 9173 /* Get the value of the symbol referred to by the reloc. */
9174 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9175 &pic_ext_target);
35c08157 9176
1c8f6a4d
KLC		 9177 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9178 || foff < -CONSERVATIVE_24BIT_S1)
9179 return FALSE;
35c08157 9180
1c8f6a4d
KLC		 9181 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9182 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9183 {
9184 /* j8 label */
9185 /* 16-bit on, but not optimized for speed. */
9186 reloc = R_NDS32_9_PCREL_RELA;
9187 insn16 = INSN_J8;
9188 bfd_putb16 (insn16, contents + irel->r_offset);
9189 *insn_len = 2;
9190 irel->r_info =
9191 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9192 }
9193 else
9194 {
9195 /* j label */
9196 reloc = R_NDS32_25_PCREL_RELA;
9197 insn = INSN_J;
9198 bfd_putb32 (insn, contents + irel->r_offset);
9199 *insn_len = 4;
9200 irel->r_info =
9201 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9202 irel->r_addend = 0;
9203 }
35c08157 9204
1c8f6a4d
KLC		 9205 hi_irelfn->r_info =
9206 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9207 lo_irelfn->r_info =
9208 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9209
1c8f6a4d
KLC		 9210 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9211 {
9212 insn16 = NDS32_NOP16;
9213 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9214 lo_irelfn->r_info =
9215 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9216 R_NDS32_INSN16);
9217 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9218 *insn_len += 2;
9219 }
9220 return TRUE;
9221}
9222
9223/* Revert condition branch. This function does not check if the input
9224 instruction is condition branch or not. */
9225
9226static void
9227nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9228 uint16_t *re_insn16, uint32_t *re_insn)
9229{
9230 uint32_t comp_insn = 0;
9231 uint16_t comp_insn16 = 0;
9232
9233 if (insn)
9234 {
9235 if (N32_OP6 (insn) == N32_OP6_BR1)
9236 {
9237 /* beqs label. */
9238 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9239 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9240 {
1c8f6a4d
KLC		 9241 /* Insn can be contracted to 16-bit implied r5. */
9242 comp_insn16 =
9243 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9244 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9245 }
1c8f6a4d
KLC		 9246 }
9247 else if (N32_OP6 (insn) == N32_OP6_BR3)
9248 {
9249 /* bnec $ta, imm11, label. */
9250 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9251 }
9252 else
9253 {
9254 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9255 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9256 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9257 {
1c8f6a4d 9258 if (N32_IS_RT3 (insn))
35c08157 9259 {
1c8f6a4d
KLC		 9260 /* Insn can be contracted to 16-bit. */
9261 comp_insn16 =
9262 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9263 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9264 }
9265 else if (N32_RT5 (insn) == REG_R15)
9266 {
9267 /* Insn can be contracted to 16-bit. */
9268 comp_insn16 =
9269 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9270 }
35c08157
KLC		 9271 }
9272 }
1c8f6a4d
KLC		 9273 }
9274 else
9275 {
9276 switch ((insn16 & 0xf000) >> 12)
35c08157 9277 {
1c8f6a4d
KLC		 9278 case 0xc:
9279 /* beqz38 or bnez38 */
9280 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9281 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9282 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9283 break;
35c08157 9284
1c8f6a4d
KLC		 9285 case 0xd:
9286 /* beqs38 or bnes38 */
9287 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9288 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9289 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9290 | (REG_R5 << 15);
9291 break;
35c08157 9292
1c8f6a4d
KLC		 9293 case 0xe:
9294 /* beqzS8 or bnezS8 */
9295 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9296 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9297 comp_insn |= REG_R15 << 20;
9298 break;
35c08157 9299
1c8f6a4d
KLC		 9300 default:
9301 break;
9302 }
9303 }
9304 if (comp_insn && re_insn)
9305 *re_insn = comp_insn;
9306 if (comp_insn16 && re_insn16)
9307 *re_insn16 = comp_insn16;
9308}
35c08157 9309
1c8f6a4d 9310/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9311
1c8f6a4d
KLC		 9312static bfd_boolean
9313nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9314 Elf_Internal_Rela *internal_relocs, int *insn_len,
9315 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9316 Elf_Internal_Shdr *symtab_hdr)
9317{
9318 /* There are 3 variations for LONGJUMP2
9319 case 2-4; 1st insn convertible, 16-bit on,
9320 optimize off or optimize for space
9321 bnes38 rt, ra, $1 ; LONGJUMP2
9322 j label ; 25_PCREL
9323 $1:
9324
9325 case 4-4; 1st insn not convertible
9326 bne rt, ra, $1 ; LONGJUMP2
9327 j label ; 25_PCREL
9328 $1:
9329
9330 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9331 bne rt, ra, $1 ; LONGJUMP2
9332 j label ; 25_PCREL
9333 $1: */
9334
9335 /* Get the reloc for the address from which the register is
9336 being loaded. This reloc will tell us which function is
9337 actually being called. */
9338
9339 bfd_vma laddr;
9340 int seq_len; /* Original length of instruction sequence. */
9341 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9342 int pic_ext_target = 0, first_size;
9343 unsigned int i;
9344 bfd_signed_vma foff;
9345 uint32_t insn, re_insn = 0;
9346 uint16_t insn16, re_insn16 = 0;
9347 unsigned long reloc, cond_reloc;
35c08157 9348
1c8f6a4d
KLC		 9349 enum elf_nds32_reloc_type checked_types[] =
9350 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9351
1c8f6a4d
KLC		 9352 irelend = internal_relocs + sec->reloc_count;
9353 seq_len = GET_SEQ_LEN (irel->r_addend);
9354 laddr = irel->r_offset;
9355 *insn_len = seq_len;
9356 first_size = (seq_len == 6) ? 2 : 4;
9357
9358 i2_irelfn =
9359 find_relocs_at_address_addr (irel, internal_relocs,
9360 irelend, R_NDS32_25_PCREL_RELA,
9361 laddr + first_size);
9362
9363 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9364 {
9365 cond_irelfn =
9366 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9367 checked_types[i], laddr);
9368 if (cond_irelfn != irelend)
9369 break;
9370 }
35c08157 9371
1c8f6a4d
KLC		 9372 if (i2_irelfn == irelend || cond_irelfn == irelend)
9373 {
695344c0 9374 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 9375 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9376 return FALSE;
9377 }
35c08157 9378
1c8f6a4d
KLC		 9379 /* Get the value of the symbol referred to by the reloc. */
9380 foff =
9381 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9382 &pic_ext_target);
9383 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9384 || foff >= CONSERVATIVE_16BIT_S1)
9385 return FALSE;
35c08157 9386
1c8f6a4d
KLC		 9387 /* Get the all corresponding instructions. */
9388 if (first_size == 4)
9389 {
9390 insn = bfd_getb32 (contents + laddr);
9391 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9392 }
9393 else
9394 {
9395 insn16 = bfd_getb16 (contents + laddr);
9396 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9397 }
35c08157 9398
1c8f6a4d
KLC		 9399 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9400 && foff < ACCURATE_8BIT_S1 - first_size)
9401 {
9402 if (first_size == 4)
9403 {
9404 /* Don't convert it to 16-bit now, keep this as relaxable for
9405 ``label reloc; INSN16''. */
35c08157 9406
1c8f6a4d
KLC		 9407 /* Save comp_insn32 to buffer. */
9408 bfd_putb32 (re_insn, contents + irel->r_offset);
9409 *insn_len = 4;
9410 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9411 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9412 cond_reloc = R_NDS32_INSN16;
9413 }
9414 else
9415 {
9416 bfd_putb16 (re_insn16, contents + irel->r_offset);
9417 *insn_len = 2;
9418 reloc = R_NDS32_9_PCREL_RELA;
9419 cond_reloc = R_NDS32_NONE;
9420 }
9421 }
9422 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9423 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9424 && foff < ACCURATE_14BIT_S1 - first_size))
9425 {
9426 /* beqs label ; 15_PCREL */
9427 bfd_putb32 (re_insn, contents + irel->r_offset);
9428 *insn_len = 4;
9429 reloc = R_NDS32_15_PCREL_RELA;
9430 cond_reloc = R_NDS32_NONE;
9431 }
9432 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9433 && foff >= -CONSERVATIVE_16BIT_S1
9434 && foff < CONSERVATIVE_16BIT_S1)
9435 {
9436 /* beqz label ; 17_PCREL */
9437 bfd_putb32 (re_insn, contents + irel->r_offset);
9438 *insn_len = 4;
9439 reloc = R_NDS32_17_PCREL_RELA;
9440 cond_reloc = R_NDS32_NONE;
9441 }
9442 else
9443 return FALSE;
35c08157 9444
1c8f6a4d
KLC		 9445 /* Set all relocations. */
9446 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9447 irel->r_addend = i2_irelfn->r_addend;
35c08157 9448
1c8f6a4d
KLC		 9449 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9450 cond_reloc);
9451 cond_irelfn->r_addend = 0;
35c08157 9452
1c8f6a4d
KLC		 9453 if ((seq_len ^ *insn_len ) & 0x2)
9454 {
9455 insn16 = NDS32_NOP16;
9456 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9457 i2_irelfn->r_offset = 4;
9458 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9459 R_NDS32_INSN16);
9460 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9461 *insn_len += 2;
9462 }
9463 else
9464 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9465 R_NDS32_NONE);
9466 return TRUE;
9467}
35c08157 9468
1c8f6a4d 9469/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9470
1c8f6a4d
KLC		 9471static bfd_boolean
9472nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9473 Elf_Internal_Rela *internal_relocs, int *insn_len,
9474 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9475 Elf_Internal_Shdr *symtab_hdr)
9476{
9477 /* There are 5 variations for LONGJUMP3
9478 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9479 optimize off or optimize for space
07d6d2b8
AM		 9480 bnes38 rt, ra, $1 ; LONGJUMP3
9481 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9482 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9483 jr5 ta ;
9484 $1: ;
1c8f6a4d
KLC		 9485
9486 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM		 9487 bnes38 rt, ra, $1 ; LONGJUMP3
9488 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9489 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9490 jr5 ta ;
9491 $1: ; LABEL
1c8f6a4d
KLC		 9492
9493 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9494 optimize off or optimize for space
07d6d2b8
AM		 9495 bne rt, ra, $1 ; LONGJUMP3
9496 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9497 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9498 jr5 ta ;
9499 $1: ;
1c8f6a4d
KLC		 9500
9501 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9502 16-bit off if no INSN16
07d6d2b8
AM		 9503 bne rt, ra, $1 ; LONGJUMP3
9504 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9505 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9506 jr ta ;
9507 $1: ;
1c8f6a4d
KLC		 9508
9509 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9510 16-bit off if no INSN16
07d6d2b8
AM		 9511 bne rt, ra, $1 ; LONGJUMP3
9512 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9513 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9514 jr ta ;
9515 $1: ; LABEL */
1c8f6a4d
KLC		 9516
9517 /* Get the reloc for the address from which the register is
9518 being loaded. This reloc will tell us which function is
9519 actually being called. */
9520 enum elf_nds32_reloc_type checked_types[] =
9521 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9522
9523 int reloc_off = 0, cond_removed = 0, convertible;
9524 bfd_vma laddr;
9525 int seq_len; /* Original length of instruction sequence. */
9526 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9527 int pic_ext_target = 0, first_size;
9528 unsigned int i;
9529 bfd_signed_vma foff;
9530 uint32_t insn, re_insn = 0;
9531 uint16_t insn16, re_insn16 = 0;
9532 unsigned long reloc, cond_reloc;
35c08157 9533
1c8f6a4d
KLC		 9534 irelend = internal_relocs + sec->reloc_count;
9535 seq_len = GET_SEQ_LEN (irel->r_addend);
9536 laddr = irel->r_offset;
9537 *insn_len = seq_len;
35c08157 9538
1c8f6a4d 9539 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9540
1c8f6a4d
KLC		 9541 if (convertible)
9542 first_size = 2;
9543 else
9544 first_size = 4;
9545
9546 /* Get all needed relocations. */
9547 hi_irelfn =
9548 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9549 R_NDS32_HI20_RELA, laddr + first_size);
9550 lo_irelfn =
9551 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9552 R_NDS32_LO12S0_ORI_RELA,
9553 laddr + first_size + 4);
9554
9555 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9556 {
9557 cond_irelfn =
9558 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9559 checked_types[i], laddr);
9560 if (cond_irelfn != irelend)
9561 break;
9562 }
35c08157 9563
1c8f6a4d
KLC		 9564 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9565 {
695344c0 9566 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 9567 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9568 return FALSE;
9569 }
35c08157 9570
1c8f6a4d
KLC		 9571 /* Get the value of the symbol referred to by the reloc. */
9572 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9573 &pic_ext_target);
35c08157 9574
1c8f6a4d
KLC		 9575 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9576 || foff >= CONSERVATIVE_24BIT_S1)
9577 return FALSE;
35c08157 9578
1c8f6a4d
KLC		 9579 /* Get the all corresponding instructions. */
9580 if (first_size == 4)
9581 {
9582 insn = bfd_getb32 (contents + laddr);
9583 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9584 }
9585 else
9586 {
9587 insn16 = bfd_getb16 (contents + laddr);
9588 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9589 }
35c08157 9590
1c8f6a4d
KLC		 9591 /* For simplicity of coding, we are going to modify the section
9592 contents, the section relocs, and the BFD symbol table. We
9593 must tell the rest of the code not to free up this
9594 information. It would be possible to instead create a table
9595 of changes which have to be made, as is done in coff-mips.c;
9596 that would be more work, but would require less memory when
9597 the linker is run. */
35c08157 9598
1c8f6a4d
KLC		 9599 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9600 && foff < ACCURATE_8BIT_S1 - first_size)
9601 {
9602 if (!(seq_len & 0x2))
9603 {
9604 /* Don't convert it to 16-bit now, keep this as relaxable
9605 for ``label reloc; INSN1a''6. */
9606 /* Save comp_insn32 to buffer. */
9607 bfd_putb32 (re_insn, contents + irel->r_offset);
9608 *insn_len = 4;
9609 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9610 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9611 cond_reloc = R_NDS32_INSN16;
9612 }
9613 else
9614 {
9615 /* Not optimize for speed; convert sequence to 16-bit. */
9616 /* Save comp_insn16 to buffer. */
9617 bfd_putb16 (re_insn16, contents + irel->r_offset);
9618 *insn_len = 2;
9619 reloc = R_NDS32_9_PCREL_RELA;
9620 cond_reloc = R_NDS32_NONE;
9621 }
9622 cond_removed = 1;
9623 }
9624 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9625 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9626 && foff < ACCURATE_14BIT_S1 - first_size))
9627 {
9628 /* beqs label ; 15_PCREL */
9629 bfd_putb32 (re_insn, contents + irel->r_offset);
9630 *insn_len = 4;
9631 reloc = R_NDS32_15_PCREL_RELA;
9632 cond_reloc = R_NDS32_NONE;
9633 cond_removed = 1;
9634 }
9635 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9636 && foff >= -CONSERVATIVE_16BIT_S1
9637 && foff < CONSERVATIVE_16BIT_S1)
9638 {
9639 /* beqz label ; 17_PCREL */
9640 bfd_putb32 (re_insn, contents + irel->r_offset);
9641 *insn_len = 4;
9642 reloc = R_NDS32_17_PCREL_RELA;
9643 cond_reloc = R_NDS32_NONE;
9644 cond_removed = 1;
9645 }
9646 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9647 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9648 {
9649 /* Relax to one of the following 3 variations
9650
9651 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9652 for space
9653 bnes38 rt, $1 ; LONGJUMP2
9654 j label ; 25_PCREL
9655 $1
9656
9657 case 4-4; 1st insn not convertible, others don't care
9658 bne rt, ra, $1 ; LONGJUMP2
9659 j label ; 25_PCREL
9660 $1
9661
9662 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9663 bne rt, ra, $1 ; LONGJUMP2
9664 j label ; 25_PCREL
9665 $1 */
9666
9667 /* Offset for first instruction. */
9668
9669 /* Use j label as second instruction. */
9670 *insn_len = 4 + first_size;
9671 insn = INSN_J;
9672 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9673 reloc = R_NDS32_LONGJUMP2;
9674 cond_reloc = R_NDS32_25_PLTREL;
9675 }
9676 else
9677 return FALSE;
35c08157 9678
1c8f6a4d
KLC		 9679 if (cond_removed == 1)
9680 {
9681 /* Set all relocations. */
9682 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9683 irel->r_addend = hi_irelfn->r_addend;
9684
9685 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9686 cond_reloc);
9687 cond_irelfn->r_addend = 0;
9688 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9689 R_NDS32_NONE);
9690 }
9691 else
9692 {
9693 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
1c8f6a4d
KLC		 9694 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9695 cond_reloc);
9696 }
35c08157 9697
1c8f6a4d
KLC		 9698 if ((seq_len ^ *insn_len ) & 0x2)
9699 {
9700 insn16 = NDS32_NOP16;
9701 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9702 lo_irelfn->r_offset = *insn_len;
9703 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9704 R_NDS32_INSN16);
9705 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9706 *insn_len += 2;
9707 }
9708 else
9709 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9710 R_NDS32_NONE);
9711 return TRUE;
9712}
35c08157 9713
1c8f6a4d 9714/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9715
1c8f6a4d
KLC		 9716static bfd_boolean
9717nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9718 Elf_Internal_Rela *internal_relocs, int *insn_len,
9719 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9720 Elf_Internal_Shdr *symtab_hdr)
9721{
9722 /* The pattern for LONGCALL4. Support for function cse.
9723 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9724 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9725 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9726
1c8f6a4d
KLC		 9727 bfd_vma laddr;
9728 uint32_t insn;
9729 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9730 Elf_Internal_Rela *irelend;
9731 int pic_ext_target = 0;
9732 bfd_signed_vma foff;
35c08157 9733
1c8f6a4d
KLC		 9734 irelend = internal_relocs + sec->reloc_count;
9735 laddr = irel->r_offset;
35c08157 9736
1c8f6a4d
KLC		 9737 /* Get the reloc for the address from which the register is
9738 being loaded. This reloc will tell us which function is
9739 actually being called. */
9740 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9741 R_NDS32_HI20_RELA, laddr);
35c08157 9742
1c8f6a4d
KLC		 9743 if (hi_irel == irelend)
9744 {
695344c0 9745 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9746 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9747 return FALSE;
9748 }
35c08157 9749
1c8f6a4d
KLC		 9750 /* Get the value of the symbol referred to by the reloc. */
9751 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9752 &pic_ext_target);
35c08157 9753
1c8f6a4d
KLC		 9754 /* This condition only happened when symbol is undefined. */
9755 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9756 || foff >= CONSERVATIVE_24BIT_S1)
9757 return FALSE;
35c08157 9758
1c8f6a4d
KLC		 9759 /* Relax to: jal symbol; 25_PCREL */
9760 /* For simplicity of coding, we are going to modify the section
9761 contents, the section relocs, and the BFD symbol table. We
9762 must tell the rest of the code not to free up this
9763 information. It would be possible to instead create a table
9764 of changes which have to be made, as is done in coff-mips.c;
9765 that would be more work, but would require less memory when
9766 the linker is run. */
35c08157 9767
1c8f6a4d
KLC		 9768 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9769 R_NDS32_PTR_RESOLVED, irel->r_addend);
9770 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9771 R_NDS32_EMPTY, irel->r_addend);
35c08157 9772
1c8f6a4d
KLC		 9773 if (ptr_irel == irelend || em_irel == irelend)
9774 {
695344c0 9775 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9776 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9777 return FALSE;
9778 }
9779 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9780 insn = bfd_getb32 (contents + irel->r_addend);
9781 if (insn & 0x80000000)
9782 return FALSE;
35c08157 9783
1c8f6a4d
KLC		 9784 /* Replace the long call with a jal. */
9785 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9786 R_NDS32_25_PCREL_RELA);
9787 ptr_irel->r_addend = 1;
35c08157 9788
1c8f6a4d
KLC		 9789 /* We don't resolve this here but resolve it in relocate_section. */
9790 insn = INSN_JAL;
9791 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9792
1c8f6a4d
KLC		 9793 irel->r_info =
9794 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9795
1c8f6a4d
KLC		 9796 /* If there is function cse, HI20 can not remove now. */
9797 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9798 R_NDS32_LONGCALL4, laddr);
9799 if (call_irel == irelend)
9800 {
9801 *insn_len = 0;
9802 hi_irel->r_info =
9803 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9804 }
35c08157 9805
1c8f6a4d
KLC		 9806 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9807 R_NDS32_INSN16, irel->r_addend);
9808 if (insn_irel != irelend)
9809 insn_irel->r_info =
9810 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9811
1c8f6a4d
KLC		 9812 return TRUE;
9813}
35c08157 9814
1c8f6a4d 9815/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 9816
1c8f6a4d
KLC		 9817static bfd_boolean
9818nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9819 Elf_Internal_Rela *internal_relocs, int *insn_len,
9820 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9821 Elf_Internal_Shdr *symtab_hdr)
9822{
9823 /* The pattern for LONGCALL5.
9824 bltz rt, .L1 ; LONGCALL5/17_PCREL
9825 jal symbol ; 25_PCREL
9826 .L1: */
35c08157 9827
1c8f6a4d
KLC		 9828 bfd_vma laddr;
9829 uint32_t insn;
9830 Elf_Internal_Rela *cond_irel, *irelend;
9831 int pic_ext_target = 0;
9832 bfd_signed_vma foff;
35c08157 9833
1c8f6a4d
KLC		 9834 irelend = internal_relocs + sec->reloc_count;
9835 laddr = irel->r_offset;
9836 insn = bfd_getb32 (contents + laddr);
35c08157 9837
1c8f6a4d
KLC		 9838 /* Get the reloc for the address from which the register is
9839 being loaded. This reloc will tell us which function is
9840 actually being called. */
9841 cond_irel =
9842 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9843 R_NDS32_25_PCREL_RELA, irel->r_addend);
9844 if (cond_irel == irelend)
9845 {
695344c0 9846 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 9847 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9848 return FALSE;
9849 }
35c08157 9850
1c8f6a4d
KLC		 9851 /* Get the value of the symbol referred to by the reloc. */
9852 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9853 &pic_ext_target);
35c08157 9854
1c8f6a4d
KLC		 9855 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9856 || foff >= CONSERVATIVE_16BIT_S1)
9857 return FALSE;
35c08157 9858
1c8f6a4d
KLC		 9859 /* Relax to bgezal rt, label ; 17_PCREL
9860 or bltzal rt, label ; 17_PCREL */
35c08157 9861
1c8f6a4d
KLC		 9862 /* Convert to complimentary conditional call. */
9863 insn = CONVERT_CONDITION_CALL (insn);
35c08157 9864
1c8f6a4d
KLC		 9865 /* For simplicity of coding, we are going to modify the section
9866 contents, the section relocs, and the BFD symbol table. We
9867 must tell the rest of the code not to free up this
9868 information. It would be possible to instead create a table
9869 of changes which have to be made, as is done in coff-mips.c;
9870 that would be more work, but would require less memory when
9871 the linker is run. */
35c08157 9872
1c8f6a4d
KLC		 9873 /* Modify relocation and contents. */
9874 cond_irel->r_info =
9875 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 9876
1c8f6a4d
KLC		 9877 /* Replace the long call with a bgezal. */
9878 bfd_putb32 (insn, contents + cond_irel->r_offset);
9879 *insn_len = 0;
35c08157 9880
1c8f6a4d
KLC		 9881 /* Clean unnessary relocations. */
9882 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9883
1c8f6a4d
KLC		 9884 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9885 R_NDS32_17_PCREL_RELA, laddr);
9886 cond_irel->r_info =
9887 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9888
1c8f6a4d
KLC		 9889 return TRUE;
9890}
35c08157 9891
1c8f6a4d 9892/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 9893
1c8f6a4d
KLC		 9894static bfd_boolean
9895nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9896 Elf_Internal_Rela *internal_relocs, int *insn_len,
9897 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9898 Elf_Internal_Shdr *symtab_hdr)
9899{
9900 /* The pattern for LONGCALL6.
9901 bltz rt, .L1 ; LONGCALL6/17_PCREL
9902 sethi ta, hi20(symbol) ; HI20/PTR
9903 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9904 jral ta ; PTR_RES/EMPTY/INSN16
9905 .L1 */
9906
9907 bfd_vma laddr;
9908 uint32_t insn;
9909 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9910 int pic_ext_target = 0;
9911 bfd_signed_vma foff;
35c08157 9912
1c8f6a4d
KLC		 9913 irelend = internal_relocs + sec->reloc_count;
9914 laddr = irel->r_offset;
35c08157 9915
1c8f6a4d
KLC		 9916 /* Get the reloc for the address from which the register is
9917 being loaded. This reloc will tell us which function is
9918 actually being called. */
9919 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9920 R_NDS32_EMPTY, irel->r_addend);
35c08157 9921
1c8f6a4d
KLC		 9922 if (em_irel == irelend)
9923 {
695344c0 9924 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 9925 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9926 return FALSE;
9927 }
35c08157 9928
1c8f6a4d
KLC		 9929 /* Get the value of the symbol referred to by the reloc. */
9930 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9931 &pic_ext_target);
35c08157 9932
1c8f6a4d
KLC		 9933 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9934 || foff >= CONSERVATIVE_24BIT_S1)
9935 return FALSE;
35c08157 9936
1c8f6a4d
KLC		 9937 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9938 insn = bfd_getb32 (contents + irel->r_addend);
9939 if (insn & 0x80000000)
9940 return FALSE;
35c08157 9941
1c8f6a4d
KLC		 9942 insn = bfd_getb32 (contents + laddr);
9943 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9944 {
9945 /* Relax to bgezal rt, label ; 17_PCREL
9946 or bltzal rt, label ; 17_PCREL */
35c08157 9947
1c8f6a4d
KLC		 9948 /* Convert to complimentary conditional call. */
9949 *insn_len = 0;
9950 insn = CONVERT_CONDITION_CALL (insn);
9951 bfd_putb32 (insn, contents + em_irel->r_offset);
9952
9953 em_irel->r_info =
9954 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
9955
9956 /* Set resolved relocation. */
9957 cond_irel =
9958 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9959 R_NDS32_PTR_RESOLVED, irel->r_addend);
9960 if (cond_irel == irelend)
35c08157 9961 {
695344c0 9962 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 9963 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9964 return FALSE;
9965 }
9966 cond_irel->r_addend = 1;
35c08157 9967
1c8f6a4d 9968 /* Clear relocations. */
35c08157 9969
1c8f6a4d
KLC		 9970 irel->r_info =
9971 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9972
1c8f6a4d
KLC		 9973 cond_irel =
9974 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9975 R_NDS32_17_PCREL_RELA, laddr);
9976 if (cond_irel != irelend)
9977 cond_irel->r_info =
9978 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9979
1c8f6a4d
KLC		 9980 cond_irel =
9981 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9982 R_NDS32_INSN16, irel->r_addend);
9983 if (cond_irel != irelend)
9984 cond_irel->r_info =
9985 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9986
1c8f6a4d
KLC		 9987 }
9988 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9989 {
9990 /* Relax to the following instruction sequence
9991 bltz rt, .L1 ; LONGCALL2/17_PCREL
9992 jal symbol ; 25_PCREL/PTR_RES
9993 .L1 */
9994 *insn_len = 4;
9995 /* Convert instruction. */
9996 insn = INSN_JAL;
9997 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9998
1c8f6a4d
KLC		 9999 /* Convert relocations. */
10000 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10001 R_NDS32_25_PCREL_RELA);
10002 irel->r_info =
10003 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10004
1c8f6a4d
KLC		 10005 /* Set resolved relocation. */
10006 cond_irel =
10007 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10008 R_NDS32_PTR_RESOLVED, irel->r_addend);
10009 if (cond_irel == irelend)
10010 {
695344c0 10011 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10012 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10013 return FALSE;
10014 }
10015 cond_irel->r_addend = 1;
35c08157 10016
1c8f6a4d
KLC		 10017 cond_irel =
10018 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10019 R_NDS32_INSN16, irel->r_addend);
10020 if (cond_irel != irelend)
10021 cond_irel->r_info =
10022 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10023 }
10024 return TRUE;
10025}
35c08157 10026
1c8f6a4d 10027/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10028
1c8f6a4d
KLC		 10029static bfd_boolean
10030nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10031 Elf_Internal_Rela *internal_relocs, int *insn_len,
10032 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10033 Elf_Internal_Shdr *symtab_hdr)
10034{
10035 /* The pattern for LONGJUMP4.
10036 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10037 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10038 jr ta ; PTR_RES/INSN16/EMPTY */
10039
10040 bfd_vma laddr;
10041 int seq_len; /* Original length of instruction sequence. */
10042 uint32_t insn;
10043 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10044 int pic_ext_target = 0;
10045 bfd_signed_vma foff;
35c08157 10046
1c8f6a4d
KLC		 10047 irelend = internal_relocs + sec->reloc_count;
10048 seq_len = GET_SEQ_LEN (irel->r_addend);
10049 laddr = irel->r_offset;
10050 *insn_len = seq_len;
35c08157 10051
1c8f6a4d
KLC		 10052 /* Get the reloc for the address from which the register is
10053 being loaded. This reloc will tell us which function is
10054 actually being called. */
35c08157 10055
1c8f6a4d
KLC		 10056 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10057 R_NDS32_HI20_RELA, laddr);
35c08157 10058
1c8f6a4d
KLC		 10059 if (hi_irel == irelend)
10060 {
695344c0 10061 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10062 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10063 return FALSE;
10064 }
35c08157 10065
1c8f6a4d
KLC		 10066 /* Get the value of the symbol referred to by the reloc. */
10067 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10068 &pic_ext_target);
35c08157 10069
1c8f6a4d
KLC		 10070 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10071 || foff < -CONSERVATIVE_24BIT_S1)
10072 return FALSE;
35c08157 10073
1c8f6a4d
KLC		 10074 /* Convert it to "j label", it may be converted to j8 in the final
10075 pass of relaxation. Therefore, we do not consider this currently. */
10076 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10077 R_NDS32_PTR_RESOLVED, irel->r_addend);
10078 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10079 R_NDS32_EMPTY, irel->r_addend);
35c08157 10080
1c8f6a4d
KLC		 10081 if (ptr_irel == irelend || em_irel == irelend)
10082 {
695344c0 10083 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10084 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10085 return FALSE;
10086 }
35c08157 10087
1c8f6a4d
KLC		 10088 em_irel->r_info =
10089 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10090 ptr_irel->r_addend = 1;
35c08157 10091
1c8f6a4d
KLC		 10092 /* Write instruction. */
10093 insn = INSN_J;
10094 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10095
1c8f6a4d
KLC		 10096 /* Clear relocations. */
10097 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10098
1c8f6a4d
KLC		 10099 /* If there is function cse, HI20 can not remove now. */
10100 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10101 R_NDS32_LONGJUMP4, laddr);
10102 if (call_irel == irelend)
10103 {
10104 *insn_len = 0;
10105 hi_irel->r_info =
10106 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10107 }
35c08157 10108
1c8f6a4d
KLC		 10109 return TRUE;
10110}
35c08157 10111
1c8f6a4d 10112/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10113
1c8f6a4d
KLC		 10114static bfd_boolean
10115nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10116 Elf_Internal_Rela *internal_relocs, int *insn_len,
10117 int *seq_len, bfd_byte *contents,
10118 Elf_Internal_Sym *isymbuf,
10119 Elf_Internal_Shdr *symtab_hdr)
10120{
10121 /* There are 2 variations for LONGJUMP5
10122 case 2-4; 1st insn convertible, 16-bit on.
10123 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10124 j label ; 25_PCREL/INSN16
10125 $1:
10126
10127 case 4-4; 1st insn not convertible
10128 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10129 j label ; 25_PCREL/INSN16
10130 .L1: */
10131
10132 bfd_vma laddr;
10133 Elf_Internal_Rela *cond_irel, *irelend;
10134 int pic_ext_target = 0;
10135 unsigned int i;
10136 bfd_signed_vma foff;
10137 uint32_t insn, re_insn = 0;
10138 uint16_t insn16, re_insn16 = 0;
10139 unsigned long reloc;
35c08157 10140
1c8f6a4d
KLC		 10141 enum elf_nds32_reloc_type checked_types[] =
10142 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10143 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10144
1c8f6a4d
KLC		 10145 irelend = internal_relocs + sec->reloc_count;
10146 laddr = irel->r_offset;
35c08157 10147
1c8f6a4d
KLC		 10148 /* Get the reloc for the address from which the register is
10149 being loaded. This reloc will tell us which function is
10150 actually being called. */
35c08157 10151
1c8f6a4d
KLC		 10152 cond_irel =
10153 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10154 R_NDS32_25_PCREL_RELA, irel->r_addend);
10155 if (cond_irel == irelend)
10156 {
695344c0 10157 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10158 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10159 return FALSE;
10160 }
35c08157 10161
1c8f6a4d
KLC		 10162 /* Get the value of the symbol referred to by the reloc. */
10163 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10164 &pic_ext_target);
35c08157 10165
1c8f6a4d
KLC		 10166 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10167 || foff >= CONSERVATIVE_16BIT_S1)
10168 return FALSE;
35c08157 10169
1c8f6a4d
KLC		 10170 /* Get the all corresponding instructions. */
10171 insn = bfd_getb32 (contents + laddr);
10172 /* Check instruction size. */
10173 if (insn & 0x80000000)
10174 {
10175 *seq_len = 0;
10176 insn16 = insn >> 16;
10177 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10178 }
10179 else
10180 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10181
1c8f6a4d
KLC		 10182 if (N32_OP6 (re_insn) == N32_OP6_BR1
10183 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10184 {
10185 /* beqs label ; 15_PCREL. */
10186 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10187 reloc = R_NDS32_15_PCREL_RELA;
10188 }
10189 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10190 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10191 {
10192 /* beqz label ; 17_PCREL. */
10193 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10194 reloc = R_NDS32_17_PCREL_RELA;
10195 }
10196 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10197 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10198 {
10199 /* beqc label ; 9_PCREL. */
10200 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10201 reloc = R_NDS32_WORD_9_PCREL_RELA;
10202 }
10203 else
10204 return FALSE;
35c08157 10205
1c8f6a4d
KLC		 10206 /* Set all relocations. */
10207 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10208
1c8f6a4d
KLC		 10209 /* Clean relocations. */
10210 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10211 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10212 {
10213 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10214 checked_types[i], laddr);
10215 if (cond_irel != irelend)
10216 {
10217 if (*seq_len == 0
10218 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10219 {
1c8f6a4d
KLC		 10220 /* If the branch instruction is 2 byte, it cannot remove
10221 directly. Only convert it to nop16 and remove it after
10222 checking alignment issue. */
10223 insn16 = NDS32_NOP16;
10224 bfd_putb16 (insn16, contents + laddr);
10225 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10226 }
10227 else
1c8f6a4d
KLC		 10228 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10229 R_NDS32_NONE);
35c08157 10230 }
1c8f6a4d
KLC		 10231 }
10232 *insn_len = 0;
35c08157 10233
1c8f6a4d
KLC		 10234 return TRUE;
10235}
35c08157 10236
1c8f6a4d 10237/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10238
1c8f6a4d
KLC		 10239static bfd_boolean
10240nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10241 Elf_Internal_Rela *internal_relocs, int *insn_len,
10242 int *seq_len, bfd_byte *contents,
10243 Elf_Internal_Sym *isymbuf,
10244 Elf_Internal_Shdr *symtab_hdr)
10245{
10246 /* There are 5 variations for LONGJUMP6
10247 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10248 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10249 sethi ta, hi20(symbol) ; HI20/PTR
10250 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10251 jr ta ; PTR_RES/INSN16/EMPTY
10252 .L1:
10253
10254 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10255 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10256 sethi ta, hi20(symbol) ; HI20/PTR
10257 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10258 jr ta ; PTR_RES/INSN16/EMPTY
10259 .L1: */
10260
10261 enum elf_nds32_reloc_type checked_types[] =
10262 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10263 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10264
10265 int reloc_off = 0, cond_removed = 0;
10266 bfd_vma laddr;
10267 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10268 int pic_ext_target = 0;
10269 unsigned int i;
10270 bfd_signed_vma foff;
10271 uint32_t insn, re_insn = 0;
10272 uint16_t insn16, re_insn16 = 0;
10273 unsigned long reloc;
35c08157 10274
1c8f6a4d
KLC		 10275 irelend = internal_relocs + sec->reloc_count;
10276 laddr = irel->r_offset;
35c08157 10277
1c8f6a4d
KLC		 10278 /* Get the reloc for the address from which the register is
10279 being loaded. This reloc will tell us which function is
10280 actually being called. */
10281 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10282 R_NDS32_EMPTY, irel->r_addend);
35c08157 10283
1c8f6a4d
KLC		 10284 if (em_irel == irelend)
10285 {
695344c0 10286 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 10287 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10288 return FALSE;
10289 }
35c08157 10290
1c8f6a4d
KLC		 10291 /* Get the value of the symbol referred to by the reloc. */
10292 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10293 &pic_ext_target);
35c08157 10294
1c8f6a4d
KLC		 10295 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10296 || foff >= CONSERVATIVE_24BIT_S1)
10297 return FALSE;
35c08157 10298
1c8f6a4d
KLC		 10299 insn = bfd_getb32 (contents + laddr);
10300 /* Check instruction size. */
10301 if (insn & 0x80000000)
10302 {
10303 *seq_len = 0;
10304 insn16 = insn >> 16;
10305 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10306 }
10307 else
10308 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10309
1c8f6a4d
KLC		 10310 /* For simplicity of coding, we are going to modify the section
10311 contents, the section relocs, and the BFD symbol table. We
10312 must tell the rest of the code not to free up this
10313 information. It would be possible to instead create a table
10314 of changes which have to be made, as is done in coff-mips.c;
10315 that would be more work, but would require less memory when
10316 the linker is run. */
35c08157 10317
1c8f6a4d
KLC		 10318 if (N32_OP6 (re_insn) == N32_OP6_BR1
10319 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10320 {
10321 /* beqs label ; 15_PCREL */
10322 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10323 reloc = R_NDS32_15_PCREL_RELA;
10324 cond_removed = 1;
10325 }
10326 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10327 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10328 {
10329 /* beqz label ; 17_PCREL */
10330 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10331 reloc = R_NDS32_17_PCREL_RELA;
10332 cond_removed = 1;
10333 }
10334 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10335 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10336 {
10337 /* Relax to one of the following 2 variations
35c08157 10338
1c8f6a4d
KLC		 10339 case 2-4; 1st insn convertible, 16-bit on.
10340 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10341 j label ; 25_PCREL/INSN16
10342 $1:
35c08157 10343
1c8f6a4d
KLC		 10344 case 4-4; 1st insn not convertible
10345 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10346 j label ; 25_PCREL/INSN16
10347 .L1: */
35c08157 10348
1c8f6a4d
KLC		 10349 /* Use j label as second instruction. */
10350 insn = INSN_J;
10351 reloc = R_NDS32_25_PCREL_RELA;
10352 bfd_putb32 (insn, contents + em_irel->r_offset);
10353 }
10354 else
10355 return FALSE;
35c08157 10356
1c8f6a4d
KLC		 10357 /* Set all relocations. */
10358 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10359
1c8f6a4d
KLC		 10360 cond_irel =
10361 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10362 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10363 cond_irel->r_addend = 1;
35c08157 10364
1c8f6a4d
KLC		 10365 /* Use INSN16 of first branch instruction to distinguish if keeping
10366 INSN16 of final instruction or not. */
10367 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10368 R_NDS32_INSN16, irel->r_offset);
10369 if (insn_irel == irelend)
10370 {
10371 /* Clean the final INSN16. */
10372 insn_irel =
10373 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10374 R_NDS32_INSN16, em_irel->r_offset);
10375 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10376 R_NDS32_NONE);
10377 }
10378
10379 if (cond_removed == 1)
10380 {
10381 *insn_len = 0;
10382
10383 /* Clear relocations. */
10384 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10385
1c8f6a4d
KLC		 10386 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10387 {
10388 cond_irel =
10389 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10390 checked_types[i], laddr);
10391 if (cond_irel != irelend)
35c08157 10392 {
1c8f6a4d
KLC		 10393 if (*seq_len == 0
10394 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10395 {
10396 /* If the branch instruction is 2 byte, it cannot remove
10397 directly. Only convert it to nop16 and remove it after
10398 checking alignment issue. */
10399 insn16 = NDS32_NOP16;
10400 bfd_putb16 (insn16, contents + laddr);
10401 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10402 }
10403 else
10404 cond_irel->r_info =
10405 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10406 }
35c08157 10407 }
1c8f6a4d
KLC		 10408 }
10409 else
10410 {
10411 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10412 R_NDS32_LONGJUMP5);
10413 }
35c08157 10414
1c8f6a4d
KLC		 10415 return TRUE;
10416}
35c08157 10417
1c8f6a4d 10418/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10419
1c8f6a4d
KLC		 10420static bfd_boolean
10421nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10422 Elf_Internal_Rela *internal_relocs, int *insn_len,
10423 int *seq_len, bfd_byte *contents,
10424 Elf_Internal_Sym *isymbuf,
10425 Elf_Internal_Shdr *symtab_hdr)
10426{
10427 /* There are 2 variations for LONGJUMP5
10428 case 2-4; 1st insn convertible, 16-bit on.
10429 movi55 ta, imm11 ; LONGJUMP7/INSN16
10430 beq rt, ta, label ; 15_PCREL
10431
10432 case 4-4; 1st insn not convertible
10433 movi55 ta, imm11 ; LONGJUMP7/INSN16
10434 beq rt, ta, label ; 15_PCREL */
10435
10436 bfd_vma laddr;
10437 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10438 int pic_ext_target = 0;
10439 bfd_signed_vma foff;
10440 uint32_t insn, re_insn = 0;
10441 uint16_t insn16;
10442 uint32_t imm11;
35c08157 10443
1c8f6a4d
KLC		 10444 irelend = internal_relocs + sec->reloc_count;
10445 laddr = irel->r_offset;
35c08157 10446
1c8f6a4d
KLC		 10447 /* Get the reloc for the address from which the register is
10448 being loaded. This reloc will tell us which function is
10449 actually being called. */
35c08157 10450
1c8f6a4d
KLC		 10451 cond_irel =
10452 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10453 R_NDS32_15_PCREL_RELA, irel->r_addend);
10454 if (cond_irel == irelend)
10455 {
695344c0 10456 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 10457 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10458 return FALSE;
10459 }
35c08157 10460
1c8f6a4d
KLC		 10461 /* Get the value of the symbol referred to by the reloc. */
10462 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10463 &pic_ext_target);
35c08157 10464
1c8f6a4d
KLC		 10465 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10466 || foff >= CONSERVATIVE_8BIT_S1)
10467 return FALSE;
35c08157 10468
1c8f6a4d
KLC		 10469 /* Get the first instruction for its size. */
10470 insn = bfd_getb32 (contents + laddr);
10471 if (insn & 0x80000000)
10472 {
10473 *seq_len = 0;
10474 /* Get the immediate from movi55. */
10475 imm11 = N16_IMM5S (insn >> 16);
10476 }
10477 else
10478 {
10479 /* Get the immediate from movi. */
10480 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10481 }
10482
1c8f6a4d
KLC		 10483 /* Get the branch instruction. */
10484 insn = bfd_getb32 (contents + irel->r_addend);
10485 /* Convert instruction to BR3. */
10486 if ((insn >> 14) & 0x1)
10487 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10488 else
10489 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10490
1c8f6a4d 10491 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10492
1c8f6a4d
KLC		 10493 /* Set all relocations. */
10494 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10495 R_NDS32_WORD_9_PCREL_RELA);
10496
10497 /* Clean relocations. */
10498 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10499 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10500 R_NDS32_INSN16, irel->r_offset);
10501 if (insn_irel != irelend)
10502 {
10503 if (*seq_len == 0)
35c08157 10504 {
1c8f6a4d
KLC		 10505 /* If the first insntruction is 16bit, convert it to nop16. */
10506 insn16 = NDS32_NOP16;
10507 bfd_putb16 (insn16, contents + laddr);
10508 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10509 }
1c8f6a4d
KLC		 10510 else
10511 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10512 R_NDS32_NONE);
35c08157 10513 }
1c8f6a4d 10514 *insn_len = 0;
35c08157 10515
1c8f6a4d
KLC		 10516 return TRUE;
10517}
35c08157 10518
1c8f6a4d 10519#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10520
1c8f6a4d 10521/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10522
1c8f6a4d
KLC		 10523static bfd_boolean
10524nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10525 asection *sec, Elf_Internal_Rela *irel,
10526 Elf_Internal_Rela *internal_relocs, int *insn_len,
10527 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10528 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10529{
6cae483a
AM		 10530 int eliminate_sethi = 0, range_type;
10531 unsigned int i;
1c8f6a4d
KLC		 10532 bfd_vma local_sda, laddr;
10533 int seq_len; /* Original length of instruction sequence. */
10534 uint32_t insn;
10535 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10536 bfd_vma access_addr = 0;
10537 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10538 enum elf_nds32_reloc_type checked_types[] =
10539 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10540 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10541 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10542 R_NDS32_TLS_LE_HI20
10543 };
35c08157 10544
1c8f6a4d
KLC		 10545 irelend = internal_relocs + sec->reloc_count;
10546 seq_len = GET_SEQ_LEN (irel->r_addend);
10547 laddr = irel->r_offset;
10548 *insn_len = seq_len;
35c08157 10549
1c8f6a4d 10550 /* Get the high part relocation. */
6cae483a 10551 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10552 {
10553 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10554 checked_types[i], laddr);
10555 if (hi_irelfn != irelend)
10556 break;
10557 }
35c08157 10558
1c8f6a4d
KLC		 10559 if (hi_irelfn == irelend)
10560 {
695344c0 10561 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
2dcf00ce 10562 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10563 return FALSE;
10564 }
35c08157 10565
1c8f6a4d
KLC		 10566 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10567 nds32_elf_final_sda_base (sec->output_section->owner,
10568 link_info, &local_sda, FALSE);
35c08157 10569
1c8f6a4d
KLC		 10570 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10571 {
10572 case R_NDS32_HI20_RELA:
10573 insn = bfd_getb32 (contents + laddr);
10574 access_addr =
10575 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10576
10577 if (range_type == NDS32_LOADSTORE_IMM)
10578 {
10579 struct elf_link_hash_entry *h = NULL;
10580 int indx;
35c08157 10581
1c8f6a4d 10582 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10583 {
1c8f6a4d
KLC		 10584 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10585 h = elf_sym_hashes (abfd)[indx];
35c08157 10586 }
35c08157 10587
1c8f6a4d
KLC		 10588 if ((access_addr < CONSERVATIVE_20BIT)
10589 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10590 {
1c8f6a4d
KLC		 10591 eliminate_sethi = 1;
10592 break;
35c08157 10593 }
1c8f6a4d
KLC		 10594
10595 /* This is avoid to relax symbol address which is fixed
10596 relocations. Ex: _stack. */
10597 if (h && bfd_is_abs_section (h->root.u.def.section))
10598 return FALSE;
10599 }
10600
10601 if (!load_store_relax)
10602 return FALSE;
10603
10604 /* Case for set gp register. */
10605 if (N32_RT5 (insn) == REG_GP)
10606 break;
10607
10608 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 10609 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC		 10610 {
10611 range_l = sdata_range[0][0];
10612 range_h = sdata_range[0][1];
10613 }
10614 else
10615 {
10616 range_l = sdata_range[1][0];
10617 range_h = sdata_range[1][1];
10618 }
10619 break;
10620
10621 case R_NDS32_GOT_HI20:
10622 access_addr =
10623 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10624
10625 /* If this symbol is not in .got, the return value will be -1.
10626 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10627 a negative offset is allowed. */
10628 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10629 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10630 eliminate_sethi = 1;
10631 break;
10632
10633 case R_NDS32_PLT_GOTREL_HI20:
10634 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10635 hi_irelfn, symtab_hdr);
10636
10637 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10638 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10639 eliminate_sethi = 1;
10640 break;
10641
10642 case R_NDS32_GOTOFF_HI20:
10643 access_addr =
10644 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10645
10646 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10647 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10648 eliminate_sethi = 1;
10649 break;
10650
10651 case R_NDS32_GOTPC_HI20:
10652 /* The access_addr must consider r_addend of hi_irel. */
10653 access_addr = sec->output_section->vma + sec->output_offset
10654 + irel->r_offset + hi_irelfn->r_addend;
10655
10656 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10657 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10658 eliminate_sethi = 1;
10659 break;
10660
10661 case R_NDS32_TLS_LE_HI20:
10662 access_addr =
10663 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10664 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10665 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10666 if ((range_type == NDS32_LOADSTORE_IMM)
10667 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10668 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10669 eliminate_sethi = 1;
10670 break;
10671
10672 default:
10673 return FALSE;
10674 }
10675
10676 /* Delete sethi instruction. */
10677 if (eliminate_sethi == 1
10678 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10679 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10680 {
10681 hi_irelfn->r_info =
10682 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10683 irel->r_info =
10684 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10685 *insn_len = 0;
10686 }
10687 return TRUE;
10688}
10689
10690/* Relax LO12 relocation for nds32_elf_relax_section. */
10691
10692static void
10693nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10694 asection *sec, Elf_Internal_Rela *irel,
10695 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10696 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10697{
10698 uint32_t insn;
10699 bfd_vma local_sda, laddr;
10700 unsigned long reloc;
10701 bfd_vma access_addr;
10702 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10703 Elf_Internal_Rela *irelfn = NULL, *irelend;
10704 struct elf_link_hash_entry *h = NULL;
10705 int indx;
10706
10707 /* For SDA base relative relaxation. */
10708 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10709 &local_sda, FALSE);
10710
10711 irelend = internal_relocs + sec->reloc_count;
10712 laddr = irel->r_offset;
10713 insn = bfd_getb32 (contents + laddr);
10714
10715 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10716 return;
10717
10718 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10719
10720 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10721 {
10722 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10723 h = elf_sym_hashes (abfd)[indx];
10724 }
10725
10726 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10727 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10728 {
10729 reloc = R_NDS32_20_RELA;
10730 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10731 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10732 bfd_putb32 (insn, contents + laddr);
10733 }
10734 /* This is avoid to relax symbol address which is fixed
10735 relocations. Ex: _stack. */
10736 else if (N32_OP6 (insn) == N32_OP6_ORI
10737 && h && bfd_is_abs_section (h->root.u.def.section))
10738 return;
10739 else
10740 {
10741 range_l = sdata_range[1][0];
10742 range_h = sdata_range[1][1];
10743 switch (ELF32_R_TYPE (irel->r_info))
10744 {
10745 case R_NDS32_LO12S0_RELA:
10746 reloc = R_NDS32_SDA19S0_RELA;
10747 break;
10748 case R_NDS32_LO12S1_RELA:
10749 reloc = R_NDS32_SDA18S1_RELA;
10750 break;
10751 case R_NDS32_LO12S2_RELA:
10752 reloc = R_NDS32_SDA17S2_RELA;
10753 break;
10754 case R_NDS32_LO12S2_DP_RELA:
10755 range_l = sdata_range[0][0];
10756 range_h = sdata_range[0][1];
10757 reloc = R_NDS32_SDA12S2_DP_RELA;
10758 break;
10759 case R_NDS32_LO12S2_SP_RELA:
10760 range_l = sdata_range[0][0];
10761 range_h = sdata_range[0][1];
10762 reloc = R_NDS32_SDA12S2_SP_RELA;
10763 break;
10764 default:
10765 return;
10766 }
10767
10768 /* There are range_h and range_l because linker has to promise
10769 all sections move cross one page together. */
10770 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10771 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10772 {
10773 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 10774 {
1c8f6a4d
KLC		 10775 /* Maybe we should add R_NDS32_INSN16 reloc type here
10776 or manually do some optimization. sethi can't be
10777 eliminated when updating $gp so the relative ori
10778 needs to be preserved. */
10779 return;
35c08157 10780 }
1c8f6a4d
KLC		 10781 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10782 &insn))
10783 return;
10784 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10785 bfd_putb32 (insn, contents + laddr);
10786
10787 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10788 R_NDS32_INSN16);
10789 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10790 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10791 irelfn->r_info =
10792 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10793
35c08157 10794 }
1c8f6a4d
KLC		 10795 }
10796 return;
10797}
35c08157 10798
1c8f6a4d
KLC		 10799/* Relax low part of PIC instruction pattern. */
10800
10801static void
10802nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10803 asection *sec, Elf_Internal_Rela *irel,
10804 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10805 Elf_Internal_Shdr *symtab_hdr)
10806{
10807 uint32_t insn;
10808 bfd_vma local_sda, laddr;
10809 bfd_signed_vma foff;
10810 unsigned long reloc;
10811
10812 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10813 &local_sda, FALSE);
10814 laddr = irel->r_offset;
10815 insn = bfd_getb32 (contents + laddr);
10816
10817 if (N32_OP6 (insn) != N32_OP6_ORI)
10818 return;
10819
10820 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10821 {
10822 foff = calculate_got_memory_address (abfd, link_info, irel,
10823 symtab_hdr) - local_sda;
10824 reloc = R_NDS32_GOT20;
10825 }
10826 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10827 {
10828 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10829 symtab_hdr) - local_sda;
10830 reloc = R_NDS32_PLT_GOTREL_LO20;
10831 }
10832 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10833 {
10834 foff = calculate_memory_address (abfd, irel, isymbuf,
10835 symtab_hdr) - local_sda;
10836 reloc = R_NDS32_GOTOFF;
10837 }
10838 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10839 {
10840 foff = local_sda - sec->output_section->vma + sec->output_offset
10841 + irel->r_offset + irel->r_addend;
10842 reloc = R_NDS32_GOTPC20;
10843 }
10844 else
10845 return;
10846
10847 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10848 {
10849 /* Turn into MOVI. */
10850 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10851 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10852 bfd_putb32 (insn, contents + laddr);
10853 }
10854}
10855
10856/* Relax low part of LE TLS instruction pattern. */
10857
10858static void
10859nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10860 Elf_Internal_Rela *irel,
10861 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10862 Elf_Internal_Shdr *symtab_hdr)
10863{
10864 uint32_t insn;
10865 bfd_vma laddr;
10866 bfd_signed_vma foff;
10867 unsigned long reloc;
10868
10869 laddr = irel->r_offset;
10870 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10871 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10872 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10873 insn = bfd_getb32 (contents + laddr);
10874
10875 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10876 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10877 {
10878 /* Pattern sethi-ori transform to movi. */
10879 reloc = R_NDS32_TLS_LE_20;
10880 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10881 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10882 bfd_putb32 (insn, contents + laddr);
10883 }
10884}
10885
10886/* Relax LE TLS calculate address instruction pattern. */
10887
10888static void
10889nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10890 asection *sec, Elf_Internal_Rela *irel,
10891 Elf_Internal_Rela *internal_relocs,
10892 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10893 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10894{
10895 /* Local TLS non-pic
07d6d2b8 10896 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
1c8f6a4d 10897 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
07d6d2b8 10898 add ra, ta, tp ; TLS_LE_ADD */
1c8f6a4d
KLC		 10899
10900 uint32_t insn;
10901 bfd_vma laddr;
10902 bfd_signed_vma foff;
10903 Elf_Internal_Rela *i1_irelfn, *irelend;
10904
10905 irelend = internal_relocs + sec->reloc_count;
10906 laddr = irel->r_offset;
10907 insn = bfd_getb32 (contents + laddr);
10908 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10909 R_NDS32_PTR_RESOLVED);
10910 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10911 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10912 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10913
10914 /* The range is +/-16k. */
10915 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10916 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10917 {
10918 /* Transform add to addi. */
10919 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10920 irel->r_info =
10921 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10922
10923 bfd_putb32 (insn, contents + laddr);
10924 if (i1_irelfn != irelend)
10925 {
10926 i1_irelfn->r_addend |= 1;
10927 *again = TRUE;
10928 }
10929 }
10930}
10931
10932/* Relax LE TLS load store instruction pattern. */
10933
10934static void
10935nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10936 asection *sec, Elf_Internal_Rela *irel,
10937 Elf_Internal_Rela *internal_relocs,
10938 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10939 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10940{
10941
10942 uint32_t insn;
10943 bfd_vma laddr;
10944 bfd_signed_vma foff;
10945 Elf_Internal_Rela *i1_irelfn, *irelend;
10946 int success = 0;
10947
10948 irelend = internal_relocs + sec->reloc_count;
10949 laddr = irel->r_offset;
10950 insn = bfd_getb32 (contents + laddr);
10951 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10952 R_NDS32_PTR_RESOLVED);
10953 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10954 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10955 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10956
10957 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
10958 {
10959 case (N32_OP6_MEM << 8) | N32_MEM_LB:
10960 case (N32_OP6_MEM << 8) | N32_MEM_SB:
10961 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10962 /* The range is +/-16k. */
10963 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10964 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10965 {
10966 insn =
10967 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10968 irel->r_info =
10969 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10970 success = 1;
10971 break;
10972 }
1a0670f3 10973 /* Fall through. */
1c8f6a4d
KLC		 10974 case (N32_OP6_MEM << 8) | N32_MEM_LH:
10975 case (N32_OP6_MEM << 8) | N32_MEM_SH:
10976 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10977 /* The range is +/-32k. */
10978 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
10979 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 10980 {
1c8f6a4d
KLC		 10981 insn =
10982 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10983 irel->r_info =
10984 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
10985 success = 1;
10986 break;
10987 }
1a0670f3 10988 /* Fall through. */
1c8f6a4d
KLC		 10989 case (N32_OP6_MEM << 8) | N32_MEM_LW:
10990 case (N32_OP6_MEM << 8) | N32_MEM_SW:
10991 /* The range is +/-64k. */
10992 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
10993 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
10994 {
10995 insn =
10996 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10997 irel->r_info =
10998 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
10999 success = 1;
11000 break;
11001 }
1a0670f3 11002 /* Fall through. */
1c8f6a4d
KLC		 11003 default:
11004 break;
11005 }
35c08157 11006
1c8f6a4d
KLC		 11007 if (success)
11008 {
11009 bfd_putb32 (insn, contents + laddr);
11010 if (i1_irelfn != irelend)
11011 {
11012 i1_irelfn->r_addend |= 1;
11013 *again = TRUE;
11014 }
11015 }
11016}
35c08157 11017
1c8f6a4d 11018/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11019
1c8f6a4d
KLC		 11020static bfd_boolean
11021nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11022 Elf_Internal_Rela *internal_relocs, int *insn_len,
11023 int *seq_len, bfd_byte *contents)
11024{
11025 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11026
1c8f6a4d 11027 irelend = internal_relocs + sec->reloc_count;
35c08157 11028
1c8f6a4d
KLC		 11029 re_irel =
11030 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11031 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11032
1c8f6a4d
KLC		 11033 if (re_irel == irelend)
11034 {
695344c0 11035 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11036 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 11037 return FALSE;
11038 }
35c08157 11039
1c8f6a4d
KLC		 11040 if (re_irel->r_addend != 1)
11041 return FALSE;
35c08157 11042
1c8f6a4d
KLC		 11043 /* Pointed target is relaxed and no longer needs this void *,
11044 change the type to NONE. */
11045 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11046
1c8f6a4d
KLC		 11047 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11048 not exist, it means only count 1 and remove it directly. */
11049 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11050 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11051 R_NDS32_PTR_COUNT);
11052 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11053 R_NDS32_PTR);
11054 if (count_irel != irelend)
11055 {
11056 if (--count_irel->r_addend > 0)
11057 return FALSE;
11058 }
11059
11060 if (ptr_irel != irelend)
11061 return FALSE;
11062
11063 /* If the PTR_COUNT is already 0, remove current instruction. */
11064 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11065 *insn_len = 0;
11066 return TRUE;
11067}
11068
11069/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11070
11071static void
11072nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11073 asection *sec, Elf_Internal_Rela *irel,
11074 Elf_Internal_Rela *internal_relocs,
11075 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11076 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11077{
11078 uint32_t insn;
11079 bfd_signed_vma foff;
11080 Elf_Internal_Rela *i1_irelfn, *irelend;
11081 bfd_vma local_sda, laddr;
11082
11083 irelend = internal_relocs + sec->reloc_count;
11084 laddr = irel->r_offset;
11085 insn = bfd_getb32 (contents + laddr);
11086
11087 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11088 we need additional space. It might be help if we could
11089 borrow some space from instructions to be eliminated
11090 such as sethi, ori, add. */
11091 if (insn & 0x80000000)
11092 return;
11093
11094 if (nds32_elf_check_dup_relocs
11095 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11096 return;
11097
11098 i1_irelfn =
11099 find_relocs_at_address (irel, internal_relocs, irelend,
11100 R_NDS32_PTR_RESOLVED);
11101
11102 /* FIXIT 090606
11103 The boundary should be reduced since the .plt section hasn't
11104 been created and the address of specific entry is still unknown
11105 Maybe the range between the function call and the begin of the
11106 .text section can be used to decide if the .plt is in the range
11107 of function call. */
11108
11109 if (N32_OP6 (insn) == N32_OP6_ALU1
11110 && N32_SUB5 (insn) == N32_ALU1_ADD)
11111 {
11112 /* Get the value of the symbol referred to by the reloc. */
11113 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11114 &local_sda, FALSE);
11115 foff = (bfd_signed_vma) (calculate_plt_memory_address
11116 (abfd, link_info, isymbuf, irel,
11117 symtab_hdr) - local_sda);
11118 /* This condition only happened when symbol is undefined. */
11119 if (foff == 0)
11120 return;
11121
11122 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11123 return;
11124 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11125 R_NDS32_PLT_GOTREL_LO19);
11126 /* addi.gp */
4ec521f2 11127 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11128 }
11129 else if (N32_OP6 (insn) == N32_OP6_JREG
11130 && N32_SUB5 (insn) == N32_JREG_JRAL)
11131 {
11132 /* Get the value of the symbol referred to by the reloc. */
11133 foff =
11134 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11135 /* This condition only happened when symbol is undefined. */
11136 if (foff == 0)
11137 return;
11138 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11139 return;
11140 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11141 insn = INSN_JAL;
11142 }
11143 else
11144 return;
11145
11146 bfd_putb32 (insn, contents + laddr);
11147 if (i1_irelfn != irelend)
11148 {
11149 i1_irelfn->r_addend |= 1;
11150 *again = TRUE;
11151 }
11152}
11153
11154/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11155
11156static void
11157nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11158 asection *sec, Elf_Internal_Rela *irel,
11159 Elf_Internal_Rela *internal_relocs,
11160 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11161 bfd_boolean *again)
11162{
11163 uint32_t insn;
11164 bfd_signed_vma foff;
11165 Elf_Internal_Rela *i1_irelfn, *irelend;
11166 bfd_vma local_sda, laddr;
11167
11168 irelend = internal_relocs + sec->reloc_count;
11169 laddr = irel->r_offset;
11170 insn = bfd_getb32 (contents + laddr);
11171 if (insn & 0x80000000)
11172 return;
11173
11174 if (nds32_elf_check_dup_relocs
11175 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11176 return;
11177
11178 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11179 R_NDS32_PTR_RESOLVED);
11180
11181 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11182 &local_sda, FALSE);
11183 foff = calculate_got_memory_address (abfd, link_info, irel,
11184 symtab_hdr) - local_sda;
11185
11186 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11187 {
11188 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11189 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11190 irel->r_info =
11191 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11192 bfd_putb32 (insn, contents + laddr);
11193 if (i1_irelfn != irelend)
11194 {
11195 i1_irelfn->r_addend |= 1;
11196 *again = TRUE;
11197 }
11198 }
11199}
11200
11201/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11202
11203static void
11204nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11205 asection *sec, Elf_Internal_Rela *irel,
11206 Elf_Internal_Rela *internal_relocs,
11207 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11208 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11209{
11210 int opc_insn_gotoff;
11211 uint32_t insn;
11212 bfd_signed_vma foff;
11213 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11214 bfd_vma local_sda, laddr;
11215
11216 irelend = internal_relocs + sec->reloc_count;
11217 laddr = irel->r_offset;
11218 insn = bfd_getb32 (contents + laddr);
11219
11220 if (insn & 0x80000000)
11221 return;
11222
11223 if (nds32_elf_check_dup_relocs
11224 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11225 return;
11226
11227 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11228 R_NDS32_PTR_RESOLVED);
11229 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11230 &local_sda, FALSE);
11231 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11232 foff = foff - local_sda;
11233
11234 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11235 return;
11236
11237 /* Concatenate opcode and sub-opcode for switch case.
11238 It may be MEM or ALU1. */
11239 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11240 switch (opc_insn_gotoff)
11241 {
11242 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11243 /* 4-byte aligned. */
11244 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11245 irel->r_info =
11246 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11247 break;
11248 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11249 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11250 irel->r_info =
11251 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11252 break;
11253 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11254 /* 2-byte aligned. */
11255 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11256 irel->r_info =
11257 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11258 break;
11259 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
4ec521f2 11260 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
1c8f6a4d
KLC		 11261 irel->r_info =
11262 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11263 break;
11264 case (N32_OP6_MEM << 8) | N32_MEM_SH:
4ec521f2 11265 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11266 irel->r_info =
11267 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11268 break;
11269 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11270 /* 1-byte aligned. */
11271 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11272 irel->r_info =
11273 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11274 break;
11275 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
4ec521f2 11276 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11277 irel->r_info =
11278 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11279 break;
11280 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11281 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11282 irel->r_info =
11283 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11284 break;
11285 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
4ec521f2 11286 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11287 irel->r_info =
11288 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11289 break;
11290 default:
11291 return;
11292 }
11293
11294 bfd_putb32 (insn, contents + laddr);
11295 if (i1_irelfn != irelend)
11296 {
11297 i1_irelfn->r_addend |= 1;
11298 *again = TRUE;
11299 }
11300 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11301 R_NDS32_INSN16)) != irelend)
11302 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11303
11304}
11305
11306static bfd_boolean
11307nds32_relax_adjust_label (bfd *abfd, asection *sec,
11308 Elf_Internal_Rela *internal_relocs,
11309 bfd_byte *contents,
11310 nds32_elf_blank_t **relax_blank_list,
11311 int optimize, int opt_size)
11312{
11313 /* This code block is used to adjust 4-byte alignment by relax a pair
11314 of instruction a time.
11315
11316 It recognizes three types of relocations.
de194d85 11317 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC		 11318 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11319 3. is_16bit_NOP () - remove a 16-bit instruction. */
11320
de194d85
YC		 11321 /* TODO: It seems currently implementation only support 4-byte alignment.
11322 We should handle any-alignment. */
1c8f6a4d
KLC		 11323
11324 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11325 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11326 Elf_Internal_Rela rel_temp;
11327 Elf_Internal_Rela *irelend;
11328 bfd_vma address;
11329 uint16_t insn16;
11330
11331 /* Checking for branch relaxation relies on the relocations to
11332 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11333 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11334 sizeof (Elf_Internal_Rela), compar_reloc);
11335
11336 irelend = internal_relocs + sec->reloc_count;
11337
11338 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11339 /* FIXME: Can we generate the right order in assembler?
11340 So we don't have to swapping them here. */
11341
11342 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11343 label_rel < irelend; label_rel++)
11344 {
11345 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11346 continue;
11347
11348 /* Find the first reloc has the same offset with label_rel. */
11349 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11350 insn_rel++;
11351
11352 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11353 insn_rel++)
11354 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11355 address. */
11356 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11357 break;
11358
11359 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11360 && insn_rel < label_rel)
11361 {
11362 /* Swap the two reloc if the R_NDS32_INSN16 is
11363 before R_NDS32_LABEL. */
11364 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11365 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11366 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11367 }
11368 }
11369
11370 label_rel = NULL;
11371 insn_rel = NULL;
11372 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11373 or higher, remove other R_NDS32_LABEL with lower alignment.
11374 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11375 then the R_NDS32_LABEL sequence is broke. */
11376 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11377 {
11378 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11379 {
11380 if (label_rel == NULL)
11381 {
11382 if (tmp_rel->r_addend < 2)
11383 label_rel = tmp_rel;
11384 continue;
11385 }
11386 else if (tmp_rel->r_addend > 1)
11387 {
11388 /* Remove all LABEL relocation from label_rel to tmp_rel
11389 including relocations with same offset as tmp_rel. */
11390 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11391 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11392 {
11393 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11394 && tmp2_rel->r_addend < 2)
11395 tmp2_rel->r_info =
11396 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11397 R_NDS32_NONE);
11398 }
11399 label_rel = NULL;
11400 }
11401 }
11402 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11403 {
11404 /* A new INSN16 which can be converted, so clear label_rel. */
11405 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11406 irelend, &insn16)
11407 || is_16bit_NOP (abfd, sec, tmp_rel))
11408 label_rel = NULL;
11409 }
11410 }
11411
11412 label_rel = NULL;
11413 insn_rel = NULL;
11414 /* Optimized for speed and nothing has not been relaxed.
11415 It's time to align labels.
11416 We may convert a 16-bit instruction right before a label to
11417 32-bit, in order to align the label if necessary
11418 all reloc entries has been sorted by r_offset. */
11419 for (irel = internal_relocs; irel < irelend; irel++)
11420 {
11421 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11422 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11423 continue;
11424
11425 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11426 {
11427 /* A new INSN16 found, resize the old one. */
11428 if (is_convert_32_to_16
11429 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11430 || is_16bit_NOP (abfd, sec, irel))
11431 {
11432 if (insn_rel)
11433 {
11434 /* Previous INSN16 reloc exists, reduce its
11435 size to 16-bit. */
11436 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11437 irelend, &insn16))
35c08157 11438 {
1c8f6a4d
KLC		 11439 nds32_elf_write_16 (abfd, contents, insn_rel,
11440 internal_relocs, irelend, insn16);
11441
11442 if (!insert_nds32_elf_blank_recalc_total
11443 (relax_blank_list, insn_rel->r_offset + 2, 2))
11444 return FALSE;
11445 }
11446 else if (is_16bit_NOP (abfd, sec, insn_rel))
11447 {
11448 if (!insert_nds32_elf_blank_recalc_total
11449 (relax_blank_list, insn_rel->r_offset, 2))
11450 return FALSE;
11451 }
11452 insn_rel->r_info =
11453 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11454 }
11455 /* Save the new one for later use. */
11456 insn_rel = irel;
11457 }
11458 else
11459 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11460 R_NDS32_NONE);
11461 }
11462 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11463 {
11464 /* Search for label. */
11465 int force_relax = 0;
11466
11467 /* Label on 16-bit instruction or optimization
11468 needless, just reset this reloc. */
11469 insn16 = bfd_getb16 (contents + irel->r_offset);
11470 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11471 {
11472 irel->r_info =
11473 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11474 continue;
11475 }
11476
11477 address =
11478 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11479 irel->r_offset, 1);
11480
11481 if (!insn_rel)
11482 {
11483 /* Check if there is case which can not be aligned. */
11484 if (irel->r_addend == 2 && address & 0x2)
11485 return FALSE;
11486 continue;
11487 }
11488
11489 /* Try to align this label. */
11490
11491 if ((irel->r_addend & 0x1f) < 2)
11492 {
11493 /* Check if there is a INSN16 at the same address.
11494 Label_rel always seats before insn_rel after
11495 our sort. */
11496
11497 /* Search for INSN16 at LABEL location. If INSN16 is at
11498 same location and this LABEL alignment is lower than 2,
11499 the INSN16 can be converted to 2-byte. */
11500 for (tmp_rel = irel;
11501 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11502 tmp_rel++)
11503 {
11504 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11505 && (is_convert_32_to_16
11506 (abfd, sec, tmp_rel, internal_relocs,
11507 irelend, &insn16)
11508 || is_16bit_NOP (abfd, sec, tmp_rel)))
11509 {
11510 force_relax = 1;
11511 break;
11512 }
11513 }
11514 }
11515
11516 if (force_relax || irel->r_addend == 1 || address & 0x2)
11517 {
11518 /* Label not aligned. */
11519 /* Previous reloc exists, reduce its size to 16-bit. */
11520 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11521 internal_relocs, irelend, &insn16))
11522 {
11523 nds32_elf_write_16 (abfd, contents, insn_rel,
11524 internal_relocs, irelend, insn16);
11525
11526 if (!insert_nds32_elf_blank_recalc_total
11527 (relax_blank_list, insn_rel->r_offset + 2, 2))
11528 return FALSE;
11529 }
11530 else if (is_16bit_NOP (abfd, sec, insn_rel))
11531 {
11532 if (!insert_nds32_elf_blank_recalc_total
11533 (relax_blank_list, insn_rel->r_offset, 2))
11534 return FALSE;
11535 }
11536
11537 }
11538 /* INSN16 reloc is used. */
11539 insn_rel = NULL;
11540 }
11541 }
11542
11543 address =
11544 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11545 if (insn_rel && (address & 0x2 || opt_size))
11546 {
11547 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11548 irelend, &insn16))
11549 {
11550 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11551 irelend, insn16);
11552 if (!insert_nds32_elf_blank_recalc_total
11553 (relax_blank_list, insn_rel->r_offset + 2, 2))
11554 return FALSE;
11555 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11556 R_NDS32_NONE);
11557 }
11558 else if (is_16bit_NOP (abfd, sec, insn_rel))
11559 {
11560 if (!insert_nds32_elf_blank_recalc_total
11561 (relax_blank_list, insn_rel->r_offset, 2))
11562 return FALSE;
11563 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11564 R_NDS32_NONE);
11565 }
11566 }
11567 insn_rel = NULL;
11568 return TRUE;
11569}
11570
11571/* Pick relaxation round. */
11572
11573static int
11574nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11575 struct elf_nds32_link_hash_table *table,
11576 struct bfd_link_info *link_info)
11577{
18393a2e
KLC		 11578 static asection *final_sec, *first_sec = NULL;
11579 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC		 11580 static bfd_boolean set = FALSE;
11581 static bfd_boolean first = TRUE;
11582 int round_table[] = {
11583 NDS32_RELAX_NORMAL_ROUND,
11584 NDS32_RELAX_JUMP_IFC_ROUND,
11585 NDS32_RELAX_EX9_BUILD_ROUND,
11586 NDS32_RELAX_EX9_REPLACE_ROUND,
11587 };
11588 static int pass = 0;
11589 static int relax_round;
11590
18393a2e
KLC		 11591 /* The new round. */
11592 if (init && first_sec == sec)
11593 {
11594 set = TRUE;
11595 normal_again = FALSE;
11596 }
11597
1c8f6a4d
KLC		 11598 if (first)
11599 {
11600 /* Run an empty run to get the final section. */
11601 relax_round = NDS32_RELAX_EMPTY_ROUND;
11602
11603 /* It has to enter relax again because we can
11604 not make sure what the final turn is. */
11605 *again = TRUE;
18393a2e 11606
1c8f6a4d 11607 first = FALSE;
18393a2e 11608 first_sec = sec;
1c8f6a4d
KLC		 11609 }
11610
18393a2e 11611 if (!set)
1c8f6a4d 11612 {
18393a2e 11613 /* Not reenter yet. */
1c8f6a4d
KLC		 11614 final_sec = sec;
11615 return relax_round;
11616 }
11617
1c8f6a4d
KLC		 11618 relax_round = round_table[pass];
11619
18393a2e
KLC		 11620 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11621 normal_again = TRUE;
11622
1c8f6a4d
KLC		 11623 if (!init && final_sec == sec)
11624 {
11625 switch (relax_round)
11626 {
11627 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11628 if (!normal_again)
1c8f6a4d
KLC		 11629 {
11630 /* Normal relaxation done. */
11631 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11632 {
11633 pass++;
11634 *again = TRUE;
11635 }
11636 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11637 {
11638 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11639 *again = TRUE;
11640 }
11641 else if (table->ex9_import_file)
11642 {
11643 /* Import ex9 table. */
11644 if (table->update_ex9_table)
11645 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11646 else
11647 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11648 nds32_elf_ex9_import_table (link_info);
11649 *again = TRUE;
11650 }
11651 }
11652 break;
11653 case NDS32_RELAX_JUMP_IFC_ROUND:
11654 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11655 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC		 11656 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11657 {
11658 pass++;
11659 *again = TRUE;
11660 }
11661 break;
11662 case NDS32_RELAX_EX9_BUILD_ROUND:
11663 nds32_elf_ex9_finish (link_info);
11664 pass++;
11665 *again = TRUE;
11666 break;
11667 case NDS32_RELAX_EX9_REPLACE_ROUND:
11668 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11669 {
11670 /* Do jump IFC optimization again. */
11671 if (!nds32_elf_ifc_finish (link_info))
4eca0228 11672 _bfd_error_handler (_("error: Jump IFC Fail."));
1c8f6a4d
KLC		 11673 }
11674 break;
11675 default:
11676 break;
11677 }
11678 }
11679
11680 return relax_round;
11681}
11682
11683static bfd_boolean
11684nds32_elf_relax_section (bfd *abfd, asection *sec,
11685 struct bfd_link_info *link_info, bfd_boolean *again)
11686{
11687 nds32_elf_blank_t *relax_blank_list = NULL;
11688 Elf_Internal_Shdr *symtab_hdr;
11689 Elf_Internal_Rela *internal_relocs;
11690 Elf_Internal_Rela *irel;
11691 Elf_Internal_Rela *irelend;
11692 Elf_Internal_Sym *isymbuf = NULL;
11693 bfd_byte *contents = NULL;
11694 bfd_boolean result = TRUE;
11695 int optimize = 0;
11696 int opt_size = 0;
11697 uint32_t insn;
11698 uint16_t insn16;
11699
11700 /* Target dependnet option. */
11701 struct elf_nds32_link_hash_table *table;
11702 int load_store_relax;
11703 int relax_round;
11704
11705 relax_blank_list = NULL;
11706
11707 *again = FALSE;
11708
11709 /* Nothing to do for
11710 * relocatable link or
11711 * non-relocatable section or
11712 * non-code section or
11713 * empty content or
11714 * no reloc entry. */
0e1862bb 11715 if (bfd_link_relocatable (link_info)
1c8f6a4d 11716 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 11717 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d
KLC		 11718 || (sec->flags & SEC_CODE) == 0
11719 || sec->size == 0)
11720 return TRUE;
11721
11722 /* 09.12.11 Workaround. */
11723 /* We have to adjust align for R_NDS32_LABEL if needed.
11724 The adjust approach only can fix 2-byte align once. */
11725 if (sec->alignment_power > 2)
11726 return TRUE;
11727
11728 /* The optimization type to do. */
11729
11730 table = nds32_elf_hash_table (link_info);
11731 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11732 switch (relax_round)
11733 {
11734 case NDS32_RELAX_JUMP_IFC_ROUND:
11735 /* Here is the entrance of ifc jump relaxation. */
11736 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11737 return FALSE;
11738 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11739 return TRUE;
11740
11741 case NDS32_RELAX_EX9_BUILD_ROUND:
11742 /* Here is the entrance of ex9 relaxation. There are two pass of
11743 ex9 relaxation. The one is to traverse all instructions and build
11744 the hash table. The other one is to compare instructions and replace
11745 it by ex9.it. */
11746 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11747 return FALSE;
11748 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11749 return TRUE;
11750
11751 case NDS32_RELAX_EX9_REPLACE_ROUND:
11752 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11753 return FALSE;
11754 return TRUE;
11755
11756 case NDS32_RELAX_EMPTY_ROUND:
11757 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11758 return TRUE;
11759
11760 case NDS32_RELAX_NORMAL_ROUND:
11761 default:
11762 if (sec->reloc_count == 0)
11763 return TRUE;
11764 break;
11765 }
11766
11767 /* The begining of general relaxation. */
11768
11769 if (is_SDA_BASE_set == 0)
11770 {
11771 bfd_vma gp;
11772 is_SDA_BASE_set = 1;
11773 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11774 &gp, FALSE);
11775 relax_range_measurement (abfd);
11776 }
11777
11778 if (is_ITB_BASE_set == 0)
11779 {
11780 /* Set the _ITB_BASE_. */
11781 if (!nds32_elf_ex9_itb_base (link_info))
11782 {
871b3ab2 11783 _bfd_error_handler (_("%pB: error: Cannot set _ITB_BASE_"), abfd);
1c8f6a4d
KLC		 11784 bfd_set_error (bfd_error_bad_value);
11785 }
11786 }
11787
11788 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11789 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11790 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11791 TRUE /* keep_memory */);
11792 if (internal_relocs == NULL)
11793 goto error_return;
11794
11795 irelend = internal_relocs + sec->reloc_count;
11796 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11797 irelend, R_NDS32_RELAX_ENTRY);
11798
11799 if (irel == irelend)
11800 return TRUE;
11801
11802 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11803 {
11804 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC		 11805 {
11806 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11807 return TRUE;
11808 }
1c8f6a4d
KLC		 11809
11810 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11811 optimize = 1;
11812
11813 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11814 opt_size = 1;
11815 }
11816
11817 load_store_relax = table->load_store_relax;
11818
11819 /* Get symbol table and section content. */
0c4bd9d9 11820 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC		 11821 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11822 goto error_return;
11823
11824 /* Do relax loop only when finalize is not done.
11825 Take care of relaxable relocs except INSN16. */
11826 for (irel = internal_relocs; irel < irelend; irel++)
11827 {
11828 int seq_len; /* Original length of instruction sequence. */
11829 int insn_len = 0; /* Final length of instruction sequence. */
11830 bfd_boolean removed;
11831
11832 insn = 0;
11833 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11834 && (irel->r_addend & 0x1f) >= 2)
11835 optimize = 1;
11836
11837 /* Relocation Types
11838 R_NDS32_LONGCALL1 53
11839 R_NDS32_LONGCALL2 54
11840 R_NDS32_LONGCALL3 55
11841 R_NDS32_LONGJUMP1 56
11842 R_NDS32_LONGJUMP2 57
11843 R_NDS32_LONGJUMP3 58
11844 R_NDS32_LOADSTORE 59 */
11845 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11846 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11847 seq_len = GET_SEQ_LEN (irel->r_addend);
11848
11849 /* Relocation Types
11850 R_NDS32_LONGCALL4 107
11851 R_NDS32_LONGCALL5 108
11852 R_NDS32_LONGCALL6 109
11853 R_NDS32_LONGJUMP4 110
11854 R_NDS32_LONGJUMP5 111
11855 R_NDS32_LONGJUMP6 112
11856 R_NDS32_LONGJUMP7 113 */
11857 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11858 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11859 seq_len = 4;
11860
11861 /* Relocation Types
11862 R_NDS32_LO12S0_RELA 30
11863 R_NDS32_LO12S1_RELA 29
11864 R_NDS32_LO12S2_RELA 28
11865 R_NDS32_LO12S2_SP_RELA 71
11866 R_NDS32_LO12S2_DP_RELA 70
11867 R_NDS32_GOT_LO12 46
11868 R_NDS32_GOTOFF_LO12 50
11869 R_NDS32_PLTREL_LO12 65
11870 R_NDS32_PLT_GOTREL_LO12 67
11871 R_NDS32_17IFC_PCREL_RELA 96
11872 R_NDS32_GOT_SUFF 193
11873 R_NDS32_GOTOFF_SUFF 194
11874 R_NDS32_PLT_GOT_SUFF 195
11875 R_NDS32_MULCALL_SUFF 196
11876 R_NDS32_PTR 197 */
11877 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11878 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11879 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11880 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11881 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11882 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11883 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11884 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11885 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11886 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11887 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11888 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11889 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11890 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11891 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11892 seq_len = 0;
11893 else
11894 continue;
11895
11896 insn_len = seq_len;
11897 removed = FALSE;
11898
11899 switch (ELF32_R_TYPE (irel->r_info))
11900 {
11901 case R_NDS32_LONGCALL1:
11902 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11903 &insn_len, contents, isymbuf,
11904 symtab_hdr);
11905 break;
11906 case R_NDS32_LONGCALL2:
11907 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11908 &insn_len, contents, isymbuf,
11909 symtab_hdr);
11910 break;
11911 case R_NDS32_LONGCALL3:
11912 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11913 &insn_len, contents, isymbuf,
11914 symtab_hdr);
11915 break;
11916 case R_NDS32_LONGJUMP1:
11917 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11918 &insn_len, contents, isymbuf,
11919 symtab_hdr);
11920 break;
11921 case R_NDS32_LONGJUMP2:
11922 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11923 &insn_len, contents, isymbuf,
11924 symtab_hdr);
11925 break;
11926 case R_NDS32_LONGJUMP3:
11927 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11928 &insn_len, contents, isymbuf,
11929 symtab_hdr);
11930 break;
11931 case R_NDS32_LONGCALL4:
11932 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11933 &insn_len, contents, isymbuf,
11934 symtab_hdr);
11935 break;
11936 case R_NDS32_LONGCALL5:
11937 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
11938 &insn_len, contents, isymbuf,
11939 symtab_hdr);
11940 break;
11941 case R_NDS32_LONGCALL6:
11942 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
11943 &insn_len, contents, isymbuf,
11944 symtab_hdr);
11945 break;
11946 case R_NDS32_LONGJUMP4:
11947 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
11948 &insn_len, contents, isymbuf,
11949 symtab_hdr);
11950 break;
11951 case R_NDS32_LONGJUMP5:
11952 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
11953 &insn_len, &seq_len, contents,
11954 isymbuf, symtab_hdr);
11955 break;
11956 case R_NDS32_LONGJUMP6:
11957 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
11958 &insn_len, &seq_len, contents,
11959 isymbuf, symtab_hdr);
11960 break;
11961 case R_NDS32_LONGJUMP7:
11962 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
11963 &insn_len, &seq_len, contents,
11964 isymbuf, symtab_hdr);
11965 break;
11966 case R_NDS32_LOADSTORE:
11967 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
11968 internal_relocs, &insn_len,
11969 contents, isymbuf, symtab_hdr,
11970 load_store_relax);
11971 break;
11972 case R_NDS32_LO12S0_RELA:
11973 case R_NDS32_LO12S1_RELA:
11974 case R_NDS32_LO12S2_DP_RELA:
11975 case R_NDS32_LO12S2_SP_RELA:
11976 case R_NDS32_LO12S2_RELA:
11977 /* Relax for low part. */
11978 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
11979 contents, isymbuf, symtab_hdr);
11980
11981 /* It is impossible to delete blank, so just continue. */
11982 continue;
11983 case R_NDS32_GOT_LO12:
11984 case R_NDS32_GOTOFF_LO12:
11985 case R_NDS32_PLTREL_LO12:
11986 case R_NDS32_PLT_GOTREL_LO12:
11987 case R_NDS32_GOTPC_LO12:
11988 /* Relax for PIC gp-relative low part. */
11989 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
11990 isymbuf, symtab_hdr);
35c08157 11991
1c8f6a4d
KLC		 11992 /* It is impossible to delete blank, so just continue. */
11993 continue;
11994 case R_NDS32_TLS_LE_LO12:
11995 /* Relax for LE TLS low part. */
11996 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
11997 isymbuf, symtab_hdr);
35c08157 11998
1c8f6a4d
KLC		 11999 /* It is impossible to delete blank, so just continue. */
12000 continue;
12001 case R_NDS32_TLS_LE_ADD:
12002 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12003 contents, isymbuf, symtab_hdr, again);
12004 /* It is impossible to delete blank, so just continue. */
12005 continue;
12006 case R_NDS32_TLS_LE_LS:
12007 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12008 contents, isymbuf, symtab_hdr, again);
12009 continue;
12010 case R_NDS32_PTR:
12011 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12012 &insn_len, &seq_len, contents);
12013 break;
12014 case R_NDS32_PLT_GOT_SUFF:
12015 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12016 internal_relocs, contents,
12017 isymbuf, symtab_hdr, again);
12018 /* It is impossible to delete blank, so just continue. */
12019 continue;
12020 case R_NDS32_GOT_SUFF:
12021 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12022 internal_relocs, contents,
12023 symtab_hdr, again);
12024 /* It is impossible to delete blank, so just continue. */
12025 continue;
12026 case R_NDS32_GOTOFF_SUFF:
12027 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12028 internal_relocs, contents,
12029 isymbuf, symtab_hdr, again);
12030 /* It is impossible to delete blank, so just continue. */
12031 continue;
12032 default:
12033 continue;
12034
12035 }
12036 if (removed && seq_len - insn_len > 0)
12037 {
12038 if (!insert_nds32_elf_blank
12039 (&relax_blank_list, irel->r_offset + insn_len,
12040 seq_len - insn_len))
12041 goto error_return;
12042 *again = TRUE;
35c08157 12043 }
1c8f6a4d
KLC		 12044 }
12045
12046 calc_nds32_blank_total (relax_blank_list);
12047
12048 if (table->relax_fp_as_gp)
12049 {
12050 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12051 irelend, isymbuf))
12052 goto error_return;
35c08157 12053
535b785f 12054 if (!*again)
35c08157 12055 {
1c8f6a4d
KLC		 12056 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12057 irelend))
12058 goto error_return;
35c08157
KLC		 12059 }
12060 }
1c8f6a4d
KLC		 12061
12062 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12063
535b785f 12064 if (!*again)
1c8f6a4d
KLC		 12065 {
12066 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12067 &relax_blank_list, optimize, opt_size))
12068 goto error_return;
12069 }
12070
12071 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12072 If object file is assembled with flag '-Os',
12073 the we don't adjust jump-destination on 4-byte boundary. */
12074
12075 if (relax_blank_list)
12076 {
12077 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12078 relax_blank_list = NULL;
12079 }
12080
535b785f 12081 if (!*again)
35c08157
KLC		 12082 {
12083 /* Closing the section, so we don't relax it anymore. */
12084 bfd_vma sec_size_align;
12085 Elf_Internal_Rela *tmp_rel;
12086
12087 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12088 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12089 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12090 if ((sec_size_align - sec->size) & 0x2)
12091 {
12092 insn16 = NDS32_NOP16;
12093 bfd_putb16 (insn16, contents + sec->size);
12094 sec->size += 2;
12095 }
12096
12097 while (sec_size_align != sec->size)
12098 {
12099 insn = NDS32_NOP32;
12100 bfd_putb32 (insn, contents + sec->size);
12101 sec->size += 4;
12102 }
12103
1c8f6a4d
KLC		 12104 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12105 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12106 if (tmp_rel != irelend)
12107 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12108
12109 clean_nds32_elf_blank ();
12110 }
12111
12112finish:
12113 if (internal_relocs != NULL
12114 && elf_section_data (sec)->relocs != internal_relocs)
12115 free (internal_relocs);
12116
12117 if (contents != NULL
12118 && elf_section_data (sec)->this_hdr.contents != contents)
12119 free (contents);
12120
12121 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12122 free (isymbuf);
12123
12124 return result;
12125
12126error_return:
12127 result = FALSE;
12128 goto finish;
12129}
12130
12131static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12132{
12133 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12134 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12135 {NULL, 0, 0, 0, 0}
12136};
12137
12138static bfd_boolean
12139nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12140 struct bfd_link_info *info,
12141 void *finfo ATTRIBUTE_UNUSED,
12142 bfd_boolean (*func) (void *, const char *,
12143 Elf_Internal_Sym *,
12144 asection *,
12145 struct elf_link_hash_entry *)
12146 ATTRIBUTE_UNUSED)
12147{
12148 FILE *sym_ld_script = NULL;
12149 struct elf_nds32_link_hash_table *table;
12150
12151 table = nds32_elf_hash_table (info);
12152 sym_ld_script = table->sym_ld_script;
12153
12154 if (check_start_export_sym)
12155 fprintf (sym_ld_script, "}\n");
12156
12157 return TRUE;
12158}
12159
12160static enum elf_reloc_type_class
12161nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12162 const asection *rel_sec ATTRIBUTE_UNUSED,
12163 const Elf_Internal_Rela *rela)
12164{
12165 switch ((int) ELF32_R_TYPE (rela->r_info))
12166 {
12167 case R_NDS32_RELATIVE:
12168 return reloc_class_relative;
12169 case R_NDS32_JMP_SLOT:
12170 return reloc_class_plt;
12171 case R_NDS32_COPY:
12172 return reloc_class_copy;
12173 default:
12174 return reloc_class_normal;
12175 }
12176}
12177
12178/* Put target dependent option into info hash table. */
12179void
12180bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12181 int relax_fp_as_gp,
12182 int eliminate_gc_relocs,
12183 FILE * sym_ld_script, int load_store_relax,
12184 int target_optimize, int relax_status,
12185 int relax_round, FILE * ex9_export_file,
12186 FILE * ex9_import_file,
12187 int update_ex9_table, int ex9_limit,
12188 bfd_boolean ex9_loop_aware,
12189 bfd_boolean ifc_loop_aware)
12190{
12191 struct elf_nds32_link_hash_table *table;
12192
12193 table = nds32_elf_hash_table (link_info);
12194 if (table == NULL)
12195 return;
12196
12197 table->relax_fp_as_gp = relax_fp_as_gp;
12198 table->eliminate_gc_relocs = eliminate_gc_relocs;
12199 table->sym_ld_script = sym_ld_script;
12200 table ->load_store_relax = load_store_relax;
12201 table->target_optimize = target_optimize;
12202 table->relax_status = relax_status;
12203 table->relax_round = relax_round;
12204 table->ex9_export_file = ex9_export_file;
12205 table->ex9_import_file = ex9_import_file;
12206 table->update_ex9_table = update_ex9_table;
12207 table->ex9_limit = ex9_limit;
12208 table->ex9_loop_aware = ex9_loop_aware;
12209 table->ifc_loop_aware = ifc_loop_aware;
12210}
12211\f
12212/* These functions and data-structures are used for fp-as-gp
12213 optimization. */
12214
12215#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12216/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12217 the read-only section and read-write section. */
12218#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12219
12220/* An nds32_fag represent a gp-relative access.
12221 We find best fp-base by using a sliding window
12222 to find a base address which can cover most gp-access. */
12223struct nds32_fag
12224{
12225 struct nds32_fag *next; /* NULL-teminated linked list. */
12226 bfd_vma addr; /* The address of this fag. */
12227 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12228 It is used for applying FP7U2_FLAG. */
12229 int count; /* How many times this address is referred.
12230 There should be exactly `count' relocations
12231 in relas. */
12232 int relas_capcity; /* The buffer size of relas.
12233 We use an array instead of linked-list,
12234 and realloc is used to adjust buffer size. */
12235};
12236
12237static void
12238nds32_fag_init (struct nds32_fag *head)
12239{
12240 memset (head, 0, sizeof (struct nds32_fag));
12241}
12242
12243static void
12244nds32_fag_verify (struct nds32_fag *head)
12245{
12246 struct nds32_fag *iter;
12247 struct nds32_fag *prev;
12248
12249 prev = NULL;
12250 iter = head->next;
12251 while (iter)
12252 {
12253 if (prev && prev->addr >= iter->addr)
12254 puts ("Bug in fp-as-gp insertion.");
12255 prev = iter;
12256 iter = iter->next;
12257 }
12258}
12259
12260/* Insert a fag in ascending order.
12261 If a fag of the same address already exists,
12262 they are chained by relas array. */
12263
12264static void
12265nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12266 Elf_Internal_Rela * rel)
12267{
12268 struct nds32_fag *iter;
12269 struct nds32_fag *new_fag;
12270 const int INIT_RELAS_CAP = 4;
12271
12272 for (iter = head;
12273 iter->next && iter->next->addr <= addr;
12274 iter = iter->next)
12275 /* Find somewhere to insert. */ ;
12276
12277 /* `iter' will be equal to `head' if the list is empty. */
12278 if (iter != head && iter->addr == addr)
12279 {
12280 /* The address exists in the list.
12281 Insert `rel' into relocation list, relas. */
12282
12283 /* Check whether relas is big enough. */
12284 if (iter->count >= iter->relas_capcity)
12285 {
12286 iter->relas_capcity *= 2;
12287 iter->relas = bfd_realloc
12288 (iter->relas, iter->relas_capcity * sizeof (void *));
12289 }
12290 iter->relas[iter->count++] = rel;
12291 return;
12292 }
12293
12294 /* This is a new address. Create a fag node for it. */
12295 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12296 memset (new_fag, 0, sizeof (*new_fag));
12297 new_fag->addr = addr;
12298 new_fag->count = 1;
12299 new_fag->next = iter->next;
12300 new_fag->relas_capcity = INIT_RELAS_CAP;
12301 new_fag->relas = (Elf_Internal_Rela **)
12302 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12303 new_fag->relas[0] = rel;
12304 iter->next = new_fag;
12305
12306 nds32_fag_verify (head);
12307}
12308
12309static void
12310nds32_fag_free_list (struct nds32_fag *head)
12311{
12312 struct nds32_fag *iter;
12313
12314 iter = head->next;
12315 while (iter)
12316 {
12317 struct nds32_fag *tmp = iter;
12318 iter = iter->next;
12319 free (tmp->relas);
12320 tmp->relas = NULL;
12321 free (tmp);
12322 }
12323}
12324
35c08157
KLC		 12325/* Find the best fp-base address.
12326 The relocation associated with that address is returned,
12327 so we can track the symbol instead of a fixed address.
12328
12329 When relaxation, the address of an datum may change,
12330 because a text section is shrinked, so the data section
1c8f6a4d 12331 moves forward. If the aligments of text and data section
35c08157
KLC		 12332 are different, their distance may change too.
12333 Therefore, tracking a fixed address is not appriate. */
12334
12335static int
12336nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12337{
12338 struct nds32_fag *base; /* First fag in the window. */
12339 struct nds32_fag *last; /* First fag outside the window. */
12340 int accu = 0; /* Usage accumulation. */
12341 struct nds32_fag *best; /* Best fag. */
12342 int baccu = 0; /* Best accumulation. */
12343
12344 /* Use first fag for initial, and find the last fag in the window.
12345
12346 In each iteration, we could simply subtract previous fag
12347 and accumulate following fags which are inside the window,
12348 untill we each the end. */
12349
1c8f6a4d
KLC		 12350 if (head->next == NULL)
12351 {
12352 *bestpp = NULL;
12353 return 0;
12354 }
35c08157
KLC		 12355
12356 /* Initialize base. */
12357 base = head->next;
12358 best = base;
12359 for (last = base;
12360 last && last->addr < base->addr + FAG_WINDOW;
12361 last = last->next)
12362 accu += last->count;
12363
12364 baccu = accu;
12365
12366 /* Record the best base in each iteration. */
12367 while (base->next)
1c8f6a4d
KLC		 12368 {
12369 accu -= base->count;
12370 base = base->next;
12371 /* Account fags in window. */
12372 for (/* Nothing. */;
12373 last && last->addr < base->addr + FAG_WINDOW;
12374 last = last->next)
12375 accu += last->count;
12376
12377 /* A better fp-base? */
12378 if (accu > baccu)
12379 {
12380 best = base;
12381 baccu = accu;
12382 }
12383 }
35c08157
KLC		 12384
12385 if (bestpp)
12386 *bestpp = best;
12387 return baccu;
12388}
12389
12390/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12391 so we can convert it fo fp-relative access later.
12392 `best_fag' is the best fp-base. Only those inside the window
12393 of best_fag is applied the flag. */
12394
12395static bfd_boolean
12396nds32_fag_mark_relax (struct bfd_link_info *link_info,
12397 bfd *abfd, struct nds32_fag *best_fag,
12398 Elf_Internal_Rela *internal_relocs,
12399 Elf_Internal_Rela *irelend)
12400{
12401 struct nds32_fag *ifag;
12402 bfd_vma best_fpbase, gp;
12403 bfd *output_bfd;
12404
12405 output_bfd = abfd->sections->output_section->owner;
12406 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12407 best_fpbase = best_fag->addr;
12408
1c8f6a4d
KLC		 12409 if (best_fpbase > gp + sdata_range[1][1]
12410 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12411 return FALSE;
12412
12413 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12414 so we know they can be converted to lwi37.fp. */
12415 for (ifag = best_fag;
12416 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12417 {
12418 int i;
12419
12420 for (i = 0; i < ifag->count; i++)
12421 {
12422 Elf_Internal_Rela *insn16_rel;
12423 Elf_Internal_Rela *fag_rel;
12424
12425 fag_rel = ifag->relas[i];
12426
12427 /* Only if this is within the WINDOWS, FP7U2_FLAG
12428 is applied. */
12429
12430 insn16_rel = find_relocs_at_address
12431 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12432
12433 if (insn16_rel != irelend)
12434 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12435 }
12436 }
12437 return TRUE;
12438}
12439
1c8f6a4d
KLC		 12440/* Reset INSN16 to clean fp as gp. */
12441
12442static void
12443nds32_fag_unmark_relax (struct nds32_fag *fag,
12444 Elf_Internal_Rela *internal_relocs,
12445 Elf_Internal_Rela *irelend)
12446{
12447 struct nds32_fag *ifag;
12448 int i;
12449 Elf_Internal_Rela *insn16_rel;
12450 Elf_Internal_Rela *fag_rel;
12451
12452 for (ifag = fag; ifag; ifag = ifag->next)
12453 {
12454 for (i = 0; i < ifag->count; i++)
12455 {
12456 fag_rel = ifag->relas[i];
12457
12458 /* Restore the INSN16 relocation. */
12459 insn16_rel = find_relocs_at_address
12460 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12461
12462 if (insn16_rel != irelend)
12463 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12464 }
12465 }
12466}
12467
35c08157
KLC		 12468/* This is the main function of fp-as-gp optimization.
12469 It should be called by relax_section. */
12470
12471static bfd_boolean
12472nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12473 bfd *abfd, asection *sec,
12474 Elf_Internal_Rela *internal_relocs,
12475 Elf_Internal_Rela *irelend,
12476 Elf_Internal_Sym *isymbuf)
12477{
12478 Elf_Internal_Rela *begin_rel = NULL;
12479 Elf_Internal_Rela *irel;
12480 struct nds32_fag fag_head;
12481 Elf_Internal_Shdr *symtab_hdr;
12482 bfd_byte *contents;
1c8f6a4d 12483 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12484
12485 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12486
12487 /* Per-function fp-base selection.
12488 1. Create a list for all the gp-relative access.
12489 2. Base on those gp-relative address,
12490 find a fp-base which can cover most access.
12491 3. Use the fp-base for fp-as-gp relaxation.
12492
12493 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12494 we should
12495 1. delete the `la $fp, _FP_BASE_' instruction and
12496 2. not convert lwi.gp to lwi37.fp.
12497
12498 To delete the _FP_BASE_ instruction, we simply apply
12499 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12500
12501 To suppress the conversion, we simply NOT to apply
12502 R_NDS32_INSN16_FP7U2_FLAG flag. */
12503
12504 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12505
0c4bd9d9 12506 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 12507 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12508 return FALSE;
12509
12510 /* Check whether it is worth for fp-as-gp optimization,
12511 i.e., at least 3 gp-load.
12512
12513 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12514 apply this optimization. */
12515
12516 for (irel = internal_relocs; irel < irelend; irel++)
12517 {
12518 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12519 One we enter the begin of the region, we track all the LW/ST
12520 instructions, so when we leave the region, we try to find
12521 the best fp-base address for those LW/ST instructions. */
12522
12523 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12524 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12525 {
12526 /* Begin of the region. */
12527 if (begin_rel)
695344c0 12528 /* xgettext:c-format */
871b3ab2 12529 _bfd_error_handler (_("%pB: Nested OMIT_FP in %pA."), abfd, sec);
35c08157
KLC		 12530
12531 begin_rel = irel;
12532 nds32_fag_init (&fag_head);
1c8f6a4d 12533 ifc_inside = FALSE;
35c08157
KLC		 12534 }
12535 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12536 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12537 {
12538 int accu;
1c8f6a4d 12539 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12540 int dist;
12541
12542 /* End of the region.
12543 Check whether it is worth to do fp-as-gp. */
12544
12545 if (begin_rel == NULL)
12546 {
695344c0 12547 /* xgettext:c-format */
871b3ab2 12548 _bfd_error_handler (_("%pB: Unmatched OMIT_FP in %pA."), abfd, sec);
35c08157
KLC		 12549 continue;
12550 }
12551
12552 accu = nds32_fag_find_base (&fag_head, &best_fag);
12553
1c8f6a4d
KLC		 12554 /* Clean FP7U2_FLAG because they may set ever. */
12555 tmp_fag = fag_head.next;
12556 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12557
35c08157
KLC		 12558 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12559 if (accu < FAG_THRESHOLD
12560 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12561 internal_relocs, irelend))
12562 {
12563 /* Not worth to do fp-as-gp. */
12564 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12565 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12566 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12567 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12568 nds32_fag_free_list (&fag_head);
12569 begin_rel = NULL;
12570 continue;
12571 }
12572
12573 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12574 so we use it to record the distance to the reloction of best
12575 fp-base. */
12576 dist = best_fag->relas[0] - begin_rel;
12577 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12578 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12579 relocation. And get the base value when relocating. */
1c8f6a4d 12580 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12581 begin_rel->r_addend |= dist << 16;
12582
12583 nds32_fag_free_list (&fag_head);
12584 begin_rel = NULL;
12585 }
12586
1c8f6a4d 12587 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12588 /* Skip if we are not in the region of fp-as-gp. */
12589 continue;
12590
12591 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12592 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12593 {
12594 bfd_vma addr;
12595 uint32_t insn;
12596
12597 /* A gp-relative access is found. Insert it to the fag-list. */
12598
12599 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12600 insn = bfd_getb32 (contents + irel->r_offset);
12601 if (!N32_IS_RT3 (insn))
12602 continue;
12603
12604 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12605 nds32_fag_insert (&fag_head, addr, irel);
12606 }
12607 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12608 {
12609 begin_rel = NULL;
12610 }
1c8f6a4d
KLC		 12611 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12612 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12613 {
12614 /* Suppress fp as gp when encounter ifc. */
12615 ifc_inside = TRUE;
12616 }
35c08157
KLC		 12617 }
12618
12619 return TRUE;
12620}
12621
12622/* Remove unused `la $fp, _FD_BASE_' instruction. */
12623
12624static bfd_boolean
12625nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12626 Elf_Internal_Rela *internal_relocs,
12627 Elf_Internal_Rela *irelend)
12628{
12629 Elf_Internal_Rela *irel;
12630 Elf_Internal_Shdr *symtab_hdr;
12631 bfd_byte *contents = NULL;
12632 nds32_elf_blank_t *relax_blank_list = NULL;
12633 bfd_boolean result = TRUE;
12634 bfd_boolean unused_region = FALSE;
12635
12636 /*
12637 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12638 * R_NDS32_17IFC_PCREL_RELA
12639 * R_NDS32_10IFCU_PCREL_RELA
12640
12641 CASE??????????????
12642 */
12643
12644 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12645 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC		 12646
12647 for (irel = internal_relocs; irel < irelend; irel++)
12648 {
12649 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12650 we marked to in previous pass.
12651 DO NOT scan relocations again, since we've alreadly decided it
12652 and set the flag. */
12653 const char *syname;
12654 int syndx;
12655 uint32_t insn;
12656
12657 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12658 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12659 unused_region = TRUE;
12660 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12661 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12662 unused_region = FALSE;
12663
12664 /* We're not in the region. */
12665 if (!unused_region)
12666 continue;
12667
12668 /* _FP_BASE_ must be a GLOBAL symbol. */
12669 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12670 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12671 continue;
12672
12673 /* The symbol name must be _FP_BASE_. */
12674 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12675 if (strcmp (syname, FP_BASE_NAME) != 0)
12676 continue;
12677
12678 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12679 {
12680 /* addi.gp $fp, -256 */
12681 insn = bfd_getb32 (contents + irel->r_offset);
12682 if (insn != INSN_ADDIGP_TO_FP)
12683 continue;
12684 }
12685 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12686 {
12687 /* addi $fp, $gp, -256 */
12688 insn = bfd_getb32 (contents + irel->r_offset);
12689 if (insn != INSN_ADDI_GP_TO_FP)
12690 continue;
12691 }
12692 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12693 {
12694 /* movi $fp, FP_BASE */
12695 insn = bfd_getb32 (contents + irel->r_offset);
12696 if (insn != INSN_MOVI_TO_FP)
12697 continue;
12698 }
12699 else
12700 continue;
12701
12702 /* We got here because a FP_BASE instruction is found. */
12703 if (!insert_nds32_elf_blank_recalc_total
12704 (&relax_blank_list, irel->r_offset, 4))
12705 goto error_return;
12706 }
12707
12708finish:
12709 if (relax_blank_list)
12710 {
12711 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12712 relax_blank_list = NULL;
12713 }
12714 return result;
12715
12716error_return:
12717 result = FALSE;
12718 goto finish;
12719}
1c8f6a4d
KLC		 12720
12721/* This is a version of bfd_generic_get_relocated_section_contents.
12722 We need this variety because relaxation will modify the dwarf
12723 infomation. When there is undefined symbol reference error mesage,
12724 linker need to dump line number where the symbol be used. However
12725 the address is be relaxed, it can not get the original dwarf contents.
12726 The variety only modify function call for reading in the section. */
12727
12728static bfd_byte *
12729nds32_elf_get_relocated_section_contents (bfd *abfd,
12730 struct bfd_link_info *link_info,
12731 struct bfd_link_order *link_order,
12732 bfd_byte *data,
12733 bfd_boolean relocatable,
12734 asymbol **symbols)
12735{
12736 bfd *input_bfd = link_order->u.indirect.section->owner;
12737 asection *input_section = link_order->u.indirect.section;
12738 long reloc_size;
12739 arelent **reloc_vector;
12740 long reloc_count;
12741
12742 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12743 if (reloc_size < 0)
12744 return NULL;
12745
12746 /* Read in the section. */
0c4bd9d9 12747 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC		 12748 return NULL;
12749
12750 if (reloc_size == 0)
12751 return data;
12752
12753 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12754 if (reloc_vector == NULL)
12755 return NULL;
12756
12757 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12758 reloc_vector, symbols);
12759 if (reloc_count < 0)
12760 goto error_return;
12761
12762 if (reloc_count > 0)
12763 {
12764 arelent **parent;
12765 for (parent = reloc_vector; *parent != NULL; parent++)
12766 {
12767 char *error_message = NULL;
12768 asymbol *symbol;
12769 bfd_reloc_status_type r;
12770
12771 symbol = *(*parent)->sym_ptr_ptr;
12772 if (symbol->section && discarded_section (symbol->section))
12773 {
12774 bfd_byte *p;
12775 static reloc_howto_type none_howto
12776 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12777 "unused", FALSE, 0, 0, FALSE);
12778
12779 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12780 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12781 p);
12782 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12783 (*parent)->addend = 0;
12784 (*parent)->howto = &none_howto;
12785 r = bfd_reloc_ok;
12786 }
12787 else
12788 r = bfd_perform_relocation (input_bfd, *parent, data,
12789 input_section,
12790 relocatable ? abfd : NULL,
12791 &error_message);
12792
12793 if (relocatable)
12794 {
12795 asection *os = input_section->output_section;
12796
12797 /* A partial link, so keep the relocs. */
12798 os->orelocation[os->reloc_count] = *parent;
12799 os->reloc_count++;
12800 }
12801
12802 if (r != bfd_reloc_ok)
12803 {
12804 switch (r)
12805 {
12806 case bfd_reloc_undefined:
1a72702b
AM		 12807 (*link_info->callbacks->undefined_symbol)
12808 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12809 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC		 12810 break;
12811 case bfd_reloc_dangerous:
12812 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 12813 (*link_info->callbacks->reloc_dangerous)
12814 (link_info, error_message,
12815 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12816 break;
12817 case bfd_reloc_overflow:
1a72702b
AM		 12818 (*link_info->callbacks->reloc_overflow)
12819 (link_info, NULL,
12820 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12821 (*parent)->howto->name, (*parent)->addend,
12822 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12823 break;
12824 case bfd_reloc_outofrange:
12825 /* PR ld/13730:
12826 This error can result when processing some partially
12827 complete binaries. Do not abort, but issue an error
12828 message instead. */
12829 link_info->callbacks->einfo
695344c0 12830 /* xgettext:c-format */
c1c8c1ef 12831 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC		 12832 abfd, input_section, * parent);
12833 goto error_return;
12834
12835 default:
12836 abort ();
12837 break;
12838 }
12839 }
12840 }
12841 }
12842
12843 free (reloc_vector);
12844 return data;
12845
12846error_return:
12847 free (reloc_vector);
12848 return NULL;
12849}
35c08157
KLC		 12850\f
12851/* Link-time IFC relaxation.
12852 In this optimization, we chains jump instructions
12853 of the same destination with ifcall. */
12854
12855
12856/* List to save jal and j relocation. */
12857struct elf_nds32_ifc_symbol_entry
12858{
12859 asection *sec;
12860 struct elf_link_hash_entry *h;
12861 struct elf_nds32_ifc_irel_list *irel_head;
12862 unsigned long insn;
12863 int times;
12864 int enable; /* Apply ifc. */
12865 int ex9_enable; /* Apply ifc after ex9. */
12866 struct elf_nds32_ifc_symbol_entry *next;
12867};
12868
12869struct elf_nds32_ifc_irel_list
12870{
12871 Elf_Internal_Rela *irel;
12872 asection *sec;
12873 bfd_vma addr;
12874 /* If this is set, then it is the last instruction for
12875 ifc-chain, so it must be keep for the actual branching. */
12876 int keep;
12877 struct elf_nds32_ifc_irel_list *next;
12878};
12879
12880static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
12881
12882/* Insert symbol of jal and j for ifc. */
12883
12884static void
12885nds32_elf_ifc_insert_symbol (asection *sec,
12886 struct elf_link_hash_entry *h,
12887 Elf_Internal_Rela *irel,
12888 unsigned long insn)
12889{
12890 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
12891
12892 /* Check there is target of existing entry the same as the new one. */
12893 while (ptr != NULL)
12894 {
12895 if (((h == NULL && ptr->sec == sec
12896 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
12897 && ptr->irel_head->irel->r_addend == irel->r_addend)
12898 || h != NULL)
12899 && ptr->h == h
12900 && ptr->insn == insn)
12901 {
12902 /* The same target exist, so insert into list. */
12903 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
12904
12905 while (irel_list->next != NULL)
12906 irel_list = irel_list->next;
12907 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12908 irel_list = irel_list->next;
12909 irel_list->irel = irel;
12910 irel_list->keep = 1;
12911
12912 if (h == NULL)
12913 irel_list->sec = NULL;
12914 else
12915 irel_list->sec = sec;
12916 irel_list->next = NULL;
12917 return;
12918 }
12919 if (ptr->next == NULL)
12920 break;
12921 ptr = ptr->next;
12922 }
12923
12924 /* There is no same target entry, so build a new one. */
12925 if (ifc_symbol_head == NULL)
12926 {
12927 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12928 ptr = ifc_symbol_head;
12929 }
12930 else
12931 {
12932 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12933 ptr = ptr->next;
12934 }
12935
12936 ptr->h = h;
12937 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12938 ptr->irel_head->irel = irel;
12939 ptr->insn = insn;
12940 ptr->irel_head->keep = 1;
12941
12942 if (h == NULL)
12943 {
12944 /* Local symbols. */
12945 ptr->sec = sec;
12946 ptr->irel_head->sec = NULL;
12947 }
12948 else
12949 {
12950 /* Global symbol. */
12951 ptr->sec = NULL;
12952 ptr->irel_head->sec = sec;
12953 }
12954
12955 ptr->irel_head->next = NULL;
12956 ptr->times = 0;
12957 ptr->enable = 0;
12958 ptr->ex9_enable = 0;
12959 ptr->next = NULL;
12960}
12961
12962/* Gather all jal and j instructions. */
12963
12964static bfd_boolean
12965nds32_elf_ifc_calc (struct bfd_link_info *info,
12966 bfd *abfd, asection *sec)
12967{
12968 Elf_Internal_Rela *internal_relocs;
12969 Elf_Internal_Rela *irelend;
12970 Elf_Internal_Rela *irel;
12971 Elf_Internal_Shdr *symtab_hdr;
12972 bfd_byte *contents = NULL;
1c8f6a4d 12973 uint32_t insn, insn_with_reg;
35c08157
KLC		 12974 unsigned long r_symndx;
12975 struct elf_link_hash_entry *h;
12976 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
12977 struct elf_nds32_link_hash_table *table;
12978 bfd_boolean ifc_loop_aware;
12979
12980 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12981 TRUE /* keep_memory */);
12982 irelend = internal_relocs + sec->reloc_count;
12983 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12984
12985 /* Check if the object enable ifc. */
12986 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
12987 R_NDS32_RELAX_ENTRY);
12988
12989 if (irel == NULL
12990 || irel >= irelend
12991 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
12992 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
12993 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
12994 return TRUE;
12995
0c4bd9d9 12996 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 12997 return FALSE;
12998
12999 table = nds32_elf_hash_table (info);
13000 ifc_loop_aware = table->ifc_loop_aware;
13001 while (irel != NULL && irel < irelend)
13002 {
13003 /* Traverse all relocation and gather all of them to build the list. */
13004
13005 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13006 {
13007 if (ifc_loop_aware == 1
13008 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13009 {
13010 /* Check the region if loop or not. If it is true and
13011 ifc-loop-aware is true, ignore the region till region end. */
13012 while (irel != NULL
13013 && irel < irelend
13014 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13015 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13016 irel++;
13017 }
13018 }
13019
13020 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13021 {
13022 insn = bfd_getb32 (contents + irel->r_offset);
13023 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13024 r_symndx = ELF32_R_SYM (irel->r_info);
13025 if (r_symndx < symtab_hdr->sh_info)
13026 {
13027 /* Local symbol. */
13028 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13029 }
13030 else
13031 {
13032 /* External symbol. */
13033 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13034 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13035 }
13036 }
13037 irel++;
13038 }
13039 return TRUE;
13040}
13041
13042/* Determine whether j and jal should be substituted. */
13043
13044static void
13045nds32_elf_ifc_filter (struct bfd_link_info *info)
13046{
13047 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13048 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13049 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13050 struct elf_nds32_link_hash_table *table;
13051 int target_optimize;
13052 bfd_vma address;
13053
13054 table = nds32_elf_hash_table (info);
13055 target_optimize = table->target_optimize;
13056 while (ptr)
13057 {
13058 irel_ptr = ptr->irel_head;
13059 if (ptr->h == NULL)
13060 {
13061 /* Local symbol. */
13062 irel_keeper = irel_ptr;
13063 while (irel_ptr && irel_ptr->next)
13064 {
13065 /* Check there is jump target can be used. */
13066 if ((irel_ptr->next->irel->r_offset
13067 - irel_keeper->irel->r_offset) > 1022)
13068 irel_keeper = irel_ptr->next;
13069 else
13070 {
13071 ptr->enable = 1;
13072 irel_ptr->keep = 0;
13073 }
13074 irel_ptr = irel_ptr->next;
13075 }
13076 }
13077 else
13078 {
1c8f6a4d
KLC		 13079 /* Global symbol. */
13080 /* We have to get the absolute address and decide
13081 whether to keep it or not. */
35c08157
KLC		 13082 while (irel_ptr)
13083 {
13084 address = (irel_ptr->irel->r_offset
13085 + irel_ptr->sec->output_section->vma
13086 + irel_ptr->sec->output_offset);
13087 irel_ptr->addr = address;
13088 irel_ptr = irel_ptr->next;
13089 }
13090
13091 irel_ptr = ptr->irel_head;
13092 while (irel_ptr)
13093 {
1c8f6a4d 13094 /* Sort by address. */
35c08157
KLC		 13095 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13096 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13097 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13098 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13099
1c8f6a4d 13100 /* Get the smallest one. */
35c08157
KLC		 13101 while (irel_temp->next)
13102 {
13103 if (irel_temp->next->addr < irel_dest->addr)
13104 {
13105 irel_dest_prev = irel_temp;
13106 irel_dest = irel_temp->next;
13107 }
13108 irel_temp = irel_temp->next;
13109 }
1c8f6a4d 13110
35c08157
KLC		 13111 if (irel_dest != irel_ptr)
13112 {
13113 if (irel_ptr_prev)
13114 irel_ptr_prev->next = irel_dest;
13115 if (irel_dest_prev)
13116 irel_dest_prev->next = irel_ptr;
13117 irel_temp = irel_ptr->next;
13118 irel_ptr->next = irel_dest->next;
13119 irel_dest->next = irel_temp;
13120 }
13121 irel_ptr_prev = irel_ptr;
13122 irel_ptr = irel_ptr->next;
13123 }
13124
13125 irel_ptr = ptr->irel_head;
13126 irel_keeper = irel_ptr;
13127 while (irel_ptr && irel_ptr->next)
13128 {
13129 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13130 irel_keeper = irel_ptr->next;
13131 else
13132 {
13133 ptr->enable = 1;
13134 irel_ptr->keep = 0;
13135 }
13136 irel_ptr = irel_ptr->next;
13137 }
13138 }
13139
1c8f6a4d 13140 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC		 13141 if ((target_optimize & NDS32_RELAX_EX9_ON)
13142 && ptr->irel_head != irel_keeper)
13143 ptr->enable = 0;
13144 ptr = ptr->next;
13145 }
13146}
13147
13148/* Determine whether j and jal should be substituted after ex9 done. */
13149
13150static void
13151nds32_elf_ifc_filter_after_ex9 (void)
13152{
13153 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13154 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13155
13156 while (ptr)
13157 {
13158 if (ptr->enable == 0)
13159 {
13160 /* Check whether ifc is applied or not. */
13161 irel_ptr = ptr->irel_head;
13162 ptr->ex9_enable = 1;
13163 while (irel_ptr)
13164 {
13165 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13166 {
13167 /* Ex9 already. */
13168 ptr->ex9_enable = 0;
13169 break;
13170 }
13171 irel_ptr = irel_ptr->next;
13172 }
13173 }
13174 ptr = ptr->next;
13175 }
13176}
13177
13178/* Wrapper to do ifc relaxation. */
13179
13180bfd_boolean
13181nds32_elf_ifc_finish (struct bfd_link_info *info)
13182{
13183 int relax_status;
13184 struct elf_nds32_link_hash_table *table;
13185
13186 table = nds32_elf_hash_table (info);
13187 relax_status = table->relax_status;
13188
13189 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13190 nds32_elf_ifc_filter (info);
13191 else
13192 nds32_elf_ifc_filter_after_ex9 ();
13193
13194 if (!nds32_elf_ifc_replace (info))
13195 return FALSE;
13196
13197 if (table)
13198 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13199 return TRUE;
13200}
13201
13202/* Traverse the result of ifc filter and replace it with ifcall9. */
13203
13204static bfd_boolean
13205nds32_elf_ifc_replace (struct bfd_link_info *info)
13206{
13207 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13208 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13209 nds32_elf_blank_t *relax_blank_list = NULL;
13210 bfd_byte *contents = NULL;
13211 Elf_Internal_Rela *internal_relocs;
13212 Elf_Internal_Rela *irel;
13213 Elf_Internal_Rela *irelend;
13214 unsigned short insn16 = INSN_IFCALL9;
13215 struct elf_nds32_link_hash_table *table;
13216 int relax_status;
13217
13218 table = nds32_elf_hash_table (info);
13219 relax_status = table->relax_status;
13220
13221 while (ptr)
13222 {
13223 /* Traverse the ifc gather list, and replace the
13224 filter entries by ifcall9. */
13225 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC		 13226 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13227 && ptr->ex9_enable == 1))
35c08157
KLC		 13228 {
13229 irel_ptr = ptr->irel_head;
13230 if (ptr->h == NULL)
13231 {
13232 /* Local symbol. */
13233 internal_relocs = _bfd_elf_link_read_relocs
13234 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13235 irelend = internal_relocs + ptr->sec->reloc_count;
13236
1c8f6a4d 13237 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13238 &contents, TRUE))
35c08157
KLC		 13239 return FALSE;
13240
13241 while (irel_ptr)
13242 {
13243 if (irel_ptr->keep == 0 && irel_ptr->next)
13244 {
1c8f6a4d 13245 /* The one can be replaced. We have to check whether
35c08157
KLC		 13246 there is any alignment point in the region. */
13247 irel = irel_ptr->irel;
1c8f6a4d
KLC		 13248 while (((irel_ptr->next->keep == 0
13249 && irel < irel_ptr->next->irel)
35c08157
KLC		 13250 || (irel_ptr->next->keep == 1 && irel < irelend))
13251 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13252 && (irel->r_addend & 0x1f) == 2))
13253 irel++;
13254 if (irel >= irelend
13255 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13256 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC		 13257 && ((irel->r_offset - get_nds32_elf_blank_total
13258 (&relax_blank_list, irel->r_offset, 1))
13259 & 0x02) == 0))
35c08157
KLC		 13260 {
13261 /* Replace by ifcall9. */
13262 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13263 if (!insert_nds32_elf_blank_recalc_total
13264 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13265 return FALSE;
13266 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13267 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13268 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13269 }
13270 }
13271 irel_ptr = irel_ptr->next;
13272 }
13273
13274 /* Delete the redundant code. */
13275 if (relax_blank_list)
13276 {
13277 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13278 relax_blank_list);
13279 relax_blank_list = NULL;
13280 }
13281 }
13282 else
13283 {
13284 /* Global symbol. */
13285 while (irel_ptr)
13286 {
13287 if (irel_ptr->keep == 0 && irel_ptr->next)
13288 {
13289 /* The one can be replaced, and we have to check
13290 whether there is any alignment point in the region. */
13291 internal_relocs = _bfd_elf_link_read_relocs
13292 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13293 TRUE /* keep_memory */);
13294 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC		 13295 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13296 irel_ptr->sec, &contents,
13297 TRUE))
35c08157
KLC		 13298 return FALSE;
13299
13300 irel = irel_ptr->irel;
13301 while (((irel_ptr->sec == irel_ptr->next->sec
13302 && irel_ptr->next->keep == 0
13303 && irel < irel_ptr->next->irel)
13304 || ((irel_ptr->sec != irel_ptr->next->sec
13305 || irel_ptr->next->keep == 1)
13306 && irel < irelend))
13307 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13308 && (irel->r_addend & 0x1f) == 2))
13309 irel++;
13310 if (irel >= irelend
13311 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13312 && (irel->r_addend & 0x1f) == 2
13313 && ((irel->r_offset
13314 - get_nds32_elf_blank_total (&relax_blank_list,
13315 irel->r_offset, 1)) & 0x02) == 0))
13316 {
13317 /* Replace by ifcall9. */
13318 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13319 if (!insert_nds32_elf_blank_recalc_total
13320 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13321 return FALSE;
13322
13323 /* Delete the redundant code, and clear the relocation. */
13324 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13325 irel_ptr->sec,
13326 relax_blank_list);
13327 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13328 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13329 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13330 relax_blank_list = NULL;
13331 }
13332 }
13333
13334 irel_ptr = irel_ptr->next;
13335 }
13336 }
13337 }
13338 ptr = ptr->next;
13339 }
13340
13341 return TRUE;
13342}
13343
13344/* Relocate ifcall. */
13345
1c8f6a4d 13346static bfd_boolean
35c08157
KLC		 13347nds32_elf_ifc_reloc (void)
13348{
13349 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13350 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13351 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13352 bfd_vma relocation, address;
13353 unsigned short insn16;
35c08157 13354 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 13355 static bfd_boolean done = FALSE;
13356
13357 if (done)
13358 return TRUE;
13359
13360 done = TRUE;
35c08157
KLC		 13361
13362 while (ptr)
13363 {
1c8f6a4d 13364 /* Check the entry is enable ifcall. */
35c08157
KLC		 13365 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13366 {
1c8f6a4d 13367 /* Get the reserve jump. */
35c08157
KLC		 13368 irel_ptr = ptr->irel_head;
13369 while (irel_ptr)
13370 {
13371 if (irel_ptr->keep == 1)
13372 {
13373 irel_keeper = irel_ptr;
13374 break;
13375 }
13376 irel_ptr = irel_ptr->next;
13377 }
13378
13379 irel_ptr = ptr->irel_head;
13380 if (ptr->h == NULL)
13381 {
13382 /* Local symbol. */
0c4bd9d9
KLC		 13383 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13384 &contents, TRUE))
35c08157
KLC		 13385 return FALSE;
13386
13387 while (irel_ptr)
13388 {
13389 if (irel_ptr->keep == 0
1c8f6a4d 13390 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC		 13391 {
13392 relocation = irel_keeper->irel->r_offset;
13393 relocation = relocation - irel_ptr->irel->r_offset;
13394 while (irel_keeper && relocation > 1022)
13395 {
13396 irel_keeper = irel_keeper->next;
13397 if (irel_keeper && irel_keeper->keep == 1)
13398 {
13399 relocation = irel_keeper->irel->r_offset;
13400 relocation = relocation - irel_ptr->irel->r_offset;
13401 }
13402 }
13403 if (relocation > 1022)
13404 {
13405 /* Double check. */
13406 irel_keeper = ptr->irel_head;
13407 while (irel_keeper)
13408 {
13409 if (irel_keeper->keep == 1)
13410 {
13411 relocation = irel_keeper->irel->r_offset;
13412 relocation = relocation - irel_ptr->irel->r_offset;
13413 }
13414 if (relocation <= 1022)
13415 break;
13416 irel_keeper = irel_keeper->next;
13417 }
13418 if (!irel_keeper)
13419 return FALSE;
13420 }
1c8f6a4d
KLC		 13421 irel_ptr->irel->r_info =
13422 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13423 R_NDS32_NONE);
35c08157
KLC		 13424 insn16 = INSN_IFCALL9 | (relocation >> 1);
13425 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13426 }
13427 irel_ptr = irel_ptr->next;
13428 }
13429 }
13430 else
13431 {
13432 /* Global symbol. */
13433 while (irel_ptr)
13434 {
13435 if (irel_ptr->keep == 0
1c8f6a4d 13436 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13437 {
1c8f6a4d 13438 /* Get the distance between ifcall and jump. */
35c08157
KLC		 13439 relocation = (irel_keeper->irel->r_offset
13440 + irel_keeper->sec->output_section->vma
13441 + irel_keeper->sec->output_offset);
13442 address = (irel_ptr->irel->r_offset
13443 + irel_ptr->sec->output_section->vma
13444 + irel_ptr->sec->output_offset);
13445 relocation = relocation - address;
1c8f6a4d
KLC		 13446
13447 /* The distance is over ragne, find callee again. */
35c08157
KLC		 13448 while (irel_keeper && relocation > 1022)
13449 {
13450 irel_keeper = irel_keeper->next;
13451 if (irel_keeper && irel_keeper->keep ==1)
13452 {
13453 relocation = (irel_keeper->irel->r_offset
13454 + irel_keeper->sec->output_section->vma
13455 + irel_keeper->sec->output_offset);
13456 relocation = relocation - address;
13457 }
13458 }
13459
13460 if (relocation > 1022)
13461 {
13462 /* Double check. */
13463 irel_keeper = ptr->irel_head;
13464 while (irel_keeper)
13465 {
13466 if (irel_keeper->keep == 1)
13467 {
13468
13469 relocation = (irel_keeper->irel->r_offset
13470 + irel_keeper->sec->output_section->vma
13471 + irel_keeper->sec->output_offset);
13472 relocation = relocation - address;
13473 }
13474 if (relocation <= 1022)
13475 break;
13476 irel_keeper = irel_keeper->next;
13477 }
13478 if (!irel_keeper)
13479 return FALSE;
13480 }
13481 if (!nds32_get_section_contents
0c4bd9d9 13482 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC		 13483 return FALSE;
13484 insn16 = INSN_IFCALL9 | (relocation >> 1);
13485 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13486 irel_ptr->irel->r_info =
13487 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13488 R_NDS32_NONE);
35c08157
KLC		 13489 }
13490 irel_ptr =irel_ptr->next;
13491 }
13492 }
13493 }
13494 ptr = ptr->next;
13495 }
13496
13497 return TRUE;
13498}
13499
13500/* End of IFC relaxation. */
13501\f
13502/* EX9 Instruction Table Relaxation. */
13503
13504/* Global hash list. */
13505struct elf_link_hash_entry_list
13506{
13507 struct elf_link_hash_entry *h;
13508 struct elf_link_hash_entry_list *next;
13509};
13510
13511/* Save different destination but same insn. */
13512struct elf_link_hash_entry_mul_list
13513{
13514 /* Global symbol times. */
13515 int times;
13516 /* Save relocation for each global symbol but useful?? */
13517 Elf_Internal_Rela *irel;
13518 /* For sethi, two sethi may have the same high-part but different low-parts. */
13519 Elf_Internal_Rela rel_backup;
13520 struct elf_link_hash_entry_list *h_list;
13521 struct elf_link_hash_entry_mul_list *next;
13522};
13523
13524/* Instruction hash table. */
13525struct elf_nds32_code_hash_entry
13526{
13527 struct bfd_hash_entry root;
13528 int times;
13529 /* For insn that can use relocation or constant ex: sethi. */
13530 int const_insn;
13531 asection *sec;
13532 struct elf_link_hash_entry_mul_list *m_list;
13533 /* Using r_addend. */
13534 Elf_Internal_Rela *irel;
13535 /* Using r_info. */
13536 Elf_Internal_Rela rel_backup;
13537};
13538
13539/* Instruction count list. */
13540struct elf_nds32_insn_times_entry
13541{
13542 const char *string;
13543 int times;
13544 int order;
13545 asection *sec;
13546 struct elf_link_hash_entry_mul_list *m_list;
13547 Elf_Internal_Rela *irel;
13548 Elf_Internal_Rela rel_backup;
13549 struct elf_nds32_insn_times_entry *next;
13550};
13551
13552/* J and JAL symbol list. */
13553struct elf_nds32_symbol_entry
13554{
13555 char *string;
13556 unsigned long insn;
13557 struct elf_nds32_symbol_entry *next;
13558};
13559
13560/* Relocation list. */
13561struct elf_nds32_irel_entry
13562{
13563 Elf_Internal_Rela *irel;
13564 struct elf_nds32_irel_entry *next;
13565};
13566
13567/* ex9.it insn need to be fixed. */
13568struct elf_nds32_ex9_refix
13569{
13570 Elf_Internal_Rela *irel;
13571 asection *sec;
13572 struct elf_link_hash_entry *h;
13573 int order;
13574 struct elf_nds32_ex9_refix *next;
13575};
13576
13577static struct bfd_hash_table ex9_code_table;
13578static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13579static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13580
13581/* EX9 hash function. */
13582
13583static struct bfd_hash_entry *
13584nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13585 struct bfd_hash_table *table,
13586 const char *string)
13587{
13588 struct elf_nds32_code_hash_entry *ret;
13589
13590 /* Allocate the structure if it has not already been allocated by a
13591 subclass. */
13592 if (entry == NULL)
13593 {
13594 entry = (struct bfd_hash_entry *)
13595 bfd_hash_allocate (table, sizeof (*ret));
13596 if (entry == NULL)
13597 return entry;
13598 }
13599
13600 /* Call the allocation method of the superclass. */
13601 entry = bfd_hash_newfunc (entry, table, string);
13602 if (entry == NULL)
13603 return entry;
13604
13605 ret = (struct elf_nds32_code_hash_entry*) entry;
13606 ret->times = 0;
13607 ret->const_insn = 0;
13608 ret->m_list = NULL;
13609 ret->sec = NULL;
13610 ret->irel = NULL;
13611 return &ret->root;
13612}
13613
13614/* Insert ex9 entry
13615 this insert must be stable sorted by times. */
13616
13617static void
13618nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13619{
13620 struct elf_nds32_insn_times_entry *temp;
13621 struct elf_nds32_insn_times_entry *temp2;
13622
13623 if (ex9_insn_head == NULL)
13624 {
13625 ex9_insn_head = ptr;
13626 ptr->next = NULL;
13627 }
13628 else
13629 {
13630 temp = ex9_insn_head;
13631 temp2 = ex9_insn_head;
13632 while (temp->next &&
13633 (temp->next->times >= ptr->times
13634 || temp->times == -1))
13635 {
13636 if (temp->times == -1)
13637 temp2 = temp;
13638 temp = temp->next;
13639 }
13640 if (ptr->times > temp->times && temp->times != -1)
13641 {
13642 ptr->next = temp;
13643 if (temp2->times == -1)
13644 temp2->next = ptr;
13645 else
13646 ex9_insn_head = ptr;
13647 }
13648 else if (temp->next == NULL)
13649 {
13650 temp->next = ptr;
13651 ptr->next = NULL;
13652 }
13653 else
13654 {
13655 ptr->next = temp->next;
13656 temp->next = ptr;
13657 }
13658 }
13659}
13660
13661/* Examine each insn times in hash table.
13662 Handle multi-link hash entry.
13663
13664 TODO: This function doesn't assign so much info since it is fake. */
13665
13666static int
13667nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13668{
13669 struct elf_nds32_insn_times_entry *ptr;
13670 int times;
13671
13672 if (h->m_list == NULL)
13673 {
13674 /* Local symbol insn or insn without relocation. */
13675 if (h->times < 3)
13676 return TRUE;
13677
13678 ptr = (struct elf_nds32_insn_times_entry *)
13679 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13680 ptr->times = h->times;
13681 ptr->string = h->root.string;
13682 ptr->m_list = NULL;
13683 ptr->sec = h->sec;
13684 ptr->irel = h->irel;
13685 ptr->rel_backup = h->rel_backup;
13686 nds32_elf_ex9_insert_entry (ptr);
13687 }
13688 else
13689 {
13690 /* Global symbol insn. */
13691 /* Only sethi insn has multiple m_list. */
13692 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13693
13694 times = 0;
13695 while (m_list)
13696 {
13697 times += m_list->times;
13698 m_list = m_list->next;
13699 }
13700 if (times >= 3)
13701 {
13702 m_list = h->m_list;
13703 ptr = (struct elf_nds32_insn_times_entry *)
13704 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13705 ptr->times = times; /* Use the total times. */
13706 ptr->string = h->root.string;
13707 ptr->m_list = m_list;
13708 ptr->sec = h->sec;
13709 ptr->irel = m_list->irel;
13710 ptr->rel_backup = m_list->rel_backup;
13711 nds32_elf_ex9_insert_entry (ptr);
13712 }
13713 if (h->const_insn == 1)
13714 {
13715 /* sethi with constant value. */
13716 if (h->times < 3)
13717 return TRUE;
13718
13719 ptr = (struct elf_nds32_insn_times_entry *)
13720 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13721 ptr->times = h->times;
13722 ptr->string = h->root.string;
13723 ptr->m_list = NULL;
13724 ptr->sec = NULL;
13725 ptr->irel = NULL;
13726 ptr->rel_backup = h->rel_backup;
13727 nds32_elf_ex9_insert_entry (ptr);
13728 }
13729 }
13730 return TRUE;
13731}
13732
13733/* Count each insn times in hash table.
13734 Handle multi-link hash entry. */
13735
13736static int
13737nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13738{
13739 int reservation, times;
13740 unsigned long relocation, min_relocation;
13741 struct elf_nds32_insn_times_entry *ptr;
13742
13743 if (h->m_list == NULL)
13744 {
13745 /* Local symbol insn or insn without relocation. */
13746 if (h->times < 3)
13747 return TRUE;
13748 ptr = (struct elf_nds32_insn_times_entry *)
13749 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13750 ptr->times = h->times;
13751 ptr->string = h->root.string;
13752 ptr->m_list = NULL;
13753 ptr->sec = h->sec;
13754 ptr->irel = h->irel;
13755 ptr->rel_backup = h->rel_backup;
13756 nds32_elf_ex9_insert_entry (ptr);
13757 }
13758 else
13759 {
13760 /* Global symbol insn. */
13761 /* Only sethi insn has multiple m_list. */
13762 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13763
13764 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13765 && m_list->next != NULL)
13766 {
13767 /* Sethi insn has different symbol or addend but has same hi20. */
13768 times = 0;
13769 reservation = 1;
13770 relocation = 0;
13771 min_relocation = 0xffffffff;
13772 while (m_list)
13773 {
13774 /* Get the minimum sethi address
13775 and calculate how many entry the sethi-list have to use. */
13776 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
13777 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
13778 && (m_list->h_list->h->root.u.def.section != NULL
13779 && m_list->h_list->h->root.u.def.section->output_section != NULL))
13780 {
13781 relocation = (m_list->h_list->h->root.u.def.value +
13782 m_list->h_list->h->root.u.def.section->output_section->vma +
13783 m_list->h_list->h->root.u.def.section->output_offset);
13784 relocation += m_list->irel->r_addend;
13785 }
13786 else
13787 relocation = 0;
13788 if (relocation < min_relocation)
13789 min_relocation = relocation;
13790 times += m_list->times;
13791 m_list = m_list->next;
13792 }
13793 if (min_relocation < ex9_relax_size)
13794 reservation = (min_relocation >> 12) + 1;
13795 else
13796 reservation = (min_relocation >> 12)
13797 - ((min_relocation - ex9_relax_size) >> 12) + 1;
13798 if (reservation < (times / 3))
13799 {
13800 /* Efficient enough to use ex9. */
13801 int i;
13802
13803 for (i = reservation ; i > 0; i--)
13804 {
13805 /* Allocate number of reservation ex9 entry. */
13806 ptr = (struct elf_nds32_insn_times_entry *)
13807 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13808 ptr->times = h->m_list->times / reservation;
13809 ptr->string = h->root.string;
13810 ptr->m_list = h->m_list;
13811 ptr->sec = h->sec;
13812 ptr->irel = h->m_list->irel;
13813 ptr->rel_backup = h->m_list->rel_backup;
13814 nds32_elf_ex9_insert_entry (ptr);
13815 }
13816 }
13817 }
13818 else
13819 {
13820 /* Normal global symbol that means no different address symbol
13821 using same ex9 entry. */
13822 if (m_list->times >= 3)
13823 {
13824 ptr = (struct elf_nds32_insn_times_entry *)
13825 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13826 ptr->times = m_list->times;
13827 ptr->string = h->root.string;
13828 ptr->m_list = h->m_list;
13829 ptr->sec = h->sec;
13830 ptr->irel = h->m_list->irel;
13831 ptr->rel_backup = h->m_list->rel_backup;
13832 nds32_elf_ex9_insert_entry (ptr);
13833 }
13834 }
13835
13836 if (h->const_insn == 1)
13837 {
13838 /* sethi with constant value. */
13839 if (h->times < 3)
13840 return TRUE;
13841
13842 ptr = (struct elf_nds32_insn_times_entry *)
13843 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13844 ptr->times = h->times;
13845 ptr->string = h->root.string;
13846 ptr->m_list = NULL;
13847 ptr->sec = NULL;
13848 ptr->irel = NULL;
13849 ptr->rel_backup = h->rel_backup;
13850 nds32_elf_ex9_insert_entry (ptr);
13851 }
13852 }
13853
13854 return TRUE;
13855}
13856
13857/* Hash table traverse function. */
13858
13859static void
13860nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
13861{
13862 unsigned int i;
13863
13864 ex9_code_table.frozen = 1;
13865 for (i = 0; i < ex9_code_table.size; i++)
13866 {
13867 struct bfd_hash_entry *p;
13868
13869 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
13870 if (!func ((struct elf_nds32_code_hash_entry *) p))
13871 goto out;
13872 }
13873out:
13874 ex9_code_table.frozen = 0;
13875}
13876
13877
13878/* Give order number to insn list. */
13879
13880static void
13881nds32_elf_order_insn_times (struct bfd_link_info *info)
13882{
13883 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 13884 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 13885 struct elf_nds32_link_hash_table *table;
35c08157 13886 int ex9_limit;
1c8f6a4d
KLC		 13887 int number = 0;
13888
13889 if (ex9_insn_head == NULL)
13890 return;
35c08157
KLC		 13891
13892/* The max number of entries is 512. */
13893 ex9_insn = ex9_insn_head;
13894 table = nds32_elf_hash_table (info);
13895 ex9_limit = table->ex9_limit;
13896
35c08157
KLC		 13897 ex9_insn = ex9_insn_head;
13898
1c8f6a4d 13899 while (ex9_insn != NULL && number < ex9_limit)
35c08157 13900 {
1c8f6a4d 13901 ex9_insn->order = number;
35c08157 13902 number++;
1c8f6a4d 13903 temp = ex9_insn;
35c08157
KLC		 13904 ex9_insn = ex9_insn->next;
13905 }
13906
1c8f6a4d
KLC		 13907 if (ex9_insn && temp)
13908 temp->next = NULL;
35c08157
KLC		 13909
13910 while (ex9_insn != NULL)
13911 {
13912 /* Free useless entry. */
13913 temp = ex9_insn;
13914 ex9_insn = ex9_insn->next;
13915 free (temp);
13916 }
13917}
13918
13919/* Build .ex9.itable section. */
13920
13921static void
13922nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
13923{
13924 asection *table_sec;
13925 struct elf_nds32_insn_times_entry *ptr;
13926 bfd *it_abfd;
13927 int number = 0;
13928 bfd_byte *contents = NULL;
13929
13930 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 13931 it_abfd = it_abfd->link.next)
35c08157
KLC		 13932 {
13933 /* Find the section .ex9.itable, and put all entries into it. */
13934 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
13935 if (table_sec != NULL)
13936 {
0c4bd9d9 13937 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC		 13938 return;
13939
13940 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13941 number++;
13942
13943 table_sec->size = number * 4;
13944
13945 if (number == 0)
1c8f6a4d 13946 return;
35c08157
KLC		 13947
13948 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
13949 number = 0;
13950 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13951 {
13952 long val;
13953
13954 val = strtol (ptr->string, NULL, 16);
13955 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
13956 number++;
13957 }
13958 break;
13959 }
13960 }
13961}
13962
13963/* Get insn with regs according to relocation type. */
13964
13965static void
13966nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 13967 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC		 13968{
13969 reloc_howto_type *howto = NULL;
13970
13971 if (irel == NULL
13972 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13973 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13974 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13975 {
13976 *insn_with_reg = insn;
13977 return;
13978 }
13979
13980 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13981 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
13982}
13983
13984/* Mask number of address bits according to relocation. */
13985
13986static unsigned long
13987nds32_elf_irel_mask (Elf_Internal_Rela *irel)
13988{
13989 reloc_howto_type *howto = NULL;
13990
13991 if (irel == NULL
13992 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13993 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13994 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13995 return 0;
13996
13997 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13998 return howto->dst_mask;
13999}
14000
14001static void
14002nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14003 struct elf_nds32_irel_entry *irel_ptr)
14004{
14005 if (*irel_list == NULL)
14006 {
14007 *irel_list = irel_ptr;
14008 irel_ptr->next = NULL;
14009 }
14010 else
14011 {
14012 irel_ptr->next = *irel_list;
14013 *irel_list = irel_ptr;
14014 }
14015}
14016
14017static void
14018nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14019 struct elf_link_hash_entry *h, int order)
14020{
14021 struct elf_nds32_ex9_refix *ptr;
14022
14023 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14024 ptr->sec = sec;
14025 ptr->irel = irel;
14026 ptr->h = h;
14027 ptr->order = order;
14028 ptr->next = NULL;
14029
14030 if (ex9_refix_head == NULL)
14031 ex9_refix_head = ptr;
14032 else
14033 {
14034 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14035
14036 while (temp->next != NULL)
14037 temp = temp->next;
14038 temp->next = ptr;
14039 }
14040}
14041
14042enum
14043{
14044 DATA_EXIST = 1,
14045 CLEAN_PRE = 1 << 1,
14046 PUSH_PRE = 1 << 2
14047};
14048
14049/* Check relocation type if supporting for ex9. */
14050
14051static int
14052nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14053 Elf_Internal_Rela **irel,
14054 Elf_Internal_Rela *irelend,
14055 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14056 asection *sec,bfd_vma *off,
35c08157
KLC		 14057 bfd_byte *contents)
14058{
14059 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14060 bfd_boolean nested_ex9, nested_loop;
14061 bfd_boolean ex9_loop_aware;
14062 /* We use the highest 1 byte of result to record
14063 how many bytes location counter has to move. */
14064 int result = 0;
14065 Elf_Internal_Rela *irel_save = NULL;
14066 struct elf_nds32_link_hash_table *table;
14067
14068 table = nds32_elf_hash_table (info);
14069 ex9_loop_aware = table->ex9_loop_aware;
14070
14071 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14072 {
14073 switch (ELF32_R_TYPE ((*irel)->r_info))
14074 {
14075 case R_NDS32_RELAX_REGION_BEGIN:
14076 /* Ignore code block. */
14077 nested_ex9 = FALSE;
14078 nested_loop = FALSE;
14079 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14080 || (ex9_loop_aware
14081 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14082 {
14083 /* Check the region if loop or not. If it is true and
14084 ex9-loop-aware is true, ignore the region till region end. */
14085 /* To save the status for in .no_relax ex9 region and
14086 loop region to conform the block can do ex9 relaxation. */
14087 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14088 nested_loop = (ex9_loop_aware
14089 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14090 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14091 {
14092 (*irel)++;
14093 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14094 {
14095 /* There may be nested region. */
14096 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14097 nested_ex9 = TRUE;
14098 else if (ex9_loop_aware
14099 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14100 nested_loop = TRUE;
14101 }
14102 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14103 {
14104 /* The end of region. */
14105 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14106 nested_ex9 = FALSE;
14107 else if (ex9_loop_aware
14108 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14109 nested_loop = FALSE;
14110 }
1c8f6a4d 14111 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC		 14112 && ((*irel)->r_addend & 0x1f) == 2)
14113 {
14114 /* Alignment exist in the region. */
14115 result |= CLEAN_PRE;
14116 if (((*irel)->r_offset -
14117 get_nds32_elf_blank_total (&relax_blank_list,
14118 (*irel)->r_offset, 0)) & 0x02)
14119 result |= PUSH_PRE;
14120 }
14121 }
14122 if ((*irel) >= irelend)
14123 *off = sec->size;
14124 else
14125 *off = (*irel)->r_offset;
14126
14127 /* The final instruction in the region, regard this one as data to ignore it. */
14128 result |= DATA_EXIST;
14129 return result;
14130 }
14131 break;
14132
14133 case R_NDS32_LABEL:
1c8f6a4d 14134 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC		 14135 {
14136 /* Check this point is align and decide to do ex9 or not. */
14137 result |= CLEAN_PRE;
14138 if (((*irel)->r_offset -
14139 get_nds32_elf_blank_total (&relax_blank_list,
14140 (*irel)->r_offset, 0)) & 0x02)
14141 result |= PUSH_PRE;
14142 }
14143 break;
14144 case R_NDS32_32_RELA:
14145 /* Data. */
14146 result |= (4 << 24);
14147 result |= DATA_EXIST;
14148 break;
14149 case R_NDS32_16_RELA:
14150 /* Data. */
14151 result |= (2 << 24);
14152 result |= DATA_EXIST;
14153 break;
14154 case R_NDS32_DATA:
14155 /* Data. */
14156 /* The least code alignment is 2. If the data is only one byte,
14157 we have to shift one more byte. */
14158 if ((*irel)->r_addend == 1)
14159 result |= ((*irel)->r_addend << 25) ;
14160 else
14161 result |= ((*irel)->r_addend << 24) ;
14162
14163 result |= DATA_EXIST;
14164 break;
14165
14166 case R_NDS32_25_PCREL_RELA:
14167 case R_NDS32_SDA16S3_RELA:
14168 case R_NDS32_SDA15S3_RELA:
14169 case R_NDS32_SDA15S3:
14170 case R_NDS32_SDA17S2_RELA:
14171 case R_NDS32_SDA15S2_RELA:
14172 case R_NDS32_SDA12S2_SP_RELA:
14173 case R_NDS32_SDA12S2_DP_RELA:
14174 case R_NDS32_SDA15S2:
14175 case R_NDS32_SDA18S1_RELA:
14176 case R_NDS32_SDA15S1_RELA:
14177 case R_NDS32_SDA15S1:
14178 case R_NDS32_SDA19S0_RELA:
14179 case R_NDS32_SDA15S0_RELA:
14180 case R_NDS32_SDA15S0:
14181 case R_NDS32_HI20_RELA:
14182 case R_NDS32_LO12S0_ORI_RELA:
14183 case R_NDS32_LO12S0_RELA:
14184 case R_NDS32_LO12S1_RELA:
14185 case R_NDS32_LO12S2_RELA:
14186 /* These relocation is supported ex9 relaxation currently. */
14187 /* We have to save the relocation for using later, since we have
14188 to check there is any alignment in the same address. */
14189 irel_save = *irel;
14190 break;
14191 default:
14192 /* Not support relocations. */
14193 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC		 14194 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14195 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC		 14196 {
14197 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14198 But we have to consider if there is any side-effect. */
14199 if (!(result & DATA_EXIST))
14200 {
14201 /* We have to confirm there is no data relocation in the
14202 same address. In general case, this won't happen. */
14203 /* We have to do ex9 conservative, for those relocation not
14204 considerd we ignore instruction. */
14205 result |= DATA_EXIST;
14206 if (*(contents + *off) & 0x80)
14207 result |= (2 << 24);
14208 else
14209 result |= (4 << 24);
14210 break;
14211 }
14212 }
14213 }
14214 if ((*irel) < irelend
14215 && ((*irel) + 1) < irelend
14216 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14217 /* There are relocations pointing to the same address, we have to
14218 check all of them. */
14219 (*irel)++;
14220 else
14221 {
14222 if (irel_save)
14223 *irel = irel_save;
14224 return result;
14225 }
14226 }
14227 return result;
14228}
14229
1c8f6a4d
KLC		 14230/* Replace with ex9 instruction. */
14231
14232static bfd_boolean
14233nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14234 nds32_elf_blank_t **relax_blank_list,
14235 struct elf_nds32_irel_entry *pre_irel_ptr,
14236 struct elf_nds32_irel_entry **irel_list)
14237{
14238 if (insn16 != 0)
14239 {
14240 /* Implement the ex9 relaxation. */
14241 bfd_putb16 (insn16, contents + pre_off);
14242 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14243 pre_off + 2, 2))
14244 return FALSE;
14245 if (pre_irel_ptr != NULL)
14246 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14247 }
14248 return TRUE;
14249}
14250
35c08157
KLC		 14251/* Replace input file instruction which is in ex9 itable. */
14252
14253static bfd_boolean
14254nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14255{
14256 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14257 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 14258 bfd_vma off;
14259 uint16_t insn16, insn_ex9;
35c08157 14260 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC		 14261 bfd_vma pre_off = -1;
14262 uint16_t pre_insn16 = 0;
35c08157
KLC		 14263 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14264 Elf_Internal_Rela *internal_relocs;
14265 Elf_Internal_Rela *irel;
14266 Elf_Internal_Rela *irelend;
14267 Elf_Internal_Shdr *symtab_hdr;
14268 Elf_Internal_Sym *isym = NULL;
14269 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC		 14270 uint32_t insn = 0;
14271 uint32_t insn_with_reg = 0;
14272 uint32_t it_insn;
14273 uint32_t it_insn_with_reg;
35c08157
KLC		 14274 unsigned long r_symndx;
14275 asection *isec;
14276 struct elf_nds32_irel_entry *irel_list = NULL;
14277 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14278 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC		 14279 struct elf_link_hash_entry_list *h_list;
14280
35c08157
KLC		 14281
14282 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14283 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 14284 || !nds32_get_local_syms (abfd, sec, &isym))
14285 return FALSE;
1c8f6a4d
KLC		 14286 internal_relocs =
14287 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC		 14288 irelend = internal_relocs + sec->reloc_count;
14289 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14290
14291 off = 0;
14292
14293 /* Check if the object enable ex9. */
1c8f6a4d
KLC		 14294 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14295 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 14296
14297 /* Check this section trigger ex9 relaxation. */
14298 if (irel == NULL
14299 || irel >= irelend
14300 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14301 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14302 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14303 return TRUE;
14304
14305 irel = internal_relocs;
14306
14307 /* Check alignment and fetch proper relocation. */
14308 while (off < sec->size)
14309 {
14310 struct elf_link_hash_entry *h = NULL;
14311 struct elf_nds32_irel_entry *irel_ptr = NULL;
14312
14313 /* Syn the instruction and the relocation. */
14314 while (irel != NULL && irel < irelend && irel->r_offset < off)
14315 irel++;
14316
14317 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14318 relax_blank_list, sec,
14319 &off, contents);
14320 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC		 14321 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14322 &relax_blank_list, pre_irel_ptr,
14323 &irel_list))
14324 return FALSE;
35c08157
KLC		 14325
14326 if (data_flag & CLEAN_PRE)
14327 {
14328 pre_off = 0;
14329 pre_insn16 = 0;
14330 pre_irel_ptr = NULL;
14331 }
14332 if (data_flag & DATA_EXIST)
14333 {
14334 /* We save the move offset in the highest byte. */
14335 off += (data_flag >> 24);
14336 continue;
14337 }
14338
14339 if (*(contents + off) & 0x80)
14340 {
14341 /* 2-byte instruction. */
14342 off += 2;
14343 continue;
14344 }
14345
14346 /* Load the instruction and its opcode with register for comparing. */
14347 ex9_insn = ex9_insn_head;
14348 insn = bfd_getb32 (contents + off);
14349 insn_with_reg = 0;
14350 while (ex9_insn)
14351 {
14352 it_insn = strtol (ex9_insn->string, NULL, 16);
14353 it_insn_with_reg = 0;
14354 do_replace = 0;
14355 save_irel = 0;
14356
14357 if (irel != NULL && irel < irelend && irel->r_offset == off)
14358 {
14359 /* Insn with relocation. */
14360 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14361
14362 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC		 14363 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14364 &it_insn_with_reg);
35c08157
KLC		 14365
14366 if (ex9_insn->irel != NULL
1c8f6a4d
KLC		 14367 && (ELF32_R_TYPE (irel->r_info) ==
14368 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC		 14369 && (insn_with_reg == it_insn_with_reg))
14370 {
14371 /* Insn relocation and format is the same as table entry. */
14372
14373 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14374 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14375 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14376 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14377 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14378 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14379 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14380 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14381 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14382 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14383 && ELF32_R_TYPE (irel->r_info) <=
14384 R_NDS32_SDA12S2_SP_RELA)
14385 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14386 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14387 {
14388 r_symndx = ELF32_R_SYM (irel->r_info);
14389 if (r_symndx < symtab_hdr->sh_info)
14390 {
14391 /* Local symbol. */
14392 int shndx = isym[r_symndx].st_shndx;
14393
14394 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14395 if (ex9_insn->sec == isec
14396 && ex9_insn->irel->r_addend == irel->r_addend
14397 && ex9_insn->irel->r_info == irel->r_info)
14398 {
14399 do_replace = 1;
14400 save_irel = 1;
14401 }
14402 }
14403 else
14404 {
14405 /* External symbol. */
14406 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14407 if (ex9_insn->m_list)
14408 {
35c08157
KLC		 14409 h_list = ex9_insn->m_list->h_list;
14410 while (h_list)
14411 {
14412 if (h == h_list->h
1c8f6a4d
KLC		 14413 && (ex9_insn->m_list->irel->r_addend ==
14414 irel->r_addend))
35c08157
KLC		 14415 {
14416 do_replace = 1;
14417 save_irel = 1;
14418 break;
14419 }
14420 h_list = h_list->next;
14421 }
14422 }
14423 }
14424 }
14425 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14426 {
14427 r_symndx = ELF32_R_SYM (irel->r_info);
14428 if (r_symndx < symtab_hdr->sh_info)
14429 {
14430 /* Local symbols. Compare its base symbol and offset. */
14431 int shndx = isym[r_symndx].st_shndx;
14432
14433 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14434 if (ex9_insn->sec == isec
14435 && ex9_insn->irel->r_addend == irel->r_addend
14436 && ex9_insn->irel->r_info == irel->r_info)
14437 {
14438 do_replace = 1;
14439 save_irel = 1;
14440 }
14441 }
14442 else
14443 {
14444 /* External symbol. */
14445 struct elf_link_hash_entry_mul_list *m_list;
14446
14447 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14448 m_list = ex9_insn->m_list;
14449
14450 while (m_list)
14451 {
1c8f6a4d 14452 h_list = m_list->h_list;
35c08157
KLC		 14453
14454 while (h_list)
14455 {
14456 if (h == h_list->h
1c8f6a4d
KLC		 14457 && (m_list->irel->r_addend
14458 == irel->r_addend))
35c08157
KLC		 14459 {
14460 do_replace = 1;
14461 save_irel = 1;
14462 if (ex9_insn->next
14463 && ex9_insn->m_list
14464 && ex9_insn->m_list == ex9_insn->next->m_list)
14465 {
14466 /* sethi multiple entry must be fixed */
14467 nds32_elf_ex9_insert_fix (sec, irel,
14468 h, ex9_insn->order);
14469 }
14470 break;
14471 }
14472 h_list = h_list->next;
14473 }
14474 m_list = m_list->next;
14475 }
14476 }
14477 }
14478 }
14479
14480 /* Import table: Check the symbol hash table and the
14481 jump target. Only R_NDS32_25_PCREL_RELA now. */
14482 else if (ex9_insn->times == -1
14483 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14484 {
14485 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14486 if (insn_with_reg == it_insn_with_reg)
14487 {
14488 char code[10];
14489 bfd_vma relocation;
14490
14491 r_symndx = ELF32_R_SYM (irel->r_info);
14492 if (r_symndx >= symtab_hdr->sh_info)
14493 {
14494 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14495 if ((h->root.type == bfd_link_hash_defined
14496 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC		 14497 && h->root.u.def.section != NULL
14498 && h->root.u.def.section->output_section != NULL
35c08157 14499 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14500 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC		 14501 && h->root.u.def.value > sec->size)
14502 {
1c8f6a4d
KLC		 14503 relocation = h->root.u.def.value +
14504 h->root.u.def.section->output_section->vma +
14505 h->root.u.def.section->output_offset;
35c08157 14506 relocation += irel->r_addend;
1c8f6a4d
KLC		 14507 insn = insn_with_reg
14508 | ((relocation >> 1) & 0xffffff);
14509 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 14510 if (strcmp (code, ex9_insn->string) == 0)
14511 {
14512 do_replace = 1;
14513 save_irel = 1;
14514 }
14515 }
14516 }
14517 }
14518 }
14519 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 14520 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14521 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 14522 {
14523 /* These relocations do not have to relocate contens, so it can
14524 be regard as instruction without relocation. */
14525 if (insn == it_insn && ex9_insn->irel == NULL)
14526 do_replace = 1;
14527 }
14528 }
14529 else
14530 {
14531 /* Instruction without relocation, we only
14532 have to compare their byte code. */
14533 if (insn == it_insn && ex9_insn->irel == NULL)
14534 do_replace = 1;
14535 }
14536
14537 /* Insntruction match so replacing the code here. */
14538 if (do_replace == 1)
14539 {
14540 /* There are two formats of ex9 instruction. */
14541 if (ex9_insn->order < 32)
14542 insn_ex9 = INSN_EX9_IT_2;
14543 else
14544 insn_ex9 = INSN_EX9_IT_1;
14545 insn16 = insn_ex9 | ex9_insn->order;
14546
1c8f6a4d
KLC		 14547 /* Insert ex9 instruction. */
14548 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14549 &relax_blank_list, pre_irel_ptr,
14550 &irel_list);
35c08157
KLC		 14551 pre_off = off;
14552 pre_insn16 = insn16;
14553
14554 if (save_irel)
14555 {
14556 /* For instuction with relocation do relax. */
14557 irel_ptr = (struct elf_nds32_irel_entry *)
14558 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14559 irel_ptr->irel = irel;
14560 irel_ptr->next = NULL;
14561 pre_irel_ptr = irel_ptr;
14562 }
14563 else
14564 pre_irel_ptr = NULL;
14565 break;
14566 }
14567 ex9_insn = ex9_insn->next;
14568 }
14569 off += 4;
14570 }
14571
1c8f6a4d
KLC		 14572 /* Insert ex9 instruction. */
14573 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14574 &relax_blank_list, pre_irel_ptr,
14575 &irel_list);
35c08157
KLC		 14576
14577 /* Delete the redundant code. */
14578 if (relax_blank_list)
14579 {
14580 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14581 relax_blank_list = NULL;
14582 }
14583
14584 /* Clear the relocation that is replaced by ex9. */
14585 while (irel_list)
14586 {
14587 struct elf_nds32_irel_entry *irel_ptr;
14588
14589 irel_ptr = irel_list;
14590 irel_list = irel_ptr->next;
14591 irel_ptr->irel->r_info =
14592 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14593 free (irel_ptr);
14594 }
14595 return TRUE;
14596}
14597
14598/* Initialize ex9 hash table. */
14599
14600int
14601nds32_elf_ex9_init (void)
14602{
14603 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14604 sizeof (struct elf_nds32_code_hash_entry),
14605 1023))
14606 {
4eca0228 14607 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
35c08157
KLC		 14608 return FALSE;
14609 }
14610 return TRUE;
14611}
14612
14613/* Predict how many bytes will be relaxed with ex9 and ifc. */
14614
14615static void
14616nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14617{
14618 struct elf_nds32_insn_times_entry *ex9_insn;
14619 struct elf_nds32_insn_times_entry *temp;
14620 int target_optimize;
14621 struct elf_nds32_link_hash_table *table;
14622
14623 if (ex9_insn_head == NULL)
14624 return;
14625
14626 table = nds32_elf_hash_table (info);
14627 target_optimize = table->target_optimize;
14628 ex9_insn = ex9_insn_head;
14629 while (ex9_insn)
14630 {
14631 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14632 temp = ex9_insn;
14633 ex9_insn = ex9_insn->next;
14634 free (temp);
14635 }
14636 ex9_insn_head = NULL;
14637
14638 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14639 {
14640 /* Examine ifc reduce size. */
14641 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14642 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14643 int size = 0;
14644
14645 while (ifc_ent)
14646 {
14647 if (ifc_ent->enable == 0)
14648 {
14649 /* Not ifc yet. */
14650 irel_ptr = ifc_ent->irel_head;
14651 while (irel_ptr)
14652 {
14653 size += 2;
14654 irel_ptr = irel_ptr->next;
14655 }
14656 }
14657 size -= 2;
14658 ifc_ent = ifc_ent->next;
14659 }
14660 ex9_relax_size += size;
14661 }
14662}
14663
14664/* Finish ex9 table. */
14665
14666void
14667nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14668{
35c08157
KLC		 14669 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14670 nds32_elf_order_insn_times (link_info);
14671 nds32_elf_ex9_total_relax (link_info);
14672 /* Traverse the hash table and count its times. */
14673 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14674 nds32_elf_order_insn_times (link_info);
14675 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC		 14676}
14677
14678/* Relocate the entries in ex9 table. */
14679
14680static bfd_vma
14681nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14682 struct bfd_link_info *link_info)
14683{
14684 Elf_Internal_Sym *isym = NULL;
14685 bfd_vma relocation = -1;
1c8f6a4d 14686 struct elf_link_hash_entry *h;
35c08157
KLC		 14687
14688 if (ptr->m_list != NULL)
14689 {
14690 /* Global symbol. */
1c8f6a4d
KLC		 14691 h = ptr->m_list->h_list->h;
14692 if ((h->root.type == bfd_link_hash_defined
14693 || h->root.type == bfd_link_hash_defweak)
14694 && h->root.u.def.section != NULL
14695 && h->root.u.def.section->output_section != NULL)
35c08157
KLC		 14696 {
14697
1c8f6a4d
KLC		 14698 relocation = h->root.u.def.value +
14699 h->root.u.def.section->output_section->vma +
14700 h->root.u.def.section->output_offset;
35c08157
KLC		 14701 relocation += ptr->m_list->irel->r_addend;
14702 }
14703 else
14704 relocation = 0;
14705 }
14706 else if (ptr->sec !=NULL)
14707 {
14708 /* Local symbol. */
14709 Elf_Internal_Sym sym;
14710 asection *sec = NULL;
14711 asection isec;
14712 asection *isec_ptr = &isec;
14713 Elf_Internal_Rela irel_backup = *(ptr->irel);
14714 asection *sec_backup = ptr->sec;
14715 bfd *abfd = ptr->sec->owner;
14716
14717 if (!nds32_get_local_syms (abfd, sec, &isym))
14718 return FALSE;
14719 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14720
14721 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14722 if (sec != NULL)
14723 *isec_ptr = *sec;
14724 sym = *isym;
14725
14726 /* The purpose is same as elf_link_input_bfd. */
14727 if (isec_ptr != NULL
14728 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14729 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14730 {
14731 sym.st_value =
14732 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14733 elf_section_data (isec_ptr)->sec_info,
14734 isym->st_value);
14735 }
14736 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14737 &ptr->sec, ptr->irel);
14738 if (ptr->irel != NULL)
14739 relocation += ptr->irel->r_addend;
14740
14741 /* Restore origin value since there may be some insntructions that
14742 could not be replaced with ex9.it. */
14743 *(ptr->irel) = irel_backup;
14744 ptr->sec = sec_backup;
14745 }
14746
14747 return relocation;
14748}
14749
14750/* Import ex9 table and build list. */
14751
14752void
14753nds32_elf_ex9_import_table (struct bfd_link_info *info)
14754{
1c8f6a4d 14755 int num = 0;
35c08157 14756 bfd_byte *contents;
35c08157
KLC		 14757 FILE *ex9_import_file;
14758 int update_ex9_table;
14759 struct elf_nds32_link_hash_table *table;
14760
14761 table = nds32_elf_hash_table (info);
14762 ex9_import_file = table->ex9_import_file;
1c8f6a4d 14763 rewind (table->ex9_import_file);
35c08157
KLC		 14764
14765 contents = bfd_malloc (sizeof (bfd_byte) * 4);
14766
35c08157 14767 /* Read instructions from the input file and build the list. */
1c8f6a4d 14768 while (!feof (ex9_import_file))
35c08157 14769 {
1b7e3d2f 14770 unsigned long insn;
35c08157
KLC		 14771 char *code;
14772 struct elf_nds32_insn_times_entry *ptr;
14773 size_t nread;
14774
14775 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC		 14776 /* Ignore the final byte 0x0a. */
14777 if (nread < 1)
14778 break;
35c08157
KLC		 14779 insn = bfd_getb32 (contents);
14780 code = bfd_malloc (sizeof (char) * 9);
1b7e3d2f 14781 snprintf (code, 9, "%08lx", (insn & 0xffffffff));
35c08157
KLC		 14782 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14783 ptr->string = code;
14784 ptr->order = num;
14785 ptr->times = -1;
14786 ptr->sec = NULL;
14787 ptr->m_list = NULL;
14788 ptr->rel_backup.r_offset = 0;
14789 ptr->rel_backup.r_info = 0;
14790 ptr->rel_backup.r_addend = 0;
14791 ptr->irel = NULL;
14792 ptr->next = NULL;
14793 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC		 14794 num++;
14795 }
14796
14797 update_ex9_table = table->update_ex9_table;
14798 if (update_ex9_table == 1)
14799 {
14800 /* It has to consider of sethi need to use multiple page
14801 but it not be done yet. */
14802 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14803 nds32_elf_order_insn_times (info);
14804 }
14805}
14806
14807/* Export ex9 table. */
14808
14809static void
14810nds32_elf_ex9_export (struct bfd_link_info *info,
14811 bfd_byte *contents, int size)
14812{
14813 FILE *ex9_export_file;
14814 struct elf_nds32_link_hash_table *table;
14815
14816 table = nds32_elf_hash_table (info);
14817 ex9_export_file = table->ex9_export_file;
14818 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
14819 fclose (ex9_export_file);
14820}
14821
14822/* Adjust relocations of J and JAL in ex9.itable.
14823 Export ex9 table. */
14824
1c8f6a4d 14825static void
35c08157
KLC		 14826nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
14827{
14828 asection *table_sec = NULL;
14829 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14830 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
14831 bfd *it_abfd;
1c8f6a4d 14832 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC		 14833 bfd_byte *contents = NULL, *source_contents = NULL;
14834 int size = 0;
14835 bfd_vma gp;
14836 int shift, update_ex9_table, offset = 0;
14837 reloc_howto_type *howto = NULL;
14838 Elf_Internal_Rela rel_backup;
14839 unsigned short insn_ex9;
14840 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC		 14841 FILE *ex9_export_file;
14842 static bfd_boolean done = FALSE;
14843
14844 if (done)
14845 return;
14846
14847 done = TRUE;
35c08157
KLC		 14848
14849 table = nds32_elf_hash_table (link_info);
14850 if (table)
14851 table->relax_status |= NDS32_RELAX_EX9_DONE;
14852
14853
14854 update_ex9_table = table->update_ex9_table;
14855 /* Generated ex9.itable exactly. */
14856 if (update_ex9_table == 0)
14857 {
14858 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14859 it_abfd = it_abfd->link.next)
35c08157
KLC		 14860 {
14861 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14862 if (table_sec != NULL)
14863 break;
14864 }
14865
14866 if (table_sec != NULL)
14867 {
14868 bfd *output_bfd;
35c08157
KLC		 14869
14870 output_bfd = table_sec->output_section->owner;
14871 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14872 if (table_sec->size == 0)
14873 return;
14874
0c4bd9d9 14875 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 14876 return;
35c08157
KLC		 14877 }
14878 }
14879 else
14880 {
14881 /* Set gp. */
14882 bfd *output_bfd;
14883
14884 output_bfd = link_info->input_bfds->sections->output_section->owner;
14885 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14886 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
14887 }
14888
14889 /* Relocate instruction. */
14890 while (ex9_insn)
14891 {
14892 bfd_vma relocation, min_relocation = 0xffffffff;
14893
14894 insn = strtol (ex9_insn->string, NULL, 16);
14895 insn_with_reg = 0;
14896 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
14897 {
14898 if (ex9_insn->m_list)
14899 rel_backup = ex9_insn->m_list->rel_backup;
14900 else
14901 rel_backup = ex9_insn->rel_backup;
14902
14903 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
14904 howto =
14905 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
14906 (rel_backup.r_info));
14907 shift = howto->rightshift;
14908 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
14909 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
14910 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
14911 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
14912 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
14913 {
14914 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14915 insn =
14916 insn_with_reg | ((relocation >> shift) &
14917 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14918 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14919 }
14920 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
14921 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
14922 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
14923 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
14924 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
14925 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
14926 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
14927 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
14928 {
14929 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14930 insn =
14931 insn_with_reg | (((relocation - gp) >> shift) &
14932 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14933 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14934 }
14935 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
14936 {
14937 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC		 14938 if (ex9_insn->next && ex9_insn->m_list
14939 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 14940 {
14941 struct elf_link_hash_entry_mul_list *m_list;
14942 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 14943 struct elf_link_hash_entry *h;
35c08157
KLC		 14944
14945 temp_ptr = ex9_insn;
14946 temp_ptr2 = ex9_insn;
14947 m_list = ex9_insn->m_list;
14948 while (m_list)
14949 {
1c8f6a4d
KLC		 14950 h = m_list->h_list->h;
14951 relocation = h->root.u.def.value +
14952 h->root.u.def.section->output_section->vma +
14953 h->root.u.def.section->output_offset;
35c08157
KLC		 14954 relocation += m_list->irel->r_addend;
14955
14956 if (relocation < min_relocation)
14957 min_relocation = relocation;
14958 m_list = m_list->next;
14959 }
14960 relocation = min_relocation;
14961
14962 /* Put insntruction into ex9 table. */
14963 insn = insn_with_reg
14964 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14965 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14966 relocation = relocation + 0x1000; /* hi20 */
14967
1c8f6a4d
KLC		 14968 while (ex9_insn->next && ex9_insn->m_list
14969 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 14970 {
14971 /* Multiple sethi. */
14972 ex9_insn = ex9_insn->next;
14973 size += 4;
35c08157
KLC		 14974 insn =
14975 insn_with_reg | ((relocation >> shift) &
14976 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14977 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14978 relocation = relocation + 0x1000; /* hi20 */
14979 }
14980
14981 fix_ptr = ex9_refix_head;
14982 while (fix_ptr)
14983 {
14984 /* Fix ex9 insn. */
14985 /* temp_ptr2 points to the head of multiple sethi. */
14986 temp_ptr = temp_ptr2;
14987 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
14988 {
14989 fix_ptr = fix_ptr->next;
14990 }
14991 if (fix_ptr->order != temp_ptr->order)
14992 break;
14993
14994 /* Set source insn. */
1c8f6a4d
KLC		 14995 relocation =
14996 fix_ptr->h->root.u.def.value +
14997 fix_ptr->h->root.u.def.section->output_section->vma +
14998 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC		 14999 relocation += fix_ptr->irel->r_addend;
15000 /* sethi imm is imm20s. */
15001 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15002
15003 while (temp_ptr)
15004 {
35c08157
KLC		 15005 /* Match entry and source code. */
15006 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15007 if (insn == source_insn)
15008 {
15009 /* Fix the ex9 insn. */
15010 if (temp_ptr->order != fix_ptr->order)
15011 {
15012 if (!nds32_get_section_contents
15013 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15014 &source_contents, TRUE))
4eca0228 15015 _bfd_error_handler
35c08157
KLC		 15016 (_("Linker: error cannot fixed ex9 relocation \n"));
15017 if (temp_ptr->order < 32)
15018 insn_ex9 = INSN_EX9_IT_2;
15019 else
15020 insn_ex9 = INSN_EX9_IT_1;
15021 insn_ex9 = insn_ex9 | temp_ptr->order;
15022 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15023 }
15024 break;
15025 }
15026 else
15027 {
15028 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
4eca0228 15029 _bfd_error_handler
35c08157
KLC		 15030 (_("Linker: error cannot fixed ex9 relocation \n"));
15031 else
15032 temp_ptr = temp_ptr->next;
15033 }
15034 }
15035 fix_ptr = fix_ptr->next;
15036 }
15037 }
15038 else
15039 {
15040 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15041 insn = insn_with_reg
15042 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15043 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15044 }
15045 }
15046 }
15047 else
15048 {
15049 /* Insn without relocation does not have to be fixed
15050 if need to update export table. */
15051 if (update_ex9_table == 1)
15052 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15053 }
15054 ex9_insn = ex9_insn->next;
15055 size += 4;
15056 }
15057
15058 ex9_export_file = table->ex9_export_file;
15059 if (ex9_export_file != NULL)
1c8f6a4d 15060 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC		 15061 else if (update_ex9_table == 1)
15062 {
1c8f6a4d
KLC		 15063 table->ex9_export_file = table->ex9_import_file;
15064 rewind (table->ex9_export_file);
15065 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC		 15066 }
15067}
15068
15069/* Generate ex9 hash table. */
15070
15071static bfd_boolean
f4cb41f4 15072nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC		 15073 struct bfd_link_info *link_info)
15074{
15075 Elf_Internal_Rela *internal_relocs;
15076 Elf_Internal_Rela *irelend;
15077 Elf_Internal_Rela *irel;
15078 Elf_Internal_Rela *jrel;
15079 Elf_Internal_Rela rel_backup;
15080 Elf_Internal_Shdr *symtab_hdr;
15081 Elf_Internal_Sym *isym = NULL;
15082 asection *isec;
15083 struct elf_link_hash_entry **sym_hashes;
15084 bfd_byte *contents = NULL;
f4cb41f4 15085 bfd_vma off = 0;
35c08157 15086 unsigned long r_symndx;
1c8f6a4d 15087 uint32_t insn, insn_with_reg;
35c08157
KLC		 15088 struct elf_link_hash_entry *h;
15089 int data_flag, shift, align;
15090 bfd_vma relocation;
15091 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15092 reloc_howto_type *howto = NULL;
15093
15094 sym_hashes = elf_sym_hashes (abfd);
15095 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15096 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 15097 return FALSE;
15098
15099 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15100 TRUE /* keep_memory */);
15101 irelend = internal_relocs + sec->reloc_count;
15102 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15103 if (!nds32_get_local_syms (abfd, sec, &isym))
15104 return FALSE;
15105
15106 /* Check the object if enable ex9. */
15107 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15108 R_NDS32_RELAX_ENTRY);
15109
15110 /* Check this section trigger ex9 relaxation. */
15111 if (irel == NULL
15112 || irel >= irelend
15113 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15114 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15115 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15116 return TRUE;
15117
15118 irel = internal_relocs;
15119
15120 /* Push each insn into hash table. */
15121 while (off < sec->size)
15122 {
15123 char code[10];
15124 struct elf_nds32_code_hash_entry *entry;
15125
15126 while (irel != NULL && irel < irelend && irel->r_offset < off)
15127 irel++;
15128
1c8f6a4d
KLC		 15129 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15130 NULL, sec, &off, contents);
35c08157
KLC		 15131 if (data_flag & DATA_EXIST)
15132 {
15133 /* We save the move offset in the highest byte. */
15134 off += (data_flag >> 24);
15135 continue;
15136 }
15137
15138 if (*(contents + off) & 0x80)
15139 {
15140 off += 2;
15141 }
15142 else
15143 {
15144 h = NULL;
15145 isec = NULL;
15146 jrel = NULL;
15147 rel_backup.r_info = 0;
15148 rel_backup.r_offset = 0;
15149 rel_backup.r_addend = 0;
15150 /* Load the instruction and its opcode with register for comparing. */
15151 insn = bfd_getb32 (contents + off);
15152 insn_with_reg = 0;
15153 if (irel != NULL && irel < irelend && irel->r_offset == off)
15154 {
15155 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15156 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15157 shift = howto->rightshift;
15158 align = (1 << shift) - 1;
15159 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15160 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15161 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15162 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15163 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15164 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15165 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15166 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15167 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15168 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15169 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15170 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15171 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15172 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15173 {
15174 r_symndx = ELF32_R_SYM (irel->r_info);
15175 jrel = irel;
15176 rel_backup = *irel;
15177 if (r_symndx < symtab_hdr->sh_info)
15178 {
15179 /* Local symbol. */
15180 int shndx = isym[r_symndx].st_shndx;
15181
15182 bfd_vma st_value = (isym + r_symndx)->st_value;
15183 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15184 relocation = (isec->output_section->vma + isec->output_offset
15185 + st_value + irel->r_addend);
15186 }
15187 else
15188 {
15189 /* External symbol. */
15190 bfd_boolean warned ATTRIBUTE_UNUSED;
15191 bfd_boolean ignored ATTRIBUTE_UNUSED;
15192 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15193 asection *sym_sec;
15194
15195 /* Maybe there is a better way to get h and relocation */
15196 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15197 r_symndx, symtab_hdr, sym_hashes,
15198 h, sym_sec, relocation,
15199 unresolved_reloc, warned, ignored);
15200 relocation += irel->r_addend;
1c8f6a4d
KLC		 15201 if ((h->root.type != bfd_link_hash_defined
15202 && h->root.type != bfd_link_hash_defweak)
15203 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC		 15204 {
15205 off += 4;
15206 continue;
15207 }
15208 }
15209
15210 /* Check for gp relative instruction alignment. */
15211 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15212 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15213 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15214 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15215 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15216 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15217 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15218 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15219 {
15220 bfd_vma gp;
15221 bfd *output_bfd = sec->output_section->owner;
15222 bfd_reloc_status_type r;
15223
15224 /* If the symbol is in the abs section, the out_bfd will be null.
15225 This happens when the relocation has a symbol@GOTOFF. */
15226 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15227 if (r != bfd_reloc_ok)
15228 {
15229 off += 4;
15230 continue;
15231 }
15232
15233 relocation -= gp;
15234
15235 /* Make sure alignment is correct. */
15236 if (relocation & align)
15237 {
15238 /* Incorrect alignment. */
4eca0228 15239 _bfd_error_handler
695344c0 15240 /* xgettext:c-format */
871b3ab2 15241 (_("%pB: warning: unaligned small data access "
2dcf00ce
AM		 15242 "for entry: {%" PRId64 ", %" PRId64 ", %" PRId64
15243 "}, addr = %#" PRIx64 ", align = %#x"),
15244 abfd, (int64_t) irel->r_offset,
15245 (int64_t) irel->r_info, (int64_t) irel->r_addend,
15246 (uint64_t) relocation, align);
35c08157
KLC		 15247 off += 4;
15248 continue;
15249 }
15250 }
15251
15252 insn = insn_with_reg
15253 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15254 }
15255 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 15256 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15257 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 15258 {
15259 /* These relocations do not have to relocate contens, so it can
15260 be regard as instruction without relocation. */
15261 }
15262 else
15263 {
15264 off += 4;
15265 continue;
15266 }
15267 }
15268
1c8f6a4d 15269 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 15270 /* Copy "code". */
15271 entry = (struct elf_nds32_code_hash_entry*)
15272 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15273 if (entry == NULL)
15274 {
4eca0228 15275 _bfd_error_handler
d42c267e 15276 (_("failed creating ex9.it %s hash table entry"), code);
35c08157
KLC		 15277 return FALSE;
15278 }
15279 if (h)
15280 {
15281 if (h->root.type == bfd_link_hash_undefined)
15282 return TRUE;
15283 /* Global symbol. */
15284 /* In order to do sethi with different symbol but same value. */
15285 if (entry->m_list == NULL)
15286 {
15287 struct elf_link_hash_entry_mul_list *m_list_new;
15288 struct elf_link_hash_entry_list *h_list_new;
15289
15290 m_list_new = (struct elf_link_hash_entry_mul_list *)
15291 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15292 h_list_new = (struct elf_link_hash_entry_list *)
15293 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15294 entry->m_list = m_list_new;
15295 m_list_new->h_list = h_list_new;
15296 m_list_new->rel_backup = rel_backup;
15297 m_list_new->times = 1;
15298 m_list_new->irel = jrel;
15299 m_list_new->next = NULL;
15300 h_list_new->h = h;
15301 h_list_new->next = NULL;
15302 }
15303 else
15304 {
15305 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15306 struct elf_link_hash_entry_list *h_list;
15307
15308 while (m_list)
15309 {
15310 /* Build the different symbols that point to the same address. */
15311 h_list = m_list->h_list;
15312 if (h_list->h->root.u.def.value == h->root.u.def.value
15313 && h_list->h->root.u.def.section->output_section->vma
15314 == h->root.u.def.section->output_section->vma
15315 && h_list->h->root.u.def.section->output_offset
15316 == h->root.u.def.section->output_offset
15317 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15318 {
15319 m_list->times++;
15320 m_list->irel = jrel;
15321 while (h_list->h != h && h_list->next)
15322 h_list = h_list->next;
15323 if (h_list->h != h)
15324 {
15325 struct elf_link_hash_entry_list *h_list_new;
15326
15327 h_list_new = (struct elf_link_hash_entry_list *)
15328 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15329 h_list->next = h_list_new;
15330 h_list_new->h = h;
15331 h_list_new->next = NULL;
15332 }
15333 break;
15334 }
15335 /* The sethi case may have different address but the
15336 hi20 is the same. */
15337 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15338 && m_list->next == NULL)
15339 {
15340 struct elf_link_hash_entry_mul_list *m_list_new;
15341 struct elf_link_hash_entry_list *h_list_new;
15342
15343 m_list_new = (struct elf_link_hash_entry_mul_list *)
15344 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15345 h_list_new = (struct elf_link_hash_entry_list *)
15346 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15347 m_list->next = m_list_new;
15348 m_list_new->h_list = h_list_new;
15349 m_list_new->rel_backup = rel_backup;
15350 m_list_new->times = 1;
15351 m_list_new->irel = jrel;
15352 m_list_new->next = NULL;
15353 h_list_new->h = h;
15354 h_list_new->next = NULL;
15355 break;
15356 }
15357 m_list = m_list->next;
15358 }
15359 if (!m_list)
15360 {
15361 off += 4;
15362 continue;
15363 }
15364 }
15365 }
15366 else
15367 {
15368 /* Local symbol and insn without relocation*/
15369 entry->times++;
15370 entry->rel_backup = rel_backup;
15371 }
15372
15373 /* Use in sethi insn with constant and global symbol in same format. */
15374 if (!jrel)
15375 entry->const_insn = 1;
15376 else
15377 entry->irel = jrel;
15378 entry->sec = isec;
15379 off += 4;
15380 }
15381 }
15382 return TRUE;
15383}
15384
15385/* Set the _ITB_BASE, and point it to ex9 table. */
15386
15387bfd_boolean
15388nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15389{
15390 bfd *abfd;
15391 asection *sec;
15392 bfd *output_bfd = NULL;
15393 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC		 15394
15395 if (is_ITB_BASE_set == 1)
15396 return TRUE;
15397
15398 is_ITB_BASE_set = 1;
15399
1c8f6a4d
KLC		 15400 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15401
15402 if (bh && (bh->type == bfd_link_hash_defined
15403 || bh->type == bfd_link_hash_defweak))
15404 return TRUE;
35c08157
KLC		 15405
15406 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15407 abfd = abfd->link.next)
35c08157
KLC		 15408 {
15409 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15410 if (sec != NULL)
15411 {
15412 output_bfd = sec->output_section->owner;
15413 break;
15414 }
15415 }
15416 if (output_bfd == NULL)
15417 {
15418 output_bfd = link_info->output_bfd;
15419 if (output_bfd->sections == NULL)
15420 return TRUE;
15421 else
15422 sec = bfd_abs_section_ptr;
15423 }
15424 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15425 FALSE, FALSE, TRUE);
15426 return (_bfd_generic_link_add_one_symbol
15427 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15428 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC		 15429 (const char *) NULL, FALSE, get_elf_backend_data
15430 (output_bfd)->collect, &bh));
15431} /* End EX9.IT */
15432\f
15433
15434#define ELF_ARCH bfd_arch_nds32
15435#define ELF_MACHINE_CODE EM_NDS32
15436#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 15437#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15438
6d00b590 15439#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15440#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15441#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 15442#define TARGET_LITTLE_NAME "elf32-nds32le"
15443
15444#define elf_info_to_howto nds32_info_to_howto
15445#define elf_info_to_howto_rel nds32_info_to_howto_rel
15446
15447#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15448#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15449#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15450#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15451#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15452
07d6d2b8 15453#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 15454#define elf_backend_action_discarded nds32_elf_action_discarded
15455#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15456#define elf_backend_check_relocs nds32_elf_check_relocs
15457#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15458#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15459#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15460#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15461#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15462#define elf_backend_relocate_section nds32_elf_relocate_section
15463#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC		 15464#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15465#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15466#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15467#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15468#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15469#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15470#define elf_backend_object_p nds32_elf_object_p
15471#define elf_backend_final_write_processing nds32_elf_final_write_processing
15472#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d 15473#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 15474 nds32_elf_get_relocated_section_contents
35c08157
KLC		 15475
15476#define elf_backend_can_gc_sections 1
15477#define elf_backend_can_refcount 1
15478#define elf_backend_want_got_plt 1
15479#define elf_backend_plt_readonly 1
15480#define elf_backend_want_plt_sym 0
15481#define elf_backend_got_header_size 12
15482#define elf_backend_may_use_rel_p 1
15483#define elf_backend_default_use_rela_p 1
15484#define elf_backend_may_use_rela_p 1
64f52338 15485#define elf_backend_dtrel_excludes_plt 1
35c08157
KLC		 15486
15487#include "elf32-target.h"
15488
15489#undef ELF_MAXPAGESIZE
15490#define ELF_MAXPAGESIZE 0x2000
15491
15492#undef TARGET_BIG_SYM
6d00b590 15493#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 15494#undef TARGET_BIG_NAME
15495#define TARGET_BIG_NAME "elf32-nds32be-linux"
15496#undef TARGET_LITTLE_SYM
6d00b590 15497#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 15498#undef TARGET_LITTLE_NAME
15499#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15500#undef elf32_bed
15501#define elf32_bed elf32_nds32_lin_bed
15502
15503#include "elf32-target.h"
GDB Binutils - Deliverables
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