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Add support for G13 and G14 flag bits in RL78 ELF binaries.
[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
CommitLineData
99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
b90efa5b 2 Copyright (C) 2011-2015 Free Software Foundation, Inc.
99c513f6
DD		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
22#include "bfd_stdint.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rl78.h"
26#include "libiberty.h"
27
28#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30#define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34/* Note that the relocations around 0x7f are internal to this file;
35 feel free to move them as needed to avoid conflicts with published
36 relocation numbers. */
37
38static reloc_howto_type rl78_elf_howto_table [] =
39{
6346d5ca 40 RL78REL (NONE, 3, 0, 0, dont, FALSE),
99c513f6
DD		 41 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
42 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
43 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
44 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
45 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
46 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
47 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
48 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
49 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
50 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
51 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
52 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
53 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
54 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
55 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
56 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
57 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
59
60 EMPTY_HOWTO (0x13),
61 EMPTY_HOWTO (0x14),
62 EMPTY_HOWTO (0x15),
63 EMPTY_HOWTO (0x16),
64 EMPTY_HOWTO (0x17),
65 EMPTY_HOWTO (0x18),
66 EMPTY_HOWTO (0x19),
67 EMPTY_HOWTO (0x1a),
68 EMPTY_HOWTO (0x1b),
69 EMPTY_HOWTO (0x1c),
70 EMPTY_HOWTO (0x1d),
71 EMPTY_HOWTO (0x1e),
72 EMPTY_HOWTO (0x1f),
73
74 EMPTY_HOWTO (0x20),
75 EMPTY_HOWTO (0x21),
76 EMPTY_HOWTO (0x22),
77 EMPTY_HOWTO (0x23),
78 EMPTY_HOWTO (0x24),
79 EMPTY_HOWTO (0x25),
80 EMPTY_HOWTO (0x26),
81 EMPTY_HOWTO (0x27),
82 EMPTY_HOWTO (0x28),
83 EMPTY_HOWTO (0x29),
84 EMPTY_HOWTO (0x2a),
85 EMPTY_HOWTO (0x2b),
86 EMPTY_HOWTO (0x2c),
9cea966c 87 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 88
89 EMPTY_HOWTO (0x2e),
90 EMPTY_HOWTO (0x2f),
91 EMPTY_HOWTO (0x30),
92 EMPTY_HOWTO (0x31),
93 EMPTY_HOWTO (0x32),
94 EMPTY_HOWTO (0x33),
95 EMPTY_HOWTO (0x34),
96 EMPTY_HOWTO (0x35),
97 EMPTY_HOWTO (0x36),
98 EMPTY_HOWTO (0x37),
99 EMPTY_HOWTO (0x38),
100 EMPTY_HOWTO (0x39),
101 EMPTY_HOWTO (0x3a),
102 EMPTY_HOWTO (0x3b),
103 EMPTY_HOWTO (0x3c),
104 EMPTY_HOWTO (0x3d),
105 EMPTY_HOWTO (0x3e),
106 EMPTY_HOWTO (0x3f),
107 EMPTY_HOWTO (0x40),
108
109 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
110 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
111 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
112 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
113 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
114 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
115 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
116 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
117 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
118 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
119 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
120 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
121 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
123 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
125 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
126
127#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
128
129 EMPTY_HOWTO (0x52),
130 EMPTY_HOWTO (0x53),
131 EMPTY_HOWTO (0x54),
132 EMPTY_HOWTO (0x55),
133 EMPTY_HOWTO (0x56),
134 EMPTY_HOWTO (0x57),
135 EMPTY_HOWTO (0x58),
136 EMPTY_HOWTO (0x59),
137 EMPTY_HOWTO (0x5a),
138 EMPTY_HOWTO (0x5b),
139 EMPTY_HOWTO (0x5c),
140 EMPTY_HOWTO (0x5d),
141 EMPTY_HOWTO (0x5e),
142 EMPTY_HOWTO (0x5f),
143 EMPTY_HOWTO (0x60),
144 EMPTY_HOWTO (0x61),
145 EMPTY_HOWTO (0x62),
146 EMPTY_HOWTO (0x63),
147 EMPTY_HOWTO (0x64),
148 EMPTY_HOWTO (0x65),
149 EMPTY_HOWTO (0x66),
150 EMPTY_HOWTO (0x67),
151 EMPTY_HOWTO (0x68),
152 EMPTY_HOWTO (0x69),
153 EMPTY_HOWTO (0x6a),
154 EMPTY_HOWTO (0x6b),
155 EMPTY_HOWTO (0x6c),
156 EMPTY_HOWTO (0x6d),
157 EMPTY_HOWTO (0x6e),
158 EMPTY_HOWTO (0x6f),
159 EMPTY_HOWTO (0x70),
160 EMPTY_HOWTO (0x71),
161 EMPTY_HOWTO (0x72),
162 EMPTY_HOWTO (0x73),
163 EMPTY_HOWTO (0x74),
164 EMPTY_HOWTO (0x75),
165 EMPTY_HOWTO (0x76),
166 EMPTY_HOWTO (0x77),
167
168 EMPTY_HOWTO (0x78),
169 EMPTY_HOWTO (0x79),
170 EMPTY_HOWTO (0x7a),
171 EMPTY_HOWTO (0x7b),
172 EMPTY_HOWTO (0x7c),
173 EMPTY_HOWTO (0x7d),
174 EMPTY_HOWTO (0x7e),
175 EMPTY_HOWTO (0x7f),
176
177 RL78REL (SYM, 2, 32, 0, dont, FALSE),
178 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
179 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
180 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
181 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
182 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
183 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
185 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
186 EMPTY_HOWTO (0x89),
187 EMPTY_HOWTO (0x8a),
188 EMPTY_HOWTO (0x8b),
189 EMPTY_HOWTO (0x8c),
190 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
191 EMPTY_HOWTO (0x8e),
192 EMPTY_HOWTO (0x8f),
193 RL78REL (OPand, 2, 32, 0, dont, FALSE),
194 RL78REL (OPor, 2, 32, 0, dont, FALSE),
195 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
197 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
198 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
199 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
200};
201\f
202/* Map BFD reloc types to RL78 ELF reloc types. */
203
204struct rl78_reloc_map
205{
206 bfd_reloc_code_real_type bfd_reloc_val;
207 unsigned int rl78_reloc_val;
208};
209
210static const struct rl78_reloc_map rl78_reloc_map [] =
211{
212 { BFD_RELOC_NONE, R_RL78_NONE },
213 { BFD_RELOC_8, R_RL78_DIR8S },
214 { BFD_RELOC_16, R_RL78_DIR16S },
215 { BFD_RELOC_24, R_RL78_DIR24S },
216 { BFD_RELOC_32, R_RL78_DIR32 },
217 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
218 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
219 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
220 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
221 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
222 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
223 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
224 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
225 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
226 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
227 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
228 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
229 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
230 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
231 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
232 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
233 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
234 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
235 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c
DD		 236 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
237 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 238};
239
240static reloc_howto_type *
241rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
242 bfd_reloc_code_real_type code)
243{
244 unsigned int i;
245
246 if (code == BFD_RELOC_RL78_32_OP)
247 return rl78_elf_howto_table + R_RL78_DIR32;
248
0ba38529 249 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
99c513f6
DD		 250 if (rl78_reloc_map [i].bfd_reloc_val == code)
251 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
252
253 return NULL;
254}
255
256static reloc_howto_type *
257rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
258{
259 unsigned int i;
260
261 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
262 if (rl78_elf_howto_table[i].name != NULL
263 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
264 return rl78_elf_howto_table + i;
265
266 return NULL;
267}
268
269/* Set the howto pointer for an RL78 ELF reloc. */
270
271static void
272rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
273 arelent * cache_ptr,
274 Elf_Internal_Rela * dst)
275{
276 unsigned int r_type;
277
278 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 279 if (r_type >= (unsigned int) R_RL78_max)
280 {
64d29018 281 _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
5860e3f8
NC		 282 r_type = 0;
283 }
99c513f6
DD		 284 cache_ptr->howto = rl78_elf_howto_table + r_type;
285}
286\f
287static bfd_vma
288get_symbol_value (const char * name,
289 bfd_reloc_status_type * status,
290 struct bfd_link_info * info,
291 bfd * input_bfd,
292 asection * input_section,
293 int offset)
294{
295 bfd_vma value = 0;
296 struct bfd_link_hash_entry * h;
297
298 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
299
300 if (h == NULL
301 || (h->type != bfd_link_hash_defined
302 && h->type != bfd_link_hash_defweak))
303 * status = info->callbacks->undefined_symbol
304 (info, name, input_bfd, input_section, offset, TRUE);
305 else
306 value = (h->u.def.value
307 + h->u.def.section->output_section->vma
308 + h->u.def.section->output_offset);
309
310 return value;
311}
312
313static bfd_vma
314get_romstart (bfd_reloc_status_type * status,
315 struct bfd_link_info * info,
316 bfd * abfd,
317 asection * sec,
318 int offset)
319{
320 static bfd_boolean cached = FALSE;
321 static bfd_vma cached_value = 0;
322
323 if (!cached)
324 {
325 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
326 cached = TRUE;
327 }
328 return cached_value;
329}
330
331static bfd_vma
332get_ramstart (bfd_reloc_status_type * status,
333 struct bfd_link_info * info,
334 bfd * abfd,
335 asection * sec,
336 int offset)
337{
338 static bfd_boolean cached = FALSE;
339 static bfd_vma cached_value = 0;
340
341 if (!cached)
342 {
343 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
344 cached = TRUE;
345 }
346 return cached_value;
347}
348
349#define NUM_STACK_ENTRIES 16
350static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
351static unsigned int rl78_stack_top;
352
353#define RL78_STACK_PUSH(val) \
354 do \
355 { \
356 if (rl78_stack_top < NUM_STACK_ENTRIES) \
357 rl78_stack [rl78_stack_top ++] = (val); \
358 else \
359 r = bfd_reloc_dangerous; \
360 } \
361 while (0)
362
363#define RL78_STACK_POP(dest) \
364 do \
365 { \
366 if (rl78_stack_top > 0) \
367 (dest) = rl78_stack [-- rl78_stack_top]; \
368 else \
369 (dest) = 0, r = bfd_reloc_dangerous; \
370 } \
371 while (0)
372
373/* Relocate an RL78 ELF section.
374 There is some attempt to make this function usable for many architectures,
375 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
376 if only to serve as a learning tool.
377
378 The RELOCATE_SECTION function is called by the new ELF backend linker
379 to handle the relocations for a section.
380
381 The relocs are always passed as Rela structures; if the section
382 actually uses Rel structures, the r_addend field will always be
383 zero.
384
385 This function is responsible for adjusting the section contents as
386 necessary, and (if using Rela relocs and generating a relocatable
387 output file) adjusting the reloc addend as necessary.
388
389 This function does not have to worry about setting the reloc
390 address or the reloc symbol index.
391
392 LOCAL_SYMS is a pointer to the swapped in local symbols.
393
394 LOCAL_SECTIONS is an array giving the section in the input file
395 corresponding to the st_shndx field of each local symbol.
396
397 The global hash table entry for the global symbols can be found
398 via elf_sym_hashes (input_bfd).
399
400 When generating relocatable output, this function must handle
401 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
402 going to be the section symbol corresponding to the output
403 section, which means that the addend must be adjusted
404 accordingly. */
405
406static bfd_boolean
407rl78_elf_relocate_section
408 (bfd * output_bfd,
409 struct bfd_link_info * info,
410 bfd * input_bfd,
411 asection * input_section,
412 bfd_byte * contents,
413 Elf_Internal_Rela * relocs,
414 Elf_Internal_Sym * local_syms,
415 asection ** local_sections)
416{
417 Elf_Internal_Shdr * symtab_hdr;
418 struct elf_link_hash_entry ** sym_hashes;
419 Elf_Internal_Rela * rel;
420 Elf_Internal_Rela * relend;
421 bfd *dynobj;
422 asection *splt;
423
424 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
425 sym_hashes = elf_sym_hashes (input_bfd);
426 relend = relocs + input_section->reloc_count;
427
428 dynobj = elf_hash_table (info)->dynobj;
429 splt = NULL;
430 if (dynobj != NULL)
3d4d4302 431 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 432
433 for (rel = relocs; rel < relend; rel ++)
434 {
435 reloc_howto_type * howto;
436 unsigned long r_symndx;
437 Elf_Internal_Sym * sym;
438 asection * sec;
439 struct elf_link_hash_entry * h;
440 bfd_vma relocation;
441 bfd_reloc_status_type r;
442 const char * name = NULL;
443 bfd_boolean unresolved_reloc = TRUE;
444 int r_type;
445
446 r_type = ELF32_R_TYPE (rel->r_info);
447 r_symndx = ELF32_R_SYM (rel->r_info);
448
449 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
450 h = NULL;
451 sym = NULL;
452 sec = NULL;
453 relocation = 0;
454
455 if (r_symndx < symtab_hdr->sh_info)
456 {
457 sym = local_syms + r_symndx;
458 sec = local_sections [r_symndx];
459 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
460
461 name = bfd_elf_string_from_elf_section
462 (input_bfd, symtab_hdr->sh_link, sym->st_name);
463 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
464 }
465 else
466 {
62d887d4
L		 467 bfd_boolean warned ATTRIBUTE_UNUSED;
468 bfd_boolean ignored ATTRIBUTE_UNUSED;
99c513f6
DD		 469
470 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
471 r_symndx, symtab_hdr, sym_hashes, h,
472 sec, relocation, unresolved_reloc,
62d887d4 473 warned, ignored);
99c513f6
DD		 474
475 name = h->root.root.string;
476 }
477
dbaa2011 478 if (sec != NULL && discarded_section (sec))
99c513f6 479 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 480 rel, 1, relend, howto, 0, contents);
99c513f6
DD		 481
482 if (info->relocatable)
483 {
484 /* This is a relocatable link. We don't have to change
485 anything, unless the reloc is against a section symbol,
486 in which case we have to adjust according to where the
487 section symbol winds up in the output section. */
488 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
489 rel->r_addend += sec->output_offset;
490 continue;
491 }
492
493 switch (ELF32_R_TYPE (rel->r_info))
494 {
495 case R_RL78_DIR16S:
496 {
497 bfd_vma *plt_offset;
498
499 if (h != NULL)
500 plt_offset = &h->plt.offset;
501 else
502 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
503
9cea966c 504 if (! valid_16bit_address (relocation))
99c513f6 505 {
99c513f6
DD		 506 /* If this is the first time we've processed this symbol,
507 fill in the plt entry with the correct symbol address. */
508 if ((*plt_offset & 1) == 0)
509 {
510 unsigned int x;
511
512 x = 0x000000ec; /* br !!abs24 */
513 x |= (relocation << 8) & 0xffffff00;
514 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
515 *plt_offset |= 1;
516 }
517
518 relocation = (splt->output_section->vma
519 + splt->output_offset
520 + (*plt_offset & -2));
521 if (name)
522 {
523 char *newname = bfd_malloc (strlen(name)+5);
524 strcpy (newname, name);
525 strcat(newname, ".plt");
526 _bfd_generic_link_add_one_symbol (info,
527 input_bfd,
528 newname,
529 BSF_FUNCTION | BSF_WEAK,
530 splt,
531 (*plt_offset & -2),
532 0,
533 1,
534 0,
535 0);
536 }
537 }
538 }
539 break;
540 }
541
542 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
543 /* If the symbol is undefined and weak
544 then the relocation resolves to zero. */
545 relocation = 0;
546 else
547 {
548 if (howto->pc_relative)
549 {
550 relocation -= (input_section->output_section->vma
551 + input_section->output_offset
552 + rel->r_offset);
553 relocation -= bfd_get_reloc_size (howto);
554 }
555
556 relocation += rel->r_addend;
557 }
558
559 r = bfd_reloc_ok;
560
561#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
562#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
563#define OP(i) (contents[rel->r_offset + (i)])
564
565 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
566 switch (r_type)
567 {
568 case R_RL78_NONE:
569 break;
570
9cea966c
DD		 571 case R_RL78_RH_RELAX:
572 break;
573
99c513f6
DD		 574 case R_RL78_DIR8S_PCREL:
575 RANGE (-128, 127);
576 OP (0) = relocation;
577 break;
578
579 case R_RL78_DIR8S:
580 RANGE (-128, 255);
581 OP (0) = relocation;
582 break;
583
584 case R_RL78_DIR8U:
585 RANGE (0, 255);
586 OP (0) = relocation;
587 break;
588
589 case R_RL78_DIR16S_PCREL:
590 RANGE (-32768, 32767);
591 OP (0) = relocation;
592 OP (1) = relocation >> 8;
593 break;
594
595 case R_RL78_DIR16S:
596 if ((relocation & 0xf0000) == 0xf0000)
597 relocation &= 0xffff;
598 RANGE (-32768, 65535);
599 OP (0) = relocation;
600 OP (1) = relocation >> 8;
601 break;
602
603 case R_RL78_DIR16U:
604 RANGE (0, 65536);
605 OP (0) = relocation;
606 OP (1) = relocation >> 8;
607 break;
608
609 case R_RL78_DIR16:
610 RANGE (-32768, 65536);
611 OP (0) = relocation;
612 OP (1) = relocation >> 8;
613 break;
614
615 case R_RL78_DIR16_REV:
616 RANGE (-32768, 65536);
617 OP (1) = relocation;
618 OP (0) = relocation >> 8;
619 break;
620
621 case R_RL78_DIR3U_PCREL:
622 RANGE (3, 10);
623 OP (0) &= 0xf8;
624 OP (0) |= relocation & 0x07;
625 break;
626
627 case R_RL78_DIR24S_PCREL:
628 RANGE (-0x800000, 0x7fffff);
629 OP (0) = relocation;
630 OP (1) = relocation >> 8;
631 OP (2) = relocation >> 16;
632 break;
633
634 case R_RL78_DIR24S:
635 RANGE (-0x800000, 0x7fffff);
636 OP (0) = relocation;
637 OP (1) = relocation >> 8;
638 OP (2) = relocation >> 16;
639 break;
640
641 case R_RL78_DIR32:
642 OP (0) = relocation;
643 OP (1) = relocation >> 8;
644 OP (2) = relocation >> 16;
645 OP (3) = relocation >> 24;
646 break;
647
648 case R_RL78_DIR32_REV:
649 OP (3) = relocation;
650 OP (2) = relocation >> 8;
651 OP (1) = relocation >> 16;
652 OP (0) = relocation >> 24;
653 break;
654
9cea966c 655 case R_RL78_RH_SFR:
9cea966c
DD		 656 RANGE (0xfff00, 0xfffff);
657 OP (0) = relocation & 0xff;
658 break;
659
660 case R_RL78_RH_SADDR:
9cea966c
DD		 661 RANGE (0xffe20, 0xfff1f);
662 OP (0) = relocation & 0xff;
9cea966c
DD		 663 break;
664
99c513f6
DD		 665 /* Complex reloc handling: */
666
667 case R_RL78_ABS32:
668 RL78_STACK_POP (relocation);
669 OP (0) = relocation;
670 OP (1) = relocation >> 8;
671 OP (2) = relocation >> 16;
672 OP (3) = relocation >> 24;
673 break;
674
675 case R_RL78_ABS32_REV:
676 RL78_STACK_POP (relocation);
677 OP (3) = relocation;
678 OP (2) = relocation >> 8;
679 OP (1) = relocation >> 16;
680 OP (0) = relocation >> 24;
681 break;
682
683 case R_RL78_ABS24S_PCREL:
684 case R_RL78_ABS24S:
685 RL78_STACK_POP (relocation);
686 RANGE (-0x800000, 0x7fffff);
687 OP (0) = relocation;
688 OP (1) = relocation >> 8;
689 OP (2) = relocation >> 16;
690 break;
691
692 case R_RL78_ABS16:
693 RL78_STACK_POP (relocation);
694 RANGE (-32768, 65535);
695 OP (0) = relocation;
696 OP (1) = relocation >> 8;
697 break;
698
699 case R_RL78_ABS16_REV:
700 RL78_STACK_POP (relocation);
701 RANGE (-32768, 65535);
702 OP (1) = relocation;
703 OP (0) = relocation >> 8;
704 break;
705
706 case R_RL78_ABS16S_PCREL:
707 case R_RL78_ABS16S:
708 RL78_STACK_POP (relocation);
709 RANGE (-32768, 32767);
710 OP (0) = relocation;
711 OP (1) = relocation >> 8;
712 break;
713
714 case R_RL78_ABS16U:
715 RL78_STACK_POP (relocation);
716 RANGE (0, 65536);
717 OP (0) = relocation;
718 OP (1) = relocation >> 8;
719 break;
720
721 case R_RL78_ABS16UL:
722 RL78_STACK_POP (relocation);
723 relocation >>= 2;
724 RANGE (0, 65536);
725 OP (0) = relocation;
726 OP (1) = relocation >> 8;
727 break;
728
729 case R_RL78_ABS16UW:
730 RL78_STACK_POP (relocation);
731 relocation >>= 1;
732 RANGE (0, 65536);
733 OP (0) = relocation;
734 OP (1) = relocation >> 8;
735 break;
736
737 case R_RL78_ABS8:
738 RL78_STACK_POP (relocation);
739 RANGE (-128, 255);
740 OP (0) = relocation;
741 break;
742
743 case R_RL78_ABS8U:
744 RL78_STACK_POP (relocation);
745 RANGE (0, 255);
746 OP (0) = relocation;
747 break;
748
749 case R_RL78_ABS8UL:
750 RL78_STACK_POP (relocation);
751 relocation >>= 2;
752 RANGE (0, 255);
753 OP (0) = relocation;
754 break;
755
756 case R_RL78_ABS8UW:
757 RL78_STACK_POP (relocation);
758 relocation >>= 1;
759 RANGE (0, 255);
760 OP (0) = relocation;
761 break;
762
763 case R_RL78_ABS8S_PCREL:
764 case R_RL78_ABS8S:
765 RL78_STACK_POP (relocation);
766 RANGE (-128, 127);
767 OP (0) = relocation;
768 break;
769
770 case R_RL78_SYM:
771 if (r_symndx < symtab_hdr->sh_info)
772 RL78_STACK_PUSH (sec->output_section->vma
773 + sec->output_offset
774 + sym->st_value
775 + rel->r_addend);
776 else
777 {
778 if (h != NULL
779 && (h->root.type == bfd_link_hash_defined
780 || h->root.type == bfd_link_hash_defweak))
781 RL78_STACK_PUSH (h->root.u.def.value
782 + sec->output_section->vma
783 + sec->output_offset
784 + rel->r_addend);
4107ae22
DD		 785 else if (h->root.type == bfd_link_hash_undefweak)
786 RL78_STACK_PUSH (0);
99c513f6
DD		 787 else
788 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
789 }
790 break;
791
792 case R_RL78_OPneg:
793 {
794 int32_t tmp;
795
796 RL78_STACK_POP (tmp);
797 tmp = - tmp;
798 RL78_STACK_PUSH (tmp);
799 }
800 break;
801
802 case R_RL78_OPadd:
803 {
804 int32_t tmp1, tmp2;
805
806 RL78_STACK_POP (tmp2);
807 RL78_STACK_POP (tmp1);
808 tmp1 += tmp2;
809 RL78_STACK_PUSH (tmp1);
810 }
811 break;
812
813 case R_RL78_OPsub:
814 {
815 int32_t tmp1, tmp2;
816
34064ff3
DD		 817 /* For the expression "A - B", the assembler pushes A,
818 then B, then OPSUB. So the first op we pop is B, not
819 A. */
820 RL78_STACK_POP (tmp2); /* B */
821 RL78_STACK_POP (tmp1); /* A */
822 tmp1 -= tmp2; /* A - B */
823 RL78_STACK_PUSH (tmp1);
99c513f6
DD		 824 }
825 break;
826
827 case R_RL78_OPmul:
828 {
829 int32_t tmp1, tmp2;
830
831 RL78_STACK_POP (tmp2);
832 RL78_STACK_POP (tmp1);
833 tmp1 *= tmp2;
834 RL78_STACK_PUSH (tmp1);
835 }
836 break;
837
838 case R_RL78_OPdiv:
839 {
840 int32_t tmp1, tmp2;
841
842 RL78_STACK_POP (tmp2);
843 RL78_STACK_POP (tmp1);
844 tmp1 /= tmp2;
845 RL78_STACK_PUSH (tmp1);
846 }
847 break;
848
849 case R_RL78_OPshla:
850 {
851 int32_t tmp1, tmp2;
852
853 RL78_STACK_POP (tmp2);
854 RL78_STACK_POP (tmp1);
855 tmp1 <<= tmp2;
856 RL78_STACK_PUSH (tmp1);
857 }
858 break;
859
860 case R_RL78_OPshra:
861 {
862 int32_t tmp1, tmp2;
863
864 RL78_STACK_POP (tmp2);
865 RL78_STACK_POP (tmp1);
866 tmp1 >>= tmp2;
867 RL78_STACK_PUSH (tmp1);
868 }
869 break;
870
871 case R_RL78_OPsctsize:
872 RL78_STACK_PUSH (input_section->size);
873 break;
874
875 case R_RL78_OPscttop:
876 RL78_STACK_PUSH (input_section->output_section->vma);
877 break;
878
879 case R_RL78_OPand:
880 {
881 int32_t tmp1, tmp2;
882
883 RL78_STACK_POP (tmp2);
884 RL78_STACK_POP (tmp1);
885 tmp1 &= tmp2;
886 RL78_STACK_PUSH (tmp1);
887 }
888 break;
889
890 case R_RL78_OPor:
891 {
892 int32_t tmp1, tmp2;
893
894 RL78_STACK_POP (tmp2);
895 RL78_STACK_POP (tmp1);
896 tmp1 |= tmp2;
897 RL78_STACK_PUSH (tmp1);
898 }
899 break;
900
901 case R_RL78_OPxor:
902 {
903 int32_t tmp1, tmp2;
904
905 RL78_STACK_POP (tmp2);
906 RL78_STACK_POP (tmp1);
907 tmp1 ^= tmp2;
908 RL78_STACK_PUSH (tmp1);
909 }
910 break;
911
912 case R_RL78_OPnot:
913 {
914 int32_t tmp;
915
916 RL78_STACK_POP (tmp);
917 tmp = ~ tmp;
918 RL78_STACK_PUSH (tmp);
919 }
920 break;
921
922 case R_RL78_OPmod:
923 {
924 int32_t tmp1, tmp2;
925
926 RL78_STACK_POP (tmp2);
927 RL78_STACK_POP (tmp1);
928 tmp1 %= tmp2;
929 RL78_STACK_PUSH (tmp1);
930 }
931 break;
932
933 case R_RL78_OPromtop:
934 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
935 break;
936
937 case R_RL78_OPramtop:
938 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
939 break;
940
941 default:
942 r = bfd_reloc_notsupported;
943 break;
944 }
945
946 if (r != bfd_reloc_ok)
947 {
948 const char * msg = NULL;
949
950 switch (r)
951 {
952 case bfd_reloc_overflow:
953 /* Catch the case of a missing function declaration
954 and emit a more helpful error message. */
955 if (r_type == R_RL78_DIR24S_PCREL)
956 msg = _("%B(%A): error: call to undefined function '%s'");
957 else
958 r = info->callbacks->reloc_overflow
959 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
960 input_bfd, input_section, rel->r_offset);
961 break;
962
963 case bfd_reloc_undefined:
964 r = info->callbacks->undefined_symbol
965 (info, name, input_bfd, input_section, rel->r_offset,
966 TRUE);
967 break;
968
969 case bfd_reloc_other:
970 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
971 break;
972
973 case bfd_reloc_outofrange:
974 msg = _("%B(%A): internal error: out of range error");
975 break;
976
977 case bfd_reloc_notsupported:
978 msg = _("%B(%A): internal error: unsupported relocation error");
979 break;
980
981 case bfd_reloc_dangerous:
982 msg = _("%B(%A): internal error: dangerous relocation");
983 break;
984
985 default:
986 msg = _("%B(%A): internal error: unknown error");
987 break;
988 }
989
990 if (msg)
991 _bfd_error_handler (msg, input_bfd, input_section, name);
992
993 if (! r)
994 return FALSE;
995 }
996 }
997
998 return TRUE;
999}
1000\f
1001/* Function to set the ELF flag bits. */
1002
1003static bfd_boolean
1004rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1005{
1006 elf_elfheader (abfd)->e_flags = flags;
1007 elf_flags_init (abfd) = TRUE;
1008 return TRUE;
1009}
1010
1011static bfd_boolean no_warn_mismatch = FALSE;
1012
1013void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1014
1015void
1016bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1017{
1018 no_warn_mismatch = user_no_warn_mismatch;
1019}
1020
1740ba0c
NC		 1021static const char *
1022rl78_cpu_name (flagword flags)
1023{
1024 switch (flags & E_FLAG_RL78_CPU_MASK)
1025 {
1026 default: return "";
1027 case E_FLAG_RL78_G10: return "G10";
1028 case E_FLAG_RL78_G13: return "G13";
1029 case E_FLAG_RL78_G14: return "G14";
1030 }
1031}
1032
99c513f6
DD		 1033/* Merge backend specific data from an object file to the output
1034 object file when linking. */
1035
1036static bfd_boolean
1037rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1038{
99c513f6 1039 flagword new_flags;
4046d87a 1040 flagword old_flags;
99c513f6
DD		 1041 bfd_boolean error = FALSE;
1042
1043 new_flags = elf_elfheader (ibfd)->e_flags;
4046d87a 1044 old_flags = elf_elfheader (obfd)->e_flags;
99c513f6
DD		 1045
1046 if (!elf_flags_init (obfd))
1047 {
1048 /* First call, no flags set. */
1049 elf_flags_init (obfd) = TRUE;
1050 elf_elfheader (obfd)->e_flags = new_flags;
1051 }
4046d87a
NC		 1052 else if (old_flags != new_flags)
1053 {
1054 flagword changed_flags = old_flags ^ new_flags;
1055
1740ba0c 1056 if (changed_flags & E_FLAG_RL78_CPU_MASK)
4046d87a 1057 {
1740ba0c
NC		 1058 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1059 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
4046d87a 1060
1740ba0c
NC		 1061 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1062 /* It does not matter what new_cpu may have. */;
1063 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1064 {
1065 if (in_cpu == E_FLAG_RL78_G10)
1066 {
1067 /* G10 files can only be linked with other G10 files.
1068 If the output is set to "any" this means that it is
1069 a G14 file that does not use hardware multiply/divide,
1070 but that is still incompatible with the G10 ABI. */
1071 error = TRUE;
1072
1073 (*_bfd_error_handler)
1074 (_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"),
1075 bfd_get_filename (ibfd),
1076 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1077 }
1078 else
1079 {
1080 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1081 old_flags |= in_cpu;
1082 elf_elfheader (obfd)->e_flags = old_flags;
1083 }
1084 }
4046d87a 1085 else
1740ba0c
NC		 1086 {
1087 error = TRUE;
1088
1089 (*_bfd_error_handler)
1090 (_("RL78 ABI conflict: cannot link %s file %s with %s file %s"),
1091 rl78_cpu_name (in_cpu), bfd_get_filename (ibfd),
1092 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1093 }
4046d87a 1094 }
856ea05c
KP		 1095
1096 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1097 {
1098 (*_bfd_error_handler)
1099 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1100
1101 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1102 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1103 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1104 else
1105 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1106 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1740ba0c 1107 error = TRUE;
856ea05c 1108 }
4046d87a 1109 }
99c513f6
DD		 1110
1111 return !error;
1112}
1113\f
1114static bfd_boolean
1115rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1116{
1117 FILE * file = (FILE *) ptr;
1118 flagword flags;
1119
1120 BFD_ASSERT (abfd != NULL && ptr != NULL);
1121
1122 /* Print normal ELF private data. */
1123 _bfd_elf_print_private_bfd_data (abfd, ptr);
1124
1125 flags = elf_elfheader (abfd)->e_flags;
1126 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1127
1740ba0c
NC		 1128 if (flags & E_FLAG_RL78_CPU_MASK)
1129 fprintf (file, " [%s]", rl78_cpu_name (flags));
4046d87a 1130
856ea05c
KP		 1131 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1132 fprintf (file, _(" [64-bit doubles]"));
1133
99c513f6
DD		 1134 fputc ('\n', file);
1135 return TRUE;
1136}
1137
1138/* Return the MACH for an e_flags value. */
1139
1140static int
1740ba0c 1141elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
99c513f6 1142{
1740ba0c 1143 return bfd_mach_rl78;
99c513f6
DD		 1144}
1145
1146static bfd_boolean
1147rl78_elf_object_p (bfd * abfd)
1148{
1149 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1150 elf32_rl78_machine (abfd));
1151 return TRUE;
1152}
99c513f6
DD		 1153\f
1154/* support PLT for 16-bit references to 24-bit functions. */
1155
1156/* We support 16-bit pointers to code above 64k by generating a thunk
1157 below 64k containing a JMP instruction to the final address. */
68ffbac6 1158
99c513f6
DD		 1159static bfd_boolean
1160rl78_elf_check_relocs
1161 (bfd * abfd,
1162 struct bfd_link_info * info,
1163 asection * sec,
1164 const Elf_Internal_Rela * relocs)
1165{
1166 Elf_Internal_Shdr * symtab_hdr;
1167 struct elf_link_hash_entry ** sym_hashes;
1168 const Elf_Internal_Rela * rel;
1169 const Elf_Internal_Rela * rel_end;
1170 bfd_vma *local_plt_offsets;
1171 asection *splt;
1172 bfd *dynobj;
1173
1174 if (info->relocatable)
1175 return TRUE;
68ffbac6 1176
99c513f6
DD		 1177 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1178 sym_hashes = elf_sym_hashes (abfd);
1179 local_plt_offsets = elf_local_got_offsets (abfd);
1180 splt = NULL;
1181 dynobj = elf_hash_table(info)->dynobj;
1182
1183 rel_end = relocs + sec->reloc_count;
1184 for (rel = relocs; rel < rel_end; rel++)
1185 {
1186 struct elf_link_hash_entry *h;
1187 unsigned long r_symndx;
1188 bfd_vma *offset;
68ffbac6 1189
99c513f6
DD		 1190 r_symndx = ELF32_R_SYM (rel->r_info);
1191 if (r_symndx < symtab_hdr->sh_info)
1192 h = NULL;
1193 else
1194 {
1195 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1196 while (h->root.type == bfd_link_hash_indirect
1197 || h->root.type == bfd_link_hash_warning)
1198 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 1199
1200 /* PR15323, ref flags aren't set for references in the same
1201 object. */
1202 h->root.non_ir_ref = 1;
99c513f6 1203 }
68ffbac6 1204
99c513f6
DD		 1205 switch (ELF32_R_TYPE (rel->r_info))
1206 {
1207 /* This relocation describes a 16-bit pointer to a function.
1208 We may need to allocate a thunk in low memory; reserve memory
1209 for it now. */
1210 case R_RL78_DIR16S:
1211 if (dynobj == NULL)
1212 elf_hash_table (info)->dynobj = dynobj = abfd;
1213 if (splt == NULL)
1214 {
3d4d4302 1215 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1216 if (splt == NULL)
1217 {
1218 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1219 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1220 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1221 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1222 flags);
99c513f6
DD		 1223 if (splt == NULL
1224 || ! bfd_set_section_alignment (dynobj, splt, 1))
1225 return FALSE;
1226 }
1227 }
1228
1229 if (h != NULL)
1230 offset = &h->plt.offset;
1231 else
1232 {
1233 if (local_plt_offsets == NULL)
1234 {
1235 size_t size;
1236 unsigned int i;
1237
1238 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1239 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1240 if (local_plt_offsets == NULL)
1241 return FALSE;
1242 elf_local_got_offsets (abfd) = local_plt_offsets;
1243
1244 for (i = 0; i < symtab_hdr->sh_info; i++)
1245 local_plt_offsets[i] = (bfd_vma) -1;
1246 }
1247 offset = &local_plt_offsets[r_symndx];
1248 }
1249
1250 if (*offset == (bfd_vma) -1)
1251 {
1252 *offset = splt->size;
1253 splt->size += 4;
1254 }
1255 break;
1256 }
1257 }
68ffbac6 1258
99c513f6
DD		 1259 return TRUE;
1260}
1261
1262/* This must exist if dynobj is ever set. */
1263
1264static bfd_boolean
1265rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1266 struct bfd_link_info *info)
1267{
1268 bfd *dynobj;
1269 asection *splt;
1270
47fc0f1f
NC		 1271 if (!elf_hash_table (info)->dynamic_sections_created)
1272 return TRUE;
1273
9cea966c
DD		 1274 /* As an extra sanity check, verify that all plt entries have been
1275 filled in. However, relaxing might have changed the relocs so
1276 that some plt entries don't get filled in, so we have to skip
1277 this check if we're relaxing. Unfortunately, check_relocs is
1278 called before relaxation. */
99c513f6 1279
1740ba0c 1280 if (info->relax_trip > 0)
47fc0f1f
NC		 1281 return TRUE;
1282
1283 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1284 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1285 {
47fc0f1f
NC		 1286 bfd_byte *contents = splt->contents;
1287 unsigned int i, size = splt->size;
1288
1289 for (i = 0; i < size; i += 4)
99c513f6 1290 {
47fc0f1f
NC		 1291 unsigned int x = bfd_get_32 (dynobj, contents + i);
1292 BFD_ASSERT (x != 0);
99c513f6
DD		 1293 }
1294 }
1295
1296 return TRUE;
1297}
1298
1299static bfd_boolean
1300rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1301 struct bfd_link_info *info)
1302{
1303 bfd *dynobj;
1304 asection *splt;
1305
1306 if (info->relocatable)
1307 return TRUE;
1308
1309 dynobj = elf_hash_table (info)->dynobj;
1310 if (dynobj == NULL)
1311 return TRUE;
1312
3d4d4302 1313 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1314 BFD_ASSERT (splt != NULL);
1315
1316 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1317 if (splt->contents == NULL)
1318 return FALSE;
1319
1320 return TRUE;
1321}
1322
1323\f
1324
1325/* Handle relaxing. */
1326
1327/* A subroutine of rl78_elf_relax_section. If the global symbol H
1328 is within the low 64k, remove any entry for it in the plt. */
1329
1330struct relax_plt_data
1331{
1332 asection *splt;
1333 bfd_boolean *again;
1334};
1335
1336static bfd_boolean
2c3fc389 1337rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1338{
1339 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1340
1341 if (h->plt.offset != (bfd_vma) -1)
1342 {
1343 bfd_vma address;
1344
1345 if (h->root.type == bfd_link_hash_undefined
1346 || h->root.type == bfd_link_hash_undefweak)
1347 address = 0;
1348 else
1349 address = (h->root.u.def.section->output_section->vma
1350 + h->root.u.def.section->output_offset
1351 + h->root.u.def.value);
1352
1353 if (valid_16bit_address (address))
1354 {
1355 h->plt.offset = -1;
1356 data->splt->size -= 4;
1357 *data->again = TRUE;
1358 }
1359 }
1360
1361 return TRUE;
1362}
1363
1364/* A subroutine of rl78_elf_relax_section. If the global symbol H
1365 previously had a plt entry, give it a new entry offset. */
1366
1367static bfd_boolean
2c3fc389 1368rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1369{
1370 bfd_vma *entry = (bfd_vma *) xdata;
1371
1372 if (h->plt.offset != (bfd_vma) -1)
1373 {
1374 h->plt.offset = *entry;
1375 *entry += 4;
1376 }
1377
1378 return TRUE;
1379}
1380
1381static bfd_boolean
1382rl78_elf_relax_plt_section (bfd *dynobj,
1383 asection *splt,
1384 struct bfd_link_info *info,
1385 bfd_boolean *again)
1386{
1387 struct relax_plt_data relax_plt_data;
1388 bfd *ibfd;
1389
1390 /* Assume nothing changes. */
1391 *again = FALSE;
1392
1393 if (info->relocatable)
1394 return TRUE;
1395
1396 /* We only relax the .plt section at the moment. */
1397 if (dynobj != elf_hash_table (info)->dynobj
1398 || strcmp (splt->name, ".plt") != 0)
1399 return TRUE;
1400
1401 /* Quick check for an empty plt. */
1402 if (splt->size == 0)
1403 return TRUE;
1404
1405 /* Map across all global symbols; see which ones happen to
1406 fall in the low 64k. */
1407 relax_plt_data.splt = splt;
1408 relax_plt_data.again = again;
1409 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1410 &relax_plt_data);
1411
1412 /* Likewise for local symbols, though that's somewhat less convenient
1413 as we have to walk the list of input bfds and swap in symbol data. */
c72f2fb2 1414 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
99c513f6
DD		 1415 {
1416 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1417 Elf_Internal_Shdr *symtab_hdr;
1418 Elf_Internal_Sym *isymbuf = NULL;
1419 unsigned int idx;
1420
1421 if (! local_plt_offsets)
1422 continue;
1423
1424 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1425 if (symtab_hdr->sh_info != 0)
1426 {
1427 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1428 if (isymbuf == NULL)
1429 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1430 symtab_hdr->sh_info, 0,
1431 NULL, NULL, NULL);
1432 if (isymbuf == NULL)
1433 return FALSE;
1434 }
1435
1436 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1437 {
1438 Elf_Internal_Sym *isym;
1439 asection *tsec;
1440 bfd_vma address;
1441
1442 if (local_plt_offsets[idx] == (bfd_vma) -1)
1443 continue;
1444
1445 isym = &isymbuf[idx];
1446 if (isym->st_shndx == SHN_UNDEF)
1447 continue;
1448 else if (isym->st_shndx == SHN_ABS)
1449 tsec = bfd_abs_section_ptr;
1450 else if (isym->st_shndx == SHN_COMMON)
1451 tsec = bfd_com_section_ptr;
1452 else
1453 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1454
1455 address = (tsec->output_section->vma
1456 + tsec->output_offset
1457 + isym->st_value);
1458 if (valid_16bit_address (address))
1459 {
1460 local_plt_offsets[idx] = -1;
1461 splt->size -= 4;
1462 *again = TRUE;
1463 }
1464 }
1465
1466 if (isymbuf != NULL
1467 && symtab_hdr->contents != (unsigned char *) isymbuf)
1468 {
1469 if (! info->keep_memory)
1470 free (isymbuf);
1471 else
1472 {
1473 /* Cache the symbols for elf_link_input_bfd. */
1474 symtab_hdr->contents = (unsigned char *) isymbuf;
1475 }
1476 }
1477 }
1478
1479 /* If we changed anything, walk the symbols again to reallocate
1480 .plt entry addresses. */
1481 if (*again && splt->size > 0)
1482 {
1483 bfd_vma entry = 0;
1484
1485 elf_link_hash_traverse (elf_hash_table (info),
1486 rl78_relax_plt_realloc, &entry);
1487
c72f2fb2 1488 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
99c513f6
DD		 1489 {
1490 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1491 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1492 unsigned int idx;
1493
1494 if (! local_plt_offsets)
1495 continue;
1496
1497 for (idx = 0; idx < nlocals; ++idx)
1498 if (local_plt_offsets[idx] != (bfd_vma) -1)
1499 {
1500 local_plt_offsets[idx] = entry;
1501 entry += 4;
1502 }
1503 }
1504 }
1505
1506 return TRUE;
1507}
1508
9cea966c
DD		 1509/* Delete some bytes from a section while relaxing. */
1510
1511static bfd_boolean
1512elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1740ba0c 1513 Elf_Internal_Rela *alignment_rel, int force_snip)
9cea966c
DD		 1514{
1515 Elf_Internal_Shdr * symtab_hdr;
1516 unsigned int sec_shndx;
1517 bfd_byte * contents;
1518 Elf_Internal_Rela * irel;
1519 Elf_Internal_Rela * irelend;
1520 Elf_Internal_Sym * isym;
1521 Elf_Internal_Sym * isymend;
1522 bfd_vma toaddr;
1523 unsigned int symcount;
1524 struct elf_link_hash_entry ** sym_hashes;
1525 struct elf_link_hash_entry ** end_hashes;
1526
1527 if (!alignment_rel)
1528 force_snip = 1;
1529
1530 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1531
1532 contents = elf_section_data (sec)->this_hdr.contents;
1533
1534 /* The deletion must stop at the next alignment boundary, if
1535 ALIGNMENT_REL is non-NULL. */
1536 toaddr = sec->size;
1537 if (alignment_rel)
1538 toaddr = alignment_rel->r_offset;
1539
1540 irel = elf_section_data (sec)->relocs;
2bc56d66
DD		 1541 if (irel == NULL)
1542 {
1543 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1544 irel = elf_section_data (sec)->relocs;
1545 }
1546
9cea966c
DD		 1547 irelend = irel + sec->reloc_count;
1548
1549 /* Actually delete the bytes. */
1550 memmove (contents + addr, contents + addr + count,
1551 (size_t) (toaddr - addr - count));
1552
1553 /* If we don't have an alignment marker to worry about, we can just
1554 shrink the section. Otherwise, we have to fill in the newly
1555 created gap with NOP insns (0x03). */
1556 if (force_snip)
1557 sec->size -= count;
1558 else
1559 memset (contents + toaddr - count, 0x03, count);
1560
1561 /* Adjust all the relocs. */
2bc56d66 1562 for (; irel && irel < irelend; irel++)
9cea966c
DD		 1563 {
1564 /* Get the new reloc address. */
1565 if (irel->r_offset > addr
1566 && (irel->r_offset < toaddr
1567 || (force_snip && irel->r_offset == toaddr)))
1568 irel->r_offset -= count;
1569
1570 /* If we see an ALIGN marker at the end of the gap, we move it
1571 to the beginning of the gap, since marking these gaps is what
1572 they're for. */
1573 if (irel->r_offset == toaddr
1574 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1575 && irel->r_addend & RL78_RELAXA_ALIGN)
1576 irel->r_offset -= count;
1577 }
1578
1579 /* Adjust the local symbols defined in this section. */
1580 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1581 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1582 isymend = isym + symtab_hdr->sh_info;
1583
1584 for (; isym < isymend; isym++)
1585 {
1586 /* If the symbol is in the range of memory we just moved, we
1587 have to adjust its value. */
1588 if (isym->st_shndx == sec_shndx
1589 && isym->st_value > addr
1590 && isym->st_value < toaddr)
1591 isym->st_value -= count;
1592
1593 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1594 *end* is in the moved bytes but it's *start* isn't), then we
1595 must adjust its size. */
1596 if (isym->st_shndx == sec_shndx
1597 && isym->st_value < addr
1598 && isym->st_value + isym->st_size > addr
1599 && isym->st_value + isym->st_size < toaddr)
1600 isym->st_size -= count;
1601 }
1602
1603 /* Now adjust the global symbols defined in this section. */
1604 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1605 - symtab_hdr->sh_info);
1606 sym_hashes = elf_sym_hashes (abfd);
1607 end_hashes = sym_hashes + symcount;
1608
1609 for (; sym_hashes < end_hashes; sym_hashes++)
1610 {
1611 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1612
1613 if ((sym_hash->root.type == bfd_link_hash_defined
1614 || sym_hash->root.type == bfd_link_hash_defweak)
1615 && sym_hash->root.u.def.section == sec)
1616 {
1617 /* As above, adjust the value if needed. */
1618 if (sym_hash->root.u.def.value > addr
1619 && sym_hash->root.u.def.value < toaddr)
1620 sym_hash->root.u.def.value -= count;
1621
1622 /* As above, adjust the size if needed. */
1623 if (sym_hash->root.u.def.value < addr
1624 && sym_hash->root.u.def.value + sym_hash->size > addr
1625 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1626 sym_hash->size -= count;
1627 }
1628 }
1629
1630 return TRUE;
1631}
1632
1633/* Used to sort relocs by address. If relocs have the same address,
1634 we maintain their relative order, except that R_RL78_RH_RELAX
1635 alignment relocs must be the first reloc for any given address. */
1636
1637static void
1638reloc_bubblesort (Elf_Internal_Rela * r, int count)
1639{
1640 int i;
1641 bfd_boolean again;
1642 bfd_boolean swappit;
1643
1644 /* This is almost a classic bubblesort. It's the slowest sort, but
1645 we're taking advantage of the fact that the relocations are
1646 mostly in order already (the assembler emits them that way) and
1647 we need relocs with the same address to remain in the same
1648 relative order. */
1649 again = TRUE;
1650 while (again)
1651 {
1652 again = FALSE;
1653 for (i = 0; i < count - 1; i ++)
1654 {
1655 if (r[i].r_offset > r[i + 1].r_offset)
1656 swappit = TRUE;
1657 else if (r[i].r_offset < r[i + 1].r_offset)
1658 swappit = FALSE;
1659 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1660 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1661 swappit = TRUE;
1662 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1663 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1664 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1665 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1666 swappit = TRUE;
1667 else
1668 swappit = FALSE;
1669
1670 if (swappit)
1671 {
1672 Elf_Internal_Rela tmp;
1673
1674 tmp = r[i];
1675 r[i] = r[i + 1];
1676 r[i + 1] = tmp;
1677 /* If we do move a reloc back, re-scan to see if it
1678 needs to be moved even further back. This avoids
1679 most of the O(n^2) behavior for our cases. */
1680 if (i > 0)
1681 i -= 2;
1682 again = TRUE;
1683 }
1684 }
1685 }
1686}
1687
1688
1689#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1690 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1691 lrel, abfd, sec, link_info, scale)
1692
1693static bfd_vma
1694rl78_offset_for_reloc (bfd * abfd,
1695 Elf_Internal_Rela * rel,
1696 Elf_Internal_Shdr * symtab_hdr,
1697 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1698 Elf_Internal_Sym * intsyms,
1699 Elf_Internal_Rela ** lrel,
1700 bfd * input_bfd,
1701 asection * input_section,
1702 struct bfd_link_info * info,
1703 int * scale)
1704{
1705 bfd_vma symval;
1706 bfd_reloc_status_type r;
1707
1708 *scale = 1;
1709
1710 /* REL is the first of 1..N relocations. We compute the symbol
1711 value for each relocation, then combine them if needed. LREL
1712 gets a pointer to the last relocation used. */
1713 while (1)
1714 {
1715 int32_t tmp1, tmp2;
1716
1717 /* Get the value of the symbol referred to by the reloc. */
1718 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1719 {
1720 /* A local symbol. */
1721 Elf_Internal_Sym *isym;
1722 asection *ssec;
1723
1724 isym = intsyms + ELF32_R_SYM (rel->r_info);
1725
1726 if (isym->st_shndx == SHN_UNDEF)
1727 ssec = bfd_und_section_ptr;
1728 else if (isym->st_shndx == SHN_ABS)
1729 ssec = bfd_abs_section_ptr;
1730 else if (isym->st_shndx == SHN_COMMON)
1731 ssec = bfd_com_section_ptr;
1732 else
1733 ssec = bfd_section_from_elf_index (abfd,
1734 isym->st_shndx);
1735
1736 /* Initial symbol value. */
1737 symval = isym->st_value;
1738
1739 /* GAS may have made this symbol relative to a section, in
1740 which case, we have to add the addend to find the
1741 symbol. */
1742 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1743 symval += rel->r_addend;
1744
1745 if (ssec)
1746 {
1747 if ((ssec->flags & SEC_MERGE)
dbaa2011 1748 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1749 symval = _bfd_merged_section_offset (abfd, & ssec,
1750 elf_section_data (ssec)->sec_info,
1751 symval);
1752 }
1753
1754 /* Now make the offset relative to where the linker is putting it. */
1755 if (ssec)
1756 symval +=
1757 ssec->output_section->vma + ssec->output_offset;
1758
1759 symval += rel->r_addend;
1760 }
1761 else
1762 {
1763 unsigned long indx;
1764 struct elf_link_hash_entry * h;
1765
1766 /* An external symbol. */
1767 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1768 h = elf_sym_hashes (abfd)[indx];
1769 BFD_ASSERT (h != NULL);
1770
1771 if (h->root.type != bfd_link_hash_defined
1772 && h->root.type != bfd_link_hash_defweak)
1773 {
1774 /* This appears to be a reference to an undefined
1775 symbol. Just ignore it--it will be caught by the
1776 regular reloc processing. */
1777 if (lrel)
1778 *lrel = rel;
1779 return 0;
1780 }
1781
1782 symval = (h->root.u.def.value
1783 + h->root.u.def.section->output_section->vma
1784 + h->root.u.def.section->output_offset);
1785
1786 symval += rel->r_addend;
1787 }
1788
1789 switch (ELF32_R_TYPE (rel->r_info))
1790 {
1791 case R_RL78_SYM:
1792 RL78_STACK_PUSH (symval);
1793 break;
1794
1795 case R_RL78_OPneg:
1796 RL78_STACK_POP (tmp1);
1797 tmp1 = - tmp1;
1798 RL78_STACK_PUSH (tmp1);
1799 break;
1800
1801 case R_RL78_OPadd:
1802 RL78_STACK_POP (tmp1);
1803 RL78_STACK_POP (tmp2);
1804 tmp1 += tmp2;
1805 RL78_STACK_PUSH (tmp1);
1806 break;
1807
1808 case R_RL78_OPsub:
1809 RL78_STACK_POP (tmp1);
1810 RL78_STACK_POP (tmp2);
1811 tmp2 -= tmp1;
1812 RL78_STACK_PUSH (tmp2);
1813 break;
1814
1815 case R_RL78_OPmul:
1816 RL78_STACK_POP (tmp1);
1817 RL78_STACK_POP (tmp2);
1818 tmp1 *= tmp2;
1819 RL78_STACK_PUSH (tmp1);
1820 break;
1821
1822 case R_RL78_OPdiv:
1823 RL78_STACK_POP (tmp1);
1824 RL78_STACK_POP (tmp2);
1825 tmp1 /= tmp2;
1826 RL78_STACK_PUSH (tmp1);
1827 break;
1828
1829 case R_RL78_OPshla:
1830 RL78_STACK_POP (tmp1);
1831 RL78_STACK_POP (tmp2);
1832 tmp1 <<= tmp2;
1833 RL78_STACK_PUSH (tmp1);
1834 break;
1835
1836 case R_RL78_OPshra:
1837 RL78_STACK_POP (tmp1);
1838 RL78_STACK_POP (tmp2);
1839 tmp1 >>= tmp2;
1840 RL78_STACK_PUSH (tmp1);
1841 break;
1842
1843 case R_RL78_OPsctsize:
1844 RL78_STACK_PUSH (input_section->size);
1845 break;
1846
1847 case R_RL78_OPscttop:
1848 RL78_STACK_PUSH (input_section->output_section->vma);
1849 break;
1850
1851 case R_RL78_OPand:
1852 RL78_STACK_POP (tmp1);
1853 RL78_STACK_POP (tmp2);
1854 tmp1 &= tmp2;
1855 RL78_STACK_PUSH (tmp1);
1856 break;
1857
1858 case R_RL78_OPor:
1859 RL78_STACK_POP (tmp1);
1860 RL78_STACK_POP (tmp2);
1861 tmp1 |= tmp2;
1862 RL78_STACK_PUSH (tmp1);
1863 break;
1864
1865 case R_RL78_OPxor:
1866 RL78_STACK_POP (tmp1);
1867 RL78_STACK_POP (tmp2);
1868 tmp1 ^= tmp2;
1869 RL78_STACK_PUSH (tmp1);
1870 break;
1871
1872 case R_RL78_OPnot:
1873 RL78_STACK_POP (tmp1);
1874 tmp1 = ~ tmp1;
1875 RL78_STACK_PUSH (tmp1);
1876 break;
1877
1878 case R_RL78_OPmod:
1879 RL78_STACK_POP (tmp1);
1880 RL78_STACK_POP (tmp2);
1881 tmp1 %= tmp2;
1882 RL78_STACK_PUSH (tmp1);
1883 break;
1884
1885 case R_RL78_OPromtop:
1886 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1887 break;
1888
1889 case R_RL78_OPramtop:
1890 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1891 break;
1892
1893 case R_RL78_DIR16UL:
1894 case R_RL78_DIR8UL:
1895 case R_RL78_ABS16UL:
1896 case R_RL78_ABS8UL:
1897 if (rl78_stack_top)
1898 RL78_STACK_POP (symval);
1899 if (lrel)
1900 *lrel = rel;
1901 *scale = 4;
1902 return symval;
1903
1904 case R_RL78_DIR16UW:
1905 case R_RL78_DIR8UW:
1906 case R_RL78_ABS16UW:
1907 case R_RL78_ABS8UW:
1908 if (rl78_stack_top)
1909 RL78_STACK_POP (symval);
1910 if (lrel)
1911 *lrel = rel;
1912 *scale = 2;
1913 return symval;
1914
1915 default:
1916 if (rl78_stack_top)
1917 RL78_STACK_POP (symval);
1918 if (lrel)
1919 *lrel = rel;
1920 return symval;
1921 }
1922
1923 rel ++;
1924 }
1925}
1926
1927struct {
1928 int prefix; /* or -1 for "no prefix" */
1929 int insn; /* or -1 for "end of list" */
1930 int insn_for_saddr; /* or -1 for "no alternative" */
1931 int insn_for_sfr; /* or -1 for "no alternative" */
1932} relax_addr16[] = {
1933 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1934 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1935 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1936 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1937
1938 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1939 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1940 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1941 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1942 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1943 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1944 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1945 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1946
1947 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1948 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1949 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1950 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1951 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1952
1953 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1954 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1955 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1956 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1957
1958 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1959 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1960 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1961
1962 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1963 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1964 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1965 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1966 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1967 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1968
1969 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1970
1971 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1972 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1973 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1974 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1975 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1976 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1977 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1978 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1979
1980 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1981 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1982 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1983 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1984 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1985 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1986 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1987 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 1988
9cea966c
DD		 1989 { -1, -1, -1, -1 }
1990};
1991
1992/* Relax one section. */
1993
99c513f6
DD		 1994static bfd_boolean
1995rl78_elf_relax_section
1996 (bfd * abfd,
1997 asection * sec,
1998 struct bfd_link_info * link_info,
1999 bfd_boolean * again)
2000{
9cea966c
DD		 2001 Elf_Internal_Shdr * symtab_hdr;
2002 Elf_Internal_Shdr * shndx_hdr;
2003 Elf_Internal_Rela * internal_relocs;
2004 Elf_Internal_Rela * free_relocs = NULL;
2005 Elf_Internal_Rela * irel;
2006 Elf_Internal_Rela * srel;
2007 Elf_Internal_Rela * irelend;
2008 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 2009 bfd_byte * contents = NULL;
2010 bfd_byte * free_contents = NULL;
2011 Elf_Internal_Sym * intsyms = NULL;
2012 Elf_Internal_Sym * free_intsyms = NULL;
2013 Elf_External_Sym_Shndx * shndx_buf = NULL;
2014 bfd_vma pc;
9cea966c
DD		 2015 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2016 int pcrel ATTRIBUTE_UNUSED = 0;
2017 int code ATTRIBUTE_UNUSED = 0;
2018 int section_alignment_glue;
2019 int scale;
2020
99c513f6
DD		 2021 if (abfd == elf_hash_table (link_info)->dynobj
2022 && strcmp (sec->name, ".plt") == 0)
2023 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2024
2025 /* Assume nothing changes. */
2026 *again = FALSE;
9cea966c
DD		 2027
2028 /* We don't have to do anything for a relocatable link, if
2029 this section does not have relocs, or if this is not a
2030 code section. */
2031 if (link_info->relocatable
2032 || (sec->flags & SEC_RELOC) == 0
2033 || sec->reloc_count == 0
2034 || (sec->flags & SEC_CODE) == 0)
2035 return TRUE;
2036
2037 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2038 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2039
9cea966c
DD		 2040 /* Get the section contents. */
2041 if (elf_section_data (sec)->this_hdr.contents != NULL)
2042 contents = elf_section_data (sec)->this_hdr.contents;
2043 /* Go get them off disk. */
2044 else
2045 {
2046 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2047 goto error_return;
2048 elf_section_data (sec)->this_hdr.contents = contents;
2049 }
2050
2051 /* Read this BFD's symbols. */
2052 /* Get cached copy if it exists. */
2053 if (symtab_hdr->contents != NULL)
2054 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2055 else
2056 {
2057 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2058 symtab_hdr->contents = (bfd_byte *) intsyms;
2059 }
2060
2061 if (shndx_hdr->sh_size != 0)
2062 {
2063 bfd_size_type amt;
2064
2065 amt = symtab_hdr->sh_info;
2066 amt *= sizeof (Elf_External_Sym_Shndx);
2067 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2068 if (shndx_buf == NULL)
2069 goto error_return;
2070 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2071 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2072 goto error_return;
2073 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2074 }
2075
2076 /* Get a copy of the native relocations. */
2077 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2078 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2079 link_info->keep_memory));
2080 if (internal_relocs == NULL)
2081 goto error_return;
2082 if (! link_info->keep_memory)
2083 free_relocs = internal_relocs;
2084
2085 /* The RL_ relocs must be just before the operand relocs they go
2086 with, so we must sort them to guarantee this. We use bubblesort
2087 instead of qsort so we can guarantee that relocs with the same
2088 address remain in the same relative order. */
2089 reloc_bubblesort (internal_relocs, sec->reloc_count);
2090
2091 /* Walk through them looking for relaxing opportunities. */
2092 irelend = internal_relocs + sec->reloc_count;
2093
2094
2095 /* This will either be NULL or a pointer to the next alignment
2096 relocation. */
2097 next_alignment = internal_relocs;
9cea966c
DD		 2098
2099 /* We calculate worst case shrinkage caused by alignment directives.
2100 No fool-proof, but better than either ignoring the problem or
2101 doing heavy duty analysis of all the alignment markers in all
2102 input sections. */
2103 section_alignment_glue = 0;
2104 for (irel = internal_relocs; irel < irelend; irel++)
2105 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2106 && irel->r_addend & RL78_RELAXA_ALIGN)
2107 {
2108 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2109
2110 if (section_alignment_glue < this_glue)
2111 section_alignment_glue = this_glue;
2112 }
2113 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2114 shrinkage. */
2115 section_alignment_glue *= 2;
2116
2117 for (irel = internal_relocs; irel < irelend; irel++)
2118 {
2119 unsigned char *insn;
2120 int nrelocs;
2121
2122 /* The insns we care about are all marked with one of these. */
2123 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2124 continue;
2125
2126 if (irel->r_addend & RL78_RELAXA_ALIGN
2127 || next_alignment == internal_relocs)
2128 {
2129 /* When we delete bytes, we need to maintain all the alignments
2130 indicated. In addition, we need to be careful about relaxing
2131 jumps across alignment boundaries - these displacements
2132 *grow* when we delete bytes. For now, don't shrink
2133 displacements across an alignment boundary, just in case.
2134 Note that this only affects relocations to the same
2135 section. */
9cea966c
DD		 2136 next_alignment += 2;
2137 while (next_alignment < irelend
2138 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2139 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2140 next_alignment ++;
2141 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2142 next_alignment = NULL;
2143 }
2144
2145 /* When we hit alignment markers, see if we've shrunk enough
2146 before them to reduce the gap without violating the alignment
2147 requirements. */
2148 if (irel->r_addend & RL78_RELAXA_ALIGN)
2149 {
2150 /* At this point, the next relocation *should* be the ELIGN
2151 end marker. */
2152 Elf_Internal_Rela *erel = irel + 1;
2153 unsigned int alignment, nbytes;
2154
2155 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2156 continue;
2157 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2158 continue;
2159
2160 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2161
2162 if (erel->r_offset - irel->r_offset < alignment)
2163 continue;
2164
2165 nbytes = erel->r_offset - irel->r_offset;
2166 nbytes /= alignment;
2167 nbytes *= alignment;
2168
1740ba0c
NC		 2169 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2170 next_alignment, erel->r_offset == sec->size);
9cea966c
DD		 2171 *again = TRUE;
2172
2173 continue;
2174 }
2175
2176 if (irel->r_addend & RL78_RELAXA_ELIGN)
2177 continue;
2178
2179 insn = contents + irel->r_offset;
2180
2181 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2182
2183 /* At this point, we have an insn that is a candidate for linker
2184 relaxation. There are NRELOCS relocs following that may be
2185 relaxed, although each reloc may be made of more than one
2186 reloc entry (such as gp-rel symbols). */
2187
2188 /* Get the value of the symbol referred to by the reloc. Just
2189 in case this is the last reloc in the list, use the RL's
2190 addend to choose between this reloc (no addend) or the next
2191 (yes addend, which means at least one following reloc). */
2192
2193 /* srel points to the "current" reloction for this insn -
2194 actually the last reloc for a given operand, which is the one
2195 we need to update. We check the relaxations in the same
2196 order that the relocations happen, so we'll just push it
2197 along as we go. */
2198 srel = irel;
2199
2200 pc = sec->output_section->vma + sec->output_offset
2201 + srel->r_offset;
2202
1740ba0c
NC		 2203#define GET_RELOC \
2204 BFD_ASSERT (nrelocs > 0); \
2205 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2206 pcrel = symval - pc + srel->r_addend; \
9cea966c
DD		 2207 nrelocs --;
2208
2209#define SNIPNR(offset, nbytes) \
2210 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
1740ba0c
NC		 2211
2212#define SNIP(offset, nbytes, newtype) \
2213 SNIPNR (offset, nbytes); \
9cea966c
DD		 2214 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2215
2216 /* The order of these bit tests must match the order that the
2217 relocs appear in. Since we sorted those by offset, we can
2218 predict them. */
2219
2220 /*----------------------------------------------------------------------*/
2221 /* EF ad BR $rel8 pcrel
2222 ED al ah BR !abs16 abs
2223 EE al ah BR $!rel16 pcrel
2224 EC al ah as BR !!abs20 abs
2225
2226 FD al ah CALL !abs16 abs
2227 FE al ah CALL $!rel16 pcrel
2228 FC al ah as CALL !!abs20 abs
2229
2230 DC ad BC $rel8
2231 DE ad BNC $rel8
2232 DD ad BZ $rel8
2233 DF ad BNZ $rel8
2234 61 C3 ad BH $rel8
2235 61 D3 ad BNH $rel8
2236 61 C8 EF ad SKC ; BR $rel8
2237 61 D8 EF ad SKNC ; BR $rel8
2238 61 E8 EF ad SKZ ; BR $rel8
2239 61 F8 EF ad SKNZ ; BR $rel8
2240 61 E3 EF ad SKH ; BR $rel8
2241 61 F3 EF ad SKNH ; BR $rel8
2242 */
2243
32e79d39 2244 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
9cea966c 2245 {
1122dc88
DD		 2246 /* SKIP opcodes that skip non-branches will have a relax tag
2247 but no corresponding symbol to relax against; we just
2248 skip those. */
2249 if (irel->r_addend & RL78_RELAXA_RNUM)
2250 {
2251 GET_RELOC;
2252 }
9cea966c
DD		 2253
2254 switch (insn[0])
2255 {
2256 case 0xec: /* BR !!abs20 */
2257
2258 if (pcrel < 127
2259 && pcrel > -127)
2260 {
2261 insn[0] = 0xef;
2262 insn[1] = pcrel;
2263 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2264 *again = TRUE;
2265 }
2266 else if (symval < 65536)
2267 {
2268 insn[0] = 0xed;
2269 insn[1] = symval & 0xff;
2270 insn[2] = symval >> 8;
2271 SNIP (2, 1, R_RL78_DIR16S);
2272 *again = TRUE;
2273 }
2274 else if (pcrel < 32767
2275 && pcrel > -32767)
2276 {
2277 insn[0] = 0xee;
2278 insn[1] = pcrel & 0xff;
2279 insn[2] = pcrel >> 8;
2280 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2281 *again = TRUE;
2282 }
2283 break;
2284
2285 case 0xee: /* BR $!pcrel16 */
2286 case 0xed: /* BR $!abs16 */
2287 if (pcrel < 127
2288 && pcrel > -127)
2289 {
2290 insn[0] = 0xef;
2291 insn[1] = pcrel;
2292 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2293 *again = TRUE;
2294 }
2295 break;
2296
2297 case 0xfc: /* CALL !!abs20 */
2298 if (symval < 65536)
2299 {
2300 insn[0] = 0xfd;
2301 insn[1] = symval & 0xff;
2302 insn[2] = symval >> 8;
2303 SNIP (2, 1, R_RL78_DIR16S);
2304 *again = TRUE;
2305 }
2306 else if (pcrel < 32767
2307 && pcrel > -32767)
2308 {
2309 insn[0] = 0xfe;
2310 insn[1] = pcrel & 0xff;
2311 insn[2] = pcrel >> 8;
2312 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2313 *again = TRUE;
2314 }
2315 break;
2316
2317 case 0x61: /* PREFIX */
2318 /* For SKIP/BR, we change the BR opcode and delete the
2319 SKIP. That way, we don't have to find and change the
2320 relocation for the BR. */
1122dc88
DD		 2321 /* Note that, for the case where we're skipping some
2322 other insn, we have no "other" reloc but that's safe
2323 here anyway. */
9cea966c
DD		 2324 switch (insn[1])
2325 {
2326 case 0xc8: /* SKC */
2327 if (insn[2] == 0xef)
2328 {
2329 insn[2] = 0xde; /* BNC */
2330 SNIPNR (0, 2);
2331 }
2332 break;
2333
2334 case 0xd8: /* SKNC */
2335 if (insn[2] == 0xef)
2336 {
2337 insn[2] = 0xdc; /* BC */
2338 SNIPNR (0, 2);
2339 }
2340 break;
2341
2342 case 0xe8: /* SKZ */
2343 if (insn[2] == 0xef)
2344 {
2345 insn[2] = 0xdf; /* BNZ */
2346 SNIPNR (0, 2);
2347 }
2348 break;
2349
2350 case 0xf8: /* SKNZ */
2351 if (insn[2] == 0xef)
2352 {
2353 insn[2] = 0xdd; /* BZ */
2354 SNIPNR (0, 2);
2355 }
2356 break;
2357
2358 case 0xe3: /* SKH */
2359 if (insn[2] == 0xef)
2360 {
2361 insn[2] = 0xd3; /* BNH */
2362 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2363 }
2364 break;
2365
2366 case 0xf3: /* SKNH */
2367 if (insn[2] == 0xef)
2368 {
2369 insn[2] = 0xc3; /* BH */
2370 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2371 }
2372 break;
2373 }
2374 break;
2375 }
9cea966c
DD		 2376 }
2377
71eef2bd
DD		 2378 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2379 && nrelocs > 0)
9cea966c
DD		 2380 {
2381 /*----------------------------------------------------------------------*/
2382 /* Some insns have both a 16-bit address operand and an 8-bit
2383 variant if the address is within a special range:
2384
2385 Address 16-bit operand SADDR range SFR range
2386 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2387 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2388
2389 The RELAX_ADDR16[] array has the insn encodings for the
2390 16-bit operand version, as well as the SFR and SADDR
2391 variants. We only need to replace the encodings and
2392 adjust the operand.
2393
2394 Note: we intentionally do not attempt to decode and skip
2395 any ES: prefix, as adding ES: means the addr16 (likely)
2396 no longer points to saddr/sfr space.
2397 */
2398
2399 int is_sfr;
2400 int is_saddr;
2401 int idx;
2402 int poff;
2403
2404 GET_RELOC;
2405
9cea966c
DD		 2406 if (0xffe20 <= symval && symval <= 0xfffff)
2407 {
2408
2409 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2410 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2411
2412 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2413 {
2414 if (relax_addr16[idx].prefix != -1
2415 && insn[0] == relax_addr16[idx].prefix
2416 && insn[1] == relax_addr16[idx].insn)
2417 {
2418 poff = 1;
2419 }
2420 else if (relax_addr16[idx].prefix == -1
2421 && insn[0] == relax_addr16[idx].insn)
2422 {
2423 poff = 0;
2424 }
2425 else
2426 continue;
2427
2428 /* We have a matched insn, and poff is 0 or 1 depending
2429 on the base pattern size. */
2430
2431 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2432 {
2433 insn[poff] = relax_addr16[idx].insn_for_sfr;
2434 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2435 }
2436
2437 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2438 {
2439 insn[poff] = relax_addr16[idx].insn_for_saddr;
2440 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2441 }
9cea966c
DD		 2442 }
2443 }
2444 }
9cea966c 2445 /*----------------------------------------------------------------------*/
9cea966c
DD		 2446 }
2447
2448 return TRUE;
2449
2450 error_return:
2451 if (free_relocs != NULL)
2452 free (free_relocs);
2453
2454 if (free_contents != NULL)
2455 free (free_contents);
2456
2457 if (shndx_buf != NULL)
2458 {
2459 shndx_hdr->contents = NULL;
2460 free (shndx_buf);
2461 }
2462
2463 if (free_intsyms != NULL)
2464 free (free_intsyms);
2465
99c513f6
DD		 2466 return TRUE;
2467}
2468
2469\f
2470
2471#define ELF_ARCH bfd_arch_rl78
2472#define ELF_MACHINE_CODE EM_RL78
2473#define ELF_MAXPAGESIZE 0x1000
2474
6d00b590 2475#define TARGET_LITTLE_SYM rl78_elf32_vec
99c513f6
DD		 2476#define TARGET_LITTLE_NAME "elf32-rl78"
2477
2478#define elf_info_to_howto_rel NULL
2479#define elf_info_to_howto rl78_info_to_howto_rela
2480#define elf_backend_object_p rl78_elf_object_p
2481#define elf_backend_relocate_section rl78_elf_relocate_section
2482#define elf_symbol_leading_char ('_')
2483#define elf_backend_can_gc_sections 1
2484
2485#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2486#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2487#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2488#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2489#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2490
2491#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2492#define elf_backend_check_relocs rl78_elf_check_relocs
2493#define elf_backend_always_size_sections \
2494 rl78_elf_always_size_sections
2495#define elf_backend_finish_dynamic_sections \
2496 rl78_elf_finish_dynamic_sections
2497
2498#include "elf32-target.h"
GDB Binutils - Deliverables
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