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* elf32-rl78.c (rl78_elf_finish_dynamic_sections): Onlly run
[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
CommitLineData
99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
dbaa2011 2 Copyright (C) 2011, 2012
99c513f6
DD		 3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "sysdep.h"
22#include "bfd.h"
23#include "bfd_stdint.h"
24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/rl78.h"
27#include "libiberty.h"
28
29#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
30
31#define RL78REL(n,sz,bit,shift,complain,pcrel) \
32 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
33 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
34
35/* Note that the relocations around 0x7f are internal to this file;
36 feel free to move them as needed to avoid conflicts with published
37 relocation numbers. */
38
39static reloc_howto_type rl78_elf_howto_table [] =
40{
41 RL78REL (NONE, 0, 0, 0, dont, FALSE),
42 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
43 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
44 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
45 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
46 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
47 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
48 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
49 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
50 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
51 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
52 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
53 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
54 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
55 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
56 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
57 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
59 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
60
61 EMPTY_HOWTO (0x13),
62 EMPTY_HOWTO (0x14),
63 EMPTY_HOWTO (0x15),
64 EMPTY_HOWTO (0x16),
65 EMPTY_HOWTO (0x17),
66 EMPTY_HOWTO (0x18),
67 EMPTY_HOWTO (0x19),
68 EMPTY_HOWTO (0x1a),
69 EMPTY_HOWTO (0x1b),
70 EMPTY_HOWTO (0x1c),
71 EMPTY_HOWTO (0x1d),
72 EMPTY_HOWTO (0x1e),
73 EMPTY_HOWTO (0x1f),
74
75 EMPTY_HOWTO (0x20),
76 EMPTY_HOWTO (0x21),
77 EMPTY_HOWTO (0x22),
78 EMPTY_HOWTO (0x23),
79 EMPTY_HOWTO (0x24),
80 EMPTY_HOWTO (0x25),
81 EMPTY_HOWTO (0x26),
82 EMPTY_HOWTO (0x27),
83 EMPTY_HOWTO (0x28),
84 EMPTY_HOWTO (0x29),
85 EMPTY_HOWTO (0x2a),
86 EMPTY_HOWTO (0x2b),
87 EMPTY_HOWTO (0x2c),
9cea966c 88 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 89
90 EMPTY_HOWTO (0x2e),
91 EMPTY_HOWTO (0x2f),
92 EMPTY_HOWTO (0x30),
93 EMPTY_HOWTO (0x31),
94 EMPTY_HOWTO (0x32),
95 EMPTY_HOWTO (0x33),
96 EMPTY_HOWTO (0x34),
97 EMPTY_HOWTO (0x35),
98 EMPTY_HOWTO (0x36),
99 EMPTY_HOWTO (0x37),
100 EMPTY_HOWTO (0x38),
101 EMPTY_HOWTO (0x39),
102 EMPTY_HOWTO (0x3a),
103 EMPTY_HOWTO (0x3b),
104 EMPTY_HOWTO (0x3c),
105 EMPTY_HOWTO (0x3d),
106 EMPTY_HOWTO (0x3e),
107 EMPTY_HOWTO (0x3f),
108 EMPTY_HOWTO (0x40),
109
110 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
111 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
112 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
113 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
114 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
115 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
116 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
117 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
118 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
119 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
120 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
121 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
123 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
125 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
126 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
127
128#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
129
130 EMPTY_HOWTO (0x52),
131 EMPTY_HOWTO (0x53),
132 EMPTY_HOWTO (0x54),
133 EMPTY_HOWTO (0x55),
134 EMPTY_HOWTO (0x56),
135 EMPTY_HOWTO (0x57),
136 EMPTY_HOWTO (0x58),
137 EMPTY_HOWTO (0x59),
138 EMPTY_HOWTO (0x5a),
139 EMPTY_HOWTO (0x5b),
140 EMPTY_HOWTO (0x5c),
141 EMPTY_HOWTO (0x5d),
142 EMPTY_HOWTO (0x5e),
143 EMPTY_HOWTO (0x5f),
144 EMPTY_HOWTO (0x60),
145 EMPTY_HOWTO (0x61),
146 EMPTY_HOWTO (0x62),
147 EMPTY_HOWTO (0x63),
148 EMPTY_HOWTO (0x64),
149 EMPTY_HOWTO (0x65),
150 EMPTY_HOWTO (0x66),
151 EMPTY_HOWTO (0x67),
152 EMPTY_HOWTO (0x68),
153 EMPTY_HOWTO (0x69),
154 EMPTY_HOWTO (0x6a),
155 EMPTY_HOWTO (0x6b),
156 EMPTY_HOWTO (0x6c),
157 EMPTY_HOWTO (0x6d),
158 EMPTY_HOWTO (0x6e),
159 EMPTY_HOWTO (0x6f),
160 EMPTY_HOWTO (0x70),
161 EMPTY_HOWTO (0x71),
162 EMPTY_HOWTO (0x72),
163 EMPTY_HOWTO (0x73),
164 EMPTY_HOWTO (0x74),
165 EMPTY_HOWTO (0x75),
166 EMPTY_HOWTO (0x76),
167 EMPTY_HOWTO (0x77),
168
169 EMPTY_HOWTO (0x78),
170 EMPTY_HOWTO (0x79),
171 EMPTY_HOWTO (0x7a),
172 EMPTY_HOWTO (0x7b),
173 EMPTY_HOWTO (0x7c),
174 EMPTY_HOWTO (0x7d),
175 EMPTY_HOWTO (0x7e),
176 EMPTY_HOWTO (0x7f),
177
178 RL78REL (SYM, 2, 32, 0, dont, FALSE),
179 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
180 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
181 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
182 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
183 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
185 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
186 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
187 EMPTY_HOWTO (0x89),
188 EMPTY_HOWTO (0x8a),
189 EMPTY_HOWTO (0x8b),
190 EMPTY_HOWTO (0x8c),
191 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
192 EMPTY_HOWTO (0x8e),
193 EMPTY_HOWTO (0x8f),
194 RL78REL (OPand, 2, 32, 0, dont, FALSE),
195 RL78REL (OPor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
197 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
198 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
199 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
200 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
201};
202\f
203/* Map BFD reloc types to RL78 ELF reloc types. */
204
205struct rl78_reloc_map
206{
207 bfd_reloc_code_real_type bfd_reloc_val;
208 unsigned int rl78_reloc_val;
209};
210
211static const struct rl78_reloc_map rl78_reloc_map [] =
212{
213 { BFD_RELOC_NONE, R_RL78_NONE },
214 { BFD_RELOC_8, R_RL78_DIR8S },
215 { BFD_RELOC_16, R_RL78_DIR16S },
216 { BFD_RELOC_24, R_RL78_DIR24S },
217 { BFD_RELOC_32, R_RL78_DIR32 },
218 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
219 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
220 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
221 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
222 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
223 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
224 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
225 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
226 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
227 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
228 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
229 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
230 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
231 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
232 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
233 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
234 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
235 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
236 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c
DD		 237 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
238 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 239};
240
241static reloc_howto_type *
242rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
243 bfd_reloc_code_real_type code)
244{
245 unsigned int i;
246
247 if (code == BFD_RELOC_RL78_32_OP)
248 return rl78_elf_howto_table + R_RL78_DIR32;
249
250 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
251 if (rl78_reloc_map [i].bfd_reloc_val == code)
252 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
253
254 return NULL;
255}
256
257static reloc_howto_type *
258rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
259{
260 unsigned int i;
261
262 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
263 if (rl78_elf_howto_table[i].name != NULL
264 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
265 return rl78_elf_howto_table + i;
266
267 return NULL;
268}
269
270/* Set the howto pointer for an RL78 ELF reloc. */
271
272static void
273rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
274 arelent * cache_ptr,
275 Elf_Internal_Rela * dst)
276{
277 unsigned int r_type;
278
279 r_type = ELF32_R_TYPE (dst->r_info);
280 BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
281 cache_ptr->howto = rl78_elf_howto_table + r_type;
282}
283\f
284static bfd_vma
285get_symbol_value (const char * name,
286 bfd_reloc_status_type * status,
287 struct bfd_link_info * info,
288 bfd * input_bfd,
289 asection * input_section,
290 int offset)
291{
292 bfd_vma value = 0;
293 struct bfd_link_hash_entry * h;
294
295 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
296
297 if (h == NULL
298 || (h->type != bfd_link_hash_defined
299 && h->type != bfd_link_hash_defweak))
300 * status = info->callbacks->undefined_symbol
301 (info, name, input_bfd, input_section, offset, TRUE);
302 else
303 value = (h->u.def.value
304 + h->u.def.section->output_section->vma
305 + h->u.def.section->output_offset);
306
307 return value;
308}
309
310static bfd_vma
311get_romstart (bfd_reloc_status_type * status,
312 struct bfd_link_info * info,
313 bfd * abfd,
314 asection * sec,
315 int offset)
316{
317 static bfd_boolean cached = FALSE;
318 static bfd_vma cached_value = 0;
319
320 if (!cached)
321 {
322 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
323 cached = TRUE;
324 }
325 return cached_value;
326}
327
328static bfd_vma
329get_ramstart (bfd_reloc_status_type * status,
330 struct bfd_link_info * info,
331 bfd * abfd,
332 asection * sec,
333 int offset)
334{
335 static bfd_boolean cached = FALSE;
336 static bfd_vma cached_value = 0;
337
338 if (!cached)
339 {
340 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
341 cached = TRUE;
342 }
343 return cached_value;
344}
345
346#define NUM_STACK_ENTRIES 16
347static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
348static unsigned int rl78_stack_top;
349
350#define RL78_STACK_PUSH(val) \
351 do \
352 { \
353 if (rl78_stack_top < NUM_STACK_ENTRIES) \
354 rl78_stack [rl78_stack_top ++] = (val); \
355 else \
356 r = bfd_reloc_dangerous; \
357 } \
358 while (0)
359
360#define RL78_STACK_POP(dest) \
361 do \
362 { \
363 if (rl78_stack_top > 0) \
364 (dest) = rl78_stack [-- rl78_stack_top]; \
365 else \
366 (dest) = 0, r = bfd_reloc_dangerous; \
367 } \
368 while (0)
369
370/* Relocate an RL78 ELF section.
371 There is some attempt to make this function usable for many architectures,
372 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
373 if only to serve as a learning tool.
374
375 The RELOCATE_SECTION function is called by the new ELF backend linker
376 to handle the relocations for a section.
377
378 The relocs are always passed as Rela structures; if the section
379 actually uses Rel structures, the r_addend field will always be
380 zero.
381
382 This function is responsible for adjusting the section contents as
383 necessary, and (if using Rela relocs and generating a relocatable
384 output file) adjusting the reloc addend as necessary.
385
386 This function does not have to worry about setting the reloc
387 address or the reloc symbol index.
388
389 LOCAL_SYMS is a pointer to the swapped in local symbols.
390
391 LOCAL_SECTIONS is an array giving the section in the input file
392 corresponding to the st_shndx field of each local symbol.
393
394 The global hash table entry for the global symbols can be found
395 via elf_sym_hashes (input_bfd).
396
397 When generating relocatable output, this function must handle
398 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
399 going to be the section symbol corresponding to the output
400 section, which means that the addend must be adjusted
401 accordingly. */
402
403static bfd_boolean
404rl78_elf_relocate_section
405 (bfd * output_bfd,
406 struct bfd_link_info * info,
407 bfd * input_bfd,
408 asection * input_section,
409 bfd_byte * contents,
410 Elf_Internal_Rela * relocs,
411 Elf_Internal_Sym * local_syms,
412 asection ** local_sections)
413{
414 Elf_Internal_Shdr * symtab_hdr;
415 struct elf_link_hash_entry ** sym_hashes;
416 Elf_Internal_Rela * rel;
417 Elf_Internal_Rela * relend;
418 bfd *dynobj;
419 asection *splt;
420
421 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
422 sym_hashes = elf_sym_hashes (input_bfd);
423 relend = relocs + input_section->reloc_count;
424
425 dynobj = elf_hash_table (info)->dynobj;
426 splt = NULL;
427 if (dynobj != NULL)
3d4d4302 428 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 429
430 for (rel = relocs; rel < relend; rel ++)
431 {
432 reloc_howto_type * howto;
433 unsigned long r_symndx;
434 Elf_Internal_Sym * sym;
435 asection * sec;
436 struct elf_link_hash_entry * h;
437 bfd_vma relocation;
438 bfd_reloc_status_type r;
439 const char * name = NULL;
440 bfd_boolean unresolved_reloc = TRUE;
441 int r_type;
442
443 r_type = ELF32_R_TYPE (rel->r_info);
444 r_symndx = ELF32_R_SYM (rel->r_info);
445
446 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
447 h = NULL;
448 sym = NULL;
449 sec = NULL;
450 relocation = 0;
451
452 if (r_symndx < symtab_hdr->sh_info)
453 {
454 sym = local_syms + r_symndx;
455 sec = local_sections [r_symndx];
456 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
457
458 name = bfd_elf_string_from_elf_section
459 (input_bfd, symtab_hdr->sh_link, sym->st_name);
460 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
461 }
462 else
463 {
464 bfd_boolean warned;
465
466 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
467 r_symndx, symtab_hdr, sym_hashes, h,
468 sec, relocation, unresolved_reloc,
469 warned);
470
471 name = h->root.root.string;
472 }
473
dbaa2011 474 if (sec != NULL && discarded_section (sec))
99c513f6 475 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 476 rel, 1, relend, howto, 0, contents);
99c513f6
DD		 477
478 if (info->relocatable)
479 {
480 /* This is a relocatable link. We don't have to change
481 anything, unless the reloc is against a section symbol,
482 in which case we have to adjust according to where the
483 section symbol winds up in the output section. */
484 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
485 rel->r_addend += sec->output_offset;
486 continue;
487 }
488
489 switch (ELF32_R_TYPE (rel->r_info))
490 {
491 case R_RL78_DIR16S:
492 {
493 bfd_vma *plt_offset;
494
495 if (h != NULL)
496 plt_offset = &h->plt.offset;
497 else
498 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
499
9cea966c 500 if (! valid_16bit_address (relocation))
99c513f6 501 {
99c513f6
DD		 502 /* If this is the first time we've processed this symbol,
503 fill in the plt entry with the correct symbol address. */
504 if ((*plt_offset & 1) == 0)
505 {
506 unsigned int x;
507
508 x = 0x000000ec; /* br !!abs24 */
509 x |= (relocation << 8) & 0xffffff00;
510 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
511 *plt_offset |= 1;
512 }
513
514 relocation = (splt->output_section->vma
515 + splt->output_offset
516 + (*plt_offset & -2));
517 if (name)
518 {
519 char *newname = bfd_malloc (strlen(name)+5);
520 strcpy (newname, name);
521 strcat(newname, ".plt");
522 _bfd_generic_link_add_one_symbol (info,
523 input_bfd,
524 newname,
525 BSF_FUNCTION | BSF_WEAK,
526 splt,
527 (*plt_offset & -2),
528 0,
529 1,
530 0,
531 0);
532 }
533 }
534 }
535 break;
536 }
537
538 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
539 /* If the symbol is undefined and weak
540 then the relocation resolves to zero. */
541 relocation = 0;
542 else
543 {
544 if (howto->pc_relative)
545 {
546 relocation -= (input_section->output_section->vma
547 + input_section->output_offset
548 + rel->r_offset);
549 relocation -= bfd_get_reloc_size (howto);
550 }
551
552 relocation += rel->r_addend;
553 }
554
555 r = bfd_reloc_ok;
556
557#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
558#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
559#define OP(i) (contents[rel->r_offset + (i)])
560
561 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
562 switch (r_type)
563 {
564 case R_RL78_NONE:
565 break;
566
9cea966c
DD		 567 case R_RL78_RH_RELAX:
568 break;
569
99c513f6
DD		 570 case R_RL78_DIR8S_PCREL:
571 RANGE (-128, 127);
572 OP (0) = relocation;
573 break;
574
575 case R_RL78_DIR8S:
576 RANGE (-128, 255);
577 OP (0) = relocation;
578 break;
579
580 case R_RL78_DIR8U:
581 RANGE (0, 255);
582 OP (0) = relocation;
583 break;
584
585 case R_RL78_DIR16S_PCREL:
586 RANGE (-32768, 32767);
587 OP (0) = relocation;
588 OP (1) = relocation >> 8;
589 break;
590
591 case R_RL78_DIR16S:
592 if ((relocation & 0xf0000) == 0xf0000)
593 relocation &= 0xffff;
594 RANGE (-32768, 65535);
595 OP (0) = relocation;
596 OP (1) = relocation >> 8;
597 break;
598
599 case R_RL78_DIR16U:
600 RANGE (0, 65536);
601 OP (0) = relocation;
602 OP (1) = relocation >> 8;
603 break;
604
605 case R_RL78_DIR16:
606 RANGE (-32768, 65536);
607 OP (0) = relocation;
608 OP (1) = relocation >> 8;
609 break;
610
611 case R_RL78_DIR16_REV:
612 RANGE (-32768, 65536);
613 OP (1) = relocation;
614 OP (0) = relocation >> 8;
615 break;
616
617 case R_RL78_DIR3U_PCREL:
618 RANGE (3, 10);
619 OP (0) &= 0xf8;
620 OP (0) |= relocation & 0x07;
621 break;
622
623 case R_RL78_DIR24S_PCREL:
624 RANGE (-0x800000, 0x7fffff);
625 OP (0) = relocation;
626 OP (1) = relocation >> 8;
627 OP (2) = relocation >> 16;
628 break;
629
630 case R_RL78_DIR24S:
631 RANGE (-0x800000, 0x7fffff);
632 OP (0) = relocation;
633 OP (1) = relocation >> 8;
634 OP (2) = relocation >> 16;
635 break;
636
637 case R_RL78_DIR32:
638 OP (0) = relocation;
639 OP (1) = relocation >> 8;
640 OP (2) = relocation >> 16;
641 OP (3) = relocation >> 24;
642 break;
643
644 case R_RL78_DIR32_REV:
645 OP (3) = relocation;
646 OP (2) = relocation >> 8;
647 OP (1) = relocation >> 16;
648 OP (0) = relocation >> 24;
649 break;
650
9cea966c 651 case R_RL78_RH_SFR:
9cea966c
DD		 652 RANGE (0xfff00, 0xfffff);
653 OP (0) = relocation & 0xff;
654 break;
655
656 case R_RL78_RH_SADDR:
9cea966c
DD		 657 RANGE (0xffe20, 0xfff1f);
658 OP (0) = relocation & 0xff;
9cea966c
DD		 659 break;
660
99c513f6
DD		 661 /* Complex reloc handling: */
662
663 case R_RL78_ABS32:
664 RL78_STACK_POP (relocation);
665 OP (0) = relocation;
666 OP (1) = relocation >> 8;
667 OP (2) = relocation >> 16;
668 OP (3) = relocation >> 24;
669 break;
670
671 case R_RL78_ABS32_REV:
672 RL78_STACK_POP (relocation);
673 OP (3) = relocation;
674 OP (2) = relocation >> 8;
675 OP (1) = relocation >> 16;
676 OP (0) = relocation >> 24;
677 break;
678
679 case R_RL78_ABS24S_PCREL:
680 case R_RL78_ABS24S:
681 RL78_STACK_POP (relocation);
682 RANGE (-0x800000, 0x7fffff);
683 OP (0) = relocation;
684 OP (1) = relocation >> 8;
685 OP (2) = relocation >> 16;
686 break;
687
688 case R_RL78_ABS16:
689 RL78_STACK_POP (relocation);
690 RANGE (-32768, 65535);
691 OP (0) = relocation;
692 OP (1) = relocation >> 8;
693 break;
694
695 case R_RL78_ABS16_REV:
696 RL78_STACK_POP (relocation);
697 RANGE (-32768, 65535);
698 OP (1) = relocation;
699 OP (0) = relocation >> 8;
700 break;
701
702 case R_RL78_ABS16S_PCREL:
703 case R_RL78_ABS16S:
704 RL78_STACK_POP (relocation);
705 RANGE (-32768, 32767);
706 OP (0) = relocation;
707 OP (1) = relocation >> 8;
708 break;
709
710 case R_RL78_ABS16U:
711 RL78_STACK_POP (relocation);
712 RANGE (0, 65536);
713 OP (0) = relocation;
714 OP (1) = relocation >> 8;
715 break;
716
717 case R_RL78_ABS16UL:
718 RL78_STACK_POP (relocation);
719 relocation >>= 2;
720 RANGE (0, 65536);
721 OP (0) = relocation;
722 OP (1) = relocation >> 8;
723 break;
724
725 case R_RL78_ABS16UW:
726 RL78_STACK_POP (relocation);
727 relocation >>= 1;
728 RANGE (0, 65536);
729 OP (0) = relocation;
730 OP (1) = relocation >> 8;
731 break;
732
733 case R_RL78_ABS8:
734 RL78_STACK_POP (relocation);
735 RANGE (-128, 255);
736 OP (0) = relocation;
737 break;
738
739 case R_RL78_ABS8U:
740 RL78_STACK_POP (relocation);
741 RANGE (0, 255);
742 OP (0) = relocation;
743 break;
744
745 case R_RL78_ABS8UL:
746 RL78_STACK_POP (relocation);
747 relocation >>= 2;
748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RL78_ABS8UW:
753 RL78_STACK_POP (relocation);
754 relocation >>= 1;
755 RANGE (0, 255);
756 OP (0) = relocation;
757 break;
758
759 case R_RL78_ABS8S_PCREL:
760 case R_RL78_ABS8S:
761 RL78_STACK_POP (relocation);
762 RANGE (-128, 127);
763 OP (0) = relocation;
764 break;
765
766 case R_RL78_SYM:
767 if (r_symndx < symtab_hdr->sh_info)
768 RL78_STACK_PUSH (sec->output_section->vma
769 + sec->output_offset
770 + sym->st_value
771 + rel->r_addend);
772 else
773 {
774 if (h != NULL
775 && (h->root.type == bfd_link_hash_defined
776 || h->root.type == bfd_link_hash_defweak))
777 RL78_STACK_PUSH (h->root.u.def.value
778 + sec->output_section->vma
779 + sec->output_offset
780 + rel->r_addend);
4107ae22
DD		 781 else if (h->root.type == bfd_link_hash_undefweak)
782 RL78_STACK_PUSH (0);
99c513f6
DD		 783 else
784 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
785 }
786 break;
787
788 case R_RL78_OPneg:
789 {
790 int32_t tmp;
791
792 RL78_STACK_POP (tmp);
793 tmp = - tmp;
794 RL78_STACK_PUSH (tmp);
795 }
796 break;
797
798 case R_RL78_OPadd:
799 {
800 int32_t tmp1, tmp2;
801
802 RL78_STACK_POP (tmp2);
803 RL78_STACK_POP (tmp1);
804 tmp1 += tmp2;
805 RL78_STACK_PUSH (tmp1);
806 }
807 break;
808
809 case R_RL78_OPsub:
810 {
811 int32_t tmp1, tmp2;
812
813 RL78_STACK_POP (tmp2);
814 RL78_STACK_POP (tmp1);
815 tmp2 -= tmp1;
816 RL78_STACK_PUSH (tmp2);
817 }
818 break;
819
820 case R_RL78_OPmul:
821 {
822 int32_t tmp1, tmp2;
823
824 RL78_STACK_POP (tmp2);
825 RL78_STACK_POP (tmp1);
826 tmp1 *= tmp2;
827 RL78_STACK_PUSH (tmp1);
828 }
829 break;
830
831 case R_RL78_OPdiv:
832 {
833 int32_t tmp1, tmp2;
834
835 RL78_STACK_POP (tmp2);
836 RL78_STACK_POP (tmp1);
837 tmp1 /= tmp2;
838 RL78_STACK_PUSH (tmp1);
839 }
840 break;
841
842 case R_RL78_OPshla:
843 {
844 int32_t tmp1, tmp2;
845
846 RL78_STACK_POP (tmp2);
847 RL78_STACK_POP (tmp1);
848 tmp1 <<= tmp2;
849 RL78_STACK_PUSH (tmp1);
850 }
851 break;
852
853 case R_RL78_OPshra:
854 {
855 int32_t tmp1, tmp2;
856
857 RL78_STACK_POP (tmp2);
858 RL78_STACK_POP (tmp1);
859 tmp1 >>= tmp2;
860 RL78_STACK_PUSH (tmp1);
861 }
862 break;
863
864 case R_RL78_OPsctsize:
865 RL78_STACK_PUSH (input_section->size);
866 break;
867
868 case R_RL78_OPscttop:
869 RL78_STACK_PUSH (input_section->output_section->vma);
870 break;
871
872 case R_RL78_OPand:
873 {
874 int32_t tmp1, tmp2;
875
876 RL78_STACK_POP (tmp2);
877 RL78_STACK_POP (tmp1);
878 tmp1 &= tmp2;
879 RL78_STACK_PUSH (tmp1);
880 }
881 break;
882
883 case R_RL78_OPor:
884 {
885 int32_t tmp1, tmp2;
886
887 RL78_STACK_POP (tmp2);
888 RL78_STACK_POP (tmp1);
889 tmp1 |= tmp2;
890 RL78_STACK_PUSH (tmp1);
891 }
892 break;
893
894 case R_RL78_OPxor:
895 {
896 int32_t tmp1, tmp2;
897
898 RL78_STACK_POP (tmp2);
899 RL78_STACK_POP (tmp1);
900 tmp1 ^= tmp2;
901 RL78_STACK_PUSH (tmp1);
902 }
903 break;
904
905 case R_RL78_OPnot:
906 {
907 int32_t tmp;
908
909 RL78_STACK_POP (tmp);
910 tmp = ~ tmp;
911 RL78_STACK_PUSH (tmp);
912 }
913 break;
914
915 case R_RL78_OPmod:
916 {
917 int32_t tmp1, tmp2;
918
919 RL78_STACK_POP (tmp2);
920 RL78_STACK_POP (tmp1);
921 tmp1 %= tmp2;
922 RL78_STACK_PUSH (tmp1);
923 }
924 break;
925
926 case R_RL78_OPromtop:
927 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
928 break;
929
930 case R_RL78_OPramtop:
931 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
932 break;
933
934 default:
935 r = bfd_reloc_notsupported;
936 break;
937 }
938
939 if (r != bfd_reloc_ok)
940 {
941 const char * msg = NULL;
942
943 switch (r)
944 {
945 case bfd_reloc_overflow:
946 /* Catch the case of a missing function declaration
947 and emit a more helpful error message. */
948 if (r_type == R_RL78_DIR24S_PCREL)
949 msg = _("%B(%A): error: call to undefined function '%s'");
950 else
951 r = info->callbacks->reloc_overflow
952 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
953 input_bfd, input_section, rel->r_offset);
954 break;
955
956 case bfd_reloc_undefined:
957 r = info->callbacks->undefined_symbol
958 (info, name, input_bfd, input_section, rel->r_offset,
959 TRUE);
960 break;
961
962 case bfd_reloc_other:
963 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
964 break;
965
966 case bfd_reloc_outofrange:
967 msg = _("%B(%A): internal error: out of range error");
968 break;
969
970 case bfd_reloc_notsupported:
971 msg = _("%B(%A): internal error: unsupported relocation error");
972 break;
973
974 case bfd_reloc_dangerous:
975 msg = _("%B(%A): internal error: dangerous relocation");
976 break;
977
978 default:
979 msg = _("%B(%A): internal error: unknown error");
980 break;
981 }
982
983 if (msg)
984 _bfd_error_handler (msg, input_bfd, input_section, name);
985
986 if (! r)
987 return FALSE;
988 }
989 }
990
991 return TRUE;
992}
993\f
994/* Function to set the ELF flag bits. */
995
996static bfd_boolean
997rl78_elf_set_private_flags (bfd * abfd, flagword flags)
998{
999 elf_elfheader (abfd)->e_flags = flags;
1000 elf_flags_init (abfd) = TRUE;
1001 return TRUE;
1002}
1003
1004static bfd_boolean no_warn_mismatch = FALSE;
1005
1006void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1007
1008void
1009bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1010{
1011 no_warn_mismatch = user_no_warn_mismatch;
1012}
1013
1014/* Merge backend specific data from an object file to the output
1015 object file when linking. */
1016
1017static bfd_boolean
1018rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1019{
99c513f6
DD		 1020 flagword new_flags;
1021 bfd_boolean error = FALSE;
1022
1023 new_flags = elf_elfheader (ibfd)->e_flags;
99c513f6
DD		 1024
1025 if (!elf_flags_init (obfd))
1026 {
1027 /* First call, no flags set. */
1028 elf_flags_init (obfd) = TRUE;
1029 elf_elfheader (obfd)->e_flags = new_flags;
1030 }
1031
1032 return !error;
1033}
1034\f
1035static bfd_boolean
1036rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1037{
1038 FILE * file = (FILE *) ptr;
1039 flagword flags;
1040
1041 BFD_ASSERT (abfd != NULL && ptr != NULL);
1042
1043 /* Print normal ELF private data. */
1044 _bfd_elf_print_private_bfd_data (abfd, ptr);
1045
1046 flags = elf_elfheader (abfd)->e_flags;
1047 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1048
1049 fputc ('\n', file);
1050 return TRUE;
1051}
1052
1053/* Return the MACH for an e_flags value. */
1054
1055static int
1056elf32_rl78_machine (bfd * abfd)
1057{
1058 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1059 return bfd_mach_rl78;
1060
1061 return 0;
1062}
1063
1064static bfd_boolean
1065rl78_elf_object_p (bfd * abfd)
1066{
1067 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1068 elf32_rl78_machine (abfd));
1069 return TRUE;
1070}
1071 \f
1072#ifdef DEBUG
1073void
1074rl78_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
1075{
1076 size_t locsymcount;
1077 Elf_Internal_Sym * isymbuf;
1078 Elf_Internal_Sym * isymend;
1079 Elf_Internal_Sym * isym;
1080 Elf_Internal_Shdr * symtab_hdr;
1081 bfd_boolean free_internal = FALSE, free_external = FALSE;
1082 char * st_info_str;
1083 char * st_info_stb_str;
1084 char * st_other_str;
1085 char * st_shndx_str;
1086
1087 if (! internal_syms)
1088 {
1089 internal_syms = bfd_malloc (1000);
1090 free_internal = 1;
1091 }
1092 if (! external_syms)
1093 {
1094 external_syms = bfd_malloc (1000);
1095 free_external = 1;
1096 }
1097
1098 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1099 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
1100 if (free_internal)
1101 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1102 symtab_hdr->sh_info, 0,
1103 internal_syms, external_syms, NULL);
1104 else
1105 isymbuf = internal_syms;
1106 isymend = isymbuf + locsymcount;
1107
1108 for (isym = isymbuf ; isym < isymend ; isym++)
1109 {
1110 switch (ELF_ST_TYPE (isym->st_info))
1111 {
1112 case STT_FUNC: st_info_str = "STT_FUNC";
1113 case STT_SECTION: st_info_str = "STT_SECTION";
1114 case STT_FILE: st_info_str = "STT_FILE";
1115 case STT_OBJECT: st_info_str = "STT_OBJECT";
1116 case STT_TLS: st_info_str = "STT_TLS";
1117 default: st_info_str = "";
1118 }
1119 switch (ELF_ST_BIND (isym->st_info))
1120 {
1121 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
1122 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
1123 default: st_info_stb_str = "";
1124 }
1125 switch (ELF_ST_VISIBILITY (isym->st_other))
1126 {
1127 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
1128 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
1129 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
1130 default: st_other_str = "";
1131 }
1132 switch (isym->st_shndx)
1133 {
1134 case SHN_ABS: st_shndx_str = "SHN_ABS";
1135 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
1136 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
1137 default: st_shndx_str = "";
1138 }
99c513f6
DD		 1139 }
1140 if (free_internal)
1141 free (internal_syms);
1142 if (free_external)
1143 free (external_syms);
1144}
1145
1146char *
1147rl78_get_reloc (long reloc)
1148{
1149 if (0 <= reloc && reloc < R_RL78_max)
1150 return rl78_elf_howto_table[reloc].name;
1151 return "";
1152}
1153#endif /* DEBUG */
1154
1155\f
1156/* support PLT for 16-bit references to 24-bit functions. */
1157
1158/* We support 16-bit pointers to code above 64k by generating a thunk
1159 below 64k containing a JMP instruction to the final address. */
68ffbac6 1160
99c513f6
DD		 1161static bfd_boolean
1162rl78_elf_check_relocs
1163 (bfd * abfd,
1164 struct bfd_link_info * info,
1165 asection * sec,
1166 const Elf_Internal_Rela * relocs)
1167{
1168 Elf_Internal_Shdr * symtab_hdr;
1169 struct elf_link_hash_entry ** sym_hashes;
1170 const Elf_Internal_Rela * rel;
1171 const Elf_Internal_Rela * rel_end;
1172 bfd_vma *local_plt_offsets;
1173 asection *splt;
1174 bfd *dynobj;
1175
1176 if (info->relocatable)
1177 return TRUE;
68ffbac6 1178
99c513f6
DD		 1179 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1180 sym_hashes = elf_sym_hashes (abfd);
1181 local_plt_offsets = elf_local_got_offsets (abfd);
1182 splt = NULL;
1183 dynobj = elf_hash_table(info)->dynobj;
1184
1185 rel_end = relocs + sec->reloc_count;
1186 for (rel = relocs; rel < rel_end; rel++)
1187 {
1188 struct elf_link_hash_entry *h;
1189 unsigned long r_symndx;
1190 bfd_vma *offset;
68ffbac6 1191
99c513f6
DD		 1192 r_symndx = ELF32_R_SYM (rel->r_info);
1193 if (r_symndx < symtab_hdr->sh_info)
1194 h = NULL;
1195 else
1196 {
1197 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1198 while (h->root.type == bfd_link_hash_indirect
1199 || h->root.type == bfd_link_hash_warning)
1200 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 1201
1202 /* PR15323, ref flags aren't set for references in the same
1203 object. */
1204 h->root.non_ir_ref = 1;
99c513f6 1205 }
68ffbac6 1206
99c513f6
DD		 1207 switch (ELF32_R_TYPE (rel->r_info))
1208 {
1209 /* This relocation describes a 16-bit pointer to a function.
1210 We may need to allocate a thunk in low memory; reserve memory
1211 for it now. */
1212 case R_RL78_DIR16S:
1213 if (dynobj == NULL)
1214 elf_hash_table (info)->dynobj = dynobj = abfd;
1215 if (splt == NULL)
1216 {
3d4d4302 1217 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1218 if (splt == NULL)
1219 {
1220 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1221 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1222 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1223 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1224 flags);
99c513f6
DD		 1225 if (splt == NULL
1226 || ! bfd_set_section_alignment (dynobj, splt, 1))
1227 return FALSE;
1228 }
1229 }
1230
1231 if (h != NULL)
1232 offset = &h->plt.offset;
1233 else
1234 {
1235 if (local_plt_offsets == NULL)
1236 {
1237 size_t size;
1238 unsigned int i;
1239
1240 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1241 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1242 if (local_plt_offsets == NULL)
1243 return FALSE;
1244 elf_local_got_offsets (abfd) = local_plt_offsets;
1245
1246 for (i = 0; i < symtab_hdr->sh_info; i++)
1247 local_plt_offsets[i] = (bfd_vma) -1;
1248 }
1249 offset = &local_plt_offsets[r_symndx];
1250 }
1251
1252 if (*offset == (bfd_vma) -1)
1253 {
1254 *offset = splt->size;
1255 splt->size += 4;
1256 }
1257 break;
1258 }
1259 }
68ffbac6 1260
99c513f6
DD		 1261 return TRUE;
1262}
1263
1264/* This must exist if dynobj is ever set. */
1265
1266static bfd_boolean
1267rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1268 struct bfd_link_info *info)
1269{
1270 bfd *dynobj;
1271 asection *splt;
1272
47fc0f1f
NC		 1273 if (!elf_hash_table (info)->dynamic_sections_created)
1274 return TRUE;
1275
9cea966c
DD		 1276 /* As an extra sanity check, verify that all plt entries have been
1277 filled in. However, relaxing might have changed the relocs so
1278 that some plt entries don't get filled in, so we have to skip
1279 this check if we're relaxing. Unfortunately, check_relocs is
1280 called before relaxation. */
99c513f6 1281
47fc0f1f
NC		 1282 if (info->relax_trip > 0)
1283 return TRUE;
1284
1285 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1286 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1287 {
47fc0f1f
NC		 1288 bfd_byte *contents = splt->contents;
1289 unsigned int i, size = splt->size;
1290
1291 for (i = 0; i < size; i += 4)
99c513f6 1292 {
47fc0f1f
NC		 1293 unsigned int x = bfd_get_32 (dynobj, contents + i);
1294 BFD_ASSERT (x != 0);
99c513f6
DD		 1295 }
1296 }
1297
1298 return TRUE;
1299}
1300
1301static bfd_boolean
1302rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1303 struct bfd_link_info *info)
1304{
1305 bfd *dynobj;
1306 asection *splt;
1307
1308 if (info->relocatable)
1309 return TRUE;
1310
1311 dynobj = elf_hash_table (info)->dynobj;
1312 if (dynobj == NULL)
1313 return TRUE;
1314
3d4d4302 1315 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1316 BFD_ASSERT (splt != NULL);
1317
1318 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1319 if (splt->contents == NULL)
1320 return FALSE;
1321
1322 return TRUE;
1323}
1324
1325\f
1326
1327/* Handle relaxing. */
1328
1329/* A subroutine of rl78_elf_relax_section. If the global symbol H
1330 is within the low 64k, remove any entry for it in the plt. */
1331
1332struct relax_plt_data
1333{
1334 asection *splt;
1335 bfd_boolean *again;
1336};
1337
1338static bfd_boolean
2c3fc389 1339rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1340{
1341 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1342
1343 if (h->plt.offset != (bfd_vma) -1)
1344 {
1345 bfd_vma address;
1346
1347 if (h->root.type == bfd_link_hash_undefined
1348 || h->root.type == bfd_link_hash_undefweak)
1349 address = 0;
1350 else
1351 address = (h->root.u.def.section->output_section->vma
1352 + h->root.u.def.section->output_offset
1353 + h->root.u.def.value);
1354
1355 if (valid_16bit_address (address))
1356 {
1357 h->plt.offset = -1;
1358 data->splt->size -= 4;
1359 *data->again = TRUE;
1360 }
1361 }
1362
1363 return TRUE;
1364}
1365
1366/* A subroutine of rl78_elf_relax_section. If the global symbol H
1367 previously had a plt entry, give it a new entry offset. */
1368
1369static bfd_boolean
2c3fc389 1370rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1371{
1372 bfd_vma *entry = (bfd_vma *) xdata;
1373
1374 if (h->plt.offset != (bfd_vma) -1)
1375 {
1376 h->plt.offset = *entry;
1377 *entry += 4;
1378 }
1379
1380 return TRUE;
1381}
1382
1383static bfd_boolean
1384rl78_elf_relax_plt_section (bfd *dynobj,
1385 asection *splt,
1386 struct bfd_link_info *info,
1387 bfd_boolean *again)
1388{
1389 struct relax_plt_data relax_plt_data;
1390 bfd *ibfd;
1391
1392 /* Assume nothing changes. */
1393 *again = FALSE;
1394
1395 if (info->relocatable)
1396 return TRUE;
1397
1398 /* We only relax the .plt section at the moment. */
1399 if (dynobj != elf_hash_table (info)->dynobj
1400 || strcmp (splt->name, ".plt") != 0)
1401 return TRUE;
1402
1403 /* Quick check for an empty plt. */
1404 if (splt->size == 0)
1405 return TRUE;
1406
1407 /* Map across all global symbols; see which ones happen to
1408 fall in the low 64k. */
1409 relax_plt_data.splt = splt;
1410 relax_plt_data.again = again;
1411 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1412 &relax_plt_data);
1413
1414 /* Likewise for local symbols, though that's somewhat less convenient
1415 as we have to walk the list of input bfds and swap in symbol data. */
1416 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1417 {
1418 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1419 Elf_Internal_Shdr *symtab_hdr;
1420 Elf_Internal_Sym *isymbuf = NULL;
1421 unsigned int idx;
1422
1423 if (! local_plt_offsets)
1424 continue;
1425
1426 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1427 if (symtab_hdr->sh_info != 0)
1428 {
1429 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1430 if (isymbuf == NULL)
1431 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1432 symtab_hdr->sh_info, 0,
1433 NULL, NULL, NULL);
1434 if (isymbuf == NULL)
1435 return FALSE;
1436 }
1437
1438 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1439 {
1440 Elf_Internal_Sym *isym;
1441 asection *tsec;
1442 bfd_vma address;
1443
1444 if (local_plt_offsets[idx] == (bfd_vma) -1)
1445 continue;
1446
1447 isym = &isymbuf[idx];
1448 if (isym->st_shndx == SHN_UNDEF)
1449 continue;
1450 else if (isym->st_shndx == SHN_ABS)
1451 tsec = bfd_abs_section_ptr;
1452 else if (isym->st_shndx == SHN_COMMON)
1453 tsec = bfd_com_section_ptr;
1454 else
1455 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1456
1457 address = (tsec->output_section->vma
1458 + tsec->output_offset
1459 + isym->st_value);
1460 if (valid_16bit_address (address))
1461 {
1462 local_plt_offsets[idx] = -1;
1463 splt->size -= 4;
1464 *again = TRUE;
1465 }
1466 }
1467
1468 if (isymbuf != NULL
1469 && symtab_hdr->contents != (unsigned char *) isymbuf)
1470 {
1471 if (! info->keep_memory)
1472 free (isymbuf);
1473 else
1474 {
1475 /* Cache the symbols for elf_link_input_bfd. */
1476 symtab_hdr->contents = (unsigned char *) isymbuf;
1477 }
1478 }
1479 }
1480
1481 /* If we changed anything, walk the symbols again to reallocate
1482 .plt entry addresses. */
1483 if (*again && splt->size > 0)
1484 {
1485 bfd_vma entry = 0;
1486
1487 elf_link_hash_traverse (elf_hash_table (info),
1488 rl78_relax_plt_realloc, &entry);
1489
1490 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1491 {
1492 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1493 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1494 unsigned int idx;
1495
1496 if (! local_plt_offsets)
1497 continue;
1498
1499 for (idx = 0; idx < nlocals; ++idx)
1500 if (local_plt_offsets[idx] != (bfd_vma) -1)
1501 {
1502 local_plt_offsets[idx] = entry;
1503 entry += 4;
1504 }
1505 }
1506 }
1507
1508 return TRUE;
1509}
1510
9cea966c
DD		 1511/* Delete some bytes from a section while relaxing. */
1512
1513static bfd_boolean
1514elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1515 Elf_Internal_Rela *alignment_rel, int force_snip)
1516{
1517 Elf_Internal_Shdr * symtab_hdr;
1518 unsigned int sec_shndx;
1519 bfd_byte * contents;
1520 Elf_Internal_Rela * irel;
1521 Elf_Internal_Rela * irelend;
1522 Elf_Internal_Sym * isym;
1523 Elf_Internal_Sym * isymend;
1524 bfd_vma toaddr;
1525 unsigned int symcount;
1526 struct elf_link_hash_entry ** sym_hashes;
1527 struct elf_link_hash_entry ** end_hashes;
1528
1529 if (!alignment_rel)
1530 force_snip = 1;
1531
1532 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1533
1534 contents = elf_section_data (sec)->this_hdr.contents;
1535
1536 /* The deletion must stop at the next alignment boundary, if
1537 ALIGNMENT_REL is non-NULL. */
1538 toaddr = sec->size;
1539 if (alignment_rel)
1540 toaddr = alignment_rel->r_offset;
1541
1542 irel = elf_section_data (sec)->relocs;
1543 irelend = irel + sec->reloc_count;
1544
1545 /* Actually delete the bytes. */
1546 memmove (contents + addr, contents + addr + count,
1547 (size_t) (toaddr - addr - count));
1548
1549 /* If we don't have an alignment marker to worry about, we can just
1550 shrink the section. Otherwise, we have to fill in the newly
1551 created gap with NOP insns (0x03). */
1552 if (force_snip)
1553 sec->size -= count;
1554 else
1555 memset (contents + toaddr - count, 0x03, count);
1556
1557 /* Adjust all the relocs. */
1558 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1559 {
1560 /* Get the new reloc address. */
1561 if (irel->r_offset > addr
1562 && (irel->r_offset < toaddr
1563 || (force_snip && irel->r_offset == toaddr)))
1564 irel->r_offset -= count;
1565
1566 /* If we see an ALIGN marker at the end of the gap, we move it
1567 to the beginning of the gap, since marking these gaps is what
1568 they're for. */
1569 if (irel->r_offset == toaddr
1570 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1571 && irel->r_addend & RL78_RELAXA_ALIGN)
1572 irel->r_offset -= count;
1573 }
1574
1575 /* Adjust the local symbols defined in this section. */
1576 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1577 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1578 isymend = isym + symtab_hdr->sh_info;
1579
1580 for (; isym < isymend; isym++)
1581 {
1582 /* If the symbol is in the range of memory we just moved, we
1583 have to adjust its value. */
1584 if (isym->st_shndx == sec_shndx
1585 && isym->st_value > addr
1586 && isym->st_value < toaddr)
1587 isym->st_value -= count;
1588
1589 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1590 *end* is in the moved bytes but it's *start* isn't), then we
1591 must adjust its size. */
1592 if (isym->st_shndx == sec_shndx
1593 && isym->st_value < addr
1594 && isym->st_value + isym->st_size > addr
1595 && isym->st_value + isym->st_size < toaddr)
1596 isym->st_size -= count;
1597 }
1598
1599 /* Now adjust the global symbols defined in this section. */
1600 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1601 - symtab_hdr->sh_info);
1602 sym_hashes = elf_sym_hashes (abfd);
1603 end_hashes = sym_hashes + symcount;
1604
1605 for (; sym_hashes < end_hashes; sym_hashes++)
1606 {
1607 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1608
1609 if ((sym_hash->root.type == bfd_link_hash_defined
1610 || sym_hash->root.type == bfd_link_hash_defweak)
1611 && sym_hash->root.u.def.section == sec)
1612 {
1613 /* As above, adjust the value if needed. */
1614 if (sym_hash->root.u.def.value > addr
1615 && sym_hash->root.u.def.value < toaddr)
1616 sym_hash->root.u.def.value -= count;
1617
1618 /* As above, adjust the size if needed. */
1619 if (sym_hash->root.u.def.value < addr
1620 && sym_hash->root.u.def.value + sym_hash->size > addr
1621 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1622 sym_hash->size -= count;
1623 }
1624 }
1625
1626 return TRUE;
1627}
1628
1629/* Used to sort relocs by address. If relocs have the same address,
1630 we maintain their relative order, except that R_RL78_RH_RELAX
1631 alignment relocs must be the first reloc for any given address. */
1632
1633static void
1634reloc_bubblesort (Elf_Internal_Rela * r, int count)
1635{
1636 int i;
1637 bfd_boolean again;
1638 bfd_boolean swappit;
1639
1640 /* This is almost a classic bubblesort. It's the slowest sort, but
1641 we're taking advantage of the fact that the relocations are
1642 mostly in order already (the assembler emits them that way) and
1643 we need relocs with the same address to remain in the same
1644 relative order. */
1645 again = TRUE;
1646 while (again)
1647 {
1648 again = FALSE;
1649 for (i = 0; i < count - 1; i ++)
1650 {
1651 if (r[i].r_offset > r[i + 1].r_offset)
1652 swappit = TRUE;
1653 else if (r[i].r_offset < r[i + 1].r_offset)
1654 swappit = FALSE;
1655 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1656 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1657 swappit = TRUE;
1658 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1659 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1660 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1661 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1662 swappit = TRUE;
1663 else
1664 swappit = FALSE;
1665
1666 if (swappit)
1667 {
1668 Elf_Internal_Rela tmp;
1669
1670 tmp = r[i];
1671 r[i] = r[i + 1];
1672 r[i + 1] = tmp;
1673 /* If we do move a reloc back, re-scan to see if it
1674 needs to be moved even further back. This avoids
1675 most of the O(n^2) behavior for our cases. */
1676 if (i > 0)
1677 i -= 2;
1678 again = TRUE;
1679 }
1680 }
1681 }
1682}
1683
1684
1685#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1686 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1687 lrel, abfd, sec, link_info, scale)
1688
1689static bfd_vma
1690rl78_offset_for_reloc (bfd * abfd,
1691 Elf_Internal_Rela * rel,
1692 Elf_Internal_Shdr * symtab_hdr,
1693 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1694 Elf_Internal_Sym * intsyms,
1695 Elf_Internal_Rela ** lrel,
1696 bfd * input_bfd,
1697 asection * input_section,
1698 struct bfd_link_info * info,
1699 int * scale)
1700{
1701 bfd_vma symval;
1702 bfd_reloc_status_type r;
1703
1704 *scale = 1;
1705
1706 /* REL is the first of 1..N relocations. We compute the symbol
1707 value for each relocation, then combine them if needed. LREL
1708 gets a pointer to the last relocation used. */
1709 while (1)
1710 {
1711 int32_t tmp1, tmp2;
1712
1713 /* Get the value of the symbol referred to by the reloc. */
1714 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1715 {
1716 /* A local symbol. */
1717 Elf_Internal_Sym *isym;
1718 asection *ssec;
1719
1720 isym = intsyms + ELF32_R_SYM (rel->r_info);
1721
1722 if (isym->st_shndx == SHN_UNDEF)
1723 ssec = bfd_und_section_ptr;
1724 else if (isym->st_shndx == SHN_ABS)
1725 ssec = bfd_abs_section_ptr;
1726 else if (isym->st_shndx == SHN_COMMON)
1727 ssec = bfd_com_section_ptr;
1728 else
1729 ssec = bfd_section_from_elf_index (abfd,
1730 isym->st_shndx);
1731
1732 /* Initial symbol value. */
1733 symval = isym->st_value;
1734
1735 /* GAS may have made this symbol relative to a section, in
1736 which case, we have to add the addend to find the
1737 symbol. */
1738 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1739 symval += rel->r_addend;
1740
1741 if (ssec)
1742 {
1743 if ((ssec->flags & SEC_MERGE)
dbaa2011 1744 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1745 symval = _bfd_merged_section_offset (abfd, & ssec,
1746 elf_section_data (ssec)->sec_info,
1747 symval);
1748 }
1749
1750 /* Now make the offset relative to where the linker is putting it. */
1751 if (ssec)
1752 symval +=
1753 ssec->output_section->vma + ssec->output_offset;
1754
1755 symval += rel->r_addend;
1756 }
1757 else
1758 {
1759 unsigned long indx;
1760 struct elf_link_hash_entry * h;
1761
1762 /* An external symbol. */
1763 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1764 h = elf_sym_hashes (abfd)[indx];
1765 BFD_ASSERT (h != NULL);
1766
1767 if (h->root.type != bfd_link_hash_defined
1768 && h->root.type != bfd_link_hash_defweak)
1769 {
1770 /* This appears to be a reference to an undefined
1771 symbol. Just ignore it--it will be caught by the
1772 regular reloc processing. */
1773 if (lrel)
1774 *lrel = rel;
1775 return 0;
1776 }
1777
1778 symval = (h->root.u.def.value
1779 + h->root.u.def.section->output_section->vma
1780 + h->root.u.def.section->output_offset);
1781
1782 symval += rel->r_addend;
1783 }
1784
1785 switch (ELF32_R_TYPE (rel->r_info))
1786 {
1787 case R_RL78_SYM:
1788 RL78_STACK_PUSH (symval);
1789 break;
1790
1791 case R_RL78_OPneg:
1792 RL78_STACK_POP (tmp1);
1793 tmp1 = - tmp1;
1794 RL78_STACK_PUSH (tmp1);
1795 break;
1796
1797 case R_RL78_OPadd:
1798 RL78_STACK_POP (tmp1);
1799 RL78_STACK_POP (tmp2);
1800 tmp1 += tmp2;
1801 RL78_STACK_PUSH (tmp1);
1802 break;
1803
1804 case R_RL78_OPsub:
1805 RL78_STACK_POP (tmp1);
1806 RL78_STACK_POP (tmp2);
1807 tmp2 -= tmp1;
1808 RL78_STACK_PUSH (tmp2);
1809 break;
1810
1811 case R_RL78_OPmul:
1812 RL78_STACK_POP (tmp1);
1813 RL78_STACK_POP (tmp2);
1814 tmp1 *= tmp2;
1815 RL78_STACK_PUSH (tmp1);
1816 break;
1817
1818 case R_RL78_OPdiv:
1819 RL78_STACK_POP (tmp1);
1820 RL78_STACK_POP (tmp2);
1821 tmp1 /= tmp2;
1822 RL78_STACK_PUSH (tmp1);
1823 break;
1824
1825 case R_RL78_OPshla:
1826 RL78_STACK_POP (tmp1);
1827 RL78_STACK_POP (tmp2);
1828 tmp1 <<= tmp2;
1829 RL78_STACK_PUSH (tmp1);
1830 break;
1831
1832 case R_RL78_OPshra:
1833 RL78_STACK_POP (tmp1);
1834 RL78_STACK_POP (tmp2);
1835 tmp1 >>= tmp2;
1836 RL78_STACK_PUSH (tmp1);
1837 break;
1838
1839 case R_RL78_OPsctsize:
1840 RL78_STACK_PUSH (input_section->size);
1841 break;
1842
1843 case R_RL78_OPscttop:
1844 RL78_STACK_PUSH (input_section->output_section->vma);
1845 break;
1846
1847 case R_RL78_OPand:
1848 RL78_STACK_POP (tmp1);
1849 RL78_STACK_POP (tmp2);
1850 tmp1 &= tmp2;
1851 RL78_STACK_PUSH (tmp1);
1852 break;
1853
1854 case R_RL78_OPor:
1855 RL78_STACK_POP (tmp1);
1856 RL78_STACK_POP (tmp2);
1857 tmp1 |= tmp2;
1858 RL78_STACK_PUSH (tmp1);
1859 break;
1860
1861 case R_RL78_OPxor:
1862 RL78_STACK_POP (tmp1);
1863 RL78_STACK_POP (tmp2);
1864 tmp1 ^= tmp2;
1865 RL78_STACK_PUSH (tmp1);
1866 break;
1867
1868 case R_RL78_OPnot:
1869 RL78_STACK_POP (tmp1);
1870 tmp1 = ~ tmp1;
1871 RL78_STACK_PUSH (tmp1);
1872 break;
1873
1874 case R_RL78_OPmod:
1875 RL78_STACK_POP (tmp1);
1876 RL78_STACK_POP (tmp2);
1877 tmp1 %= tmp2;
1878 RL78_STACK_PUSH (tmp1);
1879 break;
1880
1881 case R_RL78_OPromtop:
1882 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1883 break;
1884
1885 case R_RL78_OPramtop:
1886 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1887 break;
1888
1889 case R_RL78_DIR16UL:
1890 case R_RL78_DIR8UL:
1891 case R_RL78_ABS16UL:
1892 case R_RL78_ABS8UL:
1893 if (rl78_stack_top)
1894 RL78_STACK_POP (symval);
1895 if (lrel)
1896 *lrel = rel;
1897 *scale = 4;
1898 return symval;
1899
1900 case R_RL78_DIR16UW:
1901 case R_RL78_DIR8UW:
1902 case R_RL78_ABS16UW:
1903 case R_RL78_ABS8UW:
1904 if (rl78_stack_top)
1905 RL78_STACK_POP (symval);
1906 if (lrel)
1907 *lrel = rel;
1908 *scale = 2;
1909 return symval;
1910
1911 default:
1912 if (rl78_stack_top)
1913 RL78_STACK_POP (symval);
1914 if (lrel)
1915 *lrel = rel;
1916 return symval;
1917 }
1918
1919 rel ++;
1920 }
1921}
1922
1923struct {
1924 int prefix; /* or -1 for "no prefix" */
1925 int insn; /* or -1 for "end of list" */
1926 int insn_for_saddr; /* or -1 for "no alternative" */
1927 int insn_for_sfr; /* or -1 for "no alternative" */
1928} relax_addr16[] = {
1929 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1930 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1931 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1932 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1933
1934 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1935 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1936 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1937 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1938 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1939 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1940 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1941 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1942
1943 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1944 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1945 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1946 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1947 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1948
1949 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1950 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1951 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1952 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1953
1954 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1955 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1956 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1957
1958 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1959 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1960 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1961 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1962 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1963 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1964
1965 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1966
1967 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1968 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1969 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1970 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1971 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1972 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1973 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1974 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1975
1976 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1977 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1978 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1979 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1980 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1981 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1982 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1983 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 1984
9cea966c
DD		 1985 { -1, -1, -1, -1 }
1986};
1987
1988/* Relax one section. */
1989
99c513f6
DD		 1990static bfd_boolean
1991rl78_elf_relax_section
1992 (bfd * abfd,
1993 asection * sec,
1994 struct bfd_link_info * link_info,
1995 bfd_boolean * again)
1996{
9cea966c
DD		 1997 Elf_Internal_Shdr * symtab_hdr;
1998 Elf_Internal_Shdr * shndx_hdr;
1999 Elf_Internal_Rela * internal_relocs;
2000 Elf_Internal_Rela * free_relocs = NULL;
2001 Elf_Internal_Rela * irel;
2002 Elf_Internal_Rela * srel;
2003 Elf_Internal_Rela * irelend;
2004 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 2005 bfd_byte * contents = NULL;
2006 bfd_byte * free_contents = NULL;
2007 Elf_Internal_Sym * intsyms = NULL;
2008 Elf_Internal_Sym * free_intsyms = NULL;
2009 Elf_External_Sym_Shndx * shndx_buf = NULL;
2010 bfd_vma pc;
9cea966c
DD		 2011 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2012 int pcrel ATTRIBUTE_UNUSED = 0;
2013 int code ATTRIBUTE_UNUSED = 0;
2014 int section_alignment_glue;
2015 int scale;
2016
99c513f6
DD		 2017 if (abfd == elf_hash_table (link_info)->dynobj
2018 && strcmp (sec->name, ".plt") == 0)
2019 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2020
2021 /* Assume nothing changes. */
2022 *again = FALSE;
9cea966c
DD		 2023
2024 /* We don't have to do anything for a relocatable link, if
2025 this section does not have relocs, or if this is not a
2026 code section. */
2027 if (link_info->relocatable
2028 || (sec->flags & SEC_RELOC) == 0
2029 || sec->reloc_count == 0
2030 || (sec->flags & SEC_CODE) == 0)
2031 return TRUE;
2032
2033 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2034 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2035
9cea966c
DD		 2036 /* Get the section contents. */
2037 if (elf_section_data (sec)->this_hdr.contents != NULL)
2038 contents = elf_section_data (sec)->this_hdr.contents;
2039 /* Go get them off disk. */
2040 else
2041 {
2042 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2043 goto error_return;
2044 elf_section_data (sec)->this_hdr.contents = contents;
2045 }
2046
2047 /* Read this BFD's symbols. */
2048 /* Get cached copy if it exists. */
2049 if (symtab_hdr->contents != NULL)
2050 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2051 else
2052 {
2053 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2054 symtab_hdr->contents = (bfd_byte *) intsyms;
2055 }
2056
2057 if (shndx_hdr->sh_size != 0)
2058 {
2059 bfd_size_type amt;
2060
2061 amt = symtab_hdr->sh_info;
2062 amt *= sizeof (Elf_External_Sym_Shndx);
2063 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2064 if (shndx_buf == NULL)
2065 goto error_return;
2066 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2067 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2068 goto error_return;
2069 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2070 }
2071
2072 /* Get a copy of the native relocations. */
2073 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2074 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2075 link_info->keep_memory));
2076 if (internal_relocs == NULL)
2077 goto error_return;
2078 if (! link_info->keep_memory)
2079 free_relocs = internal_relocs;
2080
2081 /* The RL_ relocs must be just before the operand relocs they go
2082 with, so we must sort them to guarantee this. We use bubblesort
2083 instead of qsort so we can guarantee that relocs with the same
2084 address remain in the same relative order. */
2085 reloc_bubblesort (internal_relocs, sec->reloc_count);
2086
2087 /* Walk through them looking for relaxing opportunities. */
2088 irelend = internal_relocs + sec->reloc_count;
2089
2090
2091 /* This will either be NULL or a pointer to the next alignment
2092 relocation. */
2093 next_alignment = internal_relocs;
9cea966c
DD		 2094
2095 /* We calculate worst case shrinkage caused by alignment directives.
2096 No fool-proof, but better than either ignoring the problem or
2097 doing heavy duty analysis of all the alignment markers in all
2098 input sections. */
2099 section_alignment_glue = 0;
2100 for (irel = internal_relocs; irel < irelend; irel++)
2101 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2102 && irel->r_addend & RL78_RELAXA_ALIGN)
2103 {
2104 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2105
2106 if (section_alignment_glue < this_glue)
2107 section_alignment_glue = this_glue;
2108 }
2109 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2110 shrinkage. */
2111 section_alignment_glue *= 2;
2112
2113 for (irel = internal_relocs; irel < irelend; irel++)
2114 {
2115 unsigned char *insn;
2116 int nrelocs;
2117
2118 /* The insns we care about are all marked with one of these. */
2119 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2120 continue;
2121
2122 if (irel->r_addend & RL78_RELAXA_ALIGN
2123 || next_alignment == internal_relocs)
2124 {
2125 /* When we delete bytes, we need to maintain all the alignments
2126 indicated. In addition, we need to be careful about relaxing
2127 jumps across alignment boundaries - these displacements
2128 *grow* when we delete bytes. For now, don't shrink
2129 displacements across an alignment boundary, just in case.
2130 Note that this only affects relocations to the same
2131 section. */
9cea966c
DD		 2132 next_alignment += 2;
2133 while (next_alignment < irelend
2134 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2135 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2136 next_alignment ++;
2137 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2138 next_alignment = NULL;
2139 }
2140
2141 /* When we hit alignment markers, see if we've shrunk enough
2142 before them to reduce the gap without violating the alignment
2143 requirements. */
2144 if (irel->r_addend & RL78_RELAXA_ALIGN)
2145 {
2146 /* At this point, the next relocation *should* be the ELIGN
2147 end marker. */
2148 Elf_Internal_Rela *erel = irel + 1;
2149 unsigned int alignment, nbytes;
2150
2151 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2152 continue;
2153 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2154 continue;
2155
2156 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2157
2158 if (erel->r_offset - irel->r_offset < alignment)
2159 continue;
2160
2161 nbytes = erel->r_offset - irel->r_offset;
2162 nbytes /= alignment;
2163 nbytes *= alignment;
2164
2165 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2166 erel->r_offset == sec->size);
2167 *again = TRUE;
2168
2169 continue;
2170 }
2171
2172 if (irel->r_addend & RL78_RELAXA_ELIGN)
2173 continue;
2174
2175 insn = contents + irel->r_offset;
2176
2177 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2178
2179 /* At this point, we have an insn that is a candidate for linker
2180 relaxation. There are NRELOCS relocs following that may be
2181 relaxed, although each reloc may be made of more than one
2182 reloc entry (such as gp-rel symbols). */
2183
2184 /* Get the value of the symbol referred to by the reloc. Just
2185 in case this is the last reloc in the list, use the RL's
2186 addend to choose between this reloc (no addend) or the next
2187 (yes addend, which means at least one following reloc). */
2188
2189 /* srel points to the "current" reloction for this insn -
2190 actually the last reloc for a given operand, which is the one
2191 we need to update. We check the relaxations in the same
2192 order that the relocations happen, so we'll just push it
2193 along as we go. */
2194 srel = irel;
2195
2196 pc = sec->output_section->vma + sec->output_offset
2197 + srel->r_offset;
2198
2199#define GET_RELOC \
1122dc88 2200 BFD_ASSERT (nrelocs > 0); \
9cea966c
DD		 2201 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2202 pcrel = symval - pc + srel->r_addend; \
2203 nrelocs --;
2204
2205#define SNIPNR(offset, nbytes) \
2206 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2207#define SNIP(offset, nbytes, newtype) \
2208 SNIPNR (offset, nbytes); \
2209 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2210
2211 /* The order of these bit tests must match the order that the
2212 relocs appear in. Since we sorted those by offset, we can
2213 predict them. */
2214
2215 /*----------------------------------------------------------------------*/
2216 /* EF ad BR $rel8 pcrel
2217 ED al ah BR !abs16 abs
2218 EE al ah BR $!rel16 pcrel
2219 EC al ah as BR !!abs20 abs
2220
2221 FD al ah CALL !abs16 abs
2222 FE al ah CALL $!rel16 pcrel
2223 FC al ah as CALL !!abs20 abs
2224
2225 DC ad BC $rel8
2226 DE ad BNC $rel8
2227 DD ad BZ $rel8
2228 DF ad BNZ $rel8
2229 61 C3 ad BH $rel8
2230 61 D3 ad BNH $rel8
2231 61 C8 EF ad SKC ; BR $rel8
2232 61 D8 EF ad SKNC ; BR $rel8
2233 61 E8 EF ad SKZ ; BR $rel8
2234 61 F8 EF ad SKNZ ; BR $rel8
2235 61 E3 EF ad SKH ; BR $rel8
2236 61 F3 EF ad SKNH ; BR $rel8
2237 */
2238
2239 if (irel->r_addend & RL78_RELAXA_BRA)
2240 {
1122dc88
DD		 2241 /* SKIP opcodes that skip non-branches will have a relax tag
2242 but no corresponding symbol to relax against; we just
2243 skip those. */
2244 if (irel->r_addend & RL78_RELAXA_RNUM)
2245 {
2246 GET_RELOC;
2247 }
9cea966c
DD		 2248
2249 switch (insn[0])
2250 {
2251 case 0xec: /* BR !!abs20 */
2252
2253 if (pcrel < 127
2254 && pcrel > -127)
2255 {
2256 insn[0] = 0xef;
2257 insn[1] = pcrel;
2258 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2259 *again = TRUE;
2260 }
2261 else if (symval < 65536)
2262 {
2263 insn[0] = 0xed;
2264 insn[1] = symval & 0xff;
2265 insn[2] = symval >> 8;
2266 SNIP (2, 1, R_RL78_DIR16S);
2267 *again = TRUE;
2268 }
2269 else if (pcrel < 32767
2270 && pcrel > -32767)
2271 {
2272 insn[0] = 0xee;
2273 insn[1] = pcrel & 0xff;
2274 insn[2] = pcrel >> 8;
2275 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2276 *again = TRUE;
2277 }
2278 break;
2279
2280 case 0xee: /* BR $!pcrel16 */
2281 case 0xed: /* BR $!abs16 */
2282 if (pcrel < 127
2283 && pcrel > -127)
2284 {
2285 insn[0] = 0xef;
2286 insn[1] = pcrel;
2287 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2288 *again = TRUE;
2289 }
2290 break;
2291
2292 case 0xfc: /* CALL !!abs20 */
2293 if (symval < 65536)
2294 {
2295 insn[0] = 0xfd;
2296 insn[1] = symval & 0xff;
2297 insn[2] = symval >> 8;
2298 SNIP (2, 1, R_RL78_DIR16S);
2299 *again = TRUE;
2300 }
2301 else if (pcrel < 32767
2302 && pcrel > -32767)
2303 {
2304 insn[0] = 0xfe;
2305 insn[1] = pcrel & 0xff;
2306 insn[2] = pcrel >> 8;
2307 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2308 *again = TRUE;
2309 }
2310 break;
2311
2312 case 0x61: /* PREFIX */
2313 /* For SKIP/BR, we change the BR opcode and delete the
2314 SKIP. That way, we don't have to find and change the
2315 relocation for the BR. */
1122dc88
DD		 2316 /* Note that, for the case where we're skipping some
2317 other insn, we have no "other" reloc but that's safe
2318 here anyway. */
9cea966c
DD		 2319 switch (insn[1])
2320 {
2321 case 0xc8: /* SKC */
2322 if (insn[2] == 0xef)
2323 {
2324 insn[2] = 0xde; /* BNC */
2325 SNIPNR (0, 2);
2326 }
2327 break;
2328
2329 case 0xd8: /* SKNC */
2330 if (insn[2] == 0xef)
2331 {
2332 insn[2] = 0xdc; /* BC */
2333 SNIPNR (0, 2);
2334 }
2335 break;
2336
2337 case 0xe8: /* SKZ */
2338 if (insn[2] == 0xef)
2339 {
2340 insn[2] = 0xdf; /* BNZ */
2341 SNIPNR (0, 2);
2342 }
2343 break;
2344
2345 case 0xf8: /* SKNZ */
2346 if (insn[2] == 0xef)
2347 {
2348 insn[2] = 0xdd; /* BZ */
2349 SNIPNR (0, 2);
2350 }
2351 break;
2352
2353 case 0xe3: /* SKH */
2354 if (insn[2] == 0xef)
2355 {
2356 insn[2] = 0xd3; /* BNH */
2357 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2358 }
2359 break;
2360
2361 case 0xf3: /* SKNH */
2362 if (insn[2] == 0xef)
2363 {
2364 insn[2] = 0xc3; /* BH */
2365 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2366 }
2367 break;
2368 }
2369 break;
2370 }
68ffbac6 2371
9cea966c
DD		 2372 }
2373
2374 if (irel->r_addend & RL78_RELAXA_ADDR16)
2375 {
2376 /*----------------------------------------------------------------------*/
2377 /* Some insns have both a 16-bit address operand and an 8-bit
2378 variant if the address is within a special range:
2379
2380 Address 16-bit operand SADDR range SFR range
2381 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2382 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2383
2384 The RELAX_ADDR16[] array has the insn encodings for the
2385 16-bit operand version, as well as the SFR and SADDR
2386 variants. We only need to replace the encodings and
2387 adjust the operand.
2388
2389 Note: we intentionally do not attempt to decode and skip
2390 any ES: prefix, as adding ES: means the addr16 (likely)
2391 no longer points to saddr/sfr space.
2392 */
2393
2394 int is_sfr;
2395 int is_saddr;
2396 int idx;
2397 int poff;
2398
2399 GET_RELOC;
2400
9cea966c
DD		 2401 if (0xffe20 <= symval && symval <= 0xfffff)
2402 {
2403
2404 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2405 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2406
2407 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2408 {
2409 if (relax_addr16[idx].prefix != -1
2410 && insn[0] == relax_addr16[idx].prefix
2411 && insn[1] == relax_addr16[idx].insn)
2412 {
2413 poff = 1;
2414 }
2415 else if (relax_addr16[idx].prefix == -1
2416 && insn[0] == relax_addr16[idx].insn)
2417 {
2418 poff = 0;
2419 }
2420 else
2421 continue;
2422
2423 /* We have a matched insn, and poff is 0 or 1 depending
2424 on the base pattern size. */
2425
2426 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2427 {
2428 insn[poff] = relax_addr16[idx].insn_for_sfr;
2429 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2430 }
2431
2432 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2433 {
2434 insn[poff] = relax_addr16[idx].insn_for_saddr;
2435 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2436 }
68ffbac6 2437
9cea966c
DD		 2438 }
2439 }
2440 }
2441
2442 /*----------------------------------------------------------------------*/
2443
2444 }
2445
2446 return TRUE;
2447
2448 error_return:
2449 if (free_relocs != NULL)
2450 free (free_relocs);
2451
2452 if (free_contents != NULL)
2453 free (free_contents);
2454
2455 if (shndx_buf != NULL)
2456 {
2457 shndx_hdr->contents = NULL;
2458 free (shndx_buf);
2459 }
2460
2461 if (free_intsyms != NULL)
2462 free (free_intsyms);
2463
99c513f6
DD		 2464 return TRUE;
2465}
2466
2467\f
2468
2469#define ELF_ARCH bfd_arch_rl78
2470#define ELF_MACHINE_CODE EM_RL78
2471#define ELF_MAXPAGESIZE 0x1000
2472
2473#define TARGET_LITTLE_SYM bfd_elf32_rl78_vec
2474#define TARGET_LITTLE_NAME "elf32-rl78"
2475
2476#define elf_info_to_howto_rel NULL
2477#define elf_info_to_howto rl78_info_to_howto_rela
2478#define elf_backend_object_p rl78_elf_object_p
2479#define elf_backend_relocate_section rl78_elf_relocate_section
2480#define elf_symbol_leading_char ('_')
2481#define elf_backend_can_gc_sections 1
2482
2483#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2484#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2485#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2486#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2487#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2488
2489#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2490#define elf_backend_check_relocs rl78_elf_check_relocs
2491#define elf_backend_always_size_sections \
2492 rl78_elf_always_size_sections
2493#define elf_backend_finish_dynamic_sections \
2494 rl78_elf_finish_dynamic_sections
2495
2496#include "elf32-target.h"
GDB Binutils - Deliverables
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