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Remove trailing white spaces in bfd
[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
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99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
dbaa2011 2 Copyright (C) 2011, 2012
99c513f6
DD		 3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "sysdep.h"
22#include "bfd.h"
23#include "bfd_stdint.h"
24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/rl78.h"
27#include "libiberty.h"
28
29#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
30
31#define RL78REL(n,sz,bit,shift,complain,pcrel) \
32 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
33 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
34
35/* Note that the relocations around 0x7f are internal to this file;
36 feel free to move them as needed to avoid conflicts with published
37 relocation numbers. */
38
39static reloc_howto_type rl78_elf_howto_table [] =
40{
41 RL78REL (NONE, 0, 0, 0, dont, FALSE),
42 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
43 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
44 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
45 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
46 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
47 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
48 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
49 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
50 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
51 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
52 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
53 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
54 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
55 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
56 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
57 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
59 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
60
61 EMPTY_HOWTO (0x13),
62 EMPTY_HOWTO (0x14),
63 EMPTY_HOWTO (0x15),
64 EMPTY_HOWTO (0x16),
65 EMPTY_HOWTO (0x17),
66 EMPTY_HOWTO (0x18),
67 EMPTY_HOWTO (0x19),
68 EMPTY_HOWTO (0x1a),
69 EMPTY_HOWTO (0x1b),
70 EMPTY_HOWTO (0x1c),
71 EMPTY_HOWTO (0x1d),
72 EMPTY_HOWTO (0x1e),
73 EMPTY_HOWTO (0x1f),
74
75 EMPTY_HOWTO (0x20),
76 EMPTY_HOWTO (0x21),
77 EMPTY_HOWTO (0x22),
78 EMPTY_HOWTO (0x23),
79 EMPTY_HOWTO (0x24),
80 EMPTY_HOWTO (0x25),
81 EMPTY_HOWTO (0x26),
82 EMPTY_HOWTO (0x27),
83 EMPTY_HOWTO (0x28),
84 EMPTY_HOWTO (0x29),
85 EMPTY_HOWTO (0x2a),
86 EMPTY_HOWTO (0x2b),
87 EMPTY_HOWTO (0x2c),
9cea966c 88 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 89
90 EMPTY_HOWTO (0x2e),
91 EMPTY_HOWTO (0x2f),
92 EMPTY_HOWTO (0x30),
93 EMPTY_HOWTO (0x31),
94 EMPTY_HOWTO (0x32),
95 EMPTY_HOWTO (0x33),
96 EMPTY_HOWTO (0x34),
97 EMPTY_HOWTO (0x35),
98 EMPTY_HOWTO (0x36),
99 EMPTY_HOWTO (0x37),
100 EMPTY_HOWTO (0x38),
101 EMPTY_HOWTO (0x39),
102 EMPTY_HOWTO (0x3a),
103 EMPTY_HOWTO (0x3b),
104 EMPTY_HOWTO (0x3c),
105 EMPTY_HOWTO (0x3d),
106 EMPTY_HOWTO (0x3e),
107 EMPTY_HOWTO (0x3f),
108 EMPTY_HOWTO (0x40),
109
110 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
111 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
112 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
113 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
114 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
115 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
116 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
117 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
118 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
119 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
120 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
121 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
123 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
125 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
126 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
127
128#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
129
130 EMPTY_HOWTO (0x52),
131 EMPTY_HOWTO (0x53),
132 EMPTY_HOWTO (0x54),
133 EMPTY_HOWTO (0x55),
134 EMPTY_HOWTO (0x56),
135 EMPTY_HOWTO (0x57),
136 EMPTY_HOWTO (0x58),
137 EMPTY_HOWTO (0x59),
138 EMPTY_HOWTO (0x5a),
139 EMPTY_HOWTO (0x5b),
140 EMPTY_HOWTO (0x5c),
141 EMPTY_HOWTO (0x5d),
142 EMPTY_HOWTO (0x5e),
143 EMPTY_HOWTO (0x5f),
144 EMPTY_HOWTO (0x60),
145 EMPTY_HOWTO (0x61),
146 EMPTY_HOWTO (0x62),
147 EMPTY_HOWTO (0x63),
148 EMPTY_HOWTO (0x64),
149 EMPTY_HOWTO (0x65),
150 EMPTY_HOWTO (0x66),
151 EMPTY_HOWTO (0x67),
152 EMPTY_HOWTO (0x68),
153 EMPTY_HOWTO (0x69),
154 EMPTY_HOWTO (0x6a),
155 EMPTY_HOWTO (0x6b),
156 EMPTY_HOWTO (0x6c),
157 EMPTY_HOWTO (0x6d),
158 EMPTY_HOWTO (0x6e),
159 EMPTY_HOWTO (0x6f),
160 EMPTY_HOWTO (0x70),
161 EMPTY_HOWTO (0x71),
162 EMPTY_HOWTO (0x72),
163 EMPTY_HOWTO (0x73),
164 EMPTY_HOWTO (0x74),
165 EMPTY_HOWTO (0x75),
166 EMPTY_HOWTO (0x76),
167 EMPTY_HOWTO (0x77),
168
169 EMPTY_HOWTO (0x78),
170 EMPTY_HOWTO (0x79),
171 EMPTY_HOWTO (0x7a),
172 EMPTY_HOWTO (0x7b),
173 EMPTY_HOWTO (0x7c),
174 EMPTY_HOWTO (0x7d),
175 EMPTY_HOWTO (0x7e),
176 EMPTY_HOWTO (0x7f),
177
178 RL78REL (SYM, 2, 32, 0, dont, FALSE),
179 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
180 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
181 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
182 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
183 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
185 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
186 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
187 EMPTY_HOWTO (0x89),
188 EMPTY_HOWTO (0x8a),
189 EMPTY_HOWTO (0x8b),
190 EMPTY_HOWTO (0x8c),
191 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
192 EMPTY_HOWTO (0x8e),
193 EMPTY_HOWTO (0x8f),
194 RL78REL (OPand, 2, 32, 0, dont, FALSE),
195 RL78REL (OPor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
197 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
198 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
199 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
200 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
201};
202\f
203/* Map BFD reloc types to RL78 ELF reloc types. */
204
205struct rl78_reloc_map
206{
207 bfd_reloc_code_real_type bfd_reloc_val;
208 unsigned int rl78_reloc_val;
209};
210
211static const struct rl78_reloc_map rl78_reloc_map [] =
212{
213 { BFD_RELOC_NONE, R_RL78_NONE },
214 { BFD_RELOC_8, R_RL78_DIR8S },
215 { BFD_RELOC_16, R_RL78_DIR16S },
216 { BFD_RELOC_24, R_RL78_DIR24S },
217 { BFD_RELOC_32, R_RL78_DIR32 },
218 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
219 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
220 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
221 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
222 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
223 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
224 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
225 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
226 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
227 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
228 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
229 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
230 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
231 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
232 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
233 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
234 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
235 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
236 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c
DD		 237 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
238 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 239};
240
241static reloc_howto_type *
242rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
243 bfd_reloc_code_real_type code)
244{
245 unsigned int i;
246
247 if (code == BFD_RELOC_RL78_32_OP)
248 return rl78_elf_howto_table + R_RL78_DIR32;
249
250 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
251 if (rl78_reloc_map [i].bfd_reloc_val == code)
252 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
253
254 return NULL;
255}
256
257static reloc_howto_type *
258rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
259{
260 unsigned int i;
261
262 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
263 if (rl78_elf_howto_table[i].name != NULL
264 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
265 return rl78_elf_howto_table + i;
266
267 return NULL;
268}
269
270/* Set the howto pointer for an RL78 ELF reloc. */
271
272static void
273rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
274 arelent * cache_ptr,
275 Elf_Internal_Rela * dst)
276{
277 unsigned int r_type;
278
279 r_type = ELF32_R_TYPE (dst->r_info);
280 BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
281 cache_ptr->howto = rl78_elf_howto_table + r_type;
282}
283\f
284static bfd_vma
285get_symbol_value (const char * name,
286 bfd_reloc_status_type * status,
287 struct bfd_link_info * info,
288 bfd * input_bfd,
289 asection * input_section,
290 int offset)
291{
292 bfd_vma value = 0;
293 struct bfd_link_hash_entry * h;
294
295 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
296
297 if (h == NULL
298 || (h->type != bfd_link_hash_defined
299 && h->type != bfd_link_hash_defweak))
300 * status = info->callbacks->undefined_symbol
301 (info, name, input_bfd, input_section, offset, TRUE);
302 else
303 value = (h->u.def.value
304 + h->u.def.section->output_section->vma
305 + h->u.def.section->output_offset);
306
307 return value;
308}
309
310static bfd_vma
311get_romstart (bfd_reloc_status_type * status,
312 struct bfd_link_info * info,
313 bfd * abfd,
314 asection * sec,
315 int offset)
316{
317 static bfd_boolean cached = FALSE;
318 static bfd_vma cached_value = 0;
319
320 if (!cached)
321 {
322 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
323 cached = TRUE;
324 }
325 return cached_value;
326}
327
328static bfd_vma
329get_ramstart (bfd_reloc_status_type * status,
330 struct bfd_link_info * info,
331 bfd * abfd,
332 asection * sec,
333 int offset)
334{
335 static bfd_boolean cached = FALSE;
336 static bfd_vma cached_value = 0;
337
338 if (!cached)
339 {
340 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
341 cached = TRUE;
342 }
343 return cached_value;
344}
345
346#define NUM_STACK_ENTRIES 16
347static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
348static unsigned int rl78_stack_top;
349
350#define RL78_STACK_PUSH(val) \
351 do \
352 { \
353 if (rl78_stack_top < NUM_STACK_ENTRIES) \
354 rl78_stack [rl78_stack_top ++] = (val); \
355 else \
356 r = bfd_reloc_dangerous; \
357 } \
358 while (0)
359
360#define RL78_STACK_POP(dest) \
361 do \
362 { \
363 if (rl78_stack_top > 0) \
364 (dest) = rl78_stack [-- rl78_stack_top]; \
365 else \
366 (dest) = 0, r = bfd_reloc_dangerous; \
367 } \
368 while (0)
369
370/* Relocate an RL78 ELF section.
371 There is some attempt to make this function usable for many architectures,
372 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
373 if only to serve as a learning tool.
374
375 The RELOCATE_SECTION function is called by the new ELF backend linker
376 to handle the relocations for a section.
377
378 The relocs are always passed as Rela structures; if the section
379 actually uses Rel structures, the r_addend field will always be
380 zero.
381
382 This function is responsible for adjusting the section contents as
383 necessary, and (if using Rela relocs and generating a relocatable
384 output file) adjusting the reloc addend as necessary.
385
386 This function does not have to worry about setting the reloc
387 address or the reloc symbol index.
388
389 LOCAL_SYMS is a pointer to the swapped in local symbols.
390
391 LOCAL_SECTIONS is an array giving the section in the input file
392 corresponding to the st_shndx field of each local symbol.
393
394 The global hash table entry for the global symbols can be found
395 via elf_sym_hashes (input_bfd).
396
397 When generating relocatable output, this function must handle
398 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
399 going to be the section symbol corresponding to the output
400 section, which means that the addend must be adjusted
401 accordingly. */
402
403static bfd_boolean
404rl78_elf_relocate_section
405 (bfd * output_bfd,
406 struct bfd_link_info * info,
407 bfd * input_bfd,
408 asection * input_section,
409 bfd_byte * contents,
410 Elf_Internal_Rela * relocs,
411 Elf_Internal_Sym * local_syms,
412 asection ** local_sections)
413{
414 Elf_Internal_Shdr * symtab_hdr;
415 struct elf_link_hash_entry ** sym_hashes;
416 Elf_Internal_Rela * rel;
417 Elf_Internal_Rela * relend;
418 bfd *dynobj;
419 asection *splt;
420
421 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
422 sym_hashes = elf_sym_hashes (input_bfd);
423 relend = relocs + input_section->reloc_count;
424
425 dynobj = elf_hash_table (info)->dynobj;
426 splt = NULL;
427 if (dynobj != NULL)
3d4d4302 428 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 429
430 for (rel = relocs; rel < relend; rel ++)
431 {
432 reloc_howto_type * howto;
433 unsigned long r_symndx;
434 Elf_Internal_Sym * sym;
435 asection * sec;
436 struct elf_link_hash_entry * h;
437 bfd_vma relocation;
438 bfd_reloc_status_type r;
439 const char * name = NULL;
440 bfd_boolean unresolved_reloc = TRUE;
441 int r_type;
442
443 r_type = ELF32_R_TYPE (rel->r_info);
444 r_symndx = ELF32_R_SYM (rel->r_info);
445
446 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
447 h = NULL;
448 sym = NULL;
449 sec = NULL;
450 relocation = 0;
451
452 if (r_symndx < symtab_hdr->sh_info)
453 {
454 sym = local_syms + r_symndx;
455 sec = local_sections [r_symndx];
456 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
457
458 name = bfd_elf_string_from_elf_section
459 (input_bfd, symtab_hdr->sh_link, sym->st_name);
460 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
461 }
462 else
463 {
464 bfd_boolean warned;
465
466 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
467 r_symndx, symtab_hdr, sym_hashes, h,
468 sec, relocation, unresolved_reloc,
469 warned);
470
471 name = h->root.root.string;
472 }
473
dbaa2011 474 if (sec != NULL && discarded_section (sec))
99c513f6 475 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 476 rel, 1, relend, howto, 0, contents);
99c513f6
DD		 477
478 if (info->relocatable)
479 {
480 /* This is a relocatable link. We don't have to change
481 anything, unless the reloc is against a section symbol,
482 in which case we have to adjust according to where the
483 section symbol winds up in the output section. */
484 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
485 rel->r_addend += sec->output_offset;
486 continue;
487 }
488
489 switch (ELF32_R_TYPE (rel->r_info))
490 {
491 case R_RL78_DIR16S:
492 {
493 bfd_vma *plt_offset;
494
495 if (h != NULL)
496 plt_offset = &h->plt.offset;
497 else
498 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
499
9cea966c 500 if (! valid_16bit_address (relocation))
99c513f6 501 {
99c513f6
DD		 502 /* If this is the first time we've processed this symbol,
503 fill in the plt entry with the correct symbol address. */
504 if ((*plt_offset & 1) == 0)
505 {
506 unsigned int x;
507
508 x = 0x000000ec; /* br !!abs24 */
509 x |= (relocation << 8) & 0xffffff00;
510 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
511 *plt_offset |= 1;
512 }
513
514 relocation = (splt->output_section->vma
515 + splt->output_offset
516 + (*plt_offset & -2));
517 if (name)
518 {
519 char *newname = bfd_malloc (strlen(name)+5);
520 strcpy (newname, name);
521 strcat(newname, ".plt");
522 _bfd_generic_link_add_one_symbol (info,
523 input_bfd,
524 newname,
525 BSF_FUNCTION | BSF_WEAK,
526 splt,
527 (*plt_offset & -2),
528 0,
529 1,
530 0,
531 0);
532 }
533 }
534 }
535 break;
536 }
537
538 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
539 /* If the symbol is undefined and weak
540 then the relocation resolves to zero. */
541 relocation = 0;
542 else
543 {
544 if (howto->pc_relative)
545 {
546 relocation -= (input_section->output_section->vma
547 + input_section->output_offset
548 + rel->r_offset);
549 relocation -= bfd_get_reloc_size (howto);
550 }
551
552 relocation += rel->r_addend;
553 }
554
555 r = bfd_reloc_ok;
556
557#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
558#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
559#define OP(i) (contents[rel->r_offset + (i)])
560
561 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
562 switch (r_type)
563 {
564 case R_RL78_NONE:
565 break;
566
9cea966c
DD		 567 case R_RL78_RH_RELAX:
568 break;
569
99c513f6
DD		 570 case R_RL78_DIR8S_PCREL:
571 RANGE (-128, 127);
572 OP (0) = relocation;
573 break;
574
575 case R_RL78_DIR8S:
576 RANGE (-128, 255);
577 OP (0) = relocation;
578 break;
579
580 case R_RL78_DIR8U:
581 RANGE (0, 255);
582 OP (0) = relocation;
583 break;
584
585 case R_RL78_DIR16S_PCREL:
586 RANGE (-32768, 32767);
587 OP (0) = relocation;
588 OP (1) = relocation >> 8;
589 break;
590
591 case R_RL78_DIR16S:
592 if ((relocation & 0xf0000) == 0xf0000)
593 relocation &= 0xffff;
594 RANGE (-32768, 65535);
595 OP (0) = relocation;
596 OP (1) = relocation >> 8;
597 break;
598
599 case R_RL78_DIR16U:
600 RANGE (0, 65536);
601 OP (0) = relocation;
602 OP (1) = relocation >> 8;
603 break;
604
605 case R_RL78_DIR16:
606 RANGE (-32768, 65536);
607 OP (0) = relocation;
608 OP (1) = relocation >> 8;
609 break;
610
611 case R_RL78_DIR16_REV:
612 RANGE (-32768, 65536);
613 OP (1) = relocation;
614 OP (0) = relocation >> 8;
615 break;
616
617 case R_RL78_DIR3U_PCREL:
618 RANGE (3, 10);
619 OP (0) &= 0xf8;
620 OP (0) |= relocation & 0x07;
621 break;
622
623 case R_RL78_DIR24S_PCREL:
624 RANGE (-0x800000, 0x7fffff);
625 OP (0) = relocation;
626 OP (1) = relocation >> 8;
627 OP (2) = relocation >> 16;
628 break;
629
630 case R_RL78_DIR24S:
631 RANGE (-0x800000, 0x7fffff);
632 OP (0) = relocation;
633 OP (1) = relocation >> 8;
634 OP (2) = relocation >> 16;
635 break;
636
637 case R_RL78_DIR32:
638 OP (0) = relocation;
639 OP (1) = relocation >> 8;
640 OP (2) = relocation >> 16;
641 OP (3) = relocation >> 24;
642 break;
643
644 case R_RL78_DIR32_REV:
645 OP (3) = relocation;
646 OP (2) = relocation >> 8;
647 OP (1) = relocation >> 16;
648 OP (0) = relocation >> 24;
649 break;
650
9cea966c 651 case R_RL78_RH_SFR:
9cea966c
DD		 652 RANGE (0xfff00, 0xfffff);
653 OP (0) = relocation & 0xff;
654 break;
655
656 case R_RL78_RH_SADDR:
9cea966c
DD		 657 RANGE (0xffe20, 0xfff1f);
658 OP (0) = relocation & 0xff;
9cea966c
DD		 659 break;
660
99c513f6
DD		 661 /* Complex reloc handling: */
662
663 case R_RL78_ABS32:
664 RL78_STACK_POP (relocation);
665 OP (0) = relocation;
666 OP (1) = relocation >> 8;
667 OP (2) = relocation >> 16;
668 OP (3) = relocation >> 24;
669 break;
670
671 case R_RL78_ABS32_REV:
672 RL78_STACK_POP (relocation);
673 OP (3) = relocation;
674 OP (2) = relocation >> 8;
675 OP (1) = relocation >> 16;
676 OP (0) = relocation >> 24;
677 break;
678
679 case R_RL78_ABS24S_PCREL:
680 case R_RL78_ABS24S:
681 RL78_STACK_POP (relocation);
682 RANGE (-0x800000, 0x7fffff);
683 OP (0) = relocation;
684 OP (1) = relocation >> 8;
685 OP (2) = relocation >> 16;
686 break;
687
688 case R_RL78_ABS16:
689 RL78_STACK_POP (relocation);
690 RANGE (-32768, 65535);
691 OP (0) = relocation;
692 OP (1) = relocation >> 8;
693 break;
694
695 case R_RL78_ABS16_REV:
696 RL78_STACK_POP (relocation);
697 RANGE (-32768, 65535);
698 OP (1) = relocation;
699 OP (0) = relocation >> 8;
700 break;
701
702 case R_RL78_ABS16S_PCREL:
703 case R_RL78_ABS16S:
704 RL78_STACK_POP (relocation);
705 RANGE (-32768, 32767);
706 OP (0) = relocation;
707 OP (1) = relocation >> 8;
708 break;
709
710 case R_RL78_ABS16U:
711 RL78_STACK_POP (relocation);
712 RANGE (0, 65536);
713 OP (0) = relocation;
714 OP (1) = relocation >> 8;
715 break;
716
717 case R_RL78_ABS16UL:
718 RL78_STACK_POP (relocation);
719 relocation >>= 2;
720 RANGE (0, 65536);
721 OP (0) = relocation;
722 OP (1) = relocation >> 8;
723 break;
724
725 case R_RL78_ABS16UW:
726 RL78_STACK_POP (relocation);
727 relocation >>= 1;
728 RANGE (0, 65536);
729 OP (0) = relocation;
730 OP (1) = relocation >> 8;
731 break;
732
733 case R_RL78_ABS8:
734 RL78_STACK_POP (relocation);
735 RANGE (-128, 255);
736 OP (0) = relocation;
737 break;
738
739 case R_RL78_ABS8U:
740 RL78_STACK_POP (relocation);
741 RANGE (0, 255);
742 OP (0) = relocation;
743 break;
744
745 case R_RL78_ABS8UL:
746 RL78_STACK_POP (relocation);
747 relocation >>= 2;
748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RL78_ABS8UW:
753 RL78_STACK_POP (relocation);
754 relocation >>= 1;
755 RANGE (0, 255);
756 OP (0) = relocation;
757 break;
758
759 case R_RL78_ABS8S_PCREL:
760 case R_RL78_ABS8S:
761 RL78_STACK_POP (relocation);
762 RANGE (-128, 127);
763 OP (0) = relocation;
764 break;
765
766 case R_RL78_SYM:
767 if (r_symndx < symtab_hdr->sh_info)
768 RL78_STACK_PUSH (sec->output_section->vma
769 + sec->output_offset
770 + sym->st_value
771 + rel->r_addend);
772 else
773 {
774 if (h != NULL
775 && (h->root.type == bfd_link_hash_defined
776 || h->root.type == bfd_link_hash_defweak))
777 RL78_STACK_PUSH (h->root.u.def.value
778 + sec->output_section->vma
779 + sec->output_offset
780 + rel->r_addend);
781 else
782 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
783 }
784 break;
785
786 case R_RL78_OPneg:
787 {
788 int32_t tmp;
789
790 RL78_STACK_POP (tmp);
791 tmp = - tmp;
792 RL78_STACK_PUSH (tmp);
793 }
794 break;
795
796 case R_RL78_OPadd:
797 {
798 int32_t tmp1, tmp2;
799
800 RL78_STACK_POP (tmp2);
801 RL78_STACK_POP (tmp1);
802 tmp1 += tmp2;
803 RL78_STACK_PUSH (tmp1);
804 }
805 break;
806
807 case R_RL78_OPsub:
808 {
809 int32_t tmp1, tmp2;
810
811 RL78_STACK_POP (tmp2);
812 RL78_STACK_POP (tmp1);
813 tmp2 -= tmp1;
814 RL78_STACK_PUSH (tmp2);
815 }
816 break;
817
818 case R_RL78_OPmul:
819 {
820 int32_t tmp1, tmp2;
821
822 RL78_STACK_POP (tmp2);
823 RL78_STACK_POP (tmp1);
824 tmp1 *= tmp2;
825 RL78_STACK_PUSH (tmp1);
826 }
827 break;
828
829 case R_RL78_OPdiv:
830 {
831 int32_t tmp1, tmp2;
832
833 RL78_STACK_POP (tmp2);
834 RL78_STACK_POP (tmp1);
835 tmp1 /= tmp2;
836 RL78_STACK_PUSH (tmp1);
837 }
838 break;
839
840 case R_RL78_OPshla:
841 {
842 int32_t tmp1, tmp2;
843
844 RL78_STACK_POP (tmp2);
845 RL78_STACK_POP (tmp1);
846 tmp1 <<= tmp2;
847 RL78_STACK_PUSH (tmp1);
848 }
849 break;
850
851 case R_RL78_OPshra:
852 {
853 int32_t tmp1, tmp2;
854
855 RL78_STACK_POP (tmp2);
856 RL78_STACK_POP (tmp1);
857 tmp1 >>= tmp2;
858 RL78_STACK_PUSH (tmp1);
859 }
860 break;
861
862 case R_RL78_OPsctsize:
863 RL78_STACK_PUSH (input_section->size);
864 break;
865
866 case R_RL78_OPscttop:
867 RL78_STACK_PUSH (input_section->output_section->vma);
868 break;
869
870 case R_RL78_OPand:
871 {
872 int32_t tmp1, tmp2;
873
874 RL78_STACK_POP (tmp2);
875 RL78_STACK_POP (tmp1);
876 tmp1 &= tmp2;
877 RL78_STACK_PUSH (tmp1);
878 }
879 break;
880
881 case R_RL78_OPor:
882 {
883 int32_t tmp1, tmp2;
884
885 RL78_STACK_POP (tmp2);
886 RL78_STACK_POP (tmp1);
887 tmp1 |= tmp2;
888 RL78_STACK_PUSH (tmp1);
889 }
890 break;
891
892 case R_RL78_OPxor:
893 {
894 int32_t tmp1, tmp2;
895
896 RL78_STACK_POP (tmp2);
897 RL78_STACK_POP (tmp1);
898 tmp1 ^= tmp2;
899 RL78_STACK_PUSH (tmp1);
900 }
901 break;
902
903 case R_RL78_OPnot:
904 {
905 int32_t tmp;
906
907 RL78_STACK_POP (tmp);
908 tmp = ~ tmp;
909 RL78_STACK_PUSH (tmp);
910 }
911 break;
912
913 case R_RL78_OPmod:
914 {
915 int32_t tmp1, tmp2;
916
917 RL78_STACK_POP (tmp2);
918 RL78_STACK_POP (tmp1);
919 tmp1 %= tmp2;
920 RL78_STACK_PUSH (tmp1);
921 }
922 break;
923
924 case R_RL78_OPromtop:
925 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
926 break;
927
928 case R_RL78_OPramtop:
929 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
930 break;
931
932 default:
933 r = bfd_reloc_notsupported;
934 break;
935 }
936
937 if (r != bfd_reloc_ok)
938 {
939 const char * msg = NULL;
940
941 switch (r)
942 {
943 case bfd_reloc_overflow:
944 /* Catch the case of a missing function declaration
945 and emit a more helpful error message. */
946 if (r_type == R_RL78_DIR24S_PCREL)
947 msg = _("%B(%A): error: call to undefined function '%s'");
948 else
949 r = info->callbacks->reloc_overflow
950 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
951 input_bfd, input_section, rel->r_offset);
952 break;
953
954 case bfd_reloc_undefined:
955 r = info->callbacks->undefined_symbol
956 (info, name, input_bfd, input_section, rel->r_offset,
957 TRUE);
958 break;
959
960 case bfd_reloc_other:
961 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
962 break;
963
964 case bfd_reloc_outofrange:
965 msg = _("%B(%A): internal error: out of range error");
966 break;
967
968 case bfd_reloc_notsupported:
969 msg = _("%B(%A): internal error: unsupported relocation error");
970 break;
971
972 case bfd_reloc_dangerous:
973 msg = _("%B(%A): internal error: dangerous relocation");
974 break;
975
976 default:
977 msg = _("%B(%A): internal error: unknown error");
978 break;
979 }
980
981 if (msg)
982 _bfd_error_handler (msg, input_bfd, input_section, name);
983
984 if (! r)
985 return FALSE;
986 }
987 }
988
989 return TRUE;
990}
991\f
992/* Function to set the ELF flag bits. */
993
994static bfd_boolean
995rl78_elf_set_private_flags (bfd * abfd, flagword flags)
996{
997 elf_elfheader (abfd)->e_flags = flags;
998 elf_flags_init (abfd) = TRUE;
999 return TRUE;
1000}
1001
1002static bfd_boolean no_warn_mismatch = FALSE;
1003
1004void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1005
1006void
1007bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1008{
1009 no_warn_mismatch = user_no_warn_mismatch;
1010}
1011
1012/* Merge backend specific data from an object file to the output
1013 object file when linking. */
1014
1015static bfd_boolean
1016rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1017{
99c513f6
DD		 1018 flagword new_flags;
1019 bfd_boolean error = FALSE;
1020
1021 new_flags = elf_elfheader (ibfd)->e_flags;
99c513f6
DD		 1022
1023 if (!elf_flags_init (obfd))
1024 {
1025 /* First call, no flags set. */
1026 elf_flags_init (obfd) = TRUE;
1027 elf_elfheader (obfd)->e_flags = new_flags;
1028 }
1029
1030 return !error;
1031}
1032\f
1033static bfd_boolean
1034rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1035{
1036 FILE * file = (FILE *) ptr;
1037 flagword flags;
1038
1039 BFD_ASSERT (abfd != NULL && ptr != NULL);
1040
1041 /* Print normal ELF private data. */
1042 _bfd_elf_print_private_bfd_data (abfd, ptr);
1043
1044 flags = elf_elfheader (abfd)->e_flags;
1045 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1046
1047 fputc ('\n', file);
1048 return TRUE;
1049}
1050
1051/* Return the MACH for an e_flags value. */
1052
1053static int
1054elf32_rl78_machine (bfd * abfd)
1055{
1056 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1057 return bfd_mach_rl78;
1058
1059 return 0;
1060}
1061
1062static bfd_boolean
1063rl78_elf_object_p (bfd * abfd)
1064{
1065 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1066 elf32_rl78_machine (abfd));
1067 return TRUE;
1068}
1069 \f
1070#ifdef DEBUG
1071void
1072rl78_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
1073{
1074 size_t locsymcount;
1075 Elf_Internal_Sym * isymbuf;
1076 Elf_Internal_Sym * isymend;
1077 Elf_Internal_Sym * isym;
1078 Elf_Internal_Shdr * symtab_hdr;
1079 bfd_boolean free_internal = FALSE, free_external = FALSE;
1080 char * st_info_str;
1081 char * st_info_stb_str;
1082 char * st_other_str;
1083 char * st_shndx_str;
1084
1085 if (! internal_syms)
1086 {
1087 internal_syms = bfd_malloc (1000);
1088 free_internal = 1;
1089 }
1090 if (! external_syms)
1091 {
1092 external_syms = bfd_malloc (1000);
1093 free_external = 1;
1094 }
1095
1096 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1097 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
1098 if (free_internal)
1099 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1100 symtab_hdr->sh_info, 0,
1101 internal_syms, external_syms, NULL);
1102 else
1103 isymbuf = internal_syms;
1104 isymend = isymbuf + locsymcount;
1105
1106 for (isym = isymbuf ; isym < isymend ; isym++)
1107 {
1108 switch (ELF_ST_TYPE (isym->st_info))
1109 {
1110 case STT_FUNC: st_info_str = "STT_FUNC";
1111 case STT_SECTION: st_info_str = "STT_SECTION";
1112 case STT_FILE: st_info_str = "STT_FILE";
1113 case STT_OBJECT: st_info_str = "STT_OBJECT";
1114 case STT_TLS: st_info_str = "STT_TLS";
1115 default: st_info_str = "";
1116 }
1117 switch (ELF_ST_BIND (isym->st_info))
1118 {
1119 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
1120 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
1121 default: st_info_stb_str = "";
1122 }
1123 switch (ELF_ST_VISIBILITY (isym->st_other))
1124 {
1125 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
1126 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
1127 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
1128 default: st_other_str = "";
1129 }
1130 switch (isym->st_shndx)
1131 {
1132 case SHN_ABS: st_shndx_str = "SHN_ABS";
1133 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
1134 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
1135 default: st_shndx_str = "";
1136 }
99c513f6
DD		 1137 }
1138 if (free_internal)
1139 free (internal_syms);
1140 if (free_external)
1141 free (external_syms);
1142}
1143
1144char *
1145rl78_get_reloc (long reloc)
1146{
1147 if (0 <= reloc && reloc < R_RL78_max)
1148 return rl78_elf_howto_table[reloc].name;
1149 return "";
1150}
1151#endif /* DEBUG */
1152
1153\f
1154/* support PLT for 16-bit references to 24-bit functions. */
1155
1156/* We support 16-bit pointers to code above 64k by generating a thunk
1157 below 64k containing a JMP instruction to the final address. */
68ffbac6 1158
99c513f6
DD		 1159static bfd_boolean
1160rl78_elf_check_relocs
1161 (bfd * abfd,
1162 struct bfd_link_info * info,
1163 asection * sec,
1164 const Elf_Internal_Rela * relocs)
1165{
1166 Elf_Internal_Shdr * symtab_hdr;
1167 struct elf_link_hash_entry ** sym_hashes;
1168 const Elf_Internal_Rela * rel;
1169 const Elf_Internal_Rela * rel_end;
1170 bfd_vma *local_plt_offsets;
1171 asection *splt;
1172 bfd *dynobj;
1173
1174 if (info->relocatable)
1175 return TRUE;
68ffbac6 1176
99c513f6
DD		 1177 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1178 sym_hashes = elf_sym_hashes (abfd);
1179 local_plt_offsets = elf_local_got_offsets (abfd);
1180 splt = NULL;
1181 dynobj = elf_hash_table(info)->dynobj;
1182
1183 rel_end = relocs + sec->reloc_count;
1184 for (rel = relocs; rel < rel_end; rel++)
1185 {
1186 struct elf_link_hash_entry *h;
1187 unsigned long r_symndx;
1188 bfd_vma *offset;
68ffbac6 1189
99c513f6
DD		 1190 r_symndx = ELF32_R_SYM (rel->r_info);
1191 if (r_symndx < symtab_hdr->sh_info)
1192 h = NULL;
1193 else
1194 {
1195 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1196 while (h->root.type == bfd_link_hash_indirect
1197 || h->root.type == bfd_link_hash_warning)
1198 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1199 }
68ffbac6 1200
99c513f6
DD		 1201 switch (ELF32_R_TYPE (rel->r_info))
1202 {
1203 /* This relocation describes a 16-bit pointer to a function.
1204 We may need to allocate a thunk in low memory; reserve memory
1205 for it now. */
1206 case R_RL78_DIR16S:
1207 if (dynobj == NULL)
1208 elf_hash_table (info)->dynobj = dynobj = abfd;
1209 if (splt == NULL)
1210 {
3d4d4302 1211 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1212 if (splt == NULL)
1213 {
1214 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1215 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1216 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1217 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1218 flags);
99c513f6
DD		 1219 if (splt == NULL
1220 || ! bfd_set_section_alignment (dynobj, splt, 1))
1221 return FALSE;
1222 }
1223 }
1224
1225 if (h != NULL)
1226 offset = &h->plt.offset;
1227 else
1228 {
1229 if (local_plt_offsets == NULL)
1230 {
1231 size_t size;
1232 unsigned int i;
1233
1234 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1235 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1236 if (local_plt_offsets == NULL)
1237 return FALSE;
1238 elf_local_got_offsets (abfd) = local_plt_offsets;
1239
1240 for (i = 0; i < symtab_hdr->sh_info; i++)
1241 local_plt_offsets[i] = (bfd_vma) -1;
1242 }
1243 offset = &local_plt_offsets[r_symndx];
1244 }
1245
1246 if (*offset == (bfd_vma) -1)
1247 {
1248 *offset = splt->size;
1249 splt->size += 4;
1250 }
1251 break;
1252 }
1253 }
68ffbac6 1254
99c513f6
DD		 1255 return TRUE;
1256}
1257
1258/* This must exist if dynobj is ever set. */
1259
1260static bfd_boolean
1261rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1262 struct bfd_link_info *info)
1263{
1264 bfd *dynobj;
1265 asection *splt;
1266
9cea966c
DD		 1267 /* As an extra sanity check, verify that all plt entries have been
1268 filled in. However, relaxing might have changed the relocs so
1269 that some plt entries don't get filled in, so we have to skip
1270 this check if we're relaxing. Unfortunately, check_relocs is
1271 called before relaxation. */
99c513f6 1272
9cea966c 1273 if (info->relax_trip > 0)
99c513f6 1274 {
9cea966c 1275 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
3d4d4302 1276 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1277 {
9cea966c
DD		 1278 bfd_byte *contents = splt->contents;
1279 unsigned int i, size = splt->size;
1280 for (i = 0; i < size; i += 4)
1281 {
1282 unsigned int x = bfd_get_32 (dynobj, contents + i);
1283 BFD_ASSERT (x != 0);
1284 }
99c513f6
DD		 1285 }
1286 }
1287
1288 return TRUE;
1289}
1290
1291static bfd_boolean
1292rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1293 struct bfd_link_info *info)
1294{
1295 bfd *dynobj;
1296 asection *splt;
1297
1298 if (info->relocatable)
1299 return TRUE;
1300
1301 dynobj = elf_hash_table (info)->dynobj;
1302 if (dynobj == NULL)
1303 return TRUE;
1304
3d4d4302 1305 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1306 BFD_ASSERT (splt != NULL);
1307
1308 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1309 if (splt->contents == NULL)
1310 return FALSE;
1311
1312 return TRUE;
1313}
1314
1315\f
1316
1317/* Handle relaxing. */
1318
1319/* A subroutine of rl78_elf_relax_section. If the global symbol H
1320 is within the low 64k, remove any entry for it in the plt. */
1321
1322struct relax_plt_data
1323{
1324 asection *splt;
1325 bfd_boolean *again;
1326};
1327
1328static bfd_boolean
2c3fc389 1329rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1330{
1331 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1332
1333 if (h->plt.offset != (bfd_vma) -1)
1334 {
1335 bfd_vma address;
1336
1337 if (h->root.type == bfd_link_hash_undefined
1338 || h->root.type == bfd_link_hash_undefweak)
1339 address = 0;
1340 else
1341 address = (h->root.u.def.section->output_section->vma
1342 + h->root.u.def.section->output_offset
1343 + h->root.u.def.value);
1344
1345 if (valid_16bit_address (address))
1346 {
1347 h->plt.offset = -1;
1348 data->splt->size -= 4;
1349 *data->again = TRUE;
1350 }
1351 }
1352
1353 return TRUE;
1354}
1355
1356/* A subroutine of rl78_elf_relax_section. If the global symbol H
1357 previously had a plt entry, give it a new entry offset. */
1358
1359static bfd_boolean
2c3fc389 1360rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1361{
1362 bfd_vma *entry = (bfd_vma *) xdata;
1363
1364 if (h->plt.offset != (bfd_vma) -1)
1365 {
1366 h->plt.offset = *entry;
1367 *entry += 4;
1368 }
1369
1370 return TRUE;
1371}
1372
1373static bfd_boolean
1374rl78_elf_relax_plt_section (bfd *dynobj,
1375 asection *splt,
1376 struct bfd_link_info *info,
1377 bfd_boolean *again)
1378{
1379 struct relax_plt_data relax_plt_data;
1380 bfd *ibfd;
1381
1382 /* Assume nothing changes. */
1383 *again = FALSE;
1384
1385 if (info->relocatable)
1386 return TRUE;
1387
1388 /* We only relax the .plt section at the moment. */
1389 if (dynobj != elf_hash_table (info)->dynobj
1390 || strcmp (splt->name, ".plt") != 0)
1391 return TRUE;
1392
1393 /* Quick check for an empty plt. */
1394 if (splt->size == 0)
1395 return TRUE;
1396
1397 /* Map across all global symbols; see which ones happen to
1398 fall in the low 64k. */
1399 relax_plt_data.splt = splt;
1400 relax_plt_data.again = again;
1401 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1402 &relax_plt_data);
1403
1404 /* Likewise for local symbols, though that's somewhat less convenient
1405 as we have to walk the list of input bfds and swap in symbol data. */
1406 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1407 {
1408 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1409 Elf_Internal_Shdr *symtab_hdr;
1410 Elf_Internal_Sym *isymbuf = NULL;
1411 unsigned int idx;
1412
1413 if (! local_plt_offsets)
1414 continue;
1415
1416 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1417 if (symtab_hdr->sh_info != 0)
1418 {
1419 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1420 if (isymbuf == NULL)
1421 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1422 symtab_hdr->sh_info, 0,
1423 NULL, NULL, NULL);
1424 if (isymbuf == NULL)
1425 return FALSE;
1426 }
1427
1428 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1429 {
1430 Elf_Internal_Sym *isym;
1431 asection *tsec;
1432 bfd_vma address;
1433
1434 if (local_plt_offsets[idx] == (bfd_vma) -1)
1435 continue;
1436
1437 isym = &isymbuf[idx];
1438 if (isym->st_shndx == SHN_UNDEF)
1439 continue;
1440 else if (isym->st_shndx == SHN_ABS)
1441 tsec = bfd_abs_section_ptr;
1442 else if (isym->st_shndx == SHN_COMMON)
1443 tsec = bfd_com_section_ptr;
1444 else
1445 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1446
1447 address = (tsec->output_section->vma
1448 + tsec->output_offset
1449 + isym->st_value);
1450 if (valid_16bit_address (address))
1451 {
1452 local_plt_offsets[idx] = -1;
1453 splt->size -= 4;
1454 *again = TRUE;
1455 }
1456 }
1457
1458 if (isymbuf != NULL
1459 && symtab_hdr->contents != (unsigned char *) isymbuf)
1460 {
1461 if (! info->keep_memory)
1462 free (isymbuf);
1463 else
1464 {
1465 /* Cache the symbols for elf_link_input_bfd. */
1466 symtab_hdr->contents = (unsigned char *) isymbuf;
1467 }
1468 }
1469 }
1470
1471 /* If we changed anything, walk the symbols again to reallocate
1472 .plt entry addresses. */
1473 if (*again && splt->size > 0)
1474 {
1475 bfd_vma entry = 0;
1476
1477 elf_link_hash_traverse (elf_hash_table (info),
1478 rl78_relax_plt_realloc, &entry);
1479
1480 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1481 {
1482 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1483 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1484 unsigned int idx;
1485
1486 if (! local_plt_offsets)
1487 continue;
1488
1489 for (idx = 0; idx < nlocals; ++idx)
1490 if (local_plt_offsets[idx] != (bfd_vma) -1)
1491 {
1492 local_plt_offsets[idx] = entry;
1493 entry += 4;
1494 }
1495 }
1496 }
1497
1498 return TRUE;
1499}
1500
9cea966c
DD		 1501/* Delete some bytes from a section while relaxing. */
1502
1503static bfd_boolean
1504elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1505 Elf_Internal_Rela *alignment_rel, int force_snip)
1506{
1507 Elf_Internal_Shdr * symtab_hdr;
1508 unsigned int sec_shndx;
1509 bfd_byte * contents;
1510 Elf_Internal_Rela * irel;
1511 Elf_Internal_Rela * irelend;
1512 Elf_Internal_Sym * isym;
1513 Elf_Internal_Sym * isymend;
1514 bfd_vma toaddr;
1515 unsigned int symcount;
1516 struct elf_link_hash_entry ** sym_hashes;
1517 struct elf_link_hash_entry ** end_hashes;
1518
1519 if (!alignment_rel)
1520 force_snip = 1;
1521
1522 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1523
1524 contents = elf_section_data (sec)->this_hdr.contents;
1525
1526 /* The deletion must stop at the next alignment boundary, if
1527 ALIGNMENT_REL is non-NULL. */
1528 toaddr = sec->size;
1529 if (alignment_rel)
1530 toaddr = alignment_rel->r_offset;
1531
1532 irel = elf_section_data (sec)->relocs;
1533 irelend = irel + sec->reloc_count;
1534
1535 /* Actually delete the bytes. */
1536 memmove (contents + addr, contents + addr + count,
1537 (size_t) (toaddr - addr - count));
1538
1539 /* If we don't have an alignment marker to worry about, we can just
1540 shrink the section. Otherwise, we have to fill in the newly
1541 created gap with NOP insns (0x03). */
1542 if (force_snip)
1543 sec->size -= count;
1544 else
1545 memset (contents + toaddr - count, 0x03, count);
1546
1547 /* Adjust all the relocs. */
1548 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1549 {
1550 /* Get the new reloc address. */
1551 if (irel->r_offset > addr
1552 && (irel->r_offset < toaddr
1553 || (force_snip && irel->r_offset == toaddr)))
1554 irel->r_offset -= count;
1555
1556 /* If we see an ALIGN marker at the end of the gap, we move it
1557 to the beginning of the gap, since marking these gaps is what
1558 they're for. */
1559 if (irel->r_offset == toaddr
1560 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1561 && irel->r_addend & RL78_RELAXA_ALIGN)
1562 irel->r_offset -= count;
1563 }
1564
1565 /* Adjust the local symbols defined in this section. */
1566 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1567 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1568 isymend = isym + symtab_hdr->sh_info;
1569
1570 for (; isym < isymend; isym++)
1571 {
1572 /* If the symbol is in the range of memory we just moved, we
1573 have to adjust its value. */
1574 if (isym->st_shndx == sec_shndx
1575 && isym->st_value > addr
1576 && isym->st_value < toaddr)
1577 isym->st_value -= count;
1578
1579 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1580 *end* is in the moved bytes but it's *start* isn't), then we
1581 must adjust its size. */
1582 if (isym->st_shndx == sec_shndx
1583 && isym->st_value < addr
1584 && isym->st_value + isym->st_size > addr
1585 && isym->st_value + isym->st_size < toaddr)
1586 isym->st_size -= count;
1587 }
1588
1589 /* Now adjust the global symbols defined in this section. */
1590 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1591 - symtab_hdr->sh_info);
1592 sym_hashes = elf_sym_hashes (abfd);
1593 end_hashes = sym_hashes + symcount;
1594
1595 for (; sym_hashes < end_hashes; sym_hashes++)
1596 {
1597 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1598
1599 if ((sym_hash->root.type == bfd_link_hash_defined
1600 || sym_hash->root.type == bfd_link_hash_defweak)
1601 && sym_hash->root.u.def.section == sec)
1602 {
1603 /* As above, adjust the value if needed. */
1604 if (sym_hash->root.u.def.value > addr
1605 && sym_hash->root.u.def.value < toaddr)
1606 sym_hash->root.u.def.value -= count;
1607
1608 /* As above, adjust the size if needed. */
1609 if (sym_hash->root.u.def.value < addr
1610 && sym_hash->root.u.def.value + sym_hash->size > addr
1611 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1612 sym_hash->size -= count;
1613 }
1614 }
1615
1616 return TRUE;
1617}
1618
1619/* Used to sort relocs by address. If relocs have the same address,
1620 we maintain their relative order, except that R_RL78_RH_RELAX
1621 alignment relocs must be the first reloc for any given address. */
1622
1623static void
1624reloc_bubblesort (Elf_Internal_Rela * r, int count)
1625{
1626 int i;
1627 bfd_boolean again;
1628 bfd_boolean swappit;
1629
1630 /* This is almost a classic bubblesort. It's the slowest sort, but
1631 we're taking advantage of the fact that the relocations are
1632 mostly in order already (the assembler emits them that way) and
1633 we need relocs with the same address to remain in the same
1634 relative order. */
1635 again = TRUE;
1636 while (again)
1637 {
1638 again = FALSE;
1639 for (i = 0; i < count - 1; i ++)
1640 {
1641 if (r[i].r_offset > r[i + 1].r_offset)
1642 swappit = TRUE;
1643 else if (r[i].r_offset < r[i + 1].r_offset)
1644 swappit = FALSE;
1645 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1646 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1647 swappit = TRUE;
1648 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1649 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1650 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1651 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1652 swappit = TRUE;
1653 else
1654 swappit = FALSE;
1655
1656 if (swappit)
1657 {
1658 Elf_Internal_Rela tmp;
1659
1660 tmp = r[i];
1661 r[i] = r[i + 1];
1662 r[i + 1] = tmp;
1663 /* If we do move a reloc back, re-scan to see if it
1664 needs to be moved even further back. This avoids
1665 most of the O(n^2) behavior for our cases. */
1666 if (i > 0)
1667 i -= 2;
1668 again = TRUE;
1669 }
1670 }
1671 }
1672}
1673
1674
1675#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1676 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1677 lrel, abfd, sec, link_info, scale)
1678
1679static bfd_vma
1680rl78_offset_for_reloc (bfd * abfd,
1681 Elf_Internal_Rela * rel,
1682 Elf_Internal_Shdr * symtab_hdr,
1683 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1684 Elf_Internal_Sym * intsyms,
1685 Elf_Internal_Rela ** lrel,
1686 bfd * input_bfd,
1687 asection * input_section,
1688 struct bfd_link_info * info,
1689 int * scale)
1690{
1691 bfd_vma symval;
1692 bfd_reloc_status_type r;
1693
1694 *scale = 1;
1695
1696 /* REL is the first of 1..N relocations. We compute the symbol
1697 value for each relocation, then combine them if needed. LREL
1698 gets a pointer to the last relocation used. */
1699 while (1)
1700 {
1701 int32_t tmp1, tmp2;
1702
1703 /* Get the value of the symbol referred to by the reloc. */
1704 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1705 {
1706 /* A local symbol. */
1707 Elf_Internal_Sym *isym;
1708 asection *ssec;
1709
1710 isym = intsyms + ELF32_R_SYM (rel->r_info);
1711
1712 if (isym->st_shndx == SHN_UNDEF)
1713 ssec = bfd_und_section_ptr;
1714 else if (isym->st_shndx == SHN_ABS)
1715 ssec = bfd_abs_section_ptr;
1716 else if (isym->st_shndx == SHN_COMMON)
1717 ssec = bfd_com_section_ptr;
1718 else
1719 ssec = bfd_section_from_elf_index (abfd,
1720 isym->st_shndx);
1721
1722 /* Initial symbol value. */
1723 symval = isym->st_value;
1724
1725 /* GAS may have made this symbol relative to a section, in
1726 which case, we have to add the addend to find the
1727 symbol. */
1728 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1729 symval += rel->r_addend;
1730
1731 if (ssec)
1732 {
1733 if ((ssec->flags & SEC_MERGE)
dbaa2011 1734 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1735 symval = _bfd_merged_section_offset (abfd, & ssec,
1736 elf_section_data (ssec)->sec_info,
1737 symval);
1738 }
1739
1740 /* Now make the offset relative to where the linker is putting it. */
1741 if (ssec)
1742 symval +=
1743 ssec->output_section->vma + ssec->output_offset;
1744
1745 symval += rel->r_addend;
1746 }
1747 else
1748 {
1749 unsigned long indx;
1750 struct elf_link_hash_entry * h;
1751
1752 /* An external symbol. */
1753 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1754 h = elf_sym_hashes (abfd)[indx];
1755 BFD_ASSERT (h != NULL);
1756
1757 if (h->root.type != bfd_link_hash_defined
1758 && h->root.type != bfd_link_hash_defweak)
1759 {
1760 /* This appears to be a reference to an undefined
1761 symbol. Just ignore it--it will be caught by the
1762 regular reloc processing. */
1763 if (lrel)
1764 *lrel = rel;
1765 return 0;
1766 }
1767
1768 symval = (h->root.u.def.value
1769 + h->root.u.def.section->output_section->vma
1770 + h->root.u.def.section->output_offset);
1771
1772 symval += rel->r_addend;
1773 }
1774
1775 switch (ELF32_R_TYPE (rel->r_info))
1776 {
1777 case R_RL78_SYM:
1778 RL78_STACK_PUSH (symval);
1779 break;
1780
1781 case R_RL78_OPneg:
1782 RL78_STACK_POP (tmp1);
1783 tmp1 = - tmp1;
1784 RL78_STACK_PUSH (tmp1);
1785 break;
1786
1787 case R_RL78_OPadd:
1788 RL78_STACK_POP (tmp1);
1789 RL78_STACK_POP (tmp2);
1790 tmp1 += tmp2;
1791 RL78_STACK_PUSH (tmp1);
1792 break;
1793
1794 case R_RL78_OPsub:
1795 RL78_STACK_POP (tmp1);
1796 RL78_STACK_POP (tmp2);
1797 tmp2 -= tmp1;
1798 RL78_STACK_PUSH (tmp2);
1799 break;
1800
1801 case R_RL78_OPmul:
1802 RL78_STACK_POP (tmp1);
1803 RL78_STACK_POP (tmp2);
1804 tmp1 *= tmp2;
1805 RL78_STACK_PUSH (tmp1);
1806 break;
1807
1808 case R_RL78_OPdiv:
1809 RL78_STACK_POP (tmp1);
1810 RL78_STACK_POP (tmp2);
1811 tmp1 /= tmp2;
1812 RL78_STACK_PUSH (tmp1);
1813 break;
1814
1815 case R_RL78_OPshla:
1816 RL78_STACK_POP (tmp1);
1817 RL78_STACK_POP (tmp2);
1818 tmp1 <<= tmp2;
1819 RL78_STACK_PUSH (tmp1);
1820 break;
1821
1822 case R_RL78_OPshra:
1823 RL78_STACK_POP (tmp1);
1824 RL78_STACK_POP (tmp2);
1825 tmp1 >>= tmp2;
1826 RL78_STACK_PUSH (tmp1);
1827 break;
1828
1829 case R_RL78_OPsctsize:
1830 RL78_STACK_PUSH (input_section->size);
1831 break;
1832
1833 case R_RL78_OPscttop:
1834 RL78_STACK_PUSH (input_section->output_section->vma);
1835 break;
1836
1837 case R_RL78_OPand:
1838 RL78_STACK_POP (tmp1);
1839 RL78_STACK_POP (tmp2);
1840 tmp1 &= tmp2;
1841 RL78_STACK_PUSH (tmp1);
1842 break;
1843
1844 case R_RL78_OPor:
1845 RL78_STACK_POP (tmp1);
1846 RL78_STACK_POP (tmp2);
1847 tmp1 |= tmp2;
1848 RL78_STACK_PUSH (tmp1);
1849 break;
1850
1851 case R_RL78_OPxor:
1852 RL78_STACK_POP (tmp1);
1853 RL78_STACK_POP (tmp2);
1854 tmp1 ^= tmp2;
1855 RL78_STACK_PUSH (tmp1);
1856 break;
1857
1858 case R_RL78_OPnot:
1859 RL78_STACK_POP (tmp1);
1860 tmp1 = ~ tmp1;
1861 RL78_STACK_PUSH (tmp1);
1862 break;
1863
1864 case R_RL78_OPmod:
1865 RL78_STACK_POP (tmp1);
1866 RL78_STACK_POP (tmp2);
1867 tmp1 %= tmp2;
1868 RL78_STACK_PUSH (tmp1);
1869 break;
1870
1871 case R_RL78_OPromtop:
1872 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1873 break;
1874
1875 case R_RL78_OPramtop:
1876 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1877 break;
1878
1879 case R_RL78_DIR16UL:
1880 case R_RL78_DIR8UL:
1881 case R_RL78_ABS16UL:
1882 case R_RL78_ABS8UL:
1883 if (rl78_stack_top)
1884 RL78_STACK_POP (symval);
1885 if (lrel)
1886 *lrel = rel;
1887 *scale = 4;
1888 return symval;
1889
1890 case R_RL78_DIR16UW:
1891 case R_RL78_DIR8UW:
1892 case R_RL78_ABS16UW:
1893 case R_RL78_ABS8UW:
1894 if (rl78_stack_top)
1895 RL78_STACK_POP (symval);
1896 if (lrel)
1897 *lrel = rel;
1898 *scale = 2;
1899 return symval;
1900
1901 default:
1902 if (rl78_stack_top)
1903 RL78_STACK_POP (symval);
1904 if (lrel)
1905 *lrel = rel;
1906 return symval;
1907 }
1908
1909 rel ++;
1910 }
1911}
1912
1913struct {
1914 int prefix; /* or -1 for "no prefix" */
1915 int insn; /* or -1 for "end of list" */
1916 int insn_for_saddr; /* or -1 for "no alternative" */
1917 int insn_for_sfr; /* or -1 for "no alternative" */
1918} relax_addr16[] = {
1919 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1920 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1921 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1922 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1923
1924 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1925 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1926 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1927 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1928 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1929 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1930 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1931 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1932
1933 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1934 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1935 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1936 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1937 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1938
1939 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1940 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1941 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1942 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1943
1944 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1945 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1946 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1947
1948 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1949 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1950 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1951 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1952 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1953 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1954
1955 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1956
1957 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1958 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1959 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1960 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1961 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1962 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1963 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1964 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1965
1966 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1967 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1968 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1969 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1970 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1971 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1972 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1973 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 1974
9cea966c
DD		 1975 { -1, -1, -1, -1 }
1976};
1977
1978/* Relax one section. */
1979
99c513f6
DD		 1980static bfd_boolean
1981rl78_elf_relax_section
1982 (bfd * abfd,
1983 asection * sec,
1984 struct bfd_link_info * link_info,
1985 bfd_boolean * again)
1986{
9cea966c
DD		 1987 Elf_Internal_Shdr * symtab_hdr;
1988 Elf_Internal_Shdr * shndx_hdr;
1989 Elf_Internal_Rela * internal_relocs;
1990 Elf_Internal_Rela * free_relocs = NULL;
1991 Elf_Internal_Rela * irel;
1992 Elf_Internal_Rela * srel;
1993 Elf_Internal_Rela * irelend;
1994 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 1995 bfd_byte * contents = NULL;
1996 bfd_byte * free_contents = NULL;
1997 Elf_Internal_Sym * intsyms = NULL;
1998 Elf_Internal_Sym * free_intsyms = NULL;
1999 Elf_External_Sym_Shndx * shndx_buf = NULL;
2000 bfd_vma pc;
9cea966c
DD		 2001 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2002 int pcrel ATTRIBUTE_UNUSED = 0;
2003 int code ATTRIBUTE_UNUSED = 0;
2004 int section_alignment_glue;
2005 int scale;
2006
99c513f6
DD		 2007 if (abfd == elf_hash_table (link_info)->dynobj
2008 && strcmp (sec->name, ".plt") == 0)
2009 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2010
2011 /* Assume nothing changes. */
2012 *again = FALSE;
9cea966c
DD		 2013
2014 /* We don't have to do anything for a relocatable link, if
2015 this section does not have relocs, or if this is not a
2016 code section. */
2017 if (link_info->relocatable
2018 || (sec->flags & SEC_RELOC) == 0
2019 || sec->reloc_count == 0
2020 || (sec->flags & SEC_CODE) == 0)
2021 return TRUE;
2022
2023 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2024 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2025
9cea966c
DD		 2026 /* Get the section contents. */
2027 if (elf_section_data (sec)->this_hdr.contents != NULL)
2028 contents = elf_section_data (sec)->this_hdr.contents;
2029 /* Go get them off disk. */
2030 else
2031 {
2032 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2033 goto error_return;
2034 elf_section_data (sec)->this_hdr.contents = contents;
2035 }
2036
2037 /* Read this BFD's symbols. */
2038 /* Get cached copy if it exists. */
2039 if (symtab_hdr->contents != NULL)
2040 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2041 else
2042 {
2043 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2044 symtab_hdr->contents = (bfd_byte *) intsyms;
2045 }
2046
2047 if (shndx_hdr->sh_size != 0)
2048 {
2049 bfd_size_type amt;
2050
2051 amt = symtab_hdr->sh_info;
2052 amt *= sizeof (Elf_External_Sym_Shndx);
2053 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2054 if (shndx_buf == NULL)
2055 goto error_return;
2056 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2057 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2058 goto error_return;
2059 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2060 }
2061
2062 /* Get a copy of the native relocations. */
2063 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2064 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2065 link_info->keep_memory));
2066 if (internal_relocs == NULL)
2067 goto error_return;
2068 if (! link_info->keep_memory)
2069 free_relocs = internal_relocs;
2070
2071 /* The RL_ relocs must be just before the operand relocs they go
2072 with, so we must sort them to guarantee this. We use bubblesort
2073 instead of qsort so we can guarantee that relocs with the same
2074 address remain in the same relative order. */
2075 reloc_bubblesort (internal_relocs, sec->reloc_count);
2076
2077 /* Walk through them looking for relaxing opportunities. */
2078 irelend = internal_relocs + sec->reloc_count;
2079
2080
2081 /* This will either be NULL or a pointer to the next alignment
2082 relocation. */
2083 next_alignment = internal_relocs;
9cea966c
DD		 2084
2085 /* We calculate worst case shrinkage caused by alignment directives.
2086 No fool-proof, but better than either ignoring the problem or
2087 doing heavy duty analysis of all the alignment markers in all
2088 input sections. */
2089 section_alignment_glue = 0;
2090 for (irel = internal_relocs; irel < irelend; irel++)
2091 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2092 && irel->r_addend & RL78_RELAXA_ALIGN)
2093 {
2094 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2095
2096 if (section_alignment_glue < this_glue)
2097 section_alignment_glue = this_glue;
2098 }
2099 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2100 shrinkage. */
2101 section_alignment_glue *= 2;
2102
2103 for (irel = internal_relocs; irel < irelend; irel++)
2104 {
2105 unsigned char *insn;
2106 int nrelocs;
2107
2108 /* The insns we care about are all marked with one of these. */
2109 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2110 continue;
2111
2112 if (irel->r_addend & RL78_RELAXA_ALIGN
2113 || next_alignment == internal_relocs)
2114 {
2115 /* When we delete bytes, we need to maintain all the alignments
2116 indicated. In addition, we need to be careful about relaxing
2117 jumps across alignment boundaries - these displacements
2118 *grow* when we delete bytes. For now, don't shrink
2119 displacements across an alignment boundary, just in case.
2120 Note that this only affects relocations to the same
2121 section. */
9cea966c
DD		 2122 next_alignment += 2;
2123 while (next_alignment < irelend
2124 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2125 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2126 next_alignment ++;
2127 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2128 next_alignment = NULL;
2129 }
2130
2131 /* When we hit alignment markers, see if we've shrunk enough
2132 before them to reduce the gap without violating the alignment
2133 requirements. */
2134 if (irel->r_addend & RL78_RELAXA_ALIGN)
2135 {
2136 /* At this point, the next relocation *should* be the ELIGN
2137 end marker. */
2138 Elf_Internal_Rela *erel = irel + 1;
2139 unsigned int alignment, nbytes;
2140
2141 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2142 continue;
2143 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2144 continue;
2145
2146 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2147
2148 if (erel->r_offset - irel->r_offset < alignment)
2149 continue;
2150
2151 nbytes = erel->r_offset - irel->r_offset;
2152 nbytes /= alignment;
2153 nbytes *= alignment;
2154
2155 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2156 erel->r_offset == sec->size);
2157 *again = TRUE;
2158
2159 continue;
2160 }
2161
2162 if (irel->r_addend & RL78_RELAXA_ELIGN)
2163 continue;
2164
2165 insn = contents + irel->r_offset;
2166
2167 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2168
2169 /* At this point, we have an insn that is a candidate for linker
2170 relaxation. There are NRELOCS relocs following that may be
2171 relaxed, although each reloc may be made of more than one
2172 reloc entry (such as gp-rel symbols). */
2173
2174 /* Get the value of the symbol referred to by the reloc. Just
2175 in case this is the last reloc in the list, use the RL's
2176 addend to choose between this reloc (no addend) or the next
2177 (yes addend, which means at least one following reloc). */
2178
2179 /* srel points to the "current" reloction for this insn -
2180 actually the last reloc for a given operand, which is the one
2181 we need to update. We check the relaxations in the same
2182 order that the relocations happen, so we'll just push it
2183 along as we go. */
2184 srel = irel;
2185
2186 pc = sec->output_section->vma + sec->output_offset
2187 + srel->r_offset;
2188
2189#define GET_RELOC \
2190 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2191 pcrel = symval - pc + srel->r_addend; \
2192 nrelocs --;
2193
2194#define SNIPNR(offset, nbytes) \
2195 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2196#define SNIP(offset, nbytes, newtype) \
2197 SNIPNR (offset, nbytes); \
2198 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2199
2200 /* The order of these bit tests must match the order that the
2201 relocs appear in. Since we sorted those by offset, we can
2202 predict them. */
2203
2204 /*----------------------------------------------------------------------*/
2205 /* EF ad BR $rel8 pcrel
2206 ED al ah BR !abs16 abs
2207 EE al ah BR $!rel16 pcrel
2208 EC al ah as BR !!abs20 abs
2209
2210 FD al ah CALL !abs16 abs
2211 FE al ah CALL $!rel16 pcrel
2212 FC al ah as CALL !!abs20 abs
2213
2214 DC ad BC $rel8
2215 DE ad BNC $rel8
2216 DD ad BZ $rel8
2217 DF ad BNZ $rel8
2218 61 C3 ad BH $rel8
2219 61 D3 ad BNH $rel8
2220 61 C8 EF ad SKC ; BR $rel8
2221 61 D8 EF ad SKNC ; BR $rel8
2222 61 E8 EF ad SKZ ; BR $rel8
2223 61 F8 EF ad SKNZ ; BR $rel8
2224 61 E3 EF ad SKH ; BR $rel8
2225 61 F3 EF ad SKNH ; BR $rel8
2226 */
2227
2228 if (irel->r_addend & RL78_RELAXA_BRA)
2229 {
2230 GET_RELOC;
2231
2232 switch (insn[0])
2233 {
2234 case 0xec: /* BR !!abs20 */
2235
2236 if (pcrel < 127
2237 && pcrel > -127)
2238 {
2239 insn[0] = 0xef;
2240 insn[1] = pcrel;
2241 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2242 *again = TRUE;
2243 }
2244 else if (symval < 65536)
2245 {
2246 insn[0] = 0xed;
2247 insn[1] = symval & 0xff;
2248 insn[2] = symval >> 8;
2249 SNIP (2, 1, R_RL78_DIR16S);
2250 *again = TRUE;
2251 }
2252 else if (pcrel < 32767
2253 && pcrel > -32767)
2254 {
2255 insn[0] = 0xee;
2256 insn[1] = pcrel & 0xff;
2257 insn[2] = pcrel >> 8;
2258 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2259 *again = TRUE;
2260 }
2261 break;
2262
2263 case 0xee: /* BR $!pcrel16 */
2264 case 0xed: /* BR $!abs16 */
2265 if (pcrel < 127
2266 && pcrel > -127)
2267 {
2268 insn[0] = 0xef;
2269 insn[1] = pcrel;
2270 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2271 *again = TRUE;
2272 }
2273 break;
2274
2275 case 0xfc: /* CALL !!abs20 */
2276 if (symval < 65536)
2277 {
2278 insn[0] = 0xfd;
2279 insn[1] = symval & 0xff;
2280 insn[2] = symval >> 8;
2281 SNIP (2, 1, R_RL78_DIR16S);
2282 *again = TRUE;
2283 }
2284 else if (pcrel < 32767
2285 && pcrel > -32767)
2286 {
2287 insn[0] = 0xfe;
2288 insn[1] = pcrel & 0xff;
2289 insn[2] = pcrel >> 8;
2290 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2291 *again = TRUE;
2292 }
2293 break;
2294
2295 case 0x61: /* PREFIX */
2296 /* For SKIP/BR, we change the BR opcode and delete the
2297 SKIP. That way, we don't have to find and change the
2298 relocation for the BR. */
2299 switch (insn[1])
2300 {
2301 case 0xc8: /* SKC */
2302 if (insn[2] == 0xef)
2303 {
2304 insn[2] = 0xde; /* BNC */
2305 SNIPNR (0, 2);
2306 }
2307 break;
2308
2309 case 0xd8: /* SKNC */
2310 if (insn[2] == 0xef)
2311 {
2312 insn[2] = 0xdc; /* BC */
2313 SNIPNR (0, 2);
2314 }
2315 break;
2316
2317 case 0xe8: /* SKZ */
2318 if (insn[2] == 0xef)
2319 {
2320 insn[2] = 0xdf; /* BNZ */
2321 SNIPNR (0, 2);
2322 }
2323 break;
2324
2325 case 0xf8: /* SKNZ */
2326 if (insn[2] == 0xef)
2327 {
2328 insn[2] = 0xdd; /* BZ */
2329 SNIPNR (0, 2);
2330 }
2331 break;
2332
2333 case 0xe3: /* SKH */
2334 if (insn[2] == 0xef)
2335 {
2336 insn[2] = 0xd3; /* BNH */
2337 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2338 }
2339 break;
2340
2341 case 0xf3: /* SKNH */
2342 if (insn[2] == 0xef)
2343 {
2344 insn[2] = 0xc3; /* BH */
2345 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2346 }
2347 break;
2348 }
2349 break;
2350 }
68ffbac6 2351
9cea966c
DD		 2352 }
2353
2354 if (irel->r_addend & RL78_RELAXA_ADDR16)
2355 {
2356 /*----------------------------------------------------------------------*/
2357 /* Some insns have both a 16-bit address operand and an 8-bit
2358 variant if the address is within a special range:
2359
2360 Address 16-bit operand SADDR range SFR range
2361 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2362 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2363
2364 The RELAX_ADDR16[] array has the insn encodings for the
2365 16-bit operand version, as well as the SFR and SADDR
2366 variants. We only need to replace the encodings and
2367 adjust the operand.
2368
2369 Note: we intentionally do not attempt to decode and skip
2370 any ES: prefix, as adding ES: means the addr16 (likely)
2371 no longer points to saddr/sfr space.
2372 */
2373
2374 int is_sfr;
2375 int is_saddr;
2376 int idx;
2377 int poff;
2378
2379 GET_RELOC;
2380
9cea966c
DD		 2381 if (0xffe20 <= symval && symval <= 0xfffff)
2382 {
2383
2384 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2385 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2386
2387 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2388 {
2389 if (relax_addr16[idx].prefix != -1
2390 && insn[0] == relax_addr16[idx].prefix
2391 && insn[1] == relax_addr16[idx].insn)
2392 {
2393 poff = 1;
2394 }
2395 else if (relax_addr16[idx].prefix == -1
2396 && insn[0] == relax_addr16[idx].insn)
2397 {
2398 poff = 0;
2399 }
2400 else
2401 continue;
2402
2403 /* We have a matched insn, and poff is 0 or 1 depending
2404 on the base pattern size. */
2405
2406 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2407 {
2408 insn[poff] = relax_addr16[idx].insn_for_sfr;
2409 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2410 }
2411
2412 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2413 {
2414 insn[poff] = relax_addr16[idx].insn_for_saddr;
2415 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2416 }
68ffbac6 2417
9cea966c
DD		 2418 }
2419 }
2420 }
2421
2422 /*----------------------------------------------------------------------*/
2423
2424 }
2425
2426 return TRUE;
2427
2428 error_return:
2429 if (free_relocs != NULL)
2430 free (free_relocs);
2431
2432 if (free_contents != NULL)
2433 free (free_contents);
2434
2435 if (shndx_buf != NULL)
2436 {
2437 shndx_hdr->contents = NULL;
2438 free (shndx_buf);
2439 }
2440
2441 if (free_intsyms != NULL)
2442 free (free_intsyms);
2443
99c513f6
DD		 2444 return TRUE;
2445}
2446
2447\f
2448
2449#define ELF_ARCH bfd_arch_rl78
2450#define ELF_MACHINE_CODE EM_RL78
2451#define ELF_MAXPAGESIZE 0x1000
2452
2453#define TARGET_LITTLE_SYM bfd_elf32_rl78_vec
2454#define TARGET_LITTLE_NAME "elf32-rl78"
2455
2456#define elf_info_to_howto_rel NULL
2457#define elf_info_to_howto rl78_info_to_howto_rela
2458#define elf_backend_object_p rl78_elf_object_p
2459#define elf_backend_relocate_section rl78_elf_relocate_section
2460#define elf_symbol_leading_char ('_')
2461#define elf_backend_can_gc_sections 1
2462
2463#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2464#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2465#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2466#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2467#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2468
2469#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2470#define elf_backend_check_relocs rl78_elf_check_relocs
2471#define elf_backend_always_size_sections \
2472 rl78_elf_always_size_sections
2473#define elf_backend_finish_dynamic_sections \
2474 rl78_elf_finish_dynamic_sections
2475
2476#include "elf32-target.h"
GDB Binutils - Deliverables
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