[ARC] Fix typo in extension instruction name.
[deliverable/binutils-gdb.git] / bfd / elf32-v850.c
CommitLineData
252b5132 1/* V850-specific support for 32-bit ELF
6f2750fe 2 Copyright (C) 1996-2016 Free Software Foundation, Inc.
252b5132 3
86aba9db 4 This file is part of BFD, the Binary File Descriptor library.
252b5132 5
86aba9db
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
86aba9db 9 (at your option) any later version.
252b5132 10
86aba9db
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
86aba9db
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
47b0e7ad
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
cd123cb7 21
252b5132 22/* XXX FIXME: This code is littered with 32bit int, 16bit short, 8bit char
86aba9db 23 dependencies. As is the gas & simulator code for the v850. */
252b5132 24
252b5132 25#include "sysdep.h"
3db64b00 26#include "bfd.h"
252b5132
RH
27#include "bfdlink.h"
28#include "libbfd.h"
29#include "elf-bfd.h"
30#include "elf/v850.h"
e12dd2ea 31#include "libiberty.h"
252b5132 32
1cd986c5
NC
33/* Sign-extend a 17-bit number. */
34#define SEXT17(x) ((((x) & 0x1ffff) ^ 0x10000) - 0x10000)
35
36/* Sign-extend a 22-bit number. */
37#define SEXT22(x) ((((x) & 0x3fffff) ^ 0x200000) - 0x200000)
435b1e90 38
e460dd0d
AM
39static reloc_howto_type v850_elf_howto_table[];
40
252b5132
RH
41/* Look through the relocs for a section during the first phase, and
42 allocate space in the global offset table or procedure linkage
43 table. */
44
b34976b6 45static bfd_boolean
47b0e7ad
NC
46v850_elf_check_relocs (bfd *abfd,
47 struct bfd_link_info *info,
48 asection *sec,
49 const Elf_Internal_Rela *relocs)
252b5132 50{
b34976b6 51 bfd_boolean ret = TRUE;
252b5132
RH
52 Elf_Internal_Shdr *symtab_hdr;
53 struct elf_link_hash_entry **sym_hashes;
54 const Elf_Internal_Rela *rel;
55 const Elf_Internal_Rela *rel_end;
de863c74 56 unsigned int r_type;
252b5132 57 int other = 0;
47b0e7ad 58 const char *common = NULL;
252b5132 59
0e1862bb 60 if (bfd_link_relocatable (info))
b34976b6 61 return TRUE;
252b5132
RH
62
63#ifdef DEBUG
d003868e
AM
64 _bfd_error_handler ("v850_elf_check_relocs called for section %A in %B",
65 sec, abfd);
252b5132
RH
66#endif
67
252b5132
RH
68 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
69 sym_hashes = elf_sym_hashes (abfd);
252b5132
RH
70
71 rel_end = relocs + sec->reloc_count;
72 for (rel = relocs; rel < rel_end; rel++)
73 {
74 unsigned long r_symndx;
75 struct elf_link_hash_entry *h;
76
77 r_symndx = ELF32_R_SYM (rel->r_info);
78 if (r_symndx < symtab_hdr->sh_info)
79 h = NULL;
80 else
973a3492
L
81 {
82 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
83 while (h->root.type == bfd_link_hash_indirect
84 || h->root.type == bfd_link_hash_warning)
85 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM
86
87 /* PR15323, ref flags aren't set for references in the same
88 object. */
89 h->root.non_ir_ref = 1;
973a3492 90 }
252b5132 91
de863c74 92 r_type = ELF32_R_TYPE (rel->r_info);
252b5132
RH
93 switch (r_type)
94 {
95 default:
252b5132
RH
96 break;
97
98 /* This relocation describes the C++ object vtable hierarchy.
99 Reconstruct it for later use during GC. */
100 case R_V850_GNU_VTINHERIT:
c152c796 101 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 102 return FALSE;
252b5132
RH
103 break;
104
e12dd2ea
NC
105 /* This relocation describes which C++ vtable entries
106 are actually used. Record for later use during GC. */
252b5132 107 case R_V850_GNU_VTENTRY:
d17e0c6e
JB
108 BFD_ASSERT (h != NULL);
109 if (h != NULL
110 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
b34976b6 111 return FALSE;
252b5132
RH
112 break;
113
114 case R_V850_SDA_16_16_SPLIT_OFFSET:
115 case R_V850_SDA_16_16_OFFSET:
116 case R_V850_SDA_15_16_OFFSET:
de863c74
NC
117 case R_V810_GPWLO_1:
118 case R_V850_HWLO:
119 case R_V850_HWLO_1:
252b5132
RH
120 other = V850_OTHER_SDA;
121 common = ".scommon";
122 goto small_data_common;
435b1e90 123
252b5132
RH
124 case R_V850_ZDA_16_16_SPLIT_OFFSET:
125 case R_V850_ZDA_16_16_OFFSET:
126 case R_V850_ZDA_15_16_OFFSET:
127 other = V850_OTHER_ZDA;
128 common = ".zcommon";
129 goto small_data_common;
435b1e90 130
252b5132 131 case R_V850_TDA_4_4_OFFSET:
1cd986c5
NC
132 case R_V850_TDA_4_5_OFFSET:
133 case R_V850_TDA_7_7_OFFSET:
252b5132
RH
134 case R_V850_TDA_6_8_OFFSET:
135 case R_V850_TDA_7_8_OFFSET:
252b5132
RH
136 case R_V850_TDA_16_16_OFFSET:
137 other = V850_OTHER_TDA;
138 common = ".tcommon";
139 /* fall through */
140
141#define V850_OTHER_MASK (V850_OTHER_TDA | V850_OTHER_SDA | V850_OTHER_ZDA)
142
143 small_data_common:
144 if (h)
145 {
e12dd2ea
NC
146 /* Flag which type of relocation was used. */
147 h->other |= other;
252b5132
RH
148 if ((h->other & V850_OTHER_MASK) != (other & V850_OTHER_MASK)
149 && (h->other & V850_OTHER_ERROR) == 0)
150 {
151 const char * msg;
152 static char buff[200]; /* XXX */
153
154 switch (h->other & V850_OTHER_MASK)
155 {
156 default:
157 msg = _("Variable `%s' cannot occupy in multiple small data regions");
158 break;
159 case V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA:
160 msg = _("Variable `%s' can only be in one of the small, zero, and tiny data regions");
161 break;
162 case V850_OTHER_SDA | V850_OTHER_ZDA:
163 msg = _("Variable `%s' cannot be in both small and zero data regions simultaneously");
164 break;
165 case V850_OTHER_SDA | V850_OTHER_TDA:
166 msg = _("Variable `%s' cannot be in both small and tiny data regions simultaneously");
167 break;
168 case V850_OTHER_ZDA | V850_OTHER_TDA:
169 msg = _("Variable `%s' cannot be in both zero and tiny data regions simultaneously");
170 break;
171 }
172
173 sprintf (buff, msg, h->root.root.string);
174 info->callbacks->warning (info, buff, h->root.root.string,
dc810e39
AM
175 abfd, h->root.u.def.section,
176 (bfd_vma) 0);
252b5132
RH
177
178 bfd_set_error (bfd_error_bad_value);
179 h->other |= V850_OTHER_ERROR;
b34976b6 180 ret = FALSE;
252b5132
RH
181 }
182 }
183
184 if (h && h->root.type == bfd_link_hash_common
185 && h->root.u.c.p
186 && !strcmp (bfd_get_section_name (abfd, h->root.u.c.p->section), "COMMON"))
187 {
e12dd2ea
NC
188 asection * section;
189
190 section = h->root.u.c.p->section = bfd_make_section_old_way (abfd, common);
252b5132
RH
191 section->flags |= SEC_IS_COMMON;
192 }
193
194#ifdef DEBUG
195 fprintf (stderr, "v850_elf_check_relocs, found %s relocation for %s%s\n",
196 v850_elf_howto_table[ (int)r_type ].name,
197 (h && h->root.root.string) ? h->root.root.string : "<unknown>",
198 (h->root.type == bfd_link_hash_common) ? ", symbol is common" : "");
199#endif
200 break;
201 }
202 }
203
204 return ret;
205}
206
e12dd2ea
NC
207/* In the old version, when an entry was checked out from the table,
208 it was deleted. This produced an error if the entry was needed
209 more than once, as the second attempted retry failed.
210
211 In the current version, the entry is not deleted, instead we set
b34976b6 212 the field 'found' to TRUE. If a second lookup matches the same
e12dd2ea
NC
213 entry, then we know that the hi16s reloc has already been updated
214 and does not need to be updated a second time.
215
216 TODO - TOFIX: If it is possible that we need to restore 2 different
217 addresses from the same table entry, where the first generates an
218 overflow, whilst the second do not, then this code will fail. */
252b5132
RH
219
220typedef struct hi16s_location
221{
47b0e7ad
NC
222 bfd_vma addend;
223 bfd_byte * address;
224 unsigned long counter;
225 bfd_boolean found;
226 struct hi16s_location * next;
252b5132
RH
227}
228hi16s_location;
229
47b0e7ad
NC
230static hi16s_location * previous_hi16s;
231static hi16s_location * free_hi16s;
232static unsigned long hi16s_counter;
252b5132
RH
233
234static void
47b0e7ad 235remember_hi16s_reloc (bfd *abfd, bfd_vma addend, bfd_byte *address)
252b5132
RH
236{
237 hi16s_location * entry = NULL;
dc810e39 238 bfd_size_type amt = sizeof (* free_hi16s);
435b1e90 239
252b5132
RH
240 /* Find a free structure. */
241 if (free_hi16s == NULL)
47b0e7ad 242 free_hi16s = bfd_zalloc (abfd, amt);
252b5132
RH
243
244 entry = free_hi16s;
245 free_hi16s = free_hi16s->next;
435b1e90 246
252b5132
RH
247 entry->addend = addend;
248 entry->address = address;
249 entry->counter = hi16s_counter ++;
b34976b6 250 entry->found = FALSE;
252b5132
RH
251 entry->next = previous_hi16s;
252 previous_hi16s = entry;
435b1e90 253
252b5132
RH
254 /* Cope with wrap around of our counter. */
255 if (hi16s_counter == 0)
256 {
47b0e7ad 257 /* XXX: Assume that all counter entries differ only in their low 16 bits. */
252b5132
RH
258 for (entry = previous_hi16s; entry != NULL; entry = entry->next)
259 entry->counter &= 0xffff;
260
261 hi16s_counter = 0x10000;
262 }
252b5132
RH
263}
264
265static bfd_byte *
47b0e7ad 266find_remembered_hi16s_reloc (bfd_vma addend, bfd_boolean *already_found)
252b5132 267{
b34976b6
AM
268 hi16s_location *match = NULL;
269 hi16s_location *entry;
b34976b6 270 bfd_byte *addr;
435b1e90 271
252b5132
RH
272 /* Search the table. Record the most recent entry that matches. */
273 for (entry = previous_hi16s; entry; entry = entry->next)
274 {
275 if (entry->addend == addend
276 && (match == NULL || match->counter < entry->counter))
277 {
252b5132
RH
278 match = entry;
279 }
252b5132
RH
280 }
281
282 if (match == NULL)
283 return NULL;
284
285 /* Extract the address. */
286 addr = match->address;
287
4cc11e76 288 /* Remember if this entry has already been used before. */
252b5132
RH
289 if (already_found)
290 * already_found = match->found;
291
292 /* Note that this entry has now been used. */
b34976b6 293 match->found = TRUE;
435b1e90 294
252b5132 295 return addr;
435b1e90 296}
252b5132 297
1e50d24d
RS
298/* Calculate the final operand value for a R_V850_LO16 or
299 R_V850_LO16_SPLIT_OFFSET. *INSN is the current operand value and
300 ADDEND is the sum of the relocation symbol and offset. Store the
301 operand value in *INSN and return true on success.
302
303 The assembler has already done some of this: If the value stored in
304 the instruction has its 15th bit set, (counting from zero) then the
305 assembler will have added 1 to the value stored in the associated
306 HI16S reloc. So for example, these relocations:
307
308 movhi hi( fred ), r0, r1
309 movea lo( fred ), r1, r1
310
311 will store 0 in the value fields for the MOVHI and MOVEA instructions
312 and addend will be the address of fred, but for these instructions:
313
1cd986c5
NC
314 movhi hi( fred + 0x123456 ), r0, r1
315 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
316
317 the value stored in the MOVHI instruction will be 0x12 and the value
318 stored in the MOVEA instruction will be 0x3456. If however the
319 instructions were:
320
1cd986c5
NC
321 movhi hi( fred + 0x10ffff ), r0, r1
322 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
323
324 then the value stored in the MOVHI instruction would be 0x11 (not
325 0x10) and the value stored in the MOVEA instruction would be 0xffff.
326 Thus (assuming for the moment that the addend is 0), at run time the
327 MOVHI instruction loads 0x110000 into r1, then the MOVEA instruction
328 adds 0xffffffff (sign extension!) producing 0x10ffff. Similarly if
329 the instructions were:
330
1cd986c5
NC
331 movhi hi( fred - 1 ), r0, r1
332 movea lo( fred - 1 ), r1, r1
1e50d24d
RS
333
334 then 0 is stored in the MOVHI instruction and -1 is stored in the
335 MOVEA instruction.
336
337 Overflow can occur if the addition of the value stored in the
338 instruction plus the addend sets the 15th bit when before it was clear.
339 This is because the 15th bit will be sign extended into the high part,
340 thus reducing its value by one, but since the 15th bit was originally
341 clear, the assembler will not have added 1 to the previous HI16S reloc
342 to compensate for this effect. For example:
343
1cd986c5
NC
344 movhi hi( fred + 0x123456 ), r0, r1
345 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
346
347 The value stored in HI16S reloc is 0x12, the value stored in the LO16
348 reloc is 0x3456. If we assume that the address of fred is 0x00007000
349 then the relocations become:
350
351 HI16S: 0x0012 + (0x00007000 >> 16) = 0x12
352 LO16: 0x3456 + (0x00007000 & 0xffff) = 0xa456
353
354 but when the instructions are executed, the MOVEA instruction's value
355 is signed extended, so the sum becomes:
356
357 0x00120000
358 + 0xffffa456
359 ------------
360 0x0011a456 but 'fred + 0x123456' = 0x0012a456
361
362 Note that if the 15th bit was set in the value stored in the LO16
363 reloc, then we do not have to do anything:
364
1cd986c5
NC
365 movhi hi( fred + 0x10ffff ), r0, r1
366 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
367
368 HI16S: 0x0011 + (0x00007000 >> 16) = 0x11
369 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff
370
371 0x00110000
372 + 0x00006fff
373 ------------
374 0x00116fff = fred + 0x10ffff = 0x7000 + 0x10ffff
375
376 Overflow can also occur if the computation carries into the 16th bit
377 and it also results in the 15th bit having the same value as the 15th
378 bit of the original value. What happens is that the HI16S reloc
379 will have already examined the 15th bit of the original value and
380 added 1 to the high part if the bit is set. This compensates for the
381 sign extension of 15th bit of the result of the computation. But now
382 there is a carry into the 16th bit, and this has not been allowed for.
383
384 So, for example if fred is at address 0xf000:
385
1cd986c5
NC
386 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
387 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
388
389 HI16S: 0x0001 + (0x0000f000 >> 16) = 0x0001
390 LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16 is lost)
391
392 0x00010000
393 + 0xffffefff
394 ------------
395 0x0000efff but 'fred + 0xffff' = 0x0001efff
396
397 Similarly, if the 15th bit remains clear, but overflow occurs into
398 the 16th bit then (assuming the address of fred is 0xf000):
399
1cd986c5
NC
400 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
401 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
402
403 HI16S: 0x0000 + (0x0000f000 >> 16) = 0x0000
404 LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
405
406 0x00000000
407 + 0x00006fff
408 ------------
409 0x00006fff but 'fred + 0x7000' = 0x00016fff
410
411 Note - there is no need to change anything if a carry occurs, and the
412 15th bit changes its value from being set to being clear, as the HI16S
413 reloc will have already added in 1 to the high part for us:
414
1cd986c5
NC
415 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
416 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
417
418 HI16S: 0x0001 + (0x00007000 >> 16)
419 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
420
421 0x00010000
422 + 0x00006fff (bit 15 not set, so the top half is zero)
423 ------------
424 0x00016fff which is right (assuming that fred is at 0x7000)
425
426 but if the 15th bit goes from being clear to being set, then we must
427 once again handle overflow:
428
1cd986c5
NC
429 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
430 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
431
432 HI16S: 0x0000 + (0x0000ffff >> 16)
433 LO16: 0x7000 + (0x0000ffff & 0xffff) = 0x6fff (carry into bit 16)
434
435 0x00000000
436 + 0x00006fff (bit 15 not set, so the top half is zero)
437 ------------
438 0x00006fff which is wrong (assuming that fred is at 0xffff). */
439
440static bfd_boolean
441v850_elf_perform_lo16_relocation (bfd *abfd, unsigned long *insn,
442 unsigned long addend)
443{
444#define BIT15_SET(x) ((x) & 0x8000)
445#define OVERFLOWS(a,i) ((((a) & 0xffff) + (i)) > 0xffff)
47b0e7ad 446
1e50d24d
RS
447 if ((BIT15_SET (*insn + addend) && ! BIT15_SET (addend))
448 || (OVERFLOWS (addend, *insn)
449 && ((! BIT15_SET (*insn)) || (BIT15_SET (addend)))))
450 {
451 bfd_boolean already_updated;
452 bfd_byte *hi16s_address = find_remembered_hi16s_reloc
453 (addend, & already_updated);
454
455 /* Amend the matching HI16_S relocation. */
456 if (hi16s_address != NULL)
457 {
458 if (! already_updated)
459 {
460 unsigned long hi_insn = bfd_get_16 (abfd, hi16s_address);
461 hi_insn += 1;
462 bfd_put_16 (abfd, hi_insn, hi16s_address);
463 }
464 }
465 else
466 {
4a97a0e5 467 (*_bfd_error_handler) (_("FAILED to find previous HI16 reloc"));
1e50d24d
RS
468 return FALSE;
469 }
470 }
471#undef OVERFLOWS
472#undef BIT15_SET
473
474 /* Do not complain if value has top bit set, as this has been
475 anticipated. */
476 *insn = (*insn + addend) & 0xffff;
477 return TRUE;
478}
479
252b5132 480/* FIXME: The code here probably ought to be removed and the code in reloc.c
4cc11e76 481 allowed to do its stuff instead. At least for most of the relocs, anyway. */
e12dd2ea 482
252b5132 483static bfd_reloc_status_type
47b0e7ad
NC
484v850_elf_perform_relocation (bfd *abfd,
485 unsigned int r_type,
486 bfd_vma addend,
487 bfd_byte *address)
252b5132
RH
488{
489 unsigned long insn;
1e50d24d 490 unsigned long result;
252b5132 491 bfd_signed_vma saddend = (bfd_signed_vma) addend;
435b1e90 492
252b5132
RH
493 switch (r_type)
494 {
495 default:
de863c74 496#ifdef DEBUG
64d29018 497 fprintf (stderr, "%B: reloc number %d not recognised\n", abfd, r_type);
de863c74 498#endif
252b5132 499 return bfd_reloc_notsupported;
435b1e90 500
e30ddb24
NC
501 case R_V850_REL32:
502 case R_V850_ABS32:
de863c74
NC
503 case R_V810_WORD:
504 case R_V850_PC32:
252b5132
RH
505 bfd_put_32 (abfd, addend, address);
506 return bfd_reloc_ok;
435b1e90 507
de863c74 508 case R_V850_WLO23:
1cd986c5
NC
509 case R_V850_23:
510 insn = bfd_get_32 (abfd, address);
511 insn &= ~((0x7f << 4) | (0x7fff80 << (16-7)));
512 insn |= ((addend & 0x7f) << 4) | ((addend & 0x7fff80) << (16-7));
513 bfd_put_32 (abfd, (bfd_vma) insn, address);
514 return bfd_reloc_ok;
515
de863c74 516 case R_V850_PCR22:
252b5132
RH
517 case R_V850_22_PCREL:
518 if (saddend > 0x1fffff || saddend < -0x200000)
519 return bfd_reloc_overflow;
435b1e90 520
252b5132
RH
521 if ((addend % 2) != 0)
522 return bfd_reloc_dangerous;
435b1e90 523
252b5132
RH
524 insn = bfd_get_32 (abfd, address);
525 insn &= ~0xfffe003f;
526 insn |= (((addend & 0xfffe) << 16) | ((addend & 0x3f0000) >> 16));
dc810e39 527 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 528 return bfd_reloc_ok;
435b1e90 529
de863c74 530 case R_V850_PC17:
1cd986c5
NC
531 case R_V850_17_PCREL:
532 if (saddend > 0xffff || saddend < -0x10000)
533 return bfd_reloc_overflow;
534
535 if ((addend % 2) != 0)
536 return bfd_reloc_dangerous;
537
538 insn = bfd_get_32 (abfd, address);
539 insn &= ~ 0xfffe0010;
540 insn |= ((addend & 0xfffe) << 16) | ((addend & 0x10000) >> (16-4));
541 break;
542
de863c74 543 case R_V850_PC16U:
1cd986c5
NC
544 case R_V850_16_PCREL:
545 if ((saddend < -0xffff) || (saddend > 0))
546 return bfd_reloc_overflow;
547
548 if ((addend % 2) != 0)
549 return bfd_reloc_dangerous;
550
551 insn = bfd_get_16 (abfd, address);
552 insn &= ~0xfffe;
553 insn |= (-addend & 0xfffe);
554 break;
555
de863c74 556 case R_V850_PC9:
252b5132
RH
557 case R_V850_9_PCREL:
558 if (saddend > 0xff || saddend < -0x100)
559 return bfd_reloc_overflow;
435b1e90 560
252b5132
RH
561 if ((addend % 2) != 0)
562 return bfd_reloc_dangerous;
435b1e90 563
252b5132
RH
564 insn = bfd_get_16 (abfd, address);
565 insn &= ~ 0xf870;
566 insn |= ((addend & 0x1f0) << 7) | ((addend & 0x0e) << 3);
567 break;
435b1e90 568
de863c74 569 case R_V810_WHI:
252b5132
RH
570 case R_V850_HI16:
571 addend += (bfd_get_16 (abfd, address) << 16);
572 addend = (addend >> 16);
573 insn = addend;
574 break;
435b1e90 575
de863c74 576 case R_V810_WHI1:
252b5132
RH
577 case R_V850_HI16_S:
578 /* Remember where this relocation took place. */
579 remember_hi16s_reloc (abfd, addend, address);
580
581 addend += (bfd_get_16 (abfd, address) << 16);
582 addend = (addend >> 16) + ((addend & 0x8000) != 0);
435b1e90
KH
583
584 /* This relocation cannot overflow. */
4d421096 585 if (addend > 0xffff)
252b5132 586 addend = 0;
435b1e90 587
252b5132
RH
588 insn = addend;
589 break;
435b1e90 590
de863c74 591 case R_V810_WLO:
252b5132 592 case R_V850_LO16:
1e50d24d
RS
593 insn = bfd_get_16 (abfd, address);
594 if (! v850_elf_perform_lo16_relocation (abfd, &insn, addend))
595 return bfd_reloc_overflow;
596 break;
252b5132 597
de863c74 598 case R_V810_BYTE:
252b5132
RH
599 case R_V850_8:
600 addend += (char) bfd_get_8 (abfd, address);
601
602 saddend = (bfd_signed_vma) addend;
435b1e90 603
252b5132
RH
604 if (saddend > 0x7f || saddend < -0x80)
605 return bfd_reloc_overflow;
606
607 bfd_put_8 (abfd, addend, address);
608 return bfd_reloc_ok;
609
610 case R_V850_CALLT_16_16_OFFSET:
611 addend += bfd_get_16 (abfd, address);
435b1e90 612
252b5132 613 saddend = (bfd_signed_vma) addend;
435b1e90 614
252b5132
RH
615 if (saddend > 0xffff || saddend < 0)
616 return bfd_reloc_overflow;
617
618 insn = addend;
619 break;
435b1e90 620
1cd986c5
NC
621 case R_V850_CALLT_15_16_OFFSET:
622 insn = bfd_get_16 (abfd, address);
623
5bb3703f 624 addend += insn & 0xfffe;
1cd986c5
NC
625
626 saddend = (bfd_signed_vma) addend;
627
628 if (saddend > 0xffff || saddend < 0)
629 return bfd_reloc_overflow;
630
631 insn = (0xfffe & addend)
632 | (insn & ~0xfffe);
633 break;
634
635 case R_V850_CALLT_6_7_OFFSET:
636 insn = bfd_get_16 (abfd, address);
637 addend += ((insn & 0x3f) << 1);
638
639 saddend = (bfd_signed_vma) addend;
640
641 if (saddend > 0x7e || saddend < 0)
642 return bfd_reloc_overflow;
643
644 if (addend & 1)
645 return bfd_reloc_dangerous;
646
647 insn &= 0xff80;
648 insn |= (addend >> 1);
649 break;
650
252b5132 651 case R_V850_16:
de863c74 652 case R_V810_HWORD:
252b5132
RH
653 case R_V850_SDA_16_16_OFFSET:
654 case R_V850_ZDA_16_16_OFFSET:
655 case R_V850_TDA_16_16_OFFSET:
656 addend += bfd_get_16 (abfd, address);
435b1e90 657
252b5132 658 saddend = (bfd_signed_vma) addend;
435b1e90 659
252b5132
RH
660 if (saddend > 0x7fff || saddend < -0x8000)
661 return bfd_reloc_overflow;
662
663 insn = addend;
664 break;
435b1e90 665
1cd986c5 666 case R_V850_16_S1:
252b5132
RH
667 case R_V850_SDA_15_16_OFFSET:
668 case R_V850_ZDA_15_16_OFFSET:
de863c74 669 case R_V810_GPWLO_1:
252b5132
RH
670 insn = bfd_get_16 (abfd, address);
671 addend += (insn & 0xfffe);
435b1e90 672
252b5132 673 saddend = (bfd_signed_vma) addend;
435b1e90 674
252b5132
RH
675 if (saddend > 0x7ffe || saddend < -0x8000)
676 return bfd_reloc_overflow;
435b1e90 677
252b5132
RH
678 if (addend & 1)
679 return bfd_reloc_dangerous;
435b1e90 680
dc810e39 681 insn = (addend &~ (bfd_vma) 1) | (insn & 1);
252b5132 682 break;
435b1e90 683
252b5132
RH
684 case R_V850_TDA_6_8_OFFSET:
685 insn = bfd_get_16 (abfd, address);
686 addend += ((insn & 0x7e) << 1);
435b1e90 687
252b5132 688 saddend = (bfd_signed_vma) addend;
435b1e90 689
252b5132
RH
690 if (saddend > 0xfc || saddend < 0)
691 return bfd_reloc_overflow;
435b1e90 692
252b5132
RH
693 if (addend & 3)
694 return bfd_reloc_dangerous;
435b1e90 695
252b5132
RH
696 insn &= 0xff81;
697 insn |= (addend >> 1);
698 break;
435b1e90 699
252b5132
RH
700 case R_V850_TDA_7_8_OFFSET:
701 insn = bfd_get_16 (abfd, address);
702 addend += ((insn & 0x7f) << 1);
435b1e90 703
252b5132 704 saddend = (bfd_signed_vma) addend;
435b1e90 705
252b5132
RH
706 if (saddend > 0xfe || saddend < 0)
707 return bfd_reloc_overflow;
435b1e90 708
252b5132
RH
709 if (addend & 1)
710 return bfd_reloc_dangerous;
435b1e90 711
252b5132
RH
712 insn &= 0xff80;
713 insn |= (addend >> 1);
714 break;
435b1e90 715
252b5132
RH
716 case R_V850_TDA_7_7_OFFSET:
717 insn = bfd_get_16 (abfd, address);
718 addend += insn & 0x7f;
435b1e90 719
252b5132 720 saddend = (bfd_signed_vma) addend;
435b1e90 721
252b5132
RH
722 if (saddend > 0x7f || saddend < 0)
723 return bfd_reloc_overflow;
435b1e90 724
252b5132
RH
725 insn &= 0xff80;
726 insn |= addend;
727 break;
435b1e90 728
252b5132
RH
729 case R_V850_TDA_4_5_OFFSET:
730 insn = bfd_get_16 (abfd, address);
731 addend += ((insn & 0xf) << 1);
435b1e90 732
252b5132 733 saddend = (bfd_signed_vma) addend;
435b1e90 734
252b5132
RH
735 if (saddend > 0x1e || saddend < 0)
736 return bfd_reloc_overflow;
435b1e90 737
252b5132
RH
738 if (addend & 1)
739 return bfd_reloc_dangerous;
435b1e90 740
252b5132
RH
741 insn &= 0xfff0;
742 insn |= (addend >> 1);
743 break;
435b1e90 744
252b5132
RH
745 case R_V850_TDA_4_4_OFFSET:
746 insn = bfd_get_16 (abfd, address);
747 addend += insn & 0xf;
435b1e90 748
252b5132 749 saddend = (bfd_signed_vma) addend;
435b1e90 750
252b5132
RH
751 if (saddend > 0xf || saddend < 0)
752 return bfd_reloc_overflow;
435b1e90 753
252b5132
RH
754 insn &= 0xfff0;
755 insn |= addend;
756 break;
435b1e90 757
de863c74
NC
758 case R_V810_WLO_1:
759 case R_V850_HWLO:
760 case R_V850_HWLO_1:
1cd986c5
NC
761 case R_V850_LO16_S1:
762 insn = bfd_get_16 (abfd, address);
763 result = insn & 0xfffe;
764 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
765 return bfd_reloc_overflow;
766 if (result & 1)
767 return bfd_reloc_overflow;
768 insn = (result & 0xfffe)
769 | (insn & ~0xfffe);
770 bfd_put_16 (abfd, insn, address);
771 return bfd_reloc_ok;
772
de863c74 773 case R_V850_BLO:
1e50d24d
RS
774 case R_V850_LO16_SPLIT_OFFSET:
775 insn = bfd_get_32 (abfd, address);
776 result = ((insn & 0xfffe0000) >> 16) | ((insn & 0x20) >> 5);
777 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
778 return bfd_reloc_overflow;
779 insn = (((result << 16) & 0xfffe0000)
780 | ((result << 5) & 0x20)
781 | (insn & ~0xfffe0020));
782 bfd_put_32 (abfd, insn, address);
783 return bfd_reloc_ok;
784
1cd986c5 785 case R_V850_16_SPLIT_OFFSET:
252b5132 786 case R_V850_SDA_16_16_SPLIT_OFFSET:
1cd986c5 787 case R_V850_ZDA_16_16_SPLIT_OFFSET:
252b5132
RH
788 insn = bfd_get_32 (abfd, address);
789 addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5);
435b1e90 790
252b5132 791 saddend = (bfd_signed_vma) addend;
435b1e90 792
252b5132
RH
793 if (saddend > 0x7fff || saddend < -0x8000)
794 return bfd_reloc_overflow;
435b1e90 795
252b5132
RH
796 insn &= 0x0001ffdf;
797 insn |= (addend & 1) << 5;
dc810e39 798 insn |= (addend &~ (bfd_vma) 1) << 16;
435b1e90 799
dc810e39 800 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 801 return bfd_reloc_ok;
435b1e90 802
252b5132
RH
803 case R_V850_GNU_VTINHERIT:
804 case R_V850_GNU_VTENTRY:
805 return bfd_reloc_ok;
806
807 }
808
dc810e39 809 bfd_put_16 (abfd, (bfd_vma) insn, address);
252b5132
RH
810 return bfd_reloc_ok;
811}
252b5132
RH
812\f
813/* Insert the addend into the instruction. */
e12dd2ea 814
252b5132 815static bfd_reloc_status_type
47b0e7ad
NC
816v850_elf_reloc (bfd *abfd ATTRIBUTE_UNUSED,
817 arelent *reloc,
818 asymbol *symbol,
819 void * data ATTRIBUTE_UNUSED,
820 asection *isection,
821 bfd *obfd,
822 char **err ATTRIBUTE_UNUSED)
252b5132
RH
823{
824 long relocation;
435b1e90 825
252b5132
RH
826 /* If there is an output BFD,
827 and the symbol is not a section name (which is only defined at final link time),
828 and either we are not putting the addend into the instruction
e12dd2ea 829 or the addend is zero, so there is nothing to add into the instruction
252b5132 830 then just fixup the address and return. */
47b0e7ad 831 if (obfd != NULL
252b5132
RH
832 && (symbol->flags & BSF_SECTION_SYM) == 0
833 && (! reloc->howto->partial_inplace
834 || reloc->addend == 0))
835 {
836 reloc->address += isection->output_offset;
837 return bfd_reloc_ok;
838 }
435b1e90 839
252b5132
RH
840 /* Catch relocs involving undefined symbols. */
841 if (bfd_is_und_section (symbol->section)
842 && (symbol->flags & BSF_WEAK) == 0
843 && obfd == NULL)
844 return bfd_reloc_undefined;
845
846 /* We handle final linking of some relocs ourselves. */
847
848 /* Is the address of the relocation really within the section? */
07515404 849 if (reloc->address > bfd_get_section_limit (abfd, isection))
252b5132 850 return bfd_reloc_outofrange;
435b1e90 851
4cc11e76 852 /* Work out which section the relocation is targeted at and the
252b5132 853 initial relocation command value. */
435b1e90 854
b34976b6 855 if (reloc->howto->pc_relative)
86aba9db
NC
856 return bfd_reloc_ok;
857
252b5132
RH
858 /* Get symbol value. (Common symbols are special.) */
859 if (bfd_is_com_section (symbol->section))
860 relocation = 0;
861 else
862 relocation = symbol->value;
435b1e90 863
252b5132
RH
864 /* Convert input-section-relative symbol value to absolute + addend. */
865 relocation += symbol->section->output_section->vma;
866 relocation += symbol->section->output_offset;
867 relocation += reloc->addend;
435b1e90 868
435b1e90 869 reloc->addend = relocation;
252b5132
RH
870 return bfd_reloc_ok;
871}
86aba9db
NC
872
873/* This function is used for relocs which are only used
874 for relaxing, which the linker should otherwise ignore. */
875
876static bfd_reloc_status_type
47b0e7ad
NC
877v850_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED,
878 arelent *reloc_entry,
879 asymbol *symbol ATTRIBUTE_UNUSED,
880 void * data ATTRIBUTE_UNUSED,
881 asection *input_section,
882 bfd *output_bfd,
883 char **error_message ATTRIBUTE_UNUSED)
86aba9db
NC
884{
885 if (output_bfd != NULL)
886 reloc_entry->address += input_section->output_offset;
887
888 return bfd_reloc_ok;
889}
47b0e7ad 890/* Note: It is REQUIRED that the 'type' value of each entry
1cd986c5 891 in this array match the index of the entry in the array.
de863c74 892 SeeAlso: RELOC_NUBMER in include/elf/v850.h. */
47b0e7ad
NC
893static reloc_howto_type v850_elf_howto_table[] =
894{
895 /* This reloc does nothing. */
896 HOWTO (R_V850_NONE, /* Type. */
897 0, /* Rightshift. */
6346d5ca
AM
898 3, /* Size (0 = byte, 1 = short, 2 = long). */
899 0, /* Bitsize. */
47b0e7ad
NC
900 FALSE, /* PC_relative. */
901 0, /* Bitpos. */
6346d5ca 902 complain_overflow_dont, /* Complain_on_overflow. */
47b0e7ad
NC
903 bfd_elf_generic_reloc, /* Special_function. */
904 "R_V850_NONE", /* Name. */
905 FALSE, /* Partial_inplace. */
906 0, /* Src_mask. */
907 0, /* Dst_mask. */
908 FALSE), /* PCrel_offset. */
909
910 /* A PC relative 9 bit branch. */
911 HOWTO (R_V850_9_PCREL, /* Type. */
1cd986c5
NC
912 0, /* Rightshift. */
913 1, /* Size (0 = byte, 1 = short, 2 = long). */
914 9, /* Bitsize. */
47b0e7ad
NC
915 TRUE, /* PC_relative. */
916 0, /* Bitpos. */
917 complain_overflow_bitfield, /* Complain_on_overflow. */
918 v850_elf_reloc, /* Special_function. */
919 "R_V850_9_PCREL", /* Name. */
920 FALSE, /* Partial_inplace. */
921 0x00ffffff, /* Src_mask. */
922 0x00ffffff, /* Dst_mask. */
923 TRUE), /* PCrel_offset. */
924
925 /* A PC relative 22 bit branch. */
926 HOWTO (R_V850_22_PCREL, /* Type. */
1cd986c5 927 0, /* Rightshift. */
47b0e7ad
NC
928 2, /* Size (0 = byte, 1 = short, 2 = long). */
929 22, /* Bitsize. */
930 TRUE, /* PC_relative. */
1cd986c5 931 0, /* Bitpos. */
47b0e7ad
NC
932 complain_overflow_signed, /* Complain_on_overflow. */
933 v850_elf_reloc, /* Special_function. */
934 "R_V850_22_PCREL", /* Name. */
935 FALSE, /* Partial_inplace. */
936 0x07ffff80, /* Src_mask. */
937 0x07ffff80, /* Dst_mask. */
938 TRUE), /* PCrel_offset. */
939
940 /* High 16 bits of symbol value. */
941 HOWTO (R_V850_HI16_S, /* Type. */
942 0, /* Rightshift. */
943 1, /* Size (0 = byte, 1 = short, 2 = long). */
944 16, /* Bitsize. */
945 FALSE, /* PC_relative. */
946 0, /* Bitpos. */
947 complain_overflow_dont, /* Complain_on_overflow. */
948 v850_elf_reloc, /* Special_function. */
949 "R_V850_HI16_S", /* Name. */
950 FALSE, /* Partial_inplace. */
951 0xffff, /* Src_mask. */
952 0xffff, /* Dst_mask. */
953 FALSE), /* PCrel_offset. */
954
955 /* High 16 bits of symbol value. */
956 HOWTO (R_V850_HI16, /* Type. */
957 0, /* Rightshift. */
958 1, /* Size (0 = byte, 1 = short, 2 = long). */
959 16, /* Bitsize. */
960 FALSE, /* PC_relative. */
961 0, /* Bitpos. */
962 complain_overflow_dont, /* Complain_on_overflow. */
963 v850_elf_reloc, /* Special_function. */
964 "R_V850_HI16", /* Name. */
965 FALSE, /* Partial_inplace. */
966 0xffff, /* Src_mask. */
967 0xffff, /* Dst_mask. */
968 FALSE), /* PCrel_offset. */
969
970 /* Low 16 bits of symbol value. */
971 HOWTO (R_V850_LO16, /* Type. */
972 0, /* Rightshift. */
973 1, /* Size (0 = byte, 1 = short, 2 = long). */
974 16, /* Bitsize. */
975 FALSE, /* PC_relative. */
976 0, /* Bitpos. */
977 complain_overflow_dont, /* Complain_on_overflow. */
978 v850_elf_reloc, /* Special_function. */
979 "R_V850_LO16", /* Name. */
980 FALSE, /* Partial_inplace. */
981 0xffff, /* Src_mask. */
982 0xffff, /* Dst_mask. */
983 FALSE), /* PCrel_offset. */
984
985 /* Simple 32bit reloc. */
986 HOWTO (R_V850_ABS32, /* Type. */
987 0, /* Rightshift. */
988 2, /* Size (0 = byte, 1 = short, 2 = long). */
989 32, /* Bitsize. */
990 FALSE, /* PC_relative. */
991 0, /* Bitpos. */
992 complain_overflow_dont, /* Complain_on_overflow. */
993 v850_elf_reloc, /* Special_function. */
994 "R_V850_ABS32", /* Name. */
995 FALSE, /* Partial_inplace. */
996 0xffffffff, /* Src_mask. */
997 0xffffffff, /* Dst_mask. */
998 FALSE), /* PCrel_offset. */
999
1000 /* Simple 16bit reloc. */
1001 HOWTO (R_V850_16, /* Type. */
1002 0, /* Rightshift. */
1003 1, /* Size (0 = byte, 1 = short, 2 = long). */
1004 16, /* Bitsize. */
1005 FALSE, /* PC_relative. */
1006 0, /* Bitpos. */
1007 complain_overflow_dont, /* Complain_on_overflow. */
1008 bfd_elf_generic_reloc, /* Special_function. */
1009 "R_V850_16", /* Name. */
1010 FALSE, /* Partial_inplace. */
1011 0xffff, /* Src_mask. */
1012 0xffff, /* Dst_mask. */
1013 FALSE), /* PCrel_offset. */
1014
1015 /* Simple 8bit reloc. */
1016 HOWTO (R_V850_8, /* Type. */
1017 0, /* Rightshift. */
1018 0, /* Size (0 = byte, 1 = short, 2 = long). */
1019 8, /* Bitsize. */
1020 FALSE, /* PC_relative. */
1021 0, /* Bitpos. */
1022 complain_overflow_dont, /* Complain_on_overflow. */
1023 bfd_elf_generic_reloc, /* Special_function. */
1024 "R_V850_8", /* Name. */
1025 FALSE, /* Partial_inplace. */
1026 0xff, /* Src_mask. */
1027 0xff, /* Dst_mask. */
1028 FALSE), /* PCrel_offset. */
1029
1030 /* 16 bit offset from the short data area pointer. */
1031 HOWTO (R_V850_SDA_16_16_OFFSET, /* Type. */
1032 0, /* Rightshift. */
1033 1, /* Size (0 = byte, 1 = short, 2 = long). */
1034 16, /* Bitsize. */
1035 FALSE, /* PC_relative. */
1036 0, /* Bitpos. */
1037 complain_overflow_dont, /* Complain_on_overflow. */
1038 v850_elf_reloc, /* Special_function. */
1039 "R_V850_SDA_16_16_OFFSET", /* Name. */
1040 FALSE, /* Partial_inplace. */
1041 0xffff, /* Src_mask. */
1042 0xffff, /* Dst_mask. */
1043 FALSE), /* PCrel_offset. */
1044
1045 /* 15 bit offset from the short data area pointer. */
1046 HOWTO (R_V850_SDA_15_16_OFFSET, /* Type. */
1047 1, /* Rightshift. */
1048 1, /* Size (0 = byte, 1 = short, 2 = long). */
1049 16, /* Bitsize. */
1050 FALSE, /* PC_relative. */
1051 1, /* Bitpos. */
1052 complain_overflow_dont, /* Complain_on_overflow. */
1053 v850_elf_reloc, /* Special_function. */
1054 "R_V850_SDA_15_16_OFFSET", /* Name. */
1055 FALSE, /* Partial_inplace. */
1056 0xfffe, /* Src_mask. */
1057 0xfffe, /* Dst_mask. */
1058 FALSE), /* PCrel_offset. */
1059
1060 /* 16 bit offset from the zero data area pointer. */
1061 HOWTO (R_V850_ZDA_16_16_OFFSET, /* Type. */
1062 0, /* Rightshift. */
1063 1, /* Size (0 = byte, 1 = short, 2 = long). */
1064 16, /* Bitsize. */
1065 FALSE, /* PC_relative. */
1066 0, /* Bitpos. */
1067 complain_overflow_dont, /* Complain_on_overflow. */
1068 v850_elf_reloc, /* Special_function. */
1069 "R_V850_ZDA_16_16_OFFSET", /* Name. */
1070 FALSE, /* Partial_inplace. */
1071 0xffff, /* Src_mask. */
1072 0xffff, /* Dst_mask. */
1073 FALSE), /* PCrel_offset. */
1074
1075 /* 15 bit offset from the zero data area pointer. */
1076 HOWTO (R_V850_ZDA_15_16_OFFSET, /* Type. */
1077 1, /* Rightshift. */
1078 1, /* Size (0 = byte, 1 = short, 2 = long). */
1079 16, /* Bitsize. */
1080 FALSE, /* PC_relative. */
1081 1, /* Bitpos. */
1082 complain_overflow_dont, /* Complain_on_overflow. */
1083 v850_elf_reloc, /* Special_function. */
1084 "R_V850_ZDA_15_16_OFFSET", /* Name. */
1085 FALSE, /* Partial_inplace. */
1086 0xfffe, /* Src_mask. */
1087 0xfffe, /* Dst_mask. */
1088 FALSE), /* PCrel_offset. */
1089
1090 /* 6 bit offset from the tiny data area pointer. */
1091 HOWTO (R_V850_TDA_6_8_OFFSET, /* Type. */
1092 2, /* Rightshift. */
1093 1, /* Size (0 = byte, 1 = short, 2 = long). */
1094 8, /* Bitsize. */
1095 FALSE, /* PC_relative. */
1096 1, /* Bitpos. */
1097 complain_overflow_dont, /* Complain_on_overflow. */
1098 v850_elf_reloc, /* Special_function. */
1099 "R_V850_TDA_6_8_OFFSET", /* Name. */
1100 FALSE, /* Partial_inplace. */
1101 0x7e, /* Src_mask. */
1102 0x7e, /* Dst_mask. */
1103 FALSE), /* PCrel_offset. */
1104
1105 /* 8 bit offset from the tiny data area pointer. */
1106 HOWTO (R_V850_TDA_7_8_OFFSET, /* Type. */
1107 1, /* Rightshift. */
1108 1, /* Size (0 = byte, 1 = short, 2 = long). */
1109 8, /* Bitsize. */
1110 FALSE, /* PC_relative. */
1111 0, /* Bitpos. */
1112 complain_overflow_dont, /* Complain_on_overflow. */
1113 v850_elf_reloc, /* Special_function. */
1114 "R_V850_TDA_7_8_OFFSET", /* Name. */
1115 FALSE, /* Partial_inplace. */
1116 0x7f, /* Src_mask. */
1117 0x7f, /* Dst_mask. */
1118 FALSE), /* PCrel_offset. */
1119
1120 /* 7 bit offset from the tiny data area pointer. */
1121 HOWTO (R_V850_TDA_7_7_OFFSET, /* Type. */
1122 0, /* Rightshift. */
1123 1, /* Size (0 = byte, 1 = short, 2 = long). */
1124 7, /* Bitsize. */
1125 FALSE, /* PC_relative. */
1126 0, /* Bitpos. */
1127 complain_overflow_dont, /* Complain_on_overflow. */
1128 v850_elf_reloc, /* Special_function. */
1129 "R_V850_TDA_7_7_OFFSET", /* Name. */
1130 FALSE, /* Partial_inplace. */
1131 0x7f, /* Src_mask. */
1132 0x7f, /* Dst_mask. */
1133 FALSE), /* PCrel_offset. */
1134
1135 /* 16 bit offset from the tiny data area pointer! */
1136 HOWTO (R_V850_TDA_16_16_OFFSET, /* Type. */
1137 0, /* Rightshift. */
1138 1, /* Size (0 = byte, 1 = short, 2 = long). */
1139 16, /* Bitsize. */
1140 FALSE, /* PC_relative. */
1141 0, /* Bitpos. */
1142 complain_overflow_dont, /* Complain_on_overflow. */
1143 v850_elf_reloc, /* Special_function. */
1144 "R_V850_TDA_16_16_OFFSET", /* Name. */
1145 FALSE, /* Partial_inplace. */
1146 0xffff, /* Src_mask. */
1147 0xfff, /* Dst_mask. */
1148 FALSE), /* PCrel_offset. */
1149
1150 /* 5 bit offset from the tiny data area pointer. */
1151 HOWTO (R_V850_TDA_4_5_OFFSET, /* Type. */
1152 1, /* Rightshift. */
1153 1, /* Size (0 = byte, 1 = short, 2 = long). */
1154 5, /* Bitsize. */
1155 FALSE, /* PC_relative. */
1156 0, /* Bitpos. */
1157 complain_overflow_dont, /* Complain_on_overflow. */
1158 v850_elf_reloc, /* Special_function. */
1159 "R_V850_TDA_4_5_OFFSET", /* Name. */
1160 FALSE, /* Partial_inplace. */
1161 0x0f, /* Src_mask. */
1162 0x0f, /* Dst_mask. */
1163 FALSE), /* PCrel_offset. */
1164
1165 /* 4 bit offset from the tiny data area pointer. */
1166 HOWTO (R_V850_TDA_4_4_OFFSET, /* Type. */
1167 0, /* Rightshift. */
1168 1, /* Size (0 = byte, 1 = short, 2 = long). */
1169 4, /* Bitsize. */
1170 FALSE, /* PC_relative. */
1171 0, /* Bitpos. */
1172 complain_overflow_dont, /* Complain_on_overflow. */
1173 v850_elf_reloc, /* Special_function. */
1174 "R_V850_TDA_4_4_OFFSET", /* Name. */
1175 FALSE, /* Partial_inplace. */
1176 0x0f, /* Src_mask. */
1177 0x0f, /* Dst_mask. */
1178 FALSE), /* PCrel_offset. */
1179
1180 /* 16 bit offset from the short data area pointer. */
1181 HOWTO (R_V850_SDA_16_16_SPLIT_OFFSET, /* Type. */
1182 0, /* Rightshift. */
1183 2, /* Size (0 = byte, 1 = short, 2 = long). */
1184 16, /* Bitsize. */
1185 FALSE, /* PC_relative. */
1186 0, /* Bitpos. */
1187 complain_overflow_dont, /* Complain_on_overflow. */
1188 v850_elf_reloc, /* Special_function. */
1189 "R_V850_SDA_16_16_SPLIT_OFFSET",/* Name. */
1190 FALSE, /* Partial_inplace. */
1191 0xfffe0020, /* Src_mask. */
1192 0xfffe0020, /* Dst_mask. */
1193 FALSE), /* PCrel_offset. */
1194
1195 /* 16 bit offset from the zero data area pointer. */
1196 HOWTO (R_V850_ZDA_16_16_SPLIT_OFFSET, /* Type. */
1197 0, /* Rightshift. */
1198 2, /* Size (0 = byte, 1 = short, 2 = long). */
1199 16, /* Bitsize. */
1200 FALSE, /* PC_relative. */
1201 0, /* Bitpos. */
1202 complain_overflow_dont, /* Complain_on_overflow. */
1203 v850_elf_reloc, /* Special_function. */
1204 "R_V850_ZDA_16_16_SPLIT_OFFSET",/* Name. */
1205 FALSE, /* Partial_inplace. */
1206 0xfffe0020, /* Src_mask. */
1207 0xfffe0020, /* Dst_mask. */
1208 FALSE), /* PCrel_offset. */
1209
1210 /* 6 bit offset from the call table base pointer. */
1211 HOWTO (R_V850_CALLT_6_7_OFFSET, /* Type. */
1212 0, /* Rightshift. */
1213 1, /* Size (0 = byte, 1 = short, 2 = long). */
1214 7, /* Bitsize. */
1215 FALSE, /* PC_relative. */
1216 0, /* Bitpos. */
1217 complain_overflow_dont, /* Complain_on_overflow. */
1218 v850_elf_reloc, /* Special_function. */
1219 "R_V850_CALLT_6_7_OFFSET", /* Name. */
1220 FALSE, /* Partial_inplace. */
1221 0x3f, /* Src_mask. */
1222 0x3f, /* Dst_mask. */
1223 FALSE), /* PCrel_offset. */
1224
1225 /* 16 bit offset from the call table base pointer. */
1226 HOWTO (R_V850_CALLT_16_16_OFFSET, /* Type. */
1227 0, /* Rightshift. */
1228 1, /* Size (0 = byte, 1 = short, 2 = long). */
1229 16, /* Bitsize. */
1230 FALSE, /* PC_relative. */
1231 0, /* Bitpos. */
1232 complain_overflow_dont, /* Complain_on_overflow. */
1233 v850_elf_reloc, /* Special_function. */
1234 "R_V850_CALLT_16_16_OFFSET", /* Name. */
1235 FALSE, /* Partial_inplace. */
1236 0xffff, /* Src_mask. */
1237 0xffff, /* Dst_mask. */
1238 FALSE), /* PCrel_offset. */
1239
1cd986c5 1240
47b0e7ad
NC
1241 /* GNU extension to record C++ vtable hierarchy */
1242 HOWTO (R_V850_GNU_VTINHERIT, /* Type. */
1cd986c5
NC
1243 0, /* Rightshift. */
1244 2, /* Size (0 = byte, 1 = short, 2 = long). */
1245 0, /* Bitsize. */
1246 FALSE, /* PC_relative. */
1247 0, /* Bitpos. */
1248 complain_overflow_dont, /* Complain_on_overflow. */
1249 NULL, /* Special_function. */
1250 "R_V850_GNU_VTINHERIT", /* Name. */
1251 FALSE, /* Partial_inplace. */
1252 0, /* Src_mask. */
1253 0, /* Dst_mask. */
1254 FALSE), /* PCrel_offset. */
1255
1256 /* GNU extension to record C++ vtable member usage. */
47b0e7ad 1257 HOWTO (R_V850_GNU_VTENTRY, /* Type. */
1cd986c5
NC
1258 0, /* Rightshift. */
1259 2, /* Size (0 = byte, 1 = short, 2 = long). */
1260 0, /* Bitsize. */
1261 FALSE, /* PC_relative. */
1262 0, /* Bitpos. */
1263 complain_overflow_dont, /* Complain_on_overflow. */
1264 _bfd_elf_rel_vtable_reloc_fn, /* Special_function. */
1265 "R_V850_GNU_VTENTRY", /* Name. */
1266 FALSE, /* Partial_inplace. */
1267 0, /* Src_mask. */
1268 0, /* Dst_mask. */
1269 FALSE), /* PCrel_offset. */
47b0e7ad
NC
1270
1271 /* Indicates a .longcall pseudo-op. The compiler will generate a .longcall
1272 pseudo-op when it finds a function call which can be relaxed. */
1273 HOWTO (R_V850_LONGCALL, /* Type. */
1cd986c5
NC
1274 0, /* Rightshift. */
1275 2, /* Size (0 = byte, 1 = short, 2 = long). */
1276 32, /* Bitsize. */
1277 TRUE, /* PC_relative. */
1278 0, /* Bitpos. */
1279 complain_overflow_signed, /* Complain_on_overflow. */
1280 v850_elf_ignore_reloc, /* Special_function. */
1281 "R_V850_LONGCALL", /* Name. */
1282 FALSE, /* Partial_inplace. */
1283 0, /* Src_mask. */
1284 0, /* Dst_mask. */
1285 TRUE), /* PCrel_offset. */
47b0e7ad
NC
1286
1287 /* Indicates a .longjump pseudo-op. The compiler will generate a
1288 .longjump pseudo-op when it finds a branch which can be relaxed. */
1289 HOWTO (R_V850_LONGJUMP, /* Type. */
1cd986c5
NC
1290 0, /* Rightshift. */
1291 2, /* Size (0 = byte, 1 = short, 2 = long). */
1292 32, /* Bitsize. */
1293 TRUE, /* PC_relative. */
1294 0, /* Bitpos. */
1295 complain_overflow_signed, /* Complain_on_overflow. */
1296 v850_elf_ignore_reloc, /* Special_function. */
1297 "R_V850_LONGJUMP", /* Name. */
1298 FALSE, /* Partial_inplace. */
1299 0, /* Src_mask. */
1300 0, /* Dst_mask. */
1301 TRUE), /* PCrel_offset. */
47b0e7ad
NC
1302
1303 HOWTO (R_V850_ALIGN, /* Type. */
1cd986c5
NC
1304 0, /* Rightshift. */
1305 1, /* Size (0 = byte, 1 = short, 2 = long). */
1306 0, /* Bitsize. */
1307 FALSE, /* PC_relative. */
1308 0, /* Bitpos. */
1309 complain_overflow_unsigned, /* Complain_on_overflow. */
1310 v850_elf_ignore_reloc, /* Special_function. */
1311 "R_V850_ALIGN", /* Name. */
1312 FALSE, /* Partial_inplace. */
1313 0, /* Src_mask. */
1314 0, /* Dst_mask. */
1315 TRUE), /* PCrel_offset. */
1316
47b0e7ad
NC
1317 /* Simple pc-relative 32bit reloc. */
1318 HOWTO (R_V850_REL32, /* Type. */
1319 0, /* Rightshift. */
1320 2, /* Size (0 = byte, 1 = short, 2 = long). */
1321 32, /* Bitsize. */
1322 TRUE, /* PC_relative. */
1323 0, /* Bitpos. */
1324 complain_overflow_dont, /* Complain_on_overflow. */
1325 v850_elf_reloc, /* Special_function. */
1326 "R_V850_REL32", /* Name. */
1327 FALSE, /* Partial_inplace. */
1328 0xffffffff, /* Src_mask. */
1329 0xffffffff, /* Dst_mask. */
1330 FALSE), /* PCrel_offset. */
1331
1332 /* An ld.bu version of R_V850_LO16. */
1333 HOWTO (R_V850_LO16_SPLIT_OFFSET, /* Type. */
1334 0, /* Rightshift. */
1335 2, /* Size (0 = byte, 1 = short, 2 = long). */
1336 16, /* Bitsize. */
1337 FALSE, /* PC_relative. */
1338 0, /* Bitpos. */
1339 complain_overflow_dont, /* Complain_on_overflow. */
1340 v850_elf_reloc, /* Special_function. */
1341 "R_V850_LO16_SPLIT_OFFSET", /* Name. */
1342 FALSE, /* Partial_inplace. */
1343 0xfffe0020, /* Src_mask. */
1344 0xfffe0020, /* Dst_mask. */
1345 FALSE), /* PCrel_offset. */
1cd986c5
NC
1346
1347 /* A unsigned PC relative 16 bit loop. */
1348 HOWTO (R_V850_16_PCREL, /* Type. */
1349 0, /* Rightshift. */
1350 1, /* Size (0 = byte, 1 = short, 2 = long). */
1351 16, /* Bitsize. */
1352 TRUE, /* PC_relative. */
1353 0, /* Bitpos. */
1354 complain_overflow_bitfield, /* Complain_on_overflow. */
1355 v850_elf_reloc, /* Special_function. */
1356 "R_V850_16_PCREL", /* Name. */
1357 FALSE, /* Partial_inplace. */
1358 0xfffe, /* Src_mask. */
1359 0xfffe, /* Dst_mask. */
1360 TRUE), /* PCrel_offset. */
1361
1362 /* A PC relative 17 bit branch. */
1363 HOWTO (R_V850_17_PCREL, /* Type. */
1364 0, /* Rightshift. */
1365 2, /* Size (0 = byte, 1 = short, 2 = long). */
1366 17, /* Bitsize. */
1367 TRUE, /* PC_relative. */
1368 0, /* Bitpos. */
1369 complain_overflow_bitfield, /* Complain_on_overflow. */
1370 v850_elf_reloc, /* Special_function. */
1371 "R_V850_17_PCREL", /* Name. */
1372 FALSE, /* Partial_inplace. */
1373 0x0010fffe, /* Src_mask. */
1374 0x0010fffe, /* Dst_mask. */
1375 TRUE), /* PCrel_offset. */
1376
1377 /* A 23bit offset ld/st. */
1378 HOWTO (R_V850_23, /* type. */
1379 0, /* rightshift. */
1380 2, /* size (0 = byte, 1 = short, 2 = long). */
1381 23, /* bitsize. */
1382 FALSE, /* pc_relative. */
1383 0, /* bitpos. */
1384 complain_overflow_dont, /* complain_on_overflow. */
1385 v850_elf_reloc, /* special_function. */
1386 "R_V850_23", /* name. */
1387 FALSE, /* partial_inplace. */
1388 0xffff07f0, /* src_mask. */
1389 0xffff07f0, /* dst_mask. */
1390 FALSE), /* pcrel_offset. */
1391
1392 /* A PC relative 32 bit branch. */
1393 HOWTO (R_V850_32_PCREL, /* type. */
1394 1, /* rightshift. */
1395 2, /* size (0 = byte, 1 = short, 2 = long). */
1396 32, /* bitsize. */
1397 TRUE, /* pc_relative. */
1398 1, /* bitpos. */
1399 complain_overflow_signed, /* complain_on_overflow. */
1400 v850_elf_reloc, /* special_function. */
1401 "R_V850_32_PCREL", /* name. */
1402 FALSE, /* partial_inplace. */
1403 0xfffffffe, /* src_mask. */
1404 0xfffffffe, /* dst_mask. */
1405 TRUE), /* pcrel_offset. */
1406
1407 /* A absolute 32 bit branch. */
1408 HOWTO (R_V850_32_ABS, /* type. */
1409 1, /* rightshift. */
1410 2, /* size (0 = byte, 1 = short, 2 = long). */
1411 32, /* bitsize. */
1412 TRUE, /* pc_relative. */
1413 1, /* bitpos. */
1414 complain_overflow_signed, /* complain_on_overflow. */
1415 v850_elf_reloc, /* special_function. */
1416 "R_V850_32_ABS", /* name. */
1417 FALSE, /* partial_inplace. */
1418 0xfffffffe, /* src_mask. */
1419 0xfffffffe, /* dst_mask. */
1420 FALSE), /* pcrel_offset. */
1421
1422 /* High 16 bits of symbol value. */
1423 HOWTO (R_V850_HI16, /* Type. */
1424 0, /* Rightshift. */
1425 1, /* Size (0 = byte, 1 = short, 2 = long). */
1426 16, /* Bitsize. */
1427 FALSE, /* PC_relative. */
1428 0, /* Bitpos. */
1429 complain_overflow_dont, /* Complain_on_overflow. */
1430 v850_elf_reloc, /* Special_function. */
1431 "R_V850_HI16", /* Name. */
1432 FALSE, /* Partial_inplace. */
1433 0xffff, /* Src_mask. */
1434 0xffff, /* Dst_mask. */
1435 FALSE), /* PCrel_offset. */
1436
1437 /* Low 16 bits of symbol value. */
1438 HOWTO (R_V850_16_S1, /* type. */
1439 1, /* rightshift. */
1440 1, /* size (0 = byte, 1 = short, 2 = long). */
1441 16, /* bitsize. */
1442 FALSE, /* pc_relative. */
1443 1, /* bitpos. */
1444 complain_overflow_dont, /* complain_on_overflow. */
1445 v850_elf_reloc, /* special_function. */
1446 "R_V850_16_S1", /* name. */
1447 FALSE, /* partial_inplace. */
1448 0xfffe, /* src_mask. */
1449 0xfffe, /* dst_mask. */
1450 FALSE), /* pcrel_offset. */
1451
1452 /* Low 16 bits of symbol value. */
1453 HOWTO (R_V850_LO16_S1, /* type. */
1454 1, /* rightshift. */
1455 1, /* size (0 = byte, 1 = short, 2 = long). */
1456 16, /* bitsize. */
1457 FALSE, /* pc_relative. */
1458 1, /* bitpos. */
1459 complain_overflow_dont, /* complain_on_overflow. */
1460 v850_elf_reloc, /* special_function. */
1461 "R_V850_LO16_S1", /* name. */
1462 FALSE, /* partial_inplace. */
1463 0xfffe, /* src_mask. */
1464 0xfffe, /* dst_mask. */
1465 FALSE), /* pcrel_offset. */
1466
1467 /* 16 bit offset from the call table base pointer. */
1468 HOWTO (R_V850_CALLT_15_16_OFFSET, /* type. */
1469 1, /* rightshift. */
1470 1, /* size (0 = byte, 1 = short, 2 = long). */
1471 16, /* bitsize. */
1472 FALSE, /* pc_relative. */
1473 1, /* bitpos. */
1474 complain_overflow_dont, /* complain_on_overflow. */
1475 v850_elf_reloc, /* special_function. */
1476 "R_V850_CALLT_15_16_OFFSET", /* name. */
1477 FALSE, /* partial_inplace. */
1478 0xfffe, /* src_mask. */
1479 0xfffe, /* dst_mask. */
1480 FALSE), /* pcrel_offset. */
1481
1482 /* Like R_V850_32 PCREL, but referring to the GOT table entry for
1483 the symbol. */
1484 HOWTO (R_V850_32_GOTPCREL, /* type. */
1485 0, /* rightshift. */
1486 2, /* size (0 = byte, 1 = short, 2 = long). */
1487 32, /* bitsize. */
1488 TRUE, /* pc_relative. */
1489 0, /* bitpos. */
1490 complain_overflow_unsigned, /* complain_on_overflow. */
1491 v850_elf_reloc, /* special_function. */
1492 "R_V850_32_GOTPCREL", /* name. */
1493 FALSE, /* partial_inplace. */
1494 0xffffffff, /* src_mask. */
1495 0xffffffff, /* dst_mask. */
1496 TRUE), /* pcrel_offset. */
1497
1498 /* Like R_V850_SDA_, but referring to the GOT table entry for
1499 the symbol. */
1500 HOWTO (R_V850_16_GOT, /* type. */
1501 0, /* rightshift. */
1502 2, /* size (0 = byte, 1 = short, 2 = long). */
1503 16, /* bitsize. */
1504 FALSE, /* pc_relative. */
1505 0, /* bitpos. */
1506 complain_overflow_unsigned, /* complain_on_overflow. */
1507 bfd_elf_generic_reloc, /* special_function. */
1508 "R_V850_16_GOT", /* name. */
1509 FALSE, /* partial_inplace. */
1510 0xffff, /* src_mask. */
1511 0xffff, /* dst_mask. */
1512 FALSE), /* pcrel_offset. */
1513
1514 HOWTO (R_V850_32_GOT, /* type. */
1515 0, /* rightshift. */
1516 2, /* size (0 = byte, 1 = short, 2 = long). */
1517 32, /* bitsize. */
1518 FALSE, /* pc_relative. */
1519 0, /* bitpos. */
1520 complain_overflow_unsigned, /* complain_on_overflow. */
1521 bfd_elf_generic_reloc, /* special_function. */
1522 "R_V850_32_GOT", /* name. */
1523 FALSE, /* partial_inplace. */
1524 0xffffffff, /* src_mask. */
1525 0xffffffff, /* dst_mask. */
1526 FALSE), /* pcrel_offset. */
1527
1528 /* Like R_V850_22_PCREL, but referring to the procedure linkage table
1529 entry for the symbol. */
1530 HOWTO (R_V850_22_PLT, /* type. */
1531 1, /* rightshift. */
1532 2, /* size (0 = byte, 1 = short, 2 = long). */
1533 22, /* bitsize. */
1534 TRUE, /* pc_relative. */
1535 7, /* bitpos. */
1536 complain_overflow_signed, /* complain_on_overflow. */
1537 bfd_elf_generic_reloc, /* special_function. */
1538 "R_V850_22_PLT", /* name. */
1539 FALSE, /* partial_inplace. */
1540 0x07ffff80, /* src_mask. */
1541 0x07ffff80, /* dst_mask. */
1542 TRUE), /* pcrel_offset. */
1543
1544 HOWTO (R_V850_32_PLT, /* type. */
1545 1, /* rightshift. */
1546 2, /* size (0 = byte, 1 = short, 2 = long). */
1547 32, /* bitsize. */
1548 TRUE, /* pc_relative. */
1549 1, /* bitpos. */
1550 complain_overflow_signed, /* complain_on_overflow. */
1551 bfd_elf_generic_reloc, /* special_function. */
1552 "R_V850_32_PLT", /* name. */
1553 FALSE, /* partial_inplace. */
1554 0xffffffff, /* src_mask. */
1555 0xffffffff, /* dst_mask. */
1556 TRUE), /* pcrel_offset. */
1557
1558 /* This is used only by the dynamic linker. The symbol should exist
1559 both in the object being run and in some shared library. The
1560 dynamic linker copies the data addressed by the symbol from the
1561 shared library into the object, because the object being
1562 run has to have the data at some particular address. */
1563 HOWTO (R_V850_COPY, /* type. */
1564 0, /* rightshift. */
1565 2, /* size (0 = byte, 1 = short, 2 = long). */
1566 32, /* bitsize. */
1567 FALSE, /* pc_relative. */
1568 0, /* bitpos. */
1569 complain_overflow_bitfield, /* complain_on_overflow. */
1570 bfd_elf_generic_reloc, /* special_function. */
1571 "R_V850_COPY", /* name. */
1572 FALSE, /* partial_inplace. */
1573 0xffffffff, /* src_mask. */
1574 0xffffffff, /* dst_mask. */
1575 FALSE), /* pcrel_offset. */
1576
1577 /* Like R_M32R_24, but used when setting global offset table
1578 entries. */
1579 HOWTO (R_V850_GLOB_DAT, /* type. */
1580 0, /* rightshift. */
1581 2, /* size (0 = byte, 1 = short, 2 = long) */
1582 32, /* bitsize. */
1583 FALSE, /* pc_relative. */
1584 0, /* bitpos. */
1585 complain_overflow_bitfield, /* complain_on_overflow. */
1586 bfd_elf_generic_reloc, /* special_function. */
1587 "R_V850_GLOB_DAT", /* name. */
1588 FALSE, /* partial_inplace. */
1589 0xffffffff, /* src_mask. */
1590 0xffffffff, /* dst_mask. */
1591 FALSE), /* pcrel_offset. */
1592
1593 /* Marks a procedure linkage table entry for a symbol. */
1594 HOWTO (R_V850_JMP_SLOT, /* type. */
1595 0, /* rightshift. */
1596 2, /* size (0 = byte, 1 = short, 2 = long) */
1597 32, /* bitsize. */
1598 FALSE, /* pc_relative. */
1599 0, /* bitpos. */
1600 complain_overflow_bitfield, /* complain_on_overflow. */
1601 bfd_elf_generic_reloc, /* special_function. */
1602 "R_V850_JMP_SLOT", /* name. */
1603 FALSE, /* partial_inplace. */
1604 0xffffffff, /* src_mask. */
1605 0xffffffff, /* dst_mask. */
1606 FALSE), /* pcrel_offset. */
1607
1608 /* Used only by the dynamic linker. When the object is run, this
1609 longword is set to the load address of the object, plus the
1610 addend. */
1611 HOWTO (R_V850_RELATIVE, /* type. */
1612 0, /* rightshift. */
1613 2, /* size (0 = byte, 1 = short, 2 = long) */
1614 32, /* bitsize. */
1615 FALSE, /* pc_relative. */
1616 0, /* bitpos. */
1617 complain_overflow_bitfield, /* complain_on_overflow. */
1618 bfd_elf_generic_reloc, /* special_function. */
1619 "R_V850_RELATIVE", /* name. */
1620 FALSE, /* partial_inplace. */
1621 0xffffffff, /* src_mask. */
1622 0xffffffff, /* dst_mask. */
1623 FALSE), /* pcrel_offset. */
1624
1625 HOWTO (R_V850_16_GOTOFF, /* type. */
1626 0, /* rightshift. */
1627 2, /* size (0 = byte, 1 = short, 2 = long) */
1628 16, /* bitsize. */
1629 FALSE, /* pc_relative. */
1630 0, /* bitpos. */
1631 complain_overflow_bitfield, /* complain_on_overflow. */
1632 bfd_elf_generic_reloc, /* special_function. */
1633 "R_V850_16_GOTOFF", /* name. */
1634 FALSE, /* partial_inplace. */
1635 0xffff, /* src_mask. */
1636 0xffff, /* dst_mask. */
1637 FALSE), /* pcrel_offset. */
1638
1639 HOWTO (R_V850_32_GOTOFF, /* type. */
1640 0, /* rightshift. */
1641 2, /* size (0 = byte, 1 = short, 2 = long) */
1642 32, /* bitsize. */
1643 FALSE, /* pc_relative. */
1644 0, /* bitpos. */
1645 complain_overflow_bitfield, /* complain_on_overflow. */
1646 bfd_elf_generic_reloc, /* special_function. */
1647 "R_V850_32_GOTOFF", /* name. */
1648 FALSE, /* partial_inplace. */
1649 0xffffffff, /* src_mask. */
1650 0xffffffff, /* dst_mask. */
1651 FALSE), /* pcrel_offset. */
1652
1653 HOWTO (R_V850_CODE, /* type. */
1654 0, /* rightshift. */
1655 1, /* size (0 = byte, 1 = short, 2 = long) */
1656 0, /* bitsize. */
1657 FALSE, /* pc_relative. */
1658 0, /* bitpos. */
1659 complain_overflow_unsigned, /* complain_on_overflow. */
1660 v850_elf_ignore_reloc, /* special_function. */
1661 "R_V850_CODE", /* name. */
1662 FALSE, /* partial_inplace. */
1663 0, /* src_mask. */
1664 0, /* dst_mask. */
1665 TRUE), /* pcrel_offset. */
1666
1667 HOWTO (R_V850_DATA, /* type. */
1668 0, /* rightshift. */
1669 1, /* size (0 = byte, 1 = short, 2 = long) */
1670 0, /* bitsize. */
1671 FALSE, /* pc_relative. */
1672 0, /* bitpos. */
1673 complain_overflow_unsigned, /* complain_on_overflow. */
1674 v850_elf_ignore_reloc, /* special_function. */
1675 "R_V850_DATA", /* name. */
1676 FALSE, /* partial_inplace. */
1677 0, /* src_mask. */
1678 0, /* dst_mask. */
1679 TRUE), /* pcrel_offset. */
1680
47b0e7ad
NC
1681};
1682
1683/* Map BFD reloc types to V850 ELF reloc types. */
1684
1685struct v850_elf_reloc_map
1686{
1687 /* BFD_RELOC_V850_CALLT_16_16_OFFSET is 258, which will not fix in an
1688 unsigned char. */
1689 bfd_reloc_code_real_type bfd_reloc_val;
1690 unsigned int elf_reloc_val;
1691};
1692
1693static const struct v850_elf_reloc_map v850_elf_reloc_map[] =
1694{
1cd986c5
NC
1695 { BFD_RELOC_NONE, R_V850_NONE },
1696 { BFD_RELOC_V850_9_PCREL, R_V850_9_PCREL },
1697 { BFD_RELOC_V850_22_PCREL, R_V850_22_PCREL },
1698 { BFD_RELOC_HI16_S, R_V850_HI16_S },
1699 { BFD_RELOC_HI16, R_V850_HI16 },
1700 { BFD_RELOC_LO16, R_V850_LO16 },
1701 { BFD_RELOC_32, R_V850_ABS32 },
1702 { BFD_RELOC_32_PCREL, R_V850_REL32 },
1703 { BFD_RELOC_16, R_V850_16 },
1704 { BFD_RELOC_8, R_V850_8 },
47b0e7ad
NC
1705 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V850_SDA_16_16_OFFSET },
1706 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V850_SDA_15_16_OFFSET },
1707 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V850_ZDA_16_16_OFFSET },
1708 { BFD_RELOC_V850_ZDA_15_16_OFFSET, R_V850_ZDA_15_16_OFFSET },
1709 { BFD_RELOC_V850_TDA_6_8_OFFSET, R_V850_TDA_6_8_OFFSET },
1710 { BFD_RELOC_V850_TDA_7_8_OFFSET, R_V850_TDA_7_8_OFFSET },
1711 { BFD_RELOC_V850_TDA_7_7_OFFSET, R_V850_TDA_7_7_OFFSET },
1712 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V850_TDA_16_16_OFFSET },
1713 { BFD_RELOC_V850_TDA_4_5_OFFSET, R_V850_TDA_4_5_OFFSET },
1714 { BFD_RELOC_V850_TDA_4_4_OFFSET, R_V850_TDA_4_4_OFFSET },
1715 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_LO16_SPLIT_OFFSET },
1716 { BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, R_V850_SDA_16_16_SPLIT_OFFSET },
1717 { BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, R_V850_ZDA_16_16_SPLIT_OFFSET },
1718 { BFD_RELOC_V850_CALLT_6_7_OFFSET, R_V850_CALLT_6_7_OFFSET },
1719 { BFD_RELOC_V850_CALLT_16_16_OFFSET, R_V850_CALLT_16_16_OFFSET },
1720 { BFD_RELOC_VTABLE_INHERIT, R_V850_GNU_VTINHERIT },
1721 { BFD_RELOC_VTABLE_ENTRY, R_V850_GNU_VTENTRY },
1722 { BFD_RELOC_V850_LONGCALL, R_V850_LONGCALL },
1723 { BFD_RELOC_V850_LONGJUMP, R_V850_LONGJUMP },
1724 { BFD_RELOC_V850_ALIGN, R_V850_ALIGN },
1cd986c5
NC
1725 { BFD_RELOC_V850_16_PCREL, R_V850_16_PCREL },
1726 { BFD_RELOC_V850_17_PCREL, R_V850_17_PCREL },
1727 { BFD_RELOC_V850_23, R_V850_23 },
1728 { BFD_RELOC_V850_32_PCREL, R_V850_32_PCREL },
1729 { BFD_RELOC_V850_32_ABS, R_V850_32_ABS },
1730 { BFD_RELOC_V850_16_SPLIT_OFFSET, R_V850_HI16 },
1731 { BFD_RELOC_V850_16_S1, R_V850_16_S1 },
1732 { BFD_RELOC_V850_LO16_S1, R_V850_LO16_S1 },
1733 { BFD_RELOC_V850_CALLT_15_16_OFFSET, R_V850_CALLT_15_16_OFFSET },
1734 { BFD_RELOC_V850_32_GOTPCREL, R_V850_32_GOTPCREL },
1735 { BFD_RELOC_V850_16_GOT, R_V850_16_GOT },
1736 { BFD_RELOC_V850_32_GOT, R_V850_32_GOT },
1737 { BFD_RELOC_V850_22_PLT_PCREL, R_V850_22_PLT },
1738 { BFD_RELOC_V850_32_PLT_PCREL, R_V850_32_PLT },
1739 { BFD_RELOC_V850_COPY, R_V850_COPY },
1740 { BFD_RELOC_V850_GLOB_DAT, R_V850_GLOB_DAT },
1741 { BFD_RELOC_V850_JMP_SLOT, R_V850_JMP_SLOT },
1742 { BFD_RELOC_V850_RELATIVE, R_V850_RELATIVE },
1743 { BFD_RELOC_V850_16_GOTOFF, R_V850_16_GOTOFF },
1744 { BFD_RELOC_V850_32_GOTOFF, R_V850_32_GOTOFF },
1745 { BFD_RELOC_V850_CODE, R_V850_CODE },
1746 { BFD_RELOC_V850_DATA, R_V850_DATA },
47b0e7ad 1747};
de863c74
NC
1748
1749#define V800_RELOC(name,sz,bit,shift,complain,pcrel,resolver) \
1750 HOWTO (name, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
1751 bfd_elf_ ## resolver ## _reloc, #name, FALSE, 0, ~0, FALSE)
1752
1753#define V800_EMPTY(name) EMPTY_HOWTO (name - R_V810_NONE)
1754
1755#define bfd_elf_v850_reloc v850_elf_reloc
1756
1757/* Note: It is REQUIRED that the 'type' value (R_V810_...) of each entry
1758 in this array match the index of the entry in the array minus 0x30.
1759 See: bfd_elf_v850_relocate_section(), v800_elf_reloc_type_lookup()
1760 and v800_elf_info_to_howto(). */
1761
1762static reloc_howto_type v800_elf_howto_table[] =
1763{
1764 V800_RELOC (R_V810_NONE, 0, 0, 0, dont, FALSE, generic), /* Type = 0x30 */
1765 V800_RELOC (R_V810_BYTE, 0, 8, 0, dont, FALSE, generic),
1766 V800_RELOC (R_V810_HWORD, 1, 16, 0, dont, FALSE, generic),
1767 V800_RELOC (R_V810_WORD, 2, 32, 0, dont, FALSE, generic),
1768 V800_RELOC (R_V810_WLO, 1, 16, 0, dont, FALSE, generic),
1769 V800_RELOC (R_V810_WHI, 1, 16, 0, dont, FALSE, generic),
1770 V800_RELOC (R_V810_WHI1, 1, 16, 0, dont, FALSE, generic),
1771 V800_RELOC (R_V810_GPBYTE, 0, 8, 0, dont, FALSE, v850),
1772 V800_RELOC (R_V810_GPHWORD, 1, 16, 0, dont, FALSE, v850),
1773 V800_RELOC (R_V810_GPWORD, 2, 32, 0, dont, FALSE, v850),
1774 V800_RELOC (R_V810_GPWLO, 1, 16, 0, dont, FALSE, v850),
1775 V800_RELOC (R_V810_GPWHI, 1, 16, 0, dont, FALSE, v850),
1776 V800_RELOC (R_V810_GPWHI1, 1, 16, 0, dont, FALSE, v850),
1777 V800_RELOC (R_V850_HWLO, 1, 16, 0, dont, FALSE, generic),
1778 V800_EMPTY (R_V810_reserved1),
1779 V800_RELOC (R_V850_EP7BIT, 0, 7, 0, unsigned, FALSE, v850),
1780 V800_RELOC (R_V850_EPHBYTE, 0, 8, 1, unsigned, FALSE, v850),
1781 V800_RELOC (R_V850_EPWBYTE, 0, 8, 2, unsigned, FALSE, v850),
1782 V800_RELOC (R_V850_REGHWLO, 1, 16, 0, dont, FALSE, v850),
1783 V800_EMPTY (R_V810_reserved2),
1784 V800_RELOC (R_V850_GPHWLO, 1, 16, 0, dont, FALSE, v850),
1785 V800_EMPTY (R_V810_reserved3),
1786 V800_RELOC (R_V850_PCR22, 2, 22, 0, signed, TRUE, generic),
1787 V800_RELOC (R_V850_BLO, 2, 24, 0, dont, FALSE, v850),
1788 V800_RELOC (R_V850_EP4BIT, 0, 4, 0, unsigned, FALSE, v850),
1789 V800_RELOC (R_V850_EP5BIT, 0, 5, 0, unsigned, FALSE, v850),
1790 V800_RELOC (R_V850_REGBLO, 2, 24, 0, dont, FALSE, v850),
1791 V800_RELOC (R_V850_GPBLO, 2, 24, 0, dont, FALSE, v850),
1792 V800_RELOC (R_V810_WLO_1, 1, 16, 0, dont, FALSE, v850),
1793 V800_RELOC (R_V810_GPWLO_1, 1, 16, 0, signed, FALSE, v850),
1794 V800_RELOC (R_V850_BLO_1, 2, 16, 0, signed, FALSE, v850),
1795 V800_RELOC (R_V850_HWLO_1, 1, 16, 0, signed, FALSE, v850),
1796 V800_EMPTY (R_V810_reserved4),
1797 V800_RELOC (R_V850_GPBLO_1, 2, 16, 1, signed, FALSE, v850),
1798 V800_RELOC (R_V850_GPHWLO_1, 1, 16, 1, signed, FALSE, v850),
1799 V800_EMPTY (R_V810_reserved5),
1800 V800_RELOC (R_V850_EPBLO, 2, 16, 1, signed, FALSE, v850),
1801 V800_RELOC (R_V850_EPHWLO, 1, 16, 1, signed, FALSE, v850),
1802 V800_EMPTY (R_V810_reserved6),
1803 V800_RELOC (R_V850_EPWLO_N, 1, 16, 1, signed, FALSE, v850),
1804 V800_RELOC (R_V850_PC32, 2, 32, 1, signed, TRUE, v850),
1805 V800_RELOC (R_V850_W23BIT, 2, 23, 1, signed, FALSE, v850),
1806 V800_RELOC (R_V850_GPW23BIT, 2, 23, 1, signed, FALSE, v850),
1807 V800_RELOC (R_V850_EPW23BIT, 2, 23, 1, signed, FALSE, v850),
1808 V800_RELOC (R_V850_B23BIT, 2, 23, 1, signed, FALSE, v850),
1809 V800_RELOC (R_V850_GPB23BIT, 2, 23, 1, signed, FALSE, v850),
1810 V800_RELOC (R_V850_EPB23BIT, 2, 23, 1, signed, FALSE, v850),
1811 V800_RELOC (R_V850_PC16U, 1, 16, 1, unsigned, TRUE, generic),
1812 V800_RELOC (R_V850_PC17, 2, 17, 1, signed, TRUE, generic),
1813 V800_RELOC (R_V850_DW8, 2, 8, 2, signed, FALSE, v850),
1814 V800_RELOC (R_V850_GPDW8, 2, 8, 2, signed, FALSE, v850),
1815 V800_RELOC (R_V850_EPDW8, 2, 8, 2, signed, FALSE, v850),
1816 V800_RELOC (R_V850_PC9, 1, 9, 3, signed, TRUE, v850),
1817 V800_RELOC (R_V810_REGBYTE, 0, 8, 0, dont, FALSE, v850),
1818 V800_RELOC (R_V810_REGHWORD, 1, 16, 0, dont, FALSE, v850),
1819 V800_RELOC (R_V810_REGWORD, 2, 32, 0, dont, FALSE, v850),
1820 V800_RELOC (R_V810_REGWLO, 1, 16, 0, dont, FALSE, v850),
1821 V800_RELOC (R_V810_REGWHI, 1, 16, 0, dont, FALSE, v850),
1822 V800_RELOC (R_V810_REGWHI1, 1, 16, 0, dont, FALSE, v850),
1823 V800_RELOC (R_V850_REGW23BIT, 2, 23, 1, signed, FALSE, v850),
1824 V800_RELOC (R_V850_REGB23BIT, 2, 23, 1, signed, FALSE, v850),
1825 V800_RELOC (R_V850_REGDW8, 2, 8, 2, signed, FALSE, v850),
1826 V800_RELOC (R_V810_EPBYTE, 0, 8, 0, dont, FALSE, v850),
1827 V800_RELOC (R_V810_EPHWORD, 1, 16, 0, dont, FALSE, v850),
1828 V800_RELOC (R_V810_EPWORD, 2, 32, 0, dont, FALSE, v850),
1829 V800_RELOC (R_V850_WLO23, 2, 32, 1, dont, FALSE, v850),
1830 V800_RELOC (R_V850_WORD_E, 2, 32, 1, dont, FALSE, v850),
1831 V800_RELOC (R_V850_REGWORD_E, 2, 32, 1, dont, FALSE, v850),
1832 V800_RELOC (R_V850_WORD, 2, 32, 0, dont, FALSE, v850),
1833 V800_RELOC (R_V850_GPWORD, 2, 32, 0, dont, FALSE, v850),
1834 V800_RELOC (R_V850_REGWORD, 2, 32, 0, dont, FALSE, v850),
1835 V800_RELOC (R_V850_EPWORD, 2, 32, 0, dont, FALSE, v850),
1836 V800_RELOC (R_V810_TPBYTE, 0, 8, 0, dont, FALSE, v850),
1837 V800_RELOC (R_V810_TPHWORD, 1, 16, 0, dont, FALSE, v850),
1838 V800_RELOC (R_V810_TPWORD, 2, 32, 0, dont, FALSE, v850),
1839 V800_RELOC (R_V810_TPWLO, 1, 16, 0, dont, FALSE, v850),
1840 V800_RELOC (R_V810_TPWHI, 1, 16, 0, dont, FALSE, v850),
1841 V800_RELOC (R_V810_TPWHI1, 1, 16, 0, dont, FALSE, v850),
1842 V800_RELOC (R_V850_TPHWLO, 1, 16, 1, dont, FALSE, v850),
1843 V800_RELOC (R_V850_TPBLO, 2, 24, 0, dont, FALSE, v850),
1844 V800_RELOC (R_V810_TPWLO_1, 1, 16, 0, signed, FALSE, v850),
1845 V800_RELOC (R_V850_TPBLO_1, 2, 16, 0, signed, FALSE, v850),
1846 V800_RELOC (R_V850_TPHWLO_1, 1, 16, 0, signed, FALSE, v850),
1847 V800_RELOC (R_V850_TP23BIT, 2, 23, 0, signed, FALSE, v850),
1848 V800_RELOC (R_V850_TPW23BIT, 2, 23, 0, signed, FALSE, v850),
1849 V800_RELOC (R_V850_TPDW8, 2, 8, 0, signed, FALSE, v850)
1850};
47b0e7ad
NC
1851\f
1852/* Map a bfd relocation into the appropriate howto structure. */
1853
1854static reloc_howto_type *
1855v850_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1856 bfd_reloc_code_real_type code)
1857{
1858 unsigned int i;
1859
1860 for (i = ARRAY_SIZE (v850_elf_reloc_map); i --;)
1861 if (v850_elf_reloc_map[i].bfd_reloc_val == code)
1862 {
1863 unsigned int elf_reloc_val = v850_elf_reloc_map[i].elf_reloc_val;
1864
1865 BFD_ASSERT (v850_elf_howto_table[elf_reloc_val].type == elf_reloc_val);
1866
1867 return v850_elf_howto_table + elf_reloc_val;
1868 }
1869
1870 return NULL;
1871}
157090f7
AM
1872
1873static reloc_howto_type *
1874v850_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1875 const char *r_name)
1876{
1877 unsigned int i;
1878
1879 for (i = 0;
1880 i < sizeof (v850_elf_howto_table) / sizeof (v850_elf_howto_table[0]);
1881 i++)
1882 if (v850_elf_howto_table[i].name != NULL
1883 && strcasecmp (v850_elf_howto_table[i].name, r_name) == 0)
1884 return &v850_elf_howto_table[i];
1885
1886 return NULL;
1887}
47b0e7ad
NC
1888\f
1889/* Set the howto pointer for an V850 ELF reloc. */
1890
1891static void
1892v850_elf_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED,
1893 arelent *cache_ptr,
1894 Elf_Internal_Rela *dst)
1895{
1896 unsigned int r_type;
1897
1898 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC
1899 if (r_type >= (unsigned int) R_V850_max)
1900 {
64d29018 1901 _bfd_error_handler (_("%B: invalid V850 reloc number: %d"), abfd, r_type);
5860e3f8
NC
1902 r_type = 0;
1903 }
47b0e7ad
NC
1904 cache_ptr->howto = &v850_elf_howto_table[r_type];
1905}
1906
1907/* Set the howto pointer for a V850 ELF reloc (type RELA). */
1908
1909static void
1910v850_elf_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
1911 arelent * cache_ptr,
1912 Elf_Internal_Rela *dst)
1913{
1914 unsigned int r_type;
1915
1916 r_type = ELF32_R_TYPE (dst->r_info);
cd21f5da
NC
1917 if (r_type >= (unsigned int) R_V850_max)
1918 {
64d29018 1919 _bfd_error_handler (_("%B: invalid V850 reloc number: %d"), abfd, r_type);
cd21f5da
NC
1920 r_type = 0;
1921 }
47b0e7ad
NC
1922 cache_ptr->howto = &v850_elf_howto_table[r_type];
1923}
252b5132 1924\f
b34976b6 1925static bfd_boolean
47b0e7ad 1926v850_elf_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, const char *name)
252b5132
RH
1927{
1928 return ( (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
1929 || (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_'));
1930}
41702d50
NC
1931
1932static bfd_boolean
1933v850_elf_is_target_special_symbol (bfd *abfd, asymbol *sym)
1934{
1935 return v850_elf_is_local_label_name (abfd, sym->name);
1936}
252b5132 1937\f
5cec6941
NC
1938/* We overload some of the bfd_reloc error codes for own purposes. */
1939#define bfd_reloc_gp_not_found bfd_reloc_other
1940#define bfd_reloc_ep_not_found bfd_reloc_continue
1941#define bfd_reloc_ctbp_not_found (bfd_reloc_dangerous + 1)
1942
252b5132 1943/* Perform a relocation as part of a final link. */
e12dd2ea 1944
252b5132 1945static bfd_reloc_status_type
47b0e7ad
NC
1946v850_elf_final_link_relocate (reloc_howto_type *howto,
1947 bfd *input_bfd,
1948 bfd *output_bfd ATTRIBUTE_UNUSED,
1949 asection *input_section,
1950 bfd_byte *contents,
1951 bfd_vma offset,
1952 bfd_vma value,
1953 bfd_vma addend,
1954 struct bfd_link_info *info,
1955 asection *sym_sec,
1956 int is_local ATTRIBUTE_UNUSED)
252b5132 1957{
b34976b6
AM
1958 unsigned int r_type = howto->type;
1959 bfd_byte *hit_data = contents + offset;
252b5132
RH
1960
1961 /* Adjust the value according to the relocation. */
1962 switch (r_type)
1963 {
de863c74 1964 case R_V850_PC9:
252b5132
RH
1965 case R_V850_9_PCREL:
1966 value -= (input_section->output_section->vma
1967 + input_section->output_offset);
1968 value -= offset;
1969 break;
435b1e90 1970
de863c74 1971 case R_V850_PC16U:
1cd986c5
NC
1972 case R_V850_16_PCREL:
1973 value -= (input_section->output_section->vma
1974 + input_section->output_offset
1975 + offset);
1976
1977 /* If the sign extension will corrupt the value then we have overflowed. */
1978 if ((value & 0xffff0000) != 0xffff0000)
1979 return bfd_reloc_overflow;
1980
1981 break;
1982
de863c74 1983 case R_V850_PC17:
1cd986c5
NC
1984 case R_V850_17_PCREL:
1985 value -= (input_section->output_section->vma
1986 + input_section->output_offset
1987 + offset);
1988
1989 /* If the sign extension will corrupt the value then we have overflowed. */
1990 if (((value & 0xffff0000) != 0x0) && ((value & 0xffff0000) != 0xffff0000))
1991 return bfd_reloc_overflow;
1992
1993 value = SEXT17 (value);
1994 break;
1995
de863c74 1996 case R_V850_PCR22:
252b5132
RH
1997 case R_V850_22_PCREL:
1998 value -= (input_section->output_section->vma
1999 + input_section->output_offset
2000 + offset);
2001
232fb1a3 2002 /* If the sign extension will corrupt the value then we have overflowed. */
1cd986c5 2003 if (((value & 0xffe00000) != 0x0) && ((value & 0xffe00000) != 0xffe00000))
232fb1a3 2004 return bfd_reloc_overflow;
435b1e90 2005
1cd986c5
NC
2006 /* Only the bottom 22 bits of the PC are valid. */
2007 value = SEXT22 (value);
252b5132 2008 break;
435b1e90 2009
de863c74 2010 case R_V850_PC32:
1cd986c5 2011 case R_V850_32_PCREL:
e30ddb24
NC
2012 value -= (input_section->output_section->vma
2013 + input_section->output_offset
2014 + offset);
2015 break;
2016
1cd986c5
NC
2017 case R_V850_32_ABS:
2018 case R_V850_23:
252b5132
RH
2019 case R_V850_HI16_S:
2020 case R_V850_HI16:
2021 case R_V850_LO16:
1cd986c5 2022 case R_V850_LO16_S1:
1e50d24d 2023 case R_V850_LO16_SPLIT_OFFSET:
252b5132 2024 case R_V850_16:
e30ddb24 2025 case R_V850_ABS32:
252b5132 2026 case R_V850_8:
de863c74
NC
2027 case R_V810_BYTE:
2028 case R_V810_HWORD:
2029 case R_V810_WORD:
2030 case R_V810_WLO:
2031 case R_V810_WHI:
2032 case R_V810_WHI1:
2033 case R_V810_WLO_1:
2034 case R_V850_WLO23:
2035 case R_V850_BLO:
252b5132
RH
2036 break;
2037
435b1e90 2038 case R_V850_ZDA_15_16_OFFSET:
252b5132
RH
2039 case R_V850_ZDA_16_16_OFFSET:
2040 case R_V850_ZDA_16_16_SPLIT_OFFSET:
2041 if (sym_sec == NULL)
2042 return bfd_reloc_undefined;
435b1e90 2043
252b5132
RH
2044 value -= sym_sec->output_section->vma;
2045 break;
2046
2047 case R_V850_SDA_15_16_OFFSET:
2048 case R_V850_SDA_16_16_OFFSET:
2049 case R_V850_SDA_16_16_SPLIT_OFFSET:
de863c74 2050 case R_V810_GPWLO_1:
252b5132
RH
2051 {
2052 unsigned long gp;
2053 struct bfd_link_hash_entry * h;
2054
2055 if (sym_sec == NULL)
2056 return bfd_reloc_undefined;
435b1e90 2057
252b5132 2058 /* Get the value of __gp. */
b34976b6 2059 h = bfd_link_hash_lookup (info->hash, "__gp", FALSE, FALSE, TRUE);
47b0e7ad 2060 if (h == NULL
252b5132 2061 || h->type != bfd_link_hash_defined)
5cec6941 2062 return bfd_reloc_gp_not_found;
252b5132
RH
2063
2064 gp = (h->u.def.value
2065 + h->u.def.section->output_section->vma
2066 + h->u.def.section->output_offset);
2067
2068 value -= sym_sec->output_section->vma;
2069 value -= (gp - sym_sec->output_section->vma);
2070 }
2071 break;
2072
2073 case R_V850_TDA_4_4_OFFSET:
2074 case R_V850_TDA_4_5_OFFSET:
252b5132
RH
2075 case R_V850_TDA_7_7_OFFSET:
2076 case R_V850_TDA_7_8_OFFSET:
2077 case R_V850_TDA_6_8_OFFSET:
1cd986c5 2078 case R_V850_TDA_16_16_OFFSET:
252b5132
RH
2079 {
2080 unsigned long ep;
2081 struct bfd_link_hash_entry * h;
435b1e90 2082
252b5132 2083 /* Get the value of __ep. */
b34976b6 2084 h = bfd_link_hash_lookup (info->hash, "__ep", FALSE, FALSE, TRUE);
47b0e7ad 2085 if (h == NULL
252b5132 2086 || h->type != bfd_link_hash_defined)
5cec6941 2087 return bfd_reloc_ep_not_found;
252b5132
RH
2088
2089 ep = (h->u.def.value
2090 + h->u.def.section->output_section->vma
2091 + h->u.def.section->output_offset);
2092
2093 value -= ep;
2094 }
2095 break;
435b1e90 2096
252b5132
RH
2097 case R_V850_CALLT_6_7_OFFSET:
2098 {
2099 unsigned long ctbp;
2100 struct bfd_link_hash_entry * h;
435b1e90 2101
252b5132 2102 /* Get the value of __ctbp. */
b34976b6 2103 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 2104 if (h == NULL
252b5132 2105 || h->type != bfd_link_hash_defined)
5cec6941 2106 return bfd_reloc_ctbp_not_found;
252b5132
RH
2107
2108 ctbp = (h->u.def.value
2109 + h->u.def.section->output_section->vma
2110 + h->u.def.section->output_offset);
2111 value -= ctbp;
2112 }
2113 break;
435b1e90 2114
1cd986c5 2115 case R_V850_CALLT_15_16_OFFSET:
252b5132
RH
2116 case R_V850_CALLT_16_16_OFFSET:
2117 {
2118 unsigned long ctbp;
2119 struct bfd_link_hash_entry * h;
2120
2121 if (sym_sec == NULL)
2122 return bfd_reloc_undefined;
435b1e90 2123
252b5132 2124 /* Get the value of __ctbp. */
b34976b6 2125 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 2126 if (h == NULL
252b5132 2127 || h->type != bfd_link_hash_defined)
5cec6941 2128 return bfd_reloc_ctbp_not_found;
252b5132
RH
2129
2130 ctbp = (h->u.def.value
2131 + h->u.def.section->output_section->vma
2132 + h->u.def.section->output_offset);
2133
2134 value -= sym_sec->output_section->vma;
2135 value -= (ctbp - sym_sec->output_section->vma);
2136 }
2137 break;
435b1e90 2138
252b5132 2139 case R_V850_NONE:
de863c74 2140 case R_V810_NONE:
252b5132
RH
2141 case R_V850_GNU_VTINHERIT:
2142 case R_V850_GNU_VTENTRY:
86aba9db
NC
2143 case R_V850_LONGCALL:
2144 case R_V850_LONGJUMP:
2145 case R_V850_ALIGN:
252b5132
RH
2146 return bfd_reloc_ok;
2147
2148 default:
de863c74 2149#ifdef DEBUG
64d29018 2150 fprintf (stderr, "%B: reloc number %d not recognised\n", input_bfd, r_type);
de863c74 2151#endif
252b5132
RH
2152 return bfd_reloc_notsupported;
2153 }
2154
2155 /* Perform the relocation. */
435b1e90 2156 return v850_elf_perform_relocation (input_bfd, r_type, value + addend, hit_data);
252b5132 2157}
252b5132
RH
2158\f
2159/* Relocate an V850 ELF section. */
e12dd2ea 2160
b34976b6 2161static bfd_boolean
47b0e7ad
NC
2162v850_elf_relocate_section (bfd *output_bfd,
2163 struct bfd_link_info *info,
2164 bfd *input_bfd,
2165 asection *input_section,
2166 bfd_byte *contents,
2167 Elf_Internal_Rela *relocs,
2168 Elf_Internal_Sym *local_syms,
2169 asection **local_sections)
252b5132 2170{
b34976b6
AM
2171 Elf_Internal_Shdr *symtab_hdr;
2172 struct elf_link_hash_entry **sym_hashes;
2173 Elf_Internal_Rela *rel;
2174 Elf_Internal_Rela *relend;
252b5132
RH
2175
2176 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
2177 sym_hashes = elf_sym_hashes (input_bfd);
2178
252b5132
RH
2179 /* Reset the list of remembered HI16S relocs to empty. */
2180 free_hi16s = previous_hi16s;
2181 previous_hi16s = NULL;
2182 hi16s_counter = 0;
435b1e90 2183
252b5132
RH
2184 rel = relocs;
2185 relend = relocs + input_section->reloc_count;
2186 for (; rel < relend; rel++)
2187 {
de863c74 2188 unsigned int r_type;
b34976b6
AM
2189 reloc_howto_type *howto;
2190 unsigned long r_symndx;
2191 Elf_Internal_Sym *sym;
2192 asection *sec;
2193 struct elf_link_hash_entry *h;
2194 bfd_vma relocation;
2195 bfd_reloc_status_type r;
252b5132
RH
2196
2197 r_symndx = ELF32_R_SYM (rel->r_info);
2198 r_type = ELF32_R_TYPE (rel->r_info);
2199
2200 if (r_type == R_V850_GNU_VTENTRY
2201 || r_type == R_V850_GNU_VTINHERIT)
2202 continue;
2203
de863c74
NC
2204 if (bfd_get_arch (input_bfd) == bfd_arch_v850_rh850)
2205 howto = v800_elf_howto_table + (r_type - R_V810_NONE);
2206 else
2207 howto = v850_elf_howto_table + r_type;
2208
2209 BFD_ASSERT (r_type == howto->type);
2210
252b5132
RH
2211 h = NULL;
2212 sym = NULL;
2213 sec = NULL;
2214 if (r_symndx < symtab_hdr->sh_info)
2215 {
2216 sym = local_syms + r_symndx;
2217 sec = local_sections[r_symndx];
8517fae7 2218 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
2219 }
2220 else
2221 {
62d887d4 2222 bfd_boolean unresolved_reloc, warned, ignored;
435b1e90 2223
47b0e7ad
NC
2224 /* Note - this check is delayed until now as it is possible and
2225 valid to have a file without any symbols but with relocs that
2226 can be processed. */
641bd093
NC
2227 if (sym_hashes == NULL)
2228 {
2229 info->callbacks->warning
2230 (info, "no hash table available",
2231 NULL, input_bfd, input_section, (bfd_vma) 0);
2232
2233 return FALSE;
2234 }
2235
b2a8e766
AM
2236 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
2237 r_symndx, symtab_hdr, sym_hashes,
2238 h, sec, relocation,
62d887d4 2239 unresolved_reloc, warned, ignored);
252b5132
RH
2240 }
2241
dbaa2011 2242 if (sec != NULL && discarded_section (sec))
e4067dbb 2243 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 2244 rel, 1, relend, howto, 0, contents);
ab96bf03 2245
0e1862bb 2246 if (bfd_link_relocatable (info))
ab96bf03
AM
2247 continue;
2248
e12dd2ea 2249 /* FIXME: We should use the addend, but the COFF relocations don't. */
252b5132
RH
2250 r = v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
2251 input_section,
2252 contents, rel->r_offset,
2253 relocation, rel->r_addend,
2254 info, sec, h == NULL);
2255
2256 if (r != bfd_reloc_ok)
2257 {
2258 const char * name;
47b0e7ad 2259 const char * msg = NULL;
252b5132
RH
2260
2261 if (h != NULL)
2262 name = h->root.root.string;
2263 else
2264 {
2265 name = (bfd_elf_string_from_elf_section
2266 (input_bfd, symtab_hdr->sh_link, sym->st_name));
2267 if (name == NULL || *name == '\0')
2268 name = bfd_section_name (input_bfd, sec);
2269 }
2270
ceaf50a2 2271 switch ((int) r)
252b5132
RH
2272 {
2273 case bfd_reloc_overflow:
2274 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
2275 (info, (h ? &h->root : NULL), name, howto->name,
2276 (bfd_vma) 0, input_bfd, input_section,
2277 rel->r_offset)))
b34976b6 2278 return FALSE;
252b5132
RH
2279 break;
2280
2281 case bfd_reloc_undefined:
2282 if (! ((*info->callbacks->undefined_symbol)
2283 (info, name, input_bfd, input_section,
b34976b6
AM
2284 rel->r_offset, TRUE)))
2285 return FALSE;
252b5132
RH
2286 break;
2287
2288 case bfd_reloc_outofrange:
2289 msg = _("internal error: out of range error");
2290 goto common_error;
2291
2292 case bfd_reloc_notsupported:
2293 msg = _("internal error: unsupported relocation error");
2294 goto common_error;
2295
2296 case bfd_reloc_dangerous:
2297 msg = _("internal error: dangerous relocation");
2298 goto common_error;
2299
5cec6941 2300 case bfd_reloc_gp_not_found:
252b5132
RH
2301 msg = _("could not locate special linker symbol __gp");
2302 goto common_error;
2303
5cec6941 2304 case bfd_reloc_ep_not_found:
252b5132
RH
2305 msg = _("could not locate special linker symbol __ep");
2306 goto common_error;
2307
5cec6941 2308 case bfd_reloc_ctbp_not_found:
252b5132
RH
2309 msg = _("could not locate special linker symbol __ctbp");
2310 goto common_error;
435b1e90 2311
252b5132
RH
2312 default:
2313 msg = _("internal error: unknown error");
2314 /* fall through */
2315
2316 common_error:
2317 if (!((*info->callbacks->warning)
2318 (info, msg, name, input_bfd, input_section,
2319 rel->r_offset)))
b34976b6 2320 return FALSE;
252b5132
RH
2321 break;
2322 }
2323 }
2324 }
2325
b34976b6 2326 return TRUE;
252b5132
RH
2327}
2328
252b5132 2329static asection *
47b0e7ad 2330v850_elf_gc_mark_hook (asection *sec,
07adf181 2331 struct bfd_link_info *info,
47b0e7ad
NC
2332 Elf_Internal_Rela *rel,
2333 struct elf_link_hash_entry *h,
2334 Elf_Internal_Sym *sym)
252b5132
RH
2335{
2336 if (h != NULL)
07adf181 2337 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH
2338 {
2339 case R_V850_GNU_VTINHERIT:
2340 case R_V850_GNU_VTENTRY:
07adf181
AM
2341 return NULL;
2342 }
9ad5cbcf 2343
07adf181 2344 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132 2345}
e12dd2ea 2346
685080f2
NC
2347static void
2348v850_set_note (bfd * abfd, asection * s, enum v850_notes note, unsigned int val)
2349{
2350 bfd_byte * data = s->contents + ((note - 1) * SIZEOF_V850_NOTE);
2351
2352 bfd_put_32 (abfd, 4, data + 0);
2353 bfd_put_32 (abfd, 4, data + 4);
2354 bfd_put_32 (abfd, note, data + 8);
2355 memcpy (data + 12, V850_NOTE_NAME, 4);
2356 bfd_put_32 (abfd, val, data + 16);
2357}
2358
2359/* Create the note section if not already present. This is done early so
2360 that the linker maps the sections to the right place in the output. */
2361
2362static asection *
2363v850_elf_make_note_section (bfd * abfd)
1b786873 2364{
685080f2
NC
2365 asection *s;
2366 bfd_byte *data;
2367 flagword flags;
2368 enum v850_notes id;
2369
2370 /* Make the note section. */
2371 flags = SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_MERGE;
2372
2373 s = bfd_make_section_anyway_with_flags (abfd, V850_NOTE_SECNAME, flags);
2374 if (s == NULL)
2375 return NULL;
2376
2377 if (!bfd_set_section_alignment (abfd, s, 2))
2378 return NULL;
2379
2380 /* Allocate space for all known notes. */
2381 if (!bfd_set_section_size (abfd, s, NUM_V850_NOTES * SIZEOF_V850_NOTE))
2382 return NULL;
2383
2384 data = bfd_zalloc (abfd, NUM_V850_NOTES * SIZEOF_V850_NOTE);
2385 if (data == NULL)
2386 return NULL;
2387
2388 s->contents = data;
2389
2390 /* Provide default (= uninitilaised) values for all of the notes. */
2391 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2392 v850_set_note (abfd, s, id, 0);
2393
2394 return s;
2395}
2396
2397/* Create the note section if not already present. This is done early so
2398 that the linker maps the sections to the right place in the output. */
2399
2400bfd_boolean
2401v850_elf_create_sections (struct bfd_link_info * info)
2402{
2403 bfd * ibfd;
2404
2405 /* If we already have a note section, do not make another. */
2406 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
2407 if (bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME) != NULL)
2408 return TRUE;
2409
2410 return v850_elf_make_note_section (info->input_bfds) != NULL;
2411}
2412
2413bfd_boolean
2414v850_elf_set_note (bfd * abfd, enum v850_notes note, unsigned int val)
2415{
2416 asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME);
2417
2418 if (val > 2)
2419 /* At the moment, no known note has a value over 2. */
2420 return FALSE;
2421
2422 if (notes == NULL)
2423 notes = v850_elf_make_note_section (abfd);
2424 if (notes == NULL)
2425 return FALSE;
2426
2427 v850_set_note (abfd, notes, note, val);
2428 return TRUE;
2429}
2430
2431/* Copy backend specific data from one object module to another. */
2432
2433static bfd_boolean
2434v850_elf_copy_private_bfd_data (bfd * ibfd, bfd * obfd)
2435{
2436 asection * onotes;
2437 asection * inotes;
2438
2439 /* If the output bfd does not have a note section, then
2440 skip the merge. The normal input to output section
2441 copying will take care of everythng for us. */
2442 if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL)
2443 return TRUE;
2444
e43fb831
AM
2445 if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) == NULL)
2446 return TRUE;
2447
2448 if (bfd_section_size (ibfd, inotes) == bfd_section_size (obfd, onotes))
685080f2
NC
2449 {
2450 bfd_byte * icont;
2451 bfd_byte * ocont;
2452
685080f2
NC
2453 if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL)
2454 BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont));
2455
2456 if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL)
2457 BFD_ASSERT (bfd_malloc_and_get_section (obfd, onotes, & ocont));
2458
2459 /* Copy/overwrite notes from the input to the output. */
2460 memcpy (ocont, icont, bfd_section_size (obfd, onotes));
2461 }
2462
2463 return TRUE;
2464}
2465#define bfd_elf32_bfd_copy_private_bfd_data v850_elf_copy_private_bfd_data
2466
1b786873 2467static bfd_boolean
685080f2
NC
2468v850_elf_merge_notes (bfd * ibfd, bfd *obfd)
2469{
2470 asection * onotes;
2471 asection * inotes;
2472 bfd_boolean result = TRUE;
2473
2474 /* If the output bfd does not have a note section, then
2475 skip the merge. The normal input to output section
2476 copying will take care of everythng for us. */
2477 if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL)
2478 return TRUE;
2479
2480 if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) != NULL)
2481 {
2482 enum v850_notes id;
2483 bfd_byte * icont;
2484 bfd_byte * ocont;
2485
2486 BFD_ASSERT (bfd_section_size (ibfd, inotes) == bfd_section_size (obfd, onotes));
2487
2488 if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL)
2489 BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont));
2490
2491 if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL)
2492 BFD_ASSERT (bfd_malloc_and_get_section (obfd, onotes, & ocont));
2493
2494 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2495 {
2496 unsigned int ival;
2497 unsigned int oval;
2498 bfd_byte * idata = icont + ((id - 1) * SIZEOF_V850_NOTE) + 16;
2499 bfd_byte * odata = ocont + ((id - 1) * SIZEOF_V850_NOTE) + 16;
2500
2501 ival = bfd_get_32 (ibfd, idata);
2502 oval = bfd_get_32 (obfd, odata);
2503
2504 if (ival == 0 || ival == oval)
2505 continue;
1b786873 2506
685080f2
NC
2507 if (oval == 0)
2508 {
2509 bfd_put_32 (obfd, ival, odata);
2510 v850_set_note (obfd, onotes, id, ival);
2511 continue;
2512 }
2513
2514 /* We have a mismatch. The ABI defines how to handle
2515 this siutation on a per note type basis. */
2516 switch (id)
2517 {
2518 case V850_NOTE_ALIGNMENT:
2519 if (oval == EF_RH850_DATA_ALIGN4)
2520 {
2521 _bfd_error_handler
2522 (_("error: %B needs 8-byte aligment but %B is set for 4-byte alignment"),
2523 ibfd, obfd);
2524 result = FALSE;
2525 }
2526 else
2527 /* ibfd uses 4-byte alignment, obfd uses 8-byte alignment.
2528 Leave the obfd alignment as it is. */
2529 BFD_ASSERT (oval == EF_RH850_DATA_ALIGN8);
2530
2531 break;
2532
2533 case V850_NOTE_DATA_SIZE:
2534 if (oval == EF_RH850_DOUBLE32)
2535 {
2536 _bfd_error_handler (_("error: %B uses 64-bit doubles but %B uses 32-bit doubles"),
2537 ibfd, obfd);
2538 result = FALSE;
2539 }
2540 else
2541 /* ibfd uses 32-bit doubles, obfd uses 64-bit doubles.
2542 This is acceptable. Honest, that is what the ABI says. */
2543 BFD_ASSERT (oval == EF_RH850_DOUBLE64);
2544 break;
2545
2546 case V850_NOTE_FPU_INFO:
2547 if (oval == EF_RH850_FPU20)
2548 {
2549 _bfd_error_handler (_("error: %B uses FPU-3.0 but %B only supports FPU-2.0"),
2550 ibfd, obfd);
2551 result = FALSE;
2552 }
2553 else
2554 /* ibfd uses FPU-2.0, obfd uses FPU-3.0. Leave obfd as it is. */
2555 BFD_ASSERT (oval == EF_RH850_FPU30);
2556
2557 break;
2558
2559 default:
2560 /* None of the other conflicts matter.
2561 Stick with the current output values. */
2562 break;
2563 }
2564 }
2565
2566 /* FIXME: We should also check for conflicts between the notes
2567 and the EF flags in the ELF header. */
2568 }
2569
2570 return result;
2571}
2572
2573static void
2574print_v850_note (bfd * abfd, FILE * file, bfd_byte * data, enum v850_notes id)
2575{
2576 unsigned int value = bfd_get_32 (abfd, data + ((id - 1) * SIZEOF_V850_NOTE) + 16);
2577
2578 switch (id)
2579 {
2580 case V850_NOTE_ALIGNMENT:
2581 fprintf (file, _(" alignment of 8-byte entities: "));
2582 switch (value)
2583 {
2584 case EF_RH850_DATA_ALIGN4: fprintf (file, _("4-byte")); break;
2585 case EF_RH850_DATA_ALIGN8: fprintf (file, _("8-byte")); break;
2586 case 0: fprintf (file, _("not set")); break;
2587 default: fprintf (file, _("unknown: %x"), value); break;
2588 }
2589 fputc ('\n', file);
2590 break;
1b786873 2591
685080f2
NC
2592 case V850_NOTE_DATA_SIZE:
2593 fprintf (file, _(" size of doubles: "));
2594 switch (value)
2595 {
2596 case EF_RH850_DOUBLE32: fprintf (file, _("4-bytes")); break;
2597 case EF_RH850_DOUBLE64: fprintf (file, _("8-bytes")); break;
2598 case 0: fprintf (file, _("not set")); break;
2599 default: fprintf (file, _("unknown: %x"), value); break;
2600 }
2601 fputc ('\n', file);
2602 break;
1b786873 2603
685080f2
NC
2604 case V850_NOTE_FPU_INFO:
2605 fprintf (file, _(" FPU support required: "));
2606 switch (value)
2607 {
2608 case EF_RH850_FPU20: fprintf (file, _("FPU-2.0")); break;
2609 case EF_RH850_FPU30: fprintf (file, _("FPU-3.0")); break;
2610 case 0: fprintf (file, _("none")); break;
2611 default: fprintf (file, _("unknown: %x"), value); break;
2612 }
2613 fputc ('\n', file);
2614 break;
1b786873 2615
685080f2
NC
2616 case V850_NOTE_SIMD_INFO:
2617 fprintf (file, _("SIMD use: "));
2618 switch (value)
2619 {
2620 case EF_RH850_SIMD: fprintf (file, _("yes")); break;
2621 case 0: fprintf (file, _("no")); break;
2622 default: fprintf (file, _("unknown: %x"), value); break;
2623 }
2624 fputc ('\n', file);
2625 break;
1b786873 2626
685080f2
NC
2627 case V850_NOTE_CACHE_INFO:
2628 fprintf (file, _("CACHE use: "));
2629 switch (value)
2630 {
2631 case EF_RH850_CACHE: fprintf (file, _("yes")); break;
2632 case 0: fprintf (file, _("no")); break;
2633 default: fprintf (file, _("unknown: %x"), value); break;
2634 }
2635 fputc ('\n', file);
2636 break;
1b786873 2637
685080f2
NC
2638 case V850_NOTE_MMU_INFO:
2639 fprintf (file, _("MMU use: "));
2640 switch (value)
2641 {
2642 case EF_RH850_MMU: fprintf (file, _("yes")); break;
2643 case 0: fprintf (file, _("no")); break;
2644 default: fprintf (file, _("unknown: %x"), value); break;
2645 }
2646 fputc ('\n', file);
2647 break;
1b786873 2648
685080f2
NC
2649 default:
2650 BFD_ASSERT (0);
2651 }
2652}
2653
2654static void
2655v850_elf_print_notes (bfd * abfd, FILE * file)
2656{
2657 asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME);
2658 enum v850_notes id;
2659
2660 if (notes == NULL || notes->contents == NULL)
2661 return;
2662
2663 BFD_ASSERT (bfd_section_size (abfd, notes) == NUM_V850_NOTES * SIZEOF_V850_NOTE);
2664
2665 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2666 print_v850_note (abfd, file, notes->contents, id);
2667}
2668
de863c74 2669/* Set the right machine number and architecture. */
e12dd2ea 2670
b34976b6 2671static bfd_boolean
47b0e7ad 2672v850_elf_object_p (bfd *abfd)
252b5132 2673{
de863c74
NC
2674 enum bfd_architecture arch;
2675 unsigned long mach;
2676
2677 switch (elf_elfheader (abfd)->e_machine)
252b5132 2678 {
de863c74
NC
2679 case EM_V800:
2680 arch = bfd_arch_v850_rh850;
78c8d46c
NC
2681 mach = (elf_elfheader (abfd)->e_flags & EF_V800_850E3)
2682 ? bfd_mach_v850e3v5 : bfd_mach_v850e2v3;
8ad30312 2683 break;
de863c74
NC
2684
2685 case EM_CYGNUS_V850:
2686 case EM_V850:
2687 arch = bfd_arch_v850;
2688 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2689 {
2690 default:
2691 case E_V850_ARCH: mach = bfd_mach_v850; break;
2692 case E_V850E_ARCH: mach = bfd_mach_v850e; break;
2693 case E_V850E1_ARCH: mach = bfd_mach_v850e1; break;
2694 case E_V850E2_ARCH: mach = bfd_mach_v850e2; break;
2695 case E_V850E2V3_ARCH: mach = bfd_mach_v850e2v3; break;
78c8d46c 2696 case E_V850E3V5_ARCH: mach = bfd_mach_v850e3v5; break;
de863c74 2697 }
1cd986c5 2698 break;
de863c74
NC
2699
2700 default:
2701 return FALSE;
252b5132 2702 }
de863c74
NC
2703
2704 return bfd_default_set_arch_mach (abfd, arch, mach);
252b5132
RH
2705}
2706
2707/* Store the machine number in the flags field. */
e12dd2ea 2708
252b5132 2709static void
47b0e7ad
NC
2710v850_elf_final_write_processing (bfd *abfd,
2711 bfd_boolean linker ATTRIBUTE_UNUSED)
252b5132
RH
2712{
2713 unsigned long val;
2714
de863c74 2715 switch (bfd_get_arch (abfd))
252b5132 2716 {
de863c74
NC
2717 case bfd_arch_v850_rh850:
2718 val = EF_RH850_ABI;
78c8d46c
NC
2719 if (bfd_get_mach (abfd) == bfd_mach_v850e3v5)
2720 val |= EF_V800_850E3;
de863c74
NC
2721 elf_elfheader (abfd)->e_flags |= val;
2722 break;
2723
2724 case bfd_arch_v850:
2725 switch (bfd_get_mach (abfd))
2726 {
2727 default:
2728 case bfd_mach_v850: val = E_V850_ARCH; break;
2729 case bfd_mach_v850e: val = E_V850E_ARCH; break;
2730 case bfd_mach_v850e1: val = E_V850E1_ARCH; break;
2731 case bfd_mach_v850e2: val = E_V850E2_ARCH; break;
2732 case bfd_mach_v850e2v3: val = E_V850E2V3_ARCH; break;
78c8d46c 2733 case bfd_mach_v850e3v5: val = E_V850E3V5_ARCH; break;
de863c74
NC
2734 }
2735 elf_elfheader (abfd)->e_flags &=~ EF_V850_ARCH;
2736 elf_elfheader (abfd)->e_flags |= val;
2737 break;
b34976b6 2738 default:
de863c74 2739 break;
252b5132 2740 }
252b5132
RH
2741}
2742
435b1e90 2743/* Function to keep V850 specific file flags. */
e12dd2ea 2744
b34976b6 2745static bfd_boolean
47b0e7ad 2746v850_elf_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH
2747{
2748 BFD_ASSERT (!elf_flags_init (abfd)
2749 || elf_elfheader (abfd)->e_flags == flags);
2750
2751 elf_elfheader (abfd)->e_flags = flags;
b34976b6
AM
2752 elf_flags_init (abfd) = TRUE;
2753 return TRUE;
252b5132
RH
2754}
2755
e12dd2ea
NC
2756/* Merge backend specific data from an object file
2757 to the output object file when linking. */
47b0e7ad 2758
b34976b6 2759static bfd_boolean
47b0e7ad 2760v850_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH
2761{
2762 flagword out_flags;
2763 flagword in_flags;
685080f2 2764 bfd_boolean result = TRUE;
252b5132
RH
2765
2766 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
2767 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 2768 return TRUE;
252b5132 2769
685080f2
NC
2770 result &= v850_elf_merge_notes (ibfd, obfd);
2771
252b5132
RH
2772 in_flags = elf_elfheader (ibfd)->e_flags;
2773 out_flags = elf_elfheader (obfd)->e_flags;
2774
2775 if (! elf_flags_init (obfd))
2776 {
2777 /* If the input is the default architecture then do not
2778 bother setting the flags for the output architecture,
2779 instead allow future merges to do this. If no future
2780 merges ever set these flags then they will retain their
2781 unitialised values, which surprise surprise, correspond
2782 to the default values. */
2783 if (bfd_get_arch_info (ibfd)->the_default)
b34976b6 2784 return TRUE;
435b1e90 2785
b34976b6 2786 elf_flags_init (obfd) = TRUE;
252b5132
RH
2787 elf_elfheader (obfd)->e_flags = in_flags;
2788
2789 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
2790 && bfd_get_arch_info (obfd)->the_default)
685080f2 2791 result &= bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
252b5132 2792
685080f2 2793 return result;
252b5132
RH
2794 }
2795
2796 /* Check flag compatibility. */
2797 if (in_flags == out_flags)
685080f2 2798 return result;
252b5132 2799
de863c74
NC
2800 if (bfd_get_arch (obfd) == bfd_arch_v850_rh850)
2801 {
2802 if ((in_flags & EF_V800_850E3) != (out_flags & EF_V800_850E3))
2803 {
2804 _bfd_error_handler (_("%B: Architecture mismatch with previous modules"),
2805 ibfd);
2806 elf_elfheader (obfd)->e_flags |= EF_V800_850E3;
2807 }
2808
685080f2 2809 return result;
de863c74
NC
2810 }
2811
252b5132
RH
2812 if ((in_flags & EF_V850_ARCH) != (out_flags & EF_V850_ARCH)
2813 && (in_flags & EF_V850_ARCH) != E_V850_ARCH)
8ad30312 2814 {
de863c74
NC
2815 /* Allow earlier architecture binaries to be linked with later binaries.
2816 Set the output binary to the later architecture, except for v850e1,
2817 which we set to v850e. */
2818 if ( (in_flags & EF_V850_ARCH) == E_V850E1_ARCH
1cd986c5 2819 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
685080f2 2820 return result;
8ad30312 2821
de863c74 2822 if ( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5 2823 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
8ad30312
NC
2824 {
2825 elf_elfheader (obfd)->e_flags =
2826 ((out_flags & ~ EF_V850_ARCH) | E_V850E_ARCH);
685080f2 2827 return result;
8ad30312
NC
2828 }
2829
de863c74 2830 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5
NC
2831 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH)
2832 && (out_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2833 {
2834 elf_elfheader (obfd)->e_flags =
2835 ((out_flags & ~ EF_V850_ARCH) | E_V850E2_ARCH);
685080f2 2836 return result;
1cd986c5
NC
2837 }
2838
de863c74 2839 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5
NC
2840 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH
2841 || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2842 && (out_flags & EF_V850_ARCH) == E_V850E2V3_ARCH)
2843 {
2844 elf_elfheader (obfd)->e_flags =
2845 ((out_flags & ~ EF_V850_ARCH) | E_V850E2V3_ARCH);
685080f2 2846 return result;
1cd986c5
NC
2847 }
2848
78c8d46c
NC
2849 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
2850 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH
2851 || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH
2852 || (in_flags & EF_V850_ARCH) == E_V850E2V3_ARCH)
2853 && (out_flags & EF_V850_ARCH) == E_V850E3V5_ARCH)
2854 {
2855 elf_elfheader (obfd)->e_flags =
2856 ((out_flags & ~ EF_V850_ARCH) | E_V850E3V5_ARCH);
685080f2 2857 return result;
78c8d46c
NC
2858 }
2859
d003868e
AM
2860 _bfd_error_handler (_("%B: Architecture mismatch with previous modules"),
2861 ibfd);
8ad30312 2862 }
252b5132 2863
685080f2 2864 return result;
252b5132 2865}
e12dd2ea
NC
2866
2867/* Display the flags field. */
252b5132 2868
b34976b6 2869static bfd_boolean
47b0e7ad 2870v850_elf_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132
RH
2871{
2872 FILE * file = (FILE *) ptr;
435b1e90 2873
252b5132 2874 BFD_ASSERT (abfd != NULL && ptr != NULL);
435b1e90 2875
252b5132 2876 _bfd_elf_print_private_bfd_data (abfd, ptr);
435b1e90 2877
1cd986c5 2878 /* xgettext:c-format. */
252b5132 2879 fprintf (file, _("private flags = %lx: "), elf_elfheader (abfd)->e_flags);
435b1e90 2880
de863c74 2881 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
252b5132 2882 {
de863c74 2883 if ((elf_elfheader (abfd)->e_flags & EF_RH850_ABI) != EF_RH850_ABI)
68ffbac6 2884 fprintf (file, _("unknown v850 architecture"));
de863c74
NC
2885 else if (elf_elfheader (abfd)->e_flags & EF_V800_850E3)
2886 fprintf (file, _("v850 E3 architecture"));
2887 else
2888 fprintf (file, _("v850 architecture"));
de863c74
NC
2889 }
2890 else
2891 {
2892 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2893 {
2894 default:
2895 case E_V850_ARCH: fprintf (file, _("v850 architecture")); break;
2896 case E_V850E_ARCH: fprintf (file, _("v850e architecture")); break;
2897 case E_V850E1_ARCH: fprintf (file, _("v850e1 architecture")); break;
2898 case E_V850E2_ARCH: fprintf (file, _("v850e2 architecture")); break;
2899 case E_V850E2V3_ARCH: fprintf (file, _("v850e2v3 architecture")); break;
78c8d46c 2900 case E_V850E3V5_ARCH: fprintf (file, _("v850e3v5 architecture")); break;
de863c74 2901 }
252b5132 2902 }
435b1e90 2903
252b5132 2904 fputc ('\n', file);
435b1e90 2905
685080f2
NC
2906 v850_elf_print_notes (abfd, file);
2907
b34976b6 2908 return TRUE;
252b5132
RH
2909}
2910
2911/* V850 ELF uses four common sections. One is the usual one, and the
2912 others are for (small) objects in one of the special data areas:
2913 small, tiny and zero. All the objects are kept together, and then
2914 referenced via the gp register, the ep register or the r0 register
2915 respectively, which yields smaller, faster assembler code. This
2916 approach is copied from elf32-mips.c. */
2917
2918static asection v850_elf_scom_section;
2919static asymbol v850_elf_scom_symbol;
2920static asymbol * v850_elf_scom_symbol_ptr;
2921static asection v850_elf_tcom_section;
2922static asymbol v850_elf_tcom_symbol;
2923static asymbol * v850_elf_tcom_symbol_ptr;
2924static asection v850_elf_zcom_section;
2925static asymbol v850_elf_zcom_symbol;
2926static asymbol * v850_elf_zcom_symbol_ptr;
2927
e12dd2ea
NC
2928/* Given a BFD section, try to locate the
2929 corresponding ELF section index. */
252b5132 2930
b34976b6 2931static bfd_boolean
47b0e7ad
NC
2932v850_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
2933 asection *sec,
2934 int *retval)
252b5132
RH
2935{
2936 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
2937 *retval = SHN_V850_SCOMMON;
2938 else if (strcmp (bfd_get_section_name (abfd, sec), ".tcommon") == 0)
2939 *retval = SHN_V850_TCOMMON;
2940 else if (strcmp (bfd_get_section_name (abfd, sec), ".zcommon") == 0)
2941 *retval = SHN_V850_ZCOMMON;
2942 else
b34976b6 2943 return FALSE;
435b1e90 2944
b34976b6 2945 return TRUE;
252b5132
RH
2946}
2947
2948/* Handle the special V850 section numbers that a symbol may use. */
2949
2950static void
47b0e7ad 2951v850_elf_symbol_processing (bfd *abfd, asymbol *asym)
252b5132
RH
2952{
2953 elf_symbol_type * elfsym = (elf_symbol_type *) asym;
9ad5cbcf 2954 unsigned int indx;
435b1e90 2955
9ad5cbcf 2956 indx = elfsym->internal_elf_sym.st_shndx;
252b5132
RH
2957
2958 /* If the section index is an "ordinary" index, then it may
2959 refer to a v850 specific section created by the assembler.
2960 Check the section's type and change the index it matches.
435b1e90 2961
252b5132 2962 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 2963
9ad5cbcf 2964 if (indx < elf_numsections (abfd))
1cd986c5 2965 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
2966 {
2967 case SHT_V850_SCOMMON:
9ad5cbcf 2968 indx = SHN_V850_SCOMMON;
252b5132 2969 break;
435b1e90 2970
252b5132 2971 case SHT_V850_TCOMMON:
9ad5cbcf 2972 indx = SHN_V850_TCOMMON;
252b5132 2973 break;
435b1e90 2974
252b5132 2975 case SHT_V850_ZCOMMON:
9ad5cbcf 2976 indx = SHN_V850_ZCOMMON;
252b5132 2977 break;
435b1e90 2978
252b5132
RH
2979 default:
2980 break;
2981 }
435b1e90 2982
9ad5cbcf 2983 switch (indx)
252b5132
RH
2984 {
2985 case SHN_V850_SCOMMON:
2986 if (v850_elf_scom_section.name == NULL)
2987 {
2988 /* Initialize the small common section. */
2989 v850_elf_scom_section.name = ".scommon";
2990 v850_elf_scom_section.flags = SEC_IS_COMMON | SEC_ALLOC | SEC_DATA;
2991 v850_elf_scom_section.output_section = & v850_elf_scom_section;
2992 v850_elf_scom_section.symbol = & v850_elf_scom_symbol;
2993 v850_elf_scom_section.symbol_ptr_ptr = & v850_elf_scom_symbol_ptr;
2994 v850_elf_scom_symbol.name = ".scommon";
2995 v850_elf_scom_symbol.flags = BSF_SECTION_SYM;
2996 v850_elf_scom_symbol.section = & v850_elf_scom_section;
2997 v850_elf_scom_symbol_ptr = & v850_elf_scom_symbol;
2998 }
2999 asym->section = & v850_elf_scom_section;
3000 asym->value = elfsym->internal_elf_sym.st_size;
3001 break;
435b1e90 3002
252b5132
RH
3003 case SHN_V850_TCOMMON:
3004 if (v850_elf_tcom_section.name == NULL)
3005 {
3006 /* Initialize the tcommon section. */
3007 v850_elf_tcom_section.name = ".tcommon";
3008 v850_elf_tcom_section.flags = SEC_IS_COMMON;
3009 v850_elf_tcom_section.output_section = & v850_elf_tcom_section;
3010 v850_elf_tcom_section.symbol = & v850_elf_tcom_symbol;
3011 v850_elf_tcom_section.symbol_ptr_ptr = & v850_elf_tcom_symbol_ptr;
3012 v850_elf_tcom_symbol.name = ".tcommon";
3013 v850_elf_tcom_symbol.flags = BSF_SECTION_SYM;
3014 v850_elf_tcom_symbol.section = & v850_elf_tcom_section;
3015 v850_elf_tcom_symbol_ptr = & v850_elf_tcom_symbol;
3016 }
3017 asym->section = & v850_elf_tcom_section;
3018 asym->value = elfsym->internal_elf_sym.st_size;
3019 break;
3020
3021 case SHN_V850_ZCOMMON:
3022 if (v850_elf_zcom_section.name == NULL)
3023 {
3024 /* Initialize the zcommon section. */
3025 v850_elf_zcom_section.name = ".zcommon";
3026 v850_elf_zcom_section.flags = SEC_IS_COMMON;
3027 v850_elf_zcom_section.output_section = & v850_elf_zcom_section;
3028 v850_elf_zcom_section.symbol = & v850_elf_zcom_symbol;
3029 v850_elf_zcom_section.symbol_ptr_ptr = & v850_elf_zcom_symbol_ptr;
3030 v850_elf_zcom_symbol.name = ".zcommon";
3031 v850_elf_zcom_symbol.flags = BSF_SECTION_SYM;
3032 v850_elf_zcom_symbol.section = & v850_elf_zcom_section;
3033 v850_elf_zcom_symbol_ptr = & v850_elf_zcom_symbol;
3034 }
3035 asym->section = & v850_elf_zcom_section;
3036 asym->value = elfsym->internal_elf_sym.st_size;
3037 break;
3038 }
3039}
3040
3041/* Hook called by the linker routine which adds symbols from an object
3042 file. We must handle the special v850 section numbers here. */
3043
b34976b6 3044static bfd_boolean
47b0e7ad
NC
3045v850_elf_add_symbol_hook (bfd *abfd,
3046 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3047 Elf_Internal_Sym *sym,
3048 const char **namep ATTRIBUTE_UNUSED,
3049 flagword *flagsp ATTRIBUTE_UNUSED,
3050 asection **secp,
3051 bfd_vma *valp)
252b5132 3052{
9ad5cbcf 3053 unsigned int indx = sym->st_shndx;
435b1e90 3054
252b5132
RH
3055 /* If the section index is an "ordinary" index, then it may
3056 refer to a v850 specific section created by the assembler.
3057 Check the section's type and change the index it matches.
435b1e90 3058
252b5132 3059 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 3060
9ad5cbcf 3061 if (indx < elf_numsections (abfd))
1cd986c5 3062 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
3063 {
3064 case SHT_V850_SCOMMON:
9ad5cbcf 3065 indx = SHN_V850_SCOMMON;
252b5132 3066 break;
435b1e90 3067
252b5132 3068 case SHT_V850_TCOMMON:
9ad5cbcf 3069 indx = SHN_V850_TCOMMON;
252b5132 3070 break;
435b1e90 3071
252b5132 3072 case SHT_V850_ZCOMMON:
9ad5cbcf 3073 indx = SHN_V850_ZCOMMON;
252b5132 3074 break;
435b1e90 3075
252b5132
RH
3076 default:
3077 break;
3078 }
435b1e90 3079
9ad5cbcf 3080 switch (indx)
252b5132
RH
3081 {
3082 case SHN_V850_SCOMMON:
3083 *secp = bfd_make_section_old_way (abfd, ".scommon");
3084 (*secp)->flags |= SEC_IS_COMMON;
3085 *valp = sym->st_size;
3086 break;
435b1e90 3087
252b5132
RH
3088 case SHN_V850_TCOMMON:
3089 *secp = bfd_make_section_old_way (abfd, ".tcommon");
3090 (*secp)->flags |= SEC_IS_COMMON;
3091 *valp = sym->st_size;
3092 break;
435b1e90 3093
252b5132
RH
3094 case SHN_V850_ZCOMMON:
3095 *secp = bfd_make_section_old_way (abfd, ".zcommon");
3096 (*secp)->flags |= SEC_IS_COMMON;
3097 *valp = sym->st_size;
3098 break;
3099 }
3100
b34976b6 3101 return TRUE;
252b5132
RH
3102}
3103
6e0b88f1 3104static int
47b0e7ad
NC
3105v850_elf_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED,
3106 const char *name ATTRIBUTE_UNUSED,
3107 Elf_Internal_Sym *sym,
3108 asection *input_sec,
3dd2d30b 3109 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
252b5132
RH
3110{
3111 /* If we see a common symbol, which implies a relocatable link, then
3112 if a symbol was in a special common section in an input file, mark
3113 it as a special common in the output file. */
435b1e90 3114
252b5132
RH
3115 if (sym->st_shndx == SHN_COMMON)
3116 {
3117 if (strcmp (input_sec->name, ".scommon") == 0)
3118 sym->st_shndx = SHN_V850_SCOMMON;
3119 else if (strcmp (input_sec->name, ".tcommon") == 0)
3120 sym->st_shndx = SHN_V850_TCOMMON;
3121 else if (strcmp (input_sec->name, ".zcommon") == 0)
3122 sym->st_shndx = SHN_V850_ZCOMMON;
3123 }
3124
d4c87fc1
AM
3125 /* The price we pay for using h->other unused bits as flags in the
3126 linker is cleaning up after ourselves. */
3dd2d30b
AM
3127
3128 sym->st_other &= ~(V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA
3129 | V850_OTHER_ERROR);
d4c87fc1 3130
6e0b88f1 3131 return 1;
252b5132
RH
3132}
3133
b34976b6 3134static bfd_boolean
6dc132d9
L
3135v850_elf_section_from_shdr (bfd *abfd,
3136 Elf_Internal_Shdr *hdr,
3137 const char *name,
3138 int shindex)
252b5132
RH
3139{
3140 /* There ought to be a place to keep ELF backend specific flags, but
3141 at the moment there isn't one. We just keep track of the
3142 sections by their name, instead. */
3143
6dc132d9 3144 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
b34976b6 3145 return FALSE;
252b5132
RH
3146
3147 switch (hdr->sh_type)
3148 {
3149 case SHT_V850_SCOMMON:
3150 case SHT_V850_TCOMMON:
3151 case SHT_V850_ZCOMMON:
3152 if (! bfd_set_section_flags (abfd, hdr->bfd_section,
3153 (bfd_get_section_flags (abfd,
3154 hdr->bfd_section)
3155 | SEC_IS_COMMON)))
b34976b6 3156 return FALSE;
252b5132
RH
3157 }
3158
b34976b6 3159 return TRUE;
252b5132
RH
3160}
3161
e12dd2ea
NC
3162/* Set the correct type for a V850 ELF section. We do this
3163 by the section name, which is a hack, but ought to work. */
3164
b34976b6 3165static bfd_boolean
47b0e7ad
NC
3166v850_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED,
3167 Elf_Internal_Shdr *hdr,
3168 asection *sec)
252b5132 3169{
47b0e7ad 3170 const char * name;
252b5132
RH
3171
3172 name = bfd_get_section_name (abfd, sec);
3173
3174 if (strcmp (name, ".scommon") == 0)
47b0e7ad 3175 hdr->sh_type = SHT_V850_SCOMMON;
252b5132 3176 else if (strcmp (name, ".tcommon") == 0)
47b0e7ad 3177 hdr->sh_type = SHT_V850_TCOMMON;
252b5132
RH
3178 else if (strcmp (name, ".zcommon") == 0)
3179 hdr->sh_type = SHT_V850_ZCOMMON;
685080f2
NC
3180 /* Tweak the section type of .note.renesas. */
3181 else if (strcmp (name, V850_NOTE_SECNAME) == 0)
3182 {
3183 hdr->sh_type = SHT_RENESAS_INFO;
3184 hdr->sh_entsize = SIZEOF_V850_NOTE;
3185 }
435b1e90 3186
b34976b6 3187 return TRUE;
252b5132 3188}
86aba9db
NC
3189
3190/* Delete some bytes from a section while relaxing. */
3191
b34976b6 3192static bfd_boolean
47b0e7ad
NC
3193v850_elf_relax_delete_bytes (bfd *abfd,
3194 asection *sec,
3195 bfd_vma addr,
3196 bfd_vma toaddr,
3197 int count)
86aba9db 3198{
b34976b6
AM
3199 Elf_Internal_Shdr *symtab_hdr;
3200 Elf32_External_Sym *extsyms;
3201 Elf32_External_Sym *esym;
3202 Elf32_External_Sym *esymend;
91d6fa6a 3203 int sym_index;
b34976b6
AM
3204 unsigned int sec_shndx;
3205 bfd_byte *contents;
3206 Elf_Internal_Rela *irel;
3207 Elf_Internal_Rela *irelend;
3208 struct elf_link_hash_entry *sym_hash;
b34976b6 3209 Elf_External_Sym_Shndx *shndx;
86aba9db
NC
3210
3211 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3212 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
3213
3214 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
3215
3216 contents = elf_section_data (sec)->this_hdr.contents;
3217
3218 /* The deletion must stop at the next ALIGN reloc for an alignment
3219 power larger than the number of bytes we are deleting. */
3220
3221 /* Actually delete the bytes. */
3222#if (DEBUG_RELAX & 2)
3223 fprintf (stderr, "relax_delete: contents: sec: %s %p .. %p %x\n",
3224 sec->name, addr, toaddr, count );
3225#endif
3226 memmove (contents + addr, contents + addr + count,
3227 toaddr - addr - count);
3228 memset (contents + toaddr-count, 0, count);
3229
3230 /* Adjust all the relocs. */
3231 irel = elf_section_data (sec)->relocs;
3232 irelend = irel + sec->reloc_count;
6a40cf0c
NC
3233 if (elf_symtab_shndx_list (abfd))
3234 {
3235 Elf_Internal_Shdr *shndx_hdr;
3236
3237 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
3238 shndx = (Elf_External_Sym_Shndx *) shndx_hdr->contents;
3239 }
3240 else
3241 {
3242 shndx = NULL;
3243 }
86aba9db
NC
3244
3245 for (; irel < irelend; irel++)
3246 {
3247 bfd_vma raddr, paddr, symval;
3248 Elf_Internal_Sym isym;
3249
3250 /* Get the new reloc address. */
3251 raddr = irel->r_offset;
3252 if ((raddr >= (addr + count) && raddr < toaddr))
b34976b6 3253 irel->r_offset -= count;
86aba9db
NC
3254
3255 if (raddr >= addr && raddr < addr + count)
3256 {
3257 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
3258 (int) R_V850_NONE);
3259 continue;
3260 }
b34976b6 3261
86aba9db
NC
3262 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN)
3263 continue;
3264
3265 bfd_elf32_swap_symbol_in (abfd,
3266 extsyms + ELF32_R_SYM (irel->r_info),
3267 shndx ? shndx + ELF32_R_SYM (irel->r_info) : NULL,
3268 & isym);
b34976b6 3269
86aba9db
NC
3270 if (isym.st_shndx != sec_shndx)
3271 continue;
3272
3273 /* Get the value of the symbol referred to by the reloc. */
3274 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
3275 {
3276 symval = isym.st_value;
3277#if (DEBUG_RELAX & 2)
3278 {
3279 char * name = bfd_elf_string_from_elf_section
3280 (abfd, symtab_hdr->sh_link, isym.st_name);
3281 fprintf (stderr,
3282 "relax_delete: local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
3283 sec->name, name, isym.st_name,
3284 sec->output_section->vma, sec->output_offset,
3285 isym.st_value, irel->r_addend);
3286 }
3287#endif
3288 }
3289 else
3290 {
3291 unsigned long indx;
3292 struct elf_link_hash_entry * h;
3293
3294 /* An external symbol. */
3295 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
3296
3297 h = elf_sym_hashes (abfd) [indx];
3298 BFD_ASSERT (h != NULL);
3299
3300 symval = h->root.u.def.value;
3301#if (DEBUG_RELAX & 2)
3302 fprintf (stderr,
3303 "relax_delete: defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
3304 sec->name, h->root.root.string, h->root.u.def.value,
3305 sec->output_section->vma, sec->output_offset, irel->r_addend);
3306#endif
3307 }
b34976b6 3308
86aba9db 3309 paddr = symval + irel->r_addend;
b34976b6 3310
86aba9db
NC
3311 if ( (symval >= addr + count && symval < toaddr)
3312 && (paddr < addr + count || paddr >= toaddr))
3313 irel->r_addend += count;
3314 else if ( (symval < addr + count || symval >= toaddr)
3315 && (paddr >= addr + count && paddr < toaddr))
3316 irel->r_addend -= count;
3317 }
3318
3319 /* Adjust the local symbols defined in this section. */
3320 esym = extsyms;
3321 esymend = esym + symtab_hdr->sh_info;
3322
3323 for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL))
3324 {
3325 Elf_Internal_Sym isym;
3326
3327 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
3328
3329 if (isym.st_shndx == sec_shndx
3330 && isym.st_value >= addr + count
3331 && isym.st_value < toaddr)
3332 {
3333 isym.st_value -= count;
3334
3335 if (isym.st_value + isym.st_size >= toaddr)
b34976b6
AM
3336 isym.st_size += count;
3337
63a23799 3338 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3339 }
3340 else if (isym.st_shndx == sec_shndx
3341 && isym.st_value < addr + count)
3342 {
3343 if (isym.st_value+isym.st_size >= addr + count
3344 && isym.st_value+isym.st_size < toaddr)
3345 isym.st_size -= count;
3346
3347 if (isym.st_value >= addr
3348 && isym.st_value < addr + count)
3349 isym.st_value = addr;
3350
63a23799 3351 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3352 }
3353 }
3354
3355 /* Now adjust the global symbols defined in this section. */
3356 esym = extsyms + symtab_hdr->sh_info;
3357 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
3358
91d6fa6a 3359 for (sym_index = 0; esym < esymend; esym ++, sym_index ++)
86aba9db
NC
3360 {
3361 Elf_Internal_Sym isym;
3362
3363 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
91d6fa6a 3364 sym_hash = elf_sym_hashes (abfd) [sym_index];
86aba9db
NC
3365
3366 if (isym.st_shndx == sec_shndx
3367 && ((sym_hash)->root.type == bfd_link_hash_defined
3368 || (sym_hash)->root.type == bfd_link_hash_defweak)
3369 && (sym_hash)->root.u.def.section == sec
3370 && (sym_hash)->root.u.def.value >= addr + count
3371 && (sym_hash)->root.u.def.value < toaddr)
3372 {
3373 if ((sym_hash)->root.u.def.value + isym.st_size >= toaddr)
3374 {
3375 isym.st_size += count;
63a23799 3376 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3377 }
3378
3379 (sym_hash)->root.u.def.value -= count;
3380 }
3381 else if (isym.st_shndx == sec_shndx
3382 && ((sym_hash)->root.type == bfd_link_hash_defined
3383 || (sym_hash)->root.type == bfd_link_hash_defweak)
3384 && (sym_hash)->root.u.def.section == sec
3385 && (sym_hash)->root.u.def.value < addr + count)
3386 {
3387 if ((sym_hash)->root.u.def.value+isym.st_size >= addr + count
3388 && (sym_hash)->root.u.def.value+isym.st_size < toaddr)
3389 isym.st_size -= count;
3390
3391 if ((sym_hash)->root.u.def.value >= addr
3392 && (sym_hash)->root.u.def.value < addr + count)
3393 (sym_hash)->root.u.def.value = addr;
3394
63a23799 3395 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3396 }
3397
3398 if (shndx)
3399 ++ shndx;
3400 }
3401
b34976b6 3402 return TRUE;
86aba9db
NC
3403}
3404
3405#define NOP_OPCODE (0x0000)
1cd986c5 3406#define MOVHI 0x0640 /* 4byte. */
86aba9db 3407#define MOVHI_MASK 0x07e0
1cd986c5 3408#define MOVHI_R1(insn) ((insn) & 0x1f) /* 4byte. */
86aba9db 3409#define MOVHI_R2(insn) ((insn) >> 11)
1cd986c5 3410#define MOVEA 0x0620 /* 2byte. */
86aba9db
NC
3411#define MOVEA_MASK 0x07e0
3412#define MOVEA_R1(insn) ((insn) & 0x1f)
3413#define MOVEA_R2(insn) ((insn) >> 11)
1cd986c5 3414#define JARL_4 0x00040780 /* 4byte. */
86aba9db
NC
3415#define JARL_4_MASK 0xFFFF07FF
3416#define JARL_R2(insn) (int)(((insn) & (~JARL_4_MASK)) >> 11)
1cd986c5 3417#define ADD_I 0x0240 /* 2byte. */
86aba9db 3418#define ADD_I_MASK 0x07e0
1cd986c5 3419#define ADD_I5(insn) ((((insn) & 0x001f) << 11) >> 11) /* 2byte. */
86aba9db 3420#define ADD_R2(insn) ((insn) >> 11)
1cd986c5 3421#define JMP_R 0x0060 /* 2byte. */
86aba9db
NC
3422#define JMP_R_MASK 0xFFE0
3423#define JMP_R1(insn) ((insn) & 0x1f)
3424
b34976b6 3425static bfd_boolean
47b0e7ad
NC
3426v850_elf_relax_section (bfd *abfd,
3427 asection *sec,
3428 struct bfd_link_info *link_info,
3429 bfd_boolean *again)
86aba9db 3430{
b34976b6
AM
3431 Elf_Internal_Shdr *symtab_hdr;
3432 Elf_Internal_Rela *internal_relocs;
3433 Elf_Internal_Rela *irel;
3434 Elf_Internal_Rela *irelend;
3435 Elf_Internal_Rela *irelalign = NULL;
3436 Elf_Internal_Sym *isymbuf = NULL;
3437 bfd_byte *contents = NULL;
3438 bfd_vma addr = 0;
3439 bfd_vma toaddr;
3440 int align_pad_size = 0;
3441 bfd_boolean result = TRUE;
3442
3443 *again = FALSE;
86aba9db 3444
0e1862bb 3445 if (bfd_link_relocatable (link_info)
86aba9db
NC
3446 || (sec->flags & SEC_RELOC) == 0
3447 || sec->reloc_count == 0)
b34976b6 3448 return TRUE;
86aba9db 3449
86aba9db
NC
3450 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
3451
45d6a902 3452 internal_relocs = (_bfd_elf_link_read_relocs
47b0e7ad 3453 (abfd, sec, NULL, NULL, link_info->keep_memory));
86aba9db
NC
3454 if (internal_relocs == NULL)
3455 goto error_return;
86aba9db
NC
3456
3457 irelend = internal_relocs + sec->reloc_count;
b34976b6 3458
eea6121a 3459 while (addr < sec->size)
86aba9db 3460 {
eea6121a 3461 toaddr = sec->size;
86aba9db
NC
3462
3463 for (irel = internal_relocs; irel < irelend; irel ++)
3464 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
3465 && irel->r_offset > addr
3466 && irel->r_offset < toaddr)
3467 toaddr = irel->r_offset;
b34976b6 3468
86aba9db
NC
3469#ifdef DEBUG_RELAX
3470 fprintf (stderr, "relax region 0x%x to 0x%x align pad %d\n",
3471 addr, toaddr, align_pad_size);
3472#endif
3473 if (irelalign)
3474 {
3475 bfd_vma alignto;
3476 bfd_vma alignmoveto;
3477
3478 alignmoveto = BFD_ALIGN (addr - align_pad_size, 1 << irelalign->r_addend);
3479 alignto = BFD_ALIGN (addr, 1 << irelalign->r_addend);
3480
3481 if (alignmoveto < alignto)
3482 {
544008aa 3483 bfd_vma i;
86aba9db
NC
3484
3485 align_pad_size = alignto - alignmoveto;
3486#ifdef DEBUG_RELAX
3487 fprintf (stderr, "relax move region 0x%x to 0x%x delete size 0x%x\n",
3488 alignmoveto, toaddr, align_pad_size);
3489#endif
3490 if (!v850_elf_relax_delete_bytes (abfd, sec, alignmoveto,
3491 toaddr, align_pad_size))
b34976b6 3492 goto error_return;
86aba9db
NC
3493
3494 for (i = BFD_ALIGN (toaddr - align_pad_size, 1);
3495 (i + 1) < toaddr; i += 2)
3496 bfd_put_16 (abfd, NOP_OPCODE, contents + i);
3497
3498 addr = alignmoveto;
3499 }
3500 else
3501 align_pad_size = 0;
3502 }
3503
3504 for (irel = internal_relocs; irel < irelend; irel++)
3505 {
b34976b6
AM
3506 bfd_vma laddr;
3507 bfd_vma addend;
3508 bfd_vma symval;
3509 int insn[5];
3510 int no_match = -1;
3511 Elf_Internal_Rela *hi_irelfn;
3512 Elf_Internal_Rela *lo_irelfn;
3513 Elf_Internal_Rela *irelcall;
3514 bfd_signed_vma foff;
de863c74 3515 unsigned int r_type;
86aba9db
NC
3516
3517 if (! (irel->r_offset >= addr && irel->r_offset < toaddr
3518 && (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL
3519 || ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)))
3520 continue;
3521
3522#ifdef DEBUG_RELAX
3523 fprintf (stderr, "relax check r_info 0x%x r_offset 0x%x r_addend 0x%x\n",
3524 irel->r_info,
3525 irel->r_offset,
3526 irel->r_addend );
3527#endif
3528
3529 /* Get the section contents. */
3530 if (contents == NULL)
3531 {
3532 if (elf_section_data (sec)->this_hdr.contents != NULL)
3533 contents = elf_section_data (sec)->this_hdr.contents;
3534 else
3535 {
47b0e7ad 3536 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
86aba9db
NC
3537 goto error_return;
3538 }
3539 }
3540
5cec6941
NC
3541 /* Read this BFD's local symbols if we haven't done so already. */
3542 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
86aba9db 3543 {
5cec6941
NC
3544 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
3545 if (isymbuf == NULL)
3546 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3547 symtab_hdr->sh_info, 0,
3548 NULL, NULL, NULL);
3549 if (isymbuf == NULL)
3550 goto error_return;
86aba9db
NC
3551 }
3552
3553 laddr = irel->r_offset;
3554
3555 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL)
3556 {
3557 /* Check code for -mlong-calls output. */
eea6121a 3558 if (laddr + 16 <= (bfd_vma) sec->size)
86aba9db
NC
3559 {
3560 insn[0] = bfd_get_16 (abfd, contents + laddr);
3561 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3562 insn[2] = bfd_get_32 (abfd, contents + laddr + 8);
3563 insn[3] = bfd_get_16 (abfd, contents + laddr + 12);
3564 insn[4] = bfd_get_16 (abfd, contents + laddr + 14);
b34976b6 3565
86aba9db
NC
3566 if ((insn[0] & MOVHI_MASK) != MOVHI
3567 || MOVHI_R1 (insn[0]) != 0)
3568 no_match = 0;
3569
3570 if (no_match < 0
3571 && ((insn[1] & MOVEA_MASK) != MOVEA
3572 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3573 no_match = 1;
3574
3575 if (no_match < 0
3576 && (insn[2] & JARL_4_MASK) != JARL_4)
3577 no_match = 2;
3578
3579 if (no_match < 0
3580 && ((insn[3] & ADD_I_MASK) != ADD_I
3581 || ADD_I5 (insn[3]) != 4
3582 || JARL_R2 (insn[2]) != ADD_R2 (insn[3])))
3583 no_match = 3;
3584
3585 if (no_match < 0
3586 && ((insn[4] & JMP_R_MASK) != JMP_R
3587 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[4])))
3588 no_match = 4;
3589 }
3590 else
3591 {
3592 ((*_bfd_error_handler)
3593 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized insns",
3594 bfd_get_filename (abfd), (unsigned long) irel->r_offset));
3595
3596 continue;
3597 }
3598
3599 if (no_match >= 0)
3600 {
3601 ((*_bfd_error_handler)
3602 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized insn 0x%x",
3603 bfd_get_filename (abfd), (unsigned long) irel->r_offset+no_match, insn[no_match]));
3604
3605 continue;
b34976b6 3606 }
86aba9db
NC
3607
3608 /* Get the reloc for the address from which the register is
3609 being loaded. This reloc will tell us which function is
3610 actually being called. */
68ffbac6 3611
86aba9db 3612 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
de863c74
NC
3613 {
3614 r_type = ELF32_R_TYPE (hi_irelfn->r_info);
3615
3616 if (hi_irelfn->r_offset == laddr + 2
3617 && (r_type == (int) R_V850_HI16_S || r_type == (int) R_V810_WHI1))
3618 break;
3619 }
86aba9db
NC
3620
3621 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
de863c74
NC
3622 {
3623 r_type = ELF32_R_TYPE (lo_irelfn->r_info);
3624
3625 if (lo_irelfn->r_offset == laddr + 6
3626 && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO))
3627 break;
3628 }
86aba9db
NC
3629
3630 for (irelcall = internal_relocs; irelcall < irelend; irelcall ++)
de863c74
NC
3631 {
3632 r_type = ELF32_R_TYPE (irelcall->r_info);
3633
3634 if (irelcall->r_offset == laddr + 8
3635 && (r_type == (int) R_V850_22_PCREL || r_type == (int) R_V850_PCR22))
3636 break;
3637 }
86aba9db
NC
3638
3639 if ( hi_irelfn == irelend
3640 || lo_irelfn == irelend
3641 || irelcall == irelend)
3642 {
3643 ((*_bfd_error_handler)
3644 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized reloc",
3645 bfd_get_filename (abfd), (unsigned long) irel->r_offset ));
3646
3647 continue;
3648 }
b34976b6 3649
86aba9db
NC
3650 if (ELF32_R_SYM (irelcall->r_info) < symtab_hdr->sh_info)
3651 {
5cec6941 3652 Elf_Internal_Sym * isym;
86aba9db
NC
3653
3654 /* A local symbol. */
5cec6941 3655 isym = isymbuf + ELF32_R_SYM (irelcall->r_info);
86aba9db 3656
5cec6941 3657 symval = isym->st_value;
86aba9db
NC
3658 }
3659 else
3660 {
3661 unsigned long indx;
3662 struct elf_link_hash_entry * h;
3663
3664 /* An external symbol. */
3665 indx = ELF32_R_SYM (irelcall->r_info) - symtab_hdr->sh_info;
3666 h = elf_sym_hashes (abfd)[indx];
3667 BFD_ASSERT (h != NULL);
3668
3669 if ( h->root.type != bfd_link_hash_defined
3670 && h->root.type != bfd_link_hash_defweak)
3671 /* This appears to be a reference to an undefined
3672 symbol. Just ignore it--it will be caught by the
3673 regular reloc processing. */
3674 continue;
3675
3676 symval = h->root.u.def.value;
3677 }
3678
3679 if (symval + irelcall->r_addend != irelcall->r_offset + 4)
3680 {
3681 ((*_bfd_error_handler)
3682 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized reloc 0x%lx",
3683 bfd_get_filename (abfd), (unsigned long) irel->r_offset, irelcall->r_offset ));
3684
3685 continue;
3686 }
3687
3688 /* Get the value of the symbol referred to by the reloc. */
3689 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3690 {
b34976b6
AM
3691 Elf_Internal_Sym *isym;
3692 asection *sym_sec;
86aba9db
NC
3693
3694 /* A local symbol. */
5cec6941 3695 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
b34976b6 3696
5cec6941 3697 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3698 sym_sec = bfd_und_section_ptr;
5cec6941 3699 else if (isym->st_shndx == SHN_ABS)
86aba9db 3700 sym_sec = bfd_abs_section_ptr;
5cec6941 3701 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3702 sym_sec = bfd_com_section_ptr;
3703 else
5cec6941
NC
3704 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3705 symval = (isym->st_value
86aba9db
NC
3706 + sym_sec->output_section->vma
3707 + sym_sec->output_offset);
3708 }
3709 else
3710 {
3711 unsigned long indx;
b34976b6 3712 struct elf_link_hash_entry *h;
86aba9db
NC
3713
3714 /* An external symbol. */
5cec6941 3715 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
86aba9db
NC
3716 h = elf_sym_hashes (abfd)[indx];
3717 BFD_ASSERT (h != NULL);
3718
3719 if ( h->root.type != bfd_link_hash_defined
3720 && h->root.type != bfd_link_hash_defweak)
3721 /* This appears to be a reference to an undefined
3722 symbol. Just ignore it--it will be caught by the
3723 regular reloc processing. */
3724 continue;
3725
3726 symval = (h->root.u.def.value
3727 + h->root.u.def.section->output_section->vma
3728 + h->root.u.def.section->output_offset);
3729 }
3730
3731 addend = irel->r_addend;
3732
3733 foff = (symval + addend
3734 - (irel->r_offset
3735 + sec->output_section->vma
3736 + sec->output_offset
3737 + 4));
3738#ifdef DEBUG_RELAX
3739 fprintf (stderr, "relax longcall r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3740 irel->r_offset,
3741 (irel->r_offset
3742 + sec->output_section->vma
3743 + sec->output_offset),
3744 symval, addend, foff);
3745#endif
3746
3747 if (foff < -0x100000 || foff >= 0x100000)
3748 /* After all that work, we can't shorten this function call. */
3749 continue;
3750
3751 /* For simplicity of coding, we are going to modify the section
3752 contents, the section relocs, and the BFD symbol table. We
3753 must tell the rest of the code not to free up this
3754 information. It would be possible to instead create a table
3755 of changes which have to be made, as is done in coff-mips.c;
3756 that would be more work, but would require less memory when
3757 the linker is run. */
3758 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3759 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3760 symtab_hdr->contents = (bfd_byte *) isymbuf;
b34976b6 3761
86aba9db 3762 /* Replace the long call with a jarl. */
de863c74
NC
3763 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
3764 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_PCR22);
3765 else
3766 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_22_PCREL);
86aba9db
NC
3767
3768 addend = 0;
3769
3770 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3771 /* If this needs to be changed because of future relaxing,
3772 it will be handled here like other internal IND12W
3773 relocs. */
3774 bfd_put_32 (abfd,
3775 0x00000780 | (JARL_R2 (insn[2])<<11) | ((addend << 16) & 0xffff) | ((addend >> 16) & 0xf),
3776 contents + irel->r_offset);
3777 else
3778 /* We can't fully resolve this yet, because the external
3779 symbol value may be changed by future relaxing.
3780 We let the final link phase handle it. */
3781 bfd_put_32 (abfd, 0x00000780 | (JARL_R2 (insn[2])<<11),
3782 contents + irel->r_offset);
3783
b34976b6 3784 hi_irelfn->r_info =
86aba9db
NC
3785 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3786 lo_irelfn->r_info =
3787 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3788 irelcall->r_info =
3789 ELF32_R_INFO (ELF32_R_SYM (irelcall->r_info), R_V850_NONE);
3790
3791 if (! v850_elf_relax_delete_bytes (abfd, sec,
3792 irel->r_offset + 4, toaddr, 12))
3793 goto error_return;
3794
3795 align_pad_size += 12;
3796 }
3797 else if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)
3798 {
3799 /* Check code for -mlong-jumps output. */
eea6121a 3800 if (laddr + 10 <= (bfd_vma) sec->size)
86aba9db
NC
3801 {
3802 insn[0] = bfd_get_16 (abfd, contents + laddr);
3803 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3804 insn[2] = bfd_get_16 (abfd, contents + laddr + 8);
3805
3806 if ((insn[0] & MOVHI_MASK) != MOVHI
3807 || MOVHI_R1 (insn[0]) != 0)
3808 no_match = 0;
3809
3810 if (no_match < 0
3811 && ((insn[1] & MOVEA_MASK) != MOVEA
3812 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3813 no_match = 1;
3814
3815 if (no_match < 0
3816 && ((insn[2] & JMP_R_MASK) != JMP_R
3817 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[2])))
3818 no_match = 4;
3819 }
3820 else
3821 {
3822 ((*_bfd_error_handler)
3823 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized insns",
3824 bfd_get_filename (abfd), (unsigned long) irel->r_offset));
3825
3826 continue;
3827 }
3828
3829 if (no_match >= 0)
3830 {
3831 ((*_bfd_error_handler)
3832 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized insn 0x%x",
3833 bfd_get_filename (abfd), (unsigned long) irel->r_offset+no_match, insn[no_match]));
3834
3835 continue;
3836 }
3837
3838 /* Get the reloc for the address from which the register is
3839 being loaded. This reloc will tell us which function is
3840 actually being called. */
3841 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
de863c74
NC
3842 {
3843 r_type = ELF32_R_TYPE (hi_irelfn->r_info);
3844
3845 if (hi_irelfn->r_offset == laddr + 2
3846 && ((r_type == (int) R_V850_HI16_S) || r_type == (int) R_V810_WHI1))
3847 break;
3848 }
86aba9db
NC
3849
3850 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
de863c74
NC
3851 {
3852 r_type = ELF32_R_TYPE (lo_irelfn->r_info);
3853
3854 if (lo_irelfn->r_offset == laddr + 6
3855 && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO))
3856 break;
3857 }
86aba9db
NC
3858
3859 if ( hi_irelfn == irelend
3860 || lo_irelfn == irelend)
3861 {
3862 ((*_bfd_error_handler)
3863 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized reloc",
3864 bfd_get_filename (abfd), (unsigned long) irel->r_offset ));
3865
3866 continue;
3867 }
b34976b6 3868
86aba9db
NC
3869 /* Get the value of the symbol referred to by the reloc. */
3870 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3871 {
5cec6941
NC
3872 Elf_Internal_Sym * isym;
3873 asection * sym_sec;
86aba9db
NC
3874
3875 /* A local symbol. */
5cec6941
NC
3876 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
3877
3878 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3879 sym_sec = bfd_und_section_ptr;
5cec6941 3880 else if (isym->st_shndx == SHN_ABS)
86aba9db 3881 sym_sec = bfd_abs_section_ptr;
5cec6941 3882 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3883 sym_sec = bfd_com_section_ptr;
3884 else
5cec6941
NC
3885 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3886 symval = (isym->st_value
86aba9db
NC
3887 + sym_sec->output_section->vma
3888 + sym_sec->output_offset);
3889#ifdef DEBUG_RELAX
3890 {
3891 char * name = bfd_elf_string_from_elf_section
5cec6941 3892 (abfd, symtab_hdr->sh_link, isym->st_name);
86aba9db
NC
3893
3894 fprintf (stderr, "relax long jump local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
5cec6941
NC
3895 sym_sec->name, name, isym->st_name,
3896 sym_sec->output_section->vma,
3897 sym_sec->output_offset,
3898 isym->st_value, irel->r_addend);
86aba9db
NC
3899 }
3900#endif
3901 }
3902 else
3903 {
3904 unsigned long indx;
3905 struct elf_link_hash_entry * h;
3906
3907 /* An external symbol. */
3908 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
3909 h = elf_sym_hashes (abfd)[indx];
3910 BFD_ASSERT (h != NULL);
3911
3912 if ( h->root.type != bfd_link_hash_defined
3913 && h->root.type != bfd_link_hash_defweak)
3914 /* This appears to be a reference to an undefined
3915 symbol. Just ignore it--it will be caught by the
3916 regular reloc processing. */
3917 continue;
3918
3919 symval = (h->root.u.def.value
3920 + h->root.u.def.section->output_section->vma
3921 + h->root.u.def.section->output_offset);
3922#ifdef DEBUG_RELAX
3923 fprintf (stderr,
3924 "relax longjump defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
3925 sec->name, h->root.root.string, h->root.u.def.value,
3926 sec->output_section->vma, sec->output_offset, irel->r_addend);
3927#endif
3928 }
3929
3930 addend = irel->r_addend;
3931
3932 foff = (symval + addend
3933 - (irel->r_offset
3934 + sec->output_section->vma
3935 + sec->output_offset
3936 + 4));
3937#ifdef DEBUG_RELAX
3938 fprintf (stderr, "relax longjump r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3939 irel->r_offset,
3940 (irel->r_offset
3941 + sec->output_section->vma
3942 + sec->output_offset),
3943 symval, addend, foff);
3944#endif
3945 if (foff < -0x100000 || foff >= 0x100000)
3946 /* After all that work, we can't shorten this function call. */
3947 continue;
3948
3949 /* For simplicity of coding, we are going to modify the section
3950 contents, the section relocs, and the BFD symbol table. We
3951 must tell the rest of the code not to free up this
3952 information. It would be possible to instead create a table
3953 of changes which have to be made, as is done in coff-mips.c;
3954 that would be more work, but would require less memory when
3955 the linker is run. */
3956 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3957 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3958 symtab_hdr->contents = (bfd_byte *) isymbuf;
86aba9db
NC
3959
3960 if (foff < -0x100 || foff >= 0x100)
3961 {
3962 /* Replace the long jump with a jr. */
3963
de863c74
NC
3964 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
3965 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PCR22);
3966 else
3967 irel->r_info =
3968 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_22_PCREL);
b34976b6 3969
86aba9db
NC
3970 irel->r_addend = addend;
3971 addend = 0;
3972
3973 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3974 /* If this needs to be changed because of future relaxing,
3975 it will be handled here like other internal IND12W
3976 relocs. */
3977 bfd_put_32 (abfd,
3978 0x00000780 | ((addend << 15) & 0xffff0000) | ((addend >> 17) & 0xf),
3979 contents + irel->r_offset);
3980 else
3981 /* We can't fully resolve this yet, because the external
3982 symbol value may be changed by future relaxing.
3983 We let the final link phase handle it. */
3984 bfd_put_32 (abfd, 0x00000780, contents + irel->r_offset);
3985
3986 hi_irelfn->r_info =
3987 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3988 lo_irelfn->r_info =
3989 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3990 if (!v850_elf_relax_delete_bytes (abfd, sec,
3991 irel->r_offset + 4, toaddr, 6))
3992 goto error_return;
3993
3994 align_pad_size += 6;
3995 }
3996 else
3997 {
3998 /* Replace the long jump with a br. */
3999
de863c74
NC
4000 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
4001 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PC9);
4002 else
4003 irel->r_info =
4004 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_9_PCREL);
86aba9db
NC
4005
4006 irel->r_addend = addend;
4007 addend = 0;
4008
4009 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
4010 /* If this needs to be changed because of future relaxing,
4011 it will be handled here like other internal IND12W
4012 relocs. */
4013 bfd_put_16 (abfd,
4014 0x0585 | ((addend << 10) & 0xf800) | ((addend << 3) & 0x0070),
4015 contents + irel->r_offset);
4016 else
4017 /* We can't fully resolve this yet, because the external
4018 symbol value may be changed by future relaxing.
4019 We let the final link phase handle it. */
4020 bfd_put_16 (abfd, 0x0585, contents + irel->r_offset);
4021
4022 hi_irelfn->r_info =
4023 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
4024 lo_irelfn->r_info =
4025 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
4026 if (!v850_elf_relax_delete_bytes (abfd, sec,
4027 irel->r_offset + 2, toaddr, 8))
4028 goto error_return;
4029
4030 align_pad_size += 8;
4031 }
4032 }
4033 }
4034
4035 irelalign = NULL;
4036 for (irel = internal_relocs; irel < irelend; irel++)
4037 {
4038 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
4039 && irel->r_offset == toaddr)
4040 {
4041 irel->r_offset -= align_pad_size;
4042
4043 if (irelalign == NULL || irelalign->r_addend > irel->r_addend)
4044 irelalign = irel;
4045 }
4046 }
4047
4048 addr = toaddr;
4049 }
4050
4051 if (!irelalign)
4052 {
4053#ifdef DEBUG_RELAX
4054 fprintf (stderr, "relax pad %d shorten %d -> %d\n",
4055 align_pad_size,
eea6121a
AM
4056 sec->size,
4057 sec->size - align_pad_size);
86aba9db 4058#endif
eea6121a 4059 sec->size -= align_pad_size;
86aba9db
NC
4060 }
4061
5cec6941
NC
4062 finish:
4063 if (internal_relocs != NULL
4064 && elf_section_data (sec)->relocs != internal_relocs)
4065 free (internal_relocs);
86aba9db 4066
5cec6941
NC
4067 if (contents != NULL
4068 && elf_section_data (sec)->this_hdr.contents != (unsigned char *) contents)
4069 free (contents);
86aba9db 4070
5cec6941
NC
4071 if (isymbuf != NULL
4072 && symtab_hdr->contents != (bfd_byte *) isymbuf)
4073 free (isymbuf);
86aba9db 4074
5cec6941 4075 return result;
86aba9db 4076
5cec6941 4077 error_return:
b34976b6 4078 result = FALSE;
5cec6941 4079 goto finish;
86aba9db 4080}
2f89ff8d 4081
b35d266b 4082static const struct bfd_elf_special_section v850_elf_special_sections[] =
7f4d3958 4083{
0112cd26
NC
4084 { STRING_COMMA_LEN (".call_table_data"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE) },
4085 { STRING_COMMA_LEN (".call_table_text"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
4086 + SHF_EXECINSTR) },
4087 { STRING_COMMA_LEN (".rosdata"), -2, SHT_PROGBITS, (SHF_ALLOC
4088 + SHF_V850_GPREL) },
4089 { STRING_COMMA_LEN (".rozdata"), -2, SHT_PROGBITS, (SHF_ALLOC
4090 + SHF_V850_R0REL) },
4091 { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
4092 + SHF_V850_GPREL) },
4093 { STRING_COMMA_LEN (".scommon"), -2, SHT_V850_SCOMMON, (SHF_ALLOC + SHF_WRITE
4094 + SHF_V850_GPREL) },
4095 { STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
4096 + SHF_V850_GPREL) },
4097 { STRING_COMMA_LEN (".tbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
4098 + SHF_V850_EPREL) },
4099 { STRING_COMMA_LEN (".tcommon"), -2, SHT_V850_TCOMMON, (SHF_ALLOC + SHF_WRITE
4100 + SHF_V850_R0REL) },
4101 { STRING_COMMA_LEN (".tdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
4102 + SHF_V850_EPREL) },
4103 { STRING_COMMA_LEN (".zbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
4104 + SHF_V850_R0REL) },
4105 { STRING_COMMA_LEN (".zcommon"), -2, SHT_V850_ZCOMMON, (SHF_ALLOC + SHF_WRITE
4106 + SHF_V850_R0REL) },
4107 { STRING_COMMA_LEN (".zdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
4108 + SHF_V850_R0REL) },
4109 { NULL, 0, 0, 0, 0 }
7f4d3958 4110};
252b5132 4111\f
6d00b590 4112#define TARGET_LITTLE_SYM v850_elf32_vec
252b5132
RH
4113#define TARGET_LITTLE_NAME "elf32-v850"
4114#define ELF_ARCH bfd_arch_v850
aa4f99bb
AO
4115#define ELF_MACHINE_CODE EM_V850
4116#define ELF_MACHINE_ALT1 EM_CYGNUS_V850
252b5132 4117#define ELF_MAXPAGESIZE 0x1000
435b1e90 4118
252b5132
RH
4119#define elf_info_to_howto v850_elf_info_to_howto_rela
4120#define elf_info_to_howto_rel v850_elf_info_to_howto_rel
4121
4122#define elf_backend_check_relocs v850_elf_check_relocs
4123#define elf_backend_relocate_section v850_elf_relocate_section
4124#define elf_backend_object_p v850_elf_object_p
4125#define elf_backend_final_write_processing v850_elf_final_write_processing
4126#define elf_backend_section_from_bfd_section v850_elf_section_from_bfd_section
4127#define elf_backend_symbol_processing v850_elf_symbol_processing
4128#define elf_backend_add_symbol_hook v850_elf_add_symbol_hook
4129#define elf_backend_link_output_symbol_hook v850_elf_link_output_symbol_hook
4130#define elf_backend_section_from_shdr v850_elf_section_from_shdr
4131#define elf_backend_fake_sections v850_elf_fake_sections
4132#define elf_backend_gc_mark_hook v850_elf_gc_mark_hook
29ef7005 4133#define elf_backend_special_sections v850_elf_special_sections
252b5132 4134
685080f2
NC
4135#define elf_backend_can_gc_sections 1
4136#define elf_backend_rela_normal 1
252b5132 4137
252b5132 4138#define bfd_elf32_bfd_is_local_label_name v850_elf_is_local_label_name
41702d50
NC
4139#define bfd_elf32_bfd_is_target_special_symbol v850_elf_is_target_special_symbol
4140
252b5132 4141#define bfd_elf32_bfd_reloc_type_lookup v850_elf_reloc_type_lookup
de863c74 4142#define bfd_elf32_bfd_reloc_name_lookup v850_elf_reloc_name_lookup
252b5132
RH
4143#define bfd_elf32_bfd_merge_private_bfd_data v850_elf_merge_private_bfd_data
4144#define bfd_elf32_bfd_set_private_flags v850_elf_set_private_flags
4145#define bfd_elf32_bfd_print_private_bfd_data v850_elf_print_private_bfd_data
86aba9db 4146#define bfd_elf32_bfd_relax_section v850_elf_relax_section
252b5132
RH
4147
4148#define elf_symbol_leading_char '_'
4149
de863c74
NC
4150#undef elf32_bed
4151#define elf32_bed elf32_v850_bed
4152
4153#include "elf32-target.h"
4154
4155/* Map BFD reloc types to V800 ELF reloc types. */
4156
4157static const struct v850_elf_reloc_map v800_elf_reloc_map[] =
4158{
4159 { BFD_RELOC_NONE, R_V810_NONE },
4160 { BFD_RELOC_8, R_V810_BYTE },
4161 { BFD_RELOC_16, R_V810_HWORD },
4162 { BFD_RELOC_32, R_V810_WORD },
4163 { BFD_RELOC_LO16, R_V810_WLO },
4164 { BFD_RELOC_HI16, R_V810_WHI },
4165 { BFD_RELOC_HI16_S, R_V810_WHI1 },
4166 { BFD_RELOC_V850_32_PCREL, R_V850_PC32 },
4167 { BFD_RELOC_V850_22_PCREL, R_V850_PCR22 },
4168 { BFD_RELOC_V850_17_PCREL, R_V850_PC17 },
4169 { BFD_RELOC_V850_16_PCREL, R_V850_PC16U },
4170 { BFD_RELOC_V850_9_PCREL, R_V850_PC9 },
4171 { BFD_RELOC_V850_LO16_S1, R_V810_WLO_1 }, /* Or R_V850_HWLO or R_V850_HWLO_1. */
4172 { BFD_RELOC_V850_23, R_V850_WLO23 },
4173 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_BLO },
4174 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V810_HWORD },
4175 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V810_HWORD },
4176 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V810_HWORD },
4177 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V810_GPWLO_1 }
4178};
4179
4180/* Map a bfd relocation into the appropriate howto structure. */
4181
4182static reloc_howto_type *
4183v800_elf_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
4184{
4185 unsigned int i;
4186
4187 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4188
4189 for (i = ARRAY_SIZE (v800_elf_reloc_map); i --;)
4190 if (v800_elf_reloc_map[i].bfd_reloc_val == code)
4191 {
4192 unsigned int elf_reloc_val = v800_elf_reloc_map[i].elf_reloc_val;
4193 unsigned int idx = elf_reloc_val - R_V810_NONE;
4194
4195 BFD_ASSERT (v800_elf_howto_table[idx].type == elf_reloc_val);
4196
4197 return v800_elf_howto_table + idx;
4198 }
4199
4200#ifdef DEBUG
4201 fprintf (stderr, "failed to find v800 equiv of bfd reloc code %d\n", code);
4202#endif
4203 return NULL;
4204}
4205
4206static reloc_howto_type *
4207v800_elf_reloc_name_lookup (bfd * abfd, const char * r_name)
4208{
4209 unsigned int i;
4210
4211 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4212
4213 for (i = ARRAY_SIZE (v800_elf_howto_table); i--;)
4214 if (v800_elf_howto_table[i].name != NULL
4215 && strcasecmp (v800_elf_howto_table[i].name, r_name) == 0)
4216 return v800_elf_howto_table + i;
4217
4218 return NULL;
4219}
4220
4221
4222/* Set the howto pointer in CACHE_PTR for a V800 ELF reloc. */
4223
4224static void
4225v800_elf_info_to_howto (bfd * abfd,
4226 arelent * cache_ptr,
4227 Elf_Internal_Rela * dst)
4228{
4229 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
4230
4231 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4232
4233 BFD_ASSERT (r_type < (unsigned int) R_V800_max);
4234
4235 if (r_type == R_V800_NONE)
4236 r_type = R_V810_NONE;
4237
4238 BFD_ASSERT (r_type >= (unsigned int) R_V810_NONE);
4239 r_type -= R_V810_NONE;
4240 BFD_ASSERT (r_type < ARRAY_SIZE (v800_elf_howto_table));
4241
68ffbac6 4242 cache_ptr->howto = v800_elf_howto_table + r_type;
de863c74
NC
4243}
4244\f
de863c74 4245#undef TARGET_LITTLE_SYM
6d00b590 4246#define TARGET_LITTLE_SYM v800_elf32_vec
de863c74
NC
4247#undef TARGET_LITTLE_NAME
4248#define TARGET_LITTLE_NAME "elf32-v850-rh850"
4249#undef ELF_ARCH
4250#define ELF_ARCH bfd_arch_v850_rh850
4251#undef ELF_MACHINE_CODE
4252#define ELF_MACHINE_CODE EM_V800
4253#undef ELF_MACHINE_ALT1
4254
4255#undef elf32_bed
4256#define elf32_bed elf32_v850_rh850_bed
4257
4258#undef elf_info_to_howto
4259#define elf_info_to_howto v800_elf_info_to_howto
4260#undef elf_info_to_howto_rel
4261#define elf_info_to_howto_rel NULL
4262#undef bfd_elf32_bfd_reloc_type_lookup
4263#define bfd_elf32_bfd_reloc_type_lookup v800_elf_reloc_type_lookup
4264#undef bfd_elf32_bfd_reloc_name_lookup
4265#define bfd_elf32_bfd_reloc_name_lookup v800_elf_reloc_name_lookup
4266
252b5132 4267#include "elf32-target.h"
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