Commit | Line | Data |
---|---|---|
e0001a05 | 1 | /* Xtensa-specific support for 32-bit ELF. |
250d07de | 2 | Copyright (C) 2003-2021 Free Software Foundation, Inc. |
e0001a05 NC |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or | |
7 | modify it under the terms of the GNU General Public License as | |
cd123cb7 | 8 | published by the Free Software Foundation; either version 3 of the |
e0001a05 NC |
9 | License, or (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, but | |
12 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
3e110533 | 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
53e09e0a | 19 | 02110-1301, USA. */ |
e0001a05 | 20 | |
e0001a05 | 21 | #include "sysdep.h" |
3db64b00 | 22 | #include "bfd.h" |
e0001a05 | 23 | |
e0001a05 | 24 | #include <stdarg.h> |
e0001a05 NC |
25 | #include <strings.h> |
26 | ||
27 | #include "bfdlink.h" | |
28 | #include "libbfd.h" | |
29 | #include "elf-bfd.h" | |
30 | #include "elf/xtensa.h" | |
4c2af04f | 31 | #include "splay-tree.h" |
e0001a05 NC |
32 | #include "xtensa-isa.h" |
33 | #include "xtensa-config.h" | |
34 | ||
bb294208 AM |
35 | /* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */ |
36 | #define OCTETS_PER_BYTE(ABFD, SEC) 1 | |
37 | ||
43cd72b9 BW |
38 | #define XTENSA_NO_NOP_REMOVAL 0 |
39 | ||
7a77f1ac MF |
40 | #ifndef XSHAL_ABI |
41 | #define XSHAL_ABI 0 | |
42 | #endif | |
43 | ||
44 | #ifndef XTHAL_ABI_UNDEFINED | |
45 | #define XTHAL_ABI_UNDEFINED -1 | |
46 | #endif | |
47 | ||
48 | #ifndef XTHAL_ABI_WINDOWED | |
49 | #define XTHAL_ABI_WINDOWED 0 | |
50 | #endif | |
51 | ||
52 | #ifndef XTHAL_ABI_CALL0 | |
53 | #define XTHAL_ABI_CALL0 1 | |
54 | #endif | |
55 | ||
e0001a05 NC |
56 | /* Local helper functions. */ |
57 | ||
0a1b45a2 | 58 | static bool add_extra_plt_sections (struct bfd_link_info *, int); |
2db662be | 59 | static char *vsprint_msg (const char *, const char *, int, ...) ATTRIBUTE_PRINTF(2,4); |
e0001a05 | 60 | static bfd_reloc_status_type bfd_elf_xtensa_reloc |
7fa3d080 | 61 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); |
0a1b45a2 | 62 | static bool do_fix_for_relocatable_link |
7fa3d080 | 63 | (Elf_Internal_Rela *, bfd *, asection *, bfd_byte *); |
e0001a05 | 64 | static void do_fix_for_final_link |
7fa3d080 | 65 | (Elf_Internal_Rela *, bfd *, asection *, bfd_byte *, bfd_vma *); |
e0001a05 NC |
66 | |
67 | /* Local functions to handle Xtensa configurability. */ | |
68 | ||
0a1b45a2 AM |
69 | static bool is_indirect_call_opcode (xtensa_opcode); |
70 | static bool is_direct_call_opcode (xtensa_opcode); | |
71 | static bool is_windowed_call_opcode (xtensa_opcode); | |
7fa3d080 BW |
72 | static xtensa_opcode get_const16_opcode (void); |
73 | static xtensa_opcode get_l32r_opcode (void); | |
74 | static bfd_vma l32r_offset (bfd_vma, bfd_vma); | |
75 | static int get_relocation_opnd (xtensa_opcode, int); | |
76 | static int get_relocation_slot (int); | |
e0001a05 | 77 | static xtensa_opcode get_relocation_opcode |
7fa3d080 | 78 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *); |
0a1b45a2 | 79 | static bool is_l32r_relocation |
7fa3d080 | 80 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *); |
0a1b45a2 AM |
81 | static bool is_alt_relocation (int); |
82 | static bool is_operand_relocation (int); | |
43cd72b9 | 83 | static bfd_size_type insn_decode_len |
7fa3d080 | 84 | (bfd_byte *, bfd_size_type, bfd_size_type); |
e0d0c518 MF |
85 | static int insn_num_slots |
86 | (bfd_byte *, bfd_size_type, bfd_size_type); | |
43cd72b9 | 87 | static xtensa_opcode insn_decode_opcode |
7fa3d080 | 88 | (bfd_byte *, bfd_size_type, bfd_size_type, int); |
0a1b45a2 | 89 | static bool check_branch_target_aligned |
7fa3d080 | 90 | (bfd_byte *, bfd_size_type, bfd_vma, bfd_vma); |
0a1b45a2 | 91 | static bool check_loop_aligned |
7fa3d080 | 92 | (bfd_byte *, bfd_size_type, bfd_vma, bfd_vma); |
0a1b45a2 | 93 | static bool check_branch_target_aligned_address (bfd_vma, int); |
43cd72b9 | 94 | static bfd_size_type get_asm_simplify_size |
7fa3d080 | 95 | (bfd_byte *, bfd_size_type, bfd_size_type); |
e0001a05 NC |
96 | |
97 | /* Functions for link-time code simplifications. */ | |
98 | ||
43cd72b9 | 99 | static bfd_reloc_status_type elf_xtensa_do_asm_simplify |
7fa3d080 | 100 | (bfd_byte *, bfd_vma, bfd_vma, char **); |
e0001a05 | 101 | static bfd_reloc_status_type contract_asm_expansion |
7fa3d080 BW |
102 | (bfd_byte *, bfd_vma, Elf_Internal_Rela *, char **); |
103 | static xtensa_opcode swap_callx_for_call_opcode (xtensa_opcode); | |
0a1b45a2 | 104 | static xtensa_opcode get_expanded_call_opcode (bfd_byte *, int, bool *); |
e0001a05 NC |
105 | |
106 | /* Access to internal relocations, section contents and symbols. */ | |
107 | ||
108 | static Elf_Internal_Rela *retrieve_internal_relocs | |
0a1b45a2 | 109 | (bfd *, asection *, bool); |
7fa3d080 BW |
110 | static void pin_internal_relocs (asection *, Elf_Internal_Rela *); |
111 | static void release_internal_relocs (asection *, Elf_Internal_Rela *); | |
0a1b45a2 | 112 | static bfd_byte *retrieve_contents (bfd *, asection *, bool); |
7fa3d080 BW |
113 | static void pin_contents (asection *, bfd_byte *); |
114 | static void release_contents (asection *, bfd_byte *); | |
115 | static Elf_Internal_Sym *retrieve_local_syms (bfd *); | |
e0001a05 NC |
116 | |
117 | /* Miscellaneous utility functions. */ | |
118 | ||
f0e6fdb2 BW |
119 | static asection *elf_xtensa_get_plt_section (struct bfd_link_info *, int); |
120 | static asection *elf_xtensa_get_gotplt_section (struct bfd_link_info *, int); | |
7fa3d080 | 121 | static asection *get_elf_r_symndx_section (bfd *, unsigned long); |
e0001a05 | 122 | static struct elf_link_hash_entry *get_elf_r_symndx_hash_entry |
7fa3d080 BW |
123 | (bfd *, unsigned long); |
124 | static bfd_vma get_elf_r_symndx_offset (bfd *, unsigned long); | |
0a1b45a2 AM |
125 | static bool is_reloc_sym_weak (bfd *, Elf_Internal_Rela *); |
126 | static bool pcrel_reloc_fits (xtensa_opcode, int, bfd_vma, bfd_vma); | |
127 | static bool xtensa_is_property_section (asection *); | |
128 | static bool xtensa_is_insntable_section (asection *); | |
129 | static bool xtensa_is_littable_section (asection *); | |
130 | static bool xtensa_is_proptable_section (asection *); | |
7fa3d080 BW |
131 | static int internal_reloc_compare (const void *, const void *); |
132 | static int internal_reloc_matches (const void *, const void *); | |
51c8ebc1 | 133 | static asection *xtensa_get_property_section (asection *, const char *); |
7fa3d080 | 134 | static flagword xtensa_get_property_predef_flags (asection *); |
e0001a05 NC |
135 | |
136 | /* Other functions called directly by the linker. */ | |
137 | ||
138 | typedef void (*deps_callback_t) | |
7fa3d080 | 139 | (asection *, bfd_vma, asection *, bfd_vma, void *); |
0a1b45a2 | 140 | extern bool xtensa_callback_required_dependence |
7fa3d080 | 141 | (bfd *, asection *, struct bfd_link_info *, deps_callback_t, void *); |
e0001a05 NC |
142 | |
143 | ||
43cd72b9 BW |
144 | /* Globally visible flag for choosing size optimization of NOP removal |
145 | instead of branch-target-aware minimization for NOP removal. | |
146 | When nonzero, narrow all instructions and remove all NOPs possible | |
147 | around longcall expansions. */ | |
7fa3d080 | 148 | |
43cd72b9 BW |
149 | int elf32xtensa_size_opt; |
150 | ||
151 | ||
152 | /* The "new_section_hook" is used to set up a per-section | |
153 | "xtensa_relax_info" data structure with additional information used | |
154 | during relaxation. */ | |
e0001a05 | 155 | |
7fa3d080 | 156 | typedef struct xtensa_relax_info_struct xtensa_relax_info; |
e0001a05 | 157 | |
43cd72b9 | 158 | |
43cd72b9 BW |
159 | /* The GNU tools do not easily allow extending interfaces to pass around |
160 | the pointer to the Xtensa ISA information, so instead we add a global | |
161 | variable here (in BFD) that can be used by any of the tools that need | |
162 | this information. */ | |
163 | ||
164 | xtensa_isa xtensa_default_isa; | |
165 | ||
166 | ||
e0001a05 NC |
167 | /* When this is true, relocations may have been modified to refer to |
168 | symbols from other input files. The per-section list of "fix" | |
169 | records needs to be checked when resolving relocations. */ | |
170 | ||
0a1b45a2 | 171 | static bool relaxing_section = false; |
e0001a05 | 172 | |
43cd72b9 BW |
173 | /* When this is true, during final links, literals that cannot be |
174 | coalesced and their relocations may be moved to other sections. */ | |
175 | ||
176 | int elf32xtensa_no_literal_movement = 1; | |
177 | ||
8255c61b MF |
178 | /* Place property records for a section into individual property section |
179 | with xt.prop. prefix. */ | |
180 | ||
0a1b45a2 | 181 | bool elf32xtensa_separate_props = false; |
8255c61b | 182 | |
7a77f1ac MF |
183 | /* Xtensa ABI. It affects PLT entry code. */ |
184 | ||
185 | int elf32xtensa_abi = XTHAL_ABI_UNDEFINED; | |
186 | ||
b0dddeec AM |
187 | /* Rename one of the generic section flags to better document how it |
188 | is used here. */ | |
189 | /* Whether relocations have been processed. */ | |
190 | #define reloc_done sec_flg0 | |
e0001a05 NC |
191 | \f |
192 | static reloc_howto_type elf_howto_table[] = | |
193 | { | |
0a1b45a2 | 194 | HOWTO (R_XTENSA_NONE, 0, 3, 0, false, 0, complain_overflow_dont, |
e0001a05 | 195 | bfd_elf_xtensa_reloc, "R_XTENSA_NONE", |
0a1b45a2 AM |
196 | false, 0, 0, false), |
197 | HOWTO (R_XTENSA_32, 0, 2, 32, false, 0, complain_overflow_bitfield, | |
e0001a05 | 198 | bfd_elf_xtensa_reloc, "R_XTENSA_32", |
0a1b45a2 | 199 | true, 0xffffffff, 0xffffffff, false), |
e5f131d1 | 200 | |
e0001a05 NC |
201 | /* Replace a 32-bit value with a value from the runtime linker (only |
202 | used by linker-generated stub functions). The r_addend value is | |
203 | special: 1 means to substitute a pointer to the runtime linker's | |
204 | dynamic resolver function; 2 means to substitute the link map for | |
205 | the shared object. */ | |
0a1b45a2 AM |
206 | HOWTO (R_XTENSA_RTLD, 0, 2, 32, false, 0, complain_overflow_dont, |
207 | NULL, "R_XTENSA_RTLD", false, 0, 0, false), | |
e5f131d1 | 208 | |
0a1b45a2 | 209 | HOWTO (R_XTENSA_GLOB_DAT, 0, 2, 32, false, 0, complain_overflow_bitfield, |
e0001a05 | 210 | bfd_elf_generic_reloc, "R_XTENSA_GLOB_DAT", |
0a1b45a2 AM |
211 | false, 0, 0xffffffff, false), |
212 | HOWTO (R_XTENSA_JMP_SLOT, 0, 2, 32, false, 0, complain_overflow_bitfield, | |
e0001a05 | 213 | bfd_elf_generic_reloc, "R_XTENSA_JMP_SLOT", |
0a1b45a2 AM |
214 | false, 0, 0xffffffff, false), |
215 | HOWTO (R_XTENSA_RELATIVE, 0, 2, 32, false, 0, complain_overflow_bitfield, | |
e0001a05 | 216 | bfd_elf_generic_reloc, "R_XTENSA_RELATIVE", |
0a1b45a2 AM |
217 | false, 0, 0xffffffff, false), |
218 | HOWTO (R_XTENSA_PLT, 0, 2, 32, false, 0, complain_overflow_bitfield, | |
e0001a05 | 219 | bfd_elf_xtensa_reloc, "R_XTENSA_PLT", |
0a1b45a2 | 220 | false, 0, 0xffffffff, false), |
e5f131d1 | 221 | |
e0001a05 | 222 | EMPTY_HOWTO (7), |
e5f131d1 BW |
223 | |
224 | /* Old relocations for backward compatibility. */ | |
0a1b45a2 AM |
225 | HOWTO (R_XTENSA_OP0, 0, 0, 0, true, 0, complain_overflow_dont, |
226 | bfd_elf_xtensa_reloc, "R_XTENSA_OP0", false, 0, 0, true), | |
227 | HOWTO (R_XTENSA_OP1, 0, 0, 0, true, 0, complain_overflow_dont, | |
228 | bfd_elf_xtensa_reloc, "R_XTENSA_OP1", false, 0, 0, true), | |
229 | HOWTO (R_XTENSA_OP2, 0, 0, 0, true, 0, complain_overflow_dont, | |
230 | bfd_elf_xtensa_reloc, "R_XTENSA_OP2", false, 0, 0, true), | |
e5f131d1 | 231 | |
e0001a05 | 232 | /* Assembly auto-expansion. */ |
0a1b45a2 AM |
233 | HOWTO (R_XTENSA_ASM_EXPAND, 0, 0, 0, true, 0, complain_overflow_dont, |
234 | bfd_elf_xtensa_reloc, "R_XTENSA_ASM_EXPAND", false, 0, 0, true), | |
e0001a05 | 235 | /* Relax assembly auto-expansion. */ |
0a1b45a2 AM |
236 | HOWTO (R_XTENSA_ASM_SIMPLIFY, 0, 0, 0, true, 0, complain_overflow_dont, |
237 | bfd_elf_xtensa_reloc, "R_XTENSA_ASM_SIMPLIFY", false, 0, 0, true), | |
e5f131d1 | 238 | |
e0001a05 | 239 | EMPTY_HOWTO (13), |
1bbb5f21 | 240 | |
0a1b45a2 | 241 | HOWTO (R_XTENSA_32_PCREL, 0, 2, 32, true, 0, complain_overflow_bitfield, |
1bbb5f21 | 242 | bfd_elf_xtensa_reloc, "R_XTENSA_32_PCREL", |
0a1b45a2 | 243 | false, 0, 0xffffffff, true), |
e5f131d1 | 244 | |
e0001a05 | 245 | /* GNU extension to record C++ vtable hierarchy. */ |
0a1b45a2 | 246 | HOWTO (R_XTENSA_GNU_VTINHERIT, 0, 2, 0, false, 0, complain_overflow_dont, |
07d6d2b8 | 247 | NULL, "R_XTENSA_GNU_VTINHERIT", |
0a1b45a2 | 248 | false, 0, 0, false), |
e0001a05 | 249 | /* GNU extension to record C++ vtable member usage. */ |
0a1b45a2 | 250 | HOWTO (R_XTENSA_GNU_VTENTRY, 0, 2, 0, false, 0, complain_overflow_dont, |
07d6d2b8 | 251 | _bfd_elf_rel_vtable_reloc_fn, "R_XTENSA_GNU_VTENTRY", |
0a1b45a2 | 252 | false, 0, 0, false), |
43cd72b9 BW |
253 | |
254 | /* Relocations for supporting difference of symbols. */ | |
0a1b45a2 AM |
255 | HOWTO (R_XTENSA_DIFF8, 0, 0, 8, false, 0, complain_overflow_signed, |
256 | bfd_elf_xtensa_reloc, "R_XTENSA_DIFF8", false, 0, 0xff, false), | |
257 | HOWTO (R_XTENSA_DIFF16, 0, 1, 16, false, 0, complain_overflow_signed, | |
258 | bfd_elf_xtensa_reloc, "R_XTENSA_DIFF16", false, 0, 0xffff, false), | |
259 | HOWTO (R_XTENSA_DIFF32, 0, 2, 32, false, 0, complain_overflow_signed, | |
260 | bfd_elf_xtensa_reloc, "R_XTENSA_DIFF32", false, 0, 0xffffffff, false), | |
43cd72b9 BW |
261 | |
262 | /* General immediate operand relocations. */ | |
0a1b45a2 AM |
263 | HOWTO (R_XTENSA_SLOT0_OP, 0, 0, 0, true, 0, complain_overflow_dont, |
264 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT0_OP", false, 0, 0, true), | |
265 | HOWTO (R_XTENSA_SLOT1_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
266 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT1_OP", false, 0, 0, true), | |
267 | HOWTO (R_XTENSA_SLOT2_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
268 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT2_OP", false, 0, 0, true), | |
269 | HOWTO (R_XTENSA_SLOT3_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
270 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT3_OP", false, 0, 0, true), | |
271 | HOWTO (R_XTENSA_SLOT4_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
272 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT4_OP", false, 0, 0, true), | |
273 | HOWTO (R_XTENSA_SLOT5_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
274 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT5_OP", false, 0, 0, true), | |
275 | HOWTO (R_XTENSA_SLOT6_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
276 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT6_OP", false, 0, 0, true), | |
277 | HOWTO (R_XTENSA_SLOT7_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
278 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT7_OP", false, 0, 0, true), | |
279 | HOWTO (R_XTENSA_SLOT8_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
280 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT8_OP", false, 0, 0, true), | |
281 | HOWTO (R_XTENSA_SLOT9_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
282 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT9_OP", false, 0, 0, true), | |
283 | HOWTO (R_XTENSA_SLOT10_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
284 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT10_OP", false, 0, 0, true), | |
285 | HOWTO (R_XTENSA_SLOT11_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
286 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT11_OP", false, 0, 0, true), | |
287 | HOWTO (R_XTENSA_SLOT12_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
288 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT12_OP", false, 0, 0, true), | |
289 | HOWTO (R_XTENSA_SLOT13_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
290 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT13_OP", false, 0, 0, true), | |
291 | HOWTO (R_XTENSA_SLOT14_OP, 0, 0, 0, true, 0, complain_overflow_dont, | |
292 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT14_OP", false, 0, 0, true), | |
43cd72b9 BW |
293 | |
294 | /* "Alternate" relocations. The meaning of these is opcode-specific. */ | |
0a1b45a2 AM |
295 | HOWTO (R_XTENSA_SLOT0_ALT, 0, 0, 0, true, 0, complain_overflow_dont, |
296 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT0_ALT", false, 0, 0, true), | |
297 | HOWTO (R_XTENSA_SLOT1_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
298 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT1_ALT", false, 0, 0, true), | |
299 | HOWTO (R_XTENSA_SLOT2_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
300 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT2_ALT", false, 0, 0, true), | |
301 | HOWTO (R_XTENSA_SLOT3_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
302 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT3_ALT", false, 0, 0, true), | |
303 | HOWTO (R_XTENSA_SLOT4_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
304 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT4_ALT", false, 0, 0, true), | |
305 | HOWTO (R_XTENSA_SLOT5_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
306 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT5_ALT", false, 0, 0, true), | |
307 | HOWTO (R_XTENSA_SLOT6_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
308 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT6_ALT", false, 0, 0, true), | |
309 | HOWTO (R_XTENSA_SLOT7_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
310 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT7_ALT", false, 0, 0, true), | |
311 | HOWTO (R_XTENSA_SLOT8_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
312 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT8_ALT", false, 0, 0, true), | |
313 | HOWTO (R_XTENSA_SLOT9_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
314 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT9_ALT", false, 0, 0, true), | |
315 | HOWTO (R_XTENSA_SLOT10_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
316 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT10_ALT", false, 0, 0, true), | |
317 | HOWTO (R_XTENSA_SLOT11_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
318 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT11_ALT", false, 0, 0, true), | |
319 | HOWTO (R_XTENSA_SLOT12_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
320 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT12_ALT", false, 0, 0, true), | |
321 | HOWTO (R_XTENSA_SLOT13_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
322 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT13_ALT", false, 0, 0, true), | |
323 | HOWTO (R_XTENSA_SLOT14_ALT, 0, 0, 0, true, 0, complain_overflow_dont, | |
324 | bfd_elf_xtensa_reloc, "R_XTENSA_SLOT14_ALT", false, 0, 0, true), | |
28dbbc02 BW |
325 | |
326 | /* TLS relocations. */ | |
0a1b45a2 | 327 | HOWTO (R_XTENSA_TLSDESC_FN, 0, 2, 32, false, 0, complain_overflow_dont, |
28dbbc02 | 328 | bfd_elf_xtensa_reloc, "R_XTENSA_TLSDESC_FN", |
0a1b45a2 AM |
329 | false, 0, 0xffffffff, false), |
330 | HOWTO (R_XTENSA_TLSDESC_ARG, 0, 2, 32, false, 0, complain_overflow_dont, | |
28dbbc02 | 331 | bfd_elf_xtensa_reloc, "R_XTENSA_TLSDESC_ARG", |
0a1b45a2 AM |
332 | false, 0, 0xffffffff, false), |
333 | HOWTO (R_XTENSA_TLS_DTPOFF, 0, 2, 32, false, 0, complain_overflow_dont, | |
28dbbc02 | 334 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_DTPOFF", |
0a1b45a2 AM |
335 | false, 0, 0xffffffff, false), |
336 | HOWTO (R_XTENSA_TLS_TPOFF, 0, 2, 32, false, 0, complain_overflow_dont, | |
28dbbc02 | 337 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_TPOFF", |
0a1b45a2 AM |
338 | false, 0, 0xffffffff, false), |
339 | HOWTO (R_XTENSA_TLS_FUNC, 0, 0, 0, false, 0, complain_overflow_dont, | |
28dbbc02 | 340 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_FUNC", |
0a1b45a2 AM |
341 | false, 0, 0, false), |
342 | HOWTO (R_XTENSA_TLS_ARG, 0, 0, 0, false, 0, complain_overflow_dont, | |
28dbbc02 | 343 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_ARG", |
0a1b45a2 AM |
344 | false, 0, 0, false), |
345 | HOWTO (R_XTENSA_TLS_CALL, 0, 0, 0, false, 0, complain_overflow_dont, | |
28dbbc02 | 346 | bfd_elf_xtensa_reloc, "R_XTENSA_TLS_CALL", |
0a1b45a2 AM |
347 | false, 0, 0, false), |
348 | ||
349 | HOWTO (R_XTENSA_PDIFF8, 0, 0, 8, false, 0, complain_overflow_bitfield, | |
350 | bfd_elf_xtensa_reloc, "R_XTENSA_PDIFF8", false, 0, 0xff, false), | |
351 | HOWTO (R_XTENSA_PDIFF16, 0, 1, 16, false, 0, complain_overflow_bitfield, | |
352 | bfd_elf_xtensa_reloc, "R_XTENSA_PDIFF16", false, 0, 0xffff, false), | |
353 | HOWTO (R_XTENSA_PDIFF32, 0, 2, 32, false, 0, complain_overflow_bitfield, | |
354 | bfd_elf_xtensa_reloc, "R_XTENSA_PDIFF32", false, 0, 0xffffffff, false), | |
355 | ||
356 | HOWTO (R_XTENSA_NDIFF8, 0, 0, 8, false, 0, complain_overflow_bitfield, | |
357 | bfd_elf_xtensa_reloc, "R_XTENSA_NDIFF8", false, 0, 0xff, false), | |
358 | HOWTO (R_XTENSA_NDIFF16, 0, 1, 16, false, 0, complain_overflow_bitfield, | |
359 | bfd_elf_xtensa_reloc, "R_XTENSA_NDIFF16", false, 0, 0xffff, false), | |
360 | HOWTO (R_XTENSA_NDIFF32, 0, 2, 32, false, 0, complain_overflow_bitfield, | |
361 | bfd_elf_xtensa_reloc, "R_XTENSA_NDIFF32", false, 0, 0xffffffff, false), | |
e0001a05 NC |
362 | }; |
363 | ||
43cd72b9 | 364 | #if DEBUG_GEN_RELOC |
e0001a05 NC |
365 | #define TRACE(str) \ |
366 | fprintf (stderr, "Xtensa bfd reloc lookup %d (%s)\n", code, str) | |
367 | #else | |
368 | #define TRACE(str) | |
369 | #endif | |
370 | ||
371 | static reloc_howto_type * | |
7fa3d080 BW |
372 | elf_xtensa_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
373 | bfd_reloc_code_real_type code) | |
e0001a05 NC |
374 | { |
375 | switch (code) | |
376 | { | |
377 | case BFD_RELOC_NONE: | |
378 | TRACE ("BFD_RELOC_NONE"); | |
379 | return &elf_howto_table[(unsigned) R_XTENSA_NONE ]; | |
380 | ||
381 | case BFD_RELOC_32: | |
382 | TRACE ("BFD_RELOC_32"); | |
383 | return &elf_howto_table[(unsigned) R_XTENSA_32 ]; | |
384 | ||
1bbb5f21 BW |
385 | case BFD_RELOC_32_PCREL: |
386 | TRACE ("BFD_RELOC_32_PCREL"); | |
387 | return &elf_howto_table[(unsigned) R_XTENSA_32_PCREL ]; | |
388 | ||
43cd72b9 BW |
389 | case BFD_RELOC_XTENSA_DIFF8: |
390 | TRACE ("BFD_RELOC_XTENSA_DIFF8"); | |
391 | return &elf_howto_table[(unsigned) R_XTENSA_DIFF8 ]; | |
392 | ||
393 | case BFD_RELOC_XTENSA_DIFF16: | |
394 | TRACE ("BFD_RELOC_XTENSA_DIFF16"); | |
395 | return &elf_howto_table[(unsigned) R_XTENSA_DIFF16 ]; | |
396 | ||
397 | case BFD_RELOC_XTENSA_DIFF32: | |
398 | TRACE ("BFD_RELOC_XTENSA_DIFF32"); | |
399 | return &elf_howto_table[(unsigned) R_XTENSA_DIFF32 ]; | |
400 | ||
30ce8e47 MF |
401 | case BFD_RELOC_XTENSA_PDIFF8: |
402 | TRACE ("BFD_RELOC_XTENSA_PDIFF8"); | |
403 | return &elf_howto_table[(unsigned) R_XTENSA_PDIFF8 ]; | |
404 | ||
405 | case BFD_RELOC_XTENSA_PDIFF16: | |
406 | TRACE ("BFD_RELOC_XTENSA_PDIFF16"); | |
407 | return &elf_howto_table[(unsigned) R_XTENSA_PDIFF16 ]; | |
408 | ||
409 | case BFD_RELOC_XTENSA_PDIFF32: | |
410 | TRACE ("BFD_RELOC_XTENSA_PDIFF32"); | |
411 | return &elf_howto_table[(unsigned) R_XTENSA_PDIFF32 ]; | |
412 | ||
413 | case BFD_RELOC_XTENSA_NDIFF8: | |
414 | TRACE ("BFD_RELOC_XTENSA_NDIFF8"); | |
415 | return &elf_howto_table[(unsigned) R_XTENSA_NDIFF8 ]; | |
416 | ||
417 | case BFD_RELOC_XTENSA_NDIFF16: | |
418 | TRACE ("BFD_RELOC_XTENSA_NDIFF16"); | |
419 | return &elf_howto_table[(unsigned) R_XTENSA_NDIFF16 ]; | |
420 | ||
421 | case BFD_RELOC_XTENSA_NDIFF32: | |
422 | TRACE ("BFD_RELOC_XTENSA_NDIFF32"); | |
423 | return &elf_howto_table[(unsigned) R_XTENSA_NDIFF32 ]; | |
424 | ||
e0001a05 NC |
425 | case BFD_RELOC_XTENSA_RTLD: |
426 | TRACE ("BFD_RELOC_XTENSA_RTLD"); | |
427 | return &elf_howto_table[(unsigned) R_XTENSA_RTLD ]; | |
428 | ||
429 | case BFD_RELOC_XTENSA_GLOB_DAT: | |
430 | TRACE ("BFD_RELOC_XTENSA_GLOB_DAT"); | |
431 | return &elf_howto_table[(unsigned) R_XTENSA_GLOB_DAT ]; | |
432 | ||
433 | case BFD_RELOC_XTENSA_JMP_SLOT: | |
434 | TRACE ("BFD_RELOC_XTENSA_JMP_SLOT"); | |
435 | return &elf_howto_table[(unsigned) R_XTENSA_JMP_SLOT ]; | |
436 | ||
437 | case BFD_RELOC_XTENSA_RELATIVE: | |
438 | TRACE ("BFD_RELOC_XTENSA_RELATIVE"); | |
439 | return &elf_howto_table[(unsigned) R_XTENSA_RELATIVE ]; | |
440 | ||
441 | case BFD_RELOC_XTENSA_PLT: | |
442 | TRACE ("BFD_RELOC_XTENSA_PLT"); | |
443 | return &elf_howto_table[(unsigned) R_XTENSA_PLT ]; | |
444 | ||
445 | case BFD_RELOC_XTENSA_OP0: | |
446 | TRACE ("BFD_RELOC_XTENSA_OP0"); | |
447 | return &elf_howto_table[(unsigned) R_XTENSA_OP0 ]; | |
448 | ||
449 | case BFD_RELOC_XTENSA_OP1: | |
450 | TRACE ("BFD_RELOC_XTENSA_OP1"); | |
451 | return &elf_howto_table[(unsigned) R_XTENSA_OP1 ]; | |
452 | ||
453 | case BFD_RELOC_XTENSA_OP2: | |
454 | TRACE ("BFD_RELOC_XTENSA_OP2"); | |
455 | return &elf_howto_table[(unsigned) R_XTENSA_OP2 ]; | |
456 | ||
457 | case BFD_RELOC_XTENSA_ASM_EXPAND: | |
458 | TRACE ("BFD_RELOC_XTENSA_ASM_EXPAND"); | |
459 | return &elf_howto_table[(unsigned) R_XTENSA_ASM_EXPAND ]; | |
460 | ||
461 | case BFD_RELOC_XTENSA_ASM_SIMPLIFY: | |
462 | TRACE ("BFD_RELOC_XTENSA_ASM_SIMPLIFY"); | |
463 | return &elf_howto_table[(unsigned) R_XTENSA_ASM_SIMPLIFY ]; | |
464 | ||
465 | case BFD_RELOC_VTABLE_INHERIT: | |
466 | TRACE ("BFD_RELOC_VTABLE_INHERIT"); | |
467 | return &elf_howto_table[(unsigned) R_XTENSA_GNU_VTINHERIT ]; | |
468 | ||
469 | case BFD_RELOC_VTABLE_ENTRY: | |
470 | TRACE ("BFD_RELOC_VTABLE_ENTRY"); | |
471 | return &elf_howto_table[(unsigned) R_XTENSA_GNU_VTENTRY ]; | |
472 | ||
28dbbc02 BW |
473 | case BFD_RELOC_XTENSA_TLSDESC_FN: |
474 | TRACE ("BFD_RELOC_XTENSA_TLSDESC_FN"); | |
475 | return &elf_howto_table[(unsigned) R_XTENSA_TLSDESC_FN ]; | |
476 | ||
477 | case BFD_RELOC_XTENSA_TLSDESC_ARG: | |
478 | TRACE ("BFD_RELOC_XTENSA_TLSDESC_ARG"); | |
479 | return &elf_howto_table[(unsigned) R_XTENSA_TLSDESC_ARG ]; | |
480 | ||
481 | case BFD_RELOC_XTENSA_TLS_DTPOFF: | |
482 | TRACE ("BFD_RELOC_XTENSA_TLS_DTPOFF"); | |
483 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_DTPOFF ]; | |
484 | ||
485 | case BFD_RELOC_XTENSA_TLS_TPOFF: | |
486 | TRACE ("BFD_RELOC_XTENSA_TLS_TPOFF"); | |
487 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_TPOFF ]; | |
488 | ||
489 | case BFD_RELOC_XTENSA_TLS_FUNC: | |
490 | TRACE ("BFD_RELOC_XTENSA_TLS_FUNC"); | |
491 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_FUNC ]; | |
492 | ||
493 | case BFD_RELOC_XTENSA_TLS_ARG: | |
494 | TRACE ("BFD_RELOC_XTENSA_TLS_ARG"); | |
495 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_ARG ]; | |
496 | ||
497 | case BFD_RELOC_XTENSA_TLS_CALL: | |
498 | TRACE ("BFD_RELOC_XTENSA_TLS_CALL"); | |
499 | return &elf_howto_table[(unsigned) R_XTENSA_TLS_CALL ]; | |
500 | ||
e0001a05 | 501 | default: |
43cd72b9 BW |
502 | if (code >= BFD_RELOC_XTENSA_SLOT0_OP |
503 | && code <= BFD_RELOC_XTENSA_SLOT14_OP) | |
504 | { | |
505 | unsigned n = (R_XTENSA_SLOT0_OP + | |
506 | (code - BFD_RELOC_XTENSA_SLOT0_OP)); | |
507 | return &elf_howto_table[n]; | |
508 | } | |
509 | ||
510 | if (code >= BFD_RELOC_XTENSA_SLOT0_ALT | |
511 | && code <= BFD_RELOC_XTENSA_SLOT14_ALT) | |
512 | { | |
513 | unsigned n = (R_XTENSA_SLOT0_ALT + | |
514 | (code - BFD_RELOC_XTENSA_SLOT0_ALT)); | |
515 | return &elf_howto_table[n]; | |
516 | } | |
517 | ||
e0001a05 NC |
518 | break; |
519 | } | |
520 | ||
f3185997 | 521 | /* xgettext:c-format */ |
e8f5af78 | 522 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, (int) code); |
f3185997 | 523 | bfd_set_error (bfd_error_bad_value); |
e0001a05 NC |
524 | TRACE ("Unknown"); |
525 | return NULL; | |
526 | } | |
527 | ||
157090f7 AM |
528 | static reloc_howto_type * |
529 | elf_xtensa_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
530 | const char *r_name) | |
531 | { | |
532 | unsigned int i; | |
533 | ||
534 | for (i = 0; i < sizeof (elf_howto_table) / sizeof (elf_howto_table[0]); i++) | |
535 | if (elf_howto_table[i].name != NULL | |
536 | && strcasecmp (elf_howto_table[i].name, r_name) == 0) | |
537 | return &elf_howto_table[i]; | |
538 | ||
539 | return NULL; | |
540 | } | |
541 | ||
e0001a05 NC |
542 | |
543 | /* Given an ELF "rela" relocation, find the corresponding howto and record | |
544 | it in the BFD internal arelent representation of the relocation. */ | |
545 | ||
0a1b45a2 | 546 | static bool |
0aa13fee | 547 | elf_xtensa_info_to_howto_rela (bfd *abfd, |
7fa3d080 BW |
548 | arelent *cache_ptr, |
549 | Elf_Internal_Rela *dst) | |
e0001a05 NC |
550 | { |
551 | unsigned int r_type = ELF32_R_TYPE (dst->r_info); | |
552 | ||
5860e3f8 NC |
553 | if (r_type >= (unsigned int) R_XTENSA_max) |
554 | { | |
695344c0 | 555 | /* xgettext:c-format */ |
0aa13fee AM |
556 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), |
557 | abfd, r_type); | |
f3185997 | 558 | bfd_set_error (bfd_error_bad_value); |
0a1b45a2 | 559 | return false; |
5860e3f8 | 560 | } |
e0001a05 | 561 | cache_ptr->howto = &elf_howto_table[r_type]; |
0a1b45a2 | 562 | return true; |
e0001a05 NC |
563 | } |
564 | ||
565 | \f | |
566 | /* Functions for the Xtensa ELF linker. */ | |
567 | ||
568 | /* The name of the dynamic interpreter. This is put in the .interp | |
569 | section. */ | |
570 | ||
571 | #define ELF_DYNAMIC_INTERPRETER "/lib/ld.so" | |
572 | ||
573 | /* The size in bytes of an entry in the procedure linkage table. | |
574 | (This does _not_ include the space for the literals associated with | |
575 | the PLT entry.) */ | |
576 | ||
577 | #define PLT_ENTRY_SIZE 16 | |
578 | ||
579 | /* For _really_ large PLTs, we may need to alternate between literals | |
580 | and code to keep the literals within the 256K range of the L32R | |
581 | instructions in the code. It's unlikely that anyone would ever need | |
582 | such a big PLT, but an arbitrary limit on the PLT size would be bad. | |
583 | Thus, we split the PLT into chunks. Since there's very little | |
584 | overhead (2 extra literals) for each chunk, the chunk size is kept | |
585 | small so that the code for handling multiple chunks get used and | |
586 | tested regularly. With 254 entries, there are 1K of literals for | |
587 | each chunk, and that seems like a nice round number. */ | |
588 | ||
589 | #define PLT_ENTRIES_PER_CHUNK 254 | |
590 | ||
591 | /* PLT entries are actually used as stub functions for lazy symbol | |
592 | resolution. Once the symbol is resolved, the stub function is never | |
593 | invoked. Note: the 32-byte frame size used here cannot be changed | |
594 | without a corresponding change in the runtime linker. */ | |
595 | ||
f7e16c2a | 596 | static const bfd_byte elf_xtensa_be_plt_entry[][PLT_ENTRY_SIZE] = |
e0001a05 | 597 | { |
f7e16c2a MF |
598 | { |
599 | 0x6c, 0x10, 0x04, /* entry sp, 32 */ | |
600 | 0x18, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
601 | 0x1a, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
602 | 0x1b, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
603 | 0x0a, 0x80, 0x00, /* jx a8 */ | |
604 | 0 /* unused */ | |
605 | }, | |
606 | { | |
607 | 0x18, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
608 | 0x1a, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
609 | 0x1b, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
610 | 0x0a, 0x80, 0x00, /* jx a8 */ | |
611 | 0 /* unused */ | |
612 | } | |
e0001a05 NC |
613 | }; |
614 | ||
f7e16c2a | 615 | static const bfd_byte elf_xtensa_le_plt_entry[][PLT_ENTRY_SIZE] = |
e0001a05 | 616 | { |
f7e16c2a MF |
617 | { |
618 | 0x36, 0x41, 0x00, /* entry sp, 32 */ | |
619 | 0x81, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
620 | 0xa1, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
621 | 0xb1, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
622 | 0xa0, 0x08, 0x00, /* jx a8 */ | |
623 | 0 /* unused */ | |
624 | }, | |
625 | { | |
626 | 0x81, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */ | |
627 | 0xa1, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */ | |
628 | 0xb1, 0x00, 0x00, /* l32r a11, [literal for reloc index] */ | |
629 | 0xa0, 0x08, 0x00, /* jx a8 */ | |
630 | 0 /* unused */ | |
631 | } | |
e0001a05 NC |
632 | }; |
633 | ||
28dbbc02 BW |
634 | /* The size of the thread control block. */ |
635 | #define TCB_SIZE 8 | |
636 | ||
637 | struct elf_xtensa_link_hash_entry | |
638 | { | |
639 | struct elf_link_hash_entry elf; | |
640 | ||
641 | bfd_signed_vma tlsfunc_refcount; | |
642 | ||
643 | #define GOT_UNKNOWN 0 | |
644 | #define GOT_NORMAL 1 | |
645 | #define GOT_TLS_GD 2 /* global or local dynamic */ | |
646 | #define GOT_TLS_IE 4 /* initial or local exec */ | |
647 | #define GOT_TLS_ANY (GOT_TLS_GD | GOT_TLS_IE) | |
648 | unsigned char tls_type; | |
649 | }; | |
650 | ||
651 | #define elf_xtensa_hash_entry(ent) ((struct elf_xtensa_link_hash_entry *)(ent)) | |
652 | ||
653 | struct elf_xtensa_obj_tdata | |
654 | { | |
655 | struct elf_obj_tdata root; | |
656 | ||
657 | /* tls_type for each local got entry. */ | |
658 | char *local_got_tls_type; | |
659 | ||
660 | bfd_signed_vma *local_tlsfunc_refcounts; | |
661 | }; | |
662 | ||
663 | #define elf_xtensa_tdata(abfd) \ | |
664 | ((struct elf_xtensa_obj_tdata *) (abfd)->tdata.any) | |
665 | ||
666 | #define elf_xtensa_local_got_tls_type(abfd) \ | |
667 | (elf_xtensa_tdata (abfd)->local_got_tls_type) | |
668 | ||
669 | #define elf_xtensa_local_tlsfunc_refcounts(abfd) \ | |
670 | (elf_xtensa_tdata (abfd)->local_tlsfunc_refcounts) | |
671 | ||
672 | #define is_xtensa_elf(bfd) \ | |
673 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
674 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 675 | && elf_object_id (bfd) == XTENSA_ELF_DATA) |
28dbbc02 | 676 | |
0a1b45a2 | 677 | static bool |
28dbbc02 BW |
678 | elf_xtensa_mkobject (bfd *abfd) |
679 | { | |
680 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_xtensa_obj_tdata), | |
4dfe6ac6 | 681 | XTENSA_ELF_DATA); |
28dbbc02 BW |
682 | } |
683 | ||
f0e6fdb2 BW |
684 | /* Xtensa ELF linker hash table. */ |
685 | ||
686 | struct elf_xtensa_link_hash_table | |
687 | { | |
688 | struct elf_link_hash_table elf; | |
689 | ||
690 | /* Short-cuts to get to dynamic linker sections. */ | |
f0e6fdb2 BW |
691 | asection *sgotloc; |
692 | asection *spltlittbl; | |
693 | ||
694 | /* Total count of PLT relocations seen during check_relocs. | |
695 | The actual PLT code must be split into multiple sections and all | |
696 | the sections have to be created before size_dynamic_sections, | |
697 | where we figure out the exact number of PLT entries that will be | |
698 | needed. It is OK if this count is an overestimate, e.g., some | |
699 | relocations may be removed by GC. */ | |
700 | int plt_reloc_count; | |
28dbbc02 BW |
701 | |
702 | struct elf_xtensa_link_hash_entry *tlsbase; | |
f0e6fdb2 BW |
703 | }; |
704 | ||
705 | /* Get the Xtensa ELF linker hash table from a link_info structure. */ | |
706 | ||
707 | #define elf_xtensa_hash_table(p) \ | |
0f55320b AM |
708 | ((is_elf_hash_table ((p)->hash) \ |
709 | && elf_hash_table_id (elf_hash_table (p)) == XTENSA_ELF_DATA) \ | |
710 | ? (struct elf_xtensa_link_hash_table *) (p)->hash : NULL) | |
f0e6fdb2 | 711 | |
28dbbc02 BW |
712 | /* Create an entry in an Xtensa ELF linker hash table. */ |
713 | ||
714 | static struct bfd_hash_entry * | |
715 | elf_xtensa_link_hash_newfunc (struct bfd_hash_entry *entry, | |
716 | struct bfd_hash_table *table, | |
717 | const char *string) | |
718 | { | |
719 | /* Allocate the structure if it has not already been allocated by a | |
720 | subclass. */ | |
721 | if (entry == NULL) | |
722 | { | |
723 | entry = bfd_hash_allocate (table, | |
724 | sizeof (struct elf_xtensa_link_hash_entry)); | |
725 | if (entry == NULL) | |
726 | return entry; | |
727 | } | |
728 | ||
729 | /* Call the allocation method of the superclass. */ | |
730 | entry = _bfd_elf_link_hash_newfunc (entry, table, string); | |
731 | if (entry != NULL) | |
732 | { | |
733 | struct elf_xtensa_link_hash_entry *eh = elf_xtensa_hash_entry (entry); | |
734 | eh->tlsfunc_refcount = 0; | |
735 | eh->tls_type = GOT_UNKNOWN; | |
736 | } | |
737 | ||
738 | return entry; | |
739 | } | |
740 | ||
f0e6fdb2 BW |
741 | /* Create an Xtensa ELF linker hash table. */ |
742 | ||
743 | static struct bfd_link_hash_table * | |
744 | elf_xtensa_link_hash_table_create (bfd *abfd) | |
745 | { | |
28dbbc02 | 746 | struct elf_link_hash_entry *tlsbase; |
f0e6fdb2 | 747 | struct elf_xtensa_link_hash_table *ret; |
986f0783 | 748 | size_t amt = sizeof (struct elf_xtensa_link_hash_table); |
f0e6fdb2 | 749 | |
7bf52ea2 | 750 | ret = bfd_zmalloc (amt); |
f0e6fdb2 BW |
751 | if (ret == NULL) |
752 | return NULL; | |
753 | ||
754 | if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, | |
28dbbc02 | 755 | elf_xtensa_link_hash_newfunc, |
4dfe6ac6 NC |
756 | sizeof (struct elf_xtensa_link_hash_entry), |
757 | XTENSA_ELF_DATA)) | |
f0e6fdb2 BW |
758 | { |
759 | free (ret); | |
760 | return NULL; | |
761 | } | |
762 | ||
28dbbc02 BW |
763 | /* Create a hash entry for "_TLS_MODULE_BASE_" to speed up checking |
764 | for it later. */ | |
765 | tlsbase = elf_link_hash_lookup (&ret->elf, "_TLS_MODULE_BASE_", | |
0a1b45a2 | 766 | true, false, false); |
28dbbc02 BW |
767 | tlsbase->root.type = bfd_link_hash_new; |
768 | tlsbase->root.u.undef.abfd = NULL; | |
769 | tlsbase->non_elf = 0; | |
0a1b45a2 | 770 | ret->elf.dt_pltgot_required = true; |
28dbbc02 BW |
771 | ret->tlsbase = elf_xtensa_hash_entry (tlsbase); |
772 | ret->tlsbase->tls_type = GOT_UNKNOWN; | |
773 | ||
f0e6fdb2 BW |
774 | return &ret->elf.root; |
775 | } | |
571b5725 | 776 | |
28dbbc02 BW |
777 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
778 | ||
779 | static void | |
780 | elf_xtensa_copy_indirect_symbol (struct bfd_link_info *info, | |
781 | struct elf_link_hash_entry *dir, | |
782 | struct elf_link_hash_entry *ind) | |
783 | { | |
784 | struct elf_xtensa_link_hash_entry *edir, *eind; | |
785 | ||
786 | edir = elf_xtensa_hash_entry (dir); | |
787 | eind = elf_xtensa_hash_entry (ind); | |
788 | ||
789 | if (ind->root.type == bfd_link_hash_indirect) | |
790 | { | |
791 | edir->tlsfunc_refcount += eind->tlsfunc_refcount; | |
792 | eind->tlsfunc_refcount = 0; | |
793 | ||
794 | if (dir->got.refcount <= 0) | |
795 | { | |
796 | edir->tls_type = eind->tls_type; | |
797 | eind->tls_type = GOT_UNKNOWN; | |
798 | } | |
799 | } | |
800 | ||
801 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
802 | } | |
803 | ||
0a1b45a2 | 804 | static inline bool |
4608f3d9 | 805 | elf_xtensa_dynamic_symbol_p (struct elf_link_hash_entry *h, |
7fa3d080 | 806 | struct bfd_link_info *info) |
571b5725 BW |
807 | { |
808 | /* Check if we should do dynamic things to this symbol. The | |
809 | "ignore_protected" argument need not be set, because Xtensa code | |
810 | does not require special handling of STV_PROTECTED to make function | |
811 | pointer comparisons work properly. The PLT addresses are never | |
812 | used for function pointers. */ | |
813 | ||
814 | return _bfd_elf_dynamic_symbol_p (h, info, 0); | |
815 | } | |
816 | ||
e0001a05 NC |
817 | \f |
818 | static int | |
7fa3d080 | 819 | property_table_compare (const void *ap, const void *bp) |
e0001a05 NC |
820 | { |
821 | const property_table_entry *a = (const property_table_entry *) ap; | |
822 | const property_table_entry *b = (const property_table_entry *) bp; | |
823 | ||
43cd72b9 BW |
824 | if (a->address == b->address) |
825 | { | |
43cd72b9 BW |
826 | if (a->size != b->size) |
827 | return (a->size - b->size); | |
828 | ||
829 | if ((a->flags & XTENSA_PROP_ALIGN) != (b->flags & XTENSA_PROP_ALIGN)) | |
830 | return ((b->flags & XTENSA_PROP_ALIGN) | |
831 | - (a->flags & XTENSA_PROP_ALIGN)); | |
832 | ||
833 | if ((a->flags & XTENSA_PROP_ALIGN) | |
834 | && (GET_XTENSA_PROP_ALIGNMENT (a->flags) | |
835 | != GET_XTENSA_PROP_ALIGNMENT (b->flags))) | |
836 | return (GET_XTENSA_PROP_ALIGNMENT (a->flags) | |
837 | - GET_XTENSA_PROP_ALIGNMENT (b->flags)); | |
68ffbac6 | 838 | |
43cd72b9 BW |
839 | if ((a->flags & XTENSA_PROP_UNREACHABLE) |
840 | != (b->flags & XTENSA_PROP_UNREACHABLE)) | |
841 | return ((b->flags & XTENSA_PROP_UNREACHABLE) | |
842 | - (a->flags & XTENSA_PROP_UNREACHABLE)); | |
843 | ||
844 | return (a->flags - b->flags); | |
845 | } | |
846 | ||
847 | return (a->address - b->address); | |
848 | } | |
849 | ||
850 | ||
851 | static int | |
7fa3d080 | 852 | property_table_matches (const void *ap, const void *bp) |
43cd72b9 BW |
853 | { |
854 | const property_table_entry *a = (const property_table_entry *) ap; | |
855 | const property_table_entry *b = (const property_table_entry *) bp; | |
856 | ||
857 | /* Check if one entry overlaps with the other. */ | |
e0001a05 NC |
858 | if ((b->address >= a->address && b->address < (a->address + a->size)) |
859 | || (a->address >= b->address && a->address < (b->address + b->size))) | |
860 | return 0; | |
861 | ||
862 | return (a->address - b->address); | |
863 | } | |
864 | ||
865 | ||
43cd72b9 BW |
866 | /* Get the literal table or property table entries for the given |
867 | section. Sets TABLE_P and returns the number of entries. On | |
868 | error, returns a negative value. */ | |
e0001a05 | 869 | |
4b8e28c7 | 870 | int |
7fa3d080 BW |
871 | xtensa_read_table_entries (bfd *abfd, |
872 | asection *section, | |
873 | property_table_entry **table_p, | |
874 | const char *sec_name, | |
0a1b45a2 | 875 | bool output_addr) |
e0001a05 NC |
876 | { |
877 | asection *table_section; | |
e0001a05 NC |
878 | bfd_size_type table_size = 0; |
879 | bfd_byte *table_data; | |
880 | property_table_entry *blocks; | |
e4115460 | 881 | int blk, block_count; |
e0001a05 | 882 | bfd_size_type num_records; |
bcc2cc8e BW |
883 | Elf_Internal_Rela *internal_relocs, *irel, *rel_end; |
884 | bfd_vma section_addr, off; | |
43cd72b9 | 885 | flagword predef_flags; |
bcc2cc8e | 886 | bfd_size_type table_entry_size, section_limit; |
43cd72b9 BW |
887 | |
888 | if (!section | |
889 | || !(section->flags & SEC_ALLOC) | |
890 | || (section->flags & SEC_DEBUGGING)) | |
891 | { | |
892 | *table_p = NULL; | |
893 | return 0; | |
894 | } | |
e0001a05 | 895 | |
74869ac7 | 896 | table_section = xtensa_get_property_section (section, sec_name); |
43cd72b9 | 897 | if (table_section) |
eea6121a | 898 | table_size = table_section->size; |
43cd72b9 | 899 | |
68ffbac6 | 900 | if (table_size == 0) |
e0001a05 NC |
901 | { |
902 | *table_p = NULL; | |
903 | return 0; | |
904 | } | |
905 | ||
43cd72b9 BW |
906 | predef_flags = xtensa_get_property_predef_flags (table_section); |
907 | table_entry_size = 12; | |
908 | if (predef_flags) | |
909 | table_entry_size -= 4; | |
910 | ||
911 | num_records = table_size / table_entry_size; | |
0a1b45a2 | 912 | table_data = retrieve_contents (abfd, table_section, true); |
e0001a05 NC |
913 | blocks = (property_table_entry *) |
914 | bfd_malloc (num_records * sizeof (property_table_entry)); | |
915 | block_count = 0; | |
43cd72b9 BW |
916 | |
917 | if (output_addr) | |
918 | section_addr = section->output_section->vma + section->output_offset; | |
919 | else | |
920 | section_addr = section->vma; | |
3ba3bc8c | 921 | |
0a1b45a2 | 922 | internal_relocs = retrieve_internal_relocs (abfd, table_section, true); |
3ba3bc8c | 923 | if (internal_relocs && !table_section->reloc_done) |
e0001a05 | 924 | { |
bcc2cc8e BW |
925 | qsort (internal_relocs, table_section->reloc_count, |
926 | sizeof (Elf_Internal_Rela), internal_reloc_compare); | |
927 | irel = internal_relocs; | |
928 | } | |
929 | else | |
930 | irel = NULL; | |
931 | ||
932 | section_limit = bfd_get_section_limit (abfd, section); | |
933 | rel_end = internal_relocs + table_section->reloc_count; | |
934 | ||
68ffbac6 | 935 | for (off = 0; off < table_size; off += table_entry_size) |
bcc2cc8e BW |
936 | { |
937 | bfd_vma address = bfd_get_32 (abfd, table_data + off); | |
938 | ||
939 | /* Skip any relocations before the current offset. This should help | |
940 | avoid confusion caused by unexpected relocations for the preceding | |
941 | table entry. */ | |
942 | while (irel && | |
943 | (irel->r_offset < off | |
944 | || (irel->r_offset == off | |
945 | && ELF32_R_TYPE (irel->r_info) == R_XTENSA_NONE))) | |
946 | { | |
947 | irel += 1; | |
948 | if (irel >= rel_end) | |
949 | irel = 0; | |
950 | } | |
e0001a05 | 951 | |
bcc2cc8e | 952 | if (irel && irel->r_offset == off) |
e0001a05 | 953 | { |
bcc2cc8e BW |
954 | bfd_vma sym_off; |
955 | unsigned long r_symndx = ELF32_R_SYM (irel->r_info); | |
956 | BFD_ASSERT (ELF32_R_TYPE (irel->r_info) == R_XTENSA_32); | |
e0001a05 | 957 | |
bcc2cc8e | 958 | if (get_elf_r_symndx_section (abfd, r_symndx) != section) |
e0001a05 NC |
959 | continue; |
960 | ||
bcc2cc8e BW |
961 | sym_off = get_elf_r_symndx_offset (abfd, r_symndx); |
962 | BFD_ASSERT (sym_off == 0); | |
963 | address += (section_addr + sym_off + irel->r_addend); | |
e0001a05 | 964 | } |
bcc2cc8e | 965 | else |
e0001a05 | 966 | { |
bcc2cc8e BW |
967 | if (address < section_addr |
968 | || address >= section_addr + section_limit) | |
969 | continue; | |
e0001a05 | 970 | } |
bcc2cc8e BW |
971 | |
972 | blocks[block_count].address = address; | |
973 | blocks[block_count].size = bfd_get_32 (abfd, table_data + off + 4); | |
974 | if (predef_flags) | |
975 | blocks[block_count].flags = predef_flags; | |
976 | else | |
977 | blocks[block_count].flags = bfd_get_32 (abfd, table_data + off + 8); | |
978 | block_count++; | |
e0001a05 NC |
979 | } |
980 | ||
981 | release_contents (table_section, table_data); | |
982 | release_internal_relocs (table_section, internal_relocs); | |
983 | ||
43cd72b9 | 984 | if (block_count > 0) |
e0001a05 NC |
985 | { |
986 | /* Now sort them into address order for easy reference. */ | |
987 | qsort (blocks, block_count, sizeof (property_table_entry), | |
988 | property_table_compare); | |
e4115460 BW |
989 | |
990 | /* Check that the table contents are valid. Problems may occur, | |
07d6d2b8 | 991 | for example, if an unrelocated object file is stripped. */ |
e4115460 BW |
992 | for (blk = 1; blk < block_count; blk++) |
993 | { | |
994 | /* The only circumstance where two entries may legitimately | |
995 | have the same address is when one of them is a zero-size | |
996 | placeholder to mark a place where fill can be inserted. | |
997 | The zero-size entry should come first. */ | |
998 | if (blocks[blk - 1].address == blocks[blk].address && | |
999 | blocks[blk - 1].size != 0) | |
1000 | { | |
695344c0 | 1001 | /* xgettext:c-format */ |
871b3ab2 | 1002 | _bfd_error_handler (_("%pB(%pA): invalid property table"), |
4eca0228 | 1003 | abfd, section); |
e4115460 BW |
1004 | bfd_set_error (bfd_error_bad_value); |
1005 | free (blocks); | |
1006 | return -1; | |
1007 | } | |
1008 | } | |
e0001a05 | 1009 | } |
43cd72b9 | 1010 | |
e0001a05 NC |
1011 | *table_p = blocks; |
1012 | return block_count; | |
1013 | } | |
1014 | ||
1015 | ||
7fa3d080 BW |
1016 | static property_table_entry * |
1017 | elf_xtensa_find_property_entry (property_table_entry *property_table, | |
1018 | int property_table_size, | |
1019 | bfd_vma addr) | |
e0001a05 NC |
1020 | { |
1021 | property_table_entry entry; | |
43cd72b9 | 1022 | property_table_entry *rv; |
e0001a05 | 1023 | |
43cd72b9 BW |
1024 | if (property_table_size == 0) |
1025 | return NULL; | |
e0001a05 NC |
1026 | |
1027 | entry.address = addr; | |
1028 | entry.size = 1; | |
43cd72b9 | 1029 | entry.flags = 0; |
e0001a05 | 1030 | |
43cd72b9 BW |
1031 | rv = bsearch (&entry, property_table, property_table_size, |
1032 | sizeof (property_table_entry), property_table_matches); | |
1033 | return rv; | |
1034 | } | |
1035 | ||
1036 | ||
0a1b45a2 | 1037 | static bool |
7fa3d080 BW |
1038 | elf_xtensa_in_literal_pool (property_table_entry *lit_table, |
1039 | int lit_table_size, | |
1040 | bfd_vma addr) | |
43cd72b9 BW |
1041 | { |
1042 | if (elf_xtensa_find_property_entry (lit_table, lit_table_size, addr)) | |
0a1b45a2 | 1043 | return true; |
e0001a05 | 1044 | |
0a1b45a2 | 1045 | return false; |
e0001a05 NC |
1046 | } |
1047 | ||
1048 | \f | |
1049 | /* Look through the relocs for a section during the first phase, and | |
1050 | calculate needed space in the dynamic reloc sections. */ | |
1051 | ||
0a1b45a2 | 1052 | static bool |
7fa3d080 BW |
1053 | elf_xtensa_check_relocs (bfd *abfd, |
1054 | struct bfd_link_info *info, | |
1055 | asection *sec, | |
1056 | const Elf_Internal_Rela *relocs) | |
e0001a05 | 1057 | { |
f0e6fdb2 | 1058 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
1059 | Elf_Internal_Shdr *symtab_hdr; |
1060 | struct elf_link_hash_entry **sym_hashes; | |
1061 | const Elf_Internal_Rela *rel; | |
1062 | const Elf_Internal_Rela *rel_end; | |
e0001a05 | 1063 | |
c4b126b8 | 1064 | if (bfd_link_relocatable (info)) |
0a1b45a2 | 1065 | return true; |
e0001a05 | 1066 | |
28dbbc02 BW |
1067 | BFD_ASSERT (is_xtensa_elf (abfd)); |
1068 | ||
f0e6fdb2 | 1069 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 | 1070 | if (htab == NULL) |
0a1b45a2 | 1071 | return false; |
4dfe6ac6 | 1072 | |
e0001a05 NC |
1073 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
1074 | sym_hashes = elf_sym_hashes (abfd); | |
1075 | ||
e0001a05 NC |
1076 | rel_end = relocs + sec->reloc_count; |
1077 | for (rel = relocs; rel < rel_end; rel++) | |
1078 | { | |
1079 | unsigned int r_type; | |
d42c267e | 1080 | unsigned r_symndx; |
28dbbc02 BW |
1081 | struct elf_link_hash_entry *h = NULL; |
1082 | struct elf_xtensa_link_hash_entry *eh; | |
1083 | int tls_type, old_tls_type; | |
0a1b45a2 AM |
1084 | bool is_got = false; |
1085 | bool is_plt = false; | |
1086 | bool is_tlsfunc = false; | |
e0001a05 NC |
1087 | |
1088 | r_symndx = ELF32_R_SYM (rel->r_info); | |
1089 | r_type = ELF32_R_TYPE (rel->r_info); | |
1090 | ||
1091 | if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr)) | |
1092 | { | |
695344c0 | 1093 | /* xgettext:c-format */ |
871b3ab2 | 1094 | _bfd_error_handler (_("%pB: bad symbol index: %d"), |
4eca0228 | 1095 | abfd, r_symndx); |
0a1b45a2 | 1096 | return false; |
e0001a05 NC |
1097 | } |
1098 | ||
28dbbc02 | 1099 | if (r_symndx >= symtab_hdr->sh_info) |
e0001a05 NC |
1100 | { |
1101 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
1102 | while (h->root.type == bfd_link_hash_indirect | |
1103 | || h->root.type == bfd_link_hash_warning) | |
1104 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
1105 | } | |
28dbbc02 | 1106 | eh = elf_xtensa_hash_entry (h); |
e0001a05 NC |
1107 | |
1108 | switch (r_type) | |
1109 | { | |
28dbbc02 | 1110 | case R_XTENSA_TLSDESC_FN: |
0e1862bb | 1111 | if (bfd_link_pic (info)) |
28dbbc02 BW |
1112 | { |
1113 | tls_type = GOT_TLS_GD; | |
0a1b45a2 AM |
1114 | is_got = true; |
1115 | is_tlsfunc = true; | |
28dbbc02 BW |
1116 | } |
1117 | else | |
1118 | tls_type = GOT_TLS_IE; | |
1119 | break; | |
e0001a05 | 1120 | |
28dbbc02 | 1121 | case R_XTENSA_TLSDESC_ARG: |
0e1862bb | 1122 | if (bfd_link_pic (info)) |
e0001a05 | 1123 | { |
28dbbc02 | 1124 | tls_type = GOT_TLS_GD; |
0a1b45a2 | 1125 | is_got = true; |
28dbbc02 BW |
1126 | } |
1127 | else | |
1128 | { | |
1129 | tls_type = GOT_TLS_IE; | |
1130 | if (h && elf_xtensa_hash_entry (h) != htab->tlsbase) | |
0a1b45a2 | 1131 | is_got = true; |
e0001a05 NC |
1132 | } |
1133 | break; | |
1134 | ||
28dbbc02 | 1135 | case R_XTENSA_TLS_DTPOFF: |
0e1862bb | 1136 | if (bfd_link_pic (info)) |
28dbbc02 BW |
1137 | tls_type = GOT_TLS_GD; |
1138 | else | |
1139 | tls_type = GOT_TLS_IE; | |
1140 | break; | |
1141 | ||
1142 | case R_XTENSA_TLS_TPOFF: | |
1143 | tls_type = GOT_TLS_IE; | |
0e1862bb | 1144 | if (bfd_link_pic (info)) |
28dbbc02 | 1145 | info->flags |= DF_STATIC_TLS; |
0e1862bb | 1146 | if (bfd_link_pic (info) || h) |
0a1b45a2 | 1147 | is_got = true; |
28dbbc02 BW |
1148 | break; |
1149 | ||
1150 | case R_XTENSA_32: | |
1151 | tls_type = GOT_NORMAL; | |
0a1b45a2 | 1152 | is_got = true; |
28dbbc02 BW |
1153 | break; |
1154 | ||
e0001a05 | 1155 | case R_XTENSA_PLT: |
28dbbc02 | 1156 | tls_type = GOT_NORMAL; |
0a1b45a2 | 1157 | is_plt = true; |
28dbbc02 | 1158 | break; |
e0001a05 | 1159 | |
28dbbc02 BW |
1160 | case R_XTENSA_GNU_VTINHERIT: |
1161 | /* This relocation describes the C++ object vtable hierarchy. | |
1162 | Reconstruct it for later use during GC. */ | |
1163 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
0a1b45a2 | 1164 | return false; |
28dbbc02 BW |
1165 | continue; |
1166 | ||
1167 | case R_XTENSA_GNU_VTENTRY: | |
1168 | /* This relocation describes which C++ vtable entries are actually | |
1169 | used. Record for later use during GC. */ | |
a0ea3a14 | 1170 | if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) |
0a1b45a2 | 1171 | return false; |
28dbbc02 BW |
1172 | continue; |
1173 | ||
1174 | default: | |
1175 | /* Nothing to do for any other relocations. */ | |
1176 | continue; | |
1177 | } | |
1178 | ||
1179 | if (h) | |
1180 | { | |
1181 | if (is_plt) | |
e0001a05 | 1182 | { |
b45329f9 BW |
1183 | if (h->plt.refcount <= 0) |
1184 | { | |
1185 | h->needs_plt = 1; | |
1186 | h->plt.refcount = 1; | |
1187 | } | |
1188 | else | |
1189 | h->plt.refcount += 1; | |
e0001a05 NC |
1190 | |
1191 | /* Keep track of the total PLT relocation count even if we | |
1192 | don't yet know whether the dynamic sections will be | |
1193 | created. */ | |
f0e6fdb2 | 1194 | htab->plt_reloc_count += 1; |
e0001a05 NC |
1195 | |
1196 | if (elf_hash_table (info)->dynamic_sections_created) | |
1197 | { | |
f0e6fdb2 | 1198 | if (! add_extra_plt_sections (info, htab->plt_reloc_count)) |
0a1b45a2 | 1199 | return false; |
e0001a05 NC |
1200 | } |
1201 | } | |
28dbbc02 | 1202 | else if (is_got) |
b45329f9 BW |
1203 | { |
1204 | if (h->got.refcount <= 0) | |
1205 | h->got.refcount = 1; | |
1206 | else | |
1207 | h->got.refcount += 1; | |
1208 | } | |
28dbbc02 BW |
1209 | |
1210 | if (is_tlsfunc) | |
1211 | eh->tlsfunc_refcount += 1; | |
e0001a05 | 1212 | |
28dbbc02 BW |
1213 | old_tls_type = eh->tls_type; |
1214 | } | |
1215 | else | |
1216 | { | |
1217 | /* Allocate storage the first time. */ | |
1218 | if (elf_local_got_refcounts (abfd) == NULL) | |
e0001a05 | 1219 | { |
28dbbc02 BW |
1220 | bfd_size_type size = symtab_hdr->sh_info; |
1221 | void *mem; | |
e0001a05 | 1222 | |
28dbbc02 BW |
1223 | mem = bfd_zalloc (abfd, size * sizeof (bfd_signed_vma)); |
1224 | if (mem == NULL) | |
0a1b45a2 | 1225 | return false; |
28dbbc02 | 1226 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) mem; |
e0001a05 | 1227 | |
28dbbc02 BW |
1228 | mem = bfd_zalloc (abfd, size); |
1229 | if (mem == NULL) | |
0a1b45a2 | 1230 | return false; |
28dbbc02 BW |
1231 | elf_xtensa_local_got_tls_type (abfd) = (char *) mem; |
1232 | ||
1233 | mem = bfd_zalloc (abfd, size * sizeof (bfd_signed_vma)); | |
1234 | if (mem == NULL) | |
0a1b45a2 | 1235 | return false; |
28dbbc02 BW |
1236 | elf_xtensa_local_tlsfunc_refcounts (abfd) |
1237 | = (bfd_signed_vma *) mem; | |
e0001a05 | 1238 | } |
e0001a05 | 1239 | |
28dbbc02 BW |
1240 | /* This is a global offset table entry for a local symbol. */ |
1241 | if (is_got || is_plt) | |
1242 | elf_local_got_refcounts (abfd) [r_symndx] += 1; | |
e0001a05 | 1243 | |
28dbbc02 BW |
1244 | if (is_tlsfunc) |
1245 | elf_xtensa_local_tlsfunc_refcounts (abfd) [r_symndx] += 1; | |
e0001a05 | 1246 | |
28dbbc02 BW |
1247 | old_tls_type = elf_xtensa_local_got_tls_type (abfd) [r_symndx]; |
1248 | } | |
1249 | ||
1250 | if ((old_tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_IE)) | |
1251 | tls_type |= old_tls_type; | |
1252 | /* If a TLS symbol is accessed using IE at least once, | |
1253 | there is no point to use a dynamic model for it. */ | |
1254 | else if (old_tls_type != tls_type && old_tls_type != GOT_UNKNOWN | |
1255 | && ((old_tls_type & GOT_TLS_GD) == 0 | |
1256 | || (tls_type & GOT_TLS_IE) == 0)) | |
1257 | { | |
1258 | if ((old_tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GD)) | |
1259 | tls_type = old_tls_type; | |
1260 | else if ((old_tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_GD)) | |
1261 | tls_type |= old_tls_type; | |
1262 | else | |
1263 | { | |
4eca0228 | 1264 | _bfd_error_handler |
695344c0 | 1265 | /* xgettext:c-format */ |
871b3ab2 | 1266 | (_("%pB: `%s' accessed both as normal and thread local symbol"), |
28dbbc02 BW |
1267 | abfd, |
1268 | h ? h->root.root.string : "<local>"); | |
0a1b45a2 | 1269 | return false; |
28dbbc02 BW |
1270 | } |
1271 | } | |
1272 | ||
1273 | if (old_tls_type != tls_type) | |
1274 | { | |
1275 | if (eh) | |
1276 | eh->tls_type = tls_type; | |
1277 | else | |
1278 | elf_xtensa_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
e0001a05 NC |
1279 | } |
1280 | } | |
1281 | ||
0a1b45a2 | 1282 | return true; |
e0001a05 NC |
1283 | } |
1284 | ||
1285 | ||
95147441 BW |
1286 | static void |
1287 | elf_xtensa_make_sym_local (struct bfd_link_info *info, | |
07d6d2b8 | 1288 | struct elf_link_hash_entry *h) |
95147441 | 1289 | { |
0e1862bb | 1290 | if (bfd_link_pic (info)) |
95147441 BW |
1291 | { |
1292 | if (h->plt.refcount > 0) | |
07d6d2b8 | 1293 | { |
95147441 BW |
1294 | /* For shared objects, there's no need for PLT entries for local |
1295 | symbols (use RELATIVE relocs instead of JMP_SLOT relocs). */ | |
07d6d2b8 AM |
1296 | if (h->got.refcount < 0) |
1297 | h->got.refcount = 0; | |
1298 | h->got.refcount += h->plt.refcount; | |
1299 | h->plt.refcount = 0; | |
1300 | } | |
95147441 BW |
1301 | } |
1302 | else | |
1303 | { | |
1304 | /* Don't need any dynamic relocations at all. */ | |
1305 | h->plt.refcount = 0; | |
1306 | h->got.refcount = 0; | |
1307 | } | |
1308 | } | |
1309 | ||
1310 | ||
1311 | static void | |
1312 | elf_xtensa_hide_symbol (struct bfd_link_info *info, | |
07d6d2b8 | 1313 | struct elf_link_hash_entry *h, |
0a1b45a2 | 1314 | bool force_local) |
95147441 BW |
1315 | { |
1316 | /* For a shared link, move the plt refcount to the got refcount to leave | |
1317 | space for RELATIVE relocs. */ | |
1318 | elf_xtensa_make_sym_local (info, h); | |
1319 | ||
1320 | _bfd_elf_link_hash_hide_symbol (info, h, force_local); | |
1321 | } | |
1322 | ||
1323 | ||
e0001a05 NC |
1324 | /* Return the section that should be marked against GC for a given |
1325 | relocation. */ | |
1326 | ||
1327 | static asection * | |
7fa3d080 | 1328 | elf_xtensa_gc_mark_hook (asection *sec, |
07adf181 | 1329 | struct bfd_link_info *info, |
7fa3d080 BW |
1330 | Elf_Internal_Rela *rel, |
1331 | struct elf_link_hash_entry *h, | |
1332 | Elf_Internal_Sym *sym) | |
e0001a05 | 1333 | { |
e1e5c0b5 BW |
1334 | /* Property sections are marked "KEEP" in the linker scripts, but they |
1335 | should not cause other sections to be marked. (This approach relies | |
1336 | on elf_xtensa_discard_info to remove property table entries that | |
1337 | describe discarded sections. Alternatively, it might be more | |
1338 | efficient to avoid using "KEEP" in the linker scripts and instead use | |
1339 | the gc_mark_extra_sections hook to mark only the property sections | |
1340 | that describe marked sections. That alternative does not work well | |
1341 | with the current property table sections, which do not correspond | |
1342 | one-to-one with the sections they describe, but that should be fixed | |
1343 | someday.) */ | |
1344 | if (xtensa_is_property_section (sec)) | |
1345 | return NULL; | |
1346 | ||
07adf181 AM |
1347 | if (h != NULL) |
1348 | switch (ELF32_R_TYPE (rel->r_info)) | |
1349 | { | |
1350 | case R_XTENSA_GNU_VTINHERIT: | |
1351 | case R_XTENSA_GNU_VTENTRY: | |
1352 | return NULL; | |
1353 | } | |
1354 | ||
1355 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); | |
e0001a05 NC |
1356 | } |
1357 | ||
7fa3d080 | 1358 | |
e0001a05 NC |
1359 | /* Create all the dynamic sections. */ |
1360 | ||
0a1b45a2 | 1361 | static bool |
7fa3d080 | 1362 | elf_xtensa_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
e0001a05 | 1363 | { |
f0e6fdb2 | 1364 | struct elf_xtensa_link_hash_table *htab; |
e901de89 | 1365 | flagword flags, noalloc_flags; |
f0e6fdb2 BW |
1366 | |
1367 | htab = elf_xtensa_hash_table (info); | |
4dfe6ac6 | 1368 | if (htab == NULL) |
0a1b45a2 | 1369 | return false; |
e0001a05 NC |
1370 | |
1371 | /* First do all the standard stuff. */ | |
1372 | if (! _bfd_elf_create_dynamic_sections (dynobj, info)) | |
0a1b45a2 | 1373 | return false; |
e0001a05 NC |
1374 | |
1375 | /* Create any extra PLT sections in case check_relocs has already | |
1376 | been called on all the non-dynamic input files. */ | |
f0e6fdb2 | 1377 | if (! add_extra_plt_sections (info, htab->plt_reloc_count)) |
0a1b45a2 | 1378 | return false; |
e0001a05 | 1379 | |
e901de89 BW |
1380 | noalloc_flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY |
1381 | | SEC_LINKER_CREATED | SEC_READONLY); | |
1382 | flags = noalloc_flags | SEC_ALLOC | SEC_LOAD; | |
e0001a05 NC |
1383 | |
1384 | /* Mark the ".got.plt" section READONLY. */ | |
ce558b89 | 1385 | if (htab->elf.sgotplt == NULL |
fd361982 | 1386 | || !bfd_set_section_flags (htab->elf.sgotplt, flags)) |
0a1b45a2 | 1387 | return false; |
e0001a05 | 1388 | |
e901de89 | 1389 | /* Create ".got.loc" (literal tables for use by dynamic linker). */ |
3d4d4302 AM |
1390 | htab->sgotloc = bfd_make_section_anyway_with_flags (dynobj, ".got.loc", |
1391 | flags); | |
f0e6fdb2 | 1392 | if (htab->sgotloc == NULL |
fd361982 | 1393 | || !bfd_set_section_alignment (htab->sgotloc, 2)) |
0a1b45a2 | 1394 | return false; |
e901de89 | 1395 | |
e0001a05 | 1396 | /* Create ".xt.lit.plt" (literal table for ".got.plt*"). */ |
3d4d4302 AM |
1397 | htab->spltlittbl = bfd_make_section_anyway_with_flags (dynobj, ".xt.lit.plt", |
1398 | noalloc_flags); | |
f0e6fdb2 | 1399 | if (htab->spltlittbl == NULL |
fd361982 | 1400 | || !bfd_set_section_alignment (htab->spltlittbl, 2)) |
0a1b45a2 | 1401 | return false; |
e0001a05 | 1402 | |
0a1b45a2 | 1403 | return true; |
e0001a05 NC |
1404 | } |
1405 | ||
1406 | ||
0a1b45a2 | 1407 | static bool |
f0e6fdb2 | 1408 | add_extra_plt_sections (struct bfd_link_info *info, int count) |
e0001a05 | 1409 | { |
f0e6fdb2 | 1410 | bfd *dynobj = elf_hash_table (info)->dynobj; |
e0001a05 NC |
1411 | int chunk; |
1412 | ||
1413 | /* Iterate over all chunks except 0 which uses the standard ".plt" and | |
1414 | ".got.plt" sections. */ | |
1415 | for (chunk = count / PLT_ENTRIES_PER_CHUNK; chunk > 0; chunk--) | |
1416 | { | |
1417 | char *sname; | |
1418 | flagword flags; | |
1419 | asection *s; | |
1420 | ||
1421 | /* Stop when we find a section has already been created. */ | |
f0e6fdb2 | 1422 | if (elf_xtensa_get_plt_section (info, chunk)) |
e0001a05 NC |
1423 | break; |
1424 | ||
1425 | flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | |
1426 | | SEC_LINKER_CREATED | SEC_READONLY); | |
1427 | ||
1428 | sname = (char *) bfd_malloc (10); | |
1429 | sprintf (sname, ".plt.%u", chunk); | |
3d4d4302 | 1430 | s = bfd_make_section_anyway_with_flags (dynobj, sname, flags | SEC_CODE); |
e0001a05 | 1431 | if (s == NULL |
fd361982 | 1432 | || !bfd_set_section_alignment (s, 2)) |
0a1b45a2 | 1433 | return false; |
e0001a05 NC |
1434 | |
1435 | sname = (char *) bfd_malloc (14); | |
1436 | sprintf (sname, ".got.plt.%u", chunk); | |
3d4d4302 | 1437 | s = bfd_make_section_anyway_with_flags (dynobj, sname, flags); |
e0001a05 | 1438 | if (s == NULL |
fd361982 | 1439 | || !bfd_set_section_alignment (s, 2)) |
0a1b45a2 | 1440 | return false; |
e0001a05 NC |
1441 | } |
1442 | ||
0a1b45a2 | 1443 | return true; |
e0001a05 NC |
1444 | } |
1445 | ||
1446 | ||
1447 | /* Adjust a symbol defined by a dynamic object and referenced by a | |
1448 | regular object. The current definition is in some section of the | |
1449 | dynamic object, but we're not including those sections. We have to | |
1450 | change the definition to something the rest of the link can | |
1451 | understand. */ | |
1452 | ||
0a1b45a2 | 1453 | static bool |
7fa3d080 BW |
1454 | elf_xtensa_adjust_dynamic_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED, |
1455 | struct elf_link_hash_entry *h) | |
e0001a05 NC |
1456 | { |
1457 | /* If this is a weak symbol, and there is a real definition, the | |
1458 | processor independent code will have arranged for us to see the | |
1459 | real definition first, and we can just use the same value. */ | |
60d67dc8 | 1460 | if (h->is_weakalias) |
e0001a05 | 1461 | { |
60d67dc8 AM |
1462 | struct elf_link_hash_entry *def = weakdef (h); |
1463 | BFD_ASSERT (def->root.type == bfd_link_hash_defined); | |
1464 | h->root.u.def.section = def->root.u.def.section; | |
1465 | h->root.u.def.value = def->root.u.def.value; | |
0a1b45a2 | 1466 | return true; |
e0001a05 NC |
1467 | } |
1468 | ||
1469 | /* This is a reference to a symbol defined by a dynamic object. The | |
1470 | reference must go through the GOT, so there's no need for COPY relocs, | |
1471 | .dynbss, etc. */ | |
1472 | ||
0a1b45a2 | 1473 | return true; |
e0001a05 NC |
1474 | } |
1475 | ||
1476 | ||
0a1b45a2 | 1477 | static bool |
f1ab2340 | 1478 | elf_xtensa_allocate_dynrelocs (struct elf_link_hash_entry *h, void *arg) |
e0001a05 | 1479 | { |
f1ab2340 BW |
1480 | struct bfd_link_info *info; |
1481 | struct elf_xtensa_link_hash_table *htab; | |
28dbbc02 | 1482 | struct elf_xtensa_link_hash_entry *eh = elf_xtensa_hash_entry (h); |
e0001a05 | 1483 | |
f1ab2340 | 1484 | if (h->root.type == bfd_link_hash_indirect) |
0a1b45a2 | 1485 | return true; |
e0001a05 | 1486 | |
f1ab2340 BW |
1487 | info = (struct bfd_link_info *) arg; |
1488 | htab = elf_xtensa_hash_table (info); | |
4dfe6ac6 | 1489 | if (htab == NULL) |
0a1b45a2 | 1490 | return false; |
e0001a05 | 1491 | |
28dbbc02 BW |
1492 | /* If we saw any use of an IE model for this symbol, we can then optimize |
1493 | away GOT entries for any TLSDESC_FN relocs. */ | |
1494 | if ((eh->tls_type & GOT_TLS_IE) != 0) | |
1495 | { | |
1496 | BFD_ASSERT (h->got.refcount >= eh->tlsfunc_refcount); | |
1497 | h->got.refcount -= eh->tlsfunc_refcount; | |
1498 | } | |
e0001a05 | 1499 | |
28dbbc02 | 1500 | if (! elf_xtensa_dynamic_symbol_p (h, info)) |
95147441 | 1501 | elf_xtensa_make_sym_local (info, h); |
e0001a05 | 1502 | |
c451bb34 MF |
1503 | if (! elf_xtensa_dynamic_symbol_p (h, info) |
1504 | && h->root.type == bfd_link_hash_undefweak) | |
0a1b45a2 | 1505 | return true; |
c451bb34 | 1506 | |
f1ab2340 | 1507 | if (h->plt.refcount > 0) |
ce558b89 | 1508 | htab->elf.srelplt->size += (h->plt.refcount * sizeof (Elf32_External_Rela)); |
e0001a05 NC |
1509 | |
1510 | if (h->got.refcount > 0) | |
ce558b89 | 1511 | htab->elf.srelgot->size += (h->got.refcount * sizeof (Elf32_External_Rela)); |
e0001a05 | 1512 | |
0a1b45a2 | 1513 | return true; |
e0001a05 NC |
1514 | } |
1515 | ||
1516 | ||
1517 | static void | |
f0e6fdb2 | 1518 | elf_xtensa_allocate_local_got_size (struct bfd_link_info *info) |
e0001a05 | 1519 | { |
f0e6fdb2 | 1520 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
1521 | bfd *i; |
1522 | ||
f0e6fdb2 | 1523 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
1524 | if (htab == NULL) |
1525 | return; | |
f0e6fdb2 | 1526 | |
c72f2fb2 | 1527 | for (i = info->input_bfds; i; i = i->link.next) |
e0001a05 NC |
1528 | { |
1529 | bfd_signed_vma *local_got_refcounts; | |
1530 | bfd_size_type j, cnt; | |
1531 | Elf_Internal_Shdr *symtab_hdr; | |
1532 | ||
1533 | local_got_refcounts = elf_local_got_refcounts (i); | |
1534 | if (!local_got_refcounts) | |
1535 | continue; | |
1536 | ||
1537 | symtab_hdr = &elf_tdata (i)->symtab_hdr; | |
1538 | cnt = symtab_hdr->sh_info; | |
1539 | ||
1540 | for (j = 0; j < cnt; ++j) | |
1541 | { | |
28dbbc02 BW |
1542 | /* If we saw any use of an IE model for this symbol, we can |
1543 | then optimize away GOT entries for any TLSDESC_FN relocs. */ | |
1544 | if ((elf_xtensa_local_got_tls_type (i) [j] & GOT_TLS_IE) != 0) | |
1545 | { | |
1546 | bfd_signed_vma *tlsfunc_refcount | |
1547 | = &elf_xtensa_local_tlsfunc_refcounts (i) [j]; | |
1548 | BFD_ASSERT (local_got_refcounts[j] >= *tlsfunc_refcount); | |
1549 | local_got_refcounts[j] -= *tlsfunc_refcount; | |
1550 | } | |
1551 | ||
e0001a05 | 1552 | if (local_got_refcounts[j] > 0) |
ce558b89 AM |
1553 | htab->elf.srelgot->size += (local_got_refcounts[j] |
1554 | * sizeof (Elf32_External_Rela)); | |
e0001a05 NC |
1555 | } |
1556 | } | |
1557 | } | |
1558 | ||
1559 | ||
1560 | /* Set the sizes of the dynamic sections. */ | |
1561 | ||
0a1b45a2 | 1562 | static bool |
7fa3d080 BW |
1563 | elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, |
1564 | struct bfd_link_info *info) | |
e0001a05 | 1565 | { |
f0e6fdb2 | 1566 | struct elf_xtensa_link_hash_table *htab; |
e901de89 BW |
1567 | bfd *dynobj, *abfd; |
1568 | asection *s, *srelplt, *splt, *sgotplt, *srelgot, *spltlittbl, *sgotloc; | |
0a1b45a2 | 1569 | bool relplt, relgot; |
e0001a05 NC |
1570 | int plt_entries, plt_chunks, chunk; |
1571 | ||
1572 | plt_entries = 0; | |
1573 | plt_chunks = 0; | |
e0001a05 | 1574 | |
f0e6fdb2 | 1575 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 | 1576 | if (htab == NULL) |
0a1b45a2 | 1577 | return false; |
4dfe6ac6 | 1578 | |
e0001a05 NC |
1579 | dynobj = elf_hash_table (info)->dynobj; |
1580 | if (dynobj == NULL) | |
1581 | abort (); | |
ce558b89 AM |
1582 | srelgot = htab->elf.srelgot; |
1583 | srelplt = htab->elf.srelplt; | |
e0001a05 NC |
1584 | |
1585 | if (elf_hash_table (info)->dynamic_sections_created) | |
1586 | { | |
ce558b89 AM |
1587 | BFD_ASSERT (htab->elf.srelgot != NULL |
1588 | && htab->elf.srelplt != NULL | |
1589 | && htab->elf.sgot != NULL | |
f0e6fdb2 BW |
1590 | && htab->spltlittbl != NULL |
1591 | && htab->sgotloc != NULL); | |
1592 | ||
e0001a05 | 1593 | /* Set the contents of the .interp section to the interpreter. */ |
9b8b325a | 1594 | if (bfd_link_executable (info) && !info->nointerp) |
e0001a05 | 1595 | { |
3d4d4302 | 1596 | s = bfd_get_linker_section (dynobj, ".interp"); |
e0001a05 NC |
1597 | if (s == NULL) |
1598 | abort (); | |
eea6121a | 1599 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
e0001a05 NC |
1600 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
1601 | } | |
1602 | ||
1603 | /* Allocate room for one word in ".got". */ | |
ce558b89 | 1604 | htab->elf.sgot->size = 4; |
e0001a05 | 1605 | |
f1ab2340 BW |
1606 | /* Allocate space in ".rela.got" for literals that reference global |
1607 | symbols and space in ".rela.plt" for literals that have PLT | |
1608 | entries. */ | |
e0001a05 | 1609 | elf_link_hash_traverse (elf_hash_table (info), |
f1ab2340 | 1610 | elf_xtensa_allocate_dynrelocs, |
7fa3d080 | 1611 | (void *) info); |
e0001a05 | 1612 | |
e0001a05 NC |
1613 | /* If we are generating a shared object, we also need space in |
1614 | ".rela.got" for R_XTENSA_RELATIVE relocs for literals that | |
1615 | reference local symbols. */ | |
0e1862bb | 1616 | if (bfd_link_pic (info)) |
f0e6fdb2 | 1617 | elf_xtensa_allocate_local_got_size (info); |
e0001a05 | 1618 | |
e0001a05 NC |
1619 | /* Allocate space in ".plt" to match the size of ".rela.plt". For |
1620 | each PLT entry, we need the PLT code plus a 4-byte literal. | |
1621 | For each chunk of ".plt", we also need two more 4-byte | |
1622 | literals, two corresponding entries in ".rela.got", and an | |
1623 | 8-byte entry in ".xt.lit.plt". */ | |
f0e6fdb2 | 1624 | spltlittbl = htab->spltlittbl; |
eea6121a | 1625 | plt_entries = srelplt->size / sizeof (Elf32_External_Rela); |
e0001a05 NC |
1626 | plt_chunks = |
1627 | (plt_entries + PLT_ENTRIES_PER_CHUNK - 1) / PLT_ENTRIES_PER_CHUNK; | |
1628 | ||
1629 | /* Iterate over all the PLT chunks, including any extra sections | |
1630 | created earlier because the initial count of PLT relocations | |
1631 | was an overestimate. */ | |
1632 | for (chunk = 0; | |
f0e6fdb2 | 1633 | (splt = elf_xtensa_get_plt_section (info, chunk)) != NULL; |
e0001a05 NC |
1634 | chunk++) |
1635 | { | |
1636 | int chunk_entries; | |
1637 | ||
f0e6fdb2 BW |
1638 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); |
1639 | BFD_ASSERT (sgotplt != NULL); | |
e0001a05 NC |
1640 | |
1641 | if (chunk < plt_chunks - 1) | |
1642 | chunk_entries = PLT_ENTRIES_PER_CHUNK; | |
1643 | else if (chunk == plt_chunks - 1) | |
1644 | chunk_entries = plt_entries - (chunk * PLT_ENTRIES_PER_CHUNK); | |
1645 | else | |
1646 | chunk_entries = 0; | |
1647 | ||
1648 | if (chunk_entries != 0) | |
1649 | { | |
eea6121a AM |
1650 | sgotplt->size = 4 * (chunk_entries + 2); |
1651 | splt->size = PLT_ENTRY_SIZE * chunk_entries; | |
1652 | srelgot->size += 2 * sizeof (Elf32_External_Rela); | |
1653 | spltlittbl->size += 8; | |
e0001a05 NC |
1654 | } |
1655 | else | |
1656 | { | |
eea6121a AM |
1657 | sgotplt->size = 0; |
1658 | splt->size = 0; | |
e0001a05 NC |
1659 | } |
1660 | } | |
e901de89 BW |
1661 | |
1662 | /* Allocate space in ".got.loc" to match the total size of all the | |
1663 | literal tables. */ | |
f0e6fdb2 | 1664 | sgotloc = htab->sgotloc; |
eea6121a | 1665 | sgotloc->size = spltlittbl->size; |
c72f2fb2 | 1666 | for (abfd = info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
e901de89 BW |
1667 | { |
1668 | if (abfd->flags & DYNAMIC) | |
1669 | continue; | |
1670 | for (s = abfd->sections; s != NULL; s = s->next) | |
1671 | { | |
dbaa2011 | 1672 | if (! discarded_section (s) |
b536dc1e BW |
1673 | && xtensa_is_littable_section (s) |
1674 | && s != spltlittbl) | |
eea6121a | 1675 | sgotloc->size += s->size; |
e901de89 BW |
1676 | } |
1677 | } | |
e0001a05 NC |
1678 | } |
1679 | ||
1680 | /* Allocate memory for dynamic sections. */ | |
0a1b45a2 AM |
1681 | relplt = false; |
1682 | relgot = false; | |
e0001a05 NC |
1683 | for (s = dynobj->sections; s != NULL; s = s->next) |
1684 | { | |
1685 | const char *name; | |
e0001a05 NC |
1686 | |
1687 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
1688 | continue; | |
1689 | ||
1690 | /* It's OK to base decisions on the section name, because none | |
1691 | of the dynobj section names depend upon the input files. */ | |
fd361982 | 1692 | name = bfd_section_name (s); |
e0001a05 | 1693 | |
08dedd66 | 1694 | if (startswith (name, ".rela")) |
e0001a05 | 1695 | { |
c456f082 | 1696 | if (s->size != 0) |
e0001a05 | 1697 | { |
c456f082 | 1698 | if (strcmp (name, ".rela.plt") == 0) |
0a1b45a2 | 1699 | relplt = true; |
c456f082 | 1700 | else if (strcmp (name, ".rela.got") == 0) |
0a1b45a2 | 1701 | relgot = true; |
c456f082 AM |
1702 | |
1703 | /* We use the reloc_count field as a counter if we need | |
1704 | to copy relocs into the output file. */ | |
1705 | s->reloc_count = 0; | |
e0001a05 NC |
1706 | } |
1707 | } | |
08dedd66 ML |
1708 | else if (! startswith (name, ".plt.") |
1709 | && ! startswith (name, ".got.plt.") | |
c456f082 | 1710 | && strcmp (name, ".got") != 0 |
e0001a05 NC |
1711 | && strcmp (name, ".plt") != 0 |
1712 | && strcmp (name, ".got.plt") != 0 | |
e901de89 BW |
1713 | && strcmp (name, ".xt.lit.plt") != 0 |
1714 | && strcmp (name, ".got.loc") != 0) | |
e0001a05 NC |
1715 | { |
1716 | /* It's not one of our sections, so don't allocate space. */ | |
1717 | continue; | |
1718 | } | |
1719 | ||
c456f082 AM |
1720 | if (s->size == 0) |
1721 | { | |
1722 | /* If we don't need this section, strip it from the output | |
1723 | file. We must create the ".plt*" and ".got.plt*" | |
1724 | sections in create_dynamic_sections and/or check_relocs | |
1725 | based on a conservative estimate of the PLT relocation | |
1726 | count, because the sections must be created before the | |
1727 | linker maps input sections to output sections. The | |
1728 | linker does that before size_dynamic_sections, where we | |
1729 | compute the exact size of the PLT, so there may be more | |
1730 | of these sections than are actually needed. */ | |
1731 | s->flags |= SEC_EXCLUDE; | |
1732 | } | |
1733 | else if ((s->flags & SEC_HAS_CONTENTS) != 0) | |
e0001a05 NC |
1734 | { |
1735 | /* Allocate memory for the section contents. */ | |
eea6121a | 1736 | s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); |
c456f082 | 1737 | if (s->contents == NULL) |
0a1b45a2 | 1738 | return false; |
e0001a05 NC |
1739 | } |
1740 | } | |
1741 | ||
1742 | if (elf_hash_table (info)->dynamic_sections_created) | |
1743 | { | |
1744 | /* Add the special XTENSA_RTLD relocations now. The offsets won't be | |
1745 | known until finish_dynamic_sections, but we need to get the relocs | |
1746 | in place before they are sorted. */ | |
e0001a05 NC |
1747 | for (chunk = 0; chunk < plt_chunks; chunk++) |
1748 | { | |
1749 | Elf_Internal_Rela irela; | |
1750 | bfd_byte *loc; | |
1751 | ||
1752 | irela.r_offset = 0; | |
1753 | irela.r_info = ELF32_R_INFO (0, R_XTENSA_RTLD); | |
1754 | irela.r_addend = 0; | |
1755 | ||
1756 | loc = (srelgot->contents | |
1757 | + srelgot->reloc_count * sizeof (Elf32_External_Rela)); | |
1758 | bfd_elf32_swap_reloca_out (output_bfd, &irela, loc); | |
1759 | bfd_elf32_swap_reloca_out (output_bfd, &irela, | |
1760 | loc + sizeof (Elf32_External_Rela)); | |
1761 | srelgot->reloc_count += 2; | |
1762 | } | |
1763 | ||
1764 | /* Add some entries to the .dynamic section. We fill in the | |
1765 | values later, in elf_xtensa_finish_dynamic_sections, but we | |
1766 | must add the entries now so that we get the correct size for | |
1767 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
1768 | dynamic linker and used by the debugger. */ | |
1769 | #define add_dynamic_entry(TAG, VAL) \ | |
5a580b3a | 1770 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
e0001a05 | 1771 | |
3084d7a2 L |
1772 | if (!_bfd_elf_add_dynamic_tags (output_bfd, info, |
1773 | relplt || relgot)) | |
0a1b45a2 | 1774 | return false; |
e0001a05 | 1775 | |
3084d7a2 | 1776 | if (!add_dynamic_entry (DT_XTENSA_GOT_LOC_OFF, 0) |
e0001a05 | 1777 | || !add_dynamic_entry (DT_XTENSA_GOT_LOC_SZ, 0)) |
0a1b45a2 | 1778 | return false; |
e0001a05 NC |
1779 | } |
1780 | #undef add_dynamic_entry | |
1781 | ||
0a1b45a2 | 1782 | return true; |
e0001a05 NC |
1783 | } |
1784 | ||
0a1b45a2 | 1785 | static bool |
28dbbc02 BW |
1786 | elf_xtensa_always_size_sections (bfd *output_bfd, |
1787 | struct bfd_link_info *info) | |
1788 | { | |
1789 | struct elf_xtensa_link_hash_table *htab; | |
1790 | asection *tls_sec; | |
1791 | ||
1792 | htab = elf_xtensa_hash_table (info); | |
4dfe6ac6 | 1793 | if (htab == NULL) |
0a1b45a2 | 1794 | return false; |
4dfe6ac6 | 1795 | |
28dbbc02 BW |
1796 | tls_sec = htab->elf.tls_sec; |
1797 | ||
1798 | if (tls_sec && (htab->tlsbase->tls_type & GOT_TLS_ANY) != 0) | |
1799 | { | |
1800 | struct elf_link_hash_entry *tlsbase = &htab->tlsbase->elf; | |
1801 | struct bfd_link_hash_entry *bh = &tlsbase->root; | |
1802 | const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); | |
1803 | ||
1804 | tlsbase->type = STT_TLS; | |
1805 | if (!(_bfd_generic_link_add_one_symbol | |
1806 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, | |
0a1b45a2 | 1807 | tls_sec, 0, NULL, false, |
28dbbc02 | 1808 | bed->collect, &bh))) |
0a1b45a2 | 1809 | return false; |
28dbbc02 BW |
1810 | tlsbase->def_regular = 1; |
1811 | tlsbase->other = STV_HIDDEN; | |
0a1b45a2 | 1812 | (*bed->elf_backend_hide_symbol) (info, tlsbase, true); |
28dbbc02 BW |
1813 | } |
1814 | ||
0a1b45a2 | 1815 | return true; |
28dbbc02 BW |
1816 | } |
1817 | ||
e0001a05 | 1818 | \f |
28dbbc02 BW |
1819 | /* Return the base VMA address which should be subtracted from real addresses |
1820 | when resolving @dtpoff relocation. | |
1821 | This is PT_TLS segment p_vaddr. */ | |
1822 | ||
1823 | static bfd_vma | |
1824 | dtpoff_base (struct bfd_link_info *info) | |
1825 | { | |
1826 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
1827 | if (elf_hash_table (info)->tls_sec == NULL) | |
1828 | return 0; | |
1829 | return elf_hash_table (info)->tls_sec->vma; | |
1830 | } | |
1831 | ||
1832 | /* Return the relocation value for @tpoff relocation | |
1833 | if STT_TLS virtual address is ADDRESS. */ | |
1834 | ||
1835 | static bfd_vma | |
1836 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
1837 | { | |
1838 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
1839 | bfd_vma base; | |
1840 | ||
1841 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
1842 | if (htab->tls_sec == NULL) | |
1843 | return 0; | |
1844 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
1845 | return address - htab->tls_sec->vma + base; | |
1846 | } | |
1847 | ||
e0001a05 NC |
1848 | /* Perform the specified relocation. The instruction at (contents + address) |
1849 | is modified to set one operand to represent the value in "relocation". The | |
1850 | operand position is determined by the relocation type recorded in the | |
1851 | howto. */ | |
1852 | ||
1853 | #define CALL_SEGMENT_BITS (30) | |
7fa3d080 | 1854 | #define CALL_SEGMENT_SIZE (1 << CALL_SEGMENT_BITS) |
e0001a05 NC |
1855 | |
1856 | static bfd_reloc_status_type | |
7fa3d080 BW |
1857 | elf_xtensa_do_reloc (reloc_howto_type *howto, |
1858 | bfd *abfd, | |
1859 | asection *input_section, | |
1860 | bfd_vma relocation, | |
1861 | bfd_byte *contents, | |
1862 | bfd_vma address, | |
0a1b45a2 | 1863 | bool is_weak_undef, |
7fa3d080 | 1864 | char **error_message) |
e0001a05 | 1865 | { |
43cd72b9 | 1866 | xtensa_format fmt; |
e0001a05 | 1867 | xtensa_opcode opcode; |
e0001a05 | 1868 | xtensa_isa isa = xtensa_default_isa; |
43cd72b9 BW |
1869 | static xtensa_insnbuf ibuff = NULL; |
1870 | static xtensa_insnbuf sbuff = NULL; | |
1bbb5f21 | 1871 | bfd_vma self_address; |
43cd72b9 BW |
1872 | bfd_size_type input_size; |
1873 | int opnd, slot; | |
e0001a05 NC |
1874 | uint32 newval; |
1875 | ||
43cd72b9 BW |
1876 | if (!ibuff) |
1877 | { | |
1878 | ibuff = xtensa_insnbuf_alloc (isa); | |
1879 | sbuff = xtensa_insnbuf_alloc (isa); | |
1880 | } | |
1881 | ||
1882 | input_size = bfd_get_section_limit (abfd, input_section); | |
1883 | ||
1bbb5f21 BW |
1884 | /* Calculate the PC address for this instruction. */ |
1885 | self_address = (input_section->output_section->vma | |
1886 | + input_section->output_offset | |
1887 | + address); | |
1888 | ||
e0001a05 NC |
1889 | switch (howto->type) |
1890 | { | |
1891 | case R_XTENSA_NONE: | |
43cd72b9 BW |
1892 | case R_XTENSA_DIFF8: |
1893 | case R_XTENSA_DIFF16: | |
1894 | case R_XTENSA_DIFF32: | |
30ce8e47 MF |
1895 | case R_XTENSA_PDIFF8: |
1896 | case R_XTENSA_PDIFF16: | |
1897 | case R_XTENSA_PDIFF32: | |
1898 | case R_XTENSA_NDIFF8: | |
1899 | case R_XTENSA_NDIFF16: | |
1900 | case R_XTENSA_NDIFF32: | |
28dbbc02 BW |
1901 | case R_XTENSA_TLS_FUNC: |
1902 | case R_XTENSA_TLS_ARG: | |
1903 | case R_XTENSA_TLS_CALL: | |
e0001a05 NC |
1904 | return bfd_reloc_ok; |
1905 | ||
1906 | case R_XTENSA_ASM_EXPAND: | |
1907 | if (!is_weak_undef) | |
1908 | { | |
1909 | /* Check for windowed CALL across a 1GB boundary. */ | |
91d6fa6a NC |
1910 | opcode = get_expanded_call_opcode (contents + address, |
1911 | input_size - address, 0); | |
e0001a05 NC |
1912 | if (is_windowed_call_opcode (opcode)) |
1913 | { | |
43cd72b9 | 1914 | if ((self_address >> CALL_SEGMENT_BITS) |
68ffbac6 | 1915 | != (relocation >> CALL_SEGMENT_BITS)) |
e0001a05 NC |
1916 | { |
1917 | *error_message = "windowed longcall crosses 1GB boundary; " | |
1918 | "return may fail"; | |
1919 | return bfd_reloc_dangerous; | |
1920 | } | |
1921 | } | |
1922 | } | |
1923 | return bfd_reloc_ok; | |
1924 | ||
1925 | case R_XTENSA_ASM_SIMPLIFY: | |
43cd72b9 | 1926 | { |
07d6d2b8 | 1927 | /* Convert the L32R/CALLX to CALL. */ |
43cd72b9 BW |
1928 | bfd_reloc_status_type retval = |
1929 | elf_xtensa_do_asm_simplify (contents, address, input_size, | |
1930 | error_message); | |
e0001a05 | 1931 | if (retval != bfd_reloc_ok) |
43cd72b9 | 1932 | return bfd_reloc_dangerous; |
e0001a05 NC |
1933 | |
1934 | /* The CALL needs to be relocated. Continue below for that part. */ | |
1935 | address += 3; | |
c46082c8 | 1936 | self_address += 3; |
43cd72b9 | 1937 | howto = &elf_howto_table[(unsigned) R_XTENSA_SLOT0_OP ]; |
e0001a05 NC |
1938 | } |
1939 | break; | |
1940 | ||
1941 | case R_XTENSA_32: | |
e0001a05 NC |
1942 | { |
1943 | bfd_vma x; | |
1944 | x = bfd_get_32 (abfd, contents + address); | |
1945 | x = x + relocation; | |
1946 | bfd_put_32 (abfd, x, contents + address); | |
1947 | } | |
1948 | return bfd_reloc_ok; | |
1bbb5f21 BW |
1949 | |
1950 | case R_XTENSA_32_PCREL: | |
1951 | bfd_put_32 (abfd, relocation - self_address, contents + address); | |
1952 | return bfd_reloc_ok; | |
28dbbc02 BW |
1953 | |
1954 | case R_XTENSA_PLT: | |
1955 | case R_XTENSA_TLSDESC_FN: | |
1956 | case R_XTENSA_TLSDESC_ARG: | |
1957 | case R_XTENSA_TLS_DTPOFF: | |
1958 | case R_XTENSA_TLS_TPOFF: | |
1959 | bfd_put_32 (abfd, relocation, contents + address); | |
1960 | return bfd_reloc_ok; | |
e0001a05 NC |
1961 | } |
1962 | ||
43cd72b9 BW |
1963 | /* Only instruction slot-specific relocations handled below.... */ |
1964 | slot = get_relocation_slot (howto->type); | |
1965 | if (slot == XTENSA_UNDEFINED) | |
e0001a05 | 1966 | { |
43cd72b9 | 1967 | *error_message = "unexpected relocation"; |
e0001a05 NC |
1968 | return bfd_reloc_dangerous; |
1969 | } | |
1970 | ||
43cd72b9 BW |
1971 | /* Read the instruction into a buffer and decode the opcode. */ |
1972 | xtensa_insnbuf_from_chars (isa, ibuff, contents + address, | |
1973 | input_size - address); | |
1974 | fmt = xtensa_format_decode (isa, ibuff); | |
1975 | if (fmt == XTENSA_UNDEFINED) | |
e0001a05 | 1976 | { |
43cd72b9 | 1977 | *error_message = "cannot decode instruction format"; |
e0001a05 NC |
1978 | return bfd_reloc_dangerous; |
1979 | } | |
1980 | ||
43cd72b9 | 1981 | xtensa_format_get_slot (isa, fmt, slot, ibuff, sbuff); |
e0001a05 | 1982 | |
43cd72b9 BW |
1983 | opcode = xtensa_opcode_decode (isa, fmt, slot, sbuff); |
1984 | if (opcode == XTENSA_UNDEFINED) | |
e0001a05 | 1985 | { |
43cd72b9 | 1986 | *error_message = "cannot decode instruction opcode"; |
e0001a05 NC |
1987 | return bfd_reloc_dangerous; |
1988 | } | |
1989 | ||
43cd72b9 BW |
1990 | /* Check for opcode-specific "alternate" relocations. */ |
1991 | if (is_alt_relocation (howto->type)) | |
1992 | { | |
1993 | if (opcode == get_l32r_opcode ()) | |
1994 | { | |
1995 | /* Handle the special-case of non-PC-relative L32R instructions. */ | |
1996 | bfd *output_bfd = input_section->output_section->owner; | |
1997 | asection *lit4_sec = bfd_get_section_by_name (output_bfd, ".lit4"); | |
1998 | if (!lit4_sec) | |
1999 | { | |
2000 | *error_message = "relocation references missing .lit4 section"; | |
2001 | return bfd_reloc_dangerous; | |
2002 | } | |
2003 | self_address = ((lit4_sec->vma & ~0xfff) | |
2004 | + 0x40000 - 3); /* -3 to compensate for do_reloc */ | |
2005 | newval = relocation; | |
2006 | opnd = 1; | |
2007 | } | |
2008 | else if (opcode == get_const16_opcode ()) | |
2009 | { | |
00863b8e MF |
2010 | /* ALT used for high 16 bits. |
2011 | Ignore 32-bit overflow. */ | |
2012 | newval = (relocation >> 16) & 0xffff; | |
43cd72b9 BW |
2013 | opnd = 1; |
2014 | } | |
2015 | else | |
2016 | { | |
2017 | /* No other "alternate" relocations currently defined. */ | |
2018 | *error_message = "unexpected relocation"; | |
2019 | return bfd_reloc_dangerous; | |
2020 | } | |
2021 | } | |
2022 | else /* Not an "alternate" relocation.... */ | |
2023 | { | |
2024 | if (opcode == get_const16_opcode ()) | |
2025 | { | |
2026 | newval = relocation & 0xffff; | |
2027 | opnd = 1; | |
2028 | } | |
2029 | else | |
2030 | { | |
2031 | /* ...normal PC-relative relocation.... */ | |
2032 | ||
2033 | /* Determine which operand is being relocated. */ | |
2034 | opnd = get_relocation_opnd (opcode, howto->type); | |
2035 | if (opnd == XTENSA_UNDEFINED) | |
2036 | { | |
2037 | *error_message = "unexpected relocation"; | |
2038 | return bfd_reloc_dangerous; | |
2039 | } | |
2040 | ||
2041 | if (!howto->pc_relative) | |
2042 | { | |
2043 | *error_message = "expected PC-relative relocation"; | |
2044 | return bfd_reloc_dangerous; | |
2045 | } | |
e0001a05 | 2046 | |
43cd72b9 BW |
2047 | newval = relocation; |
2048 | } | |
2049 | } | |
e0001a05 | 2050 | |
43cd72b9 BW |
2051 | /* Apply the relocation. */ |
2052 | if (xtensa_operand_do_reloc (isa, opcode, opnd, &newval, self_address) | |
2053 | || xtensa_operand_encode (isa, opcode, opnd, &newval) | |
2054 | || xtensa_operand_set_field (isa, opcode, opnd, fmt, slot, | |
2055 | sbuff, newval)) | |
e0001a05 | 2056 | { |
2db662be BW |
2057 | const char *opname = xtensa_opcode_name (isa, opcode); |
2058 | const char *msg; | |
2059 | ||
2060 | msg = "cannot encode"; | |
2061 | if (is_direct_call_opcode (opcode)) | |
2062 | { | |
2063 | if ((relocation & 0x3) != 0) | |
2064 | msg = "misaligned call target"; | |
2065 | else | |
2066 | msg = "call target out of range"; | |
2067 | } | |
2068 | else if (opcode == get_l32r_opcode ()) | |
2069 | { | |
2070 | if ((relocation & 0x3) != 0) | |
2071 | msg = "misaligned literal target"; | |
2072 | else if (is_alt_relocation (howto->type)) | |
2073 | msg = "literal target out of range (too many literals)"; | |
2074 | else if (self_address > relocation) | |
2075 | msg = "literal target out of range (try using text-section-literals)"; | |
2076 | else | |
2077 | msg = "literal placed after use"; | |
2078 | } | |
2079 | ||
2080 | *error_message = vsprint_msg (opname, ": %s", strlen (msg) + 2, msg); | |
e0001a05 NC |
2081 | return bfd_reloc_dangerous; |
2082 | } | |
2083 | ||
43cd72b9 | 2084 | /* Check for calls across 1GB boundaries. */ |
e0001a05 NC |
2085 | if (is_direct_call_opcode (opcode) |
2086 | && is_windowed_call_opcode (opcode)) | |
2087 | { | |
43cd72b9 | 2088 | if ((self_address >> CALL_SEGMENT_BITS) |
68ffbac6 | 2089 | != (relocation >> CALL_SEGMENT_BITS)) |
e0001a05 | 2090 | { |
43cd72b9 BW |
2091 | *error_message = |
2092 | "windowed call crosses 1GB boundary; return may fail"; | |
e0001a05 NC |
2093 | return bfd_reloc_dangerous; |
2094 | } | |
2095 | } | |
2096 | ||
43cd72b9 BW |
2097 | /* Write the modified instruction back out of the buffer. */ |
2098 | xtensa_format_set_slot (isa, fmt, slot, ibuff, sbuff); | |
2099 | xtensa_insnbuf_to_chars (isa, ibuff, contents + address, | |
2100 | input_size - address); | |
e0001a05 NC |
2101 | return bfd_reloc_ok; |
2102 | } | |
2103 | ||
2104 | ||
2db662be | 2105 | static char * |
7fa3d080 | 2106 | vsprint_msg (const char *origmsg, const char *fmt, int arglen, ...) |
e0001a05 NC |
2107 | { |
2108 | /* To reduce the size of the memory leak, | |
2109 | we only use a single message buffer. */ | |
2110 | static bfd_size_type alloc_size = 0; | |
2111 | static char *message = NULL; | |
2112 | bfd_size_type orig_len, len = 0; | |
0a1b45a2 | 2113 | bool is_append; |
1651e569 | 2114 | va_list ap; |
e0001a05 | 2115 | |
1651e569 | 2116 | va_start (ap, arglen); |
68ffbac6 L |
2117 | |
2118 | is_append = (origmsg == message); | |
e0001a05 NC |
2119 | |
2120 | orig_len = strlen (origmsg); | |
2121 | len = orig_len + strlen (fmt) + arglen + 20; | |
2122 | if (len > alloc_size) | |
2123 | { | |
515ef31d | 2124 | message = (char *) bfd_realloc_or_free (message, len); |
e0001a05 NC |
2125 | alloc_size = len; |
2126 | } | |
515ef31d NC |
2127 | if (message != NULL) |
2128 | { | |
2129 | if (!is_append) | |
2130 | memcpy (message, origmsg, orig_len); | |
2131 | vsprintf (message + orig_len, fmt, ap); | |
2132 | } | |
1651e569 | 2133 | va_end (ap); |
e0001a05 NC |
2134 | return message; |
2135 | } | |
2136 | ||
2137 | ||
e0001a05 NC |
2138 | /* This function is registered as the "special_function" in the |
2139 | Xtensa howto for handling simplify operations. | |
2140 | bfd_perform_relocation / bfd_install_relocation use it to | |
2141 | perform (install) the specified relocation. Since this replaces the code | |
2142 | in bfd_perform_relocation, it is basically an Xtensa-specific, | |
2143 | stripped-down version of bfd_perform_relocation. */ | |
2144 | ||
2145 | static bfd_reloc_status_type | |
7fa3d080 BW |
2146 | bfd_elf_xtensa_reloc (bfd *abfd, |
2147 | arelent *reloc_entry, | |
2148 | asymbol *symbol, | |
2149 | void *data, | |
2150 | asection *input_section, | |
2151 | bfd *output_bfd, | |
2152 | char **error_message) | |
e0001a05 NC |
2153 | { |
2154 | bfd_vma relocation; | |
2155 | bfd_reloc_status_type flag; | |
61826503 | 2156 | bfd_size_type octets = (reloc_entry->address |
bb294208 | 2157 | * OCTETS_PER_BYTE (abfd, input_section)); |
e0001a05 NC |
2158 | bfd_vma output_base = 0; |
2159 | reloc_howto_type *howto = reloc_entry->howto; | |
2160 | asection *reloc_target_output_section; | |
0a1b45a2 | 2161 | bool is_weak_undef; |
e0001a05 | 2162 | |
dd1a320b BW |
2163 | if (!xtensa_default_isa) |
2164 | xtensa_default_isa = xtensa_isa_init (0, 0); | |
2165 | ||
1049f94e | 2166 | /* ELF relocs are against symbols. If we are producing relocatable |
e0001a05 NC |
2167 | output, and the reloc is against an external symbol, the resulting |
2168 | reloc will also be against the same symbol. In such a case, we | |
2169 | don't want to change anything about the way the reloc is handled, | |
2170 | since it will all be done at final link time. This test is similar | |
2171 | to what bfd_elf_generic_reloc does except that it lets relocs with | |
2172 | howto->partial_inplace go through even if the addend is non-zero. | |
2173 | (The real problem is that partial_inplace is set for XTENSA_32 | |
2174 | relocs to begin with, but that's a long story and there's little we | |
2175 | can do about it now....) */ | |
2176 | ||
7fa3d080 | 2177 | if (output_bfd && (symbol->flags & BSF_SECTION_SYM) == 0) |
e0001a05 NC |
2178 | { |
2179 | reloc_entry->address += input_section->output_offset; | |
2180 | return bfd_reloc_ok; | |
2181 | } | |
2182 | ||
2183 | /* Is the address of the relocation really within the section? */ | |
07515404 | 2184 | if (reloc_entry->address > bfd_get_section_limit (abfd, input_section)) |
e0001a05 NC |
2185 | return bfd_reloc_outofrange; |
2186 | ||
4cc11e76 | 2187 | /* Work out which section the relocation is targeted at and the |
e0001a05 NC |
2188 | initial relocation command value. */ |
2189 | ||
2190 | /* Get symbol value. (Common symbols are special.) */ | |
2191 | if (bfd_is_com_section (symbol->section)) | |
2192 | relocation = 0; | |
2193 | else | |
2194 | relocation = symbol->value; | |
2195 | ||
2196 | reloc_target_output_section = symbol->section->output_section; | |
2197 | ||
2198 | /* Convert input-section-relative symbol value to absolute. */ | |
2199 | if ((output_bfd && !howto->partial_inplace) | |
2200 | || reloc_target_output_section == NULL) | |
2201 | output_base = 0; | |
2202 | else | |
2203 | output_base = reloc_target_output_section->vma; | |
2204 | ||
2205 | relocation += output_base + symbol->section->output_offset; | |
2206 | ||
2207 | /* Add in supplied addend. */ | |
2208 | relocation += reloc_entry->addend; | |
2209 | ||
2210 | /* Here the variable relocation holds the final address of the | |
2211 | symbol we are relocating against, plus any addend. */ | |
2212 | if (output_bfd) | |
2213 | { | |
2214 | if (!howto->partial_inplace) | |
2215 | { | |
2216 | /* This is a partial relocation, and we want to apply the relocation | |
2217 | to the reloc entry rather than the raw data. Everything except | |
2218 | relocations against section symbols has already been handled | |
2219 | above. */ | |
43cd72b9 | 2220 | |
e0001a05 NC |
2221 | BFD_ASSERT (symbol->flags & BSF_SECTION_SYM); |
2222 | reloc_entry->addend = relocation; | |
2223 | reloc_entry->address += input_section->output_offset; | |
2224 | return bfd_reloc_ok; | |
2225 | } | |
2226 | else | |
2227 | { | |
2228 | reloc_entry->address += input_section->output_offset; | |
2229 | reloc_entry->addend = 0; | |
2230 | } | |
2231 | } | |
2232 | ||
2233 | is_weak_undef = (bfd_is_und_section (symbol->section) | |
2234 | && (symbol->flags & BSF_WEAK) != 0); | |
2235 | flag = elf_xtensa_do_reloc (howto, abfd, input_section, relocation, | |
2236 | (bfd_byte *) data, (bfd_vma) octets, | |
2237 | is_weak_undef, error_message); | |
2238 | ||
2239 | if (flag == bfd_reloc_dangerous) | |
2240 | { | |
2241 | /* Add the symbol name to the error message. */ | |
2242 | if (! *error_message) | |
2243 | *error_message = ""; | |
2244 | *error_message = vsprint_msg (*error_message, ": (%s + 0x%lx)", | |
2245 | strlen (symbol->name) + 17, | |
70961b9d AM |
2246 | symbol->name, |
2247 | (unsigned long) reloc_entry->addend); | |
e0001a05 NC |
2248 | } |
2249 | ||
2250 | return flag; | |
2251 | } | |
2252 | ||
7a77f1ac MF |
2253 | int xtensa_abi_choice (void) |
2254 | { | |
2255 | if (elf32xtensa_abi == XTHAL_ABI_UNDEFINED) | |
2256 | return XSHAL_ABI; | |
2257 | else | |
2258 | return elf32xtensa_abi; | |
2259 | } | |
e0001a05 NC |
2260 | |
2261 | /* Set up an entry in the procedure linkage table. */ | |
2262 | ||
2263 | static bfd_vma | |
f0e6fdb2 | 2264 | elf_xtensa_create_plt_entry (struct bfd_link_info *info, |
7fa3d080 BW |
2265 | bfd *output_bfd, |
2266 | unsigned reloc_index) | |
e0001a05 NC |
2267 | { |
2268 | asection *splt, *sgotplt; | |
2269 | bfd_vma plt_base, got_base; | |
92b3f008 | 2270 | bfd_vma code_offset, lit_offset, abi_offset; |
e0001a05 | 2271 | int chunk; |
7a77f1ac | 2272 | int abi = xtensa_abi_choice (); |
e0001a05 NC |
2273 | |
2274 | chunk = reloc_index / PLT_ENTRIES_PER_CHUNK; | |
f0e6fdb2 BW |
2275 | splt = elf_xtensa_get_plt_section (info, chunk); |
2276 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); | |
e0001a05 NC |
2277 | BFD_ASSERT (splt != NULL && sgotplt != NULL); |
2278 | ||
2279 | plt_base = splt->output_section->vma + splt->output_offset; | |
2280 | got_base = sgotplt->output_section->vma + sgotplt->output_offset; | |
2281 | ||
2282 | lit_offset = 8 + (reloc_index % PLT_ENTRIES_PER_CHUNK) * 4; | |
2283 | code_offset = (reloc_index % PLT_ENTRIES_PER_CHUNK) * PLT_ENTRY_SIZE; | |
2284 | ||
2285 | /* Fill in the literal entry. This is the offset of the dynamic | |
2286 | relocation entry. */ | |
2287 | bfd_put_32 (output_bfd, reloc_index * sizeof (Elf32_External_Rela), | |
2288 | sgotplt->contents + lit_offset); | |
2289 | ||
2290 | /* Fill in the entry in the procedure linkage table. */ | |
2291 | memcpy (splt->contents + code_offset, | |
2292 | (bfd_big_endian (output_bfd) | |
7a77f1ac MF |
2293 | ? elf_xtensa_be_plt_entry[abi != XTHAL_ABI_WINDOWED] |
2294 | : elf_xtensa_le_plt_entry[abi != XTHAL_ABI_WINDOWED]), | |
e0001a05 | 2295 | PLT_ENTRY_SIZE); |
7a77f1ac | 2296 | abi_offset = abi == XTHAL_ABI_WINDOWED ? 3 : 0; |
e0001a05 | 2297 | bfd_put_16 (output_bfd, l32r_offset (got_base + 0, |
92b3f008 MF |
2298 | plt_base + code_offset + abi_offset), |
2299 | splt->contents + code_offset + abi_offset + 1); | |
e0001a05 | 2300 | bfd_put_16 (output_bfd, l32r_offset (got_base + 4, |
92b3f008 MF |
2301 | plt_base + code_offset + abi_offset + 3), |
2302 | splt->contents + code_offset + abi_offset + 4); | |
e0001a05 | 2303 | bfd_put_16 (output_bfd, l32r_offset (got_base + lit_offset, |
92b3f008 MF |
2304 | plt_base + code_offset + abi_offset + 6), |
2305 | splt->contents + code_offset + abi_offset + 7); | |
e0001a05 NC |
2306 | |
2307 | return plt_base + code_offset; | |
2308 | } | |
2309 | ||
2310 | ||
0a1b45a2 | 2311 | static bool get_indirect_call_dest_reg (xtensa_opcode, unsigned *); |
28dbbc02 | 2312 | |
0a1b45a2 | 2313 | static bool |
28dbbc02 BW |
2314 | replace_tls_insn (Elf_Internal_Rela *rel, |
2315 | bfd *abfd, | |
2316 | asection *input_section, | |
2317 | bfd_byte *contents, | |
0a1b45a2 | 2318 | bool is_ld_model, |
28dbbc02 BW |
2319 | char **error_message) |
2320 | { | |
2321 | static xtensa_insnbuf ibuff = NULL; | |
2322 | static xtensa_insnbuf sbuff = NULL; | |
2323 | xtensa_isa isa = xtensa_default_isa; | |
2324 | xtensa_format fmt; | |
2325 | xtensa_opcode old_op, new_op; | |
2326 | bfd_size_type input_size; | |
2327 | int r_type; | |
2328 | unsigned dest_reg, src_reg; | |
2329 | ||
2330 | if (ibuff == NULL) | |
2331 | { | |
2332 | ibuff = xtensa_insnbuf_alloc (isa); | |
2333 | sbuff = xtensa_insnbuf_alloc (isa); | |
2334 | } | |
2335 | ||
2336 | input_size = bfd_get_section_limit (abfd, input_section); | |
2337 | ||
2338 | /* Read the instruction into a buffer and decode the opcode. */ | |
2339 | xtensa_insnbuf_from_chars (isa, ibuff, contents + rel->r_offset, | |
2340 | input_size - rel->r_offset); | |
2341 | fmt = xtensa_format_decode (isa, ibuff); | |
2342 | if (fmt == XTENSA_UNDEFINED) | |
2343 | { | |
2344 | *error_message = "cannot decode instruction format"; | |
0a1b45a2 | 2345 | return false; |
28dbbc02 BW |
2346 | } |
2347 | ||
2348 | BFD_ASSERT (xtensa_format_num_slots (isa, fmt) == 1); | |
2349 | xtensa_format_get_slot (isa, fmt, 0, ibuff, sbuff); | |
2350 | ||
2351 | old_op = xtensa_opcode_decode (isa, fmt, 0, sbuff); | |
2352 | if (old_op == XTENSA_UNDEFINED) | |
2353 | { | |
2354 | *error_message = "cannot decode instruction opcode"; | |
0a1b45a2 | 2355 | return false; |
28dbbc02 BW |
2356 | } |
2357 | ||
2358 | r_type = ELF32_R_TYPE (rel->r_info); | |
2359 | switch (r_type) | |
2360 | { | |
2361 | case R_XTENSA_TLS_FUNC: | |
2362 | case R_XTENSA_TLS_ARG: | |
2363 | if (old_op != get_l32r_opcode () | |
2364 | || xtensa_operand_get_field (isa, old_op, 0, fmt, 0, | |
2365 | sbuff, &dest_reg) != 0) | |
2366 | { | |
2367 | *error_message = "cannot extract L32R destination for TLS access"; | |
0a1b45a2 | 2368 | return false; |
28dbbc02 BW |
2369 | } |
2370 | break; | |
2371 | ||
2372 | case R_XTENSA_TLS_CALL: | |
2373 | if (! get_indirect_call_dest_reg (old_op, &dest_reg) | |
2374 | || xtensa_operand_get_field (isa, old_op, 0, fmt, 0, | |
2375 | sbuff, &src_reg) != 0) | |
2376 | { | |
2377 | *error_message = "cannot extract CALLXn operands for TLS access"; | |
0a1b45a2 | 2378 | return false; |
28dbbc02 BW |
2379 | } |
2380 | break; | |
2381 | ||
2382 | default: | |
2383 | abort (); | |
2384 | } | |
2385 | ||
2386 | if (is_ld_model) | |
2387 | { | |
2388 | switch (r_type) | |
2389 | { | |
2390 | case R_XTENSA_TLS_FUNC: | |
2391 | case R_XTENSA_TLS_ARG: | |
2392 | /* Change the instruction to a NOP (or "OR a1, a1, a1" for older | |
2393 | versions of Xtensa). */ | |
2394 | new_op = xtensa_opcode_lookup (isa, "nop"); | |
2395 | if (new_op == XTENSA_UNDEFINED) | |
2396 | { | |
2397 | new_op = xtensa_opcode_lookup (isa, "or"); | |
2398 | if (new_op == XTENSA_UNDEFINED | |
2399 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2400 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2401 | sbuff, 1) != 0 | |
2402 | || xtensa_operand_set_field (isa, new_op, 1, fmt, 0, | |
2403 | sbuff, 1) != 0 | |
2404 | || xtensa_operand_set_field (isa, new_op, 2, fmt, 0, | |
2405 | sbuff, 1) != 0) | |
2406 | { | |
2407 | *error_message = "cannot encode OR for TLS access"; | |
0a1b45a2 | 2408 | return false; |
28dbbc02 BW |
2409 | } |
2410 | } | |
2411 | else | |
2412 | { | |
2413 | if (xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0) | |
2414 | { | |
2415 | *error_message = "cannot encode NOP for TLS access"; | |
0a1b45a2 | 2416 | return false; |
28dbbc02 BW |
2417 | } |
2418 | } | |
2419 | break; | |
2420 | ||
2421 | case R_XTENSA_TLS_CALL: | |
2422 | /* Read THREADPTR into the CALLX's return value register. */ | |
2423 | new_op = xtensa_opcode_lookup (isa, "rur.threadptr"); | |
2424 | if (new_op == XTENSA_UNDEFINED | |
2425 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2426 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2427 | sbuff, dest_reg + 2) != 0) | |
2428 | { | |
2429 | *error_message = "cannot encode RUR.THREADPTR for TLS access"; | |
0a1b45a2 | 2430 | return false; |
28dbbc02 BW |
2431 | } |
2432 | break; | |
2433 | } | |
2434 | } | |
2435 | else | |
2436 | { | |
2437 | switch (r_type) | |
2438 | { | |
2439 | case R_XTENSA_TLS_FUNC: | |
2440 | new_op = xtensa_opcode_lookup (isa, "rur.threadptr"); | |
2441 | if (new_op == XTENSA_UNDEFINED | |
2442 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2443 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2444 | sbuff, dest_reg) != 0) | |
2445 | { | |
2446 | *error_message = "cannot encode RUR.THREADPTR for TLS access"; | |
0a1b45a2 | 2447 | return false; |
28dbbc02 BW |
2448 | } |
2449 | break; | |
2450 | ||
2451 | case R_XTENSA_TLS_ARG: | |
2452 | /* Nothing to do. Keep the original L32R instruction. */ | |
0a1b45a2 | 2453 | return true; |
28dbbc02 BW |
2454 | |
2455 | case R_XTENSA_TLS_CALL: | |
2456 | /* Add the CALLX's src register (holding the THREADPTR value) | |
2457 | to the first argument register (holding the offset) and put | |
2458 | the result in the CALLX's return value register. */ | |
2459 | new_op = xtensa_opcode_lookup (isa, "add"); | |
2460 | if (new_op == XTENSA_UNDEFINED | |
2461 | || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 | |
2462 | || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, | |
2463 | sbuff, dest_reg + 2) != 0 | |
2464 | || xtensa_operand_set_field (isa, new_op, 1, fmt, 0, | |
2465 | sbuff, dest_reg + 2) != 0 | |
2466 | || xtensa_operand_set_field (isa, new_op, 2, fmt, 0, | |
2467 | sbuff, src_reg) != 0) | |
2468 | { | |
2469 | *error_message = "cannot encode ADD for TLS access"; | |
0a1b45a2 | 2470 | return false; |
28dbbc02 BW |
2471 | } |
2472 | break; | |
2473 | } | |
2474 | } | |
2475 | ||
2476 | xtensa_format_set_slot (isa, fmt, 0, ibuff, sbuff); | |
2477 | xtensa_insnbuf_to_chars (isa, ibuff, contents + rel->r_offset, | |
07d6d2b8 | 2478 | input_size - rel->r_offset); |
28dbbc02 | 2479 | |
0a1b45a2 | 2480 | return true; |
28dbbc02 BW |
2481 | } |
2482 | ||
2483 | ||
2484 | #define IS_XTENSA_TLS_RELOC(R_TYPE) \ | |
2485 | ((R_TYPE) == R_XTENSA_TLSDESC_FN \ | |
2486 | || (R_TYPE) == R_XTENSA_TLSDESC_ARG \ | |
2487 | || (R_TYPE) == R_XTENSA_TLS_DTPOFF \ | |
2488 | || (R_TYPE) == R_XTENSA_TLS_TPOFF \ | |
2489 | || (R_TYPE) == R_XTENSA_TLS_FUNC \ | |
2490 | || (R_TYPE) == R_XTENSA_TLS_ARG \ | |
2491 | || (R_TYPE) == R_XTENSA_TLS_CALL) | |
2492 | ||
e0001a05 | 2493 | /* Relocate an Xtensa ELF section. This is invoked by the linker for |
1049f94e | 2494 | both relocatable and final links. */ |
e0001a05 | 2495 | |
0f684201 | 2496 | static int |
7fa3d080 BW |
2497 | elf_xtensa_relocate_section (bfd *output_bfd, |
2498 | struct bfd_link_info *info, | |
2499 | bfd *input_bfd, | |
2500 | asection *input_section, | |
2501 | bfd_byte *contents, | |
2502 | Elf_Internal_Rela *relocs, | |
2503 | Elf_Internal_Sym *local_syms, | |
2504 | asection **local_sections) | |
e0001a05 | 2505 | { |
f0e6fdb2 | 2506 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
2507 | Elf_Internal_Shdr *symtab_hdr; |
2508 | Elf_Internal_Rela *rel; | |
2509 | Elf_Internal_Rela *relend; | |
2510 | struct elf_link_hash_entry **sym_hashes; | |
88d65ad6 BW |
2511 | property_table_entry *lit_table = 0; |
2512 | int ltblsize = 0; | |
28dbbc02 | 2513 | char *local_got_tls_types; |
e0001a05 | 2514 | char *error_message = NULL; |
43cd72b9 | 2515 | bfd_size_type input_size; |
28dbbc02 | 2516 | int tls_type; |
e0001a05 | 2517 | |
43cd72b9 BW |
2518 | if (!xtensa_default_isa) |
2519 | xtensa_default_isa = xtensa_isa_init (0, 0); | |
e0001a05 | 2520 | |
7af5d5c4 AM |
2521 | if (!is_xtensa_elf (input_bfd)) |
2522 | { | |
2523 | bfd_set_error (bfd_error_wrong_format); | |
0a1b45a2 | 2524 | return false; |
7af5d5c4 | 2525 | } |
28dbbc02 | 2526 | |
f0e6fdb2 | 2527 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 | 2528 | if (htab == NULL) |
0a1b45a2 | 2529 | return false; |
4dfe6ac6 | 2530 | |
e0001a05 NC |
2531 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
2532 | sym_hashes = elf_sym_hashes (input_bfd); | |
28dbbc02 | 2533 | local_got_tls_types = elf_xtensa_local_got_tls_type (input_bfd); |
e0001a05 | 2534 | |
88d65ad6 BW |
2535 | if (elf_hash_table (info)->dynamic_sections_created) |
2536 | { | |
2537 | ltblsize = xtensa_read_table_entries (input_bfd, input_section, | |
43cd72b9 | 2538 | &lit_table, XTENSA_LIT_SEC_NAME, |
0a1b45a2 | 2539 | true); |
88d65ad6 | 2540 | if (ltblsize < 0) |
0a1b45a2 | 2541 | return false; |
88d65ad6 BW |
2542 | } |
2543 | ||
43cd72b9 BW |
2544 | input_size = bfd_get_section_limit (input_bfd, input_section); |
2545 | ||
e0001a05 NC |
2546 | rel = relocs; |
2547 | relend = relocs + input_section->reloc_count; | |
2548 | for (; rel < relend; rel++) | |
2549 | { | |
2550 | int r_type; | |
2551 | reloc_howto_type *howto; | |
2552 | unsigned long r_symndx; | |
2553 | struct elf_link_hash_entry *h; | |
2554 | Elf_Internal_Sym *sym; | |
28dbbc02 BW |
2555 | char sym_type; |
2556 | const char *name; | |
e0001a05 NC |
2557 | asection *sec; |
2558 | bfd_vma relocation; | |
2559 | bfd_reloc_status_type r; | |
0a1b45a2 AM |
2560 | bool is_weak_undef; |
2561 | bool unresolved_reloc; | |
2562 | bool warned; | |
2563 | bool dynamic_symbol; | |
e0001a05 NC |
2564 | |
2565 | r_type = ELF32_R_TYPE (rel->r_info); | |
2566 | if (r_type == (int) R_XTENSA_GNU_VTINHERIT | |
2567 | || r_type == (int) R_XTENSA_GNU_VTENTRY) | |
2568 | continue; | |
2569 | ||
2570 | if (r_type < 0 || r_type >= (int) R_XTENSA_max) | |
2571 | { | |
2572 | bfd_set_error (bfd_error_bad_value); | |
0a1b45a2 | 2573 | return false; |
e0001a05 NC |
2574 | } |
2575 | howto = &elf_howto_table[r_type]; | |
2576 | ||
2577 | r_symndx = ELF32_R_SYM (rel->r_info); | |
2578 | ||
ab96bf03 AM |
2579 | h = NULL; |
2580 | sym = NULL; | |
2581 | sec = NULL; | |
0a1b45a2 AM |
2582 | is_weak_undef = false; |
2583 | unresolved_reloc = false; | |
2584 | warned = false; | |
ab96bf03 | 2585 | |
0e1862bb | 2586 | if (howto->partial_inplace && !bfd_link_relocatable (info)) |
ab96bf03 AM |
2587 | { |
2588 | /* Because R_XTENSA_32 was made partial_inplace to fix some | |
2589 | problems with DWARF info in partial links, there may be | |
2590 | an addend stored in the contents. Take it out of there | |
2591 | and move it back into the addend field of the reloc. */ | |
2592 | rel->r_addend += bfd_get_32 (input_bfd, contents + rel->r_offset); | |
2593 | bfd_put_32 (input_bfd, 0, contents + rel->r_offset); | |
2594 | } | |
2595 | ||
2596 | if (r_symndx < symtab_hdr->sh_info) | |
2597 | { | |
2598 | sym = local_syms + r_symndx; | |
28dbbc02 | 2599 | sym_type = ELF32_ST_TYPE (sym->st_info); |
ab96bf03 AM |
2600 | sec = local_sections[r_symndx]; |
2601 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
2602 | } | |
2603 | else | |
2604 | { | |
0a1b45a2 | 2605 | bool ignored; |
62d887d4 | 2606 | |
ab96bf03 AM |
2607 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
2608 | r_symndx, symtab_hdr, sym_hashes, | |
2609 | h, sec, relocation, | |
62d887d4 | 2610 | unresolved_reloc, warned, ignored); |
ab96bf03 AM |
2611 | |
2612 | if (relocation == 0 | |
2613 | && !unresolved_reloc | |
2614 | && h->root.type == bfd_link_hash_undefweak) | |
0a1b45a2 | 2615 | is_weak_undef = true; |
28dbbc02 BW |
2616 | |
2617 | sym_type = h->type; | |
ab96bf03 AM |
2618 | } |
2619 | ||
dbaa2011 | 2620 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 2621 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 2622 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 2623 | |
0e1862bb | 2624 | if (bfd_link_relocatable (info)) |
e0001a05 | 2625 | { |
7aa09196 SA |
2626 | bfd_vma dest_addr; |
2627 | asection * sym_sec = get_elf_r_symndx_section (input_bfd, r_symndx); | |
2628 | ||
43cd72b9 | 2629 | /* This is a relocatable link. |
e0001a05 NC |
2630 | 1) If the reloc is against a section symbol, adjust |
2631 | according to the output section. | |
2632 | 2) If there is a new target for this relocation, | |
2633 | the new target will be in the same output section. | |
2634 | We adjust the relocation by the output section | |
2635 | difference. */ | |
2636 | ||
2637 | if (relaxing_section) | |
2638 | { | |
2639 | /* Check if this references a section in another input file. */ | |
43cd72b9 BW |
2640 | if (!do_fix_for_relocatable_link (rel, input_bfd, input_section, |
2641 | contents)) | |
0a1b45a2 | 2642 | return false; |
e0001a05 NC |
2643 | } |
2644 | ||
7aa09196 SA |
2645 | dest_addr = sym_sec->output_section->vma + sym_sec->output_offset |
2646 | + get_elf_r_symndx_offset (input_bfd, r_symndx) + rel->r_addend; | |
2647 | ||
43cd72b9 | 2648 | if (r_type == R_XTENSA_ASM_SIMPLIFY) |
e0001a05 | 2649 | { |
91d6fa6a | 2650 | error_message = NULL; |
e0001a05 NC |
2651 | /* Convert ASM_SIMPLIFY into the simpler relocation |
2652 | so that they never escape a relaxing link. */ | |
43cd72b9 BW |
2653 | r = contract_asm_expansion (contents, input_size, rel, |
2654 | &error_message); | |
2655 | if (r != bfd_reloc_ok) | |
1a72702b AM |
2656 | (*info->callbacks->reloc_dangerous) |
2657 | (info, error_message, | |
2658 | input_bfd, input_section, rel->r_offset); | |
2659 | ||
e0001a05 NC |
2660 | r_type = ELF32_R_TYPE (rel->r_info); |
2661 | } | |
2662 | ||
1049f94e | 2663 | /* This is a relocatable link, so we don't have to change |
e0001a05 NC |
2664 | anything unless the reloc is against a section symbol, |
2665 | in which case we have to adjust according to where the | |
2666 | section symbol winds up in the output section. */ | |
2667 | if (r_symndx < symtab_hdr->sh_info) | |
2668 | { | |
2669 | sym = local_syms + r_symndx; | |
2670 | if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
2671 | { | |
2672 | sec = local_sections[r_symndx]; | |
2673 | rel->r_addend += sec->output_offset + sym->st_value; | |
2674 | } | |
2675 | } | |
2676 | ||
2677 | /* If there is an addend with a partial_inplace howto, | |
2678 | then move the addend to the contents. This is a hack | |
1049f94e | 2679 | to work around problems with DWARF in relocatable links |
e0001a05 NC |
2680 | with some previous version of BFD. Now we can't easily get |
2681 | rid of the hack without breaking backward compatibility.... */ | |
7aa09196 SA |
2682 | r = bfd_reloc_ok; |
2683 | howto = &elf_howto_table[r_type]; | |
2684 | if (howto->partial_inplace && rel->r_addend) | |
2685 | { | |
2686 | r = elf_xtensa_do_reloc (howto, input_bfd, input_section, | |
2687 | rel->r_addend, contents, | |
0a1b45a2 | 2688 | rel->r_offset, false, |
7aa09196 SA |
2689 | &error_message); |
2690 | rel->r_addend = 0; | |
2691 | } | |
2692 | else | |
e0001a05 | 2693 | { |
7aa09196 SA |
2694 | /* Put the correct bits in the target instruction, even |
2695 | though the relocation will still be present in the output | |
2696 | file. This makes disassembly clearer, as well as | |
2697 | allowing loadable kernel modules to work without needing | |
2698 | relocations on anything other than calls and l32r's. */ | |
2699 | ||
2700 | /* If it is not in the same section, there is nothing we can do. */ | |
2701 | if (r_type >= R_XTENSA_SLOT0_OP && r_type <= R_XTENSA_SLOT14_OP && | |
2702 | sym_sec->output_section == input_section->output_section) | |
e0001a05 NC |
2703 | { |
2704 | r = elf_xtensa_do_reloc (howto, input_bfd, input_section, | |
7aa09196 | 2705 | dest_addr, contents, |
0a1b45a2 | 2706 | rel->r_offset, false, |
e0001a05 | 2707 | &error_message); |
e0001a05 NC |
2708 | } |
2709 | } | |
7aa09196 | 2710 | if (r != bfd_reloc_ok) |
1a72702b AM |
2711 | (*info->callbacks->reloc_dangerous) |
2712 | (info, error_message, | |
2713 | input_bfd, input_section, rel->r_offset); | |
e0001a05 | 2714 | |
1049f94e | 2715 | /* Done with work for relocatable link; continue with next reloc. */ |
e0001a05 NC |
2716 | continue; |
2717 | } | |
2718 | ||
2719 | /* This is a final link. */ | |
2720 | ||
e0001a05 NC |
2721 | if (relaxing_section) |
2722 | { | |
2723 | /* Check if this references a section in another input file. */ | |
43cd72b9 BW |
2724 | do_fix_for_final_link (rel, input_bfd, input_section, contents, |
2725 | &relocation); | |
e0001a05 NC |
2726 | } |
2727 | ||
2728 | /* Sanity check the address. */ | |
43cd72b9 | 2729 | if (rel->r_offset >= input_size |
e0001a05 NC |
2730 | && ELF32_R_TYPE (rel->r_info) != R_XTENSA_NONE) |
2731 | { | |
4eca0228 | 2732 | _bfd_error_handler |
695344c0 | 2733 | /* xgettext:c-format */ |
2dcf00ce AM |
2734 | (_("%pB(%pA+%#" PRIx64 "): " |
2735 | "relocation offset out of range (size=%#" PRIx64 ")"), | |
2736 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
2737 | (uint64_t) input_size); | |
e0001a05 | 2738 | bfd_set_error (bfd_error_bad_value); |
0a1b45a2 | 2739 | return false; |
e0001a05 NC |
2740 | } |
2741 | ||
28dbbc02 BW |
2742 | if (h != NULL) |
2743 | name = h->root.root.string; | |
2744 | else | |
e0001a05 | 2745 | { |
28dbbc02 BW |
2746 | name = (bfd_elf_string_from_elf_section |
2747 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
2748 | if (name == NULL || *name == '\0') | |
fd361982 | 2749 | name = bfd_section_name (sec); |
28dbbc02 | 2750 | } |
e0001a05 | 2751 | |
cf35638d | 2752 | if (r_symndx != STN_UNDEF |
28dbbc02 BW |
2753 | && r_type != R_XTENSA_NONE |
2754 | && (h == NULL | |
2755 | || h->root.type == bfd_link_hash_defined | |
2756 | || h->root.type == bfd_link_hash_defweak) | |
2757 | && IS_XTENSA_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
2758 | { | |
4eca0228 | 2759 | _bfd_error_handler |
28dbbc02 | 2760 | ((sym_type == STT_TLS |
695344c0 | 2761 | /* xgettext:c-format */ |
2dcf00ce | 2762 | ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s") |
695344c0 | 2763 | /* xgettext:c-format */ |
2dcf00ce | 2764 | : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")), |
28dbbc02 BW |
2765 | input_bfd, |
2766 | input_section, | |
2dcf00ce | 2767 | (uint64_t) rel->r_offset, |
28dbbc02 BW |
2768 | howto->name, |
2769 | name); | |
2770 | } | |
2771 | ||
2772 | dynamic_symbol = elf_xtensa_dynamic_symbol_p (h, info); | |
2773 | ||
2774 | tls_type = GOT_UNKNOWN; | |
2775 | if (h) | |
2776 | tls_type = elf_xtensa_hash_entry (h)->tls_type; | |
2777 | else if (local_got_tls_types) | |
2778 | tls_type = local_got_tls_types [r_symndx]; | |
2779 | ||
2780 | switch (r_type) | |
2781 | { | |
2782 | case R_XTENSA_32: | |
2783 | case R_XTENSA_PLT: | |
2784 | if (elf_hash_table (info)->dynamic_sections_created | |
2785 | && (input_section->flags & SEC_ALLOC) != 0 | |
0e1862bb | 2786 | && (dynamic_symbol || bfd_link_pic (info))) |
e0001a05 NC |
2787 | { |
2788 | Elf_Internal_Rela outrel; | |
2789 | bfd_byte *loc; | |
2790 | asection *srel; | |
2791 | ||
2792 | if (dynamic_symbol && r_type == R_XTENSA_PLT) | |
ce558b89 | 2793 | srel = htab->elf.srelplt; |
e0001a05 | 2794 | else |
ce558b89 | 2795 | srel = htab->elf.srelgot; |
e0001a05 NC |
2796 | |
2797 | BFD_ASSERT (srel != NULL); | |
2798 | ||
2799 | outrel.r_offset = | |
2800 | _bfd_elf_section_offset (output_bfd, info, | |
2801 | input_section, rel->r_offset); | |
2802 | ||
2803 | if ((outrel.r_offset | 1) == (bfd_vma) -1) | |
2804 | memset (&outrel, 0, sizeof outrel); | |
2805 | else | |
2806 | { | |
f0578e28 BW |
2807 | outrel.r_offset += (input_section->output_section->vma |
2808 | + input_section->output_offset); | |
e0001a05 | 2809 | |
88d65ad6 BW |
2810 | /* Complain if the relocation is in a read-only section |
2811 | and not in a literal pool. */ | |
2812 | if ((input_section->flags & SEC_READONLY) != 0 | |
2813 | && !elf_xtensa_in_literal_pool (lit_table, ltblsize, | |
3ba3bc8c | 2814 | outrel.r_offset)) |
88d65ad6 BW |
2815 | { |
2816 | error_message = | |
2817 | _("dynamic relocation in read-only section"); | |
1a72702b AM |
2818 | (*info->callbacks->reloc_dangerous) |
2819 | (info, error_message, | |
2820 | input_bfd, input_section, rel->r_offset); | |
88d65ad6 BW |
2821 | } |
2822 | ||
e0001a05 NC |
2823 | if (dynamic_symbol) |
2824 | { | |
2825 | outrel.r_addend = rel->r_addend; | |
2826 | rel->r_addend = 0; | |
2827 | ||
2828 | if (r_type == R_XTENSA_32) | |
2829 | { | |
2830 | outrel.r_info = | |
2831 | ELF32_R_INFO (h->dynindx, R_XTENSA_GLOB_DAT); | |
2832 | relocation = 0; | |
2833 | } | |
2834 | else /* r_type == R_XTENSA_PLT */ | |
2835 | { | |
2836 | outrel.r_info = | |
2837 | ELF32_R_INFO (h->dynindx, R_XTENSA_JMP_SLOT); | |
2838 | ||
2839 | /* Create the PLT entry and set the initial | |
2840 | contents of the literal entry to the address of | |
2841 | the PLT entry. */ | |
43cd72b9 | 2842 | relocation = |
f0e6fdb2 | 2843 | elf_xtensa_create_plt_entry (info, output_bfd, |
e0001a05 NC |
2844 | srel->reloc_count); |
2845 | } | |
0a1b45a2 | 2846 | unresolved_reloc = false; |
e0001a05 | 2847 | } |
c451bb34 | 2848 | else if (!is_weak_undef) |
e0001a05 NC |
2849 | { |
2850 | /* Generate a RELATIVE relocation. */ | |
2851 | outrel.r_info = ELF32_R_INFO (0, R_XTENSA_RELATIVE); | |
2852 | outrel.r_addend = 0; | |
2853 | } | |
c451bb34 MF |
2854 | else |
2855 | { | |
2856 | continue; | |
2857 | } | |
e0001a05 NC |
2858 | } |
2859 | ||
2860 | loc = (srel->contents | |
2861 | + srel->reloc_count++ * sizeof (Elf32_External_Rela)); | |
2862 | bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); | |
2863 | BFD_ASSERT (sizeof (Elf32_External_Rela) * srel->reloc_count | |
eea6121a | 2864 | <= srel->size); |
e0001a05 | 2865 | } |
d9ab3f29 BW |
2866 | else if (r_type == R_XTENSA_ASM_EXPAND && dynamic_symbol) |
2867 | { | |
2868 | /* This should only happen for non-PIC code, which is not | |
2869 | supposed to be used on systems with dynamic linking. | |
2870 | Just ignore these relocations. */ | |
2871 | continue; | |
2872 | } | |
28dbbc02 BW |
2873 | break; |
2874 | ||
2875 | case R_XTENSA_TLS_TPOFF: | |
2876 | /* Switch to LE model for local symbols in an executable. */ | |
0e1862bb | 2877 | if (! bfd_link_pic (info) && ! dynamic_symbol) |
28dbbc02 BW |
2878 | { |
2879 | relocation = tpoff (info, relocation); | |
2880 | break; | |
2881 | } | |
2882 | /* fall through */ | |
2883 | ||
2884 | case R_XTENSA_TLSDESC_FN: | |
2885 | case R_XTENSA_TLSDESC_ARG: | |
2886 | { | |
2887 | if (r_type == R_XTENSA_TLSDESC_FN) | |
2888 | { | |
0e1862bb | 2889 | if (! bfd_link_pic (info) || (tls_type & GOT_TLS_IE) != 0) |
28dbbc02 BW |
2890 | r_type = R_XTENSA_NONE; |
2891 | } | |
2892 | else if (r_type == R_XTENSA_TLSDESC_ARG) | |
2893 | { | |
0e1862bb | 2894 | if (bfd_link_pic (info)) |
28dbbc02 BW |
2895 | { |
2896 | if ((tls_type & GOT_TLS_IE) != 0) | |
2897 | r_type = R_XTENSA_TLS_TPOFF; | |
2898 | } | |
2899 | else | |
2900 | { | |
2901 | r_type = R_XTENSA_TLS_TPOFF; | |
2902 | if (! dynamic_symbol) | |
2903 | { | |
2904 | relocation = tpoff (info, relocation); | |
2905 | break; | |
2906 | } | |
2907 | } | |
2908 | } | |
2909 | ||
2910 | if (r_type == R_XTENSA_NONE) | |
2911 | /* Nothing to do here; skip to the next reloc. */ | |
2912 | continue; | |
2913 | ||
2914 | if (! elf_hash_table (info)->dynamic_sections_created) | |
2915 | { | |
2916 | error_message = | |
2917 | _("TLS relocation invalid without dynamic sections"); | |
1a72702b AM |
2918 | (*info->callbacks->reloc_dangerous) |
2919 | (info, error_message, | |
2920 | input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
2921 | } |
2922 | else | |
2923 | { | |
2924 | Elf_Internal_Rela outrel; | |
2925 | bfd_byte *loc; | |
ce558b89 | 2926 | asection *srel = htab->elf.srelgot; |
28dbbc02 BW |
2927 | int indx; |
2928 | ||
2929 | outrel.r_offset = (input_section->output_section->vma | |
2930 | + input_section->output_offset | |
2931 | + rel->r_offset); | |
2932 | ||
2933 | /* Complain if the relocation is in a read-only section | |
2934 | and not in a literal pool. */ | |
2935 | if ((input_section->flags & SEC_READONLY) != 0 | |
2936 | && ! elf_xtensa_in_literal_pool (lit_table, ltblsize, | |
2937 | outrel.r_offset)) | |
2938 | { | |
2939 | error_message = | |
2940 | _("dynamic relocation in read-only section"); | |
1a72702b AM |
2941 | (*info->callbacks->reloc_dangerous) |
2942 | (info, error_message, | |
2943 | input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
2944 | } |
2945 | ||
2946 | indx = h && h->dynindx != -1 ? h->dynindx : 0; | |
2947 | if (indx == 0) | |
2948 | outrel.r_addend = relocation - dtpoff_base (info); | |
2949 | else | |
2950 | outrel.r_addend = 0; | |
2951 | rel->r_addend = 0; | |
2952 | ||
2953 | outrel.r_info = ELF32_R_INFO (indx, r_type); | |
2954 | relocation = 0; | |
0a1b45a2 | 2955 | unresolved_reloc = false; |
28dbbc02 BW |
2956 | |
2957 | BFD_ASSERT (srel); | |
2958 | loc = (srel->contents | |
2959 | + srel->reloc_count++ * sizeof (Elf32_External_Rela)); | |
2960 | bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); | |
2961 | BFD_ASSERT (sizeof (Elf32_External_Rela) * srel->reloc_count | |
2962 | <= srel->size); | |
2963 | } | |
2964 | } | |
2965 | break; | |
2966 | ||
2967 | case R_XTENSA_TLS_DTPOFF: | |
0e1862bb | 2968 | if (! bfd_link_pic (info)) |
28dbbc02 BW |
2969 | /* Switch from LD model to LE model. */ |
2970 | relocation = tpoff (info, relocation); | |
2971 | else | |
2972 | relocation -= dtpoff_base (info); | |
2973 | break; | |
2974 | ||
2975 | case R_XTENSA_TLS_FUNC: | |
2976 | case R_XTENSA_TLS_ARG: | |
2977 | case R_XTENSA_TLS_CALL: | |
2978 | /* Check if optimizing to IE or LE model. */ | |
2979 | if ((tls_type & GOT_TLS_IE) != 0) | |
2980 | { | |
0a1b45a2 | 2981 | bool is_ld_model = |
28dbbc02 BW |
2982 | (h && elf_xtensa_hash_entry (h) == htab->tlsbase); |
2983 | if (! replace_tls_insn (rel, input_bfd, input_section, contents, | |
2984 | is_ld_model, &error_message)) | |
1a72702b AM |
2985 | (*info->callbacks->reloc_dangerous) |
2986 | (info, error_message, | |
2987 | input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
2988 | |
2989 | if (r_type != R_XTENSA_TLS_ARG || is_ld_model) | |
2990 | { | |
2991 | /* Skip subsequent relocations on the same instruction. */ | |
2992 | while (rel + 1 < relend && rel[1].r_offset == rel->r_offset) | |
2993 | rel++; | |
2994 | } | |
2995 | } | |
2996 | continue; | |
2997 | ||
2998 | default: | |
2999 | if (elf_hash_table (info)->dynamic_sections_created | |
3000 | && dynamic_symbol && (is_operand_relocation (r_type) | |
3001 | || r_type == R_XTENSA_32_PCREL)) | |
3002 | { | |
3003 | error_message = | |
3004 | vsprint_msg ("invalid relocation for dynamic symbol", ": %s", | |
3005 | strlen (name) + 2, name); | |
1a72702b AM |
3006 | (*info->callbacks->reloc_dangerous) |
3007 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
28dbbc02 BW |
3008 | continue; |
3009 | } | |
3010 | break; | |
e0001a05 NC |
3011 | } |
3012 | ||
3013 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
3014 | because such sections are not SEC_ALLOC and thus ld.so will | |
3015 | not process them. */ | |
3016 | if (unresolved_reloc | |
3017 | && !((input_section->flags & SEC_DEBUGGING) != 0 | |
1d5316ab AM |
3018 | && h->def_dynamic) |
3019 | && _bfd_elf_section_offset (output_bfd, info, input_section, | |
3020 | rel->r_offset) != (bfd_vma) -1) | |
bf1747de | 3021 | { |
4eca0228 | 3022 | _bfd_error_handler |
695344c0 | 3023 | /* xgettext:c-format */ |
2dcf00ce AM |
3024 | (_("%pB(%pA+%#" PRIx64 "): " |
3025 | "unresolvable %s relocation against symbol `%s'"), | |
bf1747de BW |
3026 | input_bfd, |
3027 | input_section, | |
2dcf00ce | 3028 | (uint64_t) rel->r_offset, |
bf1747de | 3029 | howto->name, |
28dbbc02 | 3030 | name); |
0a1b45a2 | 3031 | return false; |
bf1747de | 3032 | } |
e0001a05 | 3033 | |
28dbbc02 BW |
3034 | /* TLS optimizations may have changed r_type; update "howto". */ |
3035 | howto = &elf_howto_table[r_type]; | |
3036 | ||
e0001a05 NC |
3037 | /* There's no point in calling bfd_perform_relocation here. |
3038 | Just go directly to our "special function". */ | |
3039 | r = elf_xtensa_do_reloc (howto, input_bfd, input_section, | |
3040 | relocation + rel->r_addend, | |
3041 | contents, rel->r_offset, is_weak_undef, | |
3042 | &error_message); | |
43cd72b9 | 3043 | |
9b8c98a4 | 3044 | if (r != bfd_reloc_ok && !warned) |
e0001a05 | 3045 | { |
43cd72b9 | 3046 | BFD_ASSERT (r == bfd_reloc_dangerous || r == bfd_reloc_other); |
7fa3d080 | 3047 | BFD_ASSERT (error_message != NULL); |
e0001a05 | 3048 | |
28dbbc02 BW |
3049 | if (rel->r_addend == 0) |
3050 | error_message = vsprint_msg (error_message, ": %s", | |
3051 | strlen (name) + 2, name); | |
e0001a05 | 3052 | else |
28dbbc02 BW |
3053 | error_message = vsprint_msg (error_message, ": (%s+0x%x)", |
3054 | strlen (name) + 22, | |
3055 | name, (int) rel->r_addend); | |
43cd72b9 | 3056 | |
1a72702b AM |
3057 | (*info->callbacks->reloc_dangerous) |
3058 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
e0001a05 NC |
3059 | } |
3060 | } | |
3061 | ||
c9594989 | 3062 | free (lit_table); |
0a1b45a2 | 3063 | input_section->reloc_done = true; |
3ba3bc8c | 3064 | |
0a1b45a2 | 3065 | return true; |
e0001a05 NC |
3066 | } |
3067 | ||
3068 | ||
3069 | /* Finish up dynamic symbol handling. There's not much to do here since | |
3070 | the PLT and GOT entries are all set up by relocate_section. */ | |
3071 | ||
0a1b45a2 | 3072 | static bool |
7fa3d080 BW |
3073 | elf_xtensa_finish_dynamic_symbol (bfd *output_bfd ATTRIBUTE_UNUSED, |
3074 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
3075 | struct elf_link_hash_entry *h, | |
3076 | Elf_Internal_Sym *sym) | |
e0001a05 | 3077 | { |
bf1747de | 3078 | if (h->needs_plt && !h->def_regular) |
e0001a05 NC |
3079 | { |
3080 | /* Mark the symbol as undefined, rather than as defined in | |
3081 | the .plt section. Leave the value alone. */ | |
3082 | sym->st_shndx = SHN_UNDEF; | |
bf1747de BW |
3083 | /* If the symbol is weak, we do need to clear the value. |
3084 | Otherwise, the PLT entry would provide a definition for | |
3085 | the symbol even if the symbol wasn't defined anywhere, | |
3086 | and so the symbol would never be NULL. */ | |
3087 | if (!h->ref_regular_nonweak) | |
3088 | sym->st_value = 0; | |
e0001a05 NC |
3089 | } |
3090 | ||
3091 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ | |
9637f6ef | 3092 | if (h == elf_hash_table (info)->hdynamic |
22edb2f1 | 3093 | || h == elf_hash_table (info)->hgot) |
e0001a05 NC |
3094 | sym->st_shndx = SHN_ABS; |
3095 | ||
0a1b45a2 | 3096 | return true; |
e0001a05 NC |
3097 | } |
3098 | ||
3099 | ||
3100 | /* Combine adjacent literal table entries in the output. Adjacent | |
3101 | entries within each input section may have been removed during | |
3102 | relaxation, but we repeat the process here, even though it's too late | |
3103 | to shrink the output section, because it's important to minimize the | |
3104 | number of literal table entries to reduce the start-up work for the | |
3105 | runtime linker. Returns the number of remaining table entries or -1 | |
3106 | on error. */ | |
3107 | ||
3108 | static int | |
7fa3d080 BW |
3109 | elf_xtensa_combine_prop_entries (bfd *output_bfd, |
3110 | asection *sxtlit, | |
3111 | asection *sgotloc) | |
e0001a05 | 3112 | { |
e0001a05 NC |
3113 | bfd_byte *contents; |
3114 | property_table_entry *table; | |
e901de89 | 3115 | bfd_size_type section_size, sgotloc_size; |
e0001a05 NC |
3116 | bfd_vma offset; |
3117 | int n, m, num; | |
3118 | ||
eea6121a | 3119 | section_size = sxtlit->size; |
252e57fd AM |
3120 | if (section_size == 0) |
3121 | return 0; | |
3122 | ||
e0001a05 NC |
3123 | BFD_ASSERT (section_size % 8 == 0); |
3124 | num = section_size / 8; | |
3125 | ||
eea6121a | 3126 | sgotloc_size = sgotloc->size; |
e901de89 | 3127 | if (sgotloc_size != section_size) |
b536dc1e | 3128 | { |
4eca0228 | 3129 | _bfd_error_handler |
43cd72b9 | 3130 | (_("internal inconsistency in size of .got.loc section")); |
b536dc1e BW |
3131 | return -1; |
3132 | } | |
e901de89 | 3133 | |
eea6121a AM |
3134 | table = bfd_malloc (num * sizeof (property_table_entry)); |
3135 | if (table == 0) | |
e0001a05 NC |
3136 | return -1; |
3137 | ||
3138 | /* The ".xt.lit.plt" section has the SEC_IN_MEMORY flag set and this | |
3139 | propagates to the output section, where it doesn't really apply and | |
eea6121a | 3140 | where it breaks the following call to bfd_malloc_and_get_section. */ |
e901de89 | 3141 | sxtlit->flags &= ~SEC_IN_MEMORY; |
e0001a05 | 3142 | |
eea6121a AM |
3143 | if (!bfd_malloc_and_get_section (output_bfd, sxtlit, &contents)) |
3144 | { | |
c9594989 | 3145 | free (contents); |
eea6121a AM |
3146 | free (table); |
3147 | return -1; | |
3148 | } | |
e0001a05 NC |
3149 | |
3150 | /* There should never be any relocations left at this point, so this | |
3151 | is quite a bit easier than what is done during relaxation. */ | |
3152 | ||
3153 | /* Copy the raw contents into a property table array and sort it. */ | |
3154 | offset = 0; | |
3155 | for (n = 0; n < num; n++) | |
3156 | { | |
3157 | table[n].address = bfd_get_32 (output_bfd, &contents[offset]); | |
3158 | table[n].size = bfd_get_32 (output_bfd, &contents[offset + 4]); | |
3159 | offset += 8; | |
3160 | } | |
3161 | qsort (table, num, sizeof (property_table_entry), property_table_compare); | |
3162 | ||
3163 | for (n = 0; n < num; n++) | |
3164 | { | |
0a1b45a2 | 3165 | bool remove_entry = false; |
e0001a05 NC |
3166 | |
3167 | if (table[n].size == 0) | |
0a1b45a2 | 3168 | remove_entry = true; |
91d6fa6a NC |
3169 | else if (n > 0 |
3170 | && (table[n-1].address + table[n-1].size == table[n].address)) | |
e0001a05 NC |
3171 | { |
3172 | table[n-1].size += table[n].size; | |
0a1b45a2 | 3173 | remove_entry = true; |
e0001a05 NC |
3174 | } |
3175 | ||
91d6fa6a | 3176 | if (remove_entry) |
e0001a05 NC |
3177 | { |
3178 | for (m = n; m < num - 1; m++) | |
3179 | { | |
3180 | table[m].address = table[m+1].address; | |
3181 | table[m].size = table[m+1].size; | |
3182 | } | |
3183 | ||
3184 | n--; | |
3185 | num--; | |
3186 | } | |
3187 | } | |
3188 | ||
3189 | /* Copy the data back to the raw contents. */ | |
3190 | offset = 0; | |
3191 | for (n = 0; n < num; n++) | |
3192 | { | |
3193 | bfd_put_32 (output_bfd, table[n].address, &contents[offset]); | |
3194 | bfd_put_32 (output_bfd, table[n].size, &contents[offset + 4]); | |
3195 | offset += 8; | |
3196 | } | |
3197 | ||
3198 | /* Clear the removed bytes. */ | |
3199 | if ((bfd_size_type) (num * 8) < section_size) | |
b54d4b07 | 3200 | memset (&contents[num * 8], 0, section_size - num * 8); |
e0001a05 | 3201 | |
e901de89 BW |
3202 | if (! bfd_set_section_contents (output_bfd, sxtlit, contents, 0, |
3203 | section_size)) | |
e0001a05 NC |
3204 | return -1; |
3205 | ||
e901de89 BW |
3206 | /* Copy the contents to ".got.loc". */ |
3207 | memcpy (sgotloc->contents, contents, section_size); | |
3208 | ||
e0001a05 | 3209 | free (contents); |
b614a702 | 3210 | free (table); |
e0001a05 NC |
3211 | return num; |
3212 | } | |
3213 | ||
3214 | ||
3215 | /* Finish up the dynamic sections. */ | |
3216 | ||
0a1b45a2 | 3217 | static bool |
7fa3d080 BW |
3218 | elf_xtensa_finish_dynamic_sections (bfd *output_bfd, |
3219 | struct bfd_link_info *info) | |
e0001a05 | 3220 | { |
f0e6fdb2 | 3221 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 | 3222 | bfd *dynobj; |
f82863d7 | 3223 | asection *sdyn, *srelplt, *srelgot, *sgot, *sxtlit, *sgotloc; |
e0001a05 | 3224 | Elf32_External_Dyn *dyncon, *dynconend; |
d9ab3f29 | 3225 | int num_xtlit_entries = 0; |
e0001a05 NC |
3226 | |
3227 | if (! elf_hash_table (info)->dynamic_sections_created) | |
0a1b45a2 | 3228 | return true; |
e0001a05 | 3229 | |
f0e6fdb2 | 3230 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 | 3231 | if (htab == NULL) |
0a1b45a2 | 3232 | return false; |
4dfe6ac6 | 3233 | |
e0001a05 | 3234 | dynobj = elf_hash_table (info)->dynobj; |
3d4d4302 | 3235 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
e0001a05 NC |
3236 | BFD_ASSERT (sdyn != NULL); |
3237 | ||
3238 | /* Set the first entry in the global offset table to the address of | |
3239 | the dynamic section. */ | |
ce558b89 | 3240 | sgot = htab->elf.sgot; |
e0001a05 NC |
3241 | if (sgot) |
3242 | { | |
eea6121a | 3243 | BFD_ASSERT (sgot->size == 4); |
e0001a05 | 3244 | if (sdyn == NULL) |
7fa3d080 | 3245 | bfd_put_32 (output_bfd, 0, sgot->contents); |
e0001a05 NC |
3246 | else |
3247 | bfd_put_32 (output_bfd, | |
3248 | sdyn->output_section->vma + sdyn->output_offset, | |
3249 | sgot->contents); | |
3250 | } | |
3251 | ||
ce558b89 | 3252 | srelplt = htab->elf.srelplt; |
f82863d7 | 3253 | srelgot = htab->elf.srelgot; |
7fa3d080 | 3254 | if (srelplt && srelplt->size != 0) |
e0001a05 | 3255 | { |
f82863d7 | 3256 | asection *sgotplt, *spltlittbl; |
e0001a05 NC |
3257 | int chunk, plt_chunks, plt_entries; |
3258 | Elf_Internal_Rela irela; | |
3259 | bfd_byte *loc; | |
3260 | unsigned rtld_reloc; | |
3261 | ||
f0e6fdb2 BW |
3262 | spltlittbl = htab->spltlittbl; |
3263 | BFD_ASSERT (srelgot != NULL && spltlittbl != NULL); | |
e0001a05 NC |
3264 | |
3265 | /* Find the first XTENSA_RTLD relocation. Presumably the rest | |
3266 | of them follow immediately after.... */ | |
3267 | for (rtld_reloc = 0; rtld_reloc < srelgot->reloc_count; rtld_reloc++) | |
3268 | { | |
3269 | loc = srelgot->contents + rtld_reloc * sizeof (Elf32_External_Rela); | |
3270 | bfd_elf32_swap_reloca_in (output_bfd, loc, &irela); | |
3271 | if (ELF32_R_TYPE (irela.r_info) == R_XTENSA_RTLD) | |
3272 | break; | |
3273 | } | |
3274 | BFD_ASSERT (rtld_reloc < srelgot->reloc_count); | |
3275 | ||
eea6121a | 3276 | plt_entries = srelplt->size / sizeof (Elf32_External_Rela); |
e0001a05 NC |
3277 | plt_chunks = |
3278 | (plt_entries + PLT_ENTRIES_PER_CHUNK - 1) / PLT_ENTRIES_PER_CHUNK; | |
3279 | ||
3280 | for (chunk = 0; chunk < plt_chunks; chunk++) | |
3281 | { | |
3282 | int chunk_entries = 0; | |
3283 | ||
f0e6fdb2 | 3284 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); |
e0001a05 NC |
3285 | BFD_ASSERT (sgotplt != NULL); |
3286 | ||
3287 | /* Emit special RTLD relocations for the first two entries in | |
3288 | each chunk of the .got.plt section. */ | |
3289 | ||
3290 | loc = srelgot->contents + rtld_reloc * sizeof (Elf32_External_Rela); | |
3291 | bfd_elf32_swap_reloca_in (output_bfd, loc, &irela); | |
3292 | BFD_ASSERT (ELF32_R_TYPE (irela.r_info) == R_XTENSA_RTLD); | |
3293 | irela.r_offset = (sgotplt->output_section->vma | |
3294 | + sgotplt->output_offset); | |
3295 | irela.r_addend = 1; /* tell rtld to set value to resolver function */ | |
3296 | bfd_elf32_swap_reloca_out (output_bfd, &irela, loc); | |
3297 | rtld_reloc += 1; | |
3298 | BFD_ASSERT (rtld_reloc <= srelgot->reloc_count); | |
3299 | ||
3300 | /* Next literal immediately follows the first. */ | |
3301 | loc += sizeof (Elf32_External_Rela); | |
3302 | bfd_elf32_swap_reloca_in (output_bfd, loc, &irela); | |
3303 | BFD_ASSERT (ELF32_R_TYPE (irela.r_info) == R_XTENSA_RTLD); | |
3304 | irela.r_offset = (sgotplt->output_section->vma | |
3305 | + sgotplt->output_offset + 4); | |
3306 | /* Tell rtld to set value to object's link map. */ | |
3307 | irela.r_addend = 2; | |
3308 | bfd_elf32_swap_reloca_out (output_bfd, &irela, loc); | |
3309 | rtld_reloc += 1; | |
3310 | BFD_ASSERT (rtld_reloc <= srelgot->reloc_count); | |
3311 | ||
3312 | /* Fill in the literal table. */ | |
3313 | if (chunk < plt_chunks - 1) | |
3314 | chunk_entries = PLT_ENTRIES_PER_CHUNK; | |
3315 | else | |
3316 | chunk_entries = plt_entries - (chunk * PLT_ENTRIES_PER_CHUNK); | |
3317 | ||
eea6121a | 3318 | BFD_ASSERT ((unsigned) (chunk + 1) * 8 <= spltlittbl->size); |
e0001a05 NC |
3319 | bfd_put_32 (output_bfd, |
3320 | sgotplt->output_section->vma + sgotplt->output_offset, | |
3321 | spltlittbl->contents + (chunk * 8) + 0); | |
3322 | bfd_put_32 (output_bfd, | |
3323 | 8 + (chunk_entries * 4), | |
3324 | spltlittbl->contents + (chunk * 8) + 4); | |
3325 | } | |
3326 | ||
e0001a05 NC |
3327 | /* The .xt.lit.plt section has just been modified. This must |
3328 | happen before the code below which combines adjacent literal | |
3329 | table entries, and the .xt.lit.plt contents have to be forced to | |
3330 | the output here. */ | |
3331 | if (! bfd_set_section_contents (output_bfd, | |
3332 | spltlittbl->output_section, | |
3333 | spltlittbl->contents, | |
3334 | spltlittbl->output_offset, | |
eea6121a | 3335 | spltlittbl->size)) |
0a1b45a2 | 3336 | return false; |
e0001a05 NC |
3337 | /* Clear SEC_HAS_CONTENTS so the contents won't be output again. */ |
3338 | spltlittbl->flags &= ~SEC_HAS_CONTENTS; | |
3339 | } | |
3340 | ||
f82863d7 MF |
3341 | /* All the dynamic relocations have been emitted at this point. |
3342 | Make sure the relocation sections are the correct size. */ | |
3343 | if ((srelgot && srelgot->size != (sizeof (Elf32_External_Rela) | |
3344 | * srelgot->reloc_count)) | |
3345 | || (srelplt && srelplt->size != (sizeof (Elf32_External_Rela) | |
3346 | * srelplt->reloc_count))) | |
3347 | abort (); | |
3348 | ||
e0001a05 | 3349 | /* Combine adjacent literal table entries. */ |
0e1862bb | 3350 | BFD_ASSERT (! bfd_link_relocatable (info)); |
e901de89 | 3351 | sxtlit = bfd_get_section_by_name (output_bfd, ".xt.lit"); |
f0e6fdb2 | 3352 | sgotloc = htab->sgotloc; |
d9ab3f29 BW |
3353 | BFD_ASSERT (sgotloc); |
3354 | if (sxtlit) | |
3355 | { | |
3356 | num_xtlit_entries = | |
3357 | elf_xtensa_combine_prop_entries (output_bfd, sxtlit, sgotloc); | |
3358 | if (num_xtlit_entries < 0) | |
0a1b45a2 | 3359 | return false; |
d9ab3f29 | 3360 | } |
e0001a05 NC |
3361 | |
3362 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 3363 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
e0001a05 NC |
3364 | for (; dyncon < dynconend; dyncon++) |
3365 | { | |
3366 | Elf_Internal_Dyn dyn; | |
e0001a05 NC |
3367 | |
3368 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
3369 | ||
3370 | switch (dyn.d_tag) | |
3371 | { | |
3372 | default: | |
3373 | break; | |
3374 | ||
3375 | case DT_XTENSA_GOT_LOC_SZ: | |
e0001a05 NC |
3376 | dyn.d_un.d_val = num_xtlit_entries; |
3377 | break; | |
3378 | ||
3379 | case DT_XTENSA_GOT_LOC_OFF: | |
4ade44b7 AM |
3380 | dyn.d_un.d_ptr = (htab->sgotloc->output_section->vma |
3381 | + htab->sgotloc->output_offset); | |
f0e6fdb2 BW |
3382 | break; |
3383 | ||
e0001a05 | 3384 | case DT_PLTGOT: |
ce558b89 AM |
3385 | dyn.d_un.d_ptr = (htab->elf.sgot->output_section->vma |
3386 | + htab->elf.sgot->output_offset); | |
f0e6fdb2 BW |
3387 | break; |
3388 | ||
e0001a05 | 3389 | case DT_JMPREL: |
ce558b89 AM |
3390 | dyn.d_un.d_ptr = (htab->elf.srelplt->output_section->vma |
3391 | + htab->elf.srelplt->output_offset); | |
e0001a05 NC |
3392 | break; |
3393 | ||
3394 | case DT_PLTRELSZ: | |
ce558b89 | 3395 | dyn.d_un.d_val = htab->elf.srelplt->size; |
e0001a05 | 3396 | break; |
e0001a05 NC |
3397 | } |
3398 | ||
3399 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
3400 | } | |
3401 | ||
0a1b45a2 | 3402 | return true; |
e0001a05 NC |
3403 | } |
3404 | ||
3405 | \f | |
3406 | /* Functions for dealing with the e_flags field. */ | |
3407 | ||
3408 | /* Merge backend specific data from an object file to the output | |
3409 | object file when linking. */ | |
3410 | ||
0a1b45a2 | 3411 | static bool |
50e03d47 | 3412 | elf_xtensa_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) |
e0001a05 | 3413 | { |
50e03d47 | 3414 | bfd *obfd = info->output_bfd; |
e0001a05 NC |
3415 | unsigned out_mach, in_mach; |
3416 | flagword out_flag, in_flag; | |
3417 | ||
cc643b88 | 3418 | /* Check if we have the same endianness. */ |
50e03d47 | 3419 | if (!_bfd_generic_verify_endian_match (ibfd, info)) |
0a1b45a2 | 3420 | return false; |
e0001a05 NC |
3421 | |
3422 | /* Don't even pretend to support mixed-format linking. */ | |
3423 | if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
3424 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
0a1b45a2 | 3425 | return false; |
e0001a05 NC |
3426 | |
3427 | out_flag = elf_elfheader (obfd)->e_flags; | |
3428 | in_flag = elf_elfheader (ibfd)->e_flags; | |
3429 | ||
3430 | out_mach = out_flag & EF_XTENSA_MACH; | |
3431 | in_mach = in_flag & EF_XTENSA_MACH; | |
43cd72b9 | 3432 | if (out_mach != in_mach) |
e0001a05 | 3433 | { |
4eca0228 | 3434 | _bfd_error_handler |
695344c0 | 3435 | /* xgettext:c-format */ |
38f14ab8 | 3436 | (_("%pB: incompatible machine type; output is 0x%x; input is 0x%x"), |
d003868e | 3437 | ibfd, out_mach, in_mach); |
e0001a05 | 3438 | bfd_set_error (bfd_error_wrong_format); |
0a1b45a2 | 3439 | return false; |
e0001a05 NC |
3440 | } |
3441 | ||
3442 | if (! elf_flags_init (obfd)) | |
3443 | { | |
0a1b45a2 | 3444 | elf_flags_init (obfd) = true; |
e0001a05 | 3445 | elf_elfheader (obfd)->e_flags = in_flag; |
43cd72b9 | 3446 | |
e0001a05 NC |
3447 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) |
3448 | && bfd_get_arch_info (obfd)->the_default) | |
3449 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), | |
3450 | bfd_get_mach (ibfd)); | |
43cd72b9 | 3451 | |
0a1b45a2 | 3452 | return true; |
e0001a05 NC |
3453 | } |
3454 | ||
68ffbac6 | 3455 | if ((out_flag & EF_XTENSA_XT_INSN) != (in_flag & EF_XTENSA_XT_INSN)) |
43cd72b9 | 3456 | elf_elfheader (obfd)->e_flags &= (~ EF_XTENSA_XT_INSN); |
e0001a05 | 3457 | |
68ffbac6 | 3458 | if ((out_flag & EF_XTENSA_XT_LIT) != (in_flag & EF_XTENSA_XT_LIT)) |
43cd72b9 | 3459 | elf_elfheader (obfd)->e_flags &= (~ EF_XTENSA_XT_LIT); |
e0001a05 | 3460 | |
0a1b45a2 | 3461 | return true; |
e0001a05 NC |
3462 | } |
3463 | ||
3464 | ||
0a1b45a2 | 3465 | static bool |
7fa3d080 | 3466 | elf_xtensa_set_private_flags (bfd *abfd, flagword flags) |
e0001a05 NC |
3467 | { |
3468 | BFD_ASSERT (!elf_flags_init (abfd) | |
3469 | || elf_elfheader (abfd)->e_flags == flags); | |
3470 | ||
3471 | elf_elfheader (abfd)->e_flags |= flags; | |
0a1b45a2 | 3472 | elf_flags_init (abfd) = true; |
e0001a05 | 3473 | |
0a1b45a2 | 3474 | return true; |
e0001a05 NC |
3475 | } |
3476 | ||
3477 | ||
0a1b45a2 | 3478 | static bool |
7fa3d080 | 3479 | elf_xtensa_print_private_bfd_data (bfd *abfd, void *farg) |
e0001a05 NC |
3480 | { |
3481 | FILE *f = (FILE *) farg; | |
3482 | flagword e_flags = elf_elfheader (abfd)->e_flags; | |
3483 | ||
3484 | fprintf (f, "\nXtensa header:\n"); | |
43cd72b9 | 3485 | if ((e_flags & EF_XTENSA_MACH) == E_XTENSA_MACH) |
e0001a05 NC |
3486 | fprintf (f, "\nMachine = Base\n"); |
3487 | else | |
3488 | fprintf (f, "\nMachine Id = 0x%x\n", e_flags & EF_XTENSA_MACH); | |
3489 | ||
3490 | fprintf (f, "Insn tables = %s\n", | |
3491 | (e_flags & EF_XTENSA_XT_INSN) ? "true" : "false"); | |
3492 | ||
3493 | fprintf (f, "Literal tables = %s\n", | |
3494 | (e_flags & EF_XTENSA_XT_LIT) ? "true" : "false"); | |
3495 | ||
3496 | return _bfd_elf_print_private_bfd_data (abfd, farg); | |
3497 | } | |
3498 | ||
3499 | ||
3500 | /* Set the right machine number for an Xtensa ELF file. */ | |
3501 | ||
0a1b45a2 | 3502 | static bool |
7fa3d080 | 3503 | elf_xtensa_object_p (bfd *abfd) |
e0001a05 NC |
3504 | { |
3505 | int mach; | |
3506 | unsigned long arch = elf_elfheader (abfd)->e_flags & EF_XTENSA_MACH; | |
3507 | ||
3508 | switch (arch) | |
3509 | { | |
3510 | case E_XTENSA_MACH: | |
3511 | mach = bfd_mach_xtensa; | |
3512 | break; | |
3513 | default: | |
0a1b45a2 | 3514 | return false; |
e0001a05 NC |
3515 | } |
3516 | ||
3517 | (void) bfd_default_set_arch_mach (abfd, bfd_arch_xtensa, mach); | |
0a1b45a2 | 3518 | return true; |
e0001a05 NC |
3519 | } |
3520 | ||
3521 | ||
3522 | /* The final processing done just before writing out an Xtensa ELF object | |
3523 | file. This gets the Xtensa architecture right based on the machine | |
3524 | number. */ | |
3525 | ||
0a1b45a2 | 3526 | static bool |
cc364be6 | 3527 | elf_xtensa_final_write_processing (bfd *abfd) |
e0001a05 NC |
3528 | { |
3529 | int mach; | |
c5e20471 | 3530 | unsigned long val = elf_elfheader (abfd)->e_flags & EF_XTENSA_MACH; |
e0001a05 NC |
3531 | |
3532 | switch (mach = bfd_get_mach (abfd)) | |
3533 | { | |
3534 | case bfd_mach_xtensa: | |
3535 | val = E_XTENSA_MACH; | |
3536 | break; | |
3537 | default: | |
c5e20471 | 3538 | break; |
e0001a05 NC |
3539 | } |
3540 | ||
c5e20471 | 3541 | elf_elfheader (abfd)->e_flags &= ~EF_XTENSA_MACH; |
e0001a05 | 3542 | elf_elfheader (abfd)->e_flags |= val; |
cc364be6 | 3543 | return _bfd_elf_final_write_processing (abfd); |
e0001a05 NC |
3544 | } |
3545 | ||
3546 | ||
3547 | static enum elf_reloc_type_class | |
7e612e98 AM |
3548 | elf_xtensa_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
3549 | const asection *rel_sec ATTRIBUTE_UNUSED, | |
3550 | const Elf_Internal_Rela *rela) | |
e0001a05 NC |
3551 | { |
3552 | switch ((int) ELF32_R_TYPE (rela->r_info)) | |
3553 | { | |
3554 | case R_XTENSA_RELATIVE: | |
3555 | return reloc_class_relative; | |
3556 | case R_XTENSA_JMP_SLOT: | |
3557 | return reloc_class_plt; | |
3558 | default: | |
3559 | return reloc_class_normal; | |
3560 | } | |
3561 | } | |
3562 | ||
3563 | \f | |
0a1b45a2 | 3564 | static bool |
7fa3d080 BW |
3565 | elf_xtensa_discard_info_for_section (bfd *abfd, |
3566 | struct elf_reloc_cookie *cookie, | |
3567 | struct bfd_link_info *info, | |
3568 | asection *sec) | |
e0001a05 NC |
3569 | { |
3570 | bfd_byte *contents; | |
e0001a05 | 3571 | bfd_vma offset, actual_offset; |
1d25768e BW |
3572 | bfd_size_type removed_bytes = 0; |
3573 | bfd_size_type entry_size; | |
e0001a05 NC |
3574 | |
3575 | if (sec->output_section | |
3576 | && bfd_is_abs_section (sec->output_section)) | |
0a1b45a2 | 3577 | return false; |
e0001a05 | 3578 | |
1d25768e BW |
3579 | if (xtensa_is_proptable_section (sec)) |
3580 | entry_size = 12; | |
3581 | else | |
3582 | entry_size = 8; | |
3583 | ||
a3ef2d63 | 3584 | if (sec->size == 0 || sec->size % entry_size != 0) |
0a1b45a2 | 3585 | return false; |
1d25768e | 3586 | |
e0001a05 NC |
3587 | contents = retrieve_contents (abfd, sec, info->keep_memory); |
3588 | if (!contents) | |
0a1b45a2 | 3589 | return false; |
e0001a05 NC |
3590 | |
3591 | cookie->rels = retrieve_internal_relocs (abfd, sec, info->keep_memory); | |
3592 | if (!cookie->rels) | |
3593 | { | |
3594 | release_contents (sec, contents); | |
0a1b45a2 | 3595 | return false; |
e0001a05 NC |
3596 | } |
3597 | ||
1d25768e BW |
3598 | /* Sort the relocations. They should already be in order when |
3599 | relaxation is enabled, but it might not be. */ | |
3600 | qsort (cookie->rels, sec->reloc_count, sizeof (Elf_Internal_Rela), | |
3601 | internal_reloc_compare); | |
3602 | ||
e0001a05 NC |
3603 | cookie->rel = cookie->rels; |
3604 | cookie->relend = cookie->rels + sec->reloc_count; | |
3605 | ||
a3ef2d63 | 3606 | for (offset = 0; offset < sec->size; offset += entry_size) |
e0001a05 NC |
3607 | { |
3608 | actual_offset = offset - removed_bytes; | |
3609 | ||
3610 | /* The ...symbol_deleted_p function will skip over relocs but it | |
3611 | won't adjust their offsets, so do that here. */ | |
3612 | while (cookie->rel < cookie->relend | |
3613 | && cookie->rel->r_offset < offset) | |
3614 | { | |
3615 | cookie->rel->r_offset -= removed_bytes; | |
3616 | cookie->rel++; | |
3617 | } | |
3618 | ||
3619 | while (cookie->rel < cookie->relend | |
3620 | && cookie->rel->r_offset == offset) | |
3621 | { | |
c152c796 | 3622 | if (bfd_elf_reloc_symbol_deleted_p (offset, cookie)) |
e0001a05 NC |
3623 | { |
3624 | /* Remove the table entry. (If the reloc type is NONE, then | |
3625 | the entry has already been merged with another and deleted | |
3626 | during relaxation.) */ | |
3627 | if (ELF32_R_TYPE (cookie->rel->r_info) != R_XTENSA_NONE) | |
3628 | { | |
3629 | /* Shift the contents up. */ | |
a3ef2d63 | 3630 | if (offset + entry_size < sec->size) |
e0001a05 | 3631 | memmove (&contents[actual_offset], |
1d25768e | 3632 | &contents[actual_offset + entry_size], |
a3ef2d63 | 3633 | sec->size - offset - entry_size); |
1d25768e | 3634 | removed_bytes += entry_size; |
e0001a05 NC |
3635 | } |
3636 | ||
3637 | /* Remove this relocation. */ | |
3638 | cookie->rel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
3639 | } | |
3640 | ||
3641 | /* Adjust the relocation offset for previous removals. This | |
3642 | should not be done before calling ...symbol_deleted_p | |
3643 | because it might mess up the offset comparisons there. | |
3644 | Make sure the offset doesn't underflow in the case where | |
3645 | the first entry is removed. */ | |
3646 | if (cookie->rel->r_offset >= removed_bytes) | |
3647 | cookie->rel->r_offset -= removed_bytes; | |
3648 | else | |
3649 | cookie->rel->r_offset = 0; | |
3650 | ||
3651 | cookie->rel++; | |
3652 | } | |
3653 | } | |
3654 | ||
3655 | if (removed_bytes != 0) | |
3656 | { | |
3657 | /* Adjust any remaining relocs (shouldn't be any). */ | |
3658 | for (; cookie->rel < cookie->relend; cookie->rel++) | |
3659 | { | |
3660 | if (cookie->rel->r_offset >= removed_bytes) | |
3661 | cookie->rel->r_offset -= removed_bytes; | |
3662 | else | |
3663 | cookie->rel->r_offset = 0; | |
3664 | } | |
3665 | ||
3666 | /* Clear the removed bytes. */ | |
a3ef2d63 | 3667 | memset (&contents[sec->size - removed_bytes], 0, removed_bytes); |
e0001a05 NC |
3668 | |
3669 | pin_contents (sec, contents); | |
3670 | pin_internal_relocs (sec, cookie->rels); | |
3671 | ||
eea6121a | 3672 | /* Shrink size. */ |
a3ef2d63 BW |
3673 | if (sec->rawsize == 0) |
3674 | sec->rawsize = sec->size; | |
3675 | sec->size -= removed_bytes; | |
b536dc1e BW |
3676 | |
3677 | if (xtensa_is_littable_section (sec)) | |
3678 | { | |
f0e6fdb2 BW |
3679 | asection *sgotloc = elf_xtensa_hash_table (info)->sgotloc; |
3680 | if (sgotloc) | |
3681 | sgotloc->size -= removed_bytes; | |
b536dc1e | 3682 | } |
e0001a05 NC |
3683 | } |
3684 | else | |
3685 | { | |
3686 | release_contents (sec, contents); | |
3687 | release_internal_relocs (sec, cookie->rels); | |
3688 | } | |
3689 | ||
3690 | return (removed_bytes != 0); | |
3691 | } | |
3692 | ||
3693 | ||
0a1b45a2 | 3694 | static bool |
7fa3d080 BW |
3695 | elf_xtensa_discard_info (bfd *abfd, |
3696 | struct elf_reloc_cookie *cookie, | |
3697 | struct bfd_link_info *info) | |
e0001a05 NC |
3698 | { |
3699 | asection *sec; | |
0a1b45a2 | 3700 | bool changed = false; |
e0001a05 NC |
3701 | |
3702 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
3703 | { | |
3704 | if (xtensa_is_property_section (sec)) | |
3705 | { | |
3706 | if (elf_xtensa_discard_info_for_section (abfd, cookie, info, sec)) | |
0a1b45a2 | 3707 | changed = true; |
e0001a05 NC |
3708 | } |
3709 | } | |
3710 | ||
3711 | return changed; | |
3712 | } | |
3713 | ||
3714 | ||
0a1b45a2 | 3715 | static bool |
7fa3d080 | 3716 | elf_xtensa_ignore_discarded_relocs (asection *sec) |
e0001a05 NC |
3717 | { |
3718 | return xtensa_is_property_section (sec); | |
3719 | } | |
3720 | ||
a77dc2cc BW |
3721 | |
3722 | static unsigned int | |
3723 | elf_xtensa_action_discarded (asection *sec) | |
3724 | { | |
3725 | if (strcmp (".xt_except_table", sec->name) == 0) | |
3726 | return 0; | |
3727 | ||
3728 | if (strcmp (".xt_except_desc", sec->name) == 0) | |
3729 | return 0; | |
3730 | ||
3731 | return _bfd_elf_default_action_discarded (sec); | |
3732 | } | |
3733 | ||
e0001a05 NC |
3734 | \f |
3735 | /* Support for core dump NOTE sections. */ | |
3736 | ||
0a1b45a2 | 3737 | static bool |
7fa3d080 | 3738 | elf_xtensa_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
e0001a05 NC |
3739 | { |
3740 | int offset; | |
eea6121a | 3741 | unsigned int size; |
e0001a05 | 3742 | |
9f84cb38 NC |
3743 | if (elf_tdata (abfd) == NULL |
3744 | || elf_tdata (abfd)->core == NULL) | |
3745 | return false; | |
3746 | ||
e0001a05 NC |
3747 | /* The size for Xtensa is variable, so don't try to recognize the format |
3748 | based on the size. Just assume this is GNU/Linux. */ | |
9f84cb38 NC |
3749 | if (note == NULL || note->descsz < 28) |
3750 | return false; | |
e0001a05 NC |
3751 | |
3752 | /* pr_cursig */ | |
228e534f | 3753 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
e0001a05 NC |
3754 | |
3755 | /* pr_pid */ | |
228e534f | 3756 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
e0001a05 NC |
3757 | |
3758 | /* pr_reg */ | |
3759 | offset = 72; | |
eea6121a | 3760 | size = note->descsz - offset - 4; |
e0001a05 NC |
3761 | |
3762 | /* Make a ".reg/999" section. */ | |
3763 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
eea6121a | 3764 | size, note->descpos + offset); |
e0001a05 NC |
3765 | } |
3766 | ||
0a1b45a2 | 3767 | static bool |
7fa3d080 | 3768 | elf_xtensa_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
e0001a05 NC |
3769 | { |
3770 | switch (note->descsz) | |
3771 | { | |
3772 | default: | |
0a1b45a2 | 3773 | return false; |
e0001a05 NC |
3774 | |
3775 | case 128: /* GNU/Linux elf_prpsinfo */ | |
228e534f | 3776 | elf_tdata (abfd)->core->program |
e0001a05 | 3777 | = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16); |
228e534f | 3778 | elf_tdata (abfd)->core->command |
e0001a05 NC |
3779 | = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80); |
3780 | } | |
3781 | ||
3782 | /* Note that for some reason, a spurious space is tacked | |
3783 | onto the end of the args in some (at least one anyway) | |
3784 | implementations, so strip it off if it exists. */ | |
3785 | ||
3786 | { | |
228e534f | 3787 | char *command = elf_tdata (abfd)->core->command; |
e0001a05 NC |
3788 | int n = strlen (command); |
3789 | ||
3790 | if (0 < n && command[n - 1] == ' ') | |
3791 | command[n - 1] = '\0'; | |
3792 | } | |
3793 | ||
0a1b45a2 | 3794 | return true; |
e0001a05 NC |
3795 | } |
3796 | ||
3797 | \f | |
3798 | /* Generic Xtensa configurability stuff. */ | |
3799 | ||
3800 | static xtensa_opcode callx0_op = XTENSA_UNDEFINED; | |
3801 | static xtensa_opcode callx4_op = XTENSA_UNDEFINED; | |
3802 | static xtensa_opcode callx8_op = XTENSA_UNDEFINED; | |
3803 | static xtensa_opcode callx12_op = XTENSA_UNDEFINED; | |
3804 | static xtensa_opcode call0_op = XTENSA_UNDEFINED; | |
3805 | static xtensa_opcode call4_op = XTENSA_UNDEFINED; | |
3806 | static xtensa_opcode call8_op = XTENSA_UNDEFINED; | |
3807 | static xtensa_opcode call12_op = XTENSA_UNDEFINED; | |
3808 | ||
3809 | static void | |
7fa3d080 | 3810 | init_call_opcodes (void) |
e0001a05 NC |
3811 | { |
3812 | if (callx0_op == XTENSA_UNDEFINED) | |
3813 | { | |
3814 | callx0_op = xtensa_opcode_lookup (xtensa_default_isa, "callx0"); | |
3815 | callx4_op = xtensa_opcode_lookup (xtensa_default_isa, "callx4"); | |
3816 | callx8_op = xtensa_opcode_lookup (xtensa_default_isa, "callx8"); | |
3817 | callx12_op = xtensa_opcode_lookup (xtensa_default_isa, "callx12"); | |
3818 | call0_op = xtensa_opcode_lookup (xtensa_default_isa, "call0"); | |
3819 | call4_op = xtensa_opcode_lookup (xtensa_default_isa, "call4"); | |
3820 | call8_op = xtensa_opcode_lookup (xtensa_default_isa, "call8"); | |
3821 | call12_op = xtensa_opcode_lookup (xtensa_default_isa, "call12"); | |
3822 | } | |
3823 | } | |
3824 | ||
3825 | ||
0a1b45a2 | 3826 | static bool |
7fa3d080 | 3827 | is_indirect_call_opcode (xtensa_opcode opcode) |
e0001a05 NC |
3828 | { |
3829 | init_call_opcodes (); | |
3830 | return (opcode == callx0_op | |
3831 | || opcode == callx4_op | |
3832 | || opcode == callx8_op | |
3833 | || opcode == callx12_op); | |
3834 | } | |
3835 | ||
3836 | ||
0a1b45a2 | 3837 | static bool |
7fa3d080 | 3838 | is_direct_call_opcode (xtensa_opcode opcode) |
e0001a05 NC |
3839 | { |
3840 | init_call_opcodes (); | |
3841 | return (opcode == call0_op | |
3842 | || opcode == call4_op | |
3843 | || opcode == call8_op | |
3844 | || opcode == call12_op); | |
3845 | } | |
3846 | ||
3847 | ||
0a1b45a2 | 3848 | static bool |
7fa3d080 | 3849 | is_windowed_call_opcode (xtensa_opcode opcode) |
e0001a05 NC |
3850 | { |
3851 | init_call_opcodes (); | |
3852 | return (opcode == call4_op | |
3853 | || opcode == call8_op | |
3854 | || opcode == call12_op | |
3855 | || opcode == callx4_op | |
3856 | || opcode == callx8_op | |
3857 | || opcode == callx12_op); | |
3858 | } | |
3859 | ||
3860 | ||
0a1b45a2 | 3861 | static bool |
28dbbc02 BW |
3862 | get_indirect_call_dest_reg (xtensa_opcode opcode, unsigned *pdst) |
3863 | { | |
3864 | unsigned dst = (unsigned) -1; | |
3865 | ||
3866 | init_call_opcodes (); | |
3867 | if (opcode == callx0_op) | |
3868 | dst = 0; | |
3869 | else if (opcode == callx4_op) | |
3870 | dst = 4; | |
3871 | else if (opcode == callx8_op) | |
3872 | dst = 8; | |
3873 | else if (opcode == callx12_op) | |
3874 | dst = 12; | |
3875 | ||
3876 | if (dst == (unsigned) -1) | |
0a1b45a2 | 3877 | return false; |
28dbbc02 BW |
3878 | |
3879 | *pdst = dst; | |
0a1b45a2 | 3880 | return true; |
28dbbc02 BW |
3881 | } |
3882 | ||
3883 | ||
43cd72b9 BW |
3884 | static xtensa_opcode |
3885 | get_const16_opcode (void) | |
3886 | { | |
0a1b45a2 | 3887 | static bool done_lookup = false; |
43cd72b9 BW |
3888 | static xtensa_opcode const16_opcode = XTENSA_UNDEFINED; |
3889 | if (!done_lookup) | |
3890 | { | |
3891 | const16_opcode = xtensa_opcode_lookup (xtensa_default_isa, "const16"); | |
0a1b45a2 | 3892 | done_lookup = true; |
43cd72b9 BW |
3893 | } |
3894 | return const16_opcode; | |
3895 | } | |
3896 | ||
3897 | ||
e0001a05 NC |
3898 | static xtensa_opcode |
3899 | get_l32r_opcode (void) | |
3900 | { | |
3901 | static xtensa_opcode l32r_opcode = XTENSA_UNDEFINED; | |
0a1b45a2 | 3902 | static bool done_lookup = false; |
43cd72b9 BW |
3903 | |
3904 | if (!done_lookup) | |
e0001a05 NC |
3905 | { |
3906 | l32r_opcode = xtensa_opcode_lookup (xtensa_default_isa, "l32r"); | |
0a1b45a2 | 3907 | done_lookup = true; |
e0001a05 NC |
3908 | } |
3909 | return l32r_opcode; | |
3910 | } | |
3911 | ||
3912 | ||
3913 | static bfd_vma | |
7fa3d080 | 3914 | l32r_offset (bfd_vma addr, bfd_vma pc) |
e0001a05 NC |
3915 | { |
3916 | bfd_vma offset; | |
3917 | ||
3918 | offset = addr - ((pc+3) & -4); | |
3919 | BFD_ASSERT ((offset & ((1 << 2) - 1)) == 0); | |
3920 | offset = (signed int) offset >> 2; | |
3921 | BFD_ASSERT ((signed int) offset >> 16 == -1); | |
3922 | return offset; | |
3923 | } | |
3924 | ||
3925 | ||
e0d0c518 MF |
3926 | static xtensa_opcode |
3927 | get_rsr_lend_opcode (void) | |
3928 | { | |
3929 | static xtensa_opcode rsr_lend_opcode = XTENSA_UNDEFINED; | |
0a1b45a2 | 3930 | static bool done_lookup = false; |
e0d0c518 MF |
3931 | if (!done_lookup) |
3932 | { | |
3933 | rsr_lend_opcode = xtensa_opcode_lookup (xtensa_default_isa, "rsr.lend"); | |
0a1b45a2 | 3934 | done_lookup = true; |
e0d0c518 MF |
3935 | } |
3936 | return rsr_lend_opcode; | |
3937 | } | |
3938 | ||
3939 | static xtensa_opcode | |
3940 | get_wsr_lbeg_opcode (void) | |
3941 | { | |
3942 | static xtensa_opcode wsr_lbeg_opcode = XTENSA_UNDEFINED; | |
0a1b45a2 | 3943 | static bool done_lookup = false; |
e0d0c518 MF |
3944 | if (!done_lookup) |
3945 | { | |
3946 | wsr_lbeg_opcode = xtensa_opcode_lookup (xtensa_default_isa, "wsr.lbeg"); | |
0a1b45a2 | 3947 | done_lookup = true; |
e0d0c518 MF |
3948 | } |
3949 | return wsr_lbeg_opcode; | |
3950 | } | |
3951 | ||
3952 | ||
e0001a05 | 3953 | static int |
7fa3d080 | 3954 | get_relocation_opnd (xtensa_opcode opcode, int r_type) |
e0001a05 | 3955 | { |
43cd72b9 BW |
3956 | xtensa_isa isa = xtensa_default_isa; |
3957 | int last_immed, last_opnd, opi; | |
3958 | ||
3959 | if (opcode == XTENSA_UNDEFINED) | |
3960 | return XTENSA_UNDEFINED; | |
3961 | ||
3962 | /* Find the last visible PC-relative immediate operand for the opcode. | |
3963 | If there are no PC-relative immediates, then choose the last visible | |
3964 | immediate; otherwise, fail and return XTENSA_UNDEFINED. */ | |
3965 | last_immed = XTENSA_UNDEFINED; | |
3966 | last_opnd = xtensa_opcode_num_operands (isa, opcode); | |
3967 | for (opi = last_opnd - 1; opi >= 0; opi--) | |
3968 | { | |
3969 | if (xtensa_operand_is_visible (isa, opcode, opi) == 0) | |
3970 | continue; | |
3971 | if (xtensa_operand_is_PCrelative (isa, opcode, opi) == 1) | |
3972 | { | |
3973 | last_immed = opi; | |
3974 | break; | |
3975 | } | |
3976 | if (last_immed == XTENSA_UNDEFINED | |
3977 | && xtensa_operand_is_register (isa, opcode, opi) == 0) | |
3978 | last_immed = opi; | |
3979 | } | |
3980 | if (last_immed < 0) | |
3981 | return XTENSA_UNDEFINED; | |
3982 | ||
3983 | /* If the operand number was specified in an old-style relocation, | |
3984 | check for consistency with the operand computed above. */ | |
3985 | if (r_type >= R_XTENSA_OP0 && r_type <= R_XTENSA_OP2) | |
3986 | { | |
3987 | int reloc_opnd = r_type - R_XTENSA_OP0; | |
3988 | if (reloc_opnd != last_immed) | |
3989 | return XTENSA_UNDEFINED; | |
3990 | } | |
3991 | ||
3992 | return last_immed; | |
3993 | } | |
3994 | ||
3995 | ||
3996 | int | |
7fa3d080 | 3997 | get_relocation_slot (int r_type) |
43cd72b9 BW |
3998 | { |
3999 | switch (r_type) | |
4000 | { | |
4001 | case R_XTENSA_OP0: | |
4002 | case R_XTENSA_OP1: | |
4003 | case R_XTENSA_OP2: | |
4004 | return 0; | |
4005 | ||
4006 | default: | |
4007 | if (r_type >= R_XTENSA_SLOT0_OP && r_type <= R_XTENSA_SLOT14_OP) | |
4008 | return r_type - R_XTENSA_SLOT0_OP; | |
4009 | if (r_type >= R_XTENSA_SLOT0_ALT && r_type <= R_XTENSA_SLOT14_ALT) | |
4010 | return r_type - R_XTENSA_SLOT0_ALT; | |
4011 | break; | |
4012 | } | |
4013 | ||
4014 | return XTENSA_UNDEFINED; | |
e0001a05 NC |
4015 | } |
4016 | ||
4017 | ||
4018 | /* Get the opcode for a relocation. */ | |
4019 | ||
4020 | static xtensa_opcode | |
7fa3d080 BW |
4021 | get_relocation_opcode (bfd *abfd, |
4022 | asection *sec, | |
4023 | bfd_byte *contents, | |
4024 | Elf_Internal_Rela *irel) | |
e0001a05 NC |
4025 | { |
4026 | static xtensa_insnbuf ibuff = NULL; | |
43cd72b9 | 4027 | static xtensa_insnbuf sbuff = NULL; |
e0001a05 | 4028 | xtensa_isa isa = xtensa_default_isa; |
43cd72b9 BW |
4029 | xtensa_format fmt; |
4030 | int slot; | |
e0001a05 NC |
4031 | |
4032 | if (contents == NULL) | |
4033 | return XTENSA_UNDEFINED; | |
4034 | ||
43cd72b9 | 4035 | if (bfd_get_section_limit (abfd, sec) <= irel->r_offset) |
e0001a05 NC |
4036 | return XTENSA_UNDEFINED; |
4037 | ||
4038 | if (ibuff == NULL) | |
43cd72b9 BW |
4039 | { |
4040 | ibuff = xtensa_insnbuf_alloc (isa); | |
4041 | sbuff = xtensa_insnbuf_alloc (isa); | |
4042 | } | |
4043 | ||
e0001a05 | 4044 | /* Decode the instruction. */ |
43cd72b9 BW |
4045 | xtensa_insnbuf_from_chars (isa, ibuff, &contents[irel->r_offset], |
4046 | sec->size - irel->r_offset); | |
4047 | fmt = xtensa_format_decode (isa, ibuff); | |
4048 | slot = get_relocation_slot (ELF32_R_TYPE (irel->r_info)); | |
4049 | if (slot == XTENSA_UNDEFINED) | |
4050 | return XTENSA_UNDEFINED; | |
4051 | xtensa_format_get_slot (isa, fmt, slot, ibuff, sbuff); | |
4052 | return xtensa_opcode_decode (isa, fmt, slot, sbuff); | |
e0001a05 NC |
4053 | } |
4054 | ||
4055 | ||
0a1b45a2 | 4056 | bool |
7fa3d080 BW |
4057 | is_l32r_relocation (bfd *abfd, |
4058 | asection *sec, | |
4059 | bfd_byte *contents, | |
4060 | Elf_Internal_Rela *irel) | |
e0001a05 NC |
4061 | { |
4062 | xtensa_opcode opcode; | |
43cd72b9 | 4063 | if (!is_operand_relocation (ELF32_R_TYPE (irel->r_info))) |
0a1b45a2 | 4064 | return false; |
43cd72b9 | 4065 | opcode = get_relocation_opcode (abfd, sec, contents, irel); |
e0001a05 NC |
4066 | return (opcode == get_l32r_opcode ()); |
4067 | } | |
4068 | ||
e0001a05 | 4069 | |
43cd72b9 | 4070 | static bfd_size_type |
7fa3d080 BW |
4071 | get_asm_simplify_size (bfd_byte *contents, |
4072 | bfd_size_type content_len, | |
4073 | bfd_size_type offset) | |
e0001a05 | 4074 | { |
43cd72b9 | 4075 | bfd_size_type insnlen, size = 0; |
e0001a05 | 4076 | |
43cd72b9 BW |
4077 | /* Decode the size of the next two instructions. */ |
4078 | insnlen = insn_decode_len (contents, content_len, offset); | |
4079 | if (insnlen == 0) | |
4080 | return 0; | |
e0001a05 | 4081 | |
43cd72b9 | 4082 | size += insnlen; |
68ffbac6 | 4083 | |
43cd72b9 BW |
4084 | insnlen = insn_decode_len (contents, content_len, offset + size); |
4085 | if (insnlen == 0) | |
4086 | return 0; | |
e0001a05 | 4087 | |
43cd72b9 BW |
4088 | size += insnlen; |
4089 | return size; | |
4090 | } | |
e0001a05 | 4091 | |
43cd72b9 | 4092 | |
0a1b45a2 | 4093 | bool |
7fa3d080 | 4094 | is_alt_relocation (int r_type) |
43cd72b9 BW |
4095 | { |
4096 | return (r_type >= R_XTENSA_SLOT0_ALT | |
4097 | && r_type <= R_XTENSA_SLOT14_ALT); | |
e0001a05 NC |
4098 | } |
4099 | ||
4100 | ||
0a1b45a2 | 4101 | bool |
7fa3d080 | 4102 | is_operand_relocation (int r_type) |
e0001a05 | 4103 | { |
43cd72b9 BW |
4104 | switch (r_type) |
4105 | { | |
4106 | case R_XTENSA_OP0: | |
4107 | case R_XTENSA_OP1: | |
4108 | case R_XTENSA_OP2: | |
0a1b45a2 | 4109 | return true; |
e0001a05 | 4110 | |
43cd72b9 BW |
4111 | default: |
4112 | if (r_type >= R_XTENSA_SLOT0_OP && r_type <= R_XTENSA_SLOT14_OP) | |
0a1b45a2 | 4113 | return true; |
43cd72b9 | 4114 | if (r_type >= R_XTENSA_SLOT0_ALT && r_type <= R_XTENSA_SLOT14_ALT) |
0a1b45a2 | 4115 | return true; |
43cd72b9 BW |
4116 | break; |
4117 | } | |
e0001a05 | 4118 | |
0a1b45a2 | 4119 | return false; |
e0001a05 NC |
4120 | } |
4121 | ||
68ffbac6 | 4122 | |
43cd72b9 | 4123 | #define MIN_INSN_LENGTH 2 |
e0001a05 | 4124 | |
43cd72b9 BW |
4125 | /* Return 0 if it fails to decode. */ |
4126 | ||
4127 | bfd_size_type | |
7fa3d080 BW |
4128 | insn_decode_len (bfd_byte *contents, |
4129 | bfd_size_type content_len, | |
4130 | bfd_size_type offset) | |
e0001a05 | 4131 | { |
43cd72b9 BW |
4132 | int insn_len; |
4133 | xtensa_isa isa = xtensa_default_isa; | |
4134 | xtensa_format fmt; | |
4135 | static xtensa_insnbuf ibuff = NULL; | |
e0001a05 | 4136 | |
43cd72b9 BW |
4137 | if (offset + MIN_INSN_LENGTH > content_len) |
4138 | return 0; | |
e0001a05 | 4139 | |
43cd72b9 BW |
4140 | if (ibuff == NULL) |
4141 | ibuff = xtensa_insnbuf_alloc (isa); | |
4142 | xtensa_insnbuf_from_chars (isa, ibuff, &contents[offset], | |
4143 | content_len - offset); | |
4144 | fmt = xtensa_format_decode (isa, ibuff); | |
4145 | if (fmt == XTENSA_UNDEFINED) | |
4146 | return 0; | |
4147 | insn_len = xtensa_format_length (isa, fmt); | |
4148 | if (insn_len == XTENSA_UNDEFINED) | |
4149 | return 0; | |
4150 | return insn_len; | |
e0001a05 NC |
4151 | } |
4152 | ||
e0d0c518 MF |
4153 | int |
4154 | insn_num_slots (bfd_byte *contents, | |
4155 | bfd_size_type content_len, | |
4156 | bfd_size_type offset) | |
4157 | { | |
4158 | xtensa_isa isa = xtensa_default_isa; | |
4159 | xtensa_format fmt; | |
4160 | static xtensa_insnbuf ibuff = NULL; | |
4161 | ||
4162 | if (offset + MIN_INSN_LENGTH > content_len) | |
4163 | return XTENSA_UNDEFINED; | |
4164 | ||
4165 | if (ibuff == NULL) | |
4166 | ibuff = xtensa_insnbuf_alloc (isa); | |
4167 | xtensa_insnbuf_from_chars (isa, ibuff, &contents[offset], | |
4168 | content_len - offset); | |
4169 | fmt = xtensa_format_decode (isa, ibuff); | |
4170 | if (fmt == XTENSA_UNDEFINED) | |
4171 | return XTENSA_UNDEFINED; | |
4172 | return xtensa_format_num_slots (isa, fmt); | |
4173 | } | |
4174 | ||
e0001a05 | 4175 | |
43cd72b9 BW |
4176 | /* Decode the opcode for a single slot instruction. |
4177 | Return 0 if it fails to decode or the instruction is multi-slot. */ | |
e0001a05 | 4178 | |
43cd72b9 | 4179 | xtensa_opcode |
7fa3d080 BW |
4180 | insn_decode_opcode (bfd_byte *contents, |
4181 | bfd_size_type content_len, | |
4182 | bfd_size_type offset, | |
4183 | int slot) | |
e0001a05 | 4184 | { |
e0001a05 | 4185 | xtensa_isa isa = xtensa_default_isa; |
43cd72b9 BW |
4186 | xtensa_format fmt; |
4187 | static xtensa_insnbuf insnbuf = NULL; | |
4188 | static xtensa_insnbuf slotbuf = NULL; | |
4189 | ||
4190 | if (offset + MIN_INSN_LENGTH > content_len) | |
e0001a05 NC |
4191 | return XTENSA_UNDEFINED; |
4192 | ||
4193 | if (insnbuf == NULL) | |
43cd72b9 BW |
4194 | { |
4195 | insnbuf = xtensa_insnbuf_alloc (isa); | |
4196 | slotbuf = xtensa_insnbuf_alloc (isa); | |
4197 | } | |
4198 | ||
4199 | xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset], | |
4200 | content_len - offset); | |
4201 | fmt = xtensa_format_decode (isa, insnbuf); | |
4202 | if (fmt == XTENSA_UNDEFINED) | |
e0001a05 | 4203 | return XTENSA_UNDEFINED; |
43cd72b9 BW |
4204 | |
4205 | if (slot >= xtensa_format_num_slots (isa, fmt)) | |
e0001a05 | 4206 | return XTENSA_UNDEFINED; |
e0001a05 | 4207 | |
43cd72b9 BW |
4208 | xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf); |
4209 | return xtensa_opcode_decode (isa, fmt, slot, slotbuf); | |
4210 | } | |
e0001a05 | 4211 | |
e0001a05 | 4212 | |
43cd72b9 BW |
4213 | /* The offset is the offset in the contents. |
4214 | The address is the address of that offset. */ | |
e0001a05 | 4215 | |
0a1b45a2 | 4216 | static bool |
7fa3d080 BW |
4217 | check_branch_target_aligned (bfd_byte *contents, |
4218 | bfd_size_type content_length, | |
4219 | bfd_vma offset, | |
4220 | bfd_vma address) | |
43cd72b9 BW |
4221 | { |
4222 | bfd_size_type insn_len = insn_decode_len (contents, content_length, offset); | |
4223 | if (insn_len == 0) | |
0a1b45a2 | 4224 | return false; |
43cd72b9 BW |
4225 | return check_branch_target_aligned_address (address, insn_len); |
4226 | } | |
e0001a05 | 4227 | |
e0001a05 | 4228 | |
0a1b45a2 | 4229 | static bool |
7fa3d080 BW |
4230 | check_loop_aligned (bfd_byte *contents, |
4231 | bfd_size_type content_length, | |
4232 | bfd_vma offset, | |
4233 | bfd_vma address) | |
e0001a05 | 4234 | { |
43cd72b9 | 4235 | bfd_size_type loop_len, insn_len; |
64b607e6 | 4236 | xtensa_opcode opcode; |
e0001a05 | 4237 | |
64b607e6 BW |
4238 | opcode = insn_decode_opcode (contents, content_length, offset, 0); |
4239 | if (opcode == XTENSA_UNDEFINED | |
4240 | || xtensa_opcode_is_loop (xtensa_default_isa, opcode) != 1) | |
4241 | { | |
0a1b45a2 AM |
4242 | BFD_ASSERT (false); |
4243 | return false; | |
64b607e6 | 4244 | } |
68ffbac6 | 4245 | |
43cd72b9 | 4246 | loop_len = insn_decode_len (contents, content_length, offset); |
43cd72b9 | 4247 | insn_len = insn_decode_len (contents, content_length, offset + loop_len); |
64b607e6 BW |
4248 | if (loop_len == 0 || insn_len == 0) |
4249 | { | |
0a1b45a2 AM |
4250 | BFD_ASSERT (false); |
4251 | return false; | |
64b607e6 | 4252 | } |
e0001a05 | 4253 | |
e0d0c518 MF |
4254 | /* If this is relaxed loop, analyze first instruction of the actual loop |
4255 | body. It must be at offset 27 from the loop instruction address. */ | |
4256 | if (insn_len == 3 | |
4257 | && insn_num_slots (contents, content_length, offset + loop_len) == 1 | |
4258 | && insn_decode_opcode (contents, content_length, | |
4259 | offset + loop_len, 0) == get_rsr_lend_opcode() | |
4260 | && insn_decode_len (contents, content_length, offset + loop_len + 3) == 3 | |
4261 | && insn_num_slots (contents, content_length, offset + loop_len + 3) == 1 | |
4262 | && insn_decode_opcode (contents, content_length, | |
4263 | offset + loop_len + 3, 0) == get_wsr_lbeg_opcode()) | |
4264 | { | |
4265 | loop_len = 27; | |
4266 | insn_len = insn_decode_len (contents, content_length, offset + loop_len); | |
4267 | } | |
43cd72b9 BW |
4268 | return check_branch_target_aligned_address (address + loop_len, insn_len); |
4269 | } | |
e0001a05 | 4270 | |
e0001a05 | 4271 | |
0a1b45a2 | 4272 | static bool |
7fa3d080 | 4273 | check_branch_target_aligned_address (bfd_vma addr, int len) |
e0001a05 | 4274 | { |
43cd72b9 BW |
4275 | if (len == 8) |
4276 | return (addr % 8 == 0); | |
4277 | return ((addr >> 2) == ((addr + len - 1) >> 2)); | |
e0001a05 NC |
4278 | } |
4279 | ||
43cd72b9 BW |
4280 | \f |
4281 | /* Instruction widening and narrowing. */ | |
e0001a05 | 4282 | |
7fa3d080 BW |
4283 | /* When FLIX is available we need to access certain instructions only |
4284 | when they are 16-bit or 24-bit instructions. This table caches | |
4285 | information about such instructions by walking through all the | |
4286 | opcodes and finding the smallest single-slot format into which each | |
4287 | can be encoded. */ | |
4288 | ||
4289 | static xtensa_format *op_single_fmt_table = NULL; | |
e0001a05 NC |
4290 | |
4291 | ||
7fa3d080 BW |
4292 | static void |
4293 | init_op_single_format_table (void) | |
e0001a05 | 4294 | { |
7fa3d080 BW |
4295 | xtensa_isa isa = xtensa_default_isa; |
4296 | xtensa_insnbuf ibuf; | |
4297 | xtensa_opcode opcode; | |
4298 | xtensa_format fmt; | |
4299 | int num_opcodes; | |
4300 | ||
4301 | if (op_single_fmt_table) | |
4302 | return; | |
4303 | ||
4304 | ibuf = xtensa_insnbuf_alloc (isa); | |
4305 | num_opcodes = xtensa_isa_num_opcodes (isa); | |
4306 | ||
4307 | op_single_fmt_table = (xtensa_format *) | |
4308 | bfd_malloc (sizeof (xtensa_format) * num_opcodes); | |
4309 | for (opcode = 0; opcode < num_opcodes; opcode++) | |
4310 | { | |
4311 | op_single_fmt_table[opcode] = XTENSA_UNDEFINED; | |
4312 | for (fmt = 0; fmt < xtensa_isa_num_formats (isa); fmt++) | |
4313 | { | |
4314 | if (xtensa_format_num_slots (isa, fmt) == 1 | |
4315 | && xtensa_opcode_encode (isa, fmt, 0, ibuf, opcode) == 0) | |
4316 | { | |
4317 | xtensa_opcode old_fmt = op_single_fmt_table[opcode]; | |
4318 | int fmt_length = xtensa_format_length (isa, fmt); | |
4319 | if (old_fmt == XTENSA_UNDEFINED | |
4320 | || fmt_length < xtensa_format_length (isa, old_fmt)) | |
4321 | op_single_fmt_table[opcode] = fmt; | |
4322 | } | |
4323 | } | |
4324 | } | |
4325 | xtensa_insnbuf_free (isa, ibuf); | |
4326 | } | |
4327 | ||
4328 | ||
4329 | static xtensa_format | |
4330 | get_single_format (xtensa_opcode opcode) | |
4331 | { | |
4332 | init_op_single_format_table (); | |
4333 | return op_single_fmt_table[opcode]; | |
4334 | } | |
e0001a05 | 4335 | |
e0001a05 | 4336 | |
43cd72b9 BW |
4337 | /* For the set of narrowable instructions we do NOT include the |
4338 | narrowings beqz -> beqz.n or bnez -> bnez.n because of complexities | |
4339 | involved during linker relaxation that may require these to | |
4340 | re-expand in some conditions. Also, the narrowing "or" -> mov.n | |
4341 | requires special case code to ensure it only works when op1 == op2. */ | |
e0001a05 | 4342 | |
7fa3d080 BW |
4343 | struct string_pair |
4344 | { | |
4345 | const char *wide; | |
4346 | const char *narrow; | |
4347 | }; | |
4348 | ||
61d2295d | 4349 | const struct string_pair narrowable[] = |
e0001a05 | 4350 | { |
43cd72b9 BW |
4351 | { "add", "add.n" }, |
4352 | { "addi", "addi.n" }, | |
4353 | { "addmi", "addi.n" }, | |
4354 | { "l32i", "l32i.n" }, | |
4355 | { "movi", "movi.n" }, | |
4356 | { "ret", "ret.n" }, | |
4357 | { "retw", "retw.n" }, | |
4358 | { "s32i", "s32i.n" }, | |
4359 | { "or", "mov.n" } /* special case only when op1 == op2 */ | |
4360 | }; | |
e0001a05 | 4361 | |
61d2295d | 4362 | const struct string_pair widenable[] = |
e0001a05 | 4363 | { |
43cd72b9 BW |
4364 | { "add", "add.n" }, |
4365 | { "addi", "addi.n" }, | |
4366 | { "addmi", "addi.n" }, | |
4367 | { "beqz", "beqz.n" }, | |
4368 | { "bnez", "bnez.n" }, | |
4369 | { "l32i", "l32i.n" }, | |
4370 | { "movi", "movi.n" }, | |
4371 | { "ret", "ret.n" }, | |
4372 | { "retw", "retw.n" }, | |
4373 | { "s32i", "s32i.n" }, | |
4374 | { "or", "mov.n" } /* special case only when op1 == op2 */ | |
4375 | }; | |
e0001a05 NC |
4376 | |
4377 | ||
64b607e6 BW |
4378 | /* Check if an instruction can be "narrowed", i.e., changed from a standard |
4379 | 3-byte instruction to a 2-byte "density" instruction. If it is valid, | |
4380 | return the instruction buffer holding the narrow instruction. Otherwise, | |
4381 | return 0. The set of valid narrowing are specified by a string table | |
43cd72b9 BW |
4382 | but require some special case operand checks in some cases. */ |
4383 | ||
64b607e6 BW |
4384 | static xtensa_insnbuf |
4385 | can_narrow_instruction (xtensa_insnbuf slotbuf, | |
4386 | xtensa_format fmt, | |
4387 | xtensa_opcode opcode) | |
e0001a05 | 4388 | { |
43cd72b9 | 4389 | xtensa_isa isa = xtensa_default_isa; |
64b607e6 BW |
4390 | xtensa_format o_fmt; |
4391 | unsigned opi; | |
e0001a05 | 4392 | |
43cd72b9 BW |
4393 | static xtensa_insnbuf o_insnbuf = NULL; |
4394 | static xtensa_insnbuf o_slotbuf = NULL; | |
e0001a05 | 4395 | |
64b607e6 | 4396 | if (o_insnbuf == NULL) |
43cd72b9 | 4397 | { |
43cd72b9 BW |
4398 | o_insnbuf = xtensa_insnbuf_alloc (isa); |
4399 | o_slotbuf = xtensa_insnbuf_alloc (isa); | |
4400 | } | |
e0001a05 | 4401 | |
64b607e6 | 4402 | for (opi = 0; opi < (sizeof (narrowable)/sizeof (struct string_pair)); opi++) |
43cd72b9 | 4403 | { |
0a1b45a2 | 4404 | bool is_or = (strcmp ("or", narrowable[opi].wide) == 0); |
e0001a05 | 4405 | |
43cd72b9 BW |
4406 | if (opcode == xtensa_opcode_lookup (isa, narrowable[opi].wide)) |
4407 | { | |
4408 | uint32 value, newval; | |
4409 | int i, operand_count, o_operand_count; | |
4410 | xtensa_opcode o_opcode; | |
e0001a05 | 4411 | |
43cd72b9 BW |
4412 | /* Address does not matter in this case. We might need to |
4413 | fix it to handle branches/jumps. */ | |
4414 | bfd_vma self_address = 0; | |
e0001a05 | 4415 | |
43cd72b9 BW |
4416 | o_opcode = xtensa_opcode_lookup (isa, narrowable[opi].narrow); |
4417 | if (o_opcode == XTENSA_UNDEFINED) | |
64b607e6 | 4418 | return 0; |
43cd72b9 BW |
4419 | o_fmt = get_single_format (o_opcode); |
4420 | if (o_fmt == XTENSA_UNDEFINED) | |
64b607e6 | 4421 | return 0; |
e0001a05 | 4422 | |
43cd72b9 BW |
4423 | if (xtensa_format_length (isa, fmt) != 3 |
4424 | || xtensa_format_length (isa, o_fmt) != 2) | |
64b607e6 | 4425 | return 0; |
e0001a05 | 4426 | |
43cd72b9 BW |
4427 | xtensa_format_encode (isa, o_fmt, o_insnbuf); |
4428 | operand_count = xtensa_opcode_num_operands (isa, opcode); | |
4429 | o_operand_count = xtensa_opcode_num_operands (isa, o_opcode); | |
e0001a05 | 4430 | |
43cd72b9 | 4431 | if (xtensa_opcode_encode (isa, o_fmt, 0, o_slotbuf, o_opcode) != 0) |
64b607e6 | 4432 | return 0; |
e0001a05 | 4433 | |
43cd72b9 BW |
4434 | if (!is_or) |
4435 | { | |
4436 | if (xtensa_opcode_num_operands (isa, o_opcode) != operand_count) | |
64b607e6 | 4437 | return 0; |
43cd72b9 BW |
4438 | } |
4439 | else | |
4440 | { | |
4441 | uint32 rawval0, rawval1, rawval2; | |
e0001a05 | 4442 | |
64b607e6 BW |
4443 | if (o_operand_count + 1 != operand_count |
4444 | || xtensa_operand_get_field (isa, opcode, 0, | |
4445 | fmt, 0, slotbuf, &rawval0) != 0 | |
4446 | || xtensa_operand_get_field (isa, opcode, 1, | |
4447 | fmt, 0, slotbuf, &rawval1) != 0 | |
4448 | || xtensa_operand_get_field (isa, opcode, 2, | |
4449 | fmt, 0, slotbuf, &rawval2) != 0 | |
4450 | || rawval1 != rawval2 | |
4451 | || rawval0 == rawval1 /* it is a nop */) | |
4452 | return 0; | |
43cd72b9 | 4453 | } |
e0001a05 | 4454 | |
43cd72b9 BW |
4455 | for (i = 0; i < o_operand_count; ++i) |
4456 | { | |
4457 | if (xtensa_operand_get_field (isa, opcode, i, fmt, 0, | |
4458 | slotbuf, &value) | |
4459 | || xtensa_operand_decode (isa, opcode, i, &value)) | |
64b607e6 | 4460 | return 0; |
e0001a05 | 4461 | |
43cd72b9 BW |
4462 | /* PC-relative branches need adjustment, but |
4463 | the PC-rel operand will always have a relocation. */ | |
4464 | newval = value; | |
4465 | if (xtensa_operand_do_reloc (isa, o_opcode, i, &newval, | |
4466 | self_address) | |
4467 | || xtensa_operand_encode (isa, o_opcode, i, &newval) | |
4468 | || xtensa_operand_set_field (isa, o_opcode, i, o_fmt, 0, | |
4469 | o_slotbuf, newval)) | |
64b607e6 | 4470 | return 0; |
43cd72b9 | 4471 | } |
e0001a05 | 4472 | |
64b607e6 BW |
4473 | if (xtensa_format_set_slot (isa, o_fmt, 0, o_insnbuf, o_slotbuf)) |
4474 | return 0; | |
e0001a05 | 4475 | |
64b607e6 | 4476 | return o_insnbuf; |
43cd72b9 BW |
4477 | } |
4478 | } | |
64b607e6 | 4479 | return 0; |
43cd72b9 | 4480 | } |
e0001a05 | 4481 | |
e0001a05 | 4482 | |
64b607e6 BW |
4483 | /* Attempt to narrow an instruction. If the narrowing is valid, perform |
4484 | the action in-place directly into the contents and return TRUE. Otherwise, | |
4485 | the return value is FALSE and the contents are not modified. */ | |
e0001a05 | 4486 | |
0a1b45a2 | 4487 | static bool |
64b607e6 BW |
4488 | narrow_instruction (bfd_byte *contents, |
4489 | bfd_size_type content_length, | |
4490 | bfd_size_type offset) | |
e0001a05 | 4491 | { |
43cd72b9 | 4492 | xtensa_opcode opcode; |
64b607e6 | 4493 | bfd_size_type insn_len; |
43cd72b9 | 4494 | xtensa_isa isa = xtensa_default_isa; |
64b607e6 BW |
4495 | xtensa_format fmt; |
4496 | xtensa_insnbuf o_insnbuf; | |
e0001a05 | 4497 | |
43cd72b9 BW |
4498 | static xtensa_insnbuf insnbuf = NULL; |
4499 | static xtensa_insnbuf slotbuf = NULL; | |
e0001a05 | 4500 | |
43cd72b9 BW |
4501 | if (insnbuf == NULL) |
4502 | { | |
4503 | insnbuf = xtensa_insnbuf_alloc (isa); | |
4504 | slotbuf = xtensa_insnbuf_alloc (isa); | |
43cd72b9 | 4505 | } |
e0001a05 | 4506 | |
43cd72b9 | 4507 | BFD_ASSERT (offset < content_length); |
2c8c90bc | 4508 | |
43cd72b9 | 4509 | if (content_length < 2) |
0a1b45a2 | 4510 | return false; |
e0001a05 | 4511 | |
64b607e6 | 4512 | /* We will hand-code a few of these for a little while. |
43cd72b9 BW |
4513 | These have all been specified in the assembler aleady. */ |
4514 | xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset], | |
4515 | content_length - offset); | |
4516 | fmt = xtensa_format_decode (isa, insnbuf); | |
4517 | if (xtensa_format_num_slots (isa, fmt) != 1) | |
0a1b45a2 | 4518 | return false; |
e0001a05 | 4519 | |
43cd72b9 | 4520 | if (xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf) != 0) |
0a1b45a2 | 4521 | return false; |
e0001a05 | 4522 | |
43cd72b9 BW |
4523 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); |
4524 | if (opcode == XTENSA_UNDEFINED) | |
0a1b45a2 | 4525 | return false; |
43cd72b9 BW |
4526 | insn_len = xtensa_format_length (isa, fmt); |
4527 | if (insn_len > content_length) | |
0a1b45a2 | 4528 | return false; |
43cd72b9 | 4529 | |
64b607e6 BW |
4530 | o_insnbuf = can_narrow_instruction (slotbuf, fmt, opcode); |
4531 | if (o_insnbuf) | |
4532 | { | |
4533 | xtensa_insnbuf_to_chars (isa, o_insnbuf, contents + offset, | |
4534 | content_length - offset); | |
0a1b45a2 | 4535 | return true; |
64b607e6 BW |
4536 | } |
4537 | ||
0a1b45a2 | 4538 | return false; |
64b607e6 BW |
4539 | } |
4540 | ||
4541 | ||
4542 | /* Check if an instruction can be "widened", i.e., changed from a 2-byte | |
4543 | "density" instruction to a standard 3-byte instruction. If it is valid, | |
4544 | return the instruction buffer holding the wide instruction. Otherwise, | |
4545 | return 0. The set of valid widenings are specified by a string table | |
4546 | but require some special case operand checks in some cases. */ | |
4547 | ||
4548 | static xtensa_insnbuf | |
4549 | can_widen_instruction (xtensa_insnbuf slotbuf, | |
4550 | xtensa_format fmt, | |
4551 | xtensa_opcode opcode) | |
4552 | { | |
4553 | xtensa_isa isa = xtensa_default_isa; | |
4554 | xtensa_format o_fmt; | |
4555 | unsigned opi; | |
4556 | ||
4557 | static xtensa_insnbuf o_insnbuf = NULL; | |
4558 | static xtensa_insnbuf o_slotbuf = NULL; | |
4559 | ||
4560 | if (o_insnbuf == NULL) | |
4561 | { | |
4562 | o_insnbuf = xtensa_insnbuf_alloc (isa); | |
4563 | o_slotbuf = xtensa_insnbuf_alloc (isa); | |
4564 | } | |
4565 | ||
4566 | for (opi = 0; opi < (sizeof (widenable)/sizeof (struct string_pair)); opi++) | |
e0001a05 | 4567 | { |
0a1b45a2 AM |
4568 | bool is_or = (strcmp ("or", widenable[opi].wide) == 0); |
4569 | bool is_branch = (strcmp ("beqz", widenable[opi].wide) == 0 | |
4570 | || strcmp ("bnez", widenable[opi].wide) == 0); | |
e0001a05 | 4571 | |
43cd72b9 BW |
4572 | if (opcode == xtensa_opcode_lookup (isa, widenable[opi].narrow)) |
4573 | { | |
4574 | uint32 value, newval; | |
4575 | int i, operand_count, o_operand_count, check_operand_count; | |
4576 | xtensa_opcode o_opcode; | |
e0001a05 | 4577 | |
43cd72b9 BW |
4578 | /* Address does not matter in this case. We might need to fix it |
4579 | to handle branches/jumps. */ | |
4580 | bfd_vma self_address = 0; | |
e0001a05 | 4581 | |
43cd72b9 BW |
4582 | o_opcode = xtensa_opcode_lookup (isa, widenable[opi].wide); |
4583 | if (o_opcode == XTENSA_UNDEFINED) | |
64b607e6 | 4584 | return 0; |
43cd72b9 BW |
4585 | o_fmt = get_single_format (o_opcode); |
4586 | if (o_fmt == XTENSA_UNDEFINED) | |
64b607e6 | 4587 | return 0; |
e0001a05 | 4588 | |
43cd72b9 BW |
4589 | if (xtensa_format_length (isa, fmt) != 2 |
4590 | || xtensa_format_length (isa, o_fmt) != 3) | |
64b607e6 | 4591 | return 0; |
e0001a05 | 4592 | |
43cd72b9 BW |
4593 | xtensa_format_encode (isa, o_fmt, o_insnbuf); |
4594 | operand_count = xtensa_opcode_num_operands (isa, opcode); | |
4595 | o_operand_count = xtensa_opcode_num_operands (isa, o_opcode); | |
4596 | check_operand_count = o_operand_count; | |
e0001a05 | 4597 | |
43cd72b9 | 4598 | if (xtensa_opcode_encode (isa, o_fmt, 0, o_slotbuf, o_opcode) != 0) |
64b607e6 | 4599 | return 0; |
e0001a05 | 4600 | |
43cd72b9 BW |
4601 | if (!is_or) |
4602 | { | |
4603 | if (xtensa_opcode_num_operands (isa, o_opcode) != operand_count) | |
64b607e6 | 4604 | return 0; |
43cd72b9 BW |
4605 | } |
4606 | else | |
4607 | { | |
4608 | uint32 rawval0, rawval1; | |
4609 | ||
64b607e6 BW |
4610 | if (o_operand_count != operand_count + 1 |
4611 | || xtensa_operand_get_field (isa, opcode, 0, | |
4612 | fmt, 0, slotbuf, &rawval0) != 0 | |
4613 | || xtensa_operand_get_field (isa, opcode, 1, | |
4614 | fmt, 0, slotbuf, &rawval1) != 0 | |
4615 | || rawval0 == rawval1 /* it is a nop */) | |
4616 | return 0; | |
43cd72b9 BW |
4617 | } |
4618 | if (is_branch) | |
4619 | check_operand_count--; | |
4620 | ||
64b607e6 | 4621 | for (i = 0; i < check_operand_count; i++) |
43cd72b9 BW |
4622 | { |
4623 | int new_i = i; | |
4624 | if (is_or && i == o_operand_count - 1) | |
4625 | new_i = i - 1; | |
4626 | if (xtensa_operand_get_field (isa, opcode, new_i, fmt, 0, | |
4627 | slotbuf, &value) | |
4628 | || xtensa_operand_decode (isa, opcode, new_i, &value)) | |
64b607e6 | 4629 | return 0; |
43cd72b9 BW |
4630 | |
4631 | /* PC-relative branches need adjustment, but | |
4632 | the PC-rel operand will always have a relocation. */ | |
4633 | newval = value; | |
4634 | if (xtensa_operand_do_reloc (isa, o_opcode, i, &newval, | |
4635 | self_address) | |
4636 | || xtensa_operand_encode (isa, o_opcode, i, &newval) | |
4637 | || xtensa_operand_set_field (isa, o_opcode, i, o_fmt, 0, | |
4638 | o_slotbuf, newval)) | |
64b607e6 | 4639 | return 0; |
43cd72b9 BW |
4640 | } |
4641 | ||
4642 | if (xtensa_format_set_slot (isa, o_fmt, 0, o_insnbuf, o_slotbuf)) | |
64b607e6 | 4643 | return 0; |
43cd72b9 | 4644 | |
64b607e6 | 4645 | return o_insnbuf; |
43cd72b9 BW |
4646 | } |
4647 | } | |
64b607e6 BW |
4648 | return 0; |
4649 | } | |
4650 | ||
68ffbac6 | 4651 | |
64b607e6 BW |
4652 | /* Attempt to widen an instruction. If the widening is valid, perform |
4653 | the action in-place directly into the contents and return TRUE. Otherwise, | |
4654 | the return value is FALSE and the contents are not modified. */ | |
4655 | ||
0a1b45a2 | 4656 | static bool |
64b607e6 BW |
4657 | widen_instruction (bfd_byte *contents, |
4658 | bfd_size_type content_length, | |
4659 | bfd_size_type offset) | |
4660 | { | |
4661 | xtensa_opcode opcode; | |
4662 | bfd_size_type insn_len; | |
4663 | xtensa_isa isa = xtensa_default_isa; | |
4664 | xtensa_format fmt; | |
4665 | xtensa_insnbuf o_insnbuf; | |
4666 | ||
4667 | static xtensa_insnbuf insnbuf = NULL; | |
4668 | static xtensa_insnbuf slotbuf = NULL; | |
4669 | ||
4670 | if (insnbuf == NULL) | |
4671 | { | |
4672 | insnbuf = xtensa_insnbuf_alloc (isa); | |
4673 | slotbuf = xtensa_insnbuf_alloc (isa); | |
4674 | } | |
4675 | ||
4676 | BFD_ASSERT (offset < content_length); | |
4677 | ||
4678 | if (content_length < 2) | |
0a1b45a2 | 4679 | return false; |
64b607e6 BW |
4680 | |
4681 | /* We will hand-code a few of these for a little while. | |
4682 | These have all been specified in the assembler aleady. */ | |
4683 | xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset], | |
4684 | content_length - offset); | |
4685 | fmt = xtensa_format_decode (isa, insnbuf); | |
4686 | if (xtensa_format_num_slots (isa, fmt) != 1) | |
0a1b45a2 | 4687 | return false; |
64b607e6 BW |
4688 | |
4689 | if (xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf) != 0) | |
0a1b45a2 | 4690 | return false; |
64b607e6 BW |
4691 | |
4692 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
4693 | if (opcode == XTENSA_UNDEFINED) | |
0a1b45a2 | 4694 | return false; |
64b607e6 BW |
4695 | insn_len = xtensa_format_length (isa, fmt); |
4696 | if (insn_len > content_length) | |
0a1b45a2 | 4697 | return false; |
64b607e6 BW |
4698 | |
4699 | o_insnbuf = can_widen_instruction (slotbuf, fmt, opcode); | |
4700 | if (o_insnbuf) | |
4701 | { | |
4702 | xtensa_insnbuf_to_chars (isa, o_insnbuf, contents + offset, | |
4703 | content_length - offset); | |
0a1b45a2 | 4704 | return true; |
64b607e6 | 4705 | } |
0a1b45a2 | 4706 | return false; |
e0001a05 NC |
4707 | } |
4708 | ||
43cd72b9 BW |
4709 | \f |
4710 | /* Code for transforming CALLs at link-time. */ | |
e0001a05 | 4711 | |
43cd72b9 | 4712 | static bfd_reloc_status_type |
7fa3d080 BW |
4713 | elf_xtensa_do_asm_simplify (bfd_byte *contents, |
4714 | bfd_vma address, | |
4715 | bfd_vma content_length, | |
4716 | char **error_message) | |
e0001a05 | 4717 | { |
43cd72b9 BW |
4718 | static xtensa_insnbuf insnbuf = NULL; |
4719 | static xtensa_insnbuf slotbuf = NULL; | |
4720 | xtensa_format core_format = XTENSA_UNDEFINED; | |
4721 | xtensa_opcode opcode; | |
4722 | xtensa_opcode direct_call_opcode; | |
4723 | xtensa_isa isa = xtensa_default_isa; | |
4724 | bfd_byte *chbuf = contents + address; | |
4725 | int opn; | |
e0001a05 | 4726 | |
43cd72b9 | 4727 | if (insnbuf == NULL) |
e0001a05 | 4728 | { |
43cd72b9 BW |
4729 | insnbuf = xtensa_insnbuf_alloc (isa); |
4730 | slotbuf = xtensa_insnbuf_alloc (isa); | |
e0001a05 | 4731 | } |
e0001a05 | 4732 | |
43cd72b9 BW |
4733 | if (content_length < address) |
4734 | { | |
38f14ab8 | 4735 | *error_message = _("attempt to convert L32R/CALLX to CALL failed"); |
43cd72b9 BW |
4736 | return bfd_reloc_other; |
4737 | } | |
e0001a05 | 4738 | |
43cd72b9 BW |
4739 | opcode = get_expanded_call_opcode (chbuf, content_length - address, 0); |
4740 | direct_call_opcode = swap_callx_for_call_opcode (opcode); | |
4741 | if (direct_call_opcode == XTENSA_UNDEFINED) | |
4742 | { | |
38f14ab8 | 4743 | *error_message = _("attempt to convert L32R/CALLX to CALL failed"); |
43cd72b9 BW |
4744 | return bfd_reloc_other; |
4745 | } | |
68ffbac6 | 4746 | |
43cd72b9 BW |
4747 | /* Assemble a NOP ("or a1, a1, a1") into the 0 byte offset. */ |
4748 | core_format = xtensa_format_lookup (isa, "x24"); | |
4749 | opcode = xtensa_opcode_lookup (isa, "or"); | |
4750 | xtensa_opcode_encode (isa, core_format, 0, slotbuf, opcode); | |
68ffbac6 | 4751 | for (opn = 0; opn < 3; opn++) |
43cd72b9 BW |
4752 | { |
4753 | uint32 regno = 1; | |
4754 | xtensa_operand_encode (isa, opcode, opn, ®no); | |
4755 | xtensa_operand_set_field (isa, opcode, opn, core_format, 0, | |
4756 | slotbuf, regno); | |
4757 | } | |
4758 | xtensa_format_encode (isa, core_format, insnbuf); | |
4759 | xtensa_format_set_slot (isa, core_format, 0, insnbuf, slotbuf); | |
4760 | xtensa_insnbuf_to_chars (isa, insnbuf, chbuf, content_length - address); | |
e0001a05 | 4761 | |
43cd72b9 BW |
4762 | /* Assemble a CALL ("callN 0") into the 3 byte offset. */ |
4763 | xtensa_opcode_encode (isa, core_format, 0, slotbuf, direct_call_opcode); | |
4764 | xtensa_operand_set_field (isa, opcode, 0, core_format, 0, slotbuf, 0); | |
e0001a05 | 4765 | |
43cd72b9 BW |
4766 | xtensa_format_encode (isa, core_format, insnbuf); |
4767 | xtensa_format_set_slot (isa, core_format, 0, insnbuf, slotbuf); | |
4768 | xtensa_insnbuf_to_chars (isa, insnbuf, chbuf + 3, | |
4769 | content_length - address - 3); | |
e0001a05 | 4770 | |
43cd72b9 BW |
4771 | return bfd_reloc_ok; |
4772 | } | |
e0001a05 | 4773 | |
e0001a05 | 4774 | |
43cd72b9 | 4775 | static bfd_reloc_status_type |
7fa3d080 BW |
4776 | contract_asm_expansion (bfd_byte *contents, |
4777 | bfd_vma content_length, | |
4778 | Elf_Internal_Rela *irel, | |
4779 | char **error_message) | |
43cd72b9 BW |
4780 | { |
4781 | bfd_reloc_status_type retval = | |
4782 | elf_xtensa_do_asm_simplify (contents, irel->r_offset, content_length, | |
4783 | error_message); | |
e0001a05 | 4784 | |
43cd72b9 BW |
4785 | if (retval != bfd_reloc_ok) |
4786 | return bfd_reloc_dangerous; | |
e0001a05 | 4787 | |
43cd72b9 BW |
4788 | /* Update the irel->r_offset field so that the right immediate and |
4789 | the right instruction are modified during the relocation. */ | |
4790 | irel->r_offset += 3; | |
4791 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_XTENSA_SLOT0_OP); | |
4792 | return bfd_reloc_ok; | |
4793 | } | |
e0001a05 | 4794 | |
e0001a05 | 4795 | |
43cd72b9 | 4796 | static xtensa_opcode |
7fa3d080 | 4797 | swap_callx_for_call_opcode (xtensa_opcode opcode) |
e0001a05 | 4798 | { |
43cd72b9 | 4799 | init_call_opcodes (); |
e0001a05 | 4800 | |
43cd72b9 BW |
4801 | if (opcode == callx0_op) return call0_op; |
4802 | if (opcode == callx4_op) return call4_op; | |
4803 | if (opcode == callx8_op) return call8_op; | |
4804 | if (opcode == callx12_op) return call12_op; | |
e0001a05 | 4805 | |
43cd72b9 BW |
4806 | /* Return XTENSA_UNDEFINED if the opcode is not an indirect call. */ |
4807 | return XTENSA_UNDEFINED; | |
4808 | } | |
e0001a05 | 4809 | |
e0001a05 | 4810 | |
43cd72b9 BW |
4811 | /* Check if "buf" is pointing to a "L32R aN; CALLX aN" or "CONST16 aN; |
4812 | CONST16 aN; CALLX aN" sequence, and if so, return the CALLX opcode. | |
4813 | If not, return XTENSA_UNDEFINED. */ | |
e0001a05 | 4814 | |
43cd72b9 BW |
4815 | #define L32R_TARGET_REG_OPERAND 0 |
4816 | #define CONST16_TARGET_REG_OPERAND 0 | |
4817 | #define CALLN_SOURCE_OPERAND 0 | |
e0001a05 | 4818 | |
68ffbac6 | 4819 | static xtensa_opcode |
0a1b45a2 | 4820 | get_expanded_call_opcode (bfd_byte *buf, int bufsize, bool *p_uses_l32r) |
e0001a05 | 4821 | { |
43cd72b9 BW |
4822 | static xtensa_insnbuf insnbuf = NULL; |
4823 | static xtensa_insnbuf slotbuf = NULL; | |
4824 | xtensa_format fmt; | |
4825 | xtensa_opcode opcode; | |
4826 | xtensa_isa isa = xtensa_default_isa; | |
4827 | uint32 regno, const16_regno, call_regno; | |
4828 | int offset = 0; | |
e0001a05 | 4829 | |
43cd72b9 | 4830 | if (insnbuf == NULL) |
e0001a05 | 4831 | { |
43cd72b9 BW |
4832 | insnbuf = xtensa_insnbuf_alloc (isa); |
4833 | slotbuf = xtensa_insnbuf_alloc (isa); | |
e0001a05 | 4834 | } |
43cd72b9 BW |
4835 | |
4836 | xtensa_insnbuf_from_chars (isa, insnbuf, buf, bufsize); | |
4837 | fmt = xtensa_format_decode (isa, insnbuf); | |
4838 | if (fmt == XTENSA_UNDEFINED | |
4839 | || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf)) | |
4840 | return XTENSA_UNDEFINED; | |
4841 | ||
4842 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
4843 | if (opcode == XTENSA_UNDEFINED) | |
4844 | return XTENSA_UNDEFINED; | |
4845 | ||
4846 | if (opcode == get_l32r_opcode ()) | |
e0001a05 | 4847 | { |
43cd72b9 | 4848 | if (p_uses_l32r) |
0a1b45a2 | 4849 | *p_uses_l32r = true; |
43cd72b9 BW |
4850 | if (xtensa_operand_get_field (isa, opcode, L32R_TARGET_REG_OPERAND, |
4851 | fmt, 0, slotbuf, ®no) | |
4852 | || xtensa_operand_decode (isa, opcode, L32R_TARGET_REG_OPERAND, | |
4853 | ®no)) | |
4854 | return XTENSA_UNDEFINED; | |
e0001a05 | 4855 | } |
43cd72b9 | 4856 | else if (opcode == get_const16_opcode ()) |
e0001a05 | 4857 | { |
43cd72b9 | 4858 | if (p_uses_l32r) |
0a1b45a2 | 4859 | *p_uses_l32r = false; |
43cd72b9 BW |
4860 | if (xtensa_operand_get_field (isa, opcode, CONST16_TARGET_REG_OPERAND, |
4861 | fmt, 0, slotbuf, ®no) | |
4862 | || xtensa_operand_decode (isa, opcode, CONST16_TARGET_REG_OPERAND, | |
4863 | ®no)) | |
4864 | return XTENSA_UNDEFINED; | |
4865 | ||
4866 | /* Check that the next instruction is also CONST16. */ | |
4867 | offset += xtensa_format_length (isa, fmt); | |
4868 | xtensa_insnbuf_from_chars (isa, insnbuf, buf + offset, bufsize - offset); | |
4869 | fmt = xtensa_format_decode (isa, insnbuf); | |
4870 | if (fmt == XTENSA_UNDEFINED | |
4871 | || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf)) | |
4872 | return XTENSA_UNDEFINED; | |
4873 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
4874 | if (opcode != get_const16_opcode ()) | |
4875 | return XTENSA_UNDEFINED; | |
4876 | ||
4877 | if (xtensa_operand_get_field (isa, opcode, CONST16_TARGET_REG_OPERAND, | |
4878 | fmt, 0, slotbuf, &const16_regno) | |
4879 | || xtensa_operand_decode (isa, opcode, CONST16_TARGET_REG_OPERAND, | |
4880 | &const16_regno) | |
4881 | || const16_regno != regno) | |
4882 | return XTENSA_UNDEFINED; | |
e0001a05 | 4883 | } |
43cd72b9 BW |
4884 | else |
4885 | return XTENSA_UNDEFINED; | |
e0001a05 | 4886 | |
43cd72b9 BW |
4887 | /* Next instruction should be an CALLXn with operand 0 == regno. */ |
4888 | offset += xtensa_format_length (isa, fmt); | |
4889 | xtensa_insnbuf_from_chars (isa, insnbuf, buf + offset, bufsize - offset); | |
4890 | fmt = xtensa_format_decode (isa, insnbuf); | |
4891 | if (fmt == XTENSA_UNDEFINED | |
4892 | || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf)) | |
4893 | return XTENSA_UNDEFINED; | |
4894 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
68ffbac6 | 4895 | if (opcode == XTENSA_UNDEFINED |
43cd72b9 BW |
4896 | || !is_indirect_call_opcode (opcode)) |
4897 | return XTENSA_UNDEFINED; | |
e0001a05 | 4898 | |
43cd72b9 BW |
4899 | if (xtensa_operand_get_field (isa, opcode, CALLN_SOURCE_OPERAND, |
4900 | fmt, 0, slotbuf, &call_regno) | |
4901 | || xtensa_operand_decode (isa, opcode, CALLN_SOURCE_OPERAND, | |
4902 | &call_regno)) | |
4903 | return XTENSA_UNDEFINED; | |
e0001a05 | 4904 | |
43cd72b9 BW |
4905 | if (call_regno != regno) |
4906 | return XTENSA_UNDEFINED; | |
e0001a05 | 4907 | |
43cd72b9 BW |
4908 | return opcode; |
4909 | } | |
e0001a05 | 4910 | |
43cd72b9 BW |
4911 | \f |
4912 | /* Data structures used during relaxation. */ | |
e0001a05 | 4913 | |
43cd72b9 | 4914 | /* r_reloc: relocation values. */ |
e0001a05 | 4915 | |
43cd72b9 BW |
4916 | /* Through the relaxation process, we need to keep track of the values |
4917 | that will result from evaluating relocations. The standard ELF | |
4918 | relocation structure is not sufficient for this purpose because we're | |
4919 | operating on multiple input files at once, so we need to know which | |
4920 | input file a relocation refers to. The r_reloc structure thus | |
4921 | records both the input file (bfd) and ELF relocation. | |
e0001a05 | 4922 | |
43cd72b9 BW |
4923 | For efficiency, an r_reloc also contains a "target_offset" field to |
4924 | cache the target-section-relative offset value that is represented by | |
4925 | the relocation. | |
68ffbac6 | 4926 | |
43cd72b9 BW |
4927 | The r_reloc also contains a virtual offset that allows multiple |
4928 | inserted literals to be placed at the same "address" with | |
4929 | different offsets. */ | |
e0001a05 | 4930 | |
43cd72b9 | 4931 | typedef struct r_reloc_struct r_reloc; |
e0001a05 | 4932 | |
43cd72b9 | 4933 | struct r_reloc_struct |
e0001a05 | 4934 | { |
43cd72b9 BW |
4935 | bfd *abfd; |
4936 | Elf_Internal_Rela rela; | |
e0001a05 | 4937 | bfd_vma target_offset; |
43cd72b9 | 4938 | bfd_vma virtual_offset; |
e0001a05 NC |
4939 | }; |
4940 | ||
e0001a05 | 4941 | |
43cd72b9 BW |
4942 | /* The r_reloc structure is included by value in literal_value, but not |
4943 | every literal_value has an associated relocation -- some are simple | |
4944 | constants. In such cases, we set all the fields in the r_reloc | |
4945 | struct to zero. The r_reloc_is_const function should be used to | |
4946 | detect this case. */ | |
e0001a05 | 4947 | |
0a1b45a2 | 4948 | static bool |
7fa3d080 | 4949 | r_reloc_is_const (const r_reloc *r_rel) |
e0001a05 | 4950 | { |
43cd72b9 | 4951 | return (r_rel->abfd == NULL); |
e0001a05 NC |
4952 | } |
4953 | ||
4954 | ||
43cd72b9 | 4955 | static bfd_vma |
7fa3d080 | 4956 | r_reloc_get_target_offset (const r_reloc *r_rel) |
e0001a05 | 4957 | { |
43cd72b9 BW |
4958 | bfd_vma target_offset; |
4959 | unsigned long r_symndx; | |
e0001a05 | 4960 | |
43cd72b9 BW |
4961 | BFD_ASSERT (!r_reloc_is_const (r_rel)); |
4962 | r_symndx = ELF32_R_SYM (r_rel->rela.r_info); | |
4963 | target_offset = get_elf_r_symndx_offset (r_rel->abfd, r_symndx); | |
4964 | return (target_offset + r_rel->rela.r_addend); | |
4965 | } | |
e0001a05 | 4966 | |
e0001a05 | 4967 | |
43cd72b9 | 4968 | static struct elf_link_hash_entry * |
7fa3d080 | 4969 | r_reloc_get_hash_entry (const r_reloc *r_rel) |
e0001a05 | 4970 | { |
43cd72b9 BW |
4971 | unsigned long r_symndx = ELF32_R_SYM (r_rel->rela.r_info); |
4972 | return get_elf_r_symndx_hash_entry (r_rel->abfd, r_symndx); | |
4973 | } | |
e0001a05 | 4974 | |
43cd72b9 BW |
4975 | |
4976 | static asection * | |
7fa3d080 | 4977 | r_reloc_get_section (const r_reloc *r_rel) |
43cd72b9 BW |
4978 | { |
4979 | unsigned long r_symndx = ELF32_R_SYM (r_rel->rela.r_info); | |
4980 | return get_elf_r_symndx_section (r_rel->abfd, r_symndx); | |
4981 | } | |
e0001a05 NC |
4982 | |
4983 | ||
0a1b45a2 | 4984 | static bool |
7fa3d080 | 4985 | r_reloc_is_defined (const r_reloc *r_rel) |
e0001a05 | 4986 | { |
43cd72b9 BW |
4987 | asection *sec; |
4988 | if (r_rel == NULL) | |
0a1b45a2 | 4989 | return false; |
e0001a05 | 4990 | |
43cd72b9 BW |
4991 | sec = r_reloc_get_section (r_rel); |
4992 | if (sec == bfd_abs_section_ptr | |
4993 | || sec == bfd_com_section_ptr | |
4994 | || sec == bfd_und_section_ptr) | |
0a1b45a2 AM |
4995 | return false; |
4996 | return true; | |
e0001a05 NC |
4997 | } |
4998 | ||
4999 | ||
7fa3d080 BW |
5000 | static void |
5001 | r_reloc_init (r_reloc *r_rel, | |
5002 | bfd *abfd, | |
5003 | Elf_Internal_Rela *irel, | |
5004 | bfd_byte *contents, | |
5005 | bfd_size_type content_length) | |
5006 | { | |
5007 | int r_type; | |
5008 | reloc_howto_type *howto; | |
5009 | ||
5010 | if (irel) | |
5011 | { | |
5012 | r_rel->rela = *irel; | |
5013 | r_rel->abfd = abfd; | |
5014 | r_rel->target_offset = r_reloc_get_target_offset (r_rel); | |
5015 | r_rel->virtual_offset = 0; | |
5016 | r_type = ELF32_R_TYPE (r_rel->rela.r_info); | |
5017 | howto = &elf_howto_table[r_type]; | |
5018 | if (howto->partial_inplace) | |
5019 | { | |
5020 | bfd_vma inplace_val; | |
5021 | BFD_ASSERT (r_rel->rela.r_offset < content_length); | |
5022 | ||
5023 | inplace_val = bfd_get_32 (abfd, &contents[r_rel->rela.r_offset]); | |
5024 | r_rel->target_offset += inplace_val; | |
5025 | } | |
5026 | } | |
5027 | else | |
5028 | memset (r_rel, 0, sizeof (r_reloc)); | |
5029 | } | |
5030 | ||
5031 | ||
43cd72b9 BW |
5032 | #if DEBUG |
5033 | ||
e0001a05 | 5034 | static void |
7fa3d080 | 5035 | print_r_reloc (FILE *fp, const r_reloc *r_rel) |
e0001a05 | 5036 | { |
43cd72b9 BW |
5037 | if (r_reloc_is_defined (r_rel)) |
5038 | { | |
5039 | asection *sec = r_reloc_get_section (r_rel); | |
5040 | fprintf (fp, " %s(%s + ", sec->owner->filename, sec->name); | |
5041 | } | |
5042 | else if (r_reloc_get_hash_entry (r_rel)) | |
5043 | fprintf (fp, " %s + ", r_reloc_get_hash_entry (r_rel)->root.root.string); | |
5044 | else | |
5045 | fprintf (fp, " ?? + "); | |
e0001a05 | 5046 | |
43cd72b9 BW |
5047 | fprintf_vma (fp, r_rel->target_offset); |
5048 | if (r_rel->virtual_offset) | |
5049 | { | |
5050 | fprintf (fp, " + "); | |
5051 | fprintf_vma (fp, r_rel->virtual_offset); | |
5052 | } | |
68ffbac6 | 5053 | |
43cd72b9 BW |
5054 | fprintf (fp, ")"); |
5055 | } | |
e0001a05 | 5056 | |
43cd72b9 | 5057 | #endif /* DEBUG */ |
e0001a05 | 5058 | |
43cd72b9 BW |
5059 | \f |
5060 | /* source_reloc: relocations that reference literals. */ | |
e0001a05 | 5061 | |
43cd72b9 BW |
5062 | /* To determine whether literals can be coalesced, we need to first |
5063 | record all the relocations that reference the literals. The | |
5064 | source_reloc structure below is used for this purpose. The | |
5065 | source_reloc entries are kept in a per-literal-section array, sorted | |
5066 | by offset within the literal section (i.e., target offset). | |
e0001a05 | 5067 | |
43cd72b9 BW |
5068 | The source_sec and r_rel.rela.r_offset fields identify the source of |
5069 | the relocation. The r_rel field records the relocation value, i.e., | |
5070 | the offset of the literal being referenced. The opnd field is needed | |
5071 | to determine the range of the immediate field to which the relocation | |
5072 | applies, so we can determine whether another literal with the same | |
5073 | value is within range. The is_null field is true when the relocation | |
5074 | is being removed (e.g., when an L32R is being removed due to a CALLX | |
5075 | that is converted to a direct CALL). */ | |
e0001a05 | 5076 | |
43cd72b9 BW |
5077 | typedef struct source_reloc_struct source_reloc; |
5078 | ||
5079 | struct source_reloc_struct | |
e0001a05 | 5080 | { |
43cd72b9 BW |
5081 | asection *source_sec; |
5082 | r_reloc r_rel; | |
5083 | xtensa_opcode opcode; | |
5084 | int opnd; | |
0a1b45a2 AM |
5085 | bool is_null; |
5086 | bool is_abs_literal; | |
43cd72b9 | 5087 | }; |
e0001a05 | 5088 | |
e0001a05 | 5089 | |
e0001a05 | 5090 | static void |
7fa3d080 BW |
5091 | init_source_reloc (source_reloc *reloc, |
5092 | asection *source_sec, | |
5093 | const r_reloc *r_rel, | |
5094 | xtensa_opcode opcode, | |
5095 | int opnd, | |
0a1b45a2 | 5096 | bool is_abs_literal) |
e0001a05 | 5097 | { |
43cd72b9 BW |
5098 | reloc->source_sec = source_sec; |
5099 | reloc->r_rel = *r_rel; | |
5100 | reloc->opcode = opcode; | |
5101 | reloc->opnd = opnd; | |
0a1b45a2 | 5102 | reloc->is_null = false; |
43cd72b9 | 5103 | reloc->is_abs_literal = is_abs_literal; |
e0001a05 NC |
5104 | } |
5105 | ||
e0001a05 | 5106 | |
43cd72b9 BW |
5107 | /* Find the source_reloc for a particular source offset and relocation |
5108 | type. Note that the array is sorted by _target_ offset, so this is | |
5109 | just a linear search. */ | |
e0001a05 | 5110 | |
43cd72b9 | 5111 | static source_reloc * |
7fa3d080 BW |
5112 | find_source_reloc (source_reloc *src_relocs, |
5113 | int src_count, | |
5114 | asection *sec, | |
5115 | Elf_Internal_Rela *irel) | |
e0001a05 | 5116 | { |
43cd72b9 | 5117 | int i; |
e0001a05 | 5118 | |
43cd72b9 BW |
5119 | for (i = 0; i < src_count; i++) |
5120 | { | |
5121 | if (src_relocs[i].source_sec == sec | |
5122 | && src_relocs[i].r_rel.rela.r_offset == irel->r_offset | |
5123 | && (ELF32_R_TYPE (src_relocs[i].r_rel.rela.r_info) | |
5124 | == ELF32_R_TYPE (irel->r_info))) | |
5125 | return &src_relocs[i]; | |
5126 | } | |
e0001a05 | 5127 | |
43cd72b9 | 5128 | return NULL; |
e0001a05 NC |
5129 | } |
5130 | ||
5131 | ||
43cd72b9 | 5132 | static int |
7fa3d080 | 5133 | source_reloc_compare (const void *ap, const void *bp) |
e0001a05 | 5134 | { |
43cd72b9 BW |
5135 | const source_reloc *a = (const source_reloc *) ap; |
5136 | const source_reloc *b = (const source_reloc *) bp; | |
e0001a05 | 5137 | |
43cd72b9 BW |
5138 | if (a->r_rel.target_offset != b->r_rel.target_offset) |
5139 | return (a->r_rel.target_offset - b->r_rel.target_offset); | |
e0001a05 | 5140 | |
43cd72b9 BW |
5141 | /* We don't need to sort on these criteria for correctness, |
5142 | but enforcing a more strict ordering prevents unstable qsort | |
5143 | from behaving differently with different implementations. | |
5144 | Without the code below we get correct but different results | |
5145 | on Solaris 2.7 and 2.8. We would like to always produce the | |
5146 | same results no matter the host. */ | |
5147 | ||
5148 | if ((!a->is_null) - (!b->is_null)) | |
5149 | return ((!a->is_null) - (!b->is_null)); | |
5150 | return internal_reloc_compare (&a->r_rel.rela, &b->r_rel.rela); | |
e0001a05 NC |
5151 | } |
5152 | ||
43cd72b9 BW |
5153 | \f |
5154 | /* Literal values and value hash tables. */ | |
e0001a05 | 5155 | |
43cd72b9 BW |
5156 | /* Literals with the same value can be coalesced. The literal_value |
5157 | structure records the value of a literal: the "r_rel" field holds the | |
5158 | information from the relocation on the literal (if there is one) and | |
5159 | the "value" field holds the contents of the literal word itself. | |
e0001a05 | 5160 | |
43cd72b9 BW |
5161 | The value_map structure records a literal value along with the |
5162 | location of a literal holding that value. The value_map hash table | |
5163 | is indexed by the literal value, so that we can quickly check if a | |
5164 | particular literal value has been seen before and is thus a candidate | |
5165 | for coalescing. */ | |
e0001a05 | 5166 | |
43cd72b9 BW |
5167 | typedef struct literal_value_struct literal_value; |
5168 | typedef struct value_map_struct value_map; | |
5169 | typedef struct value_map_hash_table_struct value_map_hash_table; | |
e0001a05 | 5170 | |
43cd72b9 | 5171 | struct literal_value_struct |
e0001a05 | 5172 | { |
68ffbac6 | 5173 | r_reloc r_rel; |
43cd72b9 | 5174 | unsigned long value; |
0a1b45a2 | 5175 | bool is_abs_literal; |
43cd72b9 BW |
5176 | }; |
5177 | ||
5178 | struct value_map_struct | |
5179 | { | |
5180 | literal_value val; /* The literal value. */ | |
5181 | r_reloc loc; /* Location of the literal. */ | |
5182 | value_map *next; | |
5183 | }; | |
5184 | ||
5185 | struct value_map_hash_table_struct | |
5186 | { | |
5187 | unsigned bucket_count; | |
5188 | value_map **buckets; | |
5189 | unsigned count; | |
0a1b45a2 | 5190 | bool has_last_loc; |
43cd72b9 BW |
5191 | r_reloc last_loc; |
5192 | }; | |
5193 | ||
5194 | ||
e0001a05 | 5195 | static void |
7fa3d080 BW |
5196 | init_literal_value (literal_value *lit, |
5197 | const r_reloc *r_rel, | |
5198 | unsigned long value, | |
0a1b45a2 | 5199 | bool is_abs_literal) |
e0001a05 | 5200 | { |
43cd72b9 BW |
5201 | lit->r_rel = *r_rel; |
5202 | lit->value = value; | |
5203 | lit->is_abs_literal = is_abs_literal; | |
e0001a05 NC |
5204 | } |
5205 | ||
5206 | ||
0a1b45a2 | 5207 | static bool |
7fa3d080 BW |
5208 | literal_value_equal (const literal_value *src1, |
5209 | const literal_value *src2, | |
0a1b45a2 | 5210 | bool final_static_link) |
e0001a05 | 5211 | { |
43cd72b9 | 5212 | struct elf_link_hash_entry *h1, *h2; |
e0001a05 | 5213 | |
68ffbac6 | 5214 | if (r_reloc_is_const (&src1->r_rel) != r_reloc_is_const (&src2->r_rel)) |
0a1b45a2 | 5215 | return false; |
e0001a05 | 5216 | |
43cd72b9 BW |
5217 | if (r_reloc_is_const (&src1->r_rel)) |
5218 | return (src1->value == src2->value); | |
e0001a05 | 5219 | |
43cd72b9 BW |
5220 | if (ELF32_R_TYPE (src1->r_rel.rela.r_info) |
5221 | != ELF32_R_TYPE (src2->r_rel.rela.r_info)) | |
0a1b45a2 | 5222 | return false; |
e0001a05 | 5223 | |
43cd72b9 | 5224 | if (src1->r_rel.target_offset != src2->r_rel.target_offset) |
0a1b45a2 | 5225 | return false; |
68ffbac6 | 5226 | |
43cd72b9 | 5227 | if (src1->r_rel.virtual_offset != src2->r_rel.virtual_offset) |
0a1b45a2 | 5228 | return false; |
43cd72b9 BW |
5229 | |
5230 | if (src1->value != src2->value) | |
0a1b45a2 | 5231 | return false; |
68ffbac6 | 5232 | |
43cd72b9 BW |
5233 | /* Now check for the same section (if defined) or the same elf_hash |
5234 | (if undefined or weak). */ | |
5235 | h1 = r_reloc_get_hash_entry (&src1->r_rel); | |
5236 | h2 = r_reloc_get_hash_entry (&src2->r_rel); | |
5237 | if (r_reloc_is_defined (&src1->r_rel) | |
5238 | && (final_static_link | |
5239 | || ((!h1 || h1->root.type != bfd_link_hash_defweak) | |
5240 | && (!h2 || h2->root.type != bfd_link_hash_defweak)))) | |
5241 | { | |
5242 | if (r_reloc_get_section (&src1->r_rel) | |
5243 | != r_reloc_get_section (&src2->r_rel)) | |
0a1b45a2 | 5244 | return false; |
43cd72b9 BW |
5245 | } |
5246 | else | |
5247 | { | |
5248 | /* Require that the hash entries (i.e., symbols) be identical. */ | |
5249 | if (h1 != h2 || h1 == 0) | |
0a1b45a2 | 5250 | return false; |
43cd72b9 BW |
5251 | } |
5252 | ||
5253 | if (src1->is_abs_literal != src2->is_abs_literal) | |
0a1b45a2 | 5254 | return false; |
43cd72b9 | 5255 | |
0a1b45a2 | 5256 | return true; |
e0001a05 NC |
5257 | } |
5258 | ||
e0001a05 | 5259 | |
43cd72b9 BW |
5260 | /* Must be power of 2. */ |
5261 | #define INITIAL_HASH_RELOC_BUCKET_COUNT 1024 | |
e0001a05 | 5262 | |
43cd72b9 | 5263 | static value_map_hash_table * |
7fa3d080 | 5264 | value_map_hash_table_init (void) |
43cd72b9 BW |
5265 | { |
5266 | value_map_hash_table *values; | |
e0001a05 | 5267 | |
43cd72b9 BW |
5268 | values = (value_map_hash_table *) |
5269 | bfd_zmalloc (sizeof (value_map_hash_table)); | |
5270 | values->bucket_count = INITIAL_HASH_RELOC_BUCKET_COUNT; | |
5271 | values->count = 0; | |
5272 | values->buckets = (value_map **) | |
5273 | bfd_zmalloc (sizeof (value_map *) * values->bucket_count); | |
68ffbac6 | 5274 | if (values->buckets == NULL) |
43cd72b9 BW |
5275 | { |
5276 | free (values); | |
5277 | return NULL; | |
5278 | } | |
0a1b45a2 | 5279 | values->has_last_loc = false; |
43cd72b9 BW |
5280 | |
5281 | return values; | |
5282 | } | |
5283 | ||
5284 | ||
5285 | static void | |
7fa3d080 | 5286 | value_map_hash_table_delete (value_map_hash_table *table) |
e0001a05 | 5287 | { |
43cd72b9 BW |
5288 | free (table->buckets); |
5289 | free (table); | |
5290 | } | |
5291 | ||
5292 | ||
5293 | static unsigned | |
7fa3d080 | 5294 | hash_bfd_vma (bfd_vma val) |
43cd72b9 BW |
5295 | { |
5296 | return (val >> 2) + (val >> 10); | |
5297 | } | |
5298 | ||
5299 | ||
5300 | static unsigned | |
7fa3d080 | 5301 | literal_value_hash (const literal_value *src) |
43cd72b9 BW |
5302 | { |
5303 | unsigned hash_val; | |
e0001a05 | 5304 | |
43cd72b9 BW |
5305 | hash_val = hash_bfd_vma (src->value); |
5306 | if (!r_reloc_is_const (&src->r_rel)) | |
e0001a05 | 5307 | { |
43cd72b9 BW |
5308 | void *sec_or_hash; |
5309 | ||
5310 | hash_val += hash_bfd_vma (src->is_abs_literal * 1000); | |
5311 | hash_val += hash_bfd_vma (src->r_rel.target_offset); | |
5312 | hash_val += hash_bfd_vma (src->r_rel.virtual_offset); | |
68ffbac6 | 5313 | |
43cd72b9 BW |
5314 | /* Now check for the same section and the same elf_hash. */ |
5315 | if (r_reloc_is_defined (&src->r_rel)) | |
5316 | sec_or_hash = r_reloc_get_section (&src->r_rel); | |
5317 | else | |
5318 | sec_or_hash = r_reloc_get_hash_entry (&src->r_rel); | |
f60ca5e3 | 5319 | hash_val += hash_bfd_vma ((bfd_vma) (size_t) sec_or_hash); |
e0001a05 | 5320 | } |
43cd72b9 BW |
5321 | return hash_val; |
5322 | } | |
e0001a05 | 5323 | |
e0001a05 | 5324 | |
43cd72b9 | 5325 | /* Check if the specified literal_value has been seen before. */ |
e0001a05 | 5326 | |
43cd72b9 | 5327 | static value_map * |
7fa3d080 BW |
5328 | value_map_get_cached_value (value_map_hash_table *map, |
5329 | const literal_value *val, | |
0a1b45a2 | 5330 | bool final_static_link) |
43cd72b9 BW |
5331 | { |
5332 | value_map *map_e; | |
5333 | value_map *bucket; | |
5334 | unsigned idx; | |
5335 | ||
5336 | idx = literal_value_hash (val); | |
5337 | idx = idx & (map->bucket_count - 1); | |
5338 | bucket = map->buckets[idx]; | |
5339 | for (map_e = bucket; map_e; map_e = map_e->next) | |
e0001a05 | 5340 | { |
43cd72b9 BW |
5341 | if (literal_value_equal (&map_e->val, val, final_static_link)) |
5342 | return map_e; | |
5343 | } | |
5344 | return NULL; | |
5345 | } | |
e0001a05 | 5346 | |
e0001a05 | 5347 | |
43cd72b9 BW |
5348 | /* Record a new literal value. It is illegal to call this if VALUE |
5349 | already has an entry here. */ | |
5350 | ||
5351 | static value_map * | |
7fa3d080 BW |
5352 | add_value_map (value_map_hash_table *map, |
5353 | const literal_value *val, | |
5354 | const r_reloc *loc, | |
0a1b45a2 | 5355 | bool final_static_link) |
43cd72b9 BW |
5356 | { |
5357 | value_map **bucket_p; | |
5358 | unsigned idx; | |
5359 | ||
5360 | value_map *val_e = (value_map *) bfd_zmalloc (sizeof (value_map)); | |
5361 | if (val_e == NULL) | |
5362 | { | |
5363 | bfd_set_error (bfd_error_no_memory); | |
5364 | return NULL; | |
e0001a05 NC |
5365 | } |
5366 | ||
43cd72b9 BW |
5367 | BFD_ASSERT (!value_map_get_cached_value (map, val, final_static_link)); |
5368 | val_e->val = *val; | |
5369 | val_e->loc = *loc; | |
5370 | ||
5371 | idx = literal_value_hash (val); | |
5372 | idx = idx & (map->bucket_count - 1); | |
5373 | bucket_p = &map->buckets[idx]; | |
5374 | ||
5375 | val_e->next = *bucket_p; | |
5376 | *bucket_p = val_e; | |
5377 | map->count++; | |
5378 | /* FIXME: Consider resizing the hash table if we get too many entries. */ | |
68ffbac6 | 5379 | |
43cd72b9 | 5380 | return val_e; |
e0001a05 NC |
5381 | } |
5382 | ||
43cd72b9 BW |
5383 | \f |
5384 | /* Lists of text actions (ta_) for narrowing, widening, longcall | |
5385 | conversion, space fill, code & literal removal, etc. */ | |
5386 | ||
5387 | /* The following text actions are generated: | |
5388 | ||
07d6d2b8 AM |
5389 | "ta_remove_insn" remove an instruction or instructions |
5390 | "ta_remove_longcall" convert longcall to call | |
43cd72b9 | 5391 | "ta_convert_longcall" convert longcall to nop/call |
07d6d2b8 AM |
5392 | "ta_narrow_insn" narrow a wide instruction |
5393 | "ta_widen" widen a narrow instruction | |
5394 | "ta_fill" add fill or remove fill | |
43cd72b9 BW |
5395 | removed < 0 is a fill; branches to the fill address will be |
5396 | changed to address + fill size (e.g., address - removed) | |
5397 | removed >= 0 branches to the fill address will stay unchanged | |
07d6d2b8 | 5398 | "ta_remove_literal" remove a literal; this action is |
43cd72b9 | 5399 | indicated when a literal is removed |
07d6d2b8 AM |
5400 | or replaced. |
5401 | "ta_add_literal" insert a new literal; this action is | |
5402 | indicated when a literal has been moved. | |
5403 | It may use a virtual_offset because | |
43cd72b9 | 5404 | multiple literals can be placed at the |
07d6d2b8 | 5405 | same location. |
43cd72b9 BW |
5406 | |
5407 | For each of these text actions, we also record the number of bytes | |
5408 | removed by performing the text action. In the case of a "ta_widen" | |
5409 | or a "ta_fill" that adds space, the removed_bytes will be negative. */ | |
5410 | ||
5411 | typedef struct text_action_struct text_action; | |
5412 | typedef struct text_action_list_struct text_action_list; | |
5413 | typedef enum text_action_enum_t text_action_t; | |
5414 | ||
5415 | enum text_action_enum_t | |
5416 | { | |
5417 | ta_none, | |
07d6d2b8 AM |
5418 | ta_remove_insn, /* removed = -size */ |
5419 | ta_remove_longcall, /* removed = -size */ | |
5420 | ta_convert_longcall, /* removed = 0 */ | |
5421 | ta_narrow_insn, /* removed = -1 */ | |
5422 | ta_widen_insn, /* removed = +1 */ | |
5423 | ta_fill, /* removed = +size */ | |
43cd72b9 BW |
5424 | ta_remove_literal, |
5425 | ta_add_literal | |
5426 | }; | |
e0001a05 | 5427 | |
e0001a05 | 5428 | |
43cd72b9 BW |
5429 | /* Structure for a text action record. */ |
5430 | struct text_action_struct | |
e0001a05 | 5431 | { |
43cd72b9 BW |
5432 | text_action_t action; |
5433 | asection *sec; /* Optional */ | |
5434 | bfd_vma offset; | |
5435 | bfd_vma virtual_offset; /* Zero except for adding literals. */ | |
5436 | int removed_bytes; | |
5437 | literal_value value; /* Only valid when adding literals. */ | |
43cd72b9 | 5438 | }; |
e0001a05 | 5439 | |
071aa5c9 MF |
5440 | struct removal_by_action_entry_struct |
5441 | { | |
5442 | bfd_vma offset; | |
5443 | int removed; | |
5444 | int eq_removed; | |
5445 | int eq_removed_before_fill; | |
5446 | }; | |
5447 | typedef struct removal_by_action_entry_struct removal_by_action_entry; | |
5448 | ||
5449 | struct removal_by_action_map_struct | |
5450 | { | |
5451 | unsigned n_entries; | |
5452 | removal_by_action_entry *entry; | |
5453 | }; | |
5454 | typedef struct removal_by_action_map_struct removal_by_action_map; | |
5455 | ||
e0001a05 | 5456 | |
43cd72b9 BW |
5457 | /* List of all of the actions taken on a text section. */ |
5458 | struct text_action_list_struct | |
5459 | { | |
4c2af04f MF |
5460 | unsigned count; |
5461 | splay_tree tree; | |
071aa5c9 | 5462 | removal_by_action_map map; |
43cd72b9 | 5463 | }; |
e0001a05 | 5464 | |
e0001a05 | 5465 | |
7fa3d080 BW |
5466 | static text_action * |
5467 | find_fill_action (text_action_list *l, asection *sec, bfd_vma offset) | |
43cd72b9 | 5468 | { |
4c2af04f | 5469 | text_action a; |
43cd72b9 BW |
5470 | |
5471 | /* It is not necessary to fill at the end of a section. */ | |
5472 | if (sec->size == offset) | |
5473 | return NULL; | |
5474 | ||
4c2af04f MF |
5475 | a.offset = offset; |
5476 | a.action = ta_fill; | |
5477 | ||
5478 | splay_tree_node node = splay_tree_lookup (l->tree, (splay_tree_key)&a); | |
5479 | if (node) | |
5480 | return (text_action *)node->value; | |
43cd72b9 BW |
5481 | return NULL; |
5482 | } | |
5483 | ||
5484 | ||
5485 | static int | |
7fa3d080 BW |
5486 | compute_removed_action_diff (const text_action *ta, |
5487 | asection *sec, | |
5488 | bfd_vma offset, | |
5489 | int removed, | |
5490 | int removable_space) | |
43cd72b9 BW |
5491 | { |
5492 | int new_removed; | |
5493 | int current_removed = 0; | |
5494 | ||
7fa3d080 | 5495 | if (ta) |
43cd72b9 BW |
5496 | current_removed = ta->removed_bytes; |
5497 | ||
5498 | BFD_ASSERT (ta == NULL || ta->offset == offset); | |
5499 | BFD_ASSERT (ta == NULL || ta->action == ta_fill); | |
5500 | ||
5501 | /* It is not necessary to fill at the end of a section. Clean this up. */ | |
5502 | if (sec->size == offset) | |
5503 | new_removed = removable_space - 0; | |
5504 | else | |
5505 | { | |
5506 | int space; | |
5507 | int added = -removed - current_removed; | |
5508 | /* Ignore multiples of the section alignment. */ | |
5509 | added = ((1 << sec->alignment_power) - 1) & added; | |
5510 | new_removed = (-added); | |
5511 | ||
5512 | /* Modify for removable. */ | |
5513 | space = removable_space - new_removed; | |
5514 | new_removed = (removable_space | |
5515 | - (((1 << sec->alignment_power) - 1) & space)); | |
5516 | } | |
5517 | return (new_removed - current_removed); | |
5518 | } | |
5519 | ||
5520 | ||
7fa3d080 BW |
5521 | static void |
5522 | adjust_fill_action (text_action *ta, int fill_diff) | |
43cd72b9 BW |
5523 | { |
5524 | ta->removed_bytes += fill_diff; | |
5525 | } | |
5526 | ||
5527 | ||
4c2af04f MF |
5528 | static int |
5529 | text_action_compare (splay_tree_key a, splay_tree_key b) | |
5530 | { | |
5531 | text_action *pa = (text_action *)a; | |
5532 | text_action *pb = (text_action *)b; | |
5533 | static const int action_priority[] = | |
5534 | { | |
5535 | [ta_fill] = 0, | |
5536 | [ta_none] = 1, | |
5537 | [ta_convert_longcall] = 2, | |
5538 | [ta_narrow_insn] = 3, | |
5539 | [ta_remove_insn] = 4, | |
5540 | [ta_remove_longcall] = 5, | |
5541 | [ta_remove_literal] = 6, | |
5542 | [ta_widen_insn] = 7, | |
5543 | [ta_add_literal] = 8, | |
5544 | }; | |
5545 | ||
5546 | if (pa->offset == pb->offset) | |
5547 | { | |
5548 | if (pa->action == pb->action) | |
5549 | return 0; | |
5550 | return action_priority[pa->action] - action_priority[pb->action]; | |
5551 | } | |
5552 | else | |
5553 | return pa->offset < pb->offset ? -1 : 1; | |
5554 | } | |
5555 | ||
5556 | static text_action * | |
5557 | action_first (text_action_list *action_list) | |
5558 | { | |
5559 | splay_tree_node node = splay_tree_min (action_list->tree); | |
5560 | return node ? (text_action *)node->value : NULL; | |
5561 | } | |
5562 | ||
5563 | static text_action * | |
5564 | action_next (text_action_list *action_list, text_action *action) | |
5565 | { | |
5566 | splay_tree_node node = splay_tree_successor (action_list->tree, | |
5567 | (splay_tree_key)action); | |
5568 | return node ? (text_action *)node->value : NULL; | |
5569 | } | |
5570 | ||
43cd72b9 BW |
5571 | /* Add a modification action to the text. For the case of adding or |
5572 | removing space, modify any current fill and assume that | |
5573 | "unreachable_space" bytes can be freely contracted. Note that a | |
5574 | negative removed value is a fill. */ | |
5575 | ||
68ffbac6 | 5576 | static void |
7fa3d080 BW |
5577 | text_action_add (text_action_list *l, |
5578 | text_action_t action, | |
5579 | asection *sec, | |
5580 | bfd_vma offset, | |
5581 | int removed) | |
43cd72b9 | 5582 | { |
43cd72b9 | 5583 | text_action *ta; |
4c2af04f | 5584 | text_action a; |
43cd72b9 BW |
5585 | |
5586 | /* It is not necessary to fill at the end of a section. */ | |
5587 | if (action == ta_fill && sec->size == offset) | |
5588 | return; | |
5589 | ||
5590 | /* It is not necessary to fill 0 bytes. */ | |
5591 | if (action == ta_fill && removed == 0) | |
5592 | return; | |
5593 | ||
4c2af04f MF |
5594 | a.action = action; |
5595 | a.offset = offset; | |
5596 | ||
5597 | if (action == ta_fill) | |
43cd72b9 | 5598 | { |
4c2af04f | 5599 | splay_tree_node node = splay_tree_lookup (l->tree, (splay_tree_key)&a); |
68ffbac6 | 5600 | |
4c2af04f | 5601 | if (node) |
43cd72b9 | 5602 | { |
4c2af04f MF |
5603 | ta = (text_action *)node->value; |
5604 | ta->removed_bytes += removed; | |
5605 | return; | |
43cd72b9 BW |
5606 | } |
5607 | } | |
4c2af04f MF |
5608 | else |
5609 | BFD_ASSERT (splay_tree_lookup (l->tree, (splay_tree_key)&a) == NULL); | |
43cd72b9 | 5610 | |
43cd72b9 BW |
5611 | ta = (text_action *) bfd_zmalloc (sizeof (text_action)); |
5612 | ta->action = action; | |
5613 | ta->sec = sec; | |
5614 | ta->offset = offset; | |
5615 | ta->removed_bytes = removed; | |
4c2af04f MF |
5616 | splay_tree_insert (l->tree, (splay_tree_key)ta, (splay_tree_value)ta); |
5617 | ++l->count; | |
43cd72b9 BW |
5618 | } |
5619 | ||
5620 | ||
5621 | static void | |
7fa3d080 BW |
5622 | text_action_add_literal (text_action_list *l, |
5623 | text_action_t action, | |
5624 | const r_reloc *loc, | |
5625 | const literal_value *value, | |
5626 | int removed) | |
43cd72b9 | 5627 | { |
43cd72b9 BW |
5628 | text_action *ta; |
5629 | asection *sec = r_reloc_get_section (loc); | |
5630 | bfd_vma offset = loc->target_offset; | |
5631 | bfd_vma virtual_offset = loc->virtual_offset; | |
5632 | ||
5633 | BFD_ASSERT (action == ta_add_literal); | |
5634 | ||
43cd72b9 BW |
5635 | /* Create a new record and fill it up. */ |
5636 | ta = (text_action *) bfd_zmalloc (sizeof (text_action)); | |
5637 | ta->action = action; | |
5638 | ta->sec = sec; | |
5639 | ta->offset = offset; | |
5640 | ta->virtual_offset = virtual_offset; | |
5641 | ta->value = *value; | |
5642 | ta->removed_bytes = removed; | |
4c2af04f MF |
5643 | |
5644 | BFD_ASSERT (splay_tree_lookup (l->tree, (splay_tree_key)ta) == NULL); | |
5645 | splay_tree_insert (l->tree, (splay_tree_key)ta, (splay_tree_value)ta); | |
5646 | ++l->count; | |
43cd72b9 BW |
5647 | } |
5648 | ||
5649 | ||
03669f1c BW |
5650 | /* Find the total offset adjustment for the relaxations specified by |
5651 | text_actions, beginning from a particular starting action. This is | |
5652 | typically used from offset_with_removed_text to search an entire list of | |
5653 | actions, but it may also be called directly when adjusting adjacent offsets | |
5654 | so that each search may begin where the previous one left off. */ | |
5655 | ||
5656 | static int | |
4c2af04f MF |
5657 | removed_by_actions (text_action_list *action_list, |
5658 | text_action **p_start_action, | |
03669f1c | 5659 | bfd_vma offset, |
0a1b45a2 | 5660 | bool before_fill) |
43cd72b9 BW |
5661 | { |
5662 | text_action *r; | |
5663 | int removed = 0; | |
5664 | ||
03669f1c | 5665 | r = *p_start_action; |
4c2af04f MF |
5666 | if (r) |
5667 | { | |
5668 | splay_tree_node node = splay_tree_lookup (action_list->tree, | |
5669 | (splay_tree_key)r); | |
5670 | BFD_ASSERT (node != NULL && r == (text_action *)node->value); | |
5671 | } | |
5672 | ||
03669f1c | 5673 | while (r) |
43cd72b9 | 5674 | { |
03669f1c BW |
5675 | if (r->offset > offset) |
5676 | break; | |
5677 | ||
5678 | if (r->offset == offset | |
5679 | && (before_fill || r->action != ta_fill || r->removed_bytes >= 0)) | |
5680 | break; | |
5681 | ||
5682 | removed += r->removed_bytes; | |
5683 | ||
4c2af04f | 5684 | r = action_next (action_list, r); |
43cd72b9 BW |
5685 | } |
5686 | ||
03669f1c BW |
5687 | *p_start_action = r; |
5688 | return removed; | |
5689 | } | |
5690 | ||
5691 | ||
68ffbac6 | 5692 | static bfd_vma |
03669f1c BW |
5693 | offset_with_removed_text (text_action_list *action_list, bfd_vma offset) |
5694 | { | |
4c2af04f MF |
5695 | text_action *r = action_first (action_list); |
5696 | ||
0a1b45a2 | 5697 | return offset - removed_by_actions (action_list, &r, offset, false); |
43cd72b9 BW |
5698 | } |
5699 | ||
5700 | ||
03e94c08 BW |
5701 | static unsigned |
5702 | action_list_count (text_action_list *action_list) | |
5703 | { | |
4c2af04f | 5704 | return action_list->count; |
03e94c08 BW |
5705 | } |
5706 | ||
4c2af04f MF |
5707 | typedef struct map_action_fn_context_struct map_action_fn_context; |
5708 | struct map_action_fn_context_struct | |
071aa5c9 | 5709 | { |
4c2af04f | 5710 | int removed; |
071aa5c9 | 5711 | removal_by_action_map map; |
0a1b45a2 | 5712 | bool eq_complete; |
4c2af04f | 5713 | }; |
071aa5c9 | 5714 | |
4c2af04f MF |
5715 | static int |
5716 | map_action_fn (splay_tree_node node, void *p) | |
5717 | { | |
5718 | map_action_fn_context *ctx = p; | |
5719 | text_action *r = (text_action *)node->value; | |
5720 | removal_by_action_entry *ientry = ctx->map.entry + ctx->map.n_entries; | |
071aa5c9 | 5721 | |
4c2af04f | 5722 | if (ctx->map.n_entries && (ientry - 1)->offset == r->offset) |
071aa5c9 | 5723 | { |
4c2af04f MF |
5724 | --ientry; |
5725 | } | |
5726 | else | |
5727 | { | |
5728 | ++ctx->map.n_entries; | |
0a1b45a2 | 5729 | ctx->eq_complete = false; |
4c2af04f MF |
5730 | ientry->offset = r->offset; |
5731 | ientry->eq_removed_before_fill = ctx->removed; | |
5732 | } | |
071aa5c9 | 5733 | |
4c2af04f MF |
5734 | if (!ctx->eq_complete) |
5735 | { | |
5736 | if (r->action != ta_fill || r->removed_bytes >= 0) | |
071aa5c9 | 5737 | { |
4c2af04f | 5738 | ientry->eq_removed = ctx->removed; |
0a1b45a2 | 5739 | ctx->eq_complete = true; |
071aa5c9 MF |
5740 | } |
5741 | else | |
4c2af04f MF |
5742 | ientry->eq_removed = ctx->removed + r->removed_bytes; |
5743 | } | |
071aa5c9 | 5744 | |
4c2af04f MF |
5745 | ctx->removed += r->removed_bytes; |
5746 | ientry->removed = ctx->removed; | |
5747 | return 0; | |
5748 | } | |
071aa5c9 | 5749 | |
4c2af04f MF |
5750 | static void |
5751 | map_removal_by_action (text_action_list *action_list) | |
5752 | { | |
5753 | map_action_fn_context ctx; | |
5754 | ||
5755 | ctx.removed = 0; | |
5756 | ctx.map.n_entries = 0; | |
5757 | ctx.map.entry = bfd_malloc (action_list_count (action_list) * | |
5758 | sizeof (removal_by_action_entry)); | |
0a1b45a2 | 5759 | ctx.eq_complete = false; |
4c2af04f MF |
5760 | |
5761 | splay_tree_foreach (action_list->tree, map_action_fn, &ctx); | |
5762 | action_list->map = ctx.map; | |
071aa5c9 MF |
5763 | } |
5764 | ||
5765 | static int | |
5766 | removed_by_actions_map (text_action_list *action_list, bfd_vma offset, | |
0a1b45a2 | 5767 | bool before_fill) |
071aa5c9 MF |
5768 | { |
5769 | unsigned a, b; | |
5770 | ||
5771 | if (!action_list->map.entry) | |
5772 | map_removal_by_action (action_list); | |
5773 | ||
5774 | if (!action_list->map.n_entries) | |
5775 | return 0; | |
5776 | ||
5777 | a = 0; | |
5778 | b = action_list->map.n_entries; | |
5779 | ||
5780 | while (b - a > 1) | |
5781 | { | |
5782 | unsigned c = (a + b) / 2; | |
5783 | ||
5784 | if (action_list->map.entry[c].offset <= offset) | |
5785 | a = c; | |
5786 | else | |
5787 | b = c; | |
5788 | } | |
5789 | ||
5790 | if (action_list->map.entry[a].offset < offset) | |
5791 | { | |
5792 | return action_list->map.entry[a].removed; | |
5793 | } | |
5794 | else if (action_list->map.entry[a].offset == offset) | |
5795 | { | |
5796 | return before_fill ? | |
5797 | action_list->map.entry[a].eq_removed_before_fill : | |
5798 | action_list->map.entry[a].eq_removed; | |
5799 | } | |
5800 | else | |
5801 | { | |
5802 | return 0; | |
5803 | } | |
5804 | } | |
5805 | ||
5806 | static bfd_vma | |
5807 | offset_with_removed_text_map (text_action_list *action_list, bfd_vma offset) | |
5808 | { | |
0a1b45a2 | 5809 | int removed = removed_by_actions_map (action_list, offset, false); |
071aa5c9 MF |
5810 | return offset - removed; |
5811 | } | |
5812 | ||
03e94c08 | 5813 | |
43cd72b9 BW |
5814 | /* The find_insn_action routine will only find non-fill actions. */ |
5815 | ||
7fa3d080 BW |
5816 | static text_action * |
5817 | find_insn_action (text_action_list *action_list, bfd_vma offset) | |
43cd72b9 | 5818 | { |
4c2af04f | 5819 | static const text_action_t action[] = |
43cd72b9 | 5820 | { |
4c2af04f MF |
5821 | ta_convert_longcall, |
5822 | ta_remove_longcall, | |
5823 | ta_widen_insn, | |
5824 | ta_narrow_insn, | |
5825 | ta_remove_insn, | |
5826 | }; | |
5827 | text_action a; | |
5828 | unsigned i; | |
5829 | ||
5830 | a.offset = offset; | |
5831 | for (i = 0; i < sizeof (action) / sizeof (*action); ++i) | |
5832 | { | |
5833 | splay_tree_node node; | |
5834 | ||
5835 | a.action = action[i]; | |
5836 | node = splay_tree_lookup (action_list->tree, (splay_tree_key)&a); | |
5837 | if (node) | |
5838 | return (text_action *)node->value; | |
43cd72b9 BW |
5839 | } |
5840 | return NULL; | |
5841 | } | |
5842 | ||
5843 | ||
5844 | #if DEBUG | |
5845 | ||
5846 | static void | |
4c2af04f MF |
5847 | print_action (FILE *fp, text_action *r) |
5848 | { | |
5849 | const char *t = "unknown"; | |
5850 | switch (r->action) | |
5851 | { | |
5852 | case ta_remove_insn: | |
5853 | t = "remove_insn"; break; | |
5854 | case ta_remove_longcall: | |
5855 | t = "remove_longcall"; break; | |
5856 | case ta_convert_longcall: | |
5857 | t = "convert_longcall"; break; | |
5858 | case ta_narrow_insn: | |
5859 | t = "narrow_insn"; break; | |
5860 | case ta_widen_insn: | |
5861 | t = "widen_insn"; break; | |
5862 | case ta_fill: | |
5863 | t = "fill"; break; | |
5864 | case ta_none: | |
5865 | t = "none"; break; | |
5866 | case ta_remove_literal: | |
5867 | t = "remove_literal"; break; | |
5868 | case ta_add_literal: | |
5869 | t = "add_literal"; break; | |
5870 | } | |
5871 | ||
5872 | fprintf (fp, "%s: %s[0x%lx] \"%s\" %d\n", | |
5873 | r->sec->owner->filename, | |
5874 | r->sec->name, (unsigned long) r->offset, t, r->removed_bytes); | |
5875 | } | |
5876 | ||
5877 | static int | |
5878 | print_action_list_fn (splay_tree_node node, void *p) | |
43cd72b9 | 5879 | { |
4c2af04f | 5880 | text_action *r = (text_action *)node->value; |
43cd72b9 | 5881 | |
4c2af04f MF |
5882 | print_action (p, r); |
5883 | return 0; | |
5884 | } | |
43cd72b9 | 5885 | |
4c2af04f MF |
5886 | static void |
5887 | print_action_list (FILE *fp, text_action_list *action_list) | |
5888 | { | |
5889 | fprintf (fp, "Text Action\n"); | |
5890 | splay_tree_foreach (action_list->tree, print_action_list_fn, fp); | |
43cd72b9 BW |
5891 | } |
5892 | ||
5893 | #endif /* DEBUG */ | |
5894 | ||
5895 | \f | |
5896 | /* Lists of literals being coalesced or removed. */ | |
5897 | ||
5898 | /* In the usual case, the literal identified by "from" is being | |
5899 | coalesced with another literal identified by "to". If the literal is | |
5900 | unused and is being removed altogether, "to.abfd" will be NULL. | |
5901 | The removed_literal entries are kept on a per-section list, sorted | |
5902 | by the "from" offset field. */ | |
5903 | ||
5904 | typedef struct removed_literal_struct removed_literal; | |
3439c466 | 5905 | typedef struct removed_literal_map_entry_struct removed_literal_map_entry; |
43cd72b9 BW |
5906 | typedef struct removed_literal_list_struct removed_literal_list; |
5907 | ||
5908 | struct removed_literal_struct | |
5909 | { | |
5910 | r_reloc from; | |
5911 | r_reloc to; | |
5912 | removed_literal *next; | |
5913 | }; | |
5914 | ||
3439c466 MF |
5915 | struct removed_literal_map_entry_struct |
5916 | { | |
5917 | bfd_vma addr; | |
5918 | removed_literal *literal; | |
5919 | }; | |
5920 | ||
43cd72b9 BW |
5921 | struct removed_literal_list_struct |
5922 | { | |
5923 | removed_literal *head; | |
5924 | removed_literal *tail; | |
3439c466 MF |
5925 | |
5926 | unsigned n_map; | |
5927 | removed_literal_map_entry *map; | |
43cd72b9 BW |
5928 | }; |
5929 | ||
5930 | ||
43cd72b9 BW |
5931 | /* Record that the literal at "from" is being removed. If "to" is not |
5932 | NULL, the "from" literal is being coalesced with the "to" literal. */ | |
5933 | ||
5934 | static void | |
7fa3d080 BW |
5935 | add_removed_literal (removed_literal_list *removed_list, |
5936 | const r_reloc *from, | |
5937 | const r_reloc *to) | |
43cd72b9 BW |
5938 | { |
5939 | removed_literal *r, *new_r, *next_r; | |
5940 | ||
5941 | new_r = (removed_literal *) bfd_zmalloc (sizeof (removed_literal)); | |
5942 | ||
5943 | new_r->from = *from; | |
5944 | if (to) | |
5945 | new_r->to = *to; | |
5946 | else | |
5947 | new_r->to.abfd = NULL; | |
5948 | new_r->next = NULL; | |
68ffbac6 | 5949 | |
43cd72b9 | 5950 | r = removed_list->head; |
68ffbac6 | 5951 | if (r == NULL) |
43cd72b9 BW |
5952 | { |
5953 | removed_list->head = new_r; | |
5954 | removed_list->tail = new_r; | |
5955 | } | |
5956 | /* Special check for common case of append. */ | |
5957 | else if (removed_list->tail->from.target_offset < from->target_offset) | |
5958 | { | |
5959 | removed_list->tail->next = new_r; | |
5960 | removed_list->tail = new_r; | |
5961 | } | |
5962 | else | |
5963 | { | |
68ffbac6 | 5964 | while (r->from.target_offset < from->target_offset && r->next) |
43cd72b9 BW |
5965 | { |
5966 | r = r->next; | |
5967 | } | |
5968 | next_r = r->next; | |
5969 | r->next = new_r; | |
5970 | new_r->next = next_r; | |
5971 | if (next_r == NULL) | |
5972 | removed_list->tail = new_r; | |
5973 | } | |
5974 | } | |
5975 | ||
3439c466 MF |
5976 | static void |
5977 | map_removed_literal (removed_literal_list *removed_list) | |
5978 | { | |
5979 | unsigned n_map = 0; | |
5980 | unsigned i; | |
5981 | removed_literal_map_entry *map = NULL; | |
5982 | removed_literal *r = removed_list->head; | |
5983 | ||
5984 | for (i = 0; r; ++i, r = r->next) | |
5985 | { | |
5986 | if (i == n_map) | |
5987 | { | |
5988 | n_map = (n_map * 2) + 2; | |
5989 | map = bfd_realloc (map, n_map * sizeof (*map)); | |
5990 | } | |
5991 | map[i].addr = r->from.target_offset; | |
5992 | map[i].literal = r; | |
5993 | } | |
5994 | removed_list->map = map; | |
5995 | removed_list->n_map = i; | |
5996 | } | |
5997 | ||
5998 | static int | |
5999 | removed_literal_compare (const void *a, const void *b) | |
6000 | { | |
1ad2776d MF |
6001 | const bfd_vma *key = a; |
6002 | const removed_literal_map_entry *memb = b; | |
3439c466 | 6003 | |
1ad2776d | 6004 | if (*key == memb->addr) |
3439c466 MF |
6005 | return 0; |
6006 | else | |
1ad2776d | 6007 | return *key < memb->addr ? -1 : 1; |
3439c466 | 6008 | } |
43cd72b9 BW |
6009 | |
6010 | /* Check if the list of removed literals contains an entry for the | |
6011 | given address. Return the entry if found. */ | |
6012 | ||
6013 | static removed_literal * | |
7fa3d080 | 6014 | find_removed_literal (removed_literal_list *removed_list, bfd_vma addr) |
43cd72b9 | 6015 | { |
3439c466 MF |
6016 | removed_literal_map_entry *p; |
6017 | removed_literal *r = NULL; | |
6018 | ||
6019 | if (removed_list->map == NULL) | |
6020 | map_removed_literal (removed_list); | |
6021 | ||
4d430725 | 6022 | if (removed_list->map != NULL) |
3439c466 | 6023 | { |
4d430725 AM |
6024 | p = bsearch (&addr, removed_list->map, removed_list->n_map, |
6025 | sizeof (*removed_list->map), removed_literal_compare); | |
6026 | if (p) | |
6027 | { | |
6028 | while (p != removed_list->map && (p - 1)->addr == addr) | |
6029 | --p; | |
6030 | r = p->literal; | |
6031 | } | |
3439c466 MF |
6032 | } |
6033 | return r; | |
43cd72b9 BW |
6034 | } |
6035 | ||
6036 | ||
6037 | #if DEBUG | |
6038 | ||
6039 | static void | |
7fa3d080 | 6040 | print_removed_literals (FILE *fp, removed_literal_list *removed_list) |
43cd72b9 BW |
6041 | { |
6042 | removed_literal *r; | |
6043 | r = removed_list->head; | |
6044 | if (r) | |
6045 | fprintf (fp, "Removed Literals\n"); | |
6046 | for (; r != NULL; r = r->next) | |
6047 | { | |
6048 | print_r_reloc (fp, &r->from); | |
6049 | fprintf (fp, " => "); | |
6050 | if (r->to.abfd == NULL) | |
6051 | fprintf (fp, "REMOVED"); | |
6052 | else | |
6053 | print_r_reloc (fp, &r->to); | |
6054 | fprintf (fp, "\n"); | |
6055 | } | |
6056 | } | |
6057 | ||
6058 | #endif /* DEBUG */ | |
6059 | ||
6060 | \f | |
6061 | /* Per-section data for relaxation. */ | |
6062 | ||
6063 | typedef struct reloc_bfd_fix_struct reloc_bfd_fix; | |
6064 | ||
6065 | struct xtensa_relax_info_struct | |
6066 | { | |
0a1b45a2 AM |
6067 | bool is_relaxable_literal_section; |
6068 | bool is_relaxable_asm_section; | |
43cd72b9 BW |
6069 | int visited; /* Number of times visited. */ |
6070 | ||
6071 | source_reloc *src_relocs; /* Array[src_count]. */ | |
6072 | int src_count; | |
6073 | int src_next; /* Next src_relocs entry to assign. */ | |
6074 | ||
6075 | removed_literal_list removed_list; | |
6076 | text_action_list action_list; | |
6077 | ||
6078 | reloc_bfd_fix *fix_list; | |
6079 | reloc_bfd_fix *fix_array; | |
6080 | unsigned fix_array_count; | |
6081 | ||
6082 | /* Support for expanding the reloc array that is stored | |
6083 | in the section structure. If the relocations have been | |
6084 | reallocated, the newly allocated relocations will be referenced | |
6085 | here along with the actual size allocated. The relocation | |
6086 | count will always be found in the section structure. */ | |
68ffbac6 | 6087 | Elf_Internal_Rela *allocated_relocs; |
43cd72b9 BW |
6088 | unsigned relocs_count; |
6089 | unsigned allocated_relocs_count; | |
6090 | }; | |
6091 | ||
6092 | struct elf_xtensa_section_data | |
6093 | { | |
6094 | struct bfd_elf_section_data elf; | |
6095 | xtensa_relax_info relax_info; | |
6096 | }; | |
6097 | ||
43cd72b9 | 6098 | |
0a1b45a2 | 6099 | static bool |
7fa3d080 | 6100 | elf_xtensa_new_section_hook (bfd *abfd, asection *sec) |
43cd72b9 | 6101 | { |
f592407e AM |
6102 | if (!sec->used_by_bfd) |
6103 | { | |
6104 | struct elf_xtensa_section_data *sdata; | |
986f0783 | 6105 | size_t amt = sizeof (*sdata); |
43cd72b9 | 6106 | |
f592407e AM |
6107 | sdata = bfd_zalloc (abfd, amt); |
6108 | if (sdata == NULL) | |
0a1b45a2 | 6109 | return false; |
f592407e AM |
6110 | sec->used_by_bfd = sdata; |
6111 | } | |
43cd72b9 BW |
6112 | |
6113 | return _bfd_elf_new_section_hook (abfd, sec); | |
6114 | } | |
6115 | ||
6116 | ||
7fa3d080 BW |
6117 | static xtensa_relax_info * |
6118 | get_xtensa_relax_info (asection *sec) | |
6119 | { | |
6120 | struct elf_xtensa_section_data *section_data; | |
6121 | ||
6122 | /* No info available if no section or if it is an output section. */ | |
6123 | if (!sec || sec == sec->output_section) | |
6124 | return NULL; | |
6125 | ||
6126 | section_data = (struct elf_xtensa_section_data *) elf_section_data (sec); | |
6127 | return §ion_data->relax_info; | |
6128 | } | |
6129 | ||
6130 | ||
43cd72b9 | 6131 | static void |
7fa3d080 | 6132 | init_xtensa_relax_info (asection *sec) |
43cd72b9 BW |
6133 | { |
6134 | xtensa_relax_info *relax_info = get_xtensa_relax_info (sec); | |
6135 | ||
0a1b45a2 AM |
6136 | relax_info->is_relaxable_literal_section = false; |
6137 | relax_info->is_relaxable_asm_section = false; | |
43cd72b9 BW |
6138 | relax_info->visited = 0; |
6139 | ||
6140 | relax_info->src_relocs = NULL; | |
6141 | relax_info->src_count = 0; | |
6142 | relax_info->src_next = 0; | |
6143 | ||
6144 | relax_info->removed_list.head = NULL; | |
6145 | relax_info->removed_list.tail = NULL; | |
6146 | ||
4c2af04f MF |
6147 | relax_info->action_list.tree = splay_tree_new (text_action_compare, |
6148 | NULL, NULL); | |
071aa5c9 MF |
6149 | relax_info->action_list.map.n_entries = 0; |
6150 | relax_info->action_list.map.entry = NULL; | |
6151 | ||
43cd72b9 BW |
6152 | relax_info->fix_list = NULL; |
6153 | relax_info->fix_array = NULL; | |
6154 | relax_info->fix_array_count = 0; | |
6155 | ||
68ffbac6 | 6156 | relax_info->allocated_relocs = NULL; |
43cd72b9 BW |
6157 | relax_info->relocs_count = 0; |
6158 | relax_info->allocated_relocs_count = 0; | |
6159 | } | |
6160 | ||
43cd72b9 BW |
6161 | \f |
6162 | /* Coalescing literals may require a relocation to refer to a section in | |
6163 | a different input file, but the standard relocation information | |
6164 | cannot express that. Instead, the reloc_bfd_fix structures are used | |
6165 | to "fix" the relocations that refer to sections in other input files. | |
6166 | These structures are kept on per-section lists. The "src_type" field | |
6167 | records the relocation type in case there are multiple relocations on | |
6168 | the same location. FIXME: This is ugly; an alternative might be to | |
6169 | add new symbols with the "owner" field to some other input file. */ | |
6170 | ||
6171 | struct reloc_bfd_fix_struct | |
6172 | { | |
6173 | asection *src_sec; | |
6174 | bfd_vma src_offset; | |
6175 | unsigned src_type; /* Relocation type. */ | |
68ffbac6 | 6176 | |
43cd72b9 BW |
6177 | asection *target_sec; |
6178 | bfd_vma target_offset; | |
0a1b45a2 | 6179 | bool translated; |
68ffbac6 | 6180 | |
43cd72b9 BW |
6181 | reloc_bfd_fix *next; |
6182 | }; | |
6183 | ||
6184 | ||
43cd72b9 | 6185 | static reloc_bfd_fix * |
7fa3d080 BW |
6186 | reloc_bfd_fix_init (asection *src_sec, |
6187 | bfd_vma src_offset, | |
6188 | unsigned src_type, | |
7fa3d080 BW |
6189 | asection *target_sec, |
6190 | bfd_vma target_offset, | |
0a1b45a2 | 6191 | bool translated) |
43cd72b9 BW |
6192 | { |
6193 | reloc_bfd_fix *fix; | |
6194 | ||
6195 | fix = (reloc_bfd_fix *) bfd_malloc (sizeof (reloc_bfd_fix)); | |
6196 | fix->src_sec = src_sec; | |
6197 | fix->src_offset = src_offset; | |
6198 | fix->src_type = src_type; | |
43cd72b9 BW |
6199 | fix->target_sec = target_sec; |
6200 | fix->target_offset = target_offset; | |
6201 | fix->translated = translated; | |
6202 | ||
6203 | return fix; | |
6204 | } | |
6205 | ||
6206 | ||
6207 | static void | |
7fa3d080 | 6208 | add_fix (asection *src_sec, reloc_bfd_fix *fix) |
43cd72b9 BW |
6209 | { |
6210 | xtensa_relax_info *relax_info; | |
6211 | ||
6212 | relax_info = get_xtensa_relax_info (src_sec); | |
6213 | fix->next = relax_info->fix_list; | |
6214 | relax_info->fix_list = fix; | |
6215 | } | |
6216 | ||
6217 | ||
6218 | static int | |
7fa3d080 | 6219 | fix_compare (const void *ap, const void *bp) |
43cd72b9 BW |
6220 | { |
6221 | const reloc_bfd_fix *a = (const reloc_bfd_fix *) ap; | |
6222 | const reloc_bfd_fix *b = (const reloc_bfd_fix *) bp; | |
6223 | ||
6224 | if (a->src_offset != b->src_offset) | |
6225 | return (a->src_offset - b->src_offset); | |
6226 | return (a->src_type - b->src_type); | |
6227 | } | |
6228 | ||
6229 | ||
6230 | static void | |
7fa3d080 | 6231 | cache_fix_array (asection *sec) |
43cd72b9 BW |
6232 | { |
6233 | unsigned i, count = 0; | |
6234 | reloc_bfd_fix *r; | |
6235 | xtensa_relax_info *relax_info = get_xtensa_relax_info (sec); | |
6236 | ||
6237 | if (relax_info == NULL) | |
6238 | return; | |
6239 | if (relax_info->fix_list == NULL) | |
6240 | return; | |
6241 | ||
6242 | for (r = relax_info->fix_list; r != NULL; r = r->next) | |
6243 | count++; | |
6244 | ||
6245 | relax_info->fix_array = | |
6246 | (reloc_bfd_fix *) bfd_malloc (sizeof (reloc_bfd_fix) * count); | |
6247 | relax_info->fix_array_count = count; | |
6248 | ||
6249 | r = relax_info->fix_list; | |
6250 | for (i = 0; i < count; i++, r = r->next) | |
6251 | { | |
6252 | relax_info->fix_array[count - 1 - i] = *r; | |
6253 | relax_info->fix_array[count - 1 - i].next = NULL; | |
6254 | } | |
6255 | ||
6256 | qsort (relax_info->fix_array, relax_info->fix_array_count, | |
6257 | sizeof (reloc_bfd_fix), fix_compare); | |
6258 | } | |
6259 | ||
6260 | ||
6261 | static reloc_bfd_fix * | |
7fa3d080 | 6262 | get_bfd_fix (asection *sec, bfd_vma offset, unsigned type) |
43cd72b9 BW |
6263 | { |
6264 | xtensa_relax_info *relax_info = get_xtensa_relax_info (sec); | |
6265 | reloc_bfd_fix *rv; | |
6266 | reloc_bfd_fix key; | |
6267 | ||
6268 | if (relax_info == NULL) | |
6269 | return NULL; | |
6270 | if (relax_info->fix_list == NULL) | |
6271 | return NULL; | |
6272 | ||
6273 | if (relax_info->fix_array == NULL) | |
6274 | cache_fix_array (sec); | |
6275 | ||
6276 | key.src_offset = offset; | |
6277 | key.src_type = type; | |
6278 | rv = bsearch (&key, relax_info->fix_array, relax_info->fix_array_count, | |
6279 | sizeof (reloc_bfd_fix), fix_compare); | |
6280 | return rv; | |
6281 | } | |
6282 | ||
6283 | \f | |
6284 | /* Section caching. */ | |
6285 | ||
6286 | typedef struct section_cache_struct section_cache_t; | |
6287 | ||
6288 | struct section_cache_struct | |
6289 | { | |
6290 | asection *sec; | |
6291 | ||
6292 | bfd_byte *contents; /* Cache of the section contents. */ | |
6293 | bfd_size_type content_length; | |
6294 | ||
6295 | property_table_entry *ptbl; /* Cache of the section property table. */ | |
6296 | unsigned pte_count; | |
6297 | ||
6298 | Elf_Internal_Rela *relocs; /* Cache of the section relocations. */ | |
6299 | unsigned reloc_count; | |
6300 | }; | |
6301 | ||
6302 | ||
7fa3d080 BW |
6303 | static void |
6304 | init_section_cache (section_cache_t *sec_cache) | |
6305 | { | |
6306 | memset (sec_cache, 0, sizeof (*sec_cache)); | |
6307 | } | |
43cd72b9 BW |
6308 | |
6309 | ||
6310 | static void | |
65e911f9 | 6311 | free_section_cache (section_cache_t *sec_cache) |
43cd72b9 | 6312 | { |
7fa3d080 BW |
6313 | if (sec_cache->sec) |
6314 | { | |
6315 | release_contents (sec_cache->sec, sec_cache->contents); | |
6316 | release_internal_relocs (sec_cache->sec, sec_cache->relocs); | |
c9594989 | 6317 | free (sec_cache->ptbl); |
7fa3d080 | 6318 | } |
43cd72b9 BW |
6319 | } |
6320 | ||
6321 | ||
0a1b45a2 | 6322 | static bool |
7fa3d080 BW |
6323 | section_cache_section (section_cache_t *sec_cache, |
6324 | asection *sec, | |
6325 | struct bfd_link_info *link_info) | |
43cd72b9 BW |
6326 | { |
6327 | bfd *abfd; | |
6328 | property_table_entry *prop_table = NULL; | |
6329 | int ptblsize = 0; | |
6330 | bfd_byte *contents = NULL; | |
6331 | Elf_Internal_Rela *internal_relocs = NULL; | |
6332 | bfd_size_type sec_size; | |
6333 | ||
6334 | if (sec == NULL) | |
0a1b45a2 | 6335 | return false; |
43cd72b9 | 6336 | if (sec == sec_cache->sec) |
0a1b45a2 | 6337 | return true; |
43cd72b9 BW |
6338 | |
6339 | abfd = sec->owner; | |
6340 | sec_size = bfd_get_section_limit (abfd, sec); | |
6341 | ||
6342 | /* Get the contents. */ | |
6343 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
6344 | if (contents == NULL && sec_size != 0) | |
6345 | goto err; | |
6346 | ||
6347 | /* Get the relocations. */ | |
6348 | internal_relocs = retrieve_internal_relocs (abfd, sec, | |
6349 | link_info->keep_memory); | |
6350 | ||
6351 | /* Get the entry table. */ | |
6352 | ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table, | |
0a1b45a2 | 6353 | XTENSA_PROP_SEC_NAME, false); |
43cd72b9 BW |
6354 | if (ptblsize < 0) |
6355 | goto err; | |
6356 | ||
6357 | /* Fill in the new section cache. */ | |
65e911f9 AM |
6358 | free_section_cache (sec_cache); |
6359 | init_section_cache (sec_cache); | |
43cd72b9 BW |
6360 | |
6361 | sec_cache->sec = sec; | |
6362 | sec_cache->contents = contents; | |
6363 | sec_cache->content_length = sec_size; | |
6364 | sec_cache->relocs = internal_relocs; | |
6365 | sec_cache->reloc_count = sec->reloc_count; | |
6366 | sec_cache->pte_count = ptblsize; | |
6367 | sec_cache->ptbl = prop_table; | |
6368 | ||
0a1b45a2 | 6369 | return true; |
43cd72b9 BW |
6370 | |
6371 | err: | |
6372 | release_contents (sec, contents); | |
6373 | release_internal_relocs (sec, internal_relocs); | |
c9594989 | 6374 | free (prop_table); |
0a1b45a2 | 6375 | return false; |
43cd72b9 BW |
6376 | } |
6377 | ||
43cd72b9 BW |
6378 | \f |
6379 | /* Extended basic blocks. */ | |
6380 | ||
6381 | /* An ebb_struct represents an Extended Basic Block. Within this | |
6382 | range, we guarantee that all instructions are decodable, the | |
6383 | property table entries are contiguous, and no property table | |
6384 | specifies a segment that cannot have instructions moved. This | |
6385 | structure contains caches of the contents, property table and | |
6386 | relocations for the specified section for easy use. The range is | |
6387 | specified by ranges of indices for the byte offset, property table | |
6388 | offsets and relocation offsets. These must be consistent. */ | |
6389 | ||
6390 | typedef struct ebb_struct ebb_t; | |
6391 | ||
6392 | struct ebb_struct | |
6393 | { | |
6394 | asection *sec; | |
6395 | ||
6396 | bfd_byte *contents; /* Cache of the section contents. */ | |
6397 | bfd_size_type content_length; | |
6398 | ||
6399 | property_table_entry *ptbl; /* Cache of the section property table. */ | |
6400 | unsigned pte_count; | |
6401 | ||
6402 | Elf_Internal_Rela *relocs; /* Cache of the section relocations. */ | |
6403 | unsigned reloc_count; | |
6404 | ||
6405 | bfd_vma start_offset; /* Offset in section. */ | |
6406 | unsigned start_ptbl_idx; /* Offset in the property table. */ | |
6407 | unsigned start_reloc_idx; /* Offset in the relocations. */ | |
6408 | ||
6409 | bfd_vma end_offset; | |
6410 | unsigned end_ptbl_idx; | |
6411 | unsigned end_reloc_idx; | |
6412 | ||
0a1b45a2 | 6413 | bool ends_section; /* Is this the last ebb in a section? */ |
43cd72b9 BW |
6414 | |
6415 | /* The unreachable property table at the end of this set of blocks; | |
6416 | NULL if the end is not an unreachable block. */ | |
6417 | property_table_entry *ends_unreachable; | |
6418 | }; | |
6419 | ||
6420 | ||
6421 | enum ebb_target_enum | |
6422 | { | |
6423 | EBB_NO_ALIGN = 0, | |
6424 | EBB_DESIRE_TGT_ALIGN, | |
6425 | EBB_REQUIRE_TGT_ALIGN, | |
6426 | EBB_REQUIRE_LOOP_ALIGN, | |
6427 | EBB_REQUIRE_ALIGN | |
6428 | }; | |
6429 | ||
6430 | ||
6431 | /* proposed_action_struct is similar to the text_action_struct except | |
6432 | that is represents a potential transformation, not one that will | |
6433 | occur. We build a list of these for an extended basic block | |
6434 | and use them to compute the actual actions desired. We must be | |
6435 | careful that the entire set of actual actions we perform do not | |
6436 | break any relocations that would fit if the actions were not | |
6437 | performed. */ | |
6438 | ||
6439 | typedef struct proposed_action_struct proposed_action; | |
6440 | ||
6441 | struct proposed_action_struct | |
6442 | { | |
6443 | enum ebb_target_enum align_type; /* for the target alignment */ | |
6444 | bfd_vma alignment_pow; | |
6445 | text_action_t action; | |
6446 | bfd_vma offset; | |
6447 | int removed_bytes; | |
0a1b45a2 | 6448 | bool do_action; /* If false, then we will not perform the action. */ |
43cd72b9 BW |
6449 | }; |
6450 | ||
6451 | ||
6452 | /* The ebb_constraint_struct keeps a set of proposed actions for an | |
6453 | extended basic block. */ | |
6454 | ||
6455 | typedef struct ebb_constraint_struct ebb_constraint; | |
6456 | ||
6457 | struct ebb_constraint_struct | |
6458 | { | |
6459 | ebb_t ebb; | |
0a1b45a2 | 6460 | bool start_movable; |
43cd72b9 BW |
6461 | |
6462 | /* Bytes of extra space at the beginning if movable. */ | |
6463 | int start_extra_space; | |
6464 | ||
6465 | enum ebb_target_enum start_align; | |
6466 | ||
0a1b45a2 | 6467 | bool end_movable; |
43cd72b9 BW |
6468 | |
6469 | /* Bytes of extra space at the end if movable. */ | |
6470 | int end_extra_space; | |
6471 | ||
6472 | unsigned action_count; | |
6473 | unsigned action_allocated; | |
6474 | ||
6475 | /* Array of proposed actions. */ | |
6476 | proposed_action *actions; | |
6477 | ||
6478 | /* Action alignments -- one for each proposed action. */ | |
6479 | enum ebb_target_enum *action_aligns; | |
6480 | }; | |
6481 | ||
6482 | ||
43cd72b9 | 6483 | static void |
7fa3d080 | 6484 | init_ebb_constraint (ebb_constraint *c) |
43cd72b9 BW |
6485 | { |
6486 | memset (c, 0, sizeof (ebb_constraint)); | |
6487 | } | |
6488 | ||
6489 | ||
6490 | static void | |
7fa3d080 | 6491 | free_ebb_constraint (ebb_constraint *c) |
43cd72b9 | 6492 | { |
c9594989 | 6493 | free (c->actions); |
43cd72b9 BW |
6494 | } |
6495 | ||
6496 | ||
6497 | static void | |
7fa3d080 BW |
6498 | init_ebb (ebb_t *ebb, |
6499 | asection *sec, | |
6500 | bfd_byte *contents, | |
6501 | bfd_size_type content_length, | |
6502 | property_table_entry *prop_table, | |
6503 | unsigned ptblsize, | |
6504 | Elf_Internal_Rela *internal_relocs, | |
6505 | unsigned reloc_count) | |
43cd72b9 BW |
6506 | { |
6507 | memset (ebb, 0, sizeof (ebb_t)); | |
6508 | ebb->sec = sec; | |
6509 | ebb->contents = contents; | |
6510 | ebb->content_length = content_length; | |
6511 | ebb->ptbl = prop_table; | |
6512 | ebb->pte_count = ptblsize; | |
6513 | ebb->relocs = internal_relocs; | |
6514 | ebb->reloc_count = reloc_count; | |
6515 | ebb->start_offset = 0; | |
6516 | ebb->end_offset = ebb->content_length - 1; | |
6517 | ebb->start_ptbl_idx = 0; | |
6518 | ebb->end_ptbl_idx = ptblsize; | |
6519 | ebb->start_reloc_idx = 0; | |
6520 | ebb->end_reloc_idx = reloc_count; | |
6521 | } | |
6522 | ||
6523 | ||
6524 | /* Extend the ebb to all decodable contiguous sections. The algorithm | |
6525 | for building a basic block around an instruction is to push it | |
6526 | forward until we hit the end of a section, an unreachable block or | |
6527 | a block that cannot be transformed. Then we push it backwards | |
6528 | searching for similar conditions. */ | |
6529 | ||
0a1b45a2 AM |
6530 | static bool extend_ebb_bounds_forward (ebb_t *); |
6531 | static bool extend_ebb_bounds_backward (ebb_t *); | |
7fa3d080 BW |
6532 | static bfd_size_type insn_block_decodable_len |
6533 | (bfd_byte *, bfd_size_type, bfd_vma, bfd_size_type); | |
6534 | ||
0a1b45a2 | 6535 | static bool |
7fa3d080 | 6536 | extend_ebb_bounds (ebb_t *ebb) |
43cd72b9 BW |
6537 | { |
6538 | if (!extend_ebb_bounds_forward (ebb)) | |
0a1b45a2 | 6539 | return false; |
43cd72b9 | 6540 | if (!extend_ebb_bounds_backward (ebb)) |
0a1b45a2 AM |
6541 | return false; |
6542 | return true; | |
43cd72b9 BW |
6543 | } |
6544 | ||
6545 | ||
0a1b45a2 | 6546 | static bool |
7fa3d080 | 6547 | extend_ebb_bounds_forward (ebb_t *ebb) |
43cd72b9 BW |
6548 | { |
6549 | property_table_entry *the_entry, *new_entry; | |
6550 | ||
6551 | the_entry = &ebb->ptbl[ebb->end_ptbl_idx]; | |
6552 | ||
6553 | /* Stop when (1) we cannot decode an instruction, (2) we are at | |
6554 | the end of the property tables, (3) we hit a non-contiguous property | |
6555 | table entry, (4) we hit a NO_TRANSFORM region. */ | |
6556 | ||
6557 | while (1) | |
6558 | { | |
6559 | bfd_vma entry_end; | |
6560 | bfd_size_type insn_block_len; | |
6561 | ||
6562 | entry_end = the_entry->address - ebb->sec->vma + the_entry->size; | |
6563 | insn_block_len = | |
6564 | insn_block_decodable_len (ebb->contents, ebb->content_length, | |
6565 | ebb->end_offset, | |
6566 | entry_end - ebb->end_offset); | |
6567 | if (insn_block_len != (entry_end - ebb->end_offset)) | |
6568 | { | |
4eca0228 | 6569 | _bfd_error_handler |
695344c0 | 6570 | /* xgettext:c-format */ |
2dcf00ce | 6571 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction; " |
d42c267e | 6572 | "possible configuration mismatch"), |
2dcf00ce AM |
6573 | ebb->sec->owner, ebb->sec, |
6574 | (uint64_t) (ebb->end_offset + insn_block_len)); | |
0a1b45a2 | 6575 | return false; |
43cd72b9 BW |
6576 | } |
6577 | ebb->end_offset += insn_block_len; | |
6578 | ||
6579 | if (ebb->end_offset == ebb->sec->size) | |
0a1b45a2 | 6580 | ebb->ends_section = true; |
43cd72b9 BW |
6581 | |
6582 | /* Update the reloc counter. */ | |
6583 | while (ebb->end_reloc_idx + 1 < ebb->reloc_count | |
6584 | && (ebb->relocs[ebb->end_reloc_idx + 1].r_offset | |
6585 | < ebb->end_offset)) | |
6586 | { | |
6587 | ebb->end_reloc_idx++; | |
6588 | } | |
6589 | ||
6590 | if (ebb->end_ptbl_idx + 1 == ebb->pte_count) | |
0a1b45a2 | 6591 | return true; |
43cd72b9 BW |
6592 | |
6593 | new_entry = &ebb->ptbl[ebb->end_ptbl_idx + 1]; | |
6594 | if (((new_entry->flags & XTENSA_PROP_INSN) == 0) | |
99ded152 | 6595 | || ((new_entry->flags & XTENSA_PROP_NO_TRANSFORM) != 0) |
43cd72b9 BW |
6596 | || ((the_entry->flags & XTENSA_PROP_ALIGN) != 0)) |
6597 | break; | |
6598 | ||
6599 | if (the_entry->address + the_entry->size != new_entry->address) | |
6600 | break; | |
6601 | ||
6602 | the_entry = new_entry; | |
6603 | ebb->end_ptbl_idx++; | |
6604 | } | |
6605 | ||
6606 | /* Quick check for an unreachable or end of file just at the end. */ | |
6607 | if (ebb->end_ptbl_idx + 1 == ebb->pte_count) | |
6608 | { | |
6609 | if (ebb->end_offset == ebb->content_length) | |
0a1b45a2 | 6610 | ebb->ends_section = true; |
43cd72b9 BW |
6611 | } |
6612 | else | |
6613 | { | |
6614 | new_entry = &ebb->ptbl[ebb->end_ptbl_idx + 1]; | |
6615 | if ((new_entry->flags & XTENSA_PROP_UNREACHABLE) != 0 | |
6616 | && the_entry->address + the_entry->size == new_entry->address) | |
6617 | ebb->ends_unreachable = new_entry; | |
6618 | } | |
6619 | ||
6620 | /* Any other ending requires exact alignment. */ | |
0a1b45a2 | 6621 | return true; |
43cd72b9 BW |
6622 | } |
6623 | ||
6624 | ||
0a1b45a2 | 6625 | static bool |
7fa3d080 | 6626 | extend_ebb_bounds_backward (ebb_t *ebb) |
43cd72b9 BW |
6627 | { |
6628 | property_table_entry *the_entry, *new_entry; | |
6629 | ||
6630 | the_entry = &ebb->ptbl[ebb->start_ptbl_idx]; | |
6631 | ||
6632 | /* Stop when (1) we cannot decode the instructions in the current entry. | |
6633 | (2) we are at the beginning of the property tables, (3) we hit a | |
6634 | non-contiguous property table entry, (4) we hit a NO_TRANSFORM region. */ | |
6635 | ||
6636 | while (1) | |
6637 | { | |
6638 | bfd_vma block_begin; | |
6639 | bfd_size_type insn_block_len; | |
6640 | ||
6641 | block_begin = the_entry->address - ebb->sec->vma; | |
6642 | insn_block_len = | |
6643 | insn_block_decodable_len (ebb->contents, ebb->content_length, | |
6644 | block_begin, | |
6645 | ebb->start_offset - block_begin); | |
6646 | if (insn_block_len != ebb->start_offset - block_begin) | |
6647 | { | |
4eca0228 | 6648 | _bfd_error_handler |
695344c0 | 6649 | /* xgettext:c-format */ |
2dcf00ce | 6650 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction; " |
d42c267e | 6651 | "possible configuration mismatch"), |
2dcf00ce AM |
6652 | ebb->sec->owner, ebb->sec, |
6653 | (uint64_t) (ebb->end_offset + insn_block_len)); | |
0a1b45a2 | 6654 | return false; |
43cd72b9 BW |
6655 | } |
6656 | ebb->start_offset -= insn_block_len; | |
6657 | ||
6658 | /* Update the reloc counter. */ | |
6659 | while (ebb->start_reloc_idx > 0 | |
6660 | && (ebb->relocs[ebb->start_reloc_idx - 1].r_offset | |
6661 | >= ebb->start_offset)) | |
6662 | { | |
6663 | ebb->start_reloc_idx--; | |
6664 | } | |
6665 | ||
6666 | if (ebb->start_ptbl_idx == 0) | |
0a1b45a2 | 6667 | return true; |
43cd72b9 BW |
6668 | |
6669 | new_entry = &ebb->ptbl[ebb->start_ptbl_idx - 1]; | |
6670 | if ((new_entry->flags & XTENSA_PROP_INSN) == 0 | |
99ded152 | 6671 | || ((new_entry->flags & XTENSA_PROP_NO_TRANSFORM) != 0) |
43cd72b9 | 6672 | || ((new_entry->flags & XTENSA_PROP_ALIGN) != 0)) |
0a1b45a2 | 6673 | return true; |
43cd72b9 | 6674 | if (new_entry->address + new_entry->size != the_entry->address) |
0a1b45a2 | 6675 | return true; |
43cd72b9 BW |
6676 | |
6677 | the_entry = new_entry; | |
6678 | ebb->start_ptbl_idx--; | |
6679 | } | |
0a1b45a2 | 6680 | return true; |
43cd72b9 BW |
6681 | } |
6682 | ||
6683 | ||
6684 | static bfd_size_type | |
7fa3d080 BW |
6685 | insn_block_decodable_len (bfd_byte *contents, |
6686 | bfd_size_type content_len, | |
6687 | bfd_vma block_offset, | |
6688 | bfd_size_type block_len) | |
43cd72b9 BW |
6689 | { |
6690 | bfd_vma offset = block_offset; | |
6691 | ||
6692 | while (offset < block_offset + block_len) | |
6693 | { | |
6694 | bfd_size_type insn_len = 0; | |
6695 | ||
6696 | insn_len = insn_decode_len (contents, content_len, offset); | |
6697 | if (insn_len == 0) | |
6698 | return (offset - block_offset); | |
6699 | offset += insn_len; | |
6700 | } | |
6701 | return (offset - block_offset); | |
6702 | } | |
6703 | ||
6704 | ||
6705 | static void | |
7fa3d080 | 6706 | ebb_propose_action (ebb_constraint *c, |
7fa3d080 | 6707 | enum ebb_target_enum align_type, |
288f74fa | 6708 | bfd_vma alignment_pow, |
7fa3d080 BW |
6709 | text_action_t action, |
6710 | bfd_vma offset, | |
6711 | int removed_bytes, | |
0a1b45a2 | 6712 | bool do_action) |
43cd72b9 | 6713 | { |
b08b5071 | 6714 | proposed_action *act; |
43cd72b9 | 6715 | |
43cd72b9 BW |
6716 | if (c->action_allocated <= c->action_count) |
6717 | { | |
b08b5071 | 6718 | unsigned new_allocated, i; |
823fc61f | 6719 | proposed_action *new_actions; |
b08b5071 BW |
6720 | |
6721 | new_allocated = (c->action_count + 2) * 2; | |
823fc61f | 6722 | new_actions = (proposed_action *) |
43cd72b9 BW |
6723 | bfd_zmalloc (sizeof (proposed_action) * new_allocated); |
6724 | ||
6725 | for (i = 0; i < c->action_count; i++) | |
6726 | new_actions[i] = c->actions[i]; | |
c9594989 | 6727 | free (c->actions); |
43cd72b9 BW |
6728 | c->actions = new_actions; |
6729 | c->action_allocated = new_allocated; | |
6730 | } | |
b08b5071 BW |
6731 | |
6732 | act = &c->actions[c->action_count]; | |
6733 | act->align_type = align_type; | |
6734 | act->alignment_pow = alignment_pow; | |
6735 | act->action = action; | |
6736 | act->offset = offset; | |
6737 | act->removed_bytes = removed_bytes; | |
6738 | act->do_action = do_action; | |
6739 | ||
43cd72b9 BW |
6740 | c->action_count++; |
6741 | } | |
6742 | ||
6743 | \f | |
6744 | /* Access to internal relocations, section contents and symbols. */ | |
6745 | ||
6746 | /* During relaxation, we need to modify relocations, section contents, | |
6747 | and symbol definitions, and we need to keep the original values from | |
6748 | being reloaded from the input files, i.e., we need to "pin" the | |
6749 | modified values in memory. We also want to continue to observe the | |
6750 | setting of the "keep-memory" flag. The following functions wrap the | |
6751 | standard BFD functions to take care of this for us. */ | |
6752 | ||
6753 | static Elf_Internal_Rela * | |
0a1b45a2 | 6754 | retrieve_internal_relocs (bfd *abfd, asection *sec, bool keep_memory) |
43cd72b9 BW |
6755 | { |
6756 | Elf_Internal_Rela *internal_relocs; | |
6757 | ||
6758 | if ((sec->flags & SEC_LINKER_CREATED) != 0) | |
6759 | return NULL; | |
6760 | ||
6761 | internal_relocs = elf_section_data (sec)->relocs; | |
6762 | if (internal_relocs == NULL) | |
6763 | internal_relocs = (_bfd_elf_link_read_relocs | |
7fa3d080 | 6764 | (abfd, sec, NULL, NULL, keep_memory)); |
43cd72b9 BW |
6765 | return internal_relocs; |
6766 | } | |
6767 | ||
6768 | ||
6769 | static void | |
7fa3d080 | 6770 | pin_internal_relocs (asection *sec, Elf_Internal_Rela *internal_relocs) |
43cd72b9 BW |
6771 | { |
6772 | elf_section_data (sec)->relocs = internal_relocs; | |
6773 | } | |
6774 | ||
6775 | ||
6776 | static void | |
7fa3d080 | 6777 | release_internal_relocs (asection *sec, Elf_Internal_Rela *internal_relocs) |
43cd72b9 | 6778 | { |
c9594989 | 6779 | if (elf_section_data (sec)->relocs != internal_relocs) |
43cd72b9 BW |
6780 | free (internal_relocs); |
6781 | } | |
6782 | ||
6783 | ||
6784 | static bfd_byte * | |
0a1b45a2 | 6785 | retrieve_contents (bfd *abfd, asection *sec, bool keep_memory) |
43cd72b9 BW |
6786 | { |
6787 | bfd_byte *contents; | |
6788 | bfd_size_type sec_size; | |
6789 | ||
6790 | sec_size = bfd_get_section_limit (abfd, sec); | |
6791 | contents = elf_section_data (sec)->this_hdr.contents; | |
68ffbac6 | 6792 | |
43cd72b9 BW |
6793 | if (contents == NULL && sec_size != 0) |
6794 | { | |
6795 | if (!bfd_malloc_and_get_section (abfd, sec, &contents)) | |
6796 | { | |
c9594989 | 6797 | free (contents); |
43cd72b9 BW |
6798 | return NULL; |
6799 | } | |
68ffbac6 | 6800 | if (keep_memory) |
43cd72b9 BW |
6801 | elf_section_data (sec)->this_hdr.contents = contents; |
6802 | } | |
6803 | return contents; | |
6804 | } | |
6805 | ||
6806 | ||
6807 | static void | |
7fa3d080 | 6808 | pin_contents (asection *sec, bfd_byte *contents) |
43cd72b9 BW |
6809 | { |
6810 | elf_section_data (sec)->this_hdr.contents = contents; | |
6811 | } | |
6812 | ||
6813 | ||
6814 | static void | |
7fa3d080 | 6815 | release_contents (asection *sec, bfd_byte *contents) |
43cd72b9 | 6816 | { |
c9594989 | 6817 | if (elf_section_data (sec)->this_hdr.contents != contents) |
43cd72b9 BW |
6818 | free (contents); |
6819 | } | |
6820 | ||
6821 | ||
6822 | static Elf_Internal_Sym * | |
7fa3d080 | 6823 | retrieve_local_syms (bfd *input_bfd) |
43cd72b9 BW |
6824 | { |
6825 | Elf_Internal_Shdr *symtab_hdr; | |
6826 | Elf_Internal_Sym *isymbuf; | |
6827 | size_t locsymcount; | |
6828 | ||
6829 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
6830 | locsymcount = symtab_hdr->sh_info; | |
6831 | ||
6832 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
6833 | if (isymbuf == NULL && locsymcount != 0) | |
6834 | isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, locsymcount, 0, | |
6835 | NULL, NULL, NULL); | |
6836 | ||
6837 | /* Save the symbols for this input file so they won't be read again. */ | |
6838 | if (isymbuf && isymbuf != (Elf_Internal_Sym *) symtab_hdr->contents) | |
6839 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
6840 | ||
6841 | return isymbuf; | |
6842 | } | |
6843 | ||
6844 | \f | |
6845 | /* Code for link-time relaxation. */ | |
6846 | ||
6847 | /* Initialization for relaxation: */ | |
0a1b45a2 AM |
6848 | static bool analyze_relocations (struct bfd_link_info *); |
6849 | static bool find_relaxable_sections | |
6850 | (bfd *, asection *, struct bfd_link_info *, bool *); | |
6851 | static bool collect_source_relocs | |
7fa3d080 | 6852 | (bfd *, asection *, struct bfd_link_info *); |
0a1b45a2 | 6853 | static bool is_resolvable_asm_expansion |
7fa3d080 | 6854 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, struct bfd_link_info *, |
0a1b45a2 | 6855 | bool *); |
43cd72b9 | 6856 | static Elf_Internal_Rela *find_associated_l32r_irel |
7fa3d080 | 6857 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Rela *); |
0a1b45a2 | 6858 | static bool compute_text_actions |
7fa3d080 | 6859 | (bfd *, asection *, struct bfd_link_info *); |
0a1b45a2 AM |
6860 | static bool compute_ebb_proposed_actions (ebb_constraint *); |
6861 | static bool compute_ebb_actions (ebb_constraint *); | |
b2b326d2 | 6862 | typedef struct reloc_range_list_struct reloc_range_list; |
0a1b45a2 | 6863 | static bool check_section_ebb_pcrels_fit |
b2b326d2 MF |
6864 | (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, |
6865 | reloc_range_list *, const ebb_constraint *, | |
cb337148 | 6866 | const xtensa_opcode *); |
0a1b45a2 | 6867 | static bool check_section_ebb_reduces (const ebb_constraint *); |
43cd72b9 | 6868 | static void text_action_add_proposed |
7fa3d080 | 6869 | (text_action_list *, const ebb_constraint *, asection *); |
43cd72b9 BW |
6870 | |
6871 | /* First pass: */ | |
0a1b45a2 | 6872 | static bool compute_removed_literals |
7fa3d080 | 6873 | (bfd *, asection *, struct bfd_link_info *, value_map_hash_table *); |
43cd72b9 | 6874 | static Elf_Internal_Rela *get_irel_at_offset |
7fa3d080 | 6875 | (asection *, Elf_Internal_Rela *, bfd_vma); |
0a1b45a2 | 6876 | static bool is_removable_literal |
99ded152 BW |
6877 | (const source_reloc *, int, const source_reloc *, int, asection *, |
6878 | property_table_entry *, int); | |
0a1b45a2 | 6879 | static bool remove_dead_literal |
7fa3d080 | 6880 | (bfd *, asection *, struct bfd_link_info *, Elf_Internal_Rela *, |
68ffbac6 | 6881 | Elf_Internal_Rela *, source_reloc *, property_table_entry *, int); |
0a1b45a2 | 6882 | static bool identify_literal_placement |
7fa3d080 | 6883 | (bfd *, asection *, bfd_byte *, struct bfd_link_info *, |
0a1b45a2 | 6884 | value_map_hash_table *, bool *, Elf_Internal_Rela *, int, |
7fa3d080 | 6885 | source_reloc *, property_table_entry *, int, section_cache_t *, |
0a1b45a2 AM |
6886 | bool); |
6887 | static bool relocations_reach (source_reloc *, int, const r_reloc *); | |
6888 | static bool coalesce_shared_literal | |
7fa3d080 | 6889 | (asection *, source_reloc *, property_table_entry *, int, value_map *); |
0a1b45a2 | 6890 | static bool move_shared_literal |
7fa3d080 BW |
6891 | (asection *, struct bfd_link_info *, source_reloc *, property_table_entry *, |
6892 | int, const r_reloc *, const literal_value *, section_cache_t *); | |
43cd72b9 BW |
6893 | |
6894 | /* Second pass: */ | |
0a1b45a2 AM |
6895 | static bool relax_section (bfd *, asection *, struct bfd_link_info *); |
6896 | static bool translate_section_fixes (asection *); | |
6897 | static bool translate_reloc_bfd_fix (reloc_bfd_fix *); | |
9b7f5d20 | 6898 | static asection *translate_reloc (const r_reloc *, r_reloc *, asection *); |
43cd72b9 | 6899 | static void shrink_dynamic_reloc_sections |
7fa3d080 | 6900 | (struct bfd_link_info *, bfd *, asection *, Elf_Internal_Rela *); |
0a1b45a2 | 6901 | static bool move_literal |
7fa3d080 BW |
6902 | (bfd *, struct bfd_link_info *, asection *, bfd_vma, bfd_byte *, |
6903 | xtensa_relax_info *, Elf_Internal_Rela **, const literal_value *); | |
0a1b45a2 | 6904 | static bool relax_property_section |
7fa3d080 | 6905 | (bfd *, asection *, struct bfd_link_info *); |
43cd72b9 BW |
6906 | |
6907 | /* Third pass: */ | |
0a1b45a2 | 6908 | static bool relax_section_symbols (bfd *, asection *); |
43cd72b9 BW |
6909 | |
6910 | ||
0a1b45a2 | 6911 | static bool |
7fa3d080 BW |
6912 | elf_xtensa_relax_section (bfd *abfd, |
6913 | asection *sec, | |
6914 | struct bfd_link_info *link_info, | |
0a1b45a2 | 6915 | bool *again) |
43cd72b9 BW |
6916 | { |
6917 | static value_map_hash_table *values = NULL; | |
0a1b45a2 | 6918 | static bool relocations_analyzed = false; |
43cd72b9 BW |
6919 | xtensa_relax_info *relax_info; |
6920 | ||
6921 | if (!relocations_analyzed) | |
6922 | { | |
6923 | /* Do some overall initialization for relaxation. */ | |
6924 | values = value_map_hash_table_init (); | |
6925 | if (values == NULL) | |
0a1b45a2 AM |
6926 | return false; |
6927 | relaxing_section = true; | |
43cd72b9 | 6928 | if (!analyze_relocations (link_info)) |
0a1b45a2 AM |
6929 | return false; |
6930 | relocations_analyzed = true; | |
43cd72b9 | 6931 | } |
0a1b45a2 | 6932 | *again = false; |
43cd72b9 BW |
6933 | |
6934 | /* Don't mess with linker-created sections. */ | |
6935 | if ((sec->flags & SEC_LINKER_CREATED) != 0) | |
0a1b45a2 | 6936 | return true; |
43cd72b9 BW |
6937 | |
6938 | relax_info = get_xtensa_relax_info (sec); | |
6939 | BFD_ASSERT (relax_info != NULL); | |
6940 | ||
6941 | switch (relax_info->visited) | |
6942 | { | |
6943 | case 0: | |
6944 | /* Note: It would be nice to fold this pass into | |
6945 | analyze_relocations, but it is important for this step that the | |
6946 | sections be examined in link order. */ | |
6947 | if (!compute_removed_literals (abfd, sec, link_info, values)) | |
0a1b45a2 AM |
6948 | return false; |
6949 | *again = true; | |
43cd72b9 BW |
6950 | break; |
6951 | ||
6952 | case 1: | |
6953 | if (values) | |
6954 | value_map_hash_table_delete (values); | |
6955 | values = NULL; | |
6956 | if (!relax_section (abfd, sec, link_info)) | |
0a1b45a2 AM |
6957 | return false; |
6958 | *again = true; | |
43cd72b9 BW |
6959 | break; |
6960 | ||
6961 | case 2: | |
6962 | if (!relax_section_symbols (abfd, sec)) | |
0a1b45a2 | 6963 | return false; |
43cd72b9 BW |
6964 | break; |
6965 | } | |
6966 | ||
6967 | relax_info->visited++; | |
0a1b45a2 | 6968 | return true; |
43cd72b9 BW |
6969 | } |
6970 | ||
6971 | \f | |
6972 | /* Initialization for relaxation. */ | |
6973 | ||
6974 | /* This function is called once at the start of relaxation. It scans | |
6975 | all the input sections and marks the ones that are relaxable (i.e., | |
6976 | literal sections with L32R relocations against them), and then | |
6977 | collects source_reloc information for all the relocations against | |
6978 | those relaxable sections. During this process, it also detects | |
6979 | longcalls, i.e., calls relaxed by the assembler into indirect | |
6980 | calls, that can be optimized back into direct calls. Within each | |
6981 | extended basic block (ebb) containing an optimized longcall, it | |
6982 | computes a set of "text actions" that can be performed to remove | |
6983 | the L32R associated with the longcall while optionally preserving | |
6984 | branch target alignments. */ | |
6985 | ||
0a1b45a2 | 6986 | static bool |
7fa3d080 | 6987 | analyze_relocations (struct bfd_link_info *link_info) |
43cd72b9 BW |
6988 | { |
6989 | bfd *abfd; | |
6990 | asection *sec; | |
0a1b45a2 | 6991 | bool is_relaxable = false; |
43cd72b9 BW |
6992 | |
6993 | /* Initialize the per-section relaxation info. */ | |
c72f2fb2 | 6994 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
6995 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
6996 | { | |
6997 | init_xtensa_relax_info (sec); | |
6998 | } | |
6999 | ||
7000 | /* Mark relaxable sections (and count relocations against each one). */ | |
c72f2fb2 | 7001 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7002 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7003 | { | |
7004 | if (!find_relaxable_sections (abfd, sec, link_info, &is_relaxable)) | |
0a1b45a2 | 7005 | return false; |
43cd72b9 BW |
7006 | } |
7007 | ||
7008 | /* Bail out if there are no relaxable sections. */ | |
7009 | if (!is_relaxable) | |
0a1b45a2 | 7010 | return true; |
43cd72b9 BW |
7011 | |
7012 | /* Allocate space for source_relocs. */ | |
c72f2fb2 | 7013 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7014 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7015 | { | |
7016 | xtensa_relax_info *relax_info; | |
7017 | ||
7018 | relax_info = get_xtensa_relax_info (sec); | |
7019 | if (relax_info->is_relaxable_literal_section | |
7020 | || relax_info->is_relaxable_asm_section) | |
7021 | { | |
7022 | relax_info->src_relocs = (source_reloc *) | |
7023 | bfd_malloc (relax_info->src_count * sizeof (source_reloc)); | |
7024 | } | |
25c6282a BW |
7025 | else |
7026 | relax_info->src_count = 0; | |
43cd72b9 BW |
7027 | } |
7028 | ||
7029 | /* Collect info on relocations against each relaxable section. */ | |
c72f2fb2 | 7030 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7031 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7032 | { | |
7033 | if (!collect_source_relocs (abfd, sec, link_info)) | |
0a1b45a2 | 7034 | return false; |
43cd72b9 BW |
7035 | } |
7036 | ||
7037 | /* Compute the text actions. */ | |
c72f2fb2 | 7038 | for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next) |
43cd72b9 BW |
7039 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7040 | { | |
7041 | if (!compute_text_actions (abfd, sec, link_info)) | |
0a1b45a2 | 7042 | return false; |
43cd72b9 BW |
7043 | } |
7044 | ||
0a1b45a2 | 7045 | return true; |
43cd72b9 BW |
7046 | } |
7047 | ||
7048 | ||
7049 | /* Find all the sections that might be relaxed. The motivation for | |
7050 | this pass is that collect_source_relocs() needs to record _all_ the | |
7051 | relocations that target each relaxable section. That is expensive | |
7052 | and unnecessary unless the target section is actually going to be | |
7053 | relaxed. This pass identifies all such sections by checking if | |
7054 | they have L32Rs pointing to them. In the process, the total number | |
7055 | of relocations targeting each section is also counted so that we | |
7056 | know how much space to allocate for source_relocs against each | |
7057 | relaxable literal section. */ | |
7058 | ||
0a1b45a2 | 7059 | static bool |
7fa3d080 BW |
7060 | find_relaxable_sections (bfd *abfd, |
7061 | asection *sec, | |
7062 | struct bfd_link_info *link_info, | |
0a1b45a2 | 7063 | bool *is_relaxable_p) |
43cd72b9 BW |
7064 | { |
7065 | Elf_Internal_Rela *internal_relocs; | |
7066 | bfd_byte *contents; | |
0a1b45a2 | 7067 | bool ok = true; |
43cd72b9 BW |
7068 | unsigned i; |
7069 | xtensa_relax_info *source_relax_info; | |
0a1b45a2 | 7070 | bool is_l32r_reloc; |
43cd72b9 BW |
7071 | |
7072 | internal_relocs = retrieve_internal_relocs (abfd, sec, | |
7073 | link_info->keep_memory); | |
68ffbac6 | 7074 | if (internal_relocs == NULL) |
43cd72b9 BW |
7075 | return ok; |
7076 | ||
7077 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
7078 | if (contents == NULL && sec->size != 0) | |
7079 | { | |
0a1b45a2 | 7080 | ok = false; |
43cd72b9 BW |
7081 | goto error_return; |
7082 | } | |
7083 | ||
7084 | source_relax_info = get_xtensa_relax_info (sec); | |
68ffbac6 | 7085 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7086 | { |
7087 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7088 | r_reloc r_rel; | |
7089 | asection *target_sec; | |
7090 | xtensa_relax_info *target_relax_info; | |
7091 | ||
7092 | /* If this section has not already been marked as "relaxable", and | |
7093 | if it contains any ASM_EXPAND relocations (marking expanded | |
7094 | longcalls) that can be optimized into direct calls, then mark | |
7095 | the section as "relaxable". */ | |
7096 | if (source_relax_info | |
7097 | && !source_relax_info->is_relaxable_asm_section | |
7098 | && ELF32_R_TYPE (irel->r_info) == R_XTENSA_ASM_EXPAND) | |
7099 | { | |
0a1b45a2 | 7100 | bool is_reachable = false; |
43cd72b9 BW |
7101 | if (is_resolvable_asm_expansion (abfd, sec, contents, irel, |
7102 | link_info, &is_reachable) | |
7103 | && is_reachable) | |
7104 | { | |
0a1b45a2 AM |
7105 | source_relax_info->is_relaxable_asm_section = true; |
7106 | *is_relaxable_p = true; | |
43cd72b9 BW |
7107 | } |
7108 | } | |
7109 | ||
7110 | r_reloc_init (&r_rel, abfd, irel, contents, | |
7111 | bfd_get_section_limit (abfd, sec)); | |
7112 | ||
7113 | target_sec = r_reloc_get_section (&r_rel); | |
7114 | target_relax_info = get_xtensa_relax_info (target_sec); | |
7115 | if (!target_relax_info) | |
7116 | continue; | |
7117 | ||
7118 | /* Count PC-relative operand relocations against the target section. | |
07d6d2b8 | 7119 | Note: The conditions tested here must match the conditions under |
43cd72b9 | 7120 | which init_source_reloc is called in collect_source_relocs(). */ |
0a1b45a2 | 7121 | is_l32r_reloc = false; |
25c6282a BW |
7122 | if (is_operand_relocation (ELF32_R_TYPE (irel->r_info))) |
7123 | { | |
7124 | xtensa_opcode opcode = | |
7125 | get_relocation_opcode (abfd, sec, contents, irel); | |
7126 | if (opcode != XTENSA_UNDEFINED) | |
7127 | { | |
7128 | is_l32r_reloc = (opcode == get_l32r_opcode ()); | |
7129 | if (!is_alt_relocation (ELF32_R_TYPE (irel->r_info)) | |
7130 | || is_l32r_reloc) | |
7131 | target_relax_info->src_count++; | |
7132 | } | |
7133 | } | |
43cd72b9 | 7134 | |
25c6282a | 7135 | if (is_l32r_reloc && r_reloc_is_defined (&r_rel)) |
43cd72b9 BW |
7136 | { |
7137 | /* Mark the target section as relaxable. */ | |
0a1b45a2 AM |
7138 | target_relax_info->is_relaxable_literal_section = true; |
7139 | *is_relaxable_p = true; | |
43cd72b9 BW |
7140 | } |
7141 | } | |
7142 | ||
7143 | error_return: | |
7144 | release_contents (sec, contents); | |
7145 | release_internal_relocs (sec, internal_relocs); | |
7146 | return ok; | |
7147 | } | |
7148 | ||
7149 | ||
7150 | /* Record _all_ the relocations that point to relaxable sections, and | |
7151 | get rid of ASM_EXPAND relocs by either converting them to | |
7152 | ASM_SIMPLIFY or by removing them. */ | |
7153 | ||
0a1b45a2 | 7154 | static bool |
7fa3d080 BW |
7155 | collect_source_relocs (bfd *abfd, |
7156 | asection *sec, | |
7157 | struct bfd_link_info *link_info) | |
43cd72b9 BW |
7158 | { |
7159 | Elf_Internal_Rela *internal_relocs; | |
7160 | bfd_byte *contents; | |
0a1b45a2 | 7161 | bool ok = true; |
43cd72b9 BW |
7162 | unsigned i; |
7163 | bfd_size_type sec_size; | |
7164 | ||
68ffbac6 | 7165 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
43cd72b9 | 7166 | link_info->keep_memory); |
68ffbac6 | 7167 | if (internal_relocs == NULL) |
43cd72b9 BW |
7168 | return ok; |
7169 | ||
7170 | sec_size = bfd_get_section_limit (abfd, sec); | |
7171 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
7172 | if (contents == NULL && sec_size != 0) | |
7173 | { | |
0a1b45a2 | 7174 | ok = false; |
43cd72b9 BW |
7175 | goto error_return; |
7176 | } | |
7177 | ||
7178 | /* Record relocations against relaxable literal sections. */ | |
68ffbac6 | 7179 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7180 | { |
7181 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7182 | r_reloc r_rel; | |
7183 | asection *target_sec; | |
7184 | xtensa_relax_info *target_relax_info; | |
7185 | ||
7186 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
7187 | ||
7188 | target_sec = r_reloc_get_section (&r_rel); | |
7189 | target_relax_info = get_xtensa_relax_info (target_sec); | |
7190 | ||
7191 | if (target_relax_info | |
7192 | && (target_relax_info->is_relaxable_literal_section | |
7193 | || target_relax_info->is_relaxable_asm_section)) | |
7194 | { | |
7195 | xtensa_opcode opcode = XTENSA_UNDEFINED; | |
7196 | int opnd = -1; | |
0a1b45a2 | 7197 | bool is_abs_literal = false; |
43cd72b9 BW |
7198 | |
7199 | if (is_alt_relocation (ELF32_R_TYPE (irel->r_info))) | |
7200 | { | |
7201 | /* None of the current alternate relocs are PC-relative, | |
7202 | and only PC-relative relocs matter here. However, we | |
7203 | still need to record the opcode for literal | |
7204 | coalescing. */ | |
7205 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
7206 | if (opcode == get_l32r_opcode ()) | |
7207 | { | |
0a1b45a2 | 7208 | is_abs_literal = true; |
43cd72b9 BW |
7209 | opnd = 1; |
7210 | } | |
7211 | else | |
7212 | opcode = XTENSA_UNDEFINED; | |
7213 | } | |
7214 | else if (is_operand_relocation (ELF32_R_TYPE (irel->r_info))) | |
7215 | { | |
7216 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
7217 | opnd = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->r_info)); | |
7218 | } | |
7219 | ||
7220 | if (opcode != XTENSA_UNDEFINED) | |
7221 | { | |
7222 | int src_next = target_relax_info->src_next++; | |
7223 | source_reloc *s_reloc = &target_relax_info->src_relocs[src_next]; | |
7224 | ||
7225 | init_source_reloc (s_reloc, sec, &r_rel, opcode, opnd, | |
7226 | is_abs_literal); | |
7227 | } | |
7228 | } | |
7229 | } | |
7230 | ||
7231 | /* Now get rid of ASM_EXPAND relocations. At this point, the | |
7232 | src_relocs array for the target literal section may still be | |
7233 | incomplete, but it must at least contain the entries for the L32R | |
7234 | relocations associated with ASM_EXPANDs because they were just | |
7235 | added in the preceding loop over the relocations. */ | |
7236 | ||
68ffbac6 | 7237 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7238 | { |
7239 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
0a1b45a2 | 7240 | bool is_reachable; |
43cd72b9 BW |
7241 | |
7242 | if (!is_resolvable_asm_expansion (abfd, sec, contents, irel, link_info, | |
7243 | &is_reachable)) | |
7244 | continue; | |
7245 | ||
7246 | if (is_reachable) | |
7247 | { | |
7248 | Elf_Internal_Rela *l32r_irel; | |
7249 | r_reloc r_rel; | |
7250 | asection *target_sec; | |
7251 | xtensa_relax_info *target_relax_info; | |
7252 | ||
7253 | /* Mark the source_reloc for the L32R so that it will be | |
7254 | removed in compute_removed_literals(), along with the | |
7255 | associated literal. */ | |
7256 | l32r_irel = find_associated_l32r_irel (abfd, sec, contents, | |
7257 | irel, internal_relocs); | |
7258 | if (l32r_irel == NULL) | |
7259 | continue; | |
7260 | ||
7261 | r_reloc_init (&r_rel, abfd, l32r_irel, contents, sec_size); | |
7262 | ||
7263 | target_sec = r_reloc_get_section (&r_rel); | |
7264 | target_relax_info = get_xtensa_relax_info (target_sec); | |
7265 | ||
7266 | if (target_relax_info | |
7267 | && (target_relax_info->is_relaxable_literal_section | |
7268 | || target_relax_info->is_relaxable_asm_section)) | |
7269 | { | |
7270 | source_reloc *s_reloc; | |
7271 | ||
7272 | /* Search the source_relocs for the entry corresponding to | |
7273 | the l32r_irel. Note: The src_relocs array is not yet | |
7274 | sorted, but it wouldn't matter anyway because we're | |
7275 | searching by source offset instead of target offset. */ | |
68ffbac6 | 7276 | s_reloc = find_source_reloc (target_relax_info->src_relocs, |
43cd72b9 BW |
7277 | target_relax_info->src_next, |
7278 | sec, l32r_irel); | |
7279 | BFD_ASSERT (s_reloc); | |
0a1b45a2 | 7280 | s_reloc->is_null = true; |
43cd72b9 BW |
7281 | } |
7282 | ||
7283 | /* Convert this reloc to ASM_SIMPLIFY. */ | |
7284 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
7285 | R_XTENSA_ASM_SIMPLIFY); | |
7286 | l32r_irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
7287 | ||
7288 | pin_internal_relocs (sec, internal_relocs); | |
7289 | } | |
7290 | else | |
7291 | { | |
7292 | /* It is resolvable but doesn't reach. We resolve now | |
7293 | by eliminating the relocation -- the call will remain | |
7294 | expanded into L32R/CALLX. */ | |
7295 | irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
7296 | pin_internal_relocs (sec, internal_relocs); | |
7297 | } | |
7298 | } | |
7299 | ||
7300 | error_return: | |
7301 | release_contents (sec, contents); | |
7302 | release_internal_relocs (sec, internal_relocs); | |
7303 | return ok; | |
7304 | } | |
7305 | ||
7306 | ||
7307 | /* Return TRUE if the asm expansion can be resolved. Generally it can | |
7308 | be resolved on a final link or when a partial link locates it in the | |
7309 | same section as the target. Set "is_reachable" flag if the target of | |
7310 | the call is within the range of a direct call, given the current VMA | |
7311 | for this section and the target section. */ | |
7312 | ||
0a1b45a2 | 7313 | bool |
7fa3d080 BW |
7314 | is_resolvable_asm_expansion (bfd *abfd, |
7315 | asection *sec, | |
7316 | bfd_byte *contents, | |
7317 | Elf_Internal_Rela *irel, | |
7318 | struct bfd_link_info *link_info, | |
0a1b45a2 | 7319 | bool *is_reachable_p) |
43cd72b9 BW |
7320 | { |
7321 | asection *target_sec; | |
eed62915 MF |
7322 | asection *s; |
7323 | bfd_vma first_vma; | |
7324 | bfd_vma last_vma; | |
7325 | unsigned int first_align; | |
7326 | unsigned int adjust; | |
43cd72b9 BW |
7327 | bfd_vma target_offset; |
7328 | r_reloc r_rel; | |
7329 | xtensa_opcode opcode, direct_call_opcode; | |
7330 | bfd_vma self_address; | |
7331 | bfd_vma dest_address; | |
0a1b45a2 | 7332 | bool uses_l32r; |
43cd72b9 BW |
7333 | bfd_size_type sec_size; |
7334 | ||
0a1b45a2 | 7335 | *is_reachable_p = false; |
43cd72b9 BW |
7336 | |
7337 | if (contents == NULL) | |
0a1b45a2 | 7338 | return false; |
43cd72b9 | 7339 | |
68ffbac6 | 7340 | if (ELF32_R_TYPE (irel->r_info) != R_XTENSA_ASM_EXPAND) |
0a1b45a2 | 7341 | return false; |
43cd72b9 BW |
7342 | |
7343 | sec_size = bfd_get_section_limit (abfd, sec); | |
7344 | opcode = get_expanded_call_opcode (contents + irel->r_offset, | |
7345 | sec_size - irel->r_offset, &uses_l32r); | |
7346 | /* Optimization of longcalls that use CONST16 is not yet implemented. */ | |
7347 | if (!uses_l32r) | |
0a1b45a2 | 7348 | return false; |
68ffbac6 | 7349 | |
43cd72b9 BW |
7350 | direct_call_opcode = swap_callx_for_call_opcode (opcode); |
7351 | if (direct_call_opcode == XTENSA_UNDEFINED) | |
0a1b45a2 | 7352 | return false; |
43cd72b9 BW |
7353 | |
7354 | /* Check and see that the target resolves. */ | |
7355 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
7356 | if (!r_reloc_is_defined (&r_rel)) | |
0a1b45a2 | 7357 | return false; |
43cd72b9 BW |
7358 | |
7359 | target_sec = r_reloc_get_section (&r_rel); | |
7360 | target_offset = r_rel.target_offset; | |
7361 | ||
7362 | /* If the target is in a shared library, then it doesn't reach. This | |
7363 | isn't supposed to come up because the compiler should never generate | |
7364 | non-PIC calls on systems that use shared libraries, but the linker | |
7365 | shouldn't crash regardless. */ | |
7366 | if (!target_sec->output_section) | |
0a1b45a2 | 7367 | return false; |
68ffbac6 | 7368 | |
43cd72b9 BW |
7369 | /* For relocatable sections, we can only simplify when the output |
7370 | section of the target is the same as the output section of the | |
7371 | source. */ | |
0e1862bb | 7372 | if (bfd_link_relocatable (link_info) |
43cd72b9 BW |
7373 | && (target_sec->output_section != sec->output_section |
7374 | || is_reloc_sym_weak (abfd, irel))) | |
0a1b45a2 | 7375 | return false; |
43cd72b9 | 7376 | |
331ed130 SA |
7377 | if (target_sec->output_section != sec->output_section) |
7378 | { | |
7379 | /* If the two sections are sufficiently far away that relaxation | |
7380 | might take the call out of range, we can't simplify. For | |
7381 | example, a positive displacement call into another memory | |
7382 | could get moved to a lower address due to literal removal, | |
7383 | but the destination won't move, and so the displacment might | |
7384 | get larger. | |
7385 | ||
7386 | If the displacement is negative, assume the destination could | |
7387 | move as far back as the start of the output section. The | |
7388 | self_address will be at least as far into the output section | |
7389 | as it is prior to relaxation. | |
7390 | ||
7391 | If the displacement is postive, assume the destination will be in | |
7392 | it's pre-relaxed location (because relaxation only makes sections | |
7393 | smaller). The self_address could go all the way to the beginning | |
7394 | of the output section. */ | |
7395 | ||
7396 | dest_address = target_sec->output_section->vma; | |
7397 | self_address = sec->output_section->vma; | |
7398 | ||
7399 | if (sec->output_section->vma > target_sec->output_section->vma) | |
7400 | self_address += sec->output_offset + irel->r_offset + 3; | |
7401 | else | |
7402 | dest_address += bfd_get_section_limit (abfd, target_sec->output_section); | |
7403 | /* Call targets should be four-byte aligned. */ | |
7404 | dest_address = (dest_address + 3) & ~3; | |
7405 | } | |
7406 | else | |
7407 | { | |
7408 | ||
7409 | self_address = (sec->output_section->vma | |
7410 | + sec->output_offset + irel->r_offset + 3); | |
7411 | dest_address = (target_sec->output_section->vma | |
7412 | + target_sec->output_offset + target_offset); | |
7413 | } | |
68ffbac6 | 7414 | |
eed62915 MF |
7415 | /* Adjust addresses with alignments for the worst case to see if call insn |
7416 | can fit. Don't relax l32r + callx to call if the target can be out of | |
7417 | range due to alignment. | |
7418 | Caller and target addresses are highest and lowest address. | |
7419 | Search all sections between caller and target, looking for max alignment. | |
7420 | The adjustment is max alignment bytes. If the alignment at the lowest | |
7421 | address is less than the adjustment, apply the adjustment to highest | |
7422 | address. */ | |
7423 | ||
7424 | /* Start from lowest address. | |
7425 | Lowest address aligmnet is from input section. | |
7426 | Initial alignment (adjust) is from input section. */ | |
7427 | if (dest_address > self_address) | |
7428 | { | |
7429 | s = sec->output_section; | |
7430 | last_vma = dest_address; | |
7431 | first_align = sec->alignment_power; | |
7432 | adjust = target_sec->alignment_power; | |
7433 | } | |
7434 | else | |
7435 | { | |
7436 | s = target_sec->output_section; | |
7437 | last_vma = self_address; | |
7438 | first_align = target_sec->alignment_power; | |
7439 | adjust = sec->alignment_power; | |
7440 | } | |
7441 | ||
7442 | first_vma = s->vma; | |
7443 | ||
7444 | /* Find the largest alignment in output section list. */ | |
7445 | for (; s && s->vma >= first_vma && s->vma <= last_vma ; s = s->next) | |
7446 | { | |
7447 | if (s->alignment_power > adjust) | |
7448 | adjust = s->alignment_power; | |
7449 | } | |
7450 | ||
7451 | if (adjust > first_align) | |
7452 | { | |
7453 | /* Alignment may enlarge the range, adjust highest address. */ | |
7454 | adjust = 1 << adjust; | |
7455 | if (dest_address > self_address) | |
7456 | { | |
7457 | dest_address += adjust; | |
7458 | } | |
7459 | else | |
7460 | { | |
7461 | self_address += adjust; | |
7462 | } | |
7463 | } | |
7464 | ||
43cd72b9 BW |
7465 | *is_reachable_p = pcrel_reloc_fits (direct_call_opcode, 0, |
7466 | self_address, dest_address); | |
7467 | ||
7468 | if ((self_address >> CALL_SEGMENT_BITS) != | |
7469 | (dest_address >> CALL_SEGMENT_BITS)) | |
0a1b45a2 | 7470 | return false; |
43cd72b9 | 7471 | |
0a1b45a2 | 7472 | return true; |
43cd72b9 BW |
7473 | } |
7474 | ||
7475 | ||
7476 | static Elf_Internal_Rela * | |
7fa3d080 BW |
7477 | find_associated_l32r_irel (bfd *abfd, |
7478 | asection *sec, | |
7479 | bfd_byte *contents, | |
7480 | Elf_Internal_Rela *other_irel, | |
7481 | Elf_Internal_Rela *internal_relocs) | |
43cd72b9 BW |
7482 | { |
7483 | unsigned i; | |
e0001a05 | 7484 | |
68ffbac6 | 7485 | for (i = 0; i < sec->reloc_count; i++) |
43cd72b9 BW |
7486 | { |
7487 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
e0001a05 | 7488 | |
43cd72b9 BW |
7489 | if (irel == other_irel) |
7490 | continue; | |
7491 | if (irel->r_offset != other_irel->r_offset) | |
7492 | continue; | |
7493 | if (is_l32r_relocation (abfd, sec, contents, irel)) | |
7494 | return irel; | |
7495 | } | |
7496 | ||
7497 | return NULL; | |
e0001a05 NC |
7498 | } |
7499 | ||
7500 | ||
cb337148 BW |
7501 | static xtensa_opcode * |
7502 | build_reloc_opcodes (bfd *abfd, | |
7503 | asection *sec, | |
7504 | bfd_byte *contents, | |
7505 | Elf_Internal_Rela *internal_relocs) | |
7506 | { | |
7507 | unsigned i; | |
7508 | xtensa_opcode *reloc_opcodes = | |
7509 | (xtensa_opcode *) bfd_malloc (sizeof (xtensa_opcode) * sec->reloc_count); | |
7510 | for (i = 0; i < sec->reloc_count; i++) | |
7511 | { | |
7512 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7513 | reloc_opcodes[i] = get_relocation_opcode (abfd, sec, contents, irel); | |
7514 | } | |
7515 | return reloc_opcodes; | |
7516 | } | |
7517 | ||
b2b326d2 MF |
7518 | struct reloc_range_struct |
7519 | { | |
7520 | bfd_vma addr; | |
0a1b45a2 | 7521 | bool add; /* TRUE if start of a range, FALSE otherwise. */ |
b2b326d2 MF |
7522 | /* Original irel index in the array of relocations for a section. */ |
7523 | unsigned irel_index; | |
7524 | }; | |
7525 | typedef struct reloc_range_struct reloc_range; | |
7526 | ||
7527 | typedef struct reloc_range_list_entry_struct reloc_range_list_entry; | |
7528 | struct reloc_range_list_entry_struct | |
7529 | { | |
7530 | reloc_range_list_entry *next; | |
7531 | reloc_range_list_entry *prev; | |
7532 | Elf_Internal_Rela *irel; | |
7533 | xtensa_opcode opcode; | |
7534 | int opnum; | |
7535 | }; | |
7536 | ||
7537 | struct reloc_range_list_struct | |
7538 | { | |
7539 | /* The rest of the structure is only meaningful when ok is TRUE. */ | |
0a1b45a2 | 7540 | bool ok; |
b2b326d2 MF |
7541 | |
7542 | unsigned n_range; /* Number of range markers. */ | |
7543 | reloc_range *range; /* Sorted range markers. */ | |
7544 | ||
7545 | unsigned first; /* Index of a first range element in the list. */ | |
7546 | unsigned last; /* One past index of a last range element in the list. */ | |
7547 | ||
7548 | unsigned n_list; /* Number of list elements. */ | |
7549 | reloc_range_list_entry *reloc; /* */ | |
7550 | reloc_range_list_entry list_root; | |
7551 | }; | |
7552 | ||
7553 | static int | |
7554 | reloc_range_compare (const void *a, const void *b) | |
7555 | { | |
7556 | const reloc_range *ra = a; | |
7557 | const reloc_range *rb = b; | |
7558 | ||
7559 | if (ra->addr != rb->addr) | |
7560 | return ra->addr < rb->addr ? -1 : 1; | |
7561 | if (ra->add != rb->add) | |
7562 | return ra->add ? -1 : 1; | |
7563 | return 0; | |
7564 | } | |
7565 | ||
7566 | static void | |
7567 | build_reloc_ranges (bfd *abfd, asection *sec, | |
7568 | bfd_byte *contents, | |
7569 | Elf_Internal_Rela *internal_relocs, | |
7570 | xtensa_opcode *reloc_opcodes, | |
7571 | reloc_range_list *list) | |
7572 | { | |
7573 | unsigned i; | |
7574 | size_t n = 0; | |
7575 | size_t max_n = 0; | |
7576 | reloc_range *ranges = NULL; | |
7577 | reloc_range_list_entry *reloc = | |
7578 | bfd_malloc (sec->reloc_count * sizeof (*reloc)); | |
7579 | ||
7580 | memset (list, 0, sizeof (*list)); | |
0a1b45a2 | 7581 | list->ok = true; |
b2b326d2 MF |
7582 | |
7583 | for (i = 0; i < sec->reloc_count; i++) | |
7584 | { | |
7585 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
7586 | int r_type = ELF32_R_TYPE (irel->r_info); | |
7587 | reloc_howto_type *howto = &elf_howto_table[r_type]; | |
7588 | r_reloc r_rel; | |
7589 | ||
7590 | if (r_type == R_XTENSA_ASM_SIMPLIFY | |
7591 | || r_type == R_XTENSA_32_PCREL | |
7592 | || !howto->pc_relative) | |
7593 | continue; | |
7594 | ||
7595 | r_reloc_init (&r_rel, abfd, irel, contents, | |
7596 | bfd_get_section_limit (abfd, sec)); | |
7597 | ||
7598 | if (r_reloc_get_section (&r_rel) != sec) | |
7599 | continue; | |
7600 | ||
7601 | if (n + 2 > max_n) | |
7602 | { | |
7603 | max_n = (max_n + 2) * 2; | |
7604 | ranges = bfd_realloc (ranges, max_n * sizeof (*ranges)); | |
7605 | } | |
7606 | ||
7607 | ranges[n].addr = irel->r_offset; | |
7608 | ranges[n + 1].addr = r_rel.target_offset; | |
7609 | ||
7610 | ranges[n].add = ranges[n].addr < ranges[n + 1].addr; | |
7611 | ranges[n + 1].add = !ranges[n].add; | |
7612 | ||
7613 | ranges[n].irel_index = i; | |
7614 | ranges[n + 1].irel_index = i; | |
7615 | ||
7616 | n += 2; | |
7617 | ||
7618 | reloc[i].irel = irel; | |
7619 | ||
7620 | /* Every relocation won't possibly be checked in the optimized version of | |
07d6d2b8 | 7621 | check_section_ebb_pcrels_fit, so this needs to be done here. */ |
b2b326d2 MF |
7622 | if (is_alt_relocation (ELF32_R_TYPE (irel->r_info))) |
7623 | { | |
7624 | /* None of the current alternate relocs are PC-relative, | |
7625 | and only PC-relative relocs matter here. */ | |
7626 | } | |
7627 | else | |
7628 | { | |
7629 | xtensa_opcode opcode; | |
7630 | int opnum; | |
7631 | ||
7632 | if (reloc_opcodes) | |
7633 | opcode = reloc_opcodes[i]; | |
7634 | else | |
7635 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
7636 | ||
7637 | if (opcode == XTENSA_UNDEFINED) | |
7638 | { | |
0a1b45a2 | 7639 | list->ok = false; |
b2b326d2 MF |
7640 | break; |
7641 | } | |
7642 | ||
7643 | opnum = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->r_info)); | |
7644 | if (opnum == XTENSA_UNDEFINED) | |
7645 | { | |
0a1b45a2 | 7646 | list->ok = false; |
b2b326d2 MF |
7647 | break; |
7648 | } | |
7649 | ||
7650 | /* Record relocation opcode and opnum as we've calculated them | |
7651 | anyway and they won't change. */ | |
7652 | reloc[i].opcode = opcode; | |
7653 | reloc[i].opnum = opnum; | |
7654 | } | |
7655 | } | |
7656 | ||
7657 | if (list->ok) | |
7658 | { | |
7659 | ranges = bfd_realloc (ranges, n * sizeof (*ranges)); | |
7660 | qsort (ranges, n, sizeof (*ranges), reloc_range_compare); | |
7661 | ||
7662 | list->n_range = n; | |
7663 | list->range = ranges; | |
7664 | list->reloc = reloc; | |
7665 | list->list_root.prev = &list->list_root; | |
7666 | list->list_root.next = &list->list_root; | |
7667 | } | |
7668 | else | |
7669 | { | |
7670 | free (ranges); | |
7671 | free (reloc); | |
7672 | } | |
7673 | } | |
7674 | ||
7675 | static void reloc_range_list_append (reloc_range_list *list, | |
7676 | unsigned irel_index) | |
7677 | { | |
7678 | reloc_range_list_entry *entry = list->reloc + irel_index; | |
7679 | ||
7680 | entry->prev = list->list_root.prev; | |
7681 | entry->next = &list->list_root; | |
7682 | entry->prev->next = entry; | |
7683 | entry->next->prev = entry; | |
7684 | ++list->n_list; | |
7685 | } | |
7686 | ||
7687 | static void reloc_range_list_remove (reloc_range_list *list, | |
7688 | unsigned irel_index) | |
7689 | { | |
7690 | reloc_range_list_entry *entry = list->reloc + irel_index; | |
7691 | ||
7692 | entry->next->prev = entry->prev; | |
7693 | entry->prev->next = entry->next; | |
7694 | --list->n_list; | |
7695 | } | |
7696 | ||
7697 | /* Update relocation list object so that it lists all relocations that cross | |
7698 | [first; last] range. Range bounds should not decrease with successive | |
7699 | invocations. */ | |
7700 | static void reloc_range_list_update_range (reloc_range_list *list, | |
7701 | bfd_vma first, bfd_vma last) | |
7702 | { | |
7703 | /* This should not happen: EBBs are iterated from lower addresses to higher. | |
7704 | But even if that happens there's no need to break: just flush current list | |
7705 | and start from scratch. */ | |
7706 | if ((list->last > 0 && list->range[list->last - 1].addr > last) || | |
7707 | (list->first > 0 && list->range[list->first - 1].addr >= first)) | |
7708 | { | |
7709 | list->first = 0; | |
7710 | list->last = 0; | |
7711 | list->n_list = 0; | |
7712 | list->list_root.next = &list->list_root; | |
7713 | list->list_root.prev = &list->list_root; | |
7714 | fprintf (stderr, "%s: move backwards requested\n", __func__); | |
7715 | } | |
7716 | ||
7717 | for (; list->last < list->n_range && | |
7718 | list->range[list->last].addr <= last; ++list->last) | |
7719 | if (list->range[list->last].add) | |
7720 | reloc_range_list_append (list, list->range[list->last].irel_index); | |
7721 | ||
7722 | for (; list->first < list->n_range && | |
7723 | list->range[list->first].addr < first; ++list->first) | |
7724 | if (!list->range[list->first].add) | |
7725 | reloc_range_list_remove (list, list->range[list->first].irel_index); | |
7726 | } | |
7727 | ||
7728 | static void free_reloc_range_list (reloc_range_list *list) | |
7729 | { | |
7730 | free (list->range); | |
7731 | free (list->reloc); | |
7732 | } | |
cb337148 | 7733 | |
43cd72b9 BW |
7734 | /* The compute_text_actions function will build a list of potential |
7735 | transformation actions for code in the extended basic block of each | |
7736 | longcall that is optimized to a direct call. From this list we | |
7737 | generate a set of actions to actually perform that optimizes for | |
7738 | space and, if not using size_opt, maintains branch target | |
7739 | alignments. | |
e0001a05 | 7740 | |
43cd72b9 BW |
7741 | These actions to be performed are placed on a per-section list. |
7742 | The actual changes are performed by relax_section() in the second | |
7743 | pass. */ | |
7744 | ||
0a1b45a2 | 7745 | bool |
7fa3d080 BW |
7746 | compute_text_actions (bfd *abfd, |
7747 | asection *sec, | |
7748 | struct bfd_link_info *link_info) | |
e0001a05 | 7749 | { |
cb337148 | 7750 | xtensa_opcode *reloc_opcodes = NULL; |
43cd72b9 | 7751 | xtensa_relax_info *relax_info; |
e0001a05 | 7752 | bfd_byte *contents; |
43cd72b9 | 7753 | Elf_Internal_Rela *internal_relocs; |
0a1b45a2 | 7754 | bool ok = true; |
e0001a05 | 7755 | unsigned i; |
43cd72b9 BW |
7756 | property_table_entry *prop_table = 0; |
7757 | int ptblsize = 0; | |
7758 | bfd_size_type sec_size; | |
b2b326d2 | 7759 | reloc_range_list relevant_relocs; |
43cd72b9 | 7760 | |
43cd72b9 BW |
7761 | relax_info = get_xtensa_relax_info (sec); |
7762 | BFD_ASSERT (relax_info); | |
25c6282a BW |
7763 | BFD_ASSERT (relax_info->src_next == relax_info->src_count); |
7764 | ||
7765 | /* Do nothing if the section contains no optimized longcalls. */ | |
43cd72b9 BW |
7766 | if (!relax_info->is_relaxable_asm_section) |
7767 | return ok; | |
e0001a05 NC |
7768 | |
7769 | internal_relocs = retrieve_internal_relocs (abfd, sec, | |
7770 | link_info->keep_memory); | |
e0001a05 | 7771 | |
43cd72b9 BW |
7772 | if (internal_relocs) |
7773 | qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), | |
7774 | internal_reloc_compare); | |
7775 | ||
7776 | sec_size = bfd_get_section_limit (abfd, sec); | |
e0001a05 | 7777 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); |
43cd72b9 | 7778 | if (contents == NULL && sec_size != 0) |
e0001a05 | 7779 | { |
0a1b45a2 | 7780 | ok = false; |
e0001a05 NC |
7781 | goto error_return; |
7782 | } | |
7783 | ||
43cd72b9 | 7784 | ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table, |
0a1b45a2 | 7785 | XTENSA_PROP_SEC_NAME, false); |
43cd72b9 BW |
7786 | if (ptblsize < 0) |
7787 | { | |
0a1b45a2 | 7788 | ok = false; |
43cd72b9 BW |
7789 | goto error_return; |
7790 | } | |
7791 | ||
b2b326d2 MF |
7792 | /* Precompute the opcode for each relocation. */ |
7793 | reloc_opcodes = build_reloc_opcodes (abfd, sec, contents, internal_relocs); | |
7794 | ||
7795 | build_reloc_ranges (abfd, sec, contents, internal_relocs, reloc_opcodes, | |
7796 | &relevant_relocs); | |
7797 | ||
43cd72b9 | 7798 | for (i = 0; i < sec->reloc_count; i++) |
e0001a05 NC |
7799 | { |
7800 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
43cd72b9 BW |
7801 | bfd_vma r_offset; |
7802 | property_table_entry *the_entry; | |
7803 | int ptbl_idx; | |
7804 | ebb_t *ebb; | |
7805 | ebb_constraint ebb_table; | |
7806 | bfd_size_type simplify_size; | |
7807 | ||
7808 | if (irel && ELF32_R_TYPE (irel->r_info) != R_XTENSA_ASM_SIMPLIFY) | |
7809 | continue; | |
7810 | r_offset = irel->r_offset; | |
e0001a05 | 7811 | |
43cd72b9 BW |
7812 | simplify_size = get_asm_simplify_size (contents, sec_size, r_offset); |
7813 | if (simplify_size == 0) | |
7814 | { | |
4eca0228 | 7815 | _bfd_error_handler |
695344c0 | 7816 | /* xgettext:c-format */ |
2dcf00ce | 7817 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction for " |
d42c267e AM |
7818 | "XTENSA_ASM_SIMPLIFY relocation; " |
7819 | "possible configuration mismatch"), | |
2dcf00ce | 7820 | sec->owner, sec, (uint64_t) r_offset); |
43cd72b9 BW |
7821 | continue; |
7822 | } | |
e0001a05 | 7823 | |
43cd72b9 BW |
7824 | /* If the instruction table is not around, then don't do this |
7825 | relaxation. */ | |
7826 | the_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
7827 | sec->vma + irel->r_offset); | |
7828 | if (the_entry == NULL || XTENSA_NO_NOP_REMOVAL) | |
7829 | { | |
7830 | text_action_add (&relax_info->action_list, | |
7831 | ta_convert_longcall, sec, r_offset, | |
7832 | 0); | |
7833 | continue; | |
7834 | } | |
7835 | ||
7836 | /* If the next longcall happens to be at the same address as an | |
7837 | unreachable section of size 0, then skip forward. */ | |
7838 | ptbl_idx = the_entry - prop_table; | |
7839 | while ((the_entry->flags & XTENSA_PROP_UNREACHABLE) | |
7840 | && the_entry->size == 0 | |
7841 | && ptbl_idx + 1 < ptblsize | |
7842 | && (prop_table[ptbl_idx + 1].address | |
7843 | == prop_table[ptbl_idx].address)) | |
7844 | { | |
7845 | ptbl_idx++; | |
7846 | the_entry++; | |
7847 | } | |
e0001a05 | 7848 | |
99ded152 | 7849 | if (the_entry->flags & XTENSA_PROP_NO_TRANSFORM) |
43cd72b9 BW |
7850 | /* NO_REORDER is OK */ |
7851 | continue; | |
e0001a05 | 7852 | |
43cd72b9 BW |
7853 | init_ebb_constraint (&ebb_table); |
7854 | ebb = &ebb_table.ebb; | |
7855 | init_ebb (ebb, sec, contents, sec_size, prop_table, ptblsize, | |
7856 | internal_relocs, sec->reloc_count); | |
7857 | ebb->start_offset = r_offset + simplify_size; | |
7858 | ebb->end_offset = r_offset + simplify_size; | |
7859 | ebb->start_ptbl_idx = ptbl_idx; | |
7860 | ebb->end_ptbl_idx = ptbl_idx; | |
7861 | ebb->start_reloc_idx = i; | |
7862 | ebb->end_reloc_idx = i; | |
7863 | ||
7864 | if (!extend_ebb_bounds (ebb) | |
7865 | || !compute_ebb_proposed_actions (&ebb_table) | |
7866 | || !compute_ebb_actions (&ebb_table) | |
7867 | || !check_section_ebb_pcrels_fit (abfd, sec, contents, | |
b2b326d2 MF |
7868 | internal_relocs, |
7869 | &relevant_relocs, | |
7870 | &ebb_table, reloc_opcodes) | |
43cd72b9 | 7871 | || !check_section_ebb_reduces (&ebb_table)) |
e0001a05 | 7872 | { |
43cd72b9 BW |
7873 | /* If anything goes wrong or we get unlucky and something does |
7874 | not fit, with our plan because of expansion between | |
7875 | critical branches, just convert to a NOP. */ | |
7876 | ||
7877 | text_action_add (&relax_info->action_list, | |
7878 | ta_convert_longcall, sec, r_offset, 0); | |
7879 | i = ebb_table.ebb.end_reloc_idx; | |
7880 | free_ebb_constraint (&ebb_table); | |
7881 | continue; | |
e0001a05 | 7882 | } |
43cd72b9 BW |
7883 | |
7884 | text_action_add_proposed (&relax_info->action_list, &ebb_table, sec); | |
7885 | ||
7886 | /* Update the index so we do not go looking at the relocations | |
7887 | we have already processed. */ | |
7888 | i = ebb_table.ebb.end_reloc_idx; | |
7889 | free_ebb_constraint (&ebb_table); | |
e0001a05 NC |
7890 | } |
7891 | ||
b2b326d2 MF |
7892 | free_reloc_range_list (&relevant_relocs); |
7893 | ||
43cd72b9 | 7894 | #if DEBUG |
4c2af04f | 7895 | if (action_list_count (&relax_info->action_list)) |
43cd72b9 BW |
7896 | print_action_list (stderr, &relax_info->action_list); |
7897 | #endif | |
7898 | ||
dc1e8a47 | 7899 | error_return: |
e0001a05 NC |
7900 | release_contents (sec, contents); |
7901 | release_internal_relocs (sec, internal_relocs); | |
c9594989 AM |
7902 | free (prop_table); |
7903 | free (reloc_opcodes); | |
43cd72b9 | 7904 | |
e0001a05 NC |
7905 | return ok; |
7906 | } | |
7907 | ||
7908 | ||
64b607e6 BW |
7909 | /* Do not widen an instruction if it is preceeded by a |
7910 | loop opcode. It might cause misalignment. */ | |
7911 | ||
0a1b45a2 | 7912 | static bool |
64b607e6 BW |
7913 | prev_instr_is_a_loop (bfd_byte *contents, |
7914 | bfd_size_type content_length, | |
7915 | bfd_size_type offset) | |
7916 | { | |
7917 | xtensa_opcode prev_opcode; | |
7918 | ||
7919 | if (offset < 3) | |
0a1b45a2 | 7920 | return false; |
64b607e6 BW |
7921 | prev_opcode = insn_decode_opcode (contents, content_length, offset-3, 0); |
7922 | return (xtensa_opcode_is_loop (xtensa_default_isa, prev_opcode) == 1); | |
68ffbac6 | 7923 | } |
64b607e6 BW |
7924 | |
7925 | ||
43cd72b9 | 7926 | /* Find all of the possible actions for an extended basic block. */ |
e0001a05 | 7927 | |
0a1b45a2 | 7928 | bool |
7fa3d080 | 7929 | compute_ebb_proposed_actions (ebb_constraint *ebb_table) |
e0001a05 | 7930 | { |
43cd72b9 BW |
7931 | const ebb_t *ebb = &ebb_table->ebb; |
7932 | unsigned rel_idx = ebb->start_reloc_idx; | |
7933 | property_table_entry *entry, *start_entry, *end_entry; | |
64b607e6 BW |
7934 | bfd_vma offset = 0; |
7935 | xtensa_isa isa = xtensa_default_isa; | |
7936 | xtensa_format fmt; | |
7937 | static xtensa_insnbuf insnbuf = NULL; | |
7938 | static xtensa_insnbuf slotbuf = NULL; | |
7939 | ||
7940 | if (insnbuf == NULL) | |
7941 | { | |
7942 | insnbuf = xtensa_insnbuf_alloc (isa); | |
7943 | slotbuf = xtensa_insnbuf_alloc (isa); | |
7944 | } | |
e0001a05 | 7945 | |
43cd72b9 BW |
7946 | start_entry = &ebb->ptbl[ebb->start_ptbl_idx]; |
7947 | end_entry = &ebb->ptbl[ebb->end_ptbl_idx]; | |
e0001a05 | 7948 | |
43cd72b9 | 7949 | for (entry = start_entry; entry <= end_entry; entry++) |
e0001a05 | 7950 | { |
64b607e6 | 7951 | bfd_vma start_offset, end_offset; |
43cd72b9 | 7952 | bfd_size_type insn_len; |
e0001a05 | 7953 | |
43cd72b9 BW |
7954 | start_offset = entry->address - ebb->sec->vma; |
7955 | end_offset = entry->address + entry->size - ebb->sec->vma; | |
e0001a05 | 7956 | |
43cd72b9 BW |
7957 | if (entry == start_entry) |
7958 | start_offset = ebb->start_offset; | |
7959 | if (entry == end_entry) | |
7960 | end_offset = ebb->end_offset; | |
7961 | offset = start_offset; | |
e0001a05 | 7962 | |
43cd72b9 BW |
7963 | if (offset == entry->address - ebb->sec->vma |
7964 | && (entry->flags & XTENSA_PROP_INSN_BRANCH_TARGET) != 0) | |
7965 | { | |
7966 | enum ebb_target_enum align_type = EBB_DESIRE_TGT_ALIGN; | |
7967 | BFD_ASSERT (offset != end_offset); | |
7968 | if (offset == end_offset) | |
0a1b45a2 | 7969 | return false; |
e0001a05 | 7970 | |
43cd72b9 BW |
7971 | insn_len = insn_decode_len (ebb->contents, ebb->content_length, |
7972 | offset); | |
68ffbac6 | 7973 | if (insn_len == 0) |
64b607e6 BW |
7974 | goto decode_error; |
7975 | ||
43cd72b9 BW |
7976 | if (check_branch_target_aligned_address (offset, insn_len)) |
7977 | align_type = EBB_REQUIRE_TGT_ALIGN; | |
7978 | ||
7979 | ebb_propose_action (ebb_table, align_type, 0, | |
0a1b45a2 | 7980 | ta_none, offset, 0, true); |
43cd72b9 BW |
7981 | } |
7982 | ||
7983 | while (offset != end_offset) | |
e0001a05 | 7984 | { |
43cd72b9 | 7985 | Elf_Internal_Rela *irel; |
e0001a05 | 7986 | xtensa_opcode opcode; |
e0001a05 | 7987 | |
43cd72b9 BW |
7988 | while (rel_idx < ebb->end_reloc_idx |
7989 | && (ebb->relocs[rel_idx].r_offset < offset | |
7990 | || (ebb->relocs[rel_idx].r_offset == offset | |
7991 | && (ELF32_R_TYPE (ebb->relocs[rel_idx].r_info) | |
7992 | != R_XTENSA_ASM_SIMPLIFY)))) | |
7993 | rel_idx++; | |
7994 | ||
7995 | /* Check for longcall. */ | |
7996 | irel = &ebb->relocs[rel_idx]; | |
7997 | if (irel->r_offset == offset | |
7998 | && ELF32_R_TYPE (irel->r_info) == R_XTENSA_ASM_SIMPLIFY) | |
7999 | { | |
8000 | bfd_size_type simplify_size; | |
e0001a05 | 8001 | |
68ffbac6 | 8002 | simplify_size = get_asm_simplify_size (ebb->contents, |
43cd72b9 BW |
8003 | ebb->content_length, |
8004 | irel->r_offset); | |
8005 | if (simplify_size == 0) | |
64b607e6 | 8006 | goto decode_error; |
43cd72b9 BW |
8007 | |
8008 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
0a1b45a2 | 8009 | ta_convert_longcall, offset, 0, true); |
68ffbac6 | 8010 | |
43cd72b9 BW |
8011 | offset += simplify_size; |
8012 | continue; | |
8013 | } | |
e0001a05 | 8014 | |
64b607e6 BW |
8015 | if (offset + MIN_INSN_LENGTH > ebb->content_length) |
8016 | goto decode_error; | |
8017 | xtensa_insnbuf_from_chars (isa, insnbuf, &ebb->contents[offset], | |
8018 | ebb->content_length - offset); | |
8019 | fmt = xtensa_format_decode (isa, insnbuf); | |
8020 | if (fmt == XTENSA_UNDEFINED) | |
8021 | goto decode_error; | |
8022 | insn_len = xtensa_format_length (isa, fmt); | |
8023 | if (insn_len == (bfd_size_type) XTENSA_UNDEFINED) | |
8024 | goto decode_error; | |
8025 | ||
8026 | if (xtensa_format_num_slots (isa, fmt) != 1) | |
43cd72b9 | 8027 | { |
64b607e6 BW |
8028 | offset += insn_len; |
8029 | continue; | |
43cd72b9 | 8030 | } |
64b607e6 BW |
8031 | |
8032 | xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf); | |
8033 | opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf); | |
8034 | if (opcode == XTENSA_UNDEFINED) | |
8035 | goto decode_error; | |
8036 | ||
43cd72b9 | 8037 | if ((entry->flags & XTENSA_PROP_INSN_NO_DENSITY) == 0 |
99ded152 | 8038 | && (entry->flags & XTENSA_PROP_NO_TRANSFORM) == 0 |
64b607e6 | 8039 | && can_narrow_instruction (slotbuf, fmt, opcode) != 0) |
43cd72b9 BW |
8040 | { |
8041 | /* Add an instruction narrow action. */ | |
8042 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
0a1b45a2 | 8043 | ta_narrow_insn, offset, 0, false); |
43cd72b9 | 8044 | } |
99ded152 | 8045 | else if ((entry->flags & XTENSA_PROP_NO_TRANSFORM) == 0 |
64b607e6 BW |
8046 | && can_widen_instruction (slotbuf, fmt, opcode) != 0 |
8047 | && ! prev_instr_is_a_loop (ebb->contents, | |
8048 | ebb->content_length, offset)) | |
43cd72b9 BW |
8049 | { |
8050 | /* Add an instruction widen action. */ | |
8051 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
0a1b45a2 | 8052 | ta_widen_insn, offset, 0, false); |
43cd72b9 | 8053 | } |
64b607e6 | 8054 | else if (xtensa_opcode_is_loop (xtensa_default_isa, opcode) == 1) |
43cd72b9 BW |
8055 | { |
8056 | /* Check for branch targets. */ | |
8057 | ebb_propose_action (ebb_table, EBB_REQUIRE_LOOP_ALIGN, 0, | |
0a1b45a2 | 8058 | ta_none, offset, 0, true); |
43cd72b9 BW |
8059 | } |
8060 | ||
8061 | offset += insn_len; | |
e0001a05 NC |
8062 | } |
8063 | } | |
8064 | ||
43cd72b9 BW |
8065 | if (ebb->ends_unreachable) |
8066 | { | |
8067 | ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0, | |
0a1b45a2 | 8068 | ta_fill, ebb->end_offset, 0, true); |
43cd72b9 | 8069 | } |
e0001a05 | 8070 | |
0a1b45a2 | 8071 | return true; |
64b607e6 BW |
8072 | |
8073 | decode_error: | |
4eca0228 | 8074 | _bfd_error_handler |
695344c0 | 8075 | /* xgettext:c-format */ |
2dcf00ce | 8076 | (_("%pB(%pA+%#" PRIx64 "): could not decode instruction; " |
d42c267e | 8077 | "possible configuration mismatch"), |
2dcf00ce | 8078 | ebb->sec->owner, ebb->sec, (uint64_t) offset); |
0a1b45a2 | 8079 | return false; |
43cd72b9 BW |
8080 | } |
8081 | ||
8082 | ||
8083 | /* After all of the information has collected about the | |
8084 | transformations possible in an EBB, compute the appropriate actions | |
8085 | here in compute_ebb_actions. We still must check later to make | |
8086 | sure that the actions do not break any relocations. The algorithm | |
8087 | used here is pretty greedy. Basically, it removes as many no-ops | |
8088 | as possible so that the end of the EBB has the same alignment | |
8089 | characteristics as the original. First, it uses narrowing, then | |
8090 | fill space at the end of the EBB, and finally widenings. If that | |
8091 | does not work, it tries again with one fewer no-op removed. The | |
8092 | optimization will only be performed if all of the branch targets | |
8093 | that were aligned before transformation are also aligned after the | |
8094 | transformation. | |
8095 | ||
8096 | When the size_opt flag is set, ignore the branch target alignments, | |
8097 | narrow all wide instructions, and remove all no-ops unless the end | |
8098 | of the EBB prevents it. */ | |
8099 | ||
0a1b45a2 | 8100 | bool |
7fa3d080 | 8101 | compute_ebb_actions (ebb_constraint *ebb_table) |
43cd72b9 BW |
8102 | { |
8103 | unsigned i = 0; | |
8104 | unsigned j; | |
8105 | int removed_bytes = 0; | |
8106 | ebb_t *ebb = &ebb_table->ebb; | |
8107 | unsigned seg_idx_start = 0; | |
8108 | unsigned seg_idx_end = 0; | |
8109 | ||
8110 | /* We perform this like the assembler relaxation algorithm: Start by | |
8111 | assuming all instructions are narrow and all no-ops removed; then | |
8112 | walk through.... */ | |
8113 | ||
8114 | /* For each segment of this that has a solid constraint, check to | |
8115 | see if there are any combinations that will keep the constraint. | |
8116 | If so, use it. */ | |
8117 | for (seg_idx_end = 0; seg_idx_end < ebb_table->action_count; seg_idx_end++) | |
e0001a05 | 8118 | { |
0a1b45a2 | 8119 | bool requires_text_end_align = false; |
43cd72b9 BW |
8120 | unsigned longcall_count = 0; |
8121 | unsigned longcall_convert_count = 0; | |
8122 | unsigned narrowable_count = 0; | |
8123 | unsigned narrowable_convert_count = 0; | |
8124 | unsigned widenable_count = 0; | |
8125 | unsigned widenable_convert_count = 0; | |
e0001a05 | 8126 | |
43cd72b9 BW |
8127 | proposed_action *action = NULL; |
8128 | int align = (1 << ebb_table->ebb.sec->alignment_power); | |
e0001a05 | 8129 | |
43cd72b9 | 8130 | seg_idx_start = seg_idx_end; |
e0001a05 | 8131 | |
43cd72b9 BW |
8132 | for (i = seg_idx_start; i < ebb_table->action_count; i++) |
8133 | { | |
8134 | action = &ebb_table->actions[i]; | |
8135 | if (action->action == ta_convert_longcall) | |
8136 | longcall_count++; | |
8137 | if (action->action == ta_narrow_insn) | |
8138 | narrowable_count++; | |
8139 | if (action->action == ta_widen_insn) | |
8140 | widenable_count++; | |
8141 | if (action->action == ta_fill) | |
8142 | break; | |
8143 | if (action->align_type == EBB_REQUIRE_LOOP_ALIGN) | |
8144 | break; | |
8145 | if (action->align_type == EBB_REQUIRE_TGT_ALIGN | |
8146 | && !elf32xtensa_size_opt) | |
8147 | break; | |
8148 | } | |
8149 | seg_idx_end = i; | |
e0001a05 | 8150 | |
43cd72b9 | 8151 | if (seg_idx_end == ebb_table->action_count && !ebb->ends_unreachable) |
0a1b45a2 | 8152 | requires_text_end_align = true; |
e0001a05 | 8153 | |
43cd72b9 BW |
8154 | if (elf32xtensa_size_opt && !requires_text_end_align |
8155 | && action->align_type != EBB_REQUIRE_LOOP_ALIGN | |
8156 | && action->align_type != EBB_REQUIRE_TGT_ALIGN) | |
8157 | { | |
8158 | longcall_convert_count = longcall_count; | |
8159 | narrowable_convert_count = narrowable_count; | |
8160 | widenable_convert_count = 0; | |
8161 | } | |
8162 | else | |
8163 | { | |
8164 | /* There is a constraint. Convert the max number of longcalls. */ | |
8165 | narrowable_convert_count = 0; | |
8166 | longcall_convert_count = 0; | |
8167 | widenable_convert_count = 0; | |
e0001a05 | 8168 | |
43cd72b9 | 8169 | for (j = 0; j < longcall_count; j++) |
e0001a05 | 8170 | { |
43cd72b9 BW |
8171 | int removed = (longcall_count - j) * 3 & (align - 1); |
8172 | unsigned desire_narrow = (align - removed) & (align - 1); | |
8173 | unsigned desire_widen = removed; | |
8174 | if (desire_narrow <= narrowable_count) | |
8175 | { | |
8176 | narrowable_convert_count = desire_narrow; | |
8177 | narrowable_convert_count += | |
8178 | (align * ((narrowable_count - narrowable_convert_count) | |
8179 | / align)); | |
8180 | longcall_convert_count = (longcall_count - j); | |
8181 | widenable_convert_count = 0; | |
8182 | break; | |
8183 | } | |
8184 | if (desire_widen <= widenable_count && !elf32xtensa_size_opt) | |
8185 | { | |
8186 | narrowable_convert_count = 0; | |
8187 | longcall_convert_count = longcall_count - j; | |
8188 | widenable_convert_count = desire_widen; | |
8189 | break; | |
8190 | } | |
8191 | } | |
8192 | } | |
e0001a05 | 8193 | |
43cd72b9 BW |
8194 | /* Now the number of conversions are saved. Do them. */ |
8195 | for (i = seg_idx_start; i < seg_idx_end; i++) | |
8196 | { | |
8197 | action = &ebb_table->actions[i]; | |
8198 | switch (action->action) | |
8199 | { | |
8200 | case ta_convert_longcall: | |
8201 | if (longcall_convert_count != 0) | |
8202 | { | |
8203 | action->action = ta_remove_longcall; | |
0a1b45a2 | 8204 | action->do_action = true; |
43cd72b9 BW |
8205 | action->removed_bytes += 3; |
8206 | longcall_convert_count--; | |
8207 | } | |
8208 | break; | |
8209 | case ta_narrow_insn: | |
8210 | if (narrowable_convert_count != 0) | |
8211 | { | |
0a1b45a2 | 8212 | action->do_action = true; |
43cd72b9 BW |
8213 | action->removed_bytes += 1; |
8214 | narrowable_convert_count--; | |
8215 | } | |
8216 | break; | |
8217 | case ta_widen_insn: | |
8218 | if (widenable_convert_count != 0) | |
8219 | { | |
0a1b45a2 | 8220 | action->do_action = true; |
43cd72b9 BW |
8221 | action->removed_bytes -= 1; |
8222 | widenable_convert_count--; | |
8223 | } | |
8224 | break; | |
8225 | default: | |
8226 | break; | |
e0001a05 | 8227 | } |
43cd72b9 BW |
8228 | } |
8229 | } | |
e0001a05 | 8230 | |
43cd72b9 BW |
8231 | /* Now we move on to some local opts. Try to remove each of the |
8232 | remaining longcalls. */ | |
e0001a05 | 8233 | |
43cd72b9 BW |
8234 | if (ebb_table->ebb.ends_section || ebb_table->ebb.ends_unreachable) |
8235 | { | |
8236 | removed_bytes = 0; | |
8237 | for (i = 0; i < ebb_table->action_count; i++) | |
e0001a05 | 8238 | { |
43cd72b9 BW |
8239 | int old_removed_bytes = removed_bytes; |
8240 | proposed_action *action = &ebb_table->actions[i]; | |
8241 | ||
8242 | if (action->do_action && action->action == ta_convert_longcall) | |
8243 | { | |
0a1b45a2 | 8244 | bool bad_alignment = false; |
43cd72b9 BW |
8245 | removed_bytes += 3; |
8246 | for (j = i + 1; j < ebb_table->action_count; j++) | |
8247 | { | |
8248 | proposed_action *new_action = &ebb_table->actions[j]; | |
8249 | bfd_vma offset = new_action->offset; | |
8250 | if (new_action->align_type == EBB_REQUIRE_TGT_ALIGN) | |
8251 | { | |
8252 | if (!check_branch_target_aligned | |
8253 | (ebb_table->ebb.contents, | |
8254 | ebb_table->ebb.content_length, | |
8255 | offset, offset - removed_bytes)) | |
8256 | { | |
0a1b45a2 | 8257 | bad_alignment = true; |
43cd72b9 BW |
8258 | break; |
8259 | } | |
8260 | } | |
8261 | if (new_action->align_type == EBB_REQUIRE_LOOP_ALIGN) | |
8262 | { | |
8263 | if (!check_loop_aligned (ebb_table->ebb.contents, | |
8264 | ebb_table->ebb.content_length, | |
8265 | offset, | |
8266 | offset - removed_bytes)) | |
8267 | { | |
0a1b45a2 | 8268 | bad_alignment = true; |
43cd72b9 BW |
8269 | break; |
8270 | } | |
8271 | } | |
8272 | if (new_action->action == ta_narrow_insn | |
8273 | && !new_action->do_action | |
8274 | && ebb_table->ebb.sec->alignment_power == 2) | |
8275 | { | |
8276 | /* Narrow an instruction and we are done. */ | |
0a1b45a2 | 8277 | new_action->do_action = true; |
43cd72b9 | 8278 | new_action->removed_bytes += 1; |
0a1b45a2 | 8279 | bad_alignment = false; |
43cd72b9 BW |
8280 | break; |
8281 | } | |
8282 | if (new_action->action == ta_widen_insn | |
8283 | && new_action->do_action | |
8284 | && ebb_table->ebb.sec->alignment_power == 2) | |
8285 | { | |
8286 | /* Narrow an instruction and we are done. */ | |
0a1b45a2 | 8287 | new_action->do_action = false; |
43cd72b9 | 8288 | new_action->removed_bytes += 1; |
0a1b45a2 | 8289 | bad_alignment = false; |
43cd72b9 BW |
8290 | break; |
8291 | } | |
5c5d6806 BW |
8292 | if (new_action->do_action) |
8293 | removed_bytes += new_action->removed_bytes; | |
43cd72b9 BW |
8294 | } |
8295 | if (!bad_alignment) | |
8296 | { | |
8297 | action->removed_bytes += 3; | |
8298 | action->action = ta_remove_longcall; | |
0a1b45a2 | 8299 | action->do_action = true; |
43cd72b9 BW |
8300 | } |
8301 | } | |
8302 | removed_bytes = old_removed_bytes; | |
8303 | if (action->do_action) | |
8304 | removed_bytes += action->removed_bytes; | |
e0001a05 NC |
8305 | } |
8306 | } | |
8307 | ||
43cd72b9 BW |
8308 | removed_bytes = 0; |
8309 | for (i = 0; i < ebb_table->action_count; ++i) | |
8310 | { | |
8311 | proposed_action *action = &ebb_table->actions[i]; | |
8312 | if (action->do_action) | |
8313 | removed_bytes += action->removed_bytes; | |
8314 | } | |
8315 | ||
8316 | if ((removed_bytes % (1 << ebb_table->ebb.sec->alignment_power)) != 0 | |
8317 | && ebb->ends_unreachable) | |
8318 | { | |
8319 | proposed_action *action; | |
8320 | int br; | |
8321 | int extra_space; | |
8322 | ||
8323 | BFD_ASSERT (ebb_table->action_count != 0); | |
8324 | action = &ebb_table->actions[ebb_table->action_count - 1]; | |
8325 | BFD_ASSERT (action->action == ta_fill); | |
8326 | BFD_ASSERT (ebb->ends_unreachable->flags & XTENSA_PROP_UNREACHABLE); | |
8327 | ||
4b8e28c7 | 8328 | extra_space = xtensa_compute_fill_extra_space (ebb->ends_unreachable); |
43cd72b9 BW |
8329 | br = action->removed_bytes + removed_bytes + extra_space; |
8330 | br = br & ((1 << ebb->sec->alignment_power ) - 1); | |
8331 | ||
8332 | action->removed_bytes = extra_space - br; | |
8333 | } | |
0a1b45a2 | 8334 | return true; |
e0001a05 NC |
8335 | } |
8336 | ||
8337 | ||
03e94c08 BW |
8338 | /* The xlate_map is a sorted array of address mappings designed to |
8339 | answer the offset_with_removed_text() query with a binary search instead | |
8340 | of a linear search through the section's action_list. */ | |
8341 | ||
8342 | typedef struct xlate_map_entry xlate_map_entry_t; | |
8343 | typedef struct xlate_map xlate_map_t; | |
8344 | ||
8345 | struct xlate_map_entry | |
8346 | { | |
0854d504 MF |
8347 | bfd_vma orig_address; |
8348 | bfd_vma new_address; | |
03e94c08 BW |
8349 | unsigned size; |
8350 | }; | |
8351 | ||
8352 | struct xlate_map | |
8353 | { | |
8354 | unsigned entry_count; | |
8355 | xlate_map_entry_t *entry; | |
8356 | }; | |
8357 | ||
8358 | ||
68ffbac6 | 8359 | static int |
03e94c08 BW |
8360 | xlate_compare (const void *a_v, const void *b_v) |
8361 | { | |
8362 | const xlate_map_entry_t *a = (const xlate_map_entry_t *) a_v; | |
8363 | const xlate_map_entry_t *b = (const xlate_map_entry_t *) b_v; | |
8364 | if (a->orig_address < b->orig_address) | |
8365 | return -1; | |
8366 | if (a->orig_address > (b->orig_address + b->size - 1)) | |
8367 | return 1; | |
8368 | return 0; | |
8369 | } | |
8370 | ||
8371 | ||
8372 | static bfd_vma | |
8373 | xlate_offset_with_removed_text (const xlate_map_t *map, | |
8374 | text_action_list *action_list, | |
8375 | bfd_vma offset) | |
8376 | { | |
03e94c08 BW |
8377 | void *r; |
8378 | xlate_map_entry_t *e; | |
0854d504 | 8379 | struct xlate_map_entry se; |
03e94c08 BW |
8380 | |
8381 | if (map == NULL) | |
8382 | return offset_with_removed_text (action_list, offset); | |
8383 | ||
8384 | if (map->entry_count == 0) | |
8385 | return offset; | |
8386 | ||
0854d504 MF |
8387 | se.orig_address = offset; |
8388 | r = bsearch (&se, map->entry, map->entry_count, | |
03e94c08 BW |
8389 | sizeof (xlate_map_entry_t), &xlate_compare); |
8390 | e = (xlate_map_entry_t *) r; | |
68ffbac6 | 8391 | |
0854d504 MF |
8392 | /* There could be a jump past the end of the section, |
8393 | allow it using the last xlate map entry to translate its address. */ | |
8394 | if (e == NULL) | |
8395 | { | |
8396 | e = map->entry + map->entry_count - 1; | |
8397 | if (xlate_compare (&se, e) <= 0) | |
8398 | e = NULL; | |
8399 | } | |
03e94c08 BW |
8400 | BFD_ASSERT (e != NULL); |
8401 | if (e == NULL) | |
8402 | return offset; | |
8403 | return e->new_address - e->orig_address + offset; | |
8404 | } | |
8405 | ||
4c2af04f MF |
8406 | typedef struct xlate_map_context_struct xlate_map_context; |
8407 | struct xlate_map_context_struct | |
8408 | { | |
8409 | xlate_map_t *map; | |
8410 | xlate_map_entry_t *current_entry; | |
8411 | int removed; | |
8412 | }; | |
8413 | ||
8414 | static int | |
8415 | xlate_map_fn (splay_tree_node node, void *p) | |
8416 | { | |
8417 | text_action *r = (text_action *)node->value; | |
8418 | xlate_map_context *ctx = p; | |
8419 | unsigned orig_size = 0; | |
8420 | ||
8421 | switch (r->action) | |
8422 | { | |
8423 | case ta_none: | |
8424 | case ta_remove_insn: | |
8425 | case ta_convert_longcall: | |
8426 | case ta_remove_literal: | |
8427 | case ta_add_literal: | |
8428 | break; | |
8429 | case ta_remove_longcall: | |
8430 | orig_size = 6; | |
8431 | break; | |
8432 | case ta_narrow_insn: | |
8433 | orig_size = 3; | |
8434 | break; | |
8435 | case ta_widen_insn: | |
8436 | orig_size = 2; | |
8437 | break; | |
8438 | case ta_fill: | |
8439 | break; | |
8440 | } | |
8441 | ctx->current_entry->size = | |
8442 | r->offset + orig_size - ctx->current_entry->orig_address; | |
8443 | if (ctx->current_entry->size != 0) | |
8444 | { | |
8445 | ctx->current_entry++; | |
8446 | ctx->map->entry_count++; | |
8447 | } | |
8448 | ctx->current_entry->orig_address = r->offset + orig_size; | |
8449 | ctx->removed += r->removed_bytes; | |
8450 | ctx->current_entry->new_address = r->offset + orig_size - ctx->removed; | |
8451 | ctx->current_entry->size = 0; | |
8452 | return 0; | |
8453 | } | |
03e94c08 BW |
8454 | |
8455 | /* Build a binary searchable offset translation map from a section's | |
8456 | action list. */ | |
8457 | ||
8458 | static xlate_map_t * | |
8459 | build_xlate_map (asection *sec, xtensa_relax_info *relax_info) | |
8460 | { | |
03e94c08 BW |
8461 | text_action_list *action_list = &relax_info->action_list; |
8462 | unsigned num_actions = 0; | |
4c2af04f | 8463 | xlate_map_context ctx; |
03e94c08 | 8464 | |
4c2af04f MF |
8465 | ctx.map = (xlate_map_t *) bfd_malloc (sizeof (xlate_map_t)); |
8466 | ||
8467 | if (ctx.map == NULL) | |
03e94c08 BW |
8468 | return NULL; |
8469 | ||
8470 | num_actions = action_list_count (action_list); | |
4c2af04f | 8471 | ctx.map->entry = (xlate_map_entry_t *) |
03e94c08 | 8472 | bfd_malloc (sizeof (xlate_map_entry_t) * (num_actions + 1)); |
4c2af04f | 8473 | if (ctx.map->entry == NULL) |
03e94c08 | 8474 | { |
4c2af04f | 8475 | free (ctx.map); |
03e94c08 BW |
8476 | return NULL; |
8477 | } | |
4c2af04f | 8478 | ctx.map->entry_count = 0; |
68ffbac6 | 8479 | |
4c2af04f MF |
8480 | ctx.removed = 0; |
8481 | ctx.current_entry = &ctx.map->entry[0]; | |
03e94c08 | 8482 | |
4c2af04f MF |
8483 | ctx.current_entry->orig_address = 0; |
8484 | ctx.current_entry->new_address = 0; | |
8485 | ctx.current_entry->size = 0; | |
03e94c08 | 8486 | |
4c2af04f | 8487 | splay_tree_foreach (action_list->tree, xlate_map_fn, &ctx); |
03e94c08 | 8488 | |
4c2af04f MF |
8489 | ctx.current_entry->size = (bfd_get_section_limit (sec->owner, sec) |
8490 | - ctx.current_entry->orig_address); | |
8491 | if (ctx.current_entry->size != 0) | |
8492 | ctx.map->entry_count++; | |
03e94c08 | 8493 | |
4c2af04f | 8494 | return ctx.map; |
03e94c08 BW |
8495 | } |
8496 | ||
8497 | ||
8498 | /* Free an offset translation map. */ | |
8499 | ||
68ffbac6 | 8500 | static void |
03e94c08 BW |
8501 | free_xlate_map (xlate_map_t *map) |
8502 | { | |
03e94c08 | 8503 | if (map) |
c9594989 AM |
8504 | { |
8505 | free (map->entry); | |
8506 | free (map); | |
8507 | } | |
03e94c08 BW |
8508 | } |
8509 | ||
8510 | ||
43cd72b9 BW |
8511 | /* Use check_section_ebb_pcrels_fit to make sure that all of the |
8512 | relocations in a section will fit if a proposed set of actions | |
8513 | are performed. */ | |
e0001a05 | 8514 | |
0a1b45a2 | 8515 | static bool |
7fa3d080 BW |
8516 | check_section_ebb_pcrels_fit (bfd *abfd, |
8517 | asection *sec, | |
8518 | bfd_byte *contents, | |
8519 | Elf_Internal_Rela *internal_relocs, | |
b2b326d2 | 8520 | reloc_range_list *relevant_relocs, |
cb337148 BW |
8521 | const ebb_constraint *constraint, |
8522 | const xtensa_opcode *reloc_opcodes) | |
e0001a05 | 8523 | { |
43cd72b9 | 8524 | unsigned i, j; |
b2b326d2 | 8525 | unsigned n = sec->reloc_count; |
43cd72b9 | 8526 | Elf_Internal_Rela *irel; |
03e94c08 | 8527 | xlate_map_t *xmap = NULL; |
0a1b45a2 | 8528 | bool ok = true; |
43cd72b9 | 8529 | xtensa_relax_info *relax_info; |
b2b326d2 | 8530 | reloc_range_list_entry *entry = NULL; |
e0001a05 | 8531 | |
43cd72b9 | 8532 | relax_info = get_xtensa_relax_info (sec); |
e0001a05 | 8533 | |
03e94c08 BW |
8534 | if (relax_info && sec->reloc_count > 100) |
8535 | { | |
8536 | xmap = build_xlate_map (sec, relax_info); | |
8537 | /* NULL indicates out of memory, but the slow version | |
8538 | can still be used. */ | |
8539 | } | |
8540 | ||
b2b326d2 MF |
8541 | if (relevant_relocs && constraint->action_count) |
8542 | { | |
8543 | if (!relevant_relocs->ok) | |
8544 | { | |
0a1b45a2 | 8545 | ok = false; |
b2b326d2 MF |
8546 | n = 0; |
8547 | } | |
8548 | else | |
8549 | { | |
8550 | bfd_vma min_offset, max_offset; | |
8551 | min_offset = max_offset = constraint->actions[0].offset; | |
8552 | ||
8553 | for (i = 1; i < constraint->action_count; ++i) | |
8554 | { | |
8555 | proposed_action *action = &constraint->actions[i]; | |
8556 | bfd_vma offset = action->offset; | |
8557 | ||
8558 | if (offset < min_offset) | |
8559 | min_offset = offset; | |
8560 | if (offset > max_offset) | |
8561 | max_offset = offset; | |
8562 | } | |
8563 | reloc_range_list_update_range (relevant_relocs, min_offset, | |
8564 | max_offset); | |
8565 | n = relevant_relocs->n_list; | |
8566 | entry = &relevant_relocs->list_root; | |
8567 | } | |
8568 | } | |
8569 | else | |
8570 | { | |
8571 | relevant_relocs = NULL; | |
8572 | } | |
8573 | ||
8574 | for (i = 0; i < n; i++) | |
43cd72b9 BW |
8575 | { |
8576 | r_reloc r_rel; | |
8577 | bfd_vma orig_self_offset, orig_target_offset; | |
8578 | bfd_vma self_offset, target_offset; | |
8579 | int r_type; | |
8580 | reloc_howto_type *howto; | |
8581 | int self_removed_bytes, target_removed_bytes; | |
e0001a05 | 8582 | |
b2b326d2 MF |
8583 | if (relevant_relocs) |
8584 | { | |
8585 | entry = entry->next; | |
8586 | irel = entry->irel; | |
8587 | } | |
8588 | else | |
8589 | { | |
8590 | irel = internal_relocs + i; | |
8591 | } | |
43cd72b9 | 8592 | r_type = ELF32_R_TYPE (irel->r_info); |
e0001a05 | 8593 | |
43cd72b9 BW |
8594 | howto = &elf_howto_table[r_type]; |
8595 | /* We maintain the required invariant: PC-relative relocations | |
8596 | that fit before linking must fit after linking. Thus we only | |
8597 | need to deal with relocations to the same section that are | |
8598 | PC-relative. */ | |
1bbb5f21 BW |
8599 | if (r_type == R_XTENSA_ASM_SIMPLIFY |
8600 | || r_type == R_XTENSA_32_PCREL | |
43cd72b9 BW |
8601 | || !howto->pc_relative) |
8602 | continue; | |
e0001a05 | 8603 | |
43cd72b9 BW |
8604 | r_reloc_init (&r_rel, abfd, irel, contents, |
8605 | bfd_get_section_limit (abfd, sec)); | |
e0001a05 | 8606 | |
43cd72b9 BW |
8607 | if (r_reloc_get_section (&r_rel) != sec) |
8608 | continue; | |
e0001a05 | 8609 | |
43cd72b9 BW |
8610 | orig_self_offset = irel->r_offset; |
8611 | orig_target_offset = r_rel.target_offset; | |
e0001a05 | 8612 | |
43cd72b9 BW |
8613 | self_offset = orig_self_offset; |
8614 | target_offset = orig_target_offset; | |
8615 | ||
8616 | if (relax_info) | |
8617 | { | |
03e94c08 BW |
8618 | self_offset = |
8619 | xlate_offset_with_removed_text (xmap, &relax_info->action_list, | |
8620 | orig_self_offset); | |
8621 | target_offset = | |
8622 | xlate_offset_with_removed_text (xmap, &relax_info->action_list, | |
8623 | orig_target_offset); | |
43cd72b9 BW |
8624 | } |
8625 | ||
8626 | self_removed_bytes = 0; | |
8627 | target_removed_bytes = 0; | |
8628 | ||
8629 | for (j = 0; j < constraint->action_count; ++j) | |
8630 | { | |
8631 | proposed_action *action = &constraint->actions[j]; | |
8632 | bfd_vma offset = action->offset; | |
8633 | int removed_bytes = action->removed_bytes; | |
8634 | if (offset < orig_self_offset | |
8635 | || (offset == orig_self_offset && action->action == ta_fill | |
8636 | && action->removed_bytes < 0)) | |
8637 | self_removed_bytes += removed_bytes; | |
8638 | if (offset < orig_target_offset | |
8639 | || (offset == orig_target_offset && action->action == ta_fill | |
8640 | && action->removed_bytes < 0)) | |
8641 | target_removed_bytes += removed_bytes; | |
8642 | } | |
8643 | self_offset -= self_removed_bytes; | |
8644 | target_offset -= target_removed_bytes; | |
8645 | ||
8646 | /* Try to encode it. Get the operand and check. */ | |
8647 | if (is_alt_relocation (ELF32_R_TYPE (irel->r_info))) | |
8648 | { | |
8649 | /* None of the current alternate relocs are PC-relative, | |
8650 | and only PC-relative relocs matter here. */ | |
8651 | } | |
8652 | else | |
8653 | { | |
8654 | xtensa_opcode opcode; | |
8655 | int opnum; | |
8656 | ||
b2b326d2 | 8657 | if (relevant_relocs) |
03e94c08 | 8658 | { |
b2b326d2 MF |
8659 | opcode = entry->opcode; |
8660 | opnum = entry->opnum; | |
03e94c08 | 8661 | } |
b2b326d2 | 8662 | else |
03e94c08 | 8663 | { |
b2b326d2 MF |
8664 | if (reloc_opcodes) |
8665 | opcode = reloc_opcodes[relevant_relocs ? | |
8666 | (unsigned)(entry - relevant_relocs->reloc) : i]; | |
8667 | else | |
8668 | opcode = get_relocation_opcode (abfd, sec, contents, irel); | |
8669 | if (opcode == XTENSA_UNDEFINED) | |
8670 | { | |
0a1b45a2 | 8671 | ok = false; |
b2b326d2 MF |
8672 | break; |
8673 | } | |
8674 | ||
8675 | opnum = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->r_info)); | |
8676 | if (opnum == XTENSA_UNDEFINED) | |
8677 | { | |
0a1b45a2 | 8678 | ok = false; |
b2b326d2 MF |
8679 | break; |
8680 | } | |
03e94c08 | 8681 | } |
43cd72b9 BW |
8682 | |
8683 | if (!pcrel_reloc_fits (opcode, opnum, self_offset, target_offset)) | |
03e94c08 | 8684 | { |
0a1b45a2 | 8685 | ok = false; |
03e94c08 BW |
8686 | break; |
8687 | } | |
43cd72b9 BW |
8688 | } |
8689 | } | |
8690 | ||
c9594989 | 8691 | free_xlate_map (xmap); |
03e94c08 BW |
8692 | |
8693 | return ok; | |
43cd72b9 BW |
8694 | } |
8695 | ||
8696 | ||
0a1b45a2 | 8697 | static bool |
7fa3d080 | 8698 | check_section_ebb_reduces (const ebb_constraint *constraint) |
43cd72b9 BW |
8699 | { |
8700 | int removed = 0; | |
8701 | unsigned i; | |
8702 | ||
8703 | for (i = 0; i < constraint->action_count; i++) | |
8704 | { | |
8705 | const proposed_action *action = &constraint->actions[i]; | |
8706 | if (action->do_action) | |
8707 | removed += action->removed_bytes; | |
8708 | } | |
8709 | if (removed < 0) | |
0a1b45a2 | 8710 | return false; |
e0001a05 | 8711 | |
0a1b45a2 | 8712 | return true; |
e0001a05 NC |
8713 | } |
8714 | ||
8715 | ||
43cd72b9 | 8716 | void |
7fa3d080 BW |
8717 | text_action_add_proposed (text_action_list *l, |
8718 | const ebb_constraint *ebb_table, | |
8719 | asection *sec) | |
e0001a05 NC |
8720 | { |
8721 | unsigned i; | |
8722 | ||
43cd72b9 | 8723 | for (i = 0; i < ebb_table->action_count; i++) |
e0001a05 | 8724 | { |
43cd72b9 | 8725 | proposed_action *action = &ebb_table->actions[i]; |
e0001a05 | 8726 | |
43cd72b9 | 8727 | if (!action->do_action) |
e0001a05 | 8728 | continue; |
43cd72b9 BW |
8729 | switch (action->action) |
8730 | { | |
8731 | case ta_remove_insn: | |
8732 | case ta_remove_longcall: | |
8733 | case ta_convert_longcall: | |
8734 | case ta_narrow_insn: | |
8735 | case ta_widen_insn: | |
8736 | case ta_fill: | |
8737 | case ta_remove_literal: | |
8738 | text_action_add (l, action->action, sec, action->offset, | |
8739 | action->removed_bytes); | |
8740 | break; | |
8741 | case ta_none: | |
8742 | break; | |
8743 | default: | |
8744 | BFD_ASSERT (0); | |
8745 | break; | |
8746 | } | |
e0001a05 | 8747 | } |
43cd72b9 | 8748 | } |
e0001a05 | 8749 | |
43cd72b9 BW |
8750 | |
8751 | int | |
4b8e28c7 | 8752 | xtensa_compute_fill_extra_space (property_table_entry *entry) |
43cd72b9 BW |
8753 | { |
8754 | int fill_extra_space; | |
8755 | ||
8756 | if (!entry) | |
8757 | return 0; | |
8758 | ||
8759 | if ((entry->flags & XTENSA_PROP_UNREACHABLE) == 0) | |
8760 | return 0; | |
8761 | ||
8762 | fill_extra_space = entry->size; | |
8763 | if ((entry->flags & XTENSA_PROP_ALIGN) != 0) | |
8764 | { | |
8765 | /* Fill bytes for alignment: | |
8766 | (2**n)-1 - (addr + (2**n)-1) & (2**n -1) */ | |
8767 | int pow = GET_XTENSA_PROP_ALIGNMENT (entry->flags); | |
8768 | int nsm = (1 << pow) - 1; | |
8769 | bfd_vma addr = entry->address + entry->size; | |
8770 | bfd_vma align_fill = nsm - ((addr + nsm) & nsm); | |
8771 | fill_extra_space += align_fill; | |
8772 | } | |
8773 | return fill_extra_space; | |
e0001a05 NC |
8774 | } |
8775 | ||
43cd72b9 | 8776 | \f |
e0001a05 NC |
8777 | /* First relaxation pass. */ |
8778 | ||
43cd72b9 BW |
8779 | /* If the section contains relaxable literals, check each literal to |
8780 | see if it has the same value as another literal that has already | |
8781 | been seen, either in the current section or a previous one. If so, | |
8782 | add an entry to the per-section list of removed literals. The | |
e0001a05 NC |
8783 | actual changes are deferred until the next pass. */ |
8784 | ||
0a1b45a2 | 8785 | static bool |
7fa3d080 BW |
8786 | compute_removed_literals (bfd *abfd, |
8787 | asection *sec, | |
8788 | struct bfd_link_info *link_info, | |
8789 | value_map_hash_table *values) | |
e0001a05 NC |
8790 | { |
8791 | xtensa_relax_info *relax_info; | |
8792 | bfd_byte *contents; | |
8793 | Elf_Internal_Rela *internal_relocs; | |
43cd72b9 | 8794 | source_reloc *src_relocs, *rel; |
0a1b45a2 | 8795 | bool ok = true; |
43cd72b9 BW |
8796 | property_table_entry *prop_table = NULL; |
8797 | int ptblsize; | |
8798 | int i, prev_i; | |
0a1b45a2 | 8799 | bool last_loc_is_prev = false; |
43cd72b9 BW |
8800 | bfd_vma last_target_offset = 0; |
8801 | section_cache_t target_sec_cache; | |
8802 | bfd_size_type sec_size; | |
8803 | ||
8804 | init_section_cache (&target_sec_cache); | |
e0001a05 NC |
8805 | |
8806 | /* Do nothing if it is not a relaxable literal section. */ | |
8807 | relax_info = get_xtensa_relax_info (sec); | |
8808 | BFD_ASSERT (relax_info); | |
e0001a05 NC |
8809 | if (!relax_info->is_relaxable_literal_section) |
8810 | return ok; | |
8811 | ||
68ffbac6 | 8812 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
e0001a05 NC |
8813 | link_info->keep_memory); |
8814 | ||
43cd72b9 | 8815 | sec_size = bfd_get_section_limit (abfd, sec); |
e0001a05 | 8816 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); |
43cd72b9 | 8817 | if (contents == NULL && sec_size != 0) |
e0001a05 | 8818 | { |
0a1b45a2 | 8819 | ok = false; |
e0001a05 NC |
8820 | goto error_return; |
8821 | } | |
8822 | ||
8823 | /* Sort the source_relocs by target offset. */ | |
8824 | src_relocs = relax_info->src_relocs; | |
8825 | qsort (src_relocs, relax_info->src_count, | |
8826 | sizeof (source_reloc), source_reloc_compare); | |
43cd72b9 BW |
8827 | qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), |
8828 | internal_reloc_compare); | |
e0001a05 | 8829 | |
43cd72b9 | 8830 | ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table, |
0a1b45a2 | 8831 | XTENSA_PROP_SEC_NAME, false); |
43cd72b9 BW |
8832 | if (ptblsize < 0) |
8833 | { | |
0a1b45a2 | 8834 | ok = false; |
43cd72b9 BW |
8835 | goto error_return; |
8836 | } | |
8837 | ||
8838 | prev_i = -1; | |
e0001a05 NC |
8839 | for (i = 0; i < relax_info->src_count; i++) |
8840 | { | |
e0001a05 | 8841 | Elf_Internal_Rela *irel = NULL; |
e0001a05 NC |
8842 | |
8843 | rel = &src_relocs[i]; | |
43cd72b9 BW |
8844 | if (get_l32r_opcode () != rel->opcode) |
8845 | continue; | |
e0001a05 NC |
8846 | irel = get_irel_at_offset (sec, internal_relocs, |
8847 | rel->r_rel.target_offset); | |
8848 | ||
43cd72b9 BW |
8849 | /* If the relocation on this is not a simple R_XTENSA_32 or |
8850 | R_XTENSA_PLT then do not consider it. This may happen when | |
8851 | the difference of two symbols is used in a literal. */ | |
8852 | if (irel && (ELF32_R_TYPE (irel->r_info) != R_XTENSA_32 | |
8853 | && ELF32_R_TYPE (irel->r_info) != R_XTENSA_PLT)) | |
8854 | continue; | |
8855 | ||
e0001a05 NC |
8856 | /* If the target_offset for this relocation is the same as the |
8857 | previous relocation, then we've already considered whether the | |
8858 | literal can be coalesced. Skip to the next one.... */ | |
43cd72b9 BW |
8859 | if (i != 0 && prev_i != -1 |
8860 | && src_relocs[i-1].r_rel.target_offset == rel->r_rel.target_offset) | |
e0001a05 | 8861 | continue; |
43cd72b9 BW |
8862 | prev_i = i; |
8863 | ||
68ffbac6 | 8864 | if (last_loc_is_prev && |
43cd72b9 | 8865 | last_target_offset + 4 != rel->r_rel.target_offset) |
0a1b45a2 | 8866 | last_loc_is_prev = false; |
e0001a05 NC |
8867 | |
8868 | /* Check if the relocation was from an L32R that is being removed | |
8869 | because a CALLX was converted to a direct CALL, and check if | |
8870 | there are no other relocations to the literal. */ | |
68ffbac6 | 8871 | if (is_removable_literal (rel, i, src_relocs, relax_info->src_count, |
99ded152 | 8872 | sec, prop_table, ptblsize)) |
e0001a05 | 8873 | { |
43cd72b9 BW |
8874 | if (!remove_dead_literal (abfd, sec, link_info, internal_relocs, |
8875 | irel, rel, prop_table, ptblsize)) | |
e0001a05 | 8876 | { |
0a1b45a2 | 8877 | ok = false; |
43cd72b9 | 8878 | goto error_return; |
e0001a05 | 8879 | } |
43cd72b9 | 8880 | last_target_offset = rel->r_rel.target_offset; |
e0001a05 NC |
8881 | continue; |
8882 | } | |
8883 | ||
43cd72b9 | 8884 | if (!identify_literal_placement (abfd, sec, contents, link_info, |
68ffbac6 L |
8885 | values, |
8886 | &last_loc_is_prev, irel, | |
43cd72b9 BW |
8887 | relax_info->src_count - i, rel, |
8888 | prop_table, ptblsize, | |
8889 | &target_sec_cache, rel->is_abs_literal)) | |
e0001a05 | 8890 | { |
0a1b45a2 | 8891 | ok = false; |
43cd72b9 BW |
8892 | goto error_return; |
8893 | } | |
8894 | last_target_offset = rel->r_rel.target_offset; | |
8895 | } | |
e0001a05 | 8896 | |
43cd72b9 BW |
8897 | #if DEBUG |
8898 | print_removed_literals (stderr, &relax_info->removed_list); | |
8899 | print_action_list (stderr, &relax_info->action_list); | |
8900 | #endif /* DEBUG */ | |
8901 | ||
dc1e8a47 | 8902 | error_return: |
c9594989 | 8903 | free (prop_table); |
65e911f9 | 8904 | free_section_cache (&target_sec_cache); |
43cd72b9 BW |
8905 | |
8906 | release_contents (sec, contents); | |
8907 | release_internal_relocs (sec, internal_relocs); | |
8908 | return ok; | |
8909 | } | |
8910 | ||
8911 | ||
8912 | static Elf_Internal_Rela * | |
7fa3d080 BW |
8913 | get_irel_at_offset (asection *sec, |
8914 | Elf_Internal_Rela *internal_relocs, | |
8915 | bfd_vma offset) | |
43cd72b9 BW |
8916 | { |
8917 | unsigned i; | |
8918 | Elf_Internal_Rela *irel; | |
8919 | unsigned r_type; | |
8920 | Elf_Internal_Rela key; | |
8921 | ||
68ffbac6 | 8922 | if (!internal_relocs) |
43cd72b9 BW |
8923 | return NULL; |
8924 | ||
8925 | key.r_offset = offset; | |
8926 | irel = bsearch (&key, internal_relocs, sec->reloc_count, | |
8927 | sizeof (Elf_Internal_Rela), internal_reloc_matches); | |
8928 | if (!irel) | |
8929 | return NULL; | |
8930 | ||
8931 | /* bsearch does not guarantee which will be returned if there are | |
8932 | multiple matches. We need the first that is not an alignment. */ | |
8933 | i = irel - internal_relocs; | |
8934 | while (i > 0) | |
8935 | { | |
8936 | if (internal_relocs[i-1].r_offset != offset) | |
8937 | break; | |
8938 | i--; | |
8939 | } | |
8940 | for ( ; i < sec->reloc_count; i++) | |
8941 | { | |
8942 | irel = &internal_relocs[i]; | |
8943 | r_type = ELF32_R_TYPE (irel->r_info); | |
8944 | if (irel->r_offset == offset && r_type != R_XTENSA_NONE) | |
8945 | return irel; | |
8946 | } | |
8947 | ||
8948 | return NULL; | |
8949 | } | |
8950 | ||
8951 | ||
0a1b45a2 | 8952 | bool |
7fa3d080 BW |
8953 | is_removable_literal (const source_reloc *rel, |
8954 | int i, | |
8955 | const source_reloc *src_relocs, | |
99ded152 BW |
8956 | int src_count, |
8957 | asection *sec, | |
8958 | property_table_entry *prop_table, | |
8959 | int ptblsize) | |
43cd72b9 BW |
8960 | { |
8961 | const source_reloc *curr_rel; | |
99ded152 BW |
8962 | property_table_entry *entry; |
8963 | ||
43cd72b9 | 8964 | if (!rel->is_null) |
0a1b45a2 | 8965 | return false; |
68ffbac6 L |
8966 | |
8967 | entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
99ded152 BW |
8968 | sec->vma + rel->r_rel.target_offset); |
8969 | if (entry && (entry->flags & XTENSA_PROP_NO_TRANSFORM)) | |
0a1b45a2 | 8970 | return false; |
99ded152 | 8971 | |
43cd72b9 BW |
8972 | for (++i; i < src_count; ++i) |
8973 | { | |
8974 | curr_rel = &src_relocs[i]; | |
8975 | /* If all others have the same target offset.... */ | |
8976 | if (curr_rel->r_rel.target_offset != rel->r_rel.target_offset) | |
0a1b45a2 | 8977 | return true; |
43cd72b9 BW |
8978 | |
8979 | if (!curr_rel->is_null | |
8980 | && !xtensa_is_property_section (curr_rel->source_sec) | |
8981 | && !(curr_rel->source_sec->flags & SEC_DEBUGGING)) | |
0a1b45a2 | 8982 | return false; |
43cd72b9 | 8983 | } |
0a1b45a2 | 8984 | return true; |
43cd72b9 BW |
8985 | } |
8986 | ||
8987 | ||
0a1b45a2 | 8988 | bool |
7fa3d080 BW |
8989 | remove_dead_literal (bfd *abfd, |
8990 | asection *sec, | |
8991 | struct bfd_link_info *link_info, | |
8992 | Elf_Internal_Rela *internal_relocs, | |
8993 | Elf_Internal_Rela *irel, | |
8994 | source_reloc *rel, | |
8995 | property_table_entry *prop_table, | |
8996 | int ptblsize) | |
43cd72b9 BW |
8997 | { |
8998 | property_table_entry *entry; | |
8999 | xtensa_relax_info *relax_info; | |
9000 | ||
9001 | relax_info = get_xtensa_relax_info (sec); | |
9002 | if (!relax_info) | |
0a1b45a2 | 9003 | return false; |
43cd72b9 BW |
9004 | |
9005 | entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9006 | sec->vma + rel->r_rel.target_offset); | |
9007 | ||
9008 | /* Mark the unused literal so that it will be removed. */ | |
9009 | add_removed_literal (&relax_info->removed_list, &rel->r_rel, NULL); | |
9010 | ||
9011 | text_action_add (&relax_info->action_list, | |
9012 | ta_remove_literal, sec, rel->r_rel.target_offset, 4); | |
9013 | ||
9014 | /* If the section is 4-byte aligned, do not add fill. */ | |
68ffbac6 | 9015 | if (sec->alignment_power > 2) |
43cd72b9 BW |
9016 | { |
9017 | int fill_extra_space; | |
9018 | bfd_vma entry_sec_offset; | |
9019 | text_action *fa; | |
9020 | property_table_entry *the_add_entry; | |
9021 | int removed_diff; | |
9022 | ||
9023 | if (entry) | |
9024 | entry_sec_offset = entry->address - sec->vma + entry->size; | |
9025 | else | |
9026 | entry_sec_offset = rel->r_rel.target_offset + 4; | |
9027 | ||
9028 | /* If the literal range is at the end of the section, | |
9029 | do not add fill. */ | |
9030 | the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9031 | entry_sec_offset); | |
4b8e28c7 | 9032 | fill_extra_space = xtensa_compute_fill_extra_space (the_add_entry); |
43cd72b9 BW |
9033 | |
9034 | fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset); | |
9035 | removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset, | |
9036 | -4, fill_extra_space); | |
9037 | if (fa) | |
9038 | adjust_fill_action (fa, removed_diff); | |
9039 | else | |
9040 | text_action_add (&relax_info->action_list, | |
9041 | ta_fill, sec, entry_sec_offset, removed_diff); | |
9042 | } | |
9043 | ||
9044 | /* Zero out the relocation on this literal location. */ | |
9045 | if (irel) | |
9046 | { | |
9047 | if (elf_hash_table (link_info)->dynamic_sections_created) | |
9048 | shrink_dynamic_reloc_sections (link_info, abfd, sec, irel); | |
9049 | ||
9050 | irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
9051 | pin_internal_relocs (sec, internal_relocs); | |
9052 | } | |
9053 | ||
9054 | /* Do not modify "last_loc_is_prev". */ | |
0a1b45a2 | 9055 | return true; |
43cd72b9 BW |
9056 | } |
9057 | ||
9058 | ||
0a1b45a2 | 9059 | bool |
7fa3d080 BW |
9060 | identify_literal_placement (bfd *abfd, |
9061 | asection *sec, | |
9062 | bfd_byte *contents, | |
9063 | struct bfd_link_info *link_info, | |
9064 | value_map_hash_table *values, | |
0a1b45a2 | 9065 | bool *last_loc_is_prev_p, |
7fa3d080 BW |
9066 | Elf_Internal_Rela *irel, |
9067 | int remaining_src_rels, | |
9068 | source_reloc *rel, | |
9069 | property_table_entry *prop_table, | |
9070 | int ptblsize, | |
9071 | section_cache_t *target_sec_cache, | |
0a1b45a2 | 9072 | bool is_abs_literal) |
43cd72b9 BW |
9073 | { |
9074 | literal_value val; | |
9075 | value_map *val_map; | |
9076 | xtensa_relax_info *relax_info; | |
0a1b45a2 | 9077 | bool literal_placed = false; |
43cd72b9 BW |
9078 | r_reloc r_rel; |
9079 | unsigned long value; | |
0a1b45a2 | 9080 | bool final_static_link; |
43cd72b9 BW |
9081 | bfd_size_type sec_size; |
9082 | ||
9083 | relax_info = get_xtensa_relax_info (sec); | |
9084 | if (!relax_info) | |
0a1b45a2 | 9085 | return false; |
43cd72b9 BW |
9086 | |
9087 | sec_size = bfd_get_section_limit (abfd, sec); | |
9088 | ||
9089 | final_static_link = | |
0e1862bb | 9090 | (!bfd_link_relocatable (link_info) |
43cd72b9 BW |
9091 | && !elf_hash_table (link_info)->dynamic_sections_created); |
9092 | ||
9093 | /* The placement algorithm first checks to see if the literal is | |
9094 | already in the value map. If so and the value map is reachable | |
9095 | from all uses, then the literal is moved to that location. If | |
9096 | not, then we identify the last location where a fresh literal was | |
9097 | placed. If the literal can be safely moved there, then we do so. | |
9098 | If not, then we assume that the literal is not to move and leave | |
9099 | the literal where it is, marking it as the last literal | |
9100 | location. */ | |
9101 | ||
9102 | /* Find the literal value. */ | |
9103 | value = 0; | |
9104 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
9105 | if (!irel) | |
9106 | { | |
9107 | BFD_ASSERT (rel->r_rel.target_offset < sec_size); | |
9108 | value = bfd_get_32 (abfd, contents + rel->r_rel.target_offset); | |
9109 | } | |
9110 | init_literal_value (&val, &r_rel, value, is_abs_literal); | |
9111 | ||
9112 | /* Check if we've seen another literal with the same value that | |
9113 | is in the same output section. */ | |
9114 | val_map = value_map_get_cached_value (values, &val, final_static_link); | |
9115 | ||
9116 | if (val_map | |
9117 | && (r_reloc_get_section (&val_map->loc)->output_section | |
9118 | == sec->output_section) | |
9119 | && relocations_reach (rel, remaining_src_rels, &val_map->loc) | |
9120 | && coalesce_shared_literal (sec, rel, prop_table, ptblsize, val_map)) | |
9121 | { | |
9122 | /* No change to last_loc_is_prev. */ | |
0a1b45a2 | 9123 | literal_placed = true; |
43cd72b9 BW |
9124 | } |
9125 | ||
9126 | /* For relocatable links, do not try to move literals. To do it | |
9127 | correctly might increase the number of relocations in an input | |
9128 | section making the default relocatable linking fail. */ | |
0e1862bb | 9129 | if (!bfd_link_relocatable (link_info) && !literal_placed |
43cd72b9 BW |
9130 | && values->has_last_loc && !(*last_loc_is_prev_p)) |
9131 | { | |
9132 | asection *target_sec = r_reloc_get_section (&values->last_loc); | |
9133 | if (target_sec && target_sec->output_section == sec->output_section) | |
9134 | { | |
9135 | /* Increment the virtual offset. */ | |
9136 | r_reloc try_loc = values->last_loc; | |
9137 | try_loc.virtual_offset += 4; | |
9138 | ||
9139 | /* There is a last loc that was in the same output section. */ | |
9140 | if (relocations_reach (rel, remaining_src_rels, &try_loc) | |
9141 | && move_shared_literal (sec, link_info, rel, | |
68ffbac6 | 9142 | prop_table, ptblsize, |
43cd72b9 | 9143 | &try_loc, &val, target_sec_cache)) |
e0001a05 | 9144 | { |
43cd72b9 | 9145 | values->last_loc.virtual_offset += 4; |
0a1b45a2 | 9146 | literal_placed = true; |
43cd72b9 BW |
9147 | if (!val_map) |
9148 | val_map = add_value_map (values, &val, &try_loc, | |
9149 | final_static_link); | |
9150 | else | |
9151 | val_map->loc = try_loc; | |
e0001a05 NC |
9152 | } |
9153 | } | |
43cd72b9 BW |
9154 | } |
9155 | ||
9156 | if (!literal_placed) | |
9157 | { | |
9158 | /* Nothing worked, leave the literal alone but update the last loc. */ | |
0a1b45a2 | 9159 | values->has_last_loc = true; |
43cd72b9 BW |
9160 | values->last_loc = rel->r_rel; |
9161 | if (!val_map) | |
9162 | val_map = add_value_map (values, &val, &rel->r_rel, final_static_link); | |
e0001a05 | 9163 | else |
43cd72b9 | 9164 | val_map->loc = rel->r_rel; |
0a1b45a2 | 9165 | *last_loc_is_prev_p = true; |
e0001a05 NC |
9166 | } |
9167 | ||
0a1b45a2 | 9168 | return true; |
e0001a05 NC |
9169 | } |
9170 | ||
9171 | ||
9172 | /* Check if the original relocations (presumably on L32R instructions) | |
9173 | identified by reloc[0..N] can be changed to reference the literal | |
9174 | identified by r_rel. If r_rel is out of range for any of the | |
9175 | original relocations, then we don't want to coalesce the original | |
9176 | literal with the one at r_rel. We only check reloc[0..N], where the | |
9177 | offsets are all the same as for reloc[0] (i.e., they're all | |
9178 | referencing the same literal) and where N is also bounded by the | |
9179 | number of remaining entries in the "reloc" array. The "reloc" array | |
9180 | is sorted by target offset so we know all the entries for the same | |
9181 | literal will be contiguous. */ | |
9182 | ||
0a1b45a2 | 9183 | static bool |
7fa3d080 BW |
9184 | relocations_reach (source_reloc *reloc, |
9185 | int remaining_relocs, | |
9186 | const r_reloc *r_rel) | |
e0001a05 NC |
9187 | { |
9188 | bfd_vma from_offset, source_address, dest_address; | |
9189 | asection *sec; | |
9190 | int i; | |
9191 | ||
9192 | if (!r_reloc_is_defined (r_rel)) | |
0a1b45a2 | 9193 | return false; |
e0001a05 NC |
9194 | |
9195 | sec = r_reloc_get_section (r_rel); | |
9196 | from_offset = reloc[0].r_rel.target_offset; | |
9197 | ||
9198 | for (i = 0; i < remaining_relocs; i++) | |
9199 | { | |
9200 | if (reloc[i].r_rel.target_offset != from_offset) | |
9201 | break; | |
9202 | ||
9203 | /* Ignore relocations that have been removed. */ | |
9204 | if (reloc[i].is_null) | |
9205 | continue; | |
9206 | ||
9207 | /* The original and new output section for these must be the same | |
07d6d2b8 | 9208 | in order to coalesce. */ |
e0001a05 NC |
9209 | if (r_reloc_get_section (&reloc[i].r_rel)->output_section |
9210 | != sec->output_section) | |
0a1b45a2 | 9211 | return false; |
e0001a05 | 9212 | |
d638e0ac BW |
9213 | /* Absolute literals in the same output section can always be |
9214 | combined. */ | |
9215 | if (reloc[i].is_abs_literal) | |
9216 | continue; | |
9217 | ||
43cd72b9 BW |
9218 | /* A literal with no PC-relative relocations can be moved anywhere. */ |
9219 | if (reloc[i].opnd != -1) | |
e0001a05 NC |
9220 | { |
9221 | /* Otherwise, check to see that it fits. */ | |
9222 | source_address = (reloc[i].source_sec->output_section->vma | |
9223 | + reloc[i].source_sec->output_offset | |
9224 | + reloc[i].r_rel.rela.r_offset); | |
9225 | dest_address = (sec->output_section->vma | |
9226 | + sec->output_offset | |
9227 | + r_rel->target_offset); | |
9228 | ||
43cd72b9 BW |
9229 | if (!pcrel_reloc_fits (reloc[i].opcode, reloc[i].opnd, |
9230 | source_address, dest_address)) | |
0a1b45a2 | 9231 | return false; |
e0001a05 NC |
9232 | } |
9233 | } | |
9234 | ||
0a1b45a2 | 9235 | return true; |
e0001a05 NC |
9236 | } |
9237 | ||
9238 | ||
43cd72b9 BW |
9239 | /* Move a literal to another literal location because it is |
9240 | the same as the other literal value. */ | |
e0001a05 | 9241 | |
0a1b45a2 | 9242 | static bool |
7fa3d080 BW |
9243 | coalesce_shared_literal (asection *sec, |
9244 | source_reloc *rel, | |
9245 | property_table_entry *prop_table, | |
9246 | int ptblsize, | |
9247 | value_map *val_map) | |
e0001a05 | 9248 | { |
43cd72b9 BW |
9249 | property_table_entry *entry; |
9250 | text_action *fa; | |
9251 | property_table_entry *the_add_entry; | |
9252 | int removed_diff; | |
9253 | xtensa_relax_info *relax_info; | |
9254 | ||
9255 | relax_info = get_xtensa_relax_info (sec); | |
9256 | if (!relax_info) | |
0a1b45a2 | 9257 | return false; |
43cd72b9 BW |
9258 | |
9259 | entry = elf_xtensa_find_property_entry | |
9260 | (prop_table, ptblsize, sec->vma + rel->r_rel.target_offset); | |
99ded152 | 9261 | if (entry && (entry->flags & XTENSA_PROP_NO_TRANSFORM)) |
0a1b45a2 | 9262 | return true; |
43cd72b9 BW |
9263 | |
9264 | /* Mark that the literal will be coalesced. */ | |
9265 | add_removed_literal (&relax_info->removed_list, &rel->r_rel, &val_map->loc); | |
9266 | ||
9267 | text_action_add (&relax_info->action_list, | |
9268 | ta_remove_literal, sec, rel->r_rel.target_offset, 4); | |
9269 | ||
9270 | /* If the section is 4-byte aligned, do not add fill. */ | |
68ffbac6 | 9271 | if (sec->alignment_power > 2) |
e0001a05 | 9272 | { |
43cd72b9 BW |
9273 | int fill_extra_space; |
9274 | bfd_vma entry_sec_offset; | |
9275 | ||
9276 | if (entry) | |
9277 | entry_sec_offset = entry->address - sec->vma + entry->size; | |
9278 | else | |
9279 | entry_sec_offset = rel->r_rel.target_offset + 4; | |
9280 | ||
9281 | /* If the literal range is at the end of the section, | |
9282 | do not add fill. */ | |
9283 | fill_extra_space = 0; | |
9284 | the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9285 | entry_sec_offset); | |
9286 | if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE)) | |
9287 | fill_extra_space = the_add_entry->size; | |
9288 | ||
9289 | fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset); | |
9290 | removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset, | |
9291 | -4, fill_extra_space); | |
9292 | if (fa) | |
9293 | adjust_fill_action (fa, removed_diff); | |
9294 | else | |
9295 | text_action_add (&relax_info->action_list, | |
9296 | ta_fill, sec, entry_sec_offset, removed_diff); | |
e0001a05 | 9297 | } |
43cd72b9 | 9298 | |
0a1b45a2 | 9299 | return true; |
43cd72b9 BW |
9300 | } |
9301 | ||
9302 | ||
9303 | /* Move a literal to another location. This may actually increase the | |
9304 | total amount of space used because of alignments so we need to do | |
9305 | this carefully. Also, it may make a branch go out of range. */ | |
9306 | ||
0a1b45a2 | 9307 | static bool |
7fa3d080 BW |
9308 | move_shared_literal (asection *sec, |
9309 | struct bfd_link_info *link_info, | |
9310 | source_reloc *rel, | |
9311 | property_table_entry *prop_table, | |
9312 | int ptblsize, | |
9313 | const r_reloc *target_loc, | |
9314 | const literal_value *lit_value, | |
9315 | section_cache_t *target_sec_cache) | |
43cd72b9 BW |
9316 | { |
9317 | property_table_entry *the_add_entry, *src_entry, *target_entry = NULL; | |
9318 | text_action *fa, *target_fa; | |
9319 | int removed_diff; | |
9320 | xtensa_relax_info *relax_info, *target_relax_info; | |
9321 | asection *target_sec; | |
9322 | ebb_t *ebb; | |
9323 | ebb_constraint ebb_table; | |
0a1b45a2 | 9324 | bool relocs_fit; |
43cd72b9 BW |
9325 | |
9326 | /* If this routine always returns FALSE, the literals that cannot be | |
9327 | coalesced will not be moved. */ | |
9328 | if (elf32xtensa_no_literal_movement) | |
0a1b45a2 | 9329 | return false; |
43cd72b9 BW |
9330 | |
9331 | relax_info = get_xtensa_relax_info (sec); | |
9332 | if (!relax_info) | |
0a1b45a2 | 9333 | return false; |
43cd72b9 BW |
9334 | |
9335 | target_sec = r_reloc_get_section (target_loc); | |
9336 | target_relax_info = get_xtensa_relax_info (target_sec); | |
9337 | ||
9338 | /* Literals to undefined sections may not be moved because they | |
9339 | must report an error. */ | |
9340 | if (bfd_is_und_section (target_sec)) | |
0a1b45a2 | 9341 | return false; |
43cd72b9 BW |
9342 | |
9343 | src_entry = elf_xtensa_find_property_entry | |
9344 | (prop_table, ptblsize, sec->vma + rel->r_rel.target_offset); | |
9345 | ||
9346 | if (!section_cache_section (target_sec_cache, target_sec, link_info)) | |
0a1b45a2 | 9347 | return false; |
43cd72b9 BW |
9348 | |
9349 | target_entry = elf_xtensa_find_property_entry | |
68ffbac6 | 9350 | (target_sec_cache->ptbl, target_sec_cache->pte_count, |
43cd72b9 BW |
9351 | target_sec->vma + target_loc->target_offset); |
9352 | ||
9353 | if (!target_entry) | |
0a1b45a2 | 9354 | return false; |
43cd72b9 BW |
9355 | |
9356 | /* Make sure that we have not broken any branches. */ | |
0a1b45a2 | 9357 | relocs_fit = false; |
43cd72b9 BW |
9358 | |
9359 | init_ebb_constraint (&ebb_table); | |
9360 | ebb = &ebb_table.ebb; | |
68ffbac6 | 9361 | init_ebb (ebb, target_sec_cache->sec, target_sec_cache->contents, |
43cd72b9 BW |
9362 | target_sec_cache->content_length, |
9363 | target_sec_cache->ptbl, target_sec_cache->pte_count, | |
9364 | target_sec_cache->relocs, target_sec_cache->reloc_count); | |
9365 | ||
9366 | /* Propose to add 4 bytes + worst-case alignment size increase to | |
9367 | destination. */ | |
9368 | ebb_propose_action (&ebb_table, EBB_NO_ALIGN, 0, | |
9369 | ta_fill, target_loc->target_offset, | |
0a1b45a2 | 9370 | -4 - (1 << target_sec->alignment_power), true); |
43cd72b9 BW |
9371 | |
9372 | /* Check all of the PC-relative relocations to make sure they still fit. */ | |
68ffbac6 | 9373 | relocs_fit = check_section_ebb_pcrels_fit (target_sec->owner, target_sec, |
43cd72b9 | 9374 | target_sec_cache->contents, |
b2b326d2 | 9375 | target_sec_cache->relocs, NULL, |
cb337148 | 9376 | &ebb_table, NULL); |
43cd72b9 | 9377 | |
68ffbac6 | 9378 | if (!relocs_fit) |
0a1b45a2 | 9379 | return false; |
43cd72b9 BW |
9380 | |
9381 | text_action_add_literal (&target_relax_info->action_list, | |
9382 | ta_add_literal, target_loc, lit_value, -4); | |
9383 | ||
68ffbac6 | 9384 | if (target_sec->alignment_power > 2 && target_entry != src_entry) |
43cd72b9 BW |
9385 | { |
9386 | /* May need to add or remove some fill to maintain alignment. */ | |
9387 | int fill_extra_space; | |
9388 | bfd_vma entry_sec_offset; | |
9389 | ||
68ffbac6 | 9390 | entry_sec_offset = |
43cd72b9 BW |
9391 | target_entry->address - target_sec->vma + target_entry->size; |
9392 | ||
9393 | /* If the literal range is at the end of the section, | |
9394 | do not add fill. */ | |
9395 | fill_extra_space = 0; | |
9396 | the_add_entry = | |
9397 | elf_xtensa_find_property_entry (target_sec_cache->ptbl, | |
9398 | target_sec_cache->pte_count, | |
9399 | entry_sec_offset); | |
9400 | if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE)) | |
9401 | fill_extra_space = the_add_entry->size; | |
9402 | ||
9403 | target_fa = find_fill_action (&target_relax_info->action_list, | |
9404 | target_sec, entry_sec_offset); | |
9405 | removed_diff = compute_removed_action_diff (target_fa, target_sec, | |
9406 | entry_sec_offset, 4, | |
9407 | fill_extra_space); | |
9408 | if (target_fa) | |
9409 | adjust_fill_action (target_fa, removed_diff); | |
9410 | else | |
9411 | text_action_add (&target_relax_info->action_list, | |
9412 | ta_fill, target_sec, entry_sec_offset, removed_diff); | |
9413 | } | |
9414 | ||
9415 | /* Mark that the literal will be moved to the new location. */ | |
9416 | add_removed_literal (&relax_info->removed_list, &rel->r_rel, target_loc); | |
9417 | ||
9418 | /* Remove the literal. */ | |
9419 | text_action_add (&relax_info->action_list, | |
9420 | ta_remove_literal, sec, rel->r_rel.target_offset, 4); | |
9421 | ||
9422 | /* If the section is 4-byte aligned, do not add fill. */ | |
68ffbac6 | 9423 | if (sec->alignment_power > 2 && target_entry != src_entry) |
43cd72b9 BW |
9424 | { |
9425 | int fill_extra_space; | |
9426 | bfd_vma entry_sec_offset; | |
9427 | ||
9428 | if (src_entry) | |
9429 | entry_sec_offset = src_entry->address - sec->vma + src_entry->size; | |
9430 | else | |
9431 | entry_sec_offset = rel->r_rel.target_offset+4; | |
9432 | ||
9433 | /* If the literal range is at the end of the section, | |
9434 | do not add fill. */ | |
9435 | fill_extra_space = 0; | |
9436 | the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize, | |
9437 | entry_sec_offset); | |
9438 | if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE)) | |
9439 | fill_extra_space = the_add_entry->size; | |
9440 | ||
9441 | fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset); | |
9442 | removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset, | |
9443 | -4, fill_extra_space); | |
9444 | if (fa) | |
9445 | adjust_fill_action (fa, removed_diff); | |
9446 | else | |
9447 | text_action_add (&relax_info->action_list, | |
9448 | ta_fill, sec, entry_sec_offset, removed_diff); | |
9449 | } | |
9450 | ||
0a1b45a2 | 9451 | return true; |
e0001a05 NC |
9452 | } |
9453 | ||
9454 | \f | |
9455 | /* Second relaxation pass. */ | |
9456 | ||
4c2af04f MF |
9457 | static int |
9458 | action_remove_bytes_fn (splay_tree_node node, void *p) | |
9459 | { | |
9460 | bfd_size_type *final_size = p; | |
9461 | text_action *action = (text_action *)node->value; | |
9462 | ||
9463 | *final_size -= action->removed_bytes; | |
9464 | return 0; | |
9465 | } | |
9466 | ||
e0001a05 NC |
9467 | /* Modify all of the relocations to point to the right spot, and if this |
9468 | is a relaxable section, delete the unwanted literals and fix the | |
43cd72b9 | 9469 | section size. */ |
e0001a05 | 9470 | |
0a1b45a2 | 9471 | bool |
7fa3d080 | 9472 | relax_section (bfd *abfd, asection *sec, struct bfd_link_info *link_info) |
e0001a05 NC |
9473 | { |
9474 | Elf_Internal_Rela *internal_relocs; | |
9475 | xtensa_relax_info *relax_info; | |
9476 | bfd_byte *contents; | |
0a1b45a2 | 9477 | bool ok = true; |
e0001a05 | 9478 | unsigned i; |
0a1b45a2 AM |
9479 | bool rv = false; |
9480 | bool virtual_action; | |
43cd72b9 | 9481 | bfd_size_type sec_size; |
e0001a05 | 9482 | |
43cd72b9 | 9483 | sec_size = bfd_get_section_limit (abfd, sec); |
e0001a05 NC |
9484 | relax_info = get_xtensa_relax_info (sec); |
9485 | BFD_ASSERT (relax_info); | |
9486 | ||
43cd72b9 BW |
9487 | /* First translate any of the fixes that have been added already. */ |
9488 | translate_section_fixes (sec); | |
9489 | ||
e0001a05 NC |
9490 | /* Handle property sections (e.g., literal tables) specially. */ |
9491 | if (xtensa_is_property_section (sec)) | |
9492 | { | |
9493 | BFD_ASSERT (!relax_info->is_relaxable_literal_section); | |
9494 | return relax_property_section (abfd, sec, link_info); | |
9495 | } | |
9496 | ||
68ffbac6 | 9497 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
43cd72b9 | 9498 | link_info->keep_memory); |
4c2af04f | 9499 | if (!internal_relocs && !action_list_count (&relax_info->action_list)) |
0a1b45a2 | 9500 | return true; |
7aa09196 | 9501 | |
43cd72b9 BW |
9502 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); |
9503 | if (contents == NULL && sec_size != 0) | |
9504 | { | |
0a1b45a2 | 9505 | ok = false; |
43cd72b9 BW |
9506 | goto error_return; |
9507 | } | |
9508 | ||
9509 | if (internal_relocs) | |
9510 | { | |
9511 | for (i = 0; i < sec->reloc_count; i++) | |
9512 | { | |
9513 | Elf_Internal_Rela *irel; | |
9514 | xtensa_relax_info *target_relax_info; | |
9515 | bfd_vma source_offset, old_source_offset; | |
9516 | r_reloc r_rel; | |
9517 | unsigned r_type; | |
9518 | asection *target_sec; | |
9519 | ||
9520 | /* Locally change the source address. | |
9521 | Translate the target to the new target address. | |
9522 | If it points to this section and has been removed, | |
9523 | NULLify it. | |
9524 | Write it back. */ | |
9525 | ||
9526 | irel = &internal_relocs[i]; | |
9527 | source_offset = irel->r_offset; | |
9528 | old_source_offset = source_offset; | |
9529 | ||
9530 | r_type = ELF32_R_TYPE (irel->r_info); | |
9531 | r_reloc_init (&r_rel, abfd, irel, contents, | |
9532 | bfd_get_section_limit (abfd, sec)); | |
9533 | ||
9534 | /* If this section could have changed then we may need to | |
9535 | change the relocation's offset. */ | |
9536 | ||
9537 | if (relax_info->is_relaxable_literal_section | |
9538 | || relax_info->is_relaxable_asm_section) | |
9539 | { | |
9b7f5d20 BW |
9540 | pin_internal_relocs (sec, internal_relocs); |
9541 | ||
43cd72b9 BW |
9542 | if (r_type != R_XTENSA_NONE |
9543 | && find_removed_literal (&relax_info->removed_list, | |
9544 | irel->r_offset)) | |
9545 | { | |
9546 | /* Remove this relocation. */ | |
9547 | if (elf_hash_table (link_info)->dynamic_sections_created) | |
9548 | shrink_dynamic_reloc_sections (link_info, abfd, sec, irel); | |
9549 | irel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); | |
071aa5c9 | 9550 | irel->r_offset = offset_with_removed_text_map |
43cd72b9 | 9551 | (&relax_info->action_list, irel->r_offset); |
43cd72b9 BW |
9552 | continue; |
9553 | } | |
9554 | ||
9555 | if (r_type == R_XTENSA_ASM_SIMPLIFY) | |
9556 | { | |
9557 | text_action *action = | |
9558 | find_insn_action (&relax_info->action_list, | |
9559 | irel->r_offset); | |
9560 | if (action && (action->action == ta_convert_longcall | |
9561 | || action->action == ta_remove_longcall)) | |
9562 | { | |
9563 | bfd_reloc_status_type retval; | |
9564 | char *error_message = NULL; | |
9565 | ||
9566 | retval = contract_asm_expansion (contents, sec_size, | |
9567 | irel, &error_message); | |
9568 | if (retval != bfd_reloc_ok) | |
9569 | { | |
9570 | (*link_info->callbacks->reloc_dangerous) | |
9571 | (link_info, error_message, abfd, sec, | |
9572 | irel->r_offset); | |
9573 | goto error_return; | |
9574 | } | |
9575 | /* Update the action so that the code that moves | |
9576 | the contents will do the right thing. */ | |
4c2af04f | 9577 | /* ta_remove_longcall and ta_remove_insn actions are |
07d6d2b8 | 9578 | grouped together in the tree as well as |
4c2af04f MF |
9579 | ta_convert_longcall and ta_none, so that changes below |
9580 | can be done w/o removing and reinserting action into | |
9581 | the tree. */ | |
9582 | ||
43cd72b9 BW |
9583 | if (action->action == ta_remove_longcall) |
9584 | action->action = ta_remove_insn; | |
9585 | else | |
9586 | action->action = ta_none; | |
9587 | /* Refresh the info in the r_rel. */ | |
9588 | r_reloc_init (&r_rel, abfd, irel, contents, sec_size); | |
9589 | r_type = ELF32_R_TYPE (irel->r_info); | |
9590 | } | |
9591 | } | |
9592 | ||
071aa5c9 | 9593 | source_offset = offset_with_removed_text_map |
43cd72b9 BW |
9594 | (&relax_info->action_list, irel->r_offset); |
9595 | irel->r_offset = source_offset; | |
9596 | } | |
9597 | ||
9598 | /* If the target section could have changed then | |
9599 | we may need to change the relocation's target offset. */ | |
9600 | ||
9601 | target_sec = r_reloc_get_section (&r_rel); | |
43cd72b9 | 9602 | |
ae326da8 BW |
9603 | /* For a reference to a discarded section from a DWARF section, |
9604 | i.e., where action_discarded is PRETEND, the symbol will | |
9605 | eventually be modified to refer to the kept section (at least if | |
9606 | the kept and discarded sections are the same size). Anticipate | |
9607 | that here and adjust things accordingly. */ | |
9608 | if (! elf_xtensa_ignore_discarded_relocs (sec) | |
9609 | && elf_xtensa_action_discarded (sec) == PRETEND | |
dbaa2011 | 9610 | && sec->sec_info_type != SEC_INFO_TYPE_STABS |
ae326da8 | 9611 | && target_sec != NULL |
dbaa2011 | 9612 | && discarded_section (target_sec)) |
ae326da8 BW |
9613 | { |
9614 | /* It would be natural to call _bfd_elf_check_kept_section | |
9615 | here, but it's not exported from elflink.c. It's also a | |
9616 | fairly expensive check. Adjusting the relocations to the | |
9617 | discarded section is fairly harmless; it will only adjust | |
9618 | some addends and difference values. If it turns out that | |
9619 | _bfd_elf_check_kept_section fails later, it won't matter, | |
9620 | so just compare the section names to find the right group | |
9621 | member. */ | |
9622 | asection *kept = target_sec->kept_section; | |
9623 | if (kept != NULL) | |
9624 | { | |
9625 | if ((kept->flags & SEC_GROUP) != 0) | |
9626 | { | |
9627 | asection *first = elf_next_in_group (kept); | |
9628 | asection *s = first; | |
9629 | ||
9630 | kept = NULL; | |
9631 | while (s != NULL) | |
9632 | { | |
9633 | if (strcmp (s->name, target_sec->name) == 0) | |
9634 | { | |
9635 | kept = s; | |
9636 | break; | |
9637 | } | |
9638 | s = elf_next_in_group (s); | |
9639 | if (s == first) | |
9640 | break; | |
9641 | } | |
9642 | } | |
9643 | } | |
9644 | if (kept != NULL | |
9645 | && ((target_sec->rawsize != 0 | |
9646 | ? target_sec->rawsize : target_sec->size) | |
9647 | == (kept->rawsize != 0 ? kept->rawsize : kept->size))) | |
9648 | target_sec = kept; | |
9649 | } | |
9650 | ||
9651 | target_relax_info = get_xtensa_relax_info (target_sec); | |
43cd72b9 BW |
9652 | if (target_relax_info |
9653 | && (target_relax_info->is_relaxable_literal_section | |
9654 | || target_relax_info->is_relaxable_asm_section)) | |
9655 | { | |
9656 | r_reloc new_reloc; | |
9b7f5d20 | 9657 | target_sec = translate_reloc (&r_rel, &new_reloc, target_sec); |
43cd72b9 BW |
9658 | |
9659 | if (r_type == R_XTENSA_DIFF8 | |
9660 | || r_type == R_XTENSA_DIFF16 | |
30ce8e47 MF |
9661 | || r_type == R_XTENSA_DIFF32 |
9662 | || r_type == R_XTENSA_PDIFF8 | |
9663 | || r_type == R_XTENSA_PDIFF16 | |
9664 | || r_type == R_XTENSA_PDIFF32 | |
9665 | || r_type == R_XTENSA_NDIFF8 | |
9666 | || r_type == R_XTENSA_NDIFF16 | |
9667 | || r_type == R_XTENSA_NDIFF32) | |
43cd72b9 | 9668 | { |
1058c753 VA |
9669 | bfd_signed_vma diff_value = 0; |
9670 | bfd_vma new_end_offset, diff_mask = 0; | |
43cd72b9 BW |
9671 | |
9672 | if (bfd_get_section_limit (abfd, sec) < old_source_offset) | |
9673 | { | |
9674 | (*link_info->callbacks->reloc_dangerous) | |
9675 | (link_info, _("invalid relocation address"), | |
9676 | abfd, sec, old_source_offset); | |
9677 | goto error_return; | |
9678 | } | |
9679 | ||
9680 | switch (r_type) | |
9681 | { | |
9682 | case R_XTENSA_DIFF8: | |
d548f47d | 9683 | diff_mask = 0x7f; |
43cd72b9 | 9684 | diff_value = |
1058c753 | 9685 | bfd_get_signed_8 (abfd, &contents[old_source_offset]); |
43cd72b9 BW |
9686 | break; |
9687 | case R_XTENSA_DIFF16: | |
d548f47d | 9688 | diff_mask = 0x7fff; |
43cd72b9 | 9689 | diff_value = |
1058c753 | 9690 | bfd_get_signed_16 (abfd, &contents[old_source_offset]); |
43cd72b9 BW |
9691 | break; |
9692 | case R_XTENSA_DIFF32: | |
d548f47d | 9693 | diff_mask = 0x7fffffff; |
43cd72b9 | 9694 | diff_value = |
1058c753 | 9695 | bfd_get_signed_32 (abfd, &contents[old_source_offset]); |
43cd72b9 | 9696 | break; |
30ce8e47 MF |
9697 | case R_XTENSA_PDIFF8: |
9698 | case R_XTENSA_NDIFF8: | |
d548f47d | 9699 | diff_mask = 0xff; |
30ce8e47 MF |
9700 | diff_value = |
9701 | bfd_get_8 (abfd, &contents[old_source_offset]); | |
9702 | break; | |
9703 | case R_XTENSA_PDIFF16: | |
9704 | case R_XTENSA_NDIFF16: | |
d548f47d | 9705 | diff_mask = 0xffff; |
30ce8e47 MF |
9706 | diff_value = |
9707 | bfd_get_16 (abfd, &contents[old_source_offset]); | |
9708 | break; | |
9709 | case R_XTENSA_PDIFF32: | |
9710 | case R_XTENSA_NDIFF32: | |
d548f47d | 9711 | diff_mask = 0xffffffff; |
30ce8e47 MF |
9712 | diff_value = |
9713 | bfd_get_32 (abfd, &contents[old_source_offset]); | |
9714 | break; | |
43cd72b9 BW |
9715 | } |
9716 | ||
30ce8e47 | 9717 | if (r_type >= R_XTENSA_NDIFF8 |
d548f47d MF |
9718 | && r_type <= R_XTENSA_NDIFF32 |
9719 | && diff_value) | |
9720 | diff_value |= ~diff_mask; | |
30ce8e47 | 9721 | |
071aa5c9 | 9722 | new_end_offset = offset_with_removed_text_map |
43cd72b9 BW |
9723 | (&target_relax_info->action_list, |
9724 | r_rel.target_offset + diff_value); | |
9725 | diff_value = new_end_offset - new_reloc.target_offset; | |
9726 | ||
9727 | switch (r_type) | |
9728 | { | |
9729 | case R_XTENSA_DIFF8: | |
1058c753 | 9730 | bfd_put_signed_8 (abfd, diff_value, |
43cd72b9 BW |
9731 | &contents[old_source_offset]); |
9732 | break; | |
9733 | case R_XTENSA_DIFF16: | |
1058c753 | 9734 | bfd_put_signed_16 (abfd, diff_value, |
43cd72b9 BW |
9735 | &contents[old_source_offset]); |
9736 | break; | |
9737 | case R_XTENSA_DIFF32: | |
1058c753 | 9738 | bfd_put_signed_32 (abfd, diff_value, |
43cd72b9 BW |
9739 | &contents[old_source_offset]); |
9740 | break; | |
30ce8e47 MF |
9741 | case R_XTENSA_PDIFF8: |
9742 | case R_XTENSA_NDIFF8: | |
30ce8e47 MF |
9743 | bfd_put_8 (abfd, diff_value, |
9744 | &contents[old_source_offset]); | |
9745 | break; | |
9746 | case R_XTENSA_PDIFF16: | |
9747 | case R_XTENSA_NDIFF16: | |
30ce8e47 MF |
9748 | bfd_put_16 (abfd, diff_value, |
9749 | &contents[old_source_offset]); | |
9750 | break; | |
9751 | case R_XTENSA_PDIFF32: | |
9752 | case R_XTENSA_NDIFF32: | |
30ce8e47 MF |
9753 | bfd_put_32 (abfd, diff_value, |
9754 | &contents[old_source_offset]); | |
9755 | break; | |
43cd72b9 BW |
9756 | } |
9757 | ||
d548f47d MF |
9758 | /* Check for overflow. Sign bits must be all zeroes or |
9759 | all ones. When sign bits are all ones diff_value | |
9760 | may not be zero. */ | |
9761 | if (((diff_value & ~diff_mask) != 0 | |
9762 | && (diff_value & ~diff_mask) != ~diff_mask) | |
9763 | || (diff_value && (bfd_vma) diff_value == ~diff_mask)) | |
43cd72b9 BW |
9764 | { |
9765 | (*link_info->callbacks->reloc_dangerous) | |
9766 | (link_info, _("overflow after relaxation"), | |
9767 | abfd, sec, old_source_offset); | |
9768 | goto error_return; | |
9769 | } | |
9770 | ||
9771 | pin_contents (sec, contents); | |
9772 | } | |
dc96b90a BW |
9773 | |
9774 | /* If the relocation still references a section in the same | |
9775 | input file, modify the relocation directly instead of | |
9776 | adding a "fix" record. */ | |
9777 | if (target_sec->owner == abfd) | |
9778 | { | |
9779 | unsigned r_symndx = ELF32_R_SYM (new_reloc.rela.r_info); | |
9780 | irel->r_info = ELF32_R_INFO (r_symndx, r_type); | |
9781 | irel->r_addend = new_reloc.rela.r_addend; | |
9782 | pin_internal_relocs (sec, internal_relocs); | |
9783 | } | |
9b7f5d20 BW |
9784 | else |
9785 | { | |
dc96b90a BW |
9786 | bfd_vma addend_displacement; |
9787 | reloc_bfd_fix *fix; | |
9788 | ||
9789 | addend_displacement = | |
9790 | new_reloc.target_offset + new_reloc.virtual_offset; | |
9791 | fix = reloc_bfd_fix_init (sec, source_offset, r_type, | |
9792 | target_sec, | |
0a1b45a2 | 9793 | addend_displacement, true); |
dc96b90a | 9794 | add_fix (sec, fix); |
9b7f5d20 | 9795 | } |
43cd72b9 | 9796 | } |
43cd72b9 BW |
9797 | } |
9798 | } | |
9799 | ||
9800 | if ((relax_info->is_relaxable_literal_section | |
9801 | || relax_info->is_relaxable_asm_section) | |
4c2af04f | 9802 | && action_list_count (&relax_info->action_list)) |
43cd72b9 BW |
9803 | { |
9804 | /* Walk through the planned actions and build up a table | |
9805 | of move, copy and fill records. Use the move, copy and | |
9806 | fill records to perform the actions once. */ | |
9807 | ||
43cd72b9 BW |
9808 | bfd_size_type final_size, copy_size, orig_insn_size; |
9809 | bfd_byte *scratch = NULL; | |
9810 | bfd_byte *dup_contents = NULL; | |
a3ef2d63 | 9811 | bfd_size_type orig_size = sec->size; |
43cd72b9 BW |
9812 | bfd_vma orig_dot = 0; |
9813 | bfd_vma orig_dot_copied = 0; /* Byte copied already from | |
9814 | orig dot in physical memory. */ | |
9815 | bfd_vma orig_dot_vo = 0; /* Virtual offset from orig_dot. */ | |
9816 | bfd_vma dup_dot = 0; | |
9817 | ||
4c2af04f | 9818 | text_action *action; |
43cd72b9 BW |
9819 | |
9820 | final_size = sec->size; | |
43cd72b9 | 9821 | |
4c2af04f MF |
9822 | splay_tree_foreach (relax_info->action_list.tree, |
9823 | action_remove_bytes_fn, &final_size); | |
43cd72b9 BW |
9824 | scratch = (bfd_byte *) bfd_zmalloc (final_size); |
9825 | dup_contents = (bfd_byte *) bfd_zmalloc (final_size); | |
9826 | ||
9827 | /* The dot is the current fill location. */ | |
9828 | #if DEBUG | |
9829 | print_action_list (stderr, &relax_info->action_list); | |
9830 | #endif | |
9831 | ||
4c2af04f MF |
9832 | for (action = action_first (&relax_info->action_list); action; |
9833 | action = action_next (&relax_info->action_list, action)) | |
43cd72b9 | 9834 | { |
0a1b45a2 | 9835 | virtual_action = false; |
43cd72b9 BW |
9836 | if (action->offset > orig_dot) |
9837 | { | |
9838 | orig_dot += orig_dot_copied; | |
9839 | orig_dot_copied = 0; | |
9840 | orig_dot_vo = 0; | |
9841 | /* Out of the virtual world. */ | |
9842 | } | |
9843 | ||
9844 | if (action->offset > orig_dot) | |
9845 | { | |
9846 | copy_size = action->offset - orig_dot; | |
9847 | memmove (&dup_contents[dup_dot], &contents[orig_dot], copy_size); | |
9848 | orig_dot += copy_size; | |
9849 | dup_dot += copy_size; | |
9850 | BFD_ASSERT (action->offset == orig_dot); | |
9851 | } | |
9852 | else if (action->offset < orig_dot) | |
9853 | { | |
9854 | if (action->action == ta_fill | |
9855 | && action->offset - action->removed_bytes == orig_dot) | |
9856 | { | |
9857 | /* This is OK because the fill only effects the dup_dot. */ | |
9858 | } | |
9859 | else if (action->action == ta_add_literal) | |
9860 | { | |
9861 | /* TBD. Might need to handle this. */ | |
9862 | } | |
9863 | } | |
9864 | if (action->offset == orig_dot) | |
9865 | { | |
9866 | if (action->virtual_offset > orig_dot_vo) | |
9867 | { | |
9868 | if (orig_dot_vo == 0) | |
9869 | { | |
9870 | /* Need to copy virtual_offset bytes. Probably four. */ | |
9871 | copy_size = action->virtual_offset - orig_dot_vo; | |
9872 | memmove (&dup_contents[dup_dot], | |
9873 | &contents[orig_dot], copy_size); | |
9874 | orig_dot_copied = copy_size; | |
9875 | dup_dot += copy_size; | |
9876 | } | |
0a1b45a2 | 9877 | virtual_action = true; |
68ffbac6 | 9878 | } |
43cd72b9 BW |
9879 | else |
9880 | BFD_ASSERT (action->virtual_offset <= orig_dot_vo); | |
9881 | } | |
9882 | switch (action->action) | |
9883 | { | |
9884 | case ta_remove_literal: | |
9885 | case ta_remove_insn: | |
9886 | BFD_ASSERT (action->removed_bytes >= 0); | |
9887 | orig_dot += action->removed_bytes; | |
9888 | break; | |
9889 | ||
9890 | case ta_narrow_insn: | |
9891 | orig_insn_size = 3; | |
9892 | copy_size = 2; | |
9893 | memmove (scratch, &contents[orig_dot], orig_insn_size); | |
9894 | BFD_ASSERT (action->removed_bytes == 1); | |
64b607e6 | 9895 | rv = narrow_instruction (scratch, final_size, 0); |
43cd72b9 BW |
9896 | BFD_ASSERT (rv); |
9897 | memmove (&dup_contents[dup_dot], scratch, copy_size); | |
9898 | orig_dot += orig_insn_size; | |
9899 | dup_dot += copy_size; | |
9900 | break; | |
9901 | ||
9902 | case ta_fill: | |
9903 | if (action->removed_bytes >= 0) | |
9904 | orig_dot += action->removed_bytes; | |
9905 | else | |
9906 | { | |
9907 | /* Already zeroed in dup_contents. Just bump the | |
9908 | counters. */ | |
9909 | dup_dot += (-action->removed_bytes); | |
9910 | } | |
9911 | break; | |
9912 | ||
9913 | case ta_none: | |
9914 | BFD_ASSERT (action->removed_bytes == 0); | |
9915 | break; | |
9916 | ||
9917 | case ta_convert_longcall: | |
9918 | case ta_remove_longcall: | |
9919 | /* These will be removed or converted before we get here. */ | |
9920 | BFD_ASSERT (0); | |
9921 | break; | |
9922 | ||
9923 | case ta_widen_insn: | |
9924 | orig_insn_size = 2; | |
9925 | copy_size = 3; | |
9926 | memmove (scratch, &contents[orig_dot], orig_insn_size); | |
9927 | BFD_ASSERT (action->removed_bytes == -1); | |
64b607e6 | 9928 | rv = widen_instruction (scratch, final_size, 0); |
43cd72b9 BW |
9929 | BFD_ASSERT (rv); |
9930 | memmove (&dup_contents[dup_dot], scratch, copy_size); | |
9931 | orig_dot += orig_insn_size; | |
9932 | dup_dot += copy_size; | |
9933 | break; | |
9934 | ||
9935 | case ta_add_literal: | |
9936 | orig_insn_size = 0; | |
9937 | copy_size = 4; | |
9938 | BFD_ASSERT (action->removed_bytes == -4); | |
9939 | /* TBD -- place the literal value here and insert | |
9940 | into the table. */ | |
9941 | memset (&dup_contents[dup_dot], 0, 4); | |
9942 | pin_internal_relocs (sec, internal_relocs); | |
9943 | pin_contents (sec, contents); | |
9944 | ||
9945 | if (!move_literal (abfd, link_info, sec, dup_dot, dup_contents, | |
9946 | relax_info, &internal_relocs, &action->value)) | |
9947 | goto error_return; | |
9948 | ||
68ffbac6 | 9949 | if (virtual_action) |
43cd72b9 BW |
9950 | orig_dot_vo += copy_size; |
9951 | ||
9952 | orig_dot += orig_insn_size; | |
9953 | dup_dot += copy_size; | |
9954 | break; | |
9955 | ||
9956 | default: | |
9957 | /* Not implemented yet. */ | |
9958 | BFD_ASSERT (0); | |
9959 | break; | |
9960 | } | |
9961 | ||
43cd72b9 BW |
9962 | BFD_ASSERT (dup_dot <= final_size); |
9963 | BFD_ASSERT (orig_dot <= orig_size); | |
9964 | } | |
9965 | ||
9966 | orig_dot += orig_dot_copied; | |
9967 | orig_dot_copied = 0; | |
9968 | ||
9969 | if (orig_dot != orig_size) | |
9970 | { | |
9971 | copy_size = orig_size - orig_dot; | |
9972 | BFD_ASSERT (orig_size > orig_dot); | |
9973 | BFD_ASSERT (dup_dot + copy_size == final_size); | |
9974 | memmove (&dup_contents[dup_dot], &contents[orig_dot], copy_size); | |
9975 | orig_dot += copy_size; | |
9976 | dup_dot += copy_size; | |
9977 | } | |
9978 | BFD_ASSERT (orig_size == orig_dot); | |
9979 | BFD_ASSERT (final_size == dup_dot); | |
9980 | ||
9981 | /* Move the dup_contents back. */ | |
9982 | if (final_size > orig_size) | |
9983 | { | |
9984 | /* Contents need to be reallocated. Swap the dup_contents into | |
9985 | contents. */ | |
9986 | sec->contents = dup_contents; | |
9987 | free (contents); | |
9988 | contents = dup_contents; | |
9989 | pin_contents (sec, contents); | |
9990 | } | |
9991 | else | |
9992 | { | |
9993 | BFD_ASSERT (final_size <= orig_size); | |
9994 | memset (contents, 0, orig_size); | |
9995 | memcpy (contents, dup_contents, final_size); | |
9996 | free (dup_contents); | |
9997 | } | |
9998 | free (scratch); | |
9999 | pin_contents (sec, contents); | |
10000 | ||
a3ef2d63 BW |
10001 | if (sec->rawsize == 0) |
10002 | sec->rawsize = sec->size; | |
43cd72b9 BW |
10003 | sec->size = final_size; |
10004 | } | |
10005 | ||
10006 | error_return: | |
10007 | release_internal_relocs (sec, internal_relocs); | |
10008 | release_contents (sec, contents); | |
10009 | return ok; | |
10010 | } | |
10011 | ||
10012 | ||
0a1b45a2 | 10013 | static bool |
7fa3d080 | 10014 | translate_section_fixes (asection *sec) |
43cd72b9 BW |
10015 | { |
10016 | xtensa_relax_info *relax_info; | |
10017 | reloc_bfd_fix *r; | |
10018 | ||
10019 | relax_info = get_xtensa_relax_info (sec); | |
10020 | if (!relax_info) | |
0a1b45a2 | 10021 | return true; |
43cd72b9 BW |
10022 | |
10023 | for (r = relax_info->fix_list; r != NULL; r = r->next) | |
10024 | if (!translate_reloc_bfd_fix (r)) | |
0a1b45a2 | 10025 | return false; |
e0001a05 | 10026 | |
0a1b45a2 | 10027 | return true; |
43cd72b9 | 10028 | } |
e0001a05 | 10029 | |
e0001a05 | 10030 | |
43cd72b9 BW |
10031 | /* Translate a fix given the mapping in the relax info for the target |
10032 | section. If it has already been translated, no work is required. */ | |
e0001a05 | 10033 | |
0a1b45a2 | 10034 | static bool |
7fa3d080 | 10035 | translate_reloc_bfd_fix (reloc_bfd_fix *fix) |
43cd72b9 BW |
10036 | { |
10037 | reloc_bfd_fix new_fix; | |
10038 | asection *sec; | |
10039 | xtensa_relax_info *relax_info; | |
10040 | removed_literal *removed; | |
10041 | bfd_vma new_offset, target_offset; | |
e0001a05 | 10042 | |
43cd72b9 | 10043 | if (fix->translated) |
0a1b45a2 | 10044 | return true; |
e0001a05 | 10045 | |
43cd72b9 BW |
10046 | sec = fix->target_sec; |
10047 | target_offset = fix->target_offset; | |
e0001a05 | 10048 | |
43cd72b9 BW |
10049 | relax_info = get_xtensa_relax_info (sec); |
10050 | if (!relax_info) | |
10051 | { | |
0a1b45a2 AM |
10052 | fix->translated = true; |
10053 | return true; | |
43cd72b9 | 10054 | } |
e0001a05 | 10055 | |
43cd72b9 | 10056 | new_fix = *fix; |
e0001a05 | 10057 | |
43cd72b9 BW |
10058 | /* The fix does not need to be translated if the section cannot change. */ |
10059 | if (!relax_info->is_relaxable_literal_section | |
10060 | && !relax_info->is_relaxable_asm_section) | |
10061 | { | |
0a1b45a2 AM |
10062 | fix->translated = true; |
10063 | return true; | |
43cd72b9 | 10064 | } |
e0001a05 | 10065 | |
43cd72b9 BW |
10066 | /* If the literal has been moved and this relocation was on an |
10067 | opcode, then the relocation should move to the new literal | |
10068 | location. Otherwise, the relocation should move within the | |
10069 | section. */ | |
10070 | ||
0a1b45a2 | 10071 | removed = false; |
43cd72b9 BW |
10072 | if (is_operand_relocation (fix->src_type)) |
10073 | { | |
10074 | /* Check if the original relocation is against a literal being | |
10075 | removed. */ | |
10076 | removed = find_removed_literal (&relax_info->removed_list, | |
10077 | target_offset); | |
e0001a05 NC |
10078 | } |
10079 | ||
68ffbac6 | 10080 | if (removed) |
e0001a05 | 10081 | { |
43cd72b9 | 10082 | asection *new_sec; |
e0001a05 | 10083 | |
43cd72b9 BW |
10084 | /* The fact that there is still a relocation to this literal indicates |
10085 | that the literal is being coalesced, not simply removed. */ | |
10086 | BFD_ASSERT (removed->to.abfd != NULL); | |
e0001a05 | 10087 | |
43cd72b9 BW |
10088 | /* This was moved to some other address (possibly another section). */ |
10089 | new_sec = r_reloc_get_section (&removed->to); | |
68ffbac6 | 10090 | if (new_sec != sec) |
e0001a05 | 10091 | { |
43cd72b9 BW |
10092 | sec = new_sec; |
10093 | relax_info = get_xtensa_relax_info (sec); | |
68ffbac6 | 10094 | if (!relax_info || |
43cd72b9 BW |
10095 | (!relax_info->is_relaxable_literal_section |
10096 | && !relax_info->is_relaxable_asm_section)) | |
e0001a05 | 10097 | { |
43cd72b9 BW |
10098 | target_offset = removed->to.target_offset; |
10099 | new_fix.target_sec = new_sec; | |
10100 | new_fix.target_offset = target_offset; | |
0a1b45a2 | 10101 | new_fix.translated = true; |
43cd72b9 | 10102 | *fix = new_fix; |
0a1b45a2 | 10103 | return true; |
e0001a05 | 10104 | } |
e0001a05 | 10105 | } |
43cd72b9 BW |
10106 | target_offset = removed->to.target_offset; |
10107 | new_fix.target_sec = new_sec; | |
e0001a05 | 10108 | } |
43cd72b9 BW |
10109 | |
10110 | /* The target address may have been moved within its section. */ | |
10111 | new_offset = offset_with_removed_text (&relax_info->action_list, | |
10112 | target_offset); | |
10113 | ||
10114 | new_fix.target_offset = new_offset; | |
10115 | new_fix.target_offset = new_offset; | |
0a1b45a2 | 10116 | new_fix.translated = true; |
43cd72b9 | 10117 | *fix = new_fix; |
0a1b45a2 | 10118 | return true; |
e0001a05 NC |
10119 | } |
10120 | ||
10121 | ||
10122 | /* Fix up a relocation to take account of removed literals. */ | |
10123 | ||
9b7f5d20 BW |
10124 | static asection * |
10125 | translate_reloc (const r_reloc *orig_rel, r_reloc *new_rel, asection *sec) | |
e0001a05 | 10126 | { |
e0001a05 NC |
10127 | xtensa_relax_info *relax_info; |
10128 | removed_literal *removed; | |
9b7f5d20 | 10129 | bfd_vma target_offset, base_offset; |
e0001a05 NC |
10130 | |
10131 | *new_rel = *orig_rel; | |
10132 | ||
10133 | if (!r_reloc_is_defined (orig_rel)) | |
9b7f5d20 | 10134 | return sec ; |
e0001a05 NC |
10135 | |
10136 | relax_info = get_xtensa_relax_info (sec); | |
9b7f5d20 BW |
10137 | BFD_ASSERT (relax_info && (relax_info->is_relaxable_literal_section |
10138 | || relax_info->is_relaxable_asm_section)); | |
e0001a05 | 10139 | |
43cd72b9 BW |
10140 | target_offset = orig_rel->target_offset; |
10141 | ||
0a1b45a2 | 10142 | removed = false; |
43cd72b9 BW |
10143 | if (is_operand_relocation (ELF32_R_TYPE (orig_rel->rela.r_info))) |
10144 | { | |
10145 | /* Check if the original relocation is against a literal being | |
10146 | removed. */ | |
10147 | removed = find_removed_literal (&relax_info->removed_list, | |
10148 | target_offset); | |
10149 | } | |
10150 | if (removed && removed->to.abfd) | |
e0001a05 NC |
10151 | { |
10152 | asection *new_sec; | |
10153 | ||
10154 | /* The fact that there is still a relocation to this literal indicates | |
10155 | that the literal is being coalesced, not simply removed. */ | |
10156 | BFD_ASSERT (removed->to.abfd != NULL); | |
10157 | ||
43cd72b9 BW |
10158 | /* This was moved to some other address |
10159 | (possibly in another section). */ | |
e0001a05 NC |
10160 | *new_rel = removed->to; |
10161 | new_sec = r_reloc_get_section (new_rel); | |
43cd72b9 | 10162 | if (new_sec != sec) |
e0001a05 NC |
10163 | { |
10164 | sec = new_sec; | |
10165 | relax_info = get_xtensa_relax_info (sec); | |
43cd72b9 BW |
10166 | if (!relax_info |
10167 | || (!relax_info->is_relaxable_literal_section | |
10168 | && !relax_info->is_relaxable_asm_section)) | |
9b7f5d20 | 10169 | return sec; |
e0001a05 | 10170 | } |
43cd72b9 | 10171 | target_offset = new_rel->target_offset; |
e0001a05 NC |
10172 | } |
10173 | ||
9b7f5d20 BW |
10174 | /* Find the base offset of the reloc symbol, excluding any addend from the |
10175 | reloc or from the section contents (for a partial_inplace reloc). Then | |
10176 | find the adjusted values of the offsets due to relaxation. The base | |
10177 | offset is needed to determine the change to the reloc's addend; the reloc | |
10178 | addend should not be adjusted due to relaxations located before the base | |
10179 | offset. */ | |
10180 | ||
10181 | base_offset = r_reloc_get_target_offset (new_rel) - new_rel->rela.r_addend; | |
9b7f5d20 BW |
10182 | if (base_offset <= target_offset) |
10183 | { | |
071aa5c9 | 10184 | int base_removed = removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10185 | base_offset, false); |
071aa5c9 | 10186 | int addend_removed = removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10187 | target_offset, false) - |
071aa5c9 MF |
10188 | base_removed; |
10189 | ||
9b7f5d20 BW |
10190 | new_rel->target_offset = target_offset - base_removed - addend_removed; |
10191 | new_rel->rela.r_addend -= addend_removed; | |
10192 | } | |
10193 | else | |
10194 | { | |
10195 | /* Handle a negative addend. The base offset comes first. */ | |
071aa5c9 | 10196 | int tgt_removed = removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10197 | target_offset, false); |
071aa5c9 | 10198 | int addend_removed = removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10199 | base_offset, false) - |
071aa5c9 MF |
10200 | tgt_removed; |
10201 | ||
9b7f5d20 BW |
10202 | new_rel->target_offset = target_offset - tgt_removed; |
10203 | new_rel->rela.r_addend += addend_removed; | |
10204 | } | |
e0001a05 | 10205 | |
9b7f5d20 | 10206 | return sec; |
e0001a05 NC |
10207 | } |
10208 | ||
10209 | ||
10210 | /* For dynamic links, there may be a dynamic relocation for each | |
10211 | literal. The number of dynamic relocations must be computed in | |
10212 | size_dynamic_sections, which occurs before relaxation. When a | |
10213 | literal is removed, this function checks if there is a corresponding | |
10214 | dynamic relocation and shrinks the size of the appropriate dynamic | |
10215 | relocation section accordingly. At this point, the contents of the | |
10216 | dynamic relocation sections have not yet been filled in, so there's | |
10217 | nothing else that needs to be done. */ | |
10218 | ||
10219 | static void | |
7fa3d080 BW |
10220 | shrink_dynamic_reloc_sections (struct bfd_link_info *info, |
10221 | bfd *abfd, | |
10222 | asection *input_section, | |
10223 | Elf_Internal_Rela *rel) | |
e0001a05 | 10224 | { |
f0e6fdb2 | 10225 | struct elf_xtensa_link_hash_table *htab; |
e0001a05 NC |
10226 | Elf_Internal_Shdr *symtab_hdr; |
10227 | struct elf_link_hash_entry **sym_hashes; | |
10228 | unsigned long r_symndx; | |
10229 | int r_type; | |
10230 | struct elf_link_hash_entry *h; | |
0a1b45a2 | 10231 | bool dynamic_symbol; |
e0001a05 | 10232 | |
f0e6fdb2 | 10233 | htab = elf_xtensa_hash_table (info); |
4dfe6ac6 NC |
10234 | if (htab == NULL) |
10235 | return; | |
10236 | ||
e0001a05 NC |
10237 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
10238 | sym_hashes = elf_sym_hashes (abfd); | |
10239 | ||
10240 | r_type = ELF32_R_TYPE (rel->r_info); | |
10241 | r_symndx = ELF32_R_SYM (rel->r_info); | |
10242 | ||
10243 | if (r_symndx < symtab_hdr->sh_info) | |
10244 | h = NULL; | |
10245 | else | |
10246 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
10247 | ||
4608f3d9 | 10248 | dynamic_symbol = elf_xtensa_dynamic_symbol_p (h, info); |
e0001a05 NC |
10249 | |
10250 | if ((r_type == R_XTENSA_32 || r_type == R_XTENSA_PLT) | |
10251 | && (input_section->flags & SEC_ALLOC) != 0 | |
e15a8da9 MF |
10252 | && (dynamic_symbol |
10253 | || (bfd_link_pic (info) | |
10254 | && (!h || h->root.type != bfd_link_hash_undefweak)))) | |
e0001a05 | 10255 | { |
e0001a05 | 10256 | asection *srel; |
0a1b45a2 | 10257 | bool is_plt = false; |
e0001a05 | 10258 | |
e0001a05 NC |
10259 | if (dynamic_symbol && r_type == R_XTENSA_PLT) |
10260 | { | |
ce558b89 | 10261 | srel = htab->elf.srelplt; |
0a1b45a2 | 10262 | is_plt = true; |
e0001a05 NC |
10263 | } |
10264 | else | |
ce558b89 | 10265 | srel = htab->elf.srelgot; |
e0001a05 NC |
10266 | |
10267 | /* Reduce size of the .rela.* section by one reloc. */ | |
e0001a05 | 10268 | BFD_ASSERT (srel != NULL); |
eea6121a AM |
10269 | BFD_ASSERT (srel->size >= sizeof (Elf32_External_Rela)); |
10270 | srel->size -= sizeof (Elf32_External_Rela); | |
e0001a05 NC |
10271 | |
10272 | if (is_plt) | |
10273 | { | |
10274 | asection *splt, *sgotplt, *srelgot; | |
10275 | int reloc_index, chunk; | |
10276 | ||
10277 | /* Find the PLT reloc index of the entry being removed. This | |
10278 | is computed from the size of ".rela.plt". It is needed to | |
10279 | figure out which PLT chunk to resize. Usually "last index | |
10280 | = size - 1" since the index starts at zero, but in this | |
10281 | context, the size has just been decremented so there's no | |
10282 | need to subtract one. */ | |
eea6121a | 10283 | reloc_index = srel->size / sizeof (Elf32_External_Rela); |
e0001a05 NC |
10284 | |
10285 | chunk = reloc_index / PLT_ENTRIES_PER_CHUNK; | |
f0e6fdb2 BW |
10286 | splt = elf_xtensa_get_plt_section (info, chunk); |
10287 | sgotplt = elf_xtensa_get_gotplt_section (info, chunk); | |
e0001a05 NC |
10288 | BFD_ASSERT (splt != NULL && sgotplt != NULL); |
10289 | ||
10290 | /* Check if an entire PLT chunk has just been eliminated. */ | |
10291 | if (reloc_index % PLT_ENTRIES_PER_CHUNK == 0) | |
10292 | { | |
10293 | /* The two magic GOT entries for that chunk can go away. */ | |
ce558b89 | 10294 | srelgot = htab->elf.srelgot; |
e0001a05 NC |
10295 | BFD_ASSERT (srelgot != NULL); |
10296 | srelgot->reloc_count -= 2; | |
eea6121a AM |
10297 | srelgot->size -= 2 * sizeof (Elf32_External_Rela); |
10298 | sgotplt->size -= 8; | |
e0001a05 NC |
10299 | |
10300 | /* There should be only one entry left (and it will be | |
10301 | removed below). */ | |
eea6121a AM |
10302 | BFD_ASSERT (sgotplt->size == 4); |
10303 | BFD_ASSERT (splt->size == PLT_ENTRY_SIZE); | |
e0001a05 NC |
10304 | } |
10305 | ||
eea6121a AM |
10306 | BFD_ASSERT (sgotplt->size >= 4); |
10307 | BFD_ASSERT (splt->size >= PLT_ENTRY_SIZE); | |
e0001a05 | 10308 | |
eea6121a AM |
10309 | sgotplt->size -= 4; |
10310 | splt->size -= PLT_ENTRY_SIZE; | |
e0001a05 NC |
10311 | } |
10312 | } | |
10313 | } | |
10314 | ||
10315 | ||
43cd72b9 BW |
10316 | /* Take an r_rel and move it to another section. This usually |
10317 | requires extending the interal_relocation array and pinning it. If | |
10318 | the original r_rel is from the same BFD, we can complete this here. | |
10319 | Otherwise, we add a fix record to let the final link fix the | |
10320 | appropriate address. Contents and internal relocations for the | |
10321 | section must be pinned after calling this routine. */ | |
10322 | ||
0a1b45a2 | 10323 | static bool |
7fa3d080 BW |
10324 | move_literal (bfd *abfd, |
10325 | struct bfd_link_info *link_info, | |
10326 | asection *sec, | |
10327 | bfd_vma offset, | |
10328 | bfd_byte *contents, | |
10329 | xtensa_relax_info *relax_info, | |
10330 | Elf_Internal_Rela **internal_relocs_p, | |
10331 | const literal_value *lit) | |
43cd72b9 BW |
10332 | { |
10333 | Elf_Internal_Rela *new_relocs = NULL; | |
10334 | size_t new_relocs_count = 0; | |
10335 | Elf_Internal_Rela this_rela; | |
10336 | const r_reloc *r_rel; | |
10337 | ||
10338 | r_rel = &lit->r_rel; | |
10339 | BFD_ASSERT (elf_section_data (sec)->relocs == *internal_relocs_p); | |
10340 | ||
10341 | if (r_reloc_is_const (r_rel)) | |
10342 | bfd_put_32 (abfd, lit->value, contents + offset); | |
10343 | else | |
10344 | { | |
10345 | int r_type; | |
10346 | unsigned i; | |
43cd72b9 BW |
10347 | reloc_bfd_fix *fix; |
10348 | unsigned insert_at; | |
10349 | ||
10350 | r_type = ELF32_R_TYPE (r_rel->rela.r_info); | |
43cd72b9 BW |
10351 | |
10352 | /* This is the difficult case. We have to create a fix up. */ | |
10353 | this_rela.r_offset = offset; | |
10354 | this_rela.r_info = ELF32_R_INFO (0, r_type); | |
10355 | this_rela.r_addend = | |
10356 | r_rel->target_offset - r_reloc_get_target_offset (r_rel); | |
10357 | bfd_put_32 (abfd, lit->value, contents + offset); | |
10358 | ||
10359 | /* Currently, we cannot move relocations during a relocatable link. */ | |
0e1862bb | 10360 | BFD_ASSERT (!bfd_link_relocatable (link_info)); |
0f5f1638 | 10361 | fix = reloc_bfd_fix_init (sec, offset, r_type, |
43cd72b9 BW |
10362 | r_reloc_get_section (r_rel), |
10363 | r_rel->target_offset + r_rel->virtual_offset, | |
0a1b45a2 | 10364 | false); |
43cd72b9 BW |
10365 | /* We also need to mark that relocations are needed here. */ |
10366 | sec->flags |= SEC_RELOC; | |
10367 | ||
10368 | translate_reloc_bfd_fix (fix); | |
10369 | /* This fix has not yet been translated. */ | |
10370 | add_fix (sec, fix); | |
10371 | ||
10372 | /* Add the relocation. If we have already allocated our own | |
10373 | space for the relocations and we have room for more, then use | |
10374 | it. Otherwise, allocate new space and move the literals. */ | |
10375 | insert_at = sec->reloc_count; | |
10376 | for (i = 0; i < sec->reloc_count; ++i) | |
10377 | { | |
10378 | if (this_rela.r_offset < (*internal_relocs_p)[i].r_offset) | |
10379 | { | |
10380 | insert_at = i; | |
10381 | break; | |
10382 | } | |
10383 | } | |
10384 | ||
10385 | if (*internal_relocs_p != relax_info->allocated_relocs | |
10386 | || sec->reloc_count + 1 > relax_info->allocated_relocs_count) | |
10387 | { | |
10388 | BFD_ASSERT (relax_info->allocated_relocs == NULL | |
10389 | || sec->reloc_count == relax_info->relocs_count); | |
10390 | ||
68ffbac6 | 10391 | if (relax_info->allocated_relocs_count == 0) |
43cd72b9 BW |
10392 | new_relocs_count = (sec->reloc_count + 2) * 2; |
10393 | else | |
10394 | new_relocs_count = (relax_info->allocated_relocs_count + 2) * 2; | |
10395 | ||
10396 | new_relocs = (Elf_Internal_Rela *) | |
10397 | bfd_zmalloc (sizeof (Elf_Internal_Rela) * (new_relocs_count)); | |
10398 | if (!new_relocs) | |
0a1b45a2 | 10399 | return false; |
43cd72b9 BW |
10400 | |
10401 | /* We could handle this more quickly by finding the split point. */ | |
10402 | if (insert_at != 0) | |
10403 | memcpy (new_relocs, *internal_relocs_p, | |
10404 | insert_at * sizeof (Elf_Internal_Rela)); | |
10405 | ||
10406 | new_relocs[insert_at] = this_rela; | |
10407 | ||
10408 | if (insert_at != sec->reloc_count) | |
10409 | memcpy (new_relocs + insert_at + 1, | |
10410 | (*internal_relocs_p) + insert_at, | |
68ffbac6 | 10411 | (sec->reloc_count - insert_at) |
43cd72b9 BW |
10412 | * sizeof (Elf_Internal_Rela)); |
10413 | ||
10414 | if (*internal_relocs_p != relax_info->allocated_relocs) | |
10415 | { | |
10416 | /* The first time we re-allocate, we can only free the | |
10417 | old relocs if they were allocated with bfd_malloc. | |
10418 | This is not true when keep_memory is in effect. */ | |
10419 | if (!link_info->keep_memory) | |
10420 | free (*internal_relocs_p); | |
10421 | } | |
10422 | else | |
10423 | free (*internal_relocs_p); | |
10424 | relax_info->allocated_relocs = new_relocs; | |
10425 | relax_info->allocated_relocs_count = new_relocs_count; | |
10426 | elf_section_data (sec)->relocs = new_relocs; | |
10427 | sec->reloc_count++; | |
10428 | relax_info->relocs_count = sec->reloc_count; | |
10429 | *internal_relocs_p = new_relocs; | |
10430 | } | |
10431 | else | |
10432 | { | |
10433 | if (insert_at != sec->reloc_count) | |
10434 | { | |
10435 | unsigned idx; | |
10436 | for (idx = sec->reloc_count; idx > insert_at; idx--) | |
10437 | (*internal_relocs_p)[idx] = (*internal_relocs_p)[idx-1]; | |
10438 | } | |
10439 | (*internal_relocs_p)[insert_at] = this_rela; | |
10440 | sec->reloc_count++; | |
10441 | if (relax_info->allocated_relocs) | |
10442 | relax_info->relocs_count = sec->reloc_count; | |
10443 | } | |
10444 | } | |
0a1b45a2 | 10445 | return true; |
43cd72b9 BW |
10446 | } |
10447 | ||
10448 | ||
e0001a05 NC |
10449 | /* This is similar to relax_section except that when a target is moved, |
10450 | we shift addresses up. We also need to modify the size. This | |
10451 | algorithm does NOT allow for relocations into the middle of the | |
10452 | property sections. */ | |
10453 | ||
0a1b45a2 | 10454 | static bool |
7fa3d080 BW |
10455 | relax_property_section (bfd *abfd, |
10456 | asection *sec, | |
10457 | struct bfd_link_info *link_info) | |
e0001a05 NC |
10458 | { |
10459 | Elf_Internal_Rela *internal_relocs; | |
10460 | bfd_byte *contents; | |
1d25768e | 10461 | unsigned i; |
0a1b45a2 AM |
10462 | bool ok = true; |
10463 | bool is_full_prop_section; | |
43cd72b9 BW |
10464 | size_t last_zfill_target_offset = 0; |
10465 | asection *last_zfill_target_sec = NULL; | |
10466 | bfd_size_type sec_size; | |
1d25768e | 10467 | bfd_size_type entry_size; |
e0001a05 | 10468 | |
43cd72b9 | 10469 | sec_size = bfd_get_section_limit (abfd, sec); |
68ffbac6 | 10470 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
e0001a05 NC |
10471 | link_info->keep_memory); |
10472 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
43cd72b9 | 10473 | if (contents == NULL && sec_size != 0) |
e0001a05 | 10474 | { |
0a1b45a2 | 10475 | ok = false; |
e0001a05 NC |
10476 | goto error_return; |
10477 | } | |
10478 | ||
1d25768e BW |
10479 | is_full_prop_section = xtensa_is_proptable_section (sec); |
10480 | if (is_full_prop_section) | |
10481 | entry_size = 12; | |
10482 | else | |
10483 | entry_size = 8; | |
43cd72b9 BW |
10484 | |
10485 | if (internal_relocs) | |
e0001a05 | 10486 | { |
43cd72b9 | 10487 | for (i = 0; i < sec->reloc_count; i++) |
e0001a05 NC |
10488 | { |
10489 | Elf_Internal_Rela *irel; | |
10490 | xtensa_relax_info *target_relax_info; | |
e0001a05 NC |
10491 | unsigned r_type; |
10492 | asection *target_sec; | |
43cd72b9 BW |
10493 | literal_value val; |
10494 | bfd_byte *size_p, *flags_p; | |
e0001a05 NC |
10495 | |
10496 | /* Locally change the source address. | |
10497 | Translate the target to the new target address. | |
10498 | If it points to this section and has been removed, MOVE IT. | |
10499 | Also, don't forget to modify the associated SIZE at | |
10500 | (offset + 4). */ | |
10501 | ||
10502 | irel = &internal_relocs[i]; | |
10503 | r_type = ELF32_R_TYPE (irel->r_info); | |
10504 | if (r_type == R_XTENSA_NONE) | |
10505 | continue; | |
10506 | ||
43cd72b9 BW |
10507 | /* Find the literal value. */ |
10508 | r_reloc_init (&val.r_rel, abfd, irel, contents, sec_size); | |
10509 | size_p = &contents[irel->r_offset + 4]; | |
10510 | flags_p = NULL; | |
10511 | if (is_full_prop_section) | |
1d25768e BW |
10512 | flags_p = &contents[irel->r_offset + 8]; |
10513 | BFD_ASSERT (irel->r_offset + entry_size <= sec_size); | |
e0001a05 | 10514 | |
43cd72b9 | 10515 | target_sec = r_reloc_get_section (&val.r_rel); |
e0001a05 NC |
10516 | target_relax_info = get_xtensa_relax_info (target_sec); |
10517 | ||
10518 | if (target_relax_info | |
43cd72b9 BW |
10519 | && (target_relax_info->is_relaxable_literal_section |
10520 | || target_relax_info->is_relaxable_asm_section )) | |
e0001a05 NC |
10521 | { |
10522 | /* Translate the relocation's destination. */ | |
03669f1c BW |
10523 | bfd_vma old_offset = val.r_rel.target_offset; |
10524 | bfd_vma new_offset; | |
e0001a05 | 10525 | long old_size, new_size; |
071aa5c9 MF |
10526 | int removed_by_old_offset = |
10527 | removed_by_actions_map (&target_relax_info->action_list, | |
0a1b45a2 | 10528 | old_offset, false); |
071aa5c9 | 10529 | new_offset = old_offset - removed_by_old_offset; |
e0001a05 NC |
10530 | |
10531 | /* Assert that we are not out of bounds. */ | |
43cd72b9 | 10532 | old_size = bfd_get_32 (abfd, size_p); |
03669f1c | 10533 | new_size = old_size; |
43cd72b9 BW |
10534 | |
10535 | if (old_size == 0) | |
10536 | { | |
10537 | /* Only the first zero-sized unreachable entry is | |
10538 | allowed to expand. In this case the new offset | |
10539 | should be the offset before the fill and the new | |
10540 | size is the expansion size. For other zero-sized | |
10541 | entries the resulting size should be zero with an | |
10542 | offset before or after the fill address depending | |
10543 | on whether the expanding unreachable entry | |
10544 | preceeds it. */ | |
03669f1c BW |
10545 | if (last_zfill_target_sec == 0 |
10546 | || last_zfill_target_sec != target_sec | |
10547 | || last_zfill_target_offset != old_offset) | |
43cd72b9 | 10548 | { |
03669f1c BW |
10549 | bfd_vma new_end_offset = new_offset; |
10550 | ||
10551 | /* Recompute the new_offset, but this time don't | |
10552 | include any fill inserted by relaxation. */ | |
071aa5c9 MF |
10553 | removed_by_old_offset = |
10554 | removed_by_actions_map (&target_relax_info->action_list, | |
0a1b45a2 | 10555 | old_offset, true); |
071aa5c9 | 10556 | new_offset = old_offset - removed_by_old_offset; |
43cd72b9 BW |
10557 | |
10558 | /* If it is not unreachable and we have not yet | |
10559 | seen an unreachable at this address, place it | |
10560 | before the fill address. */ | |
03669f1c BW |
10561 | if (flags_p && (bfd_get_32 (abfd, flags_p) |
10562 | & XTENSA_PROP_UNREACHABLE) != 0) | |
43cd72b9 | 10563 | { |
03669f1c BW |
10564 | new_size = new_end_offset - new_offset; |
10565 | ||
43cd72b9 | 10566 | last_zfill_target_sec = target_sec; |
03669f1c | 10567 | last_zfill_target_offset = old_offset; |
43cd72b9 BW |
10568 | } |
10569 | } | |
10570 | } | |
10571 | else | |
071aa5c9 MF |
10572 | { |
10573 | int removed_by_old_offset_size = | |
10574 | removed_by_actions_map (&target_relax_info->action_list, | |
0a1b45a2 | 10575 | old_offset + old_size, true); |
071aa5c9 MF |
10576 | new_size -= removed_by_old_offset_size - removed_by_old_offset; |
10577 | } | |
43cd72b9 | 10578 | |
e0001a05 NC |
10579 | if (new_size != old_size) |
10580 | { | |
10581 | bfd_put_32 (abfd, new_size, size_p); | |
10582 | pin_contents (sec, contents); | |
10583 | } | |
43cd72b9 | 10584 | |
03669f1c | 10585 | if (new_offset != old_offset) |
e0001a05 | 10586 | { |
03669f1c | 10587 | bfd_vma diff = new_offset - old_offset; |
e0001a05 NC |
10588 | irel->r_addend += diff; |
10589 | pin_internal_relocs (sec, internal_relocs); | |
10590 | } | |
10591 | } | |
10592 | } | |
10593 | } | |
10594 | ||
10595 | /* Combine adjacent property table entries. This is also done in | |
10596 | finish_dynamic_sections() but at that point it's too late to | |
10597 | reclaim the space in the output section, so we do this twice. */ | |
10598 | ||
0e1862bb | 10599 | if (internal_relocs && (!bfd_link_relocatable (link_info) |
1d25768e | 10600 | || xtensa_is_littable_section (sec))) |
e0001a05 NC |
10601 | { |
10602 | Elf_Internal_Rela *last_irel = NULL; | |
1d25768e | 10603 | Elf_Internal_Rela *irel, *next_rel, *rel_end; |
e0001a05 | 10604 | int removed_bytes = 0; |
1d25768e | 10605 | bfd_vma offset; |
43cd72b9 BW |
10606 | flagword predef_flags; |
10607 | ||
43cd72b9 | 10608 | predef_flags = xtensa_get_property_predef_flags (sec); |
e0001a05 | 10609 | |
1d25768e | 10610 | /* Walk over memory and relocations at the same time. |
07d6d2b8 | 10611 | This REQUIRES that the internal_relocs be sorted by offset. */ |
e0001a05 NC |
10612 | qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), |
10613 | internal_reloc_compare); | |
e0001a05 NC |
10614 | |
10615 | pin_internal_relocs (sec, internal_relocs); | |
10616 | pin_contents (sec, contents); | |
10617 | ||
1d25768e BW |
10618 | next_rel = internal_relocs; |
10619 | rel_end = internal_relocs + sec->reloc_count; | |
10620 | ||
a3ef2d63 | 10621 | BFD_ASSERT (sec->size % entry_size == 0); |
e0001a05 | 10622 | |
a3ef2d63 | 10623 | for (offset = 0; offset < sec->size; offset += entry_size) |
e0001a05 | 10624 | { |
1d25768e | 10625 | Elf_Internal_Rela *offset_rel, *extra_rel; |
e0001a05 | 10626 | bfd_vma bytes_to_remove, size, actual_offset; |
0a1b45a2 | 10627 | bool remove_this_rel; |
43cd72b9 | 10628 | flagword flags; |
e0001a05 | 10629 | |
1d25768e BW |
10630 | /* Find the first relocation for the entry at the current offset. |
10631 | Adjust the offsets of any extra relocations for the previous | |
10632 | entry. */ | |
10633 | offset_rel = NULL; | |
10634 | if (next_rel) | |
10635 | { | |
10636 | for (irel = next_rel; irel < rel_end; irel++) | |
10637 | { | |
10638 | if ((irel->r_offset == offset | |
10639 | && ELF32_R_TYPE (irel->r_info) != R_XTENSA_NONE) | |
10640 | || irel->r_offset > offset) | |
10641 | { | |
10642 | offset_rel = irel; | |
10643 | break; | |
10644 | } | |
10645 | irel->r_offset -= removed_bytes; | |
1d25768e BW |
10646 | } |
10647 | } | |
e0001a05 | 10648 | |
1d25768e BW |
10649 | /* Find the next relocation (if there are any left). */ |
10650 | extra_rel = NULL; | |
10651 | if (offset_rel) | |
e0001a05 | 10652 | { |
1d25768e | 10653 | for (irel = offset_rel + 1; irel < rel_end; irel++) |
e0001a05 | 10654 | { |
1d25768e BW |
10655 | if (ELF32_R_TYPE (irel->r_info) != R_XTENSA_NONE) |
10656 | { | |
10657 | extra_rel = irel; | |
10658 | break; | |
10659 | } | |
e0001a05 | 10660 | } |
e0001a05 NC |
10661 | } |
10662 | ||
1d25768e BW |
10663 | /* Check if there are relocations on the current entry. There |
10664 | should usually be a relocation on the offset field. If there | |
10665 | are relocations on the size or flags, then we can't optimize | |
10666 | this entry. Also, find the next relocation to examine on the | |
10667 | next iteration. */ | |
10668 | if (offset_rel) | |
e0001a05 | 10669 | { |
1d25768e | 10670 | if (offset_rel->r_offset >= offset + entry_size) |
e0001a05 | 10671 | { |
1d25768e BW |
10672 | next_rel = offset_rel; |
10673 | /* There are no relocations on the current entry, but we | |
10674 | might still be able to remove it if the size is zero. */ | |
10675 | offset_rel = NULL; | |
10676 | } | |
10677 | else if (offset_rel->r_offset > offset | |
10678 | || (extra_rel | |
10679 | && extra_rel->r_offset < offset + entry_size)) | |
10680 | { | |
10681 | /* There is a relocation on the size or flags, so we can't | |
10682 | do anything with this entry. Continue with the next. */ | |
10683 | next_rel = offset_rel; | |
10684 | continue; | |
10685 | } | |
10686 | else | |
10687 | { | |
10688 | BFD_ASSERT (offset_rel->r_offset == offset); | |
10689 | offset_rel->r_offset -= removed_bytes; | |
10690 | next_rel = offset_rel + 1; | |
e0001a05 | 10691 | } |
e0001a05 | 10692 | } |
1d25768e BW |
10693 | else |
10694 | next_rel = NULL; | |
e0001a05 | 10695 | |
0a1b45a2 | 10696 | remove_this_rel = false; |
e0001a05 NC |
10697 | bytes_to_remove = 0; |
10698 | actual_offset = offset - removed_bytes; | |
10699 | size = bfd_get_32 (abfd, &contents[actual_offset + 4]); | |
10700 | ||
68ffbac6 | 10701 | if (is_full_prop_section) |
43cd72b9 BW |
10702 | flags = bfd_get_32 (abfd, &contents[actual_offset + 8]); |
10703 | else | |
10704 | flags = predef_flags; | |
10705 | ||
1d25768e BW |
10706 | if (size == 0 |
10707 | && (flags & XTENSA_PROP_ALIGN) == 0 | |
10708 | && (flags & XTENSA_PROP_UNREACHABLE) == 0) | |
e0001a05 | 10709 | { |
43cd72b9 BW |
10710 | /* Always remove entries with zero size and no alignment. */ |
10711 | bytes_to_remove = entry_size; | |
1d25768e | 10712 | if (offset_rel) |
0a1b45a2 | 10713 | remove_this_rel = true; |
e0001a05 | 10714 | } |
1d25768e BW |
10715 | else if (offset_rel |
10716 | && ELF32_R_TYPE (offset_rel->r_info) == R_XTENSA_32) | |
e0001a05 | 10717 | { |
1d25768e | 10718 | if (last_irel) |
e0001a05 | 10719 | { |
1d25768e BW |
10720 | flagword old_flags; |
10721 | bfd_vma old_size = | |
10722 | bfd_get_32 (abfd, &contents[last_irel->r_offset + 4]); | |
10723 | bfd_vma old_address = | |
10724 | (last_irel->r_addend | |
10725 | + bfd_get_32 (abfd, &contents[last_irel->r_offset])); | |
10726 | bfd_vma new_address = | |
10727 | (offset_rel->r_addend | |
10728 | + bfd_get_32 (abfd, &contents[actual_offset])); | |
68ffbac6 | 10729 | if (is_full_prop_section) |
1d25768e BW |
10730 | old_flags = bfd_get_32 |
10731 | (abfd, &contents[last_irel->r_offset + 8]); | |
10732 | else | |
10733 | old_flags = predef_flags; | |
10734 | ||
10735 | if ((ELF32_R_SYM (offset_rel->r_info) | |
10736 | == ELF32_R_SYM (last_irel->r_info)) | |
10737 | && old_address + old_size == new_address | |
10738 | && old_flags == flags | |
10739 | && (old_flags & XTENSA_PROP_INSN_BRANCH_TARGET) == 0 | |
10740 | && (old_flags & XTENSA_PROP_INSN_LOOP_TARGET) == 0) | |
e0001a05 | 10741 | { |
1d25768e BW |
10742 | /* Fix the old size. */ |
10743 | bfd_put_32 (abfd, old_size + size, | |
10744 | &contents[last_irel->r_offset + 4]); | |
10745 | bytes_to_remove = entry_size; | |
0a1b45a2 | 10746 | remove_this_rel = true; |
e0001a05 NC |
10747 | } |
10748 | else | |
1d25768e | 10749 | last_irel = offset_rel; |
e0001a05 | 10750 | } |
1d25768e BW |
10751 | else |
10752 | last_irel = offset_rel; | |
e0001a05 NC |
10753 | } |
10754 | ||
1d25768e | 10755 | if (remove_this_rel) |
e0001a05 | 10756 | { |
1d25768e | 10757 | offset_rel->r_info = ELF32_R_INFO (0, R_XTENSA_NONE); |
3df502ae | 10758 | offset_rel->r_offset = 0; |
e0001a05 NC |
10759 | } |
10760 | ||
10761 | if (bytes_to_remove != 0) | |
10762 | { | |
10763 | removed_bytes += bytes_to_remove; | |
a3ef2d63 | 10764 | if (offset + bytes_to_remove < sec->size) |
e0001a05 | 10765 | memmove (&contents[actual_offset], |
43cd72b9 | 10766 | &contents[actual_offset + bytes_to_remove], |
a3ef2d63 | 10767 | sec->size - offset - bytes_to_remove); |
e0001a05 NC |
10768 | } |
10769 | } | |
10770 | ||
43cd72b9 | 10771 | if (removed_bytes) |
e0001a05 | 10772 | { |
1d25768e BW |
10773 | /* Fix up any extra relocations on the last entry. */ |
10774 | for (irel = next_rel; irel < rel_end; irel++) | |
10775 | irel->r_offset -= removed_bytes; | |
10776 | ||
e0001a05 | 10777 | /* Clear the removed bytes. */ |
a3ef2d63 | 10778 | memset (&contents[sec->size - removed_bytes], 0, removed_bytes); |
e0001a05 | 10779 | |
a3ef2d63 BW |
10780 | if (sec->rawsize == 0) |
10781 | sec->rawsize = sec->size; | |
10782 | sec->size -= removed_bytes; | |
e901de89 BW |
10783 | |
10784 | if (xtensa_is_littable_section (sec)) | |
10785 | { | |
f0e6fdb2 BW |
10786 | asection *sgotloc = elf_xtensa_hash_table (link_info)->sgotloc; |
10787 | if (sgotloc) | |
10788 | sgotloc->size -= removed_bytes; | |
e901de89 | 10789 | } |
e0001a05 NC |
10790 | } |
10791 | } | |
e901de89 | 10792 | |
e0001a05 NC |
10793 | error_return: |
10794 | release_internal_relocs (sec, internal_relocs); | |
10795 | release_contents (sec, contents); | |
10796 | return ok; | |
10797 | } | |
10798 | ||
10799 | \f | |
10800 | /* Third relaxation pass. */ | |
10801 | ||
10802 | /* Change symbol values to account for removed literals. */ | |
10803 | ||
0a1b45a2 | 10804 | bool |
7fa3d080 | 10805 | relax_section_symbols (bfd *abfd, asection *sec) |
e0001a05 NC |
10806 | { |
10807 | xtensa_relax_info *relax_info; | |
10808 | unsigned int sec_shndx; | |
10809 | Elf_Internal_Shdr *symtab_hdr; | |
10810 | Elf_Internal_Sym *isymbuf; | |
10811 | unsigned i, num_syms, num_locals; | |
10812 | ||
10813 | relax_info = get_xtensa_relax_info (sec); | |
10814 | BFD_ASSERT (relax_info); | |
10815 | ||
43cd72b9 BW |
10816 | if (!relax_info->is_relaxable_literal_section |
10817 | && !relax_info->is_relaxable_asm_section) | |
0a1b45a2 | 10818 | return true; |
e0001a05 NC |
10819 | |
10820 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
10821 | ||
10822 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
10823 | isymbuf = retrieve_local_syms (abfd); | |
10824 | ||
10825 | num_syms = symtab_hdr->sh_size / sizeof (Elf32_External_Sym); | |
10826 | num_locals = symtab_hdr->sh_info; | |
10827 | ||
10828 | /* Adjust the local symbols defined in this section. */ | |
10829 | for (i = 0; i < num_locals; i++) | |
10830 | { | |
10831 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
10832 | ||
10833 | if (isym->st_shndx == sec_shndx) | |
10834 | { | |
03669f1c | 10835 | bfd_vma orig_addr = isym->st_value; |
071aa5c9 | 10836 | int removed = removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10837 | orig_addr, false); |
43cd72b9 | 10838 | |
071aa5c9 | 10839 | isym->st_value -= removed; |
03669f1c BW |
10840 | if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC) |
10841 | isym->st_size -= | |
071aa5c9 | 10842 | removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10843 | orig_addr + isym->st_size, false) - |
071aa5c9 | 10844 | removed; |
e0001a05 NC |
10845 | } |
10846 | } | |
10847 | ||
10848 | /* Now adjust the global symbols defined in this section. */ | |
10849 | for (i = 0; i < (num_syms - num_locals); i++) | |
10850 | { | |
10851 | struct elf_link_hash_entry *sym_hash; | |
10852 | ||
10853 | sym_hash = elf_sym_hashes (abfd)[i]; | |
10854 | ||
10855 | if (sym_hash->root.type == bfd_link_hash_warning) | |
10856 | sym_hash = (struct elf_link_hash_entry *) sym_hash->root.u.i.link; | |
10857 | ||
10858 | if ((sym_hash->root.type == bfd_link_hash_defined | |
10859 | || sym_hash->root.type == bfd_link_hash_defweak) | |
10860 | && sym_hash->root.u.def.section == sec) | |
10861 | { | |
03669f1c | 10862 | bfd_vma orig_addr = sym_hash->root.u.def.value; |
071aa5c9 | 10863 | int removed = removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10864 | orig_addr, false); |
43cd72b9 | 10865 | |
071aa5c9 | 10866 | sym_hash->root.u.def.value -= removed; |
43cd72b9 | 10867 | |
03669f1c BW |
10868 | if (sym_hash->type == STT_FUNC) |
10869 | sym_hash->size -= | |
071aa5c9 | 10870 | removed_by_actions_map (&relax_info->action_list, |
0a1b45a2 | 10871 | orig_addr + sym_hash->size, false) - |
071aa5c9 | 10872 | removed; |
e0001a05 NC |
10873 | } |
10874 | } | |
10875 | ||
0a1b45a2 | 10876 | return true; |
e0001a05 NC |
10877 | } |
10878 | ||
10879 | \f | |
10880 | /* "Fix" handling functions, called while performing relocations. */ | |
10881 | ||
0a1b45a2 | 10882 | static bool |
7fa3d080 BW |
10883 | do_fix_for_relocatable_link (Elf_Internal_Rela *rel, |
10884 | bfd *input_bfd, | |
10885 | asection *input_section, | |
10886 | bfd_byte *contents) | |
e0001a05 NC |
10887 | { |
10888 | r_reloc r_rel; | |
10889 | asection *sec, *old_sec; | |
10890 | bfd_vma old_offset; | |
10891 | int r_type = ELF32_R_TYPE (rel->r_info); | |
e0001a05 NC |
10892 | reloc_bfd_fix *fix; |
10893 | ||
10894 | if (r_type == R_XTENSA_NONE) | |
0a1b45a2 | 10895 | return true; |
e0001a05 | 10896 | |
43cd72b9 BW |
10897 | fix = get_bfd_fix (input_section, rel->r_offset, r_type); |
10898 | if (!fix) | |
0a1b45a2 | 10899 | return true; |
e0001a05 | 10900 | |
43cd72b9 BW |
10901 | r_reloc_init (&r_rel, input_bfd, rel, contents, |
10902 | bfd_get_section_limit (input_bfd, input_section)); | |
e0001a05 | 10903 | old_sec = r_reloc_get_section (&r_rel); |
43cd72b9 BW |
10904 | old_offset = r_rel.target_offset; |
10905 | ||
10906 | if (!old_sec || !r_reloc_is_defined (&r_rel)) | |
e0001a05 | 10907 | { |
43cd72b9 BW |
10908 | if (r_type != R_XTENSA_ASM_EXPAND) |
10909 | { | |
4eca0228 | 10910 | _bfd_error_handler |
695344c0 | 10911 | /* xgettext:c-format */ |
2dcf00ce AM |
10912 | (_("%pB(%pA+%#" PRIx64 "): unexpected fix for %s relocation"), |
10913 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
43cd72b9 | 10914 | elf_howto_table[r_type].name); |
0a1b45a2 | 10915 | return false; |
43cd72b9 | 10916 | } |
e0001a05 NC |
10917 | /* Leave it be. Resolution will happen in a later stage. */ |
10918 | } | |
10919 | else | |
10920 | { | |
10921 | sec = fix->target_sec; | |
10922 | rel->r_addend += ((sec->output_offset + fix->target_offset) | |
10923 | - (old_sec->output_offset + old_offset)); | |
10924 | } | |
0a1b45a2 | 10925 | return true; |
e0001a05 NC |
10926 | } |
10927 | ||
10928 | ||
10929 | static void | |
7fa3d080 BW |
10930 | do_fix_for_final_link (Elf_Internal_Rela *rel, |
10931 | bfd *input_bfd, | |
10932 | asection *input_section, | |
10933 | bfd_byte *contents, | |
10934 | bfd_vma *relocationp) | |
e0001a05 NC |
10935 | { |
10936 | asection *sec; | |
10937 | int r_type = ELF32_R_TYPE (rel->r_info); | |
e0001a05 | 10938 | reloc_bfd_fix *fix; |
43cd72b9 | 10939 | bfd_vma fixup_diff; |
e0001a05 NC |
10940 | |
10941 | if (r_type == R_XTENSA_NONE) | |
10942 | return; | |
10943 | ||
43cd72b9 BW |
10944 | fix = get_bfd_fix (input_section, rel->r_offset, r_type); |
10945 | if (!fix) | |
e0001a05 NC |
10946 | return; |
10947 | ||
10948 | sec = fix->target_sec; | |
43cd72b9 BW |
10949 | |
10950 | fixup_diff = rel->r_addend; | |
10951 | if (elf_howto_table[fix->src_type].partial_inplace) | |
10952 | { | |
10953 | bfd_vma inplace_val; | |
10954 | BFD_ASSERT (fix->src_offset | |
10955 | < bfd_get_section_limit (input_bfd, input_section)); | |
10956 | inplace_val = bfd_get_32 (input_bfd, &contents[fix->src_offset]); | |
10957 | fixup_diff += inplace_val; | |
10958 | } | |
10959 | ||
e0001a05 NC |
10960 | *relocationp = (sec->output_section->vma |
10961 | + sec->output_offset | |
43cd72b9 | 10962 | + fix->target_offset - fixup_diff); |
e0001a05 NC |
10963 | } |
10964 | ||
10965 | \f | |
10966 | /* Miscellaneous utility functions.... */ | |
10967 | ||
10968 | static asection * | |
f0e6fdb2 | 10969 | elf_xtensa_get_plt_section (struct bfd_link_info *info, int chunk) |
e0001a05 | 10970 | { |
f0e6fdb2 | 10971 | bfd *dynobj; |
0bae9e9e | 10972 | char plt_name[17]; |
e0001a05 NC |
10973 | |
10974 | if (chunk == 0) | |
ce558b89 | 10975 | return elf_hash_table (info)->splt; |
e0001a05 | 10976 | |
f0e6fdb2 | 10977 | dynobj = elf_hash_table (info)->dynobj; |
e0001a05 | 10978 | sprintf (plt_name, ".plt.%u", chunk); |
3d4d4302 | 10979 | return bfd_get_linker_section (dynobj, plt_name); |
e0001a05 NC |
10980 | } |
10981 | ||
10982 | ||
10983 | static asection * | |
f0e6fdb2 | 10984 | elf_xtensa_get_gotplt_section (struct bfd_link_info *info, int chunk) |
e0001a05 | 10985 | { |
f0e6fdb2 | 10986 | bfd *dynobj; |
0bae9e9e | 10987 | char got_name[21]; |
e0001a05 NC |
10988 | |
10989 | if (chunk == 0) | |
ce558b89 | 10990 | return elf_hash_table (info)->sgotplt; |
e0001a05 | 10991 | |
f0e6fdb2 | 10992 | dynobj = elf_hash_table (info)->dynobj; |
e0001a05 | 10993 | sprintf (got_name, ".got.plt.%u", chunk); |
3d4d4302 | 10994 | return bfd_get_linker_section (dynobj, got_name); |
e0001a05 NC |
10995 | } |
10996 | ||
10997 | ||
10998 | /* Get the input section for a given symbol index. | |
10999 | If the symbol is: | |
11000 | . a section symbol, return the section; | |
11001 | . a common symbol, return the common section; | |
11002 | . an undefined symbol, return the undefined section; | |
11003 | . an indirect symbol, follow the links; | |
11004 | . an absolute value, return the absolute section. */ | |
11005 | ||
11006 | static asection * | |
7fa3d080 | 11007 | get_elf_r_symndx_section (bfd *abfd, unsigned long r_symndx) |
e0001a05 NC |
11008 | { |
11009 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
11010 | asection *target_sec = NULL; | |
43cd72b9 | 11011 | if (r_symndx < symtab_hdr->sh_info) |
e0001a05 NC |
11012 | { |
11013 | Elf_Internal_Sym *isymbuf; | |
11014 | unsigned int section_index; | |
11015 | ||
11016 | isymbuf = retrieve_local_syms (abfd); | |
11017 | section_index = isymbuf[r_symndx].st_shndx; | |
11018 | ||
11019 | if (section_index == SHN_UNDEF) | |
11020 | target_sec = bfd_und_section_ptr; | |
e0001a05 NC |
11021 | else if (section_index == SHN_ABS) |
11022 | target_sec = bfd_abs_section_ptr; | |
11023 | else if (section_index == SHN_COMMON) | |
11024 | target_sec = bfd_com_section_ptr; | |
43cd72b9 | 11025 | else |
cb33740c | 11026 | target_sec = bfd_section_from_elf_index (abfd, section_index); |
e0001a05 NC |
11027 | } |
11028 | else | |
11029 | { | |
11030 | unsigned long indx = r_symndx - symtab_hdr->sh_info; | |
11031 | struct elf_link_hash_entry *h = elf_sym_hashes (abfd)[indx]; | |
11032 | ||
11033 | while (h->root.type == bfd_link_hash_indirect | |
07d6d2b8 AM |
11034 | || h->root.type == bfd_link_hash_warning) |
11035 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
e0001a05 NC |
11036 | |
11037 | switch (h->root.type) | |
11038 | { | |
11039 | case bfd_link_hash_defined: | |
11040 | case bfd_link_hash_defweak: | |
11041 | target_sec = h->root.u.def.section; | |
11042 | break; | |
11043 | case bfd_link_hash_common: | |
11044 | target_sec = bfd_com_section_ptr; | |
11045 | break; | |
11046 | case bfd_link_hash_undefined: | |
11047 | case bfd_link_hash_undefweak: | |
11048 | target_sec = bfd_und_section_ptr; | |
11049 | break; | |
11050 | default: /* New indirect warning. */ | |
11051 | target_sec = bfd_und_section_ptr; | |
11052 | break; | |
11053 | } | |
11054 | } | |
11055 | return target_sec; | |
11056 | } | |
11057 | ||
11058 | ||
11059 | static struct elf_link_hash_entry * | |
7fa3d080 | 11060 | get_elf_r_symndx_hash_entry (bfd *abfd, unsigned long r_symndx) |
e0001a05 NC |
11061 | { |
11062 | unsigned long indx; | |
11063 | struct elf_link_hash_entry *h; | |
11064 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
11065 | ||
11066 | if (r_symndx < symtab_hdr->sh_info) | |
11067 | return NULL; | |
43cd72b9 | 11068 | |
e0001a05 NC |
11069 | indx = r_symndx - symtab_hdr->sh_info; |
11070 | h = elf_sym_hashes (abfd)[indx]; | |
11071 | while (h->root.type == bfd_link_hash_indirect | |
11072 | || h->root.type == bfd_link_hash_warning) | |
11073 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
11074 | return h; | |
11075 | } | |
11076 | ||
11077 | ||
11078 | /* Get the section-relative offset for a symbol number. */ | |
11079 | ||
11080 | static bfd_vma | |
7fa3d080 | 11081 | get_elf_r_symndx_offset (bfd *abfd, unsigned long r_symndx) |
e0001a05 NC |
11082 | { |
11083 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
11084 | bfd_vma offset = 0; | |
11085 | ||
43cd72b9 | 11086 | if (r_symndx < symtab_hdr->sh_info) |
e0001a05 NC |
11087 | { |
11088 | Elf_Internal_Sym *isymbuf; | |
11089 | isymbuf = retrieve_local_syms (abfd); | |
11090 | offset = isymbuf[r_symndx].st_value; | |
11091 | } | |
11092 | else | |
11093 | { | |
11094 | unsigned long indx = r_symndx - symtab_hdr->sh_info; | |
11095 | struct elf_link_hash_entry *h = | |
11096 | elf_sym_hashes (abfd)[indx]; | |
11097 | ||
11098 | while (h->root.type == bfd_link_hash_indirect | |
07d6d2b8 | 11099 | || h->root.type == bfd_link_hash_warning) |
e0001a05 NC |
11100 | h = (struct elf_link_hash_entry *) h->root.u.i.link; |
11101 | if (h->root.type == bfd_link_hash_defined | |
07d6d2b8 | 11102 | || h->root.type == bfd_link_hash_defweak) |
e0001a05 NC |
11103 | offset = h->root.u.def.value; |
11104 | } | |
11105 | return offset; | |
11106 | } | |
11107 | ||
11108 | ||
0a1b45a2 | 11109 | static bool |
7fa3d080 | 11110 | is_reloc_sym_weak (bfd *abfd, Elf_Internal_Rela *rel) |
43cd72b9 BW |
11111 | { |
11112 | unsigned long r_symndx = ELF32_R_SYM (rel->r_info); | |
11113 | struct elf_link_hash_entry *h; | |
11114 | ||
11115 | h = get_elf_r_symndx_hash_entry (abfd, r_symndx); | |
11116 | if (h && h->root.type == bfd_link_hash_defweak) | |
0a1b45a2 AM |
11117 | return true; |
11118 | return false; | |
43cd72b9 BW |
11119 | } |
11120 | ||
11121 | ||
0a1b45a2 | 11122 | static bool |
7fa3d080 BW |
11123 | pcrel_reloc_fits (xtensa_opcode opc, |
11124 | int opnd, | |
11125 | bfd_vma self_address, | |
11126 | bfd_vma dest_address) | |
e0001a05 | 11127 | { |
43cd72b9 BW |
11128 | xtensa_isa isa = xtensa_default_isa; |
11129 | uint32 valp = dest_address; | |
11130 | if (xtensa_operand_do_reloc (isa, opc, opnd, &valp, self_address) | |
11131 | || xtensa_operand_encode (isa, opc, opnd, &valp)) | |
0a1b45a2 AM |
11132 | return false; |
11133 | return true; | |
e0001a05 NC |
11134 | } |
11135 | ||
11136 | ||
0a1b45a2 | 11137 | static bool |
7fa3d080 | 11138 | xtensa_is_property_section (asection *sec) |
e0001a05 | 11139 | { |
1d25768e BW |
11140 | if (xtensa_is_insntable_section (sec) |
11141 | || xtensa_is_littable_section (sec) | |
11142 | || xtensa_is_proptable_section (sec)) | |
0a1b45a2 | 11143 | return true; |
e901de89 | 11144 | |
0a1b45a2 | 11145 | return false; |
1d25768e BW |
11146 | } |
11147 | ||
11148 | ||
0a1b45a2 | 11149 | static bool |
1d25768e BW |
11150 | xtensa_is_insntable_section (asection *sec) |
11151 | { | |
08dedd66 ML |
11152 | if (startswith (sec->name, XTENSA_INSN_SEC_NAME) |
11153 | || startswith (sec->name, ".gnu.linkonce.x.")) | |
0a1b45a2 | 11154 | return true; |
e901de89 | 11155 | |
0a1b45a2 | 11156 | return false; |
e901de89 BW |
11157 | } |
11158 | ||
11159 | ||
0a1b45a2 | 11160 | static bool |
7fa3d080 | 11161 | xtensa_is_littable_section (asection *sec) |
e901de89 | 11162 | { |
08dedd66 ML |
11163 | if (startswith (sec->name, XTENSA_LIT_SEC_NAME) |
11164 | || startswith (sec->name, ".gnu.linkonce.p.")) | |
0a1b45a2 | 11165 | return true; |
e901de89 | 11166 | |
0a1b45a2 | 11167 | return false; |
1d25768e BW |
11168 | } |
11169 | ||
11170 | ||
0a1b45a2 | 11171 | static bool |
1d25768e BW |
11172 | xtensa_is_proptable_section (asection *sec) |
11173 | { | |
08dedd66 ML |
11174 | if (startswith (sec->name, XTENSA_PROP_SEC_NAME) |
11175 | || startswith (sec->name, ".gnu.linkonce.prop.")) | |
0a1b45a2 | 11176 | return true; |
e0001a05 | 11177 | |
0a1b45a2 | 11178 | return false; |
e0001a05 NC |
11179 | } |
11180 | ||
11181 | ||
43cd72b9 | 11182 | static int |
7fa3d080 | 11183 | internal_reloc_compare (const void *ap, const void *bp) |
e0001a05 | 11184 | { |
43cd72b9 BW |
11185 | const Elf_Internal_Rela *a = (const Elf_Internal_Rela *) ap; |
11186 | const Elf_Internal_Rela *b = (const Elf_Internal_Rela *) bp; | |
11187 | ||
11188 | if (a->r_offset != b->r_offset) | |
11189 | return (a->r_offset - b->r_offset); | |
11190 | ||
11191 | /* We don't need to sort on these criteria for correctness, | |
11192 | but enforcing a more strict ordering prevents unstable qsort | |
11193 | from behaving differently with different implementations. | |
11194 | Without the code below we get correct but different results | |
11195 | on Solaris 2.7 and 2.8. We would like to always produce the | |
11196 | same results no matter the host. */ | |
11197 | ||
11198 | if (a->r_info != b->r_info) | |
11199 | return (a->r_info - b->r_info); | |
11200 | ||
11201 | return (a->r_addend - b->r_addend); | |
e0001a05 NC |
11202 | } |
11203 | ||
11204 | ||
11205 | static int | |
7fa3d080 | 11206 | internal_reloc_matches (const void *ap, const void *bp) |
e0001a05 NC |
11207 | { |
11208 | const Elf_Internal_Rela *a = (const Elf_Internal_Rela *) ap; | |
11209 | const Elf_Internal_Rela *b = (const Elf_Internal_Rela *) bp; | |
11210 | ||
43cd72b9 BW |
11211 | /* Check if one entry overlaps with the other; this shouldn't happen |
11212 | except when searching for a match. */ | |
e0001a05 NC |
11213 | return (a->r_offset - b->r_offset); |
11214 | } | |
11215 | ||
11216 | ||
74869ac7 BW |
11217 | /* Predicate function used to look up a section in a particular group. */ |
11218 | ||
0a1b45a2 | 11219 | static bool |
74869ac7 BW |
11220 | match_section_group (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, void *inf) |
11221 | { | |
11222 | const char *gname = inf; | |
11223 | const char *group_name = elf_group_name (sec); | |
68ffbac6 | 11224 | |
74869ac7 BW |
11225 | return (group_name == gname |
11226 | || (group_name != NULL | |
11227 | && gname != NULL | |
11228 | && strcmp (group_name, gname) == 0)); | |
11229 | } | |
11230 | ||
11231 | ||
8255c61b MF |
11232 | static char * |
11233 | xtensa_add_names (const char *base, const char *suffix) | |
11234 | { | |
11235 | if (suffix) | |
11236 | { | |
11237 | size_t base_len = strlen (base); | |
11238 | size_t suffix_len = strlen (suffix); | |
11239 | char *str = bfd_malloc (base_len + suffix_len + 1); | |
11240 | ||
11241 | memcpy (str, base, base_len); | |
11242 | memcpy (str + base_len, suffix, suffix_len + 1); | |
11243 | return str; | |
11244 | } | |
11245 | else | |
11246 | { | |
11247 | return strdup (base); | |
11248 | } | |
11249 | } | |
11250 | ||
1d25768e BW |
11251 | static int linkonce_len = sizeof (".gnu.linkonce.") - 1; |
11252 | ||
51c8ebc1 | 11253 | static char * |
8255c61b | 11254 | xtensa_property_section_name (asection *sec, const char *base_name, |
0a1b45a2 | 11255 | bool separate_sections) |
e0001a05 | 11256 | { |
74869ac7 BW |
11257 | const char *suffix, *group_name; |
11258 | char *prop_sec_name; | |
74869ac7 BW |
11259 | |
11260 | group_name = elf_group_name (sec); | |
11261 | if (group_name) | |
11262 | { | |
11263 | suffix = strrchr (sec->name, '.'); | |
11264 | if (suffix == sec->name) | |
11265 | suffix = 0; | |
8255c61b | 11266 | prop_sec_name = xtensa_add_names (base_name, suffix); |
74869ac7 | 11267 | } |
3f3328b8 | 11268 | else if (startswith (sec->name, ".gnu.linkonce.")) |
e0001a05 | 11269 | { |
43cd72b9 | 11270 | char *linkonce_kind = 0; |
b614a702 | 11271 | |
68ffbac6 | 11272 | if (strcmp (base_name, XTENSA_INSN_SEC_NAME) == 0) |
7db48a12 | 11273 | linkonce_kind = "x."; |
68ffbac6 | 11274 | else if (strcmp (base_name, XTENSA_LIT_SEC_NAME) == 0) |
7db48a12 | 11275 | linkonce_kind = "p."; |
43cd72b9 BW |
11276 | else if (strcmp (base_name, XTENSA_PROP_SEC_NAME) == 0) |
11277 | linkonce_kind = "prop."; | |
e0001a05 | 11278 | else |
b614a702 BW |
11279 | abort (); |
11280 | ||
43cd72b9 BW |
11281 | prop_sec_name = (char *) bfd_malloc (strlen (sec->name) |
11282 | + strlen (linkonce_kind) + 1); | |
b614a702 | 11283 | memcpy (prop_sec_name, ".gnu.linkonce.", linkonce_len); |
43cd72b9 | 11284 | strcpy (prop_sec_name + linkonce_len, linkonce_kind); |
b614a702 BW |
11285 | |
11286 | suffix = sec->name + linkonce_len; | |
096c35a7 | 11287 | /* For backward compatibility, replace "t." instead of inserting |
07d6d2b8 | 11288 | the new linkonce_kind (but not for "prop" sections). */ |
08dedd66 | 11289 | if (startswith (suffix, "t.") && linkonce_kind[1] == '.') |
07d6d2b8 | 11290 | suffix += 2; |
43cd72b9 | 11291 | strcat (prop_sec_name + linkonce_len, suffix); |
74869ac7 BW |
11292 | } |
11293 | else | |
8255c61b MF |
11294 | { |
11295 | prop_sec_name = xtensa_add_names (base_name, | |
11296 | separate_sections ? sec->name : NULL); | |
11297 | } | |
74869ac7 | 11298 | |
51c8ebc1 BW |
11299 | return prop_sec_name; |
11300 | } | |
11301 | ||
11302 | ||
11303 | static asection * | |
8255c61b | 11304 | xtensa_get_separate_property_section (asection *sec, const char *base_name, |
0a1b45a2 | 11305 | bool separate_section) |
51c8ebc1 BW |
11306 | { |
11307 | char *prop_sec_name; | |
11308 | asection *prop_sec; | |
11309 | ||
8255c61b MF |
11310 | prop_sec_name = xtensa_property_section_name (sec, base_name, |
11311 | separate_section); | |
51c8ebc1 BW |
11312 | prop_sec = bfd_get_section_by_name_if (sec->owner, prop_sec_name, |
11313 | match_section_group, | |
11314 | (void *) elf_group_name (sec)); | |
11315 | free (prop_sec_name); | |
11316 | return prop_sec; | |
11317 | } | |
11318 | ||
8255c61b MF |
11319 | static asection * |
11320 | xtensa_get_property_section (asection *sec, const char *base_name) | |
11321 | { | |
11322 | asection *prop_sec; | |
11323 | ||
11324 | /* Try individual property section first. */ | |
0a1b45a2 | 11325 | prop_sec = xtensa_get_separate_property_section (sec, base_name, true); |
8255c61b MF |
11326 | |
11327 | /* Refer to a common property section if individual is not present. */ | |
11328 | if (!prop_sec) | |
0a1b45a2 | 11329 | prop_sec = xtensa_get_separate_property_section (sec, base_name, false); |
8255c61b MF |
11330 | |
11331 | return prop_sec; | |
11332 | } | |
11333 | ||
51c8ebc1 BW |
11334 | |
11335 | asection * | |
11336 | xtensa_make_property_section (asection *sec, const char *base_name) | |
11337 | { | |
11338 | char *prop_sec_name; | |
11339 | asection *prop_sec; | |
11340 | ||
74869ac7 | 11341 | /* Check if the section already exists. */ |
8255c61b MF |
11342 | prop_sec_name = xtensa_property_section_name (sec, base_name, |
11343 | elf32xtensa_separate_props); | |
74869ac7 BW |
11344 | prop_sec = bfd_get_section_by_name_if (sec->owner, prop_sec_name, |
11345 | match_section_group, | |
51c8ebc1 | 11346 | (void *) elf_group_name (sec)); |
74869ac7 BW |
11347 | /* If not, create it. */ |
11348 | if (! prop_sec) | |
11349 | { | |
11350 | flagword flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY); | |
fd361982 | 11351 | flags |= (bfd_section_flags (sec) |
74869ac7 BW |
11352 | & (SEC_LINK_ONCE | SEC_LINK_DUPLICATES)); |
11353 | ||
11354 | prop_sec = bfd_make_section_anyway_with_flags | |
11355 | (sec->owner, strdup (prop_sec_name), flags); | |
11356 | if (! prop_sec) | |
11357 | return 0; | |
b614a702 | 11358 | |
51c8ebc1 | 11359 | elf_group_name (prop_sec) = elf_group_name (sec); |
e0001a05 NC |
11360 | } |
11361 | ||
74869ac7 BW |
11362 | free (prop_sec_name); |
11363 | return prop_sec; | |
e0001a05 NC |
11364 | } |
11365 | ||
43cd72b9 BW |
11366 | |
11367 | flagword | |
7fa3d080 | 11368 | xtensa_get_property_predef_flags (asection *sec) |
43cd72b9 | 11369 | { |
1d25768e | 11370 | if (xtensa_is_insntable_section (sec)) |
43cd72b9 | 11371 | return (XTENSA_PROP_INSN |
99ded152 | 11372 | | XTENSA_PROP_NO_TRANSFORM |
43cd72b9 BW |
11373 | | XTENSA_PROP_INSN_NO_REORDER); |
11374 | ||
11375 | if (xtensa_is_littable_section (sec)) | |
11376 | return (XTENSA_PROP_LITERAL | |
99ded152 | 11377 | | XTENSA_PROP_NO_TRANSFORM |
43cd72b9 BW |
11378 | | XTENSA_PROP_INSN_NO_REORDER); |
11379 | ||
11380 | return 0; | |
11381 | } | |
11382 | ||
e0001a05 NC |
11383 | \f |
11384 | /* Other functions called directly by the linker. */ | |
11385 | ||
0a1b45a2 | 11386 | bool |
7fa3d080 BW |
11387 | xtensa_callback_required_dependence (bfd *abfd, |
11388 | asection *sec, | |
11389 | struct bfd_link_info *link_info, | |
11390 | deps_callback_t callback, | |
11391 | void *closure) | |
e0001a05 NC |
11392 | { |
11393 | Elf_Internal_Rela *internal_relocs; | |
11394 | bfd_byte *contents; | |
11395 | unsigned i; | |
0a1b45a2 | 11396 | bool ok = true; |
43cd72b9 BW |
11397 | bfd_size_type sec_size; |
11398 | ||
11399 | sec_size = bfd_get_section_limit (abfd, sec); | |
e0001a05 NC |
11400 | |
11401 | /* ".plt*" sections have no explicit relocations but they contain L32R | |
11402 | instructions that reference the corresponding ".got.plt*" sections. */ | |
11403 | if ((sec->flags & SEC_LINKER_CREATED) != 0 | |
08dedd66 | 11404 | && startswith (sec->name, ".plt")) |
e0001a05 NC |
11405 | { |
11406 | asection *sgotplt; | |
11407 | ||
11408 | /* Find the corresponding ".got.plt*" section. */ | |
11409 | if (sec->name[4] == '\0') | |
ce558b89 | 11410 | sgotplt = elf_hash_table (link_info)->sgotplt; |
e0001a05 NC |
11411 | else |
11412 | { | |
11413 | char got_name[14]; | |
11414 | int chunk = 0; | |
11415 | ||
11416 | BFD_ASSERT (sec->name[4] == '.'); | |
11417 | chunk = strtol (&sec->name[5], NULL, 10); | |
11418 | ||
11419 | sprintf (got_name, ".got.plt.%u", chunk); | |
3d4d4302 | 11420 | sgotplt = bfd_get_linker_section (sec->owner, got_name); |
e0001a05 NC |
11421 | } |
11422 | BFD_ASSERT (sgotplt); | |
11423 | ||
11424 | /* Assume worst-case offsets: L32R at the very end of the ".plt" | |
11425 | section referencing a literal at the very beginning of | |
11426 | ".got.plt". This is very close to the real dependence, anyway. */ | |
43cd72b9 | 11427 | (*callback) (sec, sec_size, sgotplt, 0, closure); |
e0001a05 NC |
11428 | } |
11429 | ||
13161072 BW |
11430 | /* Only ELF files are supported for Xtensa. Check here to avoid a segfault |
11431 | when building uclibc, which runs "ld -b binary /dev/null". */ | |
11432 | if (bfd_get_flavour (abfd) != bfd_target_elf_flavour) | |
11433 | return ok; | |
11434 | ||
68ffbac6 | 11435 | internal_relocs = retrieve_internal_relocs (abfd, sec, |
e0001a05 NC |
11436 | link_info->keep_memory); |
11437 | if (internal_relocs == NULL | |
43cd72b9 | 11438 | || sec->reloc_count == 0) |
e0001a05 NC |
11439 | return ok; |
11440 | ||
11441 | /* Cache the contents for the duration of this scan. */ | |
11442 | contents = retrieve_contents (abfd, sec, link_info->keep_memory); | |
43cd72b9 | 11443 | if (contents == NULL && sec_size != 0) |
e0001a05 | 11444 | { |
0a1b45a2 | 11445 | ok = false; |
e0001a05 NC |
11446 | goto error_return; |
11447 | } | |
11448 | ||
43cd72b9 BW |
11449 | if (!xtensa_default_isa) |
11450 | xtensa_default_isa = xtensa_isa_init (0, 0); | |
e0001a05 | 11451 | |
43cd72b9 | 11452 | for (i = 0; i < sec->reloc_count; i++) |
e0001a05 NC |
11453 | { |
11454 | Elf_Internal_Rela *irel = &internal_relocs[i]; | |
43cd72b9 | 11455 | if (is_l32r_relocation (abfd, sec, contents, irel)) |
e0001a05 NC |
11456 | { |
11457 | r_reloc l32r_rel; | |
11458 | asection *target_sec; | |
11459 | bfd_vma target_offset; | |
43cd72b9 BW |
11460 | |
11461 | r_reloc_init (&l32r_rel, abfd, irel, contents, sec_size); | |
e0001a05 NC |
11462 | target_sec = NULL; |
11463 | target_offset = 0; | |
11464 | /* L32Rs must be local to the input file. */ | |
11465 | if (r_reloc_is_defined (&l32r_rel)) | |
11466 | { | |
11467 | target_sec = r_reloc_get_section (&l32r_rel); | |
43cd72b9 | 11468 | target_offset = l32r_rel.target_offset; |
e0001a05 NC |
11469 | } |
11470 | (*callback) (sec, irel->r_offset, target_sec, target_offset, | |
11471 | closure); | |
11472 | } | |
11473 | } | |
11474 | ||
11475 | error_return: | |
11476 | release_internal_relocs (sec, internal_relocs); | |
11477 | release_contents (sec, contents); | |
11478 | return ok; | |
11479 | } | |
11480 | ||
2f89ff8d L |
11481 | /* The default literal sections should always be marked as "code" (i.e., |
11482 | SHF_EXECINSTR). This is particularly important for the Linux kernel | |
11483 | module loader so that the literals are not placed after the text. */ | |
b35d266b | 11484 | static const struct bfd_elf_special_section elf_xtensa_special_sections[] = |
2f89ff8d | 11485 | { |
0112cd26 NC |
11486 | { STRING_COMMA_LEN (".fini.literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, |
11487 | { STRING_COMMA_LEN (".init.literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, | |
07d6d2b8 AM |
11488 | { STRING_COMMA_LEN (".literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, |
11489 | { STRING_COMMA_LEN (".xtensa.info"), 0, SHT_NOTE, 0 }, | |
11490 | { NULL, 0, 0, 0, 0 } | |
7f4d3958 | 11491 | }; |
e0001a05 | 11492 | \f |
ae95ffa6 | 11493 | #define ELF_TARGET_ID XTENSA_ELF_DATA |
e0001a05 | 11494 | #ifndef ELF_ARCH |
6d00b590 | 11495 | #define TARGET_LITTLE_SYM xtensa_elf32_le_vec |
e0001a05 | 11496 | #define TARGET_LITTLE_NAME "elf32-xtensa-le" |
6d00b590 | 11497 | #define TARGET_BIG_SYM xtensa_elf32_be_vec |
e0001a05 NC |
11498 | #define TARGET_BIG_NAME "elf32-xtensa-be" |
11499 | #define ELF_ARCH bfd_arch_xtensa | |
11500 | ||
4af0a1d8 BW |
11501 | #define ELF_MACHINE_CODE EM_XTENSA |
11502 | #define ELF_MACHINE_ALT1 EM_XTENSA_OLD | |
e0001a05 | 11503 | |
f7e16c2a | 11504 | #define ELF_MAXPAGESIZE 0x1000 |
e0001a05 NC |
11505 | #endif /* ELF_ARCH */ |
11506 | ||
11507 | #define elf_backend_can_gc_sections 1 | |
11508 | #define elf_backend_can_refcount 1 | |
11509 | #define elf_backend_plt_readonly 1 | |
11510 | #define elf_backend_got_header_size 4 | |
11511 | #define elf_backend_want_dynbss 0 | |
11512 | #define elf_backend_want_got_plt 1 | |
64f52338 | 11513 | #define elf_backend_dtrel_excludes_plt 1 |
e0001a05 NC |
11514 | |
11515 | #define elf_info_to_howto elf_xtensa_info_to_howto_rela | |
11516 | ||
28dbbc02 BW |
11517 | #define bfd_elf32_mkobject elf_xtensa_mkobject |
11518 | ||
e0001a05 NC |
11519 | #define bfd_elf32_bfd_merge_private_bfd_data elf_xtensa_merge_private_bfd_data |
11520 | #define bfd_elf32_new_section_hook elf_xtensa_new_section_hook | |
11521 | #define bfd_elf32_bfd_print_private_bfd_data elf_xtensa_print_private_bfd_data | |
11522 | #define bfd_elf32_bfd_relax_section elf_xtensa_relax_section | |
11523 | #define bfd_elf32_bfd_reloc_type_lookup elf_xtensa_reloc_type_lookup | |
157090f7 AM |
11524 | #define bfd_elf32_bfd_reloc_name_lookup \ |
11525 | elf_xtensa_reloc_name_lookup | |
e0001a05 | 11526 | #define bfd_elf32_bfd_set_private_flags elf_xtensa_set_private_flags |
f0e6fdb2 | 11527 | #define bfd_elf32_bfd_link_hash_table_create elf_xtensa_link_hash_table_create |
e0001a05 NC |
11528 | |
11529 | #define elf_backend_adjust_dynamic_symbol elf_xtensa_adjust_dynamic_symbol | |
11530 | #define elf_backend_check_relocs elf_xtensa_check_relocs | |
e0001a05 NC |
11531 | #define elf_backend_create_dynamic_sections elf_xtensa_create_dynamic_sections |
11532 | #define elf_backend_discard_info elf_xtensa_discard_info | |
11533 | #define elf_backend_ignore_discarded_relocs elf_xtensa_ignore_discarded_relocs | |
11534 | #define elf_backend_final_write_processing elf_xtensa_final_write_processing | |
11535 | #define elf_backend_finish_dynamic_sections elf_xtensa_finish_dynamic_sections | |
11536 | #define elf_backend_finish_dynamic_symbol elf_xtensa_finish_dynamic_symbol | |
11537 | #define elf_backend_gc_mark_hook elf_xtensa_gc_mark_hook | |
e0001a05 NC |
11538 | #define elf_backend_grok_prstatus elf_xtensa_grok_prstatus |
11539 | #define elf_backend_grok_psinfo elf_xtensa_grok_psinfo | |
95147441 | 11540 | #define elf_backend_hide_symbol elf_xtensa_hide_symbol |
e0001a05 NC |
11541 | #define elf_backend_object_p elf_xtensa_object_p |
11542 | #define elf_backend_reloc_type_class elf_xtensa_reloc_type_class | |
11543 | #define elf_backend_relocate_section elf_xtensa_relocate_section | |
11544 | #define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections | |
28dbbc02 | 11545 | #define elf_backend_always_size_sections elf_xtensa_always_size_sections |
d00dd7dc | 11546 | #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all |
29ef7005 | 11547 | #define elf_backend_special_sections elf_xtensa_special_sections |
a77dc2cc | 11548 | #define elf_backend_action_discarded elf_xtensa_action_discarded |
28dbbc02 | 11549 | #define elf_backend_copy_indirect_symbol elf_xtensa_copy_indirect_symbol |
e0001a05 NC |
11550 | |
11551 | #include "elf32-target.h" |