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ubsan: m32r: left shift of negative value
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
c9ae58fe
AM		 12020-02-04 Alan Modra <amodra@gmail.com>
2
3 * m32r.cpu (f-disp8): Avoid left shift of negative values.
4 (f-disp16, f-disp24): Likewise.
5
3e1056a1
AM		 62019-12-23 Alan Modra <amodra@gmail.com>
7
8 * iq2000.cpu (f-offset): Avoid left shift of negative values.
9
bcd9f578
AM		 102019-12-20 Alan Modra <amodra@gmail.com>
11
12 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
13
62e65990
AM		 142019-12-17 Alan Modra <amodra@gmail.com>
15
16 * bpf.cpu (f-imm64): Avoid signed overflow.
17
e6ced26a
AM		 182019-12-16 Alan Modra <amodra@gmail.com>
19
20 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
21
1d61b032
AM		 222019-12-11 Alan Modra <amodra@gmail.com>
23
24 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
25 * lm32.cpu (f-branch, f-vall): Likewise.
26 * m32.cpu (f-lab-8-16): Likewise.
27
b8e61daa
AM		 282019-12-11 Alan Modra <amodra@gmail.com>
29
30 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
31 shift left to avoid UB on left shift of negative values.
32
e042e6c3
JM		 332019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
34
35 * bpf.cpu: Fix comment describing the 128-bit instruction format.
36
60391a25
PB		 372019-09-09 Phil Blundell <pb@pbcl.net>
38
39 binutils 2.33 branch created.
40
231097b0
JM		 412019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
42
43 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
44 %a and %ctx.
45
3719fd55
JM		 462019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
47
48 * bpf.cpu (dlabs): New pmacro.
49 (dlind): Likewise.
50
92434a14
JM		 512019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
52
53 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
54 explicit 'dst' argument.
55
a2e4218f
SH		 562019-06-13 Stafford Horne <shorne@gmail.com>
57
58 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
59
eb212c84
SH		 602019-06-13 Stafford Horne <shorne@gmail.com>
61
62 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
63 (l-adrp): Improve comment.
64
d3ad6278
SH		 652019-06-13 Stafford Horne <shorne@gmail.com>
66
67 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
68 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
69 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
70 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
71 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
72 float-setflag-unordered-symantics): New pmacro for instruction
73 symantics.
74 (float-setflag-insn): Update to use float-setflag-insn-base.
75 (float-setflag-unordered-insn): New pmacro for generating instructions.
76
6ce26ac7
SH		 772019-06-13 Andrey Bacherov <avbacherov@opencores.org>
78 Stafford Horne <shorne@gmail.com>
79
80 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
81 (ORFPX-MACHS): Removed pmacro.
82 * or1k.opc (or1k_cgen_insn_supported): New function.
83 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
84 (parse_regpair, print_regpair): New functions.
85 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
86 and add comments.
87 (h-fdr): Update comment to indicate or64.
88 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
89 (h-fd32r): New hardware for 64-bit fpu registers.
90 (h-i64r): New hardware for 64-bit int registers.
91 * or1korbis.cpu (f-resv-8-1): New field.
92 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
93 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
94 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
95 (h-roff1): New hardware.
96 (double-field-and-ops mnemonic): New pmacro to generate operations
97 rDD32F, rAD32F, rBD32F, rDDI and rADI.
98 (float-regreg-insn): Update single precision generator to MACH
99 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
100 (float-setflag-insn): Update single precision generator to MACH
101 ORFPX32-MACHS. Fix double instructions from single to double
102 precision. Add generator for or32 64-bit instructions.
103 (float-cust-insn cust-num): Update single precision generator to MACH
104 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
105 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
106 ORFPX32-MACHS.
107 (lf-rem-d): Fix operation from mod to rem.
108 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
109 (lf-itof-d): Fix operands from single to double.
110 (lf-ftoi-d): Update operand mode from DI to WI.
111
ea195bb0
JM		 1122019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
113
114 * bpf.cpu: New file.
115 * bpf.opc: Likewise.
116
f974f26c
NC		 1172018-06-24 Nick Clifton <nickc@redhat.com>
118
119 2.32 branch created.
120
07f5f4c6
RH		 1212018-10-05 Richard Henderson <rth@twiddle.net>
122 Stafford Horne <shorne@gmail.com>
123
124 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
125 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
126 (l-mul): Fix overflow support and indentation.
127 (l-mulu): Fix overflow support and indentation.
128 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
129 (l-div); Remove incorrect carry behavior.
130 (l-divu): Fix carry and overflow behavior.
131 (l-mac): Add overflow support.
132 (l-msb, l-msbu): Add carry and overflow support.
133
c8e98e36
SH		 1342018-10-05 Richard Henderson <rth@twiddle.net>
135
136 * or1k.opc (parse_disp26): Add support for plta() relocations.
137 (parse_disp21): New function.
138 (or1k_rclass): New enum.
139 (or1k_rtype): New enum.
140 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
141 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
142 (parse_imm16): Add support for the new 21bit and 13bit relocations.
143 * or1korbis.cpu (f-disp26): Don't assume SI.
144 (f-disp21): New pc-relative 21-bit 13 shifted to right.
145 (insn-opcode): Add ADRP.
146 (l-adrp): New instruction.
147
1c4f3780
RH		 1482018-10-05 Richard Henderson <rth@twiddle.net>
149
150 * or1k.opc: Add RTYPE_ enum.
151 (INVALID_STORE_RELOC): New string.
152 (or1k_imm16_relocs): New array array.
153 (parse_reloc): New static function that just does the parsing.
154 (parse_imm16): New static function for generic parsing.
155 (parse_simm16): Change to just call parse_imm16.
156 (parse_simm16_split): New function.
157 (parse_uimm16): Change to call parse_imm16.
158 (parse_uimm16_split): New function.
159 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
160 (uimm16-split): Change to use new uimm16_split.
161
67ce483b
AM		 1622018-07-24 Alan Modra <amodra@gmail.com>
163
164 PR 23430
165 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
166
84f9f8c3
AM		 1672018-05-09 Sebastian Rasmussen <sebras@gmail.com>
168
169 * or1kcommon.cpu (spr-reg-info): Typo fix.
170
a6743a54
AM		 1712018-03-03 Alan Modra <amodra@gmail.com>
172
173 * frv.opc: Include opintl.h.
174 (add_next_to_vliw): Use opcodes_error_handler to print error.
175 Standardize error message.
176 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
177
faf766e3
NC		 1782018-01-13 Nick Clifton <nickc@redhat.com>
179
180 2.30 branch created.
181
4ea0266c
SH		 1822017-03-15 Stafford Horne <shorne@gmail.com>
183
184 * or1kcommon.cpu: Add pc set semantics to also update ppc.
185
b781683b
AM		 1862016-10-06 Alan Modra <amodra@gmail.com>
187
188 * mep.opc (expand_string): Add fall through comment.
189
439baf71
AM		 1902016-03-03 Alan Modra <amodra@gmail.com>
191
192 * fr30.cpu (f-m4): Replace bogus comment with a better guess
193 at what is really going on.
194
62de1c63
AM		 1952016-03-02 Alan Modra <amodra@gmail.com>
196
197 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
198
b89807c6
AB		 1992016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
200
201 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
202 a constant to better align disassembler output.
203
018dc9be
SK		 2042014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
205
206 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
207
c151b1c6
AM		 2082014-06-12 Alan Modra <amodra@gmail.com>
209
210 * or1k.opc: Whitespace fixes.
211
999b995d
SK		 2122014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
213
214 * or1korbis.cpu (h-atomic-reserve): New hardware.
215 (h-atomic-address): Likewise.
216 (insn-opcode): Add opcodes for LWA and SWA.
217 (atomic-reserve): New operand.
218 (atomic-address): Likewise.
219 (l-lwa, l-swa): New instructions.
220 (l-lbs): Fix typo in comment.
221 (store-insn): Clear atomic reserve on store to atomic-address.
222 Fix register names in fmt field.
223
73589c9d
CS		 2242014-04-22 Christian Svensson <blue@cmd.nu>
225
226 * openrisc.cpu: Delete.
227 * openrisc.opc: Delete.
228 * or1k.cpu: New file.
229 * or1k.opc: New file.
230 * or1kcommon.cpu: New file.
231 * or1korbis.cpu: New file.
232 * or1korfpx.cpu: New file.
233
594d8fa8
MF		 2342013-12-07 Mike Frysinger <vapier@gentoo.org>
235
236 * epiphany.opc: Remove +x file mode.
237
87a8d6cb
NC		 2382013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
239
240 PR binutils/15241
241 * lm32.cpu (Control and status registers): Add CFG2, PSW,
242 TLBVADDR, TLBPADDR and TLBBADVADDR.
243
02a79b89
JR		 2442012-11-30 Oleg Raikhman <oleg@adapteva.com>
245 Joern Rennecke <joern.rennecke@embecosm.com>
246
247 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
248 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
249 (testset-insn): Add NO_DIS attribute to t.l.
250 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
251 (move-insns): Add NO-DIS attribute to cmov.l.
252 (op-mmr-movts): Add NO-DIS attribute to movts.l.
253 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
254 (op-rrr): Add NO-DIS attribute to .l.
255 (shift-rrr): Add NO-DIS attribute to .l.
256 (op-shift-rri): Add NO-DIS attribute to i32.l.
257 (bitrl, movtl): Add NO-DIS attribute.
258 (op-iextrrr): Add NO-DIS attribute to .l
259 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
260 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
261
a597d2d3
AM		 2622012-02-27 Alan Modra <amodra@gmail.com>
263
264 * mt.opc (print_dollarhex): Trim values to 32 bits.
265
5011093d
NC		 2662011-12-15 Nick Clifton <nickc@redhat.com>
267
268 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
269 hosts.
270
fd936b4c
JR		 2712011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
272
273 * epiphany.opc (parse_branch_addr): Fix type of valuep.
274 Cast value before printing it as a long.
275 (parse_postindex): Fix type of valuep.
276
cfb8c092
NC		 2772011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
278
279 * cpu/epiphany.cpu: New file.
280 * cpu/epiphany.opc: New file.
281
dc15e575
NC		 2822011-08-22 Nick Clifton <nickc@redhat.com>
283
284 * fr30.cpu: Newly contributed file.
285 * fr30.opc: Likewise.
286 * ip2k.cpu: Likewise.
287 * ip2k.opc: Likewise.
288 * mep-avc.cpu: Likewise.
289 * mep-avc2.cpu: Likewise.
290 * mep-c5.cpu: Likewise.
291 * mep-core.cpu: Likewise.
292 * mep-default.cpu: Likewise.
293 * mep-ext-cop.cpu: Likewise.
294 * mep-fmax.cpu: Likewise.
295 * mep-h1.cpu: Likewise.
296 * mep-ivc2.cpu: Likewise.
297 * mep-rhcop.cpu: Likewise.
298 * mep-sample-ucidsp.cpu: Likewise.
299 * mep.cpu: Likewise.
300 * mep.opc: Likewise.
301 * openrisc.cpu: Likewise.
302 * openrisc.opc: Likewise.
303 * xstormy16.cpu: Likewise.
304 * xstormy16.opc: Likewise.
305
9ccb8af9
AM		 3062010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
307
308 * frv.opc: #undef DEBUG.
309
21375995
DD		 3102010-07-03 DJ Delorie <dj@delorie.com>
311
312 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
313
5ff58fb0
DE		 3142010-02-11 Doug Evans <dje@sebabeach.org>
315
316 * m32r.cpu (HASH-PREFIX): Delete.
317 (duhpo, dshpo): New pmacros.
318 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
319 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
320 attribute, define with dshpo.
321 (uimm24): Delete HASH-PREFIX attribute.
322 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
323 (print_signed_with_hash_prefix): New function.
324 (print_unsigned_with_hash_prefix): New function.
325 * xc16x.cpu (dowh): New pmacro.
326 (upof16): Define with dowh, specify print handler.
327 (qbit, qlobit, qhibit): Ditto.
328 (upag16): Ditto.
329 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
330 (print_with_dot_prefix): New functions.
331 (print_with_pof_prefix, print_with_pag_prefix): New functions.
332
3fa5b97b
DE		 3332010-01-24 Doug Evans <dje@sebabeach.org>
334
335 * frv.cpu (floating-point-conversion): Update call to fp conv op.
336 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
337 conditional-floating-point-conversion, ne-floating-point-conversion,
338 float-parallel-mul-add-double-semantics): Ditto.
339
fe8afbc4
DE		 3402010-01-05 Doug Evans <dje@sebabeach.org>
341
342 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
343 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
344
caaf56fb
DE		 3452010-01-02 Doug Evans <dje@sebabeach.org>
346
347 * m32c.opc (parse_signed16): Fix typo.
348
91d6fa6a
NC		 3492009-12-11 Nick Clifton <nickc@redhat.com>
350
351 * frv.opc: Fix shadowed variable warnings.
352 * m32c.opc: Fix shadowed variable warnings.
353
ec84cc2b
DE		 3542009-11-14 Doug Evans <dje@sebabeach.org>
355
356 Must use VOID expression in VOID context.
357 * xc16x.cpu (mov4): Fix mode of `sequence'.
358 (mov9, mov10): Ditto.
359 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
360 (callr, callseg, calls, trap, rets, reti): Ditto.
361 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
362 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
363 (exts, exts1, extsr, extsr1, prior): Ditto.
364
ac1e9eca
DE		 3652009-10-23 Doug Evans <dje@sebabeach.org>
366
367 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
368 cgen-ops.h -> cgen/basic-ops.h.
369
b4744b17
AM		 3702009-09-25 Alan Modra <amodra@bigpond.net.au>
371
372 * m32r.cpu (stb-plus): Typo fix.
373
ab5f875d
DE		 3742009-09-23 Doug Evans <dje@sebabeach.org>
375
376 * m32r.cpu (sth-plus): Fix address mode and calculation.
377 (stb-plus): Ditto.
378 (clrpsw): Fix mask calculation.
379 (bset, bclr, btst): Make mode in bit calculation match expression.
380
381 * xc16x.cpu (rtl-version): Set to 0.8.
382 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
383 make uppercase. Remove unnecessary name-prefix spec.
384 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
385 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
386 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
387 (h-cr): New hardware.
388 (muls): Comment out parts that won't compile, add fixme.
389 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
390 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
391 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
392
0aaaf7c3
DE		 3932009-07-16 Doug Evans <dje@sebabeach.org>
394
395 * cpu/simplify.inc (*): One line doc strings don't need \n.
396 (df): Invoke define-full-ifield instead of claiming it's an alias.
397 (dno): Define.
398 (dnop): Mark as deprecated.
399
1998a8e0
AM		 4002009-06-22 Alan Modra <amodra@bigpond.net.au>
401
402 * m32c.opc (parse_lab_5_3): Use correct enum.
403
6347aad8
HPN		 4042009-01-07 Hans-Peter Nilsson <hp@axis.com>
405
406 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
407 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
408 (media-arith-sat-semantics): Explicitly sign- or zero-extend
409 arguments of "operation" to DI using "mode" and the new pmacros.
410
2c06b7a6
HPN		 4112009-01-03 Hans-Peter Nilsson <hp@axis.com>
412
413 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
414 of number 2, PID.
415
84e94c90
NC		 4162008-12-23 Jon Beniston <jon@beniston.com>
417
418 * lm32.cpu: New file.
419 * lm32.opc: New file.
420
90518ff4
AM		 4212008-01-29 Alan Modra <amodra@bigpond.net.au>
422
423 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
424 to source.
425
a69f60de
HPN		 4262007-10-22 Hans-Peter Nilsson <hp@axis.com>
427
428 * cris.cpu (movs, movu): Use result of extension operation when
429 updating flags.
430
9b201bb5
NC		 4312007-07-04 Nick Clifton <nickc@redhat.com>
432
433 * cris.cpu: Update copyright notice to refer to GPLv3.
434 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
435 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
436 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
437 xc16x.opc: Likewise.
438 * iq2000.cpu: Fix copyright notice to refer to FSF.
439
53289dcd
MS		 4402007-04-30 Mark Salter <msalter@sadr.localdomain>
441
442 * frv.cpu (spr-names): Support new coprocessor SPR registers.
443
f6da2ec2
NC		 4442007-04-20 Nick Clifton <nickc@redhat.com>
445
446 * xc16x.cpu: Restore after accidentally overwriting this file with
447 xc16x.opc.
448
144f4bc6
DD		 4492007-03-29 DJ Delorie <dj@redhat.com>
450
451 * m32c.cpu (Imm-8-s4n): Fix print hook.
452 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
453 (arith-jnz-imm4-dst-defn): Make relaxable.
454 (arith-jnz16-imm4-dst-defn): Fix encodings.
455
75b06e7b
DD		 4562007-03-20 DJ Delorie <dj@redhat.com>
457
458 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
459 mem20): New.
460 (src16-16-20-An-relative-*): New.
461 (dst16-*-20-An-relative-*): New.
462 (dst16-16-16sa-*): New
463 (dst16-16-16ar-*): New
464 (dst32-16-16sa-Unprefixed-*): New
465 (jsri): Fix operands.
466 (setzx): Fix encoding.
72f4393d 467
a5da764d
AM		 4682007-03-08 Alan Modra <amodra@bigpond.net.au>
469
470 * m32r.opc: Formatting.
471
b497d0b0
NC		 4722006-05-22 Nick Clifton <nickc@redhat.com>
473
474 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
475
e78efa90
DD		 4762006-04-10 DJ Delorie <dj@redhat.com>
477
478 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
479 decides if this function accepts symbolic constants or not.
480 (parse_signed_bitbase): Likewise.
481 (parse_unsigned_bitbase8): Pass the new parameter.
482 (parse_unsigned_bitbase11): Likewise.
483 (parse_unsigned_bitbase16): Likewise.
484 (parse_unsigned_bitbase19): Likewise.
485 (parse_unsigned_bitbase27): Likewise.
486 (parse_signed_bitbase8): Likewise.
487 (parse_signed_bitbase11): Likewise.
488 (parse_signed_bitbase19): Likewise.
72f4393d 489
8d0e2679
DD		 4902006-03-13 DJ Delorie <dj@redhat.com>
491
43aa3bb1
DD		 492 * m32c.cpu (Bit3-S): New.
493 (btst:s): New.
494 * m32c.opc (parse_bit3_S): New.
495
8d0e2679
DD		 496 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
497 (btst): Add optional :G suffix for MACH32.
498 (or.b:S): New.
499 (pop.w:G): Add optional :G suffix for MACH16.
500 (push.b.imm): Fix syntax.
501
253d272c
DD		 5022006-03-10 DJ Delorie <dj@redhat.com>
503
504 * m32c.cpu (mul.l): New.
505 (mulu.l): New.
506
c7d41dc5
NC		 5072006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
508
509 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
510 an error message otherwise.
511 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
512 Fix up comments to correctly describe the functions.
513
6772dd07
DD		 5142006-02-24 DJ Delorie <dj@redhat.com>
515
516 * m32c.cpu (RL_TYPE): New attribute, with macros.
517 (Lab-8-24): Add RELAX.
518 (unary-insn-defn-g, binary-arith-imm-dst-defn,
519 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
520 (binary-arith-src-dst-defn): Add 2ADDR attribute.
521 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
522 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
523 attribute.
524 (jsri16, jsri32): Add 1ADDR attribute.
525 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 526
d70c5fc7 5272006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 528 Anil Paranjape <anilp1@kpitcummins.com>
529 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 530
531 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
532 description.
533 * xc16x.opc: New file containing supporting XC16C routines.
534
8536c657
NC		 5352006-02-10 Nick Clifton <nickc@redhat.com>
536
537 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
538
458f7770
DD		 5392006-01-06 DJ Delorie <dj@redhat.com>
540
541 * m32c.cpu (mov.w:q): Fix mode.
542 (push32.b.imm): Likewise, for the comment.
543
d031aafb
NS		 5442005-12-16 Nathan Sidwell <nathan@codesourcery.com>
545
546 Second part of ms1 to mt renaming.
547 * mt.cpu (define-arch, define-isa): Set name to mt.
548 (define-mach): Adjust.
549 * mt.opc (CGEN_ASM_HASH): Update.
550 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
551 (parse_loopsize, parse_imm16): Adjust.
552
eda87aba
DD		 5532005-12-13 DJ Delorie <dj@redhat.com>
554
555 * m32c.cpu (jsri): Fix order so register names aren't treated as
556 symbols.
557 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
558 indexwd, indexws): Fix encodings.
559
4970f871
NS		 5602005-12-12 Nathan Sidwell <nathan@codesourcery.com>
561
562 * mt.cpu: Rename from ms1.cpu.
563 * mt.opc: Rename from ms1.opc.
564
48ad8298
HPN		 5652005-12-06 Hans-Peter Nilsson <hp@axis.com>
566
567 * cris.cpu (simplecris-common-writable-specregs)
568 (simplecris-common-readable-specregs): Split from
569 simplecris-common-specregs. All users changed.
570 (cris-implemented-writable-specregs-v0)
571 (cris-implemented-readable-specregs-v0): Similar from
572 cris-implemented-specregs-v0.
573 (cris-implemented-writable-specregs-v3)
574 (cris-implemented-readable-specregs-v3)
575 (cris-implemented-writable-specregs-v8)
576 (cris-implemented-readable-specregs-v8)
577 (cris-implemented-writable-specregs-v10)
578 (cris-implemented-readable-specregs-v10)
579 (cris-implemented-writable-specregs-v32)
580 (cris-implemented-readable-specregs-v32): Similar.
581 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
582 insns and specializations.
583
6f84a2a6
NS		 5842005-11-08 Nathan Sidwell <nathan@codesourcery.com>
585
586 Add ms2
587 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
588 model.
589 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
590 f-cb2incr, f-rc3): New fields.
591 (LOOP): New instruction.
592 (JAL-HAZARD): New hazard.
593 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
594 New operands.
595 (mul, muli, dbnz, iflush): Enable for ms2
596 (jal, reti): Has JAL-HAZARD.
597 (ldctxt, ldfb, stfb): Only ms1.
598 (fbcb): Only ms1,ms1-003.
599 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
600 fbcbincrs, mfbcbincrs): Enable for ms2.
601 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
602 * ms1.opc (parse_loopsize): New.
603 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
604 (print_pcrel): New.
605
95b96521
DB		 6062005-10-28 Dave Brolley <brolley@redhat.com>
607
608 Contribute the following change:
609 2003-09-24 Dave Brolley <brolley@redhat.com>
610
611 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
612 CGEN_ATTR_VALUE_TYPE.
613 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
614 Use cgen_bitset_intersect_p.
615
c6552317
DD		 6162005-10-27 DJ Delorie <dj@redhat.com>
617
618 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
619 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
620 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
621 imm operand is needed.
622 (adjnz, sbjnz): Pass the right operands.
623 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
624 unary-insn): Add -g variants for opcodes that need to support :G.
625 (not.BW:G, push.BW:G): Call it.
626 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
627 stzx16-imm8-imm8-abs16): Fix operand typos.
628 * m32c.opc (m32c_asm_hash): Support bnCND.
629 (parse_signed4n, print_signed4n): New.
72f4393d 630
f75eb1c0
DD		 6312005-10-26 DJ Delorie <dj@redhat.com>
632
633 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
634 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
635 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
636 dsp8[sp] is signed.
637 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
638 (mov.BW:S r0,r1): Fix typo r1l->r1.
639 (tst): Allow :G suffix.
640 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
641
e277c00b
AM		 6422005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
643
644 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
645
92e0a941
DD		 6462005-10-25 DJ Delorie <dj@redhat.com>
647
648 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
649 making one a macro of the other.
650
a1a280bb
DD		 6512005-10-21 DJ Delorie <dj@redhat.com>
652
653 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
654 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
655 indexld, indexls): .w variants have `1' bit.
656 (rot32.b): QI, not SI.
657 (rot32.w): HI, not SI.
658 (xchg16): HI for .w variant.
659
e74eb924
NC		 6602005-10-19 Nick Clifton <nickc@redhat.com>
661
662 * m32r.opc (parse_slo16): Fix bad application of previous patch.
663
5e03663f
NC		 6642005-10-18 Andreas Schwab <schwab@suse.de>
665
666 * m32r.opc (parse_slo16): Better version of previous patch.
667
ab7c9a26
NC		 6682005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
669
670 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
671 size.
672
fd54057a
DD		 6732005-07-25 DJ Delorie <dj@redhat.com>
674
675 * m32c.opc (parse_unsigned8): Add %dsp8().
676 (parse_signed8): Add %hi8().
677 (parse_unsigned16): Add %dsp16().
678 (parse_signed16): Add %lo16() and %hi16().
679 (parse_lab_5_3): Make valuep a bfd_vma *.
680
85da3a56
NC		 6812005-07-18 Nick Clifton <nickc@redhat.com>
682
683 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
684 components.
685 (f-lab32-jmp-s): Fix insertion sequence.
686 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
687 (Dsp-40-s8): Make parameter be signed.
688 (Dsp-40-s16): Likewise.
689 (Dsp-48-s8): Likewise.
690 (Dsp-48-s16): Likewise.
691 (Imm-13-u3): Likewise. (Despite its name!)
692 (BitBase16-16-s8): Make the parameter be unsigned.
693 (BitBase16-8-u11-S): Likewise.
694 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
695 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
696 relaxation.
697
698 * m32c.opc: Fix formatting.
699 Use safe-ctype.h instead of ctype.h
700 Move duplicated code sequences into a macro.
701 Fix compile time warnings about signedness mismatches.
702 Remove dead code.
703 (parse_lab_5_3): New parser function.
72f4393d 704
aa260854
JB		 7052005-07-16 Jim Blandy <jimb@redhat.com>
706
707 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
708 to represent isa sets.
709
0a665bfd
JB		 7102005-07-15 Jim Blandy <jimb@redhat.com>
711
712 * m32c.cpu, m32c.opc: Fix copyright.
713
49f58d10
JB		 7142005-07-14 Jim Blandy <jimb@redhat.com>
715
716 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
717
0e6b69be
AM		 7182005-07-14 Alan Modra <amodra@bigpond.net.au>
719
720 * ms1.opc (print_dollarhex): Correct format string.
721
f9210e37
AM		 7222005-07-06 Alan Modra <amodra@bigpond.net.au>
723
724 * iq2000.cpu: Include from binutils cpu dir.
725
3ec2b351
NC		 7262005-07-05 Nick Clifton <nickc@redhat.com>
727
728 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
729 unsigned in order to avoid compile time warnings about sign
730 conflicts.
731
732 * ms1.opc (parse_*): Likewise.
733 (parse_imm16): Use a "void *" as it is passed both signed and
734 unsigned arguments.
735
47b0e7ad
NC		 7362005-07-01 Nick Clifton <nickc@redhat.com>
737
738 * frv.opc: Update to ISO C90 function declaration style.
739 * iq2000.opc: Likewise.
740 * m32r.opc: Likewise.
741 * sh.opc: Likewise.
742
b081650b
DB		 7432005-06-15 Dave Brolley <brolley@redhat.com>
744
745 Contributed by Red Hat.
746 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
747 * ms1.opc: New file. Written by Stan Cox.
748
e172dbf8
NC		 7492005-05-10 Nick Clifton <nickc@redhat.com>
750
751 * Update the address and phone number of the FSF organization in
752 the GPL notices in the following files:
753 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
754 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
755 sh64-media.cpu, simplify.inc
756
b2d52a48
AM		 7572005-02-24 Alan Modra <amodra@bigpond.net.au>
758
759 * frv.opc (parse_A): Warning fix.
760
33b71eeb
NC		 7612005-02-23 Nick Clifton <nickc@redhat.com>
762
763 * frv.opc: Fixed compile time warnings about differing signed'ness
764 of pointers passed to functions.
765 * m32r.opc: Likewise.
766
bc18c937
NC		 7672005-02-11 Nick Clifton <nickc@redhat.com>
768
769 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
770 'bfd_vma *' in order avoid compile time warning message.
771
46da9a19
HPN		 7722005-01-28 Hans-Peter Nilsson <hp@axis.com>
773
774 * cris.cpu (mstep): Add missing insn.
775
90219bd0
AO		 7762005-01-25 Alexandre Oliva <aoliva@redhat.com>
777
778 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
779 * frv.cpu: Add support for TLS annotations in loads and calll.
780 * frv.opc (parse_symbolic_address): New.
781 (parse_ldd_annotation): New.
782 (parse_call_annotation): New.
783 (parse_ld_annotation): New.
784 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
785 Introduce TLS relocations.
786 (parse_d12, parse_s12, parse_u12): Likewise.
787 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
788 (parse_call_label, print_at): New.
789
c3d75c30
HPN		 7902004-12-21 Mikael Starvik <starvik@axis.com>
791
792 * cris.cpu (cris-set-mem): Correct integral write semantics.
793
68800d83
HPN		 7942004-11-29 Hans-Peter Nilsson <hp@axis.com>
795
796 * cris.cpu: New file.
797
4bd1d37b
NC		 7982004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
799
800 * iq2000.cpu: Added quotes around macro arguments so that they
801 will work with newer versions of guile.
802
4030fa5a
NC		 8032004-10-27 Nick Clifton <nickc@redhat.com>
804
805 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
806 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
807 operand.
808 * iq2000.cpu (dnop index): Rename to _index to avoid complications
809 with guile.
810
ac28a1cb
RS		 8112004-08-27 Richard Sandiford <rsandifo@redhat.com>
812
813 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
814
dc4c54bb
NC		 8152004-05-15 Nick Clifton <nickc@redhat.com>
816
817 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
818
f4453dfa
NC		 8192004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
820
821 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
822
676a64f4
RS		 8232004-03-01 Richard Sandiford <rsandifo@redhat.com>
824
825 * frv.cpu (define-arch frv): Add fr450 mach.
826 (define-mach fr450): New.
827 (define-model fr450): New. Add profile units to every fr450 insn.
828 (define-attr UNIT): Add MDCUTSSI.
829 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
830 (define-attr AUDIO): New boolean.
831 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
832 (f-LRA-null, f-TLBPR-null): New fields.
833 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
834 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
835 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
836 (LRA-null, TLBPR-null): New macros.
837 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
838 (load-real-address): New macro.
839 (lrai, lrad, tlbpr): New instructions.
840 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
841 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
842 (mdcutssi): Change UNIT attribute to MDCUTSSI.
843 (media-low-clear-semantics, media-scope-limit-semantics)
844 (media-quad-limit, media-quad-shift): New macros.
845 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
846 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
847 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
848 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
849 (fr450_unit_mapping): New array.
850 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
851 for new MDCUTSSI unit.
852 (fr450_check_insn_major_constraints): New function.
853 (check_insn_major_constraints): Use it.
854
c7a48b9a
RS		 8552004-03-01 Richard Sandiford <rsandifo@redhat.com>
856
857 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
858 (scutss): Change unit to I0.
859 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
860 (mqsaths): Fix FR400-MAJOR categorization.
861 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
862 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
863 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
864 combinations.
865
8ae0baa2
RS		 8662004-03-01 Richard Sandiford <rsandifo@redhat.com>
867
868 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
869 (rstb, rsth, rst, rstd, rstq): Delete.
870 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
871
8ee9a8b2
NC		 8722004-02-23 Nick Clifton <nickc@redhat.com>
873
874 * Apply these patches from Renesas:
875
876 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
877
878 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
879 disassembling codes for 0x*2 addresses.
880
881 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
882
883 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
884
885 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
886
887 * cpu/m32r.cpu : Add new model m32r2.
888 Add new instructions.
889 Replace occurrances of 'Mitsubishi' with 'Renesas'.
890 Changed PIPE attr of push from O to OS.
891 Care for Little-endian of M32R.
892 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
893 Care for Little-endian of M32R.
894 (parse_slo16): signed extension for value.
895
299d901c
AC		 8962004-02-20 Andrew Cagney <cagney@redhat.com>
897
e866a257
AC		 898 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
899 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
900
299d901c
AC		 901 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
902 written by Ben Elliston.
903
cb10e79a
RS		 9042004-01-14 Richard Sandiford <rsandifo@redhat.com>
905
906 * frv.cpu (UNIT): Add IACC.
907 (iacc-multiply-r-r): Use it.
908 * frv.opc (fr400_unit_mapping): Add entry for IACC.
909 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
910
d4e4dc14
AO		 9112004-01-06 Alexandre Oliva <aoliva@redhat.com>
912
913 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
914 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
915 cut&paste errors in shifting/truncating numerical operands.
916 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
917 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
918 (parse_uslo16): Likewise.
919 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
920 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
921 (parse_s12): Likewise.
922 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
923 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
924 (parse_uslo16): Likewise.
925 (parse_uhi16): Parse gothi and gotfuncdeschi.
926 (parse_d12): Parse got12 and gotfuncdesc12.
927 (parse_s12): Likewise.
928
1340b9a9
DB		 9292003-10-10 Dave Brolley <brolley@redhat.com>
930
931 * frv.cpu (dnpmop): New p-macro.
932 (GRdoublek): Use dnpmop.
933 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
934 (store-double-r-r): Use (.sym regtype doublek).
935 (r-store-double): Ditto.
936 (store-double-r-r-u): Ditto.
937 (conditional-store-double): Ditto.
938 (conditional-store-double-u): Ditto.
939 (store-double-r-simm): Ditto.
940 (fmovs): Assign to UNIT FMALL.
941
ac7c07ac
DB		 9422003-10-06 Dave Brolley <brolley@redhat.com>
943
944 * frv.cpu, frv.opc: Add support for fr550.
945
d0312406
DB		 9462003-09-24 Dave Brolley <brolley@redhat.com>
947
948 * frv.cpu (u-commit): New modelling unit for fr500.
949 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
950 (commit-r): Use u-commit model for fr500.
951 (commit): Ditto.
952 (conditional-float-binary-op): Take profiling data as an argument.
953 Update callers.
954 (ne-float-binary-op): Ditto.
955
c6945302
MS		 9562003-09-19 Michael Snyder <msnyder@redhat.com>
957
958 * frv.cpu (nldqi): Delete unimplemented instruction.
959
23600bb3
DB		 9602003-09-12 Dave Brolley <brolley@redhat.com>
961
962 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
963 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
964 frv_ref_SI to get input register referenced for profiling.
965 (clear-ne-flag-all): Pass insn profiling in as an argument.
966 (clrgr,clrfr,clrga,clrfa): Add profiling information.
967
6f18ad70
MS		 9682003-09-11 Michael Snyder <msnyder@redhat.com>
969
970 * frv.cpu: Typographical corrections.
971
96486995
DB		 9722003-09-09 Dave Brolley <brolley@redhat.com>
973
974 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
975 (conditional-media-dual-complex, media-quad-complex): Likewise.
976
0457efce
DB		 9772003-09-04 Dave Brolley <brolley@redhat.com>
978
979 * frv.cpu (register-transfer): Pass in all attributes in on argument.
980 Update all callers.
981 (conditional-register-transfer): Ditto.
982 (cache-preload): Ditto.
983 (floating-point-conversion): Ditto.
984 (floating-point-neg): Ditto.
985 (float-abs): Ditto.
986 (float-binary-op-s): Ditto.
987 (conditional-float-binary-op): Ditto.
988 (ne-float-binary-op): Ditto.
989 (float-dual-arith): Ditto.
990 (ne-float-dual-arith): Ditto.
991
8caa9169
DB		 9922003-09-03 Dave Brolley <brolley@redhat.com>
993
994 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
995 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
996 MCLRACC-1.
997 (A): Removed operand.
998 (A0,A1): New operands replace operand A.
999 (mnop): Now a real insn
1000 (mclracc): Removed insn.
1001 (mclracc-0, mclracc-1): New insns replace mclracc.
1002 (all insns): Use new UNIT attributes.
1003
6d9ab561
NC		 10042003-08-21 Nick Clifton <nickc@redhat.com>
1005
1006 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1007 and u-media-dual-btoh with output parameter.
1008 (cmbtoh): Add profiling hack.
1009
741a7751
NC		 10102003-08-19 Michael Snyder <msnyder@redhat.com>
1011
1012 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1013
5b5b78da
DE		 10142003-06-10 Doug Evans <dje@sebabeach.org>
1015
1016 * frv.cpu: Add IDOC attribute.
1017
539ee71a
AC		 10182003-06-06 Andrew Cagney <cagney@redhat.com>
1019
1020 Contributed by Red Hat.
1021 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1022 Stan Cox, and Frank Ch. Eigler.
1023 * iq2000.opc: New file. Written by Ben Elliston, Frank
1024 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1025 * iq2000m.cpu: New file. Written by Jeff Johnston.
1026 * iq10.cpu: New file. Written by Jeff Johnston.
1027
36c3ae24
NC		 10282003-06-05 Nick Clifton <nickc@redhat.com>
1029
1030 * frv.cpu (FRintieven): New operand. An even-numbered only
1031 version of the FRinti operand.
1032 (FRintjeven): Likewise for FRintj.
1033 (FRintkeven): Likewise for FRintk.
1034 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1035 media-quad-arith-sat-semantics, media-quad-arith-sat,
1036 conditional-media-quad-arith-sat, mdunpackh,
1037 media-quad-multiply-semantics, media-quad-multiply,
1038 conditional-media-quad-multiply, media-quad-complex-i,
1039 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1040 conditional-media-quad-multiply-acc, munpackh,
1041 media-quad-multiply-cross-acc-semantics, mdpackh,
1042 media-quad-multiply-cross-acc, mbtoh-semantics,
1043 media-quad-cross-multiply-cross-acc-semantics,
1044 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1045 media-quad-cross-multiply-acc-semantics, cmbtoh,
1046 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1047 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1048 cmhtob): Use new operands.
1049 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1050 (parse_even_register): New function.
36c3ae24 1051
75798298
NC		 10522003-06-03 Nick Clifton <nickc@redhat.com>
1053
1054 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1055 immediate value not unsigned.
1056
9aab5aa3
AC		 10572003-06-03 Andrew Cagney <cagney@redhat.com>
1058
1059 Contributed by Red Hat.
1060 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1061 and Eric Christopher.
1062 * frv.opc: New file. Written by Catherine Moore, and Dave
1063 Brolley.
1064 * simplify.inc: New file. Written by Doug Evans.
1065
2739f79a
AC		 10662003-05-02 Andrew Cagney <cagney@redhat.com>
1067
1068 * New file.
1069
1070\f
752937aa
NC		 1071Copyright (C) 2003-2012 Free Software Foundation, Inc.
1072
1073Copying and distribution of this file, with or without modification,
1074are permitted in any medium without royalty provided the copyright
1075notice and this notice are preserved.
1076
2739f79a
AC		 1077Local Variables:
1078mode: change-log
1079left-margin: 8
1080fill-column: 74
1081version-control: never
1082End:
GDB Binutils - Deliverables
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