[deliverable/binutils-gdb.git] / cpu / iq2000m.cpu

; IQ2000-only CPU description. -*- Scheme -*-
;
; Copyright 2000, 2001, 2002, 2004, 2007 Free Software Foundation, Inc.
;
; Contributed by Red Hat Inc; developed under contract from Vitesse.
;
; This file is part of the GNU Binutils.
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
; MA 02110-1301, USA.

(dni andoui "and upper ones immediate" (MACH2000 USES-RS USES-RT)
     "andoui $rt,$rs,$hi16"
     (+ OP_ANDOUI rs rt hi16)
     (set rt (and rs (or (sll hi16 16) #xFFFF)))
     ())

(dni andoui2 "and upper ones immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
     "andoui ${rt-rs},$hi16"
     (+ OP_ANDOUI rt-rs hi16)
     (set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
     ())

(dni orui2 "or upper immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
     "orui ${rt-rs},$hi16"
     (+ OP_ORUI rt-rs hi16)
     (set rt-rs (or rt-rs (sll hi16 16)))
     ())

(dni orui "or upper immediate" (MACH2000 USES-RS USES-RT)
     "orui $rt,$rs,$hi16"
     (+ OP_ORUI rs rt hi16)
     (set rt (or rs (sll hi16 16)))
     ())

(dni bgtz "branch if greater than zero" (MACH2000 USES-RS)
     "bgtz $rs,$offset"
     (+ OP_BGTZ rs (f-rt 0) offset)
     (if (gt rs 0)
	 (delay 1 (set pc offset)))
     ())


(dni bgtzl "branch if greater than zero likely" (MACH2000 USES-RS)
     "bgtzl $rs,$offset"
     (+ OP_BGTZL rs (f-rt 0) offset)
     (if (gt rs 0)
	 (delay 1 (set pc offset))
	 (skip 1))
     ())

(dni blez "branch if less than or equal to zero" (MACH2000 USES-RS)
     "blez $rs,$offset"
     (+ OP_BLEZ rs (f-rt 0) offset)
     (if (le rs 0)
	 (delay 1 (set pc offset)))
     ())

(dni blezl "branch if less than or equal to zero likely" (MACH2000 USES-RS)
     "blezl $rs,$offset"
     (+ OP_BLEZL rs (f-rt 0) offset)
     (if (le rs 0)
	 (delay 1 (set pc offset))
	 (skip 1))
     ())


(dni mrgb "merge bytes" (MACH2000 USES-RD USES-RS USES-RT)
     "mrgb $rd,$rs,$rt,$mask"
     (+ OP_SPECIAL rs rt rd (f-10 0) mask FUNC_MRGB)
     (sequence ((SI temp))
	       (if (bitclear? mask 0)
		   (set temp (and rs #xFF))
		   (set temp (and rt #xFF)))
	       (if (bitclear? mask 1)
		   (set temp (or temp (and rs #xFF00)))
		   (set temp (or temp (and rt #xFF00))))
	       (if (bitclear? mask 2)
		   (set temp (or temp (and rs #xFF0000)))
		   (set temp (or temp (and rt #xFF0000))))
	       (if (bitclear? mask 3)
		   (set temp (or temp (and rs #xFF000000)))
		   (set temp (or temp (and rt #xFF000000))))
	       (set rd temp))
     ())

(dni mrgb2 "merge bytes" (ALIAS NO-DIS MACH2000 USES-RD USES-RS USES-RT)
     "mrgb ${rd-rs},$rt,$mask"
     (+ OP_SPECIAL rt rd-rs (f-10 0) mask FUNC_MRGB)
     (sequence ((SI temp))
	       (if (bitclear? mask 0)
		   (set temp (and rd-rs #xFF))
		   (set temp (and rt #xFF)))
	       (if (bitclear? mask 1)
		   (set temp (or temp (and rd-rs #xFF00)))
		   (set temp (or temp (and rt #xFF00))))
	       (if (bitclear? mask 2)
		   (set temp (or temp (and rd-rs #xFF0000)))
		   (set temp (or temp (and rt #xFF0000))))
	       (if (bitclear? mask 3)
		   (set temp (or temp (and rd-rs #xFF000000)))
		   (set temp (or temp (and rt #xFF000000))))
	       (set rd-rs temp))
     ())

; NOTE: None of these instructions' semantics are specified, so they
; will not work in a simulator.
;
; Architectural and coprocessor instructions.
; BREAK and SYSCALL are implemented with escape hatches to the C
; code.  These are used by the test suite to indicate pass/failures.

(dni bctxt "branch and switch context" (MACH2000 DELAY-SLOT COND-CTI USES-RS)
     "bctxt $rs,$offset"
     (+ OP_REGIMM rs (f-rt 6) offset)
     (unimp bctxt)
     ())

(dni bc0f "branch if copro 0 condition false" (MACH2000 DELAY-SLOT COND-CTI)
     "bc0f $offset"
     (+ OP_COP0 (f-rs 8) (f-rt 0) offset)
     (unimp bc0f)
     ())

(dni bc0fl "branch if copro 0 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
     "bc0fl $offset"
     (+ OP_COP0 (f-rs 8) (f-rt 2) offset)
     (unimp bc0fl)
     ())

(dni bc3f "branch if copro 3 condition false" (MACH2000 DELAY-SLOT COND-CTI)
     "bc3f $offset"
     (+ OP_COP3 (f-rs 8) (f-rt 0) offset)
     (unimp bc3f)
     ())

(dni bc3fl "branch if copro 3 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
     "bc3fl $offset"
     (+ OP_COP3 (f-rs 8) (f-rt 2) offset)
     (unimp bc3fl)
     ())

(dni bc0t "branch if copro 0 condition true" (MACH2000 DELAY-SLOT COND-CTI)
     "bc0t $offset"
     (+ OP_COP0 (f-rs 8) (f-rt 1) offset)
     (unimp bc0t)
     ())

(dni bc0tl "branch if copro 0 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
     "bc0tl $offset"
     (+ OP_COP0 (f-rs 8) (f-rt 3) offset)
     (unimp bc0tl)
     ())

(dni bc3t "branch if copro 3 condition true" (MACH2000 DELAY-SLOT COND-CTI)
     "bc3t $offset"
     (+ OP_COP3 (f-rs 8) (f-rt 1) offset)
     (unimp bc3t)
     ())

(dni bc3tl "branch if copro 3 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
     "bc3tl $offset"
     (+ OP_COP3 (f-rs 8) (f-rt 3) offset)
     (unimp bc3tl)
     ())

; Note that we don't set the USES-RD or USES-RT attributes for many of the following 
; instructions, as it's the COP register that's being specified.

(dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
     "cfc0 $rt,$rd"
     (+ OP_COP0 (f-rs 2) rt rd (f-10-11 0))
     (unimp cfc0)
     ())

(dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
     "cfc1 $rt,$rd"
     (+ OP_COP1 (f-rs 2) rt rd (f-10-11 0))
     (unimp cfc1)
     ())

(dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
     "cfc2 $rt,$rd"
     (+ OP_COP2 (f-rs 2) rt rd (f-10-11 0))
     (unimp cfc2)
     ())

(dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
     "cfc3 $rt,$rd"
     (+ OP_COP3 (f-rs 2) rt rd (f-10-11 0))
     (unimp cfc3)
     ())

; COPz instructions are an instruction form, not real instructions
; with associated assembly mnemonics.  Therefore, they are omitted
; from the ISA description.

(dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
     "chkhdr $rd,$rt"
     (+ OP_COP3 (f-rs 9) rt rd (f-shamt 0) (f-func 0))
     (unimp chkhdr)
     ())

(dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT)
     "ctc0 $rt,$rd"
     (+ OP_COP0 (f-rs 6) rt rd (f-10-11 0))
     (unimp ctc0)
     ())

(dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT)
     "ctc1 $rt,$rd"
     (+ OP_COP1 (f-rs 6) rt rd (f-10-11 0))
     (unimp ctc1)
     ())

(dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT)
     "ctc2 $rt,$rd"
     (+ OP_COP2 (f-rs 6) rt rd (f-10-11 0))
     (unimp ctc2)
     ())

(dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT)
     "ctc3 $rt,$rd"
     (+ OP_COP3 (f-rs 6) rt rd (f-10-11 0))
     (unimp ctc3)
     ())

(dni jcr "jump context register" (MACH2000 DELAY-SLOT UNCOND-CTI USES-RS)
     "jcr $rs"
     (+ OP_SPECIAL rs (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_JCR)
     (unimp jcr)
     ())

(dni luc32 "lookup chain 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "luc32 $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
     (unimp luc32)
     ())

(dni luc32l "lookup chain 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "luc32l $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
     (unimp luc32l)
     ())

(dni luc64 "lookup chain 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "luc64 $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 11))
     (unimp luc64)
     ())

(dni luc64l "lookup chain 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "luc64l $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 15))
     (unimp luc64l)
     ())

(dni luk "lookup key" (MACH2000 USES-RD USES-RT)
     "luk $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 8))
     (unimp luk)
     ())

(dni lulck "lookup lock" (MACH2000 USES-RT YIELD-INSN)
     "lulck $rt"
     (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 4))
     (unimp lulck)
     ())

(dni lum32 "lookup match 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "lum32 $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
     (unimp lum32)
     ())

(dni lum32l "lookup match 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "lum32l $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
     (unimp lum32l)
     ())

(dni lum64 "lookup match 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "lum64 $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 10))
     (unimp lum64)
     ())

(dni lum64l "lookup match 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "lum64l $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 14))
     (unimp lum64l)
     ())

(dni lur "lookup read" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "lur $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
     (unimp lur)
     ())

(dni lurl "lookup read and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "lurl $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 5))
     (unimp lurl)
     ())

(dni luulck "lookup unlock" (MACH2000 USES-RT YIELD-INSN)
     "luulck $rt"
     (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 0))
     (unimp luulck)
     ())

(dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
     "mfc0 $rt,$rd"
     (+ OP_COP0 (f-rs 0) rt rd (f-10-11 0))
     (unimp mfc0)
     ())

(dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
     "mfc1 $rt,$rd"
     (+ OP_COP1 (f-rs 0) rt rd (f-10-11 0))
     (unimp mfc1)
     ())

(dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
     "mfc2 $rt,$rd"
     (+ OP_COP2 (f-rs 0) rt rd (f-10-11 0))
     (unimp mfc2)
     ())

(dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
     "mfc3 $rt,$rd"
     (+ OP_COP3 (f-rs 0) rt rd (f-10-11 0))
     (unimp mfc3)
     ())

(dni mtc0 "move to coprocessor 0" (MACH2000 USES-RT)
     "mtc0 $rt,$rd"
     (+ OP_COP0 (f-rs 4) rt rd (f-10-11 0))
     (unimp mtc0)
     ())

(dni mtc1 "move to coprocessor 1" (MACH2000 USES-RT)
     "mtc1 $rt,$rd"
     (+ OP_COP1 (f-rs 4) rt rd (f-10-11 0))
     (unimp mtc1)
     ())

(dni mtc2 "move to coprocessor 2" (MACH2000 USES-RT)
     "mtc2 $rt,$rd"
     (+ OP_COP2 (f-rs 4) rt rd (f-10-11 0))
     (unimp mtc2)
     ())

(dni mtc3 "move to coprocessor 3" (MACH2000 USES-RT)
     "mtc3 $rt,$rd"
     (+ OP_COP3 (f-rs 4) rt rd (f-10-11 0))
     (unimp mtc3)
     ())

(dni pkrl "pkrl" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "pkrl $rd,$rt"
     (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
     (unimp pkrl)
     ())

(dni pkrlr1 "pkrlr1" (MACH2000 USES-RT YIELD-INSN)
     "pkrlr1 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 29) rt count _index)
     (unimp pkrlr1)
     ())

(dni pkrlr30 "pkrlr30" (MACH2000 USES-RT YIELD-INSN)
     "pkrlr30 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 31) rt count _index)
     (unimp pkrlr30)
     ())

(dni rb "dma read bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "rb $rd,$rt"
     (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 4))
     (unimp rb)
     ())

(dni rbr1 "dma read bytes using r1" (MACH2000 USES-RT YIELD-INSN)
     "rbr1 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 24) rt count _index)
     (unimp rbr1)
     ())

(dni rbr30 "dma read bytes using r30" (MACH2000 USES-RT YIELD-INSN)
     "rbr30 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 26) rt count _index)
     (unimp rbr30)
     ())

(dni rfe "restore from exception" (MACH2000)
     "rfe"
     (+ OP_COP0 (f-25 1) (f-24-19 0) (f-func 16))
     (unimp rfe)
     ())

(dni rx "dma read word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "rx $rd,$rt"
     (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
     (unimp rx)
     ())

(dni rxr1 "dma read word64s using r1" (MACH2000 USES-RT YIELD-INSN)
     "rxr1 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 28) rt count _index)
     (unimp rxr1)
     ())

(dni rxr30 "dma read word 64s using r30" (MACH2000 USES-RT YIELD-INSN)
     "rxr30 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 30) rt count _index)
     (unimp rxr30)
     ())

(dni sleep "sleep" (MACH2000 YIELD-INSN)
     "sleep"
     (+ OP_SPECIAL execode FUNC_SLEEP)
     (unimp sleep)
     ())

(dni srrd "sram read" (MACH2000 USES-RT YIELD-INSN)
     "srrd $rt"
     (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 16))
     (unimp srrd)
     ())

(dni srrdl "sram read and lock" (MACH2000 USES-RT YIELD-INSN)
     "srrdl $rt"
     (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 20))
     (unimp srrdl)
     ())

(dni srulck "sram unlock" (MACH2000 USES-RT YIELD-INSN)
     "srulck $rt"
     (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 22))
     (unimp srulck)
     ())

(dni srwr "sram write" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "srwr $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 17))
     (unimp srwr)
     ())

(dni srwru "sram write and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "srwru $rt,$rd"
     (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 21))
     (unimp srwru)
     ())

(dni trapqfl "yield if dma queue full" (MACH2000 YIELD-INSN)
     "trapqfl"
     (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 8))
     (unimp trapqfl)
     ())

(dni trapqne "yield if dma queue not empty" (MACH2000 YIELD-INSN)
     "trapqne"
     (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 9))
     (unimp trapqne)
     ())

(dni traprel "traprel" (MACH2000 USES-RT YIELD-INSN)
     "traprel $rt"
     (+ OP_COP3 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 10))
     (unimp traprel)
     ())

(dni wb "dma write bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "wb $rd,$rt"
     (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 0))
     (unimp wb)
     ())

(dni wbu "dma write bytes and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "wbu $rd,$rt"
     (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
     (unimp wbu)
     ())

(dni wbr1 "dma write bytes using r1" (MACH2000 USES-RT YIELD-INSN)
     "wbr1 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 16) rt count _index)
     (unimp wbr1)
     ())

(dni wbr1u "dma write bytes using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
     "wbr1u $rt,$_index,$count"
     (+ OP_COP3 (f-rs 17) rt count _index)
     (unimp wbr1u)
     ())

(dni wbr30 "dma write bytes using r30" (MACH2000 USES-RT YIELD-INSN)
     "wbr30 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 18) rt count _index)
     (unimp wbr30)
     ())

(dni wbr30u "dma write bytes using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
     "wbr30u $rt,$_index,$count"
     (+ OP_COP3 (f-rs 19) rt count _index)
     (unimp wbr30u)
     ())

(dni wx "dma write word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "wx $rd,$rt"
     (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
     (unimp wx)
     ())

(dni wxu "dma write word64s and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
     "wxu $rd,$rt"
     (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
     (unimp wxu)
     ())

(dni wxr1 "dma write word64s using r1" (MACH2000 USES-RT YIELD-INSN)
     "wxr1 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 20) rt count _index)
     (unimp wxr1)
     ())

(dni wxr1u "dma write word64s using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
     "wxr1u $rt,$_index,$count"
     (+ OP_COP3 (f-rs 21) rt count _index)
     (unimp wxr1u)
     ())

(dni wxr30 "dma write word64s using r30" (MACH2000 USES-RT YIELD-INSN)
     "wxr30 $rt,$_index,$count"
     (+ OP_COP3 (f-rs 22) rt count _index)
     (unimp wxr30)
     ())

(dni wxr30u "dma write word64s using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
     "wxr30u $rt,$_index,$count"
     (+ OP_COP3 (f-rs 23) rt count _index)
     (unimp wxr30u)
     ())


; Load/Store instructions.

(dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
     "ldw $rt,$lo16($base)"
     (+ OP_LDW base rt lo16)
     (sequence ((SI addr))
	       (set addr (and (add base lo16) (inv 3)))
	       (set (reg h-gr (add (ifield f-rt) 1)) (mem SI addr))
	       (set rt (mem SI (add addr 4))))
     ())

(dni sdw "store double word" (MACH2000 EVEN-REG-NUM USES-RT)
     "sdw $rt,$lo16($base)"
     (+ OP_SDW base rt lo16)
     (sequence ((SI addr))
	       (set addr (and (add base lo16) (inv 3)))
	       (set (mem SI (add addr 4)) rt)
	       (set (mem SI addr) (reg h-gr (add (ifield f-rt) 1))))
     ())


; Jump instructions

(dni j "jump" (MACH2000)
     "j $jmptarg"
     (+ OP_J (f-rsrvd 0) jmptarg)
     (delay 1 (set pc jmptarg))
     ())

(dni jal "jump and link" (MACH2000 USES-R31)
     "jal $jmptarg"
     (+ OP_JAL (f-rsrvd 0) jmptarg)
     (delay 1
	    (sequence ()
		      (set (reg h-gr 31) (add pc 8))
		      (set pc jmptarg)))
     ())

(dni bmb "branch if matching byte-lane" (MACH2000 USES-RS USES-RT)
     "bmb $rs,$rt,$offset"
     (+ OP_BMB rs rt offset)
     (sequence ((BI branch?))
	       (set branch? 0)
	       (if (eq (and rs #xFF) (and rt #xFF))
		   (set branch? 1))
	       (if (eq (and rs #xFF00) (and rt #xFF00))
		   (set branch? 1))
	       (if (eq (and rs #xFF0000) (and rt #xFF0000))
		   (set branch? 1))
	       (if (eq (and rs #xFF000000) (and rt #xFF000000))
		   (set branch? 1))
	       (if branch?
		   (delay 1 (set pc offset))))
     ())


; Macros

(dnmi ldw-base-0 "load double word - implied base 0" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT USES-RS NO-DIS)
      "ldw $rt,$lo16"
      (emit ldw rt lo16 (base 0))
)

(dnmi sdw-base-0 "store double word - implied base 0" (MACH2000 EVEN-REG-NUM USES-RT NO-DIS)
      "sdw $rt,$lo16"
      (emit sdw rt lo16 (base 0))
)
Commit	Line	Data
539ee71a AC	1	; IQ2000-only CPU description. -- Scheme --
539ee71a AC	2	;
9b201bb5	3	; Copyright 2000, 2001, 2002, 2004, 2007 Free Software Foundation, Inc.
539ee71a AC	4	;
	5	; Contributed by Red Hat Inc; developed under contract from Vitesse.
	6	;
	7	; This file is part of the GNU Binutils.
	8	;
	9	; This program is free software; you can redistribute it and/or modify
	10	; it under the terms of the GNU General Public License as published by
9b201bb5	11	; the Free Software Foundation; either version 3 of the License, or
539ee71a AC	12	; (at your option) any later version.
	13	;
	14	; This program is distributed in the hope that it will be useful,
	15	; but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	; GNU General Public License for more details.
	18	;
	19	; You should have received a copy of the GNU General Public License
	20	; along with this program; if not, write to the Free Software
9b201bb5 NC	21	; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
9b201bb5 NC	22	; MA 02110-1301, USA.
539ee71a AC	23
	24	(dni andoui "and upper ones immediate" (MACH2000 USES-RS USES-RT)
	25	"andoui $rt,$rs,$hi16"
	26	(+ OP_ANDOUI rs rt hi16)
	27	(set rt (and rs (or (sll hi16 16) #xFFFF)))
	28	())
	29
	30	(dni andoui2 "and upper ones immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
	31	"andoui ${rt-rs},$hi16"
	32	(+ OP_ANDOUI rt-rs hi16)
	33	(set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
	34	())
	35
	36	(dni orui2 "or upper immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
	37	"orui ${rt-rs},$hi16"
	38	(+ OP_ORUI rt-rs hi16)
	39	(set rt-rs (or rt-rs (sll hi16 16)))
	40	())
	41
	42	(dni orui "or upper immediate" (MACH2000 USES-RS USES-RT)
	43	"orui $rt,$rs,$hi16"
	44	(+ OP_ORUI rs rt hi16)
	45	(set rt (or rs (sll hi16 16)))
	46	())
	47
	48	(dni bgtz "branch if greater than zero" (MACH2000 USES-RS)
	49	"bgtz $rs,$offset"
	50	(+ OP_BGTZ rs (f-rt 0) offset)
	51	(if (gt rs 0)
	52	(delay 1 (set pc offset)))
	53	())
	54
	55
	56	(dni bgtzl "branch if greater than zero likely" (MACH2000 USES-RS)
	57	"bgtzl $rs,$offset"
	58	(+ OP_BGTZL rs (f-rt 0) offset)
	59	(if (gt rs 0)
	60	(delay 1 (set pc offset))
	61	(skip 1))
	62	())
	63
	64	(dni blez "branch if less than or equal to zero" (MACH2000 USES-RS)
	65	"blez $rs,$offset"
	66	(+ OP_BLEZ rs (f-rt 0) offset)
	67	(if (le rs 0)
	68	(delay 1 (set pc offset)))
	69	())
	70
	71	(dni blezl "branch if less than or equal to zero likely" (MACH2000 USES-RS)
	72	"blezl $rs,$offset"
	73	(+ OP_BLEZL rs (f-rt 0) offset)
	74	(if (le rs 0)
	75	(delay 1 (set pc offset))
	76	(skip 1))
	77	())
	78
	79
	80	(dni mrgb "merge bytes" (MACH2000 USES-RD USES-RS USES-RT)
	81	"mrgb $rd,$rs,$rt,$mask"
	82	(+ OP_SPECIAL rs rt rd (f-10 0) mask FUNC_MRGB)
	83	(sequence ((SI temp))
	84	(if (bitclear? mask 0)
	85	(set temp (and rs #xFF))
	86	(set temp (and rt #xFF)))
87	(if (bitclear? mask 1)
88	(set temp (or temp (and rs #xFF00)))
89	(set temp (or temp (and rt #xFF00))))
90	(if (bitclear? mask 2)
91	(set temp (or temp (and rs #xFF0000)))
92	(set temp (or temp (and rt #xFF0000))))
93	(if (bitclear? mask 3)
94	(set temp (or temp (and rs #xFF000000)))
95	(set temp (or temp (and rt #xFF000000))))
96	(set rd temp))
97	())
98
99	(dni mrgb2 "merge bytes" (ALIAS NO-DIS MACH2000 USES-RD USES-RS USES-RT)
100	"mrgb ${rd-rs},$rt,$mask"
101	(+ OP_SPECIAL rt rd-rs (f-10 0) mask FUNC_MRGB)
102	(sequence ((SI temp))
103	(if (bitclear? mask 0)
104	(set temp (and rd-rs #xFF))
105	(set temp (and rt #xFF)))
106	(if (bitclear? mask 1)
107	(set temp (or temp (and rd-rs #xFF00)))
108	(set temp (or temp (and rt #xFF00))))
109	(if (bitclear? mask 2)
110	(set temp (or temp (and rd-rs #xFF0000)))
111	(set temp (or temp (and rt #xFF0000))))
112	(if (bitclear? mask 3)
113	(set temp (or temp (and rd-rs #xFF000000)))
114	(set temp (or temp (and rt #xFF000000))))
115	(set rd-rs temp))
116	())
117
118	; NOTE: None of these instructions' semantics are specified, so they
119	; will not work in a simulator.
120	;
121	; Architectural and coprocessor instructions.
122	; BREAK and SYSCALL are implemented with escape hatches to the C
123	; code. These are used by the test suite to indicate pass/failures.
124
125	(dni bctxt "branch and switch context" (MACH2000 DELAY-SLOT COND-CTI USES-RS)
126	"bctxt $rs,$offset"
127	(+ OP_REGIMM rs (f-rt 6) offset)
128	(unimp bctxt)
129	())
130
131	(dni bc0f "branch if copro 0 condition false" (MACH2000 DELAY-SLOT COND-CTI)
132	"bc0f $offset"
133	(+ OP_COP0 (f-rs 8) (f-rt 0) offset)
134	(unimp bc0f)
135	())
136
137	(dni bc0fl "branch if copro 0 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
138	"bc0fl $offset"
139	(+ OP_COP0 (f-rs 8) (f-rt 2) offset)
140	(unimp bc0fl)
141	())
142
143	(dni bc3f "branch if copro 3 condition false" (MACH2000 DELAY-SLOT COND-CTI)
144	"bc3f $offset"
145	(+ OP_COP3 (f-rs 8) (f-rt 0) offset)
146	(unimp bc3f)
147	())
148
149	(dni bc3fl "branch if copro 3 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
150	"bc3fl $offset"
151	(+ OP_COP3 (f-rs 8) (f-rt 2) offset)
152	(unimp bc3fl)
153	())
154
155	(dni bc0t "branch if copro 0 condition true" (MACH2000 DELAY-SLOT COND-CTI)
156	"bc0t $offset"
157	(+ OP_COP0 (f-rs 8) (f-rt 1) offset)
158	(unimp bc0t)
159	())
160
161	(dni bc0tl "branch if copro 0 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
162	"bc0tl $offset"
163	(+ OP_COP0 (f-rs 8) (f-rt 3) offset)
164	(unimp bc0tl)
165	())
166
167	(dni bc3t "branch if copro 3 condition true" (MACH2000 DELAY-SLOT COND-CTI)
168	"bc3t $offset"
169	(+ OP_COP3 (f-rs 8) (f-rt 1) offset)
170	(unimp bc3t)
171	())
172
173	(dni bc3tl "branch if copro 3 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
174	"bc3tl $offset"
175	(+ OP_COP3 (f-rs 8) (f-rt 3) offset)
176	(unimp bc3tl)
177	())
178
179	; Note that we don't set the USES-RD or USES-RT attributes for many of the following
180	; instructions, as it's the COP register that's being specified.
181
182	(dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
183	"cfc0 $rt,$rd"
184	(+ OP_COP0 (f-rs 2) rt rd (f-10-11 0))
185	(unimp cfc0)
186	())
187
188	(dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
189	"cfc1 $rt,$rd"
190	(+ OP_COP1 (f-rs 2) rt rd (f-10-11 0))
191	(unimp cfc1)
192	())
193
194	(dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
195	"cfc2 $rt,$rd"
196	(+ OP_COP2 (f-rs 2) rt rd (f-10-11 0))
197	(unimp cfc2)
198	())
199
200	(dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
201	"cfc3 $rt,$rd"
202	(+ OP_COP3 (f-rs 2) rt rd (f-10-11 0))
203	(unimp cfc3)
204	())
205
206	; COPz instructions are an instruction form, not real instructions
207	; with associated assembly mnemonics. Therefore, they are omitted
208	; from the ISA description.
209
210	(dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
211	"chkhdr $rd,$rt"
212	(+ OP_COP3 (f-rs 9) rt rd (f-shamt 0) (f-func 0))
213	(unimp chkhdr)
214	())
215
216	(dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT)
217	"ctc0 $rt,$rd"
218	(+ OP_COP0 (f-rs 6) rt rd (f-10-11 0))
219	(unimp ctc0)
220	())
221
222	(dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT)
223	"ctc1 $rt,$rd"
224	(+ OP_COP1 (f-rs 6) rt rd (f-10-11 0))
225	(unimp ctc1)
226	())
227
228	(dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT)
229	"ctc2 $rt,$rd"
230	(+ OP_COP2 (f-rs 6) rt rd (f-10-11 0))
231	(unimp ctc2)
232	())
233
234	(dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT)
235	"ctc3 $rt,$rd"
236	(+ OP_COP3 (f-rs 6) rt rd (f-10-11 0))
237	(unimp ctc3)
238	())
239
240	(dni jcr "jump context register" (MACH2000 DELAY-SLOT UNCOND-CTI USES-RS)
241	"jcr $rs"
242	(+ OP_SPECIAL rs (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_JCR)
243	(unimp jcr)
244	())
245
246	(dni luc32 "lookup chain 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
247	"luc32 $rt,$rd"
248	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
249	(unimp luc32)
250	())
251
252	(dni luc32l "lookup chain 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
253	"luc32l $rt,$rd"
254	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
255	(unimp luc32l)
256	())
257
258	(dni luc64 "lookup chain 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
259	"luc64 $rt,$rd"
260	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 11))
261	(unimp luc64)
262	())
263
264	(dni luc64l "lookup chain 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
265	"luc64l $rt,$rd"
266	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 15))
267	(unimp luc64l)
268	())
269
270	(dni luk "lookup key" (MACH2000 USES-RD USES-RT)
271	"luk $rt,$rd"
272	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 8))
273	(unimp luk)
274	())
275
276	(dni lulck "lookup lock" (MACH2000 USES-RT YIELD-INSN)
277	"lulck $rt"
278	(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 4))
279	(unimp lulck)
280	())
281
282	(dni lum32 "lookup match 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
283	"lum32 $rt,$rd"
284	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
285	(unimp lum32)
286	())
287
288	(dni lum32l "lookup match 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
289	"lum32l $rt,$rd"
290	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
291	(unimp lum32l)
292	())
293
294	(dni lum64 "lookup match 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
295	"lum64 $rt,$rd"
296	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 10))
297	(unimp lum64)
298	())
299
300	(dni lum64l "lookup match 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
301	"lum64l $rt,$rd"
302	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 14))
303	(unimp lum64l)
304	())
305
306	(dni lur "lookup read" (MACH2000 USES-RD USES-RT YIELD-INSN)
307	"lur $rt,$rd"
308	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
309	(unimp lur)
310	())
311
312	(dni lurl "lookup read and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
313	"lurl $rt,$rd"
314	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 5))
315	(unimp lurl)
316	())
317
318	(dni luulck "lookup unlock" (MACH2000 USES-RT YIELD-INSN)
319	"luulck $rt"
320	(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 0))
321	(unimp luulck)
322	())
323
324	(dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
325	"mfc0 $rt,$rd"
326	(+ OP_COP0 (f-rs 0) rt rd (f-10-11 0))
327	(unimp mfc0)
328	())
329
330	(dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
331	"mfc1 $rt,$rd"
332	(+ OP_COP1 (f-rs 0) rt rd (f-10-11 0))
333	(unimp mfc1)
334	())
335
336	(dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
337	"mfc2 $rt,$rd"
338	(+ OP_COP2 (f-rs 0) rt rd (f-10-11 0))
339	(unimp mfc2)
340	())
341
342	(dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
343	"mfc3 $rt,$rd"
344	(+ OP_COP3 (f-rs 0) rt rd (f-10-11 0))
345	(unimp mfc3)
346	())
347
348	(dni mtc0 "move to coprocessor 0" (MACH2000 USES-RT)
349	"mtc0 $rt,$rd"
350	(+ OP_COP0 (f-rs 4) rt rd (f-10-11 0))
351	(unimp mtc0)
352	())
353
354	(dni mtc1 "move to coprocessor 1" (MACH2000 USES-RT)
355	"mtc1 $rt,$rd"
356	(+ OP_COP1 (f-rs 4) rt rd (f-10-11 0))
357	(unimp mtc1)
358	())
359
360	(dni mtc2 "move to coprocessor 2" (MACH2000 USES-RT)
361	"mtc2 $rt,$rd"
362	(+ OP_COP2 (f-rs 4) rt rd (f-10-11 0))
363	(unimp mtc2)
364	())
365
366	(dni mtc3 "move to coprocessor 3" (MACH2000 USES-RT)
367	"mtc3 $rt,$rd"
368	(+ OP_COP3 (f-rs 4) rt rd (f-10-11 0))
369	(unimp mtc3)
370	())
371
372	(dni pkrl "pkrl" (MACH2000 USES-RD USES-RT YIELD-INSN)
373	"pkrl $rd,$rt"
374	(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
375	(unimp pkrl)
376	())
377
378	(dni pkrlr1 "pkrlr1" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	379	"pkrlr1 $rt,$_index,$count"
4030fa5a NC	380	(+ OP_COP3 (f-rs 29) rt count _index)
539ee71a AC	381	(unimp pkrlr1)
	382	())
	383
	384	(dni pkrlr30 "pkrlr30" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	385	"pkrlr30 $rt,$_index,$count"
4030fa5a NC	386	(+ OP_COP3 (f-rs 31) rt count _index)
539ee71a AC	387	(unimp pkrlr30)
	388	())
	389
	390	(dni rb "dma read bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
	391	"rb $rd,$rt"
	392	(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 4))
	393	(unimp rb)
	394	())
	395
	396	(dni rbr1 "dma read bytes using r1" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	397	"rbr1 $rt,$_index,$count"
4030fa5a NC	398	(+ OP_COP3 (f-rs 24) rt count _index)
539ee71a AC	399	(unimp rbr1)
	400	())
	401
	402	(dni rbr30 "dma read bytes using r30" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	403	"rbr30 $rt,$_index,$count"
4030fa5a NC	404	(+ OP_COP3 (f-rs 26) rt count _index)
539ee71a AC	405	(unimp rbr30)
	406	())
	407
	408	(dni rfe "restore from exception" (MACH2000)
	409	"rfe"
	410	(+ OP_COP0 (f-25 1) (f-24-19 0) (f-func 16))
	411	(unimp rfe)
	412	())
	413
	414	(dni rx "dma read word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
	415	"rx $rd,$rt"
	416	(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
	417	(unimp rx)
	418	())
	419
	420	(dni rxr1 "dma read word64s using r1" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	421	"rxr1 $rt,$_index,$count"
4030fa5a NC	422	(+ OP_COP3 (f-rs 28) rt count _index)
539ee71a AC	423	(unimp rxr1)
	424	())
	425
	426	(dni rxr30 "dma read word 64s using r30" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	427	"rxr30 $rt,$_index,$count"
4030fa5a NC	428	(+ OP_COP3 (f-rs 30) rt count _index)
539ee71a AC	429	(unimp rxr30)
	430	())
	431
	432	(dni sleep "sleep" (MACH2000 YIELD-INSN)
	433	"sleep"
	434	(+ OP_SPECIAL execode FUNC_SLEEP)
	435	(unimp sleep)
	436	())
	437
	438	(dni srrd "sram read" (MACH2000 USES-RT YIELD-INSN)
	439	"srrd $rt"
	440	(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 16))
	441	(unimp srrd)
	442	())
	443
	444	(dni srrdl "sram read and lock" (MACH2000 USES-RT YIELD-INSN)
	445	"srrdl $rt"
	446	(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 20))
	447	(unimp srrdl)
	448	())
	449
	450	(dni srulck "sram unlock" (MACH2000 USES-RT YIELD-INSN)
	451	"srulck $rt"
	452	(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 22))
	453	(unimp srulck)
	454	())
	455
	456	(dni srwr "sram write" (MACH2000 USES-RD USES-RT YIELD-INSN)
	457	"srwr $rt,$rd"
	458	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 17))
	459	(unimp srwr)
	460	())
	461
	462	(dni srwru "sram write and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
	463	"srwru $rt,$rd"
	464	(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 21))
	465	(unimp srwru)
	466	())
	467
	468	(dni trapqfl "yield if dma queue full" (MACH2000 YIELD-INSN)
	469	"trapqfl"
	470	(+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 8))
	471	(unimp trapqfl)
	472	())
	473
	474	(dni trapqne "yield if dma queue not empty" (MACH2000 YIELD-INSN)
	475	"trapqne"
	476	(+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 9))
	477	(unimp trapqne)
	478	())
	479
	480	(dni traprel "traprel" (MACH2000 USES-RT YIELD-INSN)
	481	"traprel $rt"
	482	(+ OP_COP3 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 10))
	483	(unimp traprel)
	484	())
	485
	486	(dni wb "dma write bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
	487	"wb $rd,$rt"
	488	(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 0))
	489	(unimp wb)
	490	())
	491
	492	(dni wbu "dma write bytes and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
493	"wbu $rd,$rt"
494	(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
495	(unimp wbu)
496	())
497
498	(dni wbr1 "dma write bytes using r1" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	499	"wbr1 $rt,$_index,$count"
4030fa5a NC	500	(+ OP_COP3 (f-rs 16) rt count _index)
539ee71a AC	501	(unimp wbr1)
	502	())
	503
	504	(dni wbr1u "dma write bytes using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	505	"wbr1u $rt,$_index,$count"
4030fa5a NC	506	(+ OP_COP3 (f-rs 17) rt count _index)
539ee71a AC	507	(unimp wbr1u)
	508	())
	509
	510	(dni wbr30 "dma write bytes using r30" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	511	"wbr30 $rt,$_index,$count"
4030fa5a NC	512	(+ OP_COP3 (f-rs 18) rt count _index)
539ee71a AC	513	(unimp wbr30)
	514	())
	515
	516	(dni wbr30u "dma write bytes using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	517	"wbr30u $rt,$_index,$count"
4030fa5a NC	518	(+ OP_COP3 (f-rs 19) rt count _index)
539ee71a AC	519	(unimp wbr30u)
	520	())
	521
	522	(dni wx "dma write word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
	523	"wx $rd,$rt"
	524	(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
	525	(unimp wx)
	526	())
	527
	528	(dni wxu "dma write word64s and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
	529	"wxu $rd,$rt"
	530	(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
	531	(unimp wxu)
	532	())
	533
	534	(dni wxr1 "dma write word64s using r1" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	535	"wxr1 $rt,$_index,$count"
4030fa5a NC	536	(+ OP_COP3 (f-rs 20) rt count _index)
539ee71a AC	537	(unimp wxr1)
	538	())
	539
	540	(dni wxr1u "dma write word64s using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	541	"wxr1u $rt,$_index,$count"
4030fa5a NC	542	(+ OP_COP3 (f-rs 21) rt count _index)
539ee71a AC	543	(unimp wxr1u)
	544	())
	545
	546	(dni wxr30 "dma write word64s using r30" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	547	"wxr30 $rt,$_index,$count"
4030fa5a NC	548	(+ OP_COP3 (f-rs 22) rt count _index)
539ee71a AC	549	(unimp wxr30)
	550	())
	551
	552	(dni wxr30u "dma write word64s using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
4030fa5a NC	553	"wxr30u $rt,$_index,$count"
4030fa5a NC	554	(+ OP_COP3 (f-rs 23) rt count _index)
539ee71a AC	555	(unimp wxr30u)
	556	())
	557
	558
	559	; Load/Store instructions.
	560
	561	(dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
	562	"ldw $rt,$lo16($base)"
	563	(+ OP_LDW base rt lo16)
	564	(sequence ((SI addr))
	565	(set addr (and (add base lo16) (inv 3)))
	566	(set (reg h-gr (add (ifield f-rt) 1)) (mem SI addr))
	567	(set rt (mem SI (add addr 4))))
	568	())
	569
	570	(dni sdw "store double word" (MACH2000 EVEN-REG-NUM USES-RT)
	571	"sdw $rt,$lo16($base)"
	572	(+ OP_SDW base rt lo16)
	573	(sequence ((SI addr))
	574	(set addr (and (add base lo16) (inv 3)))
	575	(set (mem SI (add addr 4)) rt)
	576	(set (mem SI addr) (reg h-gr (add (ifield f-rt) 1))))
	577	())
	578
	579
	580	; Jump instructions
	581
	582	(dni j "jump" (MACH2000)
	583	"j $jmptarg"
	584	(+ OP_J (f-rsrvd 0) jmptarg)
	585	(delay 1 (set pc jmptarg))
	586	())
	587
	588	(dni jal "jump and link" (MACH2000 USES-R31)
	589	"jal $jmptarg"
	590	(+ OP_JAL (f-rsrvd 0) jmptarg)
	591	(delay 1
	592	(sequence ()
	593	(set (reg h-gr 31) (add pc 8))
	594	(set pc jmptarg)))
	595	())
	596
	597	(dni bmb "branch if matching byte-lane" (MACH2000 USES-RS USES-RT)
	598	"bmb $rs,$rt,$offset"
	599	(+ OP_BMB rs rt offset)
	600	(sequence ((BI branch?))
	601	(set branch? 0)
	602	(if (eq (and rs #xFF) (and rt #xFF))
	603	(set branch? 1))
	604	(if (eq (and rs #xFF00) (and rt #xFF00))
	605	(set branch? 1))
	606	(if (eq (and rs #xFF0000) (and rt #xFF0000))
	607	(set branch? 1))
	608	(if (eq (and rs #xFF000000) (and rt #xFF000000))
	609	(set branch? 1))
	610	(if branch?
	611	(delay 1 (set pc offset))))
	612	())
	613
	614
	615	; Macros
	616
	617	(dnmi ldw-base-0 "load double word - implied base 0" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT USES-RS NO-DIS)
	618	"ldw $rt,$lo16"
619	(emit ldw rt lo16 (base 0))
620	)
621
622	(dnmi sdw-base-0 "store double word - implied base 0" (MACH2000 EVEN-REG-NUM USES-RT NO-DIS)
623	"sdw $rt,$lo16"
624	(emit sdw rt lo16 (base 0))
625	)
626
627
628
629
630
631