Commit | Line | Data |
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9bc89cd8 DW |
1 | /* |
2 | * xor offload engine api | |
3 | * | |
4 | * Copyright © 2006, Intel Corporation. | |
5 | * | |
6 | * Dan Williams <dan.j.williams@intel.com> | |
7 | * | |
8 | * with architecture considerations by: | |
9 | * Neil Brown <neilb@suse.de> | |
10 | * Jeff Garzik <jeff@garzik.org> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms and conditions of the GNU General Public License, | |
14 | * version 2, as published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope it will be useful, but WITHOUT | |
17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
19 | * more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along with | |
22 | * this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
24 | * | |
25 | */ | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/interrupt.h> | |
4bb33cc8 | 28 | #include <linux/module.h> |
9bc89cd8 DW |
29 | #include <linux/mm.h> |
30 | #include <linux/dma-mapping.h> | |
31 | #include <linux/raid/xor.h> | |
32 | #include <linux/async_tx.h> | |
33 | ||
06164f31 DW |
34 | /* do_async_xor - dma map the pages and perform the xor with an engine */ |
35 | static __async_inline struct dma_async_tx_descriptor * | |
fb36ab14 | 36 | do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap, |
a08abd8c | 37 | struct async_submit_ctl *submit) |
9bc89cd8 | 38 | { |
1e55db2d | 39 | struct dma_device *dma = chan->device; |
1e55db2d | 40 | struct dma_async_tx_descriptor *tx = NULL; |
a08abd8c DW |
41 | dma_async_tx_callback cb_fn_orig = submit->cb_fn; |
42 | void *cb_param_orig = submit->cb_param; | |
43 | enum async_tx_flags flags_orig = submit->flags; | |
0776ae7b | 44 | enum dma_ctrl_flags dma_flags = 0; |
fb36ab14 DW |
45 | int src_cnt = unmap->to_cnt; |
46 | int xor_src_cnt; | |
47 | dma_addr_t dma_dest = unmap->addr[unmap->to_cnt]; | |
48 | dma_addr_t *src_list = unmap->addr; | |
0036731c | 49 | |
1e55db2d | 50 | while (src_cnt) { |
fb36ab14 DW |
51 | dma_addr_t tmp; |
52 | ||
a08abd8c | 53 | submit->flags = flags_orig; |
b2f46fd8 | 54 | xor_src_cnt = min(src_cnt, (int)dma->max_xor); |
fb36ab14 DW |
55 | /* if we are submitting additional xors, leave the chain open |
56 | * and clear the callback parameters | |
1e55db2d DW |
57 | */ |
58 | if (src_cnt > xor_src_cnt) { | |
a08abd8c | 59 | submit->flags &= ~ASYNC_TX_ACK; |
0403e382 | 60 | submit->flags |= ASYNC_TX_FENCE; |
a08abd8c DW |
61 | submit->cb_fn = NULL; |
62 | submit->cb_param = NULL; | |
1e55db2d | 63 | } else { |
a08abd8c DW |
64 | submit->cb_fn = cb_fn_orig; |
65 | submit->cb_param = cb_param_orig; | |
1e55db2d | 66 | } |
a08abd8c | 67 | if (submit->cb_fn) |
1e55db2d | 68 | dma_flags |= DMA_PREP_INTERRUPT; |
0403e382 DW |
69 | if (submit->flags & ASYNC_TX_FENCE) |
70 | dma_flags |= DMA_PREP_FENCE; | |
fb36ab14 DW |
71 | |
72 | /* Drivers force forward progress in case they can not provide a | |
73 | * descriptor | |
1e55db2d | 74 | */ |
fb36ab14 DW |
75 | tmp = src_list[0]; |
76 | if (src_list > unmap->addr) | |
77 | src_list[0] = dma_dest; | |
78 | tx = dma->device_prep_dma_xor(chan, dma_dest, src_list, | |
79 | xor_src_cnt, unmap->len, | |
80 | dma_flags); | |
81 | src_list[0] = tmp; | |
82 | ||
1e55db2d | 83 | |
669ab0b2 | 84 | if (unlikely(!tx)) |
a08abd8c | 85 | async_tx_quiesce(&submit->depend_tx); |
0036731c | 86 | |
25985edc | 87 | /* spin wait for the preceding transactions to complete */ |
669ab0b2 DW |
88 | while (unlikely(!tx)) { |
89 | dma_async_issue_pending(chan); | |
1e55db2d | 90 | tx = dma->device_prep_dma_xor(chan, dma_dest, |
fb36ab14 DW |
91 | src_list, |
92 | xor_src_cnt, unmap->len, | |
1e55db2d | 93 | dma_flags); |
669ab0b2 | 94 | } |
9bc89cd8 | 95 | |
fb36ab14 | 96 | dma_set_unmap(tx, unmap); |
a08abd8c DW |
97 | async_tx_submit(chan, tx, submit); |
98 | submit->depend_tx = tx; | |
1e55db2d DW |
99 | |
100 | if (src_cnt > xor_src_cnt) { | |
101 | /* drop completed sources */ | |
102 | src_cnt -= xor_src_cnt; | |
1e55db2d | 103 | /* use the intermediate result a source */ |
1e55db2d | 104 | src_cnt++; |
fb36ab14 | 105 | src_list += xor_src_cnt - 1; |
1e55db2d DW |
106 | } else |
107 | break; | |
108 | } | |
0036731c DW |
109 | |
110 | return tx; | |
9bc89cd8 DW |
111 | } |
112 | ||
113 | static void | |
114 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
a08abd8c | 115 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
9bc89cd8 | 116 | { |
9bc89cd8 | 117 | int i; |
b2141e69 | 118 | int xor_src_cnt = 0; |
1e55db2d DW |
119 | int src_off = 0; |
120 | void *dest_buf; | |
04ce9ab3 | 121 | void **srcs; |
9bc89cd8 | 122 | |
04ce9ab3 DW |
123 | if (submit->scribble) |
124 | srcs = submit->scribble; | |
125 | else | |
126 | srcs = (void **) src_list; | |
127 | ||
128 | /* convert to buffer pointers */ | |
9bc89cd8 | 129 | for (i = 0; i < src_cnt; i++) |
b2141e69 N |
130 | if (src_list[i]) |
131 | srcs[xor_src_cnt++] = page_address(src_list[i]) + offset; | |
132 | src_cnt = xor_src_cnt; | |
9bc89cd8 | 133 | /* set destination address */ |
1e55db2d | 134 | dest_buf = page_address(dest) + offset; |
9bc89cd8 | 135 | |
a08abd8c | 136 | if (submit->flags & ASYNC_TX_XOR_ZERO_DST) |
1e55db2d | 137 | memset(dest_buf, 0, len); |
9bc89cd8 | 138 | |
1e55db2d DW |
139 | while (src_cnt > 0) { |
140 | /* process up to 'MAX_XOR_BLOCKS' sources */ | |
141 | xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS); | |
142 | xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]); | |
143 | ||
144 | /* drop completed sources */ | |
145 | src_cnt -= xor_src_cnt; | |
146 | src_off += xor_src_cnt; | |
147 | } | |
9bc89cd8 | 148 | |
a08abd8c | 149 | async_tx_sync_epilog(submit); |
9bc89cd8 DW |
150 | } |
151 | ||
152 | /** | |
153 | * async_xor - attempt to xor a set of blocks with a dma engine. | |
9bc89cd8 | 154 | * @dest: destination page |
a08abd8c DW |
155 | * @src_list: array of source pages |
156 | * @offset: common src/dst offset to start transaction | |
9bc89cd8 DW |
157 | * @src_cnt: number of source pages |
158 | * @len: length in bytes | |
a08abd8c DW |
159 | * @submit: submission / completion modifiers |
160 | * | |
161 | * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST | |
162 | * | |
163 | * xor_blocks always uses the dest as a source so the | |
164 | * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in | |
165 | * the calculation. The assumption with dma eninges is that they only | |
166 | * use the destination buffer as a source when it is explicity specified | |
167 | * in the source list. | |
168 | * | |
169 | * src_list note: if the dest is also a source it must be at index zero. | |
170 | * The contents of this array will be overwritten if a scribble region | |
171 | * is not specified. | |
9bc89cd8 DW |
172 | */ |
173 | struct dma_async_tx_descriptor * | |
174 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
a08abd8c | 175 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
9bc89cd8 | 176 | { |
a08abd8c | 177 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR, |
47437b2c DW |
178 | &dest, 1, src_list, |
179 | src_cnt, len); | |
fb36ab14 DW |
180 | struct dma_device *device = chan ? chan->device : NULL; |
181 | struct dmaengine_unmap_data *unmap = NULL; | |
04ce9ab3 | 182 | |
9bc89cd8 DW |
183 | BUG_ON(src_cnt <= 1); |
184 | ||
fb36ab14 DW |
185 | if (device) |
186 | unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOIO); | |
187 | ||
188 | if (unmap && is_dma_xor_aligned(device, offset, 0, len)) { | |
189 | struct dma_async_tx_descriptor *tx; | |
190 | int i, j; | |
04ce9ab3 | 191 | |
1e55db2d DW |
192 | /* run the xor asynchronously */ |
193 | pr_debug("%s (async): len: %zu\n", __func__, len); | |
9bc89cd8 | 194 | |
fb36ab14 DW |
195 | unmap->len = len; |
196 | for (i = 0, j = 0; i < src_cnt; i++) { | |
197 | if (!src_list[i]) | |
198 | continue; | |
199 | unmap->to_cnt++; | |
200 | unmap->addr[j++] = dma_map_page(device->dev, src_list[i], | |
201 | offset, len, DMA_TO_DEVICE); | |
202 | } | |
203 | ||
204 | /* map it bidirectional as it may be re-used as a source */ | |
205 | unmap->addr[j] = dma_map_page(device->dev, dest, offset, len, | |
206 | DMA_BIDIRECTIONAL); | |
207 | unmap->bidi_cnt = 1; | |
208 | ||
209 | tx = do_async_xor(chan, unmap, submit); | |
210 | dmaengine_unmap_put(unmap); | |
211 | return tx; | |
1e55db2d | 212 | } else { |
fb36ab14 | 213 | dmaengine_unmap_put(unmap); |
1e55db2d DW |
214 | /* run the xor synchronously */ |
215 | pr_debug("%s (sync): len: %zu\n", __func__, len); | |
04ce9ab3 DW |
216 | WARN_ONCE(chan, "%s: no space for dma address conversion\n", |
217 | __func__); | |
9bc89cd8 | 218 | |
1e55db2d DW |
219 | /* in the sync case the dest is an implied source |
220 | * (assumes the dest is the first source) | |
9bc89cd8 | 221 | */ |
a08abd8c | 222 | if (submit->flags & ASYNC_TX_XOR_DROP_DST) { |
1e55db2d DW |
223 | src_cnt--; |
224 | src_list++; | |
225 | } | |
9bc89cd8 | 226 | |
1e55db2d | 227 | /* wait for any prerequisite operations */ |
a08abd8c | 228 | async_tx_quiesce(&submit->depend_tx); |
9bc89cd8 | 229 | |
a08abd8c | 230 | do_sync_xor(dest, src_list, offset, src_cnt, len, submit); |
9bc89cd8 | 231 | |
1e55db2d | 232 | return NULL; |
9bc89cd8 | 233 | } |
9bc89cd8 DW |
234 | } |
235 | EXPORT_SYMBOL_GPL(async_xor); | |
236 | ||
237 | static int page_is_zero(struct page *p, unsigned int offset, size_t len) | |
238 | { | |
2c88ae90 | 239 | return !memchr_inv(page_address(p) + offset, 0, len); |
9bc89cd8 DW |
240 | } |
241 | ||
7b3cc2b1 DW |
242 | static inline struct dma_chan * |
243 | xor_val_chan(struct async_submit_ctl *submit, struct page *dest, | |
244 | struct page **src_list, int src_cnt, size_t len) | |
245 | { | |
246 | #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA | |
247 | return NULL; | |
248 | #endif | |
249 | return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list, | |
250 | src_cnt, len); | |
251 | } | |
252 | ||
9bc89cd8 | 253 | /** |
099f53cb | 254 | * async_xor_val - attempt a xor parity check with a dma engine. |
9bc89cd8 | 255 | * @dest: destination page used if the xor is performed synchronously |
a08abd8c | 256 | * @src_list: array of source pages |
9bc89cd8 DW |
257 | * @offset: offset in pages to start transaction |
258 | * @src_cnt: number of source pages | |
259 | * @len: length in bytes | |
260 | * @result: 0 if sum == 0 else non-zero | |
a08abd8c DW |
261 | * @submit: submission / completion modifiers |
262 | * | |
263 | * honored flags: ASYNC_TX_ACK | |
264 | * | |
265 | * src_list note: if the dest is also a source it must be at index zero. | |
266 | * The contents of this array will be overwritten if a scribble region | |
267 | * is not specified. | |
9bc89cd8 DW |
268 | */ |
269 | struct dma_async_tx_descriptor * | |
a08abd8c | 270 | async_xor_val(struct page *dest, struct page **src_list, unsigned int offset, |
ad283ea4 | 271 | int src_cnt, size_t len, enum sum_check_flags *result, |
a08abd8c | 272 | struct async_submit_ctl *submit) |
9bc89cd8 | 273 | { |
7b3cc2b1 | 274 | struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len); |
9bc89cd8 | 275 | struct dma_device *device = chan ? chan->device : NULL; |
0036731c | 276 | struct dma_async_tx_descriptor *tx = NULL; |
173e86b2 | 277 | struct dmaengine_unmap_data *unmap = NULL; |
9bc89cd8 DW |
278 | |
279 | BUG_ON(src_cnt <= 1); | |
280 | ||
173e86b2 DW |
281 | if (device) |
282 | unmap = dmaengine_get_unmap_data(device->dev, src_cnt, GFP_NOIO); | |
04ce9ab3 | 283 | |
173e86b2 | 284 | if (unmap && src_cnt <= device->max_xor && |
83544ae9 | 285 | is_dma_xor_aligned(device, offset, 0, len)) { |
0776ae7b | 286 | unsigned long dma_prep_flags = 0; |
0036731c | 287 | int i; |
9bc89cd8 | 288 | |
3280ab3e | 289 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
9bc89cd8 | 290 | |
0403e382 DW |
291 | if (submit->cb_fn) |
292 | dma_prep_flags |= DMA_PREP_INTERRUPT; | |
293 | if (submit->flags & ASYNC_TX_FENCE) | |
294 | dma_prep_flags |= DMA_PREP_FENCE; | |
0036731c | 295 | |
173e86b2 DW |
296 | for (i = 0; i < src_cnt; i++) { |
297 | unmap->addr[i] = dma_map_page(device->dev, src_list[i], | |
298 | offset, len, DMA_TO_DEVICE); | |
299 | unmap->to_cnt++; | |
300 | } | |
301 | unmap->len = len; | |
302 | ||
303 | tx = device->device_prep_dma_xor_val(chan, unmap->addr, src_cnt, | |
099f53cb DW |
304 | len, result, |
305 | dma_prep_flags); | |
669ab0b2 | 306 | if (unlikely(!tx)) { |
a08abd8c | 307 | async_tx_quiesce(&submit->depend_tx); |
0036731c | 308 | |
e34a8ae7 | 309 | while (!tx) { |
669ab0b2 | 310 | dma_async_issue_pending(chan); |
099f53cb | 311 | tx = device->device_prep_dma_xor_val(chan, |
173e86b2 | 312 | unmap->addr, src_cnt, len, result, |
d4c56f97 | 313 | dma_prep_flags); |
e34a8ae7 | 314 | } |
9bc89cd8 | 315 | } |
173e86b2 | 316 | dma_set_unmap(tx, unmap); |
a08abd8c | 317 | async_tx_submit(chan, tx, submit); |
9bc89cd8 | 318 | } else { |
a08abd8c | 319 | enum async_tx_flags flags_orig = submit->flags; |
9bc89cd8 | 320 | |
3280ab3e | 321 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
04ce9ab3 DW |
322 | WARN_ONCE(device && src_cnt <= device->max_xor, |
323 | "%s: no space for dma address conversion\n", | |
324 | __func__); | |
9bc89cd8 | 325 | |
a08abd8c DW |
326 | submit->flags |= ASYNC_TX_XOR_DROP_DST; |
327 | submit->flags &= ~ASYNC_TX_ACK; | |
9bc89cd8 | 328 | |
a08abd8c | 329 | tx = async_xor(dest, src_list, offset, src_cnt, len, submit); |
9bc89cd8 | 330 | |
d2c52b79 | 331 | async_tx_quiesce(&tx); |
9bc89cd8 | 332 | |
ad283ea4 | 333 | *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P; |
9bc89cd8 | 334 | |
a08abd8c DW |
335 | async_tx_sync_epilog(submit); |
336 | submit->flags = flags_orig; | |
9bc89cd8 | 337 | } |
173e86b2 | 338 | dmaengine_unmap_put(unmap); |
9bc89cd8 DW |
339 | |
340 | return tx; | |
341 | } | |
099f53cb | 342 | EXPORT_SYMBOL_GPL(async_xor_val); |
9bc89cd8 | 343 | |
9bc89cd8 DW |
344 | MODULE_AUTHOR("Intel Corporation"); |
345 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); | |
346 | MODULE_LICENSE("GPL"); |