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b94d5230 DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #include <linux/list_sort.h> | |
14 | #include <linux/libnvdimm.h> | |
15 | #include <linux/module.h> | |
047fc8a1 | 16 | #include <linux/mutex.h> |
62232e45 | 17 | #include <linux/ndctl.h> |
0caeef63 | 18 | #include <linux/delay.h> |
b94d5230 DW |
19 | #include <linux/list.h> |
20 | #include <linux/acpi.h> | |
eaf96153 | 21 | #include <linux/sort.h> |
c2ad2954 | 22 | #include <linux/pmem.h> |
047fc8a1 | 23 | #include <linux/io.h> |
1cf03c00 | 24 | #include <linux/nd.h> |
96601adb | 25 | #include <asm/cacheflush.h> |
b94d5230 DW |
26 | #include "nfit.h" |
27 | ||
047fc8a1 RZ |
28 | /* |
29 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is | |
30 | * irrelevant. | |
31 | */ | |
2f8e2c87 | 32 | #include <linux/io-64-nonatomic-hi-lo.h> |
047fc8a1 | 33 | |
4d88a97a DW |
34 | static bool force_enable_dimms; |
35 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); | |
36 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); | |
37 | ||
1cf03c00 DW |
38 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
39 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); | |
40 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); | |
41 | ||
42 | /* after three payloads of overflow, it's dead jim */ | |
43 | static unsigned int scrub_overflow_abort = 3; | |
44 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); | |
45 | MODULE_PARM_DESC(scrub_overflow_abort, | |
46 | "Number of times we overflow ARS results before abort"); | |
47 | ||
7ae0fa43 DW |
48 | static struct workqueue_struct *nfit_wq; |
49 | ||
20985164 VV |
50 | struct nfit_table_prev { |
51 | struct list_head spas; | |
52 | struct list_head memdevs; | |
53 | struct list_head dcrs; | |
54 | struct list_head bdws; | |
55 | struct list_head idts; | |
56 | struct list_head flushes; | |
57 | }; | |
58 | ||
b94d5230 DW |
59 | static u8 nfit_uuid[NFIT_UUID_MAX][16]; |
60 | ||
6bc75619 | 61 | const u8 *to_nfit_uuid(enum nfit_uuids id) |
b94d5230 DW |
62 | { |
63 | return nfit_uuid[id]; | |
64 | } | |
6bc75619 | 65 | EXPORT_SYMBOL(to_nfit_uuid); |
b94d5230 | 66 | |
62232e45 DW |
67 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
68 | struct nvdimm_bus_descriptor *nd_desc) | |
69 | { | |
70 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); | |
71 | } | |
72 | ||
73 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) | |
74 | { | |
75 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
76 | ||
77 | /* | |
78 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct | |
79 | * acpi_device. | |
80 | */ | |
81 | if (!nd_desc->provider_name | |
82 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) | |
83 | return NULL; | |
84 | ||
85 | return to_acpi_device(acpi_desc->dev); | |
86 | } | |
87 | ||
aef25338 DW |
88 | static int xlat_status(void *buf, unsigned int cmd) |
89 | { | |
d4f32367 | 90 | struct nd_cmd_clear_error *clear_err; |
aef25338 DW |
91 | struct nd_cmd_ars_status *ars_status; |
92 | struct nd_cmd_ars_start *ars_start; | |
93 | struct nd_cmd_ars_cap *ars_cap; | |
94 | u16 flags; | |
95 | ||
96 | switch (cmd) { | |
97 | case ND_CMD_ARS_CAP: | |
98 | ars_cap = buf; | |
99 | if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE) | |
100 | return -ENOTTY; | |
101 | ||
102 | /* Command failed */ | |
103 | if (ars_cap->status & 0xffff) | |
104 | return -EIO; | |
105 | ||
106 | /* No supported scan types for this range */ | |
107 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; | |
108 | if ((ars_cap->status >> 16 & flags) == 0) | |
109 | return -ENOTTY; | |
110 | break; | |
111 | case ND_CMD_ARS_START: | |
112 | ars_start = buf; | |
113 | /* ARS is in progress */ | |
114 | if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY) | |
115 | return -EBUSY; | |
116 | ||
117 | /* Command failed */ | |
118 | if (ars_start->status & 0xffff) | |
119 | return -EIO; | |
120 | break; | |
121 | case ND_CMD_ARS_STATUS: | |
122 | ars_status = buf; | |
123 | /* Command failed */ | |
124 | if (ars_status->status & 0xffff) | |
125 | return -EIO; | |
126 | /* Check extended status (Upper two bytes) */ | |
127 | if (ars_status->status == NFIT_ARS_STATUS_DONE) | |
128 | return 0; | |
129 | ||
130 | /* ARS is in progress */ | |
131 | if (ars_status->status == NFIT_ARS_STATUS_BUSY) | |
132 | return -EBUSY; | |
133 | ||
134 | /* No ARS performed for the current boot */ | |
135 | if (ars_status->status == NFIT_ARS_STATUS_NONE) | |
136 | return -EAGAIN; | |
137 | ||
138 | /* | |
139 | * ARS interrupted, either we overflowed or some other | |
140 | * agent wants the scan to stop. If we didn't overflow | |
141 | * then just continue with the returned results. | |
142 | */ | |
143 | if (ars_status->status == NFIT_ARS_STATUS_INTR) { | |
144 | if (ars_status->flags & NFIT_ARS_F_OVERFLOW) | |
145 | return -ENOSPC; | |
146 | return 0; | |
147 | } | |
148 | ||
149 | /* Unknown status */ | |
150 | if (ars_status->status >> 16) | |
151 | return -EIO; | |
152 | break; | |
d4f32367 DW |
153 | case ND_CMD_CLEAR_ERROR: |
154 | clear_err = buf; | |
155 | if (clear_err->status & 0xffff) | |
156 | return -EIO; | |
157 | if (!clear_err->cleared) | |
158 | return -EIO; | |
159 | if (clear_err->length > clear_err->cleared) | |
160 | return clear_err->cleared; | |
161 | break; | |
aef25338 DW |
162 | default: |
163 | break; | |
164 | } | |
165 | ||
166 | return 0; | |
167 | } | |
168 | ||
b94d5230 DW |
169 | static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, |
170 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, | |
aef25338 | 171 | unsigned int buf_len, int *cmd_rc) |
b94d5230 | 172 | { |
62232e45 DW |
173 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
174 | const struct nd_cmd_desc *desc = NULL; | |
175 | union acpi_object in_obj, in_buf, *out_obj; | |
176 | struct device *dev = acpi_desc->dev; | |
177 | const char *cmd_name, *dimm_name; | |
e3654eca | 178 | unsigned long cmd_mask; |
62232e45 DW |
179 | acpi_handle handle; |
180 | const u8 *uuid; | |
181 | u32 offset; | |
182 | int rc, i; | |
183 | ||
184 | if (nvdimm) { | |
185 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
186 | struct acpi_device *adev = nfit_mem->adev; | |
187 | ||
188 | if (!adev) | |
189 | return -ENOTTY; | |
047fc8a1 | 190 | dimm_name = nvdimm_name(nvdimm); |
62232e45 | 191 | cmd_name = nvdimm_cmd_name(cmd); |
e3654eca | 192 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
62232e45 DW |
193 | desc = nd_cmd_dimm_desc(cmd); |
194 | uuid = to_nfit_uuid(NFIT_DEV_DIMM); | |
195 | handle = adev->handle; | |
196 | } else { | |
197 | struct acpi_device *adev = to_acpi_dev(acpi_desc); | |
198 | ||
199 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
e3654eca | 200 | cmd_mask = nd_desc->cmd_mask; |
62232e45 DW |
201 | desc = nd_cmd_bus_desc(cmd); |
202 | uuid = to_nfit_uuid(NFIT_DEV_BUS); | |
203 | handle = adev->handle; | |
204 | dimm_name = "bus"; | |
205 | } | |
206 | ||
207 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) | |
208 | return -ENOTTY; | |
209 | ||
e3654eca | 210 | if (!test_bit(cmd, &cmd_mask)) |
62232e45 DW |
211 | return -ENOTTY; |
212 | ||
213 | in_obj.type = ACPI_TYPE_PACKAGE; | |
214 | in_obj.package.count = 1; | |
215 | in_obj.package.elements = &in_buf; | |
216 | in_buf.type = ACPI_TYPE_BUFFER; | |
217 | in_buf.buffer.pointer = buf; | |
218 | in_buf.buffer.length = 0; | |
219 | ||
220 | /* libnvdimm has already validated the input envelope */ | |
221 | for (i = 0; i < desc->in_num; i++) | |
222 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, | |
223 | i, buf); | |
224 | ||
225 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { | |
226 | dev_dbg(dev, "%s:%s cmd: %s input length: %d\n", __func__, | |
227 | dimm_name, cmd_name, in_buf.buffer.length); | |
228 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, | |
229 | 4, in_buf.buffer.pointer, min_t(u32, 128, | |
230 | in_buf.buffer.length), true); | |
231 | } | |
232 | ||
233 | out_obj = acpi_evaluate_dsm(handle, uuid, 1, cmd, &in_obj); | |
234 | if (!out_obj) { | |
235 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, | |
236 | cmd_name); | |
237 | return -EINVAL; | |
238 | } | |
239 | ||
240 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { | |
241 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", | |
242 | __func__, dimm_name, cmd_name, out_obj->type); | |
243 | rc = -EINVAL; | |
244 | goto out; | |
245 | } | |
246 | ||
247 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { | |
248 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, | |
249 | dimm_name, cmd_name, out_obj->buffer.length); | |
250 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, | |
251 | 4, out_obj->buffer.pointer, min_t(u32, 128, | |
252 | out_obj->buffer.length), true); | |
253 | } | |
254 | ||
255 | for (i = 0, offset = 0; i < desc->out_num; i++) { | |
256 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, | |
257 | (u32 *) out_obj->buffer.pointer); | |
258 | ||
259 | if (offset + out_size > out_obj->buffer.length) { | |
260 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", | |
261 | __func__, dimm_name, cmd_name, i); | |
262 | break; | |
263 | } | |
264 | ||
265 | if (in_buf.buffer.length + offset + out_size > buf_len) { | |
266 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", | |
267 | __func__, dimm_name, cmd_name, i); | |
268 | rc = -ENXIO; | |
269 | goto out; | |
270 | } | |
271 | memcpy(buf + in_buf.buffer.length + offset, | |
272 | out_obj->buffer.pointer + offset, out_size); | |
273 | offset += out_size; | |
274 | } | |
275 | if (offset + in_buf.buffer.length < buf_len) { | |
276 | if (i >= 1) { | |
277 | /* | |
278 | * status valid, return the number of bytes left | |
279 | * unfilled in the output buffer | |
280 | */ | |
281 | rc = buf_len - offset - in_buf.buffer.length; | |
aef25338 DW |
282 | if (cmd_rc) |
283 | *cmd_rc = xlat_status(buf, cmd); | |
62232e45 DW |
284 | } else { |
285 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", | |
286 | __func__, dimm_name, cmd_name, buf_len, | |
287 | offset); | |
288 | rc = -ENXIO; | |
289 | } | |
290 | } else | |
291 | rc = 0; | |
292 | ||
293 | out: | |
294 | ACPI_FREE(out_obj); | |
295 | ||
296 | return rc; | |
b94d5230 DW |
297 | } |
298 | ||
299 | static const char *spa_type_name(u16 type) | |
300 | { | |
301 | static const char *to_name[] = { | |
302 | [NFIT_SPA_VOLATILE] = "volatile", | |
303 | [NFIT_SPA_PM] = "pmem", | |
304 | [NFIT_SPA_DCR] = "dimm-control-region", | |
305 | [NFIT_SPA_BDW] = "block-data-window", | |
306 | [NFIT_SPA_VDISK] = "volatile-disk", | |
307 | [NFIT_SPA_VCD] = "volatile-cd", | |
308 | [NFIT_SPA_PDISK] = "persistent-disk", | |
309 | [NFIT_SPA_PCD] = "persistent-cd", | |
310 | ||
311 | }; | |
312 | ||
313 | if (type > NFIT_SPA_PCD) | |
314 | return "unknown"; | |
315 | ||
316 | return to_name[type]; | |
317 | } | |
318 | ||
319 | static int nfit_spa_type(struct acpi_nfit_system_address *spa) | |
320 | { | |
321 | int i; | |
322 | ||
323 | for (i = 0; i < NFIT_UUID_MAX; i++) | |
324 | if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0) | |
325 | return i; | |
326 | return -1; | |
327 | } | |
328 | ||
329 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 330 | struct nfit_table_prev *prev, |
b94d5230 DW |
331 | struct acpi_nfit_system_address *spa) |
332 | { | |
826c416f | 333 | size_t length = min_t(size_t, sizeof(*spa), spa->header.length); |
b94d5230 | 334 | struct device *dev = acpi_desc->dev; |
20985164 VV |
335 | struct nfit_spa *nfit_spa; |
336 | ||
337 | list_for_each_entry(nfit_spa, &prev->spas, list) { | |
826c416f | 338 | if (memcmp(nfit_spa->spa, spa, length) == 0) { |
20985164 VV |
339 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
340 | return true; | |
341 | } | |
342 | } | |
b94d5230 | 343 | |
20985164 | 344 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL); |
b94d5230 DW |
345 | if (!nfit_spa) |
346 | return false; | |
347 | INIT_LIST_HEAD(&nfit_spa->list); | |
348 | nfit_spa->spa = spa; | |
349 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); | |
350 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, | |
351 | spa->range_index, | |
352 | spa_type_name(nfit_spa_type(spa))); | |
353 | return true; | |
354 | } | |
355 | ||
356 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 357 | struct nfit_table_prev *prev, |
b94d5230 DW |
358 | struct acpi_nfit_memory_map *memdev) |
359 | { | |
826c416f | 360 | size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length); |
b94d5230 | 361 | struct device *dev = acpi_desc->dev; |
20985164 | 362 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 363 | |
20985164 | 364 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
826c416f | 365 | if (memcmp(nfit_memdev->memdev, memdev, length) == 0) { |
20985164 VV |
366 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
367 | return true; | |
368 | } | |
369 | ||
370 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL); | |
b94d5230 DW |
371 | if (!nfit_memdev) |
372 | return false; | |
373 | INIT_LIST_HEAD(&nfit_memdev->list); | |
374 | nfit_memdev->memdev = memdev; | |
375 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); | |
376 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n", | |
377 | __func__, memdev->device_handle, memdev->range_index, | |
378 | memdev->region_index); | |
379 | return true; | |
380 | } | |
381 | ||
382 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 383 | struct nfit_table_prev *prev, |
b94d5230 DW |
384 | struct acpi_nfit_control_region *dcr) |
385 | { | |
826c416f | 386 | size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length); |
b94d5230 | 387 | struct device *dev = acpi_desc->dev; |
20985164 VV |
388 | struct nfit_dcr *nfit_dcr; |
389 | ||
390 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) | |
826c416f | 391 | if (memcmp(nfit_dcr->dcr, dcr, length) == 0) { |
20985164 VV |
392 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
393 | return true; | |
394 | } | |
b94d5230 | 395 | |
20985164 | 396 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL); |
b94d5230 DW |
397 | if (!nfit_dcr) |
398 | return false; | |
399 | INIT_LIST_HEAD(&nfit_dcr->list); | |
400 | nfit_dcr->dcr = dcr; | |
401 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); | |
402 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, | |
403 | dcr->region_index, dcr->windows); | |
404 | return true; | |
405 | } | |
406 | ||
407 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 408 | struct nfit_table_prev *prev, |
b94d5230 DW |
409 | struct acpi_nfit_data_region *bdw) |
410 | { | |
826c416f | 411 | size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length); |
b94d5230 | 412 | struct device *dev = acpi_desc->dev; |
20985164 VV |
413 | struct nfit_bdw *nfit_bdw; |
414 | ||
415 | list_for_each_entry(nfit_bdw, &prev->bdws, list) | |
826c416f | 416 | if (memcmp(nfit_bdw->bdw, bdw, length) == 0) { |
20985164 VV |
417 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
418 | return true; | |
419 | } | |
b94d5230 | 420 | |
20985164 | 421 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL); |
b94d5230 DW |
422 | if (!nfit_bdw) |
423 | return false; | |
424 | INIT_LIST_HEAD(&nfit_bdw->list); | |
425 | nfit_bdw->bdw = bdw; | |
426 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); | |
427 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, | |
428 | bdw->region_index, bdw->windows); | |
429 | return true; | |
430 | } | |
431 | ||
047fc8a1 | 432 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
20985164 | 433 | struct nfit_table_prev *prev, |
047fc8a1 RZ |
434 | struct acpi_nfit_interleave *idt) |
435 | { | |
826c416f | 436 | size_t length = min_t(size_t, sizeof(*idt), idt->header.length); |
047fc8a1 | 437 | struct device *dev = acpi_desc->dev; |
20985164 VV |
438 | struct nfit_idt *nfit_idt; |
439 | ||
440 | list_for_each_entry(nfit_idt, &prev->idts, list) | |
826c416f | 441 | if (memcmp(nfit_idt->idt, idt, length) == 0) { |
20985164 VV |
442 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
443 | return true; | |
444 | } | |
047fc8a1 | 445 | |
20985164 | 446 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL); |
047fc8a1 RZ |
447 | if (!nfit_idt) |
448 | return false; | |
449 | INIT_LIST_HEAD(&nfit_idt->list); | |
450 | nfit_idt->idt = idt; | |
451 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); | |
452 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, | |
453 | idt->interleave_index, idt->line_count); | |
454 | return true; | |
455 | } | |
456 | ||
c2ad2954 | 457 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
20985164 | 458 | struct nfit_table_prev *prev, |
c2ad2954 RZ |
459 | struct acpi_nfit_flush_address *flush) |
460 | { | |
826c416f | 461 | size_t length = min_t(size_t, sizeof(*flush), flush->header.length); |
c2ad2954 | 462 | struct device *dev = acpi_desc->dev; |
20985164 | 463 | struct nfit_flush *nfit_flush; |
c2ad2954 | 464 | |
20985164 | 465 | list_for_each_entry(nfit_flush, &prev->flushes, list) |
826c416f | 466 | if (memcmp(nfit_flush->flush, flush, length) == 0) { |
20985164 VV |
467 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
468 | return true; | |
469 | } | |
470 | ||
471 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL); | |
c2ad2954 RZ |
472 | if (!nfit_flush) |
473 | return false; | |
474 | INIT_LIST_HEAD(&nfit_flush->list); | |
475 | nfit_flush->flush = flush; | |
476 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); | |
477 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, | |
478 | flush->device_handle, flush->hint_count); | |
479 | return true; | |
480 | } | |
481 | ||
20985164 VV |
482 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
483 | struct nfit_table_prev *prev, void *table, const void *end) | |
b94d5230 DW |
484 | { |
485 | struct device *dev = acpi_desc->dev; | |
486 | struct acpi_nfit_header *hdr; | |
487 | void *err = ERR_PTR(-ENOMEM); | |
488 | ||
489 | if (table >= end) | |
490 | return NULL; | |
491 | ||
492 | hdr = table; | |
564d5011 VV |
493 | if (!hdr->length) { |
494 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", | |
495 | hdr->type); | |
496 | return NULL; | |
497 | } | |
498 | ||
b94d5230 DW |
499 | switch (hdr->type) { |
500 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: | |
20985164 | 501 | if (!add_spa(acpi_desc, prev, table)) |
b94d5230 DW |
502 | return err; |
503 | break; | |
504 | case ACPI_NFIT_TYPE_MEMORY_MAP: | |
20985164 | 505 | if (!add_memdev(acpi_desc, prev, table)) |
b94d5230 DW |
506 | return err; |
507 | break; | |
508 | case ACPI_NFIT_TYPE_CONTROL_REGION: | |
20985164 | 509 | if (!add_dcr(acpi_desc, prev, table)) |
b94d5230 DW |
510 | return err; |
511 | break; | |
512 | case ACPI_NFIT_TYPE_DATA_REGION: | |
20985164 | 513 | if (!add_bdw(acpi_desc, prev, table)) |
b94d5230 DW |
514 | return err; |
515 | break; | |
b94d5230 | 516 | case ACPI_NFIT_TYPE_INTERLEAVE: |
20985164 | 517 | if (!add_idt(acpi_desc, prev, table)) |
047fc8a1 | 518 | return err; |
b94d5230 DW |
519 | break; |
520 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: | |
20985164 | 521 | if (!add_flush(acpi_desc, prev, table)) |
c2ad2954 | 522 | return err; |
b94d5230 DW |
523 | break; |
524 | case ACPI_NFIT_TYPE_SMBIOS: | |
525 | dev_dbg(dev, "%s: smbios\n", __func__); | |
526 | break; | |
527 | default: | |
528 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); | |
529 | break; | |
530 | } | |
531 | ||
532 | return table + hdr->length; | |
533 | } | |
534 | ||
535 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, | |
536 | struct nfit_mem *nfit_mem) | |
537 | { | |
538 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
539 | u16 dcr = nfit_mem->dcr->region_index; | |
540 | struct nfit_spa *nfit_spa; | |
541 | ||
542 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
543 | u16 range_index = nfit_spa->spa->range_index; | |
544 | int type = nfit_spa_type(nfit_spa->spa); | |
545 | struct nfit_memdev *nfit_memdev; | |
546 | ||
547 | if (type != NFIT_SPA_BDW) | |
548 | continue; | |
549 | ||
550 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
551 | if (nfit_memdev->memdev->range_index != range_index) | |
552 | continue; | |
553 | if (nfit_memdev->memdev->device_handle != device_handle) | |
554 | continue; | |
555 | if (nfit_memdev->memdev->region_index != dcr) | |
556 | continue; | |
557 | ||
558 | nfit_mem->spa_bdw = nfit_spa->spa; | |
559 | return; | |
560 | } | |
561 | } | |
562 | ||
563 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", | |
564 | nfit_mem->spa_dcr->range_index); | |
565 | nfit_mem->bdw = NULL; | |
566 | } | |
567 | ||
6697b2cf | 568 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
569 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
570 | { | |
571 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; | |
047fc8a1 | 572 | struct nfit_memdev *nfit_memdev; |
c2ad2954 | 573 | struct nfit_flush *nfit_flush; |
b94d5230 | 574 | struct nfit_bdw *nfit_bdw; |
047fc8a1 RZ |
575 | struct nfit_idt *nfit_idt; |
576 | u16 idt_idx, range_index; | |
b94d5230 | 577 | |
b94d5230 DW |
578 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
579 | if (nfit_bdw->bdw->region_index != dcr) | |
580 | continue; | |
581 | nfit_mem->bdw = nfit_bdw->bdw; | |
582 | break; | |
583 | } | |
584 | ||
585 | if (!nfit_mem->bdw) | |
6697b2cf | 586 | return; |
b94d5230 DW |
587 | |
588 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); | |
047fc8a1 RZ |
589 | |
590 | if (!nfit_mem->spa_bdw) | |
6697b2cf | 591 | return; |
047fc8a1 RZ |
592 | |
593 | range_index = nfit_mem->spa_bdw->range_index; | |
594 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
595 | if (nfit_memdev->memdev->range_index != range_index || | |
596 | nfit_memdev->memdev->region_index != dcr) | |
597 | continue; | |
598 | nfit_mem->memdev_bdw = nfit_memdev->memdev; | |
599 | idt_idx = nfit_memdev->memdev->interleave_index; | |
600 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
601 | if (nfit_idt->idt->interleave_index != idt_idx) | |
602 | continue; | |
603 | nfit_mem->idt_bdw = nfit_idt->idt; | |
604 | break; | |
605 | } | |
c2ad2954 RZ |
606 | |
607 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { | |
608 | if (nfit_flush->flush->device_handle != | |
609 | nfit_memdev->memdev->device_handle) | |
610 | continue; | |
611 | nfit_mem->nfit_flush = nfit_flush; | |
612 | break; | |
613 | } | |
047fc8a1 RZ |
614 | break; |
615 | } | |
b94d5230 DW |
616 | } |
617 | ||
618 | static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc, | |
619 | struct acpi_nfit_system_address *spa) | |
620 | { | |
621 | struct nfit_mem *nfit_mem, *found; | |
622 | struct nfit_memdev *nfit_memdev; | |
623 | int type = nfit_spa_type(spa); | |
b94d5230 DW |
624 | |
625 | switch (type) { | |
626 | case NFIT_SPA_DCR: | |
627 | case NFIT_SPA_PM: | |
628 | break; | |
629 | default: | |
630 | return 0; | |
631 | } | |
632 | ||
633 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
6697b2cf DW |
634 | struct nfit_dcr *nfit_dcr; |
635 | u32 device_handle; | |
636 | u16 dcr; | |
b94d5230 DW |
637 | |
638 | if (nfit_memdev->memdev->range_index != spa->range_index) | |
639 | continue; | |
640 | found = NULL; | |
641 | dcr = nfit_memdev->memdev->region_index; | |
6697b2cf | 642 | device_handle = nfit_memdev->memdev->device_handle; |
b94d5230 | 643 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
6697b2cf DW |
644 | if (__to_nfit_memdev(nfit_mem)->device_handle |
645 | == device_handle) { | |
b94d5230 DW |
646 | found = nfit_mem; |
647 | break; | |
648 | } | |
649 | ||
650 | if (found) | |
651 | nfit_mem = found; | |
652 | else { | |
653 | nfit_mem = devm_kzalloc(acpi_desc->dev, | |
654 | sizeof(*nfit_mem), GFP_KERNEL); | |
655 | if (!nfit_mem) | |
656 | return -ENOMEM; | |
657 | INIT_LIST_HEAD(&nfit_mem->list); | |
6697b2cf DW |
658 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
659 | } | |
660 | ||
661 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
662 | if (nfit_dcr->dcr->region_index != dcr) | |
663 | continue; | |
664 | /* | |
665 | * Record the control region for the dimm. For | |
666 | * the ACPI 6.1 case, where there are separate | |
667 | * control regions for the pmem vs blk | |
668 | * interfaces, be sure to record the extended | |
669 | * blk details. | |
670 | */ | |
671 | if (!nfit_mem->dcr) | |
672 | nfit_mem->dcr = nfit_dcr->dcr; | |
673 | else if (nfit_mem->dcr->windows == 0 | |
674 | && nfit_dcr->dcr->windows) | |
675 | nfit_mem->dcr = nfit_dcr->dcr; | |
676 | break; | |
677 | } | |
678 | ||
679 | if (dcr && !nfit_mem->dcr) { | |
680 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", | |
681 | spa->range_index, dcr); | |
682 | return -ENODEV; | |
b94d5230 DW |
683 | } |
684 | ||
685 | if (type == NFIT_SPA_DCR) { | |
047fc8a1 RZ |
686 | struct nfit_idt *nfit_idt; |
687 | u16 idt_idx; | |
688 | ||
b94d5230 DW |
689 | /* multiple dimms may share a SPA when interleaved */ |
690 | nfit_mem->spa_dcr = spa; | |
691 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
047fc8a1 RZ |
692 | idt_idx = nfit_memdev->memdev->interleave_index; |
693 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
694 | if (nfit_idt->idt->interleave_index != idt_idx) | |
695 | continue; | |
696 | nfit_mem->idt_dcr = nfit_idt->idt; | |
697 | break; | |
698 | } | |
6697b2cf | 699 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
b94d5230 DW |
700 | } else { |
701 | /* | |
702 | * A single dimm may belong to multiple SPA-PM | |
703 | * ranges, record at least one in addition to | |
704 | * any SPA-DCR range. | |
705 | */ | |
706 | nfit_mem->memdev_pmem = nfit_memdev->memdev; | |
707 | } | |
b94d5230 DW |
708 | } |
709 | ||
710 | return 0; | |
711 | } | |
712 | ||
713 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) | |
714 | { | |
715 | struct nfit_mem *a = container_of(_a, typeof(*a), list); | |
716 | struct nfit_mem *b = container_of(_b, typeof(*b), list); | |
717 | u32 handleA, handleB; | |
718 | ||
719 | handleA = __to_nfit_memdev(a)->device_handle; | |
720 | handleB = __to_nfit_memdev(b)->device_handle; | |
721 | if (handleA < handleB) | |
722 | return -1; | |
723 | else if (handleA > handleB) | |
724 | return 1; | |
725 | return 0; | |
726 | } | |
727 | ||
728 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) | |
729 | { | |
730 | struct nfit_spa *nfit_spa; | |
731 | ||
732 | /* | |
733 | * For each SPA-DCR or SPA-PMEM address range find its | |
734 | * corresponding MEMDEV(s). From each MEMDEV find the | |
735 | * corresponding DCR. Then, if we're operating on a SPA-DCR, | |
736 | * try to find a SPA-BDW and a corresponding BDW that references | |
737 | * the DCR. Throw it all into an nfit_mem object. Note, that | |
738 | * BDWs are optional. | |
739 | */ | |
740 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
741 | int rc; | |
742 | ||
743 | rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa); | |
744 | if (rc) | |
745 | return rc; | |
746 | } | |
747 | ||
748 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); | |
749 | ||
750 | return 0; | |
751 | } | |
752 | ||
45def22c DW |
753 | static ssize_t revision_show(struct device *dev, |
754 | struct device_attribute *attr, char *buf) | |
755 | { | |
756 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
757 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
758 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
759 | ||
6b577c9d | 760 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
45def22c DW |
761 | } |
762 | static DEVICE_ATTR_RO(revision); | |
763 | ||
764 | static struct attribute *acpi_nfit_attributes[] = { | |
765 | &dev_attr_revision.attr, | |
766 | NULL, | |
767 | }; | |
768 | ||
769 | static struct attribute_group acpi_nfit_attribute_group = { | |
770 | .name = "nfit", | |
771 | .attrs = acpi_nfit_attributes, | |
772 | }; | |
773 | ||
a61fe6f7 | 774 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
45def22c DW |
775 | &nvdimm_bus_attribute_group, |
776 | &acpi_nfit_attribute_group, | |
777 | NULL, | |
778 | }; | |
779 | ||
e6dfb2de DW |
780 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
781 | { | |
782 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
783 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
784 | ||
785 | return __to_nfit_memdev(nfit_mem); | |
786 | } | |
787 | ||
788 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) | |
789 | { | |
790 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
791 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
792 | ||
793 | return nfit_mem->dcr; | |
794 | } | |
795 | ||
796 | static ssize_t handle_show(struct device *dev, | |
797 | struct device_attribute *attr, char *buf) | |
798 | { | |
799 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
800 | ||
801 | return sprintf(buf, "%#x\n", memdev->device_handle); | |
802 | } | |
803 | static DEVICE_ATTR_RO(handle); | |
804 | ||
805 | static ssize_t phys_id_show(struct device *dev, | |
806 | struct device_attribute *attr, char *buf) | |
807 | { | |
808 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
809 | ||
810 | return sprintf(buf, "%#x\n", memdev->physical_id); | |
811 | } | |
812 | static DEVICE_ATTR_RO(phys_id); | |
813 | ||
814 | static ssize_t vendor_show(struct device *dev, | |
815 | struct device_attribute *attr, char *buf) | |
816 | { | |
817 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
818 | ||
819 | return sprintf(buf, "%#x\n", dcr->vendor_id); | |
820 | } | |
821 | static DEVICE_ATTR_RO(vendor); | |
822 | ||
823 | static ssize_t rev_id_show(struct device *dev, | |
824 | struct device_attribute *attr, char *buf) | |
825 | { | |
826 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
827 | ||
828 | return sprintf(buf, "%#x\n", dcr->revision_id); | |
829 | } | |
830 | static DEVICE_ATTR_RO(rev_id); | |
831 | ||
832 | static ssize_t device_show(struct device *dev, | |
833 | struct device_attribute *attr, char *buf) | |
834 | { | |
835 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
836 | ||
837 | return sprintf(buf, "%#x\n", dcr->device_id); | |
838 | } | |
839 | static DEVICE_ATTR_RO(device); | |
840 | ||
841 | static ssize_t format_show(struct device *dev, | |
842 | struct device_attribute *attr, char *buf) | |
843 | { | |
844 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
845 | ||
846 | return sprintf(buf, "%#x\n", dcr->code); | |
847 | } | |
848 | static DEVICE_ATTR_RO(format); | |
849 | ||
850 | static ssize_t serial_show(struct device *dev, | |
851 | struct device_attribute *attr, char *buf) | |
852 | { | |
853 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
854 | ||
855 | return sprintf(buf, "%#x\n", dcr->serial_number); | |
856 | } | |
857 | static DEVICE_ATTR_RO(serial); | |
858 | ||
58138820 DW |
859 | static ssize_t flags_show(struct device *dev, |
860 | struct device_attribute *attr, char *buf) | |
861 | { | |
862 | u16 flags = to_nfit_memdev(dev)->flags; | |
863 | ||
864 | return sprintf(buf, "%s%s%s%s%s\n", | |
402bae59 TK |
865 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
866 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", | |
867 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", | |
ca321d1c | 868 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
402bae59 | 869 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : ""); |
58138820 DW |
870 | } |
871 | static DEVICE_ATTR_RO(flags); | |
872 | ||
e6dfb2de DW |
873 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
874 | &dev_attr_handle.attr, | |
875 | &dev_attr_phys_id.attr, | |
876 | &dev_attr_vendor.attr, | |
877 | &dev_attr_device.attr, | |
878 | &dev_attr_format.attr, | |
879 | &dev_attr_serial.attr, | |
880 | &dev_attr_rev_id.attr, | |
58138820 | 881 | &dev_attr_flags.attr, |
e6dfb2de DW |
882 | NULL, |
883 | }; | |
884 | ||
885 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, | |
886 | struct attribute *a, int n) | |
887 | { | |
888 | struct device *dev = container_of(kobj, struct device, kobj); | |
889 | ||
890 | if (to_nfit_dcr(dev)) | |
891 | return a->mode; | |
892 | else | |
893 | return 0; | |
894 | } | |
895 | ||
896 | static struct attribute_group acpi_nfit_dimm_attribute_group = { | |
897 | .name = "nfit", | |
898 | .attrs = acpi_nfit_dimm_attributes, | |
899 | .is_visible = acpi_nfit_dimm_attr_visible, | |
900 | }; | |
901 | ||
902 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { | |
62232e45 | 903 | &nvdimm_attribute_group, |
4d88a97a | 904 | &nd_device_attribute_group, |
e6dfb2de DW |
905 | &acpi_nfit_dimm_attribute_group, |
906 | NULL, | |
907 | }; | |
908 | ||
909 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, | |
910 | u32 device_handle) | |
911 | { | |
912 | struct nfit_mem *nfit_mem; | |
913 | ||
914 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) | |
915 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) | |
916 | return nfit_mem->nvdimm; | |
917 | ||
918 | return NULL; | |
919 | } | |
920 | ||
62232e45 DW |
921 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
922 | struct nfit_mem *nfit_mem, u32 device_handle) | |
923 | { | |
924 | struct acpi_device *adev, *adev_dimm; | |
925 | struct device *dev = acpi_desc->dev; | |
926 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM); | |
60e95f43 | 927 | int i; |
62232e45 | 928 | |
e3654eca DW |
929 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
930 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; | |
62232e45 DW |
931 | adev = to_acpi_dev(acpi_desc); |
932 | if (!adev) | |
933 | return 0; | |
934 | ||
935 | adev_dimm = acpi_find_child_device(adev, device_handle, false); | |
936 | nfit_mem->adev = adev_dimm; | |
937 | if (!adev_dimm) { | |
938 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", | |
939 | device_handle); | |
4d88a97a | 940 | return force_enable_dimms ? 0 : -ENODEV; |
62232e45 DW |
941 | } |
942 | ||
62232e45 DW |
943 | for (i = ND_CMD_SMART; i <= ND_CMD_VENDOR; i++) |
944 | if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i)) | |
945 | set_bit(i, &nfit_mem->dsm_mask); | |
946 | ||
60e95f43 | 947 | return 0; |
62232e45 DW |
948 | } |
949 | ||
e6dfb2de DW |
950 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
951 | { | |
952 | struct nfit_mem *nfit_mem; | |
4d88a97a | 953 | int dimm_count = 0; |
e6dfb2de DW |
954 | |
955 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
956 | struct nvdimm *nvdimm; | |
957 | unsigned long flags = 0; | |
958 | u32 device_handle; | |
58138820 | 959 | u16 mem_flags; |
62232e45 | 960 | int rc; |
e6dfb2de DW |
961 | |
962 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
963 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); | |
964 | if (nvdimm) { | |
20985164 | 965 | dimm_count++; |
e6dfb2de DW |
966 | continue; |
967 | } | |
968 | ||
969 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) | |
970 | flags |= NDD_ALIASING; | |
971 | ||
58138820 | 972 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
ca321d1c | 973 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
58138820 DW |
974 | flags |= NDD_UNARMED; |
975 | ||
62232e45 DW |
976 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
977 | if (rc) | |
978 | continue; | |
979 | ||
e3654eca DW |
980 | /* |
981 | * For now there is 1:1 relationship between cmd_mask and | |
982 | * dsm_mask. | |
983 | */ | |
e6dfb2de | 984 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
62232e45 | 985 | acpi_nfit_dimm_attribute_groups, |
e3654eca | 986 | flags, nfit_mem->dsm_mask); |
e6dfb2de DW |
987 | if (!nvdimm) |
988 | return -ENOMEM; | |
989 | ||
990 | nfit_mem->nvdimm = nvdimm; | |
4d88a97a | 991 | dimm_count++; |
58138820 DW |
992 | |
993 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) | |
994 | continue; | |
995 | ||
402bae59 | 996 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n", |
58138820 | 997 | nvdimm_name(nvdimm), |
402bae59 TK |
998 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
999 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", | |
1000 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", | |
ca321d1c | 1001 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : ""); |
58138820 | 1002 | |
e6dfb2de DW |
1003 | } |
1004 | ||
4d88a97a | 1005 | return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
e6dfb2de DW |
1006 | } |
1007 | ||
62232e45 DW |
1008 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
1009 | { | |
1010 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
1011 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS); | |
1012 | struct acpi_device *adev; | |
1013 | int i; | |
1014 | ||
e3654eca | 1015 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
62232e45 DW |
1016 | adev = to_acpi_dev(acpi_desc); |
1017 | if (!adev) | |
1018 | return; | |
1019 | ||
d4f32367 | 1020 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
62232e45 | 1021 | if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i)) |
e3654eca | 1022 | set_bit(i, &nd_desc->cmd_mask); |
62232e45 DW |
1023 | } |
1024 | ||
1f7df6f8 DW |
1025 | static ssize_t range_index_show(struct device *dev, |
1026 | struct device_attribute *attr, char *buf) | |
1027 | { | |
1028 | struct nd_region *nd_region = to_nd_region(dev); | |
1029 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
1030 | ||
1031 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); | |
1032 | } | |
1033 | static DEVICE_ATTR_RO(range_index); | |
1034 | ||
1035 | static struct attribute *acpi_nfit_region_attributes[] = { | |
1036 | &dev_attr_range_index.attr, | |
1037 | NULL, | |
1038 | }; | |
1039 | ||
1040 | static struct attribute_group acpi_nfit_region_attribute_group = { | |
1041 | .name = "nfit", | |
1042 | .attrs = acpi_nfit_region_attributes, | |
1043 | }; | |
1044 | ||
1045 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { | |
1046 | &nd_region_attribute_group, | |
1047 | &nd_mapping_attribute_group, | |
3d88002e | 1048 | &nd_device_attribute_group, |
74ae66c3 | 1049 | &nd_numa_attribute_group, |
1f7df6f8 DW |
1050 | &acpi_nfit_region_attribute_group, |
1051 | NULL, | |
1052 | }; | |
1053 | ||
eaf96153 DW |
1054 | /* enough info to uniquely specify an interleave set */ |
1055 | struct nfit_set_info { | |
1056 | struct nfit_set_info_map { | |
1057 | u64 region_offset; | |
1058 | u32 serial_number; | |
1059 | u32 pad; | |
1060 | } mapping[0]; | |
1061 | }; | |
1062 | ||
1063 | static size_t sizeof_nfit_set_info(int num_mappings) | |
1064 | { | |
1065 | return sizeof(struct nfit_set_info) | |
1066 | + num_mappings * sizeof(struct nfit_set_info_map); | |
1067 | } | |
1068 | ||
1069 | static int cmp_map(const void *m0, const void *m1) | |
1070 | { | |
1071 | const struct nfit_set_info_map *map0 = m0; | |
1072 | const struct nfit_set_info_map *map1 = m1; | |
1073 | ||
1074 | return memcmp(&map0->region_offset, &map1->region_offset, | |
1075 | sizeof(u64)); | |
1076 | } | |
1077 | ||
1078 | /* Retrieve the nth entry referencing this spa */ | |
1079 | static struct acpi_nfit_memory_map *memdev_from_spa( | |
1080 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) | |
1081 | { | |
1082 | struct nfit_memdev *nfit_memdev; | |
1083 | ||
1084 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) | |
1085 | if (nfit_memdev->memdev->range_index == range_index) | |
1086 | if (n-- == 0) | |
1087 | return nfit_memdev->memdev; | |
1088 | return NULL; | |
1089 | } | |
1090 | ||
1091 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, | |
1092 | struct nd_region_desc *ndr_desc, | |
1093 | struct acpi_nfit_system_address *spa) | |
1094 | { | |
1095 | int i, spa_type = nfit_spa_type(spa); | |
1096 | struct device *dev = acpi_desc->dev; | |
1097 | struct nd_interleave_set *nd_set; | |
1098 | u16 nr = ndr_desc->num_mappings; | |
1099 | struct nfit_set_info *info; | |
1100 | ||
1101 | if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE) | |
1102 | /* pass */; | |
1103 | else | |
1104 | return 0; | |
1105 | ||
1106 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); | |
1107 | if (!nd_set) | |
1108 | return -ENOMEM; | |
1109 | ||
1110 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); | |
1111 | if (!info) | |
1112 | return -ENOMEM; | |
1113 | for (i = 0; i < nr; i++) { | |
1114 | struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i]; | |
1115 | struct nfit_set_info_map *map = &info->mapping[i]; | |
1116 | struct nvdimm *nvdimm = nd_mapping->nvdimm; | |
1117 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1118 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, | |
1119 | spa->range_index, i); | |
1120 | ||
1121 | if (!memdev || !nfit_mem->dcr) { | |
1122 | dev_err(dev, "%s: failed to find DCR\n", __func__); | |
1123 | return -ENODEV; | |
1124 | } | |
1125 | ||
1126 | map->region_offset = memdev->region_offset; | |
1127 | map->serial_number = nfit_mem->dcr->serial_number; | |
1128 | } | |
1129 | ||
1130 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), | |
1131 | cmp_map, NULL); | |
1132 | nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); | |
1133 | ndr_desc->nd_set = nd_set; | |
1134 | devm_kfree(dev, info); | |
1135 | ||
1136 | return 0; | |
1137 | } | |
1138 | ||
047fc8a1 RZ |
1139 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
1140 | { | |
1141 | struct acpi_nfit_interleave *idt = mmio->idt; | |
1142 | u32 sub_line_offset, line_index, line_offset; | |
1143 | u64 line_no, table_skip_count, table_offset; | |
1144 | ||
1145 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); | |
1146 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); | |
1147 | line_offset = idt->line_offset[line_index] | |
1148 | * mmio->line_size; | |
1149 | table_offset = table_skip_count * mmio->table_size; | |
1150 | ||
1151 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; | |
1152 | } | |
1153 | ||
c2ad2954 RZ |
1154 | static void wmb_blk(struct nfit_blk *nfit_blk) |
1155 | { | |
1156 | ||
1157 | if (nfit_blk->nvdimm_flush) { | |
1158 | /* | |
1159 | * The first wmb() is needed to 'sfence' all previous writes | |
1160 | * such that they are architecturally visible for the platform | |
1161 | * buffer flush. Note that we've already arranged for pmem | |
1162 | * writes to avoid the cache via arch_memcpy_to_pmem(). The | |
1163 | * final wmb() ensures ordering for the NVDIMM flush write. | |
1164 | */ | |
1165 | wmb(); | |
1166 | writeq(1, nfit_blk->nvdimm_flush); | |
1167 | wmb(); | |
1168 | } else | |
1169 | wmb_pmem(); | |
1170 | } | |
1171 | ||
de4a196c | 1172 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
047fc8a1 RZ |
1173 | { |
1174 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1175 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; | |
1176 | ||
1177 | if (mmio->num_lines) | |
1178 | offset = to_interleave_offset(offset, mmio); | |
1179 | ||
12f03ee6 | 1180 | return readl(mmio->addr.base + offset); |
047fc8a1 RZ |
1181 | } |
1182 | ||
1183 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, | |
1184 | resource_size_t dpa, unsigned int len, unsigned int write) | |
1185 | { | |
1186 | u64 cmd, offset; | |
1187 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1188 | ||
1189 | enum { | |
1190 | BCW_OFFSET_MASK = (1ULL << 48)-1, | |
1191 | BCW_LEN_SHIFT = 48, | |
1192 | BCW_LEN_MASK = (1ULL << 8) - 1, | |
1193 | BCW_CMD_SHIFT = 56, | |
1194 | }; | |
1195 | ||
1196 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; | |
1197 | len = len >> L1_CACHE_SHIFT; | |
1198 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; | |
1199 | cmd |= ((u64) write) << BCW_CMD_SHIFT; | |
1200 | ||
1201 | offset = nfit_blk->cmd_offset + mmio->size * bw; | |
1202 | if (mmio->num_lines) | |
1203 | offset = to_interleave_offset(offset, mmio); | |
1204 | ||
67a3e8fe | 1205 | writeq(cmd, mmio->addr.base + offset); |
c2ad2954 | 1206 | wmb_blk(nfit_blk); |
f0f2c072 | 1207 | |
aef25338 | 1208 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
67a3e8fe | 1209 | readq(mmio->addr.base + offset); |
047fc8a1 RZ |
1210 | } |
1211 | ||
1212 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, | |
1213 | resource_size_t dpa, void *iobuf, size_t len, int rw, | |
1214 | unsigned int lane) | |
1215 | { | |
1216 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1217 | unsigned int copied = 0; | |
1218 | u64 base_offset; | |
1219 | int rc; | |
1220 | ||
1221 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES | |
1222 | + lane * mmio->size; | |
047fc8a1 RZ |
1223 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
1224 | while (len) { | |
1225 | unsigned int c; | |
1226 | u64 offset; | |
1227 | ||
1228 | if (mmio->num_lines) { | |
1229 | u32 line_offset; | |
1230 | ||
1231 | offset = to_interleave_offset(base_offset + copied, | |
1232 | mmio); | |
1233 | div_u64_rem(offset, mmio->line_size, &line_offset); | |
1234 | c = min_t(size_t, len, mmio->line_size - line_offset); | |
1235 | } else { | |
1236 | offset = base_offset + nfit_blk->bdw_offset; | |
1237 | c = len; | |
1238 | } | |
1239 | ||
1240 | if (rw) | |
67a3e8fe | 1241 | memcpy_to_pmem(mmio->addr.aperture + offset, |
c2ad2954 | 1242 | iobuf + copied, c); |
67a3e8fe | 1243 | else { |
aef25338 | 1244 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
67a3e8fe RZ |
1245 | mmio_flush_range((void __force *) |
1246 | mmio->addr.aperture + offset, c); | |
1247 | ||
c2ad2954 | 1248 | memcpy_from_pmem(iobuf + copied, |
67a3e8fe RZ |
1249 | mmio->addr.aperture + offset, c); |
1250 | } | |
047fc8a1 RZ |
1251 | |
1252 | copied += c; | |
1253 | len -= c; | |
1254 | } | |
c2ad2954 RZ |
1255 | |
1256 | if (rw) | |
1257 | wmb_blk(nfit_blk); | |
1258 | ||
047fc8a1 RZ |
1259 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
1260 | return rc; | |
1261 | } | |
1262 | ||
1263 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, | |
1264 | resource_size_t dpa, void *iobuf, u64 len, int rw) | |
1265 | { | |
1266 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); | |
1267 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1268 | struct nd_region *nd_region = nfit_blk->nd_region; | |
1269 | unsigned int lane, copied = 0; | |
1270 | int rc = 0; | |
1271 | ||
1272 | lane = nd_region_acquire_lane(nd_region); | |
1273 | while (len) { | |
1274 | u64 c = min(len, mmio->size); | |
1275 | ||
1276 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, | |
1277 | iobuf + copied, c, rw, lane); | |
1278 | if (rc) | |
1279 | break; | |
1280 | ||
1281 | copied += c; | |
1282 | len -= c; | |
1283 | } | |
1284 | nd_region_release_lane(nd_region, lane); | |
1285 | ||
1286 | return rc; | |
1287 | } | |
1288 | ||
1289 | static void nfit_spa_mapping_release(struct kref *kref) | |
1290 | { | |
1291 | struct nfit_spa_mapping *spa_map = to_spa_map(kref); | |
1292 | struct acpi_nfit_system_address *spa = spa_map->spa; | |
1293 | struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc; | |
1294 | ||
1295 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); | |
1296 | dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index); | |
67a3e8fe RZ |
1297 | if (spa_map->type == SPA_MAP_APERTURE) |
1298 | memunmap((void __force *)spa_map->addr.aperture); | |
1299 | else | |
1300 | iounmap(spa_map->addr.base); | |
047fc8a1 RZ |
1301 | release_mem_region(spa->address, spa->length); |
1302 | list_del(&spa_map->list); | |
1303 | kfree(spa_map); | |
1304 | } | |
1305 | ||
1306 | static struct nfit_spa_mapping *find_spa_mapping( | |
1307 | struct acpi_nfit_desc *acpi_desc, | |
1308 | struct acpi_nfit_system_address *spa) | |
1309 | { | |
1310 | struct nfit_spa_mapping *spa_map; | |
1311 | ||
1312 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); | |
1313 | list_for_each_entry(spa_map, &acpi_desc->spa_maps, list) | |
1314 | if (spa_map->spa == spa) | |
1315 | return spa_map; | |
1316 | ||
1317 | return NULL; | |
1318 | } | |
1319 | ||
1320 | static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc, | |
1321 | struct acpi_nfit_system_address *spa) | |
1322 | { | |
1323 | struct nfit_spa_mapping *spa_map; | |
1324 | ||
1325 | mutex_lock(&acpi_desc->spa_map_mutex); | |
1326 | spa_map = find_spa_mapping(acpi_desc, spa); | |
1327 | ||
1328 | if (spa_map) | |
1329 | kref_put(&spa_map->kref, nfit_spa_mapping_release); | |
1330 | mutex_unlock(&acpi_desc->spa_map_mutex); | |
1331 | } | |
1332 | ||
1333 | static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc, | |
c2ad2954 | 1334 | struct acpi_nfit_system_address *spa, enum spa_map_type type) |
047fc8a1 RZ |
1335 | { |
1336 | resource_size_t start = spa->address; | |
1337 | resource_size_t n = spa->length; | |
1338 | struct nfit_spa_mapping *spa_map; | |
1339 | struct resource *res; | |
1340 | ||
1341 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); | |
1342 | ||
1343 | spa_map = find_spa_mapping(acpi_desc, spa); | |
1344 | if (spa_map) { | |
1345 | kref_get(&spa_map->kref); | |
67a3e8fe | 1346 | return spa_map->addr.base; |
047fc8a1 RZ |
1347 | } |
1348 | ||
1349 | spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL); | |
1350 | if (!spa_map) | |
1351 | return NULL; | |
1352 | ||
1353 | INIT_LIST_HEAD(&spa_map->list); | |
1354 | spa_map->spa = spa; | |
1355 | kref_init(&spa_map->kref); | |
1356 | spa_map->acpi_desc = acpi_desc; | |
1357 | ||
1358 | res = request_mem_region(start, n, dev_name(acpi_desc->dev)); | |
1359 | if (!res) | |
1360 | goto err_mem; | |
1361 | ||
67a3e8fe RZ |
1362 | spa_map->type = type; |
1363 | if (type == SPA_MAP_APERTURE) | |
1364 | spa_map->addr.aperture = (void __pmem *)memremap(start, n, | |
1365 | ARCH_MEMREMAP_PMEM); | |
1366 | else | |
1367 | spa_map->addr.base = ioremap_nocache(start, n); | |
1368 | ||
c2ad2954 | 1369 | |
67a3e8fe | 1370 | if (!spa_map->addr.base) |
047fc8a1 RZ |
1371 | goto err_map; |
1372 | ||
1373 | list_add_tail(&spa_map->list, &acpi_desc->spa_maps); | |
67a3e8fe | 1374 | return spa_map->addr.base; |
047fc8a1 RZ |
1375 | |
1376 | err_map: | |
1377 | release_mem_region(start, n); | |
1378 | err_mem: | |
1379 | kfree(spa_map); | |
1380 | return NULL; | |
1381 | } | |
1382 | ||
1383 | /** | |
1384 | * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges | |
1385 | * @nvdimm_bus: NFIT-bus that provided the spa table entry | |
1386 | * @nfit_spa: spa table to map | |
c2ad2954 | 1387 | * @type: aperture or control region |
047fc8a1 RZ |
1388 | * |
1389 | * In the case where block-data-window apertures and | |
1390 | * dimm-control-regions are interleaved they will end up sharing a | |
1391 | * single request_mem_region() + ioremap() for the address range. In | |
1392 | * the style of devm nfit_spa_map() mappings are automatically dropped | |
1393 | * when all region devices referencing the same mapping are disabled / | |
1394 | * unbound. | |
1395 | */ | |
1396 | static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc, | |
c2ad2954 | 1397 | struct acpi_nfit_system_address *spa, enum spa_map_type type) |
047fc8a1 RZ |
1398 | { |
1399 | void __iomem *iomem; | |
1400 | ||
1401 | mutex_lock(&acpi_desc->spa_map_mutex); | |
c2ad2954 | 1402 | iomem = __nfit_spa_map(acpi_desc, spa, type); |
047fc8a1 RZ |
1403 | mutex_unlock(&acpi_desc->spa_map_mutex); |
1404 | ||
1405 | return iomem; | |
1406 | } | |
1407 | ||
1408 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, | |
1409 | struct acpi_nfit_interleave *idt, u16 interleave_ways) | |
1410 | { | |
1411 | if (idt) { | |
1412 | mmio->num_lines = idt->line_count; | |
1413 | mmio->line_size = idt->line_size; | |
1414 | if (interleave_ways == 0) | |
1415 | return -ENXIO; | |
1416 | mmio->table_size = mmio->num_lines * interleave_ways | |
1417 | * mmio->line_size; | |
1418 | } | |
1419 | ||
1420 | return 0; | |
1421 | } | |
1422 | ||
f0f2c072 RZ |
1423 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
1424 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) | |
1425 | { | |
1426 | struct nd_cmd_dimm_flags flags; | |
1427 | int rc; | |
1428 | ||
1429 | memset(&flags, 0, sizeof(flags)); | |
1430 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, | |
aef25338 | 1431 | sizeof(flags), NULL); |
f0f2c072 RZ |
1432 | |
1433 | if (rc >= 0 && flags.status == 0) | |
1434 | nfit_blk->dimm_flags = flags.flags; | |
1435 | else if (rc == -ENOTTY) { | |
1436 | /* fall back to a conservative default */ | |
aef25338 | 1437 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
f0f2c072 RZ |
1438 | rc = 0; |
1439 | } else | |
1440 | rc = -ENXIO; | |
1441 | ||
1442 | return rc; | |
1443 | } | |
1444 | ||
047fc8a1 RZ |
1445 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
1446 | struct device *dev) | |
1447 | { | |
1448 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1449 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1450 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); | |
c2ad2954 | 1451 | struct nfit_flush *nfit_flush; |
047fc8a1 RZ |
1452 | struct nfit_blk_mmio *mmio; |
1453 | struct nfit_blk *nfit_blk; | |
1454 | struct nfit_mem *nfit_mem; | |
1455 | struct nvdimm *nvdimm; | |
1456 | int rc; | |
1457 | ||
1458 | nvdimm = nd_blk_region_to_dimm(ndbr); | |
1459 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1460 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { | |
1461 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, | |
1462 | nfit_mem ? "" : " nfit_mem", | |
193ccca4 DW |
1463 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
1464 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); | |
047fc8a1 RZ |
1465 | return -ENXIO; |
1466 | } | |
1467 | ||
1468 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); | |
1469 | if (!nfit_blk) | |
1470 | return -ENOMEM; | |
1471 | nd_blk_region_set_provider_data(ndbr, nfit_blk); | |
1472 | nfit_blk->nd_region = to_nd_region(dev); | |
1473 | ||
1474 | /* map block aperture memory */ | |
1475 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; | |
1476 | mmio = &nfit_blk->mmio[BDW]; | |
67a3e8fe | 1477 | mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw, |
c2ad2954 | 1478 | SPA_MAP_APERTURE); |
67a3e8fe | 1479 | if (!mmio->addr.base) { |
047fc8a1 RZ |
1480 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
1481 | nvdimm_name(nvdimm)); | |
1482 | return -ENOMEM; | |
1483 | } | |
1484 | mmio->size = nfit_mem->bdw->size; | |
1485 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; | |
1486 | mmio->idt = nfit_mem->idt_bdw; | |
1487 | mmio->spa = nfit_mem->spa_bdw; | |
1488 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, | |
1489 | nfit_mem->memdev_bdw->interleave_ways); | |
1490 | if (rc) { | |
1491 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", | |
1492 | __func__, nvdimm_name(nvdimm)); | |
1493 | return rc; | |
1494 | } | |
1495 | ||
1496 | /* map block control memory */ | |
1497 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; | |
1498 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; | |
1499 | mmio = &nfit_blk->mmio[DCR]; | |
67a3e8fe | 1500 | mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr, |
c2ad2954 | 1501 | SPA_MAP_CONTROL); |
67a3e8fe | 1502 | if (!mmio->addr.base) { |
047fc8a1 RZ |
1503 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
1504 | nvdimm_name(nvdimm)); | |
1505 | return -ENOMEM; | |
1506 | } | |
1507 | mmio->size = nfit_mem->dcr->window_size; | |
1508 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; | |
1509 | mmio->idt = nfit_mem->idt_dcr; | |
1510 | mmio->spa = nfit_mem->spa_dcr; | |
1511 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, | |
1512 | nfit_mem->memdev_dcr->interleave_ways); | |
1513 | if (rc) { | |
1514 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", | |
1515 | __func__, nvdimm_name(nvdimm)); | |
1516 | return rc; | |
1517 | } | |
1518 | ||
f0f2c072 RZ |
1519 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
1520 | if (rc < 0) { | |
1521 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", | |
1522 | __func__, nvdimm_name(nvdimm)); | |
1523 | return rc; | |
1524 | } | |
1525 | ||
c2ad2954 RZ |
1526 | nfit_flush = nfit_mem->nfit_flush; |
1527 | if (nfit_flush && nfit_flush->flush->hint_count != 0) { | |
1528 | nfit_blk->nvdimm_flush = devm_ioremap_nocache(dev, | |
1529 | nfit_flush->flush->hint_address[0], 8); | |
1530 | if (!nfit_blk->nvdimm_flush) | |
1531 | return -ENOMEM; | |
1532 | } | |
1533 | ||
96601adb | 1534 | if (!arch_has_wmb_pmem() && !nfit_blk->nvdimm_flush) |
c2ad2954 RZ |
1535 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
1536 | ||
047fc8a1 RZ |
1537 | if (mmio->line_size == 0) |
1538 | return 0; | |
1539 | ||
1540 | if ((u32) nfit_blk->cmd_offset % mmio->line_size | |
1541 | + 8 > mmio->line_size) { | |
1542 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); | |
1543 | return -ENXIO; | |
1544 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size | |
1545 | + 8 > mmio->line_size) { | |
1546 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); | |
1547 | return -ENXIO; | |
1548 | } | |
1549 | ||
1550 | return 0; | |
1551 | } | |
1552 | ||
1553 | static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus, | |
1554 | struct device *dev) | |
1555 | { | |
1556 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1557 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1558 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); | |
1559 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); | |
1560 | int i; | |
1561 | ||
1562 | if (!nfit_blk) | |
1563 | return; /* never enabled */ | |
1564 | ||
1565 | /* auto-free BLK spa mappings */ | |
1566 | for (i = 0; i < 2; i++) { | |
1567 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i]; | |
1568 | ||
67a3e8fe | 1569 | if (mmio->addr.base) |
047fc8a1 RZ |
1570 | nfit_spa_unmap(acpi_desc, mmio->spa); |
1571 | } | |
1572 | nd_blk_region_set_provider_data(ndbr, NULL); | |
1573 | /* devm will free nfit_blk */ | |
1574 | } | |
1575 | ||
aef25338 | 1576 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 1577 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
0caeef63 | 1578 | { |
aef25338 | 1579 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
1cf03c00 | 1580 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
aef25338 DW |
1581 | int cmd_rc, rc; |
1582 | ||
1cf03c00 DW |
1583 | cmd->address = spa->address; |
1584 | cmd->length = spa->length; | |
aef25338 DW |
1585 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
1586 | sizeof(*cmd), &cmd_rc); | |
1587 | if (rc < 0) | |
1588 | return rc; | |
1cf03c00 | 1589 | return cmd_rc; |
0caeef63 VV |
1590 | } |
1591 | ||
1cf03c00 | 1592 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
0caeef63 VV |
1593 | { |
1594 | int rc; | |
1cf03c00 DW |
1595 | int cmd_rc; |
1596 | struct nd_cmd_ars_start ars_start; | |
1597 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
1598 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
0caeef63 | 1599 | |
1cf03c00 DW |
1600 | memset(&ars_start, 0, sizeof(ars_start)); |
1601 | ars_start.address = spa->address; | |
1602 | ars_start.length = spa->length; | |
1603 | if (nfit_spa_type(spa) == NFIT_SPA_PM) | |
1604 | ars_start.type = ND_ARS_PERSISTENT; | |
1605 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) | |
1606 | ars_start.type = ND_ARS_VOLATILE; | |
1607 | else | |
1608 | return -ENOTTY; | |
aef25338 | 1609 | |
1cf03c00 DW |
1610 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
1611 | sizeof(ars_start), &cmd_rc); | |
aef25338 | 1612 | |
1cf03c00 DW |
1613 | if (rc < 0) |
1614 | return rc; | |
1615 | return cmd_rc; | |
0caeef63 VV |
1616 | } |
1617 | ||
1cf03c00 | 1618 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 1619 | { |
aef25338 | 1620 | int rc, cmd_rc; |
1cf03c00 DW |
1621 | struct nd_cmd_ars_start ars_start; |
1622 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
1623 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
1624 | ||
1625 | memset(&ars_start, 0, sizeof(ars_start)); | |
1626 | ars_start.address = ars_status->restart_address; | |
1627 | ars_start.length = ars_status->restart_length; | |
1628 | ars_start.type = ars_status->type; | |
1629 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, | |
1630 | sizeof(ars_start), &cmd_rc); | |
1631 | if (rc < 0) | |
1632 | return rc; | |
1633 | return cmd_rc; | |
1634 | } | |
0caeef63 | 1635 | |
1cf03c00 DW |
1636 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
1637 | { | |
1638 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
1639 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
1640 | int rc, cmd_rc; | |
aef25338 | 1641 | |
1cf03c00 DW |
1642 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
1643 | acpi_desc->ars_status_size, &cmd_rc); | |
1644 | if (rc < 0) | |
1645 | return rc; | |
1646 | return cmd_rc; | |
0caeef63 VV |
1647 | } |
1648 | ||
1649 | static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus, | |
1cf03c00 | 1650 | struct nd_cmd_ars_status *ars_status) |
0caeef63 VV |
1651 | { |
1652 | int rc; | |
1653 | u32 i; | |
1654 | ||
0caeef63 VV |
1655 | for (i = 0; i < ars_status->num_records; i++) { |
1656 | rc = nvdimm_bus_add_poison(nvdimm_bus, | |
1657 | ars_status->records[i].err_address, | |
1658 | ars_status->records[i].length); | |
1659 | if (rc) | |
1660 | return rc; | |
1661 | } | |
1662 | ||
1663 | return 0; | |
1664 | } | |
1665 | ||
af1996ef TK |
1666 | static void acpi_nfit_remove_resource(void *data) |
1667 | { | |
1668 | struct resource *res = data; | |
1669 | ||
1670 | remove_resource(res); | |
1671 | } | |
1672 | ||
1673 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, | |
1674 | struct nd_region_desc *ndr_desc) | |
1675 | { | |
1676 | struct resource *res, *nd_res = ndr_desc->res; | |
1677 | int is_pmem, ret; | |
1678 | ||
1679 | /* No operation if the region is already registered as PMEM */ | |
1680 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), | |
1681 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); | |
1682 | if (is_pmem == REGION_INTERSECTS) | |
1683 | return 0; | |
1684 | ||
1685 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); | |
1686 | if (!res) | |
1687 | return -ENOMEM; | |
1688 | ||
1689 | res->name = "Persistent Memory"; | |
1690 | res->start = nd_res->start; | |
1691 | res->end = nd_res->end; | |
1692 | res->flags = IORESOURCE_MEM; | |
1693 | res->desc = IORES_DESC_PERSISTENT_MEMORY; | |
1694 | ||
1695 | ret = insert_resource(&iomem_resource, res); | |
1696 | if (ret) | |
1697 | return ret; | |
1698 | ||
1699 | ret = devm_add_action(acpi_desc->dev, acpi_nfit_remove_resource, res); | |
1700 | if (ret) { | |
1701 | remove_resource(res); | |
1702 | return ret; | |
1703 | } | |
1704 | ||
1705 | return 0; | |
1706 | } | |
1707 | ||
1f7df6f8 DW |
1708 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
1709 | struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc, | |
1710 | struct acpi_nfit_memory_map *memdev, | |
1cf03c00 | 1711 | struct nfit_spa *nfit_spa) |
1f7df6f8 DW |
1712 | { |
1713 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, | |
1714 | memdev->device_handle); | |
1cf03c00 | 1715 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 | 1716 | struct nd_blk_region_desc *ndbr_desc; |
1f7df6f8 DW |
1717 | struct nfit_mem *nfit_mem; |
1718 | int blk_valid = 0; | |
1719 | ||
1720 | if (!nvdimm) { | |
1721 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", | |
1722 | spa->range_index, memdev->device_handle); | |
1723 | return -ENODEV; | |
1724 | } | |
1725 | ||
1726 | nd_mapping->nvdimm = nvdimm; | |
1727 | switch (nfit_spa_type(spa)) { | |
1728 | case NFIT_SPA_PM: | |
1729 | case NFIT_SPA_VOLATILE: | |
1730 | nd_mapping->start = memdev->address; | |
1731 | nd_mapping->size = memdev->region_size; | |
1732 | break; | |
1733 | case NFIT_SPA_DCR: | |
1734 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1735 | if (!nfit_mem || !nfit_mem->bdw) { | |
1736 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", | |
1737 | spa->range_index, nvdimm_name(nvdimm)); | |
1738 | } else { | |
1739 | nd_mapping->size = nfit_mem->bdw->capacity; | |
1740 | nd_mapping->start = nfit_mem->bdw->start_address; | |
5212e11f | 1741 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
1f7df6f8 DW |
1742 | blk_valid = 1; |
1743 | } | |
1744 | ||
1745 | ndr_desc->nd_mapping = nd_mapping; | |
1746 | ndr_desc->num_mappings = blk_valid; | |
047fc8a1 RZ |
1747 | ndbr_desc = to_blk_region_desc(ndr_desc); |
1748 | ndbr_desc->enable = acpi_nfit_blk_region_enable; | |
1749 | ndbr_desc->disable = acpi_nfit_blk_region_disable; | |
6bc75619 | 1750 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
1cf03c00 DW |
1751 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
1752 | ndr_desc); | |
1753 | if (!nfit_spa->nd_region) | |
1f7df6f8 DW |
1754 | return -ENOMEM; |
1755 | break; | |
1756 | } | |
1757 | ||
1758 | return 0; | |
1759 | } | |
1760 | ||
1761 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, | |
1762 | struct nfit_spa *nfit_spa) | |
1763 | { | |
1764 | static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS]; | |
1765 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
047fc8a1 RZ |
1766 | struct nd_blk_region_desc ndbr_desc; |
1767 | struct nd_region_desc *ndr_desc; | |
1f7df6f8 | 1768 | struct nfit_memdev *nfit_memdev; |
1f7df6f8 DW |
1769 | struct nvdimm_bus *nvdimm_bus; |
1770 | struct resource res; | |
eaf96153 | 1771 | int count = 0, rc; |
1f7df6f8 | 1772 | |
1cf03c00 | 1773 | if (nfit_spa->nd_region) |
20985164 VV |
1774 | return 0; |
1775 | ||
1f7df6f8 DW |
1776 | if (spa->range_index == 0) { |
1777 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", | |
1778 | __func__); | |
1779 | return 0; | |
1780 | } | |
1781 | ||
1782 | memset(&res, 0, sizeof(res)); | |
1783 | memset(&nd_mappings, 0, sizeof(nd_mappings)); | |
047fc8a1 | 1784 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
1f7df6f8 DW |
1785 | res.start = spa->address; |
1786 | res.end = res.start + spa->length - 1; | |
047fc8a1 RZ |
1787 | ndr_desc = &ndbr_desc.ndr_desc; |
1788 | ndr_desc->res = &res; | |
1789 | ndr_desc->provider_data = nfit_spa; | |
1790 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; | |
41d7a6d6 TK |
1791 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
1792 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( | |
1793 | spa->proximity_domain); | |
1794 | else | |
1795 | ndr_desc->numa_node = NUMA_NO_NODE; | |
1796 | ||
1f7df6f8 DW |
1797 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
1798 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
1799 | struct nd_mapping *nd_mapping; | |
1f7df6f8 DW |
1800 | |
1801 | if (memdev->range_index != spa->range_index) | |
1802 | continue; | |
1803 | if (count >= ND_MAX_MAPPINGS) { | |
1804 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", | |
1805 | spa->range_index, ND_MAX_MAPPINGS); | |
1806 | return -ENXIO; | |
1807 | } | |
1808 | nd_mapping = &nd_mappings[count++]; | |
047fc8a1 | 1809 | rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc, |
1cf03c00 | 1810 | memdev, nfit_spa); |
1f7df6f8 | 1811 | if (rc) |
1cf03c00 | 1812 | goto out; |
1f7df6f8 DW |
1813 | } |
1814 | ||
047fc8a1 RZ |
1815 | ndr_desc->nd_mapping = nd_mappings; |
1816 | ndr_desc->num_mappings = count; | |
1817 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); | |
eaf96153 | 1818 | if (rc) |
1cf03c00 | 1819 | goto out; |
eaf96153 | 1820 | |
1f7df6f8 DW |
1821 | nvdimm_bus = acpi_desc->nvdimm_bus; |
1822 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { | |
af1996ef | 1823 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
48901165 | 1824 | if (rc) { |
af1996ef TK |
1825 | dev_warn(acpi_desc->dev, |
1826 | "failed to insert pmem resource to iomem: %d\n", | |
1827 | rc); | |
48901165 | 1828 | goto out; |
0caeef63 | 1829 | } |
48901165 | 1830 | |
1cf03c00 DW |
1831 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
1832 | ndr_desc); | |
1833 | if (!nfit_spa->nd_region) | |
1834 | rc = -ENOMEM; | |
1f7df6f8 | 1835 | } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) { |
1cf03c00 DW |
1836 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
1837 | ndr_desc); | |
1838 | if (!nfit_spa->nd_region) | |
1839 | rc = -ENOMEM; | |
1f7df6f8 | 1840 | } |
20985164 | 1841 | |
1cf03c00 DW |
1842 | out: |
1843 | if (rc) | |
1844 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", | |
1845 | nfit_spa->spa->range_index); | |
1846 | return rc; | |
1847 | } | |
1848 | ||
1849 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, | |
1850 | u32 max_ars) | |
1851 | { | |
1852 | struct device *dev = acpi_desc->dev; | |
1853 | struct nd_cmd_ars_status *ars_status; | |
1854 | ||
1855 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { | |
1856 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); | |
1857 | return 0; | |
1858 | } | |
1859 | ||
1860 | if (acpi_desc->ars_status) | |
1861 | devm_kfree(dev, acpi_desc->ars_status); | |
1862 | acpi_desc->ars_status = NULL; | |
1863 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); | |
1864 | if (!ars_status) | |
1865 | return -ENOMEM; | |
1866 | acpi_desc->ars_status = ars_status; | |
1867 | acpi_desc->ars_status_size = max_ars; | |
1f7df6f8 DW |
1868 | return 0; |
1869 | } | |
1870 | ||
1cf03c00 DW |
1871 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
1872 | struct nfit_spa *nfit_spa) | |
1873 | { | |
1874 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
1875 | int rc; | |
1876 | ||
1877 | if (!nfit_spa->max_ars) { | |
1878 | struct nd_cmd_ars_cap ars_cap; | |
1879 | ||
1880 | memset(&ars_cap, 0, sizeof(ars_cap)); | |
1881 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); | |
1882 | if (rc < 0) | |
1883 | return rc; | |
1884 | nfit_spa->max_ars = ars_cap.max_ars_out; | |
1885 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; | |
1886 | /* check that the supported scrub types match the spa type */ | |
1887 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && | |
1888 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) | |
1889 | return -ENOTTY; | |
1890 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && | |
1891 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) | |
1892 | return -ENOTTY; | |
1893 | } | |
1894 | ||
1895 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) | |
1896 | return -ENOMEM; | |
1897 | ||
1898 | rc = ars_get_status(acpi_desc); | |
1899 | if (rc < 0 && rc != -ENOSPC) | |
1900 | return rc; | |
1901 | ||
1902 | if (ars_status_process_records(acpi_desc->nvdimm_bus, | |
1903 | acpi_desc->ars_status)) | |
1904 | return -ENOMEM; | |
1905 | ||
1906 | return 0; | |
1907 | } | |
1908 | ||
1909 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, | |
1910 | struct nfit_spa *nfit_spa) | |
1911 | { | |
1912 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
1913 | unsigned int overflow_retry = scrub_overflow_abort; | |
1914 | u64 init_ars_start = 0, init_ars_len = 0; | |
1915 | struct device *dev = acpi_desc->dev; | |
1916 | unsigned int tmo = scrub_timeout; | |
1917 | int rc; | |
1918 | ||
1919 | if (nfit_spa->ars_done || !nfit_spa->nd_region) | |
1920 | return; | |
1921 | ||
1922 | rc = ars_start(acpi_desc, nfit_spa); | |
1923 | /* | |
1924 | * If we timed out the initial scan we'll still be busy here, | |
1925 | * and will wait another timeout before giving up permanently. | |
1926 | */ | |
1927 | if (rc < 0 && rc != -EBUSY) | |
1928 | return; | |
1929 | ||
1930 | do { | |
1931 | u64 ars_start, ars_len; | |
1932 | ||
1933 | if (acpi_desc->cancel) | |
1934 | break; | |
1935 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
1936 | if (rc == -ENOTTY) | |
1937 | break; | |
1938 | if (rc == -EBUSY && !tmo) { | |
1939 | dev_warn(dev, "range %d ars timeout, aborting\n", | |
1940 | spa->range_index); | |
1941 | break; | |
1942 | } | |
1943 | ||
1944 | if (rc == -EBUSY) { | |
1945 | /* | |
1946 | * Note, entries may be appended to the list | |
1947 | * while the lock is dropped, but the workqueue | |
1948 | * being active prevents entries being deleted / | |
1949 | * freed. | |
1950 | */ | |
1951 | mutex_unlock(&acpi_desc->init_mutex); | |
1952 | ssleep(1); | |
1953 | tmo--; | |
1954 | mutex_lock(&acpi_desc->init_mutex); | |
1955 | continue; | |
1956 | } | |
1957 | ||
1958 | /* we got some results, but there are more pending... */ | |
1959 | if (rc == -ENOSPC && overflow_retry--) { | |
1960 | if (!init_ars_len) { | |
1961 | init_ars_len = acpi_desc->ars_status->length; | |
1962 | init_ars_start = acpi_desc->ars_status->address; | |
1963 | } | |
1964 | rc = ars_continue(acpi_desc); | |
1965 | } | |
1966 | ||
1967 | if (rc < 0) { | |
1968 | dev_warn(dev, "range %d ars continuation failed\n", | |
1969 | spa->range_index); | |
1970 | break; | |
1971 | } | |
1972 | ||
1973 | if (init_ars_len) { | |
1974 | ars_start = init_ars_start; | |
1975 | ars_len = init_ars_len; | |
1976 | } else { | |
1977 | ars_start = acpi_desc->ars_status->address; | |
1978 | ars_len = acpi_desc->ars_status->length; | |
1979 | } | |
1980 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", | |
1981 | spa->range_index, ars_start, ars_len); | |
1982 | /* notify the region about new poison entries */ | |
1983 | nvdimm_region_notify(nfit_spa->nd_region, | |
1984 | NVDIMM_REVALIDATE_POISON); | |
1985 | break; | |
1986 | } while (1); | |
1987 | } | |
1988 | ||
1989 | static void acpi_nfit_scrub(struct work_struct *work) | |
1f7df6f8 | 1990 | { |
1cf03c00 DW |
1991 | struct device *dev; |
1992 | u64 init_scrub_length = 0; | |
1f7df6f8 | 1993 | struct nfit_spa *nfit_spa; |
1cf03c00 DW |
1994 | u64 init_scrub_address = 0; |
1995 | bool init_ars_done = false; | |
1996 | struct acpi_nfit_desc *acpi_desc; | |
1997 | unsigned int tmo = scrub_timeout; | |
1998 | unsigned int overflow_retry = scrub_overflow_abort; | |
1999 | ||
2000 | acpi_desc = container_of(work, typeof(*acpi_desc), work); | |
2001 | dev = acpi_desc->dev; | |
1f7df6f8 | 2002 | |
1cf03c00 DW |
2003 | /* |
2004 | * We scrub in 2 phases. The first phase waits for any platform | |
2005 | * firmware initiated scrubs to complete and then we go search for the | |
2006 | * affected spa regions to mark them scanned. In the second phase we | |
2007 | * initiate a directed scrub for every range that was not scrubbed in | |
2008 | * phase 1. | |
2009 | */ | |
2010 | ||
2011 | /* process platform firmware initiated scrubs */ | |
2012 | retry: | |
2013 | mutex_lock(&acpi_desc->init_mutex); | |
1f7df6f8 | 2014 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
1cf03c00 DW |
2015 | struct nd_cmd_ars_status *ars_status; |
2016 | struct acpi_nfit_system_address *spa; | |
2017 | u64 ars_start, ars_len; | |
2018 | int rc; | |
1f7df6f8 | 2019 | |
1cf03c00 DW |
2020 | if (acpi_desc->cancel) |
2021 | break; | |
2022 | ||
2023 | if (nfit_spa->nd_region) | |
2024 | continue; | |
2025 | ||
2026 | if (init_ars_done) { | |
2027 | /* | |
2028 | * No need to re-query, we're now just | |
2029 | * reconciling all the ranges covered by the | |
2030 | * initial scrub | |
2031 | */ | |
2032 | rc = 0; | |
2033 | } else | |
2034 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2035 | ||
2036 | if (rc == -ENOTTY) { | |
2037 | /* no ars capability, just register spa and move on */ | |
2038 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2039 | continue; | |
2040 | } | |
2041 | ||
2042 | if (rc == -EBUSY && !tmo) { | |
2043 | /* fallthrough to directed scrub in phase 2 */ | |
2044 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); | |
2045 | break; | |
2046 | } else if (rc == -EBUSY) { | |
2047 | mutex_unlock(&acpi_desc->init_mutex); | |
2048 | ssleep(1); | |
2049 | tmo--; | |
2050 | goto retry; | |
2051 | } | |
2052 | ||
2053 | /* we got some results, but there are more pending... */ | |
2054 | if (rc == -ENOSPC && overflow_retry--) { | |
2055 | ars_status = acpi_desc->ars_status; | |
2056 | /* | |
2057 | * Record the original scrub range, so that we | |
2058 | * can recall all the ranges impacted by the | |
2059 | * initial scrub. | |
2060 | */ | |
2061 | if (!init_scrub_length) { | |
2062 | init_scrub_length = ars_status->length; | |
2063 | init_scrub_address = ars_status->address; | |
2064 | } | |
2065 | rc = ars_continue(acpi_desc); | |
2066 | if (rc == 0) { | |
2067 | mutex_unlock(&acpi_desc->init_mutex); | |
2068 | goto retry; | |
2069 | } | |
2070 | } | |
2071 | ||
2072 | if (rc < 0) { | |
2073 | /* | |
2074 | * Initial scrub failed, we'll give it one more | |
2075 | * try below... | |
2076 | */ | |
2077 | break; | |
2078 | } | |
2079 | ||
2080 | /* We got some final results, record completed ranges */ | |
2081 | ars_status = acpi_desc->ars_status; | |
2082 | if (init_scrub_length) { | |
2083 | ars_start = init_scrub_address; | |
2084 | ars_len = ars_start + init_scrub_length; | |
2085 | } else { | |
2086 | ars_start = ars_status->address; | |
2087 | ars_len = ars_status->length; | |
2088 | } | |
2089 | spa = nfit_spa->spa; | |
2090 | ||
2091 | if (!init_ars_done) { | |
2092 | init_ars_done = true; | |
2093 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", | |
2094 | ars_start, ars_len); | |
2095 | } | |
2096 | if (ars_start <= spa->address && ars_start + ars_len | |
2097 | >= spa->address + spa->length) | |
2098 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
1f7df6f8 | 2099 | } |
1cf03c00 DW |
2100 | |
2101 | /* | |
2102 | * For all the ranges not covered by an initial scrub we still | |
2103 | * want to see if there are errors, but it's ok to discover them | |
2104 | * asynchronously. | |
2105 | */ | |
2106 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
2107 | /* | |
2108 | * Flag all the ranges that still need scrubbing, but | |
2109 | * register them now to make data available. | |
2110 | */ | |
2111 | if (nfit_spa->nd_region) | |
2112 | nfit_spa->ars_done = 1; | |
2113 | else | |
2114 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2115 | } | |
2116 | ||
2117 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2118 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); | |
2119 | mutex_unlock(&acpi_desc->init_mutex); | |
2120 | } | |
2121 | ||
2122 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) | |
2123 | { | |
2124 | struct nfit_spa *nfit_spa; | |
2125 | int rc; | |
2126 | ||
2127 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2128 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { | |
2129 | /* BLK regions don't need to wait for ars results */ | |
2130 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2131 | if (rc) | |
2132 | return rc; | |
2133 | } | |
2134 | ||
2135 | queue_work(nfit_wq, &acpi_desc->work); | |
1f7df6f8 DW |
2136 | return 0; |
2137 | } | |
2138 | ||
20985164 VV |
2139 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
2140 | struct nfit_table_prev *prev) | |
2141 | { | |
2142 | struct device *dev = acpi_desc->dev; | |
2143 | ||
2144 | if (!list_empty(&prev->spas) || | |
2145 | !list_empty(&prev->memdevs) || | |
2146 | !list_empty(&prev->dcrs) || | |
2147 | !list_empty(&prev->bdws) || | |
2148 | !list_empty(&prev->idts) || | |
2149 | !list_empty(&prev->flushes)) { | |
2150 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); | |
2151 | return -ENXIO; | |
2152 | } | |
2153 | return 0; | |
2154 | } | |
2155 | ||
6bc75619 | 2156 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz) |
b94d5230 DW |
2157 | { |
2158 | struct device *dev = acpi_desc->dev; | |
20985164 | 2159 | struct nfit_table_prev prev; |
b94d5230 DW |
2160 | const void *end; |
2161 | u8 *data; | |
1f7df6f8 | 2162 | int rc; |
b94d5230 | 2163 | |
20985164 VV |
2164 | mutex_lock(&acpi_desc->init_mutex); |
2165 | ||
2166 | INIT_LIST_HEAD(&prev.spas); | |
2167 | INIT_LIST_HEAD(&prev.memdevs); | |
2168 | INIT_LIST_HEAD(&prev.dcrs); | |
2169 | INIT_LIST_HEAD(&prev.bdws); | |
2170 | INIT_LIST_HEAD(&prev.idts); | |
2171 | INIT_LIST_HEAD(&prev.flushes); | |
2172 | ||
2173 | list_cut_position(&prev.spas, &acpi_desc->spas, | |
2174 | acpi_desc->spas.prev); | |
2175 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, | |
2176 | acpi_desc->memdevs.prev); | |
2177 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, | |
2178 | acpi_desc->dcrs.prev); | |
2179 | list_cut_position(&prev.bdws, &acpi_desc->bdws, | |
2180 | acpi_desc->bdws.prev); | |
2181 | list_cut_position(&prev.idts, &acpi_desc->idts, | |
2182 | acpi_desc->idts.prev); | |
2183 | list_cut_position(&prev.flushes, &acpi_desc->flushes, | |
2184 | acpi_desc->flushes.prev); | |
b94d5230 DW |
2185 | |
2186 | data = (u8 *) acpi_desc->nfit; | |
2187 | end = data + sz; | |
b94d5230 | 2188 | while (!IS_ERR_OR_NULL(data)) |
20985164 | 2189 | data = add_table(acpi_desc, &prev, data, end); |
b94d5230 DW |
2190 | |
2191 | if (IS_ERR(data)) { | |
2192 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, | |
2193 | PTR_ERR(data)); | |
20985164 VV |
2194 | rc = PTR_ERR(data); |
2195 | goto out_unlock; | |
b94d5230 DW |
2196 | } |
2197 | ||
20985164 VV |
2198 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
2199 | if (rc) | |
2200 | goto out_unlock; | |
2201 | ||
2202 | if (nfit_mem_init(acpi_desc) != 0) { | |
2203 | rc = -ENOMEM; | |
2204 | goto out_unlock; | |
2205 | } | |
b94d5230 | 2206 | |
62232e45 DW |
2207 | acpi_nfit_init_dsms(acpi_desc); |
2208 | ||
1f7df6f8 DW |
2209 | rc = acpi_nfit_register_dimms(acpi_desc); |
2210 | if (rc) | |
20985164 VV |
2211 | goto out_unlock; |
2212 | ||
2213 | rc = acpi_nfit_register_regions(acpi_desc); | |
1f7df6f8 | 2214 | |
20985164 VV |
2215 | out_unlock: |
2216 | mutex_unlock(&acpi_desc->init_mutex); | |
2217 | return rc; | |
b94d5230 | 2218 | } |
6bc75619 | 2219 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
b94d5230 | 2220 | |
7ae0fa43 DW |
2221 | struct acpi_nfit_flush_work { |
2222 | struct work_struct work; | |
2223 | struct completion cmp; | |
2224 | }; | |
2225 | ||
2226 | static void flush_probe(struct work_struct *work) | |
2227 | { | |
2228 | struct acpi_nfit_flush_work *flush; | |
2229 | ||
2230 | flush = container_of(work, typeof(*flush), work); | |
2231 | complete(&flush->cmp); | |
2232 | } | |
2233 | ||
2234 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) | |
2235 | { | |
2236 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2237 | struct device *dev = acpi_desc->dev; | |
2238 | struct acpi_nfit_flush_work flush; | |
2239 | ||
2240 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ | |
2241 | device_lock(dev); | |
2242 | device_unlock(dev); | |
2243 | ||
2244 | /* | |
2245 | * Scrub work could take 10s of seconds, userspace may give up so we | |
2246 | * need to be interruptible while waiting. | |
2247 | */ | |
2248 | INIT_WORK_ONSTACK(&flush.work, flush_probe); | |
2249 | COMPLETION_INITIALIZER_ONSTACK(flush.cmp); | |
2250 | queue_work(nfit_wq, &flush.work); | |
2251 | return wait_for_completion_interruptible(&flush.cmp); | |
2252 | } | |
2253 | ||
87bf572e DW |
2254 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
2255 | struct nvdimm *nvdimm, unsigned int cmd) | |
2256 | { | |
2257 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2258 | ||
2259 | if (nvdimm) | |
2260 | return 0; | |
2261 | if (cmd != ND_CMD_ARS_START) | |
2262 | return 0; | |
2263 | ||
2264 | /* | |
2265 | * The kernel and userspace may race to initiate a scrub, but | |
2266 | * the scrub thread is prepared to lose that initial race. It | |
2267 | * just needs guarantees that any ars it initiates are not | |
2268 | * interrupted by any intervening start reqeusts from userspace. | |
2269 | */ | |
2270 | if (work_busy(&acpi_desc->work)) | |
2271 | return -EBUSY; | |
2272 | ||
2273 | return 0; | |
2274 | } | |
2275 | ||
a61fe6f7 | 2276 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
b94d5230 DW |
2277 | { |
2278 | struct nvdimm_bus_descriptor *nd_desc; | |
b94d5230 DW |
2279 | |
2280 | dev_set_drvdata(dev, acpi_desc); | |
2281 | acpi_desc->dev = dev; | |
6bc75619 | 2282 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
b94d5230 DW |
2283 | nd_desc = &acpi_desc->nd_desc; |
2284 | nd_desc->provider_name = "ACPI.NFIT"; | |
2285 | nd_desc->ndctl = acpi_nfit_ctl; | |
7ae0fa43 | 2286 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
87bf572e | 2287 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
45def22c | 2288 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
b94d5230 | 2289 | |
20985164 VV |
2290 | INIT_LIST_HEAD(&acpi_desc->spa_maps); |
2291 | INIT_LIST_HEAD(&acpi_desc->spas); | |
2292 | INIT_LIST_HEAD(&acpi_desc->dcrs); | |
2293 | INIT_LIST_HEAD(&acpi_desc->bdws); | |
2294 | INIT_LIST_HEAD(&acpi_desc->idts); | |
2295 | INIT_LIST_HEAD(&acpi_desc->flushes); | |
2296 | INIT_LIST_HEAD(&acpi_desc->memdevs); | |
2297 | INIT_LIST_HEAD(&acpi_desc->dimms); | |
2298 | mutex_init(&acpi_desc->spa_map_mutex); | |
2299 | mutex_init(&acpi_desc->init_mutex); | |
1cf03c00 | 2300 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
20985164 | 2301 | } |
a61fe6f7 | 2302 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
20985164 VV |
2303 | |
2304 | static int acpi_nfit_add(struct acpi_device *adev) | |
2305 | { | |
2306 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
2307 | struct acpi_nfit_desc *acpi_desc; | |
2308 | struct device *dev = &adev->dev; | |
2309 | struct acpi_table_header *tbl; | |
2310 | acpi_status status = AE_OK; | |
2311 | acpi_size sz; | |
2312 | int rc; | |
2313 | ||
2314 | status = acpi_get_table_with_size("NFIT", 0, &tbl, &sz); | |
2315 | if (ACPI_FAILURE(status)) { | |
2316 | /* This is ok, we could have an nvdimm hotplugged later */ | |
2317 | dev_dbg(dev, "failed to find NFIT at startup\n"); | |
2318 | return 0; | |
2319 | } | |
2320 | ||
a61fe6f7 DW |
2321 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
2322 | if (!acpi_desc) | |
2323 | return -ENOMEM; | |
2324 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
2325 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); | |
2326 | if (!acpi_desc->nvdimm_bus) | |
2327 | return -ENOMEM; | |
20985164 | 2328 | |
6b577c9d LK |
2329 | /* |
2330 | * Save the acpi header for later and then skip it, | |
2331 | * making nfit point to the first nfit table header. | |
2332 | */ | |
2333 | acpi_desc->acpi_header = *tbl; | |
2334 | acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit); | |
2335 | sz -= sizeof(struct acpi_table_nfit); | |
20985164 VV |
2336 | |
2337 | /* Evaluate _FIT and override with that if present */ | |
2338 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
2339 | if (ACPI_SUCCESS(status) && buf.length > 0) { | |
6b577c9d LK |
2340 | union acpi_object *obj; |
2341 | /* | |
2342 | * Adjust for the acpi_object header of the _FIT | |
2343 | */ | |
2344 | obj = buf.pointer; | |
2345 | if (obj->type == ACPI_TYPE_BUFFER) { | |
2346 | acpi_desc->nfit = | |
2347 | (struct acpi_nfit_header *)obj->buffer.pointer; | |
2348 | sz = obj->buffer.length; | |
2349 | } else | |
2350 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", | |
2351 | __func__, (int) obj->type); | |
20985164 | 2352 | } |
b94d5230 DW |
2353 | |
2354 | rc = acpi_nfit_init(acpi_desc, sz); | |
2355 | if (rc) { | |
2356 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); | |
2357 | return rc; | |
2358 | } | |
2359 | return 0; | |
2360 | } | |
2361 | ||
2362 | static int acpi_nfit_remove(struct acpi_device *adev) | |
2363 | { | |
2364 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); | |
2365 | ||
7ae0fa43 DW |
2366 | acpi_desc->cancel = 1; |
2367 | flush_workqueue(nfit_wq); | |
b94d5230 DW |
2368 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
2369 | return 0; | |
2370 | } | |
2371 | ||
20985164 VV |
2372 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
2373 | { | |
2374 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); | |
2375 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
6b577c9d LK |
2376 | struct acpi_nfit_header *nfit_saved; |
2377 | union acpi_object *obj; | |
20985164 VV |
2378 | struct device *dev = &adev->dev; |
2379 | acpi_status status; | |
2380 | int ret; | |
2381 | ||
2382 | dev_dbg(dev, "%s: event: %d\n", __func__, event); | |
2383 | ||
2384 | device_lock(dev); | |
2385 | if (!dev->driver) { | |
2386 | /* dev->driver may be null if we're being removed */ | |
2387 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); | |
d91e8928 | 2388 | goto out_unlock; |
20985164 VV |
2389 | } |
2390 | ||
2391 | if (!acpi_desc) { | |
a61fe6f7 DW |
2392 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
2393 | if (!acpi_desc) | |
2394 | goto out_unlock; | |
2395 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
2396 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); | |
2397 | if (!acpi_desc->nvdimm_bus) | |
20985164 | 2398 | goto out_unlock; |
7ae0fa43 DW |
2399 | } else { |
2400 | /* | |
2401 | * Finish previous registration before considering new | |
2402 | * regions. | |
2403 | */ | |
2404 | flush_workqueue(nfit_wq); | |
20985164 VV |
2405 | } |
2406 | ||
2407 | /* Evaluate _FIT */ | |
2408 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
2409 | if (ACPI_FAILURE(status)) { | |
2410 | dev_err(dev, "failed to evaluate _FIT\n"); | |
2411 | goto out_unlock; | |
2412 | } | |
2413 | ||
2414 | nfit_saved = acpi_desc->nfit; | |
6b577c9d LK |
2415 | obj = buf.pointer; |
2416 | if (obj->type == ACPI_TYPE_BUFFER) { | |
2417 | acpi_desc->nfit = | |
2418 | (struct acpi_nfit_header *)obj->buffer.pointer; | |
2419 | ret = acpi_nfit_init(acpi_desc, obj->buffer.length); | |
2420 | if (ret) { | |
2421 | /* Merge failed, restore old nfit, and exit */ | |
2422 | acpi_desc->nfit = nfit_saved; | |
2423 | dev_err(dev, "failed to merge updated NFIT\n"); | |
2424 | } | |
2425 | } else { | |
2426 | /* Bad _FIT, restore old nfit */ | |
2427 | dev_err(dev, "Invalid _FIT\n"); | |
20985164 VV |
2428 | } |
2429 | kfree(buf.pointer); | |
2430 | ||
2431 | out_unlock: | |
2432 | device_unlock(dev); | |
2433 | } | |
2434 | ||
b94d5230 DW |
2435 | static const struct acpi_device_id acpi_nfit_ids[] = { |
2436 | { "ACPI0012", 0 }, | |
2437 | { "", 0 }, | |
2438 | }; | |
2439 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); | |
2440 | ||
2441 | static struct acpi_driver acpi_nfit_driver = { | |
2442 | .name = KBUILD_MODNAME, | |
2443 | .ids = acpi_nfit_ids, | |
2444 | .ops = { | |
2445 | .add = acpi_nfit_add, | |
2446 | .remove = acpi_nfit_remove, | |
20985164 | 2447 | .notify = acpi_nfit_notify, |
b94d5230 DW |
2448 | }, |
2449 | }; | |
2450 | ||
2451 | static __init int nfit_init(void) | |
2452 | { | |
2453 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); | |
2454 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); | |
2455 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); | |
2456 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); | |
2457 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); | |
2458 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); | |
2459 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); | |
2460 | ||
2461 | acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]); | |
2462 | acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]); | |
2463 | acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]); | |
2464 | acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]); | |
2465 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]); | |
2466 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]); | |
2467 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]); | |
2468 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]); | |
2469 | acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]); | |
2470 | acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]); | |
2471 | ||
7ae0fa43 DW |
2472 | nfit_wq = create_singlethread_workqueue("nfit"); |
2473 | if (!nfit_wq) | |
2474 | return -ENOMEM; | |
2475 | ||
b94d5230 DW |
2476 | return acpi_bus_register_driver(&acpi_nfit_driver); |
2477 | } | |
2478 | ||
2479 | static __exit void nfit_exit(void) | |
2480 | { | |
2481 | acpi_bus_unregister_driver(&acpi_nfit_driver); | |
7ae0fa43 | 2482 | destroy_workqueue(nfit_wq); |
b94d5230 DW |
2483 | } |
2484 | ||
2485 | module_init(nfit_init); | |
2486 | module_exit(nfit_exit); | |
2487 | MODULE_LICENSE("GPL v2"); | |
2488 | MODULE_AUTHOR("Intel Corporation"); |