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Merge tag 'md/4.3-fixes' of git://neil.brown.name/md
[deliverable/linux.git] / drivers / acpi / nfit.c
CommitLineData
b94d5230
DW		 1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#include <linux/list_sort.h>
14#include <linux/libnvdimm.h>
15#include <linux/module.h>
047fc8a1 16#include <linux/mutex.h>
62232e45 17#include <linux/ndctl.h>
b94d5230
DW		 18#include <linux/list.h>
19#include <linux/acpi.h>
eaf96153 20#include <linux/sort.h>
c2ad2954 21#include <linux/pmem.h>
047fc8a1 22#include <linux/io.h>
96601adb 23#include <asm/cacheflush.h>
b94d5230
DW		 24#include "nfit.h"
25
047fc8a1
RZ		 26/*
27 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
28 * irrelevant.
29 */
30#include <asm-generic/io-64-nonatomic-hi-lo.h>
31
4d88a97a
DW		 32static bool force_enable_dimms;
33module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
34MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
35
b94d5230
DW		 36static u8 nfit_uuid[NFIT_UUID_MAX][16];
37
6bc75619 38const u8 *to_nfit_uuid(enum nfit_uuids id)
b94d5230
DW		 39{
40 return nfit_uuid[id];
41}
6bc75619 42EXPORT_SYMBOL(to_nfit_uuid);
b94d5230 43
62232e45
DW		 44static struct acpi_nfit_desc *to_acpi_nfit_desc(
45 struct nvdimm_bus_descriptor *nd_desc)
46{
47 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
48}
49
50static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
51{
52 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
53
54 /*
55 * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
56 * acpi_device.
57 */
58 if (!nd_desc->provider_name
59 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
60 return NULL;
61
62 return to_acpi_device(acpi_desc->dev);
63}
64
b94d5230
DW		 65static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
66 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
67 unsigned int buf_len)
68{
62232e45
DW		 69 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
70 const struct nd_cmd_desc *desc = NULL;
71 union acpi_object in_obj, in_buf, *out_obj;
72 struct device *dev = acpi_desc->dev;
73 const char *cmd_name, *dimm_name;
74 unsigned long dsm_mask;
75 acpi_handle handle;
76 const u8 *uuid;
77 u32 offset;
78 int rc, i;
79
80 if (nvdimm) {
81 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
82 struct acpi_device *adev = nfit_mem->adev;
83
84 if (!adev)
85 return -ENOTTY;
047fc8a1 86 dimm_name = nvdimm_name(nvdimm);
62232e45
DW		 87 cmd_name = nvdimm_cmd_name(cmd);
88 dsm_mask = nfit_mem->dsm_mask;
89 desc = nd_cmd_dimm_desc(cmd);
90 uuid = to_nfit_uuid(NFIT_DEV_DIMM);
91 handle = adev->handle;
92 } else {
93 struct acpi_device *adev = to_acpi_dev(acpi_desc);
94
95 cmd_name = nvdimm_bus_cmd_name(cmd);
96 dsm_mask = nd_desc->dsm_mask;
97 desc = nd_cmd_bus_desc(cmd);
98 uuid = to_nfit_uuid(NFIT_DEV_BUS);
99 handle = adev->handle;
100 dimm_name = "bus";
101 }
102
103 if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
104 return -ENOTTY;
105
106 if (!test_bit(cmd, &dsm_mask))
107 return -ENOTTY;
108
109 in_obj.type = ACPI_TYPE_PACKAGE;
110 in_obj.package.count = 1;
111 in_obj.package.elements = &in_buf;
112 in_buf.type = ACPI_TYPE_BUFFER;
113 in_buf.buffer.pointer = buf;
114 in_buf.buffer.length = 0;
115
116 /* libnvdimm has already validated the input envelope */
117 for (i = 0; i < desc->in_num; i++)
118 in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
119 i, buf);
120
121 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
122 dev_dbg(dev, "%s:%s cmd: %s input length: %d\n", __func__,
123 dimm_name, cmd_name, in_buf.buffer.length);
124 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
125 4, in_buf.buffer.pointer, min_t(u32, 128,
126 in_buf.buffer.length), true);
127 }
128
129 out_obj = acpi_evaluate_dsm(handle, uuid, 1, cmd, &in_obj);
130 if (!out_obj) {
131 dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
132 cmd_name);
133 return -EINVAL;
134 }
135
136 if (out_obj->package.type != ACPI_TYPE_BUFFER) {
137 dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
138 __func__, dimm_name, cmd_name, out_obj->type);
139 rc = -EINVAL;
140 goto out;
141 }
142
143 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
144 dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
145 dimm_name, cmd_name, out_obj->buffer.length);
146 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
147 4, out_obj->buffer.pointer, min_t(u32, 128,
148 out_obj->buffer.length), true);
149 }
150
151 for (i = 0, offset = 0; i < desc->out_num; i++) {
152 u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
153 (u32 *) out_obj->buffer.pointer);
154
155 if (offset + out_size > out_obj->buffer.length) {
156 dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
157 __func__, dimm_name, cmd_name, i);
158 break;
159 }
160
161 if (in_buf.buffer.length + offset + out_size > buf_len) {
162 dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
163 __func__, dimm_name, cmd_name, i);
164 rc = -ENXIO;
165 goto out;
166 }
167 memcpy(buf + in_buf.buffer.length + offset,
168 out_obj->buffer.pointer + offset, out_size);
169 offset += out_size;
170 }
171 if (offset + in_buf.buffer.length < buf_len) {
172 if (i >= 1) {
173 /*
174 * status valid, return the number of bytes left
175 * unfilled in the output buffer
176 */
177 rc = buf_len - offset - in_buf.buffer.length;
178 } else {
179 dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
180 __func__, dimm_name, cmd_name, buf_len,
181 offset);
182 rc = -ENXIO;
183 }
184 } else
185 rc = 0;
186
187 out:
188 ACPI_FREE(out_obj);
189
190 return rc;
b94d5230
DW		 191}
192
193static const char *spa_type_name(u16 type)
194{
195 static const char *to_name[] = {
196 [NFIT_SPA_VOLATILE] = "volatile",
197 [NFIT_SPA_PM] = "pmem",
198 [NFIT_SPA_DCR] = "dimm-control-region",
199 [NFIT_SPA_BDW] = "block-data-window",
200 [NFIT_SPA_VDISK] = "volatile-disk",
201 [NFIT_SPA_VCD] = "volatile-cd",
202 [NFIT_SPA_PDISK] = "persistent-disk",
203 [NFIT_SPA_PCD] = "persistent-cd",
204
205 };
206
207 if (type > NFIT_SPA_PCD)
208 return "unknown";
209
210 return to_name[type];
211}
212
213static int nfit_spa_type(struct acpi_nfit_system_address *spa)
214{
215 int i;
216
217 for (i = 0; i < NFIT_UUID_MAX; i++)
218 if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
219 return i;
220 return -1;
221}
222
223static bool add_spa(struct acpi_nfit_desc *acpi_desc,
224 struct acpi_nfit_system_address *spa)
225{
226 struct device *dev = acpi_desc->dev;
227 struct nfit_spa *nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa),
228 GFP_KERNEL);
229
230 if (!nfit_spa)
231 return false;
232 INIT_LIST_HEAD(&nfit_spa->list);
233 nfit_spa->spa = spa;
234 list_add_tail(&nfit_spa->list, &acpi_desc->spas);
235 dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
236 spa->range_index,
237 spa_type_name(nfit_spa_type(spa)));
238 return true;
239}
240
241static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
242 struct acpi_nfit_memory_map *memdev)
243{
244 struct device *dev = acpi_desc->dev;
245 struct nfit_memdev *nfit_memdev = devm_kzalloc(dev,
246 sizeof(*nfit_memdev), GFP_KERNEL);
247
248 if (!nfit_memdev)
249 return false;
250 INIT_LIST_HEAD(&nfit_memdev->list);
251 nfit_memdev->memdev = memdev;
252 list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
253 dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
254 __func__, memdev->device_handle, memdev->range_index,
255 memdev->region_index);
256 return true;
257}
258
259static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
260 struct acpi_nfit_control_region *dcr)
261{
262 struct device *dev = acpi_desc->dev;
263 struct nfit_dcr *nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr),
264 GFP_KERNEL);
265
266 if (!nfit_dcr)
267 return false;
268 INIT_LIST_HEAD(&nfit_dcr->list);
269 nfit_dcr->dcr = dcr;
270 list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
271 dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
272 dcr->region_index, dcr->windows);
273 return true;
274}
275
276static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
277 struct acpi_nfit_data_region *bdw)
278{
279 struct device *dev = acpi_desc->dev;
280 struct nfit_bdw *nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw),
281 GFP_KERNEL);
282
283 if (!nfit_bdw)
284 return false;
285 INIT_LIST_HEAD(&nfit_bdw->list);
286 nfit_bdw->bdw = bdw;
287 list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
288 dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
289 bdw->region_index, bdw->windows);
290 return true;
291}
292
047fc8a1
RZ		 293static bool add_idt(struct acpi_nfit_desc *acpi_desc,
294 struct acpi_nfit_interleave *idt)
295{
296 struct device *dev = acpi_desc->dev;
297 struct nfit_idt *nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt),
298 GFP_KERNEL);
299
300 if (!nfit_idt)
301 return false;
302 INIT_LIST_HEAD(&nfit_idt->list);
303 nfit_idt->idt = idt;
304 list_add_tail(&nfit_idt->list, &acpi_desc->idts);
305 dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
306 idt->interleave_index, idt->line_count);
307 return true;
308}
309
c2ad2954
RZ		 310static bool add_flush(struct acpi_nfit_desc *acpi_desc,
311 struct acpi_nfit_flush_address *flush)
312{
313 struct device *dev = acpi_desc->dev;
314 struct nfit_flush *nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush),
315 GFP_KERNEL);
316
317 if (!nfit_flush)
318 return false;
319 INIT_LIST_HEAD(&nfit_flush->list);
320 nfit_flush->flush = flush;
321 list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
322 dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__,
323 flush->device_handle, flush->hint_count);
324 return true;
325}
326
b94d5230
DW		 327static void *add_table(struct acpi_nfit_desc *acpi_desc, void *table,
328 const void *end)
329{
330 struct device *dev = acpi_desc->dev;
331 struct acpi_nfit_header *hdr;
332 void *err = ERR_PTR(-ENOMEM);
333
334 if (table >= end)
335 return NULL;
336
337 hdr = table;
338 switch (hdr->type) {
339 case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
340 if (!add_spa(acpi_desc, table))
341 return err;
342 break;
343 case ACPI_NFIT_TYPE_MEMORY_MAP:
344 if (!add_memdev(acpi_desc, table))
345 return err;
346 break;
347 case ACPI_NFIT_TYPE_CONTROL_REGION:
348 if (!add_dcr(acpi_desc, table))
349 return err;
350 break;
351 case ACPI_NFIT_TYPE_DATA_REGION:
352 if (!add_bdw(acpi_desc, table))
353 return err;
354 break;
b94d5230 355 case ACPI_NFIT_TYPE_INTERLEAVE:
047fc8a1
RZ		 356 if (!add_idt(acpi_desc, table))
357 return err;
b94d5230
DW		 358 break;
359 case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
c2ad2954
RZ		 360 if (!add_flush(acpi_desc, table))
361 return err;
b94d5230
DW		 362 break;
363 case ACPI_NFIT_TYPE_SMBIOS:
364 dev_dbg(dev, "%s: smbios\n", __func__);
365 break;
366 default:
367 dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
368 break;
369 }
370
371 return table + hdr->length;
372}
373
374static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
375 struct nfit_mem *nfit_mem)
376{
377 u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
378 u16 dcr = nfit_mem->dcr->region_index;
379 struct nfit_spa *nfit_spa;
380
381 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
382 u16 range_index = nfit_spa->spa->range_index;
383 int type = nfit_spa_type(nfit_spa->spa);
384 struct nfit_memdev *nfit_memdev;
385
386 if (type != NFIT_SPA_BDW)
387 continue;
388
389 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
390 if (nfit_memdev->memdev->range_index != range_index)
391 continue;
392 if (nfit_memdev->memdev->device_handle != device_handle)
393 continue;
394 if (nfit_memdev->memdev->region_index != dcr)
395 continue;
396
397 nfit_mem->spa_bdw = nfit_spa->spa;
398 return;
399 }
400 }
401
402 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
403 nfit_mem->spa_dcr->range_index);
404 nfit_mem->bdw = NULL;
405}
406
407static int nfit_mem_add(struct acpi_nfit_desc *acpi_desc,
408 struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
409{
410 u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
047fc8a1 411 struct nfit_memdev *nfit_memdev;
c2ad2954 412 struct nfit_flush *nfit_flush;
b94d5230
DW		 413 struct nfit_dcr *nfit_dcr;
414 struct nfit_bdw *nfit_bdw;
047fc8a1
RZ		 415 struct nfit_idt *nfit_idt;
416 u16 idt_idx, range_index;
b94d5230
DW		 417
418 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
419 if (nfit_dcr->dcr->region_index != dcr)
420 continue;
421 nfit_mem->dcr = nfit_dcr->dcr;
422 break;
423 }
424
425 if (!nfit_mem->dcr) {
426 dev_dbg(acpi_desc->dev, "SPA %d missing:%s%s\n",
427 spa->range_index, __to_nfit_memdev(nfit_mem)
428 ? "" : " MEMDEV", nfit_mem->dcr ? "" : " DCR");
429 return -ENODEV;
430 }
431
432 /*
433 * We've found enough to create an nvdimm, optionally
434 * find an associated BDW
435 */
436 list_add(&nfit_mem->list, &acpi_desc->dimms);
437
438 list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
439 if (nfit_bdw->bdw->region_index != dcr)
440 continue;
441 nfit_mem->bdw = nfit_bdw->bdw;
442 break;
443 }
444
445 if (!nfit_mem->bdw)
446 return 0;
447
448 nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
047fc8a1
RZ		 449
450 if (!nfit_mem->spa_bdw)
451 return 0;
452
453 range_index = nfit_mem->spa_bdw->range_index;
454 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
455 if (nfit_memdev->memdev->range_index != range_index ||
456 nfit_memdev->memdev->region_index != dcr)
457 continue;
458 nfit_mem->memdev_bdw = nfit_memdev->memdev;
459 idt_idx = nfit_memdev->memdev->interleave_index;
460 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
461 if (nfit_idt->idt->interleave_index != idt_idx)
462 continue;
463 nfit_mem->idt_bdw = nfit_idt->idt;
464 break;
465 }
c2ad2954
RZ		 466
467 list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
468 if (nfit_flush->flush->device_handle !=
469 nfit_memdev->memdev->device_handle)
470 continue;
471 nfit_mem->nfit_flush = nfit_flush;
472 break;
473 }
047fc8a1
RZ		 474 break;
475 }
476
b94d5230
DW		 477 return 0;
478}
479
480static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
481 struct acpi_nfit_system_address *spa)
482{
483 struct nfit_mem *nfit_mem, *found;
484 struct nfit_memdev *nfit_memdev;
485 int type = nfit_spa_type(spa);
486 u16 dcr;
487
488 switch (type) {
489 case NFIT_SPA_DCR:
490 case NFIT_SPA_PM:
491 break;
492 default:
493 return 0;
494 }
495
496 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
497 int rc;
498
499 if (nfit_memdev->memdev->range_index != spa->range_index)
500 continue;
501 found = NULL;
502 dcr = nfit_memdev->memdev->region_index;
503 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
504 if (__to_nfit_memdev(nfit_mem)->region_index == dcr) {
505 found = nfit_mem;
506 break;
507 }
508
509 if (found)
510 nfit_mem = found;
511 else {
512 nfit_mem = devm_kzalloc(acpi_desc->dev,
513 sizeof(*nfit_mem), GFP_KERNEL);
514 if (!nfit_mem)
515 return -ENOMEM;
516 INIT_LIST_HEAD(&nfit_mem->list);
517 }
518
519 if (type == NFIT_SPA_DCR) {
047fc8a1
RZ		 520 struct nfit_idt *nfit_idt;
521 u16 idt_idx;
522
b94d5230
DW		 523 /* multiple dimms may share a SPA when interleaved */
524 nfit_mem->spa_dcr = spa;
525 nfit_mem->memdev_dcr = nfit_memdev->memdev;
047fc8a1
RZ		 526 idt_idx = nfit_memdev->memdev->interleave_index;
527 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
528 if (nfit_idt->idt->interleave_index != idt_idx)
529 continue;
530 nfit_mem->idt_dcr = nfit_idt->idt;
531 break;
532 }
b94d5230
DW		 533 } else {
534 /*
535 * A single dimm may belong to multiple SPA-PM
536 * ranges, record at least one in addition to
537 * any SPA-DCR range.
538 */
539 nfit_mem->memdev_pmem = nfit_memdev->memdev;
540 }
541
542 if (found)
543 continue;
544
545 rc = nfit_mem_add(acpi_desc, nfit_mem, spa);
546 if (rc)
547 return rc;
548 }
549
550 return 0;
551}
552
553static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
554{
555 struct nfit_mem *a = container_of(_a, typeof(*a), list);
556 struct nfit_mem *b = container_of(_b, typeof(*b), list);
557 u32 handleA, handleB;
558
559 handleA = __to_nfit_memdev(a)->device_handle;
560 handleB = __to_nfit_memdev(b)->device_handle;
561 if (handleA < handleB)
562 return -1;
563 else if (handleA > handleB)
564 return 1;
565 return 0;
566}
567
568static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
569{
570 struct nfit_spa *nfit_spa;
571
572 /*
573 * For each SPA-DCR or SPA-PMEM address range find its
574 * corresponding MEMDEV(s). From each MEMDEV find the
575 * corresponding DCR. Then, if we're operating on a SPA-DCR,
576 * try to find a SPA-BDW and a corresponding BDW that references
577 * the DCR. Throw it all into an nfit_mem object. Note, that
578 * BDWs are optional.
579 */
580 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
581 int rc;
582
583 rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
584 if (rc)
585 return rc;
586 }
587
588 list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
589
590 return 0;
591}
592
45def22c
DW		 593static ssize_t revision_show(struct device *dev,
594 struct device_attribute *attr, char *buf)
595{
596 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
597 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
598 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
599
600 return sprintf(buf, "%d\n", acpi_desc->nfit->header.revision);
601}
602static DEVICE_ATTR_RO(revision);
603
604static struct attribute *acpi_nfit_attributes[] = {
605 &dev_attr_revision.attr,
606 NULL,
607};
608
609static struct attribute_group acpi_nfit_attribute_group = {
610 .name = "nfit",
611 .attrs = acpi_nfit_attributes,
612};
613
6bc75619 614const struct attribute_group *acpi_nfit_attribute_groups[] = {
45def22c
DW		 615 &nvdimm_bus_attribute_group,
616 &acpi_nfit_attribute_group,
617 NULL,
618};
6bc75619 619EXPORT_SYMBOL_GPL(acpi_nfit_attribute_groups);
45def22c 620
e6dfb2de
DW		 621static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
622{
623 struct nvdimm *nvdimm = to_nvdimm(dev);
624 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
625
626 return __to_nfit_memdev(nfit_mem);
627}
628
629static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
630{
631 struct nvdimm *nvdimm = to_nvdimm(dev);
632 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
633
634 return nfit_mem->dcr;
635}
636
637static ssize_t handle_show(struct device *dev,
638 struct device_attribute *attr, char *buf)
639{
640 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
641
642 return sprintf(buf, "%#x\n", memdev->device_handle);
643}
644static DEVICE_ATTR_RO(handle);
645
646static ssize_t phys_id_show(struct device *dev,
647 struct device_attribute *attr, char *buf)
648{
649 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
650
651 return sprintf(buf, "%#x\n", memdev->physical_id);
652}
653static DEVICE_ATTR_RO(phys_id);
654
655static ssize_t vendor_show(struct device *dev,
656 struct device_attribute *attr, char *buf)
657{
658 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
659
660 return sprintf(buf, "%#x\n", dcr->vendor_id);
661}
662static DEVICE_ATTR_RO(vendor);
663
664static ssize_t rev_id_show(struct device *dev,
665 struct device_attribute *attr, char *buf)
666{
667 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
668
669 return sprintf(buf, "%#x\n", dcr->revision_id);
670}
671static DEVICE_ATTR_RO(rev_id);
672
673static ssize_t device_show(struct device *dev,
674 struct device_attribute *attr, char *buf)
675{
676 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
677
678 return sprintf(buf, "%#x\n", dcr->device_id);
679}
680static DEVICE_ATTR_RO(device);
681
682static ssize_t format_show(struct device *dev,
683 struct device_attribute *attr, char *buf)
684{
685 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
686
687 return sprintf(buf, "%#x\n", dcr->code);
688}
689static DEVICE_ATTR_RO(format);
690
691static ssize_t serial_show(struct device *dev,
692 struct device_attribute *attr, char *buf)
693{
694 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
695
696 return sprintf(buf, "%#x\n", dcr->serial_number);
697}
698static DEVICE_ATTR_RO(serial);
699
58138820
DW		 700static ssize_t flags_show(struct device *dev,
701 struct device_attribute *attr, char *buf)
702{
703 u16 flags = to_nfit_memdev(dev)->flags;
704
705 return sprintf(buf, "%s%s%s%s%s\n",
402bae59
TK		 706 flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
707 flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
708 flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
709 flags & ACPI_NFIT_MEM_ARMED ? "not_armed " : "",
710 flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "");
58138820
DW		 711}
712static DEVICE_ATTR_RO(flags);
713
e6dfb2de
DW		 714static struct attribute *acpi_nfit_dimm_attributes[] = {
715 &dev_attr_handle.attr,
716 &dev_attr_phys_id.attr,
717 &dev_attr_vendor.attr,
718 &dev_attr_device.attr,
719 &dev_attr_format.attr,
720 &dev_attr_serial.attr,
721 &dev_attr_rev_id.attr,
58138820 722 &dev_attr_flags.attr,
e6dfb2de
DW		 723 NULL,
724};
725
726static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
727 struct attribute *a, int n)
728{
729 struct device *dev = container_of(kobj, struct device, kobj);
730
731 if (to_nfit_dcr(dev))
732 return a->mode;
733 else
734 return 0;
735}
736
737static struct attribute_group acpi_nfit_dimm_attribute_group = {
738 .name = "nfit",
739 .attrs = acpi_nfit_dimm_attributes,
740 .is_visible = acpi_nfit_dimm_attr_visible,
741};
742
743static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
62232e45 744 &nvdimm_attribute_group,
4d88a97a 745 &nd_device_attribute_group,
e6dfb2de
DW		 746 &acpi_nfit_dimm_attribute_group,
747 NULL,
748};
749
750static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
751 u32 device_handle)
752{
753 struct nfit_mem *nfit_mem;
754
755 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
756 if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
757 return nfit_mem->nvdimm;
758
759 return NULL;
760}
761
62232e45
DW		 762static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
763 struct nfit_mem *nfit_mem, u32 device_handle)
764{
765 struct acpi_device *adev, *adev_dimm;
766 struct device *dev = acpi_desc->dev;
767 const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM);
60e95f43 768 int i;
62232e45
DW		 769
770 nfit_mem->dsm_mask = acpi_desc->dimm_dsm_force_en;
771 adev = to_acpi_dev(acpi_desc);
772 if (!adev)
773 return 0;
774
775 adev_dimm = acpi_find_child_device(adev, device_handle, false);
776 nfit_mem->adev = adev_dimm;
777 if (!adev_dimm) {
778 dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
779 device_handle);
4d88a97a 780 return force_enable_dimms ? 0 : -ENODEV;
62232e45
DW		 781 }
782
62232e45
DW		 783 for (i = ND_CMD_SMART; i <= ND_CMD_VENDOR; i++)
784 if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
785 set_bit(i, &nfit_mem->dsm_mask);
786
60e95f43 787 return 0;
62232e45
DW		 788}
789
e6dfb2de
DW		 790static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
791{
792 struct nfit_mem *nfit_mem;
4d88a97a 793 int dimm_count = 0;
e6dfb2de
DW		 794
795 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
796 struct nvdimm *nvdimm;
797 unsigned long flags = 0;
798 u32 device_handle;
58138820 799 u16 mem_flags;
62232e45 800 int rc;
e6dfb2de
DW		 801
802 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
803 nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
804 if (nvdimm) {
805 /*
806 * If for some reason we find multiple DCRs the
807 * first one wins
808 */
809 dev_err(acpi_desc->dev, "duplicate DCR detected: %s\n",
810 nvdimm_name(nvdimm));
811 continue;
812 }
813
814 if (nfit_mem->bdw && nfit_mem->memdev_pmem)
815 flags |= NDD_ALIASING;
816
58138820
DW		 817 mem_flags = __to_nfit_memdev(nfit_mem)->flags;
818 if (mem_flags & ACPI_NFIT_MEM_ARMED)
819 flags |= NDD_UNARMED;
820
62232e45
DW		 821 rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
822 if (rc)
823 continue;
824
e6dfb2de 825 nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
62232e45
DW		 826 acpi_nfit_dimm_attribute_groups,
827 flags, &nfit_mem->dsm_mask);
e6dfb2de
DW		 828 if (!nvdimm)
829 return -ENOMEM;
830
831 nfit_mem->nvdimm = nvdimm;
4d88a97a 832 dimm_count++;
58138820
DW		 833
834 if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
835 continue;
836
402bae59 837 dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n",
58138820 838 nvdimm_name(nvdimm),
402bae59
TK		 839 mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
840 mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
841 mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
842 mem_flags & ACPI_NFIT_MEM_ARMED ? " not_armed" : "");
58138820 843
e6dfb2de
DW		 844 }
845
4d88a97a 846 return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
e6dfb2de
DW		 847}
848
62232e45
DW		 849static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
850{
851 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
852 const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
853 struct acpi_device *adev;
854 int i;
855
39c686b8 856 nd_desc->dsm_mask = acpi_desc->bus_dsm_force_en;
62232e45
DW		 857 adev = to_acpi_dev(acpi_desc);
858 if (!adev)
859 return;
860
861 for (i = ND_CMD_ARS_CAP; i <= ND_CMD_ARS_STATUS; i++)
862 if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
863 set_bit(i, &nd_desc->dsm_mask);
864}
865
1f7df6f8
DW		 866static ssize_t range_index_show(struct device *dev,
867 struct device_attribute *attr, char *buf)
868{
869 struct nd_region *nd_region = to_nd_region(dev);
870 struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
871
872 return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
873}
874static DEVICE_ATTR_RO(range_index);
875
876static struct attribute *acpi_nfit_region_attributes[] = {
877 &dev_attr_range_index.attr,
878 NULL,
879};
880
881static struct attribute_group acpi_nfit_region_attribute_group = {
882 .name = "nfit",
883 .attrs = acpi_nfit_region_attributes,
884};
885
886static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
887 &nd_region_attribute_group,
888 &nd_mapping_attribute_group,
3d88002e 889 &nd_device_attribute_group,
74ae66c3 890 &nd_numa_attribute_group,
1f7df6f8
DW		 891 &acpi_nfit_region_attribute_group,
892 NULL,
893};
894
eaf96153
DW		 895/* enough info to uniquely specify an interleave set */
896struct nfit_set_info {
897 struct nfit_set_info_map {
898 u64 region_offset;
899 u32 serial_number;
900 u32 pad;
901 } mapping[0];
902};
903
904static size_t sizeof_nfit_set_info(int num_mappings)
905{
906 return sizeof(struct nfit_set_info)
907 + num_mappings * sizeof(struct nfit_set_info_map);
908}
909
910static int cmp_map(const void *m0, const void *m1)
911{
912 const struct nfit_set_info_map *map0 = m0;
913 const struct nfit_set_info_map *map1 = m1;
914
915 return memcmp(&map0->region_offset, &map1->region_offset,
916 sizeof(u64));
917}
918
919/* Retrieve the nth entry referencing this spa */
920static struct acpi_nfit_memory_map *memdev_from_spa(
921 struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
922{
923 struct nfit_memdev *nfit_memdev;
924
925 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
926 if (nfit_memdev->memdev->range_index == range_index)
927 if (n-- == 0)
928 return nfit_memdev->memdev;
929 return NULL;
930}
931
932static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
933 struct nd_region_desc *ndr_desc,
934 struct acpi_nfit_system_address *spa)
935{
936 int i, spa_type = nfit_spa_type(spa);
937 struct device *dev = acpi_desc->dev;
938 struct nd_interleave_set *nd_set;
939 u16 nr = ndr_desc->num_mappings;
940 struct nfit_set_info *info;
941
942 if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
943 /* pass */;
944 else
945 return 0;
946
947 nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
948 if (!nd_set)
949 return -ENOMEM;
950
951 info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
952 if (!info)
953 return -ENOMEM;
954 for (i = 0; i < nr; i++) {
955 struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
956 struct nfit_set_info_map *map = &info->mapping[i];
957 struct nvdimm *nvdimm = nd_mapping->nvdimm;
958 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
959 struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
960 spa->range_index, i);
961
962 if (!memdev || !nfit_mem->dcr) {
963 dev_err(dev, "%s: failed to find DCR\n", __func__);
964 return -ENODEV;
965 }
966
967 map->region_offset = memdev->region_offset;
968 map->serial_number = nfit_mem->dcr->serial_number;
969 }
970
971 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
972 cmp_map, NULL);
973 nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
974 ndr_desc->nd_set = nd_set;
975 devm_kfree(dev, info);
976
977 return 0;
978}
979
047fc8a1
RZ		 980static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
981{
982 struct acpi_nfit_interleave *idt = mmio->idt;
983 u32 sub_line_offset, line_index, line_offset;
984 u64 line_no, table_skip_count, table_offset;
985
986 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
987 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
988 line_offset = idt->line_offset[line_index]
989 * mmio->line_size;
990 table_offset = table_skip_count * mmio->table_size;
991
992 return mmio->base_offset + line_offset + table_offset + sub_line_offset;
993}
994
c2ad2954
RZ		 995static void wmb_blk(struct nfit_blk *nfit_blk)
996{
997
998 if (nfit_blk->nvdimm_flush) {
999 /*
1000 * The first wmb() is needed to 'sfence' all previous writes
1001 * such that they are architecturally visible for the platform
1002 * buffer flush. Note that we've already arranged for pmem
1003 * writes to avoid the cache via arch_memcpy_to_pmem(). The
1004 * final wmb() ensures ordering for the NVDIMM flush write.
1005 */
1006 wmb();
1007 writeq(1, nfit_blk->nvdimm_flush);
1008 wmb();
1009 } else
1010 wmb_pmem();
1011}
1012
de4a196c 1013static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
047fc8a1
RZ		 1014{
1015 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1016 u64 offset = nfit_blk->stat_offset + mmio->size * bw;
1017
1018 if (mmio->num_lines)
1019 offset = to_interleave_offset(offset, mmio);
1020
12f03ee6 1021 return readl(mmio->addr.base + offset);
047fc8a1
RZ		 1022}
1023
1024static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
1025 resource_size_t dpa, unsigned int len, unsigned int write)
1026{
1027 u64 cmd, offset;
1028 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1029
1030 enum {
1031 BCW_OFFSET_MASK = (1ULL << 48)-1,
1032 BCW_LEN_SHIFT = 48,
1033 BCW_LEN_MASK = (1ULL << 8) - 1,
1034 BCW_CMD_SHIFT = 56,
1035 };
1036
1037 cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
1038 len = len >> L1_CACHE_SHIFT;
1039 cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
1040 cmd |= ((u64) write) << BCW_CMD_SHIFT;
1041
1042 offset = nfit_blk->cmd_offset + mmio->size * bw;
1043 if (mmio->num_lines)
1044 offset = to_interleave_offset(offset, mmio);
1045
67a3e8fe 1046 writeq(cmd, mmio->addr.base + offset);
c2ad2954 1047 wmb_blk(nfit_blk);
f0f2c072
RZ		 1048
1049 if (nfit_blk->dimm_flags & ND_BLK_DCR_LATCH)
67a3e8fe 1050 readq(mmio->addr.base + offset);
047fc8a1
RZ		 1051}
1052
1053static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
1054 resource_size_t dpa, void *iobuf, size_t len, int rw,
1055 unsigned int lane)
1056{
1057 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1058 unsigned int copied = 0;
1059 u64 base_offset;
1060 int rc;
1061
1062 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
1063 + lane * mmio->size;
047fc8a1
RZ		 1064 write_blk_ctl(nfit_blk, lane, dpa, len, rw);
1065 while (len) {
1066 unsigned int c;
1067 u64 offset;
1068
1069 if (mmio->num_lines) {
1070 u32 line_offset;
1071
1072 offset = to_interleave_offset(base_offset + copied,
1073 mmio);
1074 div_u64_rem(offset, mmio->line_size, &line_offset);
1075 c = min_t(size_t, len, mmio->line_size - line_offset);
1076 } else {
1077 offset = base_offset + nfit_blk->bdw_offset;
1078 c = len;
1079 }
1080
1081 if (rw)
67a3e8fe 1082 memcpy_to_pmem(mmio->addr.aperture + offset,
c2ad2954 1083 iobuf + copied, c);
67a3e8fe
RZ		 1084 else {
1085 if (nfit_blk->dimm_flags & ND_BLK_READ_FLUSH)
1086 mmio_flush_range((void __force *)
1087 mmio->addr.aperture + offset, c);
1088
c2ad2954 1089 memcpy_from_pmem(iobuf + copied,
67a3e8fe
RZ		 1090 mmio->addr.aperture + offset, c);
1091 }
047fc8a1
RZ		 1092
1093 copied += c;
1094 len -= c;
1095 }
c2ad2954
RZ		 1096
1097 if (rw)
1098 wmb_blk(nfit_blk);
1099
047fc8a1
RZ		 1100 rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
1101 return rc;
1102}
1103
1104static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
1105 resource_size_t dpa, void *iobuf, u64 len, int rw)
1106{
1107 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1108 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1109 struct nd_region *nd_region = nfit_blk->nd_region;
1110 unsigned int lane, copied = 0;
1111 int rc = 0;
1112
1113 lane = nd_region_acquire_lane(nd_region);
1114 while (len) {
1115 u64 c = min(len, mmio->size);
1116
1117 rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
1118 iobuf + copied, c, rw, lane);
1119 if (rc)
1120 break;
1121
1122 copied += c;
1123 len -= c;
1124 }
1125 nd_region_release_lane(nd_region, lane);
1126
1127 return rc;
1128}
1129
1130static void nfit_spa_mapping_release(struct kref *kref)
1131{
1132 struct nfit_spa_mapping *spa_map = to_spa_map(kref);
1133 struct acpi_nfit_system_address *spa = spa_map->spa;
1134 struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc;
1135
1136 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1137 dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index);
67a3e8fe
RZ		 1138 if (spa_map->type == SPA_MAP_APERTURE)
1139 memunmap((void __force *)spa_map->addr.aperture);
1140 else
1141 iounmap(spa_map->addr.base);
047fc8a1
RZ		 1142 release_mem_region(spa->address, spa->length);
1143 list_del(&spa_map->list);
1144 kfree(spa_map);
1145}
1146
1147static struct nfit_spa_mapping *find_spa_mapping(
1148 struct acpi_nfit_desc *acpi_desc,
1149 struct acpi_nfit_system_address *spa)
1150{
1151 struct nfit_spa_mapping *spa_map;
1152
1153 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1154 list_for_each_entry(spa_map, &acpi_desc->spa_maps, list)
1155 if (spa_map->spa == spa)
1156 return spa_map;
1157
1158 return NULL;
1159}
1160
1161static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc,
1162 struct acpi_nfit_system_address *spa)
1163{
1164 struct nfit_spa_mapping *spa_map;
1165
1166 mutex_lock(&acpi_desc->spa_map_mutex);
1167 spa_map = find_spa_mapping(acpi_desc, spa);
1168
1169 if (spa_map)
1170 kref_put(&spa_map->kref, nfit_spa_mapping_release);
1171 mutex_unlock(&acpi_desc->spa_map_mutex);
1172}
1173
1174static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1175 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1176{
1177 resource_size_t start = spa->address;
1178 resource_size_t n = spa->length;
1179 struct nfit_spa_mapping *spa_map;
1180 struct resource *res;
1181
1182 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1183
1184 spa_map = find_spa_mapping(acpi_desc, spa);
1185 if (spa_map) {
1186 kref_get(&spa_map->kref);
67a3e8fe 1187 return spa_map->addr.base;
047fc8a1
RZ		 1188 }
1189
1190 spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL);
1191 if (!spa_map)
1192 return NULL;
1193
1194 INIT_LIST_HEAD(&spa_map->list);
1195 spa_map->spa = spa;
1196 kref_init(&spa_map->kref);
1197 spa_map->acpi_desc = acpi_desc;
1198
1199 res = request_mem_region(start, n, dev_name(acpi_desc->dev));
1200 if (!res)
1201 goto err_mem;
1202
67a3e8fe
RZ		 1203 spa_map->type = type;
1204 if (type == SPA_MAP_APERTURE)
1205 spa_map->addr.aperture = (void __pmem *)memremap(start, n,
1206 ARCH_MEMREMAP_PMEM);
1207 else
1208 spa_map->addr.base = ioremap_nocache(start, n);
1209
c2ad2954 1210
67a3e8fe 1211 if (!spa_map->addr.base)
047fc8a1
RZ		 1212 goto err_map;
1213
1214 list_add_tail(&spa_map->list, &acpi_desc->spa_maps);
67a3e8fe 1215 return spa_map->addr.base;
047fc8a1
RZ		 1216
1217 err_map:
1218 release_mem_region(start, n);
1219 err_mem:
1220 kfree(spa_map);
1221 return NULL;
1222}
1223
1224/**
1225 * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges
1226 * @nvdimm_bus: NFIT-bus that provided the spa table entry
1227 * @nfit_spa: spa table to map
c2ad2954 1228 * @type: aperture or control region
047fc8a1
RZ		 1229 *
1230 * In the case where block-data-window apertures and
1231 * dimm-control-regions are interleaved they will end up sharing a
1232 * single request_mem_region() + ioremap() for the address range. In
1233 * the style of devm nfit_spa_map() mappings are automatically dropped
1234 * when all region devices referencing the same mapping are disabled /
1235 * unbound.
1236 */
1237static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1238 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1239{
1240 void __iomem *iomem;
1241
1242 mutex_lock(&acpi_desc->spa_map_mutex);
c2ad2954 1243 iomem = __nfit_spa_map(acpi_desc, spa, type);
047fc8a1
RZ		 1244 mutex_unlock(&acpi_desc->spa_map_mutex);
1245
1246 return iomem;
1247}
1248
1249static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
1250 struct acpi_nfit_interleave *idt, u16 interleave_ways)
1251{
1252 if (idt) {
1253 mmio->num_lines = idt->line_count;
1254 mmio->line_size = idt->line_size;
1255 if (interleave_ways == 0)
1256 return -ENXIO;
1257 mmio->table_size = mmio->num_lines * interleave_ways
1258 * mmio->line_size;
1259 }
1260
1261 return 0;
1262}
1263
f0f2c072
RZ		 1264static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
1265 struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
1266{
1267 struct nd_cmd_dimm_flags flags;
1268 int rc;
1269
1270 memset(&flags, 0, sizeof(flags));
1271 rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
1272 sizeof(flags));
1273
1274 if (rc >= 0 && flags.status == 0)
1275 nfit_blk->dimm_flags = flags.flags;
1276 else if (rc == -ENOTTY) {
1277 /* fall back to a conservative default */
67a3e8fe 1278 nfit_blk->dimm_flags = ND_BLK_DCR_LATCH | ND_BLK_READ_FLUSH;
f0f2c072
RZ		 1279 rc = 0;
1280 } else
1281 rc = -ENXIO;
1282
1283 return rc;
1284}
1285
047fc8a1
RZ		 1286static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
1287 struct device *dev)
1288{
1289 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1290 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1291 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
c2ad2954 1292 struct nfit_flush *nfit_flush;
047fc8a1
RZ		 1293 struct nfit_blk_mmio *mmio;
1294 struct nfit_blk *nfit_blk;
1295 struct nfit_mem *nfit_mem;
1296 struct nvdimm *nvdimm;
1297 int rc;
1298
1299 nvdimm = nd_blk_region_to_dimm(ndbr);
1300 nfit_mem = nvdimm_provider_data(nvdimm);
1301 if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
1302 dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
1303 nfit_mem ? "" : " nfit_mem",
193ccca4
DW		 1304 (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
1305 (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
047fc8a1
RZ		 1306 return -ENXIO;
1307 }
1308
1309 nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
1310 if (!nfit_blk)
1311 return -ENOMEM;
1312 nd_blk_region_set_provider_data(ndbr, nfit_blk);
1313 nfit_blk->nd_region = to_nd_region(dev);
1314
1315 /* map block aperture memory */
1316 nfit_blk->bdw_offset = nfit_mem->bdw->offset;
1317 mmio = &nfit_blk->mmio[BDW];
67a3e8fe 1318 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw,
c2ad2954 1319 SPA_MAP_APERTURE);
67a3e8fe 1320 if (!mmio->addr.base) {
047fc8a1
RZ		 1321 dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
1322 nvdimm_name(nvdimm));
1323 return -ENOMEM;
1324 }
1325 mmio->size = nfit_mem->bdw->size;
1326 mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
1327 mmio->idt = nfit_mem->idt_bdw;
1328 mmio->spa = nfit_mem->spa_bdw;
1329 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
1330 nfit_mem->memdev_bdw->interleave_ways);
1331 if (rc) {
1332 dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
1333 __func__, nvdimm_name(nvdimm));
1334 return rc;
1335 }
1336
1337 /* map block control memory */
1338 nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
1339 nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
1340 mmio = &nfit_blk->mmio[DCR];
67a3e8fe 1341 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr,
c2ad2954 1342 SPA_MAP_CONTROL);
67a3e8fe 1343 if (!mmio->addr.base) {
047fc8a1
RZ		 1344 dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
1345 nvdimm_name(nvdimm));
1346 return -ENOMEM;
1347 }
1348 mmio->size = nfit_mem->dcr->window_size;
1349 mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
1350 mmio->idt = nfit_mem->idt_dcr;
1351 mmio->spa = nfit_mem->spa_dcr;
1352 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
1353 nfit_mem->memdev_dcr->interleave_ways);
1354 if (rc) {
1355 dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
1356 __func__, nvdimm_name(nvdimm));
1357 return rc;
1358 }
1359
f0f2c072
RZ		 1360 rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
1361 if (rc < 0) {
1362 dev_dbg(dev, "%s: %s failed get DIMM flags\n",
1363 __func__, nvdimm_name(nvdimm));
1364 return rc;
1365 }
1366
c2ad2954
RZ		 1367 nfit_flush = nfit_mem->nfit_flush;
1368 if (nfit_flush && nfit_flush->flush->hint_count != 0) {
1369 nfit_blk->nvdimm_flush = devm_ioremap_nocache(dev,
1370 nfit_flush->flush->hint_address[0], 8);
1371 if (!nfit_blk->nvdimm_flush)
1372 return -ENOMEM;
1373 }
1374
96601adb 1375 if (!arch_has_wmb_pmem() && !nfit_blk->nvdimm_flush)
c2ad2954
RZ		 1376 dev_warn(dev, "unable to guarantee persistence of writes\n");
1377
047fc8a1
RZ		 1378 if (mmio->line_size == 0)
1379 return 0;
1380
1381 if ((u32) nfit_blk->cmd_offset % mmio->line_size
1382 + 8 > mmio->line_size) {
1383 dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
1384 return -ENXIO;
1385 } else if ((u32) nfit_blk->stat_offset % mmio->line_size
1386 + 8 > mmio->line_size) {
1387 dev_dbg(dev, "stat_offset crosses interleave boundary\n");
1388 return -ENXIO;
1389 }
1390
1391 return 0;
1392}
1393
1394static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus,
1395 struct device *dev)
1396{
1397 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1398 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1399 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
1400 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1401 int i;
1402
1403 if (!nfit_blk)
1404 return; /* never enabled */
1405
1406 /* auto-free BLK spa mappings */
1407 for (i = 0; i < 2; i++) {
1408 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i];
1409
67a3e8fe 1410 if (mmio->addr.base)
047fc8a1
RZ		 1411 nfit_spa_unmap(acpi_desc, mmio->spa);
1412 }
1413 nd_blk_region_set_provider_data(ndbr, NULL);
1414 /* devm will free nfit_blk */
1415}
1416
1f7df6f8
DW		 1417static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
1418 struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
1419 struct acpi_nfit_memory_map *memdev,
1420 struct acpi_nfit_system_address *spa)
1421{
1422 struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
1423 memdev->device_handle);
047fc8a1 1424 struct nd_blk_region_desc *ndbr_desc;
1f7df6f8
DW		 1425 struct nfit_mem *nfit_mem;
1426 int blk_valid = 0;
1427
1428 if (!nvdimm) {
1429 dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
1430 spa->range_index, memdev->device_handle);
1431 return -ENODEV;
1432 }
1433
1434 nd_mapping->nvdimm = nvdimm;
1435 switch (nfit_spa_type(spa)) {
1436 case NFIT_SPA_PM:
1437 case NFIT_SPA_VOLATILE:
1438 nd_mapping->start = memdev->address;
1439 nd_mapping->size = memdev->region_size;
1440 break;
1441 case NFIT_SPA_DCR:
1442 nfit_mem = nvdimm_provider_data(nvdimm);
1443 if (!nfit_mem || !nfit_mem->bdw) {
1444 dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
1445 spa->range_index, nvdimm_name(nvdimm));
1446 } else {
1447 nd_mapping->size = nfit_mem->bdw->capacity;
1448 nd_mapping->start = nfit_mem->bdw->start_address;
5212e11f 1449 ndr_desc->num_lanes = nfit_mem->bdw->windows;
1f7df6f8
DW		 1450 blk_valid = 1;
1451 }
1452
1453 ndr_desc->nd_mapping = nd_mapping;
1454 ndr_desc->num_mappings = blk_valid;
047fc8a1
RZ		 1455 ndbr_desc = to_blk_region_desc(ndr_desc);
1456 ndbr_desc->enable = acpi_nfit_blk_region_enable;
1457 ndbr_desc->disable = acpi_nfit_blk_region_disable;
6bc75619 1458 ndbr_desc->do_io = acpi_desc->blk_do_io;
1f7df6f8
DW		 1459 if (!nvdimm_blk_region_create(acpi_desc->nvdimm_bus, ndr_desc))
1460 return -ENOMEM;
1461 break;
1462 }
1463
1464 return 0;
1465}
1466
1467static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
1468 struct nfit_spa *nfit_spa)
1469{
1470 static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
1471 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1
RZ		 1472 struct nd_blk_region_desc ndbr_desc;
1473 struct nd_region_desc *ndr_desc;
1f7df6f8 1474 struct nfit_memdev *nfit_memdev;
1f7df6f8
DW		 1475 struct nvdimm_bus *nvdimm_bus;
1476 struct resource res;
eaf96153 1477 int count = 0, rc;
1f7df6f8
DW		 1478
1479 if (spa->range_index == 0) {
1480 dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
1481 __func__);
1482 return 0;
1483 }
1484
1485 memset(&res, 0, sizeof(res));
1486 memset(&nd_mappings, 0, sizeof(nd_mappings));
047fc8a1 1487 memset(&ndbr_desc, 0, sizeof(ndbr_desc));
1f7df6f8
DW		 1488 res.start = spa->address;
1489 res.end = res.start + spa->length - 1;
047fc8a1
RZ		 1490 ndr_desc = &ndbr_desc.ndr_desc;
1491 ndr_desc->res = &res;
1492 ndr_desc->provider_data = nfit_spa;
1493 ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
41d7a6d6
TK		 1494 if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
1495 ndr_desc->numa_node = acpi_map_pxm_to_online_node(
1496 spa->proximity_domain);
1497 else
1498 ndr_desc->numa_node = NUMA_NO_NODE;
1499
1f7df6f8
DW		 1500 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
1501 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
1502 struct nd_mapping *nd_mapping;
1f7df6f8
DW		 1503
1504 if (memdev->range_index != spa->range_index)
1505 continue;
1506 if (count >= ND_MAX_MAPPINGS) {
1507 dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
1508 spa->range_index, ND_MAX_MAPPINGS);
1509 return -ENXIO;
1510 }
1511 nd_mapping = &nd_mappings[count++];
047fc8a1 1512 rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
1f7df6f8
DW		 1513 memdev, spa);
1514 if (rc)
1515 return rc;
1516 }
1517
047fc8a1
RZ		 1518 ndr_desc->nd_mapping = nd_mappings;
1519 ndr_desc->num_mappings = count;
1520 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
eaf96153
DW		 1521 if (rc)
1522 return rc;
1523
1f7df6f8
DW		 1524 nvdimm_bus = acpi_desc->nvdimm_bus;
1525 if (nfit_spa_type(spa) == NFIT_SPA_PM) {
047fc8a1 1526 if (!nvdimm_pmem_region_create(nvdimm_bus, ndr_desc))
1f7df6f8
DW		 1527 return -ENOMEM;
1528 } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
047fc8a1 1529 if (!nvdimm_volatile_region_create(nvdimm_bus, ndr_desc))
1f7df6f8
DW		 1530 return -ENOMEM;
1531 }
1532 return 0;
1533}
1534
1535static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
1536{
1537 struct nfit_spa *nfit_spa;
1538
1539 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
1540 int rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
1541
1542 if (rc)
1543 return rc;
1544 }
1545 return 0;
1546}
1547
6bc75619 1548int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz)
b94d5230
DW		 1549{
1550 struct device *dev = acpi_desc->dev;
1551 const void *end;
1552 u8 *data;
1f7df6f8 1553 int rc;
b94d5230 1554
047fc8a1 1555 INIT_LIST_HEAD(&acpi_desc->spa_maps);
b94d5230
DW		 1556 INIT_LIST_HEAD(&acpi_desc->spas);
1557 INIT_LIST_HEAD(&acpi_desc->dcrs);
1558 INIT_LIST_HEAD(&acpi_desc->bdws);
047fc8a1 1559 INIT_LIST_HEAD(&acpi_desc->idts);
c2ad2954 1560 INIT_LIST_HEAD(&acpi_desc->flushes);
b94d5230
DW		 1561 INIT_LIST_HEAD(&acpi_desc->memdevs);
1562 INIT_LIST_HEAD(&acpi_desc->dimms);
047fc8a1 1563 mutex_init(&acpi_desc->spa_map_mutex);
b94d5230
DW		 1564
1565 data = (u8 *) acpi_desc->nfit;
1566 end = data + sz;
1567 data += sizeof(struct acpi_table_nfit);
1568 while (!IS_ERR_OR_NULL(data))
1569 data = add_table(acpi_desc, data, end);
1570
1571 if (IS_ERR(data)) {
1572 dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
1573 PTR_ERR(data));
1574 return PTR_ERR(data);
1575 }
1576
1577 if (nfit_mem_init(acpi_desc) != 0)
1578 return -ENOMEM;
1579
62232e45
DW		 1580 acpi_nfit_init_dsms(acpi_desc);
1581
1f7df6f8
DW		 1582 rc = acpi_nfit_register_dimms(acpi_desc);
1583 if (rc)
1584 return rc;
1585
1586 return acpi_nfit_register_regions(acpi_desc);
b94d5230 1587}
6bc75619 1588EXPORT_SYMBOL_GPL(acpi_nfit_init);
b94d5230
DW		 1589
1590static int acpi_nfit_add(struct acpi_device *adev)
1591{
1592 struct nvdimm_bus_descriptor *nd_desc;
1593 struct acpi_nfit_desc *acpi_desc;
1594 struct device *dev = &adev->dev;
1595 struct acpi_table_header *tbl;
1596 acpi_status status = AE_OK;
1597 acpi_size sz;
1598 int rc;
1599
1600 status = acpi_get_table_with_size("NFIT", 0, &tbl, &sz);
1601 if (ACPI_FAILURE(status)) {
1602 dev_err(dev, "failed to find NFIT\n");
1603 return -ENXIO;
1604 }
1605
1606 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
1607 if (!acpi_desc)
1608 return -ENOMEM;
1609
1610 dev_set_drvdata(dev, acpi_desc);
1611 acpi_desc->dev = dev;
1612 acpi_desc->nfit = (struct acpi_table_nfit *) tbl;
6bc75619 1613 acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
b94d5230
DW		 1614 nd_desc = &acpi_desc->nd_desc;
1615 nd_desc->provider_name = "ACPI.NFIT";
1616 nd_desc->ndctl = acpi_nfit_ctl;
45def22c 1617 nd_desc->attr_groups = acpi_nfit_attribute_groups;
b94d5230
DW		 1618
1619 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, nd_desc);
1620 if (!acpi_desc->nvdimm_bus)
1621 return -ENXIO;
1622
1623 rc = acpi_nfit_init(acpi_desc, sz);
1624 if (rc) {
1625 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1626 return rc;
1627 }
1628 return 0;
1629}
1630
1631static int acpi_nfit_remove(struct acpi_device *adev)
1632{
1633 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
1634
1635 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1636 return 0;
1637}
1638
1639static const struct acpi_device_id acpi_nfit_ids[] = {
1640 { "ACPI0012", 0 },
1641 { "", 0 },
1642};
1643MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
1644
1645static struct acpi_driver acpi_nfit_driver = {
1646 .name = KBUILD_MODNAME,
1647 .ids = acpi_nfit_ids,
1648 .ops = {
1649 .add = acpi_nfit_add,
1650 .remove = acpi_nfit_remove,
1651 },
1652};
1653
1654static __init int nfit_init(void)
1655{
1656 BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
1657 BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
1658 BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
1659 BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
1660 BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
1661 BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
1662 BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
1663
1664 acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
1665 acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
1666 acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
1667 acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
1668 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
1669 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
1670 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
1671 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
1672 acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
1673 acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
1674
1675 return acpi_bus_register_driver(&acpi_nfit_driver);
1676}
1677
1678static __exit void nfit_exit(void)
1679{
1680 acpi_bus_unregister_driver(&acpi_nfit_driver);
1681}
1682
1683module_init(nfit_init);
1684module_exit(nfit_exit);
1685MODULE_LICENSE("GPL v2");
1686MODULE_AUTHOR("Intel Corporation");
Linux kernel - Deliverables
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