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libnvdimm: increase max envelope size for ioctl
[deliverable/linux.git] / drivers / acpi / nfit.c
CommitLineData
b94d5230
DW		 1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#include <linux/list_sort.h>
14#include <linux/libnvdimm.h>
15#include <linux/module.h>
047fc8a1 16#include <linux/mutex.h>
62232e45 17#include <linux/ndctl.h>
0caeef63 18#include <linux/delay.h>
b94d5230
DW		 19#include <linux/list.h>
20#include <linux/acpi.h>
eaf96153 21#include <linux/sort.h>
c2ad2954 22#include <linux/pmem.h>
047fc8a1 23#include <linux/io.h>
1cf03c00 24#include <linux/nd.h>
96601adb 25#include <asm/cacheflush.h>
b94d5230
DW		 26#include "nfit.h"
27
047fc8a1
RZ		 28/*
29 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
30 * irrelevant.
31 */
2f8e2c87 32#include <linux/io-64-nonatomic-hi-lo.h>
047fc8a1 33
4d88a97a
DW		 34static bool force_enable_dimms;
35module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
36MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
37
1cf03c00
DW		 38static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT;
39module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR);
40MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds");
41
42/* after three payloads of overflow, it's dead jim */
43static unsigned int scrub_overflow_abort = 3;
44module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR);
45MODULE_PARM_DESC(scrub_overflow_abort,
46 "Number of times we overflow ARS results before abort");
47
7ae0fa43
DW		 48static struct workqueue_struct *nfit_wq;
49
20985164
VV		 50struct nfit_table_prev {
51 struct list_head spas;
52 struct list_head memdevs;
53 struct list_head dcrs;
54 struct list_head bdws;
55 struct list_head idts;
56 struct list_head flushes;
57};
58
b94d5230
DW		 59static u8 nfit_uuid[NFIT_UUID_MAX][16];
60
6bc75619 61const u8 *to_nfit_uuid(enum nfit_uuids id)
b94d5230
DW		 62{
63 return nfit_uuid[id];
64}
6bc75619 65EXPORT_SYMBOL(to_nfit_uuid);
b94d5230 66
62232e45
DW		 67static struct acpi_nfit_desc *to_acpi_nfit_desc(
68 struct nvdimm_bus_descriptor *nd_desc)
69{
70 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
71}
72
73static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
74{
75 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
76
77 /*
78 * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
79 * acpi_device.
80 */
81 if (!nd_desc->provider_name
82 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
83 return NULL;
84
85 return to_acpi_device(acpi_desc->dev);
86}
87
aef25338
DW		 88static int xlat_status(void *buf, unsigned int cmd)
89{
d4f32367 90 struct nd_cmd_clear_error *clear_err;
aef25338
DW		 91 struct nd_cmd_ars_status *ars_status;
92 struct nd_cmd_ars_start *ars_start;
93 struct nd_cmd_ars_cap *ars_cap;
94 u16 flags;
95
96 switch (cmd) {
97 case ND_CMD_ARS_CAP:
98 ars_cap = buf;
99 if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE)
100 return -ENOTTY;
101
102 /* Command failed */
103 if (ars_cap->status & 0xffff)
104 return -EIO;
105
106 /* No supported scan types for this range */
107 flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
108 if ((ars_cap->status >> 16 & flags) == 0)
109 return -ENOTTY;
110 break;
111 case ND_CMD_ARS_START:
112 ars_start = buf;
113 /* ARS is in progress */
114 if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY)
115 return -EBUSY;
116
117 /* Command failed */
118 if (ars_start->status & 0xffff)
119 return -EIO;
120 break;
121 case ND_CMD_ARS_STATUS:
122 ars_status = buf;
123 /* Command failed */
124 if (ars_status->status & 0xffff)
125 return -EIO;
126 /* Check extended status (Upper two bytes) */
127 if (ars_status->status == NFIT_ARS_STATUS_DONE)
128 return 0;
129
130 /* ARS is in progress */
131 if (ars_status->status == NFIT_ARS_STATUS_BUSY)
132 return -EBUSY;
133
134 /* No ARS performed for the current boot */
135 if (ars_status->status == NFIT_ARS_STATUS_NONE)
136 return -EAGAIN;
137
138 /*
139 * ARS interrupted, either we overflowed or some other
140 * agent wants the scan to stop. If we didn't overflow
141 * then just continue with the returned results.
142 */
143 if (ars_status->status == NFIT_ARS_STATUS_INTR) {
144 if (ars_status->flags & NFIT_ARS_F_OVERFLOW)
145 return -ENOSPC;
146 return 0;
147 }
148
149 /* Unknown status */
150 if (ars_status->status >> 16)
151 return -EIO;
152 break;
d4f32367
DW		 153 case ND_CMD_CLEAR_ERROR:
154 clear_err = buf;
155 if (clear_err->status & 0xffff)
156 return -EIO;
157 if (!clear_err->cleared)
158 return -EIO;
159 if (clear_err->length > clear_err->cleared)
160 return clear_err->cleared;
161 break;
aef25338
DW		 162 default:
163 break;
164 }
165
166 return 0;
167}
168
b94d5230
DW		 169static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
170 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
aef25338 171 unsigned int buf_len, int *cmd_rc)
b94d5230 172{
62232e45
DW		 173 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
174 const struct nd_cmd_desc *desc = NULL;
175 union acpi_object in_obj, in_buf, *out_obj;
176 struct device *dev = acpi_desc->dev;
177 const char *cmd_name, *dimm_name;
178 unsigned long dsm_mask;
179 acpi_handle handle;
180 const u8 *uuid;
181 u32 offset;
182 int rc, i;
183
184 if (nvdimm) {
185 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
186 struct acpi_device *adev = nfit_mem->adev;
187
188 if (!adev)
189 return -ENOTTY;
047fc8a1 190 dimm_name = nvdimm_name(nvdimm);
62232e45
DW		 191 cmd_name = nvdimm_cmd_name(cmd);
192 dsm_mask = nfit_mem->dsm_mask;
193 desc = nd_cmd_dimm_desc(cmd);
194 uuid = to_nfit_uuid(NFIT_DEV_DIMM);
195 handle = adev->handle;
196 } else {
197 struct acpi_device *adev = to_acpi_dev(acpi_desc);
198
199 cmd_name = nvdimm_bus_cmd_name(cmd);
200 dsm_mask = nd_desc->dsm_mask;
201 desc = nd_cmd_bus_desc(cmd);
202 uuid = to_nfit_uuid(NFIT_DEV_BUS);
203 handle = adev->handle;
204 dimm_name = "bus";
205 }
206
207 if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
208 return -ENOTTY;
209
210 if (!test_bit(cmd, &dsm_mask))
211 return -ENOTTY;
212
213 in_obj.type = ACPI_TYPE_PACKAGE;
214 in_obj.package.count = 1;
215 in_obj.package.elements = &in_buf;
216 in_buf.type = ACPI_TYPE_BUFFER;
217 in_buf.buffer.pointer = buf;
218 in_buf.buffer.length = 0;
219
220 /* libnvdimm has already validated the input envelope */
221 for (i = 0; i < desc->in_num; i++)
222 in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
223 i, buf);
224
225 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
226 dev_dbg(dev, "%s:%s cmd: %s input length: %d\n", __func__,
227 dimm_name, cmd_name, in_buf.buffer.length);
228 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
229 4, in_buf.buffer.pointer, min_t(u32, 128,
230 in_buf.buffer.length), true);
231 }
232
233 out_obj = acpi_evaluate_dsm(handle, uuid, 1, cmd, &in_obj);
234 if (!out_obj) {
235 dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
236 cmd_name);
237 return -EINVAL;
238 }
239
240 if (out_obj->package.type != ACPI_TYPE_BUFFER) {
241 dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
242 __func__, dimm_name, cmd_name, out_obj->type);
243 rc = -EINVAL;
244 goto out;
245 }
246
247 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
248 dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
249 dimm_name, cmd_name, out_obj->buffer.length);
250 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
251 4, out_obj->buffer.pointer, min_t(u32, 128,
252 out_obj->buffer.length), true);
253 }
254
255 for (i = 0, offset = 0; i < desc->out_num; i++) {
256 u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
257 (u32 *) out_obj->buffer.pointer);
258
259 if (offset + out_size > out_obj->buffer.length) {
260 dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
261 __func__, dimm_name, cmd_name, i);
262 break;
263 }
264
265 if (in_buf.buffer.length + offset + out_size > buf_len) {
266 dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
267 __func__, dimm_name, cmd_name, i);
268 rc = -ENXIO;
269 goto out;
270 }
271 memcpy(buf + in_buf.buffer.length + offset,
272 out_obj->buffer.pointer + offset, out_size);
273 offset += out_size;
274 }
275 if (offset + in_buf.buffer.length < buf_len) {
276 if (i >= 1) {
277 /*
278 * status valid, return the number of bytes left
279 * unfilled in the output buffer
280 */
281 rc = buf_len - offset - in_buf.buffer.length;
aef25338
DW		 282 if (cmd_rc)
283 *cmd_rc = xlat_status(buf, cmd);
62232e45
DW		 284 } else {
285 dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
286 __func__, dimm_name, cmd_name, buf_len,
287 offset);
288 rc = -ENXIO;
289 }
290 } else
291 rc = 0;
292
293 out:
294 ACPI_FREE(out_obj);
295
296 return rc;
b94d5230
DW		 297}
298
299static const char *spa_type_name(u16 type)
300{
301 static const char *to_name[] = {
302 [NFIT_SPA_VOLATILE] = "volatile",
303 [NFIT_SPA_PM] = "pmem",
304 [NFIT_SPA_DCR] = "dimm-control-region",
305 [NFIT_SPA_BDW] = "block-data-window",
306 [NFIT_SPA_VDISK] = "volatile-disk",
307 [NFIT_SPA_VCD] = "volatile-cd",
308 [NFIT_SPA_PDISK] = "persistent-disk",
309 [NFIT_SPA_PCD] = "persistent-cd",
310
311 };
312
313 if (type > NFIT_SPA_PCD)
314 return "unknown";
315
316 return to_name[type];
317}
318
319static int nfit_spa_type(struct acpi_nfit_system_address *spa)
320{
321 int i;
322
323 for (i = 0; i < NFIT_UUID_MAX; i++)
324 if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
325 return i;
326 return -1;
327}
328
329static bool add_spa(struct acpi_nfit_desc *acpi_desc,
20985164 330 struct nfit_table_prev *prev,
b94d5230
DW		 331 struct acpi_nfit_system_address *spa)
332{
826c416f 333 size_t length = min_t(size_t, sizeof(*spa), spa->header.length);
b94d5230 334 struct device *dev = acpi_desc->dev;
20985164
VV		 335 struct nfit_spa *nfit_spa;
336
337 list_for_each_entry(nfit_spa, &prev->spas, list) {
826c416f 338 if (memcmp(nfit_spa->spa, spa, length) == 0) {
20985164
VV		 339 list_move_tail(&nfit_spa->list, &acpi_desc->spas);
340 return true;
341 }
342 }
b94d5230 343
20985164 344 nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL);
b94d5230
DW		 345 if (!nfit_spa)
346 return false;
347 INIT_LIST_HEAD(&nfit_spa->list);
348 nfit_spa->spa = spa;
349 list_add_tail(&nfit_spa->list, &acpi_desc->spas);
350 dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
351 spa->range_index,
352 spa_type_name(nfit_spa_type(spa)));
353 return true;
354}
355
356static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
20985164 357 struct nfit_table_prev *prev,
b94d5230
DW		 358 struct acpi_nfit_memory_map *memdev)
359{
826c416f 360 size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length);
b94d5230 361 struct device *dev = acpi_desc->dev;
20985164 362 struct nfit_memdev *nfit_memdev;
b94d5230 363
20985164 364 list_for_each_entry(nfit_memdev, &prev->memdevs, list)
826c416f 365 if (memcmp(nfit_memdev->memdev, memdev, length) == 0) {
20985164
VV		 366 list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
367 return true;
368 }
369
370 nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL);
b94d5230
DW		 371 if (!nfit_memdev)
372 return false;
373 INIT_LIST_HEAD(&nfit_memdev->list);
374 nfit_memdev->memdev = memdev;
375 list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
376 dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
377 __func__, memdev->device_handle, memdev->range_index,
378 memdev->region_index);
379 return true;
380}
381
382static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
20985164 383 struct nfit_table_prev *prev,
b94d5230
DW		 384 struct acpi_nfit_control_region *dcr)
385{
826c416f 386 size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length);
b94d5230 387 struct device *dev = acpi_desc->dev;
20985164
VV		 388 struct nfit_dcr *nfit_dcr;
389
390 list_for_each_entry(nfit_dcr, &prev->dcrs, list)
826c416f 391 if (memcmp(nfit_dcr->dcr, dcr, length) == 0) {
20985164
VV		 392 list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
393 return true;
394 }
b94d5230 395
20985164 396 nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL);
b94d5230
DW		 397 if (!nfit_dcr)
398 return false;
399 INIT_LIST_HEAD(&nfit_dcr->list);
400 nfit_dcr->dcr = dcr;
401 list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
402 dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
403 dcr->region_index, dcr->windows);
404 return true;
405}
406
407static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
20985164 408 struct nfit_table_prev *prev,
b94d5230
DW		 409 struct acpi_nfit_data_region *bdw)
410{
826c416f 411 size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length);
b94d5230 412 struct device *dev = acpi_desc->dev;
20985164
VV		 413 struct nfit_bdw *nfit_bdw;
414
415 list_for_each_entry(nfit_bdw, &prev->bdws, list)
826c416f 416 if (memcmp(nfit_bdw->bdw, bdw, length) == 0) {
20985164
VV		 417 list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
418 return true;
419 }
b94d5230 420
20985164 421 nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL);
b94d5230
DW		 422 if (!nfit_bdw)
423 return false;
424 INIT_LIST_HEAD(&nfit_bdw->list);
425 nfit_bdw->bdw = bdw;
426 list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
427 dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
428 bdw->region_index, bdw->windows);
429 return true;
430}
431
047fc8a1 432static bool add_idt(struct acpi_nfit_desc *acpi_desc,
20985164 433 struct nfit_table_prev *prev,
047fc8a1
RZ		 434 struct acpi_nfit_interleave *idt)
435{
826c416f 436 size_t length = min_t(size_t, sizeof(*idt), idt->header.length);
047fc8a1 437 struct device *dev = acpi_desc->dev;
20985164
VV		 438 struct nfit_idt *nfit_idt;
439
440 list_for_each_entry(nfit_idt, &prev->idts, list)
826c416f 441 if (memcmp(nfit_idt->idt, idt, length) == 0) {
20985164
VV		 442 list_move_tail(&nfit_idt->list, &acpi_desc->idts);
443 return true;
444 }
047fc8a1 445
20985164 446 nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL);
047fc8a1
RZ		 447 if (!nfit_idt)
448 return false;
449 INIT_LIST_HEAD(&nfit_idt->list);
450 nfit_idt->idt = idt;
451 list_add_tail(&nfit_idt->list, &acpi_desc->idts);
452 dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
453 idt->interleave_index, idt->line_count);
454 return true;
455}
456
c2ad2954 457static bool add_flush(struct acpi_nfit_desc *acpi_desc,
20985164 458 struct nfit_table_prev *prev,
c2ad2954
RZ		 459 struct acpi_nfit_flush_address *flush)
460{
826c416f 461 size_t length = min_t(size_t, sizeof(*flush), flush->header.length);
c2ad2954 462 struct device *dev = acpi_desc->dev;
20985164 463 struct nfit_flush *nfit_flush;
c2ad2954 464
20985164 465 list_for_each_entry(nfit_flush, &prev->flushes, list)
826c416f 466 if (memcmp(nfit_flush->flush, flush, length) == 0) {
20985164
VV		 467 list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
468 return true;
469 }
470
471 nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL);
c2ad2954
RZ		 472 if (!nfit_flush)
473 return false;
474 INIT_LIST_HEAD(&nfit_flush->list);
475 nfit_flush->flush = flush;
476 list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
477 dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__,
478 flush->device_handle, flush->hint_count);
479 return true;
480}
481
20985164
VV		 482static void *add_table(struct acpi_nfit_desc *acpi_desc,
483 struct nfit_table_prev *prev, void *table, const void *end)
b94d5230
DW		 484{
485 struct device *dev = acpi_desc->dev;
486 struct acpi_nfit_header *hdr;
487 void *err = ERR_PTR(-ENOMEM);
488
489 if (table >= end)
490 return NULL;
491
492 hdr = table;
564d5011
VV		 493 if (!hdr->length) {
494 dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
495 hdr->type);
496 return NULL;
497 }
498
b94d5230
DW		 499 switch (hdr->type) {
500 case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
20985164 501 if (!add_spa(acpi_desc, prev, table))
b94d5230
DW		 502 return err;
503 break;
504 case ACPI_NFIT_TYPE_MEMORY_MAP:
20985164 505 if (!add_memdev(acpi_desc, prev, table))
b94d5230
DW		 506 return err;
507 break;
508 case ACPI_NFIT_TYPE_CONTROL_REGION:
20985164 509 if (!add_dcr(acpi_desc, prev, table))
b94d5230
DW		 510 return err;
511 break;
512 case ACPI_NFIT_TYPE_DATA_REGION:
20985164 513 if (!add_bdw(acpi_desc, prev, table))
b94d5230
DW		 514 return err;
515 break;
b94d5230 516 case ACPI_NFIT_TYPE_INTERLEAVE:
20985164 517 if (!add_idt(acpi_desc, prev, table))
047fc8a1 518 return err;
b94d5230
DW		 519 break;
520 case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
20985164 521 if (!add_flush(acpi_desc, prev, table))
c2ad2954 522 return err;
b94d5230
DW		 523 break;
524 case ACPI_NFIT_TYPE_SMBIOS:
525 dev_dbg(dev, "%s: smbios\n", __func__);
526 break;
527 default:
528 dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
529 break;
530 }
531
532 return table + hdr->length;
533}
534
535static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
536 struct nfit_mem *nfit_mem)
537{
538 u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
539 u16 dcr = nfit_mem->dcr->region_index;
540 struct nfit_spa *nfit_spa;
541
542 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
543 u16 range_index = nfit_spa->spa->range_index;
544 int type = nfit_spa_type(nfit_spa->spa);
545 struct nfit_memdev *nfit_memdev;
546
547 if (type != NFIT_SPA_BDW)
548 continue;
549
550 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
551 if (nfit_memdev->memdev->range_index != range_index)
552 continue;
553 if (nfit_memdev->memdev->device_handle != device_handle)
554 continue;
555 if (nfit_memdev->memdev->region_index != dcr)
556 continue;
557
558 nfit_mem->spa_bdw = nfit_spa->spa;
559 return;
560 }
561 }
562
563 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
564 nfit_mem->spa_dcr->range_index);
565 nfit_mem->bdw = NULL;
566}
567
6697b2cf 568static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
b94d5230
DW		 569 struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
570{
571 u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
047fc8a1 572 struct nfit_memdev *nfit_memdev;
c2ad2954 573 struct nfit_flush *nfit_flush;
b94d5230 574 struct nfit_bdw *nfit_bdw;
047fc8a1
RZ		 575 struct nfit_idt *nfit_idt;
576 u16 idt_idx, range_index;
b94d5230 577
b94d5230
DW		 578 list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
579 if (nfit_bdw->bdw->region_index != dcr)
580 continue;
581 nfit_mem->bdw = nfit_bdw->bdw;
582 break;
583 }
584
585 if (!nfit_mem->bdw)
6697b2cf 586 return;
b94d5230
DW		 587
588 nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
047fc8a1
RZ		 589
590 if (!nfit_mem->spa_bdw)
6697b2cf 591 return;
047fc8a1
RZ		 592
593 range_index = nfit_mem->spa_bdw->range_index;
594 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
595 if (nfit_memdev->memdev->range_index != range_index ||
596 nfit_memdev->memdev->region_index != dcr)
597 continue;
598 nfit_mem->memdev_bdw = nfit_memdev->memdev;
599 idt_idx = nfit_memdev->memdev->interleave_index;
600 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
601 if (nfit_idt->idt->interleave_index != idt_idx)
602 continue;
603 nfit_mem->idt_bdw = nfit_idt->idt;
604 break;
605 }
c2ad2954
RZ		 606
607 list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
608 if (nfit_flush->flush->device_handle !=
609 nfit_memdev->memdev->device_handle)
610 continue;
611 nfit_mem->nfit_flush = nfit_flush;
612 break;
613 }
047fc8a1
RZ		 614 break;
615 }
b94d5230
DW		 616}
617
618static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
619 struct acpi_nfit_system_address *spa)
620{
621 struct nfit_mem *nfit_mem, *found;
622 struct nfit_memdev *nfit_memdev;
623 int type = nfit_spa_type(spa);
b94d5230
DW		 624
625 switch (type) {
626 case NFIT_SPA_DCR:
627 case NFIT_SPA_PM:
628 break;
629 default:
630 return 0;
631 }
632
633 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
6697b2cf
DW		 634 struct nfit_dcr *nfit_dcr;
635 u32 device_handle;
636 u16 dcr;
b94d5230
DW		 637
638 if (nfit_memdev->memdev->range_index != spa->range_index)
639 continue;
640 found = NULL;
641 dcr = nfit_memdev->memdev->region_index;
6697b2cf 642 device_handle = nfit_memdev->memdev->device_handle;
b94d5230 643 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
6697b2cf
DW		 644 if (__to_nfit_memdev(nfit_mem)->device_handle
645 == device_handle) {
b94d5230
DW		 646 found = nfit_mem;
647 break;
648 }
649
650 if (found)
651 nfit_mem = found;
652 else {
653 nfit_mem = devm_kzalloc(acpi_desc->dev,
654 sizeof(*nfit_mem), GFP_KERNEL);
655 if (!nfit_mem)
656 return -ENOMEM;
657 INIT_LIST_HEAD(&nfit_mem->list);
6697b2cf
DW		 658 list_add(&nfit_mem->list, &acpi_desc->dimms);
659 }
660
661 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
662 if (nfit_dcr->dcr->region_index != dcr)
663 continue;
664 /*
665 * Record the control region for the dimm. For
666 * the ACPI 6.1 case, where there are separate
667 * control regions for the pmem vs blk
668 * interfaces, be sure to record the extended
669 * blk details.
670 */
671 if (!nfit_mem->dcr)
672 nfit_mem->dcr = nfit_dcr->dcr;
673 else if (nfit_mem->dcr->windows == 0
674 && nfit_dcr->dcr->windows)
675 nfit_mem->dcr = nfit_dcr->dcr;
676 break;
677 }
678
679 if (dcr && !nfit_mem->dcr) {
680 dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
681 spa->range_index, dcr);
682 return -ENODEV;
b94d5230
DW		 683 }
684
685 if (type == NFIT_SPA_DCR) {
047fc8a1
RZ		 686 struct nfit_idt *nfit_idt;
687 u16 idt_idx;
688
b94d5230
DW		 689 /* multiple dimms may share a SPA when interleaved */
690 nfit_mem->spa_dcr = spa;
691 nfit_mem->memdev_dcr = nfit_memdev->memdev;
047fc8a1
RZ		 692 idt_idx = nfit_memdev->memdev->interleave_index;
693 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
694 if (nfit_idt->idt->interleave_index != idt_idx)
695 continue;
696 nfit_mem->idt_dcr = nfit_idt->idt;
697 break;
698 }
6697b2cf 699 nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
b94d5230
DW		 700 } else {
701 /*
702 * A single dimm may belong to multiple SPA-PM
703 * ranges, record at least one in addition to
704 * any SPA-DCR range.
705 */
706 nfit_mem->memdev_pmem = nfit_memdev->memdev;
707 }
b94d5230
DW		 708 }
709
710 return 0;
711}
712
713static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
714{
715 struct nfit_mem *a = container_of(_a, typeof(*a), list);
716 struct nfit_mem *b = container_of(_b, typeof(*b), list);
717 u32 handleA, handleB;
718
719 handleA = __to_nfit_memdev(a)->device_handle;
720 handleB = __to_nfit_memdev(b)->device_handle;
721 if (handleA < handleB)
722 return -1;
723 else if (handleA > handleB)
724 return 1;
725 return 0;
726}
727
728static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
729{
730 struct nfit_spa *nfit_spa;
731
732 /*
733 * For each SPA-DCR or SPA-PMEM address range find its
734 * corresponding MEMDEV(s). From each MEMDEV find the
735 * corresponding DCR. Then, if we're operating on a SPA-DCR,
736 * try to find a SPA-BDW and a corresponding BDW that references
737 * the DCR. Throw it all into an nfit_mem object. Note, that
738 * BDWs are optional.
739 */
740 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
741 int rc;
742
743 rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
744 if (rc)
745 return rc;
746 }
747
748 list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
749
750 return 0;
751}
752
45def22c
DW		 753static ssize_t revision_show(struct device *dev,
754 struct device_attribute *attr, char *buf)
755{
756 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
757 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
758 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
759
6b577c9d 760 return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
45def22c
DW		 761}
762static DEVICE_ATTR_RO(revision);
763
764static struct attribute *acpi_nfit_attributes[] = {
765 &dev_attr_revision.attr,
766 NULL,
767};
768
769static struct attribute_group acpi_nfit_attribute_group = {
770 .name = "nfit",
771 .attrs = acpi_nfit_attributes,
772};
773
a61fe6f7 774static const struct attribute_group *acpi_nfit_attribute_groups[] = {
45def22c
DW		 775 &nvdimm_bus_attribute_group,
776 &acpi_nfit_attribute_group,
777 NULL,
778};
779
e6dfb2de
DW		 780static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
781{
782 struct nvdimm *nvdimm = to_nvdimm(dev);
783 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
784
785 return __to_nfit_memdev(nfit_mem);
786}
787
788static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
789{
790 struct nvdimm *nvdimm = to_nvdimm(dev);
791 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
792
793 return nfit_mem->dcr;
794}
795
796static ssize_t handle_show(struct device *dev,
797 struct device_attribute *attr, char *buf)
798{
799 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
800
801 return sprintf(buf, "%#x\n", memdev->device_handle);
802}
803static DEVICE_ATTR_RO(handle);
804
805static ssize_t phys_id_show(struct device *dev,
806 struct device_attribute *attr, char *buf)
807{
808 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
809
810 return sprintf(buf, "%#x\n", memdev->physical_id);
811}
812static DEVICE_ATTR_RO(phys_id);
813
814static ssize_t vendor_show(struct device *dev,
815 struct device_attribute *attr, char *buf)
816{
817 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
818
819 return sprintf(buf, "%#x\n", dcr->vendor_id);
820}
821static DEVICE_ATTR_RO(vendor);
822
823static ssize_t rev_id_show(struct device *dev,
824 struct device_attribute *attr, char *buf)
825{
826 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
827
828 return sprintf(buf, "%#x\n", dcr->revision_id);
829}
830static DEVICE_ATTR_RO(rev_id);
831
832static ssize_t device_show(struct device *dev,
833 struct device_attribute *attr, char *buf)
834{
835 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
836
837 return sprintf(buf, "%#x\n", dcr->device_id);
838}
839static DEVICE_ATTR_RO(device);
840
841static ssize_t format_show(struct device *dev,
842 struct device_attribute *attr, char *buf)
843{
844 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
845
846 return sprintf(buf, "%#x\n", dcr->code);
847}
848static DEVICE_ATTR_RO(format);
849
850static ssize_t serial_show(struct device *dev,
851 struct device_attribute *attr, char *buf)
852{
853 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
854
855 return sprintf(buf, "%#x\n", dcr->serial_number);
856}
857static DEVICE_ATTR_RO(serial);
858
58138820
DW		 859static ssize_t flags_show(struct device *dev,
860 struct device_attribute *attr, char *buf)
861{
862 u16 flags = to_nfit_memdev(dev)->flags;
863
864 return sprintf(buf, "%s%s%s%s%s\n",
402bae59
TK		 865 flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
866 flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
867 flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
ca321d1c 868 flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
402bae59 869 flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "");
58138820
DW		 870}
871static DEVICE_ATTR_RO(flags);
872
e6dfb2de
DW		 873static struct attribute *acpi_nfit_dimm_attributes[] = {
874 &dev_attr_handle.attr,
875 &dev_attr_phys_id.attr,
876 &dev_attr_vendor.attr,
877 &dev_attr_device.attr,
878 &dev_attr_format.attr,
879 &dev_attr_serial.attr,
880 &dev_attr_rev_id.attr,
58138820 881 &dev_attr_flags.attr,
e6dfb2de
DW		 882 NULL,
883};
884
885static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
886 struct attribute *a, int n)
887{
888 struct device *dev = container_of(kobj, struct device, kobj);
889
890 if (to_nfit_dcr(dev))
891 return a->mode;
892 else
893 return 0;
894}
895
896static struct attribute_group acpi_nfit_dimm_attribute_group = {
897 .name = "nfit",
898 .attrs = acpi_nfit_dimm_attributes,
899 .is_visible = acpi_nfit_dimm_attr_visible,
900};
901
902static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
62232e45 903 &nvdimm_attribute_group,
4d88a97a 904 &nd_device_attribute_group,
e6dfb2de
DW		 905 &acpi_nfit_dimm_attribute_group,
906 NULL,
907};
908
909static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
910 u32 device_handle)
911{
912 struct nfit_mem *nfit_mem;
913
914 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
915 if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
916 return nfit_mem->nvdimm;
917
918 return NULL;
919}
920
62232e45
DW		 921static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
922 struct nfit_mem *nfit_mem, u32 device_handle)
923{
924 struct acpi_device *adev, *adev_dimm;
925 struct device *dev = acpi_desc->dev;
926 const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM);
60e95f43 927 int i;
62232e45
DW		 928
929 nfit_mem->dsm_mask = acpi_desc->dimm_dsm_force_en;
930 adev = to_acpi_dev(acpi_desc);
931 if (!adev)
932 return 0;
933
934 adev_dimm = acpi_find_child_device(adev, device_handle, false);
935 nfit_mem->adev = adev_dimm;
936 if (!adev_dimm) {
937 dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
938 device_handle);
4d88a97a 939 return force_enable_dimms ? 0 : -ENODEV;
62232e45
DW		 940 }
941
62232e45
DW		 942 for (i = ND_CMD_SMART; i <= ND_CMD_VENDOR; i++)
943 if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
944 set_bit(i, &nfit_mem->dsm_mask);
945
60e95f43 946 return 0;
62232e45
DW		 947}
948
e6dfb2de
DW		 949static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
950{
951 struct nfit_mem *nfit_mem;
4d88a97a 952 int dimm_count = 0;
e6dfb2de
DW		 953
954 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
955 struct nvdimm *nvdimm;
956 unsigned long flags = 0;
957 u32 device_handle;
58138820 958 u16 mem_flags;
62232e45 959 int rc;
e6dfb2de
DW		 960
961 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
962 nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
963 if (nvdimm) {
20985164 964 dimm_count++;
e6dfb2de
DW		 965 continue;
966 }
967
968 if (nfit_mem->bdw && nfit_mem->memdev_pmem)
969 flags |= NDD_ALIASING;
970
58138820 971 mem_flags = __to_nfit_memdev(nfit_mem)->flags;
ca321d1c 972 if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
58138820
DW		 973 flags |= NDD_UNARMED;
974
62232e45
DW		 975 rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
976 if (rc)
977 continue;
978
e6dfb2de 979 nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
62232e45
DW		 980 acpi_nfit_dimm_attribute_groups,
981 flags, &nfit_mem->dsm_mask);
e6dfb2de
DW		 982 if (!nvdimm)
983 return -ENOMEM;
984
985 nfit_mem->nvdimm = nvdimm;
4d88a97a 986 dimm_count++;
58138820
DW		 987
988 if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
989 continue;
990
402bae59 991 dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n",
58138820 992 nvdimm_name(nvdimm),
402bae59
TK		 993 mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
994 mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
995 mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
ca321d1c 996 mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "");
58138820 997
e6dfb2de
DW		 998 }
999
4d88a97a 1000 return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
e6dfb2de
DW		 1001}
1002
62232e45
DW		 1003static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
1004{
1005 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1006 const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
1007 struct acpi_device *adev;
1008 int i;
1009
39c686b8 1010 nd_desc->dsm_mask = acpi_desc->bus_dsm_force_en;
62232e45
DW		 1011 adev = to_acpi_dev(acpi_desc);
1012 if (!adev)
1013 return;
1014
d4f32367 1015 for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
62232e45
DW		 1016 if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
1017 set_bit(i, &nd_desc->dsm_mask);
1018}
1019
1f7df6f8
DW		 1020static ssize_t range_index_show(struct device *dev,
1021 struct device_attribute *attr, char *buf)
1022{
1023 struct nd_region *nd_region = to_nd_region(dev);
1024 struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
1025
1026 return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
1027}
1028static DEVICE_ATTR_RO(range_index);
1029
1030static struct attribute *acpi_nfit_region_attributes[] = {
1031 &dev_attr_range_index.attr,
1032 NULL,
1033};
1034
1035static struct attribute_group acpi_nfit_region_attribute_group = {
1036 .name = "nfit",
1037 .attrs = acpi_nfit_region_attributes,
1038};
1039
1040static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
1041 &nd_region_attribute_group,
1042 &nd_mapping_attribute_group,
3d88002e 1043 &nd_device_attribute_group,
74ae66c3 1044 &nd_numa_attribute_group,
1f7df6f8
DW		 1045 &acpi_nfit_region_attribute_group,
1046 NULL,
1047};
1048
eaf96153
DW		 1049/* enough info to uniquely specify an interleave set */
1050struct nfit_set_info {
1051 struct nfit_set_info_map {
1052 u64 region_offset;
1053 u32 serial_number;
1054 u32 pad;
1055 } mapping[0];
1056};
1057
1058static size_t sizeof_nfit_set_info(int num_mappings)
1059{
1060 return sizeof(struct nfit_set_info)
1061 + num_mappings * sizeof(struct nfit_set_info_map);
1062}
1063
1064static int cmp_map(const void *m0, const void *m1)
1065{
1066 const struct nfit_set_info_map *map0 = m0;
1067 const struct nfit_set_info_map *map1 = m1;
1068
1069 return memcmp(&map0->region_offset, &map1->region_offset,
1070 sizeof(u64));
1071}
1072
1073/* Retrieve the nth entry referencing this spa */
1074static struct acpi_nfit_memory_map *memdev_from_spa(
1075 struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
1076{
1077 struct nfit_memdev *nfit_memdev;
1078
1079 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
1080 if (nfit_memdev->memdev->range_index == range_index)
1081 if (n-- == 0)
1082 return nfit_memdev->memdev;
1083 return NULL;
1084}
1085
1086static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
1087 struct nd_region_desc *ndr_desc,
1088 struct acpi_nfit_system_address *spa)
1089{
1090 int i, spa_type = nfit_spa_type(spa);
1091 struct device *dev = acpi_desc->dev;
1092 struct nd_interleave_set *nd_set;
1093 u16 nr = ndr_desc->num_mappings;
1094 struct nfit_set_info *info;
1095
1096 if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
1097 /* pass */;
1098 else
1099 return 0;
1100
1101 nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
1102 if (!nd_set)
1103 return -ENOMEM;
1104
1105 info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
1106 if (!info)
1107 return -ENOMEM;
1108 for (i = 0; i < nr; i++) {
1109 struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
1110 struct nfit_set_info_map *map = &info->mapping[i];
1111 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1112 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1113 struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
1114 spa->range_index, i);
1115
1116 if (!memdev || !nfit_mem->dcr) {
1117 dev_err(dev, "%s: failed to find DCR\n", __func__);
1118 return -ENODEV;
1119 }
1120
1121 map->region_offset = memdev->region_offset;
1122 map->serial_number = nfit_mem->dcr->serial_number;
1123 }
1124
1125 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
1126 cmp_map, NULL);
1127 nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
1128 ndr_desc->nd_set = nd_set;
1129 devm_kfree(dev, info);
1130
1131 return 0;
1132}
1133
047fc8a1
RZ		 1134static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
1135{
1136 struct acpi_nfit_interleave *idt = mmio->idt;
1137 u32 sub_line_offset, line_index, line_offset;
1138 u64 line_no, table_skip_count, table_offset;
1139
1140 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
1141 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
1142 line_offset = idt->line_offset[line_index]
1143 * mmio->line_size;
1144 table_offset = table_skip_count * mmio->table_size;
1145
1146 return mmio->base_offset + line_offset + table_offset + sub_line_offset;
1147}
1148
c2ad2954
RZ		 1149static void wmb_blk(struct nfit_blk *nfit_blk)
1150{
1151
1152 if (nfit_blk->nvdimm_flush) {
1153 /*
1154 * The first wmb() is needed to 'sfence' all previous writes
1155 * such that they are architecturally visible for the platform
1156 * buffer flush. Note that we've already arranged for pmem
1157 * writes to avoid the cache via arch_memcpy_to_pmem(). The
1158 * final wmb() ensures ordering for the NVDIMM flush write.
1159 */
1160 wmb();
1161 writeq(1, nfit_blk->nvdimm_flush);
1162 wmb();
1163 } else
1164 wmb_pmem();
1165}
1166
de4a196c 1167static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
047fc8a1
RZ		 1168{
1169 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1170 u64 offset = nfit_blk->stat_offset + mmio->size * bw;
1171
1172 if (mmio->num_lines)
1173 offset = to_interleave_offset(offset, mmio);
1174
12f03ee6 1175 return readl(mmio->addr.base + offset);
047fc8a1
RZ		 1176}
1177
1178static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
1179 resource_size_t dpa, unsigned int len, unsigned int write)
1180{
1181 u64 cmd, offset;
1182 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
1183
1184 enum {
1185 BCW_OFFSET_MASK = (1ULL << 48)-1,
1186 BCW_LEN_SHIFT = 48,
1187 BCW_LEN_MASK = (1ULL << 8) - 1,
1188 BCW_CMD_SHIFT = 56,
1189 };
1190
1191 cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
1192 len = len >> L1_CACHE_SHIFT;
1193 cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
1194 cmd |= ((u64) write) << BCW_CMD_SHIFT;
1195
1196 offset = nfit_blk->cmd_offset + mmio->size * bw;
1197 if (mmio->num_lines)
1198 offset = to_interleave_offset(offset, mmio);
1199
67a3e8fe 1200 writeq(cmd, mmio->addr.base + offset);
c2ad2954 1201 wmb_blk(nfit_blk);
f0f2c072 1202
aef25338 1203 if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
67a3e8fe 1204 readq(mmio->addr.base + offset);
047fc8a1
RZ		 1205}
1206
1207static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
1208 resource_size_t dpa, void *iobuf, size_t len, int rw,
1209 unsigned int lane)
1210{
1211 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1212 unsigned int copied = 0;
1213 u64 base_offset;
1214 int rc;
1215
1216 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
1217 + lane * mmio->size;
047fc8a1
RZ		 1218 write_blk_ctl(nfit_blk, lane, dpa, len, rw);
1219 while (len) {
1220 unsigned int c;
1221 u64 offset;
1222
1223 if (mmio->num_lines) {
1224 u32 line_offset;
1225
1226 offset = to_interleave_offset(base_offset + copied,
1227 mmio);
1228 div_u64_rem(offset, mmio->line_size, &line_offset);
1229 c = min_t(size_t, len, mmio->line_size - line_offset);
1230 } else {
1231 offset = base_offset + nfit_blk->bdw_offset;
1232 c = len;
1233 }
1234
1235 if (rw)
67a3e8fe 1236 memcpy_to_pmem(mmio->addr.aperture + offset,
c2ad2954 1237 iobuf + copied, c);
67a3e8fe 1238 else {
aef25338 1239 if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
67a3e8fe
RZ		 1240 mmio_flush_range((void __force *)
1241 mmio->addr.aperture + offset, c);
1242
c2ad2954 1243 memcpy_from_pmem(iobuf + copied,
67a3e8fe
RZ		 1244 mmio->addr.aperture + offset, c);
1245 }
047fc8a1
RZ		 1246
1247 copied += c;
1248 len -= c;
1249 }
c2ad2954
RZ		 1250
1251 if (rw)
1252 wmb_blk(nfit_blk);
1253
047fc8a1
RZ		 1254 rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
1255 return rc;
1256}
1257
1258static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
1259 resource_size_t dpa, void *iobuf, u64 len, int rw)
1260{
1261 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1262 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1263 struct nd_region *nd_region = nfit_blk->nd_region;
1264 unsigned int lane, copied = 0;
1265 int rc = 0;
1266
1267 lane = nd_region_acquire_lane(nd_region);
1268 while (len) {
1269 u64 c = min(len, mmio->size);
1270
1271 rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
1272 iobuf + copied, c, rw, lane);
1273 if (rc)
1274 break;
1275
1276 copied += c;
1277 len -= c;
1278 }
1279 nd_region_release_lane(nd_region, lane);
1280
1281 return rc;
1282}
1283
1284static void nfit_spa_mapping_release(struct kref *kref)
1285{
1286 struct nfit_spa_mapping *spa_map = to_spa_map(kref);
1287 struct acpi_nfit_system_address *spa = spa_map->spa;
1288 struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc;
1289
1290 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1291 dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index);
67a3e8fe
RZ		 1292 if (spa_map->type == SPA_MAP_APERTURE)
1293 memunmap((void __force *)spa_map->addr.aperture);
1294 else
1295 iounmap(spa_map->addr.base);
047fc8a1
RZ		 1296 release_mem_region(spa->address, spa->length);
1297 list_del(&spa_map->list);
1298 kfree(spa_map);
1299}
1300
1301static struct nfit_spa_mapping *find_spa_mapping(
1302 struct acpi_nfit_desc *acpi_desc,
1303 struct acpi_nfit_system_address *spa)
1304{
1305 struct nfit_spa_mapping *spa_map;
1306
1307 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1308 list_for_each_entry(spa_map, &acpi_desc->spa_maps, list)
1309 if (spa_map->spa == spa)
1310 return spa_map;
1311
1312 return NULL;
1313}
1314
1315static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc,
1316 struct acpi_nfit_system_address *spa)
1317{
1318 struct nfit_spa_mapping *spa_map;
1319
1320 mutex_lock(&acpi_desc->spa_map_mutex);
1321 spa_map = find_spa_mapping(acpi_desc, spa);
1322
1323 if (spa_map)
1324 kref_put(&spa_map->kref, nfit_spa_mapping_release);
1325 mutex_unlock(&acpi_desc->spa_map_mutex);
1326}
1327
1328static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1329 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1330{
1331 resource_size_t start = spa->address;
1332 resource_size_t n = spa->length;
1333 struct nfit_spa_mapping *spa_map;
1334 struct resource *res;
1335
1336 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1337
1338 spa_map = find_spa_mapping(acpi_desc, spa);
1339 if (spa_map) {
1340 kref_get(&spa_map->kref);
67a3e8fe 1341 return spa_map->addr.base;
047fc8a1
RZ		 1342 }
1343
1344 spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL);
1345 if (!spa_map)
1346 return NULL;
1347
1348 INIT_LIST_HEAD(&spa_map->list);
1349 spa_map->spa = spa;
1350 kref_init(&spa_map->kref);
1351 spa_map->acpi_desc = acpi_desc;
1352
1353 res = request_mem_region(start, n, dev_name(acpi_desc->dev));
1354 if (!res)
1355 goto err_mem;
1356
67a3e8fe
RZ		 1357 spa_map->type = type;
1358 if (type == SPA_MAP_APERTURE)
1359 spa_map->addr.aperture = (void __pmem *)memremap(start, n,
1360 ARCH_MEMREMAP_PMEM);
1361 else
1362 spa_map->addr.base = ioremap_nocache(start, n);
1363
c2ad2954 1364
67a3e8fe 1365 if (!spa_map->addr.base)
047fc8a1
RZ		 1366 goto err_map;
1367
1368 list_add_tail(&spa_map->list, &acpi_desc->spa_maps);
67a3e8fe 1369 return spa_map->addr.base;
047fc8a1
RZ		 1370
1371 err_map:
1372 release_mem_region(start, n);
1373 err_mem:
1374 kfree(spa_map);
1375 return NULL;
1376}
1377
1378/**
1379 * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges
1380 * @nvdimm_bus: NFIT-bus that provided the spa table entry
1381 * @nfit_spa: spa table to map
c2ad2954 1382 * @type: aperture or control region
047fc8a1
RZ		 1383 *
1384 * In the case where block-data-window apertures and
1385 * dimm-control-regions are interleaved they will end up sharing a
1386 * single request_mem_region() + ioremap() for the address range. In
1387 * the style of devm nfit_spa_map() mappings are automatically dropped
1388 * when all region devices referencing the same mapping are disabled /
1389 * unbound.
1390 */
1391static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
c2ad2954 1392 struct acpi_nfit_system_address *spa, enum spa_map_type type)
047fc8a1
RZ		 1393{
1394 void __iomem *iomem;
1395
1396 mutex_lock(&acpi_desc->spa_map_mutex);
c2ad2954 1397 iomem = __nfit_spa_map(acpi_desc, spa, type);
047fc8a1
RZ		 1398 mutex_unlock(&acpi_desc->spa_map_mutex);
1399
1400 return iomem;
1401}
1402
1403static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
1404 struct acpi_nfit_interleave *idt, u16 interleave_ways)
1405{
1406 if (idt) {
1407 mmio->num_lines = idt->line_count;
1408 mmio->line_size = idt->line_size;
1409 if (interleave_ways == 0)
1410 return -ENXIO;
1411 mmio->table_size = mmio->num_lines * interleave_ways
1412 * mmio->line_size;
1413 }
1414
1415 return 0;
1416}
1417
f0f2c072
RZ		 1418static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
1419 struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
1420{
1421 struct nd_cmd_dimm_flags flags;
1422 int rc;
1423
1424 memset(&flags, 0, sizeof(flags));
1425 rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
aef25338 1426 sizeof(flags), NULL);
f0f2c072
RZ		 1427
1428 if (rc >= 0 && flags.status == 0)
1429 nfit_blk->dimm_flags = flags.flags;
1430 else if (rc == -ENOTTY) {
1431 /* fall back to a conservative default */
aef25338 1432 nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
f0f2c072
RZ		 1433 rc = 0;
1434 } else
1435 rc = -ENXIO;
1436
1437 return rc;
1438}
1439
047fc8a1
RZ		 1440static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
1441 struct device *dev)
1442{
1443 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1444 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1445 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
c2ad2954 1446 struct nfit_flush *nfit_flush;
047fc8a1
RZ		 1447 struct nfit_blk_mmio *mmio;
1448 struct nfit_blk *nfit_blk;
1449 struct nfit_mem *nfit_mem;
1450 struct nvdimm *nvdimm;
1451 int rc;
1452
1453 nvdimm = nd_blk_region_to_dimm(ndbr);
1454 nfit_mem = nvdimm_provider_data(nvdimm);
1455 if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
1456 dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
1457 nfit_mem ? "" : " nfit_mem",
193ccca4
DW		 1458 (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
1459 (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
047fc8a1
RZ		 1460 return -ENXIO;
1461 }
1462
1463 nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
1464 if (!nfit_blk)
1465 return -ENOMEM;
1466 nd_blk_region_set_provider_data(ndbr, nfit_blk);
1467 nfit_blk->nd_region = to_nd_region(dev);
1468
1469 /* map block aperture memory */
1470 nfit_blk->bdw_offset = nfit_mem->bdw->offset;
1471 mmio = &nfit_blk->mmio[BDW];
67a3e8fe 1472 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw,
c2ad2954 1473 SPA_MAP_APERTURE);
67a3e8fe 1474 if (!mmio->addr.base) {
047fc8a1
RZ		 1475 dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
1476 nvdimm_name(nvdimm));
1477 return -ENOMEM;
1478 }
1479 mmio->size = nfit_mem->bdw->size;
1480 mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
1481 mmio->idt = nfit_mem->idt_bdw;
1482 mmio->spa = nfit_mem->spa_bdw;
1483 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
1484 nfit_mem->memdev_bdw->interleave_ways);
1485 if (rc) {
1486 dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
1487 __func__, nvdimm_name(nvdimm));
1488 return rc;
1489 }
1490
1491 /* map block control memory */
1492 nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
1493 nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
1494 mmio = &nfit_blk->mmio[DCR];
67a3e8fe 1495 mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr,
c2ad2954 1496 SPA_MAP_CONTROL);
67a3e8fe 1497 if (!mmio->addr.base) {
047fc8a1
RZ		 1498 dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
1499 nvdimm_name(nvdimm));
1500 return -ENOMEM;
1501 }
1502 mmio->size = nfit_mem->dcr->window_size;
1503 mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
1504 mmio->idt = nfit_mem->idt_dcr;
1505 mmio->spa = nfit_mem->spa_dcr;
1506 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
1507 nfit_mem->memdev_dcr->interleave_ways);
1508 if (rc) {
1509 dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
1510 __func__, nvdimm_name(nvdimm));
1511 return rc;
1512 }
1513
f0f2c072
RZ		 1514 rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
1515 if (rc < 0) {
1516 dev_dbg(dev, "%s: %s failed get DIMM flags\n",
1517 __func__, nvdimm_name(nvdimm));
1518 return rc;
1519 }
1520
c2ad2954
RZ		 1521 nfit_flush = nfit_mem->nfit_flush;
1522 if (nfit_flush && nfit_flush->flush->hint_count != 0) {
1523 nfit_blk->nvdimm_flush = devm_ioremap_nocache(dev,
1524 nfit_flush->flush->hint_address[0], 8);
1525 if (!nfit_blk->nvdimm_flush)
1526 return -ENOMEM;
1527 }
1528
96601adb 1529 if (!arch_has_wmb_pmem() && !nfit_blk->nvdimm_flush)
c2ad2954
RZ		 1530 dev_warn(dev, "unable to guarantee persistence of writes\n");
1531
047fc8a1
RZ		 1532 if (mmio->line_size == 0)
1533 return 0;
1534
1535 if ((u32) nfit_blk->cmd_offset % mmio->line_size
1536 + 8 > mmio->line_size) {
1537 dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
1538 return -ENXIO;
1539 } else if ((u32) nfit_blk->stat_offset % mmio->line_size
1540 + 8 > mmio->line_size) {
1541 dev_dbg(dev, "stat_offset crosses interleave boundary\n");
1542 return -ENXIO;
1543 }
1544
1545 return 0;
1546}
1547
1548static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus,
1549 struct device *dev)
1550{
1551 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1552 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1553 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
1554 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1555 int i;
1556
1557 if (!nfit_blk)
1558 return; /* never enabled */
1559
1560 /* auto-free BLK spa mappings */
1561 for (i = 0; i < 2; i++) {
1562 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i];
1563
67a3e8fe 1564 if (mmio->addr.base)
047fc8a1
RZ		 1565 nfit_spa_unmap(acpi_desc, mmio->spa);
1566 }
1567 nd_blk_region_set_provider_data(ndbr, NULL);
1568 /* devm will free nfit_blk */
1569}
1570
aef25338 1571static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
1cf03c00 1572 struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
0caeef63 1573{
aef25338 1574 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1cf03c00 1575 struct acpi_nfit_system_address *spa = nfit_spa->spa;
aef25338
DW		 1576 int cmd_rc, rc;
1577
1cf03c00
DW		 1578 cmd->address = spa->address;
1579 cmd->length = spa->length;
aef25338
DW		 1580 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
1581 sizeof(*cmd), &cmd_rc);
1582 if (rc < 0)
1583 return rc;
1cf03c00 1584 return cmd_rc;
0caeef63
VV		 1585}
1586
1cf03c00 1587static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
0caeef63
VV		 1588{
1589 int rc;
1cf03c00
DW		 1590 int cmd_rc;
1591 struct nd_cmd_ars_start ars_start;
1592 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1593 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
0caeef63 1594
1cf03c00
DW		 1595 memset(&ars_start, 0, sizeof(ars_start));
1596 ars_start.address = spa->address;
1597 ars_start.length = spa->length;
1598 if (nfit_spa_type(spa) == NFIT_SPA_PM)
1599 ars_start.type = ND_ARS_PERSISTENT;
1600 else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
1601 ars_start.type = ND_ARS_VOLATILE;
1602 else
1603 return -ENOTTY;
aef25338 1604
1cf03c00
DW		 1605 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1606 sizeof(ars_start), &cmd_rc);
aef25338 1607
1cf03c00
DW		 1608 if (rc < 0)
1609 return rc;
1610 return cmd_rc;
0caeef63
VV		 1611}
1612
1cf03c00 1613static int ars_continue(struct acpi_nfit_desc *acpi_desc)
0caeef63 1614{
aef25338 1615 int rc, cmd_rc;
1cf03c00
DW		 1616 struct nd_cmd_ars_start ars_start;
1617 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1618 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1619
1620 memset(&ars_start, 0, sizeof(ars_start));
1621 ars_start.address = ars_status->restart_address;
1622 ars_start.length = ars_status->restart_length;
1623 ars_start.type = ars_status->type;
1624 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
1625 sizeof(ars_start), &cmd_rc);
1626 if (rc < 0)
1627 return rc;
1628 return cmd_rc;
1629}
0caeef63 1630
1cf03c00
DW		 1631static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
1632{
1633 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1634 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
1635 int rc, cmd_rc;
aef25338 1636
1cf03c00
DW		 1637 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
1638 acpi_desc->ars_status_size, &cmd_rc);
1639 if (rc < 0)
1640 return rc;
1641 return cmd_rc;
0caeef63
VV		 1642}
1643
1644static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus,
1cf03c00 1645 struct nd_cmd_ars_status *ars_status)
0caeef63
VV		 1646{
1647 int rc;
1648 u32 i;
1649
0caeef63
VV		 1650 for (i = 0; i < ars_status->num_records; i++) {
1651 rc = nvdimm_bus_add_poison(nvdimm_bus,
1652 ars_status->records[i].err_address,
1653 ars_status->records[i].length);
1654 if (rc)
1655 return rc;
1656 }
1657
1658 return 0;
1659}
1660
af1996ef
TK		 1661static void acpi_nfit_remove_resource(void *data)
1662{
1663 struct resource *res = data;
1664
1665 remove_resource(res);
1666}
1667
1668static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
1669 struct nd_region_desc *ndr_desc)
1670{
1671 struct resource *res, *nd_res = ndr_desc->res;
1672 int is_pmem, ret;
1673
1674 /* No operation if the region is already registered as PMEM */
1675 is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
1676 IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
1677 if (is_pmem == REGION_INTERSECTS)
1678 return 0;
1679
1680 res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
1681 if (!res)
1682 return -ENOMEM;
1683
1684 res->name = "Persistent Memory";
1685 res->start = nd_res->start;
1686 res->end = nd_res->end;
1687 res->flags = IORESOURCE_MEM;
1688 res->desc = IORES_DESC_PERSISTENT_MEMORY;
1689
1690 ret = insert_resource(&iomem_resource, res);
1691 if (ret)
1692 return ret;
1693
1694 ret = devm_add_action(acpi_desc->dev, acpi_nfit_remove_resource, res);
1695 if (ret) {
1696 remove_resource(res);
1697 return ret;
1698 }
1699
1700 return 0;
1701}
1702
1f7df6f8
DW		 1703static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
1704 struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
1705 struct acpi_nfit_memory_map *memdev,
1cf03c00 1706 struct nfit_spa *nfit_spa)
1f7df6f8
DW		 1707{
1708 struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
1709 memdev->device_handle);
1cf03c00 1710 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1 1711 struct nd_blk_region_desc *ndbr_desc;
1f7df6f8
DW		 1712 struct nfit_mem *nfit_mem;
1713 int blk_valid = 0;
1714
1715 if (!nvdimm) {
1716 dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
1717 spa->range_index, memdev->device_handle);
1718 return -ENODEV;
1719 }
1720
1721 nd_mapping->nvdimm = nvdimm;
1722 switch (nfit_spa_type(spa)) {
1723 case NFIT_SPA_PM:
1724 case NFIT_SPA_VOLATILE:
1725 nd_mapping->start = memdev->address;
1726 nd_mapping->size = memdev->region_size;
1727 break;
1728 case NFIT_SPA_DCR:
1729 nfit_mem = nvdimm_provider_data(nvdimm);
1730 if (!nfit_mem || !nfit_mem->bdw) {
1731 dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
1732 spa->range_index, nvdimm_name(nvdimm));
1733 } else {
1734 nd_mapping->size = nfit_mem->bdw->capacity;
1735 nd_mapping->start = nfit_mem->bdw->start_address;
5212e11f 1736 ndr_desc->num_lanes = nfit_mem->bdw->windows;
1f7df6f8
DW		 1737 blk_valid = 1;
1738 }
1739
1740 ndr_desc->nd_mapping = nd_mapping;
1741 ndr_desc->num_mappings = blk_valid;
047fc8a1
RZ		 1742 ndbr_desc = to_blk_region_desc(ndr_desc);
1743 ndbr_desc->enable = acpi_nfit_blk_region_enable;
1744 ndbr_desc->disable = acpi_nfit_blk_region_disable;
6bc75619 1745 ndbr_desc->do_io = acpi_desc->blk_do_io;
1cf03c00
DW		 1746 nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
1747 ndr_desc);
1748 if (!nfit_spa->nd_region)
1f7df6f8
DW		 1749 return -ENOMEM;
1750 break;
1751 }
1752
1753 return 0;
1754}
1755
1756static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
1757 struct nfit_spa *nfit_spa)
1758{
1759 static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
1760 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1
RZ		 1761 struct nd_blk_region_desc ndbr_desc;
1762 struct nd_region_desc *ndr_desc;
1f7df6f8 1763 struct nfit_memdev *nfit_memdev;
1f7df6f8
DW		 1764 struct nvdimm_bus *nvdimm_bus;
1765 struct resource res;
eaf96153 1766 int count = 0, rc;
1f7df6f8 1767
1cf03c00 1768 if (nfit_spa->nd_region)
20985164
VV		 1769 return 0;
1770
1f7df6f8
DW		 1771 if (spa->range_index == 0) {
1772 dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
1773 __func__);
1774 return 0;
1775 }
1776
1777 memset(&res, 0, sizeof(res));
1778 memset(&nd_mappings, 0, sizeof(nd_mappings));
047fc8a1 1779 memset(&ndbr_desc, 0, sizeof(ndbr_desc));
1f7df6f8
DW		 1780 res.start = spa->address;
1781 res.end = res.start + spa->length - 1;
047fc8a1
RZ		 1782 ndr_desc = &ndbr_desc.ndr_desc;
1783 ndr_desc->res = &res;
1784 ndr_desc->provider_data = nfit_spa;
1785 ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
41d7a6d6
TK		 1786 if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
1787 ndr_desc->numa_node = acpi_map_pxm_to_online_node(
1788 spa->proximity_domain);
1789 else
1790 ndr_desc->numa_node = NUMA_NO_NODE;
1791
1f7df6f8
DW		 1792 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
1793 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
1794 struct nd_mapping *nd_mapping;
1f7df6f8
DW		 1795
1796 if (memdev->range_index != spa->range_index)
1797 continue;
1798 if (count >= ND_MAX_MAPPINGS) {
1799 dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
1800 spa->range_index, ND_MAX_MAPPINGS);
1801 return -ENXIO;
1802 }
1803 nd_mapping = &nd_mappings[count++];
047fc8a1 1804 rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
1cf03c00 1805 memdev, nfit_spa);
1f7df6f8 1806 if (rc)
1cf03c00 1807 goto out;
1f7df6f8
DW		 1808 }
1809
047fc8a1
RZ		 1810 ndr_desc->nd_mapping = nd_mappings;
1811 ndr_desc->num_mappings = count;
1812 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
eaf96153 1813 if (rc)
1cf03c00 1814 goto out;
eaf96153 1815
1f7df6f8
DW		 1816 nvdimm_bus = acpi_desc->nvdimm_bus;
1817 if (nfit_spa_type(spa) == NFIT_SPA_PM) {
af1996ef 1818 rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
48901165 1819 if (rc) {
af1996ef
TK		 1820 dev_warn(acpi_desc->dev,
1821 "failed to insert pmem resource to iomem: %d\n",
1822 rc);
48901165 1823 goto out;
0caeef63 1824 }
48901165 1825
1cf03c00
DW		 1826 nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
1827 ndr_desc);
1828 if (!nfit_spa->nd_region)
1829 rc = -ENOMEM;
1f7df6f8 1830 } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
1cf03c00
DW		 1831 nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
1832 ndr_desc);
1833 if (!nfit_spa->nd_region)
1834 rc = -ENOMEM;
1f7df6f8 1835 }
20985164 1836
1cf03c00
DW		 1837 out:
1838 if (rc)
1839 dev_err(acpi_desc->dev, "failed to register spa range %d\n",
1840 nfit_spa->spa->range_index);
1841 return rc;
1842}
1843
1844static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc,
1845 u32 max_ars)
1846{
1847 struct device *dev = acpi_desc->dev;
1848 struct nd_cmd_ars_status *ars_status;
1849
1850 if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) {
1851 memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size);
1852 return 0;
1853 }
1854
1855 if (acpi_desc->ars_status)
1856 devm_kfree(dev, acpi_desc->ars_status);
1857 acpi_desc->ars_status = NULL;
1858 ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL);
1859 if (!ars_status)
1860 return -ENOMEM;
1861 acpi_desc->ars_status = ars_status;
1862 acpi_desc->ars_status_size = max_ars;
1f7df6f8
DW		 1863 return 0;
1864}
1865
1cf03c00
DW		 1866static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc,
1867 struct nfit_spa *nfit_spa)
1868{
1869 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1870 int rc;
1871
1872 if (!nfit_spa->max_ars) {
1873 struct nd_cmd_ars_cap ars_cap;
1874
1875 memset(&ars_cap, 0, sizeof(ars_cap));
1876 rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
1877 if (rc < 0)
1878 return rc;
1879 nfit_spa->max_ars = ars_cap.max_ars_out;
1880 nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
1881 /* check that the supported scrub types match the spa type */
1882 if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE &&
1883 ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0)
1884 return -ENOTTY;
1885 else if (nfit_spa_type(spa) == NFIT_SPA_PM &&
1886 ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0)
1887 return -ENOTTY;
1888 }
1889
1890 if (ars_status_alloc(acpi_desc, nfit_spa->max_ars))
1891 return -ENOMEM;
1892
1893 rc = ars_get_status(acpi_desc);
1894 if (rc < 0 && rc != -ENOSPC)
1895 return rc;
1896
1897 if (ars_status_process_records(acpi_desc->nvdimm_bus,
1898 acpi_desc->ars_status))
1899 return -ENOMEM;
1900
1901 return 0;
1902}
1903
1904static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc,
1905 struct nfit_spa *nfit_spa)
1906{
1907 struct acpi_nfit_system_address *spa = nfit_spa->spa;
1908 unsigned int overflow_retry = scrub_overflow_abort;
1909 u64 init_ars_start = 0, init_ars_len = 0;
1910 struct device *dev = acpi_desc->dev;
1911 unsigned int tmo = scrub_timeout;
1912 int rc;
1913
1914 if (nfit_spa->ars_done || !nfit_spa->nd_region)
1915 return;
1916
1917 rc = ars_start(acpi_desc, nfit_spa);
1918 /*
1919 * If we timed out the initial scan we'll still be busy here,
1920 * and will wait another timeout before giving up permanently.
1921 */
1922 if (rc < 0 && rc != -EBUSY)
1923 return;
1924
1925 do {
1926 u64 ars_start, ars_len;
1927
1928 if (acpi_desc->cancel)
1929 break;
1930 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
1931 if (rc == -ENOTTY)
1932 break;
1933 if (rc == -EBUSY && !tmo) {
1934 dev_warn(dev, "range %d ars timeout, aborting\n",
1935 spa->range_index);
1936 break;
1937 }
1938
1939 if (rc == -EBUSY) {
1940 /*
1941 * Note, entries may be appended to the list
1942 * while the lock is dropped, but the workqueue
1943 * being active prevents entries being deleted /
1944 * freed.
1945 */
1946 mutex_unlock(&acpi_desc->init_mutex);
1947 ssleep(1);
1948 tmo--;
1949 mutex_lock(&acpi_desc->init_mutex);
1950 continue;
1951 }
1952
1953 /* we got some results, but there are more pending... */
1954 if (rc == -ENOSPC && overflow_retry--) {
1955 if (!init_ars_len) {
1956 init_ars_len = acpi_desc->ars_status->length;
1957 init_ars_start = acpi_desc->ars_status->address;
1958 }
1959 rc = ars_continue(acpi_desc);
1960 }
1961
1962 if (rc < 0) {
1963 dev_warn(dev, "range %d ars continuation failed\n",
1964 spa->range_index);
1965 break;
1966 }
1967
1968 if (init_ars_len) {
1969 ars_start = init_ars_start;
1970 ars_len = init_ars_len;
1971 } else {
1972 ars_start = acpi_desc->ars_status->address;
1973 ars_len = acpi_desc->ars_status->length;
1974 }
1975 dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n",
1976 spa->range_index, ars_start, ars_len);
1977 /* notify the region about new poison entries */
1978 nvdimm_region_notify(nfit_spa->nd_region,
1979 NVDIMM_REVALIDATE_POISON);
1980 break;
1981 } while (1);
1982}
1983
1984static void acpi_nfit_scrub(struct work_struct *work)
1f7df6f8 1985{
1cf03c00
DW		 1986 struct device *dev;
1987 u64 init_scrub_length = 0;
1f7df6f8 1988 struct nfit_spa *nfit_spa;
1cf03c00
DW		 1989 u64 init_scrub_address = 0;
1990 bool init_ars_done = false;
1991 struct acpi_nfit_desc *acpi_desc;
1992 unsigned int tmo = scrub_timeout;
1993 unsigned int overflow_retry = scrub_overflow_abort;
1994
1995 acpi_desc = container_of(work, typeof(*acpi_desc), work);
1996 dev = acpi_desc->dev;
1f7df6f8 1997
1cf03c00
DW		 1998 /*
1999 * We scrub in 2 phases. The first phase waits for any platform
2000 * firmware initiated scrubs to complete and then we go search for the
2001 * affected spa regions to mark them scanned. In the second phase we
2002 * initiate a directed scrub for every range that was not scrubbed in
2003 * phase 1.
2004 */
2005
2006 /* process platform firmware initiated scrubs */
2007 retry:
2008 mutex_lock(&acpi_desc->init_mutex);
1f7df6f8 2009 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
1cf03c00
DW		 2010 struct nd_cmd_ars_status *ars_status;
2011 struct acpi_nfit_system_address *spa;
2012 u64 ars_start, ars_len;
2013 int rc;
1f7df6f8 2014
1cf03c00
DW		 2015 if (acpi_desc->cancel)
2016 break;
2017
2018 if (nfit_spa->nd_region)
2019 continue;
2020
2021 if (init_ars_done) {
2022 /*
2023 * No need to re-query, we're now just
2024 * reconciling all the ranges covered by the
2025 * initial scrub
2026 */
2027 rc = 0;
2028 } else
2029 rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
2030
2031 if (rc == -ENOTTY) {
2032 /* no ars capability, just register spa and move on */
2033 acpi_nfit_register_region(acpi_desc, nfit_spa);
2034 continue;
2035 }
2036
2037 if (rc == -EBUSY && !tmo) {
2038 /* fallthrough to directed scrub in phase 2 */
2039 dev_warn(dev, "timeout awaiting ars results, continuing...\n");
2040 break;
2041 } else if (rc == -EBUSY) {
2042 mutex_unlock(&acpi_desc->init_mutex);
2043 ssleep(1);
2044 tmo--;
2045 goto retry;
2046 }
2047
2048 /* we got some results, but there are more pending... */
2049 if (rc == -ENOSPC && overflow_retry--) {
2050 ars_status = acpi_desc->ars_status;
2051 /*
2052 * Record the original scrub range, so that we
2053 * can recall all the ranges impacted by the
2054 * initial scrub.
2055 */
2056 if (!init_scrub_length) {
2057 init_scrub_length = ars_status->length;
2058 init_scrub_address = ars_status->address;
2059 }
2060 rc = ars_continue(acpi_desc);
2061 if (rc == 0) {
2062 mutex_unlock(&acpi_desc->init_mutex);
2063 goto retry;
2064 }
2065 }
2066
2067 if (rc < 0) {
2068 /*
2069 * Initial scrub failed, we'll give it one more
2070 * try below...
2071 */
2072 break;
2073 }
2074
2075 /* We got some final results, record completed ranges */
2076 ars_status = acpi_desc->ars_status;
2077 if (init_scrub_length) {
2078 ars_start = init_scrub_address;
2079 ars_len = ars_start + init_scrub_length;
2080 } else {
2081 ars_start = ars_status->address;
2082 ars_len = ars_status->length;
2083 }
2084 spa = nfit_spa->spa;
2085
2086 if (!init_ars_done) {
2087 init_ars_done = true;
2088 dev_dbg(dev, "init scrub %#llx + %#llx complete\n",
2089 ars_start, ars_len);
2090 }
2091 if (ars_start <= spa->address && ars_start + ars_len
2092 >= spa->address + spa->length)
2093 acpi_nfit_register_region(acpi_desc, nfit_spa);
1f7df6f8 2094 }
1cf03c00
DW		 2095
2096 /*
2097 * For all the ranges not covered by an initial scrub we still
2098 * want to see if there are errors, but it's ok to discover them
2099 * asynchronously.
2100 */
2101 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
2102 /*
2103 * Flag all the ranges that still need scrubbing, but
2104 * register them now to make data available.
2105 */
2106 if (nfit_spa->nd_region)
2107 nfit_spa->ars_done = 1;
2108 else
2109 acpi_nfit_register_region(acpi_desc, nfit_spa);
2110 }
2111
2112 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2113 acpi_nfit_async_scrub(acpi_desc, nfit_spa);
2114 mutex_unlock(&acpi_desc->init_mutex);
2115}
2116
2117static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
2118{
2119 struct nfit_spa *nfit_spa;
2120 int rc;
2121
2122 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
2123 if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) {
2124 /* BLK regions don't need to wait for ars results */
2125 rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
2126 if (rc)
2127 return rc;
2128 }
2129
2130 queue_work(nfit_wq, &acpi_desc->work);
1f7df6f8
DW		 2131 return 0;
2132}
2133
20985164
VV		 2134static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
2135 struct nfit_table_prev *prev)
2136{
2137 struct device *dev = acpi_desc->dev;
2138
2139 if (!list_empty(&prev->spas) ||
2140 !list_empty(&prev->memdevs) ||
2141 !list_empty(&prev->dcrs) ||
2142 !list_empty(&prev->bdws) ||
2143 !list_empty(&prev->idts) ||
2144 !list_empty(&prev->flushes)) {
2145 dev_err(dev, "new nfit deletes entries (unsupported)\n");
2146 return -ENXIO;
2147 }
2148 return 0;
2149}
2150
6bc75619 2151int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz)
b94d5230
DW		 2152{
2153 struct device *dev = acpi_desc->dev;
20985164 2154 struct nfit_table_prev prev;
b94d5230
DW		 2155 const void *end;
2156 u8 *data;
1f7df6f8 2157 int rc;
b94d5230 2158
20985164
VV		 2159 mutex_lock(&acpi_desc->init_mutex);
2160
2161 INIT_LIST_HEAD(&prev.spas);
2162 INIT_LIST_HEAD(&prev.memdevs);
2163 INIT_LIST_HEAD(&prev.dcrs);
2164 INIT_LIST_HEAD(&prev.bdws);
2165 INIT_LIST_HEAD(&prev.idts);
2166 INIT_LIST_HEAD(&prev.flushes);
2167
2168 list_cut_position(&prev.spas, &acpi_desc->spas,
2169 acpi_desc->spas.prev);
2170 list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
2171 acpi_desc->memdevs.prev);
2172 list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
2173 acpi_desc->dcrs.prev);
2174 list_cut_position(&prev.bdws, &acpi_desc->bdws,
2175 acpi_desc->bdws.prev);
2176 list_cut_position(&prev.idts, &acpi_desc->idts,
2177 acpi_desc->idts.prev);
2178 list_cut_position(&prev.flushes, &acpi_desc->flushes,
2179 acpi_desc->flushes.prev);
b94d5230
DW		 2180
2181 data = (u8 *) acpi_desc->nfit;
2182 end = data + sz;
b94d5230 2183 while (!IS_ERR_OR_NULL(data))
20985164 2184 data = add_table(acpi_desc, &prev, data, end);
b94d5230
DW		 2185
2186 if (IS_ERR(data)) {
2187 dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
2188 PTR_ERR(data));
20985164
VV		 2189 rc = PTR_ERR(data);
2190 goto out_unlock;
b94d5230
DW		 2191 }
2192
20985164
VV		 2193 rc = acpi_nfit_check_deletions(acpi_desc, &prev);
2194 if (rc)
2195 goto out_unlock;
2196
2197 if (nfit_mem_init(acpi_desc) != 0) {
2198 rc = -ENOMEM;
2199 goto out_unlock;
2200 }
b94d5230 2201
62232e45
DW		 2202 acpi_nfit_init_dsms(acpi_desc);
2203
1f7df6f8
DW		 2204 rc = acpi_nfit_register_dimms(acpi_desc);
2205 if (rc)
20985164
VV		 2206 goto out_unlock;
2207
2208 rc = acpi_nfit_register_regions(acpi_desc);
1f7df6f8 2209
20985164
VV		 2210 out_unlock:
2211 mutex_unlock(&acpi_desc->init_mutex);
2212 return rc;
b94d5230 2213}
6bc75619 2214EXPORT_SYMBOL_GPL(acpi_nfit_init);
b94d5230 2215
7ae0fa43
DW		 2216struct acpi_nfit_flush_work {
2217 struct work_struct work;
2218 struct completion cmp;
2219};
2220
2221static void flush_probe(struct work_struct *work)
2222{
2223 struct acpi_nfit_flush_work *flush;
2224
2225 flush = container_of(work, typeof(*flush), work);
2226 complete(&flush->cmp);
2227}
2228
2229static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
2230{
2231 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2232 struct device *dev = acpi_desc->dev;
2233 struct acpi_nfit_flush_work flush;
2234
2235 /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
2236 device_lock(dev);
2237 device_unlock(dev);
2238
2239 /*
2240 * Scrub work could take 10s of seconds, userspace may give up so we
2241 * need to be interruptible while waiting.
2242 */
2243 INIT_WORK_ONSTACK(&flush.work, flush_probe);
2244 COMPLETION_INITIALIZER_ONSTACK(flush.cmp);
2245 queue_work(nfit_wq, &flush.work);
2246 return wait_for_completion_interruptible(&flush.cmp);
2247}
2248
87bf572e
DW		 2249static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
2250 struct nvdimm *nvdimm, unsigned int cmd)
2251{
2252 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
2253
2254 if (nvdimm)
2255 return 0;
2256 if (cmd != ND_CMD_ARS_START)
2257 return 0;
2258
2259 /*
2260 * The kernel and userspace may race to initiate a scrub, but
2261 * the scrub thread is prepared to lose that initial race. It
2262 * just needs guarantees that any ars it initiates are not
2263 * interrupted by any intervening start reqeusts from userspace.
2264 */
2265 if (work_busy(&acpi_desc->work))
2266 return -EBUSY;
2267
2268 return 0;
2269}
2270
a61fe6f7 2271void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
b94d5230
DW		 2272{
2273 struct nvdimm_bus_descriptor *nd_desc;
b94d5230
DW		 2274
2275 dev_set_drvdata(dev, acpi_desc);
2276 acpi_desc->dev = dev;
6bc75619 2277 acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
b94d5230
DW		 2278 nd_desc = &acpi_desc->nd_desc;
2279 nd_desc->provider_name = "ACPI.NFIT";
2280 nd_desc->ndctl = acpi_nfit_ctl;
7ae0fa43 2281 nd_desc->flush_probe = acpi_nfit_flush_probe;
87bf572e 2282 nd_desc->clear_to_send = acpi_nfit_clear_to_send;
45def22c 2283 nd_desc->attr_groups = acpi_nfit_attribute_groups;
b94d5230 2284
20985164
VV		 2285 INIT_LIST_HEAD(&acpi_desc->spa_maps);
2286 INIT_LIST_HEAD(&acpi_desc->spas);
2287 INIT_LIST_HEAD(&acpi_desc->dcrs);
2288 INIT_LIST_HEAD(&acpi_desc->bdws);
2289 INIT_LIST_HEAD(&acpi_desc->idts);
2290 INIT_LIST_HEAD(&acpi_desc->flushes);
2291 INIT_LIST_HEAD(&acpi_desc->memdevs);
2292 INIT_LIST_HEAD(&acpi_desc->dimms);
2293 mutex_init(&acpi_desc->spa_map_mutex);
2294 mutex_init(&acpi_desc->init_mutex);
1cf03c00 2295 INIT_WORK(&acpi_desc->work, acpi_nfit_scrub);
20985164 2296}
a61fe6f7 2297EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
20985164
VV		 2298
2299static int acpi_nfit_add(struct acpi_device *adev)
2300{
2301 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
2302 struct acpi_nfit_desc *acpi_desc;
2303 struct device *dev = &adev->dev;
2304 struct acpi_table_header *tbl;
2305 acpi_status status = AE_OK;
2306 acpi_size sz;
2307 int rc;
2308
2309 status = acpi_get_table_with_size("NFIT", 0, &tbl, &sz);
2310 if (ACPI_FAILURE(status)) {
2311 /* This is ok, we could have an nvdimm hotplugged later */
2312 dev_dbg(dev, "failed to find NFIT at startup\n");
2313 return 0;
2314 }
2315
a61fe6f7
DW		 2316 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2317 if (!acpi_desc)
2318 return -ENOMEM;
2319 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2320 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2321 if (!acpi_desc->nvdimm_bus)
2322 return -ENOMEM;
20985164 2323
6b577c9d
LK		 2324 /*
2325 * Save the acpi header for later and then skip it,
2326 * making nfit point to the first nfit table header.
2327 */
2328 acpi_desc->acpi_header = *tbl;
2329 acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit);
2330 sz -= sizeof(struct acpi_table_nfit);
20985164
VV		 2331
2332 /* Evaluate _FIT and override with that if present */
2333 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2334 if (ACPI_SUCCESS(status) && buf.length > 0) {
6b577c9d
LK		 2335 union acpi_object *obj;
2336 /*
2337 * Adjust for the acpi_object header of the _FIT
2338 */
2339 obj = buf.pointer;
2340 if (obj->type == ACPI_TYPE_BUFFER) {
2341 acpi_desc->nfit =
2342 (struct acpi_nfit_header *)obj->buffer.pointer;
2343 sz = obj->buffer.length;
2344 } else
2345 dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n",
2346 __func__, (int) obj->type);
20985164 2347 }
b94d5230
DW		 2348
2349 rc = acpi_nfit_init(acpi_desc, sz);
2350 if (rc) {
2351 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2352 return rc;
2353 }
2354 return 0;
2355}
2356
2357static int acpi_nfit_remove(struct acpi_device *adev)
2358{
2359 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2360
7ae0fa43
DW		 2361 acpi_desc->cancel = 1;
2362 flush_workqueue(nfit_wq);
b94d5230
DW		 2363 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
2364 return 0;
2365}
2366
20985164
VV		 2367static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
2368{
2369 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
2370 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
6b577c9d
LK		 2371 struct acpi_nfit_header *nfit_saved;
2372 union acpi_object *obj;
20985164
VV		 2373 struct device *dev = &adev->dev;
2374 acpi_status status;
2375 int ret;
2376
2377 dev_dbg(dev, "%s: event: %d\n", __func__, event);
2378
2379 device_lock(dev);
2380 if (!dev->driver) {
2381 /* dev->driver may be null if we're being removed */
2382 dev_dbg(dev, "%s: no driver found for dev\n", __func__);
d91e8928 2383 goto out_unlock;
20985164
VV		 2384 }
2385
2386 if (!acpi_desc) {
a61fe6f7
DW		 2387 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2388 if (!acpi_desc)
2389 goto out_unlock;
2390 acpi_nfit_desc_init(acpi_desc, &adev->dev);
2391 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc);
2392 if (!acpi_desc->nvdimm_bus)
20985164 2393 goto out_unlock;
7ae0fa43
DW		 2394 } else {
2395 /*
2396 * Finish previous registration before considering new
2397 * regions.
2398 */
2399 flush_workqueue(nfit_wq);
20985164
VV		 2400 }
2401
2402 /* Evaluate _FIT */
2403 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
2404 if (ACPI_FAILURE(status)) {
2405 dev_err(dev, "failed to evaluate _FIT\n");
2406 goto out_unlock;
2407 }
2408
2409 nfit_saved = acpi_desc->nfit;
6b577c9d
LK		 2410 obj = buf.pointer;
2411 if (obj->type == ACPI_TYPE_BUFFER) {
2412 acpi_desc->nfit =
2413 (struct acpi_nfit_header *)obj->buffer.pointer;
2414 ret = acpi_nfit_init(acpi_desc, obj->buffer.length);
2415 if (ret) {
2416 /* Merge failed, restore old nfit, and exit */
2417 acpi_desc->nfit = nfit_saved;
2418 dev_err(dev, "failed to merge updated NFIT\n");
2419 }
2420 } else {
2421 /* Bad _FIT, restore old nfit */
2422 dev_err(dev, "Invalid _FIT\n");
20985164
VV		 2423 }
2424 kfree(buf.pointer);
2425
2426 out_unlock:
2427 device_unlock(dev);
2428}
2429
b94d5230
DW		 2430static const struct acpi_device_id acpi_nfit_ids[] = {
2431 { "ACPI0012", 0 },
2432 { "", 0 },
2433};
2434MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
2435
2436static struct acpi_driver acpi_nfit_driver = {
2437 .name = KBUILD_MODNAME,
2438 .ids = acpi_nfit_ids,
2439 .ops = {
2440 .add = acpi_nfit_add,
2441 .remove = acpi_nfit_remove,
20985164 2442 .notify = acpi_nfit_notify,
b94d5230
DW		 2443 },
2444};
2445
2446static __init int nfit_init(void)
2447{
2448 BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
2449 BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
2450 BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
2451 BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
2452 BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
2453 BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
2454 BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
2455
2456 acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
2457 acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
2458 acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
2459 acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
2460 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
2461 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
2462 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
2463 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
2464 acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
2465 acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
2466
7ae0fa43
DW		 2467 nfit_wq = create_singlethread_workqueue("nfit");
2468 if (!nfit_wq)
2469 return -ENOMEM;
2470
b94d5230
DW		 2471 return acpi_bus_register_driver(&acpi_nfit_driver);
2472}
2473
2474static __exit void nfit_exit(void)
2475{
2476 acpi_bus_unregister_driver(&acpi_nfit_driver);
7ae0fa43 2477 destroy_workqueue(nfit_wq);
b94d5230
DW		 2478}
2479
2480module_init(nfit_init);
2481module_exit(nfit_exit);
2482MODULE_LICENSE("GPL v2");
2483MODULE_AUTHOR("Intel Corporation");
Linux kernel - Deliverables
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