Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $) | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or (at | |
12 | * your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
1da177e4 LT |
19 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/types.h> | |
d0020f65 | 26 | #include <linux/mutex.h> |
1da177e4 | 27 | #include <linux/pm.h> |
b67ea761 | 28 | #include <linux/pm_runtime.h> |
1da177e4 | 29 | #include <linux/pci.h> |
990a7ac5 | 30 | #include <linux/pci-acpi.h> |
eca67315 | 31 | #include <linux/pci-aspm.h> |
864b94ad | 32 | #include <linux/dmar.h> |
1da177e4 | 33 | #include <linux/acpi.h> |
5a0e3ad6 | 34 | #include <linux/slab.h> |
7bc5a2ba | 35 | #include <linux/dmi.h> |
8b48463f | 36 | #include <acpi/apei.h> /* for acpi_hest_init() */ |
1da177e4 | 37 | |
ace8238b RW |
38 | #include "internal.h" |
39 | ||
1da177e4 | 40 | #define _COMPONENT ACPI_PCI_COMPONENT |
f52fd66d | 41 | ACPI_MODULE_NAME("pci_root"); |
1da177e4 | 42 | #define ACPI_PCI_ROOT_CLASS "pci_bridge" |
1da177e4 | 43 | #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge" |
00c43b96 RW |
44 | static int acpi_pci_root_add(struct acpi_device *device, |
45 | const struct acpi_device_id *not_used); | |
46 | static void acpi_pci_root_remove(struct acpi_device *device); | |
1da177e4 | 47 | |
3338db00 RW |
48 | static int acpi_pci_root_scan_dependent(struct acpi_device *adev) |
49 | { | |
1f7c164b | 50 | acpiphp_check_host_bridge(adev); |
3338db00 RW |
51 | return 0; |
52 | } | |
53 | ||
7dab9ef4 BH |
54 | #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \ |
55 | | OSC_PCI_ASPM_SUPPORT \ | |
56 | | OSC_PCI_CLOCK_PM_SUPPORT \ | |
57 | | OSC_PCI_MSI_SUPPORT) | |
415e12b2 | 58 | |
c97adf9e | 59 | static const struct acpi_device_id root_device_ids[] = { |
1ba90e3a TR |
60 | {"PNP0A03", 0}, |
61 | {"", 0}, | |
62 | }; | |
1ba90e3a | 63 | |
00c43b96 | 64 | static struct acpi_scan_handler pci_root_handler = { |
1ba90e3a | 65 | .ids = root_device_ids, |
00c43b96 RW |
66 | .attach = acpi_pci_root_add, |
67 | .detach = acpi_pci_root_remove, | |
ca499fc8 | 68 | .hotplug = { |
3338db00 RW |
69 | .enabled = true, |
70 | .scan_dependent = acpi_pci_root_scan_dependent, | |
ca499fc8 | 71 | }, |
1da177e4 LT |
72 | }; |
73 | ||
63f10f0f | 74 | static DEFINE_MUTEX(osc_lock); |
1da177e4 | 75 | |
27558203 AC |
76 | /** |
77 | * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge | |
78 | * @handle - the ACPI CA node in question. | |
79 | * | |
80 | * Note: we could make this API take a struct acpi_device * instead, but | |
81 | * for now, it's more convenient to operate on an acpi_handle. | |
82 | */ | |
83 | int acpi_is_root_bridge(acpi_handle handle) | |
84 | { | |
85 | int ret; | |
86 | struct acpi_device *device; | |
87 | ||
88 | ret = acpi_bus_get_device(handle, &device); | |
89 | if (ret) | |
90 | return 0; | |
91 | ||
92 | ret = acpi_match_device_ids(device, root_device_ids); | |
93 | if (ret) | |
94 | return 0; | |
95 | else | |
96 | return 1; | |
97 | } | |
98 | EXPORT_SYMBOL_GPL(acpi_is_root_bridge); | |
99 | ||
1da177e4 | 100 | static acpi_status |
4be44fcd | 101 | get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data) |
1da177e4 | 102 | { |
6ad95513 | 103 | struct resource *res = data; |
1da177e4 | 104 | struct acpi_resource_address64 address; |
f6c1c8ff | 105 | acpi_status status; |
1da177e4 | 106 | |
f6c1c8ff BH |
107 | status = acpi_resource_to_address64(resource, &address); |
108 | if (ACPI_FAILURE(status)) | |
1da177e4 LT |
109 | return AE_OK; |
110 | ||
a45de93e | 111 | if ((address.address.address_length > 0) && |
6ad95513 | 112 | (address.resource_type == ACPI_BUS_NUMBER_RANGE)) { |
a45de93e LZ |
113 | res->start = address.address.minimum; |
114 | res->end = address.address.minimum + address.address.address_length - 1; | |
6ad95513 | 115 | } |
1da177e4 LT |
116 | |
117 | return AE_OK; | |
118 | } | |
119 | ||
f5eebbe1 | 120 | static acpi_status try_get_root_bridge_busnr(acpi_handle handle, |
6ad95513 | 121 | struct resource *res) |
1da177e4 LT |
122 | { |
123 | acpi_status status; | |
124 | ||
6ad95513 | 125 | res->start = -1; |
4be44fcd LB |
126 | status = |
127 | acpi_walk_resources(handle, METHOD_NAME__CRS, | |
6ad95513 | 128 | get_root_bridge_busnr_callback, res); |
1da177e4 LT |
129 | if (ACPI_FAILURE(status)) |
130 | return status; | |
6ad95513 | 131 | if (res->start == -1) |
1da177e4 LT |
132 | return AE_ERROR; |
133 | return AE_OK; | |
134 | } | |
135 | ||
955f14b4 BH |
136 | struct pci_osc_bit_struct { |
137 | u32 bit; | |
138 | char *desc; | |
139 | }; | |
140 | ||
141 | static struct pci_osc_bit_struct pci_osc_support_bit[] = { | |
142 | { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" }, | |
143 | { OSC_PCI_ASPM_SUPPORT, "ASPM" }, | |
144 | { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" }, | |
145 | { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" }, | |
146 | { OSC_PCI_MSI_SUPPORT, "MSI" }, | |
147 | }; | |
148 | ||
149 | static struct pci_osc_bit_struct pci_osc_control_bit[] = { | |
150 | { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" }, | |
151 | { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" }, | |
152 | { OSC_PCI_EXPRESS_PME_CONTROL, "PME" }, | |
153 | { OSC_PCI_EXPRESS_AER_CONTROL, "AER" }, | |
154 | { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" }, | |
155 | }; | |
156 | ||
157 | static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word, | |
158 | struct pci_osc_bit_struct *table, int size) | |
159 | { | |
160 | char buf[80]; | |
161 | int i, len = 0; | |
162 | struct pci_osc_bit_struct *entry; | |
163 | ||
164 | buf[0] = '\0'; | |
165 | for (i = 0, entry = table; i < size; i++, entry++) | |
166 | if (word & entry->bit) | |
167 | len += snprintf(buf + len, sizeof(buf) - len, "%s%s", | |
168 | len ? " " : "", entry->desc); | |
169 | ||
170 | dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf); | |
171 | } | |
172 | ||
173 | static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word) | |
174 | { | |
175 | decode_osc_bits(root, msg, word, pci_osc_support_bit, | |
176 | ARRAY_SIZE(pci_osc_support_bit)); | |
177 | } | |
178 | ||
179 | static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word) | |
180 | { | |
181 | decode_osc_bits(root, msg, word, pci_osc_control_bit, | |
182 | ARRAY_SIZE(pci_osc_control_bit)); | |
183 | } | |
184 | ||
3a9622dc | 185 | static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766"; |
63f10f0f KK |
186 | |
187 | static acpi_status acpi_pci_run_osc(acpi_handle handle, | |
188 | const u32 *capbuf, u32 *retval) | |
189 | { | |
3a9622dc SL |
190 | struct acpi_osc_context context = { |
191 | .uuid_str = pci_osc_uuid_str, | |
192 | .rev = 1, | |
193 | .cap.length = 12, | |
194 | .cap.pointer = (void *)capbuf, | |
195 | }; | |
63f10f0f | 196 | acpi_status status; |
63f10f0f | 197 | |
3a9622dc SL |
198 | status = acpi_run_osc(handle, &context); |
199 | if (ACPI_SUCCESS(status)) { | |
200 | *retval = *((u32 *)(context.ret.pointer + 8)); | |
201 | kfree(context.ret.pointer); | |
63f10f0f | 202 | } |
63f10f0f KK |
203 | return status; |
204 | } | |
205 | ||
ab8e8957 RW |
206 | static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root, |
207 | u32 support, | |
208 | u32 *control) | |
63f10f0f KK |
209 | { |
210 | acpi_status status; | |
ab8e8957 RW |
211 | u32 result, capbuf[3]; |
212 | ||
213 | support &= OSC_PCI_SUPPORT_MASKS; | |
214 | support |= root->osc_support_set; | |
63f10f0f | 215 | |
b938a229 BH |
216 | capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE; |
217 | capbuf[OSC_SUPPORT_DWORD] = support; | |
ab8e8957 RW |
218 | if (control) { |
219 | *control &= OSC_PCI_CONTROL_MASKS; | |
b938a229 | 220 | capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set; |
ab8e8957 | 221 | } else { |
545d6e18 | 222 | /* Run _OSC query only with existing controls. */ |
b938a229 | 223 | capbuf[OSC_CONTROL_DWORD] = root->osc_control_set; |
ab8e8957 | 224 | } |
63f10f0f KK |
225 | |
226 | status = acpi_pci_run_osc(root->device->handle, capbuf, &result); | |
227 | if (ACPI_SUCCESS(status)) { | |
ab8e8957 | 228 | root->osc_support_set = support; |
2b8fd918 | 229 | if (control) |
ab8e8957 | 230 | *control = result; |
63f10f0f KK |
231 | } |
232 | return status; | |
233 | } | |
234 | ||
235 | static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags) | |
236 | { | |
237 | acpi_status status; | |
63f10f0f | 238 | |
63f10f0f | 239 | mutex_lock(&osc_lock); |
ab8e8957 | 240 | status = acpi_pci_query_osc(root, flags, NULL); |
63f10f0f KK |
241 | mutex_unlock(&osc_lock); |
242 | return status; | |
243 | } | |
244 | ||
76d56de5 | 245 | struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle) |
63f10f0f KK |
246 | { |
247 | struct acpi_pci_root *root; | |
cd4faf9c | 248 | struct acpi_device *device; |
c1aec834 | 249 | |
cd4faf9c TI |
250 | if (acpi_bus_get_device(handle, &device) || |
251 | acpi_match_device_ids(device, root_device_ids)) | |
252 | return NULL; | |
253 | ||
254 | root = acpi_driver_data(device); | |
255 | ||
256 | return root; | |
63f10f0f | 257 | } |
76d56de5 | 258 | EXPORT_SYMBOL_GPL(acpi_pci_find_root); |
63f10f0f | 259 | |
2f7bbceb AC |
260 | struct acpi_handle_node { |
261 | struct list_head node; | |
262 | acpi_handle handle; | |
263 | }; | |
264 | ||
265 | /** | |
266 | * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev | |
267 | * @handle: the handle in question | |
268 | * | |
269 | * Given an ACPI CA handle, the desired PCI device is located in the | |
270 | * list of PCI devices. | |
271 | * | |
272 | * If the device is found, its reference count is increased and this | |
273 | * function returns a pointer to its data structure. The caller must | |
274 | * decrement the reference count by calling pci_dev_put(). | |
275 | * If no device is found, %NULL is returned. | |
276 | */ | |
277 | struct pci_dev *acpi_get_pci_dev(acpi_handle handle) | |
278 | { | |
279 | int dev, fn; | |
280 | unsigned long long adr; | |
281 | acpi_status status; | |
282 | acpi_handle phandle; | |
283 | struct pci_bus *pbus; | |
284 | struct pci_dev *pdev = NULL; | |
285 | struct acpi_handle_node *node, *tmp; | |
286 | struct acpi_pci_root *root; | |
287 | LIST_HEAD(device_list); | |
288 | ||
289 | /* | |
290 | * Walk up the ACPI CA namespace until we reach a PCI root bridge. | |
291 | */ | |
292 | phandle = handle; | |
293 | while (!acpi_is_root_bridge(phandle)) { | |
294 | node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL); | |
295 | if (!node) | |
296 | goto out; | |
297 | ||
298 | INIT_LIST_HEAD(&node->node); | |
299 | node->handle = phandle; | |
300 | list_add(&node->node, &device_list); | |
301 | ||
302 | status = acpi_get_parent(phandle, &phandle); | |
303 | if (ACPI_FAILURE(status)) | |
304 | goto out; | |
305 | } | |
306 | ||
307 | root = acpi_pci_find_root(phandle); | |
308 | if (!root) | |
309 | goto out; | |
310 | ||
311 | pbus = root->bus; | |
312 | ||
313 | /* | |
314 | * Now, walk back down the PCI device tree until we return to our | |
315 | * original handle. Assumes that everything between the PCI root | |
316 | * bridge and the device we're looking for must be a P2P bridge. | |
317 | */ | |
318 | list_for_each_entry(node, &device_list, node) { | |
319 | acpi_handle hnd = node->handle; | |
320 | status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr); | |
321 | if (ACPI_FAILURE(status)) | |
322 | goto out; | |
323 | dev = (adr >> 16) & 0xffff; | |
324 | fn = adr & 0xffff; | |
325 | ||
326 | pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn)); | |
412af978 | 327 | if (!pdev || hnd == handle) |
2f7bbceb AC |
328 | break; |
329 | ||
330 | pbus = pdev->subordinate; | |
331 | pci_dev_put(pdev); | |
497fb54f RW |
332 | |
333 | /* | |
334 | * This function may be called for a non-PCI device that has a | |
335 | * PCI parent (eg. a disk under a PCI SATA controller). In that | |
336 | * case pdev->subordinate will be NULL for the parent. | |
337 | */ | |
338 | if (!pbus) { | |
339 | dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n"); | |
340 | pdev = NULL; | |
341 | break; | |
342 | } | |
2f7bbceb AC |
343 | } |
344 | out: | |
345 | list_for_each_entry_safe(node, tmp, &device_list, node) | |
346 | kfree(node); | |
347 | ||
348 | return pdev; | |
349 | } | |
350 | EXPORT_SYMBOL_GPL(acpi_get_pci_dev); | |
351 | ||
63f10f0f | 352 | /** |
75fb60f2 RW |
353 | * acpi_pci_osc_control_set - Request control of PCI root _OSC features. |
354 | * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex). | |
355 | * @mask: Mask of _OSC bits to request control of, place to store control mask. | |
356 | * @req: Mask of _OSC bits the control of is essential to the caller. | |
63f10f0f | 357 | * |
75fb60f2 RW |
358 | * Run _OSC query for @mask and if that is successful, compare the returned |
359 | * mask of control bits with @req. If all of the @req bits are set in the | |
360 | * returned mask, run _OSC request for it. | |
361 | * | |
362 | * The variable at the @mask address may be modified regardless of whether or | |
363 | * not the function returns success. On success it will contain the mask of | |
364 | * _OSC bits the BIOS has granted control of, but its contents are meaningless | |
365 | * on failure. | |
63f10f0f | 366 | **/ |
75fb60f2 | 367 | acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req) |
63f10f0f | 368 | { |
75fb60f2 | 369 | struct acpi_pci_root *root; |
4ffe6e54 | 370 | acpi_status status = AE_OK; |
75fb60f2 | 371 | u32 ctrl, capbuf[3]; |
63f10f0f | 372 | |
75fb60f2 RW |
373 | if (!mask) |
374 | return AE_BAD_PARAMETER; | |
375 | ||
376 | ctrl = *mask & OSC_PCI_CONTROL_MASKS; | |
377 | if ((ctrl & req) != req) | |
63f10f0f KK |
378 | return AE_TYPE; |
379 | ||
380 | root = acpi_pci_find_root(handle); | |
381 | if (!root) | |
382 | return AE_NOT_EXIST; | |
383 | ||
384 | mutex_lock(&osc_lock); | |
75fb60f2 RW |
385 | |
386 | *mask = ctrl | root->osc_control_set; | |
63f10f0f | 387 | /* No need to evaluate _OSC if the control was already granted. */ |
75fb60f2 | 388 | if ((root->osc_control_set & ctrl) == ctrl) |
63f10f0f KK |
389 | goto out; |
390 | ||
75fb60f2 RW |
391 | /* Need to check the available controls bits before requesting them. */ |
392 | while (*mask) { | |
393 | status = acpi_pci_query_osc(root, root->osc_support_set, mask); | |
394 | if (ACPI_FAILURE(status)) | |
395 | goto out; | |
396 | if (ctrl == *mask) | |
397 | break; | |
955f14b4 BH |
398 | decode_osc_control(root, "platform does not support", |
399 | ctrl & ~(*mask)); | |
75fb60f2 RW |
400 | ctrl = *mask; |
401 | } | |
2b8fd918 | 402 | |
75fb60f2 | 403 | if ((ctrl & req) != req) { |
955f14b4 BH |
404 | decode_osc_control(root, "not requesting control; platform does not support", |
405 | req & ~(ctrl)); | |
63f10f0f KK |
406 | status = AE_SUPPORT; |
407 | goto out; | |
408 | } | |
409 | ||
b938a229 BH |
410 | capbuf[OSC_QUERY_DWORD] = 0; |
411 | capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set; | |
412 | capbuf[OSC_CONTROL_DWORD] = ctrl; | |
75fb60f2 | 413 | status = acpi_pci_run_osc(handle, capbuf, mask); |
63f10f0f | 414 | if (ACPI_SUCCESS(status)) |
75fb60f2 | 415 | root->osc_control_set = *mask; |
63f10f0f KK |
416 | out: |
417 | mutex_unlock(&osc_lock); | |
418 | return status; | |
419 | } | |
9f5404d8 | 420 | EXPORT_SYMBOL(acpi_pci_osc_control_set); |
63f10f0f | 421 | |
387d3757 | 422 | static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm) |
1da177e4 | 423 | { |
955f14b4 | 424 | u32 support, control, requested; |
3e43abb0 BH |
425 | acpi_status status; |
426 | struct acpi_device *device = root->device; | |
bfe2414a | 427 | acpi_handle handle = device->handle; |
1da177e4 | 428 | |
7bc5a2ba MG |
429 | /* |
430 | * Apple always return failure on _OSC calls when _OSI("Darwin") has | |
431 | * been called successfully. We know the feature set supported by the | |
432 | * platform, so avoid calling _OSC at all | |
433 | */ | |
434 | ||
435 | if (dmi_match(DMI_SYS_VENDOR, "Apple Inc.")) { | |
436 | root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL; | |
437 | decode_osc_control(root, "OS assumes control of", | |
438 | root->osc_control_set); | |
439 | return; | |
440 | } | |
441 | ||
2786f6e3 | 442 | /* |
990a7ac5 AP |
443 | * All supported architectures that use ACPI have support for |
444 | * PCI domains, so we indicate this in _OSC support capabilities. | |
2786f6e3 | 445 | */ |
65afe916 | 446 | support = OSC_PCI_SEGMENT_GROUPS_SUPPORT; |
8c33f51d | 447 | if (pci_ext_cfg_avail()) |
b8eb67fc | 448 | support |= OSC_PCI_EXT_CONFIG_SUPPORT; |
1b2a7be6 | 449 | if (pcie_aspm_support_enabled()) |
b8eb67fc | 450 | support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; |
07ae95f9 | 451 | if (pci_msi_enabled()) |
b8eb67fc | 452 | support |= OSC_PCI_MSI_SUPPORT; |
955f14b4 BH |
453 | |
454 | decode_osc_support(root, "OS supports", support); | |
1b2a7be6 BH |
455 | status = acpi_pci_osc_support(root, support); |
456 | if (ACPI_FAILURE(status)) { | |
65afe916 BH |
457 | dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", |
458 | acpi_format_exception(status)); | |
1b2a7be6 | 459 | *no_aspm = 1; |
65afe916 | 460 | return; |
2d9c8677 | 461 | } |
b8178f13 | 462 | |
43613a1f BH |
463 | if (pcie_ports_disabled) { |
464 | dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n"); | |
465 | return; | |
466 | } | |
467 | ||
de189662 | 468 | if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) { |
955f14b4 BH |
469 | decode_osc_support(root, "not requesting OS control; OS requires", |
470 | ACPI_PCIE_REQ_SUPPORT); | |
de189662 BH |
471 | return; |
472 | } | |
473 | ||
474 | control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL | |
475 | | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | |
476 | | OSC_PCI_EXPRESS_PME_CONTROL; | |
477 | ||
478 | if (pci_aer_available()) { | |
479 | if (aer_acpi_firmware_first()) | |
955f14b4 BH |
480 | dev_info(&device->dev, |
481 | "PCIe AER handled by firmware\n"); | |
de189662 BH |
482 | else |
483 | control |= OSC_PCI_EXPRESS_AER_CONTROL; | |
484 | } | |
415e12b2 | 485 | |
955f14b4 | 486 | requested = control; |
de189662 BH |
487 | status = acpi_pci_osc_control_set(handle, &control, |
488 | OSC_PCI_EXPRESS_CAPABILITY_CONTROL); | |
489 | if (ACPI_SUCCESS(status)) { | |
955f14b4 | 490 | decode_osc_control(root, "OS now controls", control); |
de189662 | 491 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
3dc48af3 | 492 | /* |
387d3757 MG |
493 | * We have ASPM control, but the FADT indicates that |
494 | * it's unsupported. Leave existing configuration | |
495 | * intact and prevent the OS from touching it. | |
3dc48af3 | 496 | */ |
387d3757 MG |
497 | dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n"); |
498 | *no_aspm = 1; | |
eca67315 | 499 | } |
a246670d | 500 | } else { |
955f14b4 BH |
501 | decode_osc_control(root, "OS requested", requested); |
502 | decode_osc_control(root, "platform willing to grant", control); | |
503 | dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", | |
504 | acpi_format_exception(status)); | |
505 | ||
de189662 BH |
506 | /* |
507 | * We want to disable ASPM here, but aspm_disabled | |
508 | * needs to remain in its state from boot so that we | |
509 | * properly handle PCIe 1.1 devices. So we set this | |
510 | * flag here, to defer the action until after the ACPI | |
511 | * root scan. | |
512 | */ | |
513 | *no_aspm = 1; | |
415e12b2 | 514 | } |
3e43abb0 BH |
515 | } |
516 | ||
00c43b96 RW |
517 | static int acpi_pci_root_add(struct acpi_device *device, |
518 | const struct acpi_device_id *not_used) | |
1da177e4 | 519 | { |
f5eebbe1 BH |
520 | unsigned long long segment, bus; |
521 | acpi_status status; | |
522 | int result; | |
523 | struct acpi_pci_root *root; | |
bfe2414a | 524 | acpi_handle handle = device->handle; |
387d3757 | 525 | int no_aspm = 0; |
864b94ad | 526 | bool hotadd = system_state != SYSTEM_BOOTING; |
1da177e4 | 527 | |
6ad95513 BH |
528 | root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL); |
529 | if (!root) | |
530 | return -ENOMEM; | |
531 | ||
f5eebbe1 | 532 | segment = 0; |
bfe2414a | 533 | status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, |
f5eebbe1 BH |
534 | &segment); |
535 | if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { | |
6dc7d22c | 536 | dev_err(&device->dev, "can't evaluate _SEG\n"); |
6ad95513 BH |
537 | result = -ENODEV; |
538 | goto end; | |
f5eebbe1 | 539 | } |
1da177e4 | 540 | |
f5eebbe1 | 541 | /* Check _CRS first, then _BBN. If no _BBN, default to zero. */ |
6ad95513 | 542 | root->secondary.flags = IORESOURCE_BUS; |
bfe2414a | 543 | status = try_get_root_bridge_busnr(handle, &root->secondary); |
f5eebbe1 | 544 | if (ACPI_FAILURE(status)) { |
6ad95513 BH |
545 | /* |
546 | * We need both the start and end of the downstream bus range | |
547 | * to interpret _CBA (MMCONFIG base address), so it really is | |
548 | * supposed to be in _CRS. If we don't find it there, all we | |
549 | * can do is assume [_BBN-0xFF] or [0-0xFF]. | |
550 | */ | |
551 | root->secondary.end = 0xFF; | |
6dc7d22c JL |
552 | dev_warn(&device->dev, |
553 | FW_BUG "no secondary bus range in _CRS\n"); | |
bfe2414a | 554 | status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, |
e545b55a | 555 | NULL, &bus); |
6ad95513 BH |
556 | if (ACPI_SUCCESS(status)) |
557 | root->secondary.start = bus; | |
558 | else if (status == AE_NOT_FOUND) | |
559 | root->secondary.start = 0; | |
560 | else { | |
6dc7d22c | 561 | dev_err(&device->dev, "can't evaluate _BBN\n"); |
6ad95513 BH |
562 | result = -ENODEV; |
563 | goto end; | |
f5eebbe1 BH |
564 | } |
565 | } | |
1da177e4 | 566 | |
32917e5b | 567 | root->device = device; |
0705495d | 568 | root->segment = segment & 0xFFFF; |
1da177e4 LT |
569 | strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME); |
570 | strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS); | |
db89b4f0 | 571 | device->driver_data = root; |
1da177e4 | 572 | |
864b94ad JL |
573 | if (hotadd && dmar_device_add(handle)) { |
574 | result = -ENXIO; | |
575 | goto end; | |
576 | } | |
577 | ||
6dc7d22c | 578 | pr_info(PREFIX "%s [%s] (domain %04x %pR)\n", |
4be44fcd | 579 | acpi_device_name(device), acpi_device_bid(device), |
6ad95513 | 580 | root->segment, &root->secondary); |
1da177e4 | 581 | |
bfe2414a | 582 | root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle); |
1da177e4 | 583 | |
387d3757 | 584 | negotiate_os_control(root, &no_aspm); |
415e12b2 | 585 | |
3dc48af3 NH |
586 | /* |
587 | * TBD: Need PCI interface for enumeration/configuration of roots. | |
588 | */ | |
589 | ||
590 | /* | |
591 | * Scan the Root Bridge | |
592 | * -------------------- | |
593 | * Must do this prior to any attempt to bind the root device, as the | |
594 | * PCI namespace does not get created until this call is made (and | |
595 | * thus the root bridge's pci_dev does not exist). | |
596 | */ | |
597 | root->bus = pci_acpi_scan_root(root); | |
598 | if (!root->bus) { | |
599 | dev_err(&device->dev, | |
600 | "Bus %04x:%02x not present in PCI namespace\n", | |
601 | root->segment, (unsigned int)root->secondary.start); | |
f516bde5 | 602 | device->driver_data = NULL; |
3dc48af3 | 603 | result = -ENODEV; |
864b94ad | 604 | goto remove_dmar; |
3dc48af3 NH |
605 | } |
606 | ||
3dc48af3 NH |
607 | if (no_aspm) |
608 | pcie_no_aspm(); | |
609 | ||
c072530f | 610 | pci_acpi_add_bus_pm_notifier(device); |
b67ea761 RW |
611 | if (device->wakeup.flags.run_wake) |
612 | device_set_run_wake(root->bus->bridge, true); | |
613 | ||
864b94ad | 614 | if (hotadd) { |
3c449ed0 | 615 | pcibios_resource_survey_bus(root->bus); |
39772038 | 616 | pci_assign_unassigned_root_bus_resources(root->bus); |
c183619b | 617 | acpi_ioapic_add(root); |
516ca223 | 618 | } |
62a08c5a | 619 | |
7a3bb55e | 620 | pci_lock_rescan_remove(); |
caf420c6 | 621 | pci_bus_add_devices(root->bus); |
7a3bb55e | 622 | pci_unlock_rescan_remove(); |
00c43b96 | 623 | return 1; |
47525cda | 624 | |
864b94ad JL |
625 | remove_dmar: |
626 | if (hotadd) | |
627 | dmar_device_remove(handle); | |
47525cda RW |
628 | end: |
629 | kfree(root); | |
630 | return result; | |
c431ada4 | 631 | } |
1da177e4 | 632 | |
00c43b96 | 633 | static void acpi_pci_root_remove(struct acpi_device *device) |
1da177e4 | 634 | { |
caf420c6 | 635 | struct acpi_pci_root *root = acpi_driver_data(device); |
c8e9afb1 | 636 | |
7a3bb55e RW |
637 | pci_lock_rescan_remove(); |
638 | ||
9738a1fd YL |
639 | pci_stop_root_bus(root->bus); |
640 | ||
c183619b JL |
641 | WARN_ON(acpi_ioapic_remove(root)); |
642 | ||
b67ea761 RW |
643 | device_set_run_wake(root->bus->bridge, false); |
644 | pci_acpi_remove_bus_pm_notifier(device); | |
645 | ||
9738a1fd YL |
646 | pci_remove_root_bus(root->bus); |
647 | ||
864b94ad JL |
648 | dmar_device_remove(device->handle); |
649 | ||
7a3bb55e RW |
650 | pci_unlock_rescan_remove(); |
651 | ||
1da177e4 | 652 | kfree(root); |
1da177e4 LT |
653 | } |
654 | ||
2c204383 JL |
655 | /* |
656 | * Following code to support acpi_pci_root_create() is copied from | |
657 | * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64 | |
658 | * and ARM64. | |
659 | */ | |
660 | static void acpi_pci_root_validate_resources(struct device *dev, | |
661 | struct list_head *resources, | |
662 | unsigned long type) | |
663 | { | |
664 | LIST_HEAD(list); | |
665 | struct resource *res1, *res2, *root = NULL; | |
666 | struct resource_entry *tmp, *entry, *entry2; | |
667 | ||
668 | BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0); | |
669 | root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource; | |
670 | ||
671 | list_splice_init(resources, &list); | |
672 | resource_list_for_each_entry_safe(entry, tmp, &list) { | |
673 | bool free = false; | |
674 | resource_size_t end; | |
675 | ||
676 | res1 = entry->res; | |
677 | if (!(res1->flags & type)) | |
678 | goto next; | |
679 | ||
680 | /* Exclude non-addressable range or non-addressable portion */ | |
681 | end = min(res1->end, root->end); | |
682 | if (end <= res1->start) { | |
683 | dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n", | |
684 | res1); | |
685 | free = true; | |
686 | goto next; | |
687 | } else if (res1->end != end) { | |
688 | dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n", | |
689 | res1, (unsigned long long)end + 1, | |
690 | (unsigned long long)res1->end); | |
691 | res1->end = end; | |
692 | } | |
693 | ||
694 | resource_list_for_each_entry(entry2, resources) { | |
695 | res2 = entry2->res; | |
696 | if (!(res2->flags & type)) | |
697 | continue; | |
698 | ||
699 | /* | |
700 | * I don't like throwing away windows because then | |
701 | * our resources no longer match the ACPI _CRS, but | |
702 | * the kernel resource tree doesn't allow overlaps. | |
703 | */ | |
704 | if (resource_overlaps(res1, res2)) { | |
705 | res2->start = min(res1->start, res2->start); | |
706 | res2->end = max(res1->end, res2->end); | |
707 | dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n", | |
708 | res2, res1); | |
709 | free = true; | |
710 | goto next; | |
711 | } | |
712 | } | |
713 | ||
714 | next: | |
715 | resource_list_del(entry); | |
716 | if (free) | |
717 | resource_list_free_entry(entry); | |
718 | else | |
719 | resource_list_add_tail(entry, resources); | |
720 | } | |
721 | } | |
722 | ||
723 | int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) | |
724 | { | |
725 | int ret; | |
726 | struct list_head *list = &info->resources; | |
727 | struct acpi_device *device = info->bridge; | |
728 | struct resource_entry *entry, *tmp; | |
729 | unsigned long flags; | |
730 | ||
731 | flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT; | |
732 | ret = acpi_dev_get_resources(device, list, | |
733 | acpi_dev_filter_resource_type_cb, | |
734 | (void *)flags); | |
735 | if (ret < 0) | |
736 | dev_warn(&device->dev, | |
737 | "failed to parse _CRS method, error code %d\n", ret); | |
738 | else if (ret == 0) | |
739 | dev_dbg(&device->dev, | |
740 | "no IO and memory resources present in _CRS\n"); | |
741 | else { | |
742 | resource_list_for_each_entry_safe(entry, tmp, list) { | |
743 | if (entry->res->flags & IORESOURCE_DISABLED) | |
744 | resource_list_destroy_entry(entry); | |
745 | else | |
746 | entry->res->name = info->name; | |
747 | } | |
748 | acpi_pci_root_validate_resources(&device->dev, list, | |
749 | IORESOURCE_MEM); | |
750 | acpi_pci_root_validate_resources(&device->dev, list, | |
751 | IORESOURCE_IO); | |
752 | } | |
753 | ||
754 | return ret; | |
755 | } | |
756 | ||
757 | static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info) | |
758 | { | |
759 | struct resource_entry *entry, *tmp; | |
760 | struct resource *res, *conflict, *root = NULL; | |
761 | ||
762 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
763 | res = entry->res; | |
764 | if (res->flags & IORESOURCE_MEM) | |
765 | root = &iomem_resource; | |
766 | else if (res->flags & IORESOURCE_IO) | |
767 | root = &ioport_resource; | |
768 | else | |
769 | continue; | |
770 | ||
727ae8be LJ |
771 | /* |
772 | * Some legacy x86 host bridge drivers use iomem_resource and | |
773 | * ioport_resource as default resource pool, skip it. | |
774 | */ | |
775 | if (res == root) | |
776 | continue; | |
777 | ||
2c204383 JL |
778 | conflict = insert_resource_conflict(root, res); |
779 | if (conflict) { | |
780 | dev_info(&info->bridge->dev, | |
781 | "ignoring host bridge window %pR (conflicts with %s %pR)\n", | |
782 | res, conflict->name, conflict); | |
783 | resource_list_destroy_entry(entry); | |
784 | } | |
785 | } | |
786 | } | |
787 | ||
788 | static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info) | |
789 | { | |
790 | struct resource *res; | |
791 | struct resource_entry *entry, *tmp; | |
792 | ||
793 | if (!info) | |
794 | return; | |
795 | ||
796 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
797 | res = entry->res; | |
798 | if (res->parent && | |
799 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
800 | release_resource(res); | |
801 | resource_list_destroy_entry(entry); | |
802 | } | |
803 | ||
804 | info->ops->release_info(info); | |
805 | } | |
806 | ||
807 | static void acpi_pci_root_release_info(struct pci_host_bridge *bridge) | |
808 | { | |
809 | struct resource *res; | |
810 | struct resource_entry *entry; | |
811 | ||
812 | resource_list_for_each_entry(entry, &bridge->windows) { | |
813 | res = entry->res; | |
814 | if (res->parent && | |
815 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
816 | release_resource(res); | |
817 | } | |
818 | __acpi_pci_root_release_info(bridge->release_data); | |
819 | } | |
820 | ||
821 | struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, | |
822 | struct acpi_pci_root_ops *ops, | |
823 | struct acpi_pci_root_info *info, | |
824 | void *sysdata) | |
825 | { | |
826 | int ret, busnum = root->secondary.start; | |
827 | struct acpi_device *device = root->device; | |
828 | int node = acpi_get_node(device->handle); | |
829 | struct pci_bus *bus; | |
830 | ||
831 | info->root = root; | |
832 | info->bridge = device; | |
833 | info->ops = ops; | |
834 | INIT_LIST_HEAD(&info->resources); | |
835 | snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x", | |
836 | root->segment, busnum); | |
837 | ||
838 | if (ops->init_info && ops->init_info(info)) | |
839 | goto out_release_info; | |
840 | if (ops->prepare_resources) | |
841 | ret = ops->prepare_resources(info); | |
842 | else | |
843 | ret = acpi_pci_probe_root_resources(info); | |
844 | if (ret < 0) | |
845 | goto out_release_info; | |
846 | ||
847 | pci_acpi_root_add_resources(info); | |
848 | pci_add_resource(&info->resources, &root->secondary); | |
849 | bus = pci_create_root_bus(NULL, busnum, ops->pci_ops, | |
850 | sysdata, &info->resources); | |
851 | if (!bus) | |
852 | goto out_release_info; | |
853 | ||
854 | pci_scan_child_bus(bus); | |
855 | pci_set_host_bridge_release(to_pci_host_bridge(bus->bridge), | |
856 | acpi_pci_root_release_info, info); | |
857 | if (node != NUMA_NO_NODE) | |
858 | dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node); | |
859 | return bus; | |
860 | ||
861 | out_release_info: | |
862 | __acpi_pci_root_release_info(info); | |
863 | return NULL; | |
864 | } | |
865 | ||
00c43b96 | 866 | void __init acpi_pci_root_init(void) |
1da177e4 | 867 | { |
d3072e6a | 868 | acpi_hest_init(); |
3338db00 | 869 | if (acpi_pci_disabled) |
668192b6 | 870 | return; |
668192b6 | 871 | |
3338db00 RW |
872 | pci_acpi_crs_quirks(); |
873 | acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root"); | |
668192b6 | 874 | } |