Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
1da177e4 LT |
24 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
25 | */ | |
26 | ||
1da177e4 | 27 | #include <linux/module.h> |
1da177e4 LT |
28 | #include <linux/acpi.h> |
29 | #include <linux/dmi.h> | |
e2668fb5 | 30 | #include <linux/sched.h> /* need_resched() */ |
ee41eebf | 31 | #include <linux/tick.h> |
4f86d3a8 | 32 | #include <linux/cpuidle.h> |
0a3b15ac | 33 | #include <linux/syscore_ops.h> |
8b48463f | 34 | #include <acpi/processor.h> |
1da177e4 | 35 | |
3434933b TG |
36 | /* |
37 | * Include the apic definitions for x86 to have the APIC timer related defines | |
38 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
39 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
40 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
41 | */ | |
42 | #ifdef CONFIG_X86 | |
43 | #include <asm/apic.h> | |
44 | #endif | |
45 | ||
a192a958 LB |
46 | #define PREFIX "ACPI: " |
47 | ||
1da177e4 | 48 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 49 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 50 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 51 | |
4f86d3a8 LB |
52 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
53 | module_param(max_cstate, uint, 0000); | |
b6835052 | 54 | static unsigned int nocst __read_mostly; |
1da177e4 | 55 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
56 | static int bm_check_disable __read_mostly; |
57 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 58 | |
25de5718 | 59 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 60 | module_param(latency_factor, uint, 0644); |
1da177e4 | 61 | |
3d339dcb DL |
62 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
63 | ||
6240a10d AS |
64 | static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], |
65 | acpi_cstate); | |
ac3ebafa | 66 | |
d1896049 TR |
67 | static int disabled_by_idle_boot_param(void) |
68 | { | |
69 | return boot_option_idle_override == IDLE_POLL || | |
d1896049 TR |
70 | boot_option_idle_override == IDLE_HALT; |
71 | } | |
72 | ||
1da177e4 LT |
73 | /* |
74 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
75 | * For now disable this. Probably a bug somewhere else. | |
76 | * | |
77 | * To skip this limit, boot/load with a large max_cstate limit. | |
78 | */ | |
1855256c | 79 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
80 | { |
81 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
82 | return 0; | |
83 | ||
3d35600a | 84 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
85 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
86 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 87 | |
3d35600a | 88 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
89 | |
90 | return 0; | |
91 | } | |
92 | ||
b0346688 | 93 | static const struct dmi_system_id processor_power_dmi_table[] = { |
876c184b TR |
94 | { set_max_cstate, "Clevo 5600D", { |
95 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
96 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 97 | (void *)2}, |
370d5cd8 AV |
98 | { set_max_cstate, "Pavilion zv5000", { |
99 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
100 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
101 | (void *)1}, | |
102 | { set_max_cstate, "Asus L8400B", { | |
103 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
104 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
105 | (void *)1}, | |
1da177e4 LT |
106 | {}, |
107 | }; | |
108 | ||
4f86d3a8 | 109 | |
2e906655 | 110 | /* |
111 | * Callers should disable interrupts before the call and enable | |
112 | * interrupts after return. | |
113 | */ | |
ddc081a1 VP |
114 | static void acpi_safe_halt(void) |
115 | { | |
ea811747 | 116 | if (!tif_need_resched()) { |
ddc081a1 | 117 | safe_halt(); |
71e93d15 VP |
118 | local_irq_disable(); |
119 | } | |
ddc081a1 VP |
120 | } |
121 | ||
169a0abb TG |
122 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
123 | ||
124 | /* | |
125 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
126 | * This seems to be a common problem on AMD boxen, but other vendors |
127 | * are affected too. We pick the most conservative approach: we assume | |
128 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 129 | */ |
7e275cc4 | 130 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
131 | struct acpi_processor_cx *cx) |
132 | { | |
133 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 134 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 135 | |
db954b58 VP |
136 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
137 | return; | |
138 | ||
02c68a02 | 139 | if (amd_e400_c1e_detected) |
87ad57ba SL |
140 | type = ACPI_STATE_C1; |
141 | ||
169a0abb TG |
142 | /* |
143 | * Check, if one of the previous states already marked the lapic | |
144 | * unstable | |
145 | */ | |
146 | if (pwr->timer_broadcast_on_state < state) | |
147 | return; | |
148 | ||
e585bef8 | 149 | if (cx->type >= type) |
296d93cd | 150 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
151 | } |
152 | ||
918aae42 | 153 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 154 | { |
f833bab8 | 155 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 | 156 | |
ee41eebf TG |
157 | if (pr->power.timer_broadcast_on_state < INT_MAX) |
158 | tick_broadcast_enable(); | |
159 | else | |
160 | tick_broadcast_disable(); | |
e9e2cdb4 TG |
161 | } |
162 | ||
918aae42 HS |
163 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
164 | { | |
165 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
166 | (void *)pr, 1); | |
167 | } | |
168 | ||
e9e2cdb4 | 169 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 170 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
171 | struct acpi_processor_cx *cx, |
172 | int broadcast) | |
173 | { | |
e9e2cdb4 TG |
174 | int state = cx - pr->power.states; |
175 | ||
176 | if (state >= pr->power.timer_broadcast_on_state) { | |
7815701c TG |
177 | if (broadcast) |
178 | tick_broadcast_enter(); | |
179 | else | |
180 | tick_broadcast_exit(); | |
e9e2cdb4 | 181 | } |
169a0abb TG |
182 | } |
183 | ||
184 | #else | |
185 | ||
7e275cc4 | 186 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 187 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
188 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
189 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
190 | struct acpi_processor_cx *cx, |
191 | int broadcast) | |
192 | { | |
193 | } | |
169a0abb TG |
194 | |
195 | #endif | |
196 | ||
0a3b15ac | 197 | #ifdef CONFIG_PM_SLEEP |
815ab0fd LB |
198 | static u32 saved_bm_rld; |
199 | ||
95d45d4c | 200 | static int acpi_processor_suspend(void) |
815ab0fd LB |
201 | { |
202 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); | |
0a3b15ac | 203 | return 0; |
815ab0fd | 204 | } |
0a3b15ac | 205 | |
95d45d4c | 206 | static void acpi_processor_resume(void) |
815ab0fd | 207 | { |
43575faa | 208 | u32 resumed_bm_rld = 0; |
815ab0fd LB |
209 | |
210 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); | |
0a3b15ac RW |
211 | if (resumed_bm_rld == saved_bm_rld) |
212 | return; | |
815ab0fd | 213 | |
0a3b15ac | 214 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); |
815ab0fd | 215 | } |
b04e7bdb | 216 | |
0a3b15ac RW |
217 | static struct syscore_ops acpi_processor_syscore_ops = { |
218 | .suspend = acpi_processor_suspend, | |
219 | .resume = acpi_processor_resume, | |
220 | }; | |
221 | ||
222 | void acpi_processor_syscore_init(void) | |
b04e7bdb | 223 | { |
0a3b15ac | 224 | register_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb TG |
225 | } |
226 | ||
0a3b15ac | 227 | void acpi_processor_syscore_exit(void) |
b04e7bdb | 228 | { |
0a3b15ac | 229 | unregister_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb | 230 | } |
0a3b15ac | 231 | #endif /* CONFIG_PM_SLEEP */ |
b04e7bdb | 232 | |
592913ec | 233 | #if defined(CONFIG_X86) |
520daf72 | 234 | static void tsc_check_state(int state) |
ddb25f9a AK |
235 | { |
236 | switch (boot_cpu_data.x86_vendor) { | |
237 | case X86_VENDOR_AMD: | |
40fb1715 | 238 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
239 | /* |
240 | * AMD Fam10h TSC will tick in all | |
241 | * C/P/S0/S1 states when this bit is set. | |
242 | */ | |
40fb1715 | 243 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 244 | return; |
40fb1715 | 245 | |
ddb25f9a | 246 | /*FALL THROUGH*/ |
ddb25f9a | 247 | default: |
520daf72 LB |
248 | /* TSC could halt in idle, so notify users */ |
249 | if (state > ACPI_STATE_C1) | |
250 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
251 | } |
252 | } | |
520daf72 LB |
253 | #else |
254 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
255 | #endif |
256 | ||
4be44fcd | 257 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 258 | { |
1da177e4 | 259 | |
1da177e4 | 260 | if (!pr->pblk) |
d550d98d | 261 | return -ENODEV; |
1da177e4 | 262 | |
1da177e4 | 263 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
264 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
265 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
266 | ||
4c033552 VP |
267 | #ifndef CONFIG_HOTPLUG_CPU |
268 | /* | |
269 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 270 | * an SMP system. |
4c033552 | 271 | */ |
ad71860a | 272 | if ((num_online_cpus() > 1) && |
cee324b1 | 273 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 274 | return -ENODEV; |
4c033552 VP |
275 | #endif |
276 | ||
1da177e4 LT |
277 | /* determine C2 and C3 address from pblk */ |
278 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
279 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
280 | ||
281 | /* determine latencies from FADT */ | |
ba494bee BM |
282 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
283 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 284 | |
5d76b6f6 LB |
285 | /* |
286 | * FADT specified C2 latency must be less than or equal to | |
287 | * 100 microseconds. | |
288 | */ | |
ba494bee | 289 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 290 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 291 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
292 | /* invalidate C2 */ |
293 | pr->power.states[ACPI_STATE_C2].address = 0; | |
294 | } | |
295 | ||
a6d72c18 LB |
296 | /* |
297 | * FADT supplied C3 latency must be less than or equal to | |
298 | * 1000 microseconds. | |
299 | */ | |
ba494bee | 300 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 301 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 302 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
303 | /* invalidate C3 */ |
304 | pr->power.states[ACPI_STATE_C3].address = 0; | |
305 | } | |
306 | ||
1da177e4 LT |
307 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
308 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
309 | pr->power.states[ACPI_STATE_C2].address, | |
310 | pr->power.states[ACPI_STATE_C3].address)); | |
311 | ||
d550d98d | 312 | return 0; |
1da177e4 LT |
313 | } |
314 | ||
991528d7 | 315 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 316 | { |
991528d7 VP |
317 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
318 | /* set the first C-State to C1 */ | |
319 | /* all processors need to support C1 */ | |
320 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
321 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 322 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
323 | } |
324 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 325 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 326 | return 0; |
acf05f4b VP |
327 | } |
328 | ||
4be44fcd | 329 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 330 | { |
6fd8050a | 331 | acpi_status status; |
439913ff | 332 | u64 count; |
cf824788 | 333 | int current_count; |
6fd8050a | 334 | int i, ret = 0; |
4be44fcd LB |
335 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
336 | union acpi_object *cst; | |
1da177e4 | 337 | |
1da177e4 | 338 | |
1da177e4 | 339 | if (nocst) |
d550d98d | 340 | return -ENODEV; |
1da177e4 | 341 | |
991528d7 | 342 | current_count = 0; |
1da177e4 LT |
343 | |
344 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
345 | if (ACPI_FAILURE(status)) { | |
346 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 347 | return -ENODEV; |
4be44fcd | 348 | } |
1da177e4 | 349 | |
50dd0969 | 350 | cst = buffer.pointer; |
1da177e4 LT |
351 | |
352 | /* There must be at least 2 elements */ | |
353 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 354 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
6fd8050a | 355 | ret = -EFAULT; |
1da177e4 LT |
356 | goto end; |
357 | } | |
358 | ||
359 | count = cst->package.elements[0].integer.value; | |
360 | ||
361 | /* Validate number of power states. */ | |
362 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 363 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
6fd8050a | 364 | ret = -EFAULT; |
1da177e4 LT |
365 | goto end; |
366 | } | |
367 | ||
1da177e4 LT |
368 | /* Tell driver that at least _CST is supported. */ |
369 | pr->flags.has_cst = 1; | |
370 | ||
371 | for (i = 1; i <= count; i++) { | |
372 | union acpi_object *element; | |
373 | union acpi_object *obj; | |
374 | struct acpi_power_register *reg; | |
375 | struct acpi_processor_cx cx; | |
376 | ||
377 | memset(&cx, 0, sizeof(cx)); | |
378 | ||
50dd0969 | 379 | element = &(cst->package.elements[i]); |
1da177e4 LT |
380 | if (element->type != ACPI_TYPE_PACKAGE) |
381 | continue; | |
382 | ||
383 | if (element->package.count != 4) | |
384 | continue; | |
385 | ||
50dd0969 | 386 | obj = &(element->package.elements[0]); |
1da177e4 LT |
387 | |
388 | if (obj->type != ACPI_TYPE_BUFFER) | |
389 | continue; | |
390 | ||
4be44fcd | 391 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
392 | |
393 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 394 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
395 | continue; |
396 | ||
1da177e4 | 397 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 398 | obj = &(element->package.elements[1]); |
1da177e4 LT |
399 | if (obj->type != ACPI_TYPE_INTEGER) |
400 | continue; | |
401 | ||
402 | cx.type = obj->integer.value; | |
991528d7 VP |
403 | /* |
404 | * Some buggy BIOSes won't list C1 in _CST - | |
405 | * Let acpi_processor_get_power_info_default() handle them later | |
406 | */ | |
407 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
408 | current_count++; | |
409 | ||
410 | cx.address = reg->address; | |
411 | cx.index = current_count + 1; | |
412 | ||
bc71bec9 | 413 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
414 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
415 | if (acpi_processor_ffh_cstate_probe | |
416 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 417 | cx.entry_method = ACPI_CSTATE_FFH; |
418 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
419 | /* |
420 | * C1 is a special case where FIXED_HARDWARE | |
421 | * can be handled in non-MWAIT way as well. | |
422 | * In that case, save this _CST entry info. | |
991528d7 VP |
423 | * Otherwise, ignore this info and continue. |
424 | */ | |
bc71bec9 | 425 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 426 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 427 | } else { |
991528d7 VP |
428 | continue; |
429 | } | |
da5e09a1 | 430 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 431 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
432 | /* |
433 | * In most cases the C1 space_id obtained from | |
434 | * _CST object is FIXED_HARDWARE access mode. | |
435 | * But when the option of idle=halt is added, | |
436 | * the entry_method type should be changed from | |
437 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
438 | * When the option of idle=nomwait is added, |
439 | * the C1 entry_method type should be | |
440 | * CSTATE_HALT. | |
c1e3b377 ZY |
441 | */ |
442 | cx.entry_method = ACPI_CSTATE_HALT; | |
443 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
444 | } | |
4fcb2fcd VP |
445 | } else { |
446 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
447 | cx.address); | |
991528d7 | 448 | } |
1da177e4 | 449 | |
0fda6b40 VP |
450 | if (cx.type == ACPI_STATE_C1) { |
451 | cx.valid = 1; | |
452 | } | |
4fcb2fcd | 453 | |
50dd0969 | 454 | obj = &(element->package.elements[2]); |
1da177e4 LT |
455 | if (obj->type != ACPI_TYPE_INTEGER) |
456 | continue; | |
457 | ||
458 | cx.latency = obj->integer.value; | |
459 | ||
50dd0969 | 460 | obj = &(element->package.elements[3]); |
1da177e4 LT |
461 | if (obj->type != ACPI_TYPE_INTEGER) |
462 | continue; | |
463 | ||
cf824788 JM |
464 | current_count++; |
465 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
466 | ||
467 | /* | |
468 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
469 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
470 | */ | |
471 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
472 | printk(KERN_WARNING | |
473 | "Limiting number of power states to max (%d)\n", | |
474 | ACPI_PROCESSOR_MAX_POWER); | |
475 | printk(KERN_WARNING | |
476 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
477 | break; | |
478 | } | |
1da177e4 LT |
479 | } |
480 | ||
4be44fcd | 481 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 482 | current_count)); |
1da177e4 LT |
483 | |
484 | /* Validate number of power states discovered */ | |
cf824788 | 485 | if (current_count < 2) |
6fd8050a | 486 | ret = -EFAULT; |
1da177e4 | 487 | |
4be44fcd | 488 | end: |
02438d87 | 489 | kfree(buffer.pointer); |
1da177e4 | 490 | |
6fd8050a | 491 | return ret; |
1da177e4 LT |
492 | } |
493 | ||
4be44fcd LB |
494 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
495 | struct acpi_processor_cx *cx) | |
1da177e4 | 496 | { |
ee1ca48f PV |
497 | static int bm_check_flag = -1; |
498 | static int bm_control_flag = -1; | |
02df8b93 | 499 | |
1da177e4 LT |
500 | |
501 | if (!cx->address) | |
d550d98d | 502 | return; |
1da177e4 | 503 | |
1da177e4 LT |
504 | /* |
505 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
506 | * DMA transfers are used by any ISA device to avoid livelock. | |
507 | * Note that we could disable Type-F DMA (as recommended by | |
508 | * the erratum), but this is known to disrupt certain ISA | |
509 | * devices thus we take the conservative approach. | |
510 | */ | |
511 | else if (errata.piix4.fdma) { | |
512 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 513 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 514 | return; |
1da177e4 LT |
515 | } |
516 | ||
02df8b93 | 517 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 518 | if (bm_check_flag == -1) { |
02df8b93 VP |
519 | /* Determine whether bm_check is needed based on CPU */ |
520 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
521 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 522 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
523 | } else { |
524 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 525 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
526 | } |
527 | ||
528 | if (pr->flags.bm_check) { | |
02df8b93 | 529 | if (!pr->flags.bm_control) { |
ed3110ef VP |
530 | if (pr->flags.has_cst != 1) { |
531 | /* bus mastering control is necessary */ | |
532 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
533 | "C3 support requires BM control\n")); | |
534 | return; | |
535 | } else { | |
536 | /* Here we enter C3 without bus mastering */ | |
537 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
538 | "C3 support without BM control\n")); | |
539 | } | |
02df8b93 VP |
540 | } |
541 | } else { | |
02df8b93 VP |
542 | /* |
543 | * WBINVD should be set in fadt, for C3 state to be | |
544 | * supported on when bm_check is not required. | |
545 | */ | |
cee324b1 | 546 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 547 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
548 | "Cache invalidation should work properly" |
549 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 550 | return; |
02df8b93 | 551 | } |
02df8b93 VP |
552 | } |
553 | ||
1da177e4 LT |
554 | /* |
555 | * Otherwise we've met all of our C3 requirements. | |
556 | * Normalize the C3 latency to expidite policy. Enable | |
557 | * checking of bus mastering status (bm_check) so we can | |
558 | * use this in our C3 policy | |
559 | */ | |
560 | cx->valid = 1; | |
4f86d3a8 | 561 | |
31878dd8 LB |
562 | /* |
563 | * On older chipsets, BM_RLD needs to be set | |
564 | * in order for Bus Master activity to wake the | |
565 | * system from C3. Newer chipsets handle DMA | |
566 | * during C3 automatically and BM_RLD is a NOP. | |
567 | * In either case, the proper way to | |
568 | * handle BM_RLD is to set it and leave it set. | |
569 | */ | |
50ffba1b | 570 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 571 | |
d550d98d | 572 | return; |
1da177e4 LT |
573 | } |
574 | ||
1da177e4 LT |
575 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
576 | { | |
577 | unsigned int i; | |
578 | unsigned int working = 0; | |
6eb0a0fd | 579 | |
169a0abb | 580 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 581 | |
a0bf284b | 582 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
583 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
584 | ||
585 | switch (cx->type) { | |
586 | case ACPI_STATE_C1: | |
587 | cx->valid = 1; | |
588 | break; | |
589 | ||
590 | case ACPI_STATE_C2: | |
d22edd29 LB |
591 | if (!cx->address) |
592 | break; | |
cad1525a | 593 | cx->valid = 1; |
1da177e4 LT |
594 | break; |
595 | ||
596 | case ACPI_STATE_C3: | |
597 | acpi_processor_power_verify_c3(pr, cx); | |
598 | break; | |
599 | } | |
7e275cc4 LB |
600 | if (!cx->valid) |
601 | continue; | |
1da177e4 | 602 | |
7e275cc4 LB |
603 | lapic_timer_check_state(i, pr, cx); |
604 | tsc_check_state(cx->type); | |
605 | working++; | |
1da177e4 | 606 | } |
bd663347 | 607 | |
918aae42 | 608 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
609 | |
610 | return (working); | |
611 | } | |
612 | ||
4be44fcd | 613 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
614 | { |
615 | unsigned int i; | |
616 | int result; | |
617 | ||
1da177e4 LT |
618 | |
619 | /* NOTE: the idle thread may not be running while calling | |
620 | * this function */ | |
621 | ||
991528d7 VP |
622 | /* Zero initialize all the C-states info. */ |
623 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
624 | ||
1da177e4 | 625 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 626 | if (result == -ENODEV) |
c5a114f1 | 627 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 628 | |
991528d7 VP |
629 | if (result) |
630 | return result; | |
631 | ||
632 | acpi_processor_get_power_info_default(pr); | |
633 | ||
cf824788 | 634 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 635 | |
1da177e4 LT |
636 | /* |
637 | * if one state of type C2 or C3 is available, mark this | |
638 | * CPU as being "idle manageable" | |
639 | */ | |
640 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 641 | if (pr->power.states[i].valid) { |
1da177e4 | 642 | pr->power.count = i; |
2203d6ed LT |
643 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
644 | pr->flags.power = 1; | |
acf05f4b | 645 | } |
1da177e4 LT |
646 | } |
647 | ||
d550d98d | 648 | return 0; |
1da177e4 LT |
649 | } |
650 | ||
4f86d3a8 LB |
651 | /** |
652 | * acpi_idle_bm_check - checks if bus master activity was detected | |
653 | */ | |
654 | static int acpi_idle_bm_check(void) | |
655 | { | |
656 | u32 bm_status = 0; | |
657 | ||
d3e7e99f LB |
658 | if (bm_check_disable) |
659 | return 0; | |
660 | ||
50ffba1b | 661 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 662 | if (bm_status) |
50ffba1b | 663 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
664 | /* |
665 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
666 | * the true state of bus mastering activity; forcing us to | |
667 | * manually check the BMIDEA bit of each IDE channel. | |
668 | */ | |
669 | else if (errata.piix4.bmisx) { | |
670 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
671 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
672 | bm_status = 1; | |
673 | } | |
674 | return bm_status; | |
675 | } | |
676 | ||
4f86d3a8 | 677 | /** |
b00783fd | 678 | * acpi_idle_do_entry - enter idle state using the appropriate method |
4f86d3a8 | 679 | * @cx: cstate data |
bc71bec9 | 680 | * |
681 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 | 682 | */ |
b00783fd | 683 | static void acpi_idle_do_entry(struct acpi_processor_cx *cx) |
4f86d3a8 | 684 | { |
bc71bec9 | 685 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
686 | /* Call into architectural FFH based C-state */ |
687 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 688 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
689 | acpi_safe_halt(); | |
4f86d3a8 | 690 | } else { |
4f86d3a8 LB |
691 | /* IO port based C-state */ |
692 | inb(cx->address); | |
693 | /* Dummy wait op - must do something useless after P_LVL2 read | |
694 | because chipsets cannot guarantee that STPCLK# signal | |
695 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 696 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 LB |
697 | } |
698 | } | |
699 | ||
1a022e3f BO |
700 | /** |
701 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
702 | * @dev: the target CPU | |
703 | * @index: the index of suggested state | |
704 | */ | |
705 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
706 | { | |
6240a10d | 707 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
1a022e3f BO |
708 | |
709 | ACPI_FLUSH_CPU_CACHE(); | |
710 | ||
711 | while (1) { | |
712 | ||
713 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 714 | safe_halt(); |
1a022e3f BO |
715 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
716 | inb(cx->address); | |
717 | /* See comment in acpi_idle_do_entry() */ | |
718 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
719 | } else | |
720 | return -ENODEV; | |
721 | } | |
722 | ||
723 | /* Never reached */ | |
724 | return 0; | |
725 | } | |
726 | ||
adcb2623 RW |
727 | static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) |
728 | { | |
5f508185 RW |
729 | return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && |
730 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); | |
adcb2623 RW |
731 | } |
732 | ||
4f86d3a8 | 733 | static int c3_cpu_count; |
e12f65f7 | 734 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
735 | |
736 | /** | |
737 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
6491bc0c RW |
738 | * @pr: Target processor |
739 | * @cx: Target state context | |
5f508185 | 740 | * @timer_bc: Whether or not to change timer mode to broadcast |
4f86d3a8 | 741 | */ |
6491bc0c | 742 | static void acpi_idle_enter_bm(struct acpi_processor *pr, |
5f508185 | 743 | struct acpi_processor_cx *cx, bool timer_bc) |
4f86d3a8 | 744 | { |
996520c1 VP |
745 | acpi_unlazy_tlb(smp_processor_id()); |
746 | ||
4f86d3a8 LB |
747 | /* |
748 | * Must be done before busmaster disable as we might need to | |
749 | * access HPET ! | |
750 | */ | |
5f508185 RW |
751 | if (timer_bc) |
752 | lapic_timer_state_broadcast(pr, cx, 1); | |
4f86d3a8 | 753 | |
ddc081a1 VP |
754 | /* |
755 | * disable bus master | |
756 | * bm_check implies we need ARB_DIS | |
ddc081a1 VP |
757 | * bm_control implies whether we can do ARB_DIS |
758 | * | |
759 | * That leaves a case where bm_check is set and bm_control is | |
760 | * not set. In that case we cannot do much, we enter C3 | |
761 | * without doing anything. | |
762 | */ | |
2a738352 | 763 | if (pr->flags.bm_control) { |
e12f65f7 | 764 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
765 | c3_cpu_count++; |
766 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
767 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 768 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 769 | raw_spin_unlock(&c3_lock); |
ddc081a1 | 770 | } |
4f86d3a8 | 771 | |
ddc081a1 | 772 | acpi_idle_do_entry(cx); |
4f86d3a8 | 773 | |
ddc081a1 | 774 | /* Re-enable bus master arbitration */ |
2a738352 | 775 | if (pr->flags.bm_control) { |
e12f65f7 | 776 | raw_spin_lock(&c3_lock); |
50ffba1b | 777 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 778 | c3_cpu_count--; |
e12f65f7 | 779 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 780 | } |
e978aa7d | 781 | |
5f508185 RW |
782 | if (timer_bc) |
783 | lapic_timer_state_broadcast(pr, cx, 0); | |
6491bc0c RW |
784 | } |
785 | ||
786 | static int acpi_idle_enter(struct cpuidle_device *dev, | |
787 | struct cpuidle_driver *drv, int index) | |
788 | { | |
789 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
790 | struct acpi_processor *pr; | |
791 | ||
792 | pr = __this_cpu_read(processors); | |
793 | if (unlikely(!pr)) | |
794 | return -EINVAL; | |
795 | ||
796 | if (cx->type != ACPI_STATE_C1) { | |
5f508185 | 797 | if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { |
6491bc0c RW |
798 | index = CPUIDLE_DRIVER_STATE_START; |
799 | cx = per_cpu(acpi_cstate[index], dev->cpu); | |
800 | } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) { | |
801 | if (cx->bm_sts_skip || !acpi_idle_bm_check()) { | |
5f508185 | 802 | acpi_idle_enter_bm(pr, cx, true); |
6491bc0c RW |
803 | return index; |
804 | } else if (drv->safe_state_index >= 0) { | |
805 | index = drv->safe_state_index; | |
806 | cx = per_cpu(acpi_cstate[index], dev->cpu); | |
807 | } else { | |
808 | acpi_safe_halt(); | |
809 | return -EBUSY; | |
810 | } | |
811 | } | |
812 | } | |
813 | ||
814 | lapic_timer_state_broadcast(pr, cx, 1); | |
815 | ||
816 | if (cx->type == ACPI_STATE_C3) | |
817 | ACPI_FLUSH_CPU_CACHE(); | |
818 | ||
819 | acpi_idle_do_entry(cx); | |
820 | ||
821 | lapic_timer_state_broadcast(pr, cx, 0); | |
822 | ||
e978aa7d | 823 | return index; |
4f86d3a8 LB |
824 | } |
825 | ||
5f508185 RW |
826 | static void acpi_idle_enter_freeze(struct cpuidle_device *dev, |
827 | struct cpuidle_driver *drv, int index) | |
828 | { | |
829 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
830 | ||
831 | if (cx->type == ACPI_STATE_C3) { | |
832 | struct acpi_processor *pr = __this_cpu_read(processors); | |
833 | ||
834 | if (unlikely(!pr)) | |
835 | return; | |
836 | ||
837 | if (pr->flags.bm_check) { | |
838 | acpi_idle_enter_bm(pr, cx, false); | |
839 | return; | |
840 | } else { | |
841 | ACPI_FLUSH_CPU_CACHE(); | |
842 | } | |
843 | } | |
844 | acpi_idle_do_entry(cx); | |
845 | } | |
846 | ||
4f86d3a8 LB |
847 | struct cpuidle_driver acpi_idle_driver = { |
848 | .name = "acpi_idle", | |
849 | .owner = THIS_MODULE, | |
850 | }; | |
851 | ||
852 | /** | |
46bcfad7 DD |
853 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
854 | * device i.e. per-cpu data | |
855 | * | |
4f86d3a8 | 856 | * @pr: the ACPI processor |
6ef0f086 | 857 | * @dev : the cpuidle device |
4f86d3a8 | 858 | */ |
6ef0f086 DL |
859 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, |
860 | struct cpuidle_device *dev) | |
4f86d3a8 | 861 | { |
9a0b8415 | 862 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 863 | struct acpi_processor_cx *cx; |
4f86d3a8 LB |
864 | |
865 | if (!pr->flags.power_setup_done) | |
866 | return -EINVAL; | |
867 | ||
868 | if (pr->flags.power == 0) { | |
869 | return -EINVAL; | |
870 | } | |
871 | ||
b88a634a KRW |
872 | if (!dev) |
873 | return -EINVAL; | |
874 | ||
dcb84f33 | 875 | dev->cpu = pr->id; |
4fcb2fcd | 876 | |
615dfd93 LB |
877 | if (max_cstate == 0) |
878 | max_cstate = 1; | |
879 | ||
4f86d3a8 LB |
880 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
881 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
882 | |
883 | if (!cx->valid) | |
884 | continue; | |
885 | ||
6240a10d | 886 | per_cpu(acpi_cstate[count], dev->cpu) = cx; |
4f86d3a8 | 887 | |
46bcfad7 DD |
888 | count++; |
889 | if (count == CPUIDLE_STATE_MAX) | |
890 | break; | |
891 | } | |
892 | ||
46bcfad7 DD |
893 | if (!count) |
894 | return -EINVAL; | |
895 | ||
896 | return 0; | |
897 | } | |
898 | ||
899 | /** | |
900 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
901 | * global state data i.e. idle routines | |
902 | * | |
903 | * @pr: the ACPI processor | |
904 | */ | |
905 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
906 | { | |
907 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
908 | struct acpi_processor_cx *cx; | |
909 | struct cpuidle_state *state; | |
910 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
911 | ||
912 | if (!pr->flags.power_setup_done) | |
913 | return -EINVAL; | |
914 | ||
915 | if (pr->flags.power == 0) | |
916 | return -EINVAL; | |
917 | ||
918 | drv->safe_state_index = -1; | |
c7e8bdf5 | 919 | for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
920 | drv->states[i].name[0] = '\0'; |
921 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
922 | } |
923 | ||
615dfd93 LB |
924 | if (max_cstate == 0) |
925 | max_cstate = 1; | |
926 | ||
4f86d3a8 LB |
927 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
928 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
929 | |
930 | if (!cx->valid) | |
931 | continue; | |
932 | ||
46bcfad7 | 933 | state = &drv->states[count]; |
4f86d3a8 | 934 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 935 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 936 | state->exit_latency = cx->latency; |
4963f620 | 937 | state->target_residency = cx->latency * latency_factor; |
6491bc0c | 938 | state->enter = acpi_idle_enter; |
4f86d3a8 LB |
939 | |
940 | state->flags = 0; | |
6491bc0c | 941 | if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) { |
1a022e3f | 942 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 943 | drv->safe_state_index = count; |
4f86d3a8 | 944 | } |
5f508185 RW |
945 | /* |
946 | * Halt-induced C1 is not good for ->enter_freeze, because it | |
947 | * re-enables interrupts on exit. Moreover, C1 is generally not | |
948 | * particularly interesting from the suspend-to-idle angle, so | |
949 | * avoid C1 and the situations in which we may need to fall back | |
950 | * to it altogether. | |
951 | */ | |
952 | if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) | |
953 | state->enter_freeze = acpi_idle_enter_freeze; | |
4f86d3a8 LB |
954 | |
955 | count++; | |
9a0b8415 | 956 | if (count == CPUIDLE_STATE_MAX) |
957 | break; | |
4f86d3a8 LB |
958 | } |
959 | ||
46bcfad7 | 960 | drv->state_count = count; |
4f86d3a8 LB |
961 | |
962 | if (!count) | |
963 | return -EINVAL; | |
964 | ||
4f86d3a8 LB |
965 | return 0; |
966 | } | |
967 | ||
46bcfad7 | 968 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 969 | { |
dcb84f33 | 970 | int ret = 0; |
e8b1b59d | 971 | struct cpuidle_device *dev; |
4f86d3a8 | 972 | |
d1896049 | 973 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
974 | return 0; |
975 | ||
bf9b59f2 | 976 | if (nocst) |
4f86d3a8 | 977 | return -ENODEV; |
4f86d3a8 LB |
978 | |
979 | if (!pr->flags.power_setup_done) | |
980 | return -ENODEV; | |
981 | ||
e8b1b59d | 982 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 983 | cpuidle_pause_and_lock(); |
3d339dcb | 984 | cpuidle_disable_device(dev); |
4f86d3a8 | 985 | acpi_processor_get_power_info(pr); |
dcb84f33 | 986 | if (pr->flags.power) { |
6ef0f086 | 987 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 988 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 989 | } |
4f86d3a8 LB |
990 | cpuidle_resume_and_unlock(); |
991 | ||
992 | return ret; | |
993 | } | |
994 | ||
46bcfad7 DD |
995 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
996 | { | |
997 | int cpu; | |
998 | struct acpi_processor *_pr; | |
3d339dcb | 999 | struct cpuidle_device *dev; |
46bcfad7 DD |
1000 | |
1001 | if (disabled_by_idle_boot_param()) | |
1002 | return 0; | |
1003 | ||
46bcfad7 DD |
1004 | if (nocst) |
1005 | return -ENODEV; | |
1006 | ||
1007 | if (!pr->flags.power_setup_done) | |
1008 | return -ENODEV; | |
1009 | ||
1010 | /* | |
1011 | * FIXME: Design the ACPI notification to make it once per | |
1012 | * system instead of once per-cpu. This condition is a hack | |
1013 | * to make the code that updates C-States be called once. | |
1014 | */ | |
1015 | ||
9505626d | 1016 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 | 1017 | |
46bcfad7 DD |
1018 | /* Protect against cpu-hotplug */ |
1019 | get_online_cpus(); | |
6726655d | 1020 | cpuidle_pause_and_lock(); |
46bcfad7 DD |
1021 | |
1022 | /* Disable all cpuidle devices */ | |
1023 | for_each_online_cpu(cpu) { | |
1024 | _pr = per_cpu(processors, cpu); | |
1025 | if (!_pr || !_pr->flags.power_setup_done) | |
1026 | continue; | |
3d339dcb DL |
1027 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1028 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1029 | } |
1030 | ||
1031 | /* Populate Updated C-state information */ | |
f427e5f1 | 1032 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1033 | acpi_processor_setup_cpuidle_states(pr); |
1034 | ||
1035 | /* Enable all cpuidle devices */ | |
1036 | for_each_online_cpu(cpu) { | |
1037 | _pr = per_cpu(processors, cpu); | |
1038 | if (!_pr || !_pr->flags.power_setup_done) | |
1039 | continue; | |
1040 | acpi_processor_get_power_info(_pr); | |
1041 | if (_pr->flags.power) { | |
3d339dcb | 1042 | dev = per_cpu(acpi_cpuidle_device, cpu); |
6ef0f086 | 1043 | acpi_processor_setup_cpuidle_cx(_pr, dev); |
3d339dcb | 1044 | cpuidle_enable_device(dev); |
46bcfad7 DD |
1045 | } |
1046 | } | |
46bcfad7 | 1047 | cpuidle_resume_and_unlock(); |
6726655d | 1048 | put_online_cpus(); |
46bcfad7 DD |
1049 | } |
1050 | ||
1051 | return 0; | |
1052 | } | |
1053 | ||
1054 | static int acpi_processor_registered; | |
1055 | ||
fe7bf106 | 1056 | int acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1057 | { |
6fd8050a | 1058 | acpi_status status; |
46bcfad7 | 1059 | int retval; |
3d339dcb | 1060 | struct cpuidle_device *dev; |
b6835052 | 1061 | static int first_run; |
1da177e4 | 1062 | |
d1896049 | 1063 | if (disabled_by_idle_boot_param()) |
36a91358 | 1064 | return 0; |
1da177e4 LT |
1065 | |
1066 | if (!first_run) { | |
1067 | dmi_check_system(processor_power_dmi_table); | |
c1c30634 | 1068 | max_cstate = acpi_processor_cstate_check(max_cstate); |
1da177e4 | 1069 | if (max_cstate < ACPI_C_STATES_MAX) |
4be44fcd LB |
1070 | printk(KERN_NOTICE |
1071 | "ACPI: processor limited to max C-state %d\n", | |
1072 | max_cstate); | |
1da177e4 LT |
1073 | first_run++; |
1074 | } | |
1075 | ||
cee324b1 | 1076 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1077 | status = |
cee324b1 | 1078 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1079 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1080 | ACPI_EXCEPTION((AE_INFO, status, |
1081 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1082 | } |
1083 | } | |
1084 | ||
1085 | acpi_processor_get_power_info(pr); | |
4f86d3a8 | 1086 | pr->flags.power_setup_done = 1; |
1da177e4 LT |
1087 | |
1088 | /* | |
1089 | * Install the idle handler if processor power management is supported. | |
1090 | * Note that we use previously set idle handler will be used on | |
1091 | * platforms that only support C1. | |
1092 | */ | |
36a91358 | 1093 | if (pr->flags.power) { |
46bcfad7 DD |
1094 | /* Register acpi_idle_driver if not already registered */ |
1095 | if (!acpi_processor_registered) { | |
1096 | acpi_processor_setup_cpuidle_states(pr); | |
1097 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1098 | if (retval) | |
1099 | return retval; | |
1100 | printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", | |
1101 | acpi_idle_driver.name); | |
1102 | } | |
3d339dcb DL |
1103 | |
1104 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1105 | if (!dev) | |
1106 | return -ENOMEM; | |
1107 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1108 | ||
6ef0f086 | 1109 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1110 | |
46bcfad7 DD |
1111 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1112 | * must already be registered before registering device | |
1113 | */ | |
3d339dcb | 1114 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1115 | if (retval) { |
1116 | if (acpi_processor_registered == 0) | |
1117 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1118 | return retval; | |
1119 | } | |
1120 | acpi_processor_registered++; | |
1da177e4 | 1121 | } |
d550d98d | 1122 | return 0; |
1da177e4 LT |
1123 | } |
1124 | ||
38a991b6 | 1125 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1126 | { |
3d339dcb DL |
1127 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1128 | ||
d1896049 | 1129 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1130 | return 0; |
1131 | ||
46bcfad7 | 1132 | if (pr->flags.power) { |
3d339dcb | 1133 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1134 | acpi_processor_registered--; |
1135 | if (acpi_processor_registered == 0) | |
1136 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1137 | } | |
1da177e4 | 1138 | |
46bcfad7 | 1139 | pr->flags.power_setup_done = 0; |
d550d98d | 1140 | return 0; |
1da177e4 | 1141 | } |