Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
1da177e4 | 31 | #include <linux/module.h> |
1da177e4 LT |
32 | #include <linux/acpi.h> |
33 | #include <linux/dmi.h> | |
e2668fb5 | 34 | #include <linux/sched.h> /* need_resched() */ |
ee41eebf | 35 | #include <linux/tick.h> |
4f86d3a8 | 36 | #include <linux/cpuidle.h> |
0a3b15ac | 37 | #include <linux/syscore_ops.h> |
8b48463f | 38 | #include <acpi/processor.h> |
1da177e4 | 39 | |
3434933b TG |
40 | /* |
41 | * Include the apic definitions for x86 to have the APIC timer related defines | |
42 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
43 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
44 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
45 | */ | |
46 | #ifdef CONFIG_X86 | |
47 | #include <asm/apic.h> | |
48 | #endif | |
49 | ||
a192a958 LB |
50 | #define PREFIX "ACPI: " |
51 | ||
1da177e4 | 52 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 53 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 54 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 55 | |
4f86d3a8 LB |
56 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
57 | module_param(max_cstate, uint, 0000); | |
b6835052 | 58 | static unsigned int nocst __read_mostly; |
1da177e4 | 59 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
60 | static int bm_check_disable __read_mostly; |
61 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 62 | |
25de5718 | 63 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 64 | module_param(latency_factor, uint, 0644); |
1da177e4 | 65 | |
3d339dcb DL |
66 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
67 | ||
6240a10d AS |
68 | static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], |
69 | acpi_cstate); | |
ac3ebafa | 70 | |
d1896049 TR |
71 | static int disabled_by_idle_boot_param(void) |
72 | { | |
73 | return boot_option_idle_override == IDLE_POLL || | |
d1896049 TR |
74 | boot_option_idle_override == IDLE_HALT; |
75 | } | |
76 | ||
1da177e4 LT |
77 | /* |
78 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
79 | * For now disable this. Probably a bug somewhere else. | |
80 | * | |
81 | * To skip this limit, boot/load with a large max_cstate limit. | |
82 | */ | |
1855256c | 83 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
84 | { |
85 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
86 | return 0; | |
87 | ||
3d35600a | 88 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
89 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
90 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 91 | |
3d35600a | 92 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
93 | |
94 | return 0; | |
95 | } | |
96 | ||
b0346688 | 97 | static const struct dmi_system_id processor_power_dmi_table[] = { |
876c184b TR |
98 | { set_max_cstate, "Clevo 5600D", { |
99 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
100 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 101 | (void *)2}, |
370d5cd8 AV |
102 | { set_max_cstate, "Pavilion zv5000", { |
103 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
104 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
105 | (void *)1}, | |
106 | { set_max_cstate, "Asus L8400B", { | |
107 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
108 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
109 | (void *)1}, | |
1da177e4 LT |
110 | {}, |
111 | }; | |
112 | ||
4f86d3a8 | 113 | |
2e906655 | 114 | /* |
115 | * Callers should disable interrupts before the call and enable | |
116 | * interrupts after return. | |
117 | */ | |
ddc081a1 VP |
118 | static void acpi_safe_halt(void) |
119 | { | |
ea811747 | 120 | if (!tif_need_resched()) { |
ddc081a1 | 121 | safe_halt(); |
71e93d15 VP |
122 | local_irq_disable(); |
123 | } | |
ddc081a1 VP |
124 | } |
125 | ||
169a0abb TG |
126 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
127 | ||
128 | /* | |
129 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
130 | * This seems to be a common problem on AMD boxen, but other vendors |
131 | * are affected too. We pick the most conservative approach: we assume | |
132 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 133 | */ |
7e275cc4 | 134 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
135 | struct acpi_processor_cx *cx) |
136 | { | |
137 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 138 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 139 | |
db954b58 VP |
140 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
141 | return; | |
142 | ||
02c68a02 | 143 | if (amd_e400_c1e_detected) |
87ad57ba SL |
144 | type = ACPI_STATE_C1; |
145 | ||
169a0abb TG |
146 | /* |
147 | * Check, if one of the previous states already marked the lapic | |
148 | * unstable | |
149 | */ | |
150 | if (pwr->timer_broadcast_on_state < state) | |
151 | return; | |
152 | ||
e585bef8 | 153 | if (cx->type >= type) |
296d93cd | 154 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
155 | } |
156 | ||
918aae42 | 157 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 158 | { |
f833bab8 | 159 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 | 160 | |
ee41eebf TG |
161 | if (pr->power.timer_broadcast_on_state < INT_MAX) |
162 | tick_broadcast_enable(); | |
163 | else | |
164 | tick_broadcast_disable(); | |
e9e2cdb4 TG |
165 | } |
166 | ||
918aae42 HS |
167 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
168 | { | |
169 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
170 | (void *)pr, 1); | |
171 | } | |
172 | ||
e9e2cdb4 | 173 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 174 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
175 | struct acpi_processor_cx *cx, |
176 | int broadcast) | |
177 | { | |
e9e2cdb4 TG |
178 | int state = cx - pr->power.states; |
179 | ||
180 | if (state >= pr->power.timer_broadcast_on_state) { | |
7815701c TG |
181 | if (broadcast) |
182 | tick_broadcast_enter(); | |
183 | else | |
184 | tick_broadcast_exit(); | |
e9e2cdb4 | 185 | } |
169a0abb TG |
186 | } |
187 | ||
188 | #else | |
189 | ||
7e275cc4 | 190 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 191 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
192 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
193 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
194 | struct acpi_processor_cx *cx, |
195 | int broadcast) | |
196 | { | |
197 | } | |
169a0abb TG |
198 | |
199 | #endif | |
200 | ||
0a3b15ac | 201 | #ifdef CONFIG_PM_SLEEP |
815ab0fd LB |
202 | static u32 saved_bm_rld; |
203 | ||
95d45d4c | 204 | static int acpi_processor_suspend(void) |
815ab0fd LB |
205 | { |
206 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); | |
0a3b15ac | 207 | return 0; |
815ab0fd | 208 | } |
0a3b15ac | 209 | |
95d45d4c | 210 | static void acpi_processor_resume(void) |
815ab0fd | 211 | { |
43575faa | 212 | u32 resumed_bm_rld = 0; |
815ab0fd LB |
213 | |
214 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); | |
0a3b15ac RW |
215 | if (resumed_bm_rld == saved_bm_rld) |
216 | return; | |
815ab0fd | 217 | |
0a3b15ac | 218 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); |
815ab0fd | 219 | } |
b04e7bdb | 220 | |
0a3b15ac RW |
221 | static struct syscore_ops acpi_processor_syscore_ops = { |
222 | .suspend = acpi_processor_suspend, | |
223 | .resume = acpi_processor_resume, | |
224 | }; | |
225 | ||
226 | void acpi_processor_syscore_init(void) | |
b04e7bdb | 227 | { |
0a3b15ac | 228 | register_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb TG |
229 | } |
230 | ||
0a3b15ac | 231 | void acpi_processor_syscore_exit(void) |
b04e7bdb | 232 | { |
0a3b15ac | 233 | unregister_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb | 234 | } |
0a3b15ac | 235 | #endif /* CONFIG_PM_SLEEP */ |
b04e7bdb | 236 | |
592913ec | 237 | #if defined(CONFIG_X86) |
520daf72 | 238 | static void tsc_check_state(int state) |
ddb25f9a AK |
239 | { |
240 | switch (boot_cpu_data.x86_vendor) { | |
241 | case X86_VENDOR_AMD: | |
40fb1715 | 242 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
243 | /* |
244 | * AMD Fam10h TSC will tick in all | |
245 | * C/P/S0/S1 states when this bit is set. | |
246 | */ | |
40fb1715 | 247 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 248 | return; |
40fb1715 | 249 | |
ddb25f9a | 250 | /*FALL THROUGH*/ |
ddb25f9a | 251 | default: |
520daf72 LB |
252 | /* TSC could halt in idle, so notify users */ |
253 | if (state > ACPI_STATE_C1) | |
254 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
255 | } |
256 | } | |
520daf72 LB |
257 | #else |
258 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
259 | #endif |
260 | ||
4be44fcd | 261 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 262 | { |
1da177e4 | 263 | |
1da177e4 | 264 | if (!pr->pblk) |
d550d98d | 265 | return -ENODEV; |
1da177e4 | 266 | |
1da177e4 | 267 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
268 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
269 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
270 | ||
4c033552 VP |
271 | #ifndef CONFIG_HOTPLUG_CPU |
272 | /* | |
273 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 274 | * an SMP system. |
4c033552 | 275 | */ |
ad71860a | 276 | if ((num_online_cpus() > 1) && |
cee324b1 | 277 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 278 | return -ENODEV; |
4c033552 VP |
279 | #endif |
280 | ||
1da177e4 LT |
281 | /* determine C2 and C3 address from pblk */ |
282 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
283 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
284 | ||
285 | /* determine latencies from FADT */ | |
ba494bee BM |
286 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
287 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 288 | |
5d76b6f6 LB |
289 | /* |
290 | * FADT specified C2 latency must be less than or equal to | |
291 | * 100 microseconds. | |
292 | */ | |
ba494bee | 293 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 294 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 295 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
296 | /* invalidate C2 */ |
297 | pr->power.states[ACPI_STATE_C2].address = 0; | |
298 | } | |
299 | ||
a6d72c18 LB |
300 | /* |
301 | * FADT supplied C3 latency must be less than or equal to | |
302 | * 1000 microseconds. | |
303 | */ | |
ba494bee | 304 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 305 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 306 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
307 | /* invalidate C3 */ |
308 | pr->power.states[ACPI_STATE_C3].address = 0; | |
309 | } | |
310 | ||
1da177e4 LT |
311 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
312 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
313 | pr->power.states[ACPI_STATE_C2].address, | |
314 | pr->power.states[ACPI_STATE_C3].address)); | |
315 | ||
d550d98d | 316 | return 0; |
1da177e4 LT |
317 | } |
318 | ||
991528d7 | 319 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 320 | { |
991528d7 VP |
321 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
322 | /* set the first C-State to C1 */ | |
323 | /* all processors need to support C1 */ | |
324 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
325 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 326 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
327 | } |
328 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 329 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 330 | return 0; |
acf05f4b VP |
331 | } |
332 | ||
4be44fcd | 333 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 334 | { |
6fd8050a | 335 | acpi_status status; |
439913ff | 336 | u64 count; |
cf824788 | 337 | int current_count; |
6fd8050a | 338 | int i, ret = 0; |
4be44fcd LB |
339 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
340 | union acpi_object *cst; | |
1da177e4 | 341 | |
1da177e4 | 342 | |
1da177e4 | 343 | if (nocst) |
d550d98d | 344 | return -ENODEV; |
1da177e4 | 345 | |
991528d7 | 346 | current_count = 0; |
1da177e4 LT |
347 | |
348 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
349 | if (ACPI_FAILURE(status)) { | |
350 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 351 | return -ENODEV; |
4be44fcd | 352 | } |
1da177e4 | 353 | |
50dd0969 | 354 | cst = buffer.pointer; |
1da177e4 LT |
355 | |
356 | /* There must be at least 2 elements */ | |
357 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 358 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
6fd8050a | 359 | ret = -EFAULT; |
1da177e4 LT |
360 | goto end; |
361 | } | |
362 | ||
363 | count = cst->package.elements[0].integer.value; | |
364 | ||
365 | /* Validate number of power states. */ | |
366 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 367 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
6fd8050a | 368 | ret = -EFAULT; |
1da177e4 LT |
369 | goto end; |
370 | } | |
371 | ||
1da177e4 LT |
372 | /* Tell driver that at least _CST is supported. */ |
373 | pr->flags.has_cst = 1; | |
374 | ||
375 | for (i = 1; i <= count; i++) { | |
376 | union acpi_object *element; | |
377 | union acpi_object *obj; | |
378 | struct acpi_power_register *reg; | |
379 | struct acpi_processor_cx cx; | |
380 | ||
381 | memset(&cx, 0, sizeof(cx)); | |
382 | ||
50dd0969 | 383 | element = &(cst->package.elements[i]); |
1da177e4 LT |
384 | if (element->type != ACPI_TYPE_PACKAGE) |
385 | continue; | |
386 | ||
387 | if (element->package.count != 4) | |
388 | continue; | |
389 | ||
50dd0969 | 390 | obj = &(element->package.elements[0]); |
1da177e4 LT |
391 | |
392 | if (obj->type != ACPI_TYPE_BUFFER) | |
393 | continue; | |
394 | ||
4be44fcd | 395 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
396 | |
397 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 398 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
399 | continue; |
400 | ||
1da177e4 | 401 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 402 | obj = &(element->package.elements[1]); |
1da177e4 LT |
403 | if (obj->type != ACPI_TYPE_INTEGER) |
404 | continue; | |
405 | ||
406 | cx.type = obj->integer.value; | |
991528d7 VP |
407 | /* |
408 | * Some buggy BIOSes won't list C1 in _CST - | |
409 | * Let acpi_processor_get_power_info_default() handle them later | |
410 | */ | |
411 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
412 | current_count++; | |
413 | ||
414 | cx.address = reg->address; | |
415 | cx.index = current_count + 1; | |
416 | ||
bc71bec9 | 417 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
418 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
419 | if (acpi_processor_ffh_cstate_probe | |
420 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 421 | cx.entry_method = ACPI_CSTATE_FFH; |
422 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
423 | /* |
424 | * C1 is a special case where FIXED_HARDWARE | |
425 | * can be handled in non-MWAIT way as well. | |
426 | * In that case, save this _CST entry info. | |
991528d7 VP |
427 | * Otherwise, ignore this info and continue. |
428 | */ | |
bc71bec9 | 429 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 430 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 431 | } else { |
991528d7 VP |
432 | continue; |
433 | } | |
da5e09a1 | 434 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 435 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
436 | /* |
437 | * In most cases the C1 space_id obtained from | |
438 | * _CST object is FIXED_HARDWARE access mode. | |
439 | * But when the option of idle=halt is added, | |
440 | * the entry_method type should be changed from | |
441 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
442 | * When the option of idle=nomwait is added, |
443 | * the C1 entry_method type should be | |
444 | * CSTATE_HALT. | |
c1e3b377 ZY |
445 | */ |
446 | cx.entry_method = ACPI_CSTATE_HALT; | |
447 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
448 | } | |
4fcb2fcd VP |
449 | } else { |
450 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
451 | cx.address); | |
991528d7 | 452 | } |
1da177e4 | 453 | |
0fda6b40 VP |
454 | if (cx.type == ACPI_STATE_C1) { |
455 | cx.valid = 1; | |
456 | } | |
4fcb2fcd | 457 | |
50dd0969 | 458 | obj = &(element->package.elements[2]); |
1da177e4 LT |
459 | if (obj->type != ACPI_TYPE_INTEGER) |
460 | continue; | |
461 | ||
462 | cx.latency = obj->integer.value; | |
463 | ||
50dd0969 | 464 | obj = &(element->package.elements[3]); |
1da177e4 LT |
465 | if (obj->type != ACPI_TYPE_INTEGER) |
466 | continue; | |
467 | ||
cf824788 JM |
468 | current_count++; |
469 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
470 | ||
471 | /* | |
472 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
473 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
474 | */ | |
475 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
476 | printk(KERN_WARNING | |
477 | "Limiting number of power states to max (%d)\n", | |
478 | ACPI_PROCESSOR_MAX_POWER); | |
479 | printk(KERN_WARNING | |
480 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
481 | break; | |
482 | } | |
1da177e4 LT |
483 | } |
484 | ||
4be44fcd | 485 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 486 | current_count)); |
1da177e4 LT |
487 | |
488 | /* Validate number of power states discovered */ | |
cf824788 | 489 | if (current_count < 2) |
6fd8050a | 490 | ret = -EFAULT; |
1da177e4 | 491 | |
4be44fcd | 492 | end: |
02438d87 | 493 | kfree(buffer.pointer); |
1da177e4 | 494 | |
6fd8050a | 495 | return ret; |
1da177e4 LT |
496 | } |
497 | ||
4be44fcd LB |
498 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
499 | struct acpi_processor_cx *cx) | |
1da177e4 | 500 | { |
ee1ca48f PV |
501 | static int bm_check_flag = -1; |
502 | static int bm_control_flag = -1; | |
02df8b93 | 503 | |
1da177e4 LT |
504 | |
505 | if (!cx->address) | |
d550d98d | 506 | return; |
1da177e4 | 507 | |
1da177e4 LT |
508 | /* |
509 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
510 | * DMA transfers are used by any ISA device to avoid livelock. | |
511 | * Note that we could disable Type-F DMA (as recommended by | |
512 | * the erratum), but this is known to disrupt certain ISA | |
513 | * devices thus we take the conservative approach. | |
514 | */ | |
515 | else if (errata.piix4.fdma) { | |
516 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 517 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 518 | return; |
1da177e4 LT |
519 | } |
520 | ||
02df8b93 | 521 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 522 | if (bm_check_flag == -1) { |
02df8b93 VP |
523 | /* Determine whether bm_check is needed based on CPU */ |
524 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
525 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 526 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
527 | } else { |
528 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 529 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
530 | } |
531 | ||
532 | if (pr->flags.bm_check) { | |
02df8b93 | 533 | if (!pr->flags.bm_control) { |
ed3110ef VP |
534 | if (pr->flags.has_cst != 1) { |
535 | /* bus mastering control is necessary */ | |
536 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
537 | "C3 support requires BM control\n")); | |
538 | return; | |
539 | } else { | |
540 | /* Here we enter C3 without bus mastering */ | |
541 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
542 | "C3 support without BM control\n")); | |
543 | } | |
02df8b93 VP |
544 | } |
545 | } else { | |
02df8b93 VP |
546 | /* |
547 | * WBINVD should be set in fadt, for C3 state to be | |
548 | * supported on when bm_check is not required. | |
549 | */ | |
cee324b1 | 550 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 551 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
552 | "Cache invalidation should work properly" |
553 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 554 | return; |
02df8b93 | 555 | } |
02df8b93 VP |
556 | } |
557 | ||
1da177e4 LT |
558 | /* |
559 | * Otherwise we've met all of our C3 requirements. | |
560 | * Normalize the C3 latency to expidite policy. Enable | |
561 | * checking of bus mastering status (bm_check) so we can | |
562 | * use this in our C3 policy | |
563 | */ | |
564 | cx->valid = 1; | |
4f86d3a8 | 565 | |
31878dd8 LB |
566 | /* |
567 | * On older chipsets, BM_RLD needs to be set | |
568 | * in order for Bus Master activity to wake the | |
569 | * system from C3. Newer chipsets handle DMA | |
570 | * during C3 automatically and BM_RLD is a NOP. | |
571 | * In either case, the proper way to | |
572 | * handle BM_RLD is to set it and leave it set. | |
573 | */ | |
50ffba1b | 574 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 575 | |
d550d98d | 576 | return; |
1da177e4 LT |
577 | } |
578 | ||
1da177e4 LT |
579 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
580 | { | |
581 | unsigned int i; | |
582 | unsigned int working = 0; | |
6eb0a0fd | 583 | |
169a0abb | 584 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 585 | |
a0bf284b | 586 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
587 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
588 | ||
589 | switch (cx->type) { | |
590 | case ACPI_STATE_C1: | |
591 | cx->valid = 1; | |
592 | break; | |
593 | ||
594 | case ACPI_STATE_C2: | |
d22edd29 LB |
595 | if (!cx->address) |
596 | break; | |
cad1525a | 597 | cx->valid = 1; |
1da177e4 LT |
598 | break; |
599 | ||
600 | case ACPI_STATE_C3: | |
601 | acpi_processor_power_verify_c3(pr, cx); | |
602 | break; | |
603 | } | |
7e275cc4 LB |
604 | if (!cx->valid) |
605 | continue; | |
1da177e4 | 606 | |
7e275cc4 LB |
607 | lapic_timer_check_state(i, pr, cx); |
608 | tsc_check_state(cx->type); | |
609 | working++; | |
1da177e4 | 610 | } |
bd663347 | 611 | |
918aae42 | 612 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
613 | |
614 | return (working); | |
615 | } | |
616 | ||
4be44fcd | 617 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
618 | { |
619 | unsigned int i; | |
620 | int result; | |
621 | ||
1da177e4 LT |
622 | |
623 | /* NOTE: the idle thread may not be running while calling | |
624 | * this function */ | |
625 | ||
991528d7 VP |
626 | /* Zero initialize all the C-states info. */ |
627 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
628 | ||
1da177e4 | 629 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 630 | if (result == -ENODEV) |
c5a114f1 | 631 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 632 | |
991528d7 VP |
633 | if (result) |
634 | return result; | |
635 | ||
636 | acpi_processor_get_power_info_default(pr); | |
637 | ||
cf824788 | 638 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 639 | |
1da177e4 LT |
640 | /* |
641 | * if one state of type C2 or C3 is available, mark this | |
642 | * CPU as being "idle manageable" | |
643 | */ | |
644 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 645 | if (pr->power.states[i].valid) { |
1da177e4 | 646 | pr->power.count = i; |
2203d6ed LT |
647 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
648 | pr->flags.power = 1; | |
acf05f4b | 649 | } |
1da177e4 LT |
650 | } |
651 | ||
d550d98d | 652 | return 0; |
1da177e4 LT |
653 | } |
654 | ||
4f86d3a8 LB |
655 | /** |
656 | * acpi_idle_bm_check - checks if bus master activity was detected | |
657 | */ | |
658 | static int acpi_idle_bm_check(void) | |
659 | { | |
660 | u32 bm_status = 0; | |
661 | ||
d3e7e99f LB |
662 | if (bm_check_disable) |
663 | return 0; | |
664 | ||
50ffba1b | 665 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 666 | if (bm_status) |
50ffba1b | 667 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
668 | /* |
669 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
670 | * the true state of bus mastering activity; forcing us to | |
671 | * manually check the BMIDEA bit of each IDE channel. | |
672 | */ | |
673 | else if (errata.piix4.bmisx) { | |
674 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
675 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
676 | bm_status = 1; | |
677 | } | |
678 | return bm_status; | |
679 | } | |
680 | ||
4f86d3a8 | 681 | /** |
b00783fd | 682 | * acpi_idle_do_entry - enter idle state using the appropriate method |
4f86d3a8 | 683 | * @cx: cstate data |
bc71bec9 | 684 | * |
685 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 | 686 | */ |
b00783fd | 687 | static void acpi_idle_do_entry(struct acpi_processor_cx *cx) |
4f86d3a8 | 688 | { |
bc71bec9 | 689 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
690 | /* Call into architectural FFH based C-state */ |
691 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 692 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
693 | acpi_safe_halt(); | |
4f86d3a8 | 694 | } else { |
4f86d3a8 LB |
695 | /* IO port based C-state */ |
696 | inb(cx->address); | |
697 | /* Dummy wait op - must do something useless after P_LVL2 read | |
698 | because chipsets cannot guarantee that STPCLK# signal | |
699 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 700 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 LB |
701 | } |
702 | } | |
703 | ||
1a022e3f BO |
704 | /** |
705 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
706 | * @dev: the target CPU | |
707 | * @index: the index of suggested state | |
708 | */ | |
709 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
710 | { | |
6240a10d | 711 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
1a022e3f BO |
712 | |
713 | ACPI_FLUSH_CPU_CACHE(); | |
714 | ||
715 | while (1) { | |
716 | ||
717 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 718 | safe_halt(); |
1a022e3f BO |
719 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
720 | inb(cx->address); | |
721 | /* See comment in acpi_idle_do_entry() */ | |
722 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
723 | } else | |
724 | return -ENODEV; | |
725 | } | |
726 | ||
727 | /* Never reached */ | |
728 | return 0; | |
729 | } | |
730 | ||
adcb2623 RW |
731 | static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) |
732 | { | |
5f508185 RW |
733 | return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && |
734 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); | |
adcb2623 RW |
735 | } |
736 | ||
4f86d3a8 | 737 | static int c3_cpu_count; |
e12f65f7 | 738 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
739 | |
740 | /** | |
741 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
6491bc0c RW |
742 | * @pr: Target processor |
743 | * @cx: Target state context | |
5f508185 | 744 | * @timer_bc: Whether or not to change timer mode to broadcast |
4f86d3a8 | 745 | */ |
6491bc0c | 746 | static void acpi_idle_enter_bm(struct acpi_processor *pr, |
5f508185 | 747 | struct acpi_processor_cx *cx, bool timer_bc) |
4f86d3a8 | 748 | { |
996520c1 VP |
749 | acpi_unlazy_tlb(smp_processor_id()); |
750 | ||
4f86d3a8 LB |
751 | /* |
752 | * Must be done before busmaster disable as we might need to | |
753 | * access HPET ! | |
754 | */ | |
5f508185 RW |
755 | if (timer_bc) |
756 | lapic_timer_state_broadcast(pr, cx, 1); | |
4f86d3a8 | 757 | |
ddc081a1 VP |
758 | /* |
759 | * disable bus master | |
760 | * bm_check implies we need ARB_DIS | |
ddc081a1 VP |
761 | * bm_control implies whether we can do ARB_DIS |
762 | * | |
763 | * That leaves a case where bm_check is set and bm_control is | |
764 | * not set. In that case we cannot do much, we enter C3 | |
765 | * without doing anything. | |
766 | */ | |
2a738352 | 767 | if (pr->flags.bm_control) { |
e12f65f7 | 768 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
769 | c3_cpu_count++; |
770 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
771 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 772 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 773 | raw_spin_unlock(&c3_lock); |
ddc081a1 | 774 | } |
4f86d3a8 | 775 | |
ddc081a1 | 776 | acpi_idle_do_entry(cx); |
4f86d3a8 | 777 | |
ddc081a1 | 778 | /* Re-enable bus master arbitration */ |
2a738352 | 779 | if (pr->flags.bm_control) { |
e12f65f7 | 780 | raw_spin_lock(&c3_lock); |
50ffba1b | 781 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 782 | c3_cpu_count--; |
e12f65f7 | 783 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 784 | } |
e978aa7d | 785 | |
5f508185 RW |
786 | if (timer_bc) |
787 | lapic_timer_state_broadcast(pr, cx, 0); | |
6491bc0c RW |
788 | } |
789 | ||
790 | static int acpi_idle_enter(struct cpuidle_device *dev, | |
791 | struct cpuidle_driver *drv, int index) | |
792 | { | |
793 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
794 | struct acpi_processor *pr; | |
795 | ||
796 | pr = __this_cpu_read(processors); | |
797 | if (unlikely(!pr)) | |
798 | return -EINVAL; | |
799 | ||
800 | if (cx->type != ACPI_STATE_C1) { | |
5f508185 | 801 | if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { |
6491bc0c RW |
802 | index = CPUIDLE_DRIVER_STATE_START; |
803 | cx = per_cpu(acpi_cstate[index], dev->cpu); | |
804 | } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) { | |
805 | if (cx->bm_sts_skip || !acpi_idle_bm_check()) { | |
5f508185 | 806 | acpi_idle_enter_bm(pr, cx, true); |
6491bc0c RW |
807 | return index; |
808 | } else if (drv->safe_state_index >= 0) { | |
809 | index = drv->safe_state_index; | |
810 | cx = per_cpu(acpi_cstate[index], dev->cpu); | |
811 | } else { | |
812 | acpi_safe_halt(); | |
813 | return -EBUSY; | |
814 | } | |
815 | } | |
816 | } | |
817 | ||
818 | lapic_timer_state_broadcast(pr, cx, 1); | |
819 | ||
820 | if (cx->type == ACPI_STATE_C3) | |
821 | ACPI_FLUSH_CPU_CACHE(); | |
822 | ||
823 | acpi_idle_do_entry(cx); | |
824 | ||
825 | lapic_timer_state_broadcast(pr, cx, 0); | |
826 | ||
e978aa7d | 827 | return index; |
4f86d3a8 LB |
828 | } |
829 | ||
5f508185 RW |
830 | static void acpi_idle_enter_freeze(struct cpuidle_device *dev, |
831 | struct cpuidle_driver *drv, int index) | |
832 | { | |
833 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
834 | ||
835 | if (cx->type == ACPI_STATE_C3) { | |
836 | struct acpi_processor *pr = __this_cpu_read(processors); | |
837 | ||
838 | if (unlikely(!pr)) | |
839 | return; | |
840 | ||
841 | if (pr->flags.bm_check) { | |
842 | acpi_idle_enter_bm(pr, cx, false); | |
843 | return; | |
844 | } else { | |
845 | ACPI_FLUSH_CPU_CACHE(); | |
846 | } | |
847 | } | |
848 | acpi_idle_do_entry(cx); | |
849 | } | |
850 | ||
4f86d3a8 LB |
851 | struct cpuidle_driver acpi_idle_driver = { |
852 | .name = "acpi_idle", | |
853 | .owner = THIS_MODULE, | |
854 | }; | |
855 | ||
856 | /** | |
46bcfad7 DD |
857 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
858 | * device i.e. per-cpu data | |
859 | * | |
4f86d3a8 | 860 | * @pr: the ACPI processor |
6ef0f086 | 861 | * @dev : the cpuidle device |
4f86d3a8 | 862 | */ |
6ef0f086 DL |
863 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, |
864 | struct cpuidle_device *dev) | |
4f86d3a8 | 865 | { |
9a0b8415 | 866 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 867 | struct acpi_processor_cx *cx; |
4f86d3a8 LB |
868 | |
869 | if (!pr->flags.power_setup_done) | |
870 | return -EINVAL; | |
871 | ||
872 | if (pr->flags.power == 0) { | |
873 | return -EINVAL; | |
874 | } | |
875 | ||
b88a634a KRW |
876 | if (!dev) |
877 | return -EINVAL; | |
878 | ||
dcb84f33 | 879 | dev->cpu = pr->id; |
4fcb2fcd | 880 | |
615dfd93 LB |
881 | if (max_cstate == 0) |
882 | max_cstate = 1; | |
883 | ||
4f86d3a8 LB |
884 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
885 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
886 | |
887 | if (!cx->valid) | |
888 | continue; | |
889 | ||
6240a10d | 890 | per_cpu(acpi_cstate[count], dev->cpu) = cx; |
4f86d3a8 | 891 | |
46bcfad7 DD |
892 | count++; |
893 | if (count == CPUIDLE_STATE_MAX) | |
894 | break; | |
895 | } | |
896 | ||
46bcfad7 DD |
897 | if (!count) |
898 | return -EINVAL; | |
899 | ||
900 | return 0; | |
901 | } | |
902 | ||
903 | /** | |
904 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
905 | * global state data i.e. idle routines | |
906 | * | |
907 | * @pr: the ACPI processor | |
908 | */ | |
909 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
910 | { | |
911 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
912 | struct acpi_processor_cx *cx; | |
913 | struct cpuidle_state *state; | |
914 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
915 | ||
916 | if (!pr->flags.power_setup_done) | |
917 | return -EINVAL; | |
918 | ||
919 | if (pr->flags.power == 0) | |
920 | return -EINVAL; | |
921 | ||
922 | drv->safe_state_index = -1; | |
c7e8bdf5 | 923 | for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
924 | drv->states[i].name[0] = '\0'; |
925 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
926 | } |
927 | ||
615dfd93 LB |
928 | if (max_cstate == 0) |
929 | max_cstate = 1; | |
930 | ||
4f86d3a8 LB |
931 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
932 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
933 | |
934 | if (!cx->valid) | |
935 | continue; | |
936 | ||
46bcfad7 | 937 | state = &drv->states[count]; |
4f86d3a8 | 938 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 939 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 940 | state->exit_latency = cx->latency; |
4963f620 | 941 | state->target_residency = cx->latency * latency_factor; |
6491bc0c | 942 | state->enter = acpi_idle_enter; |
4f86d3a8 LB |
943 | |
944 | state->flags = 0; | |
6491bc0c | 945 | if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) { |
1a022e3f | 946 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 947 | drv->safe_state_index = count; |
4f86d3a8 | 948 | } |
5f508185 RW |
949 | /* |
950 | * Halt-induced C1 is not good for ->enter_freeze, because it | |
951 | * re-enables interrupts on exit. Moreover, C1 is generally not | |
952 | * particularly interesting from the suspend-to-idle angle, so | |
953 | * avoid C1 and the situations in which we may need to fall back | |
954 | * to it altogether. | |
955 | */ | |
956 | if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) | |
957 | state->enter_freeze = acpi_idle_enter_freeze; | |
4f86d3a8 LB |
958 | |
959 | count++; | |
9a0b8415 | 960 | if (count == CPUIDLE_STATE_MAX) |
961 | break; | |
4f86d3a8 LB |
962 | } |
963 | ||
46bcfad7 | 964 | drv->state_count = count; |
4f86d3a8 LB |
965 | |
966 | if (!count) | |
967 | return -EINVAL; | |
968 | ||
4f86d3a8 LB |
969 | return 0; |
970 | } | |
971 | ||
46bcfad7 | 972 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 973 | { |
dcb84f33 | 974 | int ret = 0; |
e8b1b59d | 975 | struct cpuidle_device *dev; |
4f86d3a8 | 976 | |
d1896049 | 977 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
978 | return 0; |
979 | ||
bf9b59f2 | 980 | if (nocst) |
4f86d3a8 | 981 | return -ENODEV; |
4f86d3a8 LB |
982 | |
983 | if (!pr->flags.power_setup_done) | |
984 | return -ENODEV; | |
985 | ||
e8b1b59d | 986 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 987 | cpuidle_pause_and_lock(); |
3d339dcb | 988 | cpuidle_disable_device(dev); |
4f86d3a8 | 989 | acpi_processor_get_power_info(pr); |
dcb84f33 | 990 | if (pr->flags.power) { |
6ef0f086 | 991 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 992 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 993 | } |
4f86d3a8 LB |
994 | cpuidle_resume_and_unlock(); |
995 | ||
996 | return ret; | |
997 | } | |
998 | ||
46bcfad7 DD |
999 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1000 | { | |
1001 | int cpu; | |
1002 | struct acpi_processor *_pr; | |
3d339dcb | 1003 | struct cpuidle_device *dev; |
46bcfad7 DD |
1004 | |
1005 | if (disabled_by_idle_boot_param()) | |
1006 | return 0; | |
1007 | ||
46bcfad7 DD |
1008 | if (nocst) |
1009 | return -ENODEV; | |
1010 | ||
1011 | if (!pr->flags.power_setup_done) | |
1012 | return -ENODEV; | |
1013 | ||
1014 | /* | |
1015 | * FIXME: Design the ACPI notification to make it once per | |
1016 | * system instead of once per-cpu. This condition is a hack | |
1017 | * to make the code that updates C-States be called once. | |
1018 | */ | |
1019 | ||
9505626d | 1020 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 | 1021 | |
46bcfad7 DD |
1022 | /* Protect against cpu-hotplug */ |
1023 | get_online_cpus(); | |
6726655d | 1024 | cpuidle_pause_and_lock(); |
46bcfad7 DD |
1025 | |
1026 | /* Disable all cpuidle devices */ | |
1027 | for_each_online_cpu(cpu) { | |
1028 | _pr = per_cpu(processors, cpu); | |
1029 | if (!_pr || !_pr->flags.power_setup_done) | |
1030 | continue; | |
3d339dcb DL |
1031 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1032 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1033 | } |
1034 | ||
1035 | /* Populate Updated C-state information */ | |
f427e5f1 | 1036 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1037 | acpi_processor_setup_cpuidle_states(pr); |
1038 | ||
1039 | /* Enable all cpuidle devices */ | |
1040 | for_each_online_cpu(cpu) { | |
1041 | _pr = per_cpu(processors, cpu); | |
1042 | if (!_pr || !_pr->flags.power_setup_done) | |
1043 | continue; | |
1044 | acpi_processor_get_power_info(_pr); | |
1045 | if (_pr->flags.power) { | |
3d339dcb | 1046 | dev = per_cpu(acpi_cpuidle_device, cpu); |
6ef0f086 | 1047 | acpi_processor_setup_cpuidle_cx(_pr, dev); |
3d339dcb | 1048 | cpuidle_enable_device(dev); |
46bcfad7 DD |
1049 | } |
1050 | } | |
46bcfad7 | 1051 | cpuidle_resume_and_unlock(); |
6726655d | 1052 | put_online_cpus(); |
46bcfad7 DD |
1053 | } |
1054 | ||
1055 | return 0; | |
1056 | } | |
1057 | ||
1058 | static int acpi_processor_registered; | |
1059 | ||
fe7bf106 | 1060 | int acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1061 | { |
6fd8050a | 1062 | acpi_status status; |
46bcfad7 | 1063 | int retval; |
3d339dcb | 1064 | struct cpuidle_device *dev; |
b6835052 | 1065 | static int first_run; |
1da177e4 | 1066 | |
d1896049 | 1067 | if (disabled_by_idle_boot_param()) |
36a91358 | 1068 | return 0; |
1da177e4 LT |
1069 | |
1070 | if (!first_run) { | |
1071 | dmi_check_system(processor_power_dmi_table); | |
c1c30634 | 1072 | max_cstate = acpi_processor_cstate_check(max_cstate); |
1da177e4 | 1073 | if (max_cstate < ACPI_C_STATES_MAX) |
4be44fcd LB |
1074 | printk(KERN_NOTICE |
1075 | "ACPI: processor limited to max C-state %d\n", | |
1076 | max_cstate); | |
1da177e4 LT |
1077 | first_run++; |
1078 | } | |
1079 | ||
cee324b1 | 1080 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1081 | status = |
cee324b1 | 1082 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1083 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1084 | ACPI_EXCEPTION((AE_INFO, status, |
1085 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1086 | } |
1087 | } | |
1088 | ||
1089 | acpi_processor_get_power_info(pr); | |
4f86d3a8 | 1090 | pr->flags.power_setup_done = 1; |
1da177e4 LT |
1091 | |
1092 | /* | |
1093 | * Install the idle handler if processor power management is supported. | |
1094 | * Note that we use previously set idle handler will be used on | |
1095 | * platforms that only support C1. | |
1096 | */ | |
36a91358 | 1097 | if (pr->flags.power) { |
46bcfad7 DD |
1098 | /* Register acpi_idle_driver if not already registered */ |
1099 | if (!acpi_processor_registered) { | |
1100 | acpi_processor_setup_cpuidle_states(pr); | |
1101 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1102 | if (retval) | |
1103 | return retval; | |
1104 | printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", | |
1105 | acpi_idle_driver.name); | |
1106 | } | |
3d339dcb DL |
1107 | |
1108 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1109 | if (!dev) | |
1110 | return -ENOMEM; | |
1111 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1112 | ||
6ef0f086 | 1113 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1114 | |
46bcfad7 DD |
1115 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1116 | * must already be registered before registering device | |
1117 | */ | |
3d339dcb | 1118 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1119 | if (retval) { |
1120 | if (acpi_processor_registered == 0) | |
1121 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1122 | return retval; | |
1123 | } | |
1124 | acpi_processor_registered++; | |
1da177e4 | 1125 | } |
d550d98d | 1126 | return 0; |
1da177e4 LT |
1127 | } |
1128 | ||
38a991b6 | 1129 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1130 | { |
3d339dcb DL |
1131 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1132 | ||
d1896049 | 1133 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1134 | return 0; |
1135 | ||
46bcfad7 | 1136 | if (pr->flags.power) { |
3d339dcb | 1137 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1138 | acpi_processor_registered--; |
1139 | if (acpi_processor_registered == 0) | |
1140 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1141 | } | |
1da177e4 | 1142 | |
46bcfad7 | 1143 | pr->flags.power_setup_done = 0; |
d550d98d | 1144 | return 0; |
1da177e4 | 1145 | } |