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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
1da177e4 LT |
35 | #include <linux/kernel.h> |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
67846b30 | 50 | #include <linux/jiffies.h> |
378f058c | 51 | #include <linux/scatterlist.h> |
1da177e4 | 52 | #include <scsi/scsi.h> |
193515d5 | 53 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
54 | #include <scsi/scsi_host.h> |
55 | #include <linux/libata.h> | |
56 | #include <asm/io.h> | |
57 | #include <asm/semaphore.h> | |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
d7bb4cc7 | 62 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
e9c83914 TH |
63 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; |
64 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
65 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
d7bb4cc7 | 66 | |
3373efd8 TH |
67 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
68 | u16 heads, u16 sectors); | |
69 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
70 | static void ata_dev_xfermask(struct ata_device *dev); | |
1da177e4 LT |
71 | |
72 | static unsigned int ata_unique_id = 1; | |
73 | static struct workqueue_struct *ata_wq; | |
74 | ||
453b07ac TH |
75 | struct workqueue_struct *ata_aux_wq; |
76 | ||
418dc1f5 | 77 | int atapi_enabled = 1; |
1623c81e JG |
78 | module_param(atapi_enabled, int, 0444); |
79 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
80 | ||
95de719a AL |
81 | int atapi_dmadir = 0; |
82 | module_param(atapi_dmadir, int, 0444); | |
83 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
84 | ||
c3c013a2 JG |
85 | int libata_fua = 0; |
86 | module_param_named(fua, libata_fua, int, 0444); | |
87 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
88 | ||
a8601e5f AM |
89 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; |
90 | module_param(ata_probe_timeout, int, 0444); | |
91 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
92 | ||
1da177e4 LT |
93 | MODULE_AUTHOR("Jeff Garzik"); |
94 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
95 | MODULE_LICENSE("GPL"); | |
96 | MODULE_VERSION(DRV_VERSION); | |
97 | ||
0baab86b | 98 | |
1da177e4 LT |
99 | /** |
100 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
101 | * @tf: Taskfile to convert | |
102 | * @fis: Buffer into which data will output | |
103 | * @pmp: Port multiplier port | |
104 | * | |
105 | * Converts a standard ATA taskfile to a Serial ATA | |
106 | * FIS structure (Register - Host to Device). | |
107 | * | |
108 | * LOCKING: | |
109 | * Inherited from caller. | |
110 | */ | |
111 | ||
057ace5e | 112 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
113 | { |
114 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
115 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
116 | bit 7 indicates Command FIS */ | |
117 | fis[2] = tf->command; | |
118 | fis[3] = tf->feature; | |
119 | ||
120 | fis[4] = tf->lbal; | |
121 | fis[5] = tf->lbam; | |
122 | fis[6] = tf->lbah; | |
123 | fis[7] = tf->device; | |
124 | ||
125 | fis[8] = tf->hob_lbal; | |
126 | fis[9] = tf->hob_lbam; | |
127 | fis[10] = tf->hob_lbah; | |
128 | fis[11] = tf->hob_feature; | |
129 | ||
130 | fis[12] = tf->nsect; | |
131 | fis[13] = tf->hob_nsect; | |
132 | fis[14] = 0; | |
133 | fis[15] = tf->ctl; | |
134 | ||
135 | fis[16] = 0; | |
136 | fis[17] = 0; | |
137 | fis[18] = 0; | |
138 | fis[19] = 0; | |
139 | } | |
140 | ||
141 | /** | |
142 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
143 | * @fis: Buffer from which data will be input | |
144 | * @tf: Taskfile to output | |
145 | * | |
e12a1be6 | 146 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
147 | * |
148 | * LOCKING: | |
149 | * Inherited from caller. | |
150 | */ | |
151 | ||
057ace5e | 152 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
153 | { |
154 | tf->command = fis[2]; /* status */ | |
155 | tf->feature = fis[3]; /* error */ | |
156 | ||
157 | tf->lbal = fis[4]; | |
158 | tf->lbam = fis[5]; | |
159 | tf->lbah = fis[6]; | |
160 | tf->device = fis[7]; | |
161 | ||
162 | tf->hob_lbal = fis[8]; | |
163 | tf->hob_lbam = fis[9]; | |
164 | tf->hob_lbah = fis[10]; | |
165 | ||
166 | tf->nsect = fis[12]; | |
167 | tf->hob_nsect = fis[13]; | |
168 | } | |
169 | ||
8cbd6df1 AL |
170 | static const u8 ata_rw_cmds[] = { |
171 | /* pio multi */ | |
172 | ATA_CMD_READ_MULTI, | |
173 | ATA_CMD_WRITE_MULTI, | |
174 | ATA_CMD_READ_MULTI_EXT, | |
175 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
176 | 0, |
177 | 0, | |
178 | 0, | |
179 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
180 | /* pio */ |
181 | ATA_CMD_PIO_READ, | |
182 | ATA_CMD_PIO_WRITE, | |
183 | ATA_CMD_PIO_READ_EXT, | |
184 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
185 | 0, |
186 | 0, | |
187 | 0, | |
188 | 0, | |
8cbd6df1 AL |
189 | /* dma */ |
190 | ATA_CMD_READ, | |
191 | ATA_CMD_WRITE, | |
192 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
193 | ATA_CMD_WRITE_EXT, |
194 | 0, | |
195 | 0, | |
196 | 0, | |
197 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 198 | }; |
1da177e4 LT |
199 | |
200 | /** | |
8cbd6df1 | 201 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
bd056d7e TH |
202 | * @tf: command to examine and configure |
203 | * @dev: device tf belongs to | |
1da177e4 | 204 | * |
2e9edbf8 | 205 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 206 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
207 | * |
208 | * LOCKING: | |
209 | * caller. | |
210 | */ | |
bd056d7e | 211 | static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) |
1da177e4 | 212 | { |
9a3dccc4 | 213 | u8 cmd; |
1da177e4 | 214 | |
9a3dccc4 | 215 | int index, fua, lba48, write; |
2e9edbf8 | 216 | |
9a3dccc4 | 217 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
218 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
219 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 220 | |
8cbd6df1 AL |
221 | if (dev->flags & ATA_DFLAG_PIO) { |
222 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 223 | index = dev->multi_count ? 0 : 8; |
bd056d7e | 224 | } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) { |
8d238e01 AC |
225 | /* Unable to use DMA due to host limitation */ |
226 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 227 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
228 | } else { |
229 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 230 | index = 16; |
8cbd6df1 | 231 | } |
1da177e4 | 232 | |
9a3dccc4 TH |
233 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
234 | if (cmd) { | |
235 | tf->command = cmd; | |
236 | return 0; | |
237 | } | |
238 | return -1; | |
1da177e4 LT |
239 | } |
240 | ||
35b649fe TH |
241 | /** |
242 | * ata_tf_read_block - Read block address from ATA taskfile | |
243 | * @tf: ATA taskfile of interest | |
244 | * @dev: ATA device @tf belongs to | |
245 | * | |
246 | * LOCKING: | |
247 | * None. | |
248 | * | |
249 | * Read block address from @tf. This function can handle all | |
250 | * three address formats - LBA, LBA48 and CHS. tf->protocol and | |
251 | * flags select the address format to use. | |
252 | * | |
253 | * RETURNS: | |
254 | * Block address read from @tf. | |
255 | */ | |
256 | u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) | |
257 | { | |
258 | u64 block = 0; | |
259 | ||
260 | if (tf->flags & ATA_TFLAG_LBA) { | |
261 | if (tf->flags & ATA_TFLAG_LBA48) { | |
262 | block |= (u64)tf->hob_lbah << 40; | |
263 | block |= (u64)tf->hob_lbam << 32; | |
264 | block |= tf->hob_lbal << 24; | |
265 | } else | |
266 | block |= (tf->device & 0xf) << 24; | |
267 | ||
268 | block |= tf->lbah << 16; | |
269 | block |= tf->lbam << 8; | |
270 | block |= tf->lbal; | |
271 | } else { | |
272 | u32 cyl, head, sect; | |
273 | ||
274 | cyl = tf->lbam | (tf->lbah << 8); | |
275 | head = tf->device & 0xf; | |
276 | sect = tf->lbal; | |
277 | ||
278 | block = (cyl * dev->heads + head) * dev->sectors + sect; | |
279 | } | |
280 | ||
281 | return block; | |
282 | } | |
283 | ||
bd056d7e TH |
284 | /** |
285 | * ata_build_rw_tf - Build ATA taskfile for given read/write request | |
286 | * @tf: Target ATA taskfile | |
287 | * @dev: ATA device @tf belongs to | |
288 | * @block: Block address | |
289 | * @n_block: Number of blocks | |
290 | * @tf_flags: RW/FUA etc... | |
291 | * @tag: tag | |
292 | * | |
293 | * LOCKING: | |
294 | * None. | |
295 | * | |
296 | * Build ATA taskfile @tf for read/write request described by | |
297 | * @block, @n_block, @tf_flags and @tag on @dev. | |
298 | * | |
299 | * RETURNS: | |
300 | * | |
301 | * 0 on success, -ERANGE if the request is too large for @dev, | |
302 | * -EINVAL if the request is invalid. | |
303 | */ | |
304 | int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, | |
305 | u64 block, u32 n_block, unsigned int tf_flags, | |
306 | unsigned int tag) | |
307 | { | |
308 | tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
309 | tf->flags |= tf_flags; | |
310 | ||
311 | if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF | | |
70e6ad0c TH |
312 | ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ && |
313 | likely(tag != ATA_TAG_INTERNAL)) { | |
bd056d7e TH |
314 | /* yay, NCQ */ |
315 | if (!lba_48_ok(block, n_block)) | |
316 | return -ERANGE; | |
317 | ||
318 | tf->protocol = ATA_PROT_NCQ; | |
319 | tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; | |
320 | ||
321 | if (tf->flags & ATA_TFLAG_WRITE) | |
322 | tf->command = ATA_CMD_FPDMA_WRITE; | |
323 | else | |
324 | tf->command = ATA_CMD_FPDMA_READ; | |
325 | ||
326 | tf->nsect = tag << 3; | |
327 | tf->hob_feature = (n_block >> 8) & 0xff; | |
328 | tf->feature = n_block & 0xff; | |
329 | ||
330 | tf->hob_lbah = (block >> 40) & 0xff; | |
331 | tf->hob_lbam = (block >> 32) & 0xff; | |
332 | tf->hob_lbal = (block >> 24) & 0xff; | |
333 | tf->lbah = (block >> 16) & 0xff; | |
334 | tf->lbam = (block >> 8) & 0xff; | |
335 | tf->lbal = block & 0xff; | |
336 | ||
337 | tf->device = 1 << 6; | |
338 | if (tf->flags & ATA_TFLAG_FUA) | |
339 | tf->device |= 1 << 7; | |
340 | } else if (dev->flags & ATA_DFLAG_LBA) { | |
341 | tf->flags |= ATA_TFLAG_LBA; | |
342 | ||
343 | if (lba_28_ok(block, n_block)) { | |
344 | /* use LBA28 */ | |
345 | tf->device |= (block >> 24) & 0xf; | |
346 | } else if (lba_48_ok(block, n_block)) { | |
347 | if (!(dev->flags & ATA_DFLAG_LBA48)) | |
348 | return -ERANGE; | |
349 | ||
350 | /* use LBA48 */ | |
351 | tf->flags |= ATA_TFLAG_LBA48; | |
352 | ||
353 | tf->hob_nsect = (n_block >> 8) & 0xff; | |
354 | ||
355 | tf->hob_lbah = (block >> 40) & 0xff; | |
356 | tf->hob_lbam = (block >> 32) & 0xff; | |
357 | tf->hob_lbal = (block >> 24) & 0xff; | |
358 | } else | |
359 | /* request too large even for LBA48 */ | |
360 | return -ERANGE; | |
361 | ||
362 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
363 | return -EINVAL; | |
364 | ||
365 | tf->nsect = n_block & 0xff; | |
366 | ||
367 | tf->lbah = (block >> 16) & 0xff; | |
368 | tf->lbam = (block >> 8) & 0xff; | |
369 | tf->lbal = block & 0xff; | |
370 | ||
371 | tf->device |= ATA_LBA; | |
372 | } else { | |
373 | /* CHS */ | |
374 | u32 sect, head, cyl, track; | |
375 | ||
376 | /* The request -may- be too large for CHS addressing. */ | |
377 | if (!lba_28_ok(block, n_block)) | |
378 | return -ERANGE; | |
379 | ||
380 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
381 | return -EINVAL; | |
382 | ||
383 | /* Convert LBA to CHS */ | |
384 | track = (u32)block / dev->sectors; | |
385 | cyl = track / dev->heads; | |
386 | head = track % dev->heads; | |
387 | sect = (u32)block % dev->sectors + 1; | |
388 | ||
389 | DPRINTK("block %u track %u cyl %u head %u sect %u\n", | |
390 | (u32)block, track, cyl, head, sect); | |
391 | ||
392 | /* Check whether the converted CHS can fit. | |
393 | Cylinder: 0-65535 | |
394 | Head: 0-15 | |
395 | Sector: 1-255*/ | |
396 | if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) | |
397 | return -ERANGE; | |
398 | ||
399 | tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ | |
400 | tf->lbal = sect; | |
401 | tf->lbam = cyl; | |
402 | tf->lbah = cyl >> 8; | |
403 | tf->device |= head; | |
404 | } | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
cb95d562 TH |
409 | /** |
410 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
411 | * @pio_mask: pio_mask | |
412 | * @mwdma_mask: mwdma_mask | |
413 | * @udma_mask: udma_mask | |
414 | * | |
415 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
416 | * unsigned int xfer_mask. | |
417 | * | |
418 | * LOCKING: | |
419 | * None. | |
420 | * | |
421 | * RETURNS: | |
422 | * Packed xfer_mask. | |
423 | */ | |
424 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
425 | unsigned int mwdma_mask, | |
426 | unsigned int udma_mask) | |
427 | { | |
428 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
429 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
430 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
431 | } | |
432 | ||
c0489e4e TH |
433 | /** |
434 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
435 | * @xfer_mask: xfer_mask to unpack | |
436 | * @pio_mask: resulting pio_mask | |
437 | * @mwdma_mask: resulting mwdma_mask | |
438 | * @udma_mask: resulting udma_mask | |
439 | * | |
440 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
441 | * Any NULL distination masks will be ignored. | |
442 | */ | |
443 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
444 | unsigned int *pio_mask, | |
445 | unsigned int *mwdma_mask, | |
446 | unsigned int *udma_mask) | |
447 | { | |
448 | if (pio_mask) | |
449 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
450 | if (mwdma_mask) | |
451 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
452 | if (udma_mask) | |
453 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
454 | } | |
455 | ||
cb95d562 | 456 | static const struct ata_xfer_ent { |
be9a50c8 | 457 | int shift, bits; |
cb95d562 TH |
458 | u8 base; |
459 | } ata_xfer_tbl[] = { | |
460 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
461 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
462 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
463 | { -1, }, | |
464 | }; | |
465 | ||
466 | /** | |
467 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
468 | * @xfer_mask: xfer_mask of interest | |
469 | * | |
470 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
471 | * bit of @xfer_mask is considered. | |
472 | * | |
473 | * LOCKING: | |
474 | * None. | |
475 | * | |
476 | * RETURNS: | |
477 | * Matching XFER_* value, 0 if no match found. | |
478 | */ | |
479 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
480 | { | |
481 | int highbit = fls(xfer_mask) - 1; | |
482 | const struct ata_xfer_ent *ent; | |
483 | ||
484 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
485 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
486 | return ent->base + highbit - ent->shift; | |
487 | return 0; | |
488 | } | |
489 | ||
490 | /** | |
491 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
492 | * @xfer_mode: XFER_* of interest | |
493 | * | |
494 | * Return matching xfer_mask for @xfer_mode. | |
495 | * | |
496 | * LOCKING: | |
497 | * None. | |
498 | * | |
499 | * RETURNS: | |
500 | * Matching xfer_mask, 0 if no match found. | |
501 | */ | |
502 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
503 | { | |
504 | const struct ata_xfer_ent *ent; | |
505 | ||
506 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
507 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
508 | return 1 << (ent->shift + xfer_mode - ent->base); | |
509 | return 0; | |
510 | } | |
511 | ||
512 | /** | |
513 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
514 | * @xfer_mode: XFER_* of interest | |
515 | * | |
516 | * Return matching xfer_shift for @xfer_mode. | |
517 | * | |
518 | * LOCKING: | |
519 | * None. | |
520 | * | |
521 | * RETURNS: | |
522 | * Matching xfer_shift, -1 if no match found. | |
523 | */ | |
524 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
525 | { | |
526 | const struct ata_xfer_ent *ent; | |
527 | ||
528 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
529 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
530 | return ent->shift; | |
531 | return -1; | |
532 | } | |
533 | ||
1da177e4 | 534 | /** |
1da7b0d0 TH |
535 | * ata_mode_string - convert xfer_mask to string |
536 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
537 | * |
538 | * Determine string which represents the highest speed | |
1da7b0d0 | 539 | * (highest bit in @modemask). |
1da177e4 LT |
540 | * |
541 | * LOCKING: | |
542 | * None. | |
543 | * | |
544 | * RETURNS: | |
545 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 546 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 547 | */ |
1da7b0d0 | 548 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 549 | { |
75f554bc TH |
550 | static const char * const xfer_mode_str[] = { |
551 | "PIO0", | |
552 | "PIO1", | |
553 | "PIO2", | |
554 | "PIO3", | |
555 | "PIO4", | |
b352e57d AC |
556 | "PIO5", |
557 | "PIO6", | |
75f554bc TH |
558 | "MWDMA0", |
559 | "MWDMA1", | |
560 | "MWDMA2", | |
b352e57d AC |
561 | "MWDMA3", |
562 | "MWDMA4", | |
75f554bc TH |
563 | "UDMA/16", |
564 | "UDMA/25", | |
565 | "UDMA/33", | |
566 | "UDMA/44", | |
567 | "UDMA/66", | |
568 | "UDMA/100", | |
569 | "UDMA/133", | |
570 | "UDMA7", | |
571 | }; | |
1da7b0d0 | 572 | int highbit; |
1da177e4 | 573 | |
1da7b0d0 TH |
574 | highbit = fls(xfer_mask) - 1; |
575 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
576 | return xfer_mode_str[highbit]; | |
1da177e4 | 577 | return "<n/a>"; |
1da177e4 LT |
578 | } |
579 | ||
4c360c81 TH |
580 | static const char *sata_spd_string(unsigned int spd) |
581 | { | |
582 | static const char * const spd_str[] = { | |
583 | "1.5 Gbps", | |
584 | "3.0 Gbps", | |
585 | }; | |
586 | ||
587 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
588 | return "<unknown>"; | |
589 | return spd_str[spd - 1]; | |
590 | } | |
591 | ||
3373efd8 | 592 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 593 | { |
0dd4b21f | 594 | if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) { |
f15a1daf | 595 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
0b8efb0a TH |
596 | dev->class++; |
597 | } | |
598 | } | |
599 | ||
1da177e4 LT |
600 | /** |
601 | * ata_pio_devchk - PATA device presence detection | |
602 | * @ap: ATA channel to examine | |
603 | * @device: Device to examine (starting at zero) | |
604 | * | |
605 | * This technique was originally described in | |
606 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
607 | * later found its way into the ATA/ATAPI spec. | |
608 | * | |
609 | * Write a pattern to the ATA shadow registers, | |
610 | * and if a device is present, it will respond by | |
611 | * correctly storing and echoing back the | |
612 | * ATA shadow register contents. | |
613 | * | |
614 | * LOCKING: | |
615 | * caller. | |
616 | */ | |
617 | ||
618 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
619 | unsigned int device) | |
620 | { | |
621 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
622 | u8 nsect, lbal; | |
623 | ||
624 | ap->ops->dev_select(ap, device); | |
625 | ||
626 | outb(0x55, ioaddr->nsect_addr); | |
627 | outb(0xaa, ioaddr->lbal_addr); | |
628 | ||
629 | outb(0xaa, ioaddr->nsect_addr); | |
630 | outb(0x55, ioaddr->lbal_addr); | |
631 | ||
632 | outb(0x55, ioaddr->nsect_addr); | |
633 | outb(0xaa, ioaddr->lbal_addr); | |
634 | ||
635 | nsect = inb(ioaddr->nsect_addr); | |
636 | lbal = inb(ioaddr->lbal_addr); | |
637 | ||
638 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
639 | return 1; /* we found a device */ | |
640 | ||
641 | return 0; /* nothing found */ | |
642 | } | |
643 | ||
644 | /** | |
645 | * ata_mmio_devchk - PATA device presence detection | |
646 | * @ap: ATA channel to examine | |
647 | * @device: Device to examine (starting at zero) | |
648 | * | |
649 | * This technique was originally described in | |
650 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
651 | * later found its way into the ATA/ATAPI spec. | |
652 | * | |
653 | * Write a pattern to the ATA shadow registers, | |
654 | * and if a device is present, it will respond by | |
655 | * correctly storing and echoing back the | |
656 | * ATA shadow register contents. | |
657 | * | |
658 | * LOCKING: | |
659 | * caller. | |
660 | */ | |
661 | ||
662 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
663 | unsigned int device) | |
664 | { | |
665 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
666 | u8 nsect, lbal; | |
667 | ||
668 | ap->ops->dev_select(ap, device); | |
669 | ||
670 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
671 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
672 | ||
673 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
674 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
675 | ||
676 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
677 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
678 | ||
679 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
680 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
681 | ||
682 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
683 | return 1; /* we found a device */ | |
684 | ||
685 | return 0; /* nothing found */ | |
686 | } | |
687 | ||
688 | /** | |
689 | * ata_devchk - PATA device presence detection | |
690 | * @ap: ATA channel to examine | |
691 | * @device: Device to examine (starting at zero) | |
692 | * | |
693 | * Dispatch ATA device presence detection, depending | |
694 | * on whether we are using PIO or MMIO to talk to the | |
695 | * ATA shadow registers. | |
696 | * | |
697 | * LOCKING: | |
698 | * caller. | |
699 | */ | |
700 | ||
701 | static unsigned int ata_devchk(struct ata_port *ap, | |
702 | unsigned int device) | |
703 | { | |
704 | if (ap->flags & ATA_FLAG_MMIO) | |
705 | return ata_mmio_devchk(ap, device); | |
706 | return ata_pio_devchk(ap, device); | |
707 | } | |
708 | ||
709 | /** | |
710 | * ata_dev_classify - determine device type based on ATA-spec signature | |
711 | * @tf: ATA taskfile register set for device to be identified | |
712 | * | |
713 | * Determine from taskfile register contents whether a device is | |
714 | * ATA or ATAPI, as per "Signature and persistence" section | |
715 | * of ATA/PI spec (volume 1, sect 5.14). | |
716 | * | |
717 | * LOCKING: | |
718 | * None. | |
719 | * | |
720 | * RETURNS: | |
721 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
722 | * the event of failure. | |
723 | */ | |
724 | ||
057ace5e | 725 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
726 | { |
727 | /* Apple's open source Darwin code hints that some devices only | |
728 | * put a proper signature into the LBA mid/high registers, | |
729 | * So, we only check those. It's sufficient for uniqueness. | |
730 | */ | |
731 | ||
732 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
733 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
734 | DPRINTK("found ATA device by sig\n"); | |
735 | return ATA_DEV_ATA; | |
736 | } | |
737 | ||
738 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
739 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
740 | DPRINTK("found ATAPI device by sig\n"); | |
741 | return ATA_DEV_ATAPI; | |
742 | } | |
743 | ||
744 | DPRINTK("unknown device\n"); | |
745 | return ATA_DEV_UNKNOWN; | |
746 | } | |
747 | ||
748 | /** | |
749 | * ata_dev_try_classify - Parse returned ATA device signature | |
750 | * @ap: ATA channel to examine | |
751 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 752 | * @r_err: Value of error register on completion |
1da177e4 LT |
753 | * |
754 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
755 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
756 | * shadow registers, indicating the results of device detection | |
757 | * and diagnostics. | |
758 | * | |
759 | * Select the ATA device, and read the values from the ATA shadow | |
760 | * registers. Then parse according to the Error register value, | |
761 | * and the spec-defined values examined by ata_dev_classify(). | |
762 | * | |
763 | * LOCKING: | |
764 | * caller. | |
b4dc7623 TH |
765 | * |
766 | * RETURNS: | |
767 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
768 | */ |
769 | ||
b4dc7623 TH |
770 | static unsigned int |
771 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
1da177e4 | 772 | { |
1da177e4 LT |
773 | struct ata_taskfile tf; |
774 | unsigned int class; | |
775 | u8 err; | |
776 | ||
777 | ap->ops->dev_select(ap, device); | |
778 | ||
779 | memset(&tf, 0, sizeof(tf)); | |
780 | ||
1da177e4 | 781 | ap->ops->tf_read(ap, &tf); |
0169e284 | 782 | err = tf.feature; |
b4dc7623 TH |
783 | if (r_err) |
784 | *r_err = err; | |
1da177e4 | 785 | |
93590859 AC |
786 | /* see if device passed diags: if master then continue and warn later */ |
787 | if (err == 0 && device == 0) | |
788 | /* diagnostic fail : do nothing _YET_ */ | |
789 | ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC; | |
790 | else if (err == 1) | |
1da177e4 LT |
791 | /* do nothing */ ; |
792 | else if ((device == 0) && (err == 0x81)) | |
793 | /* do nothing */ ; | |
794 | else | |
b4dc7623 | 795 | return ATA_DEV_NONE; |
1da177e4 | 796 | |
b4dc7623 | 797 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 798 | class = ata_dev_classify(&tf); |
b4dc7623 | 799 | |
1da177e4 | 800 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 801 | return ATA_DEV_NONE; |
1da177e4 | 802 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
803 | return ATA_DEV_NONE; |
804 | return class; | |
1da177e4 LT |
805 | } |
806 | ||
807 | /** | |
6a62a04d | 808 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
809 | * @id: IDENTIFY DEVICE results we will examine |
810 | * @s: string into which data is output | |
811 | * @ofs: offset into identify device page | |
812 | * @len: length of string to return. must be an even number. | |
813 | * | |
814 | * The strings in the IDENTIFY DEVICE page are broken up into | |
815 | * 16-bit chunks. Run through the string, and output each | |
816 | * 8-bit chunk linearly, regardless of platform. | |
817 | * | |
818 | * LOCKING: | |
819 | * caller. | |
820 | */ | |
821 | ||
6a62a04d TH |
822 | void ata_id_string(const u16 *id, unsigned char *s, |
823 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
824 | { |
825 | unsigned int c; | |
826 | ||
827 | while (len > 0) { | |
828 | c = id[ofs] >> 8; | |
829 | *s = c; | |
830 | s++; | |
831 | ||
832 | c = id[ofs] & 0xff; | |
833 | *s = c; | |
834 | s++; | |
835 | ||
836 | ofs++; | |
837 | len -= 2; | |
838 | } | |
839 | } | |
840 | ||
0e949ff3 | 841 | /** |
6a62a04d | 842 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
843 | * @id: IDENTIFY DEVICE results we will examine |
844 | * @s: string into which data is output | |
845 | * @ofs: offset into identify device page | |
846 | * @len: length of string to return. must be an odd number. | |
847 | * | |
6a62a04d | 848 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
849 | * trims trailing spaces and terminates the resulting string with |
850 | * null. @len must be actual maximum length (even number) + 1. | |
851 | * | |
852 | * LOCKING: | |
853 | * caller. | |
854 | */ | |
6a62a04d TH |
855 | void ata_id_c_string(const u16 *id, unsigned char *s, |
856 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
857 | { |
858 | unsigned char *p; | |
859 | ||
860 | WARN_ON(!(len & 1)); | |
861 | ||
6a62a04d | 862 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
863 | |
864 | p = s + strnlen(s, len - 1); | |
865 | while (p > s && p[-1] == ' ') | |
866 | p--; | |
867 | *p = '\0'; | |
868 | } | |
0baab86b | 869 | |
2940740b TH |
870 | static u64 ata_id_n_sectors(const u16 *id) |
871 | { | |
872 | if (ata_id_has_lba(id)) { | |
873 | if (ata_id_has_lba48(id)) | |
874 | return ata_id_u64(id, 100); | |
875 | else | |
876 | return ata_id_u32(id, 60); | |
877 | } else { | |
878 | if (ata_id_current_chs_valid(id)) | |
879 | return ata_id_u32(id, 57); | |
880 | else | |
881 | return id[1] * id[3] * id[6]; | |
882 | } | |
883 | } | |
884 | ||
0baab86b EF |
885 | /** |
886 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
887 | * @ap: ATA channel to manipulate | |
888 | * @device: ATA device (numbered from zero) to select | |
889 | * | |
890 | * This function performs no actual function. | |
891 | * | |
892 | * May be used as the dev_select() entry in ata_port_operations. | |
893 | * | |
894 | * LOCKING: | |
895 | * caller. | |
896 | */ | |
1da177e4 LT |
897 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
898 | { | |
899 | } | |
900 | ||
0baab86b | 901 | |
1da177e4 LT |
902 | /** |
903 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
904 | * @ap: ATA channel to manipulate | |
905 | * @device: ATA device (numbered from zero) to select | |
906 | * | |
907 | * Use the method defined in the ATA specification to | |
908 | * make either device 0, or device 1, active on the | |
0baab86b EF |
909 | * ATA channel. Works with both PIO and MMIO. |
910 | * | |
911 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
912 | * |
913 | * LOCKING: | |
914 | * caller. | |
915 | */ | |
916 | ||
917 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
918 | { | |
919 | u8 tmp; | |
920 | ||
921 | if (device == 0) | |
922 | tmp = ATA_DEVICE_OBS; | |
923 | else | |
924 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
925 | ||
926 | if (ap->flags & ATA_FLAG_MMIO) { | |
927 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
928 | } else { | |
929 | outb(tmp, ap->ioaddr.device_addr); | |
930 | } | |
931 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
932 | } | |
933 | ||
934 | /** | |
935 | * ata_dev_select - Select device 0/1 on ATA bus | |
936 | * @ap: ATA channel to manipulate | |
937 | * @device: ATA device (numbered from zero) to select | |
938 | * @wait: non-zero to wait for Status register BSY bit to clear | |
939 | * @can_sleep: non-zero if context allows sleeping | |
940 | * | |
941 | * Use the method defined in the ATA specification to | |
942 | * make either device 0, or device 1, active on the | |
943 | * ATA channel. | |
944 | * | |
945 | * This is a high-level version of ata_std_dev_select(), | |
946 | * which additionally provides the services of inserting | |
947 | * the proper pauses and status polling, where needed. | |
948 | * | |
949 | * LOCKING: | |
950 | * caller. | |
951 | */ | |
952 | ||
953 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
954 | unsigned int wait, unsigned int can_sleep) | |
955 | { | |
88574551 | 956 | if (ata_msg_probe(ap)) |
0dd4b21f | 957 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: " |
88574551 | 958 | "device %u, wait %u\n", ap->id, device, wait); |
1da177e4 LT |
959 | |
960 | if (wait) | |
961 | ata_wait_idle(ap); | |
962 | ||
963 | ap->ops->dev_select(ap, device); | |
964 | ||
965 | if (wait) { | |
966 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
967 | msleep(150); | |
968 | ata_wait_idle(ap); | |
969 | } | |
970 | } | |
971 | ||
972 | /** | |
973 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 974 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 975 | * |
0bd3300a TH |
976 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
977 | * page. | |
1da177e4 LT |
978 | * |
979 | * LOCKING: | |
980 | * caller. | |
981 | */ | |
982 | ||
0bd3300a | 983 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
984 | { |
985 | DPRINTK("49==0x%04x " | |
986 | "53==0x%04x " | |
987 | "63==0x%04x " | |
988 | "64==0x%04x " | |
989 | "75==0x%04x \n", | |
0bd3300a TH |
990 | id[49], |
991 | id[53], | |
992 | id[63], | |
993 | id[64], | |
994 | id[75]); | |
1da177e4 LT |
995 | DPRINTK("80==0x%04x " |
996 | "81==0x%04x " | |
997 | "82==0x%04x " | |
998 | "83==0x%04x " | |
999 | "84==0x%04x \n", | |
0bd3300a TH |
1000 | id[80], |
1001 | id[81], | |
1002 | id[82], | |
1003 | id[83], | |
1004 | id[84]); | |
1da177e4 LT |
1005 | DPRINTK("88==0x%04x " |
1006 | "93==0x%04x\n", | |
0bd3300a TH |
1007 | id[88], |
1008 | id[93]); | |
1da177e4 LT |
1009 | } |
1010 | ||
cb95d562 TH |
1011 | /** |
1012 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
1013 | * @id: IDENTIFY data to compute xfer mask from | |
1014 | * | |
1015 | * Compute the xfermask for this device. This is not as trivial | |
1016 | * as it seems if we must consider early devices correctly. | |
1017 | * | |
1018 | * FIXME: pre IDE drive timing (do we care ?). | |
1019 | * | |
1020 | * LOCKING: | |
1021 | * None. | |
1022 | * | |
1023 | * RETURNS: | |
1024 | * Computed xfermask | |
1025 | */ | |
1026 | static unsigned int ata_id_xfermask(const u16 *id) | |
1027 | { | |
1028 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
1029 | ||
1030 | /* Usual case. Word 53 indicates word 64 is valid */ | |
1031 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
1032 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
1033 | pio_mask <<= 3; | |
1034 | pio_mask |= 0x7; | |
1035 | } else { | |
1036 | /* If word 64 isn't valid then Word 51 high byte holds | |
1037 | * the PIO timing number for the maximum. Turn it into | |
1038 | * a mask. | |
1039 | */ | |
46767aeb AC |
1040 | u8 mode = id[ATA_ID_OLD_PIO_MODES] & 0xFF; |
1041 | if (mode < 5) /* Valid PIO range */ | |
1042 | pio_mask = (2 << mode) - 1; | |
1043 | else | |
1044 | pio_mask = 1; | |
cb95d562 TH |
1045 | |
1046 | /* But wait.. there's more. Design your standards by | |
1047 | * committee and you too can get a free iordy field to | |
1048 | * process. However its the speeds not the modes that | |
1049 | * are supported... Note drivers using the timing API | |
1050 | * will get this right anyway | |
1051 | */ | |
1052 | } | |
1053 | ||
1054 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 | 1055 | |
b352e57d AC |
1056 | if (ata_id_is_cfa(id)) { |
1057 | /* | |
1058 | * Process compact flash extended modes | |
1059 | */ | |
1060 | int pio = id[163] & 0x7; | |
1061 | int dma = (id[163] >> 3) & 7; | |
1062 | ||
1063 | if (pio) | |
1064 | pio_mask |= (1 << 5); | |
1065 | if (pio > 1) | |
1066 | pio_mask |= (1 << 6); | |
1067 | if (dma) | |
1068 | mwdma_mask |= (1 << 3); | |
1069 | if (dma > 1) | |
1070 | mwdma_mask |= (1 << 4); | |
1071 | } | |
1072 | ||
fb21f0d0 TH |
1073 | udma_mask = 0; |
1074 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
1075 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
1076 | |
1077 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
1078 | } | |
1079 | ||
86e45b6b TH |
1080 | /** |
1081 | * ata_port_queue_task - Queue port_task | |
1082 | * @ap: The ata_port to queue port_task for | |
e2a7f77a RD |
1083 | * @fn: workqueue function to be scheduled |
1084 | * @data: data value to pass to workqueue function | |
1085 | * @delay: delay time for workqueue function | |
86e45b6b TH |
1086 | * |
1087 | * Schedule @fn(@data) for execution after @delay jiffies using | |
1088 | * port_task. There is one port_task per port and it's the | |
1089 | * user(low level driver)'s responsibility to make sure that only | |
1090 | * one task is active at any given time. | |
1091 | * | |
1092 | * libata core layer takes care of synchronization between | |
1093 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
1094 | * synchronization. | |
1095 | * | |
1096 | * LOCKING: | |
1097 | * Inherited from caller. | |
1098 | */ | |
1099 | void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data, | |
1100 | unsigned long delay) | |
1101 | { | |
1102 | int rc; | |
1103 | ||
b51e9e5d | 1104 | if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK) |
86e45b6b TH |
1105 | return; |
1106 | ||
1107 | PREPARE_WORK(&ap->port_task, fn, data); | |
1108 | ||
1109 | if (!delay) | |
1110 | rc = queue_work(ata_wq, &ap->port_task); | |
1111 | else | |
1112 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | |
1113 | ||
1114 | /* rc == 0 means that another user is using port task */ | |
1115 | WARN_ON(rc == 0); | |
1116 | } | |
1117 | ||
1118 | /** | |
1119 | * ata_port_flush_task - Flush port_task | |
1120 | * @ap: The ata_port to flush port_task for | |
1121 | * | |
1122 | * After this function completes, port_task is guranteed not to | |
1123 | * be running or scheduled. | |
1124 | * | |
1125 | * LOCKING: | |
1126 | * Kernel thread context (may sleep) | |
1127 | */ | |
1128 | void ata_port_flush_task(struct ata_port *ap) | |
1129 | { | |
1130 | unsigned long flags; | |
1131 | ||
1132 | DPRINTK("ENTER\n"); | |
1133 | ||
ba6a1308 | 1134 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 1135 | ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 1136 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b TH |
1137 | |
1138 | DPRINTK("flush #1\n"); | |
1139 | flush_workqueue(ata_wq); | |
1140 | ||
1141 | /* | |
1142 | * At this point, if a task is running, it's guaranteed to see | |
1143 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
1144 | * Cancel and flush. | |
1145 | */ | |
1146 | if (!cancel_delayed_work(&ap->port_task)) { | |
0dd4b21f | 1147 | if (ata_msg_ctl(ap)) |
88574551 TH |
1148 | ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n", |
1149 | __FUNCTION__); | |
86e45b6b TH |
1150 | flush_workqueue(ata_wq); |
1151 | } | |
1152 | ||
ba6a1308 | 1153 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 1154 | ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 1155 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b | 1156 | |
0dd4b21f BP |
1157 | if (ata_msg_ctl(ap)) |
1158 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
86e45b6b TH |
1159 | } |
1160 | ||
77853bf2 | 1161 | void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 1162 | { |
77853bf2 | 1163 | struct completion *waiting = qc->private_data; |
a2a7a662 | 1164 | |
a2a7a662 | 1165 | complete(waiting); |
a2a7a662 TH |
1166 | } |
1167 | ||
1168 | /** | |
2432697b | 1169 | * ata_exec_internal_sg - execute libata internal command |
a2a7a662 TH |
1170 | * @dev: Device to which the command is sent |
1171 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 1172 | * @cdb: CDB for packet command |
a2a7a662 | 1173 | * @dma_dir: Data tranfer direction of the command |
2432697b TH |
1174 | * @sg: sg list for the data buffer of the command |
1175 | * @n_elem: Number of sg entries | |
a2a7a662 TH |
1176 | * |
1177 | * Executes libata internal command with timeout. @tf contains | |
1178 | * command on entry and result on return. Timeout and error | |
1179 | * conditions are reported via return value. No recovery action | |
1180 | * is taken after a command times out. It's caller's duty to | |
1181 | * clean up after timeout. | |
1182 | * | |
1183 | * LOCKING: | |
1184 | * None. Should be called with kernel context, might sleep. | |
551e8889 TH |
1185 | * |
1186 | * RETURNS: | |
1187 | * Zero on success, AC_ERR_* mask on failure | |
a2a7a662 | 1188 | */ |
2432697b TH |
1189 | unsigned ata_exec_internal_sg(struct ata_device *dev, |
1190 | struct ata_taskfile *tf, const u8 *cdb, | |
1191 | int dma_dir, struct scatterlist *sg, | |
1192 | unsigned int n_elem) | |
a2a7a662 | 1193 | { |
3373efd8 | 1194 | struct ata_port *ap = dev->ap; |
a2a7a662 TH |
1195 | u8 command = tf->command; |
1196 | struct ata_queued_cmd *qc; | |
2ab7db1f | 1197 | unsigned int tag, preempted_tag; |
dedaf2b0 | 1198 | u32 preempted_sactive, preempted_qc_active; |
60be6b9a | 1199 | DECLARE_COMPLETION_ONSTACK(wait); |
a2a7a662 | 1200 | unsigned long flags; |
77853bf2 | 1201 | unsigned int err_mask; |
d95a717f | 1202 | int rc; |
a2a7a662 | 1203 | |
ba6a1308 | 1204 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 | 1205 | |
e3180499 | 1206 | /* no internal command while frozen */ |
b51e9e5d | 1207 | if (ap->pflags & ATA_PFLAG_FROZEN) { |
ba6a1308 | 1208 | spin_unlock_irqrestore(ap->lock, flags); |
e3180499 TH |
1209 | return AC_ERR_SYSTEM; |
1210 | } | |
1211 | ||
2ab7db1f | 1212 | /* initialize internal qc */ |
a2a7a662 | 1213 | |
2ab7db1f TH |
1214 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1215 | * drivers choke if any other tag is given. This breaks | |
1216 | * ata_tag_internal() test for those drivers. Don't use new | |
1217 | * EH stuff without converting to it. | |
1218 | */ | |
1219 | if (ap->ops->error_handler) | |
1220 | tag = ATA_TAG_INTERNAL; | |
1221 | else | |
1222 | tag = 0; | |
1223 | ||
6cec4a39 | 1224 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1225 | BUG(); |
f69499f4 | 1226 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1227 | |
1228 | qc->tag = tag; | |
1229 | qc->scsicmd = NULL; | |
1230 | qc->ap = ap; | |
1231 | qc->dev = dev; | |
1232 | ata_qc_reinit(qc); | |
1233 | ||
1234 | preempted_tag = ap->active_tag; | |
dedaf2b0 TH |
1235 | preempted_sactive = ap->sactive; |
1236 | preempted_qc_active = ap->qc_active; | |
2ab7db1f | 1237 | ap->active_tag = ATA_TAG_POISON; |
dedaf2b0 TH |
1238 | ap->sactive = 0; |
1239 | ap->qc_active = 0; | |
2ab7db1f TH |
1240 | |
1241 | /* prepare & issue qc */ | |
a2a7a662 | 1242 | qc->tf = *tf; |
d69cf37d TH |
1243 | if (cdb) |
1244 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1245 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1246 | qc->dma_dir = dma_dir; |
1247 | if (dma_dir != DMA_NONE) { | |
2432697b TH |
1248 | unsigned int i, buflen = 0; |
1249 | ||
1250 | for (i = 0; i < n_elem; i++) | |
1251 | buflen += sg[i].length; | |
1252 | ||
1253 | ata_sg_init(qc, sg, n_elem); | |
a2a7a662 TH |
1254 | qc->nsect = buflen / ATA_SECT_SIZE; |
1255 | } | |
1256 | ||
77853bf2 | 1257 | qc->private_data = &wait; |
a2a7a662 TH |
1258 | qc->complete_fn = ata_qc_complete_internal; |
1259 | ||
8e0e694a | 1260 | ata_qc_issue(qc); |
a2a7a662 | 1261 | |
ba6a1308 | 1262 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 | 1263 | |
a8601e5f | 1264 | rc = wait_for_completion_timeout(&wait, ata_probe_timeout); |
d95a717f TH |
1265 | |
1266 | ata_port_flush_task(ap); | |
41ade50c | 1267 | |
d95a717f | 1268 | if (!rc) { |
ba6a1308 | 1269 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 TH |
1270 | |
1271 | /* We're racing with irq here. If we lose, the | |
1272 | * following test prevents us from completing the qc | |
d95a717f TH |
1273 | * twice. If we win, the port is frozen and will be |
1274 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1275 | */ |
77853bf2 | 1276 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1277 | qc->err_mask |= AC_ERR_TIMEOUT; |
1278 | ||
1279 | if (ap->ops->error_handler) | |
1280 | ata_port_freeze(ap); | |
1281 | else | |
1282 | ata_qc_complete(qc); | |
f15a1daf | 1283 | |
0dd4b21f BP |
1284 | if (ata_msg_warn(ap)) |
1285 | ata_dev_printk(dev, KERN_WARNING, | |
88574551 | 1286 | "qc timeout (cmd 0x%x)\n", command); |
a2a7a662 TH |
1287 | } |
1288 | ||
ba6a1308 | 1289 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 TH |
1290 | } |
1291 | ||
d95a717f TH |
1292 | /* do post_internal_cmd */ |
1293 | if (ap->ops->post_internal_cmd) | |
1294 | ap->ops->post_internal_cmd(qc); | |
1295 | ||
1296 | if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) { | |
0dd4b21f | 1297 | if (ata_msg_warn(ap)) |
88574551 | 1298 | ata_dev_printk(dev, KERN_WARNING, |
0dd4b21f | 1299 | "zero err_mask for failed " |
88574551 | 1300 | "internal command, assuming AC_ERR_OTHER\n"); |
d95a717f TH |
1301 | qc->err_mask |= AC_ERR_OTHER; |
1302 | } | |
1303 | ||
15869303 | 1304 | /* finish up */ |
ba6a1308 | 1305 | spin_lock_irqsave(ap->lock, flags); |
15869303 | 1306 | |
e61e0672 | 1307 | *tf = qc->result_tf; |
77853bf2 TH |
1308 | err_mask = qc->err_mask; |
1309 | ||
1310 | ata_qc_free(qc); | |
2ab7db1f | 1311 | ap->active_tag = preempted_tag; |
dedaf2b0 TH |
1312 | ap->sactive = preempted_sactive; |
1313 | ap->qc_active = preempted_qc_active; | |
77853bf2 | 1314 | |
1f7dd3e9 TH |
1315 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1316 | * Until those drivers are fixed, we detect the condition | |
1317 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1318 | * port. | |
1319 | * | |
1320 | * Note that this doesn't change any behavior as internal | |
1321 | * command failure results in disabling the device in the | |
1322 | * higher layer for LLDDs without new reset/EH callbacks. | |
1323 | * | |
1324 | * Kill the following code as soon as those drivers are fixed. | |
1325 | */ | |
198e0fed | 1326 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1327 | err_mask |= AC_ERR_SYSTEM; |
1328 | ata_port_probe(ap); | |
1329 | } | |
1330 | ||
ba6a1308 | 1331 | spin_unlock_irqrestore(ap->lock, flags); |
15869303 | 1332 | |
77853bf2 | 1333 | return err_mask; |
a2a7a662 TH |
1334 | } |
1335 | ||
2432697b TH |
1336 | /** |
1337 | * ata_exec_internal_sg - execute libata internal command | |
1338 | * @dev: Device to which the command is sent | |
1339 | * @tf: Taskfile registers for the command and the result | |
1340 | * @cdb: CDB for packet command | |
1341 | * @dma_dir: Data tranfer direction of the command | |
1342 | * @buf: Data buffer of the command | |
1343 | * @buflen: Length of data buffer | |
1344 | * | |
1345 | * Wrapper around ata_exec_internal_sg() which takes simple | |
1346 | * buffer instead of sg list. | |
1347 | * | |
1348 | * LOCKING: | |
1349 | * None. Should be called with kernel context, might sleep. | |
1350 | * | |
1351 | * RETURNS: | |
1352 | * Zero on success, AC_ERR_* mask on failure | |
1353 | */ | |
1354 | unsigned ata_exec_internal(struct ata_device *dev, | |
1355 | struct ata_taskfile *tf, const u8 *cdb, | |
1356 | int dma_dir, void *buf, unsigned int buflen) | |
1357 | { | |
1358 | struct scatterlist sg; | |
1359 | ||
1360 | sg_init_one(&sg, buf, buflen); | |
1361 | ||
1362 | return ata_exec_internal_sg(dev, tf, cdb, dma_dir, &sg, 1); | |
1363 | } | |
1364 | ||
977e6b9f TH |
1365 | /** |
1366 | * ata_do_simple_cmd - execute simple internal command | |
1367 | * @dev: Device to which the command is sent | |
1368 | * @cmd: Opcode to execute | |
1369 | * | |
1370 | * Execute a 'simple' command, that only consists of the opcode | |
1371 | * 'cmd' itself, without filling any other registers | |
1372 | * | |
1373 | * LOCKING: | |
1374 | * Kernel thread context (may sleep). | |
1375 | * | |
1376 | * RETURNS: | |
1377 | * Zero on success, AC_ERR_* mask on failure | |
e58eb583 | 1378 | */ |
77b08fb5 | 1379 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
e58eb583 TH |
1380 | { |
1381 | struct ata_taskfile tf; | |
e58eb583 TH |
1382 | |
1383 | ata_tf_init(dev, &tf); | |
1384 | ||
1385 | tf.command = cmd; | |
1386 | tf.flags |= ATA_TFLAG_DEVICE; | |
1387 | tf.protocol = ATA_PROT_NODATA; | |
1388 | ||
977e6b9f | 1389 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
e58eb583 TH |
1390 | } |
1391 | ||
1bc4ccff AC |
1392 | /** |
1393 | * ata_pio_need_iordy - check if iordy needed | |
1394 | * @adev: ATA device | |
1395 | * | |
1396 | * Check if the current speed of the device requires IORDY. Used | |
1397 | * by various controllers for chip configuration. | |
1398 | */ | |
1399 | ||
1400 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1401 | { | |
1402 | int pio; | |
1403 | int speed = adev->pio_mode - XFER_PIO_0; | |
1404 | ||
1405 | if (speed < 2) | |
1406 | return 0; | |
1407 | if (speed > 2) | |
1408 | return 1; | |
2e9edbf8 | 1409 | |
1bc4ccff AC |
1410 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1411 | ||
1412 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1413 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1414 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1415 | if (pio) { | |
1416 | /* This is cycle times not frequency - watch the logic! */ | |
1417 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1418 | return 1; | |
1419 | return 0; | |
1420 | } | |
1421 | } | |
1422 | return 0; | |
1423 | } | |
1424 | ||
1da177e4 | 1425 | /** |
49016aca | 1426 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1427 | * @dev: target device |
1428 | * @p_class: pointer to class of the target device (may be changed) | |
bff04647 | 1429 | * @flags: ATA_READID_* flags |
fe635c7e | 1430 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1431 | * |
49016aca TH |
1432 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1433 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1434 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1435 | * for pre-ATA4 drives. | |
1da177e4 LT |
1436 | * |
1437 | * LOCKING: | |
49016aca TH |
1438 | * Kernel thread context (may sleep) |
1439 | * | |
1440 | * RETURNS: | |
1441 | * 0 on success, -errno otherwise. | |
1da177e4 | 1442 | */ |
a9beec95 | 1443 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
bff04647 | 1444 | unsigned int flags, u16 *id) |
1da177e4 | 1445 | { |
3373efd8 | 1446 | struct ata_port *ap = dev->ap; |
49016aca | 1447 | unsigned int class = *p_class; |
a0123703 | 1448 | struct ata_taskfile tf; |
49016aca TH |
1449 | unsigned int err_mask = 0; |
1450 | const char *reason; | |
1451 | int rc; | |
1da177e4 | 1452 | |
0dd4b21f | 1453 | if (ata_msg_ctl(ap)) |
88574551 TH |
1454 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1455 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1456 | |
49016aca | 1457 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
1da177e4 | 1458 | |
49016aca | 1459 | retry: |
3373efd8 | 1460 | ata_tf_init(dev, &tf); |
a0123703 | 1461 | |
49016aca TH |
1462 | switch (class) { |
1463 | case ATA_DEV_ATA: | |
a0123703 | 1464 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1465 | break; |
1466 | case ATA_DEV_ATAPI: | |
a0123703 | 1467 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1468 | break; |
1469 | default: | |
1470 | rc = -ENODEV; | |
1471 | reason = "unsupported class"; | |
1472 | goto err_out; | |
1da177e4 LT |
1473 | } |
1474 | ||
a0123703 | 1475 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1476 | |
55a8e2c8 TH |
1477 | /* presence detection using polling IDENTIFY? */ |
1478 | if (flags & ATA_READID_DETECT) | |
1479 | tf.flags |= ATA_TFLAG_POLLING; | |
1480 | ||
3373efd8 | 1481 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
49016aca | 1482 | id, sizeof(id[0]) * ATA_ID_WORDS); |
a0123703 | 1483 | if (err_mask) { |
55a8e2c8 TH |
1484 | if ((flags & ATA_READID_DETECT) && |
1485 | (err_mask & AC_ERR_NODEV_HINT)) { | |
1486 | DPRINTK("ata%u.%d: NODEV after polling detection\n", | |
1487 | ap->id, dev->devno); | |
1488 | return -ENOENT; | |
1489 | } | |
1490 | ||
49016aca TH |
1491 | rc = -EIO; |
1492 | reason = "I/O error"; | |
1da177e4 LT |
1493 | goto err_out; |
1494 | } | |
1495 | ||
49016aca | 1496 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1497 | |
49016aca | 1498 | /* sanity check */ |
a4f5749b TH |
1499 | rc = -EINVAL; |
1500 | reason = "device reports illegal type"; | |
1501 | ||
1502 | if (class == ATA_DEV_ATA) { | |
1503 | if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) | |
1504 | goto err_out; | |
1505 | } else { | |
1506 | if (ata_id_is_ata(id)) | |
1507 | goto err_out; | |
49016aca TH |
1508 | } |
1509 | ||
bff04647 | 1510 | if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { |
49016aca TH |
1511 | /* |
1512 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1513 | * SRST RESET | |
1514 | * IDENTIFY | |
1515 | * INITIALIZE DEVICE PARAMETERS | |
1516 | * anything else.. | |
1517 | * Some drives were very specific about that exact sequence. | |
1518 | */ | |
1519 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1520 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1521 | if (err_mask) { |
1522 | rc = -EIO; | |
1523 | reason = "INIT_DEV_PARAMS failed"; | |
1524 | goto err_out; | |
1525 | } | |
1526 | ||
1527 | /* current CHS translation info (id[53-58]) might be | |
1528 | * changed. reread the identify device info. | |
1529 | */ | |
bff04647 | 1530 | flags &= ~ATA_READID_POSTRESET; |
49016aca TH |
1531 | goto retry; |
1532 | } | |
1533 | } | |
1534 | ||
1535 | *p_class = class; | |
fe635c7e | 1536 | |
49016aca TH |
1537 | return 0; |
1538 | ||
1539 | err_out: | |
88574551 | 1540 | if (ata_msg_warn(ap)) |
0dd4b21f | 1541 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
88574551 | 1542 | "(%s, err_mask=0x%x)\n", reason, err_mask); |
49016aca TH |
1543 | return rc; |
1544 | } | |
1545 | ||
3373efd8 | 1546 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1547 | { |
3373efd8 | 1548 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
4b2f3ede TH |
1549 | } |
1550 | ||
a6e6ce8e TH |
1551 | static void ata_dev_config_ncq(struct ata_device *dev, |
1552 | char *desc, size_t desc_sz) | |
1553 | { | |
1554 | struct ata_port *ap = dev->ap; | |
1555 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); | |
1556 | ||
1557 | if (!ata_id_has_ncq(dev->id)) { | |
1558 | desc[0] = '\0'; | |
1559 | return; | |
1560 | } | |
6919a0a6 AC |
1561 | if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) { |
1562 | snprintf(desc, desc_sz, "NCQ (not used)"); | |
1563 | return; | |
1564 | } | |
a6e6ce8e | 1565 | if (ap->flags & ATA_FLAG_NCQ) { |
cca3974e | 1566 | hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); |
a6e6ce8e TH |
1567 | dev->flags |= ATA_DFLAG_NCQ; |
1568 | } | |
1569 | ||
1570 | if (hdepth >= ddepth) | |
1571 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1572 | else | |
1573 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1574 | } | |
1575 | ||
e6d902a3 BK |
1576 | static void ata_set_port_max_cmd_len(struct ata_port *ap) |
1577 | { | |
1578 | int i; | |
1579 | ||
cca3974e JG |
1580 | if (ap->scsi_host) { |
1581 | unsigned int len = 0; | |
1582 | ||
e6d902a3 | 1583 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
cca3974e JG |
1584 | len = max(len, ap->device[i].cdb_len); |
1585 | ||
1586 | ap->scsi_host->max_cmd_len = len; | |
e6d902a3 BK |
1587 | } |
1588 | } | |
1589 | ||
49016aca | 1590 | /** |
ffeae418 | 1591 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 TH |
1592 | * @dev: Target device to configure |
1593 | * | |
1594 | * Configure @dev according to @dev->id. Generic and low-level | |
1595 | * driver specific fixups are also applied. | |
49016aca TH |
1596 | * |
1597 | * LOCKING: | |
ffeae418 TH |
1598 | * Kernel thread context (may sleep) |
1599 | * | |
1600 | * RETURNS: | |
1601 | * 0 on success, -errno otherwise | |
49016aca | 1602 | */ |
efdaedc4 | 1603 | int ata_dev_configure(struct ata_device *dev) |
49016aca | 1604 | { |
3373efd8 | 1605 | struct ata_port *ap = dev->ap; |
efdaedc4 | 1606 | int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; |
1148c3a7 | 1607 | const u16 *id = dev->id; |
ff8854b2 | 1608 | unsigned int xfer_mask; |
b352e57d | 1609 | char revbuf[7]; /* XYZ-99\0 */ |
e6d902a3 | 1610 | int rc; |
49016aca | 1611 | |
0dd4b21f | 1612 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { |
88574551 TH |
1613 | ata_dev_printk(dev, KERN_INFO, |
1614 | "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1615 | __FUNCTION__, ap->id, dev->devno); | |
ffeae418 | 1616 | return 0; |
49016aca TH |
1617 | } |
1618 | ||
0dd4b21f | 1619 | if (ata_msg_probe(ap)) |
88574551 TH |
1620 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1621 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1622 | |
c39f5ebe | 1623 | /* print device capabilities */ |
0dd4b21f | 1624 | if (ata_msg_probe(ap)) |
88574551 TH |
1625 | ata_dev_printk(dev, KERN_DEBUG, |
1626 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
1627 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
0dd4b21f | 1628 | __FUNCTION__, |
f15a1daf TH |
1629 | id[49], id[82], id[83], id[84], |
1630 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1631 | |
208a9933 | 1632 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1633 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1634 | dev->max_sectors = 0; |
1635 | dev->cdb_len = 0; | |
1636 | dev->n_sectors = 0; | |
1637 | dev->cylinders = 0; | |
1638 | dev->heads = 0; | |
1639 | dev->sectors = 0; | |
1640 | ||
1da177e4 LT |
1641 | /* |
1642 | * common ATA, ATAPI feature tests | |
1643 | */ | |
1644 | ||
ff8854b2 | 1645 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1646 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1647 | |
0dd4b21f BP |
1648 | if (ata_msg_probe(ap)) |
1649 | ata_dump_id(id); | |
1da177e4 LT |
1650 | |
1651 | /* ATA-specific feature tests */ | |
1652 | if (dev->class == ATA_DEV_ATA) { | |
b352e57d AC |
1653 | if (ata_id_is_cfa(id)) { |
1654 | if (id[162] & 1) /* CPRM may make this media unusable */ | |
1655 | ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n", | |
1656 | ap->id, dev->devno); | |
1657 | snprintf(revbuf, 7, "CFA"); | |
1658 | } | |
1659 | else | |
1660 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | |
1661 | ||
1148c3a7 | 1662 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1663 | |
1148c3a7 | 1664 | if (ata_id_has_lba(id)) { |
4c2d721a | 1665 | const char *lba_desc; |
a6e6ce8e | 1666 | char ncq_desc[20]; |
8bf62ece | 1667 | |
4c2d721a TH |
1668 | lba_desc = "LBA"; |
1669 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1670 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1671 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a | 1672 | lba_desc = "LBA48"; |
6fc49adb TH |
1673 | |
1674 | if (dev->n_sectors >= (1UL << 28) && | |
1675 | ata_id_has_flush_ext(id)) | |
1676 | dev->flags |= ATA_DFLAG_FLUSH_EXT; | |
4c2d721a | 1677 | } |
8bf62ece | 1678 | |
a6e6ce8e TH |
1679 | /* config NCQ */ |
1680 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
1681 | ||
8bf62ece | 1682 | /* print device info to dmesg */ |
5afc8142 | 1683 | if (ata_msg_drv(ap) && print_info) |
b352e57d | 1684 | ata_dev_printk(dev, KERN_INFO, "%s, " |
a6e6ce8e | 1685 | "max %s, %Lu sectors: %s %s\n", |
b352e57d | 1686 | revbuf, |
f15a1daf TH |
1687 | ata_mode_string(xfer_mask), |
1688 | (unsigned long long)dev->n_sectors, | |
a6e6ce8e | 1689 | lba_desc, ncq_desc); |
ffeae418 | 1690 | } else { |
8bf62ece AL |
1691 | /* CHS */ |
1692 | ||
1693 | /* Default translation */ | |
1148c3a7 TH |
1694 | dev->cylinders = id[1]; |
1695 | dev->heads = id[3]; | |
1696 | dev->sectors = id[6]; | |
8bf62ece | 1697 | |
1148c3a7 | 1698 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 1699 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
1700 | dev->cylinders = id[54]; |
1701 | dev->heads = id[55]; | |
1702 | dev->sectors = id[56]; | |
8bf62ece AL |
1703 | } |
1704 | ||
1705 | /* print device info to dmesg */ | |
5afc8142 | 1706 | if (ata_msg_drv(ap) && print_info) |
b352e57d | 1707 | ata_dev_printk(dev, KERN_INFO, "%s, " |
f15a1daf | 1708 | "max %s, %Lu sectors: CHS %u/%u/%u\n", |
b352e57d | 1709 | revbuf, |
f15a1daf TH |
1710 | ata_mode_string(xfer_mask), |
1711 | (unsigned long long)dev->n_sectors, | |
88574551 TH |
1712 | dev->cylinders, dev->heads, |
1713 | dev->sectors); | |
1da177e4 LT |
1714 | } |
1715 | ||
07f6f7d0 AL |
1716 | if (dev->id[59] & 0x100) { |
1717 | dev->multi_count = dev->id[59] & 0xff; | |
5afc8142 | 1718 | if (ata_msg_drv(ap) && print_info) |
88574551 TH |
1719 | ata_dev_printk(dev, KERN_INFO, |
1720 | "ata%u: dev %u multi count %u\n", | |
1721 | ap->id, dev->devno, dev->multi_count); | |
07f6f7d0 AL |
1722 | } |
1723 | ||
6e7846e9 | 1724 | dev->cdb_len = 16; |
1da177e4 LT |
1725 | } |
1726 | ||
1727 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1728 | else if (dev->class == ATA_DEV_ATAPI) { |
08a556db AL |
1729 | char *cdb_intr_string = ""; |
1730 | ||
1148c3a7 | 1731 | rc = atapi_cdb_len(id); |
1da177e4 | 1732 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
0dd4b21f | 1733 | if (ata_msg_warn(ap)) |
88574551 TH |
1734 | ata_dev_printk(dev, KERN_WARNING, |
1735 | "unsupported CDB len\n"); | |
ffeae418 | 1736 | rc = -EINVAL; |
1da177e4 LT |
1737 | goto err_out_nosup; |
1738 | } | |
6e7846e9 | 1739 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 1740 | |
08a556db | 1741 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 1742 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
1743 | cdb_intr_string = ", CDB intr"; |
1744 | } | |
312f7da2 | 1745 | |
1da177e4 | 1746 | /* print device info to dmesg */ |
5afc8142 | 1747 | if (ata_msg_drv(ap) && print_info) |
12436c30 TH |
1748 | ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n", |
1749 | ata_mode_string(xfer_mask), | |
1750 | cdb_intr_string); | |
1da177e4 LT |
1751 | } |
1752 | ||
914ed354 TH |
1753 | /* determine max_sectors */ |
1754 | dev->max_sectors = ATA_MAX_SECTORS; | |
1755 | if (dev->flags & ATA_DFLAG_LBA48) | |
1756 | dev->max_sectors = ATA_MAX_SECTORS_LBA48; | |
1757 | ||
93590859 AC |
1758 | if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { |
1759 | /* Let the user know. We don't want to disallow opens for | |
1760 | rescue purposes, or in case the vendor is just a blithering | |
1761 | idiot */ | |
1762 | if (print_info) { | |
1763 | ata_dev_printk(dev, KERN_WARNING, | |
1764 | "Drive reports diagnostics failure. This may indicate a drive\n"); | |
1765 | ata_dev_printk(dev, KERN_WARNING, | |
1766 | "fault or invalid emulation. Contact drive vendor for information.\n"); | |
1767 | } | |
1768 | } | |
1769 | ||
e6d902a3 | 1770 | ata_set_port_max_cmd_len(ap); |
6e7846e9 | 1771 | |
4b2f3ede | 1772 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 1773 | if (ata_dev_knobble(dev)) { |
5afc8142 | 1774 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
1775 | ata_dev_printk(dev, KERN_INFO, |
1776 | "applying bridge limits\n"); | |
5a529139 | 1777 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
1778 | dev->max_sectors = ATA_MAX_SECTORS; |
1779 | } | |
1780 | ||
1781 | if (ap->ops->dev_config) | |
1782 | ap->ops->dev_config(ap, dev); | |
1783 | ||
0dd4b21f BP |
1784 | if (ata_msg_probe(ap)) |
1785 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
1786 | __FUNCTION__, ata_chk_status(ap)); | |
ffeae418 | 1787 | return 0; |
1da177e4 LT |
1788 | |
1789 | err_out_nosup: | |
0dd4b21f | 1790 | if (ata_msg_probe(ap)) |
88574551 TH |
1791 | ata_dev_printk(dev, KERN_DEBUG, |
1792 | "%s: EXIT, err\n", __FUNCTION__); | |
ffeae418 | 1793 | return rc; |
1da177e4 LT |
1794 | } |
1795 | ||
1796 | /** | |
1797 | * ata_bus_probe - Reset and probe ATA bus | |
1798 | * @ap: Bus to probe | |
1799 | * | |
0cba632b JG |
1800 | * Master ATA bus probing function. Initiates a hardware-dependent |
1801 | * bus reset, then attempts to identify any devices found on | |
1802 | * the bus. | |
1803 | * | |
1da177e4 | 1804 | * LOCKING: |
0cba632b | 1805 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1806 | * |
1807 | * RETURNS: | |
96072e69 | 1808 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
1809 | */ |
1810 | ||
80289167 | 1811 | int ata_bus_probe(struct ata_port *ap) |
1da177e4 | 1812 | { |
28ca5c57 | 1813 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 TH |
1814 | int tries[ATA_MAX_DEVICES]; |
1815 | int i, rc, down_xfermask; | |
e82cbdb9 | 1816 | struct ata_device *dev; |
1da177e4 | 1817 | |
28ca5c57 | 1818 | ata_port_probe(ap); |
c19ba8af | 1819 | |
14d2bac1 TH |
1820 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1821 | tries[i] = ATA_PROBE_MAX_TRIES; | |
1822 | ||
1823 | retry: | |
1824 | down_xfermask = 0; | |
1825 | ||
2044470c | 1826 | /* reset and determine device classes */ |
52783c5d | 1827 | ap->ops->phy_reset(ap); |
2061a47a | 1828 | |
52783c5d TH |
1829 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1830 | dev = &ap->device[i]; | |
c19ba8af | 1831 | |
52783c5d TH |
1832 | if (!(ap->flags & ATA_FLAG_DISABLED) && |
1833 | dev->class != ATA_DEV_UNKNOWN) | |
1834 | classes[dev->devno] = dev->class; | |
1835 | else | |
1836 | classes[dev->devno] = ATA_DEV_NONE; | |
2044470c | 1837 | |
52783c5d | 1838 | dev->class = ATA_DEV_UNKNOWN; |
28ca5c57 | 1839 | } |
1da177e4 | 1840 | |
52783c5d | 1841 | ata_port_probe(ap); |
2044470c | 1842 | |
b6079ca4 AC |
1843 | /* after the reset the device state is PIO 0 and the controller |
1844 | state is undefined. Record the mode */ | |
1845 | ||
1846 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1847 | ap->device[i].pio_mode = XFER_PIO_0; | |
1848 | ||
28ca5c57 | 1849 | /* read IDENTIFY page and configure devices */ |
1da177e4 | 1850 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e82cbdb9 | 1851 | dev = &ap->device[i]; |
28ca5c57 | 1852 | |
ec573755 TH |
1853 | if (tries[i]) |
1854 | dev->class = classes[i]; | |
ffeae418 | 1855 | |
14d2bac1 | 1856 | if (!ata_dev_enabled(dev)) |
ffeae418 | 1857 | continue; |
ffeae418 | 1858 | |
bff04647 TH |
1859 | rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, |
1860 | dev->id); | |
14d2bac1 TH |
1861 | if (rc) |
1862 | goto fail; | |
1863 | ||
efdaedc4 TH |
1864 | ap->eh_context.i.flags |= ATA_EHI_PRINTINFO; |
1865 | rc = ata_dev_configure(dev); | |
1866 | ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO; | |
14d2bac1 TH |
1867 | if (rc) |
1868 | goto fail; | |
1da177e4 LT |
1869 | } |
1870 | ||
e82cbdb9 | 1871 | /* configure transfer mode */ |
3adcebb2 | 1872 | rc = ata_set_mode(ap, &dev); |
51713d35 TH |
1873 | if (rc) { |
1874 | down_xfermask = 1; | |
1875 | goto fail; | |
e82cbdb9 | 1876 | } |
1da177e4 | 1877 | |
e82cbdb9 TH |
1878 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1879 | if (ata_dev_enabled(&ap->device[i])) | |
1880 | return 0; | |
1da177e4 | 1881 | |
e82cbdb9 TH |
1882 | /* no device present, disable port */ |
1883 | ata_port_disable(ap); | |
1da177e4 | 1884 | ap->ops->port_disable(ap); |
96072e69 | 1885 | return -ENODEV; |
14d2bac1 TH |
1886 | |
1887 | fail: | |
1888 | switch (rc) { | |
1889 | case -EINVAL: | |
1890 | case -ENODEV: | |
1891 | tries[dev->devno] = 0; | |
1892 | break; | |
1893 | case -EIO: | |
3c567b7d | 1894 | sata_down_spd_limit(ap); |
14d2bac1 TH |
1895 | /* fall through */ |
1896 | default: | |
1897 | tries[dev->devno]--; | |
1898 | if (down_xfermask && | |
3373efd8 | 1899 | ata_down_xfermask_limit(dev, tries[dev->devno] == 1)) |
14d2bac1 TH |
1900 | tries[dev->devno] = 0; |
1901 | } | |
1902 | ||
ec573755 | 1903 | if (!tries[dev->devno]) { |
3373efd8 TH |
1904 | ata_down_xfermask_limit(dev, 1); |
1905 | ata_dev_disable(dev); | |
ec573755 TH |
1906 | } |
1907 | ||
14d2bac1 | 1908 | goto retry; |
1da177e4 LT |
1909 | } |
1910 | ||
1911 | /** | |
0cba632b JG |
1912 | * ata_port_probe - Mark port as enabled |
1913 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1914 | * |
0cba632b JG |
1915 | * Modify @ap data structure such that the system |
1916 | * thinks that the entire port is enabled. | |
1917 | * | |
cca3974e | 1918 | * LOCKING: host lock, or some other form of |
0cba632b | 1919 | * serialization. |
1da177e4 LT |
1920 | */ |
1921 | ||
1922 | void ata_port_probe(struct ata_port *ap) | |
1923 | { | |
198e0fed | 1924 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
1925 | } |
1926 | ||
3be680b7 TH |
1927 | /** |
1928 | * sata_print_link_status - Print SATA link status | |
1929 | * @ap: SATA port to printk link status about | |
1930 | * | |
1931 | * This function prints link speed and status of a SATA link. | |
1932 | * | |
1933 | * LOCKING: | |
1934 | * None. | |
1935 | */ | |
1936 | static void sata_print_link_status(struct ata_port *ap) | |
1937 | { | |
6d5f9732 | 1938 | u32 sstatus, scontrol, tmp; |
3be680b7 | 1939 | |
81952c54 | 1940 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) |
3be680b7 | 1941 | return; |
81952c54 | 1942 | sata_scr_read(ap, SCR_CONTROL, &scontrol); |
3be680b7 | 1943 | |
81952c54 | 1944 | if (ata_port_online(ap)) { |
3be680b7 | 1945 | tmp = (sstatus >> 4) & 0xf; |
f15a1daf TH |
1946 | ata_port_printk(ap, KERN_INFO, |
1947 | "SATA link up %s (SStatus %X SControl %X)\n", | |
1948 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 1949 | } else { |
f15a1daf TH |
1950 | ata_port_printk(ap, KERN_INFO, |
1951 | "SATA link down (SStatus %X SControl %X)\n", | |
1952 | sstatus, scontrol); | |
3be680b7 TH |
1953 | } |
1954 | } | |
1955 | ||
1da177e4 | 1956 | /** |
780a87f7 JG |
1957 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1958 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1959 | * |
780a87f7 JG |
1960 | * This function issues commands to standard SATA Sxxx |
1961 | * PHY registers, to wake up the phy (and device), and | |
1962 | * clear any reset condition. | |
1da177e4 LT |
1963 | * |
1964 | * LOCKING: | |
0cba632b | 1965 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1966 | * |
1967 | */ | |
1968 | void __sata_phy_reset(struct ata_port *ap) | |
1969 | { | |
1970 | u32 sstatus; | |
1971 | unsigned long timeout = jiffies + (HZ * 5); | |
1972 | ||
1973 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 1974 | /* issue phy wake/reset */ |
81952c54 | 1975 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); |
62ba2841 TH |
1976 | /* Couldn't find anything in SATA I/II specs, but |
1977 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1978 | mdelay(1); | |
1da177e4 | 1979 | } |
81952c54 TH |
1980 | /* phy wake/clear reset */ |
1981 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
1da177e4 LT |
1982 | |
1983 | /* wait for phy to become ready, if necessary */ | |
1984 | do { | |
1985 | msleep(200); | |
81952c54 | 1986 | sata_scr_read(ap, SCR_STATUS, &sstatus); |
1da177e4 LT |
1987 | if ((sstatus & 0xf) != 1) |
1988 | break; | |
1989 | } while (time_before(jiffies, timeout)); | |
1990 | ||
3be680b7 TH |
1991 | /* print link status */ |
1992 | sata_print_link_status(ap); | |
656563e3 | 1993 | |
3be680b7 | 1994 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 1995 | if (!ata_port_offline(ap)) |
1da177e4 | 1996 | ata_port_probe(ap); |
3be680b7 | 1997 | else |
1da177e4 | 1998 | ata_port_disable(ap); |
1da177e4 | 1999 | |
198e0fed | 2000 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2001 | return; |
2002 | ||
2003 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
2004 | ata_port_disable(ap); | |
2005 | return; | |
2006 | } | |
2007 | ||
2008 | ap->cbl = ATA_CBL_SATA; | |
2009 | } | |
2010 | ||
2011 | /** | |
780a87f7 JG |
2012 | * sata_phy_reset - Reset SATA bus. |
2013 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2014 | * |
780a87f7 JG |
2015 | * This function resets the SATA bus, and then probes |
2016 | * the bus for devices. | |
1da177e4 LT |
2017 | * |
2018 | * LOCKING: | |
0cba632b | 2019 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2020 | * |
2021 | */ | |
2022 | void sata_phy_reset(struct ata_port *ap) | |
2023 | { | |
2024 | __sata_phy_reset(ap); | |
198e0fed | 2025 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2026 | return; |
2027 | ata_bus_reset(ap); | |
2028 | } | |
2029 | ||
ebdfca6e AC |
2030 | /** |
2031 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
2032 | * @adev: device |
2033 | * | |
2034 | * Obtain the other device on the same cable, or if none is | |
2035 | * present NULL is returned | |
2036 | */ | |
2e9edbf8 | 2037 | |
3373efd8 | 2038 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 2039 | { |
3373efd8 | 2040 | struct ata_port *ap = adev->ap; |
ebdfca6e | 2041 | struct ata_device *pair = &ap->device[1 - adev->devno]; |
e1211e3f | 2042 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
2043 | return NULL; |
2044 | return pair; | |
2045 | } | |
2046 | ||
1da177e4 | 2047 | /** |
780a87f7 JG |
2048 | * ata_port_disable - Disable port. |
2049 | * @ap: Port to be disabled. | |
1da177e4 | 2050 | * |
780a87f7 JG |
2051 | * Modify @ap data structure such that the system |
2052 | * thinks that the entire port is disabled, and should | |
2053 | * never attempt to probe or communicate with devices | |
2054 | * on this port. | |
2055 | * | |
cca3974e | 2056 | * LOCKING: host lock, or some other form of |
780a87f7 | 2057 | * serialization. |
1da177e4 LT |
2058 | */ |
2059 | ||
2060 | void ata_port_disable(struct ata_port *ap) | |
2061 | { | |
2062 | ap->device[0].class = ATA_DEV_NONE; | |
2063 | ap->device[1].class = ATA_DEV_NONE; | |
198e0fed | 2064 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
2065 | } |
2066 | ||
1c3fae4d | 2067 | /** |
3c567b7d | 2068 | * sata_down_spd_limit - adjust SATA spd limit downward |
1c3fae4d TH |
2069 | * @ap: Port to adjust SATA spd limit for |
2070 | * | |
2071 | * Adjust SATA spd limit of @ap downward. Note that this | |
2072 | * function only adjusts the limit. The change must be applied | |
3c567b7d | 2073 | * using sata_set_spd(). |
1c3fae4d TH |
2074 | * |
2075 | * LOCKING: | |
2076 | * Inherited from caller. | |
2077 | * | |
2078 | * RETURNS: | |
2079 | * 0 on success, negative errno on failure | |
2080 | */ | |
3c567b7d | 2081 | int sata_down_spd_limit(struct ata_port *ap) |
1c3fae4d | 2082 | { |
81952c54 TH |
2083 | u32 sstatus, spd, mask; |
2084 | int rc, highbit; | |
1c3fae4d | 2085 | |
81952c54 TH |
2086 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); |
2087 | if (rc) | |
2088 | return rc; | |
1c3fae4d TH |
2089 | |
2090 | mask = ap->sata_spd_limit; | |
2091 | if (mask <= 1) | |
2092 | return -EINVAL; | |
2093 | highbit = fls(mask) - 1; | |
2094 | mask &= ~(1 << highbit); | |
2095 | ||
81952c54 | 2096 | spd = (sstatus >> 4) & 0xf; |
1c3fae4d TH |
2097 | if (spd <= 1) |
2098 | return -EINVAL; | |
2099 | spd--; | |
2100 | mask &= (1 << spd) - 1; | |
2101 | if (!mask) | |
2102 | return -EINVAL; | |
2103 | ||
2104 | ap->sata_spd_limit = mask; | |
2105 | ||
f15a1daf TH |
2106 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", |
2107 | sata_spd_string(fls(mask))); | |
1c3fae4d TH |
2108 | |
2109 | return 0; | |
2110 | } | |
2111 | ||
3c567b7d | 2112 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) |
1c3fae4d TH |
2113 | { |
2114 | u32 spd, limit; | |
2115 | ||
2116 | if (ap->sata_spd_limit == UINT_MAX) | |
2117 | limit = 0; | |
2118 | else | |
2119 | limit = fls(ap->sata_spd_limit); | |
2120 | ||
2121 | spd = (*scontrol >> 4) & 0xf; | |
2122 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
2123 | ||
2124 | return spd != limit; | |
2125 | } | |
2126 | ||
2127 | /** | |
3c567b7d | 2128 | * sata_set_spd_needed - is SATA spd configuration needed |
1c3fae4d TH |
2129 | * @ap: Port in question |
2130 | * | |
2131 | * Test whether the spd limit in SControl matches | |
2132 | * @ap->sata_spd_limit. This function is used to determine | |
2133 | * whether hardreset is necessary to apply SATA spd | |
2134 | * configuration. | |
2135 | * | |
2136 | * LOCKING: | |
2137 | * Inherited from caller. | |
2138 | * | |
2139 | * RETURNS: | |
2140 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
2141 | */ | |
3c567b7d | 2142 | int sata_set_spd_needed(struct ata_port *ap) |
1c3fae4d TH |
2143 | { |
2144 | u32 scontrol; | |
2145 | ||
81952c54 | 2146 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
2147 | return 0; |
2148 | ||
3c567b7d | 2149 | return __sata_set_spd_needed(ap, &scontrol); |
1c3fae4d TH |
2150 | } |
2151 | ||
2152 | /** | |
3c567b7d | 2153 | * sata_set_spd - set SATA spd according to spd limit |
1c3fae4d TH |
2154 | * @ap: Port to set SATA spd for |
2155 | * | |
2156 | * Set SATA spd of @ap according to sata_spd_limit. | |
2157 | * | |
2158 | * LOCKING: | |
2159 | * Inherited from caller. | |
2160 | * | |
2161 | * RETURNS: | |
2162 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 2163 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 2164 | */ |
3c567b7d | 2165 | int sata_set_spd(struct ata_port *ap) |
1c3fae4d TH |
2166 | { |
2167 | u32 scontrol; | |
81952c54 | 2168 | int rc; |
1c3fae4d | 2169 | |
81952c54 TH |
2170 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2171 | return rc; | |
1c3fae4d | 2172 | |
3c567b7d | 2173 | if (!__sata_set_spd_needed(ap, &scontrol)) |
1c3fae4d TH |
2174 | return 0; |
2175 | ||
81952c54 TH |
2176 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) |
2177 | return rc; | |
2178 | ||
1c3fae4d TH |
2179 | return 1; |
2180 | } | |
2181 | ||
452503f9 AC |
2182 | /* |
2183 | * This mode timing computation functionality is ported over from | |
2184 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
2185 | */ | |
2186 | /* | |
b352e57d | 2187 | * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). |
452503f9 | 2188 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except |
b352e57d AC |
2189 | * for UDMA6, which is currently supported only by Maxtor drives. |
2190 | * | |
2191 | * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. | |
452503f9 AC |
2192 | */ |
2193 | ||
2194 | static const struct ata_timing ata_timing[] = { | |
2195 | ||
2196 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
2197 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
2198 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
2199 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
2200 | ||
b352e57d AC |
2201 | { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, |
2202 | { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, | |
452503f9 AC |
2203 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, |
2204 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
2205 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
2206 | ||
2207 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 2208 | |
452503f9 AC |
2209 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
2210 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
2211 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 2212 | |
452503f9 AC |
2213 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
2214 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
2215 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
2216 | ||
b352e57d AC |
2217 | { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, |
2218 | { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, | |
452503f9 AC |
2219 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, |
2220 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
2221 | ||
2222 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
2223 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
2224 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
2225 | ||
2226 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
2227 | ||
2228 | { 0xFF } | |
2229 | }; | |
2230 | ||
2231 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
2232 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
2233 | ||
2234 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
2235 | { | |
2236 | q->setup = EZ(t->setup * 1000, T); | |
2237 | q->act8b = EZ(t->act8b * 1000, T); | |
2238 | q->rec8b = EZ(t->rec8b * 1000, T); | |
2239 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
2240 | q->active = EZ(t->active * 1000, T); | |
2241 | q->recover = EZ(t->recover * 1000, T); | |
2242 | q->cycle = EZ(t->cycle * 1000, T); | |
2243 | q->udma = EZ(t->udma * 1000, UT); | |
2244 | } | |
2245 | ||
2246 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
2247 | struct ata_timing *m, unsigned int what) | |
2248 | { | |
2249 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
2250 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
2251 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
2252 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
2253 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
2254 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
2255 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
2256 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
2257 | } | |
2258 | ||
2259 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
2260 | { | |
2261 | const struct ata_timing *t; | |
2262 | ||
2263 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 2264 | if (t->mode == 0xFF) |
452503f9 | 2265 | return NULL; |
2e9edbf8 | 2266 | return t; |
452503f9 AC |
2267 | } |
2268 | ||
2269 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
2270 | struct ata_timing *t, int T, int UT) | |
2271 | { | |
2272 | const struct ata_timing *s; | |
2273 | struct ata_timing p; | |
2274 | ||
2275 | /* | |
2e9edbf8 | 2276 | * Find the mode. |
75b1f2f8 | 2277 | */ |
452503f9 AC |
2278 | |
2279 | if (!(s = ata_timing_find_mode(speed))) | |
2280 | return -EINVAL; | |
2281 | ||
75b1f2f8 AL |
2282 | memcpy(t, s, sizeof(*s)); |
2283 | ||
452503f9 AC |
2284 | /* |
2285 | * If the drive is an EIDE drive, it can tell us it needs extended | |
2286 | * PIO/MW_DMA cycle timing. | |
2287 | */ | |
2288 | ||
2289 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2290 | memset(&p, 0, sizeof(p)); | |
2291 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
2292 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
2293 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2294 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
2295 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
2296 | } | |
2297 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2298 | } | |
2299 | ||
2300 | /* | |
2301 | * Convert the timing to bus clock counts. | |
2302 | */ | |
2303 | ||
75b1f2f8 | 2304 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
2305 | |
2306 | /* | |
c893a3ae RD |
2307 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
2308 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2309 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
2310 | */ |
2311 | ||
2312 | if (speed > XFER_PIO_4) { | |
2313 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
2314 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2315 | } | |
2316 | ||
2317 | /* | |
c893a3ae | 2318 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
2319 | */ |
2320 | ||
2321 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2322 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2323 | t->rec8b = t->cyc8b - t->act8b; | |
2324 | } | |
2325 | ||
2326 | if (t->active + t->recover < t->cycle) { | |
2327 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2328 | t->recover = t->cycle - t->active; | |
2329 | } | |
2330 | ||
2331 | return 0; | |
2332 | } | |
2333 | ||
cf176e1a TH |
2334 | /** |
2335 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a TH |
2336 | * @dev: Device to adjust xfer masks |
2337 | * @force_pio0: Force PIO0 | |
2338 | * | |
2339 | * Adjust xfer masks of @dev downward. Note that this function | |
2340 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2341 | * will apply the limit. | |
2342 | * | |
2343 | * LOCKING: | |
2344 | * Inherited from caller. | |
2345 | * | |
2346 | * RETURNS: | |
2347 | * 0 on success, negative errno on failure | |
2348 | */ | |
3373efd8 | 2349 | int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0) |
cf176e1a TH |
2350 | { |
2351 | unsigned long xfer_mask; | |
2352 | int highbit; | |
2353 | ||
2354 | xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask, | |
2355 | dev->udma_mask); | |
2356 | ||
2357 | if (!xfer_mask) | |
2358 | goto fail; | |
2359 | /* don't gear down to MWDMA from UDMA, go directly to PIO */ | |
2360 | if (xfer_mask & ATA_MASK_UDMA) | |
2361 | xfer_mask &= ~ATA_MASK_MWDMA; | |
2362 | ||
2363 | highbit = fls(xfer_mask) - 1; | |
2364 | xfer_mask &= ~(1 << highbit); | |
2365 | if (force_pio0) | |
2366 | xfer_mask &= 1 << ATA_SHIFT_PIO; | |
2367 | if (!xfer_mask) | |
2368 | goto fail; | |
2369 | ||
2370 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2371 | &dev->udma_mask); | |
2372 | ||
f15a1daf TH |
2373 | ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n", |
2374 | ata_mode_string(xfer_mask)); | |
cf176e1a TH |
2375 | |
2376 | return 0; | |
2377 | ||
2378 | fail: | |
2379 | return -EINVAL; | |
2380 | } | |
2381 | ||
3373efd8 | 2382 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 2383 | { |
baa1e78a | 2384 | struct ata_eh_context *ehc = &dev->ap->eh_context; |
83206a29 TH |
2385 | unsigned int err_mask; |
2386 | int rc; | |
1da177e4 | 2387 | |
e8384607 | 2388 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
2389 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
2390 | dev->flags |= ATA_DFLAG_PIO; | |
2391 | ||
3373efd8 | 2392 | err_mask = ata_dev_set_xfermode(dev); |
83206a29 | 2393 | if (err_mask) { |
f15a1daf TH |
2394 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
2395 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
2396 | return -EIO; |
2397 | } | |
1da177e4 | 2398 | |
baa1e78a | 2399 | ehc->i.flags |= ATA_EHI_POST_SETMODE; |
3373efd8 | 2400 | rc = ata_dev_revalidate(dev, 0); |
baa1e78a | 2401 | ehc->i.flags &= ~ATA_EHI_POST_SETMODE; |
5eb45c02 | 2402 | if (rc) |
83206a29 | 2403 | return rc; |
48a8a14f | 2404 | |
23e71c3d TH |
2405 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
2406 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 2407 | |
f15a1daf TH |
2408 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
2409 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 2410 | return 0; |
1da177e4 LT |
2411 | } |
2412 | ||
1da177e4 LT |
2413 | /** |
2414 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
2415 | * @ap: port on which timings will be programmed | |
e82cbdb9 | 2416 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 2417 | * |
e82cbdb9 TH |
2418 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If |
2419 | * ata_set_mode() fails, pointer to the failing device is | |
2420 | * returned in @r_failed_dev. | |
780a87f7 | 2421 | * |
1da177e4 | 2422 | * LOCKING: |
0cba632b | 2423 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
2424 | * |
2425 | * RETURNS: | |
2426 | * 0 on success, negative errno otherwise | |
1da177e4 | 2427 | */ |
1ad8e7f9 | 2428 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) |
1da177e4 | 2429 | { |
e8e0619f | 2430 | struct ata_device *dev; |
e82cbdb9 | 2431 | int i, rc = 0, used_dma = 0, found = 0; |
1da177e4 | 2432 | |
3adcebb2 TH |
2433 | /* has private set_mode? */ |
2434 | if (ap->ops->set_mode) { | |
2435 | /* FIXME: make ->set_mode handle no device case and | |
2436 | * return error code and failing device on failure. | |
2437 | */ | |
2438 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
02670bf3 | 2439 | if (ata_dev_ready(&ap->device[i])) { |
3adcebb2 TH |
2440 | ap->ops->set_mode(ap); |
2441 | break; | |
2442 | } | |
2443 | } | |
2444 | return 0; | |
2445 | } | |
2446 | ||
a6d5a51c TH |
2447 | /* step 1: calculate xfer_mask */ |
2448 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
acf356b1 | 2449 | unsigned int pio_mask, dma_mask; |
a6d5a51c | 2450 | |
e8e0619f TH |
2451 | dev = &ap->device[i]; |
2452 | ||
e1211e3f | 2453 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
2454 | continue; |
2455 | ||
3373efd8 | 2456 | ata_dev_xfermask(dev); |
1da177e4 | 2457 | |
acf356b1 TH |
2458 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2459 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2460 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2461 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2462 | |
4f65977d | 2463 | found = 1; |
5444a6f4 AC |
2464 | if (dev->dma_mode) |
2465 | used_dma = 1; | |
a6d5a51c | 2466 | } |
4f65977d | 2467 | if (!found) |
e82cbdb9 | 2468 | goto out; |
a6d5a51c TH |
2469 | |
2470 | /* step 2: always set host PIO timings */ | |
e8e0619f TH |
2471 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2472 | dev = &ap->device[i]; | |
2473 | if (!ata_dev_enabled(dev)) | |
2474 | continue; | |
2475 | ||
2476 | if (!dev->pio_mode) { | |
f15a1daf | 2477 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2478 | rc = -EINVAL; |
e82cbdb9 | 2479 | goto out; |
e8e0619f TH |
2480 | } |
2481 | ||
2482 | dev->xfer_mode = dev->pio_mode; | |
2483 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2484 | if (ap->ops->set_piomode) | |
2485 | ap->ops->set_piomode(ap, dev); | |
2486 | } | |
1da177e4 | 2487 | |
a6d5a51c | 2488 | /* step 3: set host DMA timings */ |
e8e0619f TH |
2489 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2490 | dev = &ap->device[i]; | |
2491 | ||
2492 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2493 | continue; | |
2494 | ||
2495 | dev->xfer_mode = dev->dma_mode; | |
2496 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2497 | if (ap->ops->set_dmamode) | |
2498 | ap->ops->set_dmamode(ap, dev); | |
2499 | } | |
1da177e4 LT |
2500 | |
2501 | /* step 4: update devices' xfer mode */ | |
83206a29 | 2502 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e8e0619f | 2503 | dev = &ap->device[i]; |
1da177e4 | 2504 | |
02670bf3 TH |
2505 | /* don't udpate suspended devices' xfer mode */ |
2506 | if (!ata_dev_ready(dev)) | |
83206a29 TH |
2507 | continue; |
2508 | ||
3373efd8 | 2509 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 2510 | if (rc) |
e82cbdb9 | 2511 | goto out; |
83206a29 | 2512 | } |
1da177e4 | 2513 | |
e8e0619f TH |
2514 | /* Record simplex status. If we selected DMA then the other |
2515 | * host channels are not permitted to do so. | |
5444a6f4 | 2516 | */ |
cca3974e JG |
2517 | if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) |
2518 | ap->host->simplex_claimed = 1; | |
5444a6f4 | 2519 | |
e8e0619f | 2520 | /* step5: chip specific finalisation */ |
1da177e4 LT |
2521 | if (ap->ops->post_set_mode) |
2522 | ap->ops->post_set_mode(ap); | |
2523 | ||
e82cbdb9 TH |
2524 | out: |
2525 | if (rc) | |
2526 | *r_failed_dev = dev; | |
2527 | return rc; | |
1da177e4 LT |
2528 | } |
2529 | ||
1fdffbce JG |
2530 | /** |
2531 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2532 | * @ap: port to which command is being issued | |
2533 | * @tf: ATA taskfile register set | |
2534 | * | |
2535 | * Issues ATA taskfile register set to ATA host controller, | |
2536 | * with proper synchronization with interrupt handler and | |
2537 | * other threads. | |
2538 | * | |
2539 | * LOCKING: | |
cca3974e | 2540 | * spin_lock_irqsave(host lock) |
1fdffbce JG |
2541 | */ |
2542 | ||
2543 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2544 | const struct ata_taskfile *tf) | |
2545 | { | |
2546 | ap->ops->tf_load(ap, tf); | |
2547 | ap->ops->exec_command(ap, tf); | |
2548 | } | |
2549 | ||
1da177e4 LT |
2550 | /** |
2551 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2552 | * @ap: port containing status register to be polled | |
2553 | * @tmout_pat: impatience timeout | |
2554 | * @tmout: overall timeout | |
2555 | * | |
780a87f7 JG |
2556 | * Sleep until ATA Status register bit BSY clears, |
2557 | * or a timeout occurs. | |
2558 | * | |
d1adc1bb TH |
2559 | * LOCKING: |
2560 | * Kernel thread context (may sleep). | |
2561 | * | |
2562 | * RETURNS: | |
2563 | * 0 on success, -errno otherwise. | |
1da177e4 | 2564 | */ |
d1adc1bb TH |
2565 | int ata_busy_sleep(struct ata_port *ap, |
2566 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
2567 | { |
2568 | unsigned long timer_start, timeout; | |
2569 | u8 status; | |
2570 | ||
2571 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2572 | timer_start = jiffies; | |
2573 | timeout = timer_start + tmout_pat; | |
d1adc1bb TH |
2574 | while (status != 0xff && (status & ATA_BUSY) && |
2575 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
2576 | msleep(50); |
2577 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2578 | } | |
2579 | ||
d1adc1bb | 2580 | if (status != 0xff && (status & ATA_BUSY)) |
f15a1daf | 2581 | ata_port_printk(ap, KERN_WARNING, |
35aa7a43 JG |
2582 | "port is slow to respond, please be patient " |
2583 | "(Status 0x%x)\n", status); | |
1da177e4 LT |
2584 | |
2585 | timeout = timer_start + tmout; | |
d1adc1bb TH |
2586 | while (status != 0xff && (status & ATA_BUSY) && |
2587 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
2588 | msleep(50); |
2589 | status = ata_chk_status(ap); | |
2590 | } | |
2591 | ||
d1adc1bb TH |
2592 | if (status == 0xff) |
2593 | return -ENODEV; | |
2594 | ||
1da177e4 | 2595 | if (status & ATA_BUSY) { |
f15a1daf | 2596 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
35aa7a43 JG |
2597 | "(%lu secs, Status 0x%x)\n", |
2598 | tmout / HZ, status); | |
d1adc1bb | 2599 | return -EBUSY; |
1da177e4 LT |
2600 | } |
2601 | ||
2602 | return 0; | |
2603 | } | |
2604 | ||
2605 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
2606 | { | |
2607 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2608 | unsigned int dev0 = devmask & (1 << 0); | |
2609 | unsigned int dev1 = devmask & (1 << 1); | |
2610 | unsigned long timeout; | |
2611 | ||
2612 | /* if device 0 was found in ata_devchk, wait for its | |
2613 | * BSY bit to clear | |
2614 | */ | |
2615 | if (dev0) | |
2616 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2617 | ||
2618 | /* if device 1 was found in ata_devchk, wait for | |
2619 | * register access, then wait for BSY to clear | |
2620 | */ | |
2621 | timeout = jiffies + ATA_TMOUT_BOOT; | |
2622 | while (dev1) { | |
2623 | u8 nsect, lbal; | |
2624 | ||
2625 | ap->ops->dev_select(ap, 1); | |
2626 | if (ap->flags & ATA_FLAG_MMIO) { | |
2627 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
2628 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
2629 | } else { | |
2630 | nsect = inb(ioaddr->nsect_addr); | |
2631 | lbal = inb(ioaddr->lbal_addr); | |
2632 | } | |
2633 | if ((nsect == 1) && (lbal == 1)) | |
2634 | break; | |
2635 | if (time_after(jiffies, timeout)) { | |
2636 | dev1 = 0; | |
2637 | break; | |
2638 | } | |
2639 | msleep(50); /* give drive a breather */ | |
2640 | } | |
2641 | if (dev1) | |
2642 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2643 | ||
2644 | /* is all this really necessary? */ | |
2645 | ap->ops->dev_select(ap, 0); | |
2646 | if (dev1) | |
2647 | ap->ops->dev_select(ap, 1); | |
2648 | if (dev0) | |
2649 | ap->ops->dev_select(ap, 0); | |
2650 | } | |
2651 | ||
1da177e4 LT |
2652 | static unsigned int ata_bus_softreset(struct ata_port *ap, |
2653 | unsigned int devmask) | |
2654 | { | |
2655 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2656 | ||
2657 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2658 | ||
2659 | /* software reset. causes dev0 to be selected */ | |
2660 | if (ap->flags & ATA_FLAG_MMIO) { | |
2661 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2662 | udelay(20); /* FIXME: flush */ | |
2663 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2664 | udelay(20); /* FIXME: flush */ | |
2665 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2666 | } else { | |
2667 | outb(ap->ctl, ioaddr->ctl_addr); | |
2668 | udelay(10); | |
2669 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2670 | udelay(10); | |
2671 | outb(ap->ctl, ioaddr->ctl_addr); | |
2672 | } | |
2673 | ||
2674 | /* spec mandates ">= 2ms" before checking status. | |
2675 | * We wait 150ms, because that was the magic delay used for | |
2676 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2677 | * between when the ATA command register is written, and then | |
2678 | * status is checked. Because waiting for "a while" before | |
2679 | * checking status is fine, post SRST, we perform this magic | |
2680 | * delay here as well. | |
09c7ad79 AC |
2681 | * |
2682 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
1da177e4 LT |
2683 | */ |
2684 | msleep(150); | |
2685 | ||
2e9edbf8 | 2686 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
2687 | * the bus shows 0xFF because the odd clown forgets the D7 |
2688 | * pulldown resistor. | |
2689 | */ | |
d1adc1bb TH |
2690 | if (ata_check_status(ap) == 0xFF) |
2691 | return 0; | |
09c7ad79 | 2692 | |
1da177e4 LT |
2693 | ata_bus_post_reset(ap, devmask); |
2694 | ||
2695 | return 0; | |
2696 | } | |
2697 | ||
2698 | /** | |
2699 | * ata_bus_reset - reset host port and associated ATA channel | |
2700 | * @ap: port to reset | |
2701 | * | |
2702 | * This is typically the first time we actually start issuing | |
2703 | * commands to the ATA channel. We wait for BSY to clear, then | |
2704 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2705 | * result. Determine what devices, if any, are on the channel | |
2706 | * by looking at the device 0/1 error register. Look at the signature | |
2707 | * stored in each device's taskfile registers, to determine if | |
2708 | * the device is ATA or ATAPI. | |
2709 | * | |
2710 | * LOCKING: | |
0cba632b | 2711 | * PCI/etc. bus probe sem. |
cca3974e | 2712 | * Obtains host lock. |
1da177e4 LT |
2713 | * |
2714 | * SIDE EFFECTS: | |
198e0fed | 2715 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
2716 | */ |
2717 | ||
2718 | void ata_bus_reset(struct ata_port *ap) | |
2719 | { | |
2720 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2721 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2722 | u8 err; | |
aec5c3c1 | 2723 | unsigned int dev0, dev1 = 0, devmask = 0; |
1da177e4 LT |
2724 | |
2725 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2726 | ||
2727 | /* determine if device 0/1 are present */ | |
2728 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2729 | dev0 = 1; | |
2730 | else { | |
2731 | dev0 = ata_devchk(ap, 0); | |
2732 | if (slave_possible) | |
2733 | dev1 = ata_devchk(ap, 1); | |
2734 | } | |
2735 | ||
2736 | if (dev0) | |
2737 | devmask |= (1 << 0); | |
2738 | if (dev1) | |
2739 | devmask |= (1 << 1); | |
2740 | ||
2741 | /* select device 0 again */ | |
2742 | ap->ops->dev_select(ap, 0); | |
2743 | ||
2744 | /* issue bus reset */ | |
2745 | if (ap->flags & ATA_FLAG_SRST) | |
aec5c3c1 TH |
2746 | if (ata_bus_softreset(ap, devmask)) |
2747 | goto err_out; | |
1da177e4 LT |
2748 | |
2749 | /* | |
2750 | * determine by signature whether we have ATA or ATAPI devices | |
2751 | */ | |
b4dc7623 | 2752 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 2753 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 2754 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
2755 | |
2756 | /* re-enable interrupts */ | |
2757 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2758 | ata_irq_on(ap); | |
2759 | ||
2760 | /* is double-select really necessary? */ | |
2761 | if (ap->device[1].class != ATA_DEV_NONE) | |
2762 | ap->ops->dev_select(ap, 1); | |
2763 | if (ap->device[0].class != ATA_DEV_NONE) | |
2764 | ap->ops->dev_select(ap, 0); | |
2765 | ||
2766 | /* if no devices were detected, disable this port */ | |
2767 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2768 | (ap->device[1].class == ATA_DEV_NONE)) | |
2769 | goto err_out; | |
2770 | ||
2771 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2772 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2773 | if (ap->flags & ATA_FLAG_MMIO) | |
2774 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2775 | else | |
2776 | outb(ap->ctl, ioaddr->ctl_addr); | |
2777 | } | |
2778 | ||
2779 | DPRINTK("EXIT\n"); | |
2780 | return; | |
2781 | ||
2782 | err_out: | |
f15a1daf | 2783 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
1da177e4 LT |
2784 | ap->ops->port_disable(ap); |
2785 | ||
2786 | DPRINTK("EXIT\n"); | |
2787 | } | |
2788 | ||
d7bb4cc7 TH |
2789 | /** |
2790 | * sata_phy_debounce - debounce SATA phy status | |
2791 | * @ap: ATA port to debounce SATA phy status for | |
2792 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2793 | * | |
2794 | * Make sure SStatus of @ap reaches stable state, determined by | |
2795 | * holding the same value where DET is not 1 for @duration polled | |
2796 | * every @interval, before @timeout. Timeout constraints the | |
2797 | * beginning of the stable state. Because, after hot unplugging, | |
2798 | * DET gets stuck at 1 on some controllers, this functions waits | |
2799 | * until timeout then returns 0 if DET is stable at 1. | |
2800 | * | |
2801 | * LOCKING: | |
2802 | * Kernel thread context (may sleep) | |
2803 | * | |
2804 | * RETURNS: | |
2805 | * 0 on success, -errno on failure. | |
2806 | */ | |
2807 | int sata_phy_debounce(struct ata_port *ap, const unsigned long *params) | |
7a7921e8 | 2808 | { |
d7bb4cc7 TH |
2809 | unsigned long interval_msec = params[0]; |
2810 | unsigned long duration = params[1] * HZ / 1000; | |
2811 | unsigned long timeout = jiffies + params[2] * HZ / 1000; | |
2812 | unsigned long last_jiffies; | |
2813 | u32 last, cur; | |
2814 | int rc; | |
2815 | ||
2816 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2817 | return rc; | |
2818 | cur &= 0xf; | |
2819 | ||
2820 | last = cur; | |
2821 | last_jiffies = jiffies; | |
2822 | ||
2823 | while (1) { | |
2824 | msleep(interval_msec); | |
2825 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2826 | return rc; | |
2827 | cur &= 0xf; | |
2828 | ||
2829 | /* DET stable? */ | |
2830 | if (cur == last) { | |
2831 | if (cur == 1 && time_before(jiffies, timeout)) | |
2832 | continue; | |
2833 | if (time_after(jiffies, last_jiffies + duration)) | |
2834 | return 0; | |
2835 | continue; | |
2836 | } | |
2837 | ||
2838 | /* unstable, start over */ | |
2839 | last = cur; | |
2840 | last_jiffies = jiffies; | |
2841 | ||
2842 | /* check timeout */ | |
2843 | if (time_after(jiffies, timeout)) | |
2844 | return -EBUSY; | |
2845 | } | |
2846 | } | |
2847 | ||
2848 | /** | |
2849 | * sata_phy_resume - resume SATA phy | |
2850 | * @ap: ATA port to resume SATA phy for | |
2851 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2852 | * | |
2853 | * Resume SATA phy of @ap and debounce it. | |
2854 | * | |
2855 | * LOCKING: | |
2856 | * Kernel thread context (may sleep) | |
2857 | * | |
2858 | * RETURNS: | |
2859 | * 0 on success, -errno on failure. | |
2860 | */ | |
2861 | int sata_phy_resume(struct ata_port *ap, const unsigned long *params) | |
2862 | { | |
2863 | u32 scontrol; | |
81952c54 TH |
2864 | int rc; |
2865 | ||
2866 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2867 | return rc; | |
7a7921e8 | 2868 | |
852ee16a | 2869 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 TH |
2870 | |
2871 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2872 | return rc; | |
7a7921e8 | 2873 | |
d7bb4cc7 TH |
2874 | /* Some PHYs react badly if SStatus is pounded immediately |
2875 | * after resuming. Delay 200ms before debouncing. | |
2876 | */ | |
2877 | msleep(200); | |
7a7921e8 | 2878 | |
d7bb4cc7 | 2879 | return sata_phy_debounce(ap, params); |
7a7921e8 TH |
2880 | } |
2881 | ||
f5914a46 TH |
2882 | static void ata_wait_spinup(struct ata_port *ap) |
2883 | { | |
2884 | struct ata_eh_context *ehc = &ap->eh_context; | |
2885 | unsigned long end, secs; | |
2886 | int rc; | |
2887 | ||
2888 | /* first, debounce phy if SATA */ | |
2889 | if (ap->cbl == ATA_CBL_SATA) { | |
e9c83914 | 2890 | rc = sata_phy_debounce(ap, sata_deb_timing_hotplug); |
f5914a46 TH |
2891 | |
2892 | /* if debounced successfully and offline, no need to wait */ | |
2893 | if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap)) | |
2894 | return; | |
2895 | } | |
2896 | ||
2897 | /* okay, let's give the drive time to spin up */ | |
2898 | end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000; | |
2899 | secs = ((end - jiffies) + HZ - 1) / HZ; | |
2900 | ||
2901 | if (time_after(jiffies, end)) | |
2902 | return; | |
2903 | ||
2904 | if (secs > 5) | |
2905 | ata_port_printk(ap, KERN_INFO, "waiting for device to spin up " | |
2906 | "(%lu secs)\n", secs); | |
2907 | ||
2908 | schedule_timeout_uninterruptible(end - jiffies); | |
2909 | } | |
2910 | ||
2911 | /** | |
2912 | * ata_std_prereset - prepare for reset | |
2913 | * @ap: ATA port to be reset | |
2914 | * | |
2915 | * @ap is about to be reset. Initialize it. | |
2916 | * | |
2917 | * LOCKING: | |
2918 | * Kernel thread context (may sleep) | |
2919 | * | |
2920 | * RETURNS: | |
2921 | * 0 on success, -errno otherwise. | |
2922 | */ | |
2923 | int ata_std_prereset(struct ata_port *ap) | |
2924 | { | |
2925 | struct ata_eh_context *ehc = &ap->eh_context; | |
e9c83914 | 2926 | const unsigned long *timing = sata_ehc_deb_timing(ehc); |
f5914a46 TH |
2927 | int rc; |
2928 | ||
28324304 TH |
2929 | /* handle link resume & hotplug spinup */ |
2930 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && | |
2931 | (ap->flags & ATA_FLAG_HRST_TO_RESUME)) | |
2932 | ehc->i.action |= ATA_EH_HARDRESET; | |
2933 | ||
2934 | if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) && | |
2935 | (ap->flags & ATA_FLAG_SKIP_D2H_BSY)) | |
2936 | ata_wait_spinup(ap); | |
f5914a46 TH |
2937 | |
2938 | /* if we're about to do hardreset, nothing more to do */ | |
2939 | if (ehc->i.action & ATA_EH_HARDRESET) | |
2940 | return 0; | |
2941 | ||
2942 | /* if SATA, resume phy */ | |
2943 | if (ap->cbl == ATA_CBL_SATA) { | |
f5914a46 TH |
2944 | rc = sata_phy_resume(ap, timing); |
2945 | if (rc && rc != -EOPNOTSUPP) { | |
2946 | /* phy resume failed */ | |
2947 | ata_port_printk(ap, KERN_WARNING, "failed to resume " | |
2948 | "link for reset (errno=%d)\n", rc); | |
2949 | return rc; | |
2950 | } | |
2951 | } | |
2952 | ||
2953 | /* Wait for !BSY if the controller can wait for the first D2H | |
2954 | * Reg FIS and we don't know that no device is attached. | |
2955 | */ | |
2956 | if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) | |
2957 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2958 | ||
2959 | return 0; | |
2960 | } | |
2961 | ||
c2bd5804 TH |
2962 | /** |
2963 | * ata_std_softreset - reset host port via ATA SRST | |
2964 | * @ap: port to reset | |
c2bd5804 TH |
2965 | * @classes: resulting classes of attached devices |
2966 | * | |
52783c5d | 2967 | * Reset host port using ATA SRST. |
c2bd5804 TH |
2968 | * |
2969 | * LOCKING: | |
2970 | * Kernel thread context (may sleep) | |
2971 | * | |
2972 | * RETURNS: | |
2973 | * 0 on success, -errno otherwise. | |
2974 | */ | |
2bf2cb26 | 2975 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes) |
c2bd5804 TH |
2976 | { |
2977 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2978 | unsigned int devmask = 0, err_mask; | |
2979 | u8 err; | |
2980 | ||
2981 | DPRINTK("ENTER\n"); | |
2982 | ||
81952c54 | 2983 | if (ata_port_offline(ap)) { |
3a39746a TH |
2984 | classes[0] = ATA_DEV_NONE; |
2985 | goto out; | |
2986 | } | |
2987 | ||
c2bd5804 TH |
2988 | /* determine if device 0/1 are present */ |
2989 | if (ata_devchk(ap, 0)) | |
2990 | devmask |= (1 << 0); | |
2991 | if (slave_possible && ata_devchk(ap, 1)) | |
2992 | devmask |= (1 << 1); | |
2993 | ||
c2bd5804 TH |
2994 | /* select device 0 again */ |
2995 | ap->ops->dev_select(ap, 0); | |
2996 | ||
2997 | /* issue bus reset */ | |
2998 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
2999 | err_mask = ata_bus_softreset(ap, devmask); | |
3000 | if (err_mask) { | |
f15a1daf TH |
3001 | ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", |
3002 | err_mask); | |
c2bd5804 TH |
3003 | return -EIO; |
3004 | } | |
3005 | ||
3006 | /* determine by signature whether we have ATA or ATAPI devices */ | |
3007 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
3008 | if (slave_possible && err != 0x81) | |
3009 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
3010 | ||
3a39746a | 3011 | out: |
c2bd5804 TH |
3012 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
3013 | return 0; | |
3014 | } | |
3015 | ||
3016 | /** | |
b6103f6d | 3017 | * sata_port_hardreset - reset port via SATA phy reset |
c2bd5804 | 3018 | * @ap: port to reset |
b6103f6d | 3019 | * @timing: timing parameters { interval, duratinon, timeout } in msec |
c2bd5804 TH |
3020 | * |
3021 | * SATA phy-reset host port using DET bits of SControl register. | |
c2bd5804 TH |
3022 | * |
3023 | * LOCKING: | |
3024 | * Kernel thread context (may sleep) | |
3025 | * | |
3026 | * RETURNS: | |
3027 | * 0 on success, -errno otherwise. | |
3028 | */ | |
b6103f6d | 3029 | int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing) |
c2bd5804 | 3030 | { |
852ee16a | 3031 | u32 scontrol; |
81952c54 | 3032 | int rc; |
852ee16a | 3033 | |
c2bd5804 TH |
3034 | DPRINTK("ENTER\n"); |
3035 | ||
3c567b7d | 3036 | if (sata_set_spd_needed(ap)) { |
1c3fae4d TH |
3037 | /* SATA spec says nothing about how to reconfigure |
3038 | * spd. To be on the safe side, turn off phy during | |
3039 | * reconfiguration. This works for at least ICH7 AHCI | |
3040 | * and Sil3124. | |
3041 | */ | |
81952c54 | 3042 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
b6103f6d | 3043 | goto out; |
81952c54 | 3044 | |
a34b6fc0 | 3045 | scontrol = (scontrol & 0x0f0) | 0x304; |
81952c54 TH |
3046 | |
3047 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
b6103f6d | 3048 | goto out; |
1c3fae4d | 3049 | |
3c567b7d | 3050 | sata_set_spd(ap); |
1c3fae4d TH |
3051 | } |
3052 | ||
3053 | /* issue phy wake/reset */ | |
81952c54 | 3054 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
b6103f6d | 3055 | goto out; |
81952c54 | 3056 | |
852ee16a | 3057 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 TH |
3058 | |
3059 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
b6103f6d | 3060 | goto out; |
c2bd5804 | 3061 | |
1c3fae4d | 3062 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
3063 | * 10.4.2 says at least 1 ms. |
3064 | */ | |
3065 | msleep(1); | |
3066 | ||
1c3fae4d | 3067 | /* bring phy back */ |
b6103f6d TH |
3068 | rc = sata_phy_resume(ap, timing); |
3069 | out: | |
3070 | DPRINTK("EXIT, rc=%d\n", rc); | |
3071 | return rc; | |
3072 | } | |
3073 | ||
3074 | /** | |
3075 | * sata_std_hardreset - reset host port via SATA phy reset | |
3076 | * @ap: port to reset | |
3077 | * @class: resulting class of attached device | |
3078 | * | |
3079 | * SATA phy-reset host port using DET bits of SControl register, | |
3080 | * wait for !BSY and classify the attached device. | |
3081 | * | |
3082 | * LOCKING: | |
3083 | * Kernel thread context (may sleep) | |
3084 | * | |
3085 | * RETURNS: | |
3086 | * 0 on success, -errno otherwise. | |
3087 | */ | |
3088 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class) | |
3089 | { | |
3090 | const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context); | |
3091 | int rc; | |
3092 | ||
3093 | DPRINTK("ENTER\n"); | |
3094 | ||
3095 | /* do hardreset */ | |
3096 | rc = sata_port_hardreset(ap, timing); | |
3097 | if (rc) { | |
3098 | ata_port_printk(ap, KERN_ERR, | |
3099 | "COMRESET failed (errno=%d)\n", rc); | |
3100 | return rc; | |
3101 | } | |
c2bd5804 | 3102 | |
c2bd5804 | 3103 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 3104 | if (ata_port_offline(ap)) { |
c2bd5804 TH |
3105 | *class = ATA_DEV_NONE; |
3106 | DPRINTK("EXIT, link offline\n"); | |
3107 | return 0; | |
3108 | } | |
3109 | ||
3110 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
f15a1daf TH |
3111 | ata_port_printk(ap, KERN_ERR, |
3112 | "COMRESET failed (device not ready)\n"); | |
c2bd5804 TH |
3113 | return -EIO; |
3114 | } | |
3115 | ||
3a39746a TH |
3116 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
3117 | ||
c2bd5804 TH |
3118 | *class = ata_dev_try_classify(ap, 0, NULL); |
3119 | ||
3120 | DPRINTK("EXIT, class=%u\n", *class); | |
3121 | return 0; | |
3122 | } | |
3123 | ||
3124 | /** | |
3125 | * ata_std_postreset - standard postreset callback | |
3126 | * @ap: the target ata_port | |
3127 | * @classes: classes of attached devices | |
3128 | * | |
3129 | * This function is invoked after a successful reset. Note that | |
3130 | * the device might have been reset more than once using | |
3131 | * different reset methods before postreset is invoked. | |
c2bd5804 | 3132 | * |
c2bd5804 TH |
3133 | * LOCKING: |
3134 | * Kernel thread context (may sleep) | |
3135 | */ | |
3136 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
3137 | { | |
dc2b3515 TH |
3138 | u32 serror; |
3139 | ||
c2bd5804 TH |
3140 | DPRINTK("ENTER\n"); |
3141 | ||
c2bd5804 | 3142 | /* print link status */ |
81952c54 | 3143 | sata_print_link_status(ap); |
c2bd5804 | 3144 | |
dc2b3515 TH |
3145 | /* clear SError */ |
3146 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
3147 | sata_scr_write(ap, SCR_ERROR, serror); | |
3148 | ||
3a39746a | 3149 | /* re-enable interrupts */ |
e3180499 TH |
3150 | if (!ap->ops->error_handler) { |
3151 | /* FIXME: hack. create a hook instead */ | |
3152 | if (ap->ioaddr.ctl_addr) | |
3153 | ata_irq_on(ap); | |
3154 | } | |
c2bd5804 TH |
3155 | |
3156 | /* is double-select really necessary? */ | |
3157 | if (classes[0] != ATA_DEV_NONE) | |
3158 | ap->ops->dev_select(ap, 1); | |
3159 | if (classes[1] != ATA_DEV_NONE) | |
3160 | ap->ops->dev_select(ap, 0); | |
3161 | ||
3a39746a TH |
3162 | /* bail out if no device is present */ |
3163 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
3164 | DPRINTK("EXIT, no device\n"); | |
3165 | return; | |
3166 | } | |
3167 | ||
3168 | /* set up device control */ | |
3169 | if (ap->ioaddr.ctl_addr) { | |
3170 | if (ap->flags & ATA_FLAG_MMIO) | |
3171 | writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
3172 | else | |
3173 | outb(ap->ctl, ap->ioaddr.ctl_addr); | |
3174 | } | |
c2bd5804 TH |
3175 | |
3176 | DPRINTK("EXIT\n"); | |
3177 | } | |
3178 | ||
623a3128 TH |
3179 | /** |
3180 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
3181 | * @dev: device to compare against |
3182 | * @new_class: class of the new device | |
3183 | * @new_id: IDENTIFY page of the new device | |
3184 | * | |
3185 | * Compare @new_class and @new_id against @dev and determine | |
3186 | * whether @dev is the device indicated by @new_class and | |
3187 | * @new_id. | |
3188 | * | |
3189 | * LOCKING: | |
3190 | * None. | |
3191 | * | |
3192 | * RETURNS: | |
3193 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
3194 | */ | |
3373efd8 TH |
3195 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
3196 | const u16 *new_id) | |
623a3128 TH |
3197 | { |
3198 | const u16 *old_id = dev->id; | |
3199 | unsigned char model[2][41], serial[2][21]; | |
3200 | u64 new_n_sectors; | |
3201 | ||
3202 | if (dev->class != new_class) { | |
f15a1daf TH |
3203 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
3204 | dev->class, new_class); | |
623a3128 TH |
3205 | return 0; |
3206 | } | |
3207 | ||
3208 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | |
3209 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | |
3210 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | |
3211 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | |
3212 | new_n_sectors = ata_id_n_sectors(new_id); | |
3213 | ||
3214 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
3215 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
3216 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
3217 | return 0; |
3218 | } | |
3219 | ||
3220 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
3221 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
3222 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
3223 | return 0; |
3224 | } | |
3225 | ||
3226 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
f15a1daf TH |
3227 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
3228 | "%llu != %llu\n", | |
3229 | (unsigned long long)dev->n_sectors, | |
3230 | (unsigned long long)new_n_sectors); | |
623a3128 TH |
3231 | return 0; |
3232 | } | |
3233 | ||
3234 | return 1; | |
3235 | } | |
3236 | ||
3237 | /** | |
3238 | * ata_dev_revalidate - Revalidate ATA device | |
623a3128 | 3239 | * @dev: device to revalidate |
bff04647 | 3240 | * @readid_flags: read ID flags |
623a3128 TH |
3241 | * |
3242 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
3243 | * the port. | |
3244 | * | |
3245 | * LOCKING: | |
3246 | * Kernel thread context (may sleep) | |
3247 | * | |
3248 | * RETURNS: | |
3249 | * 0 on success, negative errno otherwise | |
3250 | */ | |
bff04647 | 3251 | int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags) |
623a3128 | 3252 | { |
5eb45c02 | 3253 | unsigned int class = dev->class; |
f15a1daf | 3254 | u16 *id = (void *)dev->ap->sector_buf; |
623a3128 TH |
3255 | int rc; |
3256 | ||
5eb45c02 TH |
3257 | if (!ata_dev_enabled(dev)) { |
3258 | rc = -ENODEV; | |
3259 | goto fail; | |
3260 | } | |
623a3128 | 3261 | |
fe635c7e | 3262 | /* read ID data */ |
bff04647 | 3263 | rc = ata_dev_read_id(dev, &class, readid_flags, id); |
623a3128 TH |
3264 | if (rc) |
3265 | goto fail; | |
3266 | ||
3267 | /* is the device still there? */ | |
3373efd8 | 3268 | if (!ata_dev_same_device(dev, class, id)) { |
623a3128 TH |
3269 | rc = -ENODEV; |
3270 | goto fail; | |
3271 | } | |
3272 | ||
fe635c7e | 3273 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
623a3128 TH |
3274 | |
3275 | /* configure device according to the new ID */ | |
efdaedc4 | 3276 | rc = ata_dev_configure(dev); |
5eb45c02 TH |
3277 | if (rc == 0) |
3278 | return 0; | |
623a3128 TH |
3279 | |
3280 | fail: | |
f15a1daf | 3281 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
3282 | return rc; |
3283 | } | |
3284 | ||
6919a0a6 AC |
3285 | struct ata_blacklist_entry { |
3286 | const char *model_num; | |
3287 | const char *model_rev; | |
3288 | unsigned long horkage; | |
3289 | }; | |
3290 | ||
3291 | static const struct ata_blacklist_entry ata_device_blacklist [] = { | |
3292 | /* Devices with DMA related problems under Linux */ | |
3293 | { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, | |
3294 | { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, | |
3295 | { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, | |
3296 | { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, | |
3297 | { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, | |
3298 | { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, | |
3299 | { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, | |
3300 | { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, | |
3301 | { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, | |
3302 | { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, | |
3303 | { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, | |
3304 | { "CRD-84", NULL, ATA_HORKAGE_NODMA }, | |
3305 | { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, | |
3306 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
3307 | { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, | |
3308 | { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, | |
3309 | { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, | |
3310 | { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, | |
3311 | { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, | |
3312 | { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, | |
3313 | { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, | |
3314 | { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, | |
3315 | { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, | |
3316 | { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, | |
3317 | { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, | |
3318 | { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, | |
3319 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
3320 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, | |
3321 | { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, | |
3322 | { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA }, | |
3323 | ||
3324 | /* Devices we expect to fail diagnostics */ | |
3325 | ||
3326 | /* Devices where NCQ should be avoided */ | |
3327 | /* NCQ is slow */ | |
3328 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, | |
3329 | ||
3330 | /* Devices with NCQ limits */ | |
3331 | ||
3332 | /* End Marker */ | |
3333 | { } | |
1da177e4 | 3334 | }; |
2e9edbf8 | 3335 | |
f4b15fef AC |
3336 | static int ata_strim(char *s, size_t len) |
3337 | { | |
3338 | len = strnlen(s, len); | |
3339 | ||
3340 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
3341 | while ((len > 0) && (s[len - 1] == ' ')) { | |
3342 | len--; | |
3343 | s[len] = 0; | |
3344 | } | |
3345 | return len; | |
3346 | } | |
1da177e4 | 3347 | |
6919a0a6 | 3348 | unsigned long ata_device_blacklisted(const struct ata_device *dev) |
1da177e4 | 3349 | { |
f4b15fef AC |
3350 | unsigned char model_num[40]; |
3351 | unsigned char model_rev[16]; | |
3352 | unsigned int nlen, rlen; | |
6919a0a6 | 3353 | const struct ata_blacklist_entry *ad = ata_device_blacklist; |
3a778275 | 3354 | |
f4b15fef AC |
3355 | ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, |
3356 | sizeof(model_num)); | |
3357 | ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS, | |
3358 | sizeof(model_rev)); | |
3359 | nlen = ata_strim(model_num, sizeof(model_num)); | |
3360 | rlen = ata_strim(model_rev, sizeof(model_rev)); | |
1da177e4 | 3361 | |
6919a0a6 AC |
3362 | while (ad->model_num) { |
3363 | if (!strncmp(ad->model_num, model_num, nlen)) { | |
3364 | if (ad->model_rev == NULL) | |
3365 | return ad->horkage; | |
3366 | if (!strncmp(ad->model_rev, model_rev, rlen)) | |
3367 | return ad->horkage; | |
f4b15fef | 3368 | } |
6919a0a6 | 3369 | ad++; |
f4b15fef | 3370 | } |
1da177e4 LT |
3371 | return 0; |
3372 | } | |
3373 | ||
6919a0a6 AC |
3374 | static int ata_dma_blacklisted(const struct ata_device *dev) |
3375 | { | |
3376 | /* We don't support polling DMA. | |
3377 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
3378 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
3379 | */ | |
3380 | if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && | |
3381 | (dev->flags & ATA_DFLAG_CDB_INTR)) | |
3382 | return 1; | |
3383 | return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0; | |
3384 | } | |
3385 | ||
a6d5a51c TH |
3386 | /** |
3387 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
3388 | * @dev: Device to compute xfermask for |
3389 | * | |
acf356b1 TH |
3390 | * Compute supported xfermask of @dev and store it in |
3391 | * dev->*_mask. This function is responsible for applying all | |
3392 | * known limits including host controller limits, device | |
3393 | * blacklist, etc... | |
a6d5a51c TH |
3394 | * |
3395 | * LOCKING: | |
3396 | * None. | |
a6d5a51c | 3397 | */ |
3373efd8 | 3398 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 3399 | { |
3373efd8 | 3400 | struct ata_port *ap = dev->ap; |
cca3974e | 3401 | struct ata_host *host = ap->host; |
a6d5a51c | 3402 | unsigned long xfer_mask; |
1da177e4 | 3403 | |
37deecb5 | 3404 | /* controller modes available */ |
565083e1 TH |
3405 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
3406 | ap->mwdma_mask, ap->udma_mask); | |
3407 | ||
3408 | /* Apply cable rule here. Don't apply it early because when | |
3409 | * we handle hot plug the cable type can itself change. | |
3410 | */ | |
3411 | if (ap->cbl == ATA_CBL_PATA40) | |
3412 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
fc085150 AC |
3413 | /* Apply drive side cable rule. Unknown or 80 pin cables reported |
3414 | * host side are checked drive side as well. Cases where we know a | |
3415 | * 40wire cable is used safely for 80 are not checked here. | |
3416 | */ | |
3417 | if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80)) | |
3418 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
3419 | ||
1da177e4 | 3420 | |
37deecb5 TH |
3421 | xfer_mask &= ata_pack_xfermask(dev->pio_mask, |
3422 | dev->mwdma_mask, dev->udma_mask); | |
3423 | xfer_mask &= ata_id_xfermask(dev->id); | |
565083e1 | 3424 | |
b352e57d AC |
3425 | /* |
3426 | * CFA Advanced TrueIDE timings are not allowed on a shared | |
3427 | * cable | |
3428 | */ | |
3429 | if (ata_dev_pair(dev)) { | |
3430 | /* No PIO5 or PIO6 */ | |
3431 | xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); | |
3432 | /* No MWDMA3 or MWDMA 4 */ | |
3433 | xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); | |
3434 | } | |
3435 | ||
37deecb5 TH |
3436 | if (ata_dma_blacklisted(dev)) { |
3437 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
f15a1daf TH |
3438 | ata_dev_printk(dev, KERN_WARNING, |
3439 | "device is on DMA blacklist, disabling DMA\n"); | |
37deecb5 | 3440 | } |
a6d5a51c | 3441 | |
cca3974e | 3442 | if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) { |
37deecb5 TH |
3443 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
3444 | ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " | |
3445 | "other device, disabling DMA\n"); | |
5444a6f4 | 3446 | } |
565083e1 | 3447 | |
5444a6f4 AC |
3448 | if (ap->ops->mode_filter) |
3449 | xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); | |
3450 | ||
565083e1 TH |
3451 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
3452 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
3453 | } |
3454 | ||
1da177e4 LT |
3455 | /** |
3456 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
3457 | * @dev: Device to which command will be sent |
3458 | * | |
780a87f7 JG |
3459 | * Issue SET FEATURES - XFER MODE command to device @dev |
3460 | * on port @ap. | |
3461 | * | |
1da177e4 | 3462 | * LOCKING: |
0cba632b | 3463 | * PCI/etc. bus probe sem. |
83206a29 TH |
3464 | * |
3465 | * RETURNS: | |
3466 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
3467 | */ |
3468 | ||
3373efd8 | 3469 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 3470 | { |
a0123703 | 3471 | struct ata_taskfile tf; |
83206a29 | 3472 | unsigned int err_mask; |
1da177e4 LT |
3473 | |
3474 | /* set up set-features taskfile */ | |
3475 | DPRINTK("set features - xfer mode\n"); | |
3476 | ||
3373efd8 | 3477 | ata_tf_init(dev, &tf); |
a0123703 TH |
3478 | tf.command = ATA_CMD_SET_FEATURES; |
3479 | tf.feature = SETFEATURES_XFER; | |
3480 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3481 | tf.protocol = ATA_PROT_NODATA; | |
3482 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 3483 | |
3373efd8 | 3484 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
1da177e4 | 3485 | |
83206a29 TH |
3486 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3487 | return err_mask; | |
1da177e4 LT |
3488 | } |
3489 | ||
8bf62ece AL |
3490 | /** |
3491 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 3492 | * @dev: Device to which command will be sent |
e2a7f77a RD |
3493 | * @heads: Number of heads (taskfile parameter) |
3494 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
3495 | * |
3496 | * LOCKING: | |
6aff8f1f TH |
3497 | * Kernel thread context (may sleep) |
3498 | * | |
3499 | * RETURNS: | |
3500 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 3501 | */ |
3373efd8 TH |
3502 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
3503 | u16 heads, u16 sectors) | |
8bf62ece | 3504 | { |
a0123703 | 3505 | struct ata_taskfile tf; |
6aff8f1f | 3506 | unsigned int err_mask; |
8bf62ece AL |
3507 | |
3508 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3509 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 3510 | return AC_ERR_INVALID; |
8bf62ece AL |
3511 | |
3512 | /* set up init dev params taskfile */ | |
3513 | DPRINTK("init dev params \n"); | |
3514 | ||
3373efd8 | 3515 | ata_tf_init(dev, &tf); |
a0123703 TH |
3516 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
3517 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3518 | tf.protocol = ATA_PROT_NODATA; | |
3519 | tf.nsect = sectors; | |
3520 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 3521 | |
3373efd8 | 3522 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
8bf62ece | 3523 | |
6aff8f1f TH |
3524 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3525 | return err_mask; | |
8bf62ece AL |
3526 | } |
3527 | ||
1da177e4 | 3528 | /** |
0cba632b JG |
3529 | * ata_sg_clean - Unmap DMA memory associated with command |
3530 | * @qc: Command containing DMA memory to be released | |
3531 | * | |
3532 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
3533 | * |
3534 | * LOCKING: | |
cca3974e | 3535 | * spin_lock_irqsave(host lock) |
1da177e4 | 3536 | */ |
70e6ad0c | 3537 | void ata_sg_clean(struct ata_queued_cmd *qc) |
1da177e4 LT |
3538 | { |
3539 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 3540 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3541 | int dir = qc->dma_dir; |
cedc9a47 | 3542 | void *pad_buf = NULL; |
1da177e4 | 3543 | |
a4631474 TH |
3544 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
3545 | WARN_ON(sg == NULL); | |
1da177e4 LT |
3546 | |
3547 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 3548 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 3549 | |
2c13b7ce | 3550 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 3551 | |
cedc9a47 JG |
3552 | /* if we padded the buffer out to 32-bit bound, and data |
3553 | * xfer direction is from-device, we must copy from the | |
3554 | * pad buffer back into the supplied buffer | |
3555 | */ | |
3556 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3557 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3558 | ||
3559 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 3560 | if (qc->n_elem) |
2f1f610b | 3561 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
3562 | /* restore last sg */ |
3563 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
3564 | if (pad_buf) { | |
3565 | struct scatterlist *psg = &qc->pad_sgent; | |
3566 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3567 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 3568 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3569 | } |
3570 | } else { | |
2e242fa9 | 3571 | if (qc->n_elem) |
2f1f610b | 3572 | dma_unmap_single(ap->dev, |
e1410f2d JG |
3573 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
3574 | dir); | |
cedc9a47 JG |
3575 | /* restore sg */ |
3576 | sg->length += qc->pad_len; | |
3577 | if (pad_buf) | |
3578 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
3579 | pad_buf, qc->pad_len); | |
3580 | } | |
1da177e4 LT |
3581 | |
3582 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 3583 | qc->__sg = NULL; |
1da177e4 LT |
3584 | } |
3585 | ||
3586 | /** | |
3587 | * ata_fill_sg - Fill PCI IDE PRD table | |
3588 | * @qc: Metadata associated with taskfile to be transferred | |
3589 | * | |
780a87f7 JG |
3590 | * Fill PCI IDE PRD (scatter-gather) table with segments |
3591 | * associated with the current disk command. | |
3592 | * | |
1da177e4 | 3593 | * LOCKING: |
cca3974e | 3594 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3595 | * |
3596 | */ | |
3597 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
3598 | { | |
1da177e4 | 3599 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
3600 | struct scatterlist *sg; |
3601 | unsigned int idx; | |
1da177e4 | 3602 | |
a4631474 | 3603 | WARN_ON(qc->__sg == NULL); |
f131883e | 3604 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
3605 | |
3606 | idx = 0; | |
cedc9a47 | 3607 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
3608 | u32 addr, offset; |
3609 | u32 sg_len, len; | |
3610 | ||
3611 | /* determine if physical DMA addr spans 64K boundary. | |
3612 | * Note h/w doesn't support 64-bit, so we unconditionally | |
3613 | * truncate dma_addr_t to u32. | |
3614 | */ | |
3615 | addr = (u32) sg_dma_address(sg); | |
3616 | sg_len = sg_dma_len(sg); | |
3617 | ||
3618 | while (sg_len) { | |
3619 | offset = addr & 0xffff; | |
3620 | len = sg_len; | |
3621 | if ((offset + sg_len) > 0x10000) | |
3622 | len = 0x10000 - offset; | |
3623 | ||
3624 | ap->prd[idx].addr = cpu_to_le32(addr); | |
3625 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
3626 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
3627 | ||
3628 | idx++; | |
3629 | sg_len -= len; | |
3630 | addr += len; | |
3631 | } | |
3632 | } | |
3633 | ||
3634 | if (idx) | |
3635 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
3636 | } | |
3637 | /** | |
3638 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
3639 | * @qc: Metadata associated with taskfile to check | |
3640 | * | |
780a87f7 JG |
3641 | * Allow low-level driver to filter ATA PACKET commands, returning |
3642 | * a status indicating whether or not it is OK to use DMA for the | |
3643 | * supplied PACKET command. | |
3644 | * | |
1da177e4 | 3645 | * LOCKING: |
cca3974e | 3646 | * spin_lock_irqsave(host lock) |
0cba632b | 3647 | * |
1da177e4 LT |
3648 | * RETURNS: 0 when ATAPI DMA can be used |
3649 | * nonzero otherwise | |
3650 | */ | |
3651 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
3652 | { | |
3653 | struct ata_port *ap = qc->ap; | |
3654 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
3655 | ||
3656 | if (ap->ops->check_atapi_dma) | |
3657 | rc = ap->ops->check_atapi_dma(qc); | |
3658 | ||
3659 | return rc; | |
3660 | } | |
3661 | /** | |
3662 | * ata_qc_prep - Prepare taskfile for submission | |
3663 | * @qc: Metadata associated with taskfile to be prepared | |
3664 | * | |
780a87f7 JG |
3665 | * Prepare ATA taskfile for submission. |
3666 | * | |
1da177e4 | 3667 | * LOCKING: |
cca3974e | 3668 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3669 | */ |
3670 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3671 | { | |
3672 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3673 | return; | |
3674 | ||
3675 | ata_fill_sg(qc); | |
3676 | } | |
3677 | ||
e46834cd BK |
3678 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
3679 | ||
0cba632b JG |
3680 | /** |
3681 | * ata_sg_init_one - Associate command with memory buffer | |
3682 | * @qc: Command to be associated | |
3683 | * @buf: Memory buffer | |
3684 | * @buflen: Length of memory buffer, in bytes. | |
3685 | * | |
3686 | * Initialize the data-related elements of queued_cmd @qc | |
3687 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3688 | * | |
3689 | * LOCKING: | |
cca3974e | 3690 | * spin_lock_irqsave(host lock) |
0cba632b JG |
3691 | */ |
3692 | ||
1da177e4 LT |
3693 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
3694 | { | |
1da177e4 LT |
3695 | qc->flags |= ATA_QCFLAG_SINGLE; |
3696 | ||
cedc9a47 | 3697 | qc->__sg = &qc->sgent; |
1da177e4 | 3698 | qc->n_elem = 1; |
cedc9a47 | 3699 | qc->orig_n_elem = 1; |
1da177e4 | 3700 | qc->buf_virt = buf; |
233277ca | 3701 | qc->nbytes = buflen; |
1da177e4 | 3702 | |
61c0596c | 3703 | sg_init_one(&qc->sgent, buf, buflen); |
1da177e4 LT |
3704 | } |
3705 | ||
0cba632b JG |
3706 | /** |
3707 | * ata_sg_init - Associate command with scatter-gather table. | |
3708 | * @qc: Command to be associated | |
3709 | * @sg: Scatter-gather table. | |
3710 | * @n_elem: Number of elements in s/g table. | |
3711 | * | |
3712 | * Initialize the data-related elements of queued_cmd @qc | |
3713 | * to point to a scatter-gather table @sg, containing @n_elem | |
3714 | * elements. | |
3715 | * | |
3716 | * LOCKING: | |
cca3974e | 3717 | * spin_lock_irqsave(host lock) |
0cba632b JG |
3718 | */ |
3719 | ||
1da177e4 LT |
3720 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
3721 | unsigned int n_elem) | |
3722 | { | |
3723 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 3724 | qc->__sg = sg; |
1da177e4 | 3725 | qc->n_elem = n_elem; |
cedc9a47 | 3726 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
3727 | } |
3728 | ||
3729 | /** | |
0cba632b JG |
3730 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
3731 | * @qc: Command with memory buffer to be mapped. | |
3732 | * | |
3733 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
3734 | * |
3735 | * LOCKING: | |
cca3974e | 3736 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3737 | * |
3738 | * RETURNS: | |
0cba632b | 3739 | * Zero on success, negative on error. |
1da177e4 LT |
3740 | */ |
3741 | ||
3742 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3743 | { | |
3744 | struct ata_port *ap = qc->ap; | |
3745 | int dir = qc->dma_dir; | |
cedc9a47 | 3746 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3747 | dma_addr_t dma_address; |
2e242fa9 | 3748 | int trim_sg = 0; |
1da177e4 | 3749 | |
cedc9a47 JG |
3750 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3751 | qc->pad_len = sg->length & 3; | |
3752 | if (qc->pad_len) { | |
3753 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3754 | struct scatterlist *psg = &qc->pad_sgent; | |
3755 | ||
a4631474 | 3756 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3757 | |
3758 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3759 | ||
3760 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3761 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3762 | qc->pad_len); | |
3763 | ||
3764 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3765 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3766 | /* trim sg */ | |
3767 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
3768 | if (sg->length == 0) |
3769 | trim_sg = 1; | |
cedc9a47 JG |
3770 | |
3771 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3772 | sg->length, qc->pad_len); | |
3773 | } | |
3774 | ||
2e242fa9 TH |
3775 | if (trim_sg) { |
3776 | qc->n_elem--; | |
e1410f2d JG |
3777 | goto skip_map; |
3778 | } | |
3779 | ||
2f1f610b | 3780 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 3781 | sg->length, dir); |
537a95d9 TH |
3782 | if (dma_mapping_error(dma_address)) { |
3783 | /* restore sg */ | |
3784 | sg->length += qc->pad_len; | |
1da177e4 | 3785 | return -1; |
537a95d9 | 3786 | } |
1da177e4 LT |
3787 | |
3788 | sg_dma_address(sg) = dma_address; | |
32529e01 | 3789 | sg_dma_len(sg) = sg->length; |
1da177e4 | 3790 | |
2e242fa9 | 3791 | skip_map: |
1da177e4 LT |
3792 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
3793 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3794 | ||
3795 | return 0; | |
3796 | } | |
3797 | ||
3798 | /** | |
0cba632b JG |
3799 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
3800 | * @qc: Command with scatter-gather table to be mapped. | |
3801 | * | |
3802 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
3803 | * |
3804 | * LOCKING: | |
cca3974e | 3805 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3806 | * |
3807 | * RETURNS: | |
0cba632b | 3808 | * Zero on success, negative on error. |
1da177e4 LT |
3809 | * |
3810 | */ | |
3811 | ||
3812 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3813 | { | |
3814 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
3815 | struct scatterlist *sg = qc->__sg; |
3816 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 3817 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
3818 | |
3819 | VPRINTK("ENTER, ata%u\n", ap->id); | |
a4631474 | 3820 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 3821 | |
cedc9a47 JG |
3822 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3823 | qc->pad_len = lsg->length & 3; | |
3824 | if (qc->pad_len) { | |
3825 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3826 | struct scatterlist *psg = &qc->pad_sgent; | |
3827 | unsigned int offset; | |
3828 | ||
a4631474 | 3829 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3830 | |
3831 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3832 | ||
3833 | /* | |
3834 | * psg->page/offset are used to copy to-be-written | |
3835 | * data in this function or read data in ata_sg_clean. | |
3836 | */ | |
3837 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3838 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3839 | psg->offset = offset_in_page(offset); | |
3840 | ||
3841 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3842 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3843 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 3844 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3845 | } |
3846 | ||
3847 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3848 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3849 | /* trim last sg */ | |
3850 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
3851 | if (lsg->length == 0) |
3852 | trim_sg = 1; | |
cedc9a47 JG |
3853 | |
3854 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3855 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3856 | } | |
3857 | ||
e1410f2d JG |
3858 | pre_n_elem = qc->n_elem; |
3859 | if (trim_sg && pre_n_elem) | |
3860 | pre_n_elem--; | |
3861 | ||
3862 | if (!pre_n_elem) { | |
3863 | n_elem = 0; | |
3864 | goto skip_map; | |
3865 | } | |
3866 | ||
1da177e4 | 3867 | dir = qc->dma_dir; |
2f1f610b | 3868 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
3869 | if (n_elem < 1) { |
3870 | /* restore last sg */ | |
3871 | lsg->length += qc->pad_len; | |
1da177e4 | 3872 | return -1; |
537a95d9 | 3873 | } |
1da177e4 LT |
3874 | |
3875 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3876 | ||
e1410f2d | 3877 | skip_map: |
1da177e4 LT |
3878 | qc->n_elem = n_elem; |
3879 | ||
3880 | return 0; | |
3881 | } | |
3882 | ||
0baab86b | 3883 | /** |
c893a3ae | 3884 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
3885 | * @buf: Buffer to swap |
3886 | * @buf_words: Number of 16-bit words in buffer. | |
3887 | * | |
3888 | * Swap halves of 16-bit words if needed to convert from | |
3889 | * little-endian byte order to native cpu byte order, or | |
3890 | * vice-versa. | |
3891 | * | |
3892 | * LOCKING: | |
6f0ef4fa | 3893 | * Inherited from caller. |
0baab86b | 3894 | */ |
1da177e4 LT |
3895 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
3896 | { | |
3897 | #ifdef __BIG_ENDIAN | |
3898 | unsigned int i; | |
3899 | ||
3900 | for (i = 0; i < buf_words; i++) | |
3901 | buf[i] = le16_to_cpu(buf[i]); | |
3902 | #endif /* __BIG_ENDIAN */ | |
3903 | } | |
3904 | ||
6ae4cfb5 AL |
3905 | /** |
3906 | * ata_mmio_data_xfer - Transfer data by MMIO | |
bf717b11 | 3907 | * @adev: device for this I/O |
6ae4cfb5 AL |
3908 | * @buf: data buffer |
3909 | * @buflen: buffer length | |
344babaa | 3910 | * @write_data: read/write |
6ae4cfb5 AL |
3911 | * |
3912 | * Transfer data from/to the device data register by MMIO. | |
3913 | * | |
3914 | * LOCKING: | |
3915 | * Inherited from caller. | |
6ae4cfb5 AL |
3916 | */ |
3917 | ||
88574551 | 3918 | void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3919 | unsigned int buflen, int write_data) |
1da177e4 | 3920 | { |
a6b2c5d4 | 3921 | struct ata_port *ap = adev->ap; |
1da177e4 LT |
3922 | unsigned int i; |
3923 | unsigned int words = buflen >> 1; | |
3924 | u16 *buf16 = (u16 *) buf; | |
3925 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3926 | ||
6ae4cfb5 | 3927 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3928 | if (write_data) { |
3929 | for (i = 0; i < words; i++) | |
3930 | writew(le16_to_cpu(buf16[i]), mmio); | |
3931 | } else { | |
3932 | for (i = 0; i < words; i++) | |
3933 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3934 | } | |
6ae4cfb5 AL |
3935 | |
3936 | /* Transfer trailing 1 byte, if any. */ | |
3937 | if (unlikely(buflen & 0x01)) { | |
3938 | u16 align_buf[1] = { 0 }; | |
3939 | unsigned char *trailing_buf = buf + buflen - 1; | |
3940 | ||
3941 | if (write_data) { | |
3942 | memcpy(align_buf, trailing_buf, 1); | |
3943 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3944 | } else { | |
3945 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3946 | memcpy(trailing_buf, align_buf, 1); | |
3947 | } | |
3948 | } | |
1da177e4 LT |
3949 | } |
3950 | ||
6ae4cfb5 AL |
3951 | /** |
3952 | * ata_pio_data_xfer - Transfer data by PIO | |
a6b2c5d4 | 3953 | * @adev: device to target |
6ae4cfb5 AL |
3954 | * @buf: data buffer |
3955 | * @buflen: buffer length | |
344babaa | 3956 | * @write_data: read/write |
6ae4cfb5 AL |
3957 | * |
3958 | * Transfer data from/to the device data register by PIO. | |
3959 | * | |
3960 | * LOCKING: | |
3961 | * Inherited from caller. | |
6ae4cfb5 AL |
3962 | */ |
3963 | ||
88574551 | 3964 | void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3965 | unsigned int buflen, int write_data) |
1da177e4 | 3966 | { |
a6b2c5d4 | 3967 | struct ata_port *ap = adev->ap; |
6ae4cfb5 | 3968 | unsigned int words = buflen >> 1; |
1da177e4 | 3969 | |
6ae4cfb5 | 3970 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3971 | if (write_data) |
6ae4cfb5 | 3972 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3973 | else |
6ae4cfb5 AL |
3974 | insw(ap->ioaddr.data_addr, buf, words); |
3975 | ||
3976 | /* Transfer trailing 1 byte, if any. */ | |
3977 | if (unlikely(buflen & 0x01)) { | |
3978 | u16 align_buf[1] = { 0 }; | |
3979 | unsigned char *trailing_buf = buf + buflen - 1; | |
3980 | ||
3981 | if (write_data) { | |
3982 | memcpy(align_buf, trailing_buf, 1); | |
3983 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3984 | } else { | |
3985 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3986 | memcpy(trailing_buf, align_buf, 1); | |
3987 | } | |
3988 | } | |
1da177e4 LT |
3989 | } |
3990 | ||
75e99585 AC |
3991 | /** |
3992 | * ata_pio_data_xfer_noirq - Transfer data by PIO | |
3993 | * @adev: device to target | |
3994 | * @buf: data buffer | |
3995 | * @buflen: buffer length | |
3996 | * @write_data: read/write | |
3997 | * | |
88574551 | 3998 | * Transfer data from/to the device data register by PIO. Do the |
75e99585 AC |
3999 | * transfer with interrupts disabled. |
4000 | * | |
4001 | * LOCKING: | |
4002 | * Inherited from caller. | |
4003 | */ | |
4004 | ||
4005 | void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, | |
4006 | unsigned int buflen, int write_data) | |
4007 | { | |
4008 | unsigned long flags; | |
4009 | local_irq_save(flags); | |
4010 | ata_pio_data_xfer(adev, buf, buflen, write_data); | |
4011 | local_irq_restore(flags); | |
4012 | } | |
4013 | ||
4014 | ||
6ae4cfb5 AL |
4015 | /** |
4016 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
4017 | * @qc: Command on going | |
4018 | * | |
4019 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
4020 | * | |
4021 | * LOCKING: | |
4022 | * Inherited from caller. | |
4023 | */ | |
4024 | ||
1da177e4 LT |
4025 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
4026 | { | |
4027 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 4028 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
4029 | struct ata_port *ap = qc->ap; |
4030 | struct page *page; | |
4031 | unsigned int offset; | |
4032 | unsigned char *buf; | |
4033 | ||
4034 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 4035 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4036 | |
4037 | page = sg[qc->cursg].page; | |
4038 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
4039 | ||
4040 | /* get the current page and offset */ | |
4041 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4042 | offset %= PAGE_SIZE; | |
4043 | ||
1da177e4 LT |
4044 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
4045 | ||
91b8b313 AL |
4046 | if (PageHighMem(page)) { |
4047 | unsigned long flags; | |
4048 | ||
a6b2c5d4 | 4049 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
4050 | local_irq_save(flags); |
4051 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 4052 | |
91b8b313 | 4053 | /* do the actual data transfer */ |
a6b2c5d4 | 4054 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
1da177e4 | 4055 | |
91b8b313 AL |
4056 | kunmap_atomic(buf, KM_IRQ0); |
4057 | local_irq_restore(flags); | |
4058 | } else { | |
4059 | buf = page_address(page); | |
a6b2c5d4 | 4060 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
91b8b313 | 4061 | } |
1da177e4 LT |
4062 | |
4063 | qc->cursect++; | |
4064 | qc->cursg_ofs++; | |
4065 | ||
32529e01 | 4066 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
4067 | qc->cursg++; |
4068 | qc->cursg_ofs = 0; | |
4069 | } | |
1da177e4 | 4070 | } |
1da177e4 | 4071 | |
07f6f7d0 AL |
4072 | /** |
4073 | * ata_pio_sectors - Transfer one or many 512-byte sectors. | |
4074 | * @qc: Command on going | |
4075 | * | |
c81e29b4 | 4076 | * Transfer one or many ATA_SECT_SIZE of data from/to the |
07f6f7d0 AL |
4077 | * ATA device for the DRQ request. |
4078 | * | |
4079 | * LOCKING: | |
4080 | * Inherited from caller. | |
4081 | */ | |
1da177e4 | 4082 | |
07f6f7d0 AL |
4083 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
4084 | { | |
4085 | if (is_multi_taskfile(&qc->tf)) { | |
4086 | /* READ/WRITE MULTIPLE */ | |
4087 | unsigned int nsect; | |
4088 | ||
587005de | 4089 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 4090 | |
07f6f7d0 AL |
4091 | nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count); |
4092 | while (nsect--) | |
4093 | ata_pio_sector(qc); | |
4094 | } else | |
4095 | ata_pio_sector(qc); | |
4096 | } | |
4097 | ||
c71c1857 AL |
4098 | /** |
4099 | * atapi_send_cdb - Write CDB bytes to hardware | |
4100 | * @ap: Port to which ATAPI device is attached. | |
4101 | * @qc: Taskfile currently active | |
4102 | * | |
4103 | * When device has indicated its readiness to accept | |
4104 | * a CDB, this function is called. Send the CDB. | |
4105 | * | |
4106 | * LOCKING: | |
4107 | * caller. | |
4108 | */ | |
4109 | ||
4110 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
4111 | { | |
4112 | /* send SCSI cdb */ | |
4113 | DPRINTK("send cdb\n"); | |
db024d53 | 4114 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 4115 | |
a6b2c5d4 | 4116 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
4117 | ata_altstatus(ap); /* flush */ |
4118 | ||
4119 | switch (qc->tf.protocol) { | |
4120 | case ATA_PROT_ATAPI: | |
4121 | ap->hsm_task_state = HSM_ST; | |
4122 | break; | |
4123 | case ATA_PROT_ATAPI_NODATA: | |
4124 | ap->hsm_task_state = HSM_ST_LAST; | |
4125 | break; | |
4126 | case ATA_PROT_ATAPI_DMA: | |
4127 | ap->hsm_task_state = HSM_ST_LAST; | |
4128 | /* initiate bmdma */ | |
4129 | ap->ops->bmdma_start(qc); | |
4130 | break; | |
4131 | } | |
1da177e4 LT |
4132 | } |
4133 | ||
6ae4cfb5 AL |
4134 | /** |
4135 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4136 | * @qc: Command on going | |
4137 | * @bytes: number of bytes | |
4138 | * | |
4139 | * Transfer Transfer data from/to the ATAPI device. | |
4140 | * | |
4141 | * LOCKING: | |
4142 | * Inherited from caller. | |
4143 | * | |
4144 | */ | |
4145 | ||
1da177e4 LT |
4146 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
4147 | { | |
4148 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 4149 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
4150 | struct ata_port *ap = qc->ap; |
4151 | struct page *page; | |
4152 | unsigned char *buf; | |
4153 | unsigned int offset, count; | |
4154 | ||
563a6e1f | 4155 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 4156 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4157 | |
4158 | next_sg: | |
563a6e1f | 4159 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 4160 | /* |
563a6e1f AL |
4161 | * The end of qc->sg is reached and the device expects |
4162 | * more data to transfer. In order not to overrun qc->sg | |
4163 | * and fulfill length specified in the byte count register, | |
4164 | * - for read case, discard trailing data from the device | |
4165 | * - for write case, padding zero data to the device | |
4166 | */ | |
4167 | u16 pad_buf[1] = { 0 }; | |
4168 | unsigned int words = bytes >> 1; | |
4169 | unsigned int i; | |
4170 | ||
4171 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
4172 | ata_dev_printk(qc->dev, KERN_WARNING, |
4173 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
4174 | |
4175 | for (i = 0; i < words; i++) | |
a6b2c5d4 | 4176 | ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); |
563a6e1f | 4177 | |
14be71f4 | 4178 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
4179 | return; |
4180 | } | |
4181 | ||
cedc9a47 | 4182 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 4183 | |
1da177e4 LT |
4184 | page = sg->page; |
4185 | offset = sg->offset + qc->cursg_ofs; | |
4186 | ||
4187 | /* get the current page and offset */ | |
4188 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4189 | offset %= PAGE_SIZE; | |
4190 | ||
6952df03 | 4191 | /* don't overrun current sg */ |
32529e01 | 4192 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
4193 | |
4194 | /* don't cross page boundaries */ | |
4195 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
4196 | ||
7282aa4b AL |
4197 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
4198 | ||
91b8b313 AL |
4199 | if (PageHighMem(page)) { |
4200 | unsigned long flags; | |
4201 | ||
a6b2c5d4 | 4202 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
4203 | local_irq_save(flags); |
4204 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 4205 | |
91b8b313 | 4206 | /* do the actual data transfer */ |
a6b2c5d4 | 4207 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 4208 | |
91b8b313 AL |
4209 | kunmap_atomic(buf, KM_IRQ0); |
4210 | local_irq_restore(flags); | |
4211 | } else { | |
4212 | buf = page_address(page); | |
a6b2c5d4 | 4213 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 4214 | } |
1da177e4 LT |
4215 | |
4216 | bytes -= count; | |
4217 | qc->curbytes += count; | |
4218 | qc->cursg_ofs += count; | |
4219 | ||
32529e01 | 4220 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
4221 | qc->cursg++; |
4222 | qc->cursg_ofs = 0; | |
4223 | } | |
4224 | ||
563a6e1f | 4225 | if (bytes) |
1da177e4 | 4226 | goto next_sg; |
1da177e4 LT |
4227 | } |
4228 | ||
6ae4cfb5 AL |
4229 | /** |
4230 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4231 | * @qc: Command on going | |
4232 | * | |
4233 | * Transfer Transfer data from/to the ATAPI device. | |
4234 | * | |
4235 | * LOCKING: | |
4236 | * Inherited from caller. | |
6ae4cfb5 AL |
4237 | */ |
4238 | ||
1da177e4 LT |
4239 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
4240 | { | |
4241 | struct ata_port *ap = qc->ap; | |
4242 | struct ata_device *dev = qc->dev; | |
4243 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
4244 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
4245 | ||
eec4c3f3 AL |
4246 | /* Abuse qc->result_tf for temp storage of intermediate TF |
4247 | * here to save some kernel stack usage. | |
4248 | * For normal completion, qc->result_tf is not relevant. For | |
4249 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
4250 | * So, the correctness of qc->result_tf is not affected. | |
4251 | */ | |
4252 | ap->ops->tf_read(ap, &qc->result_tf); | |
4253 | ireason = qc->result_tf.nsect; | |
4254 | bc_lo = qc->result_tf.lbam; | |
4255 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
4256 | bytes = (bc_hi << 8) | bc_lo; |
4257 | ||
4258 | /* shall be cleared to zero, indicating xfer of data */ | |
4259 | if (ireason & (1 << 0)) | |
4260 | goto err_out; | |
4261 | ||
4262 | /* make sure transfer direction matches expected */ | |
4263 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
4264 | if (do_write != i_write) | |
4265 | goto err_out; | |
4266 | ||
312f7da2 AL |
4267 | VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); |
4268 | ||
1da177e4 LT |
4269 | __atapi_pio_bytes(qc, bytes); |
4270 | ||
4271 | return; | |
4272 | ||
4273 | err_out: | |
f15a1daf | 4274 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 4275 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 4276 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
4277 | } |
4278 | ||
4279 | /** | |
c234fb00 AL |
4280 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
4281 | * @ap: the target ata_port | |
4282 | * @qc: qc on going | |
1da177e4 | 4283 | * |
c234fb00 AL |
4284 | * RETURNS: |
4285 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 4286 | */ |
c234fb00 AL |
4287 | |
4288 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 4289 | { |
c234fb00 AL |
4290 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4291 | return 1; | |
1da177e4 | 4292 | |
c234fb00 AL |
4293 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
4294 | if (qc->tf.protocol == ATA_PROT_PIO && | |
4295 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
4296 | return 1; | |
1da177e4 | 4297 | |
c234fb00 AL |
4298 | if (is_atapi_taskfile(&qc->tf) && |
4299 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
4300 | return 1; | |
fe79e683 AL |
4301 | } |
4302 | ||
c234fb00 AL |
4303 | return 0; |
4304 | } | |
1da177e4 | 4305 | |
c17ea20d TH |
4306 | /** |
4307 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
4308 | * @qc: Command to complete | |
4309 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4310 | * | |
4311 | * Finish @qc which is running on standard HSM. | |
4312 | * | |
4313 | * LOCKING: | |
cca3974e | 4314 | * If @in_wq is zero, spin_lock_irqsave(host lock). |
c17ea20d TH |
4315 | * Otherwise, none on entry and grabs host lock. |
4316 | */ | |
4317 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
4318 | { | |
4319 | struct ata_port *ap = qc->ap; | |
4320 | unsigned long flags; | |
4321 | ||
4322 | if (ap->ops->error_handler) { | |
4323 | if (in_wq) { | |
ba6a1308 | 4324 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d | 4325 | |
cca3974e JG |
4326 | /* EH might have kicked in while host lock is |
4327 | * released. | |
c17ea20d TH |
4328 | */ |
4329 | qc = ata_qc_from_tag(ap, qc->tag); | |
4330 | if (qc) { | |
4331 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
4332 | ata_irq_on(ap); | |
4333 | ata_qc_complete(qc); | |
4334 | } else | |
4335 | ata_port_freeze(ap); | |
4336 | } | |
4337 | ||
ba6a1308 | 4338 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4339 | } else { |
4340 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
4341 | ata_qc_complete(qc); | |
4342 | else | |
4343 | ata_port_freeze(ap); | |
4344 | } | |
4345 | } else { | |
4346 | if (in_wq) { | |
ba6a1308 | 4347 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d TH |
4348 | ata_irq_on(ap); |
4349 | ata_qc_complete(qc); | |
ba6a1308 | 4350 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4351 | } else |
4352 | ata_qc_complete(qc); | |
4353 | } | |
1da177e4 | 4354 | |
c81e29b4 | 4355 | ata_altstatus(ap); /* flush */ |
c17ea20d TH |
4356 | } |
4357 | ||
bb5cb290 AL |
4358 | /** |
4359 | * ata_hsm_move - move the HSM to the next state. | |
4360 | * @ap: the target ata_port | |
4361 | * @qc: qc on going | |
4362 | * @status: current device status | |
4363 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4364 | * | |
4365 | * RETURNS: | |
4366 | * 1 when poll next status needed, 0 otherwise. | |
4367 | */ | |
9a1004d0 TH |
4368 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
4369 | u8 status, int in_wq) | |
e2cec771 | 4370 | { |
bb5cb290 AL |
4371 | unsigned long flags = 0; |
4372 | int poll_next; | |
4373 | ||
6912ccd5 AL |
4374 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
4375 | ||
bb5cb290 AL |
4376 | /* Make sure ata_qc_issue_prot() does not throw things |
4377 | * like DMA polling into the workqueue. Notice that | |
4378 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
4379 | */ | |
c234fb00 | 4380 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 4381 | |
e2cec771 | 4382 | fsm_start: |
999bb6f4 AL |
4383 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
4384 | ap->id, qc->tf.protocol, ap->hsm_task_state, status); | |
4385 | ||
e2cec771 AL |
4386 | switch (ap->hsm_task_state) { |
4387 | case HSM_ST_FIRST: | |
bb5cb290 AL |
4388 | /* Send first data block or PACKET CDB */ |
4389 | ||
4390 | /* If polling, we will stay in the work queue after | |
4391 | * sending the data. Otherwise, interrupt handler | |
4392 | * takes over after sending the data. | |
4393 | */ | |
4394 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
4395 | ||
e2cec771 | 4396 | /* check device status */ |
3655d1d3 AL |
4397 | if (unlikely((status & ATA_DRQ) == 0)) { |
4398 | /* handle BSY=0, DRQ=0 as error */ | |
4399 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4400 | /* device stops HSM for abort/error */ | |
4401 | qc->err_mask |= AC_ERR_DEV; | |
4402 | else | |
4403 | /* HSM violation. Let EH handle this */ | |
4404 | qc->err_mask |= AC_ERR_HSM; | |
4405 | ||
14be71f4 | 4406 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 4407 | goto fsm_start; |
1da177e4 LT |
4408 | } |
4409 | ||
71601958 AL |
4410 | /* Device should not ask for data transfer (DRQ=1) |
4411 | * when it finds something wrong. | |
eee6c32f AL |
4412 | * We ignore DRQ here and stop the HSM by |
4413 | * changing hsm_task_state to HSM_ST_ERR and | |
4414 | * let the EH abort the command or reset the device. | |
71601958 AL |
4415 | */ |
4416 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4417 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4418 | ap->id, status); | |
3655d1d3 | 4419 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4420 | ap->hsm_task_state = HSM_ST_ERR; |
4421 | goto fsm_start; | |
71601958 | 4422 | } |
1da177e4 | 4423 | |
bb5cb290 AL |
4424 | /* Send the CDB (atapi) or the first data block (ata pio out). |
4425 | * During the state transition, interrupt handler shouldn't | |
4426 | * be invoked before the data transfer is complete and | |
4427 | * hsm_task_state is changed. Hence, the following locking. | |
4428 | */ | |
4429 | if (in_wq) | |
ba6a1308 | 4430 | spin_lock_irqsave(ap->lock, flags); |
1da177e4 | 4431 | |
bb5cb290 AL |
4432 | if (qc->tf.protocol == ATA_PROT_PIO) { |
4433 | /* PIO data out protocol. | |
4434 | * send first data block. | |
4435 | */ | |
0565c26d | 4436 | |
bb5cb290 AL |
4437 | /* ata_pio_sectors() might change the state |
4438 | * to HSM_ST_LAST. so, the state is changed here | |
4439 | * before ata_pio_sectors(). | |
4440 | */ | |
4441 | ap->hsm_task_state = HSM_ST; | |
4442 | ata_pio_sectors(qc); | |
4443 | ata_altstatus(ap); /* flush */ | |
4444 | } else | |
4445 | /* send CDB */ | |
4446 | atapi_send_cdb(ap, qc); | |
4447 | ||
4448 | if (in_wq) | |
ba6a1308 | 4449 | spin_unlock_irqrestore(ap->lock, flags); |
bb5cb290 AL |
4450 | |
4451 | /* if polling, ata_pio_task() handles the rest. | |
4452 | * otherwise, interrupt handler takes over from here. | |
4453 | */ | |
e2cec771 | 4454 | break; |
1c848984 | 4455 | |
e2cec771 AL |
4456 | case HSM_ST: |
4457 | /* complete command or read/write the data register */ | |
4458 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4459 | /* ATAPI PIO protocol */ | |
4460 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
4461 | /* No more data to transfer or device error. |
4462 | * Device error will be tagged in HSM_ST_LAST. | |
4463 | */ | |
e2cec771 AL |
4464 | ap->hsm_task_state = HSM_ST_LAST; |
4465 | goto fsm_start; | |
4466 | } | |
1da177e4 | 4467 | |
71601958 AL |
4468 | /* Device should not ask for data transfer (DRQ=1) |
4469 | * when it finds something wrong. | |
eee6c32f AL |
4470 | * We ignore DRQ here and stop the HSM by |
4471 | * changing hsm_task_state to HSM_ST_ERR and | |
4472 | * let the EH abort the command or reset the device. | |
71601958 AL |
4473 | */ |
4474 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4475 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4476 | ap->id, status); | |
3655d1d3 | 4477 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4478 | ap->hsm_task_state = HSM_ST_ERR; |
4479 | goto fsm_start; | |
71601958 | 4480 | } |
1da177e4 | 4481 | |
e2cec771 | 4482 | atapi_pio_bytes(qc); |
7fb6ec28 | 4483 | |
e2cec771 AL |
4484 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
4485 | /* bad ireason reported by device */ | |
4486 | goto fsm_start; | |
1da177e4 | 4487 | |
e2cec771 AL |
4488 | } else { |
4489 | /* ATA PIO protocol */ | |
4490 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4491 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
4492 | if (likely(status & (ATA_ERR | ATA_DF))) |
4493 | /* device stops HSM for abort/error */ | |
4494 | qc->err_mask |= AC_ERR_DEV; | |
4495 | else | |
55a8e2c8 TH |
4496 | /* HSM violation. Let EH handle this. |
4497 | * Phantom devices also trigger this | |
4498 | * condition. Mark hint. | |
4499 | */ | |
4500 | qc->err_mask |= AC_ERR_HSM | | |
4501 | AC_ERR_NODEV_HINT; | |
3655d1d3 | 4502 | |
e2cec771 AL |
4503 | ap->hsm_task_state = HSM_ST_ERR; |
4504 | goto fsm_start; | |
4505 | } | |
1da177e4 | 4506 | |
eee6c32f AL |
4507 | /* For PIO reads, some devices may ask for |
4508 | * data transfer (DRQ=1) alone with ERR=1. | |
4509 | * We respect DRQ here and transfer one | |
4510 | * block of junk data before changing the | |
4511 | * hsm_task_state to HSM_ST_ERR. | |
4512 | * | |
4513 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
4514 | * sense since the data block has been | |
4515 | * transferred to the device. | |
71601958 AL |
4516 | */ |
4517 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
4518 | /* data might be corrputed */ |
4519 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
4520 | |
4521 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
4522 | ata_pio_sectors(qc); | |
4523 | ata_altstatus(ap); | |
4524 | status = ata_wait_idle(ap); | |
4525 | } | |
4526 | ||
3655d1d3 AL |
4527 | if (status & (ATA_BUSY | ATA_DRQ)) |
4528 | qc->err_mask |= AC_ERR_HSM; | |
4529 | ||
eee6c32f AL |
4530 | /* ata_pio_sectors() might change the |
4531 | * state to HSM_ST_LAST. so, the state | |
4532 | * is changed after ata_pio_sectors(). | |
4533 | */ | |
4534 | ap->hsm_task_state = HSM_ST_ERR; | |
4535 | goto fsm_start; | |
71601958 AL |
4536 | } |
4537 | ||
e2cec771 AL |
4538 | ata_pio_sectors(qc); |
4539 | ||
4540 | if (ap->hsm_task_state == HSM_ST_LAST && | |
4541 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
4542 | /* all data read */ | |
4543 | ata_altstatus(ap); | |
52a32205 | 4544 | status = ata_wait_idle(ap); |
e2cec771 AL |
4545 | goto fsm_start; |
4546 | } | |
4547 | } | |
4548 | ||
4549 | ata_altstatus(ap); /* flush */ | |
bb5cb290 | 4550 | poll_next = 1; |
1da177e4 LT |
4551 | break; |
4552 | ||
14be71f4 | 4553 | case HSM_ST_LAST: |
6912ccd5 AL |
4554 | if (unlikely(!ata_ok(status))) { |
4555 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
4556 | ap->hsm_task_state = HSM_ST_ERR; |
4557 | goto fsm_start; | |
4558 | } | |
4559 | ||
4560 | /* no more data to transfer */ | |
4332a771 AL |
4561 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
4562 | ap->id, qc->dev->devno, status); | |
e2cec771 | 4563 | |
6912ccd5 AL |
4564 | WARN_ON(qc->err_mask); |
4565 | ||
e2cec771 | 4566 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 4567 | |
e2cec771 | 4568 | /* complete taskfile transaction */ |
c17ea20d | 4569 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4570 | |
4571 | poll_next = 0; | |
1da177e4 LT |
4572 | break; |
4573 | ||
14be71f4 | 4574 | case HSM_ST_ERR: |
e2cec771 AL |
4575 | /* make sure qc->err_mask is available to |
4576 | * know what's wrong and recover | |
4577 | */ | |
4578 | WARN_ON(qc->err_mask == 0); | |
4579 | ||
4580 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 4581 | |
999bb6f4 | 4582 | /* complete taskfile transaction */ |
c17ea20d | 4583 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4584 | |
4585 | poll_next = 0; | |
e2cec771 AL |
4586 | break; |
4587 | default: | |
bb5cb290 | 4588 | poll_next = 0; |
6912ccd5 | 4589 | BUG(); |
1da177e4 LT |
4590 | } |
4591 | ||
bb5cb290 | 4592 | return poll_next; |
1da177e4 LT |
4593 | } |
4594 | ||
1da177e4 | 4595 | static void ata_pio_task(void *_data) |
8061f5f0 | 4596 | { |
c91af2c8 TH |
4597 | struct ata_queued_cmd *qc = _data; |
4598 | struct ata_port *ap = qc->ap; | |
8061f5f0 | 4599 | u8 status; |
a1af3734 | 4600 | int poll_next; |
8061f5f0 | 4601 | |
7fb6ec28 | 4602 | fsm_start: |
a1af3734 | 4603 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 4604 | |
a1af3734 AL |
4605 | /* |
4606 | * This is purely heuristic. This is a fast path. | |
4607 | * Sometimes when we enter, BSY will be cleared in | |
4608 | * a chk-status or two. If not, the drive is probably seeking | |
4609 | * or something. Snooze for a couple msecs, then | |
4610 | * chk-status again. If still busy, queue delayed work. | |
4611 | */ | |
4612 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
4613 | if (status & ATA_BUSY) { | |
4614 | msleep(2); | |
4615 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
4616 | if (status & ATA_BUSY) { | |
31ce6dae | 4617 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
4618 | return; |
4619 | } | |
8061f5f0 TH |
4620 | } |
4621 | ||
a1af3734 AL |
4622 | /* move the HSM */ |
4623 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 4624 | |
a1af3734 AL |
4625 | /* another command or interrupt handler |
4626 | * may be running at this point. | |
4627 | */ | |
4628 | if (poll_next) | |
7fb6ec28 | 4629 | goto fsm_start; |
8061f5f0 TH |
4630 | } |
4631 | ||
1da177e4 LT |
4632 | /** |
4633 | * ata_qc_new - Request an available ATA command, for queueing | |
4634 | * @ap: Port associated with device @dev | |
4635 | * @dev: Device from whom we request an available command structure | |
4636 | * | |
4637 | * LOCKING: | |
0cba632b | 4638 | * None. |
1da177e4 LT |
4639 | */ |
4640 | ||
4641 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
4642 | { | |
4643 | struct ata_queued_cmd *qc = NULL; | |
4644 | unsigned int i; | |
4645 | ||
e3180499 | 4646 | /* no command while frozen */ |
b51e9e5d | 4647 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) |
e3180499 TH |
4648 | return NULL; |
4649 | ||
2ab7db1f TH |
4650 | /* the last tag is reserved for internal command. */ |
4651 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 4652 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 4653 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
4654 | break; |
4655 | } | |
4656 | ||
4657 | if (qc) | |
4658 | qc->tag = i; | |
4659 | ||
4660 | return qc; | |
4661 | } | |
4662 | ||
4663 | /** | |
4664 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
4665 | * @dev: Device from whom we request an available command structure |
4666 | * | |
4667 | * LOCKING: | |
0cba632b | 4668 | * None. |
1da177e4 LT |
4669 | */ |
4670 | ||
3373efd8 | 4671 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 4672 | { |
3373efd8 | 4673 | struct ata_port *ap = dev->ap; |
1da177e4 LT |
4674 | struct ata_queued_cmd *qc; |
4675 | ||
4676 | qc = ata_qc_new(ap); | |
4677 | if (qc) { | |
1da177e4 LT |
4678 | qc->scsicmd = NULL; |
4679 | qc->ap = ap; | |
4680 | qc->dev = dev; | |
1da177e4 | 4681 | |
2c13b7ce | 4682 | ata_qc_reinit(qc); |
1da177e4 LT |
4683 | } |
4684 | ||
4685 | return qc; | |
4686 | } | |
4687 | ||
1da177e4 LT |
4688 | /** |
4689 | * ata_qc_free - free unused ata_queued_cmd | |
4690 | * @qc: Command to complete | |
4691 | * | |
4692 | * Designed to free unused ata_queued_cmd object | |
4693 | * in case something prevents using it. | |
4694 | * | |
4695 | * LOCKING: | |
cca3974e | 4696 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4697 | */ |
4698 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4699 | { | |
4ba946e9 TH |
4700 | struct ata_port *ap = qc->ap; |
4701 | unsigned int tag; | |
4702 | ||
a4631474 | 4703 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 4704 | |
4ba946e9 TH |
4705 | qc->flags = 0; |
4706 | tag = qc->tag; | |
4707 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 4708 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 4709 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 4710 | } |
1da177e4 LT |
4711 | } |
4712 | ||
76014427 | 4713 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 4714 | { |
dedaf2b0 TH |
4715 | struct ata_port *ap = qc->ap; |
4716 | ||
a4631474 TH |
4717 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4718 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
4719 | |
4720 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4721 | ata_sg_clean(qc); | |
4722 | ||
7401abf2 | 4723 | /* command should be marked inactive atomically with qc completion */ |
dedaf2b0 TH |
4724 | if (qc->tf.protocol == ATA_PROT_NCQ) |
4725 | ap->sactive &= ~(1 << qc->tag); | |
4726 | else | |
4727 | ap->active_tag = ATA_TAG_POISON; | |
7401abf2 | 4728 | |
3f3791d3 AL |
4729 | /* atapi: mark qc as inactive to prevent the interrupt handler |
4730 | * from completing the command twice later, before the error handler | |
4731 | * is called. (when rc != 0 and atapi request sense is needed) | |
4732 | */ | |
4733 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 4734 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 4735 | |
1da177e4 | 4736 | /* call completion callback */ |
77853bf2 | 4737 | qc->complete_fn(qc); |
1da177e4 LT |
4738 | } |
4739 | ||
39599a53 TH |
4740 | static void fill_result_tf(struct ata_queued_cmd *qc) |
4741 | { | |
4742 | struct ata_port *ap = qc->ap; | |
4743 | ||
4744 | ap->ops->tf_read(ap, &qc->result_tf); | |
4745 | qc->result_tf.flags = qc->tf.flags; | |
4746 | } | |
4747 | ||
f686bcb8 TH |
4748 | /** |
4749 | * ata_qc_complete - Complete an active ATA command | |
4750 | * @qc: Command to complete | |
4751 | * @err_mask: ATA Status register contents | |
4752 | * | |
4753 | * Indicate to the mid and upper layers that an ATA | |
4754 | * command has completed, with either an ok or not-ok status. | |
4755 | * | |
4756 | * LOCKING: | |
cca3974e | 4757 | * spin_lock_irqsave(host lock) |
f686bcb8 TH |
4758 | */ |
4759 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
4760 | { | |
4761 | struct ata_port *ap = qc->ap; | |
4762 | ||
4763 | /* XXX: New EH and old EH use different mechanisms to | |
4764 | * synchronize EH with regular execution path. | |
4765 | * | |
4766 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
4767 | * Normal execution path is responsible for not accessing a | |
4768 | * failed qc. libata core enforces the rule by returning NULL | |
4769 | * from ata_qc_from_tag() for failed qcs. | |
4770 | * | |
4771 | * Old EH depends on ata_qc_complete() nullifying completion | |
4772 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
4773 | * not synchronize with interrupt handler. Only PIO task is | |
4774 | * taken care of. | |
4775 | */ | |
4776 | if (ap->ops->error_handler) { | |
b51e9e5d | 4777 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); |
f686bcb8 TH |
4778 | |
4779 | if (unlikely(qc->err_mask)) | |
4780 | qc->flags |= ATA_QCFLAG_FAILED; | |
4781 | ||
4782 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
4783 | if (!ata_tag_internal(qc->tag)) { | |
4784 | /* always fill result TF for failed qc */ | |
39599a53 | 4785 | fill_result_tf(qc); |
f686bcb8 TH |
4786 | ata_qc_schedule_eh(qc); |
4787 | return; | |
4788 | } | |
4789 | } | |
4790 | ||
4791 | /* read result TF if requested */ | |
4792 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 4793 | fill_result_tf(qc); |
f686bcb8 TH |
4794 | |
4795 | __ata_qc_complete(qc); | |
4796 | } else { | |
4797 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
4798 | return; | |
4799 | ||
4800 | /* read result TF if failed or requested */ | |
4801 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 4802 | fill_result_tf(qc); |
f686bcb8 TH |
4803 | |
4804 | __ata_qc_complete(qc); | |
4805 | } | |
4806 | } | |
4807 | ||
dedaf2b0 TH |
4808 | /** |
4809 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
4810 | * @ap: port in question | |
4811 | * @qc_active: new qc_active mask | |
4812 | * @finish_qc: LLDD callback invoked before completing a qc | |
4813 | * | |
4814 | * Complete in-flight commands. This functions is meant to be | |
4815 | * called from low-level driver's interrupt routine to complete | |
4816 | * requests normally. ap->qc_active and @qc_active is compared | |
4817 | * and commands are completed accordingly. | |
4818 | * | |
4819 | * LOCKING: | |
cca3974e | 4820 | * spin_lock_irqsave(host lock) |
dedaf2b0 TH |
4821 | * |
4822 | * RETURNS: | |
4823 | * Number of completed commands on success, -errno otherwise. | |
4824 | */ | |
4825 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
4826 | void (*finish_qc)(struct ata_queued_cmd *)) | |
4827 | { | |
4828 | int nr_done = 0; | |
4829 | u32 done_mask; | |
4830 | int i; | |
4831 | ||
4832 | done_mask = ap->qc_active ^ qc_active; | |
4833 | ||
4834 | if (unlikely(done_mask & qc_active)) { | |
4835 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
4836 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
4837 | return -EINVAL; | |
4838 | } | |
4839 | ||
4840 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
4841 | struct ata_queued_cmd *qc; | |
4842 | ||
4843 | if (!(done_mask & (1 << i))) | |
4844 | continue; | |
4845 | ||
4846 | if ((qc = ata_qc_from_tag(ap, i))) { | |
4847 | if (finish_qc) | |
4848 | finish_qc(qc); | |
4849 | ata_qc_complete(qc); | |
4850 | nr_done++; | |
4851 | } | |
4852 | } | |
4853 | ||
4854 | return nr_done; | |
4855 | } | |
4856 | ||
1da177e4 LT |
4857 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
4858 | { | |
4859 | struct ata_port *ap = qc->ap; | |
4860 | ||
4861 | switch (qc->tf.protocol) { | |
3dc1d881 | 4862 | case ATA_PROT_NCQ: |
1da177e4 LT |
4863 | case ATA_PROT_DMA: |
4864 | case ATA_PROT_ATAPI_DMA: | |
4865 | return 1; | |
4866 | ||
4867 | case ATA_PROT_ATAPI: | |
4868 | case ATA_PROT_PIO: | |
1da177e4 LT |
4869 | if (ap->flags & ATA_FLAG_PIO_DMA) |
4870 | return 1; | |
4871 | ||
4872 | /* fall through */ | |
4873 | ||
4874 | default: | |
4875 | return 0; | |
4876 | } | |
4877 | ||
4878 | /* never reached */ | |
4879 | } | |
4880 | ||
4881 | /** | |
4882 | * ata_qc_issue - issue taskfile to device | |
4883 | * @qc: command to issue to device | |
4884 | * | |
4885 | * Prepare an ATA command to submission to device. | |
4886 | * This includes mapping the data into a DMA-able | |
4887 | * area, filling in the S/G table, and finally | |
4888 | * writing the taskfile to hardware, starting the command. | |
4889 | * | |
4890 | * LOCKING: | |
cca3974e | 4891 | * spin_lock_irqsave(host lock) |
1da177e4 | 4892 | */ |
8e0e694a | 4893 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
4894 | { |
4895 | struct ata_port *ap = qc->ap; | |
4896 | ||
dedaf2b0 TH |
4897 | /* Make sure only one non-NCQ command is outstanding. The |
4898 | * check is skipped for old EH because it reuses active qc to | |
4899 | * request ATAPI sense. | |
4900 | */ | |
4901 | WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); | |
4902 | ||
4903 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4904 | WARN_ON(ap->sactive & (1 << qc->tag)); | |
4905 | ap->sactive |= 1 << qc->tag; | |
4906 | } else { | |
4907 | WARN_ON(ap->sactive); | |
4908 | ap->active_tag = qc->tag; | |
4909 | } | |
4910 | ||
e4a70e76 | 4911 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 4912 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 4913 | |
1da177e4 LT |
4914 | if (ata_should_dma_map(qc)) { |
4915 | if (qc->flags & ATA_QCFLAG_SG) { | |
4916 | if (ata_sg_setup(qc)) | |
8e436af9 | 4917 | goto sg_err; |
1da177e4 LT |
4918 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
4919 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 4920 | goto sg_err; |
1da177e4 LT |
4921 | } |
4922 | } else { | |
4923 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4924 | } | |
4925 | ||
4926 | ap->ops->qc_prep(qc); | |
4927 | ||
8e0e694a TH |
4928 | qc->err_mask |= ap->ops->qc_issue(qc); |
4929 | if (unlikely(qc->err_mask)) | |
4930 | goto err; | |
4931 | return; | |
1da177e4 | 4932 | |
8e436af9 TH |
4933 | sg_err: |
4934 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
4935 | qc->err_mask |= AC_ERR_SYSTEM; |
4936 | err: | |
4937 | ata_qc_complete(qc); | |
1da177e4 LT |
4938 | } |
4939 | ||
4940 | /** | |
4941 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4942 | * @qc: command to issue to device | |
4943 | * | |
4944 | * Using various libata functions and hooks, this function | |
4945 | * starts an ATA command. ATA commands are grouped into | |
4946 | * classes called "protocols", and issuing each type of protocol | |
4947 | * is slightly different. | |
4948 | * | |
0baab86b EF |
4949 | * May be used as the qc_issue() entry in ata_port_operations. |
4950 | * | |
1da177e4 | 4951 | * LOCKING: |
cca3974e | 4952 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4953 | * |
4954 | * RETURNS: | |
9a3d9eb0 | 4955 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4956 | */ |
4957 | ||
9a3d9eb0 | 4958 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
4959 | { |
4960 | struct ata_port *ap = qc->ap; | |
4961 | ||
e50362ec AL |
4962 | /* Use polling pio if the LLD doesn't handle |
4963 | * interrupt driven pio and atapi CDB interrupt. | |
4964 | */ | |
4965 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
4966 | switch (qc->tf.protocol) { | |
4967 | case ATA_PROT_PIO: | |
4968 | case ATA_PROT_ATAPI: | |
4969 | case ATA_PROT_ATAPI_NODATA: | |
4970 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4971 | break; | |
4972 | case ATA_PROT_ATAPI_DMA: | |
4973 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3a778275 | 4974 | /* see ata_dma_blacklisted() */ |
e50362ec AL |
4975 | BUG(); |
4976 | break; | |
4977 | default: | |
4978 | break; | |
4979 | } | |
4980 | } | |
4981 | ||
3d3cca37 TH |
4982 | /* Some controllers show flaky interrupt behavior after |
4983 | * setting xfer mode. Use polling instead. | |
4984 | */ | |
4985 | if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES && | |
4986 | qc->tf.feature == SETFEATURES_XFER) && | |
4987 | (ap->flags & ATA_FLAG_SETXFER_POLLING)) | |
4988 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4989 | ||
312f7da2 | 4990 | /* select the device */ |
1da177e4 LT |
4991 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
4992 | ||
312f7da2 | 4993 | /* start the command */ |
1da177e4 LT |
4994 | switch (qc->tf.protocol) { |
4995 | case ATA_PROT_NODATA: | |
312f7da2 AL |
4996 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4997 | ata_qc_set_polling(qc); | |
4998 | ||
e5338254 | 4999 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
5000 | ap->hsm_task_state = HSM_ST_LAST; |
5001 | ||
5002 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 5003 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 5004 | |
1da177e4 LT |
5005 | break; |
5006 | ||
5007 | case ATA_PROT_DMA: | |
587005de | 5008 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5009 | |
1da177e4 LT |
5010 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5011 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
5012 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 5013 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
5014 | break; |
5015 | ||
312f7da2 AL |
5016 | case ATA_PROT_PIO: |
5017 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5018 | ata_qc_set_polling(qc); | |
1da177e4 | 5019 | |
e5338254 | 5020 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 5021 | |
54f00389 AL |
5022 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
5023 | /* PIO data out protocol */ | |
5024 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 5025 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5026 | |
5027 | /* always send first data block using | |
e27486db | 5028 | * the ata_pio_task() codepath. |
54f00389 | 5029 | */ |
312f7da2 | 5030 | } else { |
54f00389 AL |
5031 | /* PIO data in protocol */ |
5032 | ap->hsm_task_state = HSM_ST; | |
5033 | ||
5034 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 5035 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5036 | |
5037 | /* if polling, ata_pio_task() handles the rest. | |
5038 | * otherwise, interrupt handler takes over from here. | |
5039 | */ | |
312f7da2 AL |
5040 | } |
5041 | ||
1da177e4 LT |
5042 | break; |
5043 | ||
1da177e4 | 5044 | case ATA_PROT_ATAPI: |
1da177e4 | 5045 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
5046 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5047 | ata_qc_set_polling(qc); | |
5048 | ||
e5338254 | 5049 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 5050 | |
312f7da2 AL |
5051 | ap->hsm_task_state = HSM_ST_FIRST; |
5052 | ||
5053 | /* send cdb by polling if no cdb interrupt */ | |
5054 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
5055 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 5056 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5057 | break; |
5058 | ||
5059 | case ATA_PROT_ATAPI_DMA: | |
587005de | 5060 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5061 | |
1da177e4 LT |
5062 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5063 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
5064 | ap->hsm_task_state = HSM_ST_FIRST; |
5065 | ||
5066 | /* send cdb by polling if no cdb interrupt */ | |
5067 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 5068 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5069 | break; |
5070 | ||
5071 | default: | |
5072 | WARN_ON(1); | |
9a3d9eb0 | 5073 | return AC_ERR_SYSTEM; |
1da177e4 LT |
5074 | } |
5075 | ||
5076 | return 0; | |
5077 | } | |
5078 | ||
1da177e4 LT |
5079 | /** |
5080 | * ata_host_intr - Handle host interrupt for given (port, task) | |
5081 | * @ap: Port on which interrupt arrived (possibly...) | |
5082 | * @qc: Taskfile currently active in engine | |
5083 | * | |
5084 | * Handle host interrupt for given queued command. Currently, | |
5085 | * only DMA interrupts are handled. All other commands are | |
5086 | * handled via polling with interrupts disabled (nIEN bit). | |
5087 | * | |
5088 | * LOCKING: | |
cca3974e | 5089 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5090 | * |
5091 | * RETURNS: | |
5092 | * One if interrupt was handled, zero if not (shared irq). | |
5093 | */ | |
5094 | ||
5095 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
5096 | struct ata_queued_cmd *qc) | |
5097 | { | |
ea54763f | 5098 | struct ata_eh_info *ehi = &ap->eh_info; |
312f7da2 | 5099 | u8 status, host_stat = 0; |
1da177e4 | 5100 | |
312f7da2 AL |
5101 | VPRINTK("ata%u: protocol %d task_state %d\n", |
5102 | ap->id, qc->tf.protocol, ap->hsm_task_state); | |
1da177e4 | 5103 | |
312f7da2 AL |
5104 | /* Check whether we are expecting interrupt in this state */ |
5105 | switch (ap->hsm_task_state) { | |
5106 | case HSM_ST_FIRST: | |
6912ccd5 AL |
5107 | /* Some pre-ATAPI-4 devices assert INTRQ |
5108 | * at this state when ready to receive CDB. | |
5109 | */ | |
1da177e4 | 5110 | |
312f7da2 AL |
5111 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
5112 | * The flag was turned on only for atapi devices. | |
5113 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
5114 | */ | |
5115 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 5116 | goto idle_irq; |
1da177e4 | 5117 | break; |
312f7da2 AL |
5118 | case HSM_ST_LAST: |
5119 | if (qc->tf.protocol == ATA_PROT_DMA || | |
5120 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
5121 | /* check status of DMA engine */ | |
5122 | host_stat = ap->ops->bmdma_status(ap); | |
5123 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
5124 | ||
5125 | /* if it's not our irq... */ | |
5126 | if (!(host_stat & ATA_DMA_INTR)) | |
5127 | goto idle_irq; | |
5128 | ||
5129 | /* before we do anything else, clear DMA-Start bit */ | |
5130 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
5131 | |
5132 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
5133 | /* error when transfering data to/from memory */ | |
5134 | qc->err_mask |= AC_ERR_HOST_BUS; | |
5135 | ap->hsm_task_state = HSM_ST_ERR; | |
5136 | } | |
312f7da2 AL |
5137 | } |
5138 | break; | |
5139 | case HSM_ST: | |
5140 | break; | |
1da177e4 LT |
5141 | default: |
5142 | goto idle_irq; | |
5143 | } | |
5144 | ||
312f7da2 AL |
5145 | /* check altstatus */ |
5146 | status = ata_altstatus(ap); | |
5147 | if (status & ATA_BUSY) | |
5148 | goto idle_irq; | |
1da177e4 | 5149 | |
312f7da2 AL |
5150 | /* check main status, clearing INTRQ */ |
5151 | status = ata_chk_status(ap); | |
5152 | if (unlikely(status & ATA_BUSY)) | |
5153 | goto idle_irq; | |
1da177e4 | 5154 | |
312f7da2 AL |
5155 | /* ack bmdma irq events */ |
5156 | ap->ops->irq_clear(ap); | |
1da177e4 | 5157 | |
bb5cb290 | 5158 | ata_hsm_move(ap, qc, status, 0); |
ea54763f TH |
5159 | |
5160 | if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || | |
5161 | qc->tf.protocol == ATA_PROT_ATAPI_DMA)) | |
5162 | ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); | |
5163 | ||
1da177e4 LT |
5164 | return 1; /* irq handled */ |
5165 | ||
5166 | idle_irq: | |
5167 | ap->stats.idle_irq++; | |
5168 | ||
5169 | #ifdef ATA_IRQ_TRAP | |
5170 | if ((ap->stats.idle_irq % 1000) == 0) { | |
1da177e4 | 5171 | ata_irq_ack(ap, 0); /* debug trap */ |
f15a1daf | 5172 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 5173 | return 1; |
1da177e4 LT |
5174 | } |
5175 | #endif | |
5176 | return 0; /* irq not handled */ | |
5177 | } | |
5178 | ||
5179 | /** | |
5180 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b | 5181 | * @irq: irq line (unused) |
cca3974e | 5182 | * @dev_instance: pointer to our ata_host information structure |
1da177e4 | 5183 | * |
0cba632b JG |
5184 | * Default interrupt handler for PCI IDE devices. Calls |
5185 | * ata_host_intr() for each port that is not disabled. | |
5186 | * | |
1da177e4 | 5187 | * LOCKING: |
cca3974e | 5188 | * Obtains host lock during operation. |
1da177e4 LT |
5189 | * |
5190 | * RETURNS: | |
0cba632b | 5191 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
5192 | */ |
5193 | ||
7d12e780 | 5194 | irqreturn_t ata_interrupt (int irq, void *dev_instance) |
1da177e4 | 5195 | { |
cca3974e | 5196 | struct ata_host *host = dev_instance; |
1da177e4 LT |
5197 | unsigned int i; |
5198 | unsigned int handled = 0; | |
5199 | unsigned long flags; | |
5200 | ||
5201 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
cca3974e | 5202 | spin_lock_irqsave(&host->lock, flags); |
1da177e4 | 5203 | |
cca3974e | 5204 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
5205 | struct ata_port *ap; |
5206 | ||
cca3974e | 5207 | ap = host->ports[i]; |
c1389503 | 5208 | if (ap && |
029f5468 | 5209 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
5210 | struct ata_queued_cmd *qc; |
5211 | ||
5212 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 5213 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 5214 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
5215 | handled |= ata_host_intr(ap, qc); |
5216 | } | |
5217 | } | |
5218 | ||
cca3974e | 5219 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 LT |
5220 | |
5221 | return IRQ_RETVAL(handled); | |
5222 | } | |
5223 | ||
34bf2170 TH |
5224 | /** |
5225 | * sata_scr_valid - test whether SCRs are accessible | |
5226 | * @ap: ATA port to test SCR accessibility for | |
5227 | * | |
5228 | * Test whether SCRs are accessible for @ap. | |
5229 | * | |
5230 | * LOCKING: | |
5231 | * None. | |
5232 | * | |
5233 | * RETURNS: | |
5234 | * 1 if SCRs are accessible, 0 otherwise. | |
5235 | */ | |
5236 | int sata_scr_valid(struct ata_port *ap) | |
5237 | { | |
5238 | return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; | |
5239 | } | |
5240 | ||
5241 | /** | |
5242 | * sata_scr_read - read SCR register of the specified port | |
5243 | * @ap: ATA port to read SCR for | |
5244 | * @reg: SCR to read | |
5245 | * @val: Place to store read value | |
5246 | * | |
5247 | * Read SCR register @reg of @ap into *@val. This function is | |
5248 | * guaranteed to succeed if the cable type of the port is SATA | |
5249 | * and the port implements ->scr_read. | |
5250 | * | |
5251 | * LOCKING: | |
5252 | * None. | |
5253 | * | |
5254 | * RETURNS: | |
5255 | * 0 on success, negative errno on failure. | |
5256 | */ | |
5257 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
5258 | { | |
5259 | if (sata_scr_valid(ap)) { | |
5260 | *val = ap->ops->scr_read(ap, reg); | |
5261 | return 0; | |
5262 | } | |
5263 | return -EOPNOTSUPP; | |
5264 | } | |
5265 | ||
5266 | /** | |
5267 | * sata_scr_write - write SCR register of the specified port | |
5268 | * @ap: ATA port to write SCR for | |
5269 | * @reg: SCR to write | |
5270 | * @val: value to write | |
5271 | * | |
5272 | * Write @val to SCR register @reg of @ap. This function is | |
5273 | * guaranteed to succeed if the cable type of the port is SATA | |
5274 | * and the port implements ->scr_read. | |
5275 | * | |
5276 | * LOCKING: | |
5277 | * None. | |
5278 | * | |
5279 | * RETURNS: | |
5280 | * 0 on success, negative errno on failure. | |
5281 | */ | |
5282 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
5283 | { | |
5284 | if (sata_scr_valid(ap)) { | |
5285 | ap->ops->scr_write(ap, reg, val); | |
5286 | return 0; | |
5287 | } | |
5288 | return -EOPNOTSUPP; | |
5289 | } | |
5290 | ||
5291 | /** | |
5292 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
5293 | * @ap: ATA port to write SCR for | |
5294 | * @reg: SCR to write | |
5295 | * @val: value to write | |
5296 | * | |
5297 | * This function is identical to sata_scr_write() except that this | |
5298 | * function performs flush after writing to the register. | |
5299 | * | |
5300 | * LOCKING: | |
5301 | * None. | |
5302 | * | |
5303 | * RETURNS: | |
5304 | * 0 on success, negative errno on failure. | |
5305 | */ | |
5306 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
5307 | { | |
5308 | if (sata_scr_valid(ap)) { | |
5309 | ap->ops->scr_write(ap, reg, val); | |
5310 | ap->ops->scr_read(ap, reg); | |
5311 | return 0; | |
5312 | } | |
5313 | return -EOPNOTSUPP; | |
5314 | } | |
5315 | ||
5316 | /** | |
5317 | * ata_port_online - test whether the given port is online | |
5318 | * @ap: ATA port to test | |
5319 | * | |
5320 | * Test whether @ap is online. Note that this function returns 0 | |
5321 | * if online status of @ap cannot be obtained, so | |
5322 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5323 | * | |
5324 | * LOCKING: | |
5325 | * None. | |
5326 | * | |
5327 | * RETURNS: | |
5328 | * 1 if the port online status is available and online. | |
5329 | */ | |
5330 | int ata_port_online(struct ata_port *ap) | |
5331 | { | |
5332 | u32 sstatus; | |
5333 | ||
5334 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
5335 | return 1; | |
5336 | return 0; | |
5337 | } | |
5338 | ||
5339 | /** | |
5340 | * ata_port_offline - test whether the given port is offline | |
5341 | * @ap: ATA port to test | |
5342 | * | |
5343 | * Test whether @ap is offline. Note that this function returns | |
5344 | * 0 if offline status of @ap cannot be obtained, so | |
5345 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5346 | * | |
5347 | * LOCKING: | |
5348 | * None. | |
5349 | * | |
5350 | * RETURNS: | |
5351 | * 1 if the port offline status is available and offline. | |
5352 | */ | |
5353 | int ata_port_offline(struct ata_port *ap) | |
5354 | { | |
5355 | u32 sstatus; | |
5356 | ||
5357 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
5358 | return 1; | |
5359 | return 0; | |
5360 | } | |
0baab86b | 5361 | |
77b08fb5 | 5362 | int ata_flush_cache(struct ata_device *dev) |
9b847548 | 5363 | { |
977e6b9f | 5364 | unsigned int err_mask; |
9b847548 JA |
5365 | u8 cmd; |
5366 | ||
5367 | if (!ata_try_flush_cache(dev)) | |
5368 | return 0; | |
5369 | ||
6fc49adb | 5370 | if (dev->flags & ATA_DFLAG_FLUSH_EXT) |
9b847548 JA |
5371 | cmd = ATA_CMD_FLUSH_EXT; |
5372 | else | |
5373 | cmd = ATA_CMD_FLUSH; | |
5374 | ||
977e6b9f TH |
5375 | err_mask = ata_do_simple_cmd(dev, cmd); |
5376 | if (err_mask) { | |
5377 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
5378 | return -EIO; | |
5379 | } | |
5380 | ||
5381 | return 0; | |
9b847548 JA |
5382 | } |
5383 | ||
cca3974e JG |
5384 | static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, |
5385 | unsigned int action, unsigned int ehi_flags, | |
5386 | int wait) | |
500530f6 TH |
5387 | { |
5388 | unsigned long flags; | |
5389 | int i, rc; | |
5390 | ||
cca3974e JG |
5391 | for (i = 0; i < host->n_ports; i++) { |
5392 | struct ata_port *ap = host->ports[i]; | |
500530f6 TH |
5393 | |
5394 | /* Previous resume operation might still be in | |
5395 | * progress. Wait for PM_PENDING to clear. | |
5396 | */ | |
5397 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
5398 | ata_port_wait_eh(ap); | |
5399 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5400 | } | |
5401 | ||
5402 | /* request PM ops to EH */ | |
5403 | spin_lock_irqsave(ap->lock, flags); | |
5404 | ||
5405 | ap->pm_mesg = mesg; | |
5406 | if (wait) { | |
5407 | rc = 0; | |
5408 | ap->pm_result = &rc; | |
5409 | } | |
5410 | ||
5411 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
5412 | ap->eh_info.action |= action; | |
5413 | ap->eh_info.flags |= ehi_flags; | |
5414 | ||
5415 | ata_port_schedule_eh(ap); | |
5416 | ||
5417 | spin_unlock_irqrestore(ap->lock, flags); | |
5418 | ||
5419 | /* wait and check result */ | |
5420 | if (wait) { | |
5421 | ata_port_wait_eh(ap); | |
5422 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5423 | if (rc) | |
5424 | return rc; | |
5425 | } | |
5426 | } | |
5427 | ||
5428 | return 0; | |
5429 | } | |
5430 | ||
5431 | /** | |
cca3974e JG |
5432 | * ata_host_suspend - suspend host |
5433 | * @host: host to suspend | |
500530f6 TH |
5434 | * @mesg: PM message |
5435 | * | |
cca3974e | 5436 | * Suspend @host. Actual operation is performed by EH. This |
500530f6 TH |
5437 | * function requests EH to perform PM operations and waits for EH |
5438 | * to finish. | |
5439 | * | |
5440 | * LOCKING: | |
5441 | * Kernel thread context (may sleep). | |
5442 | * | |
5443 | * RETURNS: | |
5444 | * 0 on success, -errno on failure. | |
5445 | */ | |
cca3974e | 5446 | int ata_host_suspend(struct ata_host *host, pm_message_t mesg) |
500530f6 TH |
5447 | { |
5448 | int i, j, rc; | |
5449 | ||
cca3974e | 5450 | rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); |
500530f6 TH |
5451 | if (rc) |
5452 | goto fail; | |
5453 | ||
5454 | /* EH is quiescent now. Fail if we have any ready device. | |
5455 | * This happens if hotplug occurs between completion of device | |
5456 | * suspension and here. | |
5457 | */ | |
cca3974e JG |
5458 | for (i = 0; i < host->n_ports; i++) { |
5459 | struct ata_port *ap = host->ports[i]; | |
500530f6 TH |
5460 | |
5461 | for (j = 0; j < ATA_MAX_DEVICES; j++) { | |
5462 | struct ata_device *dev = &ap->device[j]; | |
5463 | ||
5464 | if (ata_dev_ready(dev)) { | |
5465 | ata_port_printk(ap, KERN_WARNING, | |
5466 | "suspend failed, device %d " | |
5467 | "still active\n", dev->devno); | |
5468 | rc = -EBUSY; | |
5469 | goto fail; | |
5470 | } | |
5471 | } | |
5472 | } | |
5473 | ||
cca3974e | 5474 | host->dev->power.power_state = mesg; |
500530f6 TH |
5475 | return 0; |
5476 | ||
5477 | fail: | |
cca3974e | 5478 | ata_host_resume(host); |
500530f6 TH |
5479 | return rc; |
5480 | } | |
5481 | ||
5482 | /** | |
cca3974e JG |
5483 | * ata_host_resume - resume host |
5484 | * @host: host to resume | |
500530f6 | 5485 | * |
cca3974e | 5486 | * Resume @host. Actual operation is performed by EH. This |
500530f6 TH |
5487 | * function requests EH to perform PM operations and returns. |
5488 | * Note that all resume operations are performed parallely. | |
5489 | * | |
5490 | * LOCKING: | |
5491 | * Kernel thread context (may sleep). | |
5492 | */ | |
cca3974e | 5493 | void ata_host_resume(struct ata_host *host) |
500530f6 | 5494 | { |
cca3974e JG |
5495 | ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, |
5496 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
5497 | host->dev->power.power_state = PMSG_ON; | |
500530f6 TH |
5498 | } |
5499 | ||
c893a3ae RD |
5500 | /** |
5501 | * ata_port_start - Set port up for dma. | |
5502 | * @ap: Port to initialize | |
5503 | * | |
5504 | * Called just after data structures for each port are | |
5505 | * initialized. Allocates space for PRD table. | |
5506 | * | |
5507 | * May be used as the port_start() entry in ata_port_operations. | |
5508 | * | |
5509 | * LOCKING: | |
5510 | * Inherited from caller. | |
5511 | */ | |
5512 | ||
1da177e4 LT |
5513 | int ata_port_start (struct ata_port *ap) |
5514 | { | |
2f1f610b | 5515 | struct device *dev = ap->dev; |
6037d6bb | 5516 | int rc; |
1da177e4 LT |
5517 | |
5518 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
5519 | if (!ap->prd) | |
5520 | return -ENOMEM; | |
5521 | ||
6037d6bb JG |
5522 | rc = ata_pad_alloc(ap, dev); |
5523 | if (rc) { | |
cedc9a47 | 5524 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 5525 | return rc; |
cedc9a47 JG |
5526 | } |
5527 | ||
1da177e4 LT |
5528 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
5529 | ||
5530 | return 0; | |
5531 | } | |
5532 | ||
0baab86b EF |
5533 | |
5534 | /** | |
5535 | * ata_port_stop - Undo ata_port_start() | |
5536 | * @ap: Port to shut down | |
5537 | * | |
5538 | * Frees the PRD table. | |
5539 | * | |
5540 | * May be used as the port_stop() entry in ata_port_operations. | |
5541 | * | |
5542 | * LOCKING: | |
6f0ef4fa | 5543 | * Inherited from caller. |
0baab86b EF |
5544 | */ |
5545 | ||
1da177e4 LT |
5546 | void ata_port_stop (struct ata_port *ap) |
5547 | { | |
2f1f610b | 5548 | struct device *dev = ap->dev; |
1da177e4 LT |
5549 | |
5550 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 5551 | ata_pad_free(ap, dev); |
1da177e4 LT |
5552 | } |
5553 | ||
cca3974e | 5554 | void ata_host_stop (struct ata_host *host) |
aa8f0dc6 | 5555 | { |
cca3974e JG |
5556 | if (host->mmio_base) |
5557 | iounmap(host->mmio_base); | |
aa8f0dc6 JG |
5558 | } |
5559 | ||
3ef3b43d TH |
5560 | /** |
5561 | * ata_dev_init - Initialize an ata_device structure | |
5562 | * @dev: Device structure to initialize | |
5563 | * | |
5564 | * Initialize @dev in preparation for probing. | |
5565 | * | |
5566 | * LOCKING: | |
5567 | * Inherited from caller. | |
5568 | */ | |
5569 | void ata_dev_init(struct ata_device *dev) | |
5570 | { | |
5571 | struct ata_port *ap = dev->ap; | |
72fa4b74 TH |
5572 | unsigned long flags; |
5573 | ||
5a04bf4b TH |
5574 | /* SATA spd limit is bound to the first device */ |
5575 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5576 | ||
72fa4b74 TH |
5577 | /* High bits of dev->flags are used to record warm plug |
5578 | * requests which occur asynchronously. Synchronize using | |
cca3974e | 5579 | * host lock. |
72fa4b74 | 5580 | */ |
ba6a1308 | 5581 | spin_lock_irqsave(ap->lock, flags); |
72fa4b74 | 5582 | dev->flags &= ~ATA_DFLAG_INIT_MASK; |
ba6a1308 | 5583 | spin_unlock_irqrestore(ap->lock, flags); |
3ef3b43d | 5584 | |
72fa4b74 TH |
5585 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
5586 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
5587 | dev->pio_mask = UINT_MAX; |
5588 | dev->mwdma_mask = UINT_MAX; | |
5589 | dev->udma_mask = UINT_MAX; | |
5590 | } | |
5591 | ||
1da177e4 | 5592 | /** |
155a8a9c | 5593 | * ata_port_init - Initialize an ata_port structure |
1da177e4 | 5594 | * @ap: Structure to initialize |
cca3974e | 5595 | * @host: Collection of hosts to which @ap belongs |
1da177e4 LT |
5596 | * @ent: Probe information provided by low-level driver |
5597 | * @port_no: Port number associated with this ata_port | |
5598 | * | |
155a8a9c | 5599 | * Initialize a new ata_port structure. |
0cba632b | 5600 | * |
1da177e4 | 5601 | * LOCKING: |
0cba632b | 5602 | * Inherited from caller. |
1da177e4 | 5603 | */ |
cca3974e | 5604 | void ata_port_init(struct ata_port *ap, struct ata_host *host, |
155a8a9c | 5605 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
5606 | { |
5607 | unsigned int i; | |
5608 | ||
cca3974e | 5609 | ap->lock = &host->lock; |
198e0fed | 5610 | ap->flags = ATA_FLAG_DISABLED; |
155a8a9c | 5611 | ap->id = ata_unique_id++; |
1da177e4 | 5612 | ap->ctl = ATA_DEVCTL_OBS; |
cca3974e | 5613 | ap->host = host; |
2f1f610b | 5614 | ap->dev = ent->dev; |
1da177e4 | 5615 | ap->port_no = port_no; |
fea63e38 TH |
5616 | if (port_no == 1 && ent->pinfo2) { |
5617 | ap->pio_mask = ent->pinfo2->pio_mask; | |
5618 | ap->mwdma_mask = ent->pinfo2->mwdma_mask; | |
5619 | ap->udma_mask = ent->pinfo2->udma_mask; | |
5620 | ap->flags |= ent->pinfo2->flags; | |
5621 | ap->ops = ent->pinfo2->port_ops; | |
5622 | } else { | |
5623 | ap->pio_mask = ent->pio_mask; | |
5624 | ap->mwdma_mask = ent->mwdma_mask; | |
5625 | ap->udma_mask = ent->udma_mask; | |
5626 | ap->flags |= ent->port_flags; | |
5627 | ap->ops = ent->port_ops; | |
5628 | } | |
5a04bf4b | 5629 | ap->hw_sata_spd_limit = UINT_MAX; |
1da177e4 LT |
5630 | ap->active_tag = ATA_TAG_POISON; |
5631 | ap->last_ctl = 0xFF; | |
bd5d825c BP |
5632 | |
5633 | #if defined(ATA_VERBOSE_DEBUG) | |
5634 | /* turn on all debugging levels */ | |
5635 | ap->msg_enable = 0x00FF; | |
5636 | #elif defined(ATA_DEBUG) | |
5637 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
88574551 | 5638 | #else |
0dd4b21f | 5639 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; |
bd5d825c | 5640 | #endif |
1da177e4 | 5641 | |
86e45b6b | 5642 | INIT_WORK(&ap->port_task, NULL, NULL); |
580b2102 | 5643 | INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap); |
3057ac3c | 5644 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap); |
a72ec4ce | 5645 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 5646 | init_waitqueue_head(&ap->eh_wait_q); |
1da177e4 | 5647 | |
838df628 TH |
5648 | /* set cable type */ |
5649 | ap->cbl = ATA_CBL_NONE; | |
5650 | if (ap->flags & ATA_FLAG_SATA) | |
5651 | ap->cbl = ATA_CBL_SATA; | |
5652 | ||
acf356b1 TH |
5653 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
5654 | struct ata_device *dev = &ap->device[i]; | |
38d87234 | 5655 | dev->ap = ap; |
72fa4b74 | 5656 | dev->devno = i; |
3ef3b43d | 5657 | ata_dev_init(dev); |
acf356b1 | 5658 | } |
1da177e4 LT |
5659 | |
5660 | #ifdef ATA_IRQ_TRAP | |
5661 | ap->stats.unhandled_irq = 1; | |
5662 | ap->stats.idle_irq = 1; | |
5663 | #endif | |
5664 | ||
5665 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
5666 | } | |
5667 | ||
155a8a9c | 5668 | /** |
4608c160 TH |
5669 | * ata_port_init_shost - Initialize SCSI host associated with ATA port |
5670 | * @ap: ATA port to initialize SCSI host for | |
5671 | * @shost: SCSI host associated with @ap | |
155a8a9c | 5672 | * |
4608c160 | 5673 | * Initialize SCSI host @shost associated with ATA port @ap. |
155a8a9c BK |
5674 | * |
5675 | * LOCKING: | |
5676 | * Inherited from caller. | |
5677 | */ | |
4608c160 | 5678 | static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost) |
155a8a9c | 5679 | { |
cca3974e | 5680 | ap->scsi_host = shost; |
155a8a9c | 5681 | |
4608c160 TH |
5682 | shost->unique_id = ap->id; |
5683 | shost->max_id = 16; | |
5684 | shost->max_lun = 1; | |
5685 | shost->max_channel = 1; | |
5686 | shost->max_cmd_len = 12; | |
155a8a9c BK |
5687 | } |
5688 | ||
1da177e4 | 5689 | /** |
996139f1 | 5690 | * ata_port_add - Attach low-level ATA driver to system |
1da177e4 | 5691 | * @ent: Information provided by low-level driver |
cca3974e | 5692 | * @host: Collections of ports to which we add |
1da177e4 LT |
5693 | * @port_no: Port number associated with this host |
5694 | * | |
0cba632b JG |
5695 | * Attach low-level ATA driver to system. |
5696 | * | |
1da177e4 | 5697 | * LOCKING: |
0cba632b | 5698 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5699 | * |
5700 | * RETURNS: | |
0cba632b | 5701 | * New ata_port on success, for NULL on error. |
1da177e4 | 5702 | */ |
996139f1 | 5703 | static struct ata_port * ata_port_add(const struct ata_probe_ent *ent, |
cca3974e | 5704 | struct ata_host *host, |
1da177e4 LT |
5705 | unsigned int port_no) |
5706 | { | |
996139f1 | 5707 | struct Scsi_Host *shost; |
1da177e4 | 5708 | struct ata_port *ap; |
1da177e4 LT |
5709 | |
5710 | DPRINTK("ENTER\n"); | |
aec5c3c1 | 5711 | |
52783c5d | 5712 | if (!ent->port_ops->error_handler && |
cca3974e | 5713 | !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { |
aec5c3c1 TH |
5714 | printk(KERN_ERR "ata%u: no reset mechanism available\n", |
5715 | port_no); | |
5716 | return NULL; | |
5717 | } | |
5718 | ||
996139f1 JG |
5719 | shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); |
5720 | if (!shost) | |
1da177e4 LT |
5721 | return NULL; |
5722 | ||
996139f1 | 5723 | shost->transportt = &ata_scsi_transport_template; |
30afc84c | 5724 | |
996139f1 | 5725 | ap = ata_shost_to_port(shost); |
1da177e4 | 5726 | |
cca3974e | 5727 | ata_port_init(ap, host, ent, port_no); |
996139f1 | 5728 | ata_port_init_shost(ap, shost); |
1da177e4 | 5729 | |
1da177e4 | 5730 | return ap; |
1da177e4 LT |
5731 | } |
5732 | ||
b03732f0 | 5733 | /** |
cca3974e JG |
5734 | * ata_sas_host_init - Initialize a host struct |
5735 | * @host: host to initialize | |
5736 | * @dev: device host is attached to | |
5737 | * @flags: host flags | |
5738 | * @ops: port_ops | |
b03732f0 BK |
5739 | * |
5740 | * LOCKING: | |
5741 | * PCI/etc. bus probe sem. | |
5742 | * | |
5743 | */ | |
5744 | ||
cca3974e JG |
5745 | void ata_host_init(struct ata_host *host, struct device *dev, |
5746 | unsigned long flags, const struct ata_port_operations *ops) | |
b03732f0 | 5747 | { |
cca3974e JG |
5748 | spin_lock_init(&host->lock); |
5749 | host->dev = dev; | |
5750 | host->flags = flags; | |
5751 | host->ops = ops; | |
b03732f0 BK |
5752 | } |
5753 | ||
1da177e4 | 5754 | /** |
0cba632b JG |
5755 | * ata_device_add - Register hardware device with ATA and SCSI layers |
5756 | * @ent: Probe information describing hardware device to be registered | |
5757 | * | |
5758 | * This function processes the information provided in the probe | |
5759 | * information struct @ent, allocates the necessary ATA and SCSI | |
5760 | * host information structures, initializes them, and registers | |
5761 | * everything with requisite kernel subsystems. | |
5762 | * | |
5763 | * This function requests irqs, probes the ATA bus, and probes | |
5764 | * the SCSI bus. | |
1da177e4 LT |
5765 | * |
5766 | * LOCKING: | |
0cba632b | 5767 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5768 | * |
5769 | * RETURNS: | |
0cba632b | 5770 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 | 5771 | */ |
057ace5e | 5772 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 | 5773 | { |
6d0500df | 5774 | unsigned int i; |
1da177e4 | 5775 | struct device *dev = ent->dev; |
cca3974e | 5776 | struct ata_host *host; |
39b07ce6 | 5777 | int rc; |
1da177e4 LT |
5778 | |
5779 | DPRINTK("ENTER\n"); | |
02f076aa AC |
5780 | |
5781 | if (ent->irq == 0) { | |
5782 | dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n"); | |
5783 | return 0; | |
5784 | } | |
1da177e4 | 5785 | /* alloc a container for our list of ATA ports (buses) */ |
cca3974e JG |
5786 | host = kzalloc(sizeof(struct ata_host) + |
5787 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
5788 | if (!host) | |
1da177e4 | 5789 | return 0; |
1da177e4 | 5790 | |
cca3974e JG |
5791 | ata_host_init(host, dev, ent->_host_flags, ent->port_ops); |
5792 | host->n_ports = ent->n_ports; | |
5793 | host->irq = ent->irq; | |
5794 | host->irq2 = ent->irq2; | |
5795 | host->mmio_base = ent->mmio_base; | |
5796 | host->private_data = ent->private_data; | |
1da177e4 LT |
5797 | |
5798 | /* register each port bound to this device */ | |
cca3974e | 5799 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
5800 | struct ata_port *ap; |
5801 | unsigned long xfer_mode_mask; | |
2ec7df04 | 5802 | int irq_line = ent->irq; |
1da177e4 | 5803 | |
cca3974e | 5804 | ap = ata_port_add(ent, host, i); |
c38778c3 | 5805 | host->ports[i] = ap; |
1da177e4 LT |
5806 | if (!ap) |
5807 | goto err_out; | |
5808 | ||
dd5b06c4 TH |
5809 | /* dummy? */ |
5810 | if (ent->dummy_port_mask & (1 << i)) { | |
5811 | ata_port_printk(ap, KERN_INFO, "DUMMY\n"); | |
5812 | ap->ops = &ata_dummy_port_ops; | |
5813 | continue; | |
5814 | } | |
5815 | ||
5816 | /* start port */ | |
5817 | rc = ap->ops->port_start(ap); | |
5818 | if (rc) { | |
cca3974e JG |
5819 | host->ports[i] = NULL; |
5820 | scsi_host_put(ap->scsi_host); | |
dd5b06c4 TH |
5821 | goto err_out; |
5822 | } | |
5823 | ||
2ec7df04 AC |
5824 | /* Report the secondary IRQ for second channel legacy */ |
5825 | if (i == 1 && ent->irq2) | |
5826 | irq_line = ent->irq2; | |
5827 | ||
1da177e4 LT |
5828 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | |
5829 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
5830 | (ap->pio_mask << ATA_SHIFT_PIO); | |
5831 | ||
5832 | /* print per-port info to dmesg */ | |
f15a1daf | 5833 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX " |
2ec7df04 | 5834 | "ctl 0x%lX bmdma 0x%lX irq %d\n", |
f15a1daf TH |
5835 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', |
5836 | ata_mode_string(xfer_mode_mask), | |
5837 | ap->ioaddr.cmd_addr, | |
5838 | ap->ioaddr.ctl_addr, | |
5839 | ap->ioaddr.bmdma_addr, | |
2ec7df04 | 5840 | irq_line); |
1da177e4 | 5841 | |
0f0a3ad3 TH |
5842 | /* freeze port before requesting IRQ */ |
5843 | ata_eh_freeze_port(ap); | |
1da177e4 LT |
5844 | } |
5845 | ||
2ec7df04 | 5846 | /* obtain irq, that may be shared between channels */ |
39b07ce6 | 5847 | rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, |
cca3974e | 5848 | DRV_NAME, host); |
39b07ce6 JG |
5849 | if (rc) { |
5850 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5851 | ent->irq, rc); | |
1da177e4 | 5852 | goto err_out; |
39b07ce6 | 5853 | } |
1da177e4 | 5854 | |
2ec7df04 AC |
5855 | /* do we have a second IRQ for the other channel, eg legacy mode */ |
5856 | if (ent->irq2) { | |
5857 | /* We will get weird core code crashes later if this is true | |
5858 | so trap it now */ | |
5859 | BUG_ON(ent->irq == ent->irq2); | |
5860 | ||
5861 | rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags, | |
cca3974e | 5862 | DRV_NAME, host); |
2ec7df04 AC |
5863 | if (rc) { |
5864 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5865 | ent->irq2, rc); | |
5866 | goto err_out_free_irq; | |
5867 | } | |
5868 | } | |
5869 | ||
1da177e4 LT |
5870 | /* perform each probe synchronously */ |
5871 | DPRINTK("probe begin\n"); | |
cca3974e JG |
5872 | for (i = 0; i < host->n_ports; i++) { |
5873 | struct ata_port *ap = host->ports[i]; | |
5a04bf4b | 5874 | u32 scontrol; |
1da177e4 LT |
5875 | int rc; |
5876 | ||
5a04bf4b TH |
5877 | /* init sata_spd_limit to the current value */ |
5878 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
5879 | int spd = (scontrol >> 4) & 0xf; | |
5880 | ap->hw_sata_spd_limit &= (1 << spd) - 1; | |
5881 | } | |
5882 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5883 | ||
cca3974e | 5884 | rc = scsi_add_host(ap->scsi_host, dev); |
1da177e4 | 5885 | if (rc) { |
f15a1daf | 5886 | ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); |
1da177e4 LT |
5887 | /* FIXME: do something useful here */ |
5888 | /* FIXME: handle unconditional calls to | |
5889 | * scsi_scan_host and ata_host_remove, below, | |
5890 | * at the very least | |
5891 | */ | |
5892 | } | |
3e706399 | 5893 | |
52783c5d | 5894 | if (ap->ops->error_handler) { |
1cdaf534 | 5895 | struct ata_eh_info *ehi = &ap->eh_info; |
3e706399 TH |
5896 | unsigned long flags; |
5897 | ||
5898 | ata_port_probe(ap); | |
5899 | ||
5900 | /* kick EH for boot probing */ | |
ba6a1308 | 5901 | spin_lock_irqsave(ap->lock, flags); |
3e706399 | 5902 | |
1cdaf534 TH |
5903 | ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; |
5904 | ehi->action |= ATA_EH_SOFTRESET; | |
5905 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
3e706399 | 5906 | |
b51e9e5d | 5907 | ap->pflags |= ATA_PFLAG_LOADING; |
3e706399 TH |
5908 | ata_port_schedule_eh(ap); |
5909 | ||
ba6a1308 | 5910 | spin_unlock_irqrestore(ap->lock, flags); |
3e706399 TH |
5911 | |
5912 | /* wait for EH to finish */ | |
5913 | ata_port_wait_eh(ap); | |
5914 | } else { | |
5915 | DPRINTK("ata%u: bus probe begin\n", ap->id); | |
5916 | rc = ata_bus_probe(ap); | |
5917 | DPRINTK("ata%u: bus probe end\n", ap->id); | |
5918 | ||
5919 | if (rc) { | |
5920 | /* FIXME: do something useful here? | |
5921 | * Current libata behavior will | |
5922 | * tear down everything when | |
5923 | * the module is removed | |
5924 | * or the h/w is unplugged. | |
5925 | */ | |
5926 | } | |
5927 | } | |
1da177e4 LT |
5928 | } |
5929 | ||
5930 | /* probes are done, now scan each port's disk(s) */ | |
c893a3ae | 5931 | DPRINTK("host probe begin\n"); |
cca3974e JG |
5932 | for (i = 0; i < host->n_ports; i++) { |
5933 | struct ata_port *ap = host->ports[i]; | |
1da177e4 | 5934 | |
644dd0cc | 5935 | ata_scsi_scan_host(ap); |
1da177e4 LT |
5936 | } |
5937 | ||
cca3974e | 5938 | dev_set_drvdata(dev, host); |
1da177e4 LT |
5939 | |
5940 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
5941 | return ent->n_ports; /* success */ | |
5942 | ||
2ec7df04 | 5943 | err_out_free_irq: |
cca3974e | 5944 | free_irq(ent->irq, host); |
1da177e4 | 5945 | err_out: |
cca3974e JG |
5946 | for (i = 0; i < host->n_ports; i++) { |
5947 | struct ata_port *ap = host->ports[i]; | |
77f3f879 TH |
5948 | if (ap) { |
5949 | ap->ops->port_stop(ap); | |
cca3974e | 5950 | scsi_host_put(ap->scsi_host); |
77f3f879 | 5951 | } |
1da177e4 | 5952 | } |
6d0500df | 5953 | |
cca3974e | 5954 | kfree(host); |
1da177e4 LT |
5955 | VPRINTK("EXIT, returning 0\n"); |
5956 | return 0; | |
5957 | } | |
5958 | ||
720ba126 TH |
5959 | /** |
5960 | * ata_port_detach - Detach ATA port in prepration of device removal | |
5961 | * @ap: ATA port to be detached | |
5962 | * | |
5963 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
5964 | * then, remove the associated SCSI host. @ap is guaranteed to | |
5965 | * be quiescent on return from this function. | |
5966 | * | |
5967 | * LOCKING: | |
5968 | * Kernel thread context (may sleep). | |
5969 | */ | |
5970 | void ata_port_detach(struct ata_port *ap) | |
5971 | { | |
5972 | unsigned long flags; | |
5973 | int i; | |
5974 | ||
5975 | if (!ap->ops->error_handler) | |
c3cf30a9 | 5976 | goto skip_eh; |
720ba126 TH |
5977 | |
5978 | /* tell EH we're leaving & flush EH */ | |
ba6a1308 | 5979 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 5980 | ap->pflags |= ATA_PFLAG_UNLOADING; |
ba6a1308 | 5981 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5982 | |
5983 | ata_port_wait_eh(ap); | |
5984 | ||
5985 | /* EH is now guaranteed to see UNLOADING, so no new device | |
5986 | * will be attached. Disable all existing devices. | |
5987 | */ | |
ba6a1308 | 5988 | spin_lock_irqsave(ap->lock, flags); |
720ba126 TH |
5989 | |
5990 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
5991 | ata_dev_disable(&ap->device[i]); | |
5992 | ||
ba6a1308 | 5993 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5994 | |
5995 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
5996 | * will be skipped and retrials will be terminated with bad | |
5997 | * target. | |
5998 | */ | |
ba6a1308 | 5999 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 6000 | ata_port_freeze(ap); /* won't be thawed */ |
ba6a1308 | 6001 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
6002 | |
6003 | ata_port_wait_eh(ap); | |
6004 | ||
6005 | /* Flush hotplug task. The sequence is similar to | |
6006 | * ata_port_flush_task(). | |
6007 | */ | |
6008 | flush_workqueue(ata_aux_wq); | |
6009 | cancel_delayed_work(&ap->hotplug_task); | |
6010 | flush_workqueue(ata_aux_wq); | |
6011 | ||
c3cf30a9 | 6012 | skip_eh: |
720ba126 | 6013 | /* remove the associated SCSI host */ |
cca3974e | 6014 | scsi_remove_host(ap->scsi_host); |
720ba126 TH |
6015 | } |
6016 | ||
17b14451 | 6017 | /** |
cca3974e JG |
6018 | * ata_host_remove - PCI layer callback for device removal |
6019 | * @host: ATA host set that was removed | |
17b14451 | 6020 | * |
2e9edbf8 | 6021 | * Unregister all objects associated with this host set. Free those |
17b14451 AC |
6022 | * objects. |
6023 | * | |
6024 | * LOCKING: | |
6025 | * Inherited from calling layer (may sleep). | |
6026 | */ | |
6027 | ||
cca3974e | 6028 | void ata_host_remove(struct ata_host *host) |
17b14451 | 6029 | { |
17b14451 AC |
6030 | unsigned int i; |
6031 | ||
cca3974e JG |
6032 | for (i = 0; i < host->n_ports; i++) |
6033 | ata_port_detach(host->ports[i]); | |
17b14451 | 6034 | |
cca3974e JG |
6035 | free_irq(host->irq, host); |
6036 | if (host->irq2) | |
6037 | free_irq(host->irq2, host); | |
17b14451 | 6038 | |
cca3974e JG |
6039 | for (i = 0; i < host->n_ports; i++) { |
6040 | struct ata_port *ap = host->ports[i]; | |
17b14451 | 6041 | |
cca3974e | 6042 | ata_scsi_release(ap->scsi_host); |
17b14451 AC |
6043 | |
6044 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
6045 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
6046 | ||
2ec7df04 AC |
6047 | /* FIXME: Add -ac IDE pci mods to remove these special cases */ |
6048 | if (ioaddr->cmd_addr == ATA_PRIMARY_CMD) | |
6049 | release_region(ATA_PRIMARY_CMD, 8); | |
6050 | else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD) | |
6051 | release_region(ATA_SECONDARY_CMD, 8); | |
17b14451 AC |
6052 | } |
6053 | ||
cca3974e | 6054 | scsi_host_put(ap->scsi_host); |
17b14451 AC |
6055 | } |
6056 | ||
cca3974e JG |
6057 | if (host->ops->host_stop) |
6058 | host->ops->host_stop(host); | |
17b14451 | 6059 | |
cca3974e | 6060 | kfree(host); |
17b14451 AC |
6061 | } |
6062 | ||
1da177e4 LT |
6063 | /** |
6064 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4f931374 | 6065 | * @shost: libata host to be unloaded |
1da177e4 LT |
6066 | * |
6067 | * Performs all duties necessary to shut down a libata port... | |
6068 | * Kill port kthread, disable port, and release resources. | |
6069 | * | |
6070 | * LOCKING: | |
6071 | * Inherited from SCSI layer. | |
6072 | * | |
6073 | * RETURNS: | |
6074 | * One. | |
6075 | */ | |
6076 | ||
cca3974e | 6077 | int ata_scsi_release(struct Scsi_Host *shost) |
1da177e4 | 6078 | { |
cca3974e | 6079 | struct ata_port *ap = ata_shost_to_port(shost); |
1da177e4 LT |
6080 | |
6081 | DPRINTK("ENTER\n"); | |
6082 | ||
6083 | ap->ops->port_disable(ap); | |
6543bc07 | 6084 | ap->ops->port_stop(ap); |
1da177e4 LT |
6085 | |
6086 | DPRINTK("EXIT\n"); | |
6087 | return 1; | |
6088 | } | |
6089 | ||
f6d950e2 BK |
6090 | struct ata_probe_ent * |
6091 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) | |
6092 | { | |
6093 | struct ata_probe_ent *probe_ent; | |
6094 | ||
6095 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); | |
6096 | if (!probe_ent) { | |
6097 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
6098 | kobject_name(&(dev->kobj))); | |
6099 | return NULL; | |
6100 | } | |
6101 | ||
6102 | INIT_LIST_HEAD(&probe_ent->node); | |
6103 | probe_ent->dev = dev; | |
6104 | ||
6105 | probe_ent->sht = port->sht; | |
cca3974e | 6106 | probe_ent->port_flags = port->flags; |
f6d950e2 BK |
6107 | probe_ent->pio_mask = port->pio_mask; |
6108 | probe_ent->mwdma_mask = port->mwdma_mask; | |
6109 | probe_ent->udma_mask = port->udma_mask; | |
6110 | probe_ent->port_ops = port->port_ops; | |
d639ca94 | 6111 | probe_ent->private_data = port->private_data; |
f6d950e2 BK |
6112 | |
6113 | return probe_ent; | |
6114 | } | |
6115 | ||
1da177e4 LT |
6116 | /** |
6117 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
6118 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
6119 | * |
6120 | * Utility function which initializes data_addr, error_addr, | |
6121 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
6122 | * device_addr, status_addr, and command_addr to standard offsets | |
6123 | * relative to cmd_addr. | |
6124 | * | |
6125 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 6126 | */ |
0baab86b | 6127 | |
1da177e4 LT |
6128 | void ata_std_ports(struct ata_ioports *ioaddr) |
6129 | { | |
6130 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
6131 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
6132 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
6133 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
6134 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
6135 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
6136 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
6137 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
6138 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
6139 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
6140 | } | |
6141 | ||
0baab86b | 6142 | |
374b1873 JG |
6143 | #ifdef CONFIG_PCI |
6144 | ||
cca3974e | 6145 | void ata_pci_host_stop (struct ata_host *host) |
374b1873 | 6146 | { |
cca3974e | 6147 | struct pci_dev *pdev = to_pci_dev(host->dev); |
374b1873 | 6148 | |
cca3974e | 6149 | pci_iounmap(pdev, host->mmio_base); |
374b1873 JG |
6150 | } |
6151 | ||
1da177e4 LT |
6152 | /** |
6153 | * ata_pci_remove_one - PCI layer callback for device removal | |
6154 | * @pdev: PCI device that was removed | |
6155 | * | |
6156 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 6157 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
6158 | * Handle this by unregistering all objects associated |
6159 | * with this PCI device. Free those objects. Then finally | |
6160 | * release PCI resources and disable device. | |
6161 | * | |
6162 | * LOCKING: | |
6163 | * Inherited from PCI layer (may sleep). | |
6164 | */ | |
6165 | ||
6166 | void ata_pci_remove_one (struct pci_dev *pdev) | |
6167 | { | |
6168 | struct device *dev = pci_dev_to_dev(pdev); | |
cca3974e | 6169 | struct ata_host *host = dev_get_drvdata(dev); |
1da177e4 | 6170 | |
cca3974e | 6171 | ata_host_remove(host); |
f0eb62b8 | 6172 | |
1da177e4 LT |
6173 | pci_release_regions(pdev); |
6174 | pci_disable_device(pdev); | |
6175 | dev_set_drvdata(dev, NULL); | |
6176 | } | |
6177 | ||
6178 | /* move to PCI subsystem */ | |
057ace5e | 6179 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
6180 | { |
6181 | unsigned long tmp = 0; | |
6182 | ||
6183 | switch (bits->width) { | |
6184 | case 1: { | |
6185 | u8 tmp8 = 0; | |
6186 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
6187 | tmp = tmp8; | |
6188 | break; | |
6189 | } | |
6190 | case 2: { | |
6191 | u16 tmp16 = 0; | |
6192 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
6193 | tmp = tmp16; | |
6194 | break; | |
6195 | } | |
6196 | case 4: { | |
6197 | u32 tmp32 = 0; | |
6198 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
6199 | tmp = tmp32; | |
6200 | break; | |
6201 | } | |
6202 | ||
6203 | default: | |
6204 | return -EINVAL; | |
6205 | } | |
6206 | ||
6207 | tmp &= bits->mask; | |
6208 | ||
6209 | return (tmp == bits->val) ? 1 : 0; | |
6210 | } | |
9b847548 | 6211 | |
3c5100c1 | 6212 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) |
9b847548 JA |
6213 | { |
6214 | pci_save_state(pdev); | |
500530f6 | 6215 | |
3c5100c1 | 6216 | if (mesg.event == PM_EVENT_SUSPEND) { |
500530f6 TH |
6217 | pci_disable_device(pdev); |
6218 | pci_set_power_state(pdev, PCI_D3hot); | |
6219 | } | |
9b847548 JA |
6220 | } |
6221 | ||
500530f6 | 6222 | void ata_pci_device_do_resume(struct pci_dev *pdev) |
9b847548 JA |
6223 | { |
6224 | pci_set_power_state(pdev, PCI_D0); | |
6225 | pci_restore_state(pdev); | |
6226 | pci_enable_device(pdev); | |
6227 | pci_set_master(pdev); | |
500530f6 TH |
6228 | } |
6229 | ||
3c5100c1 | 6230 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
500530f6 | 6231 | { |
cca3974e | 6232 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
6233 | int rc = 0; |
6234 | ||
cca3974e | 6235 | rc = ata_host_suspend(host, mesg); |
500530f6 TH |
6236 | if (rc) |
6237 | return rc; | |
6238 | ||
3c5100c1 | 6239 | ata_pci_device_do_suspend(pdev, mesg); |
500530f6 TH |
6240 | |
6241 | return 0; | |
6242 | } | |
6243 | ||
6244 | int ata_pci_device_resume(struct pci_dev *pdev) | |
6245 | { | |
cca3974e | 6246 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
6247 | |
6248 | ata_pci_device_do_resume(pdev); | |
cca3974e | 6249 | ata_host_resume(host); |
9b847548 JA |
6250 | return 0; |
6251 | } | |
1da177e4 LT |
6252 | #endif /* CONFIG_PCI */ |
6253 | ||
6254 | ||
1da177e4 LT |
6255 | static int __init ata_init(void) |
6256 | { | |
a8601e5f | 6257 | ata_probe_timeout *= HZ; |
1da177e4 LT |
6258 | ata_wq = create_workqueue("ata"); |
6259 | if (!ata_wq) | |
6260 | return -ENOMEM; | |
6261 | ||
453b07ac TH |
6262 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
6263 | if (!ata_aux_wq) { | |
6264 | destroy_workqueue(ata_wq); | |
6265 | return -ENOMEM; | |
6266 | } | |
6267 | ||
1da177e4 LT |
6268 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
6269 | return 0; | |
6270 | } | |
6271 | ||
6272 | static void __exit ata_exit(void) | |
6273 | { | |
6274 | destroy_workqueue(ata_wq); | |
453b07ac | 6275 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
6276 | } |
6277 | ||
a4625085 | 6278 | subsys_initcall(ata_init); |
1da177e4 LT |
6279 | module_exit(ata_exit); |
6280 | ||
67846b30 | 6281 | static unsigned long ratelimit_time; |
34af946a | 6282 | static DEFINE_SPINLOCK(ata_ratelimit_lock); |
67846b30 JG |
6283 | |
6284 | int ata_ratelimit(void) | |
6285 | { | |
6286 | int rc; | |
6287 | unsigned long flags; | |
6288 | ||
6289 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
6290 | ||
6291 | if (time_after(jiffies, ratelimit_time)) { | |
6292 | rc = 1; | |
6293 | ratelimit_time = jiffies + (HZ/5); | |
6294 | } else | |
6295 | rc = 0; | |
6296 | ||
6297 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
6298 | ||
6299 | return rc; | |
6300 | } | |
6301 | ||
c22daff4 TH |
6302 | /** |
6303 | * ata_wait_register - wait until register value changes | |
6304 | * @reg: IO-mapped register | |
6305 | * @mask: Mask to apply to read register value | |
6306 | * @val: Wait condition | |
6307 | * @interval_msec: polling interval in milliseconds | |
6308 | * @timeout_msec: timeout in milliseconds | |
6309 | * | |
6310 | * Waiting for some bits of register to change is a common | |
6311 | * operation for ATA controllers. This function reads 32bit LE | |
6312 | * IO-mapped register @reg and tests for the following condition. | |
6313 | * | |
6314 | * (*@reg & mask) != val | |
6315 | * | |
6316 | * If the condition is met, it returns; otherwise, the process is | |
6317 | * repeated after @interval_msec until timeout. | |
6318 | * | |
6319 | * LOCKING: | |
6320 | * Kernel thread context (may sleep) | |
6321 | * | |
6322 | * RETURNS: | |
6323 | * The final register value. | |
6324 | */ | |
6325 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
6326 | unsigned long interval_msec, | |
6327 | unsigned long timeout_msec) | |
6328 | { | |
6329 | unsigned long timeout; | |
6330 | u32 tmp; | |
6331 | ||
6332 | tmp = ioread32(reg); | |
6333 | ||
6334 | /* Calculate timeout _after_ the first read to make sure | |
6335 | * preceding writes reach the controller before starting to | |
6336 | * eat away the timeout. | |
6337 | */ | |
6338 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
6339 | ||
6340 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
6341 | msleep(interval_msec); | |
6342 | tmp = ioread32(reg); | |
6343 | } | |
6344 | ||
6345 | return tmp; | |
6346 | } | |
6347 | ||
dd5b06c4 TH |
6348 | /* |
6349 | * Dummy port_ops | |
6350 | */ | |
6351 | static void ata_dummy_noret(struct ata_port *ap) { } | |
6352 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } | |
6353 | static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } | |
6354 | ||
6355 | static u8 ata_dummy_check_status(struct ata_port *ap) | |
6356 | { | |
6357 | return ATA_DRDY; | |
6358 | } | |
6359 | ||
6360 | static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) | |
6361 | { | |
6362 | return AC_ERR_SYSTEM; | |
6363 | } | |
6364 | ||
6365 | const struct ata_port_operations ata_dummy_port_ops = { | |
6366 | .port_disable = ata_port_disable, | |
6367 | .check_status = ata_dummy_check_status, | |
6368 | .check_altstatus = ata_dummy_check_status, | |
6369 | .dev_select = ata_noop_dev_select, | |
6370 | .qc_prep = ata_noop_qc_prep, | |
6371 | .qc_issue = ata_dummy_qc_issue, | |
6372 | .freeze = ata_dummy_noret, | |
6373 | .thaw = ata_dummy_noret, | |
6374 | .error_handler = ata_dummy_noret, | |
6375 | .post_internal_cmd = ata_dummy_qc_noret, | |
6376 | .irq_clear = ata_dummy_noret, | |
6377 | .port_start = ata_dummy_ret0, | |
6378 | .port_stop = ata_dummy_noret, | |
6379 | }; | |
6380 | ||
1da177e4 LT |
6381 | /* |
6382 | * libata is essentially a library of internal helper functions for | |
6383 | * low-level ATA host controller drivers. As such, the API/ABI is | |
6384 | * likely to change as new drivers are added and updated. | |
6385 | * Do not depend on ABI/API stability. | |
6386 | */ | |
6387 | ||
e9c83914 TH |
6388 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); |
6389 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
6390 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
dd5b06c4 | 6391 | EXPORT_SYMBOL_GPL(ata_dummy_port_ops); |
1da177e4 LT |
6392 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
6393 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
cca3974e | 6394 | EXPORT_SYMBOL_GPL(ata_host_init); |
1da177e4 | 6395 | EXPORT_SYMBOL_GPL(ata_device_add); |
720ba126 | 6396 | EXPORT_SYMBOL_GPL(ata_port_detach); |
cca3974e | 6397 | EXPORT_SYMBOL_GPL(ata_host_remove); |
1da177e4 LT |
6398 | EXPORT_SYMBOL_GPL(ata_sg_init); |
6399 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 6400 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 6401 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 6402 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 6403 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
6404 | EXPORT_SYMBOL_GPL(ata_tf_load); |
6405 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
6406 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
6407 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
6408 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
6409 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
6410 | EXPORT_SYMBOL_GPL(ata_check_status); | |
6411 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
6412 | EXPORT_SYMBOL_GPL(ata_exec_command); |
6413 | EXPORT_SYMBOL_GPL(ata_port_start); | |
6414 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 6415 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 | 6416 | EXPORT_SYMBOL_GPL(ata_interrupt); |
a6b2c5d4 AC |
6417 | EXPORT_SYMBOL_GPL(ata_mmio_data_xfer); |
6418 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer); | |
75e99585 | 6419 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq); |
1da177e4 | 6420 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
e46834cd | 6421 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
6422 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
6423 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
6424 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
6425 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
6426 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
6427 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
6428 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
6429 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
6430 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
6431 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 6432 | EXPORT_SYMBOL_GPL(ata_port_probe); |
3c567b7d | 6433 | EXPORT_SYMBOL_GPL(sata_set_spd); |
d7bb4cc7 TH |
6434 | EXPORT_SYMBOL_GPL(sata_phy_debounce); |
6435 | EXPORT_SYMBOL_GPL(sata_phy_resume); | |
1da177e4 LT |
6436 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
6437 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
6438 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
f5914a46 | 6439 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 | 6440 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
b6103f6d | 6441 | EXPORT_SYMBOL_GPL(sata_port_hardreset); |
c2bd5804 TH |
6442 | EXPORT_SYMBOL_GPL(sata_std_hardreset); |
6443 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
2e9edbf8 JG |
6444 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
6445 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 6446 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 6447 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 6448 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 6449 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
86e45b6b | 6450 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
6451 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
6452 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 6453 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 6454 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 6455 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 LT |
6456 | EXPORT_SYMBOL_GPL(ata_scsi_release); |
6457 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
34bf2170 TH |
6458 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
6459 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
6460 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
6461 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
6462 | EXPORT_SYMBOL_GPL(ata_port_online); | |
6463 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
cca3974e JG |
6464 | EXPORT_SYMBOL_GPL(ata_host_suspend); |
6465 | EXPORT_SYMBOL_GPL(ata_host_resume); | |
6a62a04d TH |
6466 | EXPORT_SYMBOL_GPL(ata_id_string); |
6467 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
6919a0a6 | 6468 | EXPORT_SYMBOL_GPL(ata_device_blacklisted); |
1da177e4 LT |
6469 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
6470 | ||
1bc4ccff | 6471 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
6472 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
6473 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
6474 | ||
1da177e4 LT |
6475 | #ifdef CONFIG_PCI |
6476 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 6477 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
6478 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
6479 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
6480 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
500530f6 TH |
6481 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); |
6482 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
9b847548 JA |
6483 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
6484 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
67951ade AC |
6485 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
6486 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 6487 | #endif /* CONFIG_PCI */ |
9b847548 | 6488 | |
9b847548 JA |
6489 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); |
6490 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); | |
ece1d636 | 6491 | |
ece1d636 | 6492 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 TH |
6493 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
6494 | EXPORT_SYMBOL_GPL(ata_port_abort); | |
e3180499 TH |
6495 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
6496 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); | |
6497 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
6498 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
6499 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 6500 | EXPORT_SYMBOL_GPL(ata_do_eh); |