Commit | Line | Data |
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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
1da177e4 LT |
35 | #include <linux/kernel.h> |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
67846b30 | 50 | #include <linux/jiffies.h> |
378f058c | 51 | #include <linux/scatterlist.h> |
2dcb407e | 52 | #include <linux/io.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
193515d5 | 54 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
55 | #include <scsi/scsi_host.h> |
56 | #include <linux/libata.h> | |
1da177e4 LT |
57 | #include <asm/semaphore.h> |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
fda0efc5 | 62 | |
d7bb4cc7 | 63 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
e9c83914 TH |
64 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; |
65 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
66 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
d7bb4cc7 | 67 | |
3373efd8 TH |
68 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
69 | u16 heads, u16 sectors); | |
70 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
218f3d30 JG |
71 | static unsigned int ata_dev_set_feature(struct ata_device *dev, |
72 | u8 enable, u8 feature); | |
3373efd8 | 73 | static void ata_dev_xfermask(struct ata_device *dev); |
75683fe7 | 74 | static unsigned long ata_dev_blacklisted(const struct ata_device *dev); |
1da177e4 | 75 | |
f3187195 | 76 | unsigned int ata_print_id = 1; |
1da177e4 LT |
77 | static struct workqueue_struct *ata_wq; |
78 | ||
453b07ac TH |
79 | struct workqueue_struct *ata_aux_wq; |
80 | ||
418dc1f5 | 81 | int atapi_enabled = 1; |
1623c81e JG |
82 | module_param(atapi_enabled, int, 0444); |
83 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
84 | ||
95de719a AL |
85 | int atapi_dmadir = 0; |
86 | module_param(atapi_dmadir, int, 0444); | |
87 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
88 | ||
baf4fdfa ML |
89 | int atapi_passthru16 = 1; |
90 | module_param(atapi_passthru16, int, 0444); | |
91 | MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)"); | |
92 | ||
c3c013a2 JG |
93 | int libata_fua = 0; |
94 | module_param_named(fua, libata_fua, int, 0444); | |
95 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
96 | ||
2dcb407e | 97 | static int ata_ignore_hpa; |
1e999736 AC |
98 | module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); |
99 | MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); | |
100 | ||
b3a70601 AC |
101 | static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA; |
102 | module_param_named(dma, libata_dma_mask, int, 0444); | |
103 | MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); | |
104 | ||
a8601e5f AM |
105 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; |
106 | module_param(ata_probe_timeout, int, 0444); | |
107 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
108 | ||
6ebe9d86 | 109 | int libata_noacpi = 0; |
d7d0dad6 | 110 | module_param_named(noacpi, libata_noacpi, int, 0444); |
6ebe9d86 | 111 | MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set"); |
11ef697b | 112 | |
1da177e4 LT |
113 | MODULE_AUTHOR("Jeff Garzik"); |
114 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
115 | MODULE_LICENSE("GPL"); | |
116 | MODULE_VERSION(DRV_VERSION); | |
117 | ||
0baab86b | 118 | |
1da177e4 LT |
119 | /** |
120 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
121 | * @tf: Taskfile to convert | |
1da177e4 | 122 | * @pmp: Port multiplier port |
9977126c TH |
123 | * @is_cmd: This FIS is for command |
124 | * @fis: Buffer into which data will output | |
1da177e4 LT |
125 | * |
126 | * Converts a standard ATA taskfile to a Serial ATA | |
127 | * FIS structure (Register - Host to Device). | |
128 | * | |
129 | * LOCKING: | |
130 | * Inherited from caller. | |
131 | */ | |
9977126c | 132 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis) |
1da177e4 | 133 | { |
9977126c TH |
134 | fis[0] = 0x27; /* Register - Host to Device FIS */ |
135 | fis[1] = pmp & 0xf; /* Port multiplier number*/ | |
136 | if (is_cmd) | |
137 | fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */ | |
138 | ||
1da177e4 LT |
139 | fis[2] = tf->command; |
140 | fis[3] = tf->feature; | |
141 | ||
142 | fis[4] = tf->lbal; | |
143 | fis[5] = tf->lbam; | |
144 | fis[6] = tf->lbah; | |
145 | fis[7] = tf->device; | |
146 | ||
147 | fis[8] = tf->hob_lbal; | |
148 | fis[9] = tf->hob_lbam; | |
149 | fis[10] = tf->hob_lbah; | |
150 | fis[11] = tf->hob_feature; | |
151 | ||
152 | fis[12] = tf->nsect; | |
153 | fis[13] = tf->hob_nsect; | |
154 | fis[14] = 0; | |
155 | fis[15] = tf->ctl; | |
156 | ||
157 | fis[16] = 0; | |
158 | fis[17] = 0; | |
159 | fis[18] = 0; | |
160 | fis[19] = 0; | |
161 | } | |
162 | ||
163 | /** | |
164 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
165 | * @fis: Buffer from which data will be input | |
166 | * @tf: Taskfile to output | |
167 | * | |
e12a1be6 | 168 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
169 | * |
170 | * LOCKING: | |
171 | * Inherited from caller. | |
172 | */ | |
173 | ||
057ace5e | 174 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
175 | { |
176 | tf->command = fis[2]; /* status */ | |
177 | tf->feature = fis[3]; /* error */ | |
178 | ||
179 | tf->lbal = fis[4]; | |
180 | tf->lbam = fis[5]; | |
181 | tf->lbah = fis[6]; | |
182 | tf->device = fis[7]; | |
183 | ||
184 | tf->hob_lbal = fis[8]; | |
185 | tf->hob_lbam = fis[9]; | |
186 | tf->hob_lbah = fis[10]; | |
187 | ||
188 | tf->nsect = fis[12]; | |
189 | tf->hob_nsect = fis[13]; | |
190 | } | |
191 | ||
8cbd6df1 AL |
192 | static const u8 ata_rw_cmds[] = { |
193 | /* pio multi */ | |
194 | ATA_CMD_READ_MULTI, | |
195 | ATA_CMD_WRITE_MULTI, | |
196 | ATA_CMD_READ_MULTI_EXT, | |
197 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
198 | 0, |
199 | 0, | |
200 | 0, | |
201 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
202 | /* pio */ |
203 | ATA_CMD_PIO_READ, | |
204 | ATA_CMD_PIO_WRITE, | |
205 | ATA_CMD_PIO_READ_EXT, | |
206 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
207 | 0, |
208 | 0, | |
209 | 0, | |
210 | 0, | |
8cbd6df1 AL |
211 | /* dma */ |
212 | ATA_CMD_READ, | |
213 | ATA_CMD_WRITE, | |
214 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
215 | ATA_CMD_WRITE_EXT, |
216 | 0, | |
217 | 0, | |
218 | 0, | |
219 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 220 | }; |
1da177e4 LT |
221 | |
222 | /** | |
8cbd6df1 | 223 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
bd056d7e TH |
224 | * @tf: command to examine and configure |
225 | * @dev: device tf belongs to | |
1da177e4 | 226 | * |
2e9edbf8 | 227 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 228 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
229 | * |
230 | * LOCKING: | |
231 | * caller. | |
232 | */ | |
bd056d7e | 233 | static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) |
1da177e4 | 234 | { |
9a3dccc4 | 235 | u8 cmd; |
1da177e4 | 236 | |
9a3dccc4 | 237 | int index, fua, lba48, write; |
2e9edbf8 | 238 | |
9a3dccc4 | 239 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
240 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
241 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 242 | |
8cbd6df1 AL |
243 | if (dev->flags & ATA_DFLAG_PIO) { |
244 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 245 | index = dev->multi_count ? 0 : 8; |
9af5c9c9 | 246 | } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) { |
8d238e01 AC |
247 | /* Unable to use DMA due to host limitation */ |
248 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 249 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
250 | } else { |
251 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 252 | index = 16; |
8cbd6df1 | 253 | } |
1da177e4 | 254 | |
9a3dccc4 TH |
255 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
256 | if (cmd) { | |
257 | tf->command = cmd; | |
258 | return 0; | |
259 | } | |
260 | return -1; | |
1da177e4 LT |
261 | } |
262 | ||
35b649fe TH |
263 | /** |
264 | * ata_tf_read_block - Read block address from ATA taskfile | |
265 | * @tf: ATA taskfile of interest | |
266 | * @dev: ATA device @tf belongs to | |
267 | * | |
268 | * LOCKING: | |
269 | * None. | |
270 | * | |
271 | * Read block address from @tf. This function can handle all | |
272 | * three address formats - LBA, LBA48 and CHS. tf->protocol and | |
273 | * flags select the address format to use. | |
274 | * | |
275 | * RETURNS: | |
276 | * Block address read from @tf. | |
277 | */ | |
278 | u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) | |
279 | { | |
280 | u64 block = 0; | |
281 | ||
282 | if (tf->flags & ATA_TFLAG_LBA) { | |
283 | if (tf->flags & ATA_TFLAG_LBA48) { | |
284 | block |= (u64)tf->hob_lbah << 40; | |
285 | block |= (u64)tf->hob_lbam << 32; | |
286 | block |= tf->hob_lbal << 24; | |
287 | } else | |
288 | block |= (tf->device & 0xf) << 24; | |
289 | ||
290 | block |= tf->lbah << 16; | |
291 | block |= tf->lbam << 8; | |
292 | block |= tf->lbal; | |
293 | } else { | |
294 | u32 cyl, head, sect; | |
295 | ||
296 | cyl = tf->lbam | (tf->lbah << 8); | |
297 | head = tf->device & 0xf; | |
298 | sect = tf->lbal; | |
299 | ||
300 | block = (cyl * dev->heads + head) * dev->sectors + sect; | |
301 | } | |
302 | ||
303 | return block; | |
304 | } | |
305 | ||
bd056d7e TH |
306 | /** |
307 | * ata_build_rw_tf - Build ATA taskfile for given read/write request | |
308 | * @tf: Target ATA taskfile | |
309 | * @dev: ATA device @tf belongs to | |
310 | * @block: Block address | |
311 | * @n_block: Number of blocks | |
312 | * @tf_flags: RW/FUA etc... | |
313 | * @tag: tag | |
314 | * | |
315 | * LOCKING: | |
316 | * None. | |
317 | * | |
318 | * Build ATA taskfile @tf for read/write request described by | |
319 | * @block, @n_block, @tf_flags and @tag on @dev. | |
320 | * | |
321 | * RETURNS: | |
322 | * | |
323 | * 0 on success, -ERANGE if the request is too large for @dev, | |
324 | * -EINVAL if the request is invalid. | |
325 | */ | |
326 | int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, | |
327 | u64 block, u32 n_block, unsigned int tf_flags, | |
328 | unsigned int tag) | |
329 | { | |
330 | tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
331 | tf->flags |= tf_flags; | |
332 | ||
6d1245bf | 333 | if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { |
bd056d7e TH |
334 | /* yay, NCQ */ |
335 | if (!lba_48_ok(block, n_block)) | |
336 | return -ERANGE; | |
337 | ||
338 | tf->protocol = ATA_PROT_NCQ; | |
339 | tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; | |
340 | ||
341 | if (tf->flags & ATA_TFLAG_WRITE) | |
342 | tf->command = ATA_CMD_FPDMA_WRITE; | |
343 | else | |
344 | tf->command = ATA_CMD_FPDMA_READ; | |
345 | ||
346 | tf->nsect = tag << 3; | |
347 | tf->hob_feature = (n_block >> 8) & 0xff; | |
348 | tf->feature = n_block & 0xff; | |
349 | ||
350 | tf->hob_lbah = (block >> 40) & 0xff; | |
351 | tf->hob_lbam = (block >> 32) & 0xff; | |
352 | tf->hob_lbal = (block >> 24) & 0xff; | |
353 | tf->lbah = (block >> 16) & 0xff; | |
354 | tf->lbam = (block >> 8) & 0xff; | |
355 | tf->lbal = block & 0xff; | |
356 | ||
357 | tf->device = 1 << 6; | |
358 | if (tf->flags & ATA_TFLAG_FUA) | |
359 | tf->device |= 1 << 7; | |
360 | } else if (dev->flags & ATA_DFLAG_LBA) { | |
361 | tf->flags |= ATA_TFLAG_LBA; | |
362 | ||
363 | if (lba_28_ok(block, n_block)) { | |
364 | /* use LBA28 */ | |
365 | tf->device |= (block >> 24) & 0xf; | |
366 | } else if (lba_48_ok(block, n_block)) { | |
367 | if (!(dev->flags & ATA_DFLAG_LBA48)) | |
368 | return -ERANGE; | |
369 | ||
370 | /* use LBA48 */ | |
371 | tf->flags |= ATA_TFLAG_LBA48; | |
372 | ||
373 | tf->hob_nsect = (n_block >> 8) & 0xff; | |
374 | ||
375 | tf->hob_lbah = (block >> 40) & 0xff; | |
376 | tf->hob_lbam = (block >> 32) & 0xff; | |
377 | tf->hob_lbal = (block >> 24) & 0xff; | |
378 | } else | |
379 | /* request too large even for LBA48 */ | |
380 | return -ERANGE; | |
381 | ||
382 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
383 | return -EINVAL; | |
384 | ||
385 | tf->nsect = n_block & 0xff; | |
386 | ||
387 | tf->lbah = (block >> 16) & 0xff; | |
388 | tf->lbam = (block >> 8) & 0xff; | |
389 | tf->lbal = block & 0xff; | |
390 | ||
391 | tf->device |= ATA_LBA; | |
392 | } else { | |
393 | /* CHS */ | |
394 | u32 sect, head, cyl, track; | |
395 | ||
396 | /* The request -may- be too large for CHS addressing. */ | |
397 | if (!lba_28_ok(block, n_block)) | |
398 | return -ERANGE; | |
399 | ||
400 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
401 | return -EINVAL; | |
402 | ||
403 | /* Convert LBA to CHS */ | |
404 | track = (u32)block / dev->sectors; | |
405 | cyl = track / dev->heads; | |
406 | head = track % dev->heads; | |
407 | sect = (u32)block % dev->sectors + 1; | |
408 | ||
409 | DPRINTK("block %u track %u cyl %u head %u sect %u\n", | |
410 | (u32)block, track, cyl, head, sect); | |
411 | ||
412 | /* Check whether the converted CHS can fit. | |
413 | Cylinder: 0-65535 | |
414 | Head: 0-15 | |
415 | Sector: 1-255*/ | |
416 | if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) | |
417 | return -ERANGE; | |
418 | ||
419 | tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ | |
420 | tf->lbal = sect; | |
421 | tf->lbam = cyl; | |
422 | tf->lbah = cyl >> 8; | |
423 | tf->device |= head; | |
424 | } | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
cb95d562 TH |
429 | /** |
430 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
431 | * @pio_mask: pio_mask | |
432 | * @mwdma_mask: mwdma_mask | |
433 | * @udma_mask: udma_mask | |
434 | * | |
435 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
436 | * unsigned int xfer_mask. | |
437 | * | |
438 | * LOCKING: | |
439 | * None. | |
440 | * | |
441 | * RETURNS: | |
442 | * Packed xfer_mask. | |
443 | */ | |
444 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
445 | unsigned int mwdma_mask, | |
446 | unsigned int udma_mask) | |
447 | { | |
448 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
449 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
450 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
451 | } | |
452 | ||
c0489e4e TH |
453 | /** |
454 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
455 | * @xfer_mask: xfer_mask to unpack | |
456 | * @pio_mask: resulting pio_mask | |
457 | * @mwdma_mask: resulting mwdma_mask | |
458 | * @udma_mask: resulting udma_mask | |
459 | * | |
460 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
461 | * Any NULL distination masks will be ignored. | |
462 | */ | |
463 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
464 | unsigned int *pio_mask, | |
465 | unsigned int *mwdma_mask, | |
466 | unsigned int *udma_mask) | |
467 | { | |
468 | if (pio_mask) | |
469 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
470 | if (mwdma_mask) | |
471 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
472 | if (udma_mask) | |
473 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
474 | } | |
475 | ||
cb95d562 | 476 | static const struct ata_xfer_ent { |
be9a50c8 | 477 | int shift, bits; |
cb95d562 TH |
478 | u8 base; |
479 | } ata_xfer_tbl[] = { | |
480 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
481 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
482 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
483 | { -1, }, | |
484 | }; | |
485 | ||
486 | /** | |
487 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
488 | * @xfer_mask: xfer_mask of interest | |
489 | * | |
490 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
491 | * bit of @xfer_mask is considered. | |
492 | * | |
493 | * LOCKING: | |
494 | * None. | |
495 | * | |
496 | * RETURNS: | |
497 | * Matching XFER_* value, 0 if no match found. | |
498 | */ | |
499 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
500 | { | |
501 | int highbit = fls(xfer_mask) - 1; | |
502 | const struct ata_xfer_ent *ent; | |
503 | ||
504 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
505 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
506 | return ent->base + highbit - ent->shift; | |
507 | return 0; | |
508 | } | |
509 | ||
510 | /** | |
511 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
512 | * @xfer_mode: XFER_* of interest | |
513 | * | |
514 | * Return matching xfer_mask for @xfer_mode. | |
515 | * | |
516 | * LOCKING: | |
517 | * None. | |
518 | * | |
519 | * RETURNS: | |
520 | * Matching xfer_mask, 0 if no match found. | |
521 | */ | |
522 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
523 | { | |
524 | const struct ata_xfer_ent *ent; | |
525 | ||
526 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
527 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
528 | return 1 << (ent->shift + xfer_mode - ent->base); | |
529 | return 0; | |
530 | } | |
531 | ||
532 | /** | |
533 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
534 | * @xfer_mode: XFER_* of interest | |
535 | * | |
536 | * Return matching xfer_shift for @xfer_mode. | |
537 | * | |
538 | * LOCKING: | |
539 | * None. | |
540 | * | |
541 | * RETURNS: | |
542 | * Matching xfer_shift, -1 if no match found. | |
543 | */ | |
544 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
545 | { | |
546 | const struct ata_xfer_ent *ent; | |
547 | ||
548 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
549 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
550 | return ent->shift; | |
551 | return -1; | |
552 | } | |
553 | ||
1da177e4 | 554 | /** |
1da7b0d0 TH |
555 | * ata_mode_string - convert xfer_mask to string |
556 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
557 | * |
558 | * Determine string which represents the highest speed | |
1da7b0d0 | 559 | * (highest bit in @modemask). |
1da177e4 LT |
560 | * |
561 | * LOCKING: | |
562 | * None. | |
563 | * | |
564 | * RETURNS: | |
565 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 566 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 567 | */ |
1da7b0d0 | 568 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 569 | { |
75f554bc TH |
570 | static const char * const xfer_mode_str[] = { |
571 | "PIO0", | |
572 | "PIO1", | |
573 | "PIO2", | |
574 | "PIO3", | |
575 | "PIO4", | |
b352e57d AC |
576 | "PIO5", |
577 | "PIO6", | |
75f554bc TH |
578 | "MWDMA0", |
579 | "MWDMA1", | |
580 | "MWDMA2", | |
b352e57d AC |
581 | "MWDMA3", |
582 | "MWDMA4", | |
75f554bc TH |
583 | "UDMA/16", |
584 | "UDMA/25", | |
585 | "UDMA/33", | |
586 | "UDMA/44", | |
587 | "UDMA/66", | |
588 | "UDMA/100", | |
589 | "UDMA/133", | |
590 | "UDMA7", | |
591 | }; | |
1da7b0d0 | 592 | int highbit; |
1da177e4 | 593 | |
1da7b0d0 TH |
594 | highbit = fls(xfer_mask) - 1; |
595 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
596 | return xfer_mode_str[highbit]; | |
1da177e4 | 597 | return "<n/a>"; |
1da177e4 LT |
598 | } |
599 | ||
4c360c81 TH |
600 | static const char *sata_spd_string(unsigned int spd) |
601 | { | |
602 | static const char * const spd_str[] = { | |
603 | "1.5 Gbps", | |
604 | "3.0 Gbps", | |
605 | }; | |
606 | ||
607 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
608 | return "<unknown>"; | |
609 | return spd_str[spd - 1]; | |
610 | } | |
611 | ||
3373efd8 | 612 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 613 | { |
09d7f9b0 | 614 | if (ata_dev_enabled(dev)) { |
9af5c9c9 | 615 | if (ata_msg_drv(dev->link->ap)) |
09d7f9b0 | 616 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
4ae72a1e TH |
617 | ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | |
618 | ATA_DNXFER_QUIET); | |
0b8efb0a TH |
619 | dev->class++; |
620 | } | |
621 | } | |
622 | ||
1da177e4 | 623 | /** |
0d5ff566 | 624 | * ata_devchk - PATA device presence detection |
1da177e4 LT |
625 | * @ap: ATA channel to examine |
626 | * @device: Device to examine (starting at zero) | |
627 | * | |
628 | * This technique was originally described in | |
629 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
630 | * later found its way into the ATA/ATAPI spec. | |
631 | * | |
632 | * Write a pattern to the ATA shadow registers, | |
633 | * and if a device is present, it will respond by | |
634 | * correctly storing and echoing back the | |
635 | * ATA shadow register contents. | |
636 | * | |
637 | * LOCKING: | |
638 | * caller. | |
639 | */ | |
640 | ||
0d5ff566 | 641 | static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) |
1da177e4 LT |
642 | { |
643 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
644 | u8 nsect, lbal; | |
645 | ||
646 | ap->ops->dev_select(ap, device); | |
647 | ||
0d5ff566 TH |
648 | iowrite8(0x55, ioaddr->nsect_addr); |
649 | iowrite8(0xaa, ioaddr->lbal_addr); | |
1da177e4 | 650 | |
0d5ff566 TH |
651 | iowrite8(0xaa, ioaddr->nsect_addr); |
652 | iowrite8(0x55, ioaddr->lbal_addr); | |
1da177e4 | 653 | |
0d5ff566 TH |
654 | iowrite8(0x55, ioaddr->nsect_addr); |
655 | iowrite8(0xaa, ioaddr->lbal_addr); | |
1da177e4 | 656 | |
0d5ff566 TH |
657 | nsect = ioread8(ioaddr->nsect_addr); |
658 | lbal = ioread8(ioaddr->lbal_addr); | |
1da177e4 LT |
659 | |
660 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
661 | return 1; /* we found a device */ | |
662 | ||
663 | return 0; /* nothing found */ | |
664 | } | |
665 | ||
1da177e4 LT |
666 | /** |
667 | * ata_dev_classify - determine device type based on ATA-spec signature | |
668 | * @tf: ATA taskfile register set for device to be identified | |
669 | * | |
670 | * Determine from taskfile register contents whether a device is | |
671 | * ATA or ATAPI, as per "Signature and persistence" section | |
672 | * of ATA/PI spec (volume 1, sect 5.14). | |
673 | * | |
674 | * LOCKING: | |
675 | * None. | |
676 | * | |
677 | * RETURNS: | |
633273a3 TH |
678 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or |
679 | * %ATA_DEV_UNKNOWN the event of failure. | |
1da177e4 | 680 | */ |
057ace5e | 681 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
682 | { |
683 | /* Apple's open source Darwin code hints that some devices only | |
684 | * put a proper signature into the LBA mid/high registers, | |
685 | * So, we only check those. It's sufficient for uniqueness. | |
633273a3 TH |
686 | * |
687 | * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate | |
688 | * signatures for ATA and ATAPI devices attached on SerialATA, | |
689 | * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA | |
690 | * spec has never mentioned about using different signatures | |
691 | * for ATA/ATAPI devices. Then, Serial ATA II: Port | |
692 | * Multiplier specification began to use 0x69/0x96 to identify | |
693 | * port multpliers and 0x3c/0xc3 to identify SEMB device. | |
694 | * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and | |
695 | * 0x69/0x96 shortly and described them as reserved for | |
696 | * SerialATA. | |
697 | * | |
698 | * We follow the current spec and consider that 0x69/0x96 | |
699 | * identifies a port multiplier and 0x3c/0xc3 a SEMB device. | |
1da177e4 | 700 | */ |
633273a3 | 701 | if ((tf->lbam == 0) && (tf->lbah == 0)) { |
1da177e4 LT |
702 | DPRINTK("found ATA device by sig\n"); |
703 | return ATA_DEV_ATA; | |
704 | } | |
705 | ||
633273a3 | 706 | if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) { |
1da177e4 LT |
707 | DPRINTK("found ATAPI device by sig\n"); |
708 | return ATA_DEV_ATAPI; | |
709 | } | |
710 | ||
633273a3 TH |
711 | if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) { |
712 | DPRINTK("found PMP device by sig\n"); | |
713 | return ATA_DEV_PMP; | |
714 | } | |
715 | ||
716 | if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) { | |
2dcb407e | 717 | printk(KERN_INFO "ata: SEMB device ignored\n"); |
633273a3 TH |
718 | return ATA_DEV_SEMB_UNSUP; /* not yet */ |
719 | } | |
720 | ||
1da177e4 LT |
721 | DPRINTK("unknown device\n"); |
722 | return ATA_DEV_UNKNOWN; | |
723 | } | |
724 | ||
725 | /** | |
726 | * ata_dev_try_classify - Parse returned ATA device signature | |
3f19859e TH |
727 | * @dev: ATA device to classify (starting at zero) |
728 | * @present: device seems present | |
b4dc7623 | 729 | * @r_err: Value of error register on completion |
1da177e4 LT |
730 | * |
731 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
732 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
733 | * shadow registers, indicating the results of device detection | |
734 | * and diagnostics. | |
735 | * | |
736 | * Select the ATA device, and read the values from the ATA shadow | |
737 | * registers. Then parse according to the Error register value, | |
738 | * and the spec-defined values examined by ata_dev_classify(). | |
739 | * | |
740 | * LOCKING: | |
741 | * caller. | |
b4dc7623 TH |
742 | * |
743 | * RETURNS: | |
744 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 | 745 | */ |
3f19859e TH |
746 | unsigned int ata_dev_try_classify(struct ata_device *dev, int present, |
747 | u8 *r_err) | |
1da177e4 | 748 | { |
3f19859e | 749 | struct ata_port *ap = dev->link->ap; |
1da177e4 LT |
750 | struct ata_taskfile tf; |
751 | unsigned int class; | |
752 | u8 err; | |
753 | ||
3f19859e | 754 | ap->ops->dev_select(ap, dev->devno); |
1da177e4 LT |
755 | |
756 | memset(&tf, 0, sizeof(tf)); | |
757 | ||
1da177e4 | 758 | ap->ops->tf_read(ap, &tf); |
0169e284 | 759 | err = tf.feature; |
b4dc7623 TH |
760 | if (r_err) |
761 | *r_err = err; | |
1da177e4 | 762 | |
93590859 | 763 | /* see if device passed diags: if master then continue and warn later */ |
3f19859e | 764 | if (err == 0 && dev->devno == 0) |
93590859 | 765 | /* diagnostic fail : do nothing _YET_ */ |
3f19859e | 766 | dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; |
93590859 | 767 | else if (err == 1) |
1da177e4 | 768 | /* do nothing */ ; |
3f19859e | 769 | else if ((dev->devno == 0) && (err == 0x81)) |
1da177e4 LT |
770 | /* do nothing */ ; |
771 | else | |
b4dc7623 | 772 | return ATA_DEV_NONE; |
1da177e4 | 773 | |
b4dc7623 | 774 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 775 | class = ata_dev_classify(&tf); |
b4dc7623 | 776 | |
d7fbee05 TH |
777 | if (class == ATA_DEV_UNKNOWN) { |
778 | /* If the device failed diagnostic, it's likely to | |
779 | * have reported incorrect device signature too. | |
780 | * Assume ATA device if the device seems present but | |
781 | * device signature is invalid with diagnostic | |
782 | * failure. | |
783 | */ | |
784 | if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) | |
785 | class = ATA_DEV_ATA; | |
786 | else | |
787 | class = ATA_DEV_NONE; | |
788 | } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
789 | class = ATA_DEV_NONE; | |
790 | ||
b4dc7623 | 791 | return class; |
1da177e4 LT |
792 | } |
793 | ||
794 | /** | |
6a62a04d | 795 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
796 | * @id: IDENTIFY DEVICE results we will examine |
797 | * @s: string into which data is output | |
798 | * @ofs: offset into identify device page | |
799 | * @len: length of string to return. must be an even number. | |
800 | * | |
801 | * The strings in the IDENTIFY DEVICE page are broken up into | |
802 | * 16-bit chunks. Run through the string, and output each | |
803 | * 8-bit chunk linearly, regardless of platform. | |
804 | * | |
805 | * LOCKING: | |
806 | * caller. | |
807 | */ | |
808 | ||
6a62a04d TH |
809 | void ata_id_string(const u16 *id, unsigned char *s, |
810 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
811 | { |
812 | unsigned int c; | |
813 | ||
814 | while (len > 0) { | |
815 | c = id[ofs] >> 8; | |
816 | *s = c; | |
817 | s++; | |
818 | ||
819 | c = id[ofs] & 0xff; | |
820 | *s = c; | |
821 | s++; | |
822 | ||
823 | ofs++; | |
824 | len -= 2; | |
825 | } | |
826 | } | |
827 | ||
0e949ff3 | 828 | /** |
6a62a04d | 829 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
830 | * @id: IDENTIFY DEVICE results we will examine |
831 | * @s: string into which data is output | |
832 | * @ofs: offset into identify device page | |
833 | * @len: length of string to return. must be an odd number. | |
834 | * | |
6a62a04d | 835 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
836 | * trims trailing spaces and terminates the resulting string with |
837 | * null. @len must be actual maximum length (even number) + 1. | |
838 | * | |
839 | * LOCKING: | |
840 | * caller. | |
841 | */ | |
6a62a04d TH |
842 | void ata_id_c_string(const u16 *id, unsigned char *s, |
843 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
844 | { |
845 | unsigned char *p; | |
846 | ||
847 | WARN_ON(!(len & 1)); | |
848 | ||
6a62a04d | 849 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
850 | |
851 | p = s + strnlen(s, len - 1); | |
852 | while (p > s && p[-1] == ' ') | |
853 | p--; | |
854 | *p = '\0'; | |
855 | } | |
0baab86b | 856 | |
db6f8759 TH |
857 | static u64 ata_id_n_sectors(const u16 *id) |
858 | { | |
859 | if (ata_id_has_lba(id)) { | |
860 | if (ata_id_has_lba48(id)) | |
861 | return ata_id_u64(id, 100); | |
862 | else | |
863 | return ata_id_u32(id, 60); | |
864 | } else { | |
865 | if (ata_id_current_chs_valid(id)) | |
866 | return ata_id_u32(id, 57); | |
867 | else | |
868 | return id[1] * id[3] * id[6]; | |
869 | } | |
870 | } | |
871 | ||
1e999736 AC |
872 | static u64 ata_tf_to_lba48(struct ata_taskfile *tf) |
873 | { | |
874 | u64 sectors = 0; | |
875 | ||
876 | sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; | |
877 | sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; | |
878 | sectors |= (tf->hob_lbal & 0xff) << 24; | |
879 | sectors |= (tf->lbah & 0xff) << 16; | |
880 | sectors |= (tf->lbam & 0xff) << 8; | |
881 | sectors |= (tf->lbal & 0xff); | |
882 | ||
883 | return ++sectors; | |
884 | } | |
885 | ||
886 | static u64 ata_tf_to_lba(struct ata_taskfile *tf) | |
887 | { | |
888 | u64 sectors = 0; | |
889 | ||
890 | sectors |= (tf->device & 0x0f) << 24; | |
891 | sectors |= (tf->lbah & 0xff) << 16; | |
892 | sectors |= (tf->lbam & 0xff) << 8; | |
893 | sectors |= (tf->lbal & 0xff); | |
894 | ||
895 | return ++sectors; | |
896 | } | |
897 | ||
898 | /** | |
c728a914 TH |
899 | * ata_read_native_max_address - Read native max address |
900 | * @dev: target device | |
901 | * @max_sectors: out parameter for the result native max address | |
1e999736 | 902 | * |
c728a914 TH |
903 | * Perform an LBA48 or LBA28 native size query upon the device in |
904 | * question. | |
1e999736 | 905 | * |
c728a914 TH |
906 | * RETURNS: |
907 | * 0 on success, -EACCES if command is aborted by the drive. | |
908 | * -EIO on other errors. | |
1e999736 | 909 | */ |
c728a914 | 910 | static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors) |
1e999736 | 911 | { |
c728a914 | 912 | unsigned int err_mask; |
1e999736 | 913 | struct ata_taskfile tf; |
c728a914 | 914 | int lba48 = ata_id_has_lba48(dev->id); |
1e999736 AC |
915 | |
916 | ata_tf_init(dev, &tf); | |
917 | ||
c728a914 | 918 | /* always clear all address registers */ |
1e999736 | 919 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; |
1e999736 | 920 | |
c728a914 TH |
921 | if (lba48) { |
922 | tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; | |
923 | tf.flags |= ATA_TFLAG_LBA48; | |
924 | } else | |
925 | tf.command = ATA_CMD_READ_NATIVE_MAX; | |
1e999736 | 926 | |
1e999736 | 927 | tf.protocol |= ATA_PROT_NODATA; |
c728a914 TH |
928 | tf.device |= ATA_LBA; |
929 | ||
2b789108 | 930 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
c728a914 TH |
931 | if (err_mask) { |
932 | ata_dev_printk(dev, KERN_WARNING, "failed to read native " | |
933 | "max address (err_mask=0x%x)\n", err_mask); | |
934 | if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) | |
935 | return -EACCES; | |
936 | return -EIO; | |
937 | } | |
1e999736 | 938 | |
c728a914 TH |
939 | if (lba48) |
940 | *max_sectors = ata_tf_to_lba48(&tf); | |
941 | else | |
942 | *max_sectors = ata_tf_to_lba(&tf); | |
2dcb407e | 943 | if (dev->horkage & ATA_HORKAGE_HPA_SIZE) |
93328e11 | 944 | (*max_sectors)--; |
c728a914 | 945 | return 0; |
1e999736 AC |
946 | } |
947 | ||
948 | /** | |
c728a914 TH |
949 | * ata_set_max_sectors - Set max sectors |
950 | * @dev: target device | |
6b38d1d1 | 951 | * @new_sectors: new max sectors value to set for the device |
1e999736 | 952 | * |
c728a914 TH |
953 | * Set max sectors of @dev to @new_sectors. |
954 | * | |
955 | * RETURNS: | |
956 | * 0 on success, -EACCES if command is aborted or denied (due to | |
957 | * previous non-volatile SET_MAX) by the drive. -EIO on other | |
958 | * errors. | |
1e999736 | 959 | */ |
05027adc | 960 | static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors) |
1e999736 | 961 | { |
c728a914 | 962 | unsigned int err_mask; |
1e999736 | 963 | struct ata_taskfile tf; |
c728a914 | 964 | int lba48 = ata_id_has_lba48(dev->id); |
1e999736 AC |
965 | |
966 | new_sectors--; | |
967 | ||
968 | ata_tf_init(dev, &tf); | |
969 | ||
1e999736 | 970 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; |
c728a914 TH |
971 | |
972 | if (lba48) { | |
973 | tf.command = ATA_CMD_SET_MAX_EXT; | |
974 | tf.flags |= ATA_TFLAG_LBA48; | |
975 | ||
976 | tf.hob_lbal = (new_sectors >> 24) & 0xff; | |
977 | tf.hob_lbam = (new_sectors >> 32) & 0xff; | |
978 | tf.hob_lbah = (new_sectors >> 40) & 0xff; | |
1e582ba4 | 979 | } else { |
c728a914 TH |
980 | tf.command = ATA_CMD_SET_MAX; |
981 | ||
1e582ba4 TH |
982 | tf.device |= (new_sectors >> 24) & 0xf; |
983 | } | |
984 | ||
1e999736 | 985 | tf.protocol |= ATA_PROT_NODATA; |
c728a914 | 986 | tf.device |= ATA_LBA; |
1e999736 AC |
987 | |
988 | tf.lbal = (new_sectors >> 0) & 0xff; | |
989 | tf.lbam = (new_sectors >> 8) & 0xff; | |
990 | tf.lbah = (new_sectors >> 16) & 0xff; | |
1e999736 | 991 | |
2b789108 | 992 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
c728a914 TH |
993 | if (err_mask) { |
994 | ata_dev_printk(dev, KERN_WARNING, "failed to set " | |
995 | "max address (err_mask=0x%x)\n", err_mask); | |
996 | if (err_mask == AC_ERR_DEV && | |
997 | (tf.feature & (ATA_ABORTED | ATA_IDNF))) | |
998 | return -EACCES; | |
999 | return -EIO; | |
1000 | } | |
1001 | ||
c728a914 | 1002 | return 0; |
1e999736 AC |
1003 | } |
1004 | ||
1005 | /** | |
1006 | * ata_hpa_resize - Resize a device with an HPA set | |
1007 | * @dev: Device to resize | |
1008 | * | |
1009 | * Read the size of an LBA28 or LBA48 disk with HPA features and resize | |
1010 | * it if required to the full size of the media. The caller must check | |
1011 | * the drive has the HPA feature set enabled. | |
05027adc TH |
1012 | * |
1013 | * RETURNS: | |
1014 | * 0 on success, -errno on failure. | |
1e999736 | 1015 | */ |
05027adc | 1016 | static int ata_hpa_resize(struct ata_device *dev) |
1e999736 | 1017 | { |
05027adc TH |
1018 | struct ata_eh_context *ehc = &dev->link->eh_context; |
1019 | int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; | |
1020 | u64 sectors = ata_id_n_sectors(dev->id); | |
1021 | u64 native_sectors; | |
c728a914 | 1022 | int rc; |
a617c09f | 1023 | |
05027adc TH |
1024 | /* do we need to do it? */ |
1025 | if (dev->class != ATA_DEV_ATA || | |
1026 | !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) || | |
1027 | (dev->horkage & ATA_HORKAGE_BROKEN_HPA)) | |
c728a914 | 1028 | return 0; |
1e999736 | 1029 | |
05027adc TH |
1030 | /* read native max address */ |
1031 | rc = ata_read_native_max_address(dev, &native_sectors); | |
1032 | if (rc) { | |
1033 | /* If HPA isn't going to be unlocked, skip HPA | |
1034 | * resizing from the next try. | |
1035 | */ | |
1036 | if (!ata_ignore_hpa) { | |
1037 | ata_dev_printk(dev, KERN_WARNING, "HPA support seems " | |
1038 | "broken, will skip HPA handling\n"); | |
1039 | dev->horkage |= ATA_HORKAGE_BROKEN_HPA; | |
1040 | ||
1041 | /* we can continue if device aborted the command */ | |
1042 | if (rc == -EACCES) | |
1043 | rc = 0; | |
1e999736 | 1044 | } |
37301a55 | 1045 | |
05027adc TH |
1046 | return rc; |
1047 | } | |
1048 | ||
1049 | /* nothing to do? */ | |
1050 | if (native_sectors <= sectors || !ata_ignore_hpa) { | |
1051 | if (!print_info || native_sectors == sectors) | |
1052 | return 0; | |
1053 | ||
1054 | if (native_sectors > sectors) | |
1055 | ata_dev_printk(dev, KERN_INFO, | |
1056 | "HPA detected: current %llu, native %llu\n", | |
1057 | (unsigned long long)sectors, | |
1058 | (unsigned long long)native_sectors); | |
1059 | else if (native_sectors < sectors) | |
1060 | ata_dev_printk(dev, KERN_WARNING, | |
1061 | "native sectors (%llu) is smaller than " | |
1062 | "sectors (%llu)\n", | |
1063 | (unsigned long long)native_sectors, | |
1064 | (unsigned long long)sectors); | |
1065 | return 0; | |
1066 | } | |
1067 | ||
1068 | /* let's unlock HPA */ | |
1069 | rc = ata_set_max_sectors(dev, native_sectors); | |
1070 | if (rc == -EACCES) { | |
1071 | /* if device aborted the command, skip HPA resizing */ | |
1072 | ata_dev_printk(dev, KERN_WARNING, "device aborted resize " | |
1073 | "(%llu -> %llu), skipping HPA handling\n", | |
1074 | (unsigned long long)sectors, | |
1075 | (unsigned long long)native_sectors); | |
1076 | dev->horkage |= ATA_HORKAGE_BROKEN_HPA; | |
1077 | return 0; | |
1078 | } else if (rc) | |
1079 | return rc; | |
1080 | ||
1081 | /* re-read IDENTIFY data */ | |
1082 | rc = ata_dev_reread_id(dev, 0); | |
1083 | if (rc) { | |
1084 | ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY " | |
1085 | "data after HPA resizing\n"); | |
1086 | return rc; | |
1087 | } | |
1088 | ||
1089 | if (print_info) { | |
1090 | u64 new_sectors = ata_id_n_sectors(dev->id); | |
1091 | ata_dev_printk(dev, KERN_INFO, | |
1092 | "HPA unlocked: %llu -> %llu, native %llu\n", | |
1093 | (unsigned long long)sectors, | |
1094 | (unsigned long long)new_sectors, | |
1095 | (unsigned long long)native_sectors); | |
1096 | } | |
1097 | ||
1098 | return 0; | |
1e999736 AC |
1099 | } |
1100 | ||
10305f0f A |
1101 | /** |
1102 | * ata_id_to_dma_mode - Identify DMA mode from id block | |
1103 | * @dev: device to identify | |
cc261267 | 1104 | * @unknown: mode to assume if we cannot tell |
10305f0f A |
1105 | * |
1106 | * Set up the timing values for the device based upon the identify | |
1107 | * reported values for the DMA mode. This function is used by drivers | |
1108 | * which rely upon firmware configured modes, but wish to report the | |
1109 | * mode correctly when possible. | |
1110 | * | |
1111 | * In addition we emit similarly formatted messages to the default | |
1112 | * ata_dev_set_mode handler, in order to provide consistency of | |
1113 | * presentation. | |
1114 | */ | |
1115 | ||
1116 | void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) | |
1117 | { | |
1118 | unsigned int mask; | |
1119 | u8 mode; | |
1120 | ||
1121 | /* Pack the DMA modes */ | |
1122 | mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; | |
1123 | if (dev->id[53] & 0x04) | |
1124 | mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; | |
1125 | ||
1126 | /* Select the mode in use */ | |
1127 | mode = ata_xfer_mask2mode(mask); | |
1128 | ||
1129 | if (mode != 0) { | |
1130 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", | |
1131 | ata_mode_string(mask)); | |
1132 | } else { | |
1133 | /* SWDMA perhaps ? */ | |
1134 | mode = unknown; | |
1135 | ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); | |
1136 | } | |
1137 | ||
1138 | /* Configure the device reporting */ | |
1139 | dev->xfer_mode = mode; | |
1140 | dev->xfer_shift = ata_xfer_mode2shift(mode); | |
1141 | } | |
1142 | ||
0baab86b EF |
1143 | /** |
1144 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
1145 | * @ap: ATA channel to manipulate | |
1146 | * @device: ATA device (numbered from zero) to select | |
1147 | * | |
1148 | * This function performs no actual function. | |
1149 | * | |
1150 | * May be used as the dev_select() entry in ata_port_operations. | |
1151 | * | |
1152 | * LOCKING: | |
1153 | * caller. | |
1154 | */ | |
2dcb407e | 1155 | void ata_noop_dev_select(struct ata_port *ap, unsigned int device) |
1da177e4 LT |
1156 | { |
1157 | } | |
1158 | ||
0baab86b | 1159 | |
1da177e4 LT |
1160 | /** |
1161 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
1162 | * @ap: ATA channel to manipulate | |
1163 | * @device: ATA device (numbered from zero) to select | |
1164 | * | |
1165 | * Use the method defined in the ATA specification to | |
1166 | * make either device 0, or device 1, active on the | |
0baab86b EF |
1167 | * ATA channel. Works with both PIO and MMIO. |
1168 | * | |
1169 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
1170 | * |
1171 | * LOCKING: | |
1172 | * caller. | |
1173 | */ | |
1174 | ||
2dcb407e | 1175 | void ata_std_dev_select(struct ata_port *ap, unsigned int device) |
1da177e4 LT |
1176 | { |
1177 | u8 tmp; | |
1178 | ||
1179 | if (device == 0) | |
1180 | tmp = ATA_DEVICE_OBS; | |
1181 | else | |
1182 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1183 | ||
0d5ff566 | 1184 | iowrite8(tmp, ap->ioaddr.device_addr); |
1da177e4 LT |
1185 | ata_pause(ap); /* needed; also flushes, for mmio */ |
1186 | } | |
1187 | ||
1188 | /** | |
1189 | * ata_dev_select - Select device 0/1 on ATA bus | |
1190 | * @ap: ATA channel to manipulate | |
1191 | * @device: ATA device (numbered from zero) to select | |
1192 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1193 | * @can_sleep: non-zero if context allows sleeping | |
1194 | * | |
1195 | * Use the method defined in the ATA specification to | |
1196 | * make either device 0, or device 1, active on the | |
1197 | * ATA channel. | |
1198 | * | |
1199 | * This is a high-level version of ata_std_dev_select(), | |
1200 | * which additionally provides the services of inserting | |
1201 | * the proper pauses and status polling, where needed. | |
1202 | * | |
1203 | * LOCKING: | |
1204 | * caller. | |
1205 | */ | |
1206 | ||
1207 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1208 | unsigned int wait, unsigned int can_sleep) | |
1209 | { | |
88574551 | 1210 | if (ata_msg_probe(ap)) |
44877b4e TH |
1211 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " |
1212 | "device %u, wait %u\n", device, wait); | |
1da177e4 LT |
1213 | |
1214 | if (wait) | |
1215 | ata_wait_idle(ap); | |
1216 | ||
1217 | ap->ops->dev_select(ap, device); | |
1218 | ||
1219 | if (wait) { | |
9af5c9c9 | 1220 | if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) |
1da177e4 LT |
1221 | msleep(150); |
1222 | ata_wait_idle(ap); | |
1223 | } | |
1224 | } | |
1225 | ||
1226 | /** | |
1227 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 1228 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 1229 | * |
0bd3300a TH |
1230 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
1231 | * page. | |
1da177e4 LT |
1232 | * |
1233 | * LOCKING: | |
1234 | * caller. | |
1235 | */ | |
1236 | ||
0bd3300a | 1237 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
1238 | { |
1239 | DPRINTK("49==0x%04x " | |
1240 | "53==0x%04x " | |
1241 | "63==0x%04x " | |
1242 | "64==0x%04x " | |
1243 | "75==0x%04x \n", | |
0bd3300a TH |
1244 | id[49], |
1245 | id[53], | |
1246 | id[63], | |
1247 | id[64], | |
1248 | id[75]); | |
1da177e4 LT |
1249 | DPRINTK("80==0x%04x " |
1250 | "81==0x%04x " | |
1251 | "82==0x%04x " | |
1252 | "83==0x%04x " | |
1253 | "84==0x%04x \n", | |
0bd3300a TH |
1254 | id[80], |
1255 | id[81], | |
1256 | id[82], | |
1257 | id[83], | |
1258 | id[84]); | |
1da177e4 LT |
1259 | DPRINTK("88==0x%04x " |
1260 | "93==0x%04x\n", | |
0bd3300a TH |
1261 | id[88], |
1262 | id[93]); | |
1da177e4 LT |
1263 | } |
1264 | ||
cb95d562 TH |
1265 | /** |
1266 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
1267 | * @id: IDENTIFY data to compute xfer mask from | |
1268 | * | |
1269 | * Compute the xfermask for this device. This is not as trivial | |
1270 | * as it seems if we must consider early devices correctly. | |
1271 | * | |
1272 | * FIXME: pre IDE drive timing (do we care ?). | |
1273 | * | |
1274 | * LOCKING: | |
1275 | * None. | |
1276 | * | |
1277 | * RETURNS: | |
1278 | * Computed xfermask | |
1279 | */ | |
1280 | static unsigned int ata_id_xfermask(const u16 *id) | |
1281 | { | |
1282 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
1283 | ||
1284 | /* Usual case. Word 53 indicates word 64 is valid */ | |
1285 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
1286 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
1287 | pio_mask <<= 3; | |
1288 | pio_mask |= 0x7; | |
1289 | } else { | |
1290 | /* If word 64 isn't valid then Word 51 high byte holds | |
1291 | * the PIO timing number for the maximum. Turn it into | |
1292 | * a mask. | |
1293 | */ | |
7a0f1c8a | 1294 | u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; |
46767aeb | 1295 | if (mode < 5) /* Valid PIO range */ |
2dcb407e | 1296 | pio_mask = (2 << mode) - 1; |
46767aeb AC |
1297 | else |
1298 | pio_mask = 1; | |
cb95d562 TH |
1299 | |
1300 | /* But wait.. there's more. Design your standards by | |
1301 | * committee and you too can get a free iordy field to | |
1302 | * process. However its the speeds not the modes that | |
1303 | * are supported... Note drivers using the timing API | |
1304 | * will get this right anyway | |
1305 | */ | |
1306 | } | |
1307 | ||
1308 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 | 1309 | |
b352e57d AC |
1310 | if (ata_id_is_cfa(id)) { |
1311 | /* | |
1312 | * Process compact flash extended modes | |
1313 | */ | |
1314 | int pio = id[163] & 0x7; | |
1315 | int dma = (id[163] >> 3) & 7; | |
1316 | ||
1317 | if (pio) | |
1318 | pio_mask |= (1 << 5); | |
1319 | if (pio > 1) | |
1320 | pio_mask |= (1 << 6); | |
1321 | if (dma) | |
1322 | mwdma_mask |= (1 << 3); | |
1323 | if (dma > 1) | |
1324 | mwdma_mask |= (1 << 4); | |
1325 | } | |
1326 | ||
fb21f0d0 TH |
1327 | udma_mask = 0; |
1328 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
1329 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
1330 | |
1331 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
1332 | } | |
1333 | ||
86e45b6b TH |
1334 | /** |
1335 | * ata_port_queue_task - Queue port_task | |
1336 | * @ap: The ata_port to queue port_task for | |
e2a7f77a | 1337 | * @fn: workqueue function to be scheduled |
65f27f38 | 1338 | * @data: data for @fn to use |
e2a7f77a | 1339 | * @delay: delay time for workqueue function |
86e45b6b TH |
1340 | * |
1341 | * Schedule @fn(@data) for execution after @delay jiffies using | |
1342 | * port_task. There is one port_task per port and it's the | |
1343 | * user(low level driver)'s responsibility to make sure that only | |
1344 | * one task is active at any given time. | |
1345 | * | |
1346 | * libata core layer takes care of synchronization between | |
1347 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
1348 | * synchronization. | |
1349 | * | |
1350 | * LOCKING: | |
1351 | * Inherited from caller. | |
1352 | */ | |
65f27f38 | 1353 | void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, |
86e45b6b TH |
1354 | unsigned long delay) |
1355 | { | |
65f27f38 DH |
1356 | PREPARE_DELAYED_WORK(&ap->port_task, fn); |
1357 | ap->port_task_data = data; | |
86e45b6b | 1358 | |
45a66c1c ON |
1359 | /* may fail if ata_port_flush_task() in progress */ |
1360 | queue_delayed_work(ata_wq, &ap->port_task, delay); | |
86e45b6b TH |
1361 | } |
1362 | ||
1363 | /** | |
1364 | * ata_port_flush_task - Flush port_task | |
1365 | * @ap: The ata_port to flush port_task for | |
1366 | * | |
1367 | * After this function completes, port_task is guranteed not to | |
1368 | * be running or scheduled. | |
1369 | * | |
1370 | * LOCKING: | |
1371 | * Kernel thread context (may sleep) | |
1372 | */ | |
1373 | void ata_port_flush_task(struct ata_port *ap) | |
1374 | { | |
86e45b6b TH |
1375 | DPRINTK("ENTER\n"); |
1376 | ||
45a66c1c | 1377 | cancel_rearming_delayed_work(&ap->port_task); |
86e45b6b | 1378 | |
0dd4b21f BP |
1379 | if (ata_msg_ctl(ap)) |
1380 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
86e45b6b TH |
1381 | } |
1382 | ||
7102d230 | 1383 | static void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 1384 | { |
77853bf2 | 1385 | struct completion *waiting = qc->private_data; |
a2a7a662 | 1386 | |
a2a7a662 | 1387 | complete(waiting); |
a2a7a662 TH |
1388 | } |
1389 | ||
1390 | /** | |
2432697b | 1391 | * ata_exec_internal_sg - execute libata internal command |
a2a7a662 TH |
1392 | * @dev: Device to which the command is sent |
1393 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 1394 | * @cdb: CDB for packet command |
a2a7a662 | 1395 | * @dma_dir: Data tranfer direction of the command |
5c1ad8b3 | 1396 | * @sgl: sg list for the data buffer of the command |
2432697b | 1397 | * @n_elem: Number of sg entries |
2b789108 | 1398 | * @timeout: Timeout in msecs (0 for default) |
a2a7a662 TH |
1399 | * |
1400 | * Executes libata internal command with timeout. @tf contains | |
1401 | * command on entry and result on return. Timeout and error | |
1402 | * conditions are reported via return value. No recovery action | |
1403 | * is taken after a command times out. It's caller's duty to | |
1404 | * clean up after timeout. | |
1405 | * | |
1406 | * LOCKING: | |
1407 | * None. Should be called with kernel context, might sleep. | |
551e8889 TH |
1408 | * |
1409 | * RETURNS: | |
1410 | * Zero on success, AC_ERR_* mask on failure | |
a2a7a662 | 1411 | */ |
2432697b TH |
1412 | unsigned ata_exec_internal_sg(struct ata_device *dev, |
1413 | struct ata_taskfile *tf, const u8 *cdb, | |
87260216 | 1414 | int dma_dir, struct scatterlist *sgl, |
2b789108 | 1415 | unsigned int n_elem, unsigned long timeout) |
a2a7a662 | 1416 | { |
9af5c9c9 TH |
1417 | struct ata_link *link = dev->link; |
1418 | struct ata_port *ap = link->ap; | |
a2a7a662 TH |
1419 | u8 command = tf->command; |
1420 | struct ata_queued_cmd *qc; | |
2ab7db1f | 1421 | unsigned int tag, preempted_tag; |
dedaf2b0 | 1422 | u32 preempted_sactive, preempted_qc_active; |
da917d69 | 1423 | int preempted_nr_active_links; |
60be6b9a | 1424 | DECLARE_COMPLETION_ONSTACK(wait); |
a2a7a662 | 1425 | unsigned long flags; |
77853bf2 | 1426 | unsigned int err_mask; |
d95a717f | 1427 | int rc; |
a2a7a662 | 1428 | |
ba6a1308 | 1429 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 | 1430 | |
e3180499 | 1431 | /* no internal command while frozen */ |
b51e9e5d | 1432 | if (ap->pflags & ATA_PFLAG_FROZEN) { |
ba6a1308 | 1433 | spin_unlock_irqrestore(ap->lock, flags); |
e3180499 TH |
1434 | return AC_ERR_SYSTEM; |
1435 | } | |
1436 | ||
2ab7db1f | 1437 | /* initialize internal qc */ |
a2a7a662 | 1438 | |
2ab7db1f TH |
1439 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1440 | * drivers choke if any other tag is given. This breaks | |
1441 | * ata_tag_internal() test for those drivers. Don't use new | |
1442 | * EH stuff without converting to it. | |
1443 | */ | |
1444 | if (ap->ops->error_handler) | |
1445 | tag = ATA_TAG_INTERNAL; | |
1446 | else | |
1447 | tag = 0; | |
1448 | ||
6cec4a39 | 1449 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1450 | BUG(); |
f69499f4 | 1451 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1452 | |
1453 | qc->tag = tag; | |
1454 | qc->scsicmd = NULL; | |
1455 | qc->ap = ap; | |
1456 | qc->dev = dev; | |
1457 | ata_qc_reinit(qc); | |
1458 | ||
9af5c9c9 TH |
1459 | preempted_tag = link->active_tag; |
1460 | preempted_sactive = link->sactive; | |
dedaf2b0 | 1461 | preempted_qc_active = ap->qc_active; |
da917d69 | 1462 | preempted_nr_active_links = ap->nr_active_links; |
9af5c9c9 TH |
1463 | link->active_tag = ATA_TAG_POISON; |
1464 | link->sactive = 0; | |
dedaf2b0 | 1465 | ap->qc_active = 0; |
da917d69 | 1466 | ap->nr_active_links = 0; |
2ab7db1f TH |
1467 | |
1468 | /* prepare & issue qc */ | |
a2a7a662 | 1469 | qc->tf = *tf; |
d69cf37d TH |
1470 | if (cdb) |
1471 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1472 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1473 | qc->dma_dir = dma_dir; |
1474 | if (dma_dir != DMA_NONE) { | |
2432697b | 1475 | unsigned int i, buflen = 0; |
87260216 | 1476 | struct scatterlist *sg; |
2432697b | 1477 | |
87260216 JA |
1478 | for_each_sg(sgl, sg, n_elem, i) |
1479 | buflen += sg->length; | |
2432697b | 1480 | |
87260216 | 1481 | ata_sg_init(qc, sgl, n_elem); |
49c80429 | 1482 | qc->nbytes = buflen; |
a2a7a662 TH |
1483 | } |
1484 | ||
77853bf2 | 1485 | qc->private_data = &wait; |
a2a7a662 TH |
1486 | qc->complete_fn = ata_qc_complete_internal; |
1487 | ||
8e0e694a | 1488 | ata_qc_issue(qc); |
a2a7a662 | 1489 | |
ba6a1308 | 1490 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 | 1491 | |
2b789108 TH |
1492 | if (!timeout) |
1493 | timeout = ata_probe_timeout * 1000 / HZ; | |
1494 | ||
1495 | rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); | |
d95a717f TH |
1496 | |
1497 | ata_port_flush_task(ap); | |
41ade50c | 1498 | |
d95a717f | 1499 | if (!rc) { |
ba6a1308 | 1500 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 TH |
1501 | |
1502 | /* We're racing with irq here. If we lose, the | |
1503 | * following test prevents us from completing the qc | |
d95a717f TH |
1504 | * twice. If we win, the port is frozen and will be |
1505 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1506 | */ |
77853bf2 | 1507 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1508 | qc->err_mask |= AC_ERR_TIMEOUT; |
1509 | ||
1510 | if (ap->ops->error_handler) | |
1511 | ata_port_freeze(ap); | |
1512 | else | |
1513 | ata_qc_complete(qc); | |
f15a1daf | 1514 | |
0dd4b21f BP |
1515 | if (ata_msg_warn(ap)) |
1516 | ata_dev_printk(dev, KERN_WARNING, | |
88574551 | 1517 | "qc timeout (cmd 0x%x)\n", command); |
a2a7a662 TH |
1518 | } |
1519 | ||
ba6a1308 | 1520 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 TH |
1521 | } |
1522 | ||
d95a717f TH |
1523 | /* do post_internal_cmd */ |
1524 | if (ap->ops->post_internal_cmd) | |
1525 | ap->ops->post_internal_cmd(qc); | |
1526 | ||
a51d644a TH |
1527 | /* perform minimal error analysis */ |
1528 | if (qc->flags & ATA_QCFLAG_FAILED) { | |
1529 | if (qc->result_tf.command & (ATA_ERR | ATA_DF)) | |
1530 | qc->err_mask |= AC_ERR_DEV; | |
1531 | ||
1532 | if (!qc->err_mask) | |
1533 | qc->err_mask |= AC_ERR_OTHER; | |
1534 | ||
1535 | if (qc->err_mask & ~AC_ERR_OTHER) | |
1536 | qc->err_mask &= ~AC_ERR_OTHER; | |
d95a717f TH |
1537 | } |
1538 | ||
15869303 | 1539 | /* finish up */ |
ba6a1308 | 1540 | spin_lock_irqsave(ap->lock, flags); |
15869303 | 1541 | |
e61e0672 | 1542 | *tf = qc->result_tf; |
77853bf2 TH |
1543 | err_mask = qc->err_mask; |
1544 | ||
1545 | ata_qc_free(qc); | |
9af5c9c9 TH |
1546 | link->active_tag = preempted_tag; |
1547 | link->sactive = preempted_sactive; | |
dedaf2b0 | 1548 | ap->qc_active = preempted_qc_active; |
da917d69 | 1549 | ap->nr_active_links = preempted_nr_active_links; |
77853bf2 | 1550 | |
1f7dd3e9 TH |
1551 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1552 | * Until those drivers are fixed, we detect the condition | |
1553 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1554 | * port. | |
1555 | * | |
1556 | * Note that this doesn't change any behavior as internal | |
1557 | * command failure results in disabling the device in the | |
1558 | * higher layer for LLDDs without new reset/EH callbacks. | |
1559 | * | |
1560 | * Kill the following code as soon as those drivers are fixed. | |
1561 | */ | |
198e0fed | 1562 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1563 | err_mask |= AC_ERR_SYSTEM; |
1564 | ata_port_probe(ap); | |
1565 | } | |
1566 | ||
ba6a1308 | 1567 | spin_unlock_irqrestore(ap->lock, flags); |
15869303 | 1568 | |
77853bf2 | 1569 | return err_mask; |
a2a7a662 TH |
1570 | } |
1571 | ||
2432697b | 1572 | /** |
33480a0e | 1573 | * ata_exec_internal - execute libata internal command |
2432697b TH |
1574 | * @dev: Device to which the command is sent |
1575 | * @tf: Taskfile registers for the command and the result | |
1576 | * @cdb: CDB for packet command | |
1577 | * @dma_dir: Data tranfer direction of the command | |
1578 | * @buf: Data buffer of the command | |
1579 | * @buflen: Length of data buffer | |
2b789108 | 1580 | * @timeout: Timeout in msecs (0 for default) |
2432697b TH |
1581 | * |
1582 | * Wrapper around ata_exec_internal_sg() which takes simple | |
1583 | * buffer instead of sg list. | |
1584 | * | |
1585 | * LOCKING: | |
1586 | * None. Should be called with kernel context, might sleep. | |
1587 | * | |
1588 | * RETURNS: | |
1589 | * Zero on success, AC_ERR_* mask on failure | |
1590 | */ | |
1591 | unsigned ata_exec_internal(struct ata_device *dev, | |
1592 | struct ata_taskfile *tf, const u8 *cdb, | |
2b789108 TH |
1593 | int dma_dir, void *buf, unsigned int buflen, |
1594 | unsigned long timeout) | |
2432697b | 1595 | { |
33480a0e TH |
1596 | struct scatterlist *psg = NULL, sg; |
1597 | unsigned int n_elem = 0; | |
2432697b | 1598 | |
33480a0e TH |
1599 | if (dma_dir != DMA_NONE) { |
1600 | WARN_ON(!buf); | |
1601 | sg_init_one(&sg, buf, buflen); | |
1602 | psg = &sg; | |
1603 | n_elem++; | |
1604 | } | |
2432697b | 1605 | |
2b789108 TH |
1606 | return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem, |
1607 | timeout); | |
2432697b TH |
1608 | } |
1609 | ||
977e6b9f TH |
1610 | /** |
1611 | * ata_do_simple_cmd - execute simple internal command | |
1612 | * @dev: Device to which the command is sent | |
1613 | * @cmd: Opcode to execute | |
1614 | * | |
1615 | * Execute a 'simple' command, that only consists of the opcode | |
1616 | * 'cmd' itself, without filling any other registers | |
1617 | * | |
1618 | * LOCKING: | |
1619 | * Kernel thread context (may sleep). | |
1620 | * | |
1621 | * RETURNS: | |
1622 | * Zero on success, AC_ERR_* mask on failure | |
e58eb583 | 1623 | */ |
77b08fb5 | 1624 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
e58eb583 TH |
1625 | { |
1626 | struct ata_taskfile tf; | |
e58eb583 TH |
1627 | |
1628 | ata_tf_init(dev, &tf); | |
1629 | ||
1630 | tf.command = cmd; | |
1631 | tf.flags |= ATA_TFLAG_DEVICE; | |
1632 | tf.protocol = ATA_PROT_NODATA; | |
1633 | ||
2b789108 | 1634 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
e58eb583 TH |
1635 | } |
1636 | ||
1bc4ccff AC |
1637 | /** |
1638 | * ata_pio_need_iordy - check if iordy needed | |
1639 | * @adev: ATA device | |
1640 | * | |
1641 | * Check if the current speed of the device requires IORDY. Used | |
1642 | * by various controllers for chip configuration. | |
1643 | */ | |
a617c09f | 1644 | |
1bc4ccff AC |
1645 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) |
1646 | { | |
432729f0 AC |
1647 | /* Controller doesn't support IORDY. Probably a pointless check |
1648 | as the caller should know this */ | |
9af5c9c9 | 1649 | if (adev->link->ap->flags & ATA_FLAG_NO_IORDY) |
1bc4ccff | 1650 | return 0; |
432729f0 AC |
1651 | /* PIO3 and higher it is mandatory */ |
1652 | if (adev->pio_mode > XFER_PIO_2) | |
1653 | return 1; | |
1654 | /* We turn it on when possible */ | |
1655 | if (ata_id_has_iordy(adev->id)) | |
1bc4ccff | 1656 | return 1; |
432729f0 AC |
1657 | return 0; |
1658 | } | |
2e9edbf8 | 1659 | |
432729f0 AC |
1660 | /** |
1661 | * ata_pio_mask_no_iordy - Return the non IORDY mask | |
1662 | * @adev: ATA device | |
1663 | * | |
1664 | * Compute the highest mode possible if we are not using iordy. Return | |
1665 | * -1 if no iordy mode is available. | |
1666 | */ | |
a617c09f | 1667 | |
432729f0 AC |
1668 | static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) |
1669 | { | |
1bc4ccff | 1670 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1bc4ccff | 1671 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ |
432729f0 | 1672 | u16 pio = adev->id[ATA_ID_EIDE_PIO]; |
1bc4ccff AC |
1673 | /* Is the speed faster than the drive allows non IORDY ? */ |
1674 | if (pio) { | |
1675 | /* This is cycle times not frequency - watch the logic! */ | |
1676 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
432729f0 AC |
1677 | return 3 << ATA_SHIFT_PIO; |
1678 | return 7 << ATA_SHIFT_PIO; | |
1bc4ccff AC |
1679 | } |
1680 | } | |
432729f0 | 1681 | return 3 << ATA_SHIFT_PIO; |
1bc4ccff AC |
1682 | } |
1683 | ||
1da177e4 | 1684 | /** |
49016aca | 1685 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1686 | * @dev: target device |
1687 | * @p_class: pointer to class of the target device (may be changed) | |
bff04647 | 1688 | * @flags: ATA_READID_* flags |
fe635c7e | 1689 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1690 | * |
49016aca TH |
1691 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1692 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1693 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1694 | * for pre-ATA4 drives. | |
1da177e4 | 1695 | * |
50a99018 | 1696 | * FIXME: ATA_CMD_ID_ATA is optional for early drives and right |
2dcb407e | 1697 | * now we abort if we hit that case. |
50a99018 | 1698 | * |
1da177e4 | 1699 | * LOCKING: |
49016aca TH |
1700 | * Kernel thread context (may sleep) |
1701 | * | |
1702 | * RETURNS: | |
1703 | * 0 on success, -errno otherwise. | |
1da177e4 | 1704 | */ |
a9beec95 | 1705 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
bff04647 | 1706 | unsigned int flags, u16 *id) |
1da177e4 | 1707 | { |
9af5c9c9 | 1708 | struct ata_port *ap = dev->link->ap; |
49016aca | 1709 | unsigned int class = *p_class; |
a0123703 | 1710 | struct ata_taskfile tf; |
49016aca TH |
1711 | unsigned int err_mask = 0; |
1712 | const char *reason; | |
54936f8b | 1713 | int may_fallback = 1, tried_spinup = 0; |
49016aca | 1714 | int rc; |
1da177e4 | 1715 | |
0dd4b21f | 1716 | if (ata_msg_ctl(ap)) |
44877b4e | 1717 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); |
1da177e4 | 1718 | |
49016aca | 1719 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
49016aca | 1720 | retry: |
3373efd8 | 1721 | ata_tf_init(dev, &tf); |
a0123703 | 1722 | |
49016aca TH |
1723 | switch (class) { |
1724 | case ATA_DEV_ATA: | |
a0123703 | 1725 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1726 | break; |
1727 | case ATA_DEV_ATAPI: | |
a0123703 | 1728 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1729 | break; |
1730 | default: | |
1731 | rc = -ENODEV; | |
1732 | reason = "unsupported class"; | |
1733 | goto err_out; | |
1da177e4 LT |
1734 | } |
1735 | ||
a0123703 | 1736 | tf.protocol = ATA_PROT_PIO; |
81afe893 TH |
1737 | |
1738 | /* Some devices choke if TF registers contain garbage. Make | |
1739 | * sure those are properly initialized. | |
1740 | */ | |
1741 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
1742 | ||
1743 | /* Device presence detection is unreliable on some | |
1744 | * controllers. Always poll IDENTIFY if available. | |
1745 | */ | |
1746 | tf.flags |= ATA_TFLAG_POLLING; | |
1da177e4 | 1747 | |
3373efd8 | 1748 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
2b789108 | 1749 | id, sizeof(id[0]) * ATA_ID_WORDS, 0); |
a0123703 | 1750 | if (err_mask) { |
800b3996 | 1751 | if (err_mask & AC_ERR_NODEV_HINT) { |
55a8e2c8 | 1752 | DPRINTK("ata%u.%d: NODEV after polling detection\n", |
44877b4e | 1753 | ap->print_id, dev->devno); |
55a8e2c8 TH |
1754 | return -ENOENT; |
1755 | } | |
1756 | ||
54936f8b TH |
1757 | /* Device or controller might have reported the wrong |
1758 | * device class. Give a shot at the other IDENTIFY if | |
1759 | * the current one is aborted by the device. | |
1760 | */ | |
1761 | if (may_fallback && | |
1762 | (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { | |
1763 | may_fallback = 0; | |
1764 | ||
1765 | if (class == ATA_DEV_ATA) | |
1766 | class = ATA_DEV_ATAPI; | |
1767 | else | |
1768 | class = ATA_DEV_ATA; | |
1769 | goto retry; | |
1770 | } | |
1771 | ||
49016aca TH |
1772 | rc = -EIO; |
1773 | reason = "I/O error"; | |
1da177e4 LT |
1774 | goto err_out; |
1775 | } | |
1776 | ||
54936f8b TH |
1777 | /* Falling back doesn't make sense if ID data was read |
1778 | * successfully at least once. | |
1779 | */ | |
1780 | may_fallback = 0; | |
1781 | ||
49016aca | 1782 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1783 | |
49016aca | 1784 | /* sanity check */ |
a4f5749b | 1785 | rc = -EINVAL; |
6070068b | 1786 | reason = "device reports invalid type"; |
a4f5749b TH |
1787 | |
1788 | if (class == ATA_DEV_ATA) { | |
1789 | if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) | |
1790 | goto err_out; | |
1791 | } else { | |
1792 | if (ata_id_is_ata(id)) | |
1793 | goto err_out; | |
49016aca TH |
1794 | } |
1795 | ||
169439c2 ML |
1796 | if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { |
1797 | tried_spinup = 1; | |
1798 | /* | |
1799 | * Drive powered-up in standby mode, and requires a specific | |
1800 | * SET_FEATURES spin-up subcommand before it will accept | |
1801 | * anything other than the original IDENTIFY command. | |
1802 | */ | |
218f3d30 | 1803 | err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0); |
fb0582f9 | 1804 | if (err_mask && id[2] != 0x738c) { |
169439c2 ML |
1805 | rc = -EIO; |
1806 | reason = "SPINUP failed"; | |
1807 | goto err_out; | |
1808 | } | |
1809 | /* | |
1810 | * If the drive initially returned incomplete IDENTIFY info, | |
1811 | * we now must reissue the IDENTIFY command. | |
1812 | */ | |
1813 | if (id[2] == 0x37c8) | |
1814 | goto retry; | |
1815 | } | |
1816 | ||
bff04647 | 1817 | if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { |
49016aca TH |
1818 | /* |
1819 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1820 | * SRST RESET | |
50a99018 AC |
1821 | * IDENTIFY (optional in early ATA) |
1822 | * INITIALIZE DEVICE PARAMETERS (later IDE and ATA) | |
49016aca TH |
1823 | * anything else.. |
1824 | * Some drives were very specific about that exact sequence. | |
50a99018 AC |
1825 | * |
1826 | * Note that ATA4 says lba is mandatory so the second check | |
1827 | * shoud never trigger. | |
49016aca TH |
1828 | */ |
1829 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1830 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1831 | if (err_mask) { |
1832 | rc = -EIO; | |
1833 | reason = "INIT_DEV_PARAMS failed"; | |
1834 | goto err_out; | |
1835 | } | |
1836 | ||
1837 | /* current CHS translation info (id[53-58]) might be | |
1838 | * changed. reread the identify device info. | |
1839 | */ | |
bff04647 | 1840 | flags &= ~ATA_READID_POSTRESET; |
49016aca TH |
1841 | goto retry; |
1842 | } | |
1843 | } | |
1844 | ||
1845 | *p_class = class; | |
fe635c7e | 1846 | |
49016aca TH |
1847 | return 0; |
1848 | ||
1849 | err_out: | |
88574551 | 1850 | if (ata_msg_warn(ap)) |
0dd4b21f | 1851 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
88574551 | 1852 | "(%s, err_mask=0x%x)\n", reason, err_mask); |
49016aca TH |
1853 | return rc; |
1854 | } | |
1855 | ||
3373efd8 | 1856 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1857 | { |
9af5c9c9 TH |
1858 | struct ata_port *ap = dev->link->ap; |
1859 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); | |
4b2f3ede TH |
1860 | } |
1861 | ||
a6e6ce8e TH |
1862 | static void ata_dev_config_ncq(struct ata_device *dev, |
1863 | char *desc, size_t desc_sz) | |
1864 | { | |
9af5c9c9 | 1865 | struct ata_port *ap = dev->link->ap; |
a6e6ce8e TH |
1866 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); |
1867 | ||
1868 | if (!ata_id_has_ncq(dev->id)) { | |
1869 | desc[0] = '\0'; | |
1870 | return; | |
1871 | } | |
75683fe7 | 1872 | if (dev->horkage & ATA_HORKAGE_NONCQ) { |
6919a0a6 AC |
1873 | snprintf(desc, desc_sz, "NCQ (not used)"); |
1874 | return; | |
1875 | } | |
a6e6ce8e | 1876 | if (ap->flags & ATA_FLAG_NCQ) { |
cca3974e | 1877 | hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); |
a6e6ce8e TH |
1878 | dev->flags |= ATA_DFLAG_NCQ; |
1879 | } | |
1880 | ||
1881 | if (hdepth >= ddepth) | |
1882 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1883 | else | |
1884 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1885 | } | |
1886 | ||
49016aca | 1887 | /** |
ffeae418 | 1888 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 TH |
1889 | * @dev: Target device to configure |
1890 | * | |
1891 | * Configure @dev according to @dev->id. Generic and low-level | |
1892 | * driver specific fixups are also applied. | |
49016aca TH |
1893 | * |
1894 | * LOCKING: | |
ffeae418 TH |
1895 | * Kernel thread context (may sleep) |
1896 | * | |
1897 | * RETURNS: | |
1898 | * 0 on success, -errno otherwise | |
49016aca | 1899 | */ |
efdaedc4 | 1900 | int ata_dev_configure(struct ata_device *dev) |
49016aca | 1901 | { |
9af5c9c9 TH |
1902 | struct ata_port *ap = dev->link->ap; |
1903 | struct ata_eh_context *ehc = &dev->link->eh_context; | |
6746544c | 1904 | int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; |
1148c3a7 | 1905 | const u16 *id = dev->id; |
ff8854b2 | 1906 | unsigned int xfer_mask; |
b352e57d | 1907 | char revbuf[7]; /* XYZ-99\0 */ |
3f64f565 EM |
1908 | char fwrevbuf[ATA_ID_FW_REV_LEN+1]; |
1909 | char modelbuf[ATA_ID_PROD_LEN+1]; | |
e6d902a3 | 1910 | int rc; |
49016aca | 1911 | |
0dd4b21f | 1912 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { |
44877b4e TH |
1913 | ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", |
1914 | __FUNCTION__); | |
ffeae418 | 1915 | return 0; |
49016aca TH |
1916 | } |
1917 | ||
0dd4b21f | 1918 | if (ata_msg_probe(ap)) |
44877b4e | 1919 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); |
1da177e4 | 1920 | |
75683fe7 TH |
1921 | /* set horkage */ |
1922 | dev->horkage |= ata_dev_blacklisted(dev); | |
1923 | ||
6746544c TH |
1924 | /* let ACPI work its magic */ |
1925 | rc = ata_acpi_on_devcfg(dev); | |
1926 | if (rc) | |
1927 | return rc; | |
08573a86 | 1928 | |
05027adc TH |
1929 | /* massage HPA, do it early as it might change IDENTIFY data */ |
1930 | rc = ata_hpa_resize(dev); | |
1931 | if (rc) | |
1932 | return rc; | |
1933 | ||
c39f5ebe | 1934 | /* print device capabilities */ |
0dd4b21f | 1935 | if (ata_msg_probe(ap)) |
88574551 TH |
1936 | ata_dev_printk(dev, KERN_DEBUG, |
1937 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
1938 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
0dd4b21f | 1939 | __FUNCTION__, |
f15a1daf TH |
1940 | id[49], id[82], id[83], id[84], |
1941 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1942 | |
208a9933 | 1943 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1944 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1945 | dev->max_sectors = 0; |
1946 | dev->cdb_len = 0; | |
1947 | dev->n_sectors = 0; | |
1948 | dev->cylinders = 0; | |
1949 | dev->heads = 0; | |
1950 | dev->sectors = 0; | |
1951 | ||
1da177e4 LT |
1952 | /* |
1953 | * common ATA, ATAPI feature tests | |
1954 | */ | |
1955 | ||
ff8854b2 | 1956 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1957 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1958 | |
0dd4b21f BP |
1959 | if (ata_msg_probe(ap)) |
1960 | ata_dump_id(id); | |
1da177e4 | 1961 | |
ef143d57 AL |
1962 | /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ |
1963 | ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, | |
1964 | sizeof(fwrevbuf)); | |
1965 | ||
1966 | ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, | |
1967 | sizeof(modelbuf)); | |
1968 | ||
1da177e4 LT |
1969 | /* ATA-specific feature tests */ |
1970 | if (dev->class == ATA_DEV_ATA) { | |
b352e57d AC |
1971 | if (ata_id_is_cfa(id)) { |
1972 | if (id[162] & 1) /* CPRM may make this media unusable */ | |
44877b4e TH |
1973 | ata_dev_printk(dev, KERN_WARNING, |
1974 | "supports DRM functions and may " | |
1975 | "not be fully accessable.\n"); | |
b352e57d | 1976 | snprintf(revbuf, 7, "CFA"); |
2dcb407e JG |
1977 | } else |
1978 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | |
b352e57d | 1979 | |
1148c3a7 | 1980 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1981 | |
3f64f565 EM |
1982 | if (dev->id[59] & 0x100) |
1983 | dev->multi_count = dev->id[59] & 0xff; | |
1984 | ||
1148c3a7 | 1985 | if (ata_id_has_lba(id)) { |
4c2d721a | 1986 | const char *lba_desc; |
a6e6ce8e | 1987 | char ncq_desc[20]; |
8bf62ece | 1988 | |
4c2d721a TH |
1989 | lba_desc = "LBA"; |
1990 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1991 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1992 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a | 1993 | lba_desc = "LBA48"; |
6fc49adb TH |
1994 | |
1995 | if (dev->n_sectors >= (1UL << 28) && | |
1996 | ata_id_has_flush_ext(id)) | |
1997 | dev->flags |= ATA_DFLAG_FLUSH_EXT; | |
4c2d721a | 1998 | } |
8bf62ece | 1999 | |
a6e6ce8e TH |
2000 | /* config NCQ */ |
2001 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
2002 | ||
8bf62ece | 2003 | /* print device info to dmesg */ |
3f64f565 EM |
2004 | if (ata_msg_drv(ap) && print_info) { |
2005 | ata_dev_printk(dev, KERN_INFO, | |
2006 | "%s: %s, %s, max %s\n", | |
2007 | revbuf, modelbuf, fwrevbuf, | |
2008 | ata_mode_string(xfer_mask)); | |
2009 | ata_dev_printk(dev, KERN_INFO, | |
2010 | "%Lu sectors, multi %u: %s %s\n", | |
f15a1daf | 2011 | (unsigned long long)dev->n_sectors, |
3f64f565 EM |
2012 | dev->multi_count, lba_desc, ncq_desc); |
2013 | } | |
ffeae418 | 2014 | } else { |
8bf62ece AL |
2015 | /* CHS */ |
2016 | ||
2017 | /* Default translation */ | |
1148c3a7 TH |
2018 | dev->cylinders = id[1]; |
2019 | dev->heads = id[3]; | |
2020 | dev->sectors = id[6]; | |
8bf62ece | 2021 | |
1148c3a7 | 2022 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 2023 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
2024 | dev->cylinders = id[54]; |
2025 | dev->heads = id[55]; | |
2026 | dev->sectors = id[56]; | |
8bf62ece AL |
2027 | } |
2028 | ||
2029 | /* print device info to dmesg */ | |
3f64f565 | 2030 | if (ata_msg_drv(ap) && print_info) { |
88574551 | 2031 | ata_dev_printk(dev, KERN_INFO, |
3f64f565 EM |
2032 | "%s: %s, %s, max %s\n", |
2033 | revbuf, modelbuf, fwrevbuf, | |
2034 | ata_mode_string(xfer_mask)); | |
a84471fe | 2035 | ata_dev_printk(dev, KERN_INFO, |
3f64f565 EM |
2036 | "%Lu sectors, multi %u, CHS %u/%u/%u\n", |
2037 | (unsigned long long)dev->n_sectors, | |
2038 | dev->multi_count, dev->cylinders, | |
2039 | dev->heads, dev->sectors); | |
2040 | } | |
07f6f7d0 AL |
2041 | } |
2042 | ||
6e7846e9 | 2043 | dev->cdb_len = 16; |
1da177e4 LT |
2044 | } |
2045 | ||
2046 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 2047 | else if (dev->class == ATA_DEV_ATAPI) { |
854c73a2 TH |
2048 | const char *cdb_intr_string = ""; |
2049 | const char *atapi_an_string = ""; | |
7d77b247 | 2050 | u32 sntf; |
08a556db | 2051 | |
1148c3a7 | 2052 | rc = atapi_cdb_len(id); |
1da177e4 | 2053 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
0dd4b21f | 2054 | if (ata_msg_warn(ap)) |
88574551 TH |
2055 | ata_dev_printk(dev, KERN_WARNING, |
2056 | "unsupported CDB len\n"); | |
ffeae418 | 2057 | rc = -EINVAL; |
1da177e4 LT |
2058 | goto err_out_nosup; |
2059 | } | |
6e7846e9 | 2060 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 2061 | |
7d77b247 TH |
2062 | /* Enable ATAPI AN if both the host and device have |
2063 | * the support. If PMP is attached, SNTF is required | |
2064 | * to enable ATAPI AN to discern between PHY status | |
2065 | * changed notifications and ATAPI ANs. | |
9f45cbd3 | 2066 | */ |
7d77b247 TH |
2067 | if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) && |
2068 | (!ap->nr_pmp_links || | |
2069 | sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) { | |
854c73a2 TH |
2070 | unsigned int err_mask; |
2071 | ||
9f45cbd3 | 2072 | /* issue SET feature command to turn this on */ |
218f3d30 JG |
2073 | err_mask = ata_dev_set_feature(dev, |
2074 | SETFEATURES_SATA_ENABLE, SATA_AN); | |
854c73a2 | 2075 | if (err_mask) |
9f45cbd3 | 2076 | ata_dev_printk(dev, KERN_ERR, |
854c73a2 TH |
2077 | "failed to enable ATAPI AN " |
2078 | "(err_mask=0x%x)\n", err_mask); | |
2079 | else { | |
9f45cbd3 | 2080 | dev->flags |= ATA_DFLAG_AN; |
854c73a2 TH |
2081 | atapi_an_string = ", ATAPI AN"; |
2082 | } | |
9f45cbd3 KCA |
2083 | } |
2084 | ||
08a556db | 2085 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 2086 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
2087 | cdb_intr_string = ", CDB intr"; |
2088 | } | |
312f7da2 | 2089 | |
1da177e4 | 2090 | /* print device info to dmesg */ |
5afc8142 | 2091 | if (ata_msg_drv(ap) && print_info) |
ef143d57 | 2092 | ata_dev_printk(dev, KERN_INFO, |
854c73a2 | 2093 | "ATAPI: %s, %s, max %s%s%s\n", |
ef143d57 | 2094 | modelbuf, fwrevbuf, |
12436c30 | 2095 | ata_mode_string(xfer_mask), |
854c73a2 | 2096 | cdb_intr_string, atapi_an_string); |
1da177e4 LT |
2097 | } |
2098 | ||
914ed354 TH |
2099 | /* determine max_sectors */ |
2100 | dev->max_sectors = ATA_MAX_SECTORS; | |
2101 | if (dev->flags & ATA_DFLAG_LBA48) | |
2102 | dev->max_sectors = ATA_MAX_SECTORS_LBA48; | |
2103 | ||
93590859 AC |
2104 | if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { |
2105 | /* Let the user know. We don't want to disallow opens for | |
2106 | rescue purposes, or in case the vendor is just a blithering | |
2107 | idiot */ | |
2dcb407e | 2108 | if (print_info) { |
93590859 AC |
2109 | ata_dev_printk(dev, KERN_WARNING, |
2110 | "Drive reports diagnostics failure. This may indicate a drive\n"); | |
2111 | ata_dev_printk(dev, KERN_WARNING, | |
2112 | "fault or invalid emulation. Contact drive vendor for information.\n"); | |
2113 | } | |
2114 | } | |
2115 | ||
4b2f3ede | 2116 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 2117 | if (ata_dev_knobble(dev)) { |
5afc8142 | 2118 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
2119 | ata_dev_printk(dev, KERN_INFO, |
2120 | "applying bridge limits\n"); | |
5a529139 | 2121 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
2122 | dev->max_sectors = ATA_MAX_SECTORS; |
2123 | } | |
2124 | ||
75683fe7 | 2125 | if (dev->horkage & ATA_HORKAGE_MAX_SEC_128) |
03ec52de TH |
2126 | dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, |
2127 | dev->max_sectors); | |
18d6e9d5 | 2128 | |
4b2f3ede | 2129 | if (ap->ops->dev_config) |
cd0d3bbc | 2130 | ap->ops->dev_config(dev); |
4b2f3ede | 2131 | |
0dd4b21f BP |
2132 | if (ata_msg_probe(ap)) |
2133 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
2134 | __FUNCTION__, ata_chk_status(ap)); | |
ffeae418 | 2135 | return 0; |
1da177e4 LT |
2136 | |
2137 | err_out_nosup: | |
0dd4b21f | 2138 | if (ata_msg_probe(ap)) |
88574551 TH |
2139 | ata_dev_printk(dev, KERN_DEBUG, |
2140 | "%s: EXIT, err\n", __FUNCTION__); | |
ffeae418 | 2141 | return rc; |
1da177e4 LT |
2142 | } |
2143 | ||
be0d18df | 2144 | /** |
2e41e8e6 | 2145 | * ata_cable_40wire - return 40 wire cable type |
be0d18df AC |
2146 | * @ap: port |
2147 | * | |
2e41e8e6 | 2148 | * Helper method for drivers which want to hardwire 40 wire cable |
be0d18df AC |
2149 | * detection. |
2150 | */ | |
2151 | ||
2152 | int ata_cable_40wire(struct ata_port *ap) | |
2153 | { | |
2154 | return ATA_CBL_PATA40; | |
2155 | } | |
2156 | ||
2157 | /** | |
2e41e8e6 | 2158 | * ata_cable_80wire - return 80 wire cable type |
be0d18df AC |
2159 | * @ap: port |
2160 | * | |
2e41e8e6 | 2161 | * Helper method for drivers which want to hardwire 80 wire cable |
be0d18df AC |
2162 | * detection. |
2163 | */ | |
2164 | ||
2165 | int ata_cable_80wire(struct ata_port *ap) | |
2166 | { | |
2167 | return ATA_CBL_PATA80; | |
2168 | } | |
2169 | ||
2170 | /** | |
2171 | * ata_cable_unknown - return unknown PATA cable. | |
2172 | * @ap: port | |
2173 | * | |
2174 | * Helper method for drivers which have no PATA cable detection. | |
2175 | */ | |
2176 | ||
2177 | int ata_cable_unknown(struct ata_port *ap) | |
2178 | { | |
2179 | return ATA_CBL_PATA_UNK; | |
2180 | } | |
2181 | ||
2182 | /** | |
2183 | * ata_cable_sata - return SATA cable type | |
2184 | * @ap: port | |
2185 | * | |
2186 | * Helper method for drivers which have SATA cables | |
2187 | */ | |
2188 | ||
2189 | int ata_cable_sata(struct ata_port *ap) | |
2190 | { | |
2191 | return ATA_CBL_SATA; | |
2192 | } | |
2193 | ||
1da177e4 LT |
2194 | /** |
2195 | * ata_bus_probe - Reset and probe ATA bus | |
2196 | * @ap: Bus to probe | |
2197 | * | |
0cba632b JG |
2198 | * Master ATA bus probing function. Initiates a hardware-dependent |
2199 | * bus reset, then attempts to identify any devices found on | |
2200 | * the bus. | |
2201 | * | |
1da177e4 | 2202 | * LOCKING: |
0cba632b | 2203 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2204 | * |
2205 | * RETURNS: | |
96072e69 | 2206 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
2207 | */ |
2208 | ||
80289167 | 2209 | int ata_bus_probe(struct ata_port *ap) |
1da177e4 | 2210 | { |
28ca5c57 | 2211 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 | 2212 | int tries[ATA_MAX_DEVICES]; |
f58229f8 | 2213 | int rc; |
e82cbdb9 | 2214 | struct ata_device *dev; |
1da177e4 | 2215 | |
28ca5c57 | 2216 | ata_port_probe(ap); |
c19ba8af | 2217 | |
f58229f8 TH |
2218 | ata_link_for_each_dev(dev, &ap->link) |
2219 | tries[dev->devno] = ATA_PROBE_MAX_TRIES; | |
14d2bac1 TH |
2220 | |
2221 | retry: | |
2044470c | 2222 | /* reset and determine device classes */ |
52783c5d | 2223 | ap->ops->phy_reset(ap); |
2061a47a | 2224 | |
f58229f8 | 2225 | ata_link_for_each_dev(dev, &ap->link) { |
52783c5d TH |
2226 | if (!(ap->flags & ATA_FLAG_DISABLED) && |
2227 | dev->class != ATA_DEV_UNKNOWN) | |
2228 | classes[dev->devno] = dev->class; | |
2229 | else | |
2230 | classes[dev->devno] = ATA_DEV_NONE; | |
2044470c | 2231 | |
52783c5d | 2232 | dev->class = ATA_DEV_UNKNOWN; |
28ca5c57 | 2233 | } |
1da177e4 | 2234 | |
52783c5d | 2235 | ata_port_probe(ap); |
2044470c | 2236 | |
b6079ca4 AC |
2237 | /* after the reset the device state is PIO 0 and the controller |
2238 | state is undefined. Record the mode */ | |
2239 | ||
f58229f8 TH |
2240 | ata_link_for_each_dev(dev, &ap->link) |
2241 | dev->pio_mode = XFER_PIO_0; | |
b6079ca4 | 2242 | |
f31f0cc2 JG |
2243 | /* read IDENTIFY page and configure devices. We have to do the identify |
2244 | specific sequence bass-ackwards so that PDIAG- is released by | |
2245 | the slave device */ | |
2246 | ||
f58229f8 TH |
2247 | ata_link_for_each_dev(dev, &ap->link) { |
2248 | if (tries[dev->devno]) | |
2249 | dev->class = classes[dev->devno]; | |
ffeae418 | 2250 | |
14d2bac1 | 2251 | if (!ata_dev_enabled(dev)) |
ffeae418 | 2252 | continue; |
ffeae418 | 2253 | |
bff04647 TH |
2254 | rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, |
2255 | dev->id); | |
14d2bac1 TH |
2256 | if (rc) |
2257 | goto fail; | |
f31f0cc2 JG |
2258 | } |
2259 | ||
be0d18df AC |
2260 | /* Now ask for the cable type as PDIAG- should have been released */ |
2261 | if (ap->ops->cable_detect) | |
2262 | ap->cbl = ap->ops->cable_detect(ap); | |
2263 | ||
614fe29b AC |
2264 | /* We may have SATA bridge glue hiding here irrespective of the |
2265 | reported cable types and sensed types */ | |
2266 | ata_link_for_each_dev(dev, &ap->link) { | |
2267 | if (!ata_dev_enabled(dev)) | |
2268 | continue; | |
2269 | /* SATA drives indicate we have a bridge. We don't know which | |
2270 | end of the link the bridge is which is a problem */ | |
2271 | if (ata_id_is_sata(dev->id)) | |
2272 | ap->cbl = ATA_CBL_SATA; | |
2273 | } | |
2274 | ||
f31f0cc2 JG |
2275 | /* After the identify sequence we can now set up the devices. We do |
2276 | this in the normal order so that the user doesn't get confused */ | |
2277 | ||
f58229f8 | 2278 | ata_link_for_each_dev(dev, &ap->link) { |
f31f0cc2 JG |
2279 | if (!ata_dev_enabled(dev)) |
2280 | continue; | |
14d2bac1 | 2281 | |
9af5c9c9 | 2282 | ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO; |
efdaedc4 | 2283 | rc = ata_dev_configure(dev); |
9af5c9c9 | 2284 | ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO; |
14d2bac1 TH |
2285 | if (rc) |
2286 | goto fail; | |
1da177e4 LT |
2287 | } |
2288 | ||
e82cbdb9 | 2289 | /* configure transfer mode */ |
0260731f | 2290 | rc = ata_set_mode(&ap->link, &dev); |
4ae72a1e | 2291 | if (rc) |
51713d35 | 2292 | goto fail; |
1da177e4 | 2293 | |
f58229f8 TH |
2294 | ata_link_for_each_dev(dev, &ap->link) |
2295 | if (ata_dev_enabled(dev)) | |
e82cbdb9 | 2296 | return 0; |
1da177e4 | 2297 | |
e82cbdb9 TH |
2298 | /* no device present, disable port */ |
2299 | ata_port_disable(ap); | |
96072e69 | 2300 | return -ENODEV; |
14d2bac1 TH |
2301 | |
2302 | fail: | |
4ae72a1e TH |
2303 | tries[dev->devno]--; |
2304 | ||
14d2bac1 TH |
2305 | switch (rc) { |
2306 | case -EINVAL: | |
4ae72a1e | 2307 | /* eeek, something went very wrong, give up */ |
14d2bac1 TH |
2308 | tries[dev->devno] = 0; |
2309 | break; | |
4ae72a1e TH |
2310 | |
2311 | case -ENODEV: | |
2312 | /* give it just one more chance */ | |
2313 | tries[dev->devno] = min(tries[dev->devno], 1); | |
14d2bac1 | 2314 | case -EIO: |
4ae72a1e TH |
2315 | if (tries[dev->devno] == 1) { |
2316 | /* This is the last chance, better to slow | |
2317 | * down than lose it. | |
2318 | */ | |
936fd732 | 2319 | sata_down_spd_limit(&ap->link); |
4ae72a1e TH |
2320 | ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); |
2321 | } | |
14d2bac1 TH |
2322 | } |
2323 | ||
4ae72a1e | 2324 | if (!tries[dev->devno]) |
3373efd8 | 2325 | ata_dev_disable(dev); |
ec573755 | 2326 | |
14d2bac1 | 2327 | goto retry; |
1da177e4 LT |
2328 | } |
2329 | ||
2330 | /** | |
0cba632b JG |
2331 | * ata_port_probe - Mark port as enabled |
2332 | * @ap: Port for which we indicate enablement | |
1da177e4 | 2333 | * |
0cba632b JG |
2334 | * Modify @ap data structure such that the system |
2335 | * thinks that the entire port is enabled. | |
2336 | * | |
cca3974e | 2337 | * LOCKING: host lock, or some other form of |
0cba632b | 2338 | * serialization. |
1da177e4 LT |
2339 | */ |
2340 | ||
2341 | void ata_port_probe(struct ata_port *ap) | |
2342 | { | |
198e0fed | 2343 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
2344 | } |
2345 | ||
3be680b7 TH |
2346 | /** |
2347 | * sata_print_link_status - Print SATA link status | |
936fd732 | 2348 | * @link: SATA link to printk link status about |
3be680b7 TH |
2349 | * |
2350 | * This function prints link speed and status of a SATA link. | |
2351 | * | |
2352 | * LOCKING: | |
2353 | * None. | |
2354 | */ | |
936fd732 | 2355 | void sata_print_link_status(struct ata_link *link) |
3be680b7 | 2356 | { |
6d5f9732 | 2357 | u32 sstatus, scontrol, tmp; |
3be680b7 | 2358 | |
936fd732 | 2359 | if (sata_scr_read(link, SCR_STATUS, &sstatus)) |
3be680b7 | 2360 | return; |
936fd732 | 2361 | sata_scr_read(link, SCR_CONTROL, &scontrol); |
3be680b7 | 2362 | |
936fd732 | 2363 | if (ata_link_online(link)) { |
3be680b7 | 2364 | tmp = (sstatus >> 4) & 0xf; |
936fd732 | 2365 | ata_link_printk(link, KERN_INFO, |
f15a1daf TH |
2366 | "SATA link up %s (SStatus %X SControl %X)\n", |
2367 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 2368 | } else { |
936fd732 | 2369 | ata_link_printk(link, KERN_INFO, |
f15a1daf TH |
2370 | "SATA link down (SStatus %X SControl %X)\n", |
2371 | sstatus, scontrol); | |
3be680b7 TH |
2372 | } |
2373 | } | |
2374 | ||
1da177e4 | 2375 | /** |
780a87f7 JG |
2376 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
2377 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2378 | * |
780a87f7 JG |
2379 | * This function issues commands to standard SATA Sxxx |
2380 | * PHY registers, to wake up the phy (and device), and | |
2381 | * clear any reset condition. | |
1da177e4 LT |
2382 | * |
2383 | * LOCKING: | |
0cba632b | 2384 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2385 | * |
2386 | */ | |
2387 | void __sata_phy_reset(struct ata_port *ap) | |
2388 | { | |
936fd732 | 2389 | struct ata_link *link = &ap->link; |
1da177e4 | 2390 | unsigned long timeout = jiffies + (HZ * 5); |
936fd732 | 2391 | u32 sstatus; |
1da177e4 LT |
2392 | |
2393 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 2394 | /* issue phy wake/reset */ |
936fd732 | 2395 | sata_scr_write_flush(link, SCR_CONTROL, 0x301); |
62ba2841 TH |
2396 | /* Couldn't find anything in SATA I/II specs, but |
2397 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
2398 | mdelay(1); | |
1da177e4 | 2399 | } |
81952c54 | 2400 | /* phy wake/clear reset */ |
936fd732 | 2401 | sata_scr_write_flush(link, SCR_CONTROL, 0x300); |
1da177e4 LT |
2402 | |
2403 | /* wait for phy to become ready, if necessary */ | |
2404 | do { | |
2405 | msleep(200); | |
936fd732 | 2406 | sata_scr_read(link, SCR_STATUS, &sstatus); |
1da177e4 LT |
2407 | if ((sstatus & 0xf) != 1) |
2408 | break; | |
2409 | } while (time_before(jiffies, timeout)); | |
2410 | ||
3be680b7 | 2411 | /* print link status */ |
936fd732 | 2412 | sata_print_link_status(link); |
656563e3 | 2413 | |
3be680b7 | 2414 | /* TODO: phy layer with polling, timeouts, etc. */ |
936fd732 | 2415 | if (!ata_link_offline(link)) |
1da177e4 | 2416 | ata_port_probe(ap); |
3be680b7 | 2417 | else |
1da177e4 | 2418 | ata_port_disable(ap); |
1da177e4 | 2419 | |
198e0fed | 2420 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2421 | return; |
2422 | ||
2423 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
2424 | ata_port_disable(ap); | |
2425 | return; | |
2426 | } | |
2427 | ||
2428 | ap->cbl = ATA_CBL_SATA; | |
2429 | } | |
2430 | ||
2431 | /** | |
780a87f7 JG |
2432 | * sata_phy_reset - Reset SATA bus. |
2433 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2434 | * |
780a87f7 JG |
2435 | * This function resets the SATA bus, and then probes |
2436 | * the bus for devices. | |
1da177e4 LT |
2437 | * |
2438 | * LOCKING: | |
0cba632b | 2439 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2440 | * |
2441 | */ | |
2442 | void sata_phy_reset(struct ata_port *ap) | |
2443 | { | |
2444 | __sata_phy_reset(ap); | |
198e0fed | 2445 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2446 | return; |
2447 | ata_bus_reset(ap); | |
2448 | } | |
2449 | ||
ebdfca6e AC |
2450 | /** |
2451 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
2452 | * @adev: device |
2453 | * | |
2454 | * Obtain the other device on the same cable, or if none is | |
2455 | * present NULL is returned | |
2456 | */ | |
2e9edbf8 | 2457 | |
3373efd8 | 2458 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 2459 | { |
9af5c9c9 TH |
2460 | struct ata_link *link = adev->link; |
2461 | struct ata_device *pair = &link->device[1 - adev->devno]; | |
e1211e3f | 2462 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
2463 | return NULL; |
2464 | return pair; | |
2465 | } | |
2466 | ||
1da177e4 | 2467 | /** |
780a87f7 JG |
2468 | * ata_port_disable - Disable port. |
2469 | * @ap: Port to be disabled. | |
1da177e4 | 2470 | * |
780a87f7 JG |
2471 | * Modify @ap data structure such that the system |
2472 | * thinks that the entire port is disabled, and should | |
2473 | * never attempt to probe or communicate with devices | |
2474 | * on this port. | |
2475 | * | |
cca3974e | 2476 | * LOCKING: host lock, or some other form of |
780a87f7 | 2477 | * serialization. |
1da177e4 LT |
2478 | */ |
2479 | ||
2480 | void ata_port_disable(struct ata_port *ap) | |
2481 | { | |
9af5c9c9 TH |
2482 | ap->link.device[0].class = ATA_DEV_NONE; |
2483 | ap->link.device[1].class = ATA_DEV_NONE; | |
198e0fed | 2484 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
2485 | } |
2486 | ||
1c3fae4d | 2487 | /** |
3c567b7d | 2488 | * sata_down_spd_limit - adjust SATA spd limit downward |
936fd732 | 2489 | * @link: Link to adjust SATA spd limit for |
1c3fae4d | 2490 | * |
936fd732 | 2491 | * Adjust SATA spd limit of @link downward. Note that this |
1c3fae4d | 2492 | * function only adjusts the limit. The change must be applied |
3c567b7d | 2493 | * using sata_set_spd(). |
1c3fae4d TH |
2494 | * |
2495 | * LOCKING: | |
2496 | * Inherited from caller. | |
2497 | * | |
2498 | * RETURNS: | |
2499 | * 0 on success, negative errno on failure | |
2500 | */ | |
936fd732 | 2501 | int sata_down_spd_limit(struct ata_link *link) |
1c3fae4d | 2502 | { |
81952c54 TH |
2503 | u32 sstatus, spd, mask; |
2504 | int rc, highbit; | |
1c3fae4d | 2505 | |
936fd732 | 2506 | if (!sata_scr_valid(link)) |
008a7896 TH |
2507 | return -EOPNOTSUPP; |
2508 | ||
2509 | /* If SCR can be read, use it to determine the current SPD. | |
936fd732 | 2510 | * If not, use cached value in link->sata_spd. |
008a7896 | 2511 | */ |
936fd732 | 2512 | rc = sata_scr_read(link, SCR_STATUS, &sstatus); |
008a7896 TH |
2513 | if (rc == 0) |
2514 | spd = (sstatus >> 4) & 0xf; | |
2515 | else | |
936fd732 | 2516 | spd = link->sata_spd; |
1c3fae4d | 2517 | |
936fd732 | 2518 | mask = link->sata_spd_limit; |
1c3fae4d TH |
2519 | if (mask <= 1) |
2520 | return -EINVAL; | |
008a7896 TH |
2521 | |
2522 | /* unconditionally mask off the highest bit */ | |
1c3fae4d TH |
2523 | highbit = fls(mask) - 1; |
2524 | mask &= ~(1 << highbit); | |
2525 | ||
008a7896 TH |
2526 | /* Mask off all speeds higher than or equal to the current |
2527 | * one. Force 1.5Gbps if current SPD is not available. | |
2528 | */ | |
2529 | if (spd > 1) | |
2530 | mask &= (1 << (spd - 1)) - 1; | |
2531 | else | |
2532 | mask &= 1; | |
2533 | ||
2534 | /* were we already at the bottom? */ | |
1c3fae4d TH |
2535 | if (!mask) |
2536 | return -EINVAL; | |
2537 | ||
936fd732 | 2538 | link->sata_spd_limit = mask; |
1c3fae4d | 2539 | |
936fd732 | 2540 | ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n", |
f15a1daf | 2541 | sata_spd_string(fls(mask))); |
1c3fae4d TH |
2542 | |
2543 | return 0; | |
2544 | } | |
2545 | ||
936fd732 | 2546 | static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol) |
1c3fae4d TH |
2547 | { |
2548 | u32 spd, limit; | |
2549 | ||
936fd732 | 2550 | if (link->sata_spd_limit == UINT_MAX) |
1c3fae4d TH |
2551 | limit = 0; |
2552 | else | |
936fd732 | 2553 | limit = fls(link->sata_spd_limit); |
1c3fae4d TH |
2554 | |
2555 | spd = (*scontrol >> 4) & 0xf; | |
2556 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
2557 | ||
2558 | return spd != limit; | |
2559 | } | |
2560 | ||
2561 | /** | |
3c567b7d | 2562 | * sata_set_spd_needed - is SATA spd configuration needed |
936fd732 | 2563 | * @link: Link in question |
1c3fae4d TH |
2564 | * |
2565 | * Test whether the spd limit in SControl matches | |
936fd732 | 2566 | * @link->sata_spd_limit. This function is used to determine |
1c3fae4d TH |
2567 | * whether hardreset is necessary to apply SATA spd |
2568 | * configuration. | |
2569 | * | |
2570 | * LOCKING: | |
2571 | * Inherited from caller. | |
2572 | * | |
2573 | * RETURNS: | |
2574 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
2575 | */ | |
936fd732 | 2576 | int sata_set_spd_needed(struct ata_link *link) |
1c3fae4d TH |
2577 | { |
2578 | u32 scontrol; | |
2579 | ||
936fd732 | 2580 | if (sata_scr_read(link, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
2581 | return 0; |
2582 | ||
936fd732 | 2583 | return __sata_set_spd_needed(link, &scontrol); |
1c3fae4d TH |
2584 | } |
2585 | ||
2586 | /** | |
3c567b7d | 2587 | * sata_set_spd - set SATA spd according to spd limit |
936fd732 | 2588 | * @link: Link to set SATA spd for |
1c3fae4d | 2589 | * |
936fd732 | 2590 | * Set SATA spd of @link according to sata_spd_limit. |
1c3fae4d TH |
2591 | * |
2592 | * LOCKING: | |
2593 | * Inherited from caller. | |
2594 | * | |
2595 | * RETURNS: | |
2596 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 2597 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 2598 | */ |
936fd732 | 2599 | int sata_set_spd(struct ata_link *link) |
1c3fae4d TH |
2600 | { |
2601 | u32 scontrol; | |
81952c54 | 2602 | int rc; |
1c3fae4d | 2603 | |
936fd732 | 2604 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
81952c54 | 2605 | return rc; |
1c3fae4d | 2606 | |
936fd732 | 2607 | if (!__sata_set_spd_needed(link, &scontrol)) |
1c3fae4d TH |
2608 | return 0; |
2609 | ||
936fd732 | 2610 | if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) |
81952c54 TH |
2611 | return rc; |
2612 | ||
1c3fae4d TH |
2613 | return 1; |
2614 | } | |
2615 | ||
452503f9 AC |
2616 | /* |
2617 | * This mode timing computation functionality is ported over from | |
2618 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
2619 | */ | |
2620 | /* | |
b352e57d | 2621 | * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). |
452503f9 | 2622 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except |
b352e57d AC |
2623 | * for UDMA6, which is currently supported only by Maxtor drives. |
2624 | * | |
2625 | * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. | |
452503f9 AC |
2626 | */ |
2627 | ||
2628 | static const struct ata_timing ata_timing[] = { | |
2629 | ||
2630 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
2631 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
2632 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
2633 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
2634 | ||
b352e57d AC |
2635 | { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, |
2636 | { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, | |
452503f9 AC |
2637 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, |
2638 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
2639 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
2640 | ||
2641 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 2642 | |
452503f9 AC |
2643 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
2644 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
2645 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 2646 | |
452503f9 AC |
2647 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
2648 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
2649 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
2650 | ||
b352e57d AC |
2651 | { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, |
2652 | { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, | |
452503f9 AC |
2653 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, |
2654 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
2655 | ||
2656 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
2657 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
2658 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
2659 | ||
2660 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
2661 | ||
2662 | { 0xFF } | |
2663 | }; | |
2664 | ||
2dcb407e JG |
2665 | #define ENOUGH(v, unit) (((v)-1)/(unit)+1) |
2666 | #define EZ(v, unit) ((v)?ENOUGH(v, unit):0) | |
452503f9 AC |
2667 | |
2668 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
2669 | { | |
2670 | q->setup = EZ(t->setup * 1000, T); | |
2671 | q->act8b = EZ(t->act8b * 1000, T); | |
2672 | q->rec8b = EZ(t->rec8b * 1000, T); | |
2673 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
2674 | q->active = EZ(t->active * 1000, T); | |
2675 | q->recover = EZ(t->recover * 1000, T); | |
2676 | q->cycle = EZ(t->cycle * 1000, T); | |
2677 | q->udma = EZ(t->udma * 1000, UT); | |
2678 | } | |
2679 | ||
2680 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
2681 | struct ata_timing *m, unsigned int what) | |
2682 | { | |
2683 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
2684 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
2685 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
2686 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
2687 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
2688 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
2689 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
2690 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
2691 | } | |
2692 | ||
2dcb407e | 2693 | static const struct ata_timing *ata_timing_find_mode(unsigned short speed) |
452503f9 AC |
2694 | { |
2695 | const struct ata_timing *t; | |
2696 | ||
2697 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 2698 | if (t->mode == 0xFF) |
452503f9 | 2699 | return NULL; |
2e9edbf8 | 2700 | return t; |
452503f9 AC |
2701 | } |
2702 | ||
2703 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
2704 | struct ata_timing *t, int T, int UT) | |
2705 | { | |
2706 | const struct ata_timing *s; | |
2707 | struct ata_timing p; | |
2708 | ||
2709 | /* | |
2e9edbf8 | 2710 | * Find the mode. |
75b1f2f8 | 2711 | */ |
452503f9 AC |
2712 | |
2713 | if (!(s = ata_timing_find_mode(speed))) | |
2714 | return -EINVAL; | |
2715 | ||
75b1f2f8 AL |
2716 | memcpy(t, s, sizeof(*s)); |
2717 | ||
452503f9 AC |
2718 | /* |
2719 | * If the drive is an EIDE drive, it can tell us it needs extended | |
2720 | * PIO/MW_DMA cycle timing. | |
2721 | */ | |
2722 | ||
2723 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2724 | memset(&p, 0, sizeof(p)); | |
2dcb407e | 2725 | if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { |
452503f9 AC |
2726 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; |
2727 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2dcb407e | 2728 | } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { |
452503f9 AC |
2729 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; |
2730 | } | |
2731 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2732 | } | |
2733 | ||
2734 | /* | |
2735 | * Convert the timing to bus clock counts. | |
2736 | */ | |
2737 | ||
75b1f2f8 | 2738 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
2739 | |
2740 | /* | |
c893a3ae RD |
2741 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
2742 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2743 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
2744 | */ |
2745 | ||
fd3367af | 2746 | if (speed > XFER_PIO_6) { |
452503f9 AC |
2747 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); |
2748 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2749 | } | |
2750 | ||
2751 | /* | |
c893a3ae | 2752 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
2753 | */ |
2754 | ||
2755 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2756 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2757 | t->rec8b = t->cyc8b - t->act8b; | |
2758 | } | |
2759 | ||
2760 | if (t->active + t->recover < t->cycle) { | |
2761 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2762 | t->recover = t->cycle - t->active; | |
2763 | } | |
a617c09f | 2764 | |
4f701d1e AC |
2765 | /* In a few cases quantisation may produce enough errors to |
2766 | leave t->cycle too low for the sum of active and recovery | |
2767 | if so we must correct this */ | |
2768 | if (t->active + t->recover > t->cycle) | |
2769 | t->cycle = t->active + t->recover; | |
452503f9 AC |
2770 | |
2771 | return 0; | |
2772 | } | |
2773 | ||
cf176e1a TH |
2774 | /** |
2775 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a | 2776 | * @dev: Device to adjust xfer masks |
458337db | 2777 | * @sel: ATA_DNXFER_* selector |
cf176e1a TH |
2778 | * |
2779 | * Adjust xfer masks of @dev downward. Note that this function | |
2780 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2781 | * will apply the limit. | |
2782 | * | |
2783 | * LOCKING: | |
2784 | * Inherited from caller. | |
2785 | * | |
2786 | * RETURNS: | |
2787 | * 0 on success, negative errno on failure | |
2788 | */ | |
458337db | 2789 | int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) |
cf176e1a | 2790 | { |
458337db TH |
2791 | char buf[32]; |
2792 | unsigned int orig_mask, xfer_mask; | |
2793 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
2794 | int quiet, highbit; | |
cf176e1a | 2795 | |
458337db TH |
2796 | quiet = !!(sel & ATA_DNXFER_QUIET); |
2797 | sel &= ~ATA_DNXFER_QUIET; | |
cf176e1a | 2798 | |
458337db TH |
2799 | xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, |
2800 | dev->mwdma_mask, | |
2801 | dev->udma_mask); | |
2802 | ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); | |
cf176e1a | 2803 | |
458337db TH |
2804 | switch (sel) { |
2805 | case ATA_DNXFER_PIO: | |
2806 | highbit = fls(pio_mask) - 1; | |
2807 | pio_mask &= ~(1 << highbit); | |
2808 | break; | |
2809 | ||
2810 | case ATA_DNXFER_DMA: | |
2811 | if (udma_mask) { | |
2812 | highbit = fls(udma_mask) - 1; | |
2813 | udma_mask &= ~(1 << highbit); | |
2814 | if (!udma_mask) | |
2815 | return -ENOENT; | |
2816 | } else if (mwdma_mask) { | |
2817 | highbit = fls(mwdma_mask) - 1; | |
2818 | mwdma_mask &= ~(1 << highbit); | |
2819 | if (!mwdma_mask) | |
2820 | return -ENOENT; | |
2821 | } | |
2822 | break; | |
2823 | ||
2824 | case ATA_DNXFER_40C: | |
2825 | udma_mask &= ATA_UDMA_MASK_40C; | |
2826 | break; | |
2827 | ||
2828 | case ATA_DNXFER_FORCE_PIO0: | |
2829 | pio_mask &= 1; | |
2830 | case ATA_DNXFER_FORCE_PIO: | |
2831 | mwdma_mask = 0; | |
2832 | udma_mask = 0; | |
2833 | break; | |
2834 | ||
458337db TH |
2835 | default: |
2836 | BUG(); | |
2837 | } | |
2838 | ||
2839 | xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
2840 | ||
2841 | if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) | |
2842 | return -ENOENT; | |
2843 | ||
2844 | if (!quiet) { | |
2845 | if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) | |
2846 | snprintf(buf, sizeof(buf), "%s:%s", | |
2847 | ata_mode_string(xfer_mask), | |
2848 | ata_mode_string(xfer_mask & ATA_MASK_PIO)); | |
2849 | else | |
2850 | snprintf(buf, sizeof(buf), "%s", | |
2851 | ata_mode_string(xfer_mask)); | |
2852 | ||
2853 | ata_dev_printk(dev, KERN_WARNING, | |
2854 | "limiting speed to %s\n", buf); | |
2855 | } | |
cf176e1a TH |
2856 | |
2857 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2858 | &dev->udma_mask); | |
2859 | ||
cf176e1a | 2860 | return 0; |
cf176e1a TH |
2861 | } |
2862 | ||
3373efd8 | 2863 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 2864 | { |
9af5c9c9 | 2865 | struct ata_eh_context *ehc = &dev->link->eh_context; |
83206a29 TH |
2866 | unsigned int err_mask; |
2867 | int rc; | |
1da177e4 | 2868 | |
e8384607 | 2869 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
2870 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
2871 | dev->flags |= ATA_DFLAG_PIO; | |
2872 | ||
3373efd8 | 2873 | err_mask = ata_dev_set_xfermode(dev); |
2dcb407e | 2874 | |
11750a40 A |
2875 | /* Old CFA may refuse this command, which is just fine */ |
2876 | if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) | |
2dcb407e JG |
2877 | err_mask &= ~AC_ERR_DEV; |
2878 | ||
0bc2a79a AC |
2879 | /* Some very old devices and some bad newer ones fail any kind of |
2880 | SET_XFERMODE request but support PIO0-2 timings and no IORDY */ | |
2881 | if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) && | |
2882 | dev->pio_mode <= XFER_PIO_2) | |
2883 | err_mask &= ~AC_ERR_DEV; | |
2dcb407e | 2884 | |
3acaf94b AC |
2885 | /* Early MWDMA devices do DMA but don't allow DMA mode setting. |
2886 | Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */ | |
2887 | if (dev->xfer_shift == ATA_SHIFT_MWDMA && | |
2888 | dev->dma_mode == XFER_MW_DMA_0 && | |
2889 | (dev->id[63] >> 8) & 1) | |
2890 | err_mask &= ~AC_ERR_DEV; | |
2891 | ||
83206a29 | 2892 | if (err_mask) { |
f15a1daf TH |
2893 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
2894 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
2895 | return -EIO; |
2896 | } | |
1da177e4 | 2897 | |
baa1e78a | 2898 | ehc->i.flags |= ATA_EHI_POST_SETMODE; |
422c9daa | 2899 | rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); |
baa1e78a | 2900 | ehc->i.flags &= ~ATA_EHI_POST_SETMODE; |
5eb45c02 | 2901 | if (rc) |
83206a29 | 2902 | return rc; |
48a8a14f | 2903 | |
23e71c3d TH |
2904 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
2905 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 2906 | |
f15a1daf TH |
2907 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
2908 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 2909 | return 0; |
1da177e4 LT |
2910 | } |
2911 | ||
1da177e4 | 2912 | /** |
04351821 | 2913 | * ata_do_set_mode - Program timings and issue SET FEATURES - XFER |
0260731f | 2914 | * @link: link on which timings will be programmed |
e82cbdb9 | 2915 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 2916 | * |
04351821 A |
2917 | * Standard implementation of the function used to tune and set |
2918 | * ATA device disk transfer mode (PIO3, UDMA6, etc.). If | |
2919 | * ata_dev_set_mode() fails, pointer to the failing device is | |
e82cbdb9 | 2920 | * returned in @r_failed_dev. |
780a87f7 | 2921 | * |
1da177e4 | 2922 | * LOCKING: |
0cba632b | 2923 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
2924 | * |
2925 | * RETURNS: | |
2926 | * 0 on success, negative errno otherwise | |
1da177e4 | 2927 | */ |
04351821 | 2928 | |
0260731f | 2929 | int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) |
1da177e4 | 2930 | { |
0260731f | 2931 | struct ata_port *ap = link->ap; |
e8e0619f | 2932 | struct ata_device *dev; |
f58229f8 | 2933 | int rc = 0, used_dma = 0, found = 0; |
3adcebb2 | 2934 | |
a6d5a51c | 2935 | /* step 1: calculate xfer_mask */ |
f58229f8 | 2936 | ata_link_for_each_dev(dev, link) { |
acf356b1 | 2937 | unsigned int pio_mask, dma_mask; |
b3a70601 | 2938 | unsigned int mode_mask; |
a6d5a51c | 2939 | |
e1211e3f | 2940 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
2941 | continue; |
2942 | ||
b3a70601 AC |
2943 | mode_mask = ATA_DMA_MASK_ATA; |
2944 | if (dev->class == ATA_DEV_ATAPI) | |
2945 | mode_mask = ATA_DMA_MASK_ATAPI; | |
2946 | else if (ata_id_is_cfa(dev->id)) | |
2947 | mode_mask = ATA_DMA_MASK_CFA; | |
2948 | ||
3373efd8 | 2949 | ata_dev_xfermask(dev); |
1da177e4 | 2950 | |
acf356b1 TH |
2951 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2952 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
b3a70601 AC |
2953 | |
2954 | if (libata_dma_mask & mode_mask) | |
2955 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2956 | else | |
2957 | dma_mask = 0; | |
2958 | ||
acf356b1 TH |
2959 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); |
2960 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2961 | |
4f65977d | 2962 | found = 1; |
5444a6f4 AC |
2963 | if (dev->dma_mode) |
2964 | used_dma = 1; | |
a6d5a51c | 2965 | } |
4f65977d | 2966 | if (!found) |
e82cbdb9 | 2967 | goto out; |
a6d5a51c TH |
2968 | |
2969 | /* step 2: always set host PIO timings */ | |
f58229f8 | 2970 | ata_link_for_each_dev(dev, link) { |
e8e0619f TH |
2971 | if (!ata_dev_enabled(dev)) |
2972 | continue; | |
2973 | ||
2974 | if (!dev->pio_mode) { | |
f15a1daf | 2975 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2976 | rc = -EINVAL; |
e82cbdb9 | 2977 | goto out; |
e8e0619f TH |
2978 | } |
2979 | ||
2980 | dev->xfer_mode = dev->pio_mode; | |
2981 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2982 | if (ap->ops->set_piomode) | |
2983 | ap->ops->set_piomode(ap, dev); | |
2984 | } | |
1da177e4 | 2985 | |
a6d5a51c | 2986 | /* step 3: set host DMA timings */ |
f58229f8 | 2987 | ata_link_for_each_dev(dev, link) { |
e8e0619f TH |
2988 | if (!ata_dev_enabled(dev) || !dev->dma_mode) |
2989 | continue; | |
2990 | ||
2991 | dev->xfer_mode = dev->dma_mode; | |
2992 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2993 | if (ap->ops->set_dmamode) | |
2994 | ap->ops->set_dmamode(ap, dev); | |
2995 | } | |
1da177e4 LT |
2996 | |
2997 | /* step 4: update devices' xfer mode */ | |
f58229f8 | 2998 | ata_link_for_each_dev(dev, link) { |
18d90deb | 2999 | /* don't update suspended devices' xfer mode */ |
9666f400 | 3000 | if (!ata_dev_enabled(dev)) |
83206a29 TH |
3001 | continue; |
3002 | ||
3373efd8 | 3003 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 3004 | if (rc) |
e82cbdb9 | 3005 | goto out; |
83206a29 | 3006 | } |
1da177e4 | 3007 | |
e8e0619f TH |
3008 | /* Record simplex status. If we selected DMA then the other |
3009 | * host channels are not permitted to do so. | |
5444a6f4 | 3010 | */ |
cca3974e | 3011 | if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) |
032af1ce | 3012 | ap->host->simplex_claimed = ap; |
5444a6f4 | 3013 | |
e82cbdb9 TH |
3014 | out: |
3015 | if (rc) | |
3016 | *r_failed_dev = dev; | |
3017 | return rc; | |
1da177e4 LT |
3018 | } |
3019 | ||
04351821 A |
3020 | /** |
3021 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
0260731f | 3022 | * @link: link on which timings will be programmed |
04351821 A |
3023 | * @r_failed_dev: out paramter for failed device |
3024 | * | |
3025 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If | |
3026 | * ata_set_mode() fails, pointer to the failing device is | |
3027 | * returned in @r_failed_dev. | |
3028 | * | |
3029 | * LOCKING: | |
3030 | * PCI/etc. bus probe sem. | |
3031 | * | |
3032 | * RETURNS: | |
3033 | * 0 on success, negative errno otherwise | |
3034 | */ | |
0260731f | 3035 | int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) |
04351821 | 3036 | { |
0260731f TH |
3037 | struct ata_port *ap = link->ap; |
3038 | ||
04351821 A |
3039 | /* has private set_mode? */ |
3040 | if (ap->ops->set_mode) | |
0260731f TH |
3041 | return ap->ops->set_mode(link, r_failed_dev); |
3042 | return ata_do_set_mode(link, r_failed_dev); | |
04351821 A |
3043 | } |
3044 | ||
1fdffbce JG |
3045 | /** |
3046 | * ata_tf_to_host - issue ATA taskfile to host controller | |
3047 | * @ap: port to which command is being issued | |
3048 | * @tf: ATA taskfile register set | |
3049 | * | |
3050 | * Issues ATA taskfile register set to ATA host controller, | |
3051 | * with proper synchronization with interrupt handler and | |
3052 | * other threads. | |
3053 | * | |
3054 | * LOCKING: | |
cca3974e | 3055 | * spin_lock_irqsave(host lock) |
1fdffbce JG |
3056 | */ |
3057 | ||
3058 | static inline void ata_tf_to_host(struct ata_port *ap, | |
3059 | const struct ata_taskfile *tf) | |
3060 | { | |
3061 | ap->ops->tf_load(ap, tf); | |
3062 | ap->ops->exec_command(ap, tf); | |
3063 | } | |
3064 | ||
1da177e4 LT |
3065 | /** |
3066 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
3067 | * @ap: port containing status register to be polled | |
3068 | * @tmout_pat: impatience timeout | |
3069 | * @tmout: overall timeout | |
3070 | * | |
780a87f7 JG |
3071 | * Sleep until ATA Status register bit BSY clears, |
3072 | * or a timeout occurs. | |
3073 | * | |
d1adc1bb TH |
3074 | * LOCKING: |
3075 | * Kernel thread context (may sleep). | |
3076 | * | |
3077 | * RETURNS: | |
3078 | * 0 on success, -errno otherwise. | |
1da177e4 | 3079 | */ |
d1adc1bb TH |
3080 | int ata_busy_sleep(struct ata_port *ap, |
3081 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
3082 | { |
3083 | unsigned long timer_start, timeout; | |
3084 | u8 status; | |
3085 | ||
3086 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
3087 | timer_start = jiffies; | |
3088 | timeout = timer_start + tmout_pat; | |
d1adc1bb TH |
3089 | while (status != 0xff && (status & ATA_BUSY) && |
3090 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
3091 | msleep(50); |
3092 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
3093 | } | |
3094 | ||
d1adc1bb | 3095 | if (status != 0xff && (status & ATA_BUSY)) |
f15a1daf | 3096 | ata_port_printk(ap, KERN_WARNING, |
35aa7a43 JG |
3097 | "port is slow to respond, please be patient " |
3098 | "(Status 0x%x)\n", status); | |
1da177e4 LT |
3099 | |
3100 | timeout = timer_start + tmout; | |
d1adc1bb TH |
3101 | while (status != 0xff && (status & ATA_BUSY) && |
3102 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
3103 | msleep(50); |
3104 | status = ata_chk_status(ap); | |
3105 | } | |
3106 | ||
d1adc1bb TH |
3107 | if (status == 0xff) |
3108 | return -ENODEV; | |
3109 | ||
1da177e4 | 3110 | if (status & ATA_BUSY) { |
f15a1daf | 3111 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
35aa7a43 JG |
3112 | "(%lu secs, Status 0x%x)\n", |
3113 | tmout / HZ, status); | |
d1adc1bb | 3114 | return -EBUSY; |
1da177e4 LT |
3115 | } |
3116 | ||
3117 | return 0; | |
3118 | } | |
3119 | ||
88ff6eaf TH |
3120 | /** |
3121 | * ata_wait_after_reset - wait before checking status after reset | |
3122 | * @ap: port containing status register to be polled | |
3123 | * @deadline: deadline jiffies for the operation | |
3124 | * | |
3125 | * After reset, we need to pause a while before reading status. | |
3126 | * Also, certain combination of controller and device report 0xff | |
3127 | * for some duration (e.g. until SATA PHY is up and running) | |
3128 | * which is interpreted as empty port in ATA world. This | |
3129 | * function also waits for such devices to get out of 0xff | |
3130 | * status. | |
3131 | * | |
3132 | * LOCKING: | |
3133 | * Kernel thread context (may sleep). | |
3134 | */ | |
3135 | void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) | |
3136 | { | |
3137 | unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; | |
3138 | ||
3139 | if (time_before(until, deadline)) | |
3140 | deadline = until; | |
3141 | ||
3142 | /* Spec mandates ">= 2ms" before checking status. We wait | |
3143 | * 150ms, because that was the magic delay used for ATAPI | |
3144 | * devices in Hale Landis's ATADRVR, for the period of time | |
3145 | * between when the ATA command register is written, and then | |
3146 | * status is checked. Because waiting for "a while" before | |
3147 | * checking status is fine, post SRST, we perform this magic | |
3148 | * delay here as well. | |
3149 | * | |
3150 | * Old drivers/ide uses the 2mS rule and then waits for ready. | |
3151 | */ | |
3152 | msleep(150); | |
3153 | ||
3154 | /* Wait for 0xff to clear. Some SATA devices take a long time | |
3155 | * to clear 0xff after reset. For example, HHD424020F7SV00 | |
3156 | * iVDR needs >= 800ms while. Quantum GoVault needs even more | |
3157 | * than that. | |
3158 | */ | |
3159 | while (1) { | |
3160 | u8 status = ata_chk_status(ap); | |
3161 | ||
3162 | if (status != 0xff || time_after(jiffies, deadline)) | |
3163 | return; | |
3164 | ||
3165 | msleep(50); | |
3166 | } | |
3167 | } | |
3168 | ||
d4b2bab4 TH |
3169 | /** |
3170 | * ata_wait_ready - sleep until BSY clears, or timeout | |
3171 | * @ap: port containing status register to be polled | |
3172 | * @deadline: deadline jiffies for the operation | |
3173 | * | |
3174 | * Sleep until ATA Status register bit BSY clears, or timeout | |
3175 | * occurs. | |
3176 | * | |
3177 | * LOCKING: | |
3178 | * Kernel thread context (may sleep). | |
3179 | * | |
3180 | * RETURNS: | |
3181 | * 0 on success, -errno otherwise. | |
3182 | */ | |
3183 | int ata_wait_ready(struct ata_port *ap, unsigned long deadline) | |
3184 | { | |
3185 | unsigned long start = jiffies; | |
3186 | int warned = 0; | |
3187 | ||
3188 | while (1) { | |
3189 | u8 status = ata_chk_status(ap); | |
3190 | unsigned long now = jiffies; | |
3191 | ||
3192 | if (!(status & ATA_BUSY)) | |
3193 | return 0; | |
936fd732 | 3194 | if (!ata_link_online(&ap->link) && status == 0xff) |
d4b2bab4 TH |
3195 | return -ENODEV; |
3196 | if (time_after(now, deadline)) | |
3197 | return -EBUSY; | |
3198 | ||
3199 | if (!warned && time_after(now, start + 5 * HZ) && | |
3200 | (deadline - now > 3 * HZ)) { | |
3201 | ata_port_printk(ap, KERN_WARNING, | |
3202 | "port is slow to respond, please be patient " | |
3203 | "(Status 0x%x)\n", status); | |
3204 | warned = 1; | |
3205 | } | |
3206 | ||
3207 | msleep(50); | |
3208 | } | |
3209 | } | |
3210 | ||
3211 | static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, | |
3212 | unsigned long deadline) | |
1da177e4 LT |
3213 | { |
3214 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
3215 | unsigned int dev0 = devmask & (1 << 0); | |
3216 | unsigned int dev1 = devmask & (1 << 1); | |
9b89391c | 3217 | int rc, ret = 0; |
1da177e4 LT |
3218 | |
3219 | /* if device 0 was found in ata_devchk, wait for its | |
3220 | * BSY bit to clear | |
3221 | */ | |
d4b2bab4 TH |
3222 | if (dev0) { |
3223 | rc = ata_wait_ready(ap, deadline); | |
9b89391c TH |
3224 | if (rc) { |
3225 | if (rc != -ENODEV) | |
3226 | return rc; | |
3227 | ret = rc; | |
3228 | } | |
d4b2bab4 | 3229 | } |
1da177e4 | 3230 | |
e141d999 TH |
3231 | /* if device 1 was found in ata_devchk, wait for register |
3232 | * access briefly, then wait for BSY to clear. | |
1da177e4 | 3233 | */ |
e141d999 TH |
3234 | if (dev1) { |
3235 | int i; | |
1da177e4 LT |
3236 | |
3237 | ap->ops->dev_select(ap, 1); | |
e141d999 TH |
3238 | |
3239 | /* Wait for register access. Some ATAPI devices fail | |
3240 | * to set nsect/lbal after reset, so don't waste too | |
3241 | * much time on it. We're gonna wait for !BSY anyway. | |
3242 | */ | |
3243 | for (i = 0; i < 2; i++) { | |
3244 | u8 nsect, lbal; | |
3245 | ||
3246 | nsect = ioread8(ioaddr->nsect_addr); | |
3247 | lbal = ioread8(ioaddr->lbal_addr); | |
3248 | if ((nsect == 1) && (lbal == 1)) | |
3249 | break; | |
3250 | msleep(50); /* give drive a breather */ | |
3251 | } | |
3252 | ||
d4b2bab4 | 3253 | rc = ata_wait_ready(ap, deadline); |
9b89391c TH |
3254 | if (rc) { |
3255 | if (rc != -ENODEV) | |
3256 | return rc; | |
3257 | ret = rc; | |
3258 | } | |
d4b2bab4 | 3259 | } |
1da177e4 LT |
3260 | |
3261 | /* is all this really necessary? */ | |
3262 | ap->ops->dev_select(ap, 0); | |
3263 | if (dev1) | |
3264 | ap->ops->dev_select(ap, 1); | |
3265 | if (dev0) | |
3266 | ap->ops->dev_select(ap, 0); | |
d4b2bab4 | 3267 | |
9b89391c | 3268 | return ret; |
1da177e4 LT |
3269 | } |
3270 | ||
d4b2bab4 TH |
3271 | static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, |
3272 | unsigned long deadline) | |
1da177e4 LT |
3273 | { |
3274 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
681c80b5 AC |
3275 | struct ata_device *dev; |
3276 | int i = 0; | |
1da177e4 | 3277 | |
44877b4e | 3278 | DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); |
1da177e4 LT |
3279 | |
3280 | /* software reset. causes dev0 to be selected */ | |
0d5ff566 TH |
3281 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
3282 | udelay(20); /* FIXME: flush */ | |
3283 | iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
3284 | udelay(20); /* FIXME: flush */ | |
3285 | iowrite8(ap->ctl, ioaddr->ctl_addr); | |
1da177e4 | 3286 | |
681c80b5 AC |
3287 | /* If we issued an SRST then an ATA drive (not ATAPI) |
3288 | * may have changed configuration and be in PIO0 timing. If | |
3289 | * we did a hard reset (or are coming from power on) this is | |
3290 | * true for ATA or ATAPI. Until we've set a suitable controller | |
3291 | * mode we should not touch the bus as we may be talking too fast. | |
3292 | */ | |
3293 | ||
3294 | ata_link_for_each_dev(dev, &ap->link) | |
3295 | dev->pio_mode = XFER_PIO_0; | |
3296 | ||
3297 | /* If the controller has a pio mode setup function then use | |
3298 | it to set the chipset to rights. Don't touch the DMA setup | |
3299 | as that will be dealt with when revalidating */ | |
3300 | if (ap->ops->set_piomode) { | |
3301 | ata_link_for_each_dev(dev, &ap->link) | |
3302 | if (devmask & (1 << i++)) | |
3303 | ap->ops->set_piomode(ap, dev); | |
3304 | } | |
3305 | ||
88ff6eaf TH |
3306 | /* wait a while before checking status */ |
3307 | ata_wait_after_reset(ap, deadline); | |
1da177e4 | 3308 | |
2e9edbf8 | 3309 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
3310 | * the bus shows 0xFF because the odd clown forgets the D7 |
3311 | * pulldown resistor. | |
3312 | */ | |
150981b0 | 3313 | if (ata_chk_status(ap) == 0xFF) |
9b89391c | 3314 | return -ENODEV; |
09c7ad79 | 3315 | |
d4b2bab4 | 3316 | return ata_bus_post_reset(ap, devmask, deadline); |
1da177e4 LT |
3317 | } |
3318 | ||
3319 | /** | |
3320 | * ata_bus_reset - reset host port and associated ATA channel | |
3321 | * @ap: port to reset | |
3322 | * | |
3323 | * This is typically the first time we actually start issuing | |
3324 | * commands to the ATA channel. We wait for BSY to clear, then | |
3325 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
3326 | * result. Determine what devices, if any, are on the channel | |
3327 | * by looking at the device 0/1 error register. Look at the signature | |
3328 | * stored in each device's taskfile registers, to determine if | |
3329 | * the device is ATA or ATAPI. | |
3330 | * | |
3331 | * LOCKING: | |
0cba632b | 3332 | * PCI/etc. bus probe sem. |
cca3974e | 3333 | * Obtains host lock. |
1da177e4 LT |
3334 | * |
3335 | * SIDE EFFECTS: | |
198e0fed | 3336 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
3337 | */ |
3338 | ||
3339 | void ata_bus_reset(struct ata_port *ap) | |
3340 | { | |
9af5c9c9 | 3341 | struct ata_device *device = ap->link.device; |
1da177e4 LT |
3342 | struct ata_ioports *ioaddr = &ap->ioaddr; |
3343 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
3344 | u8 err; | |
aec5c3c1 | 3345 | unsigned int dev0, dev1 = 0, devmask = 0; |
9b89391c | 3346 | int rc; |
1da177e4 | 3347 | |
44877b4e | 3348 | DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); |
1da177e4 LT |
3349 | |
3350 | /* determine if device 0/1 are present */ | |
3351 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
3352 | dev0 = 1; | |
3353 | else { | |
3354 | dev0 = ata_devchk(ap, 0); | |
3355 | if (slave_possible) | |
3356 | dev1 = ata_devchk(ap, 1); | |
3357 | } | |
3358 | ||
3359 | if (dev0) | |
3360 | devmask |= (1 << 0); | |
3361 | if (dev1) | |
3362 | devmask |= (1 << 1); | |
3363 | ||
3364 | /* select device 0 again */ | |
3365 | ap->ops->dev_select(ap, 0); | |
3366 | ||
3367 | /* issue bus reset */ | |
9b89391c TH |
3368 | if (ap->flags & ATA_FLAG_SRST) { |
3369 | rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); | |
3370 | if (rc && rc != -ENODEV) | |
aec5c3c1 | 3371 | goto err_out; |
9b89391c | 3372 | } |
1da177e4 LT |
3373 | |
3374 | /* | |
3375 | * determine by signature whether we have ATA or ATAPI devices | |
3376 | */ | |
3f19859e | 3377 | device[0].class = ata_dev_try_classify(&device[0], dev0, &err); |
1da177e4 | 3378 | if ((slave_possible) && (err != 0x81)) |
3f19859e | 3379 | device[1].class = ata_dev_try_classify(&device[1], dev1, &err); |
1da177e4 | 3380 | |
1da177e4 | 3381 | /* is double-select really necessary? */ |
9af5c9c9 | 3382 | if (device[1].class != ATA_DEV_NONE) |
1da177e4 | 3383 | ap->ops->dev_select(ap, 1); |
9af5c9c9 | 3384 | if (device[0].class != ATA_DEV_NONE) |
1da177e4 LT |
3385 | ap->ops->dev_select(ap, 0); |
3386 | ||
3387 | /* if no devices were detected, disable this port */ | |
9af5c9c9 TH |
3388 | if ((device[0].class == ATA_DEV_NONE) && |
3389 | (device[1].class == ATA_DEV_NONE)) | |
1da177e4 LT |
3390 | goto err_out; |
3391 | ||
3392 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
3393 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
0d5ff566 | 3394 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
1da177e4 LT |
3395 | } |
3396 | ||
3397 | DPRINTK("EXIT\n"); | |
3398 | return; | |
3399 | ||
3400 | err_out: | |
f15a1daf | 3401 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
ac8869d5 | 3402 | ata_port_disable(ap); |
1da177e4 LT |
3403 | |
3404 | DPRINTK("EXIT\n"); | |
3405 | } | |
3406 | ||
d7bb4cc7 | 3407 | /** |
936fd732 TH |
3408 | * sata_link_debounce - debounce SATA phy status |
3409 | * @link: ATA link to debounce SATA phy status for | |
d7bb4cc7 | 3410 | * @params: timing parameters { interval, duratinon, timeout } in msec |
d4b2bab4 | 3411 | * @deadline: deadline jiffies for the operation |
d7bb4cc7 | 3412 | * |
936fd732 | 3413 | * Make sure SStatus of @link reaches stable state, determined by |
d7bb4cc7 TH |
3414 | * holding the same value where DET is not 1 for @duration polled |
3415 | * every @interval, before @timeout. Timeout constraints the | |
d4b2bab4 TH |
3416 | * beginning of the stable state. Because DET gets stuck at 1 on |
3417 | * some controllers after hot unplugging, this functions waits | |
d7bb4cc7 TH |
3418 | * until timeout then returns 0 if DET is stable at 1. |
3419 | * | |
d4b2bab4 TH |
3420 | * @timeout is further limited by @deadline. The sooner of the |
3421 | * two is used. | |
3422 | * | |
d7bb4cc7 TH |
3423 | * LOCKING: |
3424 | * Kernel thread context (may sleep) | |
3425 | * | |
3426 | * RETURNS: | |
3427 | * 0 on success, -errno on failure. | |
3428 | */ | |
936fd732 TH |
3429 | int sata_link_debounce(struct ata_link *link, const unsigned long *params, |
3430 | unsigned long deadline) | |
7a7921e8 | 3431 | { |
d7bb4cc7 | 3432 | unsigned long interval_msec = params[0]; |
d4b2bab4 TH |
3433 | unsigned long duration = msecs_to_jiffies(params[1]); |
3434 | unsigned long last_jiffies, t; | |
d7bb4cc7 TH |
3435 | u32 last, cur; |
3436 | int rc; | |
3437 | ||
d4b2bab4 TH |
3438 | t = jiffies + msecs_to_jiffies(params[2]); |
3439 | if (time_before(t, deadline)) | |
3440 | deadline = t; | |
3441 | ||
936fd732 | 3442 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) |
d7bb4cc7 TH |
3443 | return rc; |
3444 | cur &= 0xf; | |
3445 | ||
3446 | last = cur; | |
3447 | last_jiffies = jiffies; | |
3448 | ||
3449 | while (1) { | |
3450 | msleep(interval_msec); | |
936fd732 | 3451 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) |
d7bb4cc7 TH |
3452 | return rc; |
3453 | cur &= 0xf; | |
3454 | ||
3455 | /* DET stable? */ | |
3456 | if (cur == last) { | |
d4b2bab4 | 3457 | if (cur == 1 && time_before(jiffies, deadline)) |
d7bb4cc7 TH |
3458 | continue; |
3459 | if (time_after(jiffies, last_jiffies + duration)) | |
3460 | return 0; | |
3461 | continue; | |
3462 | } | |
3463 | ||
3464 | /* unstable, start over */ | |
3465 | last = cur; | |
3466 | last_jiffies = jiffies; | |
3467 | ||
f1545154 TH |
3468 | /* Check deadline. If debouncing failed, return |
3469 | * -EPIPE to tell upper layer to lower link speed. | |
3470 | */ | |
d4b2bab4 | 3471 | if (time_after(jiffies, deadline)) |
f1545154 | 3472 | return -EPIPE; |
d7bb4cc7 TH |
3473 | } |
3474 | } | |
3475 | ||
3476 | /** | |
936fd732 TH |
3477 | * sata_link_resume - resume SATA link |
3478 | * @link: ATA link to resume SATA | |
d7bb4cc7 | 3479 | * @params: timing parameters { interval, duratinon, timeout } in msec |
d4b2bab4 | 3480 | * @deadline: deadline jiffies for the operation |
d7bb4cc7 | 3481 | * |
936fd732 | 3482 | * Resume SATA phy @link and debounce it. |
d7bb4cc7 TH |
3483 | * |
3484 | * LOCKING: | |
3485 | * Kernel thread context (may sleep) | |
3486 | * | |
3487 | * RETURNS: | |
3488 | * 0 on success, -errno on failure. | |
3489 | */ | |
936fd732 TH |
3490 | int sata_link_resume(struct ata_link *link, const unsigned long *params, |
3491 | unsigned long deadline) | |
d7bb4cc7 TH |
3492 | { |
3493 | u32 scontrol; | |
81952c54 TH |
3494 | int rc; |
3495 | ||
936fd732 | 3496 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
81952c54 | 3497 | return rc; |
7a7921e8 | 3498 | |
852ee16a | 3499 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 | 3500 | |
936fd732 | 3501 | if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) |
81952c54 | 3502 | return rc; |
7a7921e8 | 3503 | |
d7bb4cc7 TH |
3504 | /* Some PHYs react badly if SStatus is pounded immediately |
3505 | * after resuming. Delay 200ms before debouncing. | |
3506 | */ | |
3507 | msleep(200); | |
7a7921e8 | 3508 | |
936fd732 | 3509 | return sata_link_debounce(link, params, deadline); |
7a7921e8 TH |
3510 | } |
3511 | ||
f5914a46 TH |
3512 | /** |
3513 | * ata_std_prereset - prepare for reset | |
cc0680a5 | 3514 | * @link: ATA link to be reset |
d4b2bab4 | 3515 | * @deadline: deadline jiffies for the operation |
f5914a46 | 3516 | * |
cc0680a5 | 3517 | * @link is about to be reset. Initialize it. Failure from |
b8cffc6a TH |
3518 | * prereset makes libata abort whole reset sequence and give up |
3519 | * that port, so prereset should be best-effort. It does its | |
3520 | * best to prepare for reset sequence but if things go wrong, it | |
3521 | * should just whine, not fail. | |
f5914a46 TH |
3522 | * |
3523 | * LOCKING: | |
3524 | * Kernel thread context (may sleep) | |
3525 | * | |
3526 | * RETURNS: | |
3527 | * 0 on success, -errno otherwise. | |
3528 | */ | |
cc0680a5 | 3529 | int ata_std_prereset(struct ata_link *link, unsigned long deadline) |
f5914a46 | 3530 | { |
cc0680a5 | 3531 | struct ata_port *ap = link->ap; |
936fd732 | 3532 | struct ata_eh_context *ehc = &link->eh_context; |
e9c83914 | 3533 | const unsigned long *timing = sata_ehc_deb_timing(ehc); |
f5914a46 TH |
3534 | int rc; |
3535 | ||
31daabda | 3536 | /* handle link resume */ |
28324304 | 3537 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && |
0c88758b | 3538 | (link->flags & ATA_LFLAG_HRST_TO_RESUME)) |
28324304 TH |
3539 | ehc->i.action |= ATA_EH_HARDRESET; |
3540 | ||
633273a3 TH |
3541 | /* Some PMPs don't work with only SRST, force hardreset if PMP |
3542 | * is supported. | |
3543 | */ | |
3544 | if (ap->flags & ATA_FLAG_PMP) | |
3545 | ehc->i.action |= ATA_EH_HARDRESET; | |
3546 | ||
f5914a46 TH |
3547 | /* if we're about to do hardreset, nothing more to do */ |
3548 | if (ehc->i.action & ATA_EH_HARDRESET) | |
3549 | return 0; | |
3550 | ||
936fd732 | 3551 | /* if SATA, resume link */ |
a16abc0b | 3552 | if (ap->flags & ATA_FLAG_SATA) { |
936fd732 | 3553 | rc = sata_link_resume(link, timing, deadline); |
b8cffc6a TH |
3554 | /* whine about phy resume failure but proceed */ |
3555 | if (rc && rc != -EOPNOTSUPP) | |
cc0680a5 | 3556 | ata_link_printk(link, KERN_WARNING, "failed to resume " |
f5914a46 | 3557 | "link for reset (errno=%d)\n", rc); |
f5914a46 TH |
3558 | } |
3559 | ||
3560 | /* Wait for !BSY if the controller can wait for the first D2H | |
3561 | * Reg FIS and we don't know that no device is attached. | |
3562 | */ | |
0c88758b | 3563 | if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) { |
b8cffc6a | 3564 | rc = ata_wait_ready(ap, deadline); |
6dffaf61 | 3565 | if (rc && rc != -ENODEV) { |
cc0680a5 | 3566 | ata_link_printk(link, KERN_WARNING, "device not ready " |
b8cffc6a TH |
3567 | "(errno=%d), forcing hardreset\n", rc); |
3568 | ehc->i.action |= ATA_EH_HARDRESET; | |
3569 | } | |
3570 | } | |
f5914a46 TH |
3571 | |
3572 | return 0; | |
3573 | } | |
3574 | ||
c2bd5804 TH |
3575 | /** |
3576 | * ata_std_softreset - reset host port via ATA SRST | |
cc0680a5 | 3577 | * @link: ATA link to reset |
c2bd5804 | 3578 | * @classes: resulting classes of attached devices |
d4b2bab4 | 3579 | * @deadline: deadline jiffies for the operation |
c2bd5804 | 3580 | * |
52783c5d | 3581 | * Reset host port using ATA SRST. |
c2bd5804 TH |
3582 | * |
3583 | * LOCKING: | |
3584 | * Kernel thread context (may sleep) | |
3585 | * | |
3586 | * RETURNS: | |
3587 | * 0 on success, -errno otherwise. | |
3588 | */ | |
cc0680a5 | 3589 | int ata_std_softreset(struct ata_link *link, unsigned int *classes, |
d4b2bab4 | 3590 | unsigned long deadline) |
c2bd5804 | 3591 | { |
cc0680a5 | 3592 | struct ata_port *ap = link->ap; |
c2bd5804 | 3593 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; |
d4b2bab4 TH |
3594 | unsigned int devmask = 0; |
3595 | int rc; | |
c2bd5804 TH |
3596 | u8 err; |
3597 | ||
3598 | DPRINTK("ENTER\n"); | |
3599 | ||
936fd732 | 3600 | if (ata_link_offline(link)) { |
3a39746a TH |
3601 | classes[0] = ATA_DEV_NONE; |
3602 | goto out; | |
3603 | } | |
3604 | ||
c2bd5804 TH |
3605 | /* determine if device 0/1 are present */ |
3606 | if (ata_devchk(ap, 0)) | |
3607 | devmask |= (1 << 0); | |
3608 | if (slave_possible && ata_devchk(ap, 1)) | |
3609 | devmask |= (1 << 1); | |
3610 | ||
c2bd5804 TH |
3611 | /* select device 0 again */ |
3612 | ap->ops->dev_select(ap, 0); | |
3613 | ||
3614 | /* issue bus reset */ | |
3615 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
d4b2bab4 | 3616 | rc = ata_bus_softreset(ap, devmask, deadline); |
9b89391c | 3617 | /* if link is occupied, -ENODEV too is an error */ |
936fd732 | 3618 | if (rc && (rc != -ENODEV || sata_scr_valid(link))) { |
cc0680a5 | 3619 | ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); |
d4b2bab4 | 3620 | return rc; |
c2bd5804 TH |
3621 | } |
3622 | ||
3623 | /* determine by signature whether we have ATA or ATAPI devices */ | |
3f19859e TH |
3624 | classes[0] = ata_dev_try_classify(&link->device[0], |
3625 | devmask & (1 << 0), &err); | |
c2bd5804 | 3626 | if (slave_possible && err != 0x81) |
3f19859e TH |
3627 | classes[1] = ata_dev_try_classify(&link->device[1], |
3628 | devmask & (1 << 1), &err); | |
c2bd5804 | 3629 | |
3a39746a | 3630 | out: |
c2bd5804 TH |
3631 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
3632 | return 0; | |
3633 | } | |
3634 | ||
3635 | /** | |
cc0680a5 TH |
3636 | * sata_link_hardreset - reset link via SATA phy reset |
3637 | * @link: link to reset | |
b6103f6d | 3638 | * @timing: timing parameters { interval, duratinon, timeout } in msec |
d4b2bab4 | 3639 | * @deadline: deadline jiffies for the operation |
c2bd5804 | 3640 | * |
cc0680a5 | 3641 | * SATA phy-reset @link using DET bits of SControl register. |
c2bd5804 TH |
3642 | * |
3643 | * LOCKING: | |
3644 | * Kernel thread context (may sleep) | |
3645 | * | |
3646 | * RETURNS: | |
3647 | * 0 on success, -errno otherwise. | |
3648 | */ | |
cc0680a5 | 3649 | int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, |
d4b2bab4 | 3650 | unsigned long deadline) |
c2bd5804 | 3651 | { |
852ee16a | 3652 | u32 scontrol; |
81952c54 | 3653 | int rc; |
852ee16a | 3654 | |
c2bd5804 TH |
3655 | DPRINTK("ENTER\n"); |
3656 | ||
936fd732 | 3657 | if (sata_set_spd_needed(link)) { |
1c3fae4d TH |
3658 | /* SATA spec says nothing about how to reconfigure |
3659 | * spd. To be on the safe side, turn off phy during | |
3660 | * reconfiguration. This works for at least ICH7 AHCI | |
3661 | * and Sil3124. | |
3662 | */ | |
936fd732 | 3663 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
b6103f6d | 3664 | goto out; |
81952c54 | 3665 | |
a34b6fc0 | 3666 | scontrol = (scontrol & 0x0f0) | 0x304; |
81952c54 | 3667 | |
936fd732 | 3668 | if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) |
b6103f6d | 3669 | goto out; |
1c3fae4d | 3670 | |
936fd732 | 3671 | sata_set_spd(link); |
1c3fae4d TH |
3672 | } |
3673 | ||
3674 | /* issue phy wake/reset */ | |
936fd732 | 3675 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
b6103f6d | 3676 | goto out; |
81952c54 | 3677 | |
852ee16a | 3678 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 | 3679 | |
936fd732 | 3680 | if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol))) |
b6103f6d | 3681 | goto out; |
c2bd5804 | 3682 | |
1c3fae4d | 3683 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
3684 | * 10.4.2 says at least 1 ms. |
3685 | */ | |
3686 | msleep(1); | |
3687 | ||
936fd732 TH |
3688 | /* bring link back */ |
3689 | rc = sata_link_resume(link, timing, deadline); | |
b6103f6d TH |
3690 | out: |
3691 | DPRINTK("EXIT, rc=%d\n", rc); | |
3692 | return rc; | |
3693 | } | |
3694 | ||
3695 | /** | |
3696 | * sata_std_hardreset - reset host port via SATA phy reset | |
cc0680a5 | 3697 | * @link: link to reset |
b6103f6d | 3698 | * @class: resulting class of attached device |
d4b2bab4 | 3699 | * @deadline: deadline jiffies for the operation |
b6103f6d TH |
3700 | * |
3701 | * SATA phy-reset host port using DET bits of SControl register, | |
3702 | * wait for !BSY and classify the attached device. | |
3703 | * | |
3704 | * LOCKING: | |
3705 | * Kernel thread context (may sleep) | |
3706 | * | |
3707 | * RETURNS: | |
3708 | * 0 on success, -errno otherwise. | |
3709 | */ | |
cc0680a5 | 3710 | int sata_std_hardreset(struct ata_link *link, unsigned int *class, |
d4b2bab4 | 3711 | unsigned long deadline) |
b6103f6d | 3712 | { |
cc0680a5 | 3713 | struct ata_port *ap = link->ap; |
936fd732 | 3714 | const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); |
b6103f6d TH |
3715 | int rc; |
3716 | ||
3717 | DPRINTK("ENTER\n"); | |
3718 | ||
3719 | /* do hardreset */ | |
cc0680a5 | 3720 | rc = sata_link_hardreset(link, timing, deadline); |
b6103f6d | 3721 | if (rc) { |
cc0680a5 | 3722 | ata_link_printk(link, KERN_ERR, |
b6103f6d TH |
3723 | "COMRESET failed (errno=%d)\n", rc); |
3724 | return rc; | |
3725 | } | |
c2bd5804 | 3726 | |
c2bd5804 | 3727 | /* TODO: phy layer with polling, timeouts, etc. */ |
936fd732 | 3728 | if (ata_link_offline(link)) { |
c2bd5804 TH |
3729 | *class = ATA_DEV_NONE; |
3730 | DPRINTK("EXIT, link offline\n"); | |
3731 | return 0; | |
3732 | } | |
3733 | ||
88ff6eaf TH |
3734 | /* wait a while before checking status */ |
3735 | ata_wait_after_reset(ap, deadline); | |
34fee227 | 3736 | |
633273a3 TH |
3737 | /* If PMP is supported, we have to do follow-up SRST. Note |
3738 | * that some PMPs don't send D2H Reg FIS after hardreset at | |
3739 | * all if the first port is empty. Wait for it just for a | |
3740 | * second and request follow-up SRST. | |
3741 | */ | |
3742 | if (ap->flags & ATA_FLAG_PMP) { | |
3743 | ata_wait_ready(ap, jiffies + HZ); | |
3744 | return -EAGAIN; | |
3745 | } | |
3746 | ||
d4b2bab4 | 3747 | rc = ata_wait_ready(ap, deadline); |
9b89391c TH |
3748 | /* link occupied, -ENODEV too is an error */ |
3749 | if (rc) { | |
cc0680a5 | 3750 | ata_link_printk(link, KERN_ERR, |
d4b2bab4 TH |
3751 | "COMRESET failed (errno=%d)\n", rc); |
3752 | return rc; | |
c2bd5804 TH |
3753 | } |
3754 | ||
3a39746a TH |
3755 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
3756 | ||
3f19859e | 3757 | *class = ata_dev_try_classify(link->device, 1, NULL); |
c2bd5804 TH |
3758 | |
3759 | DPRINTK("EXIT, class=%u\n", *class); | |
3760 | return 0; | |
3761 | } | |
3762 | ||
3763 | /** | |
3764 | * ata_std_postreset - standard postreset callback | |
cc0680a5 | 3765 | * @link: the target ata_link |
c2bd5804 TH |
3766 | * @classes: classes of attached devices |
3767 | * | |
3768 | * This function is invoked after a successful reset. Note that | |
3769 | * the device might have been reset more than once using | |
3770 | * different reset methods before postreset is invoked. | |
c2bd5804 | 3771 | * |
c2bd5804 TH |
3772 | * LOCKING: |
3773 | * Kernel thread context (may sleep) | |
3774 | */ | |
cc0680a5 | 3775 | void ata_std_postreset(struct ata_link *link, unsigned int *classes) |
c2bd5804 | 3776 | { |
cc0680a5 | 3777 | struct ata_port *ap = link->ap; |
dc2b3515 TH |
3778 | u32 serror; |
3779 | ||
c2bd5804 TH |
3780 | DPRINTK("ENTER\n"); |
3781 | ||
c2bd5804 | 3782 | /* print link status */ |
936fd732 | 3783 | sata_print_link_status(link); |
c2bd5804 | 3784 | |
dc2b3515 | 3785 | /* clear SError */ |
936fd732 TH |
3786 | if (sata_scr_read(link, SCR_ERROR, &serror) == 0) |
3787 | sata_scr_write(link, SCR_ERROR, serror); | |
dc2b3515 | 3788 | |
c2bd5804 TH |
3789 | /* is double-select really necessary? */ |
3790 | if (classes[0] != ATA_DEV_NONE) | |
3791 | ap->ops->dev_select(ap, 1); | |
3792 | if (classes[1] != ATA_DEV_NONE) | |
3793 | ap->ops->dev_select(ap, 0); | |
3794 | ||
3a39746a TH |
3795 | /* bail out if no device is present */ |
3796 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
3797 | DPRINTK("EXIT, no device\n"); | |
3798 | return; | |
3799 | } | |
3800 | ||
3801 | /* set up device control */ | |
0d5ff566 TH |
3802 | if (ap->ioaddr.ctl_addr) |
3803 | iowrite8(ap->ctl, ap->ioaddr.ctl_addr); | |
c2bd5804 TH |
3804 | |
3805 | DPRINTK("EXIT\n"); | |
3806 | } | |
3807 | ||
623a3128 TH |
3808 | /** |
3809 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
3810 | * @dev: device to compare against |
3811 | * @new_class: class of the new device | |
3812 | * @new_id: IDENTIFY page of the new device | |
3813 | * | |
3814 | * Compare @new_class and @new_id against @dev and determine | |
3815 | * whether @dev is the device indicated by @new_class and | |
3816 | * @new_id. | |
3817 | * | |
3818 | * LOCKING: | |
3819 | * None. | |
3820 | * | |
3821 | * RETURNS: | |
3822 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
3823 | */ | |
3373efd8 TH |
3824 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
3825 | const u16 *new_id) | |
623a3128 TH |
3826 | { |
3827 | const u16 *old_id = dev->id; | |
a0cf733b TH |
3828 | unsigned char model[2][ATA_ID_PROD_LEN + 1]; |
3829 | unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; | |
623a3128 TH |
3830 | |
3831 | if (dev->class != new_class) { | |
f15a1daf TH |
3832 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
3833 | dev->class, new_class); | |
623a3128 TH |
3834 | return 0; |
3835 | } | |
3836 | ||
a0cf733b TH |
3837 | ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); |
3838 | ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); | |
3839 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); | |
3840 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); | |
623a3128 TH |
3841 | |
3842 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
3843 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
3844 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
3845 | return 0; |
3846 | } | |
3847 | ||
3848 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
3849 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
3850 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
3851 | return 0; |
3852 | } | |
3853 | ||
623a3128 TH |
3854 | return 1; |
3855 | } | |
3856 | ||
3857 | /** | |
fe30911b | 3858 | * ata_dev_reread_id - Re-read IDENTIFY data |
3fae450c | 3859 | * @dev: target ATA device |
bff04647 | 3860 | * @readid_flags: read ID flags |
623a3128 TH |
3861 | * |
3862 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
3863 | * the port. | |
3864 | * | |
3865 | * LOCKING: | |
3866 | * Kernel thread context (may sleep) | |
3867 | * | |
3868 | * RETURNS: | |
3869 | * 0 on success, negative errno otherwise | |
3870 | */ | |
fe30911b | 3871 | int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) |
623a3128 | 3872 | { |
5eb45c02 | 3873 | unsigned int class = dev->class; |
9af5c9c9 | 3874 | u16 *id = (void *)dev->link->ap->sector_buf; |
623a3128 TH |
3875 | int rc; |
3876 | ||
fe635c7e | 3877 | /* read ID data */ |
bff04647 | 3878 | rc = ata_dev_read_id(dev, &class, readid_flags, id); |
623a3128 | 3879 | if (rc) |
fe30911b | 3880 | return rc; |
623a3128 TH |
3881 | |
3882 | /* is the device still there? */ | |
fe30911b TH |
3883 | if (!ata_dev_same_device(dev, class, id)) |
3884 | return -ENODEV; | |
623a3128 | 3885 | |
fe635c7e | 3886 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
fe30911b TH |
3887 | return 0; |
3888 | } | |
3889 | ||
3890 | /** | |
3891 | * ata_dev_revalidate - Revalidate ATA device | |
3892 | * @dev: device to revalidate | |
422c9daa | 3893 | * @new_class: new class code |
fe30911b TH |
3894 | * @readid_flags: read ID flags |
3895 | * | |
3896 | * Re-read IDENTIFY page, make sure @dev is still attached to the | |
3897 | * port and reconfigure it according to the new IDENTIFY page. | |
3898 | * | |
3899 | * LOCKING: | |
3900 | * Kernel thread context (may sleep) | |
3901 | * | |
3902 | * RETURNS: | |
3903 | * 0 on success, negative errno otherwise | |
3904 | */ | |
422c9daa TH |
3905 | int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, |
3906 | unsigned int readid_flags) | |
fe30911b | 3907 | { |
6ddcd3b0 | 3908 | u64 n_sectors = dev->n_sectors; |
fe30911b TH |
3909 | int rc; |
3910 | ||
3911 | if (!ata_dev_enabled(dev)) | |
3912 | return -ENODEV; | |
3913 | ||
422c9daa TH |
3914 | /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ |
3915 | if (ata_class_enabled(new_class) && | |
3916 | new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) { | |
3917 | ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n", | |
3918 | dev->class, new_class); | |
3919 | rc = -ENODEV; | |
3920 | goto fail; | |
3921 | } | |
3922 | ||
fe30911b TH |
3923 | /* re-read ID */ |
3924 | rc = ata_dev_reread_id(dev, readid_flags); | |
3925 | if (rc) | |
3926 | goto fail; | |
623a3128 TH |
3927 | |
3928 | /* configure device according to the new ID */ | |
efdaedc4 | 3929 | rc = ata_dev_configure(dev); |
6ddcd3b0 TH |
3930 | if (rc) |
3931 | goto fail; | |
3932 | ||
3933 | /* verify n_sectors hasn't changed */ | |
b54eebd6 TH |
3934 | if (dev->class == ATA_DEV_ATA && n_sectors && |
3935 | dev->n_sectors != n_sectors) { | |
6ddcd3b0 TH |
3936 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
3937 | "%llu != %llu\n", | |
3938 | (unsigned long long)n_sectors, | |
3939 | (unsigned long long)dev->n_sectors); | |
8270bec4 TH |
3940 | |
3941 | /* restore original n_sectors */ | |
3942 | dev->n_sectors = n_sectors; | |
3943 | ||
6ddcd3b0 TH |
3944 | rc = -ENODEV; |
3945 | goto fail; | |
3946 | } | |
3947 | ||
3948 | return 0; | |
623a3128 TH |
3949 | |
3950 | fail: | |
f15a1daf | 3951 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
3952 | return rc; |
3953 | } | |
3954 | ||
6919a0a6 AC |
3955 | struct ata_blacklist_entry { |
3956 | const char *model_num; | |
3957 | const char *model_rev; | |
3958 | unsigned long horkage; | |
3959 | }; | |
3960 | ||
3961 | static const struct ata_blacklist_entry ata_device_blacklist [] = { | |
3962 | /* Devices with DMA related problems under Linux */ | |
3963 | { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, | |
3964 | { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, | |
3965 | { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, | |
3966 | { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, | |
3967 | { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, | |
3968 | { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, | |
3969 | { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, | |
3970 | { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, | |
3971 | { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, | |
3972 | { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, | |
3973 | { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, | |
3974 | { "CRD-84", NULL, ATA_HORKAGE_NODMA }, | |
3975 | { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, | |
3976 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
3977 | { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, | |
3978 | { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, | |
3979 | { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, | |
3980 | { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, | |
3981 | { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, | |
3982 | { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, | |
3983 | { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, | |
3984 | { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, | |
3985 | { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, | |
3986 | { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, | |
3987 | { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, | |
3988 | { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, | |
6919a0a6 AC |
3989 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, |
3990 | { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, | |
2dcb407e | 3991 | { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, |
39f19886 | 3992 | { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, |
3af9a77a TH |
3993 | /* Odd clown on sil3726/4726 PMPs */ |
3994 | { "Config Disk", NULL, ATA_HORKAGE_NODMA | | |
3995 | ATA_HORKAGE_SKIP_PM }, | |
6919a0a6 | 3996 | |
18d6e9d5 | 3997 | /* Weird ATAPI devices */ |
40a1d531 | 3998 | { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, |
18d6e9d5 | 3999 | |
6919a0a6 AC |
4000 | /* Devices we expect to fail diagnostics */ |
4001 | ||
4002 | /* Devices where NCQ should be avoided */ | |
4003 | /* NCQ is slow */ | |
2dcb407e | 4004 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, |
09125ea6 TH |
4005 | /* http://thread.gmane.org/gmane.linux.ide/14907 */ |
4006 | { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, | |
7acfaf30 | 4007 | /* NCQ is broken */ |
539cc7c7 | 4008 | { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ }, |
0e3dbc01 | 4009 | { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ }, |
0b0a43e0 DM |
4010 | { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ }, |
4011 | { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ }, | |
da6f0ec2 | 4012 | { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ }, |
539cc7c7 | 4013 | |
36e337d0 RH |
4014 | /* Blacklist entries taken from Silicon Image 3124/3132 |
4015 | Windows driver .inf file - also several Linux problem reports */ | |
4016 | { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, | |
4017 | { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, | |
4018 | { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, | |
bd9c5a39 TH |
4019 | /* Drives which do spurious command completion */ |
4020 | { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, }, | |
2f8fcebb | 4021 | { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, }, |
70edb185 | 4022 | { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, }, |
e14cbfa6 | 4023 | { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, }, |
0c173174 | 4024 | { "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, }, |
2f8fcebb | 4025 | { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, |
7f567620 | 4026 | { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, }, |
a520f261 | 4027 | { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, |
7f567620 | 4028 | { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, }, |
3fb6589c | 4029 | { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, }, |
954bb005 | 4030 | { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, }, |
13587960 | 4031 | { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, }, |
7f567620 TH |
4032 | { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, }, |
4033 | { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, }, | |
5d6aca8d | 4034 | { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, }, |
6919a0a6 | 4035 | |
16c55b03 TH |
4036 | /* devices which puke on READ_NATIVE_MAX */ |
4037 | { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, | |
4038 | { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, | |
4039 | { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA }, | |
4040 | { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA }, | |
6919a0a6 | 4041 | |
93328e11 AC |
4042 | /* Devices which report 1 sector over size HPA */ |
4043 | { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, | |
4044 | { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, | |
4045 | ||
6919a0a6 AC |
4046 | /* End Marker */ |
4047 | { } | |
1da177e4 | 4048 | }; |
2e9edbf8 | 4049 | |
741b7763 | 4050 | static int strn_pattern_cmp(const char *patt, const char *name, int wildchar) |
539cc7c7 JG |
4051 | { |
4052 | const char *p; | |
4053 | int len; | |
4054 | ||
4055 | /* | |
4056 | * check for trailing wildcard: *\0 | |
4057 | */ | |
4058 | p = strchr(patt, wildchar); | |
4059 | if (p && ((*(p + 1)) == 0)) | |
4060 | len = p - patt; | |
317b50b8 | 4061 | else { |
539cc7c7 | 4062 | len = strlen(name); |
317b50b8 AP |
4063 | if (!len) { |
4064 | if (!*patt) | |
4065 | return 0; | |
4066 | return -1; | |
4067 | } | |
4068 | } | |
539cc7c7 JG |
4069 | |
4070 | return strncmp(patt, name, len); | |
4071 | } | |
4072 | ||
75683fe7 | 4073 | static unsigned long ata_dev_blacklisted(const struct ata_device *dev) |
1da177e4 | 4074 | { |
8bfa79fc TH |
4075 | unsigned char model_num[ATA_ID_PROD_LEN + 1]; |
4076 | unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; | |
6919a0a6 | 4077 | const struct ata_blacklist_entry *ad = ata_device_blacklist; |
3a778275 | 4078 | |
8bfa79fc TH |
4079 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
4080 | ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); | |
1da177e4 | 4081 | |
6919a0a6 | 4082 | while (ad->model_num) { |
539cc7c7 | 4083 | if (!strn_pattern_cmp(ad->model_num, model_num, '*')) { |
6919a0a6 AC |
4084 | if (ad->model_rev == NULL) |
4085 | return ad->horkage; | |
539cc7c7 | 4086 | if (!strn_pattern_cmp(ad->model_rev, model_rev, '*')) |
6919a0a6 | 4087 | return ad->horkage; |
f4b15fef | 4088 | } |
6919a0a6 | 4089 | ad++; |
f4b15fef | 4090 | } |
1da177e4 LT |
4091 | return 0; |
4092 | } | |
4093 | ||
6919a0a6 AC |
4094 | static int ata_dma_blacklisted(const struct ata_device *dev) |
4095 | { | |
4096 | /* We don't support polling DMA. | |
4097 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
4098 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
4099 | */ | |
9af5c9c9 | 4100 | if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) && |
6919a0a6 AC |
4101 | (dev->flags & ATA_DFLAG_CDB_INTR)) |
4102 | return 1; | |
75683fe7 | 4103 | return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0; |
6919a0a6 AC |
4104 | } |
4105 | ||
a6d5a51c TH |
4106 | /** |
4107 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
4108 | * @dev: Device to compute xfermask for |
4109 | * | |
acf356b1 TH |
4110 | * Compute supported xfermask of @dev and store it in |
4111 | * dev->*_mask. This function is responsible for applying all | |
4112 | * known limits including host controller limits, device | |
4113 | * blacklist, etc... | |
a6d5a51c TH |
4114 | * |
4115 | * LOCKING: | |
4116 | * None. | |
a6d5a51c | 4117 | */ |
3373efd8 | 4118 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 4119 | { |
9af5c9c9 TH |
4120 | struct ata_link *link = dev->link; |
4121 | struct ata_port *ap = link->ap; | |
cca3974e | 4122 | struct ata_host *host = ap->host; |
a6d5a51c | 4123 | unsigned long xfer_mask; |
1da177e4 | 4124 | |
37deecb5 | 4125 | /* controller modes available */ |
565083e1 TH |
4126 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
4127 | ap->mwdma_mask, ap->udma_mask); | |
4128 | ||
8343f889 | 4129 | /* drive modes available */ |
37deecb5 TH |
4130 | xfer_mask &= ata_pack_xfermask(dev->pio_mask, |
4131 | dev->mwdma_mask, dev->udma_mask); | |
4132 | xfer_mask &= ata_id_xfermask(dev->id); | |
565083e1 | 4133 | |
b352e57d AC |
4134 | /* |
4135 | * CFA Advanced TrueIDE timings are not allowed on a shared | |
4136 | * cable | |
4137 | */ | |
4138 | if (ata_dev_pair(dev)) { | |
4139 | /* No PIO5 or PIO6 */ | |
4140 | xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); | |
4141 | /* No MWDMA3 or MWDMA 4 */ | |
4142 | xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); | |
4143 | } | |
4144 | ||
37deecb5 TH |
4145 | if (ata_dma_blacklisted(dev)) { |
4146 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
f15a1daf TH |
4147 | ata_dev_printk(dev, KERN_WARNING, |
4148 | "device is on DMA blacklist, disabling DMA\n"); | |
37deecb5 | 4149 | } |
a6d5a51c | 4150 | |
14d66ab7 | 4151 | if ((host->flags & ATA_HOST_SIMPLEX) && |
2dcb407e | 4152 | host->simplex_claimed && host->simplex_claimed != ap) { |
37deecb5 TH |
4153 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
4154 | ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " | |
4155 | "other device, disabling DMA\n"); | |
5444a6f4 | 4156 | } |
565083e1 | 4157 | |
e424675f JG |
4158 | if (ap->flags & ATA_FLAG_NO_IORDY) |
4159 | xfer_mask &= ata_pio_mask_no_iordy(dev); | |
4160 | ||
5444a6f4 | 4161 | if (ap->ops->mode_filter) |
a76b62ca | 4162 | xfer_mask = ap->ops->mode_filter(dev, xfer_mask); |
5444a6f4 | 4163 | |
8343f889 RH |
4164 | /* Apply cable rule here. Don't apply it early because when |
4165 | * we handle hot plug the cable type can itself change. | |
4166 | * Check this last so that we know if the transfer rate was | |
4167 | * solely limited by the cable. | |
4168 | * Unknown or 80 wire cables reported host side are checked | |
4169 | * drive side as well. Cases where we know a 40wire cable | |
4170 | * is used safely for 80 are not checked here. | |
4171 | */ | |
4172 | if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) | |
4173 | /* UDMA/44 or higher would be available */ | |
2dcb407e JG |
4174 | if ((ap->cbl == ATA_CBL_PATA40) || |
4175 | (ata_drive_40wire(dev->id) && | |
4176 | (ap->cbl == ATA_CBL_PATA_UNK || | |
4177 | ap->cbl == ATA_CBL_PATA80))) { | |
4178 | ata_dev_printk(dev, KERN_WARNING, | |
8343f889 RH |
4179 | "limited to UDMA/33 due to 40-wire cable\n"); |
4180 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
4181 | } | |
4182 | ||
565083e1 TH |
4183 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
4184 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
4185 | } |
4186 | ||
1da177e4 LT |
4187 | /** |
4188 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
4189 | * @dev: Device to which command will be sent |
4190 | * | |
780a87f7 JG |
4191 | * Issue SET FEATURES - XFER MODE command to device @dev |
4192 | * on port @ap. | |
4193 | * | |
1da177e4 | 4194 | * LOCKING: |
0cba632b | 4195 | * PCI/etc. bus probe sem. |
83206a29 TH |
4196 | * |
4197 | * RETURNS: | |
4198 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
4199 | */ |
4200 | ||
3373efd8 | 4201 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 4202 | { |
a0123703 | 4203 | struct ata_taskfile tf; |
83206a29 | 4204 | unsigned int err_mask; |
1da177e4 LT |
4205 | |
4206 | /* set up set-features taskfile */ | |
4207 | DPRINTK("set features - xfer mode\n"); | |
4208 | ||
464cf177 TH |
4209 | /* Some controllers and ATAPI devices show flaky interrupt |
4210 | * behavior after setting xfer mode. Use polling instead. | |
4211 | */ | |
3373efd8 | 4212 | ata_tf_init(dev, &tf); |
a0123703 TH |
4213 | tf.command = ATA_CMD_SET_FEATURES; |
4214 | tf.feature = SETFEATURES_XFER; | |
464cf177 | 4215 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; |
a0123703 TH |
4216 | tf.protocol = ATA_PROT_NODATA; |
4217 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 4218 | |
2b789108 | 4219 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
9f45cbd3 KCA |
4220 | |
4221 | DPRINTK("EXIT, err_mask=%x\n", err_mask); | |
4222 | return err_mask; | |
4223 | } | |
9f45cbd3 | 4224 | /** |
218f3d30 | 4225 | * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES |
9f45cbd3 KCA |
4226 | * @dev: Device to which command will be sent |
4227 | * @enable: Whether to enable or disable the feature | |
218f3d30 | 4228 | * @feature: The sector count represents the feature to set |
9f45cbd3 KCA |
4229 | * |
4230 | * Issue SET FEATURES - SATA FEATURES command to device @dev | |
218f3d30 | 4231 | * on port @ap with sector count |
9f45cbd3 KCA |
4232 | * |
4233 | * LOCKING: | |
4234 | * PCI/etc. bus probe sem. | |
4235 | * | |
4236 | * RETURNS: | |
4237 | * 0 on success, AC_ERR_* mask otherwise. | |
4238 | */ | |
218f3d30 JG |
4239 | static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, |
4240 | u8 feature) | |
9f45cbd3 KCA |
4241 | { |
4242 | struct ata_taskfile tf; | |
4243 | unsigned int err_mask; | |
4244 | ||
4245 | /* set up set-features taskfile */ | |
4246 | DPRINTK("set features - SATA features\n"); | |
4247 | ||
4248 | ata_tf_init(dev, &tf); | |
4249 | tf.command = ATA_CMD_SET_FEATURES; | |
4250 | tf.feature = enable; | |
4251 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
4252 | tf.protocol = ATA_PROT_NODATA; | |
218f3d30 | 4253 | tf.nsect = feature; |
9f45cbd3 | 4254 | |
2b789108 | 4255 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
1da177e4 | 4256 | |
83206a29 TH |
4257 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
4258 | return err_mask; | |
1da177e4 LT |
4259 | } |
4260 | ||
8bf62ece AL |
4261 | /** |
4262 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 4263 | * @dev: Device to which command will be sent |
e2a7f77a RD |
4264 | * @heads: Number of heads (taskfile parameter) |
4265 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
4266 | * |
4267 | * LOCKING: | |
6aff8f1f TH |
4268 | * Kernel thread context (may sleep) |
4269 | * | |
4270 | * RETURNS: | |
4271 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 4272 | */ |
3373efd8 TH |
4273 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
4274 | u16 heads, u16 sectors) | |
8bf62ece | 4275 | { |
a0123703 | 4276 | struct ata_taskfile tf; |
6aff8f1f | 4277 | unsigned int err_mask; |
8bf62ece AL |
4278 | |
4279 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
4280 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 4281 | return AC_ERR_INVALID; |
8bf62ece AL |
4282 | |
4283 | /* set up init dev params taskfile */ | |
4284 | DPRINTK("init dev params \n"); | |
4285 | ||
3373efd8 | 4286 | ata_tf_init(dev, &tf); |
a0123703 TH |
4287 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
4288 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
4289 | tf.protocol = ATA_PROT_NODATA; | |
4290 | tf.nsect = sectors; | |
4291 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 4292 | |
2b789108 | 4293 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
18b2466c AC |
4294 | /* A clean abort indicates an original or just out of spec drive |
4295 | and we should continue as we issue the setup based on the | |
4296 | drive reported working geometry */ | |
4297 | if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) | |
4298 | err_mask = 0; | |
8bf62ece | 4299 | |
6aff8f1f TH |
4300 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
4301 | return err_mask; | |
8bf62ece AL |
4302 | } |
4303 | ||
1da177e4 | 4304 | /** |
0cba632b JG |
4305 | * ata_sg_clean - Unmap DMA memory associated with command |
4306 | * @qc: Command containing DMA memory to be released | |
4307 | * | |
4308 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
4309 | * |
4310 | * LOCKING: | |
cca3974e | 4311 | * spin_lock_irqsave(host lock) |
1da177e4 | 4312 | */ |
70e6ad0c | 4313 | void ata_sg_clean(struct ata_queued_cmd *qc) |
1da177e4 LT |
4314 | { |
4315 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 4316 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 4317 | int dir = qc->dma_dir; |
cedc9a47 | 4318 | void *pad_buf = NULL; |
1da177e4 | 4319 | |
a4631474 TH |
4320 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
4321 | WARN_ON(sg == NULL); | |
1da177e4 LT |
4322 | |
4323 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 4324 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 4325 | |
2c13b7ce | 4326 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 4327 | |
cedc9a47 JG |
4328 | /* if we padded the buffer out to 32-bit bound, and data |
4329 | * xfer direction is from-device, we must copy from the | |
4330 | * pad buffer back into the supplied buffer | |
4331 | */ | |
4332 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
4333 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4334 | ||
4335 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 4336 | if (qc->n_elem) |
2f1f610b | 4337 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 | 4338 | /* restore last sg */ |
87260216 | 4339 | sg_last(sg, qc->orig_n_elem)->length += qc->pad_len; |
cedc9a47 JG |
4340 | if (pad_buf) { |
4341 | struct scatterlist *psg = &qc->pad_sgent; | |
45711f1a | 4342 | void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); |
cedc9a47 | 4343 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); |
dfa15988 | 4344 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
4345 | } |
4346 | } else { | |
2e242fa9 | 4347 | if (qc->n_elem) |
2f1f610b | 4348 | dma_unmap_single(ap->dev, |
e1410f2d JG |
4349 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
4350 | dir); | |
cedc9a47 JG |
4351 | /* restore sg */ |
4352 | sg->length += qc->pad_len; | |
4353 | if (pad_buf) | |
4354 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
4355 | pad_buf, qc->pad_len); | |
4356 | } | |
1da177e4 LT |
4357 | |
4358 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 4359 | qc->__sg = NULL; |
1da177e4 LT |
4360 | } |
4361 | ||
4362 | /** | |
4363 | * ata_fill_sg - Fill PCI IDE PRD table | |
4364 | * @qc: Metadata associated with taskfile to be transferred | |
4365 | * | |
780a87f7 JG |
4366 | * Fill PCI IDE PRD (scatter-gather) table with segments |
4367 | * associated with the current disk command. | |
4368 | * | |
1da177e4 | 4369 | * LOCKING: |
cca3974e | 4370 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4371 | * |
4372 | */ | |
4373 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
4374 | { | |
1da177e4 | 4375 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
4376 | struct scatterlist *sg; |
4377 | unsigned int idx; | |
1da177e4 | 4378 | |
a4631474 | 4379 | WARN_ON(qc->__sg == NULL); |
f131883e | 4380 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
4381 | |
4382 | idx = 0; | |
cedc9a47 | 4383 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
4384 | u32 addr, offset; |
4385 | u32 sg_len, len; | |
4386 | ||
4387 | /* determine if physical DMA addr spans 64K boundary. | |
4388 | * Note h/w doesn't support 64-bit, so we unconditionally | |
4389 | * truncate dma_addr_t to u32. | |
4390 | */ | |
4391 | addr = (u32) sg_dma_address(sg); | |
4392 | sg_len = sg_dma_len(sg); | |
4393 | ||
4394 | while (sg_len) { | |
4395 | offset = addr & 0xffff; | |
4396 | len = sg_len; | |
4397 | if ((offset + sg_len) > 0x10000) | |
4398 | len = 0x10000 - offset; | |
4399 | ||
4400 | ap->prd[idx].addr = cpu_to_le32(addr); | |
4401 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
4402 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
4403 | ||
4404 | idx++; | |
4405 | sg_len -= len; | |
4406 | addr += len; | |
4407 | } | |
4408 | } | |
4409 | ||
4410 | if (idx) | |
4411 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
4412 | } | |
b9a4197e | 4413 | |
d26fc955 AC |
4414 | /** |
4415 | * ata_fill_sg_dumb - Fill PCI IDE PRD table | |
4416 | * @qc: Metadata associated with taskfile to be transferred | |
4417 | * | |
4418 | * Fill PCI IDE PRD (scatter-gather) table with segments | |
4419 | * associated with the current disk command. Perform the fill | |
4420 | * so that we avoid writing any length 64K records for | |
4421 | * controllers that don't follow the spec. | |
4422 | * | |
4423 | * LOCKING: | |
4424 | * spin_lock_irqsave(host lock) | |
4425 | * | |
4426 | */ | |
4427 | static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) | |
4428 | { | |
4429 | struct ata_port *ap = qc->ap; | |
4430 | struct scatterlist *sg; | |
4431 | unsigned int idx; | |
4432 | ||
4433 | WARN_ON(qc->__sg == NULL); | |
4434 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); | |
4435 | ||
4436 | idx = 0; | |
4437 | ata_for_each_sg(sg, qc) { | |
4438 | u32 addr, offset; | |
4439 | u32 sg_len, len, blen; | |
4440 | ||
2dcb407e | 4441 | /* determine if physical DMA addr spans 64K boundary. |
d26fc955 AC |
4442 | * Note h/w doesn't support 64-bit, so we unconditionally |
4443 | * truncate dma_addr_t to u32. | |
4444 | */ | |
4445 | addr = (u32) sg_dma_address(sg); | |
4446 | sg_len = sg_dma_len(sg); | |
4447 | ||
4448 | while (sg_len) { | |
4449 | offset = addr & 0xffff; | |
4450 | len = sg_len; | |
4451 | if ((offset + sg_len) > 0x10000) | |
4452 | len = 0x10000 - offset; | |
4453 | ||
4454 | blen = len & 0xffff; | |
4455 | ap->prd[idx].addr = cpu_to_le32(addr); | |
4456 | if (blen == 0) { | |
4457 | /* Some PATA chipsets like the CS5530 can't | |
4458 | cope with 0x0000 meaning 64K as the spec says */ | |
4459 | ap->prd[idx].flags_len = cpu_to_le32(0x8000); | |
4460 | blen = 0x8000; | |
4461 | ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); | |
4462 | } | |
4463 | ap->prd[idx].flags_len = cpu_to_le32(blen); | |
4464 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
4465 | ||
4466 | idx++; | |
4467 | sg_len -= len; | |
4468 | addr += len; | |
4469 | } | |
4470 | } | |
4471 | ||
4472 | if (idx) | |
4473 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
4474 | } | |
4475 | ||
1da177e4 LT |
4476 | /** |
4477 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
4478 | * @qc: Metadata associated with taskfile to check | |
4479 | * | |
780a87f7 JG |
4480 | * Allow low-level driver to filter ATA PACKET commands, returning |
4481 | * a status indicating whether or not it is OK to use DMA for the | |
4482 | * supplied PACKET command. | |
4483 | * | |
1da177e4 | 4484 | * LOCKING: |
cca3974e | 4485 | * spin_lock_irqsave(host lock) |
0cba632b | 4486 | * |
1da177e4 LT |
4487 | * RETURNS: 0 when ATAPI DMA can be used |
4488 | * nonzero otherwise | |
4489 | */ | |
4490 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
4491 | { | |
4492 | struct ata_port *ap = qc->ap; | |
b9a4197e TH |
4493 | |
4494 | /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a | |
4495 | * few ATAPI devices choke on such DMA requests. | |
4496 | */ | |
4497 | if (unlikely(qc->nbytes & 15)) | |
4498 | return 1; | |
6f23a31d | 4499 | |
1da177e4 | 4500 | if (ap->ops->check_atapi_dma) |
b9a4197e | 4501 | return ap->ops->check_atapi_dma(qc); |
1da177e4 | 4502 | |
b9a4197e | 4503 | return 0; |
1da177e4 | 4504 | } |
b9a4197e | 4505 | |
31cc23b3 TH |
4506 | /** |
4507 | * ata_std_qc_defer - Check whether a qc needs to be deferred | |
4508 | * @qc: ATA command in question | |
4509 | * | |
4510 | * Non-NCQ commands cannot run with any other command, NCQ or | |
4511 | * not. As upper layer only knows the queue depth, we are | |
4512 | * responsible for maintaining exclusion. This function checks | |
4513 | * whether a new command @qc can be issued. | |
4514 | * | |
4515 | * LOCKING: | |
4516 | * spin_lock_irqsave(host lock) | |
4517 | * | |
4518 | * RETURNS: | |
4519 | * ATA_DEFER_* if deferring is needed, 0 otherwise. | |
4520 | */ | |
4521 | int ata_std_qc_defer(struct ata_queued_cmd *qc) | |
4522 | { | |
4523 | struct ata_link *link = qc->dev->link; | |
4524 | ||
4525 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4526 | if (!ata_tag_valid(link->active_tag)) | |
4527 | return 0; | |
4528 | } else { | |
4529 | if (!ata_tag_valid(link->active_tag) && !link->sactive) | |
4530 | return 0; | |
4531 | } | |
4532 | ||
4533 | return ATA_DEFER_LINK; | |
4534 | } | |
4535 | ||
1da177e4 LT |
4536 | /** |
4537 | * ata_qc_prep - Prepare taskfile for submission | |
4538 | * @qc: Metadata associated with taskfile to be prepared | |
4539 | * | |
780a87f7 JG |
4540 | * Prepare ATA taskfile for submission. |
4541 | * | |
1da177e4 | 4542 | * LOCKING: |
cca3974e | 4543 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4544 | */ |
4545 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
4546 | { | |
4547 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4548 | return; | |
4549 | ||
4550 | ata_fill_sg(qc); | |
4551 | } | |
4552 | ||
d26fc955 AC |
4553 | /** |
4554 | * ata_dumb_qc_prep - Prepare taskfile for submission | |
4555 | * @qc: Metadata associated with taskfile to be prepared | |
4556 | * | |
4557 | * Prepare ATA taskfile for submission. | |
4558 | * | |
4559 | * LOCKING: | |
4560 | * spin_lock_irqsave(host lock) | |
4561 | */ | |
4562 | void ata_dumb_qc_prep(struct ata_queued_cmd *qc) | |
4563 | { | |
4564 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4565 | return; | |
4566 | ||
4567 | ata_fill_sg_dumb(qc); | |
4568 | } | |
4569 | ||
e46834cd BK |
4570 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
4571 | ||
0cba632b JG |
4572 | /** |
4573 | * ata_sg_init_one - Associate command with memory buffer | |
4574 | * @qc: Command to be associated | |
4575 | * @buf: Memory buffer | |
4576 | * @buflen: Length of memory buffer, in bytes. | |
4577 | * | |
4578 | * Initialize the data-related elements of queued_cmd @qc | |
4579 | * to point to a single memory buffer, @buf of byte length @buflen. | |
4580 | * | |
4581 | * LOCKING: | |
cca3974e | 4582 | * spin_lock_irqsave(host lock) |
0cba632b JG |
4583 | */ |
4584 | ||
1da177e4 LT |
4585 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
4586 | { | |
1da177e4 LT |
4587 | qc->flags |= ATA_QCFLAG_SINGLE; |
4588 | ||
cedc9a47 | 4589 | qc->__sg = &qc->sgent; |
1da177e4 | 4590 | qc->n_elem = 1; |
cedc9a47 | 4591 | qc->orig_n_elem = 1; |
1da177e4 | 4592 | qc->buf_virt = buf; |
233277ca | 4593 | qc->nbytes = buflen; |
87260216 | 4594 | qc->cursg = qc->__sg; |
1da177e4 | 4595 | |
61c0596c | 4596 | sg_init_one(&qc->sgent, buf, buflen); |
1da177e4 LT |
4597 | } |
4598 | ||
0cba632b JG |
4599 | /** |
4600 | * ata_sg_init - Associate command with scatter-gather table. | |
4601 | * @qc: Command to be associated | |
4602 | * @sg: Scatter-gather table. | |
4603 | * @n_elem: Number of elements in s/g table. | |
4604 | * | |
4605 | * Initialize the data-related elements of queued_cmd @qc | |
4606 | * to point to a scatter-gather table @sg, containing @n_elem | |
4607 | * elements. | |
4608 | * | |
4609 | * LOCKING: | |
cca3974e | 4610 | * spin_lock_irqsave(host lock) |
0cba632b JG |
4611 | */ |
4612 | ||
1da177e4 LT |
4613 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
4614 | unsigned int n_elem) | |
4615 | { | |
4616 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 4617 | qc->__sg = sg; |
1da177e4 | 4618 | qc->n_elem = n_elem; |
cedc9a47 | 4619 | qc->orig_n_elem = n_elem; |
87260216 | 4620 | qc->cursg = qc->__sg; |
1da177e4 LT |
4621 | } |
4622 | ||
4623 | /** | |
0cba632b JG |
4624 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
4625 | * @qc: Command with memory buffer to be mapped. | |
4626 | * | |
4627 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
4628 | * |
4629 | * LOCKING: | |
cca3974e | 4630 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4631 | * |
4632 | * RETURNS: | |
0cba632b | 4633 | * Zero on success, negative on error. |
1da177e4 LT |
4634 | */ |
4635 | ||
4636 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
4637 | { | |
4638 | struct ata_port *ap = qc->ap; | |
4639 | int dir = qc->dma_dir; | |
cedc9a47 | 4640 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 4641 | dma_addr_t dma_address; |
2e242fa9 | 4642 | int trim_sg = 0; |
1da177e4 | 4643 | |
cedc9a47 JG |
4644 | /* we must lengthen transfers to end on a 32-bit boundary */ |
4645 | qc->pad_len = sg->length & 3; | |
4646 | if (qc->pad_len) { | |
4647 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4648 | struct scatterlist *psg = &qc->pad_sgent; | |
4649 | ||
a4631474 | 4650 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
4651 | |
4652 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
4653 | ||
4654 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
4655 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
4656 | qc->pad_len); | |
4657 | ||
4658 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
4659 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
4660 | /* trim sg */ | |
4661 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
4662 | if (sg->length == 0) |
4663 | trim_sg = 1; | |
cedc9a47 JG |
4664 | |
4665 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
4666 | sg->length, qc->pad_len); | |
4667 | } | |
4668 | ||
2e242fa9 TH |
4669 | if (trim_sg) { |
4670 | qc->n_elem--; | |
e1410f2d JG |
4671 | goto skip_map; |
4672 | } | |
4673 | ||
2f1f610b | 4674 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 4675 | sg->length, dir); |
537a95d9 TH |
4676 | if (dma_mapping_error(dma_address)) { |
4677 | /* restore sg */ | |
4678 | sg->length += qc->pad_len; | |
1da177e4 | 4679 | return -1; |
537a95d9 | 4680 | } |
1da177e4 LT |
4681 | |
4682 | sg_dma_address(sg) = dma_address; | |
32529e01 | 4683 | sg_dma_len(sg) = sg->length; |
1da177e4 | 4684 | |
2e242fa9 | 4685 | skip_map: |
1da177e4 LT |
4686 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
4687 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
4688 | ||
4689 | return 0; | |
4690 | } | |
4691 | ||
4692 | /** | |
0cba632b JG |
4693 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
4694 | * @qc: Command with scatter-gather table to be mapped. | |
4695 | * | |
4696 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
4697 | * |
4698 | * LOCKING: | |
cca3974e | 4699 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4700 | * |
4701 | * RETURNS: | |
0cba632b | 4702 | * Zero on success, negative on error. |
1da177e4 LT |
4703 | * |
4704 | */ | |
4705 | ||
4706 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
4707 | { | |
4708 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 4709 | struct scatterlist *sg = qc->__sg; |
87260216 | 4710 | struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem); |
e1410f2d | 4711 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 | 4712 | |
44877b4e | 4713 | VPRINTK("ENTER, ata%u\n", ap->print_id); |
a4631474 | 4714 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 4715 | |
cedc9a47 JG |
4716 | /* we must lengthen transfers to end on a 32-bit boundary */ |
4717 | qc->pad_len = lsg->length & 3; | |
4718 | if (qc->pad_len) { | |
4719 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4720 | struct scatterlist *psg = &qc->pad_sgent; | |
4721 | unsigned int offset; | |
4722 | ||
a4631474 | 4723 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
4724 | |
4725 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
4726 | ||
4727 | /* | |
4728 | * psg->page/offset are used to copy to-be-written | |
4729 | * data in this function or read data in ata_sg_clean. | |
4730 | */ | |
4731 | offset = lsg->offset + lsg->length - qc->pad_len; | |
642f1490 JA |
4732 | sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT), |
4733 | qc->pad_len, offset_in_page(offset)); | |
cedc9a47 JG |
4734 | |
4735 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
45711f1a | 4736 | void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); |
cedc9a47 | 4737 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); |
dfa15988 | 4738 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
4739 | } |
4740 | ||
4741 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
4742 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
4743 | /* trim last sg */ | |
4744 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
4745 | if (lsg->length == 0) |
4746 | trim_sg = 1; | |
cedc9a47 JG |
4747 | |
4748 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
4749 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
4750 | } | |
4751 | ||
e1410f2d JG |
4752 | pre_n_elem = qc->n_elem; |
4753 | if (trim_sg && pre_n_elem) | |
4754 | pre_n_elem--; | |
4755 | ||
4756 | if (!pre_n_elem) { | |
4757 | n_elem = 0; | |
4758 | goto skip_map; | |
4759 | } | |
4760 | ||
1da177e4 | 4761 | dir = qc->dma_dir; |
2f1f610b | 4762 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
4763 | if (n_elem < 1) { |
4764 | /* restore last sg */ | |
4765 | lsg->length += qc->pad_len; | |
1da177e4 | 4766 | return -1; |
537a95d9 | 4767 | } |
1da177e4 LT |
4768 | |
4769 | DPRINTK("%d sg elements mapped\n", n_elem); | |
4770 | ||
e1410f2d | 4771 | skip_map: |
1da177e4 LT |
4772 | qc->n_elem = n_elem; |
4773 | ||
4774 | return 0; | |
4775 | } | |
4776 | ||
0baab86b | 4777 | /** |
c893a3ae | 4778 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
4779 | * @buf: Buffer to swap |
4780 | * @buf_words: Number of 16-bit words in buffer. | |
4781 | * | |
4782 | * Swap halves of 16-bit words if needed to convert from | |
4783 | * little-endian byte order to native cpu byte order, or | |
4784 | * vice-versa. | |
4785 | * | |
4786 | * LOCKING: | |
6f0ef4fa | 4787 | * Inherited from caller. |
0baab86b | 4788 | */ |
1da177e4 LT |
4789 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
4790 | { | |
4791 | #ifdef __BIG_ENDIAN | |
4792 | unsigned int i; | |
4793 | ||
4794 | for (i = 0; i < buf_words; i++) | |
4795 | buf[i] = le16_to_cpu(buf[i]); | |
4796 | #endif /* __BIG_ENDIAN */ | |
4797 | } | |
4798 | ||
6ae4cfb5 | 4799 | /** |
0d5ff566 | 4800 | * ata_data_xfer - Transfer data by PIO |
a6b2c5d4 | 4801 | * @adev: device to target |
6ae4cfb5 AL |
4802 | * @buf: data buffer |
4803 | * @buflen: buffer length | |
344babaa | 4804 | * @write_data: read/write |
6ae4cfb5 AL |
4805 | * |
4806 | * Transfer data from/to the device data register by PIO. | |
4807 | * | |
4808 | * LOCKING: | |
4809 | * Inherited from caller. | |
6ae4cfb5 | 4810 | */ |
0d5ff566 TH |
4811 | void ata_data_xfer(struct ata_device *adev, unsigned char *buf, |
4812 | unsigned int buflen, int write_data) | |
1da177e4 | 4813 | { |
9af5c9c9 | 4814 | struct ata_port *ap = adev->link->ap; |
6ae4cfb5 | 4815 | unsigned int words = buflen >> 1; |
1da177e4 | 4816 | |
6ae4cfb5 | 4817 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 4818 | if (write_data) |
0d5ff566 | 4819 | iowrite16_rep(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 4820 | else |
0d5ff566 | 4821 | ioread16_rep(ap->ioaddr.data_addr, buf, words); |
6ae4cfb5 AL |
4822 | |
4823 | /* Transfer trailing 1 byte, if any. */ | |
4824 | if (unlikely(buflen & 0x01)) { | |
4825 | u16 align_buf[1] = { 0 }; | |
4826 | unsigned char *trailing_buf = buf + buflen - 1; | |
4827 | ||
4828 | if (write_data) { | |
4829 | memcpy(align_buf, trailing_buf, 1); | |
0d5ff566 | 4830 | iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); |
6ae4cfb5 | 4831 | } else { |
0d5ff566 | 4832 | align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); |
6ae4cfb5 AL |
4833 | memcpy(trailing_buf, align_buf, 1); |
4834 | } | |
4835 | } | |
1da177e4 LT |
4836 | } |
4837 | ||
75e99585 | 4838 | /** |
0d5ff566 | 4839 | * ata_data_xfer_noirq - Transfer data by PIO |
75e99585 AC |
4840 | * @adev: device to target |
4841 | * @buf: data buffer | |
4842 | * @buflen: buffer length | |
4843 | * @write_data: read/write | |
4844 | * | |
88574551 | 4845 | * Transfer data from/to the device data register by PIO. Do the |
75e99585 AC |
4846 | * transfer with interrupts disabled. |
4847 | * | |
4848 | * LOCKING: | |
4849 | * Inherited from caller. | |
4850 | */ | |
0d5ff566 TH |
4851 | void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, |
4852 | unsigned int buflen, int write_data) | |
75e99585 AC |
4853 | { |
4854 | unsigned long flags; | |
4855 | local_irq_save(flags); | |
0d5ff566 | 4856 | ata_data_xfer(adev, buf, buflen, write_data); |
75e99585 AC |
4857 | local_irq_restore(flags); |
4858 | } | |
4859 | ||
4860 | ||
6ae4cfb5 | 4861 | /** |
5a5dbd18 | 4862 | * ata_pio_sector - Transfer a sector of data. |
6ae4cfb5 AL |
4863 | * @qc: Command on going |
4864 | * | |
5a5dbd18 | 4865 | * Transfer qc->sect_size bytes of data from/to the ATA device. |
6ae4cfb5 AL |
4866 | * |
4867 | * LOCKING: | |
4868 | * Inherited from caller. | |
4869 | */ | |
4870 | ||
1da177e4 LT |
4871 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
4872 | { | |
4873 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
1da177e4 LT |
4874 | struct ata_port *ap = qc->ap; |
4875 | struct page *page; | |
4876 | unsigned int offset; | |
4877 | unsigned char *buf; | |
4878 | ||
5a5dbd18 | 4879 | if (qc->curbytes == qc->nbytes - qc->sect_size) |
14be71f4 | 4880 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 | 4881 | |
45711f1a | 4882 | page = sg_page(qc->cursg); |
87260216 | 4883 | offset = qc->cursg->offset + qc->cursg_ofs; |
1da177e4 LT |
4884 | |
4885 | /* get the current page and offset */ | |
4886 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4887 | offset %= PAGE_SIZE; | |
4888 | ||
1da177e4 LT |
4889 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
4890 | ||
91b8b313 AL |
4891 | if (PageHighMem(page)) { |
4892 | unsigned long flags; | |
4893 | ||
a6b2c5d4 | 4894 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
4895 | local_irq_save(flags); |
4896 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 4897 | |
91b8b313 | 4898 | /* do the actual data transfer */ |
5a5dbd18 | 4899 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
1da177e4 | 4900 | |
91b8b313 AL |
4901 | kunmap_atomic(buf, KM_IRQ0); |
4902 | local_irq_restore(flags); | |
4903 | } else { | |
4904 | buf = page_address(page); | |
5a5dbd18 | 4905 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
91b8b313 | 4906 | } |
1da177e4 | 4907 | |
5a5dbd18 ML |
4908 | qc->curbytes += qc->sect_size; |
4909 | qc->cursg_ofs += qc->sect_size; | |
1da177e4 | 4910 | |
87260216 JA |
4911 | if (qc->cursg_ofs == qc->cursg->length) { |
4912 | qc->cursg = sg_next(qc->cursg); | |
1da177e4 LT |
4913 | qc->cursg_ofs = 0; |
4914 | } | |
1da177e4 | 4915 | } |
1da177e4 | 4916 | |
07f6f7d0 | 4917 | /** |
5a5dbd18 | 4918 | * ata_pio_sectors - Transfer one or many sectors. |
07f6f7d0 AL |
4919 | * @qc: Command on going |
4920 | * | |
5a5dbd18 | 4921 | * Transfer one or many sectors of data from/to the |
07f6f7d0 AL |
4922 | * ATA device for the DRQ request. |
4923 | * | |
4924 | * LOCKING: | |
4925 | * Inherited from caller. | |
4926 | */ | |
1da177e4 | 4927 | |
07f6f7d0 AL |
4928 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
4929 | { | |
4930 | if (is_multi_taskfile(&qc->tf)) { | |
4931 | /* READ/WRITE MULTIPLE */ | |
4932 | unsigned int nsect; | |
4933 | ||
587005de | 4934 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 4935 | |
5a5dbd18 | 4936 | nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, |
726f0785 | 4937 | qc->dev->multi_count); |
07f6f7d0 AL |
4938 | while (nsect--) |
4939 | ata_pio_sector(qc); | |
4940 | } else | |
4941 | ata_pio_sector(qc); | |
4cc980b3 AL |
4942 | |
4943 | ata_altstatus(qc->ap); /* flush */ | |
07f6f7d0 AL |
4944 | } |
4945 | ||
c71c1857 AL |
4946 | /** |
4947 | * atapi_send_cdb - Write CDB bytes to hardware | |
4948 | * @ap: Port to which ATAPI device is attached. | |
4949 | * @qc: Taskfile currently active | |
4950 | * | |
4951 | * When device has indicated its readiness to accept | |
4952 | * a CDB, this function is called. Send the CDB. | |
4953 | * | |
4954 | * LOCKING: | |
4955 | * caller. | |
4956 | */ | |
4957 | ||
4958 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
4959 | { | |
4960 | /* send SCSI cdb */ | |
4961 | DPRINTK("send cdb\n"); | |
db024d53 | 4962 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 4963 | |
a6b2c5d4 | 4964 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
4965 | ata_altstatus(ap); /* flush */ |
4966 | ||
4967 | switch (qc->tf.protocol) { | |
4968 | case ATA_PROT_ATAPI: | |
4969 | ap->hsm_task_state = HSM_ST; | |
4970 | break; | |
4971 | case ATA_PROT_ATAPI_NODATA: | |
4972 | ap->hsm_task_state = HSM_ST_LAST; | |
4973 | break; | |
4974 | case ATA_PROT_ATAPI_DMA: | |
4975 | ap->hsm_task_state = HSM_ST_LAST; | |
4976 | /* initiate bmdma */ | |
4977 | ap->ops->bmdma_start(qc); | |
4978 | break; | |
4979 | } | |
1da177e4 LT |
4980 | } |
4981 | ||
6ae4cfb5 AL |
4982 | /** |
4983 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4984 | * @qc: Command on going | |
4985 | * @bytes: number of bytes | |
4986 | * | |
4987 | * Transfer Transfer data from/to the ATAPI device. | |
4988 | * | |
4989 | * LOCKING: | |
4990 | * Inherited from caller. | |
4991 | * | |
4992 | */ | |
4993 | ||
1da177e4 LT |
4994 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
4995 | { | |
4996 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 4997 | struct scatterlist *sg = qc->__sg; |
0874ee76 | 4998 | struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem); |
1da177e4 LT |
4999 | struct ata_port *ap = qc->ap; |
5000 | struct page *page; | |
5001 | unsigned char *buf; | |
5002 | unsigned int offset, count; | |
0874ee76 | 5003 | int no_more_sg = 0; |
1da177e4 | 5004 | |
563a6e1f | 5005 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 5006 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
5007 | |
5008 | next_sg: | |
0874ee76 | 5009 | if (unlikely(no_more_sg)) { |
7fb6ec28 | 5010 | /* |
563a6e1f AL |
5011 | * The end of qc->sg is reached and the device expects |
5012 | * more data to transfer. In order not to overrun qc->sg | |
5013 | * and fulfill length specified in the byte count register, | |
5014 | * - for read case, discard trailing data from the device | |
5015 | * - for write case, padding zero data to the device | |
5016 | */ | |
5017 | u16 pad_buf[1] = { 0 }; | |
5018 | unsigned int words = bytes >> 1; | |
5019 | unsigned int i; | |
5020 | ||
5021 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
5022 | ata_dev_printk(qc->dev, KERN_WARNING, |
5023 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
5024 | |
5025 | for (i = 0; i < words; i++) | |
2dcb407e | 5026 | ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write); |
563a6e1f | 5027 | |
14be71f4 | 5028 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
5029 | return; |
5030 | } | |
5031 | ||
87260216 | 5032 | sg = qc->cursg; |
1da177e4 | 5033 | |
45711f1a | 5034 | page = sg_page(sg); |
1da177e4 LT |
5035 | offset = sg->offset + qc->cursg_ofs; |
5036 | ||
5037 | /* get the current page and offset */ | |
5038 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
5039 | offset %= PAGE_SIZE; | |
5040 | ||
6952df03 | 5041 | /* don't overrun current sg */ |
32529e01 | 5042 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
5043 | |
5044 | /* don't cross page boundaries */ | |
5045 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
5046 | ||
7282aa4b AL |
5047 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
5048 | ||
91b8b313 AL |
5049 | if (PageHighMem(page)) { |
5050 | unsigned long flags; | |
5051 | ||
a6b2c5d4 | 5052 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
5053 | local_irq_save(flags); |
5054 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 5055 | |
91b8b313 | 5056 | /* do the actual data transfer */ |
a6b2c5d4 | 5057 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 5058 | |
91b8b313 AL |
5059 | kunmap_atomic(buf, KM_IRQ0); |
5060 | local_irq_restore(flags); | |
5061 | } else { | |
5062 | buf = page_address(page); | |
a6b2c5d4 | 5063 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 5064 | } |
1da177e4 LT |
5065 | |
5066 | bytes -= count; | |
5067 | qc->curbytes += count; | |
5068 | qc->cursg_ofs += count; | |
5069 | ||
32529e01 | 5070 | if (qc->cursg_ofs == sg->length) { |
0874ee76 FT |
5071 | if (qc->cursg == lsg) |
5072 | no_more_sg = 1; | |
5073 | ||
87260216 | 5074 | qc->cursg = sg_next(qc->cursg); |
1da177e4 LT |
5075 | qc->cursg_ofs = 0; |
5076 | } | |
5077 | ||
563a6e1f | 5078 | if (bytes) |
1da177e4 | 5079 | goto next_sg; |
1da177e4 LT |
5080 | } |
5081 | ||
6ae4cfb5 AL |
5082 | /** |
5083 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
5084 | * @qc: Command on going | |
5085 | * | |
5086 | * Transfer Transfer data from/to the ATAPI device. | |
5087 | * | |
5088 | * LOCKING: | |
5089 | * Inherited from caller. | |
6ae4cfb5 AL |
5090 | */ |
5091 | ||
1da177e4 LT |
5092 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
5093 | { | |
5094 | struct ata_port *ap = qc->ap; | |
5095 | struct ata_device *dev = qc->dev; | |
5096 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
5097 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
5098 | ||
eec4c3f3 AL |
5099 | /* Abuse qc->result_tf for temp storage of intermediate TF |
5100 | * here to save some kernel stack usage. | |
5101 | * For normal completion, qc->result_tf is not relevant. For | |
5102 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
5103 | * So, the correctness of qc->result_tf is not affected. | |
5104 | */ | |
5105 | ap->ops->tf_read(ap, &qc->result_tf); | |
5106 | ireason = qc->result_tf.nsect; | |
5107 | bc_lo = qc->result_tf.lbam; | |
5108 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
5109 | bytes = (bc_hi << 8) | bc_lo; |
5110 | ||
5111 | /* shall be cleared to zero, indicating xfer of data */ | |
5112 | if (ireason & (1 << 0)) | |
5113 | goto err_out; | |
5114 | ||
5115 | /* make sure transfer direction matches expected */ | |
5116 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
5117 | if (do_write != i_write) | |
5118 | goto err_out; | |
5119 | ||
44877b4e | 5120 | VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); |
312f7da2 | 5121 | |
1da177e4 | 5122 | __atapi_pio_bytes(qc, bytes); |
4cc980b3 | 5123 | ata_altstatus(ap); /* flush */ |
1da177e4 LT |
5124 | |
5125 | return; | |
5126 | ||
5127 | err_out: | |
f15a1daf | 5128 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 5129 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 5130 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
5131 | } |
5132 | ||
5133 | /** | |
c234fb00 AL |
5134 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
5135 | * @ap: the target ata_port | |
5136 | * @qc: qc on going | |
1da177e4 | 5137 | * |
c234fb00 AL |
5138 | * RETURNS: |
5139 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 5140 | */ |
c234fb00 AL |
5141 | |
5142 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 5143 | { |
c234fb00 AL |
5144 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5145 | return 1; | |
1da177e4 | 5146 | |
c234fb00 AL |
5147 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
5148 | if (qc->tf.protocol == ATA_PROT_PIO && | |
5149 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
5150 | return 1; | |
1da177e4 | 5151 | |
c234fb00 AL |
5152 | if (is_atapi_taskfile(&qc->tf) && |
5153 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
5154 | return 1; | |
fe79e683 AL |
5155 | } |
5156 | ||
c234fb00 AL |
5157 | return 0; |
5158 | } | |
1da177e4 | 5159 | |
c17ea20d TH |
5160 | /** |
5161 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
5162 | * @qc: Command to complete | |
5163 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
5164 | * | |
5165 | * Finish @qc which is running on standard HSM. | |
5166 | * | |
5167 | * LOCKING: | |
cca3974e | 5168 | * If @in_wq is zero, spin_lock_irqsave(host lock). |
c17ea20d TH |
5169 | * Otherwise, none on entry and grabs host lock. |
5170 | */ | |
5171 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
5172 | { | |
5173 | struct ata_port *ap = qc->ap; | |
5174 | unsigned long flags; | |
5175 | ||
5176 | if (ap->ops->error_handler) { | |
5177 | if (in_wq) { | |
ba6a1308 | 5178 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d | 5179 | |
cca3974e JG |
5180 | /* EH might have kicked in while host lock is |
5181 | * released. | |
c17ea20d TH |
5182 | */ |
5183 | qc = ata_qc_from_tag(ap, qc->tag); | |
5184 | if (qc) { | |
5185 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
83625006 | 5186 | ap->ops->irq_on(ap); |
c17ea20d TH |
5187 | ata_qc_complete(qc); |
5188 | } else | |
5189 | ata_port_freeze(ap); | |
5190 | } | |
5191 | ||
ba6a1308 | 5192 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
5193 | } else { |
5194 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
5195 | ata_qc_complete(qc); | |
5196 | else | |
5197 | ata_port_freeze(ap); | |
5198 | } | |
5199 | } else { | |
5200 | if (in_wq) { | |
ba6a1308 | 5201 | spin_lock_irqsave(ap->lock, flags); |
83625006 | 5202 | ap->ops->irq_on(ap); |
c17ea20d | 5203 | ata_qc_complete(qc); |
ba6a1308 | 5204 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
5205 | } else |
5206 | ata_qc_complete(qc); | |
5207 | } | |
5208 | } | |
5209 | ||
bb5cb290 AL |
5210 | /** |
5211 | * ata_hsm_move - move the HSM to the next state. | |
5212 | * @ap: the target ata_port | |
5213 | * @qc: qc on going | |
5214 | * @status: current device status | |
5215 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
5216 | * | |
5217 | * RETURNS: | |
5218 | * 1 when poll next status needed, 0 otherwise. | |
5219 | */ | |
9a1004d0 TH |
5220 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
5221 | u8 status, int in_wq) | |
e2cec771 | 5222 | { |
bb5cb290 AL |
5223 | unsigned long flags = 0; |
5224 | int poll_next; | |
5225 | ||
6912ccd5 AL |
5226 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
5227 | ||
bb5cb290 AL |
5228 | /* Make sure ata_qc_issue_prot() does not throw things |
5229 | * like DMA polling into the workqueue. Notice that | |
5230 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
5231 | */ | |
c234fb00 | 5232 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 5233 | |
e2cec771 | 5234 | fsm_start: |
999bb6f4 | 5235 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
44877b4e | 5236 | ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); |
999bb6f4 | 5237 | |
e2cec771 AL |
5238 | switch (ap->hsm_task_state) { |
5239 | case HSM_ST_FIRST: | |
bb5cb290 AL |
5240 | /* Send first data block or PACKET CDB */ |
5241 | ||
5242 | /* If polling, we will stay in the work queue after | |
5243 | * sending the data. Otherwise, interrupt handler | |
5244 | * takes over after sending the data. | |
5245 | */ | |
5246 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
5247 | ||
e2cec771 | 5248 | /* check device status */ |
3655d1d3 AL |
5249 | if (unlikely((status & ATA_DRQ) == 0)) { |
5250 | /* handle BSY=0, DRQ=0 as error */ | |
5251 | if (likely(status & (ATA_ERR | ATA_DF))) | |
5252 | /* device stops HSM for abort/error */ | |
5253 | qc->err_mask |= AC_ERR_DEV; | |
5254 | else | |
5255 | /* HSM violation. Let EH handle this */ | |
5256 | qc->err_mask |= AC_ERR_HSM; | |
5257 | ||
14be71f4 | 5258 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 5259 | goto fsm_start; |
1da177e4 LT |
5260 | } |
5261 | ||
71601958 AL |
5262 | /* Device should not ask for data transfer (DRQ=1) |
5263 | * when it finds something wrong. | |
eee6c32f AL |
5264 | * We ignore DRQ here and stop the HSM by |
5265 | * changing hsm_task_state to HSM_ST_ERR and | |
5266 | * let the EH abort the command or reset the device. | |
71601958 AL |
5267 | */ |
5268 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
44877b4e TH |
5269 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device " |
5270 | "error, dev_stat 0x%X\n", status); | |
3655d1d3 | 5271 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
5272 | ap->hsm_task_state = HSM_ST_ERR; |
5273 | goto fsm_start; | |
71601958 | 5274 | } |
1da177e4 | 5275 | |
bb5cb290 AL |
5276 | /* Send the CDB (atapi) or the first data block (ata pio out). |
5277 | * During the state transition, interrupt handler shouldn't | |
5278 | * be invoked before the data transfer is complete and | |
5279 | * hsm_task_state is changed. Hence, the following locking. | |
5280 | */ | |
5281 | if (in_wq) | |
ba6a1308 | 5282 | spin_lock_irqsave(ap->lock, flags); |
1da177e4 | 5283 | |
bb5cb290 AL |
5284 | if (qc->tf.protocol == ATA_PROT_PIO) { |
5285 | /* PIO data out protocol. | |
5286 | * send first data block. | |
5287 | */ | |
0565c26d | 5288 | |
bb5cb290 AL |
5289 | /* ata_pio_sectors() might change the state |
5290 | * to HSM_ST_LAST. so, the state is changed here | |
5291 | * before ata_pio_sectors(). | |
5292 | */ | |
5293 | ap->hsm_task_state = HSM_ST; | |
5294 | ata_pio_sectors(qc); | |
bb5cb290 AL |
5295 | } else |
5296 | /* send CDB */ | |
5297 | atapi_send_cdb(ap, qc); | |
5298 | ||
5299 | if (in_wq) | |
ba6a1308 | 5300 | spin_unlock_irqrestore(ap->lock, flags); |
bb5cb290 AL |
5301 | |
5302 | /* if polling, ata_pio_task() handles the rest. | |
5303 | * otherwise, interrupt handler takes over from here. | |
5304 | */ | |
e2cec771 | 5305 | break; |
1c848984 | 5306 | |
e2cec771 AL |
5307 | case HSM_ST: |
5308 | /* complete command or read/write the data register */ | |
5309 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
5310 | /* ATAPI PIO protocol */ | |
5311 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
5312 | /* No more data to transfer or device error. |
5313 | * Device error will be tagged in HSM_ST_LAST. | |
5314 | */ | |
e2cec771 AL |
5315 | ap->hsm_task_state = HSM_ST_LAST; |
5316 | goto fsm_start; | |
5317 | } | |
1da177e4 | 5318 | |
71601958 AL |
5319 | /* Device should not ask for data transfer (DRQ=1) |
5320 | * when it finds something wrong. | |
eee6c32f AL |
5321 | * We ignore DRQ here and stop the HSM by |
5322 | * changing hsm_task_state to HSM_ST_ERR and | |
5323 | * let the EH abort the command or reset the device. | |
71601958 AL |
5324 | */ |
5325 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
44877b4e TH |
5326 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " |
5327 | "device error, dev_stat 0x%X\n", | |
5328 | status); | |
3655d1d3 | 5329 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
5330 | ap->hsm_task_state = HSM_ST_ERR; |
5331 | goto fsm_start; | |
71601958 | 5332 | } |
1da177e4 | 5333 | |
e2cec771 | 5334 | atapi_pio_bytes(qc); |
7fb6ec28 | 5335 | |
e2cec771 AL |
5336 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
5337 | /* bad ireason reported by device */ | |
5338 | goto fsm_start; | |
1da177e4 | 5339 | |
e2cec771 AL |
5340 | } else { |
5341 | /* ATA PIO protocol */ | |
5342 | if (unlikely((status & ATA_DRQ) == 0)) { | |
5343 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
5344 | if (likely(status & (ATA_ERR | ATA_DF))) |
5345 | /* device stops HSM for abort/error */ | |
5346 | qc->err_mask |= AC_ERR_DEV; | |
5347 | else | |
55a8e2c8 TH |
5348 | /* HSM violation. Let EH handle this. |
5349 | * Phantom devices also trigger this | |
5350 | * condition. Mark hint. | |
5351 | */ | |
5352 | qc->err_mask |= AC_ERR_HSM | | |
5353 | AC_ERR_NODEV_HINT; | |
3655d1d3 | 5354 | |
e2cec771 AL |
5355 | ap->hsm_task_state = HSM_ST_ERR; |
5356 | goto fsm_start; | |
5357 | } | |
1da177e4 | 5358 | |
eee6c32f AL |
5359 | /* For PIO reads, some devices may ask for |
5360 | * data transfer (DRQ=1) alone with ERR=1. | |
5361 | * We respect DRQ here and transfer one | |
5362 | * block of junk data before changing the | |
5363 | * hsm_task_state to HSM_ST_ERR. | |
5364 | * | |
5365 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
5366 | * sense since the data block has been | |
5367 | * transferred to the device. | |
71601958 AL |
5368 | */ |
5369 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
5370 | /* data might be corrputed */ |
5371 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
5372 | |
5373 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
5374 | ata_pio_sectors(qc); | |
eee6c32f AL |
5375 | status = ata_wait_idle(ap); |
5376 | } | |
5377 | ||
3655d1d3 AL |
5378 | if (status & (ATA_BUSY | ATA_DRQ)) |
5379 | qc->err_mask |= AC_ERR_HSM; | |
5380 | ||
eee6c32f AL |
5381 | /* ata_pio_sectors() might change the |
5382 | * state to HSM_ST_LAST. so, the state | |
5383 | * is changed after ata_pio_sectors(). | |
5384 | */ | |
5385 | ap->hsm_task_state = HSM_ST_ERR; | |
5386 | goto fsm_start; | |
71601958 AL |
5387 | } |
5388 | ||
e2cec771 AL |
5389 | ata_pio_sectors(qc); |
5390 | ||
5391 | if (ap->hsm_task_state == HSM_ST_LAST && | |
5392 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
5393 | /* all data read */ | |
52a32205 | 5394 | status = ata_wait_idle(ap); |
e2cec771 AL |
5395 | goto fsm_start; |
5396 | } | |
5397 | } | |
5398 | ||
bb5cb290 | 5399 | poll_next = 1; |
1da177e4 LT |
5400 | break; |
5401 | ||
14be71f4 | 5402 | case HSM_ST_LAST: |
6912ccd5 AL |
5403 | if (unlikely(!ata_ok(status))) { |
5404 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
5405 | ap->hsm_task_state = HSM_ST_ERR; |
5406 | goto fsm_start; | |
5407 | } | |
5408 | ||
5409 | /* no more data to transfer */ | |
4332a771 | 5410 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
44877b4e | 5411 | ap->print_id, qc->dev->devno, status); |
e2cec771 | 5412 | |
6912ccd5 AL |
5413 | WARN_ON(qc->err_mask); |
5414 | ||
e2cec771 | 5415 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 5416 | |
e2cec771 | 5417 | /* complete taskfile transaction */ |
c17ea20d | 5418 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
5419 | |
5420 | poll_next = 0; | |
1da177e4 LT |
5421 | break; |
5422 | ||
14be71f4 | 5423 | case HSM_ST_ERR: |
e2cec771 AL |
5424 | /* make sure qc->err_mask is available to |
5425 | * know what's wrong and recover | |
5426 | */ | |
5427 | WARN_ON(qc->err_mask == 0); | |
5428 | ||
5429 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 5430 | |
999bb6f4 | 5431 | /* complete taskfile transaction */ |
c17ea20d | 5432 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
5433 | |
5434 | poll_next = 0; | |
e2cec771 AL |
5435 | break; |
5436 | default: | |
bb5cb290 | 5437 | poll_next = 0; |
6912ccd5 | 5438 | BUG(); |
1da177e4 LT |
5439 | } |
5440 | ||
bb5cb290 | 5441 | return poll_next; |
1da177e4 LT |
5442 | } |
5443 | ||
65f27f38 | 5444 | static void ata_pio_task(struct work_struct *work) |
8061f5f0 | 5445 | { |
65f27f38 DH |
5446 | struct ata_port *ap = |
5447 | container_of(work, struct ata_port, port_task.work); | |
5448 | struct ata_queued_cmd *qc = ap->port_task_data; | |
8061f5f0 | 5449 | u8 status; |
a1af3734 | 5450 | int poll_next; |
8061f5f0 | 5451 | |
7fb6ec28 | 5452 | fsm_start: |
a1af3734 | 5453 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 5454 | |
a1af3734 AL |
5455 | /* |
5456 | * This is purely heuristic. This is a fast path. | |
5457 | * Sometimes when we enter, BSY will be cleared in | |
5458 | * a chk-status or two. If not, the drive is probably seeking | |
5459 | * or something. Snooze for a couple msecs, then | |
5460 | * chk-status again. If still busy, queue delayed work. | |
5461 | */ | |
5462 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
5463 | if (status & ATA_BUSY) { | |
5464 | msleep(2); | |
5465 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
5466 | if (status & ATA_BUSY) { | |
31ce6dae | 5467 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
5468 | return; |
5469 | } | |
8061f5f0 TH |
5470 | } |
5471 | ||
a1af3734 AL |
5472 | /* move the HSM */ |
5473 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 5474 | |
a1af3734 AL |
5475 | /* another command or interrupt handler |
5476 | * may be running at this point. | |
5477 | */ | |
5478 | if (poll_next) | |
7fb6ec28 | 5479 | goto fsm_start; |
8061f5f0 TH |
5480 | } |
5481 | ||
1da177e4 LT |
5482 | /** |
5483 | * ata_qc_new - Request an available ATA command, for queueing | |
5484 | * @ap: Port associated with device @dev | |
5485 | * @dev: Device from whom we request an available command structure | |
5486 | * | |
5487 | * LOCKING: | |
0cba632b | 5488 | * None. |
1da177e4 LT |
5489 | */ |
5490 | ||
5491 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
5492 | { | |
5493 | struct ata_queued_cmd *qc = NULL; | |
5494 | unsigned int i; | |
5495 | ||
e3180499 | 5496 | /* no command while frozen */ |
b51e9e5d | 5497 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) |
e3180499 TH |
5498 | return NULL; |
5499 | ||
2ab7db1f TH |
5500 | /* the last tag is reserved for internal command. */ |
5501 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 5502 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 5503 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
5504 | break; |
5505 | } | |
5506 | ||
5507 | if (qc) | |
5508 | qc->tag = i; | |
5509 | ||
5510 | return qc; | |
5511 | } | |
5512 | ||
5513 | /** | |
5514 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
5515 | * @dev: Device from whom we request an available command structure |
5516 | * | |
5517 | * LOCKING: | |
0cba632b | 5518 | * None. |
1da177e4 LT |
5519 | */ |
5520 | ||
3373efd8 | 5521 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 5522 | { |
9af5c9c9 | 5523 | struct ata_port *ap = dev->link->ap; |
1da177e4 LT |
5524 | struct ata_queued_cmd *qc; |
5525 | ||
5526 | qc = ata_qc_new(ap); | |
5527 | if (qc) { | |
1da177e4 LT |
5528 | qc->scsicmd = NULL; |
5529 | qc->ap = ap; | |
5530 | qc->dev = dev; | |
1da177e4 | 5531 | |
2c13b7ce | 5532 | ata_qc_reinit(qc); |
1da177e4 LT |
5533 | } |
5534 | ||
5535 | return qc; | |
5536 | } | |
5537 | ||
1da177e4 LT |
5538 | /** |
5539 | * ata_qc_free - free unused ata_queued_cmd | |
5540 | * @qc: Command to complete | |
5541 | * | |
5542 | * Designed to free unused ata_queued_cmd object | |
5543 | * in case something prevents using it. | |
5544 | * | |
5545 | * LOCKING: | |
cca3974e | 5546 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5547 | */ |
5548 | void ata_qc_free(struct ata_queued_cmd *qc) | |
5549 | { | |
4ba946e9 TH |
5550 | struct ata_port *ap = qc->ap; |
5551 | unsigned int tag; | |
5552 | ||
a4631474 | 5553 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 5554 | |
4ba946e9 TH |
5555 | qc->flags = 0; |
5556 | tag = qc->tag; | |
5557 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 5558 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 5559 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 5560 | } |
1da177e4 LT |
5561 | } |
5562 | ||
76014427 | 5563 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 5564 | { |
dedaf2b0 | 5565 | struct ata_port *ap = qc->ap; |
9af5c9c9 | 5566 | struct ata_link *link = qc->dev->link; |
dedaf2b0 | 5567 | |
a4631474 TH |
5568 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
5569 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
5570 | |
5571 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
5572 | ata_sg_clean(qc); | |
5573 | ||
7401abf2 | 5574 | /* command should be marked inactive atomically with qc completion */ |
da917d69 | 5575 | if (qc->tf.protocol == ATA_PROT_NCQ) { |
9af5c9c9 | 5576 | link->sactive &= ~(1 << qc->tag); |
da917d69 TH |
5577 | if (!link->sactive) |
5578 | ap->nr_active_links--; | |
5579 | } else { | |
9af5c9c9 | 5580 | link->active_tag = ATA_TAG_POISON; |
da917d69 TH |
5581 | ap->nr_active_links--; |
5582 | } | |
5583 | ||
5584 | /* clear exclusive status */ | |
5585 | if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL && | |
5586 | ap->excl_link == link)) | |
5587 | ap->excl_link = NULL; | |
7401abf2 | 5588 | |
3f3791d3 AL |
5589 | /* atapi: mark qc as inactive to prevent the interrupt handler |
5590 | * from completing the command twice later, before the error handler | |
5591 | * is called. (when rc != 0 and atapi request sense is needed) | |
5592 | */ | |
5593 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 5594 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 5595 | |
1da177e4 | 5596 | /* call completion callback */ |
77853bf2 | 5597 | qc->complete_fn(qc); |
1da177e4 LT |
5598 | } |
5599 | ||
39599a53 TH |
5600 | static void fill_result_tf(struct ata_queued_cmd *qc) |
5601 | { | |
5602 | struct ata_port *ap = qc->ap; | |
5603 | ||
39599a53 | 5604 | qc->result_tf.flags = qc->tf.flags; |
4742d54f | 5605 | ap->ops->tf_read(ap, &qc->result_tf); |
39599a53 TH |
5606 | } |
5607 | ||
f686bcb8 TH |
5608 | /** |
5609 | * ata_qc_complete - Complete an active ATA command | |
5610 | * @qc: Command to complete | |
5611 | * @err_mask: ATA Status register contents | |
5612 | * | |
5613 | * Indicate to the mid and upper layers that an ATA | |
5614 | * command has completed, with either an ok or not-ok status. | |
5615 | * | |
5616 | * LOCKING: | |
cca3974e | 5617 | * spin_lock_irqsave(host lock) |
f686bcb8 TH |
5618 | */ |
5619 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
5620 | { | |
5621 | struct ata_port *ap = qc->ap; | |
5622 | ||
5623 | /* XXX: New EH and old EH use different mechanisms to | |
5624 | * synchronize EH with regular execution path. | |
5625 | * | |
5626 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
5627 | * Normal execution path is responsible for not accessing a | |
5628 | * failed qc. libata core enforces the rule by returning NULL | |
5629 | * from ata_qc_from_tag() for failed qcs. | |
5630 | * | |
5631 | * Old EH depends on ata_qc_complete() nullifying completion | |
5632 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
5633 | * not synchronize with interrupt handler. Only PIO task is | |
5634 | * taken care of. | |
5635 | */ | |
5636 | if (ap->ops->error_handler) { | |
4dbfa39b TH |
5637 | struct ata_device *dev = qc->dev; |
5638 | struct ata_eh_info *ehi = &dev->link->eh_info; | |
5639 | ||
b51e9e5d | 5640 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); |
f686bcb8 TH |
5641 | |
5642 | if (unlikely(qc->err_mask)) | |
5643 | qc->flags |= ATA_QCFLAG_FAILED; | |
5644 | ||
5645 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
5646 | if (!ata_tag_internal(qc->tag)) { | |
5647 | /* always fill result TF for failed qc */ | |
39599a53 | 5648 | fill_result_tf(qc); |
f686bcb8 TH |
5649 | ata_qc_schedule_eh(qc); |
5650 | return; | |
5651 | } | |
5652 | } | |
5653 | ||
5654 | /* read result TF if requested */ | |
5655 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 5656 | fill_result_tf(qc); |
f686bcb8 | 5657 | |
4dbfa39b TH |
5658 | /* Some commands need post-processing after successful |
5659 | * completion. | |
5660 | */ | |
5661 | switch (qc->tf.command) { | |
5662 | case ATA_CMD_SET_FEATURES: | |
5663 | if (qc->tf.feature != SETFEATURES_WC_ON && | |
5664 | qc->tf.feature != SETFEATURES_WC_OFF) | |
5665 | break; | |
5666 | /* fall through */ | |
5667 | case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */ | |
5668 | case ATA_CMD_SET_MULTI: /* multi_count changed */ | |
5669 | /* revalidate device */ | |
5670 | ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE; | |
5671 | ata_port_schedule_eh(ap); | |
5672 | break; | |
054a5fba TH |
5673 | |
5674 | case ATA_CMD_SLEEP: | |
5675 | dev->flags |= ATA_DFLAG_SLEEPING; | |
5676 | break; | |
4dbfa39b TH |
5677 | } |
5678 | ||
f686bcb8 TH |
5679 | __ata_qc_complete(qc); |
5680 | } else { | |
5681 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
5682 | return; | |
5683 | ||
5684 | /* read result TF if failed or requested */ | |
5685 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 5686 | fill_result_tf(qc); |
f686bcb8 TH |
5687 | |
5688 | __ata_qc_complete(qc); | |
5689 | } | |
5690 | } | |
5691 | ||
dedaf2b0 TH |
5692 | /** |
5693 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
5694 | * @ap: port in question | |
5695 | * @qc_active: new qc_active mask | |
5696 | * @finish_qc: LLDD callback invoked before completing a qc | |
5697 | * | |
5698 | * Complete in-flight commands. This functions is meant to be | |
5699 | * called from low-level driver's interrupt routine to complete | |
5700 | * requests normally. ap->qc_active and @qc_active is compared | |
5701 | * and commands are completed accordingly. | |
5702 | * | |
5703 | * LOCKING: | |
cca3974e | 5704 | * spin_lock_irqsave(host lock) |
dedaf2b0 TH |
5705 | * |
5706 | * RETURNS: | |
5707 | * Number of completed commands on success, -errno otherwise. | |
5708 | */ | |
5709 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
5710 | void (*finish_qc)(struct ata_queued_cmd *)) | |
5711 | { | |
5712 | int nr_done = 0; | |
5713 | u32 done_mask; | |
5714 | int i; | |
5715 | ||
5716 | done_mask = ap->qc_active ^ qc_active; | |
5717 | ||
5718 | if (unlikely(done_mask & qc_active)) { | |
5719 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
5720 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
5721 | return -EINVAL; | |
5722 | } | |
5723 | ||
5724 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
5725 | struct ata_queued_cmd *qc; | |
5726 | ||
5727 | if (!(done_mask & (1 << i))) | |
5728 | continue; | |
5729 | ||
5730 | if ((qc = ata_qc_from_tag(ap, i))) { | |
5731 | if (finish_qc) | |
5732 | finish_qc(qc); | |
5733 | ata_qc_complete(qc); | |
5734 | nr_done++; | |
5735 | } | |
5736 | } | |
5737 | ||
5738 | return nr_done; | |
5739 | } | |
5740 | ||
1da177e4 LT |
5741 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
5742 | { | |
5743 | struct ata_port *ap = qc->ap; | |
5744 | ||
5745 | switch (qc->tf.protocol) { | |
3dc1d881 | 5746 | case ATA_PROT_NCQ: |
1da177e4 LT |
5747 | case ATA_PROT_DMA: |
5748 | case ATA_PROT_ATAPI_DMA: | |
5749 | return 1; | |
5750 | ||
5751 | case ATA_PROT_ATAPI: | |
5752 | case ATA_PROT_PIO: | |
1da177e4 LT |
5753 | if (ap->flags & ATA_FLAG_PIO_DMA) |
5754 | return 1; | |
5755 | ||
5756 | /* fall through */ | |
5757 | ||
5758 | default: | |
5759 | return 0; | |
5760 | } | |
5761 | ||
5762 | /* never reached */ | |
5763 | } | |
5764 | ||
5765 | /** | |
5766 | * ata_qc_issue - issue taskfile to device | |
5767 | * @qc: command to issue to device | |
5768 | * | |
5769 | * Prepare an ATA command to submission to device. | |
5770 | * This includes mapping the data into a DMA-able | |
5771 | * area, filling in the S/G table, and finally | |
5772 | * writing the taskfile to hardware, starting the command. | |
5773 | * | |
5774 | * LOCKING: | |
cca3974e | 5775 | * spin_lock_irqsave(host lock) |
1da177e4 | 5776 | */ |
8e0e694a | 5777 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
5778 | { |
5779 | struct ata_port *ap = qc->ap; | |
9af5c9c9 | 5780 | struct ata_link *link = qc->dev->link; |
1da177e4 | 5781 | |
dedaf2b0 TH |
5782 | /* Make sure only one non-NCQ command is outstanding. The |
5783 | * check is skipped for old EH because it reuses active qc to | |
5784 | * request ATAPI sense. | |
5785 | */ | |
9af5c9c9 | 5786 | WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); |
dedaf2b0 TH |
5787 | |
5788 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
9af5c9c9 | 5789 | WARN_ON(link->sactive & (1 << qc->tag)); |
da917d69 TH |
5790 | |
5791 | if (!link->sactive) | |
5792 | ap->nr_active_links++; | |
9af5c9c9 | 5793 | link->sactive |= 1 << qc->tag; |
dedaf2b0 | 5794 | } else { |
9af5c9c9 | 5795 | WARN_ON(link->sactive); |
da917d69 TH |
5796 | |
5797 | ap->nr_active_links++; | |
9af5c9c9 | 5798 | link->active_tag = qc->tag; |
dedaf2b0 TH |
5799 | } |
5800 | ||
e4a70e76 | 5801 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 5802 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 5803 | |
1da177e4 LT |
5804 | if (ata_should_dma_map(qc)) { |
5805 | if (qc->flags & ATA_QCFLAG_SG) { | |
5806 | if (ata_sg_setup(qc)) | |
8e436af9 | 5807 | goto sg_err; |
1da177e4 LT |
5808 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
5809 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 5810 | goto sg_err; |
1da177e4 LT |
5811 | } |
5812 | } else { | |
5813 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
5814 | } | |
5815 | ||
054a5fba TH |
5816 | /* if device is sleeping, schedule softreset and abort the link */ |
5817 | if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) { | |
5818 | link->eh_info.action |= ATA_EH_SOFTRESET; | |
5819 | ata_ehi_push_desc(&link->eh_info, "waking up from sleep"); | |
5820 | ata_link_abort(link); | |
5821 | return; | |
5822 | } | |
5823 | ||
1da177e4 LT |
5824 | ap->ops->qc_prep(qc); |
5825 | ||
8e0e694a TH |
5826 | qc->err_mask |= ap->ops->qc_issue(qc); |
5827 | if (unlikely(qc->err_mask)) | |
5828 | goto err; | |
5829 | return; | |
1da177e4 | 5830 | |
8e436af9 TH |
5831 | sg_err: |
5832 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
5833 | qc->err_mask |= AC_ERR_SYSTEM; |
5834 | err: | |
5835 | ata_qc_complete(qc); | |
1da177e4 LT |
5836 | } |
5837 | ||
5838 | /** | |
5839 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
5840 | * @qc: command to issue to device | |
5841 | * | |
5842 | * Using various libata functions and hooks, this function | |
5843 | * starts an ATA command. ATA commands are grouped into | |
5844 | * classes called "protocols", and issuing each type of protocol | |
5845 | * is slightly different. | |
5846 | * | |
0baab86b EF |
5847 | * May be used as the qc_issue() entry in ata_port_operations. |
5848 | * | |
1da177e4 | 5849 | * LOCKING: |
cca3974e | 5850 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5851 | * |
5852 | * RETURNS: | |
9a3d9eb0 | 5853 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
5854 | */ |
5855 | ||
9a3d9eb0 | 5856 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
5857 | { |
5858 | struct ata_port *ap = qc->ap; | |
5859 | ||
e50362ec AL |
5860 | /* Use polling pio if the LLD doesn't handle |
5861 | * interrupt driven pio and atapi CDB interrupt. | |
5862 | */ | |
5863 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
5864 | switch (qc->tf.protocol) { | |
5865 | case ATA_PROT_PIO: | |
e3472cbe | 5866 | case ATA_PROT_NODATA: |
e50362ec AL |
5867 | case ATA_PROT_ATAPI: |
5868 | case ATA_PROT_ATAPI_NODATA: | |
5869 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
5870 | break; | |
5871 | case ATA_PROT_ATAPI_DMA: | |
5872 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3a778275 | 5873 | /* see ata_dma_blacklisted() */ |
e50362ec AL |
5874 | BUG(); |
5875 | break; | |
5876 | default: | |
5877 | break; | |
5878 | } | |
5879 | } | |
5880 | ||
312f7da2 | 5881 | /* select the device */ |
1da177e4 LT |
5882 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
5883 | ||
312f7da2 | 5884 | /* start the command */ |
1da177e4 LT |
5885 | switch (qc->tf.protocol) { |
5886 | case ATA_PROT_NODATA: | |
312f7da2 AL |
5887 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5888 | ata_qc_set_polling(qc); | |
5889 | ||
e5338254 | 5890 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
5891 | ap->hsm_task_state = HSM_ST_LAST; |
5892 | ||
5893 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 5894 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 5895 | |
1da177e4 LT |
5896 | break; |
5897 | ||
5898 | case ATA_PROT_DMA: | |
587005de | 5899 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5900 | |
1da177e4 LT |
5901 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5902 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
5903 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 5904 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
5905 | break; |
5906 | ||
312f7da2 AL |
5907 | case ATA_PROT_PIO: |
5908 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5909 | ata_qc_set_polling(qc); | |
1da177e4 | 5910 | |
e5338254 | 5911 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 5912 | |
54f00389 AL |
5913 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
5914 | /* PIO data out protocol */ | |
5915 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 5916 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5917 | |
5918 | /* always send first data block using | |
e27486db | 5919 | * the ata_pio_task() codepath. |
54f00389 | 5920 | */ |
312f7da2 | 5921 | } else { |
54f00389 AL |
5922 | /* PIO data in protocol */ |
5923 | ap->hsm_task_state = HSM_ST; | |
5924 | ||
5925 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 5926 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5927 | |
5928 | /* if polling, ata_pio_task() handles the rest. | |
5929 | * otherwise, interrupt handler takes over from here. | |
5930 | */ | |
312f7da2 AL |
5931 | } |
5932 | ||
1da177e4 LT |
5933 | break; |
5934 | ||
1da177e4 | 5935 | case ATA_PROT_ATAPI: |
1da177e4 | 5936 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
5937 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5938 | ata_qc_set_polling(qc); | |
5939 | ||
e5338254 | 5940 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 5941 | |
312f7da2 AL |
5942 | ap->hsm_task_state = HSM_ST_FIRST; |
5943 | ||
5944 | /* send cdb by polling if no cdb interrupt */ | |
5945 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
5946 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 5947 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5948 | break; |
5949 | ||
5950 | case ATA_PROT_ATAPI_DMA: | |
587005de | 5951 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5952 | |
1da177e4 LT |
5953 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5954 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
5955 | ap->hsm_task_state = HSM_ST_FIRST; |
5956 | ||
5957 | /* send cdb by polling if no cdb interrupt */ | |
5958 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 5959 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5960 | break; |
5961 | ||
5962 | default: | |
5963 | WARN_ON(1); | |
9a3d9eb0 | 5964 | return AC_ERR_SYSTEM; |
1da177e4 LT |
5965 | } |
5966 | ||
5967 | return 0; | |
5968 | } | |
5969 | ||
1da177e4 LT |
5970 | /** |
5971 | * ata_host_intr - Handle host interrupt for given (port, task) | |
5972 | * @ap: Port on which interrupt arrived (possibly...) | |
5973 | * @qc: Taskfile currently active in engine | |
5974 | * | |
5975 | * Handle host interrupt for given queued command. Currently, | |
5976 | * only DMA interrupts are handled. All other commands are | |
5977 | * handled via polling with interrupts disabled (nIEN bit). | |
5978 | * | |
5979 | * LOCKING: | |
cca3974e | 5980 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5981 | * |
5982 | * RETURNS: | |
5983 | * One if interrupt was handled, zero if not (shared irq). | |
5984 | */ | |
5985 | ||
2dcb407e JG |
5986 | inline unsigned int ata_host_intr(struct ata_port *ap, |
5987 | struct ata_queued_cmd *qc) | |
1da177e4 | 5988 | { |
9af5c9c9 | 5989 | struct ata_eh_info *ehi = &ap->link.eh_info; |
312f7da2 | 5990 | u8 status, host_stat = 0; |
1da177e4 | 5991 | |
312f7da2 | 5992 | VPRINTK("ata%u: protocol %d task_state %d\n", |
44877b4e | 5993 | ap->print_id, qc->tf.protocol, ap->hsm_task_state); |
1da177e4 | 5994 | |
312f7da2 AL |
5995 | /* Check whether we are expecting interrupt in this state */ |
5996 | switch (ap->hsm_task_state) { | |
5997 | case HSM_ST_FIRST: | |
6912ccd5 AL |
5998 | /* Some pre-ATAPI-4 devices assert INTRQ |
5999 | * at this state when ready to receive CDB. | |
6000 | */ | |
1da177e4 | 6001 | |
312f7da2 AL |
6002 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
6003 | * The flag was turned on only for atapi devices. | |
6004 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
6005 | */ | |
6006 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 6007 | goto idle_irq; |
1da177e4 | 6008 | break; |
312f7da2 AL |
6009 | case HSM_ST_LAST: |
6010 | if (qc->tf.protocol == ATA_PROT_DMA || | |
6011 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
6012 | /* check status of DMA engine */ | |
6013 | host_stat = ap->ops->bmdma_status(ap); | |
44877b4e TH |
6014 | VPRINTK("ata%u: host_stat 0x%X\n", |
6015 | ap->print_id, host_stat); | |
312f7da2 AL |
6016 | |
6017 | /* if it's not our irq... */ | |
6018 | if (!(host_stat & ATA_DMA_INTR)) | |
6019 | goto idle_irq; | |
6020 | ||
6021 | /* before we do anything else, clear DMA-Start bit */ | |
6022 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
6023 | |
6024 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
6025 | /* error when transfering data to/from memory */ | |
6026 | qc->err_mask |= AC_ERR_HOST_BUS; | |
6027 | ap->hsm_task_state = HSM_ST_ERR; | |
6028 | } | |
312f7da2 AL |
6029 | } |
6030 | break; | |
6031 | case HSM_ST: | |
6032 | break; | |
1da177e4 LT |
6033 | default: |
6034 | goto idle_irq; | |
6035 | } | |
6036 | ||
312f7da2 AL |
6037 | /* check altstatus */ |
6038 | status = ata_altstatus(ap); | |
6039 | if (status & ATA_BUSY) | |
6040 | goto idle_irq; | |
1da177e4 | 6041 | |
312f7da2 AL |
6042 | /* check main status, clearing INTRQ */ |
6043 | status = ata_chk_status(ap); | |
6044 | if (unlikely(status & ATA_BUSY)) | |
6045 | goto idle_irq; | |
1da177e4 | 6046 | |
312f7da2 AL |
6047 | /* ack bmdma irq events */ |
6048 | ap->ops->irq_clear(ap); | |
1da177e4 | 6049 | |
bb5cb290 | 6050 | ata_hsm_move(ap, qc, status, 0); |
ea54763f TH |
6051 | |
6052 | if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || | |
6053 | qc->tf.protocol == ATA_PROT_ATAPI_DMA)) | |
6054 | ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); | |
6055 | ||
1da177e4 LT |
6056 | return 1; /* irq handled */ |
6057 | ||
6058 | idle_irq: | |
6059 | ap->stats.idle_irq++; | |
6060 | ||
6061 | #ifdef ATA_IRQ_TRAP | |
6062 | if ((ap->stats.idle_irq % 1000) == 0) { | |
6d32d30f JG |
6063 | ata_chk_status(ap); |
6064 | ap->ops->irq_clear(ap); | |
f15a1daf | 6065 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 6066 | return 1; |
1da177e4 LT |
6067 | } |
6068 | #endif | |
6069 | return 0; /* irq not handled */ | |
6070 | } | |
6071 | ||
6072 | /** | |
6073 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b | 6074 | * @irq: irq line (unused) |
cca3974e | 6075 | * @dev_instance: pointer to our ata_host information structure |
1da177e4 | 6076 | * |
0cba632b JG |
6077 | * Default interrupt handler for PCI IDE devices. Calls |
6078 | * ata_host_intr() for each port that is not disabled. | |
6079 | * | |
1da177e4 | 6080 | * LOCKING: |
cca3974e | 6081 | * Obtains host lock during operation. |
1da177e4 LT |
6082 | * |
6083 | * RETURNS: | |
0cba632b | 6084 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
6085 | */ |
6086 | ||
2dcb407e | 6087 | irqreturn_t ata_interrupt(int irq, void *dev_instance) |
1da177e4 | 6088 | { |
cca3974e | 6089 | struct ata_host *host = dev_instance; |
1da177e4 LT |
6090 | unsigned int i; |
6091 | unsigned int handled = 0; | |
6092 | unsigned long flags; | |
6093 | ||
6094 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
cca3974e | 6095 | spin_lock_irqsave(&host->lock, flags); |
1da177e4 | 6096 | |
cca3974e | 6097 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
6098 | struct ata_port *ap; |
6099 | ||
cca3974e | 6100 | ap = host->ports[i]; |
c1389503 | 6101 | if (ap && |
029f5468 | 6102 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
6103 | struct ata_queued_cmd *qc; |
6104 | ||
9af5c9c9 | 6105 | qc = ata_qc_from_tag(ap, ap->link.active_tag); |
312f7da2 | 6106 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 6107 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
6108 | handled |= ata_host_intr(ap, qc); |
6109 | } | |
6110 | } | |
6111 | ||
cca3974e | 6112 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 LT |
6113 | |
6114 | return IRQ_RETVAL(handled); | |
6115 | } | |
6116 | ||
34bf2170 TH |
6117 | /** |
6118 | * sata_scr_valid - test whether SCRs are accessible | |
936fd732 | 6119 | * @link: ATA link to test SCR accessibility for |
34bf2170 | 6120 | * |
936fd732 | 6121 | * Test whether SCRs are accessible for @link. |
34bf2170 TH |
6122 | * |
6123 | * LOCKING: | |
6124 | * None. | |
6125 | * | |
6126 | * RETURNS: | |
6127 | * 1 if SCRs are accessible, 0 otherwise. | |
6128 | */ | |
936fd732 | 6129 | int sata_scr_valid(struct ata_link *link) |
34bf2170 | 6130 | { |
936fd732 TH |
6131 | struct ata_port *ap = link->ap; |
6132 | ||
a16abc0b | 6133 | return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; |
34bf2170 TH |
6134 | } |
6135 | ||
6136 | /** | |
6137 | * sata_scr_read - read SCR register of the specified port | |
936fd732 | 6138 | * @link: ATA link to read SCR for |
34bf2170 TH |
6139 | * @reg: SCR to read |
6140 | * @val: Place to store read value | |
6141 | * | |
936fd732 | 6142 | * Read SCR register @reg of @link into *@val. This function is |
633273a3 TH |
6143 | * guaranteed to succeed if @link is ap->link, the cable type of |
6144 | * the port is SATA and the port implements ->scr_read. | |
34bf2170 TH |
6145 | * |
6146 | * LOCKING: | |
633273a3 | 6147 | * None if @link is ap->link. Kernel thread context otherwise. |
34bf2170 TH |
6148 | * |
6149 | * RETURNS: | |
6150 | * 0 on success, negative errno on failure. | |
6151 | */ | |
936fd732 | 6152 | int sata_scr_read(struct ata_link *link, int reg, u32 *val) |
34bf2170 | 6153 | { |
633273a3 TH |
6154 | if (ata_is_host_link(link)) { |
6155 | struct ata_port *ap = link->ap; | |
936fd732 | 6156 | |
633273a3 TH |
6157 | if (sata_scr_valid(link)) |
6158 | return ap->ops->scr_read(ap, reg, val); | |
6159 | return -EOPNOTSUPP; | |
6160 | } | |
6161 | ||
6162 | return sata_pmp_scr_read(link, reg, val); | |
34bf2170 TH |
6163 | } |
6164 | ||
6165 | /** | |
6166 | * sata_scr_write - write SCR register of the specified port | |
936fd732 | 6167 | * @link: ATA link to write SCR for |
34bf2170 TH |
6168 | * @reg: SCR to write |
6169 | * @val: value to write | |
6170 | * | |
936fd732 | 6171 | * Write @val to SCR register @reg of @link. This function is |
633273a3 TH |
6172 | * guaranteed to succeed if @link is ap->link, the cable type of |
6173 | * the port is SATA and the port implements ->scr_read. | |
34bf2170 TH |
6174 | * |
6175 | * LOCKING: | |
633273a3 | 6176 | * None if @link is ap->link. Kernel thread context otherwise. |
34bf2170 TH |
6177 | * |
6178 | * RETURNS: | |
6179 | * 0 on success, negative errno on failure. | |
6180 | */ | |
936fd732 | 6181 | int sata_scr_write(struct ata_link *link, int reg, u32 val) |
34bf2170 | 6182 | { |
633273a3 TH |
6183 | if (ata_is_host_link(link)) { |
6184 | struct ata_port *ap = link->ap; | |
6185 | ||
6186 | if (sata_scr_valid(link)) | |
6187 | return ap->ops->scr_write(ap, reg, val); | |
6188 | return -EOPNOTSUPP; | |
6189 | } | |
936fd732 | 6190 | |
633273a3 | 6191 | return sata_pmp_scr_write(link, reg, val); |
34bf2170 TH |
6192 | } |
6193 | ||
6194 | /** | |
6195 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
936fd732 | 6196 | * @link: ATA link to write SCR for |
34bf2170 TH |
6197 | * @reg: SCR to write |
6198 | * @val: value to write | |
6199 | * | |
6200 | * This function is identical to sata_scr_write() except that this | |
6201 | * function performs flush after writing to the register. | |
6202 | * | |
6203 | * LOCKING: | |
633273a3 | 6204 | * None if @link is ap->link. Kernel thread context otherwise. |
34bf2170 TH |
6205 | * |
6206 | * RETURNS: | |
6207 | * 0 on success, negative errno on failure. | |
6208 | */ | |
936fd732 | 6209 | int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) |
34bf2170 | 6210 | { |
633273a3 TH |
6211 | if (ata_is_host_link(link)) { |
6212 | struct ata_port *ap = link->ap; | |
6213 | int rc; | |
da3dbb17 | 6214 | |
633273a3 TH |
6215 | if (sata_scr_valid(link)) { |
6216 | rc = ap->ops->scr_write(ap, reg, val); | |
6217 | if (rc == 0) | |
6218 | rc = ap->ops->scr_read(ap, reg, &val); | |
6219 | return rc; | |
6220 | } | |
6221 | return -EOPNOTSUPP; | |
34bf2170 | 6222 | } |
633273a3 TH |
6223 | |
6224 | return sata_pmp_scr_write(link, reg, val); | |
34bf2170 TH |
6225 | } |
6226 | ||
6227 | /** | |
936fd732 TH |
6228 | * ata_link_online - test whether the given link is online |
6229 | * @link: ATA link to test | |
34bf2170 | 6230 | * |
936fd732 TH |
6231 | * Test whether @link is online. Note that this function returns |
6232 | * 0 if online status of @link cannot be obtained, so | |
6233 | * ata_link_online(link) != !ata_link_offline(link). | |
34bf2170 TH |
6234 | * |
6235 | * LOCKING: | |
6236 | * None. | |
6237 | * | |
6238 | * RETURNS: | |
6239 | * 1 if the port online status is available and online. | |
6240 | */ | |
936fd732 | 6241 | int ata_link_online(struct ata_link *link) |
34bf2170 TH |
6242 | { |
6243 | u32 sstatus; | |
6244 | ||
936fd732 TH |
6245 | if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && |
6246 | (sstatus & 0xf) == 0x3) | |
34bf2170 TH |
6247 | return 1; |
6248 | return 0; | |
6249 | } | |
6250 | ||
6251 | /** | |
936fd732 TH |
6252 | * ata_link_offline - test whether the given link is offline |
6253 | * @link: ATA link to test | |
34bf2170 | 6254 | * |
936fd732 TH |
6255 | * Test whether @link is offline. Note that this function |
6256 | * returns 0 if offline status of @link cannot be obtained, so | |
6257 | * ata_link_online(link) != !ata_link_offline(link). | |
34bf2170 TH |
6258 | * |
6259 | * LOCKING: | |
6260 | * None. | |
6261 | * | |
6262 | * RETURNS: | |
6263 | * 1 if the port offline status is available and offline. | |
6264 | */ | |
936fd732 | 6265 | int ata_link_offline(struct ata_link *link) |
34bf2170 TH |
6266 | { |
6267 | u32 sstatus; | |
6268 | ||
936fd732 TH |
6269 | if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && |
6270 | (sstatus & 0xf) != 0x3) | |
34bf2170 TH |
6271 | return 1; |
6272 | return 0; | |
6273 | } | |
0baab86b | 6274 | |
77b08fb5 | 6275 | int ata_flush_cache(struct ata_device *dev) |
9b847548 | 6276 | { |
977e6b9f | 6277 | unsigned int err_mask; |
9b847548 JA |
6278 | u8 cmd; |
6279 | ||
6280 | if (!ata_try_flush_cache(dev)) | |
6281 | return 0; | |
6282 | ||
6fc49adb | 6283 | if (dev->flags & ATA_DFLAG_FLUSH_EXT) |
9b847548 JA |
6284 | cmd = ATA_CMD_FLUSH_EXT; |
6285 | else | |
6286 | cmd = ATA_CMD_FLUSH; | |
6287 | ||
4f34337b AC |
6288 | /* This is wrong. On a failed flush we get back the LBA of the lost |
6289 | sector and we should (assuming it wasn't aborted as unknown) issue | |
2dcb407e | 6290 | a further flush command to continue the writeback until it |
4f34337b | 6291 | does not error */ |
977e6b9f TH |
6292 | err_mask = ata_do_simple_cmd(dev, cmd); |
6293 | if (err_mask) { | |
6294 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
6295 | return -EIO; | |
6296 | } | |
6297 | ||
6298 | return 0; | |
9b847548 JA |
6299 | } |
6300 | ||
6ffa01d8 | 6301 | #ifdef CONFIG_PM |
cca3974e JG |
6302 | static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, |
6303 | unsigned int action, unsigned int ehi_flags, | |
6304 | int wait) | |
500530f6 TH |
6305 | { |
6306 | unsigned long flags; | |
6307 | int i, rc; | |
6308 | ||
cca3974e JG |
6309 | for (i = 0; i < host->n_ports; i++) { |
6310 | struct ata_port *ap = host->ports[i]; | |
e3667ebf | 6311 | struct ata_link *link; |
500530f6 TH |
6312 | |
6313 | /* Previous resume operation might still be in | |
6314 | * progress. Wait for PM_PENDING to clear. | |
6315 | */ | |
6316 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
6317 | ata_port_wait_eh(ap); | |
6318 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
6319 | } | |
6320 | ||
6321 | /* request PM ops to EH */ | |
6322 | spin_lock_irqsave(ap->lock, flags); | |
6323 | ||
6324 | ap->pm_mesg = mesg; | |
6325 | if (wait) { | |
6326 | rc = 0; | |
6327 | ap->pm_result = &rc; | |
6328 | } | |
6329 | ||
6330 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
e3667ebf TH |
6331 | __ata_port_for_each_link(link, ap) { |
6332 | link->eh_info.action |= action; | |
6333 | link->eh_info.flags |= ehi_flags; | |
6334 | } | |
500530f6 TH |
6335 | |
6336 | ata_port_schedule_eh(ap); | |
6337 | ||
6338 | spin_unlock_irqrestore(ap->lock, flags); | |
6339 | ||
6340 | /* wait and check result */ | |
6341 | if (wait) { | |
6342 | ata_port_wait_eh(ap); | |
6343 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
6344 | if (rc) | |
6345 | return rc; | |
6346 | } | |
6347 | } | |
6348 | ||
6349 | return 0; | |
6350 | } | |
6351 | ||
6352 | /** | |
cca3974e JG |
6353 | * ata_host_suspend - suspend host |
6354 | * @host: host to suspend | |
500530f6 TH |
6355 | * @mesg: PM message |
6356 | * | |
cca3974e | 6357 | * Suspend @host. Actual operation is performed by EH. This |
500530f6 TH |
6358 | * function requests EH to perform PM operations and waits for EH |
6359 | * to finish. | |
6360 | * | |
6361 | * LOCKING: | |
6362 | * Kernel thread context (may sleep). | |
6363 | * | |
6364 | * RETURNS: | |
6365 | * 0 on success, -errno on failure. | |
6366 | */ | |
cca3974e | 6367 | int ata_host_suspend(struct ata_host *host, pm_message_t mesg) |
500530f6 | 6368 | { |
9666f400 | 6369 | int rc; |
500530f6 | 6370 | |
cca3974e | 6371 | rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); |
9666f400 TH |
6372 | if (rc == 0) |
6373 | host->dev->power.power_state = mesg; | |
500530f6 TH |
6374 | return rc; |
6375 | } | |
6376 | ||
6377 | /** | |
cca3974e JG |
6378 | * ata_host_resume - resume host |
6379 | * @host: host to resume | |
500530f6 | 6380 | * |
cca3974e | 6381 | * Resume @host. Actual operation is performed by EH. This |
500530f6 TH |
6382 | * function requests EH to perform PM operations and returns. |
6383 | * Note that all resume operations are performed parallely. | |
6384 | * | |
6385 | * LOCKING: | |
6386 | * Kernel thread context (may sleep). | |
6387 | */ | |
cca3974e | 6388 | void ata_host_resume(struct ata_host *host) |
500530f6 | 6389 | { |
cca3974e JG |
6390 | ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, |
6391 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
6392 | host->dev->power.power_state = PMSG_ON; | |
500530f6 | 6393 | } |
6ffa01d8 | 6394 | #endif |
500530f6 | 6395 | |
c893a3ae RD |
6396 | /** |
6397 | * ata_port_start - Set port up for dma. | |
6398 | * @ap: Port to initialize | |
6399 | * | |
6400 | * Called just after data structures for each port are | |
6401 | * initialized. Allocates space for PRD table. | |
6402 | * | |
6403 | * May be used as the port_start() entry in ata_port_operations. | |
6404 | * | |
6405 | * LOCKING: | |
6406 | * Inherited from caller. | |
6407 | */ | |
f0d36efd | 6408 | int ata_port_start(struct ata_port *ap) |
1da177e4 | 6409 | { |
2f1f610b | 6410 | struct device *dev = ap->dev; |
6037d6bb | 6411 | int rc; |
1da177e4 | 6412 | |
f0d36efd TH |
6413 | ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, |
6414 | GFP_KERNEL); | |
1da177e4 LT |
6415 | if (!ap->prd) |
6416 | return -ENOMEM; | |
6417 | ||
6037d6bb | 6418 | rc = ata_pad_alloc(ap, dev); |
f0d36efd | 6419 | if (rc) |
6037d6bb | 6420 | return rc; |
1da177e4 | 6421 | |
f0d36efd TH |
6422 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, |
6423 | (unsigned long long)ap->prd_dma); | |
1da177e4 LT |
6424 | return 0; |
6425 | } | |
6426 | ||
3ef3b43d TH |
6427 | /** |
6428 | * ata_dev_init - Initialize an ata_device structure | |
6429 | * @dev: Device structure to initialize | |
6430 | * | |
6431 | * Initialize @dev in preparation for probing. | |
6432 | * | |
6433 | * LOCKING: | |
6434 | * Inherited from caller. | |
6435 | */ | |
6436 | void ata_dev_init(struct ata_device *dev) | |
6437 | { | |
9af5c9c9 TH |
6438 | struct ata_link *link = dev->link; |
6439 | struct ata_port *ap = link->ap; | |
72fa4b74 TH |
6440 | unsigned long flags; |
6441 | ||
5a04bf4b | 6442 | /* SATA spd limit is bound to the first device */ |
9af5c9c9 TH |
6443 | link->sata_spd_limit = link->hw_sata_spd_limit; |
6444 | link->sata_spd = 0; | |
5a04bf4b | 6445 | |
72fa4b74 TH |
6446 | /* High bits of dev->flags are used to record warm plug |
6447 | * requests which occur asynchronously. Synchronize using | |
cca3974e | 6448 | * host lock. |
72fa4b74 | 6449 | */ |
ba6a1308 | 6450 | spin_lock_irqsave(ap->lock, flags); |
72fa4b74 | 6451 | dev->flags &= ~ATA_DFLAG_INIT_MASK; |
3dcc323f | 6452 | dev->horkage = 0; |
ba6a1308 | 6453 | spin_unlock_irqrestore(ap->lock, flags); |
3ef3b43d | 6454 | |
72fa4b74 TH |
6455 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
6456 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
6457 | dev->pio_mask = UINT_MAX; |
6458 | dev->mwdma_mask = UINT_MAX; | |
6459 | dev->udma_mask = UINT_MAX; | |
6460 | } | |
6461 | ||
4fb37a25 TH |
6462 | /** |
6463 | * ata_link_init - Initialize an ata_link structure | |
6464 | * @ap: ATA port link is attached to | |
6465 | * @link: Link structure to initialize | |
8989805d | 6466 | * @pmp: Port multiplier port number |
4fb37a25 TH |
6467 | * |
6468 | * Initialize @link. | |
6469 | * | |
6470 | * LOCKING: | |
6471 | * Kernel thread context (may sleep) | |
6472 | */ | |
fb7fd614 | 6473 | void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp) |
4fb37a25 TH |
6474 | { |
6475 | int i; | |
6476 | ||
6477 | /* clear everything except for devices */ | |
6478 | memset(link, 0, offsetof(struct ata_link, device[0])); | |
6479 | ||
6480 | link->ap = ap; | |
8989805d | 6481 | link->pmp = pmp; |
4fb37a25 TH |
6482 | link->active_tag = ATA_TAG_POISON; |
6483 | link->hw_sata_spd_limit = UINT_MAX; | |
6484 | ||
6485 | /* can't use iterator, ap isn't initialized yet */ | |
6486 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
6487 | struct ata_device *dev = &link->device[i]; | |
6488 | ||
6489 | dev->link = link; | |
6490 | dev->devno = dev - link->device; | |
6491 | ata_dev_init(dev); | |
6492 | } | |
6493 | } | |
6494 | ||
6495 | /** | |
6496 | * sata_link_init_spd - Initialize link->sata_spd_limit | |
6497 | * @link: Link to configure sata_spd_limit for | |
6498 | * | |
6499 | * Initialize @link->[hw_]sata_spd_limit to the currently | |
6500 | * configured value. | |
6501 | * | |
6502 | * LOCKING: | |
6503 | * Kernel thread context (may sleep). | |
6504 | * | |
6505 | * RETURNS: | |
6506 | * 0 on success, -errno on failure. | |
6507 | */ | |
fb7fd614 | 6508 | int sata_link_init_spd(struct ata_link *link) |
4fb37a25 TH |
6509 | { |
6510 | u32 scontrol, spd; | |
6511 | int rc; | |
6512 | ||
6513 | rc = sata_scr_read(link, SCR_CONTROL, &scontrol); | |
6514 | if (rc) | |
6515 | return rc; | |
6516 | ||
6517 | spd = (scontrol >> 4) & 0xf; | |
6518 | if (spd) | |
6519 | link->hw_sata_spd_limit &= (1 << spd) - 1; | |
6520 | ||
6521 | link->sata_spd_limit = link->hw_sata_spd_limit; | |
6522 | ||
6523 | return 0; | |
6524 | } | |
6525 | ||
1da177e4 | 6526 | /** |
f3187195 TH |
6527 | * ata_port_alloc - allocate and initialize basic ATA port resources |
6528 | * @host: ATA host this allocated port belongs to | |
1da177e4 | 6529 | * |
f3187195 TH |
6530 | * Allocate and initialize basic ATA port resources. |
6531 | * | |
6532 | * RETURNS: | |
6533 | * Allocate ATA port on success, NULL on failure. | |
0cba632b | 6534 | * |
1da177e4 | 6535 | * LOCKING: |
f3187195 | 6536 | * Inherited from calling layer (may sleep). |
1da177e4 | 6537 | */ |
f3187195 | 6538 | struct ata_port *ata_port_alloc(struct ata_host *host) |
1da177e4 | 6539 | { |
f3187195 | 6540 | struct ata_port *ap; |
1da177e4 | 6541 | |
f3187195 TH |
6542 | DPRINTK("ENTER\n"); |
6543 | ||
6544 | ap = kzalloc(sizeof(*ap), GFP_KERNEL); | |
6545 | if (!ap) | |
6546 | return NULL; | |
6547 | ||
f4d6d004 | 6548 | ap->pflags |= ATA_PFLAG_INITIALIZING; |
cca3974e | 6549 | ap->lock = &host->lock; |
198e0fed | 6550 | ap->flags = ATA_FLAG_DISABLED; |
f3187195 | 6551 | ap->print_id = -1; |
1da177e4 | 6552 | ap->ctl = ATA_DEVCTL_OBS; |
cca3974e | 6553 | ap->host = host; |
f3187195 | 6554 | ap->dev = host->dev; |
1da177e4 | 6555 | ap->last_ctl = 0xFF; |
bd5d825c BP |
6556 | |
6557 | #if defined(ATA_VERBOSE_DEBUG) | |
6558 | /* turn on all debugging levels */ | |
6559 | ap->msg_enable = 0x00FF; | |
6560 | #elif defined(ATA_DEBUG) | |
6561 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
88574551 | 6562 | #else |
0dd4b21f | 6563 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; |
bd5d825c | 6564 | #endif |
1da177e4 | 6565 | |
65f27f38 DH |
6566 | INIT_DELAYED_WORK(&ap->port_task, NULL); |
6567 | INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); | |
6568 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); | |
a72ec4ce | 6569 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 6570 | init_waitqueue_head(&ap->eh_wait_q); |
5ddf24c5 TH |
6571 | init_timer_deferrable(&ap->fastdrain_timer); |
6572 | ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; | |
6573 | ap->fastdrain_timer.data = (unsigned long)ap; | |
1da177e4 | 6574 | |
838df628 | 6575 | ap->cbl = ATA_CBL_NONE; |
838df628 | 6576 | |
8989805d | 6577 | ata_link_init(ap, &ap->link, 0); |
1da177e4 LT |
6578 | |
6579 | #ifdef ATA_IRQ_TRAP | |
6580 | ap->stats.unhandled_irq = 1; | |
6581 | ap->stats.idle_irq = 1; | |
6582 | #endif | |
1da177e4 | 6583 | return ap; |
1da177e4 LT |
6584 | } |
6585 | ||
f0d36efd TH |
6586 | static void ata_host_release(struct device *gendev, void *res) |
6587 | { | |
6588 | struct ata_host *host = dev_get_drvdata(gendev); | |
6589 | int i; | |
6590 | ||
6591 | for (i = 0; i < host->n_ports; i++) { | |
6592 | struct ata_port *ap = host->ports[i]; | |
6593 | ||
ecef7253 TH |
6594 | if (!ap) |
6595 | continue; | |
6596 | ||
6597 | if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop) | |
f0d36efd | 6598 | ap->ops->port_stop(ap); |
f0d36efd TH |
6599 | } |
6600 | ||
ecef7253 | 6601 | if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop) |
f0d36efd | 6602 | host->ops->host_stop(host); |
1aa56cca | 6603 | |
1aa506e4 TH |
6604 | for (i = 0; i < host->n_ports; i++) { |
6605 | struct ata_port *ap = host->ports[i]; | |
6606 | ||
4911487a TH |
6607 | if (!ap) |
6608 | continue; | |
6609 | ||
6610 | if (ap->scsi_host) | |
1aa506e4 TH |
6611 | scsi_host_put(ap->scsi_host); |
6612 | ||
633273a3 | 6613 | kfree(ap->pmp_link); |
4911487a | 6614 | kfree(ap); |
1aa506e4 TH |
6615 | host->ports[i] = NULL; |
6616 | } | |
6617 | ||
1aa56cca | 6618 | dev_set_drvdata(gendev, NULL); |
f0d36efd TH |
6619 | } |
6620 | ||
f3187195 TH |
6621 | /** |
6622 | * ata_host_alloc - allocate and init basic ATA host resources | |
6623 | * @dev: generic device this host is associated with | |
6624 | * @max_ports: maximum number of ATA ports associated with this host | |
6625 | * | |
6626 | * Allocate and initialize basic ATA host resources. LLD calls | |
6627 | * this function to allocate a host, initializes it fully and | |
6628 | * attaches it using ata_host_register(). | |
6629 | * | |
6630 | * @max_ports ports are allocated and host->n_ports is | |
6631 | * initialized to @max_ports. The caller is allowed to decrease | |
6632 | * host->n_ports before calling ata_host_register(). The unused | |
6633 | * ports will be automatically freed on registration. | |
6634 | * | |
6635 | * RETURNS: | |
6636 | * Allocate ATA host on success, NULL on failure. | |
6637 | * | |
6638 | * LOCKING: | |
6639 | * Inherited from calling layer (may sleep). | |
6640 | */ | |
6641 | struct ata_host *ata_host_alloc(struct device *dev, int max_ports) | |
6642 | { | |
6643 | struct ata_host *host; | |
6644 | size_t sz; | |
6645 | int i; | |
6646 | ||
6647 | DPRINTK("ENTER\n"); | |
6648 | ||
6649 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) | |
6650 | return NULL; | |
6651 | ||
6652 | /* alloc a container for our list of ATA ports (buses) */ | |
6653 | sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); | |
6654 | /* alloc a container for our list of ATA ports (buses) */ | |
6655 | host = devres_alloc(ata_host_release, sz, GFP_KERNEL); | |
6656 | if (!host) | |
6657 | goto err_out; | |
6658 | ||
6659 | devres_add(dev, host); | |
6660 | dev_set_drvdata(dev, host); | |
6661 | ||
6662 | spin_lock_init(&host->lock); | |
6663 | host->dev = dev; | |
6664 | host->n_ports = max_ports; | |
6665 | ||
6666 | /* allocate ports bound to this host */ | |
6667 | for (i = 0; i < max_ports; i++) { | |
6668 | struct ata_port *ap; | |
6669 | ||
6670 | ap = ata_port_alloc(host); | |
6671 | if (!ap) | |
6672 | goto err_out; | |
6673 | ||
6674 | ap->port_no = i; | |
6675 | host->ports[i] = ap; | |
6676 | } | |
6677 | ||
6678 | devres_remove_group(dev, NULL); | |
6679 | return host; | |
6680 | ||
6681 | err_out: | |
6682 | devres_release_group(dev, NULL); | |
6683 | return NULL; | |
6684 | } | |
6685 | ||
f5cda257 TH |
6686 | /** |
6687 | * ata_host_alloc_pinfo - alloc host and init with port_info array | |
6688 | * @dev: generic device this host is associated with | |
6689 | * @ppi: array of ATA port_info to initialize host with | |
6690 | * @n_ports: number of ATA ports attached to this host | |
6691 | * | |
6692 | * Allocate ATA host and initialize with info from @ppi. If NULL | |
6693 | * terminated, @ppi may contain fewer entries than @n_ports. The | |
6694 | * last entry will be used for the remaining ports. | |
6695 | * | |
6696 | * RETURNS: | |
6697 | * Allocate ATA host on success, NULL on failure. | |
6698 | * | |
6699 | * LOCKING: | |
6700 | * Inherited from calling layer (may sleep). | |
6701 | */ | |
6702 | struct ata_host *ata_host_alloc_pinfo(struct device *dev, | |
6703 | const struct ata_port_info * const * ppi, | |
6704 | int n_ports) | |
6705 | { | |
6706 | const struct ata_port_info *pi; | |
6707 | struct ata_host *host; | |
6708 | int i, j; | |
6709 | ||
6710 | host = ata_host_alloc(dev, n_ports); | |
6711 | if (!host) | |
6712 | return NULL; | |
6713 | ||
6714 | for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { | |
6715 | struct ata_port *ap = host->ports[i]; | |
6716 | ||
6717 | if (ppi[j]) | |
6718 | pi = ppi[j++]; | |
6719 | ||
6720 | ap->pio_mask = pi->pio_mask; | |
6721 | ap->mwdma_mask = pi->mwdma_mask; | |
6722 | ap->udma_mask = pi->udma_mask; | |
6723 | ap->flags |= pi->flags; | |
0c88758b | 6724 | ap->link.flags |= pi->link_flags; |
f5cda257 TH |
6725 | ap->ops = pi->port_ops; |
6726 | ||
6727 | if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) | |
6728 | host->ops = pi->port_ops; | |
6729 | if (!host->private_data && pi->private_data) | |
6730 | host->private_data = pi->private_data; | |
6731 | } | |
6732 | ||
6733 | return host; | |
6734 | } | |
6735 | ||
ecef7253 TH |
6736 | /** |
6737 | * ata_host_start - start and freeze ports of an ATA host | |
6738 | * @host: ATA host to start ports for | |
6739 | * | |
6740 | * Start and then freeze ports of @host. Started status is | |
6741 | * recorded in host->flags, so this function can be called | |
6742 | * multiple times. Ports are guaranteed to get started only | |
f3187195 TH |
6743 | * once. If host->ops isn't initialized yet, its set to the |
6744 | * first non-dummy port ops. | |
ecef7253 TH |
6745 | * |
6746 | * LOCKING: | |
6747 | * Inherited from calling layer (may sleep). | |
6748 | * | |
6749 | * RETURNS: | |
6750 | * 0 if all ports are started successfully, -errno otherwise. | |
6751 | */ | |
6752 | int ata_host_start(struct ata_host *host) | |
6753 | { | |
6754 | int i, rc; | |
6755 | ||
6756 | if (host->flags & ATA_HOST_STARTED) | |
6757 | return 0; | |
6758 | ||
6759 | for (i = 0; i < host->n_ports; i++) { | |
6760 | struct ata_port *ap = host->ports[i]; | |
6761 | ||
f3187195 TH |
6762 | if (!host->ops && !ata_port_is_dummy(ap)) |
6763 | host->ops = ap->ops; | |
6764 | ||
ecef7253 TH |
6765 | if (ap->ops->port_start) { |
6766 | rc = ap->ops->port_start(ap); | |
6767 | if (rc) { | |
6768 | ata_port_printk(ap, KERN_ERR, "failed to " | |
6769 | "start port (errno=%d)\n", rc); | |
6770 | goto err_out; | |
6771 | } | |
6772 | } | |
6773 | ||
6774 | ata_eh_freeze_port(ap); | |
6775 | } | |
6776 | ||
6777 | host->flags |= ATA_HOST_STARTED; | |
6778 | return 0; | |
6779 | ||
6780 | err_out: | |
6781 | while (--i >= 0) { | |
6782 | struct ata_port *ap = host->ports[i]; | |
6783 | ||
6784 | if (ap->ops->port_stop) | |
6785 | ap->ops->port_stop(ap); | |
6786 | } | |
6787 | return rc; | |
6788 | } | |
6789 | ||
b03732f0 | 6790 | /** |
cca3974e JG |
6791 | * ata_sas_host_init - Initialize a host struct |
6792 | * @host: host to initialize | |
6793 | * @dev: device host is attached to | |
6794 | * @flags: host flags | |
6795 | * @ops: port_ops | |
b03732f0 BK |
6796 | * |
6797 | * LOCKING: | |
6798 | * PCI/etc. bus probe sem. | |
6799 | * | |
6800 | */ | |
f3187195 | 6801 | /* KILLME - the only user left is ipr */ |
cca3974e JG |
6802 | void ata_host_init(struct ata_host *host, struct device *dev, |
6803 | unsigned long flags, const struct ata_port_operations *ops) | |
b03732f0 | 6804 | { |
cca3974e JG |
6805 | spin_lock_init(&host->lock); |
6806 | host->dev = dev; | |
6807 | host->flags = flags; | |
6808 | host->ops = ops; | |
b03732f0 BK |
6809 | } |
6810 | ||
f3187195 TH |
6811 | /** |
6812 | * ata_host_register - register initialized ATA host | |
6813 | * @host: ATA host to register | |
6814 | * @sht: template for SCSI host | |
6815 | * | |
6816 | * Register initialized ATA host. @host is allocated using | |
6817 | * ata_host_alloc() and fully initialized by LLD. This function | |
6818 | * starts ports, registers @host with ATA and SCSI layers and | |
6819 | * probe registered devices. | |
6820 | * | |
6821 | * LOCKING: | |
6822 | * Inherited from calling layer (may sleep). | |
6823 | * | |
6824 | * RETURNS: | |
6825 | * 0 on success, -errno otherwise. | |
6826 | */ | |
6827 | int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) | |
6828 | { | |
6829 | int i, rc; | |
6830 | ||
6831 | /* host must have been started */ | |
6832 | if (!(host->flags & ATA_HOST_STARTED)) { | |
6833 | dev_printk(KERN_ERR, host->dev, | |
6834 | "BUG: trying to register unstarted host\n"); | |
6835 | WARN_ON(1); | |
6836 | return -EINVAL; | |
6837 | } | |
6838 | ||
6839 | /* Blow away unused ports. This happens when LLD can't | |
6840 | * determine the exact number of ports to allocate at | |
6841 | * allocation time. | |
6842 | */ | |
6843 | for (i = host->n_ports; host->ports[i]; i++) | |
6844 | kfree(host->ports[i]); | |
6845 | ||
6846 | /* give ports names and add SCSI hosts */ | |
6847 | for (i = 0; i < host->n_ports; i++) | |
6848 | host->ports[i]->print_id = ata_print_id++; | |
6849 | ||
6850 | rc = ata_scsi_add_hosts(host, sht); | |
6851 | if (rc) | |
6852 | return rc; | |
6853 | ||
fafbae87 TH |
6854 | /* associate with ACPI nodes */ |
6855 | ata_acpi_associate(host); | |
6856 | ||
f3187195 TH |
6857 | /* set cable, sata_spd_limit and report */ |
6858 | for (i = 0; i < host->n_ports; i++) { | |
6859 | struct ata_port *ap = host->ports[i]; | |
f3187195 TH |
6860 | unsigned long xfer_mask; |
6861 | ||
6862 | /* set SATA cable type if still unset */ | |
6863 | if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) | |
6864 | ap->cbl = ATA_CBL_SATA; | |
6865 | ||
6866 | /* init sata_spd_limit to the current value */ | |
4fb37a25 | 6867 | sata_link_init_spd(&ap->link); |
f3187195 | 6868 | |
cbcdd875 | 6869 | /* print per-port info to dmesg */ |
f3187195 TH |
6870 | xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, |
6871 | ap->udma_mask); | |
6872 | ||
abf6e8ed | 6873 | if (!ata_port_is_dummy(ap)) { |
cbcdd875 TH |
6874 | ata_port_printk(ap, KERN_INFO, |
6875 | "%cATA max %s %s\n", | |
a16abc0b | 6876 | (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', |
f3187195 | 6877 | ata_mode_string(xfer_mask), |
cbcdd875 | 6878 | ap->link.eh_info.desc); |
abf6e8ed TH |
6879 | ata_ehi_clear_desc(&ap->link.eh_info); |
6880 | } else | |
f3187195 TH |
6881 | ata_port_printk(ap, KERN_INFO, "DUMMY\n"); |
6882 | } | |
6883 | ||
6884 | /* perform each probe synchronously */ | |
6885 | DPRINTK("probe begin\n"); | |
6886 | for (i = 0; i < host->n_ports; i++) { | |
6887 | struct ata_port *ap = host->ports[i]; | |
6888 | int rc; | |
6889 | ||
6890 | /* probe */ | |
6891 | if (ap->ops->error_handler) { | |
9af5c9c9 | 6892 | struct ata_eh_info *ehi = &ap->link.eh_info; |
f3187195 TH |
6893 | unsigned long flags; |
6894 | ||
6895 | ata_port_probe(ap); | |
6896 | ||
6897 | /* kick EH for boot probing */ | |
6898 | spin_lock_irqsave(ap->lock, flags); | |
6899 | ||
f58229f8 TH |
6900 | ehi->probe_mask = |
6901 | (1 << ata_link_max_devices(&ap->link)) - 1; | |
f3187195 TH |
6902 | ehi->action |= ATA_EH_SOFTRESET; |
6903 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
6904 | ||
f4d6d004 | 6905 | ap->pflags &= ~ATA_PFLAG_INITIALIZING; |
f3187195 TH |
6906 | ap->pflags |= ATA_PFLAG_LOADING; |
6907 | ata_port_schedule_eh(ap); | |
6908 | ||
6909 | spin_unlock_irqrestore(ap->lock, flags); | |
6910 | ||
6911 | /* wait for EH to finish */ | |
6912 | ata_port_wait_eh(ap); | |
6913 | } else { | |
6914 | DPRINTK("ata%u: bus probe begin\n", ap->print_id); | |
6915 | rc = ata_bus_probe(ap); | |
6916 | DPRINTK("ata%u: bus probe end\n", ap->print_id); | |
6917 | ||
6918 | if (rc) { | |
6919 | /* FIXME: do something useful here? | |
6920 | * Current libata behavior will | |
6921 | * tear down everything when | |
6922 | * the module is removed | |
6923 | * or the h/w is unplugged. | |
6924 | */ | |
6925 | } | |
6926 | } | |
6927 | } | |
6928 | ||
6929 | /* probes are done, now scan each port's disk(s) */ | |
6930 | DPRINTK("host probe begin\n"); | |
6931 | for (i = 0; i < host->n_ports; i++) { | |
6932 | struct ata_port *ap = host->ports[i]; | |
6933 | ||
1ae46317 | 6934 | ata_scsi_scan_host(ap, 1); |
f3187195 TH |
6935 | } |
6936 | ||
6937 | return 0; | |
6938 | } | |
6939 | ||
f5cda257 TH |
6940 | /** |
6941 | * ata_host_activate - start host, request IRQ and register it | |
6942 | * @host: target ATA host | |
6943 | * @irq: IRQ to request | |
6944 | * @irq_handler: irq_handler used when requesting IRQ | |
6945 | * @irq_flags: irq_flags used when requesting IRQ | |
6946 | * @sht: scsi_host_template to use when registering the host | |
6947 | * | |
6948 | * After allocating an ATA host and initializing it, most libata | |
6949 | * LLDs perform three steps to activate the host - start host, | |
6950 | * request IRQ and register it. This helper takes necessasry | |
6951 | * arguments and performs the three steps in one go. | |
6952 | * | |
6953 | * LOCKING: | |
6954 | * Inherited from calling layer (may sleep). | |
6955 | * | |
6956 | * RETURNS: | |
6957 | * 0 on success, -errno otherwise. | |
6958 | */ | |
6959 | int ata_host_activate(struct ata_host *host, int irq, | |
6960 | irq_handler_t irq_handler, unsigned long irq_flags, | |
6961 | struct scsi_host_template *sht) | |
6962 | { | |
cbcdd875 | 6963 | int i, rc; |
f5cda257 TH |
6964 | |
6965 | rc = ata_host_start(host); | |
6966 | if (rc) | |
6967 | return rc; | |
6968 | ||
6969 | rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, | |
6970 | dev_driver_string(host->dev), host); | |
6971 | if (rc) | |
6972 | return rc; | |
6973 | ||
cbcdd875 TH |
6974 | for (i = 0; i < host->n_ports; i++) |
6975 | ata_port_desc(host->ports[i], "irq %d", irq); | |
4031826b | 6976 | |
f5cda257 TH |
6977 | rc = ata_host_register(host, sht); |
6978 | /* if failed, just free the IRQ and leave ports alone */ | |
6979 | if (rc) | |
6980 | devm_free_irq(host->dev, irq, host); | |
6981 | ||
6982 | return rc; | |
6983 | } | |
6984 | ||
720ba126 TH |
6985 | /** |
6986 | * ata_port_detach - Detach ATA port in prepration of device removal | |
6987 | * @ap: ATA port to be detached | |
6988 | * | |
6989 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
6990 | * then, remove the associated SCSI host. @ap is guaranteed to | |
6991 | * be quiescent on return from this function. | |
6992 | * | |
6993 | * LOCKING: | |
6994 | * Kernel thread context (may sleep). | |
6995 | */ | |
741b7763 | 6996 | static void ata_port_detach(struct ata_port *ap) |
720ba126 TH |
6997 | { |
6998 | unsigned long flags; | |
41bda9c9 | 6999 | struct ata_link *link; |
f58229f8 | 7000 | struct ata_device *dev; |
720ba126 TH |
7001 | |
7002 | if (!ap->ops->error_handler) | |
c3cf30a9 | 7003 | goto skip_eh; |
720ba126 TH |
7004 | |
7005 | /* tell EH we're leaving & flush EH */ | |
ba6a1308 | 7006 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 7007 | ap->pflags |= ATA_PFLAG_UNLOADING; |
ba6a1308 | 7008 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
7009 | |
7010 | ata_port_wait_eh(ap); | |
7011 | ||
7012 | /* EH is now guaranteed to see UNLOADING, so no new device | |
7013 | * will be attached. Disable all existing devices. | |
7014 | */ | |
ba6a1308 | 7015 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 7016 | |
41bda9c9 TH |
7017 | ata_port_for_each_link(link, ap) { |
7018 | ata_link_for_each_dev(dev, link) | |
7019 | ata_dev_disable(dev); | |
7020 | } | |
720ba126 | 7021 | |
ba6a1308 | 7022 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
7023 | |
7024 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
7025 | * will be skipped and retrials will be terminated with bad | |
7026 | * target. | |
7027 | */ | |
ba6a1308 | 7028 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 7029 | ata_port_freeze(ap); /* won't be thawed */ |
ba6a1308 | 7030 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
7031 | |
7032 | ata_port_wait_eh(ap); | |
45a66c1c | 7033 | cancel_rearming_delayed_work(&ap->hotplug_task); |
720ba126 | 7034 | |
c3cf30a9 | 7035 | skip_eh: |
720ba126 | 7036 | /* remove the associated SCSI host */ |
cca3974e | 7037 | scsi_remove_host(ap->scsi_host); |
720ba126 TH |
7038 | } |
7039 | ||
0529c159 TH |
7040 | /** |
7041 | * ata_host_detach - Detach all ports of an ATA host | |
7042 | * @host: Host to detach | |
7043 | * | |
7044 | * Detach all ports of @host. | |
7045 | * | |
7046 | * LOCKING: | |
7047 | * Kernel thread context (may sleep). | |
7048 | */ | |
7049 | void ata_host_detach(struct ata_host *host) | |
7050 | { | |
7051 | int i; | |
7052 | ||
7053 | for (i = 0; i < host->n_ports; i++) | |
7054 | ata_port_detach(host->ports[i]); | |
7055 | } | |
7056 | ||
1da177e4 LT |
7057 | /** |
7058 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
7059 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
7060 | * |
7061 | * Utility function which initializes data_addr, error_addr, | |
7062 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
7063 | * device_addr, status_addr, and command_addr to standard offsets | |
7064 | * relative to cmd_addr. | |
7065 | * | |
7066 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 7067 | */ |
0baab86b | 7068 | |
1da177e4 LT |
7069 | void ata_std_ports(struct ata_ioports *ioaddr) |
7070 | { | |
7071 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
7072 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
7073 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
7074 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
7075 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
7076 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
7077 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
7078 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
7079 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
7080 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
7081 | } | |
7082 | ||
0baab86b | 7083 | |
374b1873 JG |
7084 | #ifdef CONFIG_PCI |
7085 | ||
1da177e4 LT |
7086 | /** |
7087 | * ata_pci_remove_one - PCI layer callback for device removal | |
7088 | * @pdev: PCI device that was removed | |
7089 | * | |
b878ca5d TH |
7090 | * PCI layer indicates to libata via this hook that hot-unplug or |
7091 | * module unload event has occurred. Detach all ports. Resource | |
7092 | * release is handled via devres. | |
1da177e4 LT |
7093 | * |
7094 | * LOCKING: | |
7095 | * Inherited from PCI layer (may sleep). | |
7096 | */ | |
f0d36efd | 7097 | void ata_pci_remove_one(struct pci_dev *pdev) |
1da177e4 | 7098 | { |
2855568b | 7099 | struct device *dev = &pdev->dev; |
cca3974e | 7100 | struct ata_host *host = dev_get_drvdata(dev); |
1da177e4 | 7101 | |
b878ca5d | 7102 | ata_host_detach(host); |
1da177e4 LT |
7103 | } |
7104 | ||
7105 | /* move to PCI subsystem */ | |
057ace5e | 7106 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
7107 | { |
7108 | unsigned long tmp = 0; | |
7109 | ||
7110 | switch (bits->width) { | |
7111 | case 1: { | |
7112 | u8 tmp8 = 0; | |
7113 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
7114 | tmp = tmp8; | |
7115 | break; | |
7116 | } | |
7117 | case 2: { | |
7118 | u16 tmp16 = 0; | |
7119 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
7120 | tmp = tmp16; | |
7121 | break; | |
7122 | } | |
7123 | case 4: { | |
7124 | u32 tmp32 = 0; | |
7125 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
7126 | tmp = tmp32; | |
7127 | break; | |
7128 | } | |
7129 | ||
7130 | default: | |
7131 | return -EINVAL; | |
7132 | } | |
7133 | ||
7134 | tmp &= bits->mask; | |
7135 | ||
7136 | return (tmp == bits->val) ? 1 : 0; | |
7137 | } | |
9b847548 | 7138 | |
6ffa01d8 | 7139 | #ifdef CONFIG_PM |
3c5100c1 | 7140 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) |
9b847548 JA |
7141 | { |
7142 | pci_save_state(pdev); | |
4c90d971 | 7143 | pci_disable_device(pdev); |
500530f6 | 7144 | |
4c90d971 | 7145 | if (mesg.event == PM_EVENT_SUSPEND) |
500530f6 | 7146 | pci_set_power_state(pdev, PCI_D3hot); |
9b847548 JA |
7147 | } |
7148 | ||
553c4aa6 | 7149 | int ata_pci_device_do_resume(struct pci_dev *pdev) |
9b847548 | 7150 | { |
553c4aa6 TH |
7151 | int rc; |
7152 | ||
9b847548 JA |
7153 | pci_set_power_state(pdev, PCI_D0); |
7154 | pci_restore_state(pdev); | |
553c4aa6 | 7155 | |
b878ca5d | 7156 | rc = pcim_enable_device(pdev); |
553c4aa6 TH |
7157 | if (rc) { |
7158 | dev_printk(KERN_ERR, &pdev->dev, | |
7159 | "failed to enable device after resume (%d)\n", rc); | |
7160 | return rc; | |
7161 | } | |
7162 | ||
9b847548 | 7163 | pci_set_master(pdev); |
553c4aa6 | 7164 | return 0; |
500530f6 TH |
7165 | } |
7166 | ||
3c5100c1 | 7167 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
500530f6 | 7168 | { |
cca3974e | 7169 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
7170 | int rc = 0; |
7171 | ||
cca3974e | 7172 | rc = ata_host_suspend(host, mesg); |
500530f6 TH |
7173 | if (rc) |
7174 | return rc; | |
7175 | ||
3c5100c1 | 7176 | ata_pci_device_do_suspend(pdev, mesg); |
500530f6 TH |
7177 | |
7178 | return 0; | |
7179 | } | |
7180 | ||
7181 | int ata_pci_device_resume(struct pci_dev *pdev) | |
7182 | { | |
cca3974e | 7183 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
553c4aa6 | 7184 | int rc; |
500530f6 | 7185 | |
553c4aa6 TH |
7186 | rc = ata_pci_device_do_resume(pdev); |
7187 | if (rc == 0) | |
7188 | ata_host_resume(host); | |
7189 | return rc; | |
9b847548 | 7190 | } |
6ffa01d8 TH |
7191 | #endif /* CONFIG_PM */ |
7192 | ||
1da177e4 LT |
7193 | #endif /* CONFIG_PCI */ |
7194 | ||
7195 | ||
1da177e4 LT |
7196 | static int __init ata_init(void) |
7197 | { | |
a8601e5f | 7198 | ata_probe_timeout *= HZ; |
1da177e4 LT |
7199 | ata_wq = create_workqueue("ata"); |
7200 | if (!ata_wq) | |
7201 | return -ENOMEM; | |
7202 | ||
453b07ac TH |
7203 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
7204 | if (!ata_aux_wq) { | |
7205 | destroy_workqueue(ata_wq); | |
7206 | return -ENOMEM; | |
7207 | } | |
7208 | ||
1da177e4 LT |
7209 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
7210 | return 0; | |
7211 | } | |
7212 | ||
7213 | static void __exit ata_exit(void) | |
7214 | { | |
7215 | destroy_workqueue(ata_wq); | |
453b07ac | 7216 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
7217 | } |
7218 | ||
a4625085 | 7219 | subsys_initcall(ata_init); |
1da177e4 LT |
7220 | module_exit(ata_exit); |
7221 | ||
67846b30 | 7222 | static unsigned long ratelimit_time; |
34af946a | 7223 | static DEFINE_SPINLOCK(ata_ratelimit_lock); |
67846b30 JG |
7224 | |
7225 | int ata_ratelimit(void) | |
7226 | { | |
7227 | int rc; | |
7228 | unsigned long flags; | |
7229 | ||
7230 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
7231 | ||
7232 | if (time_after(jiffies, ratelimit_time)) { | |
7233 | rc = 1; | |
7234 | ratelimit_time = jiffies + (HZ/5); | |
7235 | } else | |
7236 | rc = 0; | |
7237 | ||
7238 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
7239 | ||
7240 | return rc; | |
7241 | } | |
7242 | ||
c22daff4 TH |
7243 | /** |
7244 | * ata_wait_register - wait until register value changes | |
7245 | * @reg: IO-mapped register | |
7246 | * @mask: Mask to apply to read register value | |
7247 | * @val: Wait condition | |
7248 | * @interval_msec: polling interval in milliseconds | |
7249 | * @timeout_msec: timeout in milliseconds | |
7250 | * | |
7251 | * Waiting for some bits of register to change is a common | |
7252 | * operation for ATA controllers. This function reads 32bit LE | |
7253 | * IO-mapped register @reg and tests for the following condition. | |
7254 | * | |
7255 | * (*@reg & mask) != val | |
7256 | * | |
7257 | * If the condition is met, it returns; otherwise, the process is | |
7258 | * repeated after @interval_msec until timeout. | |
7259 | * | |
7260 | * LOCKING: | |
7261 | * Kernel thread context (may sleep) | |
7262 | * | |
7263 | * RETURNS: | |
7264 | * The final register value. | |
7265 | */ | |
7266 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
7267 | unsigned long interval_msec, | |
7268 | unsigned long timeout_msec) | |
7269 | { | |
7270 | unsigned long timeout; | |
7271 | u32 tmp; | |
7272 | ||
7273 | tmp = ioread32(reg); | |
7274 | ||
7275 | /* Calculate timeout _after_ the first read to make sure | |
7276 | * preceding writes reach the controller before starting to | |
7277 | * eat away the timeout. | |
7278 | */ | |
7279 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
7280 | ||
7281 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
7282 | msleep(interval_msec); | |
7283 | tmp = ioread32(reg); | |
7284 | } | |
7285 | ||
7286 | return tmp; | |
7287 | } | |
7288 | ||
dd5b06c4 TH |
7289 | /* |
7290 | * Dummy port_ops | |
7291 | */ | |
7292 | static void ata_dummy_noret(struct ata_port *ap) { } | |
7293 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } | |
7294 | static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } | |
7295 | ||
7296 | static u8 ata_dummy_check_status(struct ata_port *ap) | |
7297 | { | |
7298 | return ATA_DRDY; | |
7299 | } | |
7300 | ||
7301 | static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) | |
7302 | { | |
7303 | return AC_ERR_SYSTEM; | |
7304 | } | |
7305 | ||
7306 | const struct ata_port_operations ata_dummy_port_ops = { | |
dd5b06c4 TH |
7307 | .check_status = ata_dummy_check_status, |
7308 | .check_altstatus = ata_dummy_check_status, | |
7309 | .dev_select = ata_noop_dev_select, | |
7310 | .qc_prep = ata_noop_qc_prep, | |
7311 | .qc_issue = ata_dummy_qc_issue, | |
7312 | .freeze = ata_dummy_noret, | |
7313 | .thaw = ata_dummy_noret, | |
7314 | .error_handler = ata_dummy_noret, | |
7315 | .post_internal_cmd = ata_dummy_qc_noret, | |
7316 | .irq_clear = ata_dummy_noret, | |
7317 | .port_start = ata_dummy_ret0, | |
7318 | .port_stop = ata_dummy_noret, | |
7319 | }; | |
7320 | ||
21b0ad4f TH |
7321 | const struct ata_port_info ata_dummy_port_info = { |
7322 | .port_ops = &ata_dummy_port_ops, | |
7323 | }; | |
7324 | ||
1da177e4 LT |
7325 | /* |
7326 | * libata is essentially a library of internal helper functions for | |
7327 | * low-level ATA host controller drivers. As such, the API/ABI is | |
7328 | * likely to change as new drivers are added and updated. | |
7329 | * Do not depend on ABI/API stability. | |
7330 | */ | |
7331 | ||
e9c83914 TH |
7332 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); |
7333 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
7334 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
dd5b06c4 | 7335 | EXPORT_SYMBOL_GPL(ata_dummy_port_ops); |
21b0ad4f | 7336 | EXPORT_SYMBOL_GPL(ata_dummy_port_info); |
1da177e4 LT |
7337 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
7338 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
cca3974e | 7339 | EXPORT_SYMBOL_GPL(ata_host_init); |
f3187195 | 7340 | EXPORT_SYMBOL_GPL(ata_host_alloc); |
f5cda257 | 7341 | EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); |
ecef7253 | 7342 | EXPORT_SYMBOL_GPL(ata_host_start); |
f3187195 | 7343 | EXPORT_SYMBOL_GPL(ata_host_register); |
f5cda257 | 7344 | EXPORT_SYMBOL_GPL(ata_host_activate); |
0529c159 | 7345 | EXPORT_SYMBOL_GPL(ata_host_detach); |
1da177e4 LT |
7346 | EXPORT_SYMBOL_GPL(ata_sg_init); |
7347 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 7348 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 7349 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 7350 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 7351 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
7352 | EXPORT_SYMBOL_GPL(ata_tf_load); |
7353 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
7354 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
7355 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
43727fbc | 7356 | EXPORT_SYMBOL_GPL(sata_print_link_status); |
1da177e4 LT |
7357 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); |
7358 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
7359 | EXPORT_SYMBOL_GPL(ata_check_status); | |
7360 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
7361 | EXPORT_SYMBOL_GPL(ata_exec_command); |
7362 | EXPORT_SYMBOL_GPL(ata_port_start); | |
d92e74d3 | 7363 | EXPORT_SYMBOL_GPL(ata_sff_port_start); |
1da177e4 | 7364 | EXPORT_SYMBOL_GPL(ata_interrupt); |
04351821 | 7365 | EXPORT_SYMBOL_GPL(ata_do_set_mode); |
0d5ff566 TH |
7366 | EXPORT_SYMBOL_GPL(ata_data_xfer); |
7367 | EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); | |
31cc23b3 | 7368 | EXPORT_SYMBOL_GPL(ata_std_qc_defer); |
1da177e4 | 7369 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
d26fc955 | 7370 | EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); |
e46834cd | 7371 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
7372 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
7373 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
7374 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
7375 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
7376 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
7377 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
7378 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
7379 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
7380 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
7381 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 7382 | EXPORT_SYMBOL_GPL(ata_port_probe); |
10305f0f | 7383 | EXPORT_SYMBOL_GPL(ata_dev_disable); |
3c567b7d | 7384 | EXPORT_SYMBOL_GPL(sata_set_spd); |
936fd732 TH |
7385 | EXPORT_SYMBOL_GPL(sata_link_debounce); |
7386 | EXPORT_SYMBOL_GPL(sata_link_resume); | |
1da177e4 LT |
7387 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
7388 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
7389 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
f5914a46 | 7390 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 | 7391 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
cc0680a5 | 7392 | EXPORT_SYMBOL_GPL(sata_link_hardreset); |
c2bd5804 TH |
7393 | EXPORT_SYMBOL_GPL(sata_std_hardreset); |
7394 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
2e9edbf8 JG |
7395 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
7396 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 7397 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 7398 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 7399 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 7400 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
88ff6eaf | 7401 | EXPORT_SYMBOL_GPL(ata_wait_after_reset); |
d4b2bab4 | 7402 | EXPORT_SYMBOL_GPL(ata_wait_ready); |
86e45b6b | 7403 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
7404 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
7405 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 7406 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 7407 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 7408 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 | 7409 | EXPORT_SYMBOL_GPL(ata_host_intr); |
34bf2170 TH |
7410 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
7411 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
7412 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
7413 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
936fd732 TH |
7414 | EXPORT_SYMBOL_GPL(ata_link_online); |
7415 | EXPORT_SYMBOL_GPL(ata_link_offline); | |
6ffa01d8 | 7416 | #ifdef CONFIG_PM |
cca3974e JG |
7417 | EXPORT_SYMBOL_GPL(ata_host_suspend); |
7418 | EXPORT_SYMBOL_GPL(ata_host_resume); | |
6ffa01d8 | 7419 | #endif /* CONFIG_PM */ |
6a62a04d TH |
7420 | EXPORT_SYMBOL_GPL(ata_id_string); |
7421 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
10305f0f | 7422 | EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); |
1da177e4 LT |
7423 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
7424 | ||
1bc4ccff | 7425 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
7426 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
7427 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
7428 | ||
1da177e4 LT |
7429 | #ifdef CONFIG_PCI |
7430 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
d583bc18 | 7431 | EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); |
1626aeb8 | 7432 | EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); |
d583bc18 | 7433 | EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); |
1da177e4 LT |
7434 | EXPORT_SYMBOL_GPL(ata_pci_init_one); |
7435 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
6ffa01d8 | 7436 | #ifdef CONFIG_PM |
500530f6 TH |
7437 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); |
7438 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
9b847548 JA |
7439 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
7440 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
6ffa01d8 | 7441 | #endif /* CONFIG_PM */ |
67951ade AC |
7442 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
7443 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 7444 | #endif /* CONFIG_PCI */ |
9b847548 | 7445 | |
31f88384 | 7446 | EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); |
3af9a77a TH |
7447 | EXPORT_SYMBOL_GPL(sata_pmp_std_prereset); |
7448 | EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset); | |
7449 | EXPORT_SYMBOL_GPL(sata_pmp_std_postreset); | |
7450 | EXPORT_SYMBOL_GPL(sata_pmp_do_eh); | |
7451 | ||
b64bbc39 TH |
7452 | EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); |
7453 | EXPORT_SYMBOL_GPL(ata_ehi_push_desc); | |
7454 | EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); | |
cbcdd875 TH |
7455 | EXPORT_SYMBOL_GPL(ata_port_desc); |
7456 | #ifdef CONFIG_PCI | |
7457 | EXPORT_SYMBOL_GPL(ata_port_pbar_desc); | |
7458 | #endif /* CONFIG_PCI */ | |
ece1d636 | 7459 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 | 7460 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
dbd82616 | 7461 | EXPORT_SYMBOL_GPL(ata_link_abort); |
7b70fc03 | 7462 | EXPORT_SYMBOL_GPL(ata_port_abort); |
e3180499 | 7463 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
7d77b247 | 7464 | EXPORT_SYMBOL_GPL(sata_async_notification); |
e3180499 TH |
7465 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); |
7466 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
7467 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
7468 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 7469 | EXPORT_SYMBOL_GPL(ata_do_eh); |
83625006 | 7470 | EXPORT_SYMBOL_GPL(ata_irq_on); |
a619f981 | 7471 | EXPORT_SYMBOL_GPL(ata_dev_try_classify); |
be0d18df AC |
7472 | |
7473 | EXPORT_SYMBOL_GPL(ata_cable_40wire); | |
7474 | EXPORT_SYMBOL_GPL(ata_cable_80wire); | |
7475 | EXPORT_SYMBOL_GPL(ata_cable_unknown); | |
7476 | EXPORT_SYMBOL_GPL(ata_cable_sata); |