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669a5db4 JG |
1 | /* |
2 | * pata_ali.c - ALI 15x3 PATA for new ATA layer | |
3 | * (C) 2005 Red Hat Inc | |
4 | * Alan Cox <alan@redhat.com> | |
5 | * | |
6 | * based in part upon | |
7 | * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 | |
8 | * | |
9 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer | |
10 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
11 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
12 | * | |
13 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
14 | * May be copied or modified under the terms of the GNU General Public License | |
15 | * Copyright (C) 2002 Alan Cox <alan@redhat.com> | |
16 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> | |
17 | * | |
18 | * Documentation | |
19 | * Chipset documentation available under NDA only | |
20 | * | |
21 | * TODO/CHECK | |
22 | * Cannot have ATAPI on both master & slave for rev < c2 (???) but | |
23 | * otherwise should do atapi DMA. | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/blkdev.h> | |
31 | #include <linux/delay.h> | |
32 | #include <scsi/scsi_host.h> | |
33 | #include <linux/libata.h> | |
34 | #include <linux/dmi.h> | |
35 | ||
36 | #define DRV_NAME "pata_ali" | |
2a3103ce | 37 | #define DRV_VERSION "0.7.5" |
669a5db4 JG |
38 | |
39 | /* | |
40 | * Cable special cases | |
41 | */ | |
42 | ||
43 | static struct dmi_system_id cable_dmi_table[] = { | |
44 | { | |
45 | .ident = "HP Pavilion N5430", | |
46 | .matches = { | |
47 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
5c8d5201 | 48 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
669a5db4 JG |
49 | }, |
50 | }, | |
03e6f489 DE |
51 | { |
52 | .ident = "Toshiba Satelite S1800-814", | |
53 | .matches = { | |
54 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
55 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
56 | }, | |
57 | }, | |
669a5db4 JG |
58 | { } |
59 | }; | |
60 | ||
61 | static int ali_cable_override(struct pci_dev *pdev) | |
62 | { | |
63 | /* Fujitsu P2000 */ | |
64 | if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) | |
65 | return 1; | |
66 | /* Systems by DMI */ | |
67 | if (dmi_check_system(cable_dmi_table)) | |
68 | return 1; | |
69 | return 0; | |
70 | } | |
71 | ||
72 | /** | |
73 | * ali_c2_cable_detect - cable detection | |
74 | * @ap: ATA port | |
75 | * | |
76 | * Perform cable detection for C2 and later revisions | |
77 | */ | |
78 | ||
79 | static int ali_c2_cable_detect(struct ata_port *ap) | |
80 | { | |
81 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
82 | u8 ata66; | |
83 | ||
84 | /* Certain laptops use short but suitable cables and don't | |
85 | implement the detect logic */ | |
86 | ||
87 | if (ali_cable_override(pdev)) | |
fc085150 | 88 | return ATA_CBL_PATA40_SHORT; |
669a5db4 JG |
89 | |
90 | /* Host view cable detect 0x4A bit 0 primary bit 1 secondary | |
91 | Bit set for 40 pin */ | |
92 | pci_read_config_byte(pdev, 0x4A, &ata66); | |
93 | if (ata66 & (1 << ap->port_no)) | |
94 | return ATA_CBL_PATA40; | |
95 | else | |
96 | return ATA_CBL_PATA80; | |
97 | } | |
98 | ||
669a5db4 JG |
99 | /** |
100 | * ali_20_filter - filter for earlier ALI DMA | |
101 | * @ap: ALi ATA port | |
102 | * @adev: attached device | |
103 | * | |
104 | * Ensure that we do not do DMA on CD devices. We may be able to | |
105 | * fix that later on. Also ensure we do not do UDMA on WDC drives | |
106 | */ | |
107 | ||
a76b62ca | 108 | static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) |
669a5db4 | 109 | { |
8bfa79fc | 110 | char model_num[ATA_ID_PROD_LEN + 1]; |
669a5db4 JG |
111 | /* No DMA on anything but a disk for now */ |
112 | if (adev->class != ATA_DEV_ATA) | |
113 | mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
8bfa79fc | 114 | ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
669a5db4 JG |
115 | if (strstr(model_num, "WDC")) |
116 | return mask &= ~ATA_MASK_UDMA; | |
a76b62ca | 117 | return ata_pci_default_filter(adev, mask); |
669a5db4 JG |
118 | } |
119 | ||
120 | /** | |
121 | * ali_fifo_control - FIFO manager | |
122 | * @ap: ALi channel to control | |
123 | * @adev: device for FIFO control | |
124 | * @on: 0 for off 1 for on | |
125 | * | |
126 | * Enable or disable the FIFO on a given device. Because of the way the | |
127 | * ALi FIFO works it provides a boost on ATA disk but can be confused by | |
128 | * ATAPI and we must therefore manage it. | |
129 | */ | |
130 | ||
131 | static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) | |
132 | { | |
133 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
134 | int pio_fifo = 0x54 + ap->port_no; | |
135 | u8 fifo; | |
136 | int shift = 4 * adev->devno; | |
137 | ||
138 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to | |
139 | 0x00. Not all the docs agree but the behaviour we now use is the | |
140 | one stated in the BIOS Programming Guide */ | |
85cd7251 | 141 | |
669a5db4 JG |
142 | pci_read_config_byte(pdev, pio_fifo, &fifo); |
143 | fifo &= ~(0x0F << shift); | |
144 | if (on) | |
145 | fifo |= (on << shift); | |
146 | pci_write_config_byte(pdev, pio_fifo, fifo); | |
147 | } | |
148 | ||
149 | /** | |
150 | * ali_program_modes - load mode registers | |
151 | * @ap: ALi channel to load | |
152 | * @adev: Device the timing is for | |
153 | * @cmd: Command timing | |
154 | * @data: Data timing | |
155 | * @ultra: UDMA timing or zero for off | |
156 | * | |
157 | * Loads the timing registers for cmd/data and disable UDMA if | |
158 | * ultra is zero. If ultra is set then load and enable the UDMA | |
159 | * timing but do not touch the command/data timing. | |
160 | */ | |
161 | ||
162 | static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) | |
163 | { | |
164 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
165 | int cas = 0x58 + 4 * ap->port_no; /* Command timing */ | |
166 | int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ | |
167 | int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ | |
168 | int udmat = 0x56 + ap->port_no; /* UDMA timing */ | |
169 | int shift = 4 * adev->devno; | |
170 | u8 udma; | |
171 | ||
172 | if (t != NULL) { | |
173 | t->setup = FIT(t->setup, 1, 8) & 7; | |
174 | t->act8b = FIT(t->act8b, 1, 8) & 7; | |
175 | t->rec8b = FIT(t->rec8b, 1, 16) & 15; | |
176 | t->active = FIT(t->active, 1, 8) & 7; | |
177 | t->recover = FIT(t->recover, 1, 16) & 15; | |
178 | ||
179 | pci_write_config_byte(pdev, cas, t->setup); | |
180 | pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); | |
181 | pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); | |
182 | } | |
183 | ||
184 | /* Set up the UDMA enable */ | |
185 | pci_read_config_byte(pdev, udmat, &udma); | |
186 | udma &= ~(0x0F << shift); | |
187 | udma |= ultra << shift; | |
188 | pci_write_config_byte(pdev, udmat, udma); | |
189 | } | |
190 | ||
191 | /** | |
192 | * ali_set_piomode - set initial PIO mode data | |
193 | * @ap: ATA interface | |
194 | * @adev: ATA device | |
195 | * | |
196 | * Program the ALi registers for PIO mode. FIXME: add timings for | |
197 | * PIO5. | |
198 | */ | |
199 | ||
200 | static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
201 | { | |
202 | struct ata_device *pair = ata_dev_pair(adev); | |
203 | struct ata_timing t; | |
204 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
205 | ||
206 | ata_timing_compute(adev, adev->pio_mode, &t, T, 1); | |
207 | if (pair) { | |
208 | struct ata_timing p; | |
209 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
210 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
211 | if (pair->dma_mode) { | |
212 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
213 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
214 | } | |
215 | } | |
216 | ||
217 | /* PIO FIFO is only permitted on ATA disk */ | |
218 | if (adev->class != ATA_DEV_ATA) | |
219 | ali_fifo_control(ap, adev, 0x00); | |
220 | ali_program_modes(ap, adev, &t, 0); | |
221 | if (adev->class == ATA_DEV_ATA) | |
222 | ali_fifo_control(ap, adev, 0x05); | |
223 | ||
224 | } | |
225 | ||
226 | /** | |
227 | * ali_set_dmamode - set initial DMA mode data | |
228 | * @ap: ATA interface | |
229 | * @adev: ATA device | |
230 | * | |
231 | * FIXME: MWDMA timings | |
232 | */ | |
233 | ||
234 | static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |
235 | { | |
236 | static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; | |
237 | struct ata_device *pair = ata_dev_pair(adev); | |
238 | struct ata_timing t; | |
239 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
240 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
241 | ||
242 | ||
243 | if (adev->class == ATA_DEV_ATA) | |
244 | ali_fifo_control(ap, adev, 0x08); | |
245 | ||
246 | if (adev->dma_mode >= XFER_UDMA_0) { | |
247 | ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); | |
248 | if (adev->dma_mode >= XFER_UDMA_3) { | |
249 | u8 reg4b; | |
250 | pci_read_config_byte(pdev, 0x4B, ®4b); | |
251 | reg4b |= 1; | |
252 | pci_write_config_byte(pdev, 0x4B, reg4b); | |
253 | } | |
254 | } else { | |
255 | ata_timing_compute(adev, adev->dma_mode, &t, T, 1); | |
256 | if (pair) { | |
257 | struct ata_timing p; | |
258 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
259 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
260 | if (pair->dma_mode) { | |
261 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
262 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
263 | } | |
264 | } | |
265 | ali_program_modes(ap, adev, &t, 0); | |
266 | } | |
267 | } | |
268 | ||
269 | /** | |
270 | * ali_lock_sectors - Keep older devices to 255 sector mode | |
669a5db4 JG |
271 | * @adev: Device |
272 | * | |
273 | * Called during the bus probe for each device that is found. We use | |
274 | * this call to lock the sector count of the device to 255 or less on | |
275 | * older ALi controllers. If we didn't do this then large I/O's would | |
276 | * require LBA48 commands which the older ALi requires are issued by | |
277 | * slower PIO methods | |
278 | */ | |
279 | ||
cd0d3bbc | 280 | static void ali_lock_sectors(struct ata_device *adev) |
669a5db4 JG |
281 | { |
282 | adev->max_sectors = 255; | |
283 | } | |
284 | ||
285 | static struct scsi_host_template ali_sht = { | |
286 | .module = THIS_MODULE, | |
287 | .name = DRV_NAME, | |
288 | .ioctl = ata_scsi_ioctl, | |
289 | .queuecommand = ata_scsi_queuecmd, | |
290 | .can_queue = ATA_DEF_QUEUE, | |
291 | .this_id = ATA_SHT_THIS_ID, | |
292 | .sg_tablesize = LIBATA_MAX_PRD, | |
669a5db4 JG |
293 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
294 | .emulated = ATA_SHT_EMULATED, | |
295 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
296 | .proc_name = DRV_NAME, | |
297 | .dma_boundary = ATA_DMA_BOUNDARY, | |
298 | .slave_configure = ata_scsi_slave_config, | |
afdfe899 | 299 | .slave_destroy = ata_scsi_slave_destroy, |
669a5db4 JG |
300 | .bios_param = ata_std_bios_param, |
301 | }; | |
302 | ||
303 | /* | |
304 | * Port operations for PIO only ALi | |
305 | */ | |
306 | ||
307 | static struct ata_port_operations ali_early_port_ops = { | |
308 | .port_disable = ata_port_disable, | |
309 | .set_piomode = ali_set_piomode, | |
310 | .tf_load = ata_tf_load, | |
311 | .tf_read = ata_tf_read, | |
312 | .check_status = ata_check_status, | |
313 | .exec_command = ata_exec_command, | |
314 | .dev_select = ata_std_dev_select, | |
315 | ||
316 | .freeze = ata_bmdma_freeze, | |
317 | .thaw = ata_bmdma_thaw, | |
b723d144 | 318 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 319 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 320 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
321 | |
322 | .qc_prep = ata_qc_prep, | |
323 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 324 | |
0d5ff566 | 325 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
326 | |
327 | .irq_handler = ata_interrupt, | |
328 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
329 | .irq_on = ata_irq_on, |
330 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
331 | |
332 | .port_start = ata_port_start, | |
669a5db4 JG |
333 | }; |
334 | ||
335 | /* | |
336 | * Port operations for DMA capable ALi without cable | |
337 | * detect | |
338 | */ | |
339 | static struct ata_port_operations ali_20_port_ops = { | |
340 | .port_disable = ata_port_disable, | |
341 | ||
342 | .set_piomode = ali_set_piomode, | |
343 | .set_dmamode = ali_set_dmamode, | |
344 | .mode_filter = ali_20_filter, | |
345 | ||
346 | .tf_load = ata_tf_load, | |
347 | .tf_read = ata_tf_read, | |
348 | .check_status = ata_check_status, | |
349 | .exec_command = ata_exec_command, | |
350 | .dev_select = ata_std_dev_select, | |
351 | .dev_config = ali_lock_sectors, | |
352 | ||
353 | .freeze = ata_bmdma_freeze, | |
354 | .thaw = ata_bmdma_thaw, | |
b723d144 | 355 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 356 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 357 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
358 | |
359 | .bmdma_setup = ata_bmdma_setup, | |
360 | .bmdma_start = ata_bmdma_start, | |
361 | .bmdma_stop = ata_bmdma_stop, | |
362 | .bmdma_status = ata_bmdma_status, | |
363 | ||
364 | .qc_prep = ata_qc_prep, | |
365 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 366 | |
0d5ff566 | 367 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
368 | |
369 | .irq_handler = ata_interrupt, | |
370 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
371 | .irq_on = ata_irq_on, |
372 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
373 | |
374 | .port_start = ata_port_start, | |
669a5db4 JG |
375 | }; |
376 | ||
377 | /* | |
378 | * Port operations for DMA capable ALi with cable detect | |
379 | */ | |
380 | static struct ata_port_operations ali_c2_port_ops = { | |
381 | .port_disable = ata_port_disable, | |
382 | .set_piomode = ali_set_piomode, | |
383 | .set_dmamode = ali_set_dmamode, | |
384 | .mode_filter = ata_pci_default_filter, | |
385 | .tf_load = ata_tf_load, | |
386 | .tf_read = ata_tf_read, | |
387 | .check_status = ata_check_status, | |
388 | .exec_command = ata_exec_command, | |
389 | .dev_select = ata_std_dev_select, | |
390 | .dev_config = ali_lock_sectors, | |
391 | ||
392 | .freeze = ata_bmdma_freeze, | |
393 | .thaw = ata_bmdma_thaw, | |
b723d144 | 394 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 395 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 396 | .cable_detect = ali_c2_cable_detect, |
669a5db4 JG |
397 | |
398 | .bmdma_setup = ata_bmdma_setup, | |
399 | .bmdma_start = ata_bmdma_start, | |
400 | .bmdma_stop = ata_bmdma_stop, | |
401 | .bmdma_status = ata_bmdma_status, | |
402 | ||
403 | .qc_prep = ata_qc_prep, | |
404 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 405 | |
0d5ff566 | 406 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
407 | |
408 | .irq_handler = ata_interrupt, | |
409 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
410 | .irq_on = ata_irq_on, |
411 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
412 | |
413 | .port_start = ata_port_start, | |
669a5db4 JG |
414 | }; |
415 | ||
416 | /* | |
417 | * Port operations for DMA capable ALi with cable detect and LBA48 | |
418 | */ | |
419 | static struct ata_port_operations ali_c5_port_ops = { | |
420 | .port_disable = ata_port_disable, | |
421 | .set_piomode = ali_set_piomode, | |
422 | .set_dmamode = ali_set_dmamode, | |
423 | .mode_filter = ata_pci_default_filter, | |
424 | .tf_load = ata_tf_load, | |
425 | .tf_read = ata_tf_read, | |
426 | .check_status = ata_check_status, | |
427 | .exec_command = ata_exec_command, | |
428 | .dev_select = ata_std_dev_select, | |
429 | ||
430 | .freeze = ata_bmdma_freeze, | |
431 | .thaw = ata_bmdma_thaw, | |
b723d144 | 432 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 433 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 434 | .cable_detect = ali_c2_cable_detect, |
669a5db4 JG |
435 | |
436 | .bmdma_setup = ata_bmdma_setup, | |
437 | .bmdma_start = ata_bmdma_start, | |
438 | .bmdma_stop = ata_bmdma_stop, | |
439 | .bmdma_status = ata_bmdma_status, | |
440 | ||
441 | .qc_prep = ata_qc_prep, | |
442 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 443 | |
0d5ff566 | 444 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
445 | |
446 | .irq_handler = ata_interrupt, | |
447 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
448 | .irq_on = ata_irq_on, |
449 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
450 | |
451 | .port_start = ata_port_start, | |
669a5db4 JG |
452 | }; |
453 | ||
34d8dfb1 A |
454 | |
455 | /** | |
456 | * ali_init_chipset - chip setup function | |
457 | * @pdev: PCI device of ATA controller | |
458 | * | |
459 | * Perform the setup on the device that must be done both at boot | |
460 | * and at resume time. | |
461 | */ | |
f20b16ff | 462 | |
34d8dfb1 A |
463 | static void ali_init_chipset(struct pci_dev *pdev) |
464 | { | |
44c10138 | 465 | u8 tmp; |
34d8dfb1 A |
466 | struct pci_dev *north, *isa_bridge; |
467 | ||
34d8dfb1 A |
468 | /* |
469 | * The chipset revision selects the driver operations and | |
470 | * mode data. | |
471 | */ | |
472 | ||
44c10138 | 473 | if (pdev->revision >= 0x20 && pdev->revision < 0xC2) { |
34d8dfb1 A |
474 | /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ |
475 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
476 | /* Clear CD-ROM DMA write bit */ | |
477 | tmp &= 0x7F; | |
478 | pci_write_config_byte(pdev, 0x4B, tmp); | |
44c10138 | 479 | } else if (pdev->revision >= 0xC2) { |
34d8dfb1 A |
480 | /* Enable cable detection logic */ |
481 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
482 | pci_write_config_byte(pdev, 0x4B, tmp | 0x08); | |
483 | } | |
8e42a5a2 | 484 | north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); |
34d8dfb1 A |
485 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
486 | ||
487 | if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) { | |
488 | /* Configure the ALi bridge logic. For non ALi rely on BIOS. | |
489 | Set the south bridge enable bit */ | |
490 | pci_read_config_byte(isa_bridge, 0x79, &tmp); | |
44c10138 | 491 | if (pdev->revision == 0xC2) |
34d8dfb1 | 492 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); |
44c10138 | 493 | else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) |
34d8dfb1 A |
494 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); |
495 | } | |
44c10138 | 496 | if (pdev->revision >= 0x20) { |
34d8dfb1 A |
497 | /* |
498 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want | |
499 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control | |
500 | * via 0x54/55. | |
501 | */ | |
502 | pci_read_config_byte(pdev, 0x53, &tmp); | |
44c10138 | 503 | if (pdev->revision <= 0x20) |
34d8dfb1 | 504 | tmp &= ~0x02; |
44c10138 | 505 | if (pdev->revision >= 0xc7) |
34d8dfb1 A |
506 | tmp |= 0x03; |
507 | else | |
508 | tmp |= 0x01; /* CD_ROM enable for DMA */ | |
509 | pci_write_config_byte(pdev, 0x53, tmp); | |
510 | } | |
511 | pci_dev_put(isa_bridge); | |
512 | pci_dev_put(north); | |
513 | ata_pci_clear_simplex(pdev); | |
514 | } | |
669a5db4 JG |
515 | /** |
516 | * ali_init_one - discovery callback | |
517 | * @pdev: PCI device ID | |
518 | * @id: PCI table info | |
519 | * | |
520 | * An ALi IDE interface has been discovered. Figure out what revision | |
521 | * and perform configuration work before handing it to the ATA layer | |
522 | */ | |
523 | ||
524 | static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
525 | { | |
1626aeb8 | 526 | static const struct ata_port_info info_early = { |
669a5db4 | 527 | .sht = &ali_sht, |
1d2808fd | 528 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
529 | .pio_mask = 0x1f, |
530 | .port_ops = &ali_early_port_ops | |
531 | }; | |
532 | /* Revision 0x20 added DMA */ | |
1626aeb8 | 533 | static const struct ata_port_info info_20 = { |
669a5db4 | 534 | .sht = &ali_sht, |
1d2808fd | 535 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
536 | .pio_mask = 0x1f, |
537 | .mwdma_mask = 0x07, | |
538 | .port_ops = &ali_20_port_ops | |
539 | }; | |
540 | /* Revision 0x20 with support logic added UDMA */ | |
1626aeb8 | 541 | static const struct ata_port_info info_20_udma = { |
669a5db4 | 542 | .sht = &ali_sht, |
1d2808fd | 543 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 | 544 | .pio_mask = 0x1f, |
85cd7251 | 545 | .mwdma_mask = 0x07, |
669a5db4 JG |
546 | .udma_mask = 0x07, /* UDMA33 */ |
547 | .port_ops = &ali_20_port_ops | |
548 | }; | |
549 | /* Revision 0xC2 adds UDMA66 */ | |
1626aeb8 | 550 | static const struct ata_port_info info_c2 = { |
669a5db4 | 551 | .sht = &ali_sht, |
1d2808fd | 552 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
553 | .pio_mask = 0x1f, |
554 | .mwdma_mask = 0x07, | |
bf6263a8 | 555 | .udma_mask = ATA_UDMA4, |
669a5db4 JG |
556 | .port_ops = &ali_c2_port_ops |
557 | }; | |
ee581502 | 558 | /* Revision 0xC3 is UDMA66 for now */ |
1626aeb8 | 559 | static const struct ata_port_info info_c3 = { |
669a5db4 | 560 | .sht = &ali_sht, |
1d2808fd | 561 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
562 | .pio_mask = 0x1f, |
563 | .mwdma_mask = 0x07, | |
bf6263a8 | 564 | .udma_mask = ATA_UDMA4, |
669a5db4 JG |
565 | .port_ops = &ali_c2_port_ops |
566 | }; | |
ee581502 | 567 | /* Revision 0xC4 is UDMA100 */ |
1626aeb8 | 568 | static const struct ata_port_info info_c4 = { |
669a5db4 | 569 | .sht = &ali_sht, |
1d2808fd | 570 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
571 | .pio_mask = 0x1f, |
572 | .mwdma_mask = 0x07, | |
bf6263a8 | 573 | .udma_mask = ATA_UDMA5, |
669a5db4 JG |
574 | .port_ops = &ali_c2_port_ops |
575 | }; | |
576 | /* Revision 0xC5 is UDMA133 with LBA48 DMA */ | |
1626aeb8 | 577 | static const struct ata_port_info info_c5 = { |
669a5db4 | 578 | .sht = &ali_sht, |
1d2808fd | 579 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
580 | .pio_mask = 0x1f, |
581 | .mwdma_mask = 0x07, | |
bf6263a8 | 582 | .udma_mask = ATA_UDMA6, |
669a5db4 JG |
583 | .port_ops = &ali_c5_port_ops |
584 | }; | |
585 | ||
1626aeb8 | 586 | const struct ata_port_info *ppi[] = { NULL, NULL }; |
44c10138 | 587 | u8 tmp; |
34d8dfb1 | 588 | struct pci_dev *isa_bridge; |
669a5db4 | 589 | |
669a5db4 JG |
590 | /* |
591 | * The chipset revision selects the driver operations and | |
592 | * mode data. | |
593 | */ | |
594 | ||
44c10138 | 595 | if (pdev->revision < 0x20) { |
1626aeb8 | 596 | ppi[0] = &info_early; |
44c10138 | 597 | } else if (pdev->revision < 0xC2) { |
1626aeb8 | 598 | ppi[0] = &info_20; |
44c10138 | 599 | } else if (pdev->revision == 0xC2) { |
1626aeb8 | 600 | ppi[0] = &info_c2; |
44c10138 | 601 | } else if (pdev->revision == 0xC3) { |
1626aeb8 | 602 | ppi[0] = &info_c3; |
44c10138 | 603 | } else if (pdev->revision == 0xC4) { |
1626aeb8 | 604 | ppi[0] = &info_c4; |
669a5db4 | 605 | } else |
1626aeb8 | 606 | ppi[0] = &info_c5; |
669a5db4 | 607 | |
34d8dfb1 | 608 | ali_init_chipset(pdev); |
f20b16ff | 609 | |
669a5db4 | 610 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
44c10138 | 611 | if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { |
34d8dfb1 A |
612 | /* Are we paired with a UDMA capable chip */ |
613 | pci_read_config_byte(isa_bridge, 0x5E, &tmp); | |
614 | if ((tmp & 0x1E) == 0x12) | |
1626aeb8 | 615 | ppi[0] = &info_20_udma; |
34d8dfb1 | 616 | pci_dev_put(isa_bridge); |
669a5db4 | 617 | } |
1626aeb8 | 618 | return ata_pci_init_one(pdev, ppi); |
669a5db4 JG |
619 | } |
620 | ||
438ac6d5 | 621 | #ifdef CONFIG_PM |
34d8dfb1 A |
622 | static int ali_reinit_one(struct pci_dev *pdev) |
623 | { | |
624 | ali_init_chipset(pdev); | |
625 | return ata_pci_device_resume(pdev); | |
626 | } | |
438ac6d5 | 627 | #endif |
34d8dfb1 | 628 | |
2d2744fc JG |
629 | static const struct pci_device_id ali[] = { |
630 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, | |
631 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, | |
632 | ||
633 | { }, | |
669a5db4 JG |
634 | }; |
635 | ||
636 | static struct pci_driver ali_pci_driver = { | |
637 | .name = DRV_NAME, | |
638 | .id_table = ali, | |
639 | .probe = ali_init_one, | |
34d8dfb1 | 640 | .remove = ata_pci_remove_one, |
438ac6d5 | 641 | #ifdef CONFIG_PM |
34d8dfb1 A |
642 | .suspend = ata_pci_device_suspend, |
643 | .resume = ali_reinit_one, | |
438ac6d5 | 644 | #endif |
669a5db4 JG |
645 | }; |
646 | ||
647 | static int __init ali_init(void) | |
648 | { | |
649 | return pci_register_driver(&ali_pci_driver); | |
650 | } | |
651 | ||
652 | ||
653 | static void __exit ali_exit(void) | |
654 | { | |
655 | pci_unregister_driver(&ali_pci_driver); | |
656 | } | |
657 | ||
658 | ||
659 | MODULE_AUTHOR("Alan Cox"); | |
660 | MODULE_DESCRIPTION("low-level driver for ALi PATA"); | |
661 | MODULE_LICENSE("GPL"); | |
662 | MODULE_DEVICE_TABLE(pci, ali); | |
663 | MODULE_VERSION(DRV_VERSION); | |
664 | ||
665 | module_init(ali_init); | |
666 | module_exit(ali_exit); |