[deliverable/linux.git] / drivers / ata / pata_cmd640.c

/*
 * pata_cmd640.c 	- CMD640 PCI PATA for new ATA layer
 *			  (C) 2007 Red Hat Inc
 *
 * Based upon
 *  linux/drivers/ide/pci/cmd640.c		Version 1.02  Sep 01, 1996
 *
 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see driver)
 *
 *	This drives only the PCI version of the controller. If you have a
 *	VLB one then we have enough docs to support it but you can write
 *	your own code.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/gfp.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME "pata_cmd640"
#define DRV_VERSION "0.0.5"

struct cmd640_reg {
	int last;
	u8 reg58[ATA_MAX_DEVICES];
};

enum {
	CFR = 0x50,
	CNTRL = 0x51,
	CMDTIM = 0x52,
	ARTIM0 = 0x53,
	DRWTIM0 = 0x54,
	ARTIM23 = 0x57,
	DRWTIM23 = 0x58,
	BRST = 0x59
};

/**
 *	cmd640_set_piomode	-	set initial PIO mode data
 *	@ap: ATA port
 *	@adev: ATA device
 *
 *	Called to do the PIO mode setup.
 */

static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct cmd640_reg *timing = ap->private_data;
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct ata_timing t;
	const unsigned long T = 1000000 / 33;
	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
	u8 reg;
	int arttim = ARTIM0 + 2 * adev->devno;
	struct ata_device *pair = ata_dev_pair(adev);

	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
		printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
		return;
	}

	/* The second channel has shared timings and the setup timing is
	   messy to switch to merge it for worst case */
	if (ap->port_no && pair) {
		struct ata_timing p;
		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
	}

	/* Make the timings fit */
	if (t.recover > 16) {
		t.active += t.recover - 16;
		t.recover = 16;
	}
	if (t.active > 16)
		t.active = 16;

	/* Now convert the clocks into values we can actually stuff into
	   the chip */

	if (t.recover > 1)
		t.recover--;	/* 640B only */
	else
		t.recover = 15;

	if (t.setup > 4)
		t.setup = 0xC0;
	else
		t.setup = setup_data[t.setup];

	if (ap->port_no == 0) {
		t.active &= 0x0F;	/* 0 = 16 */

		/* Load setup timing */
		pci_read_config_byte(pdev, arttim, &reg);
		reg &= 0x3F;
		reg |= t.setup;
		pci_write_config_byte(pdev, arttim, reg);

		/* Load active/recovery */
		pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
	} else {
		/* Save the shared timings for channel, they will be loaded
		   by qc_issue. Reloading the setup time is expensive so we
		   keep a merged one loaded */
		pci_read_config_byte(pdev, ARTIM23, &reg);
		reg &= 0x3F;
		reg |= t.setup;
		pci_write_config_byte(pdev, ARTIM23, reg);
		timing->reg58[adev->devno] = (t.active << 4) | t.recover;
	}
}


/**
 *	cmd640_qc_issue	-	command preparation hook
 *	@qc: Command to be issued
 *
 *	Channel 1 has shared timings. We must reprogram the
 *	clock each drive 2/3 switch we do.
 */

static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct cmd640_reg *timing = ap->private_data;

	if (ap->port_no != 0 && adev->devno != timing->last) {
		pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
		timing->last = adev->devno;
	}
	return ata_sff_qc_issue(qc);
}

/**
 *	cmd640_port_start	-	port setup
 *	@ap: ATA port being set up
 *
 *	The CMD640 needs to maintain private data structures so we
 *	allocate space here.
 */

static int cmd640_port_start(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct cmd640_reg *timing;

	timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
	if (timing == NULL)
		return -ENOMEM;
	timing->last = -1;	/* Force a load */
	ap->private_data = timing;
	return 0;
}

static bool cmd640_sff_irq_check(struct ata_port *ap)
{
	struct pci_dev *pdev	= to_pci_dev(ap->host->dev);
	int irq_reg		= ap->port_no ? ARTIM23 : CFR;
	u8  irq_stat, irq_mask	= ap->port_no ? 0x10 : 0x04;

	pci_read_config_byte(pdev, irq_reg, &irq_stat);

	return irq_stat & irq_mask;
}

static struct scsi_host_template cmd640_sht = {
	ATA_PIO_SHT(DRV_NAME),
};

static struct ata_port_operations cmd640_port_ops = {
	.inherits	= &ata_sff_port_ops,
	/* In theory xfer_noirq is not needed once we kill the prefetcher */
	.sff_data_xfer	= ata_sff_data_xfer_noirq,
	.sff_irq_check	= cmd640_sff_irq_check,
	.qc_issue	= cmd640_qc_issue,
	.cable_detect	= ata_cable_40wire,
	.set_piomode	= cmd640_set_piomode,
	.port_start	= cmd640_port_start,
};

static void cmd640_hardware_init(struct pci_dev *pdev)
{
	u8 ctrl;

	/* CMD640 detected, commiserations */
	pci_write_config_byte(pdev, 0x5B, 0x00);
	/* PIO0 command cycles */
	pci_write_config_byte(pdev, CMDTIM, 0);
	/* 512 byte bursts (sector) */
	pci_write_config_byte(pdev, BRST, 0x40);
	/*
	 * A reporter a long time ago
	 * Had problems with the data fifo
	 * So don't run the risk
	 * Of putting crap on the disk
	 * For its better just to go slow
	 */
	/* Do channel 0 */
	pci_read_config_byte(pdev, CNTRL, &ctrl);
	pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
	/* Ditto for channel 1 */
	pci_read_config_byte(pdev, ARTIM23, &ctrl);
	ctrl |= 0x0C;
	pci_write_config_byte(pdev, ARTIM23, ctrl);
}

static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
	static const struct ata_port_info info = {
		.flags = ATA_FLAG_SLAVE_POSS,
		.pio_mask = ATA_PIO4,
		.port_ops = &cmd640_port_ops
	};
	const struct ata_port_info *ppi[] = { &info, NULL };
	int rc;

	rc = pcim_enable_device(pdev);
	if (rc)
		return rc;

	cmd640_hardware_init(pdev);

	return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
}

#ifdef CONFIG_PM_SLEEP
static int cmd640_reinit_one(struct pci_dev *pdev)
{
	struct ata_host *host = pci_get_drvdata(pdev);
	int rc;

	rc = ata_pci_device_do_resume(pdev);
	if (rc)
		return rc;
	cmd640_hardware_init(pdev);
	ata_host_resume(host);
	return 0;
}
#endif

static const struct pci_device_id cmd640[] = {
	{ PCI_VDEVICE(CMD, 0x640), 0 },
	{ },
};

static struct pci_driver cmd640_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= cmd640,
	.probe 		= cmd640_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM_SLEEP
	.suspend	= ata_pci_device_suspend,
	.resume		= cmd640_reinit_one,
#endif
};

module_pci_driver(cmd640_pci_driver);

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, cmd640);
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
b2248dac AC	1	/*
	2	* pata_cmd640.c - CMD640 PCI PATA for new ATA layer
	3	* (C) 2007 Red Hat Inc
b2248dac AC	4	*
	5	* Based upon
	6	* linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996
	7	*
	8	* Copyright (C) 1995-1996 Linus Torvalds & authors (see driver)
	9	*
	10	* This drives only the PCI version of the controller. If you have a
	11	* VLB one then we have enough docs to support it but you can write
	12	* your own code.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/pci.h>
b2248dac AC	18	#include <linux/blkdev.h>
b2248dac AC	19	#include <linux/delay.h>
5a0e3ad6	20	#include <linux/gfp.h>
b2248dac AC	21	#include <scsi/scsi_host.h>
	22	#include <linux/libata.h>
	23
	24	#define DRV_NAME "pata_cmd640"
7938a72d	25	#define DRV_VERSION "0.0.5"
b2248dac AC	26
	27	struct cmd640_reg {
	28	int last;
	29	u8 reg58[ATA_MAX_DEVICES];
	30	};
	31
	32	enum {
	33	CFR = 0x50,
	34	CNTRL = 0x51,
	35	CMDTIM = 0x52,
	36	ARTIM0 = 0x53,
	37	DRWTIM0 = 0x54,
	38	ARTIM23 = 0x57,
	39	DRWTIM23 = 0x58,
	40	BRST = 0x59
	41	};
	42
	43	/**
	44	* cmd640_set_piomode - set initial PIO mode data
7938a72d	45	* @ap: ATA port
b2248dac AC	46	* @adev: ATA device
	47	*
	48	* Called to do the PIO mode setup.
	49	*/
	50
	51	static void cmd640_set_piomode(struct ata_port ap, struct ata_device adev)
	52	{
	53	struct cmd640_reg *timing = ap->private_data;
	54	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	55	struct ata_timing t;
	56	const unsigned long T = 1000000 / 33;
	57	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
	58	u8 reg;
	59	int arttim = ARTIM0 + 2 * adev->devno;
	60	struct ata_device *pair = ata_dev_pair(adev);
	61
	62	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
	63	printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
	64	return;
	65	}
	66
	67	/* The second channel has shared timings and the setup timing is
	68	messy to switch to merge it for worst case */
	69	if (ap->port_no && pair) {
	70	struct ata_timing p;
	71	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
	72	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
	73	}
	74
	75	/* Make the timings fit */
	76	if (t.recover > 16) {
	77	t.active += t.recover - 16;
	78	t.recover = 16;
	79	}
	80	if (t.active > 16)
	81	t.active = 16;
	82
	83	/* Now convert the clocks into values we can actually stuff into
	84	the chip */
	85
	86	if (t.recover > 1)
	87	t.recover--; /* 640B only */
	88	else
	89	t.recover = 15;
	90
	91	if (t.setup > 4)
	92	t.setup = 0xC0;
	93	else
	94	t.setup = setup_data[t.setup];
	95
	96	if (ap->port_no == 0) {
	97	t.active &= 0x0F; /* 0 = 16 */
	98
	99	/* Load setup timing */
	100	pci_read_config_byte(pdev, arttim, &reg);
	101	reg &= 0x3F;
	102	reg \|= t.setup;
	103	pci_write_config_byte(pdev, arttim, reg);
	104
	105	/* Load active/recovery */
	106	pci_write_config_byte(pdev, arttim + 1, (t.active << 4) \| t.recover);
	107	} else {
	108	/* Save the shared timings for channel, they will be loaded
9363c382 TH	109	by qc_issue. Reloading the setup time is expensive so we
9363c382 TH	110	keep a merged one loaded */
b2248dac AC	111	pci_read_config_byte(pdev, ARTIM23, &reg);
	112	reg &= 0x3F;
	113	reg \|= t.setup;
	114	pci_write_config_byte(pdev, ARTIM23, reg);
	115	timing->reg58[adev->devno] = (t.active << 4) \| t.recover;
	116	}
	117	}
	118
	119
	120	/**
9363c382	121	* cmd640_qc_issue - command preparation hook
b2248dac AC	122	* @qc: Command to be issued
	123	*
	124	* Channel 1 has shared timings. We must reprogram the
	125	* clock each drive 2/3 switch we do.
	126	*/
	127
9363c382	128	static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
b2248dac AC	129	{
	130	struct ata_port *ap = qc->ap;
	131	struct ata_device *adev = qc->dev;
	132	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	133	struct cmd640_reg *timing = ap->private_data;
	134
	135	if (ap->port_no != 0 && adev->devno != timing->last) {
	136	pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
	137	timing->last = adev->devno;
	138	}
9363c382	139	return ata_sff_qc_issue(qc);
b2248dac AC	140	}
	141
	142	/**
	143	* cmd640_port_start - port setup
	144	* @ap: ATA port being set up
	145	*
	146	* The CMD640 needs to maintain private data structures so we
	147	* allocate space here.
	148	*/
	149
	150	static int cmd640_port_start(struct ata_port *ap)
	151	{
	152	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	153	struct cmd640_reg *timing;
	154
b2248dac AC	155	timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
	156	if (timing == NULL)
	157	return -ENOMEM;
	158	timing->last = -1; /* Force a load */
	159	ap->private_data = timing;
c7087652	160	return 0;
b2248dac AC	161	}
b2248dac AC	162
c1ce90f2 SS	163	static bool cmd640_sff_irq_check(struct ata_port *ap)
	164	{
	165	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	166	int irq_reg = ap->port_no ? ARTIM23 : CFR;
	167	u8 irq_stat, irq_mask = ap->port_no ? 0x10 : 0x04;
	168
	169	pci_read_config_byte(pdev, irq_reg, &irq_stat);
	170
	171	return irq_stat & irq_mask;
	172	}
	173
b2248dac	174	static struct scsi_host_template cmd640_sht = {
8930ff25	175	ATA_PIO_SHT(DRV_NAME),
b2248dac AC	176	};
	177
	178	static struct ata_port_operations cmd640_port_ops = {
8930ff25	179	.inherits = &ata_sff_port_ops,
029cfd6b	180	/* In theory xfer_noirq is not needed once we kill the prefetcher */
5682ed33	181	.sff_data_xfer = ata_sff_data_xfer_noirq,
c1ce90f2	182	.sff_irq_check = cmd640_sff_irq_check,
9363c382	183	.qc_issue = cmd640_qc_issue,
029cfd6b TH	184	.cable_detect = ata_cable_40wire,
029cfd6b TH	185	.set_piomode = cmd640_set_piomode,
b2248dac AC	186	.port_start = cmd640_port_start,
	187	};
	188
7938a72d	189	static void cmd640_hardware_init(struct pci_dev *pdev)
b2248dac	190	{
b2248dac AC	191	u8 ctrl;
b2248dac AC	192
b2248dac	193	/* CMD640 detected, commiserations */
7938a72d	194	pci_write_config_byte(pdev, 0x5B, 0x00);
b2248dac AC	195	/* PIO0 command cycles */
	196	pci_write_config_byte(pdev, CMDTIM, 0);
	197	/* 512 byte bursts (sector) */
	198	pci_write_config_byte(pdev, BRST, 0x40);
a617c09f	199	/*
b2248dac AC	200	* A reporter a long time ago
	201	* Had problems with the data fifo
	202	* So don't run the risk
	203	* Of putting crap on the disk
	204	* For its better just to go slow
	205	*/
	206	/* Do channel 0 */
	207	pci_read_config_byte(pdev, CNTRL, &ctrl);
	208	pci_write_config_byte(pdev, CNTRL, ctrl \| 0xC0);
	209	/* Ditto for channel 1 */
	210	pci_read_config_byte(pdev, ARTIM23, &ctrl);
	211	ctrl \|= 0x0C;
	212	pci_write_config_byte(pdev, ARTIM23, ctrl);
7938a72d AC	213	}
	214
	215	static int cmd640_init_one(struct pci_dev pdev, const struct pci_device_id id)
	216	{
1626aeb8	217	static const struct ata_port_info info = {
1d2808fd	218	.flags = ATA_FLAG_SLAVE_POSS,
14bdef98	219	.pio_mask = ATA_PIO4,
7938a72d AC	220	.port_ops = &cmd640_port_ops
7938a72d AC	221	};
1626aeb8	222	const struct ata_port_info *ppi[] = { &info, NULL };
f08048e9 TH	223	int rc;
	224
	225	rc = pcim_enable_device(pdev);
	226	if (rc)
	227	return rc;
b2248dac	228
7938a72d	229	cmd640_hardware_init(pdev);
f08048e9	230
16ea0fc9	231	return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
b2248dac AC	232	}
b2248dac AC	233
58eb8cd5	234	#ifdef CONFIG_PM_SLEEP
b2248dac AC	235	static int cmd640_reinit_one(struct pci_dev *pdev)
b2248dac AC	236	{
0a86e1c8	237	struct ata_host *host = pci_get_drvdata(pdev);
f08048e9 TH	238	int rc;
	239
	240	rc = ata_pci_device_do_resume(pdev);
	241	if (rc)
	242	return rc;
7938a72d	243	cmd640_hardware_init(pdev);
f08048e9	244	ata_host_resume(host);
4b22afd7	245	return 0;
b2248dac	246	}
f08048e9	247	#endif
b2248dac AC	248
	249	static const struct pci_device_id cmd640[] = {
	250	{ PCI_VDEVICE(CMD, 0x640), 0 },
	251	{ },
	252	};
	253
	254	static struct pci_driver cmd640_pci_driver = {
	255	.name = DRV_NAME,
	256	.id_table = cmd640,
	257	.probe = cmd640_init_one,
	258	.remove = ata_pci_remove_one,
58eb8cd5	259	#ifdef CONFIG_PM_SLEEP
b2248dac AC	260	.suspend = ata_pci_device_suspend,
b2248dac AC	261	.resume = cmd640_reinit_one,
f08048e9	262	#endif
b2248dac AC	263	};
b2248dac AC	264
2fc75da0	265	module_pci_driver(cmd640_pci_driver);
b2248dac AC	266
	267	MODULE_AUTHOR("Alan Cox");
	268	MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
	269	MODULE_LICENSE("GPL");
	270	MODULE_DEVICE_TABLE(pci, cmd640);
	271	MODULE_VERSION(DRV_VERSION);