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e39c75cf APR |
1 | /* |
2 | * Freescale iMX PATA driver | |
3 | * | |
4 | * Copyright (C) 2011 Arnaud Patard <arnaud.patard@rtp-net.org> | |
5 | * | |
6 | * Based on pata_platform - Copyright (C) 2006 - 2007 Paul Mundt | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License. See the file "COPYING" in the main directory of this archive | |
10 | * for more details. | |
11 | * | |
12 | * TODO: | |
13 | * - dmaengine support | |
14 | * - check if timing stuff needed | |
15 | */ | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
e39c75cf APR |
18 | #include <linux/blkdev.h> |
19 | #include <scsi/scsi_host.h> | |
20 | #include <linux/ata.h> | |
21 | #include <linux/libata.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/clk.h> | |
24 | ||
25 | #define DRV_NAME "pata_imx" | |
26 | ||
27 | #define PATA_IMX_ATA_CONTROL 0x24 | |
28 | #define PATA_IMX_ATA_CTRL_FIFO_RST_B (1<<7) | |
29 | #define PATA_IMX_ATA_CTRL_ATA_RST_B (1<<6) | |
30 | #define PATA_IMX_ATA_CTRL_IORDY_EN (1<<0) | |
31 | #define PATA_IMX_ATA_INT_EN 0x2C | |
32 | #define PATA_IMX_ATA_INTR_ATA_INTRQ2 (1<<3) | |
33 | #define PATA_IMX_DRIVE_DATA 0xA0 | |
34 | #define PATA_IMX_DRIVE_CONTROL 0xD8 | |
35 | ||
36 | struct pata_imx_priv { | |
37 | struct clk *clk; | |
38 | /* timings/interrupt/control regs */ | |
51b5539c | 39 | void __iomem *host_regs; |
e39c75cf APR |
40 | u32 ata_ctl; |
41 | }; | |
42 | ||
43 | static int pata_imx_set_mode(struct ata_link *link, struct ata_device **unused) | |
44 | { | |
45 | struct ata_device *dev; | |
46 | struct ata_port *ap = link->ap; | |
47 | struct pata_imx_priv *priv = ap->host->private_data; | |
48 | u32 val; | |
49 | ||
50 | ata_for_each_dev(dev, link, ENABLED) { | |
51 | dev->pio_mode = dev->xfer_mode = XFER_PIO_0; | |
52 | dev->xfer_shift = ATA_SHIFT_PIO; | |
53 | dev->flags |= ATA_DFLAG_PIO; | |
54 | ||
55 | val = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL); | |
56 | if (ata_pio_need_iordy(dev)) | |
57 | val |= PATA_IMX_ATA_CTRL_IORDY_EN; | |
58 | else | |
59 | val &= ~PATA_IMX_ATA_CTRL_IORDY_EN; | |
60 | __raw_writel(val, priv->host_regs + PATA_IMX_ATA_CONTROL); | |
61 | ||
22c8be31 | 62 | ata_dev_info(dev, "configured for PIO\n"); |
e39c75cf APR |
63 | } |
64 | return 0; | |
65 | } | |
66 | ||
67 | static struct scsi_host_template pata_imx_sht = { | |
68 | ATA_PIO_SHT(DRV_NAME), | |
69 | }; | |
70 | ||
71 | static struct ata_port_operations pata_imx_port_ops = { | |
72 | .inherits = &ata_sff_port_ops, | |
73 | .sff_data_xfer = ata_sff_data_xfer_noirq, | |
74 | .cable_detect = ata_cable_unknown, | |
75 | .set_mode = pata_imx_set_mode, | |
76 | }; | |
77 | ||
78 | static void pata_imx_setup_port(struct ata_ioports *ioaddr) | |
79 | { | |
80 | /* Fixup the port shift for platforms that need it */ | |
81 | ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << 2); | |
82 | ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << 2); | |
83 | ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << 2); | |
84 | ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << 2); | |
85 | ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << 2); | |
86 | ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << 2); | |
87 | ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << 2); | |
88 | ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << 2); | |
89 | ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << 2); | |
90 | ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2); | |
91 | } | |
92 | ||
0ec24914 | 93 | static int pata_imx_probe(struct platform_device *pdev) |
e39c75cf APR |
94 | { |
95 | struct ata_host *host; | |
96 | struct ata_port *ap; | |
97 | struct pata_imx_priv *priv; | |
98 | int irq = 0; | |
99 | struct resource *io_res; | |
ff540d02 | 100 | int ret; |
e39c75cf | 101 | |
e39c75cf | 102 | irq = platform_get_irq(pdev, 0); |
3ef9cc31 FE |
103 | if (irq < 0) |
104 | return irq; | |
e39c75cf APR |
105 | |
106 | priv = devm_kzalloc(&pdev->dev, | |
107 | sizeof(struct pata_imx_priv), GFP_KERNEL); | |
108 | if (!priv) | |
109 | return -ENOMEM; | |
110 | ||
50f5a341 | 111 | priv->clk = devm_clk_get(&pdev->dev, NULL); |
e39c75cf APR |
112 | if (IS_ERR(priv->clk)) { |
113 | dev_err(&pdev->dev, "Failed to get clock\n"); | |
114 | return PTR_ERR(priv->clk); | |
115 | } | |
116 | ||
0475c947 FE |
117 | ret = clk_prepare_enable(priv->clk); |
118 | if (ret) | |
119 | return ret; | |
e39c75cf APR |
120 | |
121 | host = ata_host_alloc(&pdev->dev, 1); | |
ff540d02 SH |
122 | if (!host) { |
123 | ret = -ENOMEM; | |
124 | goto err; | |
125 | } | |
e39c75cf APR |
126 | |
127 | host->private_data = priv; | |
128 | ap = host->ports[0]; | |
129 | ||
130 | ap->ops = &pata_imx_port_ops; | |
131 | ap->pio_mask = ATA_PIO0; | |
132 | ap->flags |= ATA_FLAG_SLAVE_POSS; | |
133 | ||
b314fc77 FE |
134 | io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
135 | priv->host_regs = devm_ioremap_resource(&pdev->dev, io_res); | |
13e8e78b BZ |
136 | if (IS_ERR(priv->host_regs)) { |
137 | ret = PTR_ERR(priv->host_regs); | |
ff540d02 | 138 | goto err; |
e39c75cf APR |
139 | } |
140 | ||
141 | ap->ioaddr.cmd_addr = priv->host_regs + PATA_IMX_DRIVE_DATA; | |
142 | ap->ioaddr.ctl_addr = priv->host_regs + PATA_IMX_DRIVE_CONTROL; | |
143 | ||
144 | ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr; | |
145 | ||
146 | pata_imx_setup_port(&ap->ioaddr); | |
147 | ||
148 | ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", | |
149 | (unsigned long long)io_res->start + PATA_IMX_DRIVE_DATA, | |
150 | (unsigned long long)io_res->start + PATA_IMX_DRIVE_CONTROL); | |
151 | ||
152 | /* deassert resets */ | |
153 | __raw_writel(PATA_IMX_ATA_CTRL_FIFO_RST_B | | |
154 | PATA_IMX_ATA_CTRL_ATA_RST_B, | |
155 | priv->host_regs + PATA_IMX_ATA_CONTROL); | |
156 | /* enable interrupts */ | |
157 | __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2, | |
158 | priv->host_regs + PATA_IMX_ATA_INT_EN); | |
159 | ||
160 | /* activate */ | |
ff540d02 | 161 | ret = ata_host_activate(host, irq, ata_sff_interrupt, 0, |
e39c75cf APR |
162 | &pata_imx_sht); |
163 | ||
ff540d02 SH |
164 | if (ret) |
165 | goto err; | |
166 | ||
167 | return 0; | |
168 | err: | |
a18dada0 | 169 | clk_disable_unprepare(priv->clk); |
50f5a341 | 170 | |
ff540d02 | 171 | return ret; |
e39c75cf APR |
172 | } |
173 | ||
0ec24914 | 174 | static int pata_imx_remove(struct platform_device *pdev) |
e39c75cf | 175 | { |
d89995db | 176 | struct ata_host *host = platform_get_drvdata(pdev); |
e39c75cf APR |
177 | struct pata_imx_priv *priv = host->private_data; |
178 | ||
179 | ata_host_detach(host); | |
180 | ||
181 | __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); | |
182 | ||
a18dada0 | 183 | clk_disable_unprepare(priv->clk); |
e39c75cf APR |
184 | |
185 | return 0; | |
186 | } | |
187 | ||
58eb8cd5 | 188 | #ifdef CONFIG_PM_SLEEP |
e39c75cf APR |
189 | static int pata_imx_suspend(struct device *dev) |
190 | { | |
191 | struct ata_host *host = dev_get_drvdata(dev); | |
192 | struct pata_imx_priv *priv = host->private_data; | |
193 | int ret; | |
194 | ||
195 | ret = ata_host_suspend(host, PMSG_SUSPEND); | |
196 | if (!ret) { | |
197 | __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); | |
198 | priv->ata_ctl = | |
199 | __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL); | |
a18dada0 | 200 | clk_disable_unprepare(priv->clk); |
e39c75cf APR |
201 | } |
202 | ||
203 | return ret; | |
204 | } | |
205 | ||
206 | static int pata_imx_resume(struct device *dev) | |
207 | { | |
208 | struct ata_host *host = dev_get_drvdata(dev); | |
209 | struct pata_imx_priv *priv = host->private_data; | |
210 | ||
0475c947 FE |
211 | int ret = clk_prepare_enable(priv->clk); |
212 | if (ret) | |
213 | return ret; | |
e39c75cf APR |
214 | |
215 | __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL); | |
216 | ||
217 | __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2, | |
218 | priv->host_regs + PATA_IMX_ATA_INT_EN); | |
219 | ||
220 | ata_host_resume(host); | |
221 | ||
222 | return 0; | |
223 | } | |
e39c75cf APR |
224 | #endif |
225 | ||
36888e95 FE |
226 | static SIMPLE_DEV_PM_OPS(pata_imx_pm_ops, pata_imx_suspend, pata_imx_resume); |
227 | ||
b9d15db2 SH |
228 | static const struct of_device_id imx_pata_dt_ids[] = { |
229 | { | |
230 | .compatible = "fsl,imx27-pata", | |
231 | }, { | |
232 | /* sentinel */ | |
233 | } | |
234 | }; | |
71ab1d58 | 235 | MODULE_DEVICE_TABLE(of, imx_pata_dt_ids); |
b9d15db2 | 236 | |
e39c75cf APR |
237 | static struct platform_driver pata_imx_driver = { |
238 | .probe = pata_imx_probe, | |
0ec24914 | 239 | .remove = pata_imx_remove, |
e39c75cf APR |
240 | .driver = { |
241 | .name = DRV_NAME, | |
b9d15db2 | 242 | .of_match_table = imx_pata_dt_ids, |
e39c75cf | 243 | .pm = &pata_imx_pm_ops, |
e39c75cf APR |
244 | }, |
245 | }; | |
246 | ||
99c8ea3e | 247 | module_platform_driver(pata_imx_driver); |
e39c75cf APR |
248 | |
249 | MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); | |
250 | MODULE_DESCRIPTION("low-level driver for iMX PATA"); | |
251 | MODULE_LICENSE("GPL"); | |
252 | MODULE_ALIAS("platform:" DRV_NAME); |