Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / drivers / ata / pata_qdi.c
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1/*
2 * pata_qdi.c - QDI VLB ATA controllers
3 * (C) 2006 Red Hat <alan@redhat.com>
4 *
5 * This driver mostly exists as a proof of concept for non PCI devices under
6 * libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly
7 * useful.
8 *
9 * Tuning code written from the documentation at
10 * http://www.ryston.cz/petr/vlb/qd6500.html
11 * http://www.ryston.cz/petr/vlb/qd6580.html
12 *
13 * Probe code based on drivers/ide/legacy/qd65xx.c
14 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
15 * Samuel Thibault <samuel.thibault@fnac.net>
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/pci.h>
21#include <linux/init.h>
22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <scsi/scsi_host.h>
25#include <linux/libata.h>
26#include <linux/platform_device.h>
27
28#define DRV_NAME "pata_qdi"
8bc3fc47 29#define DRV_VERSION "0.3.1"
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30
31#define NR_HOST 4 /* Two 6580s */
32
33struct qdi_data {
34 unsigned long timing;
35 u8 clock[2];
36 u8 last;
37 int fast;
38 struct platform_device *platform_dev;
85cd7251 39
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40};
41
42static struct ata_host *qdi_host[NR_HOST];
43static struct qdi_data qdi_data[NR_HOST];
44static int nr_qdi_host;
45
46#ifdef MODULE
47static int probe_qdi = 1;
48#else
49static int probe_qdi;
50#endif
51
52static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
53{
54 struct ata_timing t;
55 struct qdi_data *qdi = ap->host->private_data;
56 int active, recovery;
57 u8 timing;
58
59 /* Get the timing data in cycles */
60 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251 61
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62 if (qdi->fast) {
63 active = 8 - FIT(t.active, 1, 8);
64 recovery = 18 - FIT(t.recover, 3, 18);
65 } else {
66 active = 9 - FIT(t.active, 2, 9);
67 recovery = 15 - FIT(t.recover, 0, 15);
68 }
69 timing = (recovery << 4) | active | 0x08;
85cd7251 70
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71 qdi->clock[adev->devno] = timing;
72
85cd7251 73 outb(timing, qdi->timing);
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74}
75
76static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
77{
78 struct ata_timing t;
79 struct qdi_data *qdi = ap->host->private_data;
80 int active, recovery;
81 u8 timing;
82
83 /* Get the timing data in cycles */
84 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251 85
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86 if (qdi->fast) {
87 active = 8 - FIT(t.active, 1, 8);
88 recovery = 18 - FIT(t.recover, 3, 18);
89 } else {
90 active = 9 - FIT(t.active, 2, 9);
91 recovery = 15 - FIT(t.recover, 0, 15);
92 }
93 timing = (recovery << 4) | active | 0x08;
85cd7251 94
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95 qdi->clock[adev->devno] = timing;
96
97 outb(timing, qdi->timing);
85cd7251 98
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99 /* Clear the FIFO */
100 if (adev->class != ATA_DEV_ATA)
101 outb(0x5F, (qdi->timing & 0xFFF0) + 3);
102}
103
104/**
105 * qdi_qc_issue_prot - command issue
106 * @qc: command pending
107 *
108 * Called when the libata layer is about to issue a command. We wrap
109 * this interface so that we can load the correct ATA timings.
110 */
111
112static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc)
113{
114 struct ata_port *ap = qc->ap;
115 struct ata_device *adev = qc->dev;
116 struct qdi_data *qdi = ap->host->private_data;
117
118 if (qdi->clock[adev->devno] != qdi->last) {
119 if (adev->pio_mode) {
120 qdi->last = qdi->clock[adev->devno];
121 outb(qdi->clock[adev->devno], qdi->timing);
122 }
123 }
124 return ata_qc_issue_prot(qc);
125}
126
127static void qdi_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data)
128{
9af5c9c9 129 struct ata_port *ap = adev->link->ap;
669a5db4 130 int slop = buflen & 3;
85cd7251 131
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132 if (ata_id_has_dword_io(adev->id)) {
133 if (write_data)
0d5ff566 134 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
669a5db4 135 else
0d5ff566 136 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
85cd7251 137
669a5db4 138 if (unlikely(slop)) {
b50e56d8 139 __le32 pad = 0;
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140 if (write_data) {
141 memcpy(&pad, buf + buflen - slop, slop);
b50e56d8 142 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
669a5db4 143 } else {
b50e56d8 144 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
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145 memcpy(buf + buflen - slop, &pad, slop);
146 }
147 }
148 } else
0d5ff566 149 ata_data_xfer(adev, buf, buflen, write_data);
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150}
151
152static struct scsi_host_template qdi_sht = {
153 .module = THIS_MODULE,
154 .name = DRV_NAME,
155 .ioctl = ata_scsi_ioctl,
156 .queuecommand = ata_scsi_queuecmd,
157 .can_queue = ATA_DEF_QUEUE,
158 .this_id = ATA_SHT_THIS_ID,
159 .sg_tablesize = LIBATA_MAX_PRD,
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160 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
161 .emulated = ATA_SHT_EMULATED,
162 .use_clustering = ATA_SHT_USE_CLUSTERING,
163 .proc_name = DRV_NAME,
164 .dma_boundary = ATA_DMA_BOUNDARY,
165 .slave_configure = ata_scsi_slave_config,
afdfe899 166 .slave_destroy = ata_scsi_slave_destroy,
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167 .bios_param = ata_std_bios_param,
168};
169
170static struct ata_port_operations qdi6500_port_ops = {
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171 .set_piomode = qdi6500_set_piomode,
172
173 .tf_load = ata_tf_load,
174 .tf_read = ata_tf_read,
175 .check_status = ata_check_status,
176 .exec_command = ata_exec_command,
177 .dev_select = ata_std_dev_select,
178
179 .freeze = ata_bmdma_freeze,
180 .thaw = ata_bmdma_thaw,
181 .error_handler = ata_bmdma_error_handler,
182 .post_internal_cmd = ata_bmdma_post_internal_cmd,
3be40d76 183 .cable_detect = ata_cable_40wire,
85cd7251 184
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185 .qc_prep = ata_qc_prep,
186 .qc_issue = qdi_qc_issue_prot,
bda30288 187
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188 .data_xfer = qdi_data_xfer,
189
669a5db4 190 .irq_clear = ata_bmdma_irq_clear,
246ce3b6 191 .irq_on = ata_irq_on,
85cd7251 192
81ad1837 193 .port_start = ata_sff_port_start,
85cd7251 194};
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195
196static struct ata_port_operations qdi6580_port_ops = {
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197 .set_piomode = qdi6580_set_piomode,
198
199 .tf_load = ata_tf_load,
200 .tf_read = ata_tf_read,
201 .check_status = ata_check_status,
202 .exec_command = ata_exec_command,
203 .dev_select = ata_std_dev_select,
204
205 .freeze = ata_bmdma_freeze,
206 .thaw = ata_bmdma_thaw,
207 .error_handler = ata_bmdma_error_handler,
208 .post_internal_cmd = ata_bmdma_post_internal_cmd,
3be40d76 209 .cable_detect = ata_cable_40wire,
85cd7251 210
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211 .qc_prep = ata_qc_prep,
212 .qc_issue = qdi_qc_issue_prot,
bda30288 213
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214 .data_xfer = qdi_data_xfer,
215
669a5db4 216 .irq_clear = ata_bmdma_irq_clear,
246ce3b6 217 .irq_on = ata_irq_on,
85cd7251 218
81ad1837 219 .port_start = ata_sff_port_start,
85cd7251 220};
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221
222/**
223 * qdi_init_one - attach a qdi interface
224 * @type: Type to display
225 * @io: I/O port start
226 * @irq: interrupt line
227 * @fast: True if on a > 33Mhz VLB
228 *
229 * Register an ISA bus IDE interface. Such interfaces are PIO and we
230 * assume do not support IRQ sharing.
231 */
85cd7251 232
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233static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast)
234{
cbcdd875 235 unsigned long ctl = io + 0x206;
669a5db4 236 struct platform_device *pdev;
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237 struct ata_host *host;
238 struct ata_port *ap;
0d5ff566 239 void __iomem *io_addr, *ctl_addr;
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240 int ret;
241
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242 /*
243 * Fill in a probe structure first of all
244 */
245
246 pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0);
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247 if (IS_ERR(pdev))
248 return PTR_ERR(pdev);
85cd7251 249
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250 ret = -ENOMEM;
251 io_addr = devm_ioport_map(&pdev->dev, io, 8);
cbcdd875 252 ctl_addr = devm_ioport_map(&pdev->dev, ctl, 1);
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253 if (!io_addr || !ctl_addr)
254 goto fail;
255
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256 ret = -ENOMEM;
257 host = ata_host_alloc(&pdev->dev, 1);
258 if (!host)
259 goto fail;
260 ap = host->ports[0];
85cd7251 261
669a5db4 262 if (type == 6580) {
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263 ap->ops = &qdi6580_port_ops;
264 ap->pio_mask = 0x1F;
265 ap->flags |= ATA_FLAG_SLAVE_POSS;
669a5db4 266 } else {
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267 ap->ops = &qdi6500_port_ops;
268 ap->pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */
269 ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
669a5db4 270 }
85cd7251 271
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272 ap->ioaddr.cmd_addr = io_addr;
273 ap->ioaddr.altstatus_addr = ctl_addr;
274 ap->ioaddr.ctl_addr = ctl_addr;
275 ata_std_ports(&ap->ioaddr);
669a5db4 276
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277 ata_port_desc(ap, "cmd %lx ctl %lx", io, ctl);
278
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279 /*
280 * Hook in a private data structure per channel
281 */
5d728824 282 ap->private_data = &qdi_data[nr_qdi_host];
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283
284 qdi_data[nr_qdi_host].timing = port;
285 qdi_data[nr_qdi_host].fast = fast;
286 qdi_data[nr_qdi_host].platform_dev = pdev;
287
288 printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io);
0d5ff566 289
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290 /* activate */
291 ret = ata_host_activate(host, irq, ata_interrupt, 0, &qdi_sht);
292 if (ret)
0d5ff566 293 goto fail;
85cd7251 294
669a5db4 295 qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev);
85cd7251 296 return 0;
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297
298 fail:
299 platform_device_unregister(pdev);
300 return ret;
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301}
302
303/**
304 * qdi_init - attach qdi interfaces
305 *
306 * Attach qdi IDE interfaces by scanning the ports it may occupy.
307 */
85cd7251 308
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309static __init int qdi_init(void)
310{
311 unsigned long flags;
312 static const unsigned long qd_port[2] = { 0x30, 0xB0 };
313 static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
314 static const int ide_irq[2] = { 14, 15 };
85cd7251 315
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316 int ct = 0;
317 int i;
85cd7251 318
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319 if (probe_qdi == 0)
320 return -ENODEV;
85cd7251 321
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322 /*
323 * Check each possible QD65xx base address
324 */
85cd7251 325
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326 for (i = 0; i < 2; i++) {
327 unsigned long port = qd_port[i];
328 u8 r, res;
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329
330
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331 if (request_region(port, 2, "pata_qdi")) {
332 /* Check for a card */
333 local_irq_save(flags);
334 r = inb_p(port);
335 outb_p(0x19, port);
336 res = inb_p(port);
337 outb_p(r, port);
338 local_irq_restore(flags);
85cd7251 339
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340 /* Fail */
341 if (res == 0x19)
342 {
343 release_region(port, 2);
344 continue;
345 }
85cd7251 346
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347 /* Passes the presence test */
348 r = inb_p(port + 1); /* Check port agrees with port set */
349 if ((r & 2) >> 1 != i) {
350 release_region(port, 2);
351 continue;
352 }
353
85cd7251 354 /* Check card type */
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355 if ((r & 0xF0) == 0xC0) {
356 /* QD6500: single channel */
357 if (r & 8) {
358 /* Disabled ? */
359 release_region(port, 2);
360 continue;
361 }
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362 if (qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
363 ct++;
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364 }
365 if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
366 /* QD6580: dual channel */
367 if (!request_region(port + 2 , 2, "pata_qdi"))
368 {
369 release_region(port, 2);
370 continue;
371 }
372 res = inb(port + 3);
373 if (res & 1) {
374 /* Single channel mode */
6878cce5 375 if (qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0)
cc7c15ec 376 ct++;
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377 } else {
378 /* Dual channel mode */
cc7c15ec
AC
379 if (qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04) == 0)
380 ct++;
381 if (qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04) == 0)
382 ct++;
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383 }
384 }
385 }
386 }
387 if (ct != 0)
388 return 0;
389 return -ENODEV;
390}
391
392static __exit void qdi_exit(void)
393{
394 int i;
395
396 for (i = 0; i < nr_qdi_host; i++) {
24dc5f33 397 ata_host_detach(qdi_host[i]);
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398 /* Free the control resource. The 6580 dual channel has the resources
399 * claimed as a pair of 2 byte resources so we need no special cases...
400 */
401 release_region(qdi_data[i].timing, 2);
402 platform_device_unregister(qdi_data[i].platform_dev);
85cd7251 403 }
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404}
405
406MODULE_AUTHOR("Alan Cox");
407MODULE_DESCRIPTION("low-level driver for qdi ATA");
408MODULE_LICENSE("GPL");
409MODULE_VERSION(DRV_VERSION);
410
411module_init(qdi_init);
412module_exit(qdi_exit);
413
414module_param(probe_qdi, int, 0);
415
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