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cciss: Adds simple mode functionality
[deliverable/linux.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/major.h>
31#include <linux/fs.h>
32#include <linux/bio.h>
33#include <linux/blkpg.h>
34#include <linux/timer.h>
35#include <linux/proc_fs.h>
89b6e743 36#include <linux/seq_file.h>
7c832835 37#include <linux/init.h>
4d761609 38#include <linux/jiffies.h>
1da177e4
LT		 39#include <linux/hdreg.h>
40#include <linux/spinlock.h>
41#include <linux/compat.h>
b368c9dd 42#include <linux/mutex.h>
1da177e4
LT		 43#include <asm/uaccess.h>
44#include <asm/io.h>
45
eb0df996 46#include <linux/dma-mapping.h>
1da177e4
LT		 47#include <linux/blkdev.h>
48#include <linux/genhd.h>
49#include <linux/completion.h>
d5d3b736 50#include <scsi/scsi.h>
03bbfee5
MMOD		 51#include <scsi/sg.h>
52#include <scsi/scsi_ioctl.h>
53#include <linux/cdrom.h>
231bc2a2 54#include <linux/scatterlist.h>
0a9279cc 55#include <linux/kthread.h>
1da177e4
LT		 56
57#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 58#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 60
61/* Embedded module documentation macros - see modules.h */
62MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 63MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 64MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65MODULE_VERSION("3.6.26");
1da177e4 66MODULE_LICENSE("GPL");
8a4ec67b
SC		 67static int cciss_tape_cmds = 6;
68module_param(cciss_tape_cmds, int, 0644);
69MODULE_PARM_DESC(cciss_tape_cmds,
70 "number of commands to allocate for tape devices (default: 6)");
13049537
JH		 71static int cciss_simple_mode;
72module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
73MODULE_PARM_DESC(cciss_simple_mode,
74 "Use 'simple mode' rather than 'performant mode'");
1da177e4 75
2a48fc0a 76static DEFINE_MUTEX(cciss_mutex);
bbe425cd 77static struct proc_dir_entry *proc_cciss;
2ec24ff1 78
1da177e4
LT		 79#include "cciss_cmd.h"
80#include "cciss.h"
81#include <linux/cciss_ioctl.h>
82
83/* define the PCI info for the cards we can control */
84static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
90 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
91 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
92 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 105 {0,}
106};
7c832835 107
1da177e4
LT		 108MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
109
1da177e4
LT		 110/* board_id = Subsystem Device ID & Vendor ID
111 * product = Marketing Name for the board
7c832835 112 * access = Address of the struct of function pointers
1da177e4
LT		 113 */
114static struct board_type products[] = {
49153998
MM		 115 {0x40700E11, "Smart Array 5300", &SA5_access},
116 {0x40800E11, "Smart Array 5i", &SA5B_access},
117 {0x40820E11, "Smart Array 532", &SA5B_access},
118 {0x40830E11, "Smart Array 5312", &SA5B_access},
119 {0x409A0E11, "Smart Array 641", &SA5_access},
120 {0x409B0E11, "Smart Array 642", &SA5_access},
121 {0x409C0E11, "Smart Array 6400", &SA5_access},
122 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
123 {0x40910E11, "Smart Array 6i", &SA5_access},
124 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 125 {0x3223103C, "Smart Array P800", &SA5_access},
126 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 127 {0x3235103C, "Smart Array P400i", &SA5_access},
128 {0x3211103C, "Smart Array E200i", &SA5_access},
129 {0x3212103C, "Smart Array E200", &SA5_access},
130 {0x3213103C, "Smart Array E200i", &SA5_access},
131 {0x3214103C, "Smart Array E200i", &SA5_access},
132 {0x3215103C, "Smart Array E200i", &SA5_access},
133 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 134 {0x3223103C, "Smart Array P800", &SA5_access},
135 {0x3234103C, "Smart Array P400", &SA5_access},
49153998 136 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 137};
138
d14c4ab5 139/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 140#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 141#define MAX_IOCTL_CONFIG_WAIT 1000
142
143/*define how many times we will try a command because of bus resets */
144#define MAX_CMD_RETRIES 3
145
1da177e4
LT		 146#define MAX_CTLR 32
147
148/* Originally cciss driver only supports 8 major numbers */
149#define MAX_CTLR_ORIG 8
150
1da177e4
LT		 151static ctlr_info_t *hba[MAX_CTLR];
152
b368c9dd
AP		 153static struct task_struct *cciss_scan_thread;
154static DEFINE_MUTEX(scan_mutex);
155static LIST_HEAD(scan_q);
156
165125e1 157static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 158static irqreturn_t do_cciss_intx(int irq, void *dev_id);
159static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 160static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 161static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 162static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 163static int do_ioctl(struct block_device *bdev, fmode_t mode,
164 unsigned int cmd, unsigned long arg);
ef7822c2 165static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 166 unsigned int cmd, unsigned long arg);
a885c8c4 167static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 168
1da177e4 169static int cciss_revalidate(struct gendisk *disk);
2d11d993 170static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 171static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 172 int clear_all, int via_ioctl);
1da177e4 173
f70dba83 174static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 175 sector_t *total_size, unsigned int *block_size);
f70dba83 176static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 177 sector_t *total_size, unsigned int *block_size);
f70dba83 178static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 179 sector_t total_size,
00988a35 180 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 181 drive_info_struct *drv);
dac5488a 182static void __devinit cciss_interrupt_mode(ctlr_info_t *);
13049537 183static int __devinit cciss_enter_simple_mode(struct ctlr_info *h);
7c832835 184static void start_io(ctlr_info_t *h);
f70dba83 185static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 186 __u8 page_code, unsigned char scsi3addr[],
187 int cmd_type);
85cc61ae 188static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
189 int attempt_retry);
190static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 191
d6f4965d 192static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 193static int scan_thread(void *data);
194static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 195static void cciss_hba_release(struct device *dev);
196static void cciss_device_release(struct device *dev);
361e9b07 197static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 198static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 199static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 200static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
201 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
202 u64 *cfg_offset);
203static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
204 unsigned long *memory_bar);
16011131 205static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
62710ae1
SC		 206static __devinit int write_driver_ver_to_cfgtable(
207 CfgTable_struct __iomem *cfgtable);
33079b21 208
5e216153
MM		 209/* performant mode helper functions */
210static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
211 int *bucket_map);
212static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 213
1da177e4 214#ifdef CONFIG_PROC_FS
f70dba83 215static void cciss_procinit(ctlr_info_t *h);
1da177e4 216#else
f70dba83 217static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 218{
219}
220#endif /* CONFIG_PROC_FS */
1da177e4
LT		 221
222#ifdef CONFIG_COMPAT
ef7822c2
AV		 223static int cciss_compat_ioctl(struct block_device *, fmode_t,
224 unsigned, unsigned long);
1da177e4
LT		 225#endif
226
83d5cde4 227static const struct block_device_operations cciss_fops = {
7c832835 228 .owner = THIS_MODULE,
6e9624b8 229 .open = cciss_unlocked_open,
ef7822c2 230 .release = cciss_release,
8a6cfeb6 231 .ioctl = do_ioctl,
7c832835 232 .getgeo = cciss_getgeo,
1da177e4 233#ifdef CONFIG_COMPAT
ef7822c2 234 .compat_ioctl = cciss_compat_ioctl,
1da177e4 235#endif
7c832835 236 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 237};
238
5e216153
MM		 239/* set_performant_mode: Modify the tag for cciss performant
240 * set bit 0 for pull model, bits 3-1 for block fetch
241 * register number
242 */
243static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
244{
0498cc2a 245 if (likely(h->transMethod & CFGTBL_Trans_Performant))
5e216153
MM		 246 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
247}
248
1da177e4
LT		 249/*
250 * Enqueuing and dequeuing functions for cmdlists.
251 */
e6e1ee93 252static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 253{
e6e1ee93 254 list_add_tail(&c->list, list);
1da177e4
LT		 255}
256
8a3173de 257static inline void removeQ(CommandList_struct *c)
1da177e4 258{
b59e64d0
HR		 259 /*
260 * After kexec/dump some commands might still
261 * be in flight, which the firmware will try
262 * to complete. Resetting the firmware doesn't work
263 * with old fw revisions, so we have to mark
264 * them off as 'stale' to prevent the driver from
265 * falling over.
266 */
e6e1ee93 267 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 268 c->cmd_type = CMD_MSG_STALE;
8a3173de 269 return;
b59e64d0 270 }
8a3173de 271
e6e1ee93 272 list_del_init(&c->list);
1da177e4
LT		 273}
274
664a717d
MM		 275static void enqueue_cmd_and_start_io(ctlr_info_t *h,
276 CommandList_struct *c)
277{
278 unsigned long flags;
5e216153 279 set_performant_mode(h, c);
664a717d
MM		 280 spin_lock_irqsave(&h->lock, flags);
281 addQ(&h->reqQ, c);
282 h->Qdepth++;
2a643ec6
SC		 283 if (h->Qdepth > h->maxQsinceinit)
284 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 285 start_io(h);
286 spin_unlock_irqrestore(&h->lock, flags);
287}
288
dccc9b56 289static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 290 int nr_cmds)
291{
292 int i;
293
294 if (!cmd_sg_list)
295 return;
296 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 297 kfree(cmd_sg_list[i]);
298 cmd_sg_list[i] = NULL;
49fc5601
SC		 299 }
300 kfree(cmd_sg_list);
301}
302
dccc9b56
SC		 303static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
304 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 305{
306 int j;
dccc9b56 307 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 308
309 if (chainsize <= 0)
310 return NULL;
311
312 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
313 if (!cmd_sg_list)
314 return NULL;
315
316 /* Build up chain blocks for each command */
317 for (j = 0; j < nr_cmds; j++) {
49fc5601 318 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 319 cmd_sg_list[j] = kmalloc((chainsize *
320 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
321 if (!cmd_sg_list[j]) {
49fc5601
SC		 322 dev_err(&h->pdev->dev, "Cannot get memory "
323 "for s/g chains.\n");
324 goto clean;
325 }
326 }
327 return cmd_sg_list;
328clean:
329 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
330 return NULL;
331}
332
d45033ef
SC		 333static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
334{
335 SGDescriptor_struct *chain_sg;
336 u64bit temp64;
337
338 if (c->Header.SGTotal <= h->max_cmd_sgentries)
339 return;
340
341 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
342 temp64.val32.lower = chain_sg->Addr.lower;
343 temp64.val32.upper = chain_sg->Addr.upper;
344 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
345}
346
347static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
348 SGDescriptor_struct *chain_block, int len)
349{
350 SGDescriptor_struct *chain_sg;
351 u64bit temp64;
352
353 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
354 chain_sg->Ext = CCISS_SG_CHAIN;
355 chain_sg->Len = len;
356 temp64.val = pci_map_single(h->pdev, chain_block, len,
357 PCI_DMA_TODEVICE);
358 chain_sg->Addr.lower = temp64.val32.lower;
359 chain_sg->Addr.upper = temp64.val32.upper;
360}
361
1da177e4
LT		 362#include "cciss_scsi.c" /* For SCSI tape support */
363
1e6f2dc1
AB		 364static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
365 "UNKNOWN"
366};
0e4a9d03 367#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 368
1da177e4
LT		 369#ifdef CONFIG_PROC_FS
370
371/*
372 * Report information about this controller.
373 */
374#define ENG_GIG 1000000000
375#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 376#define ENGAGE_SCSI "engage scsi"
1da177e4 377
89b6e743 378static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 379{
89b6e743
MM		 380 ctlr_info_t *h = seq->private;
381
382 seq_printf(seq, "%s: HP %s Controller\n"
383 "Board ID: 0x%08lx\n"
384 "Firmware Version: %c%c%c%c\n"
385 "IRQ: %d\n"
386 "Logical drives: %d\n"
387 "Current Q depth: %d\n"
388 "Current # commands on controller: %d\n"
389 "Max Q depth since init: %d\n"
390 "Max # commands on controller since init: %d\n"
391 "Max SG entries since init: %d\n",
392 h->devname,
393 h->product_name,
394 (unsigned long)h->board_id,
395 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
13049537 396 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
89b6e743
MM		 397 h->num_luns,
398 h->Qdepth, h->commands_outstanding,
399 h->maxQsinceinit, h->max_outstanding, h->maxSG);
400
401#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 402 cciss_seq_tape_report(seq, h);
89b6e743
MM		 403#endif /* CONFIG_CISS_SCSI_TAPE */
404}
1da177e4 405
89b6e743
MM		 406static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
407{
408 ctlr_info_t *h = seq->private;
89b6e743 409 unsigned long flags;
1da177e4
LT		 410
411 /* prevent displaying bogus info during configuration
412 * or deconfiguration of a logical volume
413 */
f70dba83 414 spin_lock_irqsave(&h->lock, flags);
1da177e4 415 if (h->busy_configuring) {
f70dba83 416 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 417 return ERR_PTR(-EBUSY);
1da177e4
LT		 418 }
419 h->busy_configuring = 1;
f70dba83 420 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 421
89b6e743
MM		 422 if (*pos == 0)
423 cciss_seq_show_header(seq);
424
425 return pos;
426}
427
428static int cciss_seq_show(struct seq_file *seq, void *v)
429{
430 sector_t vol_sz, vol_sz_frac;
431 ctlr_info_t *h = seq->private;
432 unsigned ctlr = h->ctlr;
433 loff_t *pos = v;
9cef0d2f 434 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 435
436 if (*pos > h->highest_lun)
437 return 0;
438
531c2dc7
SC		 439 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
440 return 0;
441
89b6e743
MM		 442 if (drv->heads == 0)
443 return 0;
444
445 vol_sz = drv->nr_blocks;
446 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
447 vol_sz_frac *= 100;
448 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
449
fa52bec9 450 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 451 drv->raid_level = RAID_UNKNOWN;
452 seq_printf(seq, "cciss/c%dd%d:"
453 "\t%4u.%02uGB\tRAID %s\n",
454 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
455 raid_label[drv->raid_level]);
456 return 0;
457}
458
459static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
460{
461 ctlr_info_t *h = seq->private;
462
463 if (*pos > h->highest_lun)
464 return NULL;
465 *pos += 1;
466
467 return pos;
468}
469
470static void cciss_seq_stop(struct seq_file *seq, void *v)
471{
472 ctlr_info_t *h = seq->private;
473
474 /* Only reset h->busy_configuring if we succeeded in setting
475 * it during cciss_seq_start. */
476 if (v == ERR_PTR(-EBUSY))
477 return;
7c832835 478
1da177e4 479 h->busy_configuring = 0;
1da177e4
LT		 480}
481
88e9d34c 482static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 483 .start = cciss_seq_start,
484 .show = cciss_seq_show,
485 .next = cciss_seq_next,
486 .stop = cciss_seq_stop,
487};
488
489static int cciss_seq_open(struct inode *inode, struct file *file)
490{
491 int ret = seq_open(file, &cciss_seq_ops);
492 struct seq_file *seq = file->private_data;
493
494 if (!ret)
495 seq->private = PDE(inode)->data;
496
497 return ret;
498}
499
500static ssize_t
501cciss_proc_write(struct file *file, const char __user *buf,
502 size_t length, loff_t *ppos)
1da177e4 503{
89b6e743
MM		 504 int err;
505 char *buffer;
506
507#ifndef CONFIG_CISS_SCSI_TAPE
508 return -EINVAL;
1da177e4
LT		 509#endif
510
89b6e743 511 if (!buf || length > PAGE_SIZE - 1)
7c832835 512 return -EINVAL;
89b6e743
MM		 513
514 buffer = (char *)__get_free_page(GFP_KERNEL);
515 if (!buffer)
516 return -ENOMEM;
517
518 err = -EFAULT;
519 if (copy_from_user(buffer, buf, length))
520 goto out;
521 buffer[length] = '\0';
522
523#ifdef CONFIG_CISS_SCSI_TAPE
524 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
525 struct seq_file *seq = file->private_data;
526 ctlr_info_t *h = seq->private;
89b6e743 527
f70dba83 528 err = cciss_engage_scsi(h);
8721c81f 529 if (err == 0)
89b6e743
MM		 530 err = length;
531 } else
532#endif /* CONFIG_CISS_SCSI_TAPE */
533 err = -EINVAL;
7c832835
BH		 534 /* might be nice to have "disengage" too, but it's not
535 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 536
537out:
538 free_page((unsigned long)buffer);
539 return err;
1da177e4
LT		 540}
541
828c0950 542static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 543 .owner = THIS_MODULE,
544 .open = cciss_seq_open,
545 .read = seq_read,
546 .llseek = seq_lseek,
547 .release = seq_release,
548 .write = cciss_proc_write,
549};
550
f70dba83 551static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 552{
553 struct proc_dir_entry *pde;
554
89b6e743 555 if (proc_cciss == NULL)
928b4d8c 556 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 557 if (!proc_cciss)
558 return;
f70dba83 559 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 560 S_IROTH, proc_cciss,
f70dba83 561 &cciss_proc_fops, h);
1da177e4 562}
7c832835 563#endif /* CONFIG_PROC_FS */
1da177e4 564
7fe06326
AP		 565#define MAX_PRODUCT_NAME_LEN 19
566
567#define to_hba(n) container_of(n, struct ctlr_info, dev)
568#define to_drv(n) container_of(n, drive_info_struct, dev)
569
ec52d5f1 570/* List of controllers which cannot be hard reset on kexec with reset_devices */
957c2ec5
SC		 571static u32 unresettable_controller[] = {
572 0x324a103C, /* Smart Array P712m */
573 0x324b103C, /* SmartArray P711m */
574 0x3223103C, /* Smart Array P800 */
575 0x3234103C, /* Smart Array P400 */
576 0x3235103C, /* Smart Array P400i */
577 0x3211103C, /* Smart Array E200i */
578 0x3212103C, /* Smart Array E200 */
579 0x3213103C, /* Smart Array E200i */
580 0x3214103C, /* Smart Array E200i */
581 0x3215103C, /* Smart Array E200i */
582 0x3237103C, /* Smart Array E500 */
583 0x323D103C, /* Smart Array P700m */
584 0x409C0E11, /* Smart Array 6400 */
585 0x409D0E11, /* Smart Array 6400 EM */
586};
587
ec52d5f1
SC		 588/* List of controllers which cannot even be soft reset */
589static u32 soft_unresettable_controller[] = {
590 0x409C0E11, /* Smart Array 6400 */
591 0x409D0E11, /* Smart Array 6400 EM */
592};
593
594static int ctlr_is_hard_resettable(u32 board_id)
957c2ec5
SC		 595{
596 int i;
597
598 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
ec52d5f1 599 if (unresettable_controller[i] == board_id)
957c2ec5
SC		 600 return 0;
601 return 1;
602}
603
ec52d5f1
SC		 604static int ctlr_is_soft_resettable(u32 board_id)
605{
606 int i;
607
608 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
609 if (soft_unresettable_controller[i] == board_id)
610 return 0;
611 return 1;
612}
613
614static int ctlr_is_resettable(u32 board_id)
615{
616 return ctlr_is_hard_resettable(board_id) ||
617 ctlr_is_soft_resettable(board_id);
618}
619
957c2ec5
SC		 620static ssize_t host_show_resettable(struct device *dev,
621 struct device_attribute *attr,
622 char *buf)
623{
624 struct ctlr_info *h = to_hba(dev);
625
ec52d5f1 626 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
957c2ec5
SC		 627}
628static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
629
d6f4965d
AP		 630static ssize_t host_store_rescan(struct device *dev,
631 struct device_attribute *attr,
632 const char *buf, size_t count)
633{
634 struct ctlr_info *h = to_hba(dev);
635
636 add_to_scan_list(h);
637 wake_up_process(cciss_scan_thread);
638 wait_for_completion_interruptible(&h->scan_wait);
639
640 return count;
641}
8ba95c69 642static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 643
644static ssize_t dev_show_unique_id(struct device *dev,
645 struct device_attribute *attr,
646 char *buf)
647{
648 drive_info_struct *drv = to_drv(dev);
649 struct ctlr_info *h = to_hba(drv->dev.parent);
650 __u8 sn[16];
651 unsigned long flags;
652 int ret = 0;
653
f70dba83 654 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 655 if (h->busy_configuring)
656 ret = -EBUSY;
657 else
658 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 659 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 660
661 if (ret)
662 return ret;
663 else
664 return snprintf(buf, 16 * 2 + 2,
665 "%02X%02X%02X%02X%02X%02X%02X%02X"
666 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
667 sn[0], sn[1], sn[2], sn[3],
668 sn[4], sn[5], sn[6], sn[7],
669 sn[8], sn[9], sn[10], sn[11],
670 sn[12], sn[13], sn[14], sn[15]);
671}
8ba95c69 672static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 673
674static ssize_t dev_show_vendor(struct device *dev,
675 struct device_attribute *attr,
676 char *buf)
677{
678 drive_info_struct *drv = to_drv(dev);
679 struct ctlr_info *h = to_hba(drv->dev.parent);
680 char vendor[VENDOR_LEN + 1];
681 unsigned long flags;
682 int ret = 0;
683
f70dba83 684 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 685 if (h->busy_configuring)
686 ret = -EBUSY;
687 else
688 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 689 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 690
691 if (ret)
692 return ret;
693 else
694 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
695}
8ba95c69 696static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 697
698static ssize_t dev_show_model(struct device *dev,
699 struct device_attribute *attr,
700 char *buf)
701{
702 drive_info_struct *drv = to_drv(dev);
703 struct ctlr_info *h = to_hba(drv->dev.parent);
704 char model[MODEL_LEN + 1];
705 unsigned long flags;
706 int ret = 0;
707
f70dba83 708 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 709 if (h->busy_configuring)
710 ret = -EBUSY;
711 else
712 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 713 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 714
715 if (ret)
716 return ret;
717 else
718 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
719}
8ba95c69 720static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 721
722static ssize_t dev_show_rev(struct device *dev,
723 struct device_attribute *attr,
724 char *buf)
725{
726 drive_info_struct *drv = to_drv(dev);
727 struct ctlr_info *h = to_hba(drv->dev.parent);
728 char rev[REV_LEN + 1];
729 unsigned long flags;
730 int ret = 0;
731
f70dba83 732 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 733 if (h->busy_configuring)
734 ret = -EBUSY;
735 else
736 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 737 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 738
739 if (ret)
740 return ret;
741 else
742 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
743}
8ba95c69 744static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 745
ce84a8ae
SC		 746static ssize_t cciss_show_lunid(struct device *dev,
747 struct device_attribute *attr, char *buf)
748{
9cef0d2f
SC		 749 drive_info_struct *drv = to_drv(dev);
750 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 751 unsigned long flags;
752 unsigned char lunid[8];
753
f70dba83 754 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 755 if (h->busy_configuring) {
f70dba83 756 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 757 return -EBUSY;
758 }
759 if (!drv->heads) {
f70dba83 760 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 761 return -ENOTTY;
762 }
763 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 764 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 765 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
766 lunid[0], lunid[1], lunid[2], lunid[3],
767 lunid[4], lunid[5], lunid[6], lunid[7]);
768}
8ba95c69 769static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 770
3ff1111d
SC		 771static ssize_t cciss_show_raid_level(struct device *dev,
772 struct device_attribute *attr, char *buf)
773{
9cef0d2f
SC		 774 drive_info_struct *drv = to_drv(dev);
775 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 776 int raid;
777 unsigned long flags;
778
f70dba83 779 spin_lock_irqsave(&h->lock, flags);
3ff1111d 780 if (h->busy_configuring) {
f70dba83 781 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 782 return -EBUSY;
783 }
784 raid = drv->raid_level;
f70dba83 785 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 786 if (raid < 0 || raid > RAID_UNKNOWN)
787 raid = RAID_UNKNOWN;
788
789 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
790 raid_label[raid]);
791}
8ba95c69 792static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 793
e272afec
SC		 794static ssize_t cciss_show_usage_count(struct device *dev,
795 struct device_attribute *attr, char *buf)
796{
9cef0d2f
SC		 797 drive_info_struct *drv = to_drv(dev);
798 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 799 unsigned long flags;
800 int count;
801
f70dba83 802 spin_lock_irqsave(&h->lock, flags);
e272afec 803 if (h->busy_configuring) {
f70dba83 804 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 805 return -EBUSY;
806 }
807 count = drv->usage_count;
f70dba83 808 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 809 return snprintf(buf, 20, "%d\n", count);
810}
8ba95c69 811static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 812
d6f4965d
AP		 813static struct attribute *cciss_host_attrs[] = {
814 &dev_attr_rescan.attr,
957c2ec5 815 &dev_attr_resettable.attr,
d6f4965d
AP		 816 NULL
817};
818
819static struct attribute_group cciss_host_attr_group = {
820 .attrs = cciss_host_attrs,
821};
822
9f792d9f 823static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 824 &cciss_host_attr_group,
825 NULL
826};
827
828static struct device_type cciss_host_type = {
829 .name = "cciss_host",
830 .groups = cciss_host_attr_groups,
617e1344 831 .release = cciss_hba_release,
d6f4965d
AP		 832};
833
7fe06326
AP		 834static struct attribute *cciss_dev_attrs[] = {
835 &dev_attr_unique_id.attr,
836 &dev_attr_model.attr,
837 &dev_attr_vendor.attr,
838 &dev_attr_rev.attr,
ce84a8ae 839 &dev_attr_lunid.attr,
3ff1111d 840 &dev_attr_raid_level.attr,
e272afec 841 &dev_attr_usage_count.attr,
7fe06326
AP		 842 NULL
843};
844
845static struct attribute_group cciss_dev_attr_group = {
846 .attrs = cciss_dev_attrs,
847};
848
a4dbd674 849static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 850 &cciss_dev_attr_group,
851 NULL
852};
853
854static struct device_type cciss_dev_type = {
855 .name = "cciss_device",
856 .groups = cciss_dev_attr_groups,
617e1344 857 .release = cciss_device_release,
7fe06326
AP		 858};
859
860static struct bus_type cciss_bus_type = {
861 .name = "cciss",
862};
863
617e1344
SC		 864/*
865 * cciss_hba_release is called when the reference count
866 * of h->dev goes to zero.
867 */
868static void cciss_hba_release(struct device *dev)
869{
870 /*
871 * nothing to do, but need this to avoid a warning
872 * about not having a release handler from lib/kref.c.
873 */
874}
7fe06326
AP		 875
876/*
877 * Initialize sysfs entry for each controller. This sets up and registers
878 * the 'cciss#' directory for each individual controller under
879 * /sys/bus/pci/devices/<dev>/.
880 */
881static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
882{
883 device_initialize(&h->dev);
884 h->dev.type = &cciss_host_type;
885 h->dev.bus = &cciss_bus_type;
886 dev_set_name(&h->dev, "%s", h->devname);
887 h->dev.parent = &h->pdev->dev;
888
889 return device_add(&h->dev);
890}
891
892/*
893 * Remove sysfs entries for an hba.
894 */
895static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
896{
897 device_del(&h->dev);
617e1344
SC		 898 put_device(&h->dev); /* final put. */
899}
900
901/* cciss_device_release is called when the reference count
9cef0d2f 902 * of h->drv[x]dev goes to zero.
617e1344
SC		 903 */
904static void cciss_device_release(struct device *dev)
905{
9cef0d2f
SC		 906 drive_info_struct *drv = to_drv(dev);
907 kfree(drv);
7fe06326
AP		 908}
909
910/*
911 * Initialize sysfs for each logical drive. This sets up and registers
912 * the 'c#d#' directory for each individual logical drive under
913 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
914 * /sys/block/cciss!c#d# to this entry.
915 */
617e1344 916static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 917 int drv_index)
918{
617e1344
SC		 919 struct device *dev;
920
9cef0d2f 921 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 922 return 0;
923
9cef0d2f 924 dev = &h->drv[drv_index]->dev;
617e1344
SC		 925 device_initialize(dev);
926 dev->type = &cciss_dev_type;
927 dev->bus = &cciss_bus_type;
928 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
929 dev->parent = &h->dev;
9cef0d2f 930 h->drv[drv_index]->device_initialized = 1;
617e1344 931 return device_add(dev);
7fe06326
AP		 932}
933
934/*
935 * Remove sysfs entries for a logical drive.
936 */
8ce51966
SC		 937static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
938 int ctlr_exiting)
7fe06326 939{
9cef0d2f 940 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 941
942 /* special case for c*d0, we only destroy it on controller exit */
943 if (drv_index == 0 && !ctlr_exiting)
944 return;
945
617e1344
SC		 946 device_del(dev);
947 put_device(dev); /* the "final" put. */
9cef0d2f 948 h->drv[drv_index] = NULL;
7fe06326
AP		 949}
950
7c832835
BH		 951/*
952 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 953 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 954 * which ones are free or in use.
7c832835 955 */
6b4d96b8 956static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 957{
958 CommandList_struct *c;
7c832835 959 int i;
1da177e4
LT		 960 u64bit temp64;
961 dma_addr_t cmd_dma_handle, err_dma_handle;
962
6b4d96b8
SC		 963 do {
964 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
965 if (i == h->nr_cmds)
7c832835 966 return NULL;
6b4d96b8
SC		 967 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
968 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 969 c = h->cmd_pool + i;
970 memset(c, 0, sizeof(CommandList_struct));
971 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
972 c->err_info = h->errinfo_pool + i;
973 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
974 err_dma_handle = h->errinfo_pool_dhandle
975 + i * sizeof(ErrorInfo_struct);
976 h->nr_allocs++;
1da177e4 977
6b4d96b8 978 c->cmdindex = i;
33079b21 979
e6e1ee93 980 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 981 c->busaddr = (__u32) cmd_dma_handle;
982 temp64.val = (__u64) err_dma_handle;
983 c->ErrDesc.Addr.lower = temp64.val32.lower;
984 c->ErrDesc.Addr.upper = temp64.val32.upper;
985 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 986
6b4d96b8
SC		 987 c->ctlr = h->ctlr;
988 return c;
989}
33079b21 990
6b4d96b8
SC		 991/* allocate a command using pci_alloc_consistent, used for ioctls,
992 * etc., not for the main i/o path.
993 */
994static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
995{
996 CommandList_struct *c;
997 u64bit temp64;
998 dma_addr_t cmd_dma_handle, err_dma_handle;
999
1000 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
1001 sizeof(CommandList_struct), &cmd_dma_handle);
1002 if (c == NULL)
1003 return NULL;
1004 memset(c, 0, sizeof(CommandList_struct));
1005
1006 c->cmdindex = -1;
1007
1008 c->err_info = (ErrorInfo_struct *)
1009 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1010 &err_dma_handle);
1011
1012 if (c->err_info == NULL) {
1013 pci_free_consistent(h->pdev,
1014 sizeof(CommandList_struct), c, cmd_dma_handle);
1015 return NULL;
7c832835 1016 }
6b4d96b8 1017 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 1018
e6e1ee93 1019 INIT_LIST_HEAD(&c->list);
1da177e4 1020 c->busaddr = (__u32) cmd_dma_handle;
7c832835 1021 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 1022 c->ErrDesc.Addr.lower = temp64.val32.lower;
1023 c->ErrDesc.Addr.upper = temp64.val32.upper;
1024 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 1025
7c832835
BH		 1026 c->ctlr = h->ctlr;
1027 return c;
1da177e4
LT		 1028}
1029
6b4d96b8 1030static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 1031{
1032 int i;
6b4d96b8
SC		 1033
1034 i = c - h->cmd_pool;
1035 clear_bit(i & (BITS_PER_LONG - 1),
1036 h->cmd_pool_bits + (i / BITS_PER_LONG));
1037 h->nr_frees++;
1038}
1039
1040static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1041{
1da177e4
LT		 1042 u64bit temp64;
1043
6b4d96b8
SC		 1044 temp64.val32.lower = c->ErrDesc.Addr.lower;
1045 temp64.val32.upper = c->ErrDesc.Addr.upper;
1046 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1047 c->err_info, (dma_addr_t) temp64.val);
16011131
SC		 1048 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1049 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1da177e4
LT		 1050}
1051
1052static inline ctlr_info_t *get_host(struct gendisk *disk)
1053{
7c832835 1054 return disk->queue->queuedata;
1da177e4
LT		 1055}
1056
1057static inline drive_info_struct *get_drv(struct gendisk *disk)
1058{
1059 return disk->private_data;
1060}
1061
1062/*
1063 * Open. Make sure the device is really there.
1064 */
ef7822c2 1065static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1066{
f70dba83 1067 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1068 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1069
b2a4a43d 1070 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1071 if (drv->busy_configuring)
ddd47442 1072 return -EBUSY;
1da177e4
LT		 1073 /*
1074 * Root is allowed to open raw volume zero even if it's not configured
1075 * so array config can still work. Root is also allowed to open any
1076 * volume that has a LUN ID, so it can issue IOCTL to reread the
1077 * disk information. I don't think I really like this
1078 * but I'm already using way to many device nodes to claim another one
1079 * for "raw controller".
1080 */
7a06f789 1081 if (drv->heads == 0) {
ef7822c2 1082 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1083 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1084 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1085 return -ENXIO;
1da177e4 1086 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1087 } else if (memcmp(drv->LunID, CTLR_LUNID,
1088 sizeof(drv->LunID))) {
1da177e4
LT		 1089 return -ENXIO;
1090 }
1091 }
1092 if (!capable(CAP_SYS_ADMIN))
1093 return -EPERM;
1094 }
1095 drv->usage_count++;
f70dba83 1096 h->usage_count++;
1da177e4
LT		 1097 return 0;
1098}
7c832835 1099
6e9624b8
AB		 1100static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1101{
1102 int ret;
1103
2a48fc0a 1104 mutex_lock(&cciss_mutex);
6e9624b8 1105 ret = cciss_open(bdev, mode);
2a48fc0a 1106 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1107
1108 return ret;
1109}
1110
1da177e4
LT		 1111/*
1112 * Close. Sync first.
1113 */
ef7822c2 1114static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1115{
f70dba83 1116 ctlr_info_t *h;
6e9624b8 1117 drive_info_struct *drv;
1da177e4 1118
2a48fc0a 1119 mutex_lock(&cciss_mutex);
f70dba83 1120 h = get_host(disk);
6e9624b8 1121 drv = get_drv(disk);
b2a4a43d 1122 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1123 drv->usage_count--;
f70dba83 1124 h->usage_count--;
2a48fc0a 1125 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1126 return 0;
1127}
1128
ef7822c2
AV		 1129static int do_ioctl(struct block_device *bdev, fmode_t mode,
1130 unsigned cmd, unsigned long arg)
1da177e4
LT		 1131{
1132 int ret;
2a48fc0a 1133 mutex_lock(&cciss_mutex);
ef7822c2 1134 ret = cciss_ioctl(bdev, mode, cmd, arg);
2a48fc0a 1135 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1136 return ret;
1137}
1138
8a6cfeb6
AB		 1139#ifdef CONFIG_COMPAT
1140
ef7822c2
AV		 1141static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1142 unsigned cmd, unsigned long arg);
1143static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1144 unsigned cmd, unsigned long arg);
1da177e4 1145
ef7822c2
AV		 1146static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1147 unsigned cmd, unsigned long arg)
1da177e4
LT		 1148{
1149 switch (cmd) {
1150 case CCISS_GETPCIINFO:
1151 case CCISS_GETINTINFO:
1152 case CCISS_SETINTINFO:
1153 case CCISS_GETNODENAME:
1154 case CCISS_SETNODENAME:
1155 case CCISS_GETHEARTBEAT:
1156 case CCISS_GETBUSTYPES:
1157 case CCISS_GETFIRMVER:
1158 case CCISS_GETDRIVVER:
1159 case CCISS_REVALIDVOLS:
1160 case CCISS_DEREGDISK:
1161 case CCISS_REGNEWDISK:
1162 case CCISS_REGNEWD:
1163 case CCISS_RESCANDISK:
1164 case CCISS_GETLUNINFO:
ef7822c2 1165 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1166
1167 case CCISS_PASSTHRU32:
ef7822c2 1168 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1169 case CCISS_BIG_PASSTHRU32:
ef7822c2 1170 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1171
1172 default:
1173 return -ENOIOCTLCMD;
1174 }
1175}
1176
ef7822c2
AV		 1177static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1178 unsigned cmd, unsigned long arg)
1da177e4
LT		 1179{
1180 IOCTL32_Command_struct __user *arg32 =
7c832835 1181 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1182 IOCTL_Command_struct arg64;
1183 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1184 int err;
1185 u32 cp;
1186
1187 err = 0;
7c832835
BH		 1188 err |=
1189 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1190 sizeof(arg64.LUN_info));
1191 err |=
1192 copy_from_user(&arg64.Request, &arg32->Request,
1193 sizeof(arg64.Request));
1194 err |=
1195 copy_from_user(&arg64.error_info, &arg32->error_info,
1196 sizeof(arg64.error_info));
1da177e4
LT		 1197 err |= get_user(arg64.buf_size, &arg32->buf_size);
1198 err |= get_user(cp, &arg32->buf);
1199 arg64.buf = compat_ptr(cp);
1200 err |= copy_to_user(p, &arg64, sizeof(arg64));
1201
1202 if (err)
1203 return -EFAULT;
1204
ef7822c2 1205 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1206 if (err)
1207 return err;
7c832835
BH		 1208 err |=
1209 copy_in_user(&arg32->error_info, &p->error_info,
1210 sizeof(arg32->error_info));
1da177e4
LT		 1211 if (err)
1212 return -EFAULT;
1213 return err;
1214}
1215
ef7822c2
AV		 1216static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1217 unsigned cmd, unsigned long arg)
1da177e4
LT		 1218{
1219 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1220 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1221 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1222 BIG_IOCTL_Command_struct __user *p =
1223 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1224 int err;
1225 u32 cp;
1226
7ab5118d 1227 memset(&arg64, 0, sizeof(arg64));
1da177e4 1228 err = 0;
7c832835
BH		 1229 err |=
1230 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1231 sizeof(arg64.LUN_info));
1232 err |=
1233 copy_from_user(&arg64.Request, &arg32->Request,
1234 sizeof(arg64.Request));
1235 err |=
1236 copy_from_user(&arg64.error_info, &arg32->error_info,
1237 sizeof(arg64.error_info));
1da177e4
LT		 1238 err |= get_user(arg64.buf_size, &arg32->buf_size);
1239 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1240 err |= get_user(cp, &arg32->buf);
1241 arg64.buf = compat_ptr(cp);
1242 err |= copy_to_user(p, &arg64, sizeof(arg64));
1243
1244 if (err)
7c832835 1245 return -EFAULT;
1da177e4 1246
ef7822c2 1247 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1248 if (err)
1249 return err;
7c832835
BH		 1250 err |=
1251 copy_in_user(&arg32->error_info, &p->error_info,
1252 sizeof(arg32->error_info));
1da177e4
LT		 1253 if (err)
1254 return -EFAULT;
1255 return err;
1256}
1257#endif
a885c8c4
CH		 1258
1259static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1260{
1261 drive_info_struct *drv = get_drv(bdev->bd_disk);
1262
1263 if (!drv->cylinders)
1264 return -ENXIO;
1265
1266 geo->heads = drv->heads;
1267 geo->sectors = drv->sectors;
1268 geo->cylinders = drv->cylinders;
1269 return 0;
1270}
1271
f70dba83 1272static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1273{
1274 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1275 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1276 (void)check_for_unit_attention(h, c);
0a9279cc 1277}
0a25a5ae
SC		 1278
1279static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1280{
0a25a5ae 1281 cciss_pci_info_struct pciinfo;
1da177e4 1282
0a25a5ae
SC		 1283 if (!argp)
1284 return -EINVAL;
1285 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1286 pciinfo.bus = h->pdev->bus->number;
1287 pciinfo.dev_fn = h->pdev->devfn;
1288 pciinfo.board_id = h->board_id;
1289 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1290 return -EFAULT;
1291 return 0;
1292}
1da177e4 1293
576e661c
SC		 1294static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1295{
1296 cciss_coalint_struct intinfo;
1da177e4 1297
576e661c
SC		 1298 if (!argp)
1299 return -EINVAL;
1300 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1301 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1302 if (copy_to_user
1303 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1304 return -EFAULT;
1305 return 0;
1306}
1da177e4 1307
4c800eed
SC		 1308static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1309{
1310 cciss_coalint_struct intinfo;
1311 unsigned long flags;
1312 int i;
1da177e4 1313
4c800eed
SC		 1314 if (!argp)
1315 return -EINVAL;
1316 if (!capable(CAP_SYS_ADMIN))
1317 return -EPERM;
1318 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1319 return -EFAULT;
1320 if ((intinfo.delay == 0) && (intinfo.count == 0))
1321 return -EINVAL;
1322 spin_lock_irqsave(&h->lock, flags);
1323 /* Update the field, and then ring the doorbell */
1324 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1325 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1326 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1327
1328 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1329 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1330 break;
1331 udelay(1000); /* delay and try again */
1332 }
1333 spin_unlock_irqrestore(&h->lock, flags);
1334 if (i >= MAX_IOCTL_CONFIG_WAIT)
1335 return -EAGAIN;
1336 return 0;
1337}
1da177e4 1338
25216109
SC		 1339static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1340{
1341 NodeName_type NodeName;
1342 int i;
1da177e4 1343
25216109
SC		 1344 if (!argp)
1345 return -EINVAL;
1346 for (i = 0; i < 16; i++)
1347 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1348 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1349 return -EFAULT;
1350 return 0;
1351}
7c832835 1352
4f43f32c
SC		 1353static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1354{
1355 NodeName_type NodeName;
1356 unsigned long flags;
1357 int i;
7c832835 1358
4f43f32c
SC		 1359 if (!argp)
1360 return -EINVAL;
1361 if (!capable(CAP_SYS_ADMIN))
1362 return -EPERM;
1363 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1364 return -EFAULT;
1365 spin_lock_irqsave(&h->lock, flags);
1366 /* Update the field, and then ring the doorbell */
1367 for (i = 0; i < 16; i++)
1368 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1369 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1370 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1371 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1372 break;
1373 udelay(1000); /* delay and try again */
1374 }
1375 spin_unlock_irqrestore(&h->lock, flags);
1376 if (i >= MAX_IOCTL_CONFIG_WAIT)
1377 return -EAGAIN;
1378 return 0;
1379}
7c832835 1380
93c74931
SC		 1381static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1382{
1383 Heartbeat_type heartbeat;
7c832835 1384
93c74931
SC		 1385 if (!argp)
1386 return -EINVAL;
1387 heartbeat = readl(&h->cfgtable->HeartBeat);
1388 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1389 return -EFAULT;
1390 return 0;
1391}
0a9279cc 1392
d18dfad4
SC		 1393static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1394{
1395 BusTypes_type BusTypes;
7c832835 1396
d18dfad4
SC		 1397 if (!argp)
1398 return -EINVAL;
1399 BusTypes = readl(&h->cfgtable->BusTypes);
1400 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1401 return -EFAULT;
1402 return 0;
1403}
1404
8a4f7fbf
SC		 1405static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1406{
1407 FirmwareVer_type firmware;
1408
1409 if (!argp)
1410 return -EINVAL;
1411 memcpy(firmware, h->firm_ver, 4);
1412
1413 if (copy_to_user
1414 (argp, firmware, sizeof(FirmwareVer_type)))
1415 return -EFAULT;
1416 return 0;
1417}
1418
c525919d
SC		 1419static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1420{
1421 DriverVer_type DriverVer = DRIVER_VERSION;
1422
1423 if (!argp)
1424 return -EINVAL;
1425 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1426 return -EFAULT;
1427 return 0;
1428}
1429
0894b32c
SC		 1430static int cciss_getluninfo(ctlr_info_t *h,
1431 struct gendisk *disk, void __user *argp)
1432{
1433 LogvolInfo_struct luninfo;
1434 drive_info_struct *drv = get_drv(disk);
1435
1436 if (!argp)
1437 return -EINVAL;
1438 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1439 luninfo.num_opens = drv->usage_count;
1440 luninfo.num_parts = 0;
1441 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1442 return -EFAULT;
1443 return 0;
1444}
1445
f32f125b
SC		 1446static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1447{
1448 IOCTL_Command_struct iocommand;
1449 CommandList_struct *c;
1450 char *buff = NULL;
1451 u64bit temp64;
1452 DECLARE_COMPLETION_ONSTACK(wait);
1453
1454 if (!argp)
1455 return -EINVAL;
1456
1457 if (!capable(CAP_SYS_RAWIO))
1458 return -EPERM;
1459
1460 if (copy_from_user
1461 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1462 return -EFAULT;
1463 if ((iocommand.buf_size < 1) &&
1464 (iocommand.Request.Type.Direction != XFER_NONE)) {
1465 return -EINVAL;
1466 }
1467 if (iocommand.buf_size > 0) {
1468 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1469 if (buff == NULL)
1470 return -EFAULT;
1471 }
1472 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1473 /* Copy the data into the buffer we created */
1474 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1475 kfree(buff);
1476 return -EFAULT;
1477 }
1478 } else {
1479 memset(buff, 0, iocommand.buf_size);
1480 }
1481 c = cmd_special_alloc(h);
1482 if (!c) {
1483 kfree(buff);
1484 return -ENOMEM;
1485 }
1486 /* Fill in the command type */
1487 c->cmd_type = CMD_IOCTL_PEND;
1488 /* Fill in Command Header */
1489 c->Header.ReplyQueue = 0; /* unused in simple mode */
1490 if (iocommand.buf_size > 0) { /* buffer to fill */
1491 c->Header.SGList = 1;
1492 c->Header.SGTotal = 1;
1493 } else { /* no buffers to fill */
1494 c->Header.SGList = 0;
1495 c->Header.SGTotal = 0;
1496 }
1497 c->Header.LUN = iocommand.LUN_info;
1498 /* use the kernel address the cmd block for tag */
1499 c->Header.Tag.lower = c->busaddr;
1500
1501 /* Fill in Request block */
1502 c->Request = iocommand.Request;
1503
1504 /* Fill in the scatter gather information */
1505 if (iocommand.buf_size > 0) {
1506 temp64.val = pci_map_single(h->pdev, buff,
1507 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1508 c->SG[0].Addr.lower = temp64.val32.lower;
1509 c->SG[0].Addr.upper = temp64.val32.upper;
1510 c->SG[0].Len = iocommand.buf_size;
1511 c->SG[0].Ext = 0; /* we are not chaining */
1512 }
1513 c->waiting = &wait;
1514
1515 enqueue_cmd_and_start_io(h, c);
1516 wait_for_completion(&wait);
1517
1518 /* unlock the buffers from DMA */
1519 temp64.val32.lower = c->SG[0].Addr.lower;
1520 temp64.val32.upper = c->SG[0].Addr.upper;
1521 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1522 PCI_DMA_BIDIRECTIONAL);
1523 check_ioctl_unit_attention(h, c);
1524
1525 /* Copy the error information out */
1526 iocommand.error_info = *(c->err_info);
1527 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1528 kfree(buff);
1529 cmd_special_free(h, c);
1530 return -EFAULT;
1531 }
1532
1533 if (iocommand.Request.Type.Direction == XFER_READ) {
1534 /* Copy the data out of the buffer we created */
1535 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1536 kfree(buff);
6b4d96b8 1537 cmd_special_free(h, c);
f32f125b 1538 return -EFAULT;
1da177e4 1539 }
f32f125b
SC		 1540 }
1541 kfree(buff);
1542 cmd_special_free(h, c);
1543 return 0;
1544}
1545
0c9f5ba7
SC		 1546static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1547{
1548 BIG_IOCTL_Command_struct *ioc;
1549 CommandList_struct *c;
1550 unsigned char **buff = NULL;
1551 int *buff_size = NULL;
1552 u64bit temp64;
1553 BYTE sg_used = 0;
1554 int status = 0;
1555 int i;
1556 DECLARE_COMPLETION_ONSTACK(wait);
1557 __u32 left;
1558 __u32 sz;
1559 BYTE __user *data_ptr;
1560
1561 if (!argp)
1562 return -EINVAL;
1563 if (!capable(CAP_SYS_RAWIO))
1564 return -EPERM;
fcab1c11 1565 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
0c9f5ba7
SC		 1566 if (!ioc) {
1567 status = -ENOMEM;
1568 goto cleanup1;
1569 }
1570 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1571 status = -EFAULT;
1572 goto cleanup1;
1573 }
1574 if ((ioc->buf_size < 1) &&
1575 (ioc->Request.Type.Direction != XFER_NONE)) {
1576 status = -EINVAL;
1577 goto cleanup1;
1578 }
1579 /* Check kmalloc limits using all SGs */
1580 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1581 status = -EINVAL;
1582 goto cleanup1;
1583 }
1584 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1585 status = -EINVAL;
1586 goto cleanup1;
1587 }
1588 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1589 if (!buff) {
1590 status = -ENOMEM;
1591 goto cleanup1;
1592 }
1593 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1594 if (!buff_size) {
1595 status = -ENOMEM;
1596 goto cleanup1;
1597 }
1598 left = ioc->buf_size;
1599 data_ptr = ioc->buf;
1600 while (left) {
1601 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1602 buff_size[sg_used] = sz;
1603 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1604 if (buff[sg_used] == NULL) {
1605 status = -ENOMEM;
1606 goto cleanup1;
1607 }
1608 if (ioc->Request.Type.Direction == XFER_WRITE) {
1609 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1610 status = -EFAULT;
1611 goto cleanup1;
1612 }
0c9f5ba7
SC		 1613 } else {
1614 memset(buff[sg_used], 0, sz);
1615 }
1616 left -= sz;
1617 data_ptr += sz;
1618 sg_used++;
1619 }
1620 c = cmd_special_alloc(h);
1621 if (!c) {
1622 status = -ENOMEM;
1623 goto cleanup1;
1624 }
1625 c->cmd_type = CMD_IOCTL_PEND;
1626 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1627 c->Header.SGList = sg_used;
1628 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1629 c->Header.LUN = ioc->LUN_info;
1630 c->Header.Tag.lower = c->busaddr;
1631
1632 c->Request = ioc->Request;
fcfb5c0c
SC		 1633 for (i = 0; i < sg_used; i++) {
1634 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1635 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1636 c->SG[i].Addr.lower = temp64.val32.lower;
1637 c->SG[i].Addr.upper = temp64.val32.upper;
1638 c->SG[i].Len = buff_size[i];
1639 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1640 }
1641 c->waiting = &wait;
1642 enqueue_cmd_and_start_io(h, c);
1643 wait_for_completion(&wait);
1644 /* unlock the buffers from DMA */
1645 for (i = 0; i < sg_used; i++) {
1646 temp64.val32.lower = c->SG[i].Addr.lower;
1647 temp64.val32.upper = c->SG[i].Addr.upper;
1648 pci_unmap_single(h->pdev,
1649 (dma_addr_t) temp64.val, buff_size[i],
1650 PCI_DMA_BIDIRECTIONAL);
1651 }
1652 check_ioctl_unit_attention(h, c);
1653 /* Copy the error information out */
1654 ioc->error_info = *(c->err_info);
1655 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1656 cmd_special_free(h, c);
1657 status = -EFAULT;
1658 goto cleanup1;
1659 }
1660 if (ioc->Request.Type.Direction == XFER_READ) {
1661 /* Copy the data out of the buffer we created */
1662 BYTE __user *ptr = ioc->buf;
1663 for (i = 0; i < sg_used; i++) {
1664 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1665 cmd_special_free(h, c);
7c832835
BH		 1666 status = -EFAULT;
1667 goto cleanup1;
1668 }
0c9f5ba7 1669 ptr += buff_size[i];
1da177e4 1670 }
0c9f5ba7
SC		 1671 }
1672 cmd_special_free(h, c);
1673 status = 0;
1674cleanup1:
1675 if (buff) {
1676 for (i = 0; i < sg_used; i++)
1677 kfree(buff[i]);
1678 kfree(buff);
1679 }
1680 kfree(buff_size);
1681 kfree(ioc);
1682 return status;
1683}
1684
ef7822c2 1685static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1686 unsigned int cmd, unsigned long arg)
1da177e4 1687{
1da177e4 1688 struct gendisk *disk = bdev->bd_disk;
f70dba83 1689 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1690 void __user *argp = (void __user *)arg;
1691
b2a4a43d
SC		 1692 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1693 cmd, arg);
7c832835 1694 switch (cmd) {
1da177e4 1695 case CCISS_GETPCIINFO:
0a25a5ae 1696 return cciss_getpciinfo(h, argp);
1da177e4 1697 case CCISS_GETINTINFO:
576e661c 1698 return cciss_getintinfo(h, argp);
1da177e4 1699 case CCISS_SETINTINFO:
4c800eed 1700 return cciss_setintinfo(h, argp);
1da177e4 1701 case CCISS_GETNODENAME:
25216109 1702 return cciss_getnodename(h, argp);
1da177e4 1703 case CCISS_SETNODENAME:
4f43f32c 1704 return cciss_setnodename(h, argp);
1da177e4 1705 case CCISS_GETHEARTBEAT:
93c74931 1706 return cciss_getheartbeat(h, argp);
1da177e4 1707 case CCISS_GETBUSTYPES:
d18dfad4 1708 return cciss_getbustypes(h, argp);
1da177e4 1709 case CCISS_GETFIRMVER:
8a4f7fbf 1710 return cciss_getfirmver(h, argp);
7c832835 1711 case CCISS_GETDRIVVER:
c525919d 1712 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1713 case CCISS_DEREGDISK:
1714 case CCISS_REGNEWD:
1da177e4 1715 case CCISS_REVALIDVOLS:
f70dba83 1716 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1717 case CCISS_GETLUNINFO:
1718 return cciss_getluninfo(h, disk, argp);
1da177e4 1719 case CCISS_PASSTHRU:
f32f125b 1720 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1721 case CCISS_BIG_PASSTHRU:
1722 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1723
1724 /* scsi_cmd_ioctl handles these, below, though some are not */
1725 /* very meaningful for cciss. SG_IO is the main one people want. */
1726
1727 case SG_GET_VERSION_NUM:
1728 case SG_SET_TIMEOUT:
1729 case SG_GET_TIMEOUT:
1730 case SG_GET_RESERVED_SIZE:
1731 case SG_SET_RESERVED_SIZE:
1732 case SG_EMULATED_HOST:
1733 case SG_IO:
1734 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1735 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1736
1737 /* scsi_cmd_ioctl would normally handle these, below, but */
1738 /* they aren't a good fit for cciss, as CD-ROMs are */
1739 /* not supported, and we don't have any bus/target/lun */
1740 /* which we present to the kernel. */
1741
1742 case CDROM_SEND_PACKET:
1743 case CDROMCLOSETRAY:
1744 case CDROMEJECT:
1745 case SCSI_IOCTL_GET_IDLUN:
1746 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1747 default:
1748 return -ENOTTY;
1749 }
1da177e4
LT		 1750}
1751
7b30f092
JA		 1752static void cciss_check_queues(ctlr_info_t *h)
1753{
1754 int start_queue = h->next_to_run;
1755 int i;
1756
1757 /* check to see if we have maxed out the number of commands that can
1758 * be placed on the queue. If so then exit. We do this check here
1759 * in case the interrupt we serviced was from an ioctl and did not
1760 * free any new commands.
1761 */
f880632f 1762 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1763 return;
1764
1765 /* We have room on the queue for more commands. Now we need to queue
1766 * them up. We will also keep track of the next queue to run so
1767 * that every queue gets a chance to be started first.
1768 */
1769 for (i = 0; i < h->highest_lun + 1; i++) {
1770 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1771 /* make sure the disk has been added and the drive is real
1772 * because this can be called from the middle of init_one.
1773 */
9cef0d2f
SC		 1774 if (!h->drv[curr_queue])
1775 continue;
1776 if (!(h->drv[curr_queue]->queue) ||
1777 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1778 continue;
1779 blk_start_queue(h->gendisk[curr_queue]->queue);
1780
1781 /* check to see if we have maxed out the number of commands
1782 * that can be placed on the queue.
1783 */
f880632f 1784 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1785 if (curr_queue == start_queue) {
1786 h->next_to_run =
1787 (start_queue + 1) % (h->highest_lun + 1);
1788 break;
1789 } else {
1790 h->next_to_run = curr_queue;
1791 break;
1792 }
7b30f092
JA		 1793 }
1794 }
1795}
1796
ca1e0484
MM		 1797static void cciss_softirq_done(struct request *rq)
1798{
f70dba83
SC		 1799 CommandList_struct *c = rq->completion_data;
1800 ctlr_info_t *h = hba[c->ctlr];
1801 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1802 u64bit temp64;
664a717d 1803 unsigned long flags;
ca1e0484 1804 int i, ddir;
5c07a311 1805 int sg_index = 0;
ca1e0484 1806
f70dba83 1807 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1808 ddir = PCI_DMA_FROMDEVICE;
1809 else
1810 ddir = PCI_DMA_TODEVICE;
1811
1812 /* command did not need to be retried */
1813 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1814 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1815 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1816 cciss_unmap_sg_chain_block(h, c);
5c07a311 1817 /* Point to the next block */
f70dba83 1818 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1819 sg_index = 0;
1820 }
1821 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1822 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1823 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1824 ddir);
1825 ++sg_index;
ca1e0484
MM		 1826 }
1827
b2a4a43d 1828 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1829
c3a4d78c 1830 /* set the residual count for pc requests */
33659ebb 1831 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1832 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1833
c3a4d78c 1834 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1835
ca1e0484 1836 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1837 cmd_free(h, c);
7b30f092 1838 cciss_check_queues(h);
ca1e0484
MM		 1839 spin_unlock_irqrestore(&h->lock, flags);
1840}
1841
39ccf9a6
SC		 1842static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1843 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1844{
9cef0d2f
SC		 1845 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1846 sizeof(h->drv[log_unit]->LunID));
b57695fe 1847}
1848
7fe06326
AP		 1849/* This function gets the SCSI vendor, model, and revision of a logical drive
1850 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1851 * they cannot be read.
1852 */
f70dba83 1853static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1854 char *vendor, char *model, char *rev)
1855{
1856 int rc;
1857 InquiryData_struct *inq_buf;
b57695fe 1858 unsigned char scsi3addr[8];
7fe06326
AP		 1859
1860 *vendor = '\0';
1861 *model = '\0';
1862 *rev = '\0';
1863
1864 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1865 if (!inq_buf)
1866 return;
1867
f70dba83
SC		 1868 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1869 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1870 scsi3addr, TYPE_CMD);
7fe06326
AP		 1871 if (rc == IO_OK) {
1872 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1873 vendor[VENDOR_LEN] = '\0';
1874 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1875 model[MODEL_LEN] = '\0';
1876 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1877 rev[REV_LEN] = '\0';
1878 }
1879
1880 kfree(inq_buf);
1881 return;
1882}
1883
a72da29b
MM		 1884/* This function gets the serial number of a logical drive via
1885 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1886 * number cannot be had, for whatever reason, 16 bytes of 0xff
1887 * are returned instead.
1888 */
f70dba83 1889static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1890 unsigned char *serial_no, int buflen)
1891{
1892#define PAGE_83_INQ_BYTES 64
1893 int rc;
1894 unsigned char *buf;
b57695fe 1895 unsigned char scsi3addr[8];
a72da29b
MM		 1896
1897 if (buflen > 16)
1898 buflen = 16;
1899 memset(serial_no, 0xff, buflen);
1900 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1901 if (!buf)
1902 return;
1903 memset(serial_no, 0, buflen);
f70dba83
SC		 1904 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1905 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1906 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1907 if (rc == IO_OK)
1908 memcpy(serial_no, &buf[8], buflen);
1909 kfree(buf);
1910 return;
1911}
1912
617e1344
SC		 1913/*
1914 * cciss_add_disk sets up the block device queue for a logical drive
1915 */
1916static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1917 int drv_index)
1918{
1919 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1920 if (!disk->queue)
1921 goto init_queue_failure;
6ae5ce8e
MM		 1922 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1923 disk->major = h->major;
1924 disk->first_minor = drv_index << NWD_SHIFT;
1925 disk->fops = &cciss_fops;
9cef0d2f
SC		 1926 if (cciss_create_ld_sysfs_entry(h, drv_index))
1927 goto cleanup_queue;
1928 disk->private_data = h->drv[drv_index];
1929 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1930
1931 /* Set up queue information */
1932 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1933
1934 /* This is a hardware imposed limit. */
8a78362c 1935 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1936
086fa5ff 1937 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1938
1939 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1940
1941 disk->queue->queuedata = h;
1942
e1defc4f 1943 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1944 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1945
1946 /* Make sure all queue data is written out before */
9cef0d2f 1947 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1948 /* allows the interrupt handler to start the queue */
1949 wmb();
9cef0d2f 1950 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1951 add_disk(disk);
617e1344
SC		 1952 return 0;
1953
1954cleanup_queue:
1955 blk_cleanup_queue(disk->queue);
1956 disk->queue = NULL;
e8074f79 1957init_queue_failure:
617e1344 1958 return -1;
6ae5ce8e
MM		 1959}
1960
ddd47442 1961/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1962 * If the usage_count is zero and it is a heretofore unknown drive, or,
1963 * the drive's capacity, geometry, or serial number has changed,
1964 * then the drive information will be updated and the disk will be
1965 * re-registered with the kernel. If these conditions don't hold,
1966 * then it will be left alone for the next reboot. The exception to this
1967 * is disk 0 which will always be left registered with the kernel since it
1968 * is also the controller node. Any changes to disk 0 will show up on
1969 * the next reboot.
7c832835 1970 */
f70dba83
SC		 1971static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1972 int first_time, int via_ioctl)
7c832835 1973{
ddd47442 1974 struct gendisk *disk;
ddd47442
MM		 1975 InquiryData_struct *inq_buff = NULL;
1976 unsigned int block_size;
00988a35 1977 sector_t total_size;
ddd47442
MM		 1978 unsigned long flags = 0;
1979 int ret = 0;
a72da29b
MM		 1980 drive_info_struct *drvinfo;
1981
1982 /* Get information about the disk and modify the driver structure */
1983 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1984 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1985 if (inq_buff == NULL || drvinfo == NULL)
1986 goto mem_msg;
1987
1988 /* testing to see if 16-byte CDBs are already being used */
1989 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1990 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1991 &total_size, &block_size);
1992
1993 } else {
f70dba83 1994 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1995 /* if read_capacity returns all F's this volume is >2TB */
1996 /* in size so we switch to 16-byte CDB's for all */
1997 /* read/write ops */
1998 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1999 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2000 &total_size, &block_size);
2001 h->cciss_read = CCISS_READ_16;
2002 h->cciss_write = CCISS_WRITE_16;
2003 } else {
2004 h->cciss_read = CCISS_READ_10;
2005 h->cciss_write = CCISS_WRITE_10;
2006 }
2007 }
2008
f70dba83 2009 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 2010 inq_buff, drvinfo);
2011 drvinfo->block_size = block_size;
2012 drvinfo->nr_blocks = total_size + 1;
2013
f70dba83 2014 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 2015 drvinfo->model, drvinfo->rev);
f70dba83 2016 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 2017 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 2018 /* Save the lunid in case we deregister the disk, below. */
2019 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2020 sizeof(drvinfo->LunID));
a72da29b
MM		 2021
2022 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 2023 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 2024 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 2025 h->drv[drv_index]->serial_no, 16) == 0) &&
2026 drvinfo->block_size == h->drv[drv_index]->block_size &&
2027 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2028 drvinfo->heads == h->drv[drv_index]->heads &&
2029 drvinfo->sectors == h->drv[drv_index]->sectors &&
2030 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2031 /* The disk is unchanged, nothing to update */
2032 goto freeret;
a72da29b 2033
6ae5ce8e
MM		 2034 /* If we get here it's not the same disk, or something's changed,
2035 * so we need to * deregister it, and re-register it, if it's not
2036 * in use.
2037 * If the disk already exists then deregister it before proceeding
2038 * (unless it's the first disk (for the controller node).
2039 */
9cef0d2f 2040 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2041 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2042 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2043 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2044 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2045
9cef0d2f 2046 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2047 * which keeps the interrupt handler from starting
2048 * the queue.
2049 */
2d11d993 2050 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2051 }
2052
2053 /* If the disk is in use return */
2054 if (ret)
a72da29b
MM		 2055 goto freeret;
2056
6ae5ce8e 2057 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2058 * and serial number inquiry. If the disk was deregistered
2059 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2060 */
9cef0d2f
SC		 2061 if (h->drv[drv_index] == NULL) {
2062 drvinfo->device_initialized = 0;
2063 h->drv[drv_index] = drvinfo;
2064 drvinfo = NULL; /* so it won't be freed below. */
2065 } else {
2066 /* special case for cxd0 */
2067 h->drv[drv_index]->block_size = drvinfo->block_size;
2068 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2069 h->drv[drv_index]->heads = drvinfo->heads;
2070 h->drv[drv_index]->sectors = drvinfo->sectors;
2071 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2072 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2073 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2074 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2075 VENDOR_LEN + 1);
2076 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2077 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2078 }
ddd47442
MM		 2079
2080 ++h->num_luns;
2081 disk = h->gendisk[drv_index];
9cef0d2f 2082 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2083
6ae5ce8e
MM		 2084 /* If it's not disk 0 (drv_index != 0)
2085 * or if it was disk 0, but there was previously
2086 * no actual corresponding configured logical drive
2087 * (raid_leve == -1) then we want to update the
2088 * logical drive's information.
2089 */
361e9b07
SC		 2090 if (drv_index || first_time) {
2091 if (cciss_add_disk(h, disk, drv_index) != 0) {
2092 cciss_free_gendisk(h, drv_index);
9cef0d2f 2093 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2094 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2095 drv_index);
361e9b07
SC		 2096 --h->num_luns;
2097 }
2098 }
ddd47442 2099
6ae5ce8e 2100freeret:
ddd47442 2101 kfree(inq_buff);
a72da29b 2102 kfree(drvinfo);
ddd47442 2103 return;
6ae5ce8e 2104mem_msg:
b2a4a43d 2105 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2106 goto freeret;
2107}
2108
2109/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2110 * that has a null drv pointer and allocate the drive info struct and
2111 * will return that index This is where new drives will be added.
2112 * If the index to be returned is greater than the highest_lun index for
2113 * the controller then highest_lun is set * to this new index.
2114 * If there are no available indexes or if tha allocation fails, then -1
2115 * is returned. * "controller_node" is used to know if this is a real
2116 * logical drive, or just the controller node, which determines if this
2117 * counts towards highest_lun.
7c832835 2118 */
9cef0d2f 2119static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2120{
2121 int i;
9cef0d2f 2122 drive_info_struct *drv;
ddd47442 2123
9cef0d2f 2124 /* Search for an empty slot for our drive info */
7c832835 2125 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2126
2127 /* if not cxd0 case, and it's occupied, skip it. */
2128 if (h->drv[i] && i != 0)
2129 continue;
2130 /*
2131 * If it's cxd0 case, and drv is alloc'ed already, and a
2132 * disk is configured there, skip it.
2133 */
2134 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2135 continue;
2136
2137 /*
2138 * We've found an empty slot. Update highest_lun
2139 * provided this isn't just the fake cxd0 controller node.
2140 */
2141 if (i > h->highest_lun && !controller_node)
2142 h->highest_lun = i;
2143
2144 /* If adding a real disk at cxd0, and it's already alloc'ed */
2145 if (i == 0 && h->drv[i] != NULL)
ddd47442 2146 return i;
9cef0d2f
SC		 2147
2148 /*
2149 * Found an empty slot, not already alloc'ed. Allocate it.
2150 * Mark it with raid_level == -1, so we know it's new later on.
2151 */
2152 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2153 if (!drv)
2154 return -1;
2155 drv->raid_level = -1; /* so we know it's new */
2156 h->drv[i] = drv;
2157 return i;
ddd47442
MM		 2158 }
2159 return -1;
2160}
2161
9cef0d2f
SC		 2162static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2163{
2164 kfree(h->drv[drv_index]);
2165 h->drv[drv_index] = NULL;
2166}
2167
361e9b07
SC		 2168static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2169{
2170 put_disk(h->gendisk[drv_index]);
2171 h->gendisk[drv_index] = NULL;
2172}
2173
6ae5ce8e
MM		 2174/* cciss_add_gendisk finds a free hba[]->drv structure
2175 * and allocates a gendisk if needed, and sets the lunid
2176 * in the drvinfo structure. It returns the index into
2177 * the ->drv[] array, or -1 if none are free.
2178 * is_controller_node indicates whether highest_lun should
2179 * count this disk, or if it's only being added to provide
2180 * a means to talk to the controller in case no logical
2181 * drives have yet been configured.
2182 */
39ccf9a6
SC		 2183static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2184 int controller_node)
6ae5ce8e
MM		 2185{
2186 int drv_index;
2187
9cef0d2f 2188 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2189 if (drv_index == -1)
2190 return -1;
8ce51966 2191
6ae5ce8e
MM		 2192 /*Check if the gendisk needs to be allocated */
2193 if (!h->gendisk[drv_index]) {
2194 h->gendisk[drv_index] =
2195 alloc_disk(1 << NWD_SHIFT);
2196 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2197 dev_err(&h->pdev->dev,
2198 "could not allocate a new disk %d\n",
2199 drv_index);
9cef0d2f 2200 goto err_free_drive_info;
6ae5ce8e
MM		 2201 }
2202 }
9cef0d2f
SC		 2203 memcpy(h->drv[drv_index]->LunID, lunid,
2204 sizeof(h->drv[drv_index]->LunID));
2205 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2206 goto err_free_disk;
6ae5ce8e
MM		 2207 /* Don't need to mark this busy because nobody */
2208 /* else knows about this disk yet to contend */
2209 /* for access to it. */
9cef0d2f 2210 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2211 wmb();
2212 return drv_index;
7fe06326
AP		 2213
2214err_free_disk:
361e9b07 2215 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2216err_free_drive_info:
2217 cciss_free_drive_info(h, drv_index);
7fe06326 2218 return -1;
6ae5ce8e
MM		 2219}
2220
2221/* This is for the special case of a controller which
2222 * has no logical drives. In this case, we still need
2223 * to register a disk so the controller can be accessed
2224 * by the Array Config Utility.
2225 */
2226static void cciss_add_controller_node(ctlr_info_t *h)
2227{
2228 struct gendisk *disk;
2229 int drv_index;
2230
2231 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2232 return;
2233
39ccf9a6 2234 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2235 if (drv_index == -1)
2236 goto error;
9cef0d2f
SC		 2237 h->drv[drv_index]->block_size = 512;
2238 h->drv[drv_index]->nr_blocks = 0;
2239 h->drv[drv_index]->heads = 0;
2240 h->drv[drv_index]->sectors = 0;
2241 h->drv[drv_index]->cylinders = 0;
2242 h->drv[drv_index]->raid_level = -1;
2243 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2244 disk = h->gendisk[drv_index];
361e9b07
SC		 2245 if (cciss_add_disk(h, disk, drv_index) == 0)
2246 return;
2247 cciss_free_gendisk(h, drv_index);
9cef0d2f 2248 cciss_free_drive_info(h, drv_index);
361e9b07 2249error:
b2a4a43d 2250 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2251 return;
6ae5ce8e
MM		 2252}
2253
ddd47442 2254/* This function will add and remove logical drives from the Logical
d14c4ab5 2255 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2256 * so that mount points are preserved until the next reboot. This allows
2257 * for the removal of logical drives in the middle of the drive array
2258 * without a re-ordering of those drives.
2259 * INPUT
2260 * h = The controller to perform the operations on
7c832835 2261 */
2d11d993
SC		 2262static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2263 int via_ioctl)
1da177e4 2264{
ddd47442
MM		 2265 int num_luns;
2266 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2267 int return_code;
2268 int listlength = 0;
2269 int i;
2270 int drv_found;
2271 int drv_index = 0;
39ccf9a6 2272 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2273 unsigned long flags;
ddd47442 2274
6ae5ce8e
MM		 2275 if (!capable(CAP_SYS_RAWIO))
2276 return -EPERM;
2277
ddd47442 2278 /* Set busy_configuring flag for this operation */
f70dba83 2279 spin_lock_irqsave(&h->lock, flags);
7c832835 2280 if (h->busy_configuring) {
f70dba83 2281 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2282 return -EBUSY;
2283 }
2284 h->busy_configuring = 1;
f70dba83 2285 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2286
a72da29b
MM		 2287 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2288 if (ld_buff == NULL)
2289 goto mem_msg;
2290
f70dba83 2291 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2292 sizeof(ReportLunData_struct),
2293 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2294
a72da29b
MM		 2295 if (return_code == IO_OK)
2296 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2297 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2298 dev_warn(&h->pdev->dev,
2299 "report logical volume command failed\n");
a72da29b
MM		 2300 listlength = 0;
2301 goto freeret;
2302 }
2303
2304 num_luns = listlength / 8; /* 8 bytes per entry */
2305 if (num_luns > CISS_MAX_LUN) {
2306 num_luns = CISS_MAX_LUN;
b2a4a43d 2307 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2308 " on controller than can be handled by"
2309 " this driver.\n");
2310 }
2311
6ae5ce8e
MM		 2312 if (num_luns == 0)
2313 cciss_add_controller_node(h);
2314
2315 /* Compare controller drive array to driver's drive array
2316 * to see if any drives are missing on the controller due
2317 * to action of Array Config Utility (user deletes drive)
2318 * and deregister logical drives which have disappeared.
2319 */
a72da29b
MM		 2320 for (i = 0; i <= h->highest_lun; i++) {
2321 int j;
2322 drv_found = 0;
d8a0be6a
SC		 2323
2324 /* skip holes in the array from already deleted drives */
9cef0d2f 2325 if (h->drv[i] == NULL)
d8a0be6a
SC		 2326 continue;
2327
a72da29b 2328 for (j = 0; j < num_luns; j++) {
39ccf9a6 2329 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2330 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2331 sizeof(lunid)) == 0) {
a72da29b
MM		 2332 drv_found = 1;
2333 break;
2334 }
2335 }
2336 if (!drv_found) {
2337 /* Deregister it from the OS, it's gone. */
f70dba83 2338 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2339 h->drv[i]->busy_configuring = 1;
f70dba83 2340 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2341 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2342 if (h->drv[i] != NULL)
2343 h->drv[i]->busy_configuring = 0;
ddd47442 2344 }
a72da29b 2345 }
ddd47442 2346
a72da29b
MM		 2347 /* Compare controller drive array to driver's drive array.
2348 * Check for updates in the drive information and any new drives
2349 * on the controller due to ACU adding logical drives, or changing
2350 * a logical drive's size, etc. Reregister any new/changed drives
2351 */
2352 for (i = 0; i < num_luns; i++) {
2353 int j;
ddd47442 2354
a72da29b 2355 drv_found = 0;
ddd47442 2356
39ccf9a6 2357 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2358 /* Find if the LUN is already in the drive array
2359 * of the driver. If so then update its info
2360 * if not in use. If it does not exist then find
2361 * the first free index and add it.
2362 */
2363 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2364 if (h->drv[j] != NULL &&
2365 memcmp(h->drv[j]->LunID, lunid,
2366 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2367 drv_index = j;
2368 drv_found = 1;
2369 break;
ddd47442 2370 }
a72da29b 2371 }
ddd47442 2372
a72da29b
MM		 2373 /* check if the drive was found already in the array */
2374 if (!drv_found) {
eece695f 2375 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2376 if (drv_index == -1)
2377 goto freeret;
a72da29b 2378 }
f70dba83 2379 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2380 } /* end for */
ddd47442 2381
6ae5ce8e 2382freeret:
ddd47442
MM		 2383 kfree(ld_buff);
2384 h->busy_configuring = 0;
2385 /* We return -1 here to tell the ACU that we have registered/updated
2386 * all of the drives that we can and to keep it from calling us
2387 * additional times.
7c832835 2388 */
ddd47442 2389 return -1;
6ae5ce8e 2390mem_msg:
b2a4a43d 2391 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2392 h->busy_configuring = 0;
ddd47442
MM		 2393 goto freeret;
2394}
2395
9ddb27b4
SC		 2396static void cciss_clear_drive_info(drive_info_struct *drive_info)
2397{
2398 /* zero out the disk size info */
2399 drive_info->nr_blocks = 0;
2400 drive_info->block_size = 0;
2401 drive_info->heads = 0;
2402 drive_info->sectors = 0;
2403 drive_info->cylinders = 0;
2404 drive_info->raid_level = -1;
2405 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2406 memset(drive_info->model, 0, sizeof(drive_info->model));
2407 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2408 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2409 /*
2410 * don't clear the LUNID though, we need to remember which
2411 * one this one is.
2412 */
2413}
2414
ddd47442
MM		 2415/* This function will deregister the disk and it's queue from the
2416 * kernel. It must be called with the controller lock held and the
2417 * drv structures busy_configuring flag set. It's parameters are:
2418 *
2419 * disk = This is the disk to be deregistered
2420 * drv = This is the drive_info_struct associated with the disk to be
2421 * deregistered. It contains information about the disk used
2422 * by the driver.
2423 * clear_all = This flag determines whether or not the disk information
2424 * is going to be completely cleared out and the highest_lun
2425 * reset. Sometimes we want to clear out information about
d14c4ab5 2426 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2427 * the highest_lun should be left unchanged and the LunID
2428 * should not be cleared.
2d11d993
SC		 2429 * via_ioctl
2430 * This indicates whether we've reached this path via ioctl.
2431 * This affects the maximum usage count allowed for c0d0 to be messed with.
2432 * If this path is reached via ioctl(), then the max_usage_count will
2433 * be 1, as the process calling ioctl() has got to have the device open.
2434 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2435*/
a0ea8622 2436static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2437 int clear_all, int via_ioctl)
ddd47442 2438{
799202cb 2439 int i;
a0ea8622
SC		 2440 struct gendisk *disk;
2441 drive_info_struct *drv;
9cef0d2f 2442 int recalculate_highest_lun;
1da177e4
LT		 2443
2444 if (!capable(CAP_SYS_RAWIO))
2445 return -EPERM;
2446
9cef0d2f 2447 drv = h->drv[drv_index];
a0ea8622
SC		 2448 disk = h->gendisk[drv_index];
2449
1da177e4 2450 /* make sure logical volume is NOT is use */
7c832835 2451 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2452 if (drv->usage_count > via_ioctl)
7c832835
BH		 2453 return -EBUSY;
2454 } else if (drv->usage_count > 0)
2455 return -EBUSY;
1da177e4 2456
9cef0d2f
SC		 2457 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2458
ddd47442
MM		 2459 /* invalidate the devices and deregister the disk. If it is disk
2460 * zero do not deregister it but just zero out it's values. This
2461 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2462 */
2463 if (h->gendisk[0] != disk) {
5a9df732 2464 struct request_queue *q = disk->queue;
097d0264 2465 if (disk->flags & GENHD_FL_UP) {
8ce51966 2466 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2467 del_gendisk(disk);
5a9df732 2468 }
9cef0d2f 2469 if (q)
5a9df732 2470 blk_cleanup_queue(q);
5a9df732
AB		 2471 /* If clear_all is set then we are deleting the logical
2472 * drive, not just refreshing its info. For drives
2473 * other than disk 0 we will call put_disk. We do not
2474 * do this for disk 0 as we need it to be able to
2475 * configure the controller.
a72da29b 2476 */
5a9df732
AB		 2477 if (clear_all){
2478 /* This isn't pretty, but we need to find the
2479 * disk in our array and NULL our the pointer.
2480 * This is so that we will call alloc_disk if
2481 * this index is used again later.
a72da29b 2482 */
5a9df732 2483 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2484 if (h->gendisk[i] == disk) {
5a9df732
AB		 2485 h->gendisk[i] = NULL;
2486 break;
799202cb 2487 }
799202cb 2488 }
5a9df732 2489 put_disk(disk);
ddd47442 2490 }
799202cb
MM		 2491 } else {
2492 set_capacity(disk, 0);
9cef0d2f 2493 cciss_clear_drive_info(drv);
ddd47442
MM		 2494 }
2495
2496 --h->num_luns;
ddd47442 2497
9cef0d2f
SC		 2498 /* if it was the last disk, find the new hightest lun */
2499 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2500 int newhighest = -1;
9cef0d2f
SC		 2501 for (i = 0; i <= h->highest_lun; i++) {
2502 /* if the disk has size > 0, it is available */
2503 if (h->drv[i] && h->drv[i]->heads)
2504 newhighest = i;
1da177e4 2505 }
9cef0d2f 2506 h->highest_lun = newhighest;
ddd47442 2507 }
e2019b58 2508 return 0;
1da177e4 2509}
ddd47442 2510
f70dba83 2511static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2512 size_t size, __u8 page_code, unsigned char *scsi3addr,
2513 int cmd_type)
1da177e4 2514{
1da177e4
LT		 2515 u64bit buff_dma_handle;
2516 int status = IO_OK;
2517
2518 c->cmd_type = CMD_IOCTL_PEND;
2519 c->Header.ReplyQueue = 0;
7c832835 2520 if (buff != NULL) {
1da177e4 2521 c->Header.SGList = 1;
7c832835 2522 c->Header.SGTotal = 1;
1da177e4
LT		 2523 } else {
2524 c->Header.SGList = 0;
7c832835 2525 c->Header.SGTotal = 0;
1da177e4
LT		 2526 }
2527 c->Header.Tag.lower = c->busaddr;
b57695fe 2528 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2529
2530 c->Request.Type.Type = cmd_type;
2531 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2532 switch (cmd) {
2533 case CISS_INQUIRY:
1da177e4 2534 /* are we trying to read a vital product page */
7c832835 2535 if (page_code != 0) {
1da177e4
LT		 2536 c->Request.CDB[1] = 0x01;
2537 c->Request.CDB[2] = page_code;
2538 }
2539 c->Request.CDBLen = 6;
7c832835 2540 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2541 c->Request.Type.Direction = XFER_READ;
2542 c->Request.Timeout = 0;
7c832835
BH		 2543 c->Request.CDB[0] = CISS_INQUIRY;
2544 c->Request.CDB[4] = size & 0xFF;
2545 break;
1da177e4
LT		 2546 case CISS_REPORT_LOG:
2547 case CISS_REPORT_PHYS:
7c832835 2548 /* Talking to controller so It's a physical command
1da177e4 2549 mode = 00 target = 0. Nothing to write.
7c832835 2550 */
1da177e4
LT		 2551 c->Request.CDBLen = 12;
2552 c->Request.Type.Attribute = ATTR_SIMPLE;
2553 c->Request.Type.Direction = XFER_READ;
2554 c->Request.Timeout = 0;
2555 c->Request.CDB[0] = cmd;
b028461d 2556 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2557 c->Request.CDB[7] = (size >> 16) & 0xFF;
2558 c->Request.CDB[8] = (size >> 8) & 0xFF;
2559 c->Request.CDB[9] = size & 0xFF;
2560 break;
2561
2562 case CCISS_READ_CAPACITY:
1da177e4
LT		 2563 c->Request.CDBLen = 10;
2564 c->Request.Type.Attribute = ATTR_SIMPLE;
2565 c->Request.Type.Direction = XFER_READ;
2566 c->Request.Timeout = 0;
2567 c->Request.CDB[0] = cmd;
7c832835 2568 break;
00988a35 2569 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2570 c->Request.CDBLen = 16;
2571 c->Request.Type.Attribute = ATTR_SIMPLE;
2572 c->Request.Type.Direction = XFER_READ;
2573 c->Request.Timeout = 0;
2574 c->Request.CDB[0] = cmd;
2575 c->Request.CDB[1] = 0x10;
2576 c->Request.CDB[10] = (size >> 24) & 0xFF;
2577 c->Request.CDB[11] = (size >> 16) & 0xFF;
2578 c->Request.CDB[12] = (size >> 8) & 0xFF;
2579 c->Request.CDB[13] = size & 0xFF;
2580 c->Request.Timeout = 0;
2581 c->Request.CDB[0] = cmd;
2582 break;
1da177e4
LT		 2583 case CCISS_CACHE_FLUSH:
2584 c->Request.CDBLen = 12;
2585 c->Request.Type.Attribute = ATTR_SIMPLE;
2586 c->Request.Type.Direction = XFER_WRITE;
2587 c->Request.Timeout = 0;
2588 c->Request.CDB[0] = BMIC_WRITE;
2589 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2590 break;
88f627ae 2591 case TEST_UNIT_READY:
88f627ae
SC		 2592 c->Request.CDBLen = 6;
2593 c->Request.Type.Attribute = ATTR_SIMPLE;
2594 c->Request.Type.Direction = XFER_NONE;
2595 c->Request.Timeout = 0;
2596 break;
1da177e4 2597 default:
b2a4a43d 2598 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2599 return IO_ERROR;
1da177e4
LT		 2600 }
2601 } else if (cmd_type == TYPE_MSG) {
2602 switch (cmd) {
8f71bb82 2603 case CCISS_ABORT_MSG:
3da8b713 2604 c->Request.CDBLen = 12;
2605 c->Request.Type.Attribute = ATTR_SIMPLE;
2606 c->Request.Type.Direction = XFER_WRITE;
2607 c->Request.Timeout = 0;
7c832835
BH		 2608 c->Request.CDB[0] = cmd; /* abort */
2609 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2610 /* buff contains the tag of the command to abort */
2611 memcpy(&c->Request.CDB[4], buff, 8);
2612 break;
8f71bb82 2613 case CCISS_RESET_MSG:
88f627ae 2614 c->Request.CDBLen = 16;
3da8b713 2615 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2616 c->Request.Type.Direction = XFER_NONE;
3da8b713 2617 c->Request.Timeout = 0;
2618 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2619 c->Request.CDB[0] = cmd; /* reset */
8f71bb82 2620 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
00988a35 2621 break;
8f71bb82 2622 case CCISS_NOOP_MSG:
1da177e4
LT		 2623 c->Request.CDBLen = 1;
2624 c->Request.Type.Attribute = ATTR_SIMPLE;
2625 c->Request.Type.Direction = XFER_WRITE;
2626 c->Request.Timeout = 0;
2627 c->Request.CDB[0] = cmd;
2628 break;
2629 default:
b2a4a43d
SC		 2630 dev_warn(&h->pdev->dev,
2631 "unknown message type %d\n", cmd);
1da177e4
LT		 2632 return IO_ERROR;
2633 }
2634 } else {
b2a4a43d 2635 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2636 return IO_ERROR;
2637 }
2638 /* Fill in the scatter gather information */
2639 if (size > 0) {
2640 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2641 buff, size,
2642 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2643 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2644 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2645 c->SG[0].Len = size;
7c832835 2646 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2647 }
2648 return status;
2649}
7c832835 2650
edc83d47
JA		 2651static int __devinit cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2652 u8 reset_type)
2653{
2654 CommandList_struct *c;
2655 int return_status;
2656
2657 c = cmd_alloc(h);
2658 if (!c)
2659 return -ENOMEM;
2660 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2661 CTLR_LUNID, TYPE_MSG);
2662 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2663 if (return_status != IO_OK) {
2664 cmd_special_free(h, c);
2665 return return_status;
2666 }
2667 c->waiting = NULL;
2668 enqueue_cmd_and_start_io(h, c);
2669 /* Don't wait for completion, the reset won't complete. Don't free
2670 * the command either. This is the last command we will send before
2671 * re-initializing everything, so it doesn't matter and won't leak.
2672 */
2673 return 0;
2674}
2675
3c2ab402 2676static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2677{
2678 switch (c->err_info->ScsiStatus) {
2679 case SAM_STAT_GOOD:
2680 return IO_OK;
2681 case SAM_STAT_CHECK_CONDITION:
2682 switch (0xf & c->err_info->SenseInfo[2]) {
2683 case 0: return IO_OK; /* no sense */
2684 case 1: return IO_OK; /* recovered error */
2685 default:
c08fac65
SC		 2686 if (check_for_unit_attention(h, c))
2687 return IO_NEEDS_RETRY;
b2a4a43d 2688 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2689 "check condition, sense key = 0x%02x\n",
b2a4a43d 2690 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2691 }
2692 break;
2693 default:
b2a4a43d
SC		 2694 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2695 "scsi status = 0x%02x\n",
3c2ab402 2696 c->Request.CDB[0], c->err_info->ScsiStatus);
2697 break;
2698 }
2699 return IO_ERROR;
2700}
2701
789a424a 2702static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2703{
5390cfc3 2704 int return_status = IO_OK;
7c832835 2705
789a424a 2706 if (c->err_info->CommandStatus == CMD_SUCCESS)
2707 return IO_OK;
5390cfc3 2708
2709 switch (c->err_info->CommandStatus) {
2710 case CMD_TARGET_STATUS:
3c2ab402 2711 return_status = check_target_status(h, c);
5390cfc3 2712 break;
2713 case CMD_DATA_UNDERRUN:
2714 case CMD_DATA_OVERRUN:
2715 /* expected for inquiry and report lun commands */
2716 break;
2717 case CMD_INVALID:
b2a4a43d 2718 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2719 "reported invalid\n", c->Request.CDB[0]);
2720 return_status = IO_ERROR;
2721 break;
2722 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2723 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2724 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2725 return_status = IO_ERROR;
2726 break;
2727 case CMD_HARDWARE_ERR:
b2a4a43d 2728 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2729 " hardware error\n", c->Request.CDB[0]);
2730 return_status = IO_ERROR;
2731 break;
2732 case CMD_CONNECTION_LOST:
b2a4a43d 2733 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2734 "connection lost\n", c->Request.CDB[0]);
2735 return_status = IO_ERROR;
2736 break;
2737 case CMD_ABORTED:
b2a4a43d 2738 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2739 "aborted\n", c->Request.CDB[0]);
2740 return_status = IO_ERROR;
2741 break;
2742 case CMD_ABORT_FAILED:
b2a4a43d 2743 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2744 "abort failed\n", c->Request.CDB[0]);
2745 return_status = IO_ERROR;
2746 break;
2747 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2748 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2749 c->Request.CDB[0]);
789a424a 2750 return_status = IO_NEEDS_RETRY;
5390cfc3 2751 break;
6d9a4f9e
SC		 2752 case CMD_UNABORTABLE:
2753 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2754 return_status = IO_ERROR;
2755 break;
5390cfc3 2756 default:
b2a4a43d 2757 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2758 "unknown status %x\n", c->Request.CDB[0],
2759 c->err_info->CommandStatus);
2760 return_status = IO_ERROR;
7c832835 2761 }
789a424a 2762 return return_status;
2763}
2764
2765static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2766 int attempt_retry)
2767{
2768 DECLARE_COMPLETION_ONSTACK(wait);
2769 u64bit buff_dma_handle;
789a424a 2770 int return_status = IO_OK;
2771
2772resend_cmd2:
2773 c->waiting = &wait;
664a717d 2774 enqueue_cmd_and_start_io(h, c);
789a424a 2775
2776 wait_for_completion(&wait);
2777
2778 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2779 goto command_done;
2780
2781 return_status = process_sendcmd_error(h, c);
2782
2783 if (return_status == IO_NEEDS_RETRY &&
2784 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2785 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2786 c->Request.CDB[0]);
2787 c->retry_count++;
2788 /* erase the old error information */
2789 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2790 return_status = IO_OK;
2791 INIT_COMPLETION(wait);
2792 goto resend_cmd2;
2793 }
5390cfc3 2794
2795command_done:
1da177e4 2796 /* unlock the buffers from DMA */
bb2a37bf
MM		 2797 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2798 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2799 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2800 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2801 return return_status;
2802}
2803
f70dba83 2804static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2805 __u8 page_code, unsigned char scsi3addr[],
2806 int cmd_type)
5390cfc3 2807{
5390cfc3 2808 CommandList_struct *c;
2809 int return_status;
2810
6b4d96b8 2811 c = cmd_special_alloc(h);
5390cfc3 2812 if (!c)
2813 return -ENOMEM;
f70dba83 2814 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2815 scsi3addr, cmd_type);
5390cfc3 2816 if (return_status == IO_OK)
789a424a 2817 return_status = sendcmd_withirq_core(h, c, 1);
2818
6b4d96b8 2819 cmd_special_free(h, c);
7c832835 2820 return return_status;
1da177e4 2821}
7c832835 2822
f70dba83 2823static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2824 sector_t total_size,
7c832835
BH		 2825 unsigned int block_size,
2826 InquiryData_struct *inq_buff,
2827 drive_info_struct *drv)
1da177e4
LT		 2828{
2829 int return_code;
00988a35 2830 unsigned long t;
b57695fe 2831 unsigned char scsi3addr[8];
00988a35 2832
1da177e4 2833 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2834 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2835 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2836 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2837 if (return_code == IO_OK) {
7c832835 2838 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2839 dev_warn(&h->pdev->dev,
2840 "reading geometry failed, volume "
7c832835 2841 "does not support reading geometry\n");
1da177e4 2842 drv->heads = 255;
b028461d 2843 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2844 drv->cylinders = total_size + 1;
89f97ad1 2845 drv->raid_level = RAID_UNKNOWN;
1da177e4 2846 } else {
1da177e4
LT		 2847 drv->heads = inq_buff->data_byte[6];
2848 drv->sectors = inq_buff->data_byte[7];
2849 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2850 drv->cylinders += inq_buff->data_byte[5];
2851 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2852 }
2853 drv->block_size = block_size;
97c06978 2854 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2855 t = drv->heads * drv->sectors;
2856 if (t > 1) {
97c06978
MMOD		 2857 sector_t real_size = total_size + 1;
2858 unsigned long rem = sector_div(real_size, t);
3f7705ea 2859 if (rem)
97c06978
MMOD		 2860 real_size++;
2861 drv->cylinders = real_size;
1da177e4 2862 }
7c832835 2863 } else { /* Get geometry failed */
b2a4a43d 2864 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2865 }
1da177e4 2866}
7c832835 2867
1da177e4 2868static void
f70dba83 2869cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2870 unsigned int *block_size)
1da177e4 2871{
00988a35 2872 ReadCapdata_struct *buf;
1da177e4 2873 int return_code;
b57695fe 2874 unsigned char scsi3addr[8];
1aebe187
MK		 2875
2876 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2877 if (!buf) {
b2a4a43d 2878 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2879 return;
2880 }
1aebe187 2881
f70dba83
SC		 2882 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2883 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2884 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2885 if (return_code == IO_OK) {
4c1f2b31
AV		 2886 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2887 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2888 } else { /* read capacity command failed */
b2a4a43d 2889 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2890 *total_size = 0;
2891 *block_size = BLOCK_SIZE;
2892 }
00988a35 2893 kfree(buf);
00988a35
MMOD		 2894}
2895
f70dba83 2896static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2897 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2898{
2899 ReadCapdata_struct_16 *buf;
2900 int return_code;
b57695fe 2901 unsigned char scsi3addr[8];
1aebe187
MK		 2902
2903 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2904 if (!buf) {
b2a4a43d 2905 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2906 return;
2907 }
1aebe187 2908
f70dba83
SC		 2909 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2910 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2911 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2912 0, scsi3addr, TYPE_CMD);
00988a35 2913 if (return_code == IO_OK) {
4c1f2b31
AV		 2914 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2915 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2916 } else { /* read capacity command failed */
b2a4a43d 2917 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2918 *total_size = 0;
2919 *block_size = BLOCK_SIZE;
2920 }
b2a4a43d 2921 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2922 (unsigned long long)*total_size+1, *block_size);
00988a35 2923 kfree(buf);
1da177e4
LT		 2924}
2925
1da177e4
LT		 2926static int cciss_revalidate(struct gendisk *disk)
2927{
2928 ctlr_info_t *h = get_host(disk);
2929 drive_info_struct *drv = get_drv(disk);
2930 int logvol;
7c832835 2931 int FOUND = 0;
1da177e4 2932 unsigned int block_size;
00988a35 2933 sector_t total_size;
1da177e4
LT		 2934 InquiryData_struct *inq_buff = NULL;
2935
68264e9d 2936 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
0fc13c89 2937 if (!h->drv[logvol])
453434cf 2938 continue;
9cef0d2f 2939 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2940 sizeof(drv->LunID)) == 0) {
7c832835 2941 FOUND = 1;
1da177e4
LT		 2942 break;
2943 }
2944 }
2945
7c832835
BH		 2946 if (!FOUND)
2947 return 1;
1da177e4 2948
7c832835
BH		 2949 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2950 if (inq_buff == NULL) {
b2a4a43d 2951 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2952 return 1;
2953 }
00988a35 2954 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2955 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2956 &total_size, &block_size);
2957 } else {
f70dba83 2958 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2959 &total_size, &block_size);
2960 }
f70dba83 2961 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2962 inq_buff, drv);
1da177e4 2963
e1defc4f 2964 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2965 set_capacity(disk, drv->nr_blocks);
2966
1da177e4
LT		 2967 kfree(inq_buff);
2968 return 0;
2969}
2970
1da177e4
LT		 2971/*
2972 * Map (physical) PCI mem into (virtual) kernel space
2973 */
2974static void __iomem *remap_pci_mem(ulong base, ulong size)
2975{
7c832835
BH		 2976 ulong page_base = ((ulong) base) & PAGE_MASK;
2977 ulong page_offs = ((ulong) base) - page_base;
2978 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2979
7c832835 2980 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2981}
2982
7c832835
BH		 2983/*
2984 * Takes jobs of the Q and sends them to the hardware, then puts it on
2985 * the Q to wait for completion.
2986 */
2987static void start_io(ctlr_info_t *h)
1da177e4
LT		 2988{
2989 CommandList_struct *c;
7c832835 2990
e6e1ee93
JA		 2991 while (!list_empty(&h->reqQ)) {
2992 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 2993 /* can't do anything if fifo is full */
2994 if ((h->access.fifo_full(h))) {
b2a4a43d 2995 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2996 break;
2997 }
2998
7c832835 2999 /* Get the first entry from the Request Q */
8a3173de 3000 removeQ(c);
1da177e4 3001 h->Qdepth--;
7c832835
BH		 3002
3003 /* Tell the controller execute command */
1da177e4 3004 h->access.submit_command(h, c);
7c832835
BH		 3005
3006 /* Put job onto the completed Q */
8a3173de 3007 addQ(&h->cmpQ, c);
1da177e4
LT		 3008 }
3009}
7c832835 3010
f70dba83 3011/* Assumes that h->lock is held. */
1da177e4
LT		 3012/* Zeros out the error record and then resends the command back */
3013/* to the controller */
7c832835 3014static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 3015{
3016 /* erase the old error information */
3017 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3018
3019 /* add it to software queue and then send it to the controller */
8a3173de 3020 addQ(&h->reqQ, c);
1da177e4 3021 h->Qdepth++;
7c832835 3022 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 3023 h->maxQsinceinit = h->Qdepth;
3024
3025 start_io(h);
3026}
a9925a06 3027
1a614f50
SC		 3028static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3029 unsigned int msg_byte, unsigned int host_byte,
3030 unsigned int driver_byte)
3031{
3032 /* inverse of macros in scsi.h */
3033 return (scsi_status_byte & 0xff) |
3034 ((msg_byte & 0xff) << 8) |
3035 ((host_byte & 0xff) << 16) |
3036 ((driver_byte & 0xff) << 24);
3037}
3038
0a9279cc
MM		 3039static inline int evaluate_target_status(ctlr_info_t *h,
3040 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 3041{
3042 unsigned char sense_key;
1a614f50
SC		 3043 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3044 int error_value;
3045
0a9279cc 3046 *retry_cmd = 0;
1a614f50
SC		 3047 /* If we get in here, it means we got "target status", that is, scsi status */
3048 status_byte = cmd->err_info->ScsiStatus;
3049 driver_byte = DRIVER_OK;
3050 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3051
33659ebb 3052 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 3053 host_byte = DID_PASSTHROUGH;
3054 else
3055 host_byte = DID_OK;
3056
3057 error_value = make_status_bytes(status_byte, msg_byte,
3058 host_byte, driver_byte);
03bbfee5 3059
1a614f50 3060 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3061 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3062 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3063 "has SCSI Status 0x%x\n",
3064 cmd, cmd->err_info->ScsiStatus);
1a614f50 3065 return error_value;
03bbfee5
MMOD		 3066 }
3067
3068 /* check the sense key */
3069 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3070 /* no status or recovered error */
33659ebb
CH		 3071 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3072 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3073 error_value = 0;
03bbfee5 3074
0a9279cc 3075 if (check_for_unit_attention(h, cmd)) {
33659ebb 3076 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3077 return 0;
3078 }
3079
33659ebb
CH		 3080 /* Not SG_IO or similar? */
3081 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3082 if (error_value != 0)
b2a4a43d 3083 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3084 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3085 return error_value;
03bbfee5
MMOD		 3086 }
3087
3088 /* SG_IO or similar, copy sense data back */
3089 if (cmd->rq->sense) {
3090 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3091 cmd->rq->sense_len = cmd->err_info->SenseLen;
3092 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3093 cmd->rq->sense_len);
3094 } else
3095 cmd->rq->sense_len = 0;
3096
1a614f50 3097 return error_value;
03bbfee5
MMOD		 3098}
3099
7c832835 3100/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3101 * buffers for the completed job. Note that this function does not need
3102 * to hold the hba/queue lock.
7c832835
BH		 3103 */
3104static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3105 int timeout)
1da177e4 3106{
1da177e4 3107 int retry_cmd = 0;
198b7660
MMOD		 3108 struct request *rq = cmd->rq;
3109
3110 rq->errors = 0;
7c832835 3111
1da177e4 3112 if (timeout)
1a614f50 3113 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3114
d38ae168
MMOD		 3115 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3116 goto after_error_processing;
7c832835 3117
d38ae168 3118 switch (cmd->err_info->CommandStatus) {
d38ae168 3119 case CMD_TARGET_STATUS:
0a9279cc 3120 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3121 break;
3122 case CMD_DATA_UNDERRUN:
33659ebb 3123 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3124 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3125 " completed with data underrun "
3126 "reported\n", cmd);
c3a4d78c 3127 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3128 }
d38ae168
MMOD		 3129 break;
3130 case CMD_DATA_OVERRUN:
33659ebb 3131 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3132 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3133 " completed with data overrun "
3134 "reported\n", cmd);
d38ae168
MMOD		 3135 break;
3136 case CMD_INVALID:
b2a4a43d 3137 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3138 "reported invalid\n", cmd);
1a614f50
SC		 3139 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3140 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3141 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3142 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3143 break;
3144 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3145 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3146 "protocol error\n", cmd);
1a614f50
SC		 3147 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3148 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3149 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3150 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3151 break;
3152 case CMD_HARDWARE_ERR:
b2a4a43d 3153 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3154 " hardware error\n", cmd);
1a614f50
SC		 3155 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3156 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3157 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3158 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3159 break;
3160 case CMD_CONNECTION_LOST:
b2a4a43d 3161 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3162 "connection lost\n", cmd);
1a614f50
SC		 3163 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3164 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3165 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3166 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3167 break;
3168 case CMD_ABORTED:
b2a4a43d 3169 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3170 "aborted\n", cmd);
1a614f50
SC		 3171 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3172 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3173 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3174 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3175 break;
3176 case CMD_ABORT_FAILED:
b2a4a43d 3177 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3178 "abort failed\n", cmd);
1a614f50
SC		 3179 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3180 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3181 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3182 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3183 break;
3184 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3185 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3186 "abort %p\n", h->ctlr, cmd);
3187 if (cmd->retry_count < MAX_CMD_RETRIES) {
3188 retry_cmd = 1;
b2a4a43d 3189 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3190 cmd->retry_count++;
3191 } else
b2a4a43d
SC		 3192 dev_warn(&h->pdev->dev,
3193 "%p retried too many times\n", cmd);
1a614f50
SC		 3194 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3195 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3196 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3197 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3198 break;
3199 case CMD_TIMEOUT:
b2a4a43d 3200 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3201 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3202 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3203 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3204 DID_PASSTHROUGH : DID_ERROR);
d38ae168 3205 break;
6d9a4f9e
SC		 3206 case CMD_UNABORTABLE:
3207 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3208 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3209 cmd->err_info->CommandStatus, DRIVER_OK,
3210 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3211 DID_PASSTHROUGH : DID_ERROR);
3212 break;
d38ae168 3213 default:
b2a4a43d 3214 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3215 "unknown status %x\n", cmd,
3216 cmd->err_info->CommandStatus);
1a614f50
SC		 3217 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3218 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3219 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3220 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3221 }
d38ae168
MMOD		 3222
3223after_error_processing:
3224
1da177e4 3225 /* We need to return this command */
7c832835
BH		 3226 if (retry_cmd) {
3227 resend_cciss_cmd(h, cmd);
1da177e4 3228 return;
7c832835 3229 }
03bbfee5 3230 cmd->rq->completion_data = cmd;
a9925a06 3231 blk_complete_request(cmd->rq);
1da177e4
LT		 3232}
3233
0c2b3908
MM		 3234static inline u32 cciss_tag_contains_index(u32 tag)
3235{
5e216153 3236#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3237 return tag & DIRECT_LOOKUP_BIT;
3238}
3239
3240static inline u32 cciss_tag_to_index(u32 tag)
3241{
5e216153 3242#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3243 return tag >> DIRECT_LOOKUP_SHIFT;
3244}
3245
0498cc2a 3246static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
0c2b3908 3247{
0498cc2a
SC		 3248#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3249#define CCISS_SIMPLE_ERROR_BITS 0x03
3250 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3251 return tag & ~CCISS_PERF_ERROR_BITS;
3252 return tag & ~CCISS_SIMPLE_ERROR_BITS;
0c2b3908
MM		 3253}
3254
3255static inline void cciss_mark_tag_indexed(u32 *tag)
3256{
3257 *tag |= DIRECT_LOOKUP_BIT;
3258}
3259
3260static inline void cciss_set_tag_index(u32 *tag, u32 index)
3261{
3262 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3263}
3264
7c832835
BH		 3265/*
3266 * Get a request and submit it to the controller.
1da177e4 3267 */
165125e1 3268static void do_cciss_request(struct request_queue *q)
1da177e4 3269{
7c832835 3270 ctlr_info_t *h = q->queuedata;
1da177e4 3271 CommandList_struct *c;
00988a35
MMOD		 3272 sector_t start_blk;
3273 int seg;
1da177e4
LT		 3274 struct request *creq;
3275 u64bit temp64;
5c07a311
DB		 3276 struct scatterlist *tmp_sg;
3277 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3278 drive_info_struct *drv;
3279 int i, dir;
5c07a311
DB		 3280 int sg_index = 0;
3281 int chained = 0;
1da177e4 3282
7c832835 3283 queue:
9934c8c0 3284 creq = blk_peek_request(q);
1da177e4
LT		 3285 if (!creq)
3286 goto startio;
3287
5c07a311 3288 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3289
6b4d96b8
SC		 3290 c = cmd_alloc(h);
3291 if (!c)
1da177e4
LT		 3292 goto full;
3293
9934c8c0 3294 blk_start_request(creq);
1da177e4 3295
5c07a311 3296 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3297 spin_unlock_irq(q->queue_lock);
3298
3299 c->cmd_type = CMD_RWREQ;
3300 c->rq = creq;
7c832835
BH		 3301
3302 /* fill in the request */
1da177e4 3303 drv = creq->rq_disk->private_data;
b028461d 3304 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3305 /* got command from pool, so use the command block index instead */
3306 /* for direct lookups. */
3307 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3308 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3309 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3310 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3311 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3312 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3313 c->Request.Type.Attribute = ATTR_SIMPLE;
3314 c->Request.Type.Direction =
a52de245 3315 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3316 c->Request.Timeout = 0; /* Don't time out */
7c832835 3317 c->Request.CDB[0] =
00988a35 3318 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3319 start_blk = blk_rq_pos(creq);
b2a4a43d 3320 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3321 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3322 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3323 seg = blk_rq_map_sg(q, creq, tmp_sg);
3324
7c832835 3325 /* get the DMA records for the setup */
1da177e4
LT		 3326 if (c->Request.Type.Direction == XFER_READ)
3327 dir = PCI_DMA_FROMDEVICE;
3328 else
3329 dir = PCI_DMA_TODEVICE;
3330
5c07a311
DB		 3331 curr_sg = c->SG;
3332 sg_index = 0;
3333 chained = 0;
3334
7c832835 3335 for (i = 0; i < seg; i++) {
5c07a311
DB		 3336 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3337 !chained && ((seg - i) > 1)) {
5c07a311 3338 /* Point to next chain block. */
dccc9b56 3339 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3340 sg_index = 0;
3341 chained = 1;
3342 }
3343 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3344 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3345 tmp_sg[i].offset,
3346 tmp_sg[i].length, dir);
3347 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3348 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3349 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3350 ++sg_index;
1da177e4 3351 }
d45033ef
SC		 3352 if (chained)
3353 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3354 (seg - (h->max_cmd_sgentries - 1)) *
3355 sizeof(SGDescriptor_struct));
5c07a311 3356
7c832835
BH		 3357 /* track how many SG entries we are using */
3358 if (seg > h->maxSG)
3359 h->maxSG = seg;
1da177e4 3360
b2a4a43d 3361 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3362 "chained[%d]\n",
3363 blk_rq_sectors(creq), seg, chained);
1da177e4 3364
5e216153
MM		 3365 c->Header.SGTotal = seg + chained;
3366 if (seg <= h->max_cmd_sgentries)
3367 c->Header.SGList = c->Header.SGTotal;
3368 else
5c07a311 3369 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3370 set_performant_mode(h, c);
5c07a311 3371
33659ebb 3372 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3373 if(h->cciss_read == CCISS_READ_10) {
3374 c->Request.CDB[1] = 0;
b028461d 3375 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3376 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3377 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3378 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3379 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3380 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3381 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3382 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3383 } else {
582539e5
RD		 3384 u32 upper32 = upper_32_bits(start_blk);
3385
03bbfee5
MMOD		 3386 c->Request.CDBLen = 16;
3387 c->Request.CDB[1]= 0;
b028461d 3388 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3389 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3390 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3391 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3392 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3393 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3394 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3395 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3396 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3397 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3398 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3399 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3400 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3401 }
33659ebb 3402 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3403 c->Request.CDBLen = creq->cmd_len;
3404 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3405 } else {
b2a4a43d
SC		 3406 dev_warn(&h->pdev->dev, "bad request type %d\n",
3407 creq->cmd_type);
03bbfee5 3408 BUG();
00988a35 3409 }
1da177e4
LT		 3410
3411 spin_lock_irq(q->queue_lock);
3412
8a3173de 3413 addQ(&h->reqQ, c);
1da177e4 3414 h->Qdepth++;
7c832835
BH		 3415 if (h->Qdepth > h->maxQsinceinit)
3416 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3417
3418 goto queue;
00988a35 3419full:
1da177e4 3420 blk_stop_queue(q);
00988a35 3421startio:
1da177e4
LT		 3422 /* We will already have the driver lock here so not need
3423 * to lock it.
7c832835 3424 */
1da177e4
LT		 3425 start_io(h);
3426}
3427
3da8b713 3428static inline unsigned long get_next_completion(ctlr_info_t *h)
3429{
3da8b713 3430 return h->access.command_completed(h);
3da8b713 3431}
3432
3433static inline int interrupt_pending(ctlr_info_t *h)
3434{
3da8b713 3435 return h->access.intr_pending(h);
3da8b713 3436}
3437
3438static inline long interrupt_not_for_us(ctlr_info_t *h)
3439{
81125860 3440 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3441 (h->interrupts_enabled == 0));
3da8b713 3442}
3443
0c2b3908
MM		 3444static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3445 u32 raw_tag)
1da177e4 3446{
0c2b3908
MM		 3447 if (unlikely(tag_index >= h->nr_cmds)) {
3448 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3449 return 1;
3450 }
3451 return 0;
3452}
3453
3454static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3455 u32 raw_tag)
3456{
3457 removeQ(c);
3458 if (likely(c->cmd_type == CMD_RWREQ))
3459 complete_command(h, c, 0);
3460 else if (c->cmd_type == CMD_IOCTL_PEND)
3461 complete(c->waiting);
3462#ifdef CONFIG_CISS_SCSI_TAPE
3463 else if (c->cmd_type == CMD_SCSI)
3464 complete_scsi_command(c, 0, raw_tag);
3465#endif
3466}
3467
29979a71
MM		 3468static inline u32 next_command(ctlr_info_t *h)
3469{
3470 u32 a;
3471
0498cc2a 3472 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
29979a71
MM		 3473 return h->access.command_completed(h);
3474
3475 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3476 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3477 (h->reply_pool_head)++;
3478 h->commands_outstanding--;
3479 } else {
3480 a = FIFO_EMPTY;
3481 }
3482 /* Check for wraparound */
3483 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3484 h->reply_pool_head = h->reply_pool;
3485 h->reply_pool_wraparound ^= 1;
3486 }
3487 return a;
3488}
3489
0c2b3908
MM		 3490/* process completion of an indexed ("direct lookup") command */
3491static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3492{
3493 u32 tag_index;
1da177e4 3494 CommandList_struct *c;
0c2b3908
MM		 3495
3496 tag_index = cciss_tag_to_index(raw_tag);
3497 if (bad_tag(h, tag_index, raw_tag))
5e216153 3498 return next_command(h);
0c2b3908
MM		 3499 c = h->cmd_pool + tag_index;
3500 finish_cmd(h, c, raw_tag);
5e216153 3501 return next_command(h);
0c2b3908
MM		 3502}
3503
3504/* process completion of a non-indexed command */
3505static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3506{
0c2b3908 3507 CommandList_struct *c = NULL;
0c2b3908
MM		 3508 __u32 busaddr_masked, tag_masked;
3509
0498cc2a 3510 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
e6e1ee93 3511 list_for_each_entry(c, &h->cmpQ, list) {
0498cc2a 3512 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
0c2b3908
MM		 3513 if (busaddr_masked == tag_masked) {
3514 finish_cmd(h, c, raw_tag);
5e216153 3515 return next_command(h);
0c2b3908
MM		 3516 }
3517 }
3518 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3519 return next_command(h);
0c2b3908
MM		 3520}
3521
5afe2781
SC		 3522/* Some controllers, like p400, will give us one interrupt
3523 * after a soft reset, even if we turned interrupts off.
3524 * Only need to check for this in the cciss_xxx_discard_completions
3525 * functions.
3526 */
3527static int ignore_bogus_interrupt(ctlr_info_t *h)
3528{
3529 if (likely(!reset_devices))
3530 return 0;
3531
3532 if (likely(h->interrupts_enabled))
3533 return 0;
3534
3535 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3536 "(known firmware bug.) Ignoring.\n");
3537
3538 return 1;
3539}
3540
3541static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3542{
3543 ctlr_info_t *h = dev_id;
3544 unsigned long flags;
3545 u32 raw_tag;
3546
3547 if (ignore_bogus_interrupt(h))
3548 return IRQ_NONE;
3549
3550 if (interrupt_not_for_us(h))
3551 return IRQ_NONE;
3552 spin_lock_irqsave(&h->lock, flags);
3553 while (interrupt_pending(h)) {
3554 raw_tag = get_next_completion(h);
3555 while (raw_tag != FIFO_EMPTY)
3556 raw_tag = next_command(h);
3557 }
3558 spin_unlock_irqrestore(&h->lock, flags);
3559 return IRQ_HANDLED;
3560}
3561
3562static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3563{
3564 ctlr_info_t *h = dev_id;
3565 unsigned long flags;
3566 u32 raw_tag;
3567
3568 if (ignore_bogus_interrupt(h))
3569 return IRQ_NONE;
3570
3571 spin_lock_irqsave(&h->lock, flags);
3572 raw_tag = get_next_completion(h);
3573 while (raw_tag != FIFO_EMPTY)
3574 raw_tag = next_command(h);
3575 spin_unlock_irqrestore(&h->lock, flags);
3576 return IRQ_HANDLED;
3577}
3578
0c2b3908
MM		 3579static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3580{
3581 ctlr_info_t *h = dev_id;
1da177e4 3582 unsigned long flags;
0c2b3908 3583 u32 raw_tag;
1da177e4 3584
3da8b713 3585 if (interrupt_not_for_us(h))
1da177e4 3586 return IRQ_NONE;
f70dba83 3587 spin_lock_irqsave(&h->lock, flags);
3da8b713 3588 while (interrupt_pending(h)) {
0c2b3908
MM		 3589 raw_tag = get_next_completion(h);
3590 while (raw_tag != FIFO_EMPTY) {
3591 if (cciss_tag_contains_index(raw_tag))
3592 raw_tag = process_indexed_cmd(h, raw_tag);
3593 else
3594 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3595 }
3596 }
f70dba83 3597 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3598 return IRQ_HANDLED;
3599}
1da177e4 3600
0c2b3908
MM		 3601/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3602 * check the interrupt pending register because it is not set.
3603 */
3604static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3605{
3606 ctlr_info_t *h = dev_id;
3607 unsigned long flags;
3608 u32 raw_tag;
8a3173de 3609
f70dba83 3610 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3611 raw_tag = get_next_completion(h);
3612 while (raw_tag != FIFO_EMPTY) {
3613 if (cciss_tag_contains_index(raw_tag))
3614 raw_tag = process_indexed_cmd(h, raw_tag);
3615 else
3616 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3617 }
f70dba83 3618 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3619 return IRQ_HANDLED;
3620}
7c832835 3621
b368c9dd
AP		 3622/**
3623 * add_to_scan_list() - add controller to rescan queue
3624 * @h: Pointer to the controller.
3625 *
3626 * Adds the controller to the rescan queue if not already on the queue.
3627 *
3628 * returns 1 if added to the queue, 0 if skipped (could be on the
3629 * queue already, or the controller could be initializing or shutting
3630 * down).
3631 **/
3632static int add_to_scan_list(struct ctlr_info *h)
3633{
3634 struct ctlr_info *test_h;
3635 int found = 0;
3636 int ret = 0;
3637
3638 if (h->busy_initializing)
3639 return 0;
3640
3641 if (!mutex_trylock(&h->busy_shutting_down))
3642 return 0;
3643
3644 mutex_lock(&scan_mutex);
3645 list_for_each_entry(test_h, &scan_q, scan_list) {
3646 if (test_h == h) {
3647 found = 1;
3648 break;
3649 }
3650 }
3651 if (!found && !h->busy_scanning) {
3652 INIT_COMPLETION(h->scan_wait);
3653 list_add_tail(&h->scan_list, &scan_q);
3654 ret = 1;
3655 }
3656 mutex_unlock(&scan_mutex);
3657 mutex_unlock(&h->busy_shutting_down);
3658
3659 return ret;
3660}
3661
3662/**
3663 * remove_from_scan_list() - remove controller from rescan queue
3664 * @h: Pointer to the controller.
3665 *
3666 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3667 * the controller is currently conducting a rescan. The controller
3668 * can be in one of three states:
3669 * 1. Doesn't need a scan
3670 * 2. On the scan list, but not scanning yet (we remove it)
3671 * 3. Busy scanning (and not on the list). In this case we want to wait for
3672 * the scan to complete to make sure the scanning thread for this
3673 * controller is completely idle.
b368c9dd
AP		 3674 **/
3675static void remove_from_scan_list(struct ctlr_info *h)
3676{
3677 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3678
3679 mutex_lock(&scan_mutex);
3680 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3681 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3682 list_del(&h->scan_list);
3683 complete_all(&h->scan_wait);
3684 mutex_unlock(&scan_mutex);
3685 return;
3686 }
3687 }
fd8489cf
SC		 3688 if (h->busy_scanning) { /* state 3. */
3689 mutex_unlock(&scan_mutex);
b368c9dd 3690 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3691 } else { /* state 1, nothing to do. */
3692 mutex_unlock(&scan_mutex);
3693 }
b368c9dd
AP		 3694}
3695
3696/**
3697 * scan_thread() - kernel thread used to rescan controllers
3698 * @data: Ignored.
3699 *
3700 * A kernel thread used scan for drive topology changes on
3701 * controllers. The thread processes only one controller at a time
3702 * using a queue. Controllers are added to the queue using
3703 * add_to_scan_list() and removed from the queue either after done
3704 * processing or using remove_from_scan_list().
3705 *
3706 * returns 0.
3707 **/
0a9279cc
MM		 3708static int scan_thread(void *data)
3709{
b368c9dd 3710 struct ctlr_info *h;
0a9279cc 3711
b368c9dd
AP		 3712 while (1) {
3713 set_current_state(TASK_INTERRUPTIBLE);
3714 schedule();
0a9279cc
MM		 3715 if (kthread_should_stop())
3716 break;
b368c9dd
AP		 3717
3718 while (1) {
3719 mutex_lock(&scan_mutex);
3720 if (list_empty(&scan_q)) {
3721 mutex_unlock(&scan_mutex);
3722 break;
3723 }
3724
3725 h = list_entry(scan_q.next,
3726 struct ctlr_info,
3727 scan_list);
3728 list_del(&h->scan_list);
3729 h->busy_scanning = 1;
3730 mutex_unlock(&scan_mutex);
3731
d06dfbd2
SC		 3732 rebuild_lun_table(h, 0, 0);
3733 complete_all(&h->scan_wait);
3734 mutex_lock(&scan_mutex);
3735 h->busy_scanning = 0;
3736 mutex_unlock(&scan_mutex);
b368c9dd 3737 }
0a9279cc 3738 }
b368c9dd 3739
0a9279cc
MM		 3740 return 0;
3741}
3742
3743static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3744{
3745 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3746 return 0;
3747
3748 switch (c->err_info->SenseInfo[12]) {
3749 case STATE_CHANGED:
b2a4a43d
SC		 3750 dev_warn(&h->pdev->dev, "a state change "
3751 "detected, command retried\n");
0a9279cc
MM		 3752 return 1;
3753 break;
3754 case LUN_FAILED:
b2a4a43d
SC		 3755 dev_warn(&h->pdev->dev, "LUN failure "
3756 "detected, action required\n");
0a9279cc
MM		 3757 return 1;
3758 break;
3759 case REPORT_LUNS_CHANGED:
b2a4a43d 3760 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3761 /*
3762 * Here, we could call add_to_scan_list and wake up the scan thread,
3763 * except that it's quite likely that we will get more than one
3764 * REPORT_LUNS_CHANGED condition in quick succession, which means
3765 * that those which occur after the first one will likely happen
3766 * *during* the scan_thread's rescan. And the rescan code is not
3767 * robust enough to restart in the middle, undoing what it has already
3768 * done, and it's not clear that it's even possible to do this, since
3769 * part of what it does is notify the block layer, which starts
3770 * doing it's own i/o to read partition tables and so on, and the
3771 * driver doesn't have visibility to know what might need undoing.
3772 * In any event, if possible, it is horribly complicated to get right
3773 * so we just don't do it for now.
3774 *
3775 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3776 */
0a9279cc
MM		 3777 return 1;
3778 break;
3779 case POWER_OR_RESET:
b2a4a43d
SC		 3780 dev_warn(&h->pdev->dev,
3781 "a power on or device reset detected\n");
0a9279cc
MM		 3782 return 1;
3783 break;
3784 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3785 dev_warn(&h->pdev->dev,
3786 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3787 return 1;
3788 break;
3789 default:
b2a4a43d
SC		 3790 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3791 return 1;
0a9279cc
MM		 3792 }
3793}
3794
7c832835 3795/*
d14c4ab5 3796 * We cannot read the structure directly, for portability we must use
1da177e4 3797 * the io functions.
7c832835 3798 * This is for debug only.
1da177e4 3799 */
b2a4a43d 3800static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3801{
3802 int i;
3803 char temp_name[17];
b2a4a43d 3804 CfgTable_struct *tb = h->cfgtable;
1da177e4 3805
b2a4a43d
SC		 3806 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3807 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3808 for (i = 0; i < 4; i++)
1da177e4 3809 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3810 temp_name[4] = '\0';
b2a4a43d
SC		 3811 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3812 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3813 readl(&(tb->SpecValence)));
3814 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3815 readl(&(tb->TransportSupport)));
b2a4a43d 3816 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3817 readl(&(tb->TransportActive)));
b2a4a43d 3818 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3819 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3820 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3821 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3822 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3823 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3824 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3825 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3826 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3827 readl(&(tb->BusTypes)));
7c832835 3828 for (i = 0; i < 16; i++)
1da177e4
LT		 3829 temp_name[i] = readb(&(tb->ServerName[i]));
3830 temp_name[16] = '\0';
b2a4a43d
SC		 3831 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3832 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3833 readl(&(tb->HeartBeat)));
1da177e4 3834}
1da177e4 3835
7c832835 3836static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3837{
3838 int i, offset, mem_type, bar_type;
7c832835 3839 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3840 return 0;
3841 offset = 0;
7c832835
BH		 3842 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3843 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3844 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3845 offset += 4;
3846 else {
3847 mem_type = pci_resource_flags(pdev, i) &
7c832835 3848 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3849 switch (mem_type) {
7c832835
BH		 3850 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3851 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3852 offset += 4; /* 32 bit */
3853 break;
3854 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3855 offset += 8;
3856 break;
3857 default: /* reserved in PCI 2.2 */
b2a4a43d 3858 dev_warn(&pdev->dev,
7c832835
BH		 3859 "Base address is invalid\n");
3860 return -1;
1da177e4
LT		 3861 break;
3862 }
3863 }
7c832835
BH		 3864 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3865 return i + 1;
1da177e4
LT		 3866 }
3867 return -1;
3868}
3869
5e216153
MM		 3870/* Fill in bucket_map[], given nsgs (the max number of
3871 * scatter gather elements supported) and bucket[],
3872 * which is an array of 8 integers. The bucket[] array
3873 * contains 8 different DMA transfer sizes (in 16
3874 * byte increments) which the controller uses to fetch
3875 * commands. This function fills in bucket_map[], which
3876 * maps a given number of scatter gather elements to one of
3877 * the 8 DMA transfer sizes. The point of it is to allow the
3878 * controller to only do as much DMA as needed to fetch the
3879 * command, with the DMA transfer size encoded in the lower
3880 * bits of the command address.
3881 */
3882static void calc_bucket_map(int bucket[], int num_buckets,
3883 int nsgs, int *bucket_map)
3884{
3885 int i, j, b, size;
3886
3887 /* even a command with 0 SGs requires 4 blocks */
3888#define MINIMUM_TRANSFER_BLOCKS 4
3889#define NUM_BUCKETS 8
3890 /* Note, bucket_map must have nsgs+1 entries. */
3891 for (i = 0; i <= nsgs; i++) {
3892 /* Compute size of a command with i SG entries */
3893 size = i + MINIMUM_TRANSFER_BLOCKS;
3894 b = num_buckets; /* Assume the biggest bucket */
3895 /* Find the bucket that is just big enough */
3896 for (j = 0; j < 8; j++) {
3897 if (bucket[j] >= size) {
3898 b = j;
3899 break;
3900 }
3901 }
3902 /* for a command with i SG entries, use bucket b. */
3903 bucket_map[i] = b;
3904 }
3905}
3906
0f8a6a1e
SC		 3907static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3908{
3909 int i;
3910
3911 /* under certain very rare conditions, this can take awhile.
3912 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3913 * as we enter this code.) */
3914 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3915 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3916 break;
332c2f80 3917 usleep_range(10000, 20000);
0f8a6a1e
SC		 3918 }
3919}
3920
0498cc2a
SC		 3921static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3922 u32 use_short_tags)
b9933135
SC		 3923{
3924 /* This is a bit complicated. There are 8 registers on
3925 * the controller which we write to to tell it 8 different
3926 * sizes of commands which there may be. It's a way of
3927 * reducing the DMA done to fetch each command. Encoded into
3928 * each command's tag are 3 bits which communicate to the controller
3929 * which of the eight sizes that command fits within. The size of
3930 * each command depends on how many scatter gather entries there are.
3931 * Each SG entry requires 16 bytes. The eight registers are programmed
3932 * with the number of 16-byte blocks a command of that size requires.
3933 * The smallest command possible requires 5 such 16 byte blocks.
3934 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3935 * blocks. Note, this only extends to the SG entries contained
3936 * within the command block, and does not extend to chained blocks
3937 * of SG elements. bft[] contains the eight values we write to
3938 * the registers. They are not evenly distributed, but have more
3939 * sizes for small commands, and fewer sizes for larger commands.
3940 */
5e216153 3941 __u32 trans_offset;
b9933135 3942 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3943 /*
3944 * 5 = 1 s/g entry or 4k
3945 * 6 = 2 s/g entry or 8k
3946 * 8 = 4 s/g entry or 16k
3947 * 10 = 6 s/g entry or 24k
3948 */
5e216153 3949 unsigned long register_value;
5e216153
MM		 3950 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3951
5e216153
MM		 3952 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3953
3954 /* Controller spec: zero out this buffer. */
3955 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3956 h->reply_pool_head = h->reply_pool;
3957
3958 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3959 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3960 h->blockFetchTable);
3961 writel(bft[0], &h->transtable->BlockFetch0);
3962 writel(bft[1], &h->transtable->BlockFetch1);
3963 writel(bft[2], &h->transtable->BlockFetch2);
3964 writel(bft[3], &h->transtable->BlockFetch3);
3965 writel(bft[4], &h->transtable->BlockFetch4);
3966 writel(bft[5], &h->transtable->BlockFetch5);
3967 writel(bft[6], &h->transtable->BlockFetch6);
3968 writel(bft[7], &h->transtable->BlockFetch7);
3969
3970 /* size of controller ring buffer */
3971 writel(h->max_commands, &h->transtable->RepQSize);
3972 writel(1, &h->transtable->RepQCount);
3973 writel(0, &h->transtable->RepQCtrAddrLow32);
3974 writel(0, &h->transtable->RepQCtrAddrHigh32);
3975 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3976 writel(0, &h->transtable->RepQAddr0High32);
0498cc2a 3977 writel(CFGTBL_Trans_Performant | use_short_tags,
5e216153
MM		 3978 &(h->cfgtable->HostWrite.TransportRequest));
3979
5e216153 3980 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3981 cciss_wait_for_mode_change_ack(h);
5e216153 3982 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3983 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3984 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3985 " performant mode\n");
b9933135
SC		 3986}
3987
3988static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3989{
3990 __u32 trans_support;
3991
13049537
JH		 3992 if (cciss_simple_mode)
3993 return;
3994
b9933135
SC		 3995 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3996 /* Attempt to put controller into performant mode if supported */
3997 /* Does board support performant mode? */
3998 trans_support = readl(&(h->cfgtable->TransportSupport));
3999 if (!(trans_support & PERFORMANT_MODE))
4000 return;
4001
b2a4a43d 4002 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 4003 /* Performant mode demands commands on a 32 byte boundary
4004 * pci_alloc_consistent aligns on page boundarys already.
4005 * Just need to check if divisible by 32
4006 */
4007 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 4008 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 4009 "cciss info: command size[",
4010 (int)sizeof(CommandList_struct),
4011 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 4012 return;
4013 }
4014
b9933135
SC		 4015 /* Performant mode ring buffer and supporting data structures */
4016 h->reply_pool = (__u64 *)pci_alloc_consistent(
4017 h->pdev, h->max_commands * sizeof(__u64),
4018 &(h->reply_pool_dhandle));
4019
4020 /* Need a block fetch table for performant mode */
4021 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4022 sizeof(__u32)), GFP_KERNEL);
4023
4024 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4025 goto clean_up;
4026
0498cc2a
SC		 4027 cciss_enter_performant_mode(h,
4028 trans_support & CFGTBL_Trans_use_short_tags);
b9933135 4029
5e216153
MM		 4030 /* Change the access methods to the performant access methods */
4031 h->access = SA5_performant_access;
b9933135 4032 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 4033
4034 return;
4035clean_up:
4036 kfree(h->blockFetchTable);
4037 if (h->reply_pool)
4038 pci_free_consistent(h->pdev,
4039 h->max_commands * sizeof(__u64),
4040 h->reply_pool,
4041 h->reply_pool_dhandle);
4042 return;
4043
4044} /* cciss_put_controller_into_performant_mode */
4045
fb86a35b
MM		 4046/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4047 * controllers that are capable. If not, we use IO-APIC mode.
4048 */
4049
f70dba83 4050static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 4051{
4052#ifdef CONFIG_PCI_MSI
7c832835
BH		 4053 int err;
4054 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4055 {0, 2}, {0, 3}
4056 };
fb86a35b
MM		 4057
4058 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 4059 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4060 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 4061 goto default_int_mode;
4062
f70dba83
SC		 4063 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4064 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 4065 if (!err) {
f70dba83
SC		 4066 h->intr[0] = cciss_msix_entries[0].vector;
4067 h->intr[1] = cciss_msix_entries[1].vector;
4068 h->intr[2] = cciss_msix_entries[2].vector;
4069 h->intr[3] = cciss_msix_entries[3].vector;
4070 h->msix_vector = 1;
7c832835
BH		 4071 return;
4072 }
4073 if (err > 0) {
b2a4a43d
SC		 4074 dev_warn(&h->pdev->dev,
4075 "only %d MSI-X vectors available\n", err);
1ecb9c0f 4076 goto default_int_mode;
7c832835 4077 } else {
b2a4a43d
SC		 4078 dev_warn(&h->pdev->dev,
4079 "MSI-X init failed %d\n", err);
1ecb9c0f 4080 goto default_int_mode;
7c832835
BH		 4081 }
4082 }
f70dba83
SC		 4083 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4084 if (!pci_enable_msi(h->pdev))
4085 h->msi_vector = 1;
4086 else
b2a4a43d 4087 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 4088 }
1ecb9c0f 4089default_int_mode:
7c832835 4090#endif /* CONFIG_PCI_MSI */
fb86a35b 4091 /* if we get here we're going to use the default interrupt mode */
13049537 4092 h->intr[h->intr_mode] = h->pdev->irq;
fb86a35b
MM		 4093 return;
4094}
4095
6539fa9b 4096static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 4097{
6539fa9b
SC		 4098 int i;
4099 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 4100
4101 subsystem_vendor_id = pdev->subsystem_vendor;
4102 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 4103 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4104 subsystem_vendor_id;
2ec24ff1 4105
4205df34 4106 for (i = 0; i < ARRAY_SIZE(products); i++)
6539fa9b
SC		 4107 if (*board_id == products[i].board_id)
4108 return i;
6539fa9b
SC		 4109 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4110 *board_id);
4111 return -ENODEV;
4112}
1da177e4 4113
dd9c426e
SC		 4114static inline bool cciss_board_disabled(ctlr_info_t *h)
4115{
4116 u16 command;
1da177e4 4117
dd9c426e
SC		 4118 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4119 return ((command & PCI_COMMAND_MEMORY) == 0);
4120}
1da177e4 4121
d474830d
SC		 4122static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4123 unsigned long *memory_bar)
4124{
4125 int i;
4e570309 4126
d474830d
SC		 4127 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4128 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4129 /* addressing mode bits already removed */
4130 *memory_bar = pci_resource_start(pdev, i);
4131 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4132 *memory_bar);
4133 return 0;
4134 }
4135 dev_warn(&pdev->dev, "no memory BAR found\n");
4136 return -ENODEV;
4137}
1da177e4 4138
afa842fa
SC		 4139static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
4140 void __iomem *vaddr, int wait_for_ready)
4141#define BOARD_READY 1
4142#define BOARD_NOT_READY 0
e99ba136 4143{
afa842fa 4144 int i, iterations;
e99ba136 4145 u32 scratchpad;
1da177e4 4146
afa842fa
SC		 4147 if (wait_for_ready)
4148 iterations = CCISS_BOARD_READY_ITERATIONS;
4149 else
4150 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4151
4152 for (i = 0; i < iterations; i++) {
4153 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4154 if (wait_for_ready) {
4155 if (scratchpad == CCISS_FIRMWARE_READY)
4156 return 0;
4157 } else {
4158 if (scratchpad != CCISS_FIRMWARE_READY)
4159 return 0;
4160 }
e99ba136 4161 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4162 }
afa842fa 4163 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4164 return -ENODEV;
4165}
e1438581 4166
8e93bf6d
SC		 4167static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4168 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4169 u64 *cfg_offset)
4170{
4171 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4172 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4173 *cfg_base_addr &= (u32) 0x0000ffff;
4174 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4175 if (*cfg_base_addr_index == -1) {
4176 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4177 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4178 return -ENODEV;
4179 }
4180 return 0;
4181}
1da177e4 4182
4809d098
SC		 4183static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4184{
4185 u64 cfg_offset;
4186 u32 cfg_base_addr;
4187 u64 cfg_base_addr_index;
4188 u32 trans_offset;
8e93bf6d 4189 int rc;
1da177e4 4190
8e93bf6d
SC		 4191 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4192 &cfg_base_addr_index, &cfg_offset);
4193 if (rc)
4194 return rc;
4809d098 4195 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4196 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4197 if (!h->cfgtable)
4198 return -ENOMEM;
62710ae1
SC		 4199 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4200 if (rc)
4201 return rc;
4809d098 4202 /* Find performant mode table. */
8e93bf6d 4203 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4204 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4205 cfg_base_addr_index)+cfg_offset+trans_offset,
4206 sizeof(*h->transtable));
4207 if (!h->transtable)
4208 return -ENOMEM;
4209 return 0;
4210}
1da177e4 4211
adfbc1ff
SC		 4212static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4213{
4214 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4215
4216 /* Limit commands in memory limited kdump scenario. */
4217 if (reset_devices && h->max_commands > 32)
4218 h->max_commands = 32;
4219
adfbc1ff
SC		 4220 if (h->max_commands < 16) {
4221 dev_warn(&h->pdev->dev, "Controller reports "
4222 "max supported commands of %d, an obvious lie. "
4223 "Using 16. Ensure that firmware is up to date.\n",
4224 h->max_commands);
4225 h->max_commands = 16;
1da177e4 4226 }
adfbc1ff 4227}
1da177e4 4228
afadbf4b
SC		 4229/* Interrogate the hardware for some limits:
4230 * max commands, max SG elements without chaining, and with chaining,
4231 * SG chain block size, etc.
4232 */
4233static void __devinit cciss_find_board_params(ctlr_info_t *h)
4234{
adfbc1ff 4235 cciss_get_max_perf_mode_cmds(h);
8a4ec67b 4236 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
afadbf4b 4237 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4238 /*
afadbf4b 4239 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4240 * Howvever spec says if 0, use 31
4241 */
afadbf4b
SC		 4242 h->max_cmd_sgentries = 31;
4243 if (h->maxsgentries > 512) {
4244 h->max_cmd_sgentries = 32;
4245 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4246 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4247 } else {
afadbf4b
SC		 4248 h->maxsgentries = 31; /* default to traditional values */
4249 h->chainsize = 0;
5c07a311 4250 }
afadbf4b 4251}
5c07a311 4252
501b92cd
SC		 4253static inline bool CISS_signature_present(ctlr_info_t *h)
4254{
4255 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4256 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4257 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4258 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4259 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4260 return false;
1da177e4 4261 }
501b92cd
SC		 4262 return true;
4263}
4264
322e304c
SC		 4265/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4266static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4267{
1da177e4 4268#ifdef CONFIG_X86
322e304c
SC		 4269 u32 prefetch;
4270
4271 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4272 prefetch |= 0x100;
4273 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4274#endif
322e304c 4275}
1da177e4 4276
bfd63ee5
SC		 4277/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4278 * in a prefetch beyond physical memory.
4279 */
4280static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4281{
4282 u32 dma_prefetch;
4283 __u32 dma_refetch;
4284
4285 if (h->board_id != 0x3225103C)
4286 return;
4287 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4288 dma_prefetch |= 0x8000;
4289 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4290 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4291 dma_refetch |= 0x1;
4292 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4293}
4294
f70dba83 4295static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4296{
4809d098 4297 int prod_index, err;
6539fa9b 4298
f70dba83 4299 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4300 if (prod_index < 0)
2ec24ff1 4301 return -ENODEV;
f70dba83
SC		 4302 h->product_name = products[prod_index].product_name;
4303 h->access = *(products[prod_index].access);
1da177e4 4304
f70dba83 4305 if (cciss_board_disabled(h)) {
b2a4a43d 4306 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4307 return -ENODEV;
1da177e4 4308 }
f70dba83 4309 err = pci_enable_device(h->pdev);
7c832835 4310 if (err) {
b2a4a43d 4311 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4312 return err;
f92e2f5f
MM		 4313 }
4314
f70dba83 4315 err = pci_request_regions(h->pdev, "cciss");
4e570309 4316 if (err) {
b2a4a43d
SC		 4317 dev_warn(&h->pdev->dev,
4318 "Cannot obtain PCI resources, aborting\n");
872225ca 4319 return err;
4e570309 4320 }
1da177e4 4321
b2a4a43d
SC		 4322 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4323 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4324
fb86a35b
MM		 4325/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4326 * else we use the IO-APIC interrupt assigned to us by system ROM.
4327 */
f70dba83
SC		 4328 cciss_interrupt_mode(h);
4329 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4330 if (err)
e1438581 4331 goto err_out_free_res;
f70dba83
SC		 4332 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4333 if (!h->vaddr) {
da550321
SC		 4334 err = -ENOMEM;
4335 goto err_out_free_res;
7c832835 4336 }
afa842fa 4337 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4338 if (err)
4e570309 4339 goto err_out_free_res;
f70dba83 4340 err = cciss_find_cfgtables(h);
4809d098 4341 if (err)
4e570309 4342 goto err_out_free_res;
b2a4a43d 4343 print_cfg_table(h);
f70dba83 4344 cciss_find_board_params(h);
1da177e4 4345
f70dba83 4346 if (!CISS_signature_present(h)) {
c33ac89b 4347 err = -ENODEV;
4e570309 4348 goto err_out_free_res;
1da177e4 4349 }
f70dba83
SC		 4350 cciss_enable_scsi_prefetch(h);
4351 cciss_p600_dma_prefetch_quirk(h);
13049537
JH		 4352 err = cciss_enter_simple_mode(h);
4353 if (err)
4354 goto err_out_free_res;
f70dba83 4355 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4356 return 0;
4357
5faad620 4358err_out_free_res:
872225ca
MM		 4359 /*
4360 * Deliberately omit pci_disable_device(): it does something nasty to
4361 * Smart Array controllers that pci_enable_device does not undo
4362 */
f70dba83
SC		 4363 if (h->transtable)
4364 iounmap(h->transtable);
4365 if (h->cfgtable)
4366 iounmap(h->cfgtable);
4367 if (h->vaddr)
4368 iounmap(h->vaddr);
4369 pci_release_regions(h->pdev);
c33ac89b 4370 return err;
1da177e4
LT		 4371}
4372
6ae5ce8e
MM		 4373/* Function to find the first free pointer into our hba[] array
4374 * Returns -1 if no free entries are left.
7c832835 4375 */
b2a4a43d 4376static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4377{
799202cb 4378 int i;
1da177e4 4379
7c832835 4380 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4381 if (!hba[i]) {
f70dba83 4382 ctlr_info_t *h;
f2912a12 4383
f70dba83
SC		 4384 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4385 if (!h)
1da177e4 4386 goto Enomem;
f70dba83 4387 hba[i] = h;
1da177e4
LT		 4388 return i;
4389 }
4390 }
b2a4a43d 4391 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4392 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4393 return -1;
4394Enomem:
b2a4a43d 4395 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4396 return -1;
4397}
4398
f70dba83 4399static void free_hba(ctlr_info_t *h)
1da177e4 4400{
2c935593 4401 int i;
1da177e4 4402
f70dba83 4403 hba[h->ctlr] = NULL;
2c935593
SC		 4404 for (i = 0; i < h->highest_lun + 1; i++)
4405 if (h->gendisk[i] != NULL)
4406 put_disk(h->gendisk[i]);
4407 kfree(h);
1da177e4
LT		 4408}
4409
82eb03cf
CC		 4410/* Send a message CDB to the firmware. */
4411static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4412{
4413 typedef struct {
4414 CommandListHeader_struct CommandHeader;
4415 RequestBlock_struct Request;
4416 ErrDescriptor_struct ErrorDescriptor;
4417 } Command;
4418 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4419 Command *cmd;
4420 dma_addr_t paddr64;
4421 uint32_t paddr32, tag;
4422 void __iomem *vaddr;
4423 int i, err;
4424
4425 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4426 if (vaddr == NULL)
4427 return -ENOMEM;
4428
4429 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4430 CCISS commands, so they must be allocated from the lower 4GiB of
4431 memory. */
e930438c 4432 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4433 if (err) {
4434 iounmap(vaddr);
4435 return -ENOMEM;
4436 }
4437
4438 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4439 if (cmd == NULL) {
4440 iounmap(vaddr);
4441 return -ENOMEM;
4442 }
4443
4444 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4445 although there's no guarantee, we assume that the address is at
4446 least 4-byte aligned (most likely, it's page-aligned). */
4447 paddr32 = paddr64;
4448
4449 cmd->CommandHeader.ReplyQueue = 0;
4450 cmd->CommandHeader.SGList = 0;
4451 cmd->CommandHeader.SGTotal = 0;
4452 cmd->CommandHeader.Tag.lower = paddr32;
4453 cmd->CommandHeader.Tag.upper = 0;
4454 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4455
4456 cmd->Request.CDBLen = 16;
4457 cmd->Request.Type.Type = TYPE_MSG;
4458 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4459 cmd->Request.Type.Direction = XFER_NONE;
4460 cmd->Request.Timeout = 0; /* Don't time out */
4461 cmd->Request.CDB[0] = opcode;
4462 cmd->Request.CDB[1] = type;
4463 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4464
4465 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4466 cmd->ErrorDescriptor.Addr.upper = 0;
4467 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4468
4469 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4470
4471 for (i = 0; i < 10; i++) {
4472 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4473 if ((tag & ~3) == paddr32)
4474 break;
3e28601f 4475 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
82eb03cf
CC		 4476 }
4477
4478 iounmap(vaddr);
4479
4480 /* we leak the DMA buffer here ... no choice since the controller could
4481 still complete the command. */
4482 if (i == 10) {
b2a4a43d
SC		 4483 dev_err(&pdev->dev,
4484 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4485 opcode, type);
4486 return -ETIMEDOUT;
4487 }
4488
4489 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4490
4491 if (tag & 2) {
b2a4a43d 4492 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4493 opcode, type);
4494 return -EIO;
4495 }
4496
b2a4a43d 4497 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4498 opcode, type);
4499 return 0;
4500}
4501
82eb03cf
CC		 4502#define cciss_noop(p) cciss_message(p, 3, 0)
4503
a6528d01 4504static int cciss_controller_hard_reset(struct pci_dev *pdev,
bf2e2e6b 4505 void * __iomem vaddr, u32 use_doorbell)
82eb03cf 4506{
a6528d01
SC		 4507 u16 pmcsr;
4508 int pos;
82eb03cf 4509
a6528d01
SC		 4510 if (use_doorbell) {
4511 /* For everything after the P600, the PCI power state method
4512 * of resetting the controller doesn't work, so we have this
4513 * other way using the doorbell register.
4514 */
4515 dev_info(&pdev->dev, "using doorbell to reset controller\n");
bf2e2e6b 4516 writel(use_doorbell, vaddr + SA5_DOORBELL);
a6528d01
SC		 4517 } else { /* Try to do it the PCI power state way */
4518
4519 /* Quoting from the Open CISS Specification: "The Power
4520 * Management Control/Status Register (CSR) controls the power
4521 * state of the device. The normal operating state is D0,
4522 * CSR=00h. The software off state is D3, CSR=03h. To reset
4523 * the controller, place the interface device in D3 then to D0,
4524 * this causes a secondary PCI reset which will reset the
4525 * controller." */
4526
4527 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4528 if (pos == 0) {
4529 dev_err(&pdev->dev,
4530 "cciss_controller_hard_reset: "
4531 "PCI PM not supported\n");
4532 return -ENODEV;
4533 }
4534 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4535 /* enter the D3hot power management state */
4536 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4537 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4538 pmcsr |= PCI_D3hot;
4539 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4540
a6528d01 4541 msleep(500);
82eb03cf 4542
a6528d01
SC		 4543 /* enter the D0 power management state */
4544 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4545 pmcsr |= PCI_D0;
4546 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
a6528d01
SC		 4547 }
4548 return 0;
4549}
82eb03cf 4550
62710ae1
SC		 4551static __devinit void init_driver_version(char *driver_version, int len)
4552{
4553 memset(driver_version, 0, len);
4554 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4555}
4556
4557static __devinit int write_driver_ver_to_cfgtable(
4558 CfgTable_struct __iomem *cfgtable)
4559{
4560 char *driver_version;
4561 int i, size = sizeof(cfgtable->driver_version);
4562
4563 driver_version = kmalloc(size, GFP_KERNEL);
4564 if (!driver_version)
4565 return -ENOMEM;
4566
4567 init_driver_version(driver_version, size);
4568 for (i = 0; i < size; i++)
4569 writeb(driver_version[i], &cfgtable->driver_version[i]);
4570 kfree(driver_version);
4571 return 0;
4572}
4573
4574static __devinit void read_driver_ver_from_cfgtable(
4575 CfgTable_struct __iomem *cfgtable, unsigned char *driver_ver)
4576{
4577 int i;
4578
4579 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4580 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4581}
4582
4583static __devinit int controller_reset_failed(
4584 CfgTable_struct __iomem *cfgtable)
4585{
4586
4587 char *driver_ver, *old_driver_ver;
4588 int rc, size = sizeof(cfgtable->driver_version);
4589
4590 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4591 if (!old_driver_ver)
4592 return -ENOMEM;
4593 driver_ver = old_driver_ver + size;
4594
4595 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4596 * should have been changed, otherwise we know the reset failed.
4597 */
4598 init_driver_version(old_driver_ver, size);
4599 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4600 rc = !memcmp(driver_ver, old_driver_ver, size);
4601 kfree(old_driver_ver);
4602 return rc;
4603}
4604
a6528d01
SC		 4605/* This does a hard reset of the controller using PCI power management
4606 * states or using the doorbell register. */
4607static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4608{
a6528d01
SC		 4609 u64 cfg_offset;
4610 u32 cfg_base_addr;
4611 u64 cfg_base_addr_index;
4612 void __iomem *vaddr;
4613 unsigned long paddr;
62710ae1 4614 u32 misc_fw_support;
f442e64b 4615 int rc;
a6528d01 4616 CfgTable_struct __iomem *cfgtable;
bf2e2e6b 4617 u32 use_doorbell;
058a0f9f 4618 u32 board_id;
f442e64b 4619 u16 command_register;
a6528d01
SC		 4620
4621 /* For controllers as old a the p600, this is very nearly
4622 * the same thing as
4623 *
4624 * pci_save_state(pci_dev);
4625 * pci_set_power_state(pci_dev, PCI_D3hot);
4626 * pci_set_power_state(pci_dev, PCI_D0);
4627 * pci_restore_state(pci_dev);
4628 *
a6528d01
SC		 4629 * For controllers newer than the P600, the pci power state
4630 * method of resetting doesn't work so we have another way
4631 * using the doorbell register.
4632 */
82eb03cf 4633
058a0f9f
SC		 4634 /* Exclude 640x boards. These are two pci devices in one slot
4635 * which share a battery backed cache module. One controls the
4636 * cache, the other accesses the cache through the one that controls
4637 * it. If we reset the one controlling the cache, the other will
4638 * likely not be happy. Just forbid resetting this conjoined mess.
4639 */
4640 cciss_lookup_board_id(pdev, &board_id);
ec52d5f1 4641 if (!ctlr_is_resettable(board_id)) {
058a0f9f
SC		 4642 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4643 "due to shared cache module.");
82eb03cf
CC		 4644 return -ENODEV;
4645 }
4646
ec52d5f1
SC		 4647 /* if controller is soft- but not hard resettable... */
4648 if (!ctlr_is_hard_resettable(board_id))
4649 return -ENOTSUPP; /* try soft reset later. */
4650
f442e64b
SC		 4651 /* Save the PCI command register */
4652 pci_read_config_word(pdev, 4, &command_register);
4653 /* Turn the board off. This is so that later pci_restore_state()
4654 * won't turn the board on before the rest of config space is ready.
4655 */
4656 pci_disable_device(pdev);
4657 pci_save_state(pdev);
82eb03cf 4658
a6528d01
SC		 4659 /* find the first memory BAR, so we can find the cfg table */
4660 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4661 if (rc)
4662 return rc;
4663 vaddr = remap_pci_mem(paddr, 0x250);
4664 if (!vaddr)
4665 return -ENOMEM;
82eb03cf 4666
a6528d01
SC		 4667 /* find cfgtable in order to check if reset via doorbell is supported */
4668 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4669 &cfg_base_addr_index, &cfg_offset);
4670 if (rc)
4671 goto unmap_vaddr;
4672 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4673 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4674 if (!cfgtable) {
4675 rc = -ENOMEM;
4676 goto unmap_vaddr;
4677 }
62710ae1
SC		 4678 rc = write_driver_ver_to_cfgtable(cfgtable);
4679 if (rc)
4680 goto unmap_vaddr;
82eb03cf 4681
bf2e2e6b
SC		 4682 /* If reset via doorbell register is supported, use that.
4683 * There are two such methods. Favor the newest method.
75230ff2 4684 */
bf2e2e6b
SC		 4685 misc_fw_support = readl(&cfgtable->misc_fw_support);
4686 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4687 if (use_doorbell) {
4688 use_doorbell = DOORBELL_CTLR_RESET2;
4689 } else {
4690 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
063d2cf7
SC		 4691 if (use_doorbell) {
4692 dev_warn(&pdev->dev, "Controller claims that "
4693 "'Bit 2 doorbell reset' is "
4694 "supported, but not 'bit 5 doorbell reset'. "
4695 "Firmware update is recommended.\n");
4696 rc = -ENOTSUPP; /* use the soft reset */
4697 goto unmap_cfgtable;
4698 }
bf2e2e6b 4699 }
75230ff2 4700
a6528d01
SC		 4701 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4702 if (rc)
4703 goto unmap_cfgtable;
f442e64b
SC		 4704 pci_restore_state(pdev);
4705 rc = pci_enable_device(pdev);
4706 if (rc) {
4707 dev_warn(&pdev->dev, "failed to enable device.\n");
4708 goto unmap_cfgtable;
82eb03cf 4709 }
f442e64b 4710 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4711
a6528d01
SC		 4712 /* Some devices (notably the HP Smart Array 5i Controller)
4713 need a little pause here */
4714 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4715
afa842fa 4716 /* Wait for board to become not ready, then ready. */
59ec86bb 4717 dev_info(&pdev->dev, "Waiting for board to reset.\n");
afa842fa 4718 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
5afe2781
SC		 4719 if (rc) {
4720 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4721 " Will try soft reset.\n");
4722 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4723 goto unmap_cfgtable;
4724 }
afa842fa
SC		 4725 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4726 if (rc) {
4727 dev_warn(&pdev->dev,
5afe2781
SC		 4728 "failed waiting for board to become ready "
4729 "after hard reset\n");
afa842fa
SC		 4730 goto unmap_cfgtable;
4731 }
afa842fa 4732
62710ae1
SC		 4733 rc = controller_reset_failed(vaddr);
4734 if (rc < 0)
4735 goto unmap_cfgtable;
4736 if (rc) {
5afe2781
SC		 4737 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4738 "controller. Will try soft reset.\n");
4739 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
62710ae1 4740 } else {
5afe2781 4741 dev_info(&pdev->dev, "Board ready after hard reset.\n");
a6528d01
SC		 4742 }
4743
4744unmap_cfgtable:
4745 iounmap(cfgtable);
4746
4747unmap_vaddr:
4748 iounmap(vaddr);
4749 return rc;
82eb03cf
CC		 4750}
4751
83123cb1
SC		 4752static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4753{
a6528d01 4754 int rc, i;
83123cb1
SC		 4755
4756 if (!reset_devices)
4757 return 0;
4758
a6528d01
SC		 4759 /* Reset the controller with a PCI power-cycle or via doorbell */
4760 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4761
a6528d01
SC		 4762 /* -ENOTSUPP here means we cannot reset the controller
4763 * but it's already (and still) up and running in
058a0f9f
SC		 4764 * "performant mode". Or, it might be 640x, which can't reset
4765 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4766 */
4767 if (rc == -ENOTSUPP)
5afe2781 4768 return rc; /* just try to do the kdump anyhow. */
a6528d01
SC		 4769 if (rc)
4770 return -ENODEV;
83123cb1
SC		 4771
4772 /* Now try to get the controller to respond to a no-op */
59ec86bb 4773 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
83123cb1
SC		 4774 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4775 if (cciss_noop(pdev) == 0)
4776 break;
4777 else
4778 dev_warn(&pdev->dev, "no-op failed%s\n",
4779 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4780 "; re-trying" : ""));
4781 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4782 }
82eb03cf
CC		 4783 return 0;
4784}
4785
54dae343
SC		 4786static __devinit int cciss_allocate_cmd_pool(ctlr_info_t *h)
4787{
4788 h->cmd_pool_bits = kmalloc(
4789 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4790 sizeof(unsigned long), GFP_KERNEL);
4791 h->cmd_pool = pci_alloc_consistent(h->pdev,
4792 h->nr_cmds * sizeof(CommandList_struct),
4793 &(h->cmd_pool_dhandle));
4794 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4795 h->nr_cmds * sizeof(ErrorInfo_struct),
4796 &(h->errinfo_pool_dhandle));
4797 if ((h->cmd_pool_bits == NULL)
4798 || (h->cmd_pool == NULL)
4799 || (h->errinfo_pool == NULL)) {
4800 dev_err(&h->pdev->dev, "out of memory");
4801 return -ENOMEM;
4802 }
4803 return 0;
4804}
4805
abf7966e
SC		 4806static __devinit int cciss_allocate_scatterlists(ctlr_info_t *h)
4807{
4808 int i;
4809
4810 /* zero it, so that on free we need not know how many were alloc'ed */
4811 h->scatter_list = kzalloc(h->max_commands *
4812 sizeof(struct scatterlist *), GFP_KERNEL);
4813 if (!h->scatter_list)
4814 return -ENOMEM;
4815
4816 for (i = 0; i < h->nr_cmds; i++) {
4817 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4818 h->maxsgentries, GFP_KERNEL);
4819 if (h->scatter_list[i] == NULL) {
4820 dev_err(&h->pdev->dev, "could not allocate "
4821 "s/g lists\n");
4822 return -ENOMEM;
4823 }
4824 }
4825 return 0;
4826}
4827
4828static void cciss_free_scatterlists(ctlr_info_t *h)
4829{
4830 int i;
4831
4832 if (h->scatter_list) {
4833 for (i = 0; i < h->nr_cmds; i++)
4834 kfree(h->scatter_list[i]);
4835 kfree(h->scatter_list);
4836 }
4837}
4838
54dae343
SC		 4839static void cciss_free_cmd_pool(ctlr_info_t *h)
4840{
4841 kfree(h->cmd_pool_bits);
4842 if (h->cmd_pool)
4843 pci_free_consistent(h->pdev,
4844 h->nr_cmds * sizeof(CommandList_struct),
4845 h->cmd_pool, h->cmd_pool_dhandle);
4846 if (h->errinfo_pool)
4847 pci_free_consistent(h->pdev,
4848 h->nr_cmds * sizeof(ErrorInfo_struct),
4849 h->errinfo_pool, h->errinfo_pool_dhandle);
4850}
4851
2b48085f
SC		 4852static int cciss_request_irq(ctlr_info_t *h,
4853 irqreturn_t (*msixhandler)(int, void *),
4854 irqreturn_t (*intxhandler)(int, void *))
4855{
4856 if (h->msix_vector || h->msi_vector) {
13049537 4857 if (!request_irq(h->intr[h->intr_mode], msixhandler,
2b48085f
SC		 4858 IRQF_DISABLED, h->devname, h))
4859 return 0;
4860 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
13049537 4861 " for %s\n", h->intr[h->intr_mode],
2b48085f
SC		 4862 h->devname);
4863 return -1;
4864 }
4865
13049537 4866 if (!request_irq(h->intr[h->intr_mode], intxhandler,
2b48085f
SC		 4867 IRQF_DISABLED, h->devname, h))
4868 return 0;
4869 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
13049537 4870 h->intr[h->intr_mode], h->devname);
2b48085f
SC		 4871 return -1;
4872}
4873
5afe2781
SC		 4874static int __devinit cciss_kdump_soft_reset(ctlr_info_t *h)
4875{
4876 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4877 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4878 return -EIO;
4879 }
4880
4881 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4882 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4883 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4884 return -1;
4885 }
4886
4887 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4888 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4889 dev_warn(&h->pdev->dev, "Board failed to become ready "
4890 "after soft reset.\n");
4891 return -1;
4892 }
4893
4894 return 0;
4895}
4896
4897static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4898{
4899 int ctlr = h->ctlr;
4900
13049537 4901 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 4902#ifdef CONFIG_PCI_MSI
4903 if (h->msix_vector)
4904 pci_disable_msix(h->pdev);
4905 else if (h->msi_vector)
4906 pci_disable_msi(h->pdev);
4907#endif /* CONFIG_PCI_MSI */
4908 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4909 cciss_free_scatterlists(h);
4910 cciss_free_cmd_pool(h);
4911 kfree(h->blockFetchTable);
4912 if (h->reply_pool)
4913 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4914 h->reply_pool, h->reply_pool_dhandle);
4915 if (h->transtable)
4916 iounmap(h->transtable);
4917 if (h->cfgtable)
4918 iounmap(h->cfgtable);
4919 if (h->vaddr)
4920 iounmap(h->vaddr);
4921 unregister_blkdev(h->major, h->devname);
4922 cciss_destroy_hba_sysfs_entry(h);
4923 pci_release_regions(h->pdev);
4924 kfree(h);
4925 hba[ctlr] = NULL;
4926}
4927
1da177e4
LT		 4928/*
4929 * This is it. Find all the controllers and register them. I really hate
4930 * stealing all these major device numbers.
4931 * returns the number of block devices registered.
4932 */
4933static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4934 const struct pci_device_id *ent)
1da177e4 4935{
1da177e4 4936 int i;
799202cb 4937 int j = 0;
1da177e4 4938 int rc;
5afe2781 4939 int try_soft_reset = 0;
22bece00 4940 int dac, return_code;
212a5026 4941 InquiryData_struct *inq_buff;
f70dba83 4942 ctlr_info_t *h;
5afe2781 4943 unsigned long flags;
1da177e4 4944
83123cb1 4945 rc = cciss_init_reset_devices(pdev);
5afe2781
SC		 4946 if (rc) {
4947 if (rc != -ENOTSUPP)
4948 return rc;
4949 /* If the reset fails in a particular way (it has no way to do
4950 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4951 * a soft reset once we get the controller configured up to the
4952 * point that it can accept a command.
4953 */
4954 try_soft_reset = 1;
4955 rc = 0;
4956 }
4957
4958reinit_after_soft_reset:
4959
b2a4a43d 4960 i = alloc_cciss_hba(pdev);
7c832835 4961 if (i < 0)
e2019b58 4962 return -1;
1f8ef380 4963
f70dba83
SC		 4964 h = hba[i];
4965 h->pdev = pdev;
4966 h->busy_initializing = 1;
13049537 4967 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
e6e1ee93
JA		 4968 INIT_LIST_HEAD(&h->cmpQ);
4969 INIT_LIST_HEAD(&h->reqQ);
f70dba83 4970 mutex_init(&h->busy_shutting_down);
1f8ef380 4971
f70dba83 4972 if (cciss_pci_init(h) != 0)
2cfa948c 4973 goto clean_no_release_regions;
1da177e4 4974
f70dba83
SC		 4975 sprintf(h->devname, "cciss%d", i);
4976 h->ctlr = i;
1da177e4 4977
8a4ec67b
SC		 4978 if (cciss_tape_cmds < 2)
4979 cciss_tape_cmds = 2;
4980 if (cciss_tape_cmds > 16)
4981 cciss_tape_cmds = 16;
4982
f70dba83 4983 init_completion(&h->scan_wait);
b368c9dd 4984
f70dba83 4985 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4986 goto clean0;
4987
1da177e4 4988 /* configure PCI DMA stuff */
6a35528a 4989 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4990 dac = 1;
284901a9 4991 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4992 dac = 0;
1da177e4 4993 else {
b2a4a43d 4994 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4995 goto clean1;
4996 }
4997
4998 /*
4999 * register with the major number, or get a dynamic major number
5000 * by passing 0 as argument. This is done for greater than
5001 * 8 controller support.
5002 */
5003 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 5004 h->major = COMPAQ_CISS_MAJOR + i;
5005 rc = register_blkdev(h->major, h->devname);
7c832835 5006 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 5007 dev_err(&h->pdev->dev,
5008 "Unable to get major number %d for %s "
f70dba83 5009 "on hba %d\n", h->major, h->devname, i);
1da177e4 5010 goto clean1;
7c832835 5011 } else {
1da177e4 5012 if (i >= MAX_CTLR_ORIG)
f70dba83 5013 h->major = rc;
1da177e4
LT		 5014 }
5015
5016 /* make sure the board interrupts are off */
f70dba83 5017 h->access.set_intr_mask(h, CCISS_INTR_OFF);
2b48085f
SC		 5018 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5019 if (rc)
5020 goto clean2;
40aabb58 5021
b2a4a43d 5022 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83 5023 h->devname, pdev->device, pci_name(pdev),
13049537 5024 h->intr[h->intr_mode], dac ? "" : " not");
7c832835 5025
54dae343 5026 if (cciss_allocate_cmd_pool(h))
1da177e4 5027 goto clean4;
5c07a311 5028
abf7966e 5029 if (cciss_allocate_scatterlists(h))
4ee69851
DC		 5030 goto clean4;
5031
f70dba83
SC		 5032 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5033 h->chainsize, h->nr_cmds);
5034 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 5035 goto clean4;
5c07a311 5036
f70dba83 5037 spin_lock_init(&h->lock);
1da177e4 5038
7c832835 5039 /* Initialize the pdev driver private data.
f70dba83
SC		 5040 have it point to h. */
5041 pci_set_drvdata(pdev, h);
7c832835
BH		 5042 /* command and error info recs zeroed out before
5043 they are used */
f70dba83
SC		 5044 memset(h->cmd_pool_bits, 0,
5045 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 5046 * sizeof(unsigned long));
1da177e4 5047
f70dba83
SC		 5048 h->num_luns = 0;
5049 h->highest_lun = -1;
6ae5ce8e 5050 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 5051 h->drv[j] = NULL;
5052 h->gendisk[j] = NULL;
6ae5ce8e 5053 }
1da177e4 5054
5afe2781
SC		 5055 /* At this point, the controller is ready to take commands.
5056 * Now, if reset_devices and the hard reset didn't work, try
5057 * the soft reset and see if that works.
5058 */
5059 if (try_soft_reset) {
5060
5061 /* This is kind of gross. We may or may not get a completion
5062 * from the soft reset command, and if we do, then the value
5063 * from the fifo may or may not be valid. So, we wait 10 secs
5064 * after the reset throwing away any completions we get during
5065 * that time. Unregister the interrupt handler and register
5066 * fake ones to scoop up any residual completions.
5067 */
5068 spin_lock_irqsave(&h->lock, flags);
5069 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5070 spin_unlock_irqrestore(&h->lock, flags);
13049537 5071 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 5072 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5073 cciss_intx_discard_completions);
5074 if (rc) {
5075 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5076 "soft reset.\n");
5077 goto clean4;
5078 }
5079
5080 rc = cciss_kdump_soft_reset(h);
5081 if (rc) {
5082 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5083 goto clean4;
5084 }
5085
5086 dev_info(&h->pdev->dev, "Board READY.\n");
5087 dev_info(&h->pdev->dev,
5088 "Waiting for stale completions to drain.\n");
5089 h->access.set_intr_mask(h, CCISS_INTR_ON);
5090 msleep(10000);
5091 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5092
5093 rc = controller_reset_failed(h->cfgtable);
5094 if (rc)
5095 dev_info(&h->pdev->dev,
5096 "Soft reset appears to have failed.\n");
5097
5098 /* since the controller's reset, we have to go back and re-init
5099 * everything. Easiest to just forget what we've done and do it
5100 * all over again.
5101 */
5102 cciss_undo_allocations_after_kdump_soft_reset(h);
5103 try_soft_reset = 0;
5104 if (rc)
5105 /* don't go to clean4, we already unallocated */
5106 return -ENODEV;
5107
5108 goto reinit_after_soft_reset;
5109 }
5110
f70dba83 5111 cciss_scsi_setup(h);
1da177e4
LT		 5112
5113 /* Turn the interrupts on so we can service requests */
f70dba83 5114 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 5115
22bece00
MM		 5116 /* Get the firmware version */
5117 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5118 if (inq_buff == NULL) {
b2a4a43d 5119 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 5120 goto clean4;
5121 }
5122
f70dba83 5123 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 5124 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 5125 if (return_code == IO_OK) {
f70dba83
SC		 5126 h->firm_ver[0] = inq_buff->data_byte[32];
5127 h->firm_ver[1] = inq_buff->data_byte[33];
5128 h->firm_ver[2] = inq_buff->data_byte[34];
5129 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 5130 } else { /* send command failed */
b2a4a43d 5131 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 5132 " version of controller\n");
5133 }
212a5026 5134 kfree(inq_buff);
22bece00 5135
f70dba83 5136 cciss_procinit(h);
92c4231a 5137
f70dba83 5138 h->cciss_max_sectors = 8192;
92c4231a 5139
f70dba83
SC		 5140 rebuild_lun_table(h, 1, 0);
5141 h->busy_initializing = 0;
e2019b58 5142 return 1;
1da177e4 5143
6ae5ce8e 5144clean4:
54dae343 5145 cciss_free_cmd_pool(h);
abf7966e 5146 cciss_free_scatterlists(h);
f70dba83 5147 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
13049537 5148 free_irq(h->intr[h->intr_mode], h);
6ae5ce8e 5149clean2:
f70dba83 5150 unregister_blkdev(h->major, h->devname);
6ae5ce8e 5151clean1:
f70dba83 5152 cciss_destroy_hba_sysfs_entry(h);
7fe06326 5153clean0:
2cfa948c
SC		 5154 pci_release_regions(pdev);
5155clean_no_release_regions:
f70dba83 5156 h->busy_initializing = 0;
9cef0d2f 5157
872225ca
MM		 5158 /*
5159 * Deliberately omit pci_disable_device(): it does something nasty to
5160 * Smart Array controllers that pci_enable_device does not undo
5161 */
799202cb 5162 pci_set_drvdata(pdev, NULL);
f70dba83 5163 free_hba(h);
e2019b58 5164 return -1;
1da177e4
LT		 5165}
5166
e9ca75b5 5167static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 5168{
29009a03
SC		 5169 ctlr_info_t *h;
5170 char *flush_buf;
7c832835 5171 int return_code;
1da177e4 5172
29009a03
SC		 5173 h = pci_get_drvdata(pdev);
5174 flush_buf = kzalloc(4, GFP_KERNEL);
5175 if (!flush_buf) {
b2a4a43d 5176 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 5177 return;
e9ca75b5 5178 }
29009a03
SC		 5179 /* write all data in the battery backed cache to disk */
5180 memset(flush_buf, 0, 4);
f70dba83 5181 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 5182 4, 0, CTLR_LUNID, TYPE_CMD);
5183 kfree(flush_buf);
5184 if (return_code != IO_OK)
b2a4a43d 5185 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 5186 h->access.set_intr_mask(h, CCISS_INTR_OFF);
13049537 5187 free_irq(h->intr[h->intr_mode], h);
e9ca75b5
GB		 5188}
5189
13049537
JH		 5190static int __devinit cciss_enter_simple_mode(struct ctlr_info *h)
5191{
5192 u32 trans_support;
5193
5194 trans_support = readl(&(h->cfgtable->TransportSupport));
5195 if (!(trans_support & SIMPLE_MODE))
5196 return -ENOTSUPP;
5197
5198 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5199 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5200 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5201 cciss_wait_for_mode_change_ack(h);
5202 print_cfg_table(h);
5203 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5204 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5205 return -ENODEV;
5206 }
5207 h->transMethod = CFGTBL_Trans_Simple;
5208 return 0;
5209}
5210
5211
e9ca75b5
GB		 5212static void __devexit cciss_remove_one(struct pci_dev *pdev)
5213{
f70dba83 5214 ctlr_info_t *h;
e9ca75b5
GB		 5215 int i, j;
5216
7c832835 5217 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 5218 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 5219 return;
5220 }
0a9279cc 5221
f70dba83
SC		 5222 h = pci_get_drvdata(pdev);
5223 i = h->ctlr;
7c832835 5224 if (hba[i] == NULL) {
b2a4a43d 5225 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 5226 return;
5227 }
b6550777 5228
f70dba83 5229 mutex_lock(&h->busy_shutting_down);
0a9279cc 5230
f70dba83
SC		 5231 remove_from_scan_list(h);
5232 remove_proc_entry(h->devname, proc_cciss);
5233 unregister_blkdev(h->major, h->devname);
b6550777
BH		 5234
5235 /* remove it from the disk list */
5236 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 5237 struct gendisk *disk = h->gendisk[j];
b6550777 5238 if (disk) {
165125e1 5239 struct request_queue *q = disk->queue;
b6550777 5240
097d0264 5241 if (disk->flags & GENHD_FL_UP) {
f70dba83 5242 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 5243 del_gendisk(disk);
097d0264 5244 }
b6550777
BH		 5245 if (q)
5246 blk_cleanup_queue(q);
5247 }
5248 }
5249
ba198efb 5250#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 5251 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 5252#endif
b6550777 5253
e9ca75b5 5254 cciss_shutdown(pdev);
fb86a35b
MM		 5255
5256#ifdef CONFIG_PCI_MSI
f70dba83
SC		 5257 if (h->msix_vector)
5258 pci_disable_msix(h->pdev);
5259 else if (h->msi_vector)
5260 pci_disable_msi(h->pdev);
7c832835 5261#endif /* CONFIG_PCI_MSI */
fb86a35b 5262
f70dba83
SC		 5263 iounmap(h->transtable);
5264 iounmap(h->cfgtable);
5265 iounmap(h->vaddr);
1da177e4 5266
54dae343 5267 cciss_free_cmd_pool(h);
5c07a311 5268 /* Free up sg elements */
f70dba83
SC		 5269 for (j = 0; j < h->nr_cmds; j++)
5270 kfree(h->scatter_list[j]);
5271 kfree(h->scatter_list);
5272 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
e363e014
SC		 5273 kfree(h->blockFetchTable);
5274 if (h->reply_pool)
5275 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5276 h->reply_pool, h->reply_pool_dhandle);
872225ca
MM		 5277 /*
5278 * Deliberately omit pci_disable_device(): it does something nasty to
5279 * Smart Array controllers that pci_enable_device does not undo
5280 */
7c832835 5281 pci_release_regions(pdev);
4e570309 5282 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 5283 cciss_destroy_hba_sysfs_entry(h);
5284 mutex_unlock(&h->busy_shutting_down);
5285 free_hba(h);
7c832835 5286}
1da177e4
LT		 5287
5288static struct pci_driver cciss_pci_driver = {
7c832835
BH		 5289 .name = "cciss",
5290 .probe = cciss_init_one,
5291 .remove = __devexit_p(cciss_remove_one),
5292 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 5293 .shutdown = cciss_shutdown,
1da177e4
LT		 5294};
5295
5296/*
5297 * This is it. Register the PCI driver information for the cards we control
7c832835 5298 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 5299 */
5300static int __init cciss_init(void)
5301{
7fe06326
AP		 5302 int err;
5303
10cbda97
JA		 5304 /*
5305 * The hardware requires that commands are aligned on a 64-bit
5306 * boundary. Given that we use pci_alloc_consistent() to allocate an
5307 * array of them, the size must be a multiple of 8 bytes.
5308 */
1b7d0d28 5309 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 5310 printk(KERN_INFO DRIVER_NAME "\n");
5311
7fe06326
AP		 5312 err = bus_register(&cciss_bus_type);
5313 if (err)
5314 return err;
5315
b368c9dd
AP		 5316 /* Start the scan thread */
5317 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5318 if (IS_ERR(cciss_scan_thread)) {
5319 err = PTR_ERR(cciss_scan_thread);
5320 goto err_bus_unregister;
5321 }
5322
1da177e4 5323 /* Register for our PCI devices */
7fe06326
AP		 5324 err = pci_register_driver(&cciss_pci_driver);
5325 if (err)
b368c9dd 5326 goto err_thread_stop;
7fe06326 5327
617e1344 5328 return err;
7fe06326 5329
b368c9dd
AP		 5330err_thread_stop:
5331 kthread_stop(cciss_scan_thread);
5332err_bus_unregister:
7fe06326 5333 bus_unregister(&cciss_bus_type);
b368c9dd 5334
7fe06326 5335 return err;
1da177e4
LT		 5336}
5337
5338static void __exit cciss_cleanup(void)
5339{
5340 int i;
5341
5342 pci_unregister_driver(&cciss_pci_driver);
5343 /* double check that all controller entrys have been removed */
7c832835
BH		 5344 for (i = 0; i < MAX_CTLR; i++) {
5345 if (hba[i] != NULL) {
b2a4a43d
SC		 5346 dev_warn(&hba[i]->pdev->dev,
5347 "had to remove controller\n");
1da177e4
LT		 5348 cciss_remove_one(hba[i]->pdev);
5349 }
5350 }
b368c9dd 5351 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 5352 if (proc_cciss)
5353 remove_proc_entry("driver/cciss", NULL);
7fe06326 5354 bus_unregister(&cciss_bus_type);
1da177e4
LT		 5355}
5356
5357module_init(cciss_init);
5358module_exit(cciss_cleanup);
Linux kernel - Deliverables
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