Commit | Line | Data |
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1da177e4 | 1 | /* |
bd4f36d6 MM |
2 | * Disk Array driver for HP Smart Array controllers. |
3 | * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P. | |
1da177e4 LT |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
bd4f36d6 | 7 | * the Free Software Foundation; version 2 of the License. |
1da177e4 LT |
8 | * |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
bd4f36d6 MM |
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | * General Public License for more details. | |
1da177e4 LT |
13 | * |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
bd4f36d6 MM |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
17 | * 02111-1307, USA. | |
1da177e4 LT |
18 | * |
19 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/fs.h> | |
32 | #include <linux/bio.h> | |
33 | #include <linux/blkpg.h> | |
34 | #include <linux/timer.h> | |
35 | #include <linux/proc_fs.h> | |
89b6e743 | 36 | #include <linux/seq_file.h> |
7c832835 | 37 | #include <linux/init.h> |
4d761609 | 38 | #include <linux/jiffies.h> |
1da177e4 LT |
39 | #include <linux/hdreg.h> |
40 | #include <linux/spinlock.h> | |
41 | #include <linux/compat.h> | |
b368c9dd | 42 | #include <linux/mutex.h> |
1da177e4 LT |
43 | #include <asm/uaccess.h> |
44 | #include <asm/io.h> | |
45 | ||
eb0df996 | 46 | #include <linux/dma-mapping.h> |
1da177e4 LT |
47 | #include <linux/blkdev.h> |
48 | #include <linux/genhd.h> | |
49 | #include <linux/completion.h> | |
d5d3b736 | 50 | #include <scsi/scsi.h> |
03bbfee5 MMOD |
51 | #include <scsi/sg.h> |
52 | #include <scsi/scsi_ioctl.h> | |
53 | #include <linux/cdrom.h> | |
231bc2a2 | 54 | #include <linux/scatterlist.h> |
0a9279cc | 55 | #include <linux/kthread.h> |
1da177e4 LT |
56 | |
57 | #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) | |
841fdffd MM |
58 | #define DRIVER_NAME "HP CISS Driver (v 3.6.26)" |
59 | #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26) | |
1da177e4 LT |
60 | |
61 | /* Embedded module documentation macros - see modules.h */ | |
62 | MODULE_AUTHOR("Hewlett-Packard Company"); | |
24aac480 | 63 | MODULE_DESCRIPTION("Driver for HP Smart Array Controllers"); |
841fdffd MM |
64 | MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); |
65 | MODULE_VERSION("3.6.26"); | |
1da177e4 LT |
66 | MODULE_LICENSE("GPL"); |
67 | ||
2a48fc0a | 68 | static DEFINE_MUTEX(cciss_mutex); |
bbe425cd | 69 | static struct proc_dir_entry *proc_cciss; |
2ec24ff1 | 70 | |
1da177e4 LT |
71 | #include "cciss_cmd.h" |
72 | #include "cciss.h" | |
73 | #include <linux/cciss_ioctl.h> | |
74 | ||
75 | /* define the PCI info for the cards we can control */ | |
76 | static const struct pci_device_id cciss_pci_device_id[] = { | |
f82ccdb9 BH |
77 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070}, |
78 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080}, | |
79 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082}, | |
80 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083}, | |
81 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091}, | |
82 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A}, | |
83 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B}, | |
84 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C}, | |
85 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D}, | |
86 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225}, | |
87 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223}, | |
88 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234}, | |
89 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235}, | |
90 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211}, | |
91 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212}, | |
92 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213}, | |
93 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214}, | |
94 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215}, | |
de923916 | 95 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237}, |
9cff3b38 | 96 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D}, |
1da177e4 LT |
97 | {0,} |
98 | }; | |
7c832835 | 99 | |
1da177e4 LT |
100 | MODULE_DEVICE_TABLE(pci, cciss_pci_device_id); |
101 | ||
1da177e4 LT |
102 | /* board_id = Subsystem Device ID & Vendor ID |
103 | * product = Marketing Name for the board | |
7c832835 | 104 | * access = Address of the struct of function pointers |
1da177e4 LT |
105 | */ |
106 | static struct board_type products[] = { | |
49153998 MM |
107 | {0x40700E11, "Smart Array 5300", &SA5_access}, |
108 | {0x40800E11, "Smart Array 5i", &SA5B_access}, | |
109 | {0x40820E11, "Smart Array 532", &SA5B_access}, | |
110 | {0x40830E11, "Smart Array 5312", &SA5B_access}, | |
111 | {0x409A0E11, "Smart Array 641", &SA5_access}, | |
112 | {0x409B0E11, "Smart Array 642", &SA5_access}, | |
113 | {0x409C0E11, "Smart Array 6400", &SA5_access}, | |
114 | {0x409D0E11, "Smart Array 6400 EM", &SA5_access}, | |
115 | {0x40910E11, "Smart Array 6i", &SA5_access}, | |
116 | {0x3225103C, "Smart Array P600", &SA5_access}, | |
4205df34 SC |
117 | {0x3223103C, "Smart Array P800", &SA5_access}, |
118 | {0x3234103C, "Smart Array P400", &SA5_access}, | |
49153998 MM |
119 | {0x3235103C, "Smart Array P400i", &SA5_access}, |
120 | {0x3211103C, "Smart Array E200i", &SA5_access}, | |
121 | {0x3212103C, "Smart Array E200", &SA5_access}, | |
122 | {0x3213103C, "Smart Array E200i", &SA5_access}, | |
123 | {0x3214103C, "Smart Array E200i", &SA5_access}, | |
124 | {0x3215103C, "Smart Array E200i", &SA5_access}, | |
125 | {0x3237103C, "Smart Array E500", &SA5_access}, | |
2ec24ff1 SC |
126 | {0x3223103C, "Smart Array P800", &SA5_access}, |
127 | {0x3234103C, "Smart Array P400", &SA5_access}, | |
49153998 | 128 | {0x323D103C, "Smart Array P700m", &SA5_access}, |
1da177e4 LT |
129 | }; |
130 | ||
d14c4ab5 | 131 | /* How long to wait (in milliseconds) for board to go into simple mode */ |
7c832835 | 132 | #define MAX_CONFIG_WAIT 30000 |
1da177e4 LT |
133 | #define MAX_IOCTL_CONFIG_WAIT 1000 |
134 | ||
135 | /*define how many times we will try a command because of bus resets */ | |
136 | #define MAX_CMD_RETRIES 3 | |
137 | ||
1da177e4 LT |
138 | #define MAX_CTLR 32 |
139 | ||
140 | /* Originally cciss driver only supports 8 major numbers */ | |
141 | #define MAX_CTLR_ORIG 8 | |
142 | ||
1da177e4 LT |
143 | static ctlr_info_t *hba[MAX_CTLR]; |
144 | ||
b368c9dd AP |
145 | static struct task_struct *cciss_scan_thread; |
146 | static DEFINE_MUTEX(scan_mutex); | |
147 | static LIST_HEAD(scan_q); | |
148 | ||
165125e1 | 149 | static void do_cciss_request(struct request_queue *q); |
0c2b3908 MM |
150 | static irqreturn_t do_cciss_intx(int irq, void *dev_id); |
151 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id); | |
ef7822c2 | 152 | static int cciss_open(struct block_device *bdev, fmode_t mode); |
6e9624b8 | 153 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode); |
ef7822c2 | 154 | static int cciss_release(struct gendisk *disk, fmode_t mode); |
8a6cfeb6 AB |
155 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
156 | unsigned int cmd, unsigned long arg); | |
ef7822c2 | 157 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
7c832835 | 158 | unsigned int cmd, unsigned long arg); |
a885c8c4 | 159 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo); |
1da177e4 | 160 | |
1da177e4 | 161 | static int cciss_revalidate(struct gendisk *disk); |
2d11d993 | 162 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl); |
a0ea8622 | 163 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
2d11d993 | 164 | int clear_all, int via_ioctl); |
1da177e4 | 165 | |
f70dba83 | 166 | static void cciss_read_capacity(ctlr_info_t *h, int logvol, |
00988a35 | 167 | sector_t *total_size, unsigned int *block_size); |
f70dba83 | 168 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
00988a35 | 169 | sector_t *total_size, unsigned int *block_size); |
f70dba83 | 170 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
7b838bde | 171 | sector_t total_size, |
00988a35 | 172 | unsigned int block_size, InquiryData_struct *inq_buff, |
7c832835 | 173 | drive_info_struct *drv); |
dac5488a | 174 | static void __devinit cciss_interrupt_mode(ctlr_info_t *); |
7c832835 | 175 | static void start_io(ctlr_info_t *h); |
f70dba83 | 176 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
b57695fe | 177 | __u8 page_code, unsigned char scsi3addr[], |
178 | int cmd_type); | |
85cc61ae | 179 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, |
180 | int attempt_retry); | |
181 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c); | |
1da177e4 | 182 | |
d6f4965d | 183 | static int add_to_scan_list(struct ctlr_info *h); |
0a9279cc MM |
184 | static int scan_thread(void *data); |
185 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c); | |
617e1344 SC |
186 | static void cciss_hba_release(struct device *dev); |
187 | static void cciss_device_release(struct device *dev); | |
361e9b07 | 188 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index); |
9cef0d2f | 189 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index); |
29979a71 | 190 | static inline u32 next_command(ctlr_info_t *h); |
a6528d01 SC |
191 | static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, |
192 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | |
193 | u64 *cfg_offset); | |
194 | static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, | |
195 | unsigned long *memory_bar); | |
196 | ||
33079b21 | 197 | |
5e216153 MM |
198 | /* performant mode helper functions */ |
199 | static void calc_bucket_map(int *bucket, int num_buckets, int nsgs, | |
200 | int *bucket_map); | |
201 | static void cciss_put_controller_into_performant_mode(ctlr_info_t *h); | |
33079b21 | 202 | |
1da177e4 | 203 | #ifdef CONFIG_PROC_FS |
f70dba83 | 204 | static void cciss_procinit(ctlr_info_t *h); |
1da177e4 | 205 | #else |
f70dba83 | 206 | static void cciss_procinit(ctlr_info_t *h) |
7c832835 BH |
207 | { |
208 | } | |
209 | #endif /* CONFIG_PROC_FS */ | |
1da177e4 LT |
210 | |
211 | #ifdef CONFIG_COMPAT | |
ef7822c2 AV |
212 | static int cciss_compat_ioctl(struct block_device *, fmode_t, |
213 | unsigned, unsigned long); | |
1da177e4 LT |
214 | #endif |
215 | ||
83d5cde4 | 216 | static const struct block_device_operations cciss_fops = { |
7c832835 | 217 | .owner = THIS_MODULE, |
6e9624b8 | 218 | .open = cciss_unlocked_open, |
ef7822c2 | 219 | .release = cciss_release, |
8a6cfeb6 | 220 | .ioctl = do_ioctl, |
7c832835 | 221 | .getgeo = cciss_getgeo, |
1da177e4 | 222 | #ifdef CONFIG_COMPAT |
ef7822c2 | 223 | .compat_ioctl = cciss_compat_ioctl, |
1da177e4 | 224 | #endif |
7c832835 | 225 | .revalidate_disk = cciss_revalidate, |
1da177e4 LT |
226 | }; |
227 | ||
5e216153 MM |
228 | /* set_performant_mode: Modify the tag for cciss performant |
229 | * set bit 0 for pull model, bits 3-1 for block fetch | |
230 | * register number | |
231 | */ | |
232 | static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c) | |
233 | { | |
234 | if (likely(h->transMethod == CFGTBL_Trans_Performant)) | |
235 | c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); | |
236 | } | |
237 | ||
1da177e4 LT |
238 | /* |
239 | * Enqueuing and dequeuing functions for cmdlists. | |
240 | */ | |
e6e1ee93 | 241 | static inline void addQ(struct list_head *list, CommandList_struct *c) |
1da177e4 | 242 | { |
e6e1ee93 | 243 | list_add_tail(&c->list, list); |
1da177e4 LT |
244 | } |
245 | ||
8a3173de | 246 | static inline void removeQ(CommandList_struct *c) |
1da177e4 | 247 | { |
b59e64d0 HR |
248 | /* |
249 | * After kexec/dump some commands might still | |
250 | * be in flight, which the firmware will try | |
251 | * to complete. Resetting the firmware doesn't work | |
252 | * with old fw revisions, so we have to mark | |
253 | * them off as 'stale' to prevent the driver from | |
254 | * falling over. | |
255 | */ | |
e6e1ee93 | 256 | if (WARN_ON(list_empty(&c->list))) { |
b59e64d0 | 257 | c->cmd_type = CMD_MSG_STALE; |
8a3173de | 258 | return; |
b59e64d0 | 259 | } |
8a3173de | 260 | |
e6e1ee93 | 261 | list_del_init(&c->list); |
1da177e4 LT |
262 | } |
263 | ||
664a717d MM |
264 | static void enqueue_cmd_and_start_io(ctlr_info_t *h, |
265 | CommandList_struct *c) | |
266 | { | |
267 | unsigned long flags; | |
5e216153 | 268 | set_performant_mode(h, c); |
664a717d MM |
269 | spin_lock_irqsave(&h->lock, flags); |
270 | addQ(&h->reqQ, c); | |
271 | h->Qdepth++; | |
2a643ec6 SC |
272 | if (h->Qdepth > h->maxQsinceinit) |
273 | h->maxQsinceinit = h->Qdepth; | |
664a717d MM |
274 | start_io(h); |
275 | spin_unlock_irqrestore(&h->lock, flags); | |
276 | } | |
277 | ||
dccc9b56 | 278 | static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list, |
49fc5601 SC |
279 | int nr_cmds) |
280 | { | |
281 | int i; | |
282 | ||
283 | if (!cmd_sg_list) | |
284 | return; | |
285 | for (i = 0; i < nr_cmds; i++) { | |
dccc9b56 SC |
286 | kfree(cmd_sg_list[i]); |
287 | cmd_sg_list[i] = NULL; | |
49fc5601 SC |
288 | } |
289 | kfree(cmd_sg_list); | |
290 | } | |
291 | ||
dccc9b56 SC |
292 | static SGDescriptor_struct **cciss_allocate_sg_chain_blocks( |
293 | ctlr_info_t *h, int chainsize, int nr_cmds) | |
49fc5601 SC |
294 | { |
295 | int j; | |
dccc9b56 | 296 | SGDescriptor_struct **cmd_sg_list; |
49fc5601 SC |
297 | |
298 | if (chainsize <= 0) | |
299 | return NULL; | |
300 | ||
301 | cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL); | |
302 | if (!cmd_sg_list) | |
303 | return NULL; | |
304 | ||
305 | /* Build up chain blocks for each command */ | |
306 | for (j = 0; j < nr_cmds; j++) { | |
49fc5601 | 307 | /* Need a block of chainsized s/g elements. */ |
dccc9b56 SC |
308 | cmd_sg_list[j] = kmalloc((chainsize * |
309 | sizeof(*cmd_sg_list[j])), GFP_KERNEL); | |
310 | if (!cmd_sg_list[j]) { | |
49fc5601 SC |
311 | dev_err(&h->pdev->dev, "Cannot get memory " |
312 | "for s/g chains.\n"); | |
313 | goto clean; | |
314 | } | |
315 | } | |
316 | return cmd_sg_list; | |
317 | clean: | |
318 | cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds); | |
319 | return NULL; | |
320 | } | |
321 | ||
d45033ef SC |
322 | static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c) |
323 | { | |
324 | SGDescriptor_struct *chain_sg; | |
325 | u64bit temp64; | |
326 | ||
327 | if (c->Header.SGTotal <= h->max_cmd_sgentries) | |
328 | return; | |
329 | ||
330 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; | |
331 | temp64.val32.lower = chain_sg->Addr.lower; | |
332 | temp64.val32.upper = chain_sg->Addr.upper; | |
333 | pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); | |
334 | } | |
335 | ||
336 | static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c, | |
337 | SGDescriptor_struct *chain_block, int len) | |
338 | { | |
339 | SGDescriptor_struct *chain_sg; | |
340 | u64bit temp64; | |
341 | ||
342 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; | |
343 | chain_sg->Ext = CCISS_SG_CHAIN; | |
344 | chain_sg->Len = len; | |
345 | temp64.val = pci_map_single(h->pdev, chain_block, len, | |
346 | PCI_DMA_TODEVICE); | |
347 | chain_sg->Addr.lower = temp64.val32.lower; | |
348 | chain_sg->Addr.upper = temp64.val32.upper; | |
349 | } | |
350 | ||
1da177e4 LT |
351 | #include "cciss_scsi.c" /* For SCSI tape support */ |
352 | ||
1e6f2dc1 AB |
353 | static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", |
354 | "UNKNOWN" | |
355 | }; | |
0e4a9d03 | 356 | #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1) |
0f5486ec | 357 | |
1da177e4 LT |
358 | #ifdef CONFIG_PROC_FS |
359 | ||
360 | /* | |
361 | * Report information about this controller. | |
362 | */ | |
363 | #define ENG_GIG 1000000000 | |
364 | #define ENG_GIG_FACTOR (ENG_GIG/512) | |
89b6e743 | 365 | #define ENGAGE_SCSI "engage scsi" |
1da177e4 | 366 | |
89b6e743 | 367 | static void cciss_seq_show_header(struct seq_file *seq) |
1da177e4 | 368 | { |
89b6e743 MM |
369 | ctlr_info_t *h = seq->private; |
370 | ||
371 | seq_printf(seq, "%s: HP %s Controller\n" | |
372 | "Board ID: 0x%08lx\n" | |
373 | "Firmware Version: %c%c%c%c\n" | |
374 | "IRQ: %d\n" | |
375 | "Logical drives: %d\n" | |
376 | "Current Q depth: %d\n" | |
377 | "Current # commands on controller: %d\n" | |
378 | "Max Q depth since init: %d\n" | |
379 | "Max # commands on controller since init: %d\n" | |
380 | "Max SG entries since init: %d\n", | |
381 | h->devname, | |
382 | h->product_name, | |
383 | (unsigned long)h->board_id, | |
384 | h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], | |
5e216153 | 385 | h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT], |
89b6e743 MM |
386 | h->num_luns, |
387 | h->Qdepth, h->commands_outstanding, | |
388 | h->maxQsinceinit, h->max_outstanding, h->maxSG); | |
389 | ||
390 | #ifdef CONFIG_CISS_SCSI_TAPE | |
f70dba83 | 391 | cciss_seq_tape_report(seq, h); |
89b6e743 MM |
392 | #endif /* CONFIG_CISS_SCSI_TAPE */ |
393 | } | |
1da177e4 | 394 | |
89b6e743 MM |
395 | static void *cciss_seq_start(struct seq_file *seq, loff_t *pos) |
396 | { | |
397 | ctlr_info_t *h = seq->private; | |
89b6e743 | 398 | unsigned long flags; |
1da177e4 LT |
399 | |
400 | /* prevent displaying bogus info during configuration | |
401 | * or deconfiguration of a logical volume | |
402 | */ | |
f70dba83 | 403 | spin_lock_irqsave(&h->lock, flags); |
1da177e4 | 404 | if (h->busy_configuring) { |
f70dba83 | 405 | spin_unlock_irqrestore(&h->lock, flags); |
89b6e743 | 406 | return ERR_PTR(-EBUSY); |
1da177e4 LT |
407 | } |
408 | h->busy_configuring = 1; | |
f70dba83 | 409 | spin_unlock_irqrestore(&h->lock, flags); |
1da177e4 | 410 | |
89b6e743 MM |
411 | if (*pos == 0) |
412 | cciss_seq_show_header(seq); | |
413 | ||
414 | return pos; | |
415 | } | |
416 | ||
417 | static int cciss_seq_show(struct seq_file *seq, void *v) | |
418 | { | |
419 | sector_t vol_sz, vol_sz_frac; | |
420 | ctlr_info_t *h = seq->private; | |
421 | unsigned ctlr = h->ctlr; | |
422 | loff_t *pos = v; | |
9cef0d2f | 423 | drive_info_struct *drv = h->drv[*pos]; |
89b6e743 MM |
424 | |
425 | if (*pos > h->highest_lun) | |
426 | return 0; | |
427 | ||
531c2dc7 SC |
428 | if (drv == NULL) /* it's possible for h->drv[] to have holes. */ |
429 | return 0; | |
430 | ||
89b6e743 MM |
431 | if (drv->heads == 0) |
432 | return 0; | |
433 | ||
434 | vol_sz = drv->nr_blocks; | |
435 | vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR); | |
436 | vol_sz_frac *= 100; | |
437 | sector_div(vol_sz_frac, ENG_GIG_FACTOR); | |
438 | ||
fa52bec9 | 439 | if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN) |
89b6e743 MM |
440 | drv->raid_level = RAID_UNKNOWN; |
441 | seq_printf(seq, "cciss/c%dd%d:" | |
442 | "\t%4u.%02uGB\tRAID %s\n", | |
443 | ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac, | |
444 | raid_label[drv->raid_level]); | |
445 | return 0; | |
446 | } | |
447 | ||
448 | static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |
449 | { | |
450 | ctlr_info_t *h = seq->private; | |
451 | ||
452 | if (*pos > h->highest_lun) | |
453 | return NULL; | |
454 | *pos += 1; | |
455 | ||
456 | return pos; | |
457 | } | |
458 | ||
459 | static void cciss_seq_stop(struct seq_file *seq, void *v) | |
460 | { | |
461 | ctlr_info_t *h = seq->private; | |
462 | ||
463 | /* Only reset h->busy_configuring if we succeeded in setting | |
464 | * it during cciss_seq_start. */ | |
465 | if (v == ERR_PTR(-EBUSY)) | |
466 | return; | |
7c832835 | 467 | |
1da177e4 | 468 | h->busy_configuring = 0; |
1da177e4 LT |
469 | } |
470 | ||
88e9d34c | 471 | static const struct seq_operations cciss_seq_ops = { |
89b6e743 MM |
472 | .start = cciss_seq_start, |
473 | .show = cciss_seq_show, | |
474 | .next = cciss_seq_next, | |
475 | .stop = cciss_seq_stop, | |
476 | }; | |
477 | ||
478 | static int cciss_seq_open(struct inode *inode, struct file *file) | |
479 | { | |
480 | int ret = seq_open(file, &cciss_seq_ops); | |
481 | struct seq_file *seq = file->private_data; | |
482 | ||
483 | if (!ret) | |
484 | seq->private = PDE(inode)->data; | |
485 | ||
486 | return ret; | |
487 | } | |
488 | ||
489 | static ssize_t | |
490 | cciss_proc_write(struct file *file, const char __user *buf, | |
491 | size_t length, loff_t *ppos) | |
1da177e4 | 492 | { |
89b6e743 MM |
493 | int err; |
494 | char *buffer; | |
495 | ||
496 | #ifndef CONFIG_CISS_SCSI_TAPE | |
497 | return -EINVAL; | |
1da177e4 LT |
498 | #endif |
499 | ||
89b6e743 | 500 | if (!buf || length > PAGE_SIZE - 1) |
7c832835 | 501 | return -EINVAL; |
89b6e743 MM |
502 | |
503 | buffer = (char *)__get_free_page(GFP_KERNEL); | |
504 | if (!buffer) | |
505 | return -ENOMEM; | |
506 | ||
507 | err = -EFAULT; | |
508 | if (copy_from_user(buffer, buf, length)) | |
509 | goto out; | |
510 | buffer[length] = '\0'; | |
511 | ||
512 | #ifdef CONFIG_CISS_SCSI_TAPE | |
513 | if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) { | |
514 | struct seq_file *seq = file->private_data; | |
515 | ctlr_info_t *h = seq->private; | |
89b6e743 | 516 | |
f70dba83 | 517 | err = cciss_engage_scsi(h); |
8721c81f | 518 | if (err == 0) |
89b6e743 MM |
519 | err = length; |
520 | } else | |
521 | #endif /* CONFIG_CISS_SCSI_TAPE */ | |
522 | err = -EINVAL; | |
7c832835 BH |
523 | /* might be nice to have "disengage" too, but it's not |
524 | safely possible. (only 1 module use count, lock issues.) */ | |
89b6e743 MM |
525 | |
526 | out: | |
527 | free_page((unsigned long)buffer); | |
528 | return err; | |
1da177e4 LT |
529 | } |
530 | ||
828c0950 | 531 | static const struct file_operations cciss_proc_fops = { |
89b6e743 MM |
532 | .owner = THIS_MODULE, |
533 | .open = cciss_seq_open, | |
534 | .read = seq_read, | |
535 | .llseek = seq_lseek, | |
536 | .release = seq_release, | |
537 | .write = cciss_proc_write, | |
538 | }; | |
539 | ||
f70dba83 | 540 | static void __devinit cciss_procinit(ctlr_info_t *h) |
1da177e4 LT |
541 | { |
542 | struct proc_dir_entry *pde; | |
543 | ||
89b6e743 | 544 | if (proc_cciss == NULL) |
928b4d8c | 545 | proc_cciss = proc_mkdir("driver/cciss", NULL); |
89b6e743 MM |
546 | if (!proc_cciss) |
547 | return; | |
f70dba83 | 548 | pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP | |
89b6e743 | 549 | S_IROTH, proc_cciss, |
f70dba83 | 550 | &cciss_proc_fops, h); |
1da177e4 | 551 | } |
7c832835 | 552 | #endif /* CONFIG_PROC_FS */ |
1da177e4 | 553 | |
7fe06326 AP |
554 | #define MAX_PRODUCT_NAME_LEN 19 |
555 | ||
556 | #define to_hba(n) container_of(n, struct ctlr_info, dev) | |
557 | #define to_drv(n) container_of(n, drive_info_struct, dev) | |
558 | ||
957c2ec5 SC |
559 | /* List of controllers which cannot be reset on kexec with reset_devices */ |
560 | static u32 unresettable_controller[] = { | |
561 | 0x324a103C, /* Smart Array P712m */ | |
562 | 0x324b103C, /* SmartArray P711m */ | |
563 | 0x3223103C, /* Smart Array P800 */ | |
564 | 0x3234103C, /* Smart Array P400 */ | |
565 | 0x3235103C, /* Smart Array P400i */ | |
566 | 0x3211103C, /* Smart Array E200i */ | |
567 | 0x3212103C, /* Smart Array E200 */ | |
568 | 0x3213103C, /* Smart Array E200i */ | |
569 | 0x3214103C, /* Smart Array E200i */ | |
570 | 0x3215103C, /* Smart Array E200i */ | |
571 | 0x3237103C, /* Smart Array E500 */ | |
572 | 0x323D103C, /* Smart Array P700m */ | |
573 | 0x409C0E11, /* Smart Array 6400 */ | |
574 | 0x409D0E11, /* Smart Array 6400 EM */ | |
575 | }; | |
576 | ||
577 | static int ctlr_is_resettable(struct ctlr_info *h) | |
578 | { | |
579 | int i; | |
580 | ||
581 | for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) | |
582 | if (unresettable_controller[i] == h->board_id) | |
583 | return 0; | |
584 | return 1; | |
585 | } | |
586 | ||
587 | static ssize_t host_show_resettable(struct device *dev, | |
588 | struct device_attribute *attr, | |
589 | char *buf) | |
590 | { | |
591 | struct ctlr_info *h = to_hba(dev); | |
592 | ||
593 | return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h)); | |
594 | } | |
595 | static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL); | |
596 | ||
d6f4965d AP |
597 | static ssize_t host_store_rescan(struct device *dev, |
598 | struct device_attribute *attr, | |
599 | const char *buf, size_t count) | |
600 | { | |
601 | struct ctlr_info *h = to_hba(dev); | |
602 | ||
603 | add_to_scan_list(h); | |
604 | wake_up_process(cciss_scan_thread); | |
605 | wait_for_completion_interruptible(&h->scan_wait); | |
606 | ||
607 | return count; | |
608 | } | |
8ba95c69 | 609 | static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); |
7fe06326 AP |
610 | |
611 | static ssize_t dev_show_unique_id(struct device *dev, | |
612 | struct device_attribute *attr, | |
613 | char *buf) | |
614 | { | |
615 | drive_info_struct *drv = to_drv(dev); | |
616 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
617 | __u8 sn[16]; | |
618 | unsigned long flags; | |
619 | int ret = 0; | |
620 | ||
f70dba83 | 621 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
622 | if (h->busy_configuring) |
623 | ret = -EBUSY; | |
624 | else | |
625 | memcpy(sn, drv->serial_no, sizeof(sn)); | |
f70dba83 | 626 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
627 | |
628 | if (ret) | |
629 | return ret; | |
630 | else | |
631 | return snprintf(buf, 16 * 2 + 2, | |
632 | "%02X%02X%02X%02X%02X%02X%02X%02X" | |
633 | "%02X%02X%02X%02X%02X%02X%02X%02X\n", | |
634 | sn[0], sn[1], sn[2], sn[3], | |
635 | sn[4], sn[5], sn[6], sn[7], | |
636 | sn[8], sn[9], sn[10], sn[11], | |
637 | sn[12], sn[13], sn[14], sn[15]); | |
638 | } | |
8ba95c69 | 639 | static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL); |
7fe06326 AP |
640 | |
641 | static ssize_t dev_show_vendor(struct device *dev, | |
642 | struct device_attribute *attr, | |
643 | char *buf) | |
644 | { | |
645 | drive_info_struct *drv = to_drv(dev); | |
646 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
647 | char vendor[VENDOR_LEN + 1]; | |
648 | unsigned long flags; | |
649 | int ret = 0; | |
650 | ||
f70dba83 | 651 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
652 | if (h->busy_configuring) |
653 | ret = -EBUSY; | |
654 | else | |
655 | memcpy(vendor, drv->vendor, VENDOR_LEN + 1); | |
f70dba83 | 656 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
657 | |
658 | if (ret) | |
659 | return ret; | |
660 | else | |
661 | return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor); | |
662 | } | |
8ba95c69 | 663 | static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL); |
7fe06326 AP |
664 | |
665 | static ssize_t dev_show_model(struct device *dev, | |
666 | struct device_attribute *attr, | |
667 | char *buf) | |
668 | { | |
669 | drive_info_struct *drv = to_drv(dev); | |
670 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
671 | char model[MODEL_LEN + 1]; | |
672 | unsigned long flags; | |
673 | int ret = 0; | |
674 | ||
f70dba83 | 675 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
676 | if (h->busy_configuring) |
677 | ret = -EBUSY; | |
678 | else | |
679 | memcpy(model, drv->model, MODEL_LEN + 1); | |
f70dba83 | 680 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
681 | |
682 | if (ret) | |
683 | return ret; | |
684 | else | |
685 | return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model); | |
686 | } | |
8ba95c69 | 687 | static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL); |
7fe06326 AP |
688 | |
689 | static ssize_t dev_show_rev(struct device *dev, | |
690 | struct device_attribute *attr, | |
691 | char *buf) | |
692 | { | |
693 | drive_info_struct *drv = to_drv(dev); | |
694 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
695 | char rev[REV_LEN + 1]; | |
696 | unsigned long flags; | |
697 | int ret = 0; | |
698 | ||
f70dba83 | 699 | spin_lock_irqsave(&h->lock, flags); |
7fe06326 AP |
700 | if (h->busy_configuring) |
701 | ret = -EBUSY; | |
702 | else | |
703 | memcpy(rev, drv->rev, REV_LEN + 1); | |
f70dba83 | 704 | spin_unlock_irqrestore(&h->lock, flags); |
7fe06326 AP |
705 | |
706 | if (ret) | |
707 | return ret; | |
708 | else | |
709 | return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev); | |
710 | } | |
8ba95c69 | 711 | static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL); |
7fe06326 | 712 | |
ce84a8ae SC |
713 | static ssize_t cciss_show_lunid(struct device *dev, |
714 | struct device_attribute *attr, char *buf) | |
715 | { | |
9cef0d2f SC |
716 | drive_info_struct *drv = to_drv(dev); |
717 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
ce84a8ae SC |
718 | unsigned long flags; |
719 | unsigned char lunid[8]; | |
720 | ||
f70dba83 | 721 | spin_lock_irqsave(&h->lock, flags); |
ce84a8ae | 722 | if (h->busy_configuring) { |
f70dba83 | 723 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
724 | return -EBUSY; |
725 | } | |
726 | if (!drv->heads) { | |
f70dba83 | 727 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
728 | return -ENOTTY; |
729 | } | |
730 | memcpy(lunid, drv->LunID, sizeof(lunid)); | |
f70dba83 | 731 | spin_unlock_irqrestore(&h->lock, flags); |
ce84a8ae SC |
732 | return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", |
733 | lunid[0], lunid[1], lunid[2], lunid[3], | |
734 | lunid[4], lunid[5], lunid[6], lunid[7]); | |
735 | } | |
8ba95c69 | 736 | static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL); |
ce84a8ae | 737 | |
3ff1111d SC |
738 | static ssize_t cciss_show_raid_level(struct device *dev, |
739 | struct device_attribute *attr, char *buf) | |
740 | { | |
9cef0d2f SC |
741 | drive_info_struct *drv = to_drv(dev); |
742 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
3ff1111d SC |
743 | int raid; |
744 | unsigned long flags; | |
745 | ||
f70dba83 | 746 | spin_lock_irqsave(&h->lock, flags); |
3ff1111d | 747 | if (h->busy_configuring) { |
f70dba83 | 748 | spin_unlock_irqrestore(&h->lock, flags); |
3ff1111d SC |
749 | return -EBUSY; |
750 | } | |
751 | raid = drv->raid_level; | |
f70dba83 | 752 | spin_unlock_irqrestore(&h->lock, flags); |
3ff1111d SC |
753 | if (raid < 0 || raid > RAID_UNKNOWN) |
754 | raid = RAID_UNKNOWN; | |
755 | ||
756 | return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n", | |
757 | raid_label[raid]); | |
758 | } | |
8ba95c69 | 759 | static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL); |
3ff1111d | 760 | |
e272afec SC |
761 | static ssize_t cciss_show_usage_count(struct device *dev, |
762 | struct device_attribute *attr, char *buf) | |
763 | { | |
9cef0d2f SC |
764 | drive_info_struct *drv = to_drv(dev); |
765 | struct ctlr_info *h = to_hba(drv->dev.parent); | |
e272afec SC |
766 | unsigned long flags; |
767 | int count; | |
768 | ||
f70dba83 | 769 | spin_lock_irqsave(&h->lock, flags); |
e272afec | 770 | if (h->busy_configuring) { |
f70dba83 | 771 | spin_unlock_irqrestore(&h->lock, flags); |
e272afec SC |
772 | return -EBUSY; |
773 | } | |
774 | count = drv->usage_count; | |
f70dba83 | 775 | spin_unlock_irqrestore(&h->lock, flags); |
e272afec SC |
776 | return snprintf(buf, 20, "%d\n", count); |
777 | } | |
8ba95c69 | 778 | static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL); |
e272afec | 779 | |
d6f4965d AP |
780 | static struct attribute *cciss_host_attrs[] = { |
781 | &dev_attr_rescan.attr, | |
957c2ec5 | 782 | &dev_attr_resettable.attr, |
d6f4965d AP |
783 | NULL |
784 | }; | |
785 | ||
786 | static struct attribute_group cciss_host_attr_group = { | |
787 | .attrs = cciss_host_attrs, | |
788 | }; | |
789 | ||
9f792d9f | 790 | static const struct attribute_group *cciss_host_attr_groups[] = { |
d6f4965d AP |
791 | &cciss_host_attr_group, |
792 | NULL | |
793 | }; | |
794 | ||
795 | static struct device_type cciss_host_type = { | |
796 | .name = "cciss_host", | |
797 | .groups = cciss_host_attr_groups, | |
617e1344 | 798 | .release = cciss_hba_release, |
d6f4965d AP |
799 | }; |
800 | ||
7fe06326 AP |
801 | static struct attribute *cciss_dev_attrs[] = { |
802 | &dev_attr_unique_id.attr, | |
803 | &dev_attr_model.attr, | |
804 | &dev_attr_vendor.attr, | |
805 | &dev_attr_rev.attr, | |
ce84a8ae | 806 | &dev_attr_lunid.attr, |
3ff1111d | 807 | &dev_attr_raid_level.attr, |
e272afec | 808 | &dev_attr_usage_count.attr, |
7fe06326 AP |
809 | NULL |
810 | }; | |
811 | ||
812 | static struct attribute_group cciss_dev_attr_group = { | |
813 | .attrs = cciss_dev_attrs, | |
814 | }; | |
815 | ||
a4dbd674 | 816 | static const struct attribute_group *cciss_dev_attr_groups[] = { |
7fe06326 AP |
817 | &cciss_dev_attr_group, |
818 | NULL | |
819 | }; | |
820 | ||
821 | static struct device_type cciss_dev_type = { | |
822 | .name = "cciss_device", | |
823 | .groups = cciss_dev_attr_groups, | |
617e1344 | 824 | .release = cciss_device_release, |
7fe06326 AP |
825 | }; |
826 | ||
827 | static struct bus_type cciss_bus_type = { | |
828 | .name = "cciss", | |
829 | }; | |
830 | ||
617e1344 SC |
831 | /* |
832 | * cciss_hba_release is called when the reference count | |
833 | * of h->dev goes to zero. | |
834 | */ | |
835 | static void cciss_hba_release(struct device *dev) | |
836 | { | |
837 | /* | |
838 | * nothing to do, but need this to avoid a warning | |
839 | * about not having a release handler from lib/kref.c. | |
840 | */ | |
841 | } | |
7fe06326 AP |
842 | |
843 | /* | |
844 | * Initialize sysfs entry for each controller. This sets up and registers | |
845 | * the 'cciss#' directory for each individual controller under | |
846 | * /sys/bus/pci/devices/<dev>/. | |
847 | */ | |
848 | static int cciss_create_hba_sysfs_entry(struct ctlr_info *h) | |
849 | { | |
850 | device_initialize(&h->dev); | |
851 | h->dev.type = &cciss_host_type; | |
852 | h->dev.bus = &cciss_bus_type; | |
853 | dev_set_name(&h->dev, "%s", h->devname); | |
854 | h->dev.parent = &h->pdev->dev; | |
855 | ||
856 | return device_add(&h->dev); | |
857 | } | |
858 | ||
859 | /* | |
860 | * Remove sysfs entries for an hba. | |
861 | */ | |
862 | static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h) | |
863 | { | |
864 | device_del(&h->dev); | |
617e1344 SC |
865 | put_device(&h->dev); /* final put. */ |
866 | } | |
867 | ||
868 | /* cciss_device_release is called when the reference count | |
9cef0d2f | 869 | * of h->drv[x]dev goes to zero. |
617e1344 SC |
870 | */ |
871 | static void cciss_device_release(struct device *dev) | |
872 | { | |
9cef0d2f SC |
873 | drive_info_struct *drv = to_drv(dev); |
874 | kfree(drv); | |
7fe06326 AP |
875 | } |
876 | ||
877 | /* | |
878 | * Initialize sysfs for each logical drive. This sets up and registers | |
879 | * the 'c#d#' directory for each individual logical drive under | |
880 | * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from | |
881 | * /sys/block/cciss!c#d# to this entry. | |
882 | */ | |
617e1344 | 883 | static long cciss_create_ld_sysfs_entry(struct ctlr_info *h, |
7fe06326 AP |
884 | int drv_index) |
885 | { | |
617e1344 SC |
886 | struct device *dev; |
887 | ||
9cef0d2f | 888 | if (h->drv[drv_index]->device_initialized) |
8ce51966 SC |
889 | return 0; |
890 | ||
9cef0d2f | 891 | dev = &h->drv[drv_index]->dev; |
617e1344 SC |
892 | device_initialize(dev); |
893 | dev->type = &cciss_dev_type; | |
894 | dev->bus = &cciss_bus_type; | |
895 | dev_set_name(dev, "c%dd%d", h->ctlr, drv_index); | |
896 | dev->parent = &h->dev; | |
9cef0d2f | 897 | h->drv[drv_index]->device_initialized = 1; |
617e1344 | 898 | return device_add(dev); |
7fe06326 AP |
899 | } |
900 | ||
901 | /* | |
902 | * Remove sysfs entries for a logical drive. | |
903 | */ | |
8ce51966 SC |
904 | static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index, |
905 | int ctlr_exiting) | |
7fe06326 | 906 | { |
9cef0d2f | 907 | struct device *dev = &h->drv[drv_index]->dev; |
8ce51966 SC |
908 | |
909 | /* special case for c*d0, we only destroy it on controller exit */ | |
910 | if (drv_index == 0 && !ctlr_exiting) | |
911 | return; | |
912 | ||
617e1344 SC |
913 | device_del(dev); |
914 | put_device(dev); /* the "final" put. */ | |
9cef0d2f | 915 | h->drv[drv_index] = NULL; |
7fe06326 AP |
916 | } |
917 | ||
7c832835 BH |
918 | /* |
919 | * For operations that cannot sleep, a command block is allocated at init, | |
1da177e4 | 920 | * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track |
6b4d96b8 | 921 | * which ones are free or in use. |
7c832835 | 922 | */ |
6b4d96b8 | 923 | static CommandList_struct *cmd_alloc(ctlr_info_t *h) |
1da177e4 LT |
924 | { |
925 | CommandList_struct *c; | |
7c832835 | 926 | int i; |
1da177e4 LT |
927 | u64bit temp64; |
928 | dma_addr_t cmd_dma_handle, err_dma_handle; | |
929 | ||
6b4d96b8 SC |
930 | do { |
931 | i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); | |
932 | if (i == h->nr_cmds) | |
7c832835 | 933 | return NULL; |
6b4d96b8 SC |
934 | } while (test_and_set_bit(i & (BITS_PER_LONG - 1), |
935 | h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); | |
6b4d96b8 SC |
936 | c = h->cmd_pool + i; |
937 | memset(c, 0, sizeof(CommandList_struct)); | |
938 | cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct); | |
939 | c->err_info = h->errinfo_pool + i; | |
940 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
941 | err_dma_handle = h->errinfo_pool_dhandle | |
942 | + i * sizeof(ErrorInfo_struct); | |
943 | h->nr_allocs++; | |
1da177e4 | 944 | |
6b4d96b8 | 945 | c->cmdindex = i; |
33079b21 | 946 | |
e6e1ee93 | 947 | INIT_LIST_HEAD(&c->list); |
6b4d96b8 SC |
948 | c->busaddr = (__u32) cmd_dma_handle; |
949 | temp64.val = (__u64) err_dma_handle; | |
950 | c->ErrDesc.Addr.lower = temp64.val32.lower; | |
951 | c->ErrDesc.Addr.upper = temp64.val32.upper; | |
952 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); | |
7c832835 | 953 | |
6b4d96b8 SC |
954 | c->ctlr = h->ctlr; |
955 | return c; | |
956 | } | |
33079b21 | 957 | |
6b4d96b8 SC |
958 | /* allocate a command using pci_alloc_consistent, used for ioctls, |
959 | * etc., not for the main i/o path. | |
960 | */ | |
961 | static CommandList_struct *cmd_special_alloc(ctlr_info_t *h) | |
962 | { | |
963 | CommandList_struct *c; | |
964 | u64bit temp64; | |
965 | dma_addr_t cmd_dma_handle, err_dma_handle; | |
966 | ||
967 | c = (CommandList_struct *) pci_alloc_consistent(h->pdev, | |
968 | sizeof(CommandList_struct), &cmd_dma_handle); | |
969 | if (c == NULL) | |
970 | return NULL; | |
971 | memset(c, 0, sizeof(CommandList_struct)); | |
972 | ||
973 | c->cmdindex = -1; | |
974 | ||
975 | c->err_info = (ErrorInfo_struct *) | |
976 | pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct), | |
977 | &err_dma_handle); | |
978 | ||
979 | if (c->err_info == NULL) { | |
980 | pci_free_consistent(h->pdev, | |
981 | sizeof(CommandList_struct), c, cmd_dma_handle); | |
982 | return NULL; | |
7c832835 | 983 | } |
6b4d96b8 | 984 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); |
1da177e4 | 985 | |
e6e1ee93 | 986 | INIT_LIST_HEAD(&c->list); |
1da177e4 | 987 | c->busaddr = (__u32) cmd_dma_handle; |
7c832835 | 988 | temp64.val = (__u64) err_dma_handle; |
1da177e4 LT |
989 | c->ErrDesc.Addr.lower = temp64.val32.lower; |
990 | c->ErrDesc.Addr.upper = temp64.val32.upper; | |
991 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); | |
1da177e4 | 992 | |
7c832835 BH |
993 | c->ctlr = h->ctlr; |
994 | return c; | |
1da177e4 LT |
995 | } |
996 | ||
6b4d96b8 | 997 | static void cmd_free(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 LT |
998 | { |
999 | int i; | |
6b4d96b8 SC |
1000 | |
1001 | i = c - h->cmd_pool; | |
1002 | clear_bit(i & (BITS_PER_LONG - 1), | |
1003 | h->cmd_pool_bits + (i / BITS_PER_LONG)); | |
1004 | h->nr_frees++; | |
1005 | } | |
1006 | ||
1007 | static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c) | |
1008 | { | |
1da177e4 LT |
1009 | u64bit temp64; |
1010 | ||
6b4d96b8 SC |
1011 | temp64.val32.lower = c->ErrDesc.Addr.lower; |
1012 | temp64.val32.upper = c->ErrDesc.Addr.upper; | |
1013 | pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct), | |
1014 | c->err_info, (dma_addr_t) temp64.val); | |
1015 | pci_free_consistent(h->pdev, sizeof(CommandList_struct), | |
1016 | c, (dma_addr_t) c->busaddr); | |
1da177e4 LT |
1017 | } |
1018 | ||
1019 | static inline ctlr_info_t *get_host(struct gendisk *disk) | |
1020 | { | |
7c832835 | 1021 | return disk->queue->queuedata; |
1da177e4 LT |
1022 | } |
1023 | ||
1024 | static inline drive_info_struct *get_drv(struct gendisk *disk) | |
1025 | { | |
1026 | return disk->private_data; | |
1027 | } | |
1028 | ||
1029 | /* | |
1030 | * Open. Make sure the device is really there. | |
1031 | */ | |
ef7822c2 | 1032 | static int cciss_open(struct block_device *bdev, fmode_t mode) |
1da177e4 | 1033 | { |
f70dba83 | 1034 | ctlr_info_t *h = get_host(bdev->bd_disk); |
ef7822c2 | 1035 | drive_info_struct *drv = get_drv(bdev->bd_disk); |
1da177e4 | 1036 | |
b2a4a43d | 1037 | dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name); |
2e043986 | 1038 | if (drv->busy_configuring) |
ddd47442 | 1039 | return -EBUSY; |
1da177e4 LT |
1040 | /* |
1041 | * Root is allowed to open raw volume zero even if it's not configured | |
1042 | * so array config can still work. Root is also allowed to open any | |
1043 | * volume that has a LUN ID, so it can issue IOCTL to reread the | |
1044 | * disk information. I don't think I really like this | |
1045 | * but I'm already using way to many device nodes to claim another one | |
1046 | * for "raw controller". | |
1047 | */ | |
7a06f789 | 1048 | if (drv->heads == 0) { |
ef7822c2 | 1049 | if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */ |
1da177e4 | 1050 | /* if not node 0 make sure it is a partition = 0 */ |
ef7822c2 | 1051 | if (MINOR(bdev->bd_dev) & 0x0f) { |
7c832835 | 1052 | return -ENXIO; |
1da177e4 | 1053 | /* if it is, make sure we have a LUN ID */ |
39ccf9a6 SC |
1054 | } else if (memcmp(drv->LunID, CTLR_LUNID, |
1055 | sizeof(drv->LunID))) { | |
1da177e4 LT |
1056 | return -ENXIO; |
1057 | } | |
1058 | } | |
1059 | if (!capable(CAP_SYS_ADMIN)) | |
1060 | return -EPERM; | |
1061 | } | |
1062 | drv->usage_count++; | |
f70dba83 | 1063 | h->usage_count++; |
1da177e4 LT |
1064 | return 0; |
1065 | } | |
7c832835 | 1066 | |
6e9624b8 AB |
1067 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode) |
1068 | { | |
1069 | int ret; | |
1070 | ||
2a48fc0a | 1071 | mutex_lock(&cciss_mutex); |
6e9624b8 | 1072 | ret = cciss_open(bdev, mode); |
2a48fc0a | 1073 | mutex_unlock(&cciss_mutex); |
6e9624b8 AB |
1074 | |
1075 | return ret; | |
1076 | } | |
1077 | ||
1da177e4 LT |
1078 | /* |
1079 | * Close. Sync first. | |
1080 | */ | |
ef7822c2 | 1081 | static int cciss_release(struct gendisk *disk, fmode_t mode) |
1da177e4 | 1082 | { |
f70dba83 | 1083 | ctlr_info_t *h; |
6e9624b8 | 1084 | drive_info_struct *drv; |
1da177e4 | 1085 | |
2a48fc0a | 1086 | mutex_lock(&cciss_mutex); |
f70dba83 | 1087 | h = get_host(disk); |
6e9624b8 | 1088 | drv = get_drv(disk); |
b2a4a43d | 1089 | dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name); |
1da177e4 | 1090 | drv->usage_count--; |
f70dba83 | 1091 | h->usage_count--; |
2a48fc0a | 1092 | mutex_unlock(&cciss_mutex); |
1da177e4 LT |
1093 | return 0; |
1094 | } | |
1095 | ||
ef7822c2 AV |
1096 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
1097 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1098 | { |
1099 | int ret; | |
2a48fc0a | 1100 | mutex_lock(&cciss_mutex); |
ef7822c2 | 1101 | ret = cciss_ioctl(bdev, mode, cmd, arg); |
2a48fc0a | 1102 | mutex_unlock(&cciss_mutex); |
1da177e4 LT |
1103 | return ret; |
1104 | } | |
1105 | ||
8a6cfeb6 AB |
1106 | #ifdef CONFIG_COMPAT |
1107 | ||
ef7822c2 AV |
1108 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1109 | unsigned cmd, unsigned long arg); | |
1110 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, | |
1111 | unsigned cmd, unsigned long arg); | |
1da177e4 | 1112 | |
ef7822c2 AV |
1113 | static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode, |
1114 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1115 | { |
1116 | switch (cmd) { | |
1117 | case CCISS_GETPCIINFO: | |
1118 | case CCISS_GETINTINFO: | |
1119 | case CCISS_SETINTINFO: | |
1120 | case CCISS_GETNODENAME: | |
1121 | case CCISS_SETNODENAME: | |
1122 | case CCISS_GETHEARTBEAT: | |
1123 | case CCISS_GETBUSTYPES: | |
1124 | case CCISS_GETFIRMVER: | |
1125 | case CCISS_GETDRIVVER: | |
1126 | case CCISS_REVALIDVOLS: | |
1127 | case CCISS_DEREGDISK: | |
1128 | case CCISS_REGNEWDISK: | |
1129 | case CCISS_REGNEWD: | |
1130 | case CCISS_RESCANDISK: | |
1131 | case CCISS_GETLUNINFO: | |
ef7822c2 | 1132 | return do_ioctl(bdev, mode, cmd, arg); |
1da177e4 LT |
1133 | |
1134 | case CCISS_PASSTHRU32: | |
ef7822c2 | 1135 | return cciss_ioctl32_passthru(bdev, mode, cmd, arg); |
1da177e4 | 1136 | case CCISS_BIG_PASSTHRU32: |
ef7822c2 | 1137 | return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg); |
1da177e4 LT |
1138 | |
1139 | default: | |
1140 | return -ENOIOCTLCMD; | |
1141 | } | |
1142 | } | |
1143 | ||
ef7822c2 AV |
1144 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1145 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1146 | { |
1147 | IOCTL32_Command_struct __user *arg32 = | |
7c832835 | 1148 | (IOCTL32_Command_struct __user *) arg; |
1da177e4 LT |
1149 | IOCTL_Command_struct arg64; |
1150 | IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); | |
1151 | int err; | |
1152 | u32 cp; | |
1153 | ||
1154 | err = 0; | |
7c832835 BH |
1155 | err |= |
1156 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | |
1157 | sizeof(arg64.LUN_info)); | |
1158 | err |= | |
1159 | copy_from_user(&arg64.Request, &arg32->Request, | |
1160 | sizeof(arg64.Request)); | |
1161 | err |= | |
1162 | copy_from_user(&arg64.error_info, &arg32->error_info, | |
1163 | sizeof(arg64.error_info)); | |
1da177e4 LT |
1164 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1165 | err |= get_user(cp, &arg32->buf); | |
1166 | arg64.buf = compat_ptr(cp); | |
1167 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | |
1168 | ||
1169 | if (err) | |
1170 | return -EFAULT; | |
1171 | ||
ef7822c2 | 1172 | err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p); |
1da177e4 LT |
1173 | if (err) |
1174 | return err; | |
7c832835 BH |
1175 | err |= |
1176 | copy_in_user(&arg32->error_info, &p->error_info, | |
1177 | sizeof(arg32->error_info)); | |
1da177e4 LT |
1178 | if (err) |
1179 | return -EFAULT; | |
1180 | return err; | |
1181 | } | |
1182 | ||
ef7822c2 AV |
1183 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, |
1184 | unsigned cmd, unsigned long arg) | |
1da177e4 LT |
1185 | { |
1186 | BIG_IOCTL32_Command_struct __user *arg32 = | |
7c832835 | 1187 | (BIG_IOCTL32_Command_struct __user *) arg; |
1da177e4 | 1188 | BIG_IOCTL_Command_struct arg64; |
7c832835 BH |
1189 | BIG_IOCTL_Command_struct __user *p = |
1190 | compat_alloc_user_space(sizeof(arg64)); | |
1da177e4 LT |
1191 | int err; |
1192 | u32 cp; | |
1193 | ||
7ab5118d | 1194 | memset(&arg64, 0, sizeof(arg64)); |
1da177e4 | 1195 | err = 0; |
7c832835 BH |
1196 | err |= |
1197 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | |
1198 | sizeof(arg64.LUN_info)); | |
1199 | err |= | |
1200 | copy_from_user(&arg64.Request, &arg32->Request, | |
1201 | sizeof(arg64.Request)); | |
1202 | err |= | |
1203 | copy_from_user(&arg64.error_info, &arg32->error_info, | |
1204 | sizeof(arg64.error_info)); | |
1da177e4 LT |
1205 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1206 | err |= get_user(arg64.malloc_size, &arg32->malloc_size); | |
1207 | err |= get_user(cp, &arg32->buf); | |
1208 | arg64.buf = compat_ptr(cp); | |
1209 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | |
1210 | ||
1211 | if (err) | |
7c832835 | 1212 | return -EFAULT; |
1da177e4 | 1213 | |
ef7822c2 | 1214 | err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p); |
1da177e4 LT |
1215 | if (err) |
1216 | return err; | |
7c832835 BH |
1217 | err |= |
1218 | copy_in_user(&arg32->error_info, &p->error_info, | |
1219 | sizeof(arg32->error_info)); | |
1da177e4 LT |
1220 | if (err) |
1221 | return -EFAULT; | |
1222 | return err; | |
1223 | } | |
1224 | #endif | |
a885c8c4 CH |
1225 | |
1226 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo) | |
1227 | { | |
1228 | drive_info_struct *drv = get_drv(bdev->bd_disk); | |
1229 | ||
1230 | if (!drv->cylinders) | |
1231 | return -ENXIO; | |
1232 | ||
1233 | geo->heads = drv->heads; | |
1234 | geo->sectors = drv->sectors; | |
1235 | geo->cylinders = drv->cylinders; | |
1236 | return 0; | |
1237 | } | |
1238 | ||
f70dba83 | 1239 | static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c) |
0a9279cc MM |
1240 | { |
1241 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && | |
1242 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) | |
f70dba83 | 1243 | (void)check_for_unit_attention(h, c); |
0a9279cc | 1244 | } |
0a25a5ae SC |
1245 | |
1246 | static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp) | |
1da177e4 | 1247 | { |
0a25a5ae | 1248 | cciss_pci_info_struct pciinfo; |
1da177e4 | 1249 | |
0a25a5ae SC |
1250 | if (!argp) |
1251 | return -EINVAL; | |
1252 | pciinfo.domain = pci_domain_nr(h->pdev->bus); | |
1253 | pciinfo.bus = h->pdev->bus->number; | |
1254 | pciinfo.dev_fn = h->pdev->devfn; | |
1255 | pciinfo.board_id = h->board_id; | |
1256 | if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct))) | |
1257 | return -EFAULT; | |
1258 | return 0; | |
1259 | } | |
1da177e4 | 1260 | |
576e661c SC |
1261 | static int cciss_getintinfo(ctlr_info_t *h, void __user *argp) |
1262 | { | |
1263 | cciss_coalint_struct intinfo; | |
1da177e4 | 1264 | |
576e661c SC |
1265 | if (!argp) |
1266 | return -EINVAL; | |
1267 | intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay); | |
1268 | intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount); | |
1269 | if (copy_to_user | |
1270 | (argp, &intinfo, sizeof(cciss_coalint_struct))) | |
1271 | return -EFAULT; | |
1272 | return 0; | |
1273 | } | |
1da177e4 | 1274 | |
4c800eed SC |
1275 | static int cciss_setintinfo(ctlr_info_t *h, void __user *argp) |
1276 | { | |
1277 | cciss_coalint_struct intinfo; | |
1278 | unsigned long flags; | |
1279 | int i; | |
1da177e4 | 1280 | |
4c800eed SC |
1281 | if (!argp) |
1282 | return -EINVAL; | |
1283 | if (!capable(CAP_SYS_ADMIN)) | |
1284 | return -EPERM; | |
1285 | if (copy_from_user(&intinfo, argp, sizeof(intinfo))) | |
1286 | return -EFAULT; | |
1287 | if ((intinfo.delay == 0) && (intinfo.count == 0)) | |
1288 | return -EINVAL; | |
1289 | spin_lock_irqsave(&h->lock, flags); | |
1290 | /* Update the field, and then ring the doorbell */ | |
1291 | writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay)); | |
1292 | writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount)); | |
1293 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | |
1294 | ||
1295 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { | |
1296 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
1297 | break; | |
1298 | udelay(1000); /* delay and try again */ | |
1299 | } | |
1300 | spin_unlock_irqrestore(&h->lock, flags); | |
1301 | if (i >= MAX_IOCTL_CONFIG_WAIT) | |
1302 | return -EAGAIN; | |
1303 | return 0; | |
1304 | } | |
1da177e4 | 1305 | |
25216109 SC |
1306 | static int cciss_getnodename(ctlr_info_t *h, void __user *argp) |
1307 | { | |
1308 | NodeName_type NodeName; | |
1309 | int i; | |
1da177e4 | 1310 | |
25216109 SC |
1311 | if (!argp) |
1312 | return -EINVAL; | |
1313 | for (i = 0; i < 16; i++) | |
1314 | NodeName[i] = readb(&h->cfgtable->ServerName[i]); | |
1315 | if (copy_to_user(argp, NodeName, sizeof(NodeName_type))) | |
1316 | return -EFAULT; | |
1317 | return 0; | |
1318 | } | |
7c832835 | 1319 | |
4f43f32c SC |
1320 | static int cciss_setnodename(ctlr_info_t *h, void __user *argp) |
1321 | { | |
1322 | NodeName_type NodeName; | |
1323 | unsigned long flags; | |
1324 | int i; | |
7c832835 | 1325 | |
4f43f32c SC |
1326 | if (!argp) |
1327 | return -EINVAL; | |
1328 | if (!capable(CAP_SYS_ADMIN)) | |
1329 | return -EPERM; | |
1330 | if (copy_from_user(NodeName, argp, sizeof(NodeName_type))) | |
1331 | return -EFAULT; | |
1332 | spin_lock_irqsave(&h->lock, flags); | |
1333 | /* Update the field, and then ring the doorbell */ | |
1334 | for (i = 0; i < 16; i++) | |
1335 | writeb(NodeName[i], &h->cfgtable->ServerName[i]); | |
1336 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | |
1337 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { | |
1338 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
1339 | break; | |
1340 | udelay(1000); /* delay and try again */ | |
1341 | } | |
1342 | spin_unlock_irqrestore(&h->lock, flags); | |
1343 | if (i >= MAX_IOCTL_CONFIG_WAIT) | |
1344 | return -EAGAIN; | |
1345 | return 0; | |
1346 | } | |
7c832835 | 1347 | |
93c74931 SC |
1348 | static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp) |
1349 | { | |
1350 | Heartbeat_type heartbeat; | |
7c832835 | 1351 | |
93c74931 SC |
1352 | if (!argp) |
1353 | return -EINVAL; | |
1354 | heartbeat = readl(&h->cfgtable->HeartBeat); | |
1355 | if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type))) | |
1356 | return -EFAULT; | |
1357 | return 0; | |
1358 | } | |
0a9279cc | 1359 | |
d18dfad4 SC |
1360 | static int cciss_getbustypes(ctlr_info_t *h, void __user *argp) |
1361 | { | |
1362 | BusTypes_type BusTypes; | |
7c832835 | 1363 | |
d18dfad4 SC |
1364 | if (!argp) |
1365 | return -EINVAL; | |
1366 | BusTypes = readl(&h->cfgtable->BusTypes); | |
1367 | if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type))) | |
1368 | return -EFAULT; | |
1369 | return 0; | |
1370 | } | |
1371 | ||
8a4f7fbf SC |
1372 | static int cciss_getfirmver(ctlr_info_t *h, void __user *argp) |
1373 | { | |
1374 | FirmwareVer_type firmware; | |
1375 | ||
1376 | if (!argp) | |
1377 | return -EINVAL; | |
1378 | memcpy(firmware, h->firm_ver, 4); | |
1379 | ||
1380 | if (copy_to_user | |
1381 | (argp, firmware, sizeof(FirmwareVer_type))) | |
1382 | return -EFAULT; | |
1383 | return 0; | |
1384 | } | |
1385 | ||
c525919d SC |
1386 | static int cciss_getdrivver(ctlr_info_t *h, void __user *argp) |
1387 | { | |
1388 | DriverVer_type DriverVer = DRIVER_VERSION; | |
1389 | ||
1390 | if (!argp) | |
1391 | return -EINVAL; | |
1392 | if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) | |
1393 | return -EFAULT; | |
1394 | return 0; | |
1395 | } | |
1396 | ||
0894b32c SC |
1397 | static int cciss_getluninfo(ctlr_info_t *h, |
1398 | struct gendisk *disk, void __user *argp) | |
1399 | { | |
1400 | LogvolInfo_struct luninfo; | |
1401 | drive_info_struct *drv = get_drv(disk); | |
1402 | ||
1403 | if (!argp) | |
1404 | return -EINVAL; | |
1405 | memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID)); | |
1406 | luninfo.num_opens = drv->usage_count; | |
1407 | luninfo.num_parts = 0; | |
1408 | if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct))) | |
1409 | return -EFAULT; | |
1410 | return 0; | |
1411 | } | |
1412 | ||
f32f125b SC |
1413 | static int cciss_passthru(ctlr_info_t *h, void __user *argp) |
1414 | { | |
1415 | IOCTL_Command_struct iocommand; | |
1416 | CommandList_struct *c; | |
1417 | char *buff = NULL; | |
1418 | u64bit temp64; | |
1419 | DECLARE_COMPLETION_ONSTACK(wait); | |
1420 | ||
1421 | if (!argp) | |
1422 | return -EINVAL; | |
1423 | ||
1424 | if (!capable(CAP_SYS_RAWIO)) | |
1425 | return -EPERM; | |
1426 | ||
1427 | if (copy_from_user | |
1428 | (&iocommand, argp, sizeof(IOCTL_Command_struct))) | |
1429 | return -EFAULT; | |
1430 | if ((iocommand.buf_size < 1) && | |
1431 | (iocommand.Request.Type.Direction != XFER_NONE)) { | |
1432 | return -EINVAL; | |
1433 | } | |
1434 | if (iocommand.buf_size > 0) { | |
1435 | buff = kmalloc(iocommand.buf_size, GFP_KERNEL); | |
1436 | if (buff == NULL) | |
1437 | return -EFAULT; | |
1438 | } | |
1439 | if (iocommand.Request.Type.Direction == XFER_WRITE) { | |
1440 | /* Copy the data into the buffer we created */ | |
1441 | if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) { | |
1442 | kfree(buff); | |
1443 | return -EFAULT; | |
1444 | } | |
1445 | } else { | |
1446 | memset(buff, 0, iocommand.buf_size); | |
1447 | } | |
1448 | c = cmd_special_alloc(h); | |
1449 | if (!c) { | |
1450 | kfree(buff); | |
1451 | return -ENOMEM; | |
1452 | } | |
1453 | /* Fill in the command type */ | |
1454 | c->cmd_type = CMD_IOCTL_PEND; | |
1455 | /* Fill in Command Header */ | |
1456 | c->Header.ReplyQueue = 0; /* unused in simple mode */ | |
1457 | if (iocommand.buf_size > 0) { /* buffer to fill */ | |
1458 | c->Header.SGList = 1; | |
1459 | c->Header.SGTotal = 1; | |
1460 | } else { /* no buffers to fill */ | |
1461 | c->Header.SGList = 0; | |
1462 | c->Header.SGTotal = 0; | |
1463 | } | |
1464 | c->Header.LUN = iocommand.LUN_info; | |
1465 | /* use the kernel address the cmd block for tag */ | |
1466 | c->Header.Tag.lower = c->busaddr; | |
1467 | ||
1468 | /* Fill in Request block */ | |
1469 | c->Request = iocommand.Request; | |
1470 | ||
1471 | /* Fill in the scatter gather information */ | |
1472 | if (iocommand.buf_size > 0) { | |
1473 | temp64.val = pci_map_single(h->pdev, buff, | |
1474 | iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); | |
1475 | c->SG[0].Addr.lower = temp64.val32.lower; | |
1476 | c->SG[0].Addr.upper = temp64.val32.upper; | |
1477 | c->SG[0].Len = iocommand.buf_size; | |
1478 | c->SG[0].Ext = 0; /* we are not chaining */ | |
1479 | } | |
1480 | c->waiting = &wait; | |
1481 | ||
1482 | enqueue_cmd_and_start_io(h, c); | |
1483 | wait_for_completion(&wait); | |
1484 | ||
1485 | /* unlock the buffers from DMA */ | |
1486 | temp64.val32.lower = c->SG[0].Addr.lower; | |
1487 | temp64.val32.upper = c->SG[0].Addr.upper; | |
1488 | pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size, | |
1489 | PCI_DMA_BIDIRECTIONAL); | |
1490 | check_ioctl_unit_attention(h, c); | |
1491 | ||
1492 | /* Copy the error information out */ | |
1493 | iocommand.error_info = *(c->err_info); | |
1494 | if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) { | |
1495 | kfree(buff); | |
1496 | cmd_special_free(h, c); | |
1497 | return -EFAULT; | |
1498 | } | |
1499 | ||
1500 | if (iocommand.Request.Type.Direction == XFER_READ) { | |
1501 | /* Copy the data out of the buffer we created */ | |
1502 | if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { | |
7c832835 | 1503 | kfree(buff); |
6b4d96b8 | 1504 | cmd_special_free(h, c); |
f32f125b | 1505 | return -EFAULT; |
1da177e4 | 1506 | } |
f32f125b SC |
1507 | } |
1508 | kfree(buff); | |
1509 | cmd_special_free(h, c); | |
1510 | return 0; | |
1511 | } | |
1512 | ||
0c9f5ba7 SC |
1513 | static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp) |
1514 | { | |
1515 | BIG_IOCTL_Command_struct *ioc; | |
1516 | CommandList_struct *c; | |
1517 | unsigned char **buff = NULL; | |
1518 | int *buff_size = NULL; | |
1519 | u64bit temp64; | |
1520 | BYTE sg_used = 0; | |
1521 | int status = 0; | |
1522 | int i; | |
1523 | DECLARE_COMPLETION_ONSTACK(wait); | |
1524 | __u32 left; | |
1525 | __u32 sz; | |
1526 | BYTE __user *data_ptr; | |
1527 | ||
1528 | if (!argp) | |
1529 | return -EINVAL; | |
1530 | if (!capable(CAP_SYS_RAWIO)) | |
1531 | return -EPERM; | |
1532 | ioc = (BIG_IOCTL_Command_struct *) | |
1533 | kmalloc(sizeof(*ioc), GFP_KERNEL); | |
1534 | if (!ioc) { | |
1535 | status = -ENOMEM; | |
1536 | goto cleanup1; | |
1537 | } | |
1538 | if (copy_from_user(ioc, argp, sizeof(*ioc))) { | |
1539 | status = -EFAULT; | |
1540 | goto cleanup1; | |
1541 | } | |
1542 | if ((ioc->buf_size < 1) && | |
1543 | (ioc->Request.Type.Direction != XFER_NONE)) { | |
1544 | status = -EINVAL; | |
1545 | goto cleanup1; | |
1546 | } | |
1547 | /* Check kmalloc limits using all SGs */ | |
1548 | if (ioc->malloc_size > MAX_KMALLOC_SIZE) { | |
1549 | status = -EINVAL; | |
1550 | goto cleanup1; | |
1551 | } | |
1552 | if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { | |
1553 | status = -EINVAL; | |
1554 | goto cleanup1; | |
1555 | } | |
1556 | buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); | |
1557 | if (!buff) { | |
1558 | status = -ENOMEM; | |
1559 | goto cleanup1; | |
1560 | } | |
1561 | buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); | |
1562 | if (!buff_size) { | |
1563 | status = -ENOMEM; | |
1564 | goto cleanup1; | |
1565 | } | |
1566 | left = ioc->buf_size; | |
1567 | data_ptr = ioc->buf; | |
1568 | while (left) { | |
1569 | sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; | |
1570 | buff_size[sg_used] = sz; | |
1571 | buff[sg_used] = kmalloc(sz, GFP_KERNEL); | |
1572 | if (buff[sg_used] == NULL) { | |
1573 | status = -ENOMEM; | |
1574 | goto cleanup1; | |
1575 | } | |
1576 | if (ioc->Request.Type.Direction == XFER_WRITE) { | |
1577 | if (copy_from_user(buff[sg_used], data_ptr, sz)) { | |
7c832835 BH |
1578 | status = -EFAULT; |
1579 | goto cleanup1; | |
1580 | } | |
0c9f5ba7 SC |
1581 | } else { |
1582 | memset(buff[sg_used], 0, sz); | |
1583 | } | |
1584 | left -= sz; | |
1585 | data_ptr += sz; | |
1586 | sg_used++; | |
1587 | } | |
1588 | c = cmd_special_alloc(h); | |
1589 | if (!c) { | |
1590 | status = -ENOMEM; | |
1591 | goto cleanup1; | |
1592 | } | |
1593 | c->cmd_type = CMD_IOCTL_PEND; | |
1594 | c->Header.ReplyQueue = 0; | |
fcfb5c0c SC |
1595 | c->Header.SGList = sg_used; |
1596 | c->Header.SGTotal = sg_used; | |
0c9f5ba7 SC |
1597 | c->Header.LUN = ioc->LUN_info; |
1598 | c->Header.Tag.lower = c->busaddr; | |
1599 | ||
1600 | c->Request = ioc->Request; | |
fcfb5c0c SC |
1601 | for (i = 0; i < sg_used; i++) { |
1602 | temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i], | |
0c9f5ba7 | 1603 | PCI_DMA_BIDIRECTIONAL); |
fcfb5c0c SC |
1604 | c->SG[i].Addr.lower = temp64.val32.lower; |
1605 | c->SG[i].Addr.upper = temp64.val32.upper; | |
1606 | c->SG[i].Len = buff_size[i]; | |
1607 | c->SG[i].Ext = 0; /* we are not chaining */ | |
0c9f5ba7 SC |
1608 | } |
1609 | c->waiting = &wait; | |
1610 | enqueue_cmd_and_start_io(h, c); | |
1611 | wait_for_completion(&wait); | |
1612 | /* unlock the buffers from DMA */ | |
1613 | for (i = 0; i < sg_used; i++) { | |
1614 | temp64.val32.lower = c->SG[i].Addr.lower; | |
1615 | temp64.val32.upper = c->SG[i].Addr.upper; | |
1616 | pci_unmap_single(h->pdev, | |
1617 | (dma_addr_t) temp64.val, buff_size[i], | |
1618 | PCI_DMA_BIDIRECTIONAL); | |
1619 | } | |
1620 | check_ioctl_unit_attention(h, c); | |
1621 | /* Copy the error information out */ | |
1622 | ioc->error_info = *(c->err_info); | |
1623 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { | |
1624 | cmd_special_free(h, c); | |
1625 | status = -EFAULT; | |
1626 | goto cleanup1; | |
1627 | } | |
1628 | if (ioc->Request.Type.Direction == XFER_READ) { | |
1629 | /* Copy the data out of the buffer we created */ | |
1630 | BYTE __user *ptr = ioc->buf; | |
1631 | for (i = 0; i < sg_used; i++) { | |
1632 | if (copy_to_user(ptr, buff[i], buff_size[i])) { | |
6b4d96b8 | 1633 | cmd_special_free(h, c); |
7c832835 BH |
1634 | status = -EFAULT; |
1635 | goto cleanup1; | |
1636 | } | |
0c9f5ba7 | 1637 | ptr += buff_size[i]; |
1da177e4 | 1638 | } |
0c9f5ba7 SC |
1639 | } |
1640 | cmd_special_free(h, c); | |
1641 | status = 0; | |
1642 | cleanup1: | |
1643 | if (buff) { | |
1644 | for (i = 0; i < sg_used; i++) | |
1645 | kfree(buff[i]); | |
1646 | kfree(buff); | |
1647 | } | |
1648 | kfree(buff_size); | |
1649 | kfree(ioc); | |
1650 | return status; | |
1651 | } | |
1652 | ||
ef7822c2 | 1653 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
c525919d | 1654 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1655 | { |
1da177e4 | 1656 | struct gendisk *disk = bdev->bd_disk; |
f70dba83 | 1657 | ctlr_info_t *h = get_host(disk); |
1da177e4 LT |
1658 | void __user *argp = (void __user *)arg; |
1659 | ||
b2a4a43d SC |
1660 | dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n", |
1661 | cmd, arg); | |
7c832835 | 1662 | switch (cmd) { |
1da177e4 | 1663 | case CCISS_GETPCIINFO: |
0a25a5ae | 1664 | return cciss_getpciinfo(h, argp); |
1da177e4 | 1665 | case CCISS_GETINTINFO: |
576e661c | 1666 | return cciss_getintinfo(h, argp); |
1da177e4 | 1667 | case CCISS_SETINTINFO: |
4c800eed | 1668 | return cciss_setintinfo(h, argp); |
1da177e4 | 1669 | case CCISS_GETNODENAME: |
25216109 | 1670 | return cciss_getnodename(h, argp); |
1da177e4 | 1671 | case CCISS_SETNODENAME: |
4f43f32c | 1672 | return cciss_setnodename(h, argp); |
1da177e4 | 1673 | case CCISS_GETHEARTBEAT: |
93c74931 | 1674 | return cciss_getheartbeat(h, argp); |
1da177e4 | 1675 | case CCISS_GETBUSTYPES: |
d18dfad4 | 1676 | return cciss_getbustypes(h, argp); |
1da177e4 | 1677 | case CCISS_GETFIRMVER: |
8a4f7fbf | 1678 | return cciss_getfirmver(h, argp); |
7c832835 | 1679 | case CCISS_GETDRIVVER: |
c525919d | 1680 | return cciss_getdrivver(h, argp); |
6ae5ce8e MM |
1681 | case CCISS_DEREGDISK: |
1682 | case CCISS_REGNEWD: | |
1da177e4 | 1683 | case CCISS_REVALIDVOLS: |
f70dba83 | 1684 | return rebuild_lun_table(h, 0, 1); |
0894b32c SC |
1685 | case CCISS_GETLUNINFO: |
1686 | return cciss_getluninfo(h, disk, argp); | |
1da177e4 | 1687 | case CCISS_PASSTHRU: |
f32f125b | 1688 | return cciss_passthru(h, argp); |
0c9f5ba7 SC |
1689 | case CCISS_BIG_PASSTHRU: |
1690 | return cciss_bigpassthru(h, argp); | |
03bbfee5 MMOD |
1691 | |
1692 | /* scsi_cmd_ioctl handles these, below, though some are not */ | |
1693 | /* very meaningful for cciss. SG_IO is the main one people want. */ | |
1694 | ||
1695 | case SG_GET_VERSION_NUM: | |
1696 | case SG_SET_TIMEOUT: | |
1697 | case SG_GET_TIMEOUT: | |
1698 | case SG_GET_RESERVED_SIZE: | |
1699 | case SG_SET_RESERVED_SIZE: | |
1700 | case SG_EMULATED_HOST: | |
1701 | case SG_IO: | |
1702 | case SCSI_IOCTL_SEND_COMMAND: | |
ef7822c2 | 1703 | return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp); |
03bbfee5 MMOD |
1704 | |
1705 | /* scsi_cmd_ioctl would normally handle these, below, but */ | |
1706 | /* they aren't a good fit for cciss, as CD-ROMs are */ | |
1707 | /* not supported, and we don't have any bus/target/lun */ | |
1708 | /* which we present to the kernel. */ | |
1709 | ||
1710 | case CDROM_SEND_PACKET: | |
1711 | case CDROMCLOSETRAY: | |
1712 | case CDROMEJECT: | |
1713 | case SCSI_IOCTL_GET_IDLUN: | |
1714 | case SCSI_IOCTL_GET_BUS_NUMBER: | |
1da177e4 LT |
1715 | default: |
1716 | return -ENOTTY; | |
1717 | } | |
1da177e4 LT |
1718 | } |
1719 | ||
7b30f092 JA |
1720 | static void cciss_check_queues(ctlr_info_t *h) |
1721 | { | |
1722 | int start_queue = h->next_to_run; | |
1723 | int i; | |
1724 | ||
1725 | /* check to see if we have maxed out the number of commands that can | |
1726 | * be placed on the queue. If so then exit. We do this check here | |
1727 | * in case the interrupt we serviced was from an ioctl and did not | |
1728 | * free any new commands. | |
1729 | */ | |
f880632f | 1730 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) |
7b30f092 JA |
1731 | return; |
1732 | ||
1733 | /* We have room on the queue for more commands. Now we need to queue | |
1734 | * them up. We will also keep track of the next queue to run so | |
1735 | * that every queue gets a chance to be started first. | |
1736 | */ | |
1737 | for (i = 0; i < h->highest_lun + 1; i++) { | |
1738 | int curr_queue = (start_queue + i) % (h->highest_lun + 1); | |
1739 | /* make sure the disk has been added and the drive is real | |
1740 | * because this can be called from the middle of init_one. | |
1741 | */ | |
9cef0d2f SC |
1742 | if (!h->drv[curr_queue]) |
1743 | continue; | |
1744 | if (!(h->drv[curr_queue]->queue) || | |
1745 | !(h->drv[curr_queue]->heads)) | |
7b30f092 JA |
1746 | continue; |
1747 | blk_start_queue(h->gendisk[curr_queue]->queue); | |
1748 | ||
1749 | /* check to see if we have maxed out the number of commands | |
1750 | * that can be placed on the queue. | |
1751 | */ | |
f880632f | 1752 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) { |
7b30f092 JA |
1753 | if (curr_queue == start_queue) { |
1754 | h->next_to_run = | |
1755 | (start_queue + 1) % (h->highest_lun + 1); | |
1756 | break; | |
1757 | } else { | |
1758 | h->next_to_run = curr_queue; | |
1759 | break; | |
1760 | } | |
7b30f092 JA |
1761 | } |
1762 | } | |
1763 | } | |
1764 | ||
ca1e0484 MM |
1765 | static void cciss_softirq_done(struct request *rq) |
1766 | { | |
f70dba83 SC |
1767 | CommandList_struct *c = rq->completion_data; |
1768 | ctlr_info_t *h = hba[c->ctlr]; | |
1769 | SGDescriptor_struct *curr_sg = c->SG; | |
ca1e0484 | 1770 | u64bit temp64; |
664a717d | 1771 | unsigned long flags; |
ca1e0484 | 1772 | int i, ddir; |
5c07a311 | 1773 | int sg_index = 0; |
ca1e0484 | 1774 | |
f70dba83 | 1775 | if (c->Request.Type.Direction == XFER_READ) |
ca1e0484 MM |
1776 | ddir = PCI_DMA_FROMDEVICE; |
1777 | else | |
1778 | ddir = PCI_DMA_TODEVICE; | |
1779 | ||
1780 | /* command did not need to be retried */ | |
1781 | /* unmap the DMA mapping for all the scatter gather elements */ | |
f70dba83 | 1782 | for (i = 0; i < c->Header.SGList; i++) { |
5c07a311 | 1783 | if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) { |
f70dba83 | 1784 | cciss_unmap_sg_chain_block(h, c); |
5c07a311 | 1785 | /* Point to the next block */ |
f70dba83 | 1786 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
5c07a311 DB |
1787 | sg_index = 0; |
1788 | } | |
1789 | temp64.val32.lower = curr_sg[sg_index].Addr.lower; | |
1790 | temp64.val32.upper = curr_sg[sg_index].Addr.upper; | |
1791 | pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len, | |
1792 | ddir); | |
1793 | ++sg_index; | |
ca1e0484 MM |
1794 | } |
1795 | ||
b2a4a43d | 1796 | dev_dbg(&h->pdev->dev, "Done with %p\n", rq); |
ca1e0484 | 1797 | |
c3a4d78c | 1798 | /* set the residual count for pc requests */ |
33659ebb | 1799 | if (rq->cmd_type == REQ_TYPE_BLOCK_PC) |
f70dba83 | 1800 | rq->resid_len = c->err_info->ResidualCnt; |
ac44e5b2 | 1801 | |
c3a4d78c | 1802 | blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO); |
3daeea29 | 1803 | |
ca1e0484 | 1804 | spin_lock_irqsave(&h->lock, flags); |
6b4d96b8 | 1805 | cmd_free(h, c); |
7b30f092 | 1806 | cciss_check_queues(h); |
ca1e0484 MM |
1807 | spin_unlock_irqrestore(&h->lock, flags); |
1808 | } | |
1809 | ||
39ccf9a6 SC |
1810 | static inline void log_unit_to_scsi3addr(ctlr_info_t *h, |
1811 | unsigned char scsi3addr[], uint32_t log_unit) | |
b57695fe | 1812 | { |
9cef0d2f SC |
1813 | memcpy(scsi3addr, h->drv[log_unit]->LunID, |
1814 | sizeof(h->drv[log_unit]->LunID)); | |
b57695fe | 1815 | } |
1816 | ||
7fe06326 AP |
1817 | /* This function gets the SCSI vendor, model, and revision of a logical drive |
1818 | * via the inquiry page 0. Model, vendor, and rev are set to empty strings if | |
1819 | * they cannot be read. | |
1820 | */ | |
f70dba83 | 1821 | static void cciss_get_device_descr(ctlr_info_t *h, int logvol, |
7fe06326 AP |
1822 | char *vendor, char *model, char *rev) |
1823 | { | |
1824 | int rc; | |
1825 | InquiryData_struct *inq_buf; | |
b57695fe | 1826 | unsigned char scsi3addr[8]; |
7fe06326 AP |
1827 | |
1828 | *vendor = '\0'; | |
1829 | *model = '\0'; | |
1830 | *rev = '\0'; | |
1831 | ||
1832 | inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
1833 | if (!inq_buf) | |
1834 | return; | |
1835 | ||
f70dba83 SC |
1836 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1837 | rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0, | |
7b838bde | 1838 | scsi3addr, TYPE_CMD); |
7fe06326 AP |
1839 | if (rc == IO_OK) { |
1840 | memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN); | |
1841 | vendor[VENDOR_LEN] = '\0'; | |
1842 | memcpy(model, &inq_buf->data_byte[16], MODEL_LEN); | |
1843 | model[MODEL_LEN] = '\0'; | |
1844 | memcpy(rev, &inq_buf->data_byte[32], REV_LEN); | |
1845 | rev[REV_LEN] = '\0'; | |
1846 | } | |
1847 | ||
1848 | kfree(inq_buf); | |
1849 | return; | |
1850 | } | |
1851 | ||
a72da29b MM |
1852 | /* This function gets the serial number of a logical drive via |
1853 | * inquiry page 0x83. Serial no. is 16 bytes. If the serial | |
1854 | * number cannot be had, for whatever reason, 16 bytes of 0xff | |
1855 | * are returned instead. | |
1856 | */ | |
f70dba83 | 1857 | static void cciss_get_serial_no(ctlr_info_t *h, int logvol, |
a72da29b MM |
1858 | unsigned char *serial_no, int buflen) |
1859 | { | |
1860 | #define PAGE_83_INQ_BYTES 64 | |
1861 | int rc; | |
1862 | unsigned char *buf; | |
b57695fe | 1863 | unsigned char scsi3addr[8]; |
a72da29b MM |
1864 | |
1865 | if (buflen > 16) | |
1866 | buflen = 16; | |
1867 | memset(serial_no, 0xff, buflen); | |
1868 | buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL); | |
1869 | if (!buf) | |
1870 | return; | |
1871 | memset(serial_no, 0, buflen); | |
f70dba83 SC |
1872 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1873 | rc = sendcmd_withirq(h, CISS_INQUIRY, buf, | |
7b838bde | 1874 | PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD); |
a72da29b MM |
1875 | if (rc == IO_OK) |
1876 | memcpy(serial_no, &buf[8], buflen); | |
1877 | kfree(buf); | |
1878 | return; | |
1879 | } | |
1880 | ||
617e1344 SC |
1881 | /* |
1882 | * cciss_add_disk sets up the block device queue for a logical drive | |
1883 | */ | |
1884 | static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk, | |
6ae5ce8e MM |
1885 | int drv_index) |
1886 | { | |
1887 | disk->queue = blk_init_queue(do_cciss_request, &h->lock); | |
e8074f79 SC |
1888 | if (!disk->queue) |
1889 | goto init_queue_failure; | |
6ae5ce8e MM |
1890 | sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index); |
1891 | disk->major = h->major; | |
1892 | disk->first_minor = drv_index << NWD_SHIFT; | |
1893 | disk->fops = &cciss_fops; | |
9cef0d2f SC |
1894 | if (cciss_create_ld_sysfs_entry(h, drv_index)) |
1895 | goto cleanup_queue; | |
1896 | disk->private_data = h->drv[drv_index]; | |
1897 | disk->driverfs_dev = &h->drv[drv_index]->dev; | |
6ae5ce8e MM |
1898 | |
1899 | /* Set up queue information */ | |
1900 | blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); | |
1901 | ||
1902 | /* This is a hardware imposed limit. */ | |
8a78362c | 1903 | blk_queue_max_segments(disk->queue, h->maxsgentries); |
6ae5ce8e | 1904 | |
086fa5ff | 1905 | blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors); |
6ae5ce8e MM |
1906 | |
1907 | blk_queue_softirq_done(disk->queue, cciss_softirq_done); | |
1908 | ||
1909 | disk->queue->queuedata = h; | |
1910 | ||
e1defc4f | 1911 | blk_queue_logical_block_size(disk->queue, |
9cef0d2f | 1912 | h->drv[drv_index]->block_size); |
6ae5ce8e MM |
1913 | |
1914 | /* Make sure all queue data is written out before */ | |
9cef0d2f | 1915 | /* setting h->drv[drv_index]->queue, as setting this */ |
6ae5ce8e MM |
1916 | /* allows the interrupt handler to start the queue */ |
1917 | wmb(); | |
9cef0d2f | 1918 | h->drv[drv_index]->queue = disk->queue; |
6ae5ce8e | 1919 | add_disk(disk); |
617e1344 SC |
1920 | return 0; |
1921 | ||
1922 | cleanup_queue: | |
1923 | blk_cleanup_queue(disk->queue); | |
1924 | disk->queue = NULL; | |
e8074f79 | 1925 | init_queue_failure: |
617e1344 | 1926 | return -1; |
6ae5ce8e MM |
1927 | } |
1928 | ||
ddd47442 | 1929 | /* This function will check the usage_count of the drive to be updated/added. |
a72da29b MM |
1930 | * If the usage_count is zero and it is a heretofore unknown drive, or, |
1931 | * the drive's capacity, geometry, or serial number has changed, | |
1932 | * then the drive information will be updated and the disk will be | |
1933 | * re-registered with the kernel. If these conditions don't hold, | |
1934 | * then it will be left alone for the next reboot. The exception to this | |
1935 | * is disk 0 which will always be left registered with the kernel since it | |
1936 | * is also the controller node. Any changes to disk 0 will show up on | |
1937 | * the next reboot. | |
7c832835 | 1938 | */ |
f70dba83 SC |
1939 | static void cciss_update_drive_info(ctlr_info_t *h, int drv_index, |
1940 | int first_time, int via_ioctl) | |
7c832835 | 1941 | { |
ddd47442 | 1942 | struct gendisk *disk; |
ddd47442 MM |
1943 | InquiryData_struct *inq_buff = NULL; |
1944 | unsigned int block_size; | |
00988a35 | 1945 | sector_t total_size; |
ddd47442 MM |
1946 | unsigned long flags = 0; |
1947 | int ret = 0; | |
a72da29b MM |
1948 | drive_info_struct *drvinfo; |
1949 | ||
1950 | /* Get information about the disk and modify the driver structure */ | |
1951 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
9cef0d2f | 1952 | drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL); |
a72da29b MM |
1953 | if (inq_buff == NULL || drvinfo == NULL) |
1954 | goto mem_msg; | |
1955 | ||
1956 | /* testing to see if 16-byte CDBs are already being used */ | |
1957 | if (h->cciss_read == CCISS_READ_16) { | |
f70dba83 | 1958 | cciss_read_capacity_16(h, drv_index, |
a72da29b MM |
1959 | &total_size, &block_size); |
1960 | ||
1961 | } else { | |
f70dba83 | 1962 | cciss_read_capacity(h, drv_index, &total_size, &block_size); |
a72da29b MM |
1963 | /* if read_capacity returns all F's this volume is >2TB */ |
1964 | /* in size so we switch to 16-byte CDB's for all */ | |
1965 | /* read/write ops */ | |
1966 | if (total_size == 0xFFFFFFFFULL) { | |
f70dba83 | 1967 | cciss_read_capacity_16(h, drv_index, |
a72da29b MM |
1968 | &total_size, &block_size); |
1969 | h->cciss_read = CCISS_READ_16; | |
1970 | h->cciss_write = CCISS_WRITE_16; | |
1971 | } else { | |
1972 | h->cciss_read = CCISS_READ_10; | |
1973 | h->cciss_write = CCISS_WRITE_10; | |
1974 | } | |
1975 | } | |
1976 | ||
f70dba83 | 1977 | cciss_geometry_inquiry(h, drv_index, total_size, block_size, |
a72da29b MM |
1978 | inq_buff, drvinfo); |
1979 | drvinfo->block_size = block_size; | |
1980 | drvinfo->nr_blocks = total_size + 1; | |
1981 | ||
f70dba83 | 1982 | cciss_get_device_descr(h, drv_index, drvinfo->vendor, |
7fe06326 | 1983 | drvinfo->model, drvinfo->rev); |
f70dba83 | 1984 | cciss_get_serial_no(h, drv_index, drvinfo->serial_no, |
a72da29b | 1985 | sizeof(drvinfo->serial_no)); |
9cef0d2f SC |
1986 | /* Save the lunid in case we deregister the disk, below. */ |
1987 | memcpy(drvinfo->LunID, h->drv[drv_index]->LunID, | |
1988 | sizeof(drvinfo->LunID)); | |
a72da29b MM |
1989 | |
1990 | /* Is it the same disk we already know, and nothing's changed? */ | |
9cef0d2f | 1991 | if (h->drv[drv_index]->raid_level != -1 && |
a72da29b | 1992 | ((memcmp(drvinfo->serial_no, |
9cef0d2f SC |
1993 | h->drv[drv_index]->serial_no, 16) == 0) && |
1994 | drvinfo->block_size == h->drv[drv_index]->block_size && | |
1995 | drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks && | |
1996 | drvinfo->heads == h->drv[drv_index]->heads && | |
1997 | drvinfo->sectors == h->drv[drv_index]->sectors && | |
1998 | drvinfo->cylinders == h->drv[drv_index]->cylinders)) | |
a72da29b MM |
1999 | /* The disk is unchanged, nothing to update */ |
2000 | goto freeret; | |
a72da29b | 2001 | |
6ae5ce8e MM |
2002 | /* If we get here it's not the same disk, or something's changed, |
2003 | * so we need to * deregister it, and re-register it, if it's not | |
2004 | * in use. | |
2005 | * If the disk already exists then deregister it before proceeding | |
2006 | * (unless it's the first disk (for the controller node). | |
2007 | */ | |
9cef0d2f | 2008 | if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) { |
b2a4a43d | 2009 | dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index); |
f70dba83 | 2010 | spin_lock_irqsave(&h->lock, flags); |
9cef0d2f | 2011 | h->drv[drv_index]->busy_configuring = 1; |
f70dba83 | 2012 | spin_unlock_irqrestore(&h->lock, flags); |
e14ac670 | 2013 | |
9cef0d2f | 2014 | /* deregister_disk sets h->drv[drv_index]->queue = NULL |
6ae5ce8e MM |
2015 | * which keeps the interrupt handler from starting |
2016 | * the queue. | |
2017 | */ | |
2d11d993 | 2018 | ret = deregister_disk(h, drv_index, 0, via_ioctl); |
ddd47442 MM |
2019 | } |
2020 | ||
2021 | /* If the disk is in use return */ | |
2022 | if (ret) | |
a72da29b MM |
2023 | goto freeret; |
2024 | ||
6ae5ce8e | 2025 | /* Save the new information from cciss_geometry_inquiry |
9cef0d2f SC |
2026 | * and serial number inquiry. If the disk was deregistered |
2027 | * above, then h->drv[drv_index] will be NULL. | |
6ae5ce8e | 2028 | */ |
9cef0d2f SC |
2029 | if (h->drv[drv_index] == NULL) { |
2030 | drvinfo->device_initialized = 0; | |
2031 | h->drv[drv_index] = drvinfo; | |
2032 | drvinfo = NULL; /* so it won't be freed below. */ | |
2033 | } else { | |
2034 | /* special case for cxd0 */ | |
2035 | h->drv[drv_index]->block_size = drvinfo->block_size; | |
2036 | h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks; | |
2037 | h->drv[drv_index]->heads = drvinfo->heads; | |
2038 | h->drv[drv_index]->sectors = drvinfo->sectors; | |
2039 | h->drv[drv_index]->cylinders = drvinfo->cylinders; | |
2040 | h->drv[drv_index]->raid_level = drvinfo->raid_level; | |
2041 | memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16); | |
2042 | memcpy(h->drv[drv_index]->vendor, drvinfo->vendor, | |
2043 | VENDOR_LEN + 1); | |
2044 | memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1); | |
2045 | memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1); | |
2046 | } | |
ddd47442 MM |
2047 | |
2048 | ++h->num_luns; | |
2049 | disk = h->gendisk[drv_index]; | |
9cef0d2f | 2050 | set_capacity(disk, h->drv[drv_index]->nr_blocks); |
ddd47442 | 2051 | |
6ae5ce8e MM |
2052 | /* If it's not disk 0 (drv_index != 0) |
2053 | * or if it was disk 0, but there was previously | |
2054 | * no actual corresponding configured logical drive | |
2055 | * (raid_leve == -1) then we want to update the | |
2056 | * logical drive's information. | |
2057 | */ | |
361e9b07 SC |
2058 | if (drv_index || first_time) { |
2059 | if (cciss_add_disk(h, disk, drv_index) != 0) { | |
2060 | cciss_free_gendisk(h, drv_index); | |
9cef0d2f | 2061 | cciss_free_drive_info(h, drv_index); |
b2a4a43d SC |
2062 | dev_warn(&h->pdev->dev, "could not update disk %d\n", |
2063 | drv_index); | |
361e9b07 SC |
2064 | --h->num_luns; |
2065 | } | |
2066 | } | |
ddd47442 | 2067 | |
6ae5ce8e | 2068 | freeret: |
ddd47442 | 2069 | kfree(inq_buff); |
a72da29b | 2070 | kfree(drvinfo); |
ddd47442 | 2071 | return; |
6ae5ce8e | 2072 | mem_msg: |
b2a4a43d | 2073 | dev_err(&h->pdev->dev, "out of memory\n"); |
ddd47442 MM |
2074 | goto freeret; |
2075 | } | |
2076 | ||
2077 | /* This function will find the first index of the controllers drive array | |
9cef0d2f SC |
2078 | * that has a null drv pointer and allocate the drive info struct and |
2079 | * will return that index This is where new drives will be added. | |
2080 | * If the index to be returned is greater than the highest_lun index for | |
2081 | * the controller then highest_lun is set * to this new index. | |
2082 | * If there are no available indexes or if tha allocation fails, then -1 | |
2083 | * is returned. * "controller_node" is used to know if this is a real | |
2084 | * logical drive, or just the controller node, which determines if this | |
2085 | * counts towards highest_lun. | |
7c832835 | 2086 | */ |
9cef0d2f | 2087 | static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node) |
ddd47442 MM |
2088 | { |
2089 | int i; | |
9cef0d2f | 2090 | drive_info_struct *drv; |
ddd47442 | 2091 | |
9cef0d2f | 2092 | /* Search for an empty slot for our drive info */ |
7c832835 | 2093 | for (i = 0; i < CISS_MAX_LUN; i++) { |
9cef0d2f SC |
2094 | |
2095 | /* if not cxd0 case, and it's occupied, skip it. */ | |
2096 | if (h->drv[i] && i != 0) | |
2097 | continue; | |
2098 | /* | |
2099 | * If it's cxd0 case, and drv is alloc'ed already, and a | |
2100 | * disk is configured there, skip it. | |
2101 | */ | |
2102 | if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1) | |
2103 | continue; | |
2104 | ||
2105 | /* | |
2106 | * We've found an empty slot. Update highest_lun | |
2107 | * provided this isn't just the fake cxd0 controller node. | |
2108 | */ | |
2109 | if (i > h->highest_lun && !controller_node) | |
2110 | h->highest_lun = i; | |
2111 | ||
2112 | /* If adding a real disk at cxd0, and it's already alloc'ed */ | |
2113 | if (i == 0 && h->drv[i] != NULL) | |
ddd47442 | 2114 | return i; |
9cef0d2f SC |
2115 | |
2116 | /* | |
2117 | * Found an empty slot, not already alloc'ed. Allocate it. | |
2118 | * Mark it with raid_level == -1, so we know it's new later on. | |
2119 | */ | |
2120 | drv = kzalloc(sizeof(*drv), GFP_KERNEL); | |
2121 | if (!drv) | |
2122 | return -1; | |
2123 | drv->raid_level = -1; /* so we know it's new */ | |
2124 | h->drv[i] = drv; | |
2125 | return i; | |
ddd47442 MM |
2126 | } |
2127 | return -1; | |
2128 | } | |
2129 | ||
9cef0d2f SC |
2130 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index) |
2131 | { | |
2132 | kfree(h->drv[drv_index]); | |
2133 | h->drv[drv_index] = NULL; | |
2134 | } | |
2135 | ||
361e9b07 SC |
2136 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index) |
2137 | { | |
2138 | put_disk(h->gendisk[drv_index]); | |
2139 | h->gendisk[drv_index] = NULL; | |
2140 | } | |
2141 | ||
6ae5ce8e MM |
2142 | /* cciss_add_gendisk finds a free hba[]->drv structure |
2143 | * and allocates a gendisk if needed, and sets the lunid | |
2144 | * in the drvinfo structure. It returns the index into | |
2145 | * the ->drv[] array, or -1 if none are free. | |
2146 | * is_controller_node indicates whether highest_lun should | |
2147 | * count this disk, or if it's only being added to provide | |
2148 | * a means to talk to the controller in case no logical | |
2149 | * drives have yet been configured. | |
2150 | */ | |
39ccf9a6 SC |
2151 | static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[], |
2152 | int controller_node) | |
6ae5ce8e MM |
2153 | { |
2154 | int drv_index; | |
2155 | ||
9cef0d2f | 2156 | drv_index = cciss_alloc_drive_info(h, controller_node); |
6ae5ce8e MM |
2157 | if (drv_index == -1) |
2158 | return -1; | |
8ce51966 | 2159 | |
6ae5ce8e MM |
2160 | /*Check if the gendisk needs to be allocated */ |
2161 | if (!h->gendisk[drv_index]) { | |
2162 | h->gendisk[drv_index] = | |
2163 | alloc_disk(1 << NWD_SHIFT); | |
2164 | if (!h->gendisk[drv_index]) { | |
b2a4a43d SC |
2165 | dev_err(&h->pdev->dev, |
2166 | "could not allocate a new disk %d\n", | |
2167 | drv_index); | |
9cef0d2f | 2168 | goto err_free_drive_info; |
6ae5ce8e MM |
2169 | } |
2170 | } | |
9cef0d2f SC |
2171 | memcpy(h->drv[drv_index]->LunID, lunid, |
2172 | sizeof(h->drv[drv_index]->LunID)); | |
2173 | if (cciss_create_ld_sysfs_entry(h, drv_index)) | |
7fe06326 | 2174 | goto err_free_disk; |
6ae5ce8e MM |
2175 | /* Don't need to mark this busy because nobody */ |
2176 | /* else knows about this disk yet to contend */ | |
2177 | /* for access to it. */ | |
9cef0d2f | 2178 | h->drv[drv_index]->busy_configuring = 0; |
6ae5ce8e MM |
2179 | wmb(); |
2180 | return drv_index; | |
7fe06326 AP |
2181 | |
2182 | err_free_disk: | |
361e9b07 | 2183 | cciss_free_gendisk(h, drv_index); |
9cef0d2f SC |
2184 | err_free_drive_info: |
2185 | cciss_free_drive_info(h, drv_index); | |
7fe06326 | 2186 | return -1; |
6ae5ce8e MM |
2187 | } |
2188 | ||
2189 | /* This is for the special case of a controller which | |
2190 | * has no logical drives. In this case, we still need | |
2191 | * to register a disk so the controller can be accessed | |
2192 | * by the Array Config Utility. | |
2193 | */ | |
2194 | static void cciss_add_controller_node(ctlr_info_t *h) | |
2195 | { | |
2196 | struct gendisk *disk; | |
2197 | int drv_index; | |
2198 | ||
2199 | if (h->gendisk[0] != NULL) /* already did this? Then bail. */ | |
2200 | return; | |
2201 | ||
39ccf9a6 | 2202 | drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1); |
361e9b07 SC |
2203 | if (drv_index == -1) |
2204 | goto error; | |
9cef0d2f SC |
2205 | h->drv[drv_index]->block_size = 512; |
2206 | h->drv[drv_index]->nr_blocks = 0; | |
2207 | h->drv[drv_index]->heads = 0; | |
2208 | h->drv[drv_index]->sectors = 0; | |
2209 | h->drv[drv_index]->cylinders = 0; | |
2210 | h->drv[drv_index]->raid_level = -1; | |
2211 | memset(h->drv[drv_index]->serial_no, 0, 16); | |
6ae5ce8e | 2212 | disk = h->gendisk[drv_index]; |
361e9b07 SC |
2213 | if (cciss_add_disk(h, disk, drv_index) == 0) |
2214 | return; | |
2215 | cciss_free_gendisk(h, drv_index); | |
9cef0d2f | 2216 | cciss_free_drive_info(h, drv_index); |
361e9b07 | 2217 | error: |
b2a4a43d | 2218 | dev_warn(&h->pdev->dev, "could not add disk 0.\n"); |
361e9b07 | 2219 | return; |
6ae5ce8e MM |
2220 | } |
2221 | ||
ddd47442 | 2222 | /* This function will add and remove logical drives from the Logical |
d14c4ab5 | 2223 | * drive array of the controller and maintain persistency of ordering |
ddd47442 MM |
2224 | * so that mount points are preserved until the next reboot. This allows |
2225 | * for the removal of logical drives in the middle of the drive array | |
2226 | * without a re-ordering of those drives. | |
2227 | * INPUT | |
2228 | * h = The controller to perform the operations on | |
7c832835 | 2229 | */ |
2d11d993 SC |
2230 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, |
2231 | int via_ioctl) | |
1da177e4 | 2232 | { |
ddd47442 MM |
2233 | int num_luns; |
2234 | ReportLunData_struct *ld_buff = NULL; | |
ddd47442 MM |
2235 | int return_code; |
2236 | int listlength = 0; | |
2237 | int i; | |
2238 | int drv_found; | |
2239 | int drv_index = 0; | |
39ccf9a6 | 2240 | unsigned char lunid[8] = CTLR_LUNID; |
1da177e4 | 2241 | unsigned long flags; |
ddd47442 | 2242 | |
6ae5ce8e MM |
2243 | if (!capable(CAP_SYS_RAWIO)) |
2244 | return -EPERM; | |
2245 | ||
ddd47442 | 2246 | /* Set busy_configuring flag for this operation */ |
f70dba83 | 2247 | spin_lock_irqsave(&h->lock, flags); |
7c832835 | 2248 | if (h->busy_configuring) { |
f70dba83 | 2249 | spin_unlock_irqrestore(&h->lock, flags); |
ddd47442 MM |
2250 | return -EBUSY; |
2251 | } | |
2252 | h->busy_configuring = 1; | |
f70dba83 | 2253 | spin_unlock_irqrestore(&h->lock, flags); |
ddd47442 | 2254 | |
a72da29b MM |
2255 | ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL); |
2256 | if (ld_buff == NULL) | |
2257 | goto mem_msg; | |
2258 | ||
f70dba83 | 2259 | return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff, |
b57695fe | 2260 | sizeof(ReportLunData_struct), |
2261 | 0, CTLR_LUNID, TYPE_CMD); | |
ddd47442 | 2262 | |
a72da29b MM |
2263 | if (return_code == IO_OK) |
2264 | listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength); | |
2265 | else { /* reading number of logical volumes failed */ | |
b2a4a43d SC |
2266 | dev_warn(&h->pdev->dev, |
2267 | "report logical volume command failed\n"); | |
a72da29b MM |
2268 | listlength = 0; |
2269 | goto freeret; | |
2270 | } | |
2271 | ||
2272 | num_luns = listlength / 8; /* 8 bytes per entry */ | |
2273 | if (num_luns > CISS_MAX_LUN) { | |
2274 | num_luns = CISS_MAX_LUN; | |
b2a4a43d | 2275 | dev_warn(&h->pdev->dev, "more luns configured" |
a72da29b MM |
2276 | " on controller than can be handled by" |
2277 | " this driver.\n"); | |
2278 | } | |
2279 | ||
6ae5ce8e MM |
2280 | if (num_luns == 0) |
2281 | cciss_add_controller_node(h); | |
2282 | ||
2283 | /* Compare controller drive array to driver's drive array | |
2284 | * to see if any drives are missing on the controller due | |
2285 | * to action of Array Config Utility (user deletes drive) | |
2286 | * and deregister logical drives which have disappeared. | |
2287 | */ | |
a72da29b MM |
2288 | for (i = 0; i <= h->highest_lun; i++) { |
2289 | int j; | |
2290 | drv_found = 0; | |
d8a0be6a SC |
2291 | |
2292 | /* skip holes in the array from already deleted drives */ | |
9cef0d2f | 2293 | if (h->drv[i] == NULL) |
d8a0be6a SC |
2294 | continue; |
2295 | ||
a72da29b | 2296 | for (j = 0; j < num_luns; j++) { |
39ccf9a6 | 2297 | memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid)); |
9cef0d2f | 2298 | if (memcmp(h->drv[i]->LunID, lunid, |
39ccf9a6 | 2299 | sizeof(lunid)) == 0) { |
a72da29b MM |
2300 | drv_found = 1; |
2301 | break; | |
2302 | } | |
2303 | } | |
2304 | if (!drv_found) { | |
2305 | /* Deregister it from the OS, it's gone. */ | |
f70dba83 | 2306 | spin_lock_irqsave(&h->lock, flags); |
9cef0d2f | 2307 | h->drv[i]->busy_configuring = 1; |
f70dba83 | 2308 | spin_unlock_irqrestore(&h->lock, flags); |
2d11d993 | 2309 | return_code = deregister_disk(h, i, 1, via_ioctl); |
9cef0d2f SC |
2310 | if (h->drv[i] != NULL) |
2311 | h->drv[i]->busy_configuring = 0; | |
ddd47442 | 2312 | } |
a72da29b | 2313 | } |
ddd47442 | 2314 | |
a72da29b MM |
2315 | /* Compare controller drive array to driver's drive array. |
2316 | * Check for updates in the drive information and any new drives | |
2317 | * on the controller due to ACU adding logical drives, or changing | |
2318 | * a logical drive's size, etc. Reregister any new/changed drives | |
2319 | */ | |
2320 | for (i = 0; i < num_luns; i++) { | |
2321 | int j; | |
ddd47442 | 2322 | |
a72da29b | 2323 | drv_found = 0; |
ddd47442 | 2324 | |
39ccf9a6 | 2325 | memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid)); |
a72da29b MM |
2326 | /* Find if the LUN is already in the drive array |
2327 | * of the driver. If so then update its info | |
2328 | * if not in use. If it does not exist then find | |
2329 | * the first free index and add it. | |
2330 | */ | |
2331 | for (j = 0; j <= h->highest_lun; j++) { | |
9cef0d2f SC |
2332 | if (h->drv[j] != NULL && |
2333 | memcmp(h->drv[j]->LunID, lunid, | |
2334 | sizeof(h->drv[j]->LunID)) == 0) { | |
a72da29b MM |
2335 | drv_index = j; |
2336 | drv_found = 1; | |
2337 | break; | |
ddd47442 | 2338 | } |
a72da29b | 2339 | } |
ddd47442 | 2340 | |
a72da29b MM |
2341 | /* check if the drive was found already in the array */ |
2342 | if (!drv_found) { | |
eece695f | 2343 | drv_index = cciss_add_gendisk(h, lunid, 0); |
a72da29b MM |
2344 | if (drv_index == -1) |
2345 | goto freeret; | |
a72da29b | 2346 | } |
f70dba83 | 2347 | cciss_update_drive_info(h, drv_index, first_time, via_ioctl); |
a72da29b | 2348 | } /* end for */ |
ddd47442 | 2349 | |
6ae5ce8e | 2350 | freeret: |
ddd47442 MM |
2351 | kfree(ld_buff); |
2352 | h->busy_configuring = 0; | |
2353 | /* We return -1 here to tell the ACU that we have registered/updated | |
2354 | * all of the drives that we can and to keep it from calling us | |
2355 | * additional times. | |
7c832835 | 2356 | */ |
ddd47442 | 2357 | return -1; |
6ae5ce8e | 2358 | mem_msg: |
b2a4a43d | 2359 | dev_err(&h->pdev->dev, "out of memory\n"); |
a72da29b | 2360 | h->busy_configuring = 0; |
ddd47442 MM |
2361 | goto freeret; |
2362 | } | |
2363 | ||
9ddb27b4 SC |
2364 | static void cciss_clear_drive_info(drive_info_struct *drive_info) |
2365 | { | |
2366 | /* zero out the disk size info */ | |
2367 | drive_info->nr_blocks = 0; | |
2368 | drive_info->block_size = 0; | |
2369 | drive_info->heads = 0; | |
2370 | drive_info->sectors = 0; | |
2371 | drive_info->cylinders = 0; | |
2372 | drive_info->raid_level = -1; | |
2373 | memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no)); | |
2374 | memset(drive_info->model, 0, sizeof(drive_info->model)); | |
2375 | memset(drive_info->rev, 0, sizeof(drive_info->rev)); | |
2376 | memset(drive_info->vendor, 0, sizeof(drive_info->vendor)); | |
2377 | /* | |
2378 | * don't clear the LUNID though, we need to remember which | |
2379 | * one this one is. | |
2380 | */ | |
2381 | } | |
2382 | ||
ddd47442 MM |
2383 | /* This function will deregister the disk and it's queue from the |
2384 | * kernel. It must be called with the controller lock held and the | |
2385 | * drv structures busy_configuring flag set. It's parameters are: | |
2386 | * | |
2387 | * disk = This is the disk to be deregistered | |
2388 | * drv = This is the drive_info_struct associated with the disk to be | |
2389 | * deregistered. It contains information about the disk used | |
2390 | * by the driver. | |
2391 | * clear_all = This flag determines whether or not the disk information | |
2392 | * is going to be completely cleared out and the highest_lun | |
2393 | * reset. Sometimes we want to clear out information about | |
d14c4ab5 | 2394 | * the disk in preparation for re-adding it. In this case |
ddd47442 MM |
2395 | * the highest_lun should be left unchanged and the LunID |
2396 | * should not be cleared. | |
2d11d993 SC |
2397 | * via_ioctl |
2398 | * This indicates whether we've reached this path via ioctl. | |
2399 | * This affects the maximum usage count allowed for c0d0 to be messed with. | |
2400 | * If this path is reached via ioctl(), then the max_usage_count will | |
2401 | * be 1, as the process calling ioctl() has got to have the device open. | |
2402 | * If we get here via sysfs, then the max usage count will be zero. | |
ddd47442 | 2403 | */ |
a0ea8622 | 2404 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
2d11d993 | 2405 | int clear_all, int via_ioctl) |
ddd47442 | 2406 | { |
799202cb | 2407 | int i; |
a0ea8622 SC |
2408 | struct gendisk *disk; |
2409 | drive_info_struct *drv; | |
9cef0d2f | 2410 | int recalculate_highest_lun; |
1da177e4 LT |
2411 | |
2412 | if (!capable(CAP_SYS_RAWIO)) | |
2413 | return -EPERM; | |
2414 | ||
9cef0d2f | 2415 | drv = h->drv[drv_index]; |
a0ea8622 SC |
2416 | disk = h->gendisk[drv_index]; |
2417 | ||
1da177e4 | 2418 | /* make sure logical volume is NOT is use */ |
7c832835 | 2419 | if (clear_all || (h->gendisk[0] == disk)) { |
2d11d993 | 2420 | if (drv->usage_count > via_ioctl) |
7c832835 BH |
2421 | return -EBUSY; |
2422 | } else if (drv->usage_count > 0) | |
2423 | return -EBUSY; | |
1da177e4 | 2424 | |
9cef0d2f SC |
2425 | recalculate_highest_lun = (drv == h->drv[h->highest_lun]); |
2426 | ||
ddd47442 MM |
2427 | /* invalidate the devices and deregister the disk. If it is disk |
2428 | * zero do not deregister it but just zero out it's values. This | |
2429 | * allows us to delete disk zero but keep the controller registered. | |
7c832835 BH |
2430 | */ |
2431 | if (h->gendisk[0] != disk) { | |
5a9df732 | 2432 | struct request_queue *q = disk->queue; |
097d0264 | 2433 | if (disk->flags & GENHD_FL_UP) { |
8ce51966 | 2434 | cciss_destroy_ld_sysfs_entry(h, drv_index, 0); |
5a9df732 | 2435 | del_gendisk(disk); |
5a9df732 | 2436 | } |
9cef0d2f | 2437 | if (q) |
5a9df732 | 2438 | blk_cleanup_queue(q); |
5a9df732 AB |
2439 | /* If clear_all is set then we are deleting the logical |
2440 | * drive, not just refreshing its info. For drives | |
2441 | * other than disk 0 we will call put_disk. We do not | |
2442 | * do this for disk 0 as we need it to be able to | |
2443 | * configure the controller. | |
a72da29b | 2444 | */ |
5a9df732 AB |
2445 | if (clear_all){ |
2446 | /* This isn't pretty, but we need to find the | |
2447 | * disk in our array and NULL our the pointer. | |
2448 | * This is so that we will call alloc_disk if | |
2449 | * this index is used again later. | |
a72da29b | 2450 | */ |
5a9df732 | 2451 | for (i=0; i < CISS_MAX_LUN; i++){ |
a72da29b | 2452 | if (h->gendisk[i] == disk) { |
5a9df732 AB |
2453 | h->gendisk[i] = NULL; |
2454 | break; | |
799202cb | 2455 | } |
799202cb | 2456 | } |
5a9df732 | 2457 | put_disk(disk); |
ddd47442 | 2458 | } |
799202cb MM |
2459 | } else { |
2460 | set_capacity(disk, 0); | |
9cef0d2f | 2461 | cciss_clear_drive_info(drv); |
ddd47442 MM |
2462 | } |
2463 | ||
2464 | --h->num_luns; | |
ddd47442 | 2465 | |
9cef0d2f SC |
2466 | /* if it was the last disk, find the new hightest lun */ |
2467 | if (clear_all && recalculate_highest_lun) { | |
c2d45b4d | 2468 | int newhighest = -1; |
9cef0d2f SC |
2469 | for (i = 0; i <= h->highest_lun; i++) { |
2470 | /* if the disk has size > 0, it is available */ | |
2471 | if (h->drv[i] && h->drv[i]->heads) | |
2472 | newhighest = i; | |
1da177e4 | 2473 | } |
9cef0d2f | 2474 | h->highest_lun = newhighest; |
ddd47442 | 2475 | } |
e2019b58 | 2476 | return 0; |
1da177e4 | 2477 | } |
ddd47442 | 2478 | |
f70dba83 | 2479 | static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff, |
b57695fe | 2480 | size_t size, __u8 page_code, unsigned char *scsi3addr, |
2481 | int cmd_type) | |
1da177e4 | 2482 | { |
1da177e4 LT |
2483 | u64bit buff_dma_handle; |
2484 | int status = IO_OK; | |
2485 | ||
2486 | c->cmd_type = CMD_IOCTL_PEND; | |
2487 | c->Header.ReplyQueue = 0; | |
7c832835 | 2488 | if (buff != NULL) { |
1da177e4 | 2489 | c->Header.SGList = 1; |
7c832835 | 2490 | c->Header.SGTotal = 1; |
1da177e4 LT |
2491 | } else { |
2492 | c->Header.SGList = 0; | |
7c832835 | 2493 | c->Header.SGTotal = 0; |
1da177e4 LT |
2494 | } |
2495 | c->Header.Tag.lower = c->busaddr; | |
b57695fe | 2496 | memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); |
1da177e4 LT |
2497 | |
2498 | c->Request.Type.Type = cmd_type; | |
2499 | if (cmd_type == TYPE_CMD) { | |
7c832835 BH |
2500 | switch (cmd) { |
2501 | case CISS_INQUIRY: | |
1da177e4 | 2502 | /* are we trying to read a vital product page */ |
7c832835 | 2503 | if (page_code != 0) { |
1da177e4 LT |
2504 | c->Request.CDB[1] = 0x01; |
2505 | c->Request.CDB[2] = page_code; | |
2506 | } | |
2507 | c->Request.CDBLen = 6; | |
7c832835 | 2508 | c->Request.Type.Attribute = ATTR_SIMPLE; |
1da177e4 LT |
2509 | c->Request.Type.Direction = XFER_READ; |
2510 | c->Request.Timeout = 0; | |
7c832835 BH |
2511 | c->Request.CDB[0] = CISS_INQUIRY; |
2512 | c->Request.CDB[4] = size & 0xFF; | |
2513 | break; | |
1da177e4 LT |
2514 | case CISS_REPORT_LOG: |
2515 | case CISS_REPORT_PHYS: | |
7c832835 | 2516 | /* Talking to controller so It's a physical command |
1da177e4 | 2517 | mode = 00 target = 0. Nothing to write. |
7c832835 | 2518 | */ |
1da177e4 LT |
2519 | c->Request.CDBLen = 12; |
2520 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2521 | c->Request.Type.Direction = XFER_READ; | |
2522 | c->Request.Timeout = 0; | |
2523 | c->Request.CDB[0] = cmd; | |
b028461d | 2524 | c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ |
1da177e4 LT |
2525 | c->Request.CDB[7] = (size >> 16) & 0xFF; |
2526 | c->Request.CDB[8] = (size >> 8) & 0xFF; | |
2527 | c->Request.CDB[9] = size & 0xFF; | |
2528 | break; | |
2529 | ||
2530 | case CCISS_READ_CAPACITY: | |
1da177e4 LT |
2531 | c->Request.CDBLen = 10; |
2532 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2533 | c->Request.Type.Direction = XFER_READ; | |
2534 | c->Request.Timeout = 0; | |
2535 | c->Request.CDB[0] = cmd; | |
7c832835 | 2536 | break; |
00988a35 | 2537 | case CCISS_READ_CAPACITY_16: |
00988a35 MMOD |
2538 | c->Request.CDBLen = 16; |
2539 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2540 | c->Request.Type.Direction = XFER_READ; | |
2541 | c->Request.Timeout = 0; | |
2542 | c->Request.CDB[0] = cmd; | |
2543 | c->Request.CDB[1] = 0x10; | |
2544 | c->Request.CDB[10] = (size >> 24) & 0xFF; | |
2545 | c->Request.CDB[11] = (size >> 16) & 0xFF; | |
2546 | c->Request.CDB[12] = (size >> 8) & 0xFF; | |
2547 | c->Request.CDB[13] = size & 0xFF; | |
2548 | c->Request.Timeout = 0; | |
2549 | c->Request.CDB[0] = cmd; | |
2550 | break; | |
1da177e4 LT |
2551 | case CCISS_CACHE_FLUSH: |
2552 | c->Request.CDBLen = 12; | |
2553 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2554 | c->Request.Type.Direction = XFER_WRITE; | |
2555 | c->Request.Timeout = 0; | |
2556 | c->Request.CDB[0] = BMIC_WRITE; | |
2557 | c->Request.CDB[6] = BMIC_CACHE_FLUSH; | |
7c832835 | 2558 | break; |
88f627ae | 2559 | case TEST_UNIT_READY: |
88f627ae SC |
2560 | c->Request.CDBLen = 6; |
2561 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2562 | c->Request.Type.Direction = XFER_NONE; | |
2563 | c->Request.Timeout = 0; | |
2564 | break; | |
1da177e4 | 2565 | default: |
b2a4a43d | 2566 | dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd); |
e2019b58 | 2567 | return IO_ERROR; |
1da177e4 LT |
2568 | } |
2569 | } else if (cmd_type == TYPE_MSG) { | |
2570 | switch (cmd) { | |
7c832835 | 2571 | case 0: /* ABORT message */ |
3da8b713 | 2572 | c->Request.CDBLen = 12; |
2573 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2574 | c->Request.Type.Direction = XFER_WRITE; | |
2575 | c->Request.Timeout = 0; | |
7c832835 BH |
2576 | c->Request.CDB[0] = cmd; /* abort */ |
2577 | c->Request.CDB[1] = 0; /* abort a command */ | |
3da8b713 | 2578 | /* buff contains the tag of the command to abort */ |
2579 | memcpy(&c->Request.CDB[4], buff, 8); | |
2580 | break; | |
7c832835 | 2581 | case 1: /* RESET message */ |
88f627ae | 2582 | c->Request.CDBLen = 16; |
3da8b713 | 2583 | c->Request.Type.Attribute = ATTR_SIMPLE; |
88f627ae | 2584 | c->Request.Type.Direction = XFER_NONE; |
3da8b713 | 2585 | c->Request.Timeout = 0; |
2586 | memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); | |
7c832835 | 2587 | c->Request.CDB[0] = cmd; /* reset */ |
88f627ae | 2588 | c->Request.CDB[1] = 0x03; /* reset a target */ |
00988a35 | 2589 | break; |
1da177e4 LT |
2590 | case 3: /* No-Op message */ |
2591 | c->Request.CDBLen = 1; | |
2592 | c->Request.Type.Attribute = ATTR_SIMPLE; | |
2593 | c->Request.Type.Direction = XFER_WRITE; | |
2594 | c->Request.Timeout = 0; | |
2595 | c->Request.CDB[0] = cmd; | |
2596 | break; | |
2597 | default: | |
b2a4a43d SC |
2598 | dev_warn(&h->pdev->dev, |
2599 | "unknown message type %d\n", cmd); | |
1da177e4 LT |
2600 | return IO_ERROR; |
2601 | } | |
2602 | } else { | |
b2a4a43d | 2603 | dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); |
1da177e4 LT |
2604 | return IO_ERROR; |
2605 | } | |
2606 | /* Fill in the scatter gather information */ | |
2607 | if (size > 0) { | |
2608 | buff_dma_handle.val = (__u64) pci_map_single(h->pdev, | |
7c832835 BH |
2609 | buff, size, |
2610 | PCI_DMA_BIDIRECTIONAL); | |
1da177e4 LT |
2611 | c->SG[0].Addr.lower = buff_dma_handle.val32.lower; |
2612 | c->SG[0].Addr.upper = buff_dma_handle.val32.upper; | |
2613 | c->SG[0].Len = size; | |
7c832835 | 2614 | c->SG[0].Ext = 0; /* we are not chaining */ |
1da177e4 LT |
2615 | } |
2616 | return status; | |
2617 | } | |
7c832835 | 2618 | |
3c2ab402 | 2619 | static int check_target_status(ctlr_info_t *h, CommandList_struct *c) |
2620 | { | |
2621 | switch (c->err_info->ScsiStatus) { | |
2622 | case SAM_STAT_GOOD: | |
2623 | return IO_OK; | |
2624 | case SAM_STAT_CHECK_CONDITION: | |
2625 | switch (0xf & c->err_info->SenseInfo[2]) { | |
2626 | case 0: return IO_OK; /* no sense */ | |
2627 | case 1: return IO_OK; /* recovered error */ | |
2628 | default: | |
c08fac65 SC |
2629 | if (check_for_unit_attention(h, c)) |
2630 | return IO_NEEDS_RETRY; | |
b2a4a43d | 2631 | dev_warn(&h->pdev->dev, "cmd 0x%02x " |
3c2ab402 | 2632 | "check condition, sense key = 0x%02x\n", |
b2a4a43d | 2633 | c->Request.CDB[0], c->err_info->SenseInfo[2]); |
3c2ab402 | 2634 | } |
2635 | break; | |
2636 | default: | |
b2a4a43d SC |
2637 | dev_warn(&h->pdev->dev, "cmd 0x%02x" |
2638 | "scsi status = 0x%02x\n", | |
3c2ab402 | 2639 | c->Request.CDB[0], c->err_info->ScsiStatus); |
2640 | break; | |
2641 | } | |
2642 | return IO_ERROR; | |
2643 | } | |
2644 | ||
789a424a | 2645 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 | 2646 | { |
5390cfc3 | 2647 | int return_status = IO_OK; |
7c832835 | 2648 | |
789a424a | 2649 | if (c->err_info->CommandStatus == CMD_SUCCESS) |
2650 | return IO_OK; | |
5390cfc3 | 2651 | |
2652 | switch (c->err_info->CommandStatus) { | |
2653 | case CMD_TARGET_STATUS: | |
3c2ab402 | 2654 | return_status = check_target_status(h, c); |
5390cfc3 | 2655 | break; |
2656 | case CMD_DATA_UNDERRUN: | |
2657 | case CMD_DATA_OVERRUN: | |
2658 | /* expected for inquiry and report lun commands */ | |
2659 | break; | |
2660 | case CMD_INVALID: | |
b2a4a43d | 2661 | dev_warn(&h->pdev->dev, "cmd 0x%02x is " |
5390cfc3 | 2662 | "reported invalid\n", c->Request.CDB[0]); |
2663 | return_status = IO_ERROR; | |
2664 | break; | |
2665 | case CMD_PROTOCOL_ERR: | |
b2a4a43d SC |
2666 | dev_warn(&h->pdev->dev, "cmd 0x%02x has " |
2667 | "protocol error\n", c->Request.CDB[0]); | |
5390cfc3 | 2668 | return_status = IO_ERROR; |
2669 | break; | |
2670 | case CMD_HARDWARE_ERR: | |
b2a4a43d | 2671 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
5390cfc3 | 2672 | " hardware error\n", c->Request.CDB[0]); |
2673 | return_status = IO_ERROR; | |
2674 | break; | |
2675 | case CMD_CONNECTION_LOST: | |
b2a4a43d | 2676 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
5390cfc3 | 2677 | "connection lost\n", c->Request.CDB[0]); |
2678 | return_status = IO_ERROR; | |
2679 | break; | |
2680 | case CMD_ABORTED: | |
b2a4a43d | 2681 | dev_warn(&h->pdev->dev, "cmd 0x%02x was " |
5390cfc3 | 2682 | "aborted\n", c->Request.CDB[0]); |
2683 | return_status = IO_ERROR; | |
2684 | break; | |
2685 | case CMD_ABORT_FAILED: | |
b2a4a43d | 2686 | dev_warn(&h->pdev->dev, "cmd 0x%02x reports " |
5390cfc3 | 2687 | "abort failed\n", c->Request.CDB[0]); |
2688 | return_status = IO_ERROR; | |
2689 | break; | |
2690 | case CMD_UNSOLICITED_ABORT: | |
b2a4a43d | 2691 | dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n", |
5390cfc3 | 2692 | c->Request.CDB[0]); |
789a424a | 2693 | return_status = IO_NEEDS_RETRY; |
5390cfc3 | 2694 | break; |
2695 | default: | |
b2a4a43d | 2696 | dev_warn(&h->pdev->dev, "cmd 0x%02x returned " |
5390cfc3 | 2697 | "unknown status %x\n", c->Request.CDB[0], |
2698 | c->err_info->CommandStatus); | |
2699 | return_status = IO_ERROR; | |
7c832835 | 2700 | } |
789a424a | 2701 | return return_status; |
2702 | } | |
2703 | ||
2704 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, | |
2705 | int attempt_retry) | |
2706 | { | |
2707 | DECLARE_COMPLETION_ONSTACK(wait); | |
2708 | u64bit buff_dma_handle; | |
789a424a | 2709 | int return_status = IO_OK; |
2710 | ||
2711 | resend_cmd2: | |
2712 | c->waiting = &wait; | |
664a717d | 2713 | enqueue_cmd_and_start_io(h, c); |
789a424a | 2714 | |
2715 | wait_for_completion(&wait); | |
2716 | ||
2717 | if (c->err_info->CommandStatus == 0 || !attempt_retry) | |
2718 | goto command_done; | |
2719 | ||
2720 | return_status = process_sendcmd_error(h, c); | |
2721 | ||
2722 | if (return_status == IO_NEEDS_RETRY && | |
2723 | c->retry_count < MAX_CMD_RETRIES) { | |
b2a4a43d | 2724 | dev_warn(&h->pdev->dev, "retrying 0x%02x\n", |
789a424a | 2725 | c->Request.CDB[0]); |
2726 | c->retry_count++; | |
2727 | /* erase the old error information */ | |
2728 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
2729 | return_status = IO_OK; | |
2730 | INIT_COMPLETION(wait); | |
2731 | goto resend_cmd2; | |
2732 | } | |
5390cfc3 | 2733 | |
2734 | command_done: | |
1da177e4 | 2735 | /* unlock the buffers from DMA */ |
bb2a37bf MM |
2736 | buff_dma_handle.val32.lower = c->SG[0].Addr.lower; |
2737 | buff_dma_handle.val32.upper = c->SG[0].Addr.upper; | |
7c832835 BH |
2738 | pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val, |
2739 | c->SG[0].Len, PCI_DMA_BIDIRECTIONAL); | |
5390cfc3 | 2740 | return return_status; |
2741 | } | |
2742 | ||
f70dba83 | 2743 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
b57695fe | 2744 | __u8 page_code, unsigned char scsi3addr[], |
2745 | int cmd_type) | |
5390cfc3 | 2746 | { |
5390cfc3 | 2747 | CommandList_struct *c; |
2748 | int return_status; | |
2749 | ||
6b4d96b8 | 2750 | c = cmd_special_alloc(h); |
5390cfc3 | 2751 | if (!c) |
2752 | return -ENOMEM; | |
f70dba83 | 2753 | return_status = fill_cmd(h, c, cmd, buff, size, page_code, |
b57695fe | 2754 | scsi3addr, cmd_type); |
5390cfc3 | 2755 | if (return_status == IO_OK) |
789a424a | 2756 | return_status = sendcmd_withirq_core(h, c, 1); |
2757 | ||
6b4d96b8 | 2758 | cmd_special_free(h, c); |
7c832835 | 2759 | return return_status; |
1da177e4 | 2760 | } |
7c832835 | 2761 | |
f70dba83 | 2762 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
7b838bde | 2763 | sector_t total_size, |
7c832835 BH |
2764 | unsigned int block_size, |
2765 | InquiryData_struct *inq_buff, | |
2766 | drive_info_struct *drv) | |
1da177e4 LT |
2767 | { |
2768 | int return_code; | |
00988a35 | 2769 | unsigned long t; |
b57695fe | 2770 | unsigned char scsi3addr[8]; |
00988a35 | 2771 | |
1da177e4 | 2772 | memset(inq_buff, 0, sizeof(InquiryData_struct)); |
f70dba83 SC |
2773 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2774 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, | |
7b838bde | 2775 | sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD); |
1da177e4 | 2776 | if (return_code == IO_OK) { |
7c832835 | 2777 | if (inq_buff->data_byte[8] == 0xFF) { |
b2a4a43d SC |
2778 | dev_warn(&h->pdev->dev, |
2779 | "reading geometry failed, volume " | |
7c832835 | 2780 | "does not support reading geometry\n"); |
1da177e4 | 2781 | drv->heads = 255; |
b028461d | 2782 | drv->sectors = 32; /* Sectors per track */ |
7f42d3b8 | 2783 | drv->cylinders = total_size + 1; |
89f97ad1 | 2784 | drv->raid_level = RAID_UNKNOWN; |
1da177e4 | 2785 | } else { |
1da177e4 LT |
2786 | drv->heads = inq_buff->data_byte[6]; |
2787 | drv->sectors = inq_buff->data_byte[7]; | |
2788 | drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8; | |
2789 | drv->cylinders += inq_buff->data_byte[5]; | |
2790 | drv->raid_level = inq_buff->data_byte[8]; | |
3f7705ea MW |
2791 | } |
2792 | drv->block_size = block_size; | |
97c06978 | 2793 | drv->nr_blocks = total_size + 1; |
3f7705ea MW |
2794 | t = drv->heads * drv->sectors; |
2795 | if (t > 1) { | |
97c06978 MMOD |
2796 | sector_t real_size = total_size + 1; |
2797 | unsigned long rem = sector_div(real_size, t); | |
3f7705ea | 2798 | if (rem) |
97c06978 MMOD |
2799 | real_size++; |
2800 | drv->cylinders = real_size; | |
1da177e4 | 2801 | } |
7c832835 | 2802 | } else { /* Get geometry failed */ |
b2a4a43d | 2803 | dev_warn(&h->pdev->dev, "reading geometry failed\n"); |
1da177e4 | 2804 | } |
1da177e4 | 2805 | } |
7c832835 | 2806 | |
1da177e4 | 2807 | static void |
f70dba83 | 2808 | cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size, |
7c832835 | 2809 | unsigned int *block_size) |
1da177e4 | 2810 | { |
00988a35 | 2811 | ReadCapdata_struct *buf; |
1da177e4 | 2812 | int return_code; |
b57695fe | 2813 | unsigned char scsi3addr[8]; |
1aebe187 MK |
2814 | |
2815 | buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL); | |
2816 | if (!buf) { | |
b2a4a43d | 2817 | dev_warn(&h->pdev->dev, "out of memory\n"); |
00988a35 MMOD |
2818 | return; |
2819 | } | |
1aebe187 | 2820 | |
f70dba83 SC |
2821 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2822 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf, | |
7b838bde | 2823 | sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD); |
1da177e4 | 2824 | if (return_code == IO_OK) { |
4c1f2b31 AV |
2825 | *total_size = be32_to_cpu(*(__be32 *) buf->total_size); |
2826 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); | |
7c832835 | 2827 | } else { /* read capacity command failed */ |
b2a4a43d | 2828 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
1da177e4 LT |
2829 | *total_size = 0; |
2830 | *block_size = BLOCK_SIZE; | |
2831 | } | |
00988a35 | 2832 | kfree(buf); |
00988a35 MMOD |
2833 | } |
2834 | ||
f70dba83 | 2835 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
7b838bde | 2836 | sector_t *total_size, unsigned int *block_size) |
00988a35 MMOD |
2837 | { |
2838 | ReadCapdata_struct_16 *buf; | |
2839 | int return_code; | |
b57695fe | 2840 | unsigned char scsi3addr[8]; |
1aebe187 MK |
2841 | |
2842 | buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL); | |
2843 | if (!buf) { | |
b2a4a43d | 2844 | dev_warn(&h->pdev->dev, "out of memory\n"); |
00988a35 MMOD |
2845 | return; |
2846 | } | |
1aebe187 | 2847 | |
f70dba83 SC |
2848 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2849 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16, | |
2850 | buf, sizeof(ReadCapdata_struct_16), | |
7b838bde | 2851 | 0, scsi3addr, TYPE_CMD); |
00988a35 | 2852 | if (return_code == IO_OK) { |
4c1f2b31 AV |
2853 | *total_size = be64_to_cpu(*(__be64 *) buf->total_size); |
2854 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); | |
00988a35 | 2855 | } else { /* read capacity command failed */ |
b2a4a43d | 2856 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
00988a35 MMOD |
2857 | *total_size = 0; |
2858 | *block_size = BLOCK_SIZE; | |
2859 | } | |
b2a4a43d | 2860 | dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n", |
97c06978 | 2861 | (unsigned long long)*total_size+1, *block_size); |
00988a35 | 2862 | kfree(buf); |
1da177e4 LT |
2863 | } |
2864 | ||
1da177e4 LT |
2865 | static int cciss_revalidate(struct gendisk *disk) |
2866 | { | |
2867 | ctlr_info_t *h = get_host(disk); | |
2868 | drive_info_struct *drv = get_drv(disk); | |
2869 | int logvol; | |
7c832835 | 2870 | int FOUND = 0; |
1da177e4 | 2871 | unsigned int block_size; |
00988a35 | 2872 | sector_t total_size; |
1da177e4 LT |
2873 | InquiryData_struct *inq_buff = NULL; |
2874 | ||
68264e9d | 2875 | for (logvol = 0; logvol <= h->highest_lun; logvol++) { |
0fc13c89 | 2876 | if (!h->drv[logvol]) |
453434cf | 2877 | continue; |
9cef0d2f | 2878 | if (memcmp(h->drv[logvol]->LunID, drv->LunID, |
39ccf9a6 | 2879 | sizeof(drv->LunID)) == 0) { |
7c832835 | 2880 | FOUND = 1; |
1da177e4 LT |
2881 | break; |
2882 | } | |
2883 | } | |
2884 | ||
7c832835 BH |
2885 | if (!FOUND) |
2886 | return 1; | |
1da177e4 | 2887 | |
7c832835 BH |
2888 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); |
2889 | if (inq_buff == NULL) { | |
b2a4a43d | 2890 | dev_warn(&h->pdev->dev, "out of memory\n"); |
7c832835 BH |
2891 | return 1; |
2892 | } | |
00988a35 | 2893 | if (h->cciss_read == CCISS_READ_10) { |
f70dba83 | 2894 | cciss_read_capacity(h, logvol, |
00988a35 MMOD |
2895 | &total_size, &block_size); |
2896 | } else { | |
f70dba83 | 2897 | cciss_read_capacity_16(h, logvol, |
00988a35 MMOD |
2898 | &total_size, &block_size); |
2899 | } | |
f70dba83 | 2900 | cciss_geometry_inquiry(h, logvol, total_size, block_size, |
7c832835 | 2901 | inq_buff, drv); |
1da177e4 | 2902 | |
e1defc4f | 2903 | blk_queue_logical_block_size(drv->queue, drv->block_size); |
1da177e4 LT |
2904 | set_capacity(disk, drv->nr_blocks); |
2905 | ||
1da177e4 LT |
2906 | kfree(inq_buff); |
2907 | return 0; | |
2908 | } | |
2909 | ||
1da177e4 LT |
2910 | /* |
2911 | * Map (physical) PCI mem into (virtual) kernel space | |
2912 | */ | |
2913 | static void __iomem *remap_pci_mem(ulong base, ulong size) | |
2914 | { | |
7c832835 BH |
2915 | ulong page_base = ((ulong) base) & PAGE_MASK; |
2916 | ulong page_offs = ((ulong) base) - page_base; | |
2917 | void __iomem *page_remapped = ioremap(page_base, page_offs + size); | |
1da177e4 | 2918 | |
7c832835 | 2919 | return page_remapped ? (page_remapped + page_offs) : NULL; |
1da177e4 LT |
2920 | } |
2921 | ||
7c832835 BH |
2922 | /* |
2923 | * Takes jobs of the Q and sends them to the hardware, then puts it on | |
2924 | * the Q to wait for completion. | |
2925 | */ | |
2926 | static void start_io(ctlr_info_t *h) | |
1da177e4 LT |
2927 | { |
2928 | CommandList_struct *c; | |
7c832835 | 2929 | |
e6e1ee93 JA |
2930 | while (!list_empty(&h->reqQ)) { |
2931 | c = list_entry(h->reqQ.next, CommandList_struct, list); | |
1da177e4 LT |
2932 | /* can't do anything if fifo is full */ |
2933 | if ((h->access.fifo_full(h))) { | |
b2a4a43d | 2934 | dev_warn(&h->pdev->dev, "fifo full\n"); |
1da177e4 LT |
2935 | break; |
2936 | } | |
2937 | ||
7c832835 | 2938 | /* Get the first entry from the Request Q */ |
8a3173de | 2939 | removeQ(c); |
1da177e4 | 2940 | h->Qdepth--; |
7c832835 BH |
2941 | |
2942 | /* Tell the controller execute command */ | |
1da177e4 | 2943 | h->access.submit_command(h, c); |
7c832835 BH |
2944 | |
2945 | /* Put job onto the completed Q */ | |
8a3173de | 2946 | addQ(&h->cmpQ, c); |
1da177e4 LT |
2947 | } |
2948 | } | |
7c832835 | 2949 | |
f70dba83 | 2950 | /* Assumes that h->lock is held. */ |
1da177e4 LT |
2951 | /* Zeros out the error record and then resends the command back */ |
2952 | /* to the controller */ | |
7c832835 | 2953 | static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c) |
1da177e4 LT |
2954 | { |
2955 | /* erase the old error information */ | |
2956 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); | |
2957 | ||
2958 | /* add it to software queue and then send it to the controller */ | |
8a3173de | 2959 | addQ(&h->reqQ, c); |
1da177e4 | 2960 | h->Qdepth++; |
7c832835 | 2961 | if (h->Qdepth > h->maxQsinceinit) |
1da177e4 LT |
2962 | h->maxQsinceinit = h->Qdepth; |
2963 | ||
2964 | start_io(h); | |
2965 | } | |
a9925a06 | 2966 | |
1a614f50 SC |
2967 | static inline unsigned int make_status_bytes(unsigned int scsi_status_byte, |
2968 | unsigned int msg_byte, unsigned int host_byte, | |
2969 | unsigned int driver_byte) | |
2970 | { | |
2971 | /* inverse of macros in scsi.h */ | |
2972 | return (scsi_status_byte & 0xff) | | |
2973 | ((msg_byte & 0xff) << 8) | | |
2974 | ((host_byte & 0xff) << 16) | | |
2975 | ((driver_byte & 0xff) << 24); | |
2976 | } | |
2977 | ||
0a9279cc MM |
2978 | static inline int evaluate_target_status(ctlr_info_t *h, |
2979 | CommandList_struct *cmd, int *retry_cmd) | |
03bbfee5 MMOD |
2980 | { |
2981 | unsigned char sense_key; | |
1a614f50 SC |
2982 | unsigned char status_byte, msg_byte, host_byte, driver_byte; |
2983 | int error_value; | |
2984 | ||
0a9279cc | 2985 | *retry_cmd = 0; |
1a614f50 SC |
2986 | /* If we get in here, it means we got "target status", that is, scsi status */ |
2987 | status_byte = cmd->err_info->ScsiStatus; | |
2988 | driver_byte = DRIVER_OK; | |
2989 | msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */ | |
2990 | ||
33659ebb | 2991 | if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) |
1a614f50 SC |
2992 | host_byte = DID_PASSTHROUGH; |
2993 | else | |
2994 | host_byte = DID_OK; | |
2995 | ||
2996 | error_value = make_status_bytes(status_byte, msg_byte, | |
2997 | host_byte, driver_byte); | |
03bbfee5 | 2998 | |
1a614f50 | 2999 | if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) { |
33659ebb | 3000 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) |
b2a4a43d | 3001 | dev_warn(&h->pdev->dev, "cmd %p " |
03bbfee5 MMOD |
3002 | "has SCSI Status 0x%x\n", |
3003 | cmd, cmd->err_info->ScsiStatus); | |
1a614f50 | 3004 | return error_value; |
03bbfee5 MMOD |
3005 | } |
3006 | ||
3007 | /* check the sense key */ | |
3008 | sense_key = 0xf & cmd->err_info->SenseInfo[2]; | |
3009 | /* no status or recovered error */ | |
33659ebb CH |
3010 | if (((sense_key == 0x0) || (sense_key == 0x1)) && |
3011 | (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)) | |
1a614f50 | 3012 | error_value = 0; |
03bbfee5 | 3013 | |
0a9279cc | 3014 | if (check_for_unit_attention(h, cmd)) { |
33659ebb | 3015 | *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC); |
0a9279cc MM |
3016 | return 0; |
3017 | } | |
3018 | ||
33659ebb CH |
3019 | /* Not SG_IO or similar? */ |
3020 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) { | |
1a614f50 | 3021 | if (error_value != 0) |
b2a4a43d | 3022 | dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION" |
03bbfee5 | 3023 | " sense key = 0x%x\n", cmd, sense_key); |
1a614f50 | 3024 | return error_value; |
03bbfee5 MMOD |
3025 | } |
3026 | ||
3027 | /* SG_IO or similar, copy sense data back */ | |
3028 | if (cmd->rq->sense) { | |
3029 | if (cmd->rq->sense_len > cmd->err_info->SenseLen) | |
3030 | cmd->rq->sense_len = cmd->err_info->SenseLen; | |
3031 | memcpy(cmd->rq->sense, cmd->err_info->SenseInfo, | |
3032 | cmd->rq->sense_len); | |
3033 | } else | |
3034 | cmd->rq->sense_len = 0; | |
3035 | ||
1a614f50 | 3036 | return error_value; |
03bbfee5 MMOD |
3037 | } |
3038 | ||
7c832835 | 3039 | /* checks the status of the job and calls complete buffers to mark all |
a9925a06 JA |
3040 | * buffers for the completed job. Note that this function does not need |
3041 | * to hold the hba/queue lock. | |
7c832835 BH |
3042 | */ |
3043 | static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd, | |
3044 | int timeout) | |
1da177e4 | 3045 | { |
1da177e4 | 3046 | int retry_cmd = 0; |
198b7660 MMOD |
3047 | struct request *rq = cmd->rq; |
3048 | ||
3049 | rq->errors = 0; | |
7c832835 | 3050 | |
1da177e4 | 3051 | if (timeout) |
1a614f50 | 3052 | rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT); |
1da177e4 | 3053 | |
d38ae168 MMOD |
3054 | if (cmd->err_info->CommandStatus == 0) /* no error has occurred */ |
3055 | goto after_error_processing; | |
7c832835 | 3056 | |
d38ae168 | 3057 | switch (cmd->err_info->CommandStatus) { |
d38ae168 | 3058 | case CMD_TARGET_STATUS: |
0a9279cc | 3059 | rq->errors = evaluate_target_status(h, cmd, &retry_cmd); |
d38ae168 MMOD |
3060 | break; |
3061 | case CMD_DATA_UNDERRUN: | |
33659ebb | 3062 | if (cmd->rq->cmd_type == REQ_TYPE_FS) { |
b2a4a43d | 3063 | dev_warn(&h->pdev->dev, "cmd %p has" |
03bbfee5 MMOD |
3064 | " completed with data underrun " |
3065 | "reported\n", cmd); | |
c3a4d78c | 3066 | cmd->rq->resid_len = cmd->err_info->ResidualCnt; |
03bbfee5 | 3067 | } |
d38ae168 MMOD |
3068 | break; |
3069 | case CMD_DATA_OVERRUN: | |
33659ebb | 3070 | if (cmd->rq->cmd_type == REQ_TYPE_FS) |
b2a4a43d | 3071 | dev_warn(&h->pdev->dev, "cciss: cmd %p has" |
03bbfee5 MMOD |
3072 | " completed with data overrun " |
3073 | "reported\n", cmd); | |
d38ae168 MMOD |
3074 | break; |
3075 | case CMD_INVALID: | |
b2a4a43d | 3076 | dev_warn(&h->pdev->dev, "cciss: cmd %p is " |
d38ae168 | 3077 | "reported invalid\n", cmd); |
1a614f50 SC |
3078 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3079 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3080 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3081 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3082 | break; |
3083 | case CMD_PROTOCOL_ERR: | |
b2a4a43d SC |
3084 | dev_warn(&h->pdev->dev, "cciss: cmd %p has " |
3085 | "protocol error\n", cmd); | |
1a614f50 SC |
3086 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3087 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3088 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3089 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3090 | break; |
3091 | case CMD_HARDWARE_ERR: | |
b2a4a43d | 3092 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
d38ae168 | 3093 | " hardware error\n", cmd); |
1a614f50 SC |
3094 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3095 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3096 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3097 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3098 | break; |
3099 | case CMD_CONNECTION_LOST: | |
b2a4a43d | 3100 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
d38ae168 | 3101 | "connection lost\n", cmd); |
1a614f50 SC |
3102 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3103 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3104 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3105 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3106 | break; |
3107 | case CMD_ABORTED: | |
b2a4a43d | 3108 | dev_warn(&h->pdev->dev, "cciss: cmd %p was " |
d38ae168 | 3109 | "aborted\n", cmd); |
1a614f50 SC |
3110 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3111 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3112 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3113 | DID_PASSTHROUGH : DID_ABORT); | |
d38ae168 MMOD |
3114 | break; |
3115 | case CMD_ABORT_FAILED: | |
b2a4a43d | 3116 | dev_warn(&h->pdev->dev, "cciss: cmd %p reports " |
d38ae168 | 3117 | "abort failed\n", cmd); |
1a614f50 SC |
3118 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3119 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3120 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3121 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3122 | break; |
3123 | case CMD_UNSOLICITED_ABORT: | |
b2a4a43d | 3124 | dev_warn(&h->pdev->dev, "cciss%d: unsolicited " |
d38ae168 MMOD |
3125 | "abort %p\n", h->ctlr, cmd); |
3126 | if (cmd->retry_count < MAX_CMD_RETRIES) { | |
3127 | retry_cmd = 1; | |
b2a4a43d | 3128 | dev_warn(&h->pdev->dev, "retrying %p\n", cmd); |
d38ae168 MMOD |
3129 | cmd->retry_count++; |
3130 | } else | |
b2a4a43d SC |
3131 | dev_warn(&h->pdev->dev, |
3132 | "%p retried too many times\n", cmd); | |
1a614f50 SC |
3133 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3134 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3135 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3136 | DID_PASSTHROUGH : DID_ABORT); | |
d38ae168 MMOD |
3137 | break; |
3138 | case CMD_TIMEOUT: | |
b2a4a43d | 3139 | dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd); |
1a614f50 SC |
3140 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3141 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3142 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3143 | DID_PASSTHROUGH : DID_ERROR); | |
d38ae168 MMOD |
3144 | break; |
3145 | default: | |
b2a4a43d | 3146 | dev_warn(&h->pdev->dev, "cmd %p returned " |
d38ae168 MMOD |
3147 | "unknown status %x\n", cmd, |
3148 | cmd->err_info->CommandStatus); | |
1a614f50 SC |
3149 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3150 | cmd->err_info->CommandStatus, DRIVER_OK, | |
33659ebb CH |
3151 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3152 | DID_PASSTHROUGH : DID_ERROR); | |
1da177e4 | 3153 | } |
d38ae168 MMOD |
3154 | |
3155 | after_error_processing: | |
3156 | ||
1da177e4 | 3157 | /* We need to return this command */ |
7c832835 BH |
3158 | if (retry_cmd) { |
3159 | resend_cciss_cmd(h, cmd); | |
1da177e4 | 3160 | return; |
7c832835 | 3161 | } |
03bbfee5 | 3162 | cmd->rq->completion_data = cmd; |
a9925a06 | 3163 | blk_complete_request(cmd->rq); |
1da177e4 LT |
3164 | } |
3165 | ||
0c2b3908 MM |
3166 | static inline u32 cciss_tag_contains_index(u32 tag) |
3167 | { | |
5e216153 | 3168 | #define DIRECT_LOOKUP_BIT 0x10 |
0c2b3908 MM |
3169 | return tag & DIRECT_LOOKUP_BIT; |
3170 | } | |
3171 | ||
3172 | static inline u32 cciss_tag_to_index(u32 tag) | |
3173 | { | |
5e216153 | 3174 | #define DIRECT_LOOKUP_SHIFT 5 |
0c2b3908 MM |
3175 | return tag >> DIRECT_LOOKUP_SHIFT; |
3176 | } | |
3177 | ||
3178 | static inline u32 cciss_tag_discard_error_bits(u32 tag) | |
3179 | { | |
3180 | #define CCISS_ERROR_BITS 0x03 | |
3181 | return tag & ~CCISS_ERROR_BITS; | |
3182 | } | |
3183 | ||
3184 | static inline void cciss_mark_tag_indexed(u32 *tag) | |
3185 | { | |
3186 | *tag |= DIRECT_LOOKUP_BIT; | |
3187 | } | |
3188 | ||
3189 | static inline void cciss_set_tag_index(u32 *tag, u32 index) | |
3190 | { | |
3191 | *tag |= (index << DIRECT_LOOKUP_SHIFT); | |
3192 | } | |
3193 | ||
7c832835 BH |
3194 | /* |
3195 | * Get a request and submit it to the controller. | |
1da177e4 | 3196 | */ |
165125e1 | 3197 | static void do_cciss_request(struct request_queue *q) |
1da177e4 | 3198 | { |
7c832835 | 3199 | ctlr_info_t *h = q->queuedata; |
1da177e4 | 3200 | CommandList_struct *c; |
00988a35 MMOD |
3201 | sector_t start_blk; |
3202 | int seg; | |
1da177e4 LT |
3203 | struct request *creq; |
3204 | u64bit temp64; | |
5c07a311 DB |
3205 | struct scatterlist *tmp_sg; |
3206 | SGDescriptor_struct *curr_sg; | |
1da177e4 LT |
3207 | drive_info_struct *drv; |
3208 | int i, dir; | |
5c07a311 DB |
3209 | int sg_index = 0; |
3210 | int chained = 0; | |
1da177e4 | 3211 | |
7c832835 | 3212 | queue: |
9934c8c0 | 3213 | creq = blk_peek_request(q); |
1da177e4 LT |
3214 | if (!creq) |
3215 | goto startio; | |
3216 | ||
5c07a311 | 3217 | BUG_ON(creq->nr_phys_segments > h->maxsgentries); |
1da177e4 | 3218 | |
6b4d96b8 SC |
3219 | c = cmd_alloc(h); |
3220 | if (!c) | |
1da177e4 LT |
3221 | goto full; |
3222 | ||
9934c8c0 | 3223 | blk_start_request(creq); |
1da177e4 | 3224 | |
5c07a311 | 3225 | tmp_sg = h->scatter_list[c->cmdindex]; |
1da177e4 LT |
3226 | spin_unlock_irq(q->queue_lock); |
3227 | ||
3228 | c->cmd_type = CMD_RWREQ; | |
3229 | c->rq = creq; | |
7c832835 BH |
3230 | |
3231 | /* fill in the request */ | |
1da177e4 | 3232 | drv = creq->rq_disk->private_data; |
b028461d | 3233 | c->Header.ReplyQueue = 0; /* unused in simple mode */ |
33079b21 MM |
3234 | /* got command from pool, so use the command block index instead */ |
3235 | /* for direct lookups. */ | |
3236 | /* The first 2 bits are reserved for controller error reporting. */ | |
0c2b3908 MM |
3237 | cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex); |
3238 | cciss_mark_tag_indexed(&c->Header.Tag.lower); | |
39ccf9a6 | 3239 | memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID)); |
b028461d | 3240 | c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */ |
3241 | c->Request.Type.Type = TYPE_CMD; /* It is a command. */ | |
7c832835 BH |
3242 | c->Request.Type.Attribute = ATTR_SIMPLE; |
3243 | c->Request.Type.Direction = | |
a52de245 | 3244 | (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE; |
b028461d | 3245 | c->Request.Timeout = 0; /* Don't time out */ |
7c832835 | 3246 | c->Request.CDB[0] = |
00988a35 | 3247 | (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write; |
83096ebf | 3248 | start_blk = blk_rq_pos(creq); |
b2a4a43d | 3249 | dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n", |
83096ebf | 3250 | (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq)); |
5c07a311 | 3251 | sg_init_table(tmp_sg, h->maxsgentries); |
1da177e4 LT |
3252 | seg = blk_rq_map_sg(q, creq, tmp_sg); |
3253 | ||
7c832835 | 3254 | /* get the DMA records for the setup */ |
1da177e4 LT |
3255 | if (c->Request.Type.Direction == XFER_READ) |
3256 | dir = PCI_DMA_FROMDEVICE; | |
3257 | else | |
3258 | dir = PCI_DMA_TODEVICE; | |
3259 | ||
5c07a311 DB |
3260 | curr_sg = c->SG; |
3261 | sg_index = 0; | |
3262 | chained = 0; | |
3263 | ||
7c832835 | 3264 | for (i = 0; i < seg; i++) { |
5c07a311 DB |
3265 | if (((sg_index+1) == (h->max_cmd_sgentries)) && |
3266 | !chained && ((seg - i) > 1)) { | |
5c07a311 | 3267 | /* Point to next chain block. */ |
dccc9b56 | 3268 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
5c07a311 DB |
3269 | sg_index = 0; |
3270 | chained = 1; | |
3271 | } | |
3272 | curr_sg[sg_index].Len = tmp_sg[i].length; | |
45711f1a | 3273 | temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]), |
5c07a311 DB |
3274 | tmp_sg[i].offset, |
3275 | tmp_sg[i].length, dir); | |
3276 | curr_sg[sg_index].Addr.lower = temp64.val32.lower; | |
3277 | curr_sg[sg_index].Addr.upper = temp64.val32.upper; | |
3278 | curr_sg[sg_index].Ext = 0; /* we are not chaining */ | |
5c07a311 | 3279 | ++sg_index; |
1da177e4 | 3280 | } |
d45033ef SC |
3281 | if (chained) |
3282 | cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex], | |
3283 | (seg - (h->max_cmd_sgentries - 1)) * | |
3284 | sizeof(SGDescriptor_struct)); | |
5c07a311 | 3285 | |
7c832835 BH |
3286 | /* track how many SG entries we are using */ |
3287 | if (seg > h->maxSG) | |
3288 | h->maxSG = seg; | |
1da177e4 | 3289 | |
b2a4a43d | 3290 | dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments " |
5c07a311 DB |
3291 | "chained[%d]\n", |
3292 | blk_rq_sectors(creq), seg, chained); | |
1da177e4 | 3293 | |
5e216153 MM |
3294 | c->Header.SGTotal = seg + chained; |
3295 | if (seg <= h->max_cmd_sgentries) | |
3296 | c->Header.SGList = c->Header.SGTotal; | |
3297 | else | |
5c07a311 | 3298 | c->Header.SGList = h->max_cmd_sgentries; |
5e216153 | 3299 | set_performant_mode(h, c); |
5c07a311 | 3300 | |
33659ebb | 3301 | if (likely(creq->cmd_type == REQ_TYPE_FS)) { |
03bbfee5 MMOD |
3302 | if(h->cciss_read == CCISS_READ_10) { |
3303 | c->Request.CDB[1] = 0; | |
b028461d | 3304 | c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */ |
03bbfee5 MMOD |
3305 | c->Request.CDB[3] = (start_blk >> 16) & 0xff; |
3306 | c->Request.CDB[4] = (start_blk >> 8) & 0xff; | |
3307 | c->Request.CDB[5] = start_blk & 0xff; | |
b028461d | 3308 | c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */ |
83096ebf TH |
3309 | c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff; |
3310 | c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff; | |
03bbfee5 MMOD |
3311 | c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0; |
3312 | } else { | |
582539e5 RD |
3313 | u32 upper32 = upper_32_bits(start_blk); |
3314 | ||
03bbfee5 MMOD |
3315 | c->Request.CDBLen = 16; |
3316 | c->Request.CDB[1]= 0; | |
b028461d | 3317 | c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */ |
582539e5 RD |
3318 | c->Request.CDB[3]= (upper32 >> 16) & 0xff; |
3319 | c->Request.CDB[4]= (upper32 >> 8) & 0xff; | |
3320 | c->Request.CDB[5]= upper32 & 0xff; | |
03bbfee5 MMOD |
3321 | c->Request.CDB[6]= (start_blk >> 24) & 0xff; |
3322 | c->Request.CDB[7]= (start_blk >> 16) & 0xff; | |
3323 | c->Request.CDB[8]= (start_blk >> 8) & 0xff; | |
3324 | c->Request.CDB[9]= start_blk & 0xff; | |
83096ebf TH |
3325 | c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff; |
3326 | c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff; | |
3327 | c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff; | |
3328 | c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff; | |
03bbfee5 MMOD |
3329 | c->Request.CDB[14] = c->Request.CDB[15] = 0; |
3330 | } | |
33659ebb | 3331 | } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) { |
03bbfee5 MMOD |
3332 | c->Request.CDBLen = creq->cmd_len; |
3333 | memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB); | |
00988a35 | 3334 | } else { |
b2a4a43d SC |
3335 | dev_warn(&h->pdev->dev, "bad request type %d\n", |
3336 | creq->cmd_type); | |
03bbfee5 | 3337 | BUG(); |
00988a35 | 3338 | } |
1da177e4 LT |
3339 | |
3340 | spin_lock_irq(q->queue_lock); | |
3341 | ||
8a3173de | 3342 | addQ(&h->reqQ, c); |
1da177e4 | 3343 | h->Qdepth++; |
7c832835 BH |
3344 | if (h->Qdepth > h->maxQsinceinit) |
3345 | h->maxQsinceinit = h->Qdepth; | |
1da177e4 LT |
3346 | |
3347 | goto queue; | |
00988a35 | 3348 | full: |
1da177e4 | 3349 | blk_stop_queue(q); |
00988a35 | 3350 | startio: |
1da177e4 LT |
3351 | /* We will already have the driver lock here so not need |
3352 | * to lock it. | |
7c832835 | 3353 | */ |
1da177e4 LT |
3354 | start_io(h); |
3355 | } | |
3356 | ||
3da8b713 | 3357 | static inline unsigned long get_next_completion(ctlr_info_t *h) |
3358 | { | |
3da8b713 | 3359 | return h->access.command_completed(h); |
3da8b713 | 3360 | } |
3361 | ||
3362 | static inline int interrupt_pending(ctlr_info_t *h) | |
3363 | { | |
3da8b713 | 3364 | return h->access.intr_pending(h); |
3da8b713 | 3365 | } |
3366 | ||
3367 | static inline long interrupt_not_for_us(ctlr_info_t *h) | |
3368 | { | |
81125860 | 3369 | return ((h->access.intr_pending(h) == 0) || |
2cf3af1c | 3370 | (h->interrupts_enabled == 0)); |
3da8b713 | 3371 | } |
3372 | ||
0c2b3908 MM |
3373 | static inline int bad_tag(ctlr_info_t *h, u32 tag_index, |
3374 | u32 raw_tag) | |
1da177e4 | 3375 | { |
0c2b3908 MM |
3376 | if (unlikely(tag_index >= h->nr_cmds)) { |
3377 | dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); | |
3378 | return 1; | |
3379 | } | |
3380 | return 0; | |
3381 | } | |
3382 | ||
3383 | static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c, | |
3384 | u32 raw_tag) | |
3385 | { | |
3386 | removeQ(c); | |
3387 | if (likely(c->cmd_type == CMD_RWREQ)) | |
3388 | complete_command(h, c, 0); | |
3389 | else if (c->cmd_type == CMD_IOCTL_PEND) | |
3390 | complete(c->waiting); | |
3391 | #ifdef CONFIG_CISS_SCSI_TAPE | |
3392 | else if (c->cmd_type == CMD_SCSI) | |
3393 | complete_scsi_command(c, 0, raw_tag); | |
3394 | #endif | |
3395 | } | |
3396 | ||
29979a71 MM |
3397 | static inline u32 next_command(ctlr_info_t *h) |
3398 | { | |
3399 | u32 a; | |
3400 | ||
3401 | if (unlikely(h->transMethod != CFGTBL_Trans_Performant)) | |
3402 | return h->access.command_completed(h); | |
3403 | ||
3404 | if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { | |
3405 | a = *(h->reply_pool_head); /* Next cmd in ring buffer */ | |
3406 | (h->reply_pool_head)++; | |
3407 | h->commands_outstanding--; | |
3408 | } else { | |
3409 | a = FIFO_EMPTY; | |
3410 | } | |
3411 | /* Check for wraparound */ | |
3412 | if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { | |
3413 | h->reply_pool_head = h->reply_pool; | |
3414 | h->reply_pool_wraparound ^= 1; | |
3415 | } | |
3416 | return a; | |
3417 | } | |
3418 | ||
0c2b3908 MM |
3419 | /* process completion of an indexed ("direct lookup") command */ |
3420 | static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag) | |
3421 | { | |
3422 | u32 tag_index; | |
1da177e4 | 3423 | CommandList_struct *c; |
0c2b3908 MM |
3424 | |
3425 | tag_index = cciss_tag_to_index(raw_tag); | |
3426 | if (bad_tag(h, tag_index, raw_tag)) | |
5e216153 | 3427 | return next_command(h); |
0c2b3908 MM |
3428 | c = h->cmd_pool + tag_index; |
3429 | finish_cmd(h, c, raw_tag); | |
5e216153 | 3430 | return next_command(h); |
0c2b3908 MM |
3431 | } |
3432 | ||
3433 | /* process completion of a non-indexed command */ | |
3434 | static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag) | |
3435 | { | |
0c2b3908 | 3436 | CommandList_struct *c = NULL; |
0c2b3908 MM |
3437 | __u32 busaddr_masked, tag_masked; |
3438 | ||
4a765046 | 3439 | tag_masked = cciss_tag_discard_error_bits(raw_tag); |
e6e1ee93 | 3440 | list_for_each_entry(c, &h->cmpQ, list) { |
0c2b3908 | 3441 | busaddr_masked = cciss_tag_discard_error_bits(c->busaddr); |
0c2b3908 MM |
3442 | if (busaddr_masked == tag_masked) { |
3443 | finish_cmd(h, c, raw_tag); | |
5e216153 | 3444 | return next_command(h); |
0c2b3908 MM |
3445 | } |
3446 | } | |
3447 | bad_tag(h, h->nr_cmds + 1, raw_tag); | |
5e216153 | 3448 | return next_command(h); |
0c2b3908 MM |
3449 | } |
3450 | ||
3451 | static irqreturn_t do_cciss_intx(int irq, void *dev_id) | |
3452 | { | |
3453 | ctlr_info_t *h = dev_id; | |
1da177e4 | 3454 | unsigned long flags; |
0c2b3908 | 3455 | u32 raw_tag; |
1da177e4 | 3456 | |
3da8b713 | 3457 | if (interrupt_not_for_us(h)) |
1da177e4 | 3458 | return IRQ_NONE; |
f70dba83 | 3459 | spin_lock_irqsave(&h->lock, flags); |
3da8b713 | 3460 | while (interrupt_pending(h)) { |
0c2b3908 MM |
3461 | raw_tag = get_next_completion(h); |
3462 | while (raw_tag != FIFO_EMPTY) { | |
3463 | if (cciss_tag_contains_index(raw_tag)) | |
3464 | raw_tag = process_indexed_cmd(h, raw_tag); | |
3465 | else | |
3466 | raw_tag = process_nonindexed_cmd(h, raw_tag); | |
1da177e4 LT |
3467 | } |
3468 | } | |
f70dba83 | 3469 | spin_unlock_irqrestore(&h->lock, flags); |
0c2b3908 MM |
3470 | return IRQ_HANDLED; |
3471 | } | |
1da177e4 | 3472 | |
0c2b3908 MM |
3473 | /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never |
3474 | * check the interrupt pending register because it is not set. | |
3475 | */ | |
3476 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id) | |
3477 | { | |
3478 | ctlr_info_t *h = dev_id; | |
3479 | unsigned long flags; | |
3480 | u32 raw_tag; | |
8a3173de | 3481 | |
f70dba83 | 3482 | spin_lock_irqsave(&h->lock, flags); |
0c2b3908 MM |
3483 | raw_tag = get_next_completion(h); |
3484 | while (raw_tag != FIFO_EMPTY) { | |
3485 | if (cciss_tag_contains_index(raw_tag)) | |
3486 | raw_tag = process_indexed_cmd(h, raw_tag); | |
3487 | else | |
3488 | raw_tag = process_nonindexed_cmd(h, raw_tag); | |
1da177e4 | 3489 | } |
f70dba83 | 3490 | spin_unlock_irqrestore(&h->lock, flags); |
1da177e4 LT |
3491 | return IRQ_HANDLED; |
3492 | } | |
7c832835 | 3493 | |
b368c9dd AP |
3494 | /** |
3495 | * add_to_scan_list() - add controller to rescan queue | |
3496 | * @h: Pointer to the controller. | |
3497 | * | |
3498 | * Adds the controller to the rescan queue if not already on the queue. | |
3499 | * | |
3500 | * returns 1 if added to the queue, 0 if skipped (could be on the | |
3501 | * queue already, or the controller could be initializing or shutting | |
3502 | * down). | |
3503 | **/ | |
3504 | static int add_to_scan_list(struct ctlr_info *h) | |
3505 | { | |
3506 | struct ctlr_info *test_h; | |
3507 | int found = 0; | |
3508 | int ret = 0; | |
3509 | ||
3510 | if (h->busy_initializing) | |
3511 | return 0; | |
3512 | ||
3513 | if (!mutex_trylock(&h->busy_shutting_down)) | |
3514 | return 0; | |
3515 | ||
3516 | mutex_lock(&scan_mutex); | |
3517 | list_for_each_entry(test_h, &scan_q, scan_list) { | |
3518 | if (test_h == h) { | |
3519 | found = 1; | |
3520 | break; | |
3521 | } | |
3522 | } | |
3523 | if (!found && !h->busy_scanning) { | |
3524 | INIT_COMPLETION(h->scan_wait); | |
3525 | list_add_tail(&h->scan_list, &scan_q); | |
3526 | ret = 1; | |
3527 | } | |
3528 | mutex_unlock(&scan_mutex); | |
3529 | mutex_unlock(&h->busy_shutting_down); | |
3530 | ||
3531 | return ret; | |
3532 | } | |
3533 | ||
3534 | /** | |
3535 | * remove_from_scan_list() - remove controller from rescan queue | |
3536 | * @h: Pointer to the controller. | |
3537 | * | |
3538 | * Removes the controller from the rescan queue if present. Blocks if | |
fd8489cf SC |
3539 | * the controller is currently conducting a rescan. The controller |
3540 | * can be in one of three states: | |
3541 | * 1. Doesn't need a scan | |
3542 | * 2. On the scan list, but not scanning yet (we remove it) | |
3543 | * 3. Busy scanning (and not on the list). In this case we want to wait for | |
3544 | * the scan to complete to make sure the scanning thread for this | |
3545 | * controller is completely idle. | |
b368c9dd AP |
3546 | **/ |
3547 | static void remove_from_scan_list(struct ctlr_info *h) | |
3548 | { | |
3549 | struct ctlr_info *test_h, *tmp_h; | |
b368c9dd AP |
3550 | |
3551 | mutex_lock(&scan_mutex); | |
3552 | list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) { | |
fd8489cf | 3553 | if (test_h == h) { /* state 2. */ |
b368c9dd AP |
3554 | list_del(&h->scan_list); |
3555 | complete_all(&h->scan_wait); | |
3556 | mutex_unlock(&scan_mutex); | |
3557 | return; | |
3558 | } | |
3559 | } | |
fd8489cf SC |
3560 | if (h->busy_scanning) { /* state 3. */ |
3561 | mutex_unlock(&scan_mutex); | |
b368c9dd | 3562 | wait_for_completion(&h->scan_wait); |
fd8489cf SC |
3563 | } else { /* state 1, nothing to do. */ |
3564 | mutex_unlock(&scan_mutex); | |
3565 | } | |
b368c9dd AP |
3566 | } |
3567 | ||
3568 | /** | |
3569 | * scan_thread() - kernel thread used to rescan controllers | |
3570 | * @data: Ignored. | |
3571 | * | |
3572 | * A kernel thread used scan for drive topology changes on | |
3573 | * controllers. The thread processes only one controller at a time | |
3574 | * using a queue. Controllers are added to the queue using | |
3575 | * add_to_scan_list() and removed from the queue either after done | |
3576 | * processing or using remove_from_scan_list(). | |
3577 | * | |
3578 | * returns 0. | |
3579 | **/ | |
0a9279cc MM |
3580 | static int scan_thread(void *data) |
3581 | { | |
b368c9dd | 3582 | struct ctlr_info *h; |
0a9279cc | 3583 | |
b368c9dd AP |
3584 | while (1) { |
3585 | set_current_state(TASK_INTERRUPTIBLE); | |
3586 | schedule(); | |
0a9279cc MM |
3587 | if (kthread_should_stop()) |
3588 | break; | |
b368c9dd AP |
3589 | |
3590 | while (1) { | |
3591 | mutex_lock(&scan_mutex); | |
3592 | if (list_empty(&scan_q)) { | |
3593 | mutex_unlock(&scan_mutex); | |
3594 | break; | |
3595 | } | |
3596 | ||
3597 | h = list_entry(scan_q.next, | |
3598 | struct ctlr_info, | |
3599 | scan_list); | |
3600 | list_del(&h->scan_list); | |
3601 | h->busy_scanning = 1; | |
3602 | mutex_unlock(&scan_mutex); | |
3603 | ||
d06dfbd2 SC |
3604 | rebuild_lun_table(h, 0, 0); |
3605 | complete_all(&h->scan_wait); | |
3606 | mutex_lock(&scan_mutex); | |
3607 | h->busy_scanning = 0; | |
3608 | mutex_unlock(&scan_mutex); | |
b368c9dd | 3609 | } |
0a9279cc | 3610 | } |
b368c9dd | 3611 | |
0a9279cc MM |
3612 | return 0; |
3613 | } | |
3614 | ||
3615 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c) | |
3616 | { | |
3617 | if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) | |
3618 | return 0; | |
3619 | ||
3620 | switch (c->err_info->SenseInfo[12]) { | |
3621 | case STATE_CHANGED: | |
b2a4a43d SC |
3622 | dev_warn(&h->pdev->dev, "a state change " |
3623 | "detected, command retried\n"); | |
0a9279cc MM |
3624 | return 1; |
3625 | break; | |
3626 | case LUN_FAILED: | |
b2a4a43d SC |
3627 | dev_warn(&h->pdev->dev, "LUN failure " |
3628 | "detected, action required\n"); | |
0a9279cc MM |
3629 | return 1; |
3630 | break; | |
3631 | case REPORT_LUNS_CHANGED: | |
b2a4a43d | 3632 | dev_warn(&h->pdev->dev, "report LUN data changed\n"); |
da002184 SC |
3633 | /* |
3634 | * Here, we could call add_to_scan_list and wake up the scan thread, | |
3635 | * except that it's quite likely that we will get more than one | |
3636 | * REPORT_LUNS_CHANGED condition in quick succession, which means | |
3637 | * that those which occur after the first one will likely happen | |
3638 | * *during* the scan_thread's rescan. And the rescan code is not | |
3639 | * robust enough to restart in the middle, undoing what it has already | |
3640 | * done, and it's not clear that it's even possible to do this, since | |
3641 | * part of what it does is notify the block layer, which starts | |
3642 | * doing it's own i/o to read partition tables and so on, and the | |
3643 | * driver doesn't have visibility to know what might need undoing. | |
3644 | * In any event, if possible, it is horribly complicated to get right | |
3645 | * so we just don't do it for now. | |
3646 | * | |
3647 | * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. | |
3648 | */ | |
0a9279cc MM |
3649 | return 1; |
3650 | break; | |
3651 | case POWER_OR_RESET: | |
b2a4a43d SC |
3652 | dev_warn(&h->pdev->dev, |
3653 | "a power on or device reset detected\n"); | |
0a9279cc MM |
3654 | return 1; |
3655 | break; | |
3656 | case UNIT_ATTENTION_CLEARED: | |
b2a4a43d SC |
3657 | dev_warn(&h->pdev->dev, |
3658 | "unit attention cleared by another initiator\n"); | |
0a9279cc MM |
3659 | return 1; |
3660 | break; | |
3661 | default: | |
b2a4a43d SC |
3662 | dev_warn(&h->pdev->dev, "unknown unit attention detected\n"); |
3663 | return 1; | |
0a9279cc MM |
3664 | } |
3665 | } | |
3666 | ||
7c832835 | 3667 | /* |
d14c4ab5 | 3668 | * We cannot read the structure directly, for portability we must use |
1da177e4 | 3669 | * the io functions. |
7c832835 | 3670 | * This is for debug only. |
1da177e4 | 3671 | */ |
b2a4a43d | 3672 | static void print_cfg_table(ctlr_info_t *h) |
1da177e4 LT |
3673 | { |
3674 | int i; | |
3675 | char temp_name[17]; | |
b2a4a43d | 3676 | CfgTable_struct *tb = h->cfgtable; |
1da177e4 | 3677 | |
b2a4a43d SC |
3678 | dev_dbg(&h->pdev->dev, "Controller Configuration information\n"); |
3679 | dev_dbg(&h->pdev->dev, "------------------------------------\n"); | |
7c832835 | 3680 | for (i = 0; i < 4; i++) |
1da177e4 | 3681 | temp_name[i] = readb(&(tb->Signature[i])); |
7c832835 | 3682 | temp_name[4] = '\0'; |
b2a4a43d SC |
3683 | dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name); |
3684 | dev_dbg(&h->pdev->dev, " Spec Number = %d\n", | |
3685 | readl(&(tb->SpecValence))); | |
3686 | dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n", | |
7c832835 | 3687 | readl(&(tb->TransportSupport))); |
b2a4a43d | 3688 | dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n", |
7c832835 | 3689 | readl(&(tb->TransportActive))); |
b2a4a43d | 3690 | dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n", |
7c832835 | 3691 | readl(&(tb->HostWrite.TransportRequest))); |
b2a4a43d | 3692 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n", |
7c832835 | 3693 | readl(&(tb->HostWrite.CoalIntDelay))); |
b2a4a43d | 3694 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n", |
7c832835 | 3695 | readl(&(tb->HostWrite.CoalIntCount))); |
b2a4a43d | 3696 | dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n", |
7c832835 | 3697 | readl(&(tb->CmdsOutMax))); |
b2a4a43d SC |
3698 | dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n", |
3699 | readl(&(tb->BusTypes))); | |
7c832835 | 3700 | for (i = 0; i < 16; i++) |
1da177e4 LT |
3701 | temp_name[i] = readb(&(tb->ServerName[i])); |
3702 | temp_name[16] = '\0'; | |
b2a4a43d SC |
3703 | dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name); |
3704 | dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n", | |
3705 | readl(&(tb->HeartBeat))); | |
1da177e4 | 3706 | } |
1da177e4 | 3707 | |
7c832835 | 3708 | static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) |
1da177e4 LT |
3709 | { |
3710 | int i, offset, mem_type, bar_type; | |
7c832835 | 3711 | if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ |
1da177e4 LT |
3712 | return 0; |
3713 | offset = 0; | |
7c832835 BH |
3714 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
3715 | bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; | |
1da177e4 LT |
3716 | if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) |
3717 | offset += 4; | |
3718 | else { | |
3719 | mem_type = pci_resource_flags(pdev, i) & | |
7c832835 | 3720 | PCI_BASE_ADDRESS_MEM_TYPE_MASK; |
1da177e4 | 3721 | switch (mem_type) { |
7c832835 BH |
3722 | case PCI_BASE_ADDRESS_MEM_TYPE_32: |
3723 | case PCI_BASE_ADDRESS_MEM_TYPE_1M: | |
3724 | offset += 4; /* 32 bit */ | |
3725 | break; | |
3726 | case PCI_BASE_ADDRESS_MEM_TYPE_64: | |
3727 | offset += 8; | |
3728 | break; | |
3729 | default: /* reserved in PCI 2.2 */ | |
b2a4a43d | 3730 | dev_warn(&pdev->dev, |
7c832835 BH |
3731 | "Base address is invalid\n"); |
3732 | return -1; | |
1da177e4 LT |
3733 | break; |
3734 | } | |
3735 | } | |
7c832835 BH |
3736 | if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) |
3737 | return i + 1; | |
1da177e4 LT |
3738 | } |
3739 | return -1; | |
3740 | } | |
3741 | ||
5e216153 MM |
3742 | /* Fill in bucket_map[], given nsgs (the max number of |
3743 | * scatter gather elements supported) and bucket[], | |
3744 | * which is an array of 8 integers. The bucket[] array | |
3745 | * contains 8 different DMA transfer sizes (in 16 | |
3746 | * byte increments) which the controller uses to fetch | |
3747 | * commands. This function fills in bucket_map[], which | |
3748 | * maps a given number of scatter gather elements to one of | |
3749 | * the 8 DMA transfer sizes. The point of it is to allow the | |
3750 | * controller to only do as much DMA as needed to fetch the | |
3751 | * command, with the DMA transfer size encoded in the lower | |
3752 | * bits of the command address. | |
3753 | */ | |
3754 | static void calc_bucket_map(int bucket[], int num_buckets, | |
3755 | int nsgs, int *bucket_map) | |
3756 | { | |
3757 | int i, j, b, size; | |
3758 | ||
3759 | /* even a command with 0 SGs requires 4 blocks */ | |
3760 | #define MINIMUM_TRANSFER_BLOCKS 4 | |
3761 | #define NUM_BUCKETS 8 | |
3762 | /* Note, bucket_map must have nsgs+1 entries. */ | |
3763 | for (i = 0; i <= nsgs; i++) { | |
3764 | /* Compute size of a command with i SG entries */ | |
3765 | size = i + MINIMUM_TRANSFER_BLOCKS; | |
3766 | b = num_buckets; /* Assume the biggest bucket */ | |
3767 | /* Find the bucket that is just big enough */ | |
3768 | for (j = 0; j < 8; j++) { | |
3769 | if (bucket[j] >= size) { | |
3770 | b = j; | |
3771 | break; | |
3772 | } | |
3773 | } | |
3774 | /* for a command with i SG entries, use bucket b. */ | |
3775 | bucket_map[i] = b; | |
3776 | } | |
3777 | } | |
3778 | ||
0f8a6a1e SC |
3779 | static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h) |
3780 | { | |
3781 | int i; | |
3782 | ||
3783 | /* under certain very rare conditions, this can take awhile. | |
3784 | * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right | |
3785 | * as we enter this code.) */ | |
3786 | for (i = 0; i < MAX_CONFIG_WAIT; i++) { | |
3787 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | |
3788 | break; | |
332c2f80 | 3789 | usleep_range(10000, 20000); |
0f8a6a1e SC |
3790 | } |
3791 | } | |
3792 | ||
b9933135 SC |
3793 | static __devinit void cciss_enter_performant_mode(ctlr_info_t *h) |
3794 | { | |
3795 | /* This is a bit complicated. There are 8 registers on | |
3796 | * the controller which we write to to tell it 8 different | |
3797 | * sizes of commands which there may be. It's a way of | |
3798 | * reducing the DMA done to fetch each command. Encoded into | |
3799 | * each command's tag are 3 bits which communicate to the controller | |
3800 | * which of the eight sizes that command fits within. The size of | |
3801 | * each command depends on how many scatter gather entries there are. | |
3802 | * Each SG entry requires 16 bytes. The eight registers are programmed | |
3803 | * with the number of 16-byte blocks a command of that size requires. | |
3804 | * The smallest command possible requires 5 such 16 byte blocks. | |
3805 | * the largest command possible requires MAXSGENTRIES + 4 16-byte | |
3806 | * blocks. Note, this only extends to the SG entries contained | |
3807 | * within the command block, and does not extend to chained blocks | |
3808 | * of SG elements. bft[] contains the eight values we write to | |
3809 | * the registers. They are not evenly distributed, but have more | |
3810 | * sizes for small commands, and fewer sizes for larger commands. | |
3811 | */ | |
5e216153 | 3812 | __u32 trans_offset; |
b9933135 | 3813 | int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4}; |
5e216153 MM |
3814 | /* |
3815 | * 5 = 1 s/g entry or 4k | |
3816 | * 6 = 2 s/g entry or 8k | |
3817 | * 8 = 4 s/g entry or 16k | |
3818 | * 10 = 6 s/g entry or 24k | |
3819 | */ | |
5e216153 | 3820 | unsigned long register_value; |
5e216153 MM |
3821 | BUILD_BUG_ON(28 > MAXSGENTRIES + 4); |
3822 | ||
5e216153 MM |
3823 | h->reply_pool_wraparound = 1; /* spec: init to 1 */ |
3824 | ||
3825 | /* Controller spec: zero out this buffer. */ | |
3826 | memset(h->reply_pool, 0, h->max_commands * sizeof(__u64)); | |
3827 | h->reply_pool_head = h->reply_pool; | |
3828 | ||
3829 | trans_offset = readl(&(h->cfgtable->TransMethodOffset)); | |
3830 | calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries, | |
3831 | h->blockFetchTable); | |
3832 | writel(bft[0], &h->transtable->BlockFetch0); | |
3833 | writel(bft[1], &h->transtable->BlockFetch1); | |
3834 | writel(bft[2], &h->transtable->BlockFetch2); | |
3835 | writel(bft[3], &h->transtable->BlockFetch3); | |
3836 | writel(bft[4], &h->transtable->BlockFetch4); | |
3837 | writel(bft[5], &h->transtable->BlockFetch5); | |
3838 | writel(bft[6], &h->transtable->BlockFetch6); | |
3839 | writel(bft[7], &h->transtable->BlockFetch7); | |
3840 | ||
3841 | /* size of controller ring buffer */ | |
3842 | writel(h->max_commands, &h->transtable->RepQSize); | |
3843 | writel(1, &h->transtable->RepQCount); | |
3844 | writel(0, &h->transtable->RepQCtrAddrLow32); | |
3845 | writel(0, &h->transtable->RepQCtrAddrHigh32); | |
3846 | writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); | |
3847 | writel(0, &h->transtable->RepQAddr0High32); | |
3848 | writel(CFGTBL_Trans_Performant, | |
3849 | &(h->cfgtable->HostWrite.TransportRequest)); | |
3850 | ||
5e216153 | 3851 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); |
0f8a6a1e | 3852 | cciss_wait_for_mode_change_ack(h); |
5e216153 | 3853 | register_value = readl(&(h->cfgtable->TransportActive)); |
b9933135 | 3854 | if (!(register_value & CFGTBL_Trans_Performant)) |
b2a4a43d | 3855 | dev_warn(&h->pdev->dev, "cciss: unable to get board into" |
5e216153 | 3856 | " performant mode\n"); |
b9933135 SC |
3857 | } |
3858 | ||
3859 | static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h) | |
3860 | { | |
3861 | __u32 trans_support; | |
3862 | ||
3863 | dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n"); | |
3864 | /* Attempt to put controller into performant mode if supported */ | |
3865 | /* Does board support performant mode? */ | |
3866 | trans_support = readl(&(h->cfgtable->TransportSupport)); | |
3867 | if (!(trans_support & PERFORMANT_MODE)) | |
3868 | return; | |
3869 | ||
b2a4a43d | 3870 | dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n"); |
b9933135 SC |
3871 | /* Performant mode demands commands on a 32 byte boundary |
3872 | * pci_alloc_consistent aligns on page boundarys already. | |
3873 | * Just need to check if divisible by 32 | |
3874 | */ | |
3875 | if ((sizeof(CommandList_struct) % 32) != 0) { | |
b2a4a43d | 3876 | dev_warn(&h->pdev->dev, "%s %d %s\n", |
b9933135 SC |
3877 | "cciss info: command size[", |
3878 | (int)sizeof(CommandList_struct), | |
3879 | "] not divisible by 32, no performant mode..\n"); | |
5e216153 MM |
3880 | return; |
3881 | } | |
3882 | ||
b9933135 SC |
3883 | /* Performant mode ring buffer and supporting data structures */ |
3884 | h->reply_pool = (__u64 *)pci_alloc_consistent( | |
3885 | h->pdev, h->max_commands * sizeof(__u64), | |
3886 | &(h->reply_pool_dhandle)); | |
3887 | ||
3888 | /* Need a block fetch table for performant mode */ | |
3889 | h->blockFetchTable = kmalloc(((h->maxsgentries+1) * | |
3890 | sizeof(__u32)), GFP_KERNEL); | |
3891 | ||
3892 | if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL)) | |
3893 | goto clean_up; | |
3894 | ||
3895 | cciss_enter_performant_mode(h); | |
3896 | ||
5e216153 MM |
3897 | /* Change the access methods to the performant access methods */ |
3898 | h->access = SA5_performant_access; | |
b9933135 | 3899 | h->transMethod = CFGTBL_Trans_Performant; |
5e216153 MM |
3900 | |
3901 | return; | |
3902 | clean_up: | |
3903 | kfree(h->blockFetchTable); | |
3904 | if (h->reply_pool) | |
3905 | pci_free_consistent(h->pdev, | |
3906 | h->max_commands * sizeof(__u64), | |
3907 | h->reply_pool, | |
3908 | h->reply_pool_dhandle); | |
3909 | return; | |
3910 | ||
3911 | } /* cciss_put_controller_into_performant_mode */ | |
3912 | ||
fb86a35b MM |
3913 | /* If MSI/MSI-X is supported by the kernel we will try to enable it on |
3914 | * controllers that are capable. If not, we use IO-APIC mode. | |
3915 | */ | |
3916 | ||
f70dba83 | 3917 | static void __devinit cciss_interrupt_mode(ctlr_info_t *h) |
fb86a35b MM |
3918 | { |
3919 | #ifdef CONFIG_PCI_MSI | |
7c832835 BH |
3920 | int err; |
3921 | struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1}, | |
3922 | {0, 2}, {0, 3} | |
3923 | }; | |
fb86a35b MM |
3924 | |
3925 | /* Some boards advertise MSI but don't really support it */ | |
f70dba83 SC |
3926 | if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || |
3927 | (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) | |
fb86a35b MM |
3928 | goto default_int_mode; |
3929 | ||
f70dba83 SC |
3930 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { |
3931 | err = pci_enable_msix(h->pdev, cciss_msix_entries, 4); | |
7c832835 | 3932 | if (!err) { |
f70dba83 SC |
3933 | h->intr[0] = cciss_msix_entries[0].vector; |
3934 | h->intr[1] = cciss_msix_entries[1].vector; | |
3935 | h->intr[2] = cciss_msix_entries[2].vector; | |
3936 | h->intr[3] = cciss_msix_entries[3].vector; | |
3937 | h->msix_vector = 1; | |
7c832835 BH |
3938 | return; |
3939 | } | |
3940 | if (err > 0) { | |
b2a4a43d SC |
3941 | dev_warn(&h->pdev->dev, |
3942 | "only %d MSI-X vectors available\n", err); | |
1ecb9c0f | 3943 | goto default_int_mode; |
7c832835 | 3944 | } else { |
b2a4a43d SC |
3945 | dev_warn(&h->pdev->dev, |
3946 | "MSI-X init failed %d\n", err); | |
1ecb9c0f | 3947 | goto default_int_mode; |
7c832835 BH |
3948 | } |
3949 | } | |
f70dba83 SC |
3950 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { |
3951 | if (!pci_enable_msi(h->pdev)) | |
3952 | h->msi_vector = 1; | |
3953 | else | |
b2a4a43d | 3954 | dev_warn(&h->pdev->dev, "MSI init failed\n"); |
7c832835 | 3955 | } |
1ecb9c0f | 3956 | default_int_mode: |
7c832835 | 3957 | #endif /* CONFIG_PCI_MSI */ |
fb86a35b | 3958 | /* if we get here we're going to use the default interrupt mode */ |
f70dba83 | 3959 | h->intr[PERF_MODE_INT] = h->pdev->irq; |
fb86a35b MM |
3960 | return; |
3961 | } | |
3962 | ||
6539fa9b | 3963 | static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id) |
1da177e4 | 3964 | { |
6539fa9b SC |
3965 | int i; |
3966 | u32 subsystem_vendor_id, subsystem_device_id; | |
2ec24ff1 SC |
3967 | |
3968 | subsystem_vendor_id = pdev->subsystem_vendor; | |
3969 | subsystem_device_id = pdev->subsystem_device; | |
6539fa9b SC |
3970 | *board_id = ((subsystem_device_id << 16) & 0xffff0000) | |
3971 | subsystem_vendor_id; | |
2ec24ff1 | 3972 | |
4205df34 | 3973 | for (i = 0; i < ARRAY_SIZE(products); i++) |
6539fa9b SC |
3974 | if (*board_id == products[i].board_id) |
3975 | return i; | |
6539fa9b SC |
3976 | dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n", |
3977 | *board_id); | |
3978 | return -ENODEV; | |
3979 | } | |
1da177e4 | 3980 | |
dd9c426e SC |
3981 | static inline bool cciss_board_disabled(ctlr_info_t *h) |
3982 | { | |
3983 | u16 command; | |
1da177e4 | 3984 | |
dd9c426e SC |
3985 | (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command); |
3986 | return ((command & PCI_COMMAND_MEMORY) == 0); | |
3987 | } | |
1da177e4 | 3988 | |
d474830d SC |
3989 | static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, |
3990 | unsigned long *memory_bar) | |
3991 | { | |
3992 | int i; | |
4e570309 | 3993 | |
d474830d SC |
3994 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) |
3995 | if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { | |
3996 | /* addressing mode bits already removed */ | |
3997 | *memory_bar = pci_resource_start(pdev, i); | |
3998 | dev_dbg(&pdev->dev, "memory BAR = %lx\n", | |
3999 | *memory_bar); | |
4000 | return 0; | |
4001 | } | |
4002 | dev_warn(&pdev->dev, "no memory BAR found\n"); | |
4003 | return -ENODEV; | |
4004 | } | |
1da177e4 | 4005 | |
afa842fa SC |
4006 | static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev, |
4007 | void __iomem *vaddr, int wait_for_ready) | |
4008 | #define BOARD_READY 1 | |
4009 | #define BOARD_NOT_READY 0 | |
e99ba136 | 4010 | { |
afa842fa | 4011 | int i, iterations; |
e99ba136 | 4012 | u32 scratchpad; |
1da177e4 | 4013 | |
afa842fa SC |
4014 | if (wait_for_ready) |
4015 | iterations = CCISS_BOARD_READY_ITERATIONS; | |
4016 | else | |
4017 | iterations = CCISS_BOARD_NOT_READY_ITERATIONS; | |
4018 | ||
4019 | for (i = 0; i < iterations; i++) { | |
4020 | scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); | |
4021 | if (wait_for_ready) { | |
4022 | if (scratchpad == CCISS_FIRMWARE_READY) | |
4023 | return 0; | |
4024 | } else { | |
4025 | if (scratchpad != CCISS_FIRMWARE_READY) | |
4026 | return 0; | |
4027 | } | |
e99ba136 | 4028 | msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS); |
e1438581 | 4029 | } |
afa842fa | 4030 | dev_warn(&pdev->dev, "board not ready, timed out.\n"); |
e99ba136 SC |
4031 | return -ENODEV; |
4032 | } | |
e1438581 | 4033 | |
8e93bf6d SC |
4034 | static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, |
4035 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | |
4036 | u64 *cfg_offset) | |
4037 | { | |
4038 | *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); | |
4039 | *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); | |
4040 | *cfg_base_addr &= (u32) 0x0000ffff; | |
4041 | *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); | |
4042 | if (*cfg_base_addr_index == -1) { | |
4043 | dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, " | |
4044 | "*cfg_base_addr = 0x%08x\n", *cfg_base_addr); | |
4045 | return -ENODEV; | |
4046 | } | |
4047 | return 0; | |
4048 | } | |
1da177e4 | 4049 | |
4809d098 SC |
4050 | static int __devinit cciss_find_cfgtables(ctlr_info_t *h) |
4051 | { | |
4052 | u64 cfg_offset; | |
4053 | u32 cfg_base_addr; | |
4054 | u64 cfg_base_addr_index; | |
4055 | u32 trans_offset; | |
8e93bf6d | 4056 | int rc; |
1da177e4 | 4057 | |
8e93bf6d SC |
4058 | rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, |
4059 | &cfg_base_addr_index, &cfg_offset); | |
4060 | if (rc) | |
4061 | return rc; | |
4809d098 | 4062 | h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, |
8e93bf6d | 4063 | cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable)); |
4809d098 SC |
4064 | if (!h->cfgtable) |
4065 | return -ENOMEM; | |
4066 | /* Find performant mode table. */ | |
8e93bf6d | 4067 | trans_offset = readl(&h->cfgtable->TransMethodOffset); |
4809d098 SC |
4068 | h->transtable = remap_pci_mem(pci_resource_start(h->pdev, |
4069 | cfg_base_addr_index)+cfg_offset+trans_offset, | |
4070 | sizeof(*h->transtable)); | |
4071 | if (!h->transtable) | |
4072 | return -ENOMEM; | |
4073 | return 0; | |
4074 | } | |
1da177e4 | 4075 | |
adfbc1ff SC |
4076 | static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h) |
4077 | { | |
4078 | h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); | |
186fb9cf SC |
4079 | |
4080 | /* Limit commands in memory limited kdump scenario. */ | |
4081 | if (reset_devices && h->max_commands > 32) | |
4082 | h->max_commands = 32; | |
4083 | ||
adfbc1ff SC |
4084 | if (h->max_commands < 16) { |
4085 | dev_warn(&h->pdev->dev, "Controller reports " | |
4086 | "max supported commands of %d, an obvious lie. " | |
4087 | "Using 16. Ensure that firmware is up to date.\n", | |
4088 | h->max_commands); | |
4089 | h->max_commands = 16; | |
1da177e4 | 4090 | } |
adfbc1ff | 4091 | } |
1da177e4 | 4092 | |
afadbf4b SC |
4093 | /* Interrogate the hardware for some limits: |
4094 | * max commands, max SG elements without chaining, and with chaining, | |
4095 | * SG chain block size, etc. | |
4096 | */ | |
4097 | static void __devinit cciss_find_board_params(ctlr_info_t *h) | |
4098 | { | |
adfbc1ff | 4099 | cciss_get_max_perf_mode_cmds(h); |
afadbf4b SC |
4100 | h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ |
4101 | h->maxsgentries = readl(&(h->cfgtable->MaxSGElements)); | |
5c07a311 | 4102 | /* |
afadbf4b | 4103 | * Limit in-command s/g elements to 32 save dma'able memory. |
5c07a311 DB |
4104 | * Howvever spec says if 0, use 31 |
4105 | */ | |
afadbf4b SC |
4106 | h->max_cmd_sgentries = 31; |
4107 | if (h->maxsgentries > 512) { | |
4108 | h->max_cmd_sgentries = 32; | |
4109 | h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1; | |
4110 | h->maxsgentries--; /* save one for chain pointer */ | |
5c07a311 | 4111 | } else { |
afadbf4b SC |
4112 | h->maxsgentries = 31; /* default to traditional values */ |
4113 | h->chainsize = 0; | |
5c07a311 | 4114 | } |
afadbf4b | 4115 | } |
5c07a311 | 4116 | |
501b92cd SC |
4117 | static inline bool CISS_signature_present(ctlr_info_t *h) |
4118 | { | |
4119 | if ((readb(&h->cfgtable->Signature[0]) != 'C') || | |
4120 | (readb(&h->cfgtable->Signature[1]) != 'I') || | |
4121 | (readb(&h->cfgtable->Signature[2]) != 'S') || | |
4122 | (readb(&h->cfgtable->Signature[3]) != 'S')) { | |
4123 | dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); | |
4124 | return false; | |
1da177e4 | 4125 | } |
501b92cd SC |
4126 | return true; |
4127 | } | |
4128 | ||
322e304c SC |
4129 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ |
4130 | static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h) | |
4131 | { | |
1da177e4 | 4132 | #ifdef CONFIG_X86 |
322e304c SC |
4133 | u32 prefetch; |
4134 | ||
4135 | prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); | |
4136 | prefetch |= 0x100; | |
4137 | writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); | |
1da177e4 | 4138 | #endif |
322e304c | 4139 | } |
1da177e4 | 4140 | |
bfd63ee5 SC |
4141 | /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result |
4142 | * in a prefetch beyond physical memory. | |
4143 | */ | |
4144 | static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h) | |
4145 | { | |
4146 | u32 dma_prefetch; | |
4147 | __u32 dma_refetch; | |
4148 | ||
4149 | if (h->board_id != 0x3225103C) | |
4150 | return; | |
4151 | dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); | |
4152 | dma_prefetch |= 0x8000; | |
4153 | writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); | |
4154 | pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch); | |
4155 | dma_refetch |= 0x1; | |
4156 | pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch); | |
4157 | } | |
4158 | ||
f70dba83 | 4159 | static int __devinit cciss_pci_init(ctlr_info_t *h) |
6539fa9b | 4160 | { |
4809d098 | 4161 | int prod_index, err; |
6539fa9b | 4162 | |
f70dba83 | 4163 | prod_index = cciss_lookup_board_id(h->pdev, &h->board_id); |
6539fa9b | 4164 | if (prod_index < 0) |
2ec24ff1 | 4165 | return -ENODEV; |
f70dba83 SC |
4166 | h->product_name = products[prod_index].product_name; |
4167 | h->access = *(products[prod_index].access); | |
1da177e4 | 4168 | |
f70dba83 | 4169 | if (cciss_board_disabled(h)) { |
b2a4a43d | 4170 | dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); |
c33ac89b | 4171 | return -ENODEV; |
1da177e4 | 4172 | } |
f70dba83 | 4173 | err = pci_enable_device(h->pdev); |
7c832835 | 4174 | if (err) { |
b2a4a43d | 4175 | dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n"); |
c33ac89b | 4176 | return err; |
f92e2f5f MM |
4177 | } |
4178 | ||
f70dba83 | 4179 | err = pci_request_regions(h->pdev, "cciss"); |
4e570309 | 4180 | if (err) { |
b2a4a43d SC |
4181 | dev_warn(&h->pdev->dev, |
4182 | "Cannot obtain PCI resources, aborting\n"); | |
872225ca | 4183 | return err; |
4e570309 | 4184 | } |
1da177e4 | 4185 | |
b2a4a43d SC |
4186 | dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq); |
4187 | dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id); | |
1da177e4 | 4188 | |
fb86a35b MM |
4189 | /* If the kernel supports MSI/MSI-X we will try to enable that functionality, |
4190 | * else we use the IO-APIC interrupt assigned to us by system ROM. | |
4191 | */ | |
f70dba83 SC |
4192 | cciss_interrupt_mode(h); |
4193 | err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr); | |
d474830d | 4194 | if (err) |
e1438581 | 4195 | goto err_out_free_res; |
f70dba83 SC |
4196 | h->vaddr = remap_pci_mem(h->paddr, 0x250); |
4197 | if (!h->vaddr) { | |
da550321 SC |
4198 | err = -ENOMEM; |
4199 | goto err_out_free_res; | |
7c832835 | 4200 | } |
afa842fa | 4201 | err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); |
e99ba136 | 4202 | if (err) |
4e570309 | 4203 | goto err_out_free_res; |
f70dba83 | 4204 | err = cciss_find_cfgtables(h); |
4809d098 | 4205 | if (err) |
4e570309 | 4206 | goto err_out_free_res; |
b2a4a43d | 4207 | print_cfg_table(h); |
f70dba83 | 4208 | cciss_find_board_params(h); |
1da177e4 | 4209 | |
f70dba83 | 4210 | if (!CISS_signature_present(h)) { |
c33ac89b | 4211 | err = -ENODEV; |
4e570309 | 4212 | goto err_out_free_res; |
1da177e4 | 4213 | } |
f70dba83 SC |
4214 | cciss_enable_scsi_prefetch(h); |
4215 | cciss_p600_dma_prefetch_quirk(h); | |
4216 | cciss_put_controller_into_performant_mode(h); | |
1da177e4 LT |
4217 | return 0; |
4218 | ||
5faad620 | 4219 | err_out_free_res: |
872225ca MM |
4220 | /* |
4221 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4222 | * Smart Array controllers that pci_enable_device does not undo | |
4223 | */ | |
f70dba83 SC |
4224 | if (h->transtable) |
4225 | iounmap(h->transtable); | |
4226 | if (h->cfgtable) | |
4227 | iounmap(h->cfgtable); | |
4228 | if (h->vaddr) | |
4229 | iounmap(h->vaddr); | |
4230 | pci_release_regions(h->pdev); | |
c33ac89b | 4231 | return err; |
1da177e4 LT |
4232 | } |
4233 | ||
6ae5ce8e MM |
4234 | /* Function to find the first free pointer into our hba[] array |
4235 | * Returns -1 if no free entries are left. | |
7c832835 | 4236 | */ |
b2a4a43d | 4237 | static int alloc_cciss_hba(struct pci_dev *pdev) |
1da177e4 | 4238 | { |
799202cb | 4239 | int i; |
1da177e4 | 4240 | |
7c832835 | 4241 | for (i = 0; i < MAX_CTLR; i++) { |
1da177e4 | 4242 | if (!hba[i]) { |
f70dba83 | 4243 | ctlr_info_t *h; |
f2912a12 | 4244 | |
f70dba83 SC |
4245 | h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL); |
4246 | if (!h) | |
1da177e4 | 4247 | goto Enomem; |
f70dba83 | 4248 | hba[i] = h; |
1da177e4 LT |
4249 | return i; |
4250 | } | |
4251 | } | |
b2a4a43d | 4252 | dev_warn(&pdev->dev, "This driver supports a maximum" |
7c832835 | 4253 | " of %d controllers.\n", MAX_CTLR); |
799202cb MM |
4254 | return -1; |
4255 | Enomem: | |
b2a4a43d | 4256 | dev_warn(&pdev->dev, "out of memory.\n"); |
1da177e4 LT |
4257 | return -1; |
4258 | } | |
4259 | ||
f70dba83 | 4260 | static void free_hba(ctlr_info_t *h) |
1da177e4 | 4261 | { |
2c935593 | 4262 | int i; |
1da177e4 | 4263 | |
f70dba83 | 4264 | hba[h->ctlr] = NULL; |
2c935593 SC |
4265 | for (i = 0; i < h->highest_lun + 1; i++) |
4266 | if (h->gendisk[i] != NULL) | |
4267 | put_disk(h->gendisk[i]); | |
4268 | kfree(h); | |
1da177e4 LT |
4269 | } |
4270 | ||
82eb03cf CC |
4271 | /* Send a message CDB to the firmware. */ |
4272 | static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type) | |
4273 | { | |
4274 | typedef struct { | |
4275 | CommandListHeader_struct CommandHeader; | |
4276 | RequestBlock_struct Request; | |
4277 | ErrDescriptor_struct ErrorDescriptor; | |
4278 | } Command; | |
4279 | static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct); | |
4280 | Command *cmd; | |
4281 | dma_addr_t paddr64; | |
4282 | uint32_t paddr32, tag; | |
4283 | void __iomem *vaddr; | |
4284 | int i, err; | |
4285 | ||
4286 | vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); | |
4287 | if (vaddr == NULL) | |
4288 | return -ENOMEM; | |
4289 | ||
4290 | /* The Inbound Post Queue only accepts 32-bit physical addresses for the | |
4291 | CCISS commands, so they must be allocated from the lower 4GiB of | |
4292 | memory. */ | |
e930438c | 4293 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
82eb03cf CC |
4294 | if (err) { |
4295 | iounmap(vaddr); | |
4296 | return -ENOMEM; | |
4297 | } | |
4298 | ||
4299 | cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); | |
4300 | if (cmd == NULL) { | |
4301 | iounmap(vaddr); | |
4302 | return -ENOMEM; | |
4303 | } | |
4304 | ||
4305 | /* This must fit, because of the 32-bit consistent DMA mask. Also, | |
4306 | although there's no guarantee, we assume that the address is at | |
4307 | least 4-byte aligned (most likely, it's page-aligned). */ | |
4308 | paddr32 = paddr64; | |
4309 | ||
4310 | cmd->CommandHeader.ReplyQueue = 0; | |
4311 | cmd->CommandHeader.SGList = 0; | |
4312 | cmd->CommandHeader.SGTotal = 0; | |
4313 | cmd->CommandHeader.Tag.lower = paddr32; | |
4314 | cmd->CommandHeader.Tag.upper = 0; | |
4315 | memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); | |
4316 | ||
4317 | cmd->Request.CDBLen = 16; | |
4318 | cmd->Request.Type.Type = TYPE_MSG; | |
4319 | cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; | |
4320 | cmd->Request.Type.Direction = XFER_NONE; | |
4321 | cmd->Request.Timeout = 0; /* Don't time out */ | |
4322 | cmd->Request.CDB[0] = opcode; | |
4323 | cmd->Request.CDB[1] = type; | |
4324 | memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */ | |
4325 | ||
4326 | cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command); | |
4327 | cmd->ErrorDescriptor.Addr.upper = 0; | |
4328 | cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct); | |
4329 | ||
4330 | writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); | |
4331 | ||
4332 | for (i = 0; i < 10; i++) { | |
4333 | tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); | |
4334 | if ((tag & ~3) == paddr32) | |
4335 | break; | |
4336 | schedule_timeout_uninterruptible(HZ); | |
4337 | } | |
4338 | ||
4339 | iounmap(vaddr); | |
4340 | ||
4341 | /* we leak the DMA buffer here ... no choice since the controller could | |
4342 | still complete the command. */ | |
4343 | if (i == 10) { | |
b2a4a43d SC |
4344 | dev_err(&pdev->dev, |
4345 | "controller message %02x:%02x timed out\n", | |
82eb03cf CC |
4346 | opcode, type); |
4347 | return -ETIMEDOUT; | |
4348 | } | |
4349 | ||
4350 | pci_free_consistent(pdev, cmd_sz, cmd, paddr64); | |
4351 | ||
4352 | if (tag & 2) { | |
b2a4a43d | 4353 | dev_err(&pdev->dev, "controller message %02x:%02x failed\n", |
82eb03cf CC |
4354 | opcode, type); |
4355 | return -EIO; | |
4356 | } | |
4357 | ||
b2a4a43d | 4358 | dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", |
82eb03cf CC |
4359 | opcode, type); |
4360 | return 0; | |
4361 | } | |
4362 | ||
4363 | #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0) | |
4364 | #define cciss_noop(p) cciss_message(p, 3, 0) | |
4365 | ||
a6528d01 SC |
4366 | static int cciss_controller_hard_reset(struct pci_dev *pdev, |
4367 | void * __iomem vaddr, bool use_doorbell) | |
82eb03cf | 4368 | { |
a6528d01 SC |
4369 | u16 pmcsr; |
4370 | int pos; | |
82eb03cf | 4371 | |
a6528d01 SC |
4372 | if (use_doorbell) { |
4373 | /* For everything after the P600, the PCI power state method | |
4374 | * of resetting the controller doesn't work, so we have this | |
4375 | * other way using the doorbell register. | |
4376 | */ | |
4377 | dev_info(&pdev->dev, "using doorbell to reset controller\n"); | |
4378 | writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL); | |
4379 | msleep(1000); | |
4380 | } else { /* Try to do it the PCI power state way */ | |
4381 | ||
4382 | /* Quoting from the Open CISS Specification: "The Power | |
4383 | * Management Control/Status Register (CSR) controls the power | |
4384 | * state of the device. The normal operating state is D0, | |
4385 | * CSR=00h. The software off state is D3, CSR=03h. To reset | |
4386 | * the controller, place the interface device in D3 then to D0, | |
4387 | * this causes a secondary PCI reset which will reset the | |
4388 | * controller." */ | |
4389 | ||
4390 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); | |
4391 | if (pos == 0) { | |
4392 | dev_err(&pdev->dev, | |
4393 | "cciss_controller_hard_reset: " | |
4394 | "PCI PM not supported\n"); | |
4395 | return -ENODEV; | |
4396 | } | |
4397 | dev_info(&pdev->dev, "using PCI PM to reset controller\n"); | |
4398 | /* enter the D3hot power management state */ | |
4399 | pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); | |
4400 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | |
4401 | pmcsr |= PCI_D3hot; | |
4402 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | |
82eb03cf | 4403 | |
a6528d01 | 4404 | msleep(500); |
82eb03cf | 4405 | |
a6528d01 SC |
4406 | /* enter the D0 power management state */ |
4407 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | |
4408 | pmcsr |= PCI_D0; | |
4409 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | |
82eb03cf | 4410 | |
a6528d01 SC |
4411 | msleep(500); |
4412 | } | |
4413 | return 0; | |
4414 | } | |
82eb03cf | 4415 | |
a6528d01 SC |
4416 | /* This does a hard reset of the controller using PCI power management |
4417 | * states or using the doorbell register. */ | |
4418 | static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev) | |
4419 | { | |
a6528d01 SC |
4420 | u64 cfg_offset; |
4421 | u32 cfg_base_addr; | |
4422 | u64 cfg_base_addr_index; | |
4423 | void __iomem *vaddr; | |
4424 | unsigned long paddr; | |
4425 | u32 misc_fw_support, active_transport; | |
f442e64b | 4426 | int rc; |
a6528d01 SC |
4427 | CfgTable_struct __iomem *cfgtable; |
4428 | bool use_doorbell; | |
058a0f9f | 4429 | u32 board_id; |
f442e64b | 4430 | u16 command_register; |
a6528d01 SC |
4431 | |
4432 | /* For controllers as old a the p600, this is very nearly | |
4433 | * the same thing as | |
4434 | * | |
4435 | * pci_save_state(pci_dev); | |
4436 | * pci_set_power_state(pci_dev, PCI_D3hot); | |
4437 | * pci_set_power_state(pci_dev, PCI_D0); | |
4438 | * pci_restore_state(pci_dev); | |
4439 | * | |
a6528d01 SC |
4440 | * For controllers newer than the P600, the pci power state |
4441 | * method of resetting doesn't work so we have another way | |
4442 | * using the doorbell register. | |
4443 | */ | |
82eb03cf | 4444 | |
058a0f9f SC |
4445 | /* Exclude 640x boards. These are two pci devices in one slot |
4446 | * which share a battery backed cache module. One controls the | |
4447 | * cache, the other accesses the cache through the one that controls | |
4448 | * it. If we reset the one controlling the cache, the other will | |
4449 | * likely not be happy. Just forbid resetting this conjoined mess. | |
4450 | */ | |
4451 | cciss_lookup_board_id(pdev, &board_id); | |
4452 | if (board_id == 0x409C0E11 || board_id == 0x409D0E11) { | |
4453 | dev_warn(&pdev->dev, "Cannot reset Smart Array 640x " | |
4454 | "due to shared cache module."); | |
82eb03cf CC |
4455 | return -ENODEV; |
4456 | } | |
4457 | ||
f442e64b SC |
4458 | /* Save the PCI command register */ |
4459 | pci_read_config_word(pdev, 4, &command_register); | |
4460 | /* Turn the board off. This is so that later pci_restore_state() | |
4461 | * won't turn the board on before the rest of config space is ready. | |
4462 | */ | |
4463 | pci_disable_device(pdev); | |
4464 | pci_save_state(pdev); | |
82eb03cf | 4465 | |
a6528d01 SC |
4466 | /* find the first memory BAR, so we can find the cfg table */ |
4467 | rc = cciss_pci_find_memory_BAR(pdev, &paddr); | |
4468 | if (rc) | |
4469 | return rc; | |
4470 | vaddr = remap_pci_mem(paddr, 0x250); | |
4471 | if (!vaddr) | |
4472 | return -ENOMEM; | |
82eb03cf | 4473 | |
a6528d01 SC |
4474 | /* find cfgtable in order to check if reset via doorbell is supported */ |
4475 | rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, | |
4476 | &cfg_base_addr_index, &cfg_offset); | |
4477 | if (rc) | |
4478 | goto unmap_vaddr; | |
4479 | cfgtable = remap_pci_mem(pci_resource_start(pdev, | |
4480 | cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); | |
4481 | if (!cfgtable) { | |
4482 | rc = -ENOMEM; | |
4483 | goto unmap_vaddr; | |
4484 | } | |
82eb03cf | 4485 | |
a6528d01 SC |
4486 | /* If reset via doorbell register is supported, use that. */ |
4487 | misc_fw_support = readl(&cfgtable->misc_fw_support); | |
4488 | use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; | |
82eb03cf | 4489 | |
75230ff2 SC |
4490 | /* The doorbell reset seems to cause lockups on some Smart |
4491 | * Arrays (e.g. P410, P410i, maybe others). Until this is | |
4492 | * fixed or at least isolated, avoid the doorbell reset. | |
4493 | */ | |
4494 | use_doorbell = 0; | |
4495 | ||
a6528d01 SC |
4496 | rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell); |
4497 | if (rc) | |
4498 | goto unmap_cfgtable; | |
f442e64b SC |
4499 | pci_restore_state(pdev); |
4500 | rc = pci_enable_device(pdev); | |
4501 | if (rc) { | |
4502 | dev_warn(&pdev->dev, "failed to enable device.\n"); | |
4503 | goto unmap_cfgtable; | |
82eb03cf | 4504 | } |
f442e64b | 4505 | pci_write_config_word(pdev, 4, command_register); |
82eb03cf | 4506 | |
a6528d01 SC |
4507 | /* Some devices (notably the HP Smart Array 5i Controller) |
4508 | need a little pause here */ | |
4509 | msleep(CCISS_POST_RESET_PAUSE_MSECS); | |
4510 | ||
afa842fa SC |
4511 | /* Wait for board to become not ready, then ready. */ |
4512 | dev_info(&pdev->dev, "Waiting for board to become ready.\n"); | |
4513 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); | |
4514 | if (rc) /* Don't bail, might be E500, etc. which can't be reset */ | |
4515 | dev_warn(&pdev->dev, | |
4516 | "failed waiting for board to become not ready\n"); | |
4517 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY); | |
4518 | if (rc) { | |
4519 | dev_warn(&pdev->dev, | |
4520 | "failed waiting for board to become ready\n"); | |
4521 | goto unmap_cfgtable; | |
4522 | } | |
4523 | dev_info(&pdev->dev, "board ready.\n"); | |
4524 | ||
a6528d01 SC |
4525 | /* Controller should be in simple mode at this point. If it's not, |
4526 | * It means we're on one of those controllers which doesn't support | |
4527 | * the doorbell reset method and on which the PCI power management reset | |
4528 | * method doesn't work (P800, for example.) | |
4529 | * In those cases, don't try to proceed, as it generally doesn't work. | |
4530 | */ | |
4531 | active_transport = readl(&cfgtable->TransportActive); | |
4532 | if (active_transport & PERFORMANT_MODE) { | |
4533 | dev_warn(&pdev->dev, "Unable to successfully reset controller," | |
4534 | " Ignoring controller.\n"); | |
4535 | rc = -ENODEV; | |
4536 | } | |
4537 | ||
4538 | unmap_cfgtable: | |
4539 | iounmap(cfgtable); | |
4540 | ||
4541 | unmap_vaddr: | |
4542 | iounmap(vaddr); | |
4543 | return rc; | |
82eb03cf CC |
4544 | } |
4545 | ||
83123cb1 SC |
4546 | static __devinit int cciss_init_reset_devices(struct pci_dev *pdev) |
4547 | { | |
a6528d01 | 4548 | int rc, i; |
83123cb1 SC |
4549 | |
4550 | if (!reset_devices) | |
4551 | return 0; | |
4552 | ||
a6528d01 SC |
4553 | /* Reset the controller with a PCI power-cycle or via doorbell */ |
4554 | rc = cciss_kdump_hard_reset_controller(pdev); | |
83123cb1 | 4555 | |
a6528d01 SC |
4556 | /* -ENOTSUPP here means we cannot reset the controller |
4557 | * but it's already (and still) up and running in | |
058a0f9f SC |
4558 | * "performant mode". Or, it might be 640x, which can't reset |
4559 | * due to concerns about shared bbwc between 6402/6404 pair. | |
a6528d01 SC |
4560 | */ |
4561 | if (rc == -ENOTSUPP) | |
4562 | return 0; /* just try to do the kdump anyhow. */ | |
4563 | if (rc) | |
4564 | return -ENODEV; | |
83123cb1 SC |
4565 | |
4566 | /* Now try to get the controller to respond to a no-op */ | |
4567 | for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) { | |
4568 | if (cciss_noop(pdev) == 0) | |
4569 | break; | |
4570 | else | |
4571 | dev_warn(&pdev->dev, "no-op failed%s\n", | |
4572 | (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ? | |
4573 | "; re-trying" : "")); | |
4574 | msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS); | |
4575 | } | |
82eb03cf CC |
4576 | return 0; |
4577 | } | |
4578 | ||
1da177e4 LT |
4579 | /* |
4580 | * This is it. Find all the controllers and register them. I really hate | |
4581 | * stealing all these major device numbers. | |
4582 | * returns the number of block devices registered. | |
4583 | */ | |
4584 | static int __devinit cciss_init_one(struct pci_dev *pdev, | |
7c832835 | 4585 | const struct pci_device_id *ent) |
1da177e4 | 4586 | { |
1da177e4 | 4587 | int i; |
799202cb | 4588 | int j = 0; |
5c07a311 | 4589 | int k = 0; |
1da177e4 | 4590 | int rc; |
22bece00 | 4591 | int dac, return_code; |
212a5026 | 4592 | InquiryData_struct *inq_buff; |
f70dba83 | 4593 | ctlr_info_t *h; |
1da177e4 | 4594 | |
83123cb1 SC |
4595 | rc = cciss_init_reset_devices(pdev); |
4596 | if (rc) | |
4597 | return rc; | |
b2a4a43d | 4598 | i = alloc_cciss_hba(pdev); |
7c832835 | 4599 | if (i < 0) |
e2019b58 | 4600 | return -1; |
1f8ef380 | 4601 | |
f70dba83 SC |
4602 | h = hba[i]; |
4603 | h->pdev = pdev; | |
4604 | h->busy_initializing = 1; | |
e6e1ee93 JA |
4605 | INIT_LIST_HEAD(&h->cmpQ); |
4606 | INIT_LIST_HEAD(&h->reqQ); | |
f70dba83 | 4607 | mutex_init(&h->busy_shutting_down); |
1f8ef380 | 4608 | |
f70dba83 | 4609 | if (cciss_pci_init(h) != 0) |
2cfa948c | 4610 | goto clean_no_release_regions; |
1da177e4 | 4611 | |
f70dba83 SC |
4612 | sprintf(h->devname, "cciss%d", i); |
4613 | h->ctlr = i; | |
1da177e4 | 4614 | |
f70dba83 | 4615 | init_completion(&h->scan_wait); |
b368c9dd | 4616 | |
f70dba83 | 4617 | if (cciss_create_hba_sysfs_entry(h)) |
7fe06326 AP |
4618 | goto clean0; |
4619 | ||
1da177e4 | 4620 | /* configure PCI DMA stuff */ |
6a35528a | 4621 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
40aabb58 | 4622 | dac = 1; |
284901a9 | 4623 | else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
40aabb58 | 4624 | dac = 0; |
1da177e4 | 4625 | else { |
b2a4a43d | 4626 | dev_err(&h->pdev->dev, "no suitable DMA available\n"); |
1da177e4 LT |
4627 | goto clean1; |
4628 | } | |
4629 | ||
4630 | /* | |
4631 | * register with the major number, or get a dynamic major number | |
4632 | * by passing 0 as argument. This is done for greater than | |
4633 | * 8 controller support. | |
4634 | */ | |
4635 | if (i < MAX_CTLR_ORIG) | |
f70dba83 SC |
4636 | h->major = COMPAQ_CISS_MAJOR + i; |
4637 | rc = register_blkdev(h->major, h->devname); | |
7c832835 | 4638 | if (rc == -EBUSY || rc == -EINVAL) { |
b2a4a43d SC |
4639 | dev_err(&h->pdev->dev, |
4640 | "Unable to get major number %d for %s " | |
f70dba83 | 4641 | "on hba %d\n", h->major, h->devname, i); |
1da177e4 | 4642 | goto clean1; |
7c832835 | 4643 | } else { |
1da177e4 | 4644 | if (i >= MAX_CTLR_ORIG) |
f70dba83 | 4645 | h->major = rc; |
1da177e4 LT |
4646 | } |
4647 | ||
4648 | /* make sure the board interrupts are off */ | |
f70dba83 SC |
4649 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
4650 | if (h->msi_vector || h->msix_vector) { | |
4651 | if (request_irq(h->intr[PERF_MODE_INT], | |
0c2b3908 | 4652 | do_cciss_msix_intr, |
f70dba83 | 4653 | IRQF_DISABLED, h->devname, h)) { |
b2a4a43d | 4654 | dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", |
f70dba83 | 4655 | h->intr[PERF_MODE_INT], h->devname); |
0c2b3908 MM |
4656 | goto clean2; |
4657 | } | |
4658 | } else { | |
f70dba83 SC |
4659 | if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx, |
4660 | IRQF_DISABLED, h->devname, h)) { | |
b2a4a43d | 4661 | dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", |
f70dba83 | 4662 | h->intr[PERF_MODE_INT], h->devname); |
0c2b3908 MM |
4663 | goto clean2; |
4664 | } | |
1da177e4 | 4665 | } |
40aabb58 | 4666 | |
b2a4a43d | 4667 | dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", |
f70dba83 SC |
4668 | h->devname, pdev->device, pci_name(pdev), |
4669 | h->intr[PERF_MODE_INT], dac ? "" : " not"); | |
7c832835 | 4670 | |
f70dba83 SC |
4671 | h->cmd_pool_bits = |
4672 | kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) | |
061837bc | 4673 | * sizeof(unsigned long), GFP_KERNEL); |
f70dba83 SC |
4674 | h->cmd_pool = (CommandList_struct *) |
4675 | pci_alloc_consistent(h->pdev, | |
4676 | h->nr_cmds * sizeof(CommandList_struct), | |
4677 | &(h->cmd_pool_dhandle)); | |
4678 | h->errinfo_pool = (ErrorInfo_struct *) | |
4679 | pci_alloc_consistent(h->pdev, | |
4680 | h->nr_cmds * sizeof(ErrorInfo_struct), | |
4681 | &(h->errinfo_pool_dhandle)); | |
4682 | if ((h->cmd_pool_bits == NULL) | |
4683 | || (h->cmd_pool == NULL) | |
4684 | || (h->errinfo_pool == NULL)) { | |
b2a4a43d | 4685 | dev_err(&h->pdev->dev, "out of memory"); |
1da177e4 LT |
4686 | goto clean4; |
4687 | } | |
5c07a311 DB |
4688 | |
4689 | /* Need space for temp scatter list */ | |
f70dba83 | 4690 | h->scatter_list = kmalloc(h->max_commands * |
5c07a311 DB |
4691 | sizeof(struct scatterlist *), |
4692 | GFP_KERNEL); | |
4ee69851 DC |
4693 | if (!h->scatter_list) |
4694 | goto clean4; | |
4695 | ||
f70dba83 SC |
4696 | for (k = 0; k < h->nr_cmds; k++) { |
4697 | h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) * | |
4698 | h->maxsgentries, | |
5c07a311 | 4699 | GFP_KERNEL); |
f70dba83 | 4700 | if (h->scatter_list[k] == NULL) { |
b2a4a43d SC |
4701 | dev_err(&h->pdev->dev, |
4702 | "could not allocate s/g lists\n"); | |
5c07a311 DB |
4703 | goto clean4; |
4704 | } | |
4705 | } | |
f70dba83 SC |
4706 | h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h, |
4707 | h->chainsize, h->nr_cmds); | |
4708 | if (!h->cmd_sg_list && h->chainsize > 0) | |
5c07a311 | 4709 | goto clean4; |
5c07a311 | 4710 | |
f70dba83 | 4711 | spin_lock_init(&h->lock); |
1da177e4 | 4712 | |
7c832835 | 4713 | /* Initialize the pdev driver private data. |
f70dba83 SC |
4714 | have it point to h. */ |
4715 | pci_set_drvdata(pdev, h); | |
7c832835 BH |
4716 | /* command and error info recs zeroed out before |
4717 | they are used */ | |
f70dba83 SC |
4718 | memset(h->cmd_pool_bits, 0, |
4719 | DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) | |
061837bc | 4720 | * sizeof(unsigned long)); |
1da177e4 | 4721 | |
f70dba83 SC |
4722 | h->num_luns = 0; |
4723 | h->highest_lun = -1; | |
6ae5ce8e | 4724 | for (j = 0; j < CISS_MAX_LUN; j++) { |
f70dba83 SC |
4725 | h->drv[j] = NULL; |
4726 | h->gendisk[j] = NULL; | |
6ae5ce8e | 4727 | } |
1da177e4 | 4728 | |
f70dba83 | 4729 | cciss_scsi_setup(h); |
1da177e4 LT |
4730 | |
4731 | /* Turn the interrupts on so we can service requests */ | |
f70dba83 | 4732 | h->access.set_intr_mask(h, CCISS_INTR_ON); |
1da177e4 | 4733 | |
22bece00 MM |
4734 | /* Get the firmware version */ |
4735 | inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); | |
4736 | if (inq_buff == NULL) { | |
b2a4a43d | 4737 | dev_err(&h->pdev->dev, "out of memory\n"); |
22bece00 MM |
4738 | goto clean4; |
4739 | } | |
4740 | ||
f70dba83 | 4741 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, |
b57695fe | 4742 | sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD); |
22bece00 | 4743 | if (return_code == IO_OK) { |
f70dba83 SC |
4744 | h->firm_ver[0] = inq_buff->data_byte[32]; |
4745 | h->firm_ver[1] = inq_buff->data_byte[33]; | |
4746 | h->firm_ver[2] = inq_buff->data_byte[34]; | |
4747 | h->firm_ver[3] = inq_buff->data_byte[35]; | |
22bece00 | 4748 | } else { /* send command failed */ |
b2a4a43d | 4749 | dev_warn(&h->pdev->dev, "unable to determine firmware" |
22bece00 MM |
4750 | " version of controller\n"); |
4751 | } | |
212a5026 | 4752 | kfree(inq_buff); |
22bece00 | 4753 | |
f70dba83 | 4754 | cciss_procinit(h); |
92c4231a | 4755 | |
f70dba83 | 4756 | h->cciss_max_sectors = 8192; |
92c4231a | 4757 | |
f70dba83 SC |
4758 | rebuild_lun_table(h, 1, 0); |
4759 | h->busy_initializing = 0; | |
e2019b58 | 4760 | return 1; |
1da177e4 | 4761 | |
6ae5ce8e | 4762 | clean4: |
f70dba83 | 4763 | kfree(h->cmd_pool_bits); |
5c07a311 | 4764 | /* Free up sg elements */ |
b0722cb1 | 4765 | for (k-- ; k >= 0; k--) |
f70dba83 SC |
4766 | kfree(h->scatter_list[k]); |
4767 | kfree(h->scatter_list); | |
4768 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); | |
4769 | if (h->cmd_pool) | |
4770 | pci_free_consistent(h->pdev, | |
4771 | h->nr_cmds * sizeof(CommandList_struct), | |
4772 | h->cmd_pool, h->cmd_pool_dhandle); | |
4773 | if (h->errinfo_pool) | |
4774 | pci_free_consistent(h->pdev, | |
4775 | h->nr_cmds * sizeof(ErrorInfo_struct), | |
4776 | h->errinfo_pool, | |
4777 | h->errinfo_pool_dhandle); | |
4778 | free_irq(h->intr[PERF_MODE_INT], h); | |
6ae5ce8e | 4779 | clean2: |
f70dba83 | 4780 | unregister_blkdev(h->major, h->devname); |
6ae5ce8e | 4781 | clean1: |
f70dba83 | 4782 | cciss_destroy_hba_sysfs_entry(h); |
7fe06326 | 4783 | clean0: |
2cfa948c SC |
4784 | pci_release_regions(pdev); |
4785 | clean_no_release_regions: | |
f70dba83 | 4786 | h->busy_initializing = 0; |
9cef0d2f | 4787 | |
872225ca MM |
4788 | /* |
4789 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4790 | * Smart Array controllers that pci_enable_device does not undo | |
4791 | */ | |
799202cb | 4792 | pci_set_drvdata(pdev, NULL); |
f70dba83 | 4793 | free_hba(h); |
e2019b58 | 4794 | return -1; |
1da177e4 LT |
4795 | } |
4796 | ||
e9ca75b5 | 4797 | static void cciss_shutdown(struct pci_dev *pdev) |
1da177e4 | 4798 | { |
29009a03 SC |
4799 | ctlr_info_t *h; |
4800 | char *flush_buf; | |
7c832835 | 4801 | int return_code; |
1da177e4 | 4802 | |
29009a03 SC |
4803 | h = pci_get_drvdata(pdev); |
4804 | flush_buf = kzalloc(4, GFP_KERNEL); | |
4805 | if (!flush_buf) { | |
b2a4a43d | 4806 | dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n"); |
e9ca75b5 | 4807 | return; |
e9ca75b5 | 4808 | } |
29009a03 SC |
4809 | /* write all data in the battery backed cache to disk */ |
4810 | memset(flush_buf, 0, 4); | |
f70dba83 | 4811 | return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, |
29009a03 SC |
4812 | 4, 0, CTLR_LUNID, TYPE_CMD); |
4813 | kfree(flush_buf); | |
4814 | if (return_code != IO_OK) | |
b2a4a43d | 4815 | dev_warn(&h->pdev->dev, "Error flushing cache\n"); |
29009a03 | 4816 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
5e216153 | 4817 | free_irq(h->intr[PERF_MODE_INT], h); |
e9ca75b5 GB |
4818 | } |
4819 | ||
4820 | static void __devexit cciss_remove_one(struct pci_dev *pdev) | |
4821 | { | |
f70dba83 | 4822 | ctlr_info_t *h; |
e9ca75b5 GB |
4823 | int i, j; |
4824 | ||
7c832835 | 4825 | if (pci_get_drvdata(pdev) == NULL) { |
b2a4a43d | 4826 | dev_err(&pdev->dev, "Unable to remove device\n"); |
1da177e4 LT |
4827 | return; |
4828 | } | |
0a9279cc | 4829 | |
f70dba83 SC |
4830 | h = pci_get_drvdata(pdev); |
4831 | i = h->ctlr; | |
7c832835 | 4832 | if (hba[i] == NULL) { |
b2a4a43d | 4833 | dev_err(&pdev->dev, "device appears to already be removed\n"); |
1da177e4 LT |
4834 | return; |
4835 | } | |
b6550777 | 4836 | |
f70dba83 | 4837 | mutex_lock(&h->busy_shutting_down); |
0a9279cc | 4838 | |
f70dba83 SC |
4839 | remove_from_scan_list(h); |
4840 | remove_proc_entry(h->devname, proc_cciss); | |
4841 | unregister_blkdev(h->major, h->devname); | |
b6550777 BH |
4842 | |
4843 | /* remove it from the disk list */ | |
4844 | for (j = 0; j < CISS_MAX_LUN; j++) { | |
f70dba83 | 4845 | struct gendisk *disk = h->gendisk[j]; |
b6550777 | 4846 | if (disk) { |
165125e1 | 4847 | struct request_queue *q = disk->queue; |
b6550777 | 4848 | |
097d0264 | 4849 | if (disk->flags & GENHD_FL_UP) { |
f70dba83 | 4850 | cciss_destroy_ld_sysfs_entry(h, j, 1); |
b6550777 | 4851 | del_gendisk(disk); |
097d0264 | 4852 | } |
b6550777 BH |
4853 | if (q) |
4854 | blk_cleanup_queue(q); | |
4855 | } | |
4856 | } | |
4857 | ||
ba198efb | 4858 | #ifdef CONFIG_CISS_SCSI_TAPE |
f70dba83 | 4859 | cciss_unregister_scsi(h); /* unhook from SCSI subsystem */ |
ba198efb | 4860 | #endif |
b6550777 | 4861 | |
e9ca75b5 | 4862 | cciss_shutdown(pdev); |
fb86a35b MM |
4863 | |
4864 | #ifdef CONFIG_PCI_MSI | |
f70dba83 SC |
4865 | if (h->msix_vector) |
4866 | pci_disable_msix(h->pdev); | |
4867 | else if (h->msi_vector) | |
4868 | pci_disable_msi(h->pdev); | |
7c832835 | 4869 | #endif /* CONFIG_PCI_MSI */ |
fb86a35b | 4870 | |
f70dba83 SC |
4871 | iounmap(h->transtable); |
4872 | iounmap(h->cfgtable); | |
4873 | iounmap(h->vaddr); | |
1da177e4 | 4874 | |
f70dba83 SC |
4875 | pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct), |
4876 | h->cmd_pool, h->cmd_pool_dhandle); | |
4877 | pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct), | |
4878 | h->errinfo_pool, h->errinfo_pool_dhandle); | |
4879 | kfree(h->cmd_pool_bits); | |
5c07a311 | 4880 | /* Free up sg elements */ |
f70dba83 SC |
4881 | for (j = 0; j < h->nr_cmds; j++) |
4882 | kfree(h->scatter_list[j]); | |
4883 | kfree(h->scatter_list); | |
4884 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); | |
872225ca MM |
4885 | /* |
4886 | * Deliberately omit pci_disable_device(): it does something nasty to | |
4887 | * Smart Array controllers that pci_enable_device does not undo | |
4888 | */ | |
7c832835 | 4889 | pci_release_regions(pdev); |
4e570309 | 4890 | pci_set_drvdata(pdev, NULL); |
f70dba83 SC |
4891 | cciss_destroy_hba_sysfs_entry(h); |
4892 | mutex_unlock(&h->busy_shutting_down); | |
4893 | free_hba(h); | |
7c832835 | 4894 | } |
1da177e4 LT |
4895 | |
4896 | static struct pci_driver cciss_pci_driver = { | |
7c832835 BH |
4897 | .name = "cciss", |
4898 | .probe = cciss_init_one, | |
4899 | .remove = __devexit_p(cciss_remove_one), | |
4900 | .id_table = cciss_pci_device_id, /* id_table */ | |
e9ca75b5 | 4901 | .shutdown = cciss_shutdown, |
1da177e4 LT |
4902 | }; |
4903 | ||
4904 | /* | |
4905 | * This is it. Register the PCI driver information for the cards we control | |
7c832835 | 4906 | * the OS will call our registered routines when it finds one of our cards. |
1da177e4 LT |
4907 | */ |
4908 | static int __init cciss_init(void) | |
4909 | { | |
7fe06326 AP |
4910 | int err; |
4911 | ||
10cbda97 JA |
4912 | /* |
4913 | * The hardware requires that commands are aligned on a 64-bit | |
4914 | * boundary. Given that we use pci_alloc_consistent() to allocate an | |
4915 | * array of them, the size must be a multiple of 8 bytes. | |
4916 | */ | |
1b7d0d28 | 4917 | BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT); |
1da177e4 LT |
4918 | printk(KERN_INFO DRIVER_NAME "\n"); |
4919 | ||
7fe06326 AP |
4920 | err = bus_register(&cciss_bus_type); |
4921 | if (err) | |
4922 | return err; | |
4923 | ||
b368c9dd AP |
4924 | /* Start the scan thread */ |
4925 | cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan"); | |
4926 | if (IS_ERR(cciss_scan_thread)) { | |
4927 | err = PTR_ERR(cciss_scan_thread); | |
4928 | goto err_bus_unregister; | |
4929 | } | |
4930 | ||
1da177e4 | 4931 | /* Register for our PCI devices */ |
7fe06326 AP |
4932 | err = pci_register_driver(&cciss_pci_driver); |
4933 | if (err) | |
b368c9dd | 4934 | goto err_thread_stop; |
7fe06326 | 4935 | |
617e1344 | 4936 | return err; |
7fe06326 | 4937 | |
b368c9dd AP |
4938 | err_thread_stop: |
4939 | kthread_stop(cciss_scan_thread); | |
4940 | err_bus_unregister: | |
7fe06326 | 4941 | bus_unregister(&cciss_bus_type); |
b368c9dd | 4942 | |
7fe06326 | 4943 | return err; |
1da177e4 LT |
4944 | } |
4945 | ||
4946 | static void __exit cciss_cleanup(void) | |
4947 | { | |
4948 | int i; | |
4949 | ||
4950 | pci_unregister_driver(&cciss_pci_driver); | |
4951 | /* double check that all controller entrys have been removed */ | |
7c832835 BH |
4952 | for (i = 0; i < MAX_CTLR; i++) { |
4953 | if (hba[i] != NULL) { | |
b2a4a43d SC |
4954 | dev_warn(&hba[i]->pdev->dev, |
4955 | "had to remove controller\n"); | |
1da177e4 LT |
4956 | cciss_remove_one(hba[i]->pdev); |
4957 | } | |
4958 | } | |
b368c9dd | 4959 | kthread_stop(cciss_scan_thread); |
90fdb0b9 JA |
4960 | if (proc_cciss) |
4961 | remove_proc_entry("driver/cciss", NULL); | |
7fe06326 | 4962 | bus_unregister(&cciss_bus_type); |
1da177e4 LT |
4963 | } |
4964 | ||
4965 | module_init(cciss_init); | |
4966 | module_exit(cciss_cleanup); |