cciss: add readl after writel in interrupt mask setting code
[deliverable/linux.git] / drivers / block / cciss_cmd.h
CommitLineData
1da177e4
LT
1#ifndef CCISS_CMD_H
2#define CCISS_CMD_H
429c42c9 3
4#include <linux/cciss_defs.h>
5
b028461d 6/* DEFINES */
1da177e4
LT
7#define CISS_VERSION "1.00"
8
b028461d 9/* general boundary definitions */
5c07a311
DB
10#define MAXSGENTRIES 32
11#define CCISS_SG_CHAIN 0x80000000
1da177e4
LT
12#define MAXREPLYQS 256
13
0a9279cc
MM
14/* Unit Attentions ASC's as defined for the MSA2012sa */
15#define POWER_OR_RESET 0x29
16#define STATE_CHANGED 0x2a
17#define UNIT_ATTENTION_CLEARED 0x2f
18#define LUN_FAILED 0x3e
19#define REPORT_LUNS_CHANGED 0x3f
20
21/* Unit Attentions ASCQ's as defined for the MSA2012sa */
22
23 /* These ASCQ's defined for ASC = POWER_OR_RESET */
24#define POWER_ON_RESET 0x00
25#define POWER_ON_REBOOT 0x01
26#define SCSI_BUS_RESET 0x02
27#define MSA_TARGET_RESET 0x03
28#define CONTROLLER_FAILOVER 0x04
29#define TRANSCEIVER_SE 0x05
30#define TRANSCEIVER_LVD 0x06
31
32 /* These ASCQ's defined for ASC = STATE_CHANGED */
33#define RESERVATION_PREEMPTED 0x03
34#define ASYM_ACCESS_CHANGED 0x06
35#define LUN_CAPACITY_CHANGED 0x09
36
b028461d 37/* config space register offsets */
1da177e4
LT
38#define CFG_VENDORID 0x00
39#define CFG_DEVICEID 0x02
40#define CFG_I2OBAR 0x10
41#define CFG_MEM1BAR 0x14
42
b028461d 43/* i2o space register offsets */
1da177e4
LT
44#define I2O_IBDB_SET 0x20
45#define I2O_IBDB_CLEAR 0x70
46#define I2O_INT_STATUS 0x30
47#define I2O_INT_MASK 0x34
48#define I2O_IBPOST_Q 0x40
49#define I2O_OBPOST_Q 0x44
f92e2f5f 50#define I2O_DMA1_CFG 0x214
1da177e4 51
b028461d 52/* Configuration Table */
1da177e4
LT
53#define CFGTBL_ChangeReq 0x00000001l
54#define CFGTBL_AccCmds 0x00000001l
a6528d01 55#define DOORBELL_CTLR_RESET 0x00000004l
1da177e4
LT
56
57#define CFGTBL_Trans_Simple 0x00000002l
5e216153 58#define CFGTBL_Trans_Performant 0x00000004l
0498cc2a 59#define CFGTBL_Trans_use_short_tags 0x20000000l
1da177e4
LT
60
61#define CFGTBL_BusType_Ultra2 0x00000001l
62#define CFGTBL_BusType_Ultra3 0x00000002l
63#define CFGTBL_BusType_Fibre1G 0x00000100l
64#define CFGTBL_BusType_Fibre2G 0x00000200l
65typedef struct _vals32
66{
67 __u32 lower;
68 __u32 upper;
69} vals32;
70
71typedef union _u64bit
72{
73 vals32 val32;
74 __u64 val;
75} u64bit;
76
b028461d 77/* Type defs used in the following structs */
1da177e4
LT
78#define QWORD vals32
79
b028461d 80/* STRUCTURES */
1da177e4 81#define CISS_MAX_PHYS_LUN 1024
b028461d 82/* SCSI-3 Cmmands */
1da177e4
LT
83
84#pragma pack(1)
85
86#define CISS_INQUIRY 0x12
b028461d 87/* Date returned */
1da177e4
LT
88typedef struct _InquiryData_struct
89{
90 BYTE data_byte[36];
91} InquiryData_struct;
92
93#define CISS_REPORT_LOG 0xc2 /* Report Logical LUNs */
94#define CISS_REPORT_PHYS 0xc3 /* Report Physical LUNs */
b028461d 95/* Data returned */
1da177e4
LT
96typedef struct _ReportLUNdata_struct
97{
98 BYTE LUNListLength[4];
99 DWORD reserved;
100 BYTE LUN[CISS_MAX_LUN][8];
101} ReportLunData_struct;
102
103#define CCISS_READ_CAPACITY 0x25 /* Read Capacity */
104typedef struct _ReadCapdata_struct
105{
b028461d 106 BYTE total_size[4]; /* Total size in blocks */
107 BYTE block_size[4]; /* Size of blocks in bytes */
1da177e4
LT
108} ReadCapdata_struct;
109
00988a35
MMOD
110#define CCISS_READ_CAPACITY_16 0x9e /* Read Capacity 16 */
111
112/* service action to differentiate a 16 byte read capacity from
113 other commands that use the 0x9e SCSI op code */
114
115#define CCISS_READ_CAPACITY_16_SERVICE_ACT 0x10
116
117typedef struct _ReadCapdata_struct_16
118{
119 BYTE total_size[8]; /* Total size in blocks */
120 BYTE block_size[4]; /* Size of blocks in bytes */
121 BYTE prot_en:1; /* protection enable bit */
122 BYTE rto_en:1; /* reference tag own enable bit */
123 BYTE reserved:6; /* reserved bits */
124 BYTE reserved2[18]; /* reserved bytes per spec */
125} ReadCapdata_struct_16;
126
127/* Define the supported read/write commands for cciss based controllers */
128
129#define CCISS_READ_10 0x28 /* Read(10) */
130#define CCISS_WRITE_10 0x2a /* Write(10) */
131#define CCISS_READ_16 0x88 /* Read(16) */
132#define CCISS_WRITE_16 0x8a /* Write(16) */
133
134/* Define the CDB lengths supported by cciss based controllers */
135
136#define CDB_LEN10 10
137#define CDB_LEN16 16
1da177e4 138
b028461d 139/* BMIC commands */
1da177e4
LT
140#define BMIC_READ 0x26
141#define BMIC_WRITE 0x27
142#define BMIC_CACHE_FLUSH 0xc2
b028461d 143#define CCISS_CACHE_FLUSH 0x01 /* C2 was already being used by CCISS */
1da177e4 144
b028461d 145/* Command List Structure */
b57695fe 146#define CTLR_LUNID "\0\0\0\0\0\0\0\0"
147
1da177e4
LT
148typedef struct _CommandListHeader_struct {
149 BYTE ReplyQueue;
150 BYTE SGList;
151 HWORD SGTotal;
152 QWORD Tag;
153 LUNAddr_struct LUN;
154} CommandListHeader_struct;
1da177e4
LT
155typedef struct _ErrDescriptor_struct {
156 QWORD Addr;
157 DWORD Len;
158} ErrDescriptor_struct;
159typedef struct _SGDescriptor_struct {
160 QWORD Addr;
161 DWORD Len;
162 DWORD Ext;
163} SGDescriptor_struct;
164
1da177e4
LT
165/* Command types */
166#define CMD_RWREQ 0x00
167#define CMD_IOCTL_PEND 0x01
168#define CMD_SCSI 0x03
169#define CMD_MSG_DONE 0x04
170#define CMD_MSG_TIMEOUT 0x05
b59e64d0 171#define CMD_MSG_STALE 0xff
1da177e4 172
1b7d0d28
SC
173/* This structure needs to be divisible by COMMANDLIST_ALIGNMENT
174 * because low bits of the address are used to to indicate that
175 * whether the tag contains an index or an address. PAD_32 and
176 * PAD_64 can be adjusted independently as needed for 32-bit
177 * and 64-bits systems.
33079b21 178 */
5e216153 179#define COMMANDLIST_ALIGNMENT (32)
58daa9ce
SC
180#define IS_64_BIT ((sizeof(long) - 4)/4)
181#define IS_32_BIT (!IS_64_BIT)
f3bcb143 182#define PAD_32 (0)
58daa9ce
SC
183#define PAD_64 (4)
184#define PADSIZE (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64)
5e216153
MM
185#define DIRECT_LOOKUP_BIT 0x10
186#define DIRECT_LOOKUP_SHIFT 5
187
1da177e4
LT
188typedef struct _CommandList_struct {
189 CommandListHeader_struct Header;
190 RequestBlock_struct Request;
191 ErrDescriptor_struct ErrDesc;
192 SGDescriptor_struct SG[MAXSGENTRIES];
193 /* information associated with the command */
194 __u32 busaddr; /* physical address of this record */
195 ErrorInfo_struct * err_info; /* pointer to the allocated mem */
196 int ctlr;
197 int cmd_type;
33079b21 198 long cmdindex;
e6e1ee93 199 struct list_head list;
1da177e4
LT
200 struct request * rq;
201 struct completion *waiting;
202 int retry_count;
1da177e4 203 void * scsi_cmd;
5e216153 204 char pad[PADSIZE];
1da177e4
LT
205} CommandList_struct;
206
b028461d 207/* Configuration Table Structure */
1da177e4
LT
208typedef struct _HostWrite_struct {
209 DWORD TransportRequest;
210 DWORD Reserved;
211 DWORD CoalIntDelay;
212 DWORD CoalIntCount;
213} HostWrite_struct;
214
215typedef struct _CfgTable_struct {
216 BYTE Signature[4];
217 DWORD SpecValence;
5e216153
MM
218#define SIMPLE_MODE 0x02
219#define PERFORMANT_MODE 0x04
220#define MEMQ_MODE 0x08
1da177e4
LT
221 DWORD TransportSupport;
222 DWORD TransportActive;
223 HostWrite_struct HostWrite;
224 DWORD CmdsOutMax;
225 DWORD BusTypes;
5e216153 226 DWORD TransMethodOffset;
1da177e4
LT
227 BYTE ServerName[16];
228 DWORD HeartBeat;
229 DWORD SCSI_Prefetch;
5c07a311
DB
230 DWORD MaxSGElements;
231 DWORD MaxLogicalUnits;
232 DWORD MaxPhysicalDrives;
233 DWORD MaxPhysicalDrivesPerLogicalUnit;
5e216153 234 DWORD MaxPerformantModeCommands;
a6528d01
SC
235 u8 reserved[0x78 - 0x58];
236 u32 misc_fw_support; /* offset 0x78 */
237#define MISC_FW_DOORBELL_RESET (0x02)
1da177e4 238} CfgTable_struct;
5e216153
MM
239
240struct TransTable_struct {
241 u32 BlockFetch0;
242 u32 BlockFetch1;
243 u32 BlockFetch2;
244 u32 BlockFetch3;
245 u32 BlockFetch4;
246 u32 BlockFetch5;
247 u32 BlockFetch6;
248 u32 BlockFetch7;
249 u32 RepQSize;
250 u32 RepQCount;
251 u32 RepQCtrAddrLow32;
252 u32 RepQCtrAddrHigh32;
253 u32 RepQAddr0Low32;
254 u32 RepQAddr0High32;
255};
256
1da177e4 257#pragma pack()
b028461d 258#endif /* CCISS_CMD_H */
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