Commit | Line | Data |
---|---|---|
88523a61 SB |
1 | /* |
2 | * Driver for the Micron P320 SSD | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/ata.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/hdreg.h> | |
26 | #include <linux/uaccess.h> | |
27 | #include <linux/random.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/compat.h> | |
30 | #include <linux/fs.h> | |
0e838c62 | 31 | #include <linux/module.h> |
88523a61 SB |
32 | #include <linux/genhd.h> |
33 | #include <linux/blkdev.h> | |
34 | #include <linux/bio.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/idr.h> | |
60ec0eec | 37 | #include <linux/kthread.h> |
88523a61 | 38 | #include <../drivers/ata/ahci.h> |
45038367 | 39 | #include <linux/export.h> |
7b421d24 | 40 | #include <linux/debugfs.h> |
88523a61 SB |
41 | #include "mtip32xx.h" |
42 | ||
43 | #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) | |
44 | #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16)) | |
45 | #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS) | |
46 | #define HW_PORT_PRIV_DMA_SZ \ | |
47 | (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ) | |
48 | ||
45038367 | 49 | #define HOST_CAP_NZDMA (1 << 19) |
88523a61 SB |
50 | #define HOST_HSORG 0xFC |
51 | #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) | |
52 | #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) | |
53 | #define HSORG_HWREV 0xFF00 | |
54 | #define HSORG_STYLE 0x8 | |
55 | #define HSORG_SLOTGROUPS 0x7 | |
56 | ||
57 | #define PORT_COMMAND_ISSUE 0x38 | |
58 | #define PORT_SDBV 0x7C | |
59 | ||
60 | #define PORT_OFFSET 0x100 | |
61 | #define PORT_MEM_SIZE 0x80 | |
62 | ||
63 | #define PORT_IRQ_ERR \ | |
64 | (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ | |
65 | PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ | |
66 | PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ | |
67 | PORT_IRQ_OVERFLOW) | |
68 | #define PORT_IRQ_LEGACY \ | |
69 | (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) | |
70 | #define PORT_IRQ_HANDLED \ | |
71 | (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ | |
72 | PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ | |
73 | PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) | |
74 | #define DEF_PORT_IRQ \ | |
75 | (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) | |
76 | ||
77 | /* product numbers */ | |
78 | #define MTIP_PRODUCT_UNKNOWN 0x00 | |
79 | #define MTIP_PRODUCT_ASICFPGA 0x11 | |
80 | ||
81 | /* Device instance number, incremented each time a device is probed. */ | |
82 | static int instance; | |
83 | ||
0caff003 AT |
84 | struct list_head online_list; |
85 | struct list_head removing_list; | |
86 | spinlock_t dev_lock; | |
87 | ||
88523a61 SB |
88 | /* |
89 | * Global variable used to hold the major block device number | |
90 | * allocated in mtip_init(). | |
91 | */ | |
3ff147d3 | 92 | static int mtip_major; |
7b421d24 | 93 | static struct dentry *dfs_parent; |
0caff003 | 94 | static struct dentry *dfs_device_status; |
88523a61 | 95 | |
16c906e5 AT |
96 | static u32 cpu_use[NR_CPUS]; |
97 | ||
88523a61 SB |
98 | static DEFINE_SPINLOCK(rssd_index_lock); |
99 | static DEFINE_IDA(rssd_index_ida); | |
100 | ||
62ee8c13 AT |
101 | static int mtip_block_initialize(struct driver_data *dd); |
102 | ||
16d02c04 | 103 | #ifdef CONFIG_COMPAT |
88523a61 SB |
104 | struct mtip_compat_ide_task_request_s { |
105 | __u8 io_ports[8]; | |
106 | __u8 hob_ports[8]; | |
107 | ide_reg_valid_t out_flags; | |
108 | ide_reg_valid_t in_flags; | |
109 | int data_phase; | |
110 | int req_cmd; | |
111 | compat_ulong_t out_size; | |
112 | compat_ulong_t in_size; | |
113 | }; | |
16d02c04 | 114 | #endif |
88523a61 | 115 | |
6316668f JA |
116 | /* |
117 | * This function check_for_surprise_removal is called | |
118 | * while card is removed from the system and it will | |
119 | * read the vendor id from the configration space | |
120 | * | |
121 | * @pdev Pointer to the pci_dev structure. | |
122 | * | |
123 | * return value | |
124 | * true if device removed, else false | |
125 | */ | |
126 | static bool mtip_check_surprise_removal(struct pci_dev *pdev) | |
127 | { | |
128 | u16 vendor_id = 0; | |
129 | ||
130 | /* Read the vendorID from the configuration space */ | |
131 | pci_read_config_word(pdev, 0x00, &vendor_id); | |
132 | if (vendor_id == 0xFFFF) | |
133 | return true; /* device removed */ | |
134 | ||
135 | return false; /* device present */ | |
136 | } | |
137 | ||
138 | /* | |
139 | * This function is called for clean the pending command in the | |
140 | * command slot during the surprise removal of device and return | |
141 | * error to the upper layer. | |
142 | * | |
143 | * @dd Pointer to the DRIVER_DATA structure. | |
144 | * | |
145 | * return value | |
146 | * None | |
147 | */ | |
148 | static void mtip_command_cleanup(struct driver_data *dd) | |
149 | { | |
150 | int group = 0, commandslot = 0, commandindex = 0; | |
151 | struct mtip_cmd *command; | |
152 | struct mtip_port *port = dd->port; | |
45038367 AT |
153 | static int in_progress; |
154 | ||
155 | if (in_progress) | |
156 | return; | |
157 | ||
158 | in_progress = 1; | |
6316668f JA |
159 | |
160 | for (group = 0; group < 4; group++) { | |
161 | for (commandslot = 0; commandslot < 32; commandslot++) { | |
162 | if (!(port->allocated[group] & (1 << commandslot))) | |
163 | continue; | |
164 | ||
165 | commandindex = group << 5 | commandslot; | |
166 | command = &port->commands[commandindex]; | |
167 | ||
168 | if (atomic_read(&command->active) | |
169 | && (command->async_callback)) { | |
170 | command->async_callback(command->async_data, | |
171 | -ENODEV); | |
172 | command->async_callback = NULL; | |
173 | command->async_data = NULL; | |
174 | } | |
175 | ||
176 | dma_unmap_sg(&port->dd->pdev->dev, | |
177 | command->sg, | |
178 | command->scatter_ents, | |
179 | command->direction); | |
180 | } | |
181 | } | |
182 | ||
183 | up(&port->cmd_slot); | |
184 | ||
8a857a88 | 185 | set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag); |
45038367 | 186 | in_progress = 0; |
6316668f JA |
187 | } |
188 | ||
88523a61 SB |
189 | /* |
190 | * Obtain an empty command slot. | |
191 | * | |
192 | * This function needs to be reentrant since it could be called | |
193 | * at the same time on multiple CPUs. The allocation of the | |
194 | * command slot must be atomic. | |
195 | * | |
196 | * @port Pointer to the port data structure. | |
197 | * | |
198 | * return value | |
199 | * >= 0 Index of command slot obtained. | |
200 | * -1 No command slots available. | |
201 | */ | |
202 | static int get_slot(struct mtip_port *port) | |
203 | { | |
204 | int slot, i; | |
205 | unsigned int num_command_slots = port->dd->slot_groups * 32; | |
206 | ||
207 | /* | |
208 | * Try 10 times, because there is a small race here. | |
209 | * that's ok, because it's still cheaper than a lock. | |
210 | * | |
211 | * Race: Since this section is not protected by lock, same bit | |
212 | * could be chosen by different process contexts running in | |
213 | * different processor. So instead of costly lock, we are going | |
214 | * with loop. | |
215 | */ | |
216 | for (i = 0; i < 10; i++) { | |
217 | slot = find_next_zero_bit(port->allocated, | |
218 | num_command_slots, 1); | |
219 | if ((slot < num_command_slots) && | |
220 | (!test_and_set_bit(slot, port->allocated))) | |
221 | return slot; | |
222 | } | |
223 | dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n"); | |
224 | ||
225 | if (mtip_check_surprise_removal(port->dd->pdev)) { | |
226 | /* Device not present, clean outstanding commands */ | |
227 | mtip_command_cleanup(port->dd); | |
228 | } | |
229 | return -1; | |
230 | } | |
231 | ||
232 | /* | |
233 | * Release a command slot. | |
234 | * | |
235 | * @port Pointer to the port data structure. | |
236 | * @tag Tag of command to release | |
237 | * | |
238 | * return value | |
239 | * None | |
240 | */ | |
241 | static inline void release_slot(struct mtip_port *port, int tag) | |
242 | { | |
243 | smp_mb__before_clear_bit(); | |
244 | clear_bit(tag, port->allocated); | |
245 | smp_mb__after_clear_bit(); | |
246 | } | |
247 | ||
248 | /* | |
6316668f | 249 | * Reset the HBA (without sleeping) |
88523a61 | 250 | * |
6316668f | 251 | * @dd Pointer to the driver data structure. |
88523a61 SB |
252 | * |
253 | * return value | |
6316668f JA |
254 | * 0 The reset was successful. |
255 | * -1 The HBA Reset bit did not clear. | |
88523a61 | 256 | */ |
d0d096b1 | 257 | static int mtip_hba_reset(struct driver_data *dd) |
88523a61 | 258 | { |
6316668f | 259 | unsigned long timeout; |
88523a61 | 260 | |
6316668f JA |
261 | /* Set the reset bit */ |
262 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
88523a61 | 263 | |
6316668f JA |
264 | /* Flush */ |
265 | readl(dd->mmio + HOST_CTL); | |
88523a61 | 266 | |
d0d096b1 AT |
267 | /* Spin for up to 2 seconds, waiting for reset acknowledgement */ |
268 | timeout = jiffies + msecs_to_jiffies(2000); | |
269 | do { | |
270 | mdelay(10); | |
271 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) | |
272 | return -1; | |
88523a61 | 273 | |
d0d096b1 AT |
274 | } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) |
275 | && time_before(jiffies, timeout)); | |
45038367 | 276 | |
6316668f JA |
277 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) |
278 | return -1; | |
88523a61 | 279 | |
6316668f | 280 | return 0; |
88523a61 SB |
281 | } |
282 | ||
283 | /* | |
6316668f | 284 | * Issue a command to the hardware. |
88523a61 | 285 | * |
6316668f JA |
286 | * Set the appropriate bit in the s_active and Command Issue hardware |
287 | * registers, causing hardware command processing to begin. | |
88523a61 | 288 | * |
6316668f JA |
289 | * @port Pointer to the port structure. |
290 | * @tag The tag of the command to be issued. | |
88523a61 SB |
291 | * |
292 | * return value | |
6316668f | 293 | * None |
88523a61 | 294 | */ |
6316668f | 295 | static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) |
88523a61 | 296 | { |
16c906e5 | 297 | int group = tag >> 5; |
88523a61 | 298 | |
16c906e5 | 299 | atomic_set(&port->commands[tag].active, 1); |
88523a61 | 300 | |
16c906e5 AT |
301 | /* guard SACT and CI registers */ |
302 | spin_lock(&port->cmd_issue_lock[group]); | |
6316668f JA |
303 | writel((1 << MTIP_TAG_BIT(tag)), |
304 | port->s_active[MTIP_TAG_INDEX(tag)]); | |
305 | writel((1 << MTIP_TAG_BIT(tag)), | |
306 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
16c906e5 | 307 | spin_unlock(&port->cmd_issue_lock[group]); |
dad40f16 AT |
308 | |
309 | /* Set the command's timeout value.*/ | |
310 | port->commands[tag].comp_time = jiffies + msecs_to_jiffies( | |
311 | MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
88523a61 SB |
312 | } |
313 | ||
314 | /* | |
315 | * Enable/disable the reception of FIS | |
316 | * | |
317 | * @port Pointer to the port data structure | |
318 | * @enable 1 to enable, 0 to disable | |
319 | * | |
320 | * return value | |
321 | * Previous state: 1 enabled, 0 disabled | |
322 | */ | |
323 | static int mtip_enable_fis(struct mtip_port *port, int enable) | |
324 | { | |
325 | u32 tmp; | |
326 | ||
327 | /* enable FIS reception */ | |
328 | tmp = readl(port->mmio + PORT_CMD); | |
329 | if (enable) | |
330 | writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
331 | else | |
332 | writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
333 | ||
334 | /* Flush */ | |
335 | readl(port->mmio + PORT_CMD); | |
336 | ||
337 | return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); | |
338 | } | |
339 | ||
340 | /* | |
341 | * Enable/disable the DMA engine | |
342 | * | |
343 | * @port Pointer to the port data structure | |
344 | * @enable 1 to enable, 0 to disable | |
345 | * | |
346 | * return value | |
347 | * Previous state: 1 enabled, 0 disabled. | |
348 | */ | |
349 | static int mtip_enable_engine(struct mtip_port *port, int enable) | |
350 | { | |
351 | u32 tmp; | |
352 | ||
353 | /* enable FIS reception */ | |
354 | tmp = readl(port->mmio + PORT_CMD); | |
355 | if (enable) | |
356 | writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); | |
357 | else | |
358 | writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); | |
359 | ||
360 | readl(port->mmio + PORT_CMD); | |
361 | return (((tmp & PORT_CMD_START) == PORT_CMD_START)); | |
362 | } | |
363 | ||
364 | /* | |
365 | * Enables the port DMA engine and FIS reception. | |
366 | * | |
367 | * return value | |
368 | * None | |
369 | */ | |
370 | static inline void mtip_start_port(struct mtip_port *port) | |
371 | { | |
372 | /* Enable FIS reception */ | |
373 | mtip_enable_fis(port, 1); | |
374 | ||
375 | /* Enable the DMA engine */ | |
376 | mtip_enable_engine(port, 1); | |
377 | } | |
378 | ||
379 | /* | |
380 | * Deinitialize a port by disabling port interrupts, the DMA engine, | |
381 | * and FIS reception. | |
382 | * | |
383 | * @port Pointer to the port structure | |
384 | * | |
385 | * return value | |
386 | * None | |
387 | */ | |
388 | static inline void mtip_deinit_port(struct mtip_port *port) | |
389 | { | |
390 | /* Disable interrupts on this port */ | |
391 | writel(0, port->mmio + PORT_IRQ_MASK); | |
392 | ||
393 | /* Disable the DMA engine */ | |
394 | mtip_enable_engine(port, 0); | |
395 | ||
396 | /* Disable FIS reception */ | |
397 | mtip_enable_fis(port, 0); | |
398 | } | |
399 | ||
400 | /* | |
401 | * Initialize a port. | |
402 | * | |
403 | * This function deinitializes the port by calling mtip_deinit_port() and | |
404 | * then initializes it by setting the command header and RX FIS addresses, | |
405 | * clearing the SError register and any pending port interrupts before | |
406 | * re-enabling the default set of port interrupts. | |
407 | * | |
408 | * @port Pointer to the port structure. | |
409 | * | |
410 | * return value | |
411 | * None | |
412 | */ | |
413 | static void mtip_init_port(struct mtip_port *port) | |
414 | { | |
415 | int i; | |
416 | mtip_deinit_port(port); | |
417 | ||
418 | /* Program the command list base and FIS base addresses */ | |
419 | if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { | |
420 | writel((port->command_list_dma >> 16) >> 16, | |
421 | port->mmio + PORT_LST_ADDR_HI); | |
422 | writel((port->rxfis_dma >> 16) >> 16, | |
423 | port->mmio + PORT_FIS_ADDR_HI); | |
424 | } | |
425 | ||
60ec0eec | 426 | writel(port->command_list_dma & 0xFFFFFFFF, |
88523a61 | 427 | port->mmio + PORT_LST_ADDR); |
60ec0eec | 428 | writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); |
88523a61 SB |
429 | |
430 | /* Clear SError */ | |
431 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
432 | ||
6316668f JA |
433 | /* reset the completed registers.*/ |
434 | for (i = 0; i < port->dd->slot_groups; i++) | |
435 | writel(0xFFFFFFFF, port->completed[i]); | |
88523a61 | 436 | |
6316668f | 437 | /* Clear any pending interrupts for this port */ |
6bb688c0 | 438 | writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); |
88523a61 | 439 | |
22be2e6e AT |
440 | /* Clear any pending interrupts on the HBA. */ |
441 | writel(readl(port->dd->mmio + HOST_IRQ_STAT), | |
442 | port->dd->mmio + HOST_IRQ_STAT); | |
443 | ||
6316668f JA |
444 | /* Enable port interrupts */ |
445 | writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); | |
88523a61 SB |
446 | } |
447 | ||
448 | /* | |
449 | * Restart a port | |
450 | * | |
451 | * @port Pointer to the port data structure. | |
452 | * | |
453 | * return value | |
454 | * None | |
455 | */ | |
6316668f | 456 | static void mtip_restart_port(struct mtip_port *port) |
88523a61 SB |
457 | { |
458 | unsigned long timeout; | |
459 | ||
460 | /* Disable the DMA engine */ | |
461 | mtip_enable_engine(port, 0); | |
462 | ||
463 | /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ | |
464 | timeout = jiffies + msecs_to_jiffies(500); | |
465 | while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) | |
466 | && time_before(jiffies, timeout)) | |
467 | ; | |
468 | ||
8a857a88 | 469 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
470 | return; |
471 | ||
88523a61 SB |
472 | /* |
473 | * Chip quirk: escalate to hba reset if | |
474 | * PxCMD.CR not clear after 500 ms | |
475 | */ | |
476 | if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { | |
477 | dev_warn(&port->dd->pdev->dev, | |
478 | "PxCMD.CR not clear, escalating reset\n"); | |
479 | ||
d0d096b1 | 480 | if (mtip_hba_reset(port->dd)) |
88523a61 SB |
481 | dev_err(&port->dd->pdev->dev, |
482 | "HBA reset escalation failed.\n"); | |
483 | ||
484 | /* 30 ms delay before com reset to quiesce chip */ | |
485 | mdelay(30); | |
486 | } | |
487 | ||
488 | dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); | |
489 | ||
490 | /* Set PxSCTL.DET */ | |
491 | writel(readl(port->mmio + PORT_SCR_CTL) | | |
492 | 1, port->mmio + PORT_SCR_CTL); | |
493 | readl(port->mmio + PORT_SCR_CTL); | |
494 | ||
495 | /* Wait 1 ms to quiesce chip function */ | |
496 | timeout = jiffies + msecs_to_jiffies(1); | |
497 | while (time_before(jiffies, timeout)) | |
498 | ; | |
499 | ||
8a857a88 | 500 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
501 | return; |
502 | ||
88523a61 SB |
503 | /* Clear PxSCTL.DET */ |
504 | writel(readl(port->mmio + PORT_SCR_CTL) & ~1, | |
505 | port->mmio + PORT_SCR_CTL); | |
506 | readl(port->mmio + PORT_SCR_CTL); | |
507 | ||
508 | /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ | |
509 | timeout = jiffies + msecs_to_jiffies(500); | |
510 | while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
511 | && time_before(jiffies, timeout)) | |
512 | ; | |
513 | ||
8a857a88 | 514 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
515 | return; |
516 | ||
88523a61 SB |
517 | if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) |
518 | dev_warn(&port->dd->pdev->dev, | |
519 | "COM reset failed\n"); | |
520 | ||
22be2e6e AT |
521 | mtip_init_port(port); |
522 | mtip_start_port(port); | |
88523a61 | 523 | |
88523a61 SB |
524 | } |
525 | ||
d0d096b1 AT |
526 | static int mtip_device_reset(struct driver_data *dd) |
527 | { | |
528 | int rv = 0; | |
529 | ||
530 | if (mtip_check_surprise_removal(dd->pdev)) | |
531 | return 0; | |
532 | ||
533 | if (mtip_hba_reset(dd) < 0) | |
534 | rv = -EFAULT; | |
535 | ||
536 | mdelay(1); | |
537 | mtip_init_port(dd->port); | |
538 | mtip_start_port(dd->port); | |
539 | ||
540 | /* Enable interrupts on the HBA. */ | |
541 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
542 | dd->mmio + HOST_CTL); | |
543 | return rv; | |
544 | } | |
545 | ||
95fea2f1 AT |
546 | /* |
547 | * Helper function for tag logging | |
548 | */ | |
549 | static void print_tags(struct driver_data *dd, | |
550 | char *msg, | |
551 | unsigned long *tagbits, | |
552 | int cnt) | |
553 | { | |
554 | unsigned char tagmap[128]; | |
555 | int group, tagmap_len = 0; | |
556 | ||
557 | memset(tagmap, 0, sizeof(tagmap)); | |
558 | for (group = SLOTBITS_IN_LONGS; group > 0; group--) | |
559 | tagmap_len = sprintf(tagmap + tagmap_len, "%016lX ", | |
560 | tagbits[group-1]); | |
561 | dev_warn(&dd->pdev->dev, | |
562 | "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap); | |
563 | } | |
564 | ||
6316668f JA |
565 | /* |
566 | * Called periodically to see if any read/write commands are | |
567 | * taking too long to complete. | |
568 | * | |
569 | * @data Pointer to the PORT data structure. | |
570 | * | |
571 | * return value | |
572 | * None | |
573 | */ | |
574 | static void mtip_timeout_function(unsigned long int data) | |
575 | { | |
576 | struct mtip_port *port = (struct mtip_port *) data; | |
577 | struct host_to_dev_fis *fis; | |
578 | struct mtip_cmd *command; | |
579 | int tag, cmdto_cnt = 0; | |
580 | unsigned int bit, group; | |
298d8015 | 581 | unsigned int num_command_slots; |
95fea2f1 | 582 | unsigned long to, tagaccum[SLOTBITS_IN_LONGS]; |
6316668f JA |
583 | |
584 | if (unlikely(!port)) | |
585 | return; | |
586 | ||
8a857a88 | 587 | if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) { |
6316668f JA |
588 | mod_timer(&port->cmd_timer, |
589 | jiffies + msecs_to_jiffies(30000)); | |
590 | return; | |
591 | } | |
95fea2f1 AT |
592 | /* clear the tag accumulator */ |
593 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
298d8015 | 594 | num_command_slots = port->dd->slot_groups * 32; |
6316668f JA |
595 | |
596 | for (tag = 0; tag < num_command_slots; tag++) { | |
597 | /* | |
598 | * Skip internal command slot as it has | |
599 | * its own timeout mechanism | |
600 | */ | |
601 | if (tag == MTIP_TAG_INTERNAL) | |
602 | continue; | |
603 | ||
604 | if (atomic_read(&port->commands[tag].active) && | |
605 | (time_after(jiffies, port->commands[tag].comp_time))) { | |
606 | group = tag >> 5; | |
60ec0eec | 607 | bit = tag & 0x1F; |
6316668f JA |
608 | |
609 | command = &port->commands[tag]; | |
610 | fis = (struct host_to_dev_fis *) command->command; | |
611 | ||
95fea2f1 | 612 | set_bit(tag, tagaccum); |
6316668f JA |
613 | cmdto_cnt++; |
614 | if (cmdto_cnt == 1) | |
8a857a88 | 615 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
6316668f JA |
616 | |
617 | /* | |
618 | * Clear the completed bit. This should prevent | |
619 | * any interrupt handlers from trying to retire | |
620 | * the command. | |
621 | */ | |
622 | writel(1 << bit, port->completed[group]); | |
623 | ||
624 | /* Call the async completion callback. */ | |
625 | if (likely(command->async_callback)) | |
626 | command->async_callback(command->async_data, | |
627 | -EIO); | |
628 | command->async_callback = NULL; | |
629 | command->comp_func = NULL; | |
630 | ||
631 | /* Unmap the DMA scatter list entries */ | |
632 | dma_unmap_sg(&port->dd->pdev->dev, | |
633 | command->sg, | |
634 | command->scatter_ents, | |
635 | command->direction); | |
636 | ||
637 | /* | |
638 | * Clear the allocated bit and active tag for the | |
639 | * command. | |
640 | */ | |
641 | atomic_set(&port->commands[tag].active, 0); | |
642 | release_slot(port, tag); | |
643 | ||
644 | up(&port->cmd_slot); | |
645 | } | |
646 | } | |
647 | ||
47cd4b3c | 648 | if (cmdto_cnt) { |
95fea2f1 | 649 | print_tags(port->dd, "timed out", tagaccum, cmdto_cnt); |
47cd4b3c | 650 | if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { |
d0d096b1 | 651 | mtip_device_reset(port->dd); |
47cd4b3c AT |
652 | wake_up_interruptible(&port->svc_wait); |
653 | } | |
8a857a88 | 654 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
6316668f JA |
655 | } |
656 | ||
c74b0f58 AT |
657 | if (port->ic_pause_timer) { |
658 | to = port->ic_pause_timer + msecs_to_jiffies(1000); | |
659 | if (time_after(jiffies, to)) { | |
660 | if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { | |
661 | port->ic_pause_timer = 0; | |
662 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
663 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
664 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); | |
665 | wake_up_interruptible(&port->svc_wait); | |
666 | } | |
667 | ||
668 | ||
669 | } | |
670 | } | |
671 | ||
6316668f JA |
672 | /* Restart the timer */ |
673 | mod_timer(&port->cmd_timer, | |
674 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
675 | } | |
676 | ||
677 | /* | |
678 | * IO completion function. | |
679 | * | |
680 | * This completion function is called by the driver ISR when a | |
681 | * command that was issued by the kernel completes. It first calls the | |
682 | * asynchronous completion function which normally calls back into the block | |
683 | * layer passing the asynchronous callback data, then unmaps the | |
684 | * scatter list associated with the completed command, and finally | |
685 | * clears the allocated bit associated with the completed command. | |
686 | * | |
687 | * @port Pointer to the port data structure. | |
688 | * @tag Tag of the command. | |
689 | * @data Pointer to driver_data. | |
690 | * @status Completion status. | |
691 | * | |
692 | * return value | |
693 | * None | |
694 | */ | |
695 | static void mtip_async_complete(struct mtip_port *port, | |
696 | int tag, | |
697 | void *data, | |
698 | int status) | |
699 | { | |
700 | struct mtip_cmd *command; | |
701 | struct driver_data *dd = data; | |
702 | int cb_status = status ? -EIO : 0; | |
703 | ||
704 | if (unlikely(!dd) || unlikely(!port)) | |
705 | return; | |
706 | ||
707 | command = &port->commands[tag]; | |
708 | ||
709 | if (unlikely(status == PORT_IRQ_TF_ERR)) { | |
710 | dev_warn(&port->dd->pdev->dev, | |
711 | "Command tag %d failed due to TFE\n", tag); | |
712 | } | |
713 | ||
714 | /* Upper layer callback */ | |
715 | if (likely(command->async_callback)) | |
716 | command->async_callback(command->async_data, cb_status); | |
717 | ||
718 | command->async_callback = NULL; | |
719 | command->comp_func = NULL; | |
720 | ||
721 | /* Unmap the DMA scatter list entries */ | |
722 | dma_unmap_sg(&dd->pdev->dev, | |
723 | command->sg, | |
724 | command->scatter_ents, | |
725 | command->direction); | |
726 | ||
727 | /* Clear the allocated and active bits for the command */ | |
728 | atomic_set(&port->commands[tag].active, 0); | |
729 | release_slot(port, tag); | |
730 | ||
2077d947 AT |
731 | if (unlikely(command->unaligned)) |
732 | up(&port->cmd_slot_unal); | |
733 | else | |
734 | up(&port->cmd_slot); | |
6316668f JA |
735 | } |
736 | ||
737 | /* | |
738 | * Internal command completion callback function. | |
739 | * | |
740 | * This function is normally called by the driver ISR when an internal | |
741 | * command completed. This function signals the command completion by | |
742 | * calling complete(). | |
743 | * | |
744 | * @port Pointer to the port data structure. | |
745 | * @tag Tag of the command that has completed. | |
746 | * @data Pointer to a completion structure. | |
747 | * @status Completion status. | |
748 | * | |
749 | * return value | |
750 | * None | |
751 | */ | |
752 | static void mtip_completion(struct mtip_port *port, | |
753 | int tag, | |
754 | void *data, | |
755 | int status) | |
756 | { | |
757 | struct mtip_cmd *command = &port->commands[tag]; | |
758 | struct completion *waiting = data; | |
759 | if (unlikely(status == PORT_IRQ_TF_ERR)) | |
760 | dev_warn(&port->dd->pdev->dev, | |
761 | "Internal command %d completed with TFE\n", tag); | |
762 | ||
763 | command->async_callback = NULL; | |
764 | command->comp_func = NULL; | |
765 | ||
766 | complete(waiting); | |
767 | } | |
768 | ||
8182b495 AT |
769 | static void mtip_null_completion(struct mtip_port *port, |
770 | int tag, | |
771 | void *data, | |
772 | int status) | |
773 | { | |
774 | return; | |
775 | } | |
776 | ||
f6587217 AT |
777 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, |
778 | dma_addr_t buffer_dma, unsigned int sectors); | |
779 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
780 | struct smart_attr *attrib); | |
88523a61 SB |
781 | /* |
782 | * Handle an error. | |
783 | * | |
784 | * @dd Pointer to the DRIVER_DATA structure. | |
785 | * | |
786 | * return value | |
787 | * None | |
788 | */ | |
789 | static void mtip_handle_tfe(struct driver_data *dd) | |
790 | { | |
f6587217 | 791 | int group, tag, bit, reissue, rv; |
88523a61 | 792 | struct mtip_port *port; |
f6587217 | 793 | struct mtip_cmd *cmd; |
88523a61 SB |
794 | u32 completed; |
795 | struct host_to_dev_fis *fis; | |
796 | unsigned long tagaccum[SLOTBITS_IN_LONGS]; | |
95fea2f1 | 797 | unsigned int cmd_cnt = 0; |
f6587217 AT |
798 | unsigned char *buf; |
799 | char *fail_reason = NULL; | |
800 | int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0; | |
88523a61 SB |
801 | |
802 | dev_warn(&dd->pdev->dev, "Taskfile error\n"); | |
803 | ||
804 | port = dd->port; | |
805 | ||
806 | /* Stop the timer to prevent command timeouts. */ | |
807 | del_timer(&port->cmd_timer); | |
d02e1f0a AT |
808 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
809 | ||
810 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && | |
811 | test_bit(MTIP_TAG_INTERNAL, port->allocated)) { | |
812 | cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
813 | dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n"); | |
814 | ||
815 | atomic_inc(&cmd->active); /* active > 1 indicates error */ | |
816 | if (cmd->comp_data && cmd->comp_func) { | |
817 | cmd->comp_func(port, MTIP_TAG_INTERNAL, | |
818 | cmd->comp_data, PORT_IRQ_TF_ERR); | |
819 | } | |
820 | goto handle_tfe_exit; | |
821 | } | |
88523a61 | 822 | |
95fea2f1 AT |
823 | /* clear the tag accumulator */ |
824 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
825 | ||
88523a61 SB |
826 | /* Loop through all the groups */ |
827 | for (group = 0; group < dd->slot_groups; group++) { | |
828 | completed = readl(port->completed[group]); | |
829 | ||
830 | /* clear completed status register in the hardware.*/ | |
831 | writel(completed, port->completed[group]); | |
832 | ||
88523a61 SB |
833 | /* Process successfully completed commands */ |
834 | for (bit = 0; bit < 32 && completed; bit++) { | |
835 | if (!(completed & (1<<bit))) | |
836 | continue; | |
837 | tag = (group << 5) + bit; | |
838 | ||
839 | /* Skip the internal command slot */ | |
840 | if (tag == MTIP_TAG_INTERNAL) | |
841 | continue; | |
842 | ||
f6587217 AT |
843 | cmd = &port->commands[tag]; |
844 | if (likely(cmd->comp_func)) { | |
88523a61 | 845 | set_bit(tag, tagaccum); |
95fea2f1 | 846 | cmd_cnt++; |
f6587217 AT |
847 | atomic_set(&cmd->active, 0); |
848 | cmd->comp_func(port, | |
88523a61 | 849 | tag, |
f6587217 | 850 | cmd->comp_data, |
88523a61 SB |
851 | 0); |
852 | } else { | |
853 | dev_err(&port->dd->pdev->dev, | |
854 | "Missing completion func for tag %d", | |
855 | tag); | |
856 | if (mtip_check_surprise_removal(dd->pdev)) { | |
857 | mtip_command_cleanup(dd); | |
858 | /* don't proceed further */ | |
859 | return; | |
860 | } | |
861 | } | |
862 | } | |
863 | } | |
95fea2f1 AT |
864 | |
865 | print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt); | |
88523a61 SB |
866 | |
867 | /* Restart the port */ | |
868 | mdelay(20); | |
869 | mtip_restart_port(port); | |
870 | ||
f6587217 AT |
871 | /* Trying to determine the cause of the error */ |
872 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
873 | dd->port->log_buf, | |
874 | dd->port->log_buf_dma, 1); | |
875 | if (rv) { | |
876 | dev_warn(&dd->pdev->dev, | |
877 | "Error in READ LOG EXT (10h) command\n"); | |
878 | /* non-critical error, don't fail the load */ | |
879 | } else { | |
880 | buf = (unsigned char *)dd->port->log_buf; | |
881 | if (buf[259] & 0x1) { | |
882 | dev_info(&dd->pdev->dev, | |
883 | "Write protect bit is set.\n"); | |
8a857a88 | 884 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
885 | fail_all_ncq_write = 1; |
886 | fail_reason = "write protect"; | |
887 | } | |
888 | if (buf[288] == 0xF7) { | |
889 | dev_info(&dd->pdev->dev, | |
890 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 891 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
892 | fail_all_ncq_cmds = 1; |
893 | fail_reason = "thermal shutdown"; | |
894 | } | |
895 | if (buf[288] == 0xBF) { | |
896 | dev_info(&dd->pdev->dev, | |
897 | "Drive indicates rebuild has failed.\n"); | |
898 | fail_all_ncq_cmds = 1; | |
899 | fail_reason = "rebuild failed"; | |
900 | } | |
901 | } | |
902 | ||
88523a61 SB |
903 | /* clear the tag accumulator */ |
904 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
905 | ||
906 | /* Loop through all the groups */ | |
907 | for (group = 0; group < dd->slot_groups; group++) { | |
908 | for (bit = 0; bit < 32; bit++) { | |
909 | reissue = 1; | |
910 | tag = (group << 5) + bit; | |
f6587217 | 911 | cmd = &port->commands[tag]; |
88523a61 SB |
912 | |
913 | /* If the active bit is set re-issue the command */ | |
f6587217 | 914 | if (atomic_read(&cmd->active) == 0) |
88523a61 SB |
915 | continue; |
916 | ||
f6587217 | 917 | fis = (struct host_to_dev_fis *)cmd->command; |
88523a61 SB |
918 | |
919 | /* Should re-issue? */ | |
920 | if (tag == MTIP_TAG_INTERNAL || | |
921 | fis->command == ATA_CMD_SET_FEATURES) | |
922 | reissue = 0; | |
f6587217 AT |
923 | else { |
924 | if (fail_all_ncq_cmds || | |
925 | (fail_all_ncq_write && | |
926 | fis->command == ATA_CMD_FPDMA_WRITE)) { | |
927 | dev_warn(&dd->pdev->dev, | |
928 | " Fail: %s w/tag %d [%s].\n", | |
929 | fis->command == ATA_CMD_FPDMA_WRITE ? | |
930 | "write" : "read", | |
931 | tag, | |
932 | fail_reason != NULL ? | |
933 | fail_reason : "unknown"); | |
934 | atomic_set(&cmd->active, 0); | |
935 | if (cmd->comp_func) { | |
936 | cmd->comp_func(port, tag, | |
937 | cmd->comp_data, | |
938 | -ENODATA); | |
939 | } | |
940 | continue; | |
941 | } | |
942 | } | |
88523a61 SB |
943 | |
944 | /* | |
945 | * First check if this command has | |
946 | * exceeded its retries. | |
947 | */ | |
f6587217 | 948 | if (reissue && (cmd->retries-- > 0)) { |
88523a61 SB |
949 | |
950 | set_bit(tag, tagaccum); | |
951 | ||
88523a61 SB |
952 | /* Re-issue the command. */ |
953 | mtip_issue_ncq_command(port, tag); | |
954 | ||
955 | continue; | |
956 | } | |
957 | ||
958 | /* Retire a command that will not be reissued */ | |
959 | dev_warn(&port->dd->pdev->dev, | |
960 | "retiring tag %d\n", tag); | |
f6587217 | 961 | atomic_set(&cmd->active, 0); |
88523a61 | 962 | |
f6587217 AT |
963 | if (cmd->comp_func) |
964 | cmd->comp_func( | |
88523a61 SB |
965 | port, |
966 | tag, | |
f6587217 | 967 | cmd->comp_data, |
88523a61 SB |
968 | PORT_IRQ_TF_ERR); |
969 | else | |
970 | dev_warn(&port->dd->pdev->dev, | |
971 | "Bad completion for tag %d\n", | |
972 | tag); | |
973 | } | |
974 | } | |
95fea2f1 | 975 | print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt); |
88523a61 | 976 | |
d02e1f0a | 977 | handle_tfe_exit: |
60ec0eec | 978 | /* clear eh_active */ |
8a857a88 | 979 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
60ec0eec | 980 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
981 | |
982 | mod_timer(&port->cmd_timer, | |
983 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
984 | } | |
985 | ||
986 | /* | |
987 | * Handle a set device bits interrupt | |
988 | */ | |
16c906e5 AT |
989 | static inline void mtip_workq_sdbfx(struct mtip_port *port, int group, |
990 | u32 completed) | |
88523a61 | 991 | { |
16c906e5 AT |
992 | struct driver_data *dd = port->dd; |
993 | int tag, bit; | |
88523a61 SB |
994 | struct mtip_cmd *command; |
995 | ||
16c906e5 AT |
996 | if (!completed) { |
997 | WARN_ON_ONCE(!completed); | |
998 | return; | |
999 | } | |
1000 | /* clear completed status register in the hardware.*/ | |
1001 | writel(completed, port->completed[group]); | |
88523a61 | 1002 | |
16c906e5 AT |
1003 | /* Process completed commands. */ |
1004 | for (bit = 0; (bit < 32) && completed; bit++) { | |
1005 | if (completed & 0x01) { | |
1006 | tag = (group << 5) | bit; | |
88523a61 | 1007 | |
16c906e5 AT |
1008 | /* skip internal command slot. */ |
1009 | if (unlikely(tag == MTIP_TAG_INTERNAL)) | |
1010 | continue; | |
88523a61 | 1011 | |
16c906e5 AT |
1012 | command = &port->commands[tag]; |
1013 | /* make internal callback */ | |
1014 | if (likely(command->comp_func)) { | |
1015 | command->comp_func( | |
1016 | port, | |
1017 | tag, | |
1018 | command->comp_data, | |
1019 | 0); | |
1020 | } else { | |
1021 | dev_warn(&dd->pdev->dev, | |
1022 | "Null completion " | |
1023 | "for tag %d", | |
1024 | tag); | |
88523a61 | 1025 | |
16c906e5 AT |
1026 | if (mtip_check_surprise_removal( |
1027 | dd->pdev)) { | |
1028 | mtip_command_cleanup(dd); | |
1029 | return; | |
88523a61 SB |
1030 | } |
1031 | } | |
1032 | } | |
16c906e5 | 1033 | completed >>= 1; |
88523a61 | 1034 | } |
16c906e5 AT |
1035 | |
1036 | /* If last, re-enable interrupts */ | |
1037 | if (atomic_dec_return(&dd->irq_workers_active) == 0) | |
1038 | writel(0xffffffff, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
1039 | } |
1040 | ||
1041 | /* | |
1042 | * Process legacy pio and d2h interrupts | |
1043 | */ | |
1044 | static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) | |
1045 | { | |
1046 | struct mtip_port *port = dd->port; | |
1047 | struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
1048 | ||
8a857a88 | 1049 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && |
60ec0eec | 1050 | (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 SB |
1051 | & (1 << MTIP_TAG_INTERNAL))) { |
1052 | if (cmd->comp_func) { | |
1053 | cmd->comp_func(port, | |
1054 | MTIP_TAG_INTERNAL, | |
1055 | cmd->comp_data, | |
1056 | 0); | |
1057 | return; | |
1058 | } | |
1059 | } | |
1060 | ||
88523a61 SB |
1061 | return; |
1062 | } | |
1063 | ||
1064 | /* | |
1065 | * Demux and handle errors | |
1066 | */ | |
1067 | static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) | |
1068 | { | |
1069 | if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) | |
1070 | mtip_handle_tfe(dd); | |
1071 | ||
1072 | if (unlikely(port_stat & PORT_IRQ_CONNECT)) { | |
1073 | dev_warn(&dd->pdev->dev, | |
1074 | "Clearing PxSERR.DIAG.x\n"); | |
1075 | writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); | |
1076 | } | |
1077 | ||
1078 | if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { | |
1079 | dev_warn(&dd->pdev->dev, | |
1080 | "Clearing PxSERR.DIAG.n\n"); | |
1081 | writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); | |
1082 | } | |
1083 | ||
1084 | if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { | |
1085 | dev_warn(&dd->pdev->dev, | |
1086 | "Port stat errors %x unhandled\n", | |
1087 | (port_stat & ~PORT_IRQ_HANDLED)); | |
1088 | } | |
1089 | } | |
1090 | ||
1091 | static inline irqreturn_t mtip_handle_irq(struct driver_data *data) | |
1092 | { | |
1093 | struct driver_data *dd = (struct driver_data *) data; | |
1094 | struct mtip_port *port = dd->port; | |
1095 | u32 hba_stat, port_stat; | |
1096 | int rv = IRQ_NONE; | |
16c906e5 AT |
1097 | int do_irq_enable = 1, i, workers; |
1098 | struct mtip_work *twork; | |
88523a61 SB |
1099 | |
1100 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
1101 | if (hba_stat) { | |
1102 | rv = IRQ_HANDLED; | |
1103 | ||
1104 | /* Acknowledge the interrupt status on the port.*/ | |
1105 | port_stat = readl(port->mmio + PORT_IRQ_STAT); | |
1106 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
1107 | ||
1108 | /* Demux port status */ | |
16c906e5 AT |
1109 | if (likely(port_stat & PORT_IRQ_SDB_FIS)) { |
1110 | do_irq_enable = 0; | |
1111 | WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0); | |
1112 | ||
1113 | /* Start at 1: group zero is always local? */ | |
1114 | for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS; | |
1115 | i++) { | |
1116 | twork = &dd->work[i]; | |
1117 | twork->completed = readl(port->completed[i]); | |
1118 | if (twork->completed) | |
1119 | workers++; | |
1120 | } | |
1121 | ||
1122 | atomic_set(&dd->irq_workers_active, workers); | |
1123 | if (workers) { | |
1124 | for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
1125 | twork = &dd->work[i]; | |
1126 | if (twork->completed) | |
1127 | queue_work_on( | |
1128 | twork->cpu_binding, | |
1129 | dd->isr_workq, | |
1130 | &twork->work); | |
1131 | } | |
1132 | ||
1133 | if (likely(dd->work[0].completed)) | |
1134 | mtip_workq_sdbfx(port, 0, | |
1135 | dd->work[0].completed); | |
1136 | ||
1137 | } else { | |
1138 | /* | |
1139 | * Chip quirk: SDB interrupt but nothing | |
1140 | * to complete | |
1141 | */ | |
1142 | do_irq_enable = 1; | |
1143 | } | |
1144 | } | |
88523a61 SB |
1145 | |
1146 | if (unlikely(port_stat & PORT_IRQ_ERR)) { | |
1147 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
1148 | mtip_command_cleanup(dd); | |
1149 | /* don't proceed further */ | |
1150 | return IRQ_HANDLED; | |
1151 | } | |
8a857a88 | 1152 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
1153 | &dd->dd_flag)) |
1154 | return rv; | |
88523a61 SB |
1155 | |
1156 | mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); | |
1157 | } | |
1158 | ||
1159 | if (unlikely(port_stat & PORT_IRQ_LEGACY)) | |
1160 | mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); | |
1161 | } | |
1162 | ||
1163 | /* acknowledge interrupt */ | |
16c906e5 AT |
1164 | if (unlikely(do_irq_enable)) |
1165 | writel(hba_stat, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
1166 | |
1167 | return rv; | |
1168 | } | |
1169 | ||
88523a61 SB |
1170 | /* |
1171 | * HBA interrupt subroutine. | |
1172 | * | |
1173 | * @irq IRQ number. | |
1174 | * @instance Pointer to the driver data structure. | |
1175 | * | |
1176 | * return value | |
1177 | * IRQ_HANDLED A HBA interrupt was pending and handled. | |
1178 | * IRQ_NONE This interrupt was not for the HBA. | |
1179 | */ | |
1180 | static irqreturn_t mtip_irq_handler(int irq, void *instance) | |
1181 | { | |
1182 | struct driver_data *dd = instance; | |
16c906e5 AT |
1183 | |
1184 | return mtip_handle_irq(dd); | |
88523a61 SB |
1185 | } |
1186 | ||
1187 | static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) | |
1188 | { | |
1189 | atomic_set(&port->commands[tag].active, 1); | |
1190 | writel(1 << MTIP_TAG_BIT(tag), | |
1191 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
1192 | } | |
1193 | ||
c74b0f58 AT |
1194 | static bool mtip_pause_ncq(struct mtip_port *port, |
1195 | struct host_to_dev_fis *fis) | |
1196 | { | |
1197 | struct host_to_dev_fis *reply; | |
1198 | unsigned long task_file_data; | |
1199 | ||
1200 | reply = port->rxfis + RX_FIS_D2H_REG; | |
1201 | task_file_data = readl(port->mmio+PORT_TFDATA); | |
1202 | ||
12a166c9 AT |
1203 | if (fis->command == ATA_CMD_SEC_ERASE_UNIT) |
1204 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1205 | ||
1206 | if ((task_file_data & 1)) | |
c74b0f58 AT |
1207 | return false; |
1208 | ||
1209 | if (fis->command == ATA_CMD_SEC_ERASE_PREP) { | |
1210 | set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
12a166c9 | 1211 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); |
c74b0f58 AT |
1212 | port->ic_pause_timer = jiffies; |
1213 | return true; | |
1214 | } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) && | |
1215 | (fis->features == 0x03)) { | |
1216 | set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
1217 | port->ic_pause_timer = jiffies; | |
1218 | return true; | |
1219 | } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) || | |
1220 | ((fis->command == 0xFC) && | |
1221 | (fis->features == 0x27 || fis->features == 0x72 || | |
1222 | fis->features == 0x62 || fis->features == 0x26))) { | |
1223 | /* Com reset after secure erase or lowlevel format */ | |
1224 | mtip_restart_port(port); | |
1225 | return false; | |
1226 | } | |
1227 | ||
1228 | return false; | |
1229 | } | |
1230 | ||
88523a61 SB |
1231 | /* |
1232 | * Wait for port to quiesce | |
1233 | * | |
1234 | * @port Pointer to port data structure | |
1235 | * @timeout Max duration to wait (ms) | |
1236 | * | |
1237 | * return value | |
1238 | * 0 Success | |
1239 | * -EBUSY Commands still active | |
1240 | */ | |
1241 | static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) | |
1242 | { | |
1243 | unsigned long to; | |
3e54a3d1 DC |
1244 | unsigned int n; |
1245 | unsigned int active = 1; | |
88523a61 SB |
1246 | |
1247 | to = jiffies + msecs_to_jiffies(timeout); | |
1248 | do { | |
8a857a88 AT |
1249 | if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) && |
1250 | test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { | |
60ec0eec AT |
1251 | msleep(20); |
1252 | continue; /* svc thd is actively issuing commands */ | |
1253 | } | |
8a857a88 | 1254 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 | 1255 | return -EFAULT; |
88523a61 SB |
1256 | /* |
1257 | * Ignore s_active bit 0 of array element 0. | |
1258 | * This bit will always be set | |
1259 | */ | |
60ec0eec | 1260 | active = readl(port->s_active[0]) & 0xFFFFFFFE; |
88523a61 SB |
1261 | for (n = 1; n < port->dd->slot_groups; n++) |
1262 | active |= readl(port->s_active[n]); | |
1263 | ||
1264 | if (!active) | |
1265 | break; | |
1266 | ||
1267 | msleep(20); | |
1268 | } while (time_before(jiffies, to)); | |
1269 | ||
1270 | return active ? -EBUSY : 0; | |
1271 | } | |
1272 | ||
1273 | /* | |
1274 | * Execute an internal command and wait for the completion. | |
1275 | * | |
1276 | * @port Pointer to the port data structure. | |
1277 | * @fis Pointer to the FIS that describes the command. | |
60ec0eec | 1278 | * @fis_len Length in WORDS of the FIS. |
88523a61 | 1279 | * @buffer DMA accessible for command data. |
60ec0eec | 1280 | * @buf_len Length, in bytes, of the data buffer. |
88523a61 SB |
1281 | * @opts Command header options, excluding the FIS length |
1282 | * and the number of PRD entries. | |
1283 | * @timeout Time in ms to wait for the command to complete. | |
1284 | * | |
1285 | * return value | |
1286 | * 0 Command completed successfully. | |
1287 | * -EFAULT The buffer address is not correctly aligned. | |
1288 | * -EBUSY Internal command or other IO in progress. | |
1289 | * -EAGAIN Time out waiting for command to complete. | |
1290 | */ | |
1291 | static int mtip_exec_internal_command(struct mtip_port *port, | |
8182b495 | 1292 | struct host_to_dev_fis *fis, |
60ec0eec | 1293 | int fis_len, |
88523a61 | 1294 | dma_addr_t buffer, |
60ec0eec | 1295 | int buf_len, |
88523a61 SB |
1296 | u32 opts, |
1297 | gfp_t atomic, | |
1298 | unsigned long timeout) | |
1299 | { | |
1300 | struct mtip_cmd_sg *command_sg; | |
1301 | DECLARE_COMPLETION_ONSTACK(wait); | |
c74b0f58 | 1302 | int rv = 0, ready2go = 1; |
88523a61 | 1303 | struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL]; |
c74b0f58 | 1304 | unsigned long to; |
d0d096b1 | 1305 | struct driver_data *dd = port->dd; |
88523a61 SB |
1306 | |
1307 | /* Make sure the buffer is 8 byte aligned. This is asic specific. */ | |
1308 | if (buffer & 0x00000007) { | |
d0d096b1 | 1309 | dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n"); |
88523a61 SB |
1310 | return -EFAULT; |
1311 | } | |
1312 | ||
c74b0f58 AT |
1313 | to = jiffies + msecs_to_jiffies(timeout); |
1314 | do { | |
1315 | ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL, | |
1316 | port->allocated); | |
1317 | if (ready2go) | |
1318 | break; | |
1319 | mdelay(100); | |
1320 | } while (time_before(jiffies, to)); | |
1321 | if (!ready2go) { | |
d0d096b1 | 1322 | dev_warn(&dd->pdev->dev, |
c74b0f58 | 1323 | "Internal cmd active. new cmd [%02X]\n", fis->command); |
88523a61 SB |
1324 | return -EBUSY; |
1325 | } | |
8a857a88 | 1326 | set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
c74b0f58 AT |
1327 | port->ic_pause_timer = 0; |
1328 | ||
d0d096b1 AT |
1329 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); |
1330 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
88523a61 SB |
1331 | |
1332 | if (atomic == GFP_KERNEL) { | |
8182b495 AT |
1333 | if (fis->command != ATA_CMD_STANDBYNOW1) { |
1334 | /* wait for io to complete if non atomic */ | |
1335 | if (mtip_quiesce_io(port, 5000) < 0) { | |
d0d096b1 | 1336 | dev_warn(&dd->pdev->dev, |
8182b495 AT |
1337 | "Failed to quiesce IO\n"); |
1338 | release_slot(port, MTIP_TAG_INTERNAL); | |
8a857a88 | 1339 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
8182b495 AT |
1340 | wake_up_interruptible(&port->svc_wait); |
1341 | return -EBUSY; | |
1342 | } | |
88523a61 SB |
1343 | } |
1344 | ||
1345 | /* Set the completion function and data for the command. */ | |
1346 | int_cmd->comp_data = &wait; | |
1347 | int_cmd->comp_func = mtip_completion; | |
1348 | ||
1349 | } else { | |
1350 | /* Clear completion - we're going to poll */ | |
1351 | int_cmd->comp_data = NULL; | |
8182b495 | 1352 | int_cmd->comp_func = mtip_null_completion; |
88523a61 SB |
1353 | } |
1354 | ||
1355 | /* Copy the command to the command table */ | |
60ec0eec | 1356 | memcpy(int_cmd->command, fis, fis_len*4); |
88523a61 SB |
1357 | |
1358 | /* Populate the SG list */ | |
1359 | int_cmd->command_header->opts = | |
60ec0eec AT |
1360 | __force_bit2int cpu_to_le32(opts | fis_len); |
1361 | if (buf_len) { | |
88523a61 SB |
1362 | command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ; |
1363 | ||
60ec0eec AT |
1364 | command_sg->info = |
1365 | __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF); | |
1366 | command_sg->dba = | |
1367 | __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF); | |
1368 | command_sg->dba_upper = | |
1369 | __force_bit2int cpu_to_le32((buffer >> 16) >> 16); | |
88523a61 | 1370 | |
60ec0eec AT |
1371 | int_cmd->command_header->opts |= |
1372 | __force_bit2int cpu_to_le32((1 << 16)); | |
88523a61 SB |
1373 | } |
1374 | ||
1375 | /* Populate the command header */ | |
1376 | int_cmd->command_header->byte_count = 0; | |
1377 | ||
1378 | /* Issue the command to the hardware */ | |
1379 | mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL); | |
1380 | ||
88523a61 SB |
1381 | if (atomic == GFP_KERNEL) { |
1382 | /* Wait for the command to complete or timeout. */ | |
d0d096b1 | 1383 | if (wait_for_completion_interruptible_timeout( |
88523a61 | 1384 | &wait, |
d0d096b1 AT |
1385 | msecs_to_jiffies(timeout)) <= 0) { |
1386 | if (rv == -ERESTARTSYS) { /* interrupted */ | |
1387 | dev_err(&dd->pdev->dev, | |
1388 | "Internal command [%02X] was interrupted after %lu ms\n", | |
1389 | fis->command, timeout); | |
1390 | rv = -EINTR; | |
1391 | goto exec_ic_exit; | |
1392 | } else if (rv == 0) /* timeout */ | |
1393 | dev_err(&dd->pdev->dev, | |
1394 | "Internal command did not complete [%02X] within timeout of %lu ms\n", | |
1395 | fis->command, timeout); | |
1396 | else | |
1397 | dev_err(&dd->pdev->dev, | |
1398 | "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n", | |
1399 | fis->command, rv, timeout); | |
1400 | ||
1401 | if (mtip_check_surprise_removal(dd->pdev) || | |
8a857a88 | 1402 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
d0d096b1 AT |
1403 | &dd->dd_flag)) { |
1404 | dev_err(&dd->pdev->dev, | |
1405 | "Internal command [%02X] wait returned due to SR\n", | |
1406 | fis->command); | |
45038367 AT |
1407 | rv = -ENXIO; |
1408 | goto exec_ic_exit; | |
1409 | } | |
d0d096b1 | 1410 | mtip_device_reset(dd); /* recover from timeout issue */ |
88523a61 | 1411 | rv = -EAGAIN; |
d0d096b1 | 1412 | goto exec_ic_exit; |
88523a61 | 1413 | } |
88523a61 | 1414 | } else { |
d0d096b1 AT |
1415 | u32 hba_stat, port_stat; |
1416 | ||
88523a61 SB |
1417 | /* Spin for <timeout> checking if command still outstanding */ |
1418 | timeout = jiffies + msecs_to_jiffies(timeout); | |
8182b495 AT |
1419 | while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
1420 | & (1 << MTIP_TAG_INTERNAL)) | |
1421 | && time_before(jiffies, timeout)) { | |
d0d096b1 | 1422 | if (mtip_check_surprise_removal(dd->pdev)) { |
8182b495 AT |
1423 | rv = -ENXIO; |
1424 | goto exec_ic_exit; | |
1425 | } | |
1426 | if ((fis->command != ATA_CMD_STANDBYNOW1) && | |
8a857a88 | 1427 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
d0d096b1 | 1428 | &dd->dd_flag)) { |
45038367 AT |
1429 | rv = -ENXIO; |
1430 | goto exec_ic_exit; | |
1431 | } | |
d0d096b1 AT |
1432 | port_stat = readl(port->mmio + PORT_IRQ_STAT); |
1433 | if (!port_stat) | |
1434 | continue; | |
1435 | ||
1436 | if (port_stat & PORT_IRQ_ERR) { | |
1437 | dev_err(&dd->pdev->dev, | |
1438 | "Internal command [%02X] failed\n", | |
1439 | fis->command); | |
1440 | mtip_device_reset(dd); | |
1441 | rv = -EIO; | |
1442 | goto exec_ic_exit; | |
1443 | } else { | |
1444 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
1445 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
1446 | if (hba_stat) | |
1447 | writel(hba_stat, | |
1448 | dd->mmio + HOST_IRQ_STAT); | |
d02e1f0a | 1449 | } |
d0d096b1 | 1450 | break; |
45038367 | 1451 | } |
d02e1f0a | 1452 | } |
88523a61 | 1453 | |
d02e1f0a | 1454 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 | 1455 | & (1 << MTIP_TAG_INTERNAL)) { |
d02e1f0a | 1456 | rv = -ENXIO; |
d0d096b1 AT |
1457 | if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
1458 | mtip_device_reset(dd); | |
88523a61 SB |
1459 | rv = -EAGAIN; |
1460 | } | |
1461 | } | |
45038367 | 1462 | exec_ic_exit: |
88523a61 SB |
1463 | /* Clear the allocated and active bits for the internal command. */ |
1464 | atomic_set(&int_cmd->active, 0); | |
1465 | release_slot(port, MTIP_TAG_INTERNAL); | |
c74b0f58 AT |
1466 | if (rv >= 0 && mtip_pause_ncq(port, fis)) { |
1467 | /* NCQ paused */ | |
1468 | return rv; | |
1469 | } | |
8a857a88 | 1470 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
60ec0eec | 1471 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
1472 | |
1473 | return rv; | |
1474 | } | |
1475 | ||
1476 | /* | |
1477 | * Byte-swap ATA ID strings. | |
1478 | * | |
1479 | * ATA identify data contains strings in byte-swapped 16-bit words. | |
1480 | * They must be swapped (on all architectures) to be usable as C strings. | |
1481 | * This function swaps bytes in-place. | |
1482 | * | |
1483 | * @buf The buffer location of the string | |
1484 | * @len The number of bytes to swap | |
1485 | * | |
1486 | * return value | |
1487 | * None | |
1488 | */ | |
1489 | static inline void ata_swap_string(u16 *buf, unsigned int len) | |
1490 | { | |
1491 | int i; | |
1492 | for (i = 0; i < (len/2); i++) | |
1493 | be16_to_cpus(&buf[i]); | |
1494 | } | |
1495 | ||
1496 | /* | |
1497 | * Request the device identity information. | |
1498 | * | |
1499 | * If a user space buffer is not specified, i.e. is NULL, the | |
1500 | * identify information is still read from the drive and placed | |
1501 | * into the identify data buffer (@e port->identify) in the | |
1502 | * port data structure. | |
1503 | * When the identify buffer contains valid identify information @e | |
1504 | * port->identify_valid is non-zero. | |
1505 | * | |
1506 | * @port Pointer to the port structure. | |
1507 | * @user_buffer A user space buffer where the identify data should be | |
1508 | * copied. | |
1509 | * | |
1510 | * return value | |
1511 | * 0 Command completed successfully. | |
1512 | * -EFAULT An error occurred while coping data to the user buffer. | |
1513 | * -1 Command failed. | |
1514 | */ | |
1515 | static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) | |
1516 | { | |
1517 | int rv = 0; | |
1518 | struct host_to_dev_fis fis; | |
1519 | ||
8a857a88 | 1520 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
1521 | return -EFAULT; |
1522 | ||
88523a61 SB |
1523 | /* Build the FIS. */ |
1524 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1525 | fis.type = 0x27; | |
1526 | fis.opts = 1 << 7; | |
1527 | fis.command = ATA_CMD_ID_ATA; | |
1528 | ||
1529 | /* Set the identify information as invalid. */ | |
1530 | port->identify_valid = 0; | |
1531 | ||
1532 | /* Clear the identify information. */ | |
1533 | memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); | |
1534 | ||
1535 | /* Execute the command. */ | |
1536 | if (mtip_exec_internal_command(port, | |
1537 | &fis, | |
1538 | 5, | |
1539 | port->identify_dma, | |
1540 | sizeof(u16) * ATA_ID_WORDS, | |
1541 | 0, | |
1542 | GFP_KERNEL, | |
1543 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS) | |
1544 | < 0) { | |
1545 | rv = -1; | |
1546 | goto out; | |
1547 | } | |
1548 | ||
1549 | /* | |
1550 | * Perform any necessary byte-swapping. Yes, the kernel does in fact | |
1551 | * perform field-sensitive swapping on the string fields. | |
1552 | * See the kernel use of ata_id_string() for proof of this. | |
1553 | */ | |
1554 | #ifdef __LITTLE_ENDIAN | |
1555 | ata_swap_string(port->identify + 27, 40); /* model string*/ | |
1556 | ata_swap_string(port->identify + 23, 8); /* firmware string*/ | |
1557 | ata_swap_string(port->identify + 10, 20); /* serial# string*/ | |
1558 | #else | |
1559 | { | |
1560 | int i; | |
1561 | for (i = 0; i < ATA_ID_WORDS; i++) | |
1562 | port->identify[i] = le16_to_cpu(port->identify[i]); | |
1563 | } | |
1564 | #endif | |
1565 | ||
68466cbf | 1566 | #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */ |
15283469 AT |
1567 | /* Demux ID.DRAT & ID.RZAT to determine trim support */ |
1568 | if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5)) | |
1569 | port->dd->trim_supp = true; | |
1570 | else | |
68466cbf | 1571 | #endif |
15283469 AT |
1572 | port->dd->trim_supp = false; |
1573 | ||
88523a61 SB |
1574 | /* Set the identify buffer as valid. */ |
1575 | port->identify_valid = 1; | |
1576 | ||
1577 | if (user_buffer) { | |
1578 | if (copy_to_user( | |
1579 | user_buffer, | |
1580 | port->identify, | |
1581 | ATA_ID_WORDS * sizeof(u16))) { | |
1582 | rv = -EFAULT; | |
1583 | goto out; | |
1584 | } | |
1585 | } | |
1586 | ||
1587 | out: | |
88523a61 SB |
1588 | return rv; |
1589 | } | |
1590 | ||
1591 | /* | |
1592 | * Issue a standby immediate command to the device. | |
1593 | * | |
1594 | * @port Pointer to the port structure. | |
1595 | * | |
1596 | * return value | |
1597 | * 0 Command was executed successfully. | |
1598 | * -1 An error occurred while executing the command. | |
1599 | */ | |
1600 | static int mtip_standby_immediate(struct mtip_port *port) | |
1601 | { | |
1602 | int rv; | |
1603 | struct host_to_dev_fis fis; | |
f6587217 | 1604 | unsigned long start; |
88523a61 | 1605 | |
88523a61 SB |
1606 | /* Build the FIS. */ |
1607 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1608 | fis.type = 0x27; | |
1609 | fis.opts = 1 << 7; | |
1610 | fis.command = ATA_CMD_STANDBYNOW1; | |
1611 | ||
f6587217 | 1612 | start = jiffies; |
88523a61 SB |
1613 | rv = mtip_exec_internal_command(port, |
1614 | &fis, | |
1615 | 5, | |
1616 | 0, | |
1617 | 0, | |
1618 | 0, | |
f6587217 AT |
1619 | GFP_ATOMIC, |
1620 | 15000); | |
1621 | dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n", | |
1622 | jiffies_to_msecs(jiffies - start)); | |
1623 | if (rv) | |
1624 | dev_warn(&port->dd->pdev->dev, | |
1625 | "STANDBY IMMEDIATE command failed.\n"); | |
1626 | ||
1627 | return rv; | |
1628 | } | |
1629 | ||
1630 | /* | |
1631 | * Issue a READ LOG EXT command to the device. | |
1632 | * | |
1633 | * @port pointer to the port structure. | |
1634 | * @page page number to fetch | |
1635 | * @buffer pointer to buffer | |
1636 | * @buffer_dma dma address corresponding to @buffer | |
1637 | * @sectors page length to fetch, in sectors | |
1638 | * | |
1639 | * return value | |
1640 | * @rv return value from mtip_exec_internal_command() | |
1641 | */ | |
1642 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, | |
1643 | dma_addr_t buffer_dma, unsigned int sectors) | |
1644 | { | |
1645 | struct host_to_dev_fis fis; | |
1646 | ||
1647 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1648 | fis.type = 0x27; | |
1649 | fis.opts = 1 << 7; | |
1650 | fis.command = ATA_CMD_READ_LOG_EXT; | |
1651 | fis.sect_count = sectors & 0xFF; | |
1652 | fis.sect_cnt_ex = (sectors >> 8) & 0xFF; | |
1653 | fis.lba_low = page; | |
1654 | fis.lba_mid = 0; | |
1655 | fis.device = ATA_DEVICE_OBS; | |
1656 | ||
1657 | memset(buffer, 0, sectors * ATA_SECT_SIZE); | |
1658 | ||
1659 | return mtip_exec_internal_command(port, | |
1660 | &fis, | |
1661 | 5, | |
1662 | buffer_dma, | |
1663 | sectors * ATA_SECT_SIZE, | |
1664 | 0, | |
1665 | GFP_ATOMIC, | |
1666 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS); | |
1667 | } | |
1668 | ||
1669 | /* | |
1670 | * Issue a SMART READ DATA command to the device. | |
1671 | * | |
1672 | * @port pointer to the port structure. | |
1673 | * @buffer pointer to buffer | |
1674 | * @buffer_dma dma address corresponding to @buffer | |
1675 | * | |
1676 | * return value | |
1677 | * @rv return value from mtip_exec_internal_command() | |
1678 | */ | |
1679 | static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer, | |
1680 | dma_addr_t buffer_dma) | |
1681 | { | |
1682 | struct host_to_dev_fis fis; | |
1683 | ||
1684 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1685 | fis.type = 0x27; | |
1686 | fis.opts = 1 << 7; | |
1687 | fis.command = ATA_CMD_SMART; | |
1688 | fis.features = 0xD0; | |
1689 | fis.sect_count = 1; | |
1690 | fis.lba_mid = 0x4F; | |
1691 | fis.lba_hi = 0xC2; | |
1692 | fis.device = ATA_DEVICE_OBS; | |
1693 | ||
1694 | return mtip_exec_internal_command(port, | |
1695 | &fis, | |
1696 | 5, | |
1697 | buffer_dma, | |
1698 | ATA_SECT_SIZE, | |
1699 | 0, | |
1700 | GFP_ATOMIC, | |
88523a61 | 1701 | 15000); |
f6587217 AT |
1702 | } |
1703 | ||
1704 | /* | |
1705 | * Get the value of a smart attribute | |
1706 | * | |
1707 | * @port pointer to the port structure | |
1708 | * @id attribute number | |
1709 | * @attrib pointer to return attrib information corresponding to @id | |
1710 | * | |
1711 | * return value | |
1712 | * -EINVAL NULL buffer passed or unsupported attribute @id. | |
1713 | * -EPERM Identify data not valid, SMART not supported or not enabled | |
1714 | */ | |
1715 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
1716 | struct smart_attr *attrib) | |
1717 | { | |
1718 | int rv, i; | |
1719 | struct smart_attr *pattr; | |
1720 | ||
1721 | if (!attrib) | |
1722 | return -EINVAL; | |
1723 | ||
1724 | if (!port->identify_valid) { | |
1725 | dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n"); | |
1726 | return -EPERM; | |
1727 | } | |
1728 | if (!(port->identify[82] & 0x1)) { | |
1729 | dev_warn(&port->dd->pdev->dev, "SMART not supported\n"); | |
1730 | return -EPERM; | |
1731 | } | |
1732 | if (!(port->identify[85] & 0x1)) { | |
1733 | dev_warn(&port->dd->pdev->dev, "SMART not enabled\n"); | |
1734 | return -EPERM; | |
1735 | } | |
1736 | ||
1737 | memset(port->smart_buf, 0, ATA_SECT_SIZE); | |
1738 | rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma); | |
1739 | if (rv) { | |
1740 | dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n"); | |
1741 | return rv; | |
1742 | } | |
1743 | ||
1744 | pattr = (struct smart_attr *)(port->smart_buf + 2); | |
1745 | for (i = 0; i < 29; i++, pattr++) | |
1746 | if (pattr->attr_id == id) { | |
1747 | memcpy(attrib, pattr, sizeof(struct smart_attr)); | |
1748 | break; | |
1749 | } | |
1750 | ||
1751 | if (i == 29) { | |
1752 | dev_warn(&port->dd->pdev->dev, | |
1753 | "Query for invalid SMART attribute ID\n"); | |
1754 | rv = -EINVAL; | |
1755 | } | |
88523a61 | 1756 | |
88523a61 SB |
1757 | return rv; |
1758 | } | |
1759 | ||
15283469 AT |
1760 | /* |
1761 | * Trim unused sectors | |
1762 | * | |
1763 | * @dd pointer to driver_data structure | |
1764 | * @lba starting lba | |
1765 | * @len # of 512b sectors to trim | |
1766 | * | |
1767 | * return value | |
1768 | * -ENOMEM Out of dma memory | |
1769 | * -EINVAL Invalid parameters passed in, trim not supported | |
1770 | * -EIO Error submitting trim request to hw | |
1771 | */ | |
d0d096b1 AT |
1772 | static int mtip_send_trim(struct driver_data *dd, unsigned int lba, |
1773 | unsigned int len) | |
15283469 AT |
1774 | { |
1775 | int i, rv = 0; | |
1776 | u64 tlba, tlen, sect_left; | |
1777 | struct mtip_trim_entry *buf; | |
1778 | dma_addr_t dma_addr; | |
1779 | struct host_to_dev_fis fis; | |
1780 | ||
1781 | if (!len || dd->trim_supp == false) | |
1782 | return -EINVAL; | |
1783 | ||
1784 | /* Trim request too big */ | |
1785 | WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES)); | |
1786 | ||
1787 | /* Trim request not aligned on 4k boundary */ | |
1788 | WARN_ON(len % 8 != 0); | |
1789 | ||
1790 | /* Warn if vu_trim structure is too big */ | |
1791 | WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE); | |
1792 | ||
1793 | /* Allocate a DMA buffer for the trim structure */ | |
1794 | buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr, | |
1795 | GFP_KERNEL); | |
1796 | if (!buf) | |
1797 | return -ENOMEM; | |
1798 | memset(buf, 0, ATA_SECT_SIZE); | |
1799 | ||
1800 | for (i = 0, sect_left = len, tlba = lba; | |
1801 | i < MTIP_MAX_TRIM_ENTRIES && sect_left; | |
1802 | i++) { | |
1803 | tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ? | |
1804 | MTIP_MAX_TRIM_ENTRY_LEN : | |
1805 | sect_left); | |
1806 | buf[i].lba = __force_bit2int cpu_to_le32(tlba); | |
1807 | buf[i].range = __force_bit2int cpu_to_le16(tlen); | |
1808 | tlba += tlen; | |
1809 | sect_left -= tlen; | |
1810 | } | |
1811 | WARN_ON(sect_left != 0); | |
1812 | ||
1813 | /* Build the fis */ | |
1814 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1815 | fis.type = 0x27; | |
1816 | fis.opts = 1 << 7; | |
1817 | fis.command = 0xfb; | |
1818 | fis.features = 0x60; | |
1819 | fis.sect_count = 1; | |
1820 | fis.device = ATA_DEVICE_OBS; | |
1821 | ||
1822 | if (mtip_exec_internal_command(dd->port, | |
1823 | &fis, | |
1824 | 5, | |
1825 | dma_addr, | |
1826 | ATA_SECT_SIZE, | |
1827 | 0, | |
1828 | GFP_KERNEL, | |
1829 | MTIP_TRIM_TIMEOUT_MS) < 0) | |
1830 | rv = -EIO; | |
1831 | ||
1832 | dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr); | |
1833 | return rv; | |
1834 | } | |
1835 | ||
88523a61 SB |
1836 | /* |
1837 | * Get the drive capacity. | |
1838 | * | |
1839 | * @dd Pointer to the device data structure. | |
1840 | * @sectors Pointer to the variable that will receive the sector count. | |
1841 | * | |
1842 | * return value | |
1843 | * 1 Capacity was returned successfully. | |
1844 | * 0 The identify information is invalid. | |
1845 | */ | |
6316668f | 1846 | static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) |
88523a61 SB |
1847 | { |
1848 | struct mtip_port *port = dd->port; | |
1849 | u64 total, raw0, raw1, raw2, raw3; | |
1850 | raw0 = port->identify[100]; | |
1851 | raw1 = port->identify[101]; | |
1852 | raw2 = port->identify[102]; | |
1853 | raw3 = port->identify[103]; | |
1854 | total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; | |
1855 | *sectors = total; | |
1856 | return (bool) !!port->identify_valid; | |
1857 | } | |
1858 | ||
88523a61 SB |
1859 | /* |
1860 | * Display the identify command data. | |
1861 | * | |
1862 | * @port Pointer to the port data structure. | |
1863 | * | |
1864 | * return value | |
1865 | * None | |
1866 | */ | |
1867 | static void mtip_dump_identify(struct mtip_port *port) | |
1868 | { | |
1869 | sector_t sectors; | |
1870 | unsigned short revid; | |
1871 | char cbuf[42]; | |
1872 | ||
1873 | if (!port->identify_valid) | |
1874 | return; | |
1875 | ||
1876 | strlcpy(cbuf, (char *)(port->identify+10), 21); | |
1877 | dev_info(&port->dd->pdev->dev, | |
1878 | "Serial No.: %s\n", cbuf); | |
1879 | ||
1880 | strlcpy(cbuf, (char *)(port->identify+23), 9); | |
1881 | dev_info(&port->dd->pdev->dev, | |
1882 | "Firmware Ver.: %s\n", cbuf); | |
1883 | ||
1884 | strlcpy(cbuf, (char *)(port->identify+27), 41); | |
1885 | dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); | |
1886 | ||
1887 | if (mtip_hw_get_capacity(port->dd, §ors)) | |
1888 | dev_info(&port->dd->pdev->dev, | |
1889 | "Capacity: %llu sectors (%llu MB)\n", | |
1890 | (u64)sectors, | |
1891 | ((u64)sectors) * ATA_SECT_SIZE >> 20); | |
1892 | ||
1893 | pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); | |
60ec0eec | 1894 | switch (revid & 0xFF) { |
88523a61 SB |
1895 | case 0x1: |
1896 | strlcpy(cbuf, "A0", 3); | |
1897 | break; | |
1898 | case 0x3: | |
1899 | strlcpy(cbuf, "A2", 3); | |
1900 | break; | |
1901 | default: | |
1902 | strlcpy(cbuf, "?", 2); | |
1903 | break; | |
1904 | } | |
1905 | dev_info(&port->dd->pdev->dev, | |
1906 | "Card Type: %s\n", cbuf); | |
1907 | } | |
1908 | ||
1909 | /* | |
1910 | * Map the commands scatter list into the command table. | |
1911 | * | |
1912 | * @command Pointer to the command. | |
1913 | * @nents Number of scatter list entries. | |
1914 | * | |
1915 | * return value | |
1916 | * None | |
1917 | */ | |
1918 | static inline void fill_command_sg(struct driver_data *dd, | |
1919 | struct mtip_cmd *command, | |
1920 | int nents) | |
1921 | { | |
1922 | int n; | |
1923 | unsigned int dma_len; | |
1924 | struct mtip_cmd_sg *command_sg; | |
1925 | struct scatterlist *sg = command->sg; | |
1926 | ||
1927 | command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; | |
1928 | ||
1929 | for (n = 0; n < nents; n++) { | |
1930 | dma_len = sg_dma_len(sg); | |
1931 | if (dma_len > 0x400000) | |
1932 | dev_err(&dd->pdev->dev, | |
1933 | "DMA segment length truncated\n"); | |
60ec0eec AT |
1934 | command_sg->info = __force_bit2int |
1935 | cpu_to_le32((dma_len-1) & 0x3FFFFF); | |
1936 | command_sg->dba = __force_bit2int | |
1937 | cpu_to_le32(sg_dma_address(sg)); | |
1938 | command_sg->dba_upper = __force_bit2int | |
1939 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); | |
88523a61 SB |
1940 | command_sg++; |
1941 | sg++; | |
1942 | } | |
1943 | } | |
1944 | ||
1945 | /* | |
1946 | * @brief Execute a drive command. | |
1947 | * | |
1948 | * return value 0 The command completed successfully. | |
1949 | * return value -1 An error occurred while executing the command. | |
1950 | */ | |
6316668f | 1951 | static int exec_drive_task(struct mtip_port *port, u8 *command) |
88523a61 SB |
1952 | { |
1953 | struct host_to_dev_fis fis; | |
1954 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
1955 | ||
88523a61 SB |
1956 | /* Build the FIS. */ |
1957 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1958 | fis.type = 0x27; | |
1959 | fis.opts = 1 << 7; | |
1960 | fis.command = command[0]; | |
1961 | fis.features = command[1]; | |
1962 | fis.sect_count = command[2]; | |
1963 | fis.sector = command[3]; | |
1964 | fis.cyl_low = command[4]; | |
1965 | fis.cyl_hi = command[5]; | |
1966 | fis.device = command[6] & ~0x10; /* Clear the dev bit*/ | |
1967 | ||
c74b0f58 | 1968 | dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n", |
88523a61 SB |
1969 | __func__, |
1970 | command[0], | |
1971 | command[1], | |
1972 | command[2], | |
1973 | command[3], | |
1974 | command[4], | |
1975 | command[5], | |
1976 | command[6]); | |
1977 | ||
1978 | /* Execute the command. */ | |
1979 | if (mtip_exec_internal_command(port, | |
1980 | &fis, | |
1981 | 5, | |
1982 | 0, | |
1983 | 0, | |
1984 | 0, | |
1985 | GFP_KERNEL, | |
1986 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) { | |
88523a61 SB |
1987 | return -1; |
1988 | } | |
1989 | ||
1990 | command[0] = reply->command; /* Status*/ | |
1991 | command[1] = reply->features; /* Error*/ | |
1992 | command[4] = reply->cyl_low; | |
1993 | command[5] = reply->cyl_hi; | |
1994 | ||
c74b0f58 | 1995 | dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n", |
88523a61 SB |
1996 | __func__, |
1997 | command[0], | |
1998 | command[1], | |
1999 | command[4], | |
2000 | command[5]); | |
2001 | ||
88523a61 SB |
2002 | return 0; |
2003 | } | |
2004 | ||
2005 | /* | |
2006 | * @brief Execute a drive command. | |
2007 | * | |
2008 | * @param port Pointer to the port data structure. | |
2009 | * @param command Pointer to the user specified command parameters. | |
2010 | * @param user_buffer Pointer to the user space buffer where read sector | |
2011 | * data should be copied. | |
2012 | * | |
2013 | * return value 0 The command completed successfully. | |
2014 | * return value -EFAULT An error occurred while copying the completion | |
2015 | * data to the user space buffer. | |
2016 | * return value -1 An error occurred while executing the command. | |
2017 | */ | |
6316668f JA |
2018 | static int exec_drive_command(struct mtip_port *port, u8 *command, |
2019 | void __user *user_buffer) | |
88523a61 SB |
2020 | { |
2021 | struct host_to_dev_fis fis; | |
e602878f AT |
2022 | struct host_to_dev_fis *reply; |
2023 | u8 *buf = NULL; | |
2024 | dma_addr_t dma_addr = 0; | |
2025 | int rv = 0, xfer_sz = command[3]; | |
2026 | ||
2027 | if (xfer_sz) { | |
97651ea6 | 2028 | if (!user_buffer) |
e602878f AT |
2029 | return -EFAULT; |
2030 | ||
2031 | buf = dmam_alloc_coherent(&port->dd->pdev->dev, | |
2032 | ATA_SECT_SIZE * xfer_sz, | |
2033 | &dma_addr, | |
2034 | GFP_KERNEL); | |
2035 | if (!buf) { | |
2036 | dev_err(&port->dd->pdev->dev, | |
2037 | "Memory allocation failed (%d bytes)\n", | |
2038 | ATA_SECT_SIZE * xfer_sz); | |
2039 | return -ENOMEM; | |
2040 | } | |
2041 | memset(buf, 0, ATA_SECT_SIZE * xfer_sz); | |
2042 | } | |
88523a61 | 2043 | |
88523a61 SB |
2044 | /* Build the FIS. */ |
2045 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
e602878f AT |
2046 | fis.type = 0x27; |
2047 | fis.opts = 1 << 7; | |
2048 | fis.command = command[0]; | |
88523a61 SB |
2049 | fis.features = command[2]; |
2050 | fis.sect_count = command[3]; | |
2051 | if (fis.command == ATA_CMD_SMART) { | |
2052 | fis.sector = command[1]; | |
60ec0eec AT |
2053 | fis.cyl_low = 0x4F; |
2054 | fis.cyl_hi = 0xC2; | |
88523a61 SB |
2055 | } |
2056 | ||
e602878f AT |
2057 | if (xfer_sz) |
2058 | reply = (port->rxfis + RX_FIS_PIO_SETUP); | |
2059 | else | |
2060 | reply = (port->rxfis + RX_FIS_D2H_REG); | |
2061 | ||
88523a61 | 2062 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 2063 | " %s: User Command: cmd %x, sect %x, " |
88523a61 SB |
2064 | "feat %x, sectcnt %x\n", |
2065 | __func__, | |
2066 | command[0], | |
2067 | command[1], | |
2068 | command[2], | |
2069 | command[3]); | |
2070 | ||
88523a61 SB |
2071 | /* Execute the command. */ |
2072 | if (mtip_exec_internal_command(port, | |
2073 | &fis, | |
2074 | 5, | |
e602878f AT |
2075 | (xfer_sz ? dma_addr : 0), |
2076 | (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0), | |
88523a61 SB |
2077 | 0, |
2078 | GFP_KERNEL, | |
2079 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) | |
2080 | < 0) { | |
e602878f AT |
2081 | rv = -EFAULT; |
2082 | goto exit_drive_command; | |
88523a61 SB |
2083 | } |
2084 | ||
2085 | /* Collect the completion status. */ | |
2086 | command[0] = reply->command; /* Status*/ | |
2087 | command[1] = reply->features; /* Error*/ | |
e602878f | 2088 | command[2] = reply->sect_count; |
88523a61 SB |
2089 | |
2090 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2091 | " %s: Completion Status: stat %x, " |
e602878f | 2092 | "err %x, nsect %x\n", |
88523a61 SB |
2093 | __func__, |
2094 | command[0], | |
2095 | command[1], | |
2096 | command[2]); | |
2097 | ||
e602878f | 2098 | if (xfer_sz) { |
88523a61 | 2099 | if (copy_to_user(user_buffer, |
e602878f | 2100 | buf, |
88523a61 | 2101 | ATA_SECT_SIZE * command[3])) { |
e602878f AT |
2102 | rv = -EFAULT; |
2103 | goto exit_drive_command; | |
88523a61 SB |
2104 | } |
2105 | } | |
e602878f AT |
2106 | exit_drive_command: |
2107 | if (buf) | |
2108 | dmam_free_coherent(&port->dd->pdev->dev, | |
2109 | ATA_SECT_SIZE * xfer_sz, buf, dma_addr); | |
2110 | return rv; | |
88523a61 SB |
2111 | } |
2112 | ||
2113 | /* | |
2114 | * Indicates whether a command has a single sector payload. | |
2115 | * | |
2116 | * @command passed to the device to perform the certain event. | |
2117 | * @features passed to the device to perform the certain event. | |
2118 | * | |
2119 | * return value | |
2120 | * 1 command is one that always has a single sector payload, | |
2121 | * regardless of the value in the Sector Count field. | |
2122 | * 0 otherwise | |
2123 | * | |
2124 | */ | |
2125 | static unsigned int implicit_sector(unsigned char command, | |
2126 | unsigned char features) | |
2127 | { | |
2128 | unsigned int rv = 0; | |
2129 | ||
2130 | /* list of commands that have an implicit sector count of 1 */ | |
2131 | switch (command) { | |
60ec0eec AT |
2132 | case ATA_CMD_SEC_SET_PASS: |
2133 | case ATA_CMD_SEC_UNLOCK: | |
2134 | case ATA_CMD_SEC_ERASE_PREP: | |
2135 | case ATA_CMD_SEC_ERASE_UNIT: | |
2136 | case ATA_CMD_SEC_FREEZE_LOCK: | |
2137 | case ATA_CMD_SEC_DISABLE_PASS: | |
2138 | case ATA_CMD_PMP_READ: | |
2139 | case ATA_CMD_PMP_WRITE: | |
88523a61 SB |
2140 | rv = 1; |
2141 | break; | |
60ec0eec AT |
2142 | case ATA_CMD_SET_MAX: |
2143 | if (features == ATA_SET_MAX_UNLOCK) | |
88523a61 SB |
2144 | rv = 1; |
2145 | break; | |
60ec0eec AT |
2146 | case ATA_CMD_SMART: |
2147 | if ((features == ATA_SMART_READ_VALUES) || | |
2148 | (features == ATA_SMART_READ_THRESHOLDS)) | |
88523a61 SB |
2149 | rv = 1; |
2150 | break; | |
60ec0eec AT |
2151 | case ATA_CMD_CONF_OVERLAY: |
2152 | if ((features == ATA_DCO_IDENTIFY) || | |
2153 | (features == ATA_DCO_SET)) | |
88523a61 SB |
2154 | rv = 1; |
2155 | break; | |
2156 | } | |
2157 | return rv; | |
2158 | } | |
4453bc88 SM |
2159 | static void mtip_set_timeout(struct driver_data *dd, |
2160 | struct host_to_dev_fis *fis, | |
2161 | unsigned int *timeout, u8 erasemode) | |
2df7aa96 AT |
2162 | { |
2163 | switch (fis->command) { | |
2164 | case ATA_CMD_DOWNLOAD_MICRO: | |
2165 | *timeout = 120000; /* 2 minutes */ | |
2166 | break; | |
2167 | case ATA_CMD_SEC_ERASE_UNIT: | |
2168 | case 0xFC: | |
4453bc88 SM |
2169 | if (erasemode) |
2170 | *timeout = ((*(dd->port->identify + 90) * 2) * 60000); | |
2171 | else | |
2172 | *timeout = ((*(dd->port->identify + 89) * 2) * 60000); | |
2df7aa96 AT |
2173 | break; |
2174 | case ATA_CMD_STANDBYNOW1: | |
d7c8b945 | 2175 | *timeout = 120000; /* 2 minutes */ |
2df7aa96 AT |
2176 | break; |
2177 | case 0xF7: | |
2178 | case 0xFA: | |
2179 | *timeout = 60000; /* 60 seconds */ | |
2180 | break; | |
2181 | case ATA_CMD_SMART: | |
2182 | *timeout = 15000; /* 15 seconds */ | |
2183 | break; | |
2184 | default: | |
2185 | *timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS; | |
2186 | break; | |
2187 | } | |
2188 | } | |
2189 | ||
88523a61 SB |
2190 | /* |
2191 | * Executes a taskfile | |
2192 | * See ide_taskfile_ioctl() for derivation | |
2193 | */ | |
2194 | static int exec_drive_taskfile(struct driver_data *dd, | |
ef0f1587 JA |
2195 | void __user *buf, |
2196 | ide_task_request_t *req_task, | |
2197 | int outtotal) | |
88523a61 SB |
2198 | { |
2199 | struct host_to_dev_fis fis; | |
2200 | struct host_to_dev_fis *reply; | |
88523a61 SB |
2201 | u8 *outbuf = NULL; |
2202 | u8 *inbuf = NULL; | |
16d02c04 JA |
2203 | dma_addr_t outbuf_dma = 0; |
2204 | dma_addr_t inbuf_dma = 0; | |
2205 | dma_addr_t dma_buffer = 0; | |
88523a61 | 2206 | int err = 0; |
88523a61 SB |
2207 | unsigned int taskin = 0; |
2208 | unsigned int taskout = 0; | |
2209 | u8 nsect = 0; | |
2df7aa96 | 2210 | unsigned int timeout; |
88523a61 SB |
2211 | unsigned int force_single_sector; |
2212 | unsigned int transfer_size; | |
2213 | unsigned long task_file_data; | |
ef0f1587 | 2214 | int intotal = outtotal + req_task->out_size; |
4453bc88 | 2215 | int erasemode = 0; |
88523a61 SB |
2216 | |
2217 | taskout = req_task->out_size; | |
2218 | taskin = req_task->in_size; | |
2219 | /* 130560 = 512 * 0xFF*/ | |
2220 | if (taskin > 130560 || taskout > 130560) { | |
2221 | err = -EINVAL; | |
2222 | goto abort; | |
2223 | } | |
2224 | ||
2225 | if (taskout) { | |
2226 | outbuf = kzalloc(taskout, GFP_KERNEL); | |
2227 | if (outbuf == NULL) { | |
2228 | err = -ENOMEM; | |
2229 | goto abort; | |
2230 | } | |
2231 | if (copy_from_user(outbuf, buf + outtotal, taskout)) { | |
2232 | err = -EFAULT; | |
2233 | goto abort; | |
2234 | } | |
2235 | outbuf_dma = pci_map_single(dd->pdev, | |
2236 | outbuf, | |
2237 | taskout, | |
2238 | DMA_TO_DEVICE); | |
16d02c04 | 2239 | if (outbuf_dma == 0) { |
88523a61 SB |
2240 | err = -ENOMEM; |
2241 | goto abort; | |
2242 | } | |
2243 | dma_buffer = outbuf_dma; | |
2244 | } | |
2245 | ||
2246 | if (taskin) { | |
2247 | inbuf = kzalloc(taskin, GFP_KERNEL); | |
2248 | if (inbuf == NULL) { | |
2249 | err = -ENOMEM; | |
2250 | goto abort; | |
2251 | } | |
2252 | ||
2253 | if (copy_from_user(inbuf, buf + intotal, taskin)) { | |
2254 | err = -EFAULT; | |
2255 | goto abort; | |
2256 | } | |
2257 | inbuf_dma = pci_map_single(dd->pdev, | |
2258 | inbuf, | |
2259 | taskin, DMA_FROM_DEVICE); | |
16d02c04 | 2260 | if (inbuf_dma == 0) { |
88523a61 SB |
2261 | err = -ENOMEM; |
2262 | goto abort; | |
2263 | } | |
2264 | dma_buffer = inbuf_dma; | |
2265 | } | |
2266 | ||
2267 | /* only supports PIO and non-data commands from this ioctl. */ | |
2268 | switch (req_task->data_phase) { | |
2269 | case TASKFILE_OUT: | |
2270 | nsect = taskout / ATA_SECT_SIZE; | |
2271 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2272 | break; | |
2273 | case TASKFILE_IN: | |
2274 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2275 | break; | |
2276 | case TASKFILE_NO_DATA: | |
2277 | reply = (dd->port->rxfis + RX_FIS_D2H_REG); | |
2278 | break; | |
2279 | default: | |
2280 | err = -EINVAL; | |
2281 | goto abort; | |
2282 | } | |
2283 | ||
88523a61 SB |
2284 | /* Build the FIS. */ |
2285 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
2286 | ||
2287 | fis.type = 0x27; | |
2288 | fis.opts = 1 << 7; | |
2289 | fis.command = req_task->io_ports[7]; | |
2290 | fis.features = req_task->io_ports[1]; | |
2291 | fis.sect_count = req_task->io_ports[2]; | |
2292 | fis.lba_low = req_task->io_ports[3]; | |
2293 | fis.lba_mid = req_task->io_ports[4]; | |
2294 | fis.lba_hi = req_task->io_ports[5]; | |
2295 | /* Clear the dev bit*/ | |
2296 | fis.device = req_task->io_ports[6] & ~0x10; | |
2297 | ||
2298 | if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { | |
2299 | req_task->in_flags.all = | |
2300 | IDE_TASKFILE_STD_IN_FLAGS | | |
2301 | (IDE_HOB_STD_IN_FLAGS << 8); | |
2302 | fis.lba_low_ex = req_task->hob_ports[3]; | |
2303 | fis.lba_mid_ex = req_task->hob_ports[4]; | |
2304 | fis.lba_hi_ex = req_task->hob_ports[5]; | |
2305 | fis.features_ex = req_task->hob_ports[1]; | |
2306 | fis.sect_cnt_ex = req_task->hob_ports[2]; | |
2307 | ||
2308 | } else { | |
2309 | req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; | |
2310 | } | |
2311 | ||
2312 | force_single_sector = implicit_sector(fis.command, fis.features); | |
2313 | ||
2314 | if ((taskin || taskout) && (!fis.sect_count)) { | |
2315 | if (nsect) | |
2316 | fis.sect_count = nsect; | |
2317 | else { | |
2318 | if (!force_single_sector) { | |
2319 | dev_warn(&dd->pdev->dev, | |
2320 | "data movement but " | |
2321 | "sect_count is 0\n"); | |
88523a61 SB |
2322 | err = -EINVAL; |
2323 | goto abort; | |
2324 | } | |
2325 | } | |
2326 | } | |
2327 | ||
2328 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2329 | " %s: cmd %x, feat %x, nsect %x," |
88523a61 SB |
2330 | " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," |
2331 | " head/dev %x\n", | |
c74b0f58 | 2332 | __func__, |
88523a61 SB |
2333 | fis.command, |
2334 | fis.features, | |
2335 | fis.sect_count, | |
2336 | fis.lba_low, | |
2337 | fis.lba_mid, | |
2338 | fis.lba_hi, | |
2339 | fis.device); | |
2340 | ||
4453bc88 | 2341 | /* check for erase mode support during secure erase.*/ |
3208795e SM |
2342 | if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf && |
2343 | (outbuf[0] & MTIP_SEC_ERASE_MODE)) { | |
4453bc88 SM |
2344 | erasemode = 1; |
2345 | } | |
2346 | ||
2347 | mtip_set_timeout(dd, &fis, &timeout, erasemode); | |
88523a61 SB |
2348 | |
2349 | /* Determine the correct transfer size.*/ | |
2350 | if (force_single_sector) | |
2351 | transfer_size = ATA_SECT_SIZE; | |
2352 | else | |
2353 | transfer_size = ATA_SECT_SIZE * fis.sect_count; | |
2354 | ||
2355 | /* Execute the command.*/ | |
2356 | if (mtip_exec_internal_command(dd->port, | |
2357 | &fis, | |
2358 | 5, | |
2359 | dma_buffer, | |
2360 | transfer_size, | |
2361 | 0, | |
2362 | GFP_KERNEL, | |
2363 | timeout) < 0) { | |
88523a61 SB |
2364 | err = -EIO; |
2365 | goto abort; | |
2366 | } | |
2367 | ||
2368 | task_file_data = readl(dd->port->mmio+PORT_TFDATA); | |
2369 | ||
2370 | if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { | |
2371 | reply = dd->port->rxfis + RX_FIS_PIO_SETUP; | |
2372 | req_task->io_ports[7] = reply->control; | |
2373 | } else { | |
2374 | reply = dd->port->rxfis + RX_FIS_D2H_REG; | |
2375 | req_task->io_ports[7] = reply->command; | |
2376 | } | |
2377 | ||
2378 | /* reclaim the DMA buffers.*/ | |
2379 | if (inbuf_dma) | |
2380 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2381 | taskin, DMA_FROM_DEVICE); | |
2382 | if (outbuf_dma) | |
2383 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2384 | taskout, DMA_TO_DEVICE); | |
16d02c04 JA |
2385 | inbuf_dma = 0; |
2386 | outbuf_dma = 0; | |
88523a61 SB |
2387 | |
2388 | /* return the ATA registers to the caller.*/ | |
2389 | req_task->io_ports[1] = reply->features; | |
2390 | req_task->io_ports[2] = reply->sect_count; | |
2391 | req_task->io_ports[3] = reply->lba_low; | |
2392 | req_task->io_ports[4] = reply->lba_mid; | |
2393 | req_task->io_ports[5] = reply->lba_hi; | |
2394 | req_task->io_ports[6] = reply->device; | |
2395 | ||
2396 | if (req_task->out_flags.all & 1) { | |
2397 | ||
2398 | req_task->hob_ports[3] = reply->lba_low_ex; | |
2399 | req_task->hob_ports[4] = reply->lba_mid_ex; | |
2400 | req_task->hob_ports[5] = reply->lba_hi_ex; | |
2401 | req_task->hob_ports[1] = reply->features_ex; | |
2402 | req_task->hob_ports[2] = reply->sect_cnt_ex; | |
2403 | } | |
88523a61 | 2404 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 2405 | " %s: Completion: stat %x," |
88523a61 SB |
2406 | "err %x, sect_cnt %x, lbalo %x," |
2407 | "lbamid %x, lbahi %x, dev %x\n", | |
2408 | __func__, | |
2409 | req_task->io_ports[7], | |
2410 | req_task->io_ports[1], | |
2411 | req_task->io_ports[2], | |
2412 | req_task->io_ports[3], | |
2413 | req_task->io_ports[4], | |
2414 | req_task->io_ports[5], | |
2415 | req_task->io_ports[6]); | |
2416 | ||
88523a61 SB |
2417 | if (taskout) { |
2418 | if (copy_to_user(buf + outtotal, outbuf, taskout)) { | |
2419 | err = -EFAULT; | |
2420 | goto abort; | |
2421 | } | |
2422 | } | |
2423 | if (taskin) { | |
2424 | if (copy_to_user(buf + intotal, inbuf, taskin)) { | |
2425 | err = -EFAULT; | |
2426 | goto abort; | |
2427 | } | |
2428 | } | |
2429 | abort: | |
2430 | if (inbuf_dma) | |
2431 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2432 | taskin, DMA_FROM_DEVICE); | |
2433 | if (outbuf_dma) | |
2434 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2435 | taskout, DMA_TO_DEVICE); | |
88523a61 SB |
2436 | kfree(outbuf); |
2437 | kfree(inbuf); | |
2438 | ||
2439 | return err; | |
2440 | } | |
2441 | ||
2442 | /* | |
2443 | * Handle IOCTL calls from the Block Layer. | |
2444 | * | |
2445 | * This function is called by the Block Layer when it receives an IOCTL | |
2446 | * command that it does not understand. If the IOCTL command is not supported | |
2447 | * this function returns -ENOTTY. | |
2448 | * | |
2449 | * @dd Pointer to the driver data structure. | |
2450 | * @cmd IOCTL command passed from the Block Layer. | |
2451 | * @arg IOCTL argument passed from the Block Layer. | |
2452 | * | |
2453 | * return value | |
2454 | * 0 The IOCTL completed successfully. | |
2455 | * -ENOTTY The specified command is not supported. | |
2456 | * -EFAULT An error occurred copying data to a user space buffer. | |
2457 | * -EIO An error occurred while executing the command. | |
2458 | */ | |
ef0f1587 JA |
2459 | static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, |
2460 | unsigned long arg) | |
88523a61 SB |
2461 | { |
2462 | switch (cmd) { | |
2463 | case HDIO_GET_IDENTITY: | |
971890f2 AT |
2464 | { |
2465 | if (copy_to_user((void __user *)arg, dd->port->identify, | |
2466 | sizeof(u16) * ATA_ID_WORDS)) | |
2467 | return -EFAULT; | |
88523a61 | 2468 | break; |
971890f2 | 2469 | } |
88523a61 SB |
2470 | case HDIO_DRIVE_CMD: |
2471 | { | |
2472 | u8 drive_command[4]; | |
2473 | ||
2474 | /* Copy the user command info to our buffer. */ | |
2475 | if (copy_from_user(drive_command, | |
2476 | (void __user *) arg, | |
2477 | sizeof(drive_command))) | |
2478 | return -EFAULT; | |
2479 | ||
2480 | /* Execute the drive command. */ | |
2481 | if (exec_drive_command(dd->port, | |
2482 | drive_command, | |
2483 | (void __user *) (arg+4))) | |
2484 | return -EIO; | |
2485 | ||
2486 | /* Copy the status back to the users buffer. */ | |
2487 | if (copy_to_user((void __user *) arg, | |
2488 | drive_command, | |
2489 | sizeof(drive_command))) | |
2490 | return -EFAULT; | |
2491 | ||
2492 | break; | |
2493 | } | |
2494 | case HDIO_DRIVE_TASK: | |
2495 | { | |
2496 | u8 drive_command[7]; | |
2497 | ||
2498 | /* Copy the user command info to our buffer. */ | |
2499 | if (copy_from_user(drive_command, | |
2500 | (void __user *) arg, | |
2501 | sizeof(drive_command))) | |
2502 | return -EFAULT; | |
2503 | ||
2504 | /* Execute the drive command. */ | |
2505 | if (exec_drive_task(dd->port, drive_command)) | |
2506 | return -EIO; | |
2507 | ||
2508 | /* Copy the status back to the users buffer. */ | |
2509 | if (copy_to_user((void __user *) arg, | |
2510 | drive_command, | |
2511 | sizeof(drive_command))) | |
2512 | return -EFAULT; | |
2513 | ||
2514 | break; | |
2515 | } | |
ef0f1587 JA |
2516 | case HDIO_DRIVE_TASKFILE: { |
2517 | ide_task_request_t req_task; | |
2518 | int ret, outtotal; | |
2519 | ||
2520 | if (copy_from_user(&req_task, (void __user *) arg, | |
2521 | sizeof(req_task))) | |
2522 | return -EFAULT; | |
2523 | ||
2524 | outtotal = sizeof(req_task); | |
2525 | ||
2526 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2527 | &req_task, outtotal); | |
2528 | ||
60ec0eec AT |
2529 | if (copy_to_user((void __user *) arg, &req_task, |
2530 | sizeof(req_task))) | |
ef0f1587 JA |
2531 | return -EFAULT; |
2532 | ||
2533 | return ret; | |
2534 | } | |
88523a61 SB |
2535 | |
2536 | default: | |
2537 | return -EINVAL; | |
2538 | } | |
2539 | return 0; | |
2540 | } | |
2541 | ||
2542 | /* | |
2543 | * Submit an IO to the hw | |
2544 | * | |
2545 | * This function is called by the block layer to issue an io | |
2546 | * to the device. Upon completion, the callback function will | |
2547 | * be called with the data parameter passed as the callback data. | |
2548 | * | |
2549 | * @dd Pointer to the driver data structure. | |
2550 | * @start First sector to read. | |
2551 | * @nsect Number of sectors to read. | |
2552 | * @nents Number of entries in scatter list for the read command. | |
2553 | * @tag The tag of this read command. | |
2554 | * @callback Pointer to the function that should be called | |
2555 | * when the read completes. | |
2556 | * @data Callback data passed to the callback function | |
2557 | * when the read completes. | |
88523a61 SB |
2558 | * @dir Direction (read or write) |
2559 | * | |
2560 | * return value | |
2561 | * None | |
2562 | */ | |
7c5d6238 | 2563 | static void mtip_hw_submit_io(struct driver_data *dd, sector_t sector, |
6316668f | 2564 | int nsect, int nents, int tag, void *callback, |
2077d947 | 2565 | void *data, int dir, int unaligned) |
88523a61 SB |
2566 | { |
2567 | struct host_to_dev_fis *fis; | |
2568 | struct mtip_port *port = dd->port; | |
2569 | struct mtip_cmd *command = &port->commands[tag]; | |
45038367 | 2570 | int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
7c5d6238 | 2571 | u64 start = sector; |
88523a61 SB |
2572 | |
2573 | /* Map the scatter list for DMA access */ | |
45038367 | 2574 | nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir); |
88523a61 SB |
2575 | |
2576 | command->scatter_ents = nents; | |
2577 | ||
2077d947 | 2578 | command->unaligned = unaligned; |
88523a61 SB |
2579 | /* |
2580 | * The number of retries for this command before it is | |
2581 | * reported as a failure to the upper layers. | |
2582 | */ | |
2583 | command->retries = MTIP_MAX_RETRIES; | |
2584 | ||
2585 | /* Fill out fis */ | |
2586 | fis = command->command; | |
2587 | fis->type = 0x27; | |
2588 | fis->opts = 1 << 7; | |
2589 | fis->command = | |
2590 | (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE); | |
eda45314 SM |
2591 | fis->lba_low = start & 0xFF; |
2592 | fis->lba_mid = (start >> 8) & 0xFF; | |
2593 | fis->lba_hi = (start >> 16) & 0xFF; | |
2594 | fis->lba_low_ex = (start >> 24) & 0xFF; | |
2595 | fis->lba_mid_ex = (start >> 32) & 0xFF; | |
2596 | fis->lba_hi_ex = (start >> 40) & 0xFF; | |
88523a61 | 2597 | fis->device = 1 << 6; |
60ec0eec AT |
2598 | fis->features = nsect & 0xFF; |
2599 | fis->features_ex = (nsect >> 8) & 0xFF; | |
88523a61 SB |
2600 | fis->sect_count = ((tag << 3) | (tag >> 5)); |
2601 | fis->sect_cnt_ex = 0; | |
2602 | fis->control = 0; | |
2603 | fis->res2 = 0; | |
2604 | fis->res3 = 0; | |
2605 | fill_command_sg(dd, command, nents); | |
2606 | ||
2077d947 AT |
2607 | if (unaligned) |
2608 | fis->device |= 1 << 7; | |
2609 | ||
88523a61 | 2610 | /* Populate the command header */ |
60ec0eec AT |
2611 | command->command_header->opts = |
2612 | __force_bit2int cpu_to_le32( | |
2613 | (nents << 16) | 5 | AHCI_CMD_PREFETCH); | |
88523a61 SB |
2614 | command->command_header->byte_count = 0; |
2615 | ||
2616 | /* | |
2617 | * Set the completion function and data for the command | |
2618 | * within this layer. | |
2619 | */ | |
2620 | command->comp_data = dd; | |
2621 | command->comp_func = mtip_async_complete; | |
45038367 | 2622 | command->direction = dma_dir; |
88523a61 SB |
2623 | |
2624 | /* | |
2625 | * Set the completion function and data for the command passed | |
2626 | * from the upper layer. | |
2627 | */ | |
2628 | command->async_data = data; | |
2629 | command->async_callback = callback; | |
2630 | ||
2631 | /* | |
60ec0eec AT |
2632 | * To prevent this command from being issued |
2633 | * if an internal command is in progress or error handling is active. | |
88523a61 | 2634 | */ |
c74b0f58 | 2635 | if (port->flags & MTIP_PF_PAUSE_IO) { |
60ec0eec | 2636 | set_bit(tag, port->cmds_to_issue); |
8a857a88 | 2637 | set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
60ec0eec AT |
2638 | return; |
2639 | } | |
88523a61 SB |
2640 | |
2641 | /* Issue the command to the hardware */ | |
2642 | mtip_issue_ncq_command(port, tag); | |
2643 | ||
dad40f16 | 2644 | return; |
88523a61 SB |
2645 | } |
2646 | ||
2647 | /* | |
2648 | * Release a command slot. | |
2649 | * | |
2650 | * @dd Pointer to the driver data structure. | |
2651 | * @tag Slot tag | |
2652 | * | |
2653 | * return value | |
2654 | * None | |
2655 | */ | |
2077d947 AT |
2656 | static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag, |
2657 | int unaligned) | |
88523a61 | 2658 | { |
2077d947 AT |
2659 | struct semaphore *sem = unaligned ? &dd->port->cmd_slot_unal : |
2660 | &dd->port->cmd_slot; | |
88523a61 | 2661 | release_slot(dd->port, tag); |
2077d947 | 2662 | up(sem); |
88523a61 SB |
2663 | } |
2664 | ||
2665 | /* | |
2666 | * Obtain a command slot and return its associated scatter list. | |
2667 | * | |
2668 | * @dd Pointer to the driver data structure. | |
2669 | * @tag Pointer to an int that will receive the allocated command | |
2670 | * slot tag. | |
2671 | * | |
2672 | * return value | |
2673 | * Pointer to the scatter list for the allocated command slot | |
2674 | * or NULL if no command slots are available. | |
2675 | */ | |
6316668f | 2676 | static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd, |
2077d947 | 2677 | int *tag, int unaligned) |
88523a61 | 2678 | { |
2077d947 AT |
2679 | struct semaphore *sem = unaligned ? &dd->port->cmd_slot_unal : |
2680 | &dd->port->cmd_slot; | |
2681 | ||
88523a61 SB |
2682 | /* |
2683 | * It is possible that, even with this semaphore, a thread | |
2684 | * may think that no command slots are available. Therefore, we | |
2685 | * need to make an attempt to get_slot(). | |
2686 | */ | |
2077d947 | 2687 | down(sem); |
88523a61 SB |
2688 | *tag = get_slot(dd->port); |
2689 | ||
8a857a88 | 2690 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
2077d947 | 2691 | up(sem); |
45038367 AT |
2692 | return NULL; |
2693 | } | |
a09ba13e | 2694 | if (unlikely(*tag < 0)) { |
2077d947 | 2695 | up(sem); |
88523a61 | 2696 | return NULL; |
a09ba13e | 2697 | } |
88523a61 SB |
2698 | |
2699 | return dd->port->commands[*tag].sg; | |
2700 | } | |
2701 | ||
2702 | /* | |
7412ff13 | 2703 | * Sysfs status dump. |
88523a61 SB |
2704 | * |
2705 | * @dev Pointer to the device structure, passed by the kernrel. | |
2706 | * @attr Pointer to the device_attribute structure passed by the kernel. | |
2707 | * @buf Pointer to the char buffer that will receive the stats info. | |
2708 | * | |
2709 | * return value | |
2710 | * The size, in bytes, of the data copied into buf. | |
2711 | */ | |
f6587217 AT |
2712 | static ssize_t mtip_hw_show_status(struct device *dev, |
2713 | struct device_attribute *attr, | |
2714 | char *buf) | |
2715 | { | |
2716 | struct driver_data *dd = dev_to_disk(dev)->private_data; | |
2717 | int size = 0; | |
2718 | ||
8a857a88 | 2719 | if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) |
f6587217 | 2720 | size += sprintf(buf, "%s", "thermal_shutdown\n"); |
8a857a88 | 2721 | else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) |
f6587217 AT |
2722 | size += sprintf(buf, "%s", "write_protect\n"); |
2723 | else | |
2724 | size += sprintf(buf, "%s", "online\n"); | |
2725 | ||
2726 | return size; | |
2727 | } | |
2728 | ||
f6587217 | 2729 | static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); |
88523a61 | 2730 | |
0caff003 AT |
2731 | /* debugsfs entries */ |
2732 | ||
2733 | static ssize_t show_device_status(struct device_driver *drv, char *buf) | |
2734 | { | |
2735 | int size = 0; | |
2736 | struct driver_data *dd, *tmp; | |
2737 | unsigned long flags; | |
2738 | char id_buf[42]; | |
2739 | u16 status = 0; | |
2740 | ||
2741 | spin_lock_irqsave(&dev_lock, flags); | |
2742 | size += sprintf(&buf[size], "Devices Present:\n"); | |
2743 | list_for_each_entry_safe(dd, tmp, &online_list, online_list) { | |
c66bb3f0 | 2744 | if (dd->pdev) { |
0caff003 AT |
2745 | if (dd->port && |
2746 | dd->port->identify && | |
2747 | dd->port->identify_valid) { | |
2748 | strlcpy(id_buf, | |
2749 | (char *) (dd->port->identify + 10), 21); | |
2750 | status = *(dd->port->identify + 141); | |
2751 | } else { | |
2752 | memset(id_buf, 0, 42); | |
2753 | status = 0; | |
2754 | } | |
2755 | ||
2756 | if (dd->port && | |
2757 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2758 | size += sprintf(&buf[size], | |
2759 | " device %s %s (ftl rebuild %d %%)\n", | |
2760 | dev_name(&dd->pdev->dev), | |
2761 | id_buf, | |
2762 | status); | |
2763 | } else { | |
2764 | size += sprintf(&buf[size], | |
2765 | " device %s %s\n", | |
2766 | dev_name(&dd->pdev->dev), | |
2767 | id_buf); | |
2768 | } | |
2769 | } | |
2770 | } | |
2771 | ||
2772 | size += sprintf(&buf[size], "Devices Being Removed:\n"); | |
2773 | list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) { | |
c66bb3f0 | 2774 | if (dd->pdev) { |
0caff003 AT |
2775 | if (dd->port && |
2776 | dd->port->identify && | |
2777 | dd->port->identify_valid) { | |
2778 | strlcpy(id_buf, | |
2779 | (char *) (dd->port->identify+10), 21); | |
2780 | status = *(dd->port->identify + 141); | |
2781 | } else { | |
2782 | memset(id_buf, 0, 42); | |
2783 | status = 0; | |
2784 | } | |
2785 | ||
2786 | if (dd->port && | |
2787 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2788 | size += sprintf(&buf[size], | |
2789 | " device %s %s (ftl rebuild %d %%)\n", | |
2790 | dev_name(&dd->pdev->dev), | |
2791 | id_buf, | |
2792 | status); | |
2793 | } else { | |
2794 | size += sprintf(&buf[size], | |
2795 | " device %s %s\n", | |
2796 | dev_name(&dd->pdev->dev), | |
2797 | id_buf); | |
2798 | } | |
2799 | } | |
2800 | } | |
2801 | spin_unlock_irqrestore(&dev_lock, flags); | |
2802 | ||
2803 | return size; | |
2804 | } | |
2805 | ||
2806 | static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf, | |
2807 | size_t len, loff_t *offset) | |
2808 | { | |
2809 | int size = *offset; | |
2810 | char buf[MTIP_DFS_MAX_BUF_SIZE]; | |
2811 | ||
2812 | if (!len || *offset) | |
2813 | return 0; | |
2814 | ||
2815 | size += show_device_status(NULL, buf); | |
2816 | ||
2817 | *offset = size <= len ? size : len; | |
2818 | size = copy_to_user(ubuf, buf, *offset); | |
2819 | if (size) | |
2820 | return -EFAULT; | |
2821 | ||
2822 | return *offset; | |
2823 | } | |
2824 | ||
7b421d24 AT |
2825 | static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, |
2826 | size_t len, loff_t *offset) | |
2827 | { | |
2828 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
2829 | char buf[MTIP_DFS_MAX_BUF_SIZE]; | |
2830 | u32 group_allocated; | |
2831 | int size = *offset; | |
2832 | int n; | |
2833 | ||
2834 | if (!len || size) | |
2835 | return 0; | |
2836 | ||
7b421d24 AT |
2837 | size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); |
2838 | ||
2839 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2840 | size += sprintf(&buf[size], "%08X ", | |
2841 | readl(dd->port->s_active[n])); | |
2842 | ||
2843 | size += sprintf(&buf[size], "]\n"); | |
2844 | size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); | |
2845 | ||
2846 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2847 | size += sprintf(&buf[size], "%08X ", | |
2848 | readl(dd->port->cmd_issue[n])); | |
2849 | ||
2850 | size += sprintf(&buf[size], "]\n"); | |
2851 | size += sprintf(&buf[size], "H/ Completed : [ 0x"); | |
2852 | ||
2853 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2854 | size += sprintf(&buf[size], "%08X ", | |
2855 | readl(dd->port->completed[n])); | |
2856 | ||
2857 | size += sprintf(&buf[size], "]\n"); | |
2858 | size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", | |
2859 | readl(dd->port->mmio + PORT_IRQ_STAT)); | |
2860 | size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", | |
2861 | readl(dd->mmio + HOST_IRQ_STAT)); | |
2862 | size += sprintf(&buf[size], "\n"); | |
2863 | ||
2864 | size += sprintf(&buf[size], "L/ Allocated : [ 0x"); | |
2865 | ||
2866 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2867 | if (sizeof(long) > sizeof(u32)) | |
2868 | group_allocated = | |
2869 | dd->port->allocated[n/2] >> (32*(n&1)); | |
2870 | else | |
2871 | group_allocated = dd->port->allocated[n]; | |
2872 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2873 | } | |
2874 | size += sprintf(&buf[size], "]\n"); | |
2875 | ||
2876 | size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); | |
2877 | ||
2878 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2879 | if (sizeof(long) > sizeof(u32)) | |
2880 | group_allocated = | |
2881 | dd->port->cmds_to_issue[n/2] >> (32*(n&1)); | |
2882 | else | |
2883 | group_allocated = dd->port->cmds_to_issue[n]; | |
2884 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2885 | } | |
2886 | size += sprintf(&buf[size], "]\n"); | |
2887 | ||
2888 | *offset = size <= len ? size : len; | |
2889 | size = copy_to_user(ubuf, buf, *offset); | |
2890 | if (size) | |
2891 | return -EFAULT; | |
2892 | ||
2893 | return *offset; | |
2894 | } | |
2895 | ||
2896 | static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, | |
2897 | size_t len, loff_t *offset) | |
2898 | { | |
2899 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
2900 | char buf[MTIP_DFS_MAX_BUF_SIZE]; | |
2901 | int size = *offset; | |
2902 | ||
2903 | if (!len || size) | |
2904 | return 0; | |
2905 | ||
7b421d24 AT |
2906 | size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", |
2907 | dd->port->flags); | |
2908 | size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", | |
2909 | dd->dd_flag); | |
2910 | ||
2911 | *offset = size <= len ? size : len; | |
2912 | size = copy_to_user(ubuf, buf, *offset); | |
2913 | if (size) | |
2914 | return -EFAULT; | |
2915 | ||
2916 | return *offset; | |
2917 | } | |
2918 | ||
0caff003 AT |
2919 | static const struct file_operations mtip_device_status_fops = { |
2920 | .owner = THIS_MODULE, | |
2921 | .open = simple_open, | |
2922 | .read = mtip_hw_read_device_status, | |
2923 | .llseek = no_llseek, | |
2924 | }; | |
2925 | ||
7b421d24 AT |
2926 | static const struct file_operations mtip_regs_fops = { |
2927 | .owner = THIS_MODULE, | |
2928 | .open = simple_open, | |
2929 | .read = mtip_hw_read_registers, | |
2930 | .llseek = no_llseek, | |
2931 | }; | |
2932 | ||
2933 | static const struct file_operations mtip_flags_fops = { | |
2934 | .owner = THIS_MODULE, | |
2935 | .open = simple_open, | |
2936 | .read = mtip_hw_read_flags, | |
2937 | .llseek = no_llseek, | |
2938 | }; | |
2939 | ||
88523a61 SB |
2940 | /* |
2941 | * Create the sysfs related attributes. | |
2942 | * | |
2943 | * @dd Pointer to the driver data structure. | |
2944 | * @kobj Pointer to the kobj for the block device. | |
2945 | * | |
2946 | * return value | |
2947 | * 0 Operation completed successfully. | |
2948 | * -EINVAL Invalid parameter. | |
2949 | */ | |
6316668f | 2950 | static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2951 | { |
2952 | if (!kobj || !dd) | |
2953 | return -EINVAL; | |
2954 | ||
f6587217 AT |
2955 | if (sysfs_create_file(kobj, &dev_attr_status.attr)) |
2956 | dev_warn(&dd->pdev->dev, | |
2957 | "Error creating 'status' sysfs entry\n"); | |
88523a61 SB |
2958 | return 0; |
2959 | } | |
2960 | ||
2961 | /* | |
2962 | * Remove the sysfs related attributes. | |
2963 | * | |
2964 | * @dd Pointer to the driver data structure. | |
2965 | * @kobj Pointer to the kobj for the block device. | |
2966 | * | |
2967 | * return value | |
2968 | * 0 Operation completed successfully. | |
2969 | * -EINVAL Invalid parameter. | |
2970 | */ | |
6316668f | 2971 | static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2972 | { |
2973 | if (!kobj || !dd) | |
2974 | return -EINVAL; | |
2975 | ||
f6587217 | 2976 | sysfs_remove_file(kobj, &dev_attr_status.attr); |
88523a61 SB |
2977 | |
2978 | return 0; | |
2979 | } | |
2980 | ||
7b421d24 AT |
2981 | static int mtip_hw_debugfs_init(struct driver_data *dd) |
2982 | { | |
2983 | if (!dfs_parent) | |
2984 | return -1; | |
2985 | ||
2986 | dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); | |
2987 | if (IS_ERR_OR_NULL(dd->dfs_node)) { | |
2988 | dev_warn(&dd->pdev->dev, | |
2989 | "Error creating node %s under debugfs\n", | |
2990 | dd->disk->disk_name); | |
2991 | dd->dfs_node = NULL; | |
2992 | return -1; | |
2993 | } | |
2994 | ||
2995 | debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd, | |
2996 | &mtip_flags_fops); | |
2997 | debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd, | |
2998 | &mtip_regs_fops); | |
2999 | ||
3000 | return 0; | |
3001 | } | |
3002 | ||
3003 | static void mtip_hw_debugfs_exit(struct driver_data *dd) | |
3004 | { | |
974a51a2 SB |
3005 | if (dd->dfs_node) |
3006 | debugfs_remove_recursive(dd->dfs_node); | |
7b421d24 AT |
3007 | } |
3008 | ||
3009 | ||
88523a61 SB |
3010 | /* |
3011 | * Perform any init/resume time hardware setup | |
3012 | * | |
3013 | * @dd Pointer to the driver data structure. | |
3014 | * | |
3015 | * return value | |
3016 | * None | |
3017 | */ | |
3018 | static inline void hba_setup(struct driver_data *dd) | |
3019 | { | |
3020 | u32 hwdata; | |
3021 | hwdata = readl(dd->mmio + HOST_HSORG); | |
3022 | ||
3023 | /* interrupt bug workaround: use only 1 IS bit.*/ | |
3024 | writel(hwdata | | |
3025 | HSORG_DISABLE_SLOTGRP_INTR | | |
3026 | HSORG_DISABLE_SLOTGRP_PXIS, | |
3027 | dd->mmio + HOST_HSORG); | |
3028 | } | |
3029 | ||
2077d947 AT |
3030 | static int mtip_device_unaligned_constrained(struct driver_data *dd) |
3031 | { | |
3032 | return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0); | |
3033 | } | |
3034 | ||
88523a61 SB |
3035 | /* |
3036 | * Detect the details of the product, and store anything needed | |
3037 | * into the driver data structure. This includes product type and | |
3038 | * version and number of slot groups. | |
3039 | * | |
3040 | * @dd Pointer to the driver data structure. | |
3041 | * | |
3042 | * return value | |
3043 | * None | |
3044 | */ | |
3045 | static void mtip_detect_product(struct driver_data *dd) | |
3046 | { | |
3047 | u32 hwdata; | |
3048 | unsigned int rev, slotgroups; | |
3049 | ||
3050 | /* | |
3051 | * HBA base + 0xFC [15:0] - vendor-specific hardware interface | |
3052 | * info register: | |
3053 | * [15:8] hardware/software interface rev# | |
3054 | * [ 3] asic-style interface | |
3055 | * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). | |
3056 | */ | |
3057 | hwdata = readl(dd->mmio + HOST_HSORG); | |
3058 | ||
3059 | dd->product_type = MTIP_PRODUCT_UNKNOWN; | |
3060 | dd->slot_groups = 1; | |
3061 | ||
3062 | if (hwdata & 0x8) { | |
3063 | dd->product_type = MTIP_PRODUCT_ASICFPGA; | |
3064 | rev = (hwdata & HSORG_HWREV) >> 8; | |
3065 | slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; | |
3066 | dev_info(&dd->pdev->dev, | |
3067 | "ASIC-FPGA design, HS rev 0x%x, " | |
3068 | "%i slot groups [%i slots]\n", | |
3069 | rev, | |
3070 | slotgroups, | |
3071 | slotgroups * 32); | |
3072 | ||
3073 | if (slotgroups > MTIP_MAX_SLOT_GROUPS) { | |
3074 | dev_warn(&dd->pdev->dev, | |
3075 | "Warning: driver only supports " | |
3076 | "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); | |
3077 | slotgroups = MTIP_MAX_SLOT_GROUPS; | |
3078 | } | |
3079 | dd->slot_groups = slotgroups; | |
3080 | return; | |
3081 | } | |
3082 | ||
3083 | dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); | |
3084 | } | |
3085 | ||
3086 | /* | |
3087 | * Blocking wait for FTL rebuild to complete | |
3088 | * | |
3089 | * @dd Pointer to the DRIVER_DATA structure. | |
3090 | * | |
3091 | * return value | |
3092 | * 0 FTL rebuild completed successfully | |
3093 | * -EFAULT FTL rebuild error/timeout/interruption | |
3094 | */ | |
3095 | static int mtip_ftl_rebuild_poll(struct driver_data *dd) | |
3096 | { | |
3097 | unsigned long timeout, cnt = 0, start; | |
3098 | ||
3099 | dev_warn(&dd->pdev->dev, | |
3100 | "FTL rebuild in progress. Polling for completion.\n"); | |
3101 | ||
3102 | start = jiffies; | |
88523a61 SB |
3103 | timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); |
3104 | ||
3105 | do { | |
8a857a88 | 3106 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
3107 | &dd->dd_flag))) |
3108 | return -EFAULT; | |
88523a61 SB |
3109 | if (mtip_check_surprise_removal(dd->pdev)) |
3110 | return -EFAULT; | |
60ec0eec | 3111 | |
88523a61 SB |
3112 | if (mtip_get_identify(dd->port, NULL) < 0) |
3113 | return -EFAULT; | |
3114 | ||
3115 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
3116 | MTIP_FTL_REBUILD_MAGIC) { | |
3117 | ssleep(1); | |
3118 | /* Print message every 3 minutes */ | |
3119 | if (cnt++ >= 180) { | |
3120 | dev_warn(&dd->pdev->dev, | |
3121 | "FTL rebuild in progress (%d secs).\n", | |
3122 | jiffies_to_msecs(jiffies - start) / 1000); | |
3123 | cnt = 0; | |
3124 | } | |
3125 | } else { | |
3126 | dev_warn(&dd->pdev->dev, | |
3127 | "FTL rebuild complete (%d secs).\n", | |
3128 | jiffies_to_msecs(jiffies - start) / 1000); | |
62ee8c13 | 3129 | mtip_block_initialize(dd); |
45038367 | 3130 | return 0; |
88523a61 SB |
3131 | } |
3132 | ssleep(10); | |
3133 | } while (time_before(jiffies, timeout)); | |
3134 | ||
3135 | /* Check for timeout */ | |
45038367 | 3136 | dev_err(&dd->pdev->dev, |
88523a61 SB |
3137 | "Timed out waiting for FTL rebuild to complete (%d secs).\n", |
3138 | jiffies_to_msecs(jiffies - start) / 1000); | |
45038367 | 3139 | return -EFAULT; |
88523a61 SB |
3140 | } |
3141 | ||
60ec0eec AT |
3142 | /* |
3143 | * service thread to issue queued commands | |
3144 | * | |
3145 | * @data Pointer to the driver data structure. | |
3146 | * | |
3147 | * return value | |
3148 | * 0 | |
3149 | */ | |
3150 | ||
3151 | static int mtip_service_thread(void *data) | |
3152 | { | |
3153 | struct driver_data *dd = (struct driver_data *)data; | |
3154 | unsigned long slot, slot_start, slot_wrap; | |
3155 | unsigned int num_cmd_slots = dd->slot_groups * 32; | |
3156 | struct mtip_port *port = dd->port; | |
3157 | ||
3158 | while (1) { | |
3159 | /* | |
3160 | * the condition is to check neither an internal command is | |
3161 | * is in progress nor error handling is active | |
3162 | */ | |
3163 | wait_event_interruptible(port->svc_wait, (port->flags) && | |
c74b0f58 | 3164 | !(port->flags & MTIP_PF_PAUSE_IO)); |
60ec0eec AT |
3165 | |
3166 | if (kthread_should_stop()) | |
3167 | break; | |
3168 | ||
8a857a88 | 3169 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
3170 | &dd->dd_flag))) |
3171 | break; | |
c74b0f58 | 3172 | |
8a857a88 AT |
3173 | set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); |
3174 | if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { | |
60ec0eec AT |
3175 | slot = 1; |
3176 | /* used to restrict the loop to one iteration */ | |
3177 | slot_start = num_cmd_slots; | |
3178 | slot_wrap = 0; | |
3179 | while (1) { | |
3180 | slot = find_next_bit(port->cmds_to_issue, | |
3181 | num_cmd_slots, slot); | |
3182 | if (slot_wrap == 1) { | |
3183 | if ((slot_start >= slot) || | |
3184 | (slot >= num_cmd_slots)) | |
3185 | break; | |
3186 | } | |
3187 | if (unlikely(slot_start == num_cmd_slots)) | |
3188 | slot_start = slot; | |
3189 | ||
3190 | if (unlikely(slot == num_cmd_slots)) { | |
3191 | slot = 1; | |
3192 | slot_wrap = 1; | |
3193 | continue; | |
3194 | } | |
3195 | ||
3196 | /* Issue the command to the hardware */ | |
3197 | mtip_issue_ncq_command(port, slot); | |
3198 | ||
60ec0eec AT |
3199 | clear_bit(slot, port->cmds_to_issue); |
3200 | } | |
3201 | ||
8a857a88 AT |
3202 | clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
3203 | } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) { | |
8182b495 | 3204 | if (!mtip_ftl_rebuild_poll(dd)) |
8a857a88 | 3205 | set_bit(MTIP_DDF_REBUILD_FAILED_BIT, |
8182b495 | 3206 | &dd->dd_flag); |
8a857a88 | 3207 | clear_bit(MTIP_PF_REBUILD_BIT, &port->flags); |
60ec0eec | 3208 | } |
8a857a88 | 3209 | clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); |
62ee8c13 | 3210 | |
c74b0f58 | 3211 | if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) |
62ee8c13 | 3212 | break; |
60ec0eec AT |
3213 | } |
3214 | return 0; | |
3215 | } | |
3216 | ||
88523a61 SB |
3217 | /* |
3218 | * Called once for each card. | |
3219 | * | |
3220 | * @dd Pointer to the driver data structure. | |
3221 | * | |
3222 | * return value | |
3223 | * 0 on success, else an error code. | |
3224 | */ | |
6316668f | 3225 | static int mtip_hw_init(struct driver_data *dd) |
88523a61 SB |
3226 | { |
3227 | int i; | |
3228 | int rv; | |
3229 | unsigned int num_command_slots; | |
45038367 | 3230 | unsigned long timeout, timetaken; |
f6587217 AT |
3231 | unsigned char *buf; |
3232 | struct smart_attr attr242; | |
88523a61 SB |
3233 | |
3234 | dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; | |
3235 | ||
3236 | mtip_detect_product(dd); | |
3237 | if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { | |
3238 | rv = -EIO; | |
3239 | goto out1; | |
3240 | } | |
3241 | num_command_slots = dd->slot_groups * 32; | |
3242 | ||
3243 | hba_setup(dd); | |
3244 | ||
16c906e5 AT |
3245 | dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL, |
3246 | dd->numa_node); | |
88523a61 SB |
3247 | if (!dd->port) { |
3248 | dev_err(&dd->pdev->dev, | |
3249 | "Memory allocation: port structure\n"); | |
3250 | return -ENOMEM; | |
3251 | } | |
3252 | ||
16c906e5 AT |
3253 | /* Continue workqueue setup */ |
3254 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) | |
3255 | dd->work[i].port = dd->port; | |
3256 | ||
2077d947 AT |
3257 | /* Enable unaligned IO constraints for some devices */ |
3258 | if (mtip_device_unaligned_constrained(dd)) | |
3259 | dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS; | |
3260 | else | |
3261 | dd->unal_qdepth = 0; | |
3262 | ||
88523a61 | 3263 | /* Counting semaphore to track command slot usage */ |
2077d947 AT |
3264 | sema_init(&dd->port->cmd_slot, num_command_slots - 1 - dd->unal_qdepth); |
3265 | sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth); | |
88523a61 SB |
3266 | |
3267 | /* Spinlock to prevent concurrent issue */ | |
16c906e5 AT |
3268 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) |
3269 | spin_lock_init(&dd->port->cmd_issue_lock[i]); | |
88523a61 SB |
3270 | |
3271 | /* Set the port mmio base address. */ | |
3272 | dd->port->mmio = dd->mmio + PORT_OFFSET; | |
3273 | dd->port->dd = dd; | |
3274 | ||
3275 | /* Allocate memory for the command list. */ | |
3276 | dd->port->command_list = | |
3277 | dmam_alloc_coherent(&dd->pdev->dev, | |
f6587217 | 3278 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4), |
88523a61 SB |
3279 | &dd->port->command_list_dma, |
3280 | GFP_KERNEL); | |
3281 | if (!dd->port->command_list) { | |
3282 | dev_err(&dd->pdev->dev, | |
3283 | "Memory allocation: command list\n"); | |
3284 | rv = -ENOMEM; | |
3285 | goto out1; | |
3286 | } | |
3287 | ||
3288 | /* Clear the memory we have allocated. */ | |
3289 | memset(dd->port->command_list, | |
3290 | 0, | |
f6587217 | 3291 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4)); |
88523a61 SB |
3292 | |
3293 | /* Setup the addresse of the RX FIS. */ | |
3294 | dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ; | |
3295 | dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ; | |
3296 | ||
3297 | /* Setup the address of the command tables. */ | |
3298 | dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ; | |
3299 | dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ; | |
3300 | ||
3301 | /* Setup the address of the identify data. */ | |
3302 | dd->port->identify = dd->port->command_table + | |
3303 | HW_CMD_TBL_AR_SZ; | |
3304 | dd->port->identify_dma = dd->port->command_tbl_dma + | |
3305 | HW_CMD_TBL_AR_SZ; | |
3306 | ||
f6587217 | 3307 | /* Setup the address of the sector buffer - for some non-ncq cmds */ |
88523a61 SB |
3308 | dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE; |
3309 | dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE; | |
3310 | ||
f6587217 AT |
3311 | /* Setup the address of the log buf - for read log command */ |
3312 | dd->port->log_buf = (void *)dd->port->sector_buffer + ATA_SECT_SIZE; | |
3313 | dd->port->log_buf_dma = dd->port->sector_buffer_dma + ATA_SECT_SIZE; | |
3314 | ||
3315 | /* Setup the address of the smart buf - for smart read data command */ | |
3316 | dd->port->smart_buf = (void *)dd->port->log_buf + ATA_SECT_SIZE; | |
3317 | dd->port->smart_buf_dma = dd->port->log_buf_dma + ATA_SECT_SIZE; | |
3318 | ||
3319 | ||
88523a61 SB |
3320 | /* Point the command headers at the command tables. */ |
3321 | for (i = 0; i < num_command_slots; i++) { | |
3322 | dd->port->commands[i].command_header = | |
3323 | dd->port->command_list + | |
3324 | (sizeof(struct mtip_cmd_hdr) * i); | |
3325 | dd->port->commands[i].command_header_dma = | |
3326 | dd->port->command_list_dma + | |
3327 | (sizeof(struct mtip_cmd_hdr) * i); | |
3328 | ||
3329 | dd->port->commands[i].command = | |
3330 | dd->port->command_table + (HW_CMD_TBL_SZ * i); | |
3331 | dd->port->commands[i].command_dma = | |
3332 | dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i); | |
3333 | ||
3334 | if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64) | |
3335 | dd->port->commands[i].command_header->ctbau = | |
60ec0eec | 3336 | __force_bit2int cpu_to_le32( |
88523a61 | 3337 | (dd->port->commands[i].command_dma >> 16) >> 16); |
60ec0eec AT |
3338 | dd->port->commands[i].command_header->ctba = |
3339 | __force_bit2int cpu_to_le32( | |
3340 | dd->port->commands[i].command_dma & 0xFFFFFFFF); | |
88523a61 SB |
3341 | |
3342 | /* | |
3343 | * If this is not done, a bug is reported by the stock | |
3344 | * FC11 i386. Due to the fact that it has lots of kernel | |
3345 | * debugging enabled. | |
3346 | */ | |
3347 | sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG); | |
3348 | ||
3349 | /* Mark all commands as currently inactive.*/ | |
3350 | atomic_set(&dd->port->commands[i].active, 0); | |
3351 | } | |
3352 | ||
3353 | /* Setup the pointers to the extended s_active and CI registers. */ | |
3354 | for (i = 0; i < dd->slot_groups; i++) { | |
3355 | dd->port->s_active[i] = | |
3356 | dd->port->mmio + i*0x80 + PORT_SCR_ACT; | |
3357 | dd->port->cmd_issue[i] = | |
3358 | dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; | |
3359 | dd->port->completed[i] = | |
3360 | dd->port->mmio + i*0x80 + PORT_SDBV; | |
3361 | } | |
3362 | ||
45038367 AT |
3363 | timetaken = jiffies; |
3364 | timeout = jiffies + msecs_to_jiffies(30000); | |
3365 | while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) && | |
3366 | time_before(jiffies, timeout)) { | |
3367 | mdelay(100); | |
3368 | } | |
3369 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
3370 | timetaken = jiffies - timetaken; | |
3371 | dev_warn(&dd->pdev->dev, | |
3372 | "Surprise removal detected at %u ms\n", | |
3373 | jiffies_to_msecs(timetaken)); | |
3374 | rv = -ENODEV; | |
3375 | goto out2 ; | |
3376 | } | |
8a857a88 | 3377 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
45038367 AT |
3378 | timetaken = jiffies - timetaken; |
3379 | dev_warn(&dd->pdev->dev, | |
3380 | "Removal detected at %u ms\n", | |
3381 | jiffies_to_msecs(timetaken)); | |
3382 | rv = -EFAULT; | |
88523a61 SB |
3383 | goto out2; |
3384 | } | |
3385 | ||
45038367 AT |
3386 | /* Conditionally reset the HBA. */ |
3387 | if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) { | |
3388 | if (mtip_hba_reset(dd) < 0) { | |
3389 | dev_err(&dd->pdev->dev, | |
3390 | "Card did not reset within timeout\n"); | |
3391 | rv = -EIO; | |
3392 | goto out2; | |
3393 | } | |
3394 | } else { | |
3395 | /* Clear any pending interrupts on the HBA */ | |
3396 | writel(readl(dd->mmio + HOST_IRQ_STAT), | |
3397 | dd->mmio + HOST_IRQ_STAT); | |
3398 | } | |
3399 | ||
88523a61 SB |
3400 | mtip_init_port(dd->port); |
3401 | mtip_start_port(dd->port); | |
3402 | ||
3403 | /* Setup the ISR and enable interrupts. */ | |
3404 | rv = devm_request_irq(&dd->pdev->dev, | |
3405 | dd->pdev->irq, | |
3406 | mtip_irq_handler, | |
3407 | IRQF_SHARED, | |
3408 | dev_driver_string(&dd->pdev->dev), | |
3409 | dd); | |
3410 | ||
3411 | if (rv) { | |
3412 | dev_err(&dd->pdev->dev, | |
3413 | "Unable to allocate IRQ %d\n", dd->pdev->irq); | |
3414 | goto out2; | |
3415 | } | |
16c906e5 | 3416 | irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding)); |
88523a61 SB |
3417 | |
3418 | /* Enable interrupts on the HBA. */ | |
3419 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3420 | dd->mmio + HOST_CTL); | |
3421 | ||
3422 | init_timer(&dd->port->cmd_timer); | |
60ec0eec AT |
3423 | init_waitqueue_head(&dd->port->svc_wait); |
3424 | ||
88523a61 SB |
3425 | dd->port->cmd_timer.data = (unsigned long int) dd->port; |
3426 | dd->port->cmd_timer.function = mtip_timeout_function; | |
3427 | mod_timer(&dd->port->cmd_timer, | |
3428 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
3429 | ||
45038367 | 3430 | |
8a857a88 | 3431 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
45038367 AT |
3432 | rv = -EFAULT; |
3433 | goto out3; | |
3434 | } | |
3435 | ||
88523a61 SB |
3436 | if (mtip_get_identify(dd->port, NULL) < 0) { |
3437 | rv = -EFAULT; | |
3438 | goto out3; | |
3439 | } | |
88523a61 SB |
3440 | |
3441 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
3442 | MTIP_FTL_REBUILD_MAGIC) { | |
8a857a88 | 3443 | set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags); |
62ee8c13 | 3444 | return MTIP_FTL_REBUILD_MAGIC; |
88523a61 | 3445 | } |
62ee8c13 | 3446 | mtip_dump_identify(dd->port); |
f6587217 AT |
3447 | |
3448 | /* check write protect, over temp and rebuild statuses */ | |
3449 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
3450 | dd->port->log_buf, | |
3451 | dd->port->log_buf_dma, 1); | |
3452 | if (rv) { | |
3453 | dev_warn(&dd->pdev->dev, | |
3454 | "Error in READ LOG EXT (10h) command\n"); | |
3455 | /* non-critical error, don't fail the load */ | |
3456 | } else { | |
3457 | buf = (unsigned char *)dd->port->log_buf; | |
3458 | if (buf[259] & 0x1) { | |
3459 | dev_info(&dd->pdev->dev, | |
3460 | "Write protect bit is set.\n"); | |
8a857a88 | 3461 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
3462 | } |
3463 | if (buf[288] == 0xF7) { | |
3464 | dev_info(&dd->pdev->dev, | |
3465 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 3466 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
3467 | } |
3468 | if (buf[288] == 0xBF) { | |
3469 | dev_info(&dd->pdev->dev, | |
3470 | "Drive indicates rebuild has failed.\n"); | |
3471 | /* TODO */ | |
3472 | } | |
3473 | } | |
3474 | ||
3475 | /* get write protect progess */ | |
3476 | memset(&attr242, 0, sizeof(struct smart_attr)); | |
3477 | if (mtip_get_smart_attr(dd->port, 242, &attr242)) | |
3478 | dev_warn(&dd->pdev->dev, | |
3479 | "Unable to check write protect progress\n"); | |
3480 | else | |
3481 | dev_info(&dd->pdev->dev, | |
b62868e5 AT |
3482 | "Write protect progress: %u%% (%u blocks)\n", |
3483 | attr242.cur, le32_to_cpu(attr242.data)); | |
88523a61 SB |
3484 | return rv; |
3485 | ||
3486 | out3: | |
3487 | del_timer_sync(&dd->port->cmd_timer); | |
3488 | ||
3489 | /* Disable interrupts on the HBA. */ | |
3490 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3491 | dd->mmio + HOST_CTL); | |
3492 | ||
16c906e5 AT |
3493 | /* Release the IRQ. */ |
3494 | irq_set_affinity_hint(dd->pdev->irq, NULL); | |
88523a61 SB |
3495 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3496 | ||
3497 | out2: | |
3498 | mtip_deinit_port(dd->port); | |
3499 | ||
3500 | /* Free the command/command header memory. */ | |
3501 | dmam_free_coherent(&dd->pdev->dev, | |
f6587217 | 3502 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4), |
88523a61 SB |
3503 | dd->port->command_list, |
3504 | dd->port->command_list_dma); | |
3505 | out1: | |
3506 | /* Free the memory allocated for the for structure. */ | |
3507 | kfree(dd->port); | |
3508 | ||
3509 | return rv; | |
3510 | } | |
3511 | ||
3512 | /* | |
3513 | * Called to deinitialize an interface. | |
3514 | * | |
3515 | * @dd Pointer to the driver data structure. | |
3516 | * | |
3517 | * return value | |
3518 | * 0 | |
3519 | */ | |
6316668f | 3520 | static int mtip_hw_exit(struct driver_data *dd) |
88523a61 SB |
3521 | { |
3522 | /* | |
3523 | * Send standby immediate (E0h) to the drive so that it | |
3524 | * saves its state. | |
3525 | */ | |
8a857a88 | 3526 | if (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) { |
88523a61 | 3527 | |
8a857a88 | 3528 | if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) |
45038367 AT |
3529 | if (mtip_standby_immediate(dd->port)) |
3530 | dev_warn(&dd->pdev->dev, | |
3531 | "STANDBY IMMEDIATE failed\n"); | |
88523a61 SB |
3532 | |
3533 | /* de-initialize the port. */ | |
3534 | mtip_deinit_port(dd->port); | |
3535 | ||
3536 | /* Disable interrupts on the HBA. */ | |
3537 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3538 | dd->mmio + HOST_CTL); | |
3539 | } | |
3540 | ||
3541 | del_timer_sync(&dd->port->cmd_timer); | |
3542 | ||
88523a61 | 3543 | /* Release the IRQ. */ |
16c906e5 | 3544 | irq_set_affinity_hint(dd->pdev->irq, NULL); |
88523a61 SB |
3545 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3546 | ||
3547 | /* Free the command/command header memory. */ | |
3548 | dmam_free_coherent(&dd->pdev->dev, | |
f6587217 | 3549 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4), |
88523a61 SB |
3550 | dd->port->command_list, |
3551 | dd->port->command_list_dma); | |
3552 | /* Free the memory allocated for the for structure. */ | |
3553 | kfree(dd->port); | |
3554 | ||
3555 | return 0; | |
3556 | } | |
3557 | ||
3558 | /* | |
3559 | * Issue a Standby Immediate command to the device. | |
3560 | * | |
3561 | * This function is called by the Block Layer just before the | |
3562 | * system powers off during a shutdown. | |
3563 | * | |
3564 | * @dd Pointer to the driver data structure. | |
3565 | * | |
3566 | * return value | |
3567 | * 0 | |
3568 | */ | |
6316668f | 3569 | static int mtip_hw_shutdown(struct driver_data *dd) |
88523a61 SB |
3570 | { |
3571 | /* | |
3572 | * Send standby immediate (E0h) to the drive so that it | |
3573 | * saves its state. | |
3574 | */ | |
3575 | mtip_standby_immediate(dd->port); | |
3576 | ||
3577 | return 0; | |
3578 | } | |
3579 | ||
3580 | /* | |
3581 | * Suspend function | |
3582 | * | |
3583 | * This function is called by the Block Layer just before the | |
3584 | * system hibernates. | |
3585 | * | |
3586 | * @dd Pointer to the driver data structure. | |
3587 | * | |
3588 | * return value | |
3589 | * 0 Suspend was successful | |
3590 | * -EFAULT Suspend was not successful | |
3591 | */ | |
6316668f | 3592 | static int mtip_hw_suspend(struct driver_data *dd) |
88523a61 SB |
3593 | { |
3594 | /* | |
3595 | * Send standby immediate (E0h) to the drive | |
3596 | * so that it saves its state. | |
3597 | */ | |
3598 | if (mtip_standby_immediate(dd->port) != 0) { | |
3599 | dev_err(&dd->pdev->dev, | |
3600 | "Failed standby-immediate command\n"); | |
3601 | return -EFAULT; | |
3602 | } | |
3603 | ||
3604 | /* Disable interrupts on the HBA.*/ | |
3605 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3606 | dd->mmio + HOST_CTL); | |
3607 | mtip_deinit_port(dd->port); | |
3608 | ||
3609 | return 0; | |
3610 | } | |
3611 | ||
3612 | /* | |
3613 | * Resume function | |
3614 | * | |
3615 | * This function is called by the Block Layer as the | |
3616 | * system resumes. | |
3617 | * | |
3618 | * @dd Pointer to the driver data structure. | |
3619 | * | |
3620 | * return value | |
3621 | * 0 Resume was successful | |
3622 | * -EFAULT Resume was not successful | |
3623 | */ | |
6316668f | 3624 | static int mtip_hw_resume(struct driver_data *dd) |
88523a61 SB |
3625 | { |
3626 | /* Perform any needed hardware setup steps */ | |
3627 | hba_setup(dd); | |
3628 | ||
3629 | /* Reset the HBA */ | |
3630 | if (mtip_hba_reset(dd) != 0) { | |
3631 | dev_err(&dd->pdev->dev, | |
3632 | "Unable to reset the HBA\n"); | |
3633 | return -EFAULT; | |
3634 | } | |
3635 | ||
3636 | /* | |
3637 | * Enable the port, DMA engine, and FIS reception specific | |
3638 | * h/w in controller. | |
3639 | */ | |
3640 | mtip_init_port(dd->port); | |
3641 | mtip_start_port(dd->port); | |
3642 | ||
3643 | /* Enable interrupts on the HBA.*/ | |
3644 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3645 | dd->mmio + HOST_CTL); | |
3646 | ||
3647 | return 0; | |
3648 | } | |
3649 | ||
88523a61 SB |
3650 | /* |
3651 | * Helper function for reusing disk name | |
3652 | * upon hot insertion. | |
3653 | */ | |
3654 | static int rssd_disk_name_format(char *prefix, | |
3655 | int index, | |
3656 | char *buf, | |
3657 | int buflen) | |
3658 | { | |
3659 | const int base = 'z' - 'a' + 1; | |
3660 | char *begin = buf + strlen(prefix); | |
3661 | char *end = buf + buflen; | |
3662 | char *p; | |
3663 | int unit; | |
3664 | ||
3665 | p = end - 1; | |
3666 | *p = '\0'; | |
3667 | unit = base; | |
3668 | do { | |
3669 | if (p == begin) | |
3670 | return -EINVAL; | |
3671 | *--p = 'a' + (index % unit); | |
3672 | index = (index / unit) - 1; | |
3673 | } while (index >= 0); | |
3674 | ||
3675 | memmove(begin, p, end - p); | |
3676 | memcpy(buf, prefix, strlen(prefix)); | |
3677 | ||
3678 | return 0; | |
3679 | } | |
3680 | ||
3681 | /* | |
3682 | * Block layer IOCTL handler. | |
3683 | * | |
3684 | * @dev Pointer to the block_device structure. | |
3685 | * @mode ignored | |
3686 | * @cmd IOCTL command passed from the user application. | |
3687 | * @arg Argument passed from the user application. | |
3688 | * | |
3689 | * return value | |
3690 | * 0 IOCTL completed successfully. | |
3691 | * -ENOTTY IOCTL not supported or invalid driver data | |
3692 | * structure pointer. | |
3693 | */ | |
3694 | static int mtip_block_ioctl(struct block_device *dev, | |
3695 | fmode_t mode, | |
3696 | unsigned cmd, | |
3697 | unsigned long arg) | |
3698 | { | |
3699 | struct driver_data *dd = dev->bd_disk->private_data; | |
3700 | ||
3701 | if (!capable(CAP_SYS_ADMIN)) | |
3702 | return -EACCES; | |
3703 | ||
3704 | if (!dd) | |
3705 | return -ENOTTY; | |
3706 | ||
8a857a88 | 3707 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3708 | return -ENOTTY; |
3709 | ||
88523a61 SB |
3710 | switch (cmd) { |
3711 | case BLKFLSBUF: | |
60ec0eec | 3712 | return -ENOTTY; |
88523a61 | 3713 | default: |
ef0f1587 | 3714 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3715 | } |
3716 | } | |
3717 | ||
16d02c04 | 3718 | #ifdef CONFIG_COMPAT |
88523a61 SB |
3719 | /* |
3720 | * Block layer compat IOCTL handler. | |
3721 | * | |
3722 | * @dev Pointer to the block_device structure. | |
3723 | * @mode ignored | |
3724 | * @cmd IOCTL command passed from the user application. | |
3725 | * @arg Argument passed from the user application. | |
3726 | * | |
3727 | * return value | |
3728 | * 0 IOCTL completed successfully. | |
3729 | * -ENOTTY IOCTL not supported or invalid driver data | |
3730 | * structure pointer. | |
3731 | */ | |
3732 | static int mtip_block_compat_ioctl(struct block_device *dev, | |
3733 | fmode_t mode, | |
3734 | unsigned cmd, | |
3735 | unsigned long arg) | |
3736 | { | |
3737 | struct driver_data *dd = dev->bd_disk->private_data; | |
3738 | ||
3739 | if (!capable(CAP_SYS_ADMIN)) | |
3740 | return -EACCES; | |
3741 | ||
3742 | if (!dd) | |
3743 | return -ENOTTY; | |
3744 | ||
8a857a88 | 3745 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3746 | return -ENOTTY; |
3747 | ||
88523a61 SB |
3748 | switch (cmd) { |
3749 | case BLKFLSBUF: | |
60ec0eec | 3750 | return -ENOTTY; |
ef0f1587 | 3751 | case HDIO_DRIVE_TASKFILE: { |
60ec0eec | 3752 | struct mtip_compat_ide_task_request_s __user *compat_req_task; |
ef0f1587 JA |
3753 | ide_task_request_t req_task; |
3754 | int compat_tasksize, outtotal, ret; | |
3755 | ||
60ec0eec AT |
3756 | compat_tasksize = |
3757 | sizeof(struct mtip_compat_ide_task_request_s); | |
ef0f1587 JA |
3758 | |
3759 | compat_req_task = | |
3760 | (struct mtip_compat_ide_task_request_s __user *) arg; | |
3761 | ||
3762 | if (copy_from_user(&req_task, (void __user *) arg, | |
60ec0eec | 3763 | compat_tasksize - (2 * sizeof(compat_long_t)))) |
ef0f1587 JA |
3764 | return -EFAULT; |
3765 | ||
3766 | if (get_user(req_task.out_size, &compat_req_task->out_size)) | |
3767 | return -EFAULT; | |
3768 | ||
3769 | if (get_user(req_task.in_size, &compat_req_task->in_size)) | |
3770 | return -EFAULT; | |
3771 | ||
3772 | outtotal = sizeof(struct mtip_compat_ide_task_request_s); | |
3773 | ||
3774 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
3775 | &req_task, outtotal); | |
3776 | ||
3777 | if (copy_to_user((void __user *) arg, &req_task, | |
3778 | compat_tasksize - | |
3779 | (2 * sizeof(compat_long_t)))) | |
3780 | return -EFAULT; | |
3781 | ||
3782 | if (put_user(req_task.out_size, &compat_req_task->out_size)) | |
3783 | return -EFAULT; | |
3784 | ||
3785 | if (put_user(req_task.in_size, &compat_req_task->in_size)) | |
3786 | return -EFAULT; | |
3787 | ||
3788 | return ret; | |
3789 | } | |
88523a61 | 3790 | default: |
ef0f1587 | 3791 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3792 | } |
3793 | } | |
16d02c04 | 3794 | #endif |
88523a61 SB |
3795 | |
3796 | /* | |
3797 | * Obtain the geometry of the device. | |
3798 | * | |
3799 | * You may think that this function is obsolete, but some applications, | |
3800 | * fdisk for example still used CHS values. This function describes the | |
3801 | * device as having 224 heads and 56 sectors per cylinder. These values are | |
3802 | * chosen so that each cylinder is aligned on a 4KB boundary. Since a | |
3803 | * partition is described in terms of a start and end cylinder this means | |
3804 | * that each partition is also 4KB aligned. Non-aligned partitions adversely | |
3805 | * affects performance. | |
3806 | * | |
3807 | * @dev Pointer to the block_device strucutre. | |
3808 | * @geo Pointer to a hd_geometry structure. | |
3809 | * | |
3810 | * return value | |
3811 | * 0 Operation completed successfully. | |
3812 | * -ENOTTY An error occurred while reading the drive capacity. | |
3813 | */ | |
3814 | static int mtip_block_getgeo(struct block_device *dev, | |
3815 | struct hd_geometry *geo) | |
3816 | { | |
3817 | struct driver_data *dd = dev->bd_disk->private_data; | |
3818 | sector_t capacity; | |
3819 | ||
3820 | if (!dd) | |
3821 | return -ENOTTY; | |
3822 | ||
3823 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3824 | dev_warn(&dd->pdev->dev, | |
3825 | "Could not get drive capacity.\n"); | |
3826 | return -ENOTTY; | |
3827 | } | |
3828 | ||
3829 | geo->heads = 224; | |
3830 | geo->sectors = 56; | |
60ec0eec | 3831 | sector_div(capacity, (geo->heads * geo->sectors)); |
88523a61 | 3832 | geo->cylinders = capacity; |
88523a61 SB |
3833 | return 0; |
3834 | } | |
3835 | ||
3836 | /* | |
3837 | * Block device operation function. | |
3838 | * | |
3839 | * This structure contains pointers to the functions required by the block | |
3840 | * layer. | |
3841 | */ | |
3842 | static const struct block_device_operations mtip_block_ops = { | |
3843 | .ioctl = mtip_block_ioctl, | |
16d02c04 | 3844 | #ifdef CONFIG_COMPAT |
88523a61 | 3845 | .compat_ioctl = mtip_block_compat_ioctl, |
16d02c04 | 3846 | #endif |
88523a61 SB |
3847 | .getgeo = mtip_block_getgeo, |
3848 | .owner = THIS_MODULE | |
3849 | }; | |
3850 | ||
3851 | /* | |
3852 | * Block layer make request function. | |
3853 | * | |
3854 | * This function is called by the kernel to process a BIO for | |
3855 | * the P320 device. | |
3856 | * | |
3857 | * @queue Pointer to the request queue. Unused other than to obtain | |
3858 | * the driver data structure. | |
3859 | * @bio Pointer to the BIO. | |
3860 | * | |
88523a61 | 3861 | */ |
a71f483d | 3862 | static void mtip_make_request(struct request_queue *queue, struct bio *bio) |
88523a61 SB |
3863 | { |
3864 | struct driver_data *dd = queue->queuedata; | |
3865 | struct scatterlist *sg; | |
3866 | struct bio_vec *bvec; | |
093c9593 | 3867 | int i, nents = 0; |
2077d947 | 3868 | int tag = 0, unaligned = 0; |
88523a61 | 3869 | |
c74b0f58 AT |
3870 | if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) { |
3871 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, | |
3872 | &dd->dd_flag))) { | |
3873 | bio_endio(bio, -ENXIO); | |
3874 | return; | |
3875 | } | |
3876 | if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) { | |
3877 | bio_endio(bio, -ENODATA); | |
3878 | return; | |
3879 | } | |
3880 | if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT, | |
3881 | &dd->dd_flag) && | |
3882 | bio_data_dir(bio))) { | |
3883 | bio_endio(bio, -ENODATA); | |
3884 | return; | |
3885 | } | |
12a166c9 AT |
3886 | if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))) { |
3887 | bio_endio(bio, -ENODATA); | |
3888 | return; | |
3889 | } | |
45038367 AT |
3890 | } |
3891 | ||
15283469 AT |
3892 | if (unlikely(bio->bi_rw & REQ_DISCARD)) { |
3893 | bio_endio(bio, mtip_send_trim(dd, bio->bi_sector, | |
3894 | bio_sectors(bio))); | |
3895 | return; | |
3896 | } | |
3897 | ||
88523a61 SB |
3898 | if (unlikely(!bio_has_data(bio))) { |
3899 | blk_queue_flush(queue, 0); | |
3900 | bio_endio(bio, 0); | |
a71f483d | 3901 | return; |
88523a61 SB |
3902 | } |
3903 | ||
2077d947 AT |
3904 | if (bio_data_dir(bio) == WRITE && bio_sectors(bio) <= 64 && |
3905 | dd->unal_qdepth) { | |
3906 | if (bio->bi_sector % 8 != 0) /* Unaligned on 4k boundaries */ | |
3907 | unaligned = 1; | |
3908 | else if (bio_sectors(bio) % 8 != 0) /* Aligned but not 4k/8k */ | |
3909 | unaligned = 1; | |
3910 | } | |
3911 | ||
3912 | sg = mtip_hw_get_scatterlist(dd, &tag, unaligned); | |
88523a61 SB |
3913 | if (likely(sg != NULL)) { |
3914 | blk_queue_bounce(queue, &bio); | |
3915 | ||
3916 | if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) { | |
3917 | dev_warn(&dd->pdev->dev, | |
45038367 | 3918 | "Maximum number of SGL entries exceeded\n"); |
88523a61 | 3919 | bio_io_error(bio); |
2077d947 | 3920 | mtip_hw_release_scatterlist(dd, tag, unaligned); |
a71f483d | 3921 | return; |
88523a61 SB |
3922 | } |
3923 | ||
3924 | /* Create the scatter list for this bio. */ | |
093c9593 | 3925 | bio_for_each_segment(bvec, bio, i) { |
88523a61 SB |
3926 | sg_set_page(&sg[nents], |
3927 | bvec->bv_page, | |
3928 | bvec->bv_len, | |
3929 | bvec->bv_offset); | |
093c9593 | 3930 | nents++; |
88523a61 SB |
3931 | } |
3932 | ||
3933 | /* Issue the read/write. */ | |
3934 | mtip_hw_submit_io(dd, | |
3935 | bio->bi_sector, | |
3936 | bio_sectors(bio), | |
3937 | nents, | |
3938 | tag, | |
3939 | bio_endio, | |
3940 | bio, | |
2077d947 AT |
3941 | bio_data_dir(bio), |
3942 | unaligned); | |
a71f483d | 3943 | } else |
88523a61 | 3944 | bio_io_error(bio); |
88523a61 SB |
3945 | } |
3946 | ||
3947 | /* | |
3948 | * Block layer initialization function. | |
3949 | * | |
3950 | * This function is called once by the PCI layer for each P320 | |
3951 | * device that is connected to the system. | |
3952 | * | |
3953 | * @dd Pointer to the driver data structure. | |
3954 | * | |
3955 | * return value | |
3956 | * 0 on success else an error code. | |
3957 | */ | |
6316668f | 3958 | static int mtip_block_initialize(struct driver_data *dd) |
88523a61 | 3959 | { |
62ee8c13 | 3960 | int rv = 0, wait_for_rebuild = 0; |
88523a61 SB |
3961 | sector_t capacity; |
3962 | unsigned int index = 0; | |
3963 | struct kobject *kobj; | |
60ec0eec | 3964 | unsigned char thd_name[16]; |
88523a61 | 3965 | |
62ee8c13 AT |
3966 | if (dd->disk) |
3967 | goto skip_create_disk; /* hw init done, before rebuild */ | |
3968 | ||
88523a61 | 3969 | /* Initialize the protocol layer. */ |
62ee8c13 AT |
3970 | wait_for_rebuild = mtip_hw_init(dd); |
3971 | if (wait_for_rebuild < 0) { | |
88523a61 SB |
3972 | dev_err(&dd->pdev->dev, |
3973 | "Protocol layer initialization failed\n"); | |
3974 | rv = -EINVAL; | |
3975 | goto protocol_init_error; | |
3976 | } | |
3977 | ||
16c906e5 | 3978 | dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node); |
88523a61 SB |
3979 | if (dd->disk == NULL) { |
3980 | dev_err(&dd->pdev->dev, | |
3981 | "Unable to allocate gendisk structure\n"); | |
3982 | rv = -EINVAL; | |
3983 | goto alloc_disk_error; | |
3984 | } | |
3985 | ||
3986 | /* Generate the disk name, implemented same as in sd.c */ | |
3987 | do { | |
3988 | if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) | |
3989 | goto ida_get_error; | |
3990 | ||
3991 | spin_lock(&rssd_index_lock); | |
3992 | rv = ida_get_new(&rssd_index_ida, &index); | |
3993 | spin_unlock(&rssd_index_lock); | |
3994 | } while (rv == -EAGAIN); | |
3995 | ||
3996 | if (rv) | |
3997 | goto ida_get_error; | |
3998 | ||
3999 | rv = rssd_disk_name_format("rssd", | |
4000 | index, | |
4001 | dd->disk->disk_name, | |
4002 | DISK_NAME_LEN); | |
4003 | if (rv) | |
4004 | goto disk_index_error; | |
4005 | ||
4006 | dd->disk->driverfs_dev = &dd->pdev->dev; | |
4007 | dd->disk->major = dd->major; | |
4008 | dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS; | |
4009 | dd->disk->fops = &mtip_block_ops; | |
88523a61 | 4010 | dd->disk->private_data = dd; |
88523a61 SB |
4011 | dd->index = index; |
4012 | ||
62ee8c13 AT |
4013 | /* |
4014 | * if rebuild pending, start the service thread, and delay the block | |
4015 | * queue creation and add_disk() | |
4016 | */ | |
4017 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) | |
4018 | goto start_service_thread; | |
4019 | ||
4020 | skip_create_disk: | |
4021 | /* Allocate the request queue. */ | |
16c906e5 | 4022 | dd->queue = blk_alloc_queue_node(GFP_KERNEL, dd->numa_node); |
62ee8c13 AT |
4023 | if (dd->queue == NULL) { |
4024 | dev_err(&dd->pdev->dev, | |
4025 | "Unable to allocate request queue\n"); | |
4026 | rv = -ENOMEM; | |
4027 | goto block_queue_alloc_init_error; | |
4028 | } | |
4029 | ||
4030 | /* Attach our request function to the request queue. */ | |
4031 | blk_queue_make_request(dd->queue, mtip_make_request); | |
4032 | ||
4033 | dd->disk->queue = dd->queue; | |
4034 | dd->queue->queuedata = dd; | |
4035 | ||
4036 | /* Set device limits. */ | |
4037 | set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); | |
4038 | blk_queue_max_segments(dd->queue, MTIP_MAX_SG); | |
4039 | blk_queue_physical_block_size(dd->queue, 4096); | |
6c8ab698 AT |
4040 | blk_queue_max_hw_sectors(dd->queue, 0xffff); |
4041 | blk_queue_max_segment_size(dd->queue, 0x400000); | |
62ee8c13 | 4042 | blk_queue_io_min(dd->queue, 4096); |
6c8ab698 | 4043 | |
4e8670e2 AT |
4044 | /* |
4045 | * write back cache is not supported in the device. FUA depends on | |
4046 | * write back cache support, hence setting flush support to zero. | |
4047 | */ | |
62ee8c13 AT |
4048 | blk_queue_flush(dd->queue, 0); |
4049 | ||
15283469 AT |
4050 | /* Signal trim support */ |
4051 | if (dd->trim_supp == true) { | |
4052 | set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags); | |
4053 | dd->queue->limits.discard_granularity = 4096; | |
4054 | blk_queue_max_discard_sectors(dd->queue, | |
4055 | MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES); | |
4056 | dd->queue->limits.discard_zeroes_data = 0; | |
4057 | } | |
4058 | ||
88523a61 SB |
4059 | /* Set the capacity of the device in 512 byte sectors. */ |
4060 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
4061 | dev_warn(&dd->pdev->dev, | |
4062 | "Could not read drive capacity\n"); | |
4063 | rv = -EIO; | |
4064 | goto read_capacity_error; | |
4065 | } | |
4066 | set_capacity(dd->disk, capacity); | |
4067 | ||
4068 | /* Enable the block device and add it to /dev */ | |
4069 | add_disk(dd->disk); | |
4070 | ||
4071 | /* | |
4072 | * Now that the disk is active, initialize any sysfs attributes | |
4073 | * managed by the protocol layer. | |
4074 | */ | |
4075 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
4076 | if (kobj) { | |
4077 | mtip_hw_sysfs_init(dd, kobj); | |
4078 | kobject_put(kobj); | |
4079 | } | |
7b421d24 | 4080 | mtip_hw_debugfs_init(dd); |
88523a61 | 4081 | |
45038367 | 4082 | if (dd->mtip_svc_handler) { |
8a857a88 | 4083 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
62ee8c13 | 4084 | return rv; /* service thread created for handling rebuild */ |
45038367 | 4085 | } |
62ee8c13 AT |
4086 | |
4087 | start_service_thread: | |
60ec0eec | 4088 | sprintf(thd_name, "mtip_svc_thd_%02d", index); |
16c906e5 AT |
4089 | dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread, |
4090 | dd, dd->numa_node, thd_name); | |
60ec0eec AT |
4091 | |
4092 | if (IS_ERR(dd->mtip_svc_handler)) { | |
c74b0f58 | 4093 | dev_err(&dd->pdev->dev, "service thread failed to start\n"); |
60ec0eec AT |
4094 | dd->mtip_svc_handler = NULL; |
4095 | rv = -EFAULT; | |
62ee8c13 | 4096 | goto kthread_run_error; |
60ec0eec | 4097 | } |
16c906e5 | 4098 | wake_up_process(dd->mtip_svc_handler); |
45038367 AT |
4099 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) |
4100 | rv = wait_for_rebuild; | |
4101 | ||
88523a61 SB |
4102 | return rv; |
4103 | ||
62ee8c13 | 4104 | kthread_run_error: |
7b421d24 AT |
4105 | mtip_hw_debugfs_exit(dd); |
4106 | ||
62ee8c13 | 4107 | /* Delete our gendisk. This also removes the device from /dev */ |
88523a61 SB |
4108 | del_gendisk(dd->disk); |
4109 | ||
62ee8c13 AT |
4110 | read_capacity_error: |
4111 | blk_cleanup_queue(dd->queue); | |
4112 | ||
4113 | block_queue_alloc_init_error: | |
88523a61 SB |
4114 | disk_index_error: |
4115 | spin_lock(&rssd_index_lock); | |
4116 | ida_remove(&rssd_index_ida, index); | |
4117 | spin_unlock(&rssd_index_lock); | |
4118 | ||
4119 | ida_get_error: | |
4120 | put_disk(dd->disk); | |
4121 | ||
4122 | alloc_disk_error: | |
62ee8c13 | 4123 | mtip_hw_exit(dd); /* De-initialize the protocol layer. */ |
88523a61 SB |
4124 | |
4125 | protocol_init_error: | |
4126 | return rv; | |
4127 | } | |
4128 | ||
4129 | /* | |
4130 | * Block layer deinitialization function. | |
4131 | * | |
4132 | * Called by the PCI layer as each P320 device is removed. | |
4133 | * | |
4134 | * @dd Pointer to the driver data structure. | |
4135 | * | |
4136 | * return value | |
4137 | * 0 | |
4138 | */ | |
6316668f | 4139 | static int mtip_block_remove(struct driver_data *dd) |
88523a61 SB |
4140 | { |
4141 | struct kobject *kobj; | |
60ec0eec AT |
4142 | |
4143 | if (dd->mtip_svc_handler) { | |
c74b0f58 | 4144 | set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags); |
60ec0eec AT |
4145 | wake_up_interruptible(&dd->port->svc_wait); |
4146 | kthread_stop(dd->mtip_svc_handler); | |
4147 | } | |
4148 | ||
f6587217 | 4149 | /* Clean up the sysfs attributes, if created */ |
8a857a88 | 4150 | if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) { |
45038367 AT |
4151 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); |
4152 | if (kobj) { | |
4153 | mtip_hw_sysfs_exit(dd, kobj); | |
4154 | kobject_put(kobj); | |
4155 | } | |
88523a61 | 4156 | } |
7b421d24 | 4157 | mtip_hw_debugfs_exit(dd); |
88523a61 SB |
4158 | |
4159 | /* | |
4160 | * Delete our gendisk structure. This also removes the device | |
4161 | * from /dev | |
4162 | */ | |
58c49df3 AT |
4163 | if (dd->disk) { |
4164 | if (dd->disk->queue) | |
4165 | del_gendisk(dd->disk); | |
4166 | else | |
4167 | put_disk(dd->disk); | |
4168 | } | |
8182b495 AT |
4169 | |
4170 | spin_lock(&rssd_index_lock); | |
4171 | ida_remove(&rssd_index_ida, dd->index); | |
4172 | spin_unlock(&rssd_index_lock); | |
4173 | ||
88523a61 SB |
4174 | blk_cleanup_queue(dd->queue); |
4175 | dd->disk = NULL; | |
4176 | dd->queue = NULL; | |
4177 | ||
4178 | /* De-initialize the protocol layer. */ | |
4179 | mtip_hw_exit(dd); | |
4180 | ||
4181 | return 0; | |
4182 | } | |
4183 | ||
4184 | /* | |
4185 | * Function called by the PCI layer when just before the | |
4186 | * machine shuts down. | |
4187 | * | |
4188 | * If a protocol layer shutdown function is present it will be called | |
4189 | * by this function. | |
4190 | * | |
4191 | * @dd Pointer to the driver data structure. | |
4192 | * | |
4193 | * return value | |
4194 | * 0 | |
4195 | */ | |
6316668f | 4196 | static int mtip_block_shutdown(struct driver_data *dd) |
88523a61 | 4197 | { |
88523a61 | 4198 | /* Delete our gendisk structure, and cleanup the blk queue. */ |
58c49df3 | 4199 | if (dd->disk) { |
5a79e1ac AT |
4200 | dev_info(&dd->pdev->dev, |
4201 | "Shutting down %s ...\n", dd->disk->disk_name); | |
4202 | ||
4203 | if (dd->disk->queue) { | |
58c49df3 | 4204 | del_gendisk(dd->disk); |
5a79e1ac AT |
4205 | blk_cleanup_queue(dd->queue); |
4206 | } else | |
58c49df3 | 4207 | put_disk(dd->disk); |
5a79e1ac AT |
4208 | dd->disk = NULL; |
4209 | dd->queue = NULL; | |
58c49df3 AT |
4210 | } |
4211 | ||
8182b495 AT |
4212 | spin_lock(&rssd_index_lock); |
4213 | ida_remove(&rssd_index_ida, dd->index); | |
4214 | spin_unlock(&rssd_index_lock); | |
4215 | ||
88523a61 SB |
4216 | mtip_hw_shutdown(dd); |
4217 | return 0; | |
4218 | } | |
4219 | ||
6316668f | 4220 | static int mtip_block_suspend(struct driver_data *dd) |
88523a61 SB |
4221 | { |
4222 | dev_info(&dd->pdev->dev, | |
4223 | "Suspending %s ...\n", dd->disk->disk_name); | |
4224 | mtip_hw_suspend(dd); | |
4225 | return 0; | |
4226 | } | |
4227 | ||
6316668f | 4228 | static int mtip_block_resume(struct driver_data *dd) |
88523a61 SB |
4229 | { |
4230 | dev_info(&dd->pdev->dev, "Resuming %s ...\n", | |
4231 | dd->disk->disk_name); | |
4232 | mtip_hw_resume(dd); | |
4233 | return 0; | |
4234 | } | |
4235 | ||
16c906e5 AT |
4236 | static void drop_cpu(int cpu) |
4237 | { | |
4238 | cpu_use[cpu]--; | |
4239 | } | |
4240 | ||
4241 | static int get_least_used_cpu_on_node(int node) | |
4242 | { | |
4243 | int cpu, least_used_cpu, least_cnt; | |
4244 | const struct cpumask *node_mask; | |
4245 | ||
4246 | node_mask = cpumask_of_node(node); | |
4247 | least_used_cpu = cpumask_first(node_mask); | |
4248 | least_cnt = cpu_use[least_used_cpu]; | |
4249 | cpu = least_used_cpu; | |
4250 | ||
4251 | for_each_cpu(cpu, node_mask) { | |
4252 | if (cpu_use[cpu] < least_cnt) { | |
4253 | least_used_cpu = cpu; | |
4254 | least_cnt = cpu_use[cpu]; | |
4255 | } | |
4256 | } | |
4257 | cpu_use[least_used_cpu]++; | |
4258 | return least_used_cpu; | |
4259 | } | |
4260 | ||
4261 | /* Helper for selecting a node in round robin mode */ | |
4262 | static inline int mtip_get_next_rr_node(void) | |
4263 | { | |
4264 | static int next_node = -1; | |
4265 | ||
4266 | if (next_node == -1) { | |
4267 | next_node = first_online_node; | |
4268 | return next_node; | |
4269 | } | |
4270 | ||
4271 | next_node = next_online_node(next_node); | |
4272 | if (next_node == MAX_NUMNODES) | |
4273 | next_node = first_online_node; | |
4274 | return next_node; | |
4275 | } | |
4276 | ||
25bac122 FW |
4277 | static DEFINE_HANDLER(0); |
4278 | static DEFINE_HANDLER(1); | |
4279 | static DEFINE_HANDLER(2); | |
4280 | static DEFINE_HANDLER(3); | |
4281 | static DEFINE_HANDLER(4); | |
4282 | static DEFINE_HANDLER(5); | |
4283 | static DEFINE_HANDLER(6); | |
4284 | static DEFINE_HANDLER(7); | |
16c906e5 | 4285 | |
88523a61 SB |
4286 | /* |
4287 | * Called for each supported PCI device detected. | |
4288 | * | |
4289 | * This function allocates the private data structure, enables the | |
4290 | * PCI device and then calls the block layer initialization function. | |
4291 | * | |
4292 | * return value | |
4293 | * 0 on success else an error code. | |
4294 | */ | |
4295 | static int mtip_pci_probe(struct pci_dev *pdev, | |
4296 | const struct pci_device_id *ent) | |
4297 | { | |
4298 | int rv = 0; | |
4299 | struct driver_data *dd = NULL; | |
16c906e5 AT |
4300 | char cpu_list[256]; |
4301 | const struct cpumask *node_mask; | |
4302 | int cpu, i = 0, j = 0; | |
4303 | int my_node = NUMA_NO_NODE; | |
0caff003 | 4304 | unsigned long flags; |
88523a61 SB |
4305 | |
4306 | /* Allocate memory for this devices private data. */ | |
16c906e5 AT |
4307 | my_node = pcibus_to_node(pdev->bus); |
4308 | if (my_node != NUMA_NO_NODE) { | |
4309 | if (!node_online(my_node)) | |
4310 | my_node = mtip_get_next_rr_node(); | |
4311 | } else { | |
4312 | dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n"); | |
4313 | my_node = mtip_get_next_rr_node(); | |
4314 | } | |
4315 | dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n", | |
4316 | my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev), | |
4317 | cpu_to_node(smp_processor_id()), smp_processor_id()); | |
4318 | ||
4319 | dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node); | |
88523a61 SB |
4320 | if (dd == NULL) { |
4321 | dev_err(&pdev->dev, | |
4322 | "Unable to allocate memory for driver data\n"); | |
4323 | return -ENOMEM; | |
4324 | } | |
4325 | ||
88523a61 SB |
4326 | /* Attach the private data to this PCI device. */ |
4327 | pci_set_drvdata(pdev, dd); | |
4328 | ||
4329 | rv = pcim_enable_device(pdev); | |
4330 | if (rv < 0) { | |
4331 | dev_err(&pdev->dev, "Unable to enable device\n"); | |
4332 | goto iomap_err; | |
4333 | } | |
4334 | ||
4335 | /* Map BAR5 to memory. */ | |
4336 | rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); | |
4337 | if (rv < 0) { | |
4338 | dev_err(&pdev->dev, "Unable to map regions\n"); | |
4339 | goto iomap_err; | |
4340 | } | |
4341 | ||
4342 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | |
4343 | rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | |
4344 | ||
4345 | if (rv) { | |
4346 | rv = pci_set_consistent_dma_mask(pdev, | |
4347 | DMA_BIT_MASK(32)); | |
4348 | if (rv) { | |
4349 | dev_warn(&pdev->dev, | |
4350 | "64-bit DMA enable failed\n"); | |
4351 | goto setmask_err; | |
4352 | } | |
4353 | } | |
4354 | } | |
4355 | ||
16c906e5 AT |
4356 | /* Copy the info we may need later into the private data structure. */ |
4357 | dd->major = mtip_major; | |
4358 | dd->instance = instance; | |
4359 | dd->pdev = pdev; | |
4360 | dd->numa_node = my_node; | |
4361 | ||
0caff003 AT |
4362 | INIT_LIST_HEAD(&dd->online_list); |
4363 | INIT_LIST_HEAD(&dd->remove_list); | |
4364 | ||
16c906e5 AT |
4365 | memset(dd->workq_name, 0, 32); |
4366 | snprintf(dd->workq_name, 31, "mtipq%d", dd->instance); | |
88523a61 | 4367 | |
16c906e5 AT |
4368 | dd->isr_workq = create_workqueue(dd->workq_name); |
4369 | if (!dd->isr_workq) { | |
4370 | dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); | |
d137c830 | 4371 | rv = -ENOMEM; |
16c906e5 AT |
4372 | goto block_initialize_err; |
4373 | } | |
4374 | ||
4375 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4376 | ||
4377 | node_mask = cpumask_of_node(dd->numa_node); | |
4378 | if (!cpumask_empty(node_mask)) { | |
4379 | for_each_cpu(cpu, node_mask) | |
4380 | { | |
4381 | snprintf(&cpu_list[j], 256 - j, "%d ", cpu); | |
4382 | j = strlen(cpu_list); | |
4383 | } | |
4384 | ||
4385 | dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n", | |
4386 | dd->numa_node, | |
4387 | topology_physical_package_id(cpumask_first(node_mask)), | |
4388 | nr_cpus_node(dd->numa_node), | |
4389 | cpu_list); | |
4390 | } else | |
4391 | dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n"); | |
4392 | ||
4393 | dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4394 | dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n", | |
4395 | cpu_to_node(dd->isr_binding), dd->isr_binding); | |
4396 | ||
4397 | /* first worker context always runs in ISR */ | |
4398 | dd->work[0].cpu_binding = dd->isr_binding; | |
4399 | dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4400 | dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4401 | dd->work[3].cpu_binding = dd->work[0].cpu_binding; | |
4402 | dd->work[4].cpu_binding = dd->work[1].cpu_binding; | |
4403 | dd->work[5].cpu_binding = dd->work[2].cpu_binding; | |
4404 | dd->work[6].cpu_binding = dd->work[2].cpu_binding; | |
4405 | dd->work[7].cpu_binding = dd->work[1].cpu_binding; | |
4406 | ||
4407 | /* Log the bindings */ | |
4408 | for_each_present_cpu(cpu) { | |
4409 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4410 | for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
4411 | if (dd->work[i].cpu_binding == cpu) { | |
4412 | snprintf(&cpu_list[j], 256 - j, "%d ", i); | |
4413 | j = strlen(cpu_list); | |
4414 | } | |
4415 | } | |
4416 | if (j) | |
4417 | dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list); | |
4418 | } | |
4419 | ||
4420 | INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0); | |
4421 | INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1); | |
4422 | INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2); | |
4423 | INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3); | |
4424 | INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4); | |
4425 | INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5); | |
4426 | INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6); | |
4427 | INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); | |
4428 | ||
4429 | pci_set_master(pdev); | |
d137c830 WY |
4430 | rv = pci_enable_msi(pdev); |
4431 | if (rv) { | |
88523a61 SB |
4432 | dev_warn(&pdev->dev, |
4433 | "Unable to enable MSI interrupt.\n"); | |
4434 | goto block_initialize_err; | |
4435 | } | |
4436 | ||
88523a61 SB |
4437 | /* Initialize the block layer. */ |
4438 | rv = mtip_block_initialize(dd); | |
4439 | if (rv < 0) { | |
4440 | dev_err(&pdev->dev, | |
4441 | "Unable to initialize block layer\n"); | |
4442 | goto block_initialize_err; | |
4443 | } | |
4444 | ||
4445 | /* | |
4446 | * Increment the instance count so that each device has a unique | |
4447 | * instance number. | |
4448 | */ | |
4449 | instance++; | |
45038367 | 4450 | if (rv != MTIP_FTL_REBUILD_MAGIC) |
8a857a88 | 4451 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
6b06d35f AT |
4452 | else |
4453 | rv = 0; /* device in rebuild state, return 0 from probe */ | |
0caff003 AT |
4454 | |
4455 | /* Add to online list even if in ftl rebuild */ | |
4456 | spin_lock_irqsave(&dev_lock, flags); | |
4457 | list_add(&dd->online_list, &online_list); | |
4458 | spin_unlock_irqrestore(&dev_lock, flags); | |
4459 | ||
88523a61 SB |
4460 | goto done; |
4461 | ||
4462 | block_initialize_err: | |
4463 | pci_disable_msi(pdev); | |
16c906e5 AT |
4464 | if (dd->isr_workq) { |
4465 | flush_workqueue(dd->isr_workq); | |
4466 | destroy_workqueue(dd->isr_workq); | |
4467 | drop_cpu(dd->work[0].cpu_binding); | |
4468 | drop_cpu(dd->work[1].cpu_binding); | |
4469 | drop_cpu(dd->work[2].cpu_binding); | |
4470 | } | |
88523a61 SB |
4471 | setmask_err: |
4472 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
4473 | ||
4474 | iomap_err: | |
4475 | kfree(dd); | |
4476 | pci_set_drvdata(pdev, NULL); | |
4477 | return rv; | |
4478 | done: | |
88523a61 SB |
4479 | return rv; |
4480 | } | |
4481 | ||
4482 | /* | |
4483 | * Called for each probed device when the device is removed or the | |
4484 | * driver is unloaded. | |
4485 | * | |
4486 | * return value | |
4487 | * None | |
4488 | */ | |
4489 | static void mtip_pci_remove(struct pci_dev *pdev) | |
4490 | { | |
4491 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4492 | int counter = 0; | |
0caff003 | 4493 | unsigned long flags; |
88523a61 | 4494 | |
8a857a88 | 4495 | set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag); |
45038367 | 4496 | |
0caff003 AT |
4497 | spin_lock_irqsave(&dev_lock, flags); |
4498 | list_del_init(&dd->online_list); | |
4499 | list_add(&dd->remove_list, &removing_list); | |
4500 | spin_unlock_irqrestore(&dev_lock, flags); | |
4501 | ||
88523a61 | 4502 | if (mtip_check_surprise_removal(pdev)) { |
8a857a88 | 4503 | while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) { |
88523a61 SB |
4504 | counter++; |
4505 | msleep(20); | |
4506 | if (counter == 10) { | |
4507 | /* Cleanup the outstanding commands */ | |
4508 | mtip_command_cleanup(dd); | |
4509 | break; | |
4510 | } | |
4511 | } | |
4512 | } | |
88523a61 SB |
4513 | |
4514 | /* Clean up the block layer. */ | |
4515 | mtip_block_remove(dd); | |
4516 | ||
16c906e5 AT |
4517 | if (dd->isr_workq) { |
4518 | flush_workqueue(dd->isr_workq); | |
4519 | destroy_workqueue(dd->isr_workq); | |
4520 | drop_cpu(dd->work[0].cpu_binding); | |
4521 | drop_cpu(dd->work[1].cpu_binding); | |
4522 | drop_cpu(dd->work[2].cpu_binding); | |
4523 | } | |
4524 | ||
88523a61 SB |
4525 | pci_disable_msi(pdev); |
4526 | ||
0caff003 AT |
4527 | spin_lock_irqsave(&dev_lock, flags); |
4528 | list_del_init(&dd->remove_list); | |
4529 | spin_unlock_irqrestore(&dev_lock, flags); | |
4530 | ||
88523a61 SB |
4531 | kfree(dd); |
4532 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
4533 | } | |
4534 | ||
4535 | /* | |
4536 | * Called for each probed device when the device is suspended. | |
4537 | * | |
4538 | * return value | |
4539 | * 0 Success | |
4540 | * <0 Error | |
4541 | */ | |
4542 | static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
4543 | { | |
4544 | int rv = 0; | |
4545 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4546 | ||
4547 | if (!dd) { | |
4548 | dev_err(&pdev->dev, | |
4549 | "Driver private datastructure is NULL\n"); | |
4550 | return -EFAULT; | |
4551 | } | |
4552 | ||
8a857a88 | 4553 | set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4554 | |
4555 | /* Disable ports & interrupts then send standby immediate */ | |
4556 | rv = mtip_block_suspend(dd); | |
4557 | if (rv < 0) { | |
4558 | dev_err(&pdev->dev, | |
4559 | "Failed to suspend controller\n"); | |
4560 | return rv; | |
4561 | } | |
4562 | ||
4563 | /* | |
4564 | * Save the pci config space to pdev structure & | |
4565 | * disable the device | |
4566 | */ | |
4567 | pci_save_state(pdev); | |
4568 | pci_disable_device(pdev); | |
4569 | ||
4570 | /* Move to Low power state*/ | |
4571 | pci_set_power_state(pdev, PCI_D3hot); | |
4572 | ||
4573 | return rv; | |
4574 | } | |
4575 | ||
4576 | /* | |
4577 | * Called for each probed device when the device is resumed. | |
4578 | * | |
4579 | * return value | |
4580 | * 0 Success | |
4581 | * <0 Error | |
4582 | */ | |
4583 | static int mtip_pci_resume(struct pci_dev *pdev) | |
4584 | { | |
4585 | int rv = 0; | |
4586 | struct driver_data *dd; | |
4587 | ||
4588 | dd = pci_get_drvdata(pdev); | |
4589 | if (!dd) { | |
4590 | dev_err(&pdev->dev, | |
4591 | "Driver private datastructure is NULL\n"); | |
4592 | return -EFAULT; | |
4593 | } | |
4594 | ||
4595 | /* Move the device to active State */ | |
4596 | pci_set_power_state(pdev, PCI_D0); | |
4597 | ||
4598 | /* Restore PCI configuration space */ | |
4599 | pci_restore_state(pdev); | |
4600 | ||
4601 | /* Enable the PCI device*/ | |
4602 | rv = pcim_enable_device(pdev); | |
4603 | if (rv < 0) { | |
4604 | dev_err(&pdev->dev, | |
4605 | "Failed to enable card during resume\n"); | |
4606 | goto err; | |
4607 | } | |
4608 | pci_set_master(pdev); | |
4609 | ||
4610 | /* | |
4611 | * Calls hbaReset, initPort, & startPort function | |
4612 | * then enables interrupts | |
4613 | */ | |
4614 | rv = mtip_block_resume(dd); | |
4615 | if (rv < 0) | |
4616 | dev_err(&pdev->dev, "Unable to resume\n"); | |
4617 | ||
4618 | err: | |
8a857a88 | 4619 | clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4620 | |
4621 | return rv; | |
4622 | } | |
4623 | ||
4624 | /* | |
4625 | * Shutdown routine | |
4626 | * | |
4627 | * return value | |
4628 | * None | |
4629 | */ | |
4630 | static void mtip_pci_shutdown(struct pci_dev *pdev) | |
4631 | { | |
4632 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4633 | if (dd) | |
4634 | mtip_block_shutdown(dd); | |
4635 | } | |
4636 | ||
88523a61 SB |
4637 | /* Table of device ids supported by this driver. */ |
4638 | static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = { | |
1a131458 AT |
4639 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) }, |
4640 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) }, | |
4641 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) }, | |
4642 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) }, | |
4643 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) }, | |
4644 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) }, | |
4645 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) }, | |
88523a61 SB |
4646 | { 0 } |
4647 | }; | |
4648 | ||
4649 | /* Structure that describes the PCI driver functions. */ | |
3ff147d3 | 4650 | static struct pci_driver mtip_pci_driver = { |
88523a61 SB |
4651 | .name = MTIP_DRV_NAME, |
4652 | .id_table = mtip_pci_tbl, | |
4653 | .probe = mtip_pci_probe, | |
4654 | .remove = mtip_pci_remove, | |
4655 | .suspend = mtip_pci_suspend, | |
4656 | .resume = mtip_pci_resume, | |
4657 | .shutdown = mtip_pci_shutdown, | |
4658 | }; | |
4659 | ||
4660 | MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); | |
4661 | ||
4662 | /* | |
4663 | * Module initialization function. | |
4664 | * | |
4665 | * Called once when the module is loaded. This function allocates a major | |
4666 | * block device number to the Cyclone devices and registers the PCI layer | |
4667 | * of the driver. | |
4668 | * | |
4669 | * Return value | |
4670 | * 0 on success else error code. | |
4671 | */ | |
4672 | static int __init mtip_init(void) | |
4673 | { | |
6d27f09a RS |
4674 | int error; |
4675 | ||
45422e74 | 4676 | pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); |
88523a61 | 4677 | |
0caff003 AT |
4678 | spin_lock_init(&dev_lock); |
4679 | ||
4680 | INIT_LIST_HEAD(&online_list); | |
4681 | INIT_LIST_HEAD(&removing_list); | |
4682 | ||
88523a61 | 4683 | /* Allocate a major block device number to use with this driver. */ |
6d27f09a RS |
4684 | error = register_blkdev(0, MTIP_DRV_NAME); |
4685 | if (error <= 0) { | |
45422e74 | 4686 | pr_err("Unable to register block device (%d)\n", |
6d27f09a | 4687 | error); |
88523a61 SB |
4688 | return -EBUSY; |
4689 | } | |
6d27f09a | 4690 | mtip_major = error; |
88523a61 | 4691 | |
0caff003 AT |
4692 | dfs_parent = debugfs_create_dir("rssd", NULL); |
4693 | if (IS_ERR_OR_NULL(dfs_parent)) { | |
4694 | pr_warn("Error creating debugfs parent\n"); | |
4695 | dfs_parent = NULL; | |
4696 | } | |
4697 | if (dfs_parent) { | |
4698 | dfs_device_status = debugfs_create_file("device_status", | |
4699 | S_IRUGO, dfs_parent, NULL, | |
4700 | &mtip_device_status_fops); | |
4701 | if (IS_ERR_OR_NULL(dfs_device_status)) { | |
4702 | pr_err("Error creating device_status node\n"); | |
4703 | dfs_device_status = NULL; | |
7b421d24 AT |
4704 | } |
4705 | } | |
4706 | ||
88523a61 | 4707 | /* Register our PCI operations. */ |
6d27f09a | 4708 | error = pci_register_driver(&mtip_pci_driver); |
7b421d24 AT |
4709 | if (error) { |
4710 | debugfs_remove(dfs_parent); | |
6d27f09a | 4711 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); |
7b421d24 | 4712 | } |
6d27f09a RS |
4713 | |
4714 | return error; | |
88523a61 SB |
4715 | } |
4716 | ||
4717 | /* | |
4718 | * Module de-initialization function. | |
4719 | * | |
4720 | * Called once when the module is unloaded. This function deallocates | |
4721 | * the major block device number allocated by mtip_init() and | |
4722 | * unregisters the PCI layer of the driver. | |
4723 | * | |
4724 | * Return value | |
4725 | * none | |
4726 | */ | |
4727 | static void __exit mtip_exit(void) | |
4728 | { | |
7b421d24 AT |
4729 | debugfs_remove_recursive(dfs_parent); |
4730 | ||
88523a61 SB |
4731 | /* Release the allocated major block device number. */ |
4732 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); | |
4733 | ||
4734 | /* Unregister the PCI driver. */ | |
4735 | pci_unregister_driver(&mtip_pci_driver); | |
4736 | } | |
4737 | ||
4738 | MODULE_AUTHOR("Micron Technology, Inc"); | |
4739 | MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); | |
4740 | MODULE_LICENSE("GPL"); | |
4741 | MODULE_VERSION(MTIP_DRV_VERSION); | |
4742 | ||
4743 | module_init(mtip_init); | |
4744 | module_exit(mtip_exit); |