Commit | Line | Data |
---|---|---|
16e3887f MH |
1 | /* |
2 | * | |
3 | * Bluetooth HCI UART driver for Intel devices | |
4 | * | |
5 | * Copyright (C) 2015 Intel Corporation | |
6 | * | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | * | |
22 | */ | |
23 | ||
24 | #include <linux/kernel.h> | |
25 | #include <linux/errno.h> | |
26 | #include <linux/skbuff.h> | |
ca93cee5 | 27 | #include <linux/firmware.h> |
1ab1f239 | 28 | #include <linux/module.h> |
ca93cee5 | 29 | #include <linux/wait.h> |
1ab1f239 LP |
30 | #include <linux/tty.h> |
31 | #include <linux/platform_device.h> | |
32 | #include <linux/gpio/consumer.h> | |
33 | #include <linux/acpi.h> | |
765ea3ab | 34 | #include <linux/interrupt.h> |
74cdad37 | 35 | #include <linux/pm_runtime.h> |
16e3887f MH |
36 | |
37 | #include <net/bluetooth/bluetooth.h> | |
38 | #include <net/bluetooth/hci_core.h> | |
39 | ||
40 | #include "hci_uart.h" | |
ca93cee5 LP |
41 | #include "btintel.h" |
42 | ||
43 | #define STATE_BOOTLOADER 0 | |
44 | #define STATE_DOWNLOADING 1 | |
45 | #define STATE_FIRMWARE_LOADED 2 | |
46 | #define STATE_FIRMWARE_FAILED 3 | |
47 | #define STATE_BOOTING 4 | |
b98469f4 LP |
48 | #define STATE_LPM_ENABLED 5 |
49 | #define STATE_TX_ACTIVE 6 | |
89436546 LP |
50 | #define STATE_SUSPENDED 7 |
51 | #define STATE_LPM_TRANSACTION 8 | |
b98469f4 | 52 | |
89436546 | 53 | #define HCI_LPM_WAKE_PKT 0xf0 |
b98469f4 LP |
54 | #define HCI_LPM_PKT 0xf1 |
55 | #define HCI_LPM_MAX_SIZE 10 | |
56 | #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE | |
57 | ||
58 | #define LPM_OP_TX_NOTIFY 0x00 | |
89436546 LP |
59 | #define LPM_OP_SUSPEND_ACK 0x02 |
60 | #define LPM_OP_RESUME_ACK 0x03 | |
b98469f4 | 61 | |
74cdad37 LP |
62 | #define LPM_SUSPEND_DELAY_MS 1000 |
63 | ||
b98469f4 LP |
64 | struct hci_lpm_pkt { |
65 | __u8 opcode; | |
66 | __u8 dlen; | |
67 | __u8 data[0]; | |
68 | } __packed; | |
ca93cee5 | 69 | |
1ab1f239 LP |
70 | struct intel_device { |
71 | struct list_head list; | |
72 | struct platform_device *pdev; | |
73 | struct gpio_desc *reset; | |
aa6802df LP |
74 | struct hci_uart *hu; |
75 | struct mutex hu_lock; | |
765ea3ab | 76 | int irq; |
1ab1f239 LP |
77 | }; |
78 | ||
79 | static LIST_HEAD(intel_device_list); | |
67c8bde0 | 80 | static DEFINE_MUTEX(intel_device_list_lock); |
1ab1f239 | 81 | |
ca93cee5 LP |
82 | struct intel_data { |
83 | struct sk_buff *rx_skb; | |
84 | struct sk_buff_head txq; | |
74cdad37 LP |
85 | struct work_struct busy_work; |
86 | struct hci_uart *hu; | |
ca93cee5 LP |
87 | unsigned long flags; |
88 | }; | |
89 | ||
ff289559 LP |
90 | static u8 intel_convert_speed(unsigned int speed) |
91 | { | |
92 | switch (speed) { | |
93 | case 9600: | |
94 | return 0x00; | |
95 | case 19200: | |
96 | return 0x01; | |
97 | case 38400: | |
98 | return 0x02; | |
99 | case 57600: | |
100 | return 0x03; | |
101 | case 115200: | |
102 | return 0x04; | |
103 | case 230400: | |
104 | return 0x05; | |
105 | case 460800: | |
106 | return 0x06; | |
107 | case 921600: | |
108 | return 0x07; | |
109 | case 1843200: | |
110 | return 0x08; | |
111 | case 3250000: | |
112 | return 0x09; | |
113 | case 2000000: | |
114 | return 0x0a; | |
115 | case 3000000: | |
116 | return 0x0b; | |
117 | default: | |
118 | return 0xff; | |
119 | } | |
120 | } | |
121 | ||
1ab1f239 LP |
122 | static int intel_wait_booting(struct hci_uart *hu) |
123 | { | |
124 | struct intel_data *intel = hu->priv; | |
125 | int err; | |
126 | ||
127 | err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING, | |
128 | TASK_INTERRUPTIBLE, | |
129 | msecs_to_jiffies(1000)); | |
130 | ||
131 | if (err == 1) { | |
f44e78a5 | 132 | bt_dev_err(hu->hdev, "Device boot interrupted"); |
1ab1f239 LP |
133 | return -EINTR; |
134 | } | |
135 | ||
136 | if (err) { | |
f44e78a5 | 137 | bt_dev_err(hu->hdev, "Device boot timeout"); |
1ab1f239 LP |
138 | return -ETIMEDOUT; |
139 | } | |
140 | ||
141 | return err; | |
142 | } | |
143 | ||
a9cb0fe4 | 144 | #ifdef CONFIG_PM |
89436546 LP |
145 | static int intel_wait_lpm_transaction(struct hci_uart *hu) |
146 | { | |
147 | struct intel_data *intel = hu->priv; | |
148 | int err; | |
149 | ||
150 | err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION, | |
151 | TASK_INTERRUPTIBLE, | |
152 | msecs_to_jiffies(1000)); | |
153 | ||
154 | if (err == 1) { | |
155 | bt_dev_err(hu->hdev, "LPM transaction interrupted"); | |
156 | return -EINTR; | |
157 | } | |
158 | ||
159 | if (err) { | |
160 | bt_dev_err(hu->hdev, "LPM transaction timeout"); | |
161 | return -ETIMEDOUT; | |
162 | } | |
163 | ||
164 | return err; | |
165 | } | |
166 | ||
167 | static int intel_lpm_suspend(struct hci_uart *hu) | |
168 | { | |
169 | static const u8 suspend[] = { 0x01, 0x01, 0x01 }; | |
170 | struct intel_data *intel = hu->priv; | |
171 | struct sk_buff *skb; | |
172 | ||
173 | if (!test_bit(STATE_LPM_ENABLED, &intel->flags) || | |
174 | test_bit(STATE_SUSPENDED, &intel->flags)) | |
175 | return 0; | |
176 | ||
177 | if (test_bit(STATE_TX_ACTIVE, &intel->flags)) | |
178 | return -EAGAIN; | |
179 | ||
180 | bt_dev_dbg(hu->hdev, "Suspending"); | |
181 | ||
182 | skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL); | |
183 | if (!skb) { | |
184 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
185 | return -ENOMEM; | |
186 | } | |
187 | ||
188 | memcpy(skb_put(skb, sizeof(suspend)), suspend, sizeof(suspend)); | |
189 | bt_cb(skb)->pkt_type = HCI_LPM_PKT; | |
190 | ||
191 | set_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
192 | ||
30e945fb LP |
193 | /* LPM flow is a priority, enqueue packet at list head */ |
194 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
195 | hci_uart_tx_wakeup(hu); |
196 | ||
197 | intel_wait_lpm_transaction(hu); | |
198 | /* Even in case of failure, continue and test the suspended flag */ | |
199 | ||
200 | clear_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
201 | ||
202 | if (!test_bit(STATE_SUSPENDED, &intel->flags)) { | |
203 | bt_dev_err(hu->hdev, "Device suspend error"); | |
204 | return -EINVAL; | |
205 | } | |
206 | ||
207 | bt_dev_dbg(hu->hdev, "Suspended"); | |
208 | ||
209 | hci_uart_set_flow_control(hu, true); | |
210 | ||
211 | return 0; | |
212 | } | |
213 | ||
214 | static int intel_lpm_resume(struct hci_uart *hu) | |
215 | { | |
216 | struct intel_data *intel = hu->priv; | |
217 | struct sk_buff *skb; | |
218 | ||
219 | if (!test_bit(STATE_LPM_ENABLED, &intel->flags) || | |
220 | !test_bit(STATE_SUSPENDED, &intel->flags)) | |
221 | return 0; | |
222 | ||
223 | bt_dev_dbg(hu->hdev, "Resuming"); | |
224 | ||
225 | hci_uart_set_flow_control(hu, false); | |
226 | ||
227 | skb = bt_skb_alloc(0, GFP_KERNEL); | |
228 | if (!skb) { | |
229 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
230 | return -ENOMEM; | |
231 | } | |
232 | ||
233 | bt_cb(skb)->pkt_type = HCI_LPM_WAKE_PKT; | |
234 | ||
235 | set_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
236 | ||
30e945fb LP |
237 | /* LPM flow is a priority, enqueue packet at list head */ |
238 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
239 | hci_uart_tx_wakeup(hu); |
240 | ||
241 | intel_wait_lpm_transaction(hu); | |
242 | /* Even in case of failure, continue and test the suspended flag */ | |
243 | ||
244 | clear_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
245 | ||
246 | if (test_bit(STATE_SUSPENDED, &intel->flags)) { | |
247 | bt_dev_err(hu->hdev, "Device resume error"); | |
248 | return -EINVAL; | |
249 | } | |
250 | ||
251 | bt_dev_dbg(hu->hdev, "Resumed"); | |
252 | ||
253 | return 0; | |
254 | } | |
a9cb0fe4 | 255 | #endif /* CONFIG_PM */ |
89436546 LP |
256 | |
257 | static int intel_lpm_host_wake(struct hci_uart *hu) | |
258 | { | |
259 | static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 }; | |
260 | struct intel_data *intel = hu->priv; | |
261 | struct sk_buff *skb; | |
262 | ||
263 | hci_uart_set_flow_control(hu, false); | |
264 | ||
265 | clear_bit(STATE_SUSPENDED, &intel->flags); | |
266 | ||
267 | skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL); | |
268 | if (!skb) { | |
269 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
270 | return -ENOMEM; | |
271 | } | |
272 | ||
273 | memcpy(skb_put(skb, sizeof(lpm_resume_ack)), lpm_resume_ack, | |
274 | sizeof(lpm_resume_ack)); | |
275 | bt_cb(skb)->pkt_type = HCI_LPM_PKT; | |
276 | ||
30e945fb LP |
277 | /* LPM flow is a priority, enqueue packet at list head */ |
278 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
279 | hci_uart_tx_wakeup(hu); |
280 | ||
281 | bt_dev_dbg(hu->hdev, "Resumed by controller"); | |
282 | ||
283 | return 0; | |
284 | } | |
285 | ||
765ea3ab LP |
286 | static irqreturn_t intel_irq(int irq, void *dev_id) |
287 | { | |
288 | struct intel_device *idev = dev_id; | |
289 | ||
290 | dev_info(&idev->pdev->dev, "hci_intel irq\n"); | |
291 | ||
aa6802df LP |
292 | mutex_lock(&idev->hu_lock); |
293 | if (idev->hu) | |
294 | intel_lpm_host_wake(idev->hu); | |
295 | mutex_unlock(&idev->hu_lock); | |
296 | ||
74cdad37 LP |
297 | /* Host/Controller are now LPM resumed, trigger a new delayed suspend */ |
298 | pm_runtime_get(&idev->pdev->dev); | |
299 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
300 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
301 | ||
765ea3ab LP |
302 | return IRQ_HANDLED; |
303 | } | |
304 | ||
1ab1f239 LP |
305 | static int intel_set_power(struct hci_uart *hu, bool powered) |
306 | { | |
307 | struct list_head *p; | |
308 | int err = -ENODEV; | |
309 | ||
67c8bde0 | 310 | mutex_lock(&intel_device_list_lock); |
1ab1f239 LP |
311 | |
312 | list_for_each(p, &intel_device_list) { | |
313 | struct intel_device *idev = list_entry(p, struct intel_device, | |
314 | list); | |
315 | ||
316 | /* tty device and pdev device should share the same parent | |
317 | * which is the UART port. | |
318 | */ | |
319 | if (hu->tty->dev->parent != idev->pdev->dev.parent) | |
320 | continue; | |
321 | ||
322 | if (!idev->reset) { | |
323 | err = -ENOTSUPP; | |
324 | break; | |
325 | } | |
326 | ||
327 | BT_INFO("hu %p, Switching compatible pm device (%s) to %u", | |
328 | hu, dev_name(&idev->pdev->dev), powered); | |
329 | ||
330 | gpiod_set_value(idev->reset, powered); | |
765ea3ab | 331 | |
aa6802df LP |
332 | /* Provide to idev a hu reference which is used to run LPM |
333 | * transactions (lpm suspend/resume) from PM callbacks. | |
334 | * hu needs to be protected against concurrent removing during | |
335 | * these PM ops. | |
336 | */ | |
337 | mutex_lock(&idev->hu_lock); | |
338 | idev->hu = powered ? hu : NULL; | |
339 | mutex_unlock(&idev->hu_lock); | |
340 | ||
765ea3ab LP |
341 | if (idev->irq < 0) |
342 | break; | |
343 | ||
344 | if (powered && device_can_wakeup(&idev->pdev->dev)) { | |
345 | err = devm_request_threaded_irq(&idev->pdev->dev, | |
346 | idev->irq, NULL, | |
347 | intel_irq, | |
348 | IRQF_ONESHOT, | |
349 | "bt-host-wake", idev); | |
350 | if (err) { | |
351 | BT_ERR("hu %p, unable to allocate irq-%d", | |
352 | hu, idev->irq); | |
353 | break; | |
354 | } | |
355 | ||
356 | device_wakeup_enable(&idev->pdev->dev); | |
74cdad37 LP |
357 | |
358 | pm_runtime_set_active(&idev->pdev->dev); | |
359 | pm_runtime_use_autosuspend(&idev->pdev->dev); | |
360 | pm_runtime_set_autosuspend_delay(&idev->pdev->dev, | |
361 | LPM_SUSPEND_DELAY_MS); | |
362 | pm_runtime_enable(&idev->pdev->dev); | |
765ea3ab LP |
363 | } else if (!powered && device_may_wakeup(&idev->pdev->dev)) { |
364 | devm_free_irq(&idev->pdev->dev, idev->irq, idev); | |
365 | device_wakeup_disable(&idev->pdev->dev); | |
74cdad37 LP |
366 | |
367 | pm_runtime_disable(&idev->pdev->dev); | |
765ea3ab | 368 | } |
1ab1f239 LP |
369 | } |
370 | ||
67c8bde0 | 371 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 LP |
372 | |
373 | return err; | |
374 | } | |
375 | ||
74cdad37 LP |
376 | static void intel_busy_work(struct work_struct *work) |
377 | { | |
378 | struct list_head *p; | |
379 | struct intel_data *intel = container_of(work, struct intel_data, | |
380 | busy_work); | |
381 | ||
382 | /* Link is busy, delay the suspend */ | |
383 | mutex_lock(&intel_device_list_lock); | |
384 | list_for_each(p, &intel_device_list) { | |
385 | struct intel_device *idev = list_entry(p, struct intel_device, | |
386 | list); | |
387 | ||
388 | if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) { | |
389 | pm_runtime_get(&idev->pdev->dev); | |
390 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
391 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
392 | break; | |
393 | } | |
394 | } | |
395 | mutex_unlock(&intel_device_list_lock); | |
396 | } | |
397 | ||
ca93cee5 LP |
398 | static int intel_open(struct hci_uart *hu) |
399 | { | |
400 | struct intel_data *intel; | |
401 | ||
402 | BT_DBG("hu %p", hu); | |
403 | ||
404 | intel = kzalloc(sizeof(*intel), GFP_KERNEL); | |
405 | if (!intel) | |
406 | return -ENOMEM; | |
407 | ||
408 | skb_queue_head_init(&intel->txq); | |
74cdad37 LP |
409 | INIT_WORK(&intel->busy_work, intel_busy_work); |
410 | ||
411 | intel->hu = hu; | |
ca93cee5 LP |
412 | |
413 | hu->priv = intel; | |
1ab1f239 LP |
414 | |
415 | if (!intel_set_power(hu, true)) | |
416 | set_bit(STATE_BOOTING, &intel->flags); | |
417 | ||
ca93cee5 LP |
418 | return 0; |
419 | } | |
420 | ||
421 | static int intel_close(struct hci_uart *hu) | |
422 | { | |
423 | struct intel_data *intel = hu->priv; | |
424 | ||
425 | BT_DBG("hu %p", hu); | |
426 | ||
74cdad37 LP |
427 | cancel_work_sync(&intel->busy_work); |
428 | ||
1ab1f239 LP |
429 | intel_set_power(hu, false); |
430 | ||
ca93cee5 LP |
431 | skb_queue_purge(&intel->txq); |
432 | kfree_skb(intel->rx_skb); | |
433 | kfree(intel); | |
434 | ||
435 | hu->priv = NULL; | |
436 | return 0; | |
437 | } | |
438 | ||
439 | static int intel_flush(struct hci_uart *hu) | |
440 | { | |
441 | struct intel_data *intel = hu->priv; | |
442 | ||
443 | BT_DBG("hu %p", hu); | |
444 | ||
445 | skb_queue_purge(&intel->txq); | |
446 | ||
447 | return 0; | |
448 | } | |
449 | ||
450 | static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode) | |
451 | { | |
452 | struct sk_buff *skb; | |
453 | struct hci_event_hdr *hdr; | |
454 | struct hci_ev_cmd_complete *evt; | |
455 | ||
456 | skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_ATOMIC); | |
457 | if (!skb) | |
458 | return -ENOMEM; | |
459 | ||
460 | hdr = (struct hci_event_hdr *)skb_put(skb, sizeof(*hdr)); | |
461 | hdr->evt = HCI_EV_CMD_COMPLETE; | |
462 | hdr->plen = sizeof(*evt) + 1; | |
463 | ||
464 | evt = (struct hci_ev_cmd_complete *)skb_put(skb, sizeof(*evt)); | |
465 | evt->ncmd = 0x01; | |
466 | evt->opcode = cpu_to_le16(opcode); | |
467 | ||
468 | *skb_put(skb, 1) = 0x00; | |
469 | ||
470 | bt_cb(skb)->pkt_type = HCI_EVENT_PKT; | |
471 | ||
472 | return hci_recv_frame(hdev, skb); | |
473 | } | |
474 | ||
ff289559 LP |
475 | static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed) |
476 | { | |
477 | struct intel_data *intel = hu->priv; | |
478 | struct hci_dev *hdev = hu->hdev; | |
479 | u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 }; | |
480 | struct sk_buff *skb; | |
1ab1f239 LP |
481 | int err; |
482 | ||
483 | /* This can be the first command sent to the chip, check | |
484 | * that the controller is ready. | |
485 | */ | |
486 | err = intel_wait_booting(hu); | |
487 | ||
488 | clear_bit(STATE_BOOTING, &intel->flags); | |
489 | ||
490 | /* In case of timeout, try to continue anyway */ | |
491 | if (err && err != ETIMEDOUT) | |
492 | return err; | |
ff289559 | 493 | |
f44e78a5 | 494 | bt_dev_info(hdev, "Change controller speed to %d", speed); |
ff289559 LP |
495 | |
496 | speed_cmd[3] = intel_convert_speed(speed); | |
497 | if (speed_cmd[3] == 0xff) { | |
f44e78a5 | 498 | bt_dev_err(hdev, "Unsupported speed"); |
ff289559 LP |
499 | return -EINVAL; |
500 | } | |
501 | ||
502 | /* Device will not accept speed change if Intel version has not been | |
503 | * previously requested. | |
504 | */ | |
505 | skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_INIT_TIMEOUT); | |
506 | if (IS_ERR(skb)) { | |
f44e78a5 LP |
507 | bt_dev_err(hdev, "Reading Intel version information failed (%ld)", |
508 | PTR_ERR(skb)); | |
ff289559 LP |
509 | return PTR_ERR(skb); |
510 | } | |
511 | kfree_skb(skb); | |
512 | ||
513 | skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL); | |
514 | if (!skb) { | |
f44e78a5 | 515 | bt_dev_err(hdev, "Failed to alloc memory for baudrate packet"); |
ff289559 LP |
516 | return -ENOMEM; |
517 | } | |
518 | ||
519 | memcpy(skb_put(skb, sizeof(speed_cmd)), speed_cmd, sizeof(speed_cmd)); | |
520 | bt_cb(skb)->pkt_type = HCI_COMMAND_PKT; | |
521 | ||
522 | hci_uart_set_flow_control(hu, true); | |
523 | ||
524 | skb_queue_tail(&intel->txq, skb); | |
525 | hci_uart_tx_wakeup(hu); | |
526 | ||
527 | /* wait 100ms to change baudrate on controller side */ | |
528 | msleep(100); | |
529 | ||
530 | hci_uart_set_baudrate(hu, speed); | |
531 | hci_uart_set_flow_control(hu, false); | |
532 | ||
533 | return 0; | |
534 | } | |
535 | ||
ca93cee5 LP |
536 | static int intel_setup(struct hci_uart *hu) |
537 | { | |
538 | static const u8 reset_param[] = { 0x00, 0x01, 0x00, 0x01, | |
539 | 0x00, 0x08, 0x04, 0x00 }; | |
b98469f4 | 540 | static const u8 lpm_param[] = { 0x03, 0x07, 0x01, 0x0b }; |
ca93cee5 | 541 | struct intel_data *intel = hu->priv; |
b98469f4 | 542 | struct intel_device *idev = NULL; |
ca93cee5 LP |
543 | struct hci_dev *hdev = hu->hdev; |
544 | struct sk_buff *skb; | |
545 | struct intel_version *ver; | |
546 | struct intel_boot_params *params; | |
b98469f4 | 547 | struct list_head *p; |
ca93cee5 LP |
548 | const struct firmware *fw; |
549 | const u8 *fw_ptr; | |
550 | char fwname[64]; | |
551 | u32 frag_len; | |
552 | ktime_t calltime, delta, rettime; | |
553 | unsigned long long duration; | |
ff289559 LP |
554 | unsigned int init_speed, oper_speed; |
555 | int speed_change = 0; | |
ca93cee5 LP |
556 | int err; |
557 | ||
f44e78a5 | 558 | bt_dev_dbg(hdev, "start intel_setup"); |
ca93cee5 | 559 | |
6d2e50d2 | 560 | hu->hdev->set_diag = btintel_set_diag; |
35ab8150 MH |
561 | hu->hdev->set_bdaddr = btintel_set_bdaddr; |
562 | ||
ca93cee5 LP |
563 | calltime = ktime_get(); |
564 | ||
ff289559 LP |
565 | if (hu->init_speed) |
566 | init_speed = hu->init_speed; | |
567 | else | |
568 | init_speed = hu->proto->init_speed; | |
569 | ||
570 | if (hu->oper_speed) | |
571 | oper_speed = hu->oper_speed; | |
572 | else | |
573 | oper_speed = hu->proto->oper_speed; | |
574 | ||
575 | if (oper_speed && init_speed && oper_speed != init_speed) | |
576 | speed_change = 1; | |
577 | ||
1ab1f239 LP |
578 | /* Check that the controller is ready */ |
579 | err = intel_wait_booting(hu); | |
580 | ||
581 | clear_bit(STATE_BOOTING, &intel->flags); | |
582 | ||
583 | /* In case of timeout, try to continue anyway */ | |
584 | if (err && err != ETIMEDOUT) | |
585 | return err; | |
586 | ||
ca93cee5 LP |
587 | set_bit(STATE_BOOTLOADER, &intel->flags); |
588 | ||
589 | /* Read the Intel version information to determine if the device | |
590 | * is in bootloader mode or if it already has operational firmware | |
591 | * loaded. | |
592 | */ | |
593 | skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_INIT_TIMEOUT); | |
594 | if (IS_ERR(skb)) { | |
f44e78a5 LP |
595 | bt_dev_err(hdev, "Reading Intel version information failed (%ld)", |
596 | PTR_ERR(skb)); | |
ca93cee5 LP |
597 | return PTR_ERR(skb); |
598 | } | |
599 | ||
600 | if (skb->len != sizeof(*ver)) { | |
f44e78a5 | 601 | bt_dev_err(hdev, "Intel version event size mismatch"); |
ca93cee5 LP |
602 | kfree_skb(skb); |
603 | return -EILSEQ; | |
604 | } | |
605 | ||
606 | ver = (struct intel_version *)skb->data; | |
607 | if (ver->status) { | |
f44e78a5 LP |
608 | bt_dev_err(hdev, "Intel version command failure (%02x)", |
609 | ver->status); | |
ca93cee5 LP |
610 | err = -bt_to_errno(ver->status); |
611 | kfree_skb(skb); | |
612 | return err; | |
613 | } | |
614 | ||
615 | /* The hardware platform number has a fixed value of 0x37 and | |
616 | * for now only accept this single value. | |
617 | */ | |
618 | if (ver->hw_platform != 0x37) { | |
f44e78a5 LP |
619 | bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)", |
620 | ver->hw_platform); | |
ca93cee5 LP |
621 | kfree_skb(skb); |
622 | return -EINVAL; | |
623 | } | |
624 | ||
625 | /* At the moment only the hardware variant iBT 3.0 (LnP/SfP) is | |
626 | * supported by this firmware loading method. This check has been | |
627 | * put in place to ensure correct forward compatibility options | |
628 | * when newer hardware variants come along. | |
629 | */ | |
630 | if (ver->hw_variant != 0x0b) { | |
f44e78a5 LP |
631 | bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)", |
632 | ver->hw_variant); | |
ca93cee5 LP |
633 | kfree_skb(skb); |
634 | return -EINVAL; | |
635 | } | |
636 | ||
7feb99e1 | 637 | btintel_version_info(hdev, ver); |
ca93cee5 LP |
638 | |
639 | /* The firmware variant determines if the device is in bootloader | |
640 | * mode or is running operational firmware. The value 0x06 identifies | |
641 | * the bootloader and the value 0x23 identifies the operational | |
642 | * firmware. | |
643 | * | |
644 | * When the operational firmware is already present, then only | |
645 | * the check for valid Bluetooth device address is needed. This | |
646 | * determines if the device will be added as configured or | |
647 | * unconfigured controller. | |
648 | * | |
649 | * It is not possible to use the Secure Boot Parameters in this | |
650 | * case since that command is only available in bootloader mode. | |
651 | */ | |
652 | if (ver->fw_variant == 0x23) { | |
653 | kfree_skb(skb); | |
654 | clear_bit(STATE_BOOTLOADER, &intel->flags); | |
655 | btintel_check_bdaddr(hdev); | |
656 | return 0; | |
657 | } | |
658 | ||
659 | /* If the device is not in bootloader mode, then the only possible | |
660 | * choice is to return an error and abort the device initialization. | |
661 | */ | |
662 | if (ver->fw_variant != 0x06) { | |
f44e78a5 LP |
663 | bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)", |
664 | ver->fw_variant); | |
ca93cee5 LP |
665 | kfree_skb(skb); |
666 | return -ENODEV; | |
667 | } | |
668 | ||
669 | kfree_skb(skb); | |
670 | ||
671 | /* Read the secure boot parameters to identify the operating | |
672 | * details of the bootloader. | |
673 | */ | |
674 | skb = __hci_cmd_sync(hdev, 0xfc0d, 0, NULL, HCI_INIT_TIMEOUT); | |
675 | if (IS_ERR(skb)) { | |
f44e78a5 LP |
676 | bt_dev_err(hdev, "Reading Intel boot parameters failed (%ld)", |
677 | PTR_ERR(skb)); | |
ca93cee5 LP |
678 | return PTR_ERR(skb); |
679 | } | |
680 | ||
681 | if (skb->len != sizeof(*params)) { | |
f44e78a5 | 682 | bt_dev_err(hdev, "Intel boot parameters size mismatch"); |
ca93cee5 LP |
683 | kfree_skb(skb); |
684 | return -EILSEQ; | |
685 | } | |
686 | ||
687 | params = (struct intel_boot_params *)skb->data; | |
688 | if (params->status) { | |
f44e78a5 LP |
689 | bt_dev_err(hdev, "Intel boot parameters command failure (%02x)", |
690 | params->status); | |
ca93cee5 LP |
691 | err = -bt_to_errno(params->status); |
692 | kfree_skb(skb); | |
693 | return err; | |
694 | } | |
695 | ||
f44e78a5 LP |
696 | bt_dev_info(hdev, "Device revision is %u", |
697 | le16_to_cpu(params->dev_revid)); | |
ca93cee5 | 698 | |
f44e78a5 LP |
699 | bt_dev_info(hdev, "Secure boot is %s", |
700 | params->secure_boot ? "enabled" : "disabled"); | |
ca93cee5 | 701 | |
f44e78a5 | 702 | bt_dev_info(hdev, "Minimum firmware build %u week %u %u", |
ca93cee5 LP |
703 | params->min_fw_build_nn, params->min_fw_build_cw, |
704 | 2000 + params->min_fw_build_yy); | |
705 | ||
706 | /* It is required that every single firmware fragment is acknowledged | |
707 | * with a command complete event. If the boot parameters indicate | |
708 | * that this bootloader does not send them, then abort the setup. | |
709 | */ | |
710 | if (params->limited_cce != 0x00) { | |
f44e78a5 LP |
711 | bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)", |
712 | params->limited_cce); | |
ca93cee5 LP |
713 | kfree_skb(skb); |
714 | return -EINVAL; | |
715 | } | |
716 | ||
717 | /* If the OTP has no valid Bluetooth device address, then there will | |
718 | * also be no valid address for the operational firmware. | |
719 | */ | |
720 | if (!bacmp(¶ms->otp_bdaddr, BDADDR_ANY)) { | |
f44e78a5 | 721 | bt_dev_info(hdev, "No device address configured"); |
ca93cee5 LP |
722 | set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks); |
723 | } | |
724 | ||
725 | /* With this Intel bootloader only the hardware variant and device | |
726 | * revision information are used to select the right firmware. | |
727 | * | |
728 | * Currently this bootloader support is limited to hardware variant | |
729 | * iBT 3.0 (LnP/SfP) which is identified by the value 11 (0x0b). | |
730 | */ | |
731 | snprintf(fwname, sizeof(fwname), "intel/ibt-11-%u.sfi", | |
732 | le16_to_cpu(params->dev_revid)); | |
733 | ||
734 | err = request_firmware(&fw, fwname, &hdev->dev); | |
735 | if (err < 0) { | |
f44e78a5 LP |
736 | bt_dev_err(hdev, "Failed to load Intel firmware file (%d)", |
737 | err); | |
ca93cee5 LP |
738 | kfree_skb(skb); |
739 | return err; | |
740 | } | |
741 | ||
f44e78a5 | 742 | bt_dev_info(hdev, "Found device firmware: %s", fwname); |
ca93cee5 | 743 | |
1cfbabdd LP |
744 | /* Save the DDC file name for later */ |
745 | snprintf(fwname, sizeof(fwname), "intel/ibt-11-%u.ddc", | |
746 | le16_to_cpu(params->dev_revid)); | |
747 | ||
ca93cee5 LP |
748 | kfree_skb(skb); |
749 | ||
750 | if (fw->size < 644) { | |
f44e78a5 LP |
751 | bt_dev_err(hdev, "Invalid size of firmware file (%zu)", |
752 | fw->size); | |
ca93cee5 LP |
753 | err = -EBADF; |
754 | goto done; | |
755 | } | |
756 | ||
757 | set_bit(STATE_DOWNLOADING, &intel->flags); | |
758 | ||
759 | /* Start the firmware download transaction with the Init fragment | |
760 | * represented by the 128 bytes of CSS header. | |
761 | */ | |
09df123d | 762 | err = btintel_secure_send(hdev, 0x00, 128, fw->data); |
ca93cee5 | 763 | if (err < 0) { |
f44e78a5 | 764 | bt_dev_err(hdev, "Failed to send firmware header (%d)", err); |
ca93cee5 LP |
765 | goto done; |
766 | } | |
767 | ||
768 | /* Send the 256 bytes of public key information from the firmware | |
769 | * as the PKey fragment. | |
770 | */ | |
09df123d | 771 | err = btintel_secure_send(hdev, 0x03, 256, fw->data + 128); |
ca93cee5 | 772 | if (err < 0) { |
f44e78a5 LP |
773 | bt_dev_err(hdev, "Failed to send firmware public key (%d)", |
774 | err); | |
ca93cee5 LP |
775 | goto done; |
776 | } | |
777 | ||
778 | /* Send the 256 bytes of signature information from the firmware | |
779 | * as the Sign fragment. | |
780 | */ | |
09df123d | 781 | err = btintel_secure_send(hdev, 0x02, 256, fw->data + 388); |
ca93cee5 | 782 | if (err < 0) { |
f44e78a5 LP |
783 | bt_dev_err(hdev, "Failed to send firmware signature (%d)", |
784 | err); | |
ca93cee5 LP |
785 | goto done; |
786 | } | |
787 | ||
788 | fw_ptr = fw->data + 644; | |
789 | frag_len = 0; | |
790 | ||
791 | while (fw_ptr - fw->data < fw->size) { | |
792 | struct hci_command_hdr *cmd = (void *)(fw_ptr + frag_len); | |
793 | ||
794 | frag_len += sizeof(*cmd) + cmd->plen; | |
795 | ||
f44e78a5 LP |
796 | bt_dev_dbg(hdev, "Patching %td/%zu", (fw_ptr - fw->data), |
797 | fw->size); | |
ca93cee5 LP |
798 | |
799 | /* The parameter length of the secure send command requires | |
800 | * a 4 byte alignment. It happens so that the firmware file | |
801 | * contains proper Intel_NOP commands to align the fragments | |
802 | * as needed. | |
803 | * | |
804 | * Send set of commands with 4 byte alignment from the | |
805 | * firmware data buffer as a single Data fragement. | |
806 | */ | |
807 | if (frag_len % 4) | |
808 | continue; | |
809 | ||
810 | /* Send each command from the firmware data buffer as | |
811 | * a single Data fragment. | |
812 | */ | |
09df123d | 813 | err = btintel_secure_send(hdev, 0x01, frag_len, fw_ptr); |
ca93cee5 | 814 | if (err < 0) { |
f44e78a5 LP |
815 | bt_dev_err(hdev, "Failed to send firmware data (%d)", |
816 | err); | |
ca93cee5 LP |
817 | goto done; |
818 | } | |
819 | ||
820 | fw_ptr += frag_len; | |
821 | frag_len = 0; | |
822 | } | |
823 | ||
824 | set_bit(STATE_FIRMWARE_LOADED, &intel->flags); | |
825 | ||
f44e78a5 | 826 | bt_dev_info(hdev, "Waiting for firmware download to complete"); |
ca93cee5 LP |
827 | |
828 | /* Before switching the device into operational mode and with that | |
829 | * booting the loaded firmware, wait for the bootloader notification | |
830 | * that all fragments have been successfully received. | |
831 | * | |
832 | * When the event processing receives the notification, then the | |
833 | * STATE_DOWNLOADING flag will be cleared. | |
834 | * | |
835 | * The firmware loading should not take longer than 5 seconds | |
836 | * and thus just timeout if that happens and fail the setup | |
837 | * of this device. | |
838 | */ | |
839 | err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING, | |
840 | TASK_INTERRUPTIBLE, | |
841 | msecs_to_jiffies(5000)); | |
842 | if (err == 1) { | |
f44e78a5 | 843 | bt_dev_err(hdev, "Firmware loading interrupted"); |
ca93cee5 LP |
844 | err = -EINTR; |
845 | goto done; | |
846 | } | |
847 | ||
848 | if (err) { | |
f44e78a5 | 849 | bt_dev_err(hdev, "Firmware loading timeout"); |
ca93cee5 LP |
850 | err = -ETIMEDOUT; |
851 | goto done; | |
852 | } | |
853 | ||
854 | if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) { | |
f44e78a5 | 855 | bt_dev_err(hdev, "Firmware loading failed"); |
ca93cee5 LP |
856 | err = -ENOEXEC; |
857 | goto done; | |
858 | } | |
859 | ||
860 | rettime = ktime_get(); | |
861 | delta = ktime_sub(rettime, calltime); | |
862 | duration = (unsigned long long) ktime_to_ns(delta) >> 10; | |
863 | ||
f44e78a5 | 864 | bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration); |
ca93cee5 LP |
865 | |
866 | done: | |
867 | release_firmware(fw); | |
868 | ||
869 | if (err < 0) | |
870 | return err; | |
871 | ||
ff289559 LP |
872 | /* We need to restore the default speed before Intel reset */ |
873 | if (speed_change) { | |
874 | err = intel_set_baudrate(hu, init_speed); | |
875 | if (err) | |
876 | return err; | |
877 | } | |
878 | ||
ca93cee5 LP |
879 | calltime = ktime_get(); |
880 | ||
881 | set_bit(STATE_BOOTING, &intel->flags); | |
882 | ||
883 | skb = __hci_cmd_sync(hdev, 0xfc01, sizeof(reset_param), reset_param, | |
884 | HCI_INIT_TIMEOUT); | |
885 | if (IS_ERR(skb)) | |
886 | return PTR_ERR(skb); | |
887 | ||
888 | kfree_skb(skb); | |
889 | ||
890 | /* The bootloader will not indicate when the device is ready. This | |
891 | * is done by the operational firmware sending bootup notification. | |
892 | * | |
893 | * Booting into operational firmware should not take longer than | |
894 | * 1 second. However if that happens, then just fail the setup | |
895 | * since something went wrong. | |
896 | */ | |
f44e78a5 | 897 | bt_dev_info(hdev, "Waiting for device to boot"); |
ca93cee5 | 898 | |
1ab1f239 LP |
899 | err = intel_wait_booting(hu); |
900 | if (err) | |
901 | return err; | |
ca93cee5 | 902 | |
1ab1f239 | 903 | clear_bit(STATE_BOOTING, &intel->flags); |
ca93cee5 LP |
904 | |
905 | rettime = ktime_get(); | |
906 | delta = ktime_sub(rettime, calltime); | |
907 | duration = (unsigned long long) ktime_to_ns(delta) >> 10; | |
908 | ||
f44e78a5 | 909 | bt_dev_info(hdev, "Device booted in %llu usecs", duration); |
ca93cee5 | 910 | |
b98469f4 | 911 | /* Enable LPM if matching pdev with wakeup enabled */ |
67c8bde0 | 912 | mutex_lock(&intel_device_list_lock); |
b98469f4 LP |
913 | list_for_each(p, &intel_device_list) { |
914 | struct intel_device *dev = list_entry(p, struct intel_device, | |
915 | list); | |
916 | if (hu->tty->dev->parent == dev->pdev->dev.parent) { | |
917 | if (device_may_wakeup(&dev->pdev->dev)) | |
918 | idev = dev; | |
919 | break; | |
920 | } | |
921 | } | |
67c8bde0 | 922 | mutex_unlock(&intel_device_list_lock); |
b98469f4 LP |
923 | |
924 | if (!idev) | |
925 | goto no_lpm; | |
926 | ||
f44e78a5 | 927 | bt_dev_info(hdev, "Enabling LPM"); |
b98469f4 LP |
928 | |
929 | skb = __hci_cmd_sync(hdev, 0xfc8b, sizeof(lpm_param), lpm_param, | |
930 | HCI_CMD_TIMEOUT); | |
931 | if (IS_ERR(skb)) { | |
f44e78a5 | 932 | bt_dev_err(hdev, "Failed to enable LPM"); |
b98469f4 LP |
933 | goto no_lpm; |
934 | } | |
935 | kfree_skb(skb); | |
936 | ||
937 | set_bit(STATE_LPM_ENABLED, &intel->flags); | |
938 | ||
939 | no_lpm: | |
1cfbabdd LP |
940 | /* Ignore errors, device can work without DDC parameters */ |
941 | btintel_load_ddc_config(hdev, fwname); | |
942 | ||
ff289559 LP |
943 | skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT); |
944 | if (IS_ERR(skb)) | |
945 | return PTR_ERR(skb); | |
946 | kfree_skb(skb); | |
947 | ||
948 | if (speed_change) { | |
949 | err = intel_set_baudrate(hu, oper_speed); | |
950 | if (err) | |
951 | return err; | |
952 | } | |
953 | ||
f44e78a5 | 954 | bt_dev_info(hdev, "Setup complete"); |
ff289559 | 955 | |
ca93cee5 LP |
956 | clear_bit(STATE_BOOTLOADER, &intel->flags); |
957 | ||
958 | return 0; | |
959 | } | |
960 | ||
961 | static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb) | |
962 | { | |
963 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
964 | struct intel_data *intel = hu->priv; | |
965 | struct hci_event_hdr *hdr; | |
966 | ||
1ab1f239 LP |
967 | if (!test_bit(STATE_BOOTLOADER, &intel->flags) && |
968 | !test_bit(STATE_BOOTING, &intel->flags)) | |
ca93cee5 LP |
969 | goto recv; |
970 | ||
971 | hdr = (void *)skb->data; | |
972 | ||
973 | /* When the firmware loading completes the device sends | |
974 | * out a vendor specific event indicating the result of | |
975 | * the firmware loading. | |
976 | */ | |
977 | if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 && | |
978 | skb->data[2] == 0x06) { | |
979 | if (skb->data[3] != 0x00) | |
980 | set_bit(STATE_FIRMWARE_FAILED, &intel->flags); | |
981 | ||
982 | if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) && | |
983 | test_bit(STATE_FIRMWARE_LOADED, &intel->flags)) { | |
984 | smp_mb__after_atomic(); | |
985 | wake_up_bit(&intel->flags, STATE_DOWNLOADING); | |
986 | } | |
987 | ||
988 | /* When switching to the operational firmware the device | |
989 | * sends a vendor specific event indicating that the bootup | |
990 | * completed. | |
991 | */ | |
992 | } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 && | |
993 | skb->data[2] == 0x02) { | |
994 | if (test_and_clear_bit(STATE_BOOTING, &intel->flags)) { | |
995 | smp_mb__after_atomic(); | |
996 | wake_up_bit(&intel->flags, STATE_BOOTING); | |
997 | } | |
998 | } | |
999 | recv: | |
1000 | return hci_recv_frame(hdev, skb); | |
1001 | } | |
1002 | ||
b98469f4 LP |
1003 | static void intel_recv_lpm_notify(struct hci_dev *hdev, int value) |
1004 | { | |
1005 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
1006 | struct intel_data *intel = hu->priv; | |
1007 | ||
f44e78a5 | 1008 | bt_dev_dbg(hdev, "TX idle notification (%d)", value); |
b98469f4 | 1009 | |
74cdad37 | 1010 | if (value) { |
b98469f4 | 1011 | set_bit(STATE_TX_ACTIVE, &intel->flags); |
74cdad37 LP |
1012 | schedule_work(&intel->busy_work); |
1013 | } else { | |
b98469f4 | 1014 | clear_bit(STATE_TX_ACTIVE, &intel->flags); |
74cdad37 | 1015 | } |
b98469f4 LP |
1016 | } |
1017 | ||
1018 | static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb) | |
1019 | { | |
1020 | struct hci_lpm_pkt *lpm = (void *)skb->data; | |
89436546 LP |
1021 | struct hci_uart *hu = hci_get_drvdata(hdev); |
1022 | struct intel_data *intel = hu->priv; | |
b98469f4 LP |
1023 | |
1024 | switch (lpm->opcode) { | |
1025 | case LPM_OP_TX_NOTIFY: | |
1b197574 LP |
1026 | if (lpm->dlen < 1) { |
1027 | bt_dev_err(hu->hdev, "Invalid LPM notification packet"); | |
1028 | break; | |
1029 | } | |
1030 | intel_recv_lpm_notify(hdev, lpm->data[0]); | |
b98469f4 | 1031 | break; |
89436546 LP |
1032 | case LPM_OP_SUSPEND_ACK: |
1033 | set_bit(STATE_SUSPENDED, &intel->flags); | |
1034 | if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) { | |
1035 | smp_mb__after_atomic(); | |
1036 | wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION); | |
1037 | } | |
1038 | break; | |
1039 | case LPM_OP_RESUME_ACK: | |
1040 | clear_bit(STATE_SUSPENDED, &intel->flags); | |
1041 | if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) { | |
1042 | smp_mb__after_atomic(); | |
1043 | wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION); | |
1044 | } | |
1045 | break; | |
b98469f4 | 1046 | default: |
f44e78a5 | 1047 | bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode); |
b98469f4 LP |
1048 | break; |
1049 | } | |
1050 | ||
1051 | kfree_skb(skb); | |
1052 | ||
1053 | return 0; | |
1054 | } | |
1055 | ||
1056 | #define INTEL_RECV_LPM \ | |
1057 | .type = HCI_LPM_PKT, \ | |
1058 | .hlen = HCI_LPM_HDR_SIZE, \ | |
1059 | .loff = 1, \ | |
1060 | .lsize = 1, \ | |
1061 | .maxlen = HCI_LPM_MAX_SIZE | |
1062 | ||
ca93cee5 | 1063 | static const struct h4_recv_pkt intel_recv_pkts[] = { |
b98469f4 LP |
1064 | { H4_RECV_ACL, .recv = hci_recv_frame }, |
1065 | { H4_RECV_SCO, .recv = hci_recv_frame }, | |
1066 | { H4_RECV_EVENT, .recv = intel_recv_event }, | |
1067 | { INTEL_RECV_LPM, .recv = intel_recv_lpm }, | |
ca93cee5 LP |
1068 | }; |
1069 | ||
1070 | static int intel_recv(struct hci_uart *hu, const void *data, int count) | |
1071 | { | |
1072 | struct intel_data *intel = hu->priv; | |
1073 | ||
1074 | if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) | |
1075 | return -EUNATCH; | |
1076 | ||
1077 | intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count, | |
1078 | intel_recv_pkts, | |
1079 | ARRAY_SIZE(intel_recv_pkts)); | |
1080 | if (IS_ERR(intel->rx_skb)) { | |
1081 | int err = PTR_ERR(intel->rx_skb); | |
f44e78a5 | 1082 | bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); |
ca93cee5 LP |
1083 | intel->rx_skb = NULL; |
1084 | return err; | |
1085 | } | |
1086 | ||
1087 | return count; | |
1088 | } | |
1089 | ||
1090 | static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb) | |
1091 | { | |
1092 | struct intel_data *intel = hu->priv; | |
74cdad37 | 1093 | struct list_head *p; |
ca93cee5 LP |
1094 | |
1095 | BT_DBG("hu %p skb %p", hu, skb); | |
1096 | ||
74cdad37 LP |
1097 | /* Be sure our controller is resumed and potential LPM transaction |
1098 | * completed before enqueuing any packet. | |
1099 | */ | |
1100 | mutex_lock(&intel_device_list_lock); | |
1101 | list_for_each(p, &intel_device_list) { | |
1102 | struct intel_device *idev = list_entry(p, struct intel_device, | |
1103 | list); | |
1104 | ||
1105 | if (hu->tty->dev->parent == idev->pdev->dev.parent) { | |
1106 | pm_runtime_get_sync(&idev->pdev->dev); | |
1107 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
1108 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
1109 | break; | |
1110 | } | |
1111 | } | |
1112 | mutex_unlock(&intel_device_list_lock); | |
1113 | ||
ca93cee5 LP |
1114 | skb_queue_tail(&intel->txq, skb); |
1115 | ||
1116 | return 0; | |
1117 | } | |
1118 | ||
1119 | static struct sk_buff *intel_dequeue(struct hci_uart *hu) | |
1120 | { | |
1121 | struct intel_data *intel = hu->priv; | |
1122 | struct sk_buff *skb; | |
1123 | ||
1124 | skb = skb_dequeue(&intel->txq); | |
1125 | if (!skb) | |
1126 | return skb; | |
1127 | ||
1128 | if (test_bit(STATE_BOOTLOADER, &intel->flags) && | |
1129 | (bt_cb(skb)->pkt_type == HCI_COMMAND_PKT)) { | |
1130 | struct hci_command_hdr *cmd = (void *)skb->data; | |
1131 | __u16 opcode = le16_to_cpu(cmd->opcode); | |
1132 | ||
1133 | /* When the 0xfc01 command is issued to boot into | |
1134 | * the operational firmware, it will actually not | |
1135 | * send a command complete event. To keep the flow | |
1136 | * control working inject that event here. | |
1137 | */ | |
1138 | if (opcode == 0xfc01) | |
1139 | inject_cmd_complete(hu->hdev, opcode); | |
1140 | } | |
1141 | ||
1142 | /* Prepend skb with frame type */ | |
1143 | memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1); | |
1144 | ||
1145 | return skb; | |
1146 | } | |
1147 | ||
1148 | static const struct hci_uart_proto intel_proto = { | |
1149 | .id = HCI_UART_INTEL, | |
1150 | .name = "Intel", | |
aee61f7a | 1151 | .manufacturer = 2, |
ca93cee5 | 1152 | .init_speed = 115200, |
ff289559 | 1153 | .oper_speed = 3000000, |
ca93cee5 LP |
1154 | .open = intel_open, |
1155 | .close = intel_close, | |
1156 | .flush = intel_flush, | |
1157 | .setup = intel_setup, | |
ff289559 | 1158 | .set_baudrate = intel_set_baudrate, |
ca93cee5 LP |
1159 | .recv = intel_recv, |
1160 | .enqueue = intel_enqueue, | |
1161 | .dequeue = intel_dequeue, | |
1162 | }; | |
1163 | ||
1ab1f239 LP |
1164 | #ifdef CONFIG_ACPI |
1165 | static const struct acpi_device_id intel_acpi_match[] = { | |
1166 | { "INT33E1", 0 }, | |
1167 | { }, | |
1168 | }; | |
1169 | MODULE_DEVICE_TABLE(acpi, intel_acpi_match); | |
1ab1f239 LP |
1170 | #endif |
1171 | ||
74cdad37 | 1172 | #ifdef CONFIG_PM |
f7552473 | 1173 | static int intel_suspend_device(struct device *dev) |
aa6802df LP |
1174 | { |
1175 | struct intel_device *idev = dev_get_drvdata(dev); | |
1176 | ||
aa6802df LP |
1177 | mutex_lock(&idev->hu_lock); |
1178 | if (idev->hu) | |
1179 | intel_lpm_suspend(idev->hu); | |
1180 | mutex_unlock(&idev->hu_lock); | |
1181 | ||
1182 | return 0; | |
1183 | } | |
1184 | ||
f7552473 | 1185 | static int intel_resume_device(struct device *dev) |
aa6802df LP |
1186 | { |
1187 | struct intel_device *idev = dev_get_drvdata(dev); | |
1188 | ||
aa6802df LP |
1189 | mutex_lock(&idev->hu_lock); |
1190 | if (idev->hu) | |
1191 | intel_lpm_resume(idev->hu); | |
1192 | mutex_unlock(&idev->hu_lock); | |
1193 | ||
1194 | return 0; | |
1195 | } | |
1196 | #endif | |
1197 | ||
f7552473 LP |
1198 | #ifdef CONFIG_PM_SLEEP |
1199 | static int intel_suspend(struct device *dev) | |
1200 | { | |
1201 | struct intel_device *idev = dev_get_drvdata(dev); | |
1202 | ||
1203 | if (device_may_wakeup(dev)) | |
1204 | enable_irq_wake(idev->irq); | |
1205 | ||
1206 | return intel_suspend_device(dev); | |
1207 | } | |
1208 | ||
1209 | static int intel_resume(struct device *dev) | |
1210 | { | |
1211 | struct intel_device *idev = dev_get_drvdata(dev); | |
1212 | ||
1213 | if (device_may_wakeup(dev)) | |
1214 | disable_irq_wake(idev->irq); | |
1215 | ||
1216 | return intel_resume_device(dev); | |
1217 | } | |
1218 | #endif | |
1219 | ||
aa6802df LP |
1220 | static const struct dev_pm_ops intel_pm_ops = { |
1221 | SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume) | |
f7552473 | 1222 | SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL) |
aa6802df LP |
1223 | }; |
1224 | ||
1ab1f239 LP |
1225 | static int intel_probe(struct platform_device *pdev) |
1226 | { | |
1227 | struct intel_device *idev; | |
1228 | ||
1229 | idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL); | |
1230 | if (!idev) | |
1231 | return -ENOMEM; | |
1232 | ||
aa6802df LP |
1233 | mutex_init(&idev->hu_lock); |
1234 | ||
1ab1f239 LP |
1235 | idev->pdev = pdev; |
1236 | ||
1ab1f239 LP |
1237 | idev->reset = devm_gpiod_get_optional(&pdev->dev, "reset", |
1238 | GPIOD_OUT_LOW); | |
1239 | if (IS_ERR(idev->reset)) { | |
1240 | dev_err(&pdev->dev, "Unable to retrieve gpio\n"); | |
1241 | return PTR_ERR(idev->reset); | |
1242 | } | |
1243 | ||
765ea3ab LP |
1244 | idev->irq = platform_get_irq(pdev, 0); |
1245 | if (idev->irq < 0) { | |
1246 | struct gpio_desc *host_wake; | |
1247 | ||
1248 | dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n"); | |
1249 | ||
1250 | host_wake = devm_gpiod_get_optional(&pdev->dev, "host-wake", | |
1251 | GPIOD_IN); | |
1252 | if (IS_ERR(host_wake)) { | |
1253 | dev_err(&pdev->dev, "Unable to retrieve IRQ\n"); | |
1254 | goto no_irq; | |
1255 | } | |
1256 | ||
1257 | idev->irq = gpiod_to_irq(host_wake); | |
1258 | if (idev->irq < 0) { | |
1259 | dev_err(&pdev->dev, "No corresponding irq for gpio\n"); | |
1260 | goto no_irq; | |
1261 | } | |
1262 | } | |
1263 | ||
1264 | /* Only enable wake-up/irq when controller is powered */ | |
1265 | device_set_wakeup_capable(&pdev->dev, true); | |
1266 | device_wakeup_disable(&pdev->dev); | |
1267 | ||
1268 | no_irq: | |
1ab1f239 LP |
1269 | platform_set_drvdata(pdev, idev); |
1270 | ||
1271 | /* Place this instance on the device list */ | |
67c8bde0 | 1272 | mutex_lock(&intel_device_list_lock); |
1ab1f239 | 1273 | list_add_tail(&idev->list, &intel_device_list); |
67c8bde0 | 1274 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 | 1275 | |
765ea3ab LP |
1276 | dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n", |
1277 | desc_to_gpio(idev->reset), idev->irq); | |
1ab1f239 LP |
1278 | |
1279 | return 0; | |
1280 | } | |
1281 | ||
1282 | static int intel_remove(struct platform_device *pdev) | |
1283 | { | |
1284 | struct intel_device *idev = platform_get_drvdata(pdev); | |
1285 | ||
765ea3ab LP |
1286 | device_wakeup_disable(&pdev->dev); |
1287 | ||
67c8bde0 | 1288 | mutex_lock(&intel_device_list_lock); |
1ab1f239 | 1289 | list_del(&idev->list); |
67c8bde0 | 1290 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 LP |
1291 | |
1292 | dev_info(&pdev->dev, "unregistered.\n"); | |
1293 | ||
1294 | return 0; | |
1295 | } | |
1296 | ||
1297 | static struct platform_driver intel_driver = { | |
1298 | .probe = intel_probe, | |
1299 | .remove = intel_remove, | |
1300 | .driver = { | |
1301 | .name = "hci_intel", | |
1302 | .acpi_match_table = ACPI_PTR(intel_acpi_match), | |
aa6802df | 1303 | .pm = &intel_pm_ops, |
1ab1f239 LP |
1304 | }, |
1305 | }; | |
1306 | ||
ca93cee5 LP |
1307 | int __init intel_init(void) |
1308 | { | |
1ab1f239 LP |
1309 | platform_driver_register(&intel_driver); |
1310 | ||
ca93cee5 LP |
1311 | return hci_uart_register_proto(&intel_proto); |
1312 | } | |
1313 | ||
1314 | int __exit intel_deinit(void) | |
1315 | { | |
1ab1f239 LP |
1316 | platform_driver_unregister(&intel_driver); |
1317 | ||
ca93cee5 LP |
1318 | return hci_uart_unregister_proto(&intel_proto); |
1319 | } |